Guoyun Technology ESP-32F Module User Manual

Shenzhen Guoyun Technology Co.,Ltd. Module

User manual

ESP32 DatasheetEspressif SystemsJune 20, 2017
About This GuideThis document provides introduction to the specifications of ESP32 hardware.The document structure is as follows:Chapter Title SubjectChapter 1 Overview An overview of ESP32, including featured solutions, basic andadvanced features, applications and development support.Chapter 2 Pin Definitions Introduction to the pin layout and descriptions.Chapter 3 Functional Description Description of the major functional modules.Chapter 4 Peripheral Interface Description of the peripheral interfaces integrated on ESP32.Chapter 5 Electrical Characteristics The electrical characteristics and data of ESP32.Chapter 6 Package Information The package details of ESP32.Chapter 7 Part Number and OrderingInformationThe part number and ordering information of the ESP32 se-ries.Chapter 8 Supported Resources The ESP32-related documents and community resources.Appendix A Touch Sensor The touch sensor design and layout guidelines.Appendix B Code Examples Input and output code examples.Appendix C ESP32 Pin Lists Lists of ESP32’s GPIO_Matrix, Ethernet_MAC and IO_MUXpins.Release NotesDate Version Release notes2016.08 V1.0 First release.2017.02 V1.1• Added Chapter Part Number and Ordering Information;• Updated Section MCU and Advanced Features;• Updated Section Block Diagram;• Updated Chapter Pin Definitions;• Updated Section CPU and Memory;• Updated Section Audio PLL Clock;• Updated Section Absolute Maximum Ratings;• Updated Chapter Package Information;• Updated Chapter Learning Resources.2017.03 V1.2 • Added a note to Table Pin Description;• Updated the note in Section Internal Memory.2017.04 V1.3• Added Appendix ESP32 Pin Lists;• Updated Table Wi-Fi Radio Characteristics;• Updated Figure ESP32 Pin Layout (for QFN 5*5).
Date Version Release notes2017.05 V1.4• Added a note to the frequency of external crystal oscillator in Section 1.3.2Clocks and Timers;• Added a note to Section 2.4 Strapping Pins;• Updated Section 3.7 RTC and Low-Power Management;• Changed the maximum driving capability in Table 8Absolulte MaximumRatings from 12 mA to 80 mA;• Changed the input impedance value of 50Ωin Table 10 Wi-Fi Radio Char-acteristics to output impedance value of 30+j10 Ω;• Added a note to No.8 in Table 18 Notes on ESP32 Pin Lists;• Deleted GPIO20 in Table IO_MUX.2017.06 V1.5• Changed the power supply range in Section 1.3.1 CPU and Memory;• Updated the note in Section 2.3 Power Scheme;• Updated Table 8Absolute Maximum Ratings;• Changed the drive strength values of the digital output pins in Note8 inTable 18 Notes on ESP32 Pin Lists;• Added Documentation Change Notification.2017.06 V1.6Corrected two typos:• Changed the number of external components to 20 in Section 1.1.2;• Changed the number of GPIO pins to 34 in Section 4.1.Documentation Change NotificationEspressif provides email notification to keep customers updated on changes to technical documentation.Please subscribe here.Disclaimer and Copyright NoticeInformation in this document, including URL references, is subject to change without notice. THIS DOCUMENT ISPROVIDED AS IS WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABIL-ITY, NON-INFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISEARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.All liability, including liability for infringement of any proprietary rights, relating to use of information in this docu-ment is disclaimed. No licenses express or implied, by estoppel or otherwise, to any intellectual property rightsare granted herein. The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is aregistered trademark of Bluetooth SIG.All trade names, trademarks and registered trademarks mentioned in this document are property of their respectiveowners, and are hereby acknowledged.Copyright © 2017 Espressif Inc. All rights reserved.
Contents1 Overview 11.1 Featured Solutions 11.1.1 Ultra-Low-Power-Solution 11.1.2 Complete Integration Solution 11.2 Basic Protocols 11.2.1 Wi-Fi 11.2.2 Bluetooth 21.3 MCU and Advanced Features 31.3.1 CPU and Memory 31.3.2 Clocks and Timers 31.3.3 Advanced Peripheral Interfaces 31.3.4 Security 41.3.5 Development Support 41.4 Application 41.5 Block Diagram 52 Pin Definitions 62.1 Pin Layout 62.2 Pin Description 72.3 Power Scheme 92.4 Strapping Pins 103 Functional Description 123.1 CPU and Memory 123.1.1 CPU 123.1.2 Internal Memory 123.1.3 External Flash and SRAM 133.1.4 Memory Map 133.2 Timers and Watchdogs 153.2.1 64-bit Timers 153.2.2 Watchdog Timers 153.3 System Clocks 163.3.1 CPU Clock 163.3.2 RTC Clock 163.3.3 Audio PLL Clock 163.4 Radio 173.4.1 2.4 GHz Receiver 173.4.2 2.4 GHz Transmitter 173.4.3 Clock Generator 173.5 Wi-Fi 173.5.1 Wi-Fi Radio and Baseband 183.5.2 Wi-Fi MAC 183.5.3 Wi-Fi Firmware 183.5.4 Packet Traffic Arbitration (PTA) 19
3.6 Bluetooth 193.6.1 Bluetooth Radio and Baseband 193.6.2 Bluetooth Interface 203.6.3 Bluetooth Stack 203.6.4 Bluetooth Link Controller 203.7 RTC and Low-Power Management 214 Peripherals and Sensors 234.1 General Purpose Input / Output Interface (GPIO) 234.2 Analog-to-Digital Converter (ADC) 234.3 Ultra-Low-Noise Analog Pre-Amplifier 234.4 Hall Sensor 234.5 Digital-to-Analog Converter (DAC) 234.6 Temperature Sensor 244.7 Touch Sensor 244.8 Ultra-Lower-Power Coprocessor 244.9 Ethernet MAC Interface 254.10 SD/SDIO/MMC Host Controller 254.11 SDIO/SPI Slave Controller 254.12 Universal Asynchronous Receiver Transmitter (UART) 264.13 I2C Interface 264.14 I2S Interface 264.15 Infrared Remote Controller 264.16 Pulse Counter 274.17 Pulse Width Modulation (PWM) 274.18 LED PWM 274.19 Serial Peripheral Interface (SPI) 274.20 Accelerator 275 Electrical Characteristics 285.1 Absolute Maximum Ratings 285.2 RF Power Consumption Specifications 285.3 Wi-Fi Radio 295.4 Bluetooth Radio 295.4.1 Receiver–Basic Data Rate 295.4.2 Transmitter - Basic Data Rate 305.4.3 Receiver–Enhanced Data Rate 305.4.4 Transmitter–Enhanced Data Rate 315.5 Bluetooth LE Radio 315.5.1 Receiver 315.5.2 Transmitter 326 Package Information 337 Part Number and Ordering Information 348 Learning Resources 35
8.1 Must-Read Documents 358.2 Must-Have Resources 35Appendix A – Touch Sensor 36A.1. Electrode Pattern 36A.2. PCB Layout 36Appendix B – Code Examples 38B.1. Input 38B.2. Output 38Appendix C - ESP32 Pin Lists 39C.1. Notes on ESP32 Pin Lists 39C.2. GPIO_Matrix 41C.3. Ethernet_MAC 46C.4. IO_MUX 46
List of Tables2 Pin Description 73 Strapping Pins 104 Memory and Peripheral Mapping 145 Functionalities Depending on the Power Modes 216 Power Consumption by Power Modes 227 Capacitive Sensing GPIOs Available on ESP32 248 Absolute Maximum Ratings 289 RF Power Consumption Specifications 2810 Wi-Fi Radio Characteristics 2911 Receiver Characteristics–Basic Data Rate 2912 Transmitter Characteristics–Basic Data Rate 3013 Receiver Characteristics–Enhanced Data Rate 3014 Transmitter Characteristics–Enhanced Data Rate 3115 Receiver Characteristics–BLE 3116 Transmitter Characteristics–BLE 3217 ESP32 Ordering Information 3418 Notes on ESP32 Pin Lists 3919 GPIO_Matrix 4120 Ethernet_MAC 46
List of Figures1 Function Block Diagram 52 ESP32 Pin Layout (for QFN 6*6) 63 ESP32 Pin Layout (for QFN 5*5) 74 Address Mapping Structure 135 QFN48 (6x6 mm) Package 336 QFN48 (5x5 mm) Package 337 ESP32 Part Number 348 A Typical Touch Sensor Application 369 Electrode Pattern Requirements 3610 Sensor Track Routing Requirements 37
1. OVERVIEW1. OverviewESP32 is a single 2.4 GHz Wi-Fi and Bluetooth combo chip designed with TSMC ultra-low-power 40 nm technol-ogy. It is designed to achieve the best power performance and RF performance, showing robustness, versatility,excellent features and reliability in a wide variety of applications and different power profiles.The ESP32 series of chips include ESP32-D0WDQ6, ESP32-D0WD, ESP32-D2WD, and ESP32-S0WD. For detailsof part number and ordering information, please refer to Part Number and Ordering Information.1.1 Featured Solutions1.1.1 Ultra-Low-Power-SolutionESP32 is designed for mobile, wearable electronics, and Internet of Things (IoT) applications. It has many featuresof the state-of-the-art low power chips, including fine resolution clock gating, power modes, and dynamic powerscaling. For instance, in a low-power IoT sensor hub application scenario, ESP32 is woken up periodically andonly when a specified condition is detected; low duty cycle is used to minimize the amount of energy that thechip expends. The output power of the power amplifier is also adjustable to achieve an optimal trade-off betweencommunication range, data rate and power consumption.Note:For more information, refer to Section 3.7 RTC and Low-Power Management.1.1.2 Complete Integration SolutionESP32 is a highly-integrated solution for Wi-Fi + Bluetooth applications in the IoT industry with around 20 externalcomponents. ESP32 integrates the antenna switch, RF balun, power amplifier, low noise receive amplifier, filters,and power management modules. As such, the entire solution occupies minimal Printed Circuit Board (PCB)area.ESP32 uses CMOS for single-chip fully-integrated radio and baseband, and also integrates advanced calibrationcircuitries that allow the solution to dynamically adjust itself to remove external circuit imperfections or adjust tochanges in external conditions. As such, the mass production of ESP32 solutions does not require expensive andspecialized Wi-Fi test equipment.1.2 Basic Protocols1.2.1 Wi-Fi• 802.11 b/g/n/e/i• 802.11 n (2.4 GHz), up to 150 Mbps• 802.11 e: QoS for wireless multimedia technology• WMM-PS, UAPSD• A-MPDU and A-MSDU aggregation• Block ACKEspressif Systems 1 ESP32 Datasheet V1.6
1. OVERVIEW• Fragmentation and defragmentation• Automatic Beacon monitoring/scanning• 802.11 i security features: pre-authentication and TSN• Wi-Fi Protected Access (WPA)/WPA2/WPA2-Enterprise/Wi-Fi Protected Setup (WPS)• Infrastructure BSS Station mode/SoftAP mode• Wi-Fi Direct (P2P), P2P Discovery, P2P Group Owner mode and P2P Power Management• UMA compliant and certified• Antenna diversity and selectionNote:For more information, refer to Section 3.5 Wi-Fi.1.2.2 Bluetooth• Compliant with Bluetooth v4.2 BR/EDR and BLE specification• Class-1, class-2 and class-3 transmitter without external power amplifier• Enhanced power control• +10 dBm transmitting power• NZIF receiver with -98 dBm sensitivity• Adaptive Frequency Hopping (AFH)• Standard HCI based on SDIO/SPI/UART• High speed UART HCI, up to 4 Mbps• BT 4.2 controller and host stack• Service Discover Protocol (SDP)• General Access Profile (GAP)• Security Manage Protocol (SMP)• Bluetooth Low Energy (BLE)• ATT/GATT• HID• All GATT-based profile supported• SPP-Like GATT-based profile• BLE Beacon• A2DP/AVRCP/SPP, HSP/HFP, RFCOMM• CVSD and SBC for audio codec• Bluetooth Piconet and ScatternetEspressif Systems 2 ESP32 Datasheet V1.6
1. OVERVIEW1.3 MCU and Advanced Features1.3.1 CPU and Memory• Xtensa®Single-/Dual-core 32-bit LX6 microprocessor(s), up to 600 DMIPS• 448 KB ROM• 520 KB SRAM• 16 KB SRAM in RTC• QSPI flash/SRAM, up to 4 x 16 MB• Power supply: 2.3V to 3.6V1.3.2 Clocks and Timers• Internal 8 MHz oscillator with calibration• Internal RC oscillator with calibration• External 2 MHz to 60 MHz crystal oscillator (40 MHz only for Wi-Fi/BT functionality)• External 32 kHz crystal oscillator for RTC with calibration• Two timer groups, including 2 x 64-bit timers and 1 x main watchdog in each group• RTC timer with sub-second accuracy• RTC watchdog1.3.3 Advanced Peripheral Interfaces• 12-bit SAR ADC up to 18 channels• 2 × 8-bit D/A converters• 10 × touch sensors• Temperature sensor• 4 × SPI• 2 × I2S• 2 × I2C• 3 × UART• 1 host (SD/eMMC/SDIO)• 1 slave (SDIO/SPI)• Ethernet MAC interface with dedicated DMA and IEEE 1588 support• CAN 2.0• IR (TX/RX)• Motor PWM• LED PWM up to 16 channels• Hall sensor• Ultra-low-noise analog pre-amplifierEspressif Systems 3 ESP32 Datasheet V1.6
1. OVERVIEW1.3.4 Security• IEEE 802.11 standard security features all supported, including WFA, WPA/WPA2 and WAPI• Secure boot• Flash encryption• 1024-bit OTP, up to 768-bit for customers• Cryptographic hardware acceleration:–AES–HASH (SHA-2) library–RSA–ECC–Random Number Generator (RNG)1.3.5 Development Support• SDK Firmware for fast on-line programming• Open source toolchains based on GCCNote:For more information, please refer to Learning Resources.1.4 Application• Generic low power IoT sensor hub• Generic low power IoT loggers• Video streaming from camera• Over The Top (OTT) devices• Music players–Internet music players–Audio streaming devices• Wi-Fi enabled toys–Loggers–Proximity sensing toys• Wi-Fi enabled speech recognition devices• Audio headsets• Smart power plugs• Home automation• Mesh networkEspressif Systems 4 ESP32 Datasheet V1.6
1. OVERVIEW• Industrial wireless control• Baby monitors• Wearable electronics• Wi-Fi location-aware devices• Security ID tags• Healthcare–Proximity and movement-monitoring trigger devices–Temperature sensing loggers1.5 Block DiagramCore and memoryROMCryptographic hardware accelerationAESSHA RSARTCULP coprocesserRecovery memoryPMUBluetooth link controllerBluetooth basebandWi-Fi MAC Wi-Fi basebandSPI2 or 1 x Xtensa® 32-bit LX6 Microprocessors RF receiveRF transmitSwitchBalunI2CI2SSDIOUARTCANETHIRPWMTemperature sensorTouch sensorDACADCClock generatorRNGSRAMEmbedded FlashFigure 1: Function Block DiagramNote:Products in the ESP32 series differ from each other in terms of their support for embedded flash and the number of CPUsthey have. For details, please refer to Part Number and Ordering Information.Espressif Systems 5 ESP32 Datasheet V1.6
2. PIN DEFINITIONS2. Pin Definitions2.1 Pin Layout32K_XP 12VDET_2 1110987654321VDET_1CHIP_PUSENSOR_VNSENSOR_CAPNSENSOR_CAPPSENSOR_VPVDD3P3VDD3P3LNA_INVDDA252627282930313233343536GPIO16VDD_SDIOGPIO5VDD3P3_CPU37GPIO193839404142434445464748GPIO22U0RXDU0TXDGPIO21XTAL_NXTAL_PVDDACAP2CAP1GPIO224MTDO2322212019181716151413MTCKVDD3P3_RTCMTDIMTMSGPIO27GPIO26GPIO2532K_XNESP32SD_DATA_2SD_DATA_3SD_CMDSD_CLKSD_DATA_0SD_DATA_1GPIO4GPIO0GPIO23GPIO18VDDAGPIO1749 GNDFigure 2: ESP32 Pin Layout (for QFN 6*6)Espressif Systems 6 ESP32 Datasheet V1.6
2. PIN DEFINITIONS10987654321VDET_1CHIP_PUSENSOR_VNSENSOR_CAPNSENSOR_CAPPSENSOR_VPVDD3P3VDD3P3LNA_INVDDA25262728293031323334GPIO16VDD_SDIOGPIO5VDD3P3_CPUGPIO1939404142434445464748GPIO22U0RXDU0TXDGPIO21XTAL_NXTAL_PVDDACAP2CAP1GPIO224MTDO232221201918171615MTCKVDD3P3_RTCMTDIMTMSGPIO27GPIO26GPIO2532K_XNESP3249 GNDSD_DATA_2SD_DATA_3SD_CMDSD_CLKSD_DATA_0SD_DATA_1GPIO4GPIO0VDDAGPIO1732K_XPVDET_2GPIO18GPIO231112131435363738Figure 3: ESP32 Pin Layout (for QFN 5*5)Note:For details on ESP32’s part number and the corresponding packaging, please refer to Part Number and Ordering Infor-mation.2.2 Pin DescriptionTable 2: Pin DescriptionName No. Type FunctionAnalogVDDA 1 P Analog power supply (2.3V ~3.6V)LNA_IN 2 I/O RF input and outputVDD3P3 3 P Amplifier power supply (2.3V ~3.6V)VDD3P3 4 P Amplifier power supply (2.3V ~3.6V)VDD3P3_RTCSENSOR_VP 5 IGPIO36, ADC_PRE_AMP, ADC1_CH0, RTC_GPIO0Note: Connects 270 pF capacitor from SENSOR_VP to SEN-SOR_CAPP when used as ADC_PRE_AMP.Espressif Systems 7 ESP32 Datasheet V1.6
2. PIN DEFINITIONSName No. Type FunctionSENSOR_CAPP 6 IGPIO37, ADC_PRE_AMP, ADC1_CH1, RTC_GPIO1Note: Connects 270 pF capacitor from SENSOR_VP to SEN-SOR_CAPP when used as ADC_PRE_AMP.SENSOR_CAPN 7 IGPIO38, ADC1_CH2, ADC_PRE_AMP, RTC_GPIO2Note: Connects 270 pF capacitor from SENSOR_VN to SEN-SOR_CAPN when used as ADC_PRE_AMP.SENSOR_VN 8 IGPIO39, ADC1_CH3, ADC_PRE_AMP, RTC_GPIO3Note: Connects 270 pF capacitor from SENSOR_VN to SEN-SOR_CAPN when used as ADC_PRE_AMP.CHIP_PU 9 IChip Enable (Active High)High: On, chip works properlyLow: Off, chip works at the minimum powerNote: Do not leave CHIP_PU pin floatingVDET_1 10 I GPIO34, ADC1_CH6, RTC_GPIO4VDET_2 11 I GPIO35, ADC1_CH7, RTC_GPIO532K_XP 12 I/O GPIO32, 32K_XP (32.768 kHz crystal oscillator input),ADC1_CH4, TOUCH9, RTC_GPIO932K_XN 13 I/O GPIO33, 32K_XN (32.768 kHz crystal oscillator output),ADC1_CH5, TOUCH8, RTC_GPIO8GPIO25 14 I/O GPIO25, DAC_1, ADC2_CH8, RTC_GPIO6, EMAC_RXD0GPIO26 15 I/O GPIO26, DAC_2, ADC2_CH9, RTC_GPIO7, EMAC_RXD1GPIO27 16 I/O GPIO27, ADC2_CH7, TOUCH7, RTC_GPIO17, EMAC_RX_DVMTMS 17 I/O GPIO14, ADC2_CH6, TOUCH6, RTC_GPIO16, MTMS, HSPI-CLK, HS2_CLK, SD_CLK, EMAC_TXD2MTDI 18 I/O GPIO12, ADC2_CH5, TOUCH5, RTC_GPIO15, MTDI, HSPIQ,HS2_DATA2, SD_DATA2, EMAC_TXD3VDD3P3_RTC 19 P power supply input for RTC IO (1.8V ~3.6V)MTCK 20 I/O GPIO13, ADC2_CH4, TOUCH4, RTC_GPIO14, MTCK, HSPID,HS2_DATA3, SD_DATA3, EMAC_RX_ERMTDO 21 I/O GPIO15, ADC2_CH3, TOUCH3, RTC_GPIO13, MTDO,HSPICS0, HS2_CMD, SD_CMD, EMAC_RXD3GPIO2 22 I/O GPIO2, ADC2_CH2, TOUCH2, RTC_GPIO12, HSPIWP,HS2_DATA0, SD_DATA0GPIO0 23 I/O GPIO0, ADC2_CH1, TOUCH1, RTC_GPIO11, CLK_OUT1,EMAC_TX_CLKGPIO4 24 I/O GPIO4, ADC2_CH0, TOUCH0, RTC_GPIO10, HSPIHD,HS2_DATA1, SD_DATA1, EMAC_TX_ERVDD_SDIOGPIO16 25 I/O GPIO16, HS1_DATA4, U2RXD, EMAC_CLK_OUTVDD_SDIO 26 P output power supply: 1.8V or the value of VDD3P3_RTCGPIO17 27 I/O GPIO17, HS1_DATA5, U2TXD, EMAC_CLK_OUT_180SD_DATA_2 28 I/O GPIO9, SD_DATA2, SPIHD, HS1_DATA2, U1RXDSD_DATA_3 29 I/O GPIO10, SD_DATA3, SPIWP, HS1_DATA3, U1TXDSD_CMD 30 I/O GPIO11, SD_CMD, SPICS0, HS1_CMD, U1RTSSD_CLK 31 I/O GPIO6, SD_CLK, SPICLK, HS1_CLK, U1CTSEspressif Systems 8 ESP32 Datasheet V1.6
2. PIN DEFINITIONSName No. Type FunctionSD_DATA_0 32 I/O GPIO7, SD_DATA0, SPIQ, HS1_DATA0, U2RTSSD_DATA_1 33 I/O GPIO8, SD_DATA1, SPID, HS1_DATA1, U2CTSVDD3P3_CPUGPIO5 34 I/O GPIO5, VSPICS0, HS1_DATA6, EMAC_RX_CLKGPIO18 35 I/O GPIO18, VSPICLK, HS1_DATA7GPIO23 36 I/O GPIO23, VSPID, HS1_STROBEVDD3P3_CPU 37 P input power supply for CPU IO (1.8V ~3.6V)GPIO19 38 I/O GPIO19, VSPIQ, U0CTS, EMAC_TXD0GPIO22 39 I/O GPIO22, VSPIWP, U0RTS, EMAC_TXD1U0RXD 40 I/O GPIO3, U0RXD, CLK_OUT2U0TXD 41 I/O GPIO1, U0TXD, CLK_OUT3, EMAC_RXD2GPIO21 42 I/O GPIO21, VSPIHD, EMAC_TX_ENAnalogVDDA 43 P Analog power supply (2.3V ~3.6V)XTAL_N 44 O External crystal outputXTAL_P 45 I External crystal inputVDDA 46 P Digital power supply for PLL (2.3V ~3.6V)CAP2 47 I Connects with a 3 nF capacitor and 20 kΩresistor in parallel toCAP1CAP1 48 I Connects with a 10 nF series capacitor to groundGND 49 P GroundNote:• ESP32-D2WD’s pins GPIO16, GPIO17, SD_CMD, SD_CLK, SD_DATA_0 and SD_DATA_1 are used for connectingthe embedded flash, and are not recommended for other uses.• For a quick reference guide of the IO MUX, Ethernet MAC, and GIPO Matrix pins of ESP32, please refer to AppendixESP32 Pin Lists.2.3 Power SchemeESP32 digital pins are divided into three different power domains:• VDD3P3_RTC• VDD3P3_CPU• VDD_SDIOVDD3P3_RTC is also the input power supply for RTC and CPU.VDD3P3_CPU is also the input power supply for CPU.VDD_SDIO connects to the output of an internal LDO, whose input is VDD3P3_RTC. When VDD_SDIO is con-nected to the same PCB net together with VDD3P3_RTC; the internal LDO is disabled automatically.The internal LDO can be configured as 1.8V, or the same voltage as VDD3P3_RTC. It can be powered off viasoftware to minimize the current of flash/SRAM during the Deep-sleep mode.Espressif Systems 9 ESP32 Datasheet V1.6
2. PIN DEFINITIONSNote:• CHIP_PU mst be activated after the 3.3V rails have been brought up. The recommended delay time (T) is givenby the parameter of the RC circuit. For reference design, please refer to Figure ESP-WROOM-32 PeripheralSchematics in the ESP-WROOM-32 Datasheet.• CHIP_PU is used to reset the chip. The input level should be below 0.6V and stays for at least 200 µs.• The operating voltage for ESP32 ranges from 2.3V to 3.6V. When using a single power supply, the recommendedvoltage of the power supply is 3.3V, and its recommended output current is 500 mA or more.2.4 Strapping PinsESP32 has five strapping pins:• MTDI/GPIO12: internal pull-down• GPIO0: internal pull-up• GPIO2: internal pull-down• MTDO/GPIO15: internal pull-up• GPIO5: internal pull-upSoftware can read the value of these five bits from the register ”GPIO_STRAPPING”.During the chip power-on reset, the latches of the strapping pins sample the voltage level as strapping bits of ”0”or ”1”, and hold these bits until the chip is powered down or shut down. The strapping bits configure the deviceboot mode, the operating voltage of VDD_SDIO and other system initial settings.Each strapping pin is connected with its internal pull-up/pull-down during the chip reset. Consequently, if a strap-ping pin is unconnected or the connected external circuit is high-impendence, the internal weak pull-up/pull-downwill determine the default input level of the strapping pins.To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or apply the hostMCU’s GPIOs to control the voltage level of these pins when powering on ESP32.After reset, the strapping pins work as the normal functions pins.Refer to Table 3for detailed boot modes configuration by strapping pins.Table 3: Strapping PinsVoltage of Internal LDO (VDD_SDIO)Pin Default 3.3V 1.8VMTDI Pull-down 0 1Booting ModePin Default SPI Boot Download BootGPIO0 Pull-up 1 0GPIO2 Pull-down Don’t-care 0Debugging Log on U0TXD During BootingPin Default U0TXD Toggling U0TXD SilentMTDO Pull-up 1 0Timing of SDIO SlaveEspressif Systems 10 ESP32 Datasheet V1.6
2. PIN DEFINITIONSPin Default Falling-edge InputFalling-edge OutputFalling-edge InputRising-edge OutputRising-edge InputFalling-edge OutputRising-edge InputRising-edge OutputMTDO Pull-up 0 0 1 1GPIO5 Pull-up 0 1 0 1Note:• Firmware can configure register bits to change the setting of ”Voltage of Internal LDO (VDD_SDIO)” and ”Timing ofSDIO Slave” after booting.• The embedded flash operates at 1.8V. For the ESP32 series of chips that contain embedded flash, the MTDI/G-PIO12 should be pulled high.Espressif Systems 11 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTION3. Functional DescriptionThis chapter describes the functions integrated in ESP32.3.1 CPU and Memory3.1.1 CPUESP32 contains one/two low-power Xtensa®32-bit LX6 microprocessor(s) with the following features:• 7-stage pipeline to support the clock frequency of up to 240 MHz• 16/24-bit Instruction Set provides high code-density• Support Floating Point Unit• Support DSP instructions, such as 32-bit Multiplier, 32-bit Divider, and 40-bit MAC• Support 32 interrupt vectors from about 70 interrupt sourcesThe single-/dual-CPU interfaces include:• Xtensa RAM/ROM Interface for instruction and data• Xtensa Local Memory Interface for fast peripheral register access• Interrupt with external and internal sources• JTAG interface for debugging3.1.2 Internal MemoryESP32’s internal memory includes:• 448 KB ROM for booting and core functions• 520 KB on-chip SRAM for data and instruction• 8 KB SRAM in RTC, which is called RTC SLOW Memory and can be used for co-processor accessing duringthe Deep-sleep mode• 8 KB SRAM in RTC, which is called RTC FAST Memory and can be used for data storage and the main CPUduring RTC Boot from the Deep-sleep mode• 1 kbit of eFuse, of which 256 bits are used for the system (MAC address and chip configuration) and theremaining 768 bits are reserved for customer applications, including Flash-Encryption and Chip-ID• Embedded flashNote:• Products in the ESP32 series differ from each other in terms of their support for embedded flash and the size ofthe embedded flash. For details, please refer to Part Number and Ordering Information.• From the ESP32 series of chips specified in this document, ESP32-D2WD has 16 Mbits of embedded flash, con-nected via pins GPIO16, GPIO17, SD_CMD, SD_CLK, SD_DATA_0 and SD_DATA_1. The other chips in the ESP32series have no embedded flash.Espressif Systems 12 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTION3.1.3 External Flash and SRAMESP32 supports up to four 16-MB external QSPI flash and SRAM with hardware encryption based on AES toprotect developer’s programs and data.ESP32 can access the external QSPI flash and SRAM through high-speed caches.• Up to 16 MB of external flash are memory-mapped onto the CPU code space, supporting 8-bit, 16-bit and32-bit access. Code execution is supported.• Up to 8 MB of external flash/SRAM memory are mapped onto the CPU data space, supporting 8-bit, 16-bitand 32-bit access. Data-read is supported on the flash and SRAM. Data-write is supported on the SRAM.Note:ESP32 chips with embedded flash do not support the address mapping between external flash and peripherals.3.1.4 Memory MapThe structure of address mapping is shown in Figure 4. The memory and peripherals mapping of ESP32 is shownin Table 4.Figure 4: Address Mapping StructureEspressif Systems 13 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTIONTable 4: Memory and Peripheral MappingCategory Target Start Address End Address SizeEmbeddedMemoryInternal ROM 0 0x4000_0000 0x4005_FFFF 384 KBInternal ROM 1 0x3FF9_0000 0x3FF9_FFFF 64 KBInternal SRAM 0 0x4007_0000 0x4009_FFFF 192 KBInternal SRAM 1 0x3FFE_0000 0x3FFF_FFFF 128 KB0x400A_0000 0x400B_FFFFInternal SRAM 2 0x3FFA_E000 0x3FFD_FFFF 200 KBRTC FAST Memory 0x3FF8_0000 0x3FF8_1FFF 8 KB0x400C_0000 0x400C_1FFFRTC SLOW Memory 0x5000_0000 0x5000_1FFF 8 KBExternalMemoryExternal Flash0x3F40_0000 0x3F7F_FFFF 4 MB0x400C_2000 0x40BF_FFFF 11 MB248 KBExternal SRAM 0x3F80_0000 0x3FBF_FFFF 4 MBPeripheralDPort Register 0x3FF0_0000 0x3FF0_0FFF 4 KBAES Accelerator 0x3FF0_1000 0x3FF0_1FFF 4 KBRSA Accelerator 0x3FF0_2000 0x3FF0_2FFF 4 KBSHA Accelerator 0x3FF0_3000 0x3FF0_3FFF 4 KBSecure Boot 0x3FF0_4000 0x3FF0_4FFF 4 KBCache MMU Table 0x3FF1_0000 0x3FF1_3FFF 16 KBPID Controller 0x3FF1_F000 0x3FF1_FFFF 4 KBUART0 0x3FF4_0000 0x3FF4_0FFF 4 KBSPI1 0x3FF4_2000 0x3FF4_2FFF 4 KBSPI0 0x3FF4_3000 0x3FF4_3FFF 4 KBGPIO 0x3FF4_4000 0x3FF4_4FFF 4 KBRTC 0x3FF4_8000 0x3FF4_8FFF 4 KBIO MUX 0x3FF4_9000 0x3FF4_9FFF 4 KBSDIO Slave 0x3FF4_B000 0x3FF4_BFFF 4 KBUDMA1 0x3FF4_C000 0x3FF4_CFFF 4 KBI2S0 0x3FF4_F000 0x3FF4_FFFF 4 KBUART1 0x3FF5_0000 0x3FF5_0FFF 4 KBI2C0 0x3FF5_3000 0x3FF5_3FFF 4 KBUDMA0 0x3FF5_4000 0x3FF5_4FFF 4 KBSDIO Slave 0x3FF5_5000 0x3FF5_5FFF 4 KBRMT 0x3FF5_6000 0x3FF5_6FFF 4 KBPCNT 0x3FF5_7000 0x3FF5_7FFF 4 KBSDIO Slave 0x3FF5_8000 0x3FF5_8FFF 4 KBLED PWM 0x3FF5_9000 0x3FF5_9FFF 4 KBEfuse Controller 0x3FF5_A000 0x3FF5_AFFF 4 KBFlash Encryption 0x3FF5_B000 0x3FF5_BFFF 4 KBPWM0 0x3FF5_E000 0x3FF5_EFFF 4 KBTIMG0 0x3FF5_F000 0x3FF5_FFFF 4 KBTIMG1 0x3FF6_0000 0x3FF6_0FFF 4 KBEspressif Systems 14 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTIONCategory Target Start Address End Address SizePeripheralSPI2 0x3FF6_4000 0x3FF6_4FFF 4 KBSPI3 0x3FF6_5000 0x3FF6_5FFF 4 KBSYSCON 0x3FF6_6000 0x3FF6_6FFF 4 KBI2C1 0x3FF6_7000 0x3FF6_7FFF 4 KBSDMMC 0x3FF6_8000 0x3FF6_8FFF 4 KBEMAC 0x3FF6_9000 0x3FF6_AFFF 8 KBPWM1 0x3FF6_C000 0x3FF6_CFFF 4 KBI2S1 0x3FF6_D000 0x3FF6_DFFF 4 KBUART2 0x3FF6_E000 0x3FF6_EFFF 4 KBPWM2 0x3FF6_F000 0x3FF6_FFFF 4 KBPWM3 0x3FF7_0000 0x3FF7_0FFF 4 KBRNG 0x3FF7_5000 0x3FF7_5FFF 4 KB3.2 Timers and Watchdogs3.2.1 64-bit TimersThere are four general-purpose timers embedded in the ESP32. They are all 64-bit generic timers which are basedon 16-bit prescalers and 64-bit auto-reload-capable up/downcounters.The timers feature:• A 16-bit clock prescaler, from 2 to 65536• A 64-bit time-base counter• Configurable up/down time-base counter: incrementing or decrmenting• Halt and resume of time-base counter• Auto-reload at alarming• Software-controlled instant reload• Level and edge interrupt generation3.2.2 Watchdog TimersThe ESP32 has three watchdog timers: one in each of the two timer modules (called the Main Watchdog Timer,or MWDT) and one in the RTC module (called the RTC Watchdog Timer, or RWDT). These watchdog timers areintended to recover from an unforeseen fault, causing the application program to abandon its normal sequence. Awatchdog timer has 4 stages. Each stage may take one of three or four actions upon the expiry of a programmedtime period for this stage unless the watchdog is fed or disabled. The actions are: interrupt, CPU reset, and corereset, and system reset. Only the RWDT can trigger the system reset, and is able to reset the entire chip, includingthe RTC itself. A timeout value can be set for each stage individually.During flash boot the RWDT and the first MWDT start automatically in order to detect and recover from bootingproblems.The ESP32 watchdogs have the following features:• 4 stages, each of which can be configured or disabled separatelyEspressif Systems 15 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTION• Programmable time period for each stage• One of three or four possible actions (interrupt, CPU reset, core reset, and system reset) upon the expiry ofeach stage• 32-bit expiry counter• Write protection, to prevent the RWDT and MWDT configuration from being inadvertently altered• SPI flash boot protectionIf the boot process from an SPI flash does not complete within a predetermined time period, the watchdogwill reboot the entire system.3.3 System Clocks3.3.1 CPU ClockUpon reset, an external crystal clock source is selected as the default CPU clock. The external crystal clock sourcealso connects to a PLL to generate a high frequency clock (typically 160 MHz).In addition, ESP32 has an internal 8 MHz oscillator. The accuracy of the oscillator is guaranteed by design and isstable within the operating temperatures (with a margin error of 1%). Hence, the application can then select theclock source from the external crystal clock source, the PLL clock or the internal 8 MHz oscillator. The selectedclock source drives the CPU clock, directly or after division, depending on the application.3.3.2 RTC ClockThe RTC clock has five possible sources:• external low speed (32 kHz) crystal clock• external crystal clock divided by 4• internal RC oscillator (typically about 150 kHz and adjustable)• internal 8 MHz oscillator• internal 31.25 kHz clock (derived from the internal 8 MHz oscillator divided by 256)When the chip is in the normal power mode and needs faster CPU accessing, the application can choose theexternal high speed crystal clock divided by 4 or the internal 8 MHz oscillator. When the chip operates in the lowpower mode, the application chooses the external low speed (32 kHz) crystal clock, the internal RC clock or theinternal 31.25 kHz clock.3.3.3 Audio PLL ClockThe audio clock is generated by the ultra-low-noise fractional-N PLL. The output frequency of the audio PLL isprogrammable, from 16 MHz to 128 MHz, and is given by the following formula:fout =fxtal(sdm2 +sdm128+sdm0216 + 4)2(odiv + 2)where fout is the output frequency, fxtal is the frequency of the crystal oscillator, and sdm2, sdm1, sdm0 and odivare all integer values, configurable by registers.Espressif Systems 16 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTION3.4 RadioThe ESP32 radio consists of the following main blocks:• 2.4 GHz receiver• 2.4 GHz transmitter• bias and regulators• balun and transmit-receive switch• clock generator3.4.1 2.4 GHz ReceiverThe 2.4 GHz receiver down-converts the 2.4 GHz RF signal to quadrature baseband signals and converts themto the digital domain with 2 high-resolution, high-speed ADCs. To adapt to varying signal channel conditions,RF filters, Automatic Gain Control (AGC), DC offset cancellation circuits and baseband filters are integrated withinESP32.3.4.2 2.4 GHz TransmitterThe 2.4 GHz transmitter up-converts the quadrature baseband signals to the 2.4 GHz RF signal, and drives theantenna with a high powered Complementary Metal Oxide Semiconductor (CMOS) power amplifier. The use ofdigital calibration further improves the linearity of the power amplifier, enabling state-of-the-art performance ofdelivering +20.5 dBm of average power for 802.11b transmission and +17 dBm for 802.11n transmission.Additional calibrations are integrated to cancel any imperfections of the radio, such as:• Carrier leakage• I/Q phase matching• Baseband nonlinearities• RF nonlinearities• Antenna matchingThese built-in calibration routines reduce the amount of time and required for product test and render test equip-ment unnecessary.3.4.3 Clock GeneratorThe clock generator generates quadrature 2.4 GHz clock signals for the receiver and transmitter. All componentsof the clock generator are integrated on the chip, including all inductors, varactors, filters, regulators and dividers.The clock generator has built-in calibration and self test circuits. Quadrature clock phases and phase noise areoptimized on-chip with patented calibration algorithms to ensure the best performance of the receiver and trans-mitter.3.5 Wi-FiESP32 implements TCP/IP, full 802.11 b/g/n/e/i WLAN MAC protocol, and Wi-Fi Direct specification. It supportsBasic Service Set (BSS) STA and SoftAP operations under the Distributed Control Function (DCF) and P2P groupoperation compliant with the latest Wi-Fi P2P protocol.Espressif Systems 17 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTIONPassive or active scanning, as well as the P2P discovery procedure are performed autonomously when initiatedby appropriate commands. Power management is handled with minimum host interaction to minimize active dutyperiod.3.5.1 Wi-Fi Radio and BasebandThe ESP32 Wi-Fi Radio and Baseband support the following features:• 802.11b and 802.11g data-rates• 802.11n MCS0-7 in both 20 MHz and 40 MHz bandwidth• 802.11n MCS32• 802.11n 0.4 µs guard-interval• up to 150 Mbps of data-rate• Receiving STBC 2x1• Up to 21 dBm of transmitting power• Adjustable transmitting power• Antenna diversity and selection (software-managed hardware)3.5.2 Wi-Fi MACThe ESP32 Wi-Fi MAC applies low level protocol functions automatically, as follows:• Request To Send (RTS), Clear To Send (CTS) and Acknowledgement (ACK/BA)• Fragmentation and defragmentation• Aggregation AMPDU and AMSDU• WMM, U-APSD• 802.11 e: QoS for wireless multimedia technology• CCMP (CBC-MAC, counter mode), TKIP (MIC, RC4), WAPI (SMS4), WEP (RC4) and CRC• Frame encapsulation (802.11h/RFC 1042)• Automatic beacon monitoring/scanning3.5.3 Wi-Fi FirmwareThe ESP32 Wi-Fi Firmware provides the following functions:• Infrastructure BSS Station mode / P2P mode / softAP mode support• P2P Discovery, P2P Group Owner, P2P Group Client and P2P Power Management• WPA/WPA2-Enterprise and WPS driver• Additional 802.11i security features such as pre-authentication and TSN• Open interface for various upper layer authentication schemes over EAP such as TLS, PEAP, LEAP, SIM,AKA or customer specific• Clock/power gating combined with 802.11-compliant power management dynamically adapted to currentconnection condition providing minimal power consumptionEspressif Systems 18 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTION• Adaptive rate fallback algorithm sets the optimal transmission rate and transmits power based on actualSignal Noise Ratio (SNR) and packet loss information• Automatic retransmission and response on MAC to avoid packet discarding on slow host environment3.5.4 Packet Traffic Arbitration (PTA)ESP32 has a configurable Packet Traffic Arbitration (PTA) that provides flexible and exact timing Bluetooth co-existence support. It is a combination of both Frequency Division Multiplexing (FDM) and Time Division Multiplexing(TDM), and coordinates the protocol stacks.• It is preferable that Wi-Fi works in the 20 MHz bandwidth mode to decrease its interference with BT.• BT applies AFH (Adaptive Frequency Hopping) to avoid using the channels within Wi-Fi bandwidth.• Wi-Fi MAC limits the time duration of Wi-Fi packets, and does not transmit the long Wi-Fi packets by thelowest data-rates.• Normally BT packets are of higher priority than normal Wi-Fi packets.• Protect the critical Wi-Fi packets, including beacon transmission and receiving, ACK/BA transmission andreceiving.• Protect the highest BT packets, including inquiry response, page response, LMP data and response, parkbeacons, the last poll period, SCO/eSCO slots, and BLE event sequence.• Wi-Fi MAC applies CTS-to-self packet to protect the time duration of BT transfer.• In the P2P Group Own (GO) mode, Wi-Fi MAC applies a Notice of Absence (NoA) packet to disable Wi-Fitransfer to reserve time for BT.• In the STA mode, Wi-Fi MAC applies a NULL packet with the Power-Save bit to disable Wi-Fi transfer toreserve time for BT.3.6 BluetoothESP32 integrates Bluetooth link controller and Bluetooth baseband, which carry out the baseband protocols andother low-level link routines, such as modulation/demodulation, packets processing, bit stream processing, fre-quency hopping, etc.3.6.1 Bluetooth Radio and BasebandThe ESP32 Bluetooth Radio and Baseband support the following features:• Class-1, class-2 and class-3 transmit output powers and over 30 dB dynamic control range•π/4 DQPSK and 8 DPSK modulation• High performance in NZIF receiver sensitivity with over 98 dB dynamic range• Class-1 operation without external PA• Internal SRAM allows full speed data transfer, mixed voice and data, and full piconet operation• Logic for forward error correction, header error control, access code correlation, CRC, demodulation, en-cryption bit stream generation, whitening and transmit pulse shaping• ACL, SCO, eSCO and AFH• A-law, µ-law and CVSD digital audio CODEC in PCM interfaceEspressif Systems 19 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTION• SBC audio CODEC• Power management for low power applications• SMP with 128-bit AES3.6.2 Bluetooth Interface• Provides UART HCI interface, up to 4 Mbps• Provides SDIO / SPI HCI interface• Provides I2C interface for the host to do configuration• Provides PCM / I2S audio interface3.6.3 Bluetooth StackThe Bluetooth stack of ESP32 is compliant with Bluetooth v4.2 BR / EDR and BLE specification.3.6.4 Bluetooth Link ControllerThe link controller operates in three major states: standby, connection and sniff. It enables multi connection andother operations like inquiry, page, and secure simple pairing, and therefore enables Piconet and Scatternet. Beloware the features:• Classic Bluetooth–Device Discovery (inquiry and inquiry scan)–Connection establishment (page and page scan)–Multi connections–Asynchronous data reception and transmission–Synchronous links (SCO/eSCO)–Master/Slave Switch–Adaptive Frequency Hopping and Channel assessment–Broadcast encryption–Authentication and encryption–Secure Simple Pairing–Multi-point and scatternet management–Sniff mode–Connectionless Slave Broadcast (transmitter and receiver)–Enhanced power control–Ping• Bluetooth Low Energy–Advertising–Scanning–Multiple connectionsEspressif Systems 20 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTION–Asynchronous data reception and transmission–Adaptive Frequency Hopping and Channel assessment–Connection parameter update–Date Length Extension–Link Layer Encryption–LE Ping3.7 RTC and Low-Power ManagementWith the advanced power management technologies, ESP32 can switch between different power modes (seeTable 5).• Power mode–Active mode: The chip radio is powered on. The chip can receive, transmit, or listen.–Modem-sleep mode: The CPU is operational and the clock is configurable. The Wi-Fi/Bluetooth base-band and radio are disabled.–Light-sleep mode: The CPU is paused. The RTC memory and RTC peripherals, as well as the ULP-coprocessor are running. Any wake-up events (MAC, host, RTC timer, or external interrupts) will wakeup the chip.–Deep-sleep mode: Only RTC memory and RTC peripherals are powered on. Wi-Fi and Bluetooth con-nection data are stored in RTC memory. The ULP-coprocessor can work.–Hibernation mode: The internal 8-MHz oscillator and ULP-coprocessor are disabled. The RTC recoverymemory is powered down. Only one RTC timer on the slow clock and some RTC GPIOs are active. TheRTC timer or the RTC GPIOs can wake up the chip from the Hibernation mode.• Sleep Pattern–Association sleep pattern: The power mode switches between the Active mode, Modem- and Light-sleep mode during this sleep pattern. The CPU, Wi-Fi, Bluetooth, and radio are woken up at predeter-mined intervals to keep Wi-Fi/BT connections alive.–ULP sensor-monitored pattern: The main CPU is in the Deep-sleep mode. The ULP co-processor doessensor measurements and wakes up the main system, based on the measured data from sensors.Table 5: Functionalities Depending on the Power ModesPower mode Active Modem-sleep Light-sleep Deep-sleep HibernationSleep pattern Association sleep pattern ULP sensor-monitored pattern -CPU ON ON PAUSE OFF OFFWi-Fi/BT base-band and radio ON OFF OFF OFF OFFRTC memory andRTC peripherals ON ON ON ON OFFULP co-processor ON ON ON ON/OFF OFFEspressif Systems 21 ESP32 Datasheet V1.6
3. FUNCTIONAL DESCRIPTIONThe power consumption varies with different power modes/sleep patterns, and work status, of functional modules.Please see Table 6for details.Table 6: Power Consumption by Power ModesPower mode Description Power consumptionActive (RF working)Wi-Fi Tx packet 13 dBm ~21 dBm 160 ~260 mAWi-Fi / BT Tx packet 0 dBm 120 mAWi-Fi / BT Rx and listening 80 ~90 mAAssociation sleep pattern (by Light-sleep) 0.9 mA@DTIM3, 1.2 mA@DTIM1Modem-sleep The CPU is powered on.Max speed: 20 mANormal speed: 5 ~10 mASlow speed: 3 mALight-sleep - 0.8 mADeep-sleepThe ULP co-processor is powered on. 0.15 mAULP sensor-monitored pattern 25 µA @1% dutyRTC timer + RTC memory 10 µAHibernation RTC timer only 5 µAPower off CHIP_PU is set to low level, the chip is powered off <0.1 µANote:For more information about RF power consumption, refer to Section 5.2 RF Power Consumption Specifications.Espressif Systems 22 ESP32 Datasheet V1.6
4. PERIPHERALS AND SENSORS4. Peripherals and Sensors4.1 General Purpose Input / Output Interface (GPIO)ESP32 has 34 GPIO pins which can be assigned to various functions by programming the appropriate registers.There are several kinds of GPIOs: digital only GPIOs, analog enabled GPIOs, capacitive touch enabled GPIOs, etc.Analog enabled GPIOs can be configured as digital GPIOs. Capacitive touch enabled GPIOs can be configuredas digital GPIOs.Each digital enabled GPIO can be configured to internal pull-up or pull-down, or set to high impedance. Whenconfigured as an input, the input value can be read through the register. The input can also be set to edge-triggeror level-trigger to generate CPU interrupts. In short, the digital IO pins are bi-directional, non-inverting and tristate,including input and output buffer with tristate control. These pins can be multiplexed with other functions, such asthe SDIO interface, UART, SI, etc. For low power operations, the GPIOs can be set to hold their states.4.2 Analog-to-Digital Converter (ADC)ESP32 integrates 12-bit SAR ADCs and supports measurements on 18 channels (analog enabled pins). Someof these pins can be used to build a programmable gain amplifier which is used for the measurement of smallanalog signals. The ULP-coprocessor in ESP32 is also designed to measure the voltages while operating in thesleep mode, to enable low power consumption; the CPU can be woken up by a threshold setting and/or via othertriggers.With the appropriate setting, the ADCs and the amplifier can be configured to measure voltages for a maximum of18 pins.4.3 Ultra-Low-Noise Analog Pre-AmplifierESP32 integrates an ultra-low-noise analog pre-amplifier that outputs to the ADC. The amplification ratio is givenby the size of a pair of sampling capacitors that are placed off-chip. By using a larger capacitor, the samplingnoise is reduced, but the settling time will be increased. The amplification ratio is also limited by the amplifier whichpeaks at about 60 dB gain.4.4 Hall SensorESP32 integrates a Hall sensor based on an N-carrier resistor. When the chip is in the magnetic field, the Hallsensor develops a small voltage laterally on the resistor, which can be directly measured by the ADC, or amplifiedby the ultra-low-noise analog pre-amplifier and then measured by the ADC.4.5 Digital-to-Analog Converter (DAC)Two 8-bit DAC channels can be used to convert two digital signals into two analog voltage signal outputs. Thedesign structure is composed of integrated resistor strings and a buffer. This dual DAC supports power supply asinput voltage reference and can drive other circuits. The dual channels support independent conversions.Espressif Systems 23 ESP32 Datasheet V1.6
4. PERIPHERALS AND SENSORS4.6 Temperature SensorThe temperature sensor generates a voltage that varies with temperature. The voltage is internally converted viaan analog-to-digital converter into a digital code.The temperature sensor has a range of -40°C to 125°C. As the offset of the temperature sensor varies fromchip to chip due to process variation, together with the heat generated by the Wi-Fi circuitry itself (which affectsmeasurements), the internal temperature sensor is only suitable for applications that detect temperature changesinstead of absolute temperatures and for calibration purposes as well.However, if the user calibrates the temperature sensor and uses the device in a minimally powered-on application,the results could be accurate enough.4.7 Touch SensorESP32 offers 10 capacitive sensing GPIOs which detect capacitive variations introduced by the GPIO’s direct con-tact or close proximity with a finger or other objects. The low noise nature of the design and high sensitivity of thecircuit allow relatively small pads to be used. Arrays of pads can also be used so that a larger area or more pointscan be detected. The 10 capacitive sensing GPIOs are listed in Table 7.Table 7: Capacitive Sensing GPIOs Available on ESP32Capacitive sensing signal name Pin nameT0 GPIO4T1 GPIO0T2 GPIO2T3 MTDOT4 MTCKT5 MTD1T6 MTMST7 GPIO27T8 32K_XNT9 32K_XPNote:For more information about the touch sensor design and layout, refer to Appendix A Touch Sensor.4.8 Ultra-Lower-Power CoprocessorThe ULP processor and RTC memory remains powered on during the Deep-sleep mode. Hence, the developercan store a program for the ULP processor in the RTC memory to access the peripheral devices, internal timersand internal sensors during the Deep-sleep mode. This is useful for designing applications where the CPU needsto be woken up by an external event, or timer, or a combination of these events, while maintaining minimal powerconsumption.Espressif Systems 24 ESP32 Datasheet V1.6
4. PERIPHERALS AND SENSORS4.9 Ethernet MAC InterfaceAn IEEE-802.3-2008-compliant Media Access Controller (MAC) is provided for Ethernet LAN communications.ESP32 requires an external physical interface device (PHY) to connect to the physical LAN bus (twisted-pair, fiber,etc.). The PHY is connected to ESP32 through 17 signals of MII or nine signals of RMII. With the Ethernet MAC(EMAC) interface, the following features are supported:• 10 Mbps and 100 Mbps rates• Dedicated DMA controller allowing high-speed transfer between the dedicated SRAM and Ethernet MAC• Tagged MAC frame (VLAN support)• Half-duplex (CSMA/CD) and full-duplex operation• MAC control sublayer (control frames)• 32-bit CRC generation and removal• Several address filtering modes for physical and multicast address (multicast and group addresses)• 32-bit status code for each transmitted or received frame• Internal FIFOs to buffer transmit and receive frames. The transmit FIFO and the receive FIFO are both 512words (32-bit)• Hardware PTP (precision time protocol) in accordance with IEEE 1588 2008 (PTP V2)• 25 MHz/50 MHz clock output4.10 SD/SDIO/MMC Host ControllerAn SD/SDIO/MMC host controller is available on ESP32 which supports the following features:• Secure Digital memory (SD mem Version 3.0 and Version 3.01)• Secure Digital I/O (SDIO Version 3.0)• Consumer Electronics Advanced Transport Architecture (CE-ATA Version 1.1)• Multimedia Cards (MMC Version 4.41, eMMC Version 4.5 and Version 4.51)The controller allows clock output at up to 80 MHz and in three different data-bus modes: 1-bit, 4-bit and 8-bit. Itsupports two SD/SDIO/MMC4.41 cards in 4-bit data-bus mode. It also supports one SD card operating at 1.8 Vlevel.4.11 SDIO/SPI Slave ControllerESP32 integrates an SD device interface that conforms to the industry-standard SDIO Card Specification Version2.0 and allows a host controller to access the SoC device using the SDIO bus interface and protocol. ESP32acts as the slave on the SDIO bus. The host can access SDIO interface registers directly and can access sharedmemory via a DMA engine, thus maximizing performance without engaging the processor cores.The SDIO/SPI slave controller supports the following features:• SPI, 1-bit SDIO, and 4-bit SDIO transfer modes over the full clock range of 0 to 50 MHz• Configurable sampling and driving clock edge• Special registers for direct access by hostEspressif Systems 25 ESP32 Datasheet V1.6
4. PERIPHERALS AND SENSORS• Interrupt to host for initiating data transfer• Allows card to interrupt host• Automatic loading of SDIO bus data and automatic discarding of padding data• Block size of up to 512 bytes• Interrupt vectors between the host and the slave to allow both to interrupt each other• Linked List DMA for data transfer4.12 Universal Asynchronous Receiver Transmitter (UART)ESP32 has three UART interfaces, i.e. UART0, UART1 and UART2, which provide asynchronous communication(RS232 and RS485) and IrDA support, and communicate at up to 5 Mbps. UART provides hardware managementof the CTS and RTS signals and software flow control (XON and XOFF). All of the interfaces can be accessed bythe DMA controller or directly by CPU.4.13 I2C InterfaceESP32 has two I2C bus interfaces which can serve as I2C master or slave depending on the user’s configuration.The I2C interfaces support:• Standard mode (100 kbit/s)• Fast mode (400 kbit/s)• Up to 5 MHz, but constrained by SDA pull up strength• 7-bit/10-bit addressing mode• Dual addressing modeUsers can program command registers to control I2C interfaces to have more flexibility.4.14 I2S InterfaceTwo standard I2S interfaces are available in ESP32. They can be operated in the master or slave mode, in fullduplex and half-duplex communication modes, and can be configured to operate with an 8-/16-/32-/40-/48-bitresolution as input or output channels. BCK clock frequency from 10 kHz up to 40 MHz are supported. When oneor both of the I2S interfaces are configured in the master mode, the master clock can be output to the externalDAC/CODEC.Both of the I2S interfaces have dedicated DMA controllers. PDM and BT PCM interfaces are supported.4.15 Infrared Remote ControllerThe infrared remote controller supports eight channels of infrared remote transmission and receiving. Throughprogramming the pulse waveform, it supports various infrared protocols. Eight channels share a 512 x 32-bitblock of memory to store the transmitting or receiving waveform.Espressif Systems 26 ESP32 Datasheet V1.6
4. PERIPHERALS AND SENSORS4.16 Pulse CounterThe pulse counter captures pulse and counts pulse edges through seven modes. It has 8 channels; each channelcaptures four signals at a time. The four input signals include two pulse signals and two control signals. When thecounter reaches a defined threshold, an interrupt is generated.4.17 Pulse Width Modulation (PWM)The Pulse Width Modulation (PWM) controller can be used for driving digital motors and smart lights. The controllerconsists of PWM timers, the PWM operator and a dedicated capture sub-module. Each timer provides timing insynchronous or independent form, and each PWM operator generates the waveform for one PWM channel. Thededicated capture sub-module can accurately capture external timing events.4.18 LED PWMThe LED PWM controller can generate 16 independent channels of digital waveforms with the configurable periodsand configurable duties.The 16 channels of digital waveforms operate at 80 MHz APB clock, among which 8 channels have the option ofusing the 8 MHz oscillator clock. Each channel can select a 20-bit timer with configurable counting range and itsaccuracy of duty can be up to 16 bits with the 1 ms period.The software can change the duty immediately. Moreover, each channel supports step-by-step duty increasing ordecreasing automatically. It is useful for the LED RGB color gradient generator.4.19 Serial Peripheral Interface (SPI)ESP32 features three SPIs (SPI, HSPI and VSPI) in slave and master modes in 1-line full-duplex and 1/2/4-linehalf-duplex communication modes. These SPIs also support the following general-purpose SPI features:• 4 timing modes of the SPI format transfer that depend on the polarity (POL) and the phase (PHA)• up to 80 MHz and the divided clocks of 80 MHz• up to 64-byte FIFOAll SPIs can also be used to connect to the external flash/SRAM and LCD. Each SPI can be served by DMAcontrollers.4.20 AcceleratorESP32 is equipped with hardware accelerators of general algorithms, such as AES (FIPS PUB 197), SHA (FIPSPUB 180-4), RSA, and ECC, which support independent arithmetic such as Big Integer Multiplication and BigInteger Modular Multiplication. The maximum operation length for RSA, ECC, Big Integer Multiply and Big IntegerModular Multiplication is 4096 bits.The hardware accelerators greatly improve operation speed and reduce software complexity. They also supportcode encryption and dynamic decryption�which ensures that codes in the flash will not be stolen.Espressif Systems 27 ESP32 Datasheet V1.6
5. ELECTRICAL CHARACTERISTICS5. Electrical CharacteristicsNote:The specifications in this chapter have been tested under the following general condition: VDD = 3.3V, TA= 27°C, unlessotherwise specified.5.1 Absolute Maximum RatingsTable 8: Absolute Maximum RatingsParameter Symbol Min Typ Max UnitPower supply VDD 2.3 3.3 3.6 VInput low voltage VIL -0.3 - 0.25×VIO VInput high voltage VIH 0.75×VIO - VIO +0.3 VInput leakage current IIL - - 50 nAOutput low voltage VOL - - 0.1×VIO VOutput high voltage VOH 0.8×VIO - - VInput pin capacitance Cpad - - 2 pFVDDIO VIO 1.8 3.3 3.6 VMaximum drive capability IMAX - - 40 mAStorage temperature range TST R -40 - 150 °COperating temperature range* TOP R -40 - 125 °C*Since the range of operating temperatures for the embedded flash on ESP32-D2WD is -40◦C~105◦C, the operating temper-atures for ESP32-D2WD extend from -40◦C to 105◦C. The other chips in this series have no embedded flash, and their rangeof operating temperatures is -40◦C~125◦C.5.2 RF Power Consumption SpecificationsThe power consumption measurements are conducted with 3.0V supply and 25°C ambient, at antenna port. Allthe transmitters’ measurements are based on 90% duty cycle and continuous transmit mode.Table 9: RF Power Consumption SpecificationsMode Min Typ Max UnitTransmit 802.11b, DSSS 1 Mbps, POUT = +19.5 dBm - 225 - mATransmit 802.11b, CCK 11 Mbps, POUT = +18.5 dBm - 205 - mATransmit 802.11g, OFDM 54 Mbps, POUT = +16 dBm - 160 - mATransmit 802.11n, MCS7, POUT = +14 dBm - 152 - mAReceive 802.11b, packet length = 1024 bytes, -80 dBm - 85 - mAReceive 802.11g, packet length = 1024 bytes, -70 dBm - 85 - mAReceive 802.11n, packet length = 1024 bytes, -65 dBm - 80 - mAReceive 802.11n HT40, packet length = 1024 bytes, -65 dBm - 80 - mAEspressif Systems 28 ESP32 Datasheet V1.6
5. ELECTRICAL CHARACTERISTICS5.3 Wi-Fi RadioTable 10: Wi-Fi Radio CharacteristicsDescription Min Typical Max UnitInput frequency 2412 - 2484 MHzOutput impedance - 30+j10 - ΩInput reflection - - -10 dBSensitivityOutput power of PA for 72.2 Mbps 15.5 16.5 17.5 dBmOutput power of PA for 11b mode 19.5 20.5 21.5 dBmDSSS, 1 Mbps - -98 - dBmCCK, 11 Mbps - -91 - dBmOFDM, 6 Mbps - -93 - dBmOFDM, 54 Mbps - -75 - dBmHT20, MCS0 - -93 - dBmHT20, MCS7 - -73 - dBmHT40, MCS0 - -90 - dBmHT40, MCS7 - -70 - dBmMCS32 - -89 - dBmAdjacent channel rejectionOFDM, 6 Mbps - 37 - dBOFDM, 54 Mbps - 21 - dBHT20, MCS0 - 37 - dBHT20, MCS7 - 20 - dB5.4 Bluetooth Radio5.4.1 Receiver–Basic Data RateTable 11: Receiver Characteristics–Basic Data RateParameter Conditions Min Typ Max UnitSensitivity @0.1% BER - - -98 - dBmMaximum received signal @0.1% BER - 0 - - dBmCo-channel C/I - - +7 - dBAdjacent channel selectivity C/IF = F0 + 1 MHz - - -6 dBF = F0 - 1 MHz - - -6 dBF = F0 + 2 MHz - - -25 dBF = F0 - 2 MHz - - -33 dBF = F0 + 3 MHz - - -25 dBF = F0 - 3 MHz - - -45 dBOut-of-band blocking performance30 MHz ~2000 MHz -10 - - dBm2000 MHz ~2400 MHz -27 - - dBm2500 MHz ~3000 MHz -27 - - dBm3000 MHz ~12.5 GHz -10 - - dBmIntermodulation - -36 - - dBmEspressif Systems 29 ESP32 Datasheet V1.6
5. ELECTRICAL CHARACTERISTICS5.4.2 Transmitter - Basic Data RateTable 12: Transmitter Characteristics–Basic Data RateParameter Conditions Min Typ Max UnitRF transmit power - - +4 +4 dBmRF power control range - - 25 - dB20 dB bandwidth - - 0.9 - MHzAdjacent channel transmit powerF = F0 + 1 MHz - -24 - dBmF = F0 - 1 MHz - -16.1 - dBmF = F0 + 2 MHz - -40.8 - dBmF = F0 - 2 MHz - -35.6 - dBmF = F0 + 3 MHz - -45.7 - dBmF = F0 - 3 MHz - -40.2 - dBmF = F0 + > 3 MHz - -45.6 - dBmF = F0 - > 3 MHz - -44.6 - dBm∆f1avg - - - 155 kHz∆f2max - 133.7 - - kHz∆f2avg/∆f1avg - - 0.92 - -ICFT - - -7 - kHzDrift rate - - 0.7 - kHz/50 µsDrift (1 slot packet) - - 6 - kHzDrift (5 slot packet) - - 6 - kHz5.4.3 Receiver–Enhanced Data RateTable 13: Receiver Characteristics–Enhanced Data RateParameter Conditions Min Typ Max Unitπ/4 DQPSKSensitivity @0.01% BER - - -98 - dBmMaximum received signal @0.1% BER - - 0 - dBmCo-channel C/I - - 11 - dBAdjacent channel selectivity C/IF = F0 + 1 MHz - -7 - dBF = F0 - 1 MHz - -7 - dBF = F0 + 2 MHz - -25 - dBF = F0 - 2 MHz - -35 - dBF = F0 + 3 MHz - -25 - dBF = F0 - 3 MHz - -45 - dB8DPSKSensitivity @0.01% BER - - -84 - dBmMaximum received signal @0.1% BER - 0 - - dBmC/I c-channel - - 18 - dBEspressif Systems 30 ESP32 Datasheet V1.6
5. ELECTRICAL CHARACTERISTICSParameter Conditions Min Typ Max UnitAdjacent channel selectivity C/IF = F0 + 1 MHz - 2 - dBF = F0 - 1 MHz - 2 - dBF = F0 + 2 MHz - -25 - dBF = F0 - 2 MHz - -25 - dBF = F0 + 3 MHz - -25 - dBF = F0 - 3 MHz - -38 - dB5.4.4 Transmitter–Enhanced Data RateTable 14: Transmitter Characteristics–Enhanced Data RateParameter Conditions Min Typ Max UnitMaximum RF transmit power - - +2 - dBmRelative transmit control - - -1.5 - dBπ/4 DQPSK max w0 - - -0.72 - kHzπ/4 DQPSK max wi - - -6 - kHzπ/4 DQPSK max |wi + w0| - - -7.42 - kHz8DPSK max w0 - - 0.7 - kHz8DPSK max wi - - -9.6 - kHz8DPSK max |wi + w0| - - -10 - kHzπ/4 DQPSK modulation accuracyRMS DEVM - 4.28 - %99% DEVM - - 30 %Peak DEVM - 13.3 - %8 DPSK modulation accuracyRMS DEVM - 5.8 - %99% DEVM - - 20 %Peak DEVM - 14 - %In-band spurious emissionsF = F0 + 1 MHz - -34 - dBmF = F0 - 1 MHz - -40.2 - dBmF = F0 + 2 MHz - -34 - dBmF = F0 - 2 MHz - -36 - dBmF = F0 + 3 MHz - -38 - dBmF = F0 - 3 MHz - -40.3 - dBmF = F0 +/- > 3 MHz - - -41.5 dBmEDR differential phase coding - - 100 - %5.5 Bluetooth LE Radio5.5.1 ReceiverTable 15: Receiver Characteristics–BLEParameter Conditions Min Typ Max UnitSensitivity @0.1% BER - - -98 - dBmMaximum received signal @0.1% BER - 0 - - dBmCo-channel C/I - - +10 - dBEspressif Systems 31 ESP32 Datasheet V1.6
5. ELECTRICAL CHARACTERISTICSParameter Conditions Min Typ Max UnitAdjacent channel selectivity C/IF = F0 + 1 MHz - -5 - dBF = F0 - 1 MHz - -5 - dBF = F0 + 2 MHz - -25 - dBF = F0 - 2 MHz - -35 - dBF = F0 + 3 MHz - -25 - dBF = F0 - 3 MHz - -45 - dBOut-of-band blocking performance30 MHz ~2000 MHz -10 - - dBm2000 MHz ~2400 MHz -27 - - dBm2500 MHz ~3000 MHz -27 - - dBm3000 MHz ~12.5 GHz -10 - - dBmIntermodulation - -36 - - dBm5.5.2 TransmitterTable 16: Transmitter Characteristics–BLEParameter Conditions Min Typ Max UnitRF transmit power - - +7.5 +10 dBmRF power control range - - 25 - dBAdjacent channel transmit powerF = F0 + 1 MHz - -14.6 - dBmF = F0 - 1 MHz - -12.7 - dBmF = F0 + 2 MHz - -44.3 - dBmF = F0 - 2 MHz - -38.7 - dBmF = F0 + 3 MHz - -49.2 - dBmF = F0 - 3 MHz - -44.7 - dBmF = F0 + > 3 MHz - -50 - dBmF = F0 - > 3 MHz - -50 - dBm∆f1avg - - - 265 kHz∆f2max - 247 - - kHz∆f2avg/∆f1avg - - -0.92 - -ICFT - - -10 - kHzDrift rate - - 0.7 - kHz/50 µsDrift - - 2 - kHzEspressif Systems 32 ESP32 Datasheet V1.6
6. PACKAGE INFORMATION6. Package InformationFigure 5: QFN48 (6x6 mm) PackageFigure 6: QFN48 (5x5 mm) PackageEspressif Systems 33 ESP32 Datasheet V1.6
7. PART NUMBER AND ORDERING INFORMATION7. Part Number and Ordering InformationESP32 - D 0 WD Q6PackageQ6=QFN 6*6N/A=QFN 5*5ConnectionWD=Wi-Fi b/g/n + BT/BLE Dual ModeAD=Wi-Fi a/b/g/n + BT/BLE Dual ModeCD=Wi-Fi ac/c/b/n/g + BT/BLE Dual ModeEmbedded Flash0=No Embedded Flash2=16 MbitCoreD=Dual CoreS=Single Core Figure 7: ESP32 Part NumberThe table below provides the ordering information of the ESP32 series of chips.Table 17: ESP32 Ordering InformationOrdering code Core Embedded flash Connection PackageESP32-D0WDQ6 Dual core No embedded flash Wi-Fi b/g/n + BT/BLE Dual Mode QFN 6*6ESP32-D0WD Dual core No embedded flash Wi-Fi b/g/n + BT/BLE Dual Mode QFN 5*5ESP32-D2WD Dual core 16-Mbit embedded flash Wi-Fi b/g/n + BT/BLE Dual Mode QFN 5*5ESP32-S0WD Single core No embedded flash Wi-Fi b/g/n + BT/BLE Dual Mode QFN 5*5Espressif Systems 34 ESP32 Datasheet V1.6
8. LEARNING RESOURCES8. Learning Resources8.1 Must-Read DocumentsClick on the following links for related documents of ESP32.•ESP32 Technical Reference ManualThe manual provides detailed information on how to use the ESP32 memory and peripherals.•ESP32 Hardware ResourcesThe zip files include the schematics, PCB layout, Gerber and BOM list of ESP32-DevKitC.•ESP32 Hardware Design GuidelinesThe guidelines outline recommended design practices when developing standalone or add-on systemsbased on the ESP32 series of products, including ESP32, the ESP-WROOM-32 module, and ESP32-DevKitC — the development board.•ESP32 AT Instruction Set and ExamplesThis document introduces the ESP32 AT commands, explains how to use them and provides examples ofseveral common AT commands.8.2 Must-Have ResourcesHere are the ESP32-related must-have resources.•ESP32 BBSThis is an Engineer-to-Engineer (E2E) Community for ESP32 where you can post questions, share knowledge,explore ideas, and help solve problems with fellow engineers.•ESP32 GithubESP32 development projects are freely distributed under Espressif’s MIT license on Github. It is establishedto help developers get started with ESP32 and foster innovation and the growth of general knowledge aboutthe hardware and software surrounding ESP32 devices.•ESP32 ToolsThis is a web-page where users can download ESP32 Flash Download Tools and the zip file ”ESP32 Certifi-cation and Test”.•ESP32 IDFThis web-page links users to the official IoT development framework for ESP32.•ESP32 ResourcesThis webpage provides the links to all the available ESP32 documents, SDK and tools. �����������Espressif Systems 35 ESP32 Datasheet V1.6
Appendix AAppendix A – Touch SensorA touch sensor system is built on a substrate which carries electrodes and relevant connections with a flat protectivesurface. When a user touches the surface, the capacitance variation is triggered, and a binary signal is generatedto indicate whether the touch is valid.Figure 8: A Typical Touch Sensor ApplicationIn order to prevent capacitive coupling and other electrical interference to the sensitivity of the touch sensor system,the following factors should be taken into account.A.1. Electrode PatternThe proper size and shape of an electrode helps improve system sensitivity. Round, oval, or shapes similar to ahuman fingertip is commonly applied. Large size or irregular shape might lead to incorrect responses from nearbyelectrodes.Figure 9: Electrode Pattern RequirementsNote:The examples illustrated in Figure 9are not of actual scale. It is suggested that users use a human fingertip as reference.Espressif Systems 36 ESP32 Datasheet V1.6
Appendix AA.2. PCB LayoutThe recommendations for correctly routing sensing tracks of electrodes are as follows:• Close proximity between electrodes may lead to crosstalk between electrodes and false touch detections.The distance between electrodes should be at least twice the thickness of the panel used.• The width of a sensor track creates parasitic capacitance, which could vary with manufacturing processes.The thinner the track is, the less capacitive coupling it generates. The track width should be kept as thin aspossible and the length should not exceed 10cm to accommodate.• Avoid coupling between lines of high-frequency signals. The sensing tracks should be routed parallel to eachother on the same layer and the distance between the tracks should be at least twice the width of the track.• When designing a touch sensor device, there should be no components adjacent to or underneath theelectrodes.• Do not ground the touch sensor device. It is preferable that no ground layer be placed under the device,unless there is a need to isolate it. Parasitic capacitance generated between the touch sensor device andthe ground degrades sensitivity.1213Distance between electrodes: twice the thickness of the panel 2Distance between tracks: twice the track width 3Width of the track (electrode wiring): as thin as possible 44Distance between track and ground plane: 2 mm at a minimum Figure 10: Sensor Track Routing RequirementsEspressif Systems 37 ESP32 Datasheet V1.6
Appendix BAppendix B – Code ExamplesB.1. Input>python esptool.py -p dev/tty8 -b 115200 write_Flash -c ESP32 -ff 40m -fm qio -fs 2MB0x0 ~/Workspace/ESP32_BIN/boot.bin0x04000 ~/Workspace/ESP32_BIN/drom0.bin0x40000 ~/Workspace/ESP32_BIN/bin/irom0_Flash.bin0xFC000 ~/Workspace/ESP32_BIN/blank.bin0x1FC000 ~/Workspace/ESP32_BIN/esp_init_data_default.binB.2. OutputConnecting...Erasing Flash...Wrote 3072 bytes at 0x00000000 in 0.3 seconds (73.8 kbit/s)...Erasing Flash...Wrote 395264 bytes at 0x04000000 in 43.2 seconds (73.2 kbit/s)...Erasing Flash...Wrote 1024 bytes at 0x40000000 in 0.1 seconds (74.5 kbit/s)...Erasing Flash...Wrote 4096 bytes at 0xfc000000 in 0.4 seconds (73.5 kbit/s)...Erasing Flash...Wrote 4096 bytes at 0x1fc00000 in 0.5 seconds (73.8 kbit/s)...Leaving...Espressif Systems 38 ESP32 Datasheet V1.6
Appendix CAppendix C – ESP32 Pin ListsC.1. Notes on ESP32 Pin ListsTable 18: Notes on ESP32 Pin ListsNo. Description1In Table IO_MUX, the red-filled areas mark the differences from ESP31B. The blue-filled areasindicate the new features of ESP32, compared to those of ESP31B. The yellow-filled areasindicate the GPIO pins that are input-only. Please see the next note for details.2GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull-up/pull-down circuitry. The pin names are: SENSOR_VP (GPIO36), SENSOR_CAPP (GPIO37),SENSOR_CAPN (GPIO38), SENSOR_VN (GPIO39), VDET_1 (GPIO34), VDET_2 (GPIO35).3The pins are split into four power domains: VANA (analog power supply), VRTC (RTC powersupply), VIO (power supply of digital IOs and CPU cores), VSDIO (power supply of SDIO IOs).VSDIO is the output of the internal SDIO-LDO. The voltage of SDIO-LDO can be configuredat 1.8V, or be the same as that of the VRTC. The strapping pin and eFuse bits determinethe default voltage of the SDIO-LDO. Software can change the voltage of the SDIO-LDO byconfiguring register bits. For details, please see the column “Power Domain” in Table IO_MUX.4The functional pins in the VRTC domain are those with analog functions, including the 32kHz crystal oscillator, ADC pre-amplifier, ADC, DAC, and capacitive touch sensor. Please seecolumns “Analog Function 1~3” in Table IO_MUX.5These VRTC pins support the RTC function, and can work during Deep-sleep. For example,an RTC-GPIO can be used for waking up the chip from Deep-sleep.6The GPIO pins support up to six digital functions, as shown in columns “Function 1~6” In TableIO_MUX. The function selection registers will be set as “N-1”, where Nis the function number.Below are some definitions:• SD_* is for signals of the SDIO slave.• HS1_* is for Port 1 signals of SDIO host.• HS2_* is for Port 2 signals of SDIO host.• MT* is for signals of the JTAG.• U0* is for signals of the UART0 module.• U1* is for signals of the UART1 module.• U2* is for signals of the UART2 module.• SPI* is for signals of the SPI01 module.• HSPI* is for signals of the SPI2 module.• VSPI* is for signals of the SPI3 module.Espressif Systems 39 ESP32 Datasheet V1.6
Appendix CNo. Description7Each digital “Function” column is accompanied by a column of “Type”. Please see the followingexplanations for the meaning of “type” with respect to each “function” it is associated with. Forany “Function-N”, “type” signifies:• I: input only. If a function other than “Function-N” is assigned, the input signal of“Function-N” is still from this pin.• I1: input only. If a function other than “Function-N” is assigned, the input signal for“Function-N” is always “1”.• I0: input only. If a function other than “Function-N” is assigned, the input signal for“Function-N” is always “0”.• O: output only.• T: high-impedance.• I/O/T: combinations of input, output, and high-impedance according to the function sig-nal.• I1/O/T: combinations of input, output, and high-impedance according to the functionsignal. If a function is not selected, the input signal of the function is “1”.For example, pin 30 can act as HS1_CMD or SD_CMD, where HS1_CMD is of an “I1/O/T”type. If pin 30 is selected as HS1_CMD, the input and output of this pin are controlled by theSDIO host. If pin 30 is not selected as HS1_CMD, the input signal to SDIO host is always “1”.8Each digital output pin is associated with its configurable drive-strength. Column “DriveStrength” in Table IO_MUX lists the default values. The drive strength of the digital outputpins can be configured into one of the following four options:• 0: ~5 mA• 1: ~10 mA• 2: ~20 mA• 3: ~40 mAThe default value is 2.The drive strength of the internal pull-up (wpu) and pull-down (wpd) is ~75 µA.9Column “At Reset” in Table IO_MUX lists the status of each pin during reset, including inputenable (ie=1), internal pull-up (wpu) and internal pull-down (wpd). During reset, all pins areoutput-disabled.10Column “After Reset” in Table IO_MUX lists the status of each pin immediately after reset,including input enable (ie=1), internal pull-up (wpu) and internal pull-down (wpd). After reset,each pin is set to its “Function 1”. The output enable are controlled by its digital Function 1.11Table Ethernet_MAC is about the signal mapping inside Ethernet MAC. The Ethernet MACsupports MII and RMII interfaces, and supports both internal PLL clock and the external clocksource. For MII interface, the Ethernet MAC is with/without the TX_ERR signal. MDC, MDIO,CRS and COL are slow signals, and can be mapped onto any GPIO pins through GPIO-Matrix.12Table GPIO Matrix is for the GPIO-Matrix. The signals of the on-chip functional modules canbe mapped onto any GPIO pins. Some signals can be mapped onto a pin by both IO-MUXand GPIO-Matrix, as shown in the column tagged as “Same input signal from IO_MUX core”in Table GPIO Matrix.13*In Table GPIO_Matrix�the column “Default Value if unassigned” records the default value ofthe an input signal if no GPIO is assigned to it. The actual value is determined by registerGPIO_FUNCm_IN_INV_SEL and GPIO_FUNCm_IN_SEL. (The value of mranges from 1 to255.)Espressif Systems 40 ESP32 Datasheet V1.6
Appendix CC.2. GPIO_MatrixTable 19: GPIO_MatrixSame inputSignal Default value signal from Output enableNo. Input signals if unassigned* IO_MUXcoreOutput signals of output signals0 SPICLK_in 0 yes SPICLK_out SPICLK_oe1 SPIQ_in 0 yes SPIQ_out SPIQ_oe2 SPID_in 0 yes SPID_out SPID_oe3 SPIHD_in 0 yes SPIHD_out SPIHD_oe4 SPIWP_in 0 yes SPIWP_out SPIWP_oe5 SPICS0_in 0 yes SPICS0_out SPICS0_oe6 SPICS1_in 0 no SPICS1_out SPICS1_oe7 SPICS2_in 0 no SPICS2_out SPICS2_oe8 HSPICLK_in 0 yes HSPICLK_out HSPICLK_oe9 HSPIQ_in 0 yes HSPIQ_out HSPIQ_oe10 HSPID_in 0 yes HSPID_out HSPID_oe11 HSPICS0_in 0 yes HSPICS0_out HSPICS0_oe12 HSPIHD_in 0 yes HSPIHD_out HSPIHD_oe13 HSPIWP_in 0 yes HSPIWP_out HSPIWP_oe14 U0RXD_in 0 yes U0TXD_out 1’d115 U0CTS_in 0 yes U0RTS_out 1’d116 U0DSR_in 0 no U0DTR_out 1’d117 U1RXD_in 0 yes U1TXD_out 1’d118 U1CTS_in 0 yes U1RTS_out 1’d123 I2S0O_BCK_in 0 no I2S0O_BCK_out 1’d124 I2S1O_BCK_in 0 no I2S1O_BCK_out 1’d125 I2S0O_WS_in 0 no I2S0O_WS_out 1’d126 I2S1O_WS_in 0 no I2S1O_WS_out 1’d127 I2S0I_BCK_in 0 no I2S0I_BCK_out 1’d128 I2S0I_WS_in 0 no I2S0I_WS_out 1’d129 I2CEXT0_SCL_in 1 no I2CEXT0_SCL_out 1’d130 I2CEXT0_SDA_in 1 no I2CEXT0_SDA_out 1’d131 pwm0_sync0_in 0 no sdio_tohost_int_out 1’d132 pwm0_sync1_in 0 no pwm0_out0a 1’d133 pwm0_sync2_in 0 no pwm0_out0b 1’d134 pwm0_f0_in 0 no pwm0_out1a 1’d135 pwm0_f1_in 0 no pwm0_out1b 1’d136 pwm0_f2_in 0 no pwm0_out2a 1’d137 - 0 no pwm0_out2b 1’d139 pcnt_sig_ch0_in0 0 no - 1’d140 pcnt_sig_ch1_in0 0 no - 1’d141 pcnt_ctrl_ch0_in0 0 no - 1’d142 pcnt_ctrl_ch1_in0 0 no - 1’d1Espressif Systems 41 ESP32 Datasheet V1.6
Appendix CSame inputSignal Default value signal from Output enableNo. Input signals if unassigned IO_MUXcoreOutput signals of output signals43 pcnt_sig_ch0_in1 0 no - 1’d144 pcnt_sig_ch1_in1 0 no - 1’d145 pcnt_ctrl_ch0_in1 0 no - 1’d146 pcnt_ctrl_ch1_in1 0 no - 1’d147 pcnt_sig_ch0_in2 0 no - 1’d148 pcnt_sig_ch1_in2 0 no - 1’d149 pcnt_ctrl_ch0_in2 0 no - 1’d150 pcnt_ctrl_ch1_in2 0 no - 1’d151 pcnt_sig_ch0_in3 0 no - 1’d152 pcnt_sig_ch1_in3 0 no - 1’d153 pcnt_ctrl_ch0_in3 0 no - 1’d154 pcnt_ctrl_ch1_in3 0 no - 1’d155 pcnt_sig_ch0_in4 0 no - 1’d156 pcnt_sig_ch1_in4 0 no - 1’d157 pcnt_ctrl_ch0_in4 0 no - 1’d158 pcnt_ctrl_ch1_in4 0 no - 1’d161 HSPICS1_in 0 no HSPICS1_out HSPICS1_oe62 HSPICS2_in 0 no HSPICS2_out HSPICS2_oe63 VSPICLK_in 0 yes VSPICLK_out_mux VSPICLK_oe64 VSPIQ_in 0 yes VSPIQ_out VSPIQ_oe65 VSPID_in 0 yes VSPID_out VSPID_oe66 VSPIHD_in 0 yes VSPIHD_out VSPIHD_oe67 VSPIWP_in 0 yes VSPIWP_out VSPIWP_oe68 VSPICS0_in 0 yes VSPICS0_out VSPICS0_oe69 VSPICS1_in 0 no VSPICS1_out VSPICS1_oe70 VSPICS2_in 0 no VSPICS2_out VSPICS2_oe71 pcnt_sig_ch0_in5 0 no ledc_hs_sig_out0 1’d172 pcnt_sig_ch1_in5 0 no ledc_hs_sig_out1 1’d173 pcnt_ctrl_ch0_in5 0 no ledc_hs_sig_out2 1’d174 pcnt_ctrl_ch1_in5 0 no ledc_hs_sig_out3 1’d175 pcnt_sig_ch0_in6 0 no ledc_hs_sig_out4 1’d176 pcnt_sig_ch1_in6 0 no ledc_hs_sig_out5 1’d177 pcnt_ctrl_ch0_in6 0 no ledc_hs_sig_out6 1’d178 pcnt_ctrl_ch1_in6 0 no ledc_hs_sig_out7 1’d179 pcnt_sig_ch0_in7 0 no ledc_ls_sig_out0 1’d180 pcnt_sig_ch1_in7 0 no ledc_ls_sig_out1 1’d181 pcnt_ctrl_ch0_in7 0 no ledc_ls_sig_out2 1’d182 pcnt_ctrl_ch1_in7 0 no ledc_ls_sig_out3 1’d183 rmt_sig_in0 0 no ledc_ls_sig_out4 1’d184 rmt_sig_in1 0 no ledc_ls_sig_out5 1’d185 rmt_sig_in2 0 no ledc_ls_sig_out6 1’d1Espressif Systems 42 ESP32 Datasheet V1.6
Appendix CSame inputSignal Default value signal from Output enableNo. Input signals if unassigned IO_MUXcoreOutput signals of output signals86 rmt_sig_in3 0 no ledc_ls_sig_out7 1’d187 rmt_sig_in4 0 no rmt_sig_out0 1’d188 rmt_sig_in5 0 no rmt_sig_out1 1’d189 rmt_sig_in6 0 no rmt_sig_out2 1’d190 rmt_sig_in7 0 no rmt_sig_out3 1’d191 - - - rmt_sig_out4 1’d192 - - - rmt_sig_out6 1’d194 - - - rmt_sig_out7 1’d195 I2CEXT1_SCL_in 1 no I2CEXT1_SCL_out 1’d196 I2CEXT1_SDA_in 1 no I2CEXT1_SDA_out 1’d197 host_card_detect_n_1 0 no host_ccmd_od_pullup_en_n 1’d198 host_card_detect_n_2 0 no host_rst_n_1 1’d199 host_card_write_prt_1 0 no host_rst_n_2 1’d1100 host_card_write_prt_2 0 no gpio_sd0_out 1’d1101 host_card_int_n_1 0 no gpio_sd1_out 1’d1102 host_card_int_n_2 0 no gpio_sd2_out 1’d1103 pwm1_sync0_in 0 no gpio_sd3_out 1’d1104 pwm1_sync1_in 0 no gpio_sd4_out 1’d1105 pwm1_sync2_in 0 no gpio_sd5_out 1’d1106 pwm1_f0_in 0 no gpio_sd6_out 1’d1107 pwm1_f1_in 0 no gpio_sd7_out 1’d1108 pwm1_f2_in 0 no pwm1_out0a 1’d1109 pwm0_cap0_in 0 no pwm1_out0b 1’d1110 pwm0_cap1_in 0 no pwm1_out1a 1’d1111 pwm0_cap2_in 0 no pwm1_out1b 1’d1112 pwm1_cap0_in 0 no pwm1_out2a 1’d1113 pwm1_cap1_in 0 no pwm1_out2b 1’d1114 pwm1_cap2_in 0 no pwm2_out1h 1’d1115 pwm2_flta 1 no pwm2_out1l 1’d1116 pwm2_fltb 1 no pwm2_out2h 1’d1117 pwm2_cap1_in 0 no pwm2_out2l 1’d1118 pwm2_cap2_in 0 no pwm2_out3h 1’d1119 pwm2_cap3_in 0 no pwm2_out3l 1’d1120 pwm3_flta 1 no pwm2_out4h 1’d1121 pwm3_fltb 1 no pwm2_out4l 1’d1122 pwm3_cap1_in 0 no - 1’d1123 pwm3_cap2_in 0 no - 1’d1124 pwm3_cap3_in 0 no - 1’d1140 I2S0I_DATA_in0 0 no I2S0O_DATA_out0 1’d1141 I2S0I_DATA_in1 0 no I2S0O_DATA_out1 1’d1142 I2S0I_DATA_in2 0 no I2S0O_DATA_out2 1’d1Espressif Systems 43 ESP32 Datasheet V1.6
Appendix CSame inputSignal Default value signal from Output enableNo. Input signals if unassigned IO_MUXcoreOutput signals of output signals143 I2S0I_DATA_in3 0 no I2S0O_DATA_out3 1’d1144 I2S0I_DATA_in4 0 no I2S0O_DATA_out4 1’d1145 I2S0I_DATA_in5 0 no I2S0O_DATA_out5 1’d1146 I2S0I_DATA_in6 0 no I2S0O_DATA_out6 1’d1147 I2S0I_DATA_in7 0 no I2S0O_DATA_out7 1’d1148 I2S0I_DATA_in8 0 no I2S0O_DATA_out8 1’d1149 I2S0I_DATA_in9 0 no I2S0O_DATA_out9 1’d1150 I2S0I_DATA_in10 0 no I2S0O_DATA_out10 1’d1151 I2S0I_DATA_in11 0 no I2S0O_DATA_out11 1’d1152 I2S0I_DATA_in12 0 no I2S0O_DATA_out12 1’d1153 I2S0I_DATA_in13 0 no I2S0O_DATA_out13 1’d1154 I2S0I_DATA_in14 0 no I2S0O_DATA_out14 1’d1155 I2S0I_DATA_in15 0 no I2S0O_DATA_out15 1’d1156 - - - I2S0O_DATA_out16 1’d1157 - - - I2S0O_DATA_out17 1’d1158 - - - I2S0O_DATA_out18 1’d1159 - - - I2S0O_DATA_out19 1’d1160 - - - I2S0O_DATA_out20 1’d1161 - - - I2S0O_DATA_out21 1’d1162 - - - I2S0O_DATA_out22 1’d1163 - - - I2S0O_DATA_out23 1’d1164 I2S1I_BCK_in 0 no I2S1I_BCK_out 1’d1165 I2S1I_WS_in 0 no I2S1I_WS_out 1’d1166 I2S1I_DATA_in0 0 no I2S1O_DATA_out0 1’d1167 I2S1I_DATA_in1 0 no I2S1O_DATA_out1 1’d1168 I2S1I_DATA_in2 0 no I2S1O_DATA_out2 1’d1169 I2S1I_DATA_in3 0 no I2S1O_DATA_out3 1’d1170 I2S1I_DATA_in4 0 no I2S1O_DATA_out4 1’d1171 I2S1I_DATA_in5 0 no I2S1O_DATA_out5 1’d1172 I2S1I_DATA_in6 0 no I2S1O_DATA_out6 1’d1173 I2S1I_DATA_in7 0 no I2S1O_DATA_out7 1’d1174 I2S1I_DATA_in8 0 no I2S1O_DATA_out8 1’d1175 I2S1I_DATA_in9 0 no I2S1O_DATA_out9 1’d1176 I2S1I_DATA_in10 0 no I2S1O_DATA_out10 1’d1177 I2S1I_DATA_in11 0 no I2S1O_DATA_out11 1’d1178 I2S1I_DATA_in12 0 no I2S1O_DATA_out12 1’d1179 I2S1I_DATA_in13 0 no I2S1O_DATA_out13 1’d1180 I2S1I_DATA_in14 0 no I2S1O_DATA_out14 1’d1181 I2S1I_DATA_in15 0 no I2S1O_DATA_out15 1’d1182 - - - I2S1O_DATA_out16 1’d1183 - - - I2S1O_DATA_out17 1’d1Espressif Systems 44 ESP32 Datasheet V1.6
Appendix CSame inputSignal Default value signal from Output enableNo. Input signals if unassigned IO_MUXcoreOutput signals of output signals184 - - - I2S1O_DATA_out18 1’d1185 - - - I2S1O_DATA_out19 1’d1186 - - - I2S1O_DATA_out20 1’d1187 - - - I2S1O_DATA_out21 1’d1188 - - - I2S1O_DATA_out22 1’d1189 - - - I2S1O_DATA_out23 1’d1190 I2S0I_H_SYNC 0 no pwm3_out1h 1’d1191 I2S0I_V_SYNC 0 no pwm3_out1l 1’d1192 I2S0I_H_ENABLE 0 no pwm3_out2h 1’d1193 I2S1I_H_SYNC 0 no pwm3_out2l 1’d1194 I2S1I_V_SYNC 0 no pwm3_out3h 1’d1195 I2S1I_H_ENABLE 0 no pwm3_out3l 1’d1196 - - - pwm3_out4h 1’d1197 - - - pwm3_out4l 1’d1198 U2RXD_in 0 yes U2TXD_out 1’d1199 U2CTS_in 0 yes U2RTS_out 1’d1200 emac_mdc_i 0 no emac_mdc_o emac_mdc_oe201 emac_mdi_i 0 no emac_mdo_o emac_mdo_o_e202 emac_crs_i 0 no emac_crs_o emac_crs_oe203 emac_col_i 0 no emac_col_o emac_col_oe204 pcmfsync_in 0 no bt_audio0_irq 1’d1205 pcmclk_in 0 no bt_audio1_irq 1’d1206 pcmdin 0 no bt_audio2_irq 1’d1207 - - - ble_audio0_irq 1’d1208 - - - ble_audio1_irq 1’d1209 - - - ble_audio2_irq 1’d1210 - - - pcmfsync_out pcmfsync_en211 - - - pcmclk_out pcmclk_en212 - - - pcmdout pcmdout_en213 - - - ble_audio_sync0_p 1’d1214 - - - ble_audio_sync1_p 1’d1215 - - - ble_audio_sync2_p 1’d1224 - - - sig_in_func224 1’d1225 - - - sig_in_func225 1’d1226 - - - sig_in_func226 1’d1227 - - - sig_in_func227 1’d1228 - - - sig_in_func228 1’d1Espressif Systems 45 ESP32 Datasheet V1.6
Appendix CC.3. Ethernet_MACTable 20: Ethernet_MACPIN Name Function6 MII (int_osc) MII (ext_osc) RMII (int_osc) RMII (ext_osc)GPIO0 EMAC_TX_CLK TX_CLK (I) TX_CLK (I) CLK_OUT(O) EXT_OSC_CLK(I)GPIO5 EMAC_RX_CLK RX_CLK (I) RX_CLK (I) - -GPIO21 EMAC_TX_EN TX_EN(O) TX_EN(O) TX_EN(O) TX_EN(O)GPIO19 EMAC_TXD0 TXD[0](O) TXD[0](O) TXD[0](O) TXD[0](O)GPIO22 EMAC_TXD1 TXD[1](O) TXD[1](O) TXD[1](O) TXD[1](O)MTMS EMAC_TXD2 TXD[2](O) TXD[2](O) - -MTDI EMAC_TXD3 TXD[3](O) TXD[3](O) - -MTCK EMAC_RX_ER RX_ER(I) RX_ER(I) - -GPIO27 EMAC_RX_DV RX_DV(I) RX_DV(I) CRS_DV(I) CRS_DV(I)GPIO25 EMAC_RXD0 RXD[0](I) RXD[0](I) RXD[0](I) RXD[0](I)GPIO26 EMAC_RXD1 RXD[1](I) RXD[1](I) RXD[1](I) RXD[1](I)U0TXD EMAC_RXD2 RXD[2](I) RXD[2](I) - -MTDO EMAC_RXD3 RXD[3](I) RXD[3](I) - -GPIO16 EMAC_CLK_OUT CLK_OUT(O) - CLK_OUT(O) -GPIO17 EMAC_CLK_OUT_180 CLK_OUT_180(O) - CLK_OUT_180(O) -GPIO4 EMAC_TX_ER TX_ERR(O)* TX_ERR(O)* - -In GPIO Matrix* - MDC(O) MDC(O) MDC(O) MDC(O)In GPIO Matrix* - MDIO(IO) MDIO(IO) MDIO(IO) MDIO(IO)In GPIO Matrix* - CRS(I) CRS(I) - -In GPIO Matrix* - COL(I) COL(I) - -*Notes: 1. The GPIO Matrix can be any GPIO. 2. The TX_ERR (O) is optional.C.4. IO_MUXFor the list of IO_MUX pins please see the next page.Espressif Systems 46 ESP32 Datasheet V1.6
Appendix CIO_MUXPin No.Power Supply PinAnalog PinDigital PinPower DomainAnalog Function1Analog Function2Analog Function3RTC Function1RTC Function2Function1TypeFunction2TypeFunction3TypeFunction4TypeFunction5TypeFunction6TypeDrive Strength (2’d2: 20 mA)At ResetAfter Reset1VDDAVANA in2LNA_INVANA in3VDD3P3VANA in4VDD3P3VANA in5SENSOR_VPVRTCADC_HADC1_CH0RTC_GPIO0GPIO36IGPIO36Iie=06SENSOR_CAPPVRTCADC_HADC1_CH1RTC_GPIO1GPIO37IGPIO37Iie=07SENSOR_CAPNVRTCADC_HADC1_CH2RTC_GPIO2GPIO38IGPIO38Iie=08SENSOR_VNVRTCADC_HADC1_CH3RTC_GPIO3GPIO39IGPIO39Iie=09CHIP_PUVRTC10VDET_1VRTCADC1_CH6RTC_GPIO4GPIO34IGPIO34Iie=011VDET_2VRTCADC1_CH7RTC_GPIO5GPIO35IGPIO35Iie=01232K_XPVRTCXTAL_32K_PADC1_CH4TOUCH9RTC_GPIO9GPIO32I/O/TGPIO32I/O/T2'd2ie=01332K_XNVRTCXTAL_32K_NADC1_CH5TOUCH8RTC_GPIO8GPIO33I/O/TGPIO33I/O/T2'd2ie=014GPIO25VRTCDAC_1ADC2_CH8RTC_GPIO6GPIO25I/O/TGPIO25I/O/TEMAC_RXD0I2'd2ie=015GPIO26VRTCDAC_2ADC2_CH9RTC_GPIO7GPIO26I/O/TGPIO26I/O/TEMAC_RXD1I2'd2ie=016GPIO27VRTCADC2_CH7TOUCH7RTC_GPIO17GPIO27I/O/TGPIO27I/O/TEMAC_RX_DVI2'd2ie=117MTMSVRTCADC2_CH6TOUCH6RTC_GPIO16MTMSI0HSPICLKI/O/TGPIO14I/O/THS2_CLKOSD_CLKI0EMAC_TXD2O2'd2wpu, ie=1wpu, ie=118MTDIVRTCADC2_CH5TOUCH5RTC_GPIO15MTDII1HSPIQI/O/TGPIO12I/O/THS2_DATA2I1/O/TSD_DATA2I1/O/TEMAC_TXD3O2'd2wpd, ie=1wpd, ie=119VDD3P3_RTCVRTC supply in20MTCKVRTCADC2_CH4TOUCH4RTC_GPIO14MTCKI1HSPIDI/O/TGPIO13I/O/THS2_DATA3I1/O/TSD_DATA3I1/O/TEMAC_RX_ERI2'd2wpu, ie=1wpu, ie=121MTDOVRTCADC2_CH3TOUCH3RTC_GPIO13I2C_SDAMTDOO/THSPICS0I/O/TGPIO15I/O/THS2_CMDI1/O/TSD_CMDI1/O/TEMAC_RXD3I2'd2wpu, ie=1wpu, ie=122GPIO2VRTCADC2_CH2TOUCH2RTC_GPIO12I2C_SCLGPIO2I/O/THSPIWPI/O/TGPIO2I/O/THS2_DATA0I1/O/TSD_DATA0I1/O/T2'd2wpd, ie=1wpd, ie=123GPIO0VRTCADC2_CH1TOUCH1RTC_GPIO11I2C_SDAGPIO0I/O/TCLK_OUT1OGPIO0I/O/TEMAC_TX_CLKI2'd2wpu, ie=1wpu, ie=124GPIO4VRTCADC2_CH0TOUCH0RTC_GPIO10I2C_SCLGPIO4I/O/THSPIHDI/O/TGPIO4I/O/THS2_DATA1I1/O/TSD_DATA1I1/O/TEMAC_TX_ERO2'd2wpd, ie=1wpd, ie=125GPIO16VSDIOGPIO16I/O/TGPIO16I/O/THS1_DATA4I1/O/TU2RXDI1EMAC_CLK_OUTO2'd2ie=126VDD_SDIOVSDIO supply out/in27GPIO17VSDIOGPIO17I/O/TGPIO17I/O/THS1_DATA5I1/O/TU2TXDOEMAC_CLK_OUT_180O2'd2ie=128SD_DATA_2VSDIOSD_DATA2I1/O/TSPIHDI/O/TGPIO9I/O/THS1_DATA2I1/O/TU1RXDI12'd2wpu, ie=1wpu, ie=129SD_DATA_3VSDIOSD_DATA3I0/O/TSPIWPI/O/TGPIO10I/O/THS1_DATA3I1/O/TU1TXDO2'd2wpu, ie=1wpu, ie=130SD_CMDVSDIOSD_CMDI1/O/TSPICS0I/O/TGPIO11I/O/THS1_CMDI1/O/TU1RTSO2'd2wpu, ie=1wpu, ie=131SD_CLKVSDIOSD_CLKI0SPICLKI/O/TGPIO6I/O/THS1_CLKOU1CTSI12'd2wpu, ie=1wpu, ie=132SD_DATA_0VSDIOSD_DATA0I1/O/TSPIQI/O/TGPIO7I/O/THS1_DATA0I1/O/TU2RTSO2'd2wpu, ie=1wpu, ie=133SD_DATA_1VSDIOSD_DATA1I1/O/TSPIDI/O/TGPIO8I/O/THS1_DATA1I1/O/TU2CTSI12'd2wpu, ie=1wpu, ie=134GPIO5VIOGPIO5I/O/TVSPICS0I/O/TGPIO5I/O/THS1_DATA6I1/O/TEMAC_RX_CLKI2'd2wpu, ie=1wpu, ie=135GPIO18VIOGPIO18I/O/TVSPICLKI/O/TGPIO18I/O/THS1_DATA7I1/O/T2'd2ie=136GPIO23VIOGPIO23I/O/TVSPIDI/O/TGPIO23I/O/THS1_STROBEI02'd2ie=137VDD3P3_CPUVIO supply in38GPIO19VIOGPIO19I/O/TVSPIQI/O/TGPIO19I/O/TU0CTSI1EMAC_TXD0O2'd2ie=139GPIO22VIOGPIO22I/O/TVSPIWPI/O/TGPIO22I/O/TU0RTSOEMAC_TXD1O2'd2ie=140U0RXDVIOU0RXDI1CLK_OUT2OGPIO3I/O/T2'd2wpu, ie=1wpu, ie=141U0TXDVIOU0TXDOCLK_OUT3OGPIO1I/O/TEMAC_RXD2I2'd2wpu, ie=1wpu, ie=142GPIO21VIOGPIO21I/O/TVSPIHDI/O/TGPIO21I/O/TEMAC_TX_ENO2'd2ie=143VDDAVANA in44XTAL_NVANA45XTAL_PVANA46VDDAVANA47CAP2VANA48CAP1VANATotal Number81426Note:!Please see Table: Notes on ESP32 Pin Lists.ҁ᧗݇ᘍᤒғᓕᚕႴܔ᧔ก̶҂Espressifwww.espressif.comEspressif Systems 47 ESP32 Datasheet V1.6
FCC Statement This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Any Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. The modular can be installed or integrated in mobile or fix devices only. This modular cannot be installed in any portable device . FCC Radiation Exposure Statement This modular complies with FCC RF radiation exposure limits set forth for an uncontrolled environment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. This modular must be installed and operated with a minimum distance of 20 cm between the radiator and user body. If the FCC identification number is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. This exterior label can use wording such as the following: “Contains Transmitter Module FCC ID: 2AM77-ESP-32F Or Contains FCC ID: 2AM77-ESP-32F” When the module is installed inside another device, the user manual of the host must contain below warning statements; 1. This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference. (2) This device must accept any interference received, including interference that may cause undesired operation. 2. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. The devices must be installed and used in strict accordance with the manufacturer's instructions as described in the user documentation that comes with the product.

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