Indra Air Traffic VOR2 VOR Transmitter User Manual 571150A 0002

Selex Sistemi Integrati Inc. VOR Transmitter 571150A 0002

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THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION AND SUCH INFORMATION MAY NOT BE DISCLOSED TO OTHERS FOR ANY PURPOSES WITHOUT WRITTEN PERMISSION FROM SELEX Sistemi Integrati Inc. Copyright © 2008, SELEX Sistemi Integrati Inc. Operations and Maintenance Manual Model 1150A Doppler VHF Omnirange (DVOR) 571150A-0002 Rev - November, 2008 SELEX Sistemi Integrati Inc. 11300 West 89th Street Overland Park, KS U.S.A. 66214

SAFETY SUMMARY The following are general safety precautions that are unrelated to specific procedures and therefore do not appear elsewhere in this publication. These are recommended precautions that personnel should understand and apply during through the many phases of operation and maintenance. ELECTROSTATIC SENSITIVE DEVICES PRECAUTIONS Since most modules used in all models of equipment have Electrostatic Discharge (ESD) sensitive devices included in them, all modules should be considered sensitive to electrostatic discharge. Handling in the field shall be the same as in the factory. Each system is shipped with a wrist strap that must be worn while maintaining the equipment. The wrist strap shall be fastened to the equipment chassis either in the designated plug-in or attached to the equipment chassis with the alligator clip. The wrist strap must be used before any modules are removed from the equipment and at all times while handling the modules until they are placed in a protective environment such as an anti-static bag. Modules or boards must not be placed on any non-conducting surface such as wooden work benches, painted metal work benches, plastics, or technical manuals. Any work surface to be used must have a conducting mat placed on it and attached to earth ground. The mat and additional wrist straps can be obtained from SELEX Sistemi Integrati Inc. KEEP AWAY FROM LIVE CIRCUITS Operating personnel must at all times observe all safety regulations. Under no circumstances should any person remove any protective covers that expose lethal voltages. Do not replace components or make adjustments inside the equipment with primary power supply turned on. Under certain conditions, dangerous potentials may exist when the power is in the off position, due to charges retained by capacitors. To avoid casualties, always remove power and allow time for the capacitors to discharge before touching it. DO NOT SERVICE OR ADJUST ALONE Under no circumstances should any person reach into or enter the enclosure for the purpose of servicing or adjusting the equipment except in the presence of someone who is capable of rendering aid. RESUSCITATION Personnel working with or near high voltages should be familiar with modern methods of resuscitation.

SELEX Sistemi Integrati Inc. This equipment is supplied by SELEX Sistemi Integrati Inc. For replacement parts and repair service, contact SELEX Sistemi Integrati Inc. using the contact information provided below. HOW TO ORDER REPLACEMENT PARTS When ordering replacement parts, you should contact SELEX Sistemi Integrati Inc. by fax, phone or email. Please address the following items (as applicable) in your correspondence to enable us to provide the best possible service. 1. SELEX Sistemi Integrati Inc. model number, type and serial number of equipment. 2. Unit sub-assembly number (where applicable). 3. Item or reference symbol number from parts list or schematic. 4. SELEX Sistemi Integrati Inc. part number and description. 5. Manufacturer's code, name and part number (where applicable). 6. Quantity of each replacement part required. HOW TO REQUEST REPAIR SERVICE In order to ensure prompt attention, parts returned for repair should have the following: 1. RMA number (Return Material Authorization number), assigned prior to return when requesting repair service. 2. Unit part number 3. Site location 4. System information 5. Ship-to address for return 6. Contact name and number 7. Date and time of request CONTACT INFORMATION SELEX Sistemi Integrati Inc. 11300 W 89th Street Overland Park KS, 66214, USA Main Switchboard: (913) 495-2600 Main Fax: (913) 492-0870 Toll free: (800) 331-2744 CSM Direct Phone: (913) 495-2625 CSM E-mail: Support@selex-si-us.comWorld Wide Web URL: www.selex-si-us.com

MANUFACTURER’S WARRANTY SELEX Sistemi Integrati Inc. The following warranty is applicable in all cases, except where modified or superseded by specific contract terms. Contact SELEX Sistemi Integrati Inc. if clarification is required. A. The Manufacturer warrants to the original Purchaser, subject to the limitations and exclusions stated below, that mechanical and electrical parts of products which it manufactures, (the “Products” will be free of defects in materials and workmanship for a period of (I) one (1) year from the date of installation or (ii) 18 months from the date of shipment, whichever first occurs (the “Warranty Period”). B. If the Customer believes a Product is defective, notice thereof shall be provided to the Manufacturer’s Customer Service Department at the address provided on the cover page and (if applicable) to the selling distributor. A defect in material and workmanship covered by this warranty shall be deemed to have occurred only if, and as of the time when, the Manufacturer is notified in writing by the Customer, within the Warranty Period, that the Product has become defective, and the Manufacturer’s personnel verify that the said Product, in fact, does not comply with the warranty provided hereunder and it is determined that: (i) The Products, during the entire Warranty Period, have been operated within normal service conditions, recommended by the Manufacturer and recognized in the industry, and (ii) The Products have been installed and adjusted according to the Manufacturer’s procedures as stated in the Instruction Manual or other instructions supplied in writing by the Manufacturer. C. Failures caused by lightning or other acts of God, or power surges, are not considered to be defects in materials and workmanship and are not covered under this warranty. Routine Maintenance and calibration are also not considered to be defects in materials and workmanship and are not covered under this warranty. Any change, modification or alteration of the Manufacturer’s Products not specifically authorized by the Manufacturer will void this warranty. D. If it is determined that the conditions for warranty coverage, as described above, have been satisfied, the Manufacturer shall repair or replace the defective products or parts thereof in accordance with the following procedures: (i) Customer will contact the Manufacturer’s customer Service Department which will issue the Customer a Return Authorization (RA) number. (ii) The Component, defective part, or Product, as appropriate, shall be returned to the Manufacturer for inspection, freight prepaid by the customer. The Component, defective part, or Product MUST be packaged with an industry standard anti-static protective bag sufficient to prevent any ESD intrusion during handling and shipment, and MUST ALSO be packaged to protect from damage due to rough handling encountered during shipment. FAILURE TO COMPLY WITH THIS REQUIREMENT WILL VOID THE WARRANTY OF THE RETURNED ITEM. The RA number must be clearly displayed on the exterior of the shipping container. No shipments will be accepted without a RA number. All custom duties, fees, etc. will be paid by the Customer. (iii) If, upon inspection it is determined by Manufacturer’s personnel that the Product or component thereof is indeed defective and covered by this warranty, then Manufacturer, at its option, may either repair the Product or defective components thereof and return the same to the Customer or ship a replacement for the defective Product or part thereof, freight paid. All customs duties, fees, etc. will be paid by the Customer. The Product or component thereof will be returned to the Customer utilizing a shipping mode similar to that used by Customer to ship the same to the Manufacturer. (iv) If, upon inspection by Manufacturer, it is determined that the Product or component thereof was not defective or was not covered by this warranty, then the cost of all of Manufacturer’s inspections and the return shipping charges will be charged to Customer. E. The Manufacturer reserves the right to make modifications and alterations to Products without obligation to install such improvements on, in, or in place of theretofore manufactured products of Manufacturer.

MANUFACTURER’S WARRANTY (cont.) F. Manufacturer does not warranty any Products, components, subassemblies, or parts not of its own manufacture. Manufacturer hereby transfers to Customer any and all warranties (if any) which it receives from its suppliers. G. Periodic calibration / re-calibration of test equipment is not covered under this or any Seller’s warranty, and is the sole responsibility of the Purchaser. H. Any and all claims for shortages, missing or damaged items must be presented, in writing, to the Seller within 120 days of the date of shipment from Seller’s factory. I. This warranty applies only to the original purchaser and, unless Customer receives the express written consent of an officer of Manufacturer, this warranty may not be assigned, transferred, or conveyed to any third party, even if the third party is a bon a fide purchaser of the Products. J. THIS WARRANTY IS EXPRESSLY IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED OR IMPLIED, WHETHER STATUTORY OR OTHERWISE, INCLUDING IMPLIED WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE MANUFACTURER BE LIABLE FOR INDIRECT, INCIDENTAL, COLLATERAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES OF ANY KIND, WHETHER ARISING OUT OF CONTRACT, TORT, NEGLIGENCE, STRICT LIABILITY OR OTHER PRODUCTS LIABILITY THEORY. K. CUSTOMER’S SOLE REMEDY FOR ANY BREACH OF THE WARRANTY SHALL BE THE REPAIR OR REPLACEMENT OF THE PRODUCTS BY THE MANUFACTURER AS PROVIDED HEREIN, AND IN NO EVENT SHALL THE MANUFACTURER BE REQUIRED TO INCUR COSTS FOR THE REPAIR OR REPLACEMENT OF ANY PRODUCT IN EXCESS OF THE PURCHASE PRICE OF SUCH PRODUCT, PLUS ANY TRANSPORTATION CHARGES ACTUALLY PAID ATTRIBUTABLE TO SUCH PRODUCTS.

Model 1150A DVOR Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. iTABLE OF CONTENTS Paragraph #Description Page #1GENERAL INFORMATION AND REQUIREMENTS......................................................................1-1 1.1 INTRODUCTION ................................................................................................................................1-1 1.2 EQUIPMENT DESCRIPTION.............................................................................................................1-2 1.2.1 Electronics Cabinet ...............................................................................................................................1-2 1.2.1.1 Local Control Unit (LCU) (1A1) ..........................................................................................................1-3 1.2.1.2 Synthesizer Assembly (1A3A1, 1A3A11)............................................................................................1-3 1.2.1.3 Audio Generator CCA (1A3A2, 1A3A9) .............................................................................................1-3 1.2.1.4 Monitor CCA (1A3A3, 1A3A10) .........................................................................................................1-7 1.2.1.5 Low Voltage Power Supply (LVPS) CCA (1A3A4, 1A3A8)...............................................................1-7 1.2.1.6 Test Generator CCA (1A3A5) ..............................................................................................................1-7 1.2.1.7 Remote Monitoring System (RMS) Processor CCA ( 1A3A6) ............................................................1-7 1.2.1.8 Facilities CCA (1A3A7) .......................................................................................................................1-7 1.2.1.9 Sideband Amplifier Assembly (1A4A1, 1A4A2, 1A4A6, 1A4A7)......................................................1-7 1.2.1.10 RF Monitor Assembly (1A4A4) ...........................................................................................................1-7 1.2.1.11 Commutator Control CCA (1A4A5).....................................................................................................1-7 1.2.1.12 Battery Charging Power Supply (BCPS) Assembly (1A5A1, 1A5A2) ................................................1-8 1.2.1.13 Carrier Power Amplifier Assembly (1A5A3, 1A5A4)..........................................................................1-8 1.2.1.14 Interface CCA (1A9).............................................................................................................................1-8 1.2.1.15 AC Power Monitor Assembly (1A6) ....................................................................................................1-8 1.2.1.16 Commutator CCA (1A10, 1A11)..........................................................................................................1-8 1.2.2 Portable Maintenance Data Terminal (PMDT).....................................................................................1-8 1.2.3 Transmitting Antenna System...............................................................................................................1-9 1.2.3.1 Carrier Antenna.....................................................................................................................................1-9 1.2.3.2 Sideband Antenna ...............................................................................................................................1-12 1.2.3.3 Balun...................................................................................................................................................1-13 1.2.3.4 Tuning Stub.........................................................................................................................................1-14 1.2.3.5 Positioning Piece.................................................................................................................................1-14 1.2.3.6 Pedestal ...............................................................................................................................................1-14 1.2.3.7 Radome ...............................................................................................................................................1-14 1.2.4 Field Monitor Antenna........................................................................................................................1-15 1.2.5 Counterpoise .......................................................................................................................................1-15 1.2.6 Equipment Shelter...............................................................................................................................1-16 1.2.7 Battery Backup Unit (Optional)..........................................................................................................1-16 1.3 EQUIPMENT SPECIFICATION DATA...........................................................................................1-16 1.3.1 Transmitter and Antenna System........................................................................................................1-16 1.3.1.1 Transmitter..........................................................................................................................................1-16 1.3.1.2 Antenna System ..................................................................................................................................1-18 1.3.1.3 Field Monitor ......................................................................................................................................1-18 1.3.2 Monitor ...............................................................................................................................................1-19 1.3.3 Mechanical and Electrical...................................................................................................................1-20 1.3.4 Remote Control System ......................................................................................................................1-20 1.3.4.1 Design Features...................................................................................................................................1-20 1.3.4.2 RCSU Controls and Indicators............................................................................................................1-21 1.3.4.3 RSU Controls and Indicators ..............................................................................................................1-21 1.3.5 Remote Maintenance Monitoring System (RMM) .............................................................................1-22 1.3.5.1 Design Features...................................................................................................................................1-22 1.3.5.2 RMM Functions..................................................................................................................................1-22 1.4 EQUIPMENT AND ACCESSORIES SUPPLIED.............................................................................1-23 1.5 OPTIONAL EQUIPMENT.................................................................................................................1-23 2TECHNICAL DESCRIPTION.............................................................................................................2-1 2.1 INTRODUCTION ................................................................................................................................2-1

Model 1150A DVOR ii Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. TABLE OF CONTENTS (cont.) Paragraph #Description Page #2.2 OPERATING PRINCIPLES.................................................................................................................2-1 2.2.1 DVOR Antenna Principles....................................................................................................................2-3 2.3 DVOR TRANSMITTER THEORY OF OPERATION........................................................................2-3 2.3.1 Simplified System Block Diagram........................................................................................................2-3 2.3.1.1 Electronics Cabinet (Unit 1)..................................................................................................................2-6 2.3.2 System Block Diagram Theory.............................................................................................................2-6 2.3.2.1 Frequency Synthesizer (1A3A1, 1A3A11) ...........................................................................................2-7 2.3.2.1.1 Frequency Synthesizer Block Diagram Theory ....................................................................................2-7 2.3.2.1.2 Frequency Synthesizer (1A3A1, 1A3A11) Detailed Circuit Theory ....................................................2-9 2.3.2.1.2.1 Frequency Reference Circuitry .............................................................................................................2-9 2.3.2.1.2.2 Carrier PLL Synthesizer Circuitry ......................................................................................................2-10 2.3.2.1.2.3 Carrier Phase Control Loop ................................................................................................................2-12 2.3.2.1.2.4 Sideband RF Generation Loops ..........................................................................................................2-14 2.3.2.2 Audio Generator CCA (1A7, 1A23) Theory.......................................................................................2-15 2.3.2.2.1 Audio Generator CCA Block Diagram Theory...................................................................................2-15 2.3.2.3 Audio Generator CCA Detailed Circuit Theory..................................................................................2-17 2.3.2.4 CSB Power Amplifier Assembly (1A5A3, 1A5A4) ...........................................................................2-19 2.3.2.4.1 CSB Power Amplifier Assembly Block Diagram Theory ..................................................................2-19 2.3.2.4.2 Power Amplifier Assembly Detailed Circuit Theory..........................................................................2-20 2.3.2.5 Bi-Directional Coupler (1DC1)...........................................................................................................2-22 2.3.2.6 Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A6, 1A5A7)....................................................2-22 2.3.2.6.1 Sideband Generator Assembly Block Diagram Theory......................................................................2-22 2.3.2.6.2 Sideband Generator CCA Detailed Circuit Theory.............................................................................2-24 2.3.2.7 RF Monitor Assembly (1A4A4) Theory.............................................................................................2-27 2.3.2.8 RF Monitor Assembly Block Diagram Theory...................................................................................2-27 2.3.2.8.1 RF Monitor Assembly (1A2) Detailed Circuit Theory .......................................................................2-28 2.3.2.9 RMS Processor Block Diagram Theory..............................................................................................2-30 2.3.2.9.1 RMS CCA Detailed Theory................................................................................................................2-32 2.3.2.10 Facilities CCA Theory ........................................................................................................................2-34 2.3.2.10.1 Facilities CCA Detailed Theory..........................................................................................................2-36 2.3.2.11 Interface CCA Theory.........................................................................................................................2-38 2.3.2.12 Interface CCA Block Diagram Theory ...............................................................................................2-38 2.3.2.12.1 Interface CCA Detailed Theory ..........................................................................................................2-39 2.3.2.13 AC Power Monitor CCA Theory........................................................................................................2-40 2.3.2.13.1 AC Power Monitor CCA Block Diagram Theory...............................................................................2-41 2.3.2.13.2 AC Power Monitor CCA Detailed Theory..........................................................................................2-41 2.3.2.14 Local Control Unit Theory..................................................................................................................2-42 2.3.2.14.1 Local Control Unit Block Diagram Theory ........................................................................................2-43 2.3.2.14.1.1 DC to DC Converter ...........................................................................................................................2-43 2.3.2.14.1.2 Power Fail Detectors...........................................................................................................................2-43 2.3.2.14.1.3 Key Switch Registers..........................................................................................................................2-43 2.3.2.14.1.4 Parallel Interface .................................................................................................................................2-43 2.3.2.14.1.5 1.8432MHz Oscillator/Divider Chains ...............................................................................................2-44 2.3.2.14.1.6 Positive Alarm Register ......................................................................................................................2-44 2.3.2.14.1.7 Negative Alarm Register.....................................................................................................................2-44 2.3.2.14.1.8 20 Second Delay Counter ...................................................................................................................2-44 2.3.2.14.1.9 LCU Transfer Control State Machine #1 and #2 and Discrete Controls.............................................2-45 2.3.2.14.1.10 LED Control........................................................................................................................................2-45 2.3.2.14.1.11 Audible Alarm ....................................................................................................................................2-45 2.3.2.14.1.12 Monitor Alarm Interface .....................................................................................................................2-45 2.3.2.14.1.13 Station Control Logic..........................................................................................................................2-45

Model 1150A DVOR iv Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. TABLE OF CONTENTS (cont.) Paragraph #Description Page #3.6.7.1.4 Hardware Revisions Screen ................................................................................................................3-12 3.6.7.2 RMS Data Screens ..............................................................................................................................3-13 3.6.7.2.1 RMS Maintenance Alerts Screen........................................................................................................3-13 3.6.7.2.2 Power Supply Data Screen..................................................................................................................3-14 3.6.7.2.3 Digital I/O Screen ...............................................................................................................................3-15 3.6.7.2.4 Temperature Data Screen....................................................................................................................3-16 3.6.7.2.5 A/D Data Screen .................................................................................................................................3-17 3.6.7.3 RMS Logs Screen ...............................................................................................................................3-18 3.6.7.3.1 Operational Summary Screen .............................................................................................................3-18 3.6.7.3.2 Alarm Log Screen...............................................................................................................................3-19 3.6.7.3.3 Maintenance Alert Log Screen............................................................................................................3-20 3.6.7.3.4 Command Activity Screen..................................................................................................................3-21 3.6.7.3.5 Parameter Change Log Screen............................................................................................................3-22 3.6.7.4 RMS Configuration Screen.................................................................................................................3-23 3.6.7.4.1 General RMS Configuration Screen ...................................................................................................3-24 3.6.7.4.2 Station Configuration Screen..............................................................................................................3-26 3.6.7.4.3 Power Supply Limits Configuration Screen.......................................................................................3-28 3.6.7.4.4 A/D Limits Configuration Screen ......................................................................................................3-29 3.6.7.4.5 Security Codes Configuration Screen .................................................................................................3-30 3.6.7.4.5.1 User Account Maintenance.................................................................................................................3-30 3.6.7.4.5.2 Add a User Account............................................................................................................................3-30 3.6.7.4.5.3 Change a User’s Password..................................................................................................................3-31 3.6.7.4.5.4 Delete a User’s Account .....................................................................................................................3-31 3.6.7.5 RMS Commands.................................................................................................................................3-32 3.6.8 Monitor Screens..................................................................................................................................3-35 3.6.8.1 All Monitor Screens............................................................................................................................3-35 3.6.8.1.1 Monitors Data Screens........................................................................................................................3-35 3.6.8.1.1.1 Integral Monitor Data Screen..............................................................................................................3-35 3.6.8.1.1.2 Notch Monitor Data Screen ................................................................................................................3-36 3.6.8.1.1.3 Sideband Antenna VSWR Screen.......................................................................................................3-37 3.6.8.1.2 Monitor Configuration Screens...........................................................................................................3-38 3.6.8.1.2.1 General Configuration Screen.............................................................................................................3-38 3.6.8.1.2.2 Monitor Alarm Limit Configuration Screen .......................................................................................3-39 3.6.8.1.3 Monitor Commands ............................................................................................................................3-40 3.6.8.2 Monitor 1 & 2 Screens........................................................................................................................3-40 3.6.8.2.1 Monitor Data Screens..........................................................................................................................3-40 3.6.8.2.1.1 Integral Monitor Data Screen..............................................................................................................3-41 3.6.8.2.1.2 Monitor Status Screen.........................................................................................................................3-42 3.6.8.2.2 Monitor Test Results Screens..............................................................................................................3-43 3.6.8.2.2.1 Completed Test Results ......................................................................................................................3-44 3.6.8.2.2.2 In Process Test Results .......................................................................................................................3-45 3.6.8.2.2.3 Monitor1>>Test Generator Screen .....................................................................................................3-46 3.6.8.2.3 Monitor Fault History Screens............................................................................................................3-47 3.6.8.2.3.1 Integral Monitor Fault History Screen ................................................................................................3-47 3.6.8.2.3.2 Local Control Unit Fault History System Status Screen.....................................................................3-48 3.6.8.2.4 Monitor Offsets and Scale Factors......................................................................................................3-49 3.6.8.2.5 Monitor Test Signal Output Control ...................................................................................................3-50 3.6.8.3 Transmitter Data Screens....................................................................................................................3-51 3.6.8.3.1 Transmitter Data Screen......................................................................................................................3-51 3.6.8.3.2 VOR Ground Check Data Screen .......................................................................................................3-52 3.6.8.3.3 VOR Ground Check Data Advanced Screen ......................................................................................3-53

Model 1150A DVOR vi Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. TABLE OF CONTENTS (cont.) Paragraph #Description Page #6.2.4 Monitor 30 Hz and 9960 Hz Modulation Percentage and Deviation Ratio Performance Check ..........6-2 6.2.5 Modulation Frequency Performance Check..........................................................................................6-3 6.2.6 Antenna VSWR Performance Check ....................................................................................................6-3 6.2.7 Automatic Transfer Performance Checks (Dual Equipment only) .......................................................6-3 6.2.8 VOR Monitor Performance Check........................................................................................................6-3 6.2.9 Monitor Integrity Test of VOR Monitor (Refer to Section 3.6.8.2.2)...................................................6-4 6.2.10 RSCU Operation Performance Check...................................................................................................6-4 6.2.10.1 Single Equipment Performance Check .................................................................................................6-4 6.2.10.2 Dual Equipment Performance Check...................................................................................................6-4 6.2.11 Identification Frequency and Modulation Level Checks ......................................................................6-4 6.3 Equipment Inspection Procedures.........................................................................................................6-5 6.3.1 Site Inspection.......................................................................................................................................6-5 6.3.2 Inspection of Transmission Antennas ...................................................................................................6-5 6.3.3 Inspection of the Field Monitor Antenna ..............................................................................................6-5 6.3.4 Transmitter Cabinet Inspection.............................................................................................................6-6 6.3.5 Battery Backup Unit Inspection............................................................................................................6-6 6.4 ALIGNMENT PROCEDURES............................................................................................................6-6 6.4.1 Battery Charging Power Supply (BCPS) Alignment Procedures..........................................................6-6 6.4.1.1 System AC Voltage Alignment.............................................................................................................6-6 6.4.1.2 System AC Current Alignment.............................................................................................................6-6 6.4.1.3 Obstruction Light AC Voltage Alignment............................................................................................6-7 6.4.1.4 Obstruction Light AC Current Alignment ............................................................................................6-7 6.4.2 Alarm Volume Adjustment Procedure..................................................................................................6-8 6.4.3 RMS Facilities Exterior and Interior Temperature Calibration.............................................................6-8 6.4.4 Reassign Main/Standby Transmitters (Dual Systems Only).................................................................6-8 6.4.5 Verification of BITE VSWR Calibration..............................................................................................6-8 6.4.6 Verification of BITE Frequency Counter Calibration...........................................................................6-9 6.4.7 Verification of BITE Wattmeter Calibration ........................................................................................6-9 6.4.8 RMS Lithium Battery Check Procedure .............................................................................................6-10 6.4.9 Replacing RMS CPU (1A3A6) CCA..................................................................................................6-10 6.4.10 Update of DVOR Software.................................................................................................................6-11 6.4.11 Changing the Station Rotation (Azimuth)...........................................................................................6-11 6.4.12 Changing the Monitoring Offsets........................................................................................................6-11 6.4.13 DME Keying Check............................................................................................................................6-12 6.4.14 DVOR Frequency Synthesizer Alignment..........................................................................................6-12 6.4.15 DVOR Sideband Amplifier Alignment...............................................................................................6-13 6.4.16 Antenna VSWR Check for New Frequency .......................................................................................6-14 7CORRECTIVE MAINTENANCE .......................................................................................................7-1 7.1 INTRODUCTION ................................................................................................................................7-1 7.2 TEST EQUIPMENT REQUIRED........................................................................................................7-1 7.3 ON-SITE CORRECTIVE MAINTENANCE.......................................................................................7-1 7.3.1 General Troubleshooting Information...................................................................................................7-1 7.3.2 Test Point Waveform References..........................................................................................................7-1 7.4 OFFSITE REPAIR................................................................................................................................7-4 7.5 PACKING INSTRUCTIONS...............................................................................................................7-4 8PARTS LIST.........................................................................................................................................8-1 8.1 INTRODUCTION ................................................................................................................................8-1 9INSTALLATION, INTEGRATION, AND CHECKOUT ...................................................................9-1 9.1 INTRODUCTION ................................................................................................................................9-1 9.2 SITE INFORMATION .........................................................................................................................9-1 9.2.1 Shelter Requirements ............................................................................................................................9-1

Model 1150A DVOR viii Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. TABLE OF CONTENTS (cont.) Paragraph #Description Page #9.7.13.8 Saving No. 1 Transmitter Operating Parameters.................................................................................9-21 9.7.14 Setting Monitor Alarm Limits.............................................................................................................9-21 9.7.14.1 Setting Monitor Az Angle Low Limit.................................................................................................9-21 9.7.14.2 Setting Monitor Az Angle High Limit................................................................................................9-22 9.7.14.3 Setting High Monitor 30 Hz Mod Low Limit.....................................................................................9-22 9.7.14.4 Setting Monitor 30 Hz Mod High Limit .............................................................................................9-22 9.7.14.5 Setting Monitor 9960 Hz Mod Low Limit..........................................................................................9-22 9.7.14.6 Setting Monitor 9960 Hz Mod High Limit .........................................................................................9-22 9.7.14.7 Setting Monitor 9960 Hz Dev Low Limit...........................................................................................9-22 9.7.14.8 Setting Monitor 9960 Hz Dev High Limit ..........................................................................................9-23 9.7.14.9 Setting Monitor Field Intensity Low Limit.........................................................................................9-23 9.7.14.10 Setting Monitor Field Intensity High Limits.......................................................................................9-23 9.7.15 Records ...............................................................................................................................................9-23 9.8 INSTALLATION VERIFICATION TEST ........................................................................................9-23 9.8.1 Special Tests .......................................................................................................................................9-23 10 SOFTWARE.......................................................................................................................................10-1 10.1 INTRODUCTION ..............................................................................................................................10-1 11 TROUBLESHOOTING SUPPORT ...................................................................................................11-1 11.1 INTRODUCTION ..............................................................................................................................11-1

Model 1150A DVOR xRev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. LIST OF FIGURES (cont.) Figure # Description Page #Figure 3-13 RMS A/D Data Screen...........................................................................................................................................3-17 Figure 3-14 RMS Operational Summary Screen ......................................................................................................................3-18 Figure 3-15 RMS Alarm Log Screen.........................................................................................................................................3-19 Figure 3-16 RMS Maintenance Alert Log Screen.....................................................................................................................3-20 Figure 3-17 RMS Command Activity Log Screen ...................................................................................................................3-21 Figure 3-18 RMS Parameter Change Log Screen.....................................................................................................................3-22 Figure 3-19 RMS General Configuration Screen......................................................................................................................3-24 Figure 3-20 Station Configuration Screen .................................................................................................................................3-26 Figure 3-21 Backplane DIP Switches Screen............................................................................................................................3-27 Figure 3-22 Power Supply Limits Configuration Screen..........................................................................................................3-28 Figure 3-23 A/D Limits Configuration Screen..........................................................................................................................3-29 Figure 3-24 Security Codes Configuration Screen....................................................................................................................3-30 Figure 3-25 RMS Commands ....................................................................................................................................................3-32 Figure 3-26 RMS Commands – Selection of Digital Output Level.........................................................................................3-33 Figure 3-27 RMS Commands – Selection of Digital Output Level.........................................................................................3-33 Figure 3-28 RMS Commands - BCPS Charger Enable and Disable.......................................................................................3-34 Figure 3-29 RMS Commands - DME Controls ........................................................................................................................3-34 Figure 3-30 Integral Monitor 1 & 2 Data...................................................................................................................................3-35 Figure 3-31 Notch Monitor 1 & 2 Data .....................................................................................................................................3-36 Figure 3-32 Sideband Antenna VSWR Data Screen.................................................................................................................3-37 Figure 3-33 General Monitor Configuration .............................................................................................................................3-38 Figure 3-34 Monitor Alarm Limits ............................................................................................................................................3-39 Figure 3-35 Monitor Commands................................................................................................................................................3-40 Figure 3-36 Integral Monitor Data Screen.................................................................................................................................3-41 Figure 3-37 Integral Monitor Status Screen...............................................................................................................................3-42 Figure 3-38 Completed Monitor Integrity Test Results Screen................................................................................................3-44 Figure 3-39 In-Process Monitor Integrity Test Results Screen.................................................................................................3-45 Figure 3-40 Test Generator Screen ............................................................................................................................................3-46 Figure 3-41 Integral Monitor Fault History Screen...................................................................................................................3-47 Figure 3-42 Local Control Unit Fault History System Status Screen.......................................................................................3-48 Figure 3-43 Monitor Offsets and Scale Factors.........................................................................................................................3-49 Figure 3-44 Monitor Test Signal Selection................................................................................................................................3-50 Figure 3-45 Transmitter Data Screen.........................................................................................................................................3-51 Figure 3-46 Ground Check Data Screen....................................................................................................................................3-52 Figure 3-47 Advanced Ground Check Data Screen..................................................................................................................3-53 Figure 3-48 Transmitter Status Screen.......................................................................................................................................3-54 Figure 3-49 Nominal Transmitter Configuration Screen..........................................................................................................3-55 Figure 3-50 Transmitter Offsets and Scale Factors Screen.......................................................................................................3-56 Figure 3-51 Transmitter Commands Menu...............................................................................................................................3-57 Figure 3-52 Hold Commutator Control Menu...........................................................................................................................3-57 Figure 3-53 Power-Up Diagnostics Results Screen ..................................................................................................................3-58 Figure 3-54 VOR Fault Isolation Screen ...................................................................................................................................3-59 Figure 3-55 Local Control Unit (LCU)......................................................................................................................................3-62 Figure 3-56 LCU Integral Monitor 1 Display............................................................................................................................3-63 Figure 3-57 LCU Integral Monitor 2 Display............................................................................................................................3-63 Figure 3-58 LCU Facilities Voltage and Current readings .......................................................................................................3-63 Figure 3-59 LCU Module Temperature readings......................................................................................................................3-63 Figure 3-60 LCU Transmitter Temperature Readings ..............................................................................................................3-64 Figure 3-61 LCU Transmitter Controls and Indicators.............................................................................................................3-65 Figure 3-62 LCU Monitor/System Controls and Indicators.....................................................................................................3-65 Figure 3-63 BCPS Assembly Controls and Indicators..............................................................................................................3-67

Model 1150A DVOR xii Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. LIST OF TABLES Figure # Description Page #Table 1-1 DVOR Equipment Specifications (Transmitter)...................................................................................................1-16 Table 1-2 DVOR Equipment Specifications (Antenna System)...........................................................................................1-18 Table 1-3 DVOR Equipment Specifications (Field Monitor)...............................................................................................1-18 Table 1-4 DVOR Equipment Specifications (Monitor).........................................................................................................1-19 Table 1-5 DVOR Equipment Specifications (Mechanical and Electrical)...........................................................................1-20 Table 1-6 RCSU Controls and Indicators...............................................................................................................................1-21 Table 1-7 RSU Controls and Indicators..................................................................................................................................1-21 Table 1-8 Equipment and Accessories Supplied....................................................................................................................1-23 Table 1-9 Optional Test Equipment........................................................................................................................................1-23 Table 1-10 Optional Station Equipment...................................................................................................................................1-24 Table 2-1 Commutator Driver/Antenna Switch Sequence....................................................................................................2-71 Table 2-2 VOR Ground check Offset Table ..........................................................................................................................2-71 Table 3-1 PMDT Available Functions .....................................................................................................................................3-3 Table 3-2 VOR Security Levels................................................................................................................................................3-6 Table 3-3 General Configuration Parameters.........................................................................................................................3-25 Table 3-4 Dual Equipment Control Panel Functions.............................................................................................................3-62 Table 3-5 Equipment Control Panel Functions (Refer to Figure 3-61).................................................................................3-64 Table 3-6 Equipment Control Panel Functions......................................................................................................................3-66 Table 3-7 Equipment Control Panel Functions......................................................................................................................3-66 Table 3-8 Equipment Controls & Indicators..........................................................................................................................3-67 Table 3-9 Carrier Amplifier (1A5A3/1A5A4).......................................................................................................................3-68 Table 3-10 Monitor CCA (1A3A3, 1A3A10) Controls and Indicators..................................................................................3-69 Table 3-11 Equipment Controls and Indicators .......................................................................................................................3-70 Table 3-12 Equipment Controls and Indicators .......................................................................................................................3-71 Table 3-13 Synthesizer CCA (1A3A1, 1A3A11) Controls and Indicators ............................................................................3-72 Table 3-14 Sideband Generator (1A4A1, 1A4A2, 1A4A5, 1A4A6) Controls and Indicators..............................................3-74 Table 3-15 Audio Generator CCA (1A3A2, 1A3A9) Controls and Indicators......................................................................3-75 Table 3-16 Test Generator CCA (1A3A5) Controls and Indicators .......................................................................................3-76 Table 3-17 RF Monitor CCA (1A4A4) Controls and Indicators............................................................................................3-77 Table 4-1 Standards and Tolerances.........................................................................................................................................4-1 Table 5-1 Performance Check Schedule ..................................................................................................................................5-1 Table 6-1 Test Equipment.........................................................................................................................................................6-1 Table 6-2 Typical Mean Phaser Settings vs Frequency.........................................................................................................6-14 Table 8-1 Dual 1150A DVOR Parts List PN 001150A-0202...............................................................................................8-1 Table 8-2 Model 1150A DVOR Kits and Optional Equipment..............................................................................................8-1 Table 9-1 Tools and Test Equipment........................................................................................................................................9-2 Table 9-2 Tools Needed for Installation...................................................................................................................................9-2 Table 9-3 External Keying Connection Locations...................................................................................................................9-8 Table 9-4 Frequency Selection Chart .....................................................................................................................................9-14

Model 1150A DVOR 1-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 1-2 Dual Doppler VHF Omni-range (DVOR) Station with DME 1.2 EQUIPMENT DESCRIPTIONThe DVOR system provides a reference from which aircraft bearing can be determined. To do this, a carrier is radiated in the 108 to 118 MHz band and modulated by two 30 Hz signals. One amplitude modulates and the other frequency modulates (also called the reference phase and variable phase signals, respectively) the carrier signal. This is done in such a way that the phase difference of the 30 Hz signals varies degree for degree with the magnetic bearing around the VOR station. The DVOR system consists of one electronics cabinet with sub-assemblies, a Portable Maintenance Data Terminal (PMDT), one reference (carrier) antenna and 48 sideband antennas installed on a counterpoise, one field monitor antenna, and interconnecting cables. The DVOR electronics cabinet standard configuration uses convection cooling. No fans or blowers are installed in the cabinet. 1.2.1 Electronics CabinetThe 1150A VOR is contained in one (1) electronics cabinet measuring 24" wide, 24" deep and 72" high. It utilizes a standard 19" rack configuration with a front panel door that covers and protects the equipment. The Model 1150A is 100% solid-state. Its internal circuitry is contained on plug-in type printed circuit card assemblies (CCAs) and RF modules. Refer to Figure 1-3 through Figure 1-6 which show the layout of the various modules within the Model 1150A VOR cabinet. The paragraphs on the following pages provide a brief description of each of the modules and its function in the system. Note that the cabinets shown are dual equipment systems. Refer to Figure 2-2 and Figure 2-3 for the Model 1150A Doppler VOR system block diagram.

Model 1150A DVOR 1-4 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 1-3 Location of Major Assemblies in the Electronics Cabinet (Front View)

Model 1150A DVOR 1-6 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 1-5 Location of Commutator (1A10) Assembly in the Electronics Cabinet (Left Side View) Figure 1-6 Location of Commutator (1A11) Assembly in the Electronics Cabinet (Right Side View)

Model 1150A DVOR 1-8 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The switch positions start at 0 and increment by one until 15. Each position represents 22.5 degrees of antenna rotation from the nominal position. At each position the Monitor CCA determines the azimuth angle at the Field Monitor antenna location. From this data the errors are measured and a Fourier Analysis is performed to generate the display data. The error as determined during the ground check is analyzed to determine the bias, the duantal error, quadrantal error and octantal error. The bias error is the average error around the station. The duantal error is sinusoidal with a rate of one cycle in the 360 degrees around the station. The quandrantal error is sinusoidal with a rate of two cycles in the 360 degrees around the station. The octantal error is sinusoidal with a rate of four cycles in the 360 degrees around the station A4-pin header on the Commutator Control CCA may be strapped to enable/disable the DVOR automatic ground-check as desired. WARNING Enabling the automatic ground-check test changes the signal in space and will cause unsafe conditions for aircraft. A notice to airmen (NOTAM) must be issued prior to starting this 1.2.1.12 Battery Charging Power Supply (BCPS) Assembly (1A5A1, 1A5A2) The BCPS assemblies provide regulated voltage to the transmitter from either the AC input or the batteries. The BCPS assemblies are located in the third rack. The AC voltage is an input to the BCPS which converts to approximately 50 Volts DC. The BCPS assemblies are also responsible for charging the batteries when AC is present. 1.2.1.13 Carrier Power Amplifier Assembly (1A5A3, 1A5A4) The Carrier Amplifier has one assembly. The Carrier Amplifier circuit card assembly, which is also the module’s I/O, processes the control signals from the Audio Generator to properly control the desired output RF modulation and amplitude. This assembly is capable of providing 100 Watts or more of Carrier power at up to 80% AM modulation. 1.2.1.14 Interface CCA (1A9)The Interface CCA provides interface connections between the RMS/Facilities/Control Backplane CCAs and the outside world. Examples include spare analog and digital inputs, spare digital outputs, temperature sensors, smoke detector, and intrusion sensor. RS232 communications are provided to RCSU and PMDT terminals as well as an Ethernet module. All signals are protected by transient voltage suppression (TVS) devices on the Interface CCA before exiting. 1.2.1.15 AC Power Monitor Assembly (1A6)The AC Power Monitor CCA provides a means for the VOR system to measure the AC current and voltage levels of the obstruction lights and of the VOR system itself. Provision for operating with a photo switch is incorporated. A capability to bypass the photo switch for the obstruction lights is provided. 1.2.1.16 Commutator CCA (1A10, 1A11)Each commutator CCA measures 15-7/8" high and 14-7/8" wide. There are two commutator CCAs installed in the top of the electronics cabinet. They are located on the upper left and upper right side and may be accessed by removing the cabinet side panels. The right (viewed from the front) commutator CCA is used to switch the RF signals to all the odd antennas, and the left commutator CCA drives the even antennas. Each commutator has twenty-six N type RF connectors and two 37-pin D-shell connectors. 1.2.2 Portable Maintenance Data Terminal (PMDT)The standard PMDT consists of a laptop computer and is the input/output device for controlling and communicating with the DVOR system. Station control, adjustment and monitoring functions are available through the computer, and are accessed via a Windows-based operator interface. An optional external mouse may be used with the laptop computer for ease in operation. An optional desktop PC is available as a substitute for the standard laptop computer. Also, an optional printer is available for use with either the laptop or desktop PC.

Model 1150A DVOR 1-10 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 1-7 Carrier Antenna for collocation with DME/TACAN

Model 1150A DVOR 1-12 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 1.2.3.2 Sideband Antenna Refer to Figure 1-9.Each sideband antenna is an Alford loop, similar to the carrier antenna but without the large hole in the support plate. This antenna is electrically tuned to the station frequency by means of single high voltage, glass capacitor. The antennas are mounted independently on individual support plates, supported above the counterpoise by metal pedestals equal in height to the carrier antenna. Figure 1-9 Sideband Antenna

Model 1150A DVOR 1-14 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 1.2.3.4 Tuning StubRefer to Figure 1-10.The tuning stub is a line section made out of RG-214 cable with a connector on one end and open at the other end. The function of the stub is to supply the needed capacitive reactance to make the point of the stub attachment pure resistive. 1.2.3.5 Positioning PieceRefer to Figure 1-10.The positioning piece is a length of RG-214 cable with a connector at each end. The purpose of the positioning piece is to place the tuning stub at a point on the input line where the resistive component of the complex impedance is equal to the characteristic impedance of the line (50 ohms). The length of the positioning piece is factory selected for the frequency band of operation. 1.2.3.6 PedestalRefer to Figure 1-11.The pedestal is a 6061-T6 aluminum tube with mounting plates on each end. The pedestal supports the Alford loop antenna and provides a conduit for the feed cable, balun, positioning piece, and tuning stub. 1.2.3.7 RadomeRefer to Figure 1-11.The radome is a fiberglass enclosure that protects the radiating elements of the antenna from the weather and vermin infestation. Figure 1-11 Antenna Pedestal and Radome Diagram

Model 1150A DVOR 1-16 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 1.2.6 Equipment ShelterThe electronic part of the DVOR (transmitter cabinet and commutator rack) is housed in a shelter environmentally-controlled with heating, cooling and ventilation. Normally, the shelter is installed below the counterpoise and directly underneath the carrier antenna. 1.2.7 Battery Backup Unit (Optional)The battery backup supply contains two battery boxes each containing two lead-acid maintenance-free batteries in a 48VDC configuration. Additional backup capacity can be achieved by adding additional groups of four batteries. 1.3 EQUIPMENT SPECIFICATION DATAEquipment specifications are listed in Table 1-1.1.3.1 Transmitter and Antenna System1.3.1.1 TransmitterTable 1-1 DVOR Equipment Specifications (Transmitter) Parameter Specification Carrier Frequency Range: 108 to 118 MHz with 50 kHz channel spacing. Frequency Control: Synthesizer Carrier Frequency Tolerance: ±0.0005% (5 PPM) Carrier Output Power: Transmitter output power adjustable from 25 to 100 Watts (14 to 20 dBW) in 1 Watt increments Effective Radiated Power: 23 dBW minimum with a transmitter output of 100 Watts Carrier Level Shift: less than 0.5% for modulation depth up to 80% Duty Cycle: Continuous Spurious Outputs: greater than 77 dB below the carrier at 30% modulation Harmonic Radiation: Meets or exceeds U.S. FCC requirements. Harmonics of 9960 Hz meet or exceed: Second harmonic >30 dB lower than fundamental Third harmonic >50 dB lower than fundamental Fourth and higher harmonics >60 dB lower than fundamental Hum and Noise: With voice, VOR reference and identification inputs, hum and noise on the carrier are more than 30 dB below the audio level equivalent of 30% modulation. Maximum Range: Line-of-sight, 175 nautical miles at 37,500 feet (11,433 M) above the facility. Accuracy: When site meets requirements of ICAO, bearing information on the horizontally-polarized radiation is within ±1.0° (at a distance of approximately 1000 feet (300 meters) for all elevation angles between 0 and 60 degrees, measured from the center of the VOR antenna.

Model 1150A DVOR 1-18 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 1.3.1.2 Antenna SystemTable 1-2 DVOR Equipment Specifications (Antenna System) Parameter Specification Type: Alford loop Frequency Range: 108 to 118 MHz, field-tunable Polarization: Horizontal Antenna System Bearing Error: less than 0.5° DME Co-Location: Permits coaxial mounting of DME antenna above carrier Weather Protection Fiberglass radome Blending Function: COS .836XNumber of Antenna: 48 Sideband, 1 Carrier Modulation Type: Double-Sideband Commutator Type: Solid-State Frequency Range: 108-118 MHz broadband, no tuning Blocking Attenuation (Switches Off) Greater than 80 dB Insertion Loss: 0.5 dB maximum Difference in Insertion Loss: Less than .05 dB Phase Balance Less than 2 degrees VSWR: Less than 1.15:1 Lightning Protection Provided on each Commutator output 1.3.1.3 Field MonitorTable 1-3 DVOR Equipment Specifications (Field Monitor) Parameter Specification Antenna Type: Dipole Number of Antennas: 1 Standard, 2 Optional Frequency Range: 108 to 118 MHz Output: Composite VOR signal, RF Installation: Located at minimum of 91.4m (300 ft) from center of counterpoise and level with counterpoise Position: Any azimuth angle VSWR: U1.5:1 at 112 MHz

Model 1150A DVOR 1-20 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 1.3.3 Mechanical and ElectricalTable 1-5 DVOR Equipment Specifications (Mechanical and Electrical) Parameter Specification Size of Cabinet: 72" H x 24" W x 24" D (183cm H x 61cm W x 61cm D) Weight of Cabinet: 450 lb (205 kg) maximum Mounting Floor mount Primary Power: 85 to 264 VAC, 47 to 63Hz, single phase Standby Power: Standard 48 VDC no-break battery backup system (four 12V-65Ah batteries) with charger provides approximately 4.0 hours of operation. Optional 48VDC no-break battery backup system (four 12V-100Ah batteries) with charger provides approximately 6.0 hours of operation. Power Consumption: Single Stations: 375VA (typical), 625 VA with maximum battery charging. Dual Stations: 500VA (typical), 750VA with standby transmitter operating for test purposes. Duty Cycle: Continuous 1.3.4 Remote Control System1.3.4.1 Design FeaturesThe optional remote control system consists of a Model 2238 or Model 2240 Remote Control and Status Unit (RSCU) and one Remote Slave Unit (RSU). The 2238 RCSU is designed for installation in a standard 13.33 cm (5.25") rack panel space in a Control Tower Equipment Room. The 2240 RCSU is designed for installation in a standard 6.66 cm (2.12") rack panel space in a Control Tower Equipment Room and the RSU’s are designed for installation at a controllers’ position in the Tower Cab. The 2238 RCSU contains provisions for six ILS Localizer, Glideslope, Outer Marker and Middle Marker and DME and VOR stations. The 2240 RCSU contains provisions for up to three ILS Localizer, Glideslope, Outer Marker, Middle Marker, DME, or VOR stations. Each of the respective stations is connected to the RCSU by an RF data link or a single dedicated telephone line pair. The RSU is then slaved to the RCSU by interconnecting cables.

Model 1150A DVOR 1-22 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 1.3.5 Remote Maintenance Monitoring System (RMM)1.3.5.1 Design FeaturesThe Remote Maintenance Monitoring (RMM) system operates in conjunction with the local control system and Portable Maintenance Data Terminal (PMDT). The RMM is an integral part of the DVOR system and consists of the various embedded sensors, internal monitoring points, microcomputers and built-in test equipment to remotely monitor, control, record and certify proper operation of the system. The RMM system is accessed locally through the built-in RS-232 port, and remotely through a dial-up telephone line, fiber optic line, radio link or GSM telephone connection, and a Portable Maintenance Data Terminal (PMDT). The telephone line, fiber optic line, radio link, or GSM telephone connections are all optional. The choice of which communication system is to be utilized for a particular installation, and who is to supply it, is determined by individual contract. In addition, the Remote Control and Status Unit (RCSU) computer and modem may be utilized for dial-up access to the RMM system. 1.3.5.2 RMM FunctionsThe RMM system provides the following key functions: a. System control. b. Adjustment of transmitting parameters. c. Monitoring of system performance and certification parameters. Compares the outputs of each of the monitoring devices at least once per second to determine alarm and alert status by comparing the monitored values to pre-determined limits. d. Adjustment of all alarm and alert monitoring limits. e. Monitor Certification through the system test generator. f. Storage of monitor alert and alarm data, control settings, operational parameters and limits, initialization data, data files and fault history locally within the RMS. Storage of parameters is backed by either lithium battery or EEPROM for a non-volatility of 90 days or greater. DVOR parameters may be stored to and retrieved from the PMDT for a permanent record. g. System Fault Diagnostic routines with result reporting and storage in memory. “On-Air” diagnostic routines may be initiated either locally at the station or remotely. By default, diagnostic routines which require the station to be NOTAMed out of service must be run locally. The station may be user re-configured, if desired, to allow all diagnostic routines to be run from a remote location. h. Monitoring of routine maintenance parameters including voltages and currents and antenna VSWR. i. Monitoring of environmental parameters (when optional sensors are installed). j. Monitoring the presence or absence of Primary AC Power applied to the system. k. Printing of menus and all display/parameter values (when optional printer is supplied). l. Provide clock calendar function within the RMS. The display is date, hours, minutes and seconds. The current time and date may be set from the PMDT. The RCSU provides the master clock update at periodic intervals. The accuracy is to within 15 seconds per month and retains the clock/calendar function even when power is lost by the use of a lithium battery. The lithium battery can maintain the operation of the clock for up to 180 days. m. Provide building security monitoring (optional). For this system, an intrusion sensor is installed on the DVOR equipment shelter door. If the door is open longer than 0.25 seconds, and the security feature has not been bypassed through the PMDT within a programmable period of 0 to 5 minutes, an alarm message is generated. Disconnecting the PMDT starts a 0 to 30 minute programmable timer before the intrusion sensor is reset. The default settings are 5 minutes for the bypass period and 30 minutes for the reset period. Activation, disabling, reset and bypass of the Intrusion sensor is supported both locally and remotely. n. Provide monitoring of an optional ionization type smoke detector. Detection of smoke generates an alarm message.

Model 1150A DVOR 1-24 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Table 1-10 Optional Station Equipment Quantity Nomenclature Part No. 1Battery Backup System 12V-100Ah 470639-0003 1Environmental Sensors (Smoke, Temperature, Intrusion) 470357-0003 1Extender Cables 470449-0001 1Wattmeter Bodies Kit 470451-0001 1Field Monitor Obstruction Lighting Incandescent - 120V 470630-0001 -240V 470630-0002 LED - 120V 470630-0003 -240V 470630-0004 1Printer – Universal AC Input 950311-0003

Model 1150A DVOR 2-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 2-1 RF Spectrum of a Doppler VOR The deviation frequency is determined by the formula: xx=fdWhere: fdequals the deviation frequency in hertz. Wequals the angular velocity of the signal (30 Hz). Xequals the diameter of the ring in wavelengths. Yequals 3.14. 30f=rddIn the aircraft receiver, a 30 Hz signal is extracted from the 9960 Hz FM subcarrier. The phase of this second 30 Hz signal varies linearly with the change of the azimuth bearing of the receiving point; for each degree of azimuth change, the phase of the 30 Hz variable phase signal changes by one degree.

Model 1150A DVOR 2-4 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The RF monitor assembly functions as an RF detector/amplifier and distributor of the detected RF signals. The assembly also contains the dummy load for the standby transmitter carrier RF signal. The RF Monitor includes built-in dummy loads for the four sideband signals. The Audio Generator CCA generates and processes all of the modulation signals transmitted by a DVOR transmitter and generates the power level and phase control signals needed to operate the transmitter and commutator. It is also responsible for monitoring the operational status of the transmitter. The DVOR system uses two sideband generator assemblies for each transmitter. Each sideband generator contains one Sideband Generator CCA. The Sideband Generator amplifies the CW RF signal from the frequency synthesizer to the operational output power levels. MONITOR MONITORRMSCO-LOCATEDDME / TACANRCSULOCALCONTROLUNIT(LCU)PMDTINTERFACECIRCUITCARDBCPS1BCPS2LVPSLVPS+28+12-12+5+28+12-12+5Synth DisableAudio ModulationDisableField Monitor AntennaRestartVORStatusKeying, RMMRemote ControlAlarm IndicationCurrent Data, Settings Current Data, Settings-50 to +10 dBmAlarm Indication Figure 2-2 Simplified DVOR Control and Monitoring Block Diagram

Model 1150A DVOR 2-6 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Refer to Figure 2-3.The Remote Maintenance System Processor (RMS) handles all command, control, communications and information for the DVOR system. Amonitor antenna located on any radial in the far field provides an RF signal which is equally divided and sent to the VOR monitors for processing and analysis. The VOR monitor CCA works independently from the transmitter and from each other; however, the alarm control features of both monitors can be organized to function in a logical AND or logical OR arrangement. The Local Control Unit (LCU) is responsible for turning off the transmitters and transferring from Main to Standby transmitters. The LCU contains hardware logic that acts on alarm inputs from the Monitors. The LCU has two controls to each transmitter to remove radiation in case of out-of-tolerance conditions. The LCU is responsible for controlling the transfer relays and reporting the current state of the relays as to which transmitter is connected to the antenna. The transmitter cabinet contains the assemblies needed to control the electronic switching of the sideband antennas. 2.3.1.1 Electronics Cabinet (Unit 1)The VOR electronics cabinet assembly contains all of the electronic assemblies that generate, control, and monitor the DVOR modulated radio frequencies. The cabinet contains three separate card cage assemblies that hold the transmitter and RMS modules. It provides the means to physically secure the modules within the electronics cabinet and provides for the interconnection of the modules. Attached, but independent from it, are the five coaxial latching relays mounted to the middle card cage directly behind the RF monitor assembly. The relays are latched by applying a ground pulse to either the latch or release coil. The relays are powered from a common 28 volt source. The relays switch the ten RF inputs (main and standby) between the antenna system and the dummy loads. They also provide DC logic signals which are used by the Monitors and Audio Generators to sense which transmitter system is connected to the antenna system. The DC logic signal is supplied to the Audio Generator to enable commutator switching signals and identification to be applied from the on-air Audio Generator CCA. 2.3.2 System Block Diagram TheoryRefer to Figure 2-2 and Figure 2-3.The DVOR system block diagram depicts the main components (both optional and required) of a functional station and identifies primary signal, control and voltage paths within the station. The DVOR system is contained in an electronics cabinet assembly. Connected to this DVOR cabinet are the PMDT, carrier antenna, sideband antennas, field monitor antenna, and optional backup batteries. The electronics cabinet is next broken down into its main components which are a Local Control Unit (LCU), RMS, main and standby transmitters, VOR monitor CCAs, RF monitor, changeover relays, battery charger power subsystems (BCPS). The LCU contains the displays that provide a visual indication of the status of the VOR system along with control to change the operational states of the DVOR. The RMS group handles all command, control, communications, and information for the station. The main transmitter consists of a frequency synthesizer assembly, CSB power amplifier assembly, directional coupler, audio generator CCA, and two sideband generators. Supplying the voltage for the main transmitter is a stand-alone battery charger power subsystem, and a Low Voltage Power Supply (LVPS). The frequency synthesizer assembly contains three CCAs. They are the carrier CCA, the Sideband CCA and the Interconnect CCA. This assembly produces the three interrelated RF signals used by the DVOR. The on-channel carrier RF signal drives the CSB power amplifier assembly. The upper and lower sideband RF signals drive the two sideband generator assemblies.

Model 1150A DVOR 2-8 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Refer to Figure 2-4.The carrier frequency is generated by a PLL synthesizer, referenced to the precision 200 KHz signal. A voltage controlled oscillator, or VCO, generates the RF signal. This signal is buffered, and a portion of the signal fed back to the PLL controller, where it is divided by a programmable divider. The divided output is compared to the precision 200 KHz reference signal in the PLL controller’s phase comparator. The phase comparator generates an error voltage signal that is filtered and applied to the voltage control input of the VCO, thus locking the VCO output frequency to the reference. VOR channel selection is accomplished by changing the divide ratio of the PLL controller’s divider. This divide ratio is programmed into the PLL controller by a serial port interface (SPI) located in the audio generator CCA. The output of the carrier synthesizer is split and routed to the carrier phaser, the carrier phase reference, the front panel test port buffer amplifier, and the sideband board in the synthesizer assembly. The test port buffer amplifier is located on the 012262 Interface CCA, on the backside of the frequency synthesizer module. The output of this buffer is attenuated to provide the 10 mW typical carrier frequency output signal available on the front panel SMA connector. The attenuator also serves to provide a resistive load for the buffer when no external load is connected to the SMA connector. The 012262 boards serve as an interface with the Synthesizer (012258) and Carrier (012263) boards to communicate with the system through the backplane. The 012262 board also contains circuitry for sideband generation and power supplies for each of the boards mounted. The 012258 and the 012263 board each have a 30 pin header for connecting to the 012262 Interface board. The 012258 and 012263 boards are mounted in a housing to provide isolation between the carrier and sideband signals. DIVIDE BY 50 (200KHz REF)TEST PORT BUFFERCARRIER AMPLIFIERCARRIER LOOP CONTROLLER LOOP FILTER VCO AND BUFFERSAUDIO GENERATOR SPI BUFFERFREQ/2560 DIVIDERFrom Audio GeneratorFRONT PANEL TEST POINTCARRIER MEAN AND DYNAMIC PHASERPHASE DETECTORVOR SYSTEM CARRIER AMPLIFIER(EXTERNAL)VOR SYSTEM CARRIER OUTPUTPHASE SHIFTER AND BUFFERSUSB BUFFER AMPLIFIERUSB QUADRATURE MODULATORCVOR/DVOR MODE SELECTDIRECT DIGITAL SYNTHESIZERFREQ/2560DIVIDERUSB DETECTOR/BUFFER AMPLIFIERUSB RF OUTPUTCARRIER FREQ COUNTER OUTPUT10 MHz Ref TCXOLSB BUFFER AMPLIFIERLSB QUADRATURE MODULATORFREQ/2560DIVIDERLSB DETECTOR/BUFFER AMPLIFIERUSB DETECTED OUTPUTUSB FREQ COUNTER OUTPUTLSB FREQ COUNTER OUTPUTLSB RF OUTPUTLSB DETECTED OUTPUT Figure 2-4 Synthesizer Block Diagram

Model 1150A DVOR 2-10 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The output of Y1 routes to buffers U15:A and U15:B. The buffer U15:B routes to 1/2 of a dual decade counter U16:A. This counter divides the input signal by 5, then routes it to U16:B, the other half of this IC. Here it is divided by 10 again, creating a 200 KHz signal. The 200 KHz signal is provided to the PLL circuit on the 012263 CCA. The 200 KHz signal is used as a reference for the PLL circuit. The output of buffer U15:A is the 10.000 MHz reference clock for the direct digital synthesizer (DDS), U17. Figure 2-5 Carrier RF Generation Loop 2.3.2.1.2.2 Carrier PLL Synthesizer CircuitryRefer to Figure 2-5,the Carrier RF Generation Loop block diagram. The carrier radio frequency is generated by a phase lock loop synthesizer. The loop is comprised of a voltage controlled oscillator, or VCO, buffer amplifiers and power splitters, and a loop controller IC with an SPI interface bus. Voltage regulator U6 provides a +12V supply to Q1 for a low-noise +10V line used by the VCO, U9. This regulator provides isolation from sources of power supply noise which would adversely affect the RF spectrum of the VCO output. U9, the VCO is an oscillator that generates a RF signal, the frequency of which is proportional to a control voltage at pin 5, the tuning input. The output of this oscillator is applied to a cascode buffer amplifier circuit composed of Q2, Q3, R30 – R32, R34, R36, R37, C27, C30, C35, C36 and L3. The amplifier provides low phase noise and good isolation to external noise influences. Buffer amplifier U11 provides gain to bring the signal back up to approximately +15 dBm, as well as providing additional reverse isolation to prevent signal degradation from noise. The output of the cascode buffer amplifier is applied to a resistive power splitter / attenuator combination made up of R35, R38 – R43. The output of R35 is amplified by U10, where it is again split and attenuated. The output of R24 is applied to U4, the synthesizer loop controller IC. The output from R43 is amplified by U11.

Model 1150A DVOR 2-12 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. While serving as an interconnect board, the 012262 CCA also contains a temperature sensor, U12 and an EEPROM, U10. These are serial interface circuits that use a port expander, U9 digital gates to select the devices. The port expander U9 along with U8:B, U11, U13, and U14 allows serial communication using a single chip select signal. U1, U2, U7, U8:A, U21, and U22 are buffers for the digital signals coming into the 012262 CCA. L4 and C59 serve as a filter on the reset line for the digital circuits. U18 and U23 function as a window comparator for the power supply voltages. CR19 is a visual indicator on the front panel of the synthesizer assembly to display the status of the voltages monitored by the window comparator circuit. Figure 2-6 Carrier Phase Control Loop 2.3.2.1.2.3 Carrier Phase Control LoopRefer to Figure 2-6,Carrier Phase Control Loop Block Diagram. RF from the carrier frequency PLL synthesizer is applied to buffer amplifier U18, and then routed to the reference phase input of phase detector hybrid HY1. The VOR system takes a sample of the carrier transmitter output from the carrier amplifier assembly. This sample of the modulated carrier output signal is brought into the 030838 Synthesizer Assembly via connector J3 on the back panel. The signal passes through limiter hybrid HY2, which serves to remove the 30 percent amplitude modulation, but leaving the phase distortion information intact. This limited signal then goes through buffer amplifier U20, a phase shift network consisting of C82, C84, C86, L23 and L26. This phase shift network provides approximately 180 degrees of RF phase shift to the signal. The signal is then applied to the variable phase input of phase detector HY1.

Model 1150A DVOR 2-14 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The output of T4 is then routed to buffer amplifier U21. Amplifier U21 feeds signal to the carrier amplifier in the VOR system. C102 couples a small RF sample from the output of U21 and is sent to the detector U22 and a buffer amplifier for monitoring of the output power to the carrier amplifier. U22 is a detector integrated circuit that generates a voltage on the output proportional to the RF input power. There is sufficient gain compression in U21 to minimize any changes in attenuation due to the small changes in loss of the phaser network with varying control voltage. U17, R76, and R77 are used to provide a DC offset in the output of U13:A. This offset is adjusted so that the error voltage seen at the phase control loop integrator U15 output is a nominal zero volts, maximizing the useful control range of U15. This error voltage is available at a test point (TP1) on the front panel of the synthesizer module. U17 is a digital potentiometer that requires the use of the SPI bus from the audio generator and software to program the part. U17 is adjusted to set the phase error voltage as measured at TP1 to a nominal zero volts, +/- 0.050 volts when the synthesizer module is installed in the VOR system cabinet. Note that in some cases, due to the large available phase shift of the phaser network (>450 degrees) U17 can be adjusted to achieve zero volts at TP1 at two separate points. The actual phase loop control voltage (output of U13:A) is measured at TP2 on the synthesizer front panel. U17 should be adjusted with the use of software to provide zero volts error voltage at TP1 between 2 and 8 volts as seen at TP2. If a zero volt phase error is achieved below 2 volts or above 8 volts, re-adjust U17 to see if a lock condition can be found between these two points. Figure 2-7 Sideband RF Generation Loop 2.3.2.1.2.4 Sideband RF Generation LoopsThe block diagram in Figure 2-7 depicts the sideband loop. Refer to Figure 2-7,Sideband RF Generation Loop. The synthesizer CCA (012258) within the synthesizer module generates the sideband signals necessary for CVOR or DVOR system configuration. Connector J3 provides the input RF signal from the carrier CCA (012263) within the synthesizer assembly. From the J3 connection RF is routed through a resistive attenuator (R1, R2, R3). The attenuator provides a resistive load to the U21 amplifier from the carrier CCA (012263). U1 is a buffer amplifier used to amplify the input signal and to provide isolation between the carrier CCA and the sideband CCA.

Model 1150A DVOR 2-16 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. All signals and power supplies of the Audio Generator CCA enter and exit through right-angle DIN connectors P1 and P2; which connect to the Control Backplane CCA. Digital Signal Processor (DSP) U6 communicates to the RMS CCA through UART U12 and TTL-RS232 converter U14. Oscillator Y1 clocks the DSP U6 while uP supervisor U13 monitors the watchdog strobe, external ~MRESET, and on-board power; resetting DSP U6 if necessary. DSP U6 utilizes memory which includes flash ROM U1 / U2, synchronous DRAM U4, and non-volatile RAM U3. DSP U6 also has serial ports available at debug header JP1 and spare header JP2 that are only used at the factory. Configuration switches on the Control Backplane CCA are read by DSP U6 through buffers U29 and U30. Synthesizer and sideband digital I/O is controlled through latch U27 and SPI / SPORT buffers U28 and U24. Coder / Decoder (CODEC) U51 contains two analog-to-digital (ADC) converters and two digital-to-analog (DAC) converters. One ADC / DAC pair is used for voice and ident processing while the other ADC converts over 24 channels of powers, phases, and audio levels switched through multiplexers U54 and U48. CODEC U51 responds to DSP U6 SPORT and Timer2 controls. Channel selection of Multiplexers U54 and U48 is controlled by DSP U6 through programmable logic device (PLD) U40. DSP U6 also has direct read / write access to the 32Kx16 of carrier audio RAM (CARRAM) U41 and U42 as well as the 32Kx16 of sideband audio RAM (SBRAM) U43 and U45 through PLD U40. Once the CARRAM and SBRAM have been initialized, DSP U6 can command PLD U40 to cycle through the contents of the RAM at a rate determined by oscillator Y2. The contents of the CARRAM are transferred to carrier DAC U44 as reference modulation while the contents of the SBRAM are clocked into SB1/3 DACs U18 and SB2/4 DACs U20 as audio outputs. The power levels of DACs U44, U18, and U20 are set by DACs U31 and U32. DACs U31, U32, and U33 are directly written by DSP U6. DACs U32 and U33 establish sideband and carrier phase control. PLD U40 offsets the CARRAM addresses by 7.5 degrees if appropriately strapped at header JP3 and ground-check commanded by the Monitor CCA. PLD U40 synchronizes its internal audio RAM counters to that of the other Audio Generator CCA if logic U19 and U39 indicate that this Audio Generator CCA is not actively on the antenna and a new cycle is beginning. The DVOR / ~CVOR configuration input of PLD U40-126 determines if the SB1/3 and SB2/4 bi-phase signals repeat at 720 or 30 hertz rates. Both of these outputs from PLD U40-19 and U40-18 are buffered by U25-8 and U25-9as SIN_BIPHS and COS_BIPHS. Commutator switch controls DVSC0 through DVSC5 are generated by PLD U40 during audio RAM cycling. They are converted from digital to RS422 levels by U21 and U22. DVSC5 is also buffered by U46 and presented to the front panel as SYNC on test point TP3.

Model 1150A DVOR 2-18 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Oscillator Y1 (available at test point TP22) clocks DSP U6-10 and UART U14-13 at 10 MHz through buffers U5D, U5E and U5C. Supervisor U13 will reset (~RESET) DSP U6-13 if the +3.3V supply drops too low, if ~EXTERN_RESET is active on SPI header J1-2 (factory only), if ~MRESET is active on connector P1-B16 (filtered by inductor FL1 and capacitor C65), or if watchdog (WDOG) from DSP U6-50 doesn’t transition often enough. The ~RESET output (available on test point TP7) also restarts flash RAM U1-10 / U2-10, latch U27-1, DACs U31-28 / U32-24 / U33-24, and PLD U40-127. Finally the ~RESET output (U13-7) is inverted to RESET (U5F-12) for initializing UART U12-36 and decoder U26-5. DSP U6 utilizes external memory which includes 512Kx16 of flash ROM (U1 and U2), 16Mx16 of synchronous DRAM (U4), and 32Kx8 of non-volatile RAM (U3) as well as some internal cache memory. The internal memory as well as other parts of DSP U6-25 are powered by +1.2V (available at test point TP26) which is created by charge-pump transistor Q1, diode CR2, and capacitor C34. DSP U6 status is indicated on the front panel by CPU_OK LED CR3. The address and data busses of DSP U6 are buffered by buffers U7-U11 before distribution to the most of the CCA. Only SDRAM U4 is unbuffered to DSP U6 address and data busses due to its communication rates of up to 100 MHz. Emulator header J2 provides accessibility to DSP U6 for in-factory testing. Decoder U26 defines address spaces for several components of the CCA. Configuration switches on the Control Backplane CCA are read by DSP U6 through buffers U29 and U30. Synthesizer and sideband digital I/O is controlled through latch U27 and SPI / SPORT buffers U28 and U24. CODEC U51 contains two 16-bit analog-to-digital (ADC) converters and two 16-bit digital-to-analog (DAC) converters. One ADC / DAC pair processes voice input MIC+ from connector P1-C3 and voice / ident output through op-amps U52A and U50 (available at front panel test point TP2) and op-amps U52B and U53 as CARR_MOD+ and CARR_MOD- at connector P1-A12 and P1-B12. The other ADC of CODEC U51 converts over 24 channels of power levels, phase levels, and audio levels switched through multiplexers U54 and U48. CODEC U51 responds to DSP U6 SPORT0 (U6-72, U6-74, U6-75, U6-69, and U6-68) and Timer2 (U6-77) controls. The +AVCC power supply of CODEC U51-20 is created by the filtering of +3.3V by inductor L6 and capacitors C135, C136, C137, and C139. Channel selection of multiplexers U54 and U48 is controlled by DSP U6 through PLD U40 signals MA0 through MA5. MA4 (U40-121) is the output enable of multiplexer U54-18 while MA5 (U40-112) is the output enable of multiplexer U48-18. MA0 (U40-87), MA1 (U40-86), MA2 (U40-111), and MA3 (U40-60) select one of sixteen channels on each multiplexer but only the enabled multiplexer output is switched to buffer U50A before routing to CODEC U51. Op-amps U47A and U47B condition the CARR_FWD+/- and CARR_RFL+/- signals before multiplexer U48-19 and U48-20 while the SBx_FWD and SBx_RFL signals are passively filtered before entering multiplexer U48. DSP U6 has direct read / write access to the 32Kx16 of CARRAM U41 / U42 as well as the 32Kx16 of SBRAM U43 / U45 through PLD U40. The address / data bus and control signals of DSP U6 are piped directly through PLD U40 to the RAMs when not in cycling mode. When in cycling mode, the RAMs address and control lines are connected to internal counters of PLD U40. The internal counters of PLD U40 read the contents of every location of the RAMs in 1/30 of a second; a time division of the 19.6608MHz oscillator Y2 into PLD U40-125. While the contents of an accessed CARRAM address are on the data bus, PLD U40 activates the ~CARDAC signal; writing the data into DAC U44. Op-amp U37A-1 gains the DAC U44 outputs to create REF_MOD; which inputs to op-amp U52B (mentioned previously) and eventually as part of the CARR_MOD+/- signals. While the contents of an accessed SBRAM address are on the data bus, PLD U40 activates the ~SBDAC and SBDAC_A1 signals; writing the lower byte of data into DACs of U18 and the upper byte of data into DACs of U20.

Model 1150A DVOR 2-20 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 2-9 Carrier Amplifier Assembly Block Diagram 2.3.2.4.2 Power Amplifier Assembly Detailed Circuit TheoryRefer to Figure 11-19 An input CW RF signal is generated from the VOR synthesizer module with a minimum output power level of 100mW. The RF is sent through a cable to the carrier amplifier assembly. Once the RF enters the amplifier, it is attenuated through a 3 dB attenuator before entering the driver stage of the amplifier. The 3 dB attenuator serves to provide a resistive load for the synthesizer module. The RF is modulated with the Q6 driver stage. The driver is an LDMOS type RF FET with high gain and good linearity. Q6 is modulated using a gate modulation technique. The gate of Q6 is voltage-varied, which modulates the RF signal. This is accomplished by using a feedback circuit that samples the output of the amplifier using C80, C81, and R42. The feedback signal is attenuated through R69, R70, and R71. This signal is routed to the detector, U21 where the audio is detected and buffered through U22:D. The input to the detector circuit is a 14 dB attenuator, R69, R70, and R71 followed by a coupling capacitor C116 into U21. U21 is a high linearity, true power, single chip detector. U12:A is an error amplifier used to compare the input reference signal to correct for non-linearity in the RF amplifier. From the driver stage, the RF signal is attenuated using AT1 to help balance any slight impedance differences between the driver and final RF stages. Attenuator AT1 also helps with a wider bandwidth. The signal is then routed to the final amplifier stage, Q7. The Q7 amplifier is another LDMOS type RF FET with high gain and good linearity. The Q6 amplifier is biased at approximately 850mA. The biasing of the stage is set with potentiometer R36, U13, R35, and CR5 to adjust the quiescent (no RF applied) current level to produce a voltage drop of 17mV across test points TP7 and TP8. Diode CR5 provides thermal compensation for Q6. The minimum gain from the final amp stage is +20 dB. Asmall RF sample is coupled from the output of the final amplifier stage through C67. The sample is low pass filtered and sent to the front panel of the module for a test equipment test point. The front panel sample is intended to replicate the high power output filter of the amplifier. The RF output of the final amplifier stage is then capacitive coupled through C66 to the output filter. The output filter C69, L24, C71, L26, C72, C74, L28, C76, C78, and L29 is a low pass filter designed to remove harmonics from the carrier RF signal. Asmall RF sample is coupled from the output of the low pass filter through C84. The small sample is the carrier feedback to the RF synthesizer via J3. Another RF sample is coupled from the output of the low pass filter through C80. The sample is sent to the detector circuit for detection of forward transmitted power.

Model 1150A DVOR 2-22 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. is approximately 10K ohms with the amplifier at 25 degrees C. R108 has a negative temperature coefficient, meaning as the temperature of the heat sink rises, the resistance of R108 reduces. In the event of excessive heat sink temperature, the output of comparator U23:B will travel to a low state. When the comparator goes low, this will make Q2 stop conducting, disabling transmission. The comparator will not reset until the temperature of the heat sink cools down. The over temperature shutdown signal is also sent to U9:B for monitoring purposes. The amplifier assembly contains four different local power supplies that are converted from the +48Vdc nominal input. The power supplies are: +15Vdc, +10Vdc, +5Vdc, and +3.3Vdc. The +15Vdc supply is directly converted from the +48Vdc input. R45 and R47 along with U14 set the output voltage for the +15Vdc supply. The +15Vdc supply is a switching supply only used to convert the +48Vdc input to a level suitable for linear regulation of the +10Vdc supply. From the +10Vdc supply, the +5Vdc supply is linear regulated and the +3.3Vdc linear regulates from the +5Vdc supply. All power supplies within the module are monitored with voltage comparators U18A, U18B, U18C, U18D, U19B, U19D, U20C, and U20D. The comparator circuits are powered directly from the +48V input through R51, R52, and CR10. Diode CR10 provides a +10Vdc reference for powering the comparator IC’s and providing a reference voltage for the voltage divider resistors. The power supply monitor circuit is the only circuit in the module assembly that is not fused. This was intentional for monitoring the power supplies without degrading performance in the power supply monitoring circuit. A logic low on any of the power supply monitoring comparators will cause the output of U19:A to travel to a high impedance state. This will prevent the power ok LED (CR11) from conducting. Comparator U19:C will also travel to a high impedance state for monitoring the power supplies externally. 2.3.2.5 Bi-Directional Coupler (1DC1)The Bi-Directional Coupler is used to obtain a representative sample of the forward and reflected RF powers of the carrier signal (refer to Figure 2-2,DVOR system block diagram). The coupler has negligible insertion loss between the input and output connectors. Internal directional pickup loops couple a portion of the forward and reflected powers to the output sampling ports. These ports provide a fixed ratio of the sampled powers to the RF monitor assembly for detection and analysis processing. 2.3.2.6 Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A6, 1A5A7)The DVOR uses two Sideband Generator Assemblies for each transmitter system. Each generator contains one sideband amplifier CCA part number 012218-0001. The Sideband Generator may be plugged into one of four positions within the DVOR cabinet. Position 1A4A1 is for transmitter 1 Sidebands 1 and 2 signal generation of two lower sideband outputs (Carrier -9960 Hz). Position 1A4A2 is for transmitter 1 Sidebands 3 and 4 signal generation of two upper sideband outputs (Carrier +9960 Hz). Position 1A4A6 is for transmitter 2 Sidebands 1 and 2 signal generation of two lower sideband outputs (Carrier -9960 Hz). Position 1A4A7 is for transmitter 2 Sidebands 3 and 4 signal generation two upper sideband outputs (Carrier +9960 Hz). 2.3.2.6.1Sideband Generator Assembly Block Diagram TheoryRefer to Figure 2-10. The Sideband CCA (PN 012218-0001) is responsible for developing the sideband amplitude modulated signals that are sent to the commutator. The commutator only acts as a selection switch to the sideband antenna array and performs no modulation. RF enters the Sideband Generator at P1D from the frequency synthesizer upper or lower sideband output. The signal is CW and at approximately 0 dBm. The signal is split and then enters either sideband 1 or sideband 2 circuits. The two sidebands are identical so only one will be described. After the RF splitter the CW signal enters the manual phaser. This phaser is controlled with an operator setting in the PMDT. This phaser is used to align all four sidebands in a DVOR to the same RF phase in order to get maximum sideband modulation. The signal then passes through a buffer and then enters the bi-phase modulation. The bi-phase modulator can be set to provide 0 or 180 degrees of RF phase shift. In a DVOR this is directly controlled by J11. This jumper allows for either a setting of 0 or 180 degrees based on the frequency of operation and described in the alignment procedures.

Model 1150A DVOR 2-24 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The signal then enters a buffer then a passes through a 6 dB fixed attenuator. The signal then passes through a voltage controlled phase shifter with up to 360 degrees of phase shift. This phase shifter is used in a control loop to correct for any phase shift due to temperature, and aging so that the output phase remains constant. After the phase the signal passes through a buffer then a fixed 6 dB attenuator and then a voltage variable attenuator used to amplitude modulate the RF signal. The signal then passes through a buffer then a pre-driver and then the final amplifier. The signal then passes through alow pass filter to eliminate the higher harmonics of the RF signal. The signal then passes through a dual directional coupler. Both forward and reverse RF paths are provided from the coupler. The phase control loop maintains the output phase of the sideband generator the same relative to a sample of the input phase. A sample of RF signal is taken after the manual phaser. This is considered the reference phase. Another sample of RF signal is taken from the directional output and 3 dB two way splitter. A phase detector strips the modulation from the signals and compares the phase and produces an error voltage that is used to control the mean phasor in order to keep the input to output phase constant. The amplitude control loop receives a sinusoidal signal from the Audio Generator. The amplitude of this signal sets the output power of the Sideband Generator. The sinusoidal signal is rectified and used for the reference signal to the amplitude control loop. A sample of the amplitude modulated signal is derived from the directional coupler forward port and split by the 3 dB two way power divider. The signal then enters the forward power linear detector. The output of the detector is fed into the error amplifier. The error amplifier is used to drive the voltage controlled attenuator. The error amplifier makes sure that the input and output signals are the same. The reflected power monitor compares a sample of the forward signal and sample of the reflected signal from the directional coupler to determine the VSWR of the circuits following the Sideband Generator. The power applied to the Sideband Generator is approximately 48 Vdc. The power supply circuitry is common to both sidebands on the board. A 48 V to 28V converter module is mounted to the back side of the board. This module supplies most of its output power to the final amplifier transistors. Another power supply is comprised of discrete components and generates +5 Vdc from the 48 Vdc input. The 5 Vdc is used by another switching power supply to generate the +12 and -12 Vdc supply voltage. The sideband generator has an on board temperature sensor that is monitored by the RMS processor. 2.3.2.6.2Sideband Generator CCA Detailed Circuit TheoryThere are two Sideband Generators on the circuit card. Only one will be described along with the circuitry common to both Sideband Generators. The CW RF enters on connector P1:D at approximately 0 dBm. The signal is equally split by he -3 dB power splitter formed by L1, L2, C2, C7 and R7. The signal then passes through high pass filter formed by C8, C10 and L3. The signal then enters the phase shifter formed by T2, C12 and C16. This phase shifter has a range of approximately +/- 60 degrees of range and is the manual phase shifter. This phase shifter is used to align all the sideband amplifiers to the same phase. The diodes CR1 and CR2 are varactor diodes that vary in capacitance based on the voltage applied. The operational amplifier U1amplifies the SB1_PHS signal that originates at the Audio Generator. This voltage is controlled from the PMDT as a Sideband Phase offset setting After the manual phase shifter the signal is split by a 6 dB splitter formed by R15, R17 and R18. A sample (SB1_REF_PHASE) is provided to the phase comparator circuit described later. The signal then enters a phase shifter with transformer T4, controlled by the Phase control loop voltage (SB1_MEAN_DYN_PHASE). After the phase shifter the signal is amplifier by U3 with a fixed 20 dB gain.

Model 1150A DVOR 2-26 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Refer to page 2 of Figure 11-21.Circuit U22 is a phase comparator circuit that forms part of the phase control loop of the Sideband Generator. The reference phase (SB1_REF_PHASE) is the unmodulated CW signal that is sampled after the manual phaser. The SB1_RF_SAMPLE1 signal is a sample of the final output signal from the from the forward power coupler DC1. The phase detector is most accurate when the Input A (INPA) and Input B (INPB) ports are separated by 90 degrees. The output at VPHS is 0.9 Vdc when the phase difference is 90 degrees. The voltage is 0 volts at 0 degrees and 1.8 volts at 180 degrees. Circuit U20A buffers the detected phase signal. A sample of the U22 voltage reference of 1.8 VDC is applied to resistors RN1E and RN1G which divide this to 0.9 Vdc. Circuit U20 inverts the detected phase. Analog multiplexer U18 is not active in DVOR mode. In CVOR mode the SB1_BI_PHASE_CVOR signal is used to switch between the inverted and non-inverted detected phase signals to remove the bi-phase modulation created by U6. The output of U18 is applied to the phase error amplifier U14A. The non-inverting input of U14A is connected to the 0.9 Vdc created from the U22 voltage reference. Error amp U14A drives the output at pin 1 so that the input at pin 2 equals 0.9 V. The multiplexer U16 is normally open from pin 1 to the S1 output. The switch closes making the error amplifier a unity gain buffer when the phase loop is unlocked in order for the voltage to move through the entire range to find the correct lock voltage. Operational amplifier U14Bprovides a gain of 2 and adds a DC offset from R1. This sets the normal operating voltage of the phasers in the control loop. This set point will be different for each operating frequency and must be adjusted during alignment. The output (SB1_MEAN_DYN_PHASE) is routed to each of the phase shifters. Comparators U12A and U59A compare the error voltage from the U14A output to a fixed voltage of 3.4 V. If the error voltage is between 0.8 Vdc and 3.4 VDC then the loop is locked and the U12A and U59A outputs are high. If the voltage falls outside 3.4 and 0.8 Vdc then the output is low and C109 is discharged. R88 then charges the voltage back high in order to stretched the unlock time. Comparator U12B output goes low when the loop is not locked and causes U16 to close. Refer to page 6 of Figure 11-21.The 48 VDC enters the Sideband Generator and enter fuses F1 and F2. Fuse F1 feeds DC to DC converter PS2. The output of PS2 is 24 VDC that primarily supplies the operating voltage for the final transistors Q4 and Q6 through L91. The +48 Vdc signal is applied to fuse F2 and then applied to the switching voltage regulator U42. Regulator U42 provides a rectangular pulse train at the VOUT pin. Indictor L85 and C273 filters the pulse train into a DC voltage. Asample of the DC voltage is applied to the FB (feedback) pin of U42 which allows correction of the pulse train pulse width to provide +5 VDC at the output. Diode CR32 along with R231, C269 and Q8 provide over voltage protection. If the voltage exceeds 5.6 volts then Q8 is turned on which will blow the fuse F2. Linear regulator circuit U44 provides regulation of the +5 Vdc to +3.3 Vdc. DC-DC Converter PS1 converts the 5 Vdc to +15 VDc and -15 Vdc. Linear regulator U45 converts the -15 Vdc to -12 Vdc. Linear regulator U46 converts the +15 Vdc to +12 Vdc. Refer to sheet 6 of Figure 11-21.Resistors R249, R250 and diode CR44 provide a precise +10Vdc source for the voltage monitor circuits. Voltage comparators U49A and U49B monitor the 5 Vdc supply and if the voltage exceeds the range 4.5 to 5.5 Vdc then one of the comparator outputs will go low turning off both Q11 and Q12. Voltage comparators U49C and U49D monitor the 12 Vdc supply and if the voltage exceeds the range 10.8 to 13.2 Vdc then one of the comparator outputs will go low turning off both Q11 and Q12. Voltage comparators U50A and U50B monitor the 24 Vdc supply and if the voltage exceeds the range 22.3 to 26.3 Vdc then one of the comparator outputs will go low turning off both Q11 and Q12. Voltage comparators U50C and U50D monitor the -12 Vdc supply and if the voltage exceeds the range -10.9 to -13.1 Vdc then one of the comparator outputs will go low turning off both Q11 and Q12. FET Q11 provides an output to the Facilities CCA that is low when the power is ok and high when the power is out of tolerance. FET Q12 control the front panel power OK LED. When power is normal the gate of Q12 is high and the drain is low turning the LED CR45 on. The lamp test input (~TEST) goes low when the switch on the LCU is depressed and causes the LED CR45 to go on.

Model 1150A DVOR 2-28 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 20 dB Attenuator50 OHMs20 dB Attenuator50 OHMs20 dB Attenuator50 OHMs20 dB Attenuator50 OHMs50 OHMsSTANDBYCARRIER SIDEBAND 1SIDEBAND 2SIDEBAND 3SIDEBAND 4CARRIER FORWARDCARRIER REFLECTEDForward DetectorReflected DetectorAudio Generator 1,2Carrier Amplifier 1,2Monitor 1,2 Audio Generator 1,2DC-DCConverter48 V148 V2Standby Detector Monitor 1,2 Audio Generator 1,2+5VTemperature SensorStorage memory (EEPROM)RMS ParallelData (SPI) Figure 2-11 RF Monitor Assembly Block Diagram 2.3.2.8.1 RF Monitor Assembly (1A2) Detailed Circuit TheoryThe RF Monitor Assembly functions as an RF Detector/Amplifier and distributor of the detected analog RF signals. The assembly contains a high power dummy load that is capable of dissipating the 100 watts of RF power from the standby transmitter. Four dummy loads are mounted to the assembly heat sink in order to dissipate the sideband generator power. Refer to Figure 11-22. Resistor R84 is the dummy load for the standby transmitter RF carrier power. The RF power enters the assembly via RF connector P1:F. A sample of the RF signal applied through C34 to the 35 dB attenuator formed by R65, R66 and R67. The signal then enters the linear detector circuit U17. The detected voltage from U17 is buffered and amplified by U18A. Potentiometer R3 is located on the front panel of the RF Monitor and allows adjustment of the output level. The technician uses this adjustment to calibrate the Transmitters>>Data>>Standby Power to the same as measured by external test equipment while on the antenna.

Model 1150A DVOR 2-30 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The RF Monitor contains a temperature sensor U11 attached close to the heat sink to monitor the temperature of the heat sink. The RMS has the ability to read the temperature through the SPI interface. The signal SPI_SCK is the clock used to clock in and out the serial data. The SCK signal is buffered by U8A. The SPI_MOSI (master out slave in) line is serial data coming from the RMS. Data on this line enters U8A pin 2 and is buffered and exits at the Y1output. The signal ~SPI_CS2X is active low when the RF Monitor board is being addressed by the RMS. Clock and data information is always present but ignored by the RF Monitor when the ~SPI_CS2X is high. Buffer U8 is used to buffer the SPI_MISO data out of the RF Monitor to the RMS. The output at Y1 is tri-stated when the data is a high and active low when the data at the ~OE goes low. This allows for many of the other modules to use the same SPI_MISO line back to the RMS. Resistor R58, R59,R60, R61 and U13 are used to decode the addressing of the RMS so that the RF Monitor responds to the correct ~SPI_CS2X and address. The circuit U13 provides for parallel input output from the RMS SPI port. This allows for selection of either the temperature sensor U11 or EEPROM U10. The EEPROM is used to read and write data from the RMS. This EEPROM holds the Rf Monitor serial number and revision information programmed by the technician through the PMDT screens. 2.3.2.9 RMS Processor Block Diagram TheoryRefer to Figure 2-12.The Remote Monitoring System (RMS) CCA performs communications via thirteen serial ports plus a parallel port, and facilitates monitoring/control in a single or dual VOR system. The RMS CCA receives battery-backed DC power from the BCPS CCAs at connector J2, through OR’d diodes, and regulated to +5V and +3.3V supplies for use by the RMS CCA to power the microcontroller and all of its associated circuitry. The U8 microcontroller utilizes external flash ROM, non-volatile RAM (NVRAM), synchronous dynamic RAM (SDRAM), a voltage supervisor/watchdog reset circuit, and an oscillator to form the core microcomputer. The U8 microcontroller also includes a direct memory access (DMA) controller, serial ports, and general purpose input/output (I/O). Microcomputer peripherals include a real-time clock (RTC), universal asynchronous receiver/transmitters (UARTs), a parallel port interface (PPI), a USB host port, a USB slave port, off-board bus buffers, and more general purpose I/O. The U8 microcontroller’s flash ROM is factory programmed using the J4 SPI boot header while factory debug is accomplished using the J3 emulator header, the JP3 debug header, and the JP4 PMDT RS232 header. None of the aforementioned connectors and headers will be used by the customer in the field. RMS communication to the LCU CCA occurs via the parallel port established by U29 through U32 and connector P1. The LCU also returns system control signals through P1 such as *TEST (lamp test) and *MRESET (master reset). Configuration switches on the Backplane CCA define the system set-up to the RMS when it reads them via the Facilities CCA through the external address/data bus on connector P2. The U8 microcontroller communicates serially through one internal and twelve external UARTs. The internal UART is the debug port of JP3. The other twelve UARTs control communications to Monitors 1 and 2, Audio Generators 1 and 2, Remote Maintenance Monitor (RMM), Spare #1, Radio Modem, LCD, BCPS, Spare #2, Ethernet, and the PMDT. Two options are possible for local PMDT communications. The PMDT may be connected to USB connector J1 with header JP2 strapped for USB operation. The second option (in factory only) has the PMDT connected to RS232 header JP4 and header JP2 strapped for RS232 operation. These eleven external UARTs (not including the PMDT) route to connectors P1 and P2. The host USB port of connector J2 is available for possible future options such as connection to a printer.

Model 1150A DVOR 2-32 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 2.3.2.9.1 RMS CCA Detailed TheoryRefer to Figure 11-17.Battery-backed DC power 1_+48V and 2_+48V enter via connector P2-25 and P2-26, diode-OR’D by diodes CR13 and CR14, and fused by F2. This voltage is further regulated to +5V by DC-DC converter U39, diode CR15, and inductor L3. Over-voltage protection for the +5V is provided by SCR Q5, zener diodes CR19 and CR20, capacitor C115, and resistor R65. The +5V supply is further regulated by linear regulator U40 to create DVCC (+3.3V). The +5V is measurable at TP14 while DVCC is available at TP7. The DVCC and +5V supplies power the U8 microcontroller and its peripherals. The U8 microcontroller acts as a DC-DC converter to create +1.2V (measurable at TP3) for powering its core (VDDINT) by pulse-width-modulating U8-4/5 and using transistor Q1, diode CR2, and inductor L1. Diode CR1 insures proper power supply sequencing during power-up/down. The U8 microcontroller utilizes 512Kx16 of flash ROM (U1 and U2) for non-volatile program storage as well as 32Kx8 non-volatile RAM (U3) for variable storage. Oscillator Y2 provides the system clock for U8 as well as UARTs U16, U22, and U28 after buffering by U17. The system clock can be measured at test point TP1. Data buffers U33/U34 and address buffers U35/U36 are decoded by AND gates U47:B, U47:C, and U47:D to activate the buffers only during a valid asynchronous memory select cycle. Resistor networks RN5 through RN9 act as pull-ups on these buffered bus lines. Only the bus lines between U8 and the 16Mx16 SDRAM (U4) are not buffered in some form. The U4 SDRAM is used for program and variable storage and has very fast access/refresh times. The U8 microcontroller has direct control of the CPU_OK LED (CR5) by utilizing output PF8 (U8-36) and transistor Q2. The ~TEST signal, from the LCU via connector P2-B8, also can light the CR5 LED when active. Zener diode CR17 limits the maximum voltage while resistor R11 limits the maximum current of the CR5 LED. Buffer U37 is used to buffer address lines A17, A18, and A19, control signals ~AOE and ~AWE, as well as the serial peripheral interface (SPI). The SCK, MISO, and MOSI SPI signals (U8-53, U8-54, and U8-55) along with ~SPI_CS0 (U8-49) are used in conjunction with the SPI Boot header J4 for in-factory programming of flash ROM. Latch U7 and inverter U10 combine to create the SPI chip select signals ~SPI_CS1 through ~SPI_CS8 for communications to off-board serial SPI devices through connector P2-A8 through P2-A16. Real-time clock (RTC) U15 is clocked by oscillator U9 and battery-backed up by battery B1 if header JP1 is strapped between JP1-2 and JP1-3. The 512 Hertz heartbeat of RTC U15 can be measured at test point TP13. Oscillator U9 is a highly accurate temperature-compensated crystal oscillator (TCXO) whose accuracy eliminates the need for a potentiometer or adjustable capacitor. Emulator header J3 is used for in-factory testing and development only. The ~MRESET signal from the LCU enters via connector P2-B16 and is filtered by inductor FL1 and capacitor C39 to create reset signal ~EXT_RES. Signal ~EXT_RES is bi-directional in that either the LCU or the RMS can cause the signal to be active and reset the entire VOR system. When the LCU pulls ~MRESET (and subsequently ~EXT_RES) low, voltage supervisor / watchdog input U6-1 is low; causing output U6-7 to go low which resets the U8 microcontroller and on-board latch U7 immediately. UARTs U16, U22, and U28 as well as USB host U38 will also be immediately reset by the RESET output of inverter U17:A. Latch U29 will be reset after being delayed by inverters U45:A, U45:B, resistor R13, capacitor C114, and diode CR16. The RMS can initiate a system reset by activating ARM_SYS_RES (U29-9) and stopping the periodic strobing of voltage supervisor / watchdog input U6-6. A reset from U6-7 will occur approximately one second after the last watchdog strobe; causing inverter U17:A, transistors Q4/Q3 and ~EXT_RES to become active. The reset will clear after ~DELAYED_RESET from U45:B clears latch U29-9 ARM_SYS_RES; which in turn shuts off transistor Q3 and releases ~EXT_RES.

Model 1150A DVOR 2-34 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Decoding of the address space used by the U8 microcontroller is provided by decoders U23, U24, U21, and U18. All decoder outputs are used for on-board devices except for U24-10, named ~EXT_CS. This output defines the address space that is used to decode the Facilities CCA devices. Buffers U43 and U44 establish an 8-bit asynchronous bus for communications to/from the Facilities CCA. The inputs and outputs of buffers U43 and U44 as well as ~EXT_CS route to connector P2. The U8 microcontroller has a synchronous serial port controller (SPORT) that is used for communications to the off-board battery charge / power supply controller or controllers (Spare Slot). The SPORT signals are buffered by U42 before connection to P2. 2.3.2.10 Facilities CCA TheoryRefer to Figure 2-13.The Facilities CCA provides system I/O for the RMS CCA. Many of the inputs and outputs of the Facilities CCA eventually connect to the Interface CCA after routing through the Control Backplane CCA. System_1 and system_2 battery-backed power supplies (nominally 48VDC) enter connector P2 where they are diode-OR’D together and regulated down into several lower voltages; including +24V, ±15VDC, ±12VDC, +5VDC, and +3.3VDC. U1 and U7 DC-DC converters regulate the +48V down to +24V and +5V respectively. The +24V supply is routed out connector P2 for powering the Interface CCA. The +5V supply powers several on-board digital and analog integrated circuits as well as powering DC-DC converter PS1 to create ±15VDC. Several linear regulators then create the ±12VDC supplies from the ±15VDC for powering RS232 integrated circuits and the analog signal processing system. All power supplies, including the system_1 and system_2 supplies, can be monitored by the RMS CCA through the analog-digital converter. The RMS CCA will light on-board PWR_OK indicator CR24 if all supplies are within range. The ~TEST signal, which originates at the LCU CCA and enters on P2-B8, will light all on-board indicators when active. The ~TEST signal will also cause audio to be emitted from speaker SPK1 when active. The ~MRESET signal, which originates at the LCU CCA and enters via P1-B16, resets U8 when active. U8 outputs ~RESET, which clears the outputs of all on-board latches. ~RESET is also asserted by U8 if the +3.3V supply drops too low. An asynchronous data and address bus provided by the RMS CCA enters via DIN41612 connector P2. The address bus is decoded into 10 segments for input buffers and output latches. Input buffers are the U27 A-D converter bus, U28 and U29 system configuration switches, U31 amplifier powers status, U32 monitor powers status, U18 frequency configuration switches, and U37 TACAN antenna status (not used). The output latches are U22 A-D converter control, and U23 Ident tone multiplexer control. As mentioned previously, all power supplies can be monitored by the RMS CCA through on-board U26 A-D converter as well as the U30 voltage reference, exterior and interior temperatures, ten spare analog inputs, and four spare digital inputs. Exterior and interior temperatures originate at the Interface CCA and are conditioned by U19:A and U19:B operational amplifiers. The spare analog inputs and spare digital inputs also originate at the Interface CCA. All of these analog signals are switched through U20 and U21 multiplexers to the single channel A-D converter and read digitally via buffer U27. The system configuration switch signals, SCON0 through SCON15, originate on the Control Backplane CCA and enter via DIN41612 connector P1. Two of these configuration switches, DIALUP/~EXT and DED/~RADIO, determine whether U12 and U14 on-board modems or external modems connected to the Interface CCA are active. If the U12 and U14 modems are selected, they communicate to the RMS CCA serially once their TTL signals are converted to RS232 by U11 and U13. The U12 and U14 modems each have a speaker output which is multiplexed through U16 to the U15 amplifier and SPK1 speaker. Both U12 and U14 modems have on-board tip and ring transient voltage suppression (TVS) before eventually routed to the Interface CCA and more TVS protection.

Model 1150A DVOR 2-36 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 2.3.2.10.1 Facilities CCA Detailed TheoryRefer to Figure 11-18.System1 and System2 +48V power from connector P2-25 and P2-26 are scaled down by resistor networks RN1 and RN2 for input to the A-D converter as well as diode-OR’D by CR1 and CR2 to create the facilities +48V supply. This supply (also named LED_PWR) lights the CR24 PWR_OK LED when transistor Q1 is turned on under software control by U22-19; indicating all monitored power supplies are within range. The facilities +48V is fused by F1 and regulated by regulator U1, L1, diode CR3, and C2 to create +5DIG. Zener CR36, R68, and SCR Q3 protect downstream circuitry in the event of an over-voltage event by opening fuse F1. Zener CR37 will short to ground and protect the downstream circuitry if the SCR/Fuse-blowing circuitry fails for any reason. The +5DIG supply is further filtered and regulated by regulator U2 and capacitors C3 and C4 to create the +3.3V supply. The +5DIG supply is also input to DC-DC converter PS1 to create -15V and +15V supplies. The -15V is filtered and regulated by L2, C8, U3, and C9 to realize -12ANA and by C7, U4, and C10 for -12DIG. The +15V output is filtered and regulated by L3, C12, U5, and C13 to realize +12ANA and by C11, U6, and C14 for +12DIG. The facilities +48V also feeds fuse F2 and regulator U7. Switching regulator U7, C15, L4, CR4, CR5, R10, C17, and R11 combine to convert 48 volts to +24V. Zener CR38, R69, and SCR Q4 protect downstream circuitry in the event of an over-voltage event by opening fuse F2. Zener CR39 will short to ground and protect the downstream circuitry if the SCR/Fuse-blowing circuitry fails for any reason. The ~MRESET signal enters via P1-B16, is filtered by FL1/C19, diode-isolated by CR6, and resets U8 when active. U8 outputs ~RESET, which clears the outputs of on-board latches U22, U23, and U38. ~RESET is also asserted by U8 if the +3.3V supply drops too low after R14 and before U8-2. The ~TEST signal enters on P2-B8 and will light on-board indicators CR13-CR21, and CR24 when active. The ~TEST signal will also cause audio to be emitted from speaker SPK1 when active. The ~TEST signal is transient-voltage-suppression (TVS) protected by CR40. Asynchronous data and address busses provided by the RMS CCA enter via connector P2 and are pulled-up by resistor networks RN12 and RN13. The address bus is decoded into sixteen segments by U9 and U10; ten of which are used by the Facilities CCA. The ten spare analog inputs (SPARE_ANA1 through SPARE_ANA10) and four spare digital inputs (SPARE_DIN1 through SPARE_DIN4) enter via connector P1 and are terminated to ground by resistor network RN3 before connection to analog multiplexers U20 and U21. The DIALUP/~EXT control signal enters via P1-C26. When this signal is high, buffer/converter U11 is enabled and RMM_TX_232, RMM_RX_232, RMM_DTR_232, and RMM_DCD_232 signals will pass through U11 to Dial-up modem U12 to become ~DU_TXDD, ~DU_RXDD, ~DU_DTRD, and ~DU_DCDD. Components R19, R18, CR9, R20, R17, and CR10 convert +5V signal levels to +3.3V between U11 and U12. Dial-up modem U12 lights indicator CR13 when a RING is received. Dial-up modem U12 also lights indicators CR14 through CR17 when serial data and control signals are active. The tip and ring signals from Dial-up modem U12 are TVS-protected and filtered by CR7, FL2 and FL3 before exiting connector P2-B14 and P2-B15. Audio from U12-64 is scaled by R29 and R31 before audio header JP1-1. The DED/~RADIO control signal enters via P1-C25. When this signal is high, buffer/converter U13 is enabled and RADIO_TX_232, RADIO _RX_232, RADIO _DTR_232, and RADIO _DCD_232 signals will pass through U13 to Dedicated modem U14 to become ~DED_TXDD, ~DED_RXD, ~DED_DTRD, and ~DED_DCD. Components R22, R24, CR11, R23, R25, and CR12 convert +5V signal levels to +3.3V between U13 and U14. Dedicated modem U14 lights indicators CR18 through CR21 when serial data and control signals are active.

Model 1150A DVOR 2-38 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The U37 buffer reads TACAN antenna controller signals which enter through connector P1 and are converted to TTL by U34. The U38 output latch directs activity of the TACAN antenna controller after the U38 latch signals are converted to RS422 by U35 and U36. The U38-19 loop-back signal may be used for fault-isolation purposes to buffer U37-9. Latch U38-16 also controls ~TACAN_RESET though transistor Q5 and TVS diode CR42 before routing to P1-C8. 2.3.2.11 Interface CCA TheoryThe Interface CCA provides interface connections between the RMS/Facilities/Control Backplane CCAs and the outside world. Examples include spare analog and digital inputs, spare digital outputs, temperature sensors, smoke detector, intrusion sensor, and a TACAN antenna controller. RS232 communications are provided to RCSU and PMDT terminals as well as an optional Ethernet module. All signals are protected by transient voltage suppression (TVS) devices on the Interface CCA before exiting. 2.3.2.12 Interface CCA Block Diagram TheoryNOTE TACAN interfaces are described but not used in the VOR system. The Interface CCA is also used in DME/TACAN systems. Refer to Figure 2-14.All connections between the Interface CCA and the RMS/Facilities/Control Backplane CCAs are accomplished via headers J1 and J2. The J2 and J3 connections will not be used in a VOR system since there will not be a TACAN antenna system controller. Connectors J5 and J6 are DB9-types which provide interface to the RCSU and PMDT terminals mentioned previously. Connector J7 is an RJ11 phone jack provided for exterior temperature sensing. Connector J8 is a header provided for in-factory test purposes. Connector J9 is an RJ45 jack intended for use as an Ethernet port. The port will be powered by a +3.3V DC-DC converter (PS1). Terminal block TB1 facilitates connection of up to ten spare analog inputs, four digital inputs, and four digital outputs. Terminal block TB2 allows connection of the RCSU and Dial-Up modem tip and ring signals. These signals are transient protected by common-mode chokes as well as spark-gaps, sidactors, and power resistors. INTERLOCK and EXT_KEY_IN signals are TVS-protected and optically isolated. True isolation for these signals may be enabled or disabled depending on the strapping of JP1 and JP2. EXT_KEY_OUT signals are optically isolated and TVS-protected before exiting via TB2. SMOKE_DETECTOR, INTRUSION_SENSOR, ILS-VOR_RX_232, and ILS-VOR_TX_232 signals are TVS-protected before further routing. DET_IDENT1 and DET_IDENT2 signals are scaled as well as TVS-protected before exiting via TB2. Earth ground lug E1 provides a return path for all transient voltage protection devices on the Interface CCA.

Model 1150A DVOR 2-40 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Ethernet module J9 has an RJ45 connector, is TVS-protected by U4 through U6, is powered by DC-DC converter PS1, and has its TTL signals converted to RS232 by U7 before routing eventually to the RMS CCA. Diodes CR41 through CR43 insure the proper voltage level before entry into PS1. PS1 converts +24VDC to +3.3VDC and diode CR72 provide TVS protection. All TACAN antenna system controller signals are TVS-protected by diodes CR45 through CR67 before routed to DB37 connector J3. Test header J8 is used for factory testing. The RCSU has two possible paths for communications; either tip-n-ring to terminal block TB2-1 and TB2-2 or RS232 to DB9 connector J5. The active path is configured by a system configuration DIP switch on the Control Backplane CCA. Diodes CR21 through CR24 provide TVS protection for the RS232 signals while resistors R21 through R24, spark-gap V2, sidactor Q3, and balun L2 provide the TVS protection for the tip and ring signals. The PMDT also has two possible paths for communications; either tip-n-ring to terminal block TB2-3 and TB2-4 or RS232 to DB9 connector J6. The active path is configured by a system configuration DIP switch on the Low Power Backplane CCA. Diodes CR25 through CR28 provide TVS protection for the RS232 signals while resistors R17 through R20, spark-gap V1, sidactor Q2, and balun L3 provide the TVS protection for the tip and ring signals. Spare I/O terminal block TB1 provides connection to ten spare analog inputs, four spare digital outputs, and four spare digital inputs. All of these signals are TVS-protected by diodes CR1 through CR18. All of these signals eventually route to the Facilities CCA. External interconnect terminal block TB2 provides connection for the remainder of the signals of the Interface CCA. The SMOKE_DETECTOR and INTRUSION_SENSOR signals are TVS-protected by diodes CR37 and CR38. The ILS-VOR RS-232 signals are TVS-protected by diodes CR19 and CR20. The INTERLOCK+ and INTERLOCK- signals are connected to opto-coupler U3:A. Full power supply isolation can be achieved by removing jumpers JP1A and JP1B from header JP1 if the customer is willing to provide an external supply. Current is set and steered through the LED of U3:A by resistors R14 through R15 and diodes CR36 and CR69. The transistor output of U3:A is TVS-protected by diode CR39. The EXT_KEY_IN+ and EXT_KEY_IN- signals are connected to opto-coupler U3:B. Full power supply isolation can be achieved by removing jumpers JP2A and JP2B from header JP2 if the customer is willing to provide an external supply. Current is set and steered through the LED of U3:B by resistors R5 through R7 and diodes CR32 and CR70. The transistor output of U3:B is TVS-protected by diode CR40. The EXT_KEY_OUT signal is TVS-protected by diode CR35 before routing to pull-down resistor R9 and transistor Q1. Resistors R10 and R11 bias the LED of opto-coupler U2 while diodes CR33 and CR34 transient protect the transistor outputs of opto-coupler U2. The transistor outputs are labeled EXT_KEY_OUT+ and EXT_KEY_OUT- before routed to terminal block TB1. The MON1_AUDIO_ID and MON2_AUDIO_ID are transient protected by diodes CR30 and CR31 before being voltage-divided by resistors R1/R3 and R2/R4. The lower voltage level signals are called DET_IDENT1 and DET_IDENT2 before being routed to terminal block TB2. 2.3.2.13 AC Power Monitor CCA TheoryThe AC Power Monitor CCA provides a means for the VOR system to measure the AC current and voltage levels of the obstruction lights and of the VOR system itself.

Model 1150A DVOR 2-42 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 2-15 AC Power Monitor Block Diagram 2.3.2.14 Local Control Unit TheoryRefer to Figure 2-16.The Local Control Unit (LCU) controls the normal operation of the VOR. All operational functions are performed by the LCU and are controlled by either front panel keyboard when in the local mode or by the Remote Maintenance Subsystem (RMS) through the parallel interface. The LCU is controlled by the Portable Maintenance Data Terminal (PMDT), Remote Control Status Unit (RCSU) or Remote Status Unit (RSU) through the RMS for all remote operator intervention or by the RMS for automatic restart. The LCU receives the alarm outputs from the installed Monitor circuit card(s) and depending on the configuration of the system, uses the results of these signals to determine alarm status. If an alarm is detected, the LCU shuts down the system currently radiating and transfers to the standby system in accordance with the system configuration. The LCU also provides the ability to disable monitors and bypass alarms as required by the operator. The LCU provides +24V to the two possible synthesizer VCO circuits, the +24V to activate the transfer switch, and the transmit enable clock to the installed Audio Generators. Status is reported by LED's visible to operator standing in front of the VOR, or through the RMS to the PMDT/RCSU/RSU. An alarm shutdown is reported to the RMS as well as indicated by an audible alarm.

Model 1150A DVOR 2-44 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 2.3.2.14.1.5 1.8432MHz Oscillator/Divider ChainsThe LCU employs a 1.8432MHz crystal oscillator to produce all frequencies required by the design. The frequency is divided by 512 to produce 3600Hz used to produce the audible alarm tone and the Transmit On clocks driven back to the monitors. The signal is further divided by 8 to produce 450Hz used as the system clock within the design. This signal is divided by 45 to produce 10Hz used in the 20 second delay counter and the Key De-bounce circuits. Figure 2-17 LCU Block Diagram 2.3.2.14.1.6 Positive Alarm RegisterThis register receives the positive (high True) alarms from the two monitors within a system. Depending on the configuration of the alarm voting and bypass logic, the Alarm Register will report an alarm to the transfer state machines if reported by the enabled monitors. 2.3.2.14.1.7 Negative Alarm RegisterThis register receives the negative (low True) alarms from the two potential monitors within a system. Depending on the configuration of the alarm voting and bypass logic, the Alarm Register will report an alarm to the transfer state machines if reported by the enabled monitors. 2.3.2.14.1.8 20 Second Delay CounterThe 20 second delay counter is activated whenever the system initially powers up or a transmitter has been shut down without transferring to a standby system to ensure that the system will not radiate any signal for a period of 20 seconds following the shutdown.

Model 1150A DVOR 2-46 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The following functions can be performed by the RMS through the parallel interface: a. Functions a-g listed above. b. Enable or disable the alarm signals from either one of the monitors. When a monitor's alarm signals are disabled, it is functionally equivalent to the monitor producing constant alarms. c. Set the “AND/OR” state of the alarm logic when it combines the alarm signals from Monitor 1 with the alarm signals from Monitor 2. When set to “AND”, both monitors must provide an alarm from the same source to cause the station to transfer. When set to “OR”, Monitor 1 signaling an alarm or Monitor 2 signaling an alarm will cause the station to transfer. d. Set the “Maintenance Alert” state. This lights the corresponding LED on the panel. e. Set the “Remote Control Fault” state. This lights the corresponding LED on the panel. In the alarm logic circuitry, the alarms from Monitor 1 alarm status are displayed on the panel. Similarly, the alarms from Monitor 2 alarm status are displayed on the panel. If a given monitor’s alarm signals are disabled by the RMS, it is equivalent to all of that monitor's alarm signals being asserted. The state of the AND/OR setting determines whether both or either of the Monitor 1 or Monitor 2 signals are required to produce a transfer condition. If one of the two +48V power fail logic signals goes active, the alarm logic will force an alarm condition for the monitor pair that is powered from the corresponding +48V supply. In order to avoid shutting the VOR station down, the alarm logic is forced to the AND state. This allows the other monitor to monitor the system. The alarm signals from the monitors have already been given the appropriate transfer delay times within the monitors. This results in an immediate transfer when the combinatorial requirements of the alarm signals are met. When a transfer condition occurs, the present transmitter that is connected to the antenna system is taken off the air. The other transmitter is connected to the antenna system, and turned on (if it is not already on). If the transmitter, not designated as main connected to the antenna system when the transfer condition occurs, the control logic will enter the shutdown state and both transmitters are turned off. Once the control logic enters the shutdown state, no further transfer operations will take place until a local operator or the RMS turns one of the transmitters on and specifies that it is connected to the antenna system. The Station Control Logic controls which transmitter is connected to the antenna system by the status of the +24V ANT outputs. 2.3.2.14.1.14 System Configuration InputsIn order to reduce the amount of effort required to program various modules within the VOR for the proper configuration, there are eight logic signals that are sent from the RMS to each module to specify the system configuration. 2.3.2.15 Test Generator (1A3A5) CCA TheoryTest generator CCA performs two functions. The primary function is to provide a standard reference signal to the DVOR monitors for calibration whenever directed by the RMS CPU for monitor integrity testing. The secondary function is an operator maintenance function, which is to allow test signals to be sent to the monitor(s), as directed by an operator through the PMDT. The operator can vary signal parameters (i.e., frequency, percent modulation, phase shift, etc.) to determine if a monitor is functioning properly and will alarm at the required settings. 2.3.2.15.1 Test Generator CCA Block Diagram TheoryRefer to Figure 2-18.The Test Generator CCA primary purposes are to generate test waveforms for verification of the Monitor CCAs as well as control of audio recording/play-back. System1 and System2 +48VDC supplies from connector P2 are diode-OR’d and fused before routing to a +5VDC DC-DC converter. The +5VDC output is linearly regulated to +3.3VDC as well as switched to -5VDC by another DC-DC converter. Each of the aforementioned output voltages is range-monitored by window comparators. The wired-OR’d outputs of the window comparators assert a power-OK signal and light an LED when all output voltages are within the tolerance windows. The power-OK signal eventually routes to the Facilities CCA for PMDT reporting.

Model 1150A DVOR 2-48 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. DC-DC ConverterP260 Pin DIN41612 Hybrid Connector ~POWER_OKFrom Control Backplane~TESTP196 Pin DIN41612 ConnectorDC-DC Converter+5VLinear Regulator-5VA+3.3V19.6608MHz OscillatorU1Programmable Logic DevicePower OK Window Comparators and Power OK LEDReset Circuitry2_+48Vdc1_+48Vdc32Kx16 Static RAMJ3ISP ConnectorJ1Microphone JackJ2HeadphoneJackDigital BuffersSPI SignalsParallel Bus SPORT SignalsMic to AGENsMic from Term BlkSPKR+/- to Term Blk~MRESETDiode-OR and Fuse1_TGEN+/-2_TGEN+/-Gain AmplifierAnalog Buffers~RESET12-Bit SPI A/D Converter14-Bit Parallel D/A ConverterHeadphoneTransformerMicrophone TransformerSPKR+/- from MonitorsWDOG Figure 2-18 Test Generator CCA Block Diagram 2.3.2.15.2 Test Generator CCA Detailed Circuit TheoryRefer to Figure 11-16.System1 and System2 +48VDC supplies from connector P2 are diode-OR’d by diodes CR3 and CR4 and fused by F1 before routing to the U10 DC-DC converter. The U10 DC-DC converter, diode CR6, inductor L3, and capacitor C32 create +5VDC, which is measurable on test point TP11.

Model 1150A DVOR 2-50 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Analog buffer U8:A sends a single-ended test generator waveform to A-D converter U14 for on-board testing and verification. The U14 A-D converter is serially controlled by signals SPI_SCK, SPI_MISO, and ~SPI_CS3X of the RMS CCA via connector P2. The U14 D-A converter has a built-in +2.5VDC reference which is filtered by capacitors C41 and C42, buffered by amplifier U21:A, and presented to the U12 Audio D-A converter. The audio source is either microphone input MIC+_IN from connector J1 or transformer T2. Transformer T2, which is driven from the Control Backplane voice terminal block via connector P1, is disconnected when a microphone is plugged into connector J1. Parallel data, address, and control (D0X, A1X, and ~AOEX for example) from the RMS CCA enter via connector P2, are buffered by U16 and U17, and decoded by the U1 PLD to determine the ~EXT signal. The ~EXT signal controls the U17 bus buffer data direction. Audio output to connector J2 originates at the Monitor CCAs, enters as SPKR+ and SPKR- through connector P1, and arrives at headphone connector J2. If a headphone or speaker is not plugged into J2, audio output couples through transformer T1 as SPKR_XFMR+ and SPKR_XFMR-. These signals exit connector P1 and eventually terminate at the Voice terminal block on the Control Backplane. 2.3.2.16 Low Voltage Power Supply (1A3A4, 1A3A8) CCA TheoryThere are two LVPS assemblies used on the transmitter cabinet. The low voltage power supply CCA. LVPS 1A3A4 is the low voltage power supply for transmitter 1 and 1A3A8 is the LVPS for transmitter 2. Each LVPS is identical in construction and operation. Each is interchangeable with the other. 2.3.2.16.1 Low Voltage Power Supply (LVPS) CCA Block Diagram TheoryRefer to Figure 2-19.The LVPS CCA converts +48VDC system power to +28VDC, +5VDC, +12VDC, and -12VDC for eventual use by the Synthesizer, Monitor, and Audio Generator CCAs. The +48V from connector P2 is fused and feeds two DC-DC converters. One DC-DC converter creates +28VDC while the other generates +5VDC, +12VDC, and -12VDC. Each of the aforementioned output voltages is range-monitored by window comparators. The wired-OR’d outputs of the window comparators assert a power-OK signal and light an LED when all output voltages are within the tolerance windows. The power-OK signal eventually routes to the Facilities CCA for PMDT reporting. The ~TEST signal when asserted from the LCU via connector P2 will insure the power-OK LED is lighted no matter the output of the window comparators. The VCO_EN signal from the LCU via connector P2 is filtered and routed out to connector P2 and eventually the Synthesizer CCA as signal VCO_PWR.

Model 1150A DVOR 2-52 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The VCO_EN signal from connector P2:C7 is filtered by inductor L5 and routed out connector P2:C9 as signal VCO_PWR. +48VDC, which originates at connector P2:C26, sources Zener CR11 through current-limit resistors R18 and R19 to create a precision +10VDC that can be measured at TP10. The precision +10VDC powers “window” comparators U5:A and U5:B; which compare the +5VDC voltage at U5-4 and U5-7 to the trip points established by resistors R21, R22, and R23 at U5-5 and U5-6. The precision +10VDC also powers “window” comparators U5:C and U5:D; which compare the +12VDC scaled by resistors R24 and R25 at U5-8 and U5-11 to the trip points established by resistors R21, R22, and R23 at U5-9 and U5-10. The precision +10VDC also powers “window” comparators U6:A and U6:B; which compare the +28VDC scaled by resistors R30 and R32 at U6-4 and U6-7 to the trip points established by resistors R21, R22, and R23 at U6-5 and U6-6. The precision +10VDC also powers “window” comparators U6:C and U6:D; which compare the -12VDC scaled by resistors R31 and R33 at U6-8 and U6-11 to the trip points established by resistors R27, R28, and R29 at U6-9 and U6-10. As long as the +5VDC, +12VDC, +28VDC, and -12VDC supplies are within the “window” trip points; the U5-2, U5-1, U5-14, U5-13, U6-2, U6,-1, U6-14, and U6-13 comparator outputs will be pulled-up to +10VDC through resistor R26; turning on both transistors Q3 and Q4. Transistor Q3 turned on lights the CR12 PWR_OK LED through current-limit resistor R35 and voltage-limit zener diode CR13. Transistor Q4 turned on pulls the ~LVPS_OK signal low, assuming a pull-up resistor after connector P2:A7 at the Facilities CCA. If any of the +5VDC, +12VDC, +28VDC, and -12VDC supplies go above or below the “window” trip points, both transistors Q3 and Q4 will shut off; darkening the CR12 PWR_OK LED and causing the ~LVPS_OK signal to go high, assuming a pull-up resistor after connector P2:A7 at the Facilities CCA. The ~TEST signal from connector P2:B8, when active low, is guaranteed to light the CR12 PWR_OK LED through diode CR14. Zener diodes CR15 and CR16 provide over-voltage protection to both the ~TEST and ~LVPS_OK signals. 2.3.2.17 Monitor CCA (1A3A3, 1A3A9) TheoryThe Monitor CCA amplifies the RF input from the field monitor antenna, band pass filters and analyzes the signals from the field monitor antennas. The parametric data is displayed on the PMDT and the Monitor CCA initiates an alarm status indication to the LCU if the DVOR fails to operate within specified limits. 2.3.2.17.1 Monitor CCA Block Diagram TheoryRefer to Figure 2-20. The monitor CCA is a circuit card assembly designed to monitor and analyze the radiated signal from the DVOR. The monitor checks the monitored signal against the high and low limits and generates the alarm status signals to the LCU if the DVOR fails to operate within specified limits. The Monitor CCA is inserted into the rack which provides the RF connection to the monitor antenna, power input, alarm signals to the LCU and serial communication to the RMS processor. The DVOR monitors are designed for dual operation in either AND or OR configuration with both monitors checking the signal from the field monitor antenna. The DVOR field monitor is normally connected with one antenna connected to an RF signal splitter that feeds the two Monitors. Operation with two monitor antennas connected to each monitor can be provided as an option. Refer to Figure 2-21.The antenna is connected to the backplane connector of the Monitor on the DIN female J2 connector. The input is 50 ohms and will accept an input of +10 dBm to -50 dBm.

Model 1150A DVOR 2-54 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 2-20 Monitor CCA, Block DiagramMOSIBF2MODE = 10SPI Slave Boot`AD9241ASIF ADCPPI0..13(PF6)TIMER0PPI_CLKAUDIO DAC 1SPORT0 CLKSPORT0 PRI XMTSPORT0 TFSMISOPF1 (HWAIT)MOSI/SPI_SS/PF0SPICLKMISOPF12 (HWAIT)SPICLKMOSIPF3 /BF2_CSSPORT1 CLKSPORT1 RCVSPORT1 TFSSPORT1 XMTSPORT1 CLKSPORT1 RCVSPORT1 RFSSPORT1 XMT10KPF2PF3Test PointTest PointDBG TXDBG RXRS-232Line Driver4-PinHeaderUART1 MB NOR FLASH(DSP1 and DSP2 Code)32K NVARMSPI ADC32 MB SDRAMParallel BusSPORT0 SEC XMTAUDIO DAC 2PF1 /ADC_SLOW_CSConfiguration RegistersALARM and Indicators125 KHz IFDetected Voice+IDENTDetected IDENTPF4 PF4DVSC5 Commutaor SYCNRS-232Line Driver4-PinHeaderDBG TXDBG RXADCMuxTest Generator Standby RF detectorIF Baseband Samples400 KHz Sample ClockSampled IFSampled Test Generator/Sampled Standby Detected RFRMSSERIALINTERFACELCUALARMSReceiverField MonitorAntenna

Model 1150A DVOR 2-56 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The U6 DSP communicates serially through one internal and two external UARTs (both in U25). The buffer circuit U28 converts the TTL levels to and from RS232 levels (+8 to – 8 Volts Dc) using an internal power supply circuit. The internal UART of U6 is connected to the factory debug port at J9. The other two UARTs control communications to the RMS processor and provide a spare serial port. The U6 DSP reads the operating frequency setting from the DIP switches on the backplane through the U47 buffer circuit. When selected the A0 through A7 inputs from the backplane switch are presented to the bus. This information is used to set the frequency of the Monitor synthesizer to a frequency that is 45 MHz less than the VOR transmit frequency. The U6 DSP reads the station configuration setting from the DIP switches on the backplane through the U46 buffer circuit. When selected the A0 through A7 inputs from the backplane switch are presented to the bus. This information is used to determine when the system is a DVOR or CVOR, single transmitter or dual and whether adjustments can be made remotely or only locally. The ~LOCAL signal comes from the LCU and determines if the VOR is being adjusted by a local operator. The voltage supervisor / watchdog (U45) resets all the digital circuitry when the +3.3V power supply is too low, when the LCU asserts the ~MRESET line, or when the U6 DSP does not refresh the watchdog timer. The U6 DSP coordinates all subsystems to measure the parameters, sends the measurements to the RMS using RS232 communications, and notifies the LCU (using latch U50) when a critical parameter is out of range using the primary and secondary alarms. Front panel LEDs are controlled by the outputs of latch U52. After a system reset, the alarm latch outputs (U50 and U52) are in the active state until updated by the DSP. The alarms are updated only when the DSP refreshes the voltage supervisor / watchdog. If there is a DSP failure, the alarms will remain in the last output state until watchdog time-out and the voltage supervisor / watchdog reset activates the alarms. During normal operation, the alarm outputs are read by the DSP using an input buffer (U53) to verify that outputs are not shorted or the latch has failed. The LEDs (CR12, CR14, CR16, CR18, and CR20) are used to signal the alarms and pre-alarms conditions on the front panel. The CPU_OK LED (CR22) is used to indicate that the U6 DSP is operating correctly. The external ~TEST signal coming from the LCU can light all LEDs to verify they have not failed. The U36 10MHz temperature-controlled crystal oscillator (TCXO) provides an accurate and reliable source of timing for the digital circuitry sections. Two BNC connectors are on the front panel. The SYNC signal is the trigger for an oscilloscope and the TEST signal is the source signal for the oscilloscope. The PMDT can select which Test signal to display and the Master DSP triggers the oscilloscope when the selected type is been sent The Monitor provides the ability to measure the operating frequency of Transmitter 1 and Transmitter 2 carrier, upper sideband and lower sideband. The signal “TMR1” is an input to the U6 DSP that has the ability to precisely measure the frequency of the incoming signal. Circuits U19, U21, U63, U64 and U65 are programmable gates used as multiplexers in this application. When control signal “SEL_FREQ_TX is low then the output of gate U21 is selected which originates from transmitter 1. When control signal “SEL_FREQ_TX is high then the output of gate U63 is selected which originates from transmitter 2. When control signal “SEL_FREQ_DIV1 is low then the output of gates U19 and U64 are selected which originates from either the USB or LSB. When control signal “SEL_FREQ_TX is high then the input 1_DIV_F0 of gate U21 and 2_DIV_F0 of gate U63 is selected which originates from the carrier frequency source. When control signal “SEL_FREQ_DIV0, is low then the output of gate U19 is the LSB (1_DIV_LSB) and the output of U64 is the LSB (2_DIV_LSB). When control signal “SEL_FREQ_DIV0, is high then the output of gate U19 is the USB (1_DIV_USB) and the output of U64 is the USB (2_DIV_USB).

Model 1150A DVOR 2-58 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. A/DSampleControllerDMA ControllerTIMER0IF ADCU24125 kHzSPORT 1SerialInterfaceDMA Controller DSP1U6SPORT 0Serial InterfaceDMA ControllerAudio DAC 1U69Audio DAC 2U71Input Buffer(1000 Samples)Detected Audio Buffer(4000 Samples)BP 125 KHzLP 20 KHzABSBP .3-4 KHz LP 5 KHzBP 1020 HzVoice and Ident Buffer(500x2 Interleaved Samples) Recovered VoiceRecovered IdentThresholderLP 20 KHzBuffer1Buffer 2Buffer 3U75 DSP Figure 2-22 Monitor DSP (U75) Signal Processing Diagram VOR Signal DemodulationRefer to Figure 2-22.The DSP U75 samples the 125 KHz IF signal using analog to digital converter U24. The DMA controller within U75 synchronizes the sampling of data. The data is stored in internal buffer 1. The data then is bandpass filtered with center frequency of 125 kHz. The data runs through an absolute value calculation which rectifies the signal. The signal is then low pass filtered with a cut off frequency of 20 kHz. The signal is then down sampled by a factor of 5. This signal enters the intermediate buffer 2. This buffer 2 data is serially transferred to DSP U6 for extraction of the VOR azimuth, 9960 Hz modulation, 30 Hz modulation and deviation ratio. The contents of buffer 2 are also sent through a 20 kHz low pass filter. The signal is then down sampled by 2. The signal is then low pass filtered with a cut off frequency of 5 kHz. The signal is then down sampled by 4 and enters a band pass filter with a pass band of 300 to 4000 Hz which contains both voice and identification signals. The voice then enters the buffer 3 Voice and Ident buffer. The voice also enters a bandpass filter centered at 1020 Hz to pass only the ident. Half of buffer 3 contents are transferred to Audio digital to analog converter U69 for the recovered voice and then through the U16 Audio Amplifier and off the Monitor and eventually the headphone jack on the Test Generator. The other half of buffer 3 contents are transferred to Audio digital to analog converter U69 for the recovered voice and then through U71 then unity gain buffer U72a. This signal leaves the Monitor and then goes to the Facilities CCA for possible connection to the speaker so that the technician can listen to the identification if selected through the PMDT. Refer to Figure 2-23.The DSP U6 samples three different VOR detected signals. One is the output of the receiver section for mU75. The second is the Test Generator signal. The third is the detected standby transmitter signal from the RF Monitor. One signal at a time is sent to the VOR signal processing routines.

Model 1150A DVOR 2-60 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Integral Detected IF (from DSP2)Remove DC-Bias RF_Level (dB)30 Hz LPF Decimate to 1 KHz 30 Hz BPF1020 BPF Envelope Detector9960 BPF Mod %9960 Freq Detector (Zero Crossing)10 KHz LO 90 Deg Angle Diff 30 Hz BPF Decimate to 1 KHz 30 Hz BPFIdent PresentIdent Continous30 Hz LO 90 DegAngle30 Hz Freq (zero crossing)FM Deviation30 Hz AM Freq (zero crossing)30 Hz Mod %AngleSUB Az AngleFM DetectorRelative Phase Angle Detector(Dual 30 Hz Quadrature Mixers)Test Generator(From SPI ADC)Standby Detected(From SPI ADC)Decimate to 10 KHz 2nd 1020 BPF Thresh hold DetectorIdent Code RecoveryIdent Mod %SRCMux80 KHz Baseband Sources500 ms FIFO500 ms FIFOFigure 2-23 Monitor DSP (U6) Signal Processing Diagram

Model 1150A DVOR 2-62 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. System AC voltage and current as well as obstruction light (oblite) AC voltage and current are sensed and scaled on the AC Monitor CCA before arriving at the BCPS CCA. Op-amps U10A and U10D, with potentiometers R29 and R30, calibrate the system and oblite VAC signals. Op-amp U14, with potentiometers R44 and R56, calibrate the system and oblite IAC signals. The calibrated signals pass to analog multiplexer U11 before analog-to-digital conversion by microcontroller U8. Status of the BCPS is displayed on LEDs CR7 and CR48 through CR54, all of which can be lighted by pressing lamp test on the LCU CCA. The microcontroller U8 reports status digitally to the RMS CCA via RS2332 signals through the TTL-RS232 converter U9. The microcontroller U8 may be reset at any time by pressing Reset on the LCU CCA. After reset, microcontroller U8 uses the BCPS strapping of connector P1-31 (grounded or open on the corresponding Carrier Backplane position) in conjunction with the Synch In and Synch Out signals (P1-29 and P1-30) to determine whether it is BCPS1 or BCPS2 and if another BCPS is active in the cabinet. Microcontroller U8 also reads revision strap inputs U8-9, U8-23, and U8-33 after reset to determine hardware configuration. Front panel circuit breaker CB1 may be used to disconnect +48 BUSS power from the Carrier Backplane so that other modules in the cabinet on the same transmitter side may be serviced. Figure 2-24 Fanless BCPS CCA Block Diagram

Model 1150A DVOR 2-64 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Battery back-up is switched on when the diode OR’d output of diodes CR45 and CR47 (48VPS1 or 48VPS2) is too low; approximately +43Vdc. Comparator U19 monitors this diode OR’d output (scaled by RN1 and renamed 48VPS_MON) at comparator U19-2 and compares it to the scaled +5VREF at U19-3. When 48VPS_MON is too low, comparator U19-7 switches low which turns on isolator U2 and transistors Q1 and Q2; connecting the battery to +48BUSS. Comparator output U19-7 also connects to diode CR11 and resistor R23 so microcontroller U8-7 may read battery switch status as signal ~DC_FAIL. Battery back-up will remain on until either 48VPS_MON returns or the battery discharges to below approximately +40Vdc. Upon sensing the battery has discharged too much (BATT_VOLT mentioned previously), microcontroller U8-25 turns on transistor Q3 which shuts off comparator U19-7, isolator U2, and transistors Q1 and Q2; disconnecting the battery from +48BUSS. This battery cut-off prevents excessive discharge and possible harm to the battery. The BCPS CCA (and the associated transmitter) will now be completely powered off until either AC power is restored or the charger reset switch S1 is pressed. Charger reset switch S1 provides a means of powering up the BCPS CCA (and the associated transmitter if the front panel circuit breaker is closed) with no AC power available. Pressing switch S1 discharges capacitor C7 through resistor R15, momentarily turning on transistor Q7. Transistor Q7 momentarily connects the battery through current-limit resistor R91 and diode CR28 to +48BUSS; powering on microcontroller U8. Once microcontroller U8 detects no AC voltage is present, it turns on battery back-up through transistors Q1 and Q2. The BCPS CCA will remain on until either AC power is restored (shutting off battery back-up) or the battery discharges too low (battery cut-off). System AC voltage and current as well as obstruction light (ob lite) AC voltage and current are sensed and scaled on the AC Monitor CCA before arriving at the BCPS CCA. System AC voltage (SYS_VAC_POS) enters cPCI connector P1-25 and is transient protected by CR23. Current limiter U13, resistor R33 and zener diode CR29 condition the signal to drive the AC_ON LED CR48. Potentiometer R30 scales while resistor R46 and capacitor C21 filter the signal before op-amp U10D buffers it to resistor network RN5-16 and multiplexer U11-19 as SYS_VAC_SCALED. Obstruction light AC voltage (OB_LITE_VAC_POS) enters cPCI connector P1-23 and is transient protected by CR24. Current limiter U12 and resistor R31 provide a constant load. Potentiometer R29 scales while resistor R34 and capacitor C22 filter the signal before op-amp U10A buffers it to resistor network RN5-12 and multiplexer U11-21 as OB_LITE_VAC_SCALED. System AC current (SYS_IAC_POS) enters cPCI connector P1-26 and is coupled by capacitor C45, transient protected by CR38, and conditioned by op-amps U14A and U14D. The amplifiers and connected components act as full-wave rectifier and filter averaging circuits. Potentiometer R56 adjusts the final gain to create SYS_IAC which is further scaled by resistor network RN5-14 to create SYS_IAC_SCALED at multiplexer U11-20. Obstruction light AC current (OB_LITE_IAC_POS) enters cPCI connector P1-24 and is coupled by capacitor C46, transient protected by CR30, and conditioned by op-amps U14B and U14C. The amplifiers and connected components act as full-wave rectifier and filter averaging circuits. Potentiometer R44 adjusts the final gain to create OB_LITE_IAC which is further scaled by resistor network RN5-10 to create OB_LITE_IAC_SCALED at multiplexer U11-22. Power supplies VCC and +12ANA are scaled by RN4 before routing to multiplexer U11-10 and U11-9. Power supply -12ANA is scaled by RN5 and inverted to a positive voltage by op-amp U10C before connecting to multiplexer U11-8 as -12ANA_SCALED. The -12ANA is inverted because microcontroller U8 can only read voltages in the 0-to+5V range. Most of the analog signals of the BCPS are connected to the 16-channel analog multiplexer U11. Individual channels are routed to output U11-28 by channel selects U11-17, U11-16, U11-15, and U11-14 which are controlled by microcontroller U8. The multiplexer output signal U11-28 is buffered by op-amp U10B, filtered by resistor R24 and capacitor C13, and clamped by diodes CR9 and CR10 before entering an analog channel of microcontroller U8-3.

Model 1150A DVOR 2-66 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 2-25 Extender Board 2.3.2.22 Commutator Control CCA TheoryThe Commutator Control CCA connects to a 25 conductor cable on the Control Backplane CCA. This cable originates from one of the two Audio Generators in the Control rack. The output of the Commutator Control CCA exits onto the backplane and to two 40-pin connectors that connect to ribbon cable from the Commutator CCAs. A 4-pin header on the Commutator Control CCA may be strapped to enable/disable automatic ground-check. Capability for the ground performance check of the antennas and commutator switching is provided. This check is automatic after is has been started by the technician and therefore is called an Automatic Ground Check system. When started, the Monitor CCA sends a switch position code to the Commutator control CCA via the 25-pin cable originating at the Control rack. The switch positions start at 0 and increment by one until 15. Each position represents 22.5 degrees of antenna rotation from the nominal position. At each position the Monitor CCA determines the azimuth angle at the Field Monitor antenna location. From this data the errors are measured and a Fourier analysis is performed to generate the display data. The error as determined during the ground check is analyzed to determine the bias, the duantal error, quadrantal error and octantal error. The bias error is the average error around the station. The duantal error is sinusoidal with a rate of one cycle in the 360 degrees around the station. The quandrantal error is sinusoidal with a rate of four cycles in the 360 degrees around the station. The octantal error is sinusoidal with a rate of four cycles in the 360 degrees around the station

Model 1150A DVOR 2-68 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 012260-0001 Sideband BackplaneP1 & P2 60 Pin DIN ConnectorsRS422 to CMOS TTL ConvertersPower Switch Fuse+28VDC OR'ing DiodesDC-DC ConverterCMOS TTL to Bi-level Converters PIN Diode DriversGround Check / Antenna Select DecoderRegulatorRegulator+5VDC+3.3VDC-10VDC+12VDC-12VDCGround Check Enable StrapPower MonitorSPI I/O SPI Temperature(optional)SPI EEPROMPower OK LED~TESTSPI ControlEven Commutator CCA 012104-0001Odd Commutator CCA 012104-0001Dipole Antenna Array - 48 elements~MRESET ~PWR_OKFigure 2-26 Commutator Control CCA, Block Diagram 2.3.2.22.2 Commutator Control CCA Detailed Circuit TheoryRefer to Figure 11-23.Commutator switch control signals from the Audio Generator CCA through connectors P1 and P2 are applied to the inputs of the Commutator Control CCA. These control signals consist of the four balanced antenna select signals, a transfer signal, and a clock signal applied to quad differential line, receivers U5 and U6. Two inputs of U6 are not used and are tied to power or ground.

Model 1150A DVOR 2-70 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Scope Synch is available on the ODD XFR signal at test point TP1. Power for the CCA enters via P1-17, P1-18, P1-20, and P1-21. Diodes CR4 and CR6 form an “OR” for the two +28V supplies into Switch S1. If switch S1 is on and fuse F1 is intact, the DC-DC converter PS1 converts the +28V to +5V, +12V and -12V supplies. Regulator U1 regulates the -12V supply to -10V. Regulator U2 regulates the +5V to +3.3V for powering the PLD U4. Connector J6 is used for in-system programming of PLD U4 and should not be utilized by the customer. Connector J7 is used for test of the CCA and should not be utilized by the customer. Control lines entering via connectors P1 and P2 are surge protected by transient voltage suppressors (TVS) CR9 though CR28. The +28V supply is protected by TVS CR7. The +5V supply is protected by TVS CR2. The auto-ground check enable input is transient protected by TVS CR8. Zener diode CR1 creates a 10V reference to power comparators U43 and U44 for monitoring of the on-board power supplies. Only the +5V monitor will be discussed further. The 10V reference biases resistors R25, R26, and R29 as awindow into comparator inputs U43A-5 and U43A-6. If the +5V supply into U43A-4 and U43A-7 is within the window, the U43A-2 and U43A-1 outputs stay high; indicating the +5V supply is OK. LED CR34 lights when switch S1 is in the ON position and the +3.3V, +5V, +12V and -12V supplies are all within tolerance, approximately nominal ± 10%. LED CR34 may be tested when off by pressing the lamp test switch on the LCU CCA. Power status is also indicated by transistor Q10 into SPI I/O port U40-12 for access by the RMS CCA. Buffers U45 and U37 drive SPI signals to and from SPI I/O port U40, serial EEPROM U38, and optional temperature sensor U39. Strapping resistors R5, R8, R20, and R21 decode a unique address for SPI I/O Port U40. Logic U36, U41, and U42 prevent more than one SPI device from transmitting at once. The SPI I/O Port U40 is reset through diode CR33 and resistor R19 during power-up or when the reset switch is pressed on the LCU CCA.

$Model 1150A DVOR 2-72 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Table 2-2 VOR Ground check Offset Table Antenna # (0-47) Ground Check (GCSC4..1) Final Antenna # (0 -47) Antenna # (0-47) Ground Check (GCSC4..1) Final Antenna #(0-47) 1 0 1 4 0 41 1 4 4 1 71 2 7 4 2 10 1 3 10 4 3 13 1 4 13 4 4 16 1 5 16 4 5 19 1 6 19 4 6 22 1 7 22 4 7 25 1 8 25 4 8 28 1 9 28 4 9 31 110 31 4 10 34 111 34 4 11 37 112 37 4 12 40 113 40 4 13 43 114 43 4 14 46 115 46 4 15 1 2 0 2 \ \ \2 1 5 \ \ \2 2 8 \ \ \2 3 11 47 0 47 2 4 14 47 1 2 2 5 17 47 2 5 2 6 20 47 3 8 2 7 23 \ \ \ 2 8 26 \ \ \ 2 9 29 47 14 41 210 32 47 15 44 211 35 212 38 213 41 214 44 215 47 2.3.2.23 Commutator CCA (1A10, 1A11) TheoryThe Commutator CCA measures 15-7/8" high and 14-7/8" wide. There are two Commutator CCAs installed in the electronics cabinet. They are located on the upper left and upper right side of the cabinet and may be accessed by removing the side panels of the transmitter cabinet. The right (viewed from the front) Commutator CCA is used to switch the RF signals to all the odd antennas, and the left Commutator CCA drives the even antennas. Each Commutator has twenty-six N type RF connectors and two 37-pin D-shell connectors. 2.3.2.23.1 Commutator CCA Block Diagram TheoryRefer to Figure 2-27.There are two Commutator CCAs installed in the Commutator rack, one to switch the RF signals to all the odd antennas, and the other to drive the even antennas. Since both CCAs perform exactly alike, the discussion is limited to the odd antenna switch circuit board. To simplify the interconnection of the signals and antennas used in the 48 antenna system,Table 2-1 is available as an aid. The pin numbers of the 012257 Pin Driver CCA and the 012702 Commutator do not match due to the different styles of connector (i.e. 40 pin dual row on the backplane and 37 pin D type).$

Model 1150A DVOR 2-74 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 2-27 Commutator CCA, Block Diagram Each antenna pair is selectively enabled by the selection of its assigned display driver. Each antenna line is also protected from extreme voltage spikes caused from lightning or other EMF generators by a gas surge suppressor. 2.3.2.23.2 Commutator CCA (2A2, 2A3) Detailed Circuit TheoryRefer to Figure 11-6.There are two Commutator CCAs installed in the Commutator rack; one to switch the RF signals to all the odd antennas, and the other to drive the even antennas. Since both CCAs perform exactly alike, the discussion is limited to the odd antenna switch circuit board.

Model 1150A DVOR 2-76 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 2.4 PMDT (PORTABLE MAINTENANCE DATA TERMINAL (UNIT 2)The lap top computer is a commercially obtained computer used for local control, monitoring and maintenance analysis of the DVOR system. The PMDT is typically located on a shelf or desk in the vicinity of the electronics cabinet. The PMDT is interconnected to the VOR via a USB cable to the front of the RMS CCA. The USB cable has a standard USB connector on one end that mates with a connector on the back of the PMDT. The other end of the cable is connected to the front panel of the RMS CCA in the top rack in the electronic equipment cabinet. The PMDT provides the technician access to the DVOR adjustments, tests and measurements. To the greatest extent possible, all indications of voltage, power and monitoring parameters are available through the PMDT. All parameters available locally are also available to a remote computer running the PMDT software. Station security control is provided through a three level password system. Level one is a read-only mode; all screens can be viewed but no changes can be made. Level two provides the capability to execute any commands not effecting the signal in space and includes on, off and station reset. Level three allows complete access, which includes the ability to change all operational parameters. Level four allows permits the change of the security codes. 2.5 BATTERIES (UNIT 3)Four 12 volt batteries are connected in series to provide the needed 48 volt backup battery voltage used with the UPS in the BCPS. The standard batteries supplied are 65 amp/hour and will normally provide up to 3 hours of emergency operation. As an option higher capacity batteries may be provided to increase the duration of battery operation. 2.6 FIELD MONITOR KIT (UNIT 4)The Field Monitor Kit contains all components needed to set up a receiving antenna system for the VOR. For the DVOR, the basic arrangement is one dipole receiving antenna. The RF signal from the dipole antenna is applied to a signal splitter which divides the RF signal into two equal signals. Each portion of the RF is then sent to aVOR monitor. The dipole antenna provides 3 dB gain in the forward direction. The field monitor antenna is located approximately 300 feet from the DVOR antenna array.

Model 1150A DVOR 3-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.5.1.2 Starting the PMDT ApplicationTo start the PMDT application double-click on the PMDT icon on the desktop or select the Start >> Programs >> SELEX-SI >> PMDT menu item. Note that the PMDT application is best viewed on a monitor with a resolution of 1024x768 or larger, using the “Normal (96DPI)” font size. Using the “Large size (120DPI)” Windows font will distort some PMDT screen controls making the data hard to read. Refer to the Microsoft Windows XP Display Properties screen for these settings. 3.5.1.3 Turning On the VORTurn on both AC switches, and then both DC switches on the BCPS assemblies. Turn on the battery circuit breakers. The system will perform its initialization, delay 20 seconds and then start transmitting. Pressing the Local Mode button will abort the 20 second delay and start the transmitters immediately. 3.5.2 Equipment Shutdown3.5.2.1 Equipment Turn OffLog out of the PMDT by selecting System >> Logoff/Disconnect. If the VOR is currently in a non-standard mode of operation, the user will be prompted to correct the issue(s) before continuing with the logoff. Once the PMDT is logged off, turn off both DC circuit breakers, and then both AC circuit breakers. 3.5.2.2 PMDT PC Turn OffThe power to the PMDT PC should not be removed until the Windows Shutdown sequence has been performed. This is done by selecting Start >> Shut Down... >> Shut down >> OK. The PMDT PC should automatically power down. 3.6 PMDT SCREENSThis section describes each of the screens used by the PMDT operator to control and monitor the performance of the VOR equipment. 3.6.1 GeneralThe PMDT is a Microsoft Windows application requiring Windows XP or Windows VISTA. Windows 98, Windows NT or Windows 2000 may be used for direct connections to the VOR but the use of the PMDT over a modem will not be available on these systems. The PMDT application contains three graphical sections; Menus, the Sidebar, and Screens. The screens are intended to be used with a mouse where the operator positions a cursor on a screen control symbol and clicks the left mouse button to activate the control. Clicking one of the menu items will cause the program to present screens associated with the broad category described by the function (RMS, Transmitter, Monitor, etc.). NOTE The VOR allows configuration changes by PMDT with a local connection by default. The DIP DIP Switch S1 Bit 5 “Remote Allowed/Not Allowed” switch on the Backplane may be set to allow configuration change by remote connection also. 3.6.2 MenusThe PMDT functions are arranged in hierarchical menus such that selecting one menu will cause a lower level menu of functions to drop down. A “`”symbol to the right of a menu item indicates that a lower level menu will appear if the cursor is briefly kept on the menu item, or if that menu is selected. Each menu item contains an underlined character. The menu item can be selected from the keyboard without using the mouse by simultaneously pressing the “Alt” key and the underlined character. This provides an alternate method for making screen selections should a mouse not be available with the PMDT. Similarly, screens containing several controls can be negotiated through the use of the arrow keys, the ‘Tab” key, and the space bar.

Model 1150A DVOR 3-4 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.3 System Status at a Glance - Sidebar Status and ControlThe Sidebar Status and Control is presented on every screen as shown in Figure 3-1 (Dual Transmitter shown). The portion of the screen under the “Connected” indication is called the “Sidebar”. The Sidebar presents the current status of the VOR. The data is refreshed approximately once every two seconds. At a glance, the technician can determine the state of the VOR. Buttons (point and click with the mouse) are provided to select Tx1 Main, Tx2 Main, Tx1 Antenna, Tx2 Antenna, Tx1 Load, Tx2 Load, Tx1 Off, Tx2 Off, Monitor 1 Bypass, and Monitor 2 Bypass. The displayed data originates from either Monitor 1 or Monitor 2, depending on which transmitter is on the air. If a DME is collocated with this VOR, its summary level status will also be displayed at the bottom of the Sidebar. Figure 3-1 PMDT Opening Screen with “Sidebar” Data

Model 1150A DVOR 3-6 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 3-2 PMDT Configuration Screen 3.6.6 Connecting to the VOR3.6.6.1 Security LevelsAccess to the VOR system via the PMDT is restricted through the use of four security levels. Level 1 is the lowest security level, and Level 4 is the highest security level. These security levels are accessed as shown in Table 3-2:Table 3-2 VOR Security Levels Security Level Accessed by Permissions Level 1 Logging on with either: User ID of “GUEST”, without a password, or a valid Level 1 User ID and the corresponding Password. System Status and Parameters. At this level, the user has display-only access to all screens except for the security codes screen. The user has no control over the system. Level 2 Logging on with: A valid Level 2 User ID and the corresponding Password Non-Critical Functions. At this level, the user has Level 1 access plus the issuance of discrete commands which do not modify the signal in space. For example, the user can turn the signal on/off, but cannot modify the course position. Level 3 Logging on with: A valid Level 3 User ID and the corresponding Password Critical Functions (except Passwords) - The user has access to all functions that are available in the system, except for the Security Screen. Level 4 Logging on with: The valid Level 4 User ID and the corresponding password. Critical Functions - The user has access to all functions that are available in the system, including assignment of User IDs, Passwords, and Security Levels in the Security Screen. The default Level 4 user account information, which is case-sensitive, is: User Name: SEC4 Password: FOUR The default Level 3 user account information, which is case-sensitive, is: User Name: SEC3 Password: THREE

Model 1150A DVOR 3-8 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. The “Add Phone Number” screen shown in Figure 3-4 is used to specify how the call will be placed. A Windows TAPI-based call allows for the use of a long distance calling card, or handling specific Country Code or Area Code rules, which must be configured using the “Change Dialing Properties” button on the System Directory screen. For basic phone calls, the phone number can be entered in the “Just dial this Phone Number” field, including any required dialing prefixes such as “9”. A comma can be used to insert a 1 second delay in the dialing sequence if needed. Figure 3-4 Add Phone Number Screen Figure 3-5 PMDT Login Prompt To obtain Security Level 4 access, select System >> Logon RMS and enter the Level 4 User ID and Password. If the ID and Password were entered correctly, the Initial PMDT screen (Figure 3-1)will be displayed. If the logon attempt was not successful then the PMDT will display a message indicting an unsuccessful log-on and then display the PMDT Login screen again. NOTE The Security Codes Screen will not be displayed for Levels 1, 2, and 3. Some commands and controls will appear in a light grey color to indicate that access to these controls is not available at the current password level.

Model 1150A DVOR 3-10 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.1.2 Monitor/Transmitter Status ScreenThe Monitor/Transmitter Status screen is shown in Figure 3-7.This screen shows the current summary-level operational status of the monitors and transmitters. Figure 3-7 Monitor/Transmitter Status Screen

Model 1150A DVOR 3-12 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.1.4 Hardware Revisions ScreenThe Hardware Revisions Screen is shown in Figure 3-9.This screen is used to maintain configuration management information for each of the installed modules. Data can be entered in each of the available fields by the technician. This data is then written into the on-board memory in the associated module, for use in Customer Service, module history records, and general system maintenance. Figure 3-9 Hardware Revisions Screen

Model 1150A DVOR 3-14 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.2.2 Power Supply Data ScreenThe RMS Power Supply Data screen is shown in Figure 3-11.This screen shows the status and limits of each of the system’s power supplies. If any parameter is enabled as a maintenance parameter in the associated RMS>>Configuration>>Power Supply Limits screen, and its measured value falls outside of either the Alert Limits or Pre-Alert Limits, the parameter’s value will be colored yellow to indicate the alert condition. Figure 3-11 RMS Power Supply Data Screen

Model 1150A DVOR 3-16 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.2.4 Temperature Data ScreenThe RMS Temperature Data screen is shown in Figure 3-13.This screen displays the current status of the system’s temperature sensors. The Cabinet Interface temperature sensor is located on the Cabinet Interface Assembly located at the rear of the cabinet. The optional external temperature sensor module is connected to the Cabinet Interface Assembly. The remaining sensors are located on the individual modules. Any abnormal signal will be indicated in yellow. Note that when the optional Environmental Sensor Kit is not installed, the Outside Temperature reading will default to its lowest reading of -25°C. Figure 3-13 RMS Temperature Data Screen

Model 1150A DVOR 3-18 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.3 RMS Logs ScreenThe PMDT includes the following log screens that provide time tagged records of changes in the system parameters and operating condition. 3.6.7.3.1 Operational Summary ScreenThe Operational Summary Screen is shown in Figure 3-15.This screen presents the duration that each of the transmitters has spent in each operational condition. The Reset Operational Summary button restarts all of the Operational Summary timers. Figure 3-15 RMS Operational Summary Screen

Model 1150A DVOR 3-20 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.3.3 Maintenance Alert Log ScreenThe Maintenance Alert Log Screen is shown in Figure 3-17.This screen provides the latest 100 maintenance alert state changes that have occurred. When 100 or more state changes have occurred, subsequent alerts will replace the oldest events in the log. Entries in the log identify the date and time the alert occurred, the type of alert, and a short description of the alert event, and the current status of the alert condition. The Update button reloads the log file from the RMS and updates the display with any new entries. The Reset button clears the log file in the RMS. Figure 3-17 RMS Maintenance Alert Log Screen

Model 1150A DVOR 3-22 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.3.5 Parameter Change Log ScreenThe Parameter Change Log Screen is shown in Figure 3-19.This screen provides the latest 100 changes made in the operator parameters. When 100 or more changes have been made, subsequent changes will replace the oldest changes in the log. The Parameter Change screen specifies the date and time, identifies the operator logged on to the system when the change was made, and the file in which the data was changed. The Update button reloads the log file from the RMS and updates the display with any new entries. The Reset button clears the log file in the RMS. Figure 3-19 RMS Parameter Change Log Screen

Model 1150A DVOR 3-24 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.4.1 General RMS Configuration ScreenThe RMS’s General Configuration screen is shown in Figure 3-20.This screen allows the operator to configure the general parameters of the VOR system. Figure 3-20 RMS General Configuration Screen The parameters in the General Configuration Screen must be set to correctly correspond to the equipment installation at each site. Refer to the following table for details pertaining to each of the configurable parameters in the General Configuration Screen. Note that some parameters are only applicable to Dual Equipment. In Single Equipment systems, these parameters will not be displayed.

Model 1150A DVOR 3-26 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.4.2 Station Configuration ScreenThe Station Configuration Screen is shown in Figure 3-21.This screen is used to configure the various system-level parameters for the VOR station: CVOR/DVOR, Dual/Single Transmitter Dual/Single Monitors, Dual Monitor Inputs, and the station’s Transmitter Frequency. The value for each of these settings currently stored in the RMS, Monitors, and Audio Generators is also displayed for reference. Note that any changes under User Configuration must be made while in the “Local” mode and will not take effect until the “Apply” button is pressed. The “Apply” button is “grayed” out until a parameter is changed and then becomes fully visible. Any discrepancies between the User Configuration, RMS, Monitors, or Audio Generators will be indicated with a red background, and should be corrected by the user. This can be done by verifying the backplane DIP switch settings as detailed below, backing up the configuration (RMS >> Config Backup) followed by a system reset. Figure 3-21 Station Configuration Screen

Model 1150A DVOR 3-28 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.4.3 Power Supply Limits Configuration ScreenThe Power Supply Limits screen is shown in Figure 3-23.This screen is used to configure the upper and lower alarm limits and enable limit checking for the various system power supply voltages and currents. The checkboxes are used to enable the corresponding parameter's Maintenance Alert. If the checkbox is checked, a Maintenance Alert will be generated when the parameter is out of the specified limits. Figure 3-23 Power Supply Limits Configuration Screen

Model 1150A DVOR 3-30 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.4.5 Security Codes Configuration ScreenThe Security Codes screen is shown in Figure 3-25.This screen is used to configure the security access credentials for each user, including User ID, Password, and Security Level. This User ID/Password information is encrypted and stored in the non-volatile RAM (NVRAM) on the RMS CCA. This screen is only available to the Level 4 user. Figure 3-25 Security Codes Configuration Screen 3.6.7.4.5.1 User Account MaintenanceAs part of initial configuration, several user accounts should be setup, corresponding to the access levels required. User account maintenance can only be done through a direct connection (i.e. not via a remote modem) in the LOCAL mode, from within Security Level 4, with the exception of changing the current user’s password. All users can change their own passwords, when connected directly and the system is in Local Mode, through the RMS >> Commands >> Change Password menu option. Refer to Figure 3-25 for the Security Codes Configuration Screen. 3.6.7.4.5.2 Add a User Account1. Log on to Security Level 4 and select the RMS >> Configuration >> Security Codes screen. 2. Click on any empty User ID field. 3. Enter the desired User ID. Note that the User ID must be 4 to 32 characters in length, is case-sensitive, and can contain any alphanumeric characters. 4. Press TAB to move to the associated Password field. 5. Enter the desired Password. Asterisks will hide the password on the display. Note that the password must be 4 to 32 characters in length, is case-sensitive, and can contain any alphanumeric characters. 6. Select the desired Security Level for this user. 7. Repeat these steps for any additional users.

Model 1150A DVOR 3-32 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.7.5 RMS CommandsThe RMS Commands menu, shown in Figure 3-26 through Figure 3-30,provides system level controls for setting the time and date of the VOR station to the PMDT PC’s current settings, changing the current user’s password, setting the system’s Fan Control, setting the level of any of the Spare Digital Outputs, controlling the BCPSs, resetting the Intrusion and Smoke Detectors, resetting the RMS hardware, and basic control of a co-located 1118/1119 DME if so equipped. Refer to Figure 3-26.Note that if the VOR is connected to an RCSU, the Set Time and Date command will not be available, since the RCSU updates the current time to all of its associated navaids to its system clock. If the displayed time is incorrect, set the correct Time and Date at the RCSU itself. Figure 3-26 RMS Commands

Model 1150A DVOR 3-34 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 3-29 RMS Commands - BCPS Charger Enable and Disable Figure 3-30 RMS Commands - DME Controls The DME Commands sub-menu of the RMS Commands menu shown in Figure 3-30 is used for basic control of a co-located Fernau DME. It is only available if the DME is configured present in the RMS >> Configuration >> General screen.

Model 1150A DVOR 3-36 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.1.1.2 Notch Monitor Data ScreenThe Notch Monitor Screen is shown in Figure 3-32.This screen displays the Notch Monitor data from the associated Monitor. The monitor measures the signal from the Field Monitor for “notches” in the detected signal. A notch indicates a fault in one or more transmitting antennas, feed cables or commutator switch channels. When a failure occurs in one of these channels there is a lack of signal and therefore a notch in the detected signal pattern. The 1150A DVOR is a double sideband configuration and therefore there are four sideband antennas on at any one time. Therefore the notch will not fall to zero but since three other antennas are contributing to the signal only a reduction in signal can be expected. The Record baseline button is used when the technician is confidant that the DVOR is operating properly, such as following a flight inspection of the facility. When the Record Baseline button is pressed, the current data is copied into memory as the “Baseline” Data and then used as the reference. If the Sideband power is varied, then a new baseline will be required. When the measured signal differs from the Baseline by more than the Notch Monitor tolerance set in the Monitor Alarm Limits screen, the alarm (red) or alert (yellow) indication is generated, depending on if the Notch Monitor is configured as a Primary or Secondary Alarm. The tolerance for notch monitoring should be set to approximately 20% in the Monitor Alarm Limit screen, but the technician can adjust this tolerance as needed for more or less sensitivity. Note that when one antenna fails there will typically be an out-of-tolerance indication for one to four of the possible radiating antennas. When an out of tolerance condition exists, the Sideband VSWR data screen should be reviewed as well. If there is an indication of Sideband VSWR alarm, investigate the VSWR alarm indication first. Figure 3-32 Notch Monitor 1 & 2 Data

Model 1150A DVOR 3-38 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.1.2 Monitor Configuration ScreensThe PMDT contains the following Monitor Configuration Screens that are used to configure the VOR’s Monitors. These screens and their contents are described below. 3.6.8.1.2.1 General Configuration ScreenThe General Configuration screen is shown in Figure 3-34.This screen is used to configure the general operation of the VOR’s Monitors. It contains controls used to enable the Executive Alarm for various monitored parameters. The user can select how each of the Executive parameters is classified, either as Primary Alarm or Secondary Alarm. When the LCU’s Transfer Logic is set for Transfer on Primary/Secondary Alarm, any out of tolerance condition of a Primary or Secondary Parameter will cause the system to be shutdown. Setting the LCU’s Transfer Logic to “Best Availability” allows the LCU to keep the system operating in the event of only a Secondary Alarm. Figure 3-34 General Monitor Configuration

Model 1150A DVOR 3-40 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.1.3 Monitor CommandsThe Monitor Command menu is shown in Figure 3-36.The Monitors can be bypassed using the corresponding command under the Monitors >> Commands menu. Alternatively, the bypass button on the sidebar and LCU can be used. Figure 3-36 Monitor Commands 3.6.8.2 Monitor 1 & 2 ScreensThe PMDT contains a set of screens for each of the two Monitor CCAs in the VOR. Only the screens for Monitor 1 are discussed in this section; those for Monitor 2 in a Dual VOR are identical. 3.6.8.2.1Monitor Data ScreensThe PMDT contains several Monitor Data Screens that are used to view the current status of the monitored parameters. The screens and their contents are described below.

Model 1150A DVOR 3-42 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.2.1.2 Monitor Status ScreenThe Monitor Status Screen is shown in Figure 3-38.This screen displays the general status of the associated Monitor, including any Primary/Secondary Alarms, Pre-Alarms, Maintenance Alerts, Operating Mode and Diagnostic status. Figure 3-38 Integral Monitor Status Screen

Model 1150A DVOR 3-44 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.2.2.1 Completed Test ResultsThe Completed Test Results screen is shown in Figure 3-39.This screen displays the results of the last Alarm Limit Integrity Test performed by the associated Monitor. It shows the measurements made in each integrity test, as well as the high and low alarm limits for each measurement. Each test result includes the data from the test along with a pass/fail indication by color of background. If the test result background color is green then the test results were within expected limits. If the background color is red then the results exceed acceptable limits. Figure 3-39 Completed Monitor Integrity Test Results Screen

Model 1150A DVOR 3-46 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.2.2.3 Monitor1>>Test Generator ScreenThe Monitor 1 Data>>Test Generator screen is shown in Figure 3-41.This screen displays the Monitor data obtained during the last Test Generator cycle for the associated Monitor. The Test Generator runs continuously, starting a new test cycle approximately every 2 minutes. The Test Generator parameters may be changed by entering the desired values. Figure 3-41 Test Generator Screen

Model 1150A DVOR 3-48 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.2.3.2 Local Control Unit Fault History System Status ScreenThe Fault History System Status screen is shown in Figure 3-43.This screen shows the LCU status and antenna configuration at the time of the last three fault conditions. Figure 3-43 Local Control Unit Fault History System Status Screen

Model 1150A DVOR 3-50 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.2.5 Monitor Test Signal Output ControlThe Monitor Test Signal Output Control is shown in Figure 3-45.This screen is used to connect the desired signal to the Test BNC connector (J3) on the front of the Monitor circuit card assembly for maintenance purpose. Each of the signals are available to be connected to test equipment. The default signal connected to the Test connector is the Integral composite. Selection of these signals has no effect on the Monitoring performance. Figure 3-45 Monitor Test Signal Selection

Model 1150A DVOR 3-52 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.3.2 VOR Ground Check Data ScreenThe 1150A DVOR provides the ability to perform a ground check. The Ground Check Data Screen is shown in Figure 3-47.This screen is used to initiate a VOR Ground Check and display of the data from the ground check. SAFETY CRITICAL NOTE The DVOR Automatic Ground Check changes the radiated signal and a NOTAM SHALLbe issued to notify that the DVOR is not in service during this test. Per ICAO State letters, conducting this type of DVOR ground check is an HMI event. (HMI = Hazardously Misleading Information). When HMI is intentionally produced, ICAO requires that the NOTAM text contain information that conveys to the flight crew that the signals are not only “out of service”, but may be unsafe to use, even though they may appear normal. The monitor controls the RS422 data to the Commutator Control CCA to rotate the position of the DVOR from the normal position in 22.5 degree increments. At each of these positions the Monitor measures the signal and computes the error for that position. When all 16 positions have been measured, a Fourier Analysis is computed and the resulting errors are displayed. The outputs of the Fourier analysis, (FFT Errors), are Duantal, Quadrantal, Octantal and Bias errors. Duantal error has one maximum and one minimum in 360 degrees around the DVOR. Similarly Quadrantal error has two peaks and two minimums around the 360 degrees. The Octantal Error has four peaks and four minimums around the DVOR. The Bias error is the average azimuth shift of the DVOR station. By selecting one of the graph options the data appears on the graph along with the optional legend for that data set. Pressing the advanced button will display the Advanced Ground Check screen which allows viewing a larger graph, printing and copying the graph to a file. The Station error is a plot of the errors from the data in the Station Error column of data. The FFT sum is the summation of the FFT errors components. The FFT sum plot should look like the Station error plot for a normal station. Figure 3-47 Ground Check Data Screen

Model 1150A DVOR 3-54 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.3.4Transmitter Status ScreenThe Transmitter Status Screen is shown in Figure 3-49.This screen shows the current state of the Transmitter. A separate screen is provided for each transmitter. The ROM, RAM, Functional, EEPROM, COMM and CRC faults are background tests run on the Audio Generator. Failure of any of these items or the CPU Shutdown indicate Audio Generator CCA hardware failure. Signals from the Carrier Amplifier, Synthesizer and Sideband Amplifiers are checked for reasonable levels and status alerts generated for an aid in fault finding. The Audio Generator Disabled indication is active (yellow) when the transmitter is turned off. Figure 3-49 Transmitter Status Screen

Model 1150A DVOR 3-56 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.4.2 Transmitter Offsets & Scale FactorsThe Transmitter Offsets and Scale Factors screen is shown in Figure 3-51.This screen is used to configure the parameters of each of the two transmitters independently from the other. The Azimuth Angle Offset, Output Power scale, Voice Modulation Scale, Ident Modulation Scale and Reference Modulation Scale offsets modify the corresponding values found in the Transmitters Configuration >> Nominal screen. The TX Sideband RF Level scale modifies the SBO Level in the Transmitters Configuration >> Nominal screen for all four sidebands together. There are four Sideband RF Level Scale factors for each sideband in each transmitter to aid in matching the output power in the four sidebands. Figure 3-51 Transmitter Offsets and Scale Factors Screen

Model 1150A DVOR 3-58 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.6 Diagnostics Screen3.6.8.6.1 Power-Up Diagnostics ResultsThe Power-up Diagnostics Results screen is shown in Figure 3-54.This screen shows the results of the most recent power-up diagnostics test. Each time any of the navaid’s embedded processors is reset or powered up, it performs a series of internal diagnostic tests to verify its integrity. The results of those tests are displayed on this screen for the RMS, Monitors and Audio Generators. CPU Functional tests are instruction and data fetches, bit operations, and math operations. RAM checks are extensive tests on individual bit positions of all RAM. PROM checks are checksum calculations and comparison against checksums established at the factory. EEPROM checks are checksum validations of data held in EEPROM. Green indications are normal. If a module indicates a power-up diagnostic failure, it should be replaced. Depending on where in the startup process the fault is detected, failure of the monitor or audio generator will either stop servicing the watch dog or enter the failsafe shutdown loop. In the case of the audio generator, either case will result in no radiation. In the first case for monitor, communications would never be established, and the RMS would remove it from the LCU voting logic and force the outputs into the alarm state. In the second case for the monitor, the monitor forces a hard alarm to the LCU and the RMS would remove it from LCU voting logic after the integrity tests failed. The RMS when failed does not enable the LCU and waits for the watchdog to reset and if the fault does not clear then the reset continues until the RMS is replaced. Figure 3-54 Power-Up Diagnostics Results Screen

Model 1150A DVOR 3-60 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.6.8.7 Controlling the Transmitter via the PMDTTransmitter parameters are adjusted using the Nominal Screen (Figure 3-50) and the Transmitter Offsets and Scale factors Screen (Figure 3-51). Refer to these screens for the following paragraphs. 3.6.8.7.1General Transmitter ControlWith Transmitter #1 on the antenna, configure the Transmitter>>Configuration>>Nominal settings for the desired operation as measured by the Monitor. Transfer to Transmitter #2 and adjust the Transmitter>>Configuration>>Offsets And Scale Factors for Tx #2 offset to obtain the same desired operation for TX #2 as measured by the Monitor. During Flight Check adjust the Tx #1 and Tx #2 offsets and scale factors as necessary when directed by Flight Check to obtain this signal in space for each Transmitter. 3.6.8.7.2 Change the Azimuth IndexTo affect both Transmitter #1 and Transmitter #2, select Transmitters >> Configuration >> Nominal. Adjust the Azimuth Index by selecting the parameter with the mouse then either enter the value or use the spin controls. Press the Apply button (or the “F7” key) to apply the change. To affect only one transmitter, select Transmitters >> Configuration >> Offsets and Scale Factors screen. Adjust the Transmitter 1 (or 2, as desired) Az Angle Offset by selecting the parameter with the mouse, then either enter the offset value or use the spin controls. Press the Apply button (or the “F7” key) to apply the change. 3.6.8.7.3 Change the CSB Output PowerTo affect both Transmitter #1 and Transmitter #2, select Transmitters >> Configuration >> Nominal. Adjust the CSB power output level by selecting the CSB Output Power parameter with the mouse then either enter the value or use the spin controls. Press the Apply button (or the “F7” key) to apply the change. The value entered is modified by the Transmitters >> Configuration >> Offsets and Scale Factors >> Output Power value. A value of 100% in the Output Power Scale along with a Nominal Setting of 125 Watts yields approximately 125 Watts. Note that the power change in the Nominal Screen also affects the Sideband RF Level proportionally so that the sideband modulation level stays nearly the same for Carrier output adjustments. To affect only one transmitter (so that both transmitters provide the same level), select Transmitters >> Configuration >> Offsets and Scale Factors screen. Adjust the Transmitter 1 (or 2, as desired) Power Output level by selecting the Output Power Scale parameter with the mouse then either enter the percentage value or use the spin controls. Press the Apply button (or the “F7” key) to apply the change. 3.6.8.7.4 Change the Voice Depth of ModulationTo affect both Transmitter #1 and Transmitter #2, select Transmitters >> Configuration >> Nominal. Adjust the Voice Depth of Modulation by selecting the Voice Modulation parameter with the mouse then either enter the value or use the spin controls. Press the Apply button (or the “F7” key) to apply the change. To affect only one transmitter, select Transmitters >> Configuration >> Offsets and Scale Factors screen Adjust the Transmitter 1 (or 2, as desired) Voice Modulation Scale Percent by selecting the parameter with the mouse, then either enter the percentage value or use the spin controls. Press the Apply button (or the “F7” key) to apply the change. 3.6.8.7.5 Change the Identification Depth of ModulationTo affect both Transmitter #1 and Transmitter #2, select Transmitters >> Configuration>>Nominal. Adjust the ident depth of modulation level by selecting the Ident Mod Level parameter with the mouse then either enter the value or use the spin controls. Press the Apply button (or the “F7” key) to apply the change. To affect only one transmitter, select Transmitters >> Configuration >> Transmitter 1 (or 2, as desired) Offsets and Scale Factors screen. Adjust the ident modulation level by selecting the Ident Level Scale parameter with the mouse then either enter the percentage value or use the spin controls. Press the Apply button (or the (“F7” key) to apply the change.

Model 1150A DVOR 3-62 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.8 CONTROLS AND INDICATORSThe locations, descriptions and functions of the 1150A VOR Controls and indicators are described in Figure 3-56 through Figure 3-69 and Table 3-4 through Table 3-17.3.8.1 POWER CONTROL PANELThe Power Control Panel mounts on the front lower section of the VOR equipment cabinet. The functions of each switch and indicator are described in Table 3-4.Table 3-4 Dual Equipment Control Panel Functions POWER CONTROL TX 1 AC AC Circuit Breaker - In the “A1” position connects AC to BCPS 1. TX 1 BATT DC Circuit Breaker - In the “A1” position connects the BCPS1 to the battery. TX 1 DC BUS DC Circuit Breaker - In the “A1” position connects the BCPS1 to Transmitter1. When the DVOR is set for dual power supply mode the DC BUS breaker connects both BCPS1 and BCPS2 to Transmitter1. TX 2 AC AC Circuit Breaker - In the “A1” position powers AC and also charges the Battery Set TX 2 BATT DC Circuit Breaker - In the “A1” position connects the BCPS to the battery. TX 2 DC BUS DC Circuit Breaker - In the “A1” position connects the BCPS2 to Transmitter2. When the DVOR is set for dual power supply mode the DC BUS breaker connects both BCPS1 and BCPS2 to Transmitter2. 3.8.2 LOCAL CONTROL UNIT (LCU)The Local Control Unit mounts at the top of the VOR cabinet. Figure 3-56 shows the switches and indicators on the panel. The functions of each switch and indicator are described in Table 3-5. Figure 3-56 Local Control Unit (LCU)

Model 1150A DVOR 3-64 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 3-61 LCU Transmitter Temperature Readings Table 3-5 Equipment Control Panel Functions (Refer to Figure 3-62)TRANSMITTER (Refer to Figure 3-54)Note: Switches are active in Local Mode only. Main Select 1 and Indicator Pressing Main Select 1 switch sets transmitter 1 as the main transmitter and places TX1 on the antenna and in the ON mode. The indicator in the switch illuminates to identify that TX 1 is selected as the Main. Main Select 2 and Indicator Pressing Main Select 2 switch sets transmitter 2 as the main transmitter and places TX2 on the antenna and in the ON mode. The indicator in the switch illuminates to identify that TX 2 is selected as the Main. Antenna 1 and Indicator Pressing Antenna 1 switch turns transmitter 1 ON and into the antenna. The indicator in the switch illuminates to identify the transmitter connected to the antenna. Antenna 2 and Indicator Pressing Antenna 2 switch turns transmitter 2 ON and into the antenna. The indicator in the switch illuminates to identify the transmitter connected to the antenna. Load 1 and Indicator Pressing Load 1 switch turns transmitter 1 ON and into the load. The indicator in the switch illuminates to identify the transmitter connected to the load. Load 2 and Indicator Pressing Load 2 switch turns transmitter 2 ON and into the load. The indicator in the switch illuminates to identify the transmitter connected to the load. Off 1 and Indicator Pressing Off 1 switch places transmitter 1 in the OFF mode without changing the relays. The indicator in the switch illuminates when the transmitter is OFF. Off 2 and Indicator Pressing Off 2 switch places transmitter 2 in the OFF mode without changing the relays. The indicator in the switch illuminates when the transmitter is OFF.

Model 1150A DVOR 3-66 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Table 3-6 Equipment Control Panel Functions SYSTEM (Refer to Figure 3-63)Local Control, Switch and Indicator Pressing the switch toggles Local Control Mode. The indicator illuminates when Local Control Mode is enabled. While in Local Control Mode, the BYPASS, MAIN SELECT, ANTENNA, LOAD and OFF switches are enabled. When in the remote mode these switches are disabled. Configuration changes via the PMDT are enabled only while in Local Control Mode. RCSU control of the VOR is disabled while in the Local Control Mode. Alarm Silence Switch Pressing this switch turns off the alarm tone until a new alarm condition is detected. Lamp Test Switch Pressing this switch causes all indicators on the panel to illuminate. Reset Switch Pressing this switch resets the system to the power on condition. The LCU, RMS and all Monitors are reset. Maintenance Alert Indicator Illuminates to indicate the presence of a maintenance alert condition. Remote Control Fault Indicator Illuminates to indicate a failure condition in the communications link to the RCSU. Battery Fault Indicator Illuminates to indicate the presence of a short, open or Battery switch in the open position. On Battery Indicator Illuminates to indicate that the VOR is operating on battery power. Interlocked Off Indicator Illuminates to indicate the VOR has been turned OFF by the communications link to the RCSU. Attempts to turn ON the VOR will be ignored. LCU Power Ok Indicates that the power supplies are operating normally Volume This is a potentiometer control to adjust the level of the aural alarm indicator. Table 3-7 Equipment Control Panel Functions MONITOR (Refer to Figure 3-63)Integral Normal 1 Indicator Illuminates to indicate the normal condition of monitor 1 integral channel. Integral Alarm 1 Indicator Illuminates to indicate the alarm condition of monitor 1 integral channel after the programmed timeout has expired Integral Normal 2 IndicatorIlluminates to indicate the normal condition of monitor 2 integral channel.Integral Alarm 2 Indicator Illuminates to indicate the alarm condition of monitor 2 integral channel after the programmed timeout has expired Integral Bypass Switch and Indicator When in Local Mode pressing the switch toggles the bypass condition of both integral monitors. The indicator illuminates when bypass is active. Standby Normal 1 Indicator Not Used (OFF) Standby Alarm 1 Indicator Not Used (OFF) Standby Normal 2 Indicator Not Used (OFF) Standby Alarm 2 Indicator Not Used (OFF) Standby Bypass Switch and Indicator Not Used (OFF)

Model 1150A DVOR 3-68 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.8.4 Carrier Amplifier Assembly (1A5A3, 1A5A4) Refer to Table 3-9 for the indicators and connectors on the Carrier Amplifier Assembly. Table 3-9 Carrier Amplifier (1A5A3/1A5A4) Carrier Amplifier (Refer to Figure 3-65)CSB Sample This is a sample of the RF output signal for use by external test equipment. Detected CSB This is the detected video from the RF output. It allows the technician to observe output modulation and power. Power OK LED This LED when lit (GREEN) indicates that the amplifier DC voltages are within tolerance. Figure 3-65 Carrier Amplifier Assembly Controls and Indicators

Model 1150A DVOR 3-70 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.8.6 Remote Monitoring System (RMS) CCARefer to Table 3-11 and Figure 3-67 for the RMS CCA indicators and controls). Table 3-11 Equipment Controls and Indicators Auxiliary USB This port is reserved for future expansion. PMDT USB This port interfaces with a portable PC computer and associated control and monitoring software (Portable Maintenance Data Terminal). CPU OK LED This LED when lit (GREEN) indicates that the RMS is operating normally. Figure 3-67 Remote Monitoring System (RMS) CCA

Model 1150A DVOR 3-72 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.8.8 Synthesizer CCA (1A3A1, 1A3A11)Refer to Figure 3-69 and Table 3-13 for the indicators and controls on the Synthesizer CCA. Figure 3-69 Synthesizer Controls and Indicators Table 3-13 Synthesizer CCA (1A3A1, 1A3A11) Controls and Indicators TP0 This test point is available for scope or voltmeter ground. TP1 Carrier Phase Error Voltage. TP2 Carrier Phase Control Voltage. TP3 DVOR Sideband to Carrier Phase Control Voltage.

Model 1150A DVOR 3-74 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Table 3-14 Sideband Generator (1A4A1, 1A4A2, 1A4A5, 1A4A6) Controls and Indicators TP0 Ground TP1 Phase detector voltage. This is a DC voltage representing the detected phase difference of the input to the output of Sideband 1 (1A4A1, 1A4A5) or Sideband 3 (1A4A2, 1A4A6). If the control loop is locked this voltage should be nearly 0.9 volts. TP2 This test point is the detected output of the Sideband 1 (1A4A1, 1A4A5) or Sideband 3 (1A4A2, 1A4A6) output. This signal is a rectified 360 Hz waveform in DVOR mode. TP3 This test point is the Sideband 1 (1A4A1, 1A4A5) or Sideband 3 (1A4A2, 1A4A6) Manual Phase Control Voltage. This is a DC voltage representing the phaser control voltage used to align the phase between the Carrier amplifier and the sideband amplifier. TP4 This test point is the Sideband 1 (1A4A1, 1A4A5) or Sideband 3 (1A4A2, 1A4A6) Mean Phase Control Voltage. This is a DC voltage representing the mean (slow) phaser control voltage. TP5 This test point is the Sideband 1 (1A4A1, 1A4A5) or Sideband 3 (1A4A2, 1A4A6) Phase Error Voltage. This is a DC voltage representing the mean (slow) error control voltage. If the control loop is locked this voltage should be nearly 0.9 volts. TP6 This test point is the Sideband to Sideband output Phase Error Voltage. This is a DC voltage represents the difference in phase in this assembly between Sideband 1to 2 or Sideband 3 to 4. If the phase difference is 0 degrees this voltage should be nearly 0.0 volts. TP7 Phase detector voltage. This is a DC voltage representing the detected phase difference of the input to the output of Sideband 2 (1A4A1, 1A4A5) or Sideband 4 (1A4A2, 1A4A6). If the control loop is locked this voltage should be nearly 0.9 volts. TP8 This test point is the detected output of the Sideband 1 (1A4A1, 1A4A5) or Sideband 3 (1A4A2, 1A4A6) output. This signal is a rectified 360 Hz waveform in DVOR mode. TP9 This test point is the Sideband 2 (1A4A1, 1A4A5) or Sideband 4 (1A4A2, 1A4A6) Manual Phase Control Voltage. This is a DC voltage representing the phaser control voltage used to align the phase between the Carrier amplifier and the sideband amplifier. TP10 This test point is the Sideband 2 (1A4A1, 1A4A5) or Sideband 4 (1A4A2, 1A4A6) Mean Phase Control Voltage. This is a DC voltage representing the mean (slow) phaser control voltage. TP11 This test point is the Sideband 2 (1A4A1, 1A4A5) or Sideband 4 (1A4A2, 1A4A6) Mean Phase Error Voltage. This is a DC voltage representing the mean (slow) error control voltage. If the control loop is locked this voltage should be nearly 0.9 volts. R1 This adjustment point is the Sideband 1,3 Mean Phase Control Voltage Set Adjustment and is adjusted so that TP5 is 0.9 VDC along with TP4 between 2 and 10 VDC. R2 This adjustment point is the Sideband 1,3 Detector Calibration Adjustment. It adjusts the power level displayed on the PMDT. R3 This adjustment point is the Sideband 1,3 power output adjustment. Clockwise increases power. This is used for setting output power. R4 This adjustment point is the Sideband 2 ,4 Mean Phase Control Voltage Set Adjustment and is adjusted so that TP7 is 0.9 VDC along with TP10 between 2 and 10 VDC. R5 This adjustment point is the Sideband 2, 4 Detector Calibration Adjustment. It adjusts the power level displayed on the PMDT. R6 This adjustment point is the Sideband 2, 4 power output adjustment. Clockwise increases power. This is used for setting output power.

Model 1150A DVOR 3-76 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 3.8.11 Low Voltage Power Supply (LVPS) CCA (1A3A4,1A3A8)The LVPS has only a Power OK LED on the front panel to indicate when the internally generated power is within tolerance. 3.8.12 Test Generator CCA (1A3A5)Refer to Figure 3-72 and Table 3-16 for the indicators and controls on the Test Generator CCA. Figure 3-72 Test Generator Controls and Indicators Table 3-16 Test Generator CCA (1A3A5) Controls and Indicators TP4 Ground TP1 Scope Synchronization. TP5 Test Generator audio signal J1 Microphone input for voice modulation onto the carrier amplifier J2 Detected voice/ identification modulation from the Monitor CCA Power OK This LED when lit (GREEN) indicates that the Test Generator internal power supplies are operating within limits.

Model 1150A DVOR 3-78 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. THIS SHEET INTENTIONALLY BLANK

Model 1150A DVOR 4-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Table 4-1 Standards and Tolerances Parameter Standard Initial Tolerance Operating Tolerance Reference Paragraph (3) 9960 Hz Modulation Low 28% ±.2% ±1% 6.2.4 (Operating) (4) 9960 Hz Modulation High 32% ±.2% ±1% 6.2.4 (Operating) (5) 9960 Hz Deviation Low 15:1 ±0.2 ±1 6.2.4 (Operating) (6) 9960 Hz Deviation High 17:1 ±0.2 ±1 6.2.4 (Operating) (7) Azimuth Shift Low Established by flight inspection (FI) -1.0 Degree ±0.2 degree ±1.0 degree 6.2.4 (Operating) (8) Azimuth Shift High Established by FI +1.0 Degree ±0.2 degree ±1.0 degree 6.2.4 (Operating) j. Monitor Limits (1) Azimuth Angle Low Established by FI -1.0 Degree ±0.2 degree Same As Initial 6.2.4 (Operating) (2) Azimuth Angle High Established by FI +1.0 Degree ±0.2 degree Same As Initial 6.2.4 (Operating) (3) 30 Hz AM Modulation Low Established by FI -1.8% ±0.2% Same As Initial 6.2.4 (Operating) (4) 30 Hz AM Modulation High Established by FI +1.8% ±0.2% Same As Initial 6.2.4 (Operating) (5) 9960 Hz Modulation Low Established by FI -1.8% ±0.2% Same As Initial 6.2.4 (Operating) (6) 9960 Hz Modulation High Established by FI +1.8% ±0.2% Same As Initial 6.2.4 (Operating) (7) 9960 Hz Deviation Low 15.1 ±0.1 Same As Initial 6.2.4 (Operating) (8) 9960 Hz Deviation High 16.9 ±0.1 Same As Initial 6.2.4 (Operating) (9) Field Intensity Low Established by FI -2.8dB ±0.2dB Same As Initial 6.2.4 (Operating) (10) Field Intensity High Established by FI +2.0dB ±0.2dB Same As Initial 6.2.4 (Operating) k. Monitor Integrity Test Limits (1) Azimuth Angle Low Executive Monitor Radial -1.0° Verified accurate to ±10% Limit by Test Same As Initial 6.2.9 (Operating) (2) Azimuth Angle High Executive Monitor Radial +1.0° Verified accurate to ±10% Limit by Test Same As Initial 6.2.9 (Operating) (3) 30 Hz AM Modulation Low Established Modulation -2% ±0.2% Same As Initial 6.2.9 (Operating) (4) 30 Hz AM Modulation High Established Modulation +2% ±0.2% Same As Initial 6.2.9 (Operating) (5) 9960 Hz Modulation Low Established Modulation -2% ±0.2% Same As Initial 6.2.9 (Operating) (6) 9960 Hz Modulation High Established Modulation +2% ±0.2% Same As Initial 6.2.9 (Operating)

Model 1150A DVOR 4-4 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. THIS SHEET INTENTIONALLY BLANK

Model 1150A DVOR 5-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. THIS SHEET INTENTIONALLY BLANK

Model 1150A DVOR 6-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 6.2 PERFORMANCE CHECK PROCEDURESShould abnormal performance occur during the performance check procedures, refer to Section 7. 6.2.1 Battery Backup Transfer Performance Checka. Select RMS>>Status. b. With all cabinet circuit breakers in the ON position (AC and DC), turn off AC circuit breaker for Transmitter 1. Verify that the DVOR system continues to function and that “On Batteries” changes from No to Yes. c. If the VOR is a dual system, Turn off AC circuit breaker for Transmitter 2. Verify that the DVOR system continues to function and that “On Batteries” changes from No to Yes. d. Restore AC power for Transmitter 1 and Transmitter 2 if dual equipment. Verify that the system continues to function and that “On Batteries” changes from Yes to No for both systems if dual. 6.2.2 Carrier Output Power Performance Checka. Verify that transmitter 1 is operating. b. Select screen Transmitters>>Configuration>>Nominal. Verify Carrier Power is the same as commissioning normally 100 watts (en route) or 50 watts (terminal). c. Select VOR Transmitters>>Data>>Transmitter 1, observe that Carrier Power is within the operating tolerance of Table 4-1(b)(1).If not in tolerance perform alignment per paragraph 6.4.7.d. For dual system change operating transmitter to 2 by pointing and clicking on the Sidebar Tx2 Antenna. e. Select screen Transmitters>>Data>>Transmitter 2, and observe that Carrier power is within the operating tolerance of Table 4-1(b)(1).If not in tolerance perform alignment per paragraph 6.4.7.f. Change operating transmitter to 1 by pointing and clicking on the Sidebar Tx1 Antenna. 6.2.3 Carrier Frequency Performance Checka. Verify that transmitter 1 is operating. b. Connect frequency counter to “FREQ SAMPLE” jack J2 of Synthesizer Generator Assembly (1A3A1). c. Observe the station operating frequency on the frequency counter. Verify that the frequency is within the tolerance in Table 4-1(c)(1).d. For dual system connect frequency counter to “FREQ SAMPLE” jack J2 of Frequency Synthesizer assembly (1A3A11). e. For dual system change operating transmitter to 2 by pointing and clicking on the Sidebar Tx2 Antenna. f. Observe the station operating frequency on the frequency counter. Verify that the frequency is within the tolerance of Table 4-1(c)(1).g. Change operating transmitter to 1 by pointing and clicking on the Sidebar Tx1 Antenna. 6.2.4 Monitor 30 Hz and 9960 Hz Modulation Percentage and Deviation Ratio Performance Checka. Select Monitors, Data Integrity Screen on the PMDT. b. Observe the Monitor 1, 30 Hz modulation and verify it is within the alarm low and alarm high limits as indicated by the green background. (Red indicates out-of-tolerance) c. Observe Monitor 1, 9960 Hz modulation and verify it is within alarm low and alarm high limits. d. Observe Monitor 1, Deviation data and verify it is within alarm low and alarm high limits. e. Observe Monitor 1, Identification Modulation and verify it is within alarm low and alarm high limits. f. Observe Monitor 2, 30 Hz modulation and verify it is within the l alarm low and alarm high limits. g. Observe Monitor 2, 9960 Hz modulation and verify it is within alarm low and alarm high limits. h. Observe Monitor 2, Deviation data and verify it is within alarm low and alarm high limits. i. Observe Monitor 2, Identification Modulation and verify it is within alarm low and alarm high limits j. For dual transmitters, change operating transmitter by pointing and clicking Tx2 Antenna. Repeat steps a. through i. after Monitors have stabilized. k. Change operating transmitter to 1 by pointing and clicking on the Sidebar Tx1 Antenna.

Model 1150A DVOR 6-4 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. d. Select Monitor 2>>Data>>Status Screen. e. Verify that no maintenance alerts are backlit in yellow. f. Verify that no alarm indications are backlit in red. 6.2.9 Monitor Integrity Test of VOR Monitor (Refer to Section 3.6.8.2.2)a. Select screen Monitor 1>>Test Results>>Completed. b. Verify azimuth angle, 30 Hz modulation, and 9960 Hz modulation, 9960 deviation, and Identification modulation parameters have passed the Integrity test as indicated by a green background for all parameters. c. Select screen Monitor 2>>Test Results>>Completed. NOTE All VOR Monitor Integrity tests are performed continuously in the background. The current status of the background test may be checked by selecting Monitor 1 (or 2) >> Test Results >> In Process. 6.2.10 RSCU Operation Performance CheckWARNING This test removes the signal in space. A notice to airmen (NOTAM) must be issued prior to starting this test and planned with Air Traffic Control personnel. 6.2.10.1 Single Equipment Performance Checka. At the RCSU site perform a lamp test. Verify all indicators illuminate. b. Verify that the indicator for DVOR transmitter 1 Normal is on and the “COMM FAULT” is off. c. From the RSCU, turn off transmitter. Verify that the NORMAL indicator is off. d. Turn on the transmitter. Verify that the NORMAL indicator is on and the ALARM indicator is off. 6.2.10.2 Dual Equipment Performance Checka. Put the DVOR in normal configuration, with Transmitter 1 selected as main. b. At the RCSU site, perform a lamp test. Verify all indicators illuminate. c. Assure that the indicator for DVOR transmitter 1 NORMAL and antenna indicator “#1” on and the “COMM FAULT” indicator is off. d. Turn on the number 2 transmitter. Verify that the DVOR changes transmitters and the number 2 transmitter comes up normally. Verify the antenna indicator “#2” light is on. Press the alarm silence button. e. From the RSCU, turn off Transmitter 2. Turn on transmitter 1. Assure that the indicators for DVOR Transmitter 1 NORMAL and antenna indicator #1 lights are on. Press the alarm silence button. 6.2.11 Identification Frequency and Modulation Level Checksa. Place transmitter 1 on the air and place the monitors in bypass. b. Connect oscilloscope probe to Transmitter 1 Carrier Amplifier 1A5A3-P2. Select Transmitters>> Commands>> Transmitter Ident>> Continuous. c. Set Transmitters>> Configuration>> Reference and Voice Modulation to 0%. d. Adjust the oscilloscope controls to obtain a pattern showing 2 or 3 cycles of the 1020 identification modulation. e. Measure the high and low peak voltages and calculate the modulation by the following relation: Emax - Emin %Ident Modulation = ---------------------- Emax + Emin

Model 1150A DVOR 6-6 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 6.3.4 Transmitter Cabinet Inspectiona. Visually inspect interconnecting wire harnesses, coaxial cables and connectors for corrosion, cracks, breaks, and burns. Insure all RF connectors are tightened. b. Inspect all peripheral equipment connected to the DVOR, including the PMDT, printer, etc. c. Inspect the front panel indicators on the DVOR and assure that indicators are normal. 6.3.5 Battery Backup Unit InspectionRefer to Figure 9-4. a. Place the Battery circuit breakers on the battery boxes in the OFF position. b. Remove the covers from the battery boxes. Visually inspect the condition of each battery, and inspect the connectors and cables for any cracks, breaks, burns, or corrosion. Make sure that all connectors are fastened tightly to their terminals. Clean battery area if necessary. c. Replace the battery box covers and place the circuit breakers in the ON position. 6.4 ALIGNMENT PROCEDURES6.4.1 Battery Charging Power Supply (BCPS) Alignment Procedures6.4.1.1 System AC Voltage Alignment a. Put the VOR into the BYPASS STATE. b. Use a Digital Volt Meter (DVM) to measure the AC input voltage from AC Monitor (1A6) TB3 terminal 1 to 2 (TX POWER, LINE and NEUTRAL). c. Use the PMDT to display RMS >> RMS Data >> Power Supply Data, AC Input volts and verify the reading is within 1 VAC of DVM measurement. d. If not within 1 VAC adjust 1A5A1 BCPS R30 so the RMS >> RMS Data >> Power Supply Data, AC Input volts is within 1 VAC of DVM measurement. e. For single transmitter equipment skip to step i. f. Turn off Transmitter 1 AC and DC breakers. g. Use the PMDT to display RMS >> RMS Data >> Power Supply Data, AC Input volts and verify the reading is within 1 VAC of DVM measurement. h. If not within 1 VAC adjust 1A5A2 BCPS R30 so the RMS>>RMS Data>> Power Supply Data, AC Input volts is within 1 VAC of DVM measurement. i. Restore the VOR to the NORMAL STATE. 6.4.1.2 System AC Current Alignment a. Turn off AC and DC circuit breakers. b. At the shelter circuit breaker panel turn off AC power for the VOR station. c. Disconnect the wire from the AC source to AC Monitor (1A6) TB3 position 1(TX POWER, LINE). d. Connect a Digital Volt Meter (DVM) configured for current measurement in line with the wire from AC source to Monitor (1A6) TB3 position 1 (TX POWER, LINE). Set the DVM to measure AC current using a 10A scale. e. Restore AC power to the VOR at the circuit breaker panel. f. Turn on AC and DC circuit breakers. g. Put the VOR into the BYPASS STATE. h. Use the PMDT to display RMS >> RMS Data >> Power Supply Data, AC Input Amps and verify the reading is within 0.3 amps of DVM reading. i. If not within 0.3 amps adjust 1A5A1 BCPS R56 so the RMS >> RMS Data >> Power Supply Data, AC Input Amps is within 0.3 amps. j. For single equipment skip to step n. k. Turn off Transmitter 1AC and DC breakers while leaving Transmitter 2 AC and DC breakers on.

Model 1150A DVOR 6-8 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. l. Use the PMDT to display RMS >> RMS Data >> Power Supply Data, OB Light Amps and verify the reading is within 0.3 amps of DVM reading. m. If not within 0.3 amps adjust 1A5A2 BCPS R44 so the RMS >> RMS Data >> Power Supply Data, OB Light Amps is within 0.3 amps. n. At the shelter circuit breaker panel turn off AC power for the VOR obstruction lights. o. Remove the DVM and reconnect the OB LITE line wire to the AC Monitor (1A6) TB1 position 2. p. Restore AC power to the VOR obstruction light at the circuit breaker panel. q. Restore the VOR to the NORMAL STATE. 6.4.2 Alarm Volume Adjustment Procedurea. Locate the Volume adjust pot at the bottom right of the System Controls on the 1A1 LCU. b. Press the lamp test switch to activate the audio alarm. c. Using the adjustment tool provided with the accessory kit, adjust the volume pot clockwise to increase the volume or counterclockwise to lower the volume until the desired sound level is obtained. 6.4.3 RMS Facilities Exterior and Interior Temperature Calibrationa. If a precision thermometer is not available then skip this procedure. b. Put the VOR into the BYPASS STATE. c. Select RMS >> DATA >>A/D DATA. d. If an external Temperature Sensor Assembly is connected to J7 of the 1A9 Interface CCA then adjust 1A19R41 until the PMDT “Outside Temperature” display matches the temperature shown on an external thermometer as it is located near the Temperature Sensor Assembly. e. Adjust 1A9R42 until the “Inside Temperature” display matches the temperature shown on an internal thermometer as it is located near the 1A9 Interface CCA. f. Restore the VOR to the NORMAL STATE. 6.4.4 Reassign Main/Standby Transmitters (Dual Systems Only)a. Log on to the PMDT. b. Point and click on the Tx 1 Main or the Tx 2 Main Button as desired on Sidebar. 6.4.5 Verification of BITE VSWR Calibrationa. Use the PMDT to turn both transmitters off. b. Disconnect the Carrier feed cable from the top of the DC1 directional coupler in the DVOR cabinet. Connect a type “N” barrel to the directional coupler. Connect a type “N” TEE to the barrel and attach a 250W load to the TEE. Attach type “N” barrel to the remaining open port of the TEE. This simulates a 1.22:1 load. If a 250 Watt load is not available a 25 Watt load may be used for less than 1 minute for this test. c. Turn on transmitter 1 by pointing and clicking the Tx 1 Antenna button. Place transmitter in BYPASS by pointing and clicking the Bypass button. d. Select screen Transmitters>>Data>> Transmitter 1 observe Carrier VSWR. The display VSWR should be between 1.20 to 1.23. e. If the level is not within this range, carefully adjust (on the 1A4A4 RF Monitor Assembly) the transmitter reflected power detector potentiometer 1A4A4 R2 (TX RFD). Turning the pot clockwise will increase VSWR reading and counterclockwise will decrease. Make a small adjustment and wait for display to stabilize. f. Point and click the OFF button for Transmitter 1 and Transmitter 2. g. Move the barrel, bullet, and TEE to the Sideband 1 feed cable at 1A11J25. Place a 5W termination on the TEE output. Place the Carrier Transmitter cable back to its original position. h. Turn on transmitter 1 by pointing and clicking the Tx 1 Antenna button. Place transmitter in BYPASS by pointing and clicking the Bypass button.

Model 1150A DVOR 6-10 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. l. If the levels are not the same, carefully adjust Transmitter 2 Sideband 1 forward power detector potentiometer 1A4A6R2 located on the Sideband Generator Assembly. m. Point and click the off button to turn off both VOR transmitters. n. Move the 5 Watt plug-in element and the thru-line wattmeter body from the Sideband 1 output to the Sideband 2 output at 1A10J25. o. Turn on Tx 1. Select screen Transmitters>> Data>> Tx 1. Observe Sideband 2 power output. p. If the levels are not the same, adjust the Sideband 2 forward power detector potentiometer 1A4A1R5 located on the Sideband Generator Assembly. q. Point and click on Tx 2 Antenna button to change Transmitters. r. Select screen Transmitters>> Data>> Tx 2. Observe Sideband 2 power output. s. If the levels are not the same, carefully adjust Transmitter 2 Sideband 2 forward power detector potentiometer 1A4A6R5 located on the Sideband Generator Assembly. t. Point and click the off button to turn off both VOR transmitters. u. Move the 5 Watt plug-in element and the thru-line wattmeter body from the Sideband 2 output to the Sideband 3 output at 1A11J26. v. Turn on the Transmitter. Select screen Transmitters>> Data>> Tx 1. Observe Sideband 3 power output. w. If the levels are not the same, carefully adjust the Sideband 3 forward power detector potentiometer 1A4A2R2 located on the Sideband Generator Assembly. x. Point and click on Tx 2 Antenna button to change Transmitters. y. Select screen Transmitters>> Data>> Tx 2. Observe Sideband 3 power output. z. If the levels are not the same, carefully adjust Transmitter 2 Sideband 3 forward power detector potentiometer 1A4A6R2 located on the Sideband Generator Assembly. aa. Point and click the off button to turn off both VOR transmitters bb. Move the 5 Watt plug-in element and the thru-line wattmeter body from the Sideband 3 output to the Sideband 4 output at 1A10J26. cc. Turn on the Transmitter. Select screen Transmitters>> Data>> Tx 1. Observe Sideband 4 power output. dd. If the levels are not the same, carefully adjust the Sideband 4 forward power detector potentiometer 1A4A2R5 located on the Sideband Generator Assembly. ee. Point and click on Tx 2 Antenna button to change Transmitters. ff. Select screen Transmitters>> Data>> Tx 2. Observe Sideband 4 power output. gg. If the levels are not the same, carefully adjust Transmitter 2 Sideband 4 forward power detector potentiometer 1A4A6R5 located on the Sideband Generator Assembly. hh. Point and click the off button to turn off both VOR transmitters. ii. Remove the wattmeter body from the Sideband 4 output at 1A10J26. jj. Take the system out of BYPASS by pointing and clicking on the bypass button. 6.4.8 RMS Lithium Battery Check Procedurea. Turn the VOR transmitter AC and DC breakers off. b. Observing ESD precautions pull out the 1A3A6 RMS CCA and place on an ESD protective surface. c. Verify JP1 is connected between pins 2-3 to enable battery backup. d. Measure the DC voltage across the lithium battery B1. e. Verify that the battery voltage is greater than or equal to 2.9 VDC at a room temperature of 20±5°C. f. Replace the battery if necessary. g. Place the RMS CCA into the rack and restore the VOR to the NORMAL STATE. 6.4.9 Replacing RMS CPU (1A3A6) CCAa. On the PMDT Select System>> Configuration Save. Select or create a distinctive filename to save the current system configuration and click save. b. Turn off AC/DC power on VOR front panel. c. Observing ESD precautions, disconnect the front connector and pull the RMS CCA (1A3A6) forward until it is clear of the transmitter cabinet d. Insert the new RMS CCA into the cabinet and seat securely into backplane connector. Reconnect the front card edge connector.

Model 1150A DVOR 6-12 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. k. Read the field intensity value in Monitors>> Data>> Integrity data and subtract the reading from 0.0. The change should be less than 1 dB. l. Place this offset value in Monitors>> Configuration>> Offsets and Scale Factors for Monitor 1 and for Monitor 2. 6.4.13 DME Keying CheckThis procedure is used on systems where the DVOR is collocated with a DME. a. Place the DVOR in normal. b. Select (on VOR) RMS>>Commands>>Select Audio>Transmitter 1 Ident. c. Place DME in normal. d. Verify audible DME keying. Select (on SELEX-SI DME) RMS>>Commands>>Select Audio>Transmitter 1Ident. e. If keying is not detected or is not in synchronization with the DVOR check terminal board wiring and connections. 6.4.14 DVOR Frequency Synthesizer AlignmentThe following procedure must be used to properly align the Frequency Synthesizer Assembly for operation at a new frequency. References to the 1A3A1 Frequency Synthesizer Assembly are for Transmitter 1 and references to the 1A3A11 Frequency Synthesizer are for DVOR Transmitter No. 2. NOTE The RF power level at 1A3A1J2 on the front panel of the Frequency Synthesizer Assembly can be as high as +15 dBm. In the following step, use attenuators as appropriate for the frequency counter used to properly protect any counter input ports. a. Connect a frequency counter to 1A3A1J2, the SMA connector on the front panel of the Frequency Synthesizer Assembly. b. Turn on Tx 1. c. Measure the output frequency of the 1A3A1J2 Frequency Synthesizer Assembly. If the measured frequency is outside the Operational Tolerance of Table 4-1(c) then perform the following steps: i. Remove power from the DVOR. ii. Remove the Frequency Synthesizer 1A3A1 from the VOR cabinet. iii. Connect the 1A3A1 Frequency Synthesizer Assembly to the DVOR with extender board. iv. Apply power to the DVOR. Turn on Tx 1. Place Monitor in Bypass. v. The 10.000 MHz TCXO (Y1) in the Frequency Synthesizer Assembly may be adjusted to correct the operating frequency. Small adjustments can be made to Y1 with the R27 potentiometer to achieve this. Once the TCXO is set the station frequency should be within the Initial Tolerance of Table 4-1(c).vi. Remove power from the DVOR. vii. Replace the Frequency Synthesizer Assembly in the system cabinet. viii. Apply power to the DVOR. NOTE Placing the Frequency Synthesizer Assembly on the extender board may cause VOR Monitor to indicate an alarm condition. The alarm may be caused by carrier phase control loop unlock or phase difference of the Carrier to Sidebands. There will be no effect on the frequency counter readings taken at the test port output, J2 on the front panel of the Frequency Synthesizer Assembly. d. Connect a DMM to the carrier phase loop error voltage at TP1 on the 1A3A1 Frequency Synthesizer Assembly front panel. e. Log in to the PMDT and select Transmitters>> Configuration. Adjust Tx 1 Carrier PLL control from 0 to 100% to achieve 0.0 +/- 0.05 volts on TP1.

Model 1150A DVOR 6-14 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. n. Turn on power, turn on the Transmitter and place in bypass. o. Connect a DVM to 1A4A1 TP5. Adjust 1A4A1R1 for 0.89 to .91 Vdc. p. Connect DVM to 1A4A1TP4. Verify that the voltage is between 2 and 9 Vdc. q. Refer to Figure 3-66.Connect a DVM to 1A4A1 TP7. Adjust 1A4A1R4 for 0.9 to 0.95 Vdc. r. Connect a DVM to 1A4A1 TP11. Adjust 1A4A1R1 for 0.89 to .91 Vdc. s. Connect DVM to 1A4A1TP10. Verify that the voltage is between 2 and 9 Vdc. If not repeat steps n and o to select a different point of adjustment. t. Connect a DVM to 1A4A1 TP6. u. Adjust Transmitters>>Configuration>>Tx 1 SB1 or SB2 Phase offset to achieve 0.0 +/- 0.1 volts on TP6. Set the value so that difference is centered about 0 degrees phase shift. For example if 10 degrees difference between Sideband 1 and Sideband 2 is required then set Sideband 1 to -5 degrees and Sideband 2 to +5 degrees. v. Select RMS>> Data>> Maintenance Alerts/Alarms Screen. The SB1/2 Phase, SB3/4 Phase should be clear (not alert indication). w. Select RMS>> Data>> Maintenance Alerts/Alarms Screen. The SB1/2 Phase, SB3/4 Phase should be clear (not alert indication). Table 6-2 Typical Mean Phaser Settings vs Frequency Frequency (MHz) Mean Phase Voltage TP4/TP10 (Vdc) Jumper Setting for J11 108 3.0 1 to 2 109 3.4 1 to 2 110 3.9 1 to 2 111 4.5 1 to 2 112 5.0 3 to 4 113 2.8 3 to 4 114 3.1 3 to 4 115 3.6 3 to 4 116 4.0 3 to 4 117 4.5 3 to 4 118 5.0 3 to 4 6.4.16 Antenna VSWR Check for New FrequencyAll of the radiating antennas in the DVOR antenna system were installed with an initial VSWR that was less than 1.10:1 (Table 4-1a). DVOR antennas are narrow-band devices that are critically tuned using mechanical components (stubs, positioning pieces, and capacitors) to produce a resonant antenna that is matched to a 50 ohm impedance feed cable. Any significant change in the operating frequency of the DVOR will change the resonant point of operation of the antenna and that will affect the VSWR of the antenna and the signal in space of the DVOR system. Perform the following procedures to determine of there is a need to retune the antenna system. a. Remove power from the DVOR. b. Install a power meter (Bird model 43 or equivalent) in the carrier antenna feed cable. c. Install a 100 W or 250 Watt detecting element in the wattmeter to measure forward power. d. Turn on the DVOR and record the DVOR carrier forward power. e. Install a 1 W or 5 W detecting element in the wattmeter to measure reflected power. f. Record the DVOR reflected power. g. Calculate the VSWR of the Carrier Antenna using the formula: PowerREFLPowerFWDPowerREFLPowerFWDVSWR +=

Model 1150A DVOR 6-16 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. THIS SHEET INTENTIONALLY BLANK

Model 1150A DVOR 7-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 7-1 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 0 deg Azimuth Figure 7-2 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 45 deg Azimuth Figure 7-3 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 90 deg Azimuth

Model 1150A DVOR 7-4 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 7-7 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 270 deg Azimuth Figure 7-8 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 315 deg Azimuth 7.4 OFFSITE REPAIRThere are no assemblies that require offsite overhaul or calibration. 7.5 PACKING INSTRUCTIONSEquipment requiring shipment from the site for repair shall be individually packaged and marked. All items sensitive to electrostatic discharge (ESD) shall be packed in ESD bags or containers.

Model 1150A DVOR 8-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Table 8-2 Model 1150A DVOR Kits and Optional Equipment Part Number Description 470209-0001 Carrier Antenna Kit Stand Alone w/o DME Antenna 470252-0001 Civil Installation Kit Field Monitor Tower 470360-0001 Portable Maintenance Data Terminal Kit (PMDT) Computer Kit 480163-0003 Spares Kit Full, Board & Modules 480163-0002 Spares Kit Recommended 480163-0001 Spares Kit Minimum

Model 1150A DVOR 9-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 9.5 INSTALLATION PROCEDURES9.5.1 Tools and Test Equipment RequiredRefer to Table 9-1 for a list of special tools and test equipment required. Refer to Table 9-2 for a list of tools needed for installation but not for normal operation of the system. Table 9-1 Tools and Test Equipment (Equivalent tools and test equipment may be used) Part Number Description Dummy Load, 50 ohm, 100 Watt, Load, 1kW max. 950270-0000 Dummy Loads, 50 ohm, 5 Watt (5 required) 399006-0000 ESD Wrist Strap (part of 470643-0001 Accessory Kit) 339003-0000 SMA Torque Wrench (5/16”) 950552-0117 1 Watt Element 950552-0301 5 Watt Element 950552-0131 10 Watt Element 950552-0405 100 Watt Element, Bird, 100C 950552-0306 or 950552-0406 250 Watt Element, Bird, 250B or 250C or Bird 250C Table 9-2 Tools Needed for Installation (Equivalent test equipment may be used) Part No. Description Theodolite 950505-0000 Vector Voltmeter, HP, Model 8508A with Accessory Kit, Vector Voltmeter, Model HP11570A 950505-0001 Or Agilent Model 8712 Network Analyzer 234617-0000 NARDA Bi-directional Coupler, PN 3020A Soldering Iron, 30 watt Soldering Gun, 120 Watt Heat Gun, Ungar, Professional Model 6970 900065-0000 Silicon Sealant 3/16" Drill Bit 2-1/2" Hole Saw 9.5.2 Counterpoise and Shelter Foundation InstallationRefer to Figure 9-1 and Figure 9-2. The counterpoise and shelter foundation drawing is a typical installation drawing and will change per local building codes. Refer to SELEX-SI VOR Counterpoise Manual Part Number 571150-0006 for complete details about an SELEX-SI supplied VOR Counterpoise. For counterpoise and shelters not supplied by SELEX Sistemi Integrati Inc., the manufacturer of the counterpoise or shelter should supply drawings for the siting engineer.

Model 1150A DVOR 9-4 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 9.5.3 Shelter InstallationShelter installation procedures are for an 8' x 12' shelter supplied by SELEX Sistemi Integrati Inc. a. Refer to Figure 9-1.Using a crane and four (4) nylon slings (20' long), position the equipment shelter on the concrete foundations. Attach shelter to the foundation anchor bolts using the 5/8" hardware and mounting plates. b. Install shelter ground rods. Refer to Figure 9-2.Figure 9-2 Shelter Grounding Diagram Notes: 1. All ground rods shall be 3/4" x 10' copper clad steel, driven to 12' below grade. 2. Unless otherwise indicated, all bonds below grade shall be exothermically welded. 3. All ground rods shall be at least 24" from any foundation (6' max.). 4. Strip all bonding locations to bare, clean metal and apply anti-oxidation compound. 5. Resistance to earth of the complete earth electrode system will be 5 ohms or less. 9.5.4 Counterpoise InstallationRefer to SELEX Sistemi Integrati Inc. Manual Part Number 571150-0006 for counterpoise installations instructions. For a counterpoise not supplied by SELEX Sistemi Integrati Inc. refer to the manufacturer’s installation drawings.

Model 1150A DVOR 9-6 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 9.5.9 Antenna Cable Exterior Cable Entrance InstallationRefer to Figure 9-3. And Figure 11-24 (additional drawings provided with kit 470445-0001). NOTE The following installation may be altered to match local requirements. Fewer, larger conduits may be substituted in concrete shelters. The cable entrance may be made through the shelter ceiling in which case the top entrance through the commutator can be used. a. Placement of the entrance holes for the Carrier and sideband cables is dependent on the location of the VOR Transmitter Cabinet in the shelter. b. Locate and mark three two inch conduit holes corresponding to the cable rack intersection with the wall. Drill three 3/16" pilot holes in the exterior shelter wall. c. Using a 3" diameter hole saw, cut a hole in the shelter wall centered on the pilot hole drilled in step b. d. Cut the 10 foot sections of PVC conduit into three sections so that with conduit bushing installed will be the same thickness of the wall. (only threads of the bushings exposed) e. Install the conduit bushing on both ends of the conduit using PVC adhesive. f. Place a bead of silicone sealant around the 3" inside surface of the shoulder washer on both the interior and exterior shelter walls. g. Tighten the 3" locknuts against the shoulder washers on both the exterior and interior walls. Do not over tighten the locknuts so that the shelter wall compresses. Only tighten to secure the conduits. h. Install the 3" protective bushings snugly on the conduits. i. Neatly organize the cables into groups and feed them through the conduits. j. Place the cables on to the cable tray and apply cable ties as necessary to secure. k. Run the cables in the cable tray over the top of the DVOR transmitter cabinet. Use the cable drop plate provided with the installation kit to route the cables into the transmitter cabinet. l. Use putty provided in the kit to seal the conduits from air and moisture. 9.5.10 Air Conditioner InstallationIf a wall mounted air conditioner is supplied install the air conditioner in the wall opening and secure it in place using brackets supplied. 9.5.11 Transmitter Cabinet InstallationRefer to Figure 11-24 (Kit 470445-0001) installation drawings. a. Unpack the DVOR 19” rack system and stand upright inside the equipment shelter. b. The rack must so that the ventilation louvers located on the sides and bottom of the cabinet are not obstructed. Clearance for the front and rear doors must be provided for ease of service. c. To level the rack use the adjustable feet then lock the feet positions using the jam nuts. d. If desired the front and rear doors can easily be removed by disconnecting the ground wires and sliding up the three hinge pins on the left inside edge of each door. If the doors are removed be sure to replace them after installation. e. Use #6 grounding wire provided in the AC Power Installation Kit (Figure 11-24)to connect from the VOR Ground lugs on the outside top of the cabinet to the shelter grounding plate using the shortest path possible. Local grounding ordinances may require additional grounding wires and/or larger grounding conductors. NOTE Do not install any modules in the rack until it is properly grounded.

Model 1150A DVOR 9-8 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. f. Connect AC input ground (green wire) to 1A6 TB3-3. g. Connect AC low input (white wire) to 1A6 TB3-2. h. Connect AC high input (black wire) to 1A6 TB3-1. CAUTION Black, white and green wiring may also be used in installations outside the United States. Technicians must note that the black wire (equivalent to Blue) is the AC HIGH and the white wire (equivalent to brown) is the AC LOW. This condition may not be the same as local wiring standards, and caution must be observed when working on the AC supply wiring. The ground wire is provided as either black for dc return path or protective ground green/yellow. 9.5.15 Connecting DME Keyer Wiringa. Verify that the primary AC power (located in the shelter main circuit breaker box), VOR equipment and DME equipment circuit breakers are in the OFF position. b. Using the two-conductor electrical cable and provided in the AC Power/Installation kit (Figure 11-24),connect KEY_OUT+ and KEY_OUT- signals from the 1A9 Interface CCA located in rear of the VOR cabinet to the appropriate location as identified in Table 9-3.Table 9-3 External Keying Connection Locations Signal VOR Source SELEX-SI Model 1118A/ 1119A DME Destination KEY_OUT+ 1A9TB2-14 KEY_IN+ (1A19TB2-16) KEY_OUT- 1A9TB2-15 KEY_IN- (1A19TB2-17) 9.5.16 RCSU and RMM ConnectionsNote: Changes to the S2 Configuration DIP switch should be followed with a Reset (located on the 1A1 LCU). a. If the VOR is provided with a 2238 or 2240 RCSU then connect the copper wires from the RCSU to the 1A9TB2-1 and 1A9TB2-2 locations on the Interface CCA for a Dedicated Modem connection type. For a RF Modem/Fiber connection type, the RS232 connection should be made to the 1A9J5 DB9 connector. DIP switch S2-1 located on the 1A3 Control Backplane CCA should be set to match the Connection Type as well. b. If a telephone line is available for remote maintenance monitoring (RMM), connect the tip and ring wires from the telephone interface box to the 1A9 Interface CCA locations TB2-3 and TB2-4. Polarity is not important. DIP switch S2-2 located on the 1A3 Control Backplane CCA should be set to “DIAL-UP” when using this internal dial-up modem. Use the two-conductor electrical cable provided in the AC Power Installation kit (Figure 11-24)for this connection. c. If the VOR’s internal dial-up modem is unable to comply with local telephone requirements then connect the telephone line to an external modem and connect the external modem serial port to the 1A9 Interface CCA J6 connector. DIP switch S2-2 located on the 1A3 Control Backplane CCA should be set to “~EXTERNAL” when using an external dial-up modem. DIP switch S1-6 located on the 1A3 Control Backplane CCA controls whether the VOR station will allow remote configuration of transmitter and monitor parameters. When set to “RMT ALLOWED” a remote user logged into Security Level 3 can put the VOR station in Local Mode from the PMDT and change all parameters as if connected directly to the cabinet in the shelter. When set to “~NOT ALLOWED” the system can not be put in Local Mode from the PMDT and remote parameter changes are blocked throughout the software.

Model 1150A DVOR 9-10 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. Figure 9-6 VOR Obstruction Light Interconnect Diagram without Photo Sensor 9.5.18 Cutting Antenna Cables to Proper Electrical LengthThe RF cables from commutator to the antenna cables are precut and phased matched at the factory. It is recommended that the cables remain at the length set by the factory. Excess cable should be neatly stored outside the shelter. The cables must be firmly held by tie wraps (provided) to prevent damage to stress caused by wind gusts. If the cables must be cut then a vector voltmeter or network analyzer must be used to verify that all the cables are within +/-2 degrees. NOTE Acommon mistake in cutting or measuring cable phase results in one or more cable with a phase length 180 degrees different than all other cables. To check for this mistake check cable length at 50% of the station frequency. All cables should then be the same length and any that were in error by 180 degrees at station frequency will now be in error by 90 degrees at 50% of the station frequency. 9.5.19 Tuning the AntennasRefer to Section 9.4.6 of the DVOR Antenna Manual. 9.5.20 Sideband RF Feed Cables to Commutator ConnectionsUsing Figure 9-7 as a guide attach all sideband antenna RF feed cables to the right or left commutator CCAs as required. The odd numbered antennas are connected to the left side as viewed from the rear of the cabinet and the even numbered antennas are connected to the right side of the cabinet. NOTE If the DVOR is co-located with a DME, it is advisable to also run the DME RF cables and obstruction light power cable at this time.

$Model 1150A DVOR 9-12 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc. 9.7 INITIAL STARTUP AND PRELIMINARY TESTINGThe following paragraphs detail the step-by-step procedures for initial start-up and preliminary testing of the VOR. 9.7.1 Input Voltage ChecksAfter the AC and DC power has been connected to the DVOR transmitter it is necessary to check the input power to ensure the proper voltage is applied to the system. a. Set the VOR AC and DC circuit breakers to the OFF position. b. Set the shelter primary AC power circuit breakers to the ON position. c. Using an AC voltmeter check voltage across the AC Monitor 1A22TB3-1 (LINE) to 1A22TB3-2 (NEUTRAL) terminals. Insure the voltage meets the range specified in section Table 1-1.d. Turn on the VOR DC circuit breaker while leaving the AC circuit breakers OFF. e. Using a DC voltmeter check voltage across 1A5 Carrier Backplane E1 (BATT_POS) to E2 (GND). Insure the voltage is 42 to 52Vdc. f. For dual equipment check voltage across 1A5 Carrier Backplane E5 (BATT_POS) to E2 (GND). Insure the voltage is 42 to 52Vdc. g. Turn DC circuit breakers to the OFF position. 9.7.2 Installing Modules in Transmitter CabinetSince the VOR transmitter cabinet is shipped separately from its electronic modules, it will be necessary to install them into the transmitter equipment cabinet. Insure AC and DC circuit breakers are set to the OFF position. CAUTION Many of the modules used in the VOR transmitter contain Electrostatic Discharge (ESD) sensitive components. ALWAYS wear protective wrist strap when installing modules or CCAs. Before modules are installed into transmitter cabinet, check modules or CCAs for cracked or broken connectors, bent pins, and loose hardware. Report any damage immediately. 9.7.3 Turn on Procedurea. Verify all assemblies are properly installed and are fully seated. b. Turn AC and DC circuit breakers to the ON position. c. Verify the PWR OK LEDs are lit on card cage modules with power indication feature. d. Verify the CPU OK LEDs are lit on the Audio Generator, BCPS, Monitor, and RMS assemblies. 9.7.4 PMDT Hookup and Setupa. Unpack the PMDT laptop computer and follow the manufacturer’s installation instructions to power-up the computer, create a user account, and logon to Windows™ as an administrator. b. Insert the 978178-XXXX PMDT CD-ROM into the laptop computer. c. Select Start >> Run then type D:\Setup.exe to start the PMDT installation. Note if installation does not start then use the correct drive letter associated with the CD-ROM drive. d. Follow the default prompts for PMDT installation. e. In order for the PMDT controls to be properly displayed change the DPI Setting to “Normal (96 DPI)” in Windows on the Display Properties >> Settings >> Advanced >> General tab. Note that Display Properties can be accessed by right-clicking on the Windows background then selecting Properties. f. At the VOR assure the AC and DC breakers are in the ON position. g. Plug the USB cord between the laptop computer and 1A3A6J1 (PMDT USB) located on the RMS CCA. h. Windows should detect the USB device and start installing a driver. If prompted for the USB driver files they are installed in the PMDT directory at C:\Program Files\SELEX-SI\PMDT\FTDI USB Driver. i. Start the PMDT application by double-clicking on the desktop icon named PMDT. j. Select System >> PMDT Setup. k. In the Navaid Direct COM Port control pick the COM port that contains “USB Serial Port” in the description.$

Indra Air Traffic VOR2 VOR Transmitter User Manual 571150A 0002

Selex Sistemi Integrati Inc. VOR Transmitter 571150A 0002

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