Life Is Good Flat Panel Television 42Lm860V W Zb Users Manual

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Printed in KoreaP/NO : MFL67361006 (1206-REV00)

CHASSIS : LD23E

MODEL : 42LM860V/W 42LM860V/W-ZB

CAUTION

BEFORE SERVICING THE CHASSIS,

READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

LED LCD TV

SERVICE MANUAL

North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com

Asia/Oceania http://biz.lgservice.com

Internal Use Only

- 2 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

CONTENTS

CONTENTS .............................................................................................. 2

SAFETY PRECAUTIONS ........................................................................ 3

SERVICING PRECAUTIONS .................................................................... 4

SPECIFICATION ....................................................................................... 6

ADJUSTMENT INSTRUCTION .............................................................. 12

EXPLODED VIEW .................................................................................. 21

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

- 3 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the

Schematic Diagram and Exploded View.

It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent

Shock, Fire, or other Hazards.

Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the

servicing of a receiver whose chassis is not isolated from the AC

power line. Use a transformer of adequate power rating as this

protects the technician from accidents resulting in personal injury

from electrical shocks.

It will also protect the receiver and it's components from being

damaged by accidental shorts of the circuitry that may be

inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown,

replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor,

over 1 W), keep the resistor 10 mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to

be sure the set is safe to operate without damage of electrical

shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an

electrical jumper across the two AC plug prongs. Place the AC

switch in the on position, connect one lead of ohm-meter to the AC

plug prongs tied together and touch other ohm-meter lead in turn to

each exposed metallic parts such as antenna terminals, phone

jacks, etc.

If the exposed metallic part has a return path to the chassis, the

measured resistance should be between 1 MΩ and 5.2 MΩ.

When the exposed metal has no return path to the chassis the

reading must be infinite.

An other abnormality exists that must be corrected before the

receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor

between a known good earth ground (Water Pipe, Conduit, etc.)

and the exposed metallic parts.

Measure the AC voltage across the resistor using AC voltmeter

with 1000 ohms/volt or more sensitivity.

Reverse plug the AC cord into the AC outlet and repeat AC voltage

measurements for each exposed metallic part. Any voltage

measured must not exceed 0.75 volt RMS which is corresponds to

0.5 mA.

In case any measurement is out of the limits specified, there is

possibility of shock hazard and the set must be checked and

repaired before it is returned to the customer.

Leakage Current Hot Check circuit

IMPORTANT SAFETY NOTICE

SAFETY PRECAUTIONS

- 4 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

SERVICING PRECAUTIONS

CAUTION: Before servicing receivers covered by this service

manual and its supplements and addenda, read and follow the

SAFETY PRECAUTIONS on page 3 of this publication.

NOTE: If unforeseen circumstances create conict between the

following servicing precautions and any of the safety precautions

on page 3 of this publication, always follow the safety precautions.

Remember: Safety First.

General Servicing Precautions

1. Always unplug the receiver AC power cord from the AC power

source before;

a. Removing or reinstalling any component, circuit board mod-

ule or any other receiver assembly.

b. Disconnecting or reconnecting any receiver electrical plug or

other electrical connection.

c. Connecting a test substitute in parallel with an electrolytic

capacitor in the receiver.

CAUTION: A wrong part substitution or incorrect polarity

installation of electrolytic capacitors may result in an explo-

sion hazard.

2. Test high voltage only by measuring it with an appropriate

high voltage meter or other voltage measuring device (DVM,

FETVOM, etc) equipped with a suitable high voltage probe.

Do not test high voltage by "drawing an arc".

3. Do not spray chemicals on or near this receiver or any of its

assemblies.

4. Unless specied otherwise in this service manual, clean

electrical contacts only by applying the following mixture to the

contacts with a pipe cleaner, cotton-tipped stick or comparable

non-abrasive applicator; 10 % (by volume) Acetone and 90 %

(by volume) isopropyl alcohol (90 % - 99 % strength)

CAUTION: This is a ammable mixture.

Unless specied otherwise in this service manual, lubrication of

contacts in not required.

5. Do not defeat any plug/socket B+ voltage interlocks with which

receivers covered by this service manual might be equipped.

6. Do not apply AC power to this instrument and/or any of its

electrical assemblies unless all solid-state device heat sinks are

correctly installed.

7. Always connect the test receiver ground lead to the receiver

chassis ground before connecting the test receiver positive

lead.

Always remove the test receiver ground lead last.

8. Use with this receiver only the test xtures specied in this

service manual.

CAUTION: Do not connect the test xture ground strap to any

heat sink in this receiver.

Electrostatically Sensitive (ES) Devices

Some semiconductor (solid-state) devices can be damaged eas-

ily by static electricity. Such components commonly are called

Electrostatically Sensitive (ES) Devices. Examples of typical ES

devices are integrated circuits and some eld-effect transistors

and semiconductor “chip” components. The following techniques

should be used to help reduce the incidence of component dam-

age caused by static by static electricity.

1. Immediately before handling any semiconductor component or

semiconductor-equipped assembly, drain off any electrostatic

charge on your body by touching a known earth ground. Alter-

natively, obtain and wear a commercially available discharging

wrist strap device, which should be removed to prevent poten-

tial shock reasons prior to applying power to the unit under test.

2. After removing an electrical assembly equipped with ES

devices, place the assembly on a conductive surface such as

aluminum foil, to prevent electrostatic charge buildup or expo-

sure of the assembly.

3. Use only a grounded-tip soldering iron to solder or unsolder ES

devices.

4. Use only an anti-static type solder removal device. Some solder

removal devices not classied as “anti-static” can generate

electrical charges sufcient to damage ES devices.

5. Do not use freon-propelled chemicals. These can generate

electrical charges sufcient to damage ES devices.

6. Do not remove a replacement ES device from its protective

package until immediately before you are ready to install it.

(Most replacement ES devices are packaged with leads electri-

cally shorted together by conductive foam, aluminum foil or

comparable conductive material).

7. Immediately before removing the protective material from the

leads of a replacement ES device, touch the protective material

to the chassis or circuit assembly into which the device will be

installed.

CAUTION: Be sure no power is applied to the chassis or circuit,

and observe all other safety precautions.

8. Minimize bodily motions when handling unpackaged replace-

ment ES devices. (Otherwise harmless motion such as the

brushing together of your clothes fabric or the lifting of your

foot from a carpeted oor can generate static electricity suf-

cient to damage an ES device.)

General Soldering Guidelines

1. Use a grounded-tip, low-wattage soldering iron and appropriate

tip size and shape that will maintain tip temperature within the

range or 500 °F to 600 °F.

2. Use an appropriate gauge of RMA resin-core solder composed

of 60 parts tin/40 parts lead.

3. Keep the soldering iron tip clean and well tinned.

4. Thoroughly clean the surfaces to be soldered. Use a mall wire-

bristle (0.5 inch, or 1.25 cm) brush with a metal handle.

Do not use freon-propelled spray-on cleaners.

5. Use the following unsoldering technique

a. Allow the soldering iron tip to reach normal temperature.

(500 °F to 600 °F)

b. Heat the component lead until the solder melts.

c. Quickly draw the melted solder with an anti-static, suction-

type solder removal device or with solder braid.

CAUTION: Work quickly to avoid overheating the circuit

board printed foil.

6. Use the following soldering technique.

a. Allow the soldering iron tip to reach a normal temperature

(500 °F to 600 °F)

b. First, hold the soldering iron tip and solder the strand against

the component lead until the solder melts.

c. Quickly move the soldering iron tip to the junction of the

component lead and the printed circuit foil, and hold it there

only until the solder ows onto and around both the compo-

nent lead and the foil.

CAUTION: Work quickly to avoid overheating the circuit

board printed foil.

d. Closely inspect the solder area and remove any excess or

splashed solder with a small wire-bristle brush.

- 5 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

IC Remove/Replacement

Some chassis circuit boards have slotted holes (oblong) through

which the IC leads are inserted and then bent at against the cir-

cuit foil. When holes are the slotted type, the following technique

should be used to remove and replace the IC. When working with

boards using the familiar round hole, use the standard technique

as outlined in paragraphs 5 and 6 above.

Removal

1. Desolder and straighten each IC lead in one operation by

gently prying up on the lead with the soldering iron tip as the

solder melts.

2. Draw away the melted solder with an anti-static suction-type

solder removal device (or with solder braid) before removing

the IC.

Replacement

1. Carefully insert the replacement IC in the circuit board.

2. Carefully bend each IC lead against the circuit foil pad and

solder it.

3. Clean the soldered areas with a small wire-bristle brush.

(It is not necessary to reapply acrylic coating to the areas).

"Small-Signal" Discrete Transistor

Removal/Replacement

1. Remove the defective transistor by clipping its leads as close

as possible to the component body.

2. Bend into a "U" shape the end of each of three leads remaining

on the circuit board.

3. Bend into a "U" shape the replacement transistor leads.

4. Connect the replacement transistor leads to the corresponding

leads extending from the circuit board and crimp the "U" with

long nose pliers to insure metal to metal contact then solder

each connection.

Power Output, Transistor Device

Removal/Replacement

1. Heat and remove all solder from around the transistor leads.

2. Remove the heat sink mounting screw (if so equipped).

3. Carefully remove the transistor from the heat sink of the circuit

board.

4. Insert new transistor in the circuit board.

5. Solder each transistor lead, and clip off excess lead.

6. Replace heat sink.

Diode Removal/Replacement

1. Remove defective diode by clipping its leads as close as pos-

sible to diode body.

2. Bend the two remaining leads perpendicular y to the circuit

board.

3. Observing diode polarity, wrap each lead of the new diode

around the corresponding lead on the circuit board.

4. Securely crimp each connection and solder it.

5. Inspect (on the circuit board copper side) the solder joints of

the two "original" leads. If they are not shiny, reheat them and if

necessary, apply additional solder.

Fuse and Conventional Resistor

Removal/Replacement

1. Clip each fuse or resistor lead at top of the circuit board hollow

stake.

2. Securely crimp the leads of replacement component around

notch at stake top.

3. Solder the connections.

CAUTION: Maintain original spacing between the replaced

component and adjacent components and the circuit board to

prevent excessive component temperatures.

Circuit Board Foil Repair

Excessive heat applied to the copper foil of any printed circuit

board will weaken the adhesive that bonds the foil to the circuit

board causing the foil to separate from or "lift-off" the board. The

following guidelines and procedures should be followed whenever

this condition is encountered.

At IC Connections

To repair a defective copper pattern at IC connections use the

following procedure to install a jumper wire on the copper pattern

side of the circuit board. (Use this technique only on IC connec-

tions).

1. Carefully remove the damaged copper pattern with a sharp

knife. (Remove only as much copper as absolutely necessary).

2. carefully scratch away the solder resist and acrylic coating (if

used) from the end of the remaining copper pattern.

3. Bend a small "U" in one end of a small gauge jumper wire and

carefully crimp it around the IC pin. Solder the IC connection.

4. Route the jumper wire along the path of the out-away copper

pattern and let it overlap the previously scraped end of the

good copper pattern. Solder the overlapped area and clip off

any excess jumper wire.

At Other Connections

Use the following technique to repair the defective copper pattern

at connections other than IC Pins. This technique involves the

installation of a jumper wire on the component side of the circuit

board.

1. Remove the defective copper pattern with a sharp knife.

Remove at least 1/4 inch of copper, to ensure that a hazardous

condition will not exist if the jumper wire opens.

2. Trace along the copper pattern from both sides of the pattern

break and locate the nearest component that is directly con-

nected to the affected copper pattern.

3. Connect insulated 20-gauge jumper wire from the lead of the

nearest component on one side of the pattern break to the lead

of the nearest component on the other side.

Carefully crimp and solder the connections.

CAUTION: Be sure the insulated jumper wire is dressed so the

it does not touch components or sharp edges.

- 6 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

1. Application range

This specification is applied to the LCD TV used LD23E

chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C

2) Relative Humidity: 65 % ± 10 %

3) Power Voltage

: Standard input voltage (AC 100-240 V~, 50/60 Hz)

* Standard Voltage of each products is marked by models.

4) Specification and performance of each parts are followed

each drawing and specification by part number in

accordance with BOM.

5) The receiver must be operated for about 20 minutes prior to

the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety : CE, IEC specification

- EMC : CE, IEC

- Wireless : Wireless HD Specification (Option)

4. Model General Specification

No. Item Specication Remarks

1 Market EU(PAL Market-36Countries) DTV & Analog (Total 37 countries)

DTV(MPEG2/4,DVB-T/T2/S)

Albania/Austria/Belarus/Belgium/Bosnia/Bulgaria/Croatia/

Czech/Estonia/France/Germany/Greece/Hungary/Ireland/

Italy/Kazakhstan/Latvia/Lithuania/Luxembourg/Morocco/

Netherlands/Poland/Portugal/Romania/Russia/Serbia/Slov-

enia/Spain/Slovakia/Switzerland/Turkey/UK/Ukraine/Den-

mark/Finland/Norway/Sweden

Supported satellite : 29 satellites

ABS1 75.0E/ AMOS 4.0W/ ASIASATS 105.5E/ ASTRA1L-

HMKR 19.2E/ ASTRA2ABD 28.2E/ ASTRA3AB 23.5E/

ASTRA4A 4.8E/ ATLANTICBIRD2 8.0W/ ATLANTICBIRD3

5.0W/ BADR 26.0E/ EUROBIRD3 33.0E/ EUROBIRD9A

9.0E/ EUTELSATW2A 10.E/ EUTELSATW3A 7.0E/ EUTEL-

SATW4W7 36.0E/ EUTELSESAT 16.0E/ EXPRESSAM1

40.0E/ EXPRESAM3 140.0E/ EXPRESSAM33 96.5E/ HEL-

LASAT2 39.0E/ HISPASAT1CDE 30.0W/ HOTBIRD 13.0E/

INTELSAT10&7 68.5E/ INTELSAT15 85.2E/ INTELSAT904

60.0E/ NILESAT 7.0W/ THOR 0.8W/ TURKSAT 42.0E/

YAMAL201 90.0E

2 Broadcasting system 1) PAL-BG

2) PAL-DK

3) PAL-I/I’

4) SECAM L/L’, DK, BG, I

5) DVB-T

6) DVB-C

7) DVB-T2

8) DVB-S

9) DVB-S2

DVB-S: Satellite

- 7 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

No. Item Specication Remarks

3 Receiving system Analog : Upper Heterodyne

Digital : COFDM, QAM

► DVB-T

- Guard Interval(Bitrate_Mbit/s)

1/4, 1/8, 1/16, 1/32

- Modulation : Code Rate

QPSK : 1/2, 2/3, 3/4, 5/6, 7/8

16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

► DVB-T2

- Guard Interval(Bitrate_Mbit/s)

1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,

- Modulation : Code Rate

QPSK : 1/2, 2/5, 2/3, 3/4, 5/6

16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

► DVB-C

- Symbolrate :

4.0Msymbols/s to 7.2Msymbols/s

- Modulation :

16QAM, 64-QAM, 128-QAM and 256-QAM

► DVB-S/S2

- symbolrate

DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s

DVB-S (QPSK) : 2 ~ 45Msymbol/s

- viterbi

DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8

DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10

4 Input Voltage AC 100 ~ 240V 50/60Hz

5 Screen Size 46.96 inches 1046.68(H) x 594.02(V) x 1.5(D)mm (Typ.)

FHD+240Hz

6 Aspect Ratio 16:9

7 Tuning System

8 Operating Environment 1) Temp : 0 ~ 40 deg

2) Humidity : ~ 80 %

9 Storage Environment 1) Temp : -20 ~ 60 deg

2) Humidity : ~ 85 %

- 8 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

5. Component Video Input (Y, Cb/Pb, Cr/Pr)

6. RGB input (PC)

No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock Porposed

1 720*480 15.73 60 13.5135 SDTV ,DVD 480I

2 720*480 15.73 59.94 13.5 SDTV ,DVD 480I

3 720*480 31.50 60 27.027 SDTV 480P

4 720*480 31.47 59.94 27.0 SDTV 480P

5 1280*720 45.00 60.00 74.25 HDTV 720P

6 1280*720 44.96 59.94 74.176 HDTV 720P

7 1920*1080 33.75 60.00 74.25 HDTV 1080I

8 1920*1080 33.72 59.94 74.176 HDTV 1080I

9 1920*1080 67.500 60 148.50 HDTV 1080P

10 1920*1080 67.432 59.94 148.352 HDTV 1080P

11 1920*1080 27.000 24.000 74.25 HDTV 1080P

12 1920*1080 26.97 23.976 74.176 HDTV 1080P

13 1920*1080 33.75 30.000 74.25 HDTV 1080P

14 1920*1080 33.71 29.97 74.176 HDTV 1080P

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed

PC DDC

1 640*350 31.468 70.09 25.17 EGA Х

2 720*400 31.469 70.08 28.32 DOS O

3 640*480 31.469 59.94 25.17 VESA(VGA) O

4 800*600 37.879 60.31 40.00 VESA(SVGA) O

5 1024*768 48.363 60.00 65.00 VESA(XGA) O

6 1360*768 47.712 60.015 85.50 VESA (WXGA) Х

7 1920*1080 67.5 60.00 148.5 WUXGA O

- 9 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

7. HDMI Input

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) VIC Proposed

HDMI-PC DDC

1 720*400 31.468 70.08 28.321 Х

2 640*480 31.469 59.94 25.17 VESA O

3 800*600 37.879 60.31 40.00 VESA O

4 1024*768 48.363 60.00 65.00 VESA(XGA) O

5 1360*768 47.72 59.8 84.75 WXGA O

6 1280*1024 63.595 60.0 108.875 SXGA O

7 1920*1080 67.5 60.00 148.5 WUXGA O

HDMI-DTV

1 640*480 31.469 / 31.5 59.94/ 60 25.125 1 SDTV 480P

2 720*480 31.469 / 31.5 59.94 / 60 27.00/27.03 2,3 SDTV 480P

3 720*576 31.25 50 27 17,18 SDTV 576P

4 720*576 15.625 50 27 21 SDTV 576I

5 1280*720 37.500 50 74.25 19 HDTV 720P

6 1280*720 44.96 / 45 59.94 / 60 74.17/74.25 4 HDTV 720P

7 1920*1080 33.72 / 33.75 59.94 / 60 74.17/74.25 5 HDTV 1080I

8 1920*1080 28.125 50.00 74.25 20 HDTV 1080I

9 1920*1080 26.97 / 27 23.97 / 24 74.17/74.25 32 HDTV 1080P

10 1920*1080 25 33 HDTV 1080P

11 1920*1080 33.716 / 33.75 29.976 / 30.00 74.25 34 HDTV 1080P

12 1920*1080 56.250 50 148.5 31 HDTV 1080P

13 1920*1080 67.43 / 67.5 59.94 / 60 148.35/148.50 16 HDTV 1080P

8. 3D Mode

8.1. RF Input

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom

2 1920*1080 28.125 50 74.25 HDTV 1080I Side by Side, Top & Bottom

8.2. HDMI Input

8.2.1. HDMI 1.3

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1280*720 45.00 60.00 74.25 HDTV 720P Side by Side, Top & Bottom

2 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom

3 1920*1080 33.75 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom

4 1920*1080 28.125 50.00 74.25 HDTV 1080I Side by Side, Top & Bottom

5 1920*1080 27.00 24.00 74.25 HDTV 1080P Side by Side, Top & Bottom

6 1920*1080 33.75 30.00 74.25 HDTV 1080P Side by Side, Top & Bottom

7 1920*1080 67.50 60.00 148.5 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard, Single Frame Sequential

8 1920*1080 56.250 50 148.5 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard, Single Frame Sequential

- 10 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

8.2.2. HDMI 1.4b

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) VIC 3D input proposed

mode Proposed

1 640*480 31.469 / 31.5 59.94/ 60 25.125 1

Frame packing

Line alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

Secondary(SDTV 480P)

(SDTV 480P)

(SDTV 480P)

Secondary(SDTV 480P)

Secondary(SDTV 480P

2 720*480 31.469 / 31.5 59.94 / 60 27.00/27.03 2,3

Frame packing

Line alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

Secondary(SDTV 480P)

(SDTV 480P)

(SDTV 480P)

Secondary(SDTV 480P)

Secondary(SDTV 480P)

3 720*576 31.25 50 27 17,18

Frame packing

Line alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

Secondary(SDTV 576P)

(SDTV 576P)

(SDTV 576P)

Secondary(SDTV 576P)

Secondary(SDTV 576P)

4 720*576 15.625 50 27 21

Frame packing

Field alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

Secondary(SDTV 576I)

(SDTV 576I

(SDTV 576I

Secondary(SDTV 576I)

Secondary(SDTV 576I)

5 1280*720 37.500 50 74.25 19

Frame packing

Line alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

Primary(HDTV 720P)

(HDTV 720P)

(HDTV 720P)

Primary(HDTV 720P)

Primary(HDTV 720P)

6 1280*720 44.96 / 45 59.94 / 60 74.17/74.25 4

Frame packing

Line alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

Primary(HDTV 720P)

(HDTV 720P)

(HDTV 720P)

Primary(HDTV 720P)

Primary(HDTV 720P)

7 1920*1080 33.72 / 33.75 59.94 / 60 74.17/74.25 5

Frame packing

Field alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

Primary(HDTV 1080I)

(HDTV 1080I)

(HDTV 1080I)

Secondary(HDTV 1080I)

Primary(HDTV 1080I)

8 1920*1080 28.125 50.00 74.25 20

Frame packing

Field alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

Primary(HDTV 1080I)

(HDTV 1080I)

(HDTV 1080I)

Secondary(HDTV 1080I)

Primary(HDTV 1080I)

9 1920*1080 26.97 / 27 23.97 / 24 74.17/74.25 32

Frame packing

Line alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

Primary(HDTV 1080P)

(HDTV 1080P)

(HDTV 1080P)

Primary(HDTV 1080P)

Primary(HDTV 1080P)

10 1920*1080 25 33

Frame packing

Line alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

Secondary(HDTV 1080P)

(HDTV 1080P)

(HDTV 1080P)

Secondary(HDTV 1080P)

Secondary(HDTV 1080P)

11 1920*1080 33.716 / 33.75 29.976 / 30.00 74.25 34

Frame packing

Line alternative

Side-by-side(Full)

Top-and-Bottom

Side-by-side(half)

(HDTV 1080P)

(HDTV 1080P)

(HDTV 1080P)

(HDTV 1080P)

Secondary(HDTV 1080P)

12 1920*1080 56.250 50 148.5 31 Top-and-Bottom

Side-by-side(half)

Primary(HDTV 1080P)

Secondary(HDTV 1080P)

13 1920*1080 67.43 / 67.5 59.94 / 60 148.35/148.50 16 Top-and-Bottom

Side-by-side(half)

Primary(HDTV 1080P)

Secondary(HDTV 1080P)

- 11 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

■ Remark: 3D Input mode

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

1 1920*1080 67.5 60 148.5 Side by Side, Top & Bottom HDTV 1080P

No. Side by Side Top & Bottom Checker board Single Frame

Sequential Frame Packing Line

Interleaving

Column

Interleaving

1

8.3. RGB-PC Input(3D)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock 3D input proposed mode Proposed

1 1280*720 45.00 60.00 74.25 Side by Side, Top & Bottom HDTV 720P

2 1280*720 44.96 59.94 74.176 Side by Side, Top & Bottom HDTV 720P

3 1920*1080 33.75 60.00 74.25 Side by Side, Top & Bottom HDTV 1080I

4 1920*1080 33.72 59.94 74.176 Side by Side, Top & Bottom HDTV 1080I

5 1920*1080 67.500 60 148.50 Side by Side, Top & Bottom HDTV 1080P

6 1920*1080 67.432 59.94 148.352 Side by Side, Top & Bottom HDTV 1080P

7 1920*1080 27.000 24.000 74.25 Side by Side, Top & Bottom HDTV 1080P

8 1920*1080 26.97 23.976 74.176 Side by Side, Top & Bottom HDTV 1080P

9 1920*1080 33.75 30.000 74.25 Side by Side, Top & Bottom HDTV 1080P

10 1920*1080 33.71 29.97 74.176 Side by Side, Top & Bottom HDTV 1080P

8.4. Component Input(3D)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

1 1920*1080 33.75 30.000 74.25 Side by Side, Top & Bottom,

Checkerboard HDTV 1080P

8.5. USB Input(3D)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

1 1920*1080 33.75 30.000 74.25 Side by Side, Top & Bottom,

Checkerboard HDTV 1080P

8.6. DLNA Input (3D)

R

L

R

LLLLL

L

R

L

- 12 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied to all of the LED LCD TV

with LD23E chassis.

2. Designation

(1) Because this is not a hot chassis, it is not necessary to

use an isolation transformer. However, the use of isolation

transformer will help protect test instrument.

(2) Adjustment must be done in the correct order.

(3) The adjustment must be performed in the circumstance of

25 °C ± 5 °C of temperature and 65 % ± 10 % of relative

humidity if there is no specific designation.

(4) The input voltage of the receiver must keep AC 100-240

V~, 50/60 Hz.

(5) The receiver must be operated for about 5 minutes prior to

the adjustment when module is in the circumstance of over

15.

In case of keeping module is in the circumstance of 0 °C, it

should be placed in the circumstance of above 15 °C for 2

hours.

In case of keeping module is in the circumstance of below

-20 °C, it should be placed in the circumstance of above 15

°C for 3 hours.

[Caution]

When still image is displayed for a period of 20 minutes or

longer (Especially where W/B scale is strong. Digital pattern

13ch and/or Cross hatch pattern 09ch), there can some

afterimage in the black level area.

3. Automatic Adjustment

3.1. ADC Adjustment

3.1.1. Overview

ADC adjustment is needed to find the optimum black level

and gain in Analog-to-Digital device and to compensate RGB

deviation.

3.1.2. Equipment & Condition

(1) USB to RS-232C Jig

(2) MSPG-925 Series Pattern Generator(MSPG-925FA,

pattern - 65)

- Resolution : 480i Comp1

1080P Comp1

1920*1080 RGB

- Pattern : Horizontal 100% Color Bar Pattern

- Pattern level : 0.7 ± 0.1 Vp-p

- Image

3.1.3. Adjustment

(1) Adjustment method

- Using RS-232, adjust items in the other shown in

"3.1.3.3)"

(2) Adj. protocol

Ref.) ADC Adj. RS232C Protocol_Ver1.0

(3) Adj. order

- aa 00 00 [Enter ADC adj. mode]

- xb 00 04 [Change input source to Component1 (480i&

1080p)]

- ad 00 10 [Adjust 480i&1080p Comp1]

- xb 00 06 [Change input source to RGB(1024*768)]

- ad 00 10 [Adjust 1920*1080 RGB]

- ad 00 90 End adj.

3.2. MAC address D/L, CI+ key D/L, Widevine

key D/L

Connect: PCBA Jig → RS-232C Port== PC → RS-232C Port

Communication Prot connection

▪ Com 1,2,3,4 and 115200(Baudrate)

Mode check: Online Only

▪ Check the test process: DETECT → MAC → CI → Widevine

→ ESN

▪ Play: START

▪ Result: Ready, Test, OK or NG

▪ Printer Out (MAC Address Label)

Protocol Command Set ACK

Enter adj. mode aa 00 00 a 00 OK00x

Source change

xb 00 04 b 00 OK04x (Adjust 480i, 1080p Comp1 )

xb 00 06 b 00 OK06x (Adjust 1920*1080 RGB)

Begin adj. ad 00 10

Return adj. result OKx (Case of Success)

NGx (Case of Fail)

Read adj. data

(main)

ad 00 20

(main)

000000000000000000000000007c007b006dx

(sub ) (Sub)

000000070000000000000000007c00830077x

ad 00 21

Conrm adj. ad 00 99

NG 03 00x (Fail)

NG 03 01x (Fail)

NG 03 02x (Fail)

OK 03 03x (Success)

End adj. aa 00 90 a 00 OK90x

- 13 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

3.3. LAN Inspection

3.3.1. Equipment & Condition

▪ Each other connection to LAN Port of IP Hub and Jig

3.3.2. LAN inspection solution

▪ LAN Port connection with PCB

▪ Network setting at MENU Mode of TV

▪ Setting automatic IP

▪ Setting state confirmation

→ If automatic setting is finished, you confirm IP and MAC

Address.

3.3.3. WIDEVINE key Inspection

- Confirm key input data at the "IN START" MENU Mode.

3.4. LAN PORT INSPECTION(PING TEST)

Connect SET → LAN port == PC → LAN Port

3.4.1. Equipment setting

(1) Play the LAN Port Test PROGRAM.

(2) Input IP set up for an inspection to Test Program.

*IP Number : 12.12.2.2

3.4.2. LAN PORT inspection(PING TEST)

(1) Play the LAN Port Test Program.

(2) Connect each other LAN Port Jack.

(3) Play Test (F9) button and confirm OK Message.

(4) Remove LAN cable.

3.5. Model name & Serial number Download

3.5.1. Model name & Serial number D/L

▪ Press "Power on" key of service remote control.

(Baud rate : 115200 bps)

▪ Connect RS232 Signal Cable to RS-232 Jack.

▪ Write Serial number by use RS-232.

▪ Must check the serial number at Instart menu.

3.5.2. Method & notice

(1) Serial number D/L is using of scan equipment.

(2) Setting of scan equipment operated by Manufacturing

Technology Group.

(3) Serial number D/L must be conformed when it is produced

in production line, because serial number D/L is mandatory

by D-book 4.0

SET PC

- 14 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

* Manual Download (Model Name and Serial Number)

If the TV set is downloaded by OTA or service man, sometimes

model name or serial number is initialized.(Not always)

It is impossible to download by bar code scan, so It need

Manual download.

1) Press the "Instart" key of Adjustment remote control.

2) Go to the menu "6.Model Number D/L" like below photo.

3) Input the Factory model name(ex 42LD450-TA) or Serial

number like photo.

4) Check the model name Instart menu. → Factory name

displayed. (ex 47LM960V-ZB)

5) Check the Diagnostics.(DTV country only) → Buyer

model displayed. (ex 47LM960V-ZB)

3.6. CI+ Key checking method

- Check the Section 3.2

Check whether the key was downloaded or not at ‘In Start’

menu. (Refer to below).

=> Check the Download to CI+ Key value in LGset.

3.6.1. Check the method of CI+ Key value

(1) Check the method on Instart menu

(2) Check the method of RS232C Command

1) Into the main ass’y mode(RS232: aa 00 00)

2) Check the key download for transmitted command

(RS232: ci 00 10)

3) result value

- normally status for download : OKx

- abnormally status for download : NGx

3.6.2. Check the method of CI+ key value(RS232)

1) Into the main ass’y mode(RS232: aa 00 00)

2) Check the mothed of CI+ key by command

(RS232: ci 00 20)

3) Result value

i 01 OK 1d1852d21c1ed5dcx

3.7. WIFI MAC ADDRESS CHECK

(1) Using RS232 Command

(2) Check the menu on in-start

H-freq(kHz) V-freq.(Hz)

Transmission [A][I][][Set ID][][20][Cr] [O][K][X] or [NG]

CMD 1 CMD 2 Data 0

A A 0 0

CMD 1 CMD 2 Data 0

C I 1 0

CMD 1 CMD 2 Data 0

A A 0 0

CMD 1 CMD 2 Data 0

C I 2 0

CI+ Key Value

- 15 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4. Manual Adjustment

* ADC adjustment is not needed because of OTP(Auto ADC

adjustment)

4.1 EDID(The Extended Display Identification

Data)/DDC(Display Data Channel) download

4.1.1. Overview

It is a VESA regulation. A PC or a MNT will display an optimal

resolution through information sharing without any necessity

of user input. It is a realization of "Plug and Play".

4.1.2. Equipment

- Since embedded EDID data is used, EDID download JIG,

HDMI cable and D-sub cable are not need.

- Adjustment remote control

4.1.3. Download method

(1) Press "ADJ" key on the Adjustment remote control then

select "10.EDID D/L", By pressing "Enter" key, enter EDID

D/L menu.

(2) Select "Start" button by pressing "Enter" key, HDMI1/

HDMI2/ HDMI3/ HDMI4/ RGB are writing and display OK

or NG.

4.1.4. EDID DATA

▪ HDMI(FHD 3D, HDMI 1.4a, 3D)

▪ RGB

▪ Reference

- HDMI1 ~ HDMI4 / RGB

- In the data of EDID, bellows may be different by S/W or

Input mode.

ⓐ Product ID

ⓑ Serial No: Controlled on production line.

ⓒ Month, Year: Controlled on production line:

ex) Monthly : ‘01’ → ‘01’

Year : ‘2012’ → ‘16’

ⓓ Model Name(Hex): LGTV

ⓔ Checksum(LG TV): Changeable by total EDID data.

ⓕ Vendor Specific(HDMI)

# HDMI 1(C/S : 9D BA)

EDID Block 0, Bytes 0-127 [00H-7FH]

EDID Block 1, Bytes 128-255 [80H-FFH]

# HDMI 2(C/S : 9D AA)

EDID Block 0, Bytes 0-127 [00H-7FH]

EDID Block 1, Bytes 128-255 [80H-FFH]

For Analog For HDMI EDID

D-sub to D-sub DVI-D to HDMI or HDMI to HDMI

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐⓓ ⓑ

0x01 ⓒ01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

0x02 0F 50 54 A1 08 00 71 40 81 C0 81 00 81 80 95 00

0x03 90 40 A9 C0 B3 00 02 3A 80 18 71 38 2D 40 58 2C

0x04 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30

0x05 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 39

0x06 3F 1F 52 10 00 0A 20 20 20 20 20 20 ⓓ

0x07 ⓓ01 ⓔ1

0x00 02 03 37 F1 4E 90 1F 04 13 05 14 03 02 12 20 21

0x01 22 15 01 26 15 07 50 09 57 07 ⓕ

0x02 ⓕ

0x03 ⓕE3 05 03 01 02 3A 80 18 71 1C 38 2D 40

0x04 2C 45 00 A0 5A 00 00 00 1E 01 1D 80 18 71 1C 16

0x05 20 58 2C 25 00 A0 5A 00 00 00 9E 01 1D 00 72 51

0x06 D0 1E 20 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00

0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ⓔ2

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ

0x01 ⓒ01 03 68 10 09 78 0A EE 91 A3 54 4C 99 26

0x02 0F 50 54 A1 08 00 71 40 81 C0 81 00 81 80 95 00

0x03 90 40 A9 C0 B3 00 02 3A 80 18 71 38 2D 40 58 2C

0x04 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30

0x05 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A

0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ

0x07 ⓓ00 ⓔ3

0 1 2 3 4 5 6 7 8 9 A B C D E F

00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01

10 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80

30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30

50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 39

60 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC

70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43

0 1 2 3 4 5 6 7 8 9 A B C D E F

00 02 03 37 F1 4E 10 9F 04 13 05 14 03 02 12 20 21

10 22 15 01 26 15 07 50 09 57 07 78 03 0C 00 10 00

20 B8 2D 20 C0 0E 01 4F 3F FC 08 10 18 10 06 10 16

30 10 28 10 E3 05 03 01 02 3A 80 18 71 38 2D 40 58

40 2C 45 00 A0 5A 00 00 00 1E 01 1D 80 18 71 1C 16

50 20 58 2C 25 00 A0 5A 00 00 00 9E 01 1D 00 72 51

60 D0 1E 20 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00

70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 11

0 1 2 3 4 5 6 7 8 9 A B C D E F

00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01

10 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80

30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30

50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 39

60 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC

70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43

0 0 1 2 3 4 5 6 7 8 9 A B C D E F

00 02 03 37 F1 4E 10 9F 04 13 05 14 03 02 12 20 21

10 22 15 01 26 15 07 50 09 57 07 78 03 0C 00 20 00

20 B8 2D 20 C0 0E 01 4F 3F FC 08 10 18 10 06 10 16

30 10 28 10 E3 05 03 01 02 3A 80 18 71 38 2D 40 58

40 2C 45 00 A0 5A 00 00 00 1E 01 1D 80 18 71 1C 16

50 20 58 2C 25 00 A0 5A 00 00 00 9E 01 1D 00 72 51

60 D0 1E 20 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00

70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01

- 16 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

# HDMI 3(C/S : 9D 9A)

EDID Block 0, Bytes 0-127 [00H-7FH]

EDID Block 1, Bytes 128-255 [80H-FFH

# HDMI 4(C/S : 9D 8A)

EDID Block 0, Bytes 0-127 [00H-7FH]

EDID Block 1, Bytes 128-255 [80H-FFH]

# RGB(C/S : 97)

4.2. White Balance Adjustment

4.2.1. Overview

▪ W/B adj. Objective & How-it-works

(1) Objective: To reduce each Panel's W/B deviation

(2) How-it-works : When R/G/B gain in the OSD is at 192, it

means the panel is at its Full Dynamic Range. In order to

prevent saturation of Full Dynamic range and data, one

of R/G/B is fixed at 192, and the other two is lowered to

find the desired value.

(3) Adjustment condition : normal temperature

1) Surrounding Temperature : 25 °C ± 5 °C

2) Warm-up time: About 5 Min

3) Surrounding Humidity : 20 % ~ 80 %

4.2.2. Equipment

(1) Color Analyzer: CA-210 (LED Module : CH 14)

(2) Adjustment Computer(During auto adj., RS-232C protocol

is needed)

(3) Adjustment Remote control

(4) Video Signal Generator MSPG-925F 720p/216-Gray

(Model: 217, Pattern: 78)

-> Only when internal pattern is not available

▪ Color Analyzer Matrix should be calibrated using CS-1000.

4.2.3. Equipment connection MAP

4.2.4. Adj. Command (Protocol)

<Command Format>

- LEN: Number of Data Byte to be sent

- CMD: Command

- VAL: FOS Data value

- CS: Checksum of sent data

- A: Acknowledge

Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

▪ RS-232C Command used during auto-adjustment.

START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS STOP

0 1 2 3 4 5 6 7 8 9 A B C D E F

00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01

10 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80

30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30

50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 39

60 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC

70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43

0 1 2 3 4 5 6 7 8 9 A B C D E F

00 02 03 37 F1 4E 10 9F 04 13 05 14 03 02 12 20 21

10 22 15 01 26 15 07 50 09 57 07 78 03 0C 00 30 00

20 B8 2D 20 C0 0E 01 4F 3F FC 08 10 18 10 06 10 16

30 10 28 10 E3 05 03 01 02 3A 80 18 71 38 2D 40 58

40 2C 45 00 A0 5A 00 00 00 1E 01 1D 80 18 71 1C 16

50 20 58 2C 25 00 A0 5A 00 00 00 9E 01 1D 00 72 51

60 D0 1E 20 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00

70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F1

0 1 2 3 4 5 6 7 8 9 A B C D E F

00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01

10 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80

30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30

50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 39

60 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC

70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43

0 1 2 3 4 5 6 7 8 9 A B C D E F

00 02 03 37 F1 4E 10 9F 04 13 05 14 03 02 12 20 21

10 22 15 01 26 15 07 50 09 57 07 78 03 0C 00 40 00

20 B8 2D 20 C0 0E 01 4F 3F FC 08 10 18 10 06 10 16

30 10 28 10 E3 05 03 01 02 3A 80 18 71 38 2D 40 58

40 2C 45 00 A0 5A 00 00 00 1E 01 1D 80 18 71 1C 16

50 20 58 2C 25 00 A0 5A 00 00 00 9E 01 1D 00 72 51

60 D0 1E 20 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00

70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E1

0 1 2 3 4 5 6 7 8 9 A B C D E F

00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01

10 01 16 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26

20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80

30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30

50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A

60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC

70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 5C

Co lo r An alyzer

Co mp ut er

Pat tern Generat or

RS -2 32C

RS-2 32C

RS-2 32C

Probe

Signal Source

* If TV internal pattern is used, not needed

RS-232C COMMAND

[CMD ID DATA] Explantion

wb 00 00 Begin White Balance adjustment

wb 00 10 Gain adjustment(internal white pattern)

wb 00 1f Gain adjustment completed

wb 00 20 Offset adjustment(internal white pattern)

wb 00 2f Offset adjustment completed

wb 00 ff End White Balance adjustment

(internal pattern disappears )

- 17 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

Ex) wb 00 00 -> Begin white balance auto-adj.

wb 00 10 -> Gain adj.

ja 00 ff -> Adj. data

jb 00 c0

...

...

wb 00 1f → Gain adj. completed

*(wb 00 20(Start), wb 00 2f(end)) → Off-set adj.

wb 00 ff → End white balance auto-adj.

▪ Adj. Map

4.2.5. Adj. method

(1) Auto adj. method

1) Set TV in adj. mode using POWER ON key.

2) Zero calibrate probe then place it on the center of the

Display.

3) Connect Cable.(RS-232C to USB)

4) Select mode in adj. Program and begin adj.

5) When adj. is complete (OK Sign), check adj. status pre

mode. (Warm, Medium, Cool)

6) Remove probe and RS-232C cable to complete adj.

▪ W/B Adj. must begin as start command “wb 00 00” , and

finish as end command “wb 00 ff”, and Adj. offset if need.

(2) Manual adjustment. method

1) Set TV in Adj. mode using POWER ON.

2) Zero Calibrate the probe of Color Analyzer, then place it

on the center of LCD module within 10 cm of the

surface.

3) Press ADJ key → EZ adjust using adj. R/C → 7. White-

Balance then press the cursor to the right(key ►).

(When right key(►) is pressed 216 Gray internal pattern

will be displayed)

4) One of R Gain / G Gain / B Gain should be fixed at 192,

and the rest will be lowered to meet the desired value.

5) Adjustment is performed in COOL, MEDIUM, WARM 3

modes of color temperature.

▪ If internal pattern is not available, use RF input. In EZ

Adj. menu 7.White Balance, you can select one of 2

Test-pattern: ON, OFF. Default is inner(ON). By selecting

OFF, you can adjust using RF signal in 216 Gray pattern.

▪ Adjustment condition and cautionary items

1) Lighting condition in surrounding area

Surrounding lighting should be lower 10 lux. Try to

isolate adj. area into dark surrounding.

2) Probe location

: Color Analyzer(CA-210) probe should be within 10 cm

and perpendicular of the module surface (80° ~ 100°)

3) Aging time

- After Aging Start, Keep the Power ON status during 5

Minutes.

- In case of LCD, Back-light on should be checked

using no signal or Full-white pattern.

4.2.6. Reference(White balance adjusmtment coordinate

and color temperature)

▪ Luminance : 216 Gray

▪ Standard color coordinate and temperature using CS-1000

(over 26 inch)

▪

Standard color coordinate and temperature using CA-210(CH 9)

4.2.7. ALELF & EDGE LED White balance table

- EDGE LED module change color coordinate because of

aging time.

- Apply under the color coordinate table, for compensated

aging time.

- ALEF(LM860*)

Adj. item Command

(lower caseASCII)

Data Range

(Hex.)

Default

(Decimal)

CMD1 CMD2 MIN MAX

Cool

R Gain j g 00 C0

G Gain j h 00 C0

B Gain j i 00 C0

R Cut

G Cut

B Cut

Medium

R Gain j a 00 C0

G Gain j b 00 C0

B Gain j c 00 C0

R Cut

G Cut

B Cut

Warm

R Gain j d 00 C0

G Gain j e 00 C0

B Gain j f 00 C0

R Cut

G Cut

Mode Coordinate Temp ∆uv

x y

Cool 0.269 0.273 13000 K 0.0000

Medium 0.285 0.293 9300 K 0.0000

Warm 0.313 0.329 6500 K 0.0000

Mode Coordinate Temp ∆uv

x y

Cool 0.269 ± 0.002 0.273 ± 0.002 13000K 0.0000

Medium 0.285 ± 0.002 0.293 ± 0.002 9300K 0.0000

Warm 0.313 ± 0.002 0.329 ± 0.002 6500K 0.0000

GP4

Aging

time

(Min)

Cool Medium Warm

X y x y x y

269 273 285 293 313 329

1 0-2 293 305 309 323 330 348

2 3-5 292 303 308 321 330 347

3 6-9 291 302 307 320 329 346

4 10-19 288 298 304 316 326 342

5 20-35 286 295 302 313 324 339

6 36-49 285 293 301 311 322 337

7 50-79 283 291 299 309 321 335

8 80-149 282 289 298 308 320 334

9 Over 150 281 287 298 306 319 332

- 18 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4.3. EYE-Q function check

(1) Turn on TV.

(2) Press EYE key of Adjustment remote control.

(3) Cover the Eye Q II sensor on the front of the using your

hand and wait for 6 seconds.

(4) Confirm that R/G/B value is lower than 10 of the "Raw

Data (Sensor data, Back light)". If after 6 seconds, R/G/B

value is not lower than 10, replace Eye Q II sensor.

(5) Remove your hand from the Eye Q II sensor and wait for 6

seconds.

(6) Confirm that "ok" pop up. If change is not seen, replace

Eye Q II sensor.

4.4. Local Dimming Function Check

Step 1) Turn on TV.

Step 2) At the Local Dimming mode, module Edge Backlight

moving right to left Back light of IOP module moving.

Step 3) Confirm the Local Dimming mode.

Step 4) Press "exit" key.

4.5. Magic Motion Remote control test

(1) Equipment : RF Remote control for test, IR-KEY-Code

Remote control for test

(2) You must confirm the battery power of RF-Remote control

before test(recommend that change the battery per every lot)

(3) Sequence (test)

1) if you select the "Start(Mute)" key on the Adjustment

remote control, you can pairing with the TV SET.

2) You can check the cursor on the TV Screen, when select

the "OK" key on the Adjustment remote control.

3) You must remove the pairing with the TV Set by select

"OK" key + "Mute" key on the Adjustment remote control

for 5 seconds.

4.6. 3D function test

(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])

* HDMI mode NO. 872 , pattern No.83

(1) Please input 3D test pattern like below.

(2) When 3D OSD appear automatically, then select OK key.

(3) Don't wear a 3D Glasses, check the picture like below.

G

- 19 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4.7. Wi-Fi Test

Step 1) Turn on TV

Step 2) Select Network Connection option in Network Menu.

Step 3) Select Start Connection button in Network Connection.

Step 4) If the system finds any AP like blow PIC, it is working

well.

4.8. LNB voltage and 22KHz tone check

(only for DVB-S/S2 model)

▪ Test method

(1) Set TV in Adj. mode using POWER ON.

(2) Connect cable between satellite ANT and test JIG.

(3) Press Yellow key(ETC+SWAP) in Adj Remote control to

make LNB on.

(4) Check LED light ‘ON’ at 18 V menu.

(5) Check LED light ‘ON’ at 22 KHz tone menu.

(6) Press Blue key(ETC+PIP INPUT) in Adj Remote control

to make LNB off.

(7) Check LED light ‘OFF’ at 18 V menu.

(8) Check LED light ‘OFF’ at 22 KHz tone menu.

▪ Test result

(1) After press LNB On key, ‘18 V LED’ and ‘22 KHz tone

LED’ should be ON.

(2) After press LNB OFF key, ‘18 V LED’ and ‘22 KHz tone

LED’ should be OFF.

4.9. Inspection of light scattering

▪ Test Method

(1) Push “Power only” key.

(2) Push “HDMI” hot key.

(3) Inspect whether light scattering is occurred in internal

black pattern or not.

(4) Push “Power only” key.

4.10. Option selection per country

4.10.1. Overview

- Option selection is only done for models in Non-EU

4.10.2. Method

(1) Press ADJ key on the Adj. R/C, then select Country Group

Meun

(2) Depending on destination, select Country Group Code 04

or Country Group EU then on the lower Country option,

select US, CA, MX. Selection is done using +, - or ►◄

key.

4.11. MHL Test

(1) Turn on TV

(2) Select HDMI4 mode using input Menu.

(3) Set MHL Zig(M1S0D3617) using MHL input, output and

power cord.

(4) Connect HDMI cable between MHL Zig and HDMI4 port.

(5) Check LED light of Zig and Module of Set.

Result) If, The LED light is green and The Module shows

normal stream → OK, Else → NG

- 20 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

5. Tool Option selection

▪ Method : Press "ADJ" key on the Adjustment remote control,

then select Tool option.

6. Ship-out mode check(In-stop)

▪ After final inspection, press "IN-STOP" key of the Adjustment

remote control and check that the unit goes to Stand-by

mode.

7. GND and Internal Pressure check

7.1. Method

(1) GND & Internal Pressure auto-check preparation

- Check that Power cord is fully inserted to the SET.

(If loose, re-insert)

(2) Perform GND & Internal Pressure auto-check

- Unit fully inserted Power cord, Antenna cable and A/V

arrive to the auto-check process.

- Connect D-terminal to AV JACK TESTER

- Auto CONTROLLER(GWS103-4) ON

- Perform GND TEST

- If NG, Buzzer will sound to inform the operator.

- If OK, changeover to I/P check automatically.

(Remove CORD, A/V form AV JACK BOX.)

- Perform I/P test

- If NG, Buzzer will sound to inform the operator.

- If OK, Good lamp will lit up and the stopper will allow the

pallet to move on to next process.

7.2. Checkpoint

▪ TEST voltage

- GND: 1.5 KV / min at 100 mA

- SIGNAL: 3 KV / min at 100 mA

▪ TEST time: 1 second

▪ TEST POINT

- GND TEST = POWER CORD GND & SIGNAL CABLE

METAL GND

- Internal Pressure TEST = POWER CORD GND & LIVE &

NEUTRAL

▪ LEAKAGE CURRENT: At 0.5 mArms

8. Audio

Measurement condition:

(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation

(2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms

(3) RGB PC: 1 KHz sine wave signal 0.7 Vrms

9. USB S/W Download(Service only)

(1) Put the USB Stick to the USB socket.

(2) Automatically detecting update file in USB Stick.

- If your downloaded program version in USB Stick is Low,

it didn't work. But your downloaded version is High, USB

data is automatically detecting.(Download Version High &

Power only mode, Set is automatically Download)

(3) Show the message "Copying files from memory".

(4) Updating is starting.

(5) Updating Completed, The TV will restart automatically.

(6) If your TV is turned on, check your updated version and

Tool option. (explain the Tool option, next stage)

* If downloading version is more high than your TV have, TV

can lost all channel data. In this case, you have to channel

recover. if all channel data is cleared, you didn’t have a DTV/

ATV test on production line.

* After downloading, have to adjust Tool Option again.

(1) Push "IN-START" key in service remote control.

(2) Select "Tool Option 1" and push "OK" key.

(3) Punch in the number. (Each model has their number)

No. Item Min Typ Max Unit Remark

1.

Audio practical

max Output, L/R

(Distortion=10%

max Output)

9.0 10.0 12.0 W Measurement condition

Auto Volume :Off

Audio EQ : Off

Clear Voice : Off

Virtual Surround:Off

8.5 8.9 9.8 Vrms

2. Speaker (8Ω

Impedance) 10.0 15.0 W

- 21 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

A22

A2

A21

A10 AG1

* Set + Stand

* Stand Base + Body

AG2

900

300

301

200

400

700

710

540 521

530

800

810

541

910

560

410

570

120

510

501

500

580

310

LV1

123

122

920

Dual Play

EXPLODED VIEW

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These

parts are identified by in the Schematic Diagram and EXPLODED VIEW.

It is essential that these special safety parts should be replaced with the same components as

recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.

Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EB_ADDR[9]

BOOT_MODE0

EB_DATA[0]

EB_DATA[1]

EB_ADDR[3]

EB_DATA[3]

EB_DATA[2]

EB_DATA[4]

EB_ADDR[2]

EB_ADDR[11]

EB_DATA[5]

EMMC_DATA[7]

EMMC_DATA[6]

EB_DATA[6]

EMMC_DATA[5]

EB_DATA[7]

EB_ADDR[12]

EB_ADDR[13]

EB_ADDR[6]

EMMC_DATA[0]

EB_ADDR[14]

EMMC_DATA[1]

EB_ADDR[0]

BOOT_MODE1

EMMC_DATA[2]

EB_ADDR[5]

EMMC_DATA[3]

EB_ADDR[7]

EMMC_DATA[4]

EB_ADDR[4]

EB_ADDR[1]

EB_ADDR[8]

EB_ADDR[10]

PLLSET1

R197

3.3K

+3.3V_NORMAL

I2C_SDA2

/PCM_CE2

R143

22

OPT

I2C_SDA5

+3.3V_NORMAL

/PCM_CE1

R133 10K

OPT

R180

3.3K

R168 10K CI

I2C_SCL2

HW_OPT_7

R167 10K CI

I2C_SDA4

CAM_IREQ_N

UART1_TX

R187

4.7K

R198

3.3K

I2C_SCL6

M_RFModule_ISP

BOOT_MODE1

HW_OPT_6

XO_MAIN

HW_OPT_0

HW_OPT_8

I2C_SDA2

CAM_CD2_N

RF_SWITCH_CTL

HW_OPT_2

R102 22

OPT

HW_OPT_4

R181

3.3K

FRC_RESET

/RST_HUB

TCK0

HW_OPT_1

UART1_RX

SOC_TX

CAM_REG_N

R196

3.3K

/USB_OCD3

R132 10K

OPT

I2C_SCL3

BOOT_MODE0

+3.3V_NORMAL

PLLSET0

TDI0

XIN_MAIN

CAM_CD1_N

C111

0.1uF

CAM_WAIT_N

UART1_RX

+3.3V_NORMAL

R166 10K CI

R131 10K

OPT

ERROR_OUT

R103 22

OPT

R199

3.3K

I2C_SCL5

DSUB_DET

R150 22

+3.3V_NORMAL

I2C_SCL1

M_RFModule_RESET

CAM_INPACK_N

UART1_TX

R112

1M

R185

4.7K

OPT

SC_DET

TDO0

SOC_RX

TMS0

I2C_SCL5

I2C_SDA1

I2C_SCL4

M_REMOTE_TX

R186

4.7K

SOC_RESET

+3.3V_NORMAL

HW_OPT_3

R134 10K

OPT

R188

4.7K

OPT

HW_OPT_5

R142

22

OPT

I2C_SDA3

I2C_SDA6

/RST_PHY

TRST_N0

I2C_SCL2

I2C_SDA5

M_REMOTE_RX

COMP1_DET

HW_OPT_8

HW_OPT_1

R125 10K

UD

R138 10K

OPTIC

R100 10K

FRC_EXTERNAL

R139 10K

NON_OPTIC

R107 10K

FRC_INTERNAL

R140 10K

3D_DEPTH

R154 10K

DVB_S_TUNER

HW_OPT_2

R152 10K

DVB_T2_TUNER

R155 10K

NON_DVB_S_TUNER

HW_OPT_5

R153 10K

NON_DVB_T2_TUNER

HW_OPT_7

R141 10K

NON_3D DEPTH

HW_OPT_3

+3.3V_NORMAL

R146 10K

1GByte R145 10K

OPT

R148 10K

NON_CP_BOX

R111 10K

FRC3

R124 10K

FHD

HW_OPT_4

R147 10K

CP_BOX

HW_OPT_6

R110 10K

URSA5

HW_OPT_0

HW_OPT_9

HW_OPT_9

R158 10K

NON_DVB_C2_TUNER

R156 10K

DVB_C2_TUNER

HP_DET

PCM_RST

/TU_RESET

/S2_RESET

I2C_BE_SDA1I2C_SDA1

R151 22

R160 22

R162 22

I2C_BE_SCL1

FRC3_RESET

I2C_SCL1

FRC_RESET

LOCAL_DIM_EN

R170

10K

SMARTCARD_RST

SMARTCARD_VCC

SMARTCARD_DET

SMARTCARD_DATA

SMARTCARD_CLK

SMARTCARD_PWR_SEL

SMARTCARD_DATA

SMARTCARD_PWR_SEL

SMARTCARD_DET

SMARTCARD_CLK

SMARTCARD_RST

SMARTCARD_VCC

I2C_SDA3

I2C_SCL3

HDMI_INT

HDMI_S/W_RESET

MHL_DET

SW1

JTP-1127WEM

DEBUG

12

4 3

Q100

2N7002K

S

D

G

Q103

2N7002K

S

D

G

+5V_NORMAL

Q104

2N7002K

S

D

G

Q105

2N7002K OPT

S

D

G

+3.3V_NORMAL

R201

2.7K

1/16W

5%

C100

8pF

50V

C101

8pF

50V

+5V_NORMAL

R202

100K

R203

100K

OPT

R126 10K

NOT_ZORAN_FRC

R121 10K

ZORAN_FRC

HW_OPT_10

HW_OPT_10

+3.3V_NORMAL

PLLSET1

EMMC_DATA[0-7]

R176 22

OPT

EB_OE_N

WIFI_DP

BOOT_MODE0

USB_HUB_IC_IN_DM

EMMC_CLK

R174 22

OPT

WIFI_DM

USB_DP3

USB_CTL3

EMMC_CMD

EMMC_RST

EB_DATA[0-7]

DTV_ATV_SELECT

USB_DM3

USB_HUB_IC_IN_DP

AV1_CVBS_DET

EB_BE_N1

EB_BE_N0

BOOT_MODE1

EB_WE_N

EB_ADDR[0-14]

PLLSET0

R105 22

EPHY_RXD0

EPHY_REFCLK

R108 22

EPHY_TXD1

EPHY_EN

EPHY_CRS_DV

EPHY_TXD0

EPHY_MDIO

EPHY_RXD1

EPHY_MDC

R106 22

I2C_SCL3

I2C_SCL5

I2C_SDA4

I2C_SCL6

I2C_SCL4

I2C_SDA6

I2C_SDA3

I2C_SCL1

I2C_SDA1

I2C_SDA2

I2C_SDA5

I2C_SCL2

XIN_MAIN

XO_MAIN R104 560

1%

TDO0

TDI0

TMS0

TCK0

TRST_N0

PCM_5V_CTL

+5V_NORMAL

+3.3V_NORMAL

+3.3V_NORMAL

3D_DEPTH_RESET

FLASH_WP

MO_SENS_TO_MAIN_DOWN

MO_SENS_TO_MAIN_UP

MOTOR_CLOSE_SW

MOTOR_OPEN_SW

MOTOR_CW

MOTOR_CCW

MOTOR_CLOSE_SW

MO_SENS_TO_MAIN_DOWN

MOTOR_CW

MOTOR_CCW

MO_SENS_TO_MAIN_UP

MOTOR_OPEN_SW

R109

10K

+3.3V_NORMAL

P100

12507WS-04L

DEBUG

1

2

3

4

5

R184

1.2K

R183

1.2K

OLED_TCON_RESET

OPTIC_FPGA_RESET

FPGA_LVDS_INFO

OPTIC_SERDES_RESET

OPTIC_SERDES_RESET

OPTIC_FPGA_RESET

OLED_TCON_RESET

EPHY_INT

3D_DEPTH_RESET

IRB_SPI_SS

IRB_SPI_CK

IRB_SPI_MOSI

IRB_SPI_MISO

IR_B_RESET

IRB_SPI_MISO

IRB_SPI_SS

IRB_SPI_CK

IRB_SPI_MOSI

IR_B_RESET

EPHY_INT

SEL_USB3

SEL_USB2

/RST_PHY

SEL_USB3

SC_DET

SEL_USB1

SEL_USB1

HP_DET

SEL_USB2

IC102

R1EX24256BSAS0A

3

A2

2

A1

4

VSS

1

A0

5SDA

6SCL

7WP

8VCC

/USB_OCD2 R101 22

HP_AMP_MUTE R117

22

OPT

DiiVA_POD_CTL

DiiVA_POD_CTL

IC100

LG1152D-B1

XIN_MAIN

A22

XO_MAIN

B22

OPM1

AB16

OPM0

AB17

PORES_N

AE3

TRST_N0

V23

TMS0

U25

TCK0

V25

TDI0

V24

TDO0

U24

TRST_N1

Y22

TMS1

AA22

TCK1

AB20

TDI1

AB21

TDO1

W22

PLLSET1

AB9

PLLSET0

AB8

BOOT_MODE1

AB15

BOOT_MODE0

AB14

EXT_INTR3/GPIO48

Y23

EXT_INTR2/GPIO63

W25

EXT_INTR1/GPIO62

W24

EXT_INTR0/GPIO61

W23

UART0_RX/GPIO49

Y5

UART0_TX/GPIO50

W6

UART1_RX

AA6

UART1_TX

Y6

UART2_RX

AB5

UART2_TX

AA5

SPI_DI0/GPIO39

AB23

SPI_DO0/GPIO38

AB24

SPI_SCLK0/GPIO37

AA25

SPI_CS0/GPIO36

AB25

SPI_DI1/GPIO35

Y25

SPI_DO1/GPIO34

AA23

SPI_SCLK1/GPIO33

Y24

SPI_CS1/GPIO32

AA24

SCL0/GPIO60

AB6

SDA0/GPIO59

AB4

SCL1/GPIO58

AC5

SDA1/GPIO57

AC4

SCL2/GPIO56

AD4

SDA2/GPIO71

AE4

SCL3/GPIO70

AE5

SDA3/GPIO69

AD5

SCL4/GPIO68

AE6

SDA4/GPIO67

AD6

SCL5/GPIO66

AC6

SDA5/GPIO65

AC7

RMII_REF_CLK

AD2

RMII_CRS_DV

AB1

RMII_MDIO

AB2

RMII_MDC

AB3

RMII_TXEN

AC2

RMII_TXD1

AC3

RMII_TXD0

AE1

RMII_RXD1

AD3

RMII_RXD0

AD1

CAM_CE1_N

W26

CAM_CE2_N

V28

CAM_CD1_N

Y27

CAM_CD2_N

Y26

CAM_VS1_N

W28

CAM_VS2_N

W27

CAM_IREQ_N

AA28

CAM_RESET

AB26

CAM_INPACK_N

AA27

CAM_VCCEN_N

AA26

CAM_WAIT_N

Y28

CAM_REG_N

V27

CAM_IOIS16_N

V26

SC_CLK/GPIO90

R25

SC_DETECT/GPIO93

U23

SC_VCCEN/GPIO89

T25

SC_VCC_SEL/GPIO88

T24

SC_RST/GPIO91

T23

SC_DATA/GPIO92

R24

SD_CLK/GPIO76

C22

SD_CMD/GPIO73

C23

SD_CD_N/GPIO75

A23

SD_WP_N/GPIO74

B23

SD_DATA3/GPIO72

A24

SD_DATA2/GPIO87

B24

SD_DATA1/GPIO86

C24

SD_DATA0/GPIO85

A25

USB_DP1

B27

USB_DM1

A27

USB_DP2

A26

USB_DM2

B26

USB_TXR_RKL

C25

USB_ANALOGTEST

B25

BT_USB_DP

AA1

BT_USB_DM

AA2

BT_TXR_RKL

AA4

BT_ANALOGTEST

Y4

EMMC_RST E28

EMMC_CLK F27

EMMC_CMD F26

EMMC_DATA7 C26

EMMC_DATA6 E27

EMMC_DATA5 E26

EMMC_DATA4 D27

EMMC_DATA3 D28

EMMC_DATA2 C27

EMMC_DATA1 C28

EMMC_DATA0 D26

NAND_CS1 R23

NAND_CS0 P24

NAND_ALE N25

NAND_CLE P23

NAND_REN N24

NAND_WEN P25

GPIO31 AC1

GPIO30 V7

GPIO29 W5

GPIO28 W4

GPIO27 V6

GPIO26 V5

GPIO25 V4

GPIO24 U6

GPIO23 U5

GPIO22 U4

GPIO21 T6

GPIO20 T5

GPIO19 T4

GPIO18 R6

GPIO17 R5

GPIO16 R4

GPIO15 P6

GPIO14 P5

GPIO13 P4

GPIO12 N6

GPIO11 N5

GPIO10 N4

GPIO9 N3

GPIO8 M6

GPIO7 AC23

GPIO6 AC24

GPIO5 AE24

GPIO4 AD23

GPIO3 AE23

GPIO2 AC22

GPIO1 AD22

GPIO0 AE22

EB_CS3/GPIO64 M25

EB_CS2/GPIO79 M24

EB_CS1/GPIO78 M23

EB_CS0/GPIO77 N23

EB_OE_N T27

EB_WE_N T28

EB_WAIT U27

EB_BE_N1 U26

EB_BE_N0 U28

EB_ADDR17/GPIO84 J22

EB_ADDR16/GPIO83 K22

EB_ADDR15/GPIO82 J23

EB_ADDR14 L26

EB_ADDR13 L27

EB_ADDR12 L25

EB_ADDR11 N26

EB_ADDR10 N27

EB_ADDR9 M26

EB_ADDR8 L28

EB_ADDR7 L24

EB_ADDR6 L23

EB_ADDR5 K28

EB_ADDR4 K27

EB_ADDR3 K26

EB_ADDR2 K25

EB_ADDR1 K24

EB_ADDR0 K23

EB_DATA15 V22

EB_DATA14 U22

EB_DATA13 T22

EB_DATA12 R22

EB_DATA11 P22

EB_DATA10 N22

EB_DATA9 M22

EB_DATA8 L22

EB_DATA7 T26

EB_DATA6 R28

EB_DATA5 R27

EB_DATA4 R26

EB_DATA3 P28

EB_DATA2 P27

EB_DATA1 P26

EB_DATA0 N28

R178

2.2K

R179

2.2K

R182

2.2K

R195

2.2K

R173

R175

X101

24MHz

4

GND_2 1X-TAL_1

2GND_1

3

X-TAL_2

FPGA_LVDS_INFO

D100

RCLAMP0502BA

OPT

SOC_RESET

R113

4.7K

MAIN & GPIO

1

A0’h

System Configuration

BOOT_MODE0

PLL SET[1:0] ==> Internal Pull-UP. N.C is high

00 : CPU clock(1056Mhz), Main0,1/2 DDR (792/792 Mhz)

01 : CPU clock(792Mhz), Main0,1/2 DDR (672/792 Mhz)

10 : CPU clock(1152Mhz), Main0,1/2 DDR (792/672 Mhz)

11 : CPU clock(984Mhz), Main0,1/2 DDR (792/792 Mhz)

I2C PULL UP

Write Protection

- Low : Normal Operation

- High : Write Protection

BOOT_MODE1

LG1152 B1

BOOT MODE

"11" or "01" : NOR

"10" : eMMC

"00" : NAND

NVRAM

Debug

MAIN Clock(24Mhz)

JTAG I/F FOR MAIN

Clock for LG1152

BackEnd 2

Pannel Resol

OPTIC I/F

FrontEnd 1

3D Depth IC

FrontEnd 2

CP BOX

BackEnd 1

DDR Size

Place to LVDS Wafer

For ISP

Delete PV

for DiiVA(China)

T2 Tuner

MODEL_OPT_1

MODEL_OPT_3

MODEL_OPT_9

MODEL_OPT_10

Enable

10

DDR Reserved

MODEL OPTION 8 is just for CP Box

It should not be appiled at MP

NON_3D_Depth_IC

1

NON_OPTIC

Support

OPTIC

LOW

0

0

Not Support

MODEL_OPT_6

MODEL_OPT_0

Zoran FRC

DDR_Default

MODEL_OPT_4

LG FRC3

FHD

S Tuner

1

0 1

CP BOX

Support

HIGH

Not Support

3D DEPTH

SoC

internal

FRC

Disable

3D_Depth_IC

MODEL_OPT_7

NO_FRC

UD

MODEL_OPT_5

Support

Not Support

MODEL_OPT_8

MODEL_OPT_2

Not Support

URSA5

Support

C2 Tuner

(For UD)

Place near Jack side

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

11/05/31

MDS62110213

M300 ATSC

MDS62110213

M301 ALBLOCK

MDS62110213

M302 ALBLOCK

MDS62110213

M303 ATSC

MDS62110213

M305 HEATSINK

MDS62110213

M304 HEATSINK

MDS62110213

M306

MDS62110213

M307

AVSS25_REF

+2.5V_NORMAL

VDD18

VDD33_USB

VDD33

VDD18

VDD18_LVTX

VDD18_LVRX

VDD18_MAIN_XTAL

VCC1.5V_DE

VCC1.5V_MAIN

VREF_M2

VREF_M0

VREF_M1

AVDD10_OSPREY

+0.9V_VDD

MAIN_XTAL

VDD33

VDD33_CVBS

VDD33_HDMI

VDD33_XTAL

VDD25_VSB

VDD25_CVBS

VDD25_REF

VDD25_COMP

VDD25_AUD

VDD25_LVTX

VDD18_A

AVDD10_DEMOD

AVDD10_VSB

AVDD10_LVTX

VDDC_XTAL

MAIN_XTAL

+2.5V_NORMAL

10uFC414

C406 0.1uF

C400 0.1uF

10uFC332

C402 0.1uF

L306

BLM18PG121SN1D

C350

0.1uF

10uFC307

L314

BLM18PG121SN1D

10uFC413

C348 0.1uF

VREF_M0

L316

BLM18PG121SN1D

+1.8V_NORMAL

C381 0.1uF

+1.5V_DDR

L315

BLM18PG121SN1D

VDD25_COMP

C409 0.1uF

10uFC341

10uFC375

C329 0.1uF

VDD25_LVTX

L304

BLM18PG121SN1D

L326

BLM18PG121SN1D

C410 0.1uF

VREF_M1

+3.3V_NORMAL

VDD33

VDD25_VSB

L318

BLM18PG121SN1D

10uFC396

+3.3V_NORMAL

C349 0.1uF

L317

BLM18PG121SN1D

10uFC378

C382 0.1uF

+1.0V_VDD

C388 0.1uF

VDDC_XTAL

C315 0.1uF

C377 0.1uF

VCC1.5V_MAIN

+1.8V_NORMAL

10uFC369

L321

BLM15BD121SN1

+1.8V_NORMAL

10uFC303

C390 0.1uF

AVDD10_OSPREY

10uFC422

C314 0.1uF

10uFC366

+2.5V_NORMAL

C423 0.1uF

R302

1K 1%

C370 0.1uF

C325 0.1uF

L323

BLM18PG121SN1D

C416 0.1uF

C337 0.1uF

C351

0.1uF

C317 0.1uF

VCC1.5V_MAIN

C321 0.1uF

10uFC397

C343 0.1uF

+2.5V_NORMAL

+3.3V_NORMAL

C334 0.1uF

+1.8V_NORMAL

C342 0.1uF

C318 0.1uF

VDD25_REF

VREF_M2

C333 0.1uF

AVSS25_REF

L312

BLM18PG121SN1D

C418 0.1uF

C345 0.1uF

L308

BLM18PG121SN1D

VDD18_A

+1.5V_DDR

R304

1K 1%

C324 0.1uF

VDD25_AUD

C336 0.1uF

C338 0.1uF

+0.9V_VDD

C393 0.1uF

10uFC415

VDD33_CVBS

C322 0.1uF

10uFC301

C306 0.1uF

C300

0.1uF

+1.0V_VDD

C327 0.1uF

AVDD10_DEMOD

10uFC302

C308

1000pF

C316 0.1uF

C310 0.1uF

+1.0V_VDD

C319 0.1uF

L302

BLM18PG121SN1D

AVDD10_LVTX

L303

BLM18PG121SN1D

C340 0.1uF

C311 0.1uF

10uFC312

L301

BLM18PG121SN1D

C404 0.1uF

VDD25_CVBS

L305

BLM18PG121SN1D

VDD18_LVTX

+0.9V_VDD

10uFC359

C391 0.1uF

10uFC421

C368 0.1uF

C394 0.1uF

C363

1000pF

L325

BLM18PG121SN1D

+0.9V_VDD

VDD18

+1.0V_VDD

R303

1K 1%

L319

BLM18PG121SN1D

10uFC398

C383 0.1uF

C346 0.1uF

+1.8V_NORMAL

C417 0.1uF

C353 0.1uF

VDD33_HDMI

L309

BLM18PG121SN1D

C384 0.1uF

L324

BLM18PG121SN1D

R300

1K 1%

C323 0.1uF

C419 0.1uF

C320 0.1uF

VCC1.5V_DE

C392 0.1uF

10uFC305

VCC1.5V_DE

C313 0.1uF

10uFC347

+1.0V_VDD

10uFC374

+3.3V_NORMAL

10uFC309

VDD33_XTAL

C411 0.1uF

10uFC379

10uFC395

C386 0.1uF

L313

BLM18PG121SN1D

+3.3V_NORMAL

+2.5V_NORMAL

C408 0.1uF

L310

BLM18PG121SN1D

+2.5V_NORMAL

C385 0.1uF

10uFC401

VCC1.5V_MAIN

R301

1K 1%

VDD33_USB

10uFC372

C403 0.1uF

VDD18_MAIN_XTAL

C399 0.1uF

10uFC371

R305

1K 1%

L300

BLM18PG121SN1D

C389 0.1uF

VDD18_LVRX

L320

BLM15BD121SN1

C362

1000pF

AVDD10_VSB

L322

BLM18PG121SN1D

MDS62110205

M308 GASKET_8.0X6.0X7.5H

MDS62110205

M310

OPT

MDS62110205

M311

ESD

C407 0.1uF

C405 0.1uF

OPT

C304 0.1uF

MDS62110205

M312

ESD

+0.9V_VDD

MDS62110205

M313

ESD

MDS62110205

M314

ESD

MDS62110206

M309

OPT

SMR-T-6-6.5-8

MDS62110205

M315

ESD

IC100

LG1152D-B1

VDD33_1

U8

VDD33_2

U9

VDD33_3

U10

VDD33_4

V8

VDD33_5

V9

VDD33_6

V10

AVDD33_USB_1

J21

AVDD33_USB_2

K21

AVDD33_BT_USB_1

AA10

AVDD33_BT_USB_2

AA11

VDD18_1

W18

VDD18_2

W19

VDD18_3

Y18

VDD18_4

Y19

VDD18_5

AG28

VDD18_6

AH27

VDD18_LTX_1

AA7

VDD18_LTX_2

AA8

VDD18_LTX_3

AA9

VDD18_LTX_4

AG1

VDD18_LVRX_1

AA12

VDD18_LVRX_2

AA13

VDD18_LVRX_3

AB12

VDD18_DISPPLL

J28

VDD18_DR3PLL

B28

VDD18_MAIN_XTAL

G22

VDD15_M2_1

F9

VDD15_M2_2

G8

VDD15_M2_3

G9

VDD15_M2_4

G10

VDD15_M2_5

G11

VDD15_M2_6

H8

VDD15_M2_7

H9

VDD15_M2_8

H10

VDD15_M2_9

H11

VDD15_M0_1

F22

VDD15_M0_2

G13

VDD15_M0_3

G14

VDD15_M0_4

G16

VDD15_M0_5

G17

VDD15_M0_6

G18

VDD15_M0_7

G19

VDD15_M0_8

G20

VDD15_M0_9

G21

VDD15_M0_10

H13

VDD15_M0_11

H14

VDD15_M0_12

H16

VDD15_M0_13

H17

VDD15_M0_14

H18

VDD15_M0_15

H19

VDD15_M0_16

H20

VDD15_M0_17

H21

VREF_M2_0

L4

VREF_M1_0

F13

VREF_M1_1

G12

VREF_M0_0

F14

VREF_M0_1

G15

VDDC10_OSPREY_1

L20

VDDC10_OSPREY_2

M20

VDDC10_OSPREY_3

M21

VDDC10_OSPREY_4

M27

VDDC10_OSPREY_5

M28

VDDC10_OSPREY_6

N20

VDDC10_OSPREY_7

N21

VDDC10_OSPREY_8

P20

VDDC10_OSPREY_9

P21

VDDC10_OSPREY_10

R20

VDDC10_OSPREY_11

R21

VDDC09_1

K8

VDDC09_2

K9

VDDC09_3

K10

VDDC09_4

K11

VDDC09_5

L8

VDDC09_6

L9

VDDC09_7

L10

VDDC09_8

L11

VDDC09_9

M8

VDDC09_10

M9

VDDC09_11

M10

VDDC09_12

M11

VDDC09_13

N8

VDDC09_14

N9

VDDC09_15

N10

VDDC09_16

N11

VDDC09_17

P8

VDDC09_18

P9

VDDC09_19

P10

VDDC09_20

P11

VDDC09_21

R8

VDDC09_22

R9

VDDC09_23

R10

VDDC09_24

R11

VDD09_LTX_1

Y7

VDD09_LTX_2

Y8

VDD09_LTX_3

AF1

AVDD09_DR3PLL

F28

VDDC_MAIN_XTAL

H22

SP_VQPS

AA19

GND_MAIN_XTAL

G23

GND_1

G7

GND_2

H7

GND_3

H12

GND_4

H15

GND_5

J7

GND_6

J8

GND_7

J9

GND_8

J10

GND_9

J11

GND_10

J12

GND_11

J13

GND_12

J14

GND_13

J15

GND_14

J16

GND_15

J17

GND_16

J18

GND_17

J19

GND_18

J20

GND_19

K7

GND_20

K12

GND_21 K13

GND_22 K14

GND_23 K15

GND_24 K16

GND_25 K17

GND_26 K18

GND_27 K19

GND_28 K20

GND_29 L7

GND_30 L12

GND_31 L13

GND_32 L14

GND_33 L15

GND_34 L16

GND_35 L17

GND_36 L18

GND_37 L19

GND_38 L21

GND_39 M7

GND_40 M12

GND_41 M13

GND_42 M14

GND_43 M15

GND_44 M16

GND_45 M17

GND_46 M18

GND_47 M19

GND_48 N7

GND_49 N12

GND_50 N13

GND_51 N14

GND_52 N15

GND_53 N16

GND_54 N17

GND_55 N18

GND_56 N19

GND_57 P7

GND_58 P12

GND_59 P13

GND_60 P14

GND_61 P15

GND_62 P16

GND_63 P17

GND_64 P18

GND_65 P19

GND_66 R7

GND_67 R12

GND_68 R13

GND_69 R14

GND_70 R15

GND_71 R16

GND_72 R17

GND_73 R18

GND_74 R19

GND_75 T7

GND_76 T8

GND_77 T9

GND_78 T10

GND_79 T11

GND_80 T12

GND_81 T13

GND_82 T14

GND_83 T15

GND_84 T16

GND_85 T17

GND_86 T18

GND_87 T19

GND_88 T20

GND_89 T21

GND_90 U7

GND_91 U11

GND_92 U12

GND_93 U13

GND_94 U14

GND_95 U15

GND_96 U16

GND_97 U17

GND_98 U18

GND_99 U19

GND_100 U20

GND_101 U21

GND_102 V11

GND_103 V12

GND_104 V13

GND_105 V14

GND_106 V15

GND_107 V16

GND_108 V17

GND_109 V18

GND_110 V19

GND_111 V20

GND_112 V21

GND_113 W7

GND_114 W8

GND_115 W9

GND_116 W10

GND_117 W11

GND_118 W12

GND_119 W13

GND_120 W14

GND_121 W15

GND_122 W16

GND_123 W17

GND_124 W20

GND_125 W21

GND_126 Y9

GND_127 Y10

GND_128 Y11

GND_129 Y12

GND_130 Y13

GND_131 Y14

GND_132 Y15

GND_133 Y16

GND_134 Y17

GND_135 Y20

GND_136 Y21

GND_137 AA14

GND_138 AA15

GND_139 AA16

GND_140 AA17

GND_141 AA18

GND_142 AA20

GND_143 AA21

GND_144 AB7

GND_145 AB10

GND_146 AB11

GND_147 AB13

GND_148 AB22

IC101

LG1152AN-B2

VDD33_1

P1

VDD33_2

P2

AVDD33_CVBS_1

P14

AVDD33_CVBS_2

R14

AVDD33_HDMI_1

F18

AVDD33_HDMI_2

H16

VDD33_XTAL

M16

VDD25_VSB

L15

VDD25_CVBS_2

R13

VDD25_CVBS_1

R12

VDD25_CVBS_3

V13

AVDD25_REF

P10

VDD25_COMP_3

R10

VDD25_COMP_1

P9

VDD25_COMP_2

R9

VDD25_COMP_4

V7

VDD25_AAD

J16

VDD25_AUD_1

P6

VDD25_AUD_2

P7

VDD25_AUD_3

V6

VDD25_LVTX_1

B18

VDD25_LVTX_2

G12

VDD25_LVTX_3

G13

VDD18_1

N1

VDD18_2

N2

VDDC10_1

G6

VDDC10_2

G7

AVDD10_CVBS

R15

AVDD10_VSB

K15

AVDD10_LVTX_1

D17

AVDD10_LVTX_2

D18

AVDD10_LLPLL

N7

VDDC_XTAL

L16

VQPS

G4

AVSS25_REF

N10

GND_XTAL

K16

GND_1

D16

GND_2

G5

GND_3

G8

GND_4

G9

GND_5

G10

GND_6

G11

GND_7

G14

GND_8

G15

GND_9

H4

GND_10

H5

GND_11

H6

GND_12

H7

GND_13

H8

GND_14

H9

GND_15

H10

GND_16

H11

GND_17

H12

GND_18

H13

GND_19

H14

GND_20

H15

GND_21

J4

GND_22

J5

GND_23

J6

GND_24

J7

GND_25 J8

GND_26 J9

GND_27 J10

GND_28 J11

GND_29 J12

GND_30 J13

GND_31 J14

GND_32 J15

GND_33 K4

GND_34 K5

GND_35 K6

GND_36 K7

GND_37 K8

GND_38 K9

GND_39 K10

GND_40 K11

GND_41 K12

GND_42 K13

GND_43 K14

GND_44 L4

GND_45 L5

GND_46 L6

GND_47 L7

GND_48 L8

GND_49 L9

GND_50 L10

GND_51 L11

GND_52 L12

GND_53 L13

GND_54 L14

GND_55 M4

GND_56 M5

GND_57 M6

GND_58 M7

GND_59 M8

GND_60 M9

GND_61 M10

GND_62 M11

GND_63 M12

GND_64 M13

GND_65 M14

GND_66 M15

GND_67 M17

GND_68 N4

GND_69 N5

GND_70 N6

GND_71 N8

GND_72 N9

GND_73 N11

GND_74 N12

GND_75 N13

GND_76 N14

GND_77 N15

GND_78 N16

GND_79 P3

GND_80 P4

GND_81 P5

GND_82 P13

GND_83 P15

GND_84 P16

GND_85 R3

GND_86 R16

GND_87 R17

GND_88 R18

GND_89 T13

GND_90 U13

ZD301

5V

ESD_LG1152

ZD300

5V

ESD_LG1152

10uFC326

MDS62110205

M317

ESD

MDS62110205

M318

ESD

MDS62110213

M321 ALBLOCK

MDS62110205

M322 GASKET_8.0X6.0X7.5H

MDS62110217

M320

ESD

MDS62110217

M316

ESD

MDS62110217

M319

ESD

MAIN POWER 3

LG1152

For secure BOOT OTP

Will be change to LOW for MP

Will be change to LOW for MP

For HDCP OTP

LG1152A

LG1152D

Max 40mA

Max 5900mA

Max 20mA

Max 256mA

Max 1mA

Max 100mA

Max 120mA

Max 6mA

Max 40mA

Max 93mA

Max 250mA

Max 50mA

Max 680mA

Max 1mA

Max 40mA

Max 340mA

Max 49mA

Max 12mA

+1.5V_Bypass Cap

Max 360mA

(18)

Max 31mA

Max 10mA

Max 1320mA

Max 35mA

Max 28mA

Max 48.8mA

Max 250mA

Max 35mA

On Package Decap : 0.1uF *6ea

On Package Decap : 0.1uF *3ea

On Package Decap : 0.1uF *2ea

On Package Decap : 0.1uF *3ea

On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea

On Package Decap:0.1uF *1ea

On Package Decap : 0.1uF *1ea On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea

On Package Decap : 0.1uF *1ea On Package Decap : 0.1uF *1ea

On Package Decap:0.1uF *1ea

On Package Decap:0.1uF *1ea

For Tuner Sensitivity / Under DDR

For Tuner Sensitivity / Under TUNER

For ATSC

For HeatSinK, AL Block / SMD Top SMD Bottom SMD TOP FOR ESD

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

TPO_DATA[3]

TPI_DATA[0]

FE_TS_DATA[1]

TPO_DATA[0]

TPI_DATA[1]

TPO_DATA[7]

FE_TS_DATA[3]

TPO_DATA[4]

TPI_DATA[5]

TPI_DATA[6]

TPO_DATA[2]

TPI_DATA[7]

TPO_DATA[1]

TPO_DATA[6]

TPI_DATA[2]

TPI_DATA[3]

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[0]

FE_TS_DATA[7]

TPI_DATA[4]

TPO_DATA[5]

FE_TS_DATA[2]

R522 10K EU

SC_SOG_IN

C502 2.2uF

EU

AUD_LRCH

C541 0.047uF

R544

100

AUAD_L_CH4_IN

R524

2.7K

EU

C557 0.047uF

SC_G

R566 0

AUAD_L_CH5_IN

R555

10K

AUD_SCK

C554 0.047uF

DSUB_HSYNC

AUAD_R_CH5_IN

C542 0.047uF

AV1_R_IN

SC_B

C556 0.047uF

C501 2.2uF

SC_ID

AV1_CVBS_IN

SC_FB

AUAD_L_CH3_IN

COMP1_Pb

TU_CVBS

R579 22

SC_CVBS_IN

CHB_CVBS

AUAD_R_CH3_IN

DSUB_VSYNC

C500 2.2uF

R545

100

C550 0.047uF

C544 1000pF

R543

100

R580 22

C539 0.047uF

R553

10K

C555 0.047uF

AUD_LRCK

C506

680pF

OPT

C504 2.2uF

R569 33

R570 33

R524-*1

0

NON SCART

AUD_MASTER_CLK

SC_R

C545 0.047uF

AUAD_R_CH4_IN

C505 2.2uF

C549 0.047uF

R528 75

C540 1000pF

C517

680pF

OPT

C551 0.047uF

AV1_L_IN

C503 2.2uF

EU

C553 0.047uF

C543 0.047uF

R568 33

R542100

SC_SOG_IN

R529 75

C552 0.047uF

R614

75

1%

R615

75

1%

R613

75

1%

OPT

R525

75

EU

R525-*1

0

NON SCART

R594 75

R600 75

R595 75

R608

470K

EU

L510

EU

R602

470K

EU

L507

EU

SC_L_IN

SC_R_IN

C575

100pF

50V

C573

560pF

50V

OPT

R607

470K

R601

470K

L506

C581

560pF

50V

OPT

C587

100pF

50V

L509

PC_L_IN

PC_R_IN

C579

10pF OPT

R605 75

1%

C580

10pF OPT

R604 75

1%

C578

10pF OPT

R606 75

1%

COMP1_Y

COMP1_Pr

C589

100pF

50V

R603

470K

R609

470K

C574

560pF

50V

OPT

L508

C586

560pF

50V

OPT

L511

C577

100pF

50V

C572

330pF

50V

OPT

C576

330pF

50V

EU

C582

330pF

50V

OPT

C588

330pF

50V

EU

+5V_TU

R618

220

CHB

R616

220CHB

R617

75

OPT

C524

10pF OPT

C546

10pF OPT

DSUB_VSYNC

C3626

5pF

50V

OPT

C3625

5pF

50V

OPT R3633

2K

OPT DSUB_HSYNC

R3634

2K

OPT

SC_FB

TU_CVBS

DTV/MNT_V_OUT

TUNER_SIF

SCART_Lout

SC_R

SC_G

SC_L_IN

SC_ID

TUNER_SIF

CHB_CVBS

SCART_Rout

SC_R_IN

SC_B

ATV_OUT

SC_CVBS_IN

R571 33

R572 33

R575 33

R551 33

R557 33

R558 68

R559 68

R539 33

SOC_TXB2N

SOC_TXB0N

R547 0

SOC_TXB3N

+3.3V_NORMAL

SOC_TXB3P

HDMI_CLK+

HDMI_RX2+

DSUB_G+

R560 33

AUAD_R_CH3_IN

PWM_DIM

AUDA_OUTR

R630 100

SOC_TXA3N

XO_SUB

TPI_SOP

SOC_TXA3P

SOC_TXA2P

SOC_RESET

SOC_TXB2P

R563 0

EU

DSUB_B+

SOC_TXB4N

HDMI_CLK-

TPI_DVB_ERR

TPO_ERR

AUDA_OUTL

R629 47

SOC_TXA4P

AUAD_L_CH4_IN

C523 0.047uF

C518 0.047uF

FE_TS_SYNC

SOC_TXBCLKP

TPO_CLK

DSUB_R+

10uFC535

R598 47

OPT

R59622

SOC_TXA1N

C527 1000pF

+3.3V_NORMAL

R578 4.7K

BPL_IN

AUAD_R_CH5_IN

XIN_SUB

C532 0.047uF

SOC_TXB0P

SOC_TXA2N

HDMI_RX0+

R577 4.7K

SOC_TXB1N

FE_TS_CLK

R59722

SOC_TXA0P

C558

1000pF

OPT

AUAD_R_CH4_IN

AUAD_L_CH5_IN

HDMI_RX1-

DTV/MNT_VOUT

FE_TS_DATA[0-7]

C531 0.047uF

SOC_TXA1P

TPO_DATA[0-7]

R561 33

TPI_ERR

C515

100pF

50V

EU

TPO_SOP

C533 0.1uF

XO_SUB

SOC_TXB1P

XIN_SUB

SPDIF_OUT

R536 68

C534 0.1uF

TPI_CLK

SOC_TXACLKP

R541 68

R546 33

SOC_TXA0N

HDMI_RX0-

R535

1M

SOC_TXA4N

FE_TS_VAL

TPI_DATA[0-7]

R550 33

SOC_TXB4P

SOC_TXACLKN

C526 0.047uF HDMI_RX1+

A_DIM

SOC_TXBCLKN

R619 47

OPT

C516 0.047uF

AUAD_L_CH3_IN

SPDIF_OUT_ARC

TPI_VAL

HDMI_RX2-

TPO_VAL

R548 68

R518 75K

R516 75K

EU

R514 75K

R519 100K

R517 100K

EU

R515 100K

R530 75

C538 0.047uF

R633 100 PWM_DIM2

R632 100

EDGE_LED

C115 0.1uF

R200

47CHB

IF_AGC

C117 0.1uF

H/NIM&CHB

AR102

47CHB

IF_P

CHB_SYNC

IF_N

CHB_ERR

IF_AGC

IF_N

CHB_VAL

IF_P

CHB_CLK

CHB_DATA

C116 0.1uF

H/NIM&CHB

TUNER_SIF

C559

2.2uF

OPT

JDVR_SCLK

CHB_ERR

TPO_DATA[0-7]

TPI_SOP

TPO_CLK

TPI_ERR

CHB_DATA

TPO_SOP

TPO_VAL

TPI_CLK

TPI_DATA[0-7]

TPO_ERR

CHB_VAL

TPI_VAL

R631 10K

OPT

TPI_DVB_ERR

FE_TS_SYNC

FE_TS_DATA[0-7]

FE_TS_CLK

FE_TS_VAL

R582 33

R581 33

R9112

33

R583 33

SCART_Lout_SOC

JDVR_SCLK

SCART_Rout_SOC

R507

10K

EU

+5V_NORMAL

Q504

MMBT3906(NXP)

EU

E

B

C

DTV/MNT_V_OUT

DTV_ATV_SELECT

C510

0.1uF

16V

EU

R593

220

EU

R592

220

EU

R527

10K

EU

ATV_OUT

Q506

MMBT3904(NXP)

EU

E

B

C

IC500

NLASB3157DFT2G

EU

3B0

2GND

4

A

1B1

6

SELECT

5

VCC

+5V_NORMAL

R599

75 OPT

DTV/MNT_VOUT

C5472.2uF

C5482.2uF

C5372.2uF

C536 2.2uF

C605

10pF OPT

C606

10pF OPT

C607

10pF OPT

C528

10pF OPT

FRC3_FLASH_WP

R531 22K

EU

C520 0.01uF

EU

R532 22K

EU

C521 0.01uF

EU

R501100

EU R502100

EU

SCART_Rout

SCART_Lout

SCART_Rout_SOC

SCART_Lout_SOC

R552

100K

EU

+12V

C525

2.2uF

10V

EU

R554

100K

EU

R538

100K

EU

C522

2.2uF

10V

EU

R549

100K

EU

Q505

CHB

E

B

C

AMP_RESET_N

R628 22

OPT

C630

82pF

50V

R576100

EU

C529

220pF

50V

R556 33 USB_CTL2

HP_ROUT_MAIN

HP_LOUT_MAIN

R626

22K

AUDA_OUTL

C604

0.01uF

R627

22K

AUDA_OUTR

R625

100

C603

0.01uF

R624

100

R574 100

R573 100

OPTIC_GPIO1

OPTIC_BACK_CHANNEL

OPTIC_GPIO1

OPTIC_BACK_CHANNEL

L501

L500

L502

D500

5.5V

OPT

D501

5.5V

OPT

D502

5.5V

OPT

IC101

LG1152AN-B2

XIN_SUB

L17

XO_SUB

L18

VSB_AUX_XIN

P17

XTLIN_AAD

K17

XTLOUT_AAD

K18

OPM1

M2

OPM0

M1

PORES_N

R4

L9A_SCL

N3

L9A_SDA

M3

CVBS_IN1

U14

CVBS_IN2

T14

CVBS_IN3

V15

CVBS_VCM

U15

CVBS_IN4

T15

CVBS_IN5

U16

CVBS_IN6

V14

CB_IN

T16

CB_VCM

V16

BUF_OUT1

V17

BUF_OUT2

U17

HSYNC

P8

VSYNC

R8

SC1_FB

P11

SC1_SID

R11

BINCOM_IN

U8

B_IN

V8

G_IN

T8

SOG_IN

V9

R_IN

U9

GINCOM_IN

V10

PB1_IN

T9

Y1_IN

U10

SOY1_IN

T10

PR1_IN

V11

RINCOM_IN

T11

PB2_IN

U11

Y2_IN

V12

SOY2_IN

U12

PR2_IN

T12

AAD_ADC_SIFM N17

AAD_ADC_SIF N18

AUDA_BGR_OUT U1

AUDA_OUTL R1

AUDA_OUTR R2

AUD_SCART0_OUTLN T1

AUD_SCART0_OUTLP V2

AUD_SCART0_OUTRN U2

AUD_SCART0_OUTRP T2

AUAD_L_CH5_IN U3

AUAD_R_CH5_IN V3

AUAD_L_CH4_IN V4

AUAD_R_CH4_IN T3

AUAD_L_CH3_IN U5

AUAD_R_CH3_IN T5

AUAD_L_CH2_IN U6

AUAD_R_CH2_IN T6

AUAD_L_CH1_IN U7

AUAD_R_CH1_IN T7

AUAD_REFN T4

AUAD_REFP U4

AUAD_VR_OUT V5

AUMI_BIAS R7

AUMI_IN R5

AUMI_COM R6

DDCD0_DA E18

DDCD0_CK E17

HPD0 E16

PHY0_RXCN_0 J18

PHY0_RXCP_0 J17

PHY0_RX0N_0 H17

PHY0_RX0P_0 H18

PHY0_RX1N_0 G17

PHY0_RX1P_0 G18

PHY0_RX2N_0 G16

PHY0_RX2P_0 F16

PHY0_ARC_OUT_0 F17

ANTCON P12

RFAGC M18

IFAGC P18

ADC_I_INCOM T17

ADC_I_INP U18

ADC_I_INN T18

IC101

LG1152AN-B2

INTR_GBB L1

INTR_HDMI1 L2

INTR_AFE3CH L3

AUD_HMR00ARC K1

AUD_HMR0AMUTE K2

AUD_HMR0ALRCK J2

AUD_HMR0ABCK J3

AUD_HMR0ASD4 K3

AUD_HMR0ASD3 H1

AUD_HMR0ASD2 H2

AUD_HMR0ASD1 H3

AUD_HMR0ASD0 J1

AUD_DAC1_LRCH G1

AUD_DAC1_SCK G2

AUD_DAC1_LRCK G3

AUD_FS25CLK B1

AUD_FS24CLK C1

AUD_FS23CLK A4

AUD_FS21CLK B4

AUD_FS20CLK C4

AUDCLK_OUT_SUB A2

AUD_DAC0_LRCK D1

AUD_DAC0_LRCH D2

AUD_DAC0_SCK E2

AUD_ADC_LRCH E1

AUD_ADC_SCK F1

AUD_ADC_LRCK F2

AUD_MIC_LRCH B2

AUD_MIC_SCK A3

AUD_MIC_LRCK C2

BB_TP_DATA0 B3

BB_TP_DATA1 C3

BB_TP_DATA2 D3

BB_TP_DATA3 E3

BB_TP_DATA4 F3

BB_TP_DATA5 D4

BB_TP_DATA6 E4

BB_TP_DATA7 F4

BB_TP_VAL D5

BB_TP_SOP E5

BB_TP_ERR F5

BB_TP_CLK D6

BB_SDA_I A5

BB_SDA_O B5

BB_SCL C5

L9DA_SCL A6

L9DA_SDA_I B6

L9DA_SDA_O C6

CHB_DN E6

CHB_UP F6

CHB_START D7

CHB_DATA0 B7

CHB_DATA1 C7

CHB_DATA2 A8

CHB_DATA3 B8

CHB_DATA4 C8

CLK_F54M A7

CVBS_GC2 D8

CVBS_GC1 F7

CVBS_GC0 E7

CVBS_UP E8

CVBS_DN F8

FS00CLK A9

AUDCLK_OUT B9

DAC_DATA0 C9

DAC_DATA1 D9

DAC_DATA2 E9

DAC_DATA3 F9

DAC_DATA4 C10

DAC_START D10

AAD_GC0 E10

AAD_GC1 F10

AAD_GC2 D11

AAD_GC3 E11

AAD_GC4 F11

AAD_DATAEN D12

AAD_DATA0 E12

AAD_DATA1 F12

AAD_DATA2 D13

AAD_DATA3 E13

AAD_DATA4 F13

AAD_DATA5 D14

AAD_DATA6 E14

AAD_DATA7 F14

AAD_DATA8 D15

AAD_DATA9 E15

DCO_OUT_CLK F15

HSR_AM0 B10

HSR_AP0 A10

HSR_BM0 A11

HSR_BP0 B11

HSR_CM0 C12

HSR_CP0 C11

HSR_CLKM0 B12

HSR_CLKP0 A12

HSR_DM0 A13

HSR_DP0 B13

HSR_EM0 C14

HSR_EP0 C13

HSR_AM1 B14

HSR_AP1 A14

HSR_BM1 A15

HSR_BP1 B15

HSR_CM1 C16

HSR_CP1 C15

HSR_CLKM1 B16

HSR_CLKP1 A16

HSR_DM1 A17

HSR_DP1 B17

HSR_EM1 C18

HSR_EP1 C17

IC100

LG1152D-B1

INTR_GBB

AH2

INTR_HDMI1

AG2

INTR_AFE3CH

AF2

AUD_HMR0ARC

AH3

AUD_HMR0AMUTE

AG3

AUD_HMR0ALRCK

AG4

AUD_HMR0ABCK

AF4

AUD_HMR0ASD4

AF3

AUD_HMR0ASD3

AH5

AUD_HMR0ASD2

AG5

AUD_HMR0ASD1

AF5

AUD_HMR0ASD0

AH4

AUD_DAC1_LRCH

AH6

AUD_DAC1_SCK

AG6

AUD_DAC1_LRCK

AF6

AUD_FS25CLK

AH7

AUD_FS24CLK

AG7

AUD_FS23CLK

AH10

AUD_FS21CLK

AG10

AUD_FS20CLK

AF10

AUDCLK_OUT_SUB

AH8

AUD_DAC0_LRCK

AF7

AUD_DAC0_LRCH

AE8

AUD_DAC0_SCK

AD8

AUD_ADC_LRCH

AE7

AUD_ADC_SCK

AD7

AUD_ADC_LRCK

AC8

AUD_MIC_LRCH

AG8

AUD_MIC_SCK

AH9

AUD_MIC_LRCK

AF8

BB_TPI_DATA0

AG9

BB_TPI_DATA1

AF9

BB_TPI_DATA2

AE9

BB_TPI_DATA3

AD9

BB_TPI_DATA4

AC9

BB_TPI_DATA5

AE10

BB_TPI_DATA6

AD10

BB_TPI_DATA7

AC10

BB_TPI_VAL

AE11

BB_TPI_SOP

AD11

BB_TPI_ERR

AC11

BB_TPI_CLK

AE12

BB_SDA_I

AH11

BB_SDA_O

AG11

BB_SCL

AF11

HS_SCL

AH12

HS_SDA_I

AG12

HS_SDA_O

AF12

CHB_DN

AD12

CHB_UP

AC12

CHB_START

AE13

CHB_DATA0

AG13

CHB_DATA1

AF13

CHB_DATA2

AH14

CHB_DATA3

AG14

CHB_DATA4

AF14

CLK_54

AH13

CVBS_GC2

AE14

CVBS_GC1

AC13

CVBS_GC0

AD13

CVBS_UP

AD14

CVBS_DN

AC14

FS00CLK

AH15

AUDCLK_TO_DIGITAL

AG15

DAC_DATA0

AF15

DAC_DATA1

AE15

DAC_DATA2

AD15

DAC_DATA3

AC15

DAC_DATA4

AF16

DAC_START

AE16

AAD_GC0

AD16

AAD_GC1

AC16

AAD_GC2

AE17

AAD_GC3

AD17

AAD_GC4

AC17

AAD_DATAEN

AE18

AAD_DATA0

AD18

AAD_DATA1

AC18

AAD_DATA2

AE19

AAD_DATA3

AD19

AAD_DATA4

AC19

AAD_DATA5

AE20

AAD_DATA6

AD20

AAD_DATA7

AC20

AAD_DATA8

AE21

AAD_DATA9

AD21

AUPLL_CLK

AC21

HS_RX1_AM

AG16

HS_RX1_AP

AH16

HS_RX1_BM

AH17

HS_RX1_BP

AG17

HS_RX1_CM

AF18

HS_RX1_CP

AF17

HS_RX1_CLKM

AG18

HS_RX1_CLKP

AH18

HS_RX1_DM

AH19

HS_RX1_DP

AG19

HS_RX1_EM

AF20

HS_RX1_EP

AF19

HS_RX2_AM

AG20

HS_RX2_AP

AH20

HS_RX2_BM

AH21

HS_RX2_BP

AG21

HS_RX2_CM

AF22

HS_RX2_CP

AF21

HS_RX2_CLKM

AG22

HS_RX2_CLKP

AH22

HS_RX2_DM

AH23

HS_RX2_DP

AG23

HS_RX2_EM

AF24

HS_RX2_EP

AF23

STPI_CLK AE27

STPI_SOP AE26

STPI_VAL AD28

STPI_ERR AD27

STPI_DATA AD26

STPIO_CLK AC28

STPIO_SOP/GPIO43 AC26

STPIO_VAL/GPIO42 AB28

STPIO_ERR/GPIO41 AC27

STPIO_DATA/GPIO40 AB27

TPI_DVB_CLK/GPIO47 AF27

TPI_DVB_SOP/GPIO46 AE28

TPI_DVB_VAL/GPIO45 AG27

TPI_DVB_ERR AF28

TPI_DVB_DATA0/GPIO44 AG26

TPI_DVB_DATA1 AF26

TPI_DVB_DATA2 AF25

TPI_DVB_DATA3 AH26

TPI_DVB_DATA4 AH25

TPI_DVB_DATA5 AG25

TPI_DVB_DATA6 AH24

TPI_DVB_DATA7 AG24

TPI_CLK H24

TPI_SOP J25

TPI_VAL J24

TPI_ERR H25

TPI_DATA0 J27

TPI_DATA1 J26

TPI_DATA2 H28

TPI_DATA3 H27

TPI_DATA4 H26

TPI_DATA5 G28

TPI_DATA6 G27

TPI_DATA7 G26

TPO_CLK D24

TPO_SOP E23

TPO_VAL D25

TPO_ERR D23

TPO_DATA0 H23

TPO_DATA1 G25

TPO_DATA2 G24

TPO_DATA3 F25

TPO_DATA4 F24

TPO_DATA5 F23

TPO_DATA6 E25

TPO_DATA7 E24

AUDCLK_OUT C1

DACLRCH C2

DACSLRCH/GPIO95 A3

DACCLFCH/GPIO94 A2

DACSCK B2

DACLRCK B1

PCMI3LRCK/GPIO81 B3

PCMI3LRCH C3

PCMI3SCK/GPIO80 A4

IEC958OUT AE2

AUD_SUBMCK AD25

AUD_SUBLRCH AC25

AUD_SUBSCK/GPIO51 AD24

AUD_SUBLRCK/GPIO52 AE25

BTSCSEL AB18

DTS_EN AB19

TXA0N N1

TXA0P N2

TXA1N P2

TXA1P P1

TXA2N P3

TXA2P R3

TXACLKN R1

TXACLKP R2

TXA3N T2

TXA3P T1

TXA4N T3

TXA4P U3

TXB0N U1

TXB0P U2

TXB1N V2

TXB1P V1

TXB2N V3

TXB2P W3

TXBCLKN W1

TXBCLKP W2

TXB3N Y2

TXB3P Y1

TXB4N Y3

TXB4P AA3

PWM0/GPIO55 L6

PWM1/GPIO54 L5

PWM2/GPIO53 M4

PWM_IN M5

R521 100

R567 150

R564 150

R565 150

C512

8pF

C513

8pF

D504

5.5V

D506

5.5V

D503

5.5V

D505

5.5V

X500

24MHz

4

GND_2 1X-TAL_1

2GND_1

3

X-TAL_2

R534

10K

R52010K

L504 1uH

L503

EU

1uH

C509

150pF

EU

C508

150pF

50V

EU

C511

150pF

50V C514

150pF

50V

R512 13K

R511 13K

EU

R513 13K

R508 13K

R510 13K

EU

R509 13K

C6006

1uF25V

EU

R6006

10K

EU

C6001

1uF 25V

EU

R6005

10K

EU

SCART_AMP_R_FB

SCART_AMP_L_FB

3

MAIN AUDIO/VIDEO

LG1152 B0

Place these close to tuner

Place SOC Side

Place JACK Side

Close to LG1152A

Close to LG1152A

Main clock for LG1152A

DTS_EN: ENABLE(’1’) (for development)

LG1152A LG1152D

BTSC_EN: ENABLE(’1’) (for development)

Close to LG1152A

Selece = High ==> A = B1

Selece = Low ==> A = B0

Near Place Scart AMP

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SIGN50000

SIGN50005

M2_DDR_BA1

R738 240

M2_DDR_A3

M2_DDR_RESET_N

M2_DDR_VREFCA

M2_DDR_A10

M2_DDR_DQSL_N

M2_DDR_DQ6

M2_DDR_DMU

M2_DDR_DQ13

M2_DDR_A0

C744 10uF 10V

C739 0.1uF

M2_DDR_DQ8

M2_DDR_A6

M2_DDR_DQ7

C741 0.1uF

M2_DDR_DML

M2_DDR_A9

M2_DDR_DQSL_P

C742 0.1uF

M2_DDR_RASN

M2_DDR_DQ14

M2_DDR_A8

M2_DDR_DQ5

M2_DDR_ODT

M2_DDR_DQ2

C736 0.1uF

M2_DDR_DQ15

C740 0.1uF

M2_DDR_DQ0

M2_DDR_DQ1

M2_DDR_DQ10

M2_DDR_WEN

M2_DDR_A11

C738 0.1uF

M2_DDR_A4

M2_DDR_CASN

M2_DDR_DQ11

M2_DDR_A1

M2_DDR_DQ12

M2_DDR_A5

M2_DDR_DQ3

M2_DDR_A12

M2_DDR_CKE

M2_DDR_BA0

M2_DDR_DQ9

M2_DDR_DQSU_N

VCC1.5V_DE

M2_DDR_DQSU_P

M2_DDR_VREFDQ

M2_DDR_A13

C737 0.1uF

M2_DDR_A7

M2_DDR_BA2

M2_DDR_A2

C743 0.1uF

M2_DDR_DQ4

H5TQ1G63DFR-PBC

IC702

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC

N7

A13

T3

A15

M7

BA0

M2

BA1

N8

BA2

M3

CK

J7

CK

K7

CKE

K9

CS

L2

ODT

K1

RAS

J3

CAS

K3

WE

L3

RESET

T2

DQSL

F3

DQSL

G3

DQSU

C7

DQSU

B7

DML

E7

DMU

D3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

DQU0

D7

DQU1

C3

DQU2

C8

DQU3

C2

DQU4

A7

DQU5

A2

DQU6

B8

DQU7

A3

VREFCA M8

VREFDQ H1

ZQ L8

VDD_1 B2

VDD_2 D9

VDD_3 G7

VDD_4 K2

VDD_5 K8

VDD_6 N1

VDD_7 N9

VDD_8 R1

VDD_9 R9

VDDQ_1 A1

VDDQ_2 A8

VDDQ_3 C1

VDDQ_4 C9

VDDQ_5 D2

VDDQ_6 E9

VDDQ_7 F1

VDDQ_8 H2

VDDQ_9 H9

NC_1 J1

NC_2 J9

NC_3 L1

NC_4 L9

NC_6 T7

VSS_1 A9

VSS_2 B3

VSS_3 E1

VSS_4 G8

VSS_5 J2

VSS_6 J8

VSS_7 M1

VSS_8 M9

VSS_9 P1

VSS_10 P9

VSS_11 T1

VSS_12 T9

VSSQ_1 B1

VSSQ_2 B9

VSSQ_3 D1

VSSQ_4 D8

VSSQ_5 E2

VSSQ_6 E8

VSSQ_7 F9

VSSQ_8 G1

VSSQ_9 G9

C722 0.1uF

C721 0.1uF

C705 0.1uF

C704 0.1uF

C720 0.1uF

VCC1.5V_MAIN

M0_DDR_VREFCA

M0_DDR_VREFDQ VCC1.5V_MAIN

M0_1_DDR_VREFCA

M0_DDR_A5

R735

1K 1%

C751 0.1uF

C708 0.1uF

M1_DDR_DQSL_N

M0_DDR_BA0

VCC1.5V_MAIN

M0_DDR_RESET_N

M1_DDR_CKE

M0_DDR_RASN

M0_DDR_CLK

M1_DDR_DQSU_P

C707 0.1uF

M1_DDR_DQ1

R736

1K 1%

M1_DDR_DQ5

C735

0.1uF

M0_DDR_CLK

C733

0.1uF

R721

240

1%

C758 0.1uF

M1_DDR_A6

M0_DDR_A1

C715 0.1uF

M0_DDR_DQ3

C761 0.1uF

M1_DDR_A10

M1_DDR_A14

M0_DDR_A8

M1_DDR_A3

M1_DDR_BA0

C728

1000pF

VCC1.5V_MAIN

M1_DDR_DQ3

M0_DDR_DQSL_N

R730

1K 1%

M1_1_DDR_VREFDQ

C723 0.1uF

M1_DDR_A5

C729

1000pF

M0_1_DDR_VREFCA

M0_DDR_DMU

M0_DDR_CLKN

M0_DDR_ODT

M0_DDR_CLKN

M1_DDR_DQ10

M1_DDR_DQ2

M1_DDR_BA2

C752 0.1uF

M0_DDR_A9

C711 0.1uF

M1_DDR_DQSU_N

M0_DDR_A0

M1_DDR_RESET_N

M0_DDR_A11

M1_DDR_CLK

M1_DDR_VREFDQ

M0_DDR_BA1

M0_DDR_DQ12

M1_DDR_CASN

M1_DDR_A3

M0_DDR_DQ9

M1_DDR_A9

M0_DDR_DQ15

M0_DDR_A12

R727

1K 1%

M1_DDR_DQ4

M0_DDR_BA1

M1_DDR_A5

M0_DDR_A7

C748

1000pF

M0_DDR_CASN

C710 0.1uF

M1_DDR_DQ14

M1_DDR_A13

VCC1.5V_MAIN

M1_DDR_BA0

VCC1.5V_MAIN

M1_DDR_RESET_N

VCC1.5V_MAIN

M1_DDR_CKE

C732

0.1uF

VCC1.5V_MAIN

C724

0.1uF

M0_DDR_DQ6

M1_DDR_A12

M0_DDR_A10

R729

1K 1%

C745 0.1uF

R741

10K

C716 0.1uF

M0_1_DDR_VREFDQ

M1_DDR_DQ11

R737

1K 1%

C753 0.1uF

M1_DDR_A4

M0_DDR_RESET_N

M1_DDR_DML

M0_DDR_A11

R740

240

1%

M0_DDR_A4

M1_DDR_CASN

M0_DDR_CLK

M0_DDR_BA0

C717 0.1uF

M0_DDR_CLK

M1_DDR_DQ8

C709 0.1uF

R742

10K

M1_DDR_BA1

M1_DDR_CLK

R720

240

1%

C747

1000pF

M0_DDR_VREFDQ

M1_DDR_RESET_N

C749

1000pF

M0_DDR_BA2

M0_DDR_A10

M1_1_DDR_VREFCA

M1_DDR_DQ13

C757 0.1uF

R709

10K

R739

240

1%

M0_DDR_A13

M1_DDR_A2

M1_DDR_WEN

M0_DDR_DQSL_P

M1_DDR_BA2

M1_DDR_A7

M1_DDR_A0

M1_DDR_A6

M0_DDR_RASN

M0_DDR_WEN

M1_DDR_CKE

M1_DDR_A11

M1_DDR_DQ9

M0_DDR_DQ11M0_DDR_DQ7

M0_DDR_DQ10

M1_DDR_BA1

M1_DDR_DMU

M0_DDR_A14

VCC1.5V_MAIN

M1_DDR_A1

M0_DDR_CLKN

M0_DDR_A6

M1_DDR_CLKN

M1_DDR_DQ7

C731

1000pF

C719 0.1uF

M0_DDR_WEN

M0_DDR_ODT

M1_DDR_DQ0

C750

1000pF

C746 0.1uF

M1_DDR_DQ6

C730

1000pF

C718 0.1uF

C726

0.1uF

M0_DDR_A0

R734

1K 1%

R723

1K 1%

C706 0.1uF

M0_DDR_DQSU_P

M1_DDR_DQ12

M1_DDR_WEN

M0_DDR_A3

M1_DDR_ODT

M1_DDR_A2

R726

1K 1%

M0_DDR_DQ14

M0_DDR_A7

VCC1.5V_MAIN

R733

1K 1%

M0_DDR_A6

C727

0.1uF

M0_DDR_BA2

M0_DDR_VREFCA

M0_1_DDR_VREFDQ

VCC1.5V_MAIN

R710

10K

M1_DDR_CLKN C759 0.1uF

C734

0.1uF

M1_1_DDR_VREFCA

M1_DDR_A1

M1_DDR_DQSL_P

M1_DDR_RASN

M1_DDR_A13

M0_DDR_DQSU_N

M0_DDR_DQ0

M0_DDR_RESET_N

R731

1K 1%

M0_DDR_A14

M1_DDR_CLK

M1_DDR_CLKN

M1_DDR_A7

M1_DDR_A4

VCC1.5V_MAIN

M0_DDR_CASN

M0_DDR_A3

M1_DDR_A12 C714 0.1uF

M1_DDR_CLK

R732

1K 1%

R725

1K 1%

C713 0.1uF

M0_DDR_A8

M1_DDR_VREFCA

M0_DDR_DQ1

M1_DDR_A11

M1_1_DDR_VREFDQ

C725

0.1uF

M0_DDR_DQ8

M1_DDR_RASN

VCC1.5V_MAIN

M0_DDR_A4

M0_DDR_CKE

R722

1K 1%

M0_DDR_CKE

M1_DDR_A0

M1_DDR_A8

C760 0.1uF

M0_DDR_A5

M1_DDR_A10

C754 0.1uF

M0_DDR_A1

M1_DDR_VREFCA

M1_DDR_ODT

M1_DDR_A14

M0_DDR_CLKN

M0_DDR_A12

M0_DDR_DQ5

C712 0.1uF

VCC1.5V_MAIN

M1_DDR_A9

M1_DDR_VREFDQ

M0_DDR_A2

C755 0.1uF

R724

1K 1%

M0_DDR_A9

M1_DDR_A8

M1_DDR_CLKN

M0_DDR_DQ13

M0_DDR_A2

C756 0.1uF

R728

1K 1%

M0_DDR_A13

M0_DDR_DQ2

M0_DDR_DML

M0_DDR_CKE

M0_DDR_DQ4

M1_DDR_DQ15

M0_DDR_BA1

M1_DDR_A8

M1_DDR_DQ4

M1_DDR_DQSL_P

M1_DDR_A2

M1_DDR_A4

M0_DDR_DQ11

M0_DDR_DQ0

M1_DDR_DQ15

M1_DDR_DQ10

M1_DDR_DQSL_N

M0_DDR_DQ12

M0_DDR_A14

M0_DDR_A9

M1_DDR_BA0

M0_DDR_WEN

M0_DDR_RESET_N

M0_DDR_BA0

M0_DDR_DQ14

M0_DDR_CKE

M1_DDR_DQSU_P

M0_DDR_A1

M0_DDR_DQSU_N

M0_DDR_DQSL_P

M0_DDR_DML

M0_DDR_A6

M0_DDR_A7

M0_DDR_ODT

M1_DDR_A6

M1_DDR_WEN

M1_DDR_DQ6

M0_DDR_A2

M0_DDR_DQ2

M1_DDR_DQ8

M0_DDR_A5

M1_DDR_A10

M0_DDR_CLK

M1_DDR_DQ0

M0_DDR_DQ5

M1_DDR_A1

M1_DDR_A7

M1_DDR_A13

M0_DDR_A0

M0_DDR_A4

M1_DDR_DQ7

M1_DDR_CLKN

M0_DDR_DQ8

M1_DDR_ODT

M0_DDR_A12

M0_DDR_DQ9

M0_DDR_A3

M1_DDR_RESET_N

M0_DDR_DQ13

M1_DDR_A11

M1_DDR_RASN

M1_DDR_DQ13

M1_DDR_DQ9

M0_DDR_DQ7

M0_DDR_A13

M1_DDR_CASN

M1_DDR_A5

M0_DDR_A8

M1_DDR_DML

M1_DDR_BA1

M0_DDR_DQ1

R704

240

1%

M0_DDR_BA2

M0_DDR_RASN

M1_DDR_A0

M1_DDR_DQ1

M0_DDR_CASN

M0_DDR_A11

M1_DDR_DQ14

M1_DDR_DQ3

M1_DDR_A12

M1_DDR_DQ2

M0_DDR_DMU

M1_DDR_DQ5

M0_DDR_DQ6

M0_DDR_DQ3

M1_DDR_DQSU_N

M1_DDR_DQ11

M1_DDR_DQ12

M0_DDR_CLKN

M0_DDR_DQ10

M1_DDR_BA2

M1_DDR_CLK

M1_DDR_A3

M0_DDR_DQ15

M1_DDR_DMU

M1_DDR_A9

M1_DDR_A14

M0_DDR_DQ4

M0_DDR_DQSL_N

M1_DDR_CKE

M0_DDR_A10

M0_DDR_DQSU_P

M2_DDR_WEN

M2_DDR_A3

M2_DDR_DQ5

M2_DDR_A2

M2_DDR_DQ1

M2_DDR_CKE

M2_DDR_A12

M2_DDR_DQ6

M2_DDR_A1

M2_DDR_DQ7

M2_DDR_A11

M2_DDR_DQ11

M2_DDR_DQ3

M2_DDR_DQ4

M2_DDR_DQ9

M2_DDR_A13

M2_DDR_DQ14

M2_DDR_BA0

M2_DDR_CLK

M2_DDR_CLKN

M2_DDR_RASN

M2_DDR_DQSU_P

M2_DDR_BA1

M2_DDR_DML

M2_DDR_RESET_N

M2_DDR_DMU

M2_DDR_DQ13

M2_DDR_A5

M2_DDR_A9

M2_DDR_DQ2

M2_DDR_DQ10

M2_DDR_A10

M2_DDR_DQSL_P

M2_DDR_DQSL_N

M2_DDR_DQ8

M2_DDR_DQSU_N

M2_DDR_ODT

M2_DDR_DQ0

M2_DDR_DQ12

M2_DDR_A0

M2_DDR_A6

M2_DDR_CASN

M2_DDR_DQ15

R711

240

1%

M2_DDR_A8

M2_DDR_A7

M2_DDR_BA2

M2_DDR_A4

VCC1.5V_DE

R719

1K 1%

R712

1K 1%

R718

1K 1%

R743

10K

M2_DDR_VREFDQ

M2_DDR_CKE

C703

1000pF

M2_DDR_CLKN

M2_CLK

C700

0.1uF

R713

1K 1%

M2_CLKN

C701

1000pF

R714

10K

M2_DDR_CLK

M2_CLKN

M2_CLK

VCC1.5V_DE

C702

0.1uF

VCC1.5V_DE

M2_DDR_VREFCA

M2_DDR_RESET_N M2_CLK

M2_CLKN

H5TQ2G83BFR-PBC

IC700

NC_S1 A1

VSS_1 A2

VDD_1 A3

NC_1

A4

NF/TDQS

A8 VSS_2 A9

VDD_2 A10

NC_S2 A11

VSS_3 B2

VSSQ_1 B3

DQ0

B4

DM/TDQS

B8

VSSQ_2 B9

VDDQ_1 B10

VDDQ_2 C2

DQ2

C3

DQS

C4

DQ1

C8

DQ3

C9

VSSQ_3 C10

VSSQ_4 D2

DQ6

D3

DQS

D4

VDD_3 D8

VSS_4 D9

VSSQ_5 D10

VREFDQ E2

VDDQ_3 E3

DQ4

E4

DQ7

E8

DQ5

E9

VDDQ_4 E10

NC_2

F2

VSS_5 F3

RAS

F4

CK

F8

VSS_6 F9

NC_3

F10

ODT

G2

VDD_4 G3

CAS

G4

CK

G8

VDD_5 G9

CKE

G10

NC_4

H2

CS

H3

WE

H4

A10/AP

H8

ZQ H9

NC_5

H10

VSS_7 J2

BA0

J3

BA2

J4

NC_6

J8

VREFCA J9

VSS_8 J10

VDD_6 K2

A3

K3

A0

K4

A12/BC

K8

BA1

K9

VDD_7 K10

VSS_9 L2

A5

L3

A2

L4 A1

L8

A4

L9

VSS_10 L10

VDD_8 M2

A7

M3

A9

M4

A11

M8

A6

M9

VDD_9 M10

NC_S3 N1

VSS_11 N2

RESET

N3

A13

N4

A14

N8

A8

N9

VSS_12 N10

NC_S4 N11

H5TQ2G83BFR-PBC

IC703

NC_S1 A1

VSS_1 A2

VDD_1 A3

NC_1

A4

NF/TDQS

A8 VSS_2 A9

VDD_2 A10

NC_S2 A11

VSS_3 B2

VSSQ_1 B3

DQ0

B4

DM/TDQS

B8

VSSQ_2 B9

VDDQ_1 B10

VDDQ_2 C2

DQ2

C3

DQS

C4

DQ1

C8

DQ3

C9

VSSQ_3 C10

VSSQ_4 D2

DQ6

D3

DQS

D4

VDD_3 D8

VSS_4 D9

VSSQ_5 D10

VREFDQ E2

VDDQ_3 E3

DQ4

E4

DQ7

E8

DQ5

E9

VDDQ_4 E10

NC_2

F2

VSS_5 F3

RAS

F4

CK

F8

VSS_6 F9

NC_3

F10

ODT

G2

VDD_4 G3

CAS

G4

CK

G8

VDD_5 G9

CKE

G10

NC_4

H2

CS

H3

WE

H4

A10/AP

H8

ZQ H9

NC_5

H10

VSS_7 J2

BA0

J3

BA2

J4

NC_6

J8

VREFCA J9

VSS_8 J10

VDD_6 K2

A3

K3

A0

K4

A12/BC

K8

BA1

K9

VDD_7 K10

VSS_9 L2

A5

L3

A2

L4 A1

L8

A4

L9

VSS_10 L10

VDD_8 M2

A7

M3

A9

M4

A11

M8

A6

M9

VDD_9 M10

NC_S3 N1

VSS_11 N2

RESET

N3

A13

N4

A14

N8

A8

N9

VSS_12 N10

NC_S4 N11

H5TQ2G83BFR-PBC

IC704

NC_S1 A1

VSS_1 A2

VDD_1 A3

NC_1

A4

NF/TDQS

A8 VSS_2 A9

VDD_2 A10

NC_S2 A11

VSS_3 B2

VSSQ_1 B3

DQ0

B4

DM/TDQS

B8

VSSQ_2 B9

VDDQ_1 B10

VDDQ_2 C2

DQ2

C3

DQS

C4

DQ1

C8

DQ3

C9

VSSQ_3 C10

VSSQ_4 D2

DQ6

D3

DQS

D4

VDD_3 D8

VSS_4 D9

VSSQ_5 D10

VREFDQ E2

VDDQ_3 E3

DQ4

E4

DQ7

E8

DQ5

E9

VDDQ_4 E10

NC_2

F2

VSS_5 F3

RAS

F4

CK

F8

VSS_6 F9

NC_3

F10

ODT

G2

VDD_4 G3

CAS

G4

CK

G8

VDD_5 G9

CKE

G10

NC_4

H2

CS

H3

WE

H4

A10/AP

H8

ZQ H9

NC_5

H10

VSS_7 J2

BA0

J3

BA2

J4

NC_6

J8

VREFCA J9

VSS_8 J10

VDD_6 K2

A3

K3

A0

K4

A12/BC

K8

BA1

K9

VDD_7 K10

VSS_9 L2

A5

L3

A2

L4 A1

L8

A4

L9

VSS_10 L10

VDD_8 M2

A7

M3

A9

M4

A11

M8

A6

M9

VDD_9 M10

NC_S3 N1

VSS_11 N2

RESET

N3

A13

N4

A14

N8

A8

N9

VSS_12 N10

NC_S4 N11

H5TQ2G83BFR-PBC

IC701

NC_S1 A1

VSS_1 A2

VDD_1 A3

NC_1

A4

NF/TDQS

A8 VSS_2 A9

VDD_2 A10

NC_S2 A11

VSS_3 B2

VSSQ_1 B3

DQ0

B4

DM/TDQS

B8

VSSQ_2 B9

VDDQ_1 B10

VDDQ_2 C2

DQ2

C3

DQS

C4

DQ1

C8

DQ3

C9

VSSQ_3 C10

VSSQ_4 D2

DQ6

D3

DQS

D4

VDD_3 D8

VSS_4 D9

VSSQ_5 D10

VREFDQ E2

VDDQ_3 E3

DQ4

E4

DQ7

E8

DQ5

E9

VDDQ_4 E10

NC_2

F2

VSS_5 F3

RAS

F4

CK

F8

VSS_6 F9

NC_3

F10

ODT

G2

VDD_4 G3

CAS

G4

CK

G8

VDD_5 G9

CKE

G10

NC_4

H2

CS

H3

WE

H4

A10/AP

H8

ZQ H9

NC_5

H10

VSS_7 J2

BA0

J3

BA2

J4

NC_6

J8

VREFCA J9

VSS_8 J10

VDD_6 K2

A3

K3

A0

K4

A12/BC

K8

BA1

K9

VDD_7 K10

VSS_9 L2

A5

L3

A2

L4 A1

L8

A4

L9

VSS_10 L10

VDD_8 M2

A7

M3

A9

M4

A11

M8

A6

M9

VDD_9 M10

NC_S3 N1

VSS_11 N2

RESET

N3

A13

N4

A14

N8

A8

N9

VSS_12 N10

NC_S4 N11

IC100

LG1152D-B1

M0_DDR_A0 D18

M0_DDR_A1 E17

M0_DDR_A2 E18

M0_DDR_A3 E20

M0_DDR_A4 E16

M0_DDR_A5 D20

M0_DDR_A6 F16

M0_DDR_A7 F19

M0_DDR_A8 E15

M0_DDR_A9 D19

M0_DDR_A10 D14

M0_DDR_A11 E14

M0_DDR_A12 D17

M0_DDR_A13 F18

M0_DDR_A14 D16

M0_DDR_BA0 F20

M0_DDR_BA1 D15

M0_DDR_BA2 F17

M0_DDR_CLK A17

M0_DDR_CLKN A18

M0_DDR_CKE F15

M0_DDR_ODT F21

M0_DDR_RASN D22

M0_DDR_CASN E21

M0_DDR_WEN D21

M0_DDR_RESET_N E19

M0_DDR_DQSL_P B20

M0_DDR_DQSL_N A20

M0_DDR_DQSU_P B16

M0_DDR_DQSU_N C16

M0_DDR_DML C19

M0_DDR_DMU C15

M0_DDR_DQ0 C20

M0_DDR_DQ1 B19

M0_DDR_DQ2 C21

M0_DDR_DQ3 B18

M0_DDR_DQ4 A21

M0_DDR_DQ5 C18

M0_DDR_DQ6 B21

M0_DDR_DQ7 A19

M0_DDR_DQ8 B17

M0_DDR_DQ9 C14

M0_DDR_DQ10 A16

M0_DDR_DQ11 B14

M0_DDR_DQ12 B15

M0_DDR_DQ13 A14

M0_DDR_DQ14 C17

M0_DDR_DQ15 A15

M0_DDR_ZQCAL E22

IC100

LG1152D-B1

M1_DDR_A0 C9

M1_DDR_A1 E9

M1_DDR_A2 F10

M1_DDR_A3 F12

M1_DDR_A4 F8

M1_DDR_A5 D11

M1_DDR_A6 E8

M1_DDR_A7 E11

M1_DDR_A8 E7

M1_DDR_A9 D10

M1_DDR_A10 C4

M1_DDR_A11 C5

M1_DDR_A12 D8

M1_DDR_A13 E10

M1_DDR_A14 C7

M1_DDR_BA0 E12

M1_DDR_BA1 F7

M1_DDR_BA2 D9

M1_DDR_CLK A9

M1_DDR_CLKN B9

M1_DDR_CKE D7

M1_DDR_ODT D13

M1_DDR_RASN C13

M1_DDR_CASN E13

M1_DDR_WEN D12

M1_DDR_RESET_N F11

M1_DDR_DQSL_P C12

M1_DDR_DQSL_N C11

M1_DDR_DQSU_P A7

M1_DDR_DQSU_N B7

M1_DDR_DML A11

M1_DDR_DMU C6

M1_DDR_DQ0 A12

M1_DDR_DQ1 B11

M1_DDR_DQ2 A13

M1_DDR_DQ3 C10

M1_DDR_DQ4 B12

M1_DDR_DQ5 A10

M1_DDR_DQ6 B13

M1_DDR_DQ7 B10

M1_DDR_DQ8 A8

M1_DDR_DQ9 B4

M1_DDR_DQ10 C8

M1_DDR_DQ11 B5

M1_DDR_DQ12 B6

M1_DDR_DQ13 A5

M1_DDR_DQ14 B8

M1_DDR_DQ15 A6

IC100

LG1152D-B1

M2_DDR_A0 D1

M2_DDR_A1 K4

M2_DDR_A2 D2

M2_DDR_A3 E5

M2_DDR_A4 H6

M2_DDR_A5 E4

M2_DDR_A6 J4

M2_DDR_A7 D6

M2_DDR_A8 J5

M2_DDR_A9 D3

M2_DDR_A10 H4

M2_DDR_A11 J6

M2_DDR_A12 K5

M2_DDR_A13 D4

M2_DDR_BA0 E6

M2_DDR_BA1 H5

M2_DDR_BA2 F4

M2_DDR_CLK M2

M2_DDR_CLKN M3

M2_DDR_CKE G6

M2_DDR_ODT F6

M2_DDR_RASN G5

M2_DDR_CASN G4

M2_DDR_WEN F5

M2_DDR_RESET_N D5

M2_DDR_DQSU_P H3

M2_DDR_DQSU_N J1

M2_DDR_DQSL_P H1

M2_DDR_DQSL_N H2

M2_DDR_DML K3

M2_DDR_DMU F2

M2_DDR_DQ0 F1

M2_DDR_DQ1 L1

M2_DDR_DQ2 E3

M2_DDR_DQ3 L2

M2_DDR_DQ4 E1

M2_DDR_DQ5 M1

M2_DDR_DQ6 E2

M2_DDR_DQ7 L3

M2_DDR_DQ8 J3

M2_DDR_DQ9 G1

M2_DDR_DQ10 K2

M2_DDR_DQ11 F3

M2_DDR_DQ12 J2

M2_DDR_DQ13 G2

M2_DDR_DQ14 K1

M2_DDR_DQ15 G3

M2_DDR_ZQCAL K6

R700 0

R701 0

R703 0

R702 0

R716 0

R717 0

R715

150

R705

200

R706

200

R708

200

R707

200

4MAIN DDR 50

LG1152 B0

DDR3 1.5V bypass Cap - Place these caps near Memory

DDR3

2Gbit

DDR3

2Gbit

DDR3

2Gbit

DDR3

2Gbit

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

CI_DATA[7]

EB_DATA[0]

CI_DATA[1]

CI_DATA[5]

CI_DATA[3]

CI_DATA[2]

CI_DATA[0-7]

CI_DATA[6]

EB_DATA[1]

EB_DATA[7]

CI_DATA[0]

EB_DATA[5]

EB_DATA[0-7]

EB_DATA[2]

EB_DATA[4]

EB_DATA[3]

CI_DATA[4]

EB_DATA[6]

TPO_DATA[3]

TPO_DATA[4]

TPO_DATA[0]

TPO_DATA[7]

TPO_DATA[1]

TPO_DATA[5]

TPO_DATA[6]

TPO_DATA[2]

CI_ADDR[9]

CI_DATA[1]

CI_IN_TS_DATA[6]

CI_ADDR[1]

CI_DATA[6]

CI_IN_TS_DATA[3]

CI_ADDR[5]

CI_ADDR[13]

CI_IN_TS_DATA[2]

CI_ADDR[8]

CI_ADDR[2]

CI_ADDR[3]

CI_ADDR[4]

CI_DATA[0]

CI_DATA[7]

CI_DATA[4]

CI_ADDR[12]

CI_ADDR[11]

CI_IN_TS_DATA[0]

CI_DATA[5]

CI_ADDR[14]

CI_DATA[3]

CI_DATA[2]

CI_ADDR[10]

CI_ADDR[0]

CI_IN_TS_DATA[1]

CI_ADDR[7]

CI_IN_TS_DATA[7]

CI_ADDR[6]

CI_IN_TS_DATA[4]

CI_IN_TS_DATA[5]

R913

0

OPT

CI_ADDR[13]

CI_ADDR[8]

CI_ADDR[7]

EB_ADDR[12]

/PCM_IOWR

EB_ADDR[0]

CI_ADDR[1]

EB_BE_N1

DIR

EB_ADDR[1]

CI_ADDR[11]

EB_ADDR[13]

CI_ADDR[9]

AR912

33

CI

AR913

33

CI

CI_ADDR[5]

CI_ADDR[2]

EB_OE_N

/PCM_OE

EB_ADDR[2]

EB_ADDR[10]

C903

0.1uF

16V

CI

/PCM_OE

AR915

33

CI

AR909

33

CI

EB_DATA[0-7]

CI_DATA[0-7]

+3.3V_NORMAL

EB_ADDR[6]

CI_ADDR[4]

/PCM_WE

EB_ADDR[5]

EB_ADDR[4]

EB_ADDR[8]

/PCM_IORD

AR911

33

CI

EB_ADDR[11]

EB_WE_N

EB_ADDR[3]

/PCM_IORD

CI_ADDR[0]

CI_ADDR[6]

IC904

74LVC245A

CI

3

A1

2

A0

4

A2

1

DIR

6

A4

5

A3

7

A5

8

A6

9

A7

10

GND 11 B7

12 B6

13 B5

14 B4

15 B3

16 B2

17 B1

18 B0

19 OE

20 VCC

CI_ADDR[14] EB_ADDR[14]

C904

0.1uF

16V

CI

EB_BE_N0

DIR

EB_ADDR[7]

+3.3V_NORMAL

CI_ADDR[12]

CI_ADDR[3] CAM_REG_N

EB_ADDR[9]

CI_ADDR[10]

AR914

33

CI

AR910

33

CI

/PCM_CE1

/PCM_REG

IC905

74LVC1G00GW

CI

3GND

2A

4 Y

1B 5 VCC

TPO_CLK

TPO_VAL

TPO_ERR

TPO_DATA[0-7]

TPO_SOP

/PCM_WE

/PCM_OE

PCM_INPACK

+5V_CI_ON

CI_TS_CLK

CI_ADDR[0]

CI_ADDR[10]

/PCM_IORD

/PCM_CE1

P6200

10067972-000LF CI

G1G2

57

TS_OUT_CLK

21 ADDR12

52

VPP

16 /IRQA

10 ADDR11

47

TS_IN0

41

TS_OUT7

5DAT6

36

/CI_DET1

59

CI_WAIT

23 ADDR6

45

IOWR

54

TS_IN5

18 VPP

49

TS_IN2

43

VS1

13 ADDR13

7/CARD_EN1

38

TS_OUT4

2DAT3

25 ADDR4

56

TS_IN7

20 TS_IN_CLK

51

VCC

15 /WR_EN

9/O_EN

46

TS_IN_SYN

40

TS_OUT6

4DAT5

35

GND

58

CI_RESET

22 ADDR7

53

TS_IN4

17 VCC

11 ADDR10

48

TS_IN1

42

CARD_EN2

12 ADDR8

6DAT6

37

TS_OUT3

1GND

24 ADDR5

55

TS_IN6

19 TS_IN_VAL

50

TS_IN3

44

IORD

14 ADDR14

8ADDR10

39

TS_OUT5

3DAT4

26 ADDR3

60

INPACK

27 ADDR2

61

REG

28 ADDR1

62

TS_OUT_VAL

29 ADDR0

63

TS_OUT_SYN

30 DAT0

64

TS_OUT0

31 DAT1

32 DAT2

33 /IO_BIT

34 GND

65

TS_OUT1

66

TS_OUT2

67

/CI_DET2

68

GND

69

CI_ADDR[8]

R6224 22

CI

CI_ADDR[14]

R6204

10K

OPT

/PCM_REG

CI_TS_DATA[1]

R6213 0

OPT

R6210 0

OPT

/PCM_IOWR

CI_ADDR[4]

R6211

10K

OPT

CI_TS_DATA[0]

/PCM_IRQA

/CI_CD1

CI_IN_TS_VAL

CI_TS_VAL CI_ADDR[1]

CI_ADDR[11]

PCM_INPACK

CI_VS1

C6201

10uF

10V

CI

CI_TS_DATA[3]

+5V_CI_ON

CI_TS_DATA[5]

R6243 22

OPT

R6249 0

OPT

CI_ADDR[9]

R6207

10K

CI

R6216 0

OPT

CI_TS_DATA[7]

+5V_CI_ON

/CI_CD2

R6208

10K

OPT

C6205 0.1uF

CI

CI_DATA[0-7]

R6205

10K

OPT

CI_TS_DATA[6]

R6206

10K

OPT

CI_TS_DATA[4]

CI_TS_SYNC

C6200

0.1uF

CI

R6209

10K

OPT

CI_TS_DATA[2]

CI_VS1

R6202 22 CI

+5V_CI_ON

R6203 22 CI

R6200 22 OPT

R6217 10K

OPT

CI_IN_TS_DATA[0-7]

CI_ADDR[7]

R6219

10K

OPT

+5V_CI_ON

CI_ADDR[3]

/PCM_CE2

R6245

10K

OPT

CI_ADDR[13]

+5V_CI_ON

R6212 0 CI

R6214 100

CI

R6246

10K

OPT

R6244

10K

CI

CI_ADDR[5]

/PCM_WAIT

CI_ADDR[2]

CI_ADDR[6]

R6215 100

CI

/PCM_CE2

CI_IN_TS_SYNC

PCM_RST

C6206

0.1uF

16V

CI

CI_IN_TS_CLK

CI_ADDR[12]

AR905 33

CI

AR903

33

CI

AR904 33

CI

CI_IN_TS_DATA[7]

CI_IN_TS_DATA[6]

CI_IN_TS_DATA[0]

CI_IN_TS_DATA[1]

CI_IN_TS_DATA[5]

CI_IN_TS_DATA[2]

CI_IN_TS_DATA[4]

CI_IN_TS_DATA[3]

CI_IN_TS_SYNC

CI_IN_TS_VAL

CI_IN_TS_CLK

TPI_DATA[7]

AR919

100

CI

CAM_CD1_N

CAM_INPACK_N

C905

0.1uF

16V

CI

CI_TS_DATA[7]

AR921

100

CI

PCM_INPACK

CI_TS_DATA[2]

CI_TS_SYNC

C900

0.1uF

16V

CI

TPI_VAL

CAM_IREQ_N

TPI_DATA[4]

TPI_DATA[5]

TPI_DATA[2]

CAM_WAIT_N

/PCM_WAIT

TPI_DATA[0]

TPI_SOP

AR917

75 CI

/CI_CD1

TPI_DATA[3]

CI_TS_DATA[1]

/CI_CD2

CI_TS_CLK

CI_TS_DATA[5]

R915

10K

CI

AR916 75 CI

/PCM_IRQA

CI_TS_VAL

CI_TS_DATA[4]

CI_TS_DATA[0]

CAM_CD2_N

TPI_DATA[6]

AR918 75

CI

TPI_CLK

R916

10K

CI

IC903

74LVC16244ADGG

CI

26

4A3

27

4A2

28

GND_5

29

4A1

30

4A0

31

VCC_3

32

3A3

33

3A2

34

GND_6

35

3A1

36

3A0

37

2A3

38

2A2

39

GND_7

40

2A1

41

2A0

42

VCC_4

43

1A3

44

1A2

45

GND_8

46

1A1

47

1A0

48

2OE

17 3Y4

31Y1

61Y3

16 3Y2

15 GND_3

14 3Y1

13 3Y0

12 2Y3

11 2Y2

10 GND_2

92Y1

82Y0

7VCC_1

4GND_1

51Y2

25

3OE 24 4OE

23 4Y3

21Y0

22 4Y2

21 GND_4

11OE

20 4Y1

19 4Y0

18 VCC_2

+3.3V_NORMAL

TPI_DATA[1]

C906

0.1uF

16V

CI

+5V_NORMAL

CI_TS_DATA[6]

AR920

100

CI

CI_TS_DATA[3]

AND GATE => NAND GATE

IOWE=>IORD

CI HOST I/F

5V <=> 3.3V

WE=>OE

BUFFER FOR 5V => 3.3V

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THERMAL

THERMAL

THERMAL

THERMAL

THERMAL

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

C2313

10uF

10V

C2315

0.1uF

16V

C2302

4.7uF

16V

+12V

+0.9V_VDD

C2348

4700pF 50V

POWER_ON/OFF2_3

R2342

330K1/16W 5%

R2305

10K

IC2307

NCP803SN293

1

GND

3

VCC 2RESET

PANEL_VCC

C2365

0.1uF

16V

L2317

1uH

L2310

BLM18PG121SN1D

+5V_NORMAL

RL_ON

INV_CTL

C2339

1uF

25V

OPT

+3.5V_ST

C2343

22uF

10V

+3.3V_NORMAL

+1.5V_DDR

C2360

0.1uF

16V

PD_24V

C2327

0.1uF

16V

L2307

CIS21J121

PWM_DIM2

R2311

10K

1%

C2301

4.7uF

10V

P2300

SMAW200-H24S2

19

12V

14 GND

9

3.5V

424V

18 INV ON

13

GND

8GND

3

24V

17

12V

12 3.5V

7

GND

224V

16 GND/V-sync

11

3.5V

6GND

1

PWR ON

20 A.DIM

15

GND

10 3.5V

5

GND

21

12V 22 P.DIM1

23

GND/P.DIM2 24 Err OUT

25

C2349

0.1uF

16V

PANEL_CTL

R2340

15K

1/16W 5%

R2341

10K

L2306

BLM18PG121SN1D

+3.5V_ST

+24V

C2363

22uF

10V

+3.3V_NORMAL

R2350

56K

1/16W

1%

L2308

C2306

0.1uF

50V

L2301

BLM18PG121SN1D

C2330

4700pF

50V

R2349

47K 1%

IC2308

NCP803SN293

PD_24V

1

GND

3

VCC 2RESET

C2336

1uF

10V

+3.3V_NORMAL

C2374

22000pF 50V

R2372

100K

PD_24V

R2376

10K

OPT

R2300

10K

A_DIM

C2317

0.1uF

50V

R2373

100K

C2373

47pF 50V

R2312

100

C2350

22uF

10V

2200pF

C2308

50V

+12V

R2334

10K

3.3V_EMMC

C2340

10uF

10V

+3.5V_ST

+1.8V_NORMAL

+1.8V_NORMAL

L2319

BLM18PG121SN1D

+2.5V_NORMAL

POWER_ON/OFF2_2

R2321

3.9K

1/16W

1%

EMMC_VCCQ

PWM_DIM

C2347

10uF

16V

C2370

10uF

10V

OPT

C2371

0.1uF

16V

R2314

3K

1%

L/DIM0_VS

C2346

0.1uF

50V

L2302

CIS21J121

L2311

CIS21J121

POWER_ON/OFF2_1

L2312

3.6uH

NR8040T3R6N

C2307

0.1uF

16V Q2304

MMBT3904(NXP)

E

B

C

R2357 1K

C2344

0.1uF

16V

C2341

0.1uF

16V

C2345

0.1uF

16V

R2381 0

1/16W

5%

C2332

10uF

16V

Q2301 MMBT3906(NXP)

1

2

3

+3.3V_TU_IN

POWER_DET

C2359

0.1uF

16V

L2314

BLM18PG121SN1D

C2337

22uF

10V

R2308

56K

1%

L2315 +0.9V_VDD

R2347

4.3K

1%

R2306

10K

+24V

POWER_ON/OFF2_3

C2320

10uF

10V

C2322

10uF

16V

2200pF

C2331

50V

C2326

0.01uF

50V

IC2304

TPS54327DDAR

3

VREG5

2

VFB

4

SS

1

EN

5GND

6SW

7VBST

8VIN

9

[EP]GND

+3.5V_ST

P2301

FW20020-24S

OPT

19

14

9

4

18

13

8

3

17

12

7

2

16

11

6

1

20

15

10

5

21 22

23 24

Q2305

AO3407A

G

D

S

R2348

10K

OPT

POWER_ON/OFF1

R2339

10K

R2330

1K

+3.5V_ST

C2372

0.1uF

16V

R2302

100

LPB

L2303

BLM18SG121TN1D

L2305

CIS21J121

C2334

100pF

50V

C2328

0.1uF

50V

+3.5V_ST

C2325

0.1uF

16V

C2338

100pF

50V

ERROR_OUT

+12V

+3.3V_TU

R2366

0

5%

PD_+3.5V

R2377

100K

1/16W

5%

C2335

0.1uF

50V

OPT

+12V

C2375

180pF

50V

R2315

100

1%

C2329

0.01uF

50V

+12V

+5V_NORMAL

C2333

22uF

10V

R2346

2K

1%

10uF

C2324

10V

C2342

2200pF

50V

L2313

6.8uH

NR8040T4R7N

R2362

2.7K

1%

PD_+12V

R2363

1.2K

1%

PD_+12V

R2364

8.2K

1%

PD_24V

R2365

1.5K

1%

PD_24V

C2314

10uF

10V

L2300

BLM18PG121SN1D

+12V

C2309

0.1uF

16V

OPT

C2312

10uF

10V

C2310

0.1uF

16V

R2320

10K

1%

R23160

OPT

L2304

2uH

C2300

10uF

16V

C2304

10uF

16V

C2353

3300pF

50V

OPT

C2352

10uF

10V

R2318

10K

C2316

10uF

10V

R2319

1.5K

1%

R2382

30K

1/16W

1%

+3.3V_NORMAL

POWER_ON/OFF2_1

C2318

1uF

10V

C2319

3300pF

50V

C2303

0.1uF

50V

+12V

C2305

0.1uF

OPT

R2309

100K

C2321

22pF

50V

OPT

L2316

2uH

C2369

22uF

10V

L2309

BLM18PG121SN1D

C2354

10uF

16V

C2368

22uF

10V

R2310 10K

POWER_ON/OFF2_3

R2317

20K

C2311

2200pF

50V

R2304

0

IC2301

AOZ1038PI

3

AGND

2

VIN

4

FB

1

PGND

5COMP

6EN

7NC_1

8NC_2

9

[EP]LX

IC2300

AP7173-SPG-13 HF(DIODES)

3

VCC

2

PG

4

EN

1

IN

5GND

6SS

7FB

8OUT

9

[EP]

IC2303

AP7173-SPG-13 HF(DIODES)

3

VCC

2

PG

4

EN

1

IN

5GND

6SS

7FB

8OUT

9

[EP]

IC2302

TPS54319TRE

1

VIN_1

3

GND_1

7

COMP

9SS/TR

10 PH_1

11 PH_2

12 PH_3

13 BOOT

14 PWRGD

15 EN

16 VIN_3

5

AGND

8

RT/CLK

6

VSENSE

4

GND_2

2

VIN_2 17

EP[GND]

IC2306

TPS54425PWPR

3VREG5

2VFB

4SS

1VO

6PG

5GND

7EN

8

PGND1

9

PGND2

10

SW1

11

SW2

12

VBST

13

VIN1

14

VIN2

15

[EP]PGND

D2350

ADUC 20S 02 010L

R2378

6.8K

1/16W

1%

R2322

22K

1%

+1.0VDC

IC2305

EAN62348501

3

GND_2

2

GND_1

4

PVIN_1

1

RT/CLK

6

VIN

5

PVIN_2

7

VSENSE 8COMP

9SS/TR

10 EN

11 PH_1

12 PH_2

13 BOOT

14 PWRGD

15

[EP]GND

R2343

33K

R2344

5.6K

R2307

1.3K

L2318

CIS21J121

OPT

R2301

10KPOWER_ON/OFF1

R2313

9.1K

1%

R2379

12K

1/16W

1%

POWER

LG1152

3A

R2

2

Switching freq: 700K

R1

R2

4

R1

Vout=0.827*(1+R1/R2)=1.521V

3A

+1.0V_VDD

1.5A

R2

4

R2

Max 5926 mA

Vout=0.765*(1+R1/R2)

R2

Tuner 1.25V REG Input

LG1152 Max: 1728 mA

1074 mA

not to RESET at 8kV ESD

+2.5V

1

PANEL_POWER

eMMC POWER

293 mA

$ 0.145

MAX 1A

R1

700 mA

Vout=0.8*(1+R1/R2)

3. soft start

R1

R1

ST_3.5V-->3.5V

Switching freq: 400 ~ 580 Khz

TYP 1450mA

+5V_Normal

24V-->3.48V

Vout=0.6*(1+R1/R2)

+1.8V

1

3A

DDR MAIN 1.5V

1.5A

MAX 4.7 A

12V-->3.58V

Power_DET

4

LG1132 Max: 2000 mA

Placed on SMD-TOP

R1

*NOTE 17

R2

Vout=0.8*(1+R1/R2)

+3.3V_NORMAL

4A

Vout=0.765*(1+R1/R2)

R1

R2

6A

Vout=0.8*(1+R1/R2)

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EEPROM_SCL

+3.5V_ST

GND

POWER_ON/OFF2_4

EDID_WP

R3023

4.7M

OPT

C3004

0.1uF

16V

R3009 10K

MICOM_JAPAN

MICOM_DEBUG

SW3000

JTP-1127WEM

MICOM_RESET_SW

12

4 3

R3027

270K

OPT

R3026 10K

PANEL_CTL

SOC_RX

POWER_ON/OFF1

IR

SIDE_HP_MUTE

INV_CTL

MICOM_RESET

POWER_ON/OFF2_3

MODEL1_OPT_1

MODEL1_OPT_3

LED_B/GP4_LED_R

AMP_MUTE

AMP_RESET_N

R3022 10K

R3006 10K

MICOM_LCD/OLED

MICOM_RESET

R3012 10K

MICOM_DIIVA

MODEL1_OPT_1

I2C_SCL3

KEY1

MODEL1_OPT_2

EXT_AMP_MUTE

I2C_SDA3

MODEL1_OPT_0

R3025 22

MICOM_DIIVA

+3.5V_ST

COMMERCIAL_12V_CTL

MODEL1_OPT_4

+3.5V_ST

MODEL1_OPT_0

SOC_RESET

12V_EXT_PWR_DET

R3007 10K

MICOM_TOUCH_KEY

POWER_ON/OFF2_1

R3008 10K

MICOM_TACT_KEY

R3010 10K

MICOM_NON_JAPAN

KEY2

SCART_MUTE

R3014 1K

MODEL1_OPT_4

+3.5V_ST

RL_ON

POWER_ON/OFF2_2

R3005 10K

MICOM_PDP

X3000

32.768KHz

R3024 22

MODEL1_OPT_3

EEPROM_SDA

MODEL1_OPT_2

HDMI_CEC

R3011 10K

MICOM_DEBUG

POWER_ON/OFF2_3

EXT_AMP_RESET

MICOM_DEBUG

C3000

0.1uF

SOC_TX

R3013 10K

MICOM_NON_DIIVA

POWER_DET

POWER_ON/OFF2_4

+3.5V_ST

HDMI_CEC

D3000

BAT54_SUZHO

R3029

120K

CEC_REMOTE

R3028

27K

+3.5V_ST

RUE003N02

Q3001

HDMI_CEC_FET_ROHM

S

D

G

EXT_AMP_RESET

SCART_MUTE

EXT_AMP_MUTE

12V_EXT_PWR_DET

COMMERCIAL_12V_CTL

R3030 10K

MICOM_GP4_10PIN

R3031 10K

MICOM_GP3_12/15PIN

+3.3V_NORMAL

R3034

4.7K

OPT

+3.3V_NORMAL

+3.3V_NORMAL

+3.3V_NORMAL

R3035

4.7K

OPT

+3.3V_NORMAL

Q3000

MMBT3904(NXP)

EDID_WP

E

B

C

P3000

12507WS-12L

MICOM_DEBUG

1

2

3

4

5

6

7

8

9

10

11

12

13

R3036

10K

OPT

R3037

10K

OPT

R3032

10K

AMP_RESET_BY_MICOM

R3033

10K

IC3000

R5F100GEAFB

MICOM

1

P60/SCLA0

2

P61/SDAA0

3

P62

4

P63

5

P31/TI03/TO03/INTP4

6

P75/KR5/INTP9/SCK01/SCL01

7

P74/KR4/INTP8/SI01/SDA01

8

P73/KR3/SO01

9

P72/KR2/SO21

10

P71/KR1/SI21/SDA21

11

P70/KR0/SCK21/SCL21

12

P30/INTP3/RTC1HZ/SCK11/SCL11

13

P50/INTP1/SI11/SDA11

14

P51/INTP2/SO11

15

P17/TI02/TO02

16

P16/TI01/TO01/INTP5

17

P15/PCLBUZ1/SCK20/SCL20

18

P14/RXD2/SI20/SDA20

19

P13/TXD2/SO20

20

P12/SO00/TXD0/TOOLTXD

21

P11/SI00/RXD0/TOOLRXD/SDA00

22

P10/SCK00/SCL00

23

P146

24

P147/ANI18

25 P27/ANI7

26 P26/ANI6

27 P25/ANI5

28 P24/ANI4

29 P23/ANI3

30 P22/ANI2

31 P21/ANI1/AVREFM

32 P20/ANI0/AVREFP

33 P130

34 P01/TO00/RXD1

35 P00/TI00/TXD1

36 P140/PCLBUZ0/INTP6

37 P120/ANI19

38 P41/TI07/TO07

39 P40/TOOL0

40 RESET

41 P124/XT2/EXCLKS

42 P123/XT1

43 P137/INTP0

44 P122/X2/EXCLK

45 P121/X1

46 REGC

47 VSS

48 VDD

C3002 8pF

C3003 8pF

R3000 10K

R3001 22

MICOM_DIIVA

POD_WAKEUP_N

FLG_POD_DR

/RST_DIIVA

FLG_POD_DR

/RST_DIIVA

POD_WAKEUP_N

R3002 22

MICOM_DIIVA

R3003 22

AMP_RESET_BY_MICOM

MODEL1_OPT_6

MODEL1_OPT_5

MODEL1_OPT_6

MODEL1_OPT_5

R3020 10K

MICOM_MHL

R3021 10K

MICOM_NON_MHL

R3016 10K

MICOM_GED

R3017 10K

MICOM_NON_GED

C3001 0.47uF

LOGO_LIGHT

LOGO_LIGHT

SI1012CR-T1-GE3

Q3001-*1

HDMI_CEC_FET_VISHAY

S

D

G

R3018

3.3K R3019

3.3K

MICOM 30

For Debug

PDP

DIVA

Renesas MICOM

NON DIVA

/ OLED

MICOM MODEL OPTION

MODEL_OPT_3 LCD

For CEC

IR Wafer

10Pin

MODEL_OPT_4 12/15Pin

IR Wafer

10

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

JAPAN

NON JAPAN

TOUCH_KEY

TACT_KEY

GP4 High/MID Power SEQUENCE

POWER_ON/OFF!

POWER_ON/OFF2_1

POWER_ON/OFF2_2

POWER_ON/OFF2_3

POWER_ON/OFF2_4

SOC_RESET

For Japan:LNB_INIT

HDMI_WAUP:HDMI_INIT

2011.11.21

for DiiVA

For China

(GP3_Soft touch)

NON_MHL MHLMODEL_OPT_5

NON_GED GEDMODEL_OPT_6

For JAPAN

GP4_HIGH

(GP4_TOOL)

For Sample Set

MICOM MODEL OPTION

Eye Sensor Option

MODEL_OPT_2

1

0

MC8101_ABOV

N/A

MODEL_OPT_4

0

1

CM3231_CAPELLA CM3231_CAPELLA

(TACT_KEY)

(GP3 Soft touch) (GP4 Soft touch)

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THERMAL

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

5V_HDMI_3

D1+_HDMI1

HDMI_HPD_4

DDC_SCL_3

C3210

0.1uF

16V

CK-_HDMI2

CK+_HDMI1

R3208 0

5V_HDMI_1

CK-_HDMI1

D1-_HDMI1

CK-_HDMI3

D2-_HDMI4

D1-_HDMI2

HDMI_HPD_1

D0-_HDMI4

CK+_HDMI2

D0+_HDMI3

C3220

1uF

HDMI_RX0+

D2-_HDMI1

HDMI_HPD_2

D2-_HDMI2

R3204

0

DDC_SDA_1

D2-_HDMI1

R3207 0

DDC_SCL_3

DDC_SDA_4

DDC_SDA_4

D2-_HDMI2

D0-_HDMI3

+5V_NORMAL

R3237 33

DDC_SCL_4

D2+_HDMI3

R3240

10

DDC_SCL_2

D0+_HDMI1

CEC_REMOTE

D1-_HDMI4

CEC_REMOTE

D0-_HDMI1

CK+_HDMI4

DDC_SDA_1

R3238

10

D2+_HDMI4

D0+_HDMI4

5V_HDMI_4

HDMI_RX2-

DDC_SDA_2

CK-_HDMI4

D1+_HDMI3

+5V_NORMAL

HDMI_CLK+

C3213

1uF

R3222

0

D0+_HDMI2

DDC_SDA_3

5V_HDMI_4

D0+_HDMI4

D1+_HDMI2

D1-_HDMI3

5V_HDMI_4

DDC_SDA_3

HDMI_HPD_3

DDC_SCL_1

HDMI_HPD_1

DDC_SCL_1

JK3201

RSD-105156-100

EAG62611201

14

NC

13

CE_REMOTE

5D1_GND

20

BODY_SHIELD

12

CK-

11

CK_GND

2D2_GND

19

HP_DET

18

5V

10 CK+

4D1+

1D2+

17

GND

9D0-

8D0_GND

3D2-

16

DDC_DATA

7D0+

6D1-

15

DDC_CLK

D2-_HDMI3

R3210

0

C3205

10uF

10V

D1-_HDMI3

D0-_HDMI2

5V_HDMI_2

D1+_HDMI2

CEC_REMOTE

5V_HDMI_3

DDC_SCL_4

C3219

1uF

DDC_SDA_2

CK+_HDMI3

HDMI_RX1+

C3211

0.1uF

16V

HDMI_HPD_3

HDMI_HPD_4

5V_HDMI_1

CK+_HDMI3

CK+_HDMI4

D0-_HDMI2

D0+_HDMI1

D2+_HDMI1

HDMI_RX2+

DDC_SCL_3

DDC_SDA_4

I2C_SDA5

D2-_HDMI4

D0-_HDMI3

CK-_HDMI3

DDC_SCL_2

DDC_SCL_1

D1+_HDMI1

DDC_SCL_2

SPDIF_OUT_ARC

R3232

10

5V_HDMI_2

R3205

0

CK-_HDMI2

5V_HDMI_1

JK3203

RSD-105156-100

EAG62611201

14

NC

13

CE_REMOTE

5D1_GND

20

BODY_SHIELD

GND

12

CK-

11

CK_GND

2D2_GND

19

HP_DET

18

5V

10 CK+

4D1+

1D2+

17

GND

9D0-

8D0_GND

3D2-

16

DDC_DATA

7D0+

6D1-

15

DDC_CLK

R3209

0

CEC_REMOTE

DDC_SCL_4

CK-_HDMI1

HDMI_HPD_2

D0+_HDMI3

DDC_SDA_1

D1-_HDMI2

+5V_NORMAL

5V_HDMI_2

D1-_HDMI1

JK3200

RSD-105156-100

EAG62611201

14

NC

13

CE_REMOTE

5D1_GND

20

BODY_SHIELD

12

CK-

11

CK_GND

2D2_GND

19

HP_DET

18

5V

10 CK+

4D1+

1D2+

17

GND

9D0-

8D0_GND

3D2-

16

DDC_DATA

7D0+

6D1-

15

DDC_CLK

D2+_HDMI1

HDMI_RX0-

D2+_HDMI3

D2+_HDMI2

D1-_HDMI4

R3236 33 I2C_SCL5

D1+_HDMI3

D2-_HDMI3

5V_HDMI_3

JK3202

RSD-105156-100

EAG62611201

14 ARC

13

CE_REMOTE

5D1_GND

20

BODY_SHIELD

12

CK-

11

CK_GND

2D2_GND

19

HP_DET

18

5V

10 CK+

4D1+

1D2+

17

GND

9D0-

8D0_GND

3D2-

16

DDC_DATA

7D0+

6D1-

15

DDC_CLK

R3223

0

CK+_HDMI2

C3214

1uF

+5V_NORMAL

D2+_HDMI2

DDC_SDA_3

D0-_HDMI1

D0+_HDMI2

HDMI_CLK-

CK+_HDMI1

R3231

10

D0-_HDMI4

HDMI_RX1-

CK-_HDMI4

D1+_HDMI4

DDC_SDA_2

D2+_HDMI4

D1+_HDMI4

MHL_DET

C3208

0.1uF

RGB_DDC_SCL

RGB_DDC_SDA

RGB_5V

C3221

1uF

10V

R3242

10

C3202

1uF

10V

MHL_DET

5V_HDMI_4

+5V_NORMAL

MHL_DET

R3201

62K

1/10W

OPT

HDMI_S/W_RESET

R3244

10K

C3222

10uF

10V

HDMI_INT

HDMI_WKUP

+5V_NORMAL

C3218

10uF

10V

C3215

0.1uF

16V

C3212

1uF

10V

C3209

0.1uF

16V

+3.5V_ST

C3204

0.1uF

16V

C3203

10uF

10V

C3200

10uF

10V

+3.3V_NORMAL

L3200

BLM18PG121SN1D

C3206

0.1uF

16V

C3207

0.1uF

16V

R3245

10K

1/16W

5%

R3206

220K

1/16W

5%

R3211 33

R3215 33

OPT

R3214 33

C3223

0.047uF

25V

R3228

47K

R3225

47K

R3217

47K

R3219

47K

R3218

47K

R3220

47K R3229

47K

R3226

47K

R3241

5.1K

5%

1/16W

R3239

5.1K

5%

1/16W

R3233

5.1K

5%

1/16W

R3234

5.1K

5%

1/16W

L3201

BLM18PG121SN1D

C3217

0.1uF

16V

C3216

10uF

10V

L3202

L3203

C3224

0.1uF

16V

C3225

0.1uF

16V

R3216

10

IC3200

AZ1117BH-1.2TRE1

1

GND/ADJ

2OUT

3

IN

C3201

10uF

10V

R3200

62K

1/10W

HDMI_WKUP 12V_EXT_PWR_DET

R3203

10K

+3.3V_NORMAL

R3202

10K

+3.3V_NORMAL

C3226

0.1uF

16V

OPT

D3206

30V

MBR230LSFT1G

+3.5V_ST

MHL_DET R3212 33

R3213

5.1K

5%

1/16W

IC3202

TPS2554

3IN_2

2IN_1

4ILIM_SEL

1GND

5EN

6

ILIM1

7

ILIM0

8

OUT_1

9

OUT_2

10

FAULT

11

[EP]

Q3201

MMBT3906(NXP)

E

B

C

Q3200

MMBT3904(NXP) E

B

C

+3.5V_ST

R3243

1K

1/16W

5%

R3246

10K

D3203

A2

C

A1

D3202

A2

C

A1

D3204

A2

C

A1

D3200

A2

C

A1

D3201

A2

C

A1

D3205

A2

C

A1

R3247

10K

D3207

5.6V

IC3201

SII9587CNUC

FHD

1

R1XCN

2

R1XCP

3

R1X0N

4

R1X0P

5

R1X1N

6

R1X1P

7

R1X2N

8

R1X2P

9

AVDD12_1

10

VDD12_1

11

R3XCN

12

R3XCP

13

R3X0N

14

R3X0P

15

R3X1N

16

R3X1P

17

R3X2N

18

R3X2P

19

AVDD12_2

20

VDD33_1

21

R4XCN

22

R4XCP

23

R4X0N

24

R4X0P

25

R4X1N

26

R4X1P

27

R4X2N

28

R4X2P

29

VDD12_2

30

DSDA0

31

DSCL0

32

CBUS_HPD0

33

R0PWR5V

34

DSDA1

35

DSCL1

36

CBUS_HPD1

37

R1PWR5V

38

DSDA3

39

DSCL3

40

CBUS_HPD3

41

R3PWR5V

42

DSDA4

43

DSCL4

44

CBUS_HPD4

45 R4PWR5V

46 DSDA5[VGA]

47 DSCL5[VGA]

48 R5PWR5V[VGA]

49 SBVCC5

50 PWRMUX_OUT

51 LPSBV

52 WKUP

53 CD_SENSE0

54 CD_SENSE1

55 GPIO2

56 CD_SENSE3

57 CD-SENSE4

58 GPIO0

59 GPIO1

60 TPWR

61 RESET_N

62 CSDA

63 CSCL

64 INT

65 SPDIF_IN

66 RSVDL

67 VDD12_3

68 ARC

69 TX2P

70 TX2N

71 TX1P

72 TX1N

73 TX0P

74 TX0N

75 TXCP

76 TXCN

77 TCVDD12

78 TPVDD12

79 R0XCN

80 R0XCP

81 R0X0N

82 R0X0P

83 R0X1N

84 R0X1P

85 R0X2N

86 R0X2P

87 AVDD12_3

88 VDD33_2

89

[EP]GND

R3221

10

OPT

SPDIF_OUT_ARC

SPDIF_OUT

R3224 33

OPT

R3248

1K

OPT

R3249

3.9K

OPT

IC3201-*1

SII9587CNUC-3

UD 1

R1XCN

2

R1XCP

3

R1X0N

4

R1X0P

5

R1X1N

6

R1X1P

7

R1X2N

8

R1X2P

9

AVDD12_1

10

VDD12_1

11

R3XCN

12

R3XCP

13

R3X0N

14

R3X0P

15

R3X1N

16

R3X1P

17

R3X2N

18

R3X2P

19

AVDD12_2

20

VDD33_1

21

R4XCN

22

R4XCP

23

R4X0N

24

R4X0P

25

R4X1N

26

R4X1P

27

R4X2N

28

R4X2P

29

VDD12_2

30

DSDA0

31

DSCL0

32

CBUS_HPD0

33

R0PWR5V

34

DSDA1

35

DSCL1

36

CBUS_HPD1

37

R1PWR5V

38

DSDA3

39

DSCL3

40

CBUS_HPD3

41

R3PWR5V

42

DSDA4

43

DSCL4

44

CBUS_HPD4

45 R4PWR5V

46 DSDA5[VGA]

47 DSCL5[VGA]

48 R5PWR5V[VGA]

49 SBVCC5

50 PWRMUX_OUT

51 LPSBV

52 WKUP

53 CD_SENSE0

54 CD_SENSE1

55 GPIO2

56 CD_SENSE3

57 CD-SENSE4

58 GPIO0

59 GPIO1

60 TPWR

61 RESET_N

62 CSDA

63 CSCL

64 INT

65 SPDIF_IN

66 RSVDL

67 VDD12_3

68 ARC

69 TX2P

70 TX2N

71 TX1P

72 TX1N

73 TX0P

74 TX0N

75 TXCP

76 TXCN

77 TCVDD12

78 TPVDD12

79 R0XCN

80 R0XCP

81 R0X0N

82 R0X0P

83 R0X1N

84 R0X1P

85 R0X2N

86 R0X2P

87 AVDD12_3

88 VDD33_2

89

[EP]GND

HDMI 32

GP4

ARC

HDMI2

HDMI4 With MHL

HDMI1 With ARC

HDMI3

HDMI S/W OUTPUT

HDMI4

HDMI1

HDMI2

HDMI3

Limit 0.8A

Vout=0.8*(1+R1/R2)

Device Address : 0XB0

Limit 0.8A

2011.10.19

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Fiber Optic

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JK3601

KJA-PH-0-0177

3 DETECT

4 L

5 GND

1 R

+3.3V_NORMAL

R3641

2.7K

D3615

30V

OPT

C3633

18pF

50V

R3644 22

JK3602

2F11TC1-EM52-4F

C

GND

B

VCC

A

VIN

4

SHIELD

DSUB_B+

R3620

2.7K

OPT

+3.3V_NORMAL

DSUB_G+

RGB_DDC_SCL

DSUB_DET

R3645

10K

RGB_EDID

DSUB_R+

R3643 22

JK3603

SLIM-15F-D-2

11

22

33

44

55

66

77

88

99

10 10

11

11

12 12

13 13

14 14

15 15

1616

R3646

10K

C3615

0.1uF

16V

RGB_DDC_SDA

SPDIF_OUT

R3615

33

C3634

18pF

50V

EDID_WP

PC_R_IN

+5V_NORMAL

DSUB_HSYNC

DSUB_VSYNC

D3616

30V

OPT

PC_L_IN

R3642

2.7K

RGB_5V

RGB_5V

IC3600

M24C02-RMN6T

RGB_EDID

3

E2

2

E1

4

VSS

1

E0

5SDA

6SCL

7WC

8VCC

SOC_TX

SOC_RX

D3620

MMBD6100

A2

C

A1

R3647

100

RGB_DEBUG

D3623

5.6V

OPT

D3611

5.6V

OPT

D3612

5.6V

OPT

D3600

20V

OPT D3601

20V

OPT

D3622

5.5V

ADUC 5S 02 0R5L

OPT

D3621

5.5V

ADUC 5S 02 0R5L

OPT

D3613

5.5V

ADUC 5S 02 0R5L

OPT

D3611-*1

5.6V

ESD_MTK

D3612-*1

5.6V

ESD_MTK

D3613-*1

5.5V

ADUC 5S 02 0R5L

ESD_MTK

R3602

100

RGB_DEBUG

R3600

0

NON_RGB_DEBUG R3601

0

NON_RGB_DEBUG

RGB PC

PC AUDIO

RGB/ PC AUDIO/ SPDIF

SPDIF OUT

36

JACK HIGH / MID 2011.11.21

Closed to JACK

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R3700

10K

HP_OUT

HP_LOUT

+3.3V_NORMAL

JK3700

KJA-PH-0-0177

EAG61030001

HP_OUT

3DETECT

4L

5GND

1R

HP_DET

HP_ROUT

VA3700

5.6V

OPT

VA3700-*1

5.6V

ESD_MTK_HP_OUT

VA3700-*2

5.6V

ESD_LG1152_HP_OUT

37

JACK_COMMON 2011.11.21

ESD for LG1152

ESD for MTK

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

AV1_R_IN

C38020.1uF

RS232

C3803

0.1uF

RS232

COMP1_Pr

+3.5V_ST

AV1_L_IN

+3.3V_NORMAL

AV1_CVBS_DET

IR_OUT

R3814

4.7K

OPT

C3801

0.1uF

RS232

COMP1_DET

JK3803

SPG09-DB-009

RS232

1

2

3

4

5

6

7

8

9

10

JK3800

KJA-PH-1-0177

AV_JACK_BLACK

3 M3_DETECT

4 M4

5 M5_GND

1 M1

6 M6

IC3800

MAX3232CDR

EAN41348201

RS232

3

C1-

2

V+

4

C2+

1

C1+

6

V-

5

C2-

7

DOUT2

8

RIN2 9ROUT2

10 DIN2

11 DIN1

12 ROUT1

13 RIN1

14 DOUT1

15 GND

16 VCC

R3811

4.7K

OPT

COMP1_Pb

C38000.1uF

RS232

JK3801

KJA-PH-1-0177

COMP_JACK_BLACK

3 M3_DETECT

4 M4

5 M5_GND

1 M1

6 M6

AV1_CVBS_IN

COMP1_Y

R3821

100RS232

+3.3V_NORMAL

R3820

100RS232

+3.5V_ST

12V_COMMERCIAL_OUT

12V_COMMERCIAL_OUT

+3.5V_ST

R3834

10K

OPT_RS232

SOC_RX

+3.5V_ST

SOC_TX

P3800

12507WS-04L

UART_4PIN_STRAIGHT

1

2

3

4

5

R3810

10K

R3806

10K

D3803

5.6V

OPT

D3800

5.6V

OPT

D3804

20V

OPT

D3805

20V

OPT

D3801

5.6V

OPT

D3802

5.6V

OPT

D3801-*1

5.6V

ESD_MTK

D3802-*1

5.6V

ESD_MTK

D3800-*1

5.6V

ESD_MTK

D3803-*1

5.6V

ESD_MTK

D3803-*2

5.6V

ESD_LG1152

D3801-*2

5.6V

ESD_LG1152

D3802-*2

5.6V

ESD_LG1152

D3800-*2

5.6V

ESD_LG1152

JK3801-*1

KJA-PH-1-0177-2

COMP_JACK_GREEN

3 M3_DETECT

4 M4

5 M5_GND

1 M1

6 M6

JK3800-*1

KJA-PH-1-0177-1

AV_JACK_YELLOW

3 M3_DETECT

4 M4

5 M5_GND

1 M1

6 M6

P3801

12507WR-04L

UART_4PIN_ANGLE

1

2

3

4

5

RS232C CVBS 1 PHONE JACK

COMPONENT 1 PHONE JACK

38

JACK_COMMON 2011.11.21

12V 1A FOR COMMERCIAL(RS-232C POWER)

FOR COMMERCIAL

ESD For MTK ESD For LG1152

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

IR

R4118

10K

5%

L4100

BLM18PG121SN1D

C4102

0.1uF

LED_B/GP4_LED_R

+3.5V_ST

+3.5V_ST

R4105

22

COMMERCIAL_IR

C4107

100pF

50V

IR_OUT

+3.5V_ST

R4117

10K

5%

C4100

0.1uF

R4102

10K

COMMERCIAL_IR

R4108

0

COMMERCIAL_IR_US

R4113

100

KEY1

KEY2

R4123

100

EEPROM_SCL

R4124

100

R4119

47K

COMMERCIAL_IR

R4111

10K

COMMERCIAL_IR_EU

R4114

100

+3.5V_ST

+3.5V_ST

C4104

1000pF

50V

+3.5V_ST

+3.5V_ST

EEPROM_SDA

R4104

47K

COMMERCIAL_IR

R4100

0

IR_BYPASS

R4125 1.5K

Q4100

MMBT3904(NXP)

COMMERCIAL_IR E

B

C

Q4101

MMBT3904(NXP)

COMMERCIAL_IR

E

B

C

Q4102

MMBT3904(NXP)

COMMERCIAL_IR_EU E

B

C

Q4104

MMBT3904(NXP)

COMMERCIAL_IR

E

B

C

R4101

1K

COMMERCIAL_IR

R4109

1K

COMMERCIAL_IR_EU

R4115

3.3K

COMMERCIAL_IR

R4103

3.3K

COMMERCIAL_IR

R4107

10K

IR_BYPASS

P4102

12507WR-10L

GP4_IR_10P

1

2

3

4

5

6

7

8

9

10

11

D4106

20V

ADUC 20S 02 010L

OPT

D4105

20V

ADUC 20S 02 010L

OPT

D4101

5.6V

AMOTECH CO., LTD.

OPT

D4100

5.6V

AMOTECH CO., LTD.

OPT

D4104

5.6V

AMOTECH CO., LTD.

OPT

D4106-*1

20V

ADUC 20S 02 010L

ESD_MTK

10pF

D4105-*1

20V

ADUC 20S 02 010L

ESD_MTK

10pF

D4100-*1

5.6V

ESD_MTK

ADMC 5M 02 200L

200pF

D4101-*1

5.6V

ESD_MTK

ADMC 5M 02 200L

200pF

D4104-*1

5.6V

ESD_MTK

ADMC 5M 02 200L

200pF

D4104-*2

5.6V

ESD_LG1152

ADMC 5M 02 200L

200pF

D4101-*2

5.6V

ESD_LG1152

ADMC 5M 02 200L

200pF

D4100-*2

5.6V

ESD_LG1152

ADMC 5M 02 200L

200pF

IR & KEY

RGB Sensor

COMMERCIAL

Zener Diode is

Soft Touch Micom D/L

close to wafer

41

IR / KEY 2011.11.21

COMMERCIAL

ESD for LG1152

ESD for MTK

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

C4200

0.1uF

OPT

USB_HUB_IC_IN_DM

C4208

0.1uF

R4206

12K

1/16W 1%

C4201

4.7uF

C4211

0.1uF

OPT

USB_DM2

C4210

0.1uF

OPT

IC4200

USB2512B-AEZG

1USBDM_DN[1]

3USBDM_DN[2]

7NC_2

9NC_4

10

VDDA33_2

11

TEST

12

PRTPWR[1]/BC_EN[1]

13

OCS_N[1]

14

CRFILT

15

VDD33_1

16

PRTPWR[2]/BC_EN[2]

17

OCS_N[2]

18

NC_5

19

NC_6

20

NC_7

21

NC_8

22

SDA/SMBDATA/NON_REM[1]

23

VDD33_2

24

SCL/SMBCLK/CFG_SEL[0]

25

HS_IND/CFG_SEL[1]

26

RESET_N

27

VBUS_DET

28 SUSP_IND/LOCAL_PWR/NON_REM[0]

29 VDDA33_3

30 USBDM_UP

31 USBDP_UP

32 XTALOUT

5VDDA33_1

8NC_3

6NC_1

4USBDP_DN[2]

2USBDP_DN[1]

33 XTALIN/CLKIN

34 PLLFILT

35 RBIAS

36 VDD33_3

37

[EP]VSS

+3.3V_NORMAL

R4205

1M

1%

C4203

0.1uF

/USB_OCD1

R4204

100K

+3.3V_NORMAL

+3.3V_NORMAL

C4213

0.1uF

C4202

0.1uF

C4205

15pF

R4202

100K

R4200

100K

X4200

24MHz

USB_DP2

USB_DM1

R4203

100K

C4212

0.1uF

OPT

C4207

15pF

C4204

0.1uF

USB_DP1

/RST_HUB

USB_HUB_IC_IN_DP

USB_CTL1

R4201

100K

C4206

1uF

25V

C4214

1uF

25V

C4209

1uF

25V

R4208 22

OPT

USB_CTL2

R4207 22

OPT

/USB_OCD2

R4209

100K

OPT

R4210

100K

OPT

42

USB3_HUB 2011.06.13

USB HUB

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

USB DOWN STREAM

USB DOWN STREAM

USB DOWN STREAM

THERMAL

THERMAL

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

USB_DM1

USB_DP2

USB_DP1

USB_DM2

C4339

10uF

10V

OPT

USB_DM3

C4333

22uF

10V

WIFI_DP

C4327

0.1uF

16V

+5V_USB

R4339

2K

1%

WIFI_DM

R4330

0

USB_DP3

C4334

4700pF

50V

D4304

40V

SMAB34

C4322

10uF

10V

D4303

RCLAMP0502BA

OPT

C4328

0.01uF

50V

C4336

0.1uF

16V

+5V_USB_3

USB_CTL2

C4324

10uF

35V

P4301

12507WR-04L

WIFI

1

VDD

2

DM

3

DP

4

GND

5

.

C4320

0.1uF

16V

WIFI

C4321

10uF

10V

WIFI

R4329

330K

OPT

R4328

10K

JK4303

3AU04S-305-ZC-(LG)

1234

5

C4310

10uF

10V

JK4302

3AU04S-305-ZC-(LG)

1234

5

C4329

0.1uF

16V

L4302

BLM18PG121SN1D

WIFI120-ohm

C4319

0.1uF

16V

WIFI

C4326

0.1uF

50V

POWER_ON/OFF2_4

D4302

RCLAMP0502BA

OPT

+24V

/USB_OCD2

C4332

47pF

50V

IC4305

TPS54331D

3

EN

2

VIN

4

SS/TR

1

BOOT

5VSENSE

6COMP

7GND

8PH

JK4300

3AU04S-305-ZC-(LG)

1234

5

R4327

10K

OPT

R4323

10K

USB_CTL1

L4308

6.8uH

R4336

20K C4338

1000pF

50V

OPT

L4305

BLM18PG121SN1D

D4300

RCLAMP0502BA

OPT

/USB_OCD1

C4323

10uF

10V

+5V_USB_2

+5V_USB_3

+5V_USB_2

C4337

22uF

10V

+5V_USB

+3.3V_NORMAL

/USB_OCD3

C4301

22uF

10V

R4332

10K POWER_ON/OFF2_4

C4331

0.1uF

16V

+12V

L4307

3.6uH

C4341

4.7uF

10V

R4342

10K

5%

L4306

BLM18PG121SN1D

USB_CTL3

C4325

10uF

16V

C4342

100pF

50V

USB_DCDC_SN1104041

IC4306-*1

BD86180MUV

DEV_USB_DCDC_BD86180

3

SS

2

COMP

4

RT

1

EN

6

CTL1

5

CTL2

7

FLG2

8

FLG1

9

USB_OUT2

10

GND_1

11

GND_2

12

USB_OUT1 13 USB_IN_1

14 USB_IN_2

15 USB_IN_3

16 SW_1

17 SW_2

18 BST

19 PGND_1

20 PGND_2

21 VIN_1

22 VIN_2

23 GND_3

24 VREG

25

[EP]GND

C4340

4700pF

50V

USB_DCDC_SN1104041

C4340-*1

0.01uF

50V

USB_DCDC_BD86180

IC4303

TPS2554

3

IN_2

2

IN_1

4

ILIM_SEL

1

GND

5

EN 6ILIM1

7ILIM0

8OUT_1

9OUT_2

10 FAULT

11

[EP]

+3.3V_NORMAL

R4301 10K

R4302 10K

R4303 10K

OPT

R4304 10K

OPT

IC4306

USB_DCDC_SN1104041

SN1104041, DC-DC+2CH USB SW

3SS

2COMP

4ROSC

1EN

6EN_SW1

5EN_SW2

7NFAULT2

8NFAULT1

9SW_OUT2

10 AGND_1

11 AGND_2

12 SW_OUT1

13

SW_IN_1

14

SW_IN_2

15

SW_IN_3

16

LX_1

17

LX_2

18

BST

19

PGND_1

20

PGND_2

21

VIN_1

22

VIN_2

23

AGND_3

24

V7V

25

[EP]GND C4300

0.1uF

16V

R4343

820

1%

R4300

27K

1/10W

R4341

27K

1/10W

OPT

R4338

10K

1%

D4300-*2

RCLAMP0502BA

ESD_LG1152

D4304-*1

40V

SX34

D4302-*1

RCLAMP0502BA

ESD_LG1152

D4303-*3

RCLAMP0502BA

ESD_LG1152

43

USB3_HUB_WiFi 2011.10.26

MAX 0.4A

From SoC

USB3

USB2

USB_WIFI

MAX 2A

Vout=0.8*(1+R1/R2)

MAX 1.5A

R1

DVR Ready

MAX 1.5A

3A

+5V_USB FOR USB1

MAX 1.8A

R2

USB1

For EMI

ESD for LG1152

ESD for MTK

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SC_L_IN

C4602

4700pF

EU

Q4601

MMBT3904(NXP)

EU

E

B

C

C4604

0.1uF

EU

JK4600

DA1R018H91E

EU

1

AUDIO_R_OUT

2

AUDIO_R_IN

3

AUDIO_L_OUT

4

AUDIO_GND

5

B_GND

6

AUDIO_L_IN

7

B_OUT

8

ID

9

G_GND

10

G_OUT

11

R_GND

12

R_OUT

13

RGB_IO

14

SYNC_GND

15

SYNC_OUT

16

SYNC_IN

17

COM_GND

18

AV_DET

19

SHIELD

SC_G

+12V

R4602

390

EU

C4603

4700pF

EU

R4603

390

EU

SC_DET

DTV/MNT_L_OUT

SC_ID

DTV/MNT_V_OUT

R4604

180

EU

SC_B

SC_R_IN

+3.3V_NORMAL

R4607

15K

EU

SC_CVBS_IN

Q4600

MMBT3906(NXP)

EU E

B

C

C4600

1000pF

50V

EU

R4605

470

EU

C4601

1000pF

50V

EU

L4600

BLM18PG121SN1D

EU

L4601

BLM18PG121SN1D

EU

R460075

EU

DTV/MNT_R_OUT

SC_FB

SC_R

R4606

47K

EU

C4606

0.1uF

50V

EU

R4601

10K

EU

R4608 0

OPT

D4611

5.6V

OPT

D4607

5.6V

OPT

D4606

5.6V

OPT

D4605

5.6V

OPT

D4608

5.6V

OPT

D4601

5.6V

OPT D4601-*1

5.6V

ESD_MTK_SCART

200pF

D4605-*2

5.6V

ESD_LG1152_SCART

200pF

D4606-*2

5.6V

ESD_LG1152_SCART

200pF

D4601-*2

5.6V

ESD_LG1152_SCART

200pF

D4611-*2

5.6V

ESD_LG1152_SCART

200pF

D4600

20V

OPT

D4600-*2

20V

ESD_LG1152_SCART

10pF

C4605

100uF

16V

EU

C4607

47uF

25V

EU

D4611-*1

5.6V

ESD_MTK_SCART

200pF

D4609

5.5V

OPT

D4610

5.5V

OPT

D4603

5.5V

OPT

D4602

5.5V

OPT

D4604

5.5V

OPT

D4609-*1

5.5V

ESD_MTK_SCART

15pF

D4609-*2

5.5V

ESD_LG1152_SCART

15pF

D4610-*1

5.5V

ESD_MTK_SCART

15pF

D4602-*1

5.5V

ESD_MTK_SCART

15pF

D4603-*1

5.5V

ESD_MTK_SCART

15pF

D4604-*1

5.5V

ESD_MTK_SCART

15pF

D4600-*1

20V

ESD_MTK_SCART

10pF

D4605-*1

5.6V

ESD_MTK_SCART

200pF

D4606-*1

5.6V

ESD_MTK_SCART

200pF

46

SCART GENDER 2011.10.26

Full Scart(18 Pin Gender)

Gain=1+Rf/Rg

CLOSE TO JUNCTION

Rf Rg

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

M_RFModule_ISP

M_REMOTE_RX

M_REMOTE_TX

+3.3V_NORMAL

L4800

120-ohm

M_REMOTE

M_RFModule_RESET

C4800

0.1uF

P4800

12507WR-08L

M_REMOTE

13.3V

2GND

3RX

4TX

5RESET

6DC

7DD

8GND

9

AR4800

100

1/16W

M_REMOTE

3D_SYNC_RF

3D_SYNC_RF

ZigBee_Radio Pulse M_REMOTE OPTION

ALL M_REMOTE OPTION

48

MOTION REMOTE 2011.11.21

Only For PDP

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EPHY_RDN

C5002

0.1uF

16V

C5001

0.01uF

50V

EPHY_TDP

EPHY_TDN

C5000

0.1uF

16V

JK5000

XRJH-01A-4-DA7-180-LG(B)

1P1[CT]

2P2[TD+]

3P3[TD-]

4P4[RD+]

5P5[RD-]

6P6[CT]

7P7

8P8

12

SHIELD

9P9

11 P11

10 P10[GND]

D1 YL_C

D2 YL_A

D3 GN_C

D4 GN_A

C5003

0.01uF

50V

EPHY_RDP

LAN_JACK_POWER

D5000

5.5V

OPT

D5002

5.5V

OPT

D5003

5.5V

OPT

D5001

5.5V

OPT

D5001-*2

5.5V

ADUC 5S 02 0R5L

ESD_LG1152

D5003-*2

5.5V

ADUC 5S 02 0R5L

ESD_LG1152

D5002-*2

5.5V

ADUC 5S 02 0R5L

ESD_LG1152

D5000-*2

5.5V

ADUC 5S 02 0R5L

ESD_LG1152

D5003-*1

ADUC 5S 02 0R5L

ESD_MTK

D5000-*1

ADUC 5S 02 0R5L

ESD_MTK

D5002-*1

ADUC 5S 02 0R5L

ESD_MTK

D5001-*1

ADUC 5S 02 0R5L

ESD_MTK

Ethernet Block

50

LAN_VERTICAL 2011.11.23

ESD for LG1152

ESD for MTK

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EPHY_EN

R5216 4.7K

R5215 4.7K

EPHY_TXD0

C5200

4.7uF

10V

R5204

2.49K 1%

EPHY_RDP

/RST_PHY

EPHY_LINK

C5201

0.1uF

16V

ET_COL/SNI

R5206 22

ET_RXER

R521022

R5205

0

EPHY_CRS_DV

R5212

1.5K

1/16W

5%

EPHY_ACTIVITY

EPHY_RXD0

C5210

10uF

10V

OPT

EPHY_RDN

R5203

4.7K

EPHY_TDP

C5205

0.1uF

16V

EPHY_ACTIVITY

C5204

10uF

10V

OPT

C5203

0.1uF

16V

EPHY_RXD1

EPHY_TDN

EPHY_REFCLK

ET_RXER

EPHY_TXD1

R5208 4.7K

EPHY_MDC

C5211

0.1uF

16V

EPHY_LINK

R52174.7K

+3.3V_NORMAL

C5208

0.1uF

16V

R5207 22

EPHY_MDIO

LAN_JACK_POWER

C5212

0.1uF

OPT

ET_COL/SNI

C5209

56pF

C5202

56pF

EPHY_INT R5201 22

L5211

100NH

C5206

15pF

50V

C5207

15pF

50V

IC5200

RTL8201F-VB-CG

1

RSET

3

MDI+[0]

7

AVDD33_1

9

RXD[0]

10

RXD[1]

11

RXD[2]/INTB

12

RXD[3]/CLK_CTL

13

RXC

14

DVDD33

15

TXC

16

TXD[0]

17 TXD[1]

18 TXD[2]

19 TXD[3]

20 TXEN

21 PHYRSTB

22 MDC

23 MDIO

24 LED0/PHYAD[0]/PMEB

25 LED1/PHYAD[1]

26 CRS/CRS_DV

27 COL

28 RXER/FXEN

29 DVDD10OUT

30 AVDD33_2

31 CKXTAL1

32 CKXTAL2

5

MDI+[1]

8

RXDV

6

MDI-[1]

4

MDI-[0]

2

AVDD10OUT 33

[EP]

X5200

25MHZ

+3.3V_NORMAL

+3.3V_NORMAL

+3.3V_NORMAL

+3.3V_NORMAL

+3.3V_NORMAL

+3.3V_NORMAL

14ETHERNET 50

LG1152 A0

Place near IC

Ethernet Block

Route Single 50 Ohm, Differential 100 Ohm

Place 0.1uF close to each power pins

Place this Res. near IC

25MHz, CL 18pF, ESR , max 30 Ohm, +/-30ppm

Place this cap. near IC

Place this cap. near IC

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

D5402

100V

1N4148W

OPT

R5402 100

0.1uF

C5421

50V

R5411

12

C5434

0.47uF

50V

C5408

33pF

50V

R5407

12

C5403

1000pF

50V

R5405

100

R5406

3.3

OPT

R5413

12

R5403 100

R5414

12

0.1uF

C5419

50V

C5427

1uF

25V

C5425

22000pF

50V

C5416

22000pF

50V

C5422

10uF

35V

0.1uF

C5436

50V

+3.3V_NORMAL

C5426

22000pF

50V

L5402

NRS6045T100MMGK

10.0uH

R5412

12

C5423

10uF

35V

0.1uF

C5400

50V

C5432

390pF

50V

0.1uF

C5437

50V

0.1uF

C5418

50V

R5409

12

0.1uF

C5401

50V

SPK_L-

C5402

100pF

50V

C5406

33pF

50V

C5405

10uF

10V

OPT

D5400

100V

1N4148W

OPT

C5404

1000pF

50V

C5430

390pF

50V

C5429

390pF

50V L5405

NRS6045T100MMGK

10.0uH

SPK_R-

+24V_AMP

L5403

NRS6045T100MMGK

10.0uH

C5411

0.1uF

16V

AUD_MASTER_CLK

0.1uF

C5438

50V

SPK_R-

AUD_SCK

D5401

100V

1N4148W

OPT

R5404

3.3K

AUD_LRCK

C5415

1000pF

50V

R5401

10K

I2C_SDA1

0.1uF

C5413

16V

AUD_LRCH

L5401

BLM18PG121SN1D

+24V_AMP

SPK_R+

C5431

390pF

50V

+24V_AMP

D5403

100V

1N4148W

OPT

C5414

10uF

10V

AMP_RESET_N

R5408

12

C5433

1uF

25V

L5404

NRS6045T100MMGK

10.0uH

SPK_L-

C5435

0.47uF

50V

C5428

1uF

25V

I2C_SCL1

C5409

10uF

10V

OPT

SPK_L+

P5400

WAFER-ANGLE

1

2

3

4

AMP_MUTE

0.1uF

C5439

50V

C5417

22000pF

50V

R5400

10K

R5410

12

SPK_R+

0.1uF

C5412

16V

+24V

C5410

10uF

10V

OPT

0.1uF

C5420

50V

SPK_L+

WOOFER_MUTE

WOOFER_MUTE TP5403

C5424

0.01uF

50V

OPT

L5400

CIS21J121

Q5400

MMBT3904(NXP)

E

B

C

4.7uF

C5407

10V

R5418

5.1K

R5415

5.1K

R5416

5.1K

R5417

5.1K

+3.3V_NORMAL

IC5400

NTP-7500L

1

AGND_PLL

2

AVDD_PLL

3

DVDD_PLL

4

LF

5

DGND_PLL

6

GND_1

7

DGND

8

DVDD

9

SDATA

10

WCK

11

BCK

12

SDA

13

SCL

14

/FAULT

15

MONITOR0

16

MONITOR1

17

MONITOR2

18

BST2B

19

PGND2B

20

OUT2B_1

21

OUT2B_2

22

PVDD2_1

23

PVDD2_2

24

PVDD2_3

25 OUT2A_1

26 OUT2A_2

27 PGND2A

28 BST2A

29 VDR2

30 AGND

31 VCC_5

32 VDR1

33 BST1B

34 PGND1B

35 OUT1B_1

36 OUT1B_2

37 PVDD1_1

38 PVDD1_2

39 PVDD1_3

40 OUT1A_1

41 OUT1A_2

42 PGND1A

43 BST1A

44 /RESET

45 AD

46 GND_IO

47 CLK_I

48 VDD_IO

49

[EP]

SPEAKER_R

DUAL COMPONENT

Q1801

0x54

SPEAKER_L

1ST : 0TRIY80001A 2ND : 0TR387500AA

54

AMP_NEO 2011.11.21

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

0.1uF

C5516

50V

WOOFER

R5508

12

WOOFER

C5513

1000pF

50V

WOOFER

C5524

22000pF

50V

WOOFER

0.1uF

C5518

50V

WOOFER

R5507

12

WOOFER

AUD_LRCH

C5510

1000pF

50V

WOOFER

C5521

10uF

35V

WOOFER

SPK_WOOFER_L-

AUD_LRCK

I2C_SCL1

C5512

10uF

10V

WOOFER

WOOFER_MUTE

L5503

NRS6045T100MMGK

WOOFER

10.0uH

R5502 100

WOOFER

R5512

12

WOOFER

C5505

33pF

50V

WOOFER

C5528

390pF

50V

WOOFER

C5520

10uF

35V

WOOFER

0.1uF

C5519

50V

WOOFER

R5514

12

WOOFER

0.1uF

C5511

16V

WOOFER

C5508

0.1uF

16V

WOOFER

SPK_WOOFER_L+

C5531

1uF

25V

WOOFER

D5501

100V

1N4148W

OPT

SPK_WOOFER_L+

C5525

1uF

25V

WOOFER

C5514

22000pF

50V

WOOFER

AUD_SCK

L5500

BLM18PG121SN1D

WOOFER

0.1uF

C5535

50V

WOOFER

+3.3V_NORMAL

0.1uF

C5534

50V

WOOFER

C5532

0.47uF

50V

WOOFER

C5502

10uF

10V

OPT

C5500

100pF

50V

WOOFER

C5503

33pF

50V

WOOFER

R5506

3.3

OPT

C5501

1000pF

50V

WOOFER

R5503

3.3K

WOOFER

C5507

10uF

10V

OPT

I2C_SDA1

0.1uF

C5517

50V

WOOFER

C5522

0.01uF

50V

OPT

C5515

22000pF

50V

WOOFER

0.1uF

C5509

16V

WOOFER

AMP_RESET_N

R5505

10K

WOOFER

D5500

100V

1N4148W

OPT C5527

390pF

50V

WOOFER

C5506

10uF

10V

OPT

L5504

NRS6045T100MMGK

WOOFER

10.0uH

R5501 100

WOOFER

R5504

100

WOOFER

+24V_AMP_WOOFER

+24V_AMP_WOOFER

C5526

1uF

25V

WOOFER

C5523

22000pF

50V

WOOFER

AUD_MASTER_CLK

SPK_WOOFER_L-

R5517

4.7K

1/16W

5%

WOOFER_MONO

R5518

4.7K

1/16W

5%

WOOFER_MONO

C5504

4.7uF

10V

WOOFER

P5500

FW25001-02(SPK 2P)

WOOFER

1

2

R5515

5.1K

WOOFER

R5516

5.1K

WOOFER

L5501

CIS21J121

+24V_AMP_WOOFER

0.1uF

C5529

50V

+24V

R5519

5.1K

WOOFER_STEREO

R5509

12

WOOFER_STEREO

R5510

12

WOOFER_STEREO

SPK_WOOFER_R+

SPK_WOOFER_R-

C5530

390pF

50V

WOOFER_STEREO

0.1uF

C5537

50V

WOOFER_STEREO

SPK_WOOFER_R-

C5533

390pF

50V

WOOFER_STEREO L5505

NRS6045T100MMGK

WOOFER_STEREO

10.0uH

D5503

100V

1N4148W

OPT

R5500

12

WOOFER_STEREO

R5513

5.1K

WOOFER_STEREO

L5502

NRS6045T100MMGK

WOOFER_STEREO

10.0uH

R5511

12

WOOFER_STEREO

D5502

100V

1N4148W

OPT

SPK_WOOFER_R+

0.1uF

C5538

50V

WOOFER_STEREO

C5536

0.47uF

50V

WOOFER_STEREO

IC5500

NTP-7500L

WOOFER

1

AGND_PLL

2

AVDD_PLL

3

DVDD_PLL

4

LF

5

DGND_PLL

6

GND_1

7

DGND

8

DVDD

9

SDATA

10

WCK

11

BCK

12

SDA

13

SCL

14

/FAULT

15

MONITOR0

16

MONITOR1

17

MONITOR2

18

BST2B

19

PGND2B

20

OUT2B_1

21

OUT2B_2

22

PVDD2_1

23

PVDD2_2

24

PVDD2_3

25 OUT2A_1

26 OUT2A_2

27 PGND2A

28 BST2A

29 VDR2

30 AGND

31 VCC_5

32 VDR1

33 BST1B

34 PGND1B

35 OUT1B_1

36 OUT1B_2

37 PVDD1_1

38 PVDD1_2

39 PVDD1_3

40 OUT1A_1

41 OUT1A_2

42 PGND1A

43 BST1A

44 /RESET

45 AD

46 GND_IO

47 CLK_I

48 VDD_IO

49

[EP]

P5501

FW25003_03

DEV_WOOFER_STEREO

1

2

3

WOOFER AMP.

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SIGN600005

SCART_Rout

SCART_MUTE

SCART_Lout

DTV/MNT_R_OUT

R6012

4.7K

OPT

+12V

C6005

33pF EU

R6010

470K

OPT

R6008 33K

EU

+3.5V_ST

C6004

0.1uF

50V

EU

R60002.2K EU

L6000

EU

R6002

470K

OPT

Q6000

MMBT3904(NXP)

EU

E

B

C

R6011

2.2K

EU

DTV/MNT_R_OUT

C6003

33pF

EU

DTV/MNT_L_OUT

Q6001

MMBT3904(NXP)

EU

E

B

C

DTV/MNT_L_OUT

R600433K EU

C6002

6800pF

OPT

C6007

6800pF

OPT

C6008

1uF

25V

EU

C6000

1uF

25V

EU

IC6000

AZ4580MTR-E1

EU

3

IN1+

2

IN1-

4

VEE

1

OUT1

5IN2+

6IN2-

7OUT2

8VCC

SCART_AMP_R_FB

SCART_AMP_L_FB

R6013

510

EU

[SCART AUDIO MUTE]

AUD_OUT >> EU/CHINA_HOTEL_OPT

60

SCART AUDIO AMP 2011.11.21

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Q6201

AO3407A

CI

G

D

S

+5V_CI_ON

C6207

4.7uF

10V

OPT

R6218

10K

CI

+5V_NORMAL

C6202

0.1uF

16V

OPT

R6242

2.2K

CI

R6221

10K

OPT

PCM_5V_CTL

R6248

10K

CI

R6223

4.7K

CI

R6241

22K

CI

Q6200

MMBT3904(NXP)

CI

E

B

C

C6210

1uF

25V

OPT

C6210-*1

1uF

25V

CI_MTK

CI POWER ENABLE CONTROL

62

CI SLOT 2011.10.31

Option FOR MTK Option FOR LG1152

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R6403

OPT

4.7K

HP_ROUT

+3.3V_NORMAL

C6400

1uF

10V

L6400

120-ohm

BLM18PG121SN1D

SIDE_HP_MUTE

R6404

4.7K

C6401

1uF

10V

C6405

0.1uF

16V

C6402

1uF

10V

HP_ROUT_MAIN

R6400

4.7K

R6405

1K

C6406

2.2uF

10V

HP_LOUT

Q6400

MMBT3904(NXP)

E

B

C

IC6400

TPA6132A2

EAN60724701

3

INR+

2

INL+

4

INR-

1

INL-

5

OUTR

6

G0

7

G1

8

HPVSS

9CPN

10 PGND

11 CPP

12 HPVDD

13

EN

14

VDD

15

SGND

16

OUTL

HP_LOUT_MAIN

R6401

OPT

R6402

4.7K

+3.3V_NORMAL

C6404

2.2uF

10V

C6407

2.2uF

10V

C6403

10uF

10V

HP_AMP_MUTE

R6406

10

1/16W

5%

R6407

10

1/16W

5%

C6408

0.47uF

16V

C6409

0.47uF

16V

2011.06.29

HEADPHONE AMP

61

EARPHONE AMP

From Micom

Close to the IC

Low Pass Filter

Place Near jack Side

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

FE_TS_DATA[5]

FE_TS_DATA[4]

FE_TS_DATA[2]

FE_TS_DATA[6]

FE_TS_DATA[7]

FE_TS_DATA[1]

FE_TS_DATA[0]

FE_TS_DATA[3]

C6526

0.1uF

16V

+5V_TU

C6519

10uF

10V

DVB_S&CHB

C6536

22uF

10V

C6522

0.1uF 16V

+3.3V_D_Demod

C6531

0.1uF

C6532

0.1uF

16V

LNB_TX

L6502

BLM18PG121SN1D

T2/C&CN

C6544 0.1uF

16V

L9_T2/C/S

C6512

100pF

DVB_S&CHB

/S2_RESET

CHB_DATA

L6503

BLM18PG121SN1D

CHB_SYNC

C6516

0.1uF

16V

T2/C&CHB&CN

IF_AGC

I2C_SCL4

R6509

33

L6501

BLM18PG121SN1D

DVB_S&CHB

C6506

18pF

50V

OPT

C6514

0.1uF

16V

I2C_SDA4

C6517

18pF

50V

OPT

+5V_TU

C6548

0.1uF

16V

+5V_NORMAL

I2C_SDA6

+3.3V_TU

+1.8V_TU

L6507

BLM18PG121SN1D

CHB

C6501

10uF

10V

CHB

+5V_TU

L6506

BLM18PG121SN1D

NOT_T/C&AT

C6546

10uF

10V

R6510

33

IF_P

+5V_TU

C6530

0.1uF

16V

R6504 22

DVB_S&CHB

C6523

100pF

50V

CHB

CHB_CLK

R6503 22

DVB_S&CHB

C6529

22uF

10V

C6525

0.1uF

16V

OPT

C6524

100pF

OPT

R6518

82

C6507

100pF

50V

T2/C&CHB&CN

R6527

20K

1%

NOT_T/C&AT

C6515

0.1uF

DVB_S&CHB

R6525

0

NOT_L9_T2/C/S

L6508

BLM18PG121SN1D

CHB

+3.3V_D_Demod

RF_SWITCH_CTL

C6528

10uF

6.3V

OPT

R6531

1

C6513

4700pF

50V CN

C6518

18pF

50V

OPT

R6529

10K

1%

NOT_T/C&AT

R6523

10K

TU_TS_ERR

+1.23V_TU

+5V_NORMAL

+3.3V_D_Demod

C6511

100pF

50V

+3.3V_TU

R6506 100 T/C&AT&CHB

+1.23V_TU

C6539

0.1uF

16V

R6528

11K

1%

NOT_T/C&AT

C6508

18pF

50V

OPT

+3.3V_TU

C6509

0.1uF

16V

CHB

TU_CVBS

C6520

0.1uF

16V

MTK/L9_DVB/ATSC/NTSC

+1.23V_TU

TU_TS_VAL

C6538

10uF

10V

NOT_T/C&AT

+3.3V_TU

TU_TS_VAL

CHB_VAL

/TU_RESET

L6500

BLM18PG121SN1D

FE_TS_VAL

FE_TS_DATA[0-7]

+3.3V_TU_IN

R6515

4.7K

FE_TS_CLK

0.1uF

C6540

R6519

1K

OPT

R6508

100

MTK/L9_DVB/ATSC/NTSC

IC6503

AZ1117BH-1.8TRE1

1

ADJ/GND

2OUT

3

IN

C6542

0.1uF

NOT_T/C&AT

+3.3V_TU

C6510

1000pF

50V CN

+1.8V_TU

R6500 0

RF_SWITCH

TU_TS_ERR

TUNER_SIF

C6549

10uF

16V

NOT_T/C&AT

I2C_SCL6

C6527

0.1uF

OPT

+3.3V_TU

CHB_ERR

IC6501

AP2132MP-2.5TRG1

EAN61387601

NOT_T/C&AT

3

VIN

2

EN

4

VCTRL

1

PG

5

NC

6

VOUT

7

ADJ

8

GND

9

[EP]

C6503

0.1uF

16V

RF_SWITCH

C6533

10uF

16V

NOT_T/C&AT

LNB_OUT

IF_N

FE_TS_SYNC

CHB_CVBS

R6513

10

DVB_S&CHB

R6512

2.2K

OPT

C6505

0.1uF

16V

+3.3V_D_Demod

R6511

100K

OPT

C6521

0.1uF

OPT

+3.3V_NORMAL

+1.8V_TU

C6500

0.1uF

16V

L9 ATSC

C6534

22uF

10V

LNB_OUT

LNB_TX CHB_CVBS

CHB_ERR

CHB_SYNC

CHB_VAL

CHB_CLK

CHB_DATA

ATV_OUT

ATV_OUT

C6535

1uF

OPT

IC6500

74LVC1G08GW

L9_T2/C/S

3

GND

2

A

4Y

1

B5VCC

R6526

100

L9_T2/C/S

1/16W

5%

AR6502

0

NOT_T/C&AT&CHB

AR6500 0

NOT_T/C&AT&CHB

AR6501

0

NOT_T/C&AT&CHB

R6516

470

Q6500

MMBT3906(NXP)

E

B

C

Q6501

MMBT3906(NXP)

E

B

C

R6532

0

MTK/L9_DVB/ATSC/NTSC

C6550

0.1uF

16V

C6551

100pF

50V

TU6500-*1

TDSS-H151F

AT_H/NIM_V

5+B1[3.3V]

11 DIF[N]

2RESET

10 DIF[P]

4SDA

1NC

9IF_AGC

8CVBS

3SCL

7+B2[1.8V]

6SIF

12

SHIELD

TU6500

TDSS-G151D

T/C_H/NIM_V

5

+B1[3.3V]

11

DIF[N]

2

RESET

10

DIF[P]

4

SDA

1

NC

9

IF_AGC

8

CVBS

3

SCL

7

+B2[1.8V]

6

SIF

12

SHIELD

TU6503

TDSQ-G051D

T/C/S2_V

1

N.C_1

2

RESET

3

SCL

4

SDA

5

+3.3V_TUNER

6

SIF

7

+1.8V_TUNER

8

CVBS

9

T/C_IF_AGC

10

T/C_DIF[P]

11

T/C_DIF[N]

12

N.C_2

13

N.C_3

14

N.C_4

15

GND_1

16

ERROR

17

SYNC

18

VALID

19

MCLK

20

D0

21

D1

22

D2

23

D3

24

D4

25

D5

26

D6

27

D7

28

GND_2

29

GND_3

30

+1.23V_S2_DEMOD

31

S2_RESET

38

SHIELD

32

+3.3V_S2_DEMOD

33

S2_F22_OUTPUT

34

S2_SCL

35

S2_SDA

36

LNB

37

GND_4

TU6502

TDSQ-H051F

CHB_V

1

+5V[SPLITTER]

2

RESET

3

TU_SCL

4

TU_SDA

5

M_+3.3V

6

M_SIF

7

M_+1.8V

8

M_CVBS

9

M_IF_AGC

10

M_DIF[P]

11

M_DIF[N]

12

S_3.3V

13

S_1.8V

14

S_CVBS

15

GND_1

16

SD_ERROR

17

SD_SYNC

18

SD_VALID

19

SD_MCLK

20

SD_SERIAL_D0

21

N.C_1

22

N.C_2

23

N.C_3

24

N.C_4

25

N.C_5

26

N.C_6

27

N.C_7

28

GND_2

29

GND_3

30

SD_1.23V_DEMOD

31

SD_RESET

36

SHIELD

32

SD_3.3V_DEMOD

33

N.C_8

34

SD_SCL

35

SD_SDA

TU6503-*1

TDSQ-G351D

T2/C/S2

1N.C_1

2RESET

3SCL

4SDA

5+B1[3.3V]

6SIF

7+B2[1.8V]

8CVBS

9N.C_2

10 N.C_3

11 N.C_4

12 +B3[3.3V]

13 +B4[1.23V]

14 N.C_5

15 GND_1

16 ERROR

17 SYNC

18 VALID

19 MCLK

20 D0

21 D1

22 D2

23 D3

24 D4

25 D5

26 D6

27 D7

28 GND_2

29 GND_3

30 +B5[1.23V]

31 S2_RESET

38

SHIELD

32 +B6[3.3V]

33 S2_F22_OUTPUT

34 S2_SCL

35 S2_SDA

36 LNB

37 GND_4

TU6501-*1

TDSN-B051F

BR_F/NIM_V

1RF_S/W_CTL

2RESET

3SCL

4SDA

5+B1[3.3V]

6SIF

7+B2[1.8V]

8CVBS

9NC_1

10 NC_2

11 NC_3

12 +B3[3.3V]

13 +B4[1.23V]

14 NC_4

15 GND

16 ERROR

17 SYNC

18 VALID

19 MCLK

20 D0

21 D1

22 D2

23 D3

24 D4

25 D5

26 D6

27 D7

28

SHIELD

TU6504

TDSH-T151F

TW_H/NIM

5

+B1[3.3V]

11

DIF[N]

2

RESET

10

DIF[P]

4

SDA

1

RF_S/W_CTL

9

IF_AGC

8

CVBS

3

SCL

7

+B2[1.8V]

6

SIF

12

SHIELD

TU6501

TDSN-G351D

T2/C_F/NIM_DEV

1

NC_1

2

RESET

3

SCL

4

SDA

5

+B1[3.3V]

6

SIF

7

+B2[1.8V]

8

CVBS

9

NC_2

10

NC_3

11

NC_4

12

+B3[3.3V]

13

+B4[1.23V]

14

NC_5

15

GND

16

ERROR

17

SYNC

18

VALID

19

MCLK

20

D0

21

D1

22

D2

23

D3

24

D4

25

D5

26

D6

27

D7

28

SHIELD

C6508-*1

68pF

50V

BR_TW_CN_TUNER

C6506-*1

68pF

50V

BR_TW_CN_TUNER

R6500-*1

1K 5%

BR_TW_CN_TUNER

R6508-*1

1K 5%

BR_TW_CN_TUNER

R6532-*1

BLM18PG121SN1D

BR_TW_CN_TUNER

120-ohm

R6528-*1

12K

1/16W

1%

CN

R6521

220

R6520

220

TU6501-*3

TDSN-C051D

CN_LG3921

1RF_S/W_CTL

2RESET

3SCL

4SDA

5+B1[3.3V]

6SIF

7+B2[1.8V]

8CVBS

9NC_1

10 NC_2

11 NC_3

12 +B3[3.3V]

13 +B4[1.23V]

14 NC_4

15 GND

16 ERROR

17 SYNC

18 VALID

19 MCLK

20 D0

21 D1

22 D2

23 D3

24 D4

25 D5

26 D6

27 D7

28

SHIELD

TU6501-*2

TDSN-C251D

CN_ATBM

1RF_S/W_CTL

2RESET

3SCL

4SDA

5+B1[3.3V]

6SIF

7+B2[1.8V]

8CVBS

9NC_1

10 NC_2

11 NC_3

12 +B3[3.3V]

13 +B4[1.23V]

14 NC_4

15 GND

16 ERROR

17 SYNC

18 VALID

19 MCLK

20 D0

21 D1

22 D2

23 D3

24 D4

25 D5

26 D6

27 D7

28

SHIELD

65

TUNER 2011.11.21

T2 : Max 1.7A

150mA(MAX)

close to TUNER

Vout=0.6*(1+R1/R2)

2. No via on both of them

Ground Width >= 24mils

1. should be guarded by ground

ERROR & VALID PIN

close to TUNER

RF_SWITCH_CTL USE: T2/C,T/C,ATSC,DTMB.ISDB-T

3. Signal Width >= 12mils

R2

2A

465mA(MAX)

should be guarded by groumd

T/C/S & H/NIM & T2/C TUNER(EU & CHINA)

R1

Signal to Signal Width = 12mils

else : Max 240mA

2012 perallel

because of derating

else : Max 0.7A

CHB : Max 480mA

T/C_H/NIM T/C/S2 T2/C_F/NIM T2/C/S2 CHB AT_H/NIM CN

CHB CN

DVB_S DVB_ST/C&AT&CHB T/C&AT&CHB

DVB_S&CHB DVB_S&CHB DVB_S&CHB

NOT_T/C&AT

NOT_T/C&AT

NOT_T/C&AT NOT_T/C&AT

NOT_T/C&AT

RF_SWITCH

T2/C

T2/C

T2/C&CN

T2/C&CHB&CN

T2/C&CN

T2/C&CHB&CN

T/C&AT&CHB

Close to the tuner

Close to the tuner Close to the tuner

close to TUNER

close to Tuner

Seperate GND for CHB

T/C&AT&CHB

T2/C&CHB&CN

NOT_T/C&AT&CHBNOT_T/C&AT&CHB

NOT_T/C&AT&CHB

NOT_T/C&AT&CHB

H/NIM&CHB

NOT_DVB_S

NOT_DVB_S

NOT_DVB_S

NOT_DVB_S

BR

L9_T2/C/S

Not_L9_T2/C/S

Not_L9_T2/C/S

Not_L9_T2/C/S Not_L9_T2/C/S

Not_L9_T2/C/S

Not_L9_T2/C/S

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

A_GND

LNB_OUT

DCDC_GND

DCDC_GND

A_GND

A_GND

R6901 33

LNB

A_GND

+12V

LNB_TX

L6900

33UH

SP-7850_33

LNB

R6900 33

LNB

C6907 0.22uF

LNB

A_GND

C6902

1uF

50V

LNB

+12V_LNB

DCDC_GND

C6906

68uF

35V

LNB

A_GND

I2C_SDA4

C6905 22000pF

LNB

I2C_SCL4

A_GND

R6903

4.7K

LNB

D6901

40V

LNB_SMAB34

C6900

0.22uF

25V

LNB

C6901

0.01uF

50V

LNB

D6903

40V

LNB_SMAB34

L6901

BLM18PG121SN1D

LNB

IC6900

A8290SETTR-T

LNB

1

BOOST

3

TCAP

7

TDI

9

VREG

10

SDA

11

ADD

12

SCL

13

NC_2

14

IRQ

15 NC_3

16 NC_4

17 NC_5

18 NC_6

19 BFC

20 NC_7

21 NC_8

22 BFO

23 NC_9

24 BFI

25 VIN

26 LX

27 GNDLX

28 LNB

5

TDO

8

GND

6

EXTM

4

NC_1

2

VCP 29

[EP]

C6908 27pF

OPT

C6903 0.1uF

LNB

C6909 27pF

OPT

D6902

40V

LNB_SMAB34

A_GND

+3.3V_NORMAL

DCDC_GND

A_GND

+12V_LNB

A_GND

C6911

0.1uF

50V

LNB

C6904

0.1uF

50V

LNB

C6912

68uF

35V

LNB

D6900

30V

MBR230LSFT1G

LNB

R6906

2.2K

1W

LNB

D6904

LNB

C6910

10uF

25V

LNB

R6904

0R6905

0

C6916

18pF

LNB

C6915

18pF

OPT

C6913

33pF

OPT

C6914

33pF

LNB

D6901-*1

40V

LNB_SX34

D6902-*1

40V

LNB_SX34

D6903-*1

40V

LNB_SX34

C6917

0.1uF

50V

LNB

C6918

0.1uF

50V

LNB

(Option:LNB)

DVB-S2 LNB Part Allegro

DCDC_GND and A_GND are connected in pin#27

3A

Max 1.3A

PCB_GND and A_GND are connected

Input trace widths should be sized to conduct at least 3A

2A

DCDC_GND and A_GND are connected

2.4A

close to Boost pin(#1)

Ouput trace widths should be sized to conduct at least 2A

close to VIN pin(#25)

69

LNB 2011.11.21

Close to Tuner

Surge protectioin

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

FRC3_RESET

TXA0N

TXA2P

TXB1P

C7202

0.1uF

16V

OPT

TXA1N

TXBCLKN

TXB3P

TXA3P

TXB2N

TXBCLKP

TXB4N

TXACLKN

TXA2N

TXA0P

TXB0N

TXA3N

TXA4N

PANEL_VCC

TXACLKP

TXA1P

TXB3N

C7200

10uF

16V

OPT

TXB4P

TXA4P

TXB1N

TXB2P

I2C_BE_SDA1

C7201

1000pF

50V

OPT

TXB0P

L7200

120-ohm

I2C_BE_SCL1

TP7204 LOCAL_DIM_EN

LOCAL_DIM_EN

I2C_BE_SDA1

I2C_BE_SCL1

FRC3_RESET

L/DIM0_SCLK

L/DIM0_MOSI

L/DIM0_SCLK

L/DIM0_MOSI

L/DIM0_VS

L/DIM0_VS

BPL_IN

FRC3_FLASH_WP

R7201

0

R7200

10K

P7200

FI-RE51S-HF-J-R1500

1NC

2NC

3NC

4NC

5NC

6NC

7LVDS_SEL

8NC

9NC

10 L/DIM_ENABLE

11 GND

12 RA0N

13 RA0P

14 RA1N

15 RA1P

16 RA2N

17 RA2P

18 GND

19 RACLKN

20 RACLKP

21 GND

22 RA3N

23 RA3P

24 RA4N

25 RA4P

26 GND

27 BIT_SEL

28 RB0N

29 RB0P

30 RB1N

31 RB1P

32 RB2N

33 RB2P

34 GND

35 RBCLKN

36 RBCLKP

37 GND

38 RB3N

39 RB3P

40 RB4N

41 RB4P

42 GND

43 GND

44 GND

45 GND

46 GND

47 NC

48 VLCD

49 VLCD

50 VLCD

51 VLCD

52

GND

72 100

Interface block

LG1152 A0

[51Pin LVDS Connector]

(For FHD FRC3 HS_LVDS)

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

I2C_SCL1

L/DIM0_SCLK

R7601

10K

+3.3V_NORMAL

L/DIM0_MOSI

R7607

4.7K

R7606 33

P7600

12507WR-08L

1

2

3

4

5

6

7

8

9

I2C_SDA1

L/DIM0_VS

R7600

10K

OPT AR7600

33

1/16W

LOCAL DIMMING

[To LED DRIVER]

76

LOCAL DIMMING 2011.11.21

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EMMC_DATA[5]

EMMC_DATA[0]

EMMC_DATA[2]

EMMC_DATA[1]

EMMC_DATA[4]

EMMC_DATA[7]

EMMC_DATA[3]

EMMC_DATA[6]

DAT4

DAT6

EMMC_RST

3.3V_EMMC

DAT5

DAT4

DAT5

C8104

0.1uF

16V

R8116

10K

DAT3

EMMC_CMD

C8103

2.2uF

10V

EMMC_VCCQ

EMMC_DATA[0-7]

C8106

2.2uF

10V

EMMC_VCCQ

C8107

10pF

50V

OPT

DAT6

C8102

0.1uF

16V

DAT3

R8117

10K

C8105

0.1uF

16V

EMMC_CLK

IC8100-*1

H26M21001ECR

HYNIX_EMMC_2GB

DAT0

A3

DAT1

A4

DAT2

A5

DAT3

B2

DAT4

B3

DAT5

B4

DAT6

B5

DAT7

B6

CLK

M6

CMD

M5

NC_3

A6

NC_4

A7

NC_23

C5

NC_42

E5

NC_43

E8

NC_44

E9

NC_45

E10

NC_52

F10

NC_58

G3

NC_59

G10

NC_66

H5

NC_73

J5

NC_80

K6

NC_81

K7

NC_82

K10

NC_116

P7

NC_119

P10

RESET

K5

VCCQ_1

C6

VCCQ_2

M4

VCCQ_3

N4

VCCQ_4

P3

VCCQ_5

P5

VCC_1

E6

VCC_2

F5

VCC_3

J10

VCC_4

K9

VDDI

C2

VSS_1

E7

VSS_2

G5

VSS_3

H10

VSS_4

K8

VSSQ_1

C4

VSSQ_2

N2

VSSQ_3

N5

VSSQ_4

P4

VSSQ_5

P6

NC_1

A1

NC_2

A2

NC_5

A8

NC_6

A9

NC_7

A10

NC_8

A11

NC_9

A12

NC_10

A13

NC_11

A14

NC_12

B1

NC_13

B7

NC_14

B8

NC_15

B9

NC_16

B10

NC_17

B11

NC_18

B12

NC_19

B13

NC_20

B14

NC_21

C1

NC_22

C3

NC_24

C7

NC_25 C8

NC_26 C9

NC_27 C10

NC_28 C11

NC_29 C12

NC_30 C13

NC_31 C14

NC_32 D1

NC_33 D2

NC_34 D3

NC_35 D4

NC_36 D12

NC_37 D13

NC_38 D14

NC_39 E1

NC_40 E2

NC_41 E3

NC_46 E12

NC_47 E13

NC_48 E14

NC_49 F1

NC_50 F2

NC_51 F3

NC_53 F12

NC_54 F13

NC_55 F14

NC_56 G1

NC_57 G2

NC_60 G12

NC_61 G13

NC_62 G14

NC_63 H1

NC_64 H2

NC_65 H3

NC_67 H12

NC_68 H13

NC_69 H14

NC_70 J1

NC_71 J2

NC_72 J3

NC_74 J12

NC_75 J13

NC_76 J14

NC_77 K1

NC_78 K2

NC_79 K3

NC_83 K12

NC_84 K13

NC_85 K14

NC_86 L1

NC_87 L2

NC_88 L3

NC_89 L12

NC_90 L13

NC_91 L14

NC_92 M1

NC_93 M2

NC_94 M3

NC_95 M7

NC_96 M8

NC_97 M9

NC_98 M10

NC_99 M11

NC_100 M12

NC_101 M13

NC_102 M14

NC_103 N1

NC_104 N3

NC_105 N6

NC_106 N7

NC_107 N8

NC_108 N9

NC_109 N10

NC_110 N11

NC_111 N12

NC_112 N13

NC_113 N14

NC_114 P1

NC_115 P2

NC_117 P8

NC_118 P9

NC_120 P11

NC_121 P12

NC_122 P13

NC_123 P14

EMMC_CLK_BALL

EMMC_CMD_BALL

EMMC_CMD_BALL

EMMC_CLK_BALL

EMMC_RESET_BALL

EMMC_RESET_BALL

EMMC_VDDI

EMMC_VDDI

DAT5

AR8100

22

1/16W

AR8101

22

1/16W

AR8102 22

R8100 10K

R8101 10K

R8102 10K

R8103 10K

R8104 10K

R8105 10K

R8106 10K

R8107 10K

IC8100-*3

H26M31001EFR

DEV_GED_HYNIX_EMMC_4GB

DAT0

A3

DAT1

A4

DAT2

A5

DAT3

B2

DAT4

B3

DAT5

B4

DAT6

B5

DAT7

B6

CLK

M6

CMD

M5

NC_3

A6

NC_4

A7

NC_23

C5

NC_42

E5

NC_43

E8

NC_44

E9

NC_45

E10

NC_52

F10

NC_58

G3

NC_59

G10

NC_66

H5

NC_73

J5

NC_80

K6

NC_81

K7

NC_82

K10

NC_116

P7

NC_119

P10

RESET

K5

VCCQ_1

C6

VCCQ_2

M4

VCCQ_3

N4

VCCQ_4

P3

VCCQ_5

P5

VCC_1

E6

VCC_2

F5

VCC_3

J10

VCC_4

K9

VDDI

C2

VSS_1

E7

VSS_2

G5

VSS_3

H10

VSS_4

K8

VSSQ_1

C4

VSSQ_2

N2

VSSQ_3

N5

VSSQ_4

P4

VSSQ_5

P6

NC_1

A1

NC_2

A2

NC_5

A8

NC_6

A9

NC_7

A10

NC_8

A11

NC_9

A12

NC_10

A13

NC_11

A14

NC_12

B1

NC_13

B7

NC_14

B8

NC_15

B9

NC_16

B10

NC_17

B11

NC_18

B12

NC_19

B13

NC_20

B14

NC_21

C1

NC_22

C3

NC_24

C7

NC_25 C8

NC_26 C9

NC_27 C10

NC_28 C11

NC_29 C12

NC_30 C13

NC_31 C14

NC_32 D1

NC_33 D2

NC_34 D3

NC_35 D4

NC_36 D12

NC_37 D13

NC_38 D14

NC_39 E1

NC_40 E2

NC_41 E3

NC_46 E12

NC_47 E13

NC_48 E14

NC_49 F1

NC_50 F2

NC_51 F3

NC_53 F12

NC_54 F13

NC_55 F14

NC_56 G1

NC_57 G2

NC_60 G12

NC_61 G13

NC_62 G14

NC_63 H1

NC_64 H2

NC_65 H3

NC_67 H12

NC_68 H13

NC_69 H14

NC_70 J1

NC_71 J2

NC_72 J3

NC_74 J12

NC_75 J13

NC_76 J14

NC_77 K1

NC_78 K2

NC_79 K3

NC_83 K12

NC_84 K13

NC_85 K14

NC_86 L1

NC_87 L2

NC_88 L3

NC_89 L12

NC_90 L13

NC_91 L14

NC_92 M1

NC_93 M2

NC_94 M3

NC_95 M7

NC_96 M8

NC_97 M9

NC_98 M10

NC_99 M11

NC_100 M12

NC_101 M13

NC_102 M14

NC_103 N1

NC_104 N3

NC_105 N6

NC_106 N7

NC_107 N8

NC_108 N9

NC_109 N10

NC_110 N11

NC_111 N12

NC_112 N13

NC_113 N14

NC_114 P1

NC_115 P2

NC_117 P8

NC_118 P9

NC_120 P11

NC_121 P12

NC_122 P13

NC_123 P14

DUMMY_1

DU1

DUMMY_2

DU2

DUMMY_3

DU3

DUMMY_4

DU4

DUMMY_5

DU5

DUMMY_6

DU6

DUMMY_7

DU7

DUMMY_8

DU8

DUMMY_9 DU9

DUMMY_10 DU10

DUMMY_11 DU11

DUMMY_12 DU12

DUMMY_13 DU13

DUMMY_14 DU14

DUMMY_15 DU15

DUMMY_16 DU16

IC8100-*2

KLM2G1HE3F-B001

SAMSUNG_EMMC_2GB

DAT0

A3

DAT1

A4

DAT2

A5

DAT3

B2

DAT4

B3

DAT5

B4

DAT6

B5

DAT7

B6

CLK

M6

CMD

M5

NC_3

A6

NC_4

A7

NC_23

C5

NC_42

E5

NC_43

E8

NC_44

E9

NC_45

E10

NC_52

F10

NC_58

G3

NC_59

G10

NC_66

H5

NC_73

J5

NC_80

K6

NC_81

K7

NC_82

K10

NC_116

P7

NC_119

P10

RSTN

K5

VDD_1

C6

VDD_2

M4

VDD_3

N4

VDD_4

P3

VDD_5

P5

VDDF_1

E6

VDDF_2

F5

VDDF_3

J10

VDDF_4

K9

VDDI

C2

VSS_1

C4

VSS_2

E7

VSS_3

G5

VSS_4

H10

VSS_5

K8

VSS_6

N2

VSS_7

N5

VSS_8

P4

VSS_9

P6

NC_1

A1

NC_2

A2

NC_5

A8

NC_6

A9

NC_7

A10

NC_8

A11

NC_9

A12

NC_10

A13

NC_11

A14

NC_12

B1

NC_13

B7

NC_14

B8

NC_15

B9

NC_16

B10

NC_17

B11

NC_18

B12

NC_19

B13

NC_20

B14

NC_21

C1

NC_22

C3

NC_24

C7

NC_25 C8

NC_26 C9

NC_27 C10

NC_28 C11

NC_29 C12

NC_30 C13

NC_31 C14

NC_32 D1

NC_33 D2

NC_34 D3

NC_35 D4

NC_36 D12

NC_37 D13

NC_38 D14

NC_39 E1

NC_40 E2

NC_41 E3

NC_46 E12

NC_47 E13

NC_48 E14

NC_49 F1

NC_50 F2

NC_51 F3

NC_53 F12

NC_54 F13

NC_55 F14

NC_56 G1

NC_57 G2

NC_60 G12

NC_61 G13

NC_62 G14

NC_63 H1

NC_64 H2

NC_65 H3

NC_67 H12

NC_68 H13

NC_69 H14

NC_70 J1

NC_71 J2

NC_72 J3

NC_74 J12

NC_75 J13

NC_76 J14

NC_77 K1

NC_78 K2

NC_79 K3

NC_83 K12

NC_84 K13

NC_85 K14

NC_86 L1

NC_87 L2

NC_88 L3

NC_89 L12

NC_90 L13

NC_91 L14

NC_92 M1

NC_93 M2

NC_94 M3

NC_95 M7

NC_96 M8

NC_97 M9

NC_98 M10

NC_99 M11

NC_100 M12

NC_101 M13

NC_102 M14

NC_103 N1

NC_104 N3

NC_105 N6

NC_106 N7

NC_107 N8

NC_108 N9

NC_109 N10

NC_110 N11

NC_111 N12

NC_112 N13

NC_113 N14

NC_114 P1

NC_115 P2

NC_117 P8

NC_118 P9

NC_120 P11

NC_121 P12

NC_122 P13

NC_123 P14

C8100

0.1uF

16V

OPT

IC8100

SDIN5D2-4G-974L1

GED_SANDISK_EMMC_4GB

DAT0

A3

DAT1

A4

DAT2

A5

DAT3

B2

DAT4

B3

DAT5

B4

DAT6

B5

DAT7

B6

CLK

M6

CMD

M5

NC_3

A6

NC_4

A7

NC_23

C5

NC_42

E5

NC_43

E8

NC_44

E9

NC_45

E10

NC_52

F10

NC_58

G3

NC_59

G10

NC_66

H5

NC_73

J5

NC_80

K6

NC_81

K7

NC_82

K10

NC_116

P7

NC_119

P10

RESET

K5

VCCQ_1

C6

VCCQ_2

M4

VCCQ_3

N4

VCCQ_4

P3

VCCQ_5

P5

VCC_1

E6

VCC_2

F5

VCC_3

J10

VCC_4

K9

VDDI

C2

VSS_1

E7

VSS_2

G5

VSS_3

H10

VSS_4

K8

VSSQ_1

C4

VSSQ_2

N2

VSSQ_3

N5

VSSQ_4

P4

VSSQ_5

P6

NC_1

A1

NC_2

A2

NC_5

A8

NC_6

A9

NC_7

A10

NC_8

A11

NC_9

A12

NC_10

A13

NC_11

A14

NC_12

B1

NC_13

B7

NC_14

B8

NC_15

B9

NC_16

B10

NC_17

B11

NC_18

B12

NC_19

B13

NC_20

B14

NC_21

C1

NC_22

C3

NC_24

C7

NC_25 C8

NC_26 C9

NC_27 C10

NC_28 C11

NC_29 C12

NC_30 C13

NC_31 C14

NC_32 D1

NC_33 D2

NC_34 D3

NC_35 D4

NC_36 D12

NC_37 D13

NC_38 D14

NC_39 E1

NC_40 E2

NC_41 E3

NC_46 E12

NC_47 E13

NC_48 E14

NC_49 F1

NC_50 F2

NC_51 F3

NC_53 F12

NC_54 F13

NC_55 F14

NC_56 G1

NC_57 G2

NC_60 G12

NC_61 G13

NC_62 G14

NC_63 H1

NC_64 H2

NC_65 H3

NC_67 H12

NC_68 H13

NC_69 H14

NC_70 J1

NC_71 J2

NC_72 J3

NC_74 J12

NC_75 J13

NC_76 J14

NC_77 K1

NC_78 K2

NC_79 K3

NC_83 K12

NC_84 K13

NC_85 K14

NC_86 L1

NC_87 L2

NC_88 L3

NC_89 L12

NC_90 L13

NC_91 L14

NC_92 M1

NC_93 M2

NC_94 M3

NC_95 M7

NC_96 M8

NC_97 M9

NC_98 M10

NC_99 M11

NC_100 M12

NC_101 M13

NC_102 M14

NC_103 N1

NC_104 N3

NC_105 N6

NC_106 N7

NC_107 N8

NC_108 N9

NC_109 N10

NC_110 N11

NC_111 N12

NC_112 N13

NC_113 N14

NC_114 P1

NC_115 P2

NC_117 P8

NC_118 P9

NC_120 P11

NC_121 P12

NC_122 P13

NC_123 P14

DUMMY_1

DU1

DUMMY_2

DU2

DUMMY_3

DU3

DUMMY_4

DU4

DUMMY_5

DU5

DUMMY_6

DU6

DUMMY_7

DU7

DUMMY_8

DU8

DUMMY_9 DU9

DUMMY_10 DU10

DUMMY_11 DU11

DUMMY_12 DU12

DUMMY_13 DU13

DUMMY_14 DU14

DUMMY_15 DU15

DUMMY_16 DU16

R8103-*1 47K

R8104-*1 47K

R8105-*1 47K

R8106-*1 47K

R8100-*1 47K

R8102-*1 47K

R8107-*1 47K

R8101-*1 47K

11.09.29

81

eMMC

eMMC I/F

Don’t Connect Power At VDDI

(Just Interal LDO Capacitor)

EMMC DATA LINE 47K PULL/UP

EMMC DATA LINE

10K PULL/UP

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+3.5V_ST

L8900

BLM18PG121SN1D

LOGO_LIGHT

P8900

12507WR-03L

LOGO_LIGHT

1

2

3

4

Q8900

MMBT3904(NXP)

LOGO_LIGHT

E

B

C

LOGO_LIGHT

R8900

100

LOGO_LIGHT

R8903

1K

LOGO_LIGHT

+3.5V_ST

R8901

10K

LOGO_LIGHT

R8902

10K

OPT

C8900

0.1uF

16V

LOGO_LIGHT

Place Near Micom

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R9309

100

C9308

0.1uF

16V OPT

R9308

100

SPI_DO

SOC_TXA3N

TXA3P

R9319 33

+3.3V_IO

TXB4N

TXB2P

SOC_TXA2P

R9311

100

R9304

100

R9334

4.7K

TMS

R9339 100 OPT

R9329

1M

C9304

0.1uF

16V OPT

SOC_TXB0P

TXB0N

R9336

100K

1/16W

SW9300

JTP-1127WEM

DEBUG

12

4 3

I2C_SDA2

R9302

100

R9337

33

SOC_TXB3N

+3.3V_XTAL_AVDD

C9354

0.1uF

16V OPT

TMODE0

+2.5V_LVDS_TX

TXA4P

R9331 0

DEBUG

SOC_TXA1P

P9300

12507WR-10L

DEBUG

1

2

3

4

5

6

7

8

9

10

11

R9312 33

+2.5V_LG1132

C9366

0.1uF

16V OPT

XTAL_OUT

R9328

10K

OPT

+3.3V_NORMAL

R9323 10K

TXB1P

I2C_SDA2

TMODE0

TXA0P

TMS

+2.5V_LVDS_RX

SOC_TXB2P

TXA4N

R9310

100

SPI_SCLK

R9324 10K

OPT

C9324

0.1uF

16V

SOC_TXA2N

SOC_TXA1N

R9338 100 OPT

TXB3N

TRST_N

+3.3V_NORMAL

TCK TCK

+3.3V_IO

SPI_SCLK

SOC_TXBCLKN

XTAL_IN

SMODE

TXB4P

SPI_DI

SPI_DO

TDO

SOC_TXB1P

TDO

R9307

100

SOC_TXA0P

C9364

0.1uF

16V OPT

+3.3V_XTAL_AVDD

C9348

0.1uF

16V OPT

+2.5V_AVDD

XTAL_OUT

R9303

100

SOC_TXB4P

TMODE1

+1.0V_PLL_VDD

SPI_SCLK

3D_DEPTH_RESET

+1.0VDC

XTAL_IN

FLASH_WP

SOC_TXBCLKP

TMODE3

I2C_SCL2

R9313 33

+3.3V_NORMAL

+2.5V_LVDS_RX

R9321 10K

NON_72INCH_LVDS_AB

R9340 100 OPT

SOC_TXA4P

R9330 0

OPT

+3.3V_IO

R9325 10K

TXA1N

TXA1P

R9335

10K

OPT

+1.0VDC

R9341 100 OPT

R9326 10K

OPT

SOC_TXB2N

SPI_DO

SPI_CS

C9365

0.1uF

TXB0P

C9323

0.1uF

16V OPT

TMODE3

R9301

100

SOC_TXA3P

TXB2N

SOC_TXA4N

TRST_N

TXACLKP

C9314

0.1uF

16V

R9317 33

+2.5V_LVDS_TX

SOC_TXB1N

R9316 33

C9327

0.1uF

16V OPT

R9315 33

TXB3P

+2.5V_AVDD

FLASH_WP

R9318 33

TXBCLKP

+3.3V_NORMAL

+2.5V_LVDS_TX

TMODE0

SOC_TXB4N

R9305

100

R9343

3.3K

+2.5V_LG1132

C9300

0.1uF

16V OPT

TDI

SOC_TXA0N

TMODE1

TMODE2

C9328

0.1uF

16V

TXACLKN

TXA0N

C9359

0.1uF

16V

SPI_DI

R9314 33

+2.5V_LVDS_RX

3D_DEPTH_RESET

R9342 100

+3.3V_NORMAL

R9320 10K

OPT

C9322

0.1uF

16V OPT

TXB1N

SOC_TXB0N

C9326

0.1uF

16V OPT

TXA2N

+2.5V_LG1132

SPI_CS

R9322 10K

OPT

I2C_SCL2

SOC_TXACLKP

3D_DEPTH_RESET

SOC_TXACLKN

+1.0VDC

+1.0VDC

C9321

0.1uF

16V OPT

R9327 10K

R9306

100

C9363

0.1uF

16V

TXA2P

SPI_DI SMODE

SPI_CS

TDI

TMODE2

+3.3V_XTAL_AVDD

+3.3V_IO

SOC_TXB3P

+1.0V_PLL_VDD

TXBCLKN

R9300

100

TXA3N

C9330

0.1uF

16V

+2.5V_AVDD

I2C_SCL2

I2C_SDA2

I2C_SCL1

I2C_SDA1

R9344

0

OPT

R9345

0

OPT

P9301

12507WS-04L

DEBUG

1

2

3

4

5

+3.3V_NORMAL

IC9301

W25X40BVSSIG

LG1132_FLASH

3

WP

2

DO[IO1]

4

GND

1

CS

5DI[IO0]

6CLK

7HOLD

8VCC

C9315

4.7uF

10V

C9318

4.7uF

10V

C9316

4.7uF

10V

C9319

4.7uF

10V

C9317

4.7uF

10V

C9320

4.7uF

10V

C9357

4.7uF

10V

C9352

4.7uF

10V

C9310

4.7uF

10V

C9307

4.7uF

10V

C9303

4.7uF

10V

C9301

4.7uF

10V

C9353

4.7uF

10V

C9361

4.7uF

10V

C9336

4.7uF

+1.0V_PLL_VDD

+1.0VDC

R9333 0

OPT

R9332 0

OPT

MDS62110213

M9301 ALBLOCK

MDS62110213

M9302 ALBLOCK

MDS62110213

M9300 ALBLOCK

MDS62110213

M9303 ALBLOCK

TXCCLKN

TXDCLKN

TXC4N

TXC1N

TXC4P

TXD0P

TXC3N

TXC2P

TXC0N

TXD3P

TXDCLKP

TXD3N

TXD2N

TXC3P

TXC1P

TXC0P

TXD4N

TXCCLKP

TXC2N

TXD1P

TXD0N

TXD4P

TXD1N

TXD2P

TXD0P

TXD0N

TXC3N

TXACLKN

TXD3N

TXD4P

TXDCLKNTXBCLKN

TXD1P

TXD3P

TXCCLKP

TXA4N

TXA1N

TXA4P

TXB0P

TXA3N

TXC0N

TXA2P

TXA0N

TXB3P

TXD1N

TXBCLKP

TXB3N

TXD4N

TXB2N

TXA3P

TXDCLKP

TXA1P

TXC4N

TXD2P

TXA0P

TXB4N

TXACLKP

TXCCLKN

TXC3P

TXD2N

TXC2P

TXC2N

TXC1P

TXA2N

TXB1P

TXB0N

TXC1N

TXB4P

TXC4P

TXC0P

TXB1N

TXB2P

L9300

BLM18SG121TN1D

L9302

BLM18SG121TN1D

L9303

BLM18SG121TN1D

L9305

BLM18SG121TN1D

L9304

BLM18SG121TN1D

L9309

BLM18SG121TN1D

C9360

10uF

10V

C9312

10uF

10V

C9311

10uF

10V

C9356

10uF

10V

IC9300

LG1132

RXA0P

AB17

RXA0N

AA17

RXA1P

Y16

RXA1N

Y17

RXA2P

AA16

RXA2N

AB16

RXACLKP

AB15

RXACLKN

AA15

RXA3P

Y14

RXA3N

Y15

RXA4P

AA14

RXA4N

AB14

RXB0P

AB13

RXB0N

AA13

RXB1P

Y12

RXB1N

Y13

RXB2P

AA12

RXB2N

AB12

RXBCLKP

AB11

RXBCLKN

AA11

RXB3P

Y10

RXB3N

Y11

RXB4P

AA10

RXB4N

AB10

RXC0P

AB9

RXC0N

AA9

RXC1P

Y8

RXC1N

Y9

RXC2P

AA8

RXC2N

AB8

RXCCLKP

AB7

RXCCLKN

AA7

RXC3P

Y6

RXC3N

Y7

RXC4P

AA6

RXC4N

AB6

RXD0P

AB5

RXD0N

AA5

RXD1P

Y4

RXD1N

Y5

RXD2P

AA4

RXD2N

AB4

RXDCLKP

AB3

RXDCLKN

AA3

RXD3P

Y2

RXD3N

Y3

RXD4P

AA2

RXD4N

AB2

UART_RXD

D3

UART_TXD

D2

SPI_SCLK

C2

SPI_CS

C1

SPI_DI

B1

SPI_DO

B2

SDA_M

E2

SCL_M

E1

SDA_S

D1

SCL_S

E3

SMODE

F2

TMODE0

F1

TMODE1

G3

TMODE2

G2

TMODE3

G1

TRST_N

H1

TDO

H3

TDI

H2

TCK

J3

TMS

J2

PORES_N

F3

XTALO

AB21

XTALI

AA21

TXA0P A10

TXA0N B10

TXA1P C9

TXA1N C10

TXA2P B9

TXA2N A9

TXACLKP A8

TXACLKN B8

TXA3P C7

TXA3N C8

TXA4P B7

TXA4N A7

TXB0P A6

TXB0N B6

TXB1P C5

TXB1N C6

TXB2P B5

TXB2N A5

TXBCLKP A4

TXBCLKN B4

TXB3P C3

TXB3N C4

TXB4P B3

TXB4N A3

TXC0P A18

TXC0N B18

TXC1P C17

TXC1N C18

TXC2P B17

TXC2N A17

TXCCLKP A16

TXCCLKN B16

TXC3P C15

TXC3N C16

TXC4P B15

TXC4N A15

TXD0P A14

TXD0N B14

TXD1P C13

TXD1N C14

TXD2P B13

TXD2N A13

TXDCLKP A12

TXDCLKN B12

TXD3P C11

TXD3N C12

TXD4P B11

TXD4N A11

GPIO[0] Y1

GPIO[1] W3

GPIO[2] W2

GPIO[3] W1

GPIO[4] V3

GPIO[5] V2

GPIO[6] V1

GPIO[7] U3

GPIO[8] U2

GPIO[9] U1

GPIO[10] T3

GPIO[11] T2

GPIO[12] T1

GPIO[13] R3

GPIO[14] R2

GPIO[15] R1

GPIO[16] P3

GPIO[17] P2

GPIO[18] P1

GPIO[19] N3

GPIO[20] N2

GPIO[21] N1

GPIO[22] M3

GPIO[23] M2

GPIO[24] M1

GPIO[25] L1

GPIO[26] L2

GPIO[27] L3

GPIO[28] K1

GPIO[29] K2

GPIO[30] K3

GPIO[31] J1

IC9300

LG1132

VDD_1

H8

VDD_2

H9

VDD_3

H14

VDD_4

H15

VDD_5

J8

VDD_6

J15

VDD_7

K8

VDD_8

K15

VDD_9

L8

VDD_10

L15

VDD_11

M8

VDD_12

M15

VDD_13

N8

VDD_14

N15

VDD_15

P8

VDD_16

P15

VDD_17

R8

VDD_18

R9

VDD_19

R10

VDD_20

R11

VDD_21

R12

VDD_22

R13

VDD_23

R14

VDD_24

R15

VDD33_1

F4

VDD33_2

G4

VDD33_3

H4

VDD33_4

J4

VDD33_5

K4

VDD33_6

L4

VDD33_7

M4

VDD33_8

N4

VDD33_9

P4

VDD33_10

R4

VDD33_11

T4

VDD33_12

U4

LVRX_VDD25_1

W7

LVRX_VDD25_2

W8

LVRX_VDD25_3

W9

LVRX_VDD25_4

W10

LVRX_VDD25_5

W11

LVRX_VDD25_6

W12

LVRX_VDD25_7

W13

LVRX_VDD25_8

W14

LVTX_VDD10_1

H10

LVTX_VDD10_2

H11

LVTX_VDD10_3

H12

LVTX_VDD10_4

H13

LVTX_VDD25_1

D7

LVTX_VDD25_2

D8

LVTX_VDD25_3

D9

LVTX_VDD25_4

D10

LVTX_VDD25_5

D11

LVTX_VDD25_6

D12

LVTX_VDD25_7

D13

LVTX_VDD25_8

D14

LVTX_VDD25_9

D15

LVTX_VDD25_10

D16

DISP_VDD

Y21

DR3P_VDD

Y22

SSP_VDD

AA22

XTAL_VDD

Y20

DISP_AVDD

AA19

DR3P_AVDD

AA20

SSP_AVDD

AB20

XTAL_AVDD

AB19

VSS_1

A2

VSS_2

A19

VSS_3

B19

VSS_4

C19

VSS_5

D4

VSS_6

D5

VSS_7

D6

VSS_8

D17

VSS_9

D18

VSS_10

D19

VSS_11

E4

VSS_12

E5

VSS_13

E6

VSS_14

E7

VSS_15

E8

VSS_16

E9

VSS_17

E10

VSS_18

E11

VSS_19

E12

VSS_20

E13

VSS_21

E14

VSS_22

E15

VSS_23

E16

VSS_24 E17

VSS_25 E18

VSS_26 F5

VSS_27 F18

VSS_28 G5

VSS_29 G18

VSS_30 H5

VSS_31 H18

VSS_32 J5

VSS_33 J9

VSS_34 J10

VSS_35 J11

VSS_36 J12

VSS_37 J13

VSS_38 J14

VSS_39 J18

VSS_40 K5

VSS_41 K9

VSS_42 K10

VSS_43 K11

VSS_44 K12

VSS_45 K13

VSS_46 K14

VSS_47 K18

VSS_48 L5

VSS_49 L9

VSS_50 L10

VSS_51 L11

VSS_52 L12

VSS_53 L13

VSS_54 L14

VSS_55 L18

VSS_56 M5

VSS_57 M9

VSS_58 M10

VSS_59 M11

VSS_60 M12

VSS_61 M13

VSS_62 M14

VSS_63 M18

VSS_64 N5

VSS_65 N9

VSS_66 N10

VSS_67 N11

VSS_68 N12

VSS_69 N13

VSS_70 N14

VSS_71 N18

VSS_72 P5

VSS_73 P9

VSS_74 P10

VSS_75 P11

VSS_76 P12

VSS_77 P13

VSS_78 P14

VSS_79 P18

VSS_80 R5

VSS_81 R18

VSS_82 T5

VSS_83 T18

VSS_84 T19

VSS_85 U5

VSS_86 U18

VSS_87 U19

VSS_88 V4

VSS_89 V5

VSS_90 V6

VSS_91 V7

VSS_92 V8

VSS_93 V9

VSS_94 V10

VSS_95 V11

VSS_96 V12

VSS_97 V13

VSS_98 V14

VSS_99 V15

VSS_100 V16

VSS_101 V17

VSS_102 V18

VSS_103 V19

VSS_104 W4

VSS_105 W5

VSS_106 W6

VSS_107 W15

VSS_108 W16

VSS_109 W17

VSS_110 W18

VSS_111 W19

VSS_112 W20

VSS_113 W21

VSS_114 W22

VSS_115 Y18

VSS_116 Y19

VSS_117 AA1

VSS_118 AA18

VSS_119 AB18

X9300

24.75MHz

4GND_2

1

X-TAL_1

2

GND_1 3X-TAL_2

C9333

30pF

50V

C9339

30pF

50V

3D Depth

LG1152 B0 2011. 11. 28

XTAL(24.75MHz)

+3.3V Power Separation

+1.0VDC Decaps

LG1132 Has Internal Pull-up

SPI FLASH(4M Bit)

TEST MODE Configuration

System Configuration

+2.5V LVDS_RX Decaps

SPI/I2C For Aardvak Interface

Default Setting

All ’H’ = Normal Operation Mode

LG1132 HW RESET

Monitoring Pins for

3D-Depth Interanl status

+3.3V_IO Decaps

Default Setting(’0’)

0 : Boot From Ext. Flash(Normal Booting)

1 : Internal RAM Boot (JTAG Booting)

+2.5V LVDS_TX Decaps

+1.0V Power Separation

TMODE[3:0]

0000 => System PLL Test

0001 => LVDS Rx Isolation Test

0010 => LVDS Tx Isolation Test

0011 => LVDS Bypass Test

0100 => ALL PLL Test

1001 => DDR PLL IsolationTest

1010 => Functional Test

1011 => MBIST

1100 => Scan Test(Normal)

1101 => Scan Test (Adaptive)

1110 => Display PLL Test

1111 => Normal Operation

+1.0V_XTAL/DDR3 PLL/SS PLL/DIS PLL_VDD

+2.5V DDR PLL/SS PLL/DIS PLL AVDD Decaps

+3.3V XTAL AVDD Decaps

For Heat Sink

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

DDR_DATA[15]

DDR_DATA[15]

DDR_A[6]

DDR_A[12]

DDR_DATA[11]

DDR_A[13]

DDR_A[1]

DDR_A[4]

DDR_DATA[4]

DDR_DATA[6]

DDR_DATA[3]

DDR_DATA[7]

DDR_DATA[5]

DDR_DATA[12]

DDR_A[11]

DDR_DATA[0]

DDR_A[10]

DDR_DATA[7]

DDR_DATA[9]

DDR_A[2]

DDR_DATA[5]

DDR_A[3]

DDR_DATA[12]

DDR_DATA[0]

DDR_DATA[1]

DDR_A[4]

DDR_DATA[14]

DDR_A[6]

DDR_A[13]

DDR_DATA[9]

DDR_A[0]

DDR_A[12]

DDR_DATA[6]

DDR_A[9]

DDR_A[7]

DDR_A[5]

DDR_A[2]

DDR_DATA[2]

DDR_DATA[10]

DDR_DATA[8]

DDR_A[8]

DDR_DATA[8]

DDR_A[8]

DDR_A[10]

DDR_DATA[1]

DDR_DATA[10]

DDR_DATA[13]

DDR_DATA[2]

DDR_A[5]

DDR_DATA[3]

DDR_DATA[4]

DDR_DATA[13]

DDR_DATA[11]

DDR_A[3]

DDR_A[11]

DDR_DATA[14]

DDR_A[7]

DDR_A[0]

DDR_A[1]

DDR_A[9]

DDR_WEN

+0.75V_VREF_D1

DDR_A[0-13]

+0.75V_VREF_D0

DDR_RESET_N

+0.75V_VREF_M1

C9418

0.1uF

DDR_DQS[0]

R9403 240

1%

DDR_CASN

+1.5VQ

DDR_CLKN

DDR_BA[2]

H5TQ1G63DFR-PBC

IC9400

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC

N7

A13

T3

A15

M7

BA0

M2

BA1

N8

BA2

M3

CK

J7

CK

K7

CKE

K9

CS

L2

ODT

K1

RAS

J3

CAS

K3

WE

L3

RESET

T2

DQSL

F3

DQSL

G3

DQSU

C7

DQSU

B7

DML

E7

DMU

D3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

DQU0

D7

DQU1

C3

DQU2

C8

DQU3

C2

DQU4

A7

DQU5

A2

DQU6

B8

DQU7

A3

VREFCA M8

VREFDQ H1

ZQ L8

VDD_1 B2

VDD_2 D9

VDD_3 G7

VDD_4 K2

VDD_5 K8

VDD_6 N1

VDD_7 N9

VDD_8 R1

VDD_9 R9

VDDQ_1 A1

VDDQ_2 A8

VDDQ_3 C1

VDDQ_4 C9

VDDQ_5 D2

VDDQ_6 E9

VDDQ_7 F1

VDDQ_8 H2

VDDQ_9 H9

NC_1 J1

NC_2 J9

NC_3 L1

NC_4 L9

NC_6 T7

VSS_1 A9

VSS_2 B3

VSS_3 E1

VSS_4 G8

VSS_5 J2

VSS_6 J8

VSS_7 M1

VSS_8 M9

VSS_9 P1

VSS_10 P9

VSS_11 T1

VSS_12 T9

VSSQ_1 B1

VSSQ_2 B9

VSSQ_3 D1

VSSQ_4 D8

VSSQ_5 E2

VSSQ_6 E8

VSSQ_7 F9

VSSQ_8 G1

VSSQ_9 G9

R9411

1K

1%

DDR_CKE

DDR_BA[2]

C9409

0.1uF

C9404

0.1uF

C9406

0.1uF

+1.5VQ

C9417

1000pF

R9407

1K

1%

DDR_RESET_N

DDR_BA[0]

+1.5VQ

R9408

1K

1%

R9409

1K

1%

+1.5V_LG1132

+1.5VQ

R9401 100 1%

C9402

0.1uF

DDR_DQS_N[0]

DDR_DM[0]

DDR_ODT

DDR_DQS[0]

C9411

0.1uF

+0.75V_VREF_M1

DDR_DQS[1]

DDR_CLKN

DDR_BA[0]

DDR_A[0-13]

DDR_DQS_N[1]

C9408

0.1uF

C9400

0.1uF

+1.5VQ

DDR_DATA[0-15]

+1.5VQ

C9421

1000pF

DDR_CLK

DDR_DM[1]

R9405

1K

1%

C9415

0.1uF

+0.75V_VREF_D0

DDR_CLK

DDR_BA[1]

R9410

1K

1%

C9412

0.1uF

OPT

C9416

0.1uF

OPT

DDR_DM[1]

DDR_CASN

C9410

1000pF

+0.75V_VREF_D1

DDR_RASN

DDR_DATA[0-15]

+0.75V_VREF_M0

+0.75V_VREF_D1

DDR_BA[1]

C9405

0.1uF

OPT

C9419

0.1uF

DDR_ODT

R9402

240 1%

C9422

1000pF

C9413

0.1uF

DDR_DQS_N[1]

DDR_CKE

+0.75V_VREF_M0

+0.75V_VREF_D0

DDR_RASN

+1.5VQ

C9403

0.1uF

DDR_DQS[1]

C9414

0.1uF

OPT

DDR_DM[0]

DDR_DQS_N[0]

C9420

0.1uF

R9406

1K

1%

+1.5VQ

+1.5VQ

DDR_WEN

R9404

1K

1%

C9401

4.7uF

C9407

4.7uF

L9400

BLM18SG121TN1D

IC9300

LG1132

DDR_A[0]

V21

DDR_A[1]

B22

DDR_A[2]

V20

DDR_A[3]

T20

DDR_A[4]

C22

DDR_A[5]

T21

DDR_A[6]

C21

DDR_A[7]

T22

DDR_A[8]

C20

DDR_A[9]

U22

DDR_A[10]

D22

DDR_A[11]

B21

DDR_A[12]

D20

DDR_A[13]

U21

DDR_A[14]

B20

DDR_DQ[0]

M22

DDR_DQ[1]

G20

DDR_DQ[2]

N20

DDR_DQ[3]

F22

DDR_DQ[4]

N22

DDR_DQ[5]

F20

DDR_DQ[6]

N21

DDR_DQ[7]

F21

DDR_DQ[8]

H21

DDR_DQ[9]

L22

DDR_DQ[10]

G22

DDR_DQ[11]

M20

DDR_DQ[12]

H22

DDR_DQ[13]

L21

DDR_DQ[14]

H20

DDR_DQ[15]

L20

DDR_CK

E22

DDR_CK_N

E21

DDR_DQS[0]

K22

DDR_DQS_N[0]

K21

DDR_DQS[1]

J22

DDR_DQS_N[1]

J21

DDR_CKE

E20

DDR_WE_N

R20

DDR_RAS_N

P20

DDR_CAS_N

P21

DDR_ODT

P22

DDR_DM[0]

G21

DDR_DM[1]

M21

DDR_BA[0]

R21

DDR_BA[1]

D21

DDR_BA[2]

R22

DDR_RST_N

U20

DDR_ZQ_CAL

A20

DDR_VREF0

V22

DDR_VREF1

A21

DDR_VDDQ_1

E19

DDR_VDDQ_2

F19

DDR_VDDQ_3

G19

DDR_VDDQ_4

H19

DDR_VDDQ_5

J19

DDR_VDDQ_6

J20

DDR_VDDQ_7

K19

DDR_VDDQ_8

K20

DDR_VDDQ_9

L19

DDR_VDDQ_10

M19

DDR_VDDQ_11

N19

DDR_VDDQ_12

P19

DDR_VDDQ_13

R19

R9400

200

LG1132 DDR3

LG1132 DDR3 2011. 06 .28

Connect A13 for

Using 2Gbit Memory

DDR0 PHY VREF

DDR3 1.5V Decaps - Place these caps near Memory

Connect A13 for

Using 2Gbit Memory

DDR3 1.5V/0.75V Decap

- Place these caps near IC101

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+1.0VDC

+1.5V_LG1132

+1.5V_DDR

L9500

BLM18PG121SN1D

+1.0V_VDD

R9500

10K

+5V_USB

2200pF

C9501

50V

+3.3V_NORMAL

C9513

10uF

10V

10uF

C9500

10V

+2.5V_LG1132

C9514

0.1uF

16V

R9501

2K

1%

R9502

4.3K

1%

IC9500

AP7173-SPG-13 HF(DIODES)

3

VCC

2

PG

4

EN

1

IN

5GND

6SS

7FB

8OUT

9

[EP]

C9502

10uF

16V

UD

L9503

3.6uH

UD

C9504

1uF

10V

UD

L9501

BLM18PG121SN1D

UD

C9503

100pF

50V

UD

+12V

C9508

22uF

10V

OPT

C9507

22uF

10V

UD

IC9501

TPS54327DDAR

UD

3

VREG5

2

VFB

4

SS

1

EN

5GND

6SW

7VBST

8VIN

9

[EP]GND

C9506

0.1uF

16V

UD

POWER_ON/OFF2_3 R9504

10K

UD

C9505

3300pF

50V

UD

+1.0VDC

L9502

CIC21J501NE

NON_UD

+1.0V_VDD

R9503

11K

1%

UD

R9505

33K

1%

UD

ZD9500

5.48VTO5.76V

LG1132 POWER

LG1132 Power 2011. 06. 28

Max 2000 mA

LG1152 for 1.0V

Vout=0.8*(1+R1/R2)

1.5A

3D-Depth Analog for 2.5V

+2.5V

R2

R1

Max 600 mA

3A

Switching freq: 700K

R2

L9 CORE for 1.0V

Vout=0.765*(1+R1/R2)

R1

Max 2000 mA

READY

(UD Model only / LG1132 DDR=792Mh)

**NON UD Model

LG1132 DDR = 668Mhz

LG1152 1.0V ==> IC2306

LG1132 1.0V ==> IC2306

LG1132 DDR = 792Mhz

LG1152 1.0V ==> IC2501

LG1132 1.1V ==> IC2306

**UD Model

Place near USB JACK

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SIGN100013

R10019 0

R10009

100

R10024

20K

1/16W

1%

MOTOR_SENSOR_UP

R10012

20K

MOTOR_SENSOR

C10009

0.1uF

50V

R10025

22K

1/10W

1%

MOTOR_SENSOR_UP

R10036

0

MOTOR_SENSOR_UP

R10002

1K

1/16W

1%

MOTOR_SENSOR

R10020 0

OPT

C10008

0.1uF

50V

MOTOR_SENSOR

L10001

MLB-201209-0120P-N2

JP10006

R10026

10K

OPT

C10013

0.1uF

50V

MOTOR_SENSOR_UP

C10000

0.1uF

50V

OPT

R10003

10K

1/16W

1%

MOTOR_SENSOR

C10002

0.1uF

25V

MOTOR_SENSOR

MOTOR-

R10021 0

MOTOR_SENSOR_UP

JP10007

+3.3V_NORMAL

R10000

18K

1/16W

1%

MOTOR_SENSOR

C10006

0.1uF

50V

MOTOR_SENSOR

R10022

4.7K

P10000

12507WR-06L

1

2

3

4

5

6

7

MOTOR_SENSOR

R10034 1

R10010 0

MOTOR_SENSOR

MOTOR_OPEN_SW

L/DIM0_VS

R10030

20K

MOTOR_SENSOR_UP

R10007

10K

R10008

100

R10005

51K

1/8W

1%

MOTOR_SENSOR

R10006

10K

+3.3V_NORMAL

JP10002

Q10001

MMBT3906(NXP)

MOTOR_SENSOR

E

B

C

R10029

100

D10000

BAT54SWT1

MOTOR_SENSOR

AAC

C

R10001

22K

1/16W

1%

MOTOR_SENSOR

MOTOR-

C10001

0.1uF

50V

OPT

MOTOR_SENSOR

+12V_MOTOR

C10012

0.1uF

50V

R10013

10K

OPT

R10035

10K

MOTOR_SENSOR_UP

JP10005

Q10000

2SC3052

MOTOR_SENSOR

E

B

C

+3.3V_NORMAL

R10018 0

OPT

+12V_MOTOR

R10027 0

MOTOR_SENSOR

R10016 0

MOTOR_SENSOR

L10002

MLB-201209-0120P-N2

R10028

100

R10014

22K

1/16W

1%

MOTOR_SENSOR

JP10004

C10014

0.1uF

50V

MOTOR_SENSOR_UP

+12V

ZD10001

8.2V

UDZS8.2B

MOTOR_SENSOR_O

C10011

10uF

50V

R10015

12K

1/10W

1%

MOTOR_SENSOR

IC10000

KA4558D

MOTOR_SENSOR

3

3

2

2

4

4

1

1

55

66

77

88

C10003

0.1uF

50V

MOTOR_SENSOR

C10010

0.1uF

50V

MOTOR_SENSOR_UP

+12V_MOTOR

C10007

0.1uF

50V

MOTOR_SENSOR

MOTOR+

MOTOR+

R10011

10K

MOTOR_SENSOR

MO_SENS_TO_MAIN_DOWN

MOTOR_CCW

C10004

0.1uF

16V

MOTOR_CLOSE_SW

+12V_MOTOR

JP10001

A_DIM

R10023

4.7K

+12V_MOTOR

+12V_MOTOR

R10004

1K

1/10W

1%

MOTOR_SENSOR

ZD10000

8.2V

UDZS8.2B

R10017 0

L10003

MLB-201209-0120P-N2

L10000

MLB-201209-0120P-N2

JP10003

MO_SENS_TO_MAIN_UP

IC10001

BD6222HFP

1

VREF

2

OUT1

3

FIN

4

GND

5

RIN

6

OUT2

7

VCC

JP10000

MOTOR_SENSOR_O

C10005

0.1uF

16V

R10033 1

MOTOR_SENSOR

MOTOR_SENSOR_O

MOTOR_CW

2011.07.01

MOTOR CONTROL

GP4

CLOSE

MOTOR SENSOR OPTION

MOTOR DRIVER

OPEN

Close to IC7406

MOTOR Ground

MAX 1500mA

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R11019

0

IR_Bla JK11001

KJA-PH-0-0177

IR_Bla

3DETECT

4L

5GND

1R

D11001

IR_Bla

C11005

22pF

50V

IR_Bla

C11003

22pF

50V

IR_Bla

X11001

8MHz

IR_Bla

IRB_SPI_CK

IRB_SPI_SS

IRB_SPI_MISO

IRB_SPI_MOSI R11006 22 IR_Bla

R11007 22 IR_Bla

R11008 22 IR_Bla

R11009 22 IR_Bla

P11001

12507WS-04L

IR_Bla

1

2

3

4

5

JP11002

JP11001

IR_B_RESET

+3.3V_IR_Bla

+3.3V_IR_Bla

10uF

10V

C11004

IR_Bla

C11006

0.1uF

16V

OPT

+3.3V_IR_Bla

L11001

BLM18PG121SN1D

IR_Bla

+3.3V_IR_Bla

R11022

4.7K

IR_Bla

+3.3V_NORMAL +3.3V_IR_Bla

+5V_NORMAL

C11009

0.1uF

16V

OPT

R11021

10K

IR_Bla

Q11003

MMBT3904(NXP)

IR_Bla

E

B

C

R11001 1K

IR_Bla

C11010

0.1uF

16V

IR_Bla

D11002

IR_Bla

IC11002

MC96FR3128R

DEV_IR_Bla

3

XOUT

2

XIN

4

P20/RESETB

1

VSS

6

P11/KS9/MISO1

5

P10/KS8/MOSI1

7

P12/KS10/INT0

8

P13/KS11/INT1

9

P14/KS12/SS1/INT2

10

P15/KS13/XCK1/INT3

11

P16/KS14/MOSI0

12

P17/KS15/MISO0

13

P30/SS0/EC2/EXTREF

14

P31/XCK0/SENSOR 15 P36/INT0/XCK0

16 P37/INT1/SS0

17 P00/KS0/T0

18 P01/KS1/T1/PWM1

19 P02/KS2/T2

20 P03/KS3/T3/PWM3

21 P04/KS4/EC0

22 P05/KS5/EC3

23 P06/KS6

24 P07/KS7

25 P21/INT2/DSCL

26 P22/INT3/DSDA

27 REMOUT

28 VDD

Q11002

AO3438

IR_Bla

G

D

S

R11015 100

IR_Bla

Q11001

SBT2222A_AUK

IR_Bla

E

B

C

R11020

0

IR_Bla

C11008

10uF

IR_Bla

IR Blaster/Boost

LG1152 A1 2011. 06. 02

IR_B Micom Download

IR BLASTER

DSCL

DSDA

94

Close to JK11001

Pattern Width : 0.5mm Pattern Width : 0.5mm

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R154

100

1%

R162 33

RXBCLKP

+3.3V_IO

+3.3V_IO

R166

10K

R125 33

RXA3N

FLASH_WP

RXA2N

I2C_SDA_PQ

C120 0.1uF

+0.9VDC

TDO

C125

0.1uF

16V

C154

10uF

25V

RXA1N

+3.3V

R120

100

1%

RXB2P

R134 0

RXACLKP

C112 0.1uF

P102

12507WR-04L

1

2

3

4

5

I2C_SDA_S

I2C_SDA_PQ

RXA1P

R169

47K

OPT

I2C_SDA_S

R181 33

RXB2N

TCK

R110

100

1%

+0.9VDC

R172

4.7K

R178 0

C148

10uF

25V

XTAL_OUT

R118

100

1%

R152 33

TMS

R130 33

RXB0N

+3.3V

R175

1K

SPI_SCLK

C115 0.1uF

I2C_SCL_PQ

C118 0.1uF

+3.3V

P103

12507WR-04L

1

2

3

4

5

+1.8LVDS_TX

R124 33

SPI_DI

+3.3V

TX5P

RXB4P

SPI_CS

R135 0

C100

27pF

50V

R173

4.7K

+0.9AVDD

TX7P

C114 0.1uF

C122 0.1uF

3.3K

R102

XTAL_IN

R117

100

1%

+3.3V

+1.8V

I2C_SCL_S

R127 33

+1.8LVDS_RX

R105

3.3K

R167

47K

TDI

RXBCLKN

SPI_CS

TDO

TX7N

R115

100

1%

TX0N

+3.3V

RXB3N

TX2N

+0.9AVDD

RXB4N

C116 0.1uF

R155

100

1%

R129 33

R156 33 OPT

C113 0.1uF

XTAL_IN

+0.9VDC

FLASH_WP

C151

10uF

25V

C103

33pF

50V

OPT

C159

0.1uF

16V

R148 33 OPT

C162

0.1uF

16V

R101 10K

C111 0.1uF

+1.8LVDS_RX

C149

0.1uF

16V

SPI_DO

R158

10K

OPT

IC101

MX25L3206EM2I-12G

SPI_FLASH

3

WP#

2

SO/SIO1

4

GND

1

CS#

5SI/SIO0

6SCLK

7HOLD#

8VCC

R104

3.3K

3D_LR

UART_TX

R128 33

TDI

R133 0

+3.3V_IO

RXA0P

SPI_SCLK

C104

27pF

50V

C109 0.1uF

SPI_DL_MODE

C163

0.1uF

16V

R176 0

OPT

R149 33

UART_TX

SPI_DI

P100

12507WR-10L

1

2

3

4

5

6

7

8

9

10

11

SPI_DO

SPI_DO

C121 0.1uF

R150 33 OPT

R180 33

TX3P

R121

100

1%

TX5N

R131 33

TX_LOCK

C119 0.1uF

+1.8LVDS_RX

+0.9VDC

C107

33pF

50V

OPT

C161

0.1uF

16V

UART_RX

SPI_CS

TX6P

C105

33pF

50V

OPT

TX0P

FLASH_WP

RXA4N

LG1122_RST

+3.3V

R122

100

1%

RXA0N

R163 33 OPT

RXB3P

SPI_DL_MODE

RXB1N

R177 0

OPT

SPI_SCLK

C108 0.1uF

R138 33 OPT

SW100

JTP-1127WEM

12

4 3

R153 33

R136 33 OPT

TX1N

+1.8LVDS_TX

RXB1P

RXA4P

UART_RX

R174

3.3K

+0.9AVDD

R159

33

RXB0P

RBF

R179 0

R123

100

1%

R183 33

+1.8LVDS_TX

R103

3.3K

AGP_EN

R160 33

I2C_SCL_PQ

C110 0.1uF

R168

10K

R161 33

TRST_N

3D_EN

TRST_N

R113

10K

P101

12507WR-08L

1

2

3

4

5

6

7

8

9

TCK

R109

100

1%

R114

100

1%

R106

1M

TX4P

RXA2P

SPI_DI

+3.3V

TX4N

+0.9VDC

R157

4.7K

TX3N

R139 0 OPT

TX6N

TX2P

+1.8V

RXACLKN

R132 33

I2C_SCL_S

TX1P

+1.8V

C157

10uF

25V

R182 33

RXA3P

R126 33

C123 0.1uF

C124

0.1uF

R137 33 OPT

+1.8V_AVDD

+1.8LVDS_RX

TMS

R151 33 OPT

XTAL_OUT

C117 0.1uF

R146 33

+0.9V

PWM_BPL

R164 33

R165 33

+3.3V

R112

1K

R111

1K

L102

MLB-201209-0120P-N2

L100

MLB-201209-0120P-N2

L101

MLB-201209-0120P-N2

L103

MLB-201209-0120P-N2 L105

MLB-201209-0120P-N2

C126

4.7uF

10V

C127

4.7uF

10V

C129

4.7uF

10V

C131

4.7uF

10V

C134

4.7uF

10V

C135

4.7uF

10V

C137

4.7uF

10V

C139

4.7uF

10V

C144

4.7uF

10V

C153

4.7uF

10V

+1.8V

C142

4.7uF

10V

C152

4.7uF

10V

L104

MLB-201209-0120P-N2

+1.8V_AVDD +1.8V_AVDD

C158

0.1uF

16V

R185

10K

OPT

+3.3V

3.3K

R186

OPT

L/DIM0_SCLK

L/DIM0_MOSI

L/DIM0_VS

R107

10K

120Hz

R108

10K

W/O_TCON

+3.3V

R116

10K

W_TCON

R119

10K

240Hz

+3.3V

SOC_OPT

+3.3V

R170

10K

L9(LG1152)

R171

10K

MTK

SOC_OPT

FRAME_OPT

DISPLAY_OPT

REVERSE_OPT

TCON_OPT

TCON_OPTFRAME_OPT

+3.3V

R189

10K

OLED

R190

10K

LCD

R187

10K

IMAGE_NORMAL

+3.3V

R188

10K

IMAGE_REVERSE

REVERSE_OPT DISPLAY_OPT

R191 0

IC100

LG1122

RXA0P

AC1

RXA0N

AC2

RXA1P

AB3

RXA1N

AC3

RXA2P

AB2

RXA2N

AB1

RXACLKP

AA1

RXACLKN

AA2

RXA3P

Y3

RXA3N

AA3

RXA4P

Y2

RXA4N

Y1

RXB0P

W1

RXB0N

W2

RXB1P

V3

RXB1N

W3

RXB2P

V2

RXB2N

V1

RXBCLKP

U1

RXBCLKN

U2

RXB3P

T3

RXB3N

U3

RXB4P

T2

RXB4N

T1

L_VSOUT_LD

B26

R_VSOUT_LD

E2

M0_SCLK

C26

M0_MOSI

E22

M1_SCLK

D24

M1_MOSI

G22

M2_SCLK

D2

M2_MOSI

E1

M3_SCLK

D1

M3_MOSI

D3

UART_RXD

G3

UART_TXD

H3

SPI_SCLK

G1

SPI_CS

G2

SPI_DI

F2

SPI_DO

F1

SDA_M

J1

SCL_M

J2

SDA_S

H1

SCL_S

H2

SMODE

K2

TMODE0

J3

TMODE1

K3

TMODE2

L3

TMODE3

M3

TRST_N

M2

TDO

L1

TDI

L2

TCLK

M1

TMS

N1

PORES_N

K1

XTALO

AF6

XTALI

AE6

MON_SYNC0

N2

MON_SYNC1

N3

MON_INTR

P3

VIREF_REXT

C1

TX_LOCKN

C2

GPIO[0]

AB5

GPIO[1]

AB4

GPIO[2]

AD5

GPIO[3]

AC5

GPIO[4]

AE4

GPIO[5]

AD4

GPIO[6]

AC4

GPIO[7]

AF3

GPIO[8]

AE3

GPIO[9]

AD3

GPIO[10]

AF2

GPIO[11]

AE2

GPIO[12]

AD2

GPIO[13]

AE1

GPIO[14]

B25

GPIO[15]

B24

TX0P B2

TX0N A2

TX1P A3

TX1N B3

TX2P C4

TX2N C3

TX3P B4

TX3N A4

TX4P A5

TX4N B5

TX5P C6

TX5N C5

TX6P B6

TX6N A6

TX7P A7

TX7N B7

TXA0P A23

TXA0N B23

TXA1P C22

TXA1N C23

TXA2P B22

TXA2N A22

TXACLKP A21

TXACLKN B21

TXA3P C20

TXA3N C21

TXA4P B20

TXA4N A20

TXB0P A19

TXB0N B19

TXB1P C18

TXB1N C19

TXB2P B18

TXB2N A18

TXBCLKP A17

TXBCLKN B17

TXB3P C16

TXB3N C17

TXB4P B16

TXB4N A16

TXC0P A15

TXC0N B15

TXC1P C14

TXC1N C15

TXC2P B14

TXC2N A14

TXCCLKP A13

TXCCLKN B13

TXC3P C12

TXC3N C13

TXC4P B12

TXC4N A12

TXD0P A11

TXD0N B11

TXD1P C10

TXD1N C11

TXD2P B10

TXD2N A10

TXDCLKP A9

TXDCLKN B9

TXD3P C8

TXD3N C9

TXD4P B8

TXD4N A8

GPIO[16] C25

GPIO[17] C24

GPIO[18] AD1

GPIO[19] R1

GPIO[20] R2

GPIO[21] R3

GPIO[22] P1

GPIO[23] A25

GPIO[24] D23

GPIO[25] D22

GPIO[26] F22

GPIO[27] E23

GPIO[28] E3

GPIO[29] F3

GPIO[30] A24

GPIO[31] P2

IC100

LG1122

VSS_1

B1

VSS_2

C7

VSS_3

D4

VSS_4

D5

VSS_5

D6

VSS_6

D7

VSS_7

D8

VSS_8

D18

VSS_9

D19

VSS_10

D20

VSS_11

D21

VSS_12

D25

VSS_13

D26

VSS_14

E4

VSS_15

E5

VSS_16

E6

VSS_17

E7

VSS_18

E8

VSS_19

E9

VSS_20

E10

VSS_21

E11

VSS_22

E12

VSS_23

E13

VSS_24

E14

VSS_25

E15

VSS_26

E16

VSS_27

E17

VSS_28

E18

VSS_29

E19

VSS_30

E21

VSS_31

E24

VSS_32

F5

VSS_33

F7

VSS_34

F8

VSS_35

F9

VSS_36

F10

VSS_37

F11

VSS_38

F12

VSS_39

F13

VSS_40

F14

VSS_41

F15

VSS_42

F16

VSS_43

F17

VSS_44

F18

VSS_45

F19

VSS_46

F21

VSS_47

F23

VSS_48

G5

VSS_49

G21

VSS_50

G23

VSS_51

H5

VSS_52

H8

VSS_53

H9

VSS_54

H10

VSS_55

H11

VSS_56

H12

VSS_57

H13

VSS_58

H14

VSS_59

H15

VSS_60

H16

VSS_61

H17

VSS_62

H18

VSS_63

H19

VSS_64

H21

VSS_65

H22

VSS_66

H23

VSS_67

J5

VSS_68

J8

VSS_69

J19

VSS_70

J21

VSS_71

J22

VSS_72

K4

VSS_73

K5

VSS_74

K8

VSS_75

K10

VSS_76

K11

VSS_77

K12

VSS_78

K13

VSS_79

K14

VSS_80

K15

VSS_81

K16

VSS_82

K17

VSS_83

K19

VSS_84

K21

VSS_85

K22

VSS_86

L4

VSS_87

L5

VSS_88

L8

VSS_89

L10

VSS_90

L11

VSS_91

L12

VSS_92

L13

VSS_93

L14

VSS_94

L15

VSS_95

L16

VSS_96

L17

VSS_97

L19

VSS_98

L21

VSS_99

L22

VSS_100

M4

VSS_101

M5

VSS_102

M6

VSS_103

M8

VSS_104

M10

VSS_105

M11

VSS_106

M12

VSS_107

M13

VSS_108

M14

VSS_109

M15

VSS_110

M16

VSS_111

M17

VSS_112

M19

VSS_113

M21

VSS_114

M22

VSS_115

N4

VSS_116

N5

VSS_117

N6

VSS_118

N8

VSS_119

N10

VSS_120

N11

VSS_121

N12

VSS_122

N13

VSS_123

N14

VSS_124

N15

VSS_125

N16

VSS_126

N17

VSS_127

N19

VSS_128

N21

VSS_129

N22

VSS_130

N24

VSS_131

P4

VSS_132

P5

VSS_133

P6

VSS_134

P8

VSS_135 P10

VSS_136 P11

VSS_137 P12

VSS_138 P13

VSS_139 P14

VSS_140 P15

VSS_141 P16

VSS_142 P17

VSS_143 P19

VSS_144 P21

VSS_145 P22

VSS_146 P24

VSS_147 R4

VSS_148 R5

VSS_149 R6

VSS_150 R8

VSS_151 R10

VSS_152 R11

VSS_153 R12

VSS_154 R13

VSS_155 R14

VSS_156 R15

VSS_157 R16

VSS_158 R17

VSS_159 R19

VSS_160 R21

VSS_161 R22

VSS_162 T5

VSS_163 T6

VSS_164 T8

VSS_165 T10

VSS_166 T11

VSS_167 T12

VSS_168 T13

VSS_169 T14

VSS_170 T15

VSS_171 T16

VSS_172 T17

VSS_173 T19

VSS_174 T21

VSS_175 T22

VSS_176 U5

VSS_177 U6

VSS_178 U8

VSS_179 U10

VSS_180 U11

VSS_181 U12

VSS_182 U13

VSS_183 U14

VSS_184 U15

VSS_185 U16

VSS_186 U17

VSS_187 U19

VSS_188 U21

VSS_189 U22

VSS_190 V5

VSS_191 V6

VSS_192 V8

VSS_193 V19

VSS_194 V21

VSS_195 V22

VSS_196 W5

VSS_197 W6

VSS_198 W8

VSS_199 W9

VSS_200 W10

VSS_201 W11

VSS_202 W12

VSS_203 W13

VSS_204 W14

VSS_205 W15

VSS_206 W16

VSS_207 W17

VSS_208 W18

VSS_209 W19

VSS_210 W21

VSS_211 W22

VSS_212 Y4

VSS_213 Y5

VSS_214 Y21

VSS_215 Y22

VSS_216 AA4

VSS_217 AA7

VSS_218 AA8

VSS_219 AA9

VSS_220 AA10

VSS_221 AA11

VSS_222 AA12

VSS_223 AA13

VSS_224 AA14

VSS_225 AA15

VSS_226 AA16

VSS_227 AA17

VSS_228 AA18

VSS_229 AA19

VSS_230 AA20

VSS_231 AA21

VSS_232 AA22

VSS_233 AA23

VSS_234 AB6

VSS_235 AB7

VSS_236 AB8

VSS_237 AB9

VSS_238 AB10

VSS_239 AB11

VSS_240 AB12

VSS_241 AB13

VSS_242 AB14

VSS_243 AB15

VSS_244 AB16

VSS_245 AB17

VSS_246 AB18

VSS_247 AB19

VSS_248 AB20

VSS_249 AB21

VSS_250 AB22

VSS_251 AB23

VSS_252 AC6

VSS_253 AC7

VSS_254 AC8

VSS_255 AC9

VSS_256 AC10

VSS_257 AC23

VSS_258 AC24

VSS_259 AC25

VSS_260 AC26

VSS_261 AD6

VSS_262 AD7

VSS_263 AD8

VSS_264 AD17

VSS_265 AD18

VSS_266 AE8

VSS_267 AF4

VSS_268 AF8

IC100

LG1122

VDD_1

J9

VDD_2

J10

VDD_3

J11

VDD_4

J16

VDD_5

J17

VDD_6

J18

VDD_7

K9

VDD_8

K18

VDD_9

L9

VDD_10

L18

VDD_11

M9

VDD_12

M18

VDD_13

N9

VDD_14

N18

VDD_15

P9

VDD_16

P18

VDD_17

R9

VDD_18

R18

VDD_19

T9

VDD_20

T18

VDD_21

U9

VDD_22

U18

VDD_23

V9

VDD_24

V10

VDD_25

V11

VDD_26

V12

VDD_27

V13

VDD_28

V14

VDD_29

V15

VDD_30

V16

VDD_31

V17

VDD_32

V18

VDD33_1 F6

VDD33_2 F20

VDD33_3 G6

VDD33_4 H6

VDD33_5 J6

VDD33_6 K6

VDD33_7 L6

VDD33_8 Y6

VDD33_9 AA6

VDD18_1 E20

VDD18_2 F4

VDD18_3 G4

VDD18_4 H4

VDD18_5 J4

VDD18_6 AA5

LVRX_VDD18_1 T4

LVRX_VDD18_2 U4

LVRX_VDD18_3 V4

LVRX_VDD18_4 W4

LVTX_VDD18_1 D9

LVTX_VDD18_2 D10

LVTX_VDD18_3 D11

LVTX_VDD18_4 D12

LVTX_VDD18_5 D13

LVTX_VDD18_6 D14

LVTX_VDD18_7 D15

LVTX_VDD18_8 D16

LVTX_VDD18_9 D17

LVTX_VDD_1 J12

LVTX_VDD_2 J13

LVTX_VDD_3 J14

LVTX_VDD_4 J15

AVDD09_1 AE7

AVDD09_2 AF7

AVDD18_1 AE5

AVDD18_2 AF5

OPT_READY_1

OPT_READY_2

L/DIMMING_OPT

R142

10K

OPT

R144

10K

OPT

R143

10K R145

10K

+3.3V +3.3V

R140

10K

L/D_ON_FRC

R141

10K

L/D_ON_MAIN

OPT_READY_2

+3.3V

OPT_READY_1L/DIMMING_OPT

X100

24.75MHz

4GND_2

1

X-TAL_1

2

GND_1 3X-TAL_2

PANEL_CTL

R147

3.3K

FRC-III(LG1122) 1 6

XTAL(24.75MHz)

+3.3V Power Separation

RESET Input

1) LG1122_RST : From Main SOC

2) HW_RESET : From HW Switch

3) SPI_DL_MODE : Download Mode to Flash Mem

+0.9V Power Separation

SPI/I2C For Aardvak Interface

+0.9VDC Decaps

+3.3V_IO Decaps

SPI FLASH(4MByte)

+0.9AVDD Decaps

+1.8VLVDS_RX Decaps

UART For CPU

The Vx1_HS Tx AC-coupling Caps must be

placed near by LG1122

+1.8VLVDS_TX Decaps

GPIO[1:0]

: Local Dimming Debugging

GPIO[7:3] = PWM[4:0]

1) GPIO[3] : 120Hz Mode --> 60 or 120Hz (Programmable)

240Hz Mode --> 120 or 240Hz (Programmable)

2) GPIO[4] : 120Hz Mode --> 60 or 120Hz (Programmable)

240Hz Mode --> 120 or 240Hz (Programmable)

3) GPIO[5] : 120Hz Mode --> 120 or 240Hz (Programmable)

240Hz Mode --> 240 or 480Hz (Programmable)

4) GPIO[6] : 120Hz Mode --> 120Hz (Fixed)

240Hz Mode --> 240Hz (Fixed)

5) GPIO[7] : 120Hz Mode --> 120Hz (Fixed)

240Hz Mode --> 240Hz (Fixed)

GPIO[8]

: External Vsync input for Local Dimming block

GPIO[10]

: T-Con L/R Sync Monitor(AR)

GPIO[12:11]

: S/W I2C_Master CH

GPIO[26:16]

: BLU Direct Control CH

GPIO[28:27]

: I2C for PQ tunning

For JTAG Interface

All of OPT decaps must be placed on PCB Bottom side

Vx1_HS output swing level control

via external resistor

I2C For PQ tunning

I2C Slave Address

0x1C (Direct access)

0xB2 (In-direct access)

+1.8V Power Separation

240Hz Back-End Board 2011. 07. 05

Write Protection

- HIGH : Normal Operation

- LOW : Write Protection

Will be deleted pull-up resistor from B0+3D Depth B’d

READY FOR H/W OPTION

OPT_READY_1

11

(for 72INCH)

JIG_OPT

240Hz

OPT_READY_2

With_TCON

IMAGE_OPT

OPTION NAME LOW

20

21

DISPLAY_OPT OLED

22

IMAGE_NORMAL

L/D_ON_FRC

OPT

L9 (LG1152)

120Hz

13

GPIO NO

15

MTK

OPT

FRAME_OPT

Default

Without_TCON

(for FRC3 JIG)

12

L/D_ON_MAIN

(for NON_72INCH)

IMAGE_OPT

SOC_OPT

Default

14

L/DIMMING_OPT

HIGH

LCD

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

DDR0_DATA[14]

DDR0_A[0]

DDR0_A[7]

DDR1_A[0]

DDR0_A[6]

DDR0_DATA[12]

DDR1_A[2]

DDR0_DATA[10]

DDR1_DATA[1]

DDR0_DATA[8]

DDR1_DATA[12]

DDR1_DATA[14]

DDR0_A[10]

DDR0_DATA[11]

DDR0_DATA[4]

DDR0_A[5]

DDR1_A[4]

DDR1_A[6]

DDR1_DATA[13]

DDR0_DATA[0]

DDR1_A[4]

DDR1_A[6]

DDR0_DATA[12]

DDR0_DATA[7]

DDR1_A[2]

DDR0_A[3]

DDR1_DATA[6]

DDR1_A[0]

DDR1_A[10]

DDR1_DATA[0]

DDR0_A[10]

DDR1_A[12]

DDR1_DATA[8]

DDR0_A[9]

DDR0_DATA[5]

DDR1_A[7]

DDR0_A[8]

DDR1_DATA[14]

DDR1_DATA[7]

DDR0_DATA[4]

DDR0_A[5]

DDR0_DATA[5]

DDR0_A[11]

DDR0_DATA[2]

DDR1_A[8]

DDR0_A[12]

DDR0_A[7]

DDR0_A[9]

DDR1_DATA[6]

DDR0_A[11]

DDR1_A[3]

DDR1_DATA[10]

DDR1_DATA[10]

DDR1_DATA[8]

DDR1_DATA[7]

DDR1_DATA[11]

DDR0_DATA[9]

DDR1_DATA[4]

DDR0_A[1]

DDR0_A[3]

DDR1_DATA[13]

DDR0_A[2]

DDR1_DATA[3]

DDR1_A[8]

DDR0_A[4]

DDR1_A[1]

DDR1_A[1]

DDR1_A[9]

DDR1_A[5]

DDR0_A[2]

DDR0_DATA[1]

DDR1_DATA[4]

DDR0_A[8]

DDR0_A[12]

DDR1_DATA[3]

DDR0_DATA[15]

DDR1_A[12]

DDR1_DATA[15]

DDR0_DATA[10]

DDR1_A[11]

DDR0_DATA[2]

DDR1_DATA[12]

DDR1_DATA[9]

DDR0_DATA[0]

DDR0_A[0]

DDR0_DATA[6]

DDR0_A[4]

DDR1_A[11]

DDR0_DATA[9]

DDR1_A[3]

DDR0_DATA[1]

DDR0_A[6]

DDR1_DATA[9]

DDR0_DATA[8]

DDR1_DATA[15]

DDR1_A[7]

DDR1_DATA[2]

DDR0_DATA[6]

DDR0_DATA[15]

DDR1_A[9]

DDR1_DATA[0]

DDR0_DATA[7]

DDR1_DATA[2]

DDR0_A[1]

DDR0_DATA[11]

DDR1_DATA[5]

DDR1_A[5]

DDR0_DATA[14]

DDR1_DATA[11]

DDR0_DATA[13]

DDR0_DATA[3]

DDR0_DATA[3]

DDR1_A[10]

DDR0_DATA[13]

DDR1_DATA[5]

DDR1_DATA[1]

DDR0_BA[2]

DDR1_CKE

R222 100 1%

C237

0.1uF

DDR0_BA[0]

DDR1_DM[1]

R210

1K

1%

R216 240

1%

DDR0_RASN

DDR1_RASN

DDR0_WEN

C238

0.1uF

DDR0_A[0-12]

DDR1_DM[0]

DDR0_BA[1]

DDR0_RESET_N

+1.5V

C224

0.1uF

R207

1K

1%

+0.75V_VREF1_D0

C241

0.1uF

DDR1_DQS_N[1]

+1.5VQ1

DDR1_DATA[0-15]

R219

1K

1%

+0.75V_VREF1_M0

DDR1_A[0-12]

DDR1_BA[0]

+0.75V_VREF0_D1

DDR1_BA[1]

C203

0.1uF

C229

0.1uF

C232

0.1uF

DDR1_RESET_N

C217

0.1uF

R209

1K

1%

+1.5VQ0

DDR1_DQS_N[0]

DDR0_BA[1]

DDR0_BA[0]

+1.5VQ0

DDR1_DQS[1]

C226

0.1uF

C236

0.1uF

DDR1_CASN

R205

1K

1%

C227

1000pF

DDR1_CASN

C209

0.1uF

DDR0_CLK

DDR1_DQS[0]

+0.75V_VREF1_D1

DDR1_A[0-12]

DDR1_DATA[0-15]

DDR0_DATA[0-15]

+1.5VQ0

C228

0.1uF

C230

1000pF

DDR0_CLKN

DDR1_WEN

C202

0.1uF

+0.75V_VREF0_D0

R217

1K

1%

C225

1000pF

DDR1_ODT

C223

0.1uF

C221

1000pF

+1.5VQ1

DDR1_BA[2]

DDR0_CKE

C201

0.1uF

R223

240 1%

DDR0_CLKN

DDR0_CLK

DDR1_RASN

DDR1_ODT

+1.5VQ0

+0.75V_VREF0_D0

R203

1K

1%

+1.5VQ1

DDR0_DATA[0-15]

R211 240

1%

+0.75V_VREF1_D1

DDR1_DQS_N[1]

+0.75V_VREF1_D0

C220

0.1uF

DDR1_CLK

C210

0.1uF

DDR0_DQS_N[1]

+1.5VQ0

DDR0_DM[0]

+1.5VQ1

DDR1_BA[2]

+1.5V

DDR0_ODT

DDR1_CKE

+1.5VQ1

+1.5VQ0

R204

1K

1%

DDR0_DQS[0]

DDR0_CASN

DDR1_BA[0]

DDR0_DQS[0]

DDR0_RASN

+0.75V_VREF0_D1

R208

1K

1%

C212

0.1uF

+0.75V_VREF1_M0

DDR1_CLKN

C218

1000pF

R202

240 1%

C216

0.1uF

DDR0_DQS_N[0]

DDR0_DQS_N[0]

C204

0.1uF

DDR1_CLKN

DDR0_DQS[1]

R214

1K

1%

C206

0.1uF

+0.75V_VREF1_D1

+1.5VQ0

C215

1000pF

C214

0.1uF

+0.75V_VREF1_M1

DDR0_DM[0]

+1.5VQ1

R212

1K

1%

+1.5VQ0

DDR1_DM[0]

R206

1K

1%

DDR0_RESET_N

DDR0_DQS[1]

+0.75V_VREF0_M0

+0.75V_VREF0_M0

C233

1000pF

C242

0.1uF

DDR0_CKE

C213

1000pF

+0.75V_VREF1_M1

DDR0_A[0-12]

+1.5VQ1

DDR1_DQS[0]

DDR1_WEN

DDR1_RESET_N

+0.75V_VREF0_D1

R218

1K

1%

R215

1K

1%

C244

0.1uF

R201 100 1%

DDR0_BA[2]

DDR0_DM[1]

+0.75V_VREF1_D0

+0.75V_VREF0_M1

C211

0.1uF

C235

0.1uF

DDR0_DQS_N[1]

DDR0_DM[1]

R220

1K

1%

DDR1_DQS[1]

DDR1_DM[1]

DDR0_ODT

DDR1_DQS_N[0]

+1.5VQ1

DDR1_CLK

R213

1K

1%

+0.75V_VREF0_M1

H5TQ1G63DFR-PBC

IC200

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC

N7

A13

T3

A15

M7

BA0

M2

BA1

N8

BA2

M3

CK

J7

CK

K7

CKE

K9

CS

L2

ODT

K1

RAS

J3

CAS

K3

WE

L3

RESET

T2

DQSL

F3

DQSL

G3

DQSU

C7

DQSU

B7

DML

E7

DMU

D3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

DQU0

D7

DQU1

C3

DQU2

C8

DQU3

C2

DQU4

A7

DQU5

A2

DQU6

B8

DQU7

A3

VREFCA M8

VREFDQ H1

ZQ L8

VDD_1 B2

VDD_2 D9

VDD_3 G7

VDD_4 K2

VDD_5 K8

VDD_6 N1

VDD_7 N9

VDD_8 R1

VDD_9 R9

VDDQ_1 A1

VDDQ_2 A8

VDDQ_3 C1

VDDQ_4 C9

VDDQ_5 D2

VDDQ_6 E9

VDDQ_7 F1

VDDQ_8 H2

VDDQ_9 H9

NC_1 J1

NC_2 J9

NC_3 L1

NC_4 L9

NC_6 T7

VSS_1 A9

VSS_2 B3

VSS_3 E1

VSS_4 G8

VSS_5 J2

VSS_6 J8

VSS_7 M1

VSS_8 M9

VSS_9 P1

VSS_10 P9

VSS_11 T1

VSS_12 T9

VSSQ_1 B1

VSSQ_2 B9

VSSQ_3 D1

VSSQ_4 D8

VSSQ_5 E2

VSSQ_6 E8

VSSQ_7 F9

VSSQ_8 G1

VSSQ_9 G9

DDR0_CASN

+0.75V_VREF0_D0

DDR0_WEN

DDR1_BA[1]

+1.5VQ1

H5TQ1G63DFR-PBC

IC201

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC

N7

A13

T3

A15

M7

BA0

M2

BA1

N8

BA2

M3

CK

J7

CK

K7

CKE

K9

CS

L2

ODT

K1

RAS

J3

CAS

K3

WE

L3

RESET

T2

DQSL

F3

DQSL

G3

DQSU

C7

DQSU

B7

DML

E7

DMU

D3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

DQU0

D7

DQU1

C3

DQU2

C8

DQU3

C2

DQU4

A7

DQU5

A2

DQU6

B8

DQU7

A3

VREFCA M8

VREFDQ H1

ZQ L8

VDD_1 B2

VDD_2 D9

VDD_3 G7

VDD_4 K2

VDD_5 K8

VDD_6 N1

VDD_7 N9

VDD_8 R1

VDD_9 R9

VDDQ_1 A1

VDDQ_2 A8

VDDQ_3 C1

VDDQ_4 C9

VDDQ_5 D2

VDDQ_6 E9

VDDQ_7 F1

VDDQ_8 H2

VDDQ_9 H9

NC_1 J1

NC_2 J9

NC_3 L1

NC_4 L9

NC_6 T7

VSS_1 A9

VSS_2 B3

VSS_3 E1

VSS_4 G8

VSS_5 J2

VSS_6 J8

VSS_7 M1

VSS_8 M9

VSS_9 P1

VSS_10 P9

VSS_11 T1

VSS_12 T9

VSSQ_1 B1

VSSQ_2 B9

VSSQ_3 D1

VSSQ_4 D8

VSSQ_5 E2

VSSQ_6 E8

VSSQ_7 F9

VSSQ_8 G1

VSSQ_9 G9

+1.5VQ0

L200

MLB-201209-0120P-N2

L201

MLB-201209-0120P-N2

C219

4.7uF

10V

C222

4.7uF

10V

C231

4.7uF

10V

C234

4.7uF

10V

IC100

LG1122

DDR0_A[0]

AB25

DDR0_A[1]

F26

DDR0_A[2]

AB24

DDR0_A[3]

Y24

DDR0_A[4]

G26

DDR0_A[5]

Y25

DDR0_A[6]

G25

DDR0_A[7]

Y26

DDR0_A[8]

G24

DDR0_A[9]

AA26

DDR0_A[10]

H26

DDR0_A[11]

F25

DDR0_A[12]

H24

DDR0_A[13]

AA25

DDR0_A[14]

F24

DDR0_DQ[0]

T26

DDR0_DQ[1]

L24

DDR0_DQ[2]

U24

DDR0_DQ[3]

K26

DDR0_DQ[4]

U26

DDR0_DQ[5]

K24

DDR0_DQ[6]

U25

DDR0_DQ[7]

K25

DDR0_DQ[8]

M25

DDR0_DQ[9]

R26

DDR0_DQ[10]

L26

DDR0_DQ[11]

T24

DDR0_DQ[12]

M26

DDR0_DQ[13]

R25

DDR0_DQ[14]

M24

DDR0_DQ[15]

R24

DDR0_CK

J26

DDR0_CK_N

J25

DDR0_DQS[0]

P26

DDR0_DQS_N[0]

P25

DDR0_DQS[1]

N26

DDR0_DQS_N[1]

N25

DDR0_CKE

J24

DDR0_WE_N

W24

DDR0_RAS_N

V24

DDR0_CAS_N

V25

DDR0_ODT

V26

DDR0_DM[0]

L25

DDR0_DM[1]

T25

DDR0_BA[0]

W25

DDR0_BA[1]

H25

DDR0_BA[2]

W26

DDR0_RST_N

AA24

DDR0_ZQ_CAL

E25

DDR0_VREF0

AB26

DDR0_VREF1

E26

DDR0_VDDQ_1

J23

DDR0_VDDQ_2

K23

DDR0_VDDQ_3

L23

DDR0_VDDQ_4

M23

DDR0_VDDQ_5

N23

DDR0_VDDQ_6

P23

DDR0_VDDQ_7

R23

DDR0_VDDQ_8

T23

DDR0_VDDQ_9

U23

DDR0_VDDQ_10

V23

DDR0_VDDQ_11

W23

DDR0_VDDQ_12

Y23

DDR1_A[0] AE9

DDR1_A[1] AF25

DDR1_A[2] AD9

DDR1_A[3] AD11

DDR1_A[4] AF24

DDR1_A[5] AE11

DDR1_A[6] AE24

DDR1_A[7] AF11

DDR1_A[8] AD24

DDR1_A[9] AF10

DDR1_A[10] AF23

DDR1_A[11] AE25

DDR1_A[12] AD23

DDR1_A[13] AE10

DDR1_A[14] AD25

DDR1_DQ[0] AF15

DDR1_DQ[1] AD20

DDR1_DQ[2] AD14

DDR1_DQ[3] AF21

DDR1_DQ[4] AF14

DDR1_DQ[5] AD21

DDR1_DQ[6] AE14

DDR1_DQ[7] AE21

DDR1_DQ[8] AE19

DDR1_DQ[9] AF16

DDR1_DQ[10] AF20

DDR1_DQ[11] AD15

DDR1_DQ[12] AF19

DDR1_DQ[13] AE16

DDR1_DQ[14] AD19

DDR1_DQ[15] AD16

DDR1_CK AF22

DDR1_CK_N AE22

DDR1_DQS[0] AF17

DDR1_DQS_N[0] AE17

DDR1_DQS[1] AF18

DDR1_DQS_N[1] AE18

DDR1_CKE AD22

DDR1_WE_N AD12

DDR1_RAS_N AD13

DDR1_CAS_N AE13

DDR1_ODT AF13

DDR1_DM[0] AE20

DDR1_DM[1] AE15

DDR1_BA[0] AE12

DDR1_BA[1] AE23

DDR1_BA[2] AF12

DDR1_RST_N AD10

DDR1_ZQ_CAL AD26

DDR1_VREF0 AF9

DDR1_VREF1 AE26

DDR1_VDDQ_1 AC11

DDR1_VDDQ_2 AC12

DDR1_VDDQ_3 AC13

DDR1_VDDQ_4 AC14

DDR1_VDDQ_5 AC15

DDR1_VDDQ_6 AC16

DDR1_VDDQ_7 AC17

DDR1_VDDQ_8 AC18

DDR1_VDDQ_9 AC19

DDR1_VDDQ_10 AC20

DDR1_VDDQ_11 AC21

DDR1_VDDQ_12 AC22

R221

150

R200

150

LG1122_DDR3 2 6

DDR3 1.5V beCaps - Place these caps near Memory

DDR1 PHY VREFDDR0 PHY VREF

DDR3 1.5V Decaps - Place these caps near Memory

DDR3 1.5V/0.75V Decap

- Place these caps near IC100

DDR3 1.5V/0.75V Decap

- Place these caps near IC100

240Hz Back-End Board 2011. 07. 05

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THERMAL

THERMAL

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+1.5V

10K

R311

0.1uF

16V

C307

C333

22uF

10V

OPT

C310

10uF

25V

OPT

C318

22pF

50V

C315

22uF

10V

C331

22uF

10V

+1.8V

C314

22uF

10V

+3.3V

0.1uF

16V

C308

R301

22K

1%

C319

1uF

25V

+1.8V

C309

10uF

25V

OPT

C316

22uF

10V

C300

22pF

50V

R303

22K

1%

C306

0.1uF 16V

C327

10uF

25V

OPT

C326

10uF

25V

C323

0.1uF 16V

C313

10uF

25V

0.1uF

16V

C325

IC301

TPS54327DDAR

3

VREG5

2

VFB

4

SS

1

EN

5GND

6SW

7VBST

8VIN

9

[EP]GND

C311

10uF

25V

C312

22uF

10V

IC303

TPS54327DDAR

3

VREG5

2

VFB

4

SS

1

EN

5GND

6SW

7VBST

8VIN

9

[EP]GND

10K

R304

C305

0.1uF 16V

C330

10uF

25V

C321

0.01uF

50V

VLCD_POWER

(+12V)

C302

1uF

25V

+3.3V

VLCD_POWER

(+12V)

+1.5V

10K

R305

IC300

TPS54327DDAR

3

VREG5

2

VFB

4

SS

1

EN

5GND

6SW

7VBST

8VIN

9

[EP]GND

+3.3V

C328

10uF

25V

OPT

VLCD_POWER

(+12V)

C301

1uF

25V

VLCD_POWER

(+12V)

L302

MLB-201209-0120P-N2

L306

MLB-201209-0120P-N2

L307

MLB-201209-0120P-N2

L303

MLB-201209-0120P-N2

C303

3300pF

50V

C335

100pF

50V

IC302

AOZ1038PI

3

AGND

2

VIN

4

FB

1

PGND

5COMP

6EN

7NC_1

8NC_2

9

[EP]LX

10K

R310

+3.3V C332

22uF

10V

C329

22uF

10V

+0.9V

R312

3.3K

C320

4700pF

50V

C336

3300pF

50V

OPT

C334

100pF

50V

OPT

+0.9V

0.1uF

16V

C322

C304

0.01uF

50V

R316

0

R308

68K

1%

R315

5.1K

1%

R314

3.6K

1%

R302

18K

1%

R309

22K

1%

R307

22K

1%

R313

0

R300

30K

1%

L305

3.6uH

NR8040T3R6N

L301

3.6uH

NR8040T3R6N

L300

3.6uH

NR8040T3R6N

L304

3.6uH

NR8040T3R6N

R306

4.7K

1%

POWER 3 6

Analog I/O Power +1.8V

Digital I/O Power +3.3V

DDR3PHY Power +1.5V

Core Power +0.9V

LG1122(FRC-III) Power up Sequence

FRC-III I/O for 3.3V

R2

tss(ms)=[C303(nF)*Vref]/Iss(uA)

R2

R2

R1

FRC-III AIP for 1.8V

Vout=0.765*(1+R1/R2)

Vout=0.765*(1+R1/R2)

R1R1

Vout=0.765*(1+R1/R2)

FRC-III CORE for 0.9V

FRC-III DDR3 for 1.5V

tss(ms)=[C304(nF)*Vref]/Iss(uA) tss(ms)=[C321(nF)*Vref]/Iss(uA)

MAX 0.345A

TYP 0.278A

MAX 1.184A

TYP 1.149A TYP 0.043A

MAX 0.046A

TYP 2.521A

Ton_DIO 20us(min)

Ton_DDR 40us(min)

Ton_CORE 40us(min)

MAX 3.124A

Vout=0.8*(1+R1/R2)

R2

R1

2011. 07. 05120Hz Back-End Board

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

C412

0.1uF

16V

+3.3AVDD_TX

TX1P

R404 33

+3.3AVDD_VX1

LRV2N

C407

4.7uF

10V

+1.0VDD

LLV0N

RRV0P

LRV2P

C400

0.1uF

16V

TX6P

RRV1P

TCON_SCL

LRV0P

TX2N

RRV4N

R412 33

OPT

R407 33

R418 33

LRV1P

L404

MLB-201209-0120P-N2

+3.3VDD

VCC_LCM

(+3.3V)

RLV5N

TCON_SDA

3D_LR

LRV4N

VCC_LCM

(+3.3V)

OPT_P

RLVCLKN

R401

10K

C404

0.1uF

16V

R416 33

TX4P

C401

4.7uF

10V

LLV5N

+1.0VDD_PLL

R410 33

FLK

RLV1N

IC400

AT24C32D-SSHM-T

3

A2

2

A1

4

GND

1

A0

5SDA

6SCL

7WP

8VCC

3D_EN

LLV4P

TX0P

RRV6N

VCC_LCM

(+3.3V)

C414

0.1uF

16V

GOE

RLV0N

+1.0VDD_PLL

R403 33

+3.3AVDD_VX1

LLV2N

RRV6P

L403

MLB-201209-0120P-N2

TX5N

L405

MLB-201209-0120P-N2

LRV6N

TCON_SDA

LLV1P

RRV5P

LRV6P

TX1N

RRVCLKP

VCC_LCM

(+3.3V)

VCORE

(+1.0V)

TCON_SDA

LRV5P

R424

2K

R406 33

+3.3AVDD_PLL

TX7P

RRV4P

C408

4.7uF

10V

R421

10K

OPT

LRVCLKP

RLV2N

+3.3AVDD_TX

TX3N

VCC_LCM

(+3.3V)

LRV4P

I2C_SDA_S

R415 33

R400

10K

OPT_N

RLV2P

L400

MLB-201209-0120P-N2

R409 33

RBF

LLV6P

L402

MLB-201209-0120P-N2

DPM

RLV0P

LLV4N

R413 15K

1%

TX4N

R402 33

GSC

RLV1P

I2C_SCL_S

WP_EEPROM_TCON

LLVCLKP

RRV5N

TX0N

SW400

JTP-1127WEM

+3.3AVDD_PLL

P400

12507WR-03L

1

2

3

4

SOE

RLV4N

R423

2K

LLV1N

RRVCLKN

LRV5N

TX6N

LLV0P

R405 33

RRV1N

C402

4.7uF

10V

LRVCLKN

C406

0.1uF

16V

L401

MLB-201209-0120P-N2

TX2P

RRV0N

VCORE

(+1.0V)

VCC_LCM

(+3.3V)

LRV1N

R414 33

RLV6N

C409

0.1uF

16V

TX7N

+1.0VDD

LRV0N

TCON_SCL

R408 33

R422

10K

WP_EEPROM_TCON

RLV6P

TX3P

LLV6N

C403

0.1uF

16V

+3.3VDD

H_CONV

RLV5P

AGP_EN

LLV5P

R420

10K

POL

RLVCLKP

R417 33

R411 33

LLVCLKN

RRV2N

C410

0.1uF

16V

TX5P

GSP

RLV4P

TCON_RST

C413

0.1uF

16V

TCON_SCL

+1.0VDD_PLL

+3.3AVDD_PLL

LLV2P

RRV2P

TX_LOCK R425 33

R426 3.9K

1%

+1.0VDD

IC401

LGE5812B

RX0P

A13

RX0N

B13

RX1P

A12

RX1N

B12

RX2P

A11

RX2N

B11

RX3P

A10

RX3N

B10

RX4P

A9

RX4N

B9

RX5P

A8

RX5N

B8

RX6P

A7

RX6N

B7

RX7P

A6

RX7N

B6

SOE

L1

GSP

M1

GOE

N2

GSC

N1

POL

E2

FLK

F1

DPM

F2

H_CONV

M2

OPT_P

D1

OPT_N

E1

RBF

B4

LR_IND_OUT

A2

AGP_EN

A4

3D_EN

B3

3D_LR_IN

A3

RMLVDS

P1

TMODE0

N16

TMODE1

M18

TMODE2

L17

TMODE3

L18

TMODE4

K17

TMODE5

K18

TMODE6

J17

TMODE7

J18

TMODE8

H17

TMODE9

H18

SCL_M

F18

SDA_M

F17

SCL_S

E18

SDA_S

E17

RST_N

C18

EEP_ADDR

G17

WP

G18

VX1_RBG

A15

HPD_VX1

D18

LOCKN_VX1

D17

GPIO0

D2

GPIO1

C1

GPIO2

K3

GPIO3

L3

GPIO4

M3

GPIO5

N3

GPIO6

N17

GPIO7

N18

GPIO8

M17

NC1

K1

NC2

K2

NC3

J1

NC4

J2

NC5

H1

NC6

H2

NC7

G1

NC8

G2

NC9

L2

LLV0P R1

LLV0N R2

LLV1P T1

LLV1N U1

LLV2P U2

LLV2N V2

LLVCLKP T2

LLVCLKN T3

LLV3P V3

LLV3N U3

LLV4P U4

LLV4N V4

LLV5P T4

LLV5N T5

LRV0P V5

LRV0N U5

LRV1P U6

LRV1N V6

LRV2P T6

LRV2N T7

LRVCLKP V7

LRVCLKN U7

LRV3P U8

LRV3N V8

LRV4P T8

LRV4N T9

LRV5P V9

LRV5N U9

RLV0P U10

RLV0N V10

RLV1P T10

RLV1N T11

RLV2P V11

RLV2N U11

RLVCLKP U12

RLVCLKN V12

RLV3P T12

RLV3N T13

RLV4P V13

RLV4N U13

RLV5P U14

RLV5N V14

RRV0P T14

RRV0N T15

RRV1P V15

RRV1N U15

RRV2P U16

RRV2N V16

RRVCLKP T16

RRVCLKN T17

RRV3P V17

RRV3N U17

RRV4P U18

RRV4N T18

RRV5P R17

RRV5N R18

IC401

LGE5812B

VDD33_1

D3

VDD33_2

D16

VDD33_3

E3

VDD33_4

E16

VDD33_5

F3

VDD33_6

F16

VDD33_7

G3

VDD33_8

G16

VDD33_9

H3

VDD33_10

H16

VDD33_11

J3

VDD33_12

J16

VDD33_13

K16

AVDD33_TX_1

R6

AVDD33_TX_2

R7

AVDD33_TX_3

R8

AVDD33_TX_4

R9

AVDD33_TX_5

R10

AVDD33_TX_6

R11

AVDD33_TX_7

R12

AVDD33_TX_8

R13

VDD10_1

G7

VDD10_2

G12

VDD10_3

H7

VDD10_4

H12

VDD10_5

J7

VDD10_6

J12

VDD10_7

K7

VDD10_8

K12

VDD10_9

L7

VDD10_10

L12

VDD10_11

M7

VDD10_12

M8

VDD10_13

M9

VDD10_14

M10

VDD10_15

M11

VDD10_16

M12

AVDD33_PLL

B18

VDD10_PLL

A17

AVDD33_VX1_1

C11

AVDD33_VX1_2

C12

AVDD10_VX1_1

G8

AVDD10_VX1_2

G9

AVDD10_VX1_3

G10

AVDD10_VX1_4

G11

GND_1

L9

GND_2

L10

GND_3

L11

GND_4

L14

GND_5

L15

GND_6

L16

GND_7

M4

GND_8

M5

GND_9

M14

GND_10

M15

GND_11

M16

GND_12

N4

GND_13

N5

GND_14

N14

GND_15

N15

GND_16

P2

GND_17

P3

GND_18

P4

GND_19

P5

GND_20

P6

GND_21

P7

GND_22

P8

GND_23

P9

GND_24

P10

GND_25

P11

GND_26

P12

GND_27

P13

GND_28

P14

GND_29

P15

GND_30

P16

GND_31

P17

GND_32

P18

GND_33

R3

GND_34

R4

GND_35

R5

GND_36

R14

GND_37

R15

GND_38

R16

GND_39 A5

GND_40 A14

GND_41 A16

GND_42 B1

GND_43 B2

GND_44 B5

GND_45 B14

GND_46 B15

GND_47 B16

GND_48 B17

GND_49 C2

GND_50 C3

GND_51 C4

GND_52 C5

GND_53 C6

GND_54 C7

GND_55 C8

GND_56 C9

GND_57 C10

GND_58 C13

GND_59 C14

GND_60 C15

GND_61 C16

GND_62 C17

GND_63 D4

GND_64 D5

GND_65 D6

GND_66 D7

GND_67 D8

GND_68 D9

GND_69 D10

GND_70 D11

GND_71 D12

GND_72 D13

GND_73 D14

GND_74 D15

GND_75 E4

GND_76 E5

GND_77 E6

GND_78 E7

GND_79 E8

GND_80 E9

GND_81 E10

GND_82 E11

GND_83 E12

GND_84 E13

GND_85 E14

GND_86 E15

GND_87 F4

GND_88 F5

GND_89 F14

GND_90 F15

GND_91 G4

GND_92 G5

GND_93 G14

GND_94 G15

GND_95 H4

GND_96 H5

GND_97 H8

GND_98 H9

GND_99 H10

GND_100 H11

GND_101 H14

GND_102 H15

GND_103 J4

GND_104 J5

GND_105 J8

GND_106 J9

GND_107 J10

GND_108 J11

GND_109 J14

GND_110 J15

GND_111 K4

GND_112 K5

GND_113 K8

GND_114 K9

GND_115 K10

GND_116 K11

GND_117 K14

GND_118 K15

GND_119 L4

GND_120 L5

GND_121 L8

C411

4.7uF

10V

C405

4.7uF

10V

240Hz T-Con(LG5812) 4 6

2011. 07. 05240Hz Back-End Board

+3.3VDD Decaps

+1.0VDD Decaps

+3.3AVDD_TX Decaps

+3.3AVDD_PLL Decaps

+1.0VDD_PLL Decaps

+3.3AVDD_VX1 Decaps

3. 3D_EN

- 2D/3D mode selection

LOW : 2D mode

HIGH : 3D mode

[T-Con EEPROM Debug]

[All of OPT decaps must be placed on PCB Bottom side]

No USE(NC at Rx side)

4. 3D_LR

- Left/Right frame Indicator

LOW : Left

HIGH : Right

1. RBF

- Pattern selection of No Video input

LOW : Rolling Pattern

HIGH : Black Pattern

I2C Slave Address : 0x70

EEP_ADDR = HIGH -> EEPROM Address = 0xA6

[T-Con EEPROM(32KBIT)]

2. AGP_EN

- NO input indicator

LOW : Normal

HIGH : No input

I2C Slave Address : 0xA6

- Write Protection

HIGH : Write Protection

LOW or NC : Normal Operation

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THERMAL THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R532 680

R551

10K

C558

1uF

25V

C514

10uF

25V

R542

2K

1/8W

1%

OPT

C547

0.22uF

50V

OPT

IC500

KIA3820FK

GPM_ON

3

RE

2

VGH_M

4

CE

1

VGH

5VDD

6VDPM

7GND

8VFLK

C524

0.1uF

50V

C540

0.1uF

50V

VGH_S

(+27V)

VCOMOUT

C515

1uF

25V

PANEL_VCC

(+12V)

VDD_LCM

(+16.8V)

VL

(+5V)

R515 0

R548

10K

I2C_SCL_S

VCORE

(+1.0V)

PANEL_VCC

(+12V)

CTRLP

Q500

MMBT3906(NXP)

E

B

C

VGL

(-5V)

GMA2

I2C_SDA_S

GSC

C502

10uF

25V

L500

22uH

GMA12

VGL_FB

C552

10uF

25V

GMA5

R534

33

R531

10K

GMA10

R511

0

1/10W

GPM_ON

IC501

MAX17139

3

VL

2

TCOMP

4

AGND

1

EN1

6

PVINB3

5

AVIN

7

BST3

8

SWB3

9

OUT3

10

PGND3

11

SS

12

COMP

13

PGND_1

14

PGND_2

15

SW_1

16

SW_2

17

SWI

18

SWO

19

NC_1

20

CTRLP

21 VGH

22 VGL

23 NC_2

24 CTRLN

25 NC_3

26 RST

27 A0

28 SCL

29 SDA

30 VLOGIC2

31 PGND2

32 SWB2

33 VLOGIC1

34 NC_4

35 SWB1_1

36 SWB1_2

37 BST1

38 PVINB12_1

39 PVINB12_2

40 NC_5

41

[EP]AGND

VCC_LCM

(+3.3V)

R537 0

C504

10uF

25V

C533

10uF

25V

R549

33

VCC_LCM

(+3.3V)

GMA14

R509

120K

C507

0.47uF

50V

IC502

BUF08630

1

SDA

3

DVDD

7

AVDD_AVDD

9

BKSEL

10

GM1

11 GM2

12 GM3

13 GM4

14 GM5

15 GM6

16 NC_1

17 HVDD

18 GM7

19 GM8

20 SCL

5

VCOM_OUT

8

AVDD_1

6

VCOM_FB

4

VCOM_GND

2

A0 21

EP[GND]

VGH_S

(+27V)

L503

22uH

2.2A

R545

3.6K

1/10W

SWB

I2C_SDA_S

R543 0

OPT

R512

OPT

C543

4.7uF

50V

SWB

GMA9

R540

10K

D503

40V

SMAB34

C527

0.1uF

50V

GMA17

GMA7

R539

33

C544

4.7uF

50V

C538

22uF

10V

GMA13

C553

10uF

25V

C551

0.1uF

50V

OPT

C501

10uF

25V

C522

120pF

50V

VCC_LCM

(+3.3V)

VGH

(+27V)

C548

0.22uF

50V

I2C_SCL_S

GMA6

VCC_LCM

(+3.3V)

IC503

BUF08630

1

SDA

3

DVDD

7

AVDD_AVDD

9

BKSEL

10

GM1

11 GM2

12 GM3

13 GM4

14 GM5

15 GM6

16 NC_1

17 HVDD

18 GM7

19 GM8

20 SCL

5

VCOM_OUT

8

AVDD_1

6

VCOM_FB

4

VCOM_GND

2

A0 21

EP[GND]

C550

1uF

25V

R517

680

R505 33

GPM_ON

C513

1000pF

C555

4.7uF

50V

GMA4

C556

4.7uF

50V

C542

1uF

10V

R550

33

C554

1uF

10V

VGH_S

(+27V)

C508

0.47uF

50V

Q501

2SC3052

E

B

C

C535

10uF

25V

R510

10

1/10W

GMA18

HVDD

(+8.4V)

GMA15

I2C_SDA_S

C510

10uF

25V

PANEL_VCC

(+12V)

VCC_LCM

(+3.3V)

L502

2.2uH

LQM2HPN2R2MG0L

I2C_SCL_S

HVDD

(+8.4V)

D501

100V

1N4148W

C549

0.22uF

50V

C536

22uF

10V

D504

100V

1N4148W

VCOMFB

C523

10uF

25V

R526

10K

OPT

C519

0.1uF

50V

TH500

47k-ohm

CTRLP

R522 33

R524

18K

1/10W

C500

56pF

50V

GPM_ON

VDD_LCM

(+16.8V)

VDD_LCM

(+16.8V)

C505

10uF

25V

C509

1uF

25V

D500

100V

1N4148W

HVDD

(+8.4V)

R523 33

R507

2.7K

TCOMP

VDD_LCM

(+16.8V)

R513

2.2

C546

0.22uF

50V

OPT

R529 0

C537

10uF

25V

C516

0.01uF

50V

R553 0

R536

5.1K

R538

9.1K

1/8W

R518

33K

C532

1uF

25V

C511

0.1uF

50V

R500 15K

1%

GPM_ON

D505

100V

1N4148W

R506

150K

1%

R521 33

C557

0.1uF

50V

FLK

R546 0

TCON_RST

TCOMP

R520

18K

1/10W

GMA16

C517

0.1uF

50V

C534

10uF

25V

C512

0.1uF

50V

DPM

VGL_FB

GMA3

C530

4.7uF

50V

L501

10uH

3.1A

C528

4.7uF

50V

R528

10K

R525

10K

R501 33

OPT

VCC_LCM

(+3.3V)

C531

10uF

25V

C545

0.1uF

50V

R502 33

GPM_ON

C521

10uF

25V

VL

(+5V)

GMA1

R552 0

D502

40V

SMAB34

R504

OPT

VDD_LCM

(+16.8V)

VCC_LCM

(+3.3V)

R503

0

R508

0

R514

0

R516

0

R519

0

R527

0

R533

0

R535

0

R541

0

R544

0

R554 0

GPM_OFF

R555 0

GPM_ON

R547 10R530 10

PANEL_VCC

C561

10uF

16V

PANEL_CTL_FRC

VLCD_POWER

(+12V)

R556

10K

PANEL_CTL_FRC Q502

MMBT3904(NXP)

PANEL_CTL_FRC

E

B

C

C564

0.1uF

50V

R557

10K

PANEL_CTL_FRC

R558

1.8K

PANEL_CTL_FRC

C560

0.1uF

50V

PANEL_CTL

C563

1uF

25V

OPT

C559

0.01uF

50V

C562

0.1uF

50V

OPT

Q503

AO3407A PANEL_CTL_FRC

G

D

S

L505 CIS21J121

PANEL_CTL_MAIN

C525

2200pF

50V

PMIC/GAMMA/GPM 5 6

2011. 07. 05240Hz Back-End Board

to prevent inrush current

[PMIC Block]

[P-Gamma Block]

[GPM Block]

0xEA 0xE8

PANEL_POWER

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

H_CONV

GMA15

VCOMFB

RRV2P

GMA14

LLV2N

RLV2P

VCOMFB

LLVCLKN

P601

104060-8017

1VDD

2VDD

3GND

4VCC

5VCC

6GND

7HVDD

8HVDD

9GND

10 OPT_P

11 VGL

12 GND

13 GOE

14 GSC

15 GND

16 VGH

17 GND

18 RVCOM_FB

19 VCOM_R

20 GND

21 ZOUT

22 GND

23 GMA1

24 GMA2

25 GMA3

26 GMA4

27 GMA5

28 GMA6

29 GMA7

30 GMA9

31 GMA10

32 GMA12

33 GMA13

34 GMA14

35 GMA15

36 GMA16

37 GMA17

38 GMA18

39 GND

40 GSP

41 POL

42 GND

43 SOE

44 H_CONV

45 OPT_N

46 GND

47 RLV0+

48 RLV0-

49 RLV1+

50 RLV1-

51 RLV2+

52 RLV2-

53 GND

54 RLVCLK+

55 RLVCLK-

56 GND

57 RLV3+

58 RLV3-

59 RLV4+

60 RLV4-

61 RLV5+

62 RLV5-

63 GND

64 RRV0+

65 RRV0-

66 RRV1+

67 RRV1-

68 RRV2+

69 RRV2-

70 GND

71 RRVCLK+

72 RRVCLK-

73 GND

74 RRV3+

75 RRV3-

76 RRV4+

77 RRV4-

78 RRV5+

79 RRV5-

80 GND

81

LLVCLKP

GMA9

GMA18

LRVCLKP

RRV4P

LRV4N

LRV4P

RRV5N

GSP

GMA2

LLV0P

LRV0P

RLVCLKP

LRV2N

GMA5

GSC

C607

0.1uF

50V

RLV4P

VGH

(+27V)

VGH

(+27V)

GMA7

GMA1

OPT_N

RLV4N

VCC_LCM

(+3.3V)

LRV2P

GMA6

GMA15

GMA18

GMA9

VCC_LCM

(+3.3V)

LRV6P

GOE

POL

LRV6N

RLV6P

LRV5N

LLV6P

GMA4

RRV6N

GMA3

RLV1N

LLV0N

RLV0P

C602

0.1uF

50V

VGL

(-5V)

C618

0.01uF

50V

GMA13

C614

10uF

25V

RLV1P

LLV5N

OPT_N

VGL

(-5V)

OPT_P

LLV5PGSC

VCOMOUT

LRV1P

C615

10uF

25V

LRV1N

LRV0N

C619

0.1uF

50V

RRV2N

GMA12

C605

10uF

25V

LRVCLKN

SOE

RRV1N

GMA10

LLV1P

LLV4N

LLV1N

GMA6

HVDD

(+8V)

GMA10

GMA5

GMA16

LLV6N

GMA13

RRV4N

GMA4

RRV0N

GMA16

LLV4P

GSP

RRV6P

GMA17

C617

10uF

25V

H_CONV

VDD_LCM

(+16V)

RRV1P

GMA3

C603

10uF

25V

GOE

RRVCLKP

RLV2N

RLVCLKN

RLV0N

Z_OUT

RLV5P

GMA14

LLV2P

LRV5P

VDD_LCM

(+16V)

POL

SOE

RLV6N

C616

0.1uF

50V

Z_OUT

RLV5N

RRVCLKN

GMA1

RRV0P

C610

0.01uF

50V

GMA12

GMA17

C604

10uF

25V

GMA2

VCOMOUT

RRV5P

HVDD

(+8V)

GMA7

RXB0P

RXB3N

I2C_SCL_S

RXACLKN

RXA1P

RXBCLKP

LG1122_RST

RXBCLKN

RXB4P

RXA2P

RXA4N

RXB0N

RXA0N

I2C_SDA_S

RXACLKP

RXA1N

C600

10uF

25V

RXB2N

RXA0P

RXA2N

C601

10uF

25V

RXA3P

RXB4N

RXB1P

RXB3P

RXA4P

RXA3N

RXB2P

RXB1N

P600

FI-RE51S-HF-J-R1500

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

VLCD_POWER

(+12V)

PWM_BPL

L600

MLB-201209-0120P-N2

P602

104060-8017

1GND

2LLV0+

3LLV0-

4LLV1+

5LLV1-

6LLV2+

7LLV2-

8GND

9LLVCLK+

10 LLVCLK-

11 GND

12 LLV3+

13 LLV3-

14 LLV4+

15 LLV4-

16 LLV5+

17 LLV5-

18 GND

19 LRV0+

20 LRV0-

21 LRV1+

22 LRV1-

23 LRV2+

24 LRV2-

25 GND

26 LRVCLK+

27 LRVCLK-

28 GND

29 LRV3+

30 LRV3-

31 LRV4+

32 LRV4-

33 LRV5+

34 LRV5-

35 GND

36 OPT_N

37 H_CONV

38 GSP

39 POL

40 GND

41 SOE

42 GND

43 GMA1

44 GMA2

45 GMA3

46 GMA4

47 GMA5

48 GMA6

49 GMA7

50 GMA9

51 GMA10

52 GMA12

53 GMA13

54 GMA14

55 GMA15

56 GMA16

57 GMA17

58 GMA18

59 GND

60 GND

61 ZOUT

62 GND

63 VCOM_L

64 LVCOM_FB

65 GND

66 VGH

67 GND

68 GSC

69 GOE

70 GND

71 VGL

72 GND

73 HVDD

74 HVDD

75 GND

76 VCC

77 VCC

78 GND

79 VDD

80 VDD

81

L/DIM0_MOSI

L/DIM0_SCLK

L/DIM0_VS

C620

0.1uF

50V

R600 33

OPT

Q600

2N7002K

S

D

G

+3.3V

R601 33

OPT

C621

0.1uF

50V

Q601

2N7002K

S

D

G

+3.3V

FLASH_WP

Wafer 6 6

[LEFT FFC CONNECTOR][RIGHT FFC CONNECTOR]

[80P mini-LVDS output wafer]

[51P HS-LVDS input wafer]

2011. 07. 05240Hz Back-End Board

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

TP100

TP107

SW103

JTP-1127WEM

1 2

43

SW107

JTP-1127WEM

1 2

43

TP104

SW104

JTP-1127WEM

1 2

43

TP105

SW100

JTP-1127WEM

1 2

43

P100

12507WR-04L

1KEY1

2GND

3KEY2

4GND

5

TP102

ZD101

5.6B

OPT

SW105

JTP-1127WEM

1 2

43

TP103

SW106

JTP-1127WEM

1 2

43

SW101

JTP-1127WEM

1 2

43

TP109

TP101

ZD100

5.6B

OPT

SW102

JTP-1127WEM

1 2

43

TP106 TP108

R100

10K R102

4.7K

R103

4.7K

R101

10K

R106

270

R107

270

R104

1.8K

R105

1.8K

-------------------------------------------------------------------------------------------------

CH-

MENU

1.03V

1.13V

VOL+ ENTER

0.51V

1.73V

KEY1

VOL-

Revision History

0.09V

CH+ POWER

KEY2

0.09V

(0) Proto Design

INPUT

1.54V

0.53V

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

LCD TV Repair Guide

`12 years New Models

< Applicable Model >

XXLM960V-ZB

XXLM860V-ZB

V : T2/C/S2

T : T2/C

S : T/C/S2

0 : T/C

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Benefit:MoreClearMoreReal

Bestpicturequality+thinTV

Local

Dimming

Local

Dimming

BLU

structure

EdgeLED

EdgeType

w/LocalDimming

Upper

Metal

Cover

LED Array

LED Array is on the side

of Module

Localdimmingdepictsmore

deepblack.

Feature

2 types of LED - Edge

Model

XXLW750T/W/S/G

42inch : H(2) * V(8) = 16Block

42inch : H(2) * V(8) = 16Block

42inch : H(2) * V(8) = 16Block

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Benefit:MoreClearMoreReal

Bestpicturequality+thinTV

Slimmerdepth

betterpicturequality

Local

Dimming

Local

Dimming

BLU

structure

ALEFLED`

ALEFType

LocalDimming

LED Array is on the back of Module

Localdimmingdepictsmore

deepblack.

Feature

2 types of LED - ALEF

Model

XXLM960V

47inch : H(6) * V(4) = 24Block

55inch : H(6) * V(4) = 24Block

Reflecting

coating w/patterns

Guiding Layer

Light Blocking

Pattern

Prism

sheets

DBEF

PCB

Diffuser plate

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Main PCB for Broadband Main + TCON all in one

To PSU

To FRC BOARD

1

3

4

1Main processor_Digital(LG1152D),

DDR Memory

Flash Memory

2

3

4

Micom for Key/IR sensing

HDMI switch (4:1)

Audio AMP (10W+10W)

XXLM960V-ZB

XXLM860V-ZB

wifi

Local Key +IR

Motion assy

Front Spk

Woofer Spk

Local Dim.

2

4

Main processor_analog(LG1152A)

5

3D Depth Control IC,

DDR Memory

6

5

6

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

FRC Board for Broadband Main + TCON all in one

1FRC Processor(LG1122)

2

XXLM960V-ZB

T-Con IC(LG5812)

1

2

From Main Board

To Pannel ( Left ) To Pannel ( Right )

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Block Diagram

L9A L9D

USB2.0x3

DDR3 X 3

16

16

16

eMMC

8

HDMI1

HDMI2

HDMI3

HDMI4

HDMI

(1 Ch)

CVBS

(8 Ch)

Audio L/R

(5 Ch)

SIF(1 Ch)

CVBS-Out

SCART

Line-Out

SCART

Component

(2 Ch)

PC-RGB

(WUXGA)

I2S

CVBS(CHB)

TS In(CHB)

MICOM

IR

Keypad

HDMI

SW

RMII

PHY

SPIDF_OUT

Built-in WiFi

CI Slot

EB_DATA

Ethernet

TXA/B

51Pin LVDS

Motion-R

M-Remote_R/TX

AUD

BB_TP_DATA

CHB_DATA

DAC_DATA

AAD_DATA

HSR_P/M

DTV TS

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Jack Interface

Main Chip

SC_DET

SC_CVBS_IN

DTV/MNT_V_OUT

MUX

IC2502 ATV_OUT

DTV/ATV_SELECT

SC_FB/ID_IN 2bit

SC_R/G/B 3bit

SC_L/R_IN

DSUB_R/G/B 3bit

DSUB_DET

RGB_DDC_SCL/SDA 2bit

Tuner

EEPROM

IC802/

R1EX24002ASAS0A MICOM

EDID_WP

HP_L/ROUT

PC_L/R_IN

SPDIF_OUT

COMP_Y+/Pb+/Pr+

COMP_DETAV_CVBS_IN

AV_L/R_IN

AV_CVBS_DET

SPDIF

PC_Audio

Earphone Block

RGB

SCART

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

ATSC Half NIM

DIF

SIF

Parallel TS

System

Demux

Audio DSP

Multi-STD

Audio Decoder

BTSC AFE

10b@18.432MHz

w/ PLL

1ch L/R

Audio-ADC

24b@48KHz

GBB AFE

1ch@30MHz

w/ PLL

Global Baseband

V/Q, DVB-T/C

CVBS(6ch)

Component(2ch) 3ch Video

AFE

10b@165MHz

w/ LLPLL

PC-RGB

HDMI-Rx 1.4

(1-port PHY)

3D, ARC, 4kx2k

HDMI(1ch)

Capture

Block

(3CH)

AAD

(THAT)

Audio Codec1

(Digital Part)

Mux

Analog Chip Digital Chip

Audio L/R (5-ch) SW

I2S(stero)

Sound

DSP

I2S

SPDIF

Video Decoder

(Dual HD)

CVBS AFE(2-ch)

12b@54MHz 12 : CVBS

Mux

12

Diplay

Engine

MC NR,

Vertical MC IPC

Scaler, PE

OSD, VCR

LVDS

H.264 Encoder

SD upto 480p

12

PHY

(3-port)

USB2.0

Host (x3)

DDR3-PHY

DDR3(x16) * 3

Ethernet

MAC

eMMC

Controller

CPU

Dual C-A9 (1GHz)

Graphic Engine

2D-VG / 3D Open-ES2.0

Audio

10(data)+1(en)+5(gc)

4(val, err, clk, sop)

+8 (data)

I2C

I2C

6(gbb, l9da)

I2C

(Headphone)

Digital

Audio

Output

LVDS LVDS

Video

LVDS

Video

OSD

LVDS

Audio PLL

w/ DCO

I2S (mono)

3(lrck, lrch, sck)

I2C

SW

SW

3D or UD

Data bridge

1 (ARC data)

ARC

(1ch)

I2S or SPDIF8

Audio Clocks9

1ch mono

Audio-ADC

24b@48KHz

Audio Codec0

(Digital Part)

Mux

LVDS

interrupt 3(hdmi, 3ch, gbb)

3(lrck, lrch, sck)

Audio

HDMI

(1-Link)

I2S

Tuner_CVBS

L9 Block diagram

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

CPU

xi_main

1 Ghz

DDR3PLL

xo_main

1.6Ghz

DDR3PLL1

1.6Ghz

24Mhz

DDR3PLL2

0 1 0 10 1

CT

R

1/2

1/5

1.6Gh

z

1.6Ghz

Memory Controller

Memory Controller

Memory Controller

800Mhz

800Mhz Video/Audio Block

CPU peripherial

dcoin_clk

DCO

DCO

200Mhz

200Mhz

Glitch-free logic

between

de_dco_out and

sdec_dco_out

de_dco_ou

t

sdec_dco_o

ut

0 1

CT

R

DISPLL

u_DPLL

udnt_buf_dpll_fin disp_fout

Clock Divide & Reset

generation w/ test logic DE

TE

sclk

27Mhz

27Mhz

27Mhz

27Mhz

2 port USB PHY

1 port USB PHY

30/48Mhz

30/48 Mhz

i_core800_clk

i_core320_clk

i_m01_ddrclk

i_m2_ddrclk

u_crg

Clock Divide & Reset generation

w/ test logic

Clock Divide & Reset generation

w/ test logic

Clock Divide & Reset generation

w/ test logic

Clock Divide & Reset generation

w/ test logic

Clock Divide & Reset generation

w/ test logic

USB controller

About 220 internally generated clocks

SSC setting

- 0xFD3001CC

- 0xFD3001D0

SSC setting

- 0xFD3001C4

- 0xFD3001D8

SSC setting

-0xFD300108

-0xFD30010C

SSC setting

- 0xFD3001D4

- 0xFD3001D8

L9 Block diagram

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Appendix. Block Diagram for Edge/ALEF Backlight

[ XXLM960V ALEF LED Backlight]

SPI/Vsync

FHD@240Hz

Quad-Link

HF mini-LVDS

8

SoC TCON

(240Hz)

FRC-III

3D

Chip

Main FRC

LED BLU control

LED BLU control

FHD@60Hz

Dual-Link LVDS For Video

FHD@60Hz

Dual-Link LVDS For OSD

V by One

IC401

LG5812B IC100

LG1122A

DDR0_DATA[0~15] IC200 DDR0

TXP 0~7

DDR0_A[0~12]

DDR1_DATA[0~15]

DDR1_A[0~12]

IC201 DDR1

RXAP 0~4

RXAN 0~4

RXBP 0~4

RXBN 0~4

51Pin LVDS

TXN 0~7

80Pin mini LVDS

LLV0~6P/N

LRV0~6P/N

RRV0~6P/N

RRV0~6P/N

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Interconnection - 1

1Main PCB

2LED driver

3WIFI ASSY

4RF MOTION ASSY

5IR Key PCB

6FRC ASSY

[PCBs]XXLM960V-ZB

PSU

7

1

2

5

6

7

3

4

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Interconnection – sub PCB( XXLM960V Series )

RF MOTION ASSY

To Main

SPK unit

3

WIFI ASSY

4RF MOTION ASSY

5

Local Key

PCB

1

IR Key PCB

Speaker cover Assy

IR PCB WIFI ASSY

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Contents of LCD TV Standard Repair Process

No. Error symptom (High category) Error symptom (Mid category) Page Remarks

1

A. Video error

No video/Normal audio 1

2 No video/No audio 2

3Picture broken/ Freezing 3

4Color error 4

5Vertical/Horizontal bar, residual image,

light spot, external device color error 5

6

B. Power error

No power 6

7Off when on, off while viewing, power

auto on/off 7

8

C. Audio error

No audio/Normal video 8

9Wrecked audio/discontinuation/noise 9

10

D. Function error

Remote control & Local switch checking 10

M4 operating checking 11

11

12 Wifi operating checking 12

13 External device recognition error 13

14 E. Noise Circuit noise, mechanical noise 14

15 F. Exterior error Exterior defect 15

First of all, Check whether there is SVC Bulletin in GCSC System for these model.

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Normal

audio

Y

N

Move to No

video/No audio

No video

Normal audio Check Back Light

On with naked eye On Y

N

Check Power

Board

24V, 12V,3.5V etc.

Normal

voltage

Y

N

Replace T-con

Board or module

And Adjust VCOM

Repair Power

Board or parts

Check Power Board 24V output

Normal

voltage YReplace Inverter

or module

N

Repair Power

Board or parts

End

Always check & record S/W Version and White

Balance value before replacing the Main Board Replace Main Board Re-enter White Balance value

※Precaution

Established

date

Standard Repair Process

Revised date 1/15

LCD TV Error

symptom

A. Video error

No video/ Normal audio

☞A4☞A1

☞A2

☞A7 & A3

First of all, Check whether all of cables between board is inserted properly or not.

(Main B/D↔Power B/D, LVDS Cable,Speaker Cable,IR B/D Cable,,,)

1

2012.01.16

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Normal

voltage?

Check various

voltages of Power

Board ( 3.5V,12V,20V

or 24V…)

No Video/

No audio

Check and

replace

MAIN B/D

Y

Replace Power

Board and repair

parts

NEnd

Standard Repair Process

A. Video error

No video/ No audio

☞A4

Established

date

Revised date 2/15

LCD TV Error

symptom

2

2012.01.16

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

A. Video error

Picture broken/ Freezing

Y

N

☞A6

N

Check RF Signal level

Normal

Signal?

Check RF Cable

Connection

1. Reconnection

2. Install Booster

Check

S/W Version

S/W Upgrade

Check whether other equipments have problem or not.

(By connecting RF Cable at other equipment)

→DVD Player ,Set-Top-Box, Different maker TV etc`

SVC

Bulletin?

Replace

Main B/D

Check

Tuner soldering

Normal

Picture?

Y

N

Y

Close

YClose

. By using Digital signal level meter

. By using Diagnostics menu on OSD

( Setting→Set up→Manual Tuning →Check the Signal )

- Signal strength (Normal : over 50%)

- Signal Quality (Normal: over 50%)

Normal

Picture?

Y

Contact with signal distributor

or broadcaster (Cable or Air)

N

Normal

Picture?

Y

Close

N

☞A7

Standard Repair Process

Established

date

Revised date 3/15

LCD TV Error

symptom

3

N

2012.01.16

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Color

error?

Y

N

※Check

and replace

Link Cable

(LVDS) and

contact

condition

Y

N

Replace Main B/D

Color

error?

Check error

color input

mode

Check color by input

-External Input

-COMPONENT

-RGB

-HDMI/DVI

Y

External device

/Cable

normal

External Input/

Component

error

Check

external

device and

cable

Y

External device

/Cable

normal

RGB/

HDMI/DVI

error

Check external

device and

cable

Replace Main B/D

Replace Main B/D

N

N

A. Video error

Color error

☞A9

N

Y

End

Replace module

Request repair

for external

device/cable

Color

error?

Check Test pattern

☞A12

☞A10

Standard Repair Process

Established

date

Revised date 4/15

LCD TV Error

symptom

4

2012.01.16

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Screen

normal?

N

YCheck external

device

connection

condition

Y

N

Check and

replace Link

Cable

Normal?

Y

N

Screen

normal? Replace Main B/D

(adjust VCOM)

Replace

module

Check color condition by input

-External Input

-Component

-RGB

-HDMI/DVI

End

Vertical/Horizontal bar, residual image, light spot

Request repair

for external

device

A. Video error

Vertical / Horizontal bar, residual image,

light spot, external device color error

☞A12

External device screen error-Color error

External

Input

error

Connect other external

device and cable

(Check normal operation of

External Input, Component,

RGB and HDMI/DVI by

connecting Jig, pattern

Generator ,Set-top Box etc.

N

Y

Replace

Main B/D

Screen

normal?

Check screen

condition by

input

-External Input

-Component

-RGB

-HDMI/DVI

Request repair for

external device

Component

error

RGB

error

HDMI/

DVI

Connect other external

device and cable

(Check normal operation of

External Input, Component,

RGB and HDMI/DVI by

connecting Jig, pattern

Generator ,Set-top Box etc.

Replace

Main B/D

Screen

normal?

N

Y

Check S/W Version

Y

N

Check

version

S/W Upgrade

Y

N

Normal

screen?

End

Y

N

Replace Main

B/D

For LGD panel

Replace

Module

Screen

normal?

End

Established

date

Revised date 5/15

LCD TV Error

symptom

Standard Repair Process

☞A9 ☞A10

Check Test pattern

5

For other panel

2012.01.16

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

B. Power error

No power

Power LED

On?

Y

N

DC Power on

by pressing Power Key

On Remote control

Y

N

Normal

operation? Check Power

On ‘”High”

Check Power cord

was inserted properly

Check

Power LED

Replace

Power

B/D

Measure voltage of each output of Power B/D

N

Y

Normal

voltage? Replace Main B/D

N

Y

OK?

Replace Main B/D

N

Y

Normal?

Check ST-BY 3.5V

Replace Power B/D

N

Y

Normal

voltage?

Replace Power

B/D

Y

☞A17

☞A18

☞A19

☞A4

Standard Repair Process

Established

date

Revised date 6/15

LCD TV Error

symptom

6

. Stand-By: Red or Turn Off

. Operating: Turn Off

※

Close

2012.01.16

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

B. Power error

Off when on, off while viewing, power auto on/off

Error? N

Y

Check Power Off

Mode

Fix A/C cord & Outlet

and check each 3

phase out

Check A/C cord

Check for all 3- phase

power out

Check outlet

Replace Main B/D

CPU

Abnormal

(If Power Off mode

is not displayed)

Check Power B/D

voltage

Y

N

Replace Main B/D

Normal

voltage?

Replace Power B/D

Replace Power B/D

N

Y

Normal? End

※Caution

Check and fix exterior

of Power B/D Part

☞A22

☞A19

Established

date

Revised date 7/15

LCD TV Error

symptom

Standard Repair Process

7

Status Power off List Explanation

Normal

"POWEROFF_REMOTEKEY" Power off by REMOTE CONTROL

"POWEROFF_OFFTIMER" Power off by OFF TIMER

"POWEROFF_SLEEPTIMER" Power off by SLEEP TIMER

"POWEROFF_INSTOP" Power off by INSTOP KEY

"POWEROFF_AUTOOFF" Power off by AUTO OFF

"POWEROFF_ONTIMER" Power off by ON TIMER

"POWEROFF_RS232C" Power off by RS232C

"POWEROFF_RESREC" Power off by Reservated

Record

"POWEROFF_RECEND" Power off by End of Recording

"POWEROFF_SWDOWN" Power off by S/W Download

"POWEROFF_UNKNOWN" Power off by unknown status except listed case

Abnormal "POWEROFF_ABNORMAL1" Power off by abnormal status except CPU trouble

"POWEROFF_CPUABNORMAL" Power off by CPU Abnormal

* Please refer to the all cases which

can be displayed on power off mode.

Abnormal

1

2012.01.16

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Only for training and service purposes

LGE Internal Use Only

No audio

Screen normal

Check user

menu >

Speaker off Off N

Y

Cancel OFF

Check audio B+

24V of Power

Board

Normal

voltage

Y

N

Replace Power Board and repair parts

Check

Speaker

disconnection

N

Y

Replace Speaker

Replace MAIN Board End

C. Audio error

No audio/ Normal video

☞A24 ☞A25

Disconnection

Established

date

Revised date 8/15

LCD TV Error

symptom

Standard Repair Process

8

2012.01.16

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

→abnormal audio/discontinuation/noise is same after “Check input signal” compared to No audio

C. Audio error

Wrecked audio/ discontinuation/noise

Wrecked audio/

Discontinuation/

Noise for

all audio

Check and replace

speaker and

connector

Wrecked audio/

Discontinuation/

Noise only

for D-TV

Wrecked audio/

Discontinuation/

Noise only

for Analog

Wrecked audio/

Discontinuation/

Noise only

for External Input

Connect and check

other external

device

N

Y

Normal

audio?

Check and fix external device

Replace Power B/D

N

Y

Normal

voltage?

Check input

signal

-RF

-External Input

signal

Signal

normal?

(When RF signal is not

received)

Request repair to external

cable/ANT provider

Y

Check audio

B+ Voltage (24V)

Replace Main B/D

(In case of

External Input

signal error)

Check and fix

external device

Replace Main B/D

N

End

Established

date

Revised date 9/15

LCD TV Error

symptom

Standard Repair Process

☞A25

9

2012.01.16

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

D. Function error

Remote control & Local switch checking

Y

N

1. Remote control(R/C) operating error

Check R/C itself

Operation Normal

operating?

Normal

operating?

Y

Close

Replace R/C

If R/C operate,

Explain the customer

cause is interference

from light in room.

Check R/C Operating

When turn off light

in room

Check & Replace

Baterry of R/C

Check & Repair

Cable connection

Connector solder

Normal

operating?

Check B+

3.5V

On Main B/D

☞A27

Normal

Voltage?

Close

N

N

Check 3.5v on Power B/D

Replace Power B/D or

Replace Main B/D

(Power B/D don’t have problem)

☞A4

Check IR

Output signal Normal

Signal?

N

Y

Repair/Replace

IR B/D

N

☞A27

Replace

Main B/D

Y

☞A27

Standard Repair Process

Established

date

Revised date 10/15

LCD TV Error

symptom

10

2012.01.16

Y

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

D. Function error

M4 operating checking

Y

N

2. M4(Magic Remocon) operating error

Check M4 itself

Operation Normal

operating?

Normal

operating?

Y

Close

Check & Replace

Batterry of M4

Is show ok

message?

Press the

wheel

Is show ok

message?

Close

N

N

N

Y

Standard Repair Process

Established

date

Revised date 11/15

LCD TV Error

symptom

11

2012.01.16

Replace M4

Turn off/on the

set and press

the wheel

Press the back

key about 5sec

Close

* If you conduct the loop at 3times, change the M4.

Y

Check the

INSTART menu RF Receiver ver

is “00.00”?

Y

Check & Repair

RF assy

connection

N

Down load the Firmware

* INSTART MENUÆ15.RF

Remocon TestÆ3. Firmware

download

Y

RF Receiver ver

is “00.00”? NClose

☞A28

☞A7

☞A7

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

D. Function error

Wifi operating checking

3.Wifi operating error

Check the

INSTART menu Wi-Fi Mac value

is “NG”?

Y

Check & Repair

Wifi cable

connection

NCheck the Wifi wafer

(P4301)_1pin

Standard Repair Process

Established

date

Revised date 12/15

LCD TV Error

symptom

12

2012.01.16

Change the Wifi

assy

Normal

Voltage?

Close

Y

Y

NReplace

Main B/D

Wi-Fi Mac value

is “NG”? NClose

☞A29

☞A7

☞A7

☞A29

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Only for training and service purposes

LGE Internal Use Only

Check technical

information

- Fix information

- S/W Version

N

Y

Technical

information?

Check

input

signal

Signal

input?

Y

N

External Input and

Component

Recognition error

Check and fix

external device/cable

RGB,HDMI/

DVI, Optical

Recognition error

Replace Main B/D

Replace Main B/D

Fix in

accordance

with technical

information

D. Function error

External device recognition error

Established

date

Revised date 13/15

LCD TV Error

symptom

Standard Repair Process

13

2012.01.16

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Check

location of

noise

Identify

nose

type

Circuit

noise

Replace PSU(with LED driver)

Replace LED driver

Mechanical

noise Check location

of noise

OR

※When the nose is severe, replace the module

(For models with fix information, upgrade the

S/W or provide the description)

OR

※If there is a “Tak Tak” noise from the

cabinet, refer to the KMS fix information and

then proceed as shown in the solution manual

(For models without any fix information,

provide the description)

OR

※Mechanical noise is a natural

phenomenon, and apply the 1st level

description. When the customer does not

agree, apply the process by stage.

※Describe the basis of the description

in “Part related to nose” in the Owner’s

Manual.

E. Noise

Circuit noise, mechanical noise

Established

date

Revised date 14/15

LCD TV Error

symptom

Standard Repair Process

14

2012.01.16

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Only for training and service purposes

LGE Internal Use Only

Replace module

Zoom part with

exterior damage Module

damage

Cabinet

damage Replace cabinet

Replace remote controller

Remote

controller

damage

Stand

dent Replace stand

F. Exterior defect

Exterior defect

Established

date

Revised date 15/15

LCD TV Error

symptom

Standard Repair Process

15

2012.01.16

Copyright © 2012 LG Electronics. Inc. All rights reserved.

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LGE Internal Use Only

Contents of LCD TV Standard Repair Process Detail Technical Manual

No. Error symptom Content Page Remarks

1

A. Video error_ No video/Normal

audio

Check LCD back light with naked eye A1

2LED driver B+ 24V measuring method A2

3Check White Balance value A3

4A. Video error_ No video/Audio Power Board voltage measuring method A4

5

A. Video error_ video error /Video

lag/stop

TUNER input signal strength checking

method A6

6LCD-TV Version checking method A7

7Tuner Checking Part A8

8A. Video error _Vertical/Horizontal bar,

residual image, light spot LCD TV connection diagram A9

9A. Video error_ Color error

Check Link Cable (LVDS) reconnection

condition A10

10 Adjustment Test pattern -

ADJ

Key A12

11

<Appendix>

Defected Type caused by T-Con/

Inverter/ Module

Exchange T-Con Board (1) A-1/5

12 Exchange T-Con Board (2) A-2/5

13 Exchange LED driver Board (PSU) A-3/5

14 Exchange Module (1) A-4/5

15 Exchange Module (2) A-5/5

Continue to the next page

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Contents of LCD TV Standard Repair Process Detail Technical Manual

No. Error symptom Content Page Remarks

16

B. Power error_ No power

Check front display LED A17

17 Check power input Voltage & ST-BY 3.5V A18

18 Checking method when power is ON A19

19 B. Power error_Off

when on, off

while viewing POWER OFF MODE checking method A22

20 C. Audio error_ No audio/Normal

video

Checking method in menu when there is

no audio A24

22 Voltage and speaker checking method

when there is no audio A25

22

D. Function error

Remote controller operation checking

method A27

23 Motion Remote operation checking

method A28

24 Wifi

operation checking method A29

Continued from previous page

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Established

date

Standard Repair Process Detail Technical Manual

Revised

date A1

Error

symptom

Content Check LCD back light with naked eye

A. Video error_No video/Normal audio

After turning on the power and disassembling the case, check with the naked eye,

whether you can see light from 2 locations.

<XXLM9600>

LCD TV

A1

2011. 12 .14

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual

LED driver B+ 24V measuring method

A. Video error_No video/Normal audio

A2

Established

date

Revised

date

Error

symptom

Content

LCD TV

A2

Check the DC 24V and Inverter on

ALEF LED

2011. 12 .14

14 Pin

(Power Board ↔Driver) PSU

1 ~ 5 24V

6 ~ 10 GND

11 Detect

12 Inverter On/Off

13 Int. PWM

14 Ext. PWM (PDIM)

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Entry method

1. Press the ADJ button on the remote controller for adjustment.

2. Enter into White Balance of item 6.

3. After recording the R, G, B (GAIN, Cut) value of Color Temp

(Cool/Medium/Warm), re-enter the value after replacing the MAIN BOARD.

Standard Repair Process Detail Technical Manual

Check White Balance value

A. Video error_No video/Normal audio

<ALL MODELS>

A3

Established

date

Revised

date

Error

symptom

Content

LCD TV

A3

Entry method

1. Press the ADJ button on the remote controller for adjustment.

2. Enter into White Balance of item 10.

3. After recording the R, G, B (GAIN, Cut) value of Color Temp

(Cool/Medium/Warm), re-enter the value after replacing the MAIN BOARD.

2011. 12 .14

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual

Power Board voltage measuring method

A. Video error_No video/ Audio

A4

Established

date

Revised

date

Error

symptom

Content

LCD TV

A4

Check the DC 24V, 12V, 3.5V.

ALEF LED

2011. 12 .14

24 Pin

(Power Board ↔Main Board) -

공통

SMAW200-H24S (YEONHO)

1Power on 220V (24V)

320V (24V) 420V (24V)

5GND 6GND

7GND 8GND

93.5V 10 3.5V

11 3.5V 12 3.5V

13 GND 14 GND

15 GND 16 N.C

(Only LPB : V-sync)

17 12V 18 Inverter On/off

19 12V 20 N.C

(LPB, Lamp : A-dim)

21 12V 22 PWM Dim #1

23 N.C

(only Lamp SCANNING Model

: PWM Dim #2)

24 Error-out

Copyright © 2012 LG Electronics. Inc. All rights reserved.

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Settings ÆSet up ÆManual Tuning

Æselect channel

When the signal is strong, use the

attenuator (-10dB, -15dB, -20dB etc.)

Standard Repair Process Detail Technical Manual

TUNER input signal strength checking method

A. Video error_Video error, video lag/stop

<ALL MODELS>

A6

Established

date

Revised

date

Error

symptom

Content

LCD TV

A6

2011. 12 .14

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Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual

LCD-TV Version checking method

A. Video error_Video error, video lag/stop

1. Checking method for remote controller for adjustment

Press the IN-START with the

remote controller for adjustment

Version

<ALL MODELS>

A7

Established

date

Revised

date

Error

symptom

Content

LCD TV

A7

2011. 12 .14

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Checking method:

1. Check the signal strength or check whether the screen is normal when the external device is connected.

2. After measuring each voltage from power supply, finally replace the MAIN BOARD.

Standard Repair Process Detail Technical Manual

TUNER checking part

A. Video error_Video error, video lag/stop

<ALL MODELS>

A8

Established

date

Revised

date

Error

symptom

Content

LCD TV

A8

2011. 12 .14

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Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual

LCD TV connection diagram (1)

A. Video error _Vertical/Horizontal bar,

residual image, light spot

As the part connecting to the external input, check

the screen condition by signal

A9

Established

date

Revised

date

Error

symptom

Content

LCD TV

A9

<ALL MODELS>

2011. 12 .14

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Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual

Check Link Cable (LVDS) reconnection condition

A. Video error_Color error

Check the contact condition of the Link Cable, especially dust or mis insertion.

A10

Established

date

Revised

date

Error

symptom

Content

LCD TV

A10

<ALL MODELS>

2011. 12 .14

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual

Adjustment Test pattern - ADJ Key

A. Video error_Color error

You can view 6 types of patterns using the ADJ Key

Checking item : 1. Defective pixel 2. Residual image 3. MODULE error (ADD-BAR,SCAN BAR..)

4.Video error (Classification of MODULE or Main-B/D!)

A12

Established

date

Revised

date

Error

symptom

Content

LCD TV

A12

2011. 12 .14

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Only for training and service purposes

LGE Internal Use Only

Solder defect, CNT Broken

T-Con Defect, CNT Broken

T-Con Defect, CNT Broken

T-Con Defect, CNT Broken

Solder defect, CNT Broken Solder defect, CNT Broken

Solder defect, CNT Broken Solder defect, CNT Broken Abnormal Power Section

Solder defect, Short/Crack Abnormal Power Section Solder defect, Short/Crack

Appendix : Exchange T-Con Board (1)

A - 1/5

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Abnormal Power Section Solder defect, Short/Crack

Abnormal Power Section

Solder defect, Short/Crack Fuse Open, Abnormal power section

Noise

GRADATION GRADATION

Abnormal Display

Appendix : Exchange T-Con Board (2)

A - 2/5

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Appendix : Exchange LED driver Board (PSU)

No Light Dim Light

Dim Light Dim Light

No picture/Sound Ok

A - 3/5

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Appendix : Exchange the Module (1)

Panel Mura, Light leakage Press damage

Crosstalk

Crosstalk Press damage

Panel Mura, Light leakage

Press damage

A - 4/5

Un-repairable Cases

In this case please exchange the module.

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Vertical Block

Source TAB IC Defect

Horizontal Block

Gate TAB IC Defect Gate TAB IC Defect Gate TAB IC Defect

Vertical Line

Source TAB IC Defect Vertical Block

Source TAB IC Defect

Horizontal Block

Gate TAB IC Defect Horizontal line

Gate TAB IC Defect

Gate TAB IC Defect

Horizontal Block

Gate TAB IC Defect

Appendix : Exchange the Module (2)

A - 5/5

Un-repairable Cases

In this case please exchange the module.

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual

Check front display LED

B. Power error _No power

A17

Established

date

Revised

date

Error

symptom

Content

LCD TV

A17

ST-BY condition: Red or Turn Off

Power ON condition: Turn Off

Front LED control :

Menu ÆOption Æ

Standby Light

ÆON/ Off

2011. 12 .14

<XXLM9600>

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual

Check power input voltage and ST-BY 3.5V

B. Power error _No power

A18

Established

date

Revised

date

Error

symptom

Content

LCD TV

A18

Check the DC 24V, 12V, 3.5V.

ALEF LED

2011. 12 .14

24 Pin

(Power Board ↔Main Board) -

공통

SMAW200-H24S (YEONHO)

1Power on 220V (24V)

320V (24V) 420V (24V)

5GND 6GND

7GND 8GND

93.5V 10 3.5V

11 3.5V 12 3.5V

13 GND 14 GND

15 GND 16 N.C

(Only LPB : V-sync)

17 12V 18 Inverter On/off

19 12V 20 N.C

(LPB, Lamp : A-dim)

21 12V 22 PWM Dim #1

23 N.C

(only Lamp SCANNING Model

: PWM Dim #2)

24 Error-out

<XXLM9600>

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Standard Repair Process Detail Technical Manual

Checking method when power is ON

B. Power error _No power

A19

Established

date

Revised

date

Error

symptom

Content

LCD TV

A19

Check “power on” pin is high

2011. 12 .14

ALEF LED 24 Pin

(Power Board ↔Main Board) -

공통

SMAW200-H24S (YEONHO)

1Power on 220V (24V)

320V (24V) 420V (24V)

5GND 6GND

7GND 8GND

93.5V 10 3.5V

11 3.5V 12 3.5V

13 GND 14 GND

15 GND 16 N.C

(Only LPB : V-sync)

17 12V 18 Inverter On/off

19 12V 20 N.C

(LPB, Lamp : A-dim)

21 12V 22 PWM Dim #1

23 N.C

(only Lamp SCANNING Model

: PWM Dim #2)

24 Error-out

<XXLM9600>

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Entry method

1. Press the IN-START button of the remote

controller for adjustment

2. Check the entry into adjustment item 3

Standard Repair Process Detail Technical Manual

POWER OFF MODE checking method

B. Power error _Off when on, off whiling viewing

<ALL MODELS>

A22

Established

date

Revised

date

Error

symptom

Content

LCD TV

A22

2011. 12 .14

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Checking method

1. Press the Setting button on the remote controller

2. Select the Sound function of the Menu

3. Select the Sound Setting

4. Select TV Speaker from Off to On

Standard Repair Process Detail Technical Manual

Checking method in menu when there is no audio

C. Audio error_No audio/Normal video

<ALL MODELS>

A24

Established

date

Revised

date

Error

symptom

Content

LCD TV

A24

2011. 12 .14

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Checking order when there is no audio

①Check the contact condition of or 24V connector of Main Board

②Measure the 24V input voltage supplied from Power Board

(If there is no input voltage, remove and check the connector)

③Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the

GND and output terminal, the speaker is normal.

Standard Repair Process Detail Technical Manual

Voltage and speaker checking method

when there is no audio

C. Audio error_No audio/Normal video

A25

Established

date

Revised

date

Error

symptom

Content

LCD TV

A25

①

②

③

②

2011. 12 .14

ALEF LED 24 Pin

(Power Board ↔Main Board)

1Power on 224V

324V 424V

5GND 6GND

7GND 8GND

93.5V 10 3.5V

11 3.5V 12 3.5V

13 GND 14 GND

15 GND 16 V-sync

17 12V 18 Inverter On/off

19 12V 20 N.C

21 12V 22 PWM Dim #1

23 PWM Dim #2 24 Error-out

<XXLM9600>

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Checking order

1, 2. Check IR cable condition between IR & Main board.

3. Check the st-by 3.3V on the terminal 6.

4. When checking the Pre-Amp when the power is in ON condition, it is normal when the

Analog Tester needle moves slowly, and defective when it does not move at all.

Standard Repair Process Detail Technical Manual

Remote controller operation checking method

D. Function error

<XXLM9600>

A27

Established

date

Revised

date

Error

symptom

Content

LCD TV

A27

P4102

1SCL

2SDA

3GND

4KEY1

5KEY2

6St 3.5V

7GND

8GP4_LED_R

9IR

10 GND

①

②

③

④

2011. 12 .14

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Checking order

1, 2. Check Motion cable condition between Motion assy & Main board.

3. Check the 3.3V on the terminal 1.

Standard Repair Process Detail Technical Manual

Motion Remote operation checking method

Established

date

Revised

date

Error

symptom

Content

LCD TV

A28

P4800

13.3V

2GND

3RX

4TX

5RESET

6DC

7DD

8GND

①

②

③

2011. 12 .14

<XXLM9600>

A28

D. Function error

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Checking order

1, 2. Check Wifi cable condition between Wifi assy & Main board.

3. Check the 5V on the terminal 1.

Standard Repair Process Detail Technical Manual

Wifi operation checking method A29

Established

date

Revised

date

Error

symptom

Content

LCD TV

A29

P4301

1VDD

2DM

3DP

4GND

②

③

2011. 12 .14

①

<XXLM9600>

D. Function error

Copyright © 2012 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only