I Phone 6+ Schematics
User Manual: Manual IPhone - Schematics & Service Manuals PDF
Open the PDF directly: View PDF .
Page Count: 54
Download | ![]() |
Open PDF In Browser | View PDF |
https://www.mobile-manuals.com/ 7 8 6 5 4 3 2 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. Thu Apr 17 17:11:44 2014 N61 CARRIER BUILD 1 REV ECN DESCRIPTION OF REVISION 7 0002727241 CK APPD DATE ENGINEERING RELEASED 2014-04-18 N61 BOM CALLOUTS TABLE_5_HEAD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION TABLE_5_ITEM 051-9903 1 SCH, MLB, N61 SCH CRITICAL ? 820-3486 1 PCBF, MLB, N61 PCB CRITICAL ? 825-6838 1 EEEE FOR 639-4237 16GB EEEE_G16T CRITICAL EEEE_16G 825-6838 1 EEEE FOR 639-5838 32GB EEEE_G16R CRITICAL EEEE_32G TABLE_5_ITEM D PDF PAGE 2 TABLE_TABLEOFCONTENTS_HEAD CONTENTS 2 SOC:MAIN N56_MLB 08/29/2013 TABLE_5_ITEM NAND BOM OPTIONS D TABLE_5_ITEM TABLE_5_HEAD 3 TABLE_TABLEOFCONTENTS_ITEM 3 SOC:I/OS N56_MLB 08/29/2013 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION TABLE_5_ITEM TABLE_5_ITEM 4 4 SOC:VDDCA,VDD1/2,VDD,VDD_CPU,VDD_GPU N56_MLB 08/29/2013 335S0998 1 NAND,19NM,16GX8,MLC,PPN1.5 U0604 CRITICAL NAND_16G 5 5 SOC:GND,VDDIO18,VDDIOD,VDD_VAR_SOC N56_MLB 08/29/2013 335S0993 1 NAND,19NM,32GX8,MLC,PPN1.5 U0604 CRITICAL NAND_32G 6 6 SOC:NAND N56_MLB 08/29/2013 7 7 SOC:CAM,LCD,LPDP,PCIE N56_MLB 08/29/2013 IO:BUTTON FLEX CONN N61_MLB 08/26/2013 TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 8 TABLE_TABLEOFCONTENTS_ITEM 8 825-6838 1 EEEE FOR 639-5839 64GB EEEE_G16Q CRITICAL EEEE_64G 825-6838 1 EEEE FOR 639-00025 128GB EEEE_G16N CRITICAL EEEE_128G 825-6838 1 EEEE FOR 639-00208 16GB EEEE_F98F CRITICAL EEEE_16G_TDDLTE 825-6838 1 EEEE FOR 639-00209 32GB EEEE_FQK0 CRITICAL EEEE_32G_TDDLTE 825-6838 1 EEEE FOR 639-00210 64GB EEEE_FQJY CRITICAL EEEE_64G_TDDLTE 825-6838 1 EEEE FOR 639-00212 128GB EEEE_FY9W CRITICAL EEEE_128G_TLC_TDDLTE TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM 335S0994 1 NAND,19NM,64GX8,MLC,PPN1.5 U0604 CRITICAL NAND_64G TABLE_5_ITEM TABLE_5_ITEM 335S00010 1 NAND,19NM,128GX8,TLC,PPN1.5 U0604 CRITICAL NAND_128G TABLE_5_ITEM TABLE_5_ITEM 9 TABLE_TABLEOFCONTENTS_ITEM 9 AUDIO:L67 CODEC (1/2) N61_MLB 08/26/2013 138S0867 1 CAP,X5R,10UF,20%,6.3V,0.65MM,HRTZ,0402 C0610,C0611,C0614,C0634 CRITICAL NAND_16G TABLE_5_ITEM TABLE_5_ITEM 10 10 11 11 CAMERA:FRONT FLEX CONN N61_MLB 08/26/2013 12 12 POWER:ADI(1/2) N56_MLB 08/29/2013 13 13 POWER:ADI(2/2) N56_MLB 08/29/2013 14 14 POWER:TIGRISR,VIBE DRIVER N61_MLB 08/21/2013 15 15 DISPLAY:CHESTNUT,BACKLIGHT DRIVER N61_MLB 08/26/2013 16 16 AUDIO:SPKR AMP,STROBE N61_MLB 08/26/2013 17 17 IO:TRISTAR2 N61_MLB 08/26/2013 18 18 IO:DOCK FLEX CONN N61_MLB 19 19 SENSORS:COMPASS 20 20 DISPLAY:FLEX CONN 21 21 22 TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM AUDIO:L67 CODEC (2/2) N61_MLB 08/26/2013 138S0867 1 CAP,X5R,10UF,20%,6.3V,0.65MM,HRTZ,0402 C0613,C0633,C0610,C0611,C0614,C0634 NAND_32G & NAND_64G TABLE_5_ITEM 138S00003 1 CAP,X5R,15UF,20%,6.3V,0.65MM,HRTZ,0402 C0613,C0633,C0610,C0611,C0614,C0634 CRITICAL NAND_128G ALTERNATE NAND BOM OPTIONS TABLE_ALT_HEAD PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION 08/26/2013 335S0992 335S0998 ALTERNATE U0604 TOSHIBA,NAND,16GB N61_MLB 08/26/2013 335S1038 335S0998 ALTERNATE U0604 HYNIX,NAND,16GB N61_MLB 08/26/2013 335S1040 335S0994 ALTERNATE U0604 HYNIX,NAND,64GB SENSORS:MESA FLEX CONN N61_MLB 08/26/2013 22 335S00014 335S0994 ALTERNATE U0604 TOSHIBA,NAND,64GB SENSORS:OSCAR,CARBON,PHOS,MAGNESIUM N61_MLB 08/26/2013 23 23 CAMERA:REAR FLEX CONN 335S00015 335S00010 ALTERNATE U0604 TOSHIBA,NAND128GB N61_MLB 08/26/2013 24 24 TOUCH:CUMULUS,MESON N/A N/A 335S00009 335S0994 ALTERNATE U0604 SANDISK,NAND,64GB,TLC 25 25 POWER:BATT CONN,TPS,PD FEATURES N61_MLB 08/26/2013 26 26 SYSTEM:VOLTAGE PROPERTIES N56_MLB 09/10/2013 27 27 SYSTEM:N61 SPECIFIC N56_MLB 09/10/2013 28 28 BLANK N56_MLB 09/10/2013 29 30 CELL:ALIASES 30 31 31 32 BASEBAND PMU (1 0F 2) N61_RADIO_MLB 32 33 BASEBAND PMU (2 OF 2) N61_RADIO_MLB 33 34 BASEBAND (1 OF 2) BASEBAND (1 OF 2) TABLE_TABLEOFCONTENTS_ITEM CRITICAL REF DES COMMENTS: TABLE_ALT_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM C TABLE_TABLEOFCONTENTS_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM C TABLE_ALT_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM ALTERNATE BOM OPTIONS TABLE_ALT_HEAD SHIELD BOM OPTIONS PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION REF DES COMMENTS: 152S1844 152S1836 ALTERNATE L1604 TY ALT INDUCTOR 152S1842 152S1849 ALTERNATE L1519 TY ALT INDUCTOR 197S0392 197S0369 ALTERNATE Y1200 ESPON ALT XTAL 197S0399 197S0369 ALTERNATE Y1200 NDK ALT XTAL 338S1285 338S1202 ALTERNATE U1601 L21 SPKAMP TABLE_ALT_ITEM TABLE_5_HEAD PART# AP INTERFACE & DEBUG CONNECTORS N61_RADIO_MLB QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION TABLE_ALT_ITEM 03/24/2014 TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM 03/24/2014 604-00241 1 SUBASSY, SHIELD, UPPER FRONT, N61 SH2501 CRITICAL COMMON 03/24/2014 604-00242 1 SUBASSY, SHIELD, LOWER FRONT, N61 SH2502 CRITICAL COMMON N61_RADIO_MLB 03/24/2014 604-00243 1 SUBASSY, SHIELD, LOWER BACK, N61 SH2504 CRITICAL COMMON N61_RADIO_MLB 03/24/2014 604-00244 1 SUBASSY, SA SHIELD, N61 SH2506 CRITICAL COMMON TABLE_ALT_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 34 TABLE_TABLEOFCONTENTS_ITEM 35 TABLE_ALT_ITEM TABLE_5_ITEM TABLE_ALT_ITEM TABLE_5_ITEM TABLE_ALT_ITEM L1209,L1211, L1213 35 36 MOBILE DATA MODEM (2 OF 2) N61_RADIO_MLB 03/24/2014 152S2034 152S2033 ALTERNATE 36 37 RF TRANSCEIVER (1 0F 3) N61_RADIO_MLB 03/24/2014 152S00004 152S2049 ALTERNATE 37 38 RF TRANSCEIVER (2 OF 3) N61_RADIO_MLB 03/24/2014 339S00005 339S0246 ALTERNATE U0201 FIJI, B0, SAMSUNG 38 39 RF TRANSCEIVER (3 OF 3) N61_RADIO_MLB 03/24/2014 FIJI, B0, HYNIX TABLE_TABLEOFCONTENTS_ITEM 1.2MM 1.0UH, CYNTEC TABLE_ALT_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM L1210,L1212, L1214 TABLE_ALT_ITEM 39 40 QFE DCDC N61_RADIO_MLB 03/24/2014 40 41 2G PA N61_RADIO_MLB 03/24/2014 TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 1.2MM 0.47UH, CYNTEC TABLE_ALT_ITEM 339S0247 339S0246 ALTERNATE U0201 339S00006 339S0246 ALTERNATE U0201 FIJI, B1, E FIJI, B1, H FIJI, B1, S TABLE_ALT_ITEM TABLE_ALT_ITEM 41 42 VERY LOW BAND PAD N61_RADIO_MLB 03/24/2014 339S00007 339S0246 ALTERNATE U0201 42 43 LOW BAND PAD N61_RADIO_MLB 03/24/2014 339S00008 339S0246 ALTERNATE U0201 43 44 MID BAND PAD N61_RADIO_MLB 03/24/2014 155S0773 155S0453 ALTERNATE 44 45 HIGH BAND PAD N61_RADIO_MLB 03/24/2014 45 46 ANTENNA SWITCH N61_RADIO_MLB 03/24/2014 TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM B TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TY 120OHM FERRITE 118S0717 ALTERNATE 343S0688 343S0638 ALTERNATE U2401 CUMULUS C1, FAB4 C1290 15UF,0402,HRTZL CAP CMC,90OHM,MURATA 3.92KOHM, 01005 TABLE_ALT_ITEM 46 47 HIGH BAND SWITCH N61_RADIO_MLB 03/24/2014 47 48 RX DIVERSITY N61_RADIO_MLB 03/24/2014 138S00005 138S00003 ALTERNATE 48 49 GPS N61_RADIO_MLB 03/24/2014 155S00011 155S00008 ALTERNATE L1135 49 50 GPS N61_RADIO_MLB 03/24/2014 DZ1113 50 51 ANTENNA FEEDS N61_RADIO_MLB 03/24/2014 TABLE_TABLEOFCONTENTS_ITEM B TABLE_ALT_ITEM 118S0764 R1309 TABLE_ALT_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 51 52 52 53 53 54 54 55 TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM WIFI/BT: MODULE AND FRONT END 377S0168 377S0140 ALTERNATE 155S0885 155S0610 ALTERNATE FL1802,FL1803 FERR BD,150OHM,200MA,01005 138S0648 138S0652 ALTERNATE C1018 CAP,4.7UF,20%,6.3V,0402,H=0.65MM CAP,4.3UF,20%,4V,0610 SUPPR,TRANS,VARISTOR,AMOTECH TABLE_ALT_ITEM N61_RADIO_MLB 03/24/2014 N61_RADIO_MLB 03/24/2014 JUMPER N61_RADIO_MLB 03/24/2014 138S0657 138S0702 ALTERNATE C1106 JUMPER N61_RADIO_MLB 03/24/2014 338S00028 338S00017 ALTERNATE U2203 CARBON, BOSCH, BMI162BC 338S00029 338S00017 ALTERNATE U2203 CARBON, ST, AP6DS2AA 335S00013 335S0894 ALTERNATE U0301 ST 8K EEPROM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_ALT_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_ALT_ITEM SCH 051-9903 BRD 820-3486 MCO 056-6825 A TABLE_ALT_ITEM A BOM 639-00208 (16GB,BETTER,DTD) BOM 639-00209 (32GB,BEST,DTD) BOM 639-00210 (64GB,ULTRA,DTD) BOM 639-4237 (16GB,BETTER) BOM 639-5838 (32GB,BEST) BOM 639-5839 (64GB,ULTRA) DRAWING TITLE SCHEM,MLB,N61 DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED BOM 639-00025(128GB,SUPREME,TLC) BOM 639-00212(128GB,SUPREME,TLC,DTD) 8 7 6 5 4 051-9903 REVISION 3 2 7.0.0 BRANCH PAGE 1 OF 55 SHEET 1 OF 54 1 SIZE D https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 FIJI: JTAG,USB,HSIC,XTAL ROOM=SOC D FL0201 D 1KOHM-25%-0.2A 26 PP1V8_XTAL 1 ROOM=SOC 26 12 11 5 4 R02012 PP1V2 1 0.00 26 C0203 PP1V2_PLL ROOM=SOC 1 C0206 0.1UF 20% 2 4V X5R 01005 ROOM=SOC 1 C0213 0.1UF 20% 2 4V X5R 01005 ROOM=SOC 1 1 0.1UF 01005 ROOM=SOC 1 0.01UF 10% 6.3V 2 X5R 01005 1 C0208 0.01UF 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27 0201 C0204 2.2UF 20% 4V X5R 2 01005 ROOM=SOC C0207 PP1V8 2 20% 6.3V 2 X5R 0201-1 ROOM=SOC 10% 2 6.3V X5R 01005 ROOM=SOC 1 VOLTAGE=0V PWRTERM2GND 1.2V VDD18_XTAL E14 VDD18_EFUSE1 J7 VDDA18_CPU_TSADC AE15 VDDA18_SOC0_TSADC V17 VDDA18_SOC1_TSADC G7 M16 V19 AD14 AN24 VDDA12_PLL_SOC VDDA12_PLL_MG VDDA12_PLL_CPU VDDA12_PLL_LPDP VDD12_UH0_HSIC0 D7 VDD12_UH2_HSIC1 AN4 20% 6.3V X5R 2 0201 PP0201 P4MM SM PP REMOVE PP IF SPACE IS NEEDED PP0202 P4MM SM PP 20 15 13 12 11 10 7 6 5 3 2 27 26 25 24 23 PP1V8 NC NC 1 50_AP_BI_BB_HSIC1_DATA 50_AP_BI_BB_HSIC1_STB 29 BASEBAND 29 NC NC NC NC 1 R0206 SERIAL MODE NAMES 5% 1/32W MF 2 01005 17 17 TRISTAR_BI_AP_JTAG_SWDIO TRISTAR_TO_AP_JTAG_SWCLK ROOM=SOC 25 17 15 13 4 RESET_1V8_L ROOM=SOC 1 AR4 AP4 UH2_HSIC1_DATA UH2_HSIC1_STB 3.3V C0201 K4 L4 J5 L3 K5 K3 K2 AH32 RESET* AJ33 W4 CFSB CFSB1 AH33 1000PF 10% 6.3V 2 X5R-CERM 01005 B 13 AP_TO_PMU_TEST_CLKOUT JTAG_SEL JTAG_TRTCK JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK 4 12 23 26 20% 2 6.3V X5R-CERM 01005 ROOM=SOC 1 C0211 0.1UF 20% 4V 2 X5R 01005 C P2MM-NSM PP SM 0.95V PP0203 PLACE NEAR SOC. P2MM-NSM PP SM PP0204 POP-FIJI-1GB-DDR-B0 BGA SYM 1 OF 13 ROOM=SOC ANALOGMUXOUT D15 NC USB_DP F5 USB_DM E5 1 NO_XNET_CONNECTION=TRUE 100K UH1_HSIC0_DATA UH1_HSIC0_STB 20% 2 4V X5R 01005 C0205 0.1UF PP1V2_SDRAM U0201 C1 C2 90_AP_BI_TRISTAR_USB0_P 17 90_AP_BI_TRISTAR_USB0_N 17 USBHS ON/OFF TOLERANCE 5V/1.98V USB_VBUS D3 USB_ID D2 USB_VBUS_DETECT 14 NC USB_REXT D1 USB_REXT 1 WDOG AK30 HOLD_RESET AP_TO_PMU_RESET_IN TST_CLKOUT AG29 FAST_SCAN_CLK AH29 TESTMODE R0203 13 200 NOTE: NEW USB_REXT VALUE FOR FIJI = 200 OHM 1% 1/32W MF 2 01005 XI0 A16 XO0 A15 AH31 C0212 0.1UF 12 26 ROOM=SOC 1 VDD33_USB E1 0.22UF VDD12_CKE_DDR0 D16 VDD12_CKE_DDR1 N5 C0202 1 VDDH_USB E2 ROOM=SOC C PP3V3_USB B C0209 12PF DEVICE ADI PMU: LM3534 BL DRIVER: TRISTAR: CHESTNUT: I2C1 TIGRIS CHARGER: LINEAR VIBE: CS35L19B AMP: MESA EEPROM (MEMORY): MESA EEPROM (ID): BINARY 7-BIT HEX 8-BIT HEX 1110100X 1100011X 0011010X 0100111X 0X74 0X63 0X1A 0X27 0XE8 0XC6 0X34 0X4E 1110101X 1011010X 1000000X 1010110X 1011110X 0X75 0X5A 0X40 0X56 0X5E 0XEA 0XB4 0X80 0XAC 0XBC 0101001X 1010001X 0X29 0X51 0X52 0XA2 1100011X 0010000X 0001100X 0X63 0X10 0X0C 0XC6 0X20 0X18 0010000X 0X10 0X20 24.000MHZ-30PPM-9.5PF-60OHM 2 4 Y0201 1% 1/32W MF 01005 2 1.00M 1.60X1.20MM-SM R0207 1.33K2 1 1% 1/32W 1 45_XTAL_24M_I 45_XTAL_24M_O I2C0 R02021 3 1 I2C ADDRESS MAP 2 5% 16V CERM 01005 PCB: PLACE THIS XW AT U0201, NEAR XI/XO C0210 XW0204 12PF 45_XTAL_24M_O_R MF 01005 1 2 SHORT-10L-0.1MM-SM 1 2 45_XTAL_24M_O_GND ROOM=SOC 5% 16V CERM 01005 I2C2 CT814 ALS: DISPLAY EEPROM: A RCAM I2C OPEL STROBE DRIVER: REAR FACING CAM: VCM AF DRIVER: SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 PAGE TITLE SOC:MAIN DRAWING NUMBER FCAM I2C FRONT FACING CAM: Apple Inc. 051-9903 REVISION R NOTE: ACCEL, GYRO, COMPASS ALL USING SPI (VIA OSCAR) FOR AP COMMUNICATION. NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 2 OF 55 SHEET 2 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 FIJI: DIGITAL I/O,BOOTSTRAPPING PP1V8 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27 ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC 1 1 1 1 1 R0302 R0303 R0304 R0305 D 2.2K 2.2K 5% 1/32W MF 01005 2 5% 1/32W MF 01005 2 2.2K 5% 1/32W MF 01005 2 R0306 R0308 2.2K 1.33K 5% 1/32W MF 01005 2 1% 1/32W MF 01005 1 1.33K P2MM-NSM 1 1/32W 1% MF 01005 P2MM-NSM 1 2 PP SM PP SM 2 PP0301 D PP0302 ROOM=SOC R0301 10 29 BOARD_REV3 BOARD_REV2 BOARD_REV1 BOARD_REV0 27 27 27 29 CODEC_TO_AP_INT_L AP_TO_RADIO_ON_L BOARD_REV3 BOARD_REV2 BOARD_REV0 AP_TO_BB_COREDUMP I2S2_MCK I2S2_BCLK I2S2_LRCK I2S2_DIN I2S2_DOUT ALS_TO_AP_INT_L 45_AP_TO_BB_I2S3_BCLK AP_TO_BB_I2S3_LRCLK BB_TO_AP_I2S3_DIN AP_TO_BB_I2S3_DOUT AA2 AA4 AA3 Y1 Y2 I2S3_MCK I2S3_BCLK I2S3_LRCK I2S3_DIN I2S3_DOUT AB32 I2S4_MCK AB33 I2S4_BCLK AA30 I2S4_LRCK AA32 I2S4_DIN AA33 I2S4_DOUT 29 UART0_RXD AL2 UART0_TXD AL1 TRISTAR_TO_AP_DEBUG_UART0_RXD AP_TO_TRISTAR_DEBUG_UART0_TXD ROOM=SOC R0311 17 17 16 UART1_CTSN UART1_RTSN UART1_RXD UART1_TXD H30 H31 H32 H33 UART2_CTSN UART2_RTSN UART2_RXD UART2_TXD AL31 AM33 AL32 AL33 UART3_CTSN UART3_RTSN UART3_RXD UART3_TXD F30 G30 G31 G32 UART4_CTSN UART4_RTSN UART4_RXD UART4_TXD AE31 AF31 AE32 AE33 BT_TO_AP_UART1_CTS_L AP_TO_BT_UART1_RTS_L BT_TO_AP_UART1_RXD AP_TO_BT_UART1_TXD BB_TO_AP_UART2_CTS_L AP_TO_BB_UART2_RTS_L BB_TO_AP_UART2_RXD AP_TO_BB_UART2_TXD STOCKHOLM_TO_AP_UART3_CTS_L AP_TO_STOCKHOLM_UART3_RTS_L STOCKHOLM_TO_AP_UART3_RXD AP_TO_STOCKHOLM_UART3_TXD 45_AP_TO_SPKAMP_I2S2_MCLK 1 29 16 10 16 10 16 10 BLUETOOTH 29 CODEC XSP & SPKR AMP 29 16 10 PP0303 P2MM-NSM 29 SM PP 29 17 29 BASEBAND 1 11 29 ROOM=SOC 29 29 17 29 BASEBAND 29 29 17 13 STOCKHOLM 10 29 CODEC VSP 29 10 10 AP_TO_TIGRIS_SWI 14 10 TRISTAR_TO_AP_INT 45_AP_TO_CODEC_VSP_I2S4_BCLK AP_TO_CODEC_VSP_I2S4_LRCLK CODEC_TO_AP_VSP_I2S4_DIN AP_TO_CODEC_VSP_I2S4_DOUT TRISTAR_TO_AP_ACC_UART6_RXD AP_TO_TRISTAR_ACC_UART6_TXD BOARD_ID2 BOARD_ID1 BOARD_ID0 GAS GAUGE 27 26 27 GRP2 GRP4 29 14 AB30 GPIO40 AB31 GPIO41 AL3 GPIO42 BUTTON_TO_AP_RINGER_A BB_TO_AP_IPC_GPIO AP_TO_VIBE_EN BOARD_ID2 BOARD_ID1 NC NC 17 CODEC 10 10 17 10 13 8 UART7_RXD UART7_TXD UART8_RXD UART8_TXD B30 NC A30 AF2 AF1 I2C2_SCL AH1 I2C2_SDA AH2 AP_TO_I2C2_SCL AP_BI_I2C2_SDA GRP3 GRP2 13 15 17 14 16 21 14 16 21 11 20 11 20 I2C3_SCL AN1 NC I2C3_SDA AN2 NC P2MM-NSM 13 15 PP SM DWI_DO AL30 45_AP_TO_PMU_AND_BL_DWI_DO PP0305 P2MM-NSM 13 15 PP SM PP0304 C WIFI UART 10 UART6_RXD AM2 UART6_TXD AM1 AP_TO_I2C1_SCL AP_BI_I2C1_SDA 13 15 17 29 WLAN_TO_AP_UART4_CTS_L 29 AP_TO_WLAN_UART4_RTS_L 29 WLAN_TO_AP_UART4_RXD 29 AP_TO_WLAN_UART4_TXD 29 UART5_RTXD AG4 Y31 Y30 DWI_CLK AL29 45_AP_TO_PMU_AND_BL_DWI_CLK 33.2 2 1% 1/32W MF 01005 29 29 GRP4 29 GRP3 BOOT_CONFIG2 BOARD_ID4 BLUETOOTH AP_TO_WLAN_DEVICE_WAKE 29 OSCAR_TO_AP_UART_RXD 22 AP_TO_OSCAR_UART_TXD 22 24 GRAPE 24 24 24 B 21 ROOM=SOC 21 R03402 AP_TO_MESA_SPI_CLK 1 01005 CODEC_TO_AP_SPI_MISO AP_TO_CODEC_SPI_MOSI AP_TO_CODEC_SPI_CLK AP_TO_CODEC_SPI_CS_L TOUCH_TO_AP_SPI_MISO AP_TO_TOUCH_SPI_MOSI AP_TO_TOUCH_SPI_CLK AP_TO_TOUCH_SPI_CS_L MESA_TO_AP_SPI_MISO AP_TO_MESA_SPI_MOSI AP_TO_MESA_SPI_CLK_R 21 MESA_TO_AP_INT 21 AG1 AG2 AG3 AH3 J3 J2 J1 J4 F33 F32 E32 E31 AD33 AD32 AD31 AE30 SPI0_MISO SPI0_MOSI SPI0_SCLK SPI0_SSIN SPI1_MISO SPI1_MOSI SPI1_SCLK SPI1_SSIN SPI2_MISO SPI2_MOSI SPI2_SCLK SPI2_SSIN SPI3_MISO SPI3_MOSI SPI3_SCLK SPI3_SSIN SEP_I2C_SCL SEP_I2C_SDA SEP_SPI_SCLK SEP_SPI_SSIN SEP_SPI_MISO SEP_SPI_MOSI SEP_GPIO0 AR31 AP31 AN30 NC AN31 NC AN33 NC AN32 NC AM30 AP_TO_EEPROM_I2C_SCL AP_BI_EEPROM_I2C_SDA 3 3 NC ISP_UART0_RXD C32 ISP_UART0_TXD C33 PP1V8 OSCAR_TO_AP_ISP_UART_RXD AP_ISP_TO_OSCAR_UART_TXD 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27 22 22 1 R0310 10K 5% 1/32W MF 01005 2 GRP3 DFU STATUS D25 N30 N31 P32 P33 29 14 GRP4 BOOT_CONFIG1 AP_TO_PMU_KEEPACT 29 BB_TO_AP_DEVICE_RDY 29 BB_TO_AP_GPS_SYNC 29 AP_TO_BB_HOST_RDY 29 BB_TO_AP_RESET_DET_L 27 BOOT_CONFIG1 25 FORCE_DFU 45_AP_TO_SPKAMP_I2S2_MCLK_R 45_AP_TO_CODEC_XSP_I2S2_BCLK AP_TO_CODEC_XSP_I2S2_LRCLK CODEC_TO_AP_XSP_I2S2_DIN AP_TO_CODEC_XSP_I2S2_DOUT NC 22 SOCHOT0 AJ31 SOCHOT1 AJ32 ROOM=SOC PMU_TO_AP_PRE_UVLO_L_R AP_TO_PMU_SOCHOT1_L_R R0315 1 0.00 2 0% 1/32W PMU_TO_AP_PRE_UVLO_L 13 MF 01005 ROOM=SOC DISP_VSYNC AL5 NC GRP2 13 I2S1_MCK I2S1_BCLK I2S1_LRCK I2S1_DIN I2S1_DOUT GRP2 C TMR32_PWM0 AM3 OSCAR_BI_AP_TIME_SYNC_HOST_INT AP_TO_VIBE_TRIG TMR32_PWM1 AM4 TMR32_PWM2 AN3 NC 10 GRP2 AP_TO_STOCKHOLM_SIM_SEL CODEC ASP AP_TO_I2C0_SCL AP_BI_I2C0_SDA GRP1 29 BOOT_CONFIG0 45_AP_TO_BT_I2S1_BCLK AP_TO_BT_I2S1_LRCLK BT_TO_AP_I2S1_DIN AP_TO_BT_I2S1_DOUT R30 P30 T30 R31 T31 10 AM32 AM31 I2S0_MCK I2C0_SCL U0201 I2C0_SDA I2S0_BCLK POP-FIJI-1GB-DDR-B0 I2S0_LRCK BGA I2C1_SCL I2S0_DIN SYM 3 OF 13 I2C1_SDA I2S0_DOUT GRP4 BOARD_ID3 D26 U30 U31 U32 U33 10 BGA SYM 2 OF 13 GRP2 1% 1/32W MF 01005 2 45_AP_TO_CODEC_I2S0_MCLK_R 45_AP_TO_CODEC_ASP_I2S0_BCLK AP_TO_CODEC_ASP_I2S0_LRCLK CODEC_TO_AP_ASP_I2S0_DIN AP_TO_CODEC_ASP_I2S0_DOUT 10 CLK32K_OUT AB1 45_AP_TO_TOUCH_CLK32K_RESET_L PP1V8_SDRAM 24 3 4 10 12 13 14 15 17 26 29 NOSTUFF CPU_SLEEP_STATUS AH30 NC NO CONNECTED ON MLB GRP3 2 1% 1/32W MF 01005 U0201 GRP4 5% 1/32W MF 01005 33.2 2 POP-FIJI-1GB-DDR-B0 GRP3 220K GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30 GPIO31 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GRP4 ROOM=SOC 1 R0314 R0313 392K AC1 AC2 AC3 AC4 AD1 AD2 AD3 AD4 AG30 AG31 AG32 Y3 Y4 AK31 AE1 AF30 AE2 NC AE3 AE4 NC AK32 AF3 NC AF4 AH4 AJ1 AD29 AJ2 AK33 AJ30 NC AJ3 NC AJ4 NC AD30 AC30 AC31 NC NCAB29 AK1 AK2 AK3 NC AK4 AM29 GRP3 PP1V8_ALWAYS ROOM=SOC 1 AP_TO_HEADSET_HS3_CTRL 18 AP_TO_HEADSET_HS4_CTRL 13 8 BUTTON_TO_AP_VOL_UP_L 13 8 BUTTON_TO_AP_VOL_DOWN_L 16 SPKAMP_TO_AP_INT_L 16 AP_TO_SPKAMP_BEE_GEES 16 AP_TO_SPKAMP_RESET_L 29 AP_TO_BT_WAKE 29 AP_TO_BB_RST_L 29 AP_TO_WLAN_JTAG_SWCLK 29 AP_TO_WLAN_JTAG_SWDIO 21 13 BUTTON_TO_AP_MENU_KEY_L 13 8 BUTTON_TO_AP_HOLD_KEY_L 13 PMU_TO_AP_IRQ_L 29 BB_TO_AP_IPC_GPIO1 29 AP_TO_BB_WAKE_MODEM 18 GRP2 26 14 12 5 PP1V8_SDRAM GRP2 14 13 12 10 4 3 29 26 17 15 45_AP_TO_CODEC_I2S0_MCLK 1 GRP3 10 B 1 R0307 10K 5% 1/32W MF 2 01005 NAND_SYS_CLK AB4 NC USED FOR PCIE NAND 0.00 R0312 1 ROOM=SOC 0.00 2 0% 1/32W AP_TO_PMU_SOCHOT1_L 13 MF 01005 ROOM=SOC ANTI-ROLLBACK EEPROM ONSEMI EEPROM APN:335S0894 PP1V8 A1 1 1 R0316 2.2K 5% 1/32W MF 2 01005 ROOM=E_SE 3 A 1.0UF 20% 6.3V 2 X5R 0201-1 VCC U0301 ROOM=E_SE CAT24C08C4A B1 SCL AP_TO_EEPROM_I2C_SCL C0301 WLCSP SDA B2 REMOVED HOLD + MENU KEY BUFFERS SINCE NOT NEEDED FOR FIJI 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27 1 R0317 2.2K 5% 1/32W MF 01005 2 ROOM=E_SE AP_BI_EEPROM_I2C_SDA 3 SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 PAGE TITLE SOC:I/OS A2 VSS ROOM=E_SE DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 3 OF 55 SHEET 3 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 FIJI: VDDCA,VDD1/2,VDDQ,VDD,VDD_FIXED,VDD_CPU,VDD_GPU VDDCA, VDD1/2, VDDQ D17 N4 25 17 15 13 2 RESET_1V8_L NOTE: CKEIN CONFIRMED 1.8V TOLERANT D 1 1 1 1 R0401 R0402 R0411 R0412 240 240 240 240 1% 1/32W MF 2 01005 1% 1/32W MF 2 01005 1% 1/32W MF 2 01005 1% 1/32W MF 2 01005 ROOM=SOC ROOM=SOC ROOM=SOC 45_DDR0_ZQ_CA 45_DDR1_ZQ_CA 45_DDR0_ZQ_DQ 45_DDR1_ZQ_DQ 4 45_DDR0_VREF_CA 4 45_DDR1_VREF_CA 4 45_DDR0_VREF_DQ 4 45_DDR1_VREF_DQ A20 B17 C14 H1 N1 U1 V1 ROOM=SOC (DDR IMPEDANCE CONTROL) 26 23 12 4 2 C PP1V2_SDRAM ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC C0402 C0422 C0401 C0429 1UF 1UF 1UF 4.3UF 20% 4V CERM 0402 1 20% 4V CERM 0402 3 2 1 4 20% 4V CERM 0402 3 2 1 20% 4V CERM 0402 3 4 2 1 4 3 2 4 PP1V8_SDRAM 29 26 17 15 14 13 12 10 3 ROOM=SOC 1 ROOM=SOC C0450 1 2.2UF C0451 ROOM=SOC 1 2.2UF 20% 6.3V 2 X5R 0201-1 A17 M1 AR13 L33 A18 P1 AR15 N33 20% 6.3V 2 X5R 0201-1 C0452 2.2UF 20% 6.3V 2 X5R 0201-1 AA1 AF33 AP25 AP6 AR17 B15 B19 B7 E33 G1 K33 R1 T32 Y32 A19 AG33 AR16 AR25 AR7 B16 B8 D33 K1 T1 T33 W1 R11 R13 R15 R17 R19 R2 R21 R23 R25 R27 R29 R3 R32 R4 R5 R6 R7 R9 T10 T12 T14 T16 T18 T2 T20 T22 T24 T26 T28 T29 T3 T4 T7 T8 U11 U13 U15 U17 U19 U2 U21 U23 U25 U27 U29 U3 U4 U5 U6 U7 U9 DDR0_CKEIN DDR1_CKEIN DDR0_ZQ_CA DDR1_ZQ_CA DDR0_ZQ_DQ DDR1_ZQ_DQ DDR0_VREF_CA DDR1_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ U0201 POP-FIJI-1GB-DDR-B0 BGA SYM 7 OF 13 VDDCA VDD2 1.2V VSS VDD1 1.8V 26 7 12 PP0V95_FIXED_SOC 26 12 ROOM=SOC 1 4.3UF 10UF 1 ROOM=SOC 1 20% 4V CERM 0402 3 2 AA16 AA18 AA22 AA6 AB10 AB23 AB25 AC14 AC16 AC18 AC27 AC7 AD13 AD19 AD21 AD25 AD6 AE10 AE11 AE16 AE22 AF13 AF17 AF23 AF25 AF27 AF7 AG14 AG16 AG18 AG6 AH10 AH20 AH7 AJ14 AJ16 AJ24 AJ27 AJ6 AJ9 AK12 AK18 AK20 AK22 AK25 F26 F7 G10 G12 G14 G16 G18 G20 G22 G8 H11 H13 H15 H9 J10 J12 J14 J26 J8 K11 K13 K15 K9 L10 4.3UF 20% 4V CERM 0402 20% 2 6.3V CERM-X5R 0402-9 1 4 3 2 4 ROOM=SOC ROOM=SOC C0405 C0404 1UF 1UF 20% 4V CERM 0402 20% 4V CERM 0402 1 3 1 2 3 2 4 ROOM=SOC 4 ROOM=SOC C0476 C0406 4.3UF 0.47UF 20% 4V CERM 0402 1 20% 6.3V CERM 0402 1 3 2 PP1V2 ROOM=SOC ROOM=SOC C0431 4.3UF 20% 4V CERM 0402 1 3 C0427 ROOM=SOC 1 C0467 1 1.0UF 20% 2 6.3V X5R 0201-1 C0432 1UF 1.0UF 20% 2 6.3V X5R 0201-1 20% 4V CERM 0402 1 3 ROOM=SOC 2 4 1 2 C0426 15PF 5% 16V 2 NP0-C0G-CERM 01005 ROOM=SOC 4 ROOM=SOC ROOM=SOC C0425 C0430 0.47UF 0.47UF 20% 6.3V CERM 0402 1 3 2 4 1 4 C0478 10UF 20% 6.3V 2 CERM-X5R 0402-9 ROOM=SOC VDDQ A POP-FIJI-1GB-DDR-B0 BGA SYM 10 OF 13 VDD_FIXED 0.95V TBD: 3.3A? @ 105C VDD_FIXED VDD_FIXED_SENSE V7 12 ROOM=SOC ROOM=SOC C0445 C0448 C0418 C0419 C0420 C0475 4.3UF 4.3UF 1UF 1UF 0.47UF 4.3UF 20% 6.3V 2 CERM-X5R 0402-9 20% 4V CERM 0402 ROOM=SOC 1 20% 4V CERM 0402 3 C0466 1 ROOM=SOC 2 1 4 20% 4V CERM 0402 3 2 1 4 20% 4V CERM 0402 3 2 ROOM=SOC 1 4 20% 6.3V CERM 0402 3 2 ROOM=SOC 1 4 3 2 1 4 D 20% 4V CERM 0402 1 4 3 2 4 10UF 20% 2 6.3V CERM-X5R 0402-9 ROOM=SOC 26 12 AA10 AA14 AA8 AB11 AB13 AB15 AB9 AC10 AC12 AC8 AD11 AD15 AD9 AE12 AE14 AE8 AF11 AF15 AF9 AG10 AG12 AG8 AH11 AH13 AH15 AH9 AJ10 AJ12 AJ7 AJ8 PP_CPU ROOM=SOC ROOM=SOC C0443 C0446 C0444 0.47UF 0.47UF 1UF 1 1 20% 6.3V CERM 0402 20% 6.3V CERM 0402 3 2 ROOM=SOC 4 3 2 20% 4V CERM 0402 1 4 3 2 4 ROOM=SOC ROOM=SOC C0409 C0411 C0414 4.3UF 4.3UF 4.3UF 20% 4V CERM 0402 1 3 2 ROOM=SOC 20% 4V CERM 0402 1 4 3 2 20% 4V CERM 0402 1 4 3 2 4 ROOM=SOC ROOM=SOC ROOM=SOC C0408 C0410 C0413 4.3UF 4.3UF 1UF 20% 4V CERM 0402 1 20% 4V CERM 0402 3 2 1 3 4 2 1 20% 4V CERM 0402 1 4 3 2 4 U0201 POP-FIJI-1GB-DDR-B0 BGA SYM 13 OF 13 VDD_CPU 0.775V - 1.0V TBD: 7.6A? @ 105C VDD_GPU 0.8V - 0.95V TBD: 3.45A? @ 105C C0447 10UF 20% 2 6.3V CERM-X5R 0402-9 12 ROOM=SOC ROOM=SOC C0415 C0465 20% 4V CERM 0402 20% 4V CERM 0402 1 3 2 4 1UF 1 SM PP 1 ROOM=SOC 3 2 AA12 VDD_CPU_SENSE PP0401 P2MM-NSM ROOM=SOC 4.3UF 45_BUCK0_FB 1 C0449 10UF 20% 6.3V 2 CERM-X5R 0402-9 4 ROOM=SOC ROOM=SOC 1 C0472 2.2UF PP0403 P2MM-NSM 45_BUCK5_FB 1 20% 2 6.3V X5R 0201-1 SM PP 20% 6.3V X5R 0201-1 C0468 1 1 2 20% 6.3V 2 CERM-X5R 0402-9 2.2UF C B AJ23 AJ25 W17 Y16 Y18 Y20 Y22 Y24 Y26 ROOM=SOC C0471 AA17 AA19 AA21 AA23 AA25 AB16 AB18 AB20 AB22 AB24 AB26 AC17 AC19 AC21 AC23 AC25 AD16 AD18 AD20 AD22 AD24 AD26 AE17 AE19 AE21 AE23 AE25 AF18 AF20 AF22 AF24 AF26 AG17 AG19 AG21 AG23 AG25 AH16 AH18 AH22 AH24 AH26 AJ17 AJ19 AJ21 10UF ROOM=SOC ROOM=SOC 12 AG27 45_BUCK1_FB VDD_GPU_SENSE PP0402 P2MM-NSM SM PP 1 ROOM=SOC 3 2 4 26 12 11 5 4 2 26 23 12 4 2 U0201 ROOM=SOC C0442 10UF L12 L14 L16 L26 L8 M11 M13 M15 M17 M9 N10 N12 N14 N16 N26 N8 P11 P13 P15 P17 P9 R10 R12 R14 R16 R18 R26 R8 T11 T13 T15 T17 T19 T9 U10 U12 U14 U16 U18 U26 U8 V11 V13 V15 V9 W10 W12 W14 W16 W18 W21 W8 Y11 Y13 Y15 Y19 Y23 Y25 Y27 Y7 Y9 20% 6.3V CERM 0402 3 2 AC33 AR11 AR14 AR19 AR22 AR24 AR6 AR8 G33 J33 M33 R33 V33 Y33 PP_GPU ROOM=SOC C0435 C0438 C0439 B 4 2 26 12 11 5 VDD_CPU, VDD_GPU VDD PP1V2 PP1V2_SDRAM 1 C0423 0.01UF 10% 2 6.3V X5R 01005 ROOM=SOC 1 R0403 1 10K C0433 0.01UF 1% 1/32W MF 2 01005 10% 6.3V 2 X5R 01005 ROOM=SOC 1 R0405 C0424 0.01UF 10% 2 6.3V X5R 01005 ROOM=SOC 8 10% 6.3V 2 X5R 01005 ROOM=SOC ROOM=SOC R0404 1 10K C0434 0.01UF 1% 1/32W MF 2 01005 10% 2 6.3V X5R 01005 ROOM=SOC ROOM=SOC 7 1% 1/32W MF 2 01005 NOTE: SOME VENDORS HAVE INTERNAL DIVIDER CIRCUITS ROOM=SOC 1 C0437 0.01UF 10% 6.3V 2 X5R 01005 ROOM=SOC 6 10% 6.3V 2 X5R 01005 1% 1/32W MF 2 01005 R0408 4.7K 1% 1/32W MF 2 01005 1 R0409 SYNC_MASTER=N56_MLB 4.7K SOC:VDDCA,VDD1/2,VDD,VDD_CPU,VDD_GPU DRAWING NUMBER ROOM=SOC 45_DDR1_VREF_DQ Apple Inc. 4 4 1 C0441 0.01UF 10% 6.3V 2 X5R 01005 ROOM=SOC R0410 4.7K NOTICE OF PROPRIETARY PROPERTY: 1% 1/32W MF 2 01005 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED ROOM=SOC 4 051-9903 REVISION R 1 ROOM=SOC 5 SYNC_DATE=08/29/2013 PAGE TITLE 1% 1/32W MF 2 01005 ROOM=SOC ROOM=SOC 1 C0440 0.01UF 4.7K 45_DDR0_VREF_DQ R0406 1 R0407 4 1 10K 1 ROOM=SOC 45_DDR1_VREF_CA 1 C0436 0.01UF 1% 1/32W MF 2 01005 45_DDR0_VREF_CA 4 1 1 10K 3 2 7.0.0 BRANCH PAGE 4 OF 55 SHEET 4 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 FIJI: VDDIOD,VDDIO18,VDD_VAR_SOC VDD_SRAM, VDD_SOC JUST A FEW GNDS D C B A A1 A2 A32 A33 AA11 AA15 AA20 AA24 AA26 AA27 AA28 AA31 AA5 AA7 AA9 AB12 AB14 AB17 AB19 AB21 AB27 AB28 AB6 AB7 AB8 AC11 AC13 AC15 AC20 AC22 AC24 AC26 AC28 AC32 AC5 AC6 AC9 AD10 AD12 AD17 AD23 AD27 AD28 AD5 AD7 AD8 AE13 AE18 AE20 AE24 AE26 AE27 AE28 AE29 AE6 AE7 AE9 AF10 AF12 AF14 AF16 AF19 AF21 AF28 AF32 AF5 AF6 AF8 AG11 AG13 AG15 AG20 AG22 AG24 AG26 AG28 AG5 AG7 AG9 AH12 AH14 AH17 AH19 AH21 AH23 AH25 AH27 AH28 AH6 AH8 AJ11 AJ13 U0201 POP-FIJI-1GB-DDR-B0 BGA SYM 11 OF 13 VSS VSS 8 C22 C23 C24 C25 C26 C27 C28 C3 C4 C5 C6 C9 D10 D12 D13 D18 D19 D20 D21 D22 D23 D24 D27 D4 D5 D6 D8 D9 E11 E15 E17 E19 E21 E23 E24 E25 E26 E27 E28 E6 E7 E9 F10 F12 F14 F16 F18 F20 F22 F24 F27 F29 F31 F6 F8 G11 G13 G15 G17 G19 G21 G23 G25 G27 G28 G6 G9 H10 H12 H14 H17 H18 H2 H20 H22 H24 H26 H27 H29 H5 H6 H7 H8 J11 J13 J16 J19 J21 J23 J25 J27 J28 AJ15 AJ18 AJ20 AJ22 AJ26 AJ28 AJ5 AK10 AK14 AK16 AK24 AK27 AK28 AK29 AK6 AK8 AL11 AL13 AL15 AL17 AL19 AL21 AL23 AL25 AL27 AL6 AL7 AL9 AM10 AM11 AM12 AM13 AM14 AM15 AM16 AM17 AM18 AM19 AM20 AM21 AM22 AM23 AM24 AM26 AM28 AM5 AM6 AM7 AM8 AM9 AN25 AN26 AN27 AN28 AN29 AN5 AN6 AP1 AP10 AP12 AP14 AP17 AP19 AP2 AP21 AP24 AP3 AP32 AP33 AP5 AP7 AR1 AR2 AR3 AR32 AR33 AR5 B1 B18 B2 B20 B32 B33 C10 C11 C15 C16 C17 C18 C19 C20 7 U0201 POP-FIJI-1GB-DDR-B0 BGA SYM 12 OF 13 VSS VSS J29 J30 J31 J32 J9 K10 K12 K14 K17 K18 K20 K22 K24 K26 K28 K29 K30 K31 K32 K6 K8 L1 L11 L13 L15 L17 L19 L2 L21 L23 L25 L27 L29 L30 L31 L32 L5 L7 L9 M10 M12 M14 M18 M2 M20 M22 M24 M26 M28 M29 M3 M30 M31 M32 M4 M5 M6 M8 N11 N13 N15 N17 N19 N2 N21 N23 N25 N27 N29 N3 N32 N7 N9 P10 P12 P14 P16 P18 P2 P20 P22 P24 P26 P28 P29 P3 P31 P4 P5 P6 P8 C21 6 U0201 POP-FIJI-1GB-DDR-B0 BGA SYM 8 OF 13 26 12 PP_VAR_SOC 1 C0508 10UF ROOM=SOC ROOM=SOC ROOM=SOC C0503 C0507 C0509 C0510 4.3UF 1UF 1UF 0.47UF 20% 4V CERM 0402 20% 6.3V 2 CERM-X5R 0402-9 ROOM=SOC 1 20% 4V CERM 0402 3 2 1 4 20% 4V CERM 0402 3 2 ROOM=SOC 4 1 20% 6.3V CERM 0402 3 2 1 4 3 2 4 VDDIOD, VDDIO18 CAPS FOR VDDIOD ARE SHARED WITH VDDQ 26 12 11 4 2 PP1V2 E16 E18 F15 F17 K7 L6 M7 N6 P7 VDDIO18_GRP1 J6 VDDIOD_DDRCA VDDIOD_DDRCA VDDIOD_DDRCA VDDIOD_DDRCA VDDIOD_DDRCA VDDIOD_DDRCA VDDIOD_DDRCA VDDIOD_DDRCA VDDIOD_DDRCA PP1V8 2 3 6 7 10 11 12 13 15 20 23 24 25 26 27 ROOM=SOC ROOM=SOC 1 U0201 POP-FIJI-1GB-DDR-B0 BGA SYM 9 OF 13 AK11 AK19 AK21 AK23 AK7 AK9 AL10 AL12 AL18 AL20 AL22 AL8 VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ K27 L28 M27 N28 P27 R28 T27 U28 V27 W28 VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ 1.8V 1.2V VDDIO18_GRP2 VDDIO18_GRP2 VDDIO18_GRP2 VDDIO18_GRP2 VDDIO18_GRP2 AB5 AE5 AH5 T6 W5 VDDIO18_GRP3 VDDIO18_GRP3 VDDIO18_GRP3 VDDIO18_GRP3 AA29 AC29 AF29 AJ29 1UF C0501 20% 4V CERM 0402 2.2UF 20% 2 6.3V X5R 0201-1 1 3 2 C0506 0.47UF 20% 6.3V CERM 0402 20% 6.3V 2 X5R 0201-1 1 3 2 VDDIO18_GRP7 T5 VDDIO18_PPN VDDIO18_PPN VDDIO18_PPN VDDIO18_PPN VDDIO18_PPN AK13 AK15 AK17 AL14 AL16 4 ROOM=SOC ROOM=SOC C0511 1 1.0UF VDDIO18_GRP4 F25 VDDIO18_GRP4 F28 VDDIO18_GRP4 H28 C0502 4 GRP7 POWERS GPIO11,12 (BUTTONS) PP1V8_ALWAYS 3 12 14 26 1 C0520 0.1UF 20% 4V 2 X5R 01005 12 45_BUCK2_FB G24 G26 H16 H19 H21 H23 H25 J15 J17 J18 J20 J22 J24 K16 K19 K21 K23 K25 L18 L20 L22 L24 M19 M21 M23 M25 N18 N20 N22 N24 P19 P21 P23 P25 R20 R22 R24 T21 T23 T25 U20 U22 U24 V21 V23 V25 W20 W22 W24 VDD_VAR_SOC 0.90V - 0.95V 1.8A @ 105C VSS VSS_SENSE V10 V12 V14 V16 V18 V2 V20 V22 V24 V26 V28 V29 V3 V30 V31 V32 V4 V5 V6 V8 W11 W13 W15 W19 W2 W23 W25 W27 W29 W3 W30 W31 W32 W33 W6 W7 W9 Y10 Y12 Y14 Y17 Y21 Y28 Y29 Y5 Y6 Y8 D C AA13 W26 VDD_VAR_SOC_SENSE B ROOM=SOC PP0501 P2MM-NSM SM PP CPU_VSS_SENSE ROOM=SOC SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 PAGE TITLE SOC:GND,VDDIO18,VDDIOD,VDD_VAR_SOC DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 5 4 3 2 7.0.0 BRANCH PAGE 5 OF 55 SHEET 5 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 FIJI: NAND + 12X17 NAND PKG SUPPORT FOR PPN1.5 (1.8V IO) ONLY D D PP3V0_NAND OMIT_TABLE 1 C0623 1 100PF 1 C0622 0.47UF 220PF 5% 2 16V NP0-C0G 01005 20% 4V 2 X7S 0204 10% 10V 2 X7R-CERM 01005 ROOM=NAND C0609 1 1UF 20% 4V 2 X6S 0204 ROOM=NAND ROOM=NAND C0602 1 C0604 1UF 20% 4V 2 X6S 0204 ROOM=NAND 1 OMIT_TABLE C0610 1 15UF 15UF 20% 6.3V 2 X5R 0402-1 ROOM=NAND C0611 OMIT_TABLE 1 20% 6.3V 2 X5R 0402-1 ROOM=NAND OMIT_TABLE C0613 1 15UF C0614 15UF 20% 2 6.3V X5R 0402-1 ROOM=NAND OMIT_TABLE 1 ROOM=NAND C0633 15UF 20% 6.3V 2 X5R 0402-1 20% 6.3V 2 X5R 0402-1 ROOM=NAND ROOM=NAND 500MA PP1V2_NAND_VDDI 1 1 100PF 5% 2 16V NP0-C0G 01005 ROOM=NAND C0624 220PF 10% 2 10V X7R-CERM 01005 ROOM=NAND 1 20% 2 6.3V X5R 0201-1 1.0UF ROOM=NAND ROOM=NAND 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27 6 5% 1/32W MF 2 01005 6 6 ROOM=SOC 6 ROOM=SOC AP_TO_NAND_ANC0_CEN0_L NC 6 6 6 6 6 6 6 6 6 6 6 R0601 1 240 6 6 2 AP_BI_NAND_ANC0_IO<0> AP_BI_NAND_ANC0_IO<1> AP_BI_NAND_ANC0_IO<2> AP_BI_NAND_ANC0_IO<3> AP_BI_NAND_ANC0_IO<4> AP_BI_NAND_ANC0_IO<5> AP_BI_NAND_ANC0_IO<6> AP_BI_NAND_ANC0_IO<7> AP_TO_NAND_ANC0_ALE AP_TO_NAND_ANC0_CLE AP_TO_NAND_ANC0_WE_L 45_AP_TO_NAND_ANC0_RE_L 45_AP_BI_NAND_ANC0_DQS 45_AP_PPN0_ZQ AN22 AP22 AN21 AN20 AN19 AN18 AP18 AN17 AP23 AN23 AR23 AP20 AR18 AR20 6 PPN1_CEN0 AN8 PPN1_CEN1 AN7 NC PPN0_CEN0 PPN0_CEN1 PPN0_IO0 PPN0_IO1 PPN0_IO2 PPN0_IO3 PPN0_IO4 PPN0_IO5 PPN0_IO6 PPN0_IO7 PPN1_IO0 PPN1_IO1 PPN1_IO2 PPN1_IO3 PPN1_IO4 PPN1_IO5 PPN1_IO6 PPN1_IO7 PPN0_ALE PPN0_CLE PPN0_WEN PPN0_REN PPN0_DQS PPN0_ZQ PPN1_ALE PPN1_CLE PPN1_WEN PPN1_REN PPN1_DQS PPN1_ZQ AP_TO_NAND_ANC1_CEN0_L 6 6 6 AN9 AN10 AN11 AP11 AN12 AN14 AN15 AP15 AP9 AP8 AR9 AN13 AP13 AR12 AP_TO_NAND_ANC1_ALE AP_TO_NAND_ANC1_CLE AP_TO_NAND_ANC1_WE_L 45_AP_TO_NAND_ANC1_RE_L 45_AP_BI_NAND_ANC1_DQS 45_AP_PPN1_ZQ PPN1_VREF AR10 AP_TO_NAND_ANC_DQVREF LGA IO0-1 IO1-1 IO2-1 IO3-1 IO4-1 IO5-1 IO6-1 IO7-1 6 6 6 R0602 1 240 2 ROOM=SOC PPN0_VREF U0604 6 ROOM=SOC AR21 IO0-0 IO1-0 IO2-0 IO3-0 IO4-0 IO5-0 IO6-0 IO7-0 6 1% 1/32W MF 01005 AP_TO_NAND_ANC_DQVREF G1 J1 L1 N3 N5 L7 J7 G7 AP_BI_NAND_ANC1_IO<0> AP_BI_NAND_ANC1_IO<1> AP_BI_NAND_ANC1_IO<2> AP_BI_NAND_ANC1_IO<3> AP_BI_NAND_ANC1_IO<4> AP_BI_NAND_ANC1_IO<5> AP_BI_NAND_ANC1_IO<6> AP_BI_NAND_ANC1_IO<7> 1% 1/32W MF 01005 6 AP_BI_NAND_ANC0_IO<0> AP_BI_NAND_ANC0_IO<1> AP_BI_NAND_ANC0_IO<2> AP_BI_NAND_ANC0_IO<3> AP_BI_NAND_ANC0_IO<4> AP_BI_NAND_ANC0_IO<5> AP_BI_NAND_ANC0_IO<6> AP_BI_NAND_ANC0_IO<7> PP0604SM P2MM-NSM ROOM=NAND PP PP0605SM 6 P2MM-NSM B ROOM=NAND NAND_TO_PP_TCKC NAND_TO_PP_TMSC OA0 TCKC OB0 TMSC ROOM=NAND C0606 15UF 20% 2 6.3V X5R 0402-1 1 1 C0612 10UF 1 C0616 10UF 10UF 20% 2 6.3V CERM-X5R 0402-9 20% 2 6.3V CERM-X5R 0402-9 ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27 C0617 1 C0620 1 C0621 20% 2 6.3V CERM-X5R 0402-9 1 20% 2 6.3V X5R 0201-1 CE0* CLE0 ALE0 WE0* A5 A3 C1 E3 RE0 B4 RE0* C7 DQS0 H4 DQS0* F4 AP_TO_NAND_ANC0_CEN0_L AP_TO_NAND_ANC0_CLE AP_TO_NAND_ANC0_ALE AP_TO_NAND_ANC0_WE_L 100PF 5% 2 16V NP0-C0G 01005 ROOM=NAND 220PF 10% 2 10V X7R-CERM 01005 ROOM=NAND VSS 1.0UF 6 NOTE:C0640,C0641 ADDED FOR UF NEEDS 6 C 6 45_AP_TO_NAND_ANC0_RE_L 6 45_AP_BI_NAND_ANC0_DQS 6 NC PP0600 NAND_TO_PP_RB C5 C3 D2 E1 AP_TO_NAND_ANC1_CEN0_L AP_TO_NAND_ANC1_CLE AP_TO_NAND_ANC1_ALE AP_TO_NAND_ANC1_WE_L RE1 D4 NC RE1* D6 45_AP_TO_NAND_ANC1_RE_L DQS1 M4 DQS1* K4 NC R/B1* E7 NC VREF G5 C0641 20% 2 6.3V X5R 0201-1 NC R/B0* E5 CE1* CLE1 ALE1 WE1* 1 6 45_AP_BI_NAND_ANC1_DQS 6 SM PP P2MM-NSM ROOM=NAND 6 6 6 6 PP1V8 6 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27 1 R0603 6 1 50K C0607 1% 1/32W MF 2 01005 ROOM=SOC 0.01UF 10% 2 6.3V X5R 01005 ROOM=SOC AP_TO_NAND_ANC_DQVREF 45_NAND_PPN_ZQ 1 VSSQ ROOM=NAND PP C0640 1.0UF ZQ A1 B2 F6 L3 6 AN16 AP16 G3 H2 J3 K2 L5 K6 J5 H6 NAND-1YNM-128GX8-TLC-PPN1.5-128G 6 100K BGA SYM 4 OF 13 5% 1/32W MF 2 01005 C R0608 U0201 POP-FIJI-1GB-DDR-B0 100K 15UF 20% 2 6.3V X5R 0402-1 1 VCCQ OMIT_TABLE ROOM=NAND 1 A7 M2 OC0 OD0 OE8 OF0 G8 1 R0607 C0605 VDDI PP1V8 1 1 ROOM=NAND VCC 23 20 15 13 12 11 10 7 6 5 3 2 27 26 25 24 20% 2 6.3V X5R 0201-1 1000MA 20% 2 6.3V X5R 0201-1 THE TOTAL INDUCTANCE SEEN BY THE NAND SHOULD BE <2NH PP1V8 2.2UF C0601 1 C0615 1.0UF PP1V8 C0603 N1 N7 OC8 OD8 OE0 OF8 G0 OA8 C0625 OB8 1 B6 F2 M6 26 C0634 15UF 20% 6.3V 2 X5R 0402-1 ROOM=NAND 12 26 OMIT_TABLE 1 R0609 243 2 C0608 1 R0604 0.01UF 50K 10% 6.3V 2 X5R 01005 1% 1/32W MF 01005 1% 1/32W MF 2 01005 ROOM=SOC ROOM=SOC B NOTE: NAND PADS SHOULD BE SHIELDED FROM TRACES WITH A GROUND PLANE PP0601 P4MM ROOM=SOC SM PP 1 NOTE: IO<6> PREFERRED BY MATT BYOM (N51) (IS A STATUS READY BIT) AP_BI_NAND_ANC0_IO<6> 6 PP0602 P4MM ROOM=SOC SM PP 1 45_AP_TO_NAND_ANC0_RE_L 6 45_AP_BI_NAND_ANC0_DQS 6 PP0603 P4MM ROOM=SOC SM PP 1 A SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 PAGE TITLE SOC:NAND DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 6 OF 55 SHEET 6 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 FIJI: HIGH SPEED DIG (CAM,LCD,LPDP,PCIE) D R0712 1 2 0.00 26 PP0V95_FIXED_SOC_PCIE 01005 20% 6.3V 2 X5R 0201-1 NOTE: NEED TO EVALUATE PI FOR PP1V0. CONCERN OVER SHARING IT WITH MIPI AND PCIE REFCLK WITHOUT A FILTER. ROOM=SOC NOTE: PLACE NEAR THE PCIE PINS, NOT LPDP. PP1V8 PP1V0 20 15 13 12 11 10 7 6 5 3 2 27 26 25 24 23 7 12 26 26 12 7 PP1V0 20% 4V 2 X5R 01005 ROOM=SOC ROOM=SOC VDD10_MIPID E8 VDD10_MIPID F9 C0701 0.1UF 20% 4V X5R 2 01005 VDD10_MIPIC E20 VDD10_MIPIC F19 VDD10_MIPIC F21 1 0.1UF VDD18_MIPIC0 E22 VDD18_MIPIC1 F23 C0714 1 VDD18_MIPID E10 VDD18_MIPID F11 1 C0702 1 1 0.1UF C0715 1.0UF 20% 4V 2 X5R 01005 ROOM=SOC ROOM=SOC PP1V8 ROOM=SOC ROOM=SOC 23 23 23 23 23 23 A22 B22 90_RCAM_TO_AP_MIPI_DATA1_P 90_RCAM_TO_AP_MIPI_DATA1_N A24 B24 90_RCAM_TO_AP_MIPI_DATA2_P 90_RCAM_TO_AP_MIPI_DATA2_N A25 B25 90_RCAM_TO_AP_MIPI_DATA3_P 90_RCAM_TO_AP_MIPI_DATA3_N A23 B23 90_RCAM_TO_AP_MIPI_CLK_P 90_RCAM_TO_AP_MIPI_CLK_N 45_CAM0_REXT A29 20 20 20 20 20 20 A3 B3 90_AP_TO_LCM_MIPI_DATA0_P 90_AP_TO_LCM_MIPI_DATA0_N MIPI0C_DPDATA1 MIPI0C_DNDATA1 VDDIO18_GRP4 23 MIPI0C_DPDATA2 MIPI0C_DNDATA2 MIPI0C_DPDATA3 MIPI0C_DNDATA3 MIPI0C_REXT MIPI0D_DPDATA0 MIPI0D_DNDATA0 90_AP_TO_LCM_MIPI_DATA1_P 90_AP_TO_LCM_MIPI_DATA1_N A4 B4 MIPI0D_DPDATA1 MIPI0D_DNDATA1 90_AP_TO_LCM_MIPI_DATA2_P 90_AP_TO_LCM_MIPI_DATA2_N A6 B6 MIPI0D_DPDATA2 MIPI0D_DNDATA2 20 20 90_AP_TO_LCM_MIPI_CLK_P 90_AP_TO_LCM_MIPI_CLK_N A5 B5 MIPI0D_DPCLK MIPI0D_DNCLK A7 MIPI0D_REXT 5% 1/32W MF 2 01005 SENSOR0_CLK D29 SENSOR0_RST C30 NC AP30 NC 5% 1/32W MF 2 01005 AP_TO_FCAM_I2C_SCL AP_BI_FCAM_I2C_SDA 45_AP_TO_RCAM_CLK_R AP_TO_RCAM_SHUTDOWN SHUTDOWN IS ALSO RESET FCAM R07071 61.9 2 16 23 16 23 11 11 ROOM=SOC 45_AP_TO_RCAM_CLK 0.1UF NOSTUFF 1 11 29 AP_TO_STOCKHOLM_DWLD_REQ SENSOR1_ISTRB C31 NC SENSOR1_XSHUTDOWN A31 90_WLAN_TO_AP_PCIE1_RXDP_P C0709 1 X5R 01005 56PF 29 90_WLAN_TO_AP_PCIE1_RXDP_N 1 X5R 01005 1 61.9 2 45_AP_TO_FCAM_CLK CAM_EXT_LDO_EN 23 1/32W 1% MF ROOM=SOC 90_FCAM_TO_AP_MIPI_DATA0_P 90_FCAM_TO_AP_MIPI_DATA0_N MIPI1C_DPDATA1 A28 MIPI1C_DNDATA1 B28 90_FCAM_TO_AP_MIPI_DATA1_P 90_FCAM_TO_AP_MIPI_DATA1_N MIPI1C_DPCLK A27 MIPI1C_DNCLK B27 90_FCAM_TO_AP_MIPI_CLK_P 90_FCAM_TO_AP_MIPI_CLK_N 11 11 0.1UF 29 90_AP_TO_WLAN_PCIE1_TXDP_P 5% 16V 2 NP0-C0G 01005 1 X5R 01005 2 20% 4V C0704 ROOM=SOC AR27 LPDP_TX1P LPDP_TX1N NC AP28 NC AR28 LPDP_TX2P LPDP_TX2N NC AP29 NC AR29 LPDP_TX3P LPDP_TX3N AL28 NC AK26 LPDP_CAL_DRV_OUT LPDP_CAL_VSS_EXT NC A11 NC PCIE_RX0_P PCIE_RX0_M B12 NC A12 PCIE_TX0_P PCIE_TX0_M 29 90_AP_TO_WLAN_PCIE1_TXDP_N 11 1 X5R 01005 2 20% 4V AB2 PCIE_CLKREQ0_N 90_WLAN_TO_AP_PCIE1_RXDP_C_P 90_WLAN_TO_AP_PCIE1_RXDP_C_N A10 B10 PCIE_RX1_P PCIE_RX1_M 90_AP_TO_WLAN_PCIE1_TXDP_C_P 90_AP_TO_WLAN_PCIE1_TXDP_C_N A9 B9 PCIE_TX1_P PCIE_TX1_M NC 90_AP_TO_WLAN_PCIE1_REFCLK1_C_P 90_AP_TO_WLAN_PCIE1_REFCLK1_C_N ROOM=SOC 11 11 ROOM=SOC 11 0.1UF 29 1 X5R 01005 90_AP_TO_WLAN_PCIE1_REFCLK1_P 4.02K 1% 1/32W MF 2 01005 2 20% 4V C0721 0.1UF ROOM=SOC 29 90_AP_TO_WLAN_PCIE1_REFCLK1_N 1 X5R 01005 A14 B14 PCIE_REF_CLK1_P PCIE_REF_CLK1_M AB3 PCIE_CLKREQ1_N 45_PCIE_RESREF A8 C0720 R0703 C0711 0.1UF 20% 4V 2 X5R 01005 ROOM=SOC 1.0V 24MA PP1V8 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27 0.95V 1.0V 1.8V POP-FIJI-1GB-DDR-B0 BGA SYM 6 OF 13 U0201 ULPI_DATA0 ULPI_DATA1 ULPI_DATA2 ULPI_DATA3 ULPI_DATA4 ULPI_DATA5 ULPI_DATA6 ULPI_DATA7 H4 H3 ULPI_CLK ULPI_DIR ULPI_NXT ULPI_STP G5 E3 F1 E4 G3 G4 F2 G2 F3 F4 AP_TO_OSCAR_SWDCLK_1V8 AP_BI_OSCAR_SWDIO_1V8 22 22 NC AP_TO_LEDDRV_EN 16 C NC NC NC TOUCH_TO_AP_INT_L 24 OSCAR_TO_PMU_HOST_WAKE 13 22 LCM_TO_AP_HIFA_BSYNC 20 24 AP_TO_TOUCH_RESET_L 24 AP_TO_LCM_RESET_L 20 EDP_HPD G29 AP_TO_STOCKHOLM_EN 29 A13 PCIE_REF_CLK0_P NC B13 PCIE_REF_CLK0_M NC 0.1UF 1 45_LCM_REXT NC AP27 NC NC C0703 C0710 56PF MIPI1C_DPDATA0 A26 MIPI1C_DNDATA0 B26 LPDP_TX0P LPDP_TX0N ROOM=SOC NOSTUFF MIPI1C_REXT B29 45_CAM1_REXT 2 20% 4V 11 01005 AR26 B11 ROOM=SOC LPDP_AUX_P LPDP_AUX_N NC AP26 NC NC 0.1UF R0709 29 2 20% 4V C0706 5% 16V 2 NP0-C0G 01005 ROOM=SOC SENSOR0_ISTRB C29 NC SENSOR0_XSHUTDOWN D28 C0705 23 01005 1/32W 1% MF ROOM=SOC 23 45_AP_TO_FCAM_CLK_R AP_TO_FCAM_SHUTDOWN AR30 1.00K ISP1_SCL D32 ISP1_SDA D31 1 NC C8 MIPI0D_DPDATA3 C7 MIPI0D_DNDATA3 NC B 1.00K 5% 1/32W MF 2 01005 AP_TO_RCAM_I2C_SCL AP_BI_RCAM_I2C_SDA SENSOR1_CLK B31 SENSOR1_RST D30 MIPI0C_DPCLK MIPI0C_DNCLK 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27 ROOM=SOC 1 ISP0_SCL E29 ISP0_SDA E30 SYM 5 OF 13 VDDIO18_GRP4 23 MIPI0C_DPDATA0 MIPI0C_DNDATA0 1 1.00K 5% 1/32W MF 2 01005 BGA A21 B21 90_RCAM_TO_AP_MIPI_DATA0_P 90_RCAM_TO_AP_MIPI_DATA0_N ROOM=SOC 1 1.00K POP-FIJI-1GB-DDR-B0 23 ROOM=SOC R0704 R0705 R0706 R0708 1.0V U0201 23 20% 4V 2 X5R 01005 ROOM=SOC 1 1.8V C0708 1 0.1UF 20% 6.3V 2 X5R 0201-1 0.1UF 20% 4V X5R 2 01005 C0713 1 VDD18_VPH_PCIE F13 2.2UF VDD095_VP_PCIE E12 C0712 VDDA10_REFCLK_PCIE D14 1 VDD095_VPTX0_PCIE E13 VDD095_VPTX1_PCIE D11 ROOM=SOC PWRTERM2GND AL24 AL26 PWRTERM2GND AM25 PWRTERM2GND AM27 PWRTERM2GND PP0V95_FIXED_SOC VDDA10_LPDP0 VDDA10_LPDP1 VDDA10_LPDP2 VDDA10_LPDP3 26 12 4 C D NOTE: IS A FERRITE NEEDED? THERE ARE DCR CONCERNS. PCIE_RESREF PCIE_REF_PAD_CLK_P PCIE_REF_PAD_CLK_M GPIO39/PCIE_PERST0_N GPIO43/PCIE_PERST1_N RF TEAM: CONFIRMED PD NEEDED R0719 C13 NC C12 NC AK5 NC AL4 AP_TO_WLAN_PCIE1_RST_L B 29 1 R0719 1 R0710 100K 200 5% 1/32W MF 2 01005 1% 1/32W MF 2 01005 ROOM=SOC 2 20% 4V ROOM=SOC R07011 4.02K 1% 1/32W MF 01005 2 ROOM=SOC 1 R0702 23 20 15 13 12 11 10 7 6 5 3 2 27 26 25 24 4.02K PP1V8 1% 1/32W MF 2 01005 1 R0711 1.00K ROOM=SOC 5% 1/32W MF 01005 2 ROOM=SOC 29 WLAN_TO_AP_PCIE1_CLKREQ_L A SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 PAGE TITLE SOC:CAM,LCD,LPDP,PCIE DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 7 OF 55 SHEET 7 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 BUTTON FLEX 5 4 3 2 1 (BUTTONS, ANC REF MIC, STROBE, STROBE_NTC, WIFI FLEX PAC) RIGHT BUTTON B2B MLB: 516S1312 ROOM=BUTTON J0801 D D BB35S-RB12-3A F-ST-SM 14 FL0813 120-OHM-210MA 26 10 PP_CODEC_TO_REARMIC2_BIAS 2 8 1 CODEC_TO_REARMIC2_BIAS_CONN 8 8 8 01005 ROOM=BUTTON 1 MIC2 (ANC REF MIC): MIC2/4 BIAS, MIC2_P,_N C0827 8 100PF 8 13 BUTTON_TO_AP_HOLD_KEY_CONN_L 2 4 REARMIC2_TO_CODEC_P_CONN 6 REARMIC2_TO_CODEC_N_CONN 8 CODEC_TO_REARMIC2_BIAS_CONN 10 RCAM_TO_STROBE_NTC_CONN 5% 16V 2 NP0-C0G 01005 NC ROOM=BUTTON 1 PP_STRB_DRIVER_TO_LED_WARM 8 16 26 PP_STRB_DRIVER_TO_LED_COOL 8 16 26 3 5 7 9 12 11 16 15 XW0801 SM STROBE_GND_RET 1 2 ROOM=STROBE FL0801 120-OHM-210MA 9 2 REARMIC2_TO_CODEC_P 1 REARMIC2_TO_CODEC_P_CONN 8 01005 ROOM=BUTTON 1 C0801 LEFT BUTTON B2B 56PF 5% 16V 2 NP0-C0G 01005 MLB: 516S1315 ROOM=BUTTON ROOM=BUTTON J0802 FL0802 BB35S-RB6-3A 120-OHM-210MA 9 2 REARMIC2_TO_CODEC_N F-ST-SM 1 REARMIC2_TO_CODEC_N_CONN 8 7 8 BUTTON_TO_AP_VOL_UP_CONN_L 8 01005 ROOM=BUTTON C 1 2 1 4 3 6 5 10 9 C0802 56PF 5% 16V 2 NP0-C0G 01005 8 BUTTON_TO_AP_VOL_DOWN_CONN_L ROOM=BUTTON C BUTTON_TO_AP_RINGER_A_CONN 8 FL0809 120-OHM-210MA 13 3 1 BUTTON_TO_AP_HOLD_KEY_L 2 BUTTON_TO_AP_HOLD_KEY_CONN_L 01005 1 ROOM=BUTTON 0201 C0810 1 5.5V-6.2PF DZ0810 ROOM=BUTTON 27PF 5% 6.3V NP0-C0G 2 0201 2 PP_STRB_DRIVER_TO_LED_WARM ROOM=BUTTON STROBE: LED WARM 16 8 26 C0822 27PF 5% 16V 2 NP0-C0G 01005 5% 16V NP0-C0G 2 01005 FL0810 C0824 1 1 100PF ROOM=BUTTON ROOM=BUTTON 120-OHM-210MA 13 3 1 BUTTON_TO_AP_RINGER_A 2 BUTTON_TO_AP_RINGER_A_CONN 8 01005 26 16 8 1 ROOM=BUTTON 0201 B C0819 1 DZ0811 ROOM=BUTTON 2 27PF C0826 1 STROBE: LED COOL 5.5V-6.2PF PP_STRB_DRIVER_TO_LED_COOL 27PF 5% 16V NP0-C0G 2 01005 5% 16V 2 NP0-C0G 01005 ROOM=BUTTON 5% 6.3V NP0-C0G 2 0201 NORTH_AC_GND_SCREW FL0811 FL0817 120-OHM-210MA 13 3 BUTTON_TO_AP_VOL_DOWN_L C0820 1 2 BUTTON_TO_AP_VOL_DOWN_CONN_L 01005 1 100PF 1 ROOM=BUTTON 120-OHM-210MA 8 16 DZ0812 STROBE: NTC 12V-33PF 01005-1 5% 10V NP0-C0G 2 01005 B ROOM=BUTTON 8 25 29 ROOM=BUTTON BUTTONS: RINGER, HOLD, VOL_UP/DOWN, C0825 1 100PF 2 ROOM=BUTTON NORTH_AC_GND_SCREW 1 RCAM_TO_STROBE_NTC 2 R0803 1 51.1K C0828 56PF 5% 16V 2 NP0-C0G 01005 ROOM=BUTTON FL0812 8 ROOM=BUTTON 1% 1/32W MF 01005 2 8 25 29 ROOM=BUTTON RCAM_TO_STROBE_NTC_CONN 01005 1 ROOM=BUTTON 120-OHM-210MA 13 3 BUTTON_TO_AP_VOL_UP_L 1 2 01005 C0821 1 ROOM=BUTTON BUTTON_TO_AP_VOL_UP_CONN_L 1 8 DZ0813 12V-33PF 100PF 01005-1 5% 10V NP0-C0G 2 01005 2 ROOM=BUTTON NORTH_AC_GND_SCREW 8 25 29 ROOM=BUTTON A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 PAGE TITLE IO:BUTTON FLEX CONN DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 8 OF 55 SHEET 8 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 L67 AUDIO CODEC AUDIO I/O D D (ANALOG MIC IN, DIG MIC IN, HPOUT, LINEOUT, RECEIVER OUT, MIKEYBUS) C0922 0.1UF 1 20% 4V 18 9 LOWERMIC1_TO_CODEC_P 18 9 LOWERMIC1_TO_CODEC_N ROOM=CODEC VOICE MIC C0923 NOSTUFF 1 C0927 56PF 0.1UF NOSTUFF 1 1 C0930 20% 4V 56PF 5% 16V 2 NP0-C0G 01005 2 X5R 01005 5% 16V 2 NP0-C0G 01005 ROOM=CODEC 2 X5R 01005 ROOM=CODEC ROOM=CODEC ROOM=CODEC R0915 ROOM=CODEC 1.33K2 1 CODEC_TO_HPHONE_HS4 C 0.1UF 1 NO_XNET_CONNECTION=TRUE ROOM=CODEC 20% 4V C0904 1 HEADPHONE MIC EXTMIC_TO_CODEC_P WLCSP 2 LOWERMIC1_TO_AIN1_P LOWERMIC1_TO_AIN1_N X5R 01005 ROOM=CODEC 220PF 10% 10V X7R-CERM 2 EXTMIC_TO_CODEC_N 1 20% 4V ROOM=CODEC R0950 1.33K2 EXTMIC_TO_AIN2_P EXTMIC_TO_AIN2_N C0921 0.1UF NO_XNET_CONNECTION=TRUE 18 9 U0900 C0920 1% 1/32W MF 01005 X5R 01005 1% 1/32W MF 01005 1 CODEC_TO_HAC_P CODEC_TO_HAC_N AIN3- AIN4+ ANC REF MIC2 AIN4- NOSTUFF 56PF NOSTUFF 1 C0943 56PF 5% 2 16V NP0-C0G 01005 2 D1 AIN6+ ANC D2 AIN6- ERROR MIC X5R 01005 D3 AIN7+ ANALOG LINEIN NC D4 NC C0941 REARMIC2_TO_CODEC_N C0942 E1 AIN5+ ANC E2 AIN5- REF MIC1 ROOM=CODEC REARMIC2_TO_CODEC_P 1 AOUT2+ L5 AOUT2- K5 NC E4 E3 NC FRONTMIC3_TO_AIN6_P FRONTMIC3_TO_AIN6_N 0.1UF 9 8 F4 AIN2+ HEADPHONE F3 AIN2- MIC NC F1 NC REARMIC2_TO_AIN5_P REARMIC2_TO_AIN5_N C0940 20% 4V ANC REF MIC CODEC_TO_RCVR_P 11 CODEC_TO_RCVR_N 11 ROOM=CODEC 01005 NO_XNET_CONNECTION=TRUE 9 8 AOUT1+ K7 AOUT1- L7 F2 AIN3+ ANALOG MIC IN 2 1 CODEC_TO_HPHONE_HS3 SYM 1 OF 3 G2 AIN1+ PRIMARY G1 AIN1- (VOICE) MIC 5% 2 16V NP0-C0G 01005 ROOM=CODEC NC NC 0.1UF 1 20% 4V 2 LOWERMIC1_TO_DIN1_SD LOWERMIC1_TO_DIN1_SCLK X5R 01005 ROOM=CODEC MIC2MIC3_TO_DIN2_SD MIC2MIC3_TO_DIN2_SCLK ROOM=CODEC AIN7- C1 AIN8+ ANALOG LINEIN C2 AIN8A6 DMIC1_SD B6 DMIC1_SCLK CS42L67-CWZR-A1 18 9 LINEOUT_REF K8 LINEOUTA LINEOUTB J8 H8 C 11 11 NC NC HPOUTA J9 HPOUTB K9 HS3 K1 HS4 L2 HS3_REF L9 HS4_REF L8 HPDETECT G8 CODEC_TO_HPHONE_L CODEC_TO_HPHONE_R NOSTUFF CODEC_TO_HPHONE_HS3 CODEC_TO_HPHONE_HS4 9 18 9 18 CODEC_TO_HPHONE_HS3_REF 18 CODEC_TO_HPHONE_HS4_REF 18 HPHONE_TO_CODEC_DET C0950 56PF 20% 4V 11 9 ANC ERROR MIC 11 9 C0952 100PF 1 C0946 56PF NOSTUFF 1 C0947 56PF 5% 2 16V NP0-C0G 01005 1 2 X5R 01005 90_CODEC_BI_TRISTAR_MIKEYBUS_L67_N 90_CODEC_BI_TRISTAR_MIKEYBUS_L67_P 5% 2 16V NP0-C0G 1 20% 4V 20.0 2 MF 01005 ROOM=CODEC X5R 01005 B ROOM=CODEC 1 C0953 100PF 5% NOSTUFF 10V 2 NP0-C0G 01005 90_CODEC_BI_TRISTAR_MIKEYBUS_N 17 90_CODEC_BI_TRISTAR_MIKEYBUS_P 17 NO_XNET_CONNECTION=TRUE C0954 100PF 1 2 ROOM=CODEC 5% 10V NP0-C0G 01005 ROOM=CODEC ROOM=CODEC R0903 5% 1/32W 2 MF 01005 ROOM=CODEC 1 CODEC_MBUS_REF 18 20.0 2 5% 1/32W 2 5% 10V NP0-C0G 01005 R0902 0.1UF NOSTUFF 1 ROOM=CODEC ROOM=CODEC A3 DMIC2_SD A2 DMIC2_SCLK C0945 FRONTMIC3_TO_CODEC_N 56PF 5% 16V NP0-C0G 2 01005 MBUS_REF F11 ROOM=CODEC FRONTMIC3_TO_CODEC_P 1 DN G10 DP F10 0.1UF 1 C0951 18 C0944 B 18 NOSTUFF 1 5% 16V NP0-C0G 2 01005 ROOM=CODEC 18 01005 ROOM=CODEC ROOM=SOC 18 9 LOWERMIC1_TO_CODEC_P NO_XNET_CONNECTION=TRUE R09412 1 0.00 NOSTUFF 01005 R0942 ROOM=SOC 18 9 LOWERMIC1_TO_CODEC_N NO_XNET_CONNECTION=TRUE 1 0.00 2 NOSTUFF 01005 ROOM=SOC 9 8 A 11 9 REARMIC2_TO_CODEC_P NO_XNET_CONNECTION=TRUE R09432 1 0.00 FRONTMIC3_TO_CODEC_P NO_XNET_CONNECTION=TRUE NOSTUFF 01005 SYNC_MASTER=N61_MLB R0944 ROOM=SOC SYNC_DATE=08/26/2013 PAGE TITLE 2 NOSTUFF 01005 1 0.00 AUDIO:L67 CODEC (1/2) ROOM=SOC 9 8 REARMIC2_TO_CODEC_N NO_XNET_CONNECTION=TRUE R09452 1 0.00 DRAWING NUMBER NOSTUFF Apple Inc. 01005 R0946 ROOM=SOC 11 9 FRONTMIC3_TO_CODEC_N NO_XNET_CONNECTION=TRUE R 2 NOSTUFF 01005 1 0.00 NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 051-9903 REVISION 5 4 3 2 7.0.0 BRANCH PAGE 9 OF 55 SHEET 9 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 L67 AUDIO CODEC D D POWER, MICBIAS DIGITAL SYSTEM I/O NOTE: C1022 WAS REDUCED TO 2.2UF BECAUSE OF ADDITIONAL NEARBY VCC MAIN CAPS ROOM=CODEC PP_VCC_MAIN 3 ROOM=CODEC 1 C1074 1 2.2UF 1 C1022 2.2UF ROOM=CODEC ROOM=CODEC PP1V8 3 3 3 ROOM=CODEC PCB: C1021 AT U0921.L6 23 20 15 13 12 11 7 6 5 3 2 27 26 25 24 3 C1013 3 0.1UF 3 20% 4V 2 X5R 01005 3 3 ROOM=CODEC 16 3 C1014 10UF 20% 2 6.3V CERM-X5R 0402-9 1 C1016 16 3 0.1UF 16 3 20% 2 4V X5R 01005 ROOM=CODEC 16 3 VP L6 A11 B10 ROOM=CODEC U0900 WLCSP VPROG_CP H11 CODEC_AGND 10 VL B9 20% 6.3V 2 X5R 0201-1 VD C1012 VCP G11 3 2.2UF 3 ROOM=CODEC CS42L67-CWZR-A1 KEEP THESE CAPS AT CODEC PINS ROOM=CODEC 4.7UF 1.0UF 20% 6.3V X5R 2 0201-1 R1000 2.21K 1% 1/32W MF 2 01005 MIC1_BIAS C1021 C1020 1 1 J5 PP_CODEC_TO_MIC1_BIAS 18 2 MIC1_BIASFILT_RET 1 MIC1_BIAS_FILT J6 MIC1_BIAS_FILT ROOM=CODEC CODEC_AGND 20% 6.3V X5R-CERM1 402 10 26 PP_EXTMIC_BIAS_IN L4 MIC2_BIAS_IN MIC2_BIAS ROOM=CODEC 26 PP_EXTMIC_BIAS L3 26 PP_EXTMIC_BIAS_FILT_IN K4 26 PP_EXTMIC_BIAS_FILT K3 MIC2_BIAS_FILT 1.0UF 20% 2 6.3V X5R 0201-1 1 C1038 4.7UF B 20% 6.3V 2 X5R-CERM1 402 ROOM=CODEC MIC2_BIAS_FILT_IN FLYP J11 C1015 1 1.0UF PP_CODEC_TO_REARMIC2_BIAS REARMIC2_TO_CODEC_RET_FILT 26 8 ROOM=CODEC 1 H6 MIC4_BIAS H5 MIC4_BIAS_FILT C1000 1.0UF ROOM=CODEC C1018 1 20% 2 6.3V X5R 0201-1 1 ROOM=CODEC 2 4.7UF XW1002 SHORT-10L-0.1MM-SM 1 2 FRONTMIC3_BIAS_FILT_GND 20% 6.3V X5R-CERM1 402 26 FLYN PP_CODEC_VHP_FLYP E9 E8 D10 D11 VSP_SCLK VSP_LRCK/FSYNC VSP_SDIN VSP_SDOUT 45_AP_TO_CODEC_XSP_I2S2_BCLK AP_TO_CODEC_XSP_I2S2_LRCLK AP_TO_CODEC_XSP_I2S2_DOUT CODEC_TO_AP_XSP_I2S2_DIN B8 B7 C7 A7 XSP_SCLK XSP_LRCK/FSYNC XSP_SDIN/DAC2B_MUTE XSP_SDOUT AP_TO_CODEC_SPI_CS_L AP_TO_CODEC_SPI_CLK AP_TO_CODEC_SPI_MOSI CODEC_TO_AP_SPI_MISO B5 B4 B3 A4 CS* CCLK CDIN CDOUT 3 ROOM=CODEC GND 26 PP_CODEC_VHP_FLYC +VCP_FILT K11 C1032 5% 1/32W MF 2 01005 26 GNDCP0 K10 GNDCP1 L11 2.2UF SPEAKER_VQ J7 C1025 4.7UF XW1048 SM 1 PGND_CODEC_GNDCP 2 20% 6.3V 2 X5R-CERM1 402 ROOM=CODEC 26 26 INT* CODEC_TO_PMU_MIKEY_INT_L G5 WAKE* CODEC_RESET_L G3 RESET* D8 D9 B2 TSTI C3 C4 C11 TSTO C1029 4.7UF PP_CODEC_VCPFILT- PP_CODEC_SPKR_VQ G4 NC E11 NC A5 NC C6 NC C8 NC D6 NC ROOM=CODEC 1 PP_CODEC_VCPFILT+ CODEC_TO_AP_INT_L E10 KEEP THESE CAPS AT CODEC PINS 20% 2 6.3V X5R 0201-1 1 -VCP_FILT L10 13 ROOM=CODEC C1033 3 1.00K 2.2UF 1 C L67 WEAK INT PD = 550K - 2450K R1045 20% 6.3V 2 X5R 0201-1 J10 PP_CODEC_VHP_FLYN H9 TSTO MUST BE NC 20% 6.3V 2 X5R-CERM1 402 ROOM=CODEC C1034 ROOM=CODEC 4.7UF 20% 6.3V 2 X5R-CERM1 402 C1024 GNDA J2 C1019 4.7UF 20% 6.3V X5R-CERM1 2 402 ROOM=BUTTON_B2B FLYC G9 H10 26 H1 PP_CODEC_FILT+ 26 FILT+ FILT- H2 1 PP_CODEC_TO_FRONTMIC3_BIAS H7 MIC3_BIAS FRONTMIC3_TO_CODEC_RET_FILT G6 MIC3_BIAS_FILT PP1V8_SDRAM 1 ROOM=CODEC 1 1 26 11 ROOM=CODEC 20% 6.3V X5R 2 0201-1 45_AP_TO_CODEC_VSP_I2S4_BCLK AP_TO_CODEC_VSP_I2S4_LRCLK AP_TO_CODEC_VSP_I2S4_DOUT CODEC_TO_AP_VSP_I2S4_DIN A1 C5 B1 F9 D5 D7 E5 E6 E7 F5 F6 F7 F8 G7 H3 H4 J3 J4 WEAK INT PD KEEP THESE CAPS AT CODEC PINS GNDP K6 L1 GNDHS0 K2 GNDHS1 C1037 A10 GNDD 1 3 29 26 17 15 14 13 12 10 4 3 SYM 2 OF 3 ROOM=CODEC ASP_SCLK ASP_LRCK ASP_SDIN ASP_SDOUT ALL XSP PINS:WEAK INT PD PP1V8_VA_L19_L67 1 26 18 C10 B11 C9 A8 ROOM=CODEC VA J1 C 45_AP_TO_CODEC_ASP_I2S0_BCLK AP_TO_CODEC_ASP_I2S0_LRCLK AP_TO_CODEC_ASP_I2S0_DOUT CODEC_TO_AP_ASP_I2S0_DIN ALL VSP PINS:WEAK INT PD PP1V8_SDRAM 1 26 16 12 WLCSP SYM 3 OF 3 ALL ASP PINS:WEAK INT PD 1 29 26 17 15 14 13 12 10 4 3 U0900 MCLK WEAK INT PD 20% 2 6.3V X5R 0201-1 20% 6.3V 2 X5R-CERM 01005 20% 6.3V 2 X5R 0201-1 C1075 1 0.1UF 2.2UF 20% 6.3V 2 X5R 0201-1 C1031 A9 45_AP_TO_CODEC_I2S0_MCLK CS42L67-CWZR-A1 48 39 31 26 23 17 16 15 14 12 52 51 KEEP THIS CAP AT CODEC PINS 10UF 20% 6.3V CERM-X5R 2 0402-9 KEEP THIS CAP AT CODEC PINS B ROOM=CODEC CODEC_AGND 10 2 ROOM=CODEC XW1003 SHORT-10L-0.1MM-SM 1 ROOM=BUTTON_B2B XW1004 SHORT-10L-0.1MM-SM 2 REARMIC2_BIAS_FILT_GND1 PCB NOTE: PLACE NEAR J1111 GND PIN A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 PAGE TITLE AUDIO:L67 CODEC (2/2) DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 10 OF 55 SHEET 10 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 THIS ON ONE MLB ---> 516S1081 RECEPTACLE SENSOR HOTBAR ---> 998-6868 FRONT CAM FLEX B2B J1111 AA22L F-ST-SM 41 ROOM=CG_B2B 11 11 26 11 26 11 D FL1123 1 PP1V8 15 13 12 10 7 6 5 3 2 27 26 25 24 23 20 2 PP1V8_FCAM_CONN 0201 1 ROOM=CG_B2B 26 12 11 PP3V0_PROX_IRLED 11 26 5% 16V NP0-C0G 01005 2 ROOM=CG_B2B 1 100PF 2 C1144 1 0.1UF 5% 16V NP0-C0G 01005 100PF 20% 2 4V X5R 01005 11 C1103 1 C1107 1 C1104 0.1UF 1 2.2UF 20% 4V 2 X5R 01005 ROOM=CG_B2B C1101 1 2.2UF 20% 2 6.3V X5R 0201-1 20% 2 6.3V X5R 0201-1 ROOM=CG_B2B ROOM=CG_B2B C1114 C1106 11 4.3UF 11 20% 2 4V X5R-CERM 0610-1 ROOM=CG_B2B 11 ROOM=CG_B2B ROOM=CG_B2B 26 11 11 FL1166 FERR-22-OHM-1A-0.055OHM 26 12 5 4 2 1 PP1V2 11 2 PP1V2_FCAM_VDDIO_CONN 11 0201 ROOM=CG_B2B 1 C1166 1 20% 4V 2 X5R 01005 FL1104 26 2 11 120-OHM-25%-250MA-0.5DCR C1167 26 12 100PF 0.1UF 2 PP3V0_PROX_ALS 11 5 MA PP3V0_PROX_CONN 1 01005 5% 16V NP0-C0G 01005 2 PP2V85_FCAM_AVDD_CONN C1143 1 2.2UF 1 20% 2 6.3V X5R-CERM 01005 ROOM=CG_B2B 120-OHM-25%-250MA-0.5DCR 11 26 1 C1105 2 ROOM=CG_B2B 2 01005 100PF 0.1UF 20% 6.3V 2 X5R 0201-1 C 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 CODEC_TO_HAC_CONN_P CODEC_TO_HAC_CONN_N PP1V2_FCAM_VDDIO_CONN 31 32 33 34 35 36 39 40 90_FCAM_TO_AP_MIPI_DATA0_CONN_N 90_FCAM_TO_AP_MIPI_DATA0_CONN_P 90_FCAM_TO_AP_MIPI_CLK_CONN_P 90_FCAM_TO_AP_MIPI_CLK_CONN_N 90_FCAM_TO_AP_MIPI_DATA1_CONN_P 90_FCAM_TO_AP_MIPI_DATA1_CONN_N 11 11 11 26 D 11 11 11 11 11 11 45_PROX_TO_CUMULUS_RX_CONN 11 24 PP3V0_ALS_CONN 11 26 AP_TO_I2C2_SCL_ALS_CONN 11 PP3V0_PROX_IRLED 11 12 26 PP_CODEC_TO_FRONTMIC3_BIAS_CONN 11 26 FRONTMIC3_TO_CODEC_P_CONN 11 42 ROOM=CG_B2B ROOM=CG_B2B 1 1 FL1145 0201 C1193 AP_BI_I2C2_SDA_ALS_CONN ALS_TO_AP_INT_CONN_L PGND_IRLED_K FRONTMIC3_TO_CODEC_N_CONN 5% 16V NP0-C0G 01005 FL1144 FERR-22-OHM-1A-0.055OHM 1 PP3V0_PROX_CONN CUMULUS_TO_PROX_RX_EN_1V8_CONN 100PF 2 PP2V85_CAM_VDD 11 11 26 45_AP_TO_FCAM_CLK_CONN AP_TO_FCAM_SCL_CONN AP_TO_FCAM_SHUTDOWN_CONN AP_BI_FCAM_SDA_CONN C1199 1 ROOM=CG_B2B ROOM=CG_B2B ROOM=CG_B2B 26 23 CODEC_TO_RCVR_CONN_N CODEC_TO_RCVR_CONN_P PP1V8_FCAM_CONN PP2V85_FCAM_AVDD_CONN SPECIAL Z = 0.60 MM MAX IRLED = 104-128MA FERR-22-OHM-1A-0.055OHM 38 37 (FCAM, PROX, ALS, RECEIVER, ANC ERROR MIC) C1108 5% 16V NP0-C0G 01005 4.3UF 1 C1109 2.2UF 20% 4V X5R-CERM 2 0610-1 ROOM=CG_B2B ROOM=CG_B2B 1 20% 6.3V X5R 0201-1 ROOM=CG_B2B C1113 1 ROOM=CG_B2B 1 20% 6.3V X5R 0201-1 C1100 1 20% 6.3V 2 X5R-CERM 01005 2 120-OHM-210MA 11 26 26 10 PP_CODEC_TO_FRONTMIC3_BIAS 1 C1163 2 2 PP_CODEC_TO_FRONTMIC3_BIAS_CONN 01005 1 ROOM=CG_B2B 100PF 0.1UF 2.2UF 2 FL1148 0.25 MA PP3V0_ALS_CONN 11 26 DZ1115 6.8V-100PF 5% 16V NP0-C0G 01005 01005 2 ROOM=CG_B2B ROOM=CG_B2B C ROOM=CG_B2B ROOM=CG_B2B FL1164 70-OHM-25%-0.28A FL1113 120-OHM-25%-250MA-0.5DCR 7 1 45_AP_TO_FCAM_CLK 9 2 45_AP_TO_FCAM_CLK_CONN 01005 C1198 1 5% 16V 2 NP0-C0G 01005 CAMERA 24 1 CUMULUS_TO_PROX_RX_EN_1V8 ALS, AP_TO_FCAM_SHUTDOWN_CONN PROX_RX SIGNAL MUST BE TREATED WITH CARE 11 56PF 2 AP_TO_FCAM_SCL_CONN C1192 1 20 3 1 AP_BI_I2C2_SDA 56PF 11 20 3 1 AP_TO_I2C2_SCL 01005 1 2 01005 AP_TO_I2C2_SCL_ALS_CONN 3 2 11 2 ALS_TO_AP_INT_L 01005 1 120-OHM-210MA L1140 11 12V-33PF ROOM=CG_B2B ALS_TO_AP_INT_CONN_L 11 1 FRONTMIC3_TO_CODEC_N 4 90_FCAM_TO_AP_MIPI_DATA1_P 90_FCAM_TO_AP_MIPI_DATA1_N 7 1 3 2 6.8V-100PF 01005 2 ROOM=CG_B2B ROOM=CG_B2B 90_FCAM_TO_AP_MIPI_DATA1_CONN_P 11 Q1101 7 90_FCAM_TO_AP_MIPI_CLK_N 3 120-OHM-210MA 3 9 ROOM=CG_B2B D 2 FRONTMIC3_TO_CODEC_P 1 G CUMULUS_TO_PROX_TX_EN_BUFF 1 11 NO_XNET_CONNECTION=TRUE 1 DFN1006H4-3 DZ1113 6.8V-100PF 24 01005 2 ROOM=CG_B2B S 1 R1185 SYM_VER_1 FRONTMIC3_TO_CODEC_P_CONN 01005 DMN3730UFB4 90_FCAM_TO_AP_MIPI_DATA1_CONN_N 11 1.00M SYM_VER-1 A DZ1114 FL1101 L1135 4 11 NO_XNET_CONNECTION=TRUE ROOM=CG_B2B ROOM=CG_B2B 90_FCAM_TO_AP_MIPI_CLK_P FRONTMIC3_TO_CODEC_N_CONN 1 56PF PGND_IRLED_K 90-OHM-0.1A-0.7-3GHZ TAM0605 7 2 01005 C1112 1 SYM_VER-1 7 DZ1117 01005-1 2 ROOM=CG_B2B 5% 16V 2 NP0-C0G 01005 90_FCAM_TO_AP_MIPI_DATA0_CONN_P 11 ROOM=CG_B2B 90-OHM-0.1A-0.7-3GHZ TAM0605 11 NO_XNET_CONNECTION=TRUE 1 9 11 CODEC_TO_RCVR_CONN_P FL1103 ROOM=CG_B2B 3 2 120-OHM-210MA 01005 90_FCAM_TO_AP_MIPI_DATA0_P 1 CODEC_TO_RCVR_P ROOM=CG_B2B 90_FCAM_TO_AP_MIPI_DATA0_CONN_N B FL1152 9 FL1157 SYM_VER-1 7 ROOM=CG_B2B 70-OHM-25%-0.28A 56PF ROOM=CG_B2B 1 12V-33PF 5% 16V 2 NP0-C0G 01005 90-OHM-0.1A-0.7-3GHZ TAM0605 11 DZ1116 01005-1 2 ROOM=CG_B2B C1110 1 ROOM=CG_B2B 5% 16V 2 NP0-C0G 01005 4 11 ROOM=CG_B2B 120-OHM-210MA C1196 56PF L1139 AP_BI_I2C2_SDA_ALS_CONN C1111 1 FL1120 AP_BI_FCAM_SDA_CONN CODEC_TO_RCVR_CONN_N NO_XNET_CONNECTION=TRUE 1 5% 16V 2 NP0-C0G 01005 ROOM=CG_B2B 2 2 56PF ROOM=CG_B2B 120-OHM-25%-250MA-0.5DCR 1 CODEC_TO_RCVR_N 01005 2 01005 FL1114 ROOM=CG_B2B FL1151 9 120-OHM-210MA 5% 16V 2 NP0-C0G 01005 1 ROOM=CG_B2B 70-OHM-25%-0.28A FL1102 11 11 DZ1119 12V-33PF ROOM=CG_B2B 01005 ROOM=CG_B2B 90_FCAM_TO_AP_MIPI_DATA0_N CODEC_TO_HAC_CONN_P NO_XNET_CONNECTION=TRUE 01005-1 2 ROOM=CG_B2B 56PF 120-OHM-25%-250MA-0.5DCR 7 1 01005 5% 16V 2 NP0-C0G 01005 ROOM=CG_B2B 7 CODEC_TO_HAC_P C1162 1 FL1115 AP_BI_FCAM_I2C_SDA 9 45_PROX_TO_CUMULUS_RX_CONN 24 11 5% 16V 2 NP0-C0G 01005 B AUDIO 2 ROOM=CG_B2B C1102 1 ROOM=CG_B2B 1 FL1165 70-OHM-25%-0.28A 5% 16V 2 NP0-C0G 01005 1 01005 AP_TO_FCAM_I2C_SCL ROOM=CG_B2B 56PF PROX 2 DZ1118 01005-1 2 ROOM=CG_B2B 11 C1158 1 01005 120-OHM-25%-250MA-0.5DCR 1 CUMULUS_TO_PROX_RX_EN_1V8_CONN ROOM=CG_B2B FL1112 11 12V-33PF 2 120-OHM-210MA ROOM=CG_B2B 7 CODEC_TO_HAC_CONN_N NO_XNET_CONNECTION=TRUE FL1158 56PF AP_TO_FCAM_SHUTDOWN 1 01005 1 ROOM=CG_B2B 7 2 CODEC_TO_HAC_N 11 1 90_FCAM_TO_AP_MIPI_CLK_CONN_P 11 2 90_FCAM_TO_AP_MIPI_CLK_CONN_N 11 2 5% 1/32W MF 01005 2 ROOM=CG_B2B SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 PAGE TITLE CAMERA:FRONT FLEX CONN ROOM=CG_B2B DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 11 OF 55 SHEET 11 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 H7 VDD1(BUCK3)=0.045A BUCK3_SW1=0.500A BUCK3_SW2=0.?A BUCK3_SW3=0.?A TOTAL=0.545A SAME POLARITY L1209 ROOM=PMU ADI PMU L1216 1UH-3.0A-0.059OHM 1 0V775/0V95/1V0 2 PP_CPU 4 26 PIFA20161B PIFE20161T-SM L1210 1 2 15UF ROOM=PMU 1 C1292 15UF 20% 6.3V 2 X5R 0402-1 ROOM=PMU 1 C1294 15UF 20% 2 6.3V X5R 0402-1 ROOM=PMU ROOM=PMU 1 ROOM=PMU C1235 20% 2 6.3V X5R 0402-1 ROOM=PMU 1UH-3.0A-0.059OHM 2 PIFA20161B D L1212 U1202 FCCSP-N56-N61 SYM 1 OF 3 1 MCMK2012TR47M-SM PP5V0_USB 1 470 2 26 N20 N21 P20 P21 PP5V0_USB_TO_PMU 5% 1/32W MF-LF 01005 ROOM=PMU BUCK0_LX3 C12 A14 B14 C14 15UF 20% 2 6.3V X5R 0402-1 26 ROOM=PMU 1 1 10UF C C1218 C1250 10UF 2.2UF 20% 6.3V X5R 0201-1 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU L1214 1 ROOM=PMU 45_BUCK0_FB 4 2 MCMK2012TR47M-SM C1203 1 20% 2 6.3V CERM-X5R 0402-9 20% 2 6.3V CERM-X5R 0402-9 ROOM=PMU ROOM=PMU C1285 1 C1260 10UF 20% 2 6.3V CERM-X5R 0402-9 20% 6.3V 2 CERM-X5R 0402-9 ROOM=PMU ROOM=PMU C1271 1 1 C1267 10UF 20% 2 6.3V CERM-X5R 0402-9 20% 2 6.3V CERM-X5R 0402-9 ROOM=PMU ROOM=PMU 1 10UF C1263 10UF ROOM=PMU C1298 20% 6.3V 2 CERM-X5R 0402-9 1 C1264 10UF 20% 6.3V 2 CERM-X5R 0402-9 1 C1266 1.0UF 20% 6.3V 2 X5R 0201-1 ROOM=PMU ROOM=PMU C1272 100PF 5% 16V NP0-C0G 01005 2 5% 16V NP0-C0G 01005 ROOM=PMU ROOM=WIFI B 26 23 12 4 2 PP1V2_SDRAM 1 N13 P14 H17 J17 N15 L17 L2 N11 C1278 VDD_BUCK2 VDD_BUCK3 VDD_BUCK4 15UF 20% 2 6.3V X5R 0402-1 20% 6.3V 2 X5R 0402-1 20% 2 6.3V X5R 0402-1 20% 2 6.3V X5R 0402-1 BUCK2_LX VDD_BUCK001 VDD_BUCK023 VDD_LDO6 VDD_LDO2 VDD_LDO1_3 VDD_LDO4_13 VDD_LDO5 VDD_LDO7_8 VDD_LDO10 VDD_LDO9_11 VBUCK3_SW BUCK4_LX VBUCK4_SW 2 ROOM=PMU 1 1 C1283 18PF 18PF 5% 16V 2 CERM 01005 5% 16V CERM 2 01005 ROOM=PMU A C1214 1 C1216 15UF 15UF 20% 2 6.3V X5R 0402-1 20% 2 6.3V X5R 0402-1 ROOM=PMU C1288 1 100PF 5% 16V NP0-C0G 01005 2 ROOM=PMU ROOM=PMU 4 1 L1218 C ROOM=PMU 1.0UH-20%-2.4A-0.075HM 0V9/0V95 2 PP_BUCK2_LX DIDT=TRUE 1 45_BUCK2_FB 20% 6.3V 2 X5R 0402-1 C1223 15UF 26 L1217 PP_VAR_SOC 5 26 5 1 C1275 15UF 20% 2 6.3V X5R 0402-1 ROOM=PMU 1 C1289 15UF 20% 2 6.3V X5R 0402-1 1 2 PP0V95_FIXED_SOC 4 7 26 PIFE20161T-SM L1219 ROOM=PMU 1 15UF 0.47UH-30%-2.7A-0.065OHM 1 20% 6.3V 2 X5R 0402-1 2 MCKK2012-SM ROOM=PMU C1240 ROOM=PMU 1 C1202 15UF 20% 6.3V 2 X5R 0402-1 ROOM=PMU 1 C1209 15UF 20% 6.3V 2 X5R 0402-1 1 C1241 15UF 20% 6.3V 2 X5R 0402-1 ROOM=PMU ROOM=PMU PP_BUCK3_LX DIDT=TRUE 45_BUCK3_FB PP1V8 2 3 5 6 7 10 11 13 15 20 23 24 25 26 27 PP1V8_GRAPE 24 26 PP1V8_OSCAR 19 22 26 N6 N7 F20 F21 26 PP_BUCK4_LX DIDT=TRUE 45_BUCK4_FB N3 N4 M2 N2 BUCK4_SW2 L5 B PP1V2 2 4 5 11 26 BUCK4_SW1 VIBE A16 B16 BUCK5_LX0 C16 A18 B18 BUCK5_LX1 C18 BUCK5_FB C21 LDO 45_XTAL_TO_PMU_OSC32 1 XW1220 PP1V2_OSCAR 22 26 26 PP_BUCK5_LX0 DIDT=TRUE 26 PP_BUCK5_LX1 DIDT=TRUE 45_BUCK5_FB 4 TO DO: REVIEW ALL LDO ASSIGNMENTS (CHECK VDD_LDO INPUT SOURCE, CHECK CURRENT RATING FOR LDO OUT SOC USB PHY (25 MA) VS. LOAD REQUIREMENT AT DESTINATION, ETC) SPEAKER AMP, CODEC VA (2.5 MA L1419, 3MA L67) TRISTAR VDH, WIFI_FLEX PAC (? MA) GYRO, ACCEL, COMPASS (? MA) NOTE: 3V +/- 5% PER EUGENE NAND (? MA) ACCESSORY POWER (? MA) PROX/ALS VDD (PROX: 0.75/1.2 MA ALS: 0.175/0.25 MA [TYP/MAX]) BUCK6_LX R9 NC BUCK6_FB L11NC BUCK6_BYP R8 NC 32.768K-20PPM-12.5PF C1276 ROOM=PMU PIFE20161T-SM 26 BUCK4_FB E18 45_PMU_TO_XTAL_OSC32 2.0X1.2X0.60-SM1 ROOM=PMU ROOM=PMU J1 J2 BUCK3_FB K6 P5 BUCK3_SW1 N5 P6 BUCK3_SW2 R6 P7 BUCK3_SW3 R7 VDD_BUCK5 NC P12 VDD_VIB R12 VIB NC ROOM=PMU ROOM=PMU G1 G2 BUCK2_FB F4 VDD_BUCK6 VDD_BYP_BUCK6 C1 XTAL1 D1 XTAL2 G9 VSS_RTC 1 ROOM=PMU 2 4 12 23 26 PIFE20161T-SM SHORT-10L-0.1MM-SM 1 2 1.0UH-20%-2.4A-0.075HM 45_BUCK1_FB BUCK3_LX N12 VIB_PWM_EN Y1200 C1226 PP1V2_SDRAM PCB:PLACE C1270 NEAR BUCK1_FB E4 XTAL ROOM=PMU PP_BUCK1_LX1 DIDT=TRUE 1 15UF L1215ROOM=PMU VDD_BUCK1 2.2UF 20% 2 6.3V X5R 0201-1 26 C1210 2 VLDO1 VLDO2 (50MA) VLDO3 (50MA) VLDO4 (1000MA) VLDO5 (150MA) VLDO6 (250MA) VLDO7 (250MA) VLDO8 (250MA) VLDO9 VLDO9_FB (100MA) VLDO10 (250MA) VLDO11 (5MA) VLDO12 (250MA) VLDO13 (50MA) (50MA) F18 2.5-3.3V +/-77.5MV R14 1.2-1.9V +/-42.5MV G18 2.5-3.3V +/-75MV H18 2.5-3.6V +/-75MV R15 2.5-3.6V +/-75MV R13 1.2-3.6V +/-82.5MV K18 2.5-3.6V +/-75MV L18 2.5-3.6V +/-70MV NC R10 2.5-3.6V +/-71.25MV P10 PP2V9_LDO9 L1 0.6-1.4V +/-25MV R11 2.5-3.6V +/-82.5MV L6 FIXED 1.8V, +/-5% J18 2.5-3.6V +/-71.25MV VPUMP R5 PP3V3_USB 2 26 PP1V8_VA_L19_L67 10 16 PP3V0_TRISTAR 15 17 PP3V0_IMU 19 26 PP3V0_NAND 6 26 PP3V3_ACC 17 26 PP3V0_PROX_ALS 11 26 26 26 29 PP1V0 7 26 PP3V0_PROX_IRLED 11 26 PP1V8_ALWAYS 3 5 14 26 PP3V0_MESA 21 26 REAR CAM AUTO FOCUS (120MA PEAK, PROBABLY CAP AT 80MA) REAR/FRONT CAM AVDD (? MA) SOC 1V0 MIPI, USB_DVDD, DP (71 MA TOTAL) PROX LED (102 MA TYP) ALWAYS ON 1V8 (? MA) SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 PAGE TITLE POWER:ADI(1/2) DRAWING NUMBER Apple Inc. 45_PMU_VPUMP 051-9903 REVISION R SPEC REQUIRES 10NF, VPUMP RUNS AT 4.6V VPUMP CAP: 30% DERATED. 8 7 6 3.3A MAX 10UF 1 PP_BUCK1_LX0 DIDT=TRUE 1 15UF 1 H7 VDD_SRAM, VDD_SRAM_SOC C1225 26 C1227 15UF ROOM=PMU H7 VAR 1 A4 B4 C4 F1 F2 K1 K2 E20 E21 A17 B17 C17 N9 N8 A8 B8 C8 A13 B13 C13 BUCK1_LX1 4 26 1.8A MAX C1251 100PF 2 1 10UF 20% 2 6.3V CERM-X5R 0402-9 10UF 1 C1217 20% 2 6.3V CERM-X5R 0402-9 10UF 1 1 10UF 20% 2 6.3V CERM-X5R 0402-9 1 DESENSE CAPS FOR VCCMAIN: C1271: WIFI MODULE C1272: AP PMU MODULE BB PMU MODULE:RF SIDE QPOET MODULE:RF SIDE C1200 20% 2 6.3V CERM-X5R 0402-9 BUCK C1220 BUCK INPUT 1 J20 VCC_MAIN J21 K7 VCC_MAIN_S LDO INPUT PP_VCC_MAIN D + L1217 PP_GPU MAX MAX MAX MAX 48 39 31 26 23 17 16 15 14 10 52 51 A3 B3 C3 A5 B5 C5 ROOM=PMU 1.0UH-20%-2.4A-0.075HM 0V9/0V95 2 ROOM=PMU BUCK1_LX0 ROOM=PMU L1216 ROOM=PMU PIFA20161B BUCK0_FB E7 CHG_LX ROOM=PMU L1213 ROOM=PMU PP_BUCK0_LX3 DIDT=TRUE 0.47UH-20%-3.3A-0.065OHM L20 C1228 20% 2 6.3V X5R 0402-1 15UF 20% 2 6.3V X5R 0402-1 SAME POLARITY 1 NC L21 NC 1 15UF 1UH-3.0A-0.059OHM K10 VBAT L16 ACT_DIO NC C1262 20% 6.3V 2 X5R 0402-1 C1243 20% 2 6.3V X5R 0402-1 H7 VDDCA,VDD2 IBAT BUCK0_LX2 1 15UF ROOM=PMU 3 4 10 13 14 15 17 26 29 (BUCK4)=0.500A BUCK4_SW1=1.000A BUCK4_SW2=0.100A TOTAL=1.600A CHARGER_VBATT_SNS BUCK0_LX1 VBUS A7 26 PP_BUCK0_LX0 DIDT=TRUE B7 C7 A9 26 PP_BUCK0_LX1 DIDT=TRUE B9 C9 A12 26 PP_BUCK0_LX2 DIDT=TRUE B12 C1245 20% 2 6.3V X5R 0402-1 3.45A MAX NC 25 14 1 15UF ROOM=PMU 1 C1293 15UF 5% 16V NP0-C0G 01005 PCB:PLACE C1296 NEAR H7 VDD_GPU NC H20 H21 VCENTER BAT/USB 26 25 18 17 14 C1222 ROOM=PMU BUCK0_LX0 M20 NC M21 NC NOSTUFF 2 ROOM=PMU N16 VBUS_OVP_OFF NC R1201 1 ROOM=PMU 0.47UH-20%-3.3A-0.065OHM D2186AZE0FJAVAC ROOM=PMU 1 100PF 5% 16V NP0-C0G 2 01005 2 PP1V8_SDRAM C1296 100PF SHORT-10L-0.1MM-SM 1 2 C1263 MAX MAX MAX MAX MAX 1 APN: 338S1251 (ADI AZ) C1297 1 1 XW1218 15UF 7.6A MAX L1211 C1290 20% 2 6.3V X5R 0402-1 MCMK2012TR47M-SM NOTE: L1210, L1212 BOMOPTIONS CONTROLLED ON PAGE1 1 H7 VDD_CPU (BUCK, LDO, VIBE DRIVER, 32K, CHARGER) ROOM=PMU 0.47UH-20%-3.3A-0.065OHM + 1.0UH-20%-2.4A-0.075HM PCB:PLACE C1297 NEAR 1 2 5 1 C1208 0.1UF 1 C1270 2.2UF 1 C1229 2.2UF 20% 6.3V 2 X5R-CERM 01005 20% 6.3V 2 X5R 0201-1 20% 6.3V 2 X5R 0201-1 ROOM=PMU ROOM=PMU ROOM=PMU 1 C1212 1.0UF 20% 6.3V 2 X5R 0201-1 1 C1284 1.0UF 20% 6.3V 2 X5R 0201-1 ROOM=PMU ROOM=PMU 4 1 C1299 1 C1207 2.2UF 1 2.2UF 20% 6.3V 2 X5R 0201-1 20% 6.3V 2 X5R 0201-1 ROOM=PMU ROOM=PMU C1242 1.0UF 20% 6.3V 2 X5R 0201-1 ROOM=PMU 3 1 C1232 2.2UF 20% 6.3V 2 X5R 0201-1 ROOM=PMU 1 C1291 0.1UF 20% 4V 2 X5R 01005 ROOM=PMU 1 C1219 NOTICE OF PROPRIETARY PROPERTY: 2.2UF 20% 6.3V 2 X5R 0201-1 ROOM=PMU THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 7.0.0 BRANCH PAGE 12 OF 55 SHEET 12 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 ADI PMU (AMUX, GPIO, BUTTONS, ADC, THERMISTORS, SYSTEM I/F, GND) D D ROOM=PMU R1316 200K 2 1 1% 1/20W MF 201 ROOM=PMU R1331 ROOM=PMU 6.34K2 1 C1317 0.1UF MF 01005 1 2 0201 6.3V 10% CERM-X5R 1 1.0UF 1 ROOM=PMU AMUX VOLTAGE LIMIT IS APPROX. = VDD_REF = PP_VCC_MAIN U1202 FOREHEAD NTC ROOM=PMU_ C1359 ROOM=PMU_ R1308 1 100PF 10KOHM-1% 5% 6.3V CERM 2 01005 1.8V ---> 1.8V ---> BASEBAND ---> FOREHEAD_NTC_P FOREHEAD_NTC_N 01005 29 2 PCB: MAKE XW1328, XW1329 ACCESSIBLE! 100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU AP_TO_I2C0_SCL 17 15 3 AP_BI_I2C0_SDA 15 3 45_AP_TO_PMU_AND_BL_DWI_CLK 15 3 45_AP_TO_PMU_AND_BL_DWI_DO 17 15 13 3 CAMERA NTC SM ROOM=PMU 1 NO_XNET_CONNECTION=TRUE ROOM=PMU_ C1367 ROOM=PMU_ R1310 1 100PF 10KOHM-1% 5% 6.3V CERM 2 01005 ROOM=PMU NO_XNET_CONNECTION=TRUE CAM_NTC_P CAM_NTC_N 01005 XW1304 XW1309 100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU 1 1 2 SHORT-10L-0.1MM-SM ROOM=PMU 2 SHORT-10L-0.1MM-SM XW1311 1 1 1 2 SHORT-10L-0.1MM-SM ROOM=PMU 2 SHORT-10L-0.1MM-SM 1 ROOM=PMU_ ROOM=PMU_ R1390 1 100PF 10KOHM-1% 5% 6.3V 2 CERM 01005 1 XW1315 1 ROOM=PMU 2 SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE PA_NTC_P PA_NTC_N ROOM=PMU 2 SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE XW1314 FOREHEAD_TO_PMU_NTC CAM_TO_PMU_NTC PA_TO_PMU_NTC SOC_TO_PMU_NTC 45_PMU_TCAL ROOM=PMU NO_XNET_CONNECTION=TRUE XW1333 NO_XNET_CONNECTION=TRUE PMU_TO_AP_PRE_UVLO_L ROOM=PMU 2 AP_TO_PMU_RESET_IN 1 17 TRISTAR_TO_PMU_HOST_RESET 100K 5% 3 AP_TO_PMU_SOCHOT1_L 1/32W 25 17 15 4 2 RESET_1V8_L MF 01005 2 3 PMU_TO_AP_IRQ_L 20 PMU_TO_PHOTON_ALIVE 3 2 SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE XW1308 C1322 P2MM-NSM SCL SDA DWI_CK 100-300K INT PD DWI_DI 100-300K INT PD DWI_DO PRE_UVLO RESET_IN1 100-300K INT PD RESET_IN2 100-300K INT PD RESET_IN3 100-300K INT PU RESET* NO INT PULL IRQ* NO INT PULL SYS_ALIVE ROOM=PMU 2 SHORT-10L-0.1MM-SM C1365 100PF 1 1 5% 6.3V CERM 2 01005 ROOM=PMU R1309 NC L15 R17 P17 R19 P18 P19 TDEV1 TDEV2 TDEV3 TDEV4 TCAL TBAT 3.92K 0.1% 1/20W MF 2 0201 ROOM=PMU PLACE THESE XWS AT PMU ADC/REFS IREF VREF VDD_REF VDD_RTC F6 G5 E5 F7 45_PMU_IREF PP_PMU_VREF 26 PP_PMU_VDD_REF 26 PP_PMU_VDD_RTC TO LDO12 D2186AZE0FJAVAC FCCSP-N56-N61 SYM 3 OF 3 13 15 2 A15 B15 VSS_BUCK0_5 C15 A2 B2 VSS_BUCK1 C2 A6 B6 VSS_BUCK01 C6 G20 VSS_BUCK4 G21 A19 B19 VSS_BUCK5 C19 P9 VSS_BUCK6 A10 A11 B10 VSS_BUCK012 B11 C10 C11 H1 VSS_BUCK23 H2 26 FIXED 2.5V, +/-2% BRICK_ID N17 ADC_IN7 N18 CHESTNUT_TO_PMU_ADCIN7 0.1UF 1 13 10% 6.3V CERM-X5R 0201 1 C1323 1000PF 10% 6.3V 2 X5R-CERM 01005 TRISTAR_TO_PMU_USB_BRICKID_R ROOM=PMU ADC_REF E6 NC ACC_ID N19 NC PP1V8_SDRAM 3 4 10 12 14 15 17 26 29 ROOM=PMU 1 TMPR_DET ACC_DET BUTTON1 100-300K INT PU BUTTON2 100-300K INT PU BUTTON3 100-300K INT PU BUTTON4 F5 NC R18 D21 D20 B20 C20 R1330 100K BUTTON_TO_AP_MENU_KEY_L BUTTON_TO_AP_HOLD_KEY_L 3 21 5% 1/32W MF 2 01005 3 8 BUTTON_TO_AP_RINGER_A KEEPACT L7 SHDN N10 NC AP_TO_PMU_KEEPACT 3 NO INT PULL GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 3 8 13 NC 100-300K INT PU ROOM=PMU 1 R1387 45_PMU_TO_WLAN_CLK32K F17 F16 E15 F15 G17 E17 E16 E14 H16 G16 F14 F13 E13 E12 NC E11 F12 NC E10 E9 F11 NC F9 NC F10 CHG_TO_PMU_INT_L BB_TO_PMU_HOST_WAKE_L PMU_TO_BB_RST_R_L TRISTAR_TO_AP_INT STOCKHOLM_TO_PMU_HOST_WAKE PMU_TO_OSCAR_RESET_CLK32K_L WLAN_TO_PMU_HOST_WAKE CODEC_TO_PMU_MIKEY_INT_L PMU_TO_BT_REG_ON BT_TO_PMU_HOST_WAKE PMU_TO_WLAN_REG_ON AP_TO_I2C0_SCL OSCAR_TO_PMU_HOST_WAKE PMU_TO_BB_VBUS_DET U1202 ROOM=PMU C1319 OUT_32K E8 ROOM=PMU NO_XNET_CONNECTION=TRUE RADIO PA NTC PP1V8 ROOM=PMU NO_XNET_CONNECTION=TRUE XW1306 NO_XNET_CONNECTION=TRUE P2MM-NSM R1301 NO_XNET_CONNECTION=TRUE 2 1 1 1 SM 24 23 20 15 12 11 10 7 6 5 3 2 27 26 25 NO_XNET_CONNECTION=TRUE B PP1300 PP PP1301 PP J4 K4 K15 J16 K16 NC F8 P3 R3 P4 R4 P2 N1 NTC 1 NO_XNET_CONNECTION=TRUE BASEBAND ---> AMUX_A2 AMUX_A3 AMUX_A4 AMUX_A5 AMUX_A6 AMUX_A7 AMUX_AY AMUX_B0 AMUX_B1 AMUX_B2 AMUX_B3 AMUX_B4 AMUX_B5 AMUX_B6 AMUX_B7 AMUX_BY AMUX 3.33V ---> NO_XNET_CONNECTION=TRUE D2 E2 E1 H6 H5 H4 G4 J5 J6 NC K5 K8 NC L8 13 45_PMU_TO_WLAN_CLK32K K9 RADIO_TO_PMU_ADC_PP_LDO5_SIM 29 L9 2 AP_TO_PMU_TEST_CLKOUT L10 29 RADIO_TO_PMU_ADC_SMPS4 L4 25 PMU_TO_TP_AMUX_BY BUTTON_TO_AP_RINGER_A 8 3 BUTTON_TO_AP_VOL_UP_L 8 3 BUTTON_TO_AP_VOL_DOWN_L 20 15 LCM_TO_CHESTNUT_PWR_EN 13 TRISTAR_TO_PMU_USB_BRICKID_R 15 13 CHESTNUT_TO_PMU_ADCIN7 25 PMU_TO_TP_AMUX_AY 29 RADIO_TO_PMU_ADC_SMPS1 29 RADIO_TO_PMU_ADC_PP_LDO11_VDDIO 13 8 3 BUTTONS/DETECT NC A1 AMUX_A0 B1 AMUX_A1 NC AP<->PMU C ---> ---> ---> ---> ---> GPIO 1.8V 1.8V 1.8V 1.8V 1.8V ROOM=PMU 2 X5R 0201-1 ROOM=PMU D2186AZE0FJAVAC FCCSP-N56-N61 SYM 2 OF 3 C1326 10% 6.3V 2 X5R 01005 C1318 20% 6.3V 17 0.01UF ROOM=PMU APN: 338S1251 (ADI AZ) TRISTAR_TO_PMU_USB_BRICKID 1% 1/32W 1.00M 13 29 14 29 R1312 1.00K2 1 3 17 29 5% 1/32W MF 2 01005 ROOM=PMU PMU_TO_BB_RST_L 29 5% 1/32W MF 01005 G8 G6 H7 J7 H15 G15 P8 22 29 10 29 29 29 VSS VSSA_BUCK0 VSSA_BUCK1 VSSA_BUCK2 VSSA_BUCK3 VSSA_BUCK4 VSSA_BUCK5 VSSA_BUCK6 3 13 15 17 K20 K21 7 22 VSS_SW_CHG 29 A20 A21 B21 G7 G10 G11 G12 WLAN_TO_PMU_PCIE_WAKE_L 29 PMU_TO_ACC_SW_ON 17 NC 01005 G13 G14 H8 H9 H10 H11 H12 H13 H14 J8 J9 J10 J11 J12 J13 J14 J15 K11 K12 K13 K14 K17 L12 L13 L14 M1 N14 P1 P11 P13 P15 P16 R1 R2 R16 R20 R21 C B VSS 2 ADI OTP: SEE RADAR 14032884 100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU H7P NTC 1 NO_XNET_CONNECTION=TRUE ROOM=PMU_ C1368 1 100PF A 5% 6.3V CERM 2 01005 NO_XNET_CONNECTION=TRUE ROOM=PMU_ R1357 SOC_NTC_P 10KOHM-1% SOC_NTC_N 01005 2 SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 PAGE TITLE POWER:ADI(2/2) 100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 13 OF 55 SHEET 13 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 TIGRIS CHARGER & VIBE DRIVER D D PP_VCC_MAIN 26 1 ROOM=CHARGER ROOM=CHARGER C1403 1 1 100PF A2 PMID_CAP NOSTUFF 1 C1407 4.2UF 10% 2 16V X5R-CERM 0402-1 ROOM=CHARGER 5% 1/32W MF 01005 2 C 1 C1440 220PF 10% 16V 2 X5R-CERM 0402-1 ROOM=CHARGER C1470 C1471 5% 25V NP0-C0G 01005 5% 25V NP0-C0G 01005 ROOM=CHARGER ROOM=CHARGER 100PF 5% 25V 2 NP0-C0G 01005 ROOM=CHARGER ROOM=CHARGER 29 26 17 15 13 12 10 4 3 PP1V8_SDRAM A5 VBUS VBUS VBUS VBUS VBUS E5 21 16 14 3 21 16 14 3 1 2 SYS_ALIVE_TIGRIS G3 E4 SN2400B0YFF E3 BAT BAT BAT BAT 2.2UF ROOM=CHARGER ROOM=CHARGER S A3 68.1K2 CSD68815W15 BGA G ROOM=CHARGER 1 1 2 10% 16V X5R 402 CHG_BOOT Q1403 R1401 1 CHG_LX D 100K L1401 5% 1/32W MF 2 01005 2 ROOM=CHARGER PIFE25201T-SM 1.0UH-20%-3.2A-0.065OHM ROOM=CHARGER A1 B1 D1 PP_BATT_VCC C1 ROOM=CHARGER 1 CHARGER_VBATT_SNS ACT_DIODE E2 VBUS_DET R1454 USB_VBUS_DETECT 26 BAT_SNS E1 INT F3 TEST 2 C1418 20% 6.3V 2 X5R 0201-1 NOSTUFF BUCK_SW C4 VBUS_OVP_OFF F1 PP_TIGRIS_VBUS_DET 26 BUCK_SW A4 BUCK_SW B4 BUCK_SW D4 SYS_ALIVE G2 26 20% 2 6.3V X5R 0201-1 0.033UF BOOT G5 WCSP SDA SCL TRISTAR_TO_PMU_OVP_SW_EN_L F4 CHG_TO_PMU_INT_L 1 20% 2 6.3V CERM-X5R 0402-9 C1402 LDO G4 ROOM=CHARGER 17 ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER C1417 10UF 2.2UF A1 U1401 PMID C5 XW1401 SM 10% 10V 2 X7R-CERM 01005 F5 B5 D5 AP_BI_I2C1_SDA AP_TO_I2C1_SCL 20% 2 6.3V CERM-X5R 0402-9 ROOM=CHARGER 1 C1415 1 ROOM=CHARGER 100PF 5% 25V 2 NP0-C0G 01005 100PF ROOM=CHARGER 13 100PF C1452 NOSTUFF C1408 4.2UF ROOM=CHARGER 100K ROOM=CHARGER 1 20% 6.3V 2 X5R 0201-1 2 C1411 10UF 5% 16V NP0-C0G 01005 20% 2 6.3V X5R 0201-1 CHG_ACT_DIO HDQ_HOST G1 HDQ_GAUGE F2 C1412 2.2UF 12 25 AP_TO_TIGRIS_SWI 3 BATTERY_SWI 25 ROOM=CHARGER 1 C1416 1 C 100PF 2.2UF 20% 2 6.3V X5R 0201-1 14 16 25 26 40 45 46 C1480 2 5% 16V NP0-C0G 01005 ROOM=CHARGER DESENSE CAP PCB: PLACE CLOSE BY TIGRIS D3 C3 PP1V8_ALWAYS R1403 10% 2 16V X5R-CERM 0402-1 C1453 PP5V0_USB 1 1 4.2UF 1 10% 10V 2 X7R-CERM 01005 1 100PF CHARGER DESENSE CAPS PLACE BY L1401 PGND PGND PGND PGND 26 12 5 3 C1409 B3 26 25 18 17 12 1 C1410 C1451 C1 C2 C3 26 VDD_MAIN B2 VDD_MAIN D2 VDD_MAIN C2 VDD_MAIN 2 1 220PF 2.2UF 5% 16V NP0-C0G 01005 C1450 10 12 15 16 17 23 26 31 39 48 51 52 A2 A3 B1 B2 B3 CHARGER_LDO CHARGER CAPS 1 1% 1/32W MF 01005 PP_BATT_VCC B C2 1 14 16 25 26 40 45 46 B C1433 10UF ROOM=VIBE_DRIVER VDD 20% 6.3V 2 CERM-X5R 0402-9 ROOM=VIBE_DRIVER U1400 DRV2604YZF B2 C1 SDA SCL 3 AP_TO_VIBE_EN A1 EN 3 AP_TO_VIBE_TRIG B1 IN/TRIG NOSTUFF 1 R1411 100K 5% 1/32W MF 2 01005 ROOM=VIBE_DRIVER BGA 1 R1412 OUT+ A3 OUT- C3 VIBE_DRIVE_P VIBE_DRIVE_N 18 26 18 26 VREG A2 VIBE_C_VREG ROOM=VIBE_DRIVER 1 C1401 1 2.2UF 20% 6.3V 2 X5R 0201-1 B3 21 16 14 3 GND AP_BI_I2C1_SDA AP_TO_I2C1_SCL 21 16 14 3 C1405 1 5% 16V NP0-C0G 01005 2 2 C1406 100PF 100PF 5% 16V NP0-C0G 01005 ROOM=VIBE_DRIVER ROOM=VIBE_DRIVER 100K 5% 1/32W MF 2 01005 ROOM=VIBE_DRIVER A A PAGE TITLE POWER:TIGRISR,VIBE DRIVER DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 14 OF 55 SHEET 14 OF 54 1 SIZE D https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 CHESTNUT, BACKLIGHT DRIVER, MESA BOOST D500 DISPLAY PMU (TI CHESTNUT, 338S1149) D D 39 31 26 23 17 16 15 14 12 10 52 51 48 PP_VCC_MAIN C1547 1 1 10UF 20% 6.3V CERM-X5R 2 0402-9 L1519 1.5UH-20%-1.8A-0.118OHM 26 U1501 PP_CHESTNUT_CP TPS65730A0PYFF ROOM=CHESTNUT LQE2MRT1R5MG0-SM BGA ROOM=CHESTNUT D1 VIN ROOM=CHESTNUT 1 CF1 C4 CF2 E4 10UF 2 26 B2 SW PP_CHESTNUT_LXP 26 A2 SYNC 17 15 13 3 D3 SCL AP_TO_I2C0_SCL D2 SDA AP_BI_I2C0_SDA PP_CHESTNUT_CN 20% 10V 2 X5R-CERM 0402-8 ROOM=CHESTNUT LCMBST B3 CPUMP B4 NO INT PULL 17 15 13 3 C1554 26 PP6V0_LCM_BOOST 1 VNEG E3 PN5V7_SAGE_AVDDN 20 13 LCM_TO_CHESTNUT_PWR_EN C3 LCM_EN RESET_1V8_L C2 RESET* 20 24 26 VNEG(SUB) E2 200K INT PD 25 17 13 4 2 1 HVLDO1 A4 PP5V7_SAGE_AVDDH E1 ADCMUX B1 PGND1 D4 PGND2 CHESTNUT_TO_PMU_ADCIN7 C1 AGND 13 HVLDO2 A3 PP5V7_LCM_AVDDH 20 HVLDO3 A1 PP5V1_GRAPE_VDDH 1 C1541 1UF 1 10UF 20% 2 6.3V X5R 0201 C C1569 1 ROOM=CHESTNUT C1504 10UF 24 26 NO INT PULL 1 C1502 C1529 10UF 10UF 20% 10V 2 X5R-CERM 0402-8 20% 10V 2 X5R-CERM 0402-8 ROOM=CHESTNUT ROOM=CHESTNUT 20% 10V 2 X5R-CERM 0402-8 26 ROOM=CHESTNUT 24 26 C1577 10UF 20% 10V 2 X5R-CERM 0402-8 20% 10V 2 X5R-CERM 0402-8 ROOM=CHESTNUT C ROOM=CHESTNUT D500 BACKLIGHT DRIVER MESA BOOST A0 L1503 15UH-20%-0.72A-0.9OHM 1 2 PITA32251T-SM NOTE: D1501 IS 30V DIODE FOR N61 AND 20V FOR N56. ROOM=BACKLIGHT ROOM=BACKLIGHT D1501 NSR0530P2T5G PP_WLED_LX A K 1 C1505 2.2UF 39 31 26 23 17 16 15 14 12 10 52 51 48 C1552 10UF 1 20% 6.3V CERM-X5R 2 0402-9 ROOM=BACKLIGHT 1 C1597 1 C1530 2.2UF 20% 25V 2 X5R-CERM 0402-1 SOD-923-1 PP_VCC_MAIN 20% 25V 2 X5R-CERM 0402-1 ROOM=BACKLIGHT ROOM=BACKLIGHT 1 2.2UF 20% 25V 2 X5R-CERM 0402-1 ROOM=MESA ROOM=BACKLIGHT L1500 U1502 17 15 13 3 AP_BI_I2C0_SDA AP_TO_I2C0_SCL SDA SCL PP1V8_SDRAM 1 OVP D1 ILED1 D3 ILED2 D2 C1513 PP_LCM_BL_CAT2 20 26 1 2 26 PP18V0_MESA_SW B1 SW 0403 A2 VIN 10UF 5% 2 25V NP0-C0G 01005 20 26 PP_VCC_MAIN C1508 1 100PF PP_LCM_BL_CAT1 SCK B2 45_AP_TO_PMU_AND_BL_DWI_CLK SDI C2 45_AP_TO_PMU_AND_BL_DWI_DO C1 VIO_SPI PP1V8 24 23 20 13 12 11 10 7 6 5 3 2 27 26 25 29 26 17 14 13 12 10 4 3 A1 A2 BGA BGA 26 52 17 16 15 14 12 10 51 48 39 31 26 23 ROOM=BACKLIGHT LM3534TMX-A1 A3 SW C3 IN 17 15 13 3 PP_LCM_BL_ANODE 20 LM3638 1.0UH-20%-0.4A-0.53OHM ROOM=BACKLIGHT ROOM=BACKLIGHT U1503 ROOM=MESA 10UF 20% 6.3V 2 CERM-X5R 0402-9 B APN: 353S3978 C1531 20% 6.3V CERM-X5R 2 0402-9 29 26 17 12 25 21 VOUT C3 PP16V5_MESA MESA_TO_BOOST_EN ROOM=MESA C2 LDOIN 3 13 3 13 B1 HWEN 21 25 26 ROOM=MESA B2 EN_M A3 EN_S PP3V0_TRISTAR 1 C1503 1 100PF 5% 25V 2 NP0-C0G 01005 VOLTAGE=17.0V B3 AGND 26 A1 PGND B PMID C1 26 P17V0_MOJAVE_LDOIN C1500 2.2UF 20% 25V 2 X5R 0402-3 ROOM=MESA 1 C1501 2.2UF 20% 25V 2 X5R 0402-3 B3 GND ROOM=MESA A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 PAGE TITLE DISPLAY:CHESTNUT,BACKLIGHT DRIVER DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 15 OF 55 SHEET 15 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 SPEAKER AMP, LED DRIVER SPEAKER AMP D D I2C ADDRESS: 1000000X PP1V8_VA_L19_L67 1 C1635 1 10UF ROOM=SPKR_AMP C1637 1 2.2UF 20% 6.3V 2 CERM-X5R 0402-9 ROOM=SPKR_AMP C1609 0.1UF 20% 6.3V 2 X5R 0201-1 C1630 2.2UF 20% 6.3V 2 X5R-CERM 01005 ROOM=SPKR_AMP TBD: PROTO_MLB2 WILL NOSTUFF THIS, BUT RESERVE FOOTPRINT SPACE IN CASE SPKAMP LOCATION RIGHT NEXT TO DOCKFLEX,EXPLORE NEED 10 12 26 ROOM=SPKR_AMP 1 NOSTUFF 20% 6.3V 2 X5R 0201-1 PCB: PLACE C1635, C1637 AT VP INPUT PP_L19_VBOOST 1 10UF C1695 20% 6.3V 2 CERM-X5R 0402-9 1 22UF 20% 2 10V X5R-CERM 0402-8 10UF C1648 0.1UF ROOM=SPKR_AMP ROOM=SPKR_AMP VBST ROOM=SPKR_AMP 1 2 26 A2 B2 PP_SPKAMP_SW AP_BI_I2C1_SDA D5 21 14 3 21 14 3 AP_TO_I2C1_SCL D6 SPKAMP_TO_AP_INT_L A7 INT* ROOM=SPKR_AMP 3 F2 PP_SPKAMP_FILT 26 FILT+ C5 PP_SPKAMP_LDO_FILT 26 LDO_FILT WLCSP VER1 SDA 3 A6 AP_TO_SPKAMP_RESET_L SCL R1629 3 AP_TO_SPKAMP_BEE_GEES RESET* 5% 1/32W MF 2 01005 1/32W 1 39.2 1 E6 SCLK 10 3 AP_TO_CODEC_XSP_I2S2_LRCLK F6 LRCK/FSYNC 1% 1/32W MF 01005 2 ROOM=SPKR_AMP 1M INT PD F7 SDIN 1 SPEAKER_TO_SPKAMP_VSENSE_N 18 01005 C1606 220PF 10% 2 10V X7R-CERM 01005 1% NO_XNET_CONNECTION=TRUE C C1601NO_XNET_CONNECTION=TRUE 1 0.00 SPEAKER_TO_SPKAMP_VSENSE_P C1605 220PF 0.1002 1 SPKAMP_TO_SPEAKER_OUT_CONN_P 1% 1/4W MF 0402 1M INT PD SPKAMP_TO_SPEAKER_OUT_CONN_N B5 B6 C6 E4 F3 F4 C1660 1 C1663 1 1000PF 1000PF 10% 10V X5R 2 01005 ROOM=SPKR_AMP 18 ~700MA RMS @ 2.4W INTO 8OHM GNDA GNDP 18 01005 10% 10V 2 X7R-CERM 01005 R1603 CKPLUS_WAIVE=MISS_N_DIFFPAIR E5 SDOUT A3 B3 B4 C3 C4 D3 D4 ROOM=SPKR_AMP R16052 1 NOSTUFF 1M INT PD CODEC_TO_AP_XSP_I2S2_DIN 220PF R1602 44.2K 1M INT PD 10 3 C1604 2MF 01005 20% ROOM=SPKR_AMP 6.3V 2 X5R-CERM NO_XNET_CONNECTION=TRUE 010051/32W 1 2MF 39.2 1% 01005 R1635 45_AP_TO_CODEC_XSP_I2S2_BCLK AP_TO_CODEC_XSP_I2S2_DOUT 1 0.1UF 1 10 3 10 3 R1601 SPKAMP_TO_SPEAKER_OUT_P 1M INT PD ROOM=CHARGER 0.00 NOSTUFF NOSTUFF 10% 2 10V X7R-CERM 01005 E7 MCLK 45_AP_TO_SPKAMP_I2S2_MCLK R16042 1 IREF+ B7 SPKAMP_IREF 1M INT PD 3 ROOM=SPKR_AMP ROOM=SPKR_AMP ROOM=SPKR_AMP C7 ADO (LEFT CONFIG) 4.7UF 20% 6.3V 2 X5R-CERM1 402 SPKAMP_ISENSE_N SPKAMP_ISENSE_P OUT+ D2 OUT- C2 D7 ALIVE NO INT PULLS 100K FERRITE_GND2 NOSTUFF C1640 SPKAMP_VSENSE_N SPKAMP_VSENSE_P ISENSE- F1 ISENSE+ E1 NO INT PULLS 1 1 VSENSE- E3 VSENSE+ E2 NO INT PULLS C C1629 20% 2 6.3V X5R 0201-1 CS35L19B-XWZR-C0 SW XW1611 SHORT-10L-0.1MM-SM 1 2 2 0402 U1601 PIFE25201T-SM 20% 6.3V CERM-X5R 2 0402-9 1 V = 1.0V C= 1UF MIN 1 ROOM=SPKR_AMP 10UF ROOM=SPKR_AMP VA VP ROOM=SPKR_AMP 120OHM-25%-1.8A-0.06DCR ROOM=SPKR_AMP 2.2UF L1604 1.2UH-2.88A-0.082OHM C1632 1 FERRITE_GND1 FL1609 V= VA PIN C= 2.2UF MIN 10% 2 16V X5R-CERM 0201 20% 2 10V X5R-CERM 0603-1 ROOM=SPKR_AMP C1642 F5 PP_BATT_VCC 1 A4 A5 46 45 40 26 25 14 C1603 0402 A1 B1 C1 D1 1 XW1610 SHORT-10L-0.1MM-SM 1 2 ROOM=SPKR_AMP 2 1 26 ROOM=SPKR_AMP FL1606 120OHM-25%-1.8A-0.06DCR 10% 10V X5R 2 01005 C1600 1 1 1000PF 18 C1602 1000PF 10% 10V 2 X5R 01005 10% 2 10V X5R 01005 ROOM=SPKR_AMP ROOM=SPKR_AMP ROOM=SPKR_AMP STROBE DRIVER B B TI: APN 353S3899 ROOM=STROBE 48 39 31 26 23 17 15 14 12 10 52 51 U1602 PP_VCC_MAIN C1686 1 C1687 1 20% 6.3V CERM-X5R 2 0402-9 20% 6.3V CERM-X5R 2 0402-9 10UF ROOM=STROBE 26 LM3564A1TMX 10UF L1605 1UH-3.0A-0.059OHM 1 2 ROOM=STROBE 26 PP_LED_DRV_LX PIFA20161B D1 IN OUT A2 B2 23 LED1 ENABLE INT 200K PD AGND STROBE INT 200K PD AGND TORCH INT 200K PD AGND LED2 TX INT 200K PD AGND SDA SCL TEMP GND AGND A1 B1 23 NOTE: TORCH N/C NC 29 BB_TO_LEDDRV_GSM_BLANK 7 AP_BI_RCAM_I2C_SDA 7 AP_TO_RCAM_I2C_SCL D3 E3 C2 E4 E2 D2 C1 7 AP_TO_LEDDRV_EN RCAM_TO_LEDDRV_STROBE_EN A3 B3 C3 C1694 10UF 20% 6.3V 2 CERM-X5R 0402-9 ROOM=STROBE 1 C1696 10UF 20% 6.3V 2 CERM-X5R 0402-9 ROOM=STROBE SW ROOM=STROBE 23 PP_LED_BOOST_OUT 1 WLCSP A4 B4 C4 D4 E1 PP_STRB_DRIVER_TO_LED_COOL PP_STRB_DRIVER_TO_LED_WARM C1608 1 C1673 100PF 5% 16V NP0-C0G 2 01005 ROOM=STROBE 8 26 8 26 1 100PF 5% 16V NP0-C0G 2 01005 ROOM=STROBE A RCAM_TO_STROBE_NTC 8 SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 PAGE TITLE AUDIO:SPKR AMP,STROBE DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 16 OF 55 SHEET 16 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 TRISTAR2 D D PP_VCC_MAIN A1 P2MM-NSM PP1705 12C ADDRESS: 0011010X 10 12 14 15 16 23 26 31 39 48 51 52 SM PP VCC U1703 LM34904 29 26 15 12 PP3V0_TRISTAR USMD 13 C1700 1.0UF 20% 6.3V 2 X5R 0201-1 C ROOM=TRISTAR 1 C1754 PMU_TO_ACC_SW_ON ACC_PWR A2 B2 ENABLE PP3V3_ACC 12 17 26 PP1V8_SDRAM 0.1UF 1 ROOM=TRISTAR 10% 2 6.3V X5R 01005 20% 4V 2 X5R 01005 C1739 C2 ACC_DET* POK* C1 C GND 0.01UF B1 1 29 26 15 14 13 12 10 4 3 PP3V3_ACC ACC_PWR D5 VDD_3V0 F4 VDD_1V8 F3 ROOM=TRISTAR 12 17 26 ACC_PWR ROOM=TRISTAR U1700 CBTL1610A2UK 9 9 90_CODEC_BI_TRISTAR_MIKEYBUS_P 90_CODEC_BI_TRISTAR_MIKEYBUS_N C3 C4 DIG_DP 90_TRISTAR_BI_BB_USB_P 90_TRISTAR_BI_BB_USB_N A1 B1 USB1_DP USB1_DN 29 BB DEBUG USB BRICK_ID SOC USB 29 13 2 2 ACCESSORY UART 3 3 DEBUG UART 3 3 RX IS WRT SOC (BB TX) --> TX IS WRT SOC (BB RX) <-- B 29 3 29 3 2 P_IN F6 ACC1 C5 ACC2 E5 1.0UF 90_TRISTAR_BI_E75_PAIR2_CONN_P 90_TRISTAR_BI_E75_PAIR2_CONN_N A3 B3 AP_TO_TRISTAR_ACC_UART6_TXD TRISTAR_TO_AP_ACC_UART6_RXD E2 E1 UART0_TX UART0_RX POW_GATE_EN* D6 AP_TO_TRISTAR_DEBUG_UART0_TXD TRISTAR_TO_AP_DEBUG_UART0_RXD F2 F1 UART1_TX UART1_RX SWITCH_EN E4 HOST_RESET B6 BB_TO_AP_UART2_RXD AP_TO_BB_UART2_TXD D2 D1 UART2_TX UART2_RX TRISTAR_TO_AP_JTAG_SWCLK TRISTAR_BI_AP_JTAG_SWDIO A5 B5 JTAG_CLK JTAG_DIO SDA SCL INT BYPASS CON_DET_L E3 F5 C1 A6 C1704 26 DP2 A4 DN2 B4 C2 BRICK_ID PP_TRISTAR_PIN 17 26 PIN FOR HANDSHAKE 1 26 90_TRISTAR_BI_E75_PAIR1_CONN_P 90_TRISTAR_BI_E75_PAIR1_CONN_N TRISTAR_TO_PMU_USB_BRICKID USB0_DP USB0_DN PP_E75_TO_TRISTAR_ACC1 18 PP_E75_TO_TRISTAR_ACC2 18 DP1 A2 DN1 B2 90_AP_BI_TRISTAR_USB0_P 90_AP_BI_TRISTAR_USB0_N DVSS DVSS DVSS 2 WLCSP DIG_DN D3 D4 C6 E6 E75_TO_TRISTAR_CON_DETECT 20% 6.3V 2 X5R 0201-1 18 25 ROOM=TRISTAR 18 25 18 25 ROOM=TRISTAR 18 25 PP1722 SM PP 18 P2MM-NSM TRISTAR_TO_PMU_OVP_SW_EN_L RESET_1V8_L AP_BI_I2C0_SDA 3 13 AP_TO_I2C0_SCL 3 13 TRISTAR_TO_AP_INT TRISTAR_BYPASS 1 14 2 4 13 15 25 15 TRISTAR_TO_PMU_HOST_RESET 13 HOST_RESET ACTIVE HIGH AMBER HAS 100K-300K INT PD B 15 3 13 C1738 1.0UF 20% 6.3V 2 X5R 0201-1 ROOM=TRISTAR 17 26 2 PP_TRISTAR_PIN R1710 1 10K 5% 1/32W MF 01005 2 S REVERSE_GATE 1 0402 CSD68822F4 G Q1701 3 D PP5V0_USB A 12 14 18 25 26 SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 PAGE TITLE IO:TRISTAR2 DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 17 OF 55 SHEET 17 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 DOCKFLEX B2B 5 4 3 2 (USB VBUS, SPEAKER,ANTENNA LAT SW CTRL, MIC1 (PRIMARY MIC), ACC DET/ID/PWR, E75 DIFFPAIRS) 1 MLB: 516S1281 (RCPT) J1817 ROOM=DOCK_B2B FL1881 120-OHM-210MA 9 2 LOWERMIC1_TO_CODEC_N LOWERMIC1_TO_CODEC_N_CONN 01005 1 18 26 14 2 ROOM=DOCK_B2B 2 LOWERMIC1_TO_CODEC_P 1 LOWERMIC1_TO_CODEC_P_CONN 01005 1 26 14 C1890 VIBE_DRIVE_N 1 2 1 01005 ROOM=DOCK_B2B 1 C1834 220PF USB VBUS 10% 25V 2 X7R-CERM 0201 ROOM=DOCK_B2B VIBE_DRIVE_N_CONN 1 C1833 56PF 1 C1812 100PF 5% 5% 25V 25V 2 NP0-C0G-CERM 2 NP0-C0G 01005 01005 ROOM=DOCK_B2B ROOM=DOCK_B2B 1 C1817 0.1UF 10% 25V 2 X5R 0201 PP_CODEC_TO_MIC1_BIAS_CONN 01005 1 18 26 FL1895 120-OHM-210MA 5% 16V 2 NP0-C0G 01005 16 SPEAKER_TO_SPKAMP_VSENSE_P 1 SPEAKER_TO_SPKAMP_VSENSE_P_CONN 2 01005 ROOM=DOCK_B2B 1 ROOM=DOCK_B2B 18 C1849 56PF 5% 16V 2 NP0-C0G 01005 R1801 9 3.3K 2 HPHONE_TO_CODEC_DET 01005 1 5% HPHONE_TO_CODEC_DET_CONN MF 1/32W 1 ROOM=DOCK_B2B 18 16 FL1805 600-OHM-25%-0.28A-0.75OHM 2 CODEC_TO_HPHONE_HS3_CONN 0201 C 18 SPEAKER_TO_SPKAMP_VSENSE_N_CONN 1 01005 1 2 0201 1 ROOM=DOCK_B2B 1 2 DZ1804 6.8V-100PF 2 CODEC_TO_HPHONE_HS4_REF_CONN 0201 1 ROOM=DOCK_B2B 14 19 CODEC_TO_HPHONE_R_CONN 18 CODEC_TO_HPHONE_HS3_REF_CONN 16 CODEC_TO_HPHONE_HS3_CONN 18 LOWERMIC1_TO_CODEC_P_CONN 20 PP_E75_TO_TRISTAR_ACC1_CONN 21 22 23 24 90_TRISTAR_BI_E75_PAIR1_CONN_P 25 26 90_TRISTAR_BI_E75_PAIR1_CONN_N 28 15 17 27 29 30 90_TRISTAR_BI_E75_PAIR2_CONN_N 17 25 32 90_TRISTAR_BI_E75_PAIR2_CONN_P 17 25 18 25 26 35 36 39 40 C1899 1 2 PP_BB_VDD_2V7 0201 1 5% MF DZ1814 01005 100PF 5% 16V NP0-C0G 01005 2 ROOM=DOCK_B2B ROOM=BUTTON 1 120-OHM-210MA DZ1813 29 12V-33PF 2 BB_GPIO0 1 ROOM=DOCK_B2B PP_E75_TO_TRISTAR_ACC1 1 TRISTAR 56PF 1 2 2 C1808 1 56PF ROOM=DOCK_B2B PP_E75_TO_TRISTAR_ACC1_CONN 18 FL1876 25 26 120-OHM-210MA C1871 29 1 BB_GPIO3 2 01005 1 2 5% 2 16V NP0-C0G 01005 ROOM=DOCK_B2B PP_E75_TO_TRISTAR_ACC2_CONN 18 25 26 FL1877 C1872 120-OHM-210MA 100PF 18 5% 16V NP0-C0G 01005 C1805 100PF 29 1 BB_GPIO4 2 BB_GPIO4_CONN 18 01005 ROOM=DOCK_B2B ROOM=DOCK_B2B 5% 2 10V NP0-C0G 01005 B C1806 56PF ROOM=DOCK_B2B PP_E75_TO_TRISTAR_ACC2 BB_GPIO3_CONN 18 1 ROOM=DOCK_B2B FL1853 26 17 C1888 5% 16V 2 NP0-C0G 01005 10-OHM-1.1A ROOM=DOCK_B2B AP_TO_HEADSET_HS4_CTRL_CONN BB_GPIO2_CONN 18 1 ANTENNA 5% 16V NP0-C0G 01005 01005 ROOM=DOCK_B2B 2 01005 ROOM=DOCK_B2B 18 ROOM=DOCK_B2B FL1802 01005 150OHM-25%-200MA-0.7DCR 1 BB_GPIO2 ROOM=DOCK_B2B 5% 16V 2 NP0-C0G 01005 01005 100PF AP_TO_HEADSET_HS4_CTRL 29 C1870 27PF ROOM=DOCK_B2B 5% 10V 2 NP0-C0G 01005 3 1 120-OHM-210MA 25 100PF AP_TO_HEADSET_HS3_CTRL_CONN 1 C1885 5% 2 16V NP0-C0G 01005 10-OHM-1.1A FL1803 ROOM=DOCK_B2B 1 ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE FL1875 FL1854 01005 150OHM-25%-200MA-0.7DCR 3 BB_GPIO0_CONN 18 01005 01005-1 2 E75_TO_TRISTAR_CON_DETECT_CONN 18 1.00K 01005 DZ1807 26 17 2 C1886 ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE 5% 16V NP0-C0G 01005 ROOM=DOCK_B2B 18 NO_XNET_CONNECTION=TRUE 1 C 26 ROOM=DOCK_B2B 01005 2 ROOM=DOCK_B2B AP_TO_HEADSET_HS3_CTRL 12 14 17 18 25 26 PP_BB_VDD_2V7_CONN 18 01005-1 C1802 E75_TO_TRISTAR_CON_DETECT 1/32W 2 6.8V-100PF B PP5V0_USB 1 12V-33PF 5% 16V NP0-C0G 01005 R1830 1 ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE CODEC_TO_HPHONE_HS3_REF_CONN ROOM=DOCK_B2B PP_E75_TO_TRISTAR_ACC2_CONN ROOM=DOCK_B2B 18 17 2 17 25 17 25 34 DZ1809 FL1806 1 18 25 26 18 29 100PF 2 600-OHM-25%-0.28A-0.75OHM CODEC_TO_HPHONE_HS3_REF 18 FL1879 1 01005 9 18 31 6.8V-100PF 2 18 33 SPKAMP_TO_SPEAKER_OUT_CONN_N 18 16 FL1807 1 12 13 ROOM=DOCK_B2B 18 600-OHM-25%-0.28A-0.75OHM CODEC_TO_HPHONE_HS4_REF 10 18 FL1880 01005 2 ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE 9 9 11 D 18 C1850 SPKAMP_TO_SPEAKER_OUT_CONN_P ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE CODEC_TO_HPHONE_HS4_CONN 8 VIBE_DRIVE_P_CONN CODEC_TO_HPHONE_L_CONN 18 120-OHM-210MA 18 16 600-OHM-25%-0.28A-0.75OHM 1 7 16 18 SPEAKER_TO_SPKAMP_VSENSE_N_CONN 5% 16V 2 NP0-C0G 01005 100PF CODEC_TO_HPHONE_HS4 6 56PF FL1804 9 4 ROOM=DOCK_B2B 01005 2 2 SPKAMP_TO_SPEAKER_OUT_CONN_N 5 42 ROOM=DOCK_B2B 6.8V-100PF HEADPHONE PP5V0_USB DZ1803 1 ROOM=DOCK_B2B SPEAKER_TO_SPKAMP_VSENSE_N 2 SPEAKER: LEADS, VSENSE ROOM=DOCK_B2B 1 26 25 18 17 14 12 120-OHM-210MA 5% 16V 2 NP0-C0G 01005 CODEC_TO_HPHONE_HS3 1 3 ROOM=DOCK_B2B FL1866 C1816 56PF 9 HPHONE_TO_CODEC_DET_CONN 18 100PF 56PF VIBE_DRIVE_N_CONN 18 AP_TO_HEADSET_HS4_CTRL_CONN 18 AP_TO_HEADSET_HS3_CTRL_CONN CODEC_TO_HPHONE_HS4_REF_CONN 18 CODEC_TO_HPHONE_HS4_CONN 18 LOWERMIC1_TO_CODEC_N_CONN 10 MIC1_BIASFILT_RET 26 18 PP_CODEC_TO_MIC1_BIAS_CONN 18 BB_GPIO3_CONN 18 BB_GPIO2_CONN 26 18 PP_BB_VDD_2V7_CONN 18 BB_GPIO4_CONN 25 18 E75_TO_TRISTAR_CON_DETECT_CONN 18 BB_GPIO0_CONN C1876 C1855 SPKAMP_TO_SPEAKER_OUT_CONN_P SPEAKER_TO_SPKAMP_VSENSE_P_CONN 18 18 ROOM=DOCK_B2B ROOM=DOCK_B2B 18 16 18 ROOM=DOCK_B2B 18 5% 16V NP0-C0G 01005 ROOM=DOCK_B2B 120-OHM-210MA PP_CODEC_TO_MIC1_BIAS 100PF 5% 16V NP0-C0G 01005 38 37 PP5V0_USB 17 14 12 26 25 18 120-OHM-210MA 18 5% 16V 2 NP0-C0G 01005 FL1855 18 C1875 ROOM=DOCK_B2B 56PF 26 10 1 FL1820 ROOM=DOCK_B2B 2 41 VIBE_DRIVE_P_CONN 2 120-OHM-210MA 9 1 ROOM=DOCK_B2B ACCESSORY: VIBE DRIVE 5% 2 16V NP0-C0G 01005 FL1882 VIBE_DRIVE_P 01005 C1889 56PF LOWER MIC1 (PRIMARY VOICE MIC) F-ST-SM 120-OHM-210MA 1 ROOM=DOCK_B2B D 24-5859-036-201-829 FL1819 1 C1814 56PF 5% 16V 2 NP0-C0G 01005 ROOM=DOCK_B2B ROOM=DOCK_B2B L1801 FERR-33-OHM-0.8A-0.09-OHM 9 CODEC_TO_HPHONE_L 1 2 0201 CODEC_TO_HPHONE_L_CONN 1 ROOM=DOCK_B2B 18 DZ1811 6.8V-100PF 01005 2 ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE CODEC TO HEADPHONE L1802 FERR-33-OHM-0.8A-0.09-OHM A 9 CODEC_TO_HPHONE_R 1 2 0201 ROOM=DOCK_B2B CODEC_TO_HPHONE_R_CONN 18 1 SYNC_MASTER=N61_MLB DZ1810 SYNC_DATE=08/26/2013 PAGE TITLE 6.8V-100PF 01005 IO:DOCK FLEX CONN 2 ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE DRAWING NUMBER Apple Inc. 051-9903 REVISION R XW1813 SM 9 CODEC_MBUS_REF 1 NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 ROOM=DOCK_B2B 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 18 OF 55 SHEET 18 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 COMPASS - AKM COMPASS IN POR LOCATION D D COMPASS CSP: 338S1014 C C PP1V8_OSCAR PP3V0_IMU 12 19 22 26 NOSTUFF NOSTUFF 100PF 5% 16V NP0-C0G 01005 1 C1902 2.2UF 20% 6.3V 2 X5R 0201-1 C1901 100PF 20% 4V 2 X5R 01005 VDD VID U1901 ROOM=COMPASS C1904 0.1UF C4 C1903 1 ROOM=COMPASS B1 26 12 5% 16V NP0-C0G 01005 ROOM=COMPASS ROOM=COMPASS AK8963C CSP 26 22 19 12 D1 CAD0 D2 CAD1 SCL/SK A3 SDA/SI A4 OSCAR_TO_IMU_SPI_SCLK OSCAR_TO_IMU_SPI_MOSI NC C2 TST1 CSB* A2 OSCAR_TO_COMPASS_SPI_CS_L 22 NC B3 RSV SO B4 IMU_TO_OSCAR_SPI_MISO 22 NC C3 TRG DRDY A1 COMPASS_TO_OSCAR_INT 22 PP1V8_OSCAR 22 22 D4 RST* C1 VSS NOSTUFF 1 C1905 56PF 5% 16V 2 NP0-C0G 01005 B ROOM=COMPASS NOSTUFF 1 C1906 56PF 5% 16V 2 NP0-C0G 01005 ROOM=COMPASS NOSTUFF 1 C1907 56PF 5% 16V 2 NP0-C0G 01005 ROOM=COMPASS NOSTUFF 1 C1908 56PF 5% 16V 2 NP0-C0G 01005 B ROOM=COMPASS A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 PAGE TITLE SENSORS:COMPASS DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 19 OF 55 SHEET 19 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 LCD B2B 3 2 THIS ONE ON MLB ---> 516S1164 1 MIPI Common Mode Chokes (N56 HAS A 4TH MIPI LANE ON P. 19). J2019 24-5857-030-001-829 L2044 35 F-ST-SM 31 90-OHM-0.1A-0.7-3GHZ TAM0605 SYM_VER-1 32 Backlight D (N56 HAS A 2ND SET OF BL SIGNALS ON P. 19). 26 25 20 20 FL2024 20 PP_LCM_BL_CAT2_CONN 1 PP_LCM_BL_ANODE 2 PP_LCM_BL_ANODE_CONN 0201-2 1 ROOM=LCM_B2B 20 20 25 26 20 C2017 100PF 5% 2 25V NP0-C0G 01005 20 20 2 3 4 5 90_AP_TO_LCM_MIPI_DATA2_CONN_N 90_AP_TO_LCM_MIPI_DATA2_CONN_P 240-OHM-0.2A-0.8-OHM 26 15 1 90_AP_TO_LCM_MIPI_CLK_CONN_N 90_AP_TO_LCM_MIPI_CLK_CONN_P 90_AP_TO_LCM_MIPI_DATA1_CONN_N 90_AP_TO_LCM_MIPI_DATA1_CONN_P PP_LCM_BL_ANODE_CONN PP_LCM_BL_CAT1_CONN LCD_TO_AP_PIFA_CONN 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 PMU_TO_PHOTON_ALIVE_CONN LCM_TO_AP_HIFA_BSYNC_CONN AP_TO_LCM_RESET_CONN_L LCM_TO_CHESTNUT_PWR_EN_CONN AP_TO_I2C2_SCL_CONN AP_BI_I2C2_SDA_CONN SAGE_TO_TOUCH_VCPL_REF_CONN SAGE_TO_TOUCH_VCPH_REF_CONN PP5V7_LCM_AVDDH_CONN PN5V7_LCM_AVDDN_CONN TOUCH_TO_SAGE_VCM_IN_CONN 20 26 20 90_AP_TO_LCM_MIPI_DATA0_CONN_N 90_AP_TO_LCM_MIPI_DATA0_CONN_P PP1V8_LCM_CONN 4 90_AP_TO_LCM_MIPI_CLK_CONN_P 20 3 90_AP_TO_LCM_MIPI_CLK_CONN_N 20 4 90_AP_TO_LCM_MIPI_DATA0_CONN_P 20 3 90_AP_TO_LCM_MIPI_DATA0_CONN_N 20 D 20 25 26 7 20 25 26 2 90_AP_TO_LCM_MIPI_CLK_N ROOM=LCM_B2B 20 25 L2043 NC ROOM=LCM_B2B 20 1 90_AP_TO_LCM_MIPI_CLK_P 7 90-OHM-0.1A-0.7-3GHZ TAM0605 20 SYM_VER-1 20 7 90_AP_TO_LCM_MIPI_DATA0_P 1 7 90_AP_TO_LCM_MIPI_DATA0_N 2 20 20 20 ROOM=LCM_B2B 20 L2042 90-OHM-0.1A-0.7-3GHZ 20 TAM0605 20 SYM_VER-1 20 26 7 90_AP_TO_LCM_MIPI_DATA1_P 1 4 90_AP_TO_LCM_MIPI_DATA1_CONN_P 20 90_AP_TO_LCM_MIPI_DATA1_N 2 3 90_AP_TO_LCM_MIPI_DATA1_CONN_N 20 20 26 20 7 ROOM=LCM_B2B 33 L2041 90-OHM-0.1A-0.7-3GHZ 34 36 TAM0605 FL2025 SYM_VER-1 240-OHM-0.2A-0.8-OHM 1 PP_LCM_BL_CAT1 26 15 7 2 PP_LCM_BL_CAT1_CONN 0201-2 1 ROOM=LCM_B2B 90_AP_TO_LCM_MIPI_DATA2_P 1 4 90_AP_TO_LCM_MIPI_DATA2_CONN_P 20 90_AP_TO_LCM_MIPI_DATA2_N 2 3 90_AP_TO_LCM_MIPI_DATA2_CONN_N 20 20 25 26 C2018 7 ROOM=LCM_B2B 100PF 5% 25V 2 NP0-C0G 01005 ROOM=LCM_B2B C C Digital Interfaces FL2026 240-OHM-0.2A-0.8-OHM 1 PP_LCM_BL_CAT2 26 15 2 PP_LCM_BL_CAT2_CONN 0201-2 1 ROOM=LCM_B2B Sync/Reset/Debug FL2039 20 25 26 FL2034 120-OHM-210MA C2019 100PF 11 3 2 AP_BI_I2C2_SDA 5% 2 25V NP0-C0G 01005 120-OHM-210MA 1 AP_BI_I2C2_SDA_CONN 01005 1 ROOM=LCM_B2B 20 24 7 2 LCM_TO_AP_HIFA_BSYNC 1 LCM_TO_AP_HIFA_BSYNC_CONN 01005 C2089 1 ROOM=LCM_B2B 56PF 56PF 5% 16V 2 NP0-C0G 01005 ROOM=LCM_B2B 20 C2001 5% 16V 2 NP0-C0G 01005 ROOM=LCM_B2B ROOM=LCM_B2B FL2066 120-OHM-210MA 11 3 2 AP_TO_I2C2_SCL 1 01005 1 ROOM=LCM_B2B AP_TO_I2C2_SCL_CONN 20 LCM_TO_CHESTNUT_PWR_EN_CONN 20 C2090 56PF 5% 16V 2 NP0-C0G 01005 LCM Supplies ROOM=LCM_B2B FL2035 120-OHM-210MA FL2027 80-OHM-0.2A-0.4-OHM 24 23 15 13 12 11 10 7 6 5 3 2 27 26 25 1 PP1V8 15 13 2 PP1V8_LCM_CONN 0201-2 1 ROOM=LCM_B2B C2039 1 10% 6.3V 2 CERM-X5R 0201 2 C2040 56PF Touch 24 FL2036 120-OHM-210MA 7 1 01005-1 PN5V7_LCM_AVDDN_CONN 2 AP_TO_LCM_RESET_L 20 26 AP_TO_LCM_RESET_CONN_L 1 ROOM=LCM_B2B 2 TOUCH_TO_SAGE_VCM_IN ROOM=LCM_B2B C2088 1 2.2UF 2.2UF ROOM=LCM_B2B ROOM=LCM_B2B 20% 6.3V X5R 2 0201-1 20 1 C2000 01005 ROOM=LCM_B2B ROOM=LCM_B2B R2008 ROOM=LCM_B2B ROOM=LCM_B2B 24 SAGE_TO_TOUCH_VCPH_REF 2 0.00 1 80-OHM-0.2A-0.4-OHM 1 C2070 2.2UF 1 20% 6.3V X5R 2 0201-1 ROOM=LCM_B2B C2051 1 2.2UF C2050 2.2UF 20% 6.3V X5R 2 0201-1 ROOM=LCM_B2B 1 20% 6.3V X5R 2 0201-1 ROOM=LCM_B2B 2 SAGE_TO_TOUCH_VCPH_REF_CONN 20 SAGE_TO_TOUCH_VCPL_REF_CONN 20 0% 1/32W MF 01005 FL2037 PP5V7_LCM_AVDDH B 20 C2002 5% 16V 2 NP0-C0G 01005 ROOM=LCM_B2B 26 15 TOUCH_TO_SAGE_VCM_IN_CONN 1 56PF 20% 6.3V X5R 2 0201-1 5% 16V 2 NP0-C0G 01005 1% 1/32W MF 01005 2 5% 16V NP0-C0G 01005 C2087 1 56PF 100K 100PF 2 1 01005 R20521 C2044 1 ROOM=LCM_B2B FL2001 120-OHM-210MA ROOM=LCM_B2B FL2061 PN5V7_SAGE_AVDDN C2093 5% 2 16V NP0-C0G 01005 5% 16V NP0-C0G 01005 70-OHM-300MA 26 24 15 1 ROOM=LCM_B2B ROOM=LCM_B2B ROOM=LCM_B2B 2 1 01005 20 26 100PF 0.1UF B 2 LCM_TO_CHESTNUT_PWR_EN ROOM=LCM_B2B PP5V7_LCM_AVDDH_CONN 0201-2 C2071 1 1 2.2UF 20 26 R2009 C2094 FL2050 100PF 20% 6.3V X5R 2 0201-1 2 5% 16V NP0-C0G 01005 13 PMU_TO_PHOTON_ALIVE ROOM=LCM_B2B ROOM=LCM_B2B 24 SAGE_TO_TOUCH_VCPL_REF 2 0.00 1 120-OHM-210MA 2 PMU_TO_PHOTON_ALIVE_CONN 1 01005 1 ROOM=LCM_B2B 0% 1/32W MF 01005 20 ROOM=LCM_B2B C2095 56PF 5% 16V 2 NP0-C0G 01005 ROOM=LCM_B2B A LCD_TO_AP_PIFA_CONN SYNC_MASTER=N61_MLB 20 25 1 SYNC_DATE=08/26/2013 PAGE TITLE C2058 DISPLAY:FLEX CONN 56PF 5% 16V 2 NP0-C0G 01005 DRAWING NUMBER Apple Inc. ROOM=LCM_B2B 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 20 OF 55 SHEET 20 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 MESA CONNECTOR MLB: 516S1278 J2118 24-5857-016-201-829 21 D 21 21 21 F-ST-SM 21 MESA_TO_BOOST_EN_CONN AP_BI_I2C1_SDA_MESA_CONN BUTTON_TO_AP_MENU_KEY_L_CONN MESA_TO_AP_INT_CONN 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 19 AP_TO_I2C1_SCL_MESA_CONN D 21 PP3V0_MESA_CONN 21 PP16V5_MESA_CONN 21 PP1V8_MESA_CONN 21 AP_TO_MESA_SPI_CLK_CONN 21 AP_TO_MESA_SPI_MOSI_CONN 21 MESA_TO_AP_SPI_MISO_CONN 21 26 26 26 20 22 ROOM=MAMBA_MESA_B2B 13 3 R21602 1 BUTTON_TO_AP_MENU_KEY_L 0.00 C BUTTON_TO_AP_MENU_KEY_L_CONN 21 01005 01005 ROOM=MAMBA_MESA_B2B 1 0201 27PF C ROOM=MAMBA_MESA_B2B NOSTUFF C2167 FL2132 120-OHM-210MA 1 3 AP_TO_MESA_SPI_MOSI 3 AP_TO_MESA_SPI_CLK 2 1 AP_TO_MESA_SPI_MOSI_CONN 21 5.5V-6.2PF 5% 16V 2 NP0-C0G 01005 2 DZ2110 ROOM=MAMBA_MESA_B2B R21632ROOM=MAMBA_MESA_B2B 1 0.00 AP_TO_MESA_SPI_CLK_CONN 01005 ROOM=MAMBA_MESA_B2B 21 01005 FL2150 120-OHM-210MA ROOM=MAMBA_MESA_B2B U2100 26 21 12 LP5907UVX-1.8 DSBGA A1 VIN VOUT A2 PP3V0_MESA 1 26 B1 VEN 1.0UF B2 20% 6.3V 2 X5R 0201-1 ROOM=MESA MESA_TO_AP_SPI_MISO 1 2 PP1V8_MESA_CONN 1 21 AP_BI_I2C1_SDA_MESA_CONN 21 ROOM=MAMBA_MESA_B2B 16 14 3 2 AP_BI_I2C1_SDA 1 C2184 1 100PF 20% 6.3V 2 X5R 0201-1 5% 16V NP0-C0G 01005 2 ROOM=MESA ROOM=MESA ROOM=MAMBA_MESA_B2B 1 FL2156 5% 2 16V 01005 ROOM=MAMBA_MESA_B2B 1 PP16V5_MESA C2103 56PF 70-OHM-300MA 26 25 15 MESA_TO_AP_SPI_MISO_CONN FL2159 120-OHM-210MA MESA SENSOR: 21 26 01005-1 C2181 2 01005 2.2UF GND 3 70-OHM-300MA PP1V8_MESA 1 C2180 FL2133 ROOM=MAMBA_MESA_B2B MESA 1.8V LDO RDAR://15792924 2 PP16V5_MESA_CONN 1 C2100 1 C2126 1 C2198 56PF 56PF 5% 2 16V 01005 5% 2 16V 01005 56PF 5% 16V 2 01005 ROOM=MAMBA_MESA_B2B 21 26 01005-1 1 C2110 ROOM=MAMBA_MESA_B2B ROOM=MAMBA_MESA_B2B ROOM=MAMBA_MESA_B2B 100PF 5% 2 25V NP0-C0G 01005 B B R2166 25 15 1 MESA_TO_BOOST_EN 681 2 1% 1/32W MF 01005 ROOM=MAMBA_MESA_B2B MESA_TO_BOOST_EN_CONN C2116 1 21 ROOM=MAMBA_MESA_B2B 56PF 5% 16V 01005 2 NOTE: 0.45OHM DCR FL2119 70-OHM-300MA 26 21 12 ROOM=MAMBA_MESA_B2B PP3V0_MESA 2 1 C2132 2.2UF 20% 2 6.3V X5R 0201-1 ROOM=MAMBA_MESA_B2B 1 C2133 2.2UF 20% 2 6.3V X5R 0201-1 ROOM=MAMBA_MESA_B2B 1 PP3V0_MESA_CONN 21 1 01005-1 1 C2134 C2105 0.1UF 2.2UF 100PF 20% 2 4V X5R 01005 20% 2 6.3V X5R 0201-1 26 C2119 5% 16V NP0-C0G 01005 ROOM=MAMBA_MESA_B2B ROOM=MAMBA_MESA_B2B ROOM=MAMBA_MESA_B2B R2167 3 681 MESA_TO_AP_INT MESA_TO_AP_INT_CONN C2149 1% 1/32W MF 01005 21 1 56PF 5% 16V NP0-C0G 2 01005 ROOM=MAMBA_MESA_B2B A A ROOM=MAMBA_MESA_B2B PAGE TITLE SENSORS:MESA FLEX CONN FL2179 120-OHM-210MA DRAWING NUMBER 16 14 3 AP_TO_I2C1_SCL AP_TO_I2C1_SCL_MESA_CONN 01005 C2179 ROOM=MAMBA_MESA_B2B 21 Apple Inc. 1 R 56PF 5% 16V NP0-C0G 2 01005 NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED ROOM=MAMBA_MESA_B2B 8 7 6 051-9903 REVISION 5 4 3 2 7.0.0 BRANCH PAGE 21 OF 55 SHEET 21 OF 54 1 SIZE D https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 OSCAR + SENSORS OSCAR VDDIO = 1.8V ALWAYS ON (NEED TO WAKE HOST & RUN PLL) OSCAR CORE = 1.2V ALWAYS ON (NEED TO RUN IN S2RAM) PP1V8_OSCAR PP1V2_OSCAR ROOM=OSCAR 20% 6.3V X5R 2 0201-1 C1 D13 20% 6.3V X5R 2 0201-1 1 0.1UF 20% 4V 2 X5R 01005 ROOM=OSCAR VDDIO VDDC ROOM=OSCAR C2260 PP2201SM P2MM-NSM ROOM=OSCAR PP PP2202SM P2MM-NSM ROOM=OSCAR PP U2201 LPC18B1UK/CPA0-00 ROOM=OSCAR P2MM-NSM ROOM=OSCAR 22 19 22 19 22 22 19 OSCAR_TO_IMU_SPI_SCLK IMU_TO_OSCAR_SPI_MISO OSCAR_TO_IMU_SPI_MOSI OSCAR_TO_GYRO_SPI_CS_L OSCAR_TO_PHOSPHORUS_SPI_CS_L OSCAR_TO_COMPASS_SPI_CS_L NC 26 22 19 12 A7 A5 B6 D9 B4 D7 C5 SPI0_SCK/GPIO0[12] SPI0_MISO/GPIO0[13] SPI0_MOSI/GPIO0[14] SPI0_SSEL0/GPIO0[3] SPI0_SSEL1/GPIO0[18] SPI0_SSEL2/GPIO0[4] SPI0_SSEL3/GPIO0[25] PP1V8_OSCAR ROOM=OSCAR 1 R2254 C 392K IMU_TO_OSCAR_SPI_MISO PP PP1V8_OSCAR C2248 I2C1_SDA/GPIO0[9] E6 I2C1_SCL/GPIO0[17] E8 P2MM-NSM ROOM=OSCAR PP 1 GYRO_TO_OSCAR_INT2 PP2206SM 22 ROOM=GYRO GYRO_TO_OSCAR_INT1 P2MM-NSM ROOM=OSCAR PP VDD 22 C2245 0.1UF 20% 6.3V X5R-CERM 2 01005 20% 6.3V 2 X5R-CERM 01005 ROOM=GYRO ROOM=GYRO 1 C2247 2.2UF 20% 6.3V 2 X5R 0201-1 ROOM=GYRO VDDIO U2203 MPU-6700-12-COMBO NC LGA 22 5 CS 8 FSYNC/GND GYRO_PUMP 14 REGOUT/GND_CAP OSCAR_TO_GYRO_SPI_CS_L NC NC 22 NC NC 7 INT/INT2 GYRO_TO_OSCAR_INT2 D1 C13 NOSTUFF 1 SCL/SPC 2 SDA/SDI 3 SA0/SDO 4 OSCAR_TO_IMU_SPI_SCLK 19 OSCAR_TO_IMU_SPI_MOSI 19 IMU_TO_OSCAR_SPI_MISO 19 DRDY/INT1 6 GYRO_TO_OSCAR_INT1 22 22 22 22 C C2211 0.1UF PMU_TO_OSCAR_RESET_CLK32K_L NOSTUFF 1 1 VSS 1% 1/32W MF 2 01005 13 1 0.1UF PP2205SM 12 19 22 26 19 22 I2C0_SDAP/GPIO0[10] B12 NC I2C0_SCL/GPIO0[11] A1 NC I2C2_SDA/GPIO1[0] C9 I2C2_SCL/GPIO1[1] C7 F7 RESET* P2MM-NSM 15 GND6 29 22 19 F9 U3_TXD/GPIO0[1] F13 U3_RXDGPIO0[2] OSCAR_TO_BB_UART_TXD BB_TO_OSCAR_UART_RXD 29 F1 U2_RXD/GPIO0[5] F3 U2_TXD/GPIO0[6] PP2204SM ROOM=OSCAR D INVENSENSE, APN 338S00017, C2211=0.1UF BOSCH, APN 338S00028, C2211=0.1UF ST, APN 338S00029, C2211=0.01UF,25V 3 22 13 GND5 3 AP_ISP_TO_OSCAR_UART_TXD OSCAR_TO_AP_ISP_UART_RXD OSCAR_BI_AP_TIME_SYNC_HOST_INT 3 22 12 GND4 3 F5 OSCAR_BI_AP_TIME_SYNC_HOST_INT E4 GYRO_TO_OSCAR_INT1 D3 COMPASS_TO_OSCAR_INT 19 A13 GYRO_TO_OSCAR_INT2 22 A3 NC A11 NC D11 NC D5 NC C3 OSCAR_TO_PMU_HOST_WAKE 7 13 B10 AP_BI_OSCAR_SWDIO_1V8 7 B8 AP_TO_OSCAR_SWDCLK_1V8 7 E2 1 AP_TO_OSCAR_UART_TXD 11 GND3 29 E10 U1_RXD/GPIO0[22] F11 U1_TXD/GPIO0[23] OSCAR_TO_RADIO_CONTEXT_A OSCAR_TO_RADIO_CONTEXT_B CLKOUT/GPIO0[0] GPIO0[7] GPIO0[8] NMI/GPIO0[24] GPIO0[26] SWO/GPIO0[27] WDFLAG/GPIO1[2] ALARM1/GPIO1[3] ALARM0/GPIO1[4] SWDIO/GPIO0[19] SWCLK/GPIO0[20] CLK32K/GPIO0[21] PP CARBON (ACCEL GYRO COMBO) 3 22 9 GND1 22 3 29 C11 U0_TXD/GPIO0[15] A9 U0_RXD/GPIO0[16] OSCAR_TO_AP_UART_RXD AP_TO_OSCAR_UART_TXD OSCAR_TO_AP_UART_RXD 1 PP2203SM WLCSP 22 3 1 1 D 1.0UF 12 26 1 1.0UF 1 B2 E12 C2261 0.1UF C2292 20% 2 4V X5R 01005 C2274 16 ROOM=OSCAR 1 10 GND2 26 22 19 12 10% 6.3V 2 CERM-X5R 0201 C2204 ROOM=GYRO 56PF 5% 16V 2 01005 ROOM=OSCAR THIS IS OUTSIDE OF SHIELD IN TO THE RIGHT OF THE NAND PHOSPHORUS PP1V8_OSCAR C2250 1 1 1.0UF 0.1UF 20% 6.3V 2 X5R 0201-1 20% 2 4V X5R 01005 ROOM=PHOSPHORUS ROOM=PHOSPHORUS B 6 8 B 12 19 22 26 C2251 VDD VDDIO U2204 22 19 BMP282AC 3 SDI LGA SDO 5 4 SCK 2 CS* GND OSCAR_TO_IMU_SPI_MOSI 1 7 22 19 OSCAR_TO_IMU_SPI_SCLK IMU_TO_OSCAR_SPI_MISO 1 19 22 C2255 56PF 5% 16V 2 01005 ROOM=PHOSPHORUS NOSTUFF 22 OSCAR_TO_PHOSPHORUS_SPI_CS_L NOSTUFF 1 NOSTUFF C2256 56PF 1 C2241 56PF 5% 2 16V 01005 5% 2 16V 01005 ROOM=PHOSPHORUS ROOM=PHOSPHORUS A NOSTUFF 1 C2201 56PF 5% 2 16V 01005 ROOM=PHOSPHORUS SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 PAGE TITLE SENSORS:OSCAR,CARBON,PHOS,MAGNESIUM DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 22 OF 55 SHEET 22 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 RCAM B2B 6 5 4 3 2 1 (REAR CAMERA CONNECTOR) ROOM=RCAM_B2B FL2329 70-OHM-300MA 16 7 AP_BI_RCAM_I2C_SDA 1 2 AP_BI_RCAM_I2C_SDA_CONN 23 01005-1 C2386 1 90-OHM-0.1A-0.7-3GHZ ROOM=RCAM_B2B TAM0605 D 4 1 THIS ONE ON MLB ---> 516S1174 PLUG 56PF L2334 SYM_VER-1 90_RCAM_TO_AP_MIPI_DATA3_P 7 90_RCAM_TO_AP_MIPI_DATA3_CONN_P 5% 16V 2 NP0-C0G 01005 23 7 90_RCAM_TO_AP_MIPI_DATA3_N 7 90_RCAM_TO_AP_MIPI_DATA2_P 3 2 90_RCAM_TO_AP_MIPI_DATA3_CONN_N 70-OHM-300MA 90-OHM-0.1A-0.7-3GHZ ROOM=RCAM_B2B TAM0605 SYM_VER-1 90_RCAM_TO_AP_MIPI_DATA2_N 7 4 3 16 7 L2333 1 90_RCAM_TO_AP_MIPI_DATA2_CONN_P 2 90_RCAM_TO_AP_MIPI_DATA2_CONN_N ROOM=RCAM_B2B TAM0605 23 1 4 90_RCAM_TO_AP_MIPI_CLK_P 3 90_RCAM_TO_AP_MIPI_CLK_N 90_RCAM_TO_AP_MIPI_CLK_CONN_N 56PF ROOM=RCAM_B2B 7 90_RCAM_TO_AP_MIPI_DATA1_P 1 4 ROOM=RCAM_B2B 23 23 70-OHM-300MA 23 AP_TO_RCAM_SHUTDOWN 1 2 AP_TO_RCAM_SHUTDOWN_CONN 5% 16V 2 NP0-C0G 01005 ROOM=RCAM_B2B ROOM=RCAM_B2B 26 23 23 ROOM=RCAM_B2B 23 FL2328 7 90_RCAM_TO_AP_MIPI_DATA1_N 3 2 90_RCAM_TO_AP_MIPI_DATA1_CONN_N 7 C 7 90_RCAM_TO_AP_MIPI_DATA0_P 90_RCAM_TO_AP_MIPI_DATA0_N 4 3 7 2 23 PP1V8_RCAM_CONN AP_TO_RCAM_SHUTDOWN_CONN 45_AP_TO_RCAM_CLK_CONN RCAM_TO_LEDDRV_STROBE_EN_CONN 1 4 3 6 5 8 7 10 9 12 11 14 13 16 15 18 17 20 19 22 21 24 23 26 25 28 27 30 29 32 31 34 33 38 37 90_RCAM_TO_AP_MIPI_DATA3_CONN_P 90_RCAM_TO_AP_MIPI_DATA3_CONN_N 90_RCAM_TO_AP_MIPI_DATA2_CONN_P 90_RCAM_TO_AP_MIPI_DATA2_CONN_N 90_RCAM_TO_AP_MIPI_CLK_CONN_P 90_RCAM_TO_AP_MIPI_CLK_CONN_N 90_RCAM_TO_AP_MIPI_DATA1_CONN_P 90_RCAM_TO_AP_MIPI_DATA1_CONN_N 90_RCAM_TO_AP_MIPI_DATA0_CONN_P 90_RCAM_TO_AP_MIPI_DATA0_CONN_N 23 23 23 23 23 23 23 23 23 23 23 45_AP_TO_RCAM_CLK 1 2 45_AP_TO_RCAM_CLK_CONN 01005 L2336 1 PP1V2_RCAM_CONN 120-OHM-210MA 90-OHM-0.1A-0.7-3GHZ ROOM=RCAM_B2B TAM0605 SYM_VER-1 26 23 56PF 5% 1/32W MF 01005 2 23 23 AP_BI_RCAM_I2C_SDA_CONN AP_TO_RCAM_I2C_SCL_CONN C2394 1 100K 90_RCAM_TO_AP_MIPI_DATA1_CONN_P PP_RCAM_AF_CONN 01005-1 R23411 23 L2338 SYM_VER-1 26 23 5% 16V 2 NP0-C0G 01005 90-OHM-0.1A-0.7-3GHZ ROOM=RCAM_B2B TAM0605 2 23 C2387 FL2330 90_RCAM_TO_AP_MIPI_CLK_CONN_P 2 AP_TO_RCAM_I2C_SCL_CONN 1 7 7 2 01005-1 L2337 SYM_VER-1 7 1 AP_TO_RCAM_I2C_SCL RCAM: DIGITAL I/F (I2C,CTRL,CLK) 23 90-OHM-0.1A-0.7-3GHZ RCAM: 4-LANE MIPI F-ST-SM 35 36 FL2331 23 D RCAM_B2B J2321 AA21-S034VA1 ROOM=RCAM_B2B ROOM=RCAM_B2B 90_RCAM_TO_AP_MIPI_DATA0_CONN_P 23 90_RCAM_TO_AP_MIPI_DATA0_CONN_N 23 1 23 26 23 PP2V85_RCAM_AVDD_CONN C2384 56PF 5% 2 16V NP0-C0G 01005 ROOM=RCAM_B2B C ROOM=RCAM_B2B FL2322 120-OHM-210MA 16 RCAM_TO_LEDDRV_STROBE_EN 1 2 01005 RCAM_TO_LEDDRV_STROBE_EN_CONN 1 23 C2300 56PF 5% 16V 2 NP0-C0G 01005 ROOM=RCAM_B2B ROOM=RCAM_B2B FL2343 10-OHM-750MA 26 23 11 1 PP2V85_CAM_VDD 2 PP2V85_RCAM_AVDD_CONN 01005-1 C2363 1 20% 6.3V X5R 0201-1 2 2.2UF C2303 1 0.07 OHMS 1 100PF 0.1UF 20% 2 6.3V X5R-CERM 01005 ROOM=RCAM_B2B 23 26 C2304 2 ROOM=RCAM_B2B 5% 16V NP0-C0G 01005 RCAM/FCAM AVDD RAIL EXT. LDO: ROOM=RCAM_B2B L2329 FERR-22-OHM-1A-0.055OHM 20 15 13 12 11 10 7 6 5 3 2 27 26 25 24 23 1 PP1V8 2 PP_RCAM_AF_CONN 0201 1 C2323 1 20% 6.3V X5R 0201-1 2 NOTE: USING PP1V8 FOR N61 AND BUCK6 FOR N56. 2 23 26 C2393 2.2UF B 100PF 5% 16V NP0-C0G 01005 ROOM=RCAM_B2B EXTERNAL LDO: ROOM=RCAM_B2B U2301 L2330 48 39 31 26 17 16 15 14 12 10 52 51 FERR-33OHM-25%-0.5A-0.07OHM-DCR 26 12 4 2 1 PP1V2_SDRAM 2 PP1V2_RCAM_CONN 23 1 26 ROOM=RCAM_B2B C2389 1.0UF 20% 6.3V X5R 2 0201-1 2.2UF 20% 6.3V X5R 0201-1 ROOM=RCAM_B2B 1 1 2 2 C2305 1 20% 6.3V X5R 0201-1 2 ROOM=RCAM_B2B ROOM=RCAM_B2B 20% 2 6.3V X5R 0201-1 C2392 100PF 2.2UF C2301 2.2UF 0201 C2302 1 PP_VCC_MAIN LP5907UVX2.925-S DSBGA VOUT A2 A1 VIN ROOM=RCAM_B2B B1 VEN GND B2 B RCAM: POWER: (1.8V DVDD) (2.8V AVDD) (1.2V VCC) (1.8V/2V AF) ROOM=RCAM_B2B ROOM=RCAM_B2B 5% 16V NP0-C0G 01005 PP2V85_CAM_VDD 11 1 23 26 C2345 2.2UF 20% 2 6.3V X5R 0201-1 ROOM=RCAM_B2B ROOM=RCAM_B2B 7 CAM_EXT_LDO_EN ROOM=RCAM_B2B L2318 FERR-22-OHM-1A-0.055OHM 20 15 13 12 11 10 7 6 5 3 2 27 26 25 24 23 1 PP1V8 2 PP1V8_RCAM_CONN 23 26 0201 C2390 1 1 100PF 1.0UF 20% 6.3V X5R 2 0201-1 ROOM=RCAM_B2B C2395 2 5% 16V NP0-C0G 01005 ROOM=RCAM_B2B A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 PAGE TITLE CAMERA:REAR FLEX CONN DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 23 OF 55 SHEET 23 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 6 5 4 3 26 20 15 26 24 15 C2414 Touch (B2B, Driver ICs) 10UF 24 24 24 24 24 24 24 24 24 24 24 24 SAGE_TO_CUMULUS_IN<11> SAGE_TO_CUMULUS_IN<4> SAGE_TO_CUMULUS_IN<5> SAGE_TO_CUMULUS_IN<3> SAGE_TO_CUMULUS_IN<1> SAGE_TO_CUMULUS_IN<2> SAGE_TO_CUMULUS_IN<0> SAGE_TO_CUMULUS_IN<9> SAGE_TO_CUMULUS_IN<8> SAGE_TO_CUMULUS_IN<6> SAGE_TO_CUMULUS_IN<10> SAGE_TO_CUMULUS_IN<7> C2417 1 2 220PF B9 B8 A9 B7 B6 A8 B5 B4 A7 B3 A6 A3 A5 A4 B2 A2 IN0_0 IN1_0 IN2_0 IN3_0 IN4_0 IN5_0 IN6_0 IN7_0 IN8_0 IN9_0 IN10_0 IN11_0 IN12_0 IN13_0 IN14_0 IN14_1 AP_TO_TOUCH_SPI_CS_L TOUCH_TO_AP_INT_L AP_TO_TOUCH_SPI_CLK AP_TO_TOUCH_SPI_MOSI TOUCH_TO_AP_SPI_MISO_R E4 F1 D3 D2 E1 H_CS* H_INT* H_SCLK H_SDI H_SDO TOUCH_I2C_SDA PP1V8_GRAPE C4 C3 E2 C6 10V X7R-CERM 10% 01005 C2418 2 1 10% 01005 C2419 2 10% 01005 C2420 2 10% 01005 C2421 2 10% 01005 C2422 2 10V X7R-CERM C2427 1 C2428 1 220PF 10V X7R-CERM 10V X7R-CERM 1 1 220PF 10V X7R-CERM 10V X7R-CERM 1 C2426 220PF 10V X7R-CERM 10V X7R-CERM 1 1 220PF 10V X7R-CERM 10V X7R-CERM 1 C2425 C2429 1 220PF 10V X7R-CERM 10% 01005 C2430 1 10V X7R-CERM C 24 220PF 10% 01005 2 220PF 10% 01005 2 220PF 10% 01005 2 220PF 10% 01005 2 220PF 10% 01005 2 220PF 10% 01005 NC NC NC 45_PROX_TO_CUMULUS_RX_IN 24 3 7 R2403 3 2 C_IN0 C_IN1 C_IN2 C_IN3 C_IN4 C_IN5 C_IN6 C_IN7 C_IN8 C_IN9 C_IN10 C_IN11 10.2 2 1 TOUCH_TO_AP_SPI_MISO 24 3 3 1% 1/32W MF 01005 24 26 24 12 24 24 3 7 VDDIO U2401 CUMULUS-C1 WLBGA 20% 6.3V 2 X5R 0201-1 VDDLDO A1 C5 F4 VDDH C8 VDDCORE C1 VDDANA B1 1.0UF Follow Touch routing guidelines Cumulus sense nets are sensitive AP_TO_TOUCH_SPI_CLK P2MM-NSM E9 E5 F7 E6 E7 F8 G9 D6 D7 D8 F9 D5 F6 F5 G4 E8 G8 G7 G6 G5 G1 D4 F2 F3 TM_ACS* C2 TM_OVR G3 24 LCM_TO_AP_HIFA_BSYNC PP 7 20 24 24 24 TP_CUMULUS_GPIO P2MM-NSM NC NC NC NC NC 24 CUMULUS_TO_MESON_VSTM_OUT_N PP PP2411SM P2MM-NSM CUMULUS_TO_MESON_VSTM_OUT_P PP 24 24 PP2412SM P2MM-NSM CUMULUS_TO_MESON_VSTM_OUT_P CUMULUS_TO_MESON_VSTM_OUT_N 24 45_AP_TO_TOUCH_CLK32K_RESET_L PP 3 24 24 24 24 24 24 NC NC NC NC NC NC NC NC NC NC NC NC NC 24 24 24 24 24 24 24 C2439 1 LCM_TO_AP_HIFA_BSYNC_BUFF CUMULUS_TO_SAGE_BOOST_CLK_EN PP1V8_GRAPE 24 20% 4V X5R 2 01005 24 R2405 24 24 0.1UF 12 24 26 TP_CUMULUS_GPIO 24 CUMULUS_TO_PROX_RX_EN_1V8 TOUCH_I2C_SCL 24 24 20 7 NC NC 220K 5% 1/32W MF 01005 2 No decoupling on previous designs PP1V8_GRAPE 26 24 26 24 PP_SAGE_VBST_OUTH PN_SAGE_VBST_OUTL PP_SAGE_LX PP_SAGE_LY R24071 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 26 24 24 A 24 24 24 50 TOUCH_TO_SAGE_SENSE_IN<6> TOUCH_TO_SAGE_SENSE_IN<9> TOUCH_TO_SAGE_SENSE_IN<8> OIC_RIGHT_NET 3 2A CUMULUS_TO_PROX_TX_EN_1V8_L 24 R2488 24 1 LCM_TO_AP_HIFA_BSYNC_BUFF 2Y 4 GND 24 255K 2MF CUMULUS_TO_PROX_TX_EN_BUFF 11 1 R2406 AGND1 100K Meson decoupling 26 24 Tantalums solved singing caps issue. Validate issue is resolved with Meson and replace with 0402 ceramics. 24 24 24 C2438 1 C2410 1 20% 20V 2 TANT 0402 24 26 24 PP_SAGE_TO_TOUCH_VCPH_CONN 0.00 2 1 24 26 24 15 10% 25V X7R-CERM 2 0201 PP_SAGE_TO_TOUCH_VCPH 24 26 26 24 24 R2411 24 24 26 24 24 PN_SAGE_TO_TOUCH_VCPL_CONN 0.00 2 1 R2495 24 26 1 26 24 12 PN_SAGE_TO_TOUCH_VCPL R2420 1.8K 0% 1/32W MF 01005 255K 2MF 5% 1/32W MF 2 01005 24 24 MESON_TO_TOUCH_GUARD_CONN 24 1 0.00 2 24 MESON_TO_TOUCH_GUARD 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 C 24 24 R2435 0.00 0.00 0% 1/32W MF 2 01005 0% 1/32W MF 01005 2 GO F8 MESON_TO_TOUCH_GUARD AVDDL G2 VDDIO_OSC J1 VDDIO N3 VDDIO K1 NC NC NC 1 PN_SAGE_TO_TOUCH_VCPL_FILT 24 B Meson VCPL rail: Effective impedance of 3 Ohms, at 115 kHz with 12 V bias. PN_SAGE_TO_TOUCH_VCPL 2 1 C2490 1000PF 1 C2408 24 26 C2441 1 1UF 20% 25V 2 X5R 0402-3 5% 25V 2 NP0-C0G 01005 C2411 1 C2405 2.2UF 100PF 2 0.1UF 10% 16V 2 X6S-CERM 0402 10% 16V 2 X5R-CERM 0201 10% 25V X7R-CERM 2 0201 1 L2401 1.8K 5% 1/32W MF 2 01005 10UH-20%-0.23A-1.56OHM 24 20 TOUCH_I2C_SDA TOUCH_I2C_SCL SAGE_TO_TOUCH_VCPH_REF SAGE_TO_TOUCH_VCPL_REF C2436 1 0.01UF 10% 6.3V X5R 2 01005 26 24 PP_SAGE_LX 2 1 PP_SAGE_LY 24 26 PSB1614FE C2437 1 0.01UF 10% 6.3V X5R 2 01005 SYNC_MASTER=N/A SYNC_DATE=N/A PAGE TITLE TOUCH:CUMULUS,MESON DRAWING NUMBER 11 45_PROX_TO_CUMULUS_RX_CONN C2401 R2402 1000PF 1 2 45_PROX_TO_CUMULUS_RX_C 7 6 22.1K2 1% 1/32W MF 01005 10% 6.3V X5R-CERM 01005 5 26 24 1 45_PROX_TO_CUMULUS_RX_IN 1 C2416 24 26 24 1 0.01UF 5% 16V 2 NP0-C0G 01005 3 051-9903 REVISION R C2440 1 1.0UF 10% 25V X5R-CERM 2 0201 4 Apple Inc. PP_SAGE_TO_TOUCH_VCPH PN_SAGE_VCPL_F C2404 27PF 20 1 R2434 R2421 1% 1/20W MF 0201 49 24 1 24 20 R2433 24 1 TOUCH_TO_MESON_VCM_IN0 TOUCH_TO_MESON_VCM_IN1 FL2486 PN_SAGE_VBST_OUTL 20% 25V TANT 0603-LLP2 1 24 26 24 TOUCH_TO_SAGE_VCM_IN F4 N1 F5 K5 N6 VCM_IN_0 E4 VCM_IN_1 J5 01005-1 1UF-10OHM PP1V8_GRAPE N10 AUX_PLDO_OUT N5 AUX_NLDO_OUT N4 PP5V7_SAGE_AVDDH C2407 I2C pull-ups D 24 A1 B4 A10 B3 C3 F6 F10 H1 H2 H3 H4 10-OHM-750MA 1 0% 1/32W MF 01005 24 CUMULUS_TO_MESON_VSTM_OUT_P CUMULUS_TO_MESON_VSTM_OUT_N AUX_BUF_IN M4 AUX_BUF_OUT M5 1000PF 0.33UF 26 24 R2412 24 24 PP_SAGE_VBST_OUTH 24 Optical prox filter 8 K3 I2C_SLV_ADDR0 K2 I2C_SLV_ADDR1 01005 1% 1/32W TOUCH_TO_SAGE_SENSE_IN<1> TOUCH_TO_SAGE_SENSE_IN<2> TOUCH_TO_SAGE_SENSE_IN<4> SAGE_TO_TOUCH_VCPH_REF SAGE_TO_TOUCH_VCPL_REF PN_SAGE_TO_TOUCH_VCPL_FILT PP_SAGE_TO_TOUCH_VCPH PN_SAGE_VCPL_F 24 5% 1/32W MF 2 01005 01005 1% 1/32W SAGE_TO_TOUCH_VSTM_OUT<3> SAGE_TO_TOUCH_VSTM_OUT<2> SAGE_TO_TOUCH_VSTM_OUT<4> SAGE_TO_TOUCH_VSTM_OUT<5> SAGE_TO_TOUCH_VSTM_OUT<0> SAGE_TO_TOUCH_VSTM_OUT<1> SAGE_TO_TOUCH_VSTM_OUT<12> SAGE_TO_TOUCH_VSTM_OUT<14> SAGE_TO_TOUCH_VSTM_OUT<16> SAGE_TO_TOUCH_VSTM_OUT<18> SAGE_TO_TOUCH_VSTM_OUT<22> SAGE_TO_TOUCH_VSTM_OUT<23> PN_SAGE_TO_TOUCH_VCPL_CONN OIC_LEFT_NET 1Y 6 2 TOUCH_TO_SAGE_SENSE_IN<7> 2 TOUCH_TO_SAGE_SENSE_IN<10> 4 TOUCH_TO_SAGE_SENSE_IN<11> 6 8 SAGE_TO_TOUCH_VSTM_OUT<6> 10 SAGE_TO_TOUCH_VSTM_OUT<7> 12 SAGE_TO_TOUCH_VSTM_OUT<8> 14 SAGE_TO_TOUCH_VSTM_OUT<9> 16 SAGE_TO_TOUCH_VSTM_OUT<10>18 SAGE_TO_TOUCH_VSTM_OUT<11>20 SAGE_TO_TOUCH_VSTM_OUT<13>22 SAGE_TO_TOUCH_VSTM_OUT<15>24 SAGE_TO_TOUCH_VSTM_OUT<17>26 SAGE_TO_TOUCH_VSTM_OUT<19>28 SAGE_TO_TOUCH_VSTM_OUT<20>30 SAGE_TO_TOUCH_VSTM_OUT<21>32 SAGE_TO_TOUCH_VSTM_OUT<0> 34 PP_SAGE_TO_TOUCH_VCPH_CONN36 38 TOUCH_TO_SAGE_SENSE_IN<0> 40 TOUCH_TO_SAGE_SENSE_IN<3> 42 TOUCH_TO_SAGE_SENSE_IN<5> 44 MESON_TO_TOUCH_GUARD_CONN 46 26 24 26 24 1 1A LCM_TO_AP_HIFA_BSYNC 24 20 7 24 24 26 24 74AUP2G3404GN SOT1115 F-ST-SM 47 24 20 U2403 AA21-S046VA1 48 24 20 VCC PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG A2 PLDO_SUP_IN B1 VBST_OUTH E1 VBST_OUTL C1 LX D1 LY F1 NLDO_SUP_IN B2 VCPH_REF_EN F2 VCPL_REF_EN G1 VCPL A3 VCPH E2 VCPL_F C2 5% 1/32W MF 01005 2 J2401 B 5 100K 24 NC DRV_IN P L6 DRV_IN N K6 I2C_SDA I2C_SCL TEST_MUX0 TEST_MUX1 TEST_MUX2 TESTMODE BSYNC/SCAN_RESET SCAN CLK SCANOUT STEP_CLK/SCAN_IN GCM BOOST_EN/SCAN_EN LCM_TO_AP_HIFA_BSYNC G7 SAGE_TO_TOUCH_VSTM_OUT<22> H7 SAGE_TO_TOUCH_VSTM_OUT<16> J6 SAGE_TO_TOUCH_VSTM_OUT<15> J7 SAGE_TO_TOUCH_VSTM_OUT<17> K7 SAGE_TO_TOUCH_VSTM_OUT<12> L7 SAGE_TO_TOUCH_VSTM_OUT<14> M7 SAGE_TO_TOUCH_VSTM_OUT<8> N7 SAGE_TO_TOUCH_VSTM_OUT<2> G8 SAGE_TO_TOUCH_VSTM_OUT<21> H8 SAGE_TO_TOUCH_VSTM_OUT<0> J8 SAGE_TO_TOUCH_VSTM_OUT<13> K8 SAGE_TO_TOUCH_VSTM_OUT<1> L8 SAGE_TO_TOUCH_VSTM_OUT<5> M8 SAGE_TO_TOUCH_VSTM_OUT<4> N8 SAGE_TO_TOUCH_VSTM_OUT<6> K9 SAGE_TO_TOUCH_VSTM_OUT<10> G9 SAGE_TO_TOUCH_VSTM_OUT<23> H9 SAGE_TO_TOUCH_VSTM_OUT<18> J9 SAGE_TO_TOUCH_VSTM_OUT<20> G10 SAGE_TO_TOUCH_VSTM_OUT<19> L9 SAGE_TO_TOUCH_VSTM_OUT<9> M9 SAGE_TO_TOUCH_VSTM_OUT<7> N9 SAGE_TO_TOUCH_VSTM_OUT<3> K10 SAGE_TO_TOUCH_VSTM_OUT<11> H10 NC J10 NC L10 DRV_OUT27 M10 NC J2 J3 G5 H5 L3 M3 M1 M2 L2 L1 K4 L4 R24101 26 24 12 SNS_OUT0 SNS_OUT1 SNS_OUT2 SNS_OUT3 SNS_OUT4 SNS_OUT5 SNS_OUT6 SNS_OUT7 SNS_OUT8 SNS_OUT9 SNS_OUT10 SNS_OUT11 SNS_OUT12 SNS_OUT13 SNS_OUT14 TOUCH_I2C_SDA TOUCH_I2C_SCL CUMULUS_TO_SAGE_BOOST_CLK_EN 26 24 CSP VBIAS 11 24 MESON-A1 D3 NC NC NC NC 5% 1/32W MF 01005 DRV_OUT0 DRV_OUT1 DRV_OUT2 DRV_OUT3 DRV_OUT4 DRV_OUT5 DRV_OUT6 DRV_OUT7 DRV_OUT8 DRV_OUT9 DRV_OUT10 DRV_OUT11 DRV_OUT12 DRV_OUT13 DRV_OUT14 DRV_OUT15 DRV_OUT16 DRV_OUT17 DRV_OUT18 DRV_OUT19 DRV_OUT20 DRV_OUT21 DRV_OUT22 DRV_OUT23 DRV_OUT24 DRV_OUT25 DRV_OUT26 U2402 SAGE_VBIAS 100K NC 26 24 MLB APN : 516S1086 (Receptacle) Flex APN: 516S1087 (Plug) E6 D6 C6 B6 A4 A6 A8 B8 C8 D8 E8 B10 C10 NC D10 NC E10 SAGE_TO_CUMULUS_IN<7> SAGE_TO_CUMULUS_IN<9> SAGE_TO_CUMULUS_IN<10> SAGE_TO_CUMULUS_IN<8> SAGE_TO_CUMULUS_IN<11> SAGE_TO_CUMULUS_IN<2> SAGE_TO_CUMULUS_IN<4> SAGE_TO_CUMULUS_IN<3> SAGE_TO_CUMULUS_IN<1> SAGE_TO_CUMULUS_IN<0> SAGE_TO_CUMULUS_IN<6> SAGE_TO_CUMULUS_IN<5> NC C7 C9 G2 Touch B2B NC NC NC 24 GND Radars for XW rdar://12773579 rdar://12611242 24 24 E3 BCFG_RTCK D1 CLKIN/RESET* D9 RSTOVR* CUMULUS_TO_PROX_TX_EN_1V8_L 45_AP_TO_TOUCH_CLK32K_RESET_L AP_TO_TOUCH_RESET_L 24 3 24 24 PP2408 PP PP2410SM VSTM_0 VSTM_1 VSTM_2 VSTM_3 VSTM_4 VSTM_5 VSTM_6 VSTM_7 VSTM_8 VSTM_9 VSTM_10 VSTM_11 VSTM_12 VSTM_13 VSTM_14 VSTM_15 VSTM_16 VSTM_17 VSTM_18 VSTM_19 D2 D4 F3 G6 G3 24 P2MM SM 1 GPIO_1/CK GPIO_2/SD GPIO_3 GPIO_4 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS 24 PP2404 PP PP2405SM C2403 3 24 SNS_IN0 SNS_IN1 SNS_IN2 SNS_IN3 SNS_IN4 SNS_IN5 SNS_IN6 SNS_IN7 SNS_IN8 SNS_IN9 SNS_IN10 SNS_IN11 SNS_IN12 SNS_IN13 SNS_IN14 DGND DGND 1 4.7UF AP_TO_TOUCH_SPI_CS_L PP E5 D5 C5 B5 A5 A7 A9 B7 C7 D7 E7 B9 C9 D9 E9 AGND5 20% 6.3V X5R-CERM1 2 402 MESON A1 J4 N2 C2433 1 20% 6.3V X5R-CERM1 2 402 4.7UF 24 TOUCH_TO_SAGE_SENSE_IN<7> TOUCH_TO_SAGE_SENSE_IN<9> TOUCH_TO_SAGE_SENSE_IN<10> TOUCH_TO_SAGE_SENSE_IN<8> TOUCH_TO_SAGE_SENSE_IN<11> TOUCH_TO_SAGE_SENSE_IN<2> TOUCH_TO_SAGE_SENSE_IN<4> TOUCH_TO_SAGE_SENSE_IN<3> TOUCH_TO_SAGE_SENSE_IN<1> TOUCH_TO_SAGE_SENSE_IN<0> TOUCH_TO_SAGE_SENSE_IN<6> TOUCH_TO_SAGE_SENSE_IN<5> G4 C2432 1 20% 10V X5R-CERM 2 0402-8 10UF 24 P2MM SM 1 12 24 26 24 24 AGND4 AGND4 AGND4 C2402 1 PP2403 PP1V8_GRAPE CUMULUS_TO_SAGE_BOOST_CLK_EN PP P2MM SM 1 F9 H6 M6 PP_CUMULUS_VDDANA P2MM SM 1 AGND3 AGND3 26 20% 6.3V 2 X5R-CERM 01005 E3 L5 D 0.1UF 20% 10V X5R-CERM 2 0402-8 AVDDH1 AVDDH2 AVDDH3 AVDDH4 AVDDH5 PP2402 PP_CUMULUS_VDDCORE 10UF 2 3 5 6 7 10 11 12 13 15 20 23 25 26 27 C2415 1 APN: 343S0694 PP5V1_GRAPE_VDDH 26 1 Touch probe points APN: 343S0638 Turn on is later than PP1V8_GRAPE Turn off is same time as PP1V8_GRAPE 1 PP1V8 C2409 1 20% 10V X5R-CERM 2 0402-8 Cumulus 26 15 2 PN5V7_SAGE_AVDDN PP5V7_SAGE_AVDDH AGND2 AGND2 7 C4 F7 8 20% 16V X5R-CERM 2 0201 NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 7.0.0 BRANCH PAGE 24 OF 55 SHEET 24 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 BATT CONN, TPS, STANDOFFS/SHIELDS/FIDUCIALS POWER TP TP2501 1 PP5V0_USB 26 18 17 14 12 A TP-P6 D 46 45 40 26 25 16 14 THIS ONE ON MLB ---> 1 C2560 1 100PF C2549 PP_BATT_VCC J2523 RCPT-BATT-2BLADES-0.90 120-OHM-210MA 2 25 BATTERY_SWI_CONN 01005 1 POWER GROUND TP-P6 26 21 15 TP2570 1 PP16V5_MESA A TP-P55 12 14 ROOM=BATTERY_B2B 1 2 C2579 1 3 5 6 7 9 10 13 46 45 40 26 25 16 14 C2575 1 5% 16V NP0-C0G 01005 1 220PF TP2539 VBAT A PP_BATT_VCC TP2513 5% 16V 2 NP0-C0G 01005 ROOM=BATTERY_B2B E75 - USB/UART/ID/POWER TP-P55 C2522 56PF 10% 2 10V X7R-CERM 01005 ROOM=BATTERY_B2B 2 4 14 16 25 26 40 45 46 C2509 100PF FL2511 1 A ROOM=BATTERY_B2B F-SM-SM 14 11 12 ROOM=BATTERY_B2B D TP2569 1 MESA_TO_BOOST_EN TP-P55 XW2512 ROOM=BATTERY_B2B ROOM=BATTERY_B2B BATTERY_SWI PCB: PLACE XW2512 AT BATT CONN, PIN 7 SHORT-10L-0.25MM-SM 2 1 CHARGER_VBATT_SNS 5% 16V 2 NP0-C0G-CERM 01005 5% 16V 2 NP0-C0G-CERM 01005 ROOM=BATTERY_B2B 14 A 516S1239 RCPT 33PF 15PF 5% 16V 2 NP0-C0G 01005 TP2512 C2550 1 MOJAVE TP VBUS 21 15 BATTERY CONN PP_BATT_VCC TESTPOINTS A TP-P6 TP2545 ROOM=BATTERY_B2B A BATTERY_SWI_CONN 25 18 17 90_TRISTAR_BI_E75_PAIR1_CONN_P TP-P55 8 TP2521 A TP-P55 56PF 5% 16V 2 NP0-C0G 01005 ROOM=BATTERY_B2B 1 18 17 C2561 90_TRISTAR_BI_E75_PAIR1_CONN_N 10% 10V 2 X7R-CERM 01005 18 17 90_TRISTAR_BI_E75_PAIR2_CONN_P ROOM=BATTERY_B2B 13 PMU_TO_TP_AMUX_AY TP2506 1 A TP-P55 A TP2523 1 A TP-P55 ANALOG MUX A OUTPUT 18 17 C TP2522 1 TP-P55 SUPER TP 220PF 90_TRISTAR_BI_E75_PAIR2_CONN_N TP2524 1 A C TP-P55 13 FIDUCIALS PMU_TO_TP_AMUX_BY TP2507 1 A TP-P55 COWLING SHIELDS ANALOG MUX B OUTPUT 26 18 A TP-P55 RESET FD2501 FID TP2526 PP_E75_TO_TRISTAR_ACC1_CONN 26 18 TP2527 1 PP_E75_TO_TRISTAR_ACC2_CONN A TP-P55 RETENTION-COAX-N61 0P5SM1P0SQ-NSP 1 SH2501 OMIT_TABLE SM 806-8537 FD2502 FID CL2501 806-8699 SM 17 15 13 4 2 RESET_1V8_L TP2508 1 A TP-P55 SHLD-EMI-UPPER-FRONT-N61 0P5SM1P0SQ-NSP TP2535 A TP IS TO HELP WITH USB SI H6P & BB RESET TP-P55 IN THE FACTORY FIXTURE. 1 FD2503 SH2502 FID SM 0P5SM1P0SQ-NSP OMIT_TABLE DFU SH2505 806-8538 SHLD-SNOUT-1-N61 1 18 E75_TO_TRISTAR_CON_DETECT_CONN A TP-P55 FOR DIAGS SM SHLD-EMI-LOWER-FRONT-N61 FD2504 1 NORTH_AC_GND_SCREW 8 25 29 2 FID 3 FORCE_DFU TP2509 1 A TP-P55 0P5SM1P0SQ-NSP SH2503 1 SM 806-00230 FD2505 FID LCM BACKLIGHT FORCE DFU PP2510 P4MM CKPLUS_WAIVE=TERMSHORTED 806-7014 SM PP PP1V8 15 13 12 11 10 7 6 5 3 2 27 26 24 23 20 26 20 TP2518 1 LCD BACKLIGHT SINK1 A PP_LCM_BL_CAT1_CONN SHLD-EMI-UPPER-EXT-N61 0P5SM1P0SQ-NSP TP-P55 1 CL2502 TH-NSP FD2506 FID B TP2510 1 SH2504 0P5SM1P0SQ-NSP SM 1 26 20 TP2519 1 PP_LCM_BL_CAT2_CONN A OMIT_TABLE 806-00424 TP-P55 SL-1.20X0.40-1.50X0.70-NSP SHLD-N61-EMI-LOWER-BACK-TALL 26 20 TP2520 1 PP_LCM_BL_ANODE_CONN A TP-P55 LCD BACKLIGHT SINK2 B LCD BACKLIGHT SOURCE OMIT_TABLE SH2506 806-8541 SM 20 TP2517 1 LCD_TO_AP_PIFA_CONN A LCD PIFA TEST POINT TP-P55 SHLD-EMI-SA-N61 860-3948 SCREW HOLES + STANDOFFS BS2503 860-7862 29 25 8 STDOFF-MLB-UNPLATED-0.85-N61-SM BS2512 STDOFF-2.70OD1.84ID-0.88H-TH NORTH_AC_GND_SCREW 1 BS2511 BS2510 STDOFF-2.6OD0.5H-0.5-1.7-TH 29 A 50_AP_UAT_FEED 1 860-8396 STDOFF-2.2OD0.25H-0.50-1.70 29 50_AP_WIFI_5G_CONN_ANT 860-7846 C2510 220PF 10% 2 10V X7R-CERM 01005 ROOM=ASSEMBLY 1 C2511 56PF 5% 2 16V NP0-C0G 01005 ROOM=ASSEMBLY 1 C2501 4.7PF +/-0.1PF 16V 2 NP0-C0G 01005 ROOM=ASSEMBLY 1 C2523 220PF 10% 10V 2 X7R-CERM 01005 ROOM=ASSEMBLY SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 PAGE TITLE 860-3948 BS2501 STDOFF-MLB-UNPLATED-0.85-N61-SM 860-3948 BS2502 BS2504 STDOFF-2.55OD1.4ID-0.99H-SM STDOFF-MLB-UNPLATED-0.85-N61-SM 29 AP_TO_STOCKHOLM_ANT POWER:BATT CONN,TPS,PD FEATURES BS2509 STDOFF-2.70OD1.84ID-0.88H-TH 860-7861 DRAWING NUMBER Apple Inc. 860-7862 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 25 OF 55 SHEET 25 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 VOLTAGE PROPERTIES I55 I56 D I57 I58 I60 I59 I61 VOLTAGE=3.3V VOLTAGE=1.8V VOLTAGE=3.0V VOLTAGE=3.0V VOLTAGE=3.0V VOLTAGE=3.0V VOLTAGE=3.0V PP3V3_USB 2 12 PP1V8_VA_L19_L67 10 12 16 PP3V0_TRISTAR 12 15 17 29 PP3V0_IMU 12 19 PP3V0_NAND 6 12 PP3V3_ACC 12 17 PP3V0_PROX_ALS 11 12 I1 I2 I4 I5 I7 I8 I64 I65 I67 I66 I68 I70 VOLTAGE=4.6V VOLTAGE=1.0V VOLTAGE=3.0V VOLTAGE=1.8V VOLTAGE=3.0V VOLTAGE=1.1V VOLTAGE=1.1V I69 PP_VCC_MAIN 10 12 14 48 51 52 PP1V0 7 12 PP3V0_PROX_IRLED 11 12 PP1V8_ALWAYS 3 5 12 14 PP3V0_MESA 12 21 PP_CPU 4 12 PP_GPU 4 12 15 16 17 23 31 39 I10 I11 I12 I13 I16 VOLTAGE=5.0V VOLTAGE=5.0V PP_LED_DRV_LX PP_LED_BOOST_OUT VOLTAGE=2.9V PP2V9_LDO9 I71 I72 I73 I77 I76 I75 I74 I78 I79 I80 C I81 I82 I83 I87 I86 I85 VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.2V PP1V2_SDRAM PP1V8_SDRAM PP1V8 PP1V8_GRAPE PP1V8_OSCAR PP1V2_NAND_VDDI 2 4 12 23 I143 VOLTAGE=1.8V VOLTAGE=22.0V VOLTAGE=-5.7V VOLTAGE=5.7V PP1V8_LCM_CONN PP_LCM_BL_ANODE_CONN PN5V7_LCM_AVDDN_CONN PP5V7_LCM_AVDDH_CONN VOLTAGE=1.8V VOLTAGE=16.5V PP1V8_MESA PP16V5_MESA_CONN VOLTAGE=5.0V PP_TRISTAR_PIN I89 I90 I91 I92 VOLTAGE=5.0V VOLTAGE=5.0V PN5V7_SAGE_AVDDN PP1V2_OSCAR PP3V0_MESA_CONN PP6V0_LCM_BOOST PP_STRB_DRIVER_TO_LED_WARM PP_STRB_DRIVER_TO_LED_COOL 18 17 18 18 25 20 20 25 20 20 21 21 17 2 3 5 6 7 10 11 12 13 15 20 23 24 25 27 12 24 12 19 22 6 VOLTAGE=1.8V PP_EXTMIC_BIAS_FILT_IN 10 VOLTAGE=1.8V BOARD_ID2 3 27 VOLTAGE=1.2V PP1V2 2 4 5 11 VOLTAGE=5.0V PP_E75_TO_TRISTAR_ACC1_CONN 18 25 VOLTAGE=5.0V PP_E75_TO_TRISTAR_ACC1 17 18 VOLTAGE=22.0V PP_LCM_BL_ANODE 15 20 VOLTAGE=0.2V PP_LCM_BL_CAT2 15 20 VOLTAGE=0.2V PP_LCM_BL_CAT1 15 20 VOLTAGE=0.2V PP_LCM_BL_CAT2_CONN 20 25 VOLTAGE=0.2V PP_LCM_BL_CAT1_CONN 20 25 VOLTAGE=-5.7V VOLTAGE=1.2V VOLTAGE=3.0V VOLTAGE=6V D 12 3 4 10 12 13 14 15 17 29 I20 VOLTAGE=1.2V VOLTAGE=1.8V PP1V2_RCAM_CONN PP1V8_RCAM_CONN I21 23 23 12 I23 I24 I25 I26 I27 I28 I30 I29 I88 16 VOLTAGE=1.8V PP_CODEC_TO_MIC1_BIAS_CONN VOLTAGE=4.6V PP_E75_TO_TRISTAR_ACC2 VOLTAGE=4.6V PP_E75_TO_TRISTAR_ACC2_CONN I17 VOLTAGE=1.2V VOLTAGE=1.8V 16 VOLTAGE=3.0V PP2V85_CAM_VDD 11 VOLTAGE=1.8V PP2V85_RCAM_AVDD_CONN 23 VOLTAGE=1.8V PP_CUMULUS_VDDCORE 24 VOLTAGE=1.2V PP_CUMULUS_VDDANA 24 VOLTAGE=13.5V PP_SAGE_TO_TOUCH_VCPH_CONN 24 VOLTAGE=-12V PN_SAGE_TO_TOUCH_VCPL_CONN 24 VOLTAGE=13.5V PP_SAGE_TO_TOUCH_VCPH 24 VOLTAGE=-12V PN_SAGE_TO_TOUCH_VCPL 24 23 C 15 20 24 12 22 I33 21 I35 15 VOLTAGE=-12V VOLTAGE=5.7V VOLTAGE=17.0V PN_SAGE_VCPL_F PP_SAGE_LX PP_SAGE_LY I34 8 16 8 16 I96 I38 VOLTAGE=1.8V VOLTAGE=14V 24 24 24 PP_PMU_VREF PP_SAGE_VBST_OUTH 13 24 I37 I40 I93 I97 I98 I99 I100 I101 I103 I140 I104 B I106 I105 I107 I108 I109 I110 I111 I113 I112 I114 I116 I115 I117 I118 I120 I119 I121 I122 I126 I124 I125 I123 I127 I128 I129 I130 A I131 I132 I133 I134 I136 I135 I137 I138 VOLTAGE=1.8V PP_CODEC_TO_MIC1_BIAS 10 18 VOLTAGE=1.8V PP_EXTMIC_BIAS_IN 10 VOLTAGE=1.8V PP_EXTMIC_BIAS_FILT 10 PP_CODEC_TO_FRONTMIC3_BIAS 10 11 VOLTAGE=1.8V PP_CODEC_TO_REARMIC2_BIAS VOLTAGE=1.8V 8 10 VOLTAGE=1.8V PP_CODEC_FILT+ 10 VOLTAGE=2.2V PP_CODEC_SPKR_VQ 10 VOLTAGE=2.5V PP_CODEC_VCPFILT- 10 VOLTAGE=2.5V PP_CODEC_VCPFILT+ 10 VOLTAGE=2.5V PP_CODEC_VHP_FLYN 10 VOLTAGE=0.2V PP_CODEC_VHP_FLYC 10 VOLTAGE=2.5V PP_CODEC_VHP_FLYP 10 VOLTAGE=1.8V PP1V8_FCAM_CONN 11 VOLTAGE=3.0V PP2V85_FCAM_AVDD_CONN 11 VOLTAGE=1.8V PP_CODEC_TO_FRONTMIC3_BIAS_CONN 11 PP3V0_ALS_CONN 11 VOLTAGE=3.0V VOLTAGE=1.2V PP1V2_FCAM_VDDIO_CONN 11 VOLTAGE=5.0V PP5V0_USB 12 14 17 18 VOLTAGE=5.0V PP5V0_USB_TO_PMU 12 VOLTAGE=4.6V PP_BUCK5_LX0 12 VOLTAGE=4.6V PP_BUCK3_LX 12 VOLTAGE=4.6V PP_BUCK4_LX 12 VOLTAGE=4.6V PP_BUCK2_LX 12 VOLTAGE=4.6V PP_BUCK1_LX1 12 VOLTAGE=4.6V PP_BUCK1_LX0 12 VOLTAGE=4.6V PP_BUCK0_LX3 12 VOLTAGE=4.6V PP_BUCK0_LX2 12 VOLTAGE=4.6V PP_BUCK0_LX1 12 VOLTAGE=4.6V PP_BUCK0_LX0 12 PP_CHESTNUT_LXP 15 VOLTAGE=6.0V VOLTAGE=6.0V PP_CHESTNUT_CP 15 VOLTAGE=6.0V PP_CHESTNUT_CN 15 VOLTAGE=5.7V PP5V7_SAGE_AVDDH 15 24 VOLTAGE=5.7V PP5V7_LCM_AVDDH 15 20 VOLTAGE=5.1V PP5V1_GRAPE_VDDH 15 24 VOLTAGE=22.0V PP_WLED_LX 15 VOLTAGE=18.0V PP18V0_MESA_SW 15 VOLTAGE=17.0V P17V0_MOJAVE_LDOIN 15 VOLTAGE=16.5V PP16V5_MESA 15 21 25 PP_SPKAMP_SW 16 VOLTAGE=8.0V VOLTAGE=8.0V PP_L19_VBOOST 16 VOLTAGE=1.8V PP_SPKAMP_FILT 16 VOLTAGE=1.8V PP_SPKAMP_LDO_FILT 16 I41 I42 I43 I44 I46 I48 VOLTAGE=5.0V PP_TIGRIS_VBUS_DET VOLTAGE=2.5V VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=4.6V VOLTAGE=1.8V VOLTAGE=3.0V PP_BATT_VCC PP1V8_MESA_CONN PP3V0_PROX_CONN I47 I50 VOLTAGE=1.0V PP0V95_FIXED_SOC VOLTAGE=1.0V PP0V95_FIXED_SOC_PCIE I51 I53 I54 I141 I147 I154 I153 I155 4 7 12 7 PP1V2_PLL 12 VOLTAGE=1.0V PP_VAR_SOC 5 12 2 VOLTAGE=5.0V PMID_CAP VOLTAGE=5.0V VOLTAGE=4.6V CHARGER_LDO CHG_BOOT VOLTAGE=4.6V CHG_LX 14 VOLTAGE=3.0V VIBE_DRIVE_P 14 18 VOLTAGE=3.0V VIBE_DRIVE_N 14 18 I150 B 11 PP_BUCK5_LX1 I149 I152 21 VOLTAGE=1.0V I148 I151 14 16 25 40 45 46 VOLTAGE=1.2V I52 25 14 PP1V8_PLL PP_MIPIOD_VREG BOARD_ID0 PP_PMU_VDD_REF 13 PP_EXTMIC_BIAS 10 PP1V8_XTAL 2 PP_PMU_VDD_RTC 13 14 14 14 VOLTAGE=1.8V PP_RCAM_AF_CONN 23 VOLTAGE=-14.0V PN_SAGE_VBST_OUTL 24 VOLTAGE=-12.0V PN_SAGE_TO_TOUCH_VCPL_FILT 24 VOLTAGE=2.7V PP_BB_VDD_2V7_CONN 18 A PAGE TITLE SYSTEM:VOLTAGE PROPERTIES DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST 8 7 6 5 051-9903 REVISION 4 3 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 7.0.0 BRANCH PAGE 26 OF 55 SHEET 26 OF 54 1 SIZE D https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 N61 SPECIFIC D D C C BOOTSTRAPPING (BOARD_REV, BOARD_ID, BOOT_CFG) BOARD_REV[3:0]={GPIO34, GPIO35, GPIO36, GPIO37} FLOAT=LOW, PULLUP=HIGH 1111 PROTOMLB1 1110 PROTOMLB2 1101 PROTO1 1100 PROTO2 1011 EVT 1010 EVT SPLIT CARBON DOE 1001 CARRIER BUILD <--- SELECTED 1000 DVT B 3 BOARD_REV3 3 BOARD_REV0 I6 PP1V8 I13 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 MAKE_BASE=TRUE NOSTUFF BOARD_REV2 3 R0374 1ROOM=SOC 2 01005 26 3 BOARD_ID2 MF 5% R0324 1ROOM=SOC 2 01005 MF 5% 1.00K 1/32W B 1.00K 1/32W BOARD_ID[4:0]={GPIO29, GPIO16, SPIO0_MISO, SPI0_MOSI, SPI0_SCLK} FLOAT=LOW, PULLUP=HIGH 00100 N56, T133 MLB 00101 N56 DEV 00110 FIJI N61 MLB <--- SELECTED 3 BOARD_ID1 R0325 1ROOM=SOC 2 01005 MF 3 BOOT_CONFIG1 5% 1.00K 1/32W I11 BOOT_CONFIG[2:0]={GPIO28, GPIO25, GPIO18} FLOAT=LOW, PULLUP=HIGH 000 SPI0 001 SPI0 TEST MODE 010 NAND 011 NAND TEST MODE 100 NVME 101 NVME TEST MODE 111 FAST SPI <--- SELECTED A A PAGE TITLE SYSTEM:N61 SPECIFIC DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST 8 7 6 5 4 3 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 7.0.0 BRANCH PAGE 27 OF 55 SHEET 27 OF 54 1 SIZE D https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 D D C C B B A A PAGE TITLE BLANK DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST 8 7 6 5 4 3 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 7.0.0 BRANCH PAGE 28 OF 55 SHEET 28 OF 54 1 SIZE D https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 RADIO_MLB HIERARCHICAL SYMBOL D POWER POWER I314 PP1V8_SDRAM 26 17 15 14 13 12 10 4 3 I315 VCC_MAIN, VBAT GOES TO RADIO_MLB DIRECTLY CHECK ALL PAGES IN RF SIDE! AP_TO_RADIO_ON_L 3 BB_TO_AP_RESET_DET_L 13 3 3 13 3 16 3 PMU_TO_BB_RST_L AP_TO_BB_RST_L RADIO_ON_L 13 30 32 13 30 32 3 13 I329 I328 I331 MAKE_BASE=TRUE I330 MAKE_BASE=TRUE I332 MAKE_BASE=TRUE MAKE_BASE=TRUE AP_WAKE_MODEM MAKE_BASE=TRUE BB_WAKE_HOST_L BB_TO_AP_GPS_SYNC 13 30 35 RF_PMIC_RESET_L BB_RST_L AP_TO_BB_WAKE_MODEM BB_TO_AP_IPC_GPIO BB_TO_LEDDRV_GSM_BLANK 30 32 BB_RESET_DET_L BB_TO_PMU_HOST_WAKE_L 2 3 3 C 3 50_AP_BI_BB_HSIC1_DATA 50_AP_BI_BB_HSIC1_STB AP_TO_BB_HOST_RDY BB_TO_AP_DEVICE_RDY BB_TO_AP_IPC_GPIO1 I368 I369 MAKE_BASE=TRUE I371 MAKE_BASE=TRUE I370 MAKE_BASE=TRUE I372 MAKE_BASE=TRUE MAKE_BASE=TRUE 3 AP_TO_BB_UART2_RTS_L BB_TO_AP_UART2_CTS_L BB_IPC_GPIO GSM_TXBURST_IND 17 3 AP_TO_BB_UART2_TXD 17 3 BB_TO_AP_UART2_RXD PMU_TO_BT_REG_ON AP_TO_BT_WAKE BT_TO_PMU_HOST_WAKE CLK32K_AP WLAN_REG_ON MAKE_BASE=TRUE 30 51 30 51 HOST_WAKE_WLAN 30 51 BT_REG_ON WAKE_BT 30 51 HOST_WAKE_BT 30 51 51 30 35 AP_TO_WLAN_JTAG_SWCLK AP_TO_WLAN_JTAG_SWDIO 13 WLAN_TO_PMU_PCIE_WAKE_L 3 AP_TO_WLAN_DEVICE_WAKE 7 90_WLAN_TO_AP_PCIE1_RXDP_P 7 90_WLAN_TO_AP_PCIE1_RXDP_N 7 90_AP_TO_WLAN_PCIE1_TXDP_P 7 90_AP_TO_WLAN_PCIE1_TXDP_N 7 90_AP_TO_WLAN_PCIE1_REFCLK1_P 7 90_AP_TO_WLAN_PCIE1_REFCLK1_N 7 WLAN_TO_AP_PCIE1_CLKREQ_L 7 AP_TO_WLAN_PCIE1_RST_L 3 3 30 34 30 34 BB_HOST_RDY BB_DEVICE_RDY 30 35 30 35 BB_IPC_GPIO1 I373 I376 I374 MAKE_BASE=TRUE I375 MAKE_BASE=TRUE WLAN_TO_PMU_HOST_WAKE I316 I317 I318 MAKE_BASE=TRUE I319 MAKE_BASE=TRUE I320 MAKE_BASE=TRUE I321 MAKE_BASE=TRUE MAKE_BASE=TRUE 35 50_BB_HSIC_DATA 50_BB_HSIC_STROBE 35 BB_UART_CTS_L BB_UART_RTS_L MAKE_BASE=TRUE 45_PMU_TO_WLAN_CLK32K PMU_TO_WLAN_REG_ON 35 BB_GPS_SYNC MAKE_BASE=TRUE 53 30 35 UART IPC 3 52 54 RFFE_VIO_S2R 35 HSIC IPC 2 51 WLAN/BT HOUSE KEEPING 13 I325 I324 MAKE_BASE=TRUE I326 MAKE_BASE=TRUE I327 MAKE_BASE=TRUE MAKE_BASE=TRUE PP_STOCKHOLM_1V8_S2R I407 CELLULAR HOUSE KEEPING 3 D PP_WL_BT_VDDIO_AP MAKE_BASE=TRUE 30 35 30 35 BB_UART_RXD 30 35 BB_UART_TXD 30 35 I333 I334 I335 MAKE_BASE=TRUE I336 MAKE_BASE=TRUE I337 MAKE_BASE=TRUE I340 MAKE_BASE=TRUE I338 MAKE_BASE=TRUE I339 MAKE_BASE=TRUE I342 MAKE_BASE=TRUE I341 MAKE_BASE=TRUE I344 MAKE_BASE=TRUE I343 MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE WLAN_JTAG_SWDCLK WLAN_JTAG_SWDIO WLAN_PCIE_WAKE_L 30 51 30 51 30 51 PCIE_DEV_WAKE 90_WLAN_PCIE_TDP 90_WLAN_PCIE_TDN 90_WLAN_PCIE_RDP 90_WLAN_PCIE_RDN 90_WLAN_PCIE_REFCLK_P 90_WLAN_PCIE_REFCLK_N WLAN_PCIE_CLKREQ_L WLAN_PCIE_PERST_L 30 51 30 51 C 30 51 30 51 30 51 51 51 30 51 30 51 AUDIO I2S I377 I378 I379 MAKE_BASE=TRUE I380 MAKE_BASE=TRUE 45_AP_TO_BB_I2S3_BCLK MAKE_BASE=TRUE BB_I2S_CLK MAKE_BASE=TRUE 3 AP_TO_BB_I2S3_DOUT BB_TO_AP_I2S3_DIN BB_I2S_RXD BB_I2S_TXD 3 AP_TO_BB_I2S3_LRCLK 3 3 35 WLAN HSIC IPC 30 35 30 35 BB_I2S_WS 30 35 OSCAR UART 22 22 OSCAR_TO_BB_UART_TXD BB_TO_OSCAR_UART_RXD I382 I381 MAKE_BASE=TRUE MAKE_BASE=TRUE BB_OTHER_RXD BB_OTHER_TXD 30 35 B I384 I387 I386 MAKE_BASE=TRUE I388 MAKE_BASE=TRUE MAKE_BASE=TRUE BB_CORE_DUMP MAKE_BASE=TRUE 17 PMU_TO_BB_VBUS_DET 90_TRISTAR_BI_BB_USB_N BB_USB_VBUS 90_BB_USB_N 17 90_TRISTAR_BI_BB_USB_P 18 BB_GPIO0 18 BB_GPIO2 BB_GPIO3 18 BB_GPIO4 18 I389 I390 MAKE_BASE=TRUE I391 MAKE_BASE=TRUE I392 MAKE_BASE=TRUE I394 MAKE_BASE=TRUE MAKE_BASE=TRUE 3 AP_TO_BT_UART1_RTS_L MAKE_BASE=TRUE BT_UART_CTS_L BT_TO_AP_UART1_CTS_L AP_TO_BT_UART1_TXD MAKE_BASE=TRUE BT_UART_RTS_L BT_UART_RXD 30 35 3 13 13 13 I395 RADIO_TO_PMU_ADC_PP_LDO11_VDDIO MAKE_BASE=TRUEI396 I398 RADIO_TO_PMU_ADC_PP_LDO5_SIM MAKE_BASE=TRUE I397 RADIO_TO_PMU_ADC_SMPS4 MAKE_BASE=TRUE MAKE_BASE=TRUE BT_TO_AP_UART1_RXD 90_BB_USB_P 30 34 PP_LDO14_RFSW 31 41 42 BB_LAT_GPIO0 3 45_AP_TO_BT_I2S1_BCLK AP_TO_BT_I2S1_DOUT 3 BT_TO_AP_I2S1_DIN 3 AP_TO_BT_I2S1_LRCLK BB_LAT_GPIO2 BB_LAT_GPIO3 35 BB_LAT_GPIO4 35 22 ADC_PP_LDO11 ADC_PP_LDO5 ADC_SMPS4 30 3 30 3 30 3 30 3 13 7 I410 50_WIFI_5G_CONN_ANT 3 50 25 25 A 29 26 17 15 12 25 8 50_AP_UAT_FEED 50_UPPER_ANT_FEED 50 I411 ANT_GND 50 I404 PAC_VDD_3V0 53 I412 NORTH_ANT_GND 50 UAT_ANT_GND MAKE_BASE=TRUE PP3V0_TRISTAR MAKE_BASE=TRUE NORTH_AC_GND_SCREW MAKE_BASE=TRUE I354 MAKE_BASE=TRUE I353 MAKE_BASE=TRUE I355 MAKE_BASE=TRUE I356 MAKE_BASE=TRUE B BT_PCM_CLK BT_PCM_IN 51 51 BT_PCM_OUT 51 BT_PCM_SYNC 51 OSCAR_TO_RADIO_CONTEXT_A OSCAR_TO_RADIO_CONTEXT_B I358 I357 MAKE_BASE=TRUE OSCAR_CONTEXT_A 51 MAKE_BASE=TRUE OSCAR_CONTEXT_B 51 STOCKHOLM ADC_SMPS1 MAKE_BASE=TRUE I409 30 51 OSCAR STATES 35 29 26 17 15 12 MAKE_BASE=TRUE 30 51 35 UPPER RADIO ANTENNA CONTROL 50_AP_WIFI_5G_CONN_ANT BT_UART_TXD 51 51 BT AUDIO PCM 30 34 7 25 I349 I352 I351 MAKE_BASE=TRUE I350 MAKE_BASE=TRUE 30 34 FCT TESTING RADIO_TO_PMU_ADC_SMPS1 30 51 BT UART IPC 22 13 30 51 3 AP_TO_WLAN_UART4_RTS_L 3 PP_BB_VDD_2V7 30 51 MAKE_BASE=TRUE 30 35 RADIO ANTENNA CONTROL 18 30 51 WLAN_UART_CTS_L 3 WLAN_TO_AP_UART4_CTS_L 3 AP_TO_BB_COREDUMP WLAN_UART_RXD WLAN_UART_RTS_L MAKE_BASE=TRUE 3 3 WLAN_UART_TXD I347 I346 MAKE_BASE=TRUE MAKE_BASE=TRUE AP_TO_WLAN_UART4_TXD BB DEBUG INTERFACES 13 I345 I348 WLAN_TO_AP_UART4_RXD 3 3 I359 STOCKHOLM_RTS_L I360 STOCKHOLM_CTS_L I361 STOCKHOLM_UART_TXD MAKE_BASE=TRUE I363 STOCKHOLM_UART_RXD MAKE_BASE=TRUE I362 STOCKHOLM_FW_DWLD_REQ MAKE_BASE=TRUE I364 MAKE_BASE=TRUE STOCKHOLM_HOST_WAKE I365 MAKE_BASE=TRUE STOCKHOLM_ENABLE I366 MAKE_BASE=TRUE STOCKHOLM_VDD_MUX_3V0 I367 STOCKHOLM_SIM_SEL MAKE_BASE=TRUE I406 MAKE_BASE=TRUE STOCKHOLM_ANT STOCKHOLM_TO_AP_UART3_CTS_L MAKE_BASE=TRUE AP_TO_STOCKHOLM_UART3_RTS_L MAKE_BASE=TRUE STOCKHOLM_TO_AP_UART3_RXD AP_TO_STOCKHOLM_UART3_TXD AP_TO_STOCKHOLM_DWLD_REQ STOCKHOLM_TO_PMU_HOST_WAKE AP_TO_STOCKHOLM_EN PP3V0_TRISTAR AP_TO_STOCKHOLM_SIM_SEL AP_TO_STOCKHOLM_ANT 30 52 30 52 30 52 30 52 52 30 52 52 54 54 52 A PAGE TITLE CELL:ALIASES DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE 8 7 6 5 4 3 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART REQUESTIV ALL RIGHTS RESERVED 2 7.0.0 BRANCH PAGE 30 OF 55 SHEET 29 OF 54 1 SIZE D https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 AP INTERFACE & DEBUG CONNECTORS PROBE POINTS PP3105_RF PP3121_RF P2MM SM 1 CLK32K_AP PP D 29 51 WIFI_BT SM 35 51 PP WIFI_BT PP3114_RF PP 1 BB_COEX_UART_TXD P2MM-NSM SM 1 PP 35 51 WIFI_BT P2MM SM 1 PP 29 51 P2MM-NSM SM 1 BT_UART_RXD PP P2MM-NSM SM 1 PP 29 51 P2MM-NSM SM 1 PP P2MM 1 WAKE_BT STOCKHOLM_RTS_L P2MM SM 1 PP PP3153_RF P2MM SM 1 WLAN_REG_ON PP PP3104_RF SM 52 PP PP3174_RF P4MM PP3154_RF P4MM SM 1 BT_REG_ON PP SM PP STOCKHOLM_SIM_SWP PP P4MM SM P2MM SM 1 HOST_WAKE_WLAN PP PP 29 51 WIFI_BT 1 REF_CLK_FROM_BB PP SM PP 29 51 WIFI_BT 1 DSDS_SIM_CLK SM 1 WLAN_PCIE_PERST_L PP WIFI_BT DSDS_SIM_RESET 29 34 SM PP 1 SM PP 1 29 35 BB_OTHER_RXD 29 35 RF_DEBUG SIM_DEBUG C P4MM SM 1 BB_RST_L PP 29 34 29 32 SIM_DEBUG PP3151_RF P4MM SM 1 90_BB_USB_P PP P4MM SM 1 BOOT_HSIC PP 29 34 SIM_DEBUG 30 35 SIM_DEBUG DSDS_SIM_DATA 34 54 DSDS_SIM_DETECT 34 TABLE_ALT_HEAD SIM_DEBUG 29 51 WIFI_BT PP3187_RF PP3160_RF PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION REF DES COMMENTS: 197S0565 197S0593 ALTERNATE Y3301_RF KDS 19.2MHZ XTAL 197S0598 197S0593 ALTERNATE Y3301_RF AVX 19.2MHZ XTAL 138S00005 138S00003 ALTERNATE C3216_RF 15UF CAPACITOR 138S0739 138S0706 ALTERNATE C4207_RF 1.0UF CAPACITOR 138S0945 138S0706 ALTERNATE C4207_RF 1.0UF CAPACITOR 138S1103 138S0719 ALTERNATE C4007_RF 4.7UF CAPACITOR 339S0231 339S0228 ALTERNATE U5201_RF CORONA MODULE USI P4MM P2MM SM 1 WLAN_UART_RTS_L PP SM PP 29 51 WIFI_BT TABLE_ALT_ITEM 1 PP_LDO6 31 33 54 SIM_DEBUG TABLE_ALT_ITEM PP3188_RF PP3161_RF P4MM P2MM SM 1 WLAN_UART_CTS_L PP SM PP 29 51 TABLE_ALT_ITEM 1 DSDS_SIM_SWP 54 SIM_DEBUG WIFI_BT TABLE_ALT_ITEM PP3162_RF PP3189_RF P2MM P4MM SM 1 WLAN_UART_RXD 29 51 PP WIFI_BT TABLE_ALT_ITEM 1 DSDS_SIM_DATA_R 54 TABLE_ALT_ITEM SIM_DEBUG PP3163_RF PP_LDO11 39 38 37 35 34 33 31 30 P2MM SM 1 WLAN_UART_TXD PP TABLE_ALT_ITEM PP_3178_RF 29 51 P2MM-NSM SM 1 WIFI_BT P2MM BB_SIM_RESET WLAN_JTAG_SWDCLK 339S0228 ALTERNATE U5201_RF CORONA MODULE TDK 155S0950 ALTERNATE F_TRI_RF TRIPLEXER BIN2 BB_SIM_CLK 30 35 BB_SIM_DATA 30 35 35 30 P2MM-NSM SM 1 PP 35 35 RADIO_BB 1 1 R3102_RF R3103_RF R3104_RF 10K 10K 10K 1% 1/32W MF 01005 2 PP_3180_RF 29 51 WIFI_BT RADIO_BB 1 TABLE_ALT_ITEM P2MM-NSM SM 1 PP 29 51 WIFI_BT P2MM SM 1 WLAN_JTAG_SWDIO PP 339S0242 155S00024 30 35 PP_3179_RF PP3191_RF RADIO_BB TABLE_ALT_ITEM PP PP3190_RF 1 1 BB_RESET_DET_L P4MM P4MM SM 1 PCIE_DEV_WAKE PP PP P4MM SM 1 PP PP3186_RF PP3159_RF B 29 35 PP3179_RF SIM_DEBUG 29 51 WIFI_BT SM BB_OTHER_TXD RF_DEBUG 29 35 SIM_DEBUG P4MM P2MM SM 1 WLAN_PCIE_CLKREQ_L PP PP 1 BB_WAKE_HOST_L PP3150_RF PP3140_RF 32 34 SIM_DEBUG P4MM SM 1 PP PP3184_RF PP3158_RF SM PP SIM_DEBUG 29 35 PP3178_RF P4MM SM 1 BB_USB_VBUS SIM_DEBUG P4MM SM 1 SPMI_CLK PP 34 54 SIM_DEBUG PP BB_I2S_TXD RF_DEBUG 29 35 SIM_DEBUG PP3149_RF P4MM SM 1 90_BB_USB_N PP 32 34 PP3112_RF 1 29 51 PP SIM_DEBUG P4MM P2MM 29 35 SIM_DEBUG PP3139_RF P4MM SM 1 SPMI_DATA PP 34 54 SIM_DEBUG PP3183_RF PP3157_RF 29 32 SIM_DEBUG 1 BB_GPS_SYNC P4MM SM 1 BB_CORE_DUMP P4MM SM 1 RADIO_ON_L PP3111_RF P4MM P2MM SM 1 WLAN_PCIE_WAKE_L PP PP PP PP3148_RF PP3138_RF P4MM SM 32 52 PP3165_RF PP3156_RF 30 31 33 34 35 37 38 39 SIM_DEBUG PP3110_RF SIM_DEBUG SM 35 SIM_DEBUG P4MM SM 1 PP_LDO11 P4MM SM 1 PP P4MM 1 BB_DEBUG_STATUS PP3137_RF P4MM SM 52 54 SIM_DEBUG PP3129_RF PP3155_RF PP PP3109_RF 1 29 51 WIFI_BT SM 32 34 SIM_DEBUG 29 35 PP3177_RF PP3147_RF P4MM 1 MDM_CLK BB_I2S_RXD RF_DEBUG 29 35 SIM_DEBUG PP3136_RF P4MM PP_PN65_VCC_SIM RADIO_STOCKHOLM 29 51 WIFI_BT P4MM SM 1 PP P4MM SM 1 BB_DEVICE_RDY PP 34 SIM_DEBUG 29 35 PP3176_RF PP3146_RF P4MM SM 1 BB_JTAG_TRST_L PP 32 34 SIM_DEBUG PP3128_RF BB_I2S_WS RF_DEBUG 29 35 SIM_DEBUG PP3135_RF P4MM SM 1 PMIC_RESOUT_L PP 29 52 RADIO_STOCKHOLM 29 51 WIFI_BT PP PP3127_RF 35 45 46 48 P4MM SM 1 PP P4MM SM 1 BB_HOST_RDY PP 34 SIM_DEBUG RFFE2_DATA RF_DEBUG PP3175_RF PP3145_RF P4MM SM 1 BB_JTAG_TDI PP 32 SIM_DEBUG P4MM SM 1 PP 29 35 SIM_DEBUG PP3134_RF P4MM SM 1 PS_HOLD_PMIC PP 29 52 PP3126_RF PP3152_RF SM PP3103_RF STOCKHOLM_CTS_L RADIO_STOCKHOLM WIFI_BT 35 45 46 48 PP3173_RF P4MM SM 1 BB_UART_CTS_L PP 34 SIM_DEBUG RFFE2_CLK RF_DEBUG 29 35 PP3144_RF P4MM SM 1 BB_JTAG_TDO PP 29 32 SIM_DEBUG P4MM SM 1 PP SIM_DEBUG PP3133_RF P4MM SM 1 RF_PMIC_RESET_L PP 29 52 PP3125_RF PP3120_RF C PP3102_RF STOCKHOLM_UART_TXD RADIO_STOCKHOLM WIFI_BT 35 39 40 41 42 43 44 PP3172_RF P4MM SM 1 BB_UART_RTS_L PP 34 SIM_DEBUG RFFE1_DATA RF_DEBUG PP3143_RF P4MM SM 1 BB_JTAG_TMS PP 35 SIM_DEBUG P4MM SM 1 PP 29 35 SIM_DEBUG PP3132_RF P4MM SM 1 BB_DEBUG_ERROR PP 29 52 PP3124_RF P2MM SM 1 BT_UART_TXD PP PP STOCKHOLM_UART_RXD RADIO_STOCKHOLM PP3119_RF SM PP3101_RF 35 39 40 41 42 43 44 PP3171_RF P4MM SM 1 BB_UART_RXD PP 34 SIM_DEBUG D RFFE1_CLK RF_DEBUG PP3142_RF P4MM SM 1 BB_JTAG_TCK PP 29 34 SIM_DEBUG P4MM SM 1 PP 29 35 SIM_DEBUG PP3131_RF P4MM-NSM SM 1 50_BB_HSIC_DATA PP 32 52 PP3123_RF P4MM SM BB_REQUEST_XO_CLK 1 PP3170_RF P4MM SM 1 BB_UART_TXD PP 34 SIM_DEBUG PP3116_RF SIM_DEBUG PP3141_RF P4MM SM 1 BB_JTAG_RST_L PP 29 34 SIM_DEBUG P4MM 1 BB_COEX_UART_RXD PP3130_RF P4MM-NSM SM 1 50_BB_HSIC_STROBE PP 29 52 PP3122_RF P4MM PP STOCKHOLM_HOST_WAKE RADIO_STOCKHOLM PP3113_RF SM PP3115_RF P2MM-NSM SM 1 PP 1% 1/32W MF 01005 2 B 1% 1/32W MF 01005 2 BOOT_HSIC BOOT_HSIC_USB WATCHDOG_DISABLE PP_3183_RF P2MM-NSM SM 1 PP BB_SIM_DETECT 30 35 PP_LDO5 30 31 33 54 SIM CARD ESD PROTECTION PP_3184_RF P2MM-NSM SM 1 PP PP3166_RF DZ3102_RF 5.5V-6.2PF 29 51 WIFI_BT 35 30 PP3167_RF BB_SIM_DETECT 1 P4MM SM SIM CARD CONNECTOR 29 51 WIFI_BT PP3168_RF P4MM-NSM SM 1 90_WLAN_PCIE_TDN PP 54 33 31 30 PP3169_RF P4MM-NSM SM 1 90_WLAN_PCIE_TDP PP 29 51 WIFI_BT 1 15.00K 1% DIFF-PAIR PROBE POINTS LOCATED OPPOSITE DC-BLOCKS 1/32W MF 201005 VCC J3101_RF 33 31 38 37 35 34 33 31 30 39 54 33 31 30 31 XW3101_RF SHORT-10L-0.1MM-SM VREG_SMPS1_0V90 ADC_SMPS1 1 2 OUT PP_LDO11 XW3102_RF SHORT-10L-0.1MM-SM ADC_PP_LDO11 1 2 PP_LDO5 XW3103_RF SHORT-10L-0.1MM-SM ADC_PP_LDO5 1 2 VREG_SMPS4_2V075 XW3104_RF SHORT-10L-0.1MM-SM ADC_SMPS4 1 2 8 29 35 30 IN 35 30 IN BB_SIM_RESET BB_SIM_CLK 29 OUT 29 OUT 29 BB_SIM_DATA 1 35 30 BB_SIM_RESET 2 2 4 4FF_SIM_SWP 30 54 3 BB_SIM_CLK 30 35 SYNC_MASTER=N/A 3 CLK 12 BB_SIM_DETECT 6 4FF_SIM_SWP SWP 12V-33PF 01005-1 2.2UF 20% 2 6.3V X5R 0201-1 BB_SIM_DATA DETECT 1 DZ3101_RF C3101_RF 2 RSTSIMCARD-RCPT-N61I/O 7 F-ST-SM GND OUT 1 35 30 30 31 33 54 BI OUT AP INTERFACE & DEBUG CONNECTORS DRAWING NUMBER 30 35 Apple Inc. BI 7 30 54 NOTICE OF PROPRIETARY PROPERTY: 5 051-9903 REVISION R CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST 6 SYNC_DATE=N/A PAGE TITLE 30 35 8 9 10 11 13 5 A SM PP_LDO5 PP_LDO5 1 R3101_RF VR3101_RF ESDAVLC5-4BU4 29 51 WIFI_BT 2 0201 GND PP 1 90_WLAN_PCIE_RDP 5 P4MM SM 1 90_WLAN_PCIE_RDN PP 4 3 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 7.0.0 BRANCH PAGE 31 OF 55 SHEET 30 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 BASEBAND PMU (1 OF 2) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. SWITCHERS OUTPUT CAPS 33 31 30 D VREG_SMPS1_0V90 31 RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC 1 C3229_RF 1 C3231_RF 1 C3233_RF 1 C3235_RF 1 C3249_RF 1 C3251_RF RADIO_PMIC 1 C3259_RF 2 6.3V CERM-X5R 0402 2 20UF 20% 2.2UF 20% 2 6.3V X5R 0201-1 2.2UF 20% 2 6.3V X5R 0201-1 2.2UF 20% 2 6.3V X5R 0201-1 2.2UF 20% 2 6.3V X5R 0201-1 2.2UF 20% 2.2UF 20% 2 6.3V X5R 0201-1 6.3V X5R 0201-1 RADIO_PMIC 1 C3260_RF 2.2UF 20% 2 VREG_SMPS2_1V25 RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC 1 C3237_RF 1 C3239_RF 1 C3242_RF 1 C3244_RF 1 C3253_RF 1 C3255_RF 20UF 20% 6.3V X5R 0201-1 2 6.3V CERM-X5R 0402 2.2UF 20% 2 6.3V X5R 0201-1 2.2UF 20% 6.3V 2 X5R 0201-1 2.2UF 20% 6.3V 2 X5R 0201-1 2.2UF 20% RADIO_PMIC 1 C3258_RF 2.2UF 20% 2 6.3V X5R 0201-1 2 6.3V X5R 0201-1 2 RADIO_PMIC 1 C3261_RF 2.2UF 20% 2.2UF 20% 6.3V X5R 0201-1 2 6.3V X5R 0201-1 D RADIO_PMIC 1 C3262_RF 2.2UF 20% 2 6.3V X5R 0201-1 PP_VCC_MAIN 23 17 16 15 14 12 10 52 51 48 39 31 26 RADIO_PMIC 1 C3270_RF RADIO_PMIC 1 C3224_RF 2.2UF 20% 100PF 5% 16V 2 NP0-C0G 01005 2 6.3V X5R 0201-1 RADIO_PMIC 1 C3223_RF 2.2UF 20% 2 6.3V X5R 0201-1 RADIO_PMIC 1 C3222_RF 2.2UF 20% 2 RADIO_PMIC 1 C3221_RF 2 6.3V X5R 0402-1 20% 2 6.3V X5R 0402-1 15UF 20% 6.3V X5R 0201-1 RADIO_PMIC 1 C3216_RF 15UF VREG_SMPS3_0V95 RADIO_PMIC 1 C3257_RF 20% 2 6.3V CERM-X5R 0402 2 20UF 2.2UF 20% 2 6.3V X5R 0201-1 2.2UF 20% 2 6.3V X5R 0201-1 2.2UF 20% 2 6.3V X5R 0201-1 2.2UF 20% 2 6.3V X5R 0201-1 C 2.2UF 2.2UF 20% 20% 2 6.3V X5R 0201-1 VREG_SMPS4_2V075 31 RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC 1 C3230_RF 1 C3232_RF 1 C3234_RF 1 C3236_RF 1 C3250_RF 1 C3252_RF 6.3V X5R 0201-1 30 31 RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC 1 C3238_RF 1 C3240_RF 1 C3241_RF 1 C3243_RF 1 C3254_RF 1 C3256_RF 20UF 20% 6.3V 2 CERM-X5R 0402 2.2UF 2.2UF 20% 2 6.3V X5R 0201-1 20% 2 6.3V X5R 0201-1 2.2UF 20% 6.3V 2 X5R 0201-1 2.2UF 20% 6.3V 2 X5R 0201-1 2.2UF 20% 6.3V 2 X5R 0201-1 C VREG_RF_CLK_BYP AVDD_BYP SWITCHERS BULK CAPS 1 RADIO_PMIC C3226_RF 52 17 16 15 14 12 10 51 48 39 31 26 23 IN PP_VCC_MAIN MAKE_BASE=TRUE VBATT_S1 VBATT_S1 1.0UF 20% 10V 2 X5R-CERM 31 0.1UF 20% 2 4V X5R 01005 15UF 20% 52 17 16 15 14 12 10 51 48 39 31 26 23 IN PP_VCC_MAIN MAKE_BASE=TRUE VBATT_S2 VBATT_S2 PP_VCC_MAIN MAKE_BASE=TRUE VBATT_S1 22 VDD_S1 VBATT_S2 88 94 VDD_S2 VDD_S2 31 VBATT_S3 47 VDD_S3 31 VBATT_S4 1 VDD_S4 31 VREG_SMPS2_1V25 92 VDD_L1 31 30 VBATT_S3 31 15UF 20% 39 17 12 15 26 51 6.3V 2 X5R 0402-1 PP_VCC_MAIN MAKE_BASE=TRUE VBATT_S4 0201-1 VREG_RFCLK 91 VREG_XO 74 VREG_XO_PMIC RADIO_PMIC L3201_RF 2.2UH-20%-1.5A-0.160OHM PP_VSW_S1 1 2 MAKK2016-SM VOLTAGE=4.50V RADIO_PMIC L3203_RF 2.2UH-20%-1.5A-0.160OHM VREG_S1 27 VSW_S1_1 11 VSW_S1_2 16 VREG_S2 82 VSW_S2 93 VREG_SMPS4_2V075 VREG_SMPS4_2V075 2 VDD_L2_3 4 VDD_L7_8_11 VDD_L9 VREG_L1 86 72 VDD_L10 VREG_SMPS3_0V95 38 VREG_SMPS4_2V075 85 VDD_L12 VDD_XO_RFC VBATT_S4 34 52 31 16 10 14 23 48 OUT IN MDM_VREF_LPDDR2 1 2 MAKK2016-SM RADIO_PMIC L3204_RF 2.2UH-20%-1.5A-0.160OHM PP_VSW_S3 1 2 MAKK2016-SM VOLTAGE=4.50V RADIO_PMIC L3202_RF 1350MA VREG_SMPS1_0V90 OUT 30 31 33 VREG_SMPS2_1V25 OUT 31 VREG_SMPS3_0V95 OUT 31 VREG_SMPS4_2V075 OUT 30 31 2.2UH-20%-1.2A-0.15OHM PP_VSW_S4 1 550MA 2 0806 VOLTAGE=4.50V VREG_RX VOLTAGE=1.225V PP_LDO1 OUT 33 37 38 VREG_L2 7 VOLTAGE=1.80V PP_LDO2 OUT 33 VREG_L3 8 VOLTAGE=1.80V PP_LDO3 OUT 32 33 VREG_L4 68 VOLTAGE=3.075V PP_LDO4 OUT 33 B 49 GND VREG_L5 59 VOLTAGE=1.80V PP_LDO5 OUT 30 33 54 52 VREF_DDR2 VREG_L6 48 VOLTAGE=1.80V PP_LDO6 OUT 30 33 54 VREG_L7 10 VOLTAGE=1.90V PP_LDO7 OUT 33 35 PP_LDO8 OUT 37 38 PP_LDO9 OUT 33 PP_LDO10 OUT 33 PP_LDO11 OUT 30 33 34 35 37 38 39 PP_LDO12 OUT 33 PP_LDO13 OUT 33 50 OUT 29 41 42 43 PP_VCC_MAIN 1100MA PP_VSW_S2 VREG_S4 23 VSW_S4_1 6 VSW_S4_2 12 77 1235MA VOLTAGE=4.50V VREG_S3 62 VSW_S3_1 53 VSW_S3_2 58 31 1 RADIO_PMIC C3219_RF IN REG 31 31 30 VBATT_S3 52 17 16 15 14 12 10 51 48 39 31 26 23 VDD_INT_BYP REF_BYP GND_REF 31 31 30 6.3V 2 X5R 0402-1 IN 26 21 15 31 15UF 20% 52 17 16 15 14 12 10 51 48 39 31 26 23 BGA SYM 5 OF 5 31 1 RADIO_PMIC C3218_RF B 20% 2 10V X5R-CERM PM8019 31 6.3V 2 X5R 0402-1 1.0UF U_PMICRF 1 RADIO_PMIC C3227_RF 0201-1 31 1 RADIO_PMIC C3217_RF 1 RADIO_PMIC C3228_RF REF_BYP 54 VIN_VPH1 VIN_VPH2 VREG_SIM VREG_TX VREG_L8 3 VOLTAGE=2.05V VREG_L9 71 VOLTAGE=1.20V 31 VREG_L10 83 VOLTAGE=0.90V 31 VREG_IO VREG_L11 9 1 RADIO_PMIC C3220_RF 15UF 20% 6.3V 2 X5R 0402-1 VOLTAGE=1.80V VREG_L12 33 VOLTAGE=0.95V VREG_L13 34 VOLTAGE=2.95V VREG_L14 28 VOLTAGE=5.0V RADIO_PMIC RADIO_PMICRADIO_PMICRADIO_PMICRADIO_PMICRADIO_PMIC RADIO_PMIC 1RADIO_PMIC 1RADIO_PMIC 1 RADIO_PMIC 1 RADIO_PMIC C3201_RF1 C3202_RF C3203_RF1 C3204_RF1 C3205_RF1 C3206_RF1 C3207_RF1 C3208_RF1 C3209_RF C3210_RF C3211_RF1 1.0UF 10UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 10UF 10UF 10UF 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 6.3V 6.3V 6.3V 6.3V 2 2 2 2 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 X5R-CERM 0201-1 CERM-X5R 0402-9 X5R-CERM 0201-1 X5R-CERM 0201-1 X5R-CERM 0201-1 X5R-CERM 0201-1 X5R-CERM 0201-1 X5R-CERM 0201-1 CERM-X5R 0402-9 CERM-X5R 0402-9 CERM-X5R 0402-9 PP_LDO14_RFSW RADIO_PMIC RADIO_PMIC RADIO_PMIC 1 C3214_RF 1 RADIO_PMIC C3212_RF1 C3213_RF C3215_RF 1.0UF 10UF X5R-CERM 0201-1 2 CERM-X5R 20% 10V 20% 6.3V 0402-9 1.0UF 1.0UF 0201-1 0201-1 20% 20% 10V 10V 2 X5R-CERM 2 X5R-CERM A A PAGE TITLE BASEBAND PMU (1 0F 2) DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-9903 7.0.0 SIZE D REVISION BRANCH PAGE 32 OF 55 31 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C401 R411 L400 U404 BASEBAND PMU (2 OF 2) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D BOARD_IDREVISION N61 PROTO_MLB1 0.00V 0.50V N61 DEV3 0.70V N61 DEV4 0.90V N61 PROTO_MLB2 1.10V N61/N56 PROTO1 1.30V N61/N56 PROTO2 1.40V N61/N56 EVT1 1.50V N61/N56 EVT2 (CARRIER) 1.60V N61/N56 DVT N61/N56 PVT 1.70V D XTAL19M_IN 1 32 RADIO_PMIC R3304_RF 100K 1% 1/32W MF 201005 NOSTUFF RADIO_PMIC Y3301_RF 19.2MHZ-10PPM-7PF-80OHM 2.0X1.6-SM 1 3 32 RADIO_PMIC 33 32 31 IN C 4 1 R3305_RF U_PMICRF 39K 32 32 32 33 CALCULATE WITH 2M IN PARALLEL TO GND RADIO_PMIC OUT 1 R3306_RF 200K 1% 35 39 29 18 44 NC VREF_DAC_BIAS 35 24 NC 1/32W MF 2 01005 PP_LDO3 OUT BGA SYM 4 OF 5 MPP_01 MPP_GPIO GPIO_01 MPP_02 GPIO_02 MPP_03 GPIO_03 MPP_04 GPIO_04 MPP_05 GPIO_05 MPP_06 GPIO_06 BOARD_ID VINYL VDDPX_BIAS 2 90 84 XTAL19M_OUT PM8019 1% 1/32W MF 2 01005 BOARD_ID U_PMICRF XTAL19M_IN RADIO_PMIC PM8019 PP_LDO3 34 13 30 55 19 14 25 IN XO_OUT_D0_EN RADIO_PMIC NC BB_GPS_ENABLE BB_REQUEST_XO_CLK IN 33 32 31 NC NC BB_BUA_SIM IN IN PP_LDO3 100K2 1 GND_XO 79 XO_OUT_D0_EN 1% 1/32W MF 01005 35 RADIO_PMIC CLOCK XO_THERM GND_XOADC 1 1 C3301_RF 1000PF NC 57 46 XO_THERM_Y1 XTAL_19M_IN XTAL_19M_OUT 73 R3308_RF 30 52 10% 6.3V 2 X5R-CERM 01005 C3303_RF BGA SYM 2 OF 5 1000PF XO_OUT_A0 64 50_A0_PMCLK 1 2 RADIO_PMIC R3309_RF 1 100 2 50_RF_CLK 50_PMIC_RF_CLK XO_OUT_A1 67 SLEEP_CLK 80 SLEEP_CLK_32K OUT XO_OUT_D0 78 MDM_CLK OUT PA_THERM1 PA_THERM2 42 32 BATT_ID_THERM 37 REF_CLK_FROM_BB OUT 10% 30 52 6.3V X5R-CERM 01005 34 1% MF 1/32W01005 OUT RADIO_PMIC C 1 C3302_RF 18PF 5% 16V 2 CERM 01005 30 34 NOSTUFF NC PA_CTL_QFE 39 R3310_RF 100KOHM-1% 01005 RADIO_PMIC 2 NOSTUFF 31 32 33 1 RADIO_PMIC R3311_RF 100K 1% 1/32W MF 2 01005 B DEFAULT CONFIGURATION SUPPORTS VINYL VINYL 32 B 1 RADIO_PMIC R3312_RF 100K 1% U_PMICRF 1/32W MF PM8019 2 01005 NOSTUFF 5 87 63 17 U_PMICRF PM8019 BGA SYM 1 OF 5 RADIO_PMIC R3301_RF 30 29 IN 1.00K2 BB_RST_L 1 29 30 IN 1% MF 1/32W01005 RADIO_PMIC 34 R3307_RF 34 IN 30 OUT 20.0K2 PS_HOLD 1 30 5% MF 1/32W0100530 29 IN 34 30 BI 34 30 BI 70 31 CBL_PWR* PON_TRIG PMIC_RESOUT_L 75 PON_RST* PS_HOLD_PMIC 65 PS_HOLD RADIO_ON_L 20 RF_PMIC_RESET_L SPMI_CLK SPMI_DATA 81 76 CONTROL OPT 66 NC GND 89 BGA SYM 3 OF 5 GND_S1 GND_S2 GND_S3 GND_S4 INPUT_PWR GND GND GND GND GND GND GND GND 36 40 41 50 51 60 61 69 GND 56 GND 45 RESIN* SPMI_CLK SPMI_DATA A A PAGE TITLE BASEBAND PMU (2 OF 2) DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-9903 7.0.0 SIZE D REVISION BRANCH PAGE 33 OF 55 32 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C538 R500 L500 U502 BASEBAND (1 OF 3) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. RADIO_BB U_BB_RF ASIC-MDM9625M-333P BGA 33 31 IN PP_LDO10 D 33 31 IN C 33 31 30 IN PP_LDO12 (MSM CORE) J15 K14 K15 L13 L14 M8 M9 M12 M13 N7 N8 N11 N12 P7 P10 P11 (MSM MEMORY) E15 F8 F9 F15 G8 K10 L9 L10 N15 P14 P15 R7 R8 VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE SYM 5 OF 6 PWR VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 (EBI1 PAD) F19 PP_LDO9 L19 L20 M1 T19 B20(SDC1 PAD) PP_LDO13 PAD) B2 (GENIO PP_LDO11 J19 K2 V2 V5 V19 VDD_P4 R19 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P2 VDD_P5 VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_P6 E5 VDD_MEM (MODEM SUB SYSTEM) F6 VDD_MODEM VREG_SMPS1_0V90 F7 VDD_MODEM F10 VDD_MODEM F11 VDD_MODEM G6 VDD_MODEM G9 VDD_MODEM G10 VDD_MODEM G13 VDD_MODEM G14 VDD_MODEM G15 VDD_MODEM H8 VDD_MODEM H9 VDD_MODEM H12 VDD_MODEM H13 VDD_MODEM J7 VDD_MODEM J8 VDD_MODEM J11 VDD_MODEM J12 VDD_MODEM K6 VDD_MODEM K7 VDD_MODEM K11 VDD_MODEM L6 VDD_MODEM PP_LDO6 U19 PP_LDO5 V9 (HSIC PAD) PP_LDO9 IN 31 33 ASIC-MDM9625M-333P IN 31 33 50 IN 30 31 33 34 35 37 38 39 (UIM2 PAD) IN 31 33 VDDPX_BIAS IN 32 33 VREF_SDC VREF_UIM A19 U20 VDD_USB_CORE V13 PP_LDO12 IN 31 33 VDD_USB_1P8 U11 PP_LDO2 IN 31 33 VDD_USB_3P3 V10 PP_LDO4 IN 31 VDD_A2 VDD_A2 C12 C9 PP_LDO7 IN 31 33 35 VDD_A2 VDD_A1 VDD_A2 VDD_A1 B12 B9 C6 B6 IN 31 33 37 38 VDD_A1 B15 PP_LDO1 IN 31 33 37 38 VDD_PLL VDD_PLL VDD_PLL VDD_PLL2 U13 R12 D17 E16 PP_LDO10 IN 31 33 IN 31 32 33 IN 30 31 33 34 35 37 38 39 IN 31 33 IN 31 32 33 VDD_ALWAYS_ON VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2 VDD_QFPROM_PRG PP_LDO3 T17 NC J20(LPDDR2) PP_LDO11 K1 E20(LPDDR2_CORE) PP_LDO9 H1 P1 P20 PROGRAMMING) W8 (QFUSE PP_LDO3 BGA A2 A20 C14 C20 E14 F12 F13 F14 F20 G7 G11 G12 H6 H7 H10 H11 H14 H15 J1 J6 J9 J10 J13 J14 K8 K9 K12 K13 K19 K20 L1 L7 L8 L11 L12 L15 M6 M7 (UIM1 PAD) IN IN PP_LDO1 D RADIO_BB U_BB_RF GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SYM 6 OF 6 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND M10 M11 M14 M15 M20 N1 N6 N9 N10 N13 N14 P6 P8 P9 P12 R20 T20 V20 W1 W5 W9 W20 W12 A12 A6 E12 E9 A9 E6 A17 C17 B17 P13 R13 R14 GND A15 C B B RADIO_BB 33 31 IN (MSM CORE) PP_LDO10 RADIO_BB 33 31 IN (EBI1 PAD) PP_LDO9 RADIO_BB 33 31 IN (HSIC PAD) PP_LDO9 RADIO_BB 33 31 (USB 1.8V) PP_LDO2 RADIO_BB 38 37 33 31 IN (GPS ADC) PP_LDO1 38 37 35 RADIO_BB 34 33 31 30 39 RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB 1 C3404_RF 1 C3407_RF 1 C3410_RF 1 C3413_RF 1 C3416_RF 1 C3419_RF 1 C3422_RF 1 C3424_RF 1 C3427_RF 1 C3430_RF 1 C3432_RF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 0.1UF 2.2UF 20% 2 4V X5R-CERM 0201 20% 4V 2 X5R-CERM 0201 20% 2 4V X5R-CERM 0201 20% 2 4V X5R-CERM 0201 20% 2 4V X5R-CERM 0201 20% 20% 2 4V X5R-CERM 2 4V X5R-CERM 0201 0201 20% RADIO_BB IN RADIO_BB 1 C3401_RF 20% 4V 2 X5R-CERM 20% 4V 2 X5R-CERM 0201 4V 2 X5R-CERM 0201 RADIO_BB 20% RADIO_BB 2.2UF 20% 2 4V X5R-CERM 01005 (LPDDR2) PP_LDO11 1 C3435_RF 20% 2 4V X5R 0201 IN 2 4V X5R-CERM 0201 0201 NOSTUFF RADIO_BB 33 31 IN (MSM MEMORY) PP_LDO12 RADIO_BB 50 33 31 IN (SDC1 PAD) NOSTUFF PP_LDO13 RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB 1 C3402_RF 1 C3405_RF 1 C3408_RF 1 C3411_RF 1 C3414_RF 1 C3417_RF 1 C3420_RF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 20% 2 4V X5R-CERM 0201 20% 4V 2 X5R-CERM 0201 20% 2 4V X5R-CERM 0201 20% 2 4V X5R-CERM 0201 20% 2 4V X5R-CERM 0201 20% RADIO_BB 33 32 RADIO_BB IN 20% 2 4V X5R-CERM RADIO_BB 35 33 31 IN RADIO_BB IN (MODEM SUB SYSTEM) VREG_SMPS1_0V90 RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB 1 C3403_RF 1 C3406_RF 1 C3409_RF 1 C3412_RF 1 C3415_RF 2.2UF 20% 2 4V X5R-CERM 0201 2.2UF 20% 4V 2 X5R-CERM 0201 2.2UF 20% 2 4V X5R-CERM 0201 2.2UF 20% 2 4V X5R-CERM 0201 2.2UF 20% 2 4V X5R-CERM 0201 38 37 35 34 33 31 30 39 RADIO_BB 1 C3418_RF 2.2UF 20% 2 4V X5R-CERM 0201 IN RADIO_BB 33 31 RADIO_BB RADIO_BB 1 C3421_RF 1 C3423_RF 2.2UF 20% 2 4V X5R-CERM 0201 2.2UF 20% 4V 2 X5R-CERM 0201 IN (PLL) PP_LDO10 RADIO_BB 33 31 IN (LPDDR2 CORE) PP_LDO9 RADIO_BB RADIO_BB 1 C3428_RF 1 C3431_RF 1 C3433_RF 1 C3436_RF 1 C3438_RF 0.1UF 2.2UF 2.2UF 2.2UF 2.2UF 20% 4V 2 X5R-CERM 01005 (GENIO PAD) PP_LDO11 IN 1 C3425_RF 0201 NOSTUFF 33 31 30 RADIO_BB 33 31 RADIO_BB 4V 2 X5R 0201 (COMBO DAC/BBRX) PP_LDO7 RADIO_BB RADIO_BB 20% 2 4V X5R-CERM 0201 (SDC/UIM) VDDPX_BIAS (USB CORE) PP_LDO12 38 20% 20% 2 4V X5R-CERM RADIO_BB IN (BBRX) PP_LDO1 2.2UF RADIO_BB 33 32 31 IN (PLL) PP_LDO3 1 C3434_RF 2.2UF 20% 2 4V X5R-CERM 20% 4V 2 X5R-CERM 0201 RADIO_BB 33 32 31 RADIO_BB 2.2UF 20% 0201 2.2UF 20% 2 4V X5R-CERM 0201 NOSTUFF 1 C3429_RF 4V 2 X5R-CERM 2 4V X5R-CERM 0201 RADIO_BB 1 C3426_RF 20% 2 4V X5R-CERM 0201 NOSTUFF 37 33 31 RADIO_BB RADIO_BB 0201 0201 IN (QFUSE) PP_LDO3 RADIO_BB 1 C3437_RF 2.2UF 20% 2 4V X5R-CERM 0201 NOSTUFF A A PAGE TITLE BASEBAND (1 OF 2) DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-9903 7.0.0 SIZE D REVISION BRANCH PAGE 34 OF 55 33 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C600 R606 L600 U602 BASEBAND (2 OF 3) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D PP_LDO11 A2 39 38 37 35 34 33 31 30 VP BB_SWD_ENABLE 35 34 B2 IN1 BB_SWD_ENABLE IN2 C1 U_JTAGRF 34 35 TS5A2066 34 30 29 90_BB_USB_P B1 COM1 34 30 BB_JTAG_TCK A1 NO1 BGA COM2 C2 90_BB_USB_N 29 30 34 NO2 D2 BB_JTAG_TMS 30 34 D1 GND PP_LDO11 RADIO_SIMCARD 30 31 33 34 35 37 38 39 RADIO_BB 1 R3509_RF 10K C C 1% 1/32W MF 010052 NOSTUFF DSDS_SIM_DETECT 30 34 RADIO_BB U_BB_RF ASIC-MDM9625M-333P 32 30 IN 30 IN 32 IN 34 30 IN 30 IN 34 30 IN 30 IN 34 32 30 32 IN OUT 34 30 30 29 B IN 34 32 30 PMIC_RESOUT_L BB_JTAG_RST_L SLEEP_CLK_32K BB_JTAG_TCK BB_JTAG_TDI BB_JTAG_TMS BB_JTAG_TRST_L MDM_CLK XO_OUT_D0_EN DSDS_SIM_DETECT BB_USB_VBUS MDM_CLK W14 N2 W17 R2 P3 P2 T4 R11 NC R9 NC W19 V18 N19 B19 NC C19 NC U12 V12 NC W13 BGA RESIN* SRST* SLEEP_CLK RESOUT* PS_HOLD SYM 1 OF 6 DIGITAL TDO TCK TDI TMS TRST* V17 NC W18 PS_HOLD P5 BB_JTAG_TDO RADIO_BB OUT OUT W15 V15 HSIC_CAL HSIC_DATA HSIC_STROBE U9 U10 R10 BB_HSIC_CAL 50_BB_HSIC_DATA 50_BB_HSIC_STROBE UIM1_RESET UIM1_CLK UIM1_DATA M19 N18 P19 DSDS_SIM_RESET DSDS_SIM_CLK DSDS_SIM_DATA CXO CXO_EN UIM1_DETECT SDC1_DATA_3 SDC1_DATA_2 SDC1_DATA_1 SDC1_DATA_0 SDC1_CMD SDC1_CLK USB_HS_VBUS USB_HS_ID USB_HS_SYSCLK USB_HS_DP USB_HS_DM USB_HS_REXT SPMI_DATA SPMI_CLK B18 NC A18 NC D20 NC D19 NC V11 90_BB_USB_P W11 90_BB_USB_N W10 BB_USB_TRXTUNE U_BB_RF RADIO_BB PMIC_SPMI_DATA PMIC_SPMI_CLK MODE_0 MODE_1 32 30 BI 30 32 BI 30 32 BI 29 30 BI 29 30 OUT 30 54 OUT 30 54 BI 30 54 BI 29 30 34 BI 29 30 34 R3505_RF 1 240 2 1% MF 1/32W01005 BGA EBI1_CAL R1 BDM_ZQG1 RADIO_BB 1 RADIO_BB R3502_RF R3506_RF 240 2 1 1/32W MF 201005 1% MF 1/32W01005 240 1% ASIC-MDM9625M-333P F18 NC F16 NC G20 NC G19 NC G18 NC G16 NC SYM 2 OF 6 EBI1_EBI2 EBI1_CAL EBI1_ZQ EBI2_CS* EBI2_CLE* EBI2_ALE* EBI2_WE* EBI2_OE* EBI2_BUSY* EBI1_VREF EBI1_VREF EBI1_VREF N20 M5 R16 EBI2_AD_7 EBI2_AD_6 EBI2_AD_5 EBI2_AD_4 EBI2_AD_3 EBI2_AD_2 EBI2_AD_1 EBI2_AD_0 H20 NC H19 H18NC NC H16 NC J18 NC K18 NC J16 NC K16 NC MDM_VREF_LPDDR2 IN 31 34 B 1 RADIO_BB R3501_RF 200 1% MDM_VREF_LPDDR2 1/32W MF 201005 1 31 34 C3501_RF 1.0UF PP_LDO11 20% 2 6.3V X5R 0201-1 30 31 33 34 35 37 38 39 31 33 34 35 37 38 39 A1 PP_LDO11 30 VCC U_EEP_RF CAT24C08C4A WLCSP 35 34 B1 BB_EEPROM_SCL SCL SDA B2 A2 1 R3508_RF 1/32W MF 2 01005 1/32W MF 201005 10K 1% BB_EEPROM_SDA VSS A 1 R3507_RF 35 34 35 34 34 35 10K 1% BB_EEPROM_SCL BB_EEPROM_SDA A PAGE TITLE BASEBAND (1 OF 2) DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-9903 7.0.0 SIZE D REVISION BRANCH PAGE 35 OF 55 34 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C704 R700 L700 U702 BASEBAND (3 OF 3) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D PP_LDO11 30 31 33 34 35 37 38 39 RADIO_BB 1 R3601_RF RADIO_BB U_BB_RF 10K ASIC-MDM9625M-333P 1% 1/32W MF 01005 2 BGA 30 BB_SIM_DETECT RADIO_BB U_BB_RF 36 C IN 36 IN 36 IN 36 IN 36 IN 36 IN 36 IN 36 IN 38 IN 38 IN 38 IN 38 IN 38 IN 38 IN 38 IN 38 IN 36 IN 36 IN 36 36 IN IN IN 30 IN 30 OUT ASIC-MDM9625M-333P 30 29 BGA OUT 30 29 TX_DAC0_IREF TX_DAC0_VREF C13 E13 WTR_TX_IDAC VREF_DAC_BIAS TX_DAC0_IP TX_DAC0_IM TX_DAC0_QP TX_DAC0_QM A14 B14 B13 A13 WTR_BB_TX_I_P WTR_BB_TX_I_N WTR_BB_TX_Q_P WTR_BB_TX_Q_N TX_DAC1_IREF TX_DAC1_VREF C8 E8 PP_LDO7 BBRX_IP_CH2 BBRX_IM_CH2 BBRX_QP_CH2 BBRX_QM_CH2 TX_DAC1_IP TX_DAC1_IM TX_DAC1_QP TX_DAC1_QM A8 B8 A7 B7 BBRX_IP_CH3 BBRX_IM_CH3 BBRX_QP_CH3 BBRX_QM_CH3 ET_DAC_M ET_DAC_P C7 E7 WTR_BB_PRX_I_P WTR_BB_PRX_I_N WTR_BB_PRX_Q_P WTR_BB_PRX_Q_N E11 C11 E10 C10 BBRX_IP_CH0 BBRX_IM_CH0 BBRX_QP_CH0 BBRX_QM_CH0 WTR_BB_DRX_I_P WTR_BB_DRX_I_N WTR_BB_DRX_Q_P WTR_BB_DRX_Q_N B11 A11 B10 A10 BBRX_IP_CH1 BBRX_IM_CH1 BBRX_QP_CH1 BBRX_QM_CH1 WFR_BB_PRX_I_P WFR_BB_PRX_I_N WFR_BB_PRX_Q_P WFR_BB_PRX_Q_N B5 A5 B4 A4 WFR_BB_DRX_I_P WFR_BB_DRX_I_N WFR_BB_DRX_Q_P WFR_BB_DRX_Q_N C4 C5 B3 A3 WTR_BB_GPS_I_P WTR_BB_GPS_I_N WTR_BB_GPS_Q_P WTR_BB_GPS_Q_N C15 C16 B16 A16 SYM 4 OF 6 ANALOG DNC DNC DNC DNC GNSS_BB_IP GNSS_BB_IM GNSS_BB_QP GNSS_BB_QM ET_DAC_N ET_DAC_P OUT 35 36 32 35 OUT 36 OUT 36 OUT 36 OUT 36 31 33 35 36 35 WTR_TX_IDAC IN 30 29 OUT 30 29 OUT 30 29 IN 30 29 OUT 29 OUT OUT 39 30 29 OUT 39 30 29 IN 34 BI 34 BI V16 NC W16 NC D4 NC C3 NC 30 29 29 29 VREF_DAC_BIAS 35 32 RADIO_BB RADIO_BB 1 C3601_RF 1 C3603_RF 0.1UF 10% 2 35 33 31 PP_LDO7 2 10% 6.3V X5R-CERM 01005 OUT OUT IN OUT OUT 29 OUT 29 OUT 30 IN 30 IN 30 IN R18 U18 T18 P18 U15 U14 V14 U16 U3 NC U4 NC W2 NC V3 NC V7 BB_I2S_WS V6 BB_I2S_RXD W7 BB_I2S_TXD U8 BB_I2S_CLK M18 NC M16 NC N16 NC L16 NCD18 BB_OTHER_TXD C18 BB_OTHER_RXD E19 BB_EEPROM_SDA E18 BB_EEPROM_SCL BB_RESET_DET_L P16 L18 AP_WAKE_MODEM L5 BB_LAT_GPIO0 M3 BB_LAT_GPIO1 NC K3 BB_LAT_GPIO2 L3 BB_LAT_GPIO3 M2 BB_LAT_GPIO4 K5 BB_LAT_GPIO5 NC B1 NC C2 NC WATCHDOG_DISABLE J5 L2 BOOT_HSIC J3 BOOT_HSIC_USB J2 NC BB_SIM_DATA BB_SIM_DETECT BB_SIM_RESET BB_SIM_CLK BB_UART_TXD BB_UART_RXD BB_UART_CTS_L BB_UART_RTS_L SYM 3 OF 6 GPIO GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24 GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29 GPIO_30 GPIO_31 GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36 GPIO_37 BLSP1 BLSP2 GRFC BLSP3 BLSP4 BLSP5 SSBI BLSP6 GRFC RFFE GPIO_38 GPIO_39 GPIO_40 GPIO_41 GPIO_42 GPIO_43 GPIO_44 GPIO_45 GPIO_46 GPIO_47 GPIO_48 GPIO_49 GPIO_50 GPIO_51 GPIO_52 GPIO_53 GPIO_54 GPIO_55 GPIO_56 GPIO_57 GPIO_58 GPIO_59 GPIO_60 GPIO_61 GPIO_62 GPIO_63 GPIO_64 GPIO_65 GPIO_66 GPIO_67 GPIO_68 GPIO_69 GPIO_70 GPIO_71 GPIO_72 GPIO_73 GPIO_74 GPIO_75 H5 H2 NC H3 G3 NC G2 NC F1 NC F2 NC D3 NC C1 G5 NC NC F3 NC E3 NC F5 NC N5 NC N3 T3 E2 D1 D2 NC E1 T1 NC R6 R3 U7 V8 W4 W3 U6 T2 R15 V4 U17 V1 W6 NC U2 U5 U1 R5 GSM_TXBURST_IND OUT 29 OUT 29 CTRL_FWD_REV BB_IPC_GPIO1 UAT_SELECT LAT_SELECT BB_UAT_GPIO0 BB_UAT_GPIO1 BB_UAT_GPIO3 WLAN_TX_BLANK BB_COEX_UART_TXD BB_COEX_UART_RXD WTR_SSBI_TX_GPS WTR_SSBI_PRX_DRX WFR_SSBI OUT 30 51 IN 30 51 OUT 36 IN 36 OUT 38 C BB_DEBUG_SYNC (DEV) GSM_TX_PHASE_D1 GSM_TX_PHASE_D0 BB_CORE_DUMP BB_DEBUG_STATUS BB_DEBUG_ERROR BB_SWD_ENABLE BB_IPC_GPIO BB_HOST_RDY BB_WAKE_HOST_L BB_DEVICE_RDY BB_BUA_SIM BB_GPS_SYNC RFFE2_DATA RFFE2_CLK RFFE1_DATA RFFE1_CLK OUT OUT IN OUT 36 36 29 30 30 OUT 30 OUT 34 BI 29 IN 29 30 OUT 29 30 OUT IN OUT 29 30 32 29 30 BI 30 35 45 46 48 BI 30 35 45 46 48 BI 30 39 40 41 42 43 44 BI 30 39 40 41 42 43 44 RADIO_BB B 1 C3604_RF 2200PF 6.3V X7R 0201 IN 30 29 29 B OUT 30 35 30 35 2200PF 2 10% 6.3V X5R-CERM 01005 NOSTUFF U_BUFFER RF5129 48 46 45 44 43 41 40 35 A1 SCLK RFFE_VIO A3 VIO RFFE2_CLK_BUFFERB3 53 PP_LDO11 39 38 37 35 34 33 31 30 SCLK_A BGA SDATA A2 SDATA_A B2 RFFE2_DATA 30 35 45 46 48 RFFE2_DATA_BUFFER 53 B1 GND 48 46 45 35 30 RFFE2_CLK R3602_RF 0.002 RFFE_VIO 35 1 1% VOLTAGE=1.80V 1/20W MF 0201 40 41 43 44 45 46 48 A A PAGE TITLE RFFE2_DATA MOBILE DATA MODEM (2 OF 2) DRAWING NUMBER 1 Apple Inc. C3602_RF R 22PF 5% 16V 2 CERM 01005 8 7 6 5 4 NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 3 2 051-9903 7.0.0 SIZE D REVISION BRANCH PAGE 36 OF 55 35 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C802 R802 L800 U803 WTR TRANSCEIVER (1 OF 2) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D U_WTR_RF U_WTR_RF WTR1625 WTR1625 42 LB1 DC LB2 DC LB3 DC LB4 MB1 NO DC MB2 DC MB3 DC HB1 NO DC 38 50_B20_PRX_WTR_IN 92 42 50_B26_PRX_WTR_IN 73 41 65 PRX_LB4_IN 50_B13_B17_B28_B29_PRX_WTR_IN 50_WFR_PRX_LB_CA_IN IN 50_WFR_PRX_MB_CA_OUT 50 50_B34_B39_PRX_WTR_IN 51 DC HBMB4 NO DC PRX_LB3_IN 43 PRX_MB2_IN 27 PRX_MB3_IN 46 50_B40A_PRX_WTR_IN 19 PRX_HMB4_IN 46 50_B40B_B38X_PRX_WTR_IN9 PRX_HB1_IN 46 50_B41A_PRX_WTR_IN 18 C NC 33 OUT 35 OUT 35 OUT 35 OUT 35 LB1 DC LB2 DC LB3 DC MB1 NO DC MB2 DC MB3 DC HB1 NO DC 50_B8_B28B_DRX_WTR_IN 5 47 50_B13_B17_DRX_WTR_IN 15 DRX_LB2_IN 47 50_B26_B28A_DRX_WTR_IN 16 DRX_LB3_IN 38 OUT 38 IN 47 47 7 50_B20_B29_DRX_WTR_IN DC DRX_LB4_IN 32 DRX_LB_CA_OUT 50_WFR_DRX_MB_CA_OUT 50_B34_DRX_WTR_IN 29 28 DRX_MB_CA_IN DRX_MB1_IN 20 50_B39_DRX_WTR_IN DRX_MB3_IN 2 4 DRX_HMB4_IN DRX_HB1_IN HB3 DC 47 HBMB4 NO DC 47 50_B41A_DRX_WTR_IN 12 47 50_B7_DRX_WTR_IN 13 DRX_HB3_IN 30 DRX_HB_CA_OUT 36 44 GNSS_RF_INP GNSS_RF_INM PRX_HB3_IN NC PRX_HB_CA_OUT 49 49 100_GPS_WTR_IN_P 100_GPS_WTR_IN_N DRX_BB_IP DRX_BB_IM DRX_BB_QP DRX_BB_QM 76 86 61 68 WTR_BB_DRX_I_P WTR_BB_DRX_I_N WTR_BB_DRX_Q_P WTR_BB_DRX_Q_N GNSS_BB_IP GNSS_BB_IM GNSS_BB_QP GNSS_BB_QM 60 53 67 85 WTR_BB_GPS_I_P WTR_BB_GPS_I_N WTR_BB_GPS_Q_P WTR_BB_GPS_Q_N DNC 37 OUT OUT OUT OUT OUT OUT OUT OUT RADIO_WTR RADIO_WTR RADIO_WTR RADIO_WTR 35 RADIO_WTR RADIO_WTR RADIO_WTR RADIO_WTR 35 NC DRX_MB2_IN 1 50_B40_DRX_WTR_IN 50_B38X_DRX_WTR_IN 47 PRX_HB2_IN DRX_LB1_IN 50_WFR_DRX_LB_CA_IN NC HB2 SYM 2 OF 5 47 47 DC LB4 PRX_MB1_IN 50_PCS_WTR_IN 50_B7_PRX_WTR_IN WTR_BB_PRX_I_P WTR_BB_PRX_I_N WTR_BB_PRX_Q_P WTR_BB_PRX_Q_N PRX_MB_CA_IN 50_DCS_WTR_IN 44 99 108 107 97 PRX_LB_CA_OUT 47 17 BGA PRX_BB_IP PRX_BB_IM PRX_BB_QP PRX_BB_QM PRX_LB2_IN 47 DC HB3 91 OUT 45 HB2 PRX_LB1_IN 42 DC 38 102 50_B8_PRX_WTR_IN BGA SYM 1 OF 5 DRX_HB2_IN C U_WTR_RF WTR1625 35 35 35 35 35 WTR_BB_TX_I_P WTR_BB_TX_I_N WTR_BB_TX_Q_P WTR_BB_TX_Q_N WTR_TX_IDAC 151 160 152 161 127 TX_BB_IP TX_BB_IM TX_BB_QP TX_BB_QM DAC_REF 35 B WTR_RTUNE 35 35 38 32 WTR_SSBI_TX_GPS WTR_SSBI_PRX_DRX 146 138 139 155 50_LB_2G_WTR_TX_OUT 40 50_B8_B26_B20_WTR_TX_OUT 42 50_B13_B17_B28_WTR_TX_OUT 41 50_B3_B4_WTR_TX_OUT 43 50_HB_2G_WTR_TX_OUT 40 50_B1_B25_B34_B39_WTR_TX_OUT GND 94 GND TX_HB1_OUT 130 50_B7_WTR_TX_OUT RTUNE TX_HB2_OUT 121 50_B40_B38_B41_WTR_TX_OUT R3702_RF 1% 1/32W MF 01005 162 NC 153 163 154 141 RADIO_WTR 4.75K 1 2 TX_LB1_OUT TX_LB2_OUT TX_LB3_OUT TX_LB4_OUT TX_MB1_OUT TX_MB2_OUT TX_MB3_OUT TX_MB4_OUT GSM_TX_PHASE_D0 123 GP_DATA0 GSM_TX_PHASE_D1 104 GP_DATA1 35 BGA SYM 3 OF 5 71 140 GND 55 118 105 95 GND GND SSBI_TX_GNSS SSBI_PRX_DRX 156 GND 131 XO_IN 43 B NC 44 44 ADC_IN 109 PDET_RFFB 117 50_FWD_OR_REV_RF 45 GND 122 50_RF_CLK RADIO_WTR 1 C3702_RF 100PF 5% 10V 2 NP0-C0G 01005 A A NOSTUFF PAGE TITLE RF TRANSCEIVER (1 0F 3) RF_CLK IS SHARED BETWEEN WTR AND WFR. DRAWING NUMBER LENGTH DIFFERENCE BETWEEN THE TWO SHOULD BE < 5MM. Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 37 OF 55 36 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C934 R926 L3802_RF U902 WTR TRANSCEIVER (2 OF 2) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. 38 31 PP_LDO8 VREG_2V 37 38 VREG_1P3V 37 38 WTR DECOUPLINGL3801_RF CAPS MAKE_BASE=TRUE 33 31 38 PP_LDO1 MAKE_BASE=TRUE 22NH-3%-0.25A RADIO_WTR 38 37 VREG_2V 1 MAKE_BASE=TRUE VDD_DRX_BB_2V 37 38 37 VREG_1P3V RADIO_WTR WTR DECOUPLING SHARED WITH C3808_RF MAKE_BASE=TRUE D RADIO_WTR 1 C3801_RF 2 VDD_PRX_PLL_1P3V 37 VREG_1P3V RADIO_WTR 0201 RADIO_WTR 1 C3812_RF 1 C3820_RF 100PF 5% 10UF 2 10V NP0-C0G 01005 20% 2 6.3V CERM-X5R 0.1UF 20% RADIO_WTR 1 C3808_RF NOSTUFF 20% 6.3V 2 CERM-X5R VDD_TX_DA_2V 37 RADIO_WTR 0.1UF 20% 4V 2 X5R 01005 0402 VDD_SHDR_PLL_1P3V 37 RADIO_WTR 1 C3813_RF MAKE_BASE=TRUE VDD_PRX_HBMB_1P3V 1% 1/20W MF 0201 C VDD_SHDR_VCO_1P3V RADIO_WTR VDD_PRX_LO_HB_1P3V 25 37 VDD_PRX_LB_1P3V 37 VDD_PRX_HBMB_1P3V 34 37 57 VDD_RF1_P_HMB_LO VDD_PRX_LO_HBMB_1P3V 37 VDD_PRX_PLL_1P3V 79 VDD_RF1_P_PLL 37 VDD_PRX_BB_2V 98 VDD_RF2_P_BB 37 VDD_PRX_2V 100 37 VDD_DRX_LO1_1P3V 37 BGA 37 37 VDD_RF2_T_BB 126 VDD_TX_BBF_2V 37 VDD_RF2_FBRX 116 VDD_FBRX_2V 37 VDD_RF2_T_VCO 157 VDD_TX_VCO_2V 37 VDD_RF2_P_RX VDD_RF1_T_VCO 149 VDD_TX_VCO_1P3V 37 14 VDD_RF1_D_LB_LO VDD_RF1_T_SYN 115 VDD_TX_SYNTH_1P3V 37 VDD_DRX_LO2_1P3V 38 VDD_RF1_D_LOM VDD_RF2_T_PLL 114 VDD_TX_PLL_2V 37 37 VDD_DRX_LB_1P3V 31 VDD_RF1_D_LB VDD_RF1_G_LNA 52 VDD_GPS_LNA_1P3V 37 37 VDD_DRX_HB_1P3V 22 VDD_RF1_D_HB VDD_RF1_G_VCO 74 VDD_GPS_VCO_1P3V 37 VDD_DRX_MB_1P3V 37 VDD_DRX_LO2_1P3V 37 RADIO_WTR VDD_DRX_BB_2V 11 VDD_RF1_D_MB VDD_RF1_G_PLL 93 VDD_GPS_PLL_1P3V 37 54 VDD_RF2_D_BB VDD_RF1_G_BB 59 37 1 C3815_RF 1 C3823_RF 1 C3833_RF 2 4V X5R 01005 2 4V X5R 01005 4V 2 X5R 01005 0.1UF 20% 0.1UF 20% 37 WTR1625 VDD_TX_LO_1P3V NOSTUFF VDD_PRX_VCO_2V 37 RADIO_WTR VDD_RF2_P_VCO VDD_RF1_T_LO 135 100PF 5% 0.00 2 80 37 2 10V NP0-C0G 01005 1 VDD_PRX_VCO_2V VDD_TX_UPC_1P3V 1 C3814_RF R3801_RF 37 37 VDD_PRX_LB_1P3V 37 VDD_RF1_P_VCO VDD_TX_DA_1P3V 2 4V X5R 01005 VDD_PRX_BB_2V 37 VDD_TX_BBF_2V 37 RADIO_WTR 90 VDD_TX_DA_2V RADIO_WTR RADIO_WTR VDD_PRX_VCO_1P3V VDD_RF1_T_DA 137 37 0.1UF 20% 2 10V NP0-C0G 01005 U_WTR_RF 37 VDD_RF2_T_DA 129 VDD_DRX_LB_1P3V 1 C3821_RF 100PF 5% D 1 C3830_RF 10UF 2 4V X5R 01005 NOSTUFF 0402 VDD_PRX_LO_HB_1P3V 37 RADIO_WTR MAKE_BASE=TRUE 0.1UF 20% 72 SYM 4 OF 5 VDD_RF1_P_HB_LO VDD_RF1_T_UPC 136 VDD_RF1_P_LB VDD_RF1_P_HMB 37 VDD_SHDR_VCO_1P3V 48 VDD_RF1_S_VCO GND 113 37 VDD_SHDR_VCO_2V 62 VDD_RF2_S_VCO VDD_RF2_XO 147 37 VDD_SHDR_PLL_1P3V 78 VDD_RF1_S_PLL VDD_DIO 103 VDD_GPS_BB_1P3V C VDD_XO_2V 37 VDD_MSM_1P8V 37 R3802_RF 1 0.00 2 VDD_SHDR_VCO_2V VDD_PRX_VCO_1P3V 37 VDD_DRX_LO1_1P3V 37 RADIO_WTR 37 RADIO_WTR 1% 1/20W MF 0201 1 C3809_RF 1 C3816_RF 0.1UF 20% 0.1UF 20% DELETED C3805 PR REVIEW FEEDBACK 2 4V X5R 01005 4V 2 X5R 01005 R3803_RF 1 0.00 2 1% 1/20W MF 0201 VDD_TX_VCO_2V 37 RADIO_WTR VDD_PRX_LO_HBMB_1P3V 37 RADIO_WTR 1 C3817_RF 1 C3806_RF 2 4V X5R 01005 2 4V X5R 01005 37 0.1UF 20% 0.1UF 20% VDD_TX_PLL_2V 37 RADIO_WTR B VDD_DRX_MB_1P3V VDD_TX_SYNTH_1P3V 37 RADIO_WTR 1 C3802_RF 1 C3824_RF 2 4V X5R 01005 NOSTUFF 2 4V X5R 01005 0.1UF 20% VDD_DRX_HB_1P3V 37 RADIO_WTR 0.1UF 20% 1 R3807_RF 0.00 1% 1/20W MF 20201 R3808_RF 1 0.00 2 VDD_XO_2V 37 RADIO_WTR 0% 1/32W MF 01005 VDD_TX_LO_1P3V 37 RADIO_WTR 1 C3803_RF 1 C3825_RF 10% 2 10V X5R-CERM 0201 2 4V X5R 01005 0.1UF VDD_PRX_2V 37 0.1UF 20% 4V 2 X5R 01005 VDD_GPS MAKE_BASE=TRUE VDD_GPS_BB_1P3V VDD_TX_UPC_1P3V 37 RADIO_WTR 1 C3818_RF 1 C3826_RF 2 4V X5R 01005 2 10V NP0-C0G 01005 0.1UF 20% VDD_GPS_PLL_1P3V RADIO_WTR MAKE_BASE=TRUE 100PF 5% PP_LDO11 MAKE_BASE=TRUE VDD_MSM_1P8V 37 RADIO_WTR RADIO_WTR 1 C3811_RF 1 C3819_RF 2 6.3V X5R-CERM 0201-1 2 4V X5R 01005 1.0UF 10% A 1 37 0.1UF 20% RADIO_WTR 4V 2 X5R 01005 0.00 2 VDD_TX_VCO_1P3V RADIO_WTR 1% 1/20W MF 0201 0.1UF 20% 37 1 C3829_RF R3806_RF 38 35 34 33 31 30 39 37 1 C3828_RF 0.1UF 20% VDD_FBRX_2V 37 RADIO_WTR I175 VDD_GPS_LNA_1P3V RADIO_WTR MAKE_BASE=TRUE 89 56 83 82 58 GND GND GND GND GND 35 8 26 64 42 41 81 GND GND GND GND GND GND GND 21 6 24 39 GND GND GND GND 10 3 23 46 GND GND GND GND 49 69 88 70 63 40 GND GND GND GND GND GND 47 87 77 96 GND GND GND GND U_WTR_RF WTR1625 BGA GND 111 SYM 5 OF 5 GND 101 GND 110 VDD_GPS_VCO_1P3V 45 66 84 75 A PAGE TITLE RF TRANSCEIVER (2 OF 3) 2 DRAWING NUMBER Apple Inc. VDD_TX_DA_1P3V 37 RADIO_WTR R 1 C3827_RF NOTICE OF PROPRIETARY PROPERTY: 100PF 5% THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 10V NP0-C0G 01005 NOSTUFF 6 GND GND GND GND 37 L3802_RF 7 159 142 125 124 148 158 133 112 132 GND 164 8.2NH-3%-0.19A-1.6OHM 8 GND GND GND GND GND GND GND GND GND B 0.1UF 20% NOSTUFF 01005 145 144 143 128 120 119 106 150 134 37 1 C3807_RF 2 4V X5R 01005 1 GND GND GND GND GND GND GND GND GND 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 38 OF 55 37 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C1019 R1016 L1000 U1002 WFR TRANSCEIVER CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. U_WFR_RF WFR1620 BGA D 37 31 PP_LDO8 MB1 VREG_2V 37 38 VREG_1P3V 37 38 MAKE_BASE=TRUE 37 33 31 PP_LDO1 R3903_RF MAKE_BASE=TRUE 38 37 VREG_1P3V VDD_DIG_1P3V 38 38 37 VREG_2V RADIO_WFR 1 C3904_RF MAKE_BASE=TRUE RADIO_WFR 1 C3901_RF 1 RADIO_WFR C3903_RF 0.1UF 20% 4V 2 X5R 01005 10UF 20% 6.3V 2 CERM-X5R 1 MAKE_BASE=TRUE 0.00 2 VDD_PRX_VCO_WFR_2V 0.1UF 20% 2 4V X5R 01005 20% 2 6.3V CERM-X5R MB2 NO DC MB3 DC 43 43 0402 36 MB1 DC MB2 NO DC MB3 DC IN 47 47 47 22 16 6 50_B25_PRX_WFR_IN 50_B1_B4_PRX_WFR_IN 50_B3_PRX_WFR_IN PRX_HB_CA_IN 3 PRX_LB_CA_IN 50_B25_DRX_WFR_IN 50_B1_B4_DRX_WFR_IN 50_B3_DRX_WFR_IN 49 54 66 DRX_MB1_IN DRX_MB2_IN DRX_MB3_IN 43 DRX_HB_CA_IN 36 DRX_LB_CA_IN NC VDD_XO_WFR_2V 38 RADIO_WFR 1 C3913_RF 0.1UF 20% RADIO_WFR 4.75K 2 1 2 4V X5R 01005 52 61 D WFR_SSBI 35 34 PRX_MB_CA_OUT 5 50_WFR_PRX_MB_CA_OUT OUT 36 DRX_MB_CA_OUT 65 50_WFR_DRX_MB_CA_OUT OUT 36 R_TUNE 7 1 GND GND GND WFR_RTUNE 19 R3901_RF 0.1UF 20% 2 4V X5R 01005 VDD_DRX_LB_WFR_1P3V RADIO_WFR 50_WFR_DRX_LB_CA_IN IN 36 GND SSBI_PRX_DRX 13 50_WFR_PRX_LB_CA_IN NC VDD_DRX_LO_1P3V 38 RADIO_WFR 1 C3905_RF SYM 1 OF 2 RX_OTHER PRX_MB1_IN PRX_MB2_IN PRX_MB3_IN 27 50_WFR_PRX_HB_CA_IN 38 RADIO_WFR 1 C3912_RF 1% 1/20W MF 0201 10UF 0402 DC 43 RADIO_WFR PRX_BB_IP PRX_BB_IM PRX_BB_QP PRX_BB_QM 29 28 25 30 WFR_BB_PRX_I_P WFR_BB_PRX_I_N WFR_BB_PRX_Q_P WFR_BB_PRX_Q_N DRX_BB_IP DRX_BB_IM DRX_BB_QP DRX_BB_QM 62 63 57 64 WFR_BB_DRX_I_P WFR_BB_DRX_I_N WFR_BB_DRX_Q_P WFR_BB_DRX_Q_N 35 35 35 35 35 35 35 35 XO_IN 1% 1/32W MF 01005 38 36 32 50_RF_CLK RADIO_WFR 1 C3919_RF 100PF 5% C C 2 10V NP0-C0G 01005 NOSTUFF I113 VDD_DRX_MB_HB_FE_1P3V RADIO_WFR 1 C3907_RF VDD1_DRX_BB_2V 38 RADIO_WFR 1 C3915_RF 38 0.1UF 0.1UF 20% 2 4V X5R 01005 20% 2 4V X5R 01005 U_WFR_RF NOSTUFF WFR1620 I114 VDD_PRX_MBHB_FE_1P3V RADIO_WFR 1 C3908_RF BGA VDD1_PRX_BB_2V 38 RADIO_WFR 1 C3916_RF 0.1UF 20% 0.1UF 20% 2 4V X5R 01005 2 4V X5R 01005 NOSTUFF VDD_PRX_LB_FE_1P3V B 38 VDD_PRX_VCO_WFR_2V 37 VDD_RF2_P_VCO 38 33 VDD_PRX_VCO_WFR_1P3V VDD_RF1_P_VCO 38 VDD_PRX_LO_WFR_1P3V31 VDD_RF1_P_LO GND 42 38 44 VDD_PRX_PLL_WFR_1P3V VDD_RF1_P_PLL GND 53 38 VDD_PRX_LB_FE_1P3V 15 VDD_RF1_P_LB_FE GND 20 38 VDD1_PRX_BB_2V VDD_RF2_P_BB GND 51 38 10 VDD_PRX_MBHB_FE_1P3V VDD_RF1_P_MHB_FE GND 41 38 VDD_DRX_LO_1P3V 47 VDD_RF1_D_LO GND 45 38 VDD1_DRX_BB_2V 56 VDD_RF2_D_BB GND 50 38 VDD_DRX_LB_WFR_1P3V39 23 GND 46 SYM 2 OF 2 PWR_GND GND 35 38 R3902_RF 1 0.00 2VDD_PRX_VCO_WFR_1P3V 1% 1/20W MF 0201 B GND 18 RADIO_WFR 38 39 37 35 34 33 31 30 RADIO_WFR 1 C3910_RF PP_LDO11 VDD1_1P8V 38 RADIO_WFR 1 C3917_RF MAKE_BASE=TRUE 0.1UF 20% 38 59 VDD_RF1_D_MHB_FE VDD_DRX_MB_HB_FE_1P3V 38 VDD_DIG_1P3V 0.1UF 20% 2 4V X5R 01005 2 4V X5R 01005 VDD1_1P8V 38 VDD_XO_WFR_2V GND 11 24 VDD_RF1_DIG GND 21 14 GND GND 32 VDD_DIO GND 4 VDD_RF2_XO GND 38 2 38 GND 9 VDD_RF1_D_LB_FE 17 GND 55 VDD_PRX_PLL_WFR_1P3V 38 RADIO_WFR 1 C3911_RF GND 40 GND 60 0.1UF 20% GND 48 2 4V X5R 01005 GND 58 GND 26 GND 8 VDD_PRX_LO_WFR_1P3V 38 RADIO_WFR GND 12 1 C3902_RF 0.1UF 20% 2 4V X5R 01005 A A PAGE TITLE RF TRANSCEIVER (3 OF 3) DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 39 OF 55 38 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C1110 R1102 L1104 U1101 QFE DCDC CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D XW4001_RF SHORT-10L-0.25MM-SM 39 31 26 23 17 16 15 14 12 10 52 51 48 PP_VCC_MAIN 1 VBATT_SW 39 2 NOSTUFF SHOULD BE PLACED MAX 0.25MM AWAY FROM QPOET 1 48 39 31 14 12 10 26 23 17 16 15 52 51 PP_VCC_MAIN 1 C4001_RF 10UF 20% 6.3V XW4002_RF 2 CERM-X5R SHORT-10L-0.25MM-SM 0402 1 2 SW_GROUND 44 43 42 41 39 VPA_ET 2 0201 QFE1100 VBATT_SW 28 VDD_BUCK 39 SW_GROUND 27 GND_BUCK 7 2 35 IN ET_DAC_P ET_DAC_N 44 43 42 41 40 35 30 BI RFFE1_DATA 35 44 43 42 41 40 35 30 IN 26 RFFE1_CLK BI PA_CTL_QFE PP_VCC_MAIN 1 32 39 31 26 23 17 16 15 14 12 10 52 51 48 QPOET_BATT 14 BYP_BATT 10 BYP_LOAD 39 39 NOSTUFF BOTH XW’S > 1.0MM TO CREATE INDUCTANCE C U_QPOET L4002_RF 22-OHM-25%-1800MA RADIO_QPOET 2 SCLK MPP1 20 VDD_AMP 5 C_BUCK 11 C_BUCK 12 19 VSW_BOOST USID_LSB GND GND_BOOST 39 41 42 43 44 VPA_ET RADIO_QPOET RADIO_QPOET 1 C4008_RF 470PF 4.7UF 20% GSM_CAP 39 VPA_BATT RADIO_QPOET 1 RADIO_QPOET C4005_RF 20UF 1 RADIO_QPOET R4001_RF CRITICAL TO STAY @ 4.7UF TO MEET QPOET TIMING 20% 6.3V 2 CERM-X5R 0402 GND_AMP 3 C VPA_ET_FILTER 2.2 41 42 43 44 VOUT_BOOST 39 10% X5R 2 10V 01005 2 10V X5R-CERM 0402 GSM_CAP GND 1 31 39 48 51 10 12 14 15 16 17 23 26 52 44 43 42 41 39 VPA_APT 1 C4007_RF VOUT_BOOST 25 L4001_RF PP_VCC_MAIN VPA_ET 44 40 PA_VBAT 18 24 30 31 33 34 35 37 38 39 2 PSB25201T-SM VPA_APT 39 C_GSM 6 (USID) RADIO_QPOET 22 PP_LDO11 1.5UH-1.95A-0.111OHM RADIO_QPOET C_SW_BUCK 8 C_SW_BUCK 9 0805 2.2UH-20%-0.7A-0.23OHM 10 12 14 15 16 17 23 26 31 39 48 51 52 APT_VINPUT 39 VDD_1P8 17 QPOET_VSW 1 VSW_BUCK 23 L4003_RF AMP_OUT 4 SDATA 21 PP_VCC_MAIN VDD_BATT 15 VDD_BATT 16 AMP_INP AMP_INM 13 BST_L BGA 5% 1/32W MF 2 01005 (CAN BE CHANGED TO 20UF) RADIO_QPOET 1 C4010_RF VOUT_BOOST_GND 470PF 10% 2 10V 39 X5R 01005 MITIGATE RX1 DESENSE IN VLB (B13) B B BOOST FILTER I/O @ 1.8V L4004_RF 22-OHM-25%-1800MA 34 33 31 30 39 38 37 35 PP_LDO11 39 VOUT_BOOST 1 2 APT_VINPUT 39 0201 RADIO_QPOET RADIO_QPOET 1 C4002_RF RADIO_QPOET 1 C4003_RF 10UF 1 C4006_RF 10UF 20% 2 6.3V CERM-X5R 10UF 20% 6.3V 2 CERM-X5R 0402 20% 2 6.3V CERM-X5R 0402 39 0402 VOUT_BOOST_GND 2 XW4004_RF SHORT-10L-0.25MM-SM NOSTUFF 1 A A PAGE TITLE QFE DCDC DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 40 OF 55 39 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C1208 R1200 L1204 U1201 2G PA CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D PP_BATT_VCC 46 45 26 25 16 14 VPA_APT 39 44 RADIO_2G RADIO_2G RADIO_2G 1 C4108_RF 1 C4109_RF 2.2UF 2.2UF 1 C4107_RF 56PF 5% 2 16V NP0-C0G 01005 2 RADIO_2G 20% 6.3V X5R 0201-1 2 20% 6.3V X5R 0201-1 1 C4112_RF 1 100PF 2 5% 16V NP0-C0G 01005 C4119_RF 220PF 2 2% 50V C0G 0201 NOSTUFF C4103_RF 100PF 50_HB_2G_WTR_TX_OUT 1 36 L4102_RF 2 3.0NH+/-0.1NH-0.6A 5% 16V NP0-C0G 01005 10 4 1 VBATT 1 50_HB_2G_PA_IN5 HB_RF_IN LGA HB_RF_OUT 12 50_LB_2G_PA_IN6 LB_RF_IN LB_RF_OUT 7 VIO 3 SCLK 1 SDATA 2 8 9 11 100PF 36 50_LB_2G_WTR_TX_OUT 1 45 12PF 5% 25V 2 NP0-C0G-CERM 0201-2 50_HB_2G_PA_OUT 50_LB_2G_PA_OUT RFFE_VIO RFFE1_CLK RFFE1_DATA 50_HB_2G_ASM_IN RADIO_2G 1 C4117_RF +/-0.05PF 25V 2 C0G 0201 C NOSTUFF 35 41 43 44 45 46 48 L4101_RF 30 35 39 41 42 43 44 30 35 39 41 42 43 44 6.2NH-3%-0.4A 1 THRM PAD 50_LB_2G_ASM_IN 45 2 0201 13 GND RADIO_2G C4104_RF 2 0201 C4113_RF 0.8PF V2G U_2GPARF SKY77356-11 C RADIO_2G RADIO_2G 1 C4118_RF 1.2PF +/-0.1PF 2 25V C0G-CERM 0201 2 5% 16V NP0-C0G 01005 B B A A PAGE TITLE 2G PA DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 41 OF 55 40 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C1332 R1300 L4215_RF U1304 VERY LOW BAND PAD (B13, B17, B28) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. L4216_RF 8.2NH-3%-0.19A-1.6OHM D 1 2 50_B28A_ASM_TRX D 45 01005 1 1 L4207_RF 44 43 42 39 01005 1 RADIO_VLB_PAD 2 100PF 1 2 50_B28_WTR_TX_OUT 5% 16V CERM 01005 NOSTUFF 1 1 1 C4229_RF 12PF 68PF 5% 2 16V NP0-C0G 01005 5% 16V 2 CERM 01005 L4217_RF 8.2NH-3%-0.19A-1.6OHM PLACE INDUCTOR CLOSE TO PA 1 2 C4228_RF 50_B28B_ASM_TRX 45 01005 1PF RADIO_VLB_PAD 1 C4207_RF +/-0.1PF 16V NP0-C0G 01005 2 1 1 1.0UF 20% +/-0.1PF 16V 2 NP0-C0G 01005 L4208_RF 18NH-3%-140MA RADIO_VLB_PAD NOSTUFF 29 28 35 01005 VBAT VCC1 VCC2 B28A_ANT B28B_ANT B17_ANT B13_ANT 40 B28_IN 39 B17_IN 37 B13_IN 50_B28_PAD_IN 50_B17_PAD_IN 50_B13_PAD_IN 100PF 1 2 50_B17_FILTER_TX_OUT 1 RADIO_VLB_PAD L4204_RF 41 22NH-5%-0.1A 41 U_VLBPAD SKY77802-12 LGA 22 11 25 8 BAND17 LFL15710MTCTD717 1 1 50_B29_PAD_ANT 31 42 VIO SCLK 33 SDATA 32 2 RADIO_VLB_PAD 1 LB_VLB_VIO 2 RFFE_VIO 100PF THRM PAD 1 2 5 6 7 10 9 12 13 14 16 18 19 20 21 23 24 26 27 30 34 36 38 5% 10V NP0-C0G 01005 1 1 2 50_B17_ASM_TRX 45 C 5% 10V NP0-C0G 01005 RADIO_VLB_PAD 35 40 43 44 45 46 48 35 39 40 42 43 44 L4223_RF 3.3NH+/-0.1NH-290MA C4230_RF 2 50_B13_ASM_TRX 45 01005 15PF 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 GND 1 2 GND C4227_RF 1 1 2 50_B13_FILTER_TX_OUT OUT 50_B17_PAD_LPF_OUT C4220_RF 41 IN +/-0.1PF 2 16V NP0-C0G 01005 RFFE1_CLK 30 RFFE1_DATA 01005 100PF 50_B17_PAD_LPF_IN 4 1.0PF L4224_RF 15 RX_OUT 2 01005 22-OHM-25%-0.2A-0.9DCR 01005 NOSTUFF C4226_RF 6.8NH-3%-0.210A PLACE INDUCTOR CLOSE TO PA B29_RX_IN 17 3 SW1 CTRL_VLB_BAND_SELECT_1 4 SW2 CTRL_VLB_BAND_SELECT_2 RADIO_VLB_PAD 0402 L4222_RF 50_B28A_PAD_ANT 50_B28B_PAD_ANT 50_B17_PAD_ANT 50_B13_PAD_ANT 1 3 RADIO_VLB_PAD C RADIO_VLB_PAD RADIO_VLB_PAD FL_B17LP 2 C4205_RF 5% 10V NP0-C0G 01005 C4213_RF 1.0PF 2 10V X5R-CERM 0201-1 41 +/-0.1PF 16V NP0-C0G 01005-1 2 C4208_RF VPA_BATT 44 43 42 39 5% 10V NP0-C0G 01005 RADIO_VLB_PAD 47PF C4204_RF 41 C4209_RF 2 NOSTUFF RADIO_VLB_PAD C4211_RF 2.4PF 18NH-3%-140MA VPA_ET 2 1 5% 16V NP0-C0G-CERM 01005 C4231_RF 1.0PF +/-0.1PF 2 16V NP0-C0G 01005 RADIO_VLB_PAD L4205_RF RADIO_VLB_PAD NOSTUFF 22NH-5%-0.1A 01005 NOSTUFF PLACE INDUCTOR CLOSE TO PA 2 L4221_RF 5.1NH-3%-0.250A 1 50_B29_ASM_TRX 2 45 01005 1 NOSTUFF RADIO_VLB_PAD B B L4206_RF 18NH-3%-140MA 01005 2 L4211_RF C4221_RF 22NH-3%-0.25A 100PF 1 50_B13_B17_B28_B29_PAD_RX PP_LDO14_RFSW 5% 10V NP0-C0G 01005 2 FL_B13TX SAW-BAND13-TX-INTERSTAGE 2 16V CERM 01005 1 RADIO_VLB_PAD C4202_RF 100PF 50_VLB_SW_MCH_IN 1 2 50_B13_B17_B28_WTR_TX_OUT 5% 10V NP0-C0G 01005 50_VLB_SW_MCH_IN 41 GND RF1 RF2 RF3 RF4 41 50_B28_WTR_TX_OUT 50_B13_WTR_TX_OUT 50_B17_WTR_TX_OUT 8 7 1 1 INPUT_UNBAL OUTPUT_UNBAL 4 50_B13_FILTER_TX_OUT 41 RADIO_VLB_PAD RADIO_VLB_PAD 22NH-5%-0.1A C4225_RF 01005 100PF 1 50_B17_WTR_FILT_IN 2 A FL_B17TX LGA 22NH-5%-0.1A 6 V1 1 0 1 BAND B28 B13 B17 VERY LOW BAND PAD B8822 L4213_RF V2 0 1 1 PAGE TITLE SAW-BAND17-TX-INTERSTAGE 1 RADIO_VLB_PAD 22NH-5%-0.1A NOSTUFF 01005 NOSTUFF L4212_RF 5% 10V NP0-C0G 01005 RADIO_VLB_PAD L4202_RF 2 2 16V NP0-C0G 2 1 01005 50_B13_TX_FILT_IN RADIO_VLB_PAD 6 5 7 4 8 9 A 36 2 5% 10V NP0-C0G 01005 VDD BGA RADIO_WTR 1 C4219_RF LGA 100PF 3 V1 2 V2 36 B8817 C4224_RF RADIO_VLB_PAD U_VLB_SW CXA2973GC 50_B13_B17_B28_B29_PRX_WTR_IN +/-0.1PF 47PF 5% 1 2 100PF 5% 10V NP0-C0G 01005 2 0201 1.0PF RADIO_VLB_PAD 1 C4201_RF RADIO_VLB_PAD RADIO_VLB_PAD 1 C4203_RF 1 C4206_RF 100PF 29 31 42 1 GND GND GND CTRL_VLB_BAND_SELECT_2 2 3 5 41 50_B13_B17_B28_B29_MCH_RX DRAWING NUMBER 1 INPUT_UNBAL OUTPUT_UNBAL 4 50_B17_FILTER_TX_OUT 41 Apple Inc. GND GND GND CTRL_VLB_BAND_SELECT_1 01005 RADIO_VLB_PAD 2 2 3 5 41 2 5% 16V NP0-C0G 01005 R NOTICE OF PROPRIETARY PROPERTY: RADIO_VLB_PAD THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 42 OF 55 41 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C4318_RF R1400 L4322_RF U1402 LOW BAND PAD (B8, B26, B20) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. RADIO_WTR L4314_RF C4309_RF 100PF D 1 2 18NH+/-3%-0.250A 1 50_B20_MATCH_1 2 50_B20_PRX_WTR_IN D 36 0201 RADIO_WTR 5% 16V NP0-C0G 01005 1 C4312_RF 0.8PF +/-0.05PF 16V 2 C0G-CERM 01005 NOSTUFF RADIO_WTR L4312_RF C4310_RF 100PF 1 7.5NH+/-3%-0.2A 2 50_B26_MATCH_2 VPA_ET 1 2 50_B26_PRX_WTR_IN L4313_RF 39 41 43 44 8.2NH-3%-0.19A-1.6OHM 1 2 CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING 50_B26_MATCH_1 01005 RADIO_WTR 1 C4314_RF 47PF 5% 2 16V CERM 01005 VPA_BATT 44 43 41 39 RADIO_LB_PAD CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING C4304_RF 100PF 50_B20_WTR_TX_OUT 1 42 2 5% 10V NP0-C0G 01005 C CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING 1 1 01005 L4315_RF 2 15NH-3%-0.140A 250_B8_MATCH_1 1 VBATT VCC1 VCC2 CTRL_LB_BAND_SELECT_1 28 SW1 CTRL_LB_BAND_SELECT_2 27 SW2 42 RADIO_LB_PAD 42 C4303_RF 100PF 50_B26_WTR_TX_OUT1 1 RADIO_LB_PAD 50_B20_PAD_IN 50_B26_PAD_IN 50_B8_PAD_IN 2 5% 10V NP0-C0G 01005 U_LBPAD LGA 1 RADIO_LB_PAD L4322_RF 22NH-5%-0.1A L4304_RF 22NH-5%-0.1A 01005 01005 NOSTUFF 2 50_B8_PRX_WTR_IN 36 C4313_RF 0.9PF B20RX 25 B26RX 20 B8RX 10 SKY77803-12 34 B20IN 33 B26IN 31 B8IN 1 01005 5% 16V NP0-C0G 01005 5 6 36 NOSTUFF C RADIO_WTR C4311_RF 100PF RADIO_LB_PAD L4303_RF 22NH-5%-0.1A 42 36 01005 5% 16V NP0-C0G 01005 NOSTUFF +/-0.05PF 16V 2 CERM 01005 50_B20_PAD_RX 50_B26_PAD_RX 50_B8_PAD_RX B20ANT 22 B26ANT 17 B8ANT 14 50_B20_PAD_ANT 50_B26_PAD_ANT 50_B8_PAD_ANT VIO 3 SCLK 1 SDATA 2 LB_VLB_VIO RFFE1_CLK RFFE1_DATA L4316_RF 4.3NH-3%-0.270A 41 1 2 30 35 39 40 41 43 44 50_B20_ASM_TRX 1 RADIO_LB_PAD 2 2 NOSTUFF 2 2 5% 10V NP0-C0G 01005 B +/-0.1PF 2 16V NP0-C0G 01005 01005 37 38 39 40 41 42 43 44 45 46 47 48 4 7 8 9 11 13 12 15 16 18 19 21 23 24 26 29 30 32 35 C4302_RF 100PF 50_B8_WTR_TX_OUT1 C4317_RF 1.0PF L4308_RF 18NH-3%-140MA RADIO_LB_PAD 42 1 PLACE INDUCTOR CLOSE TO PA THRM PAD GND 45 01005 30 35 39 40 41 43 44 L4320_RF 1 B 4.3NH-3%-0.270A RADIO_LB_PAD 1 L4305_RF 22NH-5%-0.1A 50_B26_ASM_TRX 2 45 01005 01005 NOSTUFF PLACE INDUCTOR CLOSE TO PA 2 1 C4318_RF 0.6PF +/-0.05PF 2 16V CERM 01005 PP_LDO14_RFSW L4321_RF 3.6NH+/-0.1NH-0.280A DECOUPLING SHARED W C4201_RF 42 41 31 29 CTRL_LB_BAND_SELECT_1 CTRL_LB_BAND_SELECT_2 1 42 1 C4301_RF A 36 WTR OUTPUT HAS DC FIRST SHUNT MUST BE A CAPACITOR. 3 V1 2 V2 R4301_RF 0.0050_LB_SW_MCH_IN 1 2 50_LB_SW_T_MCH 1 42 GND 0% 1/32W MF 01005 5% 10V NP0-C0G 01005 RF1 RF2 RF3 RF4 6 5 7 4 18NH-3%-140MA 42 50_B8_WTR_TX_OUT 50_B20_WTR_TX_OUT 50_B26_WTR_TX_OUT 01005 42 42 42 V2 0 1 1 V1 1 0 1 RADIO_LB_PAD NOSTUFF BAND B8 B20 B26 2 A 8 9 100PF 50_B8_B26_B20_WTR_TX_OUT 1 2 PAGE TITLE C4320_RF LOW BAND PAD DRAWING NUMBER 0.5PF +/-0.05PF 16V 2 C0G-CERM 01005 Apple Inc. R NOSTUFF NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 45 1 C4307_RF 10PF 5% 2 16V CERM 01005 NOSTUFF L4306_RF 50_LB_SW_MCH_IN U_LB_SW CXA2973GC BGA 50_B8_ASM_TRX RADIO_LB_PAD PLACE INDUCTOR CLOSE TO PA RADIO_LB_PAD VDD RADIO_LB_PAD 2 01005 1 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 43 OF 55 42 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C4426_RF R1500 L4409_RF U1501 MID BAND PAD (B1, B25, B3, B4, B34, B39) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. RADIO_WFR L4404_RF C4420_RF 2.2NH+/-0.1NH-0.380A 100PF 1 2 2 50_B3_PRX_WFR_IN 38 01005 5% 16V NP0-C0G 01005 D 1 50_B3_MATCH_1 D RADIO_WFR L4403_RF 3.6NH+/-0.1NH-0.280A C4425_RF 33PF 1 2 01005 1 2 50_B3_MATCH_1_MATCH 5% 16V NP0-C0G-CERM 01005 NOSTUFF VPA_ET L4405_RF 39 41 42 44 RADIO_MB_PAD RADIO_MB_PAD 1 C4408_RF 1 C4409_RF 5% 2 16V CERM 01005 5% 2 16V CERM 01005 47PF 1.5NH+/-0.1NH-220MA 1 47PF 2 2.7NH+/-0.1NH-0.370A RADIO_MB_PAD 1 1 R4401_RF 2 0.00 0% 01005 RADIO_WFR 1/32W MF 201005 NOSTUFF VPA_BATT RADIO_MB_PAD RADIO_WFR 1 1.0UF 1 50_B3_B4_WTR_TX_OUT 1 C4401_RF 18PF 2% 26 B1/3/4ANT B25ANT B34/39TX NOSTUFF VIO SCLK SDATA 2 4 6 7 9 11 14 13 15 17 18 19 20 21 22 23 25 28 29 30 31 32 33 5% 16V NP0-C0G 01005 L4421_RF RADIO_WFR RADIO_MB_PAD 1 2 01005 45 46 48 35 40 41 44 42 44 30 35 39 40 41 44 30 35 39 40 41 42 NOSTUFF 1 C4410_RF 0.6PF R4402_RF 4 IN OUT 50_B34_B39_LPF_IN 2 50_B34_B39_LPF_OUT 1 1 C4414_RF 12PF 5% 2 16V CERM 01005 TDD-LTE +/-0.05PF 2 16V CERM 01005 RADIO_MB_PAD 0.00 2 50_B34_B39_HB_SWITCH_IN 46 0% 1/32W MF 01005 GND NOSTUFF RADIO_MB_PAD 37 38 39 40 41 42 43 44 45 46 47 48 1 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 100PF 50_B1_B25_B34_B39_WTR_TX_OUT 2 50_B25_MATCH_2 5% FL_B39LP 16V NP0-C0G-CERM BAND34-39 01005 LFL151G95TCSD734 0402 0.9NH+/-0.1NH-0.32A-0.6OHM EPAD EPAD EPAD EPAD EPAD EPAD EPAD EPAD EPAD EPAD EPAD EPAD RADIO_MB_PAD 36 1 16 50_B1_B3_B4_PAD_ANT 8 50_B25_PAD_ANT 24 50_B34_B39_PAD_ANT 1 RFFE_VIO 2 RFFE1_CLK 3 RFFE1_DATA 33PF RADIO_MB_PAD LGA 34 B1/25/34/39IN 50_B1_B25_B34_B39_PAD_IN C4404_RF C C4423_RF 2 B3RX 12 50_B3_PAD_RX B1/4RX 10 50_B1_B4_PAD_RX B25RX 5 50_B25_PAD_RX AFEM-8020-AP1 RADIO_MB_PAD 38 01005 RADIO_MB_PAD 1 C4406_RF 2 16V CERM 01005 NOSTUFF B3/4IN 50_B25_PRX_WFR_IN 3.5NH+/-0.1NH-0.280A U_MBPAD 18PF 2% 2 16V CERM 01005 27 36 35 50_B3_B4_PAD_IN 2 5% 16V NP0-C0G RADIO_MB_PAD 01005 2 01005 1 1 3 36 1 50_B25_MATCH_1 L4402_RF VCC1 VCC2 100PF 2 5% 16V NP0-C0G 01005 VBATT C4403_RF 2.0NH+/-0.1NH-0.380A 100PF 20% 10V 2 X5R-CERM 0201-1 RADIO_MB_PAD L4409_RF C4422_RF 1 C4407_RF C 38 L4406_RF MB_ET_RC_FILT 44 42 41 39 50_B1_B4_PRX_WFR_IN 01005 L4407_RF 1.0NH+/-0.1NH-0.580A 1 2 50_B1_B3_B4_ASM_TRX 45 01005 1 C4418_RF 0.2PF +/-0.1PF 2 16V NP0-C0G 01005 NOSTUFF B B L4408_RF 3.8NH-+/-0.1NH-0.27A 1 2 50_B25_ASM_TRX 45 01005 1 1 1.2PF 2 C4419_RF 1.5PF C4413_RF 2 +/-0.05PF 16V NP0-C0G-CERM 01005 +/-0.05PF 16V NP0-C0G-CERM 01005 A A PAGE TITLE MID BAND PAD DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 44 OF 55 43 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C4533_RF R1600 L1616 U1601 HIGH BAND PAD (B7, B38, B40, B41, XGP) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D RADIO_WTR D VPA_ET 39 41 42 43 L4512_RF C4521_RF 3.3NH+/-0.1NH-290MA 100PF 1 1 C4507_RF 68PF 2 50_B7_MATCH_11 50_B7_PRX_WTR_IN 2 01005 5% 5% 16V 2 NP0-C0G 01005 36 RADIO_WTR 16V NP0-C0G 01005 C4522_RF 1.8PF 1 2 +/-0.1PF 16V NP0-C0G 01005 L4509_RF 2.1NH+/-0.1NH-0.6A RADIO_HB_PAD 50_B7_PAD_MTCH 2 1 0.2PF 2 +/-0.1PF 0% 1/32W MF 01005 RADIO_HB_PAD RADIO_HB_PAD 2 16V NP0-C0G 2% 16V CERM 01005 1 C4503_RF 01005 VPA_BATT 43 42 41 39 1.0PF +/-0.1PF NOSTUFF 2 16V NP0-C0G 01005 VPA_APT 39 1.0UF 20% 50_B7_PAD_IN C4533_RF B7IN 50_B38_B40_B41_PAD_IN 26 B38/40/41IN RADIO_HB_PAD 1 19 B7RX B7ANT B41B B40/B41 B41C B40A/B41A VIO SCLK SDATA C4502_RF 1PF 2 4 6 8 10 13 12 14 16 17 18 22 23 GND GND GND GND GND GND GND GND GND GND GND GND GND +/-0.1PF 16V 2 NP0-C0G 01005 C4531_RF 50_B40A_TX_HB_SWITCH_MCH 2 7 3 5 9 0.7PF 27 RFFE_VIO 28 RFFE1_CLK 1 RFFE1_DATA L4520_RF 1 46 35 43 30 40 30 40 43 48 40 43 35 41 35 41 1 L4523_RF 9.1NH-3%-0.17A-1.7OHM 01005 01005 2 2 L4515_RF 2.2NH+/-0.1NH-0.380A 1 50_B40A_TX_HB_SWITCH_IN 2 50_B41C_FILTER_IN 44 01005 1 1 L4521_RF L4528_RF 22NH-3%-0.12A-3.2OHM 01005 2 2 LGA GND GND GND GND 1 1.2NH+/-0.1NH-0.550A 50_B41A_TX_HB_SWITCH_IN 1 46 2 50_B40A_B41A_FILTER_IN 01005 50_B41A_TX_HB_SWITCH_MCH TDD-LTE 2 +/-0.1PF 16V NP0-C0G 01005 1 9 7 8 GND GND L4501_RF 3.0PF B L4516_RF C4528_RF BAND_40A 3 BAND_41A 1 5 2 4 1 01005 NOSTUFF LTE-BAND-40A-41A-TX ANT 6.8NH-3%-140MA RADIO_HB_PAD 2 6 50_B40A_B41A_FILTER_IN TDD-LTE 9.1NH-3%-0.17A-1.7OHM 01005 44 2 50_B40_TX_HB_SWITCH_IN 01005 L4527_RF 7.5NH+/-3%-0.2A FT40A41A 2.2NH+/-0.1NH-0.380A 4 1 UNBAL_PRT450_B40_TX_FILTER_OUT UNBAL_PRT1 01005 41 45 39 42 39 42 L4526_RF LGA 50_B40_TX_FILTER_IN1 2 1 L4506_RF B C TX-BAND40-LTE SAFFU2G35MA0F57 1.3NH+/-0.1NH-0.400A 50_B41B_TX_PAD 50_B40_B41_TX_PAD 50_B41C_TX_PAD 50_B40A_B41A_TX_PAD 5% 16V NP0-C0G-CERM 01005 1 C4520_RF FT_B40 11 50_B7_RX_PAD 15 50_B7_ANT_PAD 15PF 1 44 +/-0.1PF 16V 2 NP0-C0G 01005 +/-0.1PF EPAD EPAD EPAD EPAD EPAD EPAD EPAD EPAD EPAD 5% 16V NP0-C0G 01005 LGA 1 NOSTUFF VAPT 21 20 U_HBPAD 50_B41B_TX_OUT 5% 16V NP0-C0G 01005 01005 AFEM-8010-AP1 2 1 C4510_RF 1.0PF 5% 25V 2 NP0-C0G-CERM 01005 29 30 31 32 33 34 35 36 37 1 RADIO_HB_PAD 68PF 5% 16V NP0-C0G 01005 2 C4532_RF 2 16V NP0-C0G RADIO_HB_PAD 25 100PF 36 VCC1 VCC2 24 RADIO_HB_PAD 1 C4506_RF 100PF VBATT C 100PF 40 1 1 10V 2 X5R-CERM 0201-1 2 50_B40_B38_B41_WTR_TX_OUT C4526_RF RADIO_HB_PAD 1 C4505_RF GND 0.00 45 GND 1 50_B7_ASM_TRX GND 50_B7_WTR_TX_OUT 2 0201 RADIO_HB_PAD 1 C4512_RF 18PF 2 3 5 36 1 C4501_RF R4506_RF L4507_RF 1.0NH+/-0.1NH-0.22A-0.9OHM 3.9NH+/-0.1NH-0.270A 01005 NOSTUFF 01005 RADIO_HB_PAD L4524_RF 2 1.8NH+/-0.1%-0.380A 2 1 250_B41B_TX_HB_SWITCH_IN 01005 L4522_RF 2.7NH+/-0.1NH-0.370A 44 2 50_B41B_FILTER_IN 01005 RADIO_HB_PAD NOSTUFF 1 RADIO_HB_PAD FT_41BC NOSTUFF L4508_RF 3.0NH+/-0.1NH-200MA 44 2.4NH+/-0.1NH-200MA 01005 A SAW-BAND-41B-41C-TDD-TX RADIO_HB_PAD L4504_RF 44 GND 01005 L4525_RF SAWEN2G58QA0F57 RF2/ 9 50_B41B_TX_HB_SWITCH_MCH 1.2NH+/-0.1NH-0.550A 1 RF1/ 50_B41B_FILTER_IN B41BIN B41BOUT 1 2 4 RF3/ LGA RF4/ 6 50_B41C_TX_HB_SWITCH_MCH 50_B41C_FILTER_IN 50_B41C_TX_HB_SWITCH_IN B41CIN B41COUT 2 2 3 5 7 8 10 2 PAGE TITLE HIGH BAND PAD 01005 GND A 1 GND 1 50_B41B_TX_OUT 44 GND GND 50_B41C_FILTER_IN GND 44 DRAWING NUMBER Apple Inc. TDD-LTE R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 45 OF 55 44 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C1702 R1700 L4608_RF U1702 ANTENNA SWITCH CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D L4608_RF 22-OHM-25%-0.2A-0.9DCR 1 VCC_ASM_FILTERED RADIO_ASM 01005 1 C4602_RF 47PF 2 R4603_RF PP_BATT_VCC 14 16 25 26 40 46 1 50_FWD_REV_CPL_OUT 1 R4601_RF 5% 16V 2 CERM 01005 105 1% 1/32W MF 2 01005 RADIO_ASM 50_B34_B39_PRX_WTR_IN 1 50_HB_SWITCH_RX 1 0.00 2 50_HB_SW_RX_ASM_MCH 0% 1/32W MF 01005 LGA 44 2 50_B34_B39_FILT_RX 1 INPUT OUT_FIL1 9 01005 OUT_FIL2 6 1 43 3.3NH+/-0.1NH-180MA 01005 2 3 4 5 7 8 10 GND L4602_RF 43 RADIO_ASM TDD-LTE RADIO_ASM 50_B7_ASM_TRX 4 50_B39_RX_ASM_OUT 22 50_B34_RX_ASM_OUT 23 50_B1_B3_B4_ASM_TRX 24 50_B25_ASM_TRX 50_HB_2G_ASM_IN 48 50_HB_DIVERSITY_ASM 20 42 41 41 42 41 42 41 TO DIVERSITY MODULE 1 B 1 48 L4603_RF RF5159 LGA 14 LBTX 50_LB_DIVERSITY_ASM 19 TRX2 TRX3 TRX0 TRX1 TRX4 TRX5 TRX11 RX2 FWD/REV 32 A2 21 A1 5 VIO SCLK SDATA C 50_ANT2_CONN 50 50_ASM_ANT1_OUT 1 0.00 2 50_ANT1_CONN 50 1% 1/20W MF 0201 26 RFFE_VIO 28 RFFE2_CLK 27 RFFE2_DATA 35 40 41 43 44 46 48 30 35 46 48 30 35 46 48 LBRF2 1 GND B C4606_RF 22PF 01005 2 NOSTUFF R4609_RF NOSTUFF RADIO_ASM RADIO_ASM 1% 1/32W MF 01005 2RADIO_ASM HBRF2 50_LB_2G_ASM_IN 1.0NH+/-0.1NH-0.22A-0.9OHM NOSTUFF 105 U_ASM_RF RX1 TRX6 TRX7 TRX8 50_B8_ASM_TRX 50_B28A_ASM_TRX 50_B28B_ASM_TRX 50_B26_ASM_TRX 50_B13_ASM_TRX 50_B20_ASM_TRX 50_B29_ASM_TRX L4604_RF 01005 RF1 RF3 RF7 8 18 9 10 16 17 11 7 RADIO_ASM RADIO_ASM 1.0NH+/-0.1NH-0.22A-0.9OHM R4602_RF 12 HBTX 40 TO DIVERSITY MODULE 50_B17_ASM_TRX 41 2 1 VDD 1 2 3 13 15 25 30 6 31 33 L4601_RF 2.4NH+/-0.1NH-200MA 36 46 BAND34-39 SAWFD1G90LC0F57 36 50_HB_SWITCH_TX R4608_RF FRX34B39 RADIO_ASM 50_FWD_OR_REV_RF 29 46 0% 1/32W MF 01005 RADIO_ASM NOSTUFF ASM NEEDS TO BE UPDATED WITH A NEW PINOUT VERSION C 0.00 2 5% 16V 2 CERM 01005 2 A A PAGE TITLE ANTENNA SWITCH DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 46 OF 55 45 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 HIGH BAND SWITCH CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D R4703_RF 36 50_B40A_PRX_WTR_IN 1 0.00 2 50_B40A_PRX_FILTER 0% 1/32W MF 01005 1 PP_BATT_VCC 14 16 25 26 40 45 L4705_RF RADIO_HBSWITCH GND 2 50_B40A_B41A_RX_MATCH 1 2 2% 16V CERM 01005 GND ANT 10 8 7 5 4 3 1 1 01005 1 50_B41A_PRX_WTR_IN 2 +/-0.1PF 16V NP0-C0G 01005 5% 16V NP0-C0G 01005 1 44 44 C4704_RF 100PF 2 50_B41A_PRX_MATCH1 1 6.0PF 36 2 44 44 50_B41A_PRX_FILTER 44 43 L4706_RF R4708_RF 1.0NH+/-0.1NH-0.580A 50_B40B_RX_MATCH 1 01005 U_HBS_RF 3.3NH+/-0.1NH-290MA 0.00 2 0% 1/32W MF 01005 2 50_B41A_PRX_MATCH2 50_B40A_TX_HB_SWITCH_IN 50_B41A_TX_HB_SWITCH_IN 50_B40_TX_HB_SWITCH_IN 50_B41B_TX_HB_SWITCH_IN 50_B41C_TX_HB_SWITCH_IN 50_B34_B39_HB_SWITCH_IN 11 12 7 8 9 10 50_B40A_B41A_RX 50_B40B_RX 50_B38X_RX 14 RX1 13 RX2 15 RX3 TX1 TX2 TX3 TX4 TX5 TX6 C CXM3652UR UQFN C4721_RF 100PF TX RF1 5 50_HB_SWITCH_TX_OUT 1 2 50_HB_SWITCH_TX 45 5% 25V C0G 0201 RX RF1 16 50_HB_SWITCH_RX 45 1 48 45 44 43 41 40 35 RADIO_HBSWITCH L4710_RF 1 C4702_RF 15PF 5% 2 16V NP0-C0G-CERM 01005 48 45 35 30 12NH-3%-0.140A 45 35 30 48 RFFE_VIO RFFE2_CLK RFFE2_DATA 4 VIO 3 SCLK 2 SDATA 01005 RADIO_HBSWITCH GND 2 THRM PAD 17 C4720_RF VBATT L4709_RF TDD-LTE RADIO_HBSWITCH 6 C C4709_RF 18PF 1 LGA RX_B41A 1 C4710_RF 47PF 5% 16V 2 CERM 01005 RADIO_HBSWITCH 885055 RX_B40A GND GND 9 6 2 RADIO_HBSWITCH FR40A41A SAW-BAND-40A-41A-TDD-RX GND 01005 GND GND 2.0NH+/-0.1NH-0.380A TDD-LTE RADIO_HBSWITCH 2.7NH+/-0.1NH-0.370A B 50_B40B_B38X_PRX_FILTER 1 1 L4704_RF L4712_RF 3.7NH-+/-0.1NH-0.27A RF3/RX_B40B RF1/ANTLGA RF2/RX_B38X 9 6 50_B38X_RX_MATCH R4707_RF 1 0.00 2 0% 1/32W MF 01005 GND 01005 885056 2 2 GND GND 5% 10V NP0-C0G 01005 1 50_B40B_B38X_PRX_MATCH2 GND 2 GND GND 1 GND 50_B40B_B38X_PRX_WTR_IN 1 3 4 5 7 8 10 100PF 36 FR38X40B SAW-BAND-40B-38X-TDD-RX L4713_RF C4701_RF 1 TDD-LTE B L4708_RF 2.9NH-+/-0.1NH-0.36A 2.7NH+/-0.1NH-0.370A 01005 01005 01005 RADIO_HBSWITCH 2 2 2 A A PAGE TITLE HIGH BAND SWITCH DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 47 OF 55 SHEET 46 OF 54 1 SIZE D https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C4826_RF R1800 L1829 U1801 RX DIVERSITY (1) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. MIDBAND MIDBAND DIVERSITY - WFR D HIGHBAND DIVERSITY - WTR L4806_RF 1 48 36 01005 1 50_B7_DRX_WTR_IN 01005 RADIO_WTR L4803_RF C4809_RF 3.6NH+/-0.1NH-0.280A 1 1 01005 L4805_RF 38 50_B3_DRX_WFR_IN 1 1 2 50_B38X_DRX_WTR_IN 1 0.00 2 RADIO_WTR 50_B38X_DRX_DSM 1 36 48 1 RADIO_WFR C4804_RF 1.6NH+/-0.1NH-0.390A 100PF 2 1 2 50_B25_DRX_WFR_IN 1 50_B25_DRX_DSM 01005 50_B25_DRX_WFR_MCH 5% 16V01005 NP0-C0G RADIO_WFR L4802_RF C4802_RF 2.3NH+/-0.1NH-0.370A 33PF 0.8PF 1 2 1 5% 16V NP0-C0G-CERM 01005 1 50_B40_DRX_WTR_IN 2 50_B40_DRX_FILTER 1 36 50_B20_B29_DRX_WTR_IN 2 01005 50_B20_B29_DRX_WTR_MCH 01005 1 C4832_RF 0.8PF +/-0.05PF 16V 2 C0G-CERM 01005 2.4NH+/-0.1NH-0.370A 50_B25_DRX_MATCH 48 5% 10V NP0-C0G 01005 1 L4812_RF 2 2 01005 RADIO_WTR C4816_RF 100PF 1 2 50_B41A_DRX_FILTER 50_B41A_DRX_WTR_MCH 5% 16V01005 R4817_RF MIDBAND DIVERSITY - WTR 36 C4830_RF 15PF 2.0NH+/-0.1NH-0.380A 50_B34_DRX_WTR_IN1 50_B41A_DRX_WTR_IN 2 1 50_B34_DRX_DSM 1 0.00 2 0% 1/32W MF RADIO_WTR01005 RADIO_WTR L4807_RF 36 48 01005 RADIO_WTR B RADIO_WTR C4827_RF 100PF 50_B20_B29_DRX_DSM 1 2 L4823_RF 22NH-5%-0.1A 0.4NH+/-0.1NH-0.990A 36 C RADIO_WTR L4830_RF 48 C4831_RF 48 5% 10V NP0-C0G 01005 +/-0.05PF 2 16V C0G-CERM 01005 2 RADIO_WTR 38 50_B13_B17_DRX_WTR_MCH 01005 L4804_RF RADIO_WTR C4825_RF 100PF 1 2 50_B13_B17_DRX_DSM 2 01005 50_B13_B17_DRX_WTR_IN L4814_RF 5% 50_B3_DRX_WFR_MCH_MATCH 16V NP0-C0G-CERM 01005 C4820_RF L4826_RF 22NH-5%-0.1A 1.8NH+/-0.1%-0.380A 1 48 0.3PF 0% 1/32W MF 01005 2 50_B8_B28B_DRX_DSM +/-0.05PF 2 16V C0G-CERM 01005 0.00 2 NP0-C0G 01005 C 1 2 5% 16V NP0-C0G 01005 50_B8_B28B_DRX_WTR_MCH RADIO_WTR 36 1 01005-1 R4818_RF 50_B3_DRX_DSM 48 100PF 2 0% 1/32W MF 01005 RADIO_WFR C4805_RF 100PF 1 2 L4801_RF C4824_RF2.4NH+/-0.1NH-0.370A 33PF 2 50_B7_DRX_MATCH1 50_B3_DRX_WFR_MCH 5% 16V01005 01005 1 2 +/-0.1PF 16V NP0-C0G 01005 1.8NH+/-0.1%-0.380A 1 50_B8_B28B_DRX_WTR_IN 48 R4811_RF 1.1PF 2 50_B7_DRX_DSM 5% 16V01005 NP0-C0G RADIO_WTR C4823_RF 18NH-3%-0.140A 100PF 1 2 50_B7_DRX_WTR_MCH 2 L4825_RF C4813_RF 3.3NH+/-0.1NH-290MA 50_B1_B4_DRX_DSM 2 D RADIO_WTR RADIO_WTR L4813_RF 1.8NH+/-0.1%-0.380A 50_B1_B4_DRX_WFR_IN 38 LOWBAND DIVERSITY - WTR 36 RADIO_WTR L4829_RF C4826_RF 8.2NH-3%-0.19A-1.6OHM 100PF 50_B26_B28A_DRX_DSM 1 2 2 50_B26_B28A_DRX_WTR_IN 1 48 NP0-C0G L4815_RF 1 1.3NH+/-0.1NH-0.400A 2 1 13NH-+/-0.3%-0.14A 01005 5% 50_B41A_DRX_WTR_MCH_MATCH 16V NP0-C0G-CERM 01005 RADIO_WTR L4808_RF B L4827_RF 2 01005 48 01005 48 01005 50_B26_B28A_DRX_WTR_MCH 5% 16V NP0-C0G 01005 2 3.6NH+/-0.1NH-180MA 1 2 01005 NOSTUFF RADIO_WTR RADIO_WTR C4817_RF 100PF 2 1 2 50_PCS_DSM_OUT 48 50_PCS_WTR_RX_MCH 5% 16V01005 L4819_RF 2.2NH+/-0.1NH-0.380A RADIO_WTR L4809_RF 36 RADIO_WTR C4808_RF 100PF 2 50_B39_DRX_WTR_MCH1 1 2 50_B39_DRX_DSM 48 1 50_PCS_WTR_IN 01005 2.0NH+/-0.1NH-0.380A 36 50_B39_DRX_WTR_IN 1 01005 NP0-C0G RADIO_WTR C4811_RF 5% 16V01005 NP0-C0G RADIO_WTR 47PF 1 L4810_RF C4806_RF 33PF 2.2NH+/-0.1NH-0.380A 1 2 1 L4820_RF 2.7NH+/-0.1NH-0.370A 2 1 2 5% 50-PCS_DRX_WTR_MCH2 16V CERM 01005 01005 2 01005 5% 50_B39_DRX_WTR_MCH2 16V NP0-C0G-CERM 01005 L4822_RF A 2.2NH+/-0.1NH-0.380A 36 50_DCS_WTR_IN 1 A 100PF 1 2 01005 RADIO_WTR C4818_RF 2 50_DCS_DSM_OUT PAGE TITLE 48 50_DCS_WTR_RX_MCH 5% 16V01005 NP0-C0G RX DIVERSITY DRAWING NUMBER RADIO_WTR C4812_RF 47PF 1 2 L4821_RF Apple Inc. 5.6NH-3%-0.23A-1.3OHM 1 R 2 NOTICE OF PROPRIETARY PROPERTY: 01005 5% 50_DCS_DRX_WTR_MCH2 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 16V CERM 01005 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 48 OF 55 47 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C1900 R1900 L1900 U1901 RX DIVERSITY (2) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D L4905_RF 22-OHM-25%-0.2A-0.9DCR C 1 VCC_DSM 2 PP_VCC_MAIN 01005 1 C 10 12 14 15 16 17 23 26 31 39 51 52 C4901_RF 15PF 5% 16V NP0-C0G-CERM 01005 2 2 VBATT 47 47 47 47 47 47 47 47 FD40B41A 47 SAW-2-1-BAND-40-41A-DRX B39252B9920P810 B40IN LGA B41AIN 1 L4901_RF L4903_RF L4902_RF 9.1NH-3%-0.17A-1.7OHM 30 35 45 46 ANT LB 7 50_LB_DIVERSITY_ASM 45 ANT HB 9 50_HB_DIVERSITY_ASM 45 B26/B28A B20/B29 PCS 29 50_PCS_DSM_OUT 47 B34 B39 B38X B40 B41A DCS 30 50_DCS_DSM_OUT 47 B25 THRM PAD B RADIO_DSM 2 2 30 35 45 46 RFFE2_CLK 01005 RADIO_DSM RADIO_DSM 35 40 41 43 44 45 46 RFFE2_DATA 5.1NH-3%-0.250A 01005 01005 RADIO_DSM B13/B17 SCLK 5 RFFE_VIO L4904_RF 8.2NH-3%-0.19A-1.6OHM 5.6NH-3%-0.23A-1.3OHM 01005 2 1 10 8 7 5 3 2 1 LGA 1 6 8 10 11 18 20 22 24 26 27 28 31 1 B 47 4 1 VIO 3 SDATA 4 HFQSWBXUA-221 GND GND GND GND GND GND GND GND GND GND GND GND GND B41AOUT GND GND B40OUT GND 6 9 50_B40_DRX_FILTER 50_B41A_DRX_FILTER GND 47 GND GND 47 B1/B4 B3 B7 B8/B28B U_DSM_RF 35 36 37 38 39 40 47 32 50_B1_B4_DRX_DSM 33 50_B3_DRX_DSM 16 50_B7_DRX_DSM 50_B8_B28B_DRX_DSM 19 50_B13_B17_DRX_DSM 25 34 50_B25_DRX_DSM 50_B26_B28A_DRX_DSM21 50_B20_B29_DRX_DSM 23 12 50_B34_DRX_DSM 13 50_B39_DRX_DSM 17 50_B38X_DRX_DSM 14 50_B40_DRX_DSM 15 50_B41A_DRX_DSM 2 A A PAGE TITLE GPS DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 49 OF 55 48 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C1900 R1900 L1900 U1901 GPS CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D C C L5002_RF 10NH-3%-0.170A FL_GPSRF 100_GPS_DSM_P_OUT 1 LNA-GNSS-BAL B8821 LGA 1 50_GPS_DSM_IN UNBAL_PORT 100_GPS_WTR_IN_P 36 100_GPS_WTR_IN_N 36 RADIO_GPS BAL_PORT 3 BAL_PORT 4 1 C5001_RF 1.0PF +/-0.1PF 16V 2 NP0-C0G 01005 2 5 GND GND 50 2 01005 L5003_RF 10NH-3%-0.170A 100_GPS_DSM_M_OUT 1 2 01005 B B A A PAGE TITLE GPS DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 50 OF 55 49 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 ANTENNA FEED’S CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. TEST & COAX CONNECTOR FOR LOWER SECTION OF MLB RADIO_LOW_ANT D UP_COAX MM6829-2700B MM6829-2700B F-ST-SM F-ST-SM 1 D R5130_RF 1 50_ANT2_UPPER_COAX_CONN 0.00 2 50_TRIPLEX_CELL 1% 1/20W MF 0201 2 3 1 50_ANT2_CONN 3 2 45 RADIO_UP_ANT LOW_COAX 1 RADIO_UP_ANT L5124_RF 18NH-3%-0.140A 01005 L5128_RF RADIO_UP_ANT NOSTUFF 33-OHM-25%-1500MA 2 VOLTAGE=2.95V PP_LDO13_GPS 1 2 RADIO_UP_ANT PP_LDO13 31 33 0201 UAT_SPLT MM6829-2700B F_TRI_RF R5131_RF 1 1% 1/20W MF RADIO_UP_ANT 0201 1 2 3 0.00 2 CELL 1 GPS/GNSS 9 WIFI 14 LGA ANT GND 1 L5126_RF 01005 NOSTUFF RADIO_UP_ANT NOSTUFF 2.2UF 5% 2 16V CERM 01005 2 20% 6.3V X5R 0201-1 RADIO_UP_ANT RADIO_UP_ANT 50_TRIPLEX_GPS 18NH-3%-0.140A 0201 1 C5130_RF C5129_RF 22PF EPAD L5125_RF 10NH-3%-0.3A 2 1 ACFM-W012-AP1 6 50_TRIPLEX_ANT_MCH 1 50_CELL_WIFI_GPS_TRIPLEX_ANT 16 15 13 12 11 10 8 7 5 4 3 2 1 17 F-ST-SM L5127_RF VDD 3.9NH+/-0.1NH-0.270A 1 2 2 SKY65746-14 U_GPSLNA RF_OUT 50_GPS_LNA_IN 3 RF_IN LGA 6 50_GPS_DSM_IN 49 01005 1 GND 2 4 5 51 C EPAD 7 50_WIFI_2G_NOTCHPLEXER_IN C L5123_RF 18NH-3%-0.140A 01005 RADIO_UP_ANT NOSTUFF 2 TP_SHORT_PIN P2MM-NSM SM 1 PP NORTH_ANT_GND 29 RADIO_UP_ANT PP SM 1 PP ANT_GND 1 29 1 50_UPPER_ANT_FEED L5122_RF 1 12NH-310MA 2 5% 25V CERM 0201 1 29 50 B F-ST-SM 12PF C5111_RF 50_UPPER_ANT_MCH B 1 0.7PF L5112_RF +/-0.05PF 25V 2 C0G-CERM 0201 03015 1 3 2 SM UAT_METR MM6829-2700B C5122_RF TP_UAT P2MM-NSM TP_UAT_GND P2MM-NSM 12NH-310MA 03015 NOSTUFF 2 2 50_UAT_MATCH 1 C5112_RF 15PF 5% 25V NPO 0201 FROM 5GHZ WIFI TO 5GHZ WIFI ANTENNA FEED ANT_GND TP_WIFI_5G_GND TP_WIFI_5G P2MM-NSM P2MM-NSM SM PP 1 29 SM PP R5132_RF WIFI_BT WI5G_ANT WI5G_CN MM6829-2700B MM6829-2700B F-ST-SM 1 50_WIFI_5G_CONN_ANT 1 0.00 250_WIFI_5G_CONN_MCH 1 1 1% 1/20W MF RADIO_UP_ANT 0201 C5132_RF 0.2PF F-ST-SM 1 50_WIFI_5G_IN_OUT BI 51 2 3 50 29 WIFI_BT 3 2 2 +/-0.05PF 25V 2 COG-CERM 0201 50 29 ANT_GND NOSTUFF A A LOW_ANT L5129_RF 1.4NH+/-0.1NH-1.1A 1 50_ANT1_CONN 1 2 C5128_RF +/-0.05PF 2 25V COG-CERM 0201 6 5 4 DRAWING NUMBER 1 Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: RADIO_LOW_ANT 7 F-ST-SM ANTENNA FEEDS 0201 0.2PF 8 50_ANT1_SW 4 3 2 45 PAGE TITLE MM5829-2700 3 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 51 OF 55 50 OF 54 SHEET 1 https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 WLAN/BT WIFI_BT 39 31 26 23 17 16 15 14 12 10 52 48 PP_VCC_MAIN IN 1 WIFI_BT C5202_RF 1 WIFI_BT C5203_RF 10UF D D 27PF 20% 2 6.3V CERM-X5R 0402-1 2 5% 16V NP0-C0G 01005 WIFI_BT R5214_RF 1 WIFI_BT R5208_RF 51 0.01UF IN WIFI_BT 20% 4V CERM 0402 C 1 3 1 2 WLAN_SR_LC 2 30 29 IN 30 29 IN 36 CLK32K R5215_RF C5208_RF 0.2PF U5201_RF GPIO_1 8 PCIE_DEV_WAKE BT_HOST_WAKE 43 HOST_WAKE_BT BT_DEV_WAKE 42 WAKE_BT LGA 0603 OUT 30 29 OUT 51 30 29 30 29 HOST_WAKE_WLAN WLAN_PCIE_WAKE_L WLAN_PCIE_PERST_L WLAN_PCIE_CLKREQ_L 90_WLAN_PCIE_REFCLK_N 90_WLAN_PCIE_REFCLK_P 90_WLAN_PCIE_RDN 90_WLAN_PCIE_RDP 90_WLAN_PCIE_TDN 90_WLAN_PCIE_TDP IN BI 29 IN 29 IN 30 29 IN 30 29 IN 30 29 OUT 30 29 OUT 30 12 14 13 16 17 20 21 18 19 GPIO_0 PCIE_WAKE* PCIE_PRST* PCIE_CLKREQ* PCIE_REFCLK_N PCIE_REFCLK_P PCIE_RDN PCIE_RDP PCIE_TDN PCIE_TDP DC BLOCKS LOCATED ON AP SIDE SWIZZLE DATA LANE ON TOP-LEVEL 30 29 30 29 29 29 JTAG_SEL 51 WLAN_JTAG_SWDCLK WLAN_JTAG_SWDIO OSCAR_CONTEXT_A IN BI IN OSCAR_CONTEXT_B IN NC 11 31 34 32 35 33 JTAG_SEL JTAG_TCK(GPIO_2) JTAG_TMS(GPIO_3) JTAG_TDI(GPIO_4) JTAG_TDO(GPIO_5) JTAG_TRST(GPIO_6) 38 39 41 40 BT_UART_CTS_L BT_UART_RTS_L BT_UART_RXD BT_UART_TXD BT_PCM_CLK BT_PCM_SYNC BT_PCM_IN BT_PCM_OUT 49 50 48 47 BT_PCM_CLK BT_PCM_SYNC BT_PCM_IN BT_PCM_OUT UART_RTS(GPIO_7) UART_CTS(GPIO_8) UART_RX(GPIO_9) UART_TX(GPIO_10) 56 4 3 2 WLAN_UART_RTS_L WLAN_UART_CTS_L WLAN_UART_RXD WLAN_UART_TXD SECI_TX(GPIO_13) 6 SECI_RX(GPIO_14) 5 RF_SW_CTRL_8 7 GND WLAN_COEX_TXD WLAN_COEX_RXD 1 NOSTUFF IN NOSTUFF 29 IN 29 OUT 29 IN IN 29 30 OUT 29 30 BI BI R5216_RF LFB185G53CGCD878 50_WIFI_5G_BPF_RADIO 1 3 50_WIFI_5G_BPF_MATCH WIFI_BT 1 WIFI_BT C5212_RF C5216_RF 0.2PF 0.2PF NOSTUFF NOSTUFF 0 50_WIFI_5G_IN_OUT 2 BI 5% 1/20W MF 201 50 WIFI_BT C5217_RF 0.2PF +/-0.1PF 16V NP0-C0G 01005 +/-0.1PF 16V NP0-C0G 01005 NOSTUFF 29 30 OUT 29 30 C 1 WIFI_BT R5210_RF 100K 5% 1/32W MF 2 01005 29 29 IN 29 OUT 29 OUT 29 30 IN 29 30 IN 29 30 OUT 29 30 WIFI_BT R5206_RF 0.002 1 BB_COEX_UART_RXD 30 35 0% 1/32W MF 01005 0.002 1 BB_COEX_UART_TXD B 30 35 0% 1/32W MF 01005 C5215_RF 100PF 5% 16V 2 NP0-C0G 01005 PP_WLAN_VDDIO_1V8 +/-0.05PF 25V COG-CERM 0201 WIFI_BT R5205_RF 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 B 50 C5211_RF 0.2PF WIFI_BT 5.15-5.92GHZ +/-0.1PF 16V NP0-C0G 01005 NC THRM_PAD WLAN_PCIE_PERST_L 1 15 25 27 29 37 44 46 51 52 53 57 51 30 29 BT_UART_CTS* BT_UART_RTS* BT_UART_RXD BT_UART_TXD 2 5% 1/20W MF 201 +/-0.1PF 16V NP0-C0G 01005 2G_ANT 45 50_WLAN_G_ANT 5G_ANT 58 50_WLAN_A_ANT WIFI_BT WLAN_REG_ON 9 WL_REG_ON BT_REG_ON 10 BT_REG_ON 0 1 WIFI_BT 4 30 29 BI WIFI_BT 1 WIFI_BT FL5201_RF WIFI_BT LBEE5U8ZKC-646 L5201_RF 2.2UH-20%-0.3A-0.38OHM 50_WIFI_2G_NOTCHPLEXER_IN 2 NOSTUFF 5% 16V NP0-C0G 01005 WLAN_VIN_1P35 26 VIN_LDO WLAN_SR_VLX 28 SR_VLX WIFI_BT C5201_RF 7.5UF CLK32K_AP 2 27PF 2 VDDIO_1P8V 22 10% 6.3V X5R 01005 32K INTERFACE TO AP 30 29 +/-0.1PF 16V NP0-C0G 01005 VOLTAGE=1.80V WIFI_BT WIFI_BT 1 C5204_RF 1 C5205_RF 2 WIFI_BT 0.2PF PP_WLAN_VDDIO_1V8 2 0.00 2 0% 1/32W MF 01005 VBATT_RF_VCC 54 VBATT_RF_VCC 55 PP_WL_BT_VDDIO_AP 1 IN C5213_RF VBATT 23 VBATT 24 29 0 5% 1/20W MF 201 WIFI_BT 51 1 WIFI_BT R5201_RF 10K 5% 1/32W MF 2 01005 NOSTUFF JTAG_SEL A 51 SYNC_MASTER=N/A SYNC_DATE=N/A PAGE TITLE WIFI/BT: MODULE AND FRONT END 1 WIFI_BT R5202_RF 10K DRAWING NUMBER 5% 1/32W MF 2 01005 Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: MODULE BOOT-STRAPPED TO PCIE INTERNALLY CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST 8 7 6 5 4 3 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 7.0.0 BRANCH PAGE 52 OF 55 SHEET 51 OF 54 1 SIZE D A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 C2101 R2100 L2102 U2100 STOCKHOLM CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D REMOVING BULK CAP 4.7UF 0402 --> BECAUSE OF OTHER BULK CAPS IN LAYOUT PP_STOCKHOLM_VDD STOCKHOLM_HOST_WAKE D1 IRQ SIM_SWIO SIM_VCC SIM_PMU_VCC TX_PWR_REQ ALWAYS ON PULL-UP --> NC B3 SVDD_REQ IN 30 29 OUT 30 29 IN 30 29 OUT 52 29 IN STOCKHOLM_CTS_L STOCKHOLM_RTS_L STOCKHOLM_ENABLE B2 E1 NC NC NC NC NC NC E3 E4 F4 E6 A7 A6 C3 B CLK_XTAL1 RX TX CTS RTS VEN ESE_DWPM_DBG D5 ESE_DWPS_DBG E5 ANT1 RXP/RF_CLK_RX TX1 TX2 RXN/RF_CLK_RX ANT2 SMX_RST* SMX_CLK ESE_IO1 ESE_IO2 ESE_IO3 ESE_IO4 G7 F6 G3 G5 F5 G6 VMID F7 VOLTAGE=1.80V STOCKHOLM_SIM_SWP PP_PN65_VCC_SIM XTAL2 52 54 IN NC 1 R5303 NC NC NC A2 A4 A5 B2 WLCSP RF_IF_VDD RF_DATA_IO RF_CLK_RX RF_CLK_TX STOCKHOLM_RF_CLK_RX 1 0% 1/32W MF 01005 NC NC L5301_RF 78NH-5%-0.97A-0.13OHM STOCKHOLM_CDMP2 1 2 0402 STOCKHOLM_RFO1 L5302_RF STOCKHOLM_RF02 78NH-5%-0.97A-0.13OHM RFO2 C3 1 STOCKHOLM_RF_CLK_RX_ASM3923 NC STOCKHOLM_ENABLE 52 29 RADIO_STOCKHOLM RFO1 C4 5% 1/32W MF 2 01005 0.00 2 A1 TIO A3 GP_IO B1 NRES STOCKHOLM_RFI1 RFI1 D1 STOCKHOLM_RF_CLK_TX 1 R5318_RF 0.00 1 STOCKHOLM_RF_DATA_IO STOCKHOLM_VMID RADIO_STOCKHOLM 1 C5317_RF 0.1UF 20% 6.3V 2 X5R-CERM 01005 2 0.00 0402 STOCKHOLM_RF_DATA_IO_ASM3923 0% 1/32W MF 01005 TP5301_RF 1 A C5314_RF 2% 2 50V C0G 0402 1 C C5315_RF 220PF 2% 50V 2 NPO-COG 0402 29 STOCKHOLM_ANT C5313_RF 1 33PF 1 2% 25V NPO-COG 0201 C5316_RF 330PF 2 TP5303_RF 1 A 2% 25V 2 NPO-COG 0201 TP-P55 TP5304_RF 1 A TP-P55 1 C5311_RF 560PF 10% 50V 2 X7R-CERM 0201 RFI2 C1 STOCKHOLM_RFI2 RADIO_STOCKHOLM VSP_RF D3 STOCKHOLM_VSP_RF 2 STOCKHOLM_RF_CLK_TX_ASM3923 0% 1/32W MF 01005 1 2 R5317_RF NC 2% 50V NPO-COG 0402 3 BAL1 4 UNBAL 560PF 10% 50V 2 X7R-CERM 0201 CDMP1 B3 CDMP2 B4 10K R5316_RF 2 390PF U5302_RF 30 54 BI 1 1 C5310_RF AS3923-B0-BWLT OUT PP_PN65_SIM_PMU RF_CLK_TX F1 RF_DATA_IO B4 TVSS PVSS 30 29 BB_REQUEST_XO_CLK REF_CLK_FROM_BB STOCKHOLM_UART_RXD STOCKHOLM_UART_TXD G4 C2 IN DWL CLK_REQ GND GND GND GND GND OUT 32 30 A1 A2 A3 C1 D2 B1 B6 C4 D4 D6 F3 32 30 STOCKHOLM_FW_DWLD_REQ VSS IN E2 52 29 A4 A5 B5 F2 220PF STOCKHOLM_ANT_MATCH VDD VDD_RF 5% RADIO_STOCKHOLM 1/32W MF 01005 UFLGA C5312_RF 20% 6.3V 2 X5R 0201 BAL0 GND 1.00K2 1 STOCKHOLM_RF_DATA_IO PN65V OUT 0.22UF 20% 6.3V 2 X5R 0201 1 52 1 RADIO_STOCKHOLM C5307_RF C5306_RF 1 0.22UF R5319_RF U5301_RF 30 29 RADIO_STOCKHOLM 0805 20% 6.3V 2 X5R-CERM 01005 20% 2 6.3V X5R-CERM 01005 2 20% 10V 2 X5R 0201 0.1UF IN 0.1UF T5301_RF 1UF RADIO_STOCKHOLM 52 51 14 PP_VCC_MAIN 10 12 48 39 31 26 23 17 16 15 1 C5305_RF D5 NC RADIO_STOCKHOLM 1 C5304_RF 1 C5303_RF SVDD B7 ESE_VDD C5 VDD/RF_IF_VDD VBAT VDHF PVDD C PP_STOCKHOLM_ESE VOLTAGE=1.80V SVDD_IN G1 C6 C7 D7 D3 1UF 20% 10V 2 X5R 0201 VUP G2 TVDD E7 NC RADIO_STOCKHOLM 1 C5302_RF RADIO_STOCKHOLM ATB201206E-20011 VOLTAGE=1.80V PP_STOCKHOLM_1V8_S2R B5 VSS_DMP IN C5 54 52 29 PP_VCC_MAIN D2 VSS IN D4 VSS_RF 52 31 26 23 14 12 10 17 16 15 51 48 39 VSP C2 STOCKHOLM_VSP 1 C5308_RF 1UF 20% 6.3V 2 X5R 0201 RADIO_STOCKHOLM 1 C5309_RF 0.022UF 10% 2 6.3V X5R-CERM 0201 B RADIO_STOCKHOLM STOCKHOLM_TIO TP-P55 TP5302_RF 1 A TP-P55 54 52 29 PP_STOCKHOLM_1V8_S2R NOSTUFF 1 RADIO_STOCKHOLM R5301_RF 100K 5% 1/32W MF 2 01005 52 29 IN STOCKHOLM_ENABLE 52 29 IN STOCKHOLM_FW_DWLD_REQ 1 RADIO_STOCKHOLM R5302_RF 100K 5% 1/32W MF 2 01005 A SYNC_MASTER=N/A SYNC_DATE=N/A PAGE TITLE DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 SIZE 051-9903 D 7.0.0 REVISION BRANCH PAGE 53 OF 55 52 OF 54 SHEET 1 A https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 ON-BOARD JUMPER FLEX D D UAT JUMPER L5408_RF 120NH-5%-40MA PAC2_VDD_3V0_FILTER 1 2 PAC_VDD_3V0 29 0201 1 1 C5405_RF 33PF C5403_RF 0.01UF 10% 5% 2 16V NP0-C0G 01005 25V 2 X5R-CERM 6 0201 C VDD C U5411_RF RF1331 R5401_RF 0 1 5% 1/20W SCLK_FILT SDAT_FILT 2 MF 201 1 WLCSP 5 SCLK 4 SDAT C5401_RF 33PF VIO_FILT 1 2 RFFE_VIO_S2R 29 0201 1 10 RF1A RF1B 1 9 8 RF2A RF2B 10% 2 25V X5R-CERM 0201 C5408_RF 0.01UF 1 C5404_RF 33PF 5% 2 16V NP0-C0G 01005 2 7 11 5% 2 16V NP0-C0G 01005 120NH-5%-40MA VIO 3 RFGND1 RFGND2 RFFE2_CLK_BUFFER GNDA 35 L5407_RF R5402_RF RFFE2_DATA_BUFFER 1 35 5% 1/20W 0 2 MF 201 1 C5402_RF 33PF 5% 2 16V NP0-C0G 01005 L5403_RF 1 C5407_RF 13NH-280MA L_2AB 1 C5409_RF 03015 1 2 UAT P2MM-NSM SM 1 PP 2% 25V C0G-CERM 0201 0.5PF B TP3 12PF UAT_MID 2 0.05PF 2 25V NP0-C0G 0201 B L5402_RF L_1B 13NH-280MA 1 2 03015 L5401_RF L_1A 27NH 1 2 03015 1 L5400_RF 13NH-280MA 03015 2 A A PAGE TITLE JUMPER DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 54 OF 55 SHEET 53 OF 54 1 SIZE D https://www.mobile-manuals.com/ 8 7 6 5 4 3 2 1 DSDS CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. D D 54 33 31 30 PP_LDO6 1 R5501_RF C5501_RF 2.2UF 20% 2 6.3V X5R 0201-1 15.00K 1% 1/32W MF 2 01005 NOSTUFF NOSTUFF 8 1 VCC U5501_RF 6 RST DSDS_SIM_DATA_R 4 IO0 0.00 2 0% 1/32W MF 01005 30 NOSTUFF 52 29 29 D2 TS3DS26227YZT PP_PN65_SIM_PMU 4FF_SIM_SWP 1 0.00 2 A1 54 33 31 30 PP_LDO5 D3 54 33 31 30 PP_LDO6 B3 NO2 PP_PN65_SIM_PMU VOLTAGE=3.00V C3 COM2 54 29 R5505_RF 54 30 STOCKHOLM_SIM_SEL 52 54 0% 1/32W MF 01005 STOCKHOLM_SIM_SWP 30 52 54 0% 1/32W MF 01005 54 52 IN OUT B U5502_RF R5504_RF 0.00 2 C NOSTUFF V+ VIO NOSTUFF 1 30 54 C5502_RF 2.2UF PP_LDO5 DSDS_SIM_SWP NC NC PP_STOCKHOLM_1V8_S2R 20% 6.3V 2 X5R 0201-1 B SWIO 2 IO1 3 NC1 7 STOCKHOLM_VDD_MUX_3V0 1 54 33 31 30 UFDFPN GND 1 34 30 DSDS_SIM_RESET EPAD DSDS_SIM_DATA CLK 1 34 30 5 A2 C DSDS_SIM_CLK 9 R5503_RF ST33F1MFE 34 30 IN1 WCSP NC2 D1 NC1 NO1 B1 4FF_SIM_SWP DSDS_SIM_SWP COM1 C1 STOCKHOLM_SIM_SWP IN2 A3 STOCKHOLM_SIM_SEL 1 R5502_RF 10K B2 C2 GND NOSTUFF 1% 1/32W MF 01005 2 BI 30 54 BI 30 54 BI 30 52 54 29 54 NOSTUFF DEFAULT LOW = 4FF RADIO_BB A A PAGE TITLE JUMPER DRAWING NUMBER Apple Inc. 051-9903 REVISION R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 7.0.0 BRANCH PAGE 55 OF 55 SHEET 54 OF 54 1 SIZE D
Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.4 Linearized : No Page Count : 54 Modify Date : 2019:02:28 09:47:28Z Producer : 3-Heights(TM) PDF Toolbox API 4.11.25.6 (http://www.pdf-tools.com)EXIF Metadata provided by EXIF.tools