National Instruments Welding System 321645C 01 Users Manual NI DAQ Function Reference For PC Compatibles
321645c-01 to the manual f8939250-69b6-4058-990e-9340cb6f91bc
2015-02-05
: National-Instruments National-Instruments-Welding-System-321645C-01-Users-Manual-493964 national-instruments-welding-system-321645c-01-users-manual-493964 national-instruments pdf
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- NI-DAQ Function Reference Manual for PC Compatibl...
- Support
- Important Information
- Contents
- About This Manual
- Chapter 1 Using the NI-DAQ Functions
- Chapter 2 Function Reference
- AI_Change_Parameter
- AI_Check
- AI_Clear
- AI_Configure
- AI_Mux_Config
- AI_Read
- AI_Read_Scan
- AI_Setup
- AI_VRead
- AI_VRead_Scan
- AI_VScale
- Align_DMA_Buffer
- AO_Calibrate
- AO_Change_Parameter
- AO_Configure
- AO_Update
- AO_VScale
- AO_VWrite
- AO_Write
- Calibrate_1200
- Config_Alarm_Deadband
- Config_ATrig_Event_Message
- Calibrate_DSA
- Calibrate_E_Series
- Config_DAQ_Event_Message
- Configure_HW_Analog_Trigger
- CTR_Config
- CTR_EvCount
- CTR_EvRead
- CTR_FOUT_Config
- CTR_Period
- CTR_Pulse
- CTR_Rate
- CTR_Reset
- CTR_Restart
- CTR_Simul_Op
- CTR_Square
- CTR_State
- CTR_Stop
- DAQ_Check
- DAQ_Clear
- DAQ_Config
- DAQ_DB_Config
- DAQ_DB_HalfReady
- DAQ_DB_Transfer
- DAQ_Monitor
- DAQ_Op
- DAQ_Rate
- DAQ_Set_Clock
- DAQ_Start
- DAQ_StopTrigger_Config
- DAQ_to_Disk
- DAQ_VScale
- DIG_Block_Check
- DIG_Block_Clear
- DIG_Block_In
- DIG_Block_Out
- DIG_Block_PG_Config
- DIG_DB_Config
- DIG_DB_HalfReady
- DIG_DB_Transfer
- DIG_Grp_Config
- DIG_Grp_Mode
- DIG_Grp_Status
- DIG_In_Grp
- DIG_In_Line
- DIG_In_Port
- DIG_Line_Config
- DIG_Out_Grp
- DIG_Out_Line
- DIG_Out_Port
- DIG_Prt_Config
- DIG_Prt_Status
- DIG_SCAN_Setup
- DIG_Trigger_Config
- Get_DAQ_Device_Info
- Get_NI_DAQ_Version
- GPCTR_Change_Parameter
- GPCTR_Config_Buffer
- GPCTR_Control
- GPCTR_Read_Buffer
- GPCTR_Set_Application
- GPCTR_Watch
- ICTR_Read
- ICTR_Reset
- ICTR_Setup
- Init_DA_Brds
- Lab_ISCAN_Check
- Lab_ISCAN_Op
- Lab_ISCAN_Start
- Lab_ISCAN_to_Disk
- Line_Change_Attribute
- LPM16_Calibrate
- MIO_Calibrate
- MIO_Config
- RTSI_Clear
- RTSI_Clock
- RTSI_Conn
- RTSI_DisConn
- SC_2040_Config
- SCAN_Demux
- SCAN_Op
- SCAN_Sequence_Demux
- SCAN_Sequence_Retrieve
- SCAN_Sequence_Setup
- SCAN_Setup
- SCAN_Start
- SCAN_to_Disk
- SCXI_AO_Write
- SCXI_Cal_Constants
- SCXI_Calibrate_Setup
- SCXI_Change_Chan
- SCXI_Configure_Filter
- SCXI_Get_Chassis_Info
- SCXI_Get_Module_Info
- SCXI_Get_State
- SCXI_Get_Status
- SCXI_Load_Config
- SCXI_ModuleID_Read
- SCXI_MuxCtr_Setup
- SCXI_Reset
- SCXI_Scale
- SCXI_SCAN_Setup
- SCXI_Set_Config
- SCXI_Set_Gain
- SCXI_Set_Input_Mode
- SCXI_Set_State
- SCXI_Set_Threshold
- SCXI_Single_Chan_Setup
- SCXI_Track_Hold_Control
- SCXI_Track_Hold_Setup
- Select_Signal
- Set_DAQ_Device_Info
- Timeout_Config
- WFM_Chan_Control
- WFM_Check
- WFM_ClockRate
- WFM_DB_Config
- WFM_DB_HalfReady
- WFM_DB_Transfer
- WFM_from_Disk
- WFM_Group_Control
- WFM_Group_Setup
- WFM_Load
- WFM_Op
- WFM_Rate
- WFM_Scale
- WFM_Set_Clock
- Appendix A Status Codes
- Appendix B Analog Input Channel, Gain Settings, and Voltage C...
- Appendix C NI-DAQ Function Support
- Appendix D Customer Communication
- Glossary
- Index
- Figures
- Figure 2-1. High Alarm Deadband
- Figure 2-2. Low Alarm Deadband
- Figure 2-3. Analog Trigger Event
- Figure 2-4. ND_BELOW_LOW_LEVEL
- Figure 2-5. ND_ABOVE_HIGH_LEVEL
- Figure 2-6. ND_INSIDE_REGION
- Figure 2-7. ND_HIGH_HYSTERESIS
- Figure 2-8. ND_LOW_HYSTERESIS
- Figure 2-9. Pulse Generation Timing
- Figure 2-10. Pulse Timing for pulseWidth = 0
- Figure 2-11. Square Wave Timing
- Figure 2-12. Digital Scanning Input Group Handshak...
- Figure 2-13. Digital Scanning Output Group Handsha...
- Figure 2-14. Simple Event Counting
- Figure 2-15. Single Period Measurement
- Figure 2-16. Single Pulse Width Measurement
- Figure 2-17. Single Triggered Pulse Width Generati...
- Figure 2-18. Start-Stop Measurement
- Figure 2-19. Single Pulse Generation
- Figure 2-20. Single Triggered Pulse Generation
- Figure 2-21. Retriggerable Pulse Generation
- Figure 2-22. Pulse Train Generation
- Figure 2-23. Frequency Shift Keying
- Figure 2-24. Buffered Event Counting
- Figure 2-25. Buffered Period Measurement
- Figure 2-26. Buffered Period Measurement when No S...
- Figure 2-27. Buffered Semi-Period Measurement when...
- Figure 2-28. Buffered Semi-Period Measurement when...
- Figure 2-29. Buffered Pulse Width Measurement
- Figure 2-30. Buffered Pulse Width when Gate Is Hig...
- Figure 2-31. Buffered Two Signal Edge Separation M...
- Figure 2-32. Mode 0 Timing Diagram
- Figure 2-33. Mode 1 Timing Diagram
- Figure 2-34. Mode 2 Timing Diagram
- Figure 2-35. Mode 3 Timing Diagram
- Figure 2-36. Mode 4 Timing Diagram
- Figure 2-37. Mode 5 Timing Diagram
- Tables
- Table 1. MIO and AI Devices
- Table 1-1. Status Values
- Table 1-2. Primary Type Names
- Table 1-3. The LabWindows/CVI Function Tree for Da...
- Table 2-1. Parameter Settings for AI_Configure
- Table 2-2. Port 0 Digital I/O Lines Reserved
- Table 2-3. Reglitching Parameters for Permissible ...
- Table 2-4. Voltage or Current Output Parameters
- Table 2-5. Parameter Values for FIFO Transfer Cond...
- Table 2-6. Default Values for FIFO Transfer Condit...
- Table 2-7. Parameter Setting Information for the A...
- Table 2-8. Parameter Setting Information for the D...
- Table 2-9. Parameter Setting Information for Outpu...
- Table 2-10. Parameter Setting Information for Outp...
- Table 2-11. Parameter Setting Information for Outp...
- Table 2-12. Parameter Setting Information for Freq...
- Table 2-13. Parameter Setting Information for the ...
- Table 2-14. Parameter Setting Information for PLL ...
- Table 2-15. Parameter Setting Information for the ...
- Table 2-16. Possible Calibrate_1200 Parameter Valu...
- Table 2-17. DAQEvent Messages
- Table 2 -18. Valid Counters and External Timing Sig...
- Table 2-19. Usable Parameters for Different DAQ Ev...
- Table 2-20. Legal Values for gpctrNum Parameter
- Table 2-21. Legal Values for paramValue when param...
- Table 2-22. Definition of Other Counter for paramV...
- Table 2-23. Default Source Selection for ND_SIMPLE...
- Table 2-24. Legal Values for paramValue when param...
- Table 2-25. Default Gate Selection
- Table 2-26. Default Second Gate Selection
- Table 2-27. Legal Values for paramValue when param...
- Table 2-28. Legal Values for paramValue when param...
- Table 2-29. Default Up/Down Selection
- Table 2-30. Legal Values for the action Parameter
- Table 2-31. Descriptions for application
- Table 2-32. Terminal Count
- Table 2-33. SCXI Module Scan List
- Table 2-34. MIO or AI Scan List
- Table 2-35. Possible Values for signal
- Table 2-36. Legal Parameters for the 6602 Devices
- Table 2-37. E Series Signal Name Equivalencies
- Table 2-38. RTSI Bus Line and VXIbus Trigger Mappi...
- Table 2-39. Data Ranges for the Buffer Parameter f...
- Table 2-40. Mode Values for the Count Parameter fo...
- Table 2-41. Mode Values for the Iterations Paramet...
- Table 2-42. Array Structures for DDS Mode
- Table 2-43. Array Structures for ARB Mode
- Table A-1. Status Code Summary
- Table B-1. Valid Analog Input Channel Settings
- Table B-2. Valid Internal Analog Input Channels
- Table B-3. Internal Channel Purposes for Analog In...
- Table B-4. Valid Gain Settings
- Table B-5. The Values of maxReading and maxVolt
- Table C-1. MIO and AI Device Functions
- Table C-2. Lab/516/DAQCard-500/700 Functions
- Table C-3. DSA Device Functions
- Table C-4. Analog Output Family Functions
- Table C-5. Digital I/O Family Functions
- Table C-6. Timing Device Functions
- Table C-7. SCXI Functions