1005_Assembly_System_Jan1966 1005 Assembly System Jan1966
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.. ..y. ~.~ _______________________
~._~ ~
·c .
-.
TOI
Commerc i al Branch Managers
fROM (N"ME):
/
LOCATION & DATE:
OE~AItTIIDff:
CAR.OMS'
Corrmercial Regional Managers
J. L~ Sturdevant
SuaJECT:
INTEIICOtIIIII,,"ICATION
H. L. Hughes
King of Prussia, Jan. 17,. 1965
UDPD i vis ion EDUCAT ION
·UNI VPC 1005' EMPLOYEE TRAI NI NG
Product Marketing, Systems Programming, and the Curricula Development
section of Education have cooperated in developing a UNIVAC 1005 Manual.
It is structured to aid in easy learning. We have made every effort to
organize the material in a sound teaching format.
Final typing, illustrating, editing, printing, collating and distribution
will require some additional time.
c
As an aid to you in providing your Sales Representatives and Systems
Analysts training on the 1005, we have made copies of. the rough draft.
THI SIS INTENDED FOR I N-BRAI'CH USE ONLY AND .SHOULD BE DESTROYED WHEN
THE FINISHED MANUAL IS RECEIVED BY YOU.
In order to insure complete accuracy of the finished manual, any errors
should be reported by mail immediately to Mr. Art Levin, UNIVAC Product
Marketing, P.O.Box 500, BlueBell, Pennsylvania. Questions concerning
the Assembly System or the UNIVIC. 1005 should also be directed to
Mr. Levin.
H. L. Hughes
hlh/len
Attachment
~.".'.'
/-
..
·"
OPERATH·TG PROCEDURE FOR 1005 ASSEMBLY
Machine Set up
Printer
Punch
Processor -
Small Stock pape
Blank 5081s.
1005 Control Panel
Pass #1
1.
Alteration Switch #1 on
2.
Place 1005 assembly Deck followed by Source Deck in
Processor.
3.
Press start, Clear, Feed and Run (1005 wi1L.1oad assembly
Deck and Halt with Ind 1 on).
4.
Turn off Alteration Switch #1 and Press Run
(1005 will now punch cards for Pass #2)
5.
When Processor stops (Reader hopper Empty) Press Run
then StoE,.
6.
Hold Source deck for
Progra~ner.
*Pass #2
1.
Remove cards from punch.
2.
Place 1005 assembly Deck fo1101'led by cards (Pass 2, step 1)
in Processor.
3.
Press Start clear feed and Run (1005 will punch out cards
for Pass #3 and print out listing of Pass #2)
4.
When processor halts (Reader hopper empty)
press Run then Step.
5.
Seperate Assembly deck from Pass #2 cards and discard
Pass #2 cards.
*Pass #3
"~.'."
\~/
Final Pass
1.
Remove Cards from punch.
2.
Place 1005 assembly deck, followed by cards removed
from punch, in Reader from Step 1 pass #3.
3.
Press clear Start Feed and Run.
(1005 will now punch
out Final object deck and print out of program).
4.
When processor halts press Run then Stop.
..
-2-
*Pass 1f3
Final Pass
(Continued)
dec~.
5.
Scperate Assembly deck from Pass #3
6.
Discard cards used to punch out pass #3.
7.
Reinove cards from punch.
8.
Put Run #
9.
R.eturn source I Final object deck and listing to'
prograrmner.
on first card of assemb).ed program deck.
*If machine jams, check light on punch stops processor or any
other reason machine halt's during pass #2 or #3, that pass
mUs-t be restarted with a RESTART CARD in Front of Assembly
deck. There is one Restart Pass 2 card and one Restart Pass 3
card.
If Restart Pass 2 card is used Remove it before starting
Pass 3.
•
I
ROUGH DRAFT
COMPANY CONFIDENTIAL
UNIVAC 1005 ASSEMBLY SYSTEM
January 1%6
(
Data Processing Division
Education
@
1966
Sperry Rand Corporation
(
TABLE OF CONTENTS
SECTION
1.0
(
2.0
PAGE
Introduction to the UNIVAC 1005 and Internally Stored
Prograrmling
1
1.1
Addressing Technique
1
1.2
Basic Logic and Format
4
1.3
Control Section Operation
5
1.4
Other Instruction Formats
7
1.5
Storage Allocation and Use
8
1.6
Ihdirect Addressing.
9
1.7
Other Special Registers
13
1.8
Special Register Locations
14
1.9
Addressing and Use of Column 32
15
Introduction to Assembly Systems
16
2.1
Purpose of Assembly Systems
16
2.2
Mnemonic Coding
17
2.3
.Symbo 1i c Cod i ng
18
Relative Coding
19
2.5
Memory Mapping
20
2.6
Declarative Instructions
22
2.7
Assembler Processing
23
2.4
/
3.0
' Introduction to the UNI VAC 1005 Assembly System
25
3.1
Terminology Definitions
25
3.2
Coding Form
25
3.2.1
label
25
3.2.2
Operation
27
3.2.3
Operand 1
28
3.2.4
3.3
3.4
3.5
3.2.3.1
IA
28
3.2.3.2 .
Field A·
28
+
28
Inc
Operand 2
29
3.2.4.1
lA, Field B, ± Inc
29
3.2.4.2
Field C, ::t Inc.
29
3.2.5
Remarks
30
3.2.6
Card Number
30
Operand 1 Address Specification
31
3.3.1
Symboiic Address (Label) Specification
31
3.3.2
Increments to Symbolic Addresses
33
3.3.3
Decimal Addressing
34
3.3.4
Rowand Column Addressing
34
3.3.5
Instruct i on Locat i on C'ouriter (I LC)
Addressing
36
Operand 2 Address Specification
37
3.4.1
Operand 2, Field C, Blank Addressing
37
3.4.2 .
Operand 2 Indirect Addressing
39
Summary of Field A, Pie1d-B, and Field C
Specifications
41
3.5.1
Field A
41
3.5.2
Field B
41
3.5.3
Field C
41
c
3.6
4.0
Standard Systems Labels
UNIVAC 1005 Assembly Instructions
4.1
Legend
44
4.2
Length of Operands
44
4.3
Transfer Instructions
49
4.3.1
Transfer Descending
49
4.3.2
Transfer Ascending
52
4.3.3
Transfer Clear
55
.4.3.4
Transfer Numeric
56
4.3.5
Transfer Constant
57
(~
4.3.5.1
Symbolic Address Substitution
61
4.3.5.2
Row/Column and Decimal
Addressing
62
Binary Coded Constants
63
4.3.5.3
4.3.6
4.3.7
4.4
(/
42
Transfer to Register X
. Translate
66
68
Addition and Subtraction
71
4.4.1
Add Algebraic
73
4.4.2
Subtract Algebraic
75
4.4.3
Absolute Add
76
4.4.4
Absolute Subtract
77
4.4.5
Add Constant
78
Compar@ I ndr
4.6
4.7
ions
81
4 .. 5.1
Compare Numeric
83
4.5.2
Compare Absolute
85
4.5.3
Compare Alphanumeric
87
4.5.4
Compare Constant
89
Condition Indicators
92
4.6.1
Set Condition
93
4.6.2
Stop
97
Sequence Control Instructions
98
4.7.1
Jump Condition
99
4.7.2
Jump Test
105
4.7.3
Unconditional Jump
108
4.7.4
Jump Return
109
4.7.5
Jump Compare
113
4.7.6
Jump Loop
116
4.7.7
Jump I nd i reet
120
4.8
Count
122
4.9
Edit Instructions
125
4.10
f'
\~_/
4.9.1
Edit Logical
127
4.9.2
Edit Erase
130
4.9.3
Edit Superimpose
131
4.9.4
Edit
132
Declarative Instructions
139
4.10.1
Define Instruction Location Counter
141
4 .. 10.2
Defi ne Area
144
4.10.2.1
Define Sub-field
147
4.10 .. 2.2
Redefine Standard Label
149
c'
I
I
(
Define Constant
4.10.3
,
4.11
r
I
4.12
...
(
5.0.
4.10.3.1
In-line Constant
154
4.10.3.2
In-line COlTment
155
4.10.4
Defi ne Indi rect Address Constant
'157
4.10.5
Define End
161
MUltiplication Instructions
162
4.11.1
Multiply
164
4.11.2
Multiply (Long)
167
Divide Instruction
Divide
4.12.1
4.13
151
Input
au~put
Instructions
169
171
174
4°.13.1
Shortened General Commands
175
4.13.2
General Commands
176
4.13.3
Read Magnetic Tape
182
4.13.4
Wrtte Magnetic Tape
184
4.13.5
Receive Data Line
186
4.13.6
Send Data U ne
187
4.13.7
Receive Interface
189
4.13.8
Send Interface
191
Operating Instructions
193
1
f
I
j
o
I
! '
INTRODUCTION TO THE UNIVAC 1005
AND INTERNALLY SHRED FROffiArvM ING
1.0
The UNIVAC 1005 is classified as a general purpose, stored program,
digital computer.
The main store consists of either two or four banks
of core memory with 1024 locations per bank.
In addition to providing
storage for instructions and data, two types of Special Registers are
provided in core memory to control the operation of the UNIVAC 1005.
The special registers are addressable and in some cases can be used
as additional data storage.
1.1
ADDRESSING TECHNIQUE
Each bank of core memory consists of a 32 row by 32 column
matrix of 6-bit memory locations.
Each location is addressed by
specifying its Rowand Column coordinates.
For example; the
first memory location has an address of Row 1, Column 1; the
last memory location has an address of Row 32, Column 32.
These
address designations are abbreviated to R1/C1 and R32/c32.
In order to store the address of a single location in
memory, the six bits of two adjacent memory locations are required.
Five of the six bits of the left-hand location are used to specify
the Row coordinate, and five of the six bits of the right-hand
location are used to specify the Column coordinate.
A combination
of the sixth bits of both locations is used to specify which of
the four possible banks of memory is involved.
I
o
The UNIVAC 1005 utilizes a special 5-bit concept which operates on
a logical rather than a binary arithmetic basis.
Special combinations
of these fiVe bits are employed for the values 1 to 31 used as row
or column coordinates.
These 5-bit combinations, plus the sixth
bit required for bank designation, correspond to the 64 characters of
the UNIVAC 1005.
Thus, the address of any location in any bank of
core memory can be specified by the proper selection of two of these
6-bit characters.
The foregoing description indicates the similarity and compatibility
of the memory of the UNIVAC 1005 and the UNIVAC 1004.
For the purpose of stored-programming, the main store of the UNIVAC
1005 should be considered as 1922 (or 3844) consecutively numbered,
decimally addressed memory locations enclusive of the Special Registers
and Column 32 of card row.
o
The physical arrangement of main store
is then no longer a concern of the programmer.
Using this method,
the main store of the UNIVAC 1005 takes on the following appearance:
Banks 1 and 2
BANKS 1 and 2
1
101
201
100
200
300
'\;
:>
.-
H·
r-
~
(
--~.-
J---
)
1701
1801
1901
-1.m.]
1800
1900
o
(~
-- 11923
--
.2~ ____.
i.
2100
~
BANKS 3 and 4
<;
)
. J
-----3601
3701 _______
3801
3844 I
.-----
2000 1
2100
2200
S
~
~
3700
3800
Decimal addressing would then produce the following facility
for programming:
Decimal Adr.
First location of Read Input Storage (Card Col. 1)
1
Last location of Read Input Storage (Card Col. 80)
80
First location of Print Storage (Print POSe 1)
161
Last locafion of Print Storage (Print POSe 132)
292
First location of Punch Storage (Card Col. 1)
293
Last location of Punch Storage (Card Col. 80)
372
Since Print Position 1 is located at address 161, Print Position
23, for example, is located 22 positions away at address 183.
This same convenience IS extened to the addressing of the programmer's
data areas as well as to the other reserved areas of Input Output
storage.
A complete description of decimal addressing as provided
by the UNIVAC 1005 Assembly System appears in Section
of
this manual.
c
3
o
1.2
BASIC LOGIC AND FORMAT
The UNIVAC 1005 operates on a basic two address instruction logic.
A UNIVAC 1005 instruction contains the a'ddress of two pieces of
information called Operands, and an operation code for the process
to be performed with these Operands.
The Operands are defined by
specifying the address of the most significant location
(abbreviated MSL), or the address of the least significant
location (abbreviated LSL), or both, depending on the operation
to be performed.
Operations are specified by a one character code.
The majority of the UNIVAC 1005 instructions reqUIre Seven character
locations in the following format:
OP
I I I 1.
A
B
OP is
C
a single character which specifies the operation to be performed.
A is the two character address of the location of either the MSL or
the LSL of Operand 1.
B is the two character address of the
location of the MSL of Operand 2.
C is the two character address
of the location of the LSL of Operand 2.
o
Instructions are executed in ascending (LSL to MSL) or descending
(MSL to LSL) mode.
If the operation is performed in ascending
mode, the A portion specifies the LSL of Operand 1.
If the
operation is performed in descending mode, the A portion specifies
the MSL of Operand 1.
The use of UNIVAC 1005 character codes to
specify operation codes and addresses is called absolute coding
or machine coding.
A table of these codes and their equivalents
shown in Appendix __ •
IS
As will be explained in succeeding sections
of this manual, the UNIVAC 1005 Assembly System provides a
convenient method of specifying these codes.
Assembler processing
IS
The output of the
a deck of punched cards containing
instructions in machine code.
These cards are read by the UNIVAC
1005 and the instructions stored in core memory under the control
(
of a Load program which is provided for the UNIVAC 1005.
The Load
program is initiated by a special header card which is placed in
the front of the instruction cards.
1.3
CONTROL SECTION OPERATION
After the program has been loaded, operation of the UNIVAC 1005
proceeds under the control of the Instruction Control Counter(ICC).
The ICC is one of the Special Registers located in core memory.
The ICC
IS
a two character register which contains
the address
of the MSL of the instruction to be performed next by the UNIVAC
1005.
As each instruction
IS
accessed for execution, the contents
of the ICC are incremented by the number of characters in the
instruction--usually seven.
This increment is first added to
the right hand character of the ICC, the Column address portion.
When the Column count passes 31, an increment of one is added
to the Row address portion of the ICC, and the Column portion
is returned to 1.
0
Memory Bank specification is also advanced as
the Column count passes 31.
Thus the access and execution of
instructions proceeds in a sequential manner.
Instructions are
Row 32
provided to vary this sequential operation when required.
and Column 32 addresses are not included in the sequential advance of the ICC.
As each instruction. is accessed, according to the address in
the ICC, it is transferred
to the Instruction Register (IR).
The IR is a seven character Special Register which is used to
examine the instruction.
The bit configuration of the one character
Operation code is analyzed by the circuitry which establishes and
controls the functions necessary to perform the required operation.
The address portions of the IR are transferred to the internal
storage address controls for OP 1 and OP 2.
The
norma~
operation
of the UNIVAC 1005 when executing instructions is to access the
first character from either the LSL or the MSL of OP 1, and the
corresponding character from OP 2 (LSL or MSL) and perform the
process.
The determination of whether the LSL or the MSL is used
is based on the mode--ascending or descending--of the instruction.
After operating on the first characters from OP 1 and OP 2, the
operation proceeds with successive corresponding characters of OP 1
and OP 2 until the processing of the last character location of
OP 2 has been completed.
This signals the end of the instruction.
During the execution of each instruction, the contents of the ICC
~re
incremented according to the number of characters in the
instruction itself.
When the end operation signal is generated,
the new address in the ICC is used to control the access of the
o
1
next instruction eNI).
The execution of the program proceeds in
this manner to direct the UNIVAC 1005 to accomplish the desired
results.
1.4
OTHER INS1RUCTION FORMATS
The instruction repertoire of the UNIVAC 1005 includes a complete
set of commands for control of the operation of the system.
In
addition to the type of commands previously mentioned--seven
characters, with an OP 1 and an OP 2 address--there is a second
type of
co~mand
which provides for flexibility and ease
of control of the programming requirements necessary to internally
stored program operation.
The second type of instruction 1S five characters 1n length and
has the following format:
OP
A
B
Where:
=a
A=a
OP
one character operation code
two character constant whose value is used or whose
bit configuration is used to perform special functions
B
=a
two character address of the location in memory where
these operations and functions are performed.
As is the case with
~ost
stored program computers, there are
special commands in the UNIVAC 1005 with a format that does not
precisely conform to these two basic formats.
These special
commands will be either five or seven characters in length, and
the format variation will be indicated along with a complete
(~
description of the
operation~
..
"
7
1.5
0. ,
STORAGE ALLOCATION AND USE
'
The main st.ore of t.he UNIVAC 1005 is separat.ed
~ ~
hardware int.o
t.wo major'areas--input. out.put. st.ore, and working store.
Input output
st.ore consist.s of selected port.ions of memory reserved f6r the
informat.ion received from and t.ransferred t.o t.he inpu\l6ut.put.
devices.
When a reserved area is not. required for a device
as input/output. st.ore due t.o t.he operat.ions being performed, t.he
area can be used by t.he programmer for st.orage of inst.ruct.ions
Qr dat.a.
The working st.ore consist.s of ·t.hose portions of memory
not. reserved for input.;6ut.put. informat.ion--t.he remainder of
core memory.
The working store is separat.ed
~ ~
proerammer into t.wo t.ypes
of areas according t.o his programming requirement.s.
A portion of
working st.ore is est.ablished by t.he programmer t.o store t.he
informat.ion (other than
inpu~ut.put.)
t.o be processed.
The re-
mainder of working st.ore is used t.o st.ore the program inst.ruct.ions.
A not.e should be made at. this point. that t.he addressing capability
of the instruction address ext.ends to all of main store.
This
means t.hat the content.s of any memory locat.ion or locat.ions can be
accessed as dat.a t.o be processed.
This includes t.hose locat.ions
used by t.he programmer to store inst.ruct.ions.
The use of this
capability t.o operat.e on inst.ruct.ions as if t.hey were dat.a
IS
an import.ant. technique of internally st.ored programming.
c
8
1.6
INDIRECT
ADU~ESSING
Another facility provided by the UNIVAC 1005 is the ability to
perform Indirect Addressing.
In the UNIVAC 1005, Indirect
Addressing is the ability to specify in the address portion of
an instruction the address of the memory location which contains
not the data to be processed, but a secondary address which
specifies the location of the data to be processed.
From a hard-
ware standpoint, this is accomplished by using the primary address-the address in the instruction--to control the transfer of the
secondary address to the IR where it is then used as the
address of the data to be processed.
From a programming standpoint, Indirect Addressing allows
(--
the programmer to establish one series of instructions which
perform
a
programming operation on separately stored but related
items of information.
This is accomplished by programming the
instructions once using primary addresses, and changing the
secondary address to refer to the proper item for each uSe of
the series of instructions.
For example:
four twenty-column transaction items.
five-column fields.
The program
IS
a detail card contains
Each item contains four
written using primary
addresses which refer to a table of secondary addresses.
The
table is set up to refer to the address of the fields within
an item.
A series of addresses in the form of constants is
created by the programmer and stored in a portion of working
store.
There is a series of addresses for each of the transaction
"I
items as they will appear in Read Input Storage.
o
Before processing
the first transaction item, the program transfer the series ,of
addresses which refer to this item to the secondary address
table locations referred to by the primary addresses in the
instructions.
The first item is then processed.
At the con-
elusion of the processing of the first item, the program then
transfers the series of addresses which refer to the second
transaction to the table of secondary addresses.
The series of
instructions is then executed again, only this time, the table
of secondary address references the locations of the fields of
the second transaction item causing it to be processed.
The
program action of changing the contents of the secondary address
table is then repeated for the processing of the third and
fourth transaction items.
An explanation of this example is
shown in Figure ____ •
o
10
READ INPUT STORAGE
TRANSACTION ONE
: FIELD 2: FIELD 3 : FIELD 4
TRANSACT ION TWO
i
FIELD 2 ;
~_ _-4-~_ _. !. .!1O.-:..J...:..1_ _---"~~:-:-:-~~~=~..p...:..~::.....--~3Q
3:
FIELD 4
31
__
I
___~~~_ _~~~~~~_~5Q~j __~~5~~~5~6_ _~6~d~6~1_ _ __
-- ----
-- -
- - -
- - ---
---
- - -
-- -- - .........
SECONDARY ADDRESS TABLE
ENTRY 2
ENTRY 3
ENTRY 4
Am. OF
ADR. OF
ADR. OF
FIELD 2
FIELD 3
FIELD 4
MSL LSL
1234
(-
'\
,
\
\
MSL LSL
1234
,
I
J
- - - -- - - - - - - - - - - - ;." -- - - - - -- - - - - - - - - - --"...
"",.----
II
--------
" • ______________________________________________ _
'''''';
EN~Y 1 {
\
ENTRY 2
ENTRY 3
ENTRY 4
,
ADR. OF
FD. 1. ITEM 1
Am: -o"F- --- -
FD 1. ITEM 2
ADR. OF
FD. 1. ITEM 3
Am. OF
FD 1 ITEM 4
CONST ANT STrn AGE
Am. OF
Am. OF
FD 2. ITEM 1
£D 3~ ITEM
-A"Ili.-or-Am7"DF -FD 2. ITEM 2
FD 3" ITEM
Am. OF
Am. OF
FD 2. ITEM 3
FD. 3. ITEM
Am. OF
Am. OF
FD 3 ITEM
FD 2 ITEM 4
--
-
'
1
2
3
4
--
Am. OF
ill 4 iTEM 1
~.
I
OF
FD 4 ITEM 2
Am. OF
FD. 4, ITEM 3
Am. OF
FD 4 ITEM 4
Process i ng Requ ires:
Calculate the sum of Fields 1, 2, and 3.
Field 4.
Subtract the sum from
Do this for each transaction •.
1/
Oi
INSTRUCTIONS REQUIRED
The * indicates Indirect Addressing
oPER AT ION
FIELD A
FIELD B
FIELD C
Instr. 1
TRF-D
MSL of Entry
1 in constant
storage
MSL of
Sec Adr
Table
LSL of Sec
Adr Table
2
ADD-ALG
*ADR of Loc 3
Entry 1, Sec
Adr Table
(LSL Field)
3
ADD-ALG
*Affi of Loc 3 *ADR of Loc *Affi of Loc
Entry 2, Sec
1 Entry 3 3 Entry 3
Adr (LSL Fd 2) Sec Adr
Sec Adr
(MSL Fd. 3)(LSL Fd 3)
Same as for Instruction
except that substitutes
are made from Entry 2
and Entry 3.
4
SUB-ALG
*ADR of Loc
*ADR of Loc 3 *Am of
Loc 1
3 Entry 4
Entry 3, Sec
Adr (LSL Fd 3) Entry 4,
Sec Adr
(LSL Fd 4)
Sec Adr
(MSL Fd 4)
Same as for Instruction 3
except that substitutions
are made from Entry 3 am
Entry 4
5
TRF-D
MSL of Sec LSL of Sec
MSL of Entry
2, then 3, then Adr Table Adr Table
4, in constant
storage
The addresses of the next
item are set up in the
Sec Adr T",ble
6
Return to
Instruction
2
ACTION
The MSL and LSL addresses
of the Fields of Transaction One are transferred
to the Sec Adr Table
I
NOTE:
",
*ADR of
*ADR of Loc
Loc 1
3 Entry 2
SecAdr
Entry 2,
(LSL Fd 2)
Sec Adr
(MSL Fd 2)
The primary address in the
A position of the instruction refers to the lower
2 characters of Entry 1
in the Sec Adr Table.
These two characters are
then used as the A address
of this instruction. The
primary addresses i~ the
Band C positi6ris
similarly refer to the Sec Adr
Table Entry 2, and address
substitution occurs.
Transfer control to
instruction 2 to initiate
processing of the next
item.
Additional programming techniques are necessary to control the
number of times these instructions are to be executed for each
card read. They are not involved with the USe of Indirect
Addressing, and were omitted in order to confine the example
to the discussion. They will be covered along with the UNIVAC
1005 Operations which are used for the additional techniques.
(See the JL and the CC instructions if desired.)
----
--------- - - - - - - - - - - - - -
c
ldo
1
The normal use of Indirect addressing is with data which
contains a multiple item format similar to the punched card
format in the preceding example.
The multiple item concept
IS
generally used for magnetic tape master and detail files. The
use of the Indirect addressing capability of the UNIVAC 1005 is
not restricted to the multiple item concept.
Other UNIVAC 1005 Operations and capabilities designed to implement
stored programming techniques are described in this manual along
of the application of the technique.
with an example
.
:;.
1.7
OTHER SltC IAL REG ISTrnS
There are two Special Registers In addition to the Instruction
Control Counter and the Instruction Register.
These are the
Multiply/Divide Register (MDR), and a multi-purpose register
called Register X (rX).
The MDR is 31 locations in length, and is used by the Multiply
and Divide instructions.
i~hen not required for this purpose, the least
significant 22 locations ~ay be used for intermediate programming results.
Register X is 31 locations in length and is used primarily when
Add or Subtract operations involve Operands of unequal length.
When not required for this purpose, rX can be used for intermediate
results of programming operations.
(
'
.
,
I~
--
--------~---~~
o
A thorough explanation of the use of rX and the MDR is given in
this manual where the Operations which reference them are discussed.
It should be remembered that all Special Registers are located in
core memory, are explicitly addressable, and are in addition to
the basic two or four banks of main store.
1.8
SPECIAL REGISTER LOCATIONS
The Instruction Register (IR), the Instruction Control Counter
(ICC), and the Multiply/Divide Register (MDR) constitute 'an
extra row of core memory--ROW 32.
This set of special registers
is in ROW 32 of BANK 1.
COLUMN
1
31
1
ROW
BANK 1
IR IICCI
o
MOO
32~~~~1~~~
1
7
8 9
10
31
Register X constitutes an extra row of core
1
COLUMN
memory-~OW
32 of BANK 2.
31
1
BANK 2
ROW
32
~
1
rX
_ _ _ _ _---"
31
When the ICC is incremented for sequential access of instructions,
it advances from R31/C31 of Bank 1 and Bank 2, to R1/C1 of Bank 2
and Bank 3 respectively, thus bypassing the special registers.
The
use of decimal addressing does not include the specification of the
addresses of the Special Registers.
They can be addressed using the
Row/Column addressing provision of the UNIVAC 1005 Assembly System.
o
IlJ
--------
1.9
ADffiESSING AND USE OF
COLU:~N
32
Each of the 32 Rows of memory contains 32 columnar positions.
The allocation of memory by the Assembler program is made on
the basis of 31 Rows and 31 Columns per Bank.
r
As described
in Section 1.8, Row 32 of Bank 1 and Bank 2 are excluded from
Assembler allocation and are used for the Special Registers.
The explanation of the advance of the Rowand Column portions
of the Instruction Control Counter indicates that not only is
ROW 32 of memory bypassed, but also COLUMN 32 of each Row of
memory
IS
also excluded
f~
Assembler allocation.
Column 32 of each Row in Bank 2, 3, and 4 become a series of
one characler locations whkh can be used by the programmer for
such things as single character constants, control settings,
program switches, etc.
Decimal addressing does not include the
addressing of any Column 32.
The Row/Column addressing provision
of the UNIVAC 1005 Assembly System provides the means of addressing
each of these single character locations.
NOTE:
Column 32 of each of the Rows in Bank 1 are
reserved for hardware/software control purposes
and must not be used by the programmer.
Row 32 of Bank 3 and Bank 4 are also not included in the allocation
processing of the Assembler program. Row 32 of Bank 3 and Bank
4 can be used by the programmer for the storage of data and
intermediate results of processing.
J('
c
INTRODUCTION TO ASSEMBLY SYSTEMS
2.0
NEED FOR ASSEMBLY SYSTEMS
Control of an internally stored program computer is accomplished by
,
providing the computer wrth a set of instructions which have
been designed to produce the desired results.
These instructions
,
i
are created by the programmer according to the specific requirements
and capabilities of the computer.
The 'instructions must be entered
in the computer memory in a specific sequence using a precise
set of characters.
This set of characters constitutes the
vocabulary or language of the machine.
Machine languages are
dictated by the design characteristics of the computer and seldom
bear any relationship to human language.
Furthermore, machine
languages seldom follow any logical pattern that a person could
use when writing a program.
In addition to the language barrier,
there are many clerical-type functions which a programmer must
perform when writing a program.
2. 1
PLR POSE OF ASSEMBLY SYSTEMS
In order to overcome the language barrier, and to provide the
programmer with clerical-type assistance, an assembly system
is usually provided as part of the software of an internally stored
program computer.
The assembly system allows the programmer to use a machineoriented language which is also human oriented.
The programmer
o
Ii:>
----~--
---~-------------~
[c
writes the instructions in assembly language according to the
rules of the assembly system.
These instructions are
punched
into cards and are read into the computer under the control of
a program called the assembler program.
The assembler program
!
analyzes the assembly language instructions and translates
t
computer.
or
converts this language into the precise machine language of the
An output deck of punched cards is produced by the
assembler processing which contains the machine language
instructions.
This deck of cards is then read into the computer
under 'the control of a load program which stores the instructions
in the required sequence.
The computer is then instructed to
execute the program.
The deck of cards which contains the instructions written in
assembly language is called the source deck.
The output deck of
cards which contains the instructions in machine language is
called the object deck.
In some cases, the assembly language is
referred to as the source language or source code, and the
machine language is referred to as the object language or object
code.
2.2
MNEMONIC CODING
The terms mnemonic, symbolic, and relative coding are sometimes
erroneously
used as synonyms.
Each term has a specific meaning,
and each one constitutes an important characteristic of an
assembler.
c/'7
o
An assembly language usually contains a set of mnemonic codes
which represent the Operation codes of the computer.
These
mnemonic codes are established to help the programmer remember
the code to be used for the Operation needed.
In addition to the mnemonic codes which correspond to the specific
commands of the computer, an assembler usually provides a set of
mnemonic codes for pseudo-operations.
The pseudo-operations are
established for the stored-programming functions which
t~e
programmer normally needs to implement his problem solution.
These pseUdo-operations usually represent options of computer
Operation codes and are glven mnemonics which make it easier
for the programmer to specify his needs.
In some cases the
pseUdo-operation represents a combination of two or more computer
o
instructions which are needed to implement a stored programming
technique.
2.3
SYMBOLIC CODING
Symbolic codes are a usual provision of' an assembly language to
allow the programmer to assign meaningful names to important
information within his program.
For example, the fields of data
in a payroll card are known to the programmer by the type of
information they contain, such as Employee Number, Department,
Gross Pay, etc.
a symbolic name.
There is normally a limitation on the length of
However, this length is usually enough to permit
meaningful abbreviations or contractions.
In the example above,
the Employee Number field could be named EMPNO; the Department
o
If
I
lc
field could be named DEPT.; the Gross Pay field could be named
GAPAY.
As will be discussed in the section on memory mapping, the
actual addresses of these fields in memory are assigned· by the
assembler program.
When the name or label appears anywhere in
the source language instructions, the assembler program will use
the assigned actual address in the object language instruction.
Symbolic labels are also assigned to instructions In the program
which are referenced by'other instructions in the.program.
When
a non-sequential transfer of control is required from one series
of instructions to another, the programmer must specify the point
to which control is to be transferred.
Since actual addresses are
assigned by the assembly program, the programmer cannot provide
the actual address.
By labelling the instruction to which control
is to be transferred, he.can use the symbolic address for the
same purpose.
2.4
RELATIVE CODING
Relative coding is another assembly system technique which
allows the programmer to specify the location of instructions and
data, even though the actual addresses are assigned by the
assembly program.
To use the relative coding technique, the
programmer must have a thorough understanding of the memory
mapping operation of the assembler program.
Once this is
understood, relative coding is a simple yet powerful stored
programming technique.
In the preceding section on symbolic
coding is an explanation of the assembler program assignment of
1'1
V symbolic labels.
addressAto
1
This creates a common fixed point
oj
of reference between the programmer and the assembler program.
By using this common fixed point of reference (the label) as a
base, the programmer can specify other locations by their position
relative to the base.
For example, if the memory location
which is to contain the information from card column 1 has been
given a label of DETCD, then the memory location which is to contain the information from card column 5 would be 4 locations away.
By specifying an Operand label of DETCD + 4, the programmer causes
the assembler program to assign the actual address of the operand
~
by mathematically adding the increment of 4 to the actual address
I
of DETCD. The assembly system usually provides for decrements to
symbolic labels as well as increments.
2.5
o
MEMORY MAPPING
In order to assign the location of instructions and data, the
assembler program must keep track of the locations that are used
as the assembler processing is performed.
To do this, the
assembler program contains an Instruction Location Counter (ILC).
This is a program created device, not a piece of hardware.
The
loading of the assembler program itself usually sets the ILC to
the actual address of the first memory location.
The assembler
program then causes the reading of the first source language
struction.
in~
This instruction is assigned to an actual address
according to the present value of the ILC (in this case, the
first memory location).
After the machine language for the
o
instruction has been created by the assembler processing, a card
is punched containing the machine language instruction.
The
number of locations that will be required to store the instruction
is added by the assembler program to the ~alue of the ILC creating
a new value in the ILC.
The assembler program then causes the
next source language instruction card to be read.
This instruction
is assigned to an actual address according to the present value
of the ILC.
Assume that the actual address assigned to the
preceding instruction had been R25/C1 and that the instruction
was seven characters in length.
the MSL of the instruction.)
(R25/C1 becomes the address of
The assembler program would then
add seven (the number of locations for the fi rst instruction)
(-
to the machine code equivalent stored in the ILC, and arrive at
the machine code equivalent of R25/C8.
This
IS
the actual address
assigned to the second instruction assembled.
The use of this procedure by the assembler program insures that
the assignment of addresses to instructions follows the sequential
access of the instructions by the computer
w~en
the object program
is executed.
In addition to an ILC, an assembler program may contain a Data
Location Counter (DLC).
The DLC provides the programmer with the
ability to assign locations to his data in an area of memory other
than the area to be used for instructions.
Instructions are
usually assigned to locations starting with the first memory address
c
Clow-numbered locations) and proceeding in ascending sequence.
Data is usually assigned to locations starting with the last memory
address (high-numbered locations) and proceeding In descending sequence.
2.6
DECLARATIVE INSTRUCTIONS
F-'.
I','
."L/.
An assembly system with an ILC and a DLC usually provides a set
I
of pseudo-operations which allow the programmer to establish and
modify the value in the location counters.
1
In addition to the
I
pseudo-operations which manipulate the ILC and the DLC, there
~
,
1
are usually other pseudo-operations which are required to instruct
the assembler program as to the manner in which the assembly
processing is to take place.
declarative instructions.
These pseudo-operations are called
Unlike the previously mentioned
pseudo-operations, declarative instructions, which are included
in the source language deck, do not produce instructions in
the object language deck.
The declarative instructions are for
the use of the assembler program during the assembly processing,
and not for the computer as part of the object program.
An example of a declarative instruction would be one that updates
the DLC.
Assume the problem called for storing the contents
of a header card to print headings on each new page.
The
programmer would label the source language instruction line, write
the mnemonic pseudo-operation code that decrements the DLC, and
indicate the value of the decrement (the number of locations to
be reserved for the data).
Such a line of source code might
appear as
Label
HDRCD
OP Code
# of Locations
DA
80
(stands for Define Area)
c
When this line of source coding is encountered, the DA tells the
assembler
progra~
to refer to the DLC.
The contents of the
DLC are decremented by the number of locations to be reserved.
The new value of the DLC is assigned as the address of HDRCD.
In
order to reference the information .in the HORCD area, the programmer
can use relative coding.
2~7
ASSEMBLER FROCESSING
An assembler program consists of a set of machine code instructions
designed to produce specific results.
As is the case with any
computer program, the assembler program is designed to receive
specific information prepared in a precise format.
It is the
responsibility of the programmer to prepare the source language
program deck according to the rules of the assembly system.
(
Any
errors in the source language will produce incorrect results from
the assembler processing.
In order to produce a complete object program, the assembler program
must read-the entire source program before producing any object
instruction cards.
During the reading of the source cards, the
assembler program performs a preliminary· analysis and converts
or translates from source language to object language wherever
possible, eg:
the mnemonic operation codes.
is read and the mnemonic operation code
IS
As each source card
translated, the
assembler program determines the length of the instruction.
The
instruction is assigned to an actual address, and the ILC is
updated.
If the source
lang~age
instruction has been assigned a
symbolic address by the programmer, the label and the 3.ctu3.1
address are stored in a table.
When these labels appear in
the source language instructions as Operand addresses, the
assembler program searches the label table using the symbolic
address as the key, and secures the actual address assigned to
the label.
The actual address is substituted for the programme?s
symbolic operand address.
The assembler program contains many other tables which it
references for conversion of the source language to object
language.
After complete analysis and conversion of the source
language, the assembler program causes the object program to be
listed and punched.
o
1(,
INTRODUCTION TO THE UNIVAC 1005 ASSEMBLY SYSTEM
3.0
Most of the programs for the UNIVAC 1005 will be written in
the language of the UNIVAC 1005 Assembly ~ystem.
The UNIVAC 1005
Assembly System provides the programmer with the necessary
functions and convenience described in the preceding section.
The use of instruction forms not described in this manual deviates
fro~
3.1
UNIVAC recommendations and must be the user's responsibility.
TERMINOLOGY DEFINITIONS
Alphabetic means a letter from the English alphabet (A through Z)
Numeric means an Arabic numeral (0 through 9)
Alphanumeric means the entire 64 character set of the UNIVAC 1003
which includes letters, numbers, and spe~ial characters.
3.2
COD ING FffiM
A coding form to be used to record the programmers instruction
for subsequent key punching and processing by the UNIVAC 1005
Assembler program is shown in Figure ____ •
The coding form
IS
set up in the same format as the punched card, and contains an
indication of the card columns to be used for each field.
LABEL
3.2.1
LABEL
Columns 1 through 5
5
_.~._
.. ! .. L.
This field is provided for the symbolic Labels which are assigned
to those lines of coding which are referenced by the object
program instrudio'ns.
A label may consist of from one to five...--
characters (inclusive) and must begin in column 1 of the field.
The first (left-most) character of a Label must be an alphabetic
c
character.
The remainder of the characters in a Label can be
alphabetic or numeric.
in a source program.
There is no limit to the number of Labels
However, if more than 40 Labels are used,
extra processing is required by the Assembler program.
This is
fully explained in the section on Operating the Assembler System.
Five positions are provided in the Label field to allow meaningful
assignment of programll'3r names.
However, only the left-most three
positions of a Label are significant to Assembler processing.
The
first three positions of each Label must be unique within a
program.
Extreme care should be taken when creating Labels.
Labels used in a single program must be unique and may appear
only once in the Label field.
Labels will be used in the
Operand address portion of instruction lines and may appear there
as often as necessary.
The explanations in this manual of the
use of the relative coding technique of increments and decrements
to Labels should enable the programmer to address the data in his
program without an excess of Labels.
The Label of a line of coding becomes the symbolic' address for
the left-most (MSL) position of the instruction, and is used
whenever the instruction is referenced.
Labels are also used for
the lines of coding which define data areas, and become
the symbolic address for the left-most (MSL) position of the
area set aside for data.
o
~(
Since not all lines of coding require a label, the field may be left
blank.
Some examples of labels are:
LABEL
r
~PERATION
3.2.2
Columns 6 through 10
OFtRAT ION
6
1D
--L--L-L.-.L
This field IS for the mnemonIC operation codes provided by the
(
Assembler.
Operation codes are usually alphabetic.
The majority
of Assembler Operation codes are two characters in length, and
must begin in column 6.
Some examples of Operation codes are:
PERAT Ior~
:·6
:f\:».
;5 Iv..
10
I
!
I
I
!
~I
E..I~:D.
~
3.2.3
OPERAND 1
~ FIELD A + INC
:* .12
18 ?C
'16
OPERAND 1
~l
This is a heading for those columns which are normally used to
specify the address of the MSL or LSL of OP 1 depending on the
ascending or descending mode of the instruction.
This portion of
I
•
the OPERAND 1 fields is based on the normal use to specify OP 1
,l
addresses.
1
the coding form is also used for other purposes, since not all
Operations involve an Operand 1.
I
A complete explanation of Operand 1 addressing
begins In Section
3.2.3.1 IA
The following description of
~.
Column II
This column is used to indicate Indirect Addressing.
When the
OP 1 of an instruction is a primary address, an asterisk (*) is
placed in this column.
3.2.3.2 FIELD A
It must be' left blank at all other times. \
Columns 12 through 16
This field of the form will normally contain a programmer's symbolic
address for the location of instructions and data within his
program.
Any Labels which appear here must also appear in the
LABEL field of some line of coding.
Field A is a five position
field for OP 1 Labels which normally begin in column 12.
+
3.2.3.3 - INC
Columns 17 through 20
These columns are normally used to indicate an increment to the
address assigned to a Label.
numbers.
added.
Increments are shown in decimal
If column 17 contains a plus sign (+) the increment is
If column 17 contains a minus sign (-) the increment becomes
o
as
a decrement and is subtracted from the Label address.
must be left-justified (begin in column 18).
Some examples of OPERAND 1 addresses are:
*
Increments
OPERAND
FIELD A
2
1
16
•
I
--_...
3.2.4.
OPERAND 2
I~
* 22
26 -- 28 30
.
- - _..
-
OPERA In 2
FIELD B + INC
FIELD
32
J i
C
36
...
INC
-be
/10
J
....L
J
This is a heading for those columns which are normally used
I
_I
~
to specify the MSL and LSL addresses of Operand 2 in the instruction.
This portion of the form is also used for other purposes.
The
following description of the OPERAND 2 fields is based on the
normal use to specify OP 2 addresses.
OPERAND 2 addressing
IS
3.2.4.1 lA, FIELD B;tINC
A complete description of
found in Section 3.3.
Columns 21 through 30
These fields are normally used to specify the most significant
location (MSL) of OP 2.
The description of the contents of
these fields is the same as the description of the contents of
OPERAND 1.
3.2.4.2 FIELD C, ± INC
Columns 32 - 40
These fields are normally used to specify the least significant
location (LSL) of OP 2.
NOTE: The indication for OP 2 Indirect Addressing is
in column 21: only. Column 31 is not used as pad of
the specification for OP 2 LSL.
i
,£',
The description of FIELD C and! INC is the same as the
correspondinQ fields of OPERAND 1.
3.2.5 COMMENTS
This
L,,'
C.·~~M't~
~,
Columns 41 through 56 1141
PQ~tion
t
l _ J--..l._L .J
L-J._L. .
..
of the form is provided to allow the programmer
I I
.L. I
I
~'
I
I
•
The remarks are not considered by the Assembler
processing and merely pass through to the printed and punched
output.
These columns are also used to indicate constant values
which are to be included in the object program.
This use is
described In the section which covers Constants.
.e.
If the RDMfl;I(S
(j\)M~f.M'S
exceed )( positions, a COMMENT line of coding may be used.
(See Sect ion ___ .)
3.2.6.
CM D NUMBER
Columns 62 throuah 66
::>
This portion of the form is subdivided into three fields-PAGE NUMBER, LINE NUMBER, and INSERT NUMBER.
colu~ns
These
are
used to indicate the number of the page of coding, and the number
of the line from which the key punched card was produced.
The Card Number field will assist the key punching effort as well
as provide for the re-sequencing of the cards in the event the
original sequence is disturbed.
For proper assembly proceSSIng,
. it is necessary that the cards be read by the Assembler program in the
sequence in which they appear in the source program.
field is used for external control purposes only.
The Card Number
The Assembler program
does not check the sequence as it reads the card.
o
30
----
--------
,
f:
~
11
to include pertinent remarks as to the purpose of the line or
lines of coding.
!
The INSERT NUMBER
colu~n
is provided as a facility to insert
additional lines of coding in a source program, after the
initial effort, without disturbing the sequence established by
Page and Line Number.
During the assembly processing, the Assembler program assigns
a consecutive number to the output cards in the object program
,,
deck.
The Assembler assigned card number is punched into
colu~ns
3.2.7
62 though 65.
Column 66 is blank In the
o~tput
card.
The remainder of the card columns are not examined by the
Assembler program, and are available for whatever use the
programmer may determine.
Such things as Job Number, Programmer's
Initials, and Date may be included on a repetitive punching basis.
These items will not appear in the object deck.
(~
Card Columns 67
through 73 are used for the object language instructions, and
columns 74 through 80 are used for instructions to the Load
program •
3.3
.
OPERAND 1 ADDRESS SPECIFICATION
There are several methods of specifying operand addresses in the
UNIVAC 1005 Assembly System.
A description of the three most
used methods follows below.
The remainder of the methods are
described in Appendix ____ •
3.3.1
SYMBOLIC ADDRESS
(Label)
SPECIFICATION
A definition of a symbolic address and
have been given in preceding sections.
so~e
examples of Labels
In the UNIVAC 1005
Assembly System, when a Label is used on a line of coding which
31
defines a data area, that line of coding also includes the length
of the area to be allocated to the data.
The Label is then
used to specify the MSL of the data area.
ct
By placing a plus sign
1
(+) as a prefix to the Label when it is used as an operand address,
~
the programmer can specify the LSL of the data area.
Example:
of
ROW
j
A Declarative has been used to establish a data area
of six positions with a Label NAME. Assume the data
area has been allocated in memory as:
COLUMN
I1 I
2
I3 I
4
I
5
l6 L1 I
!J
9
I
10
1:2:!J
12
I
I
NMAE
The following use of the Label NA~E as an Operand 1
address of a TRF-D instruction wo~ld then cause a
substitution of R25/C6, since a Label specifies the
MSL of the area.
LABEL PPERATION
5 6
1
_.L.....a __ ~_L_
----.-.-
OPERAND 1
~ FIELD A + Hie
16 -118 2(;
10 * 12
tr~-L- --~~k
'--
LL._LJ
The use of the plus sign (+) prefix to the Label NA~E
as an Operand 1 address in a TRF-A instruction would
then cause a substitution of R25/C11, the LSL of the area.
LABEL
NOTE:
The plus sign (+) can be used as a prefix to 5 character
Labels by coding t~e ~i~st 4 characters only. The first
3 characters are significant to the Assembler program.
Labels must be coded starting in the left-hand position of Field A
(column 12). If the plus sign (+) prefix is used, it must appear in
column 12, and the Label starts in column 13.
o
3.3.2
INCREMENTS TO SYMBOLIC ADDRESSESS
When a Label has been placed on a line of coding, the programmer
knows that the Assembler program is going to allocate the
num~er
of memory locations required by that line of coding, and will also
assign an actual address to the Locations.
The programmer does
not know the actual address which will be assigned, but he knows
that the use of the same Label will cause the Assembler program
to substitute whatever actual address was assigned.
Based on
this knowledge, the programm~r is then able to specify the address
of locations relative to his line of coding.
This is accomplished
by indicating an increment or decrement to the Label in the
+
-, INC field of the Coding form.
Assume that allocation has been made according to the previous
(-
example.
The following coding would cause the Assembler program
to produce these substitute addresses:
OPERAND
FIELD A
* 12
"
1
16
(MSL + 1)
=
address R25/C7
=
address R25/C11 (MSL + 5
=
address R25/C10 (LSL - 1)
= LSL)
= address R25/C6
(LSL - 5 = MSL)
=
address R25/C3
(Outside of area)
=
address R25/C12
(Outside of area)
It should be noted that the use of increments is
not restricted to addresses within the area
allocated by the line of coding
33
o
When an increment is used, a plus or minus sign must appear in column 17,
and the amount of the increment (in decimal numbers) must start in
column 18.
3.3.3
DECIMAL ADDRESSING
As mentioned Section 1.1, decimal addressing is provided by the UNIVAC
1005 Assembly System. This technique allows the programmer to consider
the layout of Input Output, instructions, and data in a consecutive
sequential manner. This eliminates the problems associated with
advancing that takes place in Rowand Column addressing.
When a decimal address is specified to the Assembler program, the
decimal number is converted to the two-character address required 1n
the object language.
Decimal addresses take the following form:
N through NNNN
= the
special character lozenge which indicates
to the Assembler program that what follows
is a decimal number.
N through
NNNN
=a
decimal number which must be left-justified.
Indirect Addressing is allowed with decimal addressing.
Examples of decimal addressing
OPERAND 1
FIELD A
* 12
= First location of Read Input Storage (R1/C1,
= Last location of Read Input Storage (R3/C18,
= First location in Bank 2 CR1/C1, Bank 2)
= Last location in Bank 2 (R31/C31, Bank 2)
Bank 1)
Bank 1)
When decimal addressing is used, the lozenge (
) must appear in column
12. The decimal number must begin in column 13. The deimal number cannot
3844 (four bank system).
exceed 4 digits, since the maximum address is
3.3.4
ROW AND COLUMN ADDRESSING
Rowand Column addressing is used when the programmer knows the actual
address of the data. An actual or absolute address in the UNIVAC 1005 1S
specified by two 6-bit characters which are converted by the computer
circuity into Row, Column and Bank. Rowand Column addressing
in the UNIVAC 1005 Assembly $ystem allows
o
the programmer to specify Row, Column, and Bank eliminating
the need to memorize or reference tables of the two-character
codes required in the object program.
The following format is used to specify Rowand Column address: .
~RCCBn
$ is the indication to the Assembler program that what
follows is a Rowand Column address
numeric Row Number (1 - 32)
CC
= the
= the
n
= the
numeric Bank Number ( 1 - 4 )
RR
J
numeric Column Number (1 - 32)
+
B must be placed in the - column of the OPERAND field
Example:
(
MSL of Read Input
LSLof Read Input
LSL of rX
Indirect Addressing can be specified with machine-oriented addresses
by placing an asterisk (*) in the appropriate column (11 or 21)
of the form.
The $ must appear in column 12, 22, or 32, and the letter B must
appear in column 18, 28, or 38.
Increments to Rowand Column
address are not allowed.
Rowand Column address is also used to specify the address of the
Special Registers.
3.3.5
INSTRUCTION LOCATION COUNTER (ILC) ADDRESSING
The ILC is the counter in the Assembler program which keeps
track of the allocation of memory locations to
instru~tions.
The use of the current value of the ILC for addressing purposes
is provided by the UNIVAC 1005 Assembly System.
Proper use of
this technique is based on the programmer's knowledge of the
memory mapping process of the Assembler program.
(See Section 2.5).
The $ character, alone, In the left-hand position of Field A, Field
I
(
B, and Field C of the coding form, instructs the Assembler
program to use the current value of the ILC as the address for
the A, B, or C portion of the object instruction.
An increment
or decrement to the address currently in the ILC can also be
+
specified in the - INC fields for each address.
This increment
or decrement does not change the value of the ILC itself.
The
maximum increment or decrement is 961.
FXamDip. 1:
Assume the valup. of the ILC is tt 745 (R25/C1. B1)
at the time the fOllowing descending transfer instructi~n
IS to De assemDled.
LABEL
c
-
--~----~----
$ + 7 produces an address of 752 (745 + 7) which is the address
which will be assigned to the next instruction. Transfer will
begin at the MSL of the next instruction.
Example 2:
The. fol.10wing coding of a descending trans.f~.r Jr:LsJr~..s;!J.9.r:'I
will cause the instruction it~elf t~ be transferred.
_
OPERATION
LABEL
1
--L..o.-..J. _. _.
3.4.
(-
10
5 6
_~_ ...
..
OPERAND 1
~ FIELD A + INC
* 12
~.
J.,
-.
16 - 18 ZJ
1
OPERAND 2 ADDRESS SPECIFICATION
The rules for OPERAND 1 address·specification.(Section 3.3) apply
to OPERAND 2 address specification.
3.4.1
OPERAND 2, FIELD C, BLANK ADIRESS ING
The majority of UNIVAC 1005 Operations require the specification
of an A address (OP 1 MSL or LSL), a B address (OP 2, MSL), and
a C address(OP 2 LSL).
The UNIVAC 1005 Assembly System
allows the programmer to leave the Field ·C pod ion of the source
language instruction blank when a symbolic address
Field B.
IS
used in
When a Label is used in the Field B portion of the
instruction, the Assembler program references the Label Table
to acquire the MSL address of the area it has assigned to the
Label.
The same reference to the Label Table will also produce
the LSL address of the assigned area which the Assembler p-ogram
will then automatically include in the object instructions as
the C address.
If Field S of the instruction does not contain a Label, automatic
(blank) addressing will not be performed.
If the Field C portion
of the instruction contains any information, automatic (blank)
addressing will not be performed, and the address specified in
Field C will be used.
If the LSL of the area indicated by the
Label in Field B is not to be used, the programmer must specify
the desired address in Field 8.
For the following examples, DATA is the Label of a 6 character
field assigned by the Assembler program
to R25/C1, B1 (MSL) through R25/C6, B 1 (LSL)
Example 1:
+
INC
- '8'10
I
I
I
I
The Assembler program wi 11 automat ica11 y
assign R25/C6, B 1 as the C address.
Example 2:
FIELD C
32
+
INC
fiO
36
I
I
The coding in Field B specifies that the LSL
of DATA (+ prefix) is to be the MSL of the
instruction. The blank Field C specifies
that the LSL of DATA is to be the LSL of the
instruction. This coding produces a one
character operand with an MSL and LSL of
R25/C6, B 1.
Example 3:
+
INC
/iO
I
I
Field B specifies that the MSL of D~TA plus
3 locations (R25/C4, B1) is the MSL of OP 2.
Again the blank Field C will automatically
p.roduce the LSL of DATA (R25/C6, B1) as the
LSL of OP 2. OP 2 is a 3 character operand.
31
- - - - - - - - - - - ------------
(-
Example 4:
FIELD C ...
32
36 -
INC
8
fiO
Field B specifies that the LSL of DATA
(+ sign) -3 (R25/C3, B1) is to be used.
as OP 2, MSL. The presence of information
in Field C prevents the automatic (blank)
addressing of OP 2, LSL. Field C
specifies that the LSL of DATA (+ sign)
-1 (R25/C5, B1) is to be used as the LSL
of OP 2. OP 2 is a 3 character operand.
3.4.2
OPERAND 2 INDIRECT ADDRESSING
As explained in Section 1.6, Indirect Addressing utilizes a primary
address in the instruction which specifies the location of a
secondary address in memory which contains the address of the data
to be used in the
(
Operatio~.
When Indirect Addressing is used for OP 2 of an instruction, the
primary address in the instruction must refer to the MSL of a
4 character location that contains the
seco~dary
address.
A4
character secondary address is necessary due to the fact that OP 2
of the object instruction must specify a 2 character MSL address
and a 2 character LSL address.
The specification of Indirct Addressing will cause the UNIVAC 1005,
at object execution time, to perform a 4 location descending
transfer from the address specified In the B portion of the
instruction to the Band C portions of the Instruction Register.
The OP 2 will then be accessed based on the new addresses in the
'Instruction Register.
If a Label is used with OP 2 Indirect Addressing, the Label is
specified in Field B, and Field C is blank.
The Label in Field
B must specify an assigned area of 4 characters which contain a
B and a C address.
The UNIVAC 1005 Assembly System provides a
pseudo-operation which is used for this purpose.
Operation, Section __ .)
(See the DI
OP 2 Indirect Addressing is specified
by an asterisk (*) In the IA Field of OPERAND 2 (Column 21).
No
indication is made In Column 31, since the Indirect Address
4
I
functions for both the MSL and LSL of OP 2.
Example:
Label JOE has been defined as the primary address for the
secondary address DATA. DATA has been defined as a 6
character area. JOE has been assigned to locations .t{
801 through t(804. DATA has been assigned to locations
}( 745 through ~ 750. Thus, in locat ion !( 801 and ~
802 is the machine code equivalent ofjt745, and in location
t!803 andt(804 is the machine code equivalent of.tC 750.
The following coding will produce a correct Indirect
Address reference to DATA as the OP 2 of an instruction •
.--...... ..
l~
-
._ ..
OPERArlD
INC
F !ELD B
+
26 - 28 30
* 22
~ :r().~
2
FIELD C + INC
32
36 - 38 ciO
.J_
•
.
,
_.! ..__
l~
____ . __.'_ .
I
When decimal or Row/Column Indirect Addressing is used, Field 8
must specify the MSL of the location of the 4 character secondary
•
address. aAa Fidel Q M.... 8!!88if) .. 1:0 lel uP LI:c 1 d:a:
Example 1:
r-----"'.~.-------
F'ELD B
26
Example
~
-------"""1
FIELD C + INC
Iup~er
aaauss
Same as above
3(, - - ; 0
__________________________
R25/C25, B1
~i)J~~Mff~I=m~::~~~t:~ +1eS"82~;
81
=
801
o
8~
LID
:
(-
3.5
SUMMARY OF FIELD A, FIELD B, AND FIELD C SPECIFICATIONS
3.5.1
FIELD A
Field A of the source language instruction may specify:
1.
2.
3.
4.
5.
6.
7.
3.5.2
LSL address of OP 1
MSL address of OP 1
Decimal digits
Octal digits
Test bit conditions
Destination address of JUMP TEST Operation
Two machine language characters
FIELD B
Field B of the source language instruction may specify:
1.
2.
3.
4.
5.
6.
7.
3.5.3
MSL address of OP 2
MSL address of OP 1
Set condition bits
Decimal digits
Octal digits
Destination address of JUMP Operations
Two·machine language characters
FIELD C
Field C of the source language instruction may specify:
1~
LSL address of OP 2
2. Two machine language characters
NOTE:
Those specifications not previously explained will be
covered in the Section with the instructions that
require or allow the specification.
til
3.6
STAND~D
SYSTEM LABELS
,
In addition to the programmer assigned symbolic Labels previously
discussed, the UNIVAC 1005 Assembly System provides 15 Standard
Labels for predesignated areas of main store.
J
These Standard
Labels are not counted in with the number of Labels assigned by
the programmer.
The purpose of the Standard Labels is to provide
uniformity of assignment of these predesignated areas, and reduce
i
t
the processing time of the Assembler program for handling
'"
~..~f\
(
~
~
repetitive references to these areas.
\~\
The Standard Label8{\and predes ignated areas are:
(JfsNDIRD LABEL
@
~
FREDES IGNATED /REA
DEC I MAL ADm ESS
so Column Read Input
'ROW/COLUMN ADmESS
1 -
1t SO
R1/C1-R3/C1S, 81
2nd Half of 160 Col. Read
Code Image
)(,S1 -
)::(160
R3/C19-R6/C5, 81
$lic
160 Colum.") Read Code Image
l:(
1 -
l1. 160
R1/C1-R6/C5, 81
$PR
132 Column Print Storage
It 161 -
$P1
SO Column PUNCH Storage
lt 293 -
.Jt 372
R10/C14-R12/C31, 81
$P1
SO Column Read/Punch Read
Storage
)t
293 -
)( 372
R10/C14-R12/C31, 81
$P2
SO Column Read/Punch Punch
Storage
11: 373 - t(452
$PC
160 Column Code Image
Punch Storage
t!293 -
l!452
R10/C14-R15/C1S, 81
$Z1
160 Column Read/Punch
Code Image Read Storage
}:(293 -
):(452
R10/C14-R15/C1S, 81
$Z2
160 Column Read/Punch Code
Image Punch Storage
Jt 453 -
l( 612
R15/C19-R20/C23, 81
$i1
~2
~
tf
292
0
V
R6/C6-R10/C13, 81
R13/C1-R15/C1S, 81
0
'1z,
-.--.~----------.-----------
STANDARD LABEL
PREDESIGNATED AREA
DECIMAL ADffiESS
ROW/COLUMN ADffiESS
$BM
First Location beyond Input
Output Storage
1( 613
R20/C24, B1
$IR
Instruction Register
None
R32/C1-R32/C7, B1
$Cc
Instruction Control Counter
None
R32/C8-R32/C9, B1
$XR
Register X
None
R32/C1-R 32/C31 , B2
$TR
.1/",
'Hw
') Translation Table
I , . ) : t 1859 - t(1922
R29/C30-R31/C31, B2
.'~
c v< \'\Vt4,!\~,,<,c 4 ~ (I'l.)t\ ~r l( 3781 - l(3844 or R29/C30-R 31 /C31, B4
'--"'---
~ ,~::;. ,~l. ~
'.\
\ cthe Assembler processing associated with Standard Labels is the
\
same as for the Labels assigned by the programmer.
That is, the use
of a Standard Label as an address specification within a line of
coding will cause the Assembler program to substitute the MSL
of the area ident ified by the Standard Label.
The LsL address is
also specified and substituted in the same manner as for programmer's
Labels.
The Standard Label $TR refers to the,required
locatio~
for
translation tables when the hardware translate option of the
UNIVAC 1005 is part of the object system.
c
UNIVAC 1005 ASSEMBLY SYSTEM INSTRUCTIONS
4.0
This section of the manual covers the instruction repertoire
of the UNIVAC 1005 as programmed through the language of the
UNIVAC 1005 Assembly Systems and the declarative instructions which
direct the processing of the Assembler program.
4.1
LEGEND
The following abbreviations are used in the description of the
UNIVAC 1005 Assembly~ S~!.tLw.
1L = Operand 1, LSL
1M = Operand 1, MSL
2L = Operand 2, LSL
2M = Operand 2, MSL
K = any alphanumeric character
o = any numeric character
CC = characters whose bit positions represent Condition Indicators
NI = the next sequential instruction
() = contents of the area specified within the parenthesis
~
= transfer to
i5 = a blank column, (space code), used to establish
positional notation
IA = Indirect Addressing
NOTE:
4.2
For a description of Operand 1, Operand 2, and the
UNIVAC 1005 machine language instructions, see
Section 1.2.
LENGTH OF OPERANDS
The length of the Operand(s) In a UNIVAC 1005 instruction is
normally defined by the addresses of Operand 2.
An instruction
is normally terminated when the last location (LSL if descending mode,
MSL if ascending
mOde~~a~
of locations in OP 1 must
been handled.
~ ~
This means that the number
same as the number of locations
In OP 2.
If the lengths of the Operands (as defined by the programmer) to be
o
processed In an instruction are not the same, special programming
involving the use of Register X is required.
The "Transfer to
rX" (TX) command allows the programmer to specify OP1, MSL and
OP 1, LSL, thus defining the length of OP 1.
(See Section
for complete description of TX.)
The destination (OP 2) of the
TX command is rX (31 positions).
The TX instruction performs an
Ascending Transfer of OP 1 torX, beginning at the LSL of each.
When the OP 1, MSL (as specified in the instruction) has been
transferred to rX, access of OP 1 is terminated.
The TX instruction
continues, transferring space codes into the excess positions of
rX until the MSL of rX has been filled.
This signals the end of
the instruction.
Aft.er transferring the smaller of the two Operands to. rX, the
program:ner then uses the appropriate location in rX as the OP 1
address of the instruction which does the required processing.
This insures the use of space codes in the locations which are
added to make the length of OP 1 equal the length of OP 2.
This
condition is particularly important for the Arithmetic, the Compare,
and the Transfer instructions.
Following is an example of the incorrect use of unequal length
Operands and the erroneous result produced, as well as an example
of the use of the TX command to produce correct results.
OP 1
Given :.
c
[
i!
i!
6T Ii?x! ill y I y1
X
X
~7-0-=1...J...~-L7-='O":"'3+--~'-"';'~-L..-~7~O:-:-8+---=7-1O~
Locations It 703 - 'l:( 708
conta i n the OP 1 da ta
(6 locations).
r-'-
OP 2
--------/,~--------~
~
-I -.
Locat ions t(' 801 - j( 808 is to
2 (8 Locat ions)
1-+---~.-'~--L.-~--4-_+-~I-j.... be the OP
801
Example 1:
808
If an Ascending Transfer of OP 1 to OP 2 is executed,
the results in the OP 2 locations would be
Iz I
801
I
l
XI X
I
XI
xl
xl
XI
808
since the length of OP 2 (8 Locations) determines the
length of the Operand 1.
Example 2:
If a Descending Transfer of OP 1 to OP 2
results in the OP 2 locations would be
~X
801
I
X
IX IX I X I y
IS
executed, the
Iy I
808
since the length of OP 2 (8 Locations) determines the
length of Operand 1.
In Examples 1 and 2, extraneous locations (the l's and V's) which
are not part of OP 1 would be transferred.
If an Arithmetic
instruction was executed using the same operands, the locations containing the Zls would become part of the OP 1 and would be combined
with the values in ):(801 and l:t802, producing an erroneous result.
Using the same conditions glven for the preceding examples, the
following example methods can be used to produce correct results.
Exam?le 3:
Instruct ion 1. Transfer OP 1 to rX us i ng the TX
command. The TX command provides for specification of
OP 1, MSL and LSL.
OP 1
1703
X I X I xCi X I X I xl
708
R32 , B 1
I 111 le 2:
Given:
The same area with the Label CAT from Example 1.
Also, a 6 location area with the Label DOG has
been allocated to R1/C1 through R1/C6 of Bank 2
( t( 962 through rt967).
Problem:
LABEL
I
.-
OPERATION
OPERAND 1
OPERAI JD 2
IA FiELD A + 'NC 111 F'ELD B + INC
FIELD
C 1- INC
,-,
- ,". ')(\ -Y- ;Z2
10 'I- '2
2(, -- 2-- W
' -31 - 3- .-: CJ
16
5 G
1
Transfer Ascending the (CAT) to DOG
.
(
TA, .
tIC~~
I..
I
---'L
~,O.~
I
1
I
I
--L-.l
FIELD A; OP 1, LSL:
The Label CAT with a plus sign (+) prefix specifies
the LSL of the area assigned to CAT.
FIELD B; OP 2, MSL:
The Label DOG specifies the MSL of the area assigned
to DOG.
FIELD C; OP 2, LSL:
Blank addressing will cause the Assembler program
to use the LSL address of the area specified by the
Label in Field B. The programmer can also use
DOG +5, or +DOG in Field ~ and produce the same
result •
NOTE:
Row/Colu~n
or Decimal Addressing can not be
used for any of the addresses, since the
actual locations of the data are not known by
the programmer.
Example 3:
Given:
A 7 position location with the Label XT 1 is the last
instruction of a subroutine.
Problem:
LABEL
Transfer Ascending the previous 7 character
instruction to the exit line XT 1 of the subroutine.
OPERATION
OPERAND 1
OPERM ID ?
INC 111 FIELD B + INC
FIELD A +
FIELD C
- 10 * '2
16
2C * 22
26 -- '2: 3U
32
3C
IA
5 6
1
I
I
TA,
,
•
FIELD A; OP 1, LSL:
I'.
. -Ii
1
n~_~
_____
1-
I~~C
- 8~
J
$-1 instructs the Assembler program to use the
current value of the ILC minus one as the address
of OP 1, LSL of this instruction. The current
value of the ILC is the MSL of this instruction.
The MSL of this instruction minus one is the LSL of
the previous instruction.
iO
I
FIELD B; OP 2, MSL:
The label XT 1 specifies the MSL of the locations
assigned to that instruction by the Assembler
program.
FIELD C; OP 1, LSL:
Blank addressing will cause the Assembler program
to use the LSL of the locations assigned to the
instruction stored at XT 1.
c
4.3.3
TRANSFER CLEftR
MNEiVlON IC:
LABEL
TC
IOPERATION
~
5 G
1
I
MODE:
.. 1.
FUNCTION:
10
T--,-C.
.
'I<
ASCENDING
OPERAND
FIELD A
12
LENGTH:
7
1
IA:
OPFRAr lD
+ ! NC III F 'ELD B + I ~JC
" -- 2- .Y'c;
16 - . - 2C -;\:. 2~~
':0
ilL
.'
1
I~~
I
I
YES
/
FIELD C
32
l~h
1"
I
Transfer ascending beginning from OP 1 - LSL specified by
Field A; to OP 2 - lSL specified by Field C, until OP 2 MSL specified by Field B has been filled.
locations to space
",odes
durio~
Clear the OP 1
the process.
This instruction performs exactly the same as a TA (Transfer Ascending)
instruction.
The only difference is that as the characters are
accessed from t.he OP 1 locations, they are not returned to the OP 1
locations.
The effect of this instruction
le~~es
the OP 1 characters
cleared to space codes.
The rules for coding a TC instruction are the same as the rules for
coding the TA instruction (See Section 4.3.2.)
INC
;0
3C - 13:
I
4.3.4
,"
C
TRANSFER ONLY NUMERIC BITS
MNEMON IC:
LABEL
•
MODE:
OPERATION
:)
1
TN
.
FUNCTION:
'0
6
TN
~
,
OPERAND 1
FIELD A + ...INC
* 12
- Ir;
I"
-
7
LENGTH:
ASCENDING
~
1.l
IA:
......
'
I~
OP1="RMIIJ
I Nr
F'EL[' 8 +
.. 2··
2()'
;X' "* 2~
I
YES
~IM.
..
.~ r ~
,~
I
I
')
FI::LD
32
J..Ll I
C
y
...-
INC
J ..
;0
I
.J
Transfer ascending beginning from the OP 1 - LSL specified
by Field A; to OP 2 - LSL specified by Field C, until OP 2 MSL specified by Field B has been filled.
Delete the X
and Y bit-positions of the data delivered to OP 2.
This instruction performs exactly like the TA (Transfer Ascending)
instruction.
The only difference is that before the characters are
stored in the OP 2 locations, the zone bits (X and Y bit-positions) are
stripped off (set to binary zero).
The contents of OP 1 remain unchanged.
The rules for coding a TN instruction are the same as the rules for
coding the TA instruction (See Section 4.3.2.)
{b
c
I
4.3.5
TRANSFER CONSTANT
MNEMONIC:
TK
MODE:
ASCENDING
LENGTH:
7.
IA:
YES
OPFRArm ?
OPERAND 1
I
III FIELD B + INC
NC
'
FIELD
C
INC
...
JfI FIELD A +
10 * '2
3(; - 13: ;0
16 - . - a: * 22
26 -- 2- 30
32
LABEL PPERATION
1
5 6
•
.
""
FUNCTION:
.
\~~
-
I
~L.
--.~
..
~:M
.
I
Transfer ascending beginning from location 3 of the
Instruction Register (IR); to OP 2 - LSL specified by
Field C, until OP 2 - MSL specified by Field B has been
filled.
I.R.
Transfer a maximum of 2 locations (KK) from the
If OP 2 is more than two locat ions In length, space-
fill the unentered high-order locations of OP 2.
When a TK instruction is brought to the IR for execution, the two
alphanumeric characters KK will occupy locations 2 and 3 of the IR.
These two locations are used similar to an OP 1 in an Ascending
Transfer.
However, the Operation code (TK) will cause the transfer
from OP 1 to cease after the second transfer.
The execution of the
instruction wjll continue until OP 2, MSL has been filled.
If there
are more than two locations in OP 2, the excess high-order locations
of OP 2 will be filled with space codes.
If there are exactly two
locations In OP 2, the instruction will transfer locations 2 and 3
of the IR (the constant KK).
If there is only one location in OP 2,
only position 3 of the IR will be transferred.
NOTE:
The character)( (lozenge) may not be used as the
first character of a constant in Field A of this
instruction. Code in its bit configuration. (See
Section 4.3.5.3)
•
.r,
Example 1:
,~/
Store the letters OR in the last (low-order)
two locations of Print Storage.
Problem:
LABEL PPERATION
1
10
5 6
ttK
•
FIELD A; KK:
OPERAND 1
~ FIELD A + INC
* 12
-
16
1c.1t
nPFRArm
~~
2C
* 22
FIELD C
26 - 2: 30
+~S.P.R I- i
. I
?
F TLD B + INC
32
I
36
I
...-
I
INC
G::
flO
I
••
The leHers CR.
FIELD B; OP 2, MSL:- $ffi is the Standard Label for the Print Storage
area. The plus sign instructs the Assembler
program to use the LSL of Print Storage, and
the minus one causes the address of Print position
131 to become the MSL of this instruction.
FIELD C; OP 2, LSL:
Blank addressing will cause the Assembler program
to use the LSL address of the area specified by
the Label in Field B. The use of the plus sign and
the increment in Field B have no effect on this
Assembler program procedure.
Example 2:
Problem:
Store a minus sign (-) in the LSL of the 10
character area assigned to FOX. Clear the highorder 9 locations of FOX to spaces.
- LABEL OPERATION
nPFRArm ?
OPERAND ~
I
If! FIELD A + INC I~ FIELD B + INC
...
FIELD
C
INC
- -- 2C * 22
10 * 12
1
16
5 6
26 - 2: 30
32
36 - 3:: 40
f'-~
\
~
"'--""
...
~
..
n<
FIELD A; KK:
Ji.-. ..
..
. 0..,I
f;()~
. I
-
"
_.1 00 I
. I
The M(space code) becomes location 2, and the minus sign
(-) becomes location 3 of the IR. After they are transferred, the remainder of FOX is space filled.
FIELD B; OP 2, MSL:
The MSL of the area assigned to FOX becomes the
MSL of this instruction.
FIELD C; OP 2, LSL:
Blank addressing causeS the Assembler program to use
the LSL of the area assigned to the Label in Field
B (FOX) as the LSL of this instruction.
NOTE:
See Example 5 for a description of negative
constants.
c)
Example 3:
Given:
Several fields of the print line are to have a
printed sign of plus (+) or minus (-) based on a
condition developed by the program.
Problem:
LABEL
PPERATION
II!
1
5 6
10
S,I.CZ.1f. If.\<.
, T.\(. .
I
.,
Solution:
T,\<. ,
'*
Store the proper sign indication in each of the
fields using the TK instruction with Indirect
Addressing.
OPERAND 1
FIELD A + INC
OPERAI JD 2
F'ElD B + INC
FIELD C + INC
16 - ':'; 3J * 22
26 -- 2- 30
32
36 - 8:: dO
12
ll'~l.~~
l.w l.l.'!Iit.~
I~
-It1.
I
t·fJt1
J.I
I
.... F.})~,
• I
11.
I
1+.~~.3
I
-I: -
\.J I.L~~C
I7'\;
I~
l-
-~
.,
I
• I
I
••
I
The location immediately preceding the instruction labelled
SIGN has been established as the secondary address location
for the Indirect Addressing to be performed in the
instruction SIGN.
The processing in the program will previously determine the
sign requirements of the printed fields. This same portion of
the program will then transfer the appropriate character to
location SIGN - 1, and execute a Jump instruction which
transfers control to SIGN.
The instruction in SIGN is then brought to the Instruction
ReRister. Before it is executed the instruction is examined
by-the hardware to see if it calls for Indirect Addressing.
In this case,· it does.
The hardware then automatically uses the address in the A
pod ion of the IR as the MSL of a two location transfer from
memory to the A portion of the IR. The hardware then examines
the Operation code and performs the TK instruction using the
"new" conten-ts of the A portion of the IR as the two
character constant KK.
Field B specifies that the LSL of FD 1 is to be used as the
MSL of the instruction. Blank addressing in Field C will
cause the same address to be the LSL of the instruction thus
creating a one character OP 2. Each of the instructions will
then transfer the appropriate sign indication to the LSL of
each of the print fields.
~
Example 4:
Problem:
~PERATION
LABEL
-
OPERAND
~ FIELD A
10 * 12
16
':) 6
1
Clear Bank 2 to space codes.
TI\~""'" •.
•
FIELD A; KK:
U.
:
[JPFRA
iUI FIELD B + INC
+
- , INC
-
21' )(- 22
I~q,b~
. ..
, J
-
26 .. 2- JO
I
io?
-
.. -.-..
FIELD C
3(.
32
It.1. ct~~
0"
I
...
INC
-0 .. 'iel
.
.
-
I
,
The blank columns In the Field A will cause KK to become
space codes.
FIELDB; OP 2, MSL:
t1 962 is the decimal address for the first
location in BaQk 2, which becomes the MSL of OP 2.
FIELD C; OP 2, LSL:
tt 1922 is the decimal address of the last location
in Bank 2, which becomes the LSL of OP 2.
Solution:
I,
This instruction will first transfer the two space codes, and
then space-fill the remainder of OP 2---the rest of Bank 2.
If the KK portion of a TK instruction is to contain a negative constant,
the minus sign (-) is used as a prefix to the two decimal digit constant.
The Assembler program will place an X-bit over both of the numerals
in KK.
If the negative constant is to be a value from -1 through -9,
a zero must be coded between the minus sign and the decimal numeral.
If the KK portion of a TK instruction IS to contain a positive constant,
no SIgn indication is required.
Example 5:
--......
LABEL
Problem:
Store a -1 In the 2 location area
as~igned
to COUNT.
~~~~~~~-....,.------::::~~-~.- ~
~PERAT
ION
~
':) 6
--1-.'
FIELD A; KK:
10
*
OPERAND:
FIELD A +
12
16 -
INC
.~.
2C
,~
*
OPERAI m ?
FIELD B ... INC
FIELD C
22
26 .. 2:: 30
32
36
J
. _.• L
The minus sign causes the Assembler program to place a
binary 1 in the X bit position of both the 0 and the 1 In
the object language instruction. (See Section 4.4)
(Po
c
FIELD B;
OP 2, MSL:
FIELD C; .OP 2, LSL:
The address of the MSL of the area assigned to
COUNT is used as the MSL of this instruction.
Blank addressing causes the Assembler program to
use the address of the LSL of the area assigned to
COUNT as the LSL of this instruction.
NOTE:
The minus sign C-) symbol can not be used as
the first character of a constant in the TK
instruction. Code in its bit configuration:
(See 4.5.3.)
4.3.5.1 SYMBOLIC ADDRESS SUBSTITUTION
The TK instruction can also be used to change the A, B, or C address
of an instruction.
The UNIVAC 1005 Assembly System provides for source
language coding of Labels in the Field A protion of a TK instruction.
These Labels are converted to the two character machine language address
assigned by the Assembler program and stored as KK in the A portion of
(-
the object language TK instruction.
The symbol colon C:) is used In coll{mn 1.2 as a prefix to the Label
whose assigned address is to become KK.
Example
lac
Problem:
Change the A address portion of a TA instruction
stored in DOG to refer to CAT.
FIELD A; KK:
The symbol colon (:) informs the Assembler program that a
Label appears in Field A of this TK instruction. The
plus sign (+) prefix instructs the Assembler to use
the LSL address of the area assigned to CAT as KK in this
instruction. (The LSL is required due to the ascending
mode of the TA instruction.)
()
~
FIELD B; OP 2, MSL:
The MSL of the TA instruction stored at DOG contains
the Operation code. Therefore, the MSL of the A
portion of that instruction is stored at DOG +1,
which becomes the MSL of the TK instruction.
FIELD C; OP 2, LSL:
DOG +2 is the address of the LSL of the A portion of
. the TA instruction stored at DOG. This address IS
used as the LSL of OP 2 of the TK instruction.
NOTE:
If the symbol colon (:) is to be used as the
constant K, it must be coded in its bit
configuration. (See Section 4.3.5.3 below.)
4.3.5.2 ROW/COLUMN· and DECIMAL ADDRESSING
Row/Column and Decimal Addressing can also be used to cause a machine
,
language address to be placed in the A portion of the TK instruction.
Example if:
Problem:
Store the machine language of decimal location
~1~OOO as the LSL of a 7 character instruction
stored in FOX.
--"1
OPERAND 1
OPERA~1D
2
INC
FIELD
A
FIELD
B
INC
~A
+
FIELD
C
~
+
+ INC
10 * 12
16
:: 3J * 22
36 - I3s 40
26 - 2~ 30 32
LABEL PPERATION
I
i
I
1
_I
-
5 6
. . In<.
FIELD A; KK:
•
1t.1JJ.~rJ
-t",
I
'F·oX
1+ b
l
..
I
.
-
I
I
- --
'--
I
>
The Assembler program will use the two character code for
address It 1~OOO as KK in this instruction.
FIELD B; OP 2, MSL:
FOX is the MSL address of the 7 character instruction.
The LSL address portion (the C portion) of FOX is
therefore FOX +6, which will be used is the OP 2
MSL of this instruction.
FIELD C; OP 2, LSL:
Blank addressing will cause the Assembler program
to use the LSL of the area assigned to FOX as the
OP 2, LSL of this instruction. This is the LSL of
the C portion of FOX.
o
,
Example $':
1000 is the decimal address of R2/C8, B~nk 2. The
coding for Example 7 could have read as follows, and
produce the same result.
, LABEL PPERATION
I
-
OPERAND 1
OPERA
~ FIELD A + INC IA F 'ELI' B + INC
- .--
~,_~JI~I _lh.lf,~, g ~~
1
10
5 6
4.3.5.3 BINARY CODED
*
16
'2
;1'
* 22
")
c:-
26
3U
~.X~~ I+~,
I
~--
JD
I
')
F! ELD C + INC
3( - lL ,0
32
--
•
CONSTA~TS
The basic level of machine code is a series of binary bits.
In the
UNIVAC 1005, 6 binary digits (bits) are stored in each memory location.
The UNIVAC 1005 Assembly System allows the programmer to use binary
indications, if necessary, to code his program.
In order to reduce the number of source language columns required
(/
for bin~ry indication, the UNIVAC 1005 Assembly System provide~ fo~
octal coding.
digits.
An octal code is made up of three adjacent binary
Thus two octal digits can be used to express the contents of
one UNIVAC 1005 location.
To determine the octal equivalent of the
6-bit binary code, the following is suggested.
ttl)
UNIVAC 1005 bit position
X
(~
Y
<.0
<,lJ.)
8
4
Odal Digit #1
c..~)
<.1>
2
1
Odal Digit #2
,,/U(.~
Add the binary ~ of the bits in the 4, 2, and i-bit positions
(maximum sum
:=
7) to create Odal Digit #2.
Using the same values
(4, 2, 1) add the'sum of the X, Y, and 8-bit positions (maximum 7)
to create Octal Digit #1.
C·
/
Write as a two place number.
1
For example:
x
Y
1
a
Position 1
o
the bit configuration of the letter A equals
8
4
a
2
a
1
1
J
=a
2=0
4 = 1sum 4 equals Octal Digit·2
Position 8
=a
Y= 2
X=
sum
a
2 equals
Octal Digit~1
Thus the octal form of the leHer A is 24.
In the same manner, any
SIX bit configuration can be shown by uSing the two digit octal form.
The symbol for number (#) IS used as a prefix to indicate the Assembler
program that octal coding has been used, followed by four octal digits.
Example
~
q\
Problem:
I
LABEL
11
10
5 6
I
-•
PPERATION
~
T\(
I __
FIELD A; KK:
L~
•
.
Store two lozenge symbols (li U) in the least
significant locations of the area assigned to
RAT. (Reminder, the lozenge symbol cannot
be used for KK in the TK instruction.)
= 111 101
OPERAND "1
FIELD A +
-
* 12
16
f.7.s'.7.'
INC
~
..
a;
.
I
,~
FIEL.D B +
* 22
OPERAllD
INC
26 -- 2:: 30
~~.Ar._
- 1.
I
~--
?
FIELDS
3(,
32
I
1-
•
The number symbol (#) indicates to the Assembler program
that what follows is octal coding. The Assembler program
then forms the two characters KK.
FIELD 8; OP 2, MSL:
+ RAT -1 is the second least significat location
of RAT.
INC
110
- lk
. I
FIELD C; OP 2, LSL:
Blank add~essing causes the Assembler program to
use the LSL of the area assigned to RAT as the
LSL of this instruction.
NOTE:
c
c
Octal coding can also be used as a method
for addressing in the UNIVAC 1005 Assembly
System. See Appendix ___ for a complete
description.
4.3.6
TRANSFER TO REGISTER X
MNEMON IC:
...
LABEL
i
MODE:
ASCENDING
LENGTH:
- -5
IA: NO
PPERATI'O~N'~ ~OPERAND 1
. OPERA ID 2
FIELD C .-+ INC
~ FIELD A + ...INC .~ FIELD B + INC
10 * 12
32
36 3: 40
26 - 2~ 30
16 - -.. 20 * 22
5 6
11
J
TX
-
-._ ;.~_tr..L.
FUNCTION:
1.l.
...
I-
"---
..
I
......
..
~.~._.,
I
• I
I
(OP 2 in the TX command is rX.)
Transfer ascending
beg i nn i ng from OP 1 - LSLi 1= Da: I
c:.;
OP 1 - MSL has been transferred.
I
cont i nu i ng unt i 1
Space fill any un-
entered high order positions of rX.
length is 31 locations.
..
Maxim~m
OP 1 operand
(See Section 4.2 for further
information.)
This instruction has an implied OP 2 ofrX, which is indicated by the
Operation code.
The purpose of this instruction is to provide for
the handling of unequal length operands.
Complete specification of the
length of OP 1 is made in Field A and Field B (two addresses), and rX
is OP 2.
The TX instruction is a 5 character instruction.
Example 1:
Problem:
........ .
LABEL PPERATION
1
5 6
•
•
10
. ,oX .
• • • T.A.
~
Transfer the 5 characters from card columns 1
thru 5 to the 8 character field assigned to CAT.
NOTE: This requires two instructions •
OPERAND 1
FIELD A + INC
* 12
16 - .:; 20
~({i..
1- III:
1
,.~~ ~.1. ~ ~I
,~
OPERAIID 2
FIELD B + INC
FIELD C +
* 22
1Rt.
~.~:T
26 -
2~
30
• I
J
32
•
36
I
I~C
- [3['::
40
••
I
.
I
o
(
Instruct ion 1
TX
FIELD A.; OP 1, LSL:
The Standard Label $R1 + 4 specifies that the address
of the fifth position of Re~d Input storage is
to be the LSL of this instructio~.
FIELD B; OP 1, MSL:
The Standard Label $R1 specifies that the address
of the first position is to be the MSL of this
instruction.
FIELD C; Ignored
Instruction 1 transfers locations 1 through 5 of Read Input
storage to the low order 5 locations of rX (R32/C27, Bank 2
through R32/C31, Bank 2). The remainder of rX (R32/C1, Bank
2 through R32/C26, Bank 2) is filled with space codes.
Instruct ion 2
(
TA
FIELD A; OP 1, LSL:
$3231B2 specifies that the LSL of rX is to be used
as the OP 1, LSL of this instruction.
FIELD B; OP 2, MSL:
The MSL address of the area assigned to CAT is to
be used as the OP 2, MSL of this instruction.
F!ELD C; OP 2, LSL:
Blank addressing specifies that the LSL address of
the area assigned to CAT is to be used as the OP 2,
LSL address of this instruction.
•
The ascending transfer in Instruction 2 calls for an 8 location transfer
(the length of OP 2, CAT).
Th~
low order 5 locations of CAT will
contain the 5 characters from the card which were transferred to the low
order positions of rX by Instruction 1.
The 3 high order
positio~s
CAT will contain space codes from the un-entered portion of rX.
of
4.3.7
TRANSLATE
(OPT IaNAL)
NOTE:
MNEMONIC:
'LASE L--..,
TR
The Translate instruction can only be used if the
UNIVAC 1005 system f.gr, which the program is being
assembled has the hardware translate option.
MODE:
WE RATTON
10
5 6
1
-FUNCTION:
iT.R
.
.
DESCENDING
LENGTH:
7
IA:
YES
, . - _ . _ •. -t.
--*
OPERAND 1
FIELD A +
16 12
I
•
If-Tf
FIELD C
'+ INC
36 - t~ : /;0
32
I~\.,
- --
..
I
This instruction performs exactly the same as ADD
MAGNITUDE (Section 4.4.3).
NOTE:
OP 1 is subtracted from OP -2 and the result IS
delivered to OP 2.
Although the signs are ignored for the processing if a negative result
is produced, it will be stored In true (not
For example:
~g~l~~~)
form in OP 2.
OP 1 = 7, OP 2 = 3, 3-7=4 which is the result stored In
OP 2. The X bit of the original OP 2, LSL remains
unchanged.
(
77
4.4.5
ADD CONSTANT
MNEMONIC:
AK
MODE:
LENGTH:
ASCENDING
.
~
CF~J-,';i
L ~.8EL
j
I (jl~
OPEP,AND
If:4
1
10
5 6
*
. IAl<
FUNCTION:
F I" .
,~L",
.2
r\
'.
__ .
IA:
7
~P£B.Al1fr
1
+
"6 -
I
-
tl.:h. . •
rJC l~ r' EL
;:t Ie 22
[,
YES,
--.-------
.......
+--
B
c.~'- ~.
2
36
32
~,L.
- ..--
I
-
•... - ... -
FIELD C ,-+
INC
2- .30
)..,~
I
-
-
.-
INC
tr·
,'10
I
.--
,
Add algebraic ascending beginning with location 3 of the
Instruction Register; to the OP 2-LSL specified by Field C,
until OP2-MSL specified by Field B has received a sum
digit. Add a maximum of 2 locations (DD) from the IR. If
OP 2 is more than two locations in length, spaces are
considered as a prefix to DD. Set the Sign Comparator Set
the Overflow indicator if necessary.
DD mus,t always appear as a two digit constant.
less than ten, place a0 in column 12.
If the value of DD
15
The maximum value of DD.is 99.
Negative constants are specified by placing a minus sign (-) in cqlumn
12 followed by a two digit DD.
The Assembler program will use this
indication to place a binary 1 in the X bit position of both digits.
The X bit over the right hand digit becomes the sign of the constant
DD.
The X bit over the left hand digit is ignored in the
A~
instruction.
Example 1
Problem:
--
LABEL PPERATION
1
,
,.
5 6
I
---
~K
,.
10
Add 1 to the value of a 4 location area assigned to
COUNT
. ..
..... ...
-- -"'-_.- --,'PEf-{NJD 2
OPERAND 1
FIELD A + ...INC IR F'ELDR + INC
FIELD I".. , ... INC
.12
2aJ * 22
16
')c
30
26
32
- 40
'*"
~.
~~-
~
~.-
-.-~--.--.-
.
..
I.J
J_
~
~1.
I
-
'--
Ito
.\1."'.'
--,
---
-~'"
• I
' --.~
-.
I
,-
.
-- -..
.1
.
--
7& C
(-
FIELD A; DD:
0 1 becomes the two characters in locations 2 and 3 of the
IR when this instruction is executed.
FIELD B; OP 2, MSL:
The address of the MSL of the area assigned to
COUNT is used as the OP 2, MSL of this instruction.
FIELD C; OP 2, LSL:
Blank addressing causes the Assembler program to
use the address of the LSL of COUNT as the OP 2,
LSL of this instruction.
When the addition IS performed, it operates the same as the Add Algebraic
(AD) instruction, except that if the OP 2 is more than two locations in
length (as In Example 1), space codes are added to the excess locations.
The carry, if any, also is added in the excess locations.
The AK
instruction terminates when a sum digit has been delivered to the
MSL of OP 2.
Example 2
(-
Problem:
Subtract 1 from the value of a 4 location area
assigned to COUNT.
NOTE:
LABEL
1
-
bPERATION
OPERAND 1
OPERAriD 2
FIELD C 1- INC
~ FIELD A + INC 111 FIELD B + INC
10 * 12
16
26 - 2: 30
32
36 - 3: ·w
--- 3J * 22
5 6
L..-c-+-'-_ A,~
FIELD A; DD:
•
-.e.1.
• I
tlJ
U 1'Il:'r
---
I
I
I
I
---
---
The minus sign (-) prefix to the constant 8 1 (DD) causeS
the Assembler program to place a binary 1 in the X bit
positions of locations 2 and 3 of this instruction. The
X bit of position 3 is the sign of the constant DD. The
X bit of position 2 is ignored in the AK instruction.
FIELD B; OP 2, MSL:
C
Subtraction is performed by adding a negative
constant.
The address of the MSL of the area assigned to
COUNT is used as the OP 2, MSL of this instruction.
11
FIELD C; OP 2, LSL:
Blank addressing causes the Assembler program
to use the address of the LSL of COUNT as the OP 2,
LSL of this instruction.
Space codes will be subtracted from the two high order locations of
COUNr, and borrows will occur, if any.
~o
0
4.5
COMPARE INSTRUCTIONS
Comparison in the UNIVAC 1005 may be considered to consist of two
phases--performing the comparison, and testing the result of that
comparison.
The first phase--performing the comparison is accomplished
through use of one of the Compare instructions.
The purpose of a
Compare instruction is to establish (set) a condition in the
Comparator based on the relationship of the Operands which are compared.
The condition of the Comparator is then tested by means of a Jump
Test instruction.
The Comparator which is set and tested by the Compare
and Jump Test instructions should not be confused with the Sign
Comparator which is set and tested by the Arithmetic and Jump
Condition instructions.
(
The condition of the Comparator is set as a result (the only result)
of the execution of a Compare instruction.
The contents of OP 1
and OP 2 remain unchanged by a Compare instruction.
The condition of
the Comparator will not change until another Compare instruction IS
executed.
The Comparator may be tested as often as required.
The Compare instructions operate in ascending mode.
In the event of a
signed comparison, this enables the circuitry to first examine the sIgn
bits, which are
located in the LSL of the Operands.
Except for
sign considerations, the result condition of the Comparator is based
on the last difference, if any, encountered during the comparison.
The Operands in a Compare instruction must be of equal length.
c
For
signed comparison of unequal length Operands, the shorter of the two
should be transferred to rX using the TX instruction (Section 4.3.6).
In
0
signed Compare instructions, space codes are considered equal to zeroes.
Mge
The maximum Operand length In a Compare instruction is 961 locations.
I,,!,
4.5.1
COMPARE NUMER IC
MNEMONIC:
.
CN
SIGNED COMPARISON
MODE:
LABEL PPERATION
1
5 6
; _1-, :_...! .2.:....
FUNCTION:
10
ASCENDING
OPERAND 1
II FIELD A + INC
* 12
16 -
7
I A:
-~~
FIELD B
.".- a; * 22
26
..
ItL
~,N
-
LENGTH:
I
~tIt
YES
OPERAriD 2
FIELD C + INC
INC
+
-- 2
~
-
30
32
I
I.)..L.
.."
~.
36
--
-.
- 8:
•
'>
OP 2;
When a signed comparison
OP 1
IS
< OP 2:
OP 1 = OP 2.
performed, the relationship of OP 1 and OP 2
can be established if the signs (X bit position of LSL) are not alike.
If the signs are alike, the
~alues
of OP 1 and OP 2 are then
automatically compared to determine the result.
If the signs are alike and both plus, the Operand with the larger
absolute value is the greater.
If the signs are alike and both minus,
the Operand with the larger absolute va.1ue is the least.
If the signs
are not alike, the Operand with the plus sign is the greater.
Only
if the signs are alike and the absolute values are the same is the
result
. I
Compare ascending the OP 1-LSL (including sign) specified
by Field A, to the OP 2-LSL (including sign) specified by
Field C. Continue until the OP 2-LSL specified by Field B
has been compared. Ignore the X and Y bit positions of
OP 1 and OP 2 (except sign). Set the Comparator to one of
three conditions:
OP 1
f
1\0
~.
In Compare Numeric (CN), the zone bits
eX
and Y positions) of OP 1
and OP 2 are ignored (except for the consideration of the sign bits).
Space codes are compared as equal to zeroes.
III Q8"'~8:1 e ~11N"'el Ie (Q~J), tile zelle bib!'
88~e8 8:1
e
ee"'~al e~
8e
0< &lId 'I
ep
pUSliOiiS) uP
1 aild
Le zeldes.
e~~al
The result of a CN instruction is set in the Comparator, and must be
tested by a JT instruct ion (Sect ion _ _ _ _ ) before the execut ion of
any subsequent Compare instruction.
Example 1
Compare Total Deductions from card columns 5 through
10 to the Gross Pay in a 6 character area assigned
to GRPAY.
Problem:
LABEL PPERATION
IfII
1
10
5 6
l
CN
--
OPERAND 1
INC
FIELD A +
-
* 12
u 1ft.
1
------
l
~
..
l
I
t;:~ ~ _~~
I
l
I
..- 8:
•
INC
40
--.
I
FIELD A; OP 1, LSL:
~ 10 is the decimal address of the LSL of Total
Deductions (column 10 of Read Input Storage).
FIELD B; op 2, MSL:
The Label GRPAY specifies the MSL address of the area
assigned to GRPAY.
FIELD C; op 2, LSL:
Blank addressing causes the Assembler program to use
the LSL of the area assigned to GRPAY as the LSL
of this instruction.
1)
If Total Deductions (OP 1) is more than Gross Pay
(oP 2), the Comparator is set to Greater Than.
op 1 7 op 2.
2)
If Total Deductions (OP 1)
Pay (OP 2), the Comparator
op 1 = OP 2.
3)
----
16
OPERAND 2
FIELD B + INC
FIELD C
a; * 22
3(,
32
26 - 2: 30
~
- --------------
---
-------
If Total Deductions (OP 1)
Pay (oP 2), the Comparator
op 1 (op 2.
1S
1S
1S
1S
the same as Gross
set to Equal.
smaller than Gross
set to Less Than.
4.5.2
COMPARE ABSOLUTE (MAGNITUDE) UNSIGNED COMPARISON
MNEMON IC:
lABEL
CM
MODE:
ASCENDING
LENGTH:
7
I A:
YES
OPERATION
OPERAND "1
OPERArID 2
FIELD A + INC ,~ FiELD B + INC
FIELD C
10 * 12
- 2J * 22
30
32
36
16
26 -IfII
1
2~
5 6
•
~
t.N\
~
FUNCTION:
1.1~
I
I
- _.tL
.1
~~
~LI
_..J_
I
I
...-
INC
l3:.: 40
I
J
Compare ascending the OP 1-LSL (excluding sign) specified by
Field A, to the OP 2-LSL specified by Field C. Continue
until the OP 2-MSL specified by Field B has been compared.
Ignore the X and Y bit positions of OP 1 and OP 2 including
the sign bits. Set the Comparator to one of three conditions:
OP 1
>
OP 2;
OP 1
<
OP 2;
OP 1
= OP
2.
The comparison is made on the absolute magnitude of the numeric (8, 4, 2, 1)
values OP 1 and OP 2.
(
The X bit positions of OP 1, LSL and OP 2, LSL
(sign bits) are also excluded from consideration.
Thus a plus 3 would
..
compare equal to a minus 3.
Space codes are compared as equal to zeroes.
The result of a CM instruction is set in the Comparator, and must be
tested by a JT Instruct ion (Sect ion _ _ _ _ ) before the execut ion of
any subsequent Compare instruction.
Example 1
Problem:
Compare Actual Tolerance from the area assigned to
ACTOL (5 locations) to the Allowed Tolerance in the
area assigned to ALTOL (5 locations) •.
...--_
...
.... ..." . ..• --,_.
OPERAND 1
OPERAI'D 2
INC ~~ FiELD B + INC
FIELD A +
FIELD C ... INC
12
16
26 - 2: 30
32
36 - 3:': 40
-. 2J * 22
..
'
lABEL
OPERATION
IfII
1
I,
5 6
10
eM.
FIELD A; OP 1, LSL:
(
-,/
*
__
,-......
-.~
-
~-.
+'~~:r.o
I
1\:\..1' O,L.
I
I
.' I
l- .•
I
• 1
The plus sign (+) prefix to the Label ACTO causes tffi
Assembler to use the address of the LSL of the area
assigned to ACTOL.
FIELD B; OP 2, MSL:
The address of the MSL of ALTOL
MSL of OP 2.
FIELD C; OP 2, LSL:
Blank addr;essing causes the Assembler program to use
the address of the LSL of ALTOL as LSL of OP 2.
FIELD
+
Tolerances are usually - n.
1S
used as the
If ALTOL contains n, the Actual Tolerance
(ACTOL) could have been calculated to a plus or minus value.
The CM
instruction will ignore the signs, and compare to determine if the
absolute value of the Actual Tolerance is greater than the Allowed
Tolerance.
1)
If the Actual Tolerance (OP 1) is more than the Allowed
Tolerance (OP 2), the Comparator is set to Greater Than.
OP 1
OP 2.
>
2)
If the Actual Tolerance (OP 1) is the same. as the Allowed
Tolerance (OP 2), the Comparator is set to Equal.
OP 1 = OP 2.
3)
If the Actual Tolerance (OP 1) is smaller than the
Allowed Tolerance (OP 2), the Comparator is set to Less
Than. OP 1
OP 2.
<
+
If the Allowed Tolerance
would compare Less Than.
1S
5, an Actual Tolerance of - 4
4.5.3
COMPARE ALPHANUMERIC
UNSIGNED COMPARISON
MNEMONIC:
ASCENDING
LABEL
CA
~PERATION
10
5 6
1
•
MODE:
...
FUNCTION:
CI~
•
LENGTH:
OPERAND 1
~ FIELD A + INC
* 12
16
-
LL.
7
IA:
YES
OPERAI"ID 2
FIELD B + INC
FIELD C
INC
3J * 22
32
36 - tk 40
26 - 2~ 30
I
...
.~
)..,~
I
I~l..
I
I
I
I
-
Compare ascending the bit pattern of OP 1-LSL specified by
Field A, to the bit pattern of OP 2-LSL specified by Field C.
Continue until the bit pattern of OP 2-MSL specified by Field
B has been compared. Exclude sign considerations, but include
sign bit positions. Set the Comparator to one of ~ conditions.
OP 1~OP 2; OP 1 1 (unequal to) OP 2.
The purpose of the CA instruction is to determine if all bits in OP 1 are
exactly the same as all bits in OP 2.
There are only two results:
all
the bits of OP 1 are exactly the same (equal condition), or they are not
the same (unequal condition).
Spaces do not equal zeroes.
the comparison is performed on an ascending basis USIng the X Y 8 4 2 1
bits of each corresponding location of OP 1 and OP 2 beginning with the
LSL.
The determination of the condition which exists between the two
Operands is made as soon as any difference is detected between characters
In corresponding locations.
If all locations have been compared and
no difference IS detected, an equal condition exists.
Example 1
Given:
Employee Number (5 locations) and Employee Name, last
name first (24 locat ions) from a Payroll Master Card
have been stored in two adjacent areas assigned to
MNUM and MNAME.
IM~U:~--l
""NAMe.
---
------l
Detail cards containing the Employee Number in columns
1 t~rough 5 and the first four letters of the last name
of the employee are in columns 6 through 9.
(f~'
Problem:
Compare Employee Number and Name from the detail
card to MNUM and the first four locations of MNAME.
..
LABEL PPERATION
1
5 6
..
OPERAND 1
OPFRA ID ?
INC ~. FiELD B + INC
FIELD C
INC
~ FIELD A +
- ,,-'-.. ::D
10 * 12
16
.36 - 13: LlO
26 - 2: 30
32
* 22
C~
~.q
.
I
1M.t-l.\)..M
• I
IM,N,A-.~. t 1~~3.
.
-.I
-.
FIELD A; OP 1, LSL:
119 is the decimal address of the Read Input
Storage location which contains the information
from card column 9.
FIELD B; OP 2, MSL:
The Label MNUM causes the address of the MSL of the
area assigned to MNUM to be used as the MSL of
this instruction.
FIELD C; OP 2, LSL:
MNAME + 3 is the address of the location of MNAME
that contains the fourth letter of last name stored
from the master card. This address becomes the
LSL of the CA instruction.
Solution:
~
.
The 5 locations of MNUM and the first 4 (high order) locations
of MNAME become a 9 location OP 2, and are compared to the
information from card columns 1 through 9 in Read Input
Storage. The assignment of the two Labelled Storage areas
(MNUM and MNAME) to adjacent memory locations is accomplished
by proper use of Declarative instructions.
The result of the CA instruction is set in the Comparator and
can be tested in the next or .some subsequent i nstr uct ion
(provided no intervening Compare instruction is executed).
(7 .)
)J
I'
!
4.5.4
COMPARE CONSTANT
MNEMON I C:
LABEL
1
CK
MODE:
ASCENDING
..*
OPERAND 1
FIELD A + INC
OPERATION
10
5 6
•
UNSIGNED COMPARISON
"
\(\(
C.l<'
FUNCTION:
16
12
-'-
-
.
LENGTH:
-'I"
20
• I
1
IA:
YES
OPFRAIID
~
F!ELD B + INC
* 22
26 - 2:: 30
~
• I
?
FIELD C + INC
32
36
i\.L.
•
-
3E: 40
I
Compare alphanumeric ascending the bit pattern of KK specified
in Field A; beginning with the bit pattern stored in the
location 2L specified by Field C; continuing until the bit
pattern stored in the location 2M has been compared. Compare
all bits. If 2M and 2L specify the same address; a one
character comparison is made. If 2M and 2L specify more than
a 2 location OP 2, space codes (binary zeroes) are compared
to.the excess positions of OP 2. Set the Comparator to one
of two conditions: KK = OP 2; KK ~ OP 2.
When a CK instruction is brought to the IR for execution, the two
alphanumeric characters (KK) will occupy locations 2 and 3 of the IR.
These two locations are used similar to an OP 1 in a Compare Alphanumeric
instruction (Section 4.5.3).· However, the Operation code CK will cause
the comparison to
been made.
con~inue a~er
the second character comparison has
Space codes are compared to any additional locations of OP 2.
The CK instruction IS an unsigned bit-for-bit compare instruction.
Spaces do 'not equal zeroes, and sign considerations are ignored.
OP 2
will usually be a one or a two character operand.
The instruction is to be used to test for the presence of whole characters
in storage location.
(The Jump Compare (JK) instruction (Section
can be used to test for the presence of specific bits in a storage
location.)
Binary coding (Section 4.3.5.3) may be used, but should
not be necessary, since this is a character comparIson.
)
Example 1
Problem:
LABEL
1
PPERATION
OPERAND 1
OPERA ID 2
INC
~ FIELD B + INC
FIELD A +
FIELD C + INC
- .... 2{) * 22
10 * 12
16
26 - 2:: 30
32
36 - 13;; 40
~
5 6
.-
Test the information in card column SO for a 3.
~
_..• -. C~.
FIELD A; KK:
•
~13
I
~gJJ,
• I
IliS JIJ.•
I
The ~ 3 in the KK positions of Field A will be in locations
2 and 3 of the IR when this instruction is executed.
FIELD B; OP 2, MSL:
~ SO is the decimal address of the location in
Read Input Storage which contains the information
from card column SO.
FIELD C; OP 2, LSL:
11 SO is the decimal address of the location in
Read Input Storage which contains the information
from card column SO.
Solution:
Since the OP 2-MSL and OP 2-LSL specify the same location,
a one character comparison is made, using the 3 from location
3 of the IR (the right-hand K). The space code (~) is
required to position the 3 so that it is in the right-hand
K position (column 13 of the form). If card column SO
contained only a 3 punch, the Comparator is set to equal. If
card column SO contained any other punches (or none at all),
the Comparator is set to unequal. The Comparator is tested
by use of the Jump Test (JT) instruction.
Example 2
Given:
A two location counter is being arithmetically
reduced by 1. The counter is stored in the two
locations assigned to COUNT.
Problem:
LABEL OPERATION
5 6
1
•
Ic.\{
10
.
Test the value of COUNT to see if it is equal to
zero.
.
OPERAND 1
FIELD A +
- -.INC lA FIELD B
* 12
?~fi1
16
...
d)
. I
* 22
J)EffiAj
+ INC
26 - 2-':' 30
I"O.u,1'4 :T
I
III 2
FIELD C + INO
32
36
- I3s
40
I-. -
-- i - --. .
40
o
(~
FIELD A; KK:
The characters ?0 in the KK positions of Field A become
locations 2 and 3 of the IR when this instruction is
executed.
FIELD B; OP 2, MSL:
The address of the MSL of the area assigned to
COUNT is used as the OP 2, MSL of this instruction.
FIELD C; OP 2, LSL:
Blank addressing causes the Assembler program to
use the address of the LSL of the area assigned to
COUNT as the OP 2, LSL of this instruction.
Solution:
The contents of COUNT are being arithmetically reduced by
1. When the value qf COUNT is reduced to zero, the operation
of the Arithmetic un~ of the UNIVAC 1005 will cause a Y bit
to be placed over the MSL of the result. The internal code
for the question mark (?) is the same as an XS-3 zero with
a Y bit. The CK instruction performs a bit-for-bit
comparison. When COUNT is reduced to zero, this CK
instruction will set the 6ompari~ to equal.
NOTE:
(
c
Addresses can also be specified in the KK portion of a
CK instruction by using the same notation described in
Sections 4.3.5.1; 4.3.5.2; and 4.3.5.3.
4.6
CONDITION INDICATICRS
The UNIVAC 1005 provides for two program controlled sensing switches,
Sense #1 and Sense #2.
By using the Set Condition (SC) instruction,
the programmer can turn these switches ON (Set to 1) or OFF (reset to
0) during the execution of a program. The condition of the Sense
switches can be used to control the sequence of the execution of
instructions during the program through us.e of the Jump Cond i tion (JC)
instruction.
The Jump Condition instruction is used to test for the ON
condition of the switches.
If the Sense switch be)ng tested is ON.(Set),
the transfer of control will occur.
If the Sense switch being tested
is OFF (reset), the program proceeds with the next sequential instruction
(N I).
There are other uses for the Set Condtion and Jump Condition instruction.
A complete description of both instructions is given below.
c
4.6.1
SET CONDITION
MNEMONIC:
SC
TYPE:
LABEL Pf'ERATION
1
.
FUNCTION:
~L.
-
.-.
LENGTH:
OPERAND 1
5
fA:
Ii FIELD A + INC ~ F'ELD B +
10 *12
5 6
I
SPECIAL
16
-
.II~'
'""'
. c.c., . .
3)
* 22
I
.
NO
OPERAIID
INC
26 - 2-':: 30
• I
?
FIELD C + INC
32
•
36
I
-
~~
.
. I
Set or reset the £onditions or Controls which correspond to
each bit position of CC which contains a binary 1 as specified
in Field A.
Each of the bit postiions of CC correspond to a Condition Indicator or
a Control setting.
The presence of a binary 1 in a bit position of CC
will cause the Condition or Control to be set or reset by the SC
instruction.
The presence of a binary zero In a bit position will not
change the status of a Condition or Control.
Although coded in Field A (to assist the key punching operati~n), the
bit patterns of CC occupy locations 4 and 5 (the B portion) of the
instruction.
Locations
should be blank.
a and '3
are ignored by the UNIVAC 1005, and
Locations 4 and 5 constitute bit positions 19 through
24 and 25 through 30 of the instruction.
The Conditions and Controls which
are as follows:
corres~ond
to the bit position of CC
40
BIT POS TION
.
¥
,
19
\. 20
21
22
23
24
(X)
(y)
(8)
CONDITION/CONTROL
~-;~
~
(4)- J\ i.l
(2)
... ~
(1)
,
~
\1-
25 (X)
(Reserved)
(Reserved)
SET SERVO 2
SET SERVO 1
SET CONSOLE
SET CONSOLE
~ 26 (y)
~
... (0 27
~
-
SET ODD PPR ITY (See Section __ )
SET EVEN PNi ITY
SET SENSE 2 (ON)
SET SENSE 1 (ON)
RESET SENSE 2 (OFF)
RESET SENSE 1 (OFF)
(8)
28 (4)
29 (2)
30 (1)
(See Sect ion ___ )
(See Section
)
INDICATOR 2 (ON) and HALT
INDICATOR 1 (ON) and HALT
. The Condition Indicators and Controls can be set (or reset) individually
or in multiples as the programmer requires.
-
NOTE:
Caution should be used when coding multiple bits in C~ in
order to prevent illogical bit pattersn which require the
UNIVAC 1005 to establish opposing conditions. The results
of such a conflict are unpredictable.
Binary coding is normally used to specify a multiple bit pattern for C C ' - /
(See Section 4.3.5.3).
Field A must always contain a number sign (#) in
column 12 followed by four octal digits for binary coding.
The UNIVAC 1005 Assembly System provides the following mnemonic
Switch Names if only a sinele Condition or control is to be set (or reset)
by the SC instruction.
A number sign (#) must appear in column 12
followed by the two-place mnemonic Switch Name in columns 13 and 14.
SWITCH NAME
. BIT POS IT ION
#SO (alpha)
#SE
#+2
#+-1
#-2
#-1
19
20
21
22
23
24
QDD PIR ITY
SET EVEN PNi lTV
SET SENSE .2 (ON)
SET SENSE 1 (ON)
RESET SENSE 2 (OFF)
RESET SENSE I (OFF)
#S2
#S1
#rl2
27
28
29
30
SET ~ERVO .2
SET ~ERVO 1
CONSOLE INDICATOR .2 and HALT
CONSOLE INDICATOR 1 and HALT
#H1
CONDITION/CONTROL
~ET
ql/-
C
It should be noted that the Switch Names for the Sense switches have
~
a plus sign (+) for~(ON) and a minus sign (-) for reset (OFF); the
Controls for magnetic tape operations have a prefix of the letter S;
and the Halt and Console Indicators have a prefix of the letter H.
Example 1
Problem:
Set Sense 1 (ON)
LABEL PPERATION
10
56
1
•
. -.
OPERAND 1
OPFRArJD?
FIELD A + INC ~ F!ElD B + INC
FIELD C + INC
'*" 12
-
•.+.1. .
S.c...
FIELD A; CC:
16
-'I"
~
aJ
* 22
26 - 22 30
. I
• I
32
•
36
I
•
- BE:
40
I
•
The Switch Name ~1 causes the Assembler program to create
a binary 1 in bit position 22, and binary zeroes in all
other bit positions of CC.
NOTE:
FIELD Band C
The octal coded constant
same CC.
#04~~
would produce the
Blanks
Example 2
Problem:
LABEL PPERATION
1
5 6
•
Sc
10
•
Reset Sense 2 (OFF) and Halt the UNIVAC 1005 with
Conso 1e Ind ica tor #1 ON.
OPERAND 1
FIELD A + INC
'*" 12
16
tll.;A. rJ.t
-
" ..
.~
aJ
I
OPFRAIJD?
~
FiELD B + INC
* 22
26 - 22 30
. I
FIELD C + INC
32
36
I
•
- BE:
40
. I
FIELD A; CC:
The bit pattern of the octal constant #0201 will cause a
binary 1 in bit positions 23 and 30, and binary zeroes In
all other bit positions of CC.
NOTE:
Switch Names cannot be used since multiple bits are
required.
(
4.6.2
STOP (HALT)
Mt£MON IC:
LABEL
STOP
PPERATION
5 6
1
•
MODE:
10
. . is:T.iP.
FUNCTION:
S~C
I AL
LENGTH:
5
OPERAND 1
FIELD A +
iNC ~ FiELD B
*12
16 - .....': 2) * 22
26
'"
.
(s..u..~ V~ ~ •
I~
IA:
NO
OPERArID 2
FIELD C
+ INC
- 2~ 30
32
36
.1
I
•
•
...- INC
BE: 40
. I
The STOP command is a variation of the SC instruction
(Section 4.6.1) provided in the UNIVAC 1005 Assembly System~
enable the programmer to easily specify and rapidly recognize
those instructions which STOP (HALT) the operation of the
UNIVAC 1005 during the execution of the object program.
Permissable specifications in Field A are Switch Names #H1 or
1M2.
4.7
SEQUENCE CONTROL
Instructions in the UNIVAC 1005 are stored accessed, and executed in
serial sequence.
This sequential operation is used as long as the
program does not require branching.
The accessing of instructions is under the control of the Instruction
Control
Column.
Counters~
There are two counters; one for Row, and one for
The Column Counter is automatically incremented by five or
seven as each instruction is transferred to the Instruction Register.
The increment is determined by instruction type.
The Row Counter is
advanced by one each time the Column Counter advances beyond thirty-one
and returns to one.
Counter passes 31.
Bank specification is also modified when the Row
The Instruction Control Counters provide the Control
Unit with the address of the next instruction (NI).
JUMP instructions are used in the UNIVAC 1005 to vary the normal
instruction sequence.
The JUMP instructions change the contents of
the Instruction Control Counters only if conditions specified by the
JUMP instruction are present.
If not, the contents of the Instruction
Control Counters remain unchanged, and the normal execution sequence
(NI) is followed.
The UNIVAC 1005 instruction repertoiere contains seven Jump instructions
for sequence variation.
4.7.1
JUMP CONDITION
MNEMONIC:
LABEL
1
JC
MODE:
OPERATION
. - ~.c.
FUNCTION:
-
5
IA:
NO
.iI~'
C~~ ••
•
"
LENGTH:
OPERAND 1
ili'EBA11D ?
+ INC ~ F!ELD B + INC
FIELD C + INC
.- 3) * 22
26 - 2::: 30
32
'36 - 3S 40
WI FIELD A
16
10 * 12
5 6
•
SPECIAL
.1
,
"
~~
i1
il
.
If any of the conditions are met which correspond to
binary 1 bits of CC specified by Field A; transfer
control (JUMP) to the Jump Address (JA) specified by
Field B. ,Otherwise, execute the next s~quential
instruction (NI).
NOTE:
In some cases, the in,dicators
specified by 1 bits in CC are
reset by this instruction.
The JA specified by Field B must be the address of the MSL
or the in'strudion to which control is to be transferred if the
(~-
Jump occurs.
Since instruction addresses are assigned by the
Assembler program, Field B will normally contain a programmer's
Label.
The
curre~t
value of the ILC maintained by the Assembler
program during assembly processing can also be used by specifying
I
the dollar sign symbol ($) with Increment.
The JA occupies loca-
tions 4 and 5 of the instruction.
The bit patterns of CC occupy locations 2 and 3 of the JC
instruction.
12
Locations 2 and 3 constitute bit positions 7 through
and 13 through 18 of the.instruction.
in any of
t~e
If a binary 1 bit appears
~c-lSf~A;~
bit positions of CC and theAcondition (indicator)
is set (ON), the Jump will occur.
If multiple 1 bits are present
J""
in CC and any one of th~M:~~1nt~~~ (ind'icators) is set (ON), the
Jump will occur.
executed.
Otherwise, ,the next sequential instruction is
I
The conditions and indicators which correspond to the bit
positions of CC are as follows:
BIT POSI TION
CONDITION/INDICATOR
7(X)
Form Overflow. Form Overflow is ~
when the Form Overflow position of
the Forms Control Tape is sensed by
the carriage.
Form Overflow i§ reset when tested.
8(Y)
Arith~etic Overflow.
Arithmetic
Overflow is ~ when the result of
an Ar i thmet i c ADD or SUBTRACT i nstruction exceeds the capacity of
OP2.
Arithmetic Overflow i§ DQi reset when
tested.
NOTE:
7 and 8(X,Y)
Form Overflow and Ari~~ Overflow
cannot be tested in th~JG -instruction.
(See below)
End of Ta~e. End of Tape is ~
when that condition is detected by
a Uniservo. The presence of binary
1's in bits 7 and 8 of CC constitute
a specific test for End of Tape.
If both bits are present, Form Overflow and Arithmetic Overflow are
not tested or changed.
End of Tape __1___ reset when
tested.
9(8)
Sense 2. The Sense 2 Indicator
by the SC instruction.
IS
~
Sense 2
10 (4)
i§
n2i reset when tested.
Sense 1. The Sense 1 Indicator
by the SC instruction.
IS
~
Sense 1 i§ D2i reset when tested.
c
100
11 (2)
Alternate Hold 2. Alternate Hold 2
is set (ON) when the Alternate Hold
Switch #2 console light is turned ON
by depression of the switch.
Alternate Hold 2 i§ ll2i reset when
tested.
12 (1)
Alternate Hold 1. Alternate Hold 1
is set (ON) when the Alternate Hold
Switch #1 console light is turned ON
by depression of the switch.
Alternate Hold 1
tested.
13 (X)
i§
ll2i reset when
Interru~t.
Interrupt is ~ when the
UNIVAC 1005 receives an Interrupt.
Signal from a peripheral li~it~~,
Interrupt i§ ll2i reset when tested.
(
1"4 (y)
Unit Alert. Unit Alert is set when
a peripheral Unit is in an abnormal
condition.
Unit Alert
15 (8)
~
ll2i reset when tested.
Parity Error. Parity Error is set
when a parity error is detected.
Parity Error i§ reset when lested.
16 (4)
Sign Comparator Plus. The Sign
Comparator is ~ to Plus when the
result of an Arithmetic instruction
is positive, and not zero.
The Sign Comparator
tested.
~
ll2i reset when
/0/
17 (2)
Sign Comparator Zero. The Sign
Comparator is set to Zero when the
result of an Arithmetic instruction
is zero.
The Sign Comparator
tested.
~
DQi reset when
Sign Comparator Minus. The Sign
Comparator is set to Minus when the
result of an Arithmetic instruction
is negative.
18 (1)
The Sign Comparator
tested.
~
llQl reset when
The conditions may be tested individually or in multiples
(except Form Overflow and Arithmetic Overflow) as the programmer
requires.
Binary coding is normally used to specify a multiple
bit pattern for CC (See Section 4.3.5.3.).
Field A must always
contain a number sign (#) in column 12 followed by four octal
digits for binary coding.
The UNIVAC 1005 Assembly System provides the following
mnemonic Condition Names if only a single condition is to be
tested by the JC instruction.
A number sign (#) must appear In
column 12 followed by the two-place mnemonic Condition Name in
columns 13 and 14.
Jo~
o
CONDITION NAME
BIT POSITION
#fF
7
Form Overflow
#AF
8
Ar i thmet i c Over flow
#+-2
9
Sense 2
#+1
10
Sense 1
#-2
11
Alternate Hold 2 (ON)
#-1
12
Alternate Hold 1 (ON)
#IN
13
Interrupt
INA
14
Unit Alert
#PE
15
Parity Error
#AP
16
Sign Comparator Plus
#AZ
(-
CONDI TlON
Sign Comparator Zero
#AM
18
Sign Comparator Minus
#ET
1 and 8
End of Tape
When the JC command is executed by the UNIVAG lUU~ at Object
time, and the jump is to occur, locations 4 and 5 of the IR are
transferred to the I nstruction Control Counter.
Locations 4 and 5
of the IR conta i n the jump address speci fi ed in the JC command.
These two characters become the address used by the ICC to control
the access of the next instruction.
(
""--
._./
/V"3J
~\
i
:
~
Example 1
Problem:
Transfer control to the instruction labelled
FOF if Form Overflow has occurred.
LABEL PPERATION
OPFRA
OPERAND 1
FIELD A + INC ~~ FIELD B + INC
10 * 12
16 - ..,-'- d) * 22
26 - 2: ]0
In
~
1
5 6
~.ff
~t....
•
I
~
IF-of
I
• 1
?
FIELD C
32
36
.
...- 13::INC
40
• ,I'
•
•
FIELD A; CC:
#FF is the Condition Name for Form Overflow and causes
the Assembler program to place a binary 1 in position
~7, and binary zeroes in all other positions of CC.
'1r4,0P'¢1K would produce the same paHern for CC.
JA: The programmer's label FOF causes the Assembler
program to use the address of the MSL of that instruction as the JA of this instruction. If Form Overflow
has been sensed, the jump will occur.
FIELD B;
,/
Example 2
Problem:
.
LABEL PPERATION
10
5 6
1
•-
-
.
it .""
...
.
-
Do ll2i jump to the instruction labelled
ERROR if the last previously executed Arithmetic instruction produced a positive result
without Arithmetic Overflow.
'"
OPERAND 1
FIELD A +
- ..,-'INC
* 12
•• • ¥
16
~;).JI.PI.~
d)
. I
-
~~
'JPERl\~m
FIELD B + INC
* 22
26 - 2: ]0
I~ 'Q.. Q_Q.R
• 1
"
?
FIELD C
32
•
36
I
•
INC
- 13:: 40
. I
--
FIELD A; CC:
The octal coding will produce. binary 1~to test
Arithmetic Overflow, Sign Comparator Zero, and
Sign Comparator Minus.
FIELD B; JA:
The address of the MSL of the instruction labelled
ERROR will be used as the jump address in this
i nstr,uct ion.
Solution:
•
...
The jump will occur if ~ of the three conditions tested
does exist. The jump will llQi occur if ~ of the
three conditions tested exists.
o
(4.7.2
JUMP TEST
MNEMONIC:
-
-
LENGTH:
".
. . 1:r.1',
.-
FUNCTION:
(-
SPECIAL
OPERAND 1
INC
~ FIELD A +
- ....
10 * 12
16
.- 3)
5 6
I
MODE:
5
IA:
~PERATION
LABEL
1
JT
r.r.~.i..
-
--
NO
OPERArm
PII FIELD B + INC
* 22
I
26 -
__
tr.~.
2~
I
30
?
FIELD C
32
36
I
...
•
Test the condition established in the Comparator by
the last previously executed Compare instruction. If
equal, transfer control to instruction JA1 specified
by Field A. If less than (or unequal, for alphanumeric comparison), transfer control to instruction
JA2 specified by Field B. - If greater than, allow
control to pass to the next sequential instruction
(NI ).
The result of a Compare instruction is the setting of the
Comparator based on the relationship of OP1 to OP2.
If the
Compare was a numeric comparison, the Comparator is set to one
of three conditions:
equal, less than, or greater than.
If the
Compare was an alphanumeric comparison, the Comparator is set to
one of -two conditions:
equal,or unequal.
The Comparator remains
set until another Compare instruction is executed.
The purpose of the JT instruction is to test the seHing of
the Comparator, and transfer control to the addresses specified
in the JT instruction, based on the setting.
There are three
possible settings of the Comparator as a result of a numeric
comparison, and only two addresses in the JT instruction.
The
necessary "third" address is implied, and is the instruction which
C:
immediately follows the JT instruction.
INC
- 13:
If the previously executed
comparison was an alphanumeric comparison, only two settings are
/
)O~
tJO
I
o
possible.
Thus the JT instruction will always jump to one of the
two addresses specified in the instruction,
~~IA.~~ ~""~~ c.oWfll-ft~
Since the Assembler program assigns addresses to instructions,
the addresses specified in the JT instruction will usually be
programmer's labels.
The current value of the ILC maintained by
the Assembler program during Assembly processing can also be used,
by specifying the dollar sign symbol ($) with increment.
Example 1
Given:
A comparison has been made of the Quantity
Ordered (OP1) to the Quantity on Hand (OP2).
Problem:
lABEL PPERATION
1
5 6
•
3":\",
- -
.-
10
~
If the Quantity Ordered is equal to Quantity
on Hand, transfer control to the instruction
labelled SAME. If the Quantity Ordered is
less than the Quantity on Hand,transfer
control to the instruction labelled SHIP.
(If the Quantity Ordered is greater than the
Quantity on Hand, control will automatically
pass to the next instruction.)
OPERAND 1
WI FIELD A + INC
* 12
16
S~~~ E:-
FIELD A;
JA1 (equal):
FIELD B;
JA 2 (less than):
-
-'I~'
.
'::
20
. I
...*
OPFRMID
FiELD B
22
+ INC
26 - 25 30
!\~~:~~.
I
I
.~
FIELD C
32
36
...-
INC
35 40
.
.. I
If the Comparator is set to equal, the
address of the MSL of the instruct i on labelled
SAME, locations 2 and 3 of the JT instruction,
is transferred to the ICC.
If the Comparator is set to less than,
the address of the MSL of the instruction labelled SHIP, locations 4 and 5
of the JT instruction, is transferred
to the ICC.
o
Example 2
Given:
The Employee Name from a detai 1 card (Opn
has been compared to the Employee Name from
a Master Card.
Problem:
LABEL PPERATION
OPFRArlD ?
OPERAND 1
FIELD C
~ FIELD A + INC ~ FiELD B + INC
.:: aJ * 22
10 *12
16
36
26 - 25 30 32
5 6
1
•
If the Names are equal, transfer control
to the address which follows the LSL of
the JT instruction. If the names are
unequal, transfer control to the instruction labelled ERROR.
. :\.'T
,
FIELD A;
JA1 (equal):
FIELD B;
JA2 (unequal):
Solution:
-
.
'"
...-
JI"~
IS':
1
E.:i.R.o.~
. I
•
.
INC
Gt
:0
. I
The dollar sign symbol ($) causes the
Assembler program to use the current
value of the Instructio~ Location Counter
with an increment of 5 ~S the JA1 address
of the JT instruction.
The address of the MSL of the instruction
labelled ERROR is used as the JA2 address.
The source language instruction taken from
the card which immediately follows the JT
instruction during the Assembly processing,
will be assigned to the address which follows the LSL~of the JT instruction. During
the Assembly processing of the JT instruction, the ILC contains the address which is
assigned to the JT instruction MSL. The JT
instruction will occupy that location, and
4 more. Thus the ILC ($) plus an increment
of 5 will be the same address that will be
assigned to the instruction which is assembled after the JT.
J
07
1
O~
4.7.3
UNCONDITIONAL JUMp
MNEMONIC:
J
MODE:
LABEL PPERATION
III
1
•
FUNCTION:
~
l.ENGTH:
OPERAND 1
FIELD A + INC
-
10 *12
5 6
•
SPEC IAL
. trA
~~'
16
-
a:J
.~
5
FIELD B
* 22
. I
.
IA:
NO
OPERArill ?
FIELD C
+ INC
26 - 2-:; 30
32
I
36
.
••
..-
INC
32 40
1
I
I
Transfer control to instruction JA specified by
Field A.
When this instruction is executed, an unconditional transfer
is made of the JA to the ICC.
Thus the address specified In
Field A becomes the address of the next instruction to be executed.
In many cases, a J instruction will be the last instruction of
a sub-routine which has been entered through use of the JR
instruc-
o
tion.
The JA address occupies locations 4 and 5 in the instruction.
\ O~
-------------~-.~---.
---~-~
...
~---~~-
o
If
4.7.4
Jl.MP RETURN
~
MNEMONIC:
MODE:
SPEC IAL
LENGTH:
7
IA:
NO
LABEL PPERATION
OPERAND 1
OPERAIID 2
FIELD A + INC ~ F!ELD B + INC
FIELD C + INC
10 * 12
16 - .. -. d) * 22
36 - tr... 40
26 - 2~ 30
32
~
1
5 6
I
triA. . .
II
FUNCTION:
I
~L
• I
lRAI ..
I
Transfer ascending, locations 3 and 2 of the IR (RA)
specified by Field C; beginning with the address 2L specified
by Field B. Then transfer the JA specified by Field A to the
ICC.
The object language instruction produced from a source language JR
instruction has the format and will appear in the Instruction Register
as follows:
IR Locat ions
1
..R
(
23
BA
45
JA
67
2L
The two characters produced from the RA (Retrun Address) are stored In
locations 2 and 3.
The two characters produced from the JA are stored
in locations 4 and 5.
The two characters produced from 2L are stored
in locations 6 and 7.
These location numbers refer to the positions
of the object instruction as it is stored in memory, and to the positions
the instruction will occupy in the Instruction Register (IR) when the
instruction is executed.
When the instruction
IS
executed, the following operations are auto-
matically performed:
1.
Locations 2 and 3 of the IR are transferred (ascending)
beginning at the memory location whose address is in
positions 6 and 7 of the IR.
2.
Locations 4 and 5 of the IR are transferred to the
Instruction Control Counter (ICC) and are used to control
the access of the instruction to be executed next.
\O~
ol
The purpose of the JR instruction is to provide a simple method of
interrupting the sequential execution of instructions In order to
execute a special subroutine.
After the execution of the special
subroutine, control is to be returned to the instruction which
sequentially follows the JR instruction.
The special subroutine is called a closed subroutine.
This means that
the entrance (the first instruction executed) is closed as far as the
initiation of the subroutine by the sequential advance of the LCC.
It
also means that the exit (the last instruction executed) is closed to
prevent resumption of the program through the sequential advance of the ICC.
A closed subroutine normally has the following form:
1.
The first instruction to be executed (the entrance line)
has a label which is the name of the subroutine.
2.
The last instruction to be executed (the exit line) has
a label, and is usually an unconditional jump instruction
(Operation J).
3.
If there are multiple points within the subroutine from
which exit might occur, they must transfer control to
the exit line.
Using this form for closed subroutines, the JR instruction is then set
up as follows:
FIELD A; JA: contains the label of the entrance line of the subroutine.
L
FIELD B; 2L: contains the address of the L~ of the exit line of the
subroutine.
FIELD C; RA: contains the label of the address of the MSL of the
instruction to which control is to be transferred after
the subroutine_has been executed.
o
NOTE:
If the return address (RA) of the JR instruction is
to be the address of the instruction stored sequentially
following the JR instruction ($ + 7), Field C of the
JR instruction may be left blank. The Assembler program
will automatically insert the address equivalent
.
of $ + 7 in locations 2 and 3 of the object instruction.
If the return address (RA) of the JR instruction is
to be anything other than $ + 7, the required address
must be coded in Field C according to the rules for
Assembly System addressing.
Example 1
Given:
Problem:
Execute the subroutine, and return control to the
next sequential instruction.
~ERATION
LABEL
1
A subroutine has been established to calculate
square root. The entrance line is labelled SQRT.
The exit line is a J instruction labelled EXIT.
5 6.
•
l".R
OPFRAID ?
OPERAND 1
INC ~ FIELD B + INC
FIELD C
~ FIELD A +
10 *12
16 - ..... aJ * 22
32
36
26 - 2:= 30
+- INC
.
I
'
_.
IS~G.t.T
I
1+'E..~t=r
..
-
.1
•
•
t1S 40
FIELD A; JA:
The address of the MSL of SQRT is used in Locations 4 and
5 of the object instruction.
FIELD B; 2L:
The plus ,sign (+) prefix to the label EXIT causes the
address of the LSL of that instruction to be used as
the locations 6 and 7 of this instruction.
FIELD C; RA:
Blanks in Field C cause the Assembler program to use the
current value of the ILC (the address of the JR instruction)
plus 7 as the address RA in locations 2 and 3 of this
instruct ion.
Solution:
At the time the JR instruction is assembled, the ILC contains
the address assigned to the JR instruction. The implied
$ + 7 is the same as the value which will be in the ILC
when the Assembler program assigns an address to the next
instruction. At execution time, this two character address
of the next instruction is transferred automatically in
ascending mode, from locations 3 and 2 of the IR to the
LSL and LSL minus one of the instruction EXIT. These two
locations of the instruction EXIT constitute the JA of an
unconditional jump (J) instruction.
/11
o
After setting up the RA in the exit line, the two characters
from locations 4 and 5 of the JR instruction are automatically
transferred to the lec. This causes the instruction stored
at SQRT to become the next instruction executed.
After the execution of the instructions in the subroutine,
the instruction EXIT will be executed. The J instruction
stored at EXIT now contains a JA address set up by the JR
instruction. This JA address is the address of the instruction
stored sequentially following the JR instruction. Thus
control is returned to the main chain of the program.
When the square root subroutine IS reused at another point in the
program, the entry is also made by a similar JR instruction.
This JR
instruction will set up a new RA in the exit line (EXIT) which will
return control to the instruction which follows the new JR instruction.
The effect of the JR instruction can be produced by using a TK instruction
f 0 11 owed b)y a J'Ins t ruc t'Ion.
LABEL PPERATION
1
5 6
.
•
,
OPERAIID '2
OPERAND 1
pij F!ELD B + INC
INC
FIELD A +
FIELD C
- ',,": ~
10 * 12
16
26 - 25 30
32
36
* 22
•
I
I
T.~
•
..
1 . ..
~
....
,..~
..
I~ I~I
S.QctT. -
.I
~~,
IfErw..I:..'T -1.
.
.
I
.
INC
13s
"'.E.. ~.l:.'\
40
I
• t
I
I
The instruction which is to follow the execution of the square root
subroutine is the one which will be coded and assembled following the
J instruction.
The address which will be assigned to that instruction
is the value of the ILC at the time the TK is assigned, plus 7 for the
length of the TK instruction, plus 5 for the length of the J instruction--
$ + 12.
The use of the IR instruction thus saves the memory locations required
for the J instruction, the access time of the J instruction, and the
programmer time to calculate the return address.
,
(~
o
4.7.5
JUMP COMPARE
MNEMONIC:
LABEL
1
JK
OPERATION
5 6
--
~
.
MODE:
~
FUNCTION:
SPECIAL
LENGTH:
7
-IA:
NO
..
OPERAND 1
OPERAIID 2
INC ~ FIELD B + INC
FIELD A +
FIELD C
10 *12
16 - ..... 2D * 22
32
36
26 - 2~ 30
..
l~
...-
lA
INC
8s 40
I~l
I
t I
I
•
Using the bit positions of K, specified in Field A,.
which contain binary 1 bits; test the corresponding
bit positions of the memory location whose address is
specified by 2L in Field C. If the bit positions of
2L which correspond to binary 1 bit positions of K
gll contain binary 1 bits, transfer control to the JA address
specified in Field B. If ~ of the bit positions of 2L
which correspond to binary 1 bit positions of K do not contain a binary 1 bit, proceed with the next sequential Instruction (NI).
-
::r~
NOTE:
Bit positions of 2L which correspond
to binary zero positions of K are
ignored by the test and may-contain
binary zero or binary one.
The purpose of the JK instruction is to perform a test for
bitCs) present in the contents of a memory location.
If K contains
only a"single binary 1 in the X bit position, and the contents of
the memory location specified by Field C also contains a binary 1
in the X bi t posi t ion, the jump to JA wi 11 occur.
I f the memory
location specified by Field C does not contain a binary 1 in the X
bit position, the jump will not occur, and the program continues
with the next sequential instruction (NI).
The presence or absence
of binary 1 in the other bit positions of 2L are not involved in
the nperation, and have no effect on the result.
If K contains multiple binary 1 bits, then each corresponding
bit position of 2L must also contain a binary 1, or the jump will
not occur.
\ \~
Example 1
Problem:
Test the information stored from column 80
for the presence of a binary 1 in the X bit
posi t ion. If present, transfer control to
CRDT.
lABEL PPERATION
IA
1
5 6
.,
..
FI ELD A;
10
K:
* 12
.,
.
"S,\<.
OPERAND 1
OPERAIID 2
INC ~ F!ElD B + INC
FIELD A +
FIELD C
- ., ..
16
.
,-
20
I
i
* 22
26 - 2:: 30
eR ~'r
..
I
32
36
a'g,O.
I
T
INC
- BS
40
I
The apostrophe (I) is the UNIVAC 1005 character wnich
conta ins a b i nar y 1 in on 1y the X bit posi t ion.
FIELD B; JA:
The address of the MSL of the instruction labelled
CRDT is used as the JA of this instruction.
FIELD C; JA: 1180 is the decimal address of the location which
contains the information from card column 80 of Read
Input.
.
Solution:
If the information stored from card column 80 contains
a binary 1 in the X bit position, the jump to CRDT will
occur.
Example 2
Problem:
If card column 25 contains only the letter D,
transfer control to DED. If card column 25
contains anything other than the letter D,
transfer contr~l to NOTO.
D = 010 111
lABEL
PPERATION
OPERAND 1
OPERArID '2
FIELD A + INC IA F!ElD B + INC
FIELD C T INC
20 * 22
10 * 12
16
32
26 - 2:: 30
36 - BE: 40
~
1
5 6
I
I
•
..
!,~
I
I
l".K
'.
I
~,QTh
1';\(
•
-~:.;
f'
•
I
L
S;,
I
. '.
tD.
•
t
No~
•
• I
".0 :\Lb..
I
. I
I
I
I
~(
.L
1
~(.
• I
Ilt~(
I
~
1
1
l.~~...
,.
.I
•
•
.
• I
•
I
I
• I
c
Instruction 1:
If card column 25 contains a binary 1 in the X bit
position, it does ngi contain only the letter D,
and control is transferred to NaTO.
Instruction 2:
If card column 25 contains a binary 1 in the 8 bit
position (X53 code fo~ 5), it does not contain only
the letter D, and control is transferred to NOTD.
Instruction 3:
The previous two instructions have eliminated the
possibility of the presence of binary 1 in the X
bit and the 8 bit positions, If the remaining
positions all contain binary 1 bits, this instruction will transfer control to DED. If card column
25 did not contain a D, this instruction will n2i
jump, and control will sequential pass to the next
instruction--which is NaTO.
The character K will appear in location 2 of the object instruction.
Location 3 is not used.
the JA address.
(
Locations 6 and 7 will contain the address of the
location to be tested.
NOTE:
(--
Locations 4 and 5 will contain
Octal coding may be used in Field A to specify
K of the JK instruction. Column 12 must contain
a number sign e#), and columns 13 and 14 must
contain two octal digits whose bit pattern will
produce the required K•. Columns 15 ,and 16
must conta:i n 00.. L-ocat i on 3 of too JK
instruction is ignored.
.r
)(~
"1f
4.7.6
JUMP LOOP
MNEMONIC:
JL
MODE:
SPECIAL
LENGTH:
7
IA:
_,.r_
NO
lABEL PPERATION
OPERAND 1
OPERA! ID 2
FIELD C + INC
~ FIELD A + INC ~ FiELD B + INC
10 * 12
16 - "'-. ::D * 22
32
36 - BS 40
26 - 2~ 30
5 6
1
.
•
FUNCTION:
NOTE:
'
"Il.
.
~)
~
I
l"A
I
J
l~L
..
-
. I
"
Subtract 1 from locations 2 and 3 of the IR (which
will contain DD specified by Field A) leaving DD
unchanged in memory. Transfer ascending the result from
locations 2 and 3 of the IR to 2L specifi~d Q~ Field C.
I f the re'su It is pos it ,i v~ or .~er'?" tr'~~sfer
~fer
control to the JA soeclfledln ~leld~. It the result
is negative l proceed with the, next sequential instruct ion.
- -2L usually specifies $ + 2, the ad-dress of the l~ast
significant D. If Field C is blank, the address of $ + 2,
is placed in the object language instruction. Maximum DD
99.
=
The purpose of the JL instruction is to provide a means to
control the number of times a series of instructions are to be
repetitively executed.
The series of instructions is called a
loop.
A loop is established to perform a common operation on each of
a set of similar data, thus eliminating the need for a separate
series of instructi ons for each ef ike set of data.
A loop consists of four sections
1.
Intialization
2.
Processing
3.
Modification
4.
Control
If
The Intialization section prepares the loop to be used for the
first of the repetitive executions.
The Processing section consists
of the operations to be performed on the data.
The Modification
section changes the addresses in the Processing instructions to
refer to the next set of data.
The Control section determines when
the loop has been executed the required number of times.
The Control section of a loop in the UNIVAC 1005 will usually
consist
of.a single JL
instruction~
The DD portion of the JL
instruction must be set to a beginning condition in the Initialization
section, due to the fact that DD is changed during the execution
of the loop.
(-
be
the
~2
Assume a loop is to be executed three times.
in the JL instruction at load time.
Processin~
DD wi 11
After the execution of
and Modification sections, the JL instruction is
executed for the first time.
2L specifies the memory address of
..
DD.
DD is reduced by 1 in the fR and the result (f;J1) is stored at
2L, replacing the
~2.
The result is not negative, so
the jump occurs to JA)which usually specifies the first instruction
in the Processing
section~
After the execution of the Processing
and Modi fi,cat ion sect ions, theJL instruction is executed t.he second
time.
DD, which now is 01, is again reduced by one in the IR,
and the result
(~0)
is stored at 2L, replacing the
is not negative, so the jump occurs to JA.
~1.
The result
After the
execution of the Processing and Modification sections, the JL instruction is executed the third time.
(
DD, which now is
~1,
is again
cl
reduced by one in the IR, and the result (-~l) is stored at 2L,
replacing the ~0.
This time, the result is negative.
There-
fore the jump to JA does not occur, and the program continues
with the instruction (NI) which sequentially follows the JL instruction.
j
The "number of times" minus one is used as DD--two in
this example.
I
~
Howeve~, the value of DD in the stored JL instruc-
tion has been changed by the execution of the loop and now reads
-~ Before the loop is executed again, the value of DD must be
re-stored to the correct number of times the loo~ is to be executed.
This is usuallY'accomplished in the Intialization section
by using a TK instruction with KK equal to the initial value of DD.
The 2M and 2L of the TK instruction specifies the address of the DD
portion of the JL instruction.
A skeleton example of the coding for the previously described
loop is as follows:
LABEL PPERATION
1
10
5 6
-r,..:L:T'. IT.\<.
'
I
,-,
•
l~ lRaO.e.S
..*
,
i-'
~
I
I
I
I
.. - ,
-a
lM.olh.f,~ ..rI
I
•
•
~ t-
C-.tol\'.R.\.. IIL,
12
16
Qa
,
a
I
I
OPERAND 1
FIELD A + !NC
--
a
-
.
.
,~
3J
-,-
-
- lB
- -
,
~
-- -
":" "'1
, r
~
l-
"T
-~,
a
I
I
a
........
--- ,-f'"
-', ....-;-
FIELD C
25 30
--
;--r
,
26
32
i.N T.R\.. It 11.1
, I
•
F!ELD B + INC
-
* 22
I-
- - : - .....
.-
OPFRArID?
I~
~
.
I
.
~.R.OL&
j'.---
a
~
:-r
--.
"'i'-.
-
-: 1,
I
...-
INC
35 40
c..'~,\.\\.\. 1-+ I~ I
,
,-
36
-
,
-
r-r"" -, '":'-r'
I
I
,
I
"""'"r"". -: ,
.I
.
I
a
I
I
, I
1t.N.T.R..L
1+I;)..
-
I
G
--
-- ------------
-
~~~-
---
-------~--
--------
---------
The loop is entered by executing the instruction labelled
INIT.
This set DD equal to
CNTRL.
~
.
the JL instruction, labelled
There are usually other operations required in the Initiali-
zation section.
to
0:l in
The fact that DD is
~when
loaded, and is reset
for the first use of the loop should not be of concern.to the
programmer.
Notice that Field C specifies the address of DD in
memory.
The Modification section will usually ·involve the use of the
COUNT (CC) instruction, which is explained in Section 4.8.
Section 1.6 (page 12) on Indirect Addressing contains an example
of the use
~f
a loop.
In the example, Instruction 6 would be a JL
instruction with a DD of
~
the first instruction of the
and a JA of the address of Instruction 1,
Proces~ing
section. Instruction 5 would
be replaced by the instructions necessary to perform the Modification
section requirements.
Instruction 1 would be preceded by the Initial-,
ization section instructions including a TK instruction which sets
theDD of the JL instruction to 01.
('~ ..'
./
4.7.7
JUMP INDIRECT
MNEMONIC:
JI
MODE:
SPECIAL
CV
IA: YES
LABEL PPERATION
OPFRArlD 2
OPERAND 1
FIELD A + INC ~ F!ELD B + INC
FIELD C
INC
1
10 *12
5 6
16
:: 20 * 22
36 - BE 40
26 - 2~ 30 32
•
I
FUNCTION:
'"
In,-
I
-
LENGTH:
..
-'1~'
tt;-r.".
I
I
I
I
Transfer descending two locatjons beginning with the
IJA (Indirect Jump Address) specified in Field A to
the Instruction Control Counter (ICC).
NOTE:
If Indirect Addressing is specified
(asterisk in column 12) two levels of IJA
wi 11 occur.
Field A of a Jump instruction (J) specifies the address to
which control is to be transferred.
Field A of the Jump Indirect
instruction (JI) specifies the address of the address to which
control is to be transferred.
The JI instruction is a pseudo-operation In the UNIVAC 1005
Assembly System.
The JI instruction produces a TD command which
has an OP 1 of the IJA, and an OP2 of the ICC.
address of an instruction (2 characters).
OP1 contains the
When these two characters
are transferred to the ICC, they are used to control the access of
the next instruction.
Thus control is transferred, not to the IJA,
but to the address stored in the locations specified by the IJA.
Assume there are several points in a closed subroutine at
which the processing is concluded.
Each one of these points must
return control to the instruction which follows the JR instruction
used to enter the closed subroutine.
---------.--.----.-~~----.~
This can be accomplished by
I
--
tc
coding a Jump (J) instruction at each of the ending points in
the subroutine which transfers control to the exit instruction.
The
JA of the exit instruction was set up by the JR instruction to
transfer control to the instruction following the JR instruction.
However, by coding a Jump Indirect (JI) instruction at each of the
ending points with an IJA that refers to the JA portion of the exit
instruction, the execution of the second jump is eliminated.
Assume that EXIT is the label -of the exit instruction of a
closed subroutine.
Each of the ending pOInts would conclude with
the following instruction:
...... -
LABEL OPERATION
5 6
1
•
. l-Sl
.-- --.
- -
OPERArln?
OPERAND 1
FIELD C
!If' FIELD A + INC ItA F'ELD B + INC
10 * 12
16
32
26 - 2:: 30
36
- 2D * 22
--
. IE.'t.'l.,.
"-.
. r
~
-
3
I
. ,1- __ --1._ ......
I
.
When the JI instruction is executed, the two character address
stored in locations 4 and 5 of EXIT, by the JR instruction, are
transferred to the ICC.
This effectively transfers control to the
instruction following the JR instruction.
...-
INC
8::
40
I
-~
4.8
COUNT
MNEMON IC:
CC
MODE:
SPEC IAL
LENGTH:
--
LABtL PPERATION
~
Ii..f~C.....
•
-.
FUNCTION:
IA:
NO
OPERAND 1
OPERArlD 2
INC
FiELD
B
INC
FIELD C
~ FIELD A +
~
+
20 * 22
10 * 12
16
32
36
26 - 2~ 30
5 6
1
5
- ..
~~,
..
. ,-
•.
-
.~,
I
btM
I
I
--L
•
...-
INC
3E 40
I
I
f
Using address arithmetic, modify by DD~specified in Field
A; the two character Row, Column, and Bank address stored
beginning at 2M~specified by Field B.
/
The purpose of the CC instruction is to provide a means of address
modification according to the special logic of row, column, and bank
addressing employed in the UNIVAC 1005.
Addresses are specified by the
full 6 bit positions of two adjacent characters.
the UNIVAC 1005 operates on a 4 bit numeric basis.
The Arithmetic Unit bf
Thus the Add and
Subtract instruct ions cannot be used for addressl.ffiod i ficat iQn.-
.".~
(
\"t~/J
The CC instruction operates on the full 6 bits of the two character
address stored in the locations specified by 2M using the decimal
value of DD as the modifier.
If the address is to be decremented, a
mInus sign (-) is placed in column 12 of Field A, and DD is placed in
columns 13 and 14.
If the address IS to be incremented, DD is placed
in columns 12 and 13 and assumed to be plus.
digits
(00 through 99 maximum),
in column 12.
DD must always be two
If DD is less than ten, a
0 is placed
When DD is a decrement, the Assembler program places
an X bit over both .of the numeric digits in the object instruction.
2M usually specifies the addr.ess of the MSL of the A portion of another
instruction which is to be modified to reference a new set of data.
o
(
/
Section 2.6 (page 12) on Indirect Addressing contains an example of .
the use of a loop.
The Modification section of the loop would consist
of a single CC instruction that would replace Instruction 5.
The CC
instruction would modify the A portion of Instruction 1 by the number
of locations required for each entry in constant storage.
Since two
characters are required for MSL and two for the LSL of each of the
four fields' in a Transaction, the value of DD must be 16.
Assume that Entry 1 of the constant storage area was labelled ENT 1, and
the Secondary Address Table was labelled SECAT.
Instruction 1
would be:
LABEL
OPERAND
FIELD A + INC
16 - '2 3)
The first execution of this instruction will cause a descending transfer
beginning with the MSL of ENT 1 (Entry 1 of constant storage) to the
MSL of SECAT (the Secondary Address Table).
cant i nue unt i I the LSL of
filled.
The transfer will
~:r;:(b=);:-!::iil~ i a C)
19
has been
The remainder of the processing will then operate on
Transaction 1.
Before Instruction 1 is executed the second time, the two characters
in locations 2 and 3 of Instruction i must be modified to transfer
from Entry 2 of constant storage to the Secondary Address Table.
The
following CC instruction would be used to modify PROCS (Instruction 1,
locations 2 and 3).
LABEL
1
OPERATION
5 6
I
lCut.--
• . .1.
OPERAND 1
INC
~ FIELD A +
-
10 *12
.i
~-.
16
--
~
I~b...
~~
20
FIELD
* 22
OPERA
B + INC
26 -- 2: 30
PR O.c...S +11. J
I
to
. 8::
2
FIELD C
.i.J.
INC
36 -
32
,
40
I
I
Each time this ee instruction is executed, the OP 1-MSL address in
FROCS is incremented by 16. This will cause successive transfers of
each of the entries in constant stora2e.
However, after the last
execution of the loop, the A portion of FROeS will have an address of
the location which follows the last location of constant storage.
The
Initialization section must then contain the follo,wing TK instruction
which is executed before FROes:
~PERATION
LABEL
1
5 6
•
•
rrj{
OPERAND
--
:.E.ttT
.1
-
J)PEBA In 2
1
IA FIELD A + INC
10 * 12
16
- 20
..L
1
,~
F'ELD B + INC
* 22
26 - 2: 30
P~O~.s 104- ~ 1
FIELD C
32
.. 8::
INC
36 -
~-,-R.J. 0 ,'-IS
~
l.l-
40
J
The use of the colon C:) will cause the Assembler to use the address of
ENT 1 as KK in the TK instruction.
These two characters are transferred
to locations 2 and 3 of PROCS, so that each first execution of
FROeS will refer to Entry 1 of constant storage.
The complete coding for the loop is as follows:
o
4.9
EDIT INSTRUCTIONS
The UNIVAC 1005 instruction repertoire includes two types of
instructions which perform editting and logical operations.
The
logical operations provide for the deletion (erasing) of 1 bits and
the-insertion (superimposing) of 1 bits on the bit positions of a
memory location.
The edit instruction provides for the preparation
of output data for printing and punching.
The edit functions include
such things as zero suppression, character insertion, asterisk
fill, etc.
The erase function performs logical (or binary) mUltiplication of
the corresponding bit positions of a constant and the contents of a
c
memory location and stores the bit by bit product back in the same
memory location.
A binary zero
il either
or both corresponding bit
positions of the constant or the contents.of a memory location will
produce a zero bit in the product.
a binary 1
1
x
~ill
0 = 0, 1
x
Only if both bit positions contain
the product bit be binary 1.
Thus 0 x 0
= 0,0
x 1
= 0,
1= 1
The superimpose function performs logical (or binary) addition)without
carry,of the corresponding'bit positions of a constant and the contents
of a memory location, and stores the bit by bit sum back in the same
memory location..
A binary 1 In either or both corresponding
bit positions of the constant or the contents of a memory location
will produce a binary 1 as the sum.
Only if both bit positions contain
a binary zero will the sum be a binary zero.
0+1
= 1,
1 +0
= 1,
1+ 1
= 1.
Thus 0 + 0
= 0,
The edit instruction requires the use of a pattern of characters
called a mask to control the alteration of a field or fields of data for
output.
The mask pattern must be transferred to rX before the
execution of the edit instruction.
o
-----~------
l(
4.9.1
ED IT LOG ICAL
MNEMONIC:
EL
MODE:
LABEL PPERATION
10
5 6
1
•
. IE.L .
FUNCTION:
~
SPECIAL
LENGTH:
OPERAND 1
FIELD A +
- .....INC
* 12
I\(\(
16
- LD
..
~
• I
•
7
IA:
NO
OPERAIID?
FIELD B + INC
*" 22
26 -
2~
1tM.
30
.1
FIELD C
...
INC
32
36 - G5 40
i,lM
•
. I
Erase the bit positions of the contents of location 1M
specified in Field B which correspond to the bit positions
of location 2 of the IR (the left hand K) which contain binary
zero. Then, superimpose a binary 1 on the bit positions of
2M specified in Fi~ld C which correspond to bit positions
of location 3 of the IR (the right hand K) which contain
a binary 1.
NOTE:
If 1M and 2M specify the same~tion, the erase
precedes the super impose, O'W
lA~.
The two characters (KK) in the A portion are used individually.
The
instruction uses the left hand character (which appears in location 2 of
the IR when the instruction is executed) as the bit pattern for the
erase function.
The right hand character (which appears in location
3 of the IR) is used as the bit pattern for the superimpose function.
The erase function is performed on the character in the location (1M)
specified In Field B.
The superimpose function is performed on the
character In the location (2M) specified in Field C.
The erase and
superimpose can be performed on the same character by specifying the
same location in 1M and 2M.
NOTE:
The UNIVAC 1005 Assembly System provides an
instruction to erase only (EE) and an instruction
to superimpose only (ES).
The character whose zero bits are used to'erase IS coded in column 12.
The character whose one bits will be superimposed is coded in column 13.
l~l
Example 1
Given:
A card field in columns 6 through 9 will contClin
an X punch over column 9 if it is negative. This
field will be transferred to print position 66"
through· 69. All of Print storage has been cleared
as a result of the previous PRINT, EXECUTE command.
Problem:
lABEL
PPERAT.ION
5 6
1
•
..
10
IE.~...
~
Provide the instruction which will print a minus
sign from print position 70, and delete the X
bit over the information from card column 9.
OPERAND 1
FIELD A + INC
* 12
16
=.-:. ..
-
"''-'
',:;
a)
, I
OPFRAIID
~.
F!ElD B + INC
* 22
~9
26
.
- 2::
30
I
2
FIELD C + INC
32
36
I',P,R.
- 82
40
I... lo~1
FIELD A; KK:
The bit configuration of the equal sign (=) in column 12
is 011 111. The bit configuration of the minus sign (-)
is 000 010.
FIELD B; 1M:
11 9 is the decimal address of the location in Read
storage which contains the information from card column
9. This becomes the erase address.
FIELD C; 2M$PR is the Standard label for the MSL of Print storage.
$PR + 69 is the address of print position 70. This becomes
the superimpose address.
Solution:
The binary zero 'in the X bit position of the equal sign will
erase the X bit position of Read storage for column 9. The
binary 1 in each of the other bit positions of the equal
sign will prevent the erase of the corresponding bit
positions of Read storage for column 9.
The fact that Print storage is cleared after a PRINT, EXECUTE
allows the superimpose of the binary 1 in the 2 bit position
of the minus sign.on the binary zero in the 2 bit position of
print position 70. If print position 70 was not known to be
all binary zeroes, two steps would be required to solve this
problem.
NOTE:
The TK instruction can be used to replace a single
character in memory, rather than erase with space and
superimpose with the character.
o
(-
Odal coding can be used to specify the bit configuration of KK
The number sign (#) is coded in column
in the EL instruction.
followed by four octal digits.
12
The coding for the previous solution
in octal would be:
LABEL
OPERAND 1
FIELD A +
16 -
INC
.,~
d)
The binary configuration of octal 37 is
of octal
c
02 is 000 010.
011 111. The binary configuration
4.9.2
EDIT ERASE
MNEMONIC:
EE
MODE:
LABEL PPERATION
1
.. EsE . I\(
.
FUNCTION:
7
fA:
OPERAND 1
16
10
LENGTH:
NO
OPERAND?
FIELD C
Ii" FIELD A + .,:;INC IIA FIELD B + INC
a)
*12
5 6
I
SPEC IAL
-
* 22
.JI,--
--
I
26
itM.
25 30
. I
32
•
36
I
I
...- 35INC·40
I
I
I
Erase th~ bit positions of the character stored at 1M s~LLQ
by Field B which correspond to bit positions of K,
specified in 901umn 12 of Field A, which contain binary
zero.
This instruction is a ~seudo-operation provided by the Assembly System
which is a variation of the EL instruction.
The operation code EE
causes the assembler program to automatically use the address of 1M In
locations 4 and 5, and 6 and 7 (2M of an EL instruction).
The blank
column 13 will produce binary zeroes so that no bits are superimposed •.
ff octal coding is used, the number sIgn followed by four octal digits
must be specified)and the last two must be
NOTE:
00.
ff a memory location is to be cleared to binary
zeroes, use a TK with KK equal to ~~.
)30
c
!
I
(
4.9.3
EDIT SUPERIMPOSE
MNEMONIC:
ES
MODE:
LABEL PPERATION
1
5 6
. . 11:.5;.
FUNCTION:
10
SPECIAL
LENGTH:
OPERAND 1
IN FIELD A + INC
* 12
16
IK ...
-
""-..~
d)
• I
~
7
IA:
FIELD B
* 22
NO
OPFRMID· 2
FIELD C
+ INC
26 - 2S 30
l;lM. .
""
36
32
., . .
-
....
-
.
- 3fINC40
't
"
Superimpose the binary 1 bit positions of K, specified in
column 12 of Field A, on the corresponding bit position of
the character stored in 2M specified in Field B.
This instruction is a pseudo-operation provided by the Assembly System
which is a variation of the EL instruction. "The operation code ES
causes the Assembler program to automatically use the address of 2M
in locations 4 and 5 (1M of an EL instruction), and 6 and 7.
The
Assembler program also automatically places K in location 3, and puts
(.
all binary 1's in location 2 so that no bits are erased.
If octal coding is used, the number sign followed by four octal digits
must be specified, and the first two must be 77.
I~ l
I
4.9.4
EDIT
MNEMONIC:
ED
MODE:
DESCENDING
LENGTH:
7
IA:
YES
LABEL PPERATION
ClPi=RArID '/
OPERAND 1
INC
FIELD
A
F!ELD
B
FIELD C ... INC
+
~
~
+ INC
10 *12
2D * 22
16
26 - 2:: 30
32
36 - BS 40
_
1
5 6
.
. . IEr:h . liM
FUNCTION:
.
...,
H
I~
I
. I
~\.
•
I
Transfer descending beginning at OPI-MSL specified
ih Fi"eld A; according to the manner specified by the
corresponding special characters in the edit mask in
rX; t9 the OP2-MSL specified in Field B. Continue
until:
the OP2-LSL has been filled; ~ a sentinel
(i) i~ detected in the edit mask; . ~ the LSL of rX
has been handled.
NOTE:
The maxi~um length of the edited
data delivered to OP2 is 31 locati ons.
The Edit (ED) instruction performs a location by location
transfer of the charact~rs from OP1 to the locations of OP2
•
according to the edit functions specified by special characters
placed in corresponding locations of rX.
The
lengt~
of OP 2 is
dictated by the length of the mask in rX (31 locations maximum).
The result character to be stored in OP2 will be either the
character from OP1 processed according.
~o
by the special characters in the mask;
serted from the mask.
the edit action specified
or a character to be in-
The mask is usually stored as a constant
and is transferred to rX before the execution of the ED instruction.
The mask is not changed by the ED instruction, and can be used
.
repetitively for identical edit operations.
o
Indirect Addressing can be specified for the address of the
data to be edited (OP1) and for the destination of the edited
output (OP2).
The following symbols are used as special characters In the
mask to specify the edit action:
"
(Backward Slash).
When this special character is detected
in the mask, it will cause ieroes and
spaces from OP1 to be replaced with
asterisks (*) until a character which is
not a zero or a space is recognized from
OP1. The asterisk fill operation started
by the backward slash can be restarted
during the ED instruction by placing
additional backward slashes in the mask.
(Delta symbol).
When this special character is detected
in the mask, it will cause zeroes and
spaces from OP1 to be replaced with space
codes (binary zeroes) until a character
which is not a zero or space is recognized
from OP1. The zero suppress operation
started by the Delta symbol can be restarted duri"ng the.ED instruction by
placing additional Delta symbols in the
mask.
(
~
NOTE:
If a comma appears in the mask and
a previously started asterisk fill
or zero suppress function has not
detected a significant character,
the comma will be replaced by an
asterisk or a space code.
~
t
(Lozenge)
When this character is detected in the
mask, it allows the current corresponding character from OP1 to be transferred to OP2. If asterisk fill or zero
suppress has been previously started, the
character from OP1 is handled accordingly.
(Unequal symbol).
When this character is detected in the mask
it will terminate the ED instruction.
The current character from OP1 will not
be transferred.
All ch~racter.s other than backward slash, Delta, lozenge,
and unequal which appear in the mask will be inserted in OP2
prior to the current character from OP1.
The function of the ED instruction when executed is to first
• f
examine the MSL of rX.
At this precise point in time, the current
character from OP1 is OP1-MSL.
the characfer in the MSL of r',x.
ties exist:
What happens next is based on
Basically, one of two possibili-
the character in the MSL of rX is not one of the
four special characters, or it is one of the four special characters.
If the character in the MSL ofrX is
n2i one of the four special
characters, the character from rX will be inserted in the MSL of
OP2.
The next character in the mask will then be examined.
At
this point in time, the current character from OP1 is still the
OP1-MSL.
If the second character in the mask is not one of the
four special characters, it will also be inserted.
This examination
and insertion will continue until one of the four special characters
is detected.
(If the mask d~es not contain a backward slash, a
Delta, or a lozenge, the ED becomes a TD of rX to OP2.)
c
When a special character is detected in the mask (other than
the unequal symbol), the current character from OP1 (which in this
example is still the OP1-MSL)
IS
transferred to the next most
significant location of OP2.
When this occurs, the next most
significant character of OP1 becomes the current character from OP1.
Mask examination is also advanced to the next most significant
location of rX.
This operation is continued until the first of the
following occurs: 1.
(
The mask examination detects the unequal signal.
The ED instruction terminates, and the current
character from OP1 is hot handled.
2.
A character has been stored in the LSL of OP2
(specified in Field C) before the LSL of rX
has been examined. The ED instruction is then
terminated.
3.
The act i on followi ng the exami nat ion of the
LSL of rX has resulted in a character being
stored in OP2. The ED instruction is then
terminated.
The length of OP2 cannot be greater than the length of the mask
(maximum 31 locations).
If OP2 is smaller than the mask, the excess
positions of the mask are not examined.
If the mask is less than 31
characters in length, the unequal sign should be used as the least
significant character in the mask, but is not counted In the length
of the mask or the length of OP2 •
•
The length of OP1 is determined by the number of locations in the
mask which contain special characters other than the unequal sign;.
presuming that the length of OP2 and the mask are the same.
The
presence of any of the special characters in OP1 will not change the
operation of the ED instructi·on.
Example 1
Given:
Problem:
A ten location operand labelled SUM which
contains dollars and cents.
Print the contents of SUM as follows:
1. Precede with a dollar sign.
2. Zero suppress
3. Insert commas
4. Insert the decimal point
5. Print the word "TOTAL" two print
positions to the left of the dollar
sign, and ~~ting in print position l~1.
Contents of SUM:
Constant stored at MASK:
14
15
16
17
18
19
Instructions:
LABEL
1
Instryction 1.
The mask is transferred from MASK to the high order
end of rX.
o
(
Instruction 2 (See Figure
).
The MSL of SUM becomes the current
character from OP1. The MSL of rX
contains the letter "T" which is not
a special character. The ''T'' is
therefore inserted in the MSL of
OP2--print position l~l. The next
position of the mask (rX) is examined,
and the letter "0" is transferred to
the next position of OP2. The examination and transfers continue until the
dollar sign ($) has been transferred
to OP2. The MSL of OP1 is still the
current character of OP1 •
Delta (locati6n 9) is the next
character in the mask. This starts
the zero suppress function, and
causes the transfer of the current
character from OP1. The ~ from OP1MSL is changed to a space code, and
transferred to the next location of
OP2. The next position of the mask
(location l~) contains a lozenge,
which causes the new current character
from OP1 (location 2) to be transferred
to OP2 (with zero suppression). The
next position of the mask (location 11)
is examined and is found to contain a
comma. Since zero suppress is still
active, the comma is changed to a
space which is inserted in OP2.
The next location of the mask (location 12) contains a lozenge which causes
the transfQr of the current character
from OP1 (location 3) to be transferred to OP2 (with zero suppression).
The next position of the mask (location
13) contains a lozenge which causes the
current character from OP1 (location 4)
to be transferred to OP2. However, the
current character from OP1 is not a
zero or a space. This terminates
the zero suppress function. Transfers of OP1 to OP2 conti~ue ·for the
next two locations. At this point the
location in the mask (location 15)
contains a comma. Since zero suppress
\?J 1
o
c~
is no longer active, the comma is
inserted in OP2. The next three locations from OP1 (locations 6, 7, and 8)
are transferred to OP2. The next
location of the mask (location 15)
contains a period, which is inserted
in OP2. The next two locations from .
OPI (locations 9 and 10) are transferred to OP2. At this point, the
LSL of OP2 has been filled, thus
terminating the ED instruction.
16
17
18 19
20
21
22
OP1
o
,- 0
1
2
T A \...
3
4
5
'>6 >0 i\\
6
7
8
I~ I~
9
10
26
27
28
29
30
31
29
I
I~o
31
'.
rX
ii ¥
11
23 24/ 25
1. d.
12 13
14
"
15
16
17
-
• q
~
18 19' 20
Zl
~ ~ i
..
22
,
23 24
25
26
27
28
OP2
Figure _ _
o
(--
4.10
DECLARATIVE INSTRUCTIONS
Declarative instructions are instructions from the programmer
to the Assembler program to control its operation during assembly
processing.
No object language instructions are produced from a
source language Declarative.
However the source language information
is carried through to the object deck, in the event re-assembly is
desired at a later time.
Declrative instructions include provision for establishing
constants in the object program.
The output from a Declarative which
sets up a constant will include the
~onstant,
and instructions to the
Load routine for loading the constant.
The Assembler program maintains two counters which control
the assignment of memory locations and addresses of the instructions)
and the working storage for the object program.
The Instruction
Location Counter (ILC) is incremented by the Assembler program when
allocating memory for instructions and in-line constants.
The Data
Location Counter (DLC) is decremented by the Assembler program when
allocating memory for working storage and Declarative constants.
These counters are not hardware, but are program locations
established and updated by the operation of the Assembler program.
When the Assembler program is loaded, the
~tial
value of the ILC is
p~
set to address of the first location following the
area--Row 20, Column 24, Bank 1.
Read/Punch~torage
Unless otherwise specified, this will
be the address assigned to the MSL of the first object language instruction assembled.
A Declarative instruction is provided which allows
the programmer to place a new value in the ILC.
The initial value of the DLC is the address of the last location
in memory--Row 31, Column 31, Bank 2 for a two bank system, or Row 31,
Column 31, Bank 4 for a four bank system.
No provision is made for
specifically placing a new value in the DLC.
The value of the DLC
is decremented as working storage areas and Declarative constant
are c.lled for by the iourse language program.
140
c
4.10.1
DEFINE INSTRUCTION LOCATION COUNTER
MNEMON IC:
LABEL
DL
OPERATION
10 *12
5 6
1
I
OPERAND 1
If! FIELD A + INC
x:'l~.Xl
~\..,
I
FUNCTION:
16
-
OPEBArID 2
FIELD B + INC
FIELD C -t I~~c
aJ * 22
26 - 2:: 30 32
36 - BE: :0
-4--
.~
L
.1.
~
..."I._._..J.__ ...I._ .... ..I.
I
1
~
1
I
I
I
Set the value of the Instruction Location Counter to
the ~ address specified in Field A.
NOTE:
A plus or minus increment may also
be used.
When the current (or initial) value of the ILC is not the
address desired by the programmer for the allocation of the next
instructIon, the DL Declarative is used to establish a new value
in the ILC before the next instruction is allocated.
Caution must
be exercized by the programmer when changing the value of the ILC to
insure that an address is not assigned more than once by the Assembler
program.
Example 1
Given:
Problem:
The Read/punch Unit is not used by the object
program.
Start the allocation of instructions in the
first location following the Print storage area •
.
LABEL
1
5 6
I
~,
PPERATION
I
~.L
..
OPERAND 1
OPERArID 2
FIELD C -t INC
~ FIELD A + INC ~~ FIELD B + INC
16
10 * 12
26 .. 2: 30 32
36 - 3i: 40
.- aJ * 22
I
tJ.?i
I
I
•
I
I
•
1
I
I
I
,~\
''\...0.>/
Field A:
$P1 is the Standard Label for the MSL of the Punch
(Read/punch Read) storage area.
Solution:
This card must be the first source language input card
which effects the ILC. The known value of the Standard
Label $P1 (RHo, C14, Bl) is stored by the Assembler
program in the ILC, and is used as the address of the
first instruction assembled. $1~14Bl or)(293 could also
have been used in Field A to produce the same value in the
ILC.
.
NOTE:
Programmer's labels cannot be used in
Field A.
Example 2
Given:
Code Image and Punch storage are not used by
the object program.
Problem:
LABEL
1
OPERAND 1
~ FIELD A +
10 12
16
*
5 6
[l)l
•
~:rA,R.\
....
I
•
~
•
•
•
·.
•
•
.,,-..
~~.1.
I
-. '.
•
tb.LI •
•
I
I
I
.. -.
~
~
I
•
• I
~\>.~
I
IIIE>.~
I
~~.
I
I
I
I
•
OPERA ID 2
FIELD C .
F
!ELD
B
~
+ INC
Z) * 22
26 - 2:: 30
32
36
INC
• I
I
~I
I
~
• • •
•
'1-
';'-f
I
Use these areas for instructions
PPERATION
I
I
• I
·
I
......
I
.'
· ..
· ..
•
I
I
•
.
• t
•
· ....
.
I .
--.
I
I
I
·
...J..
•
I I
I
...-
I'
40
I
· I
I
I
• I
• I
...l
•
•
•
• 1
l'
I
•
•
•
· I
I
I
I
••
I
.. • • •
II
I
.. '
Instruction 1. This instruction sets the value of the ILC to the
address of the first location following Read Storage.
'.
INC
BS
I
I
I
c
(
Instructions 2 through n.
These lines of coding beginning at START
are assigned to addresses beginning with
J:(8l and conti nu i ng accor ding to the number
and length of the instructions. The pro-,
grammer must determi ne when the ILC ~ """"" ~A,
been incremented to the point where it
contains the value which is six less than
the value of the first location of Print
storage. At that point he must code the
J instruction to prevent the sequential
advance of the ICC at object time from
securing instructions from the Print
storage area. He must then code the
second DL declarative to prevent the ILC
from assigning instructions to addres~in
Print storage dur·ing Assembly processing.
4.10.2
DEFINE AREA
MNEMON IC:
DA
LABEL PPERATION
ifill
5 6
1
•
10 *12
. . ~A .
FUNCTION:
OPFRArm ?
OPERAND 1
FIELD A + INC ~ FIELD B + INC
FIELD C
16
I)(u
-
-'1--
a)
• I
* 22
•
26 - 2:: 30
• I
32
36
•
...
INC
-l3s 40
I
Allocate an area of working storage with a length as
specified in Field A. Subtract the number of locations
in the area from the value of the DLC. Use the new value i"1.
of the DLC as the MSL of the area.
NOTE: This instruction will usually have a Lapel
to be used for referencing by the programmer.
The loading of the Assembly program sets the initial value of
the DLC to the last Location of memory--R31/C31, 82 or R3l/C31, 84.
When an area of working storage is required, the programmer uses the
DA declarative to cause the Assembler program to allocate the required number of locations.
location of memory and
~
This allocation begins at the last
proceeds toward the first location of
memory. by decrementi ng the value of the DLC by the si ze of the area
required.
The number of locations to be allotted by the DA declarative is
coded in columns 12, 13, and 14 of Field A.
The maximum number of
locations which can be allotted by a single DA instruction is 961.
The use of the DA declaratives to allocate working storage does
not prevent the same locations from being assigned to instructions.
In the event of a lengthy program, the assignment of instructions
may increment the value of the ILC until it is greater than the value
I
of the DLC.
The programmer can recognize whether or not this situation
has occurred by examination of the object printout from the Assembly
processing.
The DA declaratives should be coded on a separate page of coding
paper.
This will enable the programmer to obtain a "picture" of
the full area of working storage.
It will also enable the programmer
to assess the possibility of exceeding the total memory capacity
for working storage and instructions.
The number of instructions
'ItI\M.cL c.ouU, ~
times 7 is the maximum number of locationsArequired for instructions.
That product added to the starting value of the ILC will produce the
maximum value of the ILC.
The sum of the numbers in Field A of the
OA and DC declaratives subtracted from the starting value of the
OLC will produce the lowest value of the DLC.
The number of loca-
tions set aside for in-line constants and Indirect Address constants,
if any, should be included.
The Define sub-field declarative is used In conjunction with
the DA declarative to provide definition and labelling of sub-fi~ds
within the locations allocated by a OA declarative (See Section
4.10.2.1.)
The contents of the memory locations allocated by a DA declarative are not entered at object load time.
(-
C
Example 1
Problem:
LABEL
1
Establish a working storage area of ten
locations, to be used in the accumulation of
a total.
PPERATION
OPERAND
OPEMlIn .2
FIELD C
~
B + INC
~ FIELD A +
- ..INCaJ ~* 22F'ELD 26
- 22 30
10 *12
16
~
5 6
\:oT.At L\)_A
•
Solution:
iii
1
_
..
I
•
32
36
• I
...
- BSINC40
. I
Assume that this is the first DA declarative to be assembled for an object program
to be run on a two bank UNIVAC 1005. The
loading of the Assembly program set the
initial value of the DLC to "1922. The area
TOTAL would be assigned to locations ):t19l3
to It 1922 inclusive. The label mTAL is then
used to specify the MSL of this 19 location
area throughout the p'rogram. The new value
of the DLC is .1912 (t(1922 minus 19)
o
i
I'
4.10.2.1
DEFINE SUB-FIELD
The Define Sub-field declarative can only be used following a
DA declarative.
The Define Sub-field declarative does 02i change
the value of either the ILC or the DLC.
It does Q2! allocate
memory.
The purpose of the Define Sub-field declarative is to establish
labels for fields within an area that has been allocated by the
immediately preceding DA declarative.
The address assigned to
the label of a Define Sub-field declarative is determined by the
Assembler program by calculating its location relative to the MSL
of the area allocated by the DA declarative.
The Define Sub-field declarative is specified by placing a
minus sign (-) in column 6. Complete specification of the Define
sub-field declarative is as follows:
LABEL PPERATION
1
5 6
..
Where XXX
VVV
-
OPERAND 1
OPERAIID 2
FIELD C
~ FIELD A + INC .11 FIELD B + INC
.,:;
10 *12
16
.
.
I~'t.'t
;:D
• I
* 22
26 - 2:: 30
l'l'l.Y
. I
1-
36
32
.
is the number of locations within the sub-field.
In order to define the sub-fields within an area allocated by a
.
DA declaratfve, definition shoUld begin with the MSL of the area and
Overlapping sub-fields may be defined.
1
40
I
is the number of the least significant location of the
sub-field.
proceed to the LSL of the area.
INC
- 13c
Lt1
Example 1
Given:
A master card is to be read and transferred to
working storage for the subsequent processing of
deta i 1 car ds •
Define an 8~ location area with sub-fields
according to the following master card format;
Problem:
Card Columns
lABEL PPERATION
1
~
5 6
10
~~:ti l\.A,
S:r.~
,f=_v 2
'LL\ ~I\'"
rr,nl\ 4..i
•
-.' .
-I
-
I
l-r~~~"
-
•••
In-LlMb
-
I
"'.'I...... r-.
* '12
•
&
I
-
16
1£« .•.
~
. '.
-
OPERAND l'
FIELD A + INc
.
1'1
1
1 through
8 through
31 through
41 through
51 through
61 through
71 th ro~h
•
,
141-
(~'
.I
~~
. '':
2)
'~d. ..
FiELD B + INC
* 22
26 - 2S 30
,
... 1
~l.
11.11.
IU.
• I
till.
u:~
-1J
1
---I
11.t>: _______
J
.I
,I711i
J)E>ffiA ill
~
tl " _______
•J
Stock Number
Description
Balance on Hand
Shipped to Date
Shipped this Week
On Order
M"Inlmum L eve 1
40
50
60
70
80
• I
I.
I
I
..
1.-.,.
-1
7
30
__
I
FIELD C
--Li ____
INC
I
-1....l
I
I
1
•
'I
1
I
"
•
1
I
I
...
36 - BS 40
32
J
, ... J
I
I,
I
2
t
1
I
'I
-
' , I
____
,
, I
"
• I
J
- 1 I
J
1 .1 . • 1
Solution: The DA instruction allocates an area of 80 locations with
an MSL identiC.ied by the label MASTR. When the Master card
is to be transferred from Read Input storage, the following
single instruction can be used to transfer all 80 columns.
'I
•
I"
'.
• J
'-1
lABEL
1
FIELD C ... INC
?2,
36 -
S 40
Subsequent coding can then refer to the MSL of the fields in
the Master card by using the labels of the Define sub-field
declarati ves.
c
(
4.10.2.2
REDEFINE STANDARD LABELS
There is.a second use of the DA declarative which ~ not
allocate working storage area.
The purpose of this second use
of the DA declarative is to enable the programmer to establish
his own labels for the areas of memory which have been assigned
Standard Labels.
program,
Since these areas are "known" to the Assembler
allocation is made by the DA declarative.
llQ
The DA declarative specifies a Standard Label In Field A,
and is followed by Define sub-field declaratives.
The Define
sub-field declaratives are used to redefine the area assigned
to the Standard Label according to the field configuration
required by the programmer.
(
The labels assigned by the programmer
to the Define sub-field declaratives can then be used to reference
these fields.
~ '\I~ ,,~ ~ 1)\"c" ~ Mt t.f.tvo.;.J..,~~,
Example I
Given:
A card format as follows:
Card Columns
1
11
21
41
61
through
through
through
through
through
ID Number
Quantity 1
Quanti ty 2
Quanti ty 3
Quanti ty 4
10
20
40
60
80
Redefine Read Input storage giving labels
to the card fields •
LABEL PPERATION
OPERAND '1
OPERAND 2
IfII FIELD A + INC ~~ FiELD B + INC
FIELD C 1- INC
10 * 12
1
16
5 6
26 -- 2:=' 30
32
36 - 8:: flO
--, dl * 22
Problem:
-
l.
~I
. . l).A.
••
[to.i. ..
~
ICl~
II
.
Q.4r ••
-
•
-...L
....L
..l
•
-.l
-•
-...
•
11~1..
~
b\.Jl{'
ILI.RJ.
~
I&~~
.II"'
.
..
I
I
I
• I
I!Jlj .
I
11.i1. •
I
1
I
I
I~.
I
•
I
I.
I
l~-,-
--'-
I
I
I
IAA
I
.1
.
1
I
I
• I·
1
-'
1
•
I
I
There is no restriction to the number of times an area
assigned to a Standard Label may be redefined in this manner.
o
4.10.3
DEFINE CONSTANT
MNEMON IC: DC
LABEL
OPERATION
IfII
5 6
1
• •
.1
),e.
10
OPERAND 1
OPERArID ?
FIELD A + INC ~ FIELD B + INC
FIELD C + INC
-
* 12
~l>.b
16
-
a;
* 22
T
Ic.c.c. If_ It
-
-"I"
26 -
2~
-
-'-
I
-
32
30
....
36
- .... -
T'"-
~.
--I
The purpose of the DC declarative is to enter constant
values in the object program at load time.
The DC declarative
usually has a label that is used to specify the MSL of the constant.
The address assigned to the constant is determined by
subtracting the number of locations in the constant, specified
by Field A, from the current value of the DLC plus 1.
The
Assembler output card in the object deck will contain the constant, and the instruction to the Load routine to enter the
(
constant in the assigned address.
The constant is coded beginning in column 18 of the coding
form.
The sign of the constant (plus or minus) is coded in
column 17 and is not included in the length of the constant.
maX1mum length of a negative constant is 25 locations.
The
The
maX1mum number of characters which can be specified in a single
card for a positive constant is 44.
Provision is made for the continuation of a positive constant of more than 44 characters by placing a comma
C,)
in column
6 of the next card, and continuing the characters in column 18.
A maximum of 961 characters can be entered as a signle constant
in
tWo
~
manner.
3:: 40
The length of the constant 1S specified in only
the DC card.
}(
\
The action of the Load program is to use the length specified
In Field A to determine the number of the columns,beginning at
column
1S.~
to be stored (as punched) in memory. If the number
~
of characters punched as the constant ~not agree with the number
In Field A, the number of columns specified by Field A is used.
Example I
MASK
is the constant used as the mask in Example I of the ED
i nstr \Jct ion.
HEAD
might be used to print the headings on an inventory report.
(The actual constant would continue through column 61 before
starting again in column 18 of the continuation card.
LIMIT
is a 7 digit. constant with a value of minus 9999999 which
would be stored as 999999R.
If it is desired, the DC declarative can be used to allocate
a working storage area whose initial contents should be space codes.
FIELD C
32
----
..
-
..
.. - - - -
--~---
---
+
36 -
INC
5 40
The area assigned to TOTAL will be entered with the
space codes from columns 18 through 27 of the DC card.
l~
Caution
should be exercized by the programmer when using this technique
due to the fact that the area will not be cleared if a re-start
IS
required.
If the programmer codes the constants on a separate page and
enters the source language cards for constants after the cards
from the ~ page, a single TK instruction can be used to clear all
of working storage to spaces.
Example 3
Given:
The above recommended procedure is followed,
card has a
and the last source language
label of LAST.
D"
Problem:
Clear working storages to space codes.
... _.1
LABEL PPERATION
OP~P.AND
OPERA JD 2
FIELD C + INC
IIA FIELD A +- .".iNC ~~ FIELD B + INC
10 * 12
22 * 22
1
16
5 6
26 -- 2~ 30
32
36 -13:: 40
-
~
•
Solution:
T.K
'~.A7.
.
___ .1 _
L
ILAS~.
• I
Ilt1..q.~~
The allocation of "all preceding'DA cards began with a
DLC value of 1922 (two bank system). The value of the
DLC was reduced by each DA card including the card
labelled LAST. Thus the MSL of all of working storage is
also the MSL of LAST. The 2 space codes from the TK are
transferred beginning at the LSL of OP2, (ti1922). Since
OP2 is larger than two locations, the remainder of OP2 is
cleared to spaces.
NOTE:
If the Translate option is to be used in the
object program, a DC instruction is used to
establish the translat~ table, and must
be the first ~~~~language instruction
assembled which effects the value of the DLC.
I
4.10.3.1
I N-LI NE CONSTANTS
The term in-line constant refers to the allocation of a constant
in the portion of memory usually allocated to object language,
i nstr uct ions.
The UNIVAC 1005 Assembly System
~rovides
for in-line constants
through use of the asterisk (*) in column 6 of the coding form.
The
reaminder of the in-line constant format is the same as for a DC
declarative.
No continuation cards may be used for in-line constants.
The in-line constant is allocated based on the current value of the
ILC, and usually carries a label for identification.
LABEL PPERATION
1
10
5 6
. 1*.
I
OPERAND 1
~ FIELD A + INC
* 12
16
-
.'I.'
2J
.,
OPFRA In
FIELD B + INC
* 22
26 - 2:: 30
Ilb... !It.t.le.. Ie. lc.--
?
FIELD C + INC
32
36 - 132 40
..........
~
~
-:-I
The maximum length (DO) of a negative in-line constant is 25
locations.
W~
The maximum length (DO) of a positiveAconstant is 44
locations.
&0
The in-line constant maYAbe used to enter constants in the memory
locations between Read Input storage and Print storage.
The in-line
constants should be preceded by a DL with a Field A ofJlSI and
followed by a DL with a Field A of the Address for the first instruction
.
to be assembled.
These cards must then precede the first instruction
when assembling.
c
4.10.3.2
IN-LINE COMMENTS
{b
Col·umns 41 through H of the codi ng form are headed "Gomments"
and can be used by the programmer to make notes regarding the lines
of coding.
These comments will also appear on the final printout of
the Assembly processing.
They provide an excellent assist to good
documentation.
As a further means to good documentation, the UNIVAC 1005
Assembly System provides for in-line comments.
An in-line comment
allows the programmer to use most of the columns of the form for
headings and notes.
The in-line comment is not allocated to memory
in the object program.
Assembly program.
The in-line comment may appear anywhere in the
LABEL IOPERATION
1
5 6
•
It is merely printed and punched by the
10
•· .. ·_r_··r._ '."
OPERAND 1
iNC
~ FIELD A +
-
* 12
16
. •Xc. c CIr Ic..-----·-
-~
-,
~
3J
~~
OPFRAIJD ?
FIELD B + INC
FIELD C
..
----
* 22
26 - 2: 30
--r ..... .
r--.
-;,
32
t-
1-
36
•......4._. _ _ _ -
. f·....
..
The in-line Comment is specified by placing a period (.) in
column 6 followed by a blank (space) in column 7.
The Comment
itself may appear anywhere in the coding line from columns 8 through
61.
If the required comment is longer than 54 characters, additional
in-line Comments should be coded with a period in column 6 and a
space in column 7.
INC
- 13:
1-,•
!~O
In order to assist In the documentation, it is suggested that
~~I,ow!.'\oCI
theAin-li~e comments be used as the first card or cards of the
program to be assembled.
Example
Problem:
Print the Program Name, Author's Name,
and Date Written as the heading of the
Assembler printout.
G
4.10.4
DEFINE INDIRECT ADDRESS CONSTANT
Mt£MON IC:
LABEL
PPERATION
1
...
DI
10 *12
5 6
J
•
J
OPERAND 1
~ FIELD A +
- , INC
[l):r
..
16
liA-A.
--.
2C
I
~~
OPERArlD 2
F! ELD B + INC
FIELD C
* 22
26 .- 2: 30
rLA. -]
• I
32
36
i'
INC
- 13~
lAl-'~
The purpose of the DI address constant is to provide the programmer with
the means to allocate, identify, and establish the initial contents of
a secondary address.
An instruction which calls for Indirect Addressing
contains a primary address for the A or the Band C portions of the
instruction.
The locations referred to by the primary address must
contain a secondary address which IS the address of the data to be
processed by the instruction.
Indirect Addressing is specified In an instruction by placing an
asterisk (*) in column 11 for OP 1)or column 21 for OP 2 (or both, if
required).
The asterisk causes the Assembler program to place a binary
1 in the X bit position of location 6 for OP 1 IAJor location 7 for OP 2
,IA (or both).
At object time, when the instruction is transferred to
the Instruction Register, the UNIVAC 1005 first examines these two bit
pos i tions.
If the X bit of location 6 contains binary 1, a two location descending
transfer is made beginning at the address in the A portion of the IR,
to locations 2 and 3 (the A portion) of the IR.
If the X bit of
location 7 contains a binary 1, a four location descending transfer IS
c
40
I
made beginning at the address in the B portion (locations 4 and 5) of
the IR, to locations 4 through 7 (the B and C portions) of the IR.
After
performing these functions, the instruction is then executed using
the addresses currently in the IR.
The contents of the instruction
as stored in memory remain unchanged.
In order to provide the locations in the object program for secondary
addresses, the DI constant declarative is used as follows:
FIELD A:
The specification of an address in Field A establishes a two
location secondary address in the object program. The initial
contents of the two location secondary address will be the
machine language code for the specified address.
FIELD B:
The specification of an address in Field B establishes a four
location secondary address in the object program. The
initial contents of the four location secondary address will
be established according to the rules for Assembly System
OP 2 addressing. If Field B contains a label (Standard or
programmer), the two character address of the MSL of the
area assigned to the label will be used as the initial
contents of the left hand two locations of the secondary address.
If Field B contains a label, Field C may be left blank, and
the two character address of the LSL of the area assigned
to the label will be used as the initial contents of the
right hand two locations of the secondary address.
FIELD C:
If Field B does not contain a label, or if the LSL address
of the area assigned to the label in Field B is not to be
used as the initial value of the right hand two locations
of the secondary address, Field C must contain an address.
NOTE:
The DI constant will usually have a label which is used
as the primary address i"n the instruction which calls
for Indirect Addressing.
Example 1
LABEL
F ! ELD B + I NC
26 - 25 30
* 22
FIELD C
32
36 -
C)
'~
CAT
becomes the MSL address of a two location secondary address
which initially contains the MSL address of the area assigned
to DOG. CAT may then be used as the primary address in the
A portion of an instruction. When that instruction is
executed, the address stored in CAT replaces the address of
CAT in the IR.
FOX
becomes the MSL address of a four location secondary address
which initially contains the MSL and the LSL address of the
area assigned to RAT.
COW
becomes the MSL address of a ~ location constant which
initially contains (from left to right) the address of the
MSL of the area assigned to PIG, the address of the MSL of
the area assigned to ANT, and the address of the LSL of the
area assigned to ANT.
MOVE
becomes the MSL address of a SIX location constant which
initially contains (from left to right) the address of decimal ~1,
location 124, the address of decimal location 733.
~ ~~ ~cbc.i..wcJ,
The Assembler processing for the allocation of locations to the DI
constants is the same as for the allocation of the DC and {he DA
(
declaratives.
This means that the locations assigned to the DI constants
in the previous example will be in the reverse sequence in which they
are assembled.
The characters within each constant will appear in the
correct sequence.
Assume the value of the DLC is 1700 when CAT is to be assembled.
The
addresses assigned to the lables in the example would be as follows:
CAT
FOX
COW
MOVE
1699
1695
1689
1683
This condition may have an effect on the sequence of coding DI
constants when establishing a table of Indirect
Address'~
In the
example of Indirect Addressing (page 11), a table of secondary
was established with a label of SECAT.
table is as follows:
address~
The coding to establish the
LABEL PPERATION
~
1
•
5 6
•
a
•
• ••
I
I
10
}::t,.
I
Cb:r.. ..
.. . ~~.
IS$-j' A-f ])::t:..
I
OPERAND 1
FIELD A +
- ..INC
* 12
I
I
I
.
•
.I
16
.
.
~
.:;
20
• I
I
•
•
• I
~-'-",
OPJ:kAf"
~~
FIELD B + INC
* 22
tt 1..fo
w.1.~
26 -
,
2~
30
36
..- 82
INC
40
.1
l{.~
. I
• f
It.1... ~I
1l ~..d ..
1'U,{.
• I
I
121.1., • •
I
• I
M.!.. .•
I
I
FIELD C
32
I
•
I
I
I
I
Using this sequence causes SECAT to be the address of the MSL of the
Secondary Address Table.
The LSL of the table is SECAT + 19.
Refer
to the coding of the loop in Section 4.8 for the use of an Indirect
Address table.
(The constant storage referred to in the example on
Page 12 would also be set up in the same manner.)
\~O
(
4.10.5 DEFINE END
MNEMONIC: END
LABEL PPERATION
1
10
5 6
•
•
OPERAND 1
! NC
~ FIELD A +
- .'
T,
* 12
-_.
16
li't.x.. .
E.\.l.l. .
'-~
I
~~
F TLD B
* 22
OPERAIID ?
FIELD C + INC
+ INC
26 -- 2: 30
I
36 - [3: 40
32
. I
••
The purpose of the Define End declarative is to provide for the
automatic start of the object program when it is loaded by the Load
routine.
Field A specifies the address of the MSL of the first instruction to
be executed in the object program.
programmer's label.
Field A usually contains a
No allocation is made, and the address in Field
A is not stored in memory.
(
E~ample
1
LABEL K>PEh,l\' ION
1
OPERAriD 2
'\
!NC
IF
FIELD
A
F'ELD
B
FIELD C + INC
+
~
+ INC
- 10 * 12
_. 22 * 22
32
36 - 13:: !jQ
16
26 -- 2: 30
~".
5 6
•
OPGi,;r;,:,
.
. . t.f't]..
S:1.~.R.--r
I
• I
--
•-
START is the label of the source language irstruction which is to be
executed first at the time the object program is loaded.
The source
language instruction START need not be the first instruction assembled.
NOTE:
The Assembler output card produced from the END
declarative must be the last card loaded by the
Load routine, and .should be followed immediately
by the input data to be processed.
I
4.11
MULTIPLICATION
Multiplication In the UNIVAC 1005 is performed uSing fixed length operands
for the multiplier, the multiplicand, and the product.
When a Multiply
instruction is executed by the UNIVAC 1005, the fixed length multiplier
and multiplicand are transferred from memory to positions in Row 32,
Bank 1 where they are then operated upon to produce the product--also
in Row 32, Bank 1.
The product is then automatically transferred from
Row 32, Bank 1 to memory.
During the execution, the locations in
Row 32, Bank 1 normally reserved by the IR and the ICC are used in the
calouiati6n of the product.
The contents of the ICC are preserved and
are restored to the ICC automatically, to initiate the next instruction.
Multiplication is performed using the absolute (unsigned) values of the
multiplier and multiplicand, producing an absolute (unsigned) value as
the product.
Locations in the product which do not contain a significant
digit (1 through 9) will contain a zero (I).
Values are treated as
integers.
Since there are three operands in multiplication, the multiply command
of the UNIVAC 1005 utilize a 3 address logic:
OP 1 is the multiplicand,
OP 2 is the multiplier, and OP 3 is the product.
There are two multiply instructions in the command structure of the
UNIVAC 1005, Multiply (MU) and Multiply Long (ML).
The difference
between the two is the size of the fixed length multiplier, multiplicand
and product.
·~··'
·C
,
,
j~
Multiply utilizes a multiplier of exactly
SIX
digits, a multiplicand
of exactly four digits, and produces a product of exactly ten digits.
Multiply Long utilizes a multiplier of exactly eleven digits, a
multiplicand of exactly nine digits; and produces a product of exactly
twenty digits.
If the programmers multiplier and multiplicand do not conform exactly
to the requirements of one or the other of the multiplication instructions,
a Multiply Working Storage (MWS) should be established by the programmer
(using DA declaratives) for a multiplier, multiplicand, and product of
these lengths.
The programmer should then transfer his variable length
operands to the MWS before executing a multiply instruction.
(
transfers to MWS should be made via rX using the TX instruction.
R~~$
An
example of the use ofAMWS is included in the explanation of each of the
multiplication instructions.
c
The
4.11.1
MULTIPLY
MNEMON IC:
MU
MODE:
SPEC I AL
LENGTH:
7
NO
IA:
LABEL PPERATION
OPFRA'ln ?
OPERAND 1
If! FIELD A + iNC .R FIELD B + INC
FIELD C i' INC
10 * 12
16 - --.. 22 * 22
32
36 - l3i: LiG
26 - 2: 30
5 6
1
.~
I1.L
.M.\.l
•
FUNCTION:
.
.
I
-
liff\
I
3,L
.
I
Transfer ascending the four digits beginning at the LSL
specified in Field A to the multiplicand positions of Row
32,. Bank 1. - Transfer descending the ili digits beginning
at the MSL specified in Field B to the multiplier positions
of Row 32, Bank 1. Multiply. Transfer ascynding from the
product positions of Row 32, Bank 1 to the ten locations
beginning with the LSL specified in Field C.
NOTE:
After completion of the MU instruction, the product
is also avai lable in Row 32, Column 21 through Row 32,
Column 30 of Bank 1, until the execution of another
multiplication or division instruction.
Example 1
Given:
A four digit Quantity in card columns 1 through 4.
A six digit Price in columns 5 through 1~.
_
Problem:
LABEL
OPERATION
'"
•
.
OPERAND 2
OPERAND 1
INC lR FIELD B + INC
FIELD A +
FIELD C
- ......
10 *12
5 6
1
Multiply Quantity times Price and store the product
in the ten location area labelled AMT.
IMau.
. lai.
2)
16
I
I
* 22
IlitlS
26 -
2~
I
30
32
I
~A,N\".
FIELD A:
~ 1 is the decimal address of the MSL of Quantity
FIELD B:
~ 1~ is the decimal address of the LSL of Price
FIELD C:
36
i'
INC
- l3c
40
I
+AMT is the address of the LSL of the area assigned to AMT.
c
-----
-------
-----------
In the event the size of the operands are not the exact length required
by the MU command, rX (Row 32, Bank 2) can be used as a Multiply
Working Storage.
The multiplicand (4 digits or less) is transferred to
rX using a TX command.
space codes.
as follows:
This fills the high order positions of rX with
A TA command is used to transfer the multiplier to rX
Field A contains the LSL address of the multiplier in
memory; Field C specifies $32 27 B2; and Field B specifies a location
in rX based on the actual length of the programmer's mUltiplier.
If
the multiplier is 5 digits, the Field B address would be $32 23 92.
The high order positions of the fixed length multiplicand and multiplier
will then contain space codes.
$32 21 B2 can be used as the LSL of the fixed length product of the
(
MU command.
The programmer can then transfer from rX the actual number
of digits In his product.
Example 2
Given:
Problem:
A three digit Hours in columns 9 through 11 in the
form XX.X. A five digit Rattin columns 12 through
16 in the form X.XXXX.
Multiply Hours times Rate and store the half
adjusted Gross in Punch storage positions for
columns 21 through 25 in the form XXX.XX.
At the completion of the execution of the MU instruction, rX had the
following appearance.
MULTI PUCAND
PRODUCT
MULTI PLiER
(4.11.2 MULTIPLY (LONG)
MNEMON IC:
ML
MODE:
LABEL 5PERA'ION
-0
5 6
•
• •
FUNCTION:
M,L.
"
.- ..
.
OPERAND
FIELD A +
-
LENGTH:
7
~
III!
1
SPECIAL
* -2
~6
i.t
,
-
~JC
')""\
'-~
.R
7'-
1
IA:
NO
OPFRArID
rTLD B + INC
26 .- 2:=: 3D
22
1l..M.
. I
?
FIELL C
32
36
3 L.
.
...-
iNC
:jQ
t3:
. I
Transfer ascending the ~ digits beginning at the LSL
specified in Field A to the multiplicand positions of Row 32,
Bank 1. Transfer descendine the eleven digits beginning at
the MSL specified in Field B to the multiplier positions of
Row 32, Bank 1. Multiply. Transfer ascendine from the, product
positions of Row 32, Bank 1 to the twenty locations beginning
with the LSL specified in Field C.
NOTE:
After completion of the rvL instruction, the product
is also available in Row 32, Column 11 through Row 32,
Column 30 of Bank 1, until the execution of another
mUltiplication or division instruction.
The ML instruction is performed in the same manner as the MU instruction
except for the provision of longer values.
The use of rX described in
the preceding Section 4.11.1 for the MU must be modified to take into
account the longer operands.
The TX instruction specifies the actual length of the multiplicand.
The
TA instruction has an OP 2-LSL of $32 22 B2 and an OP 2-MSL predicated
on the actual length of the multiplier.
Since the total number of digits
In the ML instruction multiplier, mUltiplicand and product exceeds 31
(the capacity of rX), the LSL of OP 3 of the ML instruction can specify
II
$32 3X B1. This will cause the product to be transferred to the
identical locations in which it was developed.
(f"
\"-_J
Example 1
Given:
Problem:
A six digit Quantity in columns 1 through 6.
digit Unit Cost in columns 7 through 13.
A seven
Multiply Quantity times Cost.
1
,(" "
. __-r
4.12
DIVIDE INSTRUCTION
Division in the UNIVAC 1005 IS performed using fixed length
operands for the divisor, the dividend, and the quotient.
When
the Divide instruction is executed by the UNIVAC 1005, the fixed
length divisor is transferred to certain positions in rX (Row 32,
Bank 2), and the fixed length dividend is transferred to positions
in Row 32, Bank 1, where they are operated upon to produce the
quotient and the remainder--also in Row 32, Bank 1.
The fixed
length quotient is then automatically transferred from Row 32,
Bank 1 to memory.
During the execution of the Divide instruction,
the locations in Row 32, Bank 1 normally reserved by the IR and
the ICC are used in the calculation of the quotient.
c
The contents
of the ICC are preserved, and are restored to the ICC automatically,
to initiate the next instruction.
Division is performed using the absolute (unsigned) values of
the divisor and the dividend, producing an unsigned value as the
quotient.
Locations in the quotient and remainder which do not
contain a significant digit (1 through 9) will contain a zero
(~).
Values are treated as integers.
Since there are three operands In division, the Divide instruction of the UNIVAC 1005 utilizes a 3 address logic:
OP1 IS the
,divisor, OP2 is the dividend, and OP3 is the quotient.
The Divide instruction utilizes a divisor of exactly six
digits, a dividend of exactly eight digits, and produces a quotient
of exactly eight digits.
C
~
"
J
If the length of the programmer's divisor,
dividend and quotient do not all conform exactly to the requirements
of the Divide instruction, a Divide Working Storage CDWS) should be
established by the programmer for a divisor, dividend, and quotient
of these lengths.
The programmer shoUld then transfer his variable
length operands to the DWS before executing the Divide instruction.
An example of the use of Divide Working Storage is given following
the explanation of the Divide instruction.
\10
4.12.1
DIVIDE
MNEMON IC:
DV
MODE:
LABEL PPERATION
1
10
5 6
•
...
.,.
2D
..
I
IA:
YES
OPFRA ID
~A
F!ELD B + INC
* 22
~
26 -- 2: 30
I
.. 8:
/
FIELD C
INC
36 -
32
t5.\.. ..
40
. I
After completion of the Divide instruction,
the Remainder is available in Row 32,
Column 18 through Row 32, column 23 of
Bank 1, until the execution of another
multiply or divide instruction.
Example 1
Given:
An eight digit Total Cost in card columns
9 through 16. A six digit Total Units in
card columns 1 through 6.
Problem:
OPERATION
5 6
•
-
~".
iL
NOTE:
1
16
7
Transfer ascending the ~ digits beginning at the LSL
specified in Field A to the Divisor -positions of rX
(Row 32, Bank 2). Transfer descending the ~ digits
beginning at the MSL specified in Field B to the Dividend
positions of Row 32, Bank 1. Divide. Transfer ascending
from the Quotient positions of Row 32, Bank 1 to the
~ locations beginning with the LSL specified in
Field C.
FUNCTION:
LABEL
LENGTH:
OPERAND 1
INC
FIELD A +
-
* '2
tD~
-_.
SPECIAL
(by
10
.
Divide Total Cost by Total Units, and store
the quotient in the eight location area
labelled UNI T.
OPERAND 1
INC
~ FIELD A +
- ,
* '2
~,
16
-
.. .
-
.. 8:
OPERArlD 2
~A FIELD B + INC
FIELD C
2D * 22
26 .- 2: 30
32
36 I
~'t.
I
+.\l.N:r.,
--
FI ELD A: ~ 6 is the decimal address of the LSL of Total Units
(the divisor).
FIELD B: J:l9 is the decimal address of the MSL of Total Cost
(the dividend).
~.. ~
(
/
\11
INC
~
-- .
/iO
I
~--
FIELD C:
+UNIT is the address of the LSL of the area assigned
to UNIT (the quotient).
NOTE:
If the divisor is equal to zero,
the quotient is all zeroes and
the remainder is all zeroes. If
the dividend is all zeroes, the
quotient is all zeroes and the
remainder is all zeroes. If the
dividend is all spaces, the quotient is all zeroes and the remainder is all spaces, If the
divisor is greater than the dividend, the quotient is all zeroes
and the remainder is the least
significant six digits of the
dividend.
In the event the sIze of the operands in the program are not
the
~
length required by the DV command, rX (Row 32, Bank 2)
can be used as a Divide Working Storage.
ferred to rX using a TX command.
of rX with space codes.
This fills the high order positions
A TA command is used to transfer the
divisor to rX as follows:
the divisor in memory;
The dividend is trans-
Field A specifies the LSL address of
Field C specifies $XR + 15; and Field B
specifies a location in rX based on the actual length of the programmer's divisor.
For example, if the actual length of the divisor
is 5 digits, the Field B address would be $XR + 11.
The high order
positions of the (ixed length dividend and divisor would then contain space codes. $XR + 7 can be used as the LSL of the fixed
length quotient produced by the DV instruction.
NOTE:
If rX is used as DWS, the locations indicated
above must be used for the divisor.
\,~
----,~-.~-~--
----
-~-~--
..
"
--~~---
Example 2
Given:
Problem:
A seven digit Total Revenue in card columns
11 through 17. A four digit Total Tons in
columns 5 through 8.
Divide Total Revenue by Total Tons and store
the maximum 7 digit quotient in a 7 location
area labelled RPT.
(,
\1~
4.13
INPUT OUTPUT INSTRUCTIONS
There are several types of input/output instructions 'in the
UNIVAC 1005 Assembly System.
Each type is tailored to the require-
ments and the operating mode of the input/output device.
One type of input/output instruction is used for the devices
which transfer data to or from fixed areas in memory reserved for
that purpose, or for commands to an input/output device which do
not involve a data transfer (eg. Space 1, Stacker Select, etc.)
This type
IS
called General Command.
Each of the devices which do not have a reserved area for
input/output data transfers has its own type of command (eg. Magnetic
Tape, DLT, etc.)
Each type is named for the device it controls.
In the case of the General Command, certain of the uses of
this command have been selected as Assembler pseudo-operations in
order to provide the programmer with a rapid method of specifying
often used commands.
These pseudo-operations are called Shortened
General Commands.
o
\1Lf,
4.13.1
SHORTENED GENERAL COMMANDS '
MNEMONIC:
LAbEL
1
MODE:
I/O
LENGTH:
7
IA:
NO
............ _....•...
~
•.. ~ ..... "
FUNCTION:
_--
-----OPFRAIJD ?
OPERAND 1
INC
FIELD C + INC
~ FIELD A + , ..
IiA FIELD B + INC
3) * 22
10 * 12
16 32
36 -l:k 40
26 .- 2: 30
~PERATION
5 6
•
(-
GCn
I
I
. I
I
I
~
Execute Reader, Printer and Punch input/output commands
specified by n, where n means the fOllowing:
1.
Read, Execute
2.
Test Punch, Punch, Clear
3.
Combines GCI and GC2
4.
Space 1, Print, Execute
5.
Combines GCI and GC4
6.
Combines GC2 and GC4
7. Combines GCI, GC2, and GC4
The GCn operations are pseudo-operation codes which select
specific Reader, Printer, and Punch operations from the structure
of the GC coded operations.
When any of the specific input operations
indicated above are required, the GCn may be used.
Fields A, B, and C must be blank, in the GCn instruction.
\l~
4.13.2 GENERAL COMMANDS
MNEMON IC:
GC
MODE:
I/O
LENGTH:
7
~_-~
~PERATION
LABEL
1
10
5 6
•
•
&t,
OPERAND 1
~ FIELD A + INC
*
12
16
~C
•
-_ - J __
2{)
I
IA:
NO
... _ .......... -'t"'!F'''''-''''N''._ ....... _ _ _
OPERA ID 2
FIELD B + INC
FIELD C -t INC
32
36 - 3: 40
26 -- 2: 30
* 22
~R
t:c.
I
I
1C.c..
. I
The bit positions of locations 2 through 7 of the GC instruction
correspond to functions of the UNIVAC 1005 input/output devices which
have an implied data address, or which do not require a data address.
A thorough knowledge of the various input/output devices of the UNIVAC
1005 is required for proper use of the GC command.
Since the desired input/output functions are indicated by bit positions
of the least significant six locations of the GC instruction, octal
coding is used to specify CC in Fields A, B, and C.
All three Fields
must be specified.
Octal coding is specified by the number sign (#) followed by four
octal digits.
The bit configuration for the required input/output
- operations is used to determine the four octal digits.
NOTE:
Caution should be exercised by the programmer to avoid
specification of bits which correspond to conflicting
input/output operations.
The following is a brief description of the input/output functi6nswhich
correspond to the bit positions in the GC instruction.
are listed by the type of function.
A table is also provided which indicates
the corresponding bit position in the GC instruction •
•
--~~-
-----~--~-~--
-~--.----
The functions
(.
CARD AND PAPER TAPE
Card Read
This bit sets the Read F.F.
read when Execute is given.
Auxiliary Card Read
This bit must occur in the same GC as Execute
to cause card reading••
Read Punch Read
This bit sets the Read Punch Read F.F. Read
will occur when Punch Hold or Punch Clear is
given.
Paper Tape Read-Block
Card will be
This bit must occur in the same GC as Execute.
Will cause the reading of 80 characters from
paper tape.
Paper Tape Read-Character
This bit must occur in the same GC as
Execute. Will cause the reading of I
character from paper tape.
End Read on All Bits This bit must occur in the same GC as Execute
and the bitswhich cause reading. During the
read, each character is tested for all I
bits. i~ ili8~ liI~iF&d...... If detected, reading
1 s term i nated.
Execute
This bit causes the devices to execute those
functions signalled, by various of the other
bits, either prior to or simUltaneous with
Execute.
PRINTING
Pr int
End Print at 90
Characters
(.
-
This bit sets the Print F.F. A line will be
printed when Execute is given.
This bit must occur in the same GC as Execute.
The Print function must be signalled prior to or
simultaneous with End Print.
Space 1
This bit will cause an immediate line space unless
accompanied by Print, Execute. When accompanied
by Print, Execute, the line is printed before
spacing occurs.
Space 2
This bit will cause two immediate line spaces
unless accompanied by Print, Execute. When accompanied by Print, Execute, the line is printed
before spacing occurs.
.'
..\11
Skip 1, 2 and 3
Any combi~ation of these three bits will
initiate an immediate forms skip unless
accompanied by Print, Execute. ~hen accompanied
by Print, Execute, the line is printed before
skip occurs.
CARD AND PAPER TAPE PUNCHING
Punch Hold
This bit causes an immediate punch cycle. The
punch storage area is n2i cleared following
punching.
Punch Clear
This bit causes an immediate punch cycle. The
~unch storage area is cleared following punchIng.
Punch Test
This bit causes a test to determine if the punch
storage area is still in use by the last punch
operation. If it is in use, further execution
of UNIVAC 1005 instructions is inhibited, until
not in use.
Punch Paper TapeBlock
Punch Paper Tape Character
Punch Odd ParityPaper Tape
This bit must occur in the same GC as Punch Hold·::or
Punch Clear. When accompanied by Punch Hold or
Punch Clear, it causes 80 characters to be
punched in paper tape.
This bit
. or Punch
or Punch
In paper
must occur in the same GC as Punch Hold
Clear. When accompan i ed by Punch Ho 1d
Clear it causes 1 character to be punched
tape.
If this bit occurs in the same GC which causes paper
tape punching, Odd Parity punching will occur.
PROCESSER INPUT/OUTPUT MODE
Code Image Read
This bit must occur in the same GC which causes
read i ng. When accompan·i ed by the bit or bits
which cause reading, it causes card and paper
tape reading in Code Image.
'Code Image Punch
This bit must occur in the same GC whioh causes
punching. When accompanied by the bit or bits
which cause punching, it causes card and paper
tape punching in Code Image.
c
CARD SELECTION
Punch Stacker Select
or
Punch Even ParityPaper Tape
Auxiliary Reader
Stacker Select 1
Auxiliary Reader
Stacker Select 2
If this bit occurs in the same GC which
causes ~ punching, it causes the card
being punched to be placed in the Select
Stacker on the next Punch cycle. If this
bit occurs in the sameGC which causes paper
tape punching, Even Parity punching will
occur.
This bit must occur in the same GC which
causes reading in the Auxiliary Reader. It
causes the previous card read to be placed in
Stacker 1.
This bit must occur in the same GC which causes
reading in the Auxiliary Reader. It causes
the previous card read to be placed in Stacker
2.
DATA LINE CONTROL
Request to Transmit
This bit sets a F.F. that requests data line
transmission. The F.F. must be set prior to
the execution of the instruction (SD) which
causes data transmission.
MAGNETIC TAPE CONTROL
Rewind Magnetic Tape
Back Space Magnetic
Tape
Erase Fl i p Flap
This bit causes an immedi-ate rewind of tape
on the Servo last set by the Set Condition
eSC) instruction.
This bit causes an immediate backward movement
of tape, to the preceding inter-record gap,
on the Servo last set by the Set Condition
eSC} instruction.
This bit causes the Erase F.F. to be set.
When the next write tape (WT) instruction is
executed, 5.04 inches of tape will be erased
prior to writing the block of tape.
c
\l~
c:
The bit positions which correspond to the previously listed
functions are shown in Figure ____ •
The bit positions are indicated
by the Location within the GC instruction, on the left hand side of
the name of the function.
On the right hand side of the function is
the value of the bit for octal coding purposes.
At the bottom of each
Value column is a box for indicating the sum of the circled values.
These boxes are identical to the position of the octal digits in
each of the fields of the GC source language instructlon.
o
\
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