3420_3803_MLM_Volume_4_Sep1979 3420 3803 MLM Volume 4 Sep1979
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Maintenance Library
3803-21
3420
3803-21
3420
3803-21
3420
3803-21
3420
SIN
SIN
SIN
SIN
MLM
MLM
MLM
MlM
PLAN
START
SENSE
MAP
INTF
MAP
OPER
00-000
1A-000
SA-XXX
18-000
S8-XXX
VOL. 1
..
07-000
CARR
1S-000
21-XXX
08-000
40-000
58-XXX
REF
MAP
75-001
85-XXX
11-000
1S-XXX
INST
90-000
INDEX
VOL. 2
VOL. 3
VOL_4
Magnetic Tape Subsystem
Maintenance Manual
3183-2/3420
27
I Seq
XGCIIII
1 of 2 1Part:.31
Number
©
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Hi.tory
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Copyright International BUlin ••• Machines Corporation 1976, 1979
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SAFETY
PERSONAL
The importance of personal safety cannot be
overemphasized. To ensure personal safety and the
safety .of co-workers, follow established safety
practices and procedures at all times.
CE SAFETY PRACTICES
16. Avoid touching moving mechanical parts when lubricating,
checking for play, etc.
17. When using stroboscope, iIo not touch ANYTHING - it
may be moving.
1B. Avoid wearing loose clothing that may be caught in mao
chinery. Shirt sleeves must be left buttoned or rolled above
the elbow.
19. Ties must be tucked in shirt or have a tie clasp (preferably
nonconductivel approximately 3 inches from end. Tie
chains are not recommended.
20. Before starting equipment, make certain fellow CEs and
customer personnel are not in a hazardous position.
21. Maintain good housekeeping in area of machine while per·
forming and alter completing maintenance.
All Customer Engineers afe expected to take every safety
precaution possible and observe the following safety prac·
tices while maintaining IBM equipment:
1. You should not work alone under hazardous conditions
or around equipment with dangerous voltage. Always
advise your manager if you MUST ",ark alone.
2. Remove all power, ae and dc, when removing or assembling major components, working in immediate areas of
power supplies, performing mechanical inspection of pow·
er supplies, or installing changes in machine circuitry.
3. Alter turning off wall box power switch, lock it in the
Off position'or tag it with a "Do Not Operate" tag, Form
229-1266. Pull power supply cord whenever possible.
4. When it is absolutely necessary to work on equipment
having exposed operating mechanical parts or exposed
live electrical circuitry anywhere in the machine, observe
the following precautions:
a. Another person familiar with power off controls must
be in immediate vicinity.
b. 00 not wear rings, wrist watches, chains, bracelets, or
metal cuff links.
c. Use only insulated pliers and screwdrivers_
d. Keep one hand in pocket.
e. When using test instruments, be certain that controls
are set correctly and that insulated probes of proper
capacity are used.
f. Avoid contacting grourid potential Imetal floor strips,
machine frames, etc.l. Use suitable rubber mats, purchased locally if necessary.
5_ Wear safety glasses when:
a. Using a hammer to drive pins. riveting, staking, etc.
b. Power Or hand drilling, reaming, grinding, etc.
c. Using spring hooks, attaching springs_
d. S'oldering, wire cutting, removing steel'bands.
e. Cleaning parts with solvents, sprays, cleaners, chemicals, etc.
f. Performing any other work that may be hazardous to
your eyes. REME'MBER - THEY ARE YOUR EYES.
6. Follow special safety instructions when performing specialized tasks, such as handling cathode ray tubes and extremely
high voltages. These instructions are outlined in CEMs
and the safety: portion of the maintenance manuals_
Look for and obey the DANGER notices found in the
maintenance documentation. All CEs must be familiar
with the general safety practices and the procedures
for artiticial respiration'outlines in IBM Forhl 229-1264.
For convenience, this form is dupl~cated to the right.
MACHINE
To protect machines from damage, turn off power
before removing or inserting circuit cards of
components. Do not leave internal machine areas
needlessly exposed, avoid shoring panel pins when
scoping, and handle machine parts sarefully, in
addition, look for and observe the CAUTION notices
found in maintenance documentation.
Knowing safaty rul .. is not enough.
An unsafe act will inevitllbly lead to an accident.
Usa good judgrnant . eliminata unsafe acts.
ARTIFICIAL RESPIRATION
General Considerations
1. Start Immediately - Seconds Count
Do not move victim unless absolutely necessary to remove
from danger. Do not wait or look for help or stop to
loosen clothing, warm the victim, or apply stimulants.
2. Check Mouth for Obstructions
Remove foreign objects. Pull tongue forward.
3. Loosen·Clothing'- Keep Victim Warm
Take care' of these items after victim is breathing by him~
self or wl>en "elp is available.
4: Remain in Position
Aher victim revives, be'ready to resume respiration if
necessary .'
5. Call a Doctor
Have someone summon medical aid.
6. Don't Give Up
Continue without interruption until victim is breathing
without help or is certai!1ly dead.
Rescue Breathing for Adults
7. Do not use solvents, chemicals, greases, or oils that have
not been approved by IBM_
8. Avoid using tools or test equipment that have n,ot been approved by IBM.
9_ Replace worn or broken tools and test equipment.
10. Lih by standi'ngor pushing up wi,th stronger lee muser!!sthis tak'''' sttllin Otf liack muscles. Do not ntt ahy equ'ipment or parts weighing over 60 pounds.
11. A her maintenance, restore all safety deviCes, such as guards,
shields, signs, and grounding wires.
12. Each Customer Engineer is responsible to be,certain that
no action on his part renders products unsafe or exposes
customer personnel to hazards.
13. Place removed machine covers in a safe out-of-the-way
place where no one can trip over them.
14. Ensure'that all machine covers are in place before returning
machine to customer.
15. Always place CE tool kit away from walk areas where no
one can trip over it; ,,1or example, u~~r desk or table.
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tion.
Thumb and
finger positions
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Place victim on his back immediately.
'Clearlh;o"l' of water, food, or foreign matter_
Tilt hllad !;lack to ope!, a,ir passage.
Lilt jaW upto'keep tongue out of air passage.
Pinch, ~bst.ilstQ preveni air leakage when you blow.
Blow until you see chest rise.
Remove your lips and allow lungs to empty.
Listen for snoring and gurglings - signs of throat obstruc·
9. Re"".t mouth to mQuth breathing 10-20 times a minute.
Continue rescue breathing until victim breathes for himself.
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Final rnouth·to·
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40-000
VOLUME 4 CONTENTS BY SECTION
For subject details or subjects not found in this table of contents. refer to
the general INDEX section in this volume.
SECTION 40
Subsystem Concepts . . . . .
Subsystem Recording Methods
3803-2 Controls .
3803-2 Features.
Tape Commands
(/
40-001
40-002
40-003
40-004
40-005
SECTION 50
Channel Buffer Circuits
Write Circuits . . .
Read Circuits . . .
MP1 /MP2 Circuits
ROS Circuits
6250 bpi . . . . .
50-000
50-001
50-002
50-003
50-010
50-020
SECTION 52
Microprocessor Clocks
MP1 Instruction Counter
Local Storage Register
XOUTA/XOUTB Registers
High/Low Order ROS Registers
D and Special MP1/2 Registers
Channel Tag In/Bus In Registers
TUBO Registers . . . . . .
Microprocessor Information
Microprocessor Instructions
52-005
52-010
52-015
52-025
52-030
52-035
52-040
52-045
52-060
52-065
SECTION 53
Oscillator . . . . . . . . .
Read/Write Counters/Clocks.
Data Flow Clock
Write Clock/Counter
Write Group Buffer .
Channel Buffer Controls
CRIC/CROC . . . . .
Write Service Controls .
Miscellaneous Write Registers
Read Sequencing and A/B Registers
CRC Generators. . .
Write Triggers . . .
Read Track Register .
RIC/ROC . . . . . .
Skew Detection . . .
Group Buffer Counter
Read Cycle Controls
53-005
53-010
53-015
53-020
53-025
53-030
53-035
53-040
53-045
53-055
53-065
53-070
53-075
53-080
53-085
53-090
53-095
SECTION 54
Interface . . . . . .
Command Typing . .
Selection and Priority
54-000
54-001
54-005
SECTION 55
LWR (Loop Write Read) . . . . .
Basic Recording Technique
Common Microprogram Routines .
55-005
55-007
55-020
SECTION 57
NRZI . . . . . . .
Translate . . . . .
Write Data Convert
Read Data Convert
57-006
57-020
57-025
57-026
SECTION 58
S/360. S/370 Switching
Two Channel Switch
Tie Breaker . . . . . .
Device Switching . . .
Inbound Crosspoint Switching
58-005
58-010
58-030
58-050
58-101
SECTION 75
CE Panel Information
. .
75-001
SECTION 80
Tools and Test Equipment
80-000
SECTION 85
PM Procedures and Schedules
85-000
SECTION 90
Installation . . . . . . . . .
90-000
INDEX
Detailed Index (Volumes 1 through 4)
. INDEX 1
40-000
©
Copyright International Business Machines Corporation 1976, 1979
40-001
OPER-SUBSYSTEM CONCEPTS
READ BACK CHECKING
BASIC SUBSYSTEM
The IBM 3803-2/3420 Magnetic Tape Subsystem
consists of an IBM 3803 Model 2 Tape Control and one
or more IBM 3420 Magnetic Tape Units. The 3420 tape
units are available in six models with tape speeds of
75, 125, and 200 inches per second (ips)
(190,5/317,5/508 em/sec) for Models 3 and 4, 5 and 6,
and 7 and 8, respectively.
The 3803 Model 2 operates in 6250 bpi and 1600 bpi
modes.
1.
The number of sense bytes and contents of those
bytes differ from those used by 2400-series
subsystems.
2.
All commands not shown on 40-005 and 40-008
set COMMAND REJECT in the sense information
which, in turn, sets Unit Check in the status byte,
indicating to the system that something is wrong.
3.
A sense command must be issued after an error
condition sets Unit Check in the unit status byte.
In most instances, non-time dependent programs that
operate successfully on an IBM 2400-series tape
subsystem will operate correctly on an IBM
3803-2/3420 subsystem.
3420 TAPE UNIT
Information presented in this section applies to all
models of the tape unit.
With compatible features, 3420 Models 3, 5, and 7 can
be attached to the 3803-2 without modification.
I
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Interface
Device
I
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. CONTROL UNIT
i
Channel
Buffer
I
50-000 I
Interface
-
Channel
;..---
Two·Channel
Switch (Feature)
58-010
-
Tape Unit
I
Dataflow Section
50-001 & 50-002
I
MPl
50-003
_______
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I
-1-I
MP2
50·003
-
_______
Device Switch
(Feature)
58-050
Maintenance (CE) Section
75-001
Subsystem Limits
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Tape Unit
I
Tape Unit
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3803/3420 Subsystem Schematic
AUTOMATIC THREADING
TAPE TRANSPORT
A write reel latch secures the file reel to the reel hub
automatically. When the operator places a file reel or
cartridge on the reel hub and presses LOAD/REWIND,
the power window closes, the write reel latch secures
the file reel to the hub, and tape is automatically
threaded, loaded into the vacuum columns, and
positioned at load point without further operator action.
A single direct-drive capstan moves tape forward or
backward. Air bearings reduce friction and tape wear
since the oxide (recording) surface of the tape contacts
only the read/write head and the tape cleaner. Short,
tapered vacuum columns greatly reduce tape inertia
when starting and stopping tape. The tapered columns
and single, direct-drive capstan start and stop tape
quickly and smoothly.
I BM Easy load cartridge
When used with a solid-flange tape reel (standard IBM
10.5 inch), the optional, IBM Easy Load Cartridge
reduces tape handling and helps prevent tape
contamination or physical damage.
During a load operation, if the first threading sequence
is unsuccessful, tape is rewound into the cartridge and
another attempt is made.
A two-gap read/write head with 0.150 inch (3,81 mm)
between read and write gaps allows read back
checking during a write operation. Moving forward,
tape passes first the write gap, then the read gap.
FULL-WIDTH ERASURE
--------.---------
A 3803 tape control without any switching features
controls up to eight 3420 tape units (1 x8 configuration,
also called selection logic).
The 3803 command set, status responses, and basic
sense data are compatible with those used by IBM
2400-series tape subsystems. However, there are some
minor programming differences. For example:
:..:.:.:
':,:':':,:':,:
dial
REWINDING
Tape remains in the vacuum columns during rewind
operations. Rewind ends when a photocell senses a
) reflective marker on
beginning-of-tape (load point) reflective marker on
tape.
During a rewind unload operation, tape is rewound
completely onto the file reel. The tape unit is left in
unloaded status, with the tape reel latch unlocked and
the window open, allowing the operator to remove the
file reel.
An erase head applies a strong magnetic field that
erases the entire width of tape during write operations.
Full-width erasure prevents interchangeability problems
when tape is written on one tape unit and read on
another; it also reduces the chances of leaving
extraneous bits in interblock gaps or skip areas.
During a write, write tape mark, or erase operation, the
tape unit monitors the erase head operation. On a 3420
Model 4, 6, or 8, an erase head failure drops tape unit
ready status and halts tape motion. On a 3420 Model
3, 5, or 7, an erase head failure sets Unit Check, but
does not drop ready status.
FILE PROTECTION
A write enable ring must be present in the file reel
when writing. To avoid destroying information on tape,
the write enable ring is removed. A reel without the
ring is "file-protected". FILE PROTECT turns on when
the reel is mounted and no writing can occur.
3420 MODELS 4, 6, AND 8
Models 4, 6, and 8 tape units can write and read 6250
bpi tapes with 0.3-inch interblock gaps. Nominal da~a
rates are 470, 780, and 1250 kilobytes per second at
6250 bpi.
A tape cleaning mechanism is added.
3420 Models 3, 5, and 7 can be converted in the field
to Models 4, 6, and 8.
40-001
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OPER-SUBSYSTEM CONCEPTS (Cont'd)
RECORDING METHODS
6250 BPI
In 6250 bpi mode, 6250 data bytes per inch (246 data
bytes per mm) are recorded in nine parallel tracks on
tape. 6250 bpi tapes are written with an identification
burst (10 burst) in track 1 at load point. The 10 burst is
followed by a control burst and a 0.3-inch (7,62 mm)
IBG before a data block is written.
6250 bpi is a basic density on 3803 Model 2 and on
3420 Models 4, 6, and 8.
6250 BPI ERROR CORRECTION
The 6250 bpi format employs an
error-correcting/ detecting code capable of correcting
all single-track errors on the strength of the code alone
and correcting all double-track errors with the aid of
track pointers. Pointers such as phase error and
incorrect pattern are indications of questionable data. If
the errors fall outside the code capability, Data Check
and Unit Check are set and Error Recovery Procedures
(ERPs) are invoked.
1600 BPI
In 1600 bpi mode, 1600 bytes per inch (63 bytes per
mm) are recorded in nine parallel tracks on tape. The
data format uses eight of the nine bits for data, the
ninth is a parity bit. Data is recorded in odd parity. The
eight bits of one byte can represent an alphabetic
character, zoned decimal digit, two decimal digits
(packed), a special character, or eight binary bits.
1600 bpi is a basic density on the 3803 Model 2 and on
3420 Models 3, 5, and 7, and a feature on 3420 Models
4,6, and 8.
NINE-TRACK NRZI
In nine-track NRZI, data is recorded at 800 bpi (31,5
bytes per mm) in nine parallel tracks on tape. Data
representation is the same as for 1600 bpi PE. For
nine-track NRZI operation, the dual density feature is
required on a Model 3, 5, or 7 tape unit and the
nine-track NRZI feature is required on a 3803 Model 2.
40-002
SEVEN-TRACK NRZI
In seven-track NRZI mode, data is recorded at 200,
556, or 800 bpi (7, 6/21, 9/31, 5 bytes per mm). The
data format uses six of the seven bits for data and the
seventh bit for parity checking. Data is recorded in
either odd or even parity. The six bits of one character
can represent a BCD character or six binary bits. For
seven-track NRZI operation, a seven-track feature is
required on both a 3420 Model 3, 5, or 7 and on the
3803-2.
INTERBLOCK GAP
An interblock gap (lBG) is the erased section of tape
used to indicate the end of a block or record.
Interblock gaps are:
6250 bpi:
Nine-track
PE/NRZI:
Seven-track:
3420 SUBSYSTEM CHARACTERISTICS
Model 3
ModelS
ModelS
Model 7
ModelS
Tape Speed (Read or Write)
(ips)
(em/sec)
75
75
125
125
200
200
190,5
190,5
317,5
317,5
508
508
4.0
4.0
2.9
2.6
2.0
1.65
6250 Read Access Time, nominal*(ms)
1600 Read Access Time, nominal*(ms)
2.3
6250 Write Access Time, nominal*(ms)
1.6
2.1
1.1
1.5
0.95
1600 Write Access Time, nominal*(ms)
4.0
3.0
2.9
2.0
2.0
1.28
Forward Start Time, nominal**(ms)
1.8
1.4
1.4
1.1
1.3
.08
Data Rates (Kb/sec; Kd/sec):
6250 BPI
0.3 inch (7,6 mm) nominal.
0.6 inch (15,2 mm) nominal;
0.5 inch (12,7 mm) minimum.
0.75 inch (19,05 mm) nominal;
0.68 inch (17,27 mm) minimum.
Model 4
470/940
1600 BPI PE
120/240
800 BPI NRZI (9-Track)
60/120
120/240
780/1560
200/400
200/400
100/200
1250/2500
320/640
800 BPI NRZI (7-Track)
60
100
160
556 BPI NRZI (7-Track)
41.7
69.5
111.2
25.0
40.0
200 BPI NRZI (7-Track)
15.0
320/640
160/320
Passing Times per Byte (,..sec):
6250 BPI
2.133
1.28
0.80
1600 BPI PE
8.3
MAGNETIC TAPE AND REELS
800 BPI NRZI
16.7
556 BPI NRZI
24.0
14.4
9.0
Most tape volumes that operate satisfactorily on 3420
Models 3, 5, and 7 will operate with equal or better
read/write reliability for an equivalent number of bytes
transferred on 3420 Models 4, 6, or 8. Tape must
conform to IBM Half-Inch Tape Specifications, GA32-0006.
200 BPI NRZI
66.7
40.0
25.0
8.3
5.0
5.0
10.0
3.1
3.1
6.2
Passing Times, IBG (ms):
6250 BPI
4.0
9-track (PE and NRZI)
8.0
7-track (NRZI)
10.0
Rewind Time (2400-foot reel)
8.0
2.4
4.8
4.8
1.5
3.0
3.0
3.75
6.0
60
60
60
60
45
45
66
66
66
66
51
51
10
10
10
10
7
7
Rewind/Unload Time:
(2400-foot reel) (sec)
Load Operation, approximate time (in sec.) to
'tape unit ready' (after reel/cartridge is mounted
and LOAD/REWIND is pressed)
.
Read access time is the interval from initiation of a Forward Read command given to the tape control when tape is not at load point,
until the first data byte is read when tape is brought up to speed from stopped status.
Write access time is the interval from the issuance of a Move command given to the tape unit when tape is not at load point, until the
first data byte is written on tape when tape is brought up to speed from stopped status.
*.
Start time is the interval from the issuance of a Move command to the tape unit, until tape attains 90% of specified velocity.
3803-2/3420
© Copyright International Business Machines Corporation 1976, 1979
40-002
40-003
OPER-3803 MODEL 2 CONTROLS
3803 MODEL 2 TAPE CONTROL
ADDRESSING
The 3803 Model 2 Tape Control connects to the I/O
interface of an IBM System/360 Model 50 and above
(by RPQ only) or an IBM System/370, Model 135 and
above. The tape control has a CE panel. two
microprogram control sections, a read section, a write
section, and a channel buffer section.
Every tape unit has a unique device address, which
consists of a channel address, a tape control address,
and a tape unit address. Pluggable jumpers assign the
tape control address when the system is installed. The
tape control has separate device interface connectors
for each tape unit address. A tape unit's address is
determined by the tape control connector to which it is
attached. There is no address decoding at the tape unit
or device interface level.
Note: "I/O Inte.rface" refers to a set of lines over
which the tape control and system channel exchange
control and data signals. Interface lines and operations
are described in IBM System/360 and System/370 I/O
Interface, Channel to Control Unit, Original Equipment
Manufacturers' Information, Order Number GA22-6974.
The 3803 may exceed an interface signal sequence of
32 microseconds, and may produce a worst case
interface signal sequence of up to 50 microseconds on
some instructions when in seven-track mode with the
two-channel switch feature installed.
The 3803 Model 2 operates at 6250 or 1600 bpi. The
3803 Model 2 with appropriate features can process
nine-track, 800 bpi NRZI and seven-track, 200/556/800
bpi NRZI tape when used with 3420 Model 3, 5, and 7
tape units having the companion NRZI features.
All data transfers are in burst mode. The tape control
executes one command on one tape unit at a time. The
tape control parity checks each data byte transferred
between the system and a tape unit. On write
operations, bus out parity is checked and parity is
generated, if necessary, before the byte is sent to the
tape unit. On read operations, tape control parity is
checked and generated, if necessary, before the byte is
placed on the I/O interface. On sense operations,
correct parity is supplied for each byte. Parity is also
checked on command bytes.
I/O commands issued by the channel are executed with
microprograms resident in two independent read-only
storage (ROS) units. One ROS unit controls
communication lines to the channel, while the other
ROS unit controls communication lines to the tape unit.
3803-2/3420 CONFIGURATIONS
Operation with Model 4/6/8 Tape Units (6250 or 1600 bpi
Mode and Models 3/5/7 1600 bpi Tape Units
Operation with Model 4/6/8 Tape Units (6250 or 1600 bpi
Mode) and Model 3/5/7 Tape Units (1600 bpi PE and 800
NRZI Modes)
3803 Model 2
Tape Control
3803 Model 2
Tape Control
Nine Track N RZI Feature
METERING
A usage meter is installed in the tape control and in
each tape unit. The tape control's usage meter records
elapsed time whenever the METERING OUT line is
active and the tape control is in online status (Enabled).
A tape unit's usage meter records elapsed time when
the tape control METERING OUT line is active, tape
unit is loaded, and the tape is not at load point.
METERING IN is used by the central processing unit
(CPU) metering circuits; this line is active from the time
a command is accepted by the tape control until Device
End is generated for that command. See IBM
System/360 and System/370 I/O Interface: Channel to
Control Unit OEM I, Order Number GA22-6974.
ENABLE/DISABLE SWITCH
This switch allows the tape control and all attached
tape units to be put online or taken offline so a
customer engineer can use the CE panel switches and
indicators to diagnose errors. Whenever the tape
control is placed in offline status (Disabled), the usage
meters in the tape control and all attached tape units
are prevented from running. When the two-channel
switch feature is installed, a second Enable/Disable
switch is provided on the 3803.
Mod
6
6250 or 6250/1600
6250 or 6250/1600
Single Density (1600)
Dual Density (1600/S00)
Operation with 3420 Model 4/6/8 Tape Units (6250 or
6250/1600 bpi Modes) and Nine and Seven Track Tape Units
(Nine Track 1600 bpi PE and Nine Track 16oo/S00 bpi and
Seven Track 2OO/556/SOO bpi NRZI Modes)
3803 Model 2
Tape Control
Seven Track Feature
POWER ON/OFF SEQUENCING
Normal power on/ power off sequencing for the
3803-2/3420 tape subsystem is controlled by system
power interlock circuits. Maintenance activities may
necessitate dropping power in the tape control and
attached tape units while power remains on in the
system. To take the subsystem offline, see 12-010.
Single Density (1600)
Dual Density (1600/S00)
MJU(tM lJM Qf 8JAP~ NITS-PER T APE-CONTRObFor 3420 Model 8 Power Requirements. see 90-1S0.
3803-2/3420
40-003
© Copyright International Business Machines Corporation 1976, 1979
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40-004
OPER-3803 MODEL 2 FEATURES
3803 MODEL 2 FEATURES
DENSITY FEATURE COMBINATIONS
Features available on a 3803 Model 2 are nine-track
NRZI, seven-track (NRZI), two-channel switch, and
device switch. For switch feature descriptions, see
Section 58-005 through 58-111.
6250. 9-Track
Not Applicable
Standard
Not Applicable
6250 Feature
1600.9-Track
Standard
Standard
1600 Feature
6250/1600 Feature
NINE-TRACK NRZI
800. 9-Track
Dual Density Feature
9-Track NRZI Feature
Dual Density Feature
Not Applicable
The nine-track NRZI feature, available on the 3803
Model 2, permits operation in nine-track NRZI mode.
Nine-track NRZI operation requires a 3420 Model 3. 5,
or 7 Tape Unit with the dual density feature.
(
Density (bpi)
(Note 1)
3803-1
3803-2
3420-3/5/7
(Note 2)
3420-4/6/8
(Note 3)
800. 7-Track
7-Track Feature
7-Track Feature (Note 4)
7-Track Feature
Not Applicable
556, 7-Track
7-Track Feature
7-Track Feature (Note 4)
7-Track Feature
Not Applicable
200, 7-Track
RPQ only
7-Track Feature (Note 4)
7-Track Feature
Not Applicable
Notes:
1. Density must be specified for each 9-track 3420 tape unit.
SEVEN-TRACK NRZI
2. 3420-3/5/7 can be operated by a 3803-1 or 3803-2.
The seven-track feature permits operation in
seven-track NRZI mode. Seven-track operation with a
3803 Model 2 is at 800/556/200 bpi. The seven-track
feature contains both the data translator and data
converter for seven-track operations. The operation is
similar to that of the 3803-1 with the seven-track
feature. For seven-track operation, the seven-track
feature on a 3420 Model 3, 5, or 7 and on the 3803
Model 2 is required. The nine-track NRZI feature is a
prerequisite for the seven-track feature on the 3803
Model 2.
3. 3420-4/6/8 can be operated by a 3803-2 only.
4. 9-track NRZI feature is a prerequisite for 7-track feature on 3803-2.
Writing a tape with the translator on causes eight-bit
bytes from the I/O interface to be written on tape as
six-bit BCD characters; reading such a tape causes
six-bit BCD characters to be translated into their
EBCDIC equivalents. When using the translator, data
rates are not changed and there are no changes in the
tape unit's operation.
Writing a tape with the data converter on causes four
tape characters (24 data bits) to be written for every
three storage bytes (24 data bits); reading such a tape
reverses the process by converting four tape characters
into three storage bytes. When operating with the data
converter on, the data transfer rate is 75 percent of the
rate with data converter off.
3803-2/3420
8459&8
1. Sep 79
© Copyright International Business Machine. Corporation 1976. 1979
40-004
OPER-TAPE COMMANDS'
,
."
40-.005
.,.
COMMANDS AND INSTRUCTIONS
* indicates the logical record on which problems
may occur.
COMMANDS
Commands executed by this subsystem fall into one of
the following three categories:
1.
Burst Commands
2.
Motion Control Commands
3.
Non-Motion Control Commands
Write is allowable following a backspace. Assume the
following tape format with labels where * is used to
denote a TM:
VOL HDR
The 'table on thispage and the one on 40-008 list the
subsystem commands and command codes,
,
Commands not listed will set COMMANO REJECT. '
Prog~amming Note: The 3803/3420 subsystem has no
interlocking to prevent improper sequencing of writeand read-type operations that may result in writing
extraneous. bits or leaving partial blocks on tape.
Avoiding these improper sequences is a program
responsibility.
* DATA SET *
EOF
A write-type operation after a forward read-type
operation except:
a. When the block or Tape Mark (TM) read is
known to be followed by a TM. A tape mark is
a special block used to separate files.
b. When the block or TM read is known to have
been followed by erase record gap (ERG) oris
known to have been the last block written
before a backward operation.
A rewrite of the last data set involves the following
safe and proper sequence. After processing the next to
last end of file (EOF) and TM. read foward to verify the
header (HOR) lal)el of the last data set. backspace.
write a new HDR. an~ rewrite the data set. If a new
data set is being added. the read forward verifies the
second consecutive TM. and thus. the true end of a
data set on this tape. A backspace. write new HDR.
etc.• completes the sequence.
Burst Commands
0 1 234 5 6 7
Write
0 0 0 0 0 0 0 1 01
Read Forward
0 0 0 0 0 0 1 0
02
Read Backward
0 0 0 0 1 1 0 0
OC
Sense
0 0 0 0 0 1 0 0
04
Sense Reserve
1 1 1 1 0 1 0 0
F4
Hex
Sense Release
1 1 0 1 0 1 0 0
04
Request Track-hi-Error
0 0 0 1 1 0 1 1
1B
Loop Write-To-Read
1 0 0 0 1 0 1 1 8B
For example: R R W* avoid.
W B R W* allowed.
Set Diagnose
0 1 0 0 1 0 1 1 4B
A read forward-type operation following write-type
operations.
Motion Control Commands
0 1 2 3 4 5 6 7
Command Byte
2.
o
1 1 1
Hex
Rewind
0 0 0 0
For example: R B W.R* avoid.
W B R R* avoid.
Rewind Unload
0 0 0 0 1 1 1 1 OF
Erase Gap
0 0
W indicates a write-type operation: write. write
TM. or (ERG).
Write Tape Mark
0 0 0 1 1 1 1 1
Backspace Block
0
R indicates .a forward read-type operation: read
forward. forWard space block. or forward' space
file.
B indicates a backward .read-type operation: read
backward; backspace block. or backspace file.
o
o
o
1 0 1 1 1
1 0 0 1 1 1
07
17
1F
27
Backspace File
0
1 0 1 1 1 1
2F
Forward Space Block
0 0 1 1 0 1 1 1
37
Forward Space File
0
Data Security Erase
1 0 0 1 0 1 1 1 97
o
1 1 1 1 1 1
Non-Motion Control Commands
No-Operation
0
Diagnostic Mode Set
0 000 1 0 1 1
Mode Set 1
See 40-008
Mode Set 2
See 40-008
o
READ BACKWARD
Hex
0 0 0 0 1 1 03
OB
Read Backward sets the tape unit to backward read
status. The operation of the command is similar to
Read Forward. except that the 7-track NRZI data
converter mode cannot be used. Data flow and
controls are the same as in Read Forward. A Read
Backward. given at load point or into load point. sets
Unit Check. The tape unit remains in backward status
at the end of a Read Backward command.
BURST COMMANDS
* HDR * DATA SET * EOF **
Command Byte
Avoid the following two basic sequences:
1.
Because it may be difficult or impossible to ensure the
above safe situations. a write after read forward
sequence should be used only in applications where
strict control of format and command sequence exists.
Command Byte
0 1 234 5 6 7
Burst commands transfer data across the channel/tape
control interface. Channel End and Device End are
signaled when the operation is complete (ending
status).
The burst commands are:
Write
Read Forward
Read Backward
Sense
Sense Reserve
Sense Release
Request Track-In-Error
Loop Write-To-Read (maintenance aid*)
Set Diagnose (maintenance aid*)
* Diagnostic programs issue maintenance aid
commands via start I/Os (SIOs) that are
op-codes in the Channel Command Word (CCW).
SENSE
Sense transfers the sense bytes to channel. There are
24 bytes of sense data available. The CCW specifies
the number of sense bytes to be transferred and the
starting storage address. The information transferred
includes unusual conditions associated with the last
operation and provides details about the current
conditions present in the tape control and tape unit. A
sense command addressed to a tape unit that is not
ready will be executed.
SENSE RESERVE
Sense Reserve reserves the addressed tape control for
the channel issuing this command. The tape control
will remain reserved for the channel until either:
A Sense Release command is issued from the
reserving channel. or
•
WRITE
Write records data on tape as it moves forward and
creates an interblock gap (lBG) at the end of each
block. The tape control checks the parity of each data
byte received from the I/O interface.
A system reset occurs.
Attempting to select a tape control that is reserved to
another channel results in a Control Unit Busy
indication. The Sense Reserve command should only
be issued by the Control Program.
. READ FORWARD
Read .Forward sets the tape unit to forward read status.
As the tape moves. data is read until the read head
detects the next IBG. The tape' control checks and. if
necessary and possible. corrects the bits of each byte
transferred to the I/O interface. Sensing a tape mark
sets. Unit Exception with Channel End and Device End
in the Unit Status byte ..
3F
40::005
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40-006
OPER-TAPE COMMANDS (Cont'd)
SENSE RELEASE
LOOP WRITE-TO-READ (LWR)
Inhibit Postamble
Sense Release releases the reserved tape control so it
is available to either channel. The Sense Release
command should only be issued by the control
program.
Loop Write-to-Read checks the tape control and tape
unit data and control paths without moving tape. In
6250 or 1600 bpi mode, LWR writes and error checks
the record. In NRZI mode, LWR writes the record but
checks only for Write Trigger VRC errors. Read errors
will occur during the NRZI operation but will be reset
by ALU2 when the LWR operation is completed.
Prevents writing the last 39 zeros of the postamble.
The ending all-ones marker and the first zero is written.
Programming Note: Sense Reserve and Sense
Release commands can only be used on subsystems
having the two-channel switch feature. If these
commands are issued to a tape control without this
feature, COMMAND REJECT results. When using these
commands, they must be the first command in a chain
or COMMAND REJECT results.
The Sense Reserve and Sense Release commands are
not supported by IBM Operating Systems.
REQUEST TRACK-IN-ERROR (REQUEST TIE)
Request TI E returns to the tape control a data byte
containing track-in-error information for 9-track and
sensing level information for 7-track tape units. This
information is transmitted to the channel in sense byte
2 on a Sense command following a Read, Read
Backward, Write, or Loop Write to Read command.
When issued following a 6250 bpi or PE operation,
Request TIE is treated as a No Operation (NOP Reset
Sense.
When issued following a 9-track NRZI read operation, a
Request TIE either:
LWR does not require the tape unit to be in write
status, but the tape unit must be ready. Execution of
an LWR does not change the status of the tape unit.
An LWR performed from the processing unit uses the
same data path as a Write command.
SET DIAGNOSE '4B'
Set Diagnose is used to call microdiagnostic routines.
Bytes are transferred from channel to the tape control
to modify the operation of succeeding commands in
the chain.
FLAG BYTE 1
Bit
Write
Read
Two bytes (flag bytes 3 and 4) are sent to the tape
control unit. These bytes are used to control the wait
time before starting the next operation in the chain
following the Set Diagnostic (48) command.
103.15 Microseconds to decrement one count.
27
Milliseconds to decrement the low order
counter 256 ('FF) counts and cause one
decrement of the high order count.
Inhibit Preamble
Prevents writing the first 39 zeros of the preamble. The
last (40th) zero and the beginning all-ones marker is
written.
Loop Write-To-Read
N/A
N/A
IBG Measure
2
Inhibit Postamble
Read Access
Does not enable the tape control to perform a
correction read operation if the data byte contains
bits 6 and 7, which indicate an uncorrectable error.
3
Var Go-down Time
Var Go-down Time
4
Inhibit Preamble
N/A
Change Direction
5
LWR
DMR
6
TUBO Mask
N/A
7
Change Direction
Change Direction
Change Direction allows the following word (CCW)
chain to progress through turnaround, if necessary, and
up to the point of activating the Move line to the tape
unit. At this point, the operation is terminated. The
tape unit is left in forward or backward, write or read
status, depending on the operation follow the Change
Direction instruction.
Clipping levels are cyclically altered in this way as long
as read attempts result in Vertical Redundancy Check
(VRC) errors.
Block Data Check
1
N/A
2
Block Interrupts
3
4-7
Force Control Unit Busy
N/A
FLAG BYTE 3 (OPTIONS)
DMR
Go-Up Time in tack pulses
GDT
Hi order byte of go-down count
TUBO Mask
Byte used to mask TU Bus Out
FLAG BYTE 4 (OPTIONS)
DMR
Go-down time measure count equivalent to tach
pulses. No tach pulse when tape is not moving.
GOT
Lo order byte of go-down count.
Flag byte 3 is used as a mask to control the tape unit
Bus Out. Any bit on in flag byte 3 causes that tape unit
Bus Out bit to be held active, and thus prevents the
tape unit from writing data for that specific bit.
Diagnostic Write
Performs the same function as the 'OB' command.
0
Set TUBO Mask
1
Diagnostic Write
Description
Write data is sent to the tape unit. In the MST board it
is gated to the read circuits and then returned to the
tape control unit for read checking.
0
Second attempt-Middle Level
Third attempt-Low Level
Fourth attempt-High Level
Bit
Count values are:
Enables the tape control to perform a correction
read operation if the data byte contains a single
bit, or
When issued following a 7-track read operation, the
Request TIE byte controls the read clipping level in the
following sequence:
©
On 9-track 3420 tape units, a LWR command issued at
beginning-of-tape (BOT) is executed in 1600 bpi mode.
Elsewhere on tape, LWR is executed in the current
operating mode of the tape unit.
Variable Go-down Time
FLAG BYTE 2
PE - causes writing to be inhibited in any track
when the write data contains successive one bits.
NRZI -
9 track - Inhibits writing P bits.
7 track - Inhibits writing C bits.
40-006
Copyright International Business Machines Corporation 1976. 1979
OPER-TAPE COMMANDS (Cont'd)
40-007 .
MOTION CONTROL COMMANDS
ERASE RECORD GAP (ERG)
Motion control commands move tape but do not
transfer information across the channel/tape control
interface.
Erase Record Gap causes the selected tape unit to
move tape forward and erase tape as follows:
Single ERG
All motion control commands operate as follows:
1.
2.
3.
Channel End is signaled when the command is
accepted (initial status).
For commands other than Rewind/Unload, device
end is signaled when the operation is completed
(ending status).
The tape control responds with BUSY if the tape
control is addressed while executing the command.
As a result, the 3803 is obligated to present a CUE
interrupt to the channel that received the BUSY as
soon as the current operation is complete.
Note: For Rewind/Unload, Channel End is signaled in
initial status, and Device End, Control Unit End, and
Unit Check are signaled in an interrupt status cycle
after the command becomes effective at the tape unit.
Device End is signaled again when the operator reloads
tape, presses START, and the tape unit goes from
not-ready to ready providing the tape control has not
been offline in the interim.
Motion control commands are:
Rewind
Rewind/Unload
Erase Gap
Write Tape Mark
Backspace Block
Backspace File
Forward Space Block
Forward Space File
Data Security Erase
Rewind causes the selected tape unit to rewind tape to
load point.
REWIND UNLOAD (RUN)
Rewind Unload causes the selected tape unit to rewind
tape to load point. removes tape from the columns,
finishes winding tape onto the right reel, closes the
cartridge (if used). and opens the window.
/-"\
)
Successive ERGs
6250 bpi
3.75 in. (95,3 mm)
3.45 in. (87,6 mm)
1600 bpi and
800 bpi 9-track
4.2 in. (106,7 mm)
3.6 in. (91.4 mm)
7-track
4.5 in. (114,3 mm)
3.75 in. (95,3 mm)
WRITE TAPE MARK (WTM)
Write Tape Mark causes the selected tape unit to move
tape forward and write a tape mark block.
At 6250 and 1600 bpi, a WTM causes the subsystem to
write a tape mark preceded by an Erase record gap.
Data Check, Equipment Check, and Unit Check can be
set during a Write Tape Mark (WTM) operation.
Attempting to write a tape mark on a file-protected
tape unit sets COMMAND REJECT.
BACKSPACE BLOCK (8SB)
Backspace Block causes tape to move backward to the
next interblock gap or to load point, whichever comes
first. No data bytes are transferred. Channel End is
signaled when the command is accepted. Device End is
signaled at the next interblock gap or load point.
Sensing a tape mark sets Unit Exception, with Device
End in the status byte. Backspacing into or at load
point sets Unit Check with Device End in the status
byte. The tape unit remains in backward status.
BACKSPACE FILE (BSF)
REWIND (REW)
©
FORWARD SPACE BLOCK (FSB)
Backspace File causes the selected tape unit to move
tape backward to the interblock gap on the load point
side of a tape mark, or to load point. whichever comes
first. No data bytes are transferred. Unit Exception is
not set when tape mark is sensed.
Backspacing into or at load point sets Unit Check with
Device End in the status byte. Device End is signaled
at the completion of the operation. The tape unit
remains in backward status.
Forward Space Block causes the selected tape unit to
move tape forward to the next interblock gap. Initial
status contains Channel End. Sensing a tape mark sets
Unit Exception, with Device End in the status byte.
FORWARD SPACE FILE (FSF)
Forward Space File causes the selected tape unit to
move tape forward to the interblock gap beyond the
next tape mark. No data bytes are transferred. Initial
status contains Channel End. Device End is signaled at
the completion of the operation. Sensing the tape mark
does not set the Unit Exception bit.
Programming Note: The tape control responds with a
Control Unit Busy sequence while performing an ERG,
WTM, BSB, BSF, FSB, or FSF operation.
o
The Data Security Erase command is not currently
supported by IBM Operating Systems. DOS supports
DSE via a Magnetic Tape Command (MTC).
DATA SECURITY ERASE (DSE)
Data Security Erase causes the selected tape unit to
erase tape from the point at which the operation is
initiated until the end-of-tape marker is sensed.
The DSE command is accepted by the tape control only
when chained immediately following an Erase Gap
command. Receipt of this command under any other
condition results in COMMAND REJECT. If the
command is accepted, initial status contains Channel
End, and Device End is signaled when the operation is
complete. An attempt to erase a file-protected tape
sets COMMAND REJECT. Unit Exception never occurs
as a result of this command. Data Security Erase at
end of tape (EOT) causes an immediate ending
sequence. The tape control does not remain busy after
initial selection. An attempt to select the tape unit
while executing a DSE results in busy status.
During DSE execution, the tape unit monitors erase
head current to ensure that tape is erased. If eraSe
head failure is detected, the operation is terminated by
dropping TAPE UNIT READY. Device End and Unit
Check are issued as a result of dropping READY. At
the completion of a DSE, the tape control presents
Device End to channel.
Programming Note: If the tape unit drops ready or
fails logically during DSE, the ending status containing
Device End and sense byte 7, bit 4 (Erase Head Failure)
is also set.
40-007
Copyright International Business"Machines Corporation 1976. 1979
().
"'-..
Device End is signaled when the EOT marker is sensed
during a normal DSE completion. However, a sense
command should be performed to assure EOT was
reached. Upon completion of the DSE, the operating
program must issue sufficient erase gap commands to
ensure erasure of any data written beyond the EOT
marker. Issuing 14 erase gap commands, which erases
about 4 feet (1,22m) of tape, is generally sufficient.
The channel must be enabled for interrupts to detect a
Unit Check condition due to manual intervention. When
Device End is signaled, a sense command should be
performed to ensure the tape unit reached EOT.
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40-008
OPER-TAPE COMMANDS (Cont'd)
NON-MOTION CONTROL COMMANDS
DIAGNOSTIC MODE SET (OMS)
Non-motion control commands do not move tape and
do not transfer data across the channel/tape control
interface.
DMS causes an artificial signal-loss condition that
checks read and write error detection circuits.
Channel End and Device End are signaled when
non-motion control commands are accepted (initial
status).
Non-motion control commands are:
No-Operation
Mode Set 1
Mode Set 2
Diagnostic Mode Set (maintenance aid)
NO-OPERATION (NOP)
NOP performs no function in the tape control or tape
unit, and does not transmit data or move tape. NOP
does not reset tape control sense data.
Programming Note: Placing a NOP command at the
end of a series of chained commands delays channel
disconnect from the tape control until the NOP is
executed. Indiscriminate use of this command delays
the channel program, and may contribute to a channel
overload condition.
• At 6250 bpi, track P is made all zeros and the
program supplies the error correcting code as part of
the data.
Mode Set Commands
556
800
Odd
Data Converter
Even
On
Off
Translator
On
Command Byte
2
3
4
7
Hex
Off
0
1
5
6
X
a
a
a
a
a
a
a
a
a
a
1
1
13
1
1
23
1
1
2B
1
a a 1 a a
a 1 a a a
a 1 a 1 a
a 1 1 a a
a 1 1 1 a
1 a 1 a a
1 1 a a a
1 1 a 1 0
1 1 1 a a
1 1 1 1 a
a a 1 a a
a 1 a a a
a 1 a 1 a
a 1 1 a a
a 1 1 1 a
1
1
1
1
1
1
a 1 a a
a a a a
a a 1 a
Mode Set 1 (7-Trackl (See Notel
X
X
X
• At 6250 bpi Diagnostic Read inhibits single- and
double-track error corr check characters to channel
with data.
X
X
X
X
X
X
X
X
X
• At 1600 bpi, whenever write data contains
successive one bits in any track, writing in that track
is inhibited until the last one bit is reached.
X
X
X
X
X
X
X
X
• In 7-track NRZI mode, no bits are written in track C.
X
X
X
X
X
X
X
X
X
x
X
X
X
X
X
X
A Diagnostic Mode Set command affects only
operations for the command chain in which it is issued.
X
X
X
• In 9-track NRZI mode, no bits are written in track P.
X
X
X
X
X
X
X
X
x
X
X
X
X
X
X
X
1
X
1
X
1
X
X
1
1
1
33
1
1
38
1
1
53
1
1
63
1
1
6B
1
1
73
1
1
7B
1
1
93
1
1
A3
1
1
AB
1
1
B3
1
1
BB
1
1
D3
Mode Set 2 (9-Trackl
800
1600
MODE SET 1 (MS 1)
Mode Set 1 commands sent to tape controls with the
7-track NRZI feature establish an operating mode for
succeeding 7-track NRZI operations. Bits 0 and 1
control density (200/556/800 bpi) and bits 2, 3, and 4
control parity (odd or even), data converter (on or off),
and translator (on or off) circuits in the tape control.
See chart on this page.
Parity
Set Density
200
6250
X
X
X
1
1
C3
1
1
CB
Note: Seven-track Mode Set 1 commands are treated as 'NOP reset sense' when issued to a tape control without the
seven-track NRZI compatibility feature.
A Mode Set 1 command affects operation of all 7-track
tape units attached to the tape control. Unless reset,
the tape control retains its mode setting until it receives
another Mode Set command.
MODE SET 2 (MS 2)
Mode Set 2 commands sent to a 3803 Model 2, set the
operating mode for succeeding write-type operations.
Modes are: 6250 bpi, 1600 bpi PE, or 800 bpi
nine-track NRZI. Unless reset, the tape control retains
its mode setting until it receives another Mode Set
command.
40-008
© Copyright International Business Machines Corporation 1976. 1979
(
o.PER-TAPE COMMANDS (Cont'd)
40-009
I/O INSTRUCTIONS
In addition to initiating one of the I/O operations by
means of the Start I/O (510) instruction. the program
can cause certain actions at the tape control by using
the Test I/O and Halt I/O instructions.
TEST I/O
A Test I/O instruction performed by the Central·
Processing Unit (CPU). causes the status byte for the
selected tape unit to be sent to the channel for
analysis. No actual operation is performed.
Note: A Test I/O command issued to a not ready tape
unit results in a contingent connection on tape control
units with the two-channel switch.
HALT I/O
A Halt I/O instruction causes data transfer to stop. The
tape control disconnects from the channel and
proceeds independently to the completion of the
operation. When the operation is completed. the tape
control tries to re-establish connection with the channel
to transfer ending status. If addressed while
completing the operation. the tape control returns a
BUSY signal.
If a Halt I/O instruction is executed after STATUS IN
and befpre tape motion is started during a Write or
Read operation. the operation is canceled. and Channel
End. Device End. Unit Check. and Data Check are
generated.
3803·2/3420
©
40-009
Copyright International Business Machines Corporation 1976. 1979
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50-000
OPER-CHANNEL BUFFER CIRCUIT
READ/WRITE FLOW LOGIC
See 6250 Write
Service Requirements
on 50-020.
~
FC061
Switched to
~
r- I
I
I
I
o
usut Chan A ...
B
Write and
Tape Op
~
t
~
OR
I
6FC091
p;W
I
I
~
Read and
Tape Op
8.
PG
Switched to B
Intf Bus In
Write
Byte
Buffer
53-040
Write Pulse
1 --
Reg
l
'-
;g
Pad Gate
S
53-045
A1F2
PC
...
,
~
1
I
XMOS1 I
~
Chan B
PG
I
I
...
XM161
-----
Shift
CRC A
FC111
9
CRC
Generator
A
53-066
A1D2
Channel
Buffer
Controls
X
CRC
D
Reg
53-066
A1D2
~
I
___ .J
BK031
[
53-030
BK011
Gate Chan
Bus Out
to ALU
" " ' " " " . _ 0",
1-2
TO WRITE DATA FLOW LOGIC
5()'()()1
BR031
BR031
Bus
Out
Check
I
I
I
XM191
-
~
Channel
Buffer
I
-.I~'
I
I
L
FCOB1
~ Bus Out Chan B
(
B2M2
-';;0 Chan;'; 5:itCh - - -,
I
I
I
~
Set
Write Regs
-
x 32
A1F2 BR031
CRIC/CROC
Controls
53-035
CRC
Gen
C
53-066
A1D2
Store CRC D
BK021
-
Shift CRC C
1-5
FROM READ DATA FLOW LOGIC
5().()()2
50-003
Feature Code Bits
High Serial Bits
OR
See 6250 Reed
Service Requirements
on 5Q.030.
(
FC291
Intf Bus
In Chan A
Low Serial Bits
CRC
Gen
B
53-066
A1C2
'11'
Switched to A
~
FC261
A2R2
FC171
FC211
A
Chan Bus
In
OR
Reg
Al
C2
~
A
r--
Bus Ripple Bit
Dead Track
OR
BS051
Set A Rd Buffer
53-055
•
A1C2
B5051
Tie Down
B Read Reg
A
Bus In
Assembly
BS071
A2R2
--
Reg
... ".
-'t_
A
I--
A2R2
52-040
A Read Reg
BS081
Bus In
OR
Shift CRC B
III
Reg
14-~-
Set B Rd Buffer
53-055
FC171
A1C2
1-1
B5051
50-003
© Copyright InternatiQnal Business Machines Corporation 1976. 1979
50-000
OPER-WRITE CIRCUITS
50-001
WRITE DATA FLOW LOGIC
,,1Se;.;-
-I
T7a"ckFe;Wre-
I
I
I
!IIII
Write
Translator
and· Data
Converter
57-020
57-025
I
I
I
A1E2
I
I
BN011-BN311
I
I
I
I
L
Channel
Buffer
Out
..- ~II
~'"
I
I
Write
Heads
Write
Drivers
I
OR
DOT
~
(9)
BR101
"XC601
-
..
..
To Control
Circuits
- ___ --..J
Without 7-Track
Feature. install
jumpers
1-2
0
50-000
BR10l
-
-
Write
Condition
Channel
Buffer Gate
A
Write Group Buffer
Set Byte 1
OR
,.~ I
Write
Encoder
...Residual or CRe A
~
Write
CRC
Generator
II1II
53-065
-
ORC
Generator
---
~
.:
Al
G2
Write
Triggers
Set Byte 4
A1H2
BW061BWOBl
Mark 2
r
Write
Tgr
VRC
Cntr 4
'I
A1H2
Set Write
Group Buffer 2
53·020
A1H2
BW011BW051
FD021
BWOllBW051
Format
A1G2
Format
Control
Write
Clock
and
Controls
53-020
--x A1G2
Write
Group
Buffer
Control
TUBO
53-070
Cntr 2
BW171
53-025
-
Mark 1
Write
Bus
53-045
Write
Bus
Control
-X-
Cntr 1
A
BW121
I
A2 (01010)
-
Set Byte 3
-
~
I Serializer
Al (10101)
"':
A
A1G2
BW131
Set Byte 2
A
~
1 5 Buses
I--
~
BW151
1-4
~
Write
Counter
53-025
53-020
Wrt Cntr = 0 '
LA
-
From TU Bus Out Register
50-003
~
Wrt Cntr = 0 and WC 0
50-003
50-001
)
/::......".~~\
\.. ),J
o
o
C)
C) 0
('l\
", J
"y
~~
!'j
~i
f"e
'"
/)
,"
i\.
'"
j
/-~,
"--------'
)
,'°1
'j
/
\
,,~
(
(
(
(
c-
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
50-002
OPER-READ CIRCUITS
READ DATA FLOW LOGIC
50-003
(to Spec Reg)
isev~-T~c;Featu~
I
I
Read
T ra nslator
I
and Data
, . Converter
I
57-021
57-026
I
I
2-2
NRZI
I
I
NRZI Read
Data Flow
l....J...
T
57-006
I
I
I
A1E2
~ BNO~-B~3~
I
J
Read
CRC
53-065
Y1D2
Read
Data
1-5
50-000
CNOll
~--.
ECC Buffer
OR
Without 7-Track
Feature. install jumpers
~"'::liIII"'''_'''''''1.....
BR111
Combined
..
ECC
Group Buffer
8 x9
Reg
OE
1 X 9
Y1G2
CJ031-041
Set ECC Buffer
Y1G2
CJ031-041
...
~
.........
0-7
ECC Data P. 0-7
Y1K2
Y1L2
Y1M2
~
Y1G2
CJ031-041
ECC
Correction
Matrix
CD181.281.381
-
Pointer
System
--
Xlate
Buffer
Track
Xlate Xlator
_ Out
Array
Logic
1x 9
Y1K2
Y1L2
Y1M2
Set Xlate
Buffer
53-090
..--
CD181.281.381
~
Y1G2
5 Buses
I 5x9
GB Adr
Ctr
Y1K2
Y1L2
Y1M2
pOin.
I-III
CD181-381
FL (9)
f4
53-045
Format &
Invalid
I Format
g~~~~~i~~
Char
32x27
VFC Data
Phase Error
53-090
CD181-381
Skew
Buffer
Data
Out
Pointers
-
CEOll-l0l
Y1K2
Y1L2
Y1M2
Group
Buffer
r-
.-
Y1F2
VFC
Prime Data
53-095
Correction
Data
Read
Cycle
Controls
Y1K2
Y1L2
Y1M2
CD191-391
Y1K2
Y1L2
Y1M2
• •
PE Phase Error
Gated
~
Step RIC . . . . . . .
Dead
Track
. . . . . . . . . . . . . . . 53-080 ...."""'!!'
. . . . . Control ~
Yl K2
53-075 ........
Skew
Y1L2
Y1P2
~
RICY1M2
DetectROC
ion
CD161.261.361
CC031-111
53~080
53-085
CD121-341
Y1K2
--..
Y1L2
Y1M2
1----4
Sample HDB
53-080
----
CD191-391
Excessive Skew
(To Sense)
. . . . . L09iC
Yl H2
CH151
© Copyright International Business Machines Corporation 1976. 1979
Invalid
Char
50-002
OPER-MP1/MP2 CIRCUITS
50-003
MICROPROCESSORS (MP1/MP2) SCHEMATIC
(
50-000
A
50-000
50-001
-=r=---~
Chan
Tags
In
Reg
52-040
A2R2
FC161
...-x-------,
1 Not Clock 21
XOUTA ..........____________
)I(
B Bus
XB
...J
~~.
52-035
B2C2
AB341
'"
~
a: a;
F0041
A Reg
52-030
A2N2
AA331
Xlr LSR
to TU Tag
OR
A2N2
Xlr LSR2 to
A202
TU Tag
Reg
',"
•
~x--
52-015
Inst
Decode
Stat
AA401
h-
Br Cond
(32)
B2D2
A2T2
B2M2
IC Look
Ahead
7 8 91OH1211314115
·.t-BOB10l
B2H2
H
~8~____~1~____1~5
PC
011
52-015
~
15
A2M2
AB411
B2D2
•..;4_..L-~7
B Bus
Stats B, C, and 0 to Microprocessor 2
FD021
1 --TX Xlr LSR to A
.
Stat
Reg
~
B Bus
AA391
I
Stats B, C, and 0 to Microprocessor 1
Xlr LSRl to Stat
52-045
A2R2
AA331
AA221-271
B• B•uiii
s __
AA351
A2R2
A Bus
,_I_..
PC
FD031
OR
A2M2
AA381
From Hdwr Error Lth
52-030
AB301
B2C2
AA291-31~lb
XOUTB
TU Bus
Out
Reg
Local Storage Regs
(LSRs)
52-015
r-
!4-X..J..:.::.IIIII!..A.2.N.2_ _..._ _
XOUTB
~X-
AA361&~.
X
:x
A2T2
-..;,-....;,..----~ 0 Bus
Xlr LSR2 to TUBO
......-_....-.....
o Bus
Not Clock 21
AB371
PG
~
to LSR
AB391
_-.
Clock 15
.....
I _____. .I:. . . ......r~_,
Xlr XINA to LSR2
MICROPROCESSOR 2
Spec
Reg
52-035A 2 T 2 " ' - A2T2
OR
FDOll
A2T2
DReg
AA431
~
ALU2
1
1-4
l - ---CI~ TUBI-r--;~;_:~-t--..r-oR
MICROPROCESSOR 1
~r---------------------~
OR
50-001
R
2-1
XfrLSR1 to
)( Channel Bus In
FC291
50-002
0123
5TO
5TO
BOC
BOC
XFR
XFR
BU
unused
ORI
ORM
ADD
ADDM
AND
ANDM
XO
XOM
4-7
8 - 15, P
Op Code Field 1
Field 2
oa 0 a
00 a 1
L5R Addr
L5R Addr
Condition
Constant
Constant
Address
CondItion
Address
00 1 0
0011
0100
a 10 1
0110
0111
1000
100 1
1010
101 1
1100
1101
1110
1111
LSR Addr
Location
LSR Addr
Location
HI ROS Addr La ROS Addr
LSR
LSR
LSR
LSR
LSR
LSR
LSR
LSR
Addr
Addr
Addr
Addr
Addr
Add,
Addr
Addr
Constant
Constant
Constant
Constant
Constant
Constant
Constant
Constant
-
.
Br Cond
XC041-051
A2D2 A2M2
A202
J
IC Look
Ahead
AA081
Branch Set IC
32 Branch
AA171
~~~g~t;ons
AA181
1
1
I
PC
~
AA121-141
Xlr
Decode
52-101
A2L2
A2N2
AAlll
LLn
x.;i r
I
X-
7
8
15
ROS Reg A2M2 AA061 52-030 A2L2 AA051
A2L2
I
Low IC
OR
Gate B Bus to IC
I .~
Hlqh I c m_ _ _R_e_a_d_o_n_'_Y_S_to_,_a_ge_A_rr_a_Y_I_R_O_S_)_ _- '
A2H2
QA031-061_
AA091
AB071
PC
AA101
50-003
© Copyright International Business Machines Corporation 1976. 1979
\
(-""-\
,,--)
'~
r--~
I
r----".,
!
\
'\.J
0_-:' C)
'--..
(-h\
\,_Y
r)
~-....
C) C)
(-.l1.;.
\.;)
(--"',
,E )-,
\.y
\ .. y
I"'~
~)
,""'11\
\,-_.)
(.
«
f
(
c
(
(
(
(
(
(
(
(
(
(
(
(
(
OPER-ROS
50-010
ROS 1 TRAP CONDITIONS
-Initial
SI
eectlon AB CE AB171,....
II
A
f~ I--
+General Reset
Chan A B FC041
•
+ROSl Error FC151,.....,
-Selective Reset FC151 ........
I'--.. -Trap ROSl
OR
OR
A
r..... A
,....., I--OR
FC141
lli
~
AB161
t
ABOll .......
~
""
~
A
OR
OR
A
FC141
~
t--..
I
A
A
h
OR
.........
-Any ROS Hardware Err .........
t--..
A
OR
.........
~
10-
P~
A
+Reset Sw N/O
,....
........
+Reset or Start/Stop Sw N/C ........
•
I
- Power Reset FC271
.........
PSOll
A
~
OR
A
PS011
N
I::::--
I
A
+ Reset
ROSllC
OR
J
+Mach
Reset
2l
r-.... System
1 Reset IC
DOT
.....-
AB091
FC141
N
,.....,
Reset ABOll
N
FC141
8-15
OR
""'--
~
ABOll
7F
........
1
FF
--N
-Gate B Bus to IC .......
-B Bus 0-7
A
-
OR
A
Lo IC ROS
AB091
AB031
OR
OR
~FC141 ~
+CE Reset
Sw
OR
PS011
r-FC141
r-- ......... -Mach Reset
......... N
' " -Mach Resets
+Mach Reset
Harderr A
Harderr B
FC141
ALU2 Clock
AAOll
ALU2 D Bus Parity
AA361
ALU2 IC Control Errors
AA451
ALUl D Bus Parity
AB371
75-125 And Xfr
+Mach Reset
~1
FC141
To:
To:
AlU2 Stat A & B AA411
ALUl Stat A & B AB421
Sel Sig Chan A
FCOll
Sel Out. CUE
FC031 " - - Metering
FC041
OR
TU Sel Reg
FD031
.
.
FD041
TU Tags Reg
XMOll
AB181
Sel Sig Chan B
T
Sel Out. CUE Chan B XM031
o·
.
Metering. Chan B
XM041
XM10l
Sw to A. Sw to B
I VFC
Swi"'h
7-Tk Clip level
CE In Tags
Intf BOC
CA100
CN071
PR181
AB161
Sys Xfr Rst
{BO"
C'ock Timi,••
IC Clock Errors
LD Inst. Ctr Ptk Ck
Inst. Card Errors AlUl
Hdwe Error latches
Reset Emit Addr
AAOll
AA451
AB10l
AB381
AB471
FC151
,.....
FC141
A
ROS Reg 11 AlUl ........
II.
ThrOugh. are
conditions which trap ROSl
OR
OR
A
SS
PSOll
......... N
Panel Enable
'"
1 - OR
~
~-
1.04 usec
A
~
A
~
A
A
.......
Panel Enable
-Reset/Err Mode
........
Reset 3
........
--I:::::.
""'-
A
OR
~
~
~
~
50 ns Tap ,.....,
........
"--
OR
AB181
.......
.........
A
-100 ns Tap ........
A
Reset 4
-CE Select Reg Pulse
AlU 1 Clock Gating
AlUl Clock Powering
AA451
AB021
AB031
AB041
-Xfr B Bus to IC ........
........
-Gate Trap Pulse
+ Hardware Error AlU 1
.......
I'CAlUlC~'""
E~ ALU'
Clock Output
........
N
IFC141
AB03i
-Reset/Cmpr Mode
To:
-Branch Set IC ROS1 ........
T
........ ~
+5.12 MHz
OR
A
~
"--
ALUl Clock
Reset 2
FC141
-System Reset
Reset 1
25 ns Trap ROSl ,.....,
FC141
-General
Reset Chan A B
II
Trap ROSl
+lock ROSl IC
AB181
IL
Reset Sense Data
{ Bo••
To:
A
ROS Reg 14 ALUl .......
C''''' Timi....
Write Service Controls
Chnl Buffer Addr Ck
Write Data Parity Error
Write Tgr VRC
Command Hold Reg
ABOll
B5031
BS061
BW141
BW161
BW231
AB181
© Copyright International Business Machines Corporation 1976. 1979
50-010
~OPER--ROS (Cont'd)
50-011
ROS 1 TRAP CONDITIONS (Cont'd)
Both hardware and microprograms generate resets.
Types of resets are General, Selective, and Machine.
[1] GENERAL RESET resets all flags, stats, and reserve
bits that apply to the selecting interface.
[2] SELECTIVE RESET performs the same functions
except the Control Unit Reserve and Hold Interface
bits are not reset.
.
[3]
POWER ON RESET and CE panel resets generate
MACHINE RESET. Turning power on and pressing
RESET both generate POWER ON RESET. POWER
ON RESET clears some LSRs and initiates
INTERFACE CHECKOUT. Channel outbound tags
are checked to ensure all are inactive and all
inbound tags except OP IN are activated. Contents
of the CHANNEL BUS IN register are sent to
CHANNEL BUS OUT.
[4] INITIAL SELECTION ABCE trapsROS 1 to 000 at
each selection of the tape control.
[5]
LOCK ROS 1 IC traps ROS 1 to 000 when an ALU
1 hardware error occurs.
MP2 is activated for the proper reset after Stat B
has been set on or off to reset only the selecting
interface. CONTROL UNIT BUSY is activated for
the duration of the reset and is deactivated at
completion of MP2 reset.
If MP2 has hardware errors, the tape control "hangs
up" with BUSY active and loops on a trap address.
If all steps are completed correctly, the reset is
finished. Any failure "hangs up" the tape control at a
trap address and BUSY remains active.
©
50-011
Copyright International Business Machines Corporation. t 976. 1979
o
(-l'
\,-J!
()
~
..
()
().
"'-
o
o
('
(
(
c
(
(
(
(
f
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
50-020
OPER-6250 BPI
6250 WRITE SERVICE
REQUI~EMENTS
The write buffers fill automatically at the maximum rate
permitted by the control unit, cable, and channel
delays. This diagram shows when byte requirements
occur. The channel must respond only to the average
need during the period of overrun, checking such that
at least one ECC (error correction codel group remains
in control unit buffers at all times until stop occurs.
Note that no individual channel byte transfer is overrun
checked.
36 bytes are pre-buffered and one ECC group or more
must remain in the buffer at all times prior to Stop.
This time could permit some data chaining or be
considered a safety factor.
Request
bytes
at
maximum
data rate
n
Byte requirements are
governed by tape data
rate after this pOint
>900 usee @ 200 ips
I
(See Note 1)
32
'--_ _ _ _ _ _.....
Initial
Selection
t
Start
Tape
\
A
Data Group
B
A
B
A
A
B
A
B
A
B
"---------'n'-----1lJlJlJl
Tape Full Speed.
Gap crossed
Preamble
Written
.-~-Overrun
_ ____________________________________________________
Checked
...... Burst
ReSynC -
preamble-----__t~-I-------Data-----__t...
~lfoo
(See Note 2)
..
..
...
~t ..------Data - - - -...........
~r
~-~I~TOP
_.
-ReSYnc_1 Repeat to
Burst
End
(See Note 2)
Not•• :
[1]
Proportionately more on lower speed tape units.
[2]
The Resync Burst consists of a mark 1 group, 2 sync groups,
and a mark 2 group. It is interleaved in a block of data after
every 158 data groups, and is used to re-synchronize the read
circuits during a 6250 read operation.
3803·2/3420
©
Copyright International Business Machines CorpOration 1976. 1979
50-020
50-030
OPER-6250 BPI (Cont'd)
6250 READ SERVICE REQUIREMENTS
The channel buffer and both read byte buffers are
empty at the start. Overrun is called only if there is
insufficient room in the buffer for a waiting ECC group.
The ECC rate varies according to corrections required
but follows the tape rate average over periods of 50
bytes or more. The channel has until the postamble
end to accept all data from the buffer. Note that no
individual data transfer is checked for overrun. To
overrun, the buffer fills during a channel lag.
There is excess read buffer capacity equivalent t01 0
usee· available for "slip" or possible data chaining.
The time may be distributed or lumped. Overrun check
effectively starts at the 34th byte since that is the total
buffer capacity.
ECC
Group
800 usec @ 200 bpi"
ECC
Group
ECC
Group
Present
bytes at .
maximum
data rate
I:m B~.
Overrun Checked
ECC
Group
_____fl
r,
I
I
I
I
r,
I
I
Two groups of 7
are skipped for
Resync Burst
Selection
Begin
Block
....1-----------
Data
-----------1......----
Resync Burst
I
I
ECC
Group
ECC
Group
ECC
Group
n n n
----........1------
ECC
Group
ECC
Group
n~------------~~-D-at-a-B-y-te-s----
Variable
depending on
block length
Data - - - - -....of
End of
Data
Mark
....1------
Approximately 50 byte
times to empty buffer of
all contents
.,
3803-2/3420
50-030
© Copyright International Business 'Machines Corporation 1976. 1979
'\
)
(\
\
"
/'
f
()
"-'
()
"'--
r),' (.)
~"
'-...
'
c)
o
( ~,,,
(,,,~
"--Y
'-../
'f
("i
"
./
''I
f"
',./
,.c-~
'"
.;
/
.........
_-
«
(
(:
c
f
(
(
(
(
(
(
(
(
(
(
(
(
(
(
52-005
OPER-CLOCK CIRCUITS
MICROPROCESSOR CLOCKS CONTROL
LOGIC
MP1 Clock Control Logic
-20.48 MHz
-0 ns Tap
0-50 ns
PH
AR
Hardware clocks control both microprocessors (MP1
and MP2). The clocks are stepped by 20.48-MHz
.
pulses.
+175 ns Tap
PH
-25 ns Tap
25-75 ns
The MP2 clock is similar to the MP1 clock shown.
The clocks run on either 150- or 200-nanosecond
cycles. The length of the cycle depends on the
instruction.
FL
-0 ns Tap
-25 ns Tap
....
....
PH
OR
OR
+100 ns Tap
25
50
75
100
125
150
175
ns
ns
ns
ns
ns
ns
ns
Tap
Tap
Tap
Tap
Tap
Tap
Tap
BU Oper
Clk 4
(STO
Clk 6
Clk 7
Clk 8
I-Short Cycle (150 nsec)
'I'
o
0
PH
50
75
100 125
"
50
0
75
100 125 150 175
AB031 B2F2
FL
PH
-Long Cycle
I
(unused)
4-4-
-
-1-
~ ~6-
1-7- ~
A
PH
1-15
1-16-
21
-22-
+Reset Hi Order ROS ALUI
AB031
AB011 B2F2
-4-
-
PH
-175 ns Tap
175-225 ns
f-6- ~
1-7- I---
A
+Set Page Reg Clk
1""11- f--12 I--1-15- ~
1-15-
-18-
+Set IC ALUI
-150 ns Tap
150-200 ns
~8- ~
1-8- f---
1-17
-
-50 ns Tap
+ System Reset
(inst card error)
(Add) 150-0
Logic Op) 100 ns Tap
(S1'O)
(not BU)
(BU) Initialize
(XFR to LSR)
(ADD)
16 (XFR to LSR)
17
18 (unused in ALU1)
19 (ADD)
21 (XFR to LSR)
22 (Logic Op)
(ADD)
25
Long Cycle (200 nsec)
-100 ns Tap
100-150 ns
-125 ns Tap
125-175 ns
Clk 11 (ROS Cycle Mode)
Clk 12
Clk 15 (STO)
(Logic Op)
Clk
Clk
Clk
Clk
Clk
Clk
25
-1- ~
Clk 1
-100-175 ALUI
AB021
ADD Ope< ALUI
AAOll / ABOll
AAOll / AB011
AA011 / ABOll
AAOll / AB011
AAOll / ABOll
AAOll / ABOll
AAOll/ABOll
AA011 / ABOll
1'00...
OR
-75nsTap
75-125 ns
BOC Oper ALUI
o ns Tap
-0-75 ALUI
+125 ns Tap
- Short Cycle
Clock Timing Chart
.....
-50 ns Tap
50-100 ns
+ Reset
Xlr B Bus to IC
-
+Block
Ie Bypass
AB021
PH
The numbers on the clock outputs (CLK1-CLK22) bear
no relationship to the times these lines become active
within the clock cycle.
OR
OR
-
-
-Set IC Mode
-Single Step or
Start ALU
-11- f--f0012- f---
-
AB011
PSOll
+5.12 MHz
+ Reset Strobe Mem
A
f0015- I---
-
-Set IC ALUI
-System Reset
-Gate Trap Pulse
+Reset ALUI
-17
-18-19
+Mach Reset
--
OR
AB031
+System Reset
ABOll
-22
+ Reset Sense Oat.
OR
+Systam Xfr Reset
ABOll
52-005
©
Copyright International Business Machines Corporation 1976. 1979
OPER-MP1 IC CIRCUITS
52-010
MICROPROCESSOR 1 INSTRUCTION COUNTER (Ie)
MP2 IC is similar on:
ALD
Cards
AA071. 081. 091
A2L2. A2M2
-Branch Set IC
'"
-100 ns Tap
-
'" ,......
-50 ns Tap
~
-Xfr B Bus to IC Reset
"
IC 9-15
..
...... A
-
~
IC 10-15
....
-
r-.JA
t'....
IC 11-15
...
-
...... A
"
IC 12-15
.,.J A
-
' - IC 13-15
' - IC 14-15
Fl
"
4v
~
+Clk 6
-ROS Reg 8-15
....... r-
....
- Branch Set IC
AB091
A
+Block IC Bypass
B2 E2
AB091
-BU or BOC
...
ROS Reg 4
...
+ROS Reg 5 or Set IC 1
+ROS Reg 6 or Set IC 2
-
+ROS Reg 7 or Set IC 3
+Clk 8
2
1
......1A
-
~ Al
_. Branch Set IC
I
....
....... A
-Page Bit 5
To ROS
50-003
-Page Bit 6
1."".",1
FL
L
.....
~/
-Page Bit 4
...... -
~
'" ..... ~
·-BOC Oper
B2E2
AB081
i'..
Fl
.......
~
FL
...
to.
r&
.......
....... A
~
':::-/
FL
A
B2 E2
AB195
Fl
4
...... A
FL
rJA
(8)
AB195
8
-
-:-/
..
.... -
OR
p$
A
-BOC Met
t::::.../
15
-
(8)
To ROS
50-003
+ Inst Count 8-15
+Reset Hi Order ROS
14
-
...
...b.
B2 E2
6-./
,.JA
•••...1 A
A
....JA
13
IC Trigger 8-15
-ROS Reg 8-)5
......
FL
...
...
IC 15
(8)
N-
OR
6-./
Fl
AB101
.....b
- Gate B Bus to IC
Fl
12
-B
FF
-Step IC 8-15
-Initialize lSR
ABOll
......
B Bus 0-7
10
"-
A
Fl
6-./
"
IC 8-15
b-/
...
-
~
(8)
9
Fl
A
Fl
,.JA
-
A
E2
B2
AB091
....
-Clk 11
11
...
-
I--
IC Overflow .....
A
~
,......
,......
.
100 ns Tap
OR
A
-System Reset
8
A
A
-Page Bit 7
Bump to 4
Fl
!--
PC
- Bump Cond Met
AB071
3803-2/3420
©
'"\)
/
o
52-010
Copyright Internati~n81 Business Machines Corporation 1976. 1979
0."
,
o
o
C)
C)
o
(~
/
"-
/
/
\,-
,,-,/
(~
"-..J
,.L"
-""
("-~,
"-
-/
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52-015
OPER-LSR BUFFERS
LOCAL STORAGE REGISTERS
STAT REGISTERS
The Local Storage Registers (LSRs) serve as buffers to
hold command codes, addresses, error conditions, and
any other data the microprocessors use. Each
microprocessor has 32 Local Storage Registers. Each
register holds one byte (8 bits) of data and a parity bit.
The registers are numbered LSR 0 through LSR 31.
STAT registers are used for microprocessor to
microprocessor communication and for microprocessor
to data flow communication.
MP1 Stat Register Usage
MP2 Stat Register Usage
MP1
Stat
Data from the D Register is stored in the LSRs, and the
output from the LSRs goes to the A Register and the B
Bus.
Microprogram instructions gate the contents of the
LSRs to other registers.
When the LSRs are used, Field 1 of the microprogram
instruction addresses a specific register.
The procedure on page 12-012 displays contents of
local storage registers.
MP2
Stat
0
Stop
0
Tape Op
1
Sense
1
Start R/W
2
Sense II
2
Wr 10
3
Oiag. Mode
3
7 Trk
4
Stat A
4
Stat A
5
Stat B
5
Stat B
6
Stat C
6
Stat C
7
Stat 0
7
Stat 0
ROS/LSR Logic
ROS
Reg.
0
1
2
3
4
5
6
7
LSR
Adr
Decode
MP1/MP2 Stat Registers
....
B Bus 107)
The MPI and MP2 Stat Registers
are identical except for the
gating lines.
D Bus
Clock 15B
LSR Out Bit (0.7)
FL
19)
(MPL) + XFR LSR 1 To Stat ~
i-B
,....
,....
A
To:
A
A Register
B Bus
Stat (0.7)
FL
18)
IMP2) + XFR LSR 2 To Stat /
PC
...
MPI
ALD
Card
ALD
Card
LSRs
AB231
B2C2
AA221
A2N2
LSR
Decode
AB201
B2D2
AA191
A2N2
Address
Decode
AB071
B2D2
AA071
A2N2
Panty
Check
©
Copyright International Business Machines Corporation 1976. 1979
MP2
+Reset Stat REG (A, B, C, or D)
'"
~
A
t::::......
MPI
ALD
AB411
AB361
B2C2
AA351
Card
A2T2
MP2
ALD
AA401
Card
A202
A2N2
52-015
OPER~XOUTA/XOUTB
52-025
CROSSOVER (XOUTA/XOUTB)
REG.ISTERS
Bits from XOUT A (XOUTA BIT x) are used as
follows:
The MP1 XOUTA Crossover Register is both a
buffer for MP1 control information and a transfer
register when sending a byte of information to
MP2.
Bit
ALD
Function
o
BW231
AA141
AA141
CC021
BW231
CB111
AA141
CBll1
Gates PE Mode
Gates forward operation
Allows envelope loss
Gates Sync Mode for Detection
Gates 6250 Mode
Gates Detection Frequency
Gates low gain to read logic
Gates detection frequency
The individual bits from XOUTA (XOUTA BIT x)
are used for the following:
Bit
o
Location
Function
FC211
Gates unit serial number to Channel.
FC211
BW311
BW151
Gates EC level and features data to channel
Gates 7-track Mode Sets
Generates WRITE END GATE TO DF
2
BN311
Gates 7-track Mode Sets
3
BN311
BW151
Gates 7-track Mode Sets
Gates Write Tape Mark
4
BN311
'CN031
BW15l
Gates 7-track Mode Sets
Gates NRZI Track-in-Error
Gates WRITE MARK 1
·5
CN031
BW151
BN231
Gates N RZI Track-in-Error
Gates WRITE MARK 2
Gates WRITE OP TO DF
6
PR161
CN031
BW151
Gates the Sense Bytes to Channel
Gates NRZI Track-in-Error
Gates WRITE A2
7
PR161
CN031
BW151
Gates Sense Bytes to Channel
Gates NRZI Track-in-Error
Gates WRITE Al
The contents of XOUTA are gated to MP2 by XFR
XINA TO LSR 2 on AA431. Output of XOUTA in
MP1 is called XINA in MP2.
MP1 XOUTB crossover register is a transfer
register sending a byte of information to MP2.
When MP1 XOUTB is used, MP2 traps to address
000. The contents of XOUTA becomes an index
to a specific routine in MP2.
The MP2 XOUTA crossover register is both a
buffer for MP2 control information and a transfer
register when sending a byte of information to
MP1.
1
2
3
4
5
6
7
MP1 XOUTA Register Bit Usage
MP1
XOUTA
Sense Stat
On
Dataflow
Control
6250 BPI Write
1600 BPI Write
NRZI Write
Format
Format
Format
End Gate
End Gate
End Gate
XFR TIE
P
0
The contents of XOUTA are gated to MP1 by XFR
XINA TO LSR 1 on AB441. Output of XOUTA in
MP2 is known as XINA in MP1.
The MP2 XOUTB Crossover Register is a transfer
register sending a byte of information to MP1.
This register is primarily used to send sense bytes
from MP2 to MP1 for transfer to channel.
1
7-track Mode
Set*
2
7-track Mode
Set*
3
7-track Mode
Set*
Tape Mark
Tape Mark
4
7-track Mode
Set*
00111
00111
5
Write#
11100
11100
Any binary combination
over 8 will Dead Track only
track O.
P 0
1 2 3 4
7
1
1 1 1
6
Bin 2
PE
01010
1 1
7
Bin 1
NRZI
10101
1
Real Time
gating of
Sense Bytes
5 6
1
1 1
1
1
1
* Bits 1-4 of
7-track Mode
Set.
# Bits are phase
locked in
dataflow
hardware by rise
of TAPE OP to
allow use of
register for write
format.
Strobed into
write controls at
each group
boundary except
bit 3 which is
real time.
Microprogram encoded.
Crossover Register
MP2 XOUTA Bit Usage
-B Bus (P, 0-7)
MP2
XOUTA
A
Crossover registers
are identical except
for the gating lines
FL
Data Control
P
(9)
0
-XOUTA Bit (P, 0-7)
+XFR LSRl to XOUTA
+XFR LSR to XOUTA
+XFR LSR2 to XOUTB
+XFR XOUTB (To Trap MP2)
MPl
A2T2
AB391
MP2
A2Q2
AA381
PE
1
Forward
2
Allow Env. Loss
3
Sync
4
6250
5
Speed
6
Low Gain
7
Speed
52-025
o
o o
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,--. __....)
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52-030
OPER-MP INFORMATION
MICROPROCESSOR LISTINGS
Microprocessors 1 and 2 have different listings that
can be identified by ALU 1 or ALU2 printed in the
upper left corner of each page.
Listings are in four parts:
1.
2.
General reference information, sense byte
descriptions, Local Storage Register layout, branch
condition codes, transfer codes, etc.
Equate statements which specify a symbolic name
for a value. Equate statements are generally
followed by a description of the use of the
constant.
3.
Listing of the executable instructions.
4.
Cross reference table containing all symbolic
names used in the listing. This table includes the
length of the referenced field, its value, the
statement number in which it is defined, and the
statement number of all instructions using the
symbolic name.
COMMUNICATION BETWEEN
MICROPROCESSORS
Either microprocessor can move a byte of information
from an LSR to either the XOUTA or XOUTB registers.
The other microprocessor can then move the byte of
information from the XOUTA or XOUTB register to an
LSR.
Each microprocessor can test, with Branch On
Condition instructions, STAT BITS B, C, and D from
the other microprocessor.
LINKING MICROPROGRAM ROUTINES
LINK registers store microprogram addresses for return
to a major routine from subroutines. Before branching
to a subroutine, the address of a Branch Unconditional
instruction is stored in a LINK register. The Branch
Unconditional instruction must be in the same page as
the subroutine to which the program is branching.
When the subroutine has completed its function, the
contents of the LINK register are transferred to the
Instruction Counter. The microprogram then branches
to the Branch Unconditional instruction, which, in turn,
branches to the return point in the calling routine.
MP 1 has six link registers named LINK 1 through
LlNK6 and MP2 has three LINK registers named
LINK 1 through LlNK3. The LINK registers are local
storage registers used for linkage purposes. The
specific local storage registers used for linkage are:
LINK
MPl
MP2
LINK 1
LlNK2
LlNK3
LlNK4
LlNK5
LlNK6
LSR16
LSR17
LSR18
LSR19
LSR24
LSR25
LSR28
LSR25
LSR26
Multiple link registers are available because there may
be several possible branches out of a subroutine.
MICROPROCESSOR (MP 1 AND MP2)
FUNCTIONS
Two microprocessors (50-003) control logic
operations of the tape control.
Operation of MP2 is dependent on the operation of
MP 1. MP2 remains idle until MP 1 supplies it with an
address at which to begin. MP 1 operates constantly,
either executing a routine. required by the operation
being performed or polling the possible conditions that
can require the execution of a routine.
Microprocessors consist of:
Read Only Storage (ROS) in which the
microprogram is stored for use by the
microprocessor. The contents of ROS cannot be
modified by the microprogram.
An Arithmetic Logic Unit (ALU) which performs all
arithmetic and logic operations: ADD, AND, OR,
and XOR.
Registers and Buses to hold or transfer data for
subsequent use.
Read Only Storage is addressed by three-digit
hexidecimal numbers 000 through 7FF. Each
addressable unit in the Read Only Storage is 16 bits
long. The first digit of the address specifies a page
(block of 256 addresses) of Read Only Storage. Each
microprocessor has 8 pages of storage, 0 through 7.
The two low-order digits specify one of the possible
256 addresses in a page.
In general, MP 1 handles all logic operations dealing
with the channel and MP2 handles the operations
dealing with the tape units.
The microprocessors can transfer bytes of information
between them and test single bits stored in the other
microprocessor.
MICROPROCESSOR INSTRUCTIONS
The microprocessors use 12 instructions. See
following pages.
MICROPROGRAM EC's
Microprogram EC's are applied with two Array Patch
Cards, type DEO 1, which provide auxiliary ROS arrays.
The arrays contain four sets of microcode patches
(ALU 1 and 2 for 3803-1 and 2). Plug each card as
shown in Figure 1 in order to select the proper
patches for it's location. The following patches are
active when these two cards are installed Irefer to
page 52-102 for the patch listings):
1.
Alternate Path Device Busy
2.
Velocity Retry Extension
MICROPROCESSOR INSTRUCTION
FORMAT
3.
Turnaround Delay
4.
Allocated Busy
Microprocessor instructions have the following format:
5.
Truncated Postamble
6.
Extra Device End
7.
Sense Reset
[label]OPCODE field 1 ,field2[comments]
where label is a one- to eight-character name by
which the instruction can be referenced. Branch
instructions point to locations in the microprogram by
label.
OPCODE is the operation to be performed on the
data or addresses in Field 1 or Field 2.
Verify factory plugging:
Card locations = B2J2
A2G2
Field 1 is generally the address of a Local Storage
Register. In some instructions this field may be a
branch condition or ROS page number.
Field 2 is generally a constant. referred to as a
decimal number or by a symbolic name. The value of
symbolic constants for each microprocessor is listed in
the beginning of the listings as EQU statements. In
some instructions this field may be a branch address
or transfer code.
Field 2 can contain several symbolic constants
combined arithmetically, that is, the sum or difference
of two or more constants.
('I
0
IJ
17
000
8
15
6
("2·high" card)
Note: If RPQ 510231 is installed see pluggmg instructions on
pages 52-103/104.
17
16
15
8
6
-
-
r
For example, the constant in the instruction:
ADD WORK 1,ONES-17 4
Plug If
location B2J2
,ALU l'
0
results in the constant hexidecimal FF (ONES) minus
the decimal value 174, or a deCimal value of 81.
0
0
-,-
Plugged
for 3803
_ _ .J
Model 2
0
0
0
-.L
_
Plug It
location A2G2
iALU 2'
FIGURE 1
• Copv"\Ih' 'n,em...,.,. B_..... Mech.... C..--.."'" 1976. 1979. 1980
52-030
52-035
OPER-MP REGISTERS
·
HIGH-ORDER ROS REGISTER
The High-Order ROS Register in each microprocessor
holds the 8 high-order bits of a microprogram
instruction. The registers in MP1 and MP2 are identical.
Bits 0 through 3 contain the operation code. Bits 3
through 7 contain a branch condition or LSR address.
Bits 4 through 7 and the Hi/Lo latch can also contain
the LSR address.
B Bus (O-n AlUl (or 2)
A
....
-lSR Out Bit 0 AlUl (or 2)
...
-Xfr lSR to A Register
....
Bit 3 will be zero for OR. AND, ADD, XO, and STO
instructions. In these instructions, bit 3=0 allows the
addressed LS'R to, be updated.
A Register
A
Fl
(8)
Bit 3 in this register serves different purposes,
depending on the instruction being executed. Bit 3 is
part of the operation code for the modified instructions
ORM, ADDM, ANDM, and XOM. This use prevents
updating the LSR by blocking the gate to the LSR, ClK
OR
ROS Reg 18-15)
MPl
A Bus (0-7) AlU 1
MP2
A Bus 10-7)
Mask
...
+Clock 4 AlUl lor 2)
15.
A
r-l:::a.
Bit 3 is part of the branch condition code for the BOC
instruction. There are 32 branch condition codes used.
MP1
lOW-ORDER ROS REGISTER
The Low-Order ROS register in each microprocessor
holds the 8 low-order bits of a microprogram
instruction. The registers in MP1 and MP2 are identical.
The output from these registers goes to the A Bus, the
transfer decode circuits, or the Instruction Counter,
depending on the instruction.
~
MP2
ALD
Card
ALD
Ca rd
AB301
B2C2
AA291
A2 N2
ROS Reg
+ ROS Bit 10-7) or 18-15)
........
A
N
A REGISTER
The A Register serves as a buffer for information from
an LSR that is used as input to the AlU. The contents
of the selected LSR are gated to the A Register by XFR
LSR TO A REGISTER. The next logic operation (ADD,
AND, OR, or XOR) ORs the contents of the A Register
with the contents of the instruction's Field 2 and places
the result on the A Bus.
r-...
Fl
181
10 7)
OR
ROS Reg 10- 71 or 18-1SI AlU 1 lor 2)
Fl
18)
18-1S)
+ Clk 1 not CE Cycle Mode l2
During logic operations, the A Register is reset by the
CLK 4 line.
,...
MP2
MP1
ALD
Card
ALD
Card
Order
ABOSl
B202
AA06
A2M2
low
Order
AB061
B2E2
AAOS
A2l2
A
.,....t::.
~ High
52-035
\.
C)
(~)
\..
(j
C)
~.
/
",\
'-- --'
(
,~
i
'--.
0'
/
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52-040
OPER-CHANNEL TAGS
CHANNEL TAGS IN REGISTER
CHANNEL BUS IN REGISTER
The Channel Tags in register holds the channel tags
bits until they are transferred to the Channel Bus In.
Individual register bits are used as follows:
The Channel Bus In register serves as a buffer to
transfer bytes from LSRs in MP1 to channel.
-8 f3us (0-7) ALUI
-B Bus (0-7) ALUI
A
N
FL
+CTI Bit (0-7)
(8)
(To Channel)
+Reset CTI Reg A
A
A
'"
~
+Combined Bus Data (0-7)
Bit
Function
0
Chain Hold A
Chain Hold B
Hold Interface or Busy
CU Busy
Service In
Status In
CTI Bit 5 to CE
Address In
CTI Bit 6 to CE
Opln
4
5
6
7
© Copyright International Business Machines
(To Channel)
FC171
A2R2
FC161
A2R2
2
3
OR
A
.-t::::.
I
CBI Bit (0-7)
8
FLs
+Xfr LSR to Channel Bus In
+Xfr LSRI to Channel Tags
'"
'"
CorporatIon 1976. 1979
52-040
(
OPER-TUBO REGISTER
52-045
TAPE UNIT BUS OUT (TUBO) REGISTER
The TUBO register is a buffer to hold control
information. High speed output is ORed with data bus
bits.
The TUBO register stores MP2 control information for
the 3420. The output information is multiplexed with
tag lines (MOVE, CONTROL, COMMAND) to control
tape unit functions.
-Bus 0·7 ALU2
h
A
N
I'-.....
S
FLs
TUBO Bits 0·7
OR
(S)
A2R2
TUBO BitsO·7
FD021
To:
+Xfr LSR2 to TUBO
'"
A
~
FD021
A2R2
./
~
52-045
© C~pyright International Business Machines Corporation 1976. 1979
.",
XC091 - Devi ce Interface Primary
SC10l - Devi ce Interface Secondary
PROSl - CE Sel Reg
o
c
(
(
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(
(
(.
(
OPER-MP REGISTERS
52-060
D REGISTERS
MP1 SPECIAL REGISTER (HARDWARE
ERRORS)
The D Register serves as a buffer between the ALUs
and LSRs.
The Special Register in MP1 (AB461) is not used as a
conventional register, because the input gate is always
active and the latchback is always inactive. MP1
hardware errors merely pass through the register
becoming SPEC REG BITS 0-7. When needed, parity
bit is generated to maintain odd parity.
A CLK 22 pulse loads the data into the D Register and
resets individual positions when no data is available to
load them.
Transfer (XFR) microinstructions gate input from BUS
OUT.
MP2 SPECIAL REGISTER (TU BUS IN)
The Special Register in MP2 (FD011) is used as the
Tape Unit Bus In Register. The Device Bus In bits are
called DEVICE BITS LATCHED. The register gate is CLK
18 SET TUBI ALU2. When needed, parity bit is
generated to maintain odd parity.
MIST OR TCS REGISTER (MP1)
Special Register bits are activated as follows:
CLK 21 degates D Register input from the ALU during
store and transfer operations. During logic operations,
this input remains active because CLK 21 does not
occur.
Spec
Reg
Bit
o
1
2
3
4
5
6
7
Error line
ALU Parity Error ALUl
ROS Parity Error ALU 1
IC or XFR Parity Error ALU 1
Microprogram Error ALUl
Instruction Care Error ALUl
D Bus Parity error ALUl
Unused
Branch Error Interface ALUl
The MIST (Multi-Interface Tags) Register (FC181) is
used as a Request In Register when the Two-Channel
Switch (TCS) feature is installed. This register has four
bits assigned as suppressable and non-suppressable
REQUEST INS for Channel A and B.
Bit functions are:
Bit
Function
4
5
Suppressable REQUEST IN Channel A
Non-suppressable REQUEST IN
Channel A
Suppressable REQUEST IN Channel B
Non-suppressable REQUEST IN
Channel B
6
7
-LSR Out Bit 7 ALUl lor 2)
+ TIE Up ALUl (or 2)
(
r-.....
-
A
'"
Gate Channel Bus Out to ALUI
I
+Bus lOut) Bit (0-7) to ALUl
+(ALU) Register In Bit (0-7) ALU2
~
x--
OR
.......
N
DReg
r--..
r-.....r-.....
A
-~
-Adder (0-7) Out ALUl (or 2lf'...,
+Clk 21
r-.....
A
D Bus (()..7)
8
FLs
~
To LSRs
r-.....
+Clk 22
J::::=
A
~
AB341
B2C2
AA331
A2N2
IMP1)
(MP2)
3803-2/3420
© Copyright International Business Machines
Corporation 1976. 1979
52-060
(
OPER-ARITHMETIC ADD
Long Cycle
o
25
Step IC
Load ROS Reg
Hi ROS Panty Check Sample
Lo ROS Parity Check Sample
Set Lookahead to Incremented IC Address
ADD/ADDM (HEX CODE A OR B)
50
75
100
125
150
175
52-065
200
~
1.
The LSR byte selected by Field 1 (ROS reg bits
4-71 is placed on the B Bus.
2.
The A register is ORed with the constant in Field 2
(ROS reg bits 8-15).
Sample DReg
3.
The result is placed on the A bus.
Gate D Bus to LSR (if ROS reg bit 3 not active)
4.
The A bus and the B bus are added together.
5.
The result is placed on the 0 bus.
Reset A Reg
D Bus
If the operation is an ADD, the 0 bus is stored into the
LSR byte addressed by Field 1 and the Hi/Lo latch.
The r~sult of an AOOM operation is not stored in an
LSR. The result of either operation remains on the 0
bus until the next ALU operation. While on the 0 bus,
the result of the operation is available for branch
control. The A Register is reset at the end of the
operation.
o
Low
LSRs
B Bus
15
16
Hi
LSRs
31
A Reg
Select Low LSRs
Select Hi LSRs
/
""'---1
PC
Set by (5006) Xfr Hi LSR
Sample of an Arithmetic ADD Instruction
ADD WORK1. 1
Reset by (4006) Xfr LSR
]
,
Bump lowest counter
L..._ _ _ _ _
L..._ _ _ _ _ _ _
' -_ _ _ _ _ _ _ _ _
' -_ _ _ _ _ _ _ _ _ _ _
' -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _
' -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
Programme(s comment
Field 2 mnemonic of the constant
Field 1 mnemonic of the LSR being selected
Mnemonic of Arithmetic Add op code
Mnemonic of the location of the instruction (Label)
Field 2 Hex value of constant
' -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Field 1 Hex value which will select desired LSR
~------------------ Hex value of ADD OP code
ROS address at which this instruction is located
52-065
(() Copyright International Business Machines CorporatIon 1976, 1979
C)
C)
o
o
o
\)
'---
C)
C) C) ()
r""
'I
\
;i
(
(
(
(
(
(
(
(
(
(
(
('
(
(
(
(.
52-070
OPER-LOGICAL AND
Short Cycle
AND/ANDM (HEX CODE C OR D)
o
25
50
75
100
125
150
Step Ie
1.
The LSR byte selected by Field 1 is placed on the
B bus.
2.
The A Register is ORed with the constant in Field
Load RDS Reg
2.
Set Lookahead Latches to
Incremented IC Address
3.
The result is placed on the A bus.
Set DReg
Gate D Bus to LSR (if RDS Bit 3 Not Active)
4.
The A bus and the B bus are ANDed.
5.
The result is placed on the D bus.
Reset A Reg
D Bus
If the operation is an AND, the D bus is stored back
into the LSR byte addressed by Field 1 and the HI/La
latch. The result of an ANDM is not stored in an LSR.
The result of either operation remains on the D bus
until the next ALU operation. While on the D bus, the
result of the ANDM operation is available for branch
control. The A Register is reset at the end of the
operation.
o
1_ • •
Low
LSRs
15
16
Hi
LSRs
31
B Bus
14_-
Select Hi LSRs
Sample of a Logical AND Instruction
A Reg
Select Low LSRs
/
t----1PC
Set by (5006) XFRH LSR
Reset by (4006) XFR LSR
Reset the Flag
1.
Programmer s comment
Field 2 mnemonic of the constant
Field 1 mnemonic of the LSR being selected
Mnemonic of Logical AND DP code
Mnemonic of the location of the instruction (Label)
....- - - - - - - - - - - - - - - Field 2 Hex value of constant
Field 1 Hex value which will select desired LSR
Hex value of Logical AND DP code
RDS address at which this instruction is located
Hi/Lo
Latch
o
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Dp Code
Field 1
Field 2
RDS Register
AND DP
Hex
(C or D)
RDS
Selett
RDS Page
Page Reg
(Hi IC)
Low IC
52-070
1:.... Copyright Interna'tional Business Machines Corporation 1976, 1979
(
OPER-LOGICAL OR
Shon Cycle
ORI/ORM (HEX CODE 8 OR 9)
0
25
50
75
1.
The lSR byte selected by Field 1 is placed on the
B bus.
2.
The A register is ORed with the constant in Field 2.
3.
The result is placed on the A bus.
4.
The A bus and the B bus are ORed.
Set 0 Reg
Gate 0 Bus to LSR (Not ROS Reg 3)
5.
The result is placed on the 0 bus.
Reset A Reg
Hi ROS Parity Check Sample I
Lo ROS Parity Check Sample
Set Lookahead Latches
to incremented IC Address
If the operation is an OR!, the 0 bus is stored back into
the LSR byte addressed by Field 1 and the Hi/lolatch.
The result of an ORM is not stored in the lSR. The
result of either operation remains on the 0 bus until the
next AlU operation. While on the 0 bus, the result of
the operation is available for branch control. The A
Register is reset at the end of the operation.
100
125
150
I
Step IC
Load ROS Reg
-
I
o
Bus
o
Low
LSRs
15
B Bus
1,6
Hi
LSRs
31
A
Reg
4 - - Select Low LSRs
/
I----Ipe
Select Hi LSRs
Set by (5006) XFRH LSR
Reset by (4006) XFR LSR
Hi/Lo
Latch
Sample Logical OR Instruction
o1
.01"
Mask for Stop Bit
......- - - - ......- - - - - - ......- - - - - - - - ......- - - - - - - - - - ......- - - - - - - - - - - - - - ......- - - - - - - - - - - - - - - ......- - - - - - - - - - - - - - - ......- - - - - - - - - - - - - - - - - -
•
Programmer's comment
Field 2 mnemonic of the constant
Field 1 mnemonic of theLSR being selected
Mnemonic of Logical ORI OP code
Mnemonic of the location of the instruction (Label)
Field 2 Hex value of constant
Field 1 Hex value which will select desired lSR
Hex value of Logical OR OP code
ROS address at which this instruction is located
8 9 1
4 5 6 7
Field 1
23
Cc;>de
11 12 13 14 15
Field 2
ROS Register
OR OP
Hex
8 or 9
ROS
Select
ROS Page
Page Reg
(Hi Ie)
Low Ie
3803-2/3420
52-075
o o
o o
o
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,
"-J'
,,-)
/"_.--....,
./.0 ~~\
' ..
/
\
"-
"
/"
.,~"
(
~
)
/-.'
\
'.
'.
/
(
(
c c
(
f
(
(
(
(
(
(
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(
(
(
OPER-CLOCK CHART
(
(
(.
(
(
(
53-015
DATA FLOW CLOCK
Clock Output
-10.24 MHz Divider
- Tape Op Powered
A
A1C2
o
r----
25
50
75
I
0 -'50
I
t---.!:~I£.-.--1
BS021
I
100
I
I
25·75
I
CD151
CD251
CD351
CH061
CH081
Skew and Master Clock Zone 1
Skew and Master Clock Zone 2
Skew and Master Clock Zone 3
Format Character Clocks
Residual Frame Controls
-0 - 50 Clock Bus YB
CB411
CE10l
CN281
ROC Counter
Sl Register
NRZI Hi Clip and Read VRC
-0 - 50 Delayed
BS051
Read Buffer Controls
-0 - 50 Clock Bus A 1 Delayed
BN051
BR071
DC and Xlate Controls
Cycle Request Latches
-25 - 75 Clock Bus YA
CD151
CD251
CH061
CH141
Skew and Master Clock Zone 1
Skew and Master Clock Zone 2
Format Character Clocks
Modular 7 Residue Compare Equal
-25 - 75 Clock Bus YB
CB411
CD351
CN281
ROC Counter
Skew and Master Clock Zone 3
NRZI Hi Clip and Read VRC
·25 - 75 Clock Bus A 1 Delayed
BN071
BR071
Read DC and XI ate Control (7-trk Mode)
Cycle Request Latches
-75 - 25 Delayed
BS051
Read Buffer Controls
I
25 . 75 Delayed
I
i
Use
-0 - 50 Clock Bus Y A
I
o . 50 Delayed
ALD
I 50 . 100 Delayed
I
3803-2/3420
53-015
I()
Copyright International BUSiness Machmes Corporation 1976, 1979
53-020
OPER-CLOCK/COUNTER
WRITE CLOCK AND WRITE COUNTER
WRITE CLOCK
Running
I--
-WCl
~A
A
-WC15A
-6250 Repowered
~
~
WC9
-6250
BW16l
BW151
Reset WRITE TIME GATE.
With WRITE CNTR=O. flip CNTR B FF. (Write Group B
Branch)
WC6
2
BW151
Gate SET 2ND BUFFER.
WC7
3
BW161
Sample WR TGR VRC.
WC9
5
BW09l
PE Diagnostic Mode.
6
BW15l
BYV'6'
Set SAMPLE FL if CNTR 4 is On.
Flip ODD/EVEN CHAR FF.
7
BW161
Generate WR TGR GATE if not NRZI.
9
BW091
Step WRITE COUNTER 1.
11
BW091
BW101
BW151
BW161
Step WRITE COUNTER 4 if 1 and 2 are off.
Restart Clock (6250).
Set Write Controls.
Sample WR TGR VRC.
WC5
OR
-
A
f-A
I
....
WC 11
A
"
,,'"
I-
we
T
,.j,
,.,.,
11
WC 13
Not 6250
Al G2
..
"
...b
WC 15
Tape Op
BW10l
A1G2
BW10l
A
P
13
BW161
Set WRITE TIME GATE (PE and NRZI).
15
BW151
BW161
BW10l
Gate SAMPLE SET trigger.
Generate WRITE TRIGGER GATE.
Restart Clock (PE and NRZI).
WRITE COUNTER
Cntr 1
FF
Wr Cntr
ALD
0
BW15l
BW151
1. 2. 4A
BWO"-05'
--P
Use
Cntr 1
1
1
WClt
1
WC2
Wi f-~ A
~
Reset Error Sample.
With CNTR=O. Gate Write Controls A 1. A2. Markl. Mark2.
Format. Initiate Sample. All Ones Branch Condition.
0
WC3
IA
-usee Freq
Use
BW15l
WC1
Clk
Start
Wr Cond
ALD
WCO
~
I
-W[
WC Pulse
Write
Clock
I\. A OR
f--
With WCO. See WCO Pulse.
Gate END MARK FL.
Gate CNTR B FL at WC1.
BW151
4
With WC6 and Not NRZI. Sample BUFF ER EMPTY.
With WC15 and NRZI. Sample BUFFER EMPTY.
I--
FF
Gate Write Encoder.
Cntr 2
...
~
,..b
A
Not End Ones Latch"
~.
P
FF
Cntr 4
-
A
Not Tape Op
-Diagnostic Mode
I\.
-Not Format
I\.
A
A
"
OR
Lb
OR
-wc
2 I\.
-Set Write Group
Buffer 2
A1H2
BW091
A
-Write Cntr 01\.
-Write Cntr=O
50-001
A1G2
BW151
BW091
A1H2
WC 1'"
Write Counter: Gates bytes to the
write triggers.
53-020
© .Copyright International Business Machines Corporation 1976. 1979
) 0
i)
~"
o
!~
'" )
r~
\",,)
0
4)
~i
0
() f)
'- ..
,~,
""
~
~"
\,-y
0 (J
\'
r~
'"j
,.E'
""I
i
~/
,/
,
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
OPER-LOGIC CIRCUITS
(
53-025
Byte
Dlst
WRITE GROUP BUFFER CONTROL
6250 Mode
Spec
.....
-Set Byte 1
A
-Set Byte 2
50-001
+Read Cycle
-Set Byte 3
Pseudo Cycle
-Set Byte 4
FF
A1F2
BR041
-Byte Dist 2
First Resld
-75-100
.... A
.....
CRC Gate
Fl
....
Pseudo Cycle Req
....
...........
~.;;...;..;;.;;..-
-Not NRZI
CRC Cntl
Fl
-Fill Write
Group Buffer
~
A
(
FL
-Byte
Dist 4 ...
~
ORC Cntl
CRC Cntl
AR
Fl
A
.....
-Stop to Data Flow
-----.....,~End Write Seq
A
-End Cond
Fl
.bl
+Set CRIC Reg
..... L..fN"b
L._~
_~::.......~:.rAl
........ A
A1F2
~
Byte Ctr 1
....
-Byte
Dist 6
A
FF
.. p
~
~~
.....
.....
Reg
~
-CRIC 1 .....
"':Byte Reg 2
1'0...
-Byte Reg 4
~
+CRIC Reg 1
W
I
}
A
Wnte CRC or
Residual
(Module 7)
"""- OE
If
~
A1G2
BW121
Pad Gate
BR051
p-Byte Reg 1
Resid
Gate
I.....
A1F2
Byte Ctr 2
~
Fl
L-.
-
-
A
~
BR041
FF
a..-p
....
Resid Cntl
--t....
A
A1F2
BR051
+Pad Gate
(Degates Channel
Buffer Out)
Byte Ctr 4
FF
0-
~P
-Tape Op
BR041
© Copyright International" Business Machines Corporation 1976. 197.9
A1F2
BR041
53-025
(
(
OPER-LOGIC CIRCUITS (Cont'd)
53-030
CHANNEL BUFFER CONTROLS
+ Read or Write
..
Read Op
50-100
A
+CRIC =CROC
+25-50
Rd Byte Buffer Empty Sync
Read and Tape Op
+Combined Resid 32 Cmpr
Full Frame
+ORC Control
..
Write GB Empty Sync
-Write Requestt.. Req CB Wrt
-
Fl
rJA
-25
+ Reset
r-..-
-Tape Op
rJA
-Write Group Buffer Empty
- rk
~
A OR
~
A
-
.......
rt:
-Read and Tape Op lr-...r........ A
0-50
N
......,...
A
~A
A1 F2
BR071
A
I-
~A
+Read
Cycle
Reset
53-035
(Empties
Channel
Buffer)
A1F2
';:::
A
+Tape OP.....
53-035
BR011
-
OR t -
A
-Read Cycle
"-
It..
-25-50
I--
r--
A
53-040
Write Data Ready
-0-25
......
NA
L.
- Tape Op
~
A1F2
I.....
~+wm'
N
OR
A
I-A
BR011
Fl
_+ Difference Reset
53-035
t-.,.
Wr Cyc Req
A1F2
......
r-...
..~
---
..-- ~
I".:
'"
k
Fl
A
-Buffer Full
'"
I
Fl
I-
Write Cycle
""'-
-Write
Cycle Request
lRfA
L..
-Tape Op
I-
r-...r~A
A
-25-50B
~
A
..JA
I...
A1F2
BR061
OR
~
I~
-75-100
p.J-
~A
-
BR011
WD Rdy
Fl
Rd or
Wrt Cycle
BR071
+25-50
+25-50
I......rA1F2
BR071
BR071
-50-100 Delayed
NRZ
BN071
L.
+Read Cycle
Fl
-Tape Op
BR111
r-Et-
-
A
-25-50
.....
-,..;;
r-...
wlo
r-...
It..
~ Read Cycle
BR071
CH021
-Not Data Converter ONI;:
'h: I - -
+25-75 Delayed
-Fill vvrite Group Buffer
'" - Read Cycle Request
A
L..b
-Req CB Wrt Cycle ~ Ceq CB Write Cyc
~
A
- Req CB Wr Cye Chan
DOT
DOT
+NRZI Write Req
......
r-...
Ir-...
I......
Fl
Ir-...
ipo,;:
lb
A1F2
~r~sent
OR
rfo,; A
I ......
A
BR071
CH021
t~
t-...
Write Op
r-...
r-...
-Stop or Full Frame
OR
Rd Cye Req
......r;
I
Fl
H
(Fills
Channel
Buffer)
A1F2
BR011
-Write Cycle
"
53-035
+Write
Cycle
Reset
OR
BR071
+Buffer Write Cycle
A1F2
BR071
(53-040 Initiates
Service for Data)
BR071
53-030
C)
o
C)
o
:",3
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(~,
\, J/
()
()
,r''),
;
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jK-~\
(-"!
", j/
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(
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(
c
(,
OPER-LOGIC CIRCUITS (Cont'd)
A
75-100
53-035
Step Cntr
CROC
Adr Reg
CROC
Adr Cntr
Reg
CROC 1
4
CROC 4
8
ICROC 8
16
OR
DOT
CROC 16
A1F2
BROIl
+Read Cvcle
00-31
50-000
(Channel Buffer Adr)
8
+Chnl Bfr
Address
16
Read Cycle
I
I
(Resetl
DCD
2
4
A1F2
(not) Tape Op
Address 1
OR
DOT
2
CROC 2
-Read Cycle
53-030
+Chnl Bfr
Reg
o
(Reset)
BR021
A1F2
A1F2
BR021
53-030
BR031
CRIC
Adr Reg
-Write Cycle
Reg
CRIC
53-030
r
A
ntr
Reg
(Step
Cntr)
A
CRIC 1
2
CRIC 2
4
-75-125
16
CRIC 16
I
I
(not) Tape Dp
-Xfr Pulse Reset CRC
x
Read
(Reset)
Chnl Bfr
(Presets Cntr
1)
A1F2
Ir--~F~L~--l-____Jto
BROIl
Set CRIC Reg
o
A1F2
(Reset)
0-
!
I CROC 1
TR
CROC 2
-Read and Tape Op
! CROC
BROIl
-Stop to Data Flow
Al F2
BROIl
Reg
.....
.....
16
64
A
Buffer
Full
..J::a
16
I--
TI
A1F2
.....
.....
.....
0-
Set CRIC Reg_
!
I CRIC 1
1
R
l"..
1'0.
--
+Difference Reset
A1F2
53,030
~
BR021
OR
to...
Read Req or Wr Cycle
Reg
A
OR
....
.... t-;:-
Wr Buffer Empty
Stop to Data Flow
Overrun
"'"(To Sense
Latch)
I--
.....
8
! CRIC 2
.....
4
CRIC 4
1'0.
1'0.
2
CRIC 8
CRIC 16
......
I
(To Cycle Request
Latches)
A
r--
CRIC Reg
Buffer Full
!'o...
OR
(To Microprocessor)
_
FL
L
32
BR021
Rd Channel
Buffer Branch
.
.....
.....
128
.....
.....
I
A
A1F2
....
....
....
CROC 4
i CROC 8
Tape Op
0-25
CROC Reg
BR021
_
Set CRDC Reg_
.b
Decoder
Array
~
1
L...J::::.
.....
h.
,....b
A1F2
A1F2
......
BR021
BR021
.....
-00-25
....
6 or
Fewer
A
FL
BR021
to...
6 or Fewer Bytes on Bfr
(To End Cond)
OR
A
I-
+ Difference Reset
53-030
A1F2
BR021
©
Copyright International Business Machines Corporation 1976. 1979
53-035
53-040
OPER-LOGIC CIRCUITS (Cont'd)
WRITE SERVICE CONTROLS
-G
-Write and Tape Op
Not etl
......
A
"-
..b
Service
-Service Response .....
.b
OE
~
A
A1e2
BS031
~
,......
P
r--
A1C2
BS031
OR
i"o...
A1C2
BS031
-Service Only
.....
.....
-Write & Tape
Op Not Ctl
+ Stop to
Data Flow
Buffer
FF
53-030
+Buffer Write Cycle
-
P
.-
~
~A
+ Overrun
Error
+ Service Only
......
A1C2
BS031
-Service Out
A1e2
BS031
Service In
A
+Write Service In
-
BS031
......
"-
~
Permit
rb
FL
"-
......
.....
Match
A
OR
Data Out or ....
Svc Resp
P
....
A
I - OR
I ......
......
"-
A
A1C2
BS031
OR
DOT
+Service In for Data
BS041
A
-
OR
A
Data In
+Write Data In
+Data In
OR
-
A1C2
8S031
FF
~
,.....
A
BS031
Alternate
A
-t:
,.....
A1C2
BS031
lb
53-030
Different
FF
b
-Write Data Ready
"-
-Data In
BS041
J
"
1
+ Read & Tape Op
,.....
,.....
A
J
,..,.
-Set WRT Register
Objectives:
50-000
1.
The AlTE RNATE flip flop controls alternate Service
In and Oata In cycles.
2.
The PERM IT flip latch ensures that multiple tag
lines will not be active at the same time.
3.
Buffer Write Cycle or Req controls Service
Different and Buffer.
+Reset Sense Data
53-040'
I""~
"-~
(\
",-.YJ
r"\
(,)
r",
i
'I
'-....Y
(1\
,,-y
,
1
0 0 0 r'"
"-.Y
/-~
\ ... Y
r--~
'-......j)
0 0 0
;':
(j C)
'-. . . ,
0
1"-)
~:
.,....'' ',,
~yi
(~
\...y
r~
ly'
r~,
I
\, .
Y
r~,
\ ..y
()
(~
~)/
/
'''.
-,
/'
{
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
53-045
OPER-LOGIC CIRCUITS (Cont'd)
CHANNEL WRITE BYTE REGISTER
POINTER REGISTERS
WRITE CHECK REGISTER
Hdw
Ptr P 0-7
- Pointer Trk P, 0-7
-Set Group
Bfr Hdr Ptrs
-Bus Out Bits 0-7-P
-Read Data Trk 0-7, P
-PE Pointer Trk P,
Channel
Write
Byte
...
r"
OR
Reg
Wnte Bus Bits 0-7
OE
~
j:b
o-;.ji
Fl
A
A
Write
Check
Reg
(11 )
+Reset GB
.....
+Read & Tape Op Pow
~
""'""-
~
A1F2
BR031
-ORC Shift,.."
-Channel Buffer
Out P 0-7
+ORC Reset
(To Channel Buffer)
50-000
(9)
r-...
A1G2
BW171
Y1M2
Yll2
Y1K2
I"-..
-GB Ptr p, 0-7
(Reset Group Ctrs)
CD191 - Zone 1
CD291 - Zone 2
CD391 - Zone 3
-ORC 0-7
(To Write Channel
Buffer Ga ting)
50-001
Hdw p, 0-7
-Set Group Bfr Hdr Ptrs
OR
-
A
Fl
(9)
50-002
~
+Set WRT Regs
+Step Ptr Ctrs
A1F2
BR031
+End of Data or PE
Objective:
Objective:
This register is a temporary buffer for the channel
buffer write byte from either interface bus out or read
data track.
An ORC byte character is generated for each ECC
group.
.....R=t
.....
A
-
+Ct 8 Trk P, 0-7
~
OR
-FB Ptr Tk P, 0-7
Y1G2
CJOll
Objective:
The POINTER register accumulates the pointers for one
group of 6250 data. These pointers are used for
correction as required.
3803-2/3420
53-045
© Copyright International Business Machines Corporation 1976. 1979
--
- -------
-~----.-----------
- - - - - -
--
_._-------
53-055
OPER-LOGIC CIRCUITS (Cont'd)
-Channel Buffer Out p, 0-7
READ SEQUENCING AND AlB READ REGISTERS
To Wrote
Dataflow
50-000
+ Set B Rd Buffer
+Set A Rd Buffer
"A" Full
+Set A
Read Buffer
0K
-
FF
p
FF
OE
Need Byte
-Read & Tape Op
A1C2
BS041
'"
OR
.....
.....
A
~
P
-Read Byte
Buffer Empty
-Read & Tape Op
A1C2
~-FiIiB
Read Buffer
-50-75 Delayed
......
......
-Read Cycle
......
BS091
"B" Full
+Set B
Read Buffer
.
-Fill A
Read Buffer
Sequencer
FF
A
L.b.
r-"""-
Reg
~X
r-b
-Set B
Rd Buffer
X
~
......
rt
...... Finish
A
-Stop to Data Flow
l0r'
......
......
...... I -A -
......
~
OR
Counter
A
(Drive)
OR
~
....
....
-B
-
~Shift
A1C2
BS041
I--
4
+Read Reg Bits p, 0-7
(To Bus In)
_ToCRCB
Gen
~.
_ {6)
A
--:
8
.....
9
A1C2
BS041
Objectives:
Channel
1.
During a read operation, the AlB registers buffer
read data to the CHANNEL BUS IN, each
alternately receiving a data byte.
2.
During a write operation, output from the AlB
register generates CRC bits .
A
OR
f-A
..... l--A
/t-.,
OR
Dot
A1C2
....
....
-Service Out
".....
",9
.....
...... r-;:-
~if~
CRC Read
-Gate B to Bus
~8
(Drove)
..
OE
,,6
"""-
Reg
BS051
...... f -A -
-Overrun Error
~
",4
r-A
......
~
Spec
B Rd Reg
b
r--
"""-5
...b.
t
h.
~
A1C2
BS051
OE
A1C2
+Data Out or
Service Out Resp
-Set A
Rd Buffer
-Gate A to Bus
P
-Shift CRC All
A Rd Reg
"
-Wr and Tape Op
Not Ctl
9
J
.....
A1p
BS041
3803-2/3420
53-055
© Copyright International Business Machines Corporation 1976, 1979
)
0
~jJ
,,-
~
(.J
(~"\
\,,_ pi
0 0 C)
(t-,
',- jJ
/ l \~ I
(
',,--Y
0
\.Y
0 0 0
(~
,----y
() () 0
."----~~
'-'. - '
(~
,
.1
' .. .Y
0 ()
/'~
,
'----
1
""""
1
''--
y!
~'1
,,-- /'
\...y
-'-'l
(
\..JI
(~\
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
OPER-LOGIC CIRCUITS (Cont'd)
(
(
53-065
CRC GENERATORS
-Write Bus Bits
OE
A1G2
1'- Write CRC
.........
+CRC p. 0-7
........
Reg
N
BW13l
(To Channel
Buffer Gate)
50-001
-Write and
Tape Op
Repowered
+Shift CRC
CRC 0-7. P
'"
A1G2
BW13l
Read CRC
Combined ECC Data P. 0-7
r-....
-Po
0-7
OE
-Wr or Rd Forward
-Rd Backward
r-.... -
-Combined ECC Data 7-0. P
r-....
~
OR
A
L-
Yl
H2
r-....
Reg
-EOD
-6250 Mode or
CHlll
+ Tape
-
Read CRC
9- Trk Check CRC
.....
"r--t~
I---~~
~A
A
FL
- Tape Op "" ~
-EOD
~I
Op "" A
OR
'" A
.........
-EOD or
CRC OK
.:.+.;.;.Re;;;se;;;.t.;..C;;,;R.;.;C;;...._ _~
-Rd CRC 2. 4
r.......
~
t-.......................
Y1H2
CHlll
+Rd CRC P. 0-7
--
+Rd CRC
N .......iIiiii..._ .
I
EPR
Reg
NRZ
Y1D2
CNOll
~
-
OE
NRZ
DE
NRZ
~
. . . __
.OR "':::~l~
L-____J--..
-CRC Not
Equal EPR
~---
-
3803-2/3420
(() Copyright International Business Machines Corporation 1976. 1979
53-065
c
53-066
OPER-LOGIC CIRCUITS (Cont'd)
, , , 0
CRC ABC
CRC A
OE
C RCA:
-Rd Data Trk P. 0-7
.....
......
...
.....
-Write and Tape Op
-Bus Out Bit p. 0-7
.....
.....
...
OR
----'
(9)
A
A1D2
BK011
-
OE
-,...
A1D2
BK031
CRC A
A
- Read and Tape Op
....
.....
Reg
OR
DOT
-B Equal A TP
N
PEl
+Shift CRC A
+Sense Reset Repo
A1D2
BK011
+CRC A P. 0-7
50-000
-CRC B
Read Reg Bits
OE
.....
"
.....
C RC B:
Sense
Write
A=B
B=D
A=B
B=C
P Compare
CRC III
Byte 3, Bit 7
Byte 9. Bit 3
Read
Fwd.
A=B
B=D
A=B
P Compare
CRC III
Byte 3. Bit 7
Byte 9. Bit 3
Read
Bkwd.
A=B
C = Match
A=B
P Compare
CRC 1\1
Byte 3, Bit 7
Byte 9, Bit 3
OE
A1D2
BK031
CRC B
Error
NRZI
6250
~
OR
DOT
-B Equal C TP
Reg
~
Shift CRC ALL
-Tape Op
A1C2
BS081
+CRC B P. 0-7
....
OE
CRC C:
.&iii
OE
-Read Data Trk P. 0-7
...
CRC C
A
-Forward Repe
!
-Road D... T'"
.......
7"'~
I--
Reg
OR
A
A1D2
BK021
-Rd Data
Trk P. 0-7
-Store 0 Pulse
.-
CRC 0
,,~
Reg
T'
-CRC C
+Sense Reset Repo
"
+Shift CRC C
rIT;
A1D2
.....
BK021
"8-
-B Equal 0 TP
CRC 0:
A1D2
BK031
.
+CRC C P. 0-7
53-066
© Copyright International Business Machines Corporation 1976, 1979
)
o ()
o a o
(1
o
o ()
r -"
\,,->
f
~""'";'i
'
'\.j
"""", 0 ,
"0
j
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(/
("
(.
(~
(
(.
(
( ..
I
I
OPER-CRC DESCRIPTION
53-067
CYCLIC REDUNDANCY CHECK (CRC)
GENERATION
CRC USE DURING READ BACK CHECK OF
WRITE OPERATIONS
CRC GENERATION DURING 9-TRACK READ
FORWARD OPERATIONS
CRC GENERATION DURING 9-TRACK READ
BACKWARD OPERATIONS
Two cyclic redundancy check (CRC) errors set sense
bits. A CRC error sets sense byte 3, bit 3 and a CRC III
error sets sense byte 9, bit 3. See 50-000, 50-001, and
50-002 for relationships to data flow.
a.
CRC generation during a read forward operation is
similar to CRC generation during the read back check
of a write operation. Data bytes read from tape go to
the channel buffer (50-000) and also into CRC A
register. CHANNEL BUFFER FULL initiates data transfer
to the Interface Bus In and also shifts bytes into CRC B
register. Accumulated contents of CRC A and CRC B
registers are compared when the channel buffer
empties (53-066). Dropping or picking up a bit or bits
in transferring data through the channel buffer results
in a mismatch and sets P COMPARE ERROR (byte 3 bit
7) and sense byte 9, bit 2.
CRC generation detects the loss or gain of bits
transferred through the channel buffer during both read
backward and read forward operations.
Data previously written is read back through the
normal read data path and the Check CRC Byte is
stored in the CRC D register (50-000). CRC D is
compared with CRC B; a mismatch sets CRC III
error and sense byte 9, bit 3.
CRC GENERATION DURING 9-TRACK WPITE
OPERATIONS
Write data from the channel is shifted into the CRC A
register (50-000), byte by byte, as the channel buffer is
loaded. As the data is being read out of the channel
buffer, the output is shifted into the CRC B register
(50-000), as demanded by the write section.
Accumulated contents of CRC A and CRC B registers
are compared when the channel buffer empties
(53-066). Dropping or picking up a bit or bits in
transferring data through the channel buffer results in a
mismatch and sets P COMPARE ERROR (byte 3 bit 7)
and sense byte 9, bit 2.
a.
6250 bpi Mode
The content of the CRC A register is written on
tape as the CRC III byte. The CRC III byte is also
shifted into the Write CRC generator (50-001) with
data and other bytes. Content of the WRITE CRC
register is also written on tape as a CRC byte.
b.
6250 bpi Mode
During the read back check, all data bytes and
other bytes are shifted in the READ CRC register.
The result should be a match pattern in the READ
CRC register. Any other pattern sets CRC error
only.
b.
c.
PE/9-Track NRZI Modes
6250 bpi Mode:
Only data bytes are read back and stored in CRC C
register (50-000). Contents of CRC C register are
compared with CRC B (53-066). A mismatch sets
CRC III error and sense byte 9, bit 3.
CRC generation and use during 6250 read
operations is identical to CRC use during read back
checking.
6250 bpi Mode:
Read CRC error determinations are identical in 6250
read backward and read back checking operations
except that bytes are shifted into registers in a
reverse order.
The CRC C register accumulates combined data
bytes and the check CRC bytes. With no read
errors, the result should be a match pattern in the
CRC C register. Any other pattern sets CRC III
error and sense byte 9, bit 3.
7-Track NRZI operations do not use a CRC checking
procedure.
9-Track NRZI Mode
All data bytes are read back and combined with
the CRC byte in the READ CRC register (53-065).
The accumulated bits should result in a match
pattern. Any other pattern sets CRC Error.
PE Mode
CRC III is generated during PE operations for write
checking, but is not written on tape.
c.
9-Track NRZI Mode
Only the accumulated data bytes generate the CRC
byte.
53-067
53-070
OPER-WRITE LOGIC
WRITE TRIGGERS
PE Diag Mode
.f'.
.........
..t::::.
Write
Encoder
-Gate Write Not End Burst/
-Gate Write Not TM/
-Gate Write
+ TUBO Bit P. 0-7
A
OR
A
1
+PE Mode
OR
........ ~
+Bit P. 0-7
-N
--
r;::
--
........
-WC15
-WC7
+NRZI Repowered
'" -
. f"'o....
OR
A
A
Al
A1H2
OR
~
I-6250 bpi Write Waveform
Write
Time
Gate B
6250 Write Clock
0
I
7
Bit Pattern On Tape
A1G2
WRITE TRIGGER OPERATION
PE WRITE TRIGGER OPERATION
Data bytes from the CHANNEL BUS OUT consist of
binary ones and binary zeros. The tape control and
tape unit convert these binary bits to flux changes on
tape. The 6250 bpi and NRZI methods of writing
distinguish ones from zeros by a flux change for a one
and no flux change for a zero.
In PE operation, the write clock runs from 0 through 15
for each cycle.
6250 bpi method of writing on tape flips the WRITE
TRIGGERS at Write Clock 7 to write one bits on tape.
The Write Clock runs to Write Clock 11 and then starts
over.
Reg
50-003
0
Each byte is set into the write encoder. For each bit of
the byte that is' a one, the corresponding write trigger
is "set up" at WC7. All write triggers are flipped at
WC15 to write a byte on tape with flux reversals in one
direction for one bits and in the opposite direction for
zero bits.
11
I
7
11
7
I
I
I
I
I
0
11
I
7
,
11
7
r
I
I
I
I
I
I
I
I
I
6250 Write Waveform
6250 BPI WRITE TRIGGER OPERATION
To: Device Interface Primary XC091
Device Interface Secondary XC10l
CE Select Reg PR081-101
TUBO Reg
Xfr LSR2'to
TU Bus Out
To Wr Tgr VRC
BW161
Write triggers produce magnetic flux changes on tape
in one direction when they are flipped on and in the
opposite direction when they are flipped off.
A2R2
BW061-081
BW161
Phase encoding (PE) distinguishes ones from zeros by
the direction of flux change. A flux change in one
direction indicates a one bit and in the opposite
direction indicates a zero bit.
A1H2
B Bus
P
Write Con d
OR
BW061-081
FF
(9)
- TUBO Bit P. 0-7
OR
G2
WC13-0
+6250 Repowered
P
P
A
OR
To PCT Ampl
Ctrl Trk P. 0-7
11
I
11
I
I
0
I
7
7,
11
7
11
7
I
15
7
0
I
I
I
I
I
PE Write Waveform
PE Write Clock
7
I
I
Flux Reversals at
WCl5 (Always)
I
I
15
7
I
L
I
I
I
I
NRZI WRITE TRIGGER OPERATION
PE Write Waveform
I
I
For a NRZI write operation, each byte is set into the
write encoder. For each one-bit of the byte, the
corresponding write trigger is flipped to write a flux
reversal on tape. For zero-bits of each byte, the write
trigger is not flipped, and thus, no flux reversal is
written.
NRZI Write Waveform
NRZI Write Clock
L
I
I
15
I
7
I
15
7
I
I
I
I
I
15
7
7
15
L
J
I
I
I
7
15
7
I
I
S
I
15
L
S
I
L
S
7
NRZI Write Waveform
15
7
I
I
Flux Reversals at
WC7 (Between Like Bits)
I
I
15
I
15
7
15
I
I
I
7
I
I
I
15
7
15
7
15
I
7
15
I
I
I
I
LL
I
I
53-070
(t, Copyright International Business Machines Corporation 1976, 1979
'"
.. .-J
(-)
",
'
(
0
"",
'1
j
..
..
0 0 0
_-_
.
7
!'.~
\,Y
~\
\
'<.
;J
0)
',--y
0 0 0
(j
()
0 0 0
"-...
'.
~\
-"..,
,"'-,
\
'..
.-'
"----...
/
!
()
(~i
'-
j'
(~)
\---Y
I'
:
.~
\.~j
1'''
,-.~j
('~
\.
..... J
0
t'l\
\..../
(~
(
(
(
(
(
(
(
{
(
(
(
(
(
(
(
(
(
(
(
OPER-OEAO TRACK REGISTER
The DEAD TRACK register contains one latch for each
track. After ROC has cycled, the Pointer Bus controls
setting of DEAD TRACK REGISTER latches Prior to a
ROC cycle, +SOME TRACK MARGINAL indicates that a
track is failing and the voting cir.cuits determine which
track(s) should be dead tracked. During a PE Write, if a
READ BUS signal is too weak or occurs at the wrong
time (phase error!. the DEAD TRACK latch for that
track is turned on to activate correction circuits. The
read data for that track is ignored for the remainder of
the block or until the DEAD TRACK latch is reset. Once
activated, the DEAD TRACK latch remains active until
reset by +SENSE RESET or by a resync and time sense
(6250). An active DEAD TRACK latch deactivates the
RIC for its track, removing the RIC from the RIC-ROC
compare and blocking any data from entering the skew
buffers for that track.
_-_75~-~1~OO~D~T~s~a~m~p~le ~~~'~·~----~
___
~
Lead
Track
A
~
r-...
Start Read Check TP
OR
-
f'.....1 A
CC031
r
-Not 6250 Mode
J
. - - OR
Lag
Track
r-...
----------------~
+ PE Wrt Skew TR 3
~
A
r--.... ~
.........
~
OR ~
-SK + VLD
Ptr Gate
A
~
FL
OR
~
-PE No Loss
+PE Wrt Skew TR 2
-Lead
Track Gate
-Some Track
Marginal
NA
C: 21
+PE Wrt Skew TR 1
~
CC031
-Some Track Marginal
~
CC031
FL
""'-~IOR
+Some Track Marginal
(
53-075
DEAD TRACK REGISTER
-Tape Op
+ROC Cycled
(
Vote
Decoder
(Array)
CC031
1_ ~ minus if 6 or more
~
Sync Gate
are minus
I--
I - minus if
+PE Wrt Skew TR 4
____ -1
r------
are plus
,...
6 or more
+PE Wrt Skew TR 5
+ PE Wrt Skew TR 6
- Pointer Bus Bit X
+PE Wrt Skew TR 7
CC031
-Lag Track
Gate
~
+ PE Wrt Skew
TR X
f'.....
1
NA
'--
FL
-Tape Op
:~
t:::.
-XOUTA
Bit 2
ALU2 to OF
A
-Sense Reset r - ~OR
'-_-'
CC021
+ Time Sense X f'.....
-GB Full 75-1 00
-PE No Loss
FL
(9)
CC031-111
~
~
A
(9)
-Record X
P Ptr or DT
-Start Resync Pulse
f'.....
A
-Pointer Bus Bit X
~
A
OR
+Dead Track X
CC031-111
Resync Reset DT
OR
~--A
~
(9)
CC031-111
CC021
Copyright International Business Machines Corporation 1976. 1979
OR
A
Time Sense X
One Circuit for
All Tracks
+ Record Track X
(Gates Wr OSC)
CC031-111
CC021
+Write and Tape Op
Dead
Track X
(9)
CC031-111
6250 Mode
r&.
A
- 75-100 DT Sample ~
+PEWrt Skew TR 0
+Some
Track Marginal
-ROC Cycled
~
One Circuit for
Each Track
53-075
(
53-080
OPER-RIC/ROC
RIC-ROC
The read section contains nine 32-position Read In
Counters (RICs). one for each track. and one
32-position Read Out Counter (ROC).
A RIC specifies which skew buffer position receives the
next one or zero bit for a data byte read from tape.
When a bit is de,ected, it is placed in the skew buffer.
and the RIC for that track is stepped to the next
position.
The ROC selects the skew buffer position from which a
byte is transferred to the group buffer.
Initially, all RICs and ROC are reset. As each bit of the
first data byte enters skew buffer position 0, the
corresponding RIC is stepped from 0 to 1. When none
of the RICs are equal to ROC. RIC-ROC NO-COMPARE
is activated, indicating that all bits of the byte have
entered the skew buffer. RIC-ROC NO-COMPARE gates
outputs of the ROC counter to the ROC image register
and steps the Read Ready Counter. which times the
read out of the skew buffer.
The operation continues in this manner until GROUP
BUFFER FUll or IBG becomes active to stop the read
out.
53-080
© Copyright International Business Machines Corporation 1976, 1979
1./
(~
\.....~
0
0
\
'--..y
(~\
"'-- ,~/
(-"',
J
(~
\.....)J
(,-'l\
,,;J
. "
y
0
~j
0,
~
r,
I
'---
(-~
I",_J
(~
\,--~
(-)
\-...
0
~j
{0,
.-.Y
'~j
(-\
(~
\~j
\,
. ./
\~~
(-
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
('
(
(
(
OPER-LOGIC CIRCUITS
(
53-081
RIC-ROC
ROC=O
ROC
FF
1 "" ROC Image
Ctr
2",
t"....
P
Reg
3,.....
~p.
Y1N2
-ROC Rotation Branch
(To MP2 Branch Card)
Rd Rdy
-50-100 ........ r
"l
4 ......
Y1N2
5 ......
CB411
ROC=O ......
-Tape Op
~
CB411
A
Ctr
Compare
No Compare_f"-,.
OE
(45)
Y1N2
r-.....
-25-75
A
~
b
--
......
+Sample HDB
50-002
3 ......
OR
DOT I-
Y1N2
'4 ......
CB421
~
"'--
CB421
,
\
i..-
J
A
Y1N2
~
-Lth Det Err PE
-Record
'"
Ctr
~
(9)
+RIC Reset Tk x
......
1 ,..... RIC Image
r-.....
r-.....
r-.....
r-.....
r-....
2 ......
-Nt Rd A Pwr
3 ......
r.....
r---1.
OR
10- (5)
A
~
(9)
5 ......
"
I-
Step RIC
VFC Data
-Step RIC Ctr Tk x
2
""
~
A
,.....
A
~
r-.... I - - OR
~
-Tape Op
VFC Prime Data
A
~
A
1.00-
2
....!.2.
~
FL
-Late Nt Rd B Pwrr-....
(9)
-75-25'"
......
.....l:::I
....... A
A
I-
(9)
.....
t--75-1CX:
:J
-
A
'"
,.....
"FL
(9)
-75-100 Nt Rd Rdy ........
A
FL
(9)
b
Store Cycle
,.....
Data Ready
Ib
I
-
A
-
r-.75-100",
A
FL
~
(9)
-25-75 r-....
A
.......
t".....
~
-
l
t"....
NA
FL
(9)
'"
A
RIC &
Compare
J'o....
......
........
Copyright International Business Machines Corporation 1976. 1979
OR
- Tape Op Repowered
Gate Step
""'-
f--
+Card Test Cntl
OR
......
'"
~,
--
.........
I--
+RIC Reset ......
DCD
"
FL
r-....
'"
+Dead Track
"
Reg
(32)
Ones
J:;JA
....
10 Ones
00-31
--2.
RIC 1-5/ROC 1-5
Reg
4 ......
'"
Bfr Adr
+GB Full Extend & IBG
A
SKB
"'"
CB421
Rd Out Cyc Pwr ......
5 Bit Ctr
......
Lth Det irr
A
J
+Dead Track
-Tape Op
OR
+RIC Reset
Latches & SKB
Step RIC
Ctrls.
Zone 1
P. O. 5
Y1M2 CDlll
CD121.131.141
CD161
Zone 2
2. 6. 7
Y1L2 CD211
CD221.231.241
CD261
Zone 3
1. 3. 4
Y1K2 CD311
CD321.331.341
CD361
53-081
53-085
OPER-lOGIC CIRCUITS (Cont'd)
SKEW DETECTION
ROC 2
ROC 4
ROC 8
ROC 16
RIC 2
RIC 4
RIC 8
I
I
Compare
(Array)
RIC 16
Gate Step Lth Tk x
100t-.-
r--
+ PE Write Skew Zn 1
~
PH
(9)
PE Wrt
Skew
+PE Wrt
Skew Tr P
ROS 1A
(9)
OR
(3)
+ PE Write Skew
~
~
C0151
C0251
C0351
"'"
"'......."
N
OR
DOT
C0401
-PE Mode
OR
GB Full
,.t:JA
-
-Write and Tape Op
ROS 2A
PH
(
(9)
,
I
I--
I
FL
.......
L
6250 Wrt
Skew
+6250 Wrt
Skew Tr P
OR
(3)
~
~,
5
OR
DOT
+6250 Write Skew
+6250 Write Skew Zn 1
0
A
-6250 Write Skew
N
(Gates GB Full)
OR
DOT
+PE Some Trk Marginal
+Almost Skew
Tr P
ROS 4A
PH
I
:
(9)
~
0
5
Almost
Skew
+End Sample OT
L
+Almost Skew Zn 1
OR
(3)
~
~
OR
DOT
+Some Track Marginal
~
(To Dead Track Control)
53-075
.......
-6250 Mode
~
A
OR
.........
""-
+Write Skew Error
+ Excessive
Skew Tr P
ROS SA
....
+Step RIC
+Not Gate Step Lth Tk x
PH
L
0
L
5
(9)
OR
I
(9)
I
\-,---
Excessive
Skew
I
+NRZI Wr Skew Ck+ Excessive Skew Zn 1
OR
(3)
C0151
C0251
C0351
~
OR
DOT
~
r
+Skew Chk
C0401
I
N
- Tape Op
,.......
.......
-(Not) EOO or CRC OK .......
+Sense Reset
Skew
FL
A
-
A1K2
' " -Skew Error
Skew Check
Lamp (CE Panel)
Sense Byte 3, Bit 2
BW241
One for each track
One for each zone
One circuit
53-085
© Copyright International Business Machines CorporatlOn" 1976. 1979
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OPER-LOGIC CIRCUITS (Cont'd)
(
53-090
GROUP BUFFER COUNTER
Objectives:
,.
Limits skew buffer read out to one 6250 group of
data (5 bytes per group).
2.
Controls skew buffer read out in PE Mode after the
first five bytes are read out to give one-byte-in and
one-byte-out control.
3.
Controls translator operation during a group buffer
read out to convert five parallel 6250 bytes into
four serial data bytes.
4.
Controls translator operation to detect 6250
characters and to decode format marks.
5.
Group buffer counter counts to five and conditions
translator for read out to ECC group buffer. If ECC
group buffer is full. counter stepping is inhibited.
+ECC
Group Full
-75-125
r-....
r-....
-0-50
J"'-..,.
Set Xlt Buffer 50-002
.---P
A
J"'-..,.
-ROC 25-75
r-.... . . . . .
,......
t'-....
r--
A
I--
~
FF
OR
1
~
50-002
A
P
-B5 and Wait
for Pointers
..........
-A
..........
-B
J"'-..,.
t'-....
-PE Mode
,....
FF
~
A
r-....
OR
'-
'"
lli
J"'-..,.
'"
50-002
A
t'-....
A
..........
........... 1A
+A+B325-75
-Taoe Op A
........
Y1N2
-
lA
r-......
-GB Full
(Initiate Xlator readout)
+GB Full Extend
(Delay ROC Start)
'--
~
OR
GB Extend
GB Full
.........
-ROC 25-75
"-
OR
J"'-..,. I--
J
P
A
-GB Adr Cntr
T
,......
-PE Mode
-6250 Wrt Skew
FF
~
-ECC
Group Full
-GB Adr Cntr
FL
FL
~
-25-75
..........
't...
FL
-GB Full
Tape Op
© Copyright International Business Machines Corporation 1976. 1979
CB441
(Gate 6250 Wrt Skew)
53-090
OPER-LOGIC CIRCUITS (Cont'd)
53-095
READ CYCLE CONTROLS
-GB Full
-07+A7+C7
.......
........
........
A
........
-
-Reset
ECC Group A
........
-
-Decode 7
.......
-Ol+B7+ABC7
-25-75
A
Step
-
+R ese
FB ABC Ctr
I'JA
A
r-....
FL
P
~
CH031
A
......
A
'"r-... ..--
-
A
-Decode AB
~
t'-.....
,......,
r--...
.........
Decode Not A+B+C
~
Reg
DCD
r---
-Decode AB
r-.....
-Decode B "'-
~
-Decode A ............
~
- Decode C "'-
i"'-...
-Decode ABC "'-
"
FF
CH051
CH05l
-F. C" 1 }
-FB Ctr 2
-
GH051
FL
OR
- FB Ctr 4
CH031
AO
-
A
....
CH03l
......
-AB7
-Tape Op
...
+DecodeC7
rJA
Binary
Counter
1"--.,:> -2
FL
,......,
r......
~ -4 -"'"
Reg
B5
(Wait for Pointers)
A
-
1 ........ Count 124
Pi A
-25-75
C
-Decode 7
.....
+Go to AB Cycle ' "
-B7
.......
25-75
Y1J2
'50-002
. ECC Group
Buffer
r--
........
A
.......
"
........
c
~
_po
Run
Decode ABC
........
........
+ Reset
B
-
Y1J2
~
.......
FF
OR
CH031
-00+B7
Cycle ABC
t'-.....
.......
"
.......
Timing
Array
Decode 0-7
DCD
Decode 0
-Decode 1
-Decode 2
~
A7
......
......
......
......
......
-Decode 5
.........
-Decode 6
AB7
-Decode 7
ABCO
BO
~
-Decode 3
B7
-Decode 4
......
ABO
~
Y1J2
~
~
ABC7
CH04l
CH03l
A Cycle
Cycle Time
10
Data to ECC Group Buffer
l
1
2
3
AB Cycle.
B Cycle
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
ABC Cycle
5
6
7
0
1
3
2
4
C
5
6
7
07
Clock is initialized with' 00-07 only when TAPE OP
becomes active.
n..n.nn
Format Groups and PE mode use "A" cycles only.
Group Buffer 1 Full
I
I
I
I
ECC Group Buffer Full
>
I
I
"
Set ECC
r--
Reset
Transfer Group B
to ECC
Transfer Group A
to ECC
II
If no error, skip
AB Cycle,
53-095
© C;opyright International Business Machines Corporation 1976. 1979
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54-000
OPER-INTERFACE
INITIAL SELECTION OF TAPE UNIT
DESCRIPTION
The initial selection sequence is the communication
between the channel and tape control that initiates an
operation.
During initial selection, the tape control obtains initial
status information that indicates the availability of the
selected tape unit. If the tape unit response indicates it
is available, the tape control activates lines that tell the
tape unit to perform a specific command. In response
to the command, the tape unit furnishes additional
status information that indicates its ability to perform
the specified command. If the tape unit is capable of
performing the command, the tape control activates
MOVE to the tape unit.
(
INTERRUPT: This line signals the tape control that one
of the following unusual conditions has occurred in the
tape unit.
BUS OUT Lines
BUS OUT
Bit
Load Check
Loss of mechanical ready during a rewind
Transition from not ready to ready status occurred
Transition from ready to not ready status occurred
while the MOVE tag was active
BOT was sensed during a read backward operation
The communication between the tape control and tape
unit is over the device interface lines.
COMMAND Tag
Active
CONTROL Tag Active
0
Backward read
Rewind Unload
1
Forward read
Not used
2
Diagnostic (lWR)
(Mod 4. 6, 8 only)
Diagnostic (set high
sense)
3
Pulse
NRZI or 6250 bpi mode
4
Write
(Mod 4. 6. 8 only)
Diagnostic (set low
sense)
5
Set Extend Stop (Mod
4.6.8 only)
Data security erase
6
Reset error latches
(Mod 4. 6. 8 only) Erase
Status
7
Not used
Rewind
BUS IN lines
DEVICE INTERFACE LINES
BUS IN Bit
COMMAND STATUS
Byte
CONTROL STATUS
Byte
The device interface is composed of the following lines
that perform the listed functions:
0
Backward
1
Gap control
Not used
BUS OUT (9 lines): Transmits commands, amplitude
sensing levels, write data, and sense byte identification
to the tape unit.
2
Diagnostic mode
(Mod 4. 6. 8 only) High
Sense ON
3
(Mod 4. 6. 8 only)
Opposite direction
NRZI or 6250 bpi mode
'Control'Tag
4
write status
(Mode 4. 6. 8 only) Low
sense ON
'Command'Tag
5
Extended Stop (Mod 4,
6.8 only)
Erase
6
Unit Check
(Mod 4. 6, 8 only) Erase
status ON
7
(Mod 4. 6. 8 only)
Positioning
Rewind
Bus-Out Lines (9)
'Move'Tag
MOVE tag: Initiates tape motion.
Device
COMMAND tag: In conjunction with BUS OUT, initiates
the execution of a command.
CONTROL tag: In conjunction with BUS OUT, initiates
the execution of a control command.
Interface
or
Tape
Clock/Meter Out
Tape Unit
Control
CLOCK/METER OUT: Causes the tape unit usage
meter to run.
Basic
Switch
BUS IN (9 lines): Transmits status, sense information,
and read data to the tape control.
TACHOMETER IN/BUSY IN: When no tag is active,
this line indicates that the tape unit is busy. When any
OUT tag is active, this line carries the capstan
tachometer pulses to the tape control.
Rewind Unload
Bus-In Lines (9)
or
Tachometer In/Busy In
Device
Switch
Interrupt
i
Device Interface Lines
!S; Copyright International Business Machines Corporation 1976, 1979
54-000
(
OPER~COMMAND TYPES
54-001
COMMAND SEQUENCE (TAG
LINES/STATUS)
WRITE, LWR, READ, READ BACKWARD
Initial Selection
Ending Status
Data Transfer
SENSE, SENSE RESERVE, SENSE RELEASE
Ending Status
Initial Selection
BURST COMMANDS
REQUEST TRACK IN ERROR
Initial Selection
Data Transfer
(TIE Byte)
Endi.ng Status
REWIND
Tape Rewinding
Initial Selection
Interrupt
Ending Status
Tape Unit Ready (Note 1)
-1~-"'"
REWIND·UNLOAD
Interrupt
Initial Selection
Ending Status
Interrupt
Ending Status
MOTION CONTROL
COMMANDS
WRITE TAPE MARK,SPACE, ERASE GAP, DATA SECURITY ERASE
Initial Selection
Ending Status
Interrupt
NO·OP, MODE SET, DIAGNOSTIC MODE SET
Notes:
Initial Selection
NON-MOTION
CONTROL COMMANDS
TEST I/O
,.
Request-in interrupt sequence initiated when
'rewinding' line goes from active to inactive state.
2.
Request-in interrupt sequence initiated only if
operator reloads and 'readies' tape unit to generate
second 'device end.'
Initial Selection
INSTRUCTIONS
54-001
© Copyright International Business Machines Corporation 1976. 1979
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Channel Bus Out Bits (IC & TU Address)
TAPE CONTROL AND TAPE UNIT
SELECTION
TAPE CONTROL AND TAPE UNIT
ADDRESSING
A tape control and tape unit are selected by placing the
combined tape control and tape unit address on
CHANNEL BUS OUT. The address on CHANNEL BUS
OUT is compared with the address assigned to the
tape control. (To assign a tape control address. see
90-110.)
The combined tape control and tape unit address is
contained in a single byte. In subsystems without the
16 address feature. bits 0 through 4 are used for the
tape control address. and bits 5 through 7 are used for
the tape unit address. In subsystems with the 16
address feature. bits 0 through 3 are used for the tape
control address. bits 4 through 7 are used for the tape
unit address.
Address
Generator
(CU Address
Jumpers)
\0\
\2\3\4\5\6\7\
TC Address
;:-r-
-----,~--------:--------'I~--_____________ .1I
x ...~..----
f1 x 8 Only)
Address
Compare
Logic
(50Es)
LSRl
I
ADDRESS COMPARE
(Active when addre'ss on
bus out matches address
plugged In lumpers.)
X ..._____ Xfr TU Address
~
AB18l
Card
Column
+TlE UP
,....
-TIE OOWN
Gate Channel Bus Out to AlU
AB181
L..---'_--'L..---'_--' AB291 B2C2
B2L2
1 X 8 Co nfiguration
TU Address
FC12l
The tape unit addresses are determined by the tailgate
position to which the tape unit is cabled.
Tape Switch Configuration
Card Row
Bus 0 ut Assignment
(
54-005
OPER-SElECTION AND PRIORITY
If the address on CHANNEL BUS OUT matches the
internally generated tape control address. ADDRESS
COMPARE is activated and the tape unit address is
gated to the TU SELECT register.
(
~6
z
5
4
---\-~-r=<3"'~
I
~
A A
3
r6
2
1
~ ~
lA ..AlJ
y
X
TU Select Reg
1L. -.."'
L-...I.._"""'---'_.... FD031 A2R2
I
/
."""A" A FC02l
Tailgate Connectors
-BUS OUT PARITY ODD CHAN A
-ADDRESS BIT 0 CHAN A
+BUS OUT BIT 0 CHAN A
Used only on
1 x 8 Conf igurations
OE
-ADDRESS BIT 1 CHAN A
I
'"I"'-..
,....,
OE
~
""
,ADDRESS COMPARE CHAN A
FC10l
FC10l
OE
+BUS OUT BIT 2 CHAN A
A
....l:::::.
~
-ADDRESS BIT 2 CHAN A
Bit 3 Compare Forces
Compare for B it 4 by
Jumper on Ta peSwitch
Configuration s
FC03l
A
+BUS OUT BIT 1 CHAN A
+AOORESS COMPARE CHAN A
...c:::.
Address Byte Structure (8 tape units)
FC03l
Channel
Bus Out
~
Tape Control
Address
-ADDRESS BIT 3 CHAN A
Tape Unit
Address
OE
r-....
+BUS OUT BIT 3 CHAN A
-ADDRESS BIT 4 CHAN A
Address Byte Structure (16 tape units)
OE
Channel
Bus Out
+BUS OUT BIT 4 CHAN A
~",
FC10l B2Ltl with EC733814
B2M2
EC733814
WI!
_ _",..
, ._ _
Tape Control
Address
".J~"'
_ _"'v_ _ _
J
Tape Unit
Address
54-005
© Copyright International Business Machines Corporation 1976, 1979
(
(
OPER-SElECTION
•
TAPE UNIT SELECTION PRIORITY
On subsystems with a Device Switching feature, m ore
than one tape control may try to access the same tape
unit at the same time. To handle this situation, the
switching logic has card jumpers that establish
priorities for each tape control in the subsystem. T ape
controls with device switching features are shippe d
with device selection priorities already plugged. It
should not be necessary to change these priorities . See
Section 90.
A
r
TU Address
Select Register
TAPE UNIT SELECTION LOGIC
Address Decode
TUADR Select 1
0
TUADR Select 2
H-1
II
B BUS 2-7 ALU1, ./
, I': -
FL
(6)
I--
Xfr TU Address
TUADR Select a is
hard wired on or off
to select tape units
0-7 or a-F.
S
I TUADR
Inbound
I
I
I
~
I
~
.J
~
Xpt Select Line 7
-
Bit 2 Select B
Machine Reset
FD031
Meter
Free
"""-
BUSY or TACH
,.,-
TU Tags
Register
Not Any Hdwr Error ALU2
Xfer LSR2 to TUTAGS 24
On machines with the Two-Char.nel Switch fe ature
installed, the TUADR BIT 2 SELECT B line an d the
BUSY /TACH line generate METERING IN to
channel B. The NOT TUADR BIT 2 SELECT B line
and the BUSY/TACH line generate METERIN GIN
to channel A.
BUSY or TACH
To Tape Control
I-
•
~e
A
L
B Bus 4-7 ALU2
•
.J
(
Decode
One of eight select lines is active to the cross point
switches to determine which tape unit will be used.
e
O~
7
9 Bus In lines to tape control
The inbound and outbound address decoders then
decode ROS2's TUTAG BIT 4 and the Addres S
Select lines.
•
t'-HIll
XC511
Tape Unit Selection
.. A four bit address on the B Bus is set in the TAPE
UNIT ADDRESS SELECT register.
.1
I
7
r---
8 Crosspoint Switches
Xpt Select Line 0
~
~
TUADR Select 4
54-010
,
Selection Logic
::
::
::
TUTAG Bit 4 Device Select
A
(4)
-
II
TUBO Bit 3
L-EJ
FL
This circuit interrogates a tape unit's status w ithout
selecting the tape unit.
8-
Tape Unit 0
XC611
BUSY/TACH
/
These 2 lines
gate detection
register outputs
8 Crosspoint
Switches
BUSY/TACH
t"",J
7
A
Tape Unit Bus Out
0
~
Outbound
/
TUTAG Bit 6 Cmnd
12 Bus Out/Tag Out lines
Machine Reset
-
~
A
TUTAG Bit 5 Control
(4)
--
Tape Unit Bus In
A-OR
-~
XC591
,r
1
.
8 Gate lines
~
......
oJ
~
.J
.J
-
Tape Units
1-6 not shown
1-
Tape Unit Bus Out
Tape Unit 7
TUTAG Bit 7 Move
FD041
9 Bus Out lines from the tape control
'\
r'\
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~\
\
'-..
)
;/""-""
('-"
\.
"')
r~
\...,y
(~,
'\._y
(""1\,
;<')'\
)
"---;;
''-..J';
C~i
_.../
('~'i
\._../
(~
\",
;/
(j
'--
j
0
',--../
,.r• .
r
' \,
'
\..j
;/
-,j
/
/r-,,\
j
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;/
'..
\..
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(
CHANNEL PRIORITY CIRCUITS
'Select out' priority determines the order in which
tape controls are selected if more than one tape
control requires service at the same time.
A tape control's 'select out' priority is determined
by jumpers in the tape control and by the tape
control's location on the I/O interface.
The select signal leaves channel on the SELECT
OUT line and returns to channel on the SELECT IN
line if it is not 'trapped' by a tape control requiring
service.
A tape control not requiring service propagates the
select signal to the next lower priority tape control.
(
(
(
(
('
(
All units shipped from the factory are jumpered for
high 'select out' priority. If it is necessary to
change the priority, see 90-120.
Device Selection priority circuits are present in tape
subsystems where a tape unit is accessed by more
than one tape control. See 54-010. These circuits
act as 'tie breakers' when two or more tape
controls are trying to select a tape unit at the same
time.
Additional jumpers in the switching logic of each
'host' tape control establish device selection
priorities (1, 2, 3, or 4) for each tape control in a
tape switching configuration.
Jumpers in each tape control determine whether
the tape control will respond to the SELECT OUT
line ('select out priority high') or the SELECT IN line
('select out priority loW').
3803 Tape Control
Priority 1 "Highest"
-
Select Out
T
-
Select In
3803 Tape Control
Priority 2 "Second
Highest"
3803 Tape Control
Priority 3 "Lowest"
Select Out
T
Selection
Circuits
Channel
- - -.....
-- - .....-
Select Out
Select In
1
1.....
3803 Jumpered for "High"
Select Out PriOrity
-
,..
T
T
Selection
Circuits
Jumper
If~
(
54-020
OPER-PRIORITY
•
(
Selection
Circuits
Select In
,..
-
Jumper
3803 Jumpered for "Low"
Select Out PriOrity
-
--,
I
I
I
I
I
I
,..
_J
Jumper
(10 Terminator Block)
54-020
COPYright International Business Machines Corporation 1976, 1979
(~
NOTES:
©
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54-021
54-021
COPYright International Business Machines Corporation 1976. 1979
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{-'
55-005
OPER-LWR LOGIC
LOOP WRITE TO READ (LWR)
. Loop write to read allows checking tape control and
tape unit data and control paths without moving tape.
The LWR (8B) command can be initiated from the
processing unit or the CE panel. An LWR performed
from the processing unit uses the same data path as a
normal write operation. The following sense byte
errors cannot be detected:
Write
Encoder
3420
Write
Triggers
Serializer
Write Bus
Reg
OR
Reg
I--
~
Reg
I--
~
Interface
Receivers
TU Bus Out
Reg
Write
Circuits
Data Checks:
Early Begin Read Back check
'Early Ending Read Back check
Slow Begin Read Back check
Slow End Read Back check
Velocity During Write check
A1K6
BWOOI
BWOll-051
BWOll-051
BW061-081
f--+
VRC
CE
Ripple
Equipment Checks:
No Block on Record Read Back check
No Block Detected on WTM
Velocity check
Tach Start failure
BW161
A1C2
~
BS061
I
I LWR Ends
On
I Here
Read
I
I
CE
I
Switches
I
I
Wrote
Byte
Reg
LWR TAPE UNIT OPERATION
A1F2
BR031
I
I
I
I
I
... rtI
CRe
Gen
Read
Reg
Reg
Reg
I+--
l+-
PK021
t + - - L WR
34201.0.
...--
r.-
CE Local Storage Regs
R ead Data
A1L2
4 Commands
1 Byte Counter
r
1 Write Data and Go Down
I--
A1S2
Interface
Drivers
PK051
ECC
Buffer
ECC
Group
Buffer
XLATE
Buffer
Skew
Buffer
VFC
Switch
Reg
Reg
Reg
Reg
Switch
f4--
A1L2
3420 Status
---
PS051
f+-
f+--
~
-
3420 Bus In
.....
A1L2
f4--
I
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CJ031-051
CD181-381
CD181·381
CD121-141
CD221-241
CD321-341
CAl 00-300
f-Channel Bus Out
L..-
Channel
Buffer
Out
Channel
Bus
In
.....
Interface
Decoding
I+-
A
0
A loop write to read operation is initiated from the CE
panel by entering the command code (8B), and it
receives its data from one of two locations. A count of
service responses generates a ripple pattern, which is
selected by putting the Command Control switch at the
Ripple position. The fixed data comes from the Write
Data switches when the Command Control switch is in
the Write Data position. A CE panel LWR writes
continuously until it is stopped by operating the Reset
switch, except when the LWR with gaps jumper is
installed (A 1S2G08 to ground).
The tape control activates SET DIAGNOSTIC and the
COMMAND tag. The DIAGNOSTIC MODE latch is set
in the tape unit (FT104). READ/WRITE GATE (FT104)
ANDs with DIAGNOSTIC MODE to activate LOOP
SELECT (FT147). The tape control activates the MOVE
tag and drops the COMMAND tag, then the diagnostic
latch degates Move command to prevent tape motion.
LOOP SELECT active gates BUS OUT data back to tape
control via the tape unit response lines.
3803-2
Write
Frame
Buffers
OR
CE Entry Bits
FC081
I+-A1F2
BS051
f; Copyright InternatIonal Business MachInes Corporation 1976, 1979, 1983
BR031
55-005
{
55-006
NOTES:
-I
55-006
'f COPYright Internatl~nal Business Machmes Corporation 1976, 1979, 1983
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BASIC RECORDING TECHNIQUE
DESCRIPTION
Three types of recording techniques are used in the
IBM 3803-2/3420.
Phase encoded (PE)
Non-return to zero IBM (NRZI)
6250 bpi group coded recording (GCR) .
Data bytes contain a combination of one and zero bits
to represent binary ones and zeros. The PE tape
system uses a flux change from minus to plus to
represent a one bit, and a flux change from plus to
minus to represent a ze·ro bit. (The NRZI system uses a
flux change in either direction to represent a one bit·
and lack of a flux change to represent a zero bit.) Flux
changes on tape are created by changing the direction
of current through the write heads by the write
triggers.
PHASE ENCODED (PE)
(See Figure 1)
At write clock (WC) 15, flip all write triggers to
write ones or zeros on tape.
To write a PE one bit, the write register is reset.
Set up write trigger by setting it at WC 7 if not
already on from previous byte so that write trigger
can be reset at WC 15 (complemented).
To write a PE zero bit, reset the write trigger at
7 so that WC 15 turns it on.
we
NRZI
(See Figure
21
Flip write trigger at WC 15 to write one bits only. Do
not flip write trigger to indicate a zero bit.
6250 BPI
(See 55-0081
MODE SET l(SEVEN-TRACK NRZI
OPERATION)
Mode set 1 ,commands sent to seven-track tape
controls establish tape unit operating mode ·for
succeeding seven-track NRZI operation. Bits 0 and 1
control density (556/800 bpi); and bits 2, 3, and 4
'( Copyright··lnternational BUSiness Machines Corporation 1976, 1979
55-007
control parity (odd or even), data converter (on or off)
and translator (on or off) circuits in the 3803.
A mode set 1 command affects operation of all
seven-track tape units attached to the 3803. Unless
reset, the 3803 retains its mode setting until it receives
another mode set 1 command,
Mode set 1 commands sent to a 3803 without the
seven-track features are treated as no-op commands,
except that sense data bytes are reset (no-op reset
sense). Channel end and device end are set during
initial selection, 200 bpi mode set 1 commands (hex
codes 13, 23, 2B, and 33) default to 555 bpi.
Figure 1·, Bit Cell and PE Write Waveform
Bit pattern on tape
Flux reversals at bit
shift time (always)
0
0
Bit Cell
1
Bit Cell
2
L
0
Bit Cell
3
L
S
0
Bit Cell
5.
Bit Cell
6
S
L
S
IU
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1
I
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WC 7
I
Bit Cell
7
Bit Cell
8
L
S
I
Flux reversals at bit
cell.boundary time
(between Ii ke bits)
I
I
S
1-
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PE write waveform
MODE SET 2 (NINE-TRACK PE/NRZI
OPERATION)
I
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LSI
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WC7
I
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Mode set 2 commands sent to PE/NRZI dual density
tape controls set operating mode (1600 bpi PE or 800
bpi NRZI) for succeeding write or write tape mark
(WTM) operations. Mode set 2 commands sent to a
3803 without the dual density feature are treated as
no-op commands, except that sense data bytes are
reset (no-op reset sense). Channel end and device end
are set during initial selection,
Bit Cell
4
WC7
I
WC15
I
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WC7
I
.
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1
I
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WC15
WC15
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W
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WC15
7
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WC.7
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WG7
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7
W
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WC15
WC 15
Ii
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WC7
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WC 15
WC 15
DIAGNOSTIC MODE SET
A diagnostic mode set command causes an artifical
signal loss condition that checks read and write error
detection circuits,
In PE mode, whenever write data contains
successive one bits in any track, writing in that
track is 'inhibited until the last one-bit is reached,
In nine-track NRZI mode, no bits are written in
track P,
In seven-track NRZI mode, no bits are written in
trackC,
Figure 2, Bit Cell and NRZI Write Waveform
I
Bit pattern on tape
Flux reversal only
for bit 1 at WC 15
time.
A diagnostic mode set command affects only write
operations for the command in which it is issued,
Channel end and device end are set during initial
selection.
I
I
I
0
0
Bit Cell
1
Bit Cell
Bit Cell
2
3
0
L
Bit Cell
4
0
Bit Cell
5
Bit Cell
6
Bit Cell
7
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L
S
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1 Bit Cell
8
S
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NRZI write waveform
Note: For additional information, see 53-070.
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1
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l
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WC7
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WC15
WC7
WC7
WC15
I
WC15
WC7
WC7
WC7
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II
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WC7
I
WC7
I
WC15
WC15
WC15
1
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WC7
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WC15
WC 15
55-007
BASIC RECORDING TECHNIQUE (Cont'd)
GROUP CODED RECORDING (6250 BPI)
Group coded recording (GCR) offers many advantages
over previously used recording methods. This
recording offers higher reliability even with existing
tape libraries. Greatly expanded error correction
capability has been engineered into GCR. Higher data
rates' and lower access times give higher throughput,
reduced channel time, resulting in' higher system
performance. Data is compacted on tape, reducing
rewind tir.nes, shortening the length of tape required for
a data' set, reducing the number of reels, reducing
mounts and dismounts, and improving overall tape
handling.
The data is recorded in blocks, or groups of characters.
A block of data may be a single character or byte, or a
number of bytes as determined by the programming
system used. The significant improvements in the GCR
mode are:
1.
The separation between blocks (lBG) is 0.3 inches
(7,6 mm).
3.
Simultaneous errors in any two of the nine tracks
are corrected automatically.
GCR BLOCK
A GCR block consists of a preamble, data, and a
postamble (see 55-009). The preamble and postamble
are each 80 bytes long and serve to synchronize the
read detection circuits in a manner similar to previous
1600 bpi subsystems. The data portion of the block
consists of the following:
1.
Reading of the tape reverses the process, with'.
error correction occuring where needed. There are
as many of these 10 bit storage groups as there
are multiples ()f seven channel data bytes in the
record block.
2.
3.
4.
The information data is recorded at an effective
density of 6250 bytes per inch (bpi) of tape.
2.
55-008
5.
Figure 1a.
Figure 1b.
Error
Correction
Character
7 Characters
The remainder, or last group of the channel data
bytes (zero to six bytes) is encoded with whatever
pad bytes are necessary, an auxilliary check
character, and the error correction code (ECC)
generated from these into a 1O-byte' residual group.
This residual data group is created for every block
recorded even though no residual bytes are found
in the record. The auxiliary check character verifies
read and write operations.
:>
Channel
Data
1
9 Bits Itracks)
+
1
-
4 Bits
.~
9 Track
Bytes
Exactly
Equals
~
Subgroup
: Subgroup
I
B
A
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Figure 1c.
'- -
-
-
-
-
-
-
-
-
-
-
1
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Figure 1d.
5 Bit character
Translator
(encoded
Interleaved into the recorded block, every 158
storage groups, is a resyncburst. This burst
allows the tape control to put into full operation
any track(s) that have lost synchronization or were
dead tracked due to tape defects. The action limits
dead tracking for greater throughput.
4 Characters
9 Bits
End of data (EOD) is signaled by a unique
subgroup of five bytes immediately preceding the
residual group.
Following the residual group, a 8-byte cyclic
redundancy check (CRC) is encoded into a ten bit
group. This group, with the auxiliary check
character, ensures the integrity of the read and
write operation, including verifying any error
corrections that may have taken place.
8 Character
(See Figure 3b
on 55·0.10.1
5 Bits
10. Bit Encod~ Data Group
5 Bits
9 Track Bytes
of an encoded
subgroup
9 x 10.
Bit
Matrix
Data to be written by the 6250 bpi feature is
continuously collected in seven character groups (9
bits in each character) and is held in the control
unit 6250 bpi feature circuitry. (see 50-000 through
50-002 for second level logic details.) An error
correction character is generated and then added
to the seven characters to make an e.ight character
data group. This data group is then divided into two
subgroups of four characters each. The four bits in
each of the 9 tracks are encoded into five bits.
(see Figure 1a through 1e.!. This matrix of bits,
9xl0, is recorded on the tape (see Figure 3a on
55-010).
Subgroup A
Subgroup B
Figure 1e.
I
+
Encoded
Data,
Group"
#1
,
Encoded
Data
Group
#158
Note: There are 1106 bytes of channel input data in
each 1580 (6250 bpi) group rec~d data block written
on tape.
'T'
1580. Encoded Group Recorded Data Block Written on Tape
1(,
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55-008
Copyright International 8usl~ess MachlOes Corporation 1976. 1979'
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55-009
BASIC RECORDING TECHNIQUE (Cont'd)
GROUP CODED RECORDING 6250 BPI
Synchronizes
Read in forwa
direction
~!i-~l
E
E
~
!::
Recorded
Bits --+-
.::
-j
:5E
:
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M
ci
80
5
J!
d
(See Notel
1580
1106 Data
Bytes
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20
u
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Sl
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1580
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III
Remaining data
less than 1106
data b yes,"
t .
20
u
c:
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CD
d
a:
1580
20
1580
,M.
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20
t,Restores track where
synchronization is lost
T
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ters ut ess
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0
20
.
iii
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850
5
.--.!
Control
Subgroup
Control Subgroup
:I
'0
10
N
10
5
.f
Synchronizes read
detection in backward
mode
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1-.--- -
c:
d
b""'~ E,,«
Detection
7;.\'
T
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1
1
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Legend
Remaining
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CD
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to0
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ID
Q.
For all bits {tracks 1 through 91
\
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80
-r-
(See Notel
rr
.,.,
9
Tracks
D fJ
II
.,
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~.....__ 14SUbgroups~
r
Pattern
D
Term
10101
HI
Second 1
01 1 1 1
II
Sync
11111
II
Mark 1
00111
II
Mark 2
1 1 1 00
II
Second 2
11110
fJ
Data
DODD DDDE or GGGG GGGG
Residual
XXXX XXXE or HHHH HHNE
CRC
BCCCCCXE
~
II fJ
,.,.
.,.,
Name
II
II
Preamble and First Data Group
Comments
Key
(See 55-010 Legend 2 for data symbols,)
.,
aIl1's--
.........- - - - - - - 1 6 Subgroups
Data Residual and CRC
Note: From first data bytes through residual bytes
(9042 fcO equals 6250 bpi of customer data.
,.
.,
.,
IJ
II
II
II
r
Postamble and End Data
.,r
11
II
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/-----14 Subgroups all 1's
Subgroup ......L_ _---J
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IBG
0.3 inch (7,6 mml
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~ 16 Subgroup Postamble _ _ _ _ _ _ _--t~~
55-009
.~
Copyright International BUSiness Machine. Corporation 1976. 1979. 1983
BASIC RECORDING TECHNIQUES (Cont'd)
55-010
GROUP CODED RECORDING 6250 BPI
(Cont'd)
6250 bpi does not relate ·to actual writing density on
tape, but to effective data density: Actual density (9042
bpi) is greater due to the f-ormatting and encoding.
This formatting and encoding is transparent to the user.
The formatting and encoding method allows reliable
error correction for any two tracks simultaneously in
error. Also, tracks are not immediately dequeued or
dead tracks assigned when an error occurs as they
were in the past. It is conceivable that a block could
have errors in all nine tracks and appear to the user to
be read error free as long as only two tracks have
errors at any given instant.
Figure 3b. How 4 Bit (Address) Becomes 5 Data
Bits
Figure 3a. Encoded Data Group
rH2~ard
DATA GROUP
Physical
Tracks
Subgroup
B
A
B
DODD
DODD
GGGGG
GGGGG
2
DODD
DODD
GGGGG
GGGGG
3
DODD
DODD
GGGGG
GGGGG
4
DODD
DODD
GGGGG
GGGGG
5
DODD
DODD
GGGGG
GGGGG
6
DODD
DODD
GGGGG
GGGGG
7
DODD
DODD
GGGGG
GGGGG
8
DODD
DODD
GGGGG
GGGGG
9
DODD
DODD
GGGGG
GGGGG
1234
5678
12345
678910
I
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--::::.-=--~-.:---
---
4 to 5 Encoder (ROS)
_----1--------
5 to 1
Serializer
Write
Trigger
II
iGGGG~ GGGGG)
0
0
A
D
D
D
D
D
D
I
- - - - ____ E
D
R
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:
Track 4
----_______
Subgroup B (Addr)
_J
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Track 4
:
ROS Encoder
I
Subgroup A (Addr) _...I
Serializer for
track 4
.
To Tape Unit
Write Circuits
I
1
II
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IL _______________________________________________________ 1
Note: This illustration is only one of nine such circuits.
(See 50-001 for further details.)
Legend 2. Data Symbols
-I
____________________ 1
I
Group
Positions
B
~
I
Subgroup
A
Symbol
_____________________
STORAGE GROUP
Data Represented
CRC or Pad Characters
C
Cyclic Redundancy Check Characters
0
Channel Data Characters
E
ECC Characters
G
Encoded Group Recorded Bits
L
Last Character
N
Auxiliary CRC
X
Residual Character
3803·2/3420
55-010
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55..020
COMMON START I/O (510) ROUTINE
This section introduces the microprogram controls used
to read and write a record from load point. Addresses
noted within the charts are key checkpoint addresses
which perform a major function.
These charts provide major syncronization points within
a routine, and layout a path to check the path through
the microcode. The common Start I/O routine is
followed by the write operation, then the read
operation from load point. The paths shown are for
single, unchained operations with no exceptional
conditions.
ALU2
ALUI
095
Initiate start 1/0
operation. Fetch un it
address.
___________ --I
Using the compare ROS stop sync on ROS address of
the CE panel (see sequence 10 on page 12-011).
synchronization can be developed at various points
within the operation being performed.
000
ALU2 held reset.
Remember that many routines are commonly used
many times and will provide unstable synchronization
points.
Some knowledge of basic microprogram concepts is
assumed. XOUTA and XOUTB registers as well as the
status registers A, B, C, and 0 provide response back
and forth between the ALUs. ALU1 basically controls
the processing unit channel, while ALU2 controls the
device interface. Both ALUs control various portions of
the data flow.
ALU2 status routine.
DEB
ALU2 is a slave to ALU1, and is controlled by a
transfer command and XOUTB branch index byte being
passed from ALU1 to ALU2. Response from ALU2 is
by way of ALU2 status registers.
Fetch device address
from XINA.
OEF
I
If low order drive, set
STATUS A.
OF4
I
Check chaining and
NRZI flags. Branch to
test interface A or B.
If busy and the tach
is active, set device end
prime bit on.
001
2El
Set XOUTAIM LSR
to 6250 Flag if 6250 was
the last mode set.
Clear tape un it bus
out (TUBa) and fetch
tape unit sense byte O.
Select and TUBa X'OI'.
2EE
I
1
Fetch TU sense byte 1
(feature byte).
Ig) Copyright International Business Machines Corporation 1976. 1979
55 ..020
(
55-022
COMMON START I/O (SIO) ROUTINE (Cont'd)
ALUl
ALU2
100
101
Fetch Operation code
and decode the command.
Store ALU2 branch
index byte in XOUTB.
Send TU sense byte 0
to XOUTB. Send TU
sense byte 1 to XOUTA.
I
llF Rewind
116 REW/Unload
110 Write
121 ERG
1250SE
12AWTM
12F BSR
133 BSF
135 FSR
137 FSF
143 Read
Forward
146 Read
Backward
186 Sense
X '2F'
X '29'
X'13'
X '22'
X '31'
X '20'
X '3E'
X '3C'
X '37'
X '35'
103
Branch if TU is busy
(rew, run, OSEI.
105
Send model number to
the A-register and
XOUTA.
X '33'
X '3A'
X '06'
10E
40B
1+---- -l
I
Branchto Openers.
ALU2 will set Status 0
when completed with
its status routine.
Branch on Status B, C,
or O.
I
r
I
Write: 402 Branch to 220
(See 55-024)
I Read: 403I
Branch to 22C
I
(See 55-024)
lEA
If start is on in drive,
set status 0 and trap
to 000.
j4-
I
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'---------~
©
Test pulsed interrupt,
and Ready to Not
Ready.
I
____ 1 ____ ,
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112/117
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Fetch TU sense byte O.
Return by linking to
register 4.
Test device end prime.
r
I
____ L ___ ,
Wait for ALU1.
I Status D = normal
Status B + D = TU busy
Status C + D = Not
I
Ready
I
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:
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L _________ -1
55-022
Copyright International Business Machines Corporation 1976. 1979
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BRANCH TO WRITE FROM LOAD POINT
Write from load point is performed by controlling drive
motion and controls with ALU2. ALU2 also sets the
data flow control to write the single 1 or P track
identification (lD) at load point.
ALUl initiates the first data Service-In cycle, then
relinquishes data transfer to the hardware. ALUl also
controls the write triggers for all control characters
within the preamble, postamble, and resync burst.
(
55-024
13. ALUl checks for an all ones character indicating
the end of data. This allows for writing of the
residual and eRe frames.
14. ALUl then writes the postamble consisting of the
following characters: 11100, seventy 1s, 11110,
10101.
WRITE FROM LOAD POINT
ALU2
ALUl
220
Test A LU2 Status C for
15. ALU2 waits for I BG, then tests for errors. ALU2
finishes by setting Status D and trapping to 000.
Once the data portion of the write command is entered,
ALU2 monitors velocity during the tach period
transitions to test for velocity change during write.
The write operation is divided into the following steps:
1.
Trigger ALU2 to issue a sense reset to the drive.
ALUl will monitor ALU2 Status D, which indicates
that ALU2 is finished with sense reset.
2.
Fetch TU sense bytes 0 and 1 and test for drive
status.
3.
Raise Service In for one byte of data before
turning control of the .channel over to the data flow
section.
4.
ALUl again allows ALU2 to perform the write
operation.
5.
Set Erase in the drive (not Write Status yet) and
erase backward, then forward. (Backward 150
tachs, forward 140 tachs.)
6.
Test for Tach Start fail or Velocity Error, then write
l-track ID burst.
7.
Write self-adjusting gain control (SAGe) burst with
the inverse Tape Mark (no zone 1) attached to the
end.
8.
Set SAGe circuits in the drive to perform read back
check.
9.
Write record preamble consisting of the following
characters: 10101, 01111, seventy 1s, 00111.
10. The hardware data flow section now takes over the
writing of data while ALU2 monitors the capstan
tach velocity in the drive.
11. Every 1106 channel bytes (158 storage groups on
tape). ALUl intersperses a resync burst consisting
of: 00111,11111,11111,11100.
ALU2 sense reset
routine.
058
Set ALUl Status 0 to
indicate sense reset.
Trigger ALU2 to do a
sense reset to the drive.
Index
X'OE'
---------,
=
OOE
I
1
Bring in clear flag
byte and branch to
sense reset routine.
lAg
I
Send device select,
command tag. and reset
(X'02') to the drive.
lAE
1
Branch on Status 0 to
bypass ALU error reset.
12. When data is complete, the hardware writes an all
ones character.
f(,
COPYright InternatIonal Busmess Machmes Corporation 1976, 1979
55-024
BRANCH TO WRITE FROM LOAD POINT (Cont'd)
55-026
WRITE FROM LOAD POINT
ALUl
ALU2
ALUl
ALU2
lBO
Index; X'13'.
------,
I
013
Turn on tracer and
store write command
in Work 4.
5A3
Drop Status In. Reset
Status D. Branch to
write routine.
r.--------,I
I Wait for ALU1.
L _ _ _ _ _ _ _ _ _ .J
Test for LWR (loop
write read) at load
point (LPI.
-----,I
Loop while ALU2
completes backward and
forward erase. Monitor
HIO or error condition.
Service Out checked.
Reset word count to zero
in sense.
I
I
L~t~~~.J
60C
Test positioning bit
in the drive. Active
indicates drive is still
moving.
741
Set controls to make
erase, select, move,
and control tag avail·
able to the drive.
Entry point for normal
write. Fetch TU sense
byte 0 and store in
XINB.
530
Set tags and TUBO.
Set move and erase
status.
535
Fetch drive response.
Test Control Status
Reject.
'f.
55~026
Copyright InternatIonal BUSiness Machines Corporation 1976. 1979
C)
'\
)
(
\I
,
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\,,
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;C~\
')
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(
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(
(
(
BRANCH TO WRITE FROM LOAD POINT (Cont'd)
(
55-028
WRITE FROM LOAD POINT
ALU1
1
rAuilstiiii~;"g - -I until ALU2 sets
I.
I Status B.
I
L _________ ...1
ALU2
ALU1
ALU2
74E
Load backward tach
rALU1-;iiii~Ping
I until ALU2 sets
I Status B.
- - ...,
I
L.. _ _ _ _ _ _ _ _
I
...J
Wait for read time,
then start count and
raise Move tag to the
drive.
7SC
Count down check - set
no tach error if 256
counts were received
without seeing tach
pulse.
756
Drop move and store
write command in
Work 4.
-..,
I
I
I
I
I
151
Fetch mode set from
XINA. Test if 6250
feature is present.
753
Store write command
(X'OS') in Work 4.
(Sets forward in TU.)
768
Raise Command tag
and place Work 4 on
TUBO.
770
Fetch drive response.
Test Command Status
Reject.
i(
COPYright International Business Machines Corporation 1916. 1979
Fetch drive response.
Test Command Status
Reject.
55-028
(
BRANCH TO WRITE FROM LOAD POINT (Cont'd)
55-030
WRITE FROM LOAD POINT
ALUI
ALU2
Status B active. Erase
backward and forward
complete. Prepare for
ALU2 to write I-track
10.
634
ALUI
18B
631
.- -- -- -- --'
-- -- -- -- -
Set 6250 in XOUTA.
Set tape Op to data
flow. Set Status B.
f"ALUl looping u;ii" -
-,
L ____
~
completes 10
I ALU2
burst.
I
ALU2
20F
Store maximum
velocity count = ones
minus I-I 24.
I
Test LWR.
1'- --
638
Loop until ALU2
Status B drops
indicating 10 burst
complete.
IL
~
____
I
I
I
.JI
.------1
I
I
Four count exhausted.
Set CNTR OY, set
count = 4.
Wait for read time then
begin testing for tach
pulses.
I
_
348
Co~~_.J
4----- 1
Count four more tach
periods, clocking
between transitions.
Count 4
I
I
I
_-J
Gap control active. Clear
TUBO and reset command
tag.
20F
Fetch TU sense byte 1.
(Still in 1600 mode.)
Set write burst status.
Set ALU2 Status B
(still anI.
3803·2/3420
55-030
/'"~
,j
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(
55-032
BRANCH TO WRITE FROM LOAD POINT (Cont'd)
WRITE FROM LOAD POINT
ALU2
ALU1
ALU2
ALU1
70C
6D4
ALU1 looping until
ALU2 completes ID
burst.
Load counter and write
ID burst for 2 in. (56,8 mm)
without checking.
ALU1 looping until
ALU2 is ready to write
SAGC burst.
641
""
Branch to DOlT FORA.
Gate format to XOUTA.
Wait for rise of Clock B.
~
r
_ _ -.J
Set for 256 tachs. Set
PERMRDWT (write
condition) and ALU2
Status B.
703
Store count in WOR K1
to write 2 in. (56,8 mm)
burst.
643
I
r--t---
Repeat 641 and 643 until
count is done.
639
Status B dropped. Set
counter for SAGC burst
and FORMAT11 to
XOUTA (ones>.
.....
630
Loop until ALU2 sets
Status B to begin write
of SAGC.
I
649
I
I
I
655
708
Prepare to send Set
Density, Erase, and
Device Select commands
to TU.
7AB
-1
I
BOR detected. Reset
LP mark flag to indicate
BOR.
I
_J
SAGC burst written,
set inverse Tape Mark
(TM) format = SAGC1.
.------- --
---,
Test for beginning of
record (BOR) and
continue countdown.
Branch to DOITFORB.
Gate format to XOUTA.
Wait for fall of Clock B.
645
Countdown.. Store in
Work1 to write 2 in.
(56,8 mm) more while
test ing one track.
7A9
I
Inverse Tape Mark
complete. Signal STOP
to ROS2. Drop write
condition.
658
1...---
Loop until Status B
drops indicating that
the I BG is detected.
I
---,
--,
I
I
I
Load 101 more tach
counts and continue
countdown.
I
I
I
I
I
I
L
,..----&.--.....,1
I
L
I
~St~.J
3803-2/3420
(() Copyright International Business Machmes Corporation 1976. 1979
55-032
(
(
55:-034
BRANCH TO WRITE FROM LOAD POINT (Cont'd)
WRITE FROM LOAD POINT
ALUl
ALUl
ALU2
ALU2
72C
156
f";.LU1 Looping ~iIALU21
I senses IBG and resets
I
Status B.
I
I
L _ _
r--
_
Set 6250 in XOUTAIM.
---.J
r----..
I
I
I
I
17A
65D
731
Status B dropped. Loop
until Status B is set and
ALU2 indicates Ready
for record.
IBG. Reset Status Band
PERMRDWT (write
condition) .
~-----------
Write status and not
read forward. Skip
delay.
L _____ I
65F
..... ------------
Set ALU2 Status B.
Set tape operation to
data flow.
DIOTFORA
6CD
---
Set to write a frame.
Loop here until clock B
is active.
I
I
I
I
L _ _ _ _ ...JI
55-034
(
'"
/
(
(
(
(
(
(
(
«
(
(
(
(
(
(
(
(
(
(
(
BRANCH TO WRITE FROM LOAD POINT (Cont'd)
55-036
WRITE FROM LOAD POINT
ALU2
ALU2
ALUl
61C
r ;iLi1 ~oping;;ntii ';':;t;-"
I condition
L
rises.
-----
Load block recognition
time-out count for no
BOR or early begin.
I
- - - - ..J
6CC
A-Frame written.
Return for more
preamble.
Maximum count to 24.
Set count for this model
to test speed.
30B
Set initial 4 count.
Clock through 4 tachs
without checking.
.-------- -------
668
Store A2 ORed with
Mark 1 character.
(Format 01 + 8 01111)
6C8
Write B-Frame.
Return when clock B
drops.
6B8
637
Timing okay. Count
through part of
preamble.
----,
I
I
Store Mark 1 ORed with
Mark 2 character. (Format
11 - 11111)
L_
I
----'
6BA/6C3
Set count and write 14
subgroups of all ones
(sync) characters (70
ones).
660
Store Mark 1 character.
(Mark 1 - 00111 )
6CD
Write A-Frame.
673
Clear format controls
(ready for data)'
(f"; Copyright International Business Machines Corporation 1976. 1979
55-036
(
BRANCH TO WRITE FROM LOAD POINT (Cont'd)
55-038
WRITE FROM LOAD POINT
ALU1
r cha';;l hardw~ 'da;;;"" - 1
I flow controlling write
I
I
data.
L __
I
IAW2I0;;i';-u;;iiiiiia;k' ..,
11 character recogn ized
I
,(data ready).
I
r-
660
Data ready (Mark 1 active).
Drop sync line.
-:L-_- _J
ALU2
6AO
Store and write a
l-Character (Format 1010101 )
_ _ _ _ _ _ _ .J
T
675
Load resync counter to
wr ite a resy nc bu rst
every 158 storage
groups.
ALUl
ALU2
I
I
I
-I
a resync burst. (Mark
I
I..3ISyn~yr:::!.~k
22. __
rAhe~e;:;-1580 -
I characters on tape, insert I
"'--l
677
Test all ones (written by
hardware). End of data.
68E/691
I
r---I
ALU2 finished. Test for
errors, then set pending
status.
.- -- -- ---- -- --
-- --
End of data. Allow for
residual and CRC frame
(4 groups).
695
Store and write Mark 2
character (Mark 2 11100)
688
Write 14 groups of all
ones (Format 11 111111.
69C
Store and write A2/Mark
2 character. (Format
01 + 4 - 11110)
55-038
«) Copyright International Business Machines CorporatIon 1976, 1979
o
("""!
")/
r)'
~,
(-'"
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)
( )~
/,\
"
'.
>
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"--
-'1t,
y-'
/"
--
/"
-'."
'-- ./
/"-~
'-- Y
/"
y
(
(
(
(
(
(
(
(
(
(
(
(
(
«
(
55-040
BRANCH TO READ FROM LOAD POINT
Read from load point is basically performed by ALU2
and the hardware data flow controls.
Once ALU1 has triggered ALU2 to perform sense reset
to the drive, and again to initiate the read from load
point ALU1 is basically finished. ALU1 tests to be sure
that the first service cycle takes place, then goes into a
loop until ALU2 finishes and sets Status D.
READ FROM LOAD POINT
ALU2
ALUl
22C
The read forward operation from load point steps
follow:
1.
ALU1 triggers ALU2 to issue a sense reset to the
drive.
2.
ALU1 triggers ALU2 to begin the read operation. If
Status D from ALU2 is sensed before the first
service cycle, an error is signalled.
3.
ALU2 tests the status of the drive and checks for
correct velocity.
4.
Move 3 in. (76,2mm) of tape, then test for a
1-track envelope indicating a 6250 bpi tape.
5.
Count through part of SAGC, then initiate read
SAGC circuits in the drive.
6.
Clock through 550 tachs, then check the Inverse
Tape Mark.
7.
When IBG is reached, fetch two bytes of drive
sense and test status to this point.
8.
Set read condition after gap control comes up
again, and wait for the Mark 1 character preceding
the data.
9.
The hardware data flow now takes over until the
end of data is sensed.
Set ALUl Status D to
indicate sense reset.
Trigger ALU2 to do sense
reset to drive.
Index = X'OE'
---,
ALU2
Sense
Reset
Routine
I
ODE
+
Send device select,
command tag and reset
(X'02') to the drive.
10. Test for errors. ALU2 sets Status D when finished,
altering ALU1.
11. ALU1 compares the modulo count then branches to
the status handler.
Drop Status In.
Reset Status D.
Load returns.
iWait"fur ALU1. -
--1J
L _______
'(
COPYright InternatIonal Business MachInes CorporatIon 1976. 1979
55-040
55-042
BRANCH TO READ FROM LOAD POINT (Cont'd)
READ FROM LOAD POINT
ALU1
ALU1
ALU2
IALUl s;iiilooping~il - - ,
IL ALU2
finishes.
I
_ _ _ _ --.J
Index
=X
ALU2
Read Forward
Routine
ALU2
18B
Set Status B. Turn on
tape operation to data
flow.
-,
'33'
033
I
Turn on read tracer and
store read forward
command (X'40' to
Work 4l.
Test Rewind Unload at
load point and Read
Backward.
Count down and branch
on overflow to test gap
control from TU.
Raise select and command
tag. Wait for positioning *
to drop in the drive.
Test BOT, if on, and
set up to move 3 in.
(76,2 mml of tape.
*Up as long as drive
is moving.
265
3 in. (76,2 mmi of
I D area passed. Store
count and walt fOI
read time.
55-042
(
COPYright International Busmess MachH1es CorporatlOn 1976
..J.'
1979
{i
(
(
,•
(
(
(
(
(
(
(
(
(
(
(
(
(,
(
BRANCH TO READ FROM LOAD POINT (Cont'd)
(
55-044
READ FROM LOAD POINT
ALU1
ALU2
ALU1
ALU2
26B
rAw;;ill""j;;oPing- - -,
ILuntil
finishes.
_ALU2
__
_ _ _ ....JI
Test 1-track envelope.
280
Normal Path
270
1-Track and overflow.
Turn off PE control and
set hi-density control.
275
Count through part of
SAGC burst. Tape is
6250.
Nearing en·d of SAGC.
Test BOR and device
attention (SAGC
check).
55-044
(.-
BRANCH TO READ FROM LOAD POINT (Cont'd)
55-046
"EAD FROM LOAD POINT
ALUl
ALU2
ALUl
217
r--------.,
~~1 ~ping ;;il~U211
I ALUl
I f' . h
L'~
ALU2
looping until
I
___
LALU~nishes.
::.. _ _ _ _ -'
Ioa-;; a;d
J
r~;-bu-;;t -
I being handled by data
I flow.
-I,
L _____
Branch if read out
counter (ROC) rotation,
Mark 1 is sensed.
3CD
.-------
r-D-a-ta-t-im-e---co-u~n-t-fo-r---'
resync burst. Wait
for end of data.
L ___
Copyright InternatIonal "Busmess Machines Corporation 1976. 1979
-
-1
2CA
(c
I
.J
I
I
,I
~
55-046
(,
(
(
«
(
(
(
(
(
(
(
(
(
(
(
(
(-
(/
57-006
OPER-NRZI
NRZI READ DATA FLOW
RC5 NRZI
Degate LRC 9 Trk
(Not) Correct Track
A
(9)
Yl D2
LRCR
Reg
CN021
!IIIII.
..~
LRCR Error
FF
(9)
13-16 Time
A
Y1C2
After 9 Time
-
CN241
Note: The 118 ns delay is a NRZI (1) Pulse Generator
which uses the de-skewed trailing edge of a NRZI
pulse from the tape unit.
Reset LSR
Set Rd
Reg 2
NRZI
Read
NRZI
Detection
Reg
XCOll
f(om
50-002
Device ~
::t
Block NRZI Ones
(Not) Read Condition Latch
I
118 ns
Y1D2
CN021
Reg
NRZI Correct Tracks 0-7. P
NRZI Rd Reg P. 0-7
NRZI Pulse
Y1D2
NRZI Read Data p. 0-7
Rd ECC Data P. 0-7
A
DOT
(9)
CN061
CN031-051
50-002
(Reset)
OR
Y1D2
Y1D2
CN031
CN031
Y1C2
CN251
DE
(9)
NRZI
Pulse
RC6
Reset Rd
Reg 2
OR
t-(Not) TaDe Op
Y1C2
-
CKOOl
Combined ECC Data
50-002
P,0-7
R/W VRC
Y1D2
CNOll
CN241
57-006
((, COPYright International Business Machmes Corporation 1976, 1979
(
57-020
OPER-TRANSLATION
WRITE TRANSLATOR (CARD A1E2)
DC Reg 0-11
-Channel Buffer
Out P, 0-7
TRANSLATOR
Some tape subsystems use a six-bit BCD code. Each
character of the six-bit code can be translated to an
equivalent eight-bit character for processing by 9-track
tape subsystems. A translator in the tape control
translates eight-bit code to six-bit code while writing,
and translates six-bit code to eight-bit code while
reading. The translator operates only if Microprocessor
1 XOUT A bits 2 and 4 are on at the rise of TAPE OP
and Microprocessor 2 Stat bits 0 and 3 are on.
'I'h-
0-11
OE
r- f--__.
Reg
0-11
\
-Gate Bytes
1-4 to DC
1
+DC On
A
--6
AND
&
OR
Logic
\
A1E2
j
4
50-001
Write
DC Gate
I--
OE
P, 0-7 to Chan
Buffer Gate
BR101
0
..-
6
--~
Reg
BN021
On 7-track write operations with the translator off, the
tape control discards the two high-order bit positions
(BUS OUT bits 0 and 1) of each byte from channel.
Only the six low order data bits (plus a parity bit) are
transferred to the tape unit.
Channel Buffer Out P
DCD
P Bit Latch
+XLATE On
0
FL
,
1
---I--
-
-- -OE
A1E2
On 7-track read operations with the translator off, the
tape control inserts zeros in the two high order bit
positions (BUS IN bits 0 and 1) of each byte when
transferring it to channel.
.....
t--
OE
P, 0,1
PC
2-7
A1E2
BN041
~
BN051
BN021
r-EP~
BN031
+ 7 Track
,......,.
-Channel Buffer Out 0
~
~41
A
0
.........
ECBDIC AND BCD CODES
-Channel Buffer Out 1
,......,.
A
A1E2
1
BN041
E8CDIC . 8 81t Code
1
Bitl
4567
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
00
.
00
BL
A
B
C
D
E
01
F
0
G
H
I
P
Q
R
>
<
rBitsO, 1
,
10
I
J
K
L
M
N
S
T
U
V
W
X
y
Z
*
. . "
$
(
GM
o
0
G
H
I
11
>
3
10
00
01
>
<
V
11
0
1
2
3
4
5
A
B
C
D
E
L
M
N
W
6
F
0
P
X
G
P
Q
y
H
Q
R
Z
7
8
9
<
*
I
BL
..
-
I
S
T
U
J
K
L
M
. .s " -.
• 11
I
I
(
+
GM
4
MC
5
SM
6
TM
7
R
10
*I
S
T
)
+
i
GM
8
MC
9
11
0
1
2
3
00
A
8
C
D
E
L
M
N
U
V
F
0
W
11
0
1
2
3
4
5
6
...
01
10
~
*I
J
K
S
T
U
V
W
4
5
6
X
y
7
G
P
X
7
8
H
Q
y
B
Z
9
11
S
v
WS
J
K
. .
liil
TM
SM
2
N
F
-
•
MC
01
II
liil
v
WS
)
+
00
8L
A
B
C
D
E
1/
liil
"
• -
WS
v
SM TM
10
11
..
.. --;-.
I
I
BL
+
R
Z
+-B,ts 2.3
+-Note 2
9
f)
~
Ji
%
(cj)
WS
v
• -
GM Me SM TM
12
13
14
15
8421
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
00
BL
1
2
3
-A
01
B-
11
-
10
I
J
S
T
K
L
M
BA
11
4
5
U
V
N
6
W
0
F
7
8
X
y
P
G
a
H
9
Z
R
I
0
f
<
>
II
liil
v
[2] The write translator accepts the complete EBCDIC
code and translates the bits to the BCD code.
However, the read translator translates the BCD
code only to the bits outlined,
. ..
$
%
WS
- •
TM
[1] The graphics in these charts may not be identical
to those printed by the printer or printer-keyboard.
The graphics are intended as references for
translating bit codes on a read or write operation.
A
8
C
D
E
MC
)
(
[3] When operating in the even-parity mode, the
EBCDIC blank (bl) is translated to a BCD substitute
blank (bl), and the BCD substitute blank is
translated to an EBCDIC blank (01000000). The odd
parity blank's bit code is 000000.
+
SM
GM
57-020
Copyright International BUSiness Machmes Corporation 1976, 1979
C)
I
Notes:
.
Note 2
r(
PG
4.5,6,7r-- 2.3 I - T r I c k s
-
.
11
0
1
2
3
4
5
6
7
8
9
I
BCD - 6 Bit Code
()
"'--'
o
r-" '\
i"'-., )
\,..
C)
(
("-",
SWitch B
B
In Lines
'<,\1131
~"
ROSl
XM071
XM131
rCU Busy A
-+
[11 TCS is shown as 2CS on logic pages and in the MFI.
NOTE:
CU Busy
oAdded Logic
CU Busy B
i!i!!li!!I!!!!!!!!!!!!!!!!!!
A
FC031
B
XM031
3803-2/3420
58-010
© Copyright International BUSiness Machines Corporation 1976, 1979
'";J
I
0
(~
\
\
,,----,j
(-~
\;/
fl
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0
1"'""1\
~)
()
~~
',-
j:l
(,.-,~
,1"""''»\
;/
'- jJ
'--
0 C) 0
(~
\J
,0
\_y
~
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58-011
OPER-TWO-CHANNEL SWITCH (TCS) (Cont'd)
The Sense/Reserve command (F4) locks the
two-channel switching circuits to one interface, so the
other interface does not have access to the tape
control. The Sense/Release command (D4) resets the
reserved condition and allows the tape control to accept
commands from either interface.
When a tape unit completes an operation, a Device End
signal is sent to the channel. A tape control with the
Two-Channel switch uses the second Device End LSR
to ensure that the Device End is returned to the channel
that initiated the operation. See Device End on 58-012.
RESETS
The Reset circuits of the two-channel switch are
interlocked so a Reset from one channel cannot disrupt
operations on the other channel. A Reset can be
accepted only from the operating channel. Resets are
further conditioned to prevent a channel from
destroying information needed by the other channel.
INTERFACE SWITCH CONTROL
A tape control with a Two-Channel switch monitors
addresses on two channel interfaces. When the tape
control receives its own address, it tries to start an
operation with the interface attempting selection. If the
tape control is neither busy nor reserved, the
OPERATIONAL IN latch for that interface is activated.
If the tape control is busy or reserved to interface A.
interface B ADDRESS OUT will be answered with a
SHORT BUSY sequence, and vice versa. The interface
which received SHORT BUSY will receive a CU END
when the tape control is available. If the channel stacks
status containing UNIT CHECK or UNIT EXCEPTION,
the tape control will remain connected to that interface
until status is accepted. If both interfaces attempt
selection simultaneously, a tie-breaker circuit resolves
the selection. See 58-030.
The purpose of interface switching circuits is to connect
the tape control 'common' circuits to whichever
interface is operating. To operate with an interface,
output from the OPERATIONAL IN latch (FC141) gates
interface drivers for the corresponding interface when
OPERATIONAL IN is gated by -SWITCHED TO
CHANNEL A (or B) (58-030).
The two-channel switch microprogram is entered by
branching from Initial Selection (or Ending Sequence) to
ensure that data is sent to or from the proper interface.
RESERVE/RELEASE OPERATION
A Sense/Reserve command locks the tape control
to an interface until a Sense/Release command or
a Reset is received from that interface.
A Sense/Release command resets the RESERVE
flag to allow operation on either interface.
A Sense/Reserve or Sense/Release command.
while chained, results in Command Reject.
After Initial Selection, operation of Sense/Reserve
and Sense/Release commands are identical to a
Sense command.
The Sense/Reserve and Sense/Release commands
enable the tape control to remain locked to one
interface. Executing a Sense/Reserve command places
a tape control under exclusive control of one channel
until that channel issues a Sense/Release command. A
Sense/Reserve command from channel A or B activates
the RESERVE flag for A or B. A Sense/Release
command deactivates the RESERVE flag.
Modifier bits, in positions 0,1,2, and 3 of a Sense
command byte identify the reserve and release
operations. After Initial Selection, modifier bit 2
determines whether the command is a Reserve or a
Release. If bit 2 is on, (command code F4) Reserve is
indicated. If bit 2 is off, (command code D4) Release is
indicated.
SENSE/RESERVE COMMAND [F4]
A Sense/Reserve command locks the tape control to
the interface of whichever channel initiated the
command.
During Command Out of a Sense/Reserve command,
the current command is masked for the F4
configuration. If an (F4) command is recognized. the
microprogram checks for chaining (SETRESV). If
chaining is not indicated, CURFLAG (20) is set in
FLAGS1 (LSR 10) to reserve the tape control. If
chaining is indicated, Command Reject is set.
In a valid Sense/Reserve command. bit 2 from the
CHANNEL TAGS IN (CT!) register (FC161) prevents
resetting the SWITCHED TO CHANNEL A or
SWITCHED TO CHANNEL B latch (58-030) and the
tape control remains reserved to the operating interface.
(/
(58-030) until a reset or Sense/Release command is
received from the operating interface.
interfaces are partitioned (both switches set to
DISABLE). the tape control is offline and the CE panel
controls can be used.
SENSE/RELEASE COMMAND [04]
A Sense/Release command resets the RESERVE flag to
allow the tape control to operate with either interface.
As in the sense / reserve operation. the Sense / Release
command checks for chaining. A valid Sense/Release
command leaves position 2 of the CHANNEL TAGS IN
register reset so the SWITCHED TO CHANNEL A and
SWITCHED TO CHANNEL B latches are reset at the
end of each chain of commands.
SELECTION
Address decoders in the tape control continuously
monitor both interfaces. If the correct address bits
arrive on the bus out lines along with an ADDRESS
OUT tag, the SELECT OUT latch is reset. CONTROL
UNIT END latch OFF ANDs with a minus output from
the SELECT OUT latch to generate TRAP CHANNEL A
or TRAP CHANNEL B.
Assume that the tape control is idle and is addressed
by channel A. The TRAP CHANNEL A line ANDs with
the SELECT SIGNAL CHAN A to set the SWITCHED
TO CHANNEL A (tie breaker) latch. SWITCHED TO
CHANNEL A ANDs with DELAY SELECT SIGNAL
CHAN A to generate INITIAL SELECTION CHAN A.
Once interface A is addressed and selected. it arms the
CONTROL UNIT BUSY AND circuit in interface B. If
interface B tries to use the tape control during the time
interface A is locked onto the switch, the CONTROL
UNIT END latch for interface B is set.
IMPLICIT CONNECTION
An implicit connection is one that does not depend on
program intervention for release. The duration of the
connection is determined by the time required for the
tape control to perform a command or a chain of
commands. The switch reverts to neutral on completion
(at the tape control level) of the last command in a
chain.
An implicit connection is extended if the channel stacks
primary status. The stacked status must then be
accepted by the channel to terminate the connection. If
the status byte contains Unit Check. a contingent
connection is made and acceptance of the status by the
channel does not terminate the connection.
If the channel stacks secondary status containing Unit
Exception or Unit Check. connection to that channel will
be maintained until the status is accepted by the
channel. If the status byte contains Unit Check. a
contingent connection is made and acceptance of status
by the channel does not terminate the connection.
If the channel stacks secondary status other than Unit
Check or Unit Exception, the switch returns to neutral
and is available to either channel. Any further attempts
by the tape control to present this status to the channel
that indicated STACK STATUS are controlled by
SUPPRESS OUT from that channel.
When interface A is finished operating. MP1 determines
that the Two-Channel switch is installed, and MP2
checks status of the CONTROL UNIT END latches. If
either CUE latch is on, MP1 presents CUE status to the
interface associated with that latch. The CUE will have
a random tape unit address unless presented along with
Device End.
PARTITIONING
Partitioning, achieved by operating the Enable/Disable
switches, restricts the accessability of the tape control
to either channel. Partitioning bypasses SELECT OUT
and degates all interface functions. When both
Output of the SWITCHED TO A (or B) latch blocks
interface switch circuits for the opposite interface
58-011
© Copyright International Business Machines Corporation 1976. 1979, 1983
OPER-TWO-CHANNEL SWITCH (TCS) (Cont'd)
58-012
CONTINGENT CONNECTION
CONTROL UNIT END
A contir.gent connection is initiated when the last
status byte contains Unit Check. The connection is
maintained until a command other than Test I/O or
NOP is received from the channel to which status was
presented. Any command other than Test I/O or NOP
to that tape unit clears the contingent connection if the
tape unit is READY.
The CONTROL UNIT END latch (58-030) remains on,
remembering that channel B tried to break into channel
A operations. This latch also sends +CUE PENDING
CHAN B to the microprogram branch-on-condition logic
(AB161) to notify the B interface that a Channel End is
pending. When the tape control is no longer operating
with, or reserved by, interface A, the SW TO CHAN A
latch turns off, -TRAP CHAN B is active, and the
SELECT CHAN B line is still active to turn on the SW
TO CHAN B latch.
The purpose of the contingent connection is to ensure
an available path to the tape unit and the transmission
of sense data from the tape unit to the proper channel.
If a Test I/O or NOP is issued by the addressed
channel to a tape unit other than the one contingently
connected, the tape control responds with SHORT
BUSY and retains the connection.
The SW TO CHAN B latch gates the output from
OPERATIONAL IN to channel B to send a Unit Status
byte to channel B. The status byte will contain a CUE
(bit 2) indicating the tape control is now available for
other operations. A standard REQUEST-IN sequence is
used to transmit the CUE status byte.
BUSY
At the end of an operation, the SW TO CHAN A (or B)
latch is reset unless a chain, STACK, INTERRUPT, or
UNIT CHECK condition exists. OPERATIONAL IN is
reset in the Burst Ending Sequence when CHANNEL
TAGS IN register bit 7 is reset.
While the tape control is operating with one interface,
a SELECT from the other interface will be answered
with a SHORT BUSY signal (Bits P, 1, 3). Assume that
the B interface is operating when the A interface
attempts to address the tape control (58-030). The
SWITCHED TO CHANNEL B latch blocks the setting of
the SWITCHED TO CHANNEL A latch. However,
-SELECT SIGNAL CHANNEL A is ANDed with -ADDR
COMPARE CHAN A and NOT PROPAGATE SEL OUT
CHAN A to reset the CHANNEL A SEL OUT latch. With
the latch reset, the minus output of the off side of the
latch is ANDed with -ENABLE CHAN A and
OPERATIONAL IN to condition one input to the channel
A CUE latch. A second conditioning input is
OPERATIONAL IN, and the third is the minus output
from the CU BUSY AND circuit. Thus, the CUE latch
for channel A, is turned on to send CU BUSY STATUS
CHAN A to the A interface.
With OP IN reset, no REQUEST IN, no ADDRESS OUT,
and no SELECT OUT for the tape control, the SELECT
OUT latch is active. (Note that the SELECT OUT latch
is turned on when the tape control is inactive.) With
the SELECT OUT latch active, the plus output degates
-RESPONDING TO CHAN A (or B). -RESPONDING TO
CHAN A (or B) inactive resets the SW TO CHAN A (or
B) latch, and the tape control is available for another
selection sequence.
STACK
In some cases the channel may refuse the end status
byte, this turns on a 'stack' condition. If the status byte
contains Unit Check or Unit Exception, the tape control
remains connected to that interface until the channel
accepts the status. If the status byte contains Unit
Check, the connection is maintained until a command
other than NOP or Test I/O is received from the
channel to which the status was presented. This
procedure makes certain the channel has an
opportunity to interrogate a unit check condition before
the other channel disturbs the tape control. When the
interface connection is maintained because of a unit
check, the connection is defined as "contingent" (not
part of the normal routine).
The BUSY signal sent to channel A is a Unit Status
byte with bits 1 and 3 on. Bit 3 indicates BUSY, while
bit 1 (status modifier) indicates that the BUSY condition
applies to the tape control. Bits P, 1, and 3 are forced
onto the BUS IN lines at the same time the STATUS IN
tag line is forced up. The STATUS IN latch is not
turned on during this SHORT BUSY sequence.
TIE BREAKER
Stacking of status other than Unit Check or Unit
Exception does not maintain the interface connection.
The TCS will be reset to neutral, and the tape control
will become available to either channel.
Tie-breaker logic (XM 101) on 58-010) controls the
interface switch lines so only one channel operates the
subsystem, preventing one channel from interfering
with the operation of the other. When neither interface
is reserved or operating, the interface switch circuits
are in a neutral state, and either interface can initiate an
Initial Selection sequence.
STACK INTERRUPT
A Halt I/O command received by the tape control
before the channel accepts the ending status causes
the MP1 microprogram to reset OP IN and check for
two-channel operation and contingent connection. If a
contingent connection is needed to prevent loss of
error information, the microprogram branches to a
'Hold Interface' routine.
Address decoders monitor the bus out lines of each
interface. If the tape control address appears on the
bus out lines along with an ADDRESS OUT tag, the
decoders send a signal to the interface switch controls.
When no interfering conditions exist, the controls
connect that interface to the tape control. If the tape
control is reserved or operating with the other
interface, a 'short busy' sequence is sent to the
interface attempting to break in.
With no contingent connection, an interrupt cycle is
initiated to present the stacked status. CONTROL UNIT
BUSY will be reset (if applicable) and HOLD
INTERFACE will be set if the STACK or STATUS
PENDING flag is on.
When the tape control becomes available, a Control
Unit End status byte is sent to the channel that
previously received the BUSY signal.
DEVICE END
The purpose of Device End circuits is to signal the data
channel when a tape unit has completed a task and is
ready to accept a new one. On a tape control with the
two-channel switch feature, separate LSRs in MP2 are
used to store the Device End signal for each channel.
The second Device End LSR ensures that the Device
End is returned to the channel that initiated the
operation.
See 58-030 for schematic details.
A Device End received while the two-channel switch is
in a neutral state causes the tape control to enter an
interrupt status. The tape control then presents the
Device End to the channel that initiated the Device End
operation, if that interface has not been partitioned.
Partitioning resets pending Device Ends for that
interface.
An interrupt due to a Control Unit End sends Device
End, including the address of that device, and Control
Unit End, to the channel.
58-012
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OPER-TI E BREAKER (TCS)
TCS SELECTION AND TIE-BREAKER LOGIC
(PART 1)
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FC041
Note: See 58-012 for description of circuit operation.
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Address Out Chan A
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58·031
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COPYright Internattonal Business Machmes Corporation 1976, 1979
58~030
58-031
OPER-TIE BREAKER (TCS) (Cont'd)
58-030
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TCS SELECTION AND TIE-BREAKER LOGIC
(PART 2)
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58-031
Copyright International Business Machines CorporatIon 1976,
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AB161
(Interface Branch on Cond Chan B)
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Device switching allows access to a maximum of
sixteen tape units by two, three, or four tape controls,
and permits simultaneous operation of as many tape
units as there are tape controls.
3803 Models 1 and 2 can be mixed in a switching
configuration; however, attempting to access a 3420
Model 4, 6, or 8 through a 3803 Model 1 produces
unpredictable results.
Device switching is performed via the Communicator
and Device Switch features. Three Device Switch
features (58-051) available with the tape subsystem
are:
2 Control Switch used with 2x8 and 2x16
configurations
3 Control Switch used with 3x8 and 3x16
configurations
4 Control Switch used with 4x8 and 4x16
configurations
The minimum switching subsystem configuration allows
two tape controls to access up to 8 tape units and is
called a 2x8 configuration. The maximum configuration
is 4 tape controls and 16 tape units (4x16). A
non-switching configuration (1 x8) is referred to as
Selection Logic.
Device Switching logic is installed only in those tape
controls that have attached tape units.
The location of the Device Switches depends on the
configuration desired. For example: In a 2x8, 3x8, or
4x8 configuration, the switching feature is required only
on the first tape control while in the 2x16, 3x16, and
4x16 configurations, the switching feature is required
on Tape Controls 1 and 2 (58-051). The 2x16
configuration consists of two tape controls, each with a
Communicator 1, a 2 Control Switch, and eight tape
units. The tape controls may be connected to either
different channels of the same system or on different
systems.
Device switching logic is logically invisible (except for
BUSY responses during Initial Selection and Device End
interrupts, which result when tape units become
available). Device switching logic is modular to allow
flexibility for a variety of system configurations.
Subsystem priority and device addressing are assigned
by pluggable jumpers within the switch. Any tape unit
may be partitioned (made unavailable) to any tape
control via toggle switches on the tape control
operator's panel (58-060).
(
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58-050
OPER-DEVICE SWITCHING CONFIGURATIONS
DESCRIPTION
(
2 Control Switch
4 Control Switch
The 2 Control Switch is a 2x8 configuration of
hardware switching logic (58-051, 58-055). Tape Units
7 (attached to Tape Control 1) can be accessed by
the Communicator in Tape Control 2 as well as the
Communicator of Tape Control 1. A 2x16 configuration
is obtained by installing a 2 Control Switch in both
Tape Controls 1 and 2, allowing the Communicator in
each tape control to access its own eight 3420s, as
well as 3420s of the other tape control.
A 4x8 configuration is obtained by installing a 4 Control
Switch in Tape Control 1 and a Communicator 1 in
Tape Controls 2, 3, and 4 (58-051). Tape units attach to
Tape Control 1.
o-
3 Control Switch
A 3x8 configuration is obtained by installing a 3 Control
Switch in Tape Control 1 only and a Communicator 1 in
Tape Controls 1, 2, and 3 (58-051). Tape units attach to
Tape Control 1.
A 4x16 configuration is obtained by installing a 4
Control Switch in both Tape Controls 1 and 2. Two
more tape controls must be added to the configuration.
Tape Controls 3 and 4 do not contain any switching
hardware or attach any tape units, but each contains a
communicator.
The 3 Control Switch and the 4 Control Switch are
expansions of the 2 Control Switch. They allow access
to eight attached tape units by the additional
Communicators.
A 3x16 configuration is obtained by installing a 3
Control Switch in both Tape Controls 1 and 2. A third
tape control must be added to the configuration. Tape
Control 3 does not contain any switching hardware or
attach any tape units, but does contain a
Communicator.
3803-2/3420
«~ COPYright International Business Machmes Corporation 1976, 1979
58-050
58-051
OPER-DEVICE SWITCHING CONFIGURATIONS (Cont'd)
t x 8 Configuration
2 x 16 Configuration
2 X 8 Configuration
Tape Control
Number 1
Tape Control
Number 1
Notes:
Tape Control
Number 2
Tape Control
Number 1
[1] Maximum of 16 tape units and 4 tape controls.
Tape Control
Number 2
[2] Tape units attach only to tape controls with
switching features.
Com 1
[3] Any or all control units may have two channel
switch features.
0··· .... ····7
Tape Units
[4]
0 .. · .. ····· .. ··7
For 3420 Model 8 power requirements, see 90-180.
0 .. · ........ · .. 7
8
···F
Tape Units
Tape Units
Tape Units
3 x 16 Configuration
3 X 8 Configuration
Tape Control
Number 1
Tape Control ........
Number 2
Com 1
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3 Control
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Communicator ..
Tape Control
Numb~r 2
Tape. Control
Numb~r 1
Tape Control
Number 3
Tape Control
Number 3
Com 1
Com 2
Communlcatol .......
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7
0·· .. · ...... · .. 7
Tape Units
4 x 16 Configuration
4 x 8 Configutation
Tape Control
Number 1
Tape Control
Number 3
Tape Control
Number 2
Com 1
Com 1
Tape Control
Number 4
Tape Control
Number 3
Tape Control
Number 4
Com 2
Com 2
Communicator
Communicator
0 .. ··· ........ ·7
Tape Units
0.--------.----7
8----·--· .. ----F
Tape Units
Tape Units
58-051
© Copyright International Business Machines Corporation 1976, 1979
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58-055
OPERATOR PANEL SWITCHES (16)
Switch Section A on Tape Control' directs Tape
Control " s access path to Tape Units 0-7. Switch
Section B on Tape Control' directs Tape Control 2's
access to Tape Units 0-7.
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II
II
I
Secondary
Primary
I
~I
Interface
Interface
I
I
I
~----------- ----~
Communicator 1 Feature
Addresses Jumpered 0- 7
Switch Section A
Crosspoint SWitches
I
I
BO-B7
The Secondary Interface is not used
on the 2 x 8, 3 x 8, or 4 x 8 configurations.
Tape Control 2 --------..,
I
I
I
I
L___ ._
Tape
Unit 0
1
COPYright International Business Machines Corporation 1976. 1979
Tape
Unit 7
58-055
OPER-2x16 SWITCH LOGIC
r
58-060
r
Tape Control 1
Tape Control 2- -
-
-
-
-
-
-I
Communicator 1 Feature
Addresses Jumpered 8-F
Communicator 1 Feature
Addresses Jumpered 0-7
Primary
Interface
.----)-7 >-------1 r-----,~..;._
Interboard
Flat
Cables
Crosspoint SWltch"s
Crosspoint SWitches
I
I
1
_I
L
Tape
Unit 0
Tape
Unit 7
I
I
L _
Tape
Unit 8
~
Tape
Unit F
OPERATION
LINE DEFINITIONS (58-100)
The Device Switch is controlled by lines from the tape
control. Although there are necessary switching delays,
data transfers, control requests, and responses, tape
unit status is sent to the tape control as if the switch
were not present.
Busy/Tach: The BUSY/TACH line indicates the state
of the device (busy or not busy) to the tape control.
Device Operating Interface A and B (2 lines): A device
operating line is active when a committed tape unit
(one for which a COMMITTED latch has been set) has
its BUSY/TACH line active. The DEVICE OP INTF A
line to the tape control is used for generating the
METERING IN line for its channel interface. The
DEVICE OP INTF B line serves the same function but is
used by the second channel interface when the
Two-Channel Switch feature is installed.
Selection: When DEVICE SELECT (58-090) is activated,
with the device address on the DEVICE SWITCH bus
and the node is enabled, the switch tries to set the
COMMITTED latch for the node. Note: A "node" is
the logic circuitry required to select and assign one
tape unit to a requesting tape control. If the device has
already been selected by another tape control, a BUSY
indication is returned to the tape control attempting
selection. If the device is not busy, the COMMITTED
latch is set. The latch output is then sent to the other
tape control nodes for that device to prevent selection
by them. At the same time the committed latch is set.
the SELECT crosspoint line to that node will become
active and GATE BUS OUT will be the response to the
selecting tape control. The BUS OUT and BUS IN
connection has now been established between the tape
control and tape unit. SWITCH SELECT is not required
to select a tape unit, although it is always active in
3803 subsystems.
Run Meter: When the node is enabled, the RUN
METER line is sent to the device for meter operation.
Set/Reset: The SET/RESET line is tied active so the
ENABLE/DISABLE latch can be set to the
corresponding state of the Enable/Disable switch on
the operator's panel.
Committed: Once the COMMITTED latch is set for a
given node, it remains set until reset by the selecting
tape control. Reset is accomplished by addressing and
sending a 50 ns pulse on the SET/RESET line.
Priority: When two or more tape controls attempt to
select a tape unit at the same time, priority of access is
determined by jumpers plugged on Tape Controls 1 and
2 (58-100). See Section 90 for plugging details.
... - - - - . - - - -.. - - - - - - - 4 .
Switch section A on tape control 1
directs tape control 1's access path to
tape units 0-7. Switch section B on
tape control 1 directs tape control 2's
access to tape units 0-7.
Tape control 2 switches are similar to
tape control 1. except section A directs
tape control 2's access to tape units 8-F.
Section B controls the access of tape'
control 1 to tape units a·F.
I
2
8
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8
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58-060
COPVrlght International Business Machmes Corporation 1976, 1979
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58-070
OPER-4x16 SWITCH LOGIC
Notes:
[1] The maximum switch configuration consists of 16
tape units and 4 tape controls.
[2] Tape units attach only to the tape controls with
device switching features.
[3] Any or all tape controls may have a Two-Channel
Switch feature.
.r
I
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Tape Control
4--------,
Communicator 2 Feature
Secondary
Interface
I
L ----
J
Primary
Interface
I
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r-------r-----'
I" Tape ControI1--------'"j
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Communicator 1 Feature
Addresses Jumpered 0.7
I
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Secondary
Interface
Primary·
Interface
I
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AO- A7
80- 87
CO-C7
DO-D7
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.- Tape Control
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--------
Communicator 1 Feature
Addresses Jumpered 8-F
Secondary
Interface
Pnmary
Interface
I
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:
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L
I
D
A
8
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C
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Crosspoint Switches
Crosspoint Switches
II I I I I I
II I II I I
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-
Tape
Unit 7
I
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1
t
I
TU Online/Offline Switches
-------------
Tape
Unit 0
Tape ControI3--------'"j
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Communicator 2 Feature
I
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Primary
Secondary
I
I
Interface
Interface
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IL ________________ ..JI
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Online/Offline Switches
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((" COPYright International BUSiness Machines Corporation 1976. 1979
8
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AO- A7
co - C7
80 - 87
DO- Dr
-- ------------- _....
Tape
Unit 8
Tape
Unit F
58-070
58-080
OPER-2x8 SWITCHING FUNCTIONAL UNITS
G
G
•
Logic Section: The logic section communicates
with the tape control to provide status, device
address, and accessing interlocks_ The information
exchanged establishes tape unit attachment to the
tape control and presents switch status to the
operating tape control or controls in the subsystem
configuration_
Crosspoint Section: The crosspoint section is a
switch matrix capable of switching twelve inbound
and twelve outbound lines_ Each node (tape
control/tape unit path) is controlled by the logic
section_
Communicator: The communicator replaces the
selection logic circuits and associated device
interface cabling in the basic tape control with
different logic circuits and cabling to the device
switches_ The communicator divides the device
interface into primary and secondary and controls
the gating of each according to the address of the
device being selected. The communicator consists
of interface drivers and receivers.
Tape Unit Online/Offline Switches: Tape unit
toggle switches (58-060, 58-100) are located on the
operator's panel of each tape control having a
device switch feature. These switches enable the
operator to determine tape unit availability to each
tape control in the configuration. In a 4x16
configuration, four tape controls can access 16
tape units so there are 64 toggle switches, 32 each
on Tape Controls 1 and 2. There are no switches
in Tape Controls 3 and 4.
e, e, e, e, 0, •
Note: G,
ALD XC-700 pages.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(All reside in TCU-1)
1- - - - - - - I
I
IDTU Online/ Offline
Switches (0- 7)
58-060
1'1
Bus and Tag Out Lines (12)
1I
---------1
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_~:o
tJ
Tape Control Unit 1
(TCU-1) (Also
identified as C.U.
'A'.) (Hosts TUO-7)
i
iii Crosspoint
Switches
"Outbound"
~
-
I-
0
~Bus In Lines (9)
co co
e~
c:-
IE
,
0
~
I:
.
--0
>
~
~
co
I
-
Bus and Tag Out Lines (12)
0
'" c:
00=
18
1
1
1
-
-
58-090
CrossPOint SWitches
"Inbound"
58-090
1
The Communicator 1 feature has only one external
(primary) interface_ The Communicator 2 feature has
two external interfaces (primary and secondary). The
secondary interface connects attached 'tape units
through Switch Section A (58-055, 58-060). The
primary interface connects a 3803 that does not have
tape units attached to another tape control through
Switch Section B.
e
Device Switching Functional Units- -
r
Functional Units of the Device Switch are:
I
I
Gate Bus Out
0
0
lEt Logic Section
58-090
I
I
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1
1
1
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IL _ _ _ _ _ _ _ _ _ _ _ _ _ _
~', Copyright
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58-080
International Business Machines Corporation 1976. 1979
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58-090
OPER-DEVICE SWITCH NODE
r------------------------------------------~
Gating a control unit to device path node on or off
effects switching at the device interface level.
58 -080
Each node consists of parts of three logic cards. The
crosspoint cards (B) contain the electronic switches
needed to switch the bus in or bus out lines for a
node. The switch logic card (A) contains the circuitry to
control the crosspoint switch and communications to
the tape controls.
•
Outbound
:
BUS OUT TO DEVICE 0
BUS OUT FROM TC A
XPT
Switch
The crosspoint (XPT) switches are gated by the set
to the COMMITTED latch.
COMMITTED lines prevent simultaneous selection
of the same device by more than one tape control.
II
INTERFACE COMMITTED, COMMITTED, and
DEVICE BUSY are ANDed to generate DEVICE
OPERATIONAL, which is sent to the tape control to
develop METER IN for the channel interface.
II
Inbound
BUS IN TO TC A
IB
II
(
BUS IN FROM DEVICE 0
XPT
Switch
f+-
58 -110
SELECT XPT DRIVE
L
I
DEVICE END INTERRUPT lines are scanned by the
tape control to determine which tape unit has a
DEVICE END INTERRUPT pending.
Crosspoint Switch
-
-
-
- -
-
- - - - - - - - - - - - - - -
-
-
-
-
-
-
- - - - -
- - - - - -
-
--
-
- -
-
-
-
-
- - - - - - - - - - - - - - - - -
- - - - -
58-080
DEVICE SEL
AND ADDRESS
DECODED
Committed
- - J
- - l
COMMITTED CU A
GATE BUS OUT
(To communicator that
addressed this switch)
D~
S WITCH BUSY
BUSY IT ACH is available to the tape control when
the node is selected and enabled and the DEVICE
BUSY or SWITCH BUSY line is inactive.
-
II
II
DEVICE OP INTF B
A
FL
A
TC ENABLED
AND POWER
,..--
r--Interface B
Committed
II DEVICE OP INTF A
rooA
INTERFACE B
SELECTED
1 Node Configuration
r
-1- -,
L
_1_
-
FL
A
I_lei
Tape Control A
-1
Tape Control C
A
OR
SELECTED-ADDRESSENABLED
Tape Control D
Device
iii
BUSY/TACHOMETER
DEVICE BUSY/
TACHOMETER
Tape Control B
o
2
3
4
5
6
.
7
A
DEVICE END INTERRUPT
OR
DEVICE END INTERRUPT
I
Switch Logic Card
LSe':'F~ 5~- 1~ ~r ~ta~. _
-
_ _ _ _ _ _ _ _ _ _ _ _ -.J
58-090
fU Copyright International Business Machines Corporation 1976. 1979
(
58-100
OPER-DEVICE SWITCH NODE (Cont'd)
r
Interface B Selected
I
I
Bus Out/Tag Out Lines (12) Device
!
Bus In Lines(9)
-, L -------- J
TC
TC { Bus Out/Tag Out Lines (12)
: r--o
Bus In Lines (9)
SEL XPT O.
Device { Busy/Tachometer
rNode Logic
I
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Camm'.... CU'
Switch
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Device Address 1/1
I
Device Address 212
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T
Jumper
I
Device Address 8/8
!•
Ir
Power Down
TC
PWR On Reset
Switch
.---
N
'---
A
•
A
N
J
Disable
•
Enable/Disable
Set/Reset
!I
'---
A
FL
1
~
A
-
'--~
Selected-Address-Enabled
A
OR
Enabled
-
DISABLED
PWR
A
On Reset
r--
OR
~
f-
-
A
Reset Committed
A
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..-I
Switch Select - Not Device Select
IL _________________________
Hun Meter
A
Gate Bus Out
TC
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Device Operating Interface A
TC
Device Operating Interface B
TC
:
Device Committed CU A
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Interface B
Committed
-
OR
A
____ ...,
J
r-
FL
'--
L
A
--
OR
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,---
OR
r-
I
OR
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FL
A
Enabled
f--
A
I
A
Device End Interrupt
l
Ir~
-
Device
Committed
A
Selected
L
I
TC
r--
Not Committed
I
Device
le
1
I
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OR
A
..1
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-v
See 58 -110 for detail.
I
Switch Busy
-
I
I
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IL
I
Jumper
I
0
OR
Address
Enable
I
TU
Online/Offline
Switches
I
XPT Switches
Device Busy
D~e
OR
XPT Switches
L-----------------i•
Address
:I
Device Select
..."
I~
I
Switch Select
-- --
Priority Reset C
Priority Reset D
I
Device Address 4/4
~
--:-~-PriOrity Reset B- - - - - - - - - - - - - - - - - - - -
T I
I
Committed CU C
Committed CU D
TC
Switch
xPTCards-----1
OR
Busy/Tach
I
TC
I
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1
Run Meter
I
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Device
Device End Interrupt
I
•
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~
Switch
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~------------------------J
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I I I I I
B
C
D
0
1 Node Configurati on
1
I I I I I
I I I I I
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3 4
6
2
5
7
58-100
( COPVrlght International Business Machines Corporation 1976, 1979
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58-110
OPER-INBOUND CROSSPOINT SWITCH
TU5 P
rl
BUS IN 0 TU 0-4, 6, 7
I
(
GATE BUS OUT/SEL XPT 5
N
XPT Switch
From Switch Logic Card
H
.
BUS IN PTU5
DOT OR
I
)
TU5 4, 5, 6,7
H
N
BUS IN 1
TUO-4,6,7.
(
{
J
1
XPT Switch
N
I
STATUS, DATA
and CONTROL
P05 BUS IN 0 TU5
-BUS IN OTU5
J04
M07 BUS IN 1 TU5
-BUS IN 1 TU5
J07
P04 BUS IN 2TU5
(
)
XPT Switch
-BUS IN 2TU5
From Device 5
-BUS IN 3TU5
Note: See ALD pages XCnnn.
TU50,1,2,3,
24Q
ENTR
XA111
See Note
DOT OR
(
)
.
BUS IN 4-7 TU5
G02
H
P06 BUS IN 3 TU5
J03
G10
DOT OR
XB103 B3H2
See Note
BUS IN 2
TU 0-4,6,7,
BUS IN 3TUO
BUS IN 3 TU1
BUS IN 3TU2
BUS IN 3 TU3
BUS IN 3 TU4
BUS IN 3 TU5
BUS IN 3 TU6
BUS IN 3 TU7
D13 -CU 6 BUS IN 3
DOT OR
XB105
See Note
58-110
l
COPYright International Business Machmes Corporation 1976. 1979
(
58-111
NOTES:
3803-2/3420
58-111
'{
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CopYright InternatIonal Business Machines Corporation 1976. 1979
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REF-CE PANEL
Off
Degates the following functions:
(J)
Panel
Enabled
Intf's
Disabled
Control Check
Data Flow Check
Stop On
Lo I C Hi IC
Stop On MTE Env Skew Read
Cmpr
Equal
~
Start or Step
Display Select
CE Reg
Cmpr Reg
Device
4
5
Data ALU 1·Chan ALU 2'Device
Norm
Data ALU 1·Chan ALU 2'Device
Stop
ROS Data Bits 0·7
Step
ROS Data Bits 8·15
Ai~" @
Lamp Test
6
7
8
~g~~
ROS Address
Set IC
Cycle
9
10
2.
Stop On-Data Flow Check
3.
Reset/Start or Step
4.
ROS Mode
5.
Command Control switches (3)
STOP ON-CONTROL CHECK (TWO-POSITION
TOGGLE)
11
~~glg
Serv 1Sta 1 Adr 1
Op 1ALU
Device Address
,_ALU
Serv 0 Sup U Adr 0 Cmmd 0 ALU
Sel
Cmmd Ctrl
Move
ALU
Sup
CU
Reg
~Reg
I~eg
1
2
1
2
~~ALU1
~~~~d
ALU 1
Data Entry Select
Cmpr Reg
Start
Note: If the Panel Enabled light does not light. set the
ROS Mode rotary switch to Norm and operate the Set
ROS Mode switch (momentary).
PANEL ENABLE (TWO-POSITION TOGGLE)
Panel
On
~
Allows the CE panel functions identified by yellow
lette,ing to be performed with the Interface Disabled
light either on or off.
Active only if ROS is in normal mode. It may be
necessary to raise the Set ROS Mode momentary
switch to establish this mode. The Panel Enabled light
is ON when the switch is ON.
@
Active only while ROS is in Stop mode.
Stops both ALUs when any control check is recognized
in the ALU selected by the ALU1/ ALU2 switch. The
exact stopping location depends on the type of error; it
is usually two less than the stop address except for a
BOC. Generally. microprogram-detected errors will not
be recognized until a transfer hardware error (XFR
HDWERR) microinstruction is executed. Most other
errors will stop the ALUs when the failure occurs.
ii@
CE PANEL SWITCHES
Stop On
On
ALU 2' CE/Cmpr
Command Controls
Wr Data Single
Stop On-Control Check
RESET/START OR STEP (TWO-POSITION
MOMENTARY TOGGLE)
Reset
Sta rt
0
r Step
Active only while the Panel Enabled light is On.
Reset (UP)
Compare Register
ROS Mode
Rst/Cmpr
RstiErr
LRCECCSkewReadCRCWr uPgm
V RC
Tgr
Command
1.
Wr Tgr u Pgm
®©>(Q)ci©>5(Q)(Q)~CO(Q)©~C(Q)©©)
BOCB Busu
Low Hi 0 BusP
Pty 'Pgm ROS Reg Pty
Comp
Reset
(
75-001
3803 CE PANEL DESCRIPTION
Panel
(
Allows all CE panel functions to be performed with the
Interface Disabled light On.
Disables the compare register equal features of the
ROS Mode switch Stop position.
Off
Allows normal tape control operation.
Sets both ALUs to Instruction Counter (lC) address 000
and causes a Power-on Reset Branch Condition.
Start or Step (Down)
Starts both ALUs after a stop condition, with
subsequent running of the ALUs controlled by the ROS
Mode switch. Also resets the Compare Equal light at
any time without interlocks.
STOP ON-DATA FLOW CHECK
(TWO-POSITION TOGGLE)
Stop On
®
Active only while Interface Disabled light is On (CE
Mode).
On
Stops both ALUs at the completion of a command in
which a failure occurs on Unit Check condition.
Off
Normal tape control operation.
Note: When in CE Mode, the tape control stops on
Unit Exception, regardless of switch position. To inhibit
a Stop-On-Unit-Exception when tape control is in CE
Mode, jumper AA 1T2J12 to ground.
75-001
REF-CE PANEL (Cont'd)
75-002
LAMP TEST (TWO-POSITION TOGGLE)
Lamp Test
@
Allows you to test the CE panel indicator lights.
ROS MODE (SEVEN-POSITION ROTARY)
ROS Mode
Rst Cmpr
Stop
Set ROS Mode
When the data in the compare register equals the IC
address of the ALU selected by the ALU1 / ALU2
switch, and the Display Select switch is in IC position,
both ALUs are stopped. The instructions at the
stopped addresses will not have been executed.
Sets the selected ROS mode.
DISPLAY SELECT (SEVEN-POSITION ROTARY)
Display Sleet
CE Reg
Set CE/Compr
When the Stop On-Control Check switch is active, both
ALUs are stopped only when an error occurs in the
ALU selected by the ALU1 / ALU2 switch.
Cmpr Reg
Sets the data, selected by the three hex rotary switches
into the register selected by the Data Entry Select
switch. The Set CE/Compr switch operates without the
panel enabled or the interface disabled.
IC
Bus In
Bus Out
Rst Err
COMMAND CONTROLS
Note: If compare equal stop function does not work,
make sure the Control Check Stop switch is off.
Set TC'"
Norm
Stop
i~@
Step
Step
Cycle
Active only while the Panel Enabled light is On. After
selecting any of the seven positions of the ROS Mode
switch, activate the Set ROS Mode momentary toggle
switch to set the mode.
Rst/Cmpr
When the IC address of the selected ALU equals the
data in the compare register, both ALUs are reset to
location 000 and allowed to continue running. (The
Display Select switch must be in IC position.)
Hi ROS
Command Controls
Operating the Start or Step momentary switch allows
stepping the ALU selected by the ALU1 / ALU2 switch,
while the ALU not selected runs normally.
Active only while the Intt's Disabled light is on.
Cycle
Ripple/Wr Data
Allows the repetitive execution of an instruction at a
selected address. Step or stop at the instruction address on which you want to cycle. Set ROS Mode to
Cycle and press Start or Stop.
Establishes the data pattern mode for offline write
commands.
Data
Single
CE Reg
Start
When a control check occurs, both ALUs are reset to
location 000 and allowed to continue running.
Set IC
Allows the contents of the compare register to set IC
of the ALU selected by the ALU1 / ALU2 switch.
Displays data currently in the compare register in
indicators 0 through 11.
Norm
IC
Displays the IC address of the selected ALU in
indicators 0 through 11.
Stop/Start
STOP halts the continuous cycling of the four
commands when the Mple/Single switch is in the
MPLE position.
Selects the ALU when the Display Select switch is set
to the IC, Bus In, Bus Out, Hi ROS, or Low ROS
position.
Bus In
With ALU1 selected, displays Channel Bus In data in
indicators 0 through 7 and In Tags in indicators 8
through 11.
START initiates the commands stored in the CE
command registers.
SET ROS MODE/SET CE COMPR
(TWO-POSITION MOMENTARY TOGGLE)
Normal running condition of both ALUs.
Displays Write Data/Go Down or Byte Ct/Multiplier
in conjunction with Data Entry Select.
Cmpr Reg
ALU2
Selects the ALU to be controlled by the ROS Mode
switch.
2.
Mple/Single
SINGLE allows single stepping of the four commands
with each activation of the momentary Start switch.
Rst/Err
Displays command/device in conjunction with Data
Entry Select.
Note: Some stop-on-error conditions stop the CE
clock. which prevents displaying the contents of the CE
registers.
MPLE allows continuous cycling of the four commands
entered with the Data Entry Select switch.
ALU1/ALU2 (TWO-POSITION TOGGLE)
1.
With ALU2 selected, displays TU Bus In data in
indicators 0 through 7 and the device address in
indicators 8 through 11.
Set
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CE/Cmpr
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Bus Out
Cmnd 1,2.3. and 4
With ALU 1 selected, displays Channel Bus Out data in
With the Data Entry Select switch in one of the four
positions (Cmnd 1, 2, 3, or 4), a command and its
associated device address (O-F) may be entered into
one of the four command positions.
o through 7, and outbound control or tags in 8 through
11. Parity is only assured when the microprogram
activates CHANNEL BUS OUT.
To write continuously, jumper from AA1R2J12 to
ground.
Byte Cnt
HiROS
With ALU1 selected, displays ROS1 data bits 0-7 P1 in
through 7 and control lines in 9 through 11.
o
With ALU2 selected, displays ROS2 data bits 0-7 P1 in
o through 7 only.
Low ROS
The three Data Entry switch positions determine the
total byte count. The left and center switches count to
a maximum of 256. The right, or Multiplier switch
counts in multiples of 1024. Position zero of the
Multiplier switch adds zero to the total of the other two
switches. Position 1 would add 1024, 2 would add
2048, etc. To provide a byte count of 3140. set the left
and center switches each to 4. and set the right switch
to 3.
The three rotary switches are used to enter data into
various registers. Set a command into the left switch
and the TU address into the right switch. For example,
01 A entered into the Command register indicates a
write command to device A.
Command
8
9
10
11
OO©>Q Ocg©>©>
With ALU1 selected, displays ROS1 data bits 8-15 P2
in 0 through 7 and control lines in 9 through 11.
With ALU2 selected, displays ROS2 data bits 8-15 P2
in 0 through 7 only.
DATA ENTRY SELECT (SEVEN-POSITION
ROTARY)
Data Entry Sleet
Cmpr Reg
Cm-nd 1
Cmnd 2
Cmnd 3
Cmpr Reg
Allows data in the three Data Entry switches to be
entered in the compare register.
© Copyright International Business Machines Corporation 1976, 1979
Byte Count
Dialed
Byte Count
Written
00 to FE
Byte Count dialed +3
FF
2
o1
2 345 6 7
10000011
Note: The P bit is automatically generated when
required.
The right switch determines the go-down time.
Position zero gives a go-down of 6.0 milliseconds. The
total range is from 6.0 milliseconds to approximately
0.5 second. Each position, 0 to F, represents
approximately 26 milliseconds. A setting of 3 results in
a go-down time of 6 milliseconds + (3 x 26). or
approximately 84 milliseconds.
La IC Hi Ie
~Q(Q)oo50(Q)
BOC B Bus u
Low Hi 0 Bus
Pty P9m ROS Reg Pty
BOC
Checks the 16 branch conditions not checked by the HI
IC PARITY/HI ROS register circuits. (A total of 32
BOCs are checked.) If an even number of BOC groups
are active, a BOC error is indicated.
Checks the output of an LSR for odd parity on the B
Bus on instructions which transfer data from ALU to an
external register. If parity is even, the error is gated to
the hardware error latches and CE panel indicator.
CE PANEL INDICATORS
Write Data Go Down
Write Data and Go Down determine those bits to be
written and establishes the go-down time. The left and
center data entry switches determine the bits to be
written. For example, the Ripple/Wr Data switch in Wr
Data. 8 in the left switch, and 3 in the center switch
writes the following:
Stop On
B-Bus Parity
Note: Check to ensure you get the correct byte count.
Compare Rgeister
CONTROL CHECK INDICATORS
Control Cheek
To do an LWR with go-down time, jumper from
AA 1S2G08 to ground.
Data Entry
With ALU2 selected, displays TU Bus Out data in 0
through 7 and outbound controls or tags in 8
through 11.
567
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75-003
REF-CE PANEL (Cont'd)
4
(/ {
INTF'S DISABLED
Intf's
Disabled
Note: When displaying the LSRs, B-Bus parity errors
can occur bE-cause LSRs are not set to odd parity with
power-on reset.
Hi IC Pty/Hi ROS Reg Pty
The circuits that set this indicator are:
1.
Hi IC parity check.
2.
Hi ROS register parity check.
Indicates when the tape control is offline. The manual
Enable/Disable switch(es) on the CU operator's panel
must be in Disabled position before the lamp comes
on.
3.
Instruction Decode error. (ROS instruction check to
be sure only one ROS operation was decoded.)
4.
BOC Error. (Check of 16 branch conditions.)
CMPR EQUAL
Lo IC Pty/Low ROS Reg Pty
Cmpr
Equal
Q)
Indicates that the data entered in the CE/Compare
register equals that contained in any register selected
for comparison.
Checks parity of the IC (low order) and ROS register
(low order). An even parity error sets the HARDWARE
ERROR latch and CE panel indicator. Lo IC Parity is
checked only on a BU or a successful BOC. Low ROS
Parity is checked on every instruction cycfe.
75-003
REF-CE PANEL (Cont'd)
o Bus
75-004
Pty
Checks the parity of information to be stored in an LSR
at 100 ns time. Bits 0-8 from the D Bus are
exciusive-ORed with the P bit from Bus Out. Even
parity sets the D BUS PARITY ERROR latch and
HARDWARE ERROR 5 latch, and lights the CE panel
indicator. This error condition is only checked on a
transfer of data into the ALU from an external source.
6.
Parity does not match between the channel b.uffer
and the. write buffer outputs on write operations.
7.
When operating in 7-track data convert mode and
a count of bits before and after conversion does
not match.
8.
U Pgm
Monitors the selected ALU and signals an error when
the ALU detects any hardware error, including checkout
errors for both ALUs.
Data Flow Check
2.
Buffer Overrun.
3.
Write Address error.
4.
If CHANNEL BUFFER READ IN counter gets out of
step.
5.
Write buffers are empty when a write tape cycle
occurs.
During a 6250 bpi write operation if RIC leads ROC
by 14 bits.
3.
During a PE write operation if RIC leads ROC by 4
bits.
4.
During a NRZI write operation by skew gate.
1.
Set during a 6250 bpi write operation when there
are two or more error pointers:
6250 bpi Mode
a. Set during single-track error correction if a
match is not found.
Set during a PE operation when there are two or
more error pointers.
b. Set during a write operation if hardware pointer
and correction code indicate different tracks.
Set during a NRZI operation when a block has an
odd number of bits in any track (LRC).
2.
1.
Set when any track signal falls below threshold on
read or write. Does not set Data Check.
2.
Set during a PE operation when any error pointer is
set or when any track falls below threshold. Sets
Data Check on write only.
3.
Set during a NRZI write operation if NRZI Register
2 has incorrect parity.
The P Comp indicator (also C Compare) is set by the
following conditions:
When parity of the byte sent to the channel buffer
on read operations is wrong.
2.
1.
ENV/ECC
1.
During a 6250 bpi/PE read operation if RIC leads
ROC by 30 bits.
Read VRC
3.
P Comp
1.
MTE/lRC
2.
Data Flow Check Indicators
When operating in 7-track mode with the Data
Converter off and the count of bits for each byte
as it enters and leaves the register fails to
compare.
Skew Error is set:
Set during a PE operation if a parity error occurs
and no track pointers are on.
CRC
Set during 6250 bpi and 9-track NRZI operations when
the CRC byte calculated for a read operation does not
match the CRC byte written on tape.
Wr Tgr
Set when the output of the write triggers has incorrect
parity.
NOTES ON CE PANEL OPERATION
A Start I/O command to a tape unit that has Unit
Check or Busy in its initial status byte will prevent
stepping to the next command. This condition can
be caused by a Not Ready tape unit.
CE command sequence hang up: when an error
occurs on a 3803 with the Two-Channel Switch
(TCS) feature installed, a "contingent connection"
is established without Stop On Error ON. This is
caused by dedicated sense data from the failing
tape unit. There are three ways to proceed:
1. Issue a Sense command to the same tape unit
after any other type of command.
2. Issue all four internal program commands,
except a Test I/O or NOP, to the same tape unit.
A Mode Set command can also cause a hang
condition, so it may be necessary to replace this
command following initial setup.
3. In order to allow command cycling to mUltiple
tape units without changing the command setup,
set ROS Mode to Rst/Cmpr using IC address
302 on ALU1. This restarts both microcodes at
000 on contingent-connection conditions and
performs a general reset. To eliminate the need
for pressing the CE Command Start pushbutton,
connect a jumper from AB2Q2S10 (General
Reset FC041) to AA 1T2G05 (Start Key Latch
PK035).
Skew
Set when vertical misalignment of bits exceeds
acceptable limits. (If all bits in a byte are not received
by the read circuits within a specified period, the bit
has excessive "skew" and Skew Error is set.)
U Pgm
Set when ALU2 detects any microprogram error,
including End Data Check on PE operations, and any
error indicated in sense byte 8, bits 0-6; sense byte 9,
bit 1; and sense byte 10, bits·0-7.
75-004
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80-000
TOOLS AND TEST EQUIPMENT
The tools and test equipment listed in this section are
required to properly service 3420 Magnetic Tape Units
and 3803 Tape Controls.
KEPT AT THE CUSTOMER'S ACCOUNT
Part
453511
KEPT AT THE BRANCH OFFICE
Tape Transport Cleaner
Scratch tape
3.
Command 3-Read Forward ('02')
Master skew tapes and master signal-level tapes are
manufactured to rigid specifications. They are the
standards that are used by CEs to obtain optimum tape
unit performance.
4.
Command 4-Read Backward ('OC')
equivalent)
352465
Tape Cleaning Kit
1.
Use master tapes only for their intended purpose.
(See Note 1.)
432641
Master Skew Tape (See Note 1.)
2.
Handle tapes with care,
Degausser (See Note 1.)
453500
Manometer, 30 inch (two needed for series
3.
Make only full-reel passes in order to have even
wear throughout the length of the tape.
4.
Identify master tapes as such and mark the reels
with the letter "m," as a reminder to make full
passes only.
Name
1848621
Stress Tape (order from Mechanicsburg)
432152
Master Signal-Level Tape (order through IRD Sales)
451064
Name
MASTER TAPES
Because tape unit performance is directly affected by
the accuracy of these master tapes, the following
precautions should be taken:
Part
Oscilloscope (Model 453. 454, 561, 545, 766H or
connection) (See Notes 1 and 2.)
453522
Developing Solution
453504
Tee and Hose Assembly (See Note 2.)
may be used if available)
453522
Tape Developing Solution
460874
Scale, 0 to 6 pounds (belt adjustment)
1765342
Tape Unit Tester
2515376
Capstan Prealignment Gauge
1846251
Shim, Right Reel Hub Alignment
MASTER SKEW TAPES
Capstan Adjustment Wrench (rear adjustments)
1846252
Hex Wrench, Right Reel Hub
2515401
Reel Motor and Hub Adjustment Tools: (see 08-460)
2512745
Adapter Hose (See Note 2.)
2523723
Capstan Adjustment Wrench (front adjustments)
2513154
Pressure Divider (See Note 2.)
5861448
7-Track NRZI Threshold Adjustment Card
2501611
Tape Unit Cleaning Brush
5861455
PE Threshold Adjustment Card
2512063
Crimper (supplied by marketing representative)
Master skew tapes have a density of 800 FCI and are
written with one solid bit across the width of the tape,
These tapes are written on a specially adapted tape
unit at the Tape Test Center with accuracy held to
within 0.375 usee total skew between the leading and
lagging bits of a 112 ips tape unit.
5861452
Dual Density Threshold Adjustment Card
2515390
Capstan Box Wrench (read adjustment capstan only)
1848621
6250 bpi Stress Tape
453585
2515390
*Digitec 251 Meter (Digitec 201 Meter, PIN 453046.
* Trademark of United Systems Corporation
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Notes:
1. Discussed in more detail in this section.
2. Not needed if p;essure/vacuum gauge P/N 5495384 is
The master skew tape will run off the reel when
reading forward because it is written with no interblock
gaps (lBGs). In order to create an IBG and save time
during skew adjustments, make the following
alterations to the master skew tape:
The master skew tape will read forward to the end of
the reel, read backward, and repeat the cycle, This
permits checking skew from the rear of the tape unit
without manipulating the controls,
MASTER SIGNAL-LEVEL TAPES
Master signal-level tapes have the ability to produce a
signal to within ±2% of the primary master. (A
primary master, which is established as an IBM
standard, is the base for instrument alignment.)
All new master signal-level tapes are checked at 3200
FCI and 800 FC\. The suffix letter "A" is added to the
part number to allow field identification of
3200/800/556 FCI tapes as opposed to the former
800/556 FCI tapes, Thus, for example, a master
signal-level tape checked out at both 3200 FCI and 800
FCI would have PIN 432152A.
DEGAUSSER
Caution: The degausser will demagnitize any
material such as tape, disks, etc. Power off the
tape unit.
To degauss the read/write head:
1.
Remove magnetic tape from the tape unit. Do not
place the tape on top of the tape unit.
2,
Plug degausser into 110 Vac receptacle.
3,
Press the pushbutton on the degausser while it is
at least 1 foot (30,5 em) away from the read/write
head and move it slowly toward the head.
1.
Read the master skew tape forward to the end of
tape EDT reflective marker.
2.
Install a write enable ring.
3.
Write one record of any size beyond the EDT
marker.
4.
Hold the degausser against the front surface of the
head for about 10 seconds.
4.
Remove the write enable ring.
5.
5.
Rewind the tape,
Pull the degausser straight away from the head
very slowly to a distance of at least 1 foot (30,5
em) and release the pushbutton.
available.
After the preceding one-time preparatory steps, set the
tape control CE panel as follows when you use the
skew tape:
1.
Command 1-Read Forward ('02')
2.
Command 2-Read Backward ('OC')
80-000
© Copyright International Business Machines Corporation 1976, 1979, 1980, 19B3
(
80-010
TOOLS AND TEST EQUIPMENT (Cont'd)
WATER MANOMETER
Note: The use of a 30 inch (76,20 cm) manometer
or the 80 inch (203,20 cm) pressure/vacuum gauge
is not dependent on the Eng/ish (metric) system of
measurement.
Connect the pressure-sensing hose to one port,
leaving the other port open.
3.
Use the requested tool by part number and name, and
measure to the specified units (whether metric or
English) to obtain the desired adjustment or reading.
Shown are several setups for using the water
manometer, part number 453500. Part A shows a
single manometer measuring a pressure of less than 30
inches (76,20 em). Part B shows two manometers in
series measuring a pressure between 30 and 60 inches
(76,20 em and 152,90 em). Part C shows using the
pressure divider and a single manometer measuring a
pressure greater than 30 inches (76,20 em).
General instructions for using the manometer are:
1.
2.
4.
5.
Fill the water manometer with tap water,
maintaining the water level near the 0 position on
the scale. Zero the manometer by sliding the scale
up or down until the 0 mark lines up within 0.2
inch (5,7 mm) of the bottom of the meniscus in
both columns.
II
Set conditions for the specific item to be checked
according to the pneumatic-adjustment decal
located on the transfer valve and manifold.
Read the vacuum level. (The vacuum level is the
sum of the displacement of the water level in each
column.)
PROCEDURES
Note: Take readings at bottom of meniscus.
Remove the tee from the tee and hose assembly,
and connect the hose on the line to be checked.
..
Set up the water manometer by opening both top
valves one full turn from closed position. (Incorrect
readings will occur if valves are opened too far.)
Using a single manometer to measure a pressure
of less than 30 inches (76,20 cm). Read at bottom
of each meniscus and add the two readings
together to get total pressure (W). W = 2.0 + 1.7
= 3.7.
To
To
Measurement
Port
Measurement
Port
30'inch
Manometer,
Part 453500
II
30·inch
Manometer,
Part 453500
II
Using two manometers in series to measure a
pressure between 30 and 60 inches (76,30 and
152.40 cm). Read at bottom of each meniscus and
add the four readings together to get total pressure
(the sum of X + V). X + Y = 2.0 + 1.7 + 2.0 +
1.7 = 7.4 inches.
Using a pressure divider with a single manometer
to measure a pressure of greater than 30 inches
(76,30). First. measure a known pressure of less
than 30 inches. Second, insert the divider and
adjust the divider's adjusting screw until the
manometer reading is 40% of its original reading.
Third, measure the pressure of greater than 30
inches by reading at the bottom of each meniscus,
adding the two readings together (to get Z). and
multiplying Z by 2.5 to get pressure. 2.5Z = 2.5(2.0
+ 1.7) = 2.5(3.7) = 9.25 inches. The maximum
reading possible with this combination is 75 inches
(190,50 cm).
b. Insert the pressure divider between the
measurement part and the gauge and adjust the
divider's adjusting screw until the gauge reads
40% of its original reading.
c. Measure the pressure greater than 80 inches
(203,20 em) and record the reading (Z).
d. Multiply Z by 2.5 to get the total pressure.
Example: If Z reading is 33.2, 33.2 x 2.5 = 83.0 inches
PRESSURE/VACUUM GAUGE
Shown below is pressure/vacuum gauge, part 5495384.
To use the gauge:
1. Attach the gauge hose to the fitting to be tested.
2. Read the dial directly in pressure or vacuum. (For
measurements above 80 inches (203,20 cm). add 1
inch (2,54 cm)to the reading for each 1/16 inch (1,59
mm) of pointer travel beyond the end of the scale.)
Using a pressure/vacuum gauge to measure a
pressure greater than 80 inches (203,20 cm).
Caution: Disconnect from test point before
loading or unloading tape unit to prevent
damage or miscalibration of gauge.
a. Measure a known pressure less than 80 inches
(203,20 cm).
r
Adjusting Screw
30-inch
Manometer.
Part 453500
30-inch
Manometer,
Part 453500
II
(To measurement port)
Part A
Part B
Part C
V
~;,"~"~7';:~; W.re,
II
(51 + 43 mm)
Pressure/Vacuum Gauge
Part 5495384
80-010
© Copyright International Business Machines Corporation 1976, 1979. 1980. 1983
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80-020
TOOLS AND TEST EQUIPMENT (Cont'd)
3420 FIELD TESTER
To use the field tester:
Caution: Use extreme care when attaching the field
tester because an error can damage the tape unit,
the tester, or both. Be sure to use only the 3420
field tester, part 1765342, when doing offline
maintenance on 3420 tape units. Do not use the
2420 Field Tester. When testing Models 4,6, and 8,
a field tester at EC level 734316 must be used. A
temporary jumper must be installed from K2P02 to
M2D06 for 6250 operation.
1.
Unload the tape unit.
2.
Switch the unit off line at the logic gate. To ensure
that the on-off line switch circuitry is operating
correctly, monitor the - interface disable and + int
dis or - off lines. Refer to page FT910 of the 3420
ALDS. Check the following levels for proper
operation of the on-off line switch circuits.
Position of On-Offline SW
When operated with the field tester, the tape unit loads
and unloads tape, reads, writes, and moves tape
forward or backward.
To test several tape units simultaneously, use the
manual controls on the tape control CE panel.
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3.
Caution: The field tester can cause tape dump
and damage under the following conditions:
A1L6D04
A1l6B03
Online
+6v
-4v
Offline
Gnd
Gnd
With the arrow on the cable pointing up, plug the
tester into the wiring side of the logic gate at
location A 1 N5. Another way to be sure the cable is
plugged correctly is to make sure the notches on
the cable connector are toward the center of the
logic gate. Select, on the tape unit operator's
panel, comes on when the Read /Write switch is in
the READ position, or in the WRITE position with
the MOVE tag active. You can now use the tester
switches to load and Ready the tape unit.
1. When moving tape with field tester, the direction
switch position is changed before activating
"Stop"
time. Use the Dn/Bkwd control and Slow/Fast switch
to adjust go-down time. Go ensures continuous tape
movement. Use the Alt Dir / Fwd / Bkwd switch to
control direction. Stp halts tape motion.
Alt Dir/Fwd/Bkwd
2. When attached to a tape unit and set to "Fwd"
and either "St/Stop" or "Go", the tape unit is
loaded and goes to Load Point and becomes
Ready. If RESET on the tape unit console is
activated and the tape unit does not dump tape,
and then Reset is followed by activating
UNLOAD, the tape will run off the end of the
reel.
St/Stp/Go/Stop switch must be at Go to enable this
switch. Alt Dir is active in read status only; it moves
tape alternately forward and backward. Use Up/Fwd
control and Slow/Fast switch to adjust duration of
forward movement. Use Dn / Bkwd control and
Slow / Fast switch to adjust duration of backward
movement. Fwd causes forward tape motion. Bkwd
causes backward tape motion.
3. When using "A It Dir", RESET is activated on the
tape unit.
Slow/Fast
Conditions 1, 2, and 3 above can be eliminated by
always putting the tester in "Stop" before doing
any other operation.
The switches on the tester operate the tape unit by
remote control as follows:
Start/Reset
Operates the same as the control on the tape unit
operator's panel. Start makes the unit ready. Reset
resets the unit.
Ld Rew/Rew Unld
Ld Rew loads tape if none is loaded, and rewinds tape
to load point if tape was loaded but is not at load point.
Rew Unld rewinds tape from any position, unloads the
unit. closes the cartridge if one is used, and lowers the
power window.
Up/Fwd
Up/Fwd controls either the time the MOVE line is
active during a start/stop operation, or the duration of
forward motion in an alternate-direction operation.
Dn/Bkwd
Dn/Bkwd controls either the time the MOVE line is
inactive during a start/stop operation, or the duration of
backward motion in an alternate-direction operation.
St/Stp/Go/Stop
This is a range switch for the Up/Fwd and Dn/Bkwd
controls. Slow extends the go-up/down timing range
to approximately 3.0 seconds. Fast decreases the
go-up/down timing range to approximately 7.0 ms.
Write/Read
Write causes the tape unit to write with gaps. Each
time the tape unit writes, as in a start/stop operation, it
generates a PE gap of 0.528 inch (13,4 mm) and a GCR
gap of 0.275 inch (7,0 mm). Read causes continuous
reading.
8/16/32 (Models 3, 5, 7) See Note
This switch controls the frequency of the tester's write
oscillator. The three positions result in write frequencies
of 800 fci (NRZI), and 1600 and 3200 fci (PEl.
respectively.
16/32/64 (Model 4, 6, 8) See Note
When a field tester at EC level 734316 is used on 3420
Models 4, 6, and 8 with the provided jumper installed,
these switch positions represent 1600, 3200, and 6400
fci as the label shows. Frequencies generated by the
tester are for practical offline test only. Do not confuse
these tester frequencies with normal online recording
densities.
Note: The back panel wiring on cable position AIN5 on
Models 4, 6, and B is such that the frequency of the tester is
doubled.
•
St/Stp causes interruptions in tape motion. Use the
Up/Fwd control and Slow/Fast switch to adjust go-up
3803-2/3420
© Copyright International Business Machines Corporation 1976, 1979. 1980, 1983
80-020
80-030
NOTES:
3803-2/3420
©
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80-030
Copyright International Business Machines Corporation 1976. 1979. 1980, 1983
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This procedure makes all previous 3420 tape unit
cleaning procedures obsolete.
Items used by this procedure are contained in the IBM
Tape Cleaning Kit, part number 352465 (see Figure 1).
Use IBM tape transport cleaner, p'art 8493001.
Performance results cannot be guaranteed when other
chemical formulations are used. Other chemical
formulations have not been tested by IBM, and their
use may impair performance or cause damage to the
tape unit or tape.
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85-000
SUBSYSTEM PREVENTIVE MAINTENANCE
GENERAL CLEANING INSTRUCTIONS
(
DAILY CLEANING PROCEDURE
Figure 1. IBM Tape Cleaning Kit
Felt Pad Holder
PIN 352606
Cleaning 8rush PIN 2513590
e N 6851781)
To promote reliable tape unit performance, all of the
steps listed below must be performed every eight
hours. Clean the tape unit in the sequence presented in
this section.
1.
Read/write and erase heads (see 85-001)
2.
Cleaner blade, BOT / EOT block, rewind plunger, and
threading channel reflector (see 85-002)
3.
Tape transport (see 85-003)
4.
Capstan (see 85-004)
5.
File reel hub (see 85-004)
Head Cleaning BruJihes
DANGER
When using tape cleaner, do not get it on skin or
clothing. Follow the instructions on the container.
Do not use metal instruments to clean any part of
the tape unit.
Cotton Swab
PIN 556944
Cotton Swabs Must be Obtained Locally
and Must Have Wooden or Pressed Paper
Handles.
//
"-Dental Mirror
PIN 450126
85-000
85-001
SUBSYSTEM PREVENTIVE MAINTENANCE (Cont'd)
TAPE UNIT CLEANING PROCEDURE FOR
3420 MODELS 3 THROUGH 8
1.
R/W AND ERASE HEADS
1.1 Unload tape and remove from tape unit.
1.2 Open outerOand inner.doors.
1.7 Use inspection mirror for Models 3, 5, and 7 or
dental mirror for Models 4, 6, and 8, to carefully
inspect heads. (Clean mirror with dry cloth, if
dirty.) If heads do not look clean, perform step 1.8,
otherwise wipe heads with dry clean cloth and go
to step 2.
To remove stubborn residue from heads1.8 Use either style head cleaning brush dampened
with tape cleaner to remove residue
and then
return to step 1.3.
e
1.3 Dampen clean area of lint-free cloth with tape
cleaner.
1.4 When cleaning Models 3, 5, and 7, hold the
inspection mirror down, use dampened cloth to
clean the R/W and erase heads.using a circular
motion.
1.5 When cleaning Models 4, 6, and 8, hold
~ autocleaner in and clean the R/W and erase heads
.with a dampened cloth using a circular motion.
To reach the inside tracks, wrap the dampened
cloth around a cotton swab.
1.6 Repeat steps 1.3 and 1.4 or 1.5 until cloth remains
clean.
85-001
(£:. Copyright International Business Machines Corporation 1976. 1979, 1980, 1983
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85-002
SUBSYSTEM PREVENTIVE MAINTENANCE (Cont'd)
TAPE UNIT CLEANING PROCEDURE FOR
3420 MODELS 3 THROUGH 8
2.
CLEANER BLADE, BOTfEOT BLOCK,
REWIND PLUNGER, AND THREADING
CHANNEL REFLECTOR
2.1 Hold the inspection mirror down, or the
autocleaner in, when cleaning. Use a cotton swab
dampened with tape cleaner to clean the following
items.
2.2 Use the head cleaning brush (PIN 6851781)
dampened with tape cleaner to clean the cleaner
block •. Wipe with cloth.
2.1.1 BOT IEOT block.
2.1.2 Rewind plunger Ifiller block.
2.1.3 Threading channel reflector
e
3803-1.2,3/3420
@ Copyright International Busines. Machin•• Corporation 1976. 1979. 1983
85-002
85-003
SUBSYSTEM PREVENTIVE MAINTENANCE (Colit'd)
3.3 Use a lint-free cloth dampened with tape cleaner to
clean the following:
TAPE UNIT CLEANING PROCEDURE FOR
3240 MODELS 3 THROUGH 8
e.
Back of inner door e.
3.3.1 Threading plates
3.
TAPE TRANSPORT
3.1 Install capstan cover
3.3.2
e.
3.3.3 Back wall. and sides. of vacuum columns
3.3.4 Air bearings G. Note: If residue remains in
vacuum column corners, perform steps 3.3.5
and 3.3.6, otherwise go to step 3.4.
3.2 Dampen cotton swab with tape cleaner and clean
the following:
3.2.1 Front and back guides
G.
To remove stubborn residue in corners of vacuum
columns3.3.5 Put clean felt pad on handle making sure the
handle does not go through the end of pad.
3.3.6 Dampen felt pad with tape cleaner and clean
vacuum column corners as shown
Make
sure no contact is made with capstan cover
and/ or capstan.
e.
Caution: You may need to use water to remove
residue left in the vacuum columns by some tapes.
Do not get water on any other part of the machine.
Water will damage the capstan.
3.2.2 D-bearing
e.
3.3.7 Use a lint-free cloth dampened with tape
cleaner to remove any residue left by the felt
pad.
3.4 Check bottom of vacuum columns. for bits of
tape and remove if present.
3.5 Remove capstan cover and replace in storage area.
3803·1.2.3/3420
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85-003
COPYright International 8\Jsmess MachiN'S Corporation 1976. 1979, 1983
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SUBSYSTEM PREVENTIVE MAIN:rE~ANCE (Cont'd)
TAPE UNIT CLEANING PROCEDURE FOR
3420 MODELS 3 THROUGH 8
4. CAPSTAN CLEANING-NORMAL
PROCEDURE
This procedure must be done at regular intervals by
the customer. Tape will slip on a dirty capstan while
accelerating.
Caution: Any capstans not kept free of glaze will
eventually build a deposit that cannot be removed
by a reasonable amount of scrubbing.
4.1 Wrap a clean, dry cloth around one index finger
and a lint-free cloth dampened with tape cleaner
around the other index finger.
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85-004
5. FILE REEL HUB
5.1 With a lint-free cloth dampened with tape cleaner,
use a light pressure to clean the following:
5.1.1 Back rubber flange • .
5.1.2 Rubber ring. or rubber pads on some
models.
6. CARTRIDGE RESTRAINT
6.1 Use a lint free cloth to clean lower restraint • .
This metal is porous and the air flow can be
restricted by using fluids or abrasive material
during cleaning.
4.2 Vigorously wipe the capstan rubber with the
dampened cloth (without bending the capstan)
while rotating the capstan with the
dry-cloth-covered fingerCD.
4.3 Continue this procedure until the capstan has a
definite dull rubber finish. Any glaze must be
removed in order to operate reliably.
4.4 If the glaze cannot be removed, follow the special
Glazed Capstan Cleaning procedure on page
08-700.
85-004
85-005
SUBSYSTEM PREVENTIVE MAINTENANCE (Cont'd)
3803/3420 PREVENTIVE MAINTENANCE
SCHEDULE
Code
U
Location
Operation
R
3420 Tape Unit
Code
U
0
R
File Protect
Pin
Location
Operation
Frequency
Door Slide
and Stop
Pin
4 months
General
Cleaning
4 months
Code
Frequency
4 months
Action
U
1. Push plunger in, check for
binds.
R
Location
Operation
EOTIBOT
Code
Frequency
12 months
2. Check that plunger
extends in front of the
right hub flange.
Action
Lubricate the door slide and
the stop pin with IBM #17.
3. Replace unit if any checks
produce unsatisfactory
results.
1. Clean front deck and
base.
Power
Window' "
Safety Bail
2. Remove tape cleaner
block and clean with tape
cleaner.
3. Remove air bearing (0
bearing) next to
EDT IBOT block and
clean. Inspect guide
behind bearing and
replace if grooved.
2
Parts
Replacement
4 months
12 months
Check for the correct
operation of the power
window safety bail. If
incorrect, tighten the
setscrew in the sQfety bail
terminator, and adjust the
safety bail switch assembly
(see 08-000).
4. Clean NRZI guides.
BIM 8492273 Puralator type
filter
5. Clean EDT I BOT channel
mirror.
BIM 8492274 Cuno type
filter
6. Clean the fiber optic
Il!mp. US,e a tissue lightly
moistened with water.
Tape
Cleaner
Block
12 months
Caution: Allow lamp to
cool, before cleaning.
Pneumatic
Supply
12 months
Check pneumatic supply
belts.
Remove the manifold and
fiber bundles to provide
access to the lamp. Replace
the lamp (08-620) if it is not
clear. Note: Cleaning or
replacement of the fiber
optic lamp may require the
readjustment of the
EDT IBOT and capstan
squaring.
Input Filter
12 months
Replace filter element of the
pressure pump input filter.
Supplied with parts
replacement B/M. Check for
Puralator or Cuno type.
Capstan
Tach
Squaring
Circuit
4 months
Capstan
Tracking
4 months
Check and adjust Capstan
Tracking. See 08-000.
EOTIBOT
4 months
Check and adjust EDT IBOT.
See 08-580.
Cooling
Filter
12 months
Air Bearing'
Cleaning
12 months
Replace the tape cleaner
block. Supplied with parts
replacement B 1M.
Clean cooling air filter or
replace as necessary.
1. Remove bearings.
12 months
DC Voltage
12 months
Output Filter 36 months
4
Vacuum
Tubing
60 months
Replace vacuum tubing
(order BIM 4416409).
Pressure
Tubing
60 months
Replace pnuematic pressure
tubing (order BIM 4416408).
Vacuum
Pressure
Switches
60 months
Right switch plate
- with seven holes - B I M
6851766
- with five holes, one switch
top. three grouped center,
one at bottom - BIM
6851768
two switches top, three at
bottom - 81M 6851764
Radius
Sense
12 months
Clean the ends of the fiber
optic bundle if present with a
damp cloth, see 08-610 for
removal. Apply a felt pad to
the handle and lightly
dampen with tape cleaning
fluid. Hold pad to the inside
front of left reel flange and
spin by hand. This will clean
the reflective strips located
inside the left reel.
Reel Tach
12 months
Check reel tachs for glaze.
Replace reel tachs if glazed.
Glass Bead
Tape
12 months
Inspect glass bead tape on
stubby bar and in vacuum
columns. See note. Ensure
that stubby bars are not
loose and have proper
clearance. See 08-000.
High Speed
Rewind
Plunger
12 months
Check operation of the High
Speed Rewind Plunger.
(08-000) Models 3, 5, and 7
only.
Autocleaner
Check
12 months
1. Check operation of
autocleaner by marking
the ribbon and observing
ribbon movement. The
ribbon should move from
bottom to top.
Preamps
12 months
R
Action
Frequency
Replace with PIN 2524998.
Left switch plate
- with five holes, three
switches top, two at bottom
- 81M 6851765
-all other configurations BIM 6851767
Tape transport switches
Model 3,5,7 - BIM 6851770
Model 4,6,7 - BIM 6851771
Note:
Inspect the glass bead surface of the stubby bars and vacuum
columns.
Replace if the glass bead is nicked, scratched, burred or has an
area obviously worn to the touch. (If not obviously worn, do not
replace).
Run finger on the glass bead surface at the bottom of the vacuum
column. This is a good glass bead surface and may be used as a
reference.
A worn glass bead surface will cause tape motion problems.
3803 Control Unit
Code
U
2. Check the supply of
autocleaner ribbon. Order
a new autocleaner
cartridge when
approximately 3/4 inches
of ribbon is visible
through the cartridge
window. Models 4, 6,
and 8 only.
Inspect foam in front of
vacuum door glass. See
08-690. If foam replacement
is required, order BIM
4469244
Check the dc voltages.
(08-570)
3
Clean screens on back of
motor with vacuum cleaner.
3. Install new decorative
covers on air bearing.
Supplied with parts
replacement B/M.
Vacuum
Column
Door Foam
Remove EOT IBOT by
removing the two screws
and gently move block
forward being careful not to
damage the fiber bundles if
present. Clean EOT IBOT
with a cotton swab
dampened with tape cleaner.
Replace EDT IBOT block.
12 months
2. Brush each bearing to
remove oxide deposits.
Check and adjust Capstan
Squaring. See 08-120 or
08-130. Ensure capstan is
free from dents and does not
bind.
U
Capstan
Motor
Mod-8
Order one of the following
BIMs for required parts.
Location
Operation
Action
Location
Operation
R
Frequency
Action
0
Air Filter
2 months
Check cooling air filter for
restriction of air flow. Clean
or replace as required.
2
dc Voltage
6 months
Check dc voltages. Adjust as
required to the levels
specified on decals.
Check and adjust preamps
(08-290 or 08-300).
85-005
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90-000
SUBSYSTEM INSTALLATION
INTRODUCTION
This section contains installation instructions for the
IBM 3B03 Model 2/3420 Magnetic Tape Subsystem.
Companion publications pertaining to this product are:
INSTRUCTIONS
Perform the following basic steps for each 3B03
Model 2/3420 installation, regardless of the
subsystem configuration:
3803 Model 2/3420 Subsystem Description,
GA32-0021
1.
2.
3420 Model 4, 6 and 8 Parts Catalog, S132-0007
2.
3.
3803 Models 1 and 2 Parts Catalog, S132-0004
Complete the configuration worksheet on 90-040.
Refer to the instructions on 90-030.
4.
3420 Operator's Guide Card, S232-0003
3.
Unpack units. (See Unpacking Instructions on this
page.)
5.
3803/3420 OLT Users Guide
1.
Safety Note: Ensure your own safety by using
caution at all times and by being aware of
potentially dangerous areas of the machine. Read
and follow the safety suggestions in Form
229-1264, a pocket-sized card issued to all
customer engineers and reprinted at the front of
this manual.
Caution: No portion of this procedure is to be
omitted. Perform all steps including checks and
adjustments.
c
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Refer to the checklist on 90-020 and initial each
box when an installation procedure is completed.
12. Perform all checks and adjustments on 90-1 90.
UNPACKING INSTRUCTIONS
13. Run system diagnostics on 90-200. (Refer to
User's Guide.)
Unpack tape control and tape units.
14. If any Emulator is run on a S/360, install jumper,
see 90-200.
15. Generate a read only tape, on 90-200.
Note: It is possible to combine 3B03 Models
and
2 in one subsystem. Be sure your customer
understands that a 3B03 Model 1 tape control
cannot address any 3420 Models 4, 6, or B tape
units.
Refer to Unpacking Instructions, which
envelope attached to each unit. Move
packing material away from work area.
Instructions for future reference if tape
to be moved.
are in a plastic
discarded
File Unpacking
subsystem is
Note: Before moving 3420 tape units into place, be
sure to remove packing tape from the air flow mercury
switch and install the front kickplate. Check ESD
grounding. See 90-190, F7 and FB before moving
machines into place.
4.
Remove the wire seal from the 3B03 and 3420's,
90-1BO, only at this time.
5.
Install four caster locks.
6.
Install front and both side kickplates. See
90-090.
7.
Install rear kickplate. See 90-090.
B.
Install and plug cables. See 90-050 through
90-0BO.
Note: The tag and bus cable pairs must be of equal
length. Paired cables of unequal length cause timing
errors resulting in hard-to-diagnose subsystem
problems.
9.
Plug address/feature/priority card jumpers to
match configuration requirements, see 90-110
Note: Check the factory-installed items such as card
jumpering, and all card and cable seating. Particularly
check the write head and read head card seating.
10. Rework the 3420 Field Tester, see 90-170.
Note: Make sure customer's power matches
subsystem requirements. Check for correct blower and
motor rotation.
11. Perform power supply checks and note special
tape unit power supply requirements, see 90-1BO.
90-000
o Copyright International Business Machines Corporation' 1976, 1979, 1980
90-010
SUBSYSTEM INSTALLATION (Cont'd)
CHANNEL ATTACHMENT
The 3803 Model 2 at 6250 bpi will attach to these
systems via the indicated channels:
System
3420-8
3420-6
370' 195
2860/2880
2860/2880
2860/2880
370/168
2860/2880
2860/2880
2860/2880
370/165-2
2860/2880
2860/2880
2860/2880
370/165
2860/2880
2860/2880
2860/2880
BKMPX
3420-4
370/158
BKMPX
BKMPX
370/155-2
BKMPX
BKMPX
BKMPX
370/155
BKMPX
BKMPX
BKMPX
370/145
SEL
SEL
SEL
370/135
SEL
SEL
SEL
360/195
2860/2880
2860/2880
2860/2880
360/91
2860
2860
2860
360/85
2860/2880
2860/2880
2860/2880
360/75
2860
2860
2860
360/65-67
2860
2860
2860
360/50
N/A
N/A
SEL
3420
CHANNEL EPO
..-t----- VOLTAGE
RATING LABEL
CABLE RETAINING BAR
SIGNAL IN/OUT
TAPE UNIT INTERFACE
CHANNEL INTERFACE
TAPE CONTROL "COMMUNICATOR" INTERFACE
3803-2/3420
C
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Copyright International Business Machines Corporation 1976. 1979
90-010
1980
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SUBSYSTEM INSTALLATION (Cont'd)
INSTALLATION CHECKLIST
('
90-020
3420 TAPE UNIT
3803-2 TAPE CONTROL
Initial Each Box When Completed
Installation Procedure
Reference Page
Configuration Worksheet
90-030
Unpacking
90-000
Cables
Cable Retaining Bar
Kickplates
90-060
90-070
90-080
Installation Procedure
Reference Page
Unpacking
90-000
Cables
90-060
90-070
Caster Locks
90-000
Kickplates
90-090
90-100
Field Tester Conversion
90-170
Wire Seal Removal
90-180
Power Supply Checks
90-180
Checks and Adjustments
90-190
System Diagnostics
90-200
0/8
1/9
2/A
3/B
4/C
5/0
6/E
7/F
90-060
90-090
Address/ Priority / Feature
Plugging
90-110
Card and Cable Seating
90-000
Operator's Panel Labels
Initial Box
"'Vhen
Completed
90-160
Wire Seal Removal
90-180
Check Capacitor Mounting
Screws
90-180
Power Supply Checks
90-180
ESD Check and Adjustment
90-190
System Diagnostics
90-200
Emulator (If applicable)
90-200
Generate READ ONLY Tape
90-200
3803-2/3420
V Copyright International ausiness Machines Corporation 1976. 1979
90-020
(
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90-030
SUBSYSTEM INSTALLATION (Cont'd)
CONFIGURATION WORKSHEET
INSTRUCTIONS
Complete the configuration worksheet on Page 90-040
for your installation. Check customer requirements
before configuring each system. When installation is
completed, place worksheet in the front of subsystem
ALDs and keep as a subsystem cabling history.
Complete all applicable blocks in the worksheet for
each 3803 tape control:
D
II
,II
Indicate each 3803 serial number in decimal.
Indicate processing unit/Channel identity and cable
numbers.
Assign an address to each 3803 tape control in hex
(bits 0-4, Example: 18X/3BX).
.. Assign "Select Out" priority ("high" /"Iow") for
each interface by checking applicable box.
II
Indicate features installed on each 3803 tape
control.
II
Assign 3420 addresses to each 3803. Check the
0-7 (low order) block on one "host" 3803, and the
8-F (high order) block on the other "host" 3803.
B
Draw in cabling for your configuration and insert
cable key numbers.
90-030
!'G' Copyright fnternational Business Machines Corporation 1976: 1979
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CONFIGURATION WORKSHEET
II
D
3803 Serial Number
II
3S03 Addresses
D
II
(Hex)
(Decimal)
Ves
Features
D D
D D
7-Track NRZI
Dual Density
Two·Channel
Switch
0
CD
G
0
0
(0·7)
I/O TAILGATE
B
CD
T
B
B
T
T
B
B
T
T
G
•
T
Primary Interface
(Communicator 1)
TU Addresses
T
CJ 0
(0-7)
or
I/O Interface Chan A
CPU Ident.
Cable No.
--I/O Interface Chan B
CPU Ident.
Cable No.
II
D
Features
e
9-Track NRZI
7 & 9 Track
Two·Channel
Switch
© Copyright International Buain... Machine. Corporation 1976. 1979. 1983
Ves
No
0 0
0 D
D 0
D D
9-Track NRZI
0 0
7 & 9 Track
0 0
Two-Channel
Switch
0 0
Secondary TU Interface
TU Addresses
(0-7)
D 3803 Serial Number
II 3S03 Addresses
II
Select Out Priority
D D
(High)
m
CJ
or
(S-F)
D D
(High)
(Low)
Secondary TU Interface
(Communicator 11
T U Addresses
mO
(0·7)
or
CJ
(S-F)
B
T
Primary T U Interface
(Communicator 1 or 2)
T U Addresses
B
CJ c:::J
T
(0-7)
or (S-F)
I/O TAILGATE
m
(Decimal)
Select Out Priority
(Hex)
D D
(Hex)
D D
(Low)
- - - - - - - - - - -(High)
----
(Low)
-------- --------
Device Switch
refer to control switch
Note: Symbols" through
paths A through D of the dey ice switching feature.
(See Section 58 for further information on this feature_}
II
(Hex)
0 0
No
Units
(Decimal)
(Hex)
Device Switch
~ T'~ ~
3S03 Serial Number
3S03 Addresses
Ves
(S-F)
Units
fJ
(Low)
II Features
D
~ T.~ ~
D
I/O Interface Chan B
CPU Ident.
Cable No.
fI
0
B
(S·F)
or
D D
G
m
Primary TU Interface
(Communiator 11
B
TU Addresses
m
D D
I/O Interface Chan A
CPU (dent.
Cable No.
Select Out Priority
(High)
(Hex)
T
CJ CJ
(S-F)
or
B
G
"
(0-7)
I/O TAILGATE
0 0
0 0
0 0
Secondary TU Interface
TU Addresses
m0
(Low)
(High)
No
II
(Hex)
(High)
(Low)
- - - - - - - - f----------t---------
- - -(High)
- - -(Low)
--
0 0
Device Switch
II 3803 Addresses
Select Out Priority
(Hex)
III
3803 Serial Number
(Decimal)
- - - - - - - - - - - - - ~------I/O Interface Chan B
CPU Ident.
Cable No.
.
90-040
SUBSYSTEM INSTALLATION (Cont'd)
I/O Interface Chan A
CPU Ident.
Cable No.
( _.'~:
IJ
0
B
T
Secondary TU I nterfac.
(Communiator 21
TU Addresses
00-7,8-F c:::J
m
Primary TU Interface
(Communicator 1 or 2)
B TU Addresses
T
(0·7) or (S·F)
• I/O TAILGATE
c::J c:::J
m
(High)
D
Features
(Low)
Ves
I/O Interface Chan A
CPU Ident.
Cable No.
---I/O Interface Chan B
CPU Ident.
Cable No.
fI
No
Device Switch
0 0
9-Track NAZI
0 0
7&9Track
0 0
Two·Channel
Switch
0 0
90-040
SUBSYSTEM INSTALLATION (Cont'd)
90-050
SECTION A: DEVICE SWITCHING
FEATURE
Figure 7. Cable Connectors
A-1 Tape subsystem configuration flexibility is provided
by field-installable switching features that allow up
to 16 tape units to be switched between four tape
controls. The three device switching features
available with the tape subsystem are:
2 Control Switch (2 X 8 or 2 X 16 configuration,
see Figures 1 and 4 on page 90-051)
3 Control Switch (3 X 8 or 3 X 16 configuration,
see Figures 2 and 3 on page 90-051)
Pri Bus
Prl Tag
4 Control Switch (4 X 8 or 4 X 16 configuration,
see Figures 5 and 6 on page 90-052)
Non-host 3803 with Communicator I
feature only. Sales Feature (FC)9071.
A 3803 must have a Communicator installed in
order to be switched. The Communicator sends
tape unit selection and device interface signals to
one of two device switches, depending on whether
tape units 0 through 7 or 8 through F are being
addressed. The location of the device switches
depends on the configuration desired. For
example: In a 2, 3, or 4 X 8 configuration, the
switching feature is required only on the first
3803.
Sec Bus
Sec Tag
Pr I Bus
Prl Tag
The Communicator is installed by removing the
selection logic circuits and the associated device
. interface cabling in the basic 3803. Different logic
circuitry and cables to the device switches are
then installed.
Non-host 3803 with Communicator 2
feature on Iy. (FC)9073.
Using a combination of the Communicator and the
2, 3, or 4 Control Switch, two, three, or four
interconnected tape controls can address a
maximum of 16 tape units. Figures 1 through 6
show some possible switching configurations and
cabling.
Note:
[11
D Bus
TU7(F)
D Tag
TU6(E)
C Bus
TU5(D)
C Tag
TUIt(C)
B Bus
TU3(B)
B Tag
TU2(A)
Pri Bus
TU1(9)
Prl Tag
TUO(8)
Host 3803 with It-Control Switch feature.
(It also has the Communicator I feature.)
The dark gray end of the signal cable is
indicated by the arrow tip. (See Figure 1,
90-060.)
90-050
© Copyright International Busin_ Machin•• COrporltion 1976. 1979. 1983
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SUBSYSTEM INSTALLATION (Cont'd)
(
(
90-051
Host Control Unit
Host Control Unit
3803 No I
FC 1792
FC 9071
3803 No 1
FC 1793
FC 9071
3803 No 2
Fe 9071
C
A
8
32A
4
30A 4
8
8
8
) Eight
3420'5
28A 5
Unused
4
5
5
PRI
24A
7
PR I
D
36A
A
C
1
) Eight
3420'5
8
B
PRI
7
22A 8
118
1
34A 2
138
13T
26A 6
26A 6
24A 7
1
34A 2
C
32A
C
D
36A
1
34A 2
A
C
D
36A
3803 No 2
FC 1793
FC 9071
32A 3
4
30A 4
5
28A
) Eight
3420'5
5
lIT 6
26A 6
388
7
24A 7
38T 8
22A 8
22A 8
Group 136
Group 137
Group 137
Group 136
Figure 1. 2 x 8 Switch Option
3803 No 3
FC 9073
Host Control Unit
3803 No I
FC 1793
FC 9071
3803 No 2
FC 9071
C
36A
A
B
C
G
D
r
0
1
u
p
34A 2
1
3
8
32A 3
4
8
A
SEC
24A 7
Unused
22A 8
"08
5
40T 6
5
26A 6
8
A
PRI
B
38B
7
38T 8
.7
8
Figure 3. 3 x 16 Switch Option
Group 137
3803 No 3
FC 9071
3803 No 1
FC 1792
FC 9071
G
r
3803 No 2
FC 1792
9071
Fe
C
D
1
o
36A
u
p
34A 2
~
A
A
PRI
36A
PRI
24A 7
22A 8
Figure 2. 3 x 8 Switch Option
1
32A 3
) Eight
3420'5
A
8
26A 6
7
8
30A 4
28A 5
8
8
8
0
34A 2
32A 3
1
C
PRI
8
30A
"
118
5
28A 5
lIT
6
26A 6
388
7
24A
38T 8
) Eight
3420'5
7
22A 8
Group 136
Group 137
©
Copyright International Business Machines Corporation 1983
Figure 4. 2 x 16 Switch Option
90-051
90-052
SUBSYSTEM INSTALLATION (Cont'd)
3803 No It
FC 9071
3803 No 3
FC 9071
A
A
8
PRI
PRI
7
PRI
7
1
3
8
Group 140
Group139
3803 No 2
FC 9071
G
C
u
p
30A 4
28A 5
8
3803 No 2
FC 1794
FC 9071
A
B
1
'+
1
D
C
:>
Eitt
34 0'5
PRI
24A 7
0
36A
C
32A
1
3'+A 2
1:> Eight
C
A
C
0
~
26A 6
Unused
u
p
D
1
32A 3
C
0
o
3ltA 2
G
3803 No 1
FC 1794
FC 9071
A
B
r
D
36A 1
0
PRI
38T 8
Group 140
3803 No 1
FC 1791t
FC 9071
A
8
SEC
5
388 7
0
u
p
8
1t0T 6
8
8
G
r
A
B
408
SEC
A
3803 No It
FC 9073
3803 No 3
9073
Fe
8
B
7
5
3420'5
30A '+
8
26A 6
22A 8
PRI
24A 7
22A 8
Group 137
:>
Eight
3420'5
5
6
PRI
24A 7
22A 8
Group 136
Figure 5. 4 x 8 Switch Option
Group 137
Figure 6. 4 x 16 Switch Option
3803-2/3420
90-052
@ Copyright Intemational BUlin••• Machin•• Corporation 1983
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90-060
SUBSYSTEM INSTALLATION (Cont'd)
SECTION B. SUBSYSTEM CABLING
Figure 2. Power Cable
Figure 1. Signal Cable
B-1 Unpack the interface and power cables and lay in
place.
(Toward Processor)
White (See Note)
Refer to the "Key Number" or "Connector 10"
and "X-Length" shown on each interface cable
label when placing cables (see Figure 3).
Refer to power cable connector (see Figure 2) to
ensure that power cables will be located correctly.
Caution: Ensure that the color scheme on the
connectors is followed.
('
Dark gray
Shown as the arrow
head in Figures 1
through 6 on 90-050.
"Y" Dimension
B-2 Plug Cables and Terminators:
a. Plug cables at tape control and tape units. Each
tape unit's address is determined by the
position on the tape control interface panel to .
which its signal cable is connected.
Caution: Do not connect 3803 power cable to
customer's receptacle at this time.
b. Insert terminators in "outgoing" cable positions
in subsystems where "outgoing" cables 132
and 133 are not used.
indicates floor
line
"X" Dimension
c. Install cable retaining bars when cabling is
complete.
B-3 Observe 'from' and 'to' designations given in
Figure 1, Page 90-070. Red or red-striped labels
indicate 'from' end of cables; white labels indicate
'to' ends of cables.
.---+tlll
Figure 3. Dimension Explanation
"X" Dimension
Red-striped Label "From" End
"Z" Dimension
"y" & .. z ..
Dimension
Distance Between Cable
Entry Holes in Floor
Distance Above the Floor
from the Entry Hole to
the Connection within the
Machine
Total length = sum of X. Y. and Z dimensions.
Light gray
Black (See Note)
..........::~~;
IIIII~_ _ _ _ _
(Away from Processor!
(Signal)
Cable Retaining Bar
External Cable Identification
Note: On chrome plated tape unit signal cable
connectors, observe the color at the center screw hole.
3803-2/3420
{," Copynght International BUSiness Machines Corporation 1976, 1979. 1980. 1983
90-060
90-070
SUBSYSTEM INSTALLATION (Cont'd)
SECTION B. SUBSYSTEM CABLING (Cont'd)
Figure 2. Channel Cable Maximum Length for 6250 bpi.
Figure 1. External Cables
Note: Cables are identified by either key number or connector 10.
System
Group
No.
Conn.ID
Plug
Location
Cable Group
K.y No.
Cable PIN
From
To
Notes
-
-
,-
129
129A
2281630
3803
4.5.7
1298
2523073
3420 Signal
60 Hz
3420 Power
60 Hz
130 B
5353920
3803
Multiplexor
Channel
130 T
5353920
3920
3920
-
1.178
18
3B
H
3T
(Chan
(Chan
(Chan
(Chan
Al
BI
Al
BI
01S-A1Al
01S-A1A5
01S-A1A3
01S-A1A7
130
1B
3B
1T
3T
(Chan
(Chan
(Chan
(Chan
Al
BI
Al
BI
01S-A1Al
01S-A1A5
01S-A1A3
01S-A1A7
131
2B
4B
2T
4T
(Chan
(Chan
(Chan
(Chan
Al
BI
Al
BI
01S-A1Bl
01S-A1B5
01S-A1B3
01S-Al B7
132
2B
4B
2T
4T
(Chan
(Chan
(Chan
(Chan
Al
BI
Al
BI
01S-A1Bl
01S-A1B5
01S-A1B3
01S-A1B7
133
Jll
J13
5A (Chan Al
7A (Chan BI
5353920
131 T
5353920
132B
5353920
132T
5353920
133B
5353920
133T
5353920
134
134A
5351178
3803
Selector
Channel
1. 9
3803
Channel-Channel
Adapter
1. 3. 9
Channel EPO
3803
2
1178
9A
01U-Al
135
135A
5351178
3803
2065/2167
8
l1B
1H
OH-A1A5
01T-A1A6
136
136B
136T
5466456
5466456
3803 No.2
3803 No.1
4
6456
11B
111
OH-A1A5
OH-A1A6
137
137B
137T
5466456
5466456
3803 No.. l
3803 No.2
4
6456
13B
13T
OH-A1A3
OH-A1A4
138
138B
138T
5466456
5466456
3803 No.1
3803 No.3
4
6556
13B
13T
OH-A1A3
OH-A1A4
139
139B
139T
5466456
5466456
3803 No.2
3803 No.3
4
6556 .
15B
15T
OH-A1Al
OH-A1A2
140
140B
140T
5466456
5466456
3803 No.1
3803 No.4
4
15B
15T
OH-AtA1
OH-A1A2
141
141B
14H
5466456
5466456
3803 No.2
-
-
142 or 129
142A
2281630
3803
4,5,6,7
142B
2521595
3420 Signal
50 Hz
3420 Power
50 Hz
-
S/370
3420-8
2860
Mod 135
72 (22,01
Mod 155
Mod 155-2
Mod 158
103 (31.41
Mod 145
2880
119 (36,3)
3420-6/8
None
N/A
3420-4
BYTEMPX·
103 (31.41
3420-8
BKMPX·
119 (36,3)
[ 8 ] For use with remote channel switch special
feature.
• Tape operations allowed only when all other byte channel
devices. are quiesent.
Notes:
[ 1] To attach eight or less tape controls to one
channel, the last tape control must be attached to
the channel with a sum of no more than 200 feet
(S1,Om) of cable. If the tape control is attached to
a 3420-6, subtract 15 feet (4,5m) for each
intervening control unit between the channel and
the last tape control. If the tape control is
attached to a 3420-8, subtract 20 feet (6,1 m) for
each intervening control unit between the channel
and the last tape control (see Note 10). For cable
length limitations when attaching a 3803-2 at
6250 BPI, see Figure 2.
[2] Sequence and Control (EPO).
3803 No.4
4
143
lA
Signal
143 or (1431
143A
2281630
3420 Signal
60 Hz
3803
4, 6, 7
144
3A
Power
144 or (1441
144A
2523073
3420 Power
60 Hz
3803
6,7
145
3A
Power
-
-
2521595
3420 Power
50 Hz
3803
6,7
-
72 (22,0)
119 (36,3)
All Other
Systems
6456
6556
2860
2880
1. 9
Control Unit
Length • Feet
(Meters)
3420-8
1.9
3803
To Channel
S/360
4331
131 B
From 3803·2
With
[7] When the number of 3420s to be connected to a
3803 Model 2 exceeds the limitations of power
(60 Hz), each extra 3420 tape unit may be
supplied power by another 3803 tape control using
cable group 144. Cable group 143 is available to
signal attach tape units using cable group 144.
With SF9OO1 installed, the 3803 Model 2 may
power a total of eight 3420s (any model).
[3 ]Chanriel to channel adapter (Sales Feature 1850).
[4] Total cable length from a 3420 tape unit to the
most remote 3803 tape control must not exceed
120 feet (36,6m). (Group 129 or 142, or 143, plus
group 136-141.)
[9] Part number 5466456 (24 Signal) may be
substituted for 5353920 (20 Signal) for cable
group numbers 130, 131, 132 and 133.
[10] Terminators are required when the 3803 is the
last control unit in a chain or the only control
unit on the .channel. Use either 5440649 (20
position) or 2282675 (24 position) bus
terminators and either 5808324 (20 position) or
2282676 (24 position) tag terminators as
determined by the number of signal lines per
cable.
Example:
I~h~~O H~cu H~cu H~~t
-
200 feet (61, Om) (Maximum 200 feet (61, Om) per Figure 2)
30 feet ( 9, Om) (Two Inter~ehing CU = 2 X -15 ft)
170 feet (52, Om) Maximum cable length that can be used
[5] Includes both signal and power cable. A maximum
of eight 3420 tape units can be connected to each
3803 Tape Control 1 and 2. Tape units cannot be
connected to tape control 3 and 4 for power
requirements unless they are used with cable
group 144.
[ 6 ] Parenthesis indicates cables to be used in World
Trade countries for 60 Hz machines.
90-070
© Copyright International Business Machines Corporation 1976. 1979, 1980. 1983
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SUBSYSTEM INSTALLATION (Cont'd)
(
---'
, __ ~r
90-080
SECTION B. SUBSYSTEM CABLING (Cont'd)
Caution: Refer to ALD AAOO5 Feature Plug List
before installing a replacement logic board.
Location OIX-YI
Notes:
Chan A
Chan B
I
I
5A
(JII)
1
>EPO
134A
] See Note
7A
(J13)
Two-channel switch diagnostics AD through AG can
only be run when both channel interfaces are cabled to
the same central processing unit. If it is necessary to
run diagnostics AD through AG during initial checkout,
plan temporary cabling to meet this requirement.
1.
[ 1 ] Both EPO cables must be plugged if the two
channel switch feature is installed, and the two
channels are not on the same processing unit or
not on the same channel frame. Remove any
temporary jumper plugs.
(J5)
18A
20A
"') 1
(J6)
14A
16A
(J2)
(J7)
lOA
12A
(J3)
(J8)
6A
SA
(J4)
01 S·A I
A
B
lB
Bus Chan A
2B
Bus Chan A
Incoming
[ : IT
Cables
Tag Chan A
130,
131,
132, 133
5 3B *
(See Note 4)
7 Bus Chan B
2T
Tag Chan A
3T *
Tag Chan B
4T *
Tag Chan B
I
:]
4B *
Bus Chan B
Tape Unit Power
(8) 60 Hz
j "..
> 129B
(8)
50 ",
[2] For cable, part 5466456 (48 pin), use terminator,
part 2282675 (bus) and 2282676 (tag).
For cable, part 5353920 (40 pin), use terminator,
part 5440649 (bus) and 5440650 (tag).
[3] Panel Y1 is located in position 01A-A3 unless the
3803-2 has optional features installed. On feature
machines, panel Y1 is located in positon 01X-Y.
[ 4] For cable group number, key number, part number,
to and from relationship, see Figure 1 on 90-070.
Outgoing
Cables
132, 133
or Terminator
(See Note 4)
• Cables plugged when the two-channel switch
feature is present.
:J
Commun i ca tor
3803
3803
3803
3803
No 1
No 2
No 3
No 4
140B
141B
140T
141T
A
C
Bus
15B
TU 7
36A
(F)
Ta¥
15
TU 6
34A
(E)
2
TU 5 (D)
32A
2
138B
139B
3
Bus
13B
138T
139T
4
Tag
13T
TU 4 (C)
30A
137B
136B
139B
141B
5
Bus
40B or lIB
TU 3 (B)
28A
137T
136T
139T
141T
6
Tag
40T or llT
TU 2 (A)
26A
6
136B
137B
138B
140B
7
Bus
38B
TU I (9)
24A
7
Ta¥
3S
TU 0 (S)
22A
8
136T
137T
138T
140T
(See Details on 90-050)
8
4
129A (S)
> 3803
142B (8)
Nos
60 Hz
50 Hz
1 and 2 only
AoJ."I'!II'!II'T"'-
-alTAICS
Power In 3A(129B, 142B, 144B)
.~- Signalln/Out 1A(129A, 142A, 143A)
- - - - - Ground Point for Signal Cable
90-080
(-
90,..090
SUBSYSTEM INSTALLATION (Cont'd)
Figure 1. 3803 (Front and Rear Kickplates)
3420 (Rear Kickplates)
SECTION C. KICKPLATES
C-1 Install 3803 front and rear kickplates and 3420
rear kickplates as shown in Figure 1.
3803 {Front and Rearl
3420 (Rear!
1. Attach pins, nuts, and retaining clips to front
and rear frame members of the 3803 and rear
frame member of each 3420 as shown in
Figure 1.
2. Mount kickplates by pushing brackets onto
pins. Clips must be positioned below lower
flange of brackets.
Note: Leave 3420 rear kickplates off until
cabling is complete.
3. Turn nuts on pins to level kickplates.
Kickplate
Bracket
4. If necessary, realign 3803 covers after
kickplate installation.
Figure 2. 3420 (Front Kickplates)
C-2 Install 3420 front kickplates as shown in Figure
2.
1. Install front kickplates before moving tape units
into place.
2. Elongated holes in the bracket allow kickplate
to be leveled and adjusted to clear the front
cover.
90-090
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90-100
SUBSYSTEM INSTALLATION (Cont'd)
SECTION C. KICKPLATES (Cont'd)
(
Figure 3. 3803, 3420 Side Kickplates
C-3 Install 3803 and 3420 side kickplates as shown
in Figure 3.
1. Install side kickplates only on the machines at
each end of a group. Use screw PIN 731629.
2. Open or remove covers to attach kickplates.
Use 12-inch (305 mm) kickplate, part
2501286 (notched corner), on cover adjacent
to tape unit power door hinge. Use 13
1/8-inch (333 mm) kickplate, part 5356406,
on remaining side covers for 3420 tape units
and 3803 tape controls.
C-4 Typical Subsystem Configuration
Sufficient side kickplates, parts 2501286 and
5356406, are shipped for the configuration
shown in Figure 4. Kickplates are not provided
for installation between adjacent tape units.
Order additional side kickplates by MES, if
needed for other configurations.
Figure 4. Subsystem Configuration
Part 5356406
Part 5356406
Part 5356406
Rear
Rear
3420
Tape,Units
3420
Tape;Units
Front
Front
C-5 Install caster locks (4eachl. PIN 280336.
Part 2501286
(Notched)
Part 5356406
Part 2501286
(Notched)
90-100
© Copyright Internationa' Busine•• Machines Corporation 1976. 1979, 1980. 1983
(
('
90-110
SUBSYSTEM INSTALLATION (Cont'd)
SECTION D. TAPE CONTROL
ADDRESS/FEATURE/PRIORITY CARD
PLUGGING
Example:
Controller
Address
D-1 3803 Address (Channel "A"): Verify factory
plugging.
..
Card location = B2M2
Card type = 2258
-
Bus Out
Card Row
6·1
Card row
:4:3210
J
a. 3803 with address = 8
b. With device switching capability.
Controller Address
is'X8X'.
--c
Card Col.
Z
y
X
)
Example shows card plugged for:
t
!!!!!i II
Z
y
X
Plug for 0
Plug for 1
n}
65
""
("3-high" cardJ
L_
~-------'r--------,r-------~r-------~~rd
' - -_ _.....IIIL--_ _
Col.
Plug if 3S03 has device
switching capability.
(2 x 16)
(3 x 16)
(4 x 16)
"I }Plug if 3S03 has selection logic (lxS)
I" with 3420s addressed 0-7.
W' } Plug
....J"'--__....J"L--_ _. . . .
II
if 3S03 has selection logic (1xS)
with 3420s addressed S-F.
3420 Addresses
Device switch
D-2
{
Disconnect-In Handling: 5/360 or 5/370.
r-------
------,
Plug this position for 360.
,I
I
I
I
Card row
,
4·2
Card location = B2L2
Card type = 1538
000
Plugging Data
I
I
T
360
370
Card row
I
I
I
I
I,
Plug 360 if either Chan A (or B with 2CS) is connected to any
channel that does not have disconnect in handling capability.
Plug 370 if Chan A (and B with 2CS) is connected to any
channel that has disconnect in handling capability.
Card location = B2L2
Card type = W046
~--.,...rn---.,,"r----......-II-----A, card
' - -_ _ _ _IL_ _ _ _............ L......_ _ _ _.....JL......_ _ _.....I
Col.
card Row
Column T
4
3
-'
36
2
35
("3·high" card)
34
-,________ 1
• • •
• • •
Plug this position for 370.
T
000
I
("2·high" card)
36-34
Card Row
Column T
f------,n,-------,II,-------,II,-------'.
~
_ _ _ _ _h _ _ _ _............ '--_ _ _ _---' ........_ _ _ _ _........
Card
Col.
3803-2/3420
90-110
© Copyright International Business Machines Corporation 1976. 1979. 1980. 1983
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SUBSYSTEM INSTALLATION (Cont'd)
SECTION D. TAPE CONTROL ADDRESS/
FEATURE / PRIORITY CARD PLUGGING
(Cant'd)
(
(
90-120
0-4 Features (wheri applicable to your machine):
a. Two Channel Switch Feature: Verify factory
plugging.
0-3 Select Out Priority:
Card Row
Tape controls are factory-wired to respond to a
select out signal (high priority). If ("low
priority") is desired, change the 82 panel
wiring to convert a 3803 tape control to respond
to a select in signal. Refer to wiring charts
below for rework.
'High' Priority
(3803 Responds to 'Select
Out')
From
V4D09
T4BOB
S2Pll
Card location = 8202
("3-high" cardJ
Card type = W032
To
From
To
S2P09
V4BOB
T4D09
V4D09
T4BOB
S2P11
T4D09
S2P09
V4B08
7
6
___ ( Plug if Two Channel Switch
1
feature is installed.
_1-
Card Col
000
G
8-6
b_ Two-channel switch feature (3803 Address
Channel "8"): Verify factory plugging_
.
• • •
,-----(
'Low' Priority
(3803 Responds to 'Select
In')
Channel A (FC281)
8
Example:'
Plug if Two Channel Switch
feature is not installed.
--Channel
Address
Bus Out
Card Row
: 4: 3 2 1 0
: 6: 5 : 4 3 2 1
Card Col
Channel B (XM1811
From
To
From
To
U6C02
U4B08
R2Pl1
R2P09
U6B04
U4D09
U6C02
U4B08
R2P11
U4D09
R2P09
U6B04
Card location = B2N2
("2·high" card.)
Card type = 9149
6-1
T
S
Plug for 0
Plug for 1
R
g~ ~~l
65
L.._
Z%l
I'" ,
Plug if 3803 has. deVice{
sWitching capability.
(4 x 16)
"It
Plug if 3803 has selection logic (lx8)
with 3420s addressed 0-7.
Iu r
Plug if 3803 has selection logic (ha)
with 3420s addressed a-F.
Example shows card plugged for:
a. 3803 with address = 8.
b. With device switching capability.
c. NRZI Feature: Verify factory plugging.
Card location = A2M2
("3-high" cardJ
Card type = W032
000
Card Row
8
7
6
8-6
Card Col
G
© Copyright International Business Machines Corporation 1976, 1979, 1980, 1983
...L--(
• • •
,-----(
Plug if NRZI feature is
installed.
Plug if NRZI feature is
not installed.
90-120
(
90-130
SUBSYSTEM INSTALLATION (Cont'd)
SECTION D. TAPE CONTROL
ADDRESS/FEATURE/PRIORITY CARD
PLUGGING (Cont'd)
0-6 a. Data In Handling: S/360 or S/370.
Card row
0-5 Primary/Secondary Tape Unit Interface Control:
4847
a. With device switching capability.
1- . Plug primary high/secondary low when primary
I
I
I
I
27·25
Card row
uuu
--------,
9
Card location = A2E2
27
26
Column 9
Card type = 9909
Z
§ §
25
y
Column
Z
X
Card type = 2272
Y
M
(See Notel
• 1-- -*
•
1 **
•
--
N
88
• • •
Channel B
Card Row 35
Channel A
Card Row 40
("3·high" card,)
--'--
("3·high" card.)
35
Card location = A1C2
interface will access 3420 addresses 8·F. or secondary
interface will access 3420 addresses 0·7.
(This TCU hosts devices 0-7.)
Card row
40
X
S/360- - -
5/370--
•
•
•
Column
Z
y
X
I
1------1- -
~--~II~--~II~----~II~----~
Card
Col.
____JL~__~J.l~__~II~__~
Card
Card.
Note: Data Flow Check asymmetry. Do not
change jumpers unless card is replaced. This is a
factory adjustment only.
Note: A 3803 tape control with communicator
only. (no tape units attached) assigns the
low pair of cables to the primary interface.
b. If you have Selection Logic (2x81. go to step
0-9 on page 90-160, if device entry, else go to
90-180.
If you have 2x. 3x or 4x switch, proceed to step
0-7 on page 90-140.
b. With selection logic (1 x8).
r-I
I
IL
30·28
Card row
~
Plug primary low/secondary high when primary
interface will access 3420 addresses 0·7, or secondary
interface will access 3420 addresses 8·F.
(This TCU hosts devices 8-F.I
Note: A host tape control always accesses attached
3420s via its secondary interface.
3803 tape control wIth tape unIt addresse 8-F.
30
Card row
29
Plug each channel independently as follows:*
*360
Plug 360 if the attached channel does not have
data in/data out capability.
**370
Plug 370 if the attached channel has data
in/data out capability.
If attached to a 2880 channel. bus out check!';
may occur if channel timings are not optimized.
The 2880 must be at EC718040 level or higher.
*W / 0 2CS-Channel B may be plugged to 360 or 370
since it is not used.
28
________ _
Card location = A2E2
("3·high" card,)
Column l
Card type = 9!H 0
-I
•
•
•
--.-
,-----------1
____
______ _____JI____
~Jl
JL~'
I
l
000
I
IL.... _ _ 3803 tape control wIth tape unIt addresses 0-7
~
Card
Col.
Note:
A 3803 tape control with selection logic
(1x8) only uses the secondary interface.
90-130
'© Copyright International Busmess Machines Corporation 1976. 1979, 1980, 1983
(~
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SUBSYSTEM INSTALLATION (Cont'd)
90-140
SECTION D. TAPE CONTROL
ADDRESS/FEATURE/PRIORITY CARD
PLUGGING (Cont'd)
D-7 Tape Switching Feature Address Control: Change
or verify jumper plugging of host 3803 tape
controls only.
2X8 and 2X16 Switch Configuration
1. For installations with less than a full
complement of 3420 tape units (for example,
2x121. plug all cards present as if the
non-existent tape units had addresses assigned
to them.
Jumper cable locations for switch cards:
Card Row
Column
50
- --
.----
_--
L
0 }8
K
0
J
0
H
0 l
B3H2
B3J2
l~
8
0 .... (
.-.
....
f
Location
B3K2
B3L2
4
Location
A3Q2
A3R2
A3S2
(0-3)
--- -- I
--- ~//--/--/ ....
.....:"
II
II
II
JL
JL
-
r-
Location
A3L2
A3M2
A3N2
A3P2
I
II
I
II
(4-7)
II
(0-3)
II
Location
A3L2
A3M2
A3N2
High Order HOST 3803 ( 3420 addresses S-F )
II
-
I
Location
A3Q2
A3R2
A3S2
A3T2
I
II
(4-7)
II
Low Order HOST 3S03 ( 3420 addresses 0 7)
(0-3)
II
-
II
4XS and 4X16 Switch Configuration
Low Order HOST 3S03 (3420 addresses 0- 7 )
Location
GOf.1.. ......
F
3XS and 3X16 Switch Configuration
Low Order HOST 3803 ( 3420 addresses 0-7 )
(4-7)
I
II
II
High Order HOST 3S03 ( 3420 addresses S-F )
II
II
High Order HOST 3S03 ( 3420 addresses S-F )
2. As each switch card is pulled, refer to the chart
on Page 90-150 and verify that device selection
priority assignments are correct.
Location
B3H2
B3J2
Location
A3Q2
A3R2
A3S2
(S-B)
I
II
II
II
-
Location
B3K2
B3L2
(C-F)
I
II
II
II
(C-F)
I
JI
II
I
II
-
Location
A3L2
A3M2
(8-B)
II
r-
A3N2
JL
I
II
r-
Location
A3Q2
A3R2
A3S2
A3T2
(S-B)
II
II
II
-
Location
A3L2
A3M2
A3N2
A3P2
(C-F)
I
II
Jl
JL
3803-2/3420
90-140
90-150
SUBSYSTEM INSTALLATION (Cont'd)
SECTION D. TAPE CONTROL
ADDRESS/FEATURE/PRIORITY CARD
PLUGGING (Cont'd)
2)(8 and 2)( 16 Switch Configuration
Location:
Location:
Location:
83H2
83K2
A3L2
A3Q2
A3L2
A3Q2
Plugging Rules:
8888
1.
A priority must be assigned to each set of cards.
2.
No duplication of priority should exist between
sets of cards in one 3803 tape control.
3.
All cards must have T23-U23 connected by a
jumper wire.
4.
Factory plugging for these cards should be as
shown, and should not have to be changed for
any installation.
5.
I
~8888
~
I
8888~8888
If
II
JI
Priority 1
~
II
Priority 1
Location:
83J2
83L2
A3M2
A3R2
A3M2
A3R2
~~
~
II
Priority 2
I
~1I88
,
-
'n- ,..-
=~
3803 Switch Path
Location:
A3N2
A3S2
A3N2
A3S2
4 5 - - - - - 37
._,
Column
I
II
Priority 3
n
'lT
II
~y
,0
,----y
r'
n
II
3803 Switch Path "D"
OOOOO}
Location:
OOO
OOOO}
0000
~
o
o
o
A3P2
A3T2
I
Always connect the
jumper horizontally.
.1,.
I
o
n
11
II
Priority 4
0
I
-~
Priority 3
o
o
~)
n
3803 Switch Path "C"
Location:
II~I
o
o
n
II
Priority 2
II
"e"
III~
I
-~
0
11"
II
Priority 2
Row
I
I
I
I
I
I
I
~1188
'"IT ,---
n
II
II
3803 Switch Path "8"
Location:
I
I
-~
Priority 1
Location:
Connect a jumper cable to locations for switch cards as
shown below:
P
n
II
3803 Switch Path "8"
3803 Switch Path "8"
This plugging establishes priority; if two 3803s try
to access the same 3420 tape unit simultaneously,
the 3803 with the least number of jumpers will
take control.
3803 Switch Path "A"
3803 Switch Path "A"
3803 Switch Path "A"
D-8 Device Selection Priority Assignments.: Verify that
factory plugging of priority jumpers on the switch
cards is correct.
4)(8 and 4)(16 Switch Configuration
3)(8 and 3)( 16 Switch Configurations
90-150
COPYright International Business MachInes Corporation 1976, 1979
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90-160
SUBSYSTEM INSTALLATION (Cont'd)
SECTION D. TAPE CONTROL
ADDRESS/FEATURE/PRIORITY CARD
PLUGGING (Cont'd)
D-9 Apply labels to tape control operator's panel as
shown.
a. Operator's Panel Labels
For the 3803 that "hosts" tape units 0-7:
1. Use labels furnished to indicate addresses of
tape control associated with each group of
operator panel switches.
o
Address of Tape Control Attached t o .
Address of 'Host' Tape Control
Channel A
01234567
Channel B
••••••••
Channel A
Channel B
Tailgate
01234567
••••••••
2. Apply 3420 address labels 0-7 above each
group of switches as shown.
Address of Tape Control Attached to
b. Operator's Panel Labels
For the 3803 that "hosts" tape units 8-F:
1. Use labels furnished to indicate tape control
addresses associated with each group of
operator panel switches.
2. Apply 3420 address labels 8-F above each
group of switches as shown.
G
Tailgate
Address of Tape Control Attached to •
Tailgate
Channel A
o
567
Channel A
01.234567
Channel B
• •••••••
Channel B
••••••••
o
1
234
Address of 'Host' Tape Control
Address of Tape Control Attached to •
Tailgate
Channel A
89ABCDEF
Channel A
89ABCDEF
Channel B
• •••••••
Channel B
• •••••••
Address of Tape Control Attached to
G
Tailgate
Address of Tape Control Attached to •
Channel A
8 9
Channel B
• •••••••
ABC
D
E
F
Tailgate
Channel A
89ABCDEF
Channel B
• •••••••
Note: Symbols. through. refer to control switch
paths A through D of the device switching feature.
3803-2/3420
90-160
((') Copyright International Business Machines Corporation 1976. 1979
90.. 170
SUBSYSTEM INSTALLATION (Cont'd)
FIELD TESTER CONVERSION
Data Rate Switch Position
Do the following rework to make the field tester
compatible with 3420 Models 4, 6, and 8. The new EC
level is 734316. (The field tester remains compatible to
3420 Models 3, 5, and 7.)
8
16
32
64
3
32.8
16.4
8.2
-
13
16.4
8.2
4.1
OOOOOOOOOOOOB
10.0
5.0
-
10.0
5.0
2.5
-
4
1.
Remove the four screws from the bottom of the
tester. Then remove the cover. Check the probe
side of the card / connector socket block:
Remove the logic card, unplug the signal cables,
and slide the. connector block out.
3.
Delete yellow wire from B1 G02 to A2B13.
4.
Add #30 gauge SlT wire from B1J05 to A2B 13.
5.
Reassemble the tester: slide the connector block
into the tester, plug the cables, and install the logic
card.
6.
Replace the cover and the four retaining screws.
II
Install label, part 1845758, to the right of the data
rate switch (8, 16, 32) as shown.
B
Install label, part 1845760, over the existing
instructions (1-3) on top of the tester.
9.
Before converting a Model 3, 5, or 7 tape unit to a
Model 4, 6, or 8, take the tape unit offline. Then
connect the field tester.
-
6
a. If connections are made by means of a printed
circuit card, replace the cover and four retaining
screws, then skip to step 7.
2.
20.0
5
12.4
7
-
8
b. If connections are made by means of wire
wrapping, proceed to step 2.
Side View
Probe Side View
Add
Model
6.2
3.1
-
6.2
3.1
1.6
000 0 0000 000 00
(BlI
2
Card
I
000 0 0000 000 00
13
(All
2
Cables
I
OOOOOOOOOOOOB
Install in Tester Box
This Side First
Note: Take any 3420 tape unit Incident Report (lR) and
code your time, using Service Code 33, ECA #991.
1.
2.
3.
4.
Unload drive before plugging or unplugging tester.
Place tape unit in off·line status.
Connect at Al N5, wiring side.
Jumper K2P02·M2006 for 6250 operation.
\
\
\
\
\
\
\
\
\
D
/
/
Note: Simulate a Model 4, 6, or 8 by grounding
N5B02 on the tape unit.
/
/
/
/
/
8
16
32
MOD. 4,6,8
1600 6250
16
16
32
N/A
32
64
10. Mount and load a CE work tape. Then set the field
tester to WRITE CONTINUOUS. See 80-020.
11. Scope test point A 1H 1B 11 (- WRITE DATA TRACK
P)' at the tape unit. Observe a full write cycle
period and compare to the chart below. Make sure
the data rate switch is set correctly for the tape
unit model being used.
Note: Times are nominal and are given in
microseconds. Tolerance is ±5%.
90-170
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90-180
SUBSYSTEM INSTALLATION (Cont'd)
SECTION E. POWER SUPPLY CHECKS
E-1 Remove the wire seal from the 3420 tape unit
J 1 power connector, and the wire seal from
around the 3803 Model 2 power plug.
E-2 With power off, check the 18 filter capacitor
mounting screws on the 3803 Model 2 tape
control's +6v and -4v power supplies. If loose,
tighten the screws being careful not to
over-torque and damage the power board. Also,
check all other power supply screws and
connections. (See 08-575.)
CapaCitor Mounting Screws
3803 logic page YFO 10 (60 Hz) or YFO 15 (50
Hz).
See Page 08-570 to determine if each tape' unit
has a modified power supply. Then, refer to logic
pages listed for the connections to be changed:
3420 Tape Unit Models 3, 5, and 7:
Test Point
Tolerance (Note 11
+Sv
4.05v
Logic Pages Affected
(Model 3. 5, 71
SO Hz
YB010·, YB020#, YB030#
50 Hz
YB015·, YB025#, YB035#
(Model 4. 6. 81
SO Hz
YfOl0·, YF020#, YF030#
50 Hz
YF015·, YF025#, YF035#
• For tape units with "Modified'"
power supplies.
# For all tape units.
E-4 Customer Power Phasing
Check three-phase ac power receptacles to ensure
proper motor rotation in each unit. Any improper
phasing must be corrected before power is
applied to the subsystem.
E-5 With power on, check that all blowers and
motors operate correctly.
a. Incorrect phasing of input voltage causes the
tape unit pneumatic supply motor to turn
backward, preventing the tape unit from
loading.
b. The cooling fan assembly blower motor in the
tape unit will run backwards. Remove filter
from machine' and observe the direction of the
fan as power is dropped. Fan should turn
clockwise when viewed from below. (See
arrow.)
:!:O.lv
:!:0.05v
3420 Tape Unit models 4. 6. and 8:
Test Point
Tolerance INote 1)
..Sv
Frequency
A 1G 1E09-A 1G2DOB
A 1N3D02-A 1N3DOB
-4.05v
A1G2Bll-A1G2DOB
A 1H 1C09-A 1G2DOB
:!:O.lv
±0.05v
Note 1: Ripple specifications for -4v and +Sv are 24" mv
peak-ta-peak. Measure at power supply. Refer to DC Logic page
for your machine for TB locations. (YB020, YB025 or YF020.
YF025)
SpeCial Power Requirements-3420 Model 8. 60 Hz Only
In certain 1x8 or 2x lS - 3420 configurations. which include the
3420 Model 8, a single 3803 cannot supply the power
necessary for the operation of the subsystem without a special
power feature. The table below shows the maximum number of
tape units that may be powered from one 3803 without this
special feature.
Number of
3420
Model8's
S
5
5
4
4
4
3
3
3
3
3
2
2
2
2
2
2
1
3803 Tape Control
Test Point
+6v
-4.0v
B2S2Mll-B2S2DOB
A2T4BOS-A2T4D08
Tolerance INote 2)
±O.Olv
±O.Olv
Note 2: Ripple specification for -4v is 80 mv peak-ta-peak and for
+Sv is 10 mv peak-ta-peak. Measure at power supply.
Caution: A ground loop has been purposely
installed in the 3803 tape control for
electro-static discharge (ESD) control. The
installed ground loop is in the tape signal tail
gate connector. and must be disassembled to
check for other ground loops.
The tape control is checked at the factory for
ground loops,
•
Number of
3420
Model 7'&
0
1
0
2
1
0
4
3
Number of
3420
Model 3-6
0
0
2
1
2
3
0
1
2
2
1
0
5
4
3
2
1
0
4
5
0
•
2
3
4
5
S
•
If only one 3420 Model 8. then any combination of seven
additional tape units is permissible.
If your customer's requirement exceeds the table, you must order
SF9001 for the 3803(s). (For example. if he needs more than
six Model 8s or two Model 8s and six Model 7s on a single
38031.
In all cases where this power supply feature is ordered. the
customer must install a 100 Amp power source.
Note: All blowers in the tape control are single
phase.
E-6 Mount and load a tape. Using a Digital
Voltmeter, part 453585, 453046, or equivalent,
check that the +6 volt and -4 volt power
supplies are within the tolerances listed:
E-3 With power off, check that the customer's
supply voltage matches that shown on the
voltage rating label.
Note: To connect a 3803 tape control for
operation at a different input voltage, refer to
90-180
o Copyright International Business Machines Corporation 1976, t979. 1980
90-190
SUBSYSTEM INSTALLATION (Cont'd)
SECTION F. CHECKS AND
ADJUSTMENTS
F-6 Autocleaner Tape Oirection-3420
Caution: Do not check autocleaner until tape
unit has been positioned online. and just prior
to returning machine to customer.
Note: Make sure the write head card is seated
properly before continuing.
This section outlines checks, adjustments, and tests to
ensure that the tape units and tape controls operate
normally when the subsystem is turned over to the
customer. See "Checks, Adjustments, Removals, and
Replacements" sections of this manual for details.
F-1
Check that autocleaner tape moves from bottom
to top by marking tape and observing direction.
See 08-380, "Autocleaner Operational Check".
F-7 ESO Grounding-3420 and 3803
Check that each door strike and roller assembly is
adjusted correctly to ensure sufficient
electro-static discharge (ESD) grounding.
Altitude Vacuum level Setting-3420
Using a water manometer with a pressure divider;
or a pressure/vacuum gauge, part 5495384,
measure the vacuum according to the decal on
the transfer valve. If incorrect:
3420
3803
lower rear door (1).
upper and lower on the front and rear
doors (4).
This adjustment is accomplished as follows:
a. 3420 Models 3 through 7:
a. With the screws loose, adjust the roller
assembly so the door roller will latch on the
strike plate.
Check that the vacuum pump belt· and transfer
valve plug are set as shown in 08-410.
b. 3420 Model 8 only:
b. If necessary, adjust the plate mounted between
the strike and frame to ensure proper
grounding between the plate and finger stock
assembly.
Adjust vacuum line restrictor to obtain vacuum
shown in 08-410.
F-2 Regulator Air Pressure-3420
Note: Check that the door latching adjustment is
still correct.
Check/adjust pressure as shown in 08-405.
F-3 Capstan-3420
F-8 ESO Grounding-3803
Caution: Allow fiber optics lamp to warm up
20 to 30 minutes before making adjustments.
a. Check the adjustment of the ESD plates on
both the left and right sides. Be sure the
plates are installed with the hem toward the
inside of the machine.
Do capstan tach adjustment. See 08-130 for
models 3, 5, 7 or 08-120 for models 4, 6, 8.
F-4 Mechanical Skew-3420
a. Visually check tracking before adjusting the
skew plate. Perform procedure on page
08-150 or 08-160.
Caution: Be
adjusted to
will reverse
lose proper
b. Check that mechanical skew meets the
specifications given in 08-170 (1600 and
6250 bpi) or 08-180 (NRZI).
b. If necessary, adjust the plates so that each
one bows out sufficiently to make contact yvith
the hat section of the side cover.
c. Check the side door latch for a firm latching
and adjust, if necessary.
F-5 BOT /EOT -3420
Caution: Allow fiber optics lamp to warm up
20 to 30 minutes before making the
adjustments.
.
sure that the plates are not
bow too much because the plates
bow when the door is closed and
grounding.
F-9 Data Flow Clock Asymmetry
Adjustment ---.: 3803
If the A 1C2 card is replaced in the 3803, see
ALD AAOlO sheet 2 of 3, for adjustment
procedure. (Originally factory adjusted.)
Verify BOT/EaT adjustment. See 08-580.
3803-2/3420
90-190
o Copyright International Business Machines Corporation 1976. 1979. 1980
/
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Note: Make sure the write head card is seated
properly before continuing.
G-' Run 3420 OLTs A-K, M-X and AB through AG.
(AB) through AG must be run under OLTSEP. AB is
a diagnostic for 3803s with a device switching
feature. AD through AG are optional for 3803s
with the two-channel switch feature. (You must
have a "dedicated" system to run diagnostics AB
through AG.)
(
(
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c'
90-200
SUBSYSTEM INSTALLATION (Cont'd)
SECTION G. SYSTEM DIAGNOSTICS
(
EMULATOR: (If applicable to your machine.)
If the 3803 is attached to a System/360 on which
any emulator is run, install a jumper on each tape
unit to disable LOAD FAIL IRPT:
3420-3,5, and 7, between A1H2U12 and
A1H2U08
3420-4, 6, and 8, between A 1 M2U 12 and
A1M2U08
Note: OLT section 3420L will run only under
sense switch setting (3420L/EXT=9). Verify PE
clipping levels on machines with PE feature.
G-2 Verify serial numbers, EC levels, and features from
the diagnostic printout.
a. If the tape control information is incorrect, see
plugging chart on 90-210, or AA010 in the 3803
ALDs.
b. If the tape unit information is incorrect, see
plugging chart on 90-210, and 90-212 or A6106
in the 3420 ALDs.
G-3 When the diagnostics have run error free, generate
and save for future use a read only tape in 6250
bpi mode.
a.Enter the following as shown:
r 01, 'DEVICE/3420A-G /fe,ext=z/'
b. To ensure that a good tape has been generated,
the program must run without error. When a
good tape has been generated, remove the write
enable ring.
c. Mark this reel 6250 bpi READ ONLY and save
for diagnostic use with Section 00-010 of the
MLMs.
Note: The CE should retain the output from
Sections "V" and "W" of the OLTs which will give
a printed table listing of all tape unit performance
measurements.
3803-2/3420
90-200
© Copyright International Business Machines Corporation 1976. 1979. 1980, 1983
SUBSYSTEM INSTALLATION (Cont'd)
90-210
SECTION G. SYSTEM DIAGNOSTICS
(Cont'd)
G-4 Tape Control Serial Number/EC Level/Feature
Code: Verify from diagnostic printout that factory
plugging is correct when diagnostics are run.
Plugging example: tape control serial number is
10430, with 9-track feature.
10430
Two channel switch, device switching, and EC level.
-10000
430 Decimal = 01 AE
Purpose
He~l,
Feature code tape control serial number
Two channel switch (1 if installed)
, _
..
Sense Byte 13
Purpose
51
~
Feature Code:
00 ~ Basic Densi lies only
,
10 = 9-Track Feature
{
11 = 7- &9-Track FeatUle
:-
Tape control serial no.
Low order in h e x _
o
3
8
7
6
5
4
3
5
6
2
7
Z
1
2
I
50
I 49
Card row
..............
49
44
} 0
I
1
Tape control serial no.
Low order in hex -
J
,
o
8
--+-e
1
2
3
7
6
a I
.....,........
5
ol~
4
5
3
e---L.
Z
I 45T
I
./
44
./
a
a
---r--e
./
./
./
........
a
a I e---+-e
I
I
I
I
-------- -- --
I
Card location A2R2 (3-high card).
(Shown plugged for
MIS (TCS) and 2x8 low)
2
3
Card row
41
I 40 139
~IO
a
e...-..J.-.
U-.~
I
I
a
I : I:
~---rb
I
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-- ----- -----
Card
Col.
8
7
6
5
3
2
1
Z
Sense
Bit
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
=
=
0
=
1
0
1
0
1
0
1
2
3
=
4
5
6
7
~
=
=
=
=
Set Logic (No Device Switch)
2x8 Low
3x8 Low
TUg 0·7
4x8 Low
Communicator only
2x8 High
3x8 High
TUg 8-F
4x8 High
}
}
H C level (O·F) relates to diagnostic
eleases. Refer to T34201 for EC
Levels.
1
-
When plugged, the columns will become either a one (1) or a zero (0),
0
./
I a
H--4 I a
I
,"'
....
1
Sense Byte 17
a
-z
Card row
Card
Col.
2
1
----
_--..- __ ----
Sense Bytes .......... 13...... 14...... 17
Sense
Bit
6
7
Card
Col.
-8
Sense Byte 14
46
39
----
I
./
./
./
I~./
~--------------~--~L---~~--~--V
When plugged, the columns will become
either a one (11 or a zero (0).
1-
o
90-210
© Copyright international Business Machines Corporation 1976. 1979, 1980. 1983
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90-212
SUBSYSTEM INSTALLATION (Cont'd)
SECTION G. SYSTEM DIAGNOSTICS
(Cont'd)
Plugging example: Wired for EC734801 and feature code 6250/1600 bpi.
Tape Model
G-5 Tape Unit Serial Number/Model Number/EC
Level/ Feature Code: Verify from diagnostic
printout that factory plugging is correct on all tape
units when diagnostics are run (3420) ALD A6106.
Alpha
Model 3
A, B, P
Model 5
C, 0,
Model 7
E, F, R
Model 4
G, H, S
Model 6
J, K, T
Model 8
M, N, U
a
EC Level/Feature Code
/
Card row
/
/
/
e-+-e
--.;-e
/
Original Model No.
L M
0 1
0 1
1 0
1 0
1 1
1 1
N 0 1 0 1 0 1 -
Card Col.
Model 3
Model 4
Model 5
Model 6
Model 7
Model 8
N
M
L
52
:/
Card row
54
153 152
:
I
I :
a
When plugged, the columns will
become either a one (1) or a zero (0).
I
a
a
~
I
I
1
I
I
I
I
I
---I
1
(0 nly on Mod 4,6,8
L2 Card)
44
49
39
Card
Col.
/
. . N'~_::;T~T~
--
I . . . . ., . .
"'0
_0
M ----1~..:.;
L --:::-:::
.........-"""""
"'"
::;:
... "
~..:.;
:::;.:
-"
... "
.. "
... .....
I
,
I
... "
".,.
......
......
a
I 0
N
......
.....-
......
.....-
,/
.
1
1
N p a R Card Col. (Ref.)
1 1 1 1 ~EC No. 734776
0 0 1 ~ EC No. 734801
o 0 0 0 ~ EC No. 735810 or higher
Feature Code
K L ~ Card Colomn (Ref.)
0 ~ Basic Densities 6250 only
o 1 ~ 6250/1600 bpi
}o
P
a
a I a
a I e-+-e
e-J-.e I a
/
O"gooal model number (Models 4,6, and 8) (See Notes)
R
a
I 0
!-r-!
/
Card row
EC Level
1
Ol~
/
Purpose
I
I
/
Plugging example: Wired for model 4.
Card
Col.
I 39
41 -, 40
/
Card
Col.
('
(
}
L
K
I
o
-....:--
--
0
1
When plugged, the columns will become
either a one (1) or a zero (0).
-J ......
)
I
I
Card location ~ A 1 L2
("2-high" card.)
III
II
II
0
-o
Tape Unit Serial Number
- -- -
90-99XXX machines plug for
model of tape unit.
Notes:
[ 1] The original model number is the high-order digit
or alpha character in the serial number, and is not
changed with model conversion, See table to
convert alpha to model type,
[2] For tape units with a high order digit in the serial
number, other than 3 through 8; the diagnostic
will print the original model number as the high
order digit of the serial number,
Card row
46145144
......;-e
e-l-e
I
1
Example
Values
a
a
ol~
4
~IO
~~
32
~Io
..........
I
"-
"-
Card row
,,
51
I
50
I 49
-.......I--e
!"-t-4
a
I
a
a
~
1024
~,O
a
~
e--.--e I a
~,O
I a
.+-e
I
~
• Copyright International Business Machines Corporation 1976, 1979, 1980
__
I
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~
1
2
4
8
16
32
64
128
R
a
P
N
M
L
K
J
Plug
Value
Card
Col.
256
512
1024
2048
4096
8192
16384
32768
R
a
P
N
M
L
K
To plug seri al number:
Plug pins to equal the
last four digi ts of the
serial numb er using
chart at left.
Plugging exa mple:
Tape unit se rial
number is 81 060.
Plug positio ns
to give a su m
of 1060.
J
1060
I
'.....
Card
Col.
I
I
,
1 0
Plug
Valve
I __
~
~
______
~
I
____- L ____
~
90-212
('
90-213
NOTES:
3803-2/3420
90-213
o Copyright International Business Machines Corporation 1976. 1979. 1980
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INDEX
A
Abends- Theory 00-035
A/B Read and Sequencing Register 53-055
A Register 52-035
AC Power Supply (see Power Supplies)
Acceptable Waveforms (Read Card Test Points)
5B-004
Access Times, Read/Write (Subsystem
Characteristics) 40-002
Acronyms and Abbreviations
PLAN 2
Active / Inactive / Pulsing / Switched Line
Levels 00-003
Adapter Hose (CE Tool)
SO-OOO
ADD/ ADDM, Arithmetic (ALU Operation)
52-065
Additional Stopping Distance After Go
6A-140, 6B-205
Extend
Address Out Active (MAP)
13-300
Address Out Inactive (MAP)
13-360
Address/Feature/Priority Card Plugging
(Installation)
90-110
Address Decoders, Control Unit 5S-01Q
Addressing
Concepts 40-003
Tape Control and Tape Unit 54-005
Adjustment
Altitude Vacuum Level
OS-410, 90-190
AMP Sensor (NRZI-Model 3, 5, 7) OS-300
Amp Sensor (PE Only-Model 3, 5, 7) OS-290
Amplitude (Model 4, 6, S)
OS-310
Autocleaner OS-3S2,5B-110
BOT /EOT, Fiber Optic OS-5S0
BOT /EOT Voltage OS-575
Capstan To Stubby Bar Clearance
(All Models) OS-OSO
Capstan Tachometer (Model 3, 5, 7)
OS-130
Capstan Tachometer (Model 4,6, S)
OS-120
Cartridge Motor OS-535
Data Flow Clock Asymmetry 90-190
DC Power Supply OS-570
Dual Density Threshold Adjustment Card
SO-OOO
Electrical Skew (NRZI Feature) 08-200
ESD Grounding (3420/3S03) 90-190
Head Mirror Stop (Model 3, 5, 7) OS-350
Left Reel Hub and Motor 80-560
Mechanical Skew (NRZI Feature) 08-1S0
Mechanical Skew (1600 and 6250 BPI) OS-170
Power Window Safety Bail OS-640
Read Amplitude (Model 4, 6, 8)
08-310
Read Electrical Skew (NRZI Feature)
OS- 190
Type 2272 MST Card
17-S00
Vacuum Column Door OS-6S0
Vacuum Column Door Glass OS-690
Write Electrical Skew (NRZI Feature)
OS-200
Pneumatics
Pressure Level (All Models) OS-420
Supply Flat Belt (Type 4) OS-442 .
Power Window Motor, Rack and Switch OS-640
Rack and Limit Switch
08-650
Read Amplitude (Models 4,6, 8) 08-310
Read Electrical Skew (NRZI) 08-190
Right Reel Hub 08-500
Safety Bail 08-640
Tape Unit Stubby Bar 08-080
Write Electrical Skew (NRZI) 08-200
7- Track NRZI Threshold Adjustment Card
08-000
Air Bearings, MAP 4A-160, 4B-160
INDEX 1
Air Pressure Check, Regulator 08-405, 90-190
Airflow and Voltage Monitoring
System
lA-OOO, 1 B-OOO
Alignments
Capstan
Dynamic (Non-90,000 series) 08-150
DynamiC (90,000 series)
08-160,
Marks 08-064
Static (Non-90,000 Series) 08-060
Static (With Round Supports) 08-068
Static (With Square Support Without
Zero Marks)
08-062
Power Window 08-640,
Alternate Flip Flop 53-040
ALU ((Arithmetic Logical Unit) Microprocessor))
Operations
Arithmetic Add: ADD/ADDM (Hex Code A or B)
52-065
Branch On Condition: BOC (Hex Code 2 or 3)
52-085
Branch to Read from Load Point 55-040
Branch to Write from Load Point
55-024
Branch Unconditional: BU (Hex Code 6)
52-090
Common Start I/O Routine
55-020
Logical AND: AND/ANDM (Hex Code C or D)
52-070
Logical Exclusive OR: XO/XOM (Hex Code E or F)
52-075
Logical OR: OR/ORM (Hex Code 8 or 9)
52-075
Store Logic: STO (Hex Code 0 or 1)
52-095
Transfer Logic: XFR (Hex Code 4 or 5)
52-100
ALUl
Charts 1 to 7
13-091
Fails to Trap to·ooo (MAP)
13-400
Failure to Reset CTI (MAP)
13-210
Hangs at 000 (MAP)
13-010
Hangs on ALU2 Failure (MAP)
13-410
Loop (MAP)
13-530, 13-540
Loop, TCS (MAP)
13-080
Microprogram Detected Error (Sense Byte 11,
Bit 4) (MAP)
16-060
Op In Wait (MAP)
13-250
Power-On Reset (MAP)
13-090
Reset Failure (MAP)
13-200
Waiting for ALU2 to Complete a
Sequence (MAP)
13-420
Waiting for ALU2 to Drop STATB (MAP)
13-460, 13-470
Waiting for ALU2 STATB Indication (MAP)
13-450
Waiting for ALU2 STATD Indication (MAP)
13-440
ALU Cannot Exit or Loop (MAP)
13-370
ALUl or ALU2 Hangs (Chart)
13-005
ALUl or ALU2 Hangs (MAP)
13-000
ALU 1/ ALU2 (Two Position Switch)
75-002
ALU2
Analyzing Microprogram Errors
16-131
Microprogram Detected Error (Sense Byte 12,
16-130
Bit 4)
Microprogram Error (Table)
16-130
Power- On Reset Charts 1 to 7
13-194
Power-On Reset (MAP)
13-190
Trap Failure (MAP)
13- 260
B Bus Parity Error ALU1
16-030
B Bus Parity Error ALUi 16-100
Branch On Condition (BOC) Error
ALUl
16-050
ALU2
16-120
Bus In Register, Channel
52-040
Bus Out Register, Tape Unit 52-045
Card Interchanging List
16-001
Channel Bus In (CBI) Register 52-040
Channel Tags In (CTI) Register
52-040
Communication Between Microprocessors
(Description)
52-030
Crossover (XOUTA/XOUTB) Registers
52-025
o Bus Parity Error ALU2 16-110
o Registers 52-060
Diagnose, Loop, and Scoping Procedures
16-000
General Reference Information
16-000
High-Order ROS Registers
52-035
High ROS/IC Parity Error On a Branch Instruction
ALUl
16-020
ALU2
16-090
How to Determine the Failing Address
16-000
How to Make the ALU Loop on an Error
16-000,
Linking Microprogram Routines (Description)
52-030
Listings, Microprocessor (Description)
52-030
Local Storage Register (LSR)
52-015
Low-Order ROS Registers
52-035
Low ROS / IC Parity Error On a Branch Instruction
ALUl
16-010
ALU2
16-080
Microprocessor
Clocks 52-005
rnstructions (see ALU Operation)
Listings (Description)
52-030
(MP17MP2) Schematic
50-003
Microprogram Transfer Decodes 52-101
MIST or TCS Register (MP1)
52-060
MPl Special Register (Hardware Errors)
52-060
MP2 Special Register (TU Bus In)
52-060
Parity Error ALU 1
16-040
ROS 1 Trap Conditions
50-011
Second Level Diagram, ROS 1 Trap
Cond~ons
50-010
Short Cycle XFR Example (Timing Chart)
16-001
Stat Registers
52-015
Stop Address-FRU List ALUl
16-060
Stop Address-FRU List ALU2
16-130
Tags In Register, Channel
52-040
Tape Unit Bus Out (TUBO) Register
52-045
TCS or MIST Register (MP1)
52-060
XOUTA/XOUTB (Crossover) Registers
52-025
Amplitude- Setting Sequence
5B-120
Analysis of Damaged Tape Errors 00-012
AnalYSIS of I BG in Developed Tape 00-013
Analyzing Microprogram Errors
16-131
AND; Logical (ALU Operation)
52-070
Anthmetic Add (ALU Operation)
52-065
Array Patching, Patch Card
52-103
Asymmetry Adjustment, Clock
17-800
Attachment, Channel (Chart) 90-010
Autocleaner
. Adjustment 08-382
Erase Head
5B -110
Operation
08- 360
Operational Check
08-380
Removal/Replacement 08-370
Solenoid
4B -160
Write Card CirCUitS
5B-110
Automated LogiC Diagram IALDs) 00-002
Automatic Threading (Concept)
40-001
B
B Bus
B Bus 0-7 ALU 1 Test POints ITable)
16-030
Panty Error ALUl (MAP)
16-030
Parity Error ALU2 (MAP)
16-100
Parity Indicator
75-003
Backhitch
6B-230
Backspace Block Command
40-007
Backspace File Command 40-007
Backspace Operation
6B-230
Backward
No Response or Tape Moves Backward
3A-l00
Tape Fails toGo Backward
3A-130, 3B-130
Bad Sense Data After a Rewind from OLTs (MAP)
15-140
Basic Recording Techniques (PE, NRZI,
6250) Description
55-0,07
. Basic Subsystem (Concepts)
40-001
BCDIC-EBCDIC Conversion Chart (7- Track
57-0,20
Operation)
Bit Cell and PE Waveform
55-007
Bit Cell and NRZI Waveform
55-007
Bit Packing and Scoping Procedure
5A-115, 5B-025
Bit Usage Chart, MP I XOUTA Register
52-025
Block Diagram, Device Switching
(2xS Switch)
lS-012
Block Diagram, Device Switching
(3xS or 4x8 Switch)
lS-013
BOC Indicator 75-003
BOT/EOT
Phototransistor 2A-Ol0
Load Check Prior to BOT Sense
2A-150, 2B-150
Tape Does Not Go Backward or Does Not Stop
at BOT
2A-190
Tape Moves Backward Off Left Reel
2B-190
Tape Unwinds Off Right Reel or TI Light Stays
On
3A-150
Tape Won't Thread, Load, and Return to BOT
Correctly 6B-l00
Voltage Checks and Adjustments 08-5S0
BOT / EOT, Fiber Optics
Block Removal/Replacement OS-590
LED BOT /EOT Window Removal/Replacement
08-590
LED BOT / EOT Voltage Checks/Adjustments
08-5S0
Branch
Condition Error ALU1(MAP)
16-050
MP1 Condition (Table)
52-0S6
MP2 Conditions (Table)
52-0S7
On Condition (ALU Operation)
52-085
On Condition Error ALU2 (MAP)
16-120
INDEX 1
INDEX (Cont'd)
INDEX 2
Unconditional (ALU Operation)
52-090
To Write From Load Point 55-024
To Read From. Load Point 55-040
Buffer Write Cycle 53-040
Buffers, LSR 52-015
Burst Commands 40-005
Bus In Register, Channel 52-040
Bus In/Bus Out Interface Lines 07-000, 54-000
Bus Out Checks (MAP)
15-030
Bus Out Register, Tape Unit 52-045
Busy (TCS Feature) 58-012
Busy /Tach Lines Test Points (Table)
16-171
Byte Counter 53-025
Check/ Adjustment (Models 4, S, and 8) 08-120
Cleaning 08-140
Cleaning Kit 85-000
Cleaning· Procedure, Special Glazed 08- 700
Control Circuits, Capstan 6A-120, SB-200
Drive System SA-120, SB-200
Dynamic Alignment (Non-90.ooo Series Tape Units)
08-150
Dynamic Alignment (90,000 Series Tape Units)
08-160
Extended Go 6A-140, SB-205
Gray Code Counter (GCC) 6B-205
IBG Counter Circuits 6A-130.6B-205
Major Elements of Capstan Control LogiC SB-205
Motion Checks (Capstan Motion Appears Normal)
SB-020
Motion Control Problems SA-OOO
Motion Failure Problems SB-ooo
Motor and Controls
6A-120, 6B-200
Motor ProportionEd Drive Control Circuit 6B-215
Motor Waveforms SA-002, SB-002
Polarity Hold Drive (PHD) Register SB-205
Proportional Drive Counter (PDC) 6B-205
Pulse Generation 6A -120, 6B - 200
Quarter Tach Pulses 6B-205
Read Only Storage (ROS) 6B-205
Start Capstan Motion 6B-220
Starts Turning When Power is Turned On SB-140
Static Alignment
(With Round Supports) 08-068
(90,000 Series, With Zero Marks) 08-0S2
(90,000 Series, Without Zero Marks) 08-064
Tach Period Counter (TPC) 6B-205
Tape Unit Loads But Capstan Motion is Faulty
6B-l10
TU Stubby Bar Clearance Adjustment 08-080
TU Won't Thread, Load and Return to BOT Correctly
6B-loo
Won't Start Rewind to LP After Tape Load 2B-175
6 MHz Oscillator and GCC 6B-205
Capstan Prealignment Gauge (CE Tobls) 80-000
Card / Board Function Layout
(3420)
19-010
(3803-2) 19-000
Card Isolation Technique PLAN 1
Card Plugging (Installation) 90-110
Card Plugging, Tape Control Logic Panel 19-000
Cartridge
Does Not Open 2A-l00,2B-l00
Opener Does Not Close 4A-150, 4B~150
Optional (Concept) 40-001
Motor Replacement/Adjustment 08-535
Restraint Pressure Check 08-536
Restraint Removal/Replacement 08-540
CE Initial Entry Flow Chart START 1
CE Panel
Description 75-001
Failures 12-020
Operation Contents (MAP)
12-010
Switches 75-001
Channel
Attachment (Chart) 90-010
Buffer Controls 53-030
Buffer Logic 50-000
Bus In 53-055
Bus In Register 52-040
c
C Compare or P Compare Circuit Logic 17-017
C Compare or P Compare Errors 17-010
C Compare or P Compare Errors (Timing Chart)
17-014
Cable and Terminator Plugging 90-080
Cable Retaining Bar 90-060
Cables 90-060
Cabling, Subsystem 90-060
Capstan
Adjusters 08-060
Adjustment Wrench (CE Tool) 80-000
Box Wrench (CE Tool)80-000
Capstan To Stubby Bar Clearance 08-080
Drive System 6A-120,6B-200
Dynamic Alignment Tracking (90,00 Series) 08-160
Dynamic Alignment Tracking (Non-90,00
Series) 08-150
.
Glazed Cleaning Procedure 08-700
Major Elements of Capstan Control logic 6B-205
Motion Checks (Motion Appears Normal) SB-020
Motion Control 6A-000
Motion Failure Symptoms 6B-000, 6B-140
Motor and Controls SA-120, SB-200
Motor Proportional Drive ControlSB-215
Motor Status 3A-030, 3B-030
Motor WaVeforms SA-002
Normal Cleaning Procedure 85-004
Pulse Generator SA-120, SB-200
Start Capstan Motion (Write Operation
200 IPS) 6B-220
Capstan Assembly
Field Repair, DentedCapstans (Non-90,000
Series TU) '08-020
Field Repair, Dented Capstans (90,000 Series
TU) 08-030
Removal (Non-90,000 Series Tape Units) 08-020
Removal (90,000 Series Tape Units) 08-030
Replacement (Non-90,000 Series Tape Units)
,. 08-040
Replacement (90,00 Series Tape Units) 08-050
Starts Turning When Power is Turned On
(Second Level) SB-140
Static Alignment (Square Support With Zero
Marks) . 08-0S4
Static Alignment (Square Support
Without Zero Marks) 08-062
Static Alignment (With Round Supports) 08-0S8
Capstan Tachometer
Check/ Adustment (Models 3, 5, and 7) 08-130
Clocks / Oscillators / Counters
Byte Counter 53-025
CRIC-CROC Address Counters 53-035
Data Flow Clock 53-015
Group Buffer Counter 53-090
Master Clock 53-005
Microsecond Frequency 53-005
Oscillator Gating 53-005
Read Clock Stepping Pulses 53-005
Read/Write Clocks and Counters (Table) 53-010
Write Clock and Write Counter 53-020
Column Vacuum Check 08-400
Command Controls Switches (CE Panel) 75-002
Command or Control Status Reject
16-160.
6A-160
Command Out Inactive During Reset or
Power On Reset (MAP)
13-330
Command Out Tag Active (MAP)
13-290
Command Reject (MAP)
15-020,
Command Select Sequencer and Decoder 12-026
Command Sequence (MAP)
13-050'
Command Status Reject (MAP)
16-160
Commands and Instructions
Burst Commands 40-005
I/O Instructions 40-009
Motion Control Commands 40-007
Non-Motion Control Commands 40-008
Common Start I/O (SIO) Routine 55-020
Communication Between Microprocessors
(Description) 52-030
Communicator Feature, Device Switch
18-010
Communicator (2X8 Switching) 58-080
Compare Equal Indicator (CE Panel) 75-003
Compare Errors, P Compare or C Compare 17-010
Compare Errors, P Compare or C Compare
(Timing Chart) 17 -014
Concepts, 3803-2/3420 40-003
Configuration Worksheet Instructions 90-030
Configurations, Subsystem (Concepts)
40-003. 90-100
.
Contingent Connection (TCS Feature) 58-012
Control Burst 40-002
Control Check Indicators (CE Panel) 75-003
Control Status Reject (MAP) . 16-210
Con. trol Unit (see Tape Control)
Common Start 1/0 (SIO) 55-020
Se.nse and Status Byte Table 00-005
Control Unit End (rCS Feature) 58-012
Conversion, Field Tester 90-170
Conversion Table, Sense Byte to Bit 14-005
Cooling Fan Assembly Removal/Replacement 08-630
Cooling System (see Voltage and Airflow
Monitoring System)
Counter (lC). Microprocessor 1 Flow Logic 52-010
Counters (see Clocks/Oscillators/Counters)
Bus In/Out Checking (MAP)
13-380
Initial Selection 54-000
Interface Problems, Tape Control 18-040
Priority Circuits 54-020
Status Word Bits (Table) 15-080
Tags In Register 52-040
Test Points (Table) 17-021
Write Byte Register 53-045
Characteristics, 3420 Subsystem 40-002
Chart
ALUl 1 to 7 13-091
ALU2 Power On Reset 13-194
Branch Conditions 16-050
Cards and Cables, Device Switching
Troubleshooting Procedure 18-028
Dropping Ready and Thread and Load Failure
2A-OOO
Features Chart (Sense Byte 6)
17 - 220
Mode Chart (Sense Byte 6)
17-110, 17-220
Read /Write Vertical Redundancy Check
17-170
Reference
18-029
Skew Error Test Points 17 -162
Tape Control To/From Device 18-005
Tape Unit Control Lines 16- 213
1x8 Selection 18-001, 18-005
Checks
Autocleaner Operational 08-380
BOT /EOT Voltage 08-580
Capstan Tachometer
(Model 4, 6, 8) 08-120
(Model 3, 5, 7) 08-130
Capstan and Tracking 08.,010
Cartridge Restraint Pressure 08-536
Cleaner Blade Gauss 08-390
Column Vacuum Level 08-400
DC Power Supply 08-570
Erase Head Polarity and Erasure 08-320
ESD Grounding (3420/3803) 90-190
Feedthrough 08-330
File Protect Mechanism 08-340
Mechanical Skew
1600 and 6250 08-170
NRZI Feature 08-180
Pneumatic Pressure Vacuum 08-400
Power Supply 90-180,08-570
Read/Write Head Resistance (Model 4, 6, 8)
08-280
Regulator Air Pressure 08-405, 90-190
Tape Guide (NRZI Feature) 08-230
Tape Unit Grounding 08-600
Threading Vacuum 08-400
Transfer Valve Plug 08-410
Vacuum Column Switch 08-450
Vacuum Pump Belt 08-410
Check Register, Write 53-045
Checking, Read Back (Concept) 40-001
Cleaner Blade Gauss Check 08-390
Cleaning Procedures (see Preventive Maintenance)
Clock
Asymmetry Adjustment
17 - 800
Chart 53-015
Check (MAP) 17-800
Control Logic, Microprocessor 52-005
Write (Table) 53-020
INDEX 2
t::
CoPyrtght InternatiOnal BUSiness Machines Corporation 1976. 1979. 1980. 1983
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INDEX (Cont'd)
CRC
Error, NRZI
17-590
Error, 6250 BPI/ PE
17 -540
Generation 53-0678
Generators 53-065
Indicator 75-004
Timing Chart 17-544
CRIC/CROC Address Registers 53-035
Crimper Procedure, Tape (CE Tool) 80-000,
2A-015, 2B-006
Cross Reference, Pins to Logic (3803-2) 20-000
Cross Reference 3803-2, Pins To Logic
(Logic) 17-166
Crossover (XOUTA/XOUTB) Registers 52-025
Crosspoint Section (2X8 Switching) 58-080
Crosspoint Switch, Inbound 58-110
Crystral Oscillators, Basic Timing 53-005
CUE Reset on Interface B (MAP)
13-500
Current Generator 5B-110
Cyclic Redundancy Checks (see CRC)
(MAP)
17-540
Generation CRC A, B, C, 0
53-066
During Read Back Check of Write Operations
53-067
During 9- Track Read Backward Operations
53-067
During 9-Track Read Forward Operations
53-067
During 9-Track Write Operations 53-067
Read CRC Generator 53-065
Write CRC Generator 53-065
o
D-Bearing Removal and Replacement
(NRZI Feature) 08-210
Bus
Parity Error
ALU 1 (MAP)
16-040
ALU2 (MAP)
16-110
Parity Indicator 75-004
o Registers 52-060
Data
Converter Check (MAP)
15-070
Entry Select Switch (CE Panel) 75-003
Exchange on Device Interface During
a Write Operation 5A-130,5B-130
Data Flow and Control
ALU Schematic 50-003
Check Indicators 75-004
Clock 53-015
Clock Asymmetry Adjustment (Installation) 90-190
Exchange on Device Interface During Write Operation
5A-130,5B-130
Intermittent Permanent Data Checks
Bit Packing 5A-115, 5B-025
Forward to Backward Ratio 5B-020
Noise or Bit In IBG 5A-115,5B-025
Signal Dropout 5A-ll0, 5B-020
Tape Edge Damage 5A-ll0, 5B-030
Tape Slipping 5B-020
Tape Stretch 5A-115, 5B-020
Read Data Flow Logic 50-002
Read Translator 7- Track 57-020
Read/Write Flow Logic 50-002
o
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INDEX 3
Write Data Flow Logic 50-001
Write Translator 7- Track 57-021
7-Track Read Schematic 57-006
Security Erase Command 40-007
Security Erase Procedure Offline 12-013
Data Flow Check Indicators (CE Panel) 75-004
Data In 53-040
Data Rates (3420 Subsystem Characteristics)
40-002
DC Power Supply (see Power Supplies)
DC71 Patch Card General Description 52-103
Dead Track Register 53-075
Degausser (CE Tool) 80-000
Degaussing, Cleaner Blade 08-390
Degaussing, Read/Write Head 08-280
Density Feature Combinations (Table) 40-004
Description
Group Coded Recording 55-008
Phase Encoded (PE) 55-007
NRZI 55-007
6250 BPI
55-007
Detection Register 53-005
Determine the Failing Instruction Address
Procedure, Microprocessor 16-000
Developing Solution (CE Tool) 80-000
Develop Tape 00-011
Device
17-312
Bus In x to OF Test Points (Table)
Selection Priority 54-020
Switching Feature (Description) 58-050, 90-050
Block Diagram For 2x8 Switch
18-012
Block Diagram For 3x8 or 4x8 Switch
18-013
Failure Modes
18-010
Feature (Logic)
18-010
Inbound Crosspoint Switch 58-110
Line Definitions 58-060
Operation 58-060
Rules and Definitions 18-011
Switch Node 58-090, 90-050
Tape Subsystem Cabling
18-011
Interface
Data Exchange on Device Interface During Write
Operation 5A-130,5B-130
Lines 07-000, 54-000
Device End (TCS Feature) 58-012
Device to SOl logic lines 18-030, 18-032
Diagnostic Mode Set Command 40-008, 55-007
Diagnostics, System (Installation) 90-200
Diagram
Autocleaner Operation 08-360
8yte Count or Go Down
12-028
CE Entry 12-027
Channel Priority
54-020
Configuration Worksheet. Subsystem
Installation 90-040
Device Interface 07 -000
Device Interface During a Wrtte
Operation 5A-130. 58-130
Device Interface During Read Forward
Operation 5A-140.58-140
Device Switching
Configuration 58-051. 18-011
Feature
18-01 0
Most Probable Cause Analysis
18-015
1x8 Selection logic 18-000
2X8 Switch logic 58-055, 18-012
2X8 Switching Functional Units 58-080
2X16 Switch Logic 58-055
2x16 Switch logic 58-060
3X8 or 4X8 Switch logic 18-013
4X16 Switch Logic 58-070
Display Select Switch and Compare 12-023
Group Coded Recording (6250 BPI) 55-008
IBG Generation 6A-150.6B-210
Initial Selection 54-000
Map Formats 00-001
Pneumatic System, Thread Status
(Active and Inactive) 4A-161, 4B-161
Reel and Capstan Operation During
Rewind 3A-030, 3B-030
Set and Display CE Register 12-021
Set and Display Compare Register 12-022
System Diagnostics 90-210
Troubleshooting Procedure (MAP)
18-020
Write Head Driver Card 08-270
Digital to Analog Converter (DAC) Waveforms
(Model 4, 6, and 8) 6B-01O, 68-011, 6B-012
Digitec 251 Meter (CE Tool) 80-000
Display lSR Contents (How To) 12-013
Display Select Switch (CE Panel) 75-002
Drive (see Tape Unit)
Drop Ready Problems, Intermittent 00-005
Dropping or Picking Records
15-200
Dropping Ready and Thread and Load
Failure Symptoms Chart 2A-000, 2B-000
Dual Density Threshold Adjustment Card 80-000
Dynamic Reversal (MAP)
16-200
E
Early Begin Readback Check (MAP) 17-100
Easy Load Cartridge (Concept) 40-001
EBCDIC/BCDIC Conversion Chart 57-020
ECC/CRC Scope points (Table)
17-075
ECC/ENV Indicator 75-004
Edge Damage, Tape 58-030
Emulator Jumper 90-200
Enable Switch 75-001
Enable/Disable Switch (Concepts) 40-003
Encoded Data Group (GCR) 55-010
End Data Check
MAP 17-530
logic 17-531
End Of Call 00-030
Engineering Changes Which Affect MAPs 00-000
Entry Select Switch, Data
75-003
ENV /ECC Indicator 75-004
Envelope
Check Circuit logic 17 -315
Check Without Skew Error (MAP)
17-220
Circuits 5A-l00, 5B-l00
Failure, Runaway, or Read/Write Problems
5A-000, 5B-000
EOT /80T (see 80T /EOT)
Equipment Checks 16-000
Erase
Full Width Erasure (Concept) 40-001
Gap Command 40-007
Head 5B-110
Head Current 40-007
Head Polarity and Erasure Checks 08-320
Head Removal and Replacement 08-250
Error Analysis (see MAPs, Tape Control)
Error Analysis Flow Chart, Permanent
Read/Write 00-011
Error Correction Sense Analysis (MAP) 21-000
Example of Typical Flow Through MAPs 00-003
Excursions (Wide) in Left Column During HS Rewind
3A-160.38-160
Extended Go 68-205
Extra or Missing Interrupts (A2 Panel)
18-050
F
Failure Follows Tape Unit 00-040
Failure Modes, Device Switch Feature 18-010
Features
Card Plugging 90-110
Chart for Sense Byte 6
17 - 220
Density Feature Combinations (Table) 40-004
Device Switching
Cabling Instructions 90-060
line Definitions 58-060
Node logic 58-090
Node Schematic 58-080
Operation 58-060
Theory 58-050
2 X 8 Switch Functions (Concepts) 58-080
2 X 8 Switch Logic 5B-005
2 X 16 Switch logic 58-060
4 X 16 Switch Logic 58-070
Nine- Track NRZI 40-004
Seven-Track NRZI
EBCDIC-BCDIC Conversion Chart 57-020
Read Data Convert Data Flow Schematic 57 -026
Read Translator Data Flow Schematic 57 -022
Seven-Track Read Data Flow Schematic 57-006
Seven-Track Write Data Flow Schematic 57-005
Write Data Convert Data Flow Schematic
57-025
Write Translator Data Flow Schematic 57-020
Switching Configurations (Figure) 58-051
Two Channel Switch (TCS) 58-010
8usy 58-012
Contingent Connection 58-012
Control Unit End 58-012
Device End 58-012
Implicit Connection 58-011
Interface Switch Control 58-011
Partitioning 58-011
Reserve / Release Operation 58-011
Resets 58-011
Selection 58-011
Sense Release Command 58-011
Sense Reserve Command 58-011
Stack 58-012
Stack Interrupt 58-012
Theory 58-01 0
Tie 8reaker 58-012
2 Control Switch (Concepts) 58-050
3 Control Switch (Concepts) 58-050
4 Control Switch (Concepts) 58-050
Feedthrough Check 08-330
3803-2/3420
INDEX 3
t'
Copyright International Bustnes. Machines Corporation 1976. 1979. 1980. 1983
(
INDEX 4
INDEX (Cont'd)
Fiber Optics
BOT / EOT Voltage Checks/Adjustments 08-580
Bundle Removal/Replacement 08-610
Lamp Removal/Replacement/Cleaning 08-620
LED BOT /EOT Block Removal/Replacement
08-590
LED BOT /EOT Voltage Checks/Adjustments 08-580
LED BOT /EOT Window Removal/Replacement
08-590
Field Feedback Problem Fixes 00-050
Field Replaceable Units (FRUs)
PLAN 1
Field Tester
Accuracy Check 08-290, 08-300,
08-315
Conversion
90-170
3420 80-020
File Protect Indicator Off (MAP)
lA-OOO,
lB-OOO
File Protect Mechanism Check 08-340
File Protection (Concept) 40-001
Flag Bytes 1 and 2 (Tables) 40-006
Flat Belt Replacement, Pneumatic Supply 08-442
Flow Charts
Branch To Read From Load Point 55-040
Branch To Write From Load Point 55-024
Common Start I/O Routine 55-020
Read From Load Point 55-040
Selection and Priority 54-005
Write From Load Point 55-024
Flow Through MAPs, Typical (Example) 00-003
Format Character Trk x (Table)
17-075
Format, Data (see Recording Methods / Formats)
Format of MAPs 00-001
Format, Microprocessor Instruction 52-030
Forward Creep During Rewrite (Model 4, 6, 8)
6B-230
Forward Space Block (FSB) Command 40-007
Forward Space File (FSF) Command 40-007
Forward Start Times (Subsystem Characteristics)
40-002
Four Control Switch (Concepts) 58-050
Full-Width Erasure (Concept) 40-001
Function Layout, Card / Board
3420 19-010
3803-2
19-000
Functions, MPl and MP2 52-030
G
Gating, Oscillator 53-005
General Cleaning Instructions 85-000
General Information 07-000
General Reference Information,
Microprocessor
16-000
General Reset 50-011
Generators, CRC
53-065
Generation, CRC 53-067
Generation, IBG 6A-150
Glazed Capstan Cleaning Procedure 08-700
Glossary of Terms PLAN 5
Go Extend Additional Stopping Distances After 6A-14O,
6B-205
Go Extensions in Quarter Tach Pulses 6B-205
IBG Counts Models 3, 5, and 7 6A-14O
Gray Code Counter (GCC) 6B-205
Ground Check, Tape Unit 08-600
Group Buffer Control 53-025
Group Buffer Counter 53-090
Group Coded Recording (GCR) 6250 BPI
GCR. 5260 BPI (Concepts) 40-002
GCR Block 55-008
55-008
H
Halt I/O Instruction 40-009
Hardware Errors (MPl Special Register)
52-060
Hardware Pointers 17-602
Head, Erase 5B-ll0
Head Mirror Stop Adjustment (Models 3, 5, and 7)
08-350
Hex Wrench, Right Reel Hub (CE Tool)
80-000
Hi IC Pty/Hi ROS Reg Ply Indicator (CE Panel)
75-003
High-Order ROS Registers 52-035, 16-020
High ROS/IC Parity Error on A Branch Condition
ALUl (MAP)
16-020
ALU2 (MAP)
16-090
High-Speed Rewind (see Rewind Operation)
High-Speed Rewind Solenoid Check 08-405
How To
CE Initial Entry Flow Chart Start 1
Determine the Failing Instruction Address
16-000
Develop Tape 00-011
Locate Information PLAN 1
Make the ALU Loop on an Error 16-000
Operate CE Panel
12-000
Use MAPs 00-000, PLAN 1
Use Section 18-xxx 18-010
IBG Counter 2A-Ol0
IBG Detected on Write (MAP)
17-080
IBM Easy Load Cartridge 40-001
10 Burst 40-002
10 Burst Check (MAP)
17-050
Implicit Connection (TCS Feature) 58-011
Inactive/ Active/Pulsing/Switched Line Levels
00-003
Inbound Crosspoint Switch Schematic (Device Switch
Feature) 58- 1 10
Indicators, CE Panel 75-003
Inhibit Preamble/Postamble 40-005
Initial Entry Flow Chart, CE
Start 1
Initial Selection Description 54-000
Initial Selection
AB CE 50-011
Bus In/Bus Out Lines 54-000
Device Interface Lines 07-000
Tape Unit 07-000, 54-000
Initiating a Rewind 3A-Ol0, 3B-Ol0
Initiating Tape Motion 07-010
Installation
Address/Feature/Priority Plugging (see Card Plugging)
Cable and Terminator Plugging 90-060
Cable Retaining Bar 90-060
Cabling, Subsystem (Chart) 90-070
Card Plugging
Address, Tape Control 90-110
Data In Handling 90-130
Device Selection Priority Assignments
(Chart) 90-150
Device Switching Feature 90-110
Device Switching Feature, Address Control (Chart)
90-140
Disconnect In Handling 90-110
NRZI Feature 90-120
Primary/Secondary TU Interface Control (With
Device Switch) 90-130
Primary/Secondary TU Interface Control
(With 1x8) 90-130
Priority Assignments, Device Selection (Chart)
90-150
Select Out Priority 90-120
Serial No/EC Level/Feature Code (Tape Control)
90-210
Serial No/Model No/EC Level/Feature Code
(Tape Unit) 90-212
Tape Control Address 90-110
Tape Switching Feature, Address Control (Chart)
90-140
Two Channel Switch Feature 90-120
3803 Address 90-110
Checklist 90-020
Checks and Adjustments (Installation)
Air Bearing Pressure, 3420 90-190
Altitude Vacuum Level Setting, 3420 90-190
Autocleaner 90-190
BOT /EOT Check 90- -, JU
Capstan Check 90-190
Data Flow Clock Asymmetry Adjustment,
3803 90-190
ESD Grounding 90-190
Mechanical Skew, 3420 90-190
Configuration Worksheet (Instructions)
90-030, 90-040
Device Switch Cabling 90-050
Emulator Jumper 90-200
Field Tester Conversion 90-170
Installation Checklist 90-020
Instructions, Subsystem Installation 90-000
I/O Interface 40-003
Kickplates 90-090, 90-100
Operator Panel Labels, Tape Control 90-160
Plugging, Cables and Terminators 90-060
Power Requirements, Special-3420 Model 8
90-180 Power Supply Checks
Procedures 90-020
Special Power ReQuirements-3420 Model 8
90-180
Subsystem Cabling (Chart) 90-070
System Diagnostics 90- 200
Terminator and Cable Plugging 90-060
Instructions (see Commands and Instructions)
Instruction Counter, Microprocessor 1 52-01 0
Interblock Gap (l8G)
Counter Logic 6A-130, 6B-205
Detected on Write
17 -080
Generation 6A-150.68-210
Go Extend IBG Counts (Model 3, 5, 7) 6A-140
Noise or Bit In 5A-115, 5B-025
Passing Times (3420 Subsystem Characteristics)
40-002
Subsystem Characteristics 40-002
Timing Chart (Model 5) 6A-150
Interface Disabled Indicator (CE Panel)
75-003
Interface Switch Control (TCS Feature)
58-011
Intermittent Drop Ready Problems 2A-005,
2B-005, 07-010
Interrupt 54-000
Interrupts, Extra or MiSSing (A2 Panel)
18-050
Intervention Required (MAP)
15-010
Introduction to Maintenance Philosophy PLAN 1
Introduction, Subsystem Installation 90-000
I/O Instructions (see Commands and Instructions)
40-009
I/O Pins (3 Bit Code)
12-023, 12-024
K
Kickplates, Installation
90-090, 90-100
L
Lamp, Skew Check 53-085
Lamp Test Switch (CE Panel) 75-002
Latch, Reel (see Right Reel Latch)
Left Movable Guide and Retractor Removal
and Replacement (NRZI Feature) 08-220
Left or Right Vacuum Column Problems 2A- 1 70,
2B-170, 3A-110, 38-110
Left Reel
Does Not Turn Clockwise at Threading
Speed
2A-110,2B-ll0
Hub and Motor Removal/Replacement/Adjustment
80-560
LogiC 3A-030, 3B-030
Motor Speed, Voltages 3A-020, 38-020
Right or Left Reel Won't Load Tape Into Column
2B-180
Tape Rewinds Off Left Reel 3B-180
Theory, Rewind and Timing Chart 3A-Ol0, 38-010
Left Threading Channel 08-230
Legend and Symbols PLAN 4
Light Source Removal/Replacement 08-620
Lights/ Indicators (see Maintenance Procedures)
CE Panel
75-001
File Protect Indicator Off 1A-OOO, 18-000
Load Check Prior to BOT Sense 2A-150, 28-150
Power Check Indicator On 1A-OOO, 18-000
Ready Lamp Does Not Turn Off 4A-l00,4B-l00
Ready Lamp Does Not Turn On
2A-210, 28-210
TI Lamp Stays On
3A-150, 38-150
Line Definitions, Device Switching Feature 58-060
Line Levels - Active / Inactive / Pulsing / Switched
00-003
Line Names for Reference to ALD XC70x
(Table)
18-020
Linking Microprogram Routines (Description)
52-030
Listings, Microprocessor 52-030
Lo IC Pty/Low ROS Reg Pty Indicator 75-003
Load Check
2A-000, 28-000
INDEX 4
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INDEX (Cont'd)
Load Failure Symptoms (MAP) 2A-000, 2B,000
Load Check Prior to BOT Sense 2A-150, 2B-150
Loading Tape in Columns 2B-175
Load Operation, Approximate Time (3420 Subsystem
Characteristics) 40-002
Load Test, Minireel 08-800
Local Storage Register (LSR)
Displaying Contents 12-013
Operation 52-015
Locating Information PLAN 1
Locations
Control Unit
Tape Unit
Air Bearing Switch 2B-160
BOT /EOT Block 3A-150, 3B-150
Cartridge Motor 4B-150
Cartridge Open Switch 4B-150
Cartridge Opener Control Card 4B-150
CP3 2A-130,2B-130
Fiber Optic 2B-150
Fuses
lA-OOO, lB-OOO
Manual Status Control (MSC) Card 4B-ll0
Pneumatic Contactor 2A-130, 2B-130
Pneumatic Supply 2A-210, 2B-210
Power Interface Board Bl
lA-003, 1B-OOl
Power Window PCB 2A-210, 2B-210
Power Window Switches 4B-14O
Reel Motor Power Board 2A-14O, 2B-14O
Reel Tachometers 3A-170, 3B-170
Reels Loaded Switch 4A-14O,4B-14O
Regulator Cards
lA-002, 1 B-002
SCRA 2B-160
TB-l, 2, and 3
lA-002, lB-002
Transfer Valve Solenoid 2A-130,2B-130
Yl Panel Location 90-080
Lock ROS 1 IC 50-01 1
Logic
A Register 52-035
Arithmetic Add 52-065
Branch On Condition 52-085
Branch Unconditional 52-090
Byte Count or Go Down
12-028
Capstan Control, Pulse Generator, and
Motor Controls 6A-120,6B-200
Capstan Fails To Start a Rewind To Load
Point Operation After Loading Tape into
Columns 2B-175
Cartridge Does Not Open 2A-l00, 2B-l00
Cartridge Opener Does Not Close 4A- 150, 4B-150
CE Entry 12-027
Channel Buffer Controls 53-030
Channel Tags In and Channel Tags
Out Register 52-040
Channel Write Byte, Write Check, and
Pointer Registers 53-045
Command Select Sequencer and Decoder 12-026
CRC Generators 53-065
o Register 52-060
Data Flow Clock 53-015
Dead Track 53-075
Device Switch Node 58-090
Device Switching 58-050
End Data Check 17-531
Envelope and Read/Write
Model 3, 5, 7 5A-l00
Model 4, 6, 8 5B-l00
(
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INDEX 5
Envelope Check
17-315
Group Buffer Counter 53-090
Inbound Crosspoint Switch 58-110
High-Order ROS Register 52-035
Left Reel Does Not Turn Clockwise at
Threading Speed 2A-lll, 2B,lll
Left or Right Vacuum Column Problems
2A-170, 2B-170, 3A-l10, 3B-l10
Load Check Prior To BOT Sense 2A-150,2B-150
Logical AND 52-070
Logical Exclusive OR 52-080
Logical OR 52-075
Loop-Write-To-Read (LWR) 55-005
Low-Order ROS Register 52-035
Microprocessor Clocks Control 52-005
MPl IC (Instruction Counter) 52-010
MPl /MP2 Circuits 50-003
MP1/MP2 Special registers 52-060
MPl /MP2 STAT Registers 52-015
MIST or TCS Register 52-060
Multi-Track Error (Logic) 17-112
No Response or Tape Moves Backward 3A-loo,
3B-loo
NRZI Read Data Flow 57-006
Oscillator Gating 53-005
Overrun
15-042
P or C Compare 17 -017
Power Window Does Not Go Down 4A-140,
4B-14O
Proportional Drive Control 6B-215
Read Cycle Controls 53-095
Read Data Converter 57-026
Read Data Flow 50-002
Read Head and Read Card 5B-120
Read Sequencing and A/B Registers 53-055
Read Translator 57-021
Read/Write Flow 50-000
Read /Write VRC Circuit 17 -179
Ready Lamp Does Not Turn Off 4A-loo,4B-1oo
Ready Lamp Does Not Turn On/Window Does
Not Close 2A-210, 2B-210
Reel and Ca-pstan Operation during Rewind
3A-030, 3B-030
Reel Drive System 3b-020
RIC/ROC 53-081
Right or Left Reel Fails To Load Tape
Into Column 2B-180
Right Reel Does Not Turn Clockwise at
Threading Speed 2A-120, 2B-120
ROS/LSR 52-015
ROS Mode Switch and Gates 12-024
ROS 1 Trap Conditions 50-01 0
Skew Detection 53-085
System 360/370 Switching (Data In
Handling) 58-005
Tape Does Not Enter or Stay in High Speed
Rewind or Rewinds To BOT at High Speed
3A-170, 3B-170
Store 52-095
Tape Does Not Go Backward or Does Not
Stop at BOT 2A-190
Tape Does Not Load Into Either
Column 2A-160, 2B-160
Tape Does Not Pull Out of Columns
Properly During Unload Rewind 4A-120, 4B-120
Tape Does Not Stop or Tape Runaway
(Forward or Backward 3A-14O,3B-140
Tape Does Not Wind Completely Onto Right
Reel or Reels Do Not Stop 4A-130, 4B-130.
Tape Fails To Go Backward 3A-130, 3B-130
Tape Goes Forward After Loading Into
Vacuum Columns 2A-2oo, 2B-2oo
Tape Moves Backward Off Left Reel. or
Tape Unit Performs a Normal Unload
Rewind During Load Operation 2B-190
Tape Pulls Out, Dumps, or Has Wide
Excursions in Left Column During High
Speed Rewind 3A-160,3B-160
Tape Threads Into Threading Channel and
Stops 2A-14O,2B-14O
Tape Threads Into Right Column 2B-130
Tape Unit Bus Out (TUBO) Register 52-045
Tape Unit Selection Priority 54-010
Tape Unwinds Off Right Reel 3A-150,3B-150
TCS Selection and Tie Breaker 58-030
Transfer 52-100
Transfer Valve Does Not Pick or
Pneumatic Motor Not Running 2A-130
Two-Channel Switch 58-010
Two-Channel Switch and Tie Breaker 58-030
Unload Rewind Pushbutton (No Response)
4A-l10,4B-l10
Write 53-070
Clock and Write Counter 53-020
Data Converter 57-025
Data Flow 50-001
Group Buffer Control 53-025
Write Head, Erase Head, and Write Card
5B-l10
Service Controls 53-040
Translator 57-020
Triggers 53-070
Trigger VRC
17-026
2x8 Switching Functional Units 58-080
Logic Panel Removal/Replacement (3803/3420)
08-630
Logic, Pins, Cross Reference List 20-000
Logic Section (2X8 Switching) 58-080
Logical AND (ALU Operation) 52-070
Logical Exclusive OR (ALU Operation) 52-0BO
Logical OR (ALU Operation) 52-075
Long Cycle BOC or BU Example (Timing Chart)
16-001
Loop, ALU1 (MAP) 13-530, 13-540
Loop Write-to-Read (LWR) Command
40-006, 55-005
Tape Unit Operation 55-005
Low-Order ROS Registers 52-035, 16-010
Low ROS/IC Parity Error on a Branch Condition
(ALU2) (MAP) 16-080
Low ROS/IC Parity Error on a Branch Instruction
(ALU1) (MAP) 16-010
Low Speed Rewind 3A-Ol0, 3B-Ol0
LWR Tape Unit Operation 55-005
Schedule 85-005
Tape Unit Cleaning Procedure 85-001
Maintenance Philosophy, Introduction PLAN 1 _
Major Elements of Capstan Control Logic 6B-205
Make the ALU Loop on an Error (Procedure)
16-000
MAPs
Address Out Tag Active
13-300
ALU Cannot Exit or Loop 13-370
ALUl
Cannot Transfer 13- 130
Fails to Trap to 000 13-400
Failure to Reset CTI
13-210
Hangs at 000
13-010
Hangs on ALU2 Failure 13-410
Loop 13-530, 13-540
Loop, TCS 13-080
Microprogram Detected Error (Sense
Byte 11, Bit 4)
16-060
Op In Wait 13-250
Power On Reset
13-090
Reset Failure
13-200
Waiting
13-110, 13-140, 13-170
Waiting for ALU2 to Complete a
Sequence 13-420
Waiting for ALU2 to Drop STATB
13-460,
13-470
Waiting for ALU2 STATB Indication
13-450
Waiting for ALU2 STATD Indication
13-440
Waiting for End of Data (EOD) on Write
13-520
ALUl or ALU2 Hangs 13-000
ALU2
Power On Reset
13-190
Trap Failure 13-260
B Bus Parity Error (ALU 1) 16-030
B Bus Parity Error (ALU2)
16-100
Bad Sense After a Rewind from OLTs 15-140
Branch Condition Error ALU1
16-050
Branch On Condition Error (ALU2)
16-120
Bus Out Checks 15-030
Capstan Motion Control 6A-OOO, 6B-000
CE Panel Operation 12-010
Channel Bus In/Out Checking
13-380
Clock Check 17 -800
Command or Control Status Reject 6A -160
Command Out Inactive During Reset or
Power On Reset
13-330
Command Out Reject 15-020
Command Out Tag Active
Command Sequence 13-050
Command Status Reject
16-160
Control Status Reject 16- 200
CUE Reset on Interface B 13-500
Cyclic Redundancy Checks 17 - 540
o Bus Parity Error
ALUl
16-040
ALU2
16-110
M
Magnetic Tape and Reels (Concepts) 40-002
Preventive Maintenance
General Cleaning Instructions 85-000
3803-2/3420
INDEX 5
INDEX (Cont'd)
Data Converter Check 15-070
Device Switching Feature
Most Probable Cause Analysis 18-015
Troubleshooting Procedure 18-020
Dropping Ready and Thread and Load
Failure Symptoms 2A-000. 2B-000
Dynamic Reversal 16-200
Early Begin Readback Check 17-100
End Data Check 17-530
End Of Call 00-030
Envelope Check Without Skew Error 17-220
Envelope Failure. Runaway. or Read/Write
Problems 5A-000. 5B';'000
Error Correction Sense AnalYSis 21-000
File Protect Indicator Off or Power
Check Indicator On lA-ooo. 1B-ooo
Formats 00-001
High ROS/IC Register Parity Branch Condition
ALUl
16-020
ALU2 16-090
How to Use 00-000
IBG Detected on Write 17-080
10 Burst Check 17-050
Intervention Required 15-010
LRCR Errors, Sense Byte 3, Bits O. 1.
or4 17-310
Low ROS/IC Parity Error on a Branch Condition
(ALU2) 16-080
Low ROS/IC Parity Error on a Branch Instruction
(ALU1) 16-010
MTE Without Envelope Check 17 -110
No Block Detected on Write/Write Tape Mark
(WTM) 16-190
Noise Detection 17 -370
Not Capable 15-060
NRZI Cyclic Redundancy Check (CRC) 17-590
Offline Duplication of Online Failures 12-000
Overrun 15-040
P Compare or C Compare Errors 17-0lD
Partial Record (Sense Byte 5. Bit 5) 17 -41 0
PE or NRZI and GCR Velocity Checks/Changes
16-180
Permanent Data Checks SA-lOS, 5B-002
Picking / Dropping Records 15-200
Pointer System 17-602
Postamble Error 17 -190
Read/Write Vertical Redundancy Check (VRC)
17-168
Sense All Zeros 15-080
Sense Analysis 14-000
Service Out Tag Active 13-280
Single Tape Unit Problems 00-040
SIO Trap Failures 13-320
Slow End Readback Check 17 -1 50
Start Read Check 17-070
Suppress Out Active 13-310
Suppress Out Inactive During Reset or
Power On Reset 13-340
TACH Start Failure (Sense Byte 10. Bit 5)
16-170
TACH Velocity Error 13-510
Tape Control Metering Problems 18-060
Tape Control Power Supply 11-000
Tape Motion and Rewind Symptoms 3A-000.
3B-000
Tape Unit Loads but Capstan Motion is
INDEX 6
Faulty 6B-ll0
Tape Unit Wont Thread. Load. and Return
to BOT Properly 6B-l0l
Unit Check Without Supporting Sense
or Unexpected Sense 16-100
Unload Failure Symptoms 4A-000. 4B-000
Write Current Failure or Tape Unit Check 15-090
Write Tape Mark (WTM) Check 17-180
Write Trigger Vertical Redundancy Check
(VRC) Error 17 -020
XOUTA Register Not Functioning .13-430
1x8 Selection Logic 18-000
301 Trap Address. TCS or Device Switching
Without TCS 13-240
3420/3803 Symptom Index 00-010
3803 Status Pending 13-220
6250 Error Correction 17-600
Markers. BOT /EOT 40-007
Master Clock 53-005
Master Signal Level Tapes (CE Tool) 80-000
Master Skew Tapes (CE Tools) 80-000
Mechanical Skew (Installation) 90-190
Mechanical Skew Check/ Adjustment. NRZI Featured
Units 08-180
Mechanical Skew Check / Adjustment, 1600 and 6250
BPI Units 08-170
Meter. Torque
Metering (Concepts) 40-003
Metering Problems. Tape Control 18-060
Microprocessor (see also ALU)
Card Interchange List 16-001
Clock Control Logic 52-005
Communication Between ALUl and ALU2
(Description) 52-030
Diagnose. Loop. and Scoping Procedures 16-000
Functions (Description) 52-030
Instruction Counter Logic 52-010
Instruction Format 52-030
Listings (Description) 52-030
Stat Registers 52-015
Microprogram Address. Used in MAPs
(Description) 00-003
Microprogram Detected Error. ALUl (MAP) 16-060
Microprogram Error. ALU2 (Table) 16-130
Microprogram Error Labels (Table) 16-060
Microprogram Errors. Analyzing (Table) 16-131
Microprogram Flowcharts
Branch to Read From Load Point 55-040
Branch to Write From Load Point 55-024
Common Start I/O Routine 55-020
Microprogram Indicators 75-004
Microsecond Frequency 53-005
Minireel Load Test 08-BOO
Missing or Extra Interrupts 18-050
MIST or TCSRegister(MP1) 52-035. 52-060
MLM Tab Placement by Volume PLAN 7
Mode Chart for Sense Byte 6 17 - 220
Mode Set Command Table 40-008
Mode Set 1 (7- Track NRZI) Operation 55-007
Mode Set 2 (9-Track PE/NRZI) Operation 55-007
Modified Power Supply. 3420 lA-002
Motion Control Commands 40-007
Motion Control Commands (Table) 40-005
Motion Problems. Tape (Stubby Column Loops)
6A-OlD
Motion Tester (see Field Tester)
Operation. Autocleaner 08-360
Operational Check. Autocleaner OS-380
Operations. ALU
Arithmetic Add: ADD/ADDM (Hex Code A or B)
52-065
Branch On Condition: BOC (Hex Code 2 or 3)
52-085
Branch to Read from Load Point 55-040
Branch to Write from Load Point 55-024
Branch Unconditional: BU (Hex Code 6)
52-090
Common Start I/O Routine 55-020
Logical AND: AND/ANDM (Hex Code C or D)
52-070
Logical Exclusive OR: XO/XOM (Hex Code E or F)
52-075
Logical OR: OR/ORM (Hex Code 8 or 9)
52-075
Store Logic: STO (Hex Code 0 or 1)
52-095
Transfer Logic: XFR (Hex Code 4 or 5) 52-100
Operator Panel Switches (2X8 Switch
Logic) 58-055
Optional Tape Cartridge (Concept) 40-001
ORC Byte 53-045
Organization of Publication PLAN 6
Oscillator Gating 53-005
Oscillators (see Clocks/Oscillators/Counters)
Other (Related) Subsystem Documents PLAN 1
Overrun
Error 53-040
MAP 15-040
PE and 6250 BPI (Timing Chart) 15-041
Mple/Single Switch (CE Panel) 75-002
MPl (see ALU)
A-Register 52-035
Branch Conditions (Table) 52-086
Clock Control Logic 52-005
Clock Timing Charts 52-005
Functional Description 52-030
High-Order ROS Registers 52-035
Instruction Counter Logic 52-025
Low-Order ROS Registers 52-035
Schematic 50-003
Special Register (Hardware Errors) 52-060
Stat Registers 52-015
Transfer Decodes (Table) 52-101
XOUTA Register Bit Usage 52-025
MP2 (see ALU)
A-Register 52-035
Branch Conditions (Table) 52-087
Functional Description 52-030
High-Order ROS Registers 52-035
Instructional Counter LogiC 52-030
Low-Order ROS Registers 52-035
Schematic 50-003
Special Register (TU Bus In) 52-040
Stat Registers 52-015
Transfer Decodes (Table) 52-101
XOUTA Register Bit Usage 52-025
Multi-Track Error (MTE)
Logic 17 -112
MTE/LRC Indicator 75-004
Without Envelope Check (MAP) 17-110
N
p
9-Track NRZI (Concepts) 40-002
9-Track NRZI Feature (Tape Control) 40-004
No Block Detected on Write/Write Tape Mark
(WTM 16-190
No-Operation (NOP) Command 40-008
No Response or Tape Moves Backward 3A-loo.
3B-loo
No Response When Rewind/Unload Button is
Pressed 4A-ll0.4B-l10
Noise Detection (MAP) 17-370
Noise or Bits in the Interblock Gap 5A-115. 5B-025
Non-Motion Control Commands 40-008
Non-Motion Control Commands (Table) 40-005
Not Capable (MAP) 15-060
Not Capable Conditions (Table) 15-064
NRZI
Cyclic Redundancy Check (CRC) (MAP) 17-590
Hi-Clip VRC (Write Only) 17-310
Read Data Bit. x Test Points (Table) 17-590
Read Data Flow 57 -006
R/W VRC. Hi Clip VRC. LRC Error 17-314
7-Track (Concepts) 40-002
9-Track (Concepts) 40-002
P Compare Error Test Points (Table) 17-013
P Comp Indicator (CE Panel) 75-004
P Compare or C Compare (Logic) 17-017
P Compare or C Compare Errors (MAP) 17 -01 0
Panel. CE 75-001
Panel Enable Switch 75-001
Parity Error. B Bus. ALU 1 16-030
Parity Error, B Bus. ALU2 16-100
Parity Indicator 75-003
Partial Record (MAP) 17-410
Partitioning (TCS Feature) 58-011
PaSSing Times per Byte (3420 Subsystem
Characteristics) 40-002
Passing Times. IBG (Subsystem Characteristics)
40-002
Patch Card
ALU1/ALU2 Card Location 52-104
General Description 52-103
Card Plugging Layout 52-104
PE or NRZI and GCR Velocity Checks/Changes (MAP)
16-180
PE Threshold Adjustment Card 80-000
PE. 1600 BPI (Concepts) 40-002
PE/6250 BPI CRC 17-540
Permanent Data Checks (MAP) 5A-105. 58-002
Permanent Read Error Scoping Offline 00-013
Permanent Read Error Scoping Online 00-014
Permanent Read /Write Error Analysis
Flow Chart 00-011
o
Offline Duplication of Online Failures (MAP) 12-001
OLT Error Messages Analysis 21-000
OLT -3420 F. G. H. Error Sense Analysis 21-000
One and Two Track 6250 Error Correction 17-600
Online and Offline Status (Concepts) 40-003
INDEX 6
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