89637700D_FA442 A_FA446 A_Tape_Controllers_Feb1977 89637700D FA442 A FA446 Tape Controllers Feb1977
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89637700
CO~OlDATA
CORfQIl<\1l0N
CONTROL DATA®
MAGNETIC TAPE TRANSPORT
CONTROLLERS
FA4'42-A, FA446-A
GENERAL DESCRIPTION
OPERATION AND PROGRAMMING
INSTALLATION AND CHECKOUT
THEORY OF OPERATION
DIAGRAMS
MAINTENANCE
PARTS DATA
WIRE LIST
GLOSSARY
-
"
HARDWARE MAINTENANCE MANUAL
REVISION RECORD
REVISION
01
(10/10/74)
A
(3/18/75 )
B
(12/15/75)
C
(6/10/76)
D
(Feb. 77)
DESCRIPTION
Released Class B ECO CK986.
Released Class A ECO CK1303. Previous revision is obsoleted. Combines ICL &LCTT Manuals.
ICL Manual was 89769500.
Page 3-1 Last Line: Table 3-1 Changed to 3-6 to match Page 3-3 Item 8. Page 3-3, Item 8:
Part Number 89724700 changed to 89724702 to match PIN given at bottom of Page 3-1. as per ECO CK1437.
Manual Revised: Pages ii, 5-7, 5-33, 5-61, 5-63, 5-69, 5-71, 5-73, 5-75, 5-79,5-81,5-82,
5-85,5-86,5-89,5-91,5-95,5-103,5-105,5-107,5-109, 8-3, 8-4, 8-5, 8-6, 8-7, 8-8, 8-9, 8-10
8-20, 8-22, 8-26, Released by ECO CK1524. To incorporate changes of ECO's CK1242, CK1360, CK1438,
CK1299, CK1343, CK1401, CK1473, CK1524, and CAR'S LJL 53, 100, 142, 143.
ECO CK 1693. Tape Interface (LCTT) logic corrected to match PWA 89881400 Rev B.
Affected
pages: 5-89, 5-95, 5-97, 5-99, 5-111. (CAR lJl191/510).
Manual to Equipment level Correlation Sheet page iii updated. Parts Data page 7-1 updated.
\
Publication No.
89637700
Address comments concerning this
manual to:
©
1974, 1975, 1976, 1977
by Control Data Corporation
Printed in the United States of America
ii
Control Data Corporation,
Publication and Graphic Division,
4455 East Gate Mall,
La Jolla, California 92037
or use Comment Sheet in the back of
this manual.
MANUAL TO EQUIPMENT LE VEL CORRELATION SHEET
EQUIPMENTS
SHEET.
·1 . OF .. ··1 ..
MAtlJAL
FCfc~CO
SERIES
SERIAL;
01
242
A02
01
603
A03
635
702
851
851
1118
1193
1343
707
707
A04
A05
A06
A07
A08
A09
A10
All
All
51-58
61-65
59,60
66-71
72
75-97
98-118
119-159
175-214
301 **
301
301
301
A02
A03
A04
A05
A06
A07
A08
A08
101-117
118-179
231-336
401-410
412-416
501-517
601-638
601-638
REV
01
01
01
01
01
AlBIC
AlBIC
AlBIC
D
~-..;.
MAN.
REV
FA442-A*
~--
-
FCO ECO
(CK)
~-- ~---
01
01
01
AlB
C
C
C
C
514
\
------FA446-A* SERIAL
SERIES
---_.---AOl
nla
~
D
887
887
1038
1299
1343
1315
1438
1438
.-
~
.
*FA442-A is the ICl NRZI Magnetic Tape Transport Controller.
FA446-A is the Modified NRZI lCTT Controller.
** Serial numbers 301 and up of FA442 were never shipped.
8963770 0
iii/iv
PREFACE
This manual provides customer engineering information for the
CONTROL DATA ® FA442-A NRZI and FA446-A NRZI - LCTT Magneti c
Tape Transport Controllers.
The controller is used with the AB107/AB108 Computer to control
either the 615-73/615-93 (NRZI) and the 6173/6193 (NRZI-LCTT)
Magnetic Tape Transports. The user of this equipment must be
familiar with the computer and magnetic tape transport equipment
and software with which these controllers are used.
The following CONTROL DATAUDpublications may be useful as
references:
Publication
Pub. No.
1732-2 NRZI Magnetic Tape Transport Controller
and Phase Encoding Formatter
Reference Manual
89637600
FV497-A/FV618-A Phase Encoding Formatter
Customer Engineering Manual
89796100
1748
89633400
Computer Refence Manual
AB107/AB108 Computer Customer
Engineering Manual
89633300
1/0 Specification Manual
89673100
System 17 Installation Manual
89637700 A
v
CONTENTS
Section
2
3
Page
GENERAL DESCRIPTION
Introduction
Interface
Terminator
1-2
1-2
OPERATION AND PROGRAMMING
Programming
Summary of Programming Information
Operations
Operations Defined by Q and Output from A
Operation Defined by Q and Input to A
Interrupts
Operation
2-1
2-1
2-3
2-3
2-13
2-19
2-20
INSTALLATION AND CHECKOUT
Installation
Checkout
3-1
3-11
89637700 A
1-1
vii
Section
4
viii
CONTENTS (Cont'd)
THEORY OF OPERATION
Functional Description
Introduction
General
Write Data Path
Read Data Path
Clock
Reply/Reject Timing
Basic Timing Generator
Reply Conditions
Execution Strobes
Unit Select
Operating Conditions
Control Function
Clear Controller
Interrupt
Motion Function
Motion Register and Decoder
Gap Counter
End of Operation
Motion Sequencer
Write Control
First Word
Write FM
End-Of-Record Sequence
Read Control
Search FM
End-Of-Detector
Character Redundancy Check Character (CRCC)
Longitudinal Redundancy Character Check (LRCC)
Status
Ready Status
Busy Status
Lost Data Status
Protect Status
Parity Error Status
Beginning of Tape/End of Tape (B0T/E0T)
Fill
Page
4-1
4-1
4-2
4-5
4-6
4-6
4-6
4-8
4-10
4-11
4-11
4-12
4-12
4-13
4-13
4-14
4-14
4-14
4-15
4-16
4-16
4-18
4-18
4-18
4-181
4-19
4-20
4-20
4-20
4-21
4-21
4-21
4-21
4-22
4-22
4-22
4-22
(CONT. )
89637700 A
CONTENTS (Cont'd )
Section
5
LOGIC DIAGRAMS
Key to Logic Symbols
Signal Flow
Off-Sheet Continuation Referencp. Symbols
Test Points
Connecting and Non-Connecting Lines
Connectors
Q Channel PWB Logic
Clock and Reply/Reject Logie
Operation Decoder
Double Buffer &Data Control
Data Circuit
End-Of Record Generator Control and Stop Distance
Buffered I/O and Scanner
Request/Resume Logic
Lower Data Section
Basic Timing Generator
Operation Conditions
Interrupts
Lower DSA Data Path
Lower A Data Path
Upper Data Section
Gap timing Generator
Motion Function Execution
Upper DSA Data Path
Upper A Data Path
Unit Select Circuit and Leqa1 Control Function Decoder
Tape Interface PWA
CRC Generator/Detector
nata Strobe/EaR Detector
LRC Detector
Parity Error/Fil1/FM Detector
MTI/PE Vlrite Data Path
MTT/PE Read Data Path and Rewind Transmitter
89637700 A
Page
5-1
5-1
5-1
5-2
5-2
5-2
5-3
5-3
5-10
5-16
5-20
5-24
5-28
5-32
5-34
5-34
5-40
5-46
5-48
5-54
5-60
5-60
5-64
5-72
5-76
5-82
5-86
5-86
5-92
5-96
5-98
5-100
5-108
ix
CONTENTS (Cont'd)
Section
6
7
8
9
x
Page
MAINTENANCE
Scope
Tools and Special Equipment
Maintenance
6-1
6-1
6-1
PARTS DATA
Parts Data
7-1
LISTS
l~i re Lists
8-1
~IIRE
GLOSSARY
9-1
89637700 A
LIST OF FIGURES
Page
Figure
2-1
2-2
2-3
3-1
3-2
3-3
4-1
4-2
4-3
Format of Q-Register
Control Function for A-Register
Unit Select for A-Register
Location of MTT Controller in Main Enclosure
Q-Channe1 Showing Jumper Plug Positions
Lower Data Section PWB showing Jumper Plug Positions
Basic Configuration
Controller Block Diagram
Basic Timing Generator Pulses
2-2
2-5
2-5
a-5
3-7
3-9
4-1
4-3
4-9
4-4
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
5-14
Motion Sequence
Clock-Time Sequence
Reply/Reject Sequence
Q-Channel Logic Diagram Refer~nce Sheet
Q-Channel Clock and Reply/Rejp.c-t Lnaic Diagram
Q-Channel Operation Decoder Logic Diagram
Q-Channel Operation Decoder Logic Diagram (Cont'd)
Double Buffer Control
Q-Channel Double Buffer and Data Control Logic Diagram
Lockout
Q-Channel Data Circuit Logic Diagram
EOR Sequences
CRCC/LRCC state
Stop Distance
Q-Channel End of Record Generator Control and Stop Distance
Logic Diagram
Scan Control
Q-Channel Buffered I/O and Scanner Logic Diagram
Q-Channel Request Resume Logic Diagram
T1-T3 Output
2FWC Generation
Early WDS, Write ClK and WDS Shifted Generation
lower Data Section Logic Diagram Reference Sheet
4-17
5-3
5-5
5-7
5-9
5-13
5-15
5-16
5-19
5-21
5-23
5-24
5-25
5-26
5-15
5-16
5-17
5-18
5-19
5-20
5-21
5-27
5-28
5-31
5-33
5-34
5-35
5-36
5-37
(CONT. )
89637700 A
xi
LIST OF FIGURES (Cont'd)
Figure
5-22
5-23
5-24
5-25
5-26
5-27
5-28
5-29
5-30
5-31
5-32
5-33
5-34
5-35
5-36
5-37
5-38
5-39
5-40
5-41
5-42
5-43
5-44
5-45
5-46
5-47
5-48
5-49
5-50
Page
. Lower Data Section Basic Timing Generator Logic Diagram
Lower Data Section Operation Conditions Logic Diagram
Lower Data Section Operation Conditions Logic piagram (Cont'd)
Lower Data Section Interrupts Logic Diagram
Lower DSA Data Path
Lower Data Section Lower DSA Data Path Logic Diagram
Lower Data Section Lower DSA Data Path Logic Diagram (Cont'd)
Lower A Data Path
Lower Data Section Lower A Data Path Logic Diagram
Lower Data Section Lower A Data Path Loqic Diagram (Cont'd)
Upper Data Section Logic Diagram Reference Sheet
Upper Data Section Gap Timing Generator Logic Diagram
Motion Function Control
Motion Sequencer Control
Normal Motion Operation
Non-stop Motion Operation
Upper Data Section Motion Function Execution Logic Diagram
Upper Data Section Motion Function Execution Logic Diagram
(Cont'd)
Upper DSA Data Path
Upper Data Section Upper DSA Data Path Logic Diagram
Upper Data Section Upper DSA Data Path Logic Diagram (Cont'd)
Upper A Data Path
Upper Data Section Upper A Data Path Logic Diagram
Upper Data Section Upper A Data Path Logic Diagram (Cont'd)
Unit Selection
Upper Data Section Unit Select Circuit and Legal Control
Function Decoder Logic Diagram
Tape Interface Logic Diagram Reference Sheet
Tape Interface CRC Generator Detector Logic Diagram
Data Strobe Generator
5-39
5-43
5-45
5-47
5-49
5-51
5-53
5-55
5-57
5-59
5-61
5-63
5-65
5-65
5-67
5-68
5-69
5-7Q
5-72
5-73
5-75
5-77
5-79
5-81
5-82
5-85
5-89
5-91
5-92
(CONT. )
xii
89637700 A
LIST OF FIGURES (Cont'd)
Page
Figure
t1
'-.
5-51
5-52
5-53
5-54
5-55
5-56
5-57
5-58
5-59
5-60
5-61
8-1
5.. 93
Normal Strobed Data
Tape Interface Data Strobe/EOR Detector Logic Diagram
5-95
Tape Interface LRC Detector Logic Diagram
5-97
Tape Interface Parity Error/Fill/FM Detector Logic Diagram
5-99
MTT/PE Write Data Path
5-100
Tape Interface MTT/PE Write Data Path Logic Diagram
5-103
Tape Interface MTT/PE Write Data Path Logic Diag. (Cont'd 1) 5-105
Tape Interface MTT/PE Write Data Path Logic Diag. (Cont'd 2) 5-107
MTT/PE Read Data Path
5-108
Tape Interface MTT/PE Read Data Path Logic Diagram
5-109
5-111
Tape Interface Logic Diagram Reference Sheet (Cont'd)
MTT Cable Placement
8-2
LIST OF TABLES
Table
"-
"-
1-1
2-1
2-2
2-3
2-4
2-5
2-6
~!-7
"-
"-
-
3-1
3-2
3-3
3-4
Page
Specifications
Hexadecimal Code For Controller Addresses
MTTC Operations
Motion Control
Non-stop Motion Transition
Tape Unit Select Codes
Director Status 1 Response Bits
Director Status 2 Response Bits
MTTC PW Board Locations
Jumper Plug Locations
Internal Selections on Q-Channel PWA
Equipment Number Representation
1-2
2-3
2-4
2-7
2-9
2-10
2-14
2-14
3-4
3-4
3-6
3-6
"'-
89637700 A
xiii
LIST OF TABLES (Cont'd)
Table
3-5
3-6
4-1
4-2
4-3
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
8-1
8-2
8-3
8-4
8-5
8-6
8-7
8-8
8-9
8-10
xiv
Internal Selections on Lower Data Section PWA
Interrupt Cable Positions
Density-Modulations
Timing Generator Frequencies
Gap Counter
Computer Instruction Execution
Timing Generator Outputs
Write Clock Frequencies (FWC) at U5-6
Pre-Gap - Post-Gap Counts
Data/CRCC Relationship
CRCC and LRCC Checks
Pari ty State
FM Constants
Wire List - FA442-A NRZI MTTC to MTT
\~i re List - FA446-A LCTT MTTC to MTT
Pin List - Q-Channel Input Signals
Pin List - Q-Channel Output Signals
Pin List - Lower Data Section Input Signals
Pin List - Lower Data Section Output Signals
Pin List - Tape Interface Input Signals
Pin List - Tape Interface Output Signals
Pin List - Upper Data Section Input Signals
Pin List - Upper Data Section Output Signals
Page
3-8
3-10
4-5
4-8
4-15
5-11
5-34
5-35
5-60
5-86
5-96
5-98
5-101
8-3
8-7
8-11
8-13
8-15
8-17
8-19
8-21
8-23
8-25
89637700 A
SECTION 1
GENERAL DESCRIPTION
INTRODUCTION
This sect~on contains a general description of the CONTROL DATA (l{ FA442-A
NRZI and FA446-A NRZI-LCTT Magnetic Tape Transport Controllers.
The FA442-A NRZI Magnetic Tape Transport Controller is capable of handling
up as many as four ICL Corporation model 11 NRZI Magnetic Tape Transports
(MTTls) in daisy chain. The FA442-A can control these MTTls in 37.5 or
75 ips, 556 or 800 bpi configuration in any combination or singly.
The FA446-A NRZI-LCTT Magnetic Tape Transport Controller is capable of
handling four modified CPI LCTT magnetic tape transports operating at 25
or 50 ips, 556 or 800 bpi in any combination (or singal1y). When more
than one CPI MTT is used with this controller, a Pertec Corporation
compatible translator board must be used and the controllers must be
connected in daisy chain.
Each magnetic tape transport controller (MTTC) contains the logic that
interprets the AB107/AB10B Central Processing Unit (CPU) function codes,
controls t~e magnetic tape transport (MTT) operations, assembles and
disassembles l6-bit words between the CPU and the MTT, and provides the
status information to the CPU. The communication between the controller and
the CPU is via the A/Q channel and the Direct Storage Access (DSA) channel.
Each MTTC may control as many as four MTTls in a daisy chain configuration.
The controller logic for each controller is mounted on four N-PAK Printed
Wiring Boards (PWBls). The boards may be mounted in either the AB107/AB10B
Computer Main Enclosure or the BT14B-A Expansion Enclosure. Power for these
controllers is provided by the power supplies of each enclosure.
89637700 A
1-1
TABLE 1-1. SPECIFICATIONS
(Each PWB )
~.---------~--.----------------~----------------------------~
Specifications
Explanation
PHYSICAL CHARACTERISTICS
Dimensions
Width
613
Ib inches
12 ~ inches
Length
~ inches
Depth
ENVIRONMENT
Temperature
Shipping
-40°F ~o lSS oF (-40°C
to 70 C)
140 F to 122°F (10°C
to 50°C)
40 0 b to 1200 F (SoC to
50 C)
Storage
Operating
Humidity
Shipping
Storage
Operating
o to
100% RH non-condensing
10% to 90% RH non-condensing
10% to 90% RH non-condensing
POWER
Input Requirements
Signal Level
Low State (O)
High State (1)
Ground
5 Volts dc
0.4 Volts dc. or less
2.4 Volts dc, or more
Logic ground is connected
to computer logic ground
!
.-----+L-..-..--.-----------_----I
1-2
89637700 A
INTERFACE
A single cable is used to connect either controller with the
first transport, while each transport has two identical interconnection plugs to enable daisy chain interconnection.
Figure 4-1 shows a typical transport to controller configuration. The interconnecting cable assembly between the
controller and the first transport is 20 feet long. The
standard cable assembly between each additional transport
is 10 feet long. The cables required for operation of the
controller are listed in Section 8 (Parts Data).
TERMINATOR
When operating in daisy chain configuration, a terminator
(CDC PIN 46338700) is required. The terminator must be placed
on the last MTT unit in the daisy chain.
89637700 A
1-3
SECTION 2
OPERATION AND PROGRAMMING
PROGRAHMING
SUM~~RY
OF PROGRAMMING INFORMATION
Tables 2-1 through 2-9 and Figures 2-1 through 2-5 provide the experienced
operator with the information necessary to program the magnetic tape
transport controller (MTTC).
The following paragraphs further define this
information.
The MTTC communicates with the AB107/AB108 processor via the computer A/Q
channel and DSA channel .
The Q-register designates the equipment to be referenced and directs the
operation to be performed upon the input or output instruction execution.
Figure 2- 1 illustrates the format of the Q-register:
Bits 11-15 must always be zero.
Bits 7-10 select the MTTC; these bits must match the equipment number
of the controller.
Bits 2-6 are ignored.
Bits 0-1 (the Director) specify an operation according to Table 2-2.
The MTTC has two modes of operation:
1)
Di rect:
Operation is initiated and data is transferred via the A/Q channel.
Direct transfer is accomplished in the following sequence:
89637700 A
1.
Control Function (Read Motion and Write Motion).
2.
Input to A or Output from A instruction for every data word.
2-1
2)
Buffered:
Operation is initiated through the A/Q, and data transfer is via the
DSA.
Buffered I/O transfer is accomplished by issuing the following
sequence:
1 . Buffered I/O instruction
(Controller fetches LWA+1 from FWA-1 and waits)
2.
Control Function (Read Motion or Write Motion)
instruction. Read Data transfer starts when data
block moves under the Read head.
Write Data transfer starts when pre-record gap has
passed under the Write head.
; U5
W
II
10
2 I
E
0
W:I W FIELD=O
E:I EQU.MENT HUM.'"
D :I DIRICTO"
Figure 2-1.
Addresses
2-2
Format of Q-Register
The W= 0 signal plus bits 10-7 of the Q-register are used to
select the MTTC. The Wfield of Q is always loaded with
zeros. Bits 0-1 of Q are used to specify an operation.
Figure 2-1 illustrates the format of the Q-Register.
Table 2-1 lists the values of E required to select a MTTC
with a given Equipment Number setting.
89637700 A
TABLE 2-1.
Hexadecimal
code
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
HEXADECIMAL CODE FOR CONTROLLER ADDRESSES
Jumper Plugs
Q10 Q9 Q8 Q7
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
0
0
1
1
1
1
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
1
1
0
1
1
0
0
1
1
1
1
0
1
0
Note:
A 11111 in the binary code
indicates the presence of
a jumper plug for the
setting of the equipment
code and a 110" indicates
its absence.
1
1
Bits 10-7 of the A-register are used a1on~ with the contents of
Q and Output from A to select a tape transport. (See Unit Select).
OPERATIONS
The D field of Q is combined with an AB107/AB108 Input from A or Outpu·
from A instruction to specify an operation (see Table 2-2). The
operations initiated by an Output from A may be further modified
by the contents of the A-re~ister (see Table 2-3, Fi9ures 2-2
and 2-3). The following paragraphs define these operations.
Operations Defined by Q and Output from A
Write: A Write transfers data from the computer to the controller
which generates a parity bit and writes the data plus parity bit on
the tape. To perform a Write, load Q with W= 00*, E = equipment
number setting of desired MTTC controller and D = 00.
*W is written as two digits; the left, binary; the right, hexadecimal.
89637700 A
2-3
An Output from A instruction intiates the transfer of the
computer word to the tape. Any number of consecutive
characters sent to the tape are written (along with a parity
bit) on the tape as a single record. Whenever the computer
breaks the continuity of the computer word outputs, the
controller initiates an End-of-Record sequence. A Write is
rejected if Not Ready, Write Motion has not been initiated,
Data Status is not set, if Buffered I/O is set or a Program
Protect fault occurs. If no new Control Function is
received from the computer, tape motion stops at the next
interrecord gap.
TABLE 2-2.
MTTC OPERATIONS
Computer Instruction
D
00
01
10
11
Output from A
Input to A
Write
Control Function
Unit Select
Buffered Input/Output
Pead
Di rector Status 1
Director Status 2
Current Address
Control Function: The Control Function specifies operating
conditions for the selected controller and transport and
initiates tape motion. To perform a Control Function, load Q
with W=OO, E=Equipment Number, and 0=01. Load A according to
Figure 2-2 and Table 2-3. and execute an Output from A.
2-4
89637700 A
~IO
'
.
Ul!
LCLEAR CONTROLLER
~CLEAR INTERRUPT
.
DATA INTERRUPT REQUEST
END OF OPERATION INTERRUPT REQUST
ALARM INTERRUPT REQUEST
NOT USED
~---
MOTION CONTROL
USED
~-------NOT
Control Function for A-Register
Figure 2-2.
_'2111110~8
71 1H312111 1
6 5
0
I ~~~HARACTER
~
BINARY
SELECT 800 BPI
SELECT !S&6 BP I
SELECT 1600 BPI
ASSEM BLY/DISASSEMBLY
TAPE UNIT 0-3
~---
SELECT TAPE UNIT
' - - - - - DESELECT TAPE UNIT
~--.........
',-
_-/
SELECT
LOW READ THRESHOLD
(RTH2)
(ICL ONLY)
,
Figure 2-3.
89637700 A
Unit Select for A-Register
2-5
If bits 7-10 of A equal zero, the control function is rejected only
if a protect fault occurs. Otherwise the controller rejects control
functions if it is Not Ready, the End-of-Operation status condition
is not present. an illegal code exists in bits 7-10 of A, the tape
transport is Busy or if a protect fault occurs. Control Function is
not rejected if it is issued after EOP status is set and same motion
direction is requested and same data transfer direction (Read or
Write) is requested (see Table 2-3). Write Motion or Write FM/TM
is rejected if the File Protect Ring is absent.
Table 2-3 lists the legal motion control codes. Master clears the
MTTC,any or all Clear and Interrupt selections may be selected
simultaneously or individually. The requests are honored in this
order: Clears, Interrupt selections and Motion Control.
A New Motion Function clears EOP, Alarm and all causes for Alarm.
The following describes these codes:
1) Clear Controller (AOO = 1) - Master clears the MTCC.
with the followinq exceptions: Unit Select, Mode Select,
Code Select and Format Select.
2-6
2)
Clear Interrupt (AOl = 1) - Clears all interruptd and
interrupt requests. If an interrupt request is coded
alon~ with a Clear Interrupt, that selection is
honored, but any previous selections are cleared.
3)
Data Interrupt Request (A02 = 1) - causes an interrupt
to be generated when an information transfer through A/Q
channel may occur. The interrupt response is cleared by
the Reply to the data transfer. The request and response
are cleared by a Clear Controller or a Clear Interrupt
code.
4)
End-of-Operation Interrupt Request (A03 =1) - causes an
interrupt to be generated at the end of an operation. The
request and response are cleared by a Clear Controller or
a Clear Interrupt code.
89637700 A
5) Alarm Interrupt Request (A04 = 1) - causes an interrupt to be
generated upon a condition which warrants proqram or operator
attention. The Alarm Interrupt is generated by any of the
following conditions:
1.
2.
3.
4.
5.
6)
End-of-Tape
Parity Error
Lost Data
File Mark/Tape Mark
The controller goes
Not Ready during an
operation.
b.
7.
8.
9.
10.
Storage Parity Error
Protect Fault
ID - Abort
PE - Lost Data
PE - Warning
Write Motion (A10.A07 = 0001) initiates Write Motion if
Buffered Input/Output is not set, the Data Status goes true
which initiates Direct Data Output. If Buffer I/O is set,
Write Motion initiates Buffered Output. Write Motion is
terminated (EOP set) when End-of-Record is detected by the
Read head.
If buffered I/O is not set, Write Motion is selected and no
data transfer follows, the controller locks out and terminates
the Write Motion function when it is time to write the first
character on tape. Forward drops to the selected transport
and the transport goes Not Busy, but no End-of-Operation is
generated. To recover from this error condition, a Unit
Select or Clear Controller function can be issued to ,accept
another motion function.
TABLE 2-3 MOTION CONTROL
Bits 10-7
of A
0001
0010
0011
0101
0110
0111
1000
1100
89637700 A
Moti on Functi on
Write Motion
Read Motion
Backspace
Write File Mark/Tape Mark
Search File Mark/Tape Mark Forward
Search File Mark/Tape Mark Backward
Rewind Load
Rewind Unload (LCTT Only)
2-7
7)
Read Motion (A10~A07 = 0010) - initiates Direct or
Buffered Data input .. Read Motion terminates by absence of
data from the magnetic tape transport. If the computer
stops requesting characters, data transfer stops, but the
tape continues to move to the end of the record. If a data
transfer request is not received by the controller in time
to complete the transfer properly, the Lost Data status bit
is set and subsequent data requests are rejected. If a File
Mark is encountered the File Mark status bit is set.
8)
Backspace (A10-A07 = 0011) - moves tape backward one record.
Backspace from Load Point is not rejected (however the tape
will not move) and non-stop backspace is possible.
9)
Write File Mark (A10-A07 = 0101) - moves tape forward.
approximately 6 inches and writes a File Mark. The normal
End-of-Operation sequence follows the File Mark. writing
the longitudinal check character. *
10) Search File Mark Forward (Al9-A07 = 0110) moves tape
forward until a File Mark is detected; an End-of-Operation
(EOP) is generated and tape motion stops.
* A parity error is indicated together with File Mark status if the
MTTC is operating in binary format (seven and nine track).
2-8
89637700 A
11)
Search File Mark Backward (A10-A07 = 0111) - moves tape
backward until a File Mark is detected. When it has
been detected, an End-of-Operation is generated, and
tape motion stops. If no File Mark is detected, an
End-Of-Operation will be generated and motion will stop
at Load Point.
12)
Rewind Load (A10-A07 = 1000) - rewinds tape at high
speed to Load Point. The controller remains Busy until
tape is positioned at load point and End-of-Operation
Status/Interrupt occurs. The MTTC stays Ready upon
acceptance of this command.
13)
Rewind Unload (A10-A07 = 1100) - rewinds tape to Load
Point and unloads. The tape transport becomes Not Ready
upon acceptance of the command. Manual intervention is
required to reload the tape and place the transport in a
Ready condition. (For LCTT only).
Non-Stop Motion: Table 2-4 shows transition time in which a
New Motion Function must be initiated to achieve Non-Stop
Motion after End-of-Operation Status/Interrupt occurs.
TABLE 2-4.
ICL
NON-STOP MOTION TRANSITION
Transition Time
I
Speed
Write Forward
Read Forwa rd
Backspace or'
S.F.B.
37.5 ips
2.7 msec
2.0 msec
2.7 msec
LCTT 25
ips
3.6 msec
2.6 msec
2.6 msec
LCTT 50
ips
1.8 msec
0.5 msec
0.5 msec
te Forward
2. Write
File Mark
1 . Read Forward
1. Backspace
2. Search
File Mark
Backward
Alternative
for next
Control
Function
89637700 A
1.
t~ri
2. Search
File Mark
Forward
2-9
<.
Unit Select: A Unit Select selects a tape transport and its
operating conditions or deselects a transport. To perform a Unit
Select, load Q with W= 00, E = equipment number, n = 10. Load A
according to Figure 2-3 and Table 2-5, and do an Output from A.
Tape unit, density, and mode (BCD or binary) can be selected
simultaneously or individually. Unit Select is rejected if
Controller Active or a Program Protect fault occurs or if an
illegal code is selected (for example, two densities chosen) or
selection does not match the tape transport or controller settings.
Unit Select clears the controller.
Note:
After MC, density must be selected again.
TABLE 2-5.
TAPE UNIT SELECT CODES
Bits 9-7
Of A
Unit Select Jumper
Setting
000
001
010
all
a
1
2
3
1) Character (AO = 1) - In this format the computer word consists
of the lower 6 or 8 bits only. Master Clear sets character
fonnat.
2)
BCD (A01
only) .
= 1) Data is read or written in even parity (615-73
3) Binary (.A02 = 1) Data is read or written in odd parity. Master
Clear sets Binary code. Binary is selected if BCD is not selected.
4) Select 800 bpi (A03 = 1) Data is recorded at a density of 800
bits per inch. MC sets 800 bpi.
5) Select 556 bpi (A04
bits per inch.
2-10
= 1) Data is recorded at a density of 556
89637700 A
6)
Select 1600 bpi (A05 = 1) - Data is recorded at a density of
1600 bits per inch in the PE format. This bit can only be
used with the PE Formatter.
7)
Assembly/Disassembly Mode (A06 = 1) - In this format the
computer word consists of 12 or 16 bits which, during a
Write, are disassembled into two 6-or 8-bit tape words.
During a Read, the tape words are assembled into the original
computer word.
8)
Tape Unit 0-7 (A09 = 1) - This code matches the Unit Select
setting of the desired transport.
9)
Select Tape Unit (A10 = 1) - This code and bits 9-7 of A
selects a tape transport.
10.
Deselect Tape Unit (All = 1) - This bit disconnects a tape
transport that is selected and protected, thus allowing an
unprotected program access to the controller. Deselect Tape
Unit must be a singular type function. Master Clear deselects
a 11 un its.
11.'
Select Low Read Threshold (A12 = 1) - This bit is used to
select the low read threshold level used for data recovery.
Used for ICL only.
The controller reverts to normal read threshold when:
(a)
The Unit-Select function contains A12 = O.
(b)
After any EOP.
(c)
Master Clear.
Buffered Input/Output: A Buffered I/O instruction initiates the
transfer of data between the controller and the computer memory
via the DSA. To execute Buffered I/O, load Q with W=OO, E=
equipment number and D=ll. Load A with the first word address
minus one (FWA-l) which contains the last address plus one (LWA+l),
'---
89637700 A
2-11
An Output from A instruction transfers the FWA-l and LWA+l into
the controller (via the A/Q and DSA respectively).
The transfer of data will start after Write or Read Motion. The
data transfer will terminate when current word address equals
L~A+l, or when reading the End-of-Record is sensed.
Lost Data
conditions will occur when the DSA does not keep up the transfer
rate.
A Buffered I/O instruction is rejected if EOP status is not set
and Busy is set, the tape transport is not ready or a Program
Protect Fault occurs.
2-12
89637700 A
Operation Defined by Q and Input to A
Read (0 = 00): A Read operation transfers data from tape to the
computer and checks parity. To perform a Read, load Q with 1r = 00,
E = equipment number, and D = 00. An Input to A initiates the
transfer of one 6-, 8-. 12- or 16-bit character to the lower bits of
the A-register.
The controller transfers characters to the computer until the computer
stops requesting characters, or until the controller senses the end
of a record. If the computer stops requesting characters, data
transfer to the computer stops, but tape motion continues until the
end of the record. A Read is rejected if the controller is Not
Ready, read motion has not been set. data status is not set, a
Program Protect fault occurs, or a Buffered I/O operation is in process.
Director Status 1 (D = 01): Director status 1 is a status request
which loads into the A-register a status reply word showino the
current operating conditions of the MTTe. The request is initiated
by loading Q with W= 00, E = equipment number, D = 01, and executing
an Input to A. Table 2-6 describes the contents of A-register
following the execution of this function. The Status Response section
defines these bits.
Director Status 2 (D = 10): Director Status 2 is a status request
which loads the A-register a status reply word of the MTTe. The
request is initiated by loading Q with W= 00, E = equipment
number, D = 10, and executing an Input to A. Table 2-7 describes the
contents of A-register following the execution of this function.
The Status Response section defines these bits .
.
~.
89637700 A
2-13
Current Address (0 = 11): This instruction is a status
which loads into the A-register the address of the next word
being transferred. To perform a Current Address, load Q with
W= DO, E = equipment number and 0 = 11, and initiates an
Input to A.
Status Response
Director Status 1
Table 2-6 lists the meaning of bits set in the A-register
following a Status 1 request. These bits are further defined
below.
Ready (ADO = 1): The tape transport is connected to the
equipment and the tape system can perform a command.
Busy (A01 = 1): Equipment is in motion. The MTTC becomes
Busy before a Reply is returned if a function can be performed.
Interrupt (A02 = 1): An interrupt condition exists and
interrupt upon this condition has been selected. This bit is
cleared when the interrupt is cleared.
Data (A03 = 1): A Read/Write data transfer can now be
performed. It is cleared by a data transfer request. Lost
Data or End-of-Record sequence.
End-of-Operation (A04 = 1): A new tape function can now be
accepted. This bit sets at the completion of all tape motion
function except Rewind Unload. During Read and Write,.
End-of-Operation (EOP) signifies that parity status is valid.
Master Clear clears EOP. A New Motion Function can also be
used to clear EOP.
2-14
89637700 A
!
TABLE 2-6. DIRECTOR STATUS 1 RESPONSE BITS
Bit Set In A-Register
Meaning
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Ready
Busy
Interrupt
Data
End-of-Operation
Alarm
Lost Data
Protected
Pari ty Error
End-of-Tape
BOT
File Mark
Controller Active
Fi 11
Storage Parity Error
Protect Fault
TABLE 2-7 . DIRECTOR STATUS 2 RESPONSE BITS
Meaning
Bit Set in A-Register
0
1
2
3
4
5
6
7
8
9
10
89637700 A
556 bpi
800 bpi
1600 bpi
Seven Track
Write Enable
PE-~~arni ng
PE-Lost Data
PE-Transport
ID-Abort
Low Read Threshold (For LCTT only)
(Not Used)
2-15
Alarm (AD5 =1): This status bit monitors those conditions requiring
the attention of the program or the operator. The following conditions
set this bit as well as their own status bit:
1)
2)
3)
4)
5)
6) Storage Parity Error
End-of-Tape
7) Protect Fault
Parity Error
8) 10 - Abort
Lost Data
9) PE - Lost Data
File Mark
The Controller goes Not Ready 10) PE - Warning
during an operation
A New Motion Function or Clear Controller will clear Alarm.
Lost Data (A06 = 1): This bit indicates during an A/Q Read transfer
that the Data Transfer register was not empty when a new frame of data
was received from the tape transport. This clears Data Status and
Data Interrupt.
This bit indicated during a Buffered I/O transfer that the computer's
DSA bus has not been able to keep up to the MTTC data transfer rate.
During Buffered Output it initiates an End-of-Record sequence. During
Buffered Input it stops data transfer. A New Motion Function clears
Lost Data.
Protected (A07 =1): This bit indicates that the Program Protect Jumper
Plug of the selected tape transport is set.
Parity Error (A08 =1): An error was detected during data transfer, or the
controller has read or written a File r1ark in binary mode; or done a
Read operation in the wrong mode or density. The parity check is
complete and a Parity Error status is valid at end of operation.
Parity is not checked on Backspace. This condition responds to
transverse, longitudinal and cyclic redundancy parity errors. When
reading PE tapes this bit indicates a Parity Error only when no dropout
is detected. Parity error is cleared by issuin~ a New Motion Function.
2-16
~qf;37700
A
End-of-Tape(A09 = 1): An End-of-Tape (EDT) marker has been sensed.
A New Motion Function clears EDT.
Load Point (A10
= 1): The tape Load Point has been sensed.
File Mark (All = 1): A File Mark has been sensed.
cleared on a New Motion Function.
It is
Active (A12 = 1): MTT Controller is active controlling
tape motion.
Contro11e~
Fill (A13 = 1): If an odd number of tape words is read, this status
will be set to indicate that the lower portion of the Read word is
not a tape word. A New Motion Function clears Fill.
Storage Parity Error (A14 = 1): Storage Parity Error has occurred
during a DSA channel transfer. A MTT controller New Motion Function
clears Storage Parity Error.
Protect Fault (A15 = 1): The computer's Protect Fault flag was
active during a MIT controller-DSA channel transfer New Motion
Function clears Protect Fault.
\
~
b9637700 A
2-17
Director Status 2
Table 2-7 lists the meaning of bits set in the A-register following a
Status 2 request. These bits are further defined below:
556 bpi (AOO =1): The selected tape unit is set to operate at a
density of 556 bits per inch.
800 bpi (A01 =1): The selected tape unit is set to operate at a
density of 800 bits per inch.
Seven Track (A03 = 1): The selected tape unit is a seven-track transport.
This bit should always be set when a seven-track MTT is selected and
never be set when a nine-track MTT is se1ect~d.
Write Enable (A04 = 1): The File Protect ring is in the supply reel
and the tape has been loaded. Write operations may now be perfonned.
PE Transport(A05 = 1): Selected transport (nine-track MTT only) can
record 1600 bpi density and the PE Fonnatter is in.
The following status bits may be active only wlth the PE Formatter
installed.
1600 bpi (A02 = 1): The selected tape unit (nine-track MTT only) is
set to operate at a density of 1600 bits per inch.
PE-Warning(A05 = 1): This bit indicates an error in the PE Formatter
which did not affect the data transfer. The following conditions
set this bit:
a) Corrected Dropout; one dropout occurred during reading of present
record.
b) Wrong Postamb1e; Postamb1e exceeds 48 zeros or contains ones.
This is cleared by a New Motion Function.
PE-Lost Data (A06 =1): This bit indicates an error in the PE formatter
which affected the data transfer. The following conditions set this
bit:
a) skew buffer overflow
b) multitrack dropout
c) preamble format error
2-18
89637700 A
10 Abort (A08 = 1): 1600 bpi was selected (nine-track MTT only)
but no Identification burst was detected after starting of tape
motion from B0T. 10 Abort triggers Alarm and tape motion is
stopped. Operation will continue after issuing a New Motion
Function.
INTERRUPTS
Interrupts are selected by the Control Function.
cleared by:
89637700 A
They may be
1)
Issuing a Clear Interrupt which clears both the Interrupt
request and the interrupt.
2)
Re-issuing the Interrupt Request except for the Alarm
Interrupt when the Alarm condition still exists, e.g.,
End-of-Tape.
3)
Issuing a Clear Controller.
4)
Transferring data in the case of the data interrupt.
5)
Rese1ecting a unit.
2-19
OPERATION
The jumper plugs indicated herein are located as shown in Tables 3-2 through
3-5 and in Figures 3-2 and 3-3. The PWA's on which the jumper plugs may be
installed can be accessed by opening the front door of the computer enclosure.
The jumper plug positions are located on two of the controller PWA~s as indicated below.
On the Q-Channel PWA (installed in enclosure position
12)
EQUIPMENT NUMBER JUMPER PLUG
These four jumper plugs are used to represent any number from 0 to 15 10 .
They are used to assign an equipment to the MTTC. Any instruction sent by
the computer must be accompanied by an equipment number (bits Q10 through Q07
matches the settings of the jumper plugs). The position is set if the jumper
plug is inserted.
SCANNER JUMPER PLUG
When performing maintenance operations and for initial installation of the
controller, the Scanner jumper plug should be installed in one of tne four
positions indicated below:
1)
2)
3)
4)
Middle
First
Last
One
These names reflect the controller's position within the DSA bus.
wi th the sys tern.
This varies
On the Lower Data Section PWA (installed in Location 13):
PROTECT ON/OFF JUMPER PLUGS
There are four jumper plugs; one per tape transport. When any tape transport
is selected, the presence of this jumper allows only protected instructions
(except status requests) to access the MTTC.
If a buffered input is initiated by a Protected instruction, a Protect signal
is sent to the computer allowing data to be written into any storage location.
2-20
89637700 A .
SPEED SELECT JUMPER PLUGS
There are four jumper plugs; one per tape transport. These jumpers should
be set according to the speed of the corresponding tape transport - either
high speed (50 ips for ICL and 75 ips for LeTT) or low speed (25 ips and
37.5 ips for LCTT). With the jumper plug inserted, tape speed is high speed.
TRACK SELECT JUMPER PLUGS
There are four jumper plugs; one per tape transport. These jumpers should
be set according to the track type (seven-track or nine-track) of the
corresponding tape transport. With the jumper inserted, th~ nine-track tape
is selected.
MODULATION SELECT JUMPER PLUGS
There are four jumper plugs; one per tape transport. These jumpers should be
set according to the capability of the tape transport - either NRZI or PE
(provided nine-track and Not Dual Mode are selected.
DUAL MODE JUMPER PLUGS
There are four jumper plugs; one per tape transport. These jumpers must be
inserted when the MTT is capable of dual mode operation (NRZI/PE) provided
the Track Select jumper plugs are also set to nine-track.
89637780 A
2-21
SECTION 3
INSTALLATION AND CHECKOUT
INSTALLATION
UNPACKING
1.
Carefully remove wrapping from the controller cards. Gheck for
physical damage to each card and record damage on the packing list.
Check that part numbers agree with parts list.
2.
Remove wrapping from cables and check for physical damage. Record
damage on packing list. Check that part numbers agree with packing
list.
PHYSICAL LIMITATIONS
Care must be taken to prevent damage to the controller cards.
not be flexed, bent or dropped.
The cards must
POWER REQUIREMENTS
The controller cards require +5 vdc derived from the power supply of the.
computer.
CABLING AND CONNECTORS
'.'-.
An external interconnecting cable is available for use with the controller
for connection between the computer and the first tape transport. The
ext~rna1 cable is 20 feet long (part number 89775500 for ICL MTT or
89899000 LCTT MTT).
The two
internal cables (part number 89700200 for either the ICL or LCTT
,
MTTC) used between the back of the computer and the connector panel on the
ba~kplane, are 18 inches long.
The interrupt cable (part number 89724702) is 13.8 inches long.
Table 3-6 for pin assignments.
89637700 B.
Refer to
3-1
The last tape transport must be equipped with a terminator (CDC part
number 4633~700).
The total length of all interconnectinQ cables from controller to last unit
in daisy chain must not exceed 50 feet.
The wire list for pin assignments will be found in Section 8.
COOLING REQUIREMENTS
The controller cards are cooled by the forced air system of· the computer.
No further cooling is required.
ENVIRONMENTAL CONSIDERATIONS
The environmental considerations necessary for operation (or storage) of
the controller cards are listed in the Detailed Specifications of Tahle 1-1.
3-2
89637700 A
PREPARATION AND INSTALLATION
Refer to the System 17 installation Manual 88996000.
To install the controller perform the following steps with the computer power
off:
1.
Refer to Figures 3-1 for selection of the proper location for
installation of the PWA in the main enclosure. Also see Table 3-1.
2.
Inspect the enclosure. PWA slot, slides and connector pins at the
locations to be used, to be sure that there is no physical damage to
them.
3.
Place the internal select jumper plugs in the relevant positions on the
controller PWA, as described in Tables 3-2 through 3-5, and in Figures
3-2 and 3-3.
CAUTION
Do not install or remove cables or PWA
from the enclosure with system power
turned on.
( ~
4.
Carefully install the controller PWA in the assigned enclosure slots as
shown in Table 3-1 and Figure 3-1. The PWA must slide into position
smoothly and be fully seated before applying power to the system.
5.
Remove back cover of enclosure.
6.
Install the internal cable (part number 89700200 for either the ICL or
LCTT MTT) between the selected slot Connector P2 for the PWA on the
backplane and the back of the enclosure.
7.
Connect the external cable (part number 89775500 for the ICL MTT or
89899000 for the LCTT MTT) between the internal cable connector on the
back of the enclosure and the card punch device.
Place the interrupt cable (part number 89724702) on the enclosure
backplane as required. Refer to Table 3-6 for selection of position.
8.
9.
Replace back cover of enclosure.
89637700 B
3-3
TABLE 3-1.
MTTC PW BOARD LOCATIONS
Assembly Board
Location (Slot)
in
Computer
Tape Interface
11*
Q-Channe1
12**
Lower Data Section
13**
Upper Data Section
14*
* Internal Cable is connected to PWA backplane
at slots indicated. Connection is made at P2
** of each location.
** Manual select jumper plugs are placed on PWA's
indicated. See Table 3-2.
TABLE 3-2.
3·4
JUMPER PLUG LOCATIONS
Jumper Plug
Assembly
Slot
Equipment Number
Scanner Select
Protect On/Off
Speed Select
Track Select
Modulation Select
Dual Mode Select
Q-Channel
Q-Channel
Lower Data
12
I
Lower Data
12
13
13
13
13
13
Position
At U2
At U2
At Ul
At Ul
At U1B
At U1B
Above U35
89637700 A
(
(
/
co
\.0
Q)
W
.......
.......
a
a
):::0
III
IIIIII I III II
EIGHT
MEMORY
MODULES
CENTRAL
PROCESSING
UNIT
CARTRIDGE
DISK
DRIVE
CONTROLLER
II
NRZI
PHASE
MAGNETIC
ENCODTAPE
ING
TRANSPORT FORMATCONTROLLER
TER
36 35 34 33 32 31 30 29 28 27 26 2!5 24 23 22 21 20 19 18 17 16 15 14 13 12 II 10 9 8
-
L-.
-
-
_
L-
UPPER DATA SECT ION
LOWER DATA SECTION
Figure 3-1.
W
I
U1
t
I
J t
7 6 5 4 3 2
I
TAPE INTERFACE
Q-CHANNEL
Locations for installation of MTT Controller in Main Enclosure.
TABLE 3-3.
INTERNAL SELECTIONS ON Q-CHANNEL PWA (See Figure 3-2).
AT
LOCATION
TO SELECT
.r
ACTION
:
EQUIPMENT NUMBER
Q07
Q08
Q09
Q10
Q07
Q08
Q09
QI0
(Refer to
Table 3-4
and
Figure 3-2)
= "1"
= "1"
= "1"
= "1"
= "0"
= "0"
= "0"
= "0"
Install Jumper Plug
Next to U3
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
II
Delete Jumper Plug
II
..
II
II
II
II
SCANNER
L = Last
F = First
M= Middle
o = One
Select one position
only - For use during
installation or
maintenance operation.
Next to U3
TABLE 3-4. EQUIPMENT NUMBER REPRESENTATION
HEXADECIMAL
CODE
OF E-FIELD
(Q10-Q07)
0
1
2
3
4
!
5
6
7
8
9
A
B
C
D
E
F
3-6
INSTALL JUMPER PLUG.
ON Q-CHANNEL PWA AT
Q07
Q09 ! Q08
Q10
-1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
I
0
0
0
0
1
1
1
1
0
0
0
o
1
1
1
1
i
0
0
1
0
1
0
1
0
0
1
1
0
0
1
1
o
o
1
1
1
I
0
1
0
1
0
1
0
1
o
1
o
1
89637700 A
.,...
~
.,...
Vl
o
Q.
en
~
,.Q.
~
OJ
Q.
§
"'":»
en
C
.,...
~
o
.&:
Vl
,.-
OJ
C
C
to
.&:
U
I
o
N
.
•
C't'\
OJ
L~
en
.,...
u..
SCANNER
89637700 A
3-7
TABLE
3~5~
" SELECTIONS ON LOWER DATA PWA .(See Figure 3-3) ***
INTERNAL
For
Transport
Type
7 Track
9 Track
9 Track
~ Track
In/Out at location Indicated
9 .
DUAL
OUT*
IN**
IN
IN
OUT
Density
PE
TRXcK (moda). (mod'iiTati on
NRZI
NRZI Only
PE Only
Dual Mode
OUT
OUT
IN
OUT
OUT
OUT
IN
556/800 bpi
bpi
bpi
1600
800/1600 bp"i
SOO
-OUT means remove jumper plug.
**IN means place jumper plug.
~**Four positions.for each of four possible MTT's are Provided.
PROTECT Position (Lower Data Section
With jumper plug installed. only
On~ position for each of the four
markings representing each of the
on thisPWA.
PWA only)~
Protected instructions are accepted.
allowable MTT's is provided. The
MTT's is placed the TRACK and DUAL
Example for using jumper plugs.
7-Track. Protected. 25 ips:
o
PROT
0
HI SPEED
o
0
PE
o
0
9 TRACK
o
0
DUAL
9-Track. Not Protected, 50 ips, Dual Mode:
--------.-~---,,--
o
PROT
3-8
o
0
HI SPEED
PE
r1
0
o
9
0
TRACK
11
o
0
DUAL
89637700 A
In
~
0
.,...
+-'
.,...
In
t
0;.'.
t:n
~
,.....
0~
OJ
0-
S
~
'J
C'l
C
.,...
3
0
.J::
V)I
~
0
.,...
+l
U
OJ
Vl
.-
"
to
•••
••
•••
•••
••
••
+-'
to
C
~
QJ
3
0
.-J
M
I
('t)
QJ
~
~
0"1
.,...
L.&..
PROTECT
f··10DE
SPEED
89637700 A
MTT SELECTION
3-9
TABLE 3-6. INTERRUPT CABLE POSITIONS
Interrupt
Positlon
,
A/Q Interrupt
Slot 12 P2A 16
Selection
m~
Priorit,¥
Line 1
II
..
2
Slot
"
3
II
" 4
II
..
..
5
6
"
" 7
"
II
II
It
8
9
10
11
12
It 13
.. 14
II 15
II
II
II
3-10
be made from any of the following:
II
II
"
II
II
II
II
II
Position
25 P1B10
25 P1A7
25 P1B7
25 P1A5
25 P1A6
25 P1B6
25 P1B5
26 P1A10
26 P1810
26 P1A7
26 P1B7
26 P1A5
26 P1A6
26 P1B6
26 P185
89637700 A
CHECKOUT
''-..
,
1.
Refer to Section 2 of this manual for operation and programming of the
contro 11 er.
2.
Perform a diagnostics check to insure that the controller is operating
properly. The diagnostics check is described in the System Maintenance
Monitor Manual (SMMI7), publication number 60182000.
89637700 A
3-11
SECTION 4
THEORY OF OPERATION
FUNCTIONAL DESCRIPTION
INTRODUCTION
This section presents general and detailed functional descriptions
of the equipment, using aids such as overall and detailed block diagrams
and timing diagrams. Descriptions are keyed to the detailed logic
diagrams in the Diagram Section (Section 5) and afford a basis in
understanding the detailed description of the specific circuit in
that section.
NOTE
It is assumed that the reader is familiar with
Control Data equipment and with the programming
characteristics of the computer as described
in the 1784 Computer System Reference Manual,
publication number 89633400.
The basic configuration is shown in Figure 4-1 and the block diagram
in Figure 4-2.
89637700 A
4-1
GENERAL
Either of the magnetic tape transport controllers transfers data between
the computer and the magnetic tape transport (MTT) either directly in NRZI
modulation or in phase modulation via the FV497-A (ICL) or FV618-A (LCTT) Phase
Encoding Formatter (PEF).* Communication with the computer is either via the
A/Q Channel or the DSA Channel of the computer. The formatter is either
Character or Assembly/Disassembly, one or two character word, respectively.
eommunication with the MTT is via nine Read Data and nine Write Data lines with
the appropriate strobe signal, according to either nine or seven track (9T, 7T)
standard format. Communication with the PEF is via the following 9-bit buses:
PEWRITE DATA IN, PEWRITE OUT, PEREAD DATA OUT or PEREAD DATA IN, with the
appropriate strobe signals.
A/Q
CHANNEL
DSA
CHANNEL
-
.'
MAGNETIC
TAPE
TRANSPORT
CONTROLLER
WRITE DATA
READ DATA
......
-
[()NTH()!
'---I-
I--
z 00 0::> :z:
......
......
ex: cex: ex: cex:
3
3
LLJ
~
LLJ
~
LLJ
~
0
~
COMPUTER
ENCLOSURE
I--
---
MT T
r--+
MT T
1
~'
MT T
~
2
L&J
~
PHASE*
ENCODING
FORMATTER
Figure 4-1.
----.
TERMIN~
MT T
3
Basic Configuration
* Refer to the FV497-A/FV618-A Phase Encoding Formatter Customer Engineering
Manual (publication number 8963796100).
4-2
89637700 A
t
DSA
DATA
DSA ADDRESS
A-REGISTER
DRIVER
.~
t
t
RECEIVER
DRIVER
DRIVER
~
"
DSA A/Q
MUX
INVERTER
.......-_._ _ _+--_ _ _ _ _---4
LAS' WORD
DETECTOR
_
LAS' WORD
.------.,... +1 REG
STATUS 2 STATUS 1
WRITE READ__
ASSY MUX ..
~
1 ,. !
__
A, MUX
!
•
BUFl REG
Ioooo-. •. _ _ _
~
BUF2 REG
,
'"-____ ... --..._i"----____----f_ _. __ ._ _ _........_ _ _ _ _- '
PEROOUT
__
._0 .. _ _ _" ' -
-.,.
PER]IN
NRZI-PE
MUX
DISASSY,
PARGEN MUX
1
CRCC
GEN/DET
t r - - - - -......:-.
PERWRDIN
PE~~ROUT
LRCC.l M
PAR,fILL MU)
L.-
-~-..I_~
RECEIVER
89637700 A
MUX
...
TAPE _---. TAPE 1______" ' - - - - .
BEAD MTT
~ WRITE
DRIVER
Figure 4-2.
"- .
WRITE TAPE ..
--_ FM
Controller Block Diagram
4-3
The MTTC executes the following computer instructions according to the
system's requirements:
Write Data
Control Function
Unit Select
Buffered I/O
Read Data
Read Status 1
Read Status 2
Re'ad Current Address'
The MTTC controls the following motion functions of the tape transport:
Write Motion
Read Motion
Backspace
Write File Mark
Search File Mark Forward
Search File Mark Backward
Rewind - load
Rewind - Unload
Vertical and Horizontal Parity and CRC are checked when reading. Two 16-bit
Data Buffers are provided for in order to double the monentary data rate to
decrease the probability of lost Data.
The MTTC can communicate with up to four tape transports, having speeds of
either 37.5 or 75 ips for ICl, and 25 ips for lCTT. The MTT can have the
densities and modulations shown in Table 4-1.
4-4
80637700 A
TABLE 4-1.
DENSITY-MODULATIONS
Density
Modulation
Tracks
800 bpi
1600 bpi
BOO/1600 bpi
556/BOO bpi
NRZI modulation
PE modu1ution
Dual mode
NRZI modulation
9
9
9
7
WRITE DATA PATH
Data from the A-Register or DSA Data Bus is transferred to the tape transport.
The block diagram shows the data path.
1.
A/Q transfer: A word from the A-Register passes through the Receivers
to the A/Q-DSA Multiplexer, to the Read/Write Assembly Multiplexer,
through the Buffer 1 Registers and Buffer 2 Registers. The characters
are transferred via the Write Tape Multiplexer and Drivers to the MTT.
Every character passes through the CRCC Generator and at the end of the
record the CRCC is transferred to the tape. In order to write a File
Mark, the FM character and related LRCC is transferred through the Write
Tape Multiplexer.
2.
DSA transfer: The FWA-l Control Word is transferred from the A-Register
to the Current Address Counter. The LWA+l Control Word is transferred
from the DSA Data Bus vis the A/Q DSA Multiplexer to the Last Word+l
Register. All the succeeding words pass through the A/Q DSA Multiplexer
to Read/Write Assembly Multiplexer and further to the double buffer as
in A/Q transfer. After every word is transferred the Current Address
Counter is incremented by one, the contents of the CAW are then passed
through the Inverters and Drivers to the DSA Address.
89637700 A
4-5
READ DATA PATH
Data from the MTT is transferred to the A-Register or DSA Data Bus.
A/Q transfer: A character is transferred from the MTT through the
Receivers to the NRZI/PE Multiplexer. The character is also transferred
. to the CRCC Generator and the LRCC, FM, Parity, Fill Check. The
character passes through PE Read in the case of the Phase Encoded Read.
The character is assembled into a word in the Read/Write Assembly
Multiplexer and then transferred to the Double Buffer. From Buffer 2
the word passes through the A-Multiplexer and Driver to the A-Channel.
CLOCK
The basic clock pulse is generated by a crystal oscillator with frequencies
of 15.36 MHz for LCTT. It is divided by 4 to form the GATED CLOCK pulse
train and the four time states T1 - T4 pulse trains.
REPLY/REJECi TIMING
When the computer READ or WRITE signal rises, and the Equipment Number of the
Q-Register matches the setting of the Equipment Number jumpers, the signals
R1 - R5 are generated. R1 is set at the first GATED CLOCK pulse after the
rise of the READ or WRITE signal. R1 is reset and R2 is set at the next
GATED CLOCK pulse, then R3, R4 and R5 are set and reset in turn. R5 is reset
by falling of the READ or WRITE pulse.
At this time the following occurs:
At R2:
At the rising of R2 the Reply condition is strobed into the Reply
Control FF.
At R3:
1.
2.
4-6
Strobing of one word in an A/Q Write operation (STRWR).
Strobing of First Word Address Minus One in a Buffered I/O instruction
(STRBUF).
89637700 A
At R4:
1.
2.
3.
Strobing of the Unit Select Code (STRUS).
Strobing of the Interrupt Selection and Motion Function in a Control
Function operation.
Setting of the Data Status (or Need in the DSA) in Write Motion
(STRWM0T).
At R5:
1.
2.
Reply· or Reject is transmitted to the computer.
At the falling of R5 the data transmitted to the computer (ENA, ENARD)
is removed from the bus.
89637700 A
4-7
BASIC TIMING GENERATOR
The following waveforms are generated from Tl and T3 when the speed of the
MTT is 37~ ips for ICL and 25 ips for LCTT frequency is doubled if the tape
transport speed is 75 ips for ICL and 50 ips for LCTT):
1.
2.
3.
4.
5.
PECHARCLK, frequency 60 kHz for ICL and 40 kHz for LCTT, symmetric
waveform, changes with rising of T1.
PECLOCK, 240 kHz for ICL and 160 kHz for LCTT, symmetric, changes with T3.
GAPCLOCK, 12 kHz for ICL and 8 kHz for LCTT, 70% duty cycle, rising with
T1, falling with T3.
2FWC, when the BOO bpi transport is connected the frequency is 30 kHz for
ICL and 20 kHz for LCTT. One pulse of 250 nanoseconds for ICL and 375
nanoseconds for LCTT coinciding with T1. With the 556 bpi transports the
frequency is 20.87 kHz for ICL and 13.91 kHz for LCTT.
Early WDS, Write Clock and WDSShidted are ar the frequencies shown in
Table 4-2.
TABLE 4-2.
Speed
ICL
LCTT
TIMING GENERATOR FREQUENCIES
Dens i_tv
800 bpi
556 bpi
37.5 ips
75 ips
30 kHz
60 kHz
20.87 kHz
41.74 kHz
25
50
20 kHz
40 kHz
13.91 kHz
27.82 kHz
ips
ips
The relations between the waveforms (Early WDS, Write Clock, WDSShifted) are
shown in Figure 4-3. They are generated only at Write Motions after Start
rises.
4-8
89637700 A
CLOCK
4 MHz (lCL)
.675 MHz{LCTT)
"
T1
J
Changes with
the rising of
T2 _ _~
L
----------'I
T3
14 ______________
~
4 MHz for ICL
and 2.675 MHz
for LCTT.
REPLY/REJECT TIMING
READ
OR
J
L
WRITE
Rl
R2 _ _ _----I
Changes with
the rising of
R3 _ _ _ _ _ _......
and 2.675 MHz
4 MHz for IeL
for LCTT.
R4 ________________
~
L
R5~----------------__--~
BASIC TIMING
nD
T3
EARLY WDS
J
n
n
n
n
n
n~n-l
n
r
WRITE CL~CK
WDS SHIFTED _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _--1
Fi gure 4- 3.
896377fJO A
L)
Frequency at
37.5 ips and
800 bpi =
30 kHz for
ICL.
Frequency at
25 ips and
BOO bpi
=
20 kHz for
LCn.
Basic Timing Generator Pul ses
4-9
REPLY CONDITIONS
For every operation the Reply condition is determined and strobed into
RC flip-flop (FF) at the rising of R2. The Reply conditions are
determined acc~rding to the Q-Register, A-Register, Status FF's
and return signals from the selected tape transport. The following
equations determine the Reply conditions for the operations:
1 • Read Data
RM~T.DATA.READY.P~0T~K
2. Read Status I:
3. Read Status II:
4. Read Current Address:
S. Wri te: Data
6. Control Function:
Always replied to
Always replied to
Always replied to
WM~T •DATA· READY •PR~T~'K
LEGCF.READY.PRpT~K
Legal control function: LEGCF
= LEGMF.(A10+AB+FILE
PR~TECT)
(BUSY+NSC~ND·E~P)
Legal motion function:
LEGMF = A7.A10+A10·AB+A10·Ag.ATQ
Non Stop Condition
NSC0ND = LEGMF·A10 (A7 + M~TC~DE7)
(AB + M~TC~DE8)
LEGUS.PR~T~K
7. Unit Select:
Legal Unit select:
Z
LEGUS
= Z .ZF·C0NTACT.(PC1600+A5)
= DUAL·B~T·9T+DS(AS·9T+A3·9T)+DS(A3·9T+A4·9T)
ZF = A4.9T+AS.9T+A1·9T+(AS.9T+A3.9T)·(A3·9T+A4·9T)
+AO·A6+Al·A2+A9+A10·A11
B.
4-10
Buffered 1/0:
89617700 A
EXECUTION STROBES
The execution strobes are generated only if the appropriate reply
conditions hold at time R2-R4, ENA:
ENARD = ENA·RC·RD
STRWR = R3·RC·WR
STRINT = R4·RC·CF
STRCF = R2·RC·CF
STRMF = R4·RC·CF·LEGMF
STRWM¢T = R4·RC·CF·A7·AB·~·~
STRUS = R4 . RC·US
STRBUF = R3·RC·BUF
SELAO = RD+DS1
SELAl = RD+DS2
UNIT SELECT
Unit Select operation selects the operation conditions. All the
conditions are stored in flip-flops that are clocked by STRUS according
to the contents of the A-Register. STRUS occurs at R4 if unit select
operation is executed and the reply conditions are met. The operation
conditions are preset by MC.
1.
Select or deselect a tape transport. A transport can be selected only
if A10 is set. It is deselected if All is set or MC is issued.
2.
The Unit Number 0-3 is selected only if A10 is set.
3. Character or Assembly/Disassembly format. It is preset to Character
format by MC.
'.
89637700 A
4-11
4.
BCD or Binary code. BCD is selected only if A01 is set. in all other
cases Binary is set.
5.
SOO, 556, or 1600 bpi density. Density BOO bpi/1600 bpi can be changed
only when a dual mode nine track transport is selected.
6.
In the case of LCTT:
(a)
(b)
556 may be selected if: seven-track transport.
800 may be selected if: seven-track transport, or nine-track dual
transport, or nine-track NRZI transport (not PE transport).
(c) . 1600 may be selected if: nine-track dual transport, or nine-track
transport.
OPERATING CONDITIONS
The operation conditions that may be selected by the switches and the unit
select operation are:
Switches:
1.
High or Low Speed:
75 ips for ICL and 50 ips or 25 ips for LCTT.
2.
9T:
3.
Dual, PE MODE SEL, nine-track and Density Status from the transport
determine the operation density, BOO, 556 or 1600 bpi.
4.
PR0TECT:
nine or seven track tape
protected or unprotected transport
Unit Select
1.
A/D:
Character or Assembly/Disassembly format
2.
BCD:
Binary or BCD code
3.
File Protect: a signal from the transport that determines if data can
be recorded or not because of the protect ring.
CONTROL FUNCTION
The control function executes three operations in sequence:
1.
2.
3.
4-12
Clear Controller, if AO = 1
Clear interrupt, if Al = 1. Select Interrupt if A2, A3 or A4 = 1
Motion function, if A7-A10 contains legal motion function.
89637700 A
CLEAR CONTROLLER
There are three levels of clear function in the controller:
1. MC: clears and presets all the flip-flop in the system.
generated by manual master clear.
2.
It;s
RES1: clears all flip-flops which contain operation conditions.
It is generated by MC+STRUS+STRCF·AOO. STRUS occurs at R4 and
STRCF occurs at R2 if the reply conditions are met so the control
function is executed.
3. RES2: clears the flip-flops that store status information and are
not operation conditions. It is 'generated by RES1+STRMF.
STRMF occurs at R4 if reply conditions are met and a motion function
is executed.
INTERRUPT
There is one Interrupt line. (location 16 P2A16) and three kinds of Interrupts:
Data, ~p. Alarm. There is an enable flip flop for each interrupt, which is
set by C~F according to bits 2-4 of the A-Register. The Interr~Pts are
cleared by MC+STRCF·[A (O)+A (1)].
C~F occurs at R4 and STRCF at R2 so
that the clear occurs before the setting. If the appropriate interrupts are
enabled then the following interrupts can occur:
'--
"
,.,
"
Data Status
2. Rising of End of Operation (E0P).
3. Alarm = ~T+Parity Error+Lost Data+File Mark +falling of Ready during an
operation, Storage Parity Error, Protect Fault, 10 Abort, PE Lost Data,
PE Warning.
1•
89637700 A
4-13 .
MOTION FUNCTION
The motion functions are executed by a Motion Function register that
stores the function, a decoder that reads the appropriate control signal
to the transport, a counter that determines the gaps and a Motion Sequencer
that controls all the previous parts.
MOTION REGISTER AND DECODER
STRMF strobes bits 7-10 of the A-Register into the Motion Register.
strobes all legal motion functions except Backspace, SFM B~ckward and
Rewind at B~T. The functions that are decoded from the register are:
It
RWIND ~AD
RWIND UNL~AD
F~RWARD
REVERSE
The strobing occurs at R4 and sets also Controller Active for all motions
except Rewind Unload. The Motion Register is reset by ST~P, IDAB;RT, L~CK~UT
or RES1.
GAP COUNTER
The gap counter is clocked by the Gap Clock circuit. It determines, together
with the Function Decoder, 9T and BpT,the pre and post record delays as
described in Table 4-3.
4-14
89637700 A
TABLE 4-3.
GAP COUNTER
Total Post Record Distance.***
Total Pre Record Distance**
(
Function
9T
B0T
Write Motion
ICL
LCTT
. Read Motion
ICL
Lcn
Backspace
ICL
LCTT
Write File Mark
ICL
LCn
Search FM Forward
ICL
LCTT
Search FM Backward
ICL
LCTT
9T
7T
BETWEEN
RECORDS
B0T
7T
BETWEEN
RECORDS
B0T
BETWEEN
RECORDS
B0T
BETWEEN
RECORDS
*6.19
~7.79
0.39 *6.19
0.35 *7.79
0.59
0.55
0.44
0.42
0.44
0.42
0.44
0.57
0.44
0.57-
*1.79
*4.59
0.19 *1.79
0.19 *4.59
0.19
0.19
0.27
0.26
0.27
0.26
0.27
0.26
0.27
0.26
NO EXC
NO EXC
0.19 NO EXC
O. 19 NO EXC
0.19
0.19
NO EXC
NO EXC
0.29
0.39
NO EXC
NO EXC
0.29
0.39
I
*6.19
*7.79
1.79
4.59
NO EXC
NO EXC
6. 19 *6. 19 .
7.79 *7.79
6.19
7.79
0.44
0.42
0.44
9.44
0.44
0.57
0.44
0.57
0.19
0.19
1 .79
1.79
0.27
0.27
0.27
0.27
0.27
0.27
0.27
0.27
0.29
0.29
NO EXC
NA
0.29
0.29
0.19
4.59
0.19 NO EXC
0.19 NO EXC
NO EXC. NO EXC
NO EXC NO EXC
All f'i gures indi cated above are inches.
END OF OPERATION
End-of-aperation (E0P) is reset by RES2. E0P is set at the detection of a gap in a
Read after Write at WM0T, or RM0T, WFM or Backspace. At Search FM, E0P is set at the
detection of a gap if FM is detected. When moving reverse (Backspace or Search FM
Backward) and detecting BOT then E0P is set. When REWIND L0AD is executing and Ready
rises, E0P is set also by PEE0P.
Subtract 2.8 inches to obtain distance from B0T Marker.
Total Pre-Record Distance is measured from beginning of motion to data.
*** Total Post-Record Distance is measured from data to end of motion.
*
**
89637700 A
4-15
MOTION SEQUENCER
The Motion Sequencer goes through states SO-S32 according to the timing
di agram (Fi gure 4-4) • SO is set by STRMF, Sl by the End Prerecord
delay, S2 by E~P, S31 and S32 by Post Record. Sl is the Start signal
and S32 the Stop signal.
If STRMF rises at S2, a non-stop motion will
occur.
WRITE CONTROL.
The Write Control directs the data through the Write path. The Write
is initiated by STRW~T that sets DATA FF (in DSA: NEED), requesting a
data word from the computer. The computer responds with a Write
operation. STRWR strobes the word into Buffer 1. When Buffer 1
is full and Buffer 2 is empty, a Transfer signal transfers the word from
BUF1 ~ BUF2, and Data FF is set. A new word is transferred to Buffer 1
in the same way, but a Transfer is not generated until Buffer 2 is empty.
When the Motion Sequencer is in Start the WDS empties Buffer 2 (in case
of Assembly/disassembly two WDS are :.needed to empty Buffe·r 2).
When Buffer 2 is empty and Buffer 1 is full a Transfer command transfers
the word from BUFl ~ BUF2 and sets Data FF. Two things happen independently:
4-16
1.
WDS empties Buffer 2.
2.
Write operation fills Buffer 1.
89637700 A
,/
/
f !
,/
(
(
/
(X)
\0
0'\
W
........
........
-L
o
o
)::a
C~NTACT
SE~P~
t
PREGAP{
I
START
Sl+I--~----------4
T3
N~N ST~P. .
1
SPEED~
~:
I
I~I
I
I
I
~
I
~
........
Figure 4-4.
Motion Sequence
NifN STmp ~T¢N
When the computer stops sending Write operations, both buffers become
empty and an End of Record Sequence is set.
FIRST
~RD
The First Word flip flop is set by STRMF and is reset by the falling
of the first Write Clock. It is used for two purposes:
1..
If an Early WDS rises when Buffer 2 is not full, (i.e., no word
was sent from the computer when requesting data) a Lockout condition
occurs and the motion stops.
2.
In WFM motion.
E~RS
is set by Early WDS if First Word is not set.
In this motion the FM character is selected by the Write Tape selector.
The FM character 178 is on 7-track and 238 on 9-track. A WDS to the tape
strobes the FM character. In Write FM, only one character is written and
then the End of Record Sequence (E0RS) starts.
. END~F-RECORD SEQUENCE
There are four kinds of
Data. 9
AM. 9
Data, 7
FM, 7
~RS:
track: data characters/3 spaces/CRCC/3 spaces/LRCC
track: FM character/7 spaces/LRCC
track: data characters/3 spaces/LRCC
track: FM character/3 spaces/LRCC
The E0RS is started if at Early WDS time, either BUF2 is empty at
or First Word is reset at WFM. The Write EORS counter is enabled
and then incremented by WDS Shifted. The presetting and decoding
of that counter generates the E~RS.
4-18
W~T
89637700 A
READ CONTROL
I f ~T is in progress. the fi rs t RDS loads data into BUF 1, and as BUF 1
is full and BUF 2 empty, a TRANS signal moves contents of Buffer 1 into
Ruffer 2 and sets Data. FF (or Need: DSA).
Two parallel processes continue:
1.
The computer reads a word from BUF 2 in response to Data/Need.
2.
The tape transport sends along with data characters the RDS signals.
In AID every second RDS. and in character format every RDS, fills
BUFF1.
Every time BUF'l is full and BUF' 2 empty. BUF 1 information moves into BUF 2
and Data/~eed is set. The data characters from the tape are checked for FM.
LRCC. CRCC and Parity.
If an odd number of characters are read in AID format and the End of· Record
is detected (the last character is still in BUF 1). one more transfer is
initiated in order to read the last character. and Fill status is set.
The Read signal terminates when an End of Record is detected
SEARCH FM
\ .....
During every motion (except Rewind) a File Mark is looked for.
If two
identical characters are detected {23a in nine-track "and 178 in seven-track
with a gap of at least 2.5 characters between them then FM Status is set.
',----
89637700 A
4-19
END-OF-RECORD DETECTOR
The ~R Detector is a counter that counts double the character frequency.
Every
RDS resets the counter to zero. A missing character is detected if the counter
reads 4 (2-21/2 character spaces from the previous). The first Missing
Character indicates termination of data and the second Missing Character
indicates termination of CRCC.
When the EJR detector overflows (16 missing characters after the LRCC)t the
E0P FF is set, to indicate End-of-Record.
If after 10 counts (5-5 1/2 character spaces) no CRCC is detected t a special
Missing CRCC signal toggles the CRCC register once more.
CHARACTER REDUNDANCY CHECK CHARACTER (CRCC)
The CRCC is a cyclic redundancy check character that is generated by manipulating
all the characters sent to the tape. This CRCC is generated in the controller
and sent to the tape after the data.
During reading, all the characters including the CRCC are manipulated in the
CRCC generator, and a final pattern of 111010111 in that register indicates
that no CRC error occurred.
LONGITUDINAL REDUNDANCY CHARACTER CHECK (LRCC)
The LRCC is a longitudinal parity check and is generated by the transport and
written after the CRec. When Reading, all the characters including the CRCC
and LRCC are checked for even parity in every track.
4-20
89637700 A
'---
STATUS
" .
The status of the controller is indicated ~y. various FF's throughout~he
system. The status information can be transferred to the comPuter by the
two Read Status instructions. Most of the status FF's have been described.
The remaining are described herein.
READY STATUS
A signal from the transport that indicates that it,is selected and connected.
Falling of READY during an operation causes Alarm~
BUSY STATUS
This signal indicates that the tape is in motion.
LOST DATA STATUS
Lost Data is set if one of the following conditions occur:
1.
Both buffers are fu1l and the next RDS is detected in
Word is not set in BUF 1/'.
2.
During BUF I/O transfer.
and WDS is generated in
~t
if Last·
Lost Data is set if both buffers are empty
.T.
Lost Data is cleared by RES2.
89637700 A
4-21
PROTECT STATUS
Indicates that the selected transport is protected.
PARITY ERROR STATUS
Parity Error occurs in one of the following cases:
1.
A vertical Parity Error was detected in a Data character.
2:
LRC error detected at E0P.
3.
CRC error detected at E0P in nine-track.
BEGINNING OF TAPE/END OF TAPE (B0T/E0T)
B0T is set from the detection of the Beginning-0f-Tape Marker on the tape
until the first START signal rises.
E0T is set from the detection of End-0f-Tape Marker on the tape until RS2.
FILL
Indicates that an odd number of Characters were read from the tape in
Assembly/Disassembly mode.
4-22
89637700 A
SECTION 5
LOGIC DIAr,RAMS
KEY TO LOGIC SYMBOLS
Publication 89723700 (Key to Logic Symbols) or equivalent, lists the symbols used
in the logic diagrams in this manual and gives a short description of the function;
they represent. The symbols conform generally to Control Data usage (Microcirc~it
Handbook, publication number 1500£100), using the polarity loqic convention.
The following paragraphs describe signal flow conventions, including on-sheet and
off-sheet continuation reference symbols, test points, connecting lines. nonconnectin~ lines and connector pin designations.
SIGNAL FLOW
Input signals are drawn coming from the left or above; output signals are drawn
going to the right or down. Signal lines are sometime interrupted to allow
logical grouping of c~mponents. The interruption may be within one drawing
sheet or between two or more sheets and requires continuation references.
On-Sheet Continuation Reference Symbols
To indicate that a connection exists between two points on a sheet, arrows at·tached to encircled arbitrary reference letters paint from the signal origin ·:to
the signal destination. The letters C, H, I, 0 and P are not generally used as
reference letters, since they have special significance in logic diagrams.
Several examples are given below. ~
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DETAILED LOGIC DIAGRAM
Q-CHANNEL (LeTT a ICL
1~1h'lIilll.IUf!l
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1
Q-Channel - Clock and Reply/Reject Logic Diagram
OPERATION DECODER (Logic Diagram 89768300, Sheets 3 and 4) Figures 5-5 and 5-6.
The Operation Decoder (U40 on Sheet 4) generates the waveforms for the
control of the interface with the computer. The inputs are from the
computer's Q-register, timing signals from the Reply/Reject Logic, and
certain status signals from the controller. The outputs are the STROBE and
SELECT signals, and the Reply condition.
Q0K (U3-6 , Sheet 3 ) is high when Q07-Q10 match the setting of the Equipment
Number and Q1l-Q15 equal to zero.
U40 generates eight active low signals. Each signal is a result of decoding
of one of the computer instructions. The signals are decoded from A/Q QO,
A/Q Q1, A/Q WRITE and ENA. For Write instructions the timing is according
to A/Q WRITE, for READ according to ENA. The signals are enabled by R+W.
U3S-S = RD·DATA.RM0T+WR·DATA.WMBT+CF·LEGCF+BUF·(E0P+BUSY)
U37-S = U3S-S.READY+US.LEGUS+CF·AS·A 9
·Alo
REPLY = DS1+DS2+CA+U37-S (PROTECTED+A/Q PROTECTED)
RD
89637700 A
= READ
5-10
Signals that execute the computer instructions are listed in Table 5-1.
TABLE 5-1.
Output
U22-12
ENARD
U22-8
= R3·RC·WR
SELAO = RD+DSl
SELA1 = RI)+DS2
STRINT = R4~RC·CF
STRUS = R4·RC·US
STRCF = R2·RC·CF
STRMF = R4·RC·CF·LEGMF
STRW~T = R4.RC-CF-A7-AS-Ag-A1O
USA = US·CONTACT
U21-l2
U21-6
i
I
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U21-8
U55-6
I
i
I
I
I U36-l2
1
I
= R3·RC·BUF
STRBUF
U53-6
;
Function
U22-6
U53-3
!
COMPUTER INSTRUCTION EXECUTION
U55-8
~
ENA·RC·RD
STRWR
1
Description
-----_.-
Starts Buffered I/O instructions
Strobes input data during
Read instruction.
I
Strobes output data during
I
Write instruction
Controls input-to-A multiplexer Ii
I
Control input-to-A multiplexer
Sets interrupt enable register
!
I
1
Selects unit
!
Starts control function
Starts motion function
i
I
l
I
I
t
Starts write motion
Controls unit select multiplexer
in Upper Data PW board
RC = REPLY C0NDITI0N
"---
89637700 A
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5-11
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DETAILED LOGIC DIAGRAM
U"1
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Figure 5-5.
"
Q-Channel - Operation Decoder Logic Diagram
A
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A/Q QOO
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Q - CHANNEL (lCTT 81Cll
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Figure 5-6.
A
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Q-Channel - 0reration Decoder Logic
Ic I
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~iagram
:"~;;68300
~"flT
(Cont'd)
4
T
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DOUBLE BUFFER & DATA CONTROL (Logic Diagram 89768300 Sheet 5) Figure 5-8.
J
Double Buffer Control
The Double Buffer is described in a later section. The Double Buffer diagram
is shown in Figure 5-7 (See Lower- J Upper Double Buffer).
D-INPUTS
UPPER
LOWER
TRANs
Figure 5-7.
Double Buffer Control
The Double Buffer Control controls the transfer of data from the computer's
A-register or DSA-Data to the tape interface lines while writing J or from
the tape interface lines to the computer while reading. This module also
controls the assembly/disassembly of the data.
The Double Buffer Control includes the following DO's:
1.
BUF 1 FULL: When high it indicates that BUF 1 contains valid data.
(U63-9) (TP23)
2.
BUF 2 FULL: When high it indicates that the data on the output lines
(U63-5){TP9) of the Double Buffer are valid.
89637700 A
5-16
3. UPPER (U-30-9):. '
When high the Upper Half Buffer is accessed.
4. TRANS·'(U42-ll)(TP28):
Provides the timing for transfer from Buffer 1 to
Buffer 2.
5. CLRLOWER (U47-9)(TP25): Initiates a dummy transfer of zeros in the Lower
Half Buffer when an odd number of characters are
read (in character format).
The data from/to the A-register is strobed by the rise of STRWR while writing
and by the rise of ENARD while reading. The DSA-Data lines are strobed by
the rise of INCCA (Increase Current Address). The data to the tape is
strobed by WDS (Write Data Strobe), and the data from the tape is strobed by
the fall of RDS (Read Data Strobe).
The Character Input signal to CPU has the following equation:
A/Q CHAR INPUT = A/D-ENARD (U59-6)
Write Motion: UPPER FF is set by STRMF, when AID is low, UPPER stays reset
(U30-13) and when AID is high, UPPER toggles after each WDS (in NRZI by
WDS SHIFTED and in PE by PWRQ sHIFTED). U64-6 and 8 produce STRWR-WM~T,
and the rise of this signal sets BUF 1 FULL and strobes the A-register into
BUF 1.
If BUF 2 Full is low and BUF 1 Full is high then U48-4 and 5 are high, U48-6
is low and U45-10 is high. TRANS is set by the rise of T4 and reset by the
rise of T2. The fall of TRANS strobes BUF 1 into BUF 2 (at the rise of T2)
and sets new data request. As WDS rises (strobes into the tape) at the
rise of T3 and Buff 2 is strobed at the rise of T2, the data on the interface
lines to the tape are valid at least 500 nsec before and after the strobing.
BUF 2 FULL is set by the fall of TRANS and is set by the rise of WDS if
UPPER is low (U48-1, 13 and 8).
89637700 A
5-17
Read Motion (Sheet 4): UPPER is set by STRMF when AID is low_ UPPER stays reset
(U30-l3) and when AID is high, it toggles with the falling of RDS (U44-9 and 8,
U29-3 and 6, U4S-l and 2, .and U30-ll).
If UPPER is high, the fall of RDS strobes the data from the tape into UPPBUF 1
If UPPER is low, the fall of RDS strobes the data from MTT into LOWBUF 1
sets BUF 1 FULL.
If BUF 2 fs low and BUF 1 FULL is high a TRANS pulse is generated as in WRITE
MOTION.
BUF 2 FULL is reset by the rise of ENARD, i.e., the strobing of A-register
(U62-9 and 8, U48-9, 10 and 8, and U63-3) and is set by the fall of TRANS.
If ISTSP rises and UPPER·A/D·RM~T is high (U46-12, 13 and 11; U58-1, 2 and 3)
then CLRLOWER is set. If BUF 2 FULL is low and CLRLOWER is high a TRANS pulse
is generated and a last data request is set.
The Double Buffer Control also indicates the following conditions:
1.
U46-6
BUF 1 FULL·RM0T sets LOST DATA on next RDS
2.
U46-3
BUF 2 FULL-WM0T condition for Lockout, Priority,
Lost Data and E~R Sequence
3.
U6l-6
Priority Condition
= BUF , FUlL·BoF 2 FuLL-WM0T
+ BUF , FuLL·aUF 2 FULL·RM0T
RESl clears the FF's BUF 1 FULL, BUF 2 FULL, CLRLOWER.
89637700 A
5-18
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DETAILED LOGIC DIAGRAM
CODE IDEtPIA30
~
EIRS
IC
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LRCC STATE
CRCC STATE
B
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34
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STIP DISTANCE
TT BUSY ..
P2117
A
~.IIIAK
II[v
COC£ 'O£"T
DETAILED LOGIC DIAGRAM
a - CHANNEULCTT aiel)
:.n
I
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Figure 5-14.
Q-Che.nnel - End Of Record
Gp.ner~tor
Control and Stop Distance Logic
A
4
9ia~ram
BUFFERED I/O AND SCANNER (Logic Diagram 89768300» Sheet 8) Figure 5-16.
Buffered I/O
This module stores BUF 1/0 instruction and Protect status and controls
fetching of Last Word Address Plus One.
It contains three FF's: BUF 1/'1 (U5~9)t PROTECT (6-5) and FCW (FETCH CONTROL
WORD U5-6). BUF 1/0 and FCW are set by STRBUF which also strobes A/Q
PROTECT into PROTECT. All three FF' s are reset by RESI.
BUF 1/0 indicates that a DSA transfer is in operation and it is cleared be
the rising of:
U4l-2 = E0RS ; LOST DATA+E0P+LAST WORD (E0P+Busy)
DSA PRoTECT = DSA WREN PRoTECT enables the DSA channel to Write into
Protected Storage.
LDLWA falls with the setting of FCW.and rises with the first INCCA. LDLWA
strobes the Last Word Address Plus One into the LWA latch, it does not change
again during the DSA t~ansfer.
Scanner
The Scanner transfers the scanning signal of the whole system through the
controller according to the position of the controller in the system as shown
in. Figure 5-15.
SCAN FORWARD IN
--
SCAN REVERSE OUT
Fiqure 5-15.
89637700 A
SCAN FORWARD OUT
SCAN REVERSE IN
Scan Control
5-28
Middle: U56-5 = 1. The scanning signal passes SCAN FOR IN through
U18-15. Ul-3. U35-3. U19-6. U17-1. U20-6. U34-6 and SCAN FOR OUT.
The backward signal passes SCAN REV OUT. U17-15, SCAN REV IN.
If the NEED signal rises during the first time U19-5 (which is in the forward
scanning path) rises, HALT is set.
HALT' blocks the Scanner at U35-2 and
the second arrival of the high going SCAN IN sets REQUEST. The Scanner,
therefore, is allowed to complete a full loop after HALT is set. See I/O
Reference Manual.
The other connection possibilities are:
Last:
The scanning path is:
First:
The scanning path is:
~ne:
The Scanner is in a closed loop and the oscillation period is due to
the internal delay of the gates U18-15. Ul-3, U3S-3 and U19-S.
SCAN IN, U18-15, Ul-3, U35-3. U19-6. U17-15.
SCAN REV IN. .
SCAN REV OUT.U18-1S, Ul-3, U3S-3, U19-5. U17-1.
U20-6. U34-6 and SCAN FOR OUT.
When no one of the four above is selected. the Scanner is Out and does not scan.
To allow the system to work, the controller should be extracted and two jumpers
plugged into the back panel.
89637700
Jumper 1 { P2B25 and P2A26
with SCAN FOR OUT.
) should connect SCAN IN
Jumper 2 (. P2A27 and P2B28
with SCAN REV OUT.
) should connect SCAN REV IN
A
5-29
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Q-Channel - Buffered I/O and Scanner Logic Diagram
4
REQUEST/RESUME LOGIC (Logic Diagram 89768300, Sheet 9)
This module consists of four transfer FD's and two status FF's:
the need (J14-9), REQUEST (U14-5), CONNECT (U13-5), DSAWREN (U13-9),
PARERR (U16-9) and PROTECT FAULT (16-5) FF's.
The NEED is set when a data word is to be transferred to or from the DSA
channel. NEED is set by:
1.
STRBUF to transfer the LWA+1
2.
STRWM0T·BUF
(U28-11).
3.
Rising of TRANS if BUF I/~·~OST DATA is high, for transferring data
words. NEED is reset by RES1+CONNECT.
If NEED is set, the controller
blocks the Scanner by raising a HALT and waits for SCAN IN. REQUEST is
set by HALT·SCAN·IN. REQUEST sends the computer a DSA REQUEST and sets
CONNECT.
I/~to·initiate
data transfer (U15-8) during Write Motion
The computer responds by a RESUME pulse, at the end of which the word is
strobed in or out of the computer. The leading edge of RESUME sets Connect
(U12-11) which resets REQUEST and NEED. If the computer is in RM0T the
rising of REQ sets DSA WREN on condition that RESUME is not active.
The trailing edge of RESUME resets CONNECT which strobes the data into or
out of the Double Buffer and resets the DSA WREN signal. A new NEED can now
be generated.
The PARERR and PROTECT FAULT are set if that signal arrives from the
computer and CONNECT is high. These status bits are then sent back to the
computer.
89637700 A
5-32
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.-US5 r
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DSA PAR ERR
::::=-________-ljLJij
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".CCA
PI AGe
PReTECT FAULT
~p~IA~m
____________________________
5 ••• 7 AC
PI BOa
A
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Figure 5-17. Q-Channel - Request Resume Logic Diagram
________..........................
Ii~1
LOWER DATA SECTION (Logic Diagram 89768000)
BASIC TIMING GENERATOR {Logic Diagram
89768~OO,
Sheet 2} Figures 5-21 and 5-22.
All the timing signals are generated from T1 and T3, having a fr.equency of
640 kHz for the LCTT MTTC and 960 kHz for the ICL MTTC, a width of 1/4 cycle,
and a delay between them of 1/2 cycle. Refer to Figure 5-18.
n
T3
______~r-l~______~
Figure 5-18. T1 - T3 Output
T1 is divided by 2 (U37-5) and by 32 (USO).
according to the Speed jumoer.
The outputs are selected by U51
TABLE 5-2. TIMING GENERATOR* OUTPUTS
Speed
U51-9
USl-12
USl-4
U51-7
ICL
37.S ips
75 i~
480
960
240
400
120
30
240
60
LCTT
35 ips
50 ips
320
640
160
320
80
160
20
40
* Frequency in kHz.
The waveforms are symmetric and changes on the passing edge of T1 .
. USl-4 is divided by two {U3S-5} to generate PECHARCLK at 80/160 kHz for the
lCTT or 120/240 for the ICL which is symmetric, changing with T1.
USl-12 is strobed by T3 to generate PECLOCK at 320/160 kHz {LCTT} or 480/240
kHz (ICl) which is symmetric, changing with 13.
5-34
896337700 A
U20 and U4-6 divide by ten in order to generate GAPClK at 16/B kHz (lCTT) or
24/12 kHz (ICl) with a 70% duty cycle, rising with Tl and falling with T3.
\
...
U51-9 .output is divided by 23 in U22-5, U21 and U4-B to generate (at U21-7)
27.B2/13.91 kHz (lCTT) or 41.74/20.B7 (ICl) with a 7/23 duty cycle, rising
with Tl and falling with T3.
U5-6 selects the signals from U51-7 and U21-7 according to the Table 5-3 and
Figure 5-19.
TABLE 5-3. WRITE ClOCK.FREQUENCY (FHC)* AT U5-6
BOO BPI
BOO BPI
25
50
20
40
13.91
27.B2
37.5
75
30
60
20.B7
41.74
Speed
(inches per second)
lCTT
leL
U6 and U5-8 and U7-6 differentiate the signal from U5-6 to generate 2 FWC
(FETCH WORD CONTROL) (twice the frequency as shown in Table 5-3) with a pulse
width of 1.04 uSec, changing with Tl, as shown in Figure 5-19.
U5-6
-1
I
I
I
I
I
1.04 uSec
Fi gure 5-19.
2 FWC Genera ti on
* Frequency in kHz
89637700 A
5-35
U22-9 enables EARLY WDS, SRITE CLOCK and WDS SHIFTED with frequencies as in
Table 5-3. It is set if PESTART WREQUEST is high at the rise of T1. If
U22-9 is high. U10-8 and U24 form the pulses shown in Figure 5- 20 .
..____..r-T.______~r-1.______.r_1.______
T1
T3
EARLY
WDS
WRITE
CLOCK
I
\
wps
SHIFTED
Figure 5-20.
89637700 A
~I-_
....
EARLY WDS, WRITE ClK and WDS SHIFTED Generation
5-36
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DETAILED LOGIC DIAGRAM
LOWER DATA (LCTT a ICLl
DwG
NO
REV
89768000
A
\.0
A
~
Figure 5-22.
•
~
1
1
Lower Data Section - Basic Timing Generator Logic Diagram
OPERATION CONDITIONS (Logic Diagram 89768000, Sheets 3 and 4) Figures 5-23, 5-24.
The operation conditions include all the conditions that define the connection
of the controller and the MTT after execution of a unit select operation. The
conditions are generated by manually set switches and FF's set by UNIT SELECT
(US) operation.
This module checks to determine if the.UNIT.SELECT instruction is legal, and
if so, it signals this to the Reply/Reject logic, and stores the UNIT SELECT
information. This module also generates the MC-and RESl signals.
Three FF's
unit.
M~DSEL,
AID, BCD store the density, format and code of the selected
MonSEl
(U39-6) is high if'1600 bpi density is selected. MODSEL can be set
only if a nine track dual mode transport is slected. MODSEL is strobed by
STRUS acco~'ding to 9T·A3+9T·A4 (U43-9). It is reset by MC.
~
(U23-l0) is high if Character Form~t is selected. This FF is strobed by
STRUS according to AO and A6: If AO·A6 is low, A/D does not change. If AO is
high AID is set if A6 is high setting AID (Both cannot be set). MC sets AID
Format.
BCD (U39-9) is high if the BCD Code is selected.
according to Al. If Al is high then BCD is set.
is reset. MC sets the Binary Code.
BCD is set by STRUS
For every other STRUS, BCD
The signal LEGUS (LEGAL UNIT SELECT, U57-8) is a combinational function of
AO-A6, TTDS. The Density Status from the tape, B~T, 9T, ILLUSCODE (the check
for ]egal unit select from another module), PC-1600 (which indicates that the
phase encoding formatter is inserted in the chassis), CONTACT, DUAL and PE, is
as follows:
89637700 A
5-40
(U43-7)
ZA = A5·9T+A3·9T
(U43-9)
Zs
(U43-12)
Zc = A4·9T+A5·9T
(U43-4)
Zo = Al·9T
(U42-8)
ZE
(U57-6)
ZF = ZC+ZO+Z£
=
=
A3·9T+A4-9T
ZA· ZS+AO.A6+Al.A2+ILLUSCOOE
os = TTDS·9T·Oual+PE·9T·OUAL
(U8-8)
ZG = OUAL.9T+OS.ZA+OS.ZS
LEGUS = ZG-ZF·CONTACT-(PC1600+AS)
If LEGUS is high. then the .UNIT SELECT instruction will reply as:
(U25-3)
BOO BPI = 9T·DS+9T·DS
(U7-l2) 1600 BPI
(U7-8)
= 9T·DS
556 BPI = 9T·DS
PEENABLE enables the phase encoding formatter and also resets it when low
(U10-6). PEENABLE = RES1·1600
PETRANSPORT on Sheet 3 is a Status signal that indicates that the transport
has 1600 bpi capability and the phase encoding formatter is connected (U27-6
on Sheet 3). PETRANSPORT = PC1600·9T·(DUAL+PE).
RESl on Sheet 2 clears most of the FF's in the controller. It is a
combination of STROBE UNIT SELECT, MC and CLEAR CONTROLLER (STRCF-Al), so:
(U55-6) RESl = STRUS+MC+STRCF·Al.
89637700 A
5-41
l/
(
l-
(
/
'+
(-
L
~
REVISION RECORD
OESCR,PT,C,,,"
co
1..0
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W
[
........
........
o
o
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~---~(
lm
• >2,9
c
c
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L>9
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AT UI
(PEl
PEiiOo
,
DETAILED LOGIC DIAGRAM
"EY
A
tTl
.,
I
~
A
tTl
Figure 5-24.
LOWER DATA
'"
Lower Data Section - Operation Conditions Laqic Diagram (Cont'd)
INTERRUPTS (Logic Diagram 89638000, Sheet 5) Figure 5-24.
Interrupt Circuit
One Interrupt signal is sent to the computer, for at least one DATA, E0P or
ALARM INTERRUPT (if enabled). This module includes three Interrupt Enable
FF's: DATAINT Enable (U23-l5), E0PINT Enable (U40-ll), ALARMINT (U40-l5) and
one Rising Edge Detection FF - E0P (U3-9).
The three Enable FF's are reset by U55-8 (Sheet 3) (RESINT = MC+STRCF(AO+Al).
These flip flops are set by STRINT according to A2, A3 and A4, respectively.
If A2 is high when strobed, then the DATAINT Enable FF is set. If A2 is low
when strobed, then the DATAINT Enable FF does not chang~.
E0PINT is set when the E0PINT Enable FF is high and E0P rises.
INTERRUPT
= DATA·DATAINT ENABLE + E0PINT+ALARM·ALARMINT ENABLE
Alarm Circuit
This module includes the BUSY·READY FF's and the combinational circuit that
detects Alarm:
U37-8 on Sheet 5 (BUSY· READY) is set by the rise of TTREADY if RWLD+RWUNLD
is low.
ALARM (Sheet 5) = BUSY·READY + EQT+PARITY ERR+LOST DATA+FM/TM+AL1+AL2
ALl and AL2 are auxiliary Alarm conditions from the PE Formatter.
89637700 A
5-46
/
/
/
(
(
"
[
- - - - - PZAIT
- ,(iiliOY.ftWIOD
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PU2'<
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~~-;~~7~~~=~~±~J===~~~------<.
~~~~-!.tfc{:-:-:-:-:1t~-_-lrf-Jf;_-_-_-_~'::::=__--1
C;
BA) 7,9
t10
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(
U30
14 R
~(Q)
________~__~____________-+4-~____________________________~
15 8
13 4
.
12 2
10
r
524
A
A>B
~
PIAl! (A-a
A<8
B
E
~
6
(QIl.'DLiA
--,
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-
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tRGTR
520
7,11
,.
7,8
A
7,8
~L~I~ ;~~~U:~R.SL!~I
IS Ii .. I
Ul
I
Ul
--I
A
I
Figure 5-27.
'l
A
DETAI lED lOGIC DIAGRAM
LOWER DATA(LCTT alCl)
Iii.,....
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I
Lower Data Section - Lower DSA Data Path Logic Diagram
REv
A
1
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REVISION RECORD
DESCRIPTION
00
PIAI6
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0'1
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.......,
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o
o
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f
,PIBI4
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2
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9
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U47
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6,8
Al
8
PlAI2
20
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3
I
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AN 6,8
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.
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0
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8
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13
II
146
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PIIIIO
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OSA DATA I
./
"
OIA DATA Z
"
DSA AODR.
~O
13 I
~
6
-.-
91--1\.8
I , ' IIG
I,' II:
J
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I
6,' I
10
3
r
6,9 IC
6,t BH
':::-,
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UII
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j
4
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~
~
~
~...!!!!.
4
6,9 8B
PtA'
P!I..l ../
"
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PI15 ./
E
OIA AODR 4
OSA ADOR 2
OSA AOOR 0
10...-
3
10
6
~-b~
?o--~~o-"-~
6,9 BD
8
-.r!--;~146~
204
II
6,9 IF
·
,,0-- "
t---B~
13
.;.J
OSA OAT~ 0
~; DSA DATA
3
~~
12
[
AO 6,8
7
0
• I
S
3,~,9
4
1I~12
~
t--
~
OSA DATA
I
MUX
let
U46
20
I
3 t
~
~
g I--
0
3~,6"
c
6
~
I
8,9 AX
OSA DATA'
"
8,9 AW
8,9 AZ
:5
PIII13 .;
I~
8,9 AY
OSA DATA 4
PIAI~ ~ OSA DATA 7
)::0
Ul
I
Ul
APP
----
--
P~25./
"
~
0
PIB2~
II
PIUt-
"
o.. G
OSA AOOR 7
OSA AOOR ~
OSA
AOOR 3
J.
OSA "OOR I
~L~I!~~~!'I'!~R.SL!~I DETAILED LOGIC DIAGRAM
A
iidlliildllT!lf]
LOWER DATA (LCTT 8ICLl~--L-+---"T'"---""1
4
~
Figure 5-28.
?
NO
1
Lower Data Section - Lower DSA Data Path Logic Dia9ram (Contld)
Rh
LOWER A DATA PATH (Logic Diagram 89768000, Sheets 8 and 9) Figures 5-30, 5-31.
For the block diagram of the Lower A Data Path, refer to Figure 5-29.
RSTAPE 0-7 signals from the tape transport are passed through a multiplexer
U64 (RDTAPE 0-3) and U62 (RDTAPE 4-7) when RMOT is low. With ~ high,
DATAIN 0-7 signals from the computer are admitted. The output of the
multiplexer (Selector 1) is then supplied to Buffer 1 (1J49, U34) which is
controlled by the signal LOWXl through U49-9 and U34-9. Buffer 1 is cl~ared
by CLEARLOWER + RESl through U25-8 to U34-1 and U49-1. BUFFER 2 (U48, U33)
further passes the signal to produce WRTAPE 0-7 signals for the tape transport,
when the TRANS signal is low (U48-9, U33-9) and RMOT is high at U64-1 and
U63-l. Buffer 2 is cleared by RES1. With RMOT low, the RDTAPE 0-7 data is
available for transfer to Selector 2 (multiplexers U44, U28, Ull and U12,
,Sheet 8), but will only be accepted when the sum of SELAO and SELAl represents
a binary 3. If both signals are binary 0, Current Address status is selected.
If SELAO and SELAl are other than binary 3, only STATUS signals are passed on
through Selector 2. When SELAO is high and SELAl is low (binary 1), STATUS 1
is selected, and if SELAO is low with SELA1 high (binary 2), STATUS 2 is
selected. These signals are NANDed through U60, U29, when enabled by ENA
(high) to the A-bus to the computer.
When signals are received from the computer A-bus, they are admitted through
U45, U58 t9 the other Lower Data Section circuitry.
89637700 A
5-54
AO-A7
.~
NOT
U45, U68
BIDIRECTIONAL
A-BUS
<;t-- . - .--.~
A/Q AO-A7
~
__
~_----L._
.--_ _ _ _
NAND
U60, U29
-
r-------~~------~~
SELECTOR
U64, U28, Ull, U12
FROM DSA
cg~~
,~l·
.~2
ENA
~--
SELAl
~O_.___
SELAO
~~ 3
r-----'-------------- CLEAR
~
BUF 2
U48, U33
STA TU S:......-2_-,
~
STATUS 1
RESl
TRANS
CLEARLt'WER RESl
L~WXl
SELECTOR
U64, U63
'-.
FROM TRANSPORT
RBT~ ... t
DATA IN
0-7
FROM COMPUTER
Fi gure
89637700 A
to
-)
5--29.
=rr
RM0T
1
Lower A Data Path
5-55
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(
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f
(
I
I
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REVISION
RECORD
OESCRtPftC"
ex:>
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.......
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a
.......
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2
RiiT
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, PIA06
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PI802
RDTAPE O(TI)
6,7
PIA22
PIA05
RDTAPE I(TII
6,7
PIAOI
ltD TAPE 2 (Til
PIB21
6,7
PIBOI
RDUPE 3(TI)
LiiXi
:::1
PIAII
WRTAPE 0
WRTAPE I
WRTAPE 2
WRTAPE 3
(0) )PIA02
... PIB05
f"ANS(Q)
RDTAPE 4 (Til) PII06
-10
RDTAPE tI (TI)PIA07
RDTAPE 6 (Til
>
PIA04
37
CLiitiWlii (Q) )
PU02
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RDTAPE 1 (TIl)PUI04
81
I
61@
-ICD
1-
-leo
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,-
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.. -
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--Ico
e WRTAPE
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4
7
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I
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DETAILED LOGIC DIAGRAM
• ,.'1."'"
Ul
I
Ul
:3 IX
ItI11l:1IJ.I1!U!1
.......
~
Figure 5-30.
LOWER
"
REV
CODE IDE"T
A
DATA (LCTT 81CL)1-1- _............- - -.......-
Lower Data Section - Lower A Data Path Logic Diagram
..
.......--1
,I
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co
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m
W
-.....J
-.....J
0
0
J
8USY (UP)
,
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PI8211
(Q)SELA I ~~7
(0) SELAO ) PlA2~
SE.. A I
113~
SELAO
I[
1;~1
It I
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170
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1UII I
..
141
~ T )3,5,6,7
II
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12
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1I,7(U)
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23
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LeST OATA(QI
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7.
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I
3
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IE
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HIlT COMPUTERS LTD
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DETAILED LOG IC DIAGRAM
as.i1EL',IE iLSE
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Ill.lJiIIilllll1!'U
U)
~
Figure 5-31.
')
,
A7
Mv
COvE ICE .. T
A
DATA (LCTT aICL.I----'-+---~---_i
1
Lower Data Section - Lower A Data Path Logic Diagram (Cont'd)
UPPER DATA SECTION (Logic Diagram 89767700)
GAP TIMING GENERATOR (Logic Diagram 89767700, Sheet 2) Figures 5-32 and 5-33.
This module includes the Gap Co~nter (U19, U5l, U36) and Timing Decoder.
also includes B~T (BEGINNING 0F TAPE) and E0P FF's.
It
The Gap 'Counter counts GAPCLOCK pulses when GAPCLOCK is low. The PREGAP
(U7-8)"and POSTGAP (U5-3) are determined according to Table 5-4.
TABLES 5-4. PREGAP - POSTGAP COUNTS
PREGAP (U7-8)
POSTGAP
9T
SIGNAL
READ
ICL
LCTT
.WRITE
ICL
LCTT
READ REVERSE
ICL
LCTT
WRITE FMTH
ICL
LCTT
is set
by
9T
7T
7T
BOT
BOT
BOT
BOT
BOT
BOT
BOT
BOT
640
1536
128
128
640
1536
128
128
24
24
24
24
24
24
24
24
2048
2560
192
192
2048
2560
256
256
32
24
32
24
32
24
32
24
128
NA
128
128
128
NA
128
128
32
NA
32
64
32
NA
32
64
2048
2560
2048
2560
2048
2560
2048
2560
32
24
32
24
32
24
32
24
B0T (U1-9) is set
E~T
(U5-8)
by
TTB0T and is reset
TTE0T and reset
by
by
the rising of START:
RES2.
PEB0T (U52-ll) sets if B0T is high after 512 GAPCLOCK pulses. PEID (U35-9)
is set if B0T is high after 1152 GAPCLOCK pulses and is reset after 2176
pulses.
89637700 A
5-60
(
,I
\l
'+
eFF-SHEET
00
REFERENCE
\.0
0"'1.
SHEET
LlICATI"N
SIGNALS
I
2
LETTER
3
4
5
6
7
8
48
.10
4C
.20
40
48
9
e.".)
'-J
'-J
o
o
o
n
A
8
WRTAPE II
..
20
~"~T
0
4A
E
4A
.2C
F
4A
.2C
48
4B
4C
G
2A
.2B
J
2A
.28
4C
K
2A
.28
4C
2A
.28
4C
L
M
til
BIIT
.20
48
40
3A
4C
40
TT. READY
4C
P
Q
A7
R
All
S
A8
A9
T
U
4C
4C
.3C
4C
40
3D
4C
.IC
4C
40
20
4C
.IC
4C
40
AIO
V
MfTCOoE 8
28
.30
W
YfTCOoE 7
2B
.30
X
AIZ
Y
E_P
Z
T5
AA
AB
u,
AD
".IUlY
4C
20
4C
GND) ... ,."..
40
4A
.IC
4C
ZC
4C
4C
.IA
AF
.3A
.11
3B
SI
B
AH
AJ
AK
VIWT
"IlU'
21
.10
2A
ZA
AlII
ITART
3D
~T.I
3C
AQ
~18
~TACT
.IC
GA'
AI
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AT
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AU
STOP
4C
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AY
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4C
U'1
I
81
_TAPE 15
ZI
ZC
III
~4C
20
!FIC
40
.30
.30
I"
WITH
14
UZO IS USED ONLY FOR Lcn APf'LICATIOfC
USI-2 IS CONNECTEl' DIRECTLY TO un-I lie ICL Af'tOLlCATION
48
4C
4C
.31
.38
4C
ZA
.11
48
28
48
e
.IA
·4B
Upper Data Section
-----
S 9D1NOTES
SIGNAL ORIGIN
"'A"
,.,."
ICC.
DETAI LED LOGIC DIAGRAM
CONTINUED ON PAO. 10
Fi gure 5- 32.
~c~Jo
C4
C5 WITH 15
C6 WI:rH l '
I. ALL R[SISTORS ARE 0.25 W, ~ 5 ..
20
40
CURAD 14
C7 WITH '7
&
CI WITH J I
C2 WITH 12
C3 WITH 13
.18
40
AI3
CURAo 15
48
.IA
AI5
AI4
AZ
8A
3D
.!.£.h...
C4 WITH P4
e5 WITH P5
JUYP£ItS: CI WITH PI
.Z8
3C
CONFIGURATION (ON LOGIC SH'S 2,3 a9)
~
.10
AR
AW
AX
NOTES
&JUMP
.30
WItEQUIIT
.ZB
40
.IA
REV
AP
0"'1
......
.10
Z8
OND) 'ZIZI
3C
II
AL
AN
,
.11
W'Y
GNO)!!..!.!.!
OND) 'ZAOS
4B
3C
'REtA'
SA
3A
A[
AG
(
~-~
UPPER
DATA SECTION (LCTTie
OII .... IHO NO
/.
/
/
/
4
1
~
"
REVISION RECORD
"',.
DESCRIPTION
~
'2820 ( P£B~T
m
W
.......
o
12
n
'-1
TTREADY(~I),..~_2~A=28~-r--~~------------------~--------~121
I'll,
IO.'::fSI9
Vee
TTB~T ....
P2A02
&
n
pIs cs
I'
'~I
IS
C
c
I I I
r_Z(GCIZI
B
B
PU30(P£lD
"
A
10)
T3)~~P~2A~~~--------C®------------------------------------------~
B
E
-=~-r==t'~~~~~I=ttll±I===------------
(o)LDLWi) PIA09
,
\
3
AID) P2112
(J'1
LilT COMPUTERS LTD
I
1'."10111,
'-J
DETAilED
.RIIiIliIIJliBl!1l
W
4
Figure -41.
Upper Ohta Section
lOGIC
DIAGRAM
MY
A
ICOO£ IOENT
Of
SE
D~a
UPPER
DATA SECTION
(lCTT 6 tCl)
Path Logid -Di agram
1
(-
(
/
4
(
/
/
;;s
~
1
REVISION RECORD
DESCRIPTION
APP
co
~
en
DSA DATA
~
DSA DATA 13
tAl
'-J
'-J
DSA DATA 12
o
o
aUF
DSA DATA 14
c
OSA OATA9
c
lie
("')
c
OSA OA,. 10
OSA OATA II
OSA DATA I
OSA ADOR 14
B
B
OSA ADD" 12
OSA AOORIO
OSMr"IV (0)
OSA ADD"
(0)
e
iiiQ
OSA AOOft Ie
DIA ADOR 13
,
C".,
I
'-J
U1
OSA ADORII
A
DSA AOOR i
DE TAilED
lOGIC
DIAGRAM
ICODE IDENTI
I DWG NO
MV
A
UPPER
DArA -SECTION
lCTT a ICl)
Figure 5-42. Upper Data ~ection - upptr DSA Data P~th Logic Diagram (Cont d)1
l
UPPER A DATA PATH (Logic Diagram 89767700, Sheets 7 and 8) Figures 5-44 and 5-45.
For the block diagram of the Upper A Data Path, refer to Figure 5-43.
RDTAPE 0-7 signals from the tape transport are passed through multiplexer
U72 (RDTAPE 0-3) and U71 (RDTAPE 4-7), when RM0T is low. With RM0T high,
DATA IN 8-15 signals from the computer through U46, U47, are admitted. The
outputs of this multiplexer (SELECTOR 1) are then supplied to Buffer 1
(U54, U53), which is controlled by the signal UPPX'l. Buffers 1 and 2 are
cleared by RES1.l+CHAR MODE. Buffer 2 (U36, U35) further passes the signal
to produce WRTAPE 8-15 signals for the tape transport, when the TRANS is
polled and RM0T is high. With RM0T low, the RDTAPE 0-7 data is available for
transfer to Selector 2 (multiplexers U15, U16, U17 and" U18), will only be
accepted when the sum of SELAO and SELAl represents a binary 3. If both
signals are binary, Current Address status is selected. If SELAO and SELA1
signals are other than binary 3, only STATUS signals are passed through
Selector 2. When SELAO is high and SELA1 is low (binary 1), STATUS 1 is
selected, and if SELAO is low and SELA1 is high (binary 2), STATUS 2 is
selected. These signals are NANDED through U64, U47 when enabled by ENA
(high), to the A-bus to the computer.
When signals are received from the computer A-bus, they are admitted through
U65, U67 t~ the other Upper Data Section circuitry.
5-76
89637700 A
AB-A1S
t
t()T
U4S. US8
BIDIRECT IONAL ...
....
A-BUS
j~
-- A/Q AB-7i1s
--
NAND
r--
U47, u64
ENA
a
~-------------------~
... SELA1
SELECTOR 2
U44.U28.Ul1.U12
_--_ __ SELAO
t - -...
·---------~SO
C~~
1
~2.
~3
to
STATU___Sl__1____
.•
4
~
.£LEAR REST
BUF 2
STATUS 2
U33,U48
...
------...--------11)
TRANS
.-
BUF 1
U34.· U49
,
SELECTOR
..
-
U46, u47
FROM TAPE
AID
TAPE 0-7
FROM COMPUTER
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8-15
Figure 5-43. Upper A Data Path
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A
UNIT SELECT CIRCUIT & LEGAL CONTROL FUNCTION DECODER (89767700, Sheet 9)
Figure 5-47.
Unit Select Circuit
This module selects (or deselects) a unit and the number of the unit. A
three-bit register U45 stores this information. A selector U44 selects
the unit according to either the stored unit select number or the new one
(see Figure 5-46).
A/Q WRITE
USA
R4
UNIT SELECTED ACCORDING TO REGISTER U45
I
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UNIT DESELECT
Figure 5-46.
UNIT SELECTED ACCORDING
TO REGISTER U45
Unit Selection
If a UNIT SELECT instruction is sent to the controller, the status of the
new unit (if it is changed) is checked, register U45 is bypassed if A10=1,
in order to determine if it should be accepted (REPLY) or rejected (REJECT).
If the UNIT SELECT is rejected, the previous unit is recom~ected. The
purpose of this feature is to reconnect a protected tape transport that has
tried to disconnect.
5-82
89637700 A
I
Legal Control Function Decoder
This module computes the following combination functions:
The illegal corrbination of the motion functions are:
(Ull-B) LEGMF
= A7·A10·AB+A7·~·AnJ
The illegal combinations of the eight most significant bits of the Unit
Select Code are:
(U12-B) ILLUSCODE
= A9+A10·All
The following function determines the Non-Stop Conditions:
NSCOND
= LEGMF·A10·(A7 mM0TCOOE7) (AB
i
MOTCODE8)
The Control Function will be legal if LEGCF (LEGAL C0NTR0L FUNCTI0N)
(U4l-l2) LEGCF = LEGMF·(A10+A8+FILE PROTECT)·(BUSY+NSC0NO·E0P)
Explanation:
For a Control Function to be legal all three conditions must be satisfied:
1.
The Motion Function Code must be legal (only 8 bits out of 16 are legal).
2.
The Motion must not be a Write Function (A8+A10) or the File Protect
ring must be removed from the tape.
3.
The transport must be Not-Busy or if Non-Stop Motion conditions exist,
then E0P must be set.
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TAPE INTERFACE PWA (Logic Diagram 89768600)
CRC GENERATOR/DETECTOR (Logic Diagram 89768600, Sheet 2) Figure 5-48 and 5-49.
This module :onsists of the Circular Redundance Check Character (CRCC)
Register. It is operational only in nine t~ack, 800 bpi operation.
The CRCC has the following properties:
1.
It can be an all zeros character, therefore no RDS is transmitted
from MTT.
2.
Its value is such that the LRCC always has odd parity (therefore the
LRCC can never be all zeros).
3.
It has odd parity when there are even number of data characters, or
even parity for an odd number of data characters.
4.
When writing, 1 frame of 00 16 on tape, the CRCC is EB 16 .
TABLE
I SIGNAL
DATA
CRCC
89637700 A
~-5.
DATA/CRCC RELATIONSHIP
TRACKS
7
6
5
4
3
2
1
0
P
0
1
0
1
0
1
0
0
1
0
0
0
1
0
1
1
1
0
5-87
The module also contains CRC-ERR FF and the CRC Strobe logic as described:
Strobe CRC (U39-1l
= WDS+RM0T·2NDSP·(RDS+MISCRC)
2NDSP = space between CRCC and LRCC
MISCRC = pseudo RDS, when CRCC is all zeros.
CRe
ERR c0NDITt0N = (U58-l2) = U55-10·9T·(WM0T+BKSP) FM STATUs
During WM0T and Backspace, U55-l0 is not looked at.
CRC ERR is forced.
During FM STAT a
The CRC register is toggled at the falling edge of WDS during Write
operation and the falling edge of RDS during Read operation.
The CRC ERR FF U22-5 is clocked at
5-88
E~P
and preset by RES2·RWLo+RWUNLO.
89637700 A
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Tape Interface - CRC Generator Detector Logic Diagram
DATA STROBE/E0R OElfCTOR (Logic Diagram 89768600, Sheet 3) Figure 5-52.
U7 is a filter that rejects pulses of width less than 250 uSecs. It clips
250-500 uSecs from the beginning of TTRDS. Refer to Figure 5-50.
U24-9 and U25 are the End Of Record Counter which is used during Read Motion
and during Write Motion in Read After Write Mode. A 2FWC counts it up and
RDS resets the counter. The counter is blocked if it reads 32. MISCAR
(U27-6) and MISeR (U40-8) are decoded from the counter (refer to Figure "5-51).
Olfz
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RDS
Figure S- 50 •
Data Strobe Generation
This counter detects gaps, by looking for 16 missing READ DATA strobes. It
detects the space (lSTSP) between Data Area and CRCC (nine track) or Data
Area and LRCC (seven track).
In addition it generates a pseudo-RDS (MISCRC) in the cases where the CRCC is
all zeros (Null Character = 000000).
5-92
89637700 A
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Tape Interface - Parity Error/Fill/FM Detector Logic Diagram
4
MY
A
..........
MTT/PE WRITE DATA PATH (Logic Diagram
Figures 5-55, 5-56 and 5-57.
8~768600,
Sheets 6, 7, and 8)
This module receives a data word from the computer via the Double Buffer and
sends it either to the tape or to the PE formatter. It contains also a One
Of Four Selector that selects a Data Character, Phase Encoded Data, a File
Mark or CRCC and sends it to the tape. Refer to Figure 5-55.
PE
WR TAPE
0-7
WR TAPE
.8-15
-..
U1
..-
'~
S
E
...
CRCC
L
E
C
T
0
R
U43, U59
189
0
-
~~
I
V
L
E
C
....
-
T
0
R
....
U35, U36,
3
FM ___ U37, U38
170
51 u
. ~U3~-8
-U56-8
-
.
~
UPPER-
D
R
5
E
,~
PARITY
GEN
U60
5IGNA L
WRITE DATA
PE DATA
CRCC
NRZI FM
E
R
5
U3, U4,
U5, U6
--
180
51
o
o
50
o
1
1
o
1
1
Figure 5-55. MTT/PE Write Data Path
The computer word WRTAPE (0-15) is divided into U43, U59 by the UPPER signal
(assembly/disassembly). The tV/O most significant bits are ENDed with 9 TRACK
(U26). The six-or eight bit character enters a parity generator (U60) and a
7 or 9 bit character is created. This character is sent to the following
units: PWDIN (0-7), CRCe generator (selector U47, U63 on Sheet 8, U57 on
Sheet 6). and WRITE To Tape S~iector (U35, U36, U37 and U38 Sheet 6).
89637700 A
5-100
This selector receives its data from:
1.
NRZI data from the seven or nine-bit character.
2.
PE Data from the formatter (PWOUT 0-7).
3.
CRCC from the CRC Generator.
4.
FM, i.e., DC wired and only bits 2, 3 and·'4, depend on nine tracks for
contstants as shown in Table 5-8.
TRACKS
7
TABLES 5-8 FM CONSTANTS
2
5
3
6
4
9T
7T
0
0
0
0
0
0
1
0
0
0
1
1
1
0
P
1
1
1
0
0
1
Control of the Selector is according to the equations:
= 1600·(E~RS+HFM/TM)
U56-8 = 1600+WFM
U34-8
WDS and WReset are generated according to:
WDS
= WRITE CLOCK • (E0RS+CRCC !STATE·WFM/TM (U20-11)
WRESET
= WRITE CLOCK ·LRCC STATE (U20-8)
There is a PE-NRZI Selector (U18 Sheet 7) that selects the WRITE STROBE (WDS),
WRITE RESET (WRESET), WRITE PARITY bit (TTWDP), and RDS* according to 1600:
'-"
TTWDP
::l
=
1600.P\~OUT+1600 (U56-8U34~8·CRCCP+lJ34-8·U60-6)
= = 1600·PWCLK+1600·WDS
TTHRESET = 1600·PWRESET+1600·WRESET
TTWDS
RDS*
= RMOT(1600·PRSTROBE+1600·RDS)
U2, U3, U4, U5 and U6 are Drivers to the tape transport.
89637700 A
5-101
There is a PE-NRZI Selector (U1S Sheet 7) that selects the WRITE STROBE
(WDS). WRITE RESET (WRESET), WRITE PARITY bit (TTWDP), and RDS* according to
1600:
TTWDP
=
1600·PWOUT+1600 (U56-S·U34-S·CRCCP+U34-S·U60-6)
= 1600·PWCLK+1600·WDS
TTWRESET = 1600·PWRESET+1600·WRESET
RDS*
= RMOT(1600·PRSTROBE+1600·RDS)
TTWDS
U2, U3, U4, U5 and U6 are Drivers to the tape transport.
S9637700 A
5-102
,.
(
(
...
,
~
fIEVISIOH R£CORO
DESClt1PT10N
00
\.0
en
w
UPPER(Q) )!P~I.o.A~27!.-_.....:..._ _ _ _ _ _-.--':~blirn--'
........
[
........
o
o
("")
~"--"4
..7..:.......-----.
WRTAPEI& PIB214
WRTAP~4~P~I~2~----------------_4--~+_~
HI
WRTAPEI3 PIB21
PIAIS
PWOIN4
WRTAPEI2 PIB20
PlBI7
PWOIN&
{
""
c
7)PIA23
L,{:::6~
PWDIN7
WRTAPEO ),....P_IA_I._9_______
WRTAPE4 )~P__IA20"""=------PIUS
~
PWDIN6
9T
3
B
4tJ]
r...-
(~)
I~
BCD
It)5
U32
A
Lan COIilMERS LTD
J
01
I
~
o
w
,.1'11'."
DETAILED LOGIC DIAGRAM
TAPE INTERFACE (LCTTS
ICL
I.
WiiiZi.i,'E usa
11111'11 i1111i1!TJ!1
~
COOE IDENT
~
Figure 5-56. Tape Interface - MTT/PE Write Data Path Logic Diagram
MV
8
/
(
u.s CO'~ ..8..
ex>
\.0
(Lt) 1600 PIBOS
P2BOI
iFiiiTii (UP)
m
, 1I
o
NRZI DATA
I PE DATA
w
""'-J
""'-J
38
II
2 CRCC
37
3 NRZI FM
[
o
o
("")
PW ,sUT 7 (PE)) ngw.
PW "'-IT 6 (PE))
I "I
P_2_B2_4~---;=-~I-LUl
I I I "'I
57 58
-=
PW (JUT 18(PE)) P2B I"
I
t~o RIO
f 1P2A20
P2A23~ T'i'W06
TTWD7
~5
t 1P2AI9 ~TTWD4
I
"1
PW gJUT 4(PE)) rEpEy
R20
P2A16 TTWD5
10
R24
-=
R26 C8 R25
I .2'15 ~TTWD2
PW I!UT
I (PE)
)~P2-=-=BO=e~J.~---iI-tI------====
PW ~UT 0 (PEl)
rHn""
I
,-
P2AI2
TTWD3
P2AII
~
P2A06 TTWDI
R
100
(ft
~IOO
I
!ltv
.o~
(J'1
I
--'
o
U'1
Fi gure 5-57 .
Tape Interface - MTT/PE Write Dota Path Logic Diagram (Cont'd 1)
(
/
(
;'
(
...
v
00
\.0
m
w
iiWcUi
'-J
'-J
a
a
9
(PE)
CRCC STATE (Q»)
PW~UTP
WRITE
(L~ M~DSEL) P2831
P203Q
...
~
(PE) ) t"lI:tI~
,
~
r
CUJCK (LD»)>..:.r. :. ...:;.:.I;::.w---I--------........,
"
~
moo (PE)
)
cu
(Q) )~eP2UA\i'~8
..----------------~~~~~:::::j-----..J
r .....
LACC STATE
1-
PRS~8E(~)r)-P2-8-2-5----------------------
P::
RWLD (HI):
RiiiNi:D (HI) P2
0
..
~ .....
(RDS.
2,9
------------------------====::::::::::::::::~--------------l[=~~~14~
TTHWll)
poy
<~
J
MV
C.
U"I
I
.......
a
'-J
Figure 5-58. Tape Interface - MTT/PE Write Data Path Logic Diagram (Cont1d 2)
MIT /PE READ DATA PATH AND REWIND TRArtSMITIt:R (Log; c D; agram 89768600)
Sheets 8 and 9}.
This module includes the data path shown in Figure 5-59.
TTRO
..-
0-7,P
PRI N
0-7
---
RECEIVER
..-
RO
--..
RD TAPE
0-7,P
U21
,
.....
~
_
PR~
.....
0-7
1600
SELECTOR
0-7
U64, U48
j
Fi gure 5-59. MTT /PE Read Data Path
The RE\~IND and REWHID UNLOAD signals are differentiated at FF U49 by 2F\4C and
sent to the MIT through drivers U17-l0 and U17-5.
5-108
89637700 A
(
I
,I
/
00
\.0
0"1
W
-......I
-......I
a
a
n
TTRoO
TTRDI
TTRD3
PRINO
i"i'Ri52
PRIN2
PRINI
PRIN3
TTRD7
T"TiiD6
TTiiD5
TTiii4
RDTAPEI
PRD2IUTI
PIAoe
PRD~UT7
PIB09
RDTAPE1
RDTAPE6
PRDQlUT6
PRDtlUT2
PRDf/lun
RDTAPE4
RDTAPE5
U1
I
a
\.0
Figure 5-60.
Tape Interface - MTT/PE Read Data Path Logic Dlagram
PlA05
PIA06
/
/
,
y
I
[REVI
REVISION RECORD
ECO
I
10Rni DATE ICHItO~
OESC",PT'ON
... P
I
ex>
\.0
m
CONTINUED
FROM PAG I
~FF
w
"-I
"-I
J
o
o
tlFF- SHEET
REFERENCE
LETTER
o
-
,
~
•
J
SIGNALS
2
3
SHEET
4
~
80
ROO
B-4
C-4
8E
RDP
A-4
C -4
8F
RDS·
l0CATlIIN
6
I
7
8
9
0- 11
0-3.
B-2
C - I.,
BG
INCRCP
C-4
0~2.
BH
INCRC7
C-4
8-3.
Bl
BCD
B-4
8J
BK
9T
A-2.
BCD
B-4
B-4
A-3
BL
PWDIN 4
C-2. C-3
8-4
PWDIN
~
C-2. C-4
B-4
B-4
8N
PWDIN 7
C-2. 0-4
eo
PWOIN 6
C-2. 0-4
B-4
BP
PWOIN 3
B-2. B-4
B-2
8Q
PWOIN 2
B-2., 8-4
8-2
BR
PWOIN 0
B-2. ,,-3
C-2
8-2
BS
PWOIN I
B-2. 8-4
8T
PWOINP
B-2.
8U
AA
A-4
C-3
8V
~
0-4
C-4
1600 LII
0-4
0-3
0-4
C-4
EIIRS
/'
~
0-3
A-2"
8W
8X
t-
A-2.
8M
c=.A
I
- SHEET REFERENCE
~
,
8-4
~-'3 ~-24t
!' I
I
-
I-
~
I"
e
HarT COIIIP\1TIRS LTD
•
' ... 1 • • • • • '
••
11'lmil'II'!i!~J
U"1
I
......
......
CODE 10ENT
TAPE INTERFAcE (lCTT a ICl)
IC
Figure 5-61.
Tape Interface Logic Diagram Reference Sheet (continued)
't\V
89768600
St1EET
_1
......
\
OWG NO
10
I~
10
SECTION 6
t1AI NTENANCE
SCOPE
This section gives maintenance references and procedures for the equipment
listed in Section 1 of this manual.
TOOLS AND SPECIAL EQUIPMENT
The following is a list of maintenance tools required for this equipment.
Part
Number
I 89688700
89670300
',--
Part Description
Quanti ty
Board Extender
Boa rd Ex trac to r
Oscilloscope
Voltmeter
1
1
1
1
The publications listed below are applicable to the equipment.
Publication
1784 Computer Customer En~ineering Manual
1784 Computer Reference Manual
1700 Compu ter Sys tern Codes ~1anua 1
System ~1aintenance Monitor (SMM 17)
Pub. No.
89633300
89633400
60163500
60182000
MAINTENANCE
Preventive maintenance of the controller is not required. After it is
determined that the controller has failed, the controller PW board should be
removed and replaced with an identical PW board. Failure should be located
by removing and replacing each PW board with an identical prob1e-free board
until the failed card is located. For removal and replacement of the card,
refer to Section 3 of this manual. After replacement, a diagnostic check
should be run according to sr·'!·, 17.
89637700
.1\
6-1
SECTION 7
PARTS LIST
The following parts list is applicable to the FA442-A and FA446-A Magnetic
Tape Transport Controllers.
Nomenclature
',-
"
'-
IJ
Part Number
FA442-A Printed Wiring Assemblies
Upper Data Assembly
Lower Data Assembly
Tape Interface Assembly
Q Channel Assembly
Interrupt Cable Assembly
Interna 1 Cable .Assenbly
External Cable'Assembly, Shielded
FA442-A11 (ICL)
89935400
89841600
89883600
89935300
89724702
89700200
89818400
FA446-A Printed Wiring Assemblies
Upper Data Assembly
Lower Data Assembly
Tape Interface Assembly
Q Channel Assembly
Interrupt Cable Assembly
Internal Cable Assembly
External Cable Assembly, Shielded
132-inches
264-inches
FA446-A08 (LCTT)
89637700 0
89985200 '6'1Cf-¥\500
89767800
89881400
89935500
89724702
89700200
89950601
89950600
7-1
SECTION 8
~JlRE
~HRE
lISTS
lISTS
Figure 8-1 shows the placement of the external and internal cables, and the
positions for the ~rrTC PWA's in the enclosure.
Table 8-1 is the wire list for the ICl MTTC internal and external cables.
Table 8-2 is the wire list for the lCTT MTTC internal and external cables.
Tables 8-3 through 8-10 are the pin lists for the MTTC PWA's.
89637700 A
8-1
SLOT 13
LONER DATA SECTION
SLOT 14
SECTION PWB
COMPUTER
BACKPLAM::
SLOT II
TAPE INTERFACE
PWB
"
'-
X, "
'-
UPPER DATA SECTION
INTERNAL CABLE
"", 89700200
",
"
'"
TAPE INTERFACE
INTERNAL CAEl..E
89700200
MAGNETIC TAPE
TRANSPORT (5)
EXTERNAL
CABLE
(ICL)
89899000 (LCTT)
89TT~
/
,J
NOTE:
UP TO FOUR MTTS MAY BE USED BUT
TERMINATOR MUST BE PLACED ON LAST MTT.
r\
rI
'TT" -
-
--,
'~
LAST---.I
MTT
I
TERMH1TOR
(ON LAST MTT)
Figure 8-1.
,
8-2
qL J1.. ____ J
Placement of Cables
89637700 A
- FA442-A (ICL) MITC TO MTT
,. - " .INTERNAL
. . . . . --..------.CABLETABLE
-. .--.ASSY
'- . .8-1.
. . . "-.' WIRE
.- . . ILIST
.-.. . -.-EXTERNAL
._- .'_. _CABLE
. --.__ASSY
. . . . . .-- - . .-----··-·-·--l
-.~-
89700200
89818400
,---........
---fc·----'
.
.
.
.
.
·
·
,
.
-----r-..·
-.. . . ---.. . -----.-..
. SLOT/
I BACKPANEL
MTT
i
~BACKPANEL
SIGNAL NAME
;CONNECTOR/ COLOR ICONNECTOR/ i CONNECTOR/ COLOR CONNECTOR/
: PIN
l PIN
t
PIN
,PIN
:,' ~O~'--I ~~~~~~~r
I
:
I
I 02 ! WHT -BRN i
; BLK I
I
I
04 WHT-RED
BLK
05 :WHT-ORN
06 :WHT-VEL
: BLK
07 iWHT-GRN
BLK
08 IWHT-BLU
: BLK
09 IWHT-VIO
,
j
(
:
I
10
IWH~~~RA
11
IWHT -BLK
BLK
12
13
BRN
WHT-BRN
BRN
WHT-RED
I 14 IWH~~RN
BRN
j
!
.
1
.j I
l
~
I
15
WHT -VEL
BRN
16 WHT-GRN
! BRN
17 WHT -BLU
(BRN
I
! J A18 I WH~R~IO
11 2 19
-5
-6
-7
-9
-10
-11
' -12
j
-13
-14
-15
:~~
-18
19
, -20
i
I'
." !,' ~3
~~-'-l-ll~i---3
-4
,
i
'I
J1
-
1-21
1-22
-23
I: =~~
-26
" -27
-28
! -29
j -30
I -31
: -32
=~~
I
WHT-GRA
JT-35
--...--- ..-. -- -.-----
1
-3
-4
BLK
GRN
. -5
-6
BLK
VEL
:
'
!
-7
; -9
VEL
WHT
BRN
BLU
BLK
BLU
VIO
I -10
I -11
I -12
I -13
! -14
; -15
! -16
! -17
I -18
I -19
1- 20
BLU
RED
BLU
BRN
RED
VEL
RED
i -21
: -22
1_
23
! -24
; -25
-26
-27
-28
-29
-30
-31
-32
I
.' . .... .... ---...... .
-AZ
-BA
-BR
-BX
I
-C
-0
-BL
-BM
I -BF
-BP
-BJ
-BK
-BB
-BH
-A
-B
-H
-J
~~~-=~~
READ DATA STROBE
GND
READ 28 -PARITY
GND
WRITE 21
GND
~24
GND
'RtJm" 25
GND
'REJij) 2 3
GND
'RtJm" 22
GND
WRITE 20
GND
WRITE 2 3
GND
-BC
READ 21
GND
WRITE 22
GND
WRITE 25
GND
READ 2°
GND
WHT . P3 -K
WRITE 24
VEL
BLU
BRN
WHT
RED
GRN
ORN
GRN
-BD
-BE
-E
-F
-M
-N
-AX
-33
-34
P -35
-_._.--+---
(CONT. )
89637700 C
8-3
TABlEt.. l. WIRE lIST - FA442-A (ICL) MTTC TO MIT
EXTERNAL CABLE ASSV
INTERNAL CABLE ASSY
. 89700200
'S9818.400-
BACKPANEL BACKPANEL·
SLOTt
MTT
CONNECTOR/ COLOR CONNECTOR/ CONNECTOR! COLOR CONN ECTOR/
PIN
PIN
PIN
PIN
l1P2A20
21
22
23
24
25
26
27
28
29
30
llll2A31
11P2B11
12
·WHT-BlK
RED
WHT-BRN
RED
WHT-RiD
~!-37
WHT-ORN
RED
WHT-YEl
RED
WHT-GRN
RED
WHT-BlU
RED
WHT-VIO
RED
WHT-GRA
RED
WHT-BlK
ORN
WHT..;BRN.
ORN
BlK
WHT-RED
ORN
WHT-ORN
-43
-44
-45
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
-56
-57
-58
- 8
-59
-60
RED
ORN
23
,WHT-YEl
111'2824
WHT-GRN
ORN
ORN
(Cont.~d)
-38
-39
-40
-41
-42'
~61
-62
-63
-64
-65
jr-66
j-37
WHT
BlU
-40
VEL
BRN
VEL
VIO
BlK
BlU
GRN
-38
-39
-41
, -42
! -43
-44
!
-45
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
-56
~57
-58
1- ~
GRN
RED
WHT
GRN
VIO
GRN
WHT
BRN
GRN
RED
BlK
BRN
f~-V
-U
-BN
-BV
-BU
-BT
-P
-W
-AS
-AT
-R
-X
-T
-S
-AE
-AF
-AH
-AJ
-CJ
-CK
-cw
SIGNAL NAME
WRITE 2'
GND
READ 26
GND
READ 2'
GND
WRITE 26
GND
WRITE RESET
GND
WRITE DATA STROBE
GND
WRITE 28
GND
-
PARITY
REWIND
REWIND-UNlOAD
GND
GND
MODE SELECT
GND
TERMINATOR POWER
I-59
-60
-61
-6~
-63
k-
64
-65
P -66
-P3
(CONT.)
89637700 c.
TABLE 8-1. WIRE LIST - FA442-A ( ICl ) MTTC TO MTT (Cant I d)
INTERNAL CABLE ASSY
89700200
EXTERNAL CABLE ASSY
89818400
SIGNAL NAME
SLOT/
MIT
BACKPANEL BACKPANEL
CONNECTOR/ COLOR CONNECTOR/ CONNECTOR/ COLOR CONNECTOR/
PIN
PIN
PIN
PIN
14P2A01
02
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
14)2A19
WHT-BLK
BLK
WHT-BRN
BLK
J2-1
-'-_2
-3
-4
WHT-RED
BLK
WHT-ORN
WHT-YEL
BLK
WHT -GRN
BLK
WHT-BLU
BLK
WHT-VIO
BLK
WHT-GRA
BLK
WHT-BLK
BRN
WHT -BRN
BRN
WHT-RED
BRN
WHT-ORN
BRN
WHT-YEL
BRN
WHT-GRN
BRN
WHT-BLU
BRN
WHT-VIO
BRN
WHT-GRA
BRN
-6
-7
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
-32
-33
-34
-35
J2-36
-5
P2-1
-r-_2
-3
-4
-5
-6
-7
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
-32
-33
-34
-35
152-36
P3
-r-
VIO
BLK
-AU
-AY
BEGINNING OF TAPE
GND
WHT
- BlK
-BZ
-CA
BUSY
GND
GRN
BLK
-At1
-AN
REVERSE
GND
YEL
BLK
BRN
BLK
ORN
BLK
-AK
-AL
-Y
-Z
-AC
-AD
FORWARD
GND
SELECT
GND
UNIT SELECT 51
GND
RED
BLK
YEL
BRN
-AA
-AB
-CL
-CM
UNIT SELECT S°
GND
FILE PROTECT
GND
GRA
BLK
-BS
-BY
END OF TAPE
GND
P3
(CONT. )
89637700
C
8-5
TABLE 8-1. WIRE lIST - FA442-A (ICl ) MTTC TO MTT (Cant'd)
EXTERNAL CABLE ASSY
INTERNAL CABLE ASSY
89818400
89700200
SIGNAL NAME
MTT
SLOT/
BACKPANEL BACKPANEL
COLOR
CONNECTOR/
CONNECTOR/ COLOR CONNECTOR/ CONNECTOR/
PIN
PIN
PIN
PIN
14P2A20
21
22
23
24
25
26
27
28
29
30
14P2A31
11P2B11
~HT-BLK
RED
WHT-BRN
RED
WHT-RED
RED
WHT-ORN
RED
~HT-YEL
RED
WHT-GRN
RED
WHT-BLU
RED
WHT-VIO
RED
WHT-GRA
RED
WHT-BLK
ORN
WHT-BRN
ORN
23
BLK
WHT-RED
ORN
WHT-ORN
ORN
WHT-YEL
11P2B24
WHT-GRN
12
ORN
ORN
J2-37
-~-38
-39
-40
-41
-42
-43
-44
-45
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
-56
-57
-58
- 8
-59
-60
-61
-62
-63
-64
-65
J2-66
P2-37
-r-_38
-39
-40
-41
-42
-43
-44
-45
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
-56
-57
-58
-8
-59
-60
-61
-62
-63
-64
-65
P2-66
BLU
BLK
P3-AP
-r-_AR
WRITE REQUEST
GND
RED
BRN
ORN
BRN
-CB
-CC
-CF
'P -CH
READY
GND
DENSITY STATUS
GND
w'
8-6
89637700 C
TABLE 8-2.
WIRE LIST - FA446-A (LCTT) MTTC TO MTT
INTERNAL CABLE ASSY
89700200
EXTERNAL CABLE ASSY
89899000
SLOT/
BACKPANEL
CONNECTOR/ COLOR CONNECTOR/
PIN
PIN
11 P2A01
02
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
11P2A19
WHT-BLK
BLK
WHT-BRN
BLK
2,.1.-1
-2
-3
-4
BLK
WHT-RED
BLK
WHT-ORN
WHT-VEL
BLK
WHT-GRN
BLK
WHT-BLU
BLK
WHT-VIO
BLK
WHT-GRA
BLK
WHT-BLK
BRN
WHT-BRN
BRN
WHT-RED
BRN
WHT-ORN
BRN
WHT-VEL
BRN
WHT-GRN
BRN
WHT-BLU
BRN
WHT-VIO
BRN
WHT-GRA
BRN
--
89637700 A
-5
-6
-7
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
-26
-27
-28
-20
-30
-31
-32
-33
-34
-35
J1-36
BACKPANEL
MTT
CONNECTOR/ COLOR CONNECTOR'
PIN
PIN
SIGNAL
P1-1
-~-2
-3
-4
--
-5
-6
-7
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
-32
-33
-34
_ ....-35
Pl-36
WHT
GRN
J3-2
J3-B
READ DATA STROBE
GND
ORN
BLK
RED
BLK
VEL
BLK
BRN
BLK
BLU
BLK
ORN
BLK
V10
BLK
ORN
WHT
-
J3-1
J3-1
READ 28 -PARITY
GND
J@-U
J2-7
J3-9
J3-K
J3-8
J3-J
J3-14
J3-R
J3-15
J3-5
J2-V
J2-18
J2-S
J2-15
WRITE DATA 1
GND
READ DATA 4
GND
READ DATA 5
GND
READ DATA 3
GND
READ DATA 2
GND
WRITE DATA 0
GND
WRITE DATA 3
GND
RED
WHT
VEL
WHT
BRN
WHT
BLU
WHT
J3-17
J3-U
J2-T
J2-16
J2- P
J2-13
J3-18
J3-V
READ DATA 1
GND
WRITE DATA 2
GND
WRITE DATA 5
GND
READ DATA 0
GND
GRN
WHT
J2-R
J2-14
WRITE DATA 4
GND
(CONT. )
I-
-
--
8-7
WIRE LIST - FA446-A (LCTT) MTTC TO MTT (Cont1d)
TABLE 8-2.
INTERNAL CABLE ASSY
89700200
SLOT/
CONNECTOR COLOR
PIN
11 P2A20
21
22
23
24
25
26
27
28
29
30
11 P2A31
11 P2B11
12
23
11P2B24
8-8
WHT-BLK
RED
WHT-BRN
RED
WHT-RED
RED
WHT-ORN
RED
WHT-YEL
RED
WHT-GRN
RED
WHT-BLU
RED
WHT-VIO
RED
WHT-GRA
RED
WHT-BLK
ORN
WHT-BRN
ORN
BLK
WHT-RED
ORN
WHT-ORN
ORN
WHT-YEL
ORN
WHT-GRN
ORN
EXTERNAL CABLE ASSY
89899000
MTT
l3ACKPANEL BACKPANEL
CONNECTOR/ CONNECTOR/ COLOR CONNECTOR
PIN
PIN
PIN
~!-37
-38
-39
-40
-41
-42
-43
-44
-45
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
-56
-57
-58
- 8
-59
-60
-61
-62
-63
-64
-65
jT-66
1 1- 37
1"'"-38
-39
-40
-41
-42
-43
-44
-45
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
-56
-57
-58
- 8
-59
-60
-61
-62
-63
-64
-65
Pl-66
SIGNAL NAME
j
VIO
WHT
ORN
BLU
RED
BLU
VEL
BLU
BNR
BLU
J2-M
J2-11
J3-4
J3-D
J3-3
J3-C
J2-N
J3-12
J3-C
J3-3
WRITE DATA 7
GND
READ DATA 6
GND
READ DATA 7
GND
WRITE DATA 6
GND
WRITE AMPL RESET
GND
GRN
BLU
VIO
BLU
GRN
RED
J3-A
J2-1
J2-L
J2-10
J1-H
Jl-7
WRITE DATA STROBE
GND
WRITE 28 -PARITY
GND
REWIND
GND
VEL
RED
BRN
BRN
RED
J1-D
Jl-4
-CW
Jl-M
J1-11
DATA DENSITY SEL.
GND
TERMINATOR POWER
ON LINE
GND
89637700 C
TABLE 8-2. WIRE LIST - FA446-A (LCTT) MTTC TO MTT (Cont'd)
EXTERNAL CABLE ASSY
INTERNAL CABLE ASSY
89899000
89700200
MTT
BACKPANEL BACKPANEL
SLOT/
CONNECTOR
COLOR
CONNECTOR/
CONNECTOR/
COLOR
CONNECTOR/
PIN
PIN
PIN
PIN
J1~01
02
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
142A19
WHT-BLK
BLK
WHT-BRN
BLK
J2-1
-;;;"-2
-3
-4
BLK
WHT-RED
BLK
WHT -ORN
WHT-YEL
BLK
WHT -GRN
BLK
WHT-BLU
BLK
WHT-VIO
BLK
WHT -GRA
BLK
WHT-BLK
BRN
WHT -BRN
BRN
WHT-RED
BRN
WHT-ORN
BRN
WHT-YEL
BRN
WHT-GRN
BRN
WHT-BLU
BRN
WHT-VIO
BRN
WHT-GRA
BRN
-5
-6
-7
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
-32
-33
-34
__-35
J2-36
P2-1
-2
-3
-4
SIGNAL NAME
-~
-5
-6
-7
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
-32
-33
-34
BRN
BLK
J1-R
Jl-14
BOT
GND
RED
BLK
J2-F
J2-6
READ THRESHOllD
GND
ORN
BLK
J1-E
Jl-5
SYNC REVERSE COM
GND
YEL
BLK
GRN
BLK
BLU
BLK
J1-C
JL-3
Jl-18
Jl-8
J1Jl-8
SYNC FORWARD COM
GND
SELECT 2
GND
SELECT 1
GND
VIO
BLK
GRA
BLK
J1-JA
Jl-8
J1-P
Jl-13
SELECT 0
FILE PROTECT
GND
WHT
BLK
J1-U
Jl-17
END OF TAPE
GND
,.
G~Q
~,35
P2-36
(CONT. )
89637700 C
8-9
TABLE 8-2. WIRE LIST - FA446-A (LCTT) MTTC TO MTT (Cant'd)
INTERNAL CABLE ASSY
89700200
SLOT/
BACKPANEL
CONNECTOR/ COLOR CONNECTOR
PIN
PIN
14P2A20
21
22
23
24
25
26
27
28
29
30
14P2A31
11P2B11
12
23
l1P2B24
8-10
WHT-BLK
RED
WHT -BRN
RED
WHT-RED
RED
WHT-ORN
RED
WHT-YEL
RED
WHT -GRN
RED
WHT-BLU
RED
l~HT -VIO
RED
WHT-GRA
RED
~JHT -BLK
ORN
WHT-BRN
ORN
BLK
WHT-RED
ORN
HHT-ORN
ORN
WHT-YEL
ORN
WHT-GRN
ORN
~~-37
-38
-39
-40
-41
-42
-43
-44
-45
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
-56
-57
-58
- 8
-59
-60
-61
-62
-63
-64
-65
~i2-66
EXTERNAL CABLE ASSY
89899000
BACKPANEL
MIT
CONNECTOR COLOR CONNECTOR/
PIN
PIN
SIGNAL NAME
RED
BRN
J1-K
Jl-9
SET WRITE STATUS
GND
YEL
BRN
J1-F
Jl-6
DATA DENSITY IN
GND
GRN
BRN
BLU
BRN
ORN
BRN
J1-V
Jl-8
J1-$
J1-S
J1-T
Jl-16
SELECT 3
GND
+5V SPARE}TWISTED
+5V SPARE PAIR
TT READY
P2-37
-r-_38
-39
-40
-41
-42
-43
-44
-45
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
-56
-57
-58
- 8
-59
-60
-61
-62
-63
-64
-65
"P2"-66
89637700
~
TABLE 6-3.
PIN LIST - Q'CHANNEL - INPUT SIGNAL
cor~NECTOR/p IN
SIG~AL
CONNECTOR/ P ~N
NAHE
DSA PR",T FAULT
PlAl
2
-.--
-
.f.l!l
2
3
~
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
23
24
,25
26
27
28
29
30
31
32
LAST W0RD
EARLY WDS
WDS' SHIFTED
DSA RESUME
(T1)RDS
PWRQ(PE)
"
.
9T
_~33
P1A34
SIGNAL NAME
j
i
4.
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
23
24
25
26
27
28
29
30
31
32
_,-33
P1B34
ISTSP
AID
TRANS
WRITE
CL~CK
PWRQ SHIFTED
1600 BPI
RES2
' WFM/TM
ST~P
A/Q READ
A/Q WRITE
I
I
(CONT. )
89637700 A
8-11 .
TABLE 8-3.
-C01~Nt(;;-Ot\/p
P2A1
2
3
4
5
6
7
IN
PIN LIST - Q'CHANNEL - INPUT SIGNAL (CONT'D)
,-
,
~.
CONNECTOR/PIN
SIGNAL NAME
-
P2B1
2
-..-
-,.-
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P2A34
--...-...... .-. ..
A/Q Q1
MC
3
4'
5
6
7
lEGMF
C0NTACT
lEGCF
E0P
.
RM0T
WMWf
A7
8
9
10
11
12
13
14
15
16
17
18 .
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P2B34
LEGUS
READY
FM/TM STATUS
A/Q PR0TECT
"
.
EXT elK
BUSY
A8·A9'·A10
PR0TECTED
INT
GC128
RESl
SCAN F0R IN
STPCLK
SCAN REV 0UT
A/Q QO
_L--
-I...-
8-12
SIGNAL NAME
\
896377'J'1 A .
TABLE 8-4.
CONNECTOR/~~;--
P1A1
--
CONNECTOR/PIN
S I GNJ\L NANE
P1B1
2
3
4·
5
6
7
-r--
PR~TECT
2
3
4
5
6
7
'''--
PIN LIst - Q CHANNEL - OUTPUT SIGNALS
FAULT
DATA
L0WX1
CLRL0WER
UPPER
8
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
-,-33
P1A34
9
10'
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
--'P1B34
L0CK0UT
STWCRC
:
L0ST DATA
REQ
SCAN IN
DSA WRENABLE
DSA REQUEST
STOP DISTANCE
DSAWREN
LRCC STATE
CRCC STATE
"
.
--- J
-...-..........
SIGUAL NAME
~.
STORAGE PARERR
UPPx1
L0ST DATA
TRANS
INCCA
BUF 2FULL·WM0T
TTBUSY
ALl
BUF I/~
A/Q CHARINPUT
DSA PRI0RITY
.
RES1.1
ENA
(CONT. )
a9f\377no A
ti-13 .
TABLE 8-4.
PIN LIST - Q'CHANNEL - OUTPUT SIGNALS (CONTID)
CONNECTOR/PIN
P2A1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
,
27
28
29
30
31
32
33
-P2A34
STRMF
CONTACT
-r--
3-14
CONNECTOR/PIN
SIGt:JAL NAME
f.2J!1
2
3
4'
STRBUF
E0P
SEL A1
A/Q REJECT
STRUS
A/Q INTERRUPT
DSA PR0TECT
T2
"
.
4 MHZ
T1
i
I
_1
USA
WM,f)T
5
RM0T
SCAN FOR 0UT
SCAN REV IN
SIGNAL NAME
I
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
-'P2B34
STRINT
SEL AO
STRCF
A/Q REPLY
LDLWA
T3
T4
I
B96377JO
~
TABLE 8-5.
-CONr~EC"T6Ifip
1--.
-.
~
.--... ----.--.- -···------··--·---------·--1
CONNECTOR/PIN
SIGNAL ....NAME
--------_. --------_--_.._-_._..•
SIGNAL
NAME
.
P1 A1
-r--
2
L~WERX1
3
RD TAPE 1
RD TAPE 2
4
,
IN
PIN LIST - LOWER DATA SECTION-INPUT SIGNALS
5
RM0T
RD TAPE 5
6
7
8
8
9
9
10
11
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
12
13
14
15
16
17
18
19
20
'-.
"-
"-
--
P1B1
2
3
4·
5
6
7
21
22
23
124
25
26
27
28
29
30
31
32
33
P1A34
-'--
,,-
SEL AO
SEL Al
RD TAPE 3
RD TAPE 0
TRANS
RD TAPE 7
RD TAPE 4
LDLWA
BUF 1/0
INCCA
BUF
BUSY
29
E0G
30
31
32
33
P1B34
-~
(CONT. )
~96377tJO
A
8-15
TABLE 8-5.
PIN LIST - .LOWER DATA SECTION - INPUT SIGNALS (CONT'D)
.
CONNECTOR-/p IN
P2A1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P2A34
CI0NTACT
CLRL0WER
-,--
WREQUEST
STRUS
WENABLE
STRINT
L0ST DATA
E0P
PARITY ERR
AL2
RWLD+RWUNLD
L9JST DATA
..
,
VS1
RES2
P2B1
-r-•
2
3
4.
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P2B34
SIGNAL
NA~'E
~--:
B0T
ILLUSC¢PE
STRCF
.
PE START
PC 1600
PE WARNING
A/Q MC
T3
(Q)DATA
STRINT
REQ
FM/Tr~
(Tl)
TTDS
ENA
ALl
E0T (UP)
Tl
RWLD
VSO
KUTY1
PE L~ST DATA
_L...
_L--
8-16
CONNECTOR/PIN
SIGNAl. NAME
r
8963770~
A
TABLE
~-5.
CONNECTOR/PIN
P1Al
-roo2
PTN
. LIST - LOWER DATA SECTION - OUTPUT SIGNALS
,-_.
SIGNAL NAt1E
CONNECTOR/PiN
-
3~
---P1A34
33
---
\
II
--
P1B1
2
-,.-.
DSA ADDR 1
3
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
SIGtJAL NAME
DSA ADDR 6
DSA ADDR 2
4"
5
6
7
WRTAPE 0
8
DSA DATA 1
WR TAPE 3
DSA DATA 0
A=B
WRTAPE 5
WRTAPE 6
A/Q A6
A/Q A4
A/Q A2
WRTAPE 1
WRTAPE 7
DSA ADDR 5
WRTAPE 2
A/Q A1
PEENABLE
"
.
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P1834
DSA AD DR 0
DSA AD DR 4
DSA DATA 2
DSA DATA 3
DSA DATA 5
DSA DATA 4
WRTAPE 4
A7
A/Q A5
A/Q A7
A/Q,A3
DSA AD DR 3
9T
DSA ADDR 7
ALARM
A/Q AO
~-
(CONT. )
',--.
896377f)f) A
8-17
TABLE 8-n.
CONNECTO-R/ p IN
P2A1
2
3
4
5
PIN LIST - LOWER DATA SECTION - OUTPUT SIGNALS (CONT'D)
S I Gt.~AL
N/\ME
-.--
6
800 BPI
WRITE ClK
8
,
-"--
89637700 A
~9\
SIGNAL ----_._-..-NAME
P2B1
2
3
4 .
5
6
7
-,..-
7
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P2A34
CONNECTOR/PIN
MC
RES ,
BCD
M0DSEl
READY RWlD
lEGUS
1600 BPI
8
9
WDSHIFTED
EARLY WDS
10
11
12
2FCW
13
14
AID
15
16
17
18
INTERRUPT
19
PR0TECTED
9T
PE CHARCLK
PE CL0CK
75 IPS
20
21
22
23
24
25
26
27
28
29
30
31
32
33
-"-P2B34
I
GAPClK
TT READY
PE ENABLE
I
8-18
TABLE 8-7.
CONNECTOR/PIN
P1A1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
..... 33
P1A34
-r--
I
.
_
PIN LIST - TAPE INTERFACE - INPUT SIGNALS
---------
SIGNAL NAHE
PRD0UT 1
PRD0UT 0
COI'H~EG TOR/ PIN
P1B1
2
3
4
PWDIN 0
BCD
WRTAPE
WRTAPE
WRTAPE
WRTAPE
WRTAPE
WRTAPE
5
4
1
0
7
6
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
WRTAPE 10
9T
2FWC
RES2
PRD,f)UT 5
--
-r-
5
WM0T
--
SIGNAl.-----_._
NAHE
.....
26
27
28
29
30
31
32
33
P1B34
PRD.0UT 4
(L0)1600 ·
PRDf)UT 2
PRD.0'UT 3
PRD.0'UT 6
PRD.0UT 7
PWDINP
WRTAPE
WRTAPE
WRTAPE
WRTAPE
WRTAPE
WRTAPE
WRTAPE
WRTAPE
13
12
9
8
15
14
2
11
PE PAR ER
RM0T
AID
---
(CONT. )
83537700 A
8-19
TABLE 8-7.
CONNECTOR/PIN
P2A1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
';""r--
~2
33
-P2A34
8-20
PIN LIST - rApE INTERFACE - INPUT SIGNALS (CONTID)
SIGNAL NAME
PSFM
TTRDS
TIRDP
STWCRC(Q)
TTRD3
TIRD2
TTR04
TIRD5
PW0UT 2(PE)
TTR06
TTR07
LRCC STATE(Q)
TTROl
TTRD10
CONNECTOR/PIN
f.?,§J
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P2B34
S I GNft.L NAP,E
WFM/TM(UP)
REV
E0P
4 MHZ(Q)
PW0UT1(PE)
PW0UTO(PE)
SFM(UP)
PW0UT 2(PE)
E0RS
PWfljUT 18(PE)
WRITE CLOCK
PWfljUT 4(PE)
PWfljUT 7(PE)
PW0UTP(PE)
PW0UT 6(PE)
PRSTR~BE(PE)
PWRESET(PE)
PWCLR(PE)
RWUNLO
RWLD
CRCC STATE(Q)
M~DSEL
--
8963770'J C
'.1
TABLE 8-8.
CONNECTOR/PIN
f.1Al
2
3
4
5
6
7
8
9
"--.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P1A34
---
PIN LIST - TAPE INTERFACE - OUTPUT SIGNALS
SIGNAL NAME
RDTAPEl
RDTAPE 0
RDTAPE 2
RDTAPE 3
RDTAPE 6
RDTAPE 7
PWDIN 1
PRIN 0
PRIN 6
PRIN 5
PRIN 2
PWDIN 4
PWDIN 0
PWOIN 7
CONNECTOR/PIN
P1Bl
2
3
4
5
6
7
8
SIGNAL NAME
--
-r--
RDTAPE 5
RDTAPE 4
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
!-P1B34
PWOIN 3
PRIN 1
PRIN 4
PRIN 7
PRIN 3
PWOIN 2
PWOIN 5
PWOIN P
PWOIN 6
FILL
-
(COUT. )
89637700 A
3-21
TABLE 8-8.
CONNECTOR/PIN
P2A1
2
3
4
5
6
7
PIN LIST - TAPE INTERFACE - OUTPUT SIGNALS (CONTIO)
SIGNAL NAt1E
TTWD6
8
8-22
P2B1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P2B34
S I GN/\L NANE
-.....-
-..--
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
-I...P2A34
-CONNEC TUR/ PIN
TTWD7
TTW04
TTWD5
TTWD2
TTWD3
TTWDO
TTWDl
TTWRESET
ROS
TrwOS
TTWOP
TTRWLD
TTRWUlO
TTM00SEL
-
SE0P
ISTSP
RWNO + RWNOUL
FM/TM(STATUS)
PARERR
_I...-
89637700 C
TABLE 8-9.
I-CO}INECTOR/ p IN
P1A1
2
3
4
-r--
I
PIN LIST - UPPER DATA SECTION - INPUT SIGNALS
SIGNAL NANE
--
C'ONNECTOR/
1----
P1 B1
2
3
4'
RD TAPE 3(T1)
RD TAPE 0(T1)
TRANS (Q)
RD TAPE 6(T1)
-...--
-SIGNAL NAME
_ _ _ .0 _ _ -
RD TAPE 2(T1)
UPPX1
RD TAPE 1(T1)
RD TAPE 7(T1)
5
5
6
7
8
9
10
11
12
13
. 14
15
16
17
18
19
20
21
22
23 "
24
25
26
27
28
29
30
31
32
33
- ......
P1A34
p, N
6
7
RD TAPE 4(T1)
RES ,1 .1
RD TAPE 5(T1)
8
9
10
11
12
13
14
15
16
17
LDLWA
CARCURADR
BUF 1/0
A=B
18
(Q)STRBUF.
.
(Q)SEL AO
,"
(Q)SEL A1
(Q)STRUS
.
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P1B34
(T1)PAPER
FM/TM(T1)
_L...-
I
(COUT. )
89637700 A
8-23
TABLE 8-9.
PIN LIST - UPPER DATA SECTION - INPUT SIGNALS (CONT'D)
CONNECTOR/ p IN
SIGt;I.t\L NAHE
-
P2A1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P2A34
PE E0P
TT B0T
-r--
_L.-
8-24
n-~~NNECi'OR/ PIN
-~
!
BUSY
(Q)USA
PRf)TECT FAULT(Q)
(Q)L0CK0UT
FILE PR0TECT
TT E0T
T3(Q)
·9T
.
"
TT READY
(Q) REQ
P2B1
2
3
4·
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P2B34
I
"
S I GNr~L NAME
.
---
(T1)FILL
(Q)STRMF
A7
AID
STORAGE PARITY ERROR
(PE) ID ABI0RT
TT BUSY
I
I
GAP CL0CK
ENA
DSAWRBII(Q)
ST0P DISTANCE
I
I
8963771)'1 A
· TABLE 8-10.
CONNECTOR/PIN
PIN LIST - UPPER DATA SECTION - OUTPUT SIGNALS
CONNECTOR/PIN
SIGNAL NAME
-P1B1
.....
P1A1
-...2
2
3
3
4
5
4
5
DSA ADDR 8
6
7
8
9
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
·23
24
25
26
27
28
29
30
31
32
33
P1A 34
_1.0......
89637700 A
SIGNJ\L NAME
DSA ADDR 12
DSA DATA 10
WR TAPE 11
DSA DATA 11
WR TAPE 13
DSA DATA 15
DSA DATA 14
WR TAPE 14
A/QA13
A/Q A'S
A/Q All
DSA ADDR 9
DSA ADDR 11
WR TAPE 15
DSA ADDR 13
C0NTACT
WENABLE
I
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
P1B 34
--
DSA ADDR 10
WR TAPE 8
DSA ADDR 14
DSA DATA 9
DSA DATA 8
LAST W0RD
DSA DATA 12
WR TAPE 12
A/Q A14
A/Q A12
A/Q A10
WR TAPE 9
A/Q A9
DSA ADDR 15
DSA DATA 13
WR TAPE 10
E0T
A/Q A8
ILLUSCtJDE
----
(CONT. )
8-25
TABLE 8-10. PIN LIST - UPPER DATA SECTION - OUTPUT SIGNALS (CONT'D)
'CONNECTOR/PIN
CUNNl:C1UK/pIN
SIGNAL NAME
SIGNAL NAME
E0P
f.2~1
.E~1
2
2
3
3
START
4
4
5
RES 2
5
READ THRESHOLD
6
6
REV
7
7
8
TT REV
8
USO
9
9
10
10
TT ~~R
' TT SELECT 3
USl
11
11
LEGCF
12
12
TTUS"
13
13
14
114
15
TT usa
RWIlf
! 15
! 16
16
ST0P
WREQUEST
17
17
18
18
SMF
19 .
19
B0T
120
TT SWS
20
PE B0T
21
21
22
RWUNLD
LEGMF
22
23
23
START
24
24
~
"Q'F'R'
25
25
RMWF
26
SELECT 3
26
GC128
27
27
Emf
28
28
29
29
30
PEID
30
31
31
32
32
33
33
P2X34
f51:S34
m
",
nrr
8-26
89776300 A
COMMENT SHEET
MANUAL TITLE _ _M_A_G~_JE_T_I_C_T_A_P_E_T_RA_N_S_P_O_R_T_C_O_N_T_RO_l_l_E_R_S_ _ _ _ _ _ _ _ __
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