D0_Schematics_Sep1979 D0 Schematics Sep1979

User Manual: Pdf D0_Schematics_Sep1979

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Controller

~

S175
2
DO 00
00'
~- D1 01
01 '
12
D2 02
02' ~1
13
15
D3 03
b1903' ~4
CK Cl'
1
91
Hi

4

K
~O

137

SRClock

Addressing

15
1
13
14
12
11
10
9

Caddr.O'
Caddr.1 '
Caddr.2'
Caddr.3'

~3

SAOul'

5241

~

2

!J]§]

laddr.1

~

mIl laddr.3

~ 18
g19 .......
5240

laddr 0'

4

~ 16
g19 ....,
5240

laddr.1'

6

g19 "'" 14
5240

laddr.2'

12

laddr.3'

8ns
!3

g19

136

Hi
I'

GND

585
X>Y

~

X1
X=
Y1
X2
X = <

6

X0
YO

4[3

I

ICompare

~

21

l

~

S240

ICompare

1~

IValid

2

------------------~

3

IMe'

e18a
SOO

OMe'

IF i 1 e
.
, CDC02.sp .ii;

Rei Date
1Gb 9/~p'+~
J

WakeUp Priority Encoding Logic
Phase1Nextl'

GND

~r.o'
~d7.T'

Cad.dr.2
Ca(JcJrJi'

00

HM7603
QO
01
AO 02
A1
03
1\2
04
A3

1
2
10
3
11
4
12
G
13
6
14
05 7
1\4
06
9
b1807
CS'

Q1
G2P2
G2P1

02
G3P2

14

G3P1
G123
23

13

2

Phase1 '

7

G1

10

G2

15

G3

3

WakeP1 '

5

4
WakeP2'

8

WakeP3'

15

6

7

GNO

WakeP1 '
G123
WakeP2'

Wake1
Wake2
Wake3
Wake4

2

4
G23

5
8

WakeP3'
G3
l'ransmil'12
!:~'5e1'

13

a17~

dTx'

Transmit
Phase1'

9
10

3

S32

S240
7

5

CIgIJ.!:l1asa1 Next'

Phase1 Next

SyncWakeReg

dTx'

4

SWE
OalaWakeAequesl

OMe'

5

OWE

IMe'

12

ClrAdr'

13

Strobe'

Transmit'
Transmit
01

OMeF
IMeF'

02
03

5

lliIl..!QStrobe 10

Current Task Comparator ( XOR)
[[4"]

CTask.O

10 Attention Logic

ICTask.O
Caddr.O'

2

ICTask.1

4

Caddr.1'

5

ICTask.2

9

Caddr.2'

10

ICTask.3

12

Caddr.3'

13

11

[fill

CTask.1

16
S241

135 ]

rr:w

CTask.2

CTask.3

6 [C19
B[C19

14
S241

12
S241

11
S86

IOAttn'

o::z]J

PreHBlank' 6
GNO

}~

}

B1
B2
..:..-. _ _--:;3~ B 3

~_1'1

!.

S163
115
CO
BO
H0[11 FieldB'
H1
H 2~~-------:....j
1[:'J.3
H 31-1:....4~_ _ _ _..,

L2u,

7

1;~12

VS
VSd'
BitClka

1

8

r,:8!-

S10

500

500

10 EP
~I-ET

a14

ldCR
Ou tD. f3
EdgeClk2

Cl'CKlO'

.t!tL!.J

21 911...-._-.

I

~~6

3J

12G

13U

510

......

W

F93427
S163
CO
5
Hi..;.1__-I-_..;6~BO
HO 11
AO
Hi 1
5 B1
Hi "'"1"';2-.-I-I------~
6
00
1\1
7
Hi 1
4 B2
1-12 13
A2
Hi 1
3 B3
H 31-:1..:::4:..-t--+-----.....::-I
4 A3
01
3
a13
A4
7
2
02
A5
f----:;"O EP b 1 4
1
~ET
A6
03
~ A7
Cl' CiI( lO'
CS' CS'
Hi1 1 21 911...-._-1-1
14
13
GND 1
1
S163
CO
6 BO
1-10
5 81
Hi
4
132
H2
3 B3
H3

GNO
,G NO
Hi1
1/ i1

7

f£p
r-:;O
~

11
12

7

~

}~

F93427

5

AO
G
00
Ai
7
A2
4
01
3 A3 d13
A4
02
2
A5
1
A6
03
~ 1\7

b13

EP
ET

~

Cl'CK lO'
1 I 2[ 9

S163

~
~

co

.
~ B2
B3

II-

7

lIQ

11

03'

Hi1

4

S175
DO 00
00'
D1 01

11
15
Phi' 13
D3 03
14

Phi
Phi'
PhD
PhD'

~
12

01'
D2 02

~O

02'

Hi1

1W3
VSd'

PhO

1~

BTO

1

VS

BitClk'a

Bi'tClka

BT3a

4~6

P4
P5

P6

1 P7

~ PO

~L- ______~1~~~0

~~~~~________~

b15

BitClk3'

Us
~
B;ICIk'~~
BilClka

5

SOO

CK Cl' ci5
91 1
Hi1

14pin KI100A oscillator
25.0 MHz

~
1

BitClkO'

2U
SOO

2 a

P1FPlA~20 ~::.-,.:..::::.::::...-

One bit delay for
map access

delayCOlo~

1;~12

6

5

HS

~

S04

S74

CK el' e13
1
Hi1

Bilel 1<3'

,P3

12Colo,M,pT;m e

91

BitClk3'

J

P19
P18
P17
P16
P15
P14
P13

~

..---....,

~~EOl'

03'

P2

S10

~

CS' CS'
14
13
GNo 1
1

21 91

One word

U

Cl'CK lO'
ECll'

R'

8 ColorMapTi me'

for buffer fetc
HI1
VBlank'
10
4
4 S 175
2
2
PreHBlank'
11
8
~;.:-:.;~~~-:--~ e 14c n-:::....--~ D
0 J..;..----=-! D S' 0 ~
,;;:C..;;;;,o.:.;;:lo.,.rM='lI1.,T;..;,i;,:.:m..;;;;,e_'~9:..j1 g I -''''j
d11 b 0' ~
~ 510
,
b11a
Bite 1 k3 ItClkO 3 C
6 VideoEnable
0'
R' S74
S175
12 dHS
2 HS
4
THi1
DO 00
00'
11 dPreHBlank 5
PreHBlank
D1 01
6 PreHBlank'
01'
10 dHLC
12
10
D2 02
HalfLineClk'
BT3a
02'
BitClka
dEOl
13
9
D3 03
S10

c13

EP
ET

,..llc O'~
13

~~::+-~--~

HO,1.1.. ~
Hi 12
13
H214
H3

BO
B1

,-::;..

10
12
S'
D
0~
a15b

9/

16

9L:/, I

Hi 1

SB CK
11

Usos

HO 12
Hi
13
H2 14
H3

B3

11

.::,V.:;;:B;:.:;la;;.:.n;,:.:k_'___
1 ~O~
gld16C)8 EnableBuf
PreHBlank'

13
14

Cl' CK lO'
.:.,;/-/:.:.,i1~_ _i.:.J1
21 911...-._-1-'
1~ ____~__~H~a~lf_L_in~e~C_lk_'_

~ B2

9

10~

FieldB
EnableBuf

~

10

SOO

EOF'

c'14

S163 CO

11

HalflineC Ik'

~

~T

~ BO
131

25S09
3
2 VS
DO
4
GND
00
BO
6
D1
Hi1
5 B1
01
11
D2
10 VBlank'
02
B2
~
ill
a12
D3
03 ~
--...:!1 B3

12

ClrAdr'

11

~S51

BilClkb
Hi1

Ph1 '

Com S nc 5

~

2
BTO

PhO'

6

PhO'

10

Phi

9

PhO'

13

Phi

12

BT3a

BitClk'a

BitClk'b

S163 CO

~.'

BO

}~

HO 12

B1
~ B2
B3

Hi 13
H2 14
H3

7

4
3
2
1
21

AdrA.O
AdrA.1
AdrA.2
AcJrA.3

AO
Ai
A2
A3
A4
5 A5
6
AG
7
A7

e9

p:Q: 'EP
ET

CL'CK LD'
11 2 91
Hi2

F93422
DO
00
01
01
h10
02
02
03 .
03
CE 1 'CE2WE'OE'
GND 19117 fO 81
Hi2
9
11
13
15

OutD.OO
OuID.01
OutD.02
OutO.03

10
12
14
16

Buf.OO
Buf.01
Buf.02
Bur.03

1(
1
1'
1(

Buf.04
Buf.05
Buf.06
8ur.07

r

~

S 163 CO

~

11
1-10 12
Hi 13
H2 14
H3

BO
4 B1
~ B2
83
Hi2

7

EP

~

AdrA.4
AdrA.5
AcJrA.G
AdrA.7

3
2
1
21
5
6
7

r9

t1Q. ET

CL'CK LD'
1[ 2

,
ClrAdrA

91

F93422
9
DO
00
11
Q1
01
g10
13
Q2
D2
15
Q3
03
CE1 'CE2WE'OE'

OutD.04
OutD.05
OutD.OB
Out 0.07

Hi2

Clk~\cfr A'

AO
Ai
A2
A3
A4
A5
AG
A7

GND 19
Hi2

r r
7fO

81

S374
3
,~

S85
15
XO
1
X>Y ~
YO
13
11) Xi
X =) G
Y1
12
X2
X(Y
11
Y2
10
X3
9
99
Y3
> = (
GND
41 31 21
IIi 2
I

Ad rA.O
Ma xA.O
Ad fA.1
Ma xA .1
Ad rA.2
Ma xA.2
Ad u\.3
Ma xA.3

7

8
13
14
17
18

AdrA = MaxAa

wr

GND

S85
XO
X>Y
YO
Xi
6
X=
Y1
X2
X
= (
4 31 2

Hi2

I

Ad rA.4
xAA
Ad rA.5
Ma xA.5
Ad rA.6
Ma xA.6
Ad rA.?
Ma xA.7

15
1
13
14
12
11
10

DO
D1
02
D3
04
D5
D6
07

00
Q1
Q2
Q3
Q4
Q5
06
07

CK
111

~C'

MaxA.O
M

MaxB.O
MaxB.1
Max£3.2
MaxB.3
MaxBA
MaxB.5
MaxB.6
MaxB.7

2
5
6
9
12
15
16
19

ClkMaxB'

585
XO
X>Y ~
YO
X1
6
X=
Y1
X2
X = <

GND
Hi2

AdrB.4
MaxBA
/\orB.5
MaxB.5
AdrB.6
Max£J.6
AdrB.7
Max[).7

585
XO
X>Y
YO
X1
6
X=
Y1
X2
X: :5:: I[$~~>: :5:: 14 :::::::::: 1~:~9:<~~[: jp]§3El: 12:~9:1?:~1::

::::::': I : ~?~:~~ ~ ~ :SIU?~~4~~~ ~ ~ SI[~??~4~~ ~ ::51[ ~??~~ ~ ~ :515 ~ :~~:1:2:~1: ~ ~ I~ :~~:1:2:~1~ ~ ~ I~ ~~~ :2:~1~ ~ ~ I:::::::
::::::::::I::::::::::,::::::::::1[2:~$9?: 5: :It: ~ ?~:~~ s: :16 I: :$~ ?:~ ::sll; :$~ ?:~ ::sl[ :$~:7:~ ::51 ::::::::::

:::::::::: I:::::::::: I:::::::::: IS::: 1(~~~:~~5:: 17 (~~~:~ :5: II ~>:~?: :5: It:$~ ~:~ :5:: I::::::::::
::: :: ::: :: :: I: ::: :: :: ::: :I:: :: ::: :: :: :I( ?:~$9$:: :: I I; $~~:~ :5: :: :I[$~ ~:~: 5: :: :II~>:~?: :5:: :: I
crrrOH: :~??3~: Ie ~:~~: :5:: I[~!~>: :5:: I[$~~>: :;:: 19 mrs::: ICED::: HE3::: I : ~1:t~:5::
::::::: I[ ~??~~~ ~JII~ ~??~4~~~ ~ ~SIU??~4:~~: :Sl[~??~~~~ ~ ~S110 fuD~ ~ ~ ~ Imn~ ~ ~ ~ Imn~ ~ ~ ~ ICED
:::::::::: I:::::::::: I:::::::::: 1Cill3::: Icm::s::: 111 ($~:~~ :5:: ICED::: irED::: ImD:::
8

.,..... ," '·1········ ,.. 'I"·'····, ,.,.~.I
'I~' ""1 12 ~ •••• 'I~""
~II
~
.II' ••••••••••••••••

I

•••••••••••••

•• I

••••

••

I

'11:2:~$??:5""1
••

t

•••

......... ·1" .. '·· .. 'I··· ....... ,... "" .. '11; ~1:f~:5 .. 113 1?:~4H:5· '1!~1:+~: :5' ·II~>:+?: :s· ·1t?:~4~!:s ..
.. ,...... ·1········· ·1········· ·1········· ·I~···I
14 ~
.. 'It:$~~~: :s' '1[ ~1:+~:S' 'II:$~~>: :S"
,~
~'I'
..... ", ..........
·1· .. ·· .. ·... ,....... " "I[$~~:~ :5' "115 ~
.. "I[~i~~: :5" 'I~'"
'I~
#".".'.II"~.·I'
~
,~,
~
II II

••••••••••••

,

••••••••••••••••••• '

I •• I . I . I • • • • • • • • • • • • • • • • • • • • • I
I

•••

II

••••••••

•• • • • • • • •

II

••••••

II

••

,

II

•••••••••

•••••••

II

•••

II

1.1' ,

. . . . . . . . . . . lt ••••••

I.

.1

••••• ,

•••••••••• ,

'"

••••••••

,

II

I

II

"

•

,

•••••••••••••

••••••

•••

:::::: :::: I::::::::: :I( ~ ~ ?:~ :5: :I::::::: :: :Icr::n:::, (liD::: IrEO: ::ImD:: :1mB:: :
::::::::::1:::: :,::::: IU~~:o:~g::I:::::::::: I(~J?:~ :5::117 [~~?:~ :;: :lcm::s:: :11:~~~:~~s: :HEt::s:::
:::: :'::::: I:::::::::: II :$~~:: 5: I[:~~~:~: :slcrE5: :: 118 ::::::::: :I§O:: :1[~~?:3::S:: H§::S:::
m~lt: :$??:~: :511: :~~~:~: :;I( ~~~9:: :;1[: :~~f~: :;119 [~:~49:: :;l[ :s:~4~:: :sl($~?:~ :5:: Imn:::
16

:::::::::::::::::::::::::::::::::::::::::::::::::: : : : ;;::::::::::::::::::::::: :::::::;:;:::;:::::; ==
20pins:A

16pins:B

14pins:C

22pins: 0

24 pins: E

101·200
1-100

Note: The short vertical lines indicate
filter capacitor locations.

Inverted 16-pin: F

'n .

r-~'l
X[:R-..X :,' ro~~;c +=P
~

:S'_

!

C~

--

~~yo~'~ ="~~'",:'::"""""-.

, e

_.~.:~~~out.sil

....

I

Designer
Re Date
y
ThaCke__ _ <~~)~8/79

Page
OI
~

I
I

"

AlUOUT.15

BMUX
S258

~G~N~D~_ _--:;:2-1 D O '
83 1--+_.....:F~2::..:...;;:..3_ _ _ _3-; 8 i 19 b

4

""jJ~1~8:--:.;.1-I;;;.;2.;..;,1._,5..., 1 4

2

MASK.15

ALU

S240

9
19

1-12.15'

S257
....,;1-1
...1;,,;,....
1 --:0:-1 D
0

4

AlUA.151N

B e9b
______

1-11.15

~

__________________

~A~l~U~A~.~15~

____122

Cycler/masker
AlUOUT.14

~~'~-~~~r-~
W
BMUX
5
S258
GND
~~----:":-tD
0'
1831---+--.......:F~-2;;.;,.,;;,2_ _ _ _6..., B i 19c

7
XJ-._,9____1-I_2_._1_4---j 114
MASK.14

11

ALU
10
2

1-12.14'

1-11.14 14

.;.;..;.;........-,..,,-1

13

S257
D
0
B ege

12 AlUA.141N

1-:-!:;":';:=~...;.;.;..0...1.-""""_"",

_____~_ _ _ _ _ _ _ _ _ _ _ _~A~l~U~A~.~14~___~22

15 1-11.14

Cycler/masker
AlUOUT.13

BMUX
11

_G~N~D_ _~~ 0

84

0' 9

S258

1--+-___:F..,:2;;;,;....;,.1_ _ _1__0..., B i 19d

n...:,1..:::.6_ _1-1..;,;;2""'...;.,13"-1 1 5

4

MASK.13

ALU

S240

11
16

1-12.13'

S257

1-11.13

o

0

7

AlUA.131N

<

B age
1-11.13

AlUA.13

------~--------------~~~-----~23

Cycl er/maske r

AlUOUT.12

.~'1, __--:=:-:-:':-:":":;-----,
~BMUX
14

~G~N!fD--~~

0

S258
0'

12

-r

1 84 ~-4--_--:F-::2;.:;.O:o::-_ _ _1~3-; B i 1 ge

:0-.;..7______1-1..;,;;2""'.....
1 ....
2
MASK.12

11 5

13

ALU

S240
19

L-__~__________~1~8

W5~_~1-I2~.~1~2~'________

1-11.12

S257

o

B e9d
10 1-11.12

Cycler/masker

0

9

AlUA.121N

S181
o
1-1
E eBb

13

ALUOUT.11

BMUX
86

2 0
,-:::G:.:..:N:.;;;D=-___~j,'-t
1-_+-_...;F:...1:.:..~3_ _ _~ B

S258

0'

4

i18b

MASK.11

fl-1:...,4:-....;..;.H-.2.-.1-.1~ 38

6

ALU
2

.....,;H..;.,1-....;.,1--.
1~ 0 S257 0

4

S181
9
H
f8e

o

~1~5~~H~2.~1~1~'________~__~______________-r~1~E

ALUA.11IN

<

B f9b
2

______-L________________

H1.11

~A~L~U~A~.~11~

____ ~

Cycler/masker
ALUOUT.10

'15

BMUX
7
5 0 S258
~G~N.:..:D:-_ _--:':6-1
0'
Fi.2
1 861--+---.....:--.:....:.:::.-----~ B i 1 8 c

"'lJ..:::,5_--.:.H.:.:2:;.:,.~1O::.-j 1 38
MASK.10 15

10

6

H2.10'

.;..;.H..;.;1.;. .;.,1~O--.,.-1 0 S257 0

12 ALUA.10IN

B fge
15 1-11.10

______~__________________~A~L~U~A~.~10~____1143

Cycler/masker
ALUOUT.09

~~q,~2__~~~~~
~
BMUX
87

S258
GND
11 0
0'
F1.1
10
I--+---~:"':':''':'-----,;",::~ B i 1 8 d

9
'Y\.~1..::2~...:H:..:.;2::.;..:::.0.:::.9-I 39

MASK.09

8

ALU
21

S181

~12~~Hl2~.0~9~'________~__~______________-r2~0~

H1.09

';";"';";';;";;"-';'-i

0

S257

0

7

o

ALUA.09IN

H1.09

11

<

B f9c
7

H

E f8c

______~_______________~A~L~U~A~.0~9~__~44

Cycler/masker
ALUOUT.08

BMUX
5258
14
-:.G,.:.N:.,:;D~----'1~3~
0
0'
_ + -__~F:...1:.:..~O_ _ _~ B
1187
iiBe

12

~..:.3~_:.:.H::.:2.~0.:::.8-1 139

MASK.08 17

ALU
19
~9~~H~2.~0~8~'_______~____~____________________1r1~8

11 0 S257 0
_H_1.•
08""-~

9

S181
o
E f8b

H

13

ALUA.08IN

B f9d

10 H1.08

______~__________________~A:.,:;L~U~A~.0~8~____1144

Cycler/masker

ALUOUT.07

BMUX
F2.3

GND

2
3

S258

0

Q' 4

B i17b

MASK.07

2

ALU

H3P

9
19

H2.07'

H1.07

~'5

2

S257
Q 4
0
B g9b

ALUA.07IN

ALUA.07

H1.07

65

Cycler/masker
ALUOUT.06

BMUX
F2.2

GND

5
6

S250

0

Q' 7

B i17c

MASK.06 11

ALU
10
2

H2.06'

H1.06 14
13

~

S257
D

Q 12 ALUA.06IN

B gge
ALUA.06

15 H1.06

165

Cycler/masker
ALUOUT.05

BMUX
F2.1

11

hID

10

S258
D

Q' 9

B i17d

MASK.05

4

ALU
11
16

H2.05'

H1.05

~'3

S257
D

Q 7

ALUA.05IN

B g9c
7

ALUA.05

H1.05

74

Cycler/masker
ALUOUT.04

BMUX
F2.0

14

GND

13

S258

0
B

Q' 12

i17e

MASK.04 13

ALU

H3P

4~

13
5

H2.04'

17c

H1.04

5257
D

Q 9

ALUA.041N

B g9d
10 H1.04

Cycler/masker

ALUA.04

174

ALUOUT.03

16~q4

l--~''';'''';''---=B~M-:":U~X~'''
';

,

F~.3 'f

2 D S25g, 4

GND

J

B

. i"16b

1-13P

I.

~J

MA5K.03
TP041

T

I

11
i-,;.;;;5;..-,---'--i

5374

6

ALU

<1-12

2
15

9

1-12.03'

i 9179
1-11.03

r

1-11

!

I~
3! 25509 I 2
D
0 I

~.1.§j=93422 ~~~

21 D5257

0

Bh9b

14

ALUA.031N

I

_ _ _-LI________

1-11.03

~A;.:;;Lo:;:U~A:.:.:.0;::.:;3;;...._ _ _f"""92I

L::!.!:-J

I

Cycler/masker

c:J--...:...-....----'-<,B h16b;

lJ.!1§LJ

n

ALUOUT.02

r~9:
~~;;;:'0--~B=:-:M~U'l"'t'X"---'
Fi.2

I

GND

I
I

MASK.02
TP042

T

I

7'----"

~

R

I

I 111 51)

F

I 13

,

:

~:::5
1~3~

1-12.02'

_ _1-I_1_.0_2-L:_ _ _ _ _

iD:@

__

Cycl er/maske r

B h16e

h17cO-7':'-...J.-_ _
S 241

1_2 A_LU_A ·. ;.:;.:;~ .; : ':.; .;A~.0:;. ;2=_

H1.02

ALUOUT.01

~q2
'gi0

F1.i
GND

<

Tr030

~493"22110

10
6

I

ALU

<1-12

~-~~

r

15

BMUX
11
10

S258

D

9

0'

B i16d

8

MASK.01

ALU
11

12

1-12.01'

1-11.01

5

~-"";"~6~D

S257

0

7

ALUA.01 IN

B h9c
7

1-11.01

_____~____________~A~L~U~A~.0~1_______193

Cycler/masker
ALUOUT.OO

BMUX
_

14

-~j~~:::::1~3~ D

S258

12

0'
B i16e

MASK.OO

9

1-12.00'

1-11.00

I

S257
D
0

9

ALUA.OOIN

~~~~~;...J...",,-,-.w..;JL.lor

B h9d

11
25509110 1-11.00
D
12Ii?:<:-,.j.----.:..::::-.:'IB hi6d J
Cyc 1 e

01

_____...;.i_ _ _ _ _ _ _ _ _ _ _

r /ma s ke r

~A:.:oL;.:;::U.:;;A~.O;;.:;O;;...._ _ _ _[l@

Memlnsl

3

BSEL.1

2

Nibble2 .... F1
15

~~i18f

BMUX

[8:11J

S258

Memlnst'
PUa

BMUX

2

B1~assT

[

[12:15J

36~B~S~E~L~.1____________~13~

: 15 J

BMUX

BBFA'

[4:7J

B¥passT
[ : 11 ]

8 H2 .... B'

BMUX

[0:3J
_Memlnst'

3

B*passT
[ : 7]

<

~~.~B~SE~L~.O~__~~~
L!..::!~U-Memlnsl

RMOD'

BnPassT
[ : 3]

5
4
2

c[] eTD =eTask

TFILE CONTROL
S189
TA.O 13
AO
IA.1 14
A1
TA.215 A2 e14f
TA.3 1

I

r
r

3"-

S189
13
AO
14
15 A 1 f14f
A2
1
A3

es' WE'
EnableT'

21

TA.O
TA.1
TA.2
TA.3

[4:7J

S189
13
AO
14
A1
15
A2 g14f
1
A3

EnableT'

31

21

TWriteSlrobe'

13

~·~~~AO

S189

TA.1
14 A1
:.;TA~.~2_ _1:..::5~ A 2 h 14f
.:.;TA;.;,;.~3___1:....j A 3
es' WE'
EnableT'

2/

31

31

31

TWrileSlrobe'

TA 0

[0:3J

es' WE'

es' WE'
21

EnableI'

TFILE CONTROL

TFILE CONTROL

[8:11J

TA.O
TA.1
TA.2
TA.3

A3

S20

TFILE CONTROL

[12:15J

H2f-ALUOUT'

6

1

TWrileStrobe'

TWrileSlrobe'

H2.xx Buffer Enables

~TI.""· ',M''!I;''1'P''Ift~~'"~

.

:. ':.,' :'yx:

~

1) t ')

-W~£ -~*ft!l!f:2.':P1r":'"."'''':

.

'\.
f'~.'f'

"''''f- "'"; ~••

~.JJ('''''''

":

"t~,

:tf"".

~

.......

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I"~

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i'JIemlnstFast'

H2[8:15]

clkH2'

s~;..;;le~n==-,d_'-,.,--;.-.;-.l
.£1.£leOFeed'

Tranfer MASK to ALUB'
6

[116 BBFA'

4

MA'

5
S02
EnableMask'

Hl[O:15]
~~ e16f

88 ~L:..:.T~~_~~
Abort'
Memlnst'

25S09
5B f16f
CK
25S09
1
9

Memlnst
TWPendin

~~ g16f
25S09

EnableR

S8 h16f
CK
25509

-Rii =W I\a
-ITA =Wl\b
:AWPendin

1 88 j-.:L:.:.,R:.......___--.,;-j
Abort'
Memlnst'
Memlnst

clkC cleO'a

TP062

<

RWPendin

C~c 1 e

r Im8~

Bypass Mu
•

r.: ]

4

.l!YPending

5

b7b

6

Twrite'

TWrite

9

Rwrile'

3

~
b6b

MC2Writin!;lR'

12

,,",,4~...;M~C..;..1W.;..;...;..ri;.;.le::..;A..:..'_ _ _ _.:..::!-

504

RWrite

510
Memlnst

-f.oCycleO
RSEL.O

nSEL.1
g.oCxcleO
EnAuxR'
MC1WriteR'
f.1C2WritingR'
"'?lIspond-b
21emlnst
Suspend'

504
a6

10

(1)
( 2)
(3)
(4)

Enable
Enab 1 e
Enable
Enable

if RSEL[O:1] = 3
RMOD and RSEL[4:5] means "Enable
i f RMOD' 0 r RSEL[ 4 : 5 ] "HOY ~
YO
X1
6
X=
Y1
X2
X = <
3 2
ON; 1 1 \
PUc
I

WA.715
1
WA.613
14
WA.512
11
WAA10

TP121

I

RA = WAa

'rl

B g11e

WA(-pre$tkp

1

....:C;:..:.:lk~W~A;.:..'_ _ _ _....:9~ ~~ 9 111
25509

13 1 S374

RA.3

1 e 111

I
141 S374

RA.2

1 e11 9

I
RA.1

5374
181
1 e 11 i

I

RA5ave.3

3 1 S374
1 111 b

1

115

RASave.2

4J S374
1 111 c

1

12
1

15
1

I

~~:~~:

RA.O

112

'6

RA5ave.1

RASave.O

I

..!~lkC

clkWA'

R File Write Address

I S374
1 111 d

1

119

7

81 S374

16

I
19

I 111 e I

I

WA.315
1
WA.213
14
WA.112
11
WA.010

S85
XO
YO
X1
Y1
X2

Y2

X)Y
X=
X = <
2
/
GN; [31
PUc
I

~
6

~

TP122

I

<

RA=WAb

PUb

[N]

MemNeedsR

2

Ed eClock'c

3

RUN
Ed eClock'a
Memlnstid'
I1MODI d
PrOCC:icle1
RSEL4and5/d

13
Memlnst'
RMOD
RSEL.4

11
1:1

MC2WiliGetR

1
13
b1a
2

12
S11

TP123<

MC2XferWord
ProcC):cleO
Memlnst'
ProcCycleS

c15

SRSA1
eClock'c
Ed eClock'a
C
Memlnst/d'
HMOD/d
PrClcCycle1
n§EL4and5
ProcCycleO
SRSA2
ProcCycle1
I1SEL.O/d'
I1SEL.1 / d'
ProcCycleS

2
SRSA2

Ed eClock'a

..£.'L~O

Me m N....
e-e"'s-:R~---i!i~

6

Ed eClock'a

ProcCycle011

cleO'

Su~~n~d_'________ ~

cle1
F93427
C cleO
t. .fcm I nstFast
RMOD
R EL.4
R EL.5
R EL.O
HSEL.1
Sus end'

_'~mNeedsR

5 AO

12
6
00
A1
7
A2
11
<101
A3
3
b2
A4
10
2
02
A5
1
A6
9
15
03
A7

GND

<

R Address Generation
--4

SRSA t·
SRSA2
SRSBO

<
<
<

SRSB2
<

4

RSEL.2
RSEL.2
ASEL.2
Stkp.4
n SE L. 2
WAA
MC 1 Act-1MC2Ad.4

3 00

2

Sus end
nSA.1
RSA.2

01
02
RA.O
5
03
Y
6
nA.O'
04
W'
05
06 h12
07
S251

9

RSB.O
RSI.:l.1
Hsn.2

10 S4
1 'I S2
S1

E'

7

RAdisable

y 5
6
W'

OG
Sus end
nSA.1
RSA.2

RA.1
FlA.1'

.~

9 12
S251

RSB.O
RSB.1
RSB.2

E'
7

RAdisable

RSEL.3
RSEL.3
RSEL.3
Stkp.5
RSEL.3
WA.G
Me 1 Ad.5
MC2AcL5

I

9
10 54
11 S2
S1

9

10 S4
11 S2
51

E'

RFILE[O:3]

71

RAdisabte

DO
01
02
03
04
05
D7

4
3 DO
2 01
1 02
y 5 RA.4TP_L4
15 03
6 AA.4' I PIll
111 04
W'
13 05
12 06
07 i13
S251

4
3 00
2 01
1 02
Y 5 RA.5
15 D3
6 HA.5'
14 04
W'
13 D5
12 06 h13
D7
S251
9
S4
10
11 S2
S1 E'

RA.O'
!lA.1
nA.2'
AA.3'
BA.4'
HA.5'
11A.G'
HA.?'

TP14
I f)LLJ

OND1BP7fO

f 12

FlWnte~trobe'

RFILE[4:5]

y
W'

5251

RA.O'
RA.1'
RA.2'
AA.3'
IlA.4'
HA.5'
HA.G'
FlA.7'

E'
7

RAdisable

Sus[2snd
RSA.1
1l5A.2

9
10 S4
11 52

4
3
2
1
15
14
13
12

RA.3
RA.3'

S251

51

7

RAcfisable

9
10 S4
11 S2
51

RSA.O
RSFU
RSI.I.2

AO F93422
A1
A2
A3
A4 9 1 51
5
A5
6
A6
7
A7
CE1 'CE2WE'OE'

PUTj
RWrite5trobe'
GND

E'

RFILE[8:11]
DO
01
02
D3
04
D5
D6
07

Y
W'

5 RA.7

6 FlA.7'

113

9
10 S4
11 S2
51

RAdisable

4
3
2
1
21

ON019 p7 fO 18

7

RAdisable

RSEL.1
4
CTask.3
3 DO
WA.3
2 D1
02
Stkp.3
1 1
y 5
MC1Ad.3 15 1 03
6
- - - ND14 D4
W'
MC2Ad.3 13 05
GND12 D6 e12
D7

5 AA.6
6 AA.6'

S251
RSB.O
RSB.1
FlSB.2

ra

OND

4
3 DO
2 D1
RA.2
HA.2'

AO F93422
A1
A2
A3
A4 h15f
A5
A6
A7
CE1'CE2WE'OE'

PUTj

71

RAdisable

y 5
G
W'

4
3
2
1
21
5
6
7

~

RA.O'
FlA.1'
FlA.2'
flA.3'
RA.4'
nA.5'
RA.5'
nA.l'

4
3
2
1
21
5
6
7

RA.O'
fIA."
HA.2'
, HA.3'
RAA'
IlA.5'
RA.G'
11A.?'

4
3
2
1
21

AO
A1
A2
A3
A4

F93422

f151

S251

E'
7

PUc

RFILE[12:15]
!~eClock-2

1~Rend'

2

RSEL,5'

~O

A3

e15f
A4
A5
6
A6
7
A7
CE1 'CE2WE'OE'
OND19b7fO 18

5

PUTj
RWriteStrobe'
GND

r"XEROX

t.s~.~p~

R Address Multiplexers

F93422

A1
A2

!'111l

SA LU F f-H 2' 5

rl~~6~_ _-,
1,.~04

GoCycle1
EdqcClack-2
_gycleO'
Sl.Isne..:.;n.:;:,d_'_ _"

O]I)

Abo rt'

OTI

DelayeciFaull'

S 11

I'"~I
- . ~
-:~::';";'---1'-;1~1
Abort'

10

Breal~eoin('
[QTI\...._~~~~~.!...---------7;--i9
1 d9c

)c

r---i

GE]

Freezenesult

!

9

S 3 74

! 15 I

,

!.!

~S10

~

L

5

i32
7

a c

5
GaCvs:lcO

...:6;...._.....--..,..~_-;EdrJcCI ac k- 2

S04

I

clkXCyc16"r 1J 159(
TP162(

3

C cleO'
us Jcnd'
r:clr c lack-2

clkfld'

I

4

I

i

5
3
S10

I\dvancePipe

4

~

9

J

Ib8b b~6~
!LUSOO

...s.0.9cClocl<-1
GO.91cle1

II)BC
Erf~~

-

~<
pun!

EriocClock-1
-_
..-

i

8

clkMC1'

______~~~__

TComin '
RCaming'
clkH3P'

clkC cle1'

SOO

12 ~
'b8d b~1~1~__~E~d~g~e~C~lo~C~k~'b~
13 i. - - - )

6

L-/ sao

clkWA'

128 LoadMIR

6

-Sl2~ycleO

ClkSSlk '

4

~aeC!ock-1

SOO

9

GoCycleO
EdgeClocl<-1

-

i

Icee
10

I

~W]J(

Use EdgeCl

,

RWrite

-'Jl~~9L.!_ _ _'-:"';;"1

13

12 RPWrile
RamClock

EclgeClock-1

RWrite
RWriteStrobe'
[}[]~~C~y~C~I~eO~F~·e~~e~d~'___......__~

PLJCl

PUa

[C[]

RamCIock 13

2

cleO'

8

4

clkH2'

RamClocl = <
4! 31 2;

X>Y

M,:.,:;C:..:,'

j

X

I X2

.:.:.R.::;;.A~.O~~
_ _~1. :;:51~il XO
7.,;,.:;'A;.:.d:.:.:.O~_ _~_l. YO

I5

X>y;-01

1 J1'-1 X'I
1 7-1 Y 1

10\Y2

f£~;1 Ac1.3

HIl..4

i 20VCC
2 Pi
P20,. 19'JND
3 P2
P 1 9! 1 8
If! P3
P-IB r" 1 7
5 P4
~1 ~ ~ 1 G
1 5
P5 d1 r
i3i)"'?-(-i'-r P 6
Pi 5 ~ 1 4
PDTe
0 P7
~14 1-11 13
rOTh 9 PO
.13, 12PDTi
GND
10'P9
P12 1'~
PDTa
POT b
POTe
PDTd
;'rne

1~1 ~' 1(PllIL
I 161 1 ~PUTi
P 1 5 ITu3'U,'I"ii"

c2

FIT'F'C71 P t,;

MC2CAd.4

~~~~::::~~~~g

~'r-PLAT

VCC

i ItJ

r

I

LoadAd'
eCloek'b
TP209

504

P20~CC

i P1

oc·1
1

15 I

~UL L nOWN S
e r' e din 2 0 pin p a '~a\18 0 1 - R1 ~

\~ATl20
PUa

MC2CAd.7

Ml':1 XWdiy

I
l.?,~ TP2~

13 8 9 8 -, L- R1 K

PlTi:;---~n P 2
TliTc--;~<1

.;J

MC'IAd.?

I

Gtm

( C Q nt

'v,v

1~l':2l':Ad.G

MC1 Ad.4
MC1 Ad.5

r-,

~ 7
;..I-:.:---------~
IIJ1 b1001:O

9
10102
02' ,•

SRC/DE5T

PULLUPS :

:. >

12
I

Q511 G
Q~I 19
07

~«
I

U1

7 r

...!.!JcrMCi 511;.;.L~p::...-__

5257

11 ,D 2

1-/2.

:
',-:D3
~-_u~E3

~~~~

7

iD1

b11 Hi:

DecrMC1 Stkp ,

2

g~~t~:.:>h::::~~~:~:~:

(J

I

CK

I

TP202
TP203<

COf-~

5.;,;"tk~p:.:...4...:.-_ _...:.1.::..2 :D5;03
S I ~(p.5

5RC/DE5T
clkAd'

532

S374

M C 1 Ad.3
MC1J\cIA

13 ;a1od)-,..;,.,;.,----'

F1.1

I

MC"II\(L2

M~ 1 A:J( .0'"

15

Q3!

SB

12~ 11

3

QOI..!:..----:M:.;;..:;C~1.:::A~d~.1::-----::4~g~

L,.!

...---..",...,--..".---;:"::,1)'-: 13 2

8

,-:.F_1:..:.. .::::.0_ _ _ _ ~a10c

--~S:":'lk-IJ-.1':"',----:e;~:-J;!OO

:2

"'01
17 I
5 :01 0117 Q1r'----.."S"""lk"""p-...".2--"""1,..:;1;...', '
,
10' U .
121D2
Q2

S32

9~

CTa 5 k.:2

j
25S09
~ IDO

..::<)11<12. 0

)

-jGND

i

RAA

I-CGND
13

13

3

= <

4: 3! 2 i PUa

PUa

MC7.CAcf.4

S86
RA.5

HIl._6~~ty

--

M9.!.Ad.f]0

12c

,b
3' b

:

if

!

i

'f;::,

'e

167:

RA.6

9

I

564

=re

10.

r~(\J(j

~":'--I--r-~V

MC2CAd.6

ai5
RA.7

I

,!

5

:

gty",e I~ 8MC1ComQ~

8
j-.:::.----

·S86

MC2CAci,5

4

MC2CAd.7

10

~

J-!..:--4--r-v
!,
!

a11

FPLAT
20
P1
[>20
9
'P2
P19f-i a
: P3
P18r- 7
,P4
P17r- 6
;~ P5
P16 f-o h
!P6
P15r-~
[~P7
1'141-0 3
~ PO
P13 H1 2
GND
1 P9
P 12 HI 1
......--------~ P 10
P 11 I"'ti

vee

~

vee

t

~

FPLAT
20
P1
P20 9
'.P2
P19r- O
P3
P18f-i 7
,P4
P17 f-i G
~P5
P16f-i 5
fP6
P15f-i 4
P7
PH f-i 3
PO
P13~2
GND
1 P9
P12 ~ 1
----------~P10
P11 ~

~

a1

FPLAT
20
P20 9
P2
P19-i!8
I
P3
P18 -fI 7
I
P4
P17-t 6
~~ P5
P16 ~ 5
} P6
P15'" 4
EtP7
P1 4 -f1 3
P8
P13 ""'! 2
GND
161 P9
P12 -fI 1
.;:;.;....:.:;;...-----.:...:::..:1 P , 0
P 11
p"

g1

~.

GND

vee

!

lp6

~

r-

P14~3

1

P13 ... 2
P12 .... 1
P11'"

P9

h1

FPLAT
20
P20 ~9~---:'''-::';;::'
P19f-i a
P18f-i 7
P17I" 6
~~P5
P1 6 r:9~< 5:: I[$~~~ :;:: IO:~":~: :5:: Imn::: 12

tED:: 1(~>:~~:5:: II:~J~>: :s:: 11:~~~>::5:: I(~~~>::;:: 13
tEn:: It: ~:H?:5:: II: :$~:5:~S:: Ir :~~:5:~5:: I( ~H?:5:: 14
I[

I:

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P1 9 ,... 8
P2
P19 B
• P3
P10'"7
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P10 '7
I
P4
P17-t 6
P4
P17
6
;~ P 5 f 1 P 1 6" r
~ P 5 9 1 P 16 5
} PG
P151" ~
P6
P15 4
P7
P141-i3
~P7
P14
3
(PU
P13i-o 2
(PO
P13
2
~
1, PO
P12··,
aND
l' pg
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1
- - P10
P11I-t
~':;;"'-"""'P10
P11

'1'

~

~

~

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FPLAT
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20 vec
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1>20 o
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7
I
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i
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4
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Pl1

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• P1
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; P3
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,1>4
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, PO
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l ' PO
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_:J:. _ _ _ P10
P11

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'1 P1
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19
vce
P19 1n
TrllleS-A.OO'a
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17
TrrnCS7I.Oi a
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T r m C 5 - A .0 '} a
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S""-A';':"+0-i-4~'a;"-'_-iG::-+P5 a11 16 15
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7 P6
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14
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*C-iS"';A';':'.+0~6~'a------:O:;-+ P 7
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1 :3
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12
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10 pg
P12'11
"-';';';;;"-~Pi0
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eS-A.OO'a

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~(';~?_-A';';'.~0~2~'a-----4Hp3
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pin pattern

1.

FPLA T
20
vec
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2 Pi
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17
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7 17'6
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'14
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9 PO
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12
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Pi'} I 11
.-;.;.;.;;.----~P10
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CS-A.03'b
CS-A.OII b
CS-A.Oo'b
CS·A.OG'b
CS-A.07'b
CS-A.OO'b
eS-A.OO'b
GND
GND

~

60 ohm series
plus 220 ohm pullup
16 pin netwo rk cente red in

;:3
4

5
6
7
0

9
10

FPLAT
20 vee
P20
P1
19
vee
P2
Pi9 10
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17
1 rrnCS-II.OJ! 'b
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14
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12
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5

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4
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7

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Pi
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P18
P3
P17
P4
P5 a1 ~16
)15
P6
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Pl
P13
PO
P12
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Pi0

Pre v e n t s G1 it c he son Wr i to II i g t. "'r-Lt-I-14W1
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Control Store Address& WE
"

File
DOes09.sil

Do S 'j gne r
Rosen

Hov
Gc

Date

Page

2/19/79
-,;~,-~

09

..•.

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Forces F's off so WDT is not restarted

Run/b
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b

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3/B/79

551

He\r E to Rev F

3/8178 Brian Rosen

1) Tile Clock D rivers on page 12 were moved from C1/ d1 to (110/ b1 B to eliminate waveform distortions dlle to
reffJlection6 at tile connector lila! caused false clocking on 60me board6. Thi6 necesilated moving the TPC-A
ll1ultiplexor(page 1) from 1J18 to g17, and the Wal~e-lJP enco(ier SOO Irom a18 to c06. Tile wake-up lines now have
long stubs on 1I111.i board. The lIiPri register WaS also moved up next to the SOO encoder (from 001 to cI06).

2) ll1e S30 at ~G tltat makes BPC-Rer' (page 10) il(l(i I3ludkpoint' added 10 il. This prevents Ihe APC·Rerili Irap
from occllrina when the sucessor of a breilkpointed instruction pOintb to an instruction which has Nexllnst or Nexlop
speciried.
3) The Irap location for Faull and APC refill were reversed by changin tile term on CS-A.11 from BPC-Relill' to
StiHtFdult' (S20 al 66 on page 9). Faulls trap 10 1, OPC relill Iraps to O. TI~is rorces a nexlin6t/nextop which botll
IWC refills dnd Faull6 10 Itit tile fault handler ralilel 111<111 tile BCI' handler.
,1) Tile EPROM socl\erts were cllanged 10 allow 27166 or 2750510 lJe pluggetl in. This removos all (Iepenciancy on tile ~ 12/·5
bupplles for bootlflO, and allows a 1 k boot program. This change also affected tho bil tested to l/etelfTline end of
boolload (from APC.OO to APC.05, thus allecllng TsIAPC.OO on [Jage 3 and page 11)
!l) A III:lW Clock WilS :l.ldded for 11111 EOM board (nos printer). Ttll~ clock, EomCfock, is a 35ns (nominal) squarewave, wilh
a clock ciriver. See page 12.
I:» finalteslability changes wore made, tlley include: a) A new signal, TasterDisabfe wllich is an ill(iependenl pullup resislor
011 a new plat at 82 (page 11). Tilis signal onabl!:Jslhe 5241 ofll:iage 3 which allows teslor control of TstAPC.05, [nable
IloolProm, EnabCIA. b)anolher now Signal, also an Independonl pullup (pilge 11) which allows lestor to force CSOp to sel.
c) elll S51 at 1J1 now lets Ihu teslor tlJrn 011 tile oscillatur witll a new 5ional-ExIClockEnab'. Tltis signal is pulled lip on tllO
oJ pial in&tead of [xtClock'. c)tlle clocl< lJoneralor flip flops Ciln IJe initializod by Ihe InitClk' sigllal, Wllicll is pulled lip
Ull lI1e 02 plat.
l) a mlflor Improvement was actlieved by eliminating tile S32 at ei6. Only one section was L15ecl (SHDala, page 10) ilnd
an unused S:J2 6&ction was available in tile 016532. d6 is now emply
RevFtoi-tevG '1/17/7[1 Oriann06on
1) lile cllip enables lor the TPC rams (control sections on pages 1 anc! 2) were rlln through an 5241 conlrolled by
DibatJl·eTester to allow tesler conlrol of APC in[JulS

1) The nun/a Signal was run through another tester controlled S241 gate 10 allow tester conlrol of tile EPJIOMs (page 11)
;]) Tile select input of 1.1113 data in mux for bils 32:35 of Ihe control store (page 8) was modiriod 10 rLln IIHough
cHlOtittH S2 t l1 gale to allow lesler conlrol of Ihedala inpul to Ihese 4 RAMs.
4) A new pull down resistor Wets added 10 Ihe e2 plat (page ·11) creating the signal TesterPuliDown. This is tile control
input to 11113 lestor S:'>41 (page 3)
b) Tile signal ChipSelect' (an input to all 2147 RAM chips, pages 4:8) was broken up into 3 separate nets, eachj led rrom
 E112) &0 that a delay can be inserted to reeluce the widlh 01 RamClock.
11) (15.13 (pg 12) is connecled to InilClk' ralher tllan 10 PUa.
12) Stack overflow logic is aeleled on pg 13.
13) Newlnst (use(i 10 be an F) is generated on pg14.
14ll\dLled TimeOut branch condition (pg10) and brought R-ParErr anti CS-ParErr to Ihe eelge connector (PI] 13).
eh anges to reVision Ga (2/18/79 - CT)
t) Cilanged all plals 1070 pins on logic diagrams to calise ROUTE 10 do no trace culs.
2) Added synchronizer on TimeOut (pg 10)
:,) Clwllued DOOH' Lo E53, CI rMPanol' to E55 (pg 10).
iO Acf(ie(1 spare IC's in positions f1, g1, hi, i1, 116.

Rev Ga to rev GIJ (3/8179 -

en

1) I\dded 93\), d1 COil pg 14. Tilis change keeps Newlnst from occurring when the first microinslruction of a bylecode is aborled.
RSII Gb 10 rev Gc (7/17/80 - CT) Eliminated signal PwrOool', cl1angedllFIJ registor clocking (pg 11).

rX[F{OX
.

!

IP roj ect

F00

DO

I

~~--~-,
.. 1"- ........ ~

,.~ .....

·,ll _ _

,;. ..... '..

Control Board
Change Ilistory
t':: ;::t:tMHt: .
_.

~

_

~

_ _ • __ _

F; 1 e
DOcsChanges.si

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noscn

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Gc

7/1 [3/[30

Page
15

Plats in locations: a7, a9, a11, a12

16
2

15

3

14

4

13

5

12

6

11

Nole: Bourns has maeie a cuslom nelwork lor Ihis platform.

10

8

9
all resistors 1/0wall

16 pin platlorms plugged into the middle
olthe 20 pin pallern
Pial in location e3

Pin 1 of pial goes in pin 201 palte rn

16
2

15

3

14

4

13

5

12

6

11

7

10

8

9
all resistors 1/4 wall
all capacilors Tantalum

Plat In location e2

2 --;'---1

3
4

6

--t-~

7

--t--~

2N2369

B --+---1

all resistors 1/4 wall

TIOX JP "oj ec t
:OD
DO
,I~"~~;~-

File

Control Goard
Platforms
~~:!~:! :'! $!

DOcsPlatforms.s
e::.,~4

4

Designer
Rosen
','

Hev Dato
Gc

Page

7/18/80
:--"

17
~~-'"

.cu••.::;-

H

G

F

I: ~:~~r:E::s (~:~~~:(S (~~:~~~::5 (~~~~:E::S (:~~19:: :51,

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~s mn:::: ImD:::: 1rE]:::: 1rE]:::: 15
I: :S:~~D C€'iliC5 crrn::: Imn::: IcrES::: 16
cr§:D::: 1t:$~;5:~ :s:: I[~~~:~: :s: IU~~:7:: :s: 1(~j~:7:: :5: 17
GE:CS::: 1(~~~:7: ::5::: I(~~~:~: :s::: 11:~:'~:7:: :5::: 1
I: ~ ~ ~:.~ ::s: I : ~ ~ :I:~ ::s: IU ~ ~:~ ::5: I : ~ ~ ~X ::s: I : ~ ~ ~:7: ::S: 19
(~~:1::S: ::I(:s:~4::5:

•

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1.111

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II

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••••

1

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I: ~ ~ ~:7: ::5: I : ~ ~ ~:~ ::S: II:~ ~ ~:7: ::s: IJ~l;~ t: :5:
(~?~:q:::5 (~:~~~:s::

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ffiffi:::: E:31:2:~;~~:~:::: I[~~~:~~~::::

1121:

~~~:~:: ::~ I:~~;~~~:::: 1:I:~i~:,: :~::: 1

errs::: I($?~>::::S I: :S:~~?:::5 :mm::: I§]"B::: 113 §]"B::: 11:$~p:~ :5:: 1(~1:~~: :5:: Ir~~p:~ :5::
Cill]::: 1[]1D::: IrJ:n~:::s (~:it~:::s CS3?,4, ,, ,S114 C§K31:~!?:8: :s:: I[~j?:~ :s:: 11:~1:~~: :s::
CEi:5 C1E5:::: IcrES:::: 1[]3D:::: IcrrD:::: 115 rES:::: 11~>:4?: :5::: 11:$j~:~ :5::: 18
rED::: ICED::: ImD::: IcrES::: Imr:s::: 116 8::: 1($??:4::: :51:~?:<~:::s [~1:~?: :s::
G:@::S::: 11:2:~~9?:S:: II:~~?:~ :5:: ICED::: 1[~~~:7: :5:: 117 C:s:~~j:::5 [$:lP:~ :5:: II:~jp:~ :5:: II:$~?:~ :5::
mID [2:~~9?:5~: 11:~?:7:4::::5 [$~?:7: :5:: 11?:~~9?:5:: 118 [~?:7:4::::5 CiliL5:: ImD::: ImD:::
cm:n:: I($??:~ :5:: I@):~ :s:: I(~~?>: :5:: 11:~?~:~~5:: 119 I:$~~:i :5:: 11:$~fi>: :5:: II:~~~?: :;:: 18:::
: ::: :: :: :: ::: :: ::: : ::: :: :: ::::: :: :: ::; :::: :: ::: :: :

20pins: A

18 pins: F

~:s

16pins: B

14 pins: C

22pins: D

: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : ::t==

24 pins: E

Nole: The sharI verlicallines indicate
filler capacilor locations.
(123 Tolal)

101 -700
1-100

Input
Address Compare

Shift
Address Register

~

4

~cldr.O'

5

~cldr.1'

12

Caddr.2'

S175
__
________________________________________
2
Caddr.O'
DO 00 3
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01 Q1 ~--~~~-----------------------4---------------~1~4~ X1
X=~~~~~~6
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12 Y1
10 Cadclr.2'
02
~~~~~------------------------~+---------------~1~1~X2
X-

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ODD _~_ _ _ _

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51 ,- I 0
3 25S09
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:~~: :5:: 11:~~~:2:tg:: 13 1?:~~~?:5:: \[9:Mn1:: 11~~~~?:5:: 11:8:~~~?:5::
mI:S::: ICillO §ffi:: I@:~~: :5::: 1[$?!:4::: :514 [$?7: ::::S [ill~<:::s 1?:~~~?:5:: 1(9:~H~Y5::
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I @E!5:: 1m1:5: I~I: 1X3:«o]: W~)!:~JI: 17 ~:m:o]: lim:r: ICED::: Im~>:: ]
............. , ........ 1.t~0r.! .......... ,...........

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C!E5::::: 12>~~::~~:5:::: II~H~::5:::: 111 [~~>:~ :5: :: :10££[[5::: :Imn:: I
(~!:(:"e::: I($~?>: :5:: ICili~]:: [~??:'1::::5 [~~?:(5:: 113 [~?:7:4::::5 r:iil3~ C1E:5::: irED:::
C~-?,~-]::: lCillO [~2.!~S §ill]:: It: ~i~~< ::5114 [~~:?:4::: :5 [}§3::: ICED::: ICED:::
r~!I~: :5!ED:::: ICE14~5: 1[~??:4::: :5: IDiD:
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115

116

[~?!J:~t5: ::I[S:~~91: ::l(ill§]: :IG]§:S: :1[2:~~{)~: 5:: I 17

G]§:5:: IrE~B:: :I[~~!!{): S:: :I[ ~~~:~: :: 5

(§3::: I[~?~:g::: l[ill§]:: I~:: 1[~?~:~~5::

C1:~~??:5::

110

Ir.iliis::: I[E§]::: I[~~~:~: ::5

\::::I:::I:·~~~;I~:::;~~:~:~:~~:~:.::~~~~~:~.::~. :::t::== ~ 1 ~ O
Note: Pinx marked with

20pins: /1\

16pins: B

• have 4700hm pullup resistors to + 5v.

14pins: C

22pins: D

24 pins: E

Note: Tile shur I vertical lines indicate
filter capacitor IOCCllions.

(143

Places)

16pin b REVERSEDlII
typical of MK4116: F

~J

~XI~-fJC)X
t~

:-

~

I~ Pro "
GC L f
i Memory Control Board Layout
J'

C~) LiDO

t.--1iI.......

~

--'

F-ile

dOrnemlayout.sil

Do.sinner
r hacker

Changes from Rev E to Rev F:
1) I\dc1ud 11113 signal Di&abltll12 (p\;I20,12) fOI lsst
:1) Hemoved 114Parit~rError' frolll lhe term IIIWX.1~m. -a
~m. -a

AO
A1
A2
A3
A4

00
01

12 M

12 M . 0

12M

11 M~1

11 MS.01

11MS.01

10 MS.02

10 MS.02

1CMS.02

MS.03

9 MS.03

02
A5 '14
A6 I
9
A7
03

0

MS.03

9

RF'
Y'!E!LBFB'
F93427
Of3X.2

l51~X_.3
l51~4
DI ~X.5
M WX.O-a

MWX.1-a
M WX.2-a
M WX.3-a

W FBBFB'

5
6
7
4
3
2
1
15

AO
A1
A2
A3h13
A4
A5
A6
A7

00
01
02
03

F93427

F93427

~!?O 4
11 MS.O 5
10 MS.O 6
9

MS.O 7

CS' CS'
13
GND
1

DBX.2
5
DBX.3
6
DBXA
7
DIJX .5
4
MWX.O-a
3
MWX.1-a
2
MWX.2-a
1
MWX.3-a 15

WFBBFA'

141

AO
00
A1
A2
01
A3
A4 g12
A5
02
A6
03
A7

1.11

GND

F93427

12 MS.04
11 MS.05
10 MS.06
9

MS.07

F1.0
F 1.1
F1.2
F1.3
F2.0
F2.1
F2.2
F2.3

5

12MS.04
AO
6
00
A1
7
A2
11MS.05
4
01
A3
3
h110 1CMS.06
2 A4
A5
.
2
1
A6
9 MS.07
15
03
A7
CS'

CS' CS'
1 13 1

11 MS.09

DBX.2
5
DAX.3
6
DBXA
7
DBX.5
4
MWX.O-a
3
MWX.1-a
2
MWX.2-a
1
MWX.3-a 15

AO
00
A1
A2
01
A3
A4 c7 0
A5
2
A6
03
A7

RF'

CS'

1 13/
GND

SF'

1.11

F93427

F93427

00 12 MS.08

GND10
MW
MWX.1-tl2
MWX.2-tl3
MWX.3-tl4

12 MS.O 8

00 12MS.08

11 MS.O 9

11MS.09

10 MS.1 o
9

MS.1

CS' CS'
Y'!,FBBFB'

WFBBFA'

14J

GND

00

12 M .12

AO
12
00
A1
A2
11
01
A3
A4 e7
10
A5
02
A6
9
03
A7

11 MS.13,
10 MS.14
03

9

13[

MS.15

12M .12
AO
00
A1
A2
11MS.13
01
A3
A4 eB
1CMS.14
A5
02
A6
9 MS.15
03
A7

M .12
MS.13
MS.14
MS.15

CS'
WFBBFA'

11i1S.00

1Ii1S.D1

NOXllnstOp'

SF'

HM7603
00
b8
01
AO 02
A1
03
A2 04
A3 05
A4 06
07
CS'

12

x.

11

cx.1

10 c)(.2
9

cx.3

12

cx.O

11

x.1

10 cx.2

9

cx.3

F93427
OBX.2
OBX.3
OBX.4
BX.5
BX.2
BX.3
BX.4
BX.5

5
6
7
4
3
2
1
15

BBFA'

5 01

c)(.1

1,2
AO
00
A1
A2
11
A3 110 01
10
A4
A5
02
A6
9
03
A7

cx.O
cx.2

12

02

cx.3

13

03

cx.1
C)(.2

cx.3

clkC

CS' CS'
13/

1.11 1

OND

F93427
5
AO
12 cx.O
6
00
A1
7
A2
11 c)(.1
4
A319 01
A4
10 c)(.2
02
A5

F1.0
F1.1
F1.2
F1.3
F2.
F2.
F2.
F2.

1f

A6
A7

03

CS'
SF'

1.111

GNO

c)(.3

9

CS'

13/

18 cx.O

4~~

.:..p.=.u:::.a_ _

16 cx.1

Ws240
14cx.2

PUa

Mise: Cycle Count Generation

SF'

5

00 12

2

BBOlso.O

~~
17
8

10Js

SBLasl

117

BBOiso.1

118

11 BB0161).2

119

500

....ll..~
17d

5283 CO ~
..!mBR.oo
MNBR.01
..!~NBR.02

..!mSR.03

12

00
EO
01
~
3 E1 h14
02
E2
~
5 03
~ E3
CI

*

HO
H1
H2
H3

1C TP014
13 TP015
1

TP016

4

TPO 17

[]I]
[]]II
[]1J

5283 CO ~
MNBR.05
MNBR.06
MNBR.07

12

DO
10
HO
EO
01
13
H1
~
E1
3
f14
D2
1
H2
~ E2
5
4
D3
H3
~ E3
CI

rlt

o:::z±]

5283 CO
12

MIII,IBR.09

rlt

MNBR.10
MIII,IBH.11
GNO

ALUA.02 11_
12
ALUA.03 14_
13

3
4
TP01a
ALUA.05 6
5
TP019
[J]ID-AhUA.Q6 11
12
TP020
[§KJ ALLJA.Q714_
13
IP021

DO
EO
01

HO

E~
H1
-143
c14
02
E2
H2
---45

013
6 E3

H3

13
1
4

12
11
14
15
3
2
5
6

~t!BR.13

trm.1-b
MNBR.14
MWX.2-b
MNBn.15
MWX.3-b

PUa

MNBR.OO

7

MNBR.01

03
B3

03

1

I

15 MNBR.03

2

MNBR.08

CEJ
c::BII

7

MNBR.09

TP024
TP025

[I£J

MNBR+-'
clkMNBR'

"'23'""
-:r2'2

22

-

02 b13
10
02
B2
15
03
03
B3

TPO
MWX
IPO
MWX.

~~~.
~~~.

7

TP04 3
MWX.C -a
1PV4 4
MWX.1, -a

10

5
~~~~.2-8

25509

DO
00
BO
01
B1 c1301
02
smx,~ l~
02
B2
ALUA.1514
03
smx.3 13
03
83

2

IP04 6
15 MWX. 3-8

10 MNBR.10
15MNBR.11

5B CK
r 91

1

I,

25509
3.
DO
1C
DO
I PJZo 4 BO
00
HO
EO
6
01
01
13
IPOZ/5 B1
01
E1
H1
11
02 b14
1 .. P } Zti 12 02 b1502
B2
E2
H2
14 03
4 ' pb '9 13
03
03
B3
H3
E3
CI
5B CK
MNBR+-'1 I 91
71
clkMNBR'
ALUA.12
ALUA.13
ALUA.14
ALUA.15

25509
2
DO
00
BO
7
01
01
B1

5B CK
1
CvcleConlrol+-'
91
clkXLevel'

2

~~g~f3
10 ~~~~~4

7

15

,I.

TP031
MNBR.12

~~~~~J

HM7603
b12 00 "1
AO 01-i
02
~ A1 03
A2
04
13
14 A3 05
A4 06
07

I cIT:

CS'

~
PDT

123

ALUA.12 3
smx.O
4
ALUA.13 6
smx.1
5
ALUA.1411

15 MNBR.Q7

TP02211441 ALUA.08
T PO 23

500

SB CK
1
CvcleControl+-'
91
clkXLevel'

91

25509
3
4- DO
00
BO
ALUA.09 ~- 01
B1
01
ALYA.1Q 11 02 c15
12- B2
02
ALUA.11 14_
03
13 B3
03

.:.J;

ALUA.12 3
smx.Q
4
AI,.UA.J 36
smx.1
5
ALUA.1411
smx.2 12
ALUA.1514
smx.3 13

10 MNBR.02

25509
2 MNBR.04
DO
00
BO
01
7 MNBR.05
B1I15 01
10 MNBR.06
02
02
B2

MNBR+-'
clkMNBR'

5283 CO .].

MI!IIBH.12
M'WX.O-b

2

13

SB CK
1 r 9J

CI
71

OBLasl

SB CK

~
10

ALUA.04

m:J

7L-

Mli'IIBR.08

~-

ALYA.Q1

MNBR+-'
clkMNBR'

71

..!~NBR.04

!

1193f-!b.UA.00

25509
DO
00
BO
01
01
B1
h15
02
02
B2
03
03
B3

MNBR.OO 1
MNBR.01 12
MNBR.02 13
MNBR.03 14
MNBR.041
MFn'jjto~
MNBR.06 7
MNBR.07 10
MNBR.08 11
MNBR.09 5
MNBR.10 4
MNBR.11 3

l

I....l.
Misc: BitBL T Control Registers

~

~!

,J

1

,J

,J

'i

TMW.O
TMW.1
TMW.2
TMW.3

F93427
5
00
Q AO
A1
7
A2
1 A3
01
3 A4 c12
2 A5
02
1
A6
15
03
A7
CS'
14f 13

12
11
10
9

TP047
smx.O
IIJ 04ts
smx.1
I P04\:J,
smx.2
IPOoO
smx.3

CS'
I

POle
TP030

91~
S133

GNO

'j

~

I~

3.1
GND

TP051

Pi
Ii-

5283 CO ~
SI3.2
M'WX.O-b

511.3

M 'WX.1-b

~ J.4
M 'WX.2-b
IT
M''WX.3-b

m

tt

5283 CO
GNO
3
00
HO
EO
JO
01
1 SBlast
81
ftl1
E1
AlUA.1011
3
02
1
IPlb£
12
H2
E2
ALUA.1114
03
4 JPUbj
13
6
H3
E3
CI
SB+-'
71
clk5B'

~
~

12
11
14
15
3
2
5
6

DO
EO
01
E1 d15
02
E2
03
E3
CI

HO

10
13

H1
1-12

1
4

1-13

ALUA.12 3
4
IP lJb4
A .l A.1 :313
5
IP lJ55
A .l A.1411
IP ~)5b 12
AlLJA.1514
]PJ5713

25S09
DO
.}
BO
00

.J

01
01
B1 813
02
02 10 SB;O
B2
03
15 SB; 1
03
B3
SB CK
1

I

91

25S09
DO
00
BO
D1
B1
01
814
02
02
B2
03
03
B3

2

SB.2

7

SB.3

,I

1~SBA

S374
2
3
DO
00
4
5
01
01
7
6
02
02
9
8
13 D3'13 03 12
04
04
14
15
05
05
17
16
06
06
18
19
07
07

SB.O
SB.1
ORO
OB.1

I
15 SB.5

CK

SB CK
SB+-'
clk5B'

flliLJ

1

I

91

1

5

5283 CO ~~

ffi:
DI3.0
DI3.1
GNO

~
3

EO
01

HO
H1

JO

E1 d14
02
1
E2
H2
03
4
6
H3
E3
CI

~
5

m

25S09
3
DO
00 .}
4 BO

r-2

DO
10
HO
EO
01
13
E1
H1
3 02 c11
1
2 E2
H2
5
03
4
6
H3
E3

.J

~

01
01
ALUA.1C 11 B1 d13
D2
100B;0
IP!lhH
12 B2
02
ALUA.1114
03
15 OB.1
JPU h!l 13
03
B3

AlUA.12 3
4
IPUbl
ALUA.13 6
5
IPUbZ
ALUA.1411
I POb3 12
AL"LJA.1514
I PUb4· 13

1

71

I

!J067
f-'068

F93427
00
~B~4---=7i-1A 1
......·-...-----IA2
4 A3
5B.5
01
OB.2
3 A4 c10
2 A5
OB.3
02
1
DBA
A6
OB.5
1Q
03
A7
CS'

12 TMW.
11 TMW 1
10 TMW.2
TMW.3

9

TPO 69
TPO 70
TP07l
TP072

CS'

POTd 14 1 131

.

91

25S09
DO
00
BO
01
01
B1 b11
02
B2
02
03
03
B3

CI
PUa

~,~2~
~066

SB CK
DB+-'
clkOB'

5283 CO
12
11
14
15

TP058 7

130BL~tst

7l

Of3.2
t11'NX.O-b
1.3
t11''t£K.1-b
01 J.4
M WX.2-b
or1.5
M WX.3-b

GNO

Tat

I

~S:~:~~--~6~AO

DO

'177

1178

OC'

11 1

clkXlevel'
GNO

SBX.O
SBX.1
DBX.O
DBX.1
BX.2
BX.3
BX.4
'BX.5

ALUA.083
2
7

1

I

OB;3

10 DBA
150B:5

SB CK
OB+-'
clkOB'

DB;2

91

Misc: BitBLT Control Registers

25S09

4 DO
BO

AlUA.096
5
ALUA.1 (Il1
12
AlUA.114
13

0

0

2

OBX.2

Ot
7 OBX.3
01
B1
02b10 02 100BX.4
B2
03
150BX.5
03
B3
SB (K

CvcleControl+-,1 1
clkX Level

9

TP073
TP074
TP075
TP076

MNBR.OO

1 B r.OO

DBX.2

1 B r.00

MNBR.01

•

~ 16,.01

DBX.3

•

14 r.02

§

~ 12 ,.03

1 B r.04

3

DBX.5

~

MNBR.Q~

15W5 '.05

MWX.O-b

7

r.06

.~ 16R.01
5240

r.02

6~"R.02
5240

§

~ 12,.03

r.03

§~'2R.0~
5240

3

r.04

r.04

17~3

MWX.1-~

15~5

'.05

r.Q~

Hi W 5

r.06

13~7

~

9

r.07

MWX.3-b

9

r.07

r.07

11

r.OB

~9

A.07

5240

5240

r.OB

PCX.O

MNBR.OB

2~'8R.08
5240

5240

5

R.08

5240

5240

3

A.05

5240

5240
MWX.2-b

R.O'

5240

5240

5240

14 r.06

r.01

5240

5240

5240

ill!J!

r.04

5240

5240

5240

5240

~ 16 '.01
14 r.02

DBX.4

5240
MNBR.03

2~ 18 A.OO

5240

5240
MNBR.02

r.OO

5240

5240

r.09

MNBR.09

PCX.1

16 r.09

r.09

.~ 16R.09
5240

5240
MNBR.10

14 r.10

PCX.2

14 r.10

r.10

6

Ws

1. R.10

5240

!!!:.1_

9

r.11

MNBR.11

3

r.12

PCX.3

r.11

PCF.O

r.12

17

WsJ

R.12

5240

r.13

PCF.1

15

Ws

5

R.13

5240

7

r.14

7

MNBR.15 11

r.14

PCF.2

PCF.3

7

r.14

r.14

r.15

7 R.14

"~9
5240

R+-PCXP12
Rshift

Mise: R Sources

13

R.15

.~~

______~~~____________________~B~B_F~A_'______~116

.....:.F..:1.:...1.:.....___....::3~S4
.....:.F..:1,.;,;.2;....._ _--=2""1S2

__F_1_.3;;;""_ _ _~S1
Nextlnsl' 9
NexlOp'

10

8

NextlnslO '

0

TP080

BBFA'

3 WFBBFA'
2

F1.1
F1.2

2.1d...,____
( 19)

~

re~~~~-------------------------------------~108

TP083

WFIlBFB'

4

FreezeResul1

6

Misc: F Decodes, PCF PCX
I

[]i]

~

__A
__
bo_r_t_'__________________

~~

~o~a~d~A~d-'--~

E

[]lIJ

LoadMIR

~g~~~ei~eQ~J~r-~1~38.d9a
_1_2__e_lk_M_IR~'__
~geCloek·2
l' .
S10

6

elkXLevel'

8

clkSB'

12

elk DB'

clkMNBR'

Prinler.-AlUA
o cle1
Ed e lock·2

RamClock'

4
5

3

clkPrinler'

~JA.OO

G::QW

3

PLO

'~'B

r.OO

4~'6

r.01

S240

aYL!.:.01

4

(IIg)

PI. 1

S240
49
.a.!dL!.:.02

7

14

6~12

(IIg)PLJ

Note: Th iCIND
H1n ~ a r r i eke
oot from
Alto during
debugging

r.02

r.03

10
20

1 b2b

i

b2c

S240

<3J]>

~JA.04

17~3

PIA

r.04

S240

allIA . 05
7

r.06

9

r.OI

all!,~.~P6

ill~,:,.o7
GND

10

vee

20

1

~1b

GND

1 b1c

11

2

~,O9

4

16

r.09

6

14

r.10

B

12

r .11

P1
P2
--;,,..;.:.;:...--~ P3
--;,,..;.:.:;:...---;;-t P4
.....:...;.;..:----,!~ P5 b2 a
P6

P16 ~p..;..;~P"
P15.....,..,-.....;rr;.iP14 ~~~=-P 1 3 ~=--:~;P 12 ~~~;P 11 I-+~~-=--

......:.~~~~P7

P10~~~~

-i~~--;H

-i~~--H

PB SPLA ~9 ~::;....:-:;;.:.:c.17

3

r.12

15

5

r.13
Driv

13

11

XEIROX

EOD

Project
DO

Mise Board
Printer Controller

'F il e

dOmise10.sil

'N 0 t e : Con ne c tor
is FEMALE 37-pin 0 shell.
Mounted in top slot.
Pin numbers shown are
lOO+connector pin number

Designer
Rosen

Rev Date
Ge 1/18/79

Page
10

3

~~~~--------~4HOO
~~~~--------~M01
~~~~--------~H02

S374

~~~~---------riH03

ao~--~~~-a1~--~~~-a2~--~~~--

f7

a3~r-~~~-­

~~~~--------~H04
~~~~--------~~05
~~~~--------~H06

a4~r-~~~-a5~~~~~-a6~~~~~--

--~--------------~07

a7~~~~~--

CK

LoadAdd'

Goe cle1
~~_lo~c~k-~1______~~

12

clkTimer'
TLoad'

L

PhO'

1

Ph1'

2

PhO

4

Ph1'

5

Phase2

2
Ph l' 12
PhO

Possible that branch during

R~Timer

Timers: Input Register

13

Ph1
Ph1'
PhO
PhO'

P093
P094

must be disallowed due to BranchBurp

RingState.O'

5

RingSlale.2'

7

F93427

~R~in:g;stla~l:e~.1~'::::::::6~:~

Sarnole TP099

00 1 2

~R~in~gS~la~l-e~.3~'------~4~A2
01 11
~Te-I:S~I~B~it~~~----~3~A3 h7
~~~~--------~A4
10
~R~in~gID~a~I.~CO~'~______~2~A5
02
Wake Pending
1
~R
11n~9I-il:[D;"a~t=-~0'''''----~1~
5 A6
03 9

Send

JPI00

Set Wake TP10l
Set Carry

T P 1 02

~~~--------~~A7

'---...;-t

i1

~~

ox

7

CS'

TP097
TestBi t

14/

CS'

13/

L..----+IX2

--~----------~~X3

~1

~R~in~g~S~ta~t~e~.0~'____~~2_1
Rin Slate.1'
14

F93427
5 AO
;rR;,;,inOil.;iS+,t8-:-I~e.~O.,.'----+-Ti
00 1 2
Ain 151ale.1
6
1
Ain 15tale.2
7 A
~R~in~1S";';\a~t-e~.3~'-----+----"!4-1. A 2
01
1

YOS153

V1
V2
V3

OV

J
02 J 0

~T-es~I~B~it~~--~-+-~3-1A3

-=R';;'n~lg-:;:D~a":"'t.'";:O':""
i
-----1-~2:-\ A4 i 7

e1

~w~ra~lk~ep";';en~ld~ii-ng----~~1:-\A5
~R~in~gD;"a~\=-C~O'~--~~1~5A6

03~

--~"--------~~A7

GND

DecrRing'TPI03

CS'

CS'

14/ 13/

RingState.O'
5
F93427
~R~in....
lg~S~ta~t-e~.1~'----t-~6-1AO
00 12
1
RingState.2'
7 A
~R~in....
1g~S-io"ta~t-e~.3~'---t----"!4-1 : ~ i6 01 11

~T~els~I~O~it~~____~_~3A4
riR~in~lg~D~a~t.~Q"~__~1-~2:-\A5
Wakepending
1
~A"'In;';';19~
Da~t-=~
0----+-"'!I1-.i-1
5 A6

10
02
03 9

--~--------~~-:-tA7

CS'
...
PD;;;.T.;..;e___-'-_1_4...,,'

WSlate.O

TPI04

WState.1

TPI05

WState.2

TPI06

WSlate.3

TP107

CS'

1 3[

LoadAdd
18

LState.O

WState.O

S241
16

LState.1

WState.1

S241
LState.2

6

~ 14

WStale.2

~ 12

WState.3

~S241
LState.3

8

~S241

L

PUb

~~Add

12

~ladCrnd

13

Timers: Data Control

5

GO
1
HO
12
H1
13
H2
14
3. B3
H3
S163
EP
T g7

3 RamAddr.O

TP144
18 RamAddr.O

S241

S241
5 RamAddr.1

TP145
16 RamAddr.1

S241

S241
7 RamAddr.2

TP146
14 RamAddr.2

RA.2

S241

S241
..!IUTa

9 RamAddr.3

TP147
12 RamAddr.3

RA.3

!!!w,Clock'

S241

I

S241

\

PhO

LOat .0
ngr)al.O
at .1
Ring[)a1.1
LOal .2
Ring[)a1.2

ris

~·L

Ring[~3

12
11
14
15
3
2
5
6

5241
g6i
1 EN'
1

I
P
JJ
P
P
P
JJ

pt-

I

1
2
10
6
4

"0

.'!
I-

1

2
0

PI

(j

h"J 27

!.!l1!.l.4
!!IlliIT:>a\.4
IJ'JaT:.5

RlI1g[:>at. 5
LOal .6
Ring[)a1.6
LOat .7
Ringr~7

12
11
14
15
3
2
5
-6

CO ~
00S283
10
o
HO
01
13
h5 H1
1
02
1
H2
:::2
O~I
4
1H3
3
CI

•

4

14c

IPl14

7

WOa\.5
WOa\.6

IPllo

WOat.7

name

S374

8

is

4

A2
A3
S189
DO
00'
D1
01'
D2
02'
03
03'
C5' WE'
3r
2

AO
A1 h4
A2
A3
S189
DO
00'
01
01'
02
02'
03
03'
C5' WE'
3r
2

I

~r-

I

15

I

P

16

I-' . ~
I-'
I)

I

~

7
8
13

',1

)

r--l.4-

RinoWrl'

12
10
6
4

S374
2 RlnQSlale.O'
00
5 RlnQ5Iale.1'
D1
01
6 RinQSlale.2'
D2
02
9 RinqSlale.3'
03 h2 03 12 RinqOal.O'
D4
04
15 RingOat.1'
D5
05
16 RinoOal.2'
06
06
19 RinoOal.3'
07
07

3
-4 DO

p-H1f[

CK

I

11

11
9

OC'
1 I POlo
ReadClk'

D '

7

D
D

0

P
RinoWrl'

AO
A3
S189
11
00
00'
9
01
01'
7
02
02'
5
03
03'
C5' WE'
2
3

4

P I.
iJ
fJ

5374

IT ,

2 RinQOat.4'

5

RingOat.5'

6

RingOat.6'

9

RinQOat.7'

13c

0

I.
I.

7

8

1

I

5374
13d

--g374
13e

I
(

RingWrl'
ReadClk'

1LPUTb

MISCi9.

p
p

~?

~4
13b

!r :!

11

7

5

P
IT

~iJ i- A1 h3
-~ ;... A2

4
5i
CK OC

Ga

11
~

12

19

i4e

s\

pr'om

S374
i4d

IPllo

Note: on modified
Mu . thy i r~ b 08 r~
:WJJck,k'
ChlP 'IS ln POSltlO, u v .
F93427

S374

TP113
WOat.4

Slli.!L!J
The

~
~

1-1- ~

71TP11?

5374
i4b

AO

5 A1 g5

I

3

1

PhO
13
4

RamAddr.O
RamAddr.1
RamAddr.2
RamAddr.3

5374
WSlale.O
3
2
DO
00
WSlate.1
4
5
D1
01
WSlale.2
7
6
D2
CO~
02
WSlale.3
8
03g4 03 9
00S283
10 TP107WDa\.0 13 04 .
12
04
1HO
0
TJ-ll DH WOat.1 14 05
15
05
01
~
WOaI.217 06
06
:::1 f4 H1
WOal.318 07
07
02
1 TP10C
:::2
H2
CK OC'
0:1
4 TP111
1H3
11
3
1L
ReadClk'
CI

d

S241
h6j
EN
19

13

POTt

811

~

....,

5374
13J
1CK OC
111 1 POl

12

S04

-

.;.W;.;a;;,;,;k_e,;.;,R,;j,.,.__~ 02
Wrl'

8

13

03

Phase2'

Timers: Ring Ram and Addressing

18

S374
3 00
00
4
01
01
7
02
02
03
03
1
e3
D4
04
1
05
05
1
06
06
18
07
07

RlngState.O'
RingState.1 '
RingState.2'
RinqState.3'
RinqDat.O
:.Rln~jDaI.1

]!1n 9 Da 1. 2
RingDat.3

CK
SelWake 2
Ph ••• 2 13
Ram~ock1

R+-

J~

.nD
5.nU

OBSB4

Rshift

111

2
5
6

9
12
15
16
19

r.OO
r.01
r.02
r.03
r.04
r.05
r.Q(j
r.07

S374
3 DO
00
4
01
01
7
02
02
3 03
03
1
D4 e2 04
1
D5
05
1
D6
06
18
D7
07

RingDat.4
Rin~Oat.5

RinqOat.6
Rinc; Dat. 7
RA.(
RA.
RA.
RA.3

9
12

11)
16
19

12
S10
R+-Timer'
6

9 e6d

-.n

8 R4-Timer

PUb

4

S04

2

~lI:M..-----~O

8

r.OB
r.09
r.10
r.11
r.12
r.13
r.14
r.15

CK OC'
11
1

OC'
1

S32

fh1

2
5
6

ReadClk'

6

I

S' 0 5 RS2321nBit

3

tBIt

hBc

o

1'102 Phase1Next.'

0

S175 0 '

7
6

TranPh1'
TranPh1
1~~6~w~a~k_ep~3~'_ _ _ _ _

CL:J

10 Tranpl(

J1

TrpnPl(

2

b-l3~W.:.:..:.:a.:!;ke:::.:p...::2=-'______---1 6

PUa
E

~--f.Y.2..
--v;:-

Note:

Timers are device 14
It is known that task 15 never
competes for wakeups.

Timers: Output,Logic,Wakeups

RS2320utBil

2

~~3;:....:.T~O:;:.:at:.::.a_ _ _ _ _ @Y

Rdat

~5188

25~C~T~S~______~~

16

r.09

14

r.10

12

r .11

H2.

H2.09

~1~1___
0T~e~r~m~R~d~__ ~

H2.10-

H2.11

SE1g

H2.12

13 ~:;4 112

H2.13

141 ::;4 ~5

25ro-C~a~r~ri:.::.e~rO~e~te~c~t_~

3

r.12

~ RCVClockln

5

r.13

TOata

r.14

26ro-T~X~C~I:;:.:oc~k~ln~_~~

SelTime

IntPending

r.15
_H_2...,.1..,4_ _1;.;,7"""Ef 6
GNO

1 VEE

18

1.2.15

r;;:;:--,

19

R+-NBR'

12

Rshilt

13

R~232InB"

Ne)(tBitToGo

L~

2

~ 1§

sW~

r.O§

Not e : The con ne c tor is a 25 - pin MA LED 1,
mounted in the bottom pdsition on the card
The pin numbers shown are 250+real pin number

ClkRS232'
[NO

RUN voltage sensor

Note for PC Layout:

;H~E--+---~P1FPLATP20 ~i-r--I-""""~
----~~.-~P2

P19
................;;;.+P3
P18
1-,.=--::-+ P4
P17
~=--..;H-P5
P 16
P6 83 P 1 5 r-::..:;--.::::.:..:.::~~--;'''''P7
P14
~~~P8
r---,.~--'!~P9

'-';";';;;"~P10

P13~~~~~
P 1 2 !-;':i+--~'--

Test pulldowns (3300hms)
~P..,;;O....
T,.:;:.a_.......:;;..! P1
-:P..,;;O....T,.:::b_--:;;..! P 2
POTc
POTd
POTe
POTf
POT

GNO
,

P11

Mise: RS232 Interface

PUTx and POTx all have independent tes

GNO

19

VCC

29

I
I

a4b
a4c

.

G NO

FPlAT
P20
P1
P2
P19
P18
P3
P17
P4
P16
P5
j
P6 81 P15
P14
P7
I
P13
c P8
P12
1 P9
P11
P10

2Vee

:

~9
~B
1-0
1-0
1-0
1-0
1-0
1-0
f-ti

~

7
6
5
4

j

3
2
1

GNO

\

1

FPLAT
2Uee
P1
P20 9
P2
P19~B
P3
P1 B 7
P4
P17f-i 6
P5
P16 ~ 5
P6 82 P15 ~ 4
P7
PH H 3
PB
P13H 2
P9
P12 H 1

~~--~P10

P11~

FPLAT
P1
P20~~P2
P19
P3
P1B
P4
P17
P5 a9 P16
P6
P15
P7
P14
PB
P13
GNO
P9
P12
------~P10
P11

Mise: Spare IC's

GNO

FPLAT
2UeC
P1
P20 9
P2
P19~8
~ P3
P1B 7
P4
P17 6
P5 b3 P161-i 5
P6
P151-i 4
P7
PHI-i 3
PB
P13 I-i 2
1 P9
P12 I-i 1

GNO

FPLAT
2uee
• P1
P20 '9
P2
P19 f-t B
P3
P1Bf-t7
P4
P17 Hi 6
P5i19 P16 5
P6
P15 4
P14~ 3
P7
PB
P13J-i 2
1 P9
P12 ~ 1

I

~~--~P10

~----~P10

P11~

P11~

1) Added signal OateALUParity and inverter to receive it (Pg 1).
2) Deleted signal MC2EnableRP' (Pg 1).

Chanl~es

for rev F to rev 0 (10/17178· C. Thacker)

1) Reduced number of outbound R5232 lines to 4. Looped R5232 data back on R.14. Added
5etTime as bit 11 in the output register (goes to E48). AddedlnlPending as bi110 of the register.
All changes on pg 15.
\ '
2) Terminated PI.CI • PI.4. Used R bus drivers P1.5-7 for voltage monitors.
3) Added a11 e, b6d, b6c, e6f on pg 3 to cause IntPending to dispatch to OpcodeO on Interrupt.
4) Added test pullIJps and pulldowns.
5) Added + 5 monitor at a3 (pg 15) to control RUN.
Chanl~es

for rev 0 10 rev H (1 14179·, C. Thacker)

1) IBrougnt signallnstReadingR to E018 (pg 2).
2) h17 pin 7 was Newlnsl',ls now 5pareF2, connected to E10S
3} Newlnst' Is now connected to E005 rather than to h17.7.
Note: Control boards with revision (I must have EOOS jumpered to E105 on the backplane.
4) Removed the lirne-to-task counter (a9) and freed inverter a12d (pg8).
,5) Terminated PO.a-7 with splat (R-pack) at b2
16) Added InterfacePower signal (short-circuit protected + 12V) to Printer Interface connector
Changes for rev H to rev I (1/18179· C.T)
1) Changed layout· g11s 5241, not 75188

:2) Modified platforms b1, a3.
:3) (JOg 1) b17.1 Is GNO, not POTr.
4) (lOg 10) b1.9 is VCC, not GND
15) (lOg 10) Added 5241 driver for PO.0-PO.7.

(note - early etch boards will NOT have this change)

tS) (pg 12) 16.14 is POTe, not LoadAdd
'7) (pg 13) 14.1 is POTf, not GNO

ChangelB for rev I to rev J (1/31179· CT)
'1) Changed E18 from InstReadingR to InstReading5tack (pg2). Corrects a bug in overflow checking

Note: Revision J

= Revision Oa

Changel&lor revision Gs to revision Gb (10/14179 by eT). Fixes interval timer inaccuracy.
Note: This change comes In two flavors: Revision Oa multiwlre boards have 2 extralC's mounted In spare positions b3
(03427) and b4 (7451 0). In the Multlwlre Ob version, the 510 Is in position b4, but the 93427 replaceslhe 5B51n
position i9. The logic diagrams show the revision Gb multiwlre version of the change. To modtfy a revision Ga multlwire
board, proceed 6S follows:
In the steps below, pin numbers are those of the chips, not those of the 20 pin sockets used to hold the chips. Chip
b4 is mounted with pin 7 in pin 10 of the 20 pin pattern, b3 is mounted wllh pin 8 in pin 10 of the 20 pin pattern.
All wiring Is to be done on the back (non-component) side of the board.
1) Add an 510 In POSition b4 and wi re b4.14 to pin 20 of the pattern (Vee).
2) Add a 93427 (programmed) in position b3, and wire b3.16 to pin 20 of the pattern (Vcc).
3} Lift pins b5.1, !bS.2, and bS.3.
4} Remove chip i'61 and Jumper i9.6 to i9.8

12) add b3.4 to f6.19

5) Add bS.1 to b4.1

13) add b3.3 to e2.13

6) add b5.2 to b4.2

14) add b3.2 to e2.14

7) add b5.3 to b4.12

1S) add b3.1 to e2.17

8) add b3. 14 to b3.13 to b3.B

16) add b3.15 to e2.18

9) add b3.5 to f6" 12
1 0) add b3.6 to f16.15
11) add b3.7 to f6.16
Changes for revision Ob to Oc (7/17/80 - CPT)
1) e18.5'" gnd (pg. 2) This causes memory reference Instructions to Interlock when referencing base registers

1'7) add b3.9 to b4.13

Title

DO M ISC board Changes

File
DOMISCChang

Date

7/17/80

G

H

I

F

o

E

MALE 25 PIN CONNECTOR!

C

A

B

IFEMALE

37

PIN CONNECTOR

QE5::: I( ~~49:::5 1~~4~::: :58::: I(~~~:q :s:: 11
COllin [$??:~:::~ @illS::: 1[[3::: I[~??:~:: :512

(~~~:~:::5 (~~~P:: :;1 I~~~:~

(~?Y~:::5

(~H~:;:: I( ~~t1:::5 (~~~~~::5 (~!. ~:~:: :;

wn: I (~:~t~:::5 (~~~9:::5 (:~~t~:: :513

:5:: Imn::: 14

:5: I(~~:~~r :5

[~:~H:::5 [$~~:~:: :~I I r.~~t:s: II:~~:~~~: :5

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(~?:7:~:::5 I:~J~D:: II:~??:~:: :sl:~~~q
•

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,

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17 I~~H?:;:: 11~~H?:5:: I(~~?:~ :5:: II:~~~:~:: :5
8
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1?:~4~?:s:: I(ED::: I[~~~:~t;:: 11?:~4~?:5:: 11?:~4~?:s:: 19 cm::s::: 11~~t~::::; [~~~:~:::5 (~~~~~: :s
::::::: ImD:::: 1[~~~:2:~5::: 1[~~~:~~5::: Icm::s:::: 110 lEE:::: 11?:~4~?:5::: 1[~~~:~~5::: IrnES
[§En:: 11~~4H:5: :11~~4H:;: :1(~~49: ::; ro::: 111 rnn:: :11~~~~::s: :II~:~~??:;: :I[]E]:::
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(~J>:~ :5:: I[ ~>:ru:: I~::: Imn::: ICES::: 117 ~::: 1rE:5::: I[~~?:~:: :5 mn:::
1:~~:3:~J:: ICillD:: I[ :~~~:~::; [~~~:~~;:: IC§D::: 118 [~~~:q:: :5 mo::: I[~??:~:: :5 Cill3:::
(~~+~:~:5 (~tpg::: 1(~??:~:::5 (~~~:~~s:: I(~~?:~ :;:: 119 ($?:7:~:: :; mn::: IIH~?~~5:: Irnn:::
1?:~4~1:5:: 11?:~4H:5:: I[~~~>: :5:: I(~~?:~:: :;1?:~4~?:;::

• """1111

""""'"

.1,' • • • • • • • •

II"""",

I •••••

'.1 "'11""

••• ".11 •••

""

II " 1

••

:::::::::: :::::::::::::::: ::::::::: :::::::::::::::

. 20pins:A

L:::3

I

16pins:B

~

14pins:C

c:::3

22pins: 0

,.1..

,.1.1.1".,

I'"

1.1',.,

•••

1.111 •• I

II,

""'.11

"1,11.11, ••••••••••

1.

::::: :::::::::::::::: ::::::::: :::::::::::::::: ::: ::1==

24 pins: E

101-200
1-100

Nole: The short vertical lines Indicate
filter capacitor locations.

XEROX
DO Mise Board
F 11 e
Des 19"e r
(~, __~~__________________~_DO_M_iSC_L~ay_ou_t.s_il~T_h_ac_Ke_r____~~____~

SPLAT b2.

SPLAT at b1
1
LED

1.2K

fi

;;~6

16

I:

16

I

0-

3.6 K ohms
"V'V"..

0-

1 K ohms
"V'V"..

0

0..-

B.2K ohms
"V'V"..

0

0

1 K ohms

0

"'V"/'..

1 K ohms
D----vv'V-

0-

1 K ohms
"VV'"

0
0
0

(Page 1 0)

Beckman PIN 898·5·R220/330
Xerox PIN (7) 703W30491
(Page 10)

FPLAT a3
SPLAT at a4
330 ohms

0-

'V'V'\,

16

1 K ohms
1 0

"V'V\.

0

0

1 K ohms
'"VV'.
1N747A

0

0

0

::N

0

0

0

0

330 ohms

0-

'V'V'\,

330 ohms

0-

"'V"/'..

150 Ohms

330 ohms

0-

'V'V'\,

'V'V'\,

"V'V\.

0

1 K ohms

330 ohms

0

020

0

330 ohms

00-

'V'V'\,

330 ohms
"V'V"..

0

0

0

0

0
(Page 15)

1 K ohms

0

'V'V"..

0

0

0
(Page 15)

I

XEROX
EOD

DO MiSe Board PlatForms

File

Designer

DOMiscPlatf rms.sil

Date
7/17/80

--I--..--------~------------------------------------~------------~------------------..----------..

R36

6VNiCad
CS904
l
1v2-.....-w-l+---,--_.......Ll'I'1

~----,~?

6.311AC

1.0 Mhz

rv

J3

[L:}-----J

1M
26

KO

Ma;lIol'Y
TT15l(50A

2
PiiotPower

3

J

50

28

5

VDD

INIT

VSS

24R38

27
HALT

OSCO

25

OSC1

K1
TMS1000C

K2

rC6

Jv

C11

uld
tant

1k

R21
R20

Unle55 otherwise specifieg:
All Diodes 1N4148
All NPN MPS 6531
All PNP M PS 6534
All Hesistors + -10% 1/4W
All Capacitors Ceramic
NOH: DO + 5 Powers
IC's N123, S02, LS14, S38, and
74C925
Bypassing: .01 ullicap lrom DO + 5
to gnd. at each IC (5 places),plus
one 50ullanlalum from DO + 5 to
gnd. (Mallo ry TT 15X 50A) C 1.

J2
J1

!2

r:-r-CD J2

ODOlf'

\V L [ O J 1

R3

220

r---.......- - -......,..~ DO+.5
J1
[=~[]ClrMPanel' 8
f.!:!.!BQot

Pin numbers rellect M&M layout
lor CSL EMS model DO

rC1

R-ParErr

5.~~

9

11

74C925

IC4

5

LATCH

A

8

"13 47

R8

14

~MPanel'4
12
47

5

1000's

330

10'5

100's

9

1'5

11 16

B

11

J1

I

\ RIg

10 15

C

[7

PilotPower

~

CS-ParErr

R7

88 8:8:
LEDl

LED2

d

MAN6640

13

J1

5
J1
[].::J

EROX Project

~

CS-ParErr

v
R-PprErr

File

Designer

Rev Date

Page

____~________
-L__________________________
~~____________. .______________~__~__________~_________
Maintainance Panel
EOD
DO
01
DOmpO"I.sil
Gc 6/11/79
Rosen

Panel

7--.__--_

- - - Component side of PWB

-""-.. . .---===-.1-----

0.150

----------1

N iea d b a\ te r V

6.40

--=t- ..--+--------.....---------1---,

+-

1

~j~\~OO
2.90

1
J2-2
J2-1

2.00 - - - -

1.20

LJ8E[8B~--t-t-+pin 1

-10.70

.J LEDl

r-

START

2

S1

LED2

2.50

---l-2.50

OFF

S2

.•

CL--

3.20

J3-2 •
J3·1 •

~

MotEls:
1) Mounting holes.1 BB dia, 6 places
2) 7-segment displays are Monsanto MAN6640. Package Is 1 B pins, 2 rows on .6 centers. Pin 1 Is as shown.
3) START and OFF are C&K 8221 Momentary contact bUllons with .465 square button.
4) J1, J2, and J3 in the schematic are not connectors, but are closely spaced groups of holes suitable for connecting
discrete wIres.
5) The TMS 1 OOOC is a 28-pln DIP. Pin-to -pin spacing is.1 00, row 10 row spacing is .600.
6) The NiCad bat lery will be attached to the board with two cable clamps secured to the mounting screws.
7) Pin 1 of these LED's Is the side containing the marking "MAN6640".
B) Note that switches must be oriented with

I

"c"

and "NC"as shown.

!

Project
XERO X
EO!)

-

DO

Maintainance Panel

File
DOMP02.sil

Des"igner
Rosen

Rev Date
Gb 4/27/79

Page
02

Originally released as rev Ga.

Changes for revision Ga to Gb (4-27-79 CT)
1) Changed IC2 from 538 10 N3B
2) Changed CB from 100 pf to 200pf
3) Changed R2 from 470 ohms 1047 ohms (inilialloading chart was incorrect).
4) Removed components C13, C14, and R39
Changes tor revision Gb to Gc (6-11-79 CT)
1) Added .01 uf cap and 1 k resistor in series with PnlBool. This is Ihe line that boots the machine; \his
change cal-Ises the boot signal to be a negative-going pulse at the end of the -700ms time delay thai
starts when the boot button is released.
2) Added NPN emitter follower to signal TimeOut to assist the feeble CMOS output of the TMS1000C.

:ROX
::00

-

P ('oj ect
DO

Maintainance Panel Changes

File
DOMPchanges.sil

Designer
Rosen

Rov Date
Gc 6/11/79

Page
01

5 chips

Block 0&1 bits 16-31

o{ffi

~

2

Sio rOu I .00'

-

3 bSlorOul.OO

8T96

,m

StorOut.01'

4

~bSlorout.01
8T96

oI@ StorOllt.02' 10

4

v94b

...... 9 bSlorOut.02 12

-

8T96

'ill StorOut.03'

5

v94a

~

6

v94d

i~ StorOut.04'

~

2

7 bSlorOut.03 13

4~

[1~ SlorOut.06'10

D

l2

SlorOut.07'

3 bSlorOut.04

5

"" 5 bStgrOut.05

4

"" 7 bSlgrOut.07 13

~

4

StorOut.10' 10

6

3 bSlorOut.08

5

-

5 bStorOul.09

~

9 bStorOut.1 012

~

~

SiorQul.14' 10

5

Keep stub
sho rt
Lo"a(ji~J-~
~ :'i- v89a

4

---d

on
on

12

S10

91

1

uS6e 0'

K

LS175
0

LS175
0

lS175
0

o

4

lS175
0

o

I

1

39b
14BankOOolJt.13
K16-3f
Bank1Doul.f3

1

,II

LS175
u52f
CK Cl'
91 1

~U18b
4

,I

lS175
u56f
CK CL'
9
11

91

1

I

oads on 2nd word of trans ort

SlorEeOul.O'

SlorEcOut.1'

4

15 EvnDb1W.03

B u4ge
25S09
D
0

5

11
12

EvnDb1W.04

7

EvnDbIW.OEi

25S09
D
0

10 EvnDb1W.06

25S09
D
0

lK pullup resisto
pup 9 I v68
PUP1 15
PUP2

12~

v§!J

15 EvnDb1W.07
PUP3 15

Bu538
25S09
D
0

1 u45

2

EvnDb1W.08

7

EvnDbIW.09

1 v68

25S09
0

BU57e
25S09
D
0

10 EvnDb1W.10

BU57d

25S09
0
0
B
u61b
25S09
0
B
u61c

6 0

"5

'-3"

25S09
0
0
B
u61e

15 EvnDb1W.11

2

EvnDb1W.12

7

EvnDb1W.13

10 EvnDb1W.14

15 EvnDb1W.15

00

Bit Locations
01
10

1
S8 u49f
9
CK
25S09

3
4

25S09
0
B
u62b

o·

25S09
0
0

5

2

13it8 0EC -3
B-its 32
t~p of 5 25S~IC 4-7
s e page 14 . or othe

BioekSel2a
clkOulou IReaa
LoadW1

25S09
0
0

6 0

14

Bank1Doul.f5"

T

10 EvnOb1W.02

'25S09
11
0
0
12'
B
u61d

Bank1Dout.14

I 14BankODout.15

K16-31

lS175,1
u60f
CK Cl'

I

PUP1

I 14BankODollt.14

K16-31

25S09
0
0
B
u49d

BU57b

3
4

u17b 14BankOOout.12
K16-3r
Bank10olJt.12

~ u40b

u60e 0'

Bank1Dout.11

EvnOb1W.01

B u4ge

25S09
14
0
0
f3
BU57e

I 14BankODoul.11

K16-31

K

u60d 0'

8T96 wOOe

,II

114BankODoul.10
K16-31
Bank1Doul.10

7

BU53d

3
4

I

~U36b
1

11
12

u13b 14BankODout.08
K16-31
Bank1Doul.08

PC

25S09
0
0

EvnObIW.OO

Bu53b

Bank1Dout.07

K16-3r

u60b 0'

7 bSIorOul.1513

I

I 14BankODout.07

25S09
2
0
0
B
u49b

6 25S09
510
0
I Bu53c

14
13

~ u14b

D

9 bStorOut.1412

lS175
u48f
CK Cl'

Cloc~

Loadl

~

6

~ u10b

Bank1Dout.06

1

u60e 0'

5 bSlorOut.13

I 14BankODout.06

K16-31

lS175
D
0

o

8T96 wOOd

!1} Sio rOut.15'

lS175
0

lS175
0

o

8T96 wOOb

o lD-

1

u56d 0'

..."
...., 3 bStorOut.12

4..

~ u32b

u52d 0'
lS175
D
0

I

u31 b 14BankODoul.05
K16-31
Bank1DouI.05

o

8T96 wOOa

ID StprQut.13'

LS175
0

M

LS175
K35b
14BankODoul.09
0
K16-31
Bank1Dollt.09
u56b 0'

4

..." 7 bSIorOul.1113

2

~ u6b

u56e 0'

8T96 v9ge
~ StorOut.12'

11
12

3
4

o

~

c

I

u28b 14BankOOout.02
K16-31
Bank10out.02

LS175
K9bl14BankOOOUI.04
D
0
K16-3f
Bank1DOut.04
u52c 0'

u52e 0'

T96 v99d
[[}- StorOut.11'

1

6
5

14
13

D

8T96 v99b

o

lS175
0

-..... 9 bStorOul.06 12
8T96 v97d

2

~

3
4

114BankODoul.03
K16-31
Bank1Doul.03

o

u52b 0'

8T96 v99a

@

o

LS175
o
0

8T96 v97e

l§-.S1!LrQ ut.09'

lS175
0

8T96 v97b

6

[JHJ StorOut.08'

I

lS175 K 2 7 b
14BankOOout.01
0
K16-3f Bank10out.01
u48b 0'

o

u48e 0'

8T96 v97a

'W StgrOuL05'

o

u48d 0'

8T96 v94e

o

I

lS175
KU5b
14BankOOout.00
0
K16-31
Bank100ut.00
u48e 0'

2 EeOala.O' 4

5 SlorEeln.O

115

w5b
2

3 StorEeln.1

10EcOala.2'12

11SlorEcln.2

7 EcOala.1'

114

BU62

eID

SlorEeOut.2'

12

IT@

SlorEeOut.3'

13

25S09
0
0
B
u62d
25S09
0
0

15EcOala.3' 10

EDD

Project
DO

Storage Card
Bank 0, Most Significant Bits

File
DOstor01.sil

Designer
Rosen

9 SlorEcln.3

107

w5d

BU62

BROX

108

Rev Date
B

1/26/80

Page
01

Block 0&1 bits 0-15

~orOut.OO

5

LS175
D
0

4

LS175
D
0

u46c 0'
bStorOut.01

K
K

u46b 0'
bStorOut.0212

LS175
D
0
u46d

bStorOuL0313

u46e 0'
.b..StQ(Qut.04

5

LS175
D
a
u50e

a'

4

LS175
D
a

bStorOut,Q612

LS175
D
0

bStorQut.05

u50b

u50d
bStorOut.0713

LS175
D
a
u50e 0'

bSto rOut .08

5

LS175
D
a
u54c

bStorOuL09

4

bSto rOuL1 0 12

a'

LS175
D
0

LS175
D
a

a'

5

LS175
D
a

4

LS175
D
a

u58e
bStorOut.13

u58b
bSto rOut.14 1 2

a'

K
K

u29b 1 14BankODout.21
K16-31
Bank1Doul.21

25S09
6
D
a 7
5 B
u51c

. 1

11
12

rL

u8b 114BankODout.23
K16-31
Bank1Dout.23

14
13

~

a'

LS175
D
a
u58e

TL
rL
4

u12b 14BankODoul.27
K 16-31
Bank 1 Doul.27

K

H
1

~

a'

25S09
D
a 15 EvnDb1W.23
25S09

a

4

2

EvnDb1W.24

Bu55b
25S09
6
D
a 7
5
BU55e
11
12

EvnDb1W.25

25S09
D
a 10 EvnDb1W.26
Bu55d

25S09
14
D
a 15 EvnDb1W.27
13
BU55e
25S09
3
D
a 2
4
BU59b

u15b 1 14BankODout.28
K16-31
Bank1Dout.28

6
5

u37b 1 14BankODoul.29
K 16-31
Bank 1 Dou 1.29

25S09
D
a 7

EvnDb1W.28

.

EvnDb1W.29

Bu5ge

I 14BankODout.30

K16-31

EvnDb1W.21

25S09
D
a 10 EvnDb1W.22

~ D

I

~ u38b

.

B u51e

I

u34b 1 14BankODoul.26
K16-31
Bank1Dout.26

EvnDbIW.2Q

B u51d

u11 b 14BankODout.24
K16-31
Bank1Dout.24

1

I

BU47d

25S09
3 D
a 2
4
B u51 b

1 14BankODout.22
K16-31
Bank1 DoUt.22

M

EvnDbIW.17

25S09
D
a 10 EvnDb1W.16

u7b 114BankODout.20
K16-31
Bank1Doul.20

~ u30b

:J4

EvnDb1W.16

25S09
14
D
a 15 EvnDb1W.19
13
B
u47e

114BankODout.19
K16-3J
Bank1Doul.19

I

a'

LS175
D
a
u58d

bStorOuL15 13

~ u4b
:J4

I

u54e
bStorOuL12

11
12

Bank1Doul.18

LS175
D
a M U 3 3 b 14BankODout.25
K16-31
Bank1Dout.25
u54b a'

u54d 0'
bStorQut.1113

25S09
6
D
a 7
5 B
u47c

I 14BankODoul.18

K16-31

a'
a'

I

u25b 14BankODoul.17
K16-31
Bank1Doul.17

~ u26b

a'

LS175
D
Q

25S09
3 D
a 2
4
BU47b

u3b 114BankODQut.16
K16-31
Bank1Doul.16

11
12

Bank1DOUl.30

25S09
D
0

10 EvnDb1W.30

Bit Locations

Bu59d

25S09
u16b 1 14BankODout.31 14 D
a
K16-31
Bank1Dout.J1 ~~
Bu59a

~~~~---,HSB

00

15 EvnDb1W.31

01

10

Bits 32EC 4-7

u47f

.....l'-lCK
25S09

.........,;;;.;;.;,a"o;..;.,;",;,;;. . . . .

typ of 4 25S09
see page 14 for others

PUP1

:ROX
::OD

Project
DO

Storage Card
Bank 0, Least Signi'ficant Bits

File
DOstor02.sil

Designer
Rosen

Rev Date
B

1/26/80

Page
02

Block 0 bits 32-4
Block 2 bits 0-1f

Block 0 bits 48-63
2 bits 16-31

BlbC~
bStorOut.OO

5

14 Bank 1 Dout.OO

bStorOut.OO

bStorOut.0212

bSlorOut.0212

bStorOut.04

bStorOut.04

5

14Bank1Dout.16

5

5

bStorOut.0612

14 Bank1Dout.06

bStorOut.0612

14Bank1 Dout.22

bStorOut.07 13

14 Bank1Dout.07

bStorOut.0713

14Bank1Dout.23

bStorOuLOB

5

14 Bank 1 DOllLOB

bStorOut.OB

5

14Bank1Dout.24

bStorOut.09

4

14 Bank 1 Dout.09

. bSto rOut.09

4

14Bank1Dout.25

bStorOut.10 1 2

14 Bank1Dout.10

bSto rOu\.1 012

14Bank1Dout.26

bStorOut.11 13

14 Bank1Dout.11

bSlorOut.11 13

14Bank1Doul.27

bStorOut.12

5

14 Bank1Dout.12

bSlorOul.12

5

14Bank1Doul.2B

bStorOut.13

4

14 Bank 1 Dout.13

bSlorOut.13

4

14Bank1Dout.29

bStorOuL14 1 2

14 Bank1Dout.14

bSlorOul.14.12

14Bank1Dout.30

bStorOul.1513

14Bank1Doul.31

bStorOuL15 1 3

Loads on 2nd word of tranSQort Loads on 1st word
and again on 4th word if BlockSea~d aQain on 3rd word
if B10ckSelO

:ROX

:OD

-

Project
DO

Storage Card
Bank 1

14 Bank 1EcOul.O'

14Bank1 EcOuL2'

14 Bank 1EcOut.1'

14Bank1 EcOut.3'

File
DOstor03.sil

Designer
Rosen

Rev Date
B

1/26/80

Page
03

Blocks 1&2 bits 48-63
b5torOut.OO

5

4

b5lorOut.01

bStQrOul.02 12

b5torOul.03 13

b5torOul.04

5

b5forOul.05

4

bStorOut.0612

b5torOut.07 13

bStorOut.oe

5

b5torOul.09

4

bStorOut.10 12

bStorOut.1113

L5175

0 K V 2 8 b 114Bank2DoUt.00
K 16-31
Bank 1 Doul.OO
v71c 0'

D

l5175

0 H V 5 0 b 1 14Bank2Doul.01
K 16-31
Bank 1 Doul.01
v71 b 0'

D

5

b5torOut.13

4

25509

0 :JtLtl/51 b 114Bank2DOUl.02 11 D
0
K16-31
Bank1Dout.02 1~ B
v71d 0'
V10d
D
0 ~V29b 114Bank2DOUl.03
0
:)4
K16-31
Bank1Doul.03 13 B
v71e 0'
v10e
l5175

14

L5175

0 K
v75c 0'

v32b 1 14Bank2Doul.04
K16-3/
Bank1l:toul.04

D

L5175

0 H V 5 4 b 114Bank2DOUl.05
K16-31
Bank1Doul.05
v75b 0'

D

bStorOut.1513

eD.

LS175
v711

CK Cl'

~~

Lo"adl

6LoadW3 9J

40
~- 510

on-

,II

5torEcOut.4'

11
PUP3
I

lS175
v751

,I

CK Cl'
91

11

L5175
0 H V 3 6 b 14Bank2DOllt.08
K16-3/
Bank1DOllt.Oe
v79c 0'

I

L5175

0 H V 5 8 b 114Bank2DOUl.09
K 16-31
Bank 1 Dout.09
v79b 0'

D

L5175
0 TlV59b 114Bank2DOUl.10
1
K16-31
Bank1Dout.10
v79d 0'

D

5lorEcOut.7'

13

m~

D

1-5175

0 MV62b 114Bank2Dout.13
~
i<16-31
Bank1Dollt.13

D

l5175

ROX

Project
DO

4

L5175
D
0

0

25509
6
D
0
5 B
v18C
11
12

25509
D
0
B
V18d

25509
6
D
0
5
B
v22c
11

~V41b
fJ4

,II

LS175
v791
CK CL'
11
I

114Bank2DOUl.15
K16-31
Bank1Doul.15
Block5elOa
clkOulpulRegb

LS175,1
v831
CK Cl'

9J 1

I'

OcfdDbW.01

10 OcJdDbIW.Q2

15 OddDb1W.03

2

OddDblW &4

7

OddDbIW.05

10 OddDb1W.06

15 OddDb1W.07

2

OcldDblW.Oa

7

OddDb1W.09

B
v18b

25509

D
0 ~V63b 114Bank2DoUl.14
0
1
K16-31
Bank1Doul.14 12
v83d 0'
Bv22d

D

25509
14
D
0
13
B
v22e

100ddDb1W.10

15 OddDb1W.11

2

OddDb1W.12

7

OddDb1W.13

100ddDb1W.14

150ddDb1W.15

Bit Locations
00

1
5B v101
9
CK
25509

25509
D
0
Bv23c

25509
D
0
Bv23e

File
OOstor04.sil

10

Designer
Rosen

SlorEclnA

o::TIJ

5lorEcln.5

CI:nJ

11 5lorEcln.6

CfQ9J

9

OJ]]

3

2 EcDalaA'

8196

5

7 EcDala.5'

25S09
D
0
Bv23d

Storage Card
Bank 2, Most Significant Bits

01

Bit8 OEC -3
typ of 4 2'5S(IDl ts 32
EC 4-7
see page 14 for othe

25509
14 Bank2EcOut.O' 3
D
0
Bank 1EcOut.O' 4
Bv23b

w2

:OD

25509

3 D

25509
3 D
0
4
B
v22b

4

4

12

25509

L5175
0 H V 4 0 b 114Bank2Dout.12
K16-31
Bank1Dout.12
v83c 0'

0 ~V37b

Loads on 4th word of transport
Clocked same time as last Data Word

[ 1ID- 5lorEcOut.6'

25509

25509
14
D
0
13
B
v18e

I

5

25509
6
D
0
5 B
v14c

1 14Bank2Dout.11
K16-31
Bank1Doul.11

l5175
D

7

v14b

14

D

91

m~ 5torEcOut.5'

25509
D
,0

0 ~V33b 114Bank2DoUt.07 13 D
0
4
i<16-3/
Bank1Dout.07
B
v75e 0'
v14e
L5175

OddDbIW.OO

-~ B

11

D

v83e 0'

I

~

25509

0 ~V55b 114Bank2DOUl.06 12 D
0
K16-31
Bank1Doul.06
B
v75d 0'
v14d
L5175

D

v83b 0'
bStorOut.1412

25509
6' D
0
5 B
v10c

l5175

D

2

~v10b

D

v7ge 0'
bStorOllt.12

25509
3
D
0
4

15EcData.7' 10

5lorEcln.7

Enable see
Rev Date
B

1/26/80

Page
04

Blocks 1&2 bits 32-47
LS175

25S09
3 D
Q
4
B v8b

LS175

25S09
6
Q 7
D
5
B
v8e

bStorOut.OO

5

D

bStorOut.01

4

o

bStorOut.0212

o

bStorOut.0313

Q r i V 2 6 b 114Bank2Dout.16
K16-31
Bank1Dout.16
v6ge Q'

Q K V 4 8 b 114Bank2Dout.17
K16-31
Bank1Dout.17
v69b Q'
LS175

25S09

LS175

25S09

Q 150ddDb1W.19
Q M V 2 7 b 114Bank2DOUt.19 14 D
4
K16-31
Bank1Dout.19 13 B
v6ge Q'
v8e

bStorOut.05

4

LS175

Q K V 3 0 b 114Bank2Dollt.20
K16-31
Bank1Dout.20
v73e Q'

LS175
D
Q H V 5 2 b \ 14Bank2Dout.21
K16-31
Bank1Doul.21
v73b Q'
LS175
D

bStorOut.09

1

bStorOut.1113

bStorOut.12

5

bStorOut.13

4

bStorOut.14 12

bStorOut.1513

6

25S09
Q 7
D

QddDbIW.2Q

OddDb1W.21

v12c

25S09
Q 10 OddDb1W.22
D

11
12

114B!.'nk2Dout.22
K16-31
Bank1DQut.22

B v12d

25S09
Q 15 OddDb1W.23
Q r l V 3 1 b 114Bank2Dout.23 14 D
13
4
K16-31
Bank1Dout.23
v73e Q'
B v12e

D

LS175

25S09
Q
D

3

Q KV34b114Bank2Dollt.24
K16-3\
Bank1Dout.24
v77c Q'

bStorOut.10 12

25S09
Q 2
0
B
v12b

LS175

5 D

4

3
4

5 B

Q J¥LV53b

v73d Q'

bStQrQut.06

OddDb1W.17

D

5 D

bStorOut.07 13

OddDb1W.16

Q 100clclDb1W.16
Q ~V49b 114Bank2Dout.18 11 D
K16-31
Bank1Dout.18 12
v69d Q'
B v8d

bStQrQ~It.04

bStorOut.0612

2

4

2

OddDb1W.24

B v16b

LS175

25S09
6
Q 7
D
5
B v16e

Q K V 5 6 b 114Bank2Dout.25
K16-31
Bank1Dout.25
v77b Q'

D

LS175

OddDb1W.25

25S09

Q 10 OddDb1W.26
Q ~V57b 114Bank2Dout.26 11 D
1
K 16-31
Bank 1 Dout.26 12 B
v77d Q'
v16d

D

25S09
Q 15 OddDb1W.27
Q ~V35b 114Bank2Dout.27 14 Q
4
K16-31
Bank1Dout.27 13
v77e Q'
B v16e
LS175

D

LS175

25S09
3
Q
D
4
B
V20b

Q K V 3 8 b 114Bank2Dout.28
K16-31
B(lnk1Dout.28
v81c Q'

D

LS175

LS175

Q
v81d Q'

D

~6tb
1

25S09
Q 7
D
B
v20e

6
5

Q H V 6 0 b 114Bank2Dout.29
K16-31
Bank1Doul.29
v81 b Q'

D

Q ~V39b 1 14Bank2Doul.31
K16-31
Banl<10ollt.31
v81e Q'
LS175

25S09
14
Q
D
13 B
v20e

D

OddDI.>IW.28

OddDb1W.29

25S09
Q 100ddDb1W.30
D
B v20d •

11
12

114Bank2Dout.30
K16-31
Bank1Dout.30

2

~*"",~~--:-~H

00

15 OddDb1W.31

Bit
E

-

Bit Locations
01
10

0

SB

.-,.;.;........---..;.;.0;;.......--01'-1 C K v 8 f
25S09

Loads on 3rd word of transport

HOX
:OD

-

Project
DO

Storage Card
Bank 2, Least Significant Bits

F i 1e
DOstorOS. si I

typ of 4 25S09
see page 14 for others

Designer
Rosen

Rev Date
B

1/26/80

Page

..

-

05

S253
XO
X1
9 StorDln.OO
OX
X2
X3
V7

10
11
12
13

S253
XO
X1
7
OX
X2
X3
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EvnDb1W.18

184

SlorDin.01

188

10 S253

ddDb1W.1B
ddDblW.02

S253
XO

~~~~~---'~X1

OX 7

StorDin.03

178

X2
;-----.....;;.-;.;"---..........1 X 3
b
v72

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S253
XO
iii:"'T~~;..;x;~-----:-:i:-I X1
OX 9
~~r;.;.r:~;:-------:-;n X 2
=.;;.;;;....-.;..;.;....;.;;;.;;...-------~I X3
v76c

StorDin.05

168

jioOoO~"iT:'l~~---+-H

6

~d~dD~bl~W~.;:':2::'-3-----:4~ X 1

ReadO'

2

v98 ..... 3
8T96

10

OX~7-¥.:.:;:.:..:::..:..:..:.:.:;:.:.~

EvnDb1W.29
EvnDb1W.13
C'5ddDbIW.29
OddDb1W.13

6
5
4
3

EvnD~IW.~~
~vni'5 IW.

1~
1

C5ddDblWJo
QddDb1W.14

lr

EvnDb1W.31
EvnDb1W.15
OddDb1W.31
OddDb1W.15

6
5
4
3

2
I - -~

I

1

1

EX'

r
I-- ~

1

1

2

I--

~

EX'
LCard5el'b

:ROX

:OD

Project
DO

2

LCard5el'a

11 Hil

File
DOstor06.sil

Designer
Rosen

r

1~

1

S253

ri- ~}82d
EX'

EY'

Storage Card
Output Multiplexor

1

~J

S253
S2
S1 v76d

EY'
1~

S253
S2
S1 v80d
EX' EY'

2

111fiJ

"---

r

1

S253
2
S2
I-- ~ S1 v74d
EX' EY'

2

S253

~ ~}78d

EY'
1'"

9 StorDin.14

S253
XO
7 SlorDin.15
X1
OX
X2

2

S253
S2
S1 v72d
EX'

[3]3J

S253
XO
7 SlorDin.13
X1
OX
X2
X3
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1'"

t rDin.12

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~ ~}70d
EX'

S253
X0
X1
X2
X3
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S253
XO
X1
ox
X2
13
X3
v84c

S253

2

v98 ",",9
8T96

155

X2
X3 v7

1

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S253

~-v~n~D~b~IW~.0~7~-------:5~XO

~O~d~dD~~bl:W~.~0:7::::::=3~.
--

~

~~~~~---+~

7

EvnDb1W.23

O~~DbIW.27

~~~~::----+::..J

X3
v74C

~

S253
XO
7 StorDin.11
X1
OX
X2
X3
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6
5
4

~~~':';';;'----7-,"

~~~~~---~~X2
=.;:;;.;;..~;....;.;;;.~--~"1

EvnDb1W.27
EvnDb1W.11
C5ddDbIW.l1

S253
XO
X1

~

S253
10
XO
11
9 SlorDin.10
X1
12
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13
X3\,iaQc.

v72

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S253
XO
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EvnDb1W.26
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OddDb1W.10

12 X1
13 X2
X3

~~~~:-------:::--I

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~~"MI~~----i1H

E~:v~n~D~b~IW~.0~2-------1~1HXO
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10
XO
11
X1
OX
12
X2
13
X3
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OddDb1W.24
OddDbIW.08

--- r.i.

EY'

1fiJ

S253
52
S1 v84d
EX' EY'

111fiJ

Rev Date
B

9/8/78

Page
06

SB3

[1EI

BlockSelO

4

BiockSel1

9

Shown for completness only
Not used on 96k storage card
for I/O Boards

[mil

clkOutputRe

[ll[!

SXClock'

2

~...3,--_ _ _ _ _C~I~O.:c.C...
k_

V8r96

BiockSel2 10
L

10

[125 SXLoadW'

W

11LoadW'

BiockSel01

[121[1 SXLoadD'

6

BiockSel02
11BlockSei0

3

BlkSelOa

3BlockSel2

BikSel2a

[I~] wrReset'

v87b

~....
I __;",;,;;;;,j......_ _1_1~ C

Q'1-"8
___ ..;L;;.;;:C;.;;a~rd:;.;:S:;.;:e;.;.I'_b

R'
v25h

PLAT
10 Bank2Wrlte'a

V

sr

BiockSel12

1

27 ohm

)X
)

Project
DO

Storage Card
Card Select, RAS, CAS

File
DOstor07.sil

Designer
Thacker

.

Rev Date
B

9/8/78

Page
07

51

u2f

27 ohm

112
sr16

BankOAOb

12
sr16

5

v47f

27 ohm

12
sr16

Bank2AOb

-----.12 B
sr16
12
~~

-

R OX
:OD

Project
DO

_______
S_to_r_A_O____________~12~

Storage Card
CAS, AO Drivers

File
DOstor08.sil

5

13

27 ohm

Designer
Thacker

u 4f

12 Bank1AOb
sr16

Rev Date
9/8/78
B

Page
08

7 BankOA 1 b
sr16r

7 Bank1A1a

h

ohm

sr16r

7 Bank1A1b
sr16r

4Bank1 A3b
sr16r

8Bank1 A5a
8r16r

4Bank1 A3a
sr16r

8Bank1AIllL
sr16r

7 Bank2A 1

\/44h

33 ohm

sr16r

1010 ""-v6-6-h-' 7 Bank2A 1 b
sr16r

..........----'-=::..=-<.-----. 4Bank2A3b

5 BankOA2a

6BankOA4a
sr16r

3BankOA6a
sr16r

6BankOA4b
sr16r

3BankOA6b
sr16r

33 ohm

33 ohm

9 ....-----. 8Bank2A5b
\/66i

sr16r

sr16r

33 ohm

1103].l!orA114

sr16r
5 BankOA2b
sr16r

ohm

4 12

v5f

33 ohm

33 ohm

5 Bank2A2a
sr16r

6Bank2A4a
sr16r

3Bank2A6a
sr16r

5 Bank2A2b
sr16r

6Bank2A4b
sr16r

3Bank2A6b
sr16r

ohm
f

ohm

ROX

-

:OD

Project
DO

Storage Card
Address Drivers

File
OOstor09.sil

Designer
Rosen

Rev Date
B

11/11/77

Page
09

AO
A1'
A ..11..~
A3
A4
AS
A6

MK16-3

u25c

,

AO
A1
A2
A3
A4
A5
A6,

AO
A1
A2
A3
A4
A5
A6

MK16-3

AO
A1
A2
A3
A4
A5
A6

MK16-3

u31c

AO
A1
A2
A3
A4
A5
A6

MK16-3

AO
A1
A2
A3
A4
A5
A6

MK16-3

u37c

AO
A1
A2
A3
A4
A5
A6

MK16-3

AO
A1
A2
A3
A4
A5
A6

MK16-3

u3c

WE'
3

MK16-3

u26c

u32c

u38c

u4c

WE'

AO
A1
A2
A3
A4
A5
A6

MK16-3

AO
A1
A2
A3
A4
A5
A6

u27c

AO
A1
A2
A3
A4
A5
A6

MK16-3

u33c

AO
A1
A2
A3
A4
A5
A6

MK16-3

u39c

MK16-3

u5c

WE'

WE'

AO
A1
A2
A3
A4
A5
A6

MK16-3

u28c

,

BankOAOa 5
:rrankOA 1 a 7
BankOA2a 6
BankOA3a 12
BankOA4a 11
BankOA5a 10
:BankOA6a 13

AO
A1
A2
A3
A4
A5
A6

AO
A1
A2
A3
A4
A5
A6

u29c

,

BankOAOa 5
~ankOA~ a
BankOA2a 6
BankOA3a 12
BankOA4a 11
BankOA5a 10
BankOA6a 13

41

15[

AO
A1
A2
A3
A4
A5
A6

3/

MK16-3

u30c

BankORAS'a
BankOC AS'a
BankOWrile'a

AO
A1
A2
A3
A4
AS
A6

ROX

OD

Project
DO

u40c

,

u3Sc

BankOAOa 5
BankOA 1 a 7
BankOA2a 6
BankOA3a 12
.BankOA4a 11
BankOA5a 10
BankOA6a 13

RAS' CAS' WE'
15
41
1

3/

AO
A1
A2
A3
A4
A5
A6

WE'

-

MK16-3

Storage Card
RAM Address Sections 1

BankORAS'a
BankOC AS'a
BankOWrile'a

MK16-3

u36c

AO
A1
A2
A3
A4
A5
A6

MK16-3

u6c

, WE'

WE'
3

MK16-3

u41c

RAS' CAS' WE'
15
41
1

3/

AO
A1
A2
A3
A4
A5
A6

AO
A1
A2
A3
A4
A5
A6

MK16-3

3

RAS' CAS' WE'
BankORAS'a
BankO( AS'a
BankOWrile'a

u34c

, WE'

WE'
3

MK16-3

AO
A1
A2
A3
A4
A5
A6

MK16-3

3

BankOAOb 5
BankOA 1 b 7
BankOA2b 6
BankOA3b12
BankOA4b11
BankOA5b10
BankOA6b13

BankORAS'b
BankOC AS'b
BankOWrile'b

AO
A1
A2
A3
A4
A5
A6

u42c

u7c

RAS' CAS' WE'
15
3
41
1

AO
A1
A2
A3
A4
A5
A6

MK16-3

MK16-3

MK 16-3

u8c

WE'

File
DOstor10.sil

Designer
Rosen

Rev Date
B

11/11/77

Page
10

BankOAOb 5
BankO" 1 b 7
BankOA2b 6
(JankOA3b 12
BankOA4b 11
OankOA5b 1 0
Ban
A.........--1
--,;,;,;.;,,;;;,,,;,,;,

ACI
A1
A2
A3
A4A e.:
'"
A6

MK16-3

,

u9c

BankOAOb 5
BankOA 1 b 7
BankOA2b 6
BankOA3b12
[lankOA4b11
BankOA5b10
l3ankOA~1l1~

BankORAS'b
BankOCAS'b
BankOWrile'b
~~~-ii-l

~;';';-~~"""-I
~~~~""":;;-I
~~~";":;'-I
;";';';';~~";"":'-I

+~~-:-;-I

AD
A1
A2
A3
A4A5

MK16-3

u10c

......;;.;..;..;;;..;;;..:~A6

BankOAOb 5
BankQA 1 Q 7
[lankOA21J f.)
BankOA3b12
BankOA4b 11
BankOA5IJ10
BankOA6IJ13

BankORAS'b
[lankOCAS'b
BankOWrile'b
ACI
A1
A2
A3
A4Aei
A6

MK16-3

AD
A1
A2
A3
A4
A5
A6

u15c

RAS' CAS' WE'
15
4J
1 3

AD
A1
A2
A3
A4
A5
A6

Bank1RAS'a
Bank1 C AS'a
[lank 1 Wrile'a
Bank1AOa 5
Elank1A1a 7
Bank1A2a 6
Bank " A3a 12
Bank1A4a 11
Bank1A5a10
Bank1AGa13

MK16-3

u16c

RAS' CAS' WE'
15
3
41
1

1
AD
A1
A2
A3
A4A5
A6

u11e

Bank1AOa 5
Bank1A1a 7
Bank1A2a 6
Bank1A3a12
Bank 1 A4a 11
Bank1A5a 10
Bank1A6a13

MK16-3

u87e

MK16-3

AD
A1
A2
A3
A4
A5
A6

41

MK16-3

u93e

,

RAS' CAS' WE'
15
41
1 3

WE'
3

~~m

___TI

~.,;;;..jm~-;:-!

AD
A1

MK16-3

~~~~~~A2
~~~'-";;;'~~A3

~~~~~~A4

u88e

u94c

~~~~~~A5

= .....-.-.. . . . .--1 A6
15

WE'

3

1

1
AD
A1
A2
A3
A4
A5
A6

u17c

AO
A1
A2
A3
A4
A5
A6

MK16-3

RAS' CAS'
Bank 1 RAS'a
Bank 1 C AS'a
Bank1Wrile'a

MK16-3

WE'

AD
A1
A2
A3
A4
A5
A6

AD
A1
A2
A3
A4
A5
A6

MK16-3

u8ge

MK16-3

u95e

WE'

WE'

WE'

3

AD
A1
A2
A3
A4
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A6

MK16-3

AD
A1
A2
A3
A4
A5
A6

u12e

,

u18c

,

WE'

MK16·3

u13e

ll90e

,

AD
A1
A2
A3
A4
A5
A6

Bank1AOa 5
Bank1A1a 7
Bank1A2a 6
Bank 1 A3a 12
Bank1A4a11
Bank1A5a10
Bank1 A6a 13

MK16·3

u19c

AD
A1
A2
A3
A4
A5
A6

MK16-3

u96e

,

WE'
3

3

BankOAOb 5
BankOA' b 7
BankOA2b 6
BankOA3b12
Banl(OA4b 11
BankOA5b 10
BankOA6b13

AO
A1
A2
A3
A4
A5
A6

MK16-3

WE'

3

AO
A1
A2
A3
A4
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A1
A2
A3
A4
A5
A6

MK16-3

WE'
3

MK16·3

u91e

I

RAS' CAS'
BankORAS'b
BankOC AS'b
BankOWrile'b
AO
A1
A2
A3
A4
AEi
A6

:ROX

EOO

Project
DO

MK16-3

u14-c

41

15/

3

Bank1 RAS'a
Bank1C AS'a
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1
AD
A1
A2
A3
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A6

41

u20c

File
DOStor1-\ .sil

15/

3

1
AD
A1
A2
A3
A4
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MK16·3

Storage Card
RAM Address Sections 2

WE'

RAS' CAS'

WE'

AD
A1
A2
A3
A4
A5
A6

MK16-3

u92c

Designer
Chang

Rev Date
B

5/1/78

MK16-3

u98c

Page
11

Bank1 AOa 5
Bank1A1a 7
Bank1A2a 6
Bank1A3a12
.llitnk 1 A4a 11
Bank 1 A5 10

nan

AO
A1
A2
A3
A4
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A/51

MK16·3

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A2
A3
A4
A5
A6

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u65e

,

Bank1AOa 5
l3a'nk1A1a 7
!!.ank 1 A2a 6
Bank1A3a12
Bank1A4a11
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Bank 1 RAS'a
Rank 1 C AS'a
Banl( 1 Wrile'a

AO
A1
A2
A3
A4
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MK16-3

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RAS' CAS'
411 15

1
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3

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MK16-3

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MK16-3

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3

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3

MK16-3

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3/

MK16-3

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A2
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MK16-3

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A2.
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Flank 1 ('AS'a
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41

Banl~1A4b11

v2e

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RAS' CAS'
Bank1 RAS'a
Bank 1 GAS'a
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15 r

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A1
A2
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A5
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MK16-3

v3e

RAS' CAS'
41 15

1
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A6

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3

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MK16·3

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3
41 15[

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A2
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MK16·3

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MK16-3

MK16-3

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,

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3

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MK16-3

WE'

3/

MK16-3

v4e

AO
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A2
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WE'
3

:ROX

:OD

Project
DO

Storage Card
RAM Address Sections 3

File
DOstor12.sil

Designer
Rosen

Rev Date
8

11/11/77

Page
12

Banl<2AOa 5
Aank2A1a 7
Oank2A2a 6
l3ank2A3a12
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Bank2A6a13

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!!£!.nk2Write'a
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MK16-3

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WE'

15

3/

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RAS' CAS' WE'
15
41
1

31

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5
7
6
12
11
10
13

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41

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3/

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Project
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DOstor13.sil

MK 16-3

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MK16-3

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De s i g ne r
Rosen

MK16-3

v31e

Rev Date
B

11/11/77

Page
13

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Fi 1e
DOstor14.sil

Designer
Rosen

Rev Date
B

11/11/77

Page
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5253

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lAde! r

00
00 Ethernet Device ID high byte = 6 for output and 7 for input. Low byte is alwa
01.
Alto EtherNet ID (This Slmulates the number the Alto EtherNet obtains from the Al
10
Status-State
11
Input Data
Device 1D Modifier [0:71 = 00 000 llx Where x
0 for output and x = 1 for input task.
Device 1D r8:151 = 00 dOO 000
ThusOutput 1D = 3000 (octal)
Input 10 = 3400 (octal)
Designer
Rev Date
Page
Project
IF il e
DO Input Bus Drivers
SOD
E Nel
DOEN08.si!
Garner,Ogus
08
Ga 4/13/79

IX~ROX
~,1.~

I

..

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;

'c

OBAddr
2

3

5
6
11
10
111
13

DO
BO
01
B1
D2
82
D3
83

00'
01'
02'
03'

SB
1

I
DOP
,

~.l BO
:]-j01
} 02

-IB3

CO

f-, ~

(24)

...c:JQ~!~~

I

------C..3li~!219r
'-,.U_uJ

H sse IOl,_ltf",pU;""lt";",,,'

r:clgeClOck'/b

OutBuffAddr.1 '

9

OuIBuffAddr.2'

12

OutBuffAddr.3'

GND

00 12

L...-_--=,7-j /\ 2

01

L -_ _..;4~/\3

1 /\5
/\6
/\7
CS'

1[j

( 17 )
e13

Disabler13

S 1 63

(

(2'1)

(prop=7. se1=13.2)

I -t~~
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H3

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OutBuffAddr.O'

OConds

1I0f-1~2~---'-i-t-+-----....:;~:..-j, /\4

7

WritBData

15

e15
S258

4

(R:i)18

.J 1

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D

119

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QI~----------~~(~1~8,

fl:.Clock)

~

02r-.10

( 63
03 9
f13
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) 17

0

1

2hQ1t-1.:..::6:r--_ _ _ _ _ _--=O:.:;.U.;.:tD:.;.if:..:.jfL;:;Er;.1~1

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S374

(

k I)

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I

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a

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(

? 7)

;

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a

r-ib\s:

LW

!.::ROX

Project 1

Output Pointers &

lFile

'Designer

Rev Date

(J 3 .

S51

Page

~"~~~DC~2-!LME:~~_~'____O........U......tP,Llt.Y!'~aK~~~.p,¥ .....:~_I:.._D_O_E_N_O_9._S_i'__
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....

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S 2 40

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10
02
12
03''-';:.,--------.-;.0=_

S' I

D1
D2
D3,

}

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2T 3-,

0 f-it'

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8

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15
1

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1G
07 19

I

11

13
14
15
1

t-';"';;t~11~9-"'"

CK

OC'
1

S374-

I

12
10
6
I\.

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I

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1
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illIJ
[E~}

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OData.08
3
OOala.09
4OData.10
7
ODala.11
B
OOalc1.12 13
00 0 1(1.13 14
ODala.i4 17
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:-:r1"'i2':"a-----------------------------J

HOX (Project ~
DD

I E Net I

'~*?,,,: ?~

4H

~

Output Ring Buffer

& Out.Q,~~t K#h4 ;'4

: File

II

Designer
Garner,Ogus

DOEN10.SIL
,'-

..

Rev Date
Ga 8/20/78

Page
10

OutCRC
~8IT.~D.a.la______________~~~__~~
-I~~

__________________________

F9401
D
0

12

CK'

.Q!f!:!.£;;;.de;:..'_ _ _ _ _ _ _..,l,-l.DJ•.,J-,....,._~
10
tj.

2
~jMode

3

~.jPream

2

3
b12e
S240

~

a8

CWE
MR

P'

ER

13

GND
~~;;;.de~T-~~-----

________________________________________

~

8
00
GND

11

GND

18

SAl
SLI

SKY/c19
1 SA'
SL'
SKY Ic

9

~~,------------------------~

Cl'

8

TDataO'

7

TData.O'
DOO
13
TDatCJ.1 '
D01
TDClta.2'
6
D02
14
D03 t-=-;....._~·~rD~CJ:.:.;t<:.:.:,1.~3'_
5
D04
15
4
·16

12

.

7

OutSR
8
e11c
S08

)

4

~

16

SelectOutLow

~--------------~~~b~1~2~b------~~~~(~2~5~:

OutSRC

~.~

OutSRC=15

CO~1~1~--------~S~el~e~c~IO~U~I~H~i~h~~~~
HO 12
H1 13
H2 14

·,81

3
2

I

S\(Y/b 7
SKY/biQ ~p

(35)1

2

9

/\,~

SKY/b
14

02
03

11
10
9

CS'

13

Disableb9

(pulldown

(1 9 )

SenelModeDeleyed

0·1

CS'

_I£!££.!i.. ______________l
_~£IMode

00

/\5
A6
15
A7

b10

.T
S163
CL'CK LD'

Packet OutMode

b9
12 F93427

5 AO

6
A1
7
/\2
4
H 3r-.:..-----::--~_:!:"~~~--,.-ro!""..--,....,..---=;:....j A3

If-I
B2
3. B3

~

OutSRCP
15

f

Clock

(J 9 )

Out Da t a:.:..P~a.:,.:ri.:,.tVl...'-........---:;;:...../

lTITI.

Syn c)

CRCMode
cnCMode'

rg

OU1Diff::O

13

DoneWithOutPackel

--rEl:Tk Sync)

OKtoTransmit'

18
f7c
S10

IR~!_~_D_~E_~""",
XEROX

TClock
GND

Project' Transmit Data, SendSync,
.. et_"__

File

Designer

Rev Date

Page

a
& OutPul--0-.~t1~.,G:::Jl~tlQ~)~JA~.k~.,!l:Wt~--t_D_O_E_N_1_1_.S_il-!!!'.!ElG~a!!rn!:::e:::r,;::02gl:lu~s _l-G_.l-3_1_27_1_7 9 .
01

m__1.1.J-J

~~~~1~~~e--------~--------------~
~

OSync

S04

GND

d9b

(Ie

~~reRead

WireRead

(:1 8 ... 3 )

-E!£!WeData'
-f~L~Clo.~c~k~'/~c~

______________________________

~

____________________________________

~

OutStatus

8
g9b

Jam

520

GND

~tOl_It~p_ut_'

3

__________________________________________

~

J2.~E-,J,-(..I..19.1ol..,1-)_ _ _ _ _ _.:.....j
190

8

G--} OFaull'

L!_'L (26)

Q~;----i-f~;"';';;';~;";:;;'-........--~

~:.J,-I.u......J.--:...:...jD

GND

8
eBc

500

SenelMode

=---------------------------~~~--------~

[c~9~J

_EdQeClo':7c~l('~/ffc______________________________________9..J1
-fl2~~~_u_t'

____________________________________________

1 r
~.

PuliUps

DO Clocks
[]:J.!.!2

eClockFeed'

.§!CY la 2

GND
SKY la 4

5

OJ:} RamClockFeed'

9

~Y

I.

XE:RoX

SOD

--

la10

Project ~

GND

OutputStatus,OSync,

iF'ile

Designer

2

Rev Date

Page

1
r
I DOEN12.sil
Garner,Ogus
Ga 2/16/79
12
_ _i _ _ _
&~[).....
g.-..:J.QQiS---~-_~ _____~_~~.
__~~=!_-L-_!-_-r!!!I!!!!!!
_ _" ' "

XWire

'

(37 2 )

~ll:2'

(37.2)

'y':!"a~(f!!.!:.:!

-.9..1.!}P1

..Q..U.!!.L
~~'

~~L
~2.!!l!I'

( 19)

9

.El~'!u':

10

b15d

0' 11

S 175

Q

Transmit'
Tran mit

~~o~ck)
PhatJ,e1'

-rrwn~~t----~~~·-----------""---------------------------~
~~_t'

____

~~~~

__________•_____________________....._____

~

~T{~k = T
6

a15b

Wake

Wakeprom
OutC:Addr.O'

3

DO
fnCAddr'~,O~j------~-i
4

2

00

i5'LiTC:ii7i 19
2

~~TT~----~4------~4-P320~18~~;~~

ti

p420~17

2.!rW~B'

G P53 3 (}'16
;;':;;':''-'-'IIIIP-re'''R~c~i'l'"k--'I---..1--;l:~ P 6 1 2 0' 1 5 ~~~~'Io ckEM
P747(},14
9 PO
P13
GND 10· P9
P12
- - - P10
Pi1

185 nS

Pulse

InhibitC

ii

InhibitR

IH

0 5

CRCClock

12 IH'
f6b
N123

~~~D~8~t8~_____~3~~

LOopBaC;.;k.;..'_ _ _ _ _ _...:;;....j

6

LOOGsaC.k________,

SKY/b11

S51

XDal:a

Carrier'

Pulse

cc

=

440

nS

i5a
S74

IH

OND

CarrierEM

1
FPLA T
20 VCC
2- Pi
P20~1~9~~--~JR~

JC
~~

5

3

p2.00e19 113
InllibitR
P3 6 2.
81-1-:-:7::--·----:,;c~n~;..;..;..;...
P420 . 7~1G;:--)----FL~R;...-- - - - - - 6 p56. 8){6
OND
7 P633CTP 5
o P715(f14
PreRGlk
9 pD--D}P13
PreRClockEM
GND : :
10 P910uA121-1~1~-+~~~~~~
P1068p11 - - e6

CC----4
LC5

Line'
IH'
115b

Misc. Compone

10

08
c7c

CD'

Delay = 45 nS
Comes up 255 nS
after last clock
DC!.Ql.Y t ran sit ion at i 7 a
Adjust delay to 45
& udjust IH to get

CarrierEM
6

Fl

C

o~

SKY/b
CarrierEM

1~

[)

e7b
N123

12
11

LC

~

b!!..§.!.RCloCk 9

= 65 nS

Pulse

5

DCk

13

Comes on 510 nS after
last strobe of i7a.
Adjust carrier one shot
to get this.

(to paqe
PreamO.1'

h5d

(440

nS)

0' 12
CL'

FPLAT
1
P20
2- P1
P19
3 P2
P1B
4 P3
e5 P17
5 P4
P1G
G PH
P15
7 P6
Pi4
n P7
Pi3
9' PO
P12
10 P9
P11
P"IQ

SRDataEM
~ffilJiiTa EM'
(~hlrier[M

PreumEM'
-fClockEM
TClockEM'
---pf"8~1 0 ekE M
-~iT'STo n EM

9.ND

8 PreRClk

CD

20 VCC
'19
18
17

h5c

SerialRData
Se riiJlrWalo'

IH

2

Carri~r

16
15

Prcol1lDel'
TCloc~(

14
13
12
11

~p~re~R~C~IO~C~k___i~1_~~1~0~____~R~C_IO_C~k

TClock'
PrnR lock
,ollision

V-g6C

Spare
HOX
; DD

P roj Gct !
E Net

!

'~~-"-

Ethernet Receiver
--

-!.---"-......... """'-

~ F i 1e
DOEN15.sii

1

i

Des -j gne r
Crane

Rev Date
Ga

4/13/79

Page
15

~

vee

FPL/\T
20
P1
P20~9~~~--

~

P2
~----'~I P3

GND

~~----~--~----~5~P4e2

r----t

P5
7 P6

I--I-+--"':n"'~

P19
8
VDD
P18~1~7~~----P17
P16'" 5
P15
4

cr

P 14 ~3:-t--i--I

P7

~ P8
rr5'P9

t--++-H~P10

Texas Inst. TL497AC
Switching Voltage Regulator

P13
2
P12
P11"

l'
1

vee

1
FPL/\T
20
2- P 1
P 20 1r-:1~,g~-HH-"';'--3-P2
P19r-~8

P 1 8 ~?-

t--t--+--+--'4:-; P 3

--t
'6--y

P4
PSf2

P6

J=t9 PH
P7
t--t--+-~1~0:-;

P17r.;-G
P16 1!j

Miscellaneous Components
for Regulator

P 1 5 r-1':""4:----i

P14 13
P 1 3 1-1~2:---'

P9

1--1--1-----+ P 1 0

P 1 2 1-1:-;;1;.....--t

P 11 ~

vee

1
FPL/\ T
20
2- P1
P20 r-:1~9~-r-""';"=P2
P1 9 ~18
4- P3
P1817

3-

5

P4 g 2
6- P5
PO
7 1'7
~ PB
I-~G="'N""'D~.j-1"";0:-; P9
P10

-T

'T6

P17
P16,-1115
P15
P14 r-r3
P 1 3 1-1oi-i2~-+-4
P12 11

'"tt-

Miscellaneous Components
and
Output RF Filter
Transceiver15V

~319

P11~~4-----------------------------------~~----~~-~

DIP Switches
DIP Switches
1

FPL/\T
20
P20
2- P1
I--~g
3- 1'2
P19 18
P18 17
4- 1'3
P17
[; P4
16
6 P5114 P16 15
P15
P6
7
14P14
8 P7
13
P13
P8
12
9
P12 11
10 P9
P11
P-lO

GND

vee
AltoEtherlD.OO
I\ltoEtherlD.01
I\ltoEtherlD.02
AltoEtl1erlD.03
AltoEtherlD.04
AltoEthcrl0.05
I\lloEtllerl0.06
I\lloEtl1e r1D.07

Set these switches to "ON"
AlloEt herlD.OO
I\ltoEt 118 r1O.01
i\iiOfiIwrl[i~62
I\lt oEl he r10.03
I\ltoEt '1erI0.04
I\ltoEI l'erI0.05
I\lloEI 11er10.OG
1\110[1 herlD.07

1
2
3
4

5
r.;

r

8
GNo

1

g-

FPLAT
1
P20
2- P1
P19
3 P2
P18
4 P3
P17
5 P4
6 P5i4 P16
P15
7 P6
P14
8 P7
P13
9 PO
pg
P12
10
P11
P10

FPLAT
P20
P1
P2
P19
P10
P3
PH
P4
P5 g 4 P16
P15
P6
P14
P7
P13
PO
P12
P9
P11
P10

20
19
18
17
16
15
14
13
12
':'1

GND

logic O.

20

19
18
17
16
15
14
13
12
11

vee
AltoEtherlD,OB
AltoEtllCrlO.09
AltoEtherl0.10
AltoEtherlO.11
AltoElherlD.12
AltoEtherlD.13
AltoEtherl0.14
AI toE the rlD.15
AlloEtllerlD.16

Set these switches to ID number and od
P2 is MSB of 10 number and pg is LSB.
Switch ON = 0
Sw-itch OFF = 1

vee
AlloElherlD.OB
I\ltoE lI)erI0.09
AlloEII)erI0.10
I\ltoElhcrlD.11
I\ltoEtl)erID.12
I\lloEti1erI0.13
I\llol:tl1erl0.14

5.1K Pull-up Resistors

I XEROX

IProject

'File

IDesigner

!Rev!Oate

Page

1_~~D_I.!!!et_ ~~ ~~~~.;~rr~~~.~Y~_~~:_J.I_D_O_E_N_16_._Si_1-!!J!!. . ,~5

Carrier

13[:?7

PreamDet'

11

PreRClock

BadCRC on page 6

1,81

PrearnEM'

SRDataEM

14

6

h8g

~::lockEM

9

lf

SerialRData

110c

~~ad

hah

18 i

SerialRData'

hOa

S241

EN

19

TUp

TDn

r

Note:

When te~tinq on the DO Card tester,
as the Jump~r plaftorm e5.

FPL/l.T
1
P20
2- Pi
Pig
i nl,ibitR
3 P2
Pi8
'(~n
11- P3
PH
i .,n
5 P4
5
P16
iIlloF.:lllerlD,'15 6 P59 Pi5
i IlloEll1erlO, 'l..~ PO
P14
['::nT(;lk'
8 P7
Pi3
P8
pg
Pi2
GND
1
Pi1
Pi0

J'R

~-

20

chip h8 (S241) must be removed as well

VCC

~9

R~
16

'5

TUo
Resela7
TClk

14
13

~2
~i

\

5.1K Pull-up Resistors
16 pin package

Disa bleh 1 0
Disa bleri]
Disa blob9
DisCI blec9
Disa bleb17
TDn
GND

ROX
;00

Project
E Net

.L:.£m/;,";;L~

,

I

i

FPLAT
1
P20
2 - Pi
3- P2
P19
P18
11- P3
PH
5 P4
P16
fj P5 c 6
P15
7 P6
P14
0 P7
P13
8 PB
P12
10· P9
P11
P10

20

VCC

9
'8
'7
6
5
4
'3

GND

2

,..11

100 ohm pull down resistors
16 pin package
Fi 1e

Parts for Testing
!':~,.

!' I!",

'., "

_.

DOEn17.sil

Designer
Crane

IRev Date

I

Ga

4/13/79

Page
17

!Revision Ga generated from SDD revision Non 4/12/79 by CT.
1) Renamed DOEn?3.silto DOEn17.sil
2) Adcled slDnclDrci files for platforms.
TI18 farrowing were done to eliminate ROUTE trace cuts:
3) Added vce to clock plat at b7 (p14).
4) moved 470 ohm resi sto r I rom pi at 06 (1-20) to h6 (7 -14), and added VCC to e6 (p15).
5) Coalesced ali sections of pial g5 (pg15, 16,17) to pg17.
6) Adcled vee & GND to plat 05 (pg15).
7) Added GND to pl,ll g4, vce to h4,i4,g2,f2 (p16).
8) Moved TL497C up one posi tion in pattern e2, added vce & GND (pg 16).
9) Added vee, GND to pia Is c6, g5 (pg 17).

ROX

:SL

-

Project ':
E Net

i Changes
t

-:

File
DOEnChanges.sil

-

,.

...

i

Designer
Crane

~Rev

I

Ga

Date
4/12179

Page
1

H

E

F

G

c

D

B

I 25 PIN FEMALE CONNECTOI~

.................... 1:~~0:(5"1C53:iJ"
1.1111'.111

111111111.

••

II

'IX~~~?5"
•

2

,1

.................................................. 3

....................................... .

ffiel-! r1@E'T§'I'l :~~~ t: 51'" ................ '14
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...,..

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mr:s::: I: :rBm CEES::: I( Ni~?:s:: I : f.~0t:: :516 I~>:~~: :5:: 1(~~0:~ :5:: :::::::::: ::::::::::
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f.

::::::: W??:4:~~5::: 1@3E]::: I@E]:::: ImD:::: 110 Cill3:::: II~>:~~: :5::: 11~1:~?: :5::: Imn
•

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1111

I

1"'1

'I.

II

I

11.111111

I.

".111

,.,,1

III.

II11

II • •

'1111111

••••••

1

III'

(~~?:4:S:: 1@>:9?:S:: I[:~~?>: :5:: Imn::: 1§3::: 111 1:~~:7:~ :5:: ILEeS::: Ir:n.n::: Imr:s:::

[!m:s: :::I : ~~:5:~ :5:: ::Ir:n.n:: :: :I( :~?:7:~ ::5: :112 ~::::: Illli_9:::S: :!CEES: :: ::
[~~:7:4:
(~~:8:~

:s:: lC0lts:: IC$??:~:: :sIF:~~1~g:: II:~:'~>: :5:: 113 CED::: IC[?D::: II:~~~>: :5:: 11:~1:~?: :s::

:5:: IC~J09 ,S: 11:~??:4::::5 t:s:~~~::: :51:~~~:~ :5: 114 tEE::: l[g~:~~5:: I[€O::: IliED::
($~~:~s L1ili~5::: 11:$~p:~:s::: 11:$?:7:~:: :5: 1t:$~:5:~ :s::: 115 mB:::: II~:~~~: :5::: 1[~1:~?: :5::: 1t:$~?:~5
@73:=5 I: ~:~~~<: :51:~~?:~ :5:: It:~~~:~ :5:: 11:~;1?:~ :5:: 116 s::: 1mB::: 11:2:q~?~:5:: 1@E3:::
Im:a::: 11:~I~?:6:~g:: 10:::
[§§3:: 11:$?,:5:~ :5:: It: :s:~~?:5:: It: ~~~~:5:: It: :~1:~~:S:: 118 @~~:: 1Cill3::: 11:2:~$~~:5:: 1CfE]:::
[$~:5:~ :5:: 1@]}3::llliffi:: It:~}~:~ :5:: 1[$~?:5::S:: 117 t:s:~9:: :5::

§1l:5:: It: :S:~~~:::5 1:$?P:3: :5:: It: ~~f~:: :51: :~~~9:: :5119 1:$~~:o:::S 1:$~~:1::: :51: ~:~~?:::5 t:~??: :5:::
: : : : : : : : : : : : : : : : : : : : :: : : : : :: : : : :: : : ::: :: :: :: ::: :: :

20pins: A

16pins: B

14pins: C

22pins: D

: :: : : : :: : : : : : : :: : : : : : : :: : : : : : : : : : : : : : : : : : : : : : : : : : : =1==

24 pins: E

101-200
1-100

Note: Tile short vertical lines indicate
filter capacitor locations.

18pins: IF

I
i

XEROX
SDD

~r-i1e

ProjGct (
E Net

J

Ethernet Layout

'.DOEnLaYOut.sil

j'DeSigner
Garner,Crane

1

'ReviDate
Ga '4/13/79

Page
1

--I--~-------~----------------~--------------------I----~------

XEROX

XerClx Corporation
701 SOLJtl1l\viation Boulevard
EI Segundo, California
90245

I Rev

Drawing No.

M/\TERIAL LIST

ML

N.

~.---,-_----------,----------------------------------~------------------~----~----------------~----~
Rev. Drawing Title
Ti1ese drawings and specification!;,and the data
contained therein, are the exclusive property
of Xerox Corporation and or Rank Xerox,Ltd.
issued in strict conlidenco and shvII not, without
the prior written permissIOn of Xerox Corporation Rank Xerox,Ltd., be reprodllced, copied or
used for any purpose whatsoever, except tile
manufacture of articles for Xorox Corporation
or Rnnk Xerox Ltd.

DO Ethernet Controller
(DOENI~L01 .sil)
EMS VERSION

Date

Model. No.

I

I

II Sheet
1

Of

3

Drawing T i t l e :_ _..:D;:;..r:..::a:,:,w:..:i.:.:n.:ol-:..:qN~o~·_-I-!1:..:.N~o.:...:..:R:::.,e.::J,'-i:..,.4-_--!R.:,;e::;.:r.:.:,l1.:::,tt:..:rk.:.,;s::...._ _ _ _ _ _-I

i Ilem No.

.t
____
t-:=- ~

Integrate~ Circuit

I
I

4/13/79

I

SN74S00

-+______+I____________S_N_74_S_0_2____________+I____________

8

~--2--+_-------------- ~
____

SN74S04

2

SN74S08

2

SN74S10

3

SN74S20

4

~1 ---+--~------------------4_------4_--4_----------~

SN74S32
SN74S38
SN74S51

4

SN74S64

2

I

SN74S74

10

SN74S85

2

SN74S86

3

SN74123

Tlonly

2

SN74S163

9

SN74S174

3

SN74S175

7

SN74S189

11

SN74$240

3

SN74$241

2

$N74$253

10

SN74$258

2

This is timing component. Use
only Texvs Instruments

SN74$260
SN74$280

2

SN74$299

3

SN74$374

8

I\M25S09

3

F93427

I

F9401

jlntegrated Circuit

HM7603-5

PROM

4

Bit patterns detailed in
Prom listings

2
PROM

Bit Pvttern detailed in
Prom listings

XEROX

Xerox Corporation
701 SOUlil Aviation Boulevard
c
EI Segundo, California
90245

.----

Hev.

Drawing Title

DO Ethernet Controller
(DOENPL02.sil)

r-:::--Dwg.,
No.

I Drawlflg No.

!

I ML

MATERIAL LIST

IRC~.

These drawings and specifications,and the data
contained therein, are the exclusive property
of Xerox CorpOrGllion and or Rank Xerox,Lld.
issued in strict confidence and shall not, without
tile prior written permissiOn of Xerox Corporation Rank Xerox,Ltd., be reproduced, copied or
used for any purpose wflats.oever, except the
manufacture 01 articles for Xerox Corporation
or Rank Xerox Ltd.

I

EMS VERSION

I s~eet

I Date

Model No.

4/13/79

Itsm No.

Ir
~

-ML

Drawing No.

Drawing Title
IntegrGlted Circuit TexGls !nsl. TL497 AC

tr
i

~

1

b7

10V

1

e6

Corning
CI\C02COG 6RB

62 pF

10V

1

e6

Corning
CI\C02COG 620

200 pF

10V

1

e6

CorninQ
CI\C02COG 201

330 pF

10V

1

e6

Corning
CAC02COG 331

10V

1

e6

Corning
CI\C03COG 202

j

Capacitor 10%

10 pF

25V

1

f2

C Y

~_ _ _ _ _ _ _--:r'l'1i-{

13

Caddr.·"

X1
X =W-;-";";;;;';;;";';';'I.;.;;;.;..:;r...
01'
Caddr.2'
12 Y1
02 02 ~~==~-------------I-+---------:-1':':1-1 X2
X

I 1371

SROut'

SRClock__________~

[J}[I

Hi2

GNO

66

11661

laddr.O

18 laddr.O'

laddr.1 _ _ _ _~

16Iaddr.1'

6

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laddr.2

14 laddr.2'

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12 laddr.3'

11

OMe'

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laddr.5/a

13

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3
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6

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5

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laddr.6

11
12
1413

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laddr. 7

25S09
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00
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01
01
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D2
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B2
03
03
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2
7

4
5

10

12

15

13

9

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01
02
03

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MC2StarlXport

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15~5

IRun

RUN

13

~~~~~~--~

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~G~N~D_____1~1_~~9~____~H~i1_

V

S240

S241

GND

12
S240

Hi2

95

Odata.OO

~O1

S374
DO
00
D1
01
02
02
D3
03
D4
04
05
05
06
06
D7
07
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CK OC'
11
1

~O2
~O3

~OG
~O7

2

5
G
9
12
15
16

19

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64

Output
Data Re ister

Odata.09

63
OutO.OO
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OlltO.03
OutD.Oll
OutD.OS
QuID.OG
OutD.O?

S374
00
01
02
03
03
04
04
05
05
DO
06
07 e19 Q7

Odata.10

62

DO
D1
02

Odala.11

61

Odata.12

59

Odata.13

58

9
12
15
16
19

OutO.OB
utD.09
utD.10
OutD.11
OutD.12
OutD.13
OutD.14
OutD.15

CK ~C'
11
1

Odala.14

57

2

5
6

Odata.15

53

EdgeClk1 '

EdceClk1'

OMeF'

OMeF'

~16

13~7

OutD.16'

'" Hi1

S240
2

11471

3

IOStrobe

IntStrobe

S241

3
2

M Task

Reset'

IMe'

EdgeClk2'

5

IMeF'

6

IMeF
Oaddr.5'
Oaddr.6'
Oaddr.7'

OMe'

12

9

OMeF'

8

OMeF

S138
15
h 16 QO'
14
Q1'
3
S4 Q2' 13
12
2
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S2 04' 11
10
9
S1
7

11

Dr/HdRe Ld

GND 5
Ed eClk2' 11

DevSelOK

12
11 RstAbrt/Err'

ErrResel'

~~esel'

GeneralResel'

4
. _I~R~u~n~________~5~o~

WrtFltClr

eClkFeed1

12
eClk1'

eClkFeed2

9

Hi110

Hi1
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c12c

0-::::'-"_-"';;':;;:'-'::::'':::':':'';'':;''-

sao

9
,10
RamClk'
Hi1 2

.• Tostability control to be added for etch module.

Designer

~G,~eron

WakeP1 '
2

13
1
11

4
WakeP2'

a
a

5
.!~3

9

_Ir~.rl 5 mit

WakeP3'

1a

Transmit
Phase1'
M Task'

_I!2_nsmit' 12
3
-.!:'hase1'

13
dTx'

[1QI]

5

Pllase1Nexl'

PHase1Nextl'
HM7603
GND
10
• Ca"'i'cld"':"r-.O":"':'""'--i1~"1-I AO
·Cadclr.1'
12 1l.1
• CClCtclr.2'
13 A2
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14 ~~

00

{j

01

1 "'
12
14

02

13

03

G1P2

00 2
01

G1 Pi

02 3

Q3 4
:lP2
04 5
6
Q5
7
Q6
9
b 18 0 7~--';;;=­
CS'

17
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4

3
4
6

2

Phase1'

7

G1

5

SeekCom

10

TrackOO

12

dWakeRe F'

13

G2

D1
D2

15 G3

WakeRe uest

UD

RC' 15

_G_N--,D~:-f BO
B1

02
B3

SeclorWakeS
SeekEnbl'

WakeRe

RateErrPossible

[ 34J

CTask.O

2~'8

ICTask.O
Cactdr.O'

[ 13±j

CTask.1

4[?r 16

ICTask.1
Cadclr.1'

[ 35::1

CTask.2

6[0r'4

:~

ICTask.2

RslA brtlErr'
RaleError
Abort

Caddr.2'

10

ICTask.3

12

Caddr.3'

13

11
[13§]

CTask.3

12
S241

IOAttn'

,; Testability control to be added for etch module.

o::ITJ

Hi1

OutD.04
DevOnRegLd

9 ~8

EggeClkFeed210

~SOO

,-4-

2 ,

S
5
0
'§74
1110a
3
·v

OutD.05
oLiib.OG
Qu1D.07
OuID.OD
oUib.09

.2.oD1

AliowWake
Phase1Nextl'

O,J>

2 "

J~S02
1

OulD.05

R'

T

Reset'

3 S174
4- 00 00
01 01
6 D2 02
11 D3 03
13 04 04
14 D5 05
I

CK Cl'

9 r

6
5

BO
B1

3

82
B3

I:::i:

Hi2

~~9

2

DevOpRegLd

::>

Cl'CK lD'

3

Reset'

•.

7
10
12
15

Direction
Wri loHeader
Reae/Header
Writelllbol

i13

3
4
6
11
13
14

1

~6Rd+verLbl
3
4
6
11
13
14

S174
00 00
01 01
D2 02
D3 03
04 04
D5 05
CK Cl'

9 r

5

r45
7
10 WriteData
12 ReaclDala
15 VoriryOala

9\~_
h12c 8
10

Wrt + VerData
S32

h13

1

ClrOtJ'
13

lh12d 11
S32

Hi2

EJ3

7
4
3
2

Ep
-T h11

-Hi2

9

2
5
7
10
12
15

HdrWrt
HdrRd
lblWrt
LblRd
OataWrt
OataRd

i 11

1

12~

SectorMarkSP

13~SOO

S174
2 Verifvlabel
3
DO 00
4
01 51nhHdrAbrt
01
(
D2 02
1
03 03
1
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1
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1
9

f~

110pRegClk'
RstAbrt/Err'

F93427

5 AO

G

S163

CL'CK LD'
2 9

Rd + VerData

EdgeClkFeed1

11d

CO
HO
H1
H2
113

S174
DO 00
D1 01
D2 02
03 03
04 04
D5 05
CK Cl'

S32

12

GND

9

SOO

Readlabel 4

OutD.10
OulD.11
-OutD.12
-(')uI0.13
-(YutD.14
Ou1D.i5

1J 2

EdgeClk4'

Seek

S241
For Testability

~

7
S163
Ep
10
ET b9

Hi1

3

H2j3
H3 4

DalaRd

_!!:L!'eClk'

Seek

_~ctorMarkSD'

AborlSD

15

A1
A2
1\3
A4
A5
A6
A 7g 11

00
01
02
03

12

Adr.O

11

Se Adr.1

10

Se Adr.2

9

Sec Adr.3

Hi2

16

12

1..-_..;;5:-:~ 6
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SegCnt.2'

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ForNxtAdr.5
ForNxtl\tir.6

12

Hi 1

1:-1I

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CIS' CIS'
13

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4 11,2

01 11

:1
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02

10

ForSeql\dr.6

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c15 a

GND

19117~Or181

4

l

5
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sOO

HiP

.. Testabifity control to be odded for etch module.
Dosignor

Data Buf.!.:/..

~..... F~G.f;l~eron

DevRdData

1-"\~ DataTime

11

,J.9-

DS257 0 t-9
__-.,,..-_ _
B i7 d

n

Syndrome.OO J

.3
f

a

10

~

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S86

........ 8

13

:C,.-I-=--"':":'-f

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S175
15
D
0 f-1::-::4::-t~NO nCo mI:l
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(CI/(

= DevClk')

SerWrtData

BulOut.OO
3
OufOut.01
4
l1ulOul.02.
7
[J
Flll·IOlll.03
Bu rCSUl.04
13
BufCSu!.05
14
l3urC5u!.06
17
Bu fOu I.07---ro

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11

I

Hi2

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1

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S374
DO
D1
D2
D3
D4
D5
D6
07 h5
CK
11

DevlnRegClk'
Hi2

:~
SOD

5
6
9
12
15
16
19

OutO.OO
OuID.01
OuID.02
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Ou1D.05
Ou1D.06
OulD.07

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1

I

HO ~
13
H1 14
1-12 15
H3
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9 LI S194
10 52 g4
S1
CK
Cl'

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2

00
01
02
03
04
05
06
07

OMeF

7
(RI
5 DO
I!- D1
3 D2
L 03

I

I

3
4
7
0
13
1 ,~
17
18

Hi2

i

Dav+-Buf

'13

9 LI S194
10 S2 h4
51
CK
Cl'

DevClk1' 11

!

12
1-10
1-11 14
H2 15
H3

!

GND

!

7
( AI
6 DO
4 01
3 02
2 D3

5374
2
DO
00
5
01
01
G
02
02
9
DJ
03
12
01\.
01\.
15
D5
05
16
DG
06
19
07 g5 07

~

loadReg

DovelkFeed
:
----~------~~OO

I~
Hi2

BufOut.Oe
3
Bu1Out.09
4
l1u rOu!.1 0
7
BUrOll!.11
0
[1LlfOu!.12
13
-[1ufOuI.13
14
[lUIOUI.11= .~
BurOu!.1!)
10

S374
DO
00
D1
01
D2
02
D3
03
D4
01\·
D5
05
OG
06
07 15 07
CJ<
11

I

GND

7

f]'-

2
ti
6
9
1?
15
16
·19

l-/i2

OC'
1

I

5
4
3
2
9
10

RI

12
HO
1-11 14
1-/2 15
H3

r-rr

DO
D1
D2
D3

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S2 14
51
CK
Cl'

mFr

~

DevClk1' 111

3
I!7
0
1 :3
11\
17
10

Hi2

5374
DO
D1
D2
D3
DI!05
D6
D7 e5

I

(rRI
5 DO

~-~-r--------~I\~D1

Hi2

16
19

11
OMeF

'1

12

HO~

9 LI 5194
10 S2 e4

--~~~~--~--------~S1

CK
DevClk1' 11 J

15

OutD.08
Ou1D.09
Ou1O.10
OutD.11
OuID.12
OulD.13
Ou1D.14
Ou1D.i5

1-11 14
1-/2 15
1-/3

~----+~----------~3~D2
~------~-+---------~2~D3

loadAeg

2
5
6
9
12

~C'

CK

7,..---......,

00
01
02
03
04
05
06
07

15
1
13
Hi2 1 I!12
(,NO 11
10
lIi2
9

~

XO
X>Y
YO
X1
6
X=
Yi
X2
X = <
SyncTime 4 3 2

.

GND

Cl'j
1/

JillJ

SyncOK

I

GND

I
!:!~!~E~"P~_~~__D_a_t_a_S_e_r_ia-:J=.:~~W~
....; ; :,../~.9;,;. ,t;.'J1,. :·:~ ~ a~ I;i•

rxE:R"ox

Projecf

.

,File

lD(.'signcr

..:7r.e_r_ _~~.,_R_D_C_0-l9'~!.~III••J~~~:;~:::s~!..:.:..-:e..:.;ro:::n~...t",~::.:..:1.":':~~e'!~rItlIiII1I

BitCn 1.3

9

CRCWrite
8

DevWrtData'

S ndrome.OO
ECCWrite
DataTime
SerWrtData
DataTime

Hi 1

4

LoadR
______

8~g~_~

___r-v_1

6

6

ParChkTime'

c14b~------------~~--------------------------~-U
~SOO

BufParErr

5

OddTotal

S

OddBits

!it'
_~rOut.16

_!?J!.vl n Re

Clk'

DevDataPar'

10
12
S'
11

BitsDiff

Q 9

1§74
cl14b
C

R'

Q'

13 ,

t!J..:U

!:..Q:tldne
~vCllUtT).13
u1D.14
OulD.15
..QLLtldRegLd
EdgeClkFeed1

S174
3
DO 00
4
01 01
6
02
11 02
03 03
13
04 04
14
05 05
CK Cl' Q10

OrSel.O'

DrSe1.1'

9
2

Reset'
TestMode'

11 OevSelOK
..;G::,;N..;,;D;;;-,.-;.-+ 130
131
132

S08

133
12

7

Hi2 10

• .9..!.!.tD.10

S163
Ep
ET 110

12

.Q!:!.tD.11
WriteFault

11

• ..Q.r;S e I. 1
DevSeIOK'

fndexMark
SectorOO

~orMarkf'

(elk

= ByteClk')

• Testability control to be added for etch module.

File

Designer

:~!!!DtIL~~-.:._D:..:...ri:..:v.:e..:.~~e.:t : .IJlt~J..f.fl~c,e.G,~t~ol_! ROC 13':~..Y~~.'lsCl~.. ~~~-'-'::":J..:.;~M~IiI_"'1II

QD
@J

G§J WriteFault'
G]J.£!aruu

Direction

3
Hi1

2

CGnd1

~)~_a_C_kO_O_'______~~

@J~

DrSel.O'





CGnd1

GD

Hi2

9

TeslMode

8

TesIMoc!e'

Idata.OO

Se AdrXferS

4~'B

Idata.01

OirecHon'

14

Idata.02

FaultClear'

12

Idata.03

Step'

S374
DO
D1
:LJi;.iJ)":Tcl
02
OutD.11
,
8
-6li16~r;-3 D3
04
D5
(5Lllf)~"-- f7
OutD.08

C;Ut[).O~J

4

h!

-6UTo"":--:'-J--R-4
:~Tuil?.: 1 i'i

I

1 fJ

!I

06

07
CK

00
01
02
OJ
Q4
05
06
07

2
5
6
9
12
15

16
19

Read
WriteFault
eekComp
TrackOO
IndexMark
SectorMark
AdDnta
Dev IkSOLirce

h8
OC'

!
I

DriveSelect1 '

17~3

Idata.04

DriveSelecl2'

5

Idata.05

DriveSelect3'

7

Idata.06

DriveSelec t4'

9

Idata.07

HeadSelecl8'

18

Idata.08

HeadSelect4'

4~'6

Idata.09

HeadSelecl2'

14

Idata.10

HeadSelect1 '

12

Idata.11

I.2.sIMode'

_S.eqAdrX.~f~e~r~S__~1~3~

_:.?lep'
Direction'

1?:.1"'

-i: a liii Clc·:':'a-r"-'--"':"1-0~-I

S280
i15

EVN ~

00

HeadSelect8'
Hoad;;:,olecI4'
~Glect2'
Ii'ea-JSolecl1'
~CaloD'
V7ri!oGil!cfJ'
-:i:V:;-I~6al

13
12
1"1

10

9
0

a'
if
-f\~f_rJ.t f!C I n('J.~;..
Gl\ll)

G

TestGmPar

S280

f16

EVN~
000f--i'
ReadGateO'

17~3

WriteGateD'

15

"I

...:!:..YfriteData
TWriteDala'

W

Idata.12

5

Idata.13

7

Idata.14

9

Idata.15

-WriteData

-WriteClock
TWriteClock'

laddr.4/a
-ICHfdr.5'
IMeF

11

10
11
9

'" Tostability control to be added for etch module.
" File

Designor

I R DC 1 5 ·~~~t.~~E~G.(.lf11;,;..:;..er:.:o:.:.:.n~-=':J..:..:~~iI!I_"'.

Idata.OO
Idala.01

RateError

GND
ND
ND
GND
GND
ServiceLate
Se rviceLa te'

9

laddr.7'

3
4
7
8
13
1417
18

10

Ed eClk1'

SectorOOS
GND
Tr(lckOOS
GND
SeekCompS
~ND
Dov~clCiK
~ND

S257
2
DO
3
00
BO
5 01
6 (}.,
01
11
02
10
02
B2
1403
13
03
B3
f9
SB

S374
DO
00
D1
01
D2
02
D3
03
D4
04
D5
05
D6
06
D7
07
i19
CK OC'
11
1

Idala.02
Idata.03

Idata.04
Idata.05
Idata.06
Idata.07

Idata.08
4

IMux.08
Idata.09

7
9
12

IMux.09
IMux.08
IMux.09
IMux.10
IMux.11
IMlIX.12
IMlIx.13
IMux.14IMux.15

IMux.10
IMux.11

lade/r.7'
GND

Ed eClk1'
IMeF

S374
3
DO
00
4D1
01
7
D2
02
8 03
03
13
D4
04
14
D5
05
17
D6
06
18
D7
07
f19
CK OC'
11
1

Idata.10
Idata.11

Idata.12
Idata.13
Idata.14
Idata.i5

4

193
191
189
187

183
179
177
76

165
164
162
161

159
158
157
153

6
laddr.4'

BufErr
WakeReguest
RdErr
Ifi2
WritoFaul'l
l-li2
OFallltF
1-112

laddr.7'

2

S257
DO

3
BO
5
D1
G B1

00
01

4

IMux.12

7

IMux.13

11
D2
9
10
02
B2
'14
D3
12
13
03
B3 99
SB
E'
15
1 r
1

5

BufldataPar
Test q~Par
~tatusPar
ldata.12

IMux.14

6
XO
5
Xi
4
X2
3
X3

OX

7

Idata.16

S253
YO
e18
Y1
OY
Y2
Y3

IMux.i5

laddr.6'
laddr.7'

GND

2
14

IMeF'

SectorOOS
RateError
TrackOOS
SeekCom S
Dov 01 K
BufErr
RdErr
rile auB
CiFaul tF

13
12
11
10
9
8
4

S280
Hi2

i16
EVN
OD

dSlatusPar

StatusPar

2

1

Ed

III

Testabifity control to be added for etch module.

148

1.

FPLAT
P20
P19
P18
P17
P16

~ P1

SPLAT A

WriteFault'

~

TrackOO'

8 P7 d1 P14

P2
P3
P4
6 P5

--~--~~~~7~P6

~-'::'~;;:;"-'---r~g~P 8

GND 10 pg
.;;;;.;.;----;;;.P10

1

P1 3
GND
P12 ~=-----'--"';;;';";=
P11

FPLAT
20VCC
P1
P20 19

Index'

2

Read '

4 P3

------------~~3~P2

--~~------~~54p4

SPLAT B

VCC

P15~~~--~~

6 P5
--~~~~--~~74p6

VCC

P19~1~8~------~

P18 17
P17 16
P16~1~5~--~

P15 14

8 P7 e1 P14~1~3~--t

-----.........-.-:.....,...""9,-+ P 8
10 P9
.......----;;;.P10

CGnd1
( Gnd2
CGnd3

SPLAT C

+ WriteData

1
3
4

}

,.. WriteClock 7
+ ReadData
8
9
"" PLOClock
GND 10

P13 12

GN D

P12~1r--..........-.;..--

P11

FPLAT
P1
P20
P2
P19
P18
P3
P17
P4
P16
P5
P15
P6
P7 f1 P14
P8
P13
pg
P12
P10
P11

~
19
18
17

1~

14
13
12
...1 1

I
I GND
-WriteData
-WriteClock
-ReadData
·PLOClock

Note: Splats A, B, and Care 16 pin platforms centered in the 20-pin pattern
Spalre Positions (6):

~

FPLAT
20VCC
P1
P20 ~
P2
P19 '-I! 0
'P3
P1 0 '~ 7
5 P4 93 P17 .~ 6
tiP5
P16'"' 5
f P6
P15'" 4
P7
P14~3
P8
P13~2
GND
1 P9
P12 ~ 1
---------~ P 1 0
P 11 '"'

i

FPLAT
20VCC
, P1
P20 ~
P2
P19~8
P3
P18~7
P4
P17~6
~ P5 c 10 P16 ~ 5
-r P6
P15~ 4
P7
P14 t"! 3
P8
P13~2
GND
1 P9
P12 f>I! 1
------~P10
P11f"

i
i

Splats, S

FPLAT
P1
P20
P2
P19
P3
Pt8
P4 h9 P17
P5
Pt6
P6
P15
P7
P14
P8
P13
GND
P9
P12
----.-;..;~P10
P11

FPLAT
20VCC
P1
P20
P2
P19
P3
P18
P4
P17
P5 b10 P16
P6
P15
P7
P14
P8
P13
GND
P9
P12
------.....;.;~ P 1 0
P 11

FPLAT
20VCC
P1
P20";~
P2
P19'"' 8
P3
P1S'"' 7
P4. P17 '"' 6
e1
( P5
7?16'"'5
P6
P15~4
!
P7
P14 -I 3
(P8
P13-1 2
GND 1 P9
P12-1 1
----..;,.,;4-P10
P11-1

Rav A:

Initial Reloase

Rov B:

Added SyncTime to Timing Generator PROM address input.
Log. Dwg. p.10.
Changed DevSclOK counter load control so that Dr/HdRegLd loads counter
only if DrSol[0:1J is changed.
Log. Dwg. p. 14.
Adeled Seel~ COLlnter at b9 to prodllce seek Step pulse wtlen DevOpReg is
loaeled with Seek bit (OlltD.05). Causes SeqAdr[0:3] to be 0000 when Seek
is true. Inhibits WUke-up llntil Slep has been generated.
Log. Dwg. p. 2, 3, 4, 5, & 15.
Replaced S189 (16 worcl) bufler with F93422 (256 wore!) buffer.
Log. Dwg. p. 7 & 8.
Deleted Wake PROM and Counter; removed XferLate from 10Altnj deleted Flow Control
Log. Dwg. p. 3 & 13.
Counterj added Data Wake up/down counterj ildded 3 wal~w count to lOAttn.
Deleted DHConnecl signals and IDWorcf pcHity gen.
Log. Dwg. p. 14 & 16.
Log.
Dwg.
p. 6 & 7.
I\dded ability to load DevBLlfAdrReg & MemBufl\drReg from processor.
Log. Dwg. p. all.
Numerous mino"r changes in mechanization as a result of above.

RevC:

Set Sec to rMarkSP wi th SeclorMa rkSD.
Log. Dwg. p. 12
Log. Dwg. p. 7.
Removed cross wire of MemBLlfl\drReg Clear and SeclorWakeS strings.
Disilbled S,eek Counter at max count.
Log. Dwg. p. 4.
Changed resat of Op J1egister from Reset' to RstAbrt/Err'.
Log. Dwg. p. 4.
Aelded RateError FF.
Log. Dwg. p. 3.
Added Datalleq to hold term for WakeReq'F to override 10Strobe reset.
Log. Dwg. p. 3.
Added term to Wake Counler enable to prevent incrementing beyoncf max, or
decrementing below O.
Log. Dwg. p. 3.
Adds RateError to Status Parity Generator.
Log. Dwg. p. 16.
Inverted Sync pattern.
LoO. Dwg. p. 9.
Changes DecClkEnable counler clock to DevClkSource'.
Log. Dwg. p. 13.
Adds SectorM arkl'.
Log. Dwg. p. 14.
Fixes Testability control.
Log. Dwg. p.5.
Fixes Idata Parity select.
Log. Dwg. p. 16.
Removes 25S09s frOIll l3ufAdrlleg. Replaces them with s257s.
Log. Dwg. p. 7.
Changes RateError qualifier to DataWrt.
Log. Dwg. p. 3.
Log. Dwg. p. 14.
Cilanged I/O connections to device to reflect etcll version with multiple drives.
Log. Dwg. p. 5.
Made SeqLlenceEnd' t rue last byte time of SequenceEnd only. Added SOO at b6.
Movecf S200 from i 14 to i 15.
Log. Dwg. p. 15

Rev D:

Added one clock delay and DevClk synchronization to parity error logic.
Log. Dwg. p. 10.
Deleted Abort from Wilke Request logic.
Log. Dwg. p. 3.
Revised DataXIerS logic.
Log. Dwg. p.6.
Changed BulSeql\dr clock qualifier to SeqAdrXferS.
Log. Dwg. p. 6.
Devided load on DevClk'.
Log. Dwg. various.
Adclecl TestMocle' qualifier to DevSelOK to prevent writing on device in Test Mode.
Log. Dwg. p. 13.
Added PrimelData to [31lfAdrReg Select.
Log. Dwg. p. 6 & 7.
I\dded Write Filult Clear r-F.
Log. Dwg. p. 2.
"Or'ed VerifyLabel with ReadLabel at Op Reg input.
Log. Dwg. p. 4.
Q~lalified BufSeqAdr Registe r Clock wih t OMeF + OMeF)'.
Log. Dwg. p. 6.
Changed data error check to loo~~ at Syndrome.OO during ECCCheck.
Log. Dwg. p. 11.
Changed DevBufAdrReg clear term from SectorWakeS' to ClrDevOpS'. SectorWake cleared
100 soon. Changed SectorWakeS' to SectorWakeS.
Log. Dwg. p. 3, 5, 7, & 12.
Added direct set of MyStrobeF by AllowWake to insure Wake-up inhibit.
Log. Dwg. p. 2.
Log. Dwg. p. 5.
Removeel Fleset from S174 @ d4 to prevent "gli tcll" 01 SectorOO.
CIHlngsC\ reset of XlerDataS FF to SequenceEnd'.
Log. Dwg. p. 6.
Changed latch of NonComp FF to insure at least 2 DevClk times on.
Log. Dwg. p. 9.
Revised serial parity chec~: :5:: II:$~~~ :5::
Ir:~~~~?S:: llr:~q~gs:: IW9:q~?g:: IrF:~q1~g::

E1::: llliE:s:: IC~3)~Cs:: n~J~~: :S: :ll:~~?:~ :5:: 14 (~~:7:'~ :S:: lI:~~?:~ :5:: l(~~?:~ :5:: 1§.t3:::
mrw (~~~~<: :5: IC*??:~:: :5: II:$??:~:: :g: I : ~:~~1::: 5: 15 ~]~~?g::: IE2..~::: llr:~~~~g::: IrED
§i~:E:: IC§1D I:$?!:~:: :; lED::: II:$?!:~:: :;16 mn::: IGEE::: lIE::: IrF:~H~g::
§§:s:: I($??:~:: :51:~??:~:: :g GEE::: Ilr:~~~~:s:: 17 rF:~~~~~:: II:F:~q~??S:: le~?~:~~g:: Ir~??:~:: :5
f}??:~:: :5:: II:$~?>:S:::: IlED::::: II:F:~q1~g:::: 1 1:$?:~q~S:::: I@1i:S:::: I : ~:~1?:: :5::
8

1

m-n::: 1@]D:: 11:$~~:7: :;:: 19 I:$~?:~ :5:: l(ll§:I: lCii§iJ:: I::::::::::
GEE cg:::: 11:~~:7:~ :5::: 1(~:1?>::5::: IE5:::: 110 I: :s:~~~:: :5: Ir:~i~:~~~: :;: II:~~X~~: :5: I:::::::
fi3i~s:: lEO:: II:F:~~~~g:: 1(1rrr::s GEE::: 111 GEE::: I::::::: ::: I::::: ::::: I::::::: :::
lED::::: IrE::::: IE5::::: ILEn::::: 112 LED::::: 'lED::::: IlED::::: I
1:$~:7:D:: l@Es:: !I:$~~:~ :S:: II:$~~:~ :5:: II:$~~>: :5:: 113 lED::: I[?D::: 11~1:~~: :5:: II:F:~q~~g:: .
[~~,L~~~S C~~~~-.J
1111'1

I'

II

I

•

IIII1II

II

I

",1111'"

I'

III1IIIIIII

,,11"11111

11111111

••

I

"'"

1111"

:::::,::::: 1[@ljE:: Ir~~~>: :5:: Ir$~~:7: :5:: I[~~~:~ :S:: 114 lED::: lGEE::: Imn::: 1mB:::
[illB [~~~~~~~ J G?~~2~~ ~ ~ ~51~ ~~?~~2) ~ ~5 [?~~~~~ ~ ~ ~5115 [??~~2) ~ ~ ~5
lfuti::: ImD

Gill::::

mE5: :: 1(~~?:(5:: I($~?:~ :5:: ICillB::: lmn::: 116 []E3:: :l(~~~:~ :5:: 1E5:: :1l1ES:::
(@lO E3::: lI:2:~$??:s:: Im?:~:::s I: ~~~~:E: :5117 1:~~:7:~ :S: 1[§3::: 11:2:~~?~:5:: Ic:m:s:::
[~3~~~5 §3::: I@O:: l[ ~~~?:: :51:~~~:~ :5:: 118 LED::: l§I3::: 1[1~:~~?:g:: 1[§O:::
C~?:7:~::5 rJ1E3 C:~~~:q::5 C~??:~:

:5

1:

~~~~::

: : : : : : : : : : : : : : : : : : : : :: : : : : :: : :: :: :: :: : :: : : :: :: : :: :

20pins: 1\

i...------.J5

rxi~ox
~:;Sl.

Project

DO

16pins: B

5

14pins: C

22pins: D

:5119 1):~~9:: :51: ~:~~~:: :51:$~?:~ :5:: ILEn:::
: : : : : : :: : : : : : : : : : : : : : : :: : : : : : : : : : : : : : : : : : : : : : : : : : : =1==

24 pins: E

[:::5

RDC Layout

File

I RDCLayouLsi

Nole: The short vertical lines indicate
filter capacitor locations.

. Dosigner

J. F. Cameron

101·200
1-100

SPLAT B

SPLAT A

El
El
E.l
E1

EJ---1
EJ I
EJ I
EJ I

I
I
E!J I
EJ I
EJ I
E1 I
EJ I
E1 I
EJ
El

E1
E1

EJ
220 Ohms
114Watf

330 Ohms
114Waft

220 Ohms
114W~lff

330 Ohms
tl4Watf

I
I

E1
El
EI

I a

r-

EI

220 Ohms
114Wall

330 Ohms
114Watf

2200l1ms
114Watf

330 Ohms
114Walt

220 Ohms
114Watf

3300llms
114Watf

220 Ohms
114Watt

3300l1ms
114Walt

SPLAT C

El
EJ
EJ
EJ
EJ
EJ
EJ--I
EJ I

E1
E1
100 Ohms
114Watt

EJ
I

P13!

110 Ohms
114Waft

110 Ohms
11lfWatf

El
EI

110 Ohms
1 14 Waft

110 Ohms
114Watf

:-EJ
'File

t RDCPlatforms.sil

Designer

.~~~1!'! e ro n

I

E1

I EJ
I a
I E1
I El
I EI

I a
H=J

HiPrilnt'
6
...
Tlm-e.;.;r';Oln'"'lt.....-~4.. NMI'

Ad.15
msb A15 25
A14 ~4
!~l.;..;.;St;...-----4~~(q.RESET'
A13 3
A12 2
PU
A11
0
38 SO
9
Ad.10
A 1 0 1-1~6~---::A::':d;':'.O~9::w-~";';';";~-~"IRO'

~RDY

Jmll

A05
A04
A03
A02
A01
Isb AOO

14
13
12
11
10
9

IRO'~2;;.;5::..---T.;.;i-m...e;.;.r_ln;.;..t'-,,~C

20 VCC1
1 GND1

EnRam
Ad 15
Ad:07
R s t'

:16 CS
37

Ad.05
Ad.04
Ad.03
Ad.02
Ad.01
Ad.ao

3
4
5
6
7

<

PB4~1~9~--_+~~
PB3~2~:1~--~+_~_
PB2~2~2~__-~~_I_~
PB1~2~3~__--_+~+_~~~

R/W t-:3::,.4.:.-_ _ _ _ _ _ _ _ _ _,:;:,3.:o:.,5 R IW
04
msb 0 7 ~22~67~-;D;.:a::.:.l.:::.a.:.::0~7_-----oI--;.226~7
Dala.06
g~ 28
Data.05
28
MCS6502 D4 29
,Oala.04
29
6C
D3 30
Da18.03
30
~
D2 31
Da18.02
31
.. CK10
D1 32
Data.01
32
Isb DO 33
Dala.OO
33
~

SYNC.]

37

~
CK2i

: 51Cn K
'f 20

3

,9

13 3B

~12

10
S04,

07 msb

g~

Isb

J

PBO 24

2

4-

D4
D3

A LS166
B 4B

~g

MCS6532
6A
DO Isb

1....-..;.oH E

g~

' - -_ _ _--J

1

F

1
1

G
H

OH 13Msll'

~

msb
first

lS163 CO {G15
9
GND
1 SI
·6 B0 2C HO ~1
. 2A \.{J loadMsg' 15 Sl
5 B1
H1 2 1 . -~ /
3
4 B2
U2 4
~LSOO
CK Cl' CE'
9
"'./"-'/"'~
GIN~D-I.--lI'-I B3
..13
HS'
71
16
--------~R-st~'--1
6.6k
~-.
C""ND
---:;-Q" EP
...:
....:..:.:.::'_ _ _ _...
--:""::::""ET
A_d~.0~0~~19;;.! AO i2716
I\d.01
22
Cl'CK lD'
9
Data.OO
I\-d~.0:-:2=:-"';'23i-1 A 1 6 D
;...PU~-,__1~r 2 r 9 1
00 10
Dala.01
HS'
____________
;l\d.03
1 A2
01 11
Data.02
":""~i!'----:H A 3
02 13
Data.03
l~","--i-I A4
6 HiPrllnt'
03 14
Dala.04
~~r---~A5
04 15
Data.05
l.o.o;-~--,PI A6
EnHiPrilnt'
11
05 16
Dala.06
LSOO
'~~-..;;.!A7
06 17
Dal. 7
'~~-...;;./A6
07......---~~...- 2 EnRom'
Ad.15
~~:-~~A9
,';';;;';''';'';:;''--...:::..JA10
LS04
EnMu)('
Ad.07 1
GND
.EnRom'
S04

11 3B

P2

PA61-1~-"';;;';';-";';';"';";';';';';'14 lS174 15
PA 5 t-+ir--------~ DO OOl-fooi----< 14
RESET'
PA4 1
13 D1 01 12
13
CK2
PA3 11
11 D2 02 10
<12
10
3 D3 03 2
A 06 msb
P A 2 '9
4 04 04 ~5--::E~n.,...V....
id,..e-oA05
PA 1 6
6
7 EnMSQ
A04
Isb PAO
05 05
A03
CK Cl'
A02
msb PB7~1;..::6~_ _...,
91 11
PU
A01
PB6~1i-:7~_ __+-,
1
liS'
AOOlsb
PB5~1!-i!!8!--_ _............

RS'

34

4A

1
loadMsg'
msb PA71-1"""'--iEjo¥n~HiPi:"roJiilfil-n":'ll-

JO CS'

A091-:1~7:--~A'::;d.:";CD:';8A061-1;.;6::-----::A~d;.:..O~7~
~
A07~r----::~&A061-1~5~---;A~,d:;.:..• CrD6
....._ _ _ _ _ _oI_-4.:.;20~

~V*CL'TC;i:-_ _...81HVCC 1
-G~N~D--~2.;,.t.1 GND1
....-............---.;;;....... GND2

VCC
GND

PU

H:

~

vce

VS

6

~=t~~~B~~:-_~~~ ~~

t:t:::1=

K BO

~:,:.p..';'--.....!~XO

OX 7

X3
lS253
M~--",", YO 6E
~:-:i:--~i-:i-I Y1
9
~~--;..;..!V2
OY
";';';::"':---:...:::..jV3

Dat a.07

3

j....:';';;:""'--.....!:..j X 1

X3
LS253
~~~--..;.o~YO 5E
~.;.::...:..--.....!:..j

Data.06

I---;~=---_--;";"" ~~

Oy 9

Data.OO

lEX'

1

SEl1'

IliJ

5~§
lS04

SElO'

[EJ

~A.;;;.d;.;:.0~1_ _ _1.;..;3~~ .12

~04
.:.;A..:;:d;.;:.0;.;:0;...-____..:;:9-1~ 8
~04

BAd.01' 2
BAd.00'14 S2
S1
EX'
EnMu)('
1

51

3[3:rf

LS04

Ad.02

~';"';;;";~---:":~Y3

BAd.01' 2 52
BAd.00'14 ~
EnMu)('

0 X j...:...--==:":':;:';:;:""

~.;.:;...;.:...--:...jX2

GND~
XO
7
)(1
Ox
X2
X3
lS253
YO 6F
V1
9
OY
Y2
V3

BI
25
27

Data.05

J--.j~r--~""

XO
1-....;:r;;.:.;;""-""::P-IX1
OX 7
I-:~:-:----;;"'/
2
J...-:":":;:':::"-_.....!:..j X 3
LS253
~~~----:":~YO 5F

Data.04

Y1

1--~~---:"::o,fY2
~=;i;-_--:":"f

20

Data.01

OY

Y3

E~n~M~u~)(~'__~~~~

Project 7 -Wire Terminal Interface
DO

KBD+~

21

Pin c()nnections on this page are to J2, a DA37S connector

'AHC

BAd.OO'

x

EnMu)('

:ROX

BAd.O 1 '

Backchannel

G;I;,N
__
D _ _......

File

Designer

Terminal01.sil

Thacker

Rev Date
Gb

12/26/79

Page
1

Jl
OA15S Connector

C2'
CD
CD
CD

Eel -) TTL

P2

~________
V~S_<17

NData2

10
Dat.21

Data2
6

NData1

CD
CL
CD
C7'

____________
H.S_<15 •

Data1
NDataO

HS' <16

4

2
DataO

P2

Dal.OI

1
2

MC115

3
4
5
6
7

8
9
;;;;;;0.0._ _ _--'_< 10

ClkCR'1
o MC114

GD NClkB
4 ~ 2
G:D,.-.__C_lk_B_ _ _ _.:::5-l~ 3

12
1

TTL

MC141

• = DO Connection

~--~1--i-1'!i-I DO 2C 00

B'I

9 D1

01
02

~----~--~6HD2

BI

--------I---~D3

03~------~~

o MC114

G:Dl-___.

ND
G....
___
Video'

PI
DA15P Connector

P3
P3

CD NData3
Data3
C1 1
C4 1 ND~t~2
C31 Data2
[) 1 NData1
C51 Data1
CLl
C7 I

ND~ti!Q

[10

NClkA

12

P3

AI

11

Adl

3

CLI
1]2"'1
1]1

~

BI

15P1

IV

Bdl

GND

~ 15pf

B'I

2 Bd'i

vce

NClkB

,- Dataln

1000hms

Cvv;=t

Eel -) TTL

_6L~5
~

InMsg

10

9

MC124

E)

...E-.n;,;;M...S....
9 _..
__.

4E

Msg'

4

~8,--_ _.....01~

6

I

Mark = Data 0 = HiQh (Idle State:
Spece = Data 1 = lOw
TTL -) Eel
OutMs

3 NDataOut

11

SOO

@)

~__~~u:::.ot+GD

MC125
SOO

NOTES:

1) All signals with names of the form xxxi have 51 Oohm pulldown resistors to VEE (-5.2)
(28 places)
2) P2 consists of wire-w rap posts on .100 centers

Project 7-Wire Terminal Interface
DO

Video Interface

220
ohms
GND

VEE

vee
VEE

3) Ground, VCC, and VEE pins for ECL chips are as shown:

)X

9(

~ 15pf

GND

NDataln

5
6

~~

ClkA

'--"............_ _ _ _ _ _.....I.....

tC

S0:JI~

14 Ad'i

1 ClkB

~

P3

A'I

DataO

IJIJ

0:3

<7

15pf

MC102

1

<19

1,16

8

File

Designer

TerminalO2.sil

Thacker

Rev Date
Gb

12126/79

Page
2

Motorola
MC7806CT

,_ _ _ _ _ _ _ _ _ _ This hardware ts NOT
part of the terminal
control board. It is
mounted on the terminal frame
Transformer:
Stancor P8604

Belden 17252
receptacle

J4

Belden
11250 or
17251 cord set

Motorola
MDA 922-2

20VCT@ 1A.
P4

IN

Sec
SPST
Switch

Motorola
MC7805CT
VCC

+

1 A fuse
Pri
Pri

Chassis
ground

GND

Ct
2

V

Sec

r-'000/~

1.

1

V

Molorola
M 7 5.2CT
2
3

VEE

r

3

·,000;25
Mallory TC2510A

Power To
Display

(.625 dia l( 1.5 long)

Notol:

1)

JI4115 Waldom/Molex 03-09-2031 housing
with 02-09-1118 FEMALE terminals.
P4 consists of three Molel( 02-09·2134 pins
mounted on the PCB on .200 centers. The hole
cllameter for these pins Is .093

2)

P2 consists of an array of .026 square wire wrap posts.
Terminal Co'ntrol Board

Thellnished hole 10 for these posts should be .035.
There should be two rows of pins. Only one row is shown
oln the logiC diagrams; all pins in tht\ other row are connected
to ground:

t

.100typ

--1

•
•

I'

•
•

t-1 r--

--11

II

• • • • • •

• 10

•

• 20 - - - All pins In this row grounded

•

•

•

•

•

Signal pins

.100typ

3) VCC and VEE have ,one .01 uf bypass capacitor per IC package.

:ROX

)ARC

-

Project
DO

7 -Wire Terminal Interface
Power Supply

File

DeSigner

TerminalO3.sil

Thacker

Rev Date
GA

4/14/79

Page
3

A15A14A13A12A11A10 AS A8

l

I

l

A7

I

A6 A5 A4

A3

I

AO
, location:

I

I
=)

~ Ram Address

Enable EPROM

Bits

o =) Enable 6532

RS' A6 A5 A4
X

X

X

)(

X

X

X

[F800-FFFF]

-I

A3

A2

A1

AO

6532 Address lines
(R/W)

A

A

A

A

A

A

A

[00-7F]

Ram Address

0

X

X

X

0

0

0

[80]

Output Register A

0

X

X

X

0

0

[81 ]

DORA (R/W)

0

X

X

X

0

[82]

Output Register B

0

X

X

X

0

[83]

DDRB

0

X

X

IE

X

[84,8C]

Read Timer

0

X

X

X

X

[85]

Read Interrupt Flag

0

X

0

X

EDOED [84-87]

0

X

IE

TPOTP

X

X

SEL SEL MO M1 [GO-CF]
1

0

IE = DisZlble (O)/Enable (1) timer interrupt
TP = Timer Period: 0 = T, 1 = 8T,2 = 64T, 3
ED

A1

EPROM Address Bits

• 1

0

A2

0

0

(R/W)

(R/W)

(Data not used)

Write Edge Detect Control

[94-97,9C-9F]

Write Timer
Read Multiplexer Inputs

o

= 1024T

= Edge Detecl: 0,2 =) Disabled
1

=)

Interrupt on PA7 negative edge

3

=)

Interrupt on PA7 positive edge

SI:LO, SEL 1 determine the keyboard word transmitted to the multiplexers

F()r the Altoll Microswltch keyboard, the bits are as follows:
BIT:
7

6

5

4

3

2

1

0

C3

VS

TCO

TC1

0

MX1

MX2

MY1

MY2

KS2

KS3

KS4

MS1

MS2

MS3

C2

KSO

KS1

C1

zero

K

CO

5

4

C9

Z

Ishift

C8

1

esc

C5

X

0

C4

3

2

CD

lock space

CC

R

T

P

I

\

If

bs

(KB8-KB15)

E

7

0

U

V

(KBO-KB7)

j

ret

to

del

tab

F

ctrl

C

J

l

,

W

Q

6

[

=

G

Y

,
S

B

]

spare spare

A

9

mid

8

Inn

I

spare
rshift bot
none
H

none

N

none
M

(KB8-KB15)
(KBO-KB7)

O's correspond to depressed keys

(KB8-KB15)
(KBO-KB7)
(KB8-KB15)
(KBO-KB7)

ThelSe bits end up in Alto memory as follows:
BIT:
Address:
177>034
177>035
177>036
177>037
177030

0

1

2

3

4

5

6

7

8

9

5

4

6

E

7

0

U

V

zero

K

3

2

W

Q

S

A

1

esc

tab

F

etrl

C

R

T

G

y

H

8

9

I

X

J

B

Z

N

M

0

0

P
L

Ishift

,
j

lock space

[

KSO

KS2

KS1

11

12

I

,
ret

13

\

]
to

14

15

If

bs

spare spare
""irl

In'"

del

none

=

rshift

spare
bot none

none

KS3

KS4

MS1

MS3

MS2

Terminal6502.sil

8/22179

37-Pin
MALE
D-Shell connector
With Rear entry Hood
and Slidinu lock retainer

50-Pin
Card Edge Connector
AMP,P/N 1-583717-1 H~ouslng)
AMP PIN 583854-3 or
I
583854-5 (Contact - 50 reqd.)
--------(conlacts are solder cup)

t-

I

- - - - . - - - - length - 6'0"

I--P2--1~
-

_________
Ca_b_le:_G_9_re_P/_N_R_CN_19_2_4______________

-

F~OARD

Gmmme'....J

7-WIBE INTERFACE
P1

.---.J1

~rn~I~I~

KEYBOARD
J1

~

7-WIRE INTERFACE
P1

1

27

BlU

U

1

W (20 GAUGE-lARGE WIRE)' •

2

9

Y

N

2

BlK (20 GAUGE-lARGE WIRE)

3

26

Y/BR

B

3

VIO

4

13

Y/R

A

4

Y/BLK

5

14

Y/VIO

8

5

0

6

36

Y/GRY

J

6

Y/GRN

7
1---8

24

Y/lBlU

14

7

O/BlK

5

0

16

8

O/BRN

9

28

GRY

2

9

Y

13

35

O/VIO

F

10 BlK (26 GAUGE-SMAll WIRE)

14

7

O/BlK

25

11

15

22

O/BlU

23

12 W/GRN

16

8

O/BRN

4

13 Y/R

17

31

BlU/BLK

5

14 Y/VIO

23

12

W/GRN

Z

15 W/BlK

24

33

W/YEl

X

16

25

11

W/BRN

C

17 GRN

A

4

Y/BlK

D

18

Y/O

1---.
1--.

1---.
~.

1---.
1---.

1---.
1---.

W/BRN

1---1---,
1---.
1--.

1----

i

I

W/O

.

1'--

1---1---.

"

B

3

ViOl

V

20

O/GRN

C

17

GRN

P

21

W/VIO

D

18 Y/C')

15

22 O/BlU

E

37

BRN

S

23

O/R

F

10

BUe (26 GAUGE-SMAll WIRE)

7

24

Y/BLU

H
~J

25

R

H

25 R

6

Y/GRN

3

26

K

29

W (26 GAUGE-SMAll WIRE)

1

27 BlU

N

2

BUe (20 GAUGE-lARGE WIRE)

9

28 GRY

P

21

W/VIO

K

29 W (26 GAUGE-SMAll WIRE)

S

23

O/B

T

30 BlU/BRN

T

30

BllJ/BRN

17

31

U

1

W (20 GAUGE-lARGE WIRE)

W

32 W/BlU

V

20

O/GRN

24

33

W

32

W/BlU

Y

34 W/R

X

16

W/O

13

35 O/VIO

Y

34

W/R

6

36

Y/GRY

1. CABLE IS 6 FT. lONG
+ 1- 41 N
2. W/GRY WIRE IS CUTOFF

Z

15 W/BlK

E

37

BRN

3. O/GRY WIRE IS CUT OFF
4. CABLE IS (GORE PN # RCN1924

1---'
~.

1---.
i---.

1---'

Y/BR

~.

1---.
~.

1---,
1---'
1---.

BlU/BlK

1-0--.

W/YEL

1----'

NOTES:

1----'
1---.
1----.

XEROX

PARe

----

Project 7 -Wire Terminal Interface
DO

Keyboard- Terminallnt. Cable

File

Designer

Rev Date

Terminalcable.sil

Thacker Ivest

Gb

12/26/79

Page
1

Changes to generate revision Gb (8/22179 by CPT).
'I) 6c.21 ~ Vcc, 6c.18 +- Gnd (EI;>ROM select signals).
2) 2b.3,4,5 +- Gnd, rather than Vcc.
a) 4c.6 +- Rst', rather than PU.

4) 4b.9 ~ Rst', rather than PU.
t)) Added an additional SOO connected to 6 additional pins of P2.

This chip prclvldes various flavors of sync via jumpers on P2.
0) Changed the way In which Rst' is generated (added power-up reset).
Changed 21 K resistors 10 10K, added 100 ohm resistor and 10uf capacitor, added
extra SOO section to generate Rst'.
~~OTE:

Changes 1·4 will be done to revision A boards via wiring, but 5 and 6 will not be done.
All changes will be Incorporated into the revision B artwork.

Eru)X Project
CSIDO

~-

Terminal Changes

File
DOTerminalChanges.sil

Designer
Thacker

Rev Date
Gb 8/22/79

Page
01

+

2
.!!l2-2
I~

A

~~

[14LS04

8

[IE

C

/I4LSOO

1

51
51

-

174LS1745

174LSOO 511 P·2 20 PINS
20

174~!;lQ

K

4

3
10

51

174LS1635I

11

1 P-312PINS
[74S04

I;

51

174LS1665

II
II

6

5

~ 03K

-,

MCS 6532

.
MCS6502

OHM

16.BK OHMI

++ + +

[5"10 OHM

I

15100H M

I

E 1110176

5

110124

5

174s00

51

E-PROM
2716

I

CAP
'1000
:25 V.
111Q105

CAP.
1000
25 V.

5 II

15100HMI

3

2

6

5

4

+ + + +

1.1MFD
P-1

J·1
PN # 206914·1

1.1MFD

J·2
PN # 206817·1

PN # 206913·1

NOTES
1. _

IS A .01 UFCAP.

2. ' l i S A .01 UF CAP.

BACKPANEL

+

I

FUSE

1 AMP

+

-

HOX

)ARC

Project
DO

J-1

8+
OFF

+

J·2

P·1

7 ·Wire Terminal Interface

I

File
Terminallayout.sil

Designer
Thack·er
I

Rev Date
Gb

12/26/79

Page
1

I 100 OHM

1

2

3

100 OHM

4
5

100 OHM

6

7

11000HM

8

11~
11

11000llM

I 100 OHM

I 12
1~

I 14

IWOOHM

J
J
J
J

NOTES
RESISTORS ARE 100 OHM 114 WATT
TERMINATOR CONNECTOR IS DA 15S

HOX
IARC

Project

DO

7 -Wire Terminal Interface
Terminator

File
TerminalTerminator.sil

Des.igne i'Rev Date
Vest
Gb 12/26/79

Page

1

P·2

VIDEO
TERMINAL

..

1---------- 30 INCHES

VIDEO CABLE

VIDEO CABLE

DO

VIDEO
TERMINAL

P-2
7- WIRE INTERFACE

IT::}-

YELLOW

ULJ

GLJ

BLACK

[!L]

[LJ

GREEN

GLJ

BLACK

GLJ
CD

IT::}-

ORANGE

GLJ

BLACK

P-2
7- WIRE INTERFACE

VIDEO
TERMINAL

CD
[iLJ
[LJ

[JL]
[LJ

DORADO

GREEN

ULJ

BLACK

[!L]

RED

GLJ

[1LJ

BLACK

CD

WIlITE

[LJ
[JL]
[LJ

[iLJ

BLACK

NOTES:
1. VI/IRE IS 26 AWG TWISTED PAIR
2. TEMINAL CONNECTOR IS AMPHENOL PIN 225-21031-101
3. P-:2 CONNECTOR IS AMP 1-87456-6
5. COVER CABLE WITH SHRINK TUBING
6. J!\OD 100 OHM -I 14 WATT RESISTOR FROM PIN # 9 TO PIN # 1
ON THE TERMINAL END OF TJ-IE CABLE
7. ADD 100 OHM 1 I 4 WATT RESISTOR FROM
PIN # 8 TO PIN # 1 ON THE TERMINAL END OF THE CABLE
8. ADD 100 OHM 114 WATT RESISTOR FROM
PIN #6 TO PIN # 1 ON THE TERMINAL END OF THE CABLE

-

R OX

ARC

Project
DO

7 -Wire Terminal Interface

File

Designer

gTerminal cable

Terminalvideocable.sil

VEST

Rev Date
Gb

12/26/79

Page
1

Controller

Addressing

00'

Ei-

~------~.

D1 01
01'
~____________
1_2_ID2 02~~~~~

3

02'!-;-;-~:;;:;;':~

.

J

1 ["

15a

2

3

13 D3 03 ........---~~....;.;..;.,
f1703'
9

./S86
25S09

2

~~~~~~DO

~~~~~~OO

[[§ill

OO~----4-~~~~~--~1

_-----:;;;~ D1 g 17
7
r~~5~~----~I~a~d~d~r.~5-'------4-----------~~B1
a1~--4-~--~--~--~1

laddr.5

_----~..;.....t02
~

!1IJ

laddr.6'

laddr.6

___~~------~~B2

_-+--I--4--':"::~

03
03

03 15

SB

~--------.~

Dad.7'

lad dr. 7'

1

K
9

Dad.5'

119

I AdvancePi

a'

ao~~~~A~d~v~P~i~e~__________________________~

E

GZ:J

MC2StartXport

13 ~~7_ _ _ _ _•_ _ _ _ _ _ _ _ _ _ _ _ _ _~~
12
vrS241

I]L]

IValig'

4

~1-1.:..:6,--_.:..IV:..la,-=-li:.1l;CI
t;...1S240

[J]ID

OVa1ig'

Ik l'

6

~...:1.,;:4~~Q""V:uP~liJi:.d

WS 240

ADDRESS

11

Ed eClk1

13

CK Cl'
1

Odala.08

Output
g; s te r
S374
2
00
01 •
02
03
04
05
06
07
h19
CK OC'
11
1

92
91

82

00
01
02
03
04
05
06
07

Odala.03

Odata.07

53

11

Odala.15

Ed eClk l'

E

Ik l'

NO
GNO

WrlCu r1

4

9

5~ 6

LdCur1CA

8

LdCurOCR

12

LdSlart

513

OMeF'
Oaddr.5'

8

WrlCurO

OMeF

Oaddr.6'
Oaddr.7'

100
01
02
2
03
S2 04
05
S1 06
f16 07

3

S4

LdlAR'

13

LdCR

GNO

HI

HI

9

I9

[11

J

[79J

RamClockFeed'

RUN

~
L

a 19c ....6_...;R;.;.a:.:.:m~C!.!:1kW1
SOO

15~5

Rst'

~~5~24-1------------~~

HI1

WakeUp Priority Encoding Logict9ns

11.2ns

,..----.,

3

WakeP1'

5

WakeP2'

[]:J

WakeP3'

C[J

03 ~::..---------...,

!lli!LU:

--c

Ba

~1.;;B_..I
S241
WakeP1'

____

1~ a
1 Iaa
____________

~
~
~~~~~--------~~Ia

WakeP2'

6.3ns

~
[)ff
D2

b
3 b

Transmil
Phase1'

6 c

r--~ptl!;.;;;a"'.:.s::';;ei1Z'N:e;x;.;,,;'~I;..':-_-_-_-~5;"
MyTask'

a17~~1~1__________1

I.)oooOB_____d...T...x...'

4

S64
a 16

g

10

/S32

5

Phase1Nexi

dTx'

4

1M '

I-T~""""""""'--'''''U est
WakeRe~

10.5ns
[3"4 f-CTask.O

Current Task Comparator (XOR)
11.5ns

10 Attention Logic

ICTask.O

11

IT54=f- CTask.1
Caddr.1'

5

6
0

4

3

[135}- CTask.3

WAKE UP &

586

X1
7 N
OX
X2
X3 d16
5253
52 d16d
51
EX' EY'

_1~C_T~a~S~k.~3__1~2~~1Bd+-1~1__~

If.

5253

XO

GND

15

IMeF'

Atln

IOAtln'

IJ:1]]

Test Shift Reg
(40-bit)
13 03
13 02
13 01
T3 DO
T.2 03
T2 02
12 01

2
3

4
5
10
11
12
14-

12150
GNO

L,~ddr.5'

1
15

~

A LS166
B
C

12
13

[)

F:

OH

G
H

SI
SL

HI

1

T1 D3

2
3
4-

T1 00
TOU3
'D 2
f6 ,01
TO,DO

10
11
12
14

"TO

5

2

HI

4~'6
S240

Idata.01

[ill]

HI

6~14
S240

Idata.02

[J]ID

Idata.03

[]]I)

Idata.04

[ill]

Idata.05

[ill]

1~~I'i.l.Q§

D1II

Idata.07

DID

C
[)

17~3
S240

III

E
F
G
H

7

OH

.ll.
HI

e7

t

QNO

13

r 9/6

AIIfL:2

AiIR.3
Aii1r'4
AIIR.5

AIIH.6
AIIH.7
W2r.5'

3
4
Q

10
11
12
14

1t

I

S240
i19;

[)

EN'

E
G
H

OH

Wl-

IMeP 1

10.08'

7 J 91 6

III

BlankTerminal
Sande onl rol
ConlrolPhase
2

3

4
IA R.3
5
IA n.4
10
TA ~
11
Wa..h.eReguest 12
enltne
14

rv

1

!.addr.5'
EdgeClk2'
HI
IMeF'

15

I

I

fN'
19J

g7

l.MeF
IA R.O
IA R.1
IA R.2

I

5240
i 19j

SI
SL
CKCL'CE'

E~a~~lk2'

7

"~9
5240

A L5166
B
C

F

Br.

5240

HI
2

15~f

5240

t"
l.MeF'
AI~R.O
AIIR.1

12

193

S240

CKCL'CE'
EdgeClk2'

i19a:=:;18
S240

"Ws

HI

A L5166

Idata.OO

..II

B

;t SISL

Laddr.5'

148

IData Bus

r1L

17

[i1y10F'

T1T>2
15T

Idata.16

(Odd Pari y

E

CKCL'CE'
719 6

~d~eClk2'

5253
XO
X1
OX 9
X2
X3 d16c

~venfleld
v~_

2
3
4
5
10
11
12
14

laddr.5'

1
15

liS
A LS166
B

Switch
Ml,

c

D
E
F
G
H

OH

13

h7
SI
SL
GK CL'CE'
6

EdgeClk2'
HI
IMeF'

m.09'

A L5166
B
C
0
QH

G

r-1L

i7

10.11 '

CK CL' CE'
6

10.12'

51
5L
719

"~12
5240
17Ws"

Idala.09

[J]3]

Idala.10

[ill]

Idata.11

[illJ

Idata.12

[ill]

5240

1

GNO

15~5
5240

Id$lt$l.13

IJ]ID

HI

13~7

Idala.14

!J]1]

11

I

1

late: Load: if Input Reg. with address ) 4
Shift: if Input Reg. with address < 4

[J]ID

5240

H

719

IDATA INTE

4Ws '6
6Ws '4

Idata.OB

5240

10.10'

E
F

'6
2Ws
S240

5240

Testait

11911

I .1

153

Register 0

6

ClkSlarl'

Register 1

B

ClkIAR'

Registers 3, 10-13

11

WrileHorConl'

Register 2

6

WrileOddBuf'

Registers 10-13

B

WrileEvenBuf'

Registers 10-13

3

ClkCurOCR'

Register 4

RamClk1

LdCurOCR
Ed eClk2

2

LdCur1 CR

Register 5

WrtCurO

9

RamClk 1

10

B

CurOWE'

Register 6

11

Cur1 WE'

Register 7

Diagnostic Re,g.
Trl-State
Terminal Oia~ic

OutD.OO
Q.utD.01
OutD.02
OutO.03
Ou1D.04
OutO.05
OulD.OG
Ou tD.Ol

S374
3
DO
00
4
01
01
7
02
02
8
03
03
13
04
04
1405
17 05
06
06
18
07
07
h1S
CK OC'

11
ClkCR'
SendConlrol

I

1 f

Decode; Diagnostic & E/O line

2
5
6

9
12
15
16
19

ON23.0
N23.1
N30.0
N30.1
N01.0
ON01.1
ON12.0
ON12.1

f88
g~
Tl0 a 0

T10
T20
T2D
T30
T30

a
a
a
a
a

1

0
1
0
1

Starting Addr. Reg.
374
"=,,,,"~~-"":~OO

aOt-=--:::-:~=-=::-:~~

01

a 1 ~...;...;;;~~~:;..:;:

·~~~-~-lD2

a2~--~~~~

.~~~---";-l

03

a3H-:_-;~~i!-

~~r..r-";"';-104

~~~-""':;:"'l

a4I-:i-i;o--;~~~

·~~~-~-lD5

a5~~~~~~

·~~~-~-l06

a61~~~~~~

07

11

CK

ClkStart'

11

6

S175

a~"""""''';';'';';''';';';''~~

e4b

a'

NClk'

a 7 ~::.---=::..:.:::..~~

B

4

~~-~D

ConlrolPhase

~C'

1

eND

HI1

Active Addr. Reg.

Inactive Addr. Reg.
HI"I

co H 5

S163

6

HO I-I! 1
H1
H2
14
H3

~BO

itiT7
Slart.O-~ B1
Slarl.1

~~

B2
B3

3

IAR. o
IAR.1

7 EP h17

-lQ

,-,T
CL'CK LO'

HI1 1

2t 91

IARC2

Start.2

6

SlarlA
~Iart.~

4

Slart.~

S163
BO
01
B2
B3

5

3

HI'!

co

HO
Hi
H2
H3

c.i]
11
12
13
14

IAR.2
IAR.3
lARA
IAR,5

Star\.4

6

GND

4

GNO

3

~tart.~

~

HI1

7 EP i17

1

L..!2.. ET

S163
BO
81
82
83

CO
110
Hi
112
113

AAR.6
AAn:?

7 EP 116

T

CL'CK LD'
HI1

1 12191

ClkIAR'

~

B

0

forCOIARLoad,dYs,

Switch'

9

10

c16 c

'on

B

IARLd'

12

ForceAARLoadl'3, 0

SOB

AAR.7

Address Reg,

AAR.7/a

Hor. Control RAM
·~~~--------~AO

~~:--------~ A 1
~~~--------~A2

~~~------~~A3
~~:-------~~A4

SetCPhase

~~~--------~A5
~~r---------~A6
~~~--------~A7

9
utD.13
utD.14
utD.15

HS'

0
01

00 10
01 12
02 14
16

11
13
15

02

Wrltel-lorCont'

7

H

10

Switch

15

Ml

3~4
S04

Switch'

Co.nt rolPIlClse
N .Ik'

~~--.....I
~.. ~

NClk'

ExtraNibTime
12

HS'

h

.j....;.:-----~

0

S175

0

!-;.;;;p..;p;;:.:.:~.;;:.;.:.~;.,...-

e4d 0' ~..:...:::::.:::.:.::.:::..::::.:::.:.:.~:.-..

_ _-==D:..:.li'-II:.:I~,,*r8'

Cont rolPhase
13
S175
j5
n-;..::;..-'-_..:..:::-t D
0 1-'.:..4.:...,:;B:.:.:1Cl:;:.:n.:.:,k:.,.:T.-;:e.:.;rm.:..:.:.:.in:.,:;:Cl:.:,..'
e4e 0'

Control Register
OutD.09 3
utD.10 4
utO.11
6
utO.12 11
u10.13 13
utO.
4

ClkCR'
nst'

El17

DO

00
01 01
D2 02
03 03
D4 04
D5 05
CK Cl'
9

2
5
7
10
12

10

Synchronized CR
e16

PBckGndO
PBckGnd1
PPBlank
PPVS
PreOField
AllowWU

DO
01
02

00
01
02
03
04
05

S174
Switch'
Rst'

EvenLine 4
9

EvenLine

8

OddLine

S74

Horizo. Cant; VS; Blank Cant.

Input Shift Mux
forBuffer 0
OutO.OO
QUID.12
Q.u 1O.0n

~JID.04

OutO.01
QuID.13
QuID.09
OuID.05

6
5
4
3
10
11
12
13
2

..-1.i..

XO
X1
X2
X3

OX

6
5
4

OutO.03
OuID.15
OLIID.11
OuID.07

10
11
12
13

Oaddr.6
Oaclcir.7

3

BufOBQ

S153
YO
Y1
Y2
Y3

OY

9

BufOB1

6

OuID.13
Ou1D.01
OuID.05
OuID.09

10
11
12
13

t::

4

3

h14
S2
S'I
EX'
EY'

GNd I
OuID.02
OuID.14
QuID.10
QuID.06

7

for Buffe r 2
OutD.12
OuID.OO
OulD.04
OuID.Oe

r::rl:
...........

15

ox

7

BufOB2

S153
YO
Y1
Y2
Y3

2.
S2
14
S1

OY

GNd I

9

BufOB3

h13

EX'

ulD.14
LIID.02
utO.OB
utO.10
Ou1D.15
Ou1D.03
OulD.O?
OutD.11

10
11
12
13

Oaddr.6'
Oaddr.7

2.

14

EY'
15


4

ON12.0

7

ON12.1

9

..QN12.2

12

ON12.3

1 1151

<3030 (3 »
5257
2
00
3 DO
5 130
D1
6
01
131
'1 D2
10
02
132
14
13 03
03
133
h4
5B
E'

9 B3 .O
080.0
~)r33.1

0130.1
OB3.2
- 0130.2

I5rJ3.3

.

0130.3

4

ON3Q,Q

7

ON30.1

9

ON30.2

12

ON30.3

1 /15

AAR.7

~~AR.7

11

10 AAR.7'

5endControi

.

.

TOVO
CO DO
25S09
DO
2
00
BO
01
01
B1
02
82
03
83

!jS

TOV1

YS

S374
3 DO
00
01
01
7 02
02
8
D3
03
13 D4
04
14 05
05
17 D6
06
0
D7 b3 07
CK OC'
1
NClk'1
4

GNO
TOV3

N

COD3

HS

BckGndO

3

SendControl

2

3 25S09
4 00
00
6- BO
5- 01
01
' 11 - B1
02
12
B2
14
03
3_
B3

16
S241

nV1

Y.
nV3
C103
6

SendControl

5

25S09
DO
00
BO
01
01
B1
02
02
B2
03
03
B3 93
SB CK

H

V

d5b

11

K

~
SendControl
8 d~
AAR.6

10
S02

O/P Shifter, Cursor Mixer
Background

4
S02

2

T20

7

T201

10

T2D2

15

T203

25S09
DO
2
00
BO
01
7
01
B1
02
10
02
B2
D3
B3

tiS

~'S

BckGnd1

T3DO
T301
T3D2

TODO
TOD1
TOD2
TOD3
noo
T1 01
T102
3

COAddr.O
:;OAdgr.i
";OAddr.2
.... OAddr.3
.... OAddr.4
.... OAddr.5
",OAddr.6

4

3 AO F93422

Ai
2
A2
1
A3
21
A4
5 A5
6 A6
7
A7

~OAddr.7

OutD.12
Oll \[). 1 J
OutD.14
OutD.15

GND6

cae

b10

9

10
DO
00
12
D1
01
13
14
D2
02
15
16
D3
03
CE1 'CE2WE'OE'
11

14

DisableCM

S241

HI

ro

19~7

18

S374
.2
DO
00
5
01
01
02
02 ~f9
03
03
D4
04
15
~....J4- D5
05
16
06
06
1f\.~g
07 b907
3
4
7
8
13

rt2

-+f-

CurOWE'

CK
NClk'
(iND

11/

I

2~

III

~'6

~

6

c;:

5

S241

d15c

6

J

I

OX

OY

CODO

9

COD1

10
11
12
13
COBilPos.O
( O£3itPos.1

OX

7

COD2

9

COD3

X2
X3
YO
Y1
Y2

OY

Y3 S253
2
S2 b7
14
S1
EX'
EY'
GND 1 /

15/

S04

t-;.:;-------:r-i-la a 1 2 a 5
S260

Cursor Chan

7

15/

XO

5 X1

4
3

8 d10 ."... 12

lS240
d10i
EN'
1

YO
Yi
Y2

GND 1

~'4

S10

XO
Xi
X2
X3

Y3 S253
2
S2 87
14
S1
EX'
EY'

S240

C OEnbl
2
,0Shift
13
D isableC urs'
1

;)

10
11
12
13

OC'
1

6
5
4

COSh i II

C1 Addr.O
1,..1 Adclr.1
.1 Addr.2
1,..1 Addr.3
u1Addr.4
,-,1 A(ldr.5
u 1 Addr.6
,1Acldr.7
Ou10.12
..Q.u to.13
OutO.14
OutD.15

4
3 AO F93422
A1
2
c1Q
1 A2
21 A3
A4
5 A5
6
A6
7
A7
10

9

00
11 DO
01
13 01
02
15 02
03
03
CE1 'CE2WE'OE'

OisableCM
1111

19 ~ 7rO

12

14
16

5374
2
3
00
_4 DO
. 15 .
01
01
7
02
02 ~IB
03
03 9
13 04
04
~ 05
05 15
16
--U06
06
1q.
07 c9 07 .~9
CK ~C'
NClk' fa 11
1
GND

-tr

...

~8

Cur1 WE'

I

HI1

17

I

5240

~.

1'1~
9
-~
5241

11

C1BiIP06.0
C1BiIPQo.1

1

d15e
~J
504

00

~~~~----~02

02~----~

CK ~C'
11
1

HI

1-11

Oi

ClkCur1

3 5374
00
4 DO
01
01
7
02
02
8
03
03
13 04
04
14
05
05
17
06
06
1
07 C13 07
CK OC'
1

C

OisableCurs'

Cursor Chan

C1D1

OX 7

C1D2

9

C10J

OY

5253
2
52 d7
14
51
EX' EY'
15 1
GND 1

01~--~

~~~~--~~D3
03~~----~
~----~~04
04~~------~
~----~rl05
05~~------~
~~~~--~~06
06~~------------------~
~--~------~D7d1307~~------------------~

~15

9

OY

2

~----~HDO
~~~~----~D1

OutD.OB
utO.09
u1O.10
lltO.11
u to. 12
utO.13
OutO.14

C100

J

10

S374

XO
X1
X2
X3

YO
11
12 Y1
Y2
13
Y3

I

S
240
d10j
EN'

YO
Y1
Y2
Y3

OX 7

10

10 ~ 9

11

10
11
12
13

6
5
4
3

~7

~

XO
X1
X2
X3

5253
2 52 c7
14
51
EX' EY'
GND 1 / 15/

3

d10

6
5
4
3

C1 Shill

TOOO

4

NTOOalaOI

~

TOOalaOI

40
40

MC124

T001

T002

T003

7

10

11

3

NTOOala11

~

TOOala11

12

NTOOala21

15

TOOala21

13

NTOOala31

~4

TOOala31

x
9~VCC
40
40
404
403
40
401

BlankTerminal

OroeCIOCkB
~end~!i!nl r!i!1

T101

13

7

12
T102

T103

10

11

3

NT10ala11

~

T10ala11

12

NT1 Oala21

'i5

T1 Oala21

13

NT1 Oala31

~4

T1 Oala31

60
60
604
60
60
601

T200

7

T20'1

T202

T203

10

11

3

NT20ala11

@§>

~

T20ala11

(§>

12

NT20ala21

@9

<;5

T20ala21

@])

13

NT20ala31

Cl,4

T20ala31

45

@D
T300

5

4

NT30alaOI

6

12

T30alaOI

MC124

x
9~VCC
T301

7

<@
@[§)

T302

10

T303

11

@9
@@
([@
@D

See page 17 for terminators
Device Data

Int,or1'~,..o

65
65

6

NClk' /a

500

3

NClk'

500
4

ClkA

a

ClkB'

2

NTOClkAI
TOClkAI

410
40

MC124

)(

9.1

HI1
7
ClkCR
13
1

OulD.OB

r~...

.W

~A~II~O~W~W~U~~1~09~['~b

~PCIT

ClkB

e2b

_.~

~~--~~
13

~--4----------11

Oscl

B

~ 12

ResetNCt r'

HI1

Oserr

"o-.::...._~N:..:T~O;..;:C;..;..:Ik:..;,;B;;;,;I_--<. 46

5241

SendControl'

12

NClk' /a

11

HI1

6

CurXCI~

#%cI
0

:
:
:

613

463

663

NT1 DataOutl

61:> 5
T1 DalaOutl
NT2DaiaOuti

7

1Ot>
14t>
c

T2DataOutl
NT3DataOuti

11

c

T3DaiaOuil

Terminal Clocks & Messages

15

T1MSg'

# %11 b

12

T2Msg'

#%11c

13

T3Msg'

#%f1d

12

NT2ClkBI

r, 5

T2ClkBI

13

NT3ClkBI

~4

T3ClkBI

(ill)
411
66
661

GND

(iTh)

GND

([1]>

GND

@31

QND

~

Oscillator & ID
FPLAT
P1
P20
P2
P19
TUP
P3
P18
.~
~ P4
P17
(H I) ~ P5
P16
10.08'
P15
ID.OO' 7 P6
P14
10."10' 0 P7
10.12' 0 PB 81 P13
P9
P12
Q!:i!L.lQ. P10 P11

..

Note: 14-Pin crystal should be install
in this 20-pin platform as follows

20VCC
,.~ 9

8

7
i-t 6
,.. 5
,..4
3
12
11

vee
1D.11 '
TGNO

~al

WT

Pin 1: N. C.
7: GND
8: Output
14: +V dc

P4
Pl0
Pl1
P17

ID Modifier must have even number of

~

Osef

Note: These platforms are shown as 20 pin units. They are actually 16 pin r·
with pin 8 of the network inserted into pin 9 of the 20-pin pattern.
They are shown as 20 pins so that ROUTE will not try to cut any traces on the
Terminal 0

220 ohm
}

TOOalaOI
NTQDataOI
TODala11
~TO[)()la11
TODala2!
~TOD\)ta21
TODala31
NTODdta31
GNO

Te

:3
..,

5
G

7
0
9
10

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P1
P20
P19
P2
P1B
P3
P17
P4
P16
P5
P15
P6
P7 b1 P14
PB
P13
P9
P12
P10
P11

100 ohm
20VCC
19 VEE

~

f-t!8
f-t!7
1-'6
5

4
13
12

TOClkAI
NTOClkAt
TOClk()!
NTOClkBI

~1

rm i na 1
VEE

Te rm; na 1

CRYSTAL & SPLATs

fL
£f

FPLAT
P1
P20~~--P2
P19
P3
P10
P4
P17
P5
P16

~~~~--~P6

P15~M-~~~~~-

P7 d1
~~;;.,;..;;..;.;...-...;o~ PB
10 pg
~-----.,;;;. P 1 0

P14
P13
P12
P 11

t--:~~~~~~-

Tr ansmit

2f
1M eF'

~eF

TO Ms.:)

TTMsg
T2 Ms_g'
T3 Msg'
GND

Test Clips:

Filter Caps for ECl chips:

~

These caRaci"~ors mount between ~"inS 2 and
19 of a 20 pln pattern due to t le offset pr

3
4
5
6
7
0
9
'10

20vee
FPLAT
P20
P1
19
P2 B P19
10
P1B
P3
17
P17
P4
16
P16 10
P5
P15
P6
14
P7 bH~14
13
PB
13 12
P12
P9
P11 f.J1
P10

Wake1
Wake2
Wake3
Wake4
SendControl
( onlrolPhase
WrileHorConl'
Wake Request

t::~~J

GND

'IV::~;J '

GND

t:~;J '

aND

}

~lilch

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3
4
5

CiiI~'
CliI:: 5:: I[$~~:~ :5:: II:~~~~ :5::
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I : : : : : : : : : : :: :::::::::::: :::::::::::: 1

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(~~~>:::: 5::
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:::::::::::: ::::::::::::

:;:: 1(~??:4::: :;I~it~::::; ($~?:4: :;::

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:::::::::: :::::::::: 1):~~~:(5~::: I~::: 111 [~~~:~ :5:: I[~~~>: :5:: 11~1:~?: :5:: 11:~j~>: :5::
........................ '[t~~!::5.. ·I~.... ·112 ~" .. ·1~· .... 11~:~~~:5.... ·
I; ~:~~~:~:~ I~Hr:s:: 1I~1:~?: :5:: I[~~~>: :5:: l(s>:H: :5:: 113 [~?:7:4:::: 5(~?!:4::::5 [~?!:4::::; r$??:~:: :5
mn:::I[~~~:~:5::I[$)~3::5::II~H?::5::II~>:H::;::114lES::: :::::::::: :::::::::: ::::::::::
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[$j~:~ :;:: 11~1:~r:;:: 11:~~~:~~5:: II~H~: :5:: I(~j?:~ :5:: 117 [$j:7:~ :5:: Imn::: II?:~~?~:;:: 18:::
CillD I:~? ?:~ :::5[~~~: ::5: :1m!]: ::Imn: ::118 lE:5::: Imn: ::II~~?:~ 1: s: :H:m::s: ::
[~~~:q:::5 [~~~~:: :51:~~~:~:::5 0?30 (~?!:4::: :5119 ($~~~:::5 [~~~:1::::5 ($~!:~ :5:: HE:::
(~j~:i

: : : : : : :~ : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : :: : : : : : ;

20pins: A

16pins: B

14pins: C

S c::::1:

t::lli1iQ

: : : : : : : : : : : : : : : : : : : : : : : : :: : : : : : : : : : : : : : : : : : : : : : : : :::1===

22pins: D

I

F93422

24 pins: E

5

~

Note: The short vertical lines indIcate
filter capacitor locations.

(103

Tota!)

Broken vertical lines

16 pins REVERSED: F

indicate VEE filler caps
for ECl chips. These are mounted
from pin 2 0 pin 19 of Ihe 20 pin
pattern.

1YPical::J ECl chips

(7 total)

UTVFC Module Layout

File

UTVFCLayouLsil

Desi1]ner
J. F. Cameron

101 - 200
1-100

Platform e1 (oscillator):

-

TUP1

Note: The oscillator is mounted on the platform as follows:

1K

•

vee

--1K

(HI)

Platform
Pin number
il

•
•

ID.08 •
ID.09

•

ID.10

•

ID.l1'

ID.12

~

TGND
Oscf

GND

Oscillator
Pin number

100

•

7

8

8

9

14

15

Oscillator 15 Motorola K 11 OOA series

Note: 10.08' -10.12' are wired to HI (pin 3) or Gnd (pin 8) depending on the oscillator
frequency as follows:
Oscillator f:
10.08' (pin 4)

50mhz
Hi

20mhz
Hi

10.09' (pin 5)

Hi

Hi

10.10' (pin 6)

Hi

Gnd

10.11' (pi n 11)

Gnd

Hi

10.12' (Rin 7)

Gnd

Gnd

Platforms b1 J c1 J g1, h1
Xerox PIN 703W11691 (15 resistors) is acceptable
All resistors 220 ohm, 114 w.

Platform d1:
Xerox PIN 703W00891 (8 resistors) is acceptable substitute
All resistors 1000hm 114 or 118 walt, 10%
•

•
•

rxE~ox
L..!:OD

UTVFC Platforms

L.-I

•
•
•

File

UTVFCPlatforms.sil

Desi1]ner
C. TSENG

Date

7/18/80

Interface to DO cllip tester
.G.T.T~rp.

125

Data
8

G

-- Go bit (if on, start clocks following this instT.)

TT

-- Type of Instr:

o-- Other (Pgrp is further decoded, see below)

J -- Load Data into "Enable" reg. for indicated Pgrp
'2 -- Load Dat.a into "Data A" reg. for indicated Pgrp
] -- Load Data into "Data 13" reg. for indicated Pgrp

Pgrp

-- Pin Group. Selects (except in "Other" type instrs) the group
of g pins affected by the instruction.

Other group:
Pgrp:

CC

.X.X.l,C.C.

-- Clock parameter select:
o-- None (nap)
1 -- Load Data into clock Parameter Reg. 1
? -- Loae! Dat3 into clock Parameter Reg. 2
J -- Load Data into clock ParameLer Reg. 3

-- Load Data into Input Group Select Counter

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