D99 3705E 09_Nov1982 09 Nov1982

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D99-3705E-09
D99-3705E-08

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'flU. :.

IBM MAINTENANCE DIAGNOSTIC PROGRAM
IBM 3705 COMMUNICATIONS CONTROLLER

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INTERNAL FUNCTIONAL TEST SYSTEM INDEXES

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DATE: 11/11/82

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IBM/TECHNICAL NEWSLETTER

IBM MAINTENENCE DIAGNOSTIC PROGRAM
IBM 3705 COMMUNICATIONS CONTROLLER
INTERNAL FUNCTIONAL TEST SYMPTOM INDEXES

This TECHNICAL NEWSLETTER p~ov:des complete ~eplacement fo~ IBM 3705
Commumications Cont~olle~ Int~~nal Functional Test Symptom Indexes,
DOC. NO. DCL-3705E-08, p~eviously ~eleased with OLT DIAGNOSTIC
RELEASE 12.4.
RELEASE 13.0.
This change:
Co~~ects the ~unning
2 of D99-3705E.
desc~iption fo~

Adds

~outine

(Rtn 55), ;n

Adds comments
Adds second

o

D99-3705E-09

fo~

ca~d

foote~

titles

a

CHAPTERS 1 and

new Type 4 Channel
Chapte~ 8.

Rtn X7A8

fo~

manual

Adapte~

;nte~vention

call (A3D2) to Rtn X607,

Remove
D99

fo~

e~~o~

stops.

stop OX01.

Add
DCL-3705E-(all levels)

D99-3705E-09

COVER PAGE

COVER PAGE

PAGES (ALL)

PAGES
PAGES
PAGES
PAGES
PAGES
PAGES
PAGES
PAGES
PAGES
PAGES
PAGES
PAGES

-

i
iv
1.1 - 1.32
2.1
2.10
3.1
3.6
4.1
4.20
5.0.1 - 5.0.152
6.0.1 - 6.0.4
6.1.1 - 6.1.112
6.2.1 - 6.2.14
7.0.1 - 7.0.195
7.1.1 - 7.1.284
8.1 - 8.48

---

IBM, CURRENT MULRIPLEXOR ENGINEERING, DEPT. G32,
P.O. Box 12195, Resea~ch T~;angle Pa~k, No~th Ca~ol;na, 27709

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1l99-37C5E-09

8

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This manual contains the IBM 3705 Communications Ccntroller I~ternal Functional tests symptom indexes.
This manual should be used with its companion manual I~~~~!nten~il~iagnss~i~~ogram ~-11~
£QmmgQi£~~!Q~1~Q!!~~IB1~~~1-!Yn£1i2B~1_I~§!_1Q~g~_~iagnQ§~£2nt~21~dule. Initia1-~tL-~
E~n~1-~ing-I§§iL

1l99-3705D. The compan2on manual provides guidance in using tbe symptom indexes. The
symptom refers to a 'suspected' card or cards fer most error stops; these suspected cards have a high
enough probability of caus2ng the error to be singled out. However, the indicated card may not be tbe
actual cause of tbe error. TOe suspected card serves only as a guide to assist in getting into the
failing area and not as a sure fix for errors.
The material in this Dlanual 'was previously published in IBa lllintenance Diagn.2ll:!;;!&_Proqram...1.1Q2
D99-3105A-05, which bas been

£Q!~i£~!i2n§~~Q!!~~n-1ine Tg§!§_~In1~~!yncti~1-Iests.

replaced by;
IlnL~illlgm!~9BQ§1ic_E~Qgram IM.2122-£2m.!!llni£~ions f2.!ll!;:Q!bL£!!~.M~ruL!nLU~ AU Lines
Q&-Lin~I~§!gL

D99-3705C.

I~~lIainlg~B£e DiagBQ§1i£_f~Q~~~~.21Q2-£Q~~~liQng_£ontrQ!~!g~nctiopal
Q!~q~§1i£-fontr~ggYl~_In!1i~I§§l~~_f~n~l_b!B~~lL D99-3105D.

Te§t L~

I~~~illl~~B£lLlliqnQ§1k~~~!l!L~~lli2-£QmmYBlliliQ!lLf~!lll.!!L1nternal FnnctioM.!-Ig,§Uymptoli
!~g~§L

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1l99-3705E.

The symptom indexes are arranged in 1FT number order throughout tbis manual.
companion lIanuals that should be referred to are:

Chapters 7.0 tbrough 7.9 have beeu cbanged to include additional cards in the 'Suspected Card' column.
Error stop OX70 has been added to routine 1118 in chapter 7.0.
Chapter 5.2 bas been changed to iuclude a manual intervention wrap routine 16F2. This routine provides
line se:: wrapping and modell wrapping with or without a wrap block.
(!lodem wrap cannot be done without
a wrap block.)

~c=

Miscellaneous corrections have been made throughout this aanual.

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This version of the manual was released as a DCL.
type 4 chanuel adapters (4).

Chapter 8 was changed to include support for multiple

Chapter 1 vas changed to include support for RPQ 858911.

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Chapcer 3 was changed to incorporate changes to routinE 2.
o~

Chapter 6 was changed to incorporate error stops for several routines that were inadvertently left out
the manua:. Support for line sets lT and lU is included iu this version.

Chapter 7 was changed to incorporate error stops for EPQs HH4100 and 858912.
and 1U is included in this version.

Support for line sets lT

Ttis edition incorporates DCL-370SE-04 and inclUdes changes cO support .odels J,K,L of the 3705.
Support. for several BPQ' 5 has been added ..

A

ne~

erro= stop

Support

fo~

ha~beeu

added to Chapter 4.

line sets 1w and 1z is

~ncluded

in th1S versioL.

i

1370SEAA - JCA

'iii.

;'1

•

Chapters 6 and .., have been changed to incorporate changes for the Type 3 High Speed Co.aunication Scanner
and the 1.21 World Trade Line Interfaces. The 1.21 support includes 2 nev manual interven~ion routines
IfPII and 17B"I.

Chapter 7 has been changed to include symptom indexes for nev aanual intervention rou~ines I7P1 - I7P3
CICW Tests) and routines 17P4 - I7P6 (PDP Array Tests). In addition, section 7.1 has been changed fro.
level 05 to level 06 vhich is the correct level.
Chapter 8 has been changed to include symptoa indexes for Dev Type ~ Channel Adapter .anual
interveution routines 1958 - 195C vhich enhance the diagnostic ability to isolate interaittent EB~
failures. Routine 1938 symptoa index vas changed and routiue %939 symptom index vas added to reflect
changes in the EB" IPT's.

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"anual Intervention routine I6P6 added for RPQ S30254 on Type 2 scanner.
Com.ents added to Type 3 scanner IPT rontine AB.
Com.ents reworded in Type II Charnel adapter IPT routines IIC and liE.

'"

Reutine 55 added to provide an inbound data address test to an odd address in Type 4 channel adapter
tests.
Added card call for 'A3D2' 1n Type 2 Scanner Boutine 7 (%607), ERBOR CODE 0101.
CEAPTERS 1 and 2 of D99-3705E had footer labels in error and are corrected in this release.
Ccmment added for manual intervention stops in type 3 scanuer 1PT routine A8.
Chapter 6.2 updated to correct column header alignment.

)

X3705BAA - JCA

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Central Control Unit.

_ •

1. 1

Stcrage 1FT Symptom lnjex.
Type
Channel Adapter 1FT Symptom Index

:~. 1
3.1

Type 2 or Type 3 Channel Adapter 1FT Symptom Index •

4.1

Type

:ommunication Scanner 1FT
Symptom Index Part 1
aanual lnterven~ion Stop Codes.

• 5.0.1
• 5.1.1

Type 2 Communications Scanner 1FT
Symptom Index Notes • • • • •
S ympt om Index Part 1. . . • •
Symptom Index Common Subroutine and Level 1, 2, 3
StOP Codes. • • • • • • • • •
~anual Intervention Stop Codes And Examples • •
Type 3 Communication Scanner !?T
Symptom Index Part 1 • •
S ym pt om In dex Par"t- 2. •
Symptom Index common snbroutine and Level 1, 2, 3,
Stop Codes
••••••
Manual Intervention S~op Codes.

Type 4 Channel Adapter 1FT Symp'om Index

• 6.0.1
6.1_ 1

• 6.2.1
6.2.3
.7.0.1
• 7.1.1
7.1.275
7.1.277
8.1

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X3705BAA -

In

D99-370SE-09

.)

B10SBAA - JCA

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I~~ ~~05 ~O"""IICATIORS COITBOLLER
CENTRAL COHTROL Ulli 1FT STftPlOft INDEX

D99-~7,)C!,

:-,

CHAPTER 1.0: CEITRAL COITROL OIIT 1FT STftPTOft IIDEX

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BCUT. ERROB
CODE

TESTED

~UICTION

EREOR DESCRIPTION

SUSFE~~D C~E~

LOCATION Is)

PROu
eASK

PE1LD

PEr~~

PAGE

PAGE

CP007
CC007

6-:190

CO"ft~N1S

1102 If an error occurs in this routine, check bit 0.5 in
Beg. x' ~9'.
If:
la) the 900 nanosecond ccn osc~lator is installed and
bit 0.5 if off or,
Ib) the 1.0 microsecond ccu oscillator is installed and
bit 0.5 is on,
then hardware bit 0.5 is in error. correct this fault and
rerun ~be tes~. o~bervise. con~inQe as specified in the

error s"t.ops.
010'

Tbe interval tiaer level 3
Tbe Timer L3 irpt occurred in
~nterrupt should occur every
less tban 97 ms.
laO millseconds. This routine
~est for an accuracy of plus

or .inns

1-B3L2
A-B3"15

OOFF

~ndicates

percent of

error.

~hree percen~.

If Reg~.E.'ter
X'15' equals
1'0004', tbe
e=ror l.S fou:::
percen't vb:' ct.
means the 'time::irp_ occur;:e'l

Did L3 'timer
!rpt occur prior
";.0

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9'7

Reg X'lS'

liS.

a~

OX02

L3 ~i.er irpt occur a!ter
103 liS.

~id

The tioer L3 irot occurred
la~er than 103115.

1-B31.:;:
A-B305

OO!?!

CP007
CCOO"

6-090

9b

115.

Reg. X'15'
cODt:.ains pe::

cent of errc=.
1'0004' inc1ca~eE
Ii percen't er~c=.
tbe interrupt ~~
curred a~ 10411s.

A ~imer L3 irpt did r.Ot
occur witbin 110 liS.

A-B3L2
A-B31J5

IVA

CP007
ccOO"

6-090

Standard DC~
display doe,
not apply.

ftemory size test.
:::npu't 1'70' ~s
':"s comva red vi ':.b -:.hE;

Input 1'70' and CDS
BS!! CO:lnt did no~
cOllpare

A-BlIl!:2
If CDS coun~
is co=rec~

I/A

Cft002

11-070
6-770

Reg X'14' =
CDS BSII Count
Feg X'1S' =
Inpt:t X'70'
converted ~n'":o
BS!! COUI!':
Reg X'le' =
Inpu~ I' '0'

0101

Z bus par~'ty cbecke~
Byte X, 0, and 1 bit 7
are cOllplellented to forced
bad parity.
~he CCU check register is
tested for expected data.
30utine makes 256 aasses
starting witb data" 00000
using an update value of
X'10101'

The actual CCO cbeck regis~er
da~a is in error.
Tbe Z bus parity cbecked
failed to detect bad parity.
CCO CUK Beg is input X'7D'

See lIote 5
1-B3112
"
A-B3G2

FFFP

eK003
CQOOS

6-050

See note 1

OX02

~id ~he force err~~ function
produce the correct data

Tbe actual data produced hy the A-B3S2
A-B3G2
force error functi.on did not
compare with the expected.

FFFFF CKOOI
CQ005

6-050

Z bus parity checker
BY'te I, 0, and 1 bit 6
are complemented to force
bad parity.
~be CCU check registe= ~s
tested for expected da~a.
Routine makes 256 passes
starting with data 00000
using an update value of
X'10101'

Tbe ac~ual CCO cbeck regiSter
data is in error

FFFF

CK003
CQ005

6-050

,id the force err3r function
produce ~be correct data.

Tbe ac~ual data produced by the A-83S2
force error func~ion did no"
A-B3G2
cOllpare witb the expected.

I'FFP! CKOOl
CQOOS

6-050

OX03

Defaul~

!f an

'test -

in~er~up~

~~es

no~

occur witb~n il0 ms
~his rout1oe vill hal~.

1'03

0101

'BS~ COUD~' con~ained
!n the Confi9ura~ioL Da~a
Se, to verify tDat tDe tvo agree.

'10~

1105 0101

0102

C::U IP':

See 1Io~e 5
A-B3112
A-B3G2

See note 1

X3705BH 1.1

J'
3705 CO!!!'IONIC1.TI :J!f5 ::OliTF::LLEll
CEBTllA1. CORT 90L IIIIIT ::1':- SYlll':rO~ IBDE!
!Z~

ERROR. !'O"CTIOII TESTED
::00:;
1106 OX01 :; bas !Jari~l' checke::
Byte X, 0, and 1, b; - 5 a=e
c;ompleaent.ed ~o f:::>rce. bad

P:)U': ..

L:q",- -1

ERROR DESCRIP'::IOII
Tbe actual CCO cbeck register
dat:" is in error.

parity.
'::he CCO cbeck regis~e= ~s
tested for e:rpecte:! data.
Rouu.ne aakes 256 passes
star'ting wit.h data 0000(\
using an update value of
X'10101'
OX02

1107 OXOl

SOSPECTED CAPt.
LOCA'l'IOIi (s)
See 1I0te 5
,1.-113112
A-B3G2

PROr; r!. . A!.t1
IIASK PAr;~
I'I'l'l'F CI'003
CQOO':

F£'H~!i

6-050

S.. ",

n01f-

"
j

'"
p

!be actual data produced by
tbe force error fur.ction did
no~ coapare with tbe expect:ei!.

A-B3S2
A-B3G2

I'I'1'FI' CKOOl-2
CQ005

cbecker
By~e I. 0, and 1, b"- 11 are
co.ple.ent.ed "to force bad
parit:y.
~he CCO check register is
"'ested for expect:ed da-::a.
30utine aakes 256 passes
starting witb dat:a 00000
using an update value of

Tbe aC'tual CCO check reg':'ster
dat:a is in error.

See Rote 5
A-B3112
A-1I3G2

FFFI'

Tbe actual dat:a produceel. by

1-B3S2
l-B3G2

FI'1'FF CK001
CQ005

6-0SJ

CK003
COO 05

6-050

pari~y

)

rOHP1En~r;

Pl.:;::

!lid He force error
:!'lnction produce tbe correc"t
dat:a.
Z hus

-::If" f·· , ...

.r
CI'003-7
CQ005

SeE<

no~e

1

See

IJO+f;!

1

'r'lOl!)"

0102

11!}f

'Jid tbe force e=re= funct:!'o"
produce ":he correc'!: da-:a.

:: bus par::'t:y checlter

The actual CCO check register
da-::a is ir. error.

see lIot:e
A-B3N2
A-B3G2

0102

!lid -:b~ force er=or fnnctioI:
produce 'the correc't. da"':a.

Tbe actual data proel.uceel. by
the force error fur.~t~on did
no,:: compare vi ferce bad

The actual CCO check regis":er
da-:=a is in error ..

See Iio"'e 5
A-B3112
A-B3G2

1'1'1'1'

6-050

See note 1

Xhe actual data produced by
the force error £unc'tion did
no~ compare with 'the e:rpe~ed.

A-B3S2
l-B3G2

FFFFF CKOO'
CODaS

See note

\lX(J1

BytE< 0 and 1 bi": 3 8::8
complemented -::0 f::>=ce bad
parity.
::'he cell cbec~ reqis-:.e= 1S
,,:es~ed for expec-::eel. da-::a.
'3ou'tine makes 256 passes
starting "i~h da,:a 00000
using an updat:e value of
X'1!)101'

llJ~

":he force error fur.ct~on el."
no'": compare with 'the expec~ea.

~

1'FFF

CK003
COO05

par~ty.

'::he CCO checlt

regis~er

is

'testea for e:rpe=ed da",a.
~outine .akes 256 passes
starting witb data 00000
using an update value of
X'10101'

OX02

110A

Did the force error function
produce tbe correc~ dat:a.
bus pari'!:y cbecke=
Byte 0 and 1 bot.
... - 1 are
cOllpleaente:! "':0 f:>::-ce bad
parity.

0101

The CCO cheCK reg:l.s-:..e= 1S
tested fol. expec-:=e3 da"'a.
~outine aakes 256 passes
starting with data 00000
using at: upda'l:e value of
X'10101'

Tbe actual CCO check =eqister
da-::a is i1: erroz.

See No~e 5
l-B3112
l-B3G2

FFFF

CK003
CODaS

6-050

0:[02

Did the force e:::-ror func'tl.oL.
produce the co==ec~ da"::a.

The actual data produceel. by
t:be force error fUDc"tion did
no'": compare with -::he expec";e~.

l-B352
l-J3G2

1'FFFF CKOO'
COOO5

6-05('

1 ":I:

:: bus pari".:y
'3vte

(.

,

checI;e::(j e=e

an1 1 ti";

comple.en~ed ~o !o=-=e haC.
p~=l.~y.

1.2 1:3 7058A1<

CCU 1FT

'\

-

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If~

3705

C~RTrAL

CO~~URICATION5

CONTBOL DRIT 1FT

BOOT. ERROR FUNCTION TESTED
CODE
OXOl ~he CCO check register is
tested for expected data.
30utine makes 256 passes
starting with data 00000
using an update value of
X'10101'
OX02

Did the force error function
produce the correc. data.

ERRor DESCRIPTION
The actual CCO check register
data is in error.

The actual data produced by
the force error function did
not compare with the expected.

SOSPECTED CARD
LOCATION(s)
see Rate 5
A-B3N2
A-B3G2

PROG
"ASK
FFFF

FEUD
PAGE
CK003
CQOOS

FETII"

A-B352
A-B3G2

FFFFF CKOOl
COOOS

6-050

COIIIlENTS

P~,GE

6-050

SEe note

OXOl

~he CCO register is tested
!or the expected data.
Routine makes 256 passes
starting with data 00000
using an update value of
X'10101'

The 'A' register parity Checker See Rate 5
failed to detect bad parity.
A-B3R2
A-B3G2

FFF!'

CKOO]
COOOS

6-920

OX02

Did the force error function
produce the correct data.

The actual data produced by
the force error function did
not compare with the expec~ed.

A-B352
A-B 3G2

3FFFF CKOO'
CQOOS

6-920

See Bote 5
A-B3!r2
A-B3G2

FFFF

CK003
CQOOS

6-920

A-B352
A-B3G2

FFFP!' CKOO'
CQOOS

6-920

FFF?

CKOOl
CUO'3
CU013

6-920

Register X'1t'
will COD't.al.Il
the test data
-:.hat was used
~o outpu~ to
Reg X 'a'.

FFFF

CK001
C0013

6-920

Reg1ster X'16'
will con"a1I,
't.he test data
t.hat was ir.
Reg X" A' when
-:.he input from

o
'10D OXO,

'B'

reg1s~er

parity checker
The 'B' register parity
X'76' with mask X'0040' checker failed to detect bad
~s used to force bad pari~y.
parity.
~he CCO check register is testee
~or the exoectea da~a.
Outpu~

OX02

~id

the force error function
produce ~he correct data.

SDR reg1ster

110E

":es'7:.

p~ri~y

The ac~ual data produced by
tbe !orce error function did
no~ compare with the expec~ed.

See note ,

See note 1

checke=

~

Outpu: X'~8', force CCO checks,
with data X'0040' is used in
conjunction vi~h 4 on~put
~Ds~ruc~10n ~o torce SDP errors.

f.U,.,'
o

~he ou~pu~ ~ns~iuc~ion

forces Lhe error is Reg
outpu~ to ~·1A·.
Rout1ne maKes 256 passes
star~ing with data 00000
nsing an update valoe of
X'10'01' •
~ha~

~'151

OXOl

~he CCU Check Regis~er is
~ested for the expec.ed

Tbe actual CCD Check
Register data is in

error bits.

error.

See Note
A-B3N2
A-B3S2

Ihe CCO Check Register is
tested for the expected

The actual CCU Cbeck
Register data is in

A-B3S2
A-B3N2

error bi'ts.

error ..

~ndata pari~y cKecker tes~.
OUtput X'7S'r f~rce ceu
Cbecks, witb data %'0010'
~s used in conjunction
with an iDPU~ ins~ruc~ion
~o force Indata Parity Errors.
Bou~ine makes 256 passes
starting witb data 00000
oS1ng an npdate value of

1101'

e

D99- 370SE-OQ

'A' register parity checker
OUtput X'78' (force CCO
checks) with mask X'0020' is
used to force bad parity.

110C

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CONTROLLER
SY~PTOa IBDEX

~·101011.

0101

X'11' vas

executed.
1'10 OXOl

5AE register par1"y cbecker
"':.es'": ..

c::n I!'T

OU'C pu'": X' 78'

(po=ce

The SAR register parity checker See Note 7
failed to detect bad parity.
A-B3N,2

FFFF

CK003
DP993

,6-920

See Late 1

X3705BA~

'.3

IEM 3705
~ZNTRAL

C0~AUNICATIOHS CONTROL1EP
CONT30L UNIT 1FT SYHPTOa INDEX

ROU:. ERROR FUIICTION TESTED
CODE

ERPOl! DESCRIPTIOII

SUSPEC~ED CARD
LOCATION(s)
A-911G2
A-B4ft2

PROG
IIASK

The actual da~a produced by
the force error funct10n did
no~ compare with the expected.

A-8352
l-B3G2
A-B3ft:<

FFFF

CK001
DP993
DII993

6-920

Level II interrupted by Level 3 The PCI L3 interrupt failed to
via a PCI 13 irpt.
occur.
reg grp 2 (X'7F') is
tested for a PCI L3 bit.

A-B3G2
A-B3112
A-B3J2

PDFB

COO05
CDOOl
CU015
CP002
CA003

6-090
6-860

Prior to forcing the L3 irpt.
the Lq CZ latches are set to
CZ
10 on return to Lq ~he
CZ latches are tested to
ensure tha~ L3 did not alte=
the prese~ LII CZ ltch.

The level 4 CZ latches were
affected by the PCI L3 irp-:.

A-B3G2

0003

CZXXX

6-090

The PCI L3 irpt failed to

l-B3G2
A-B3M2
A-B3J2

FDPB

COO05
CDOOI
CUOl5
CPOO2
Cl003

6-09C
6-860

CCU Checks) with mask X'OOqO'
is used to force bad parity.
The CCU Cbeck Register is
~ested for ~~e
e=ror bits.

OX02

Did the force error functioD
da~a

~rpt

OX02

=

1114 OX01

OX02

FETM~

CoeMFN~S

PAGr

DR993

expec~ed

produce the co=rect
"13 OX01

PEALt
PAGI

Levsl 4 is interrupted by
Level 3 v:'a a PC! L3 ::.::pt.
irpt reg g=p 2 (X' 7F 'J is
tested for a PCI Lq b1t.

occu=

Prior to forcing the L3
irpt. the L4 CZ Itch are se~
CZ = 01, O~ return to L4
the CZ Itch are tested to
ensure that L3 did not alte=
the prese~ L4 CZ Itch.
.

The level 4 CZ Itch we:-e
affected by the PCI L3 irp~.

Level 2 masking and unmasking

The Level 2 mask function
failed to preven~ a L2 irpt.

A-B3!!2

FDPB

CP002
CDOOl
COOOl

6-090
6-9qO

The Level 2 un.ask function

A-B 3112

FDFB

CP002
CD001
COO01

6-090
6-95C

l-B3112

FDFB

CP002

6-860

0003
A-B3G2

(See R7N.

11131

6-090
CZXXX

~o

"15 OX01

functions are

~ested.

Level 2 is mask and theL
an attempt to force a L2
irpt. V1a -41ag L2" function,
is perfo::med.
OX02

1'16

Level 2 is unmasked and a L2
;rpt. ~s forced v~a "diag L2"
_unct10D.

failed

Level II is interrupted by
Level 2 via the "diag L2"
function.
OX01

Irp-: req g::p 2 (X'7F ')
:'s tested for a "1iag L2 n
bit.

The Diag L2 1rpt failed to
occur

OX02

Prior to f~rcing the L2 irp~
the L4 CZ l~ch are se~ ~o
CZ = 10. On return to L4
the CZ Itch are tested to
ensure tba~ the L2 irp~ did
not alter ~he Drese~ L4
CZ ltch.
.

The Level q CZ
10 Itch were
affected by the diag L2 irpt.

A-B3G2

0003

CZXXX

6-090

Level 4 is :interrup~ed by
Level 2 via the "diag L2 n

The Diag L2 irpt failed to
occur.

A-B3G2

FDFB

CP002

6-090 (See P.TR. 1116)

1'17 OX 01

=

!unction.

=

OX02

Prior to forcing the L2 irpt.
the L4 CZ Itcc are set to
C1 = 01. On returr to LII
the CZ ltch are tested to
ensure ~hat the L2 irpt
did no~ alter the preset
L4 CZ ltch.

The Level 4 CZ
01 ltcb were
affected by the diag L2 irpt.

1-B3G2

0003

CZXXX

6-090

111S OX01

Level 4 1S 1nte::rupted by a
~evel 1 irpt V1a a 1/0 check.
T'~ utility Beg (X'79') is
~es~ed to verify tha~ L4

The ut1lity Beg did not contain l-B3112
the 'prog level q interrupted' 1-B3L2
bl. t.
(Level 1 failed to irpt)

001'0

CPOOG

6-830

1. q X3705BAA

Bypass troable
shooting thl.s

e=:o=

un~il

code 0002 ot

error
thl.S

CCO IF'!:
I

;I

o
o
o
o
o
o
o
o
o
o

lEe 3705 CO~~OBICATIONS COB!ROLLES
:!BTP.AL CONTBOL ON IT 1fT SYePTOe INDEX
ROOT. ERROR FUBCTION TESTED
CODE
was interrupted.
OX02

~rpt

ERROR DESCRIPTION

SUSFECTED C;UI'
tOCA TION (sl

PROG

PElLD

PETKft

KAS~

PIGE

PIGE

COI\IIENTS
routJ.ne bas rut.
without erlOor.

reg grp 1 (X'7F') is

for the "in/out

~estea

D9 ~- 37 05E- 09

The in/out chec~ Ll bit did no~ RIA
se~.
A Level 1 irpt did not occur.

FPPP

CU01Q

6-850

The Level 4 CZ = 10 Itcb were
affected by the Ll irpt.

A-B3G2

0003

CZlXl

6-090

.1-B3L2
A-B3G2

001'0

COO,4
CP002

6-803

check t1" bit.
OX03

Prior ~o forcing the Ll
irpt, the t~ Cz l~ch are set
to CZ
10. On return to LA
the CZ Itch are tested to

=

ensure

~hat

the Ll

~rpt

did

not alter the preset L4
CZ Itch.
Level 4 is interrup~ed by
a Level 1 irpt via a I/O
check.

1119

OXOl

The utility Beg (X'79') is
tested to verify if L4 was
interrupted.

Level 1 failed to irpt.

OX02

~rpt

The in/oot check L1 bit did not

reg grp 1 (X'7F') is
tested for the in/out check

(see RTN • 1 118)

6-050

FPFF

5e,"=- ..

Ll bit.

OX03

11H

Prior to forcing the Ll irp"
the L4 CZ Itch are set to
::Z '" 01.

The Level 4 C7 = 01 l~cb were
affected by the Ll irp~.

A-B3G2

0003

CZXXI

6-090

Level 3 is interrupted by
Level 2 via diag L2

(See RTN. 1 113)

~unccior..

lXOl

Since the DCe runs under
Level 4, a L3 irp, is forced
via pcr L3 to allow this
=ou~ine

Pretest error

6-940

to test while in

Level 3.
OXOl

A L2 irp~ is force~ via diag
12. The irpt reg grp 2
(X'7E') is ~ested to verify
that diag L2 bit vas set.

The diag L2 irp~ failed to
occur when running under
Level 3.

OX02

Prior to forcing ,he L2 i=pt,
the L3 CZ Itch are set to
CZ = 10.

The Level 3 CZ
10 l~ch
were affected by the L2
irpt.

111B lXOl

o

6-830

=

0003

6-090

=

OOO:?

6-630

(See BTN

11l~)

Same as IXOl above.

OXOI

Same as OXOl above.

OX02

Prior to forcing the L2
irpt, the L3 CZ Itch are
set to CZ '" 01.

',1C

FDFB

The Level 3 CZ
01 Itch were
affected by the L2 irpt.

(See lITN. 1113)

Level 3 is interrup~ed ty
Level 1 via an in/ont
check Ll.
lXOl

Since the Dce rnns under
Level 4, a L3 irp~ is
forced via PCI L3 to allow
this routine to test while
in Level 3.

Pretest error.

OXOI

The utility Reg (X'79')
is tested to verify tha~

The utility reg did not contain A-B362
t~e prog level 3 interrupted

L3 vas

iD~errupted.

6-940

001'0

C;P004

6-830. Bypass trouble
sbooting this

error

b::.,.

un~il

error

code 0002 of this

routl.ne has run
witbou~

OX02

The tl irpt is forced
via in/out check L1.

The in/out check L1 bit did not
set. A Level 1 irpt dia no~ occor
when =onning under Level 3.

OX03

Prior to forcing the Ll

Tbe Level 3 CZ

C:::O 1FT

= 10

Itch were

PPFI'

6-050

0003

6-090

failure.

(See !!TN 111 B)

X3705BAA 1.5

IEP. 3705
C;H~RAL

CO!~OHICATIONS CONTROLLER
CONTSOL UNIT 1FT SYMPTOM INDEX

BCUT. ERROR FUNCTION TESTE~
COOE
irpt, the Level 3 C2 l~ch
are set to CZ = 10. On
return ~o L3 the CZ itch

are

~ested

~o

ensu~e

D99- 3705E- 0,

ERSOB DESCRIPTION

CARD
LOCATION(s)

SUSP~C=EO

PROG
~ASK

FEALD
PAGE

FET"P.
PAGE

CO"~ENT5

affected by the 11 irpt.

~ha~

the L1 ~rpt did not alter
the preset L3 CZ ltch.
1110 1101

Saae as 1101 above under
::-ou';:ine '11C.

0101

Saae as OXOl above under
routine "1 C.

OX02

Saae as OX02 above under
routine 1 I 1 C.

OX03

Prior to forcing the Ll irpt,
the L3 CZ ltch are set to
CZ = 01.

l11F

)

=

The Level 3 CZ
01 Itch were
affected by the L1 irpt.

6-090

0003

'\

)

Level 2 ~s interrupted by
Level 1 via an in/out
check Ll.

6-050

(See RTN. "'6)

'\

'X02

Since the ocn runs under
1evel 4, a L2 irpt is
forced V1a diag L2 irp';:.
~his will allow th1s routine
to test while in Level 2.

Pretest error.

OXOI

~he utility Reg (X'79')
is tested to verify that
~2 was 1nterrupted.

The utility reg did not contain A-83M2
the prog level 2 interrupted
b::.t.

/

6-090

OOF~

CP004

6-830

Bypass trouble
shoot::.ng -::h1S

er=or

un~~l

erro=

code 0002 of this
rODtine bas run
without failure.
OX02

~he Ll irpt is forced via
an in/ou';: check Ll. irpt
reg grp I (X'?E') is tested
to verify.

The 1n/oUt check L1 bi~ d1d not
set. A level 1 irpt did no~
occur wben running under level 2.

F!'FF

6-850

OX03

Prior to forcing the Ll irp~,
the level 2 CZ ltch are set
~o CZ = 10.
On retn=n LO L2,
the CZ ltch are tested to
ensure -::hat the Ll irpt did
not alter the preset L2 CZ

The level 2 CZ ='0) l~ch were
affec~ed by the Ll irpt.

0002

6-090

(See RTN 1118)

l~ch.

'11F 'X02

Same as 1X02 above under
routine HIE.

(See RTli 17)

OXOI

Same as OXOI above under
routine 11 IE.

(see RTII 19)

OX02

Same as OX02 above under
routine IIIE.

OX03

Prior to forcing the
irpt, the level 2 CZ
are set to CZ = 01.
re~urn to L2, the CZ
are tested.

L1
itch
On
ltch

=

The level 3 CZ
01 Itch were
affected by the Ll irpt.

0003

6-080

This routine does an
!nterrupt Oaisy-Cha!n from
L4 to L3 to L2 to Ll to L3
to L4.
The CZ itch latches
for L4, L3, and L2 are preset
~o a known s~ate prio= to
forcing the uext irpt. Each
is checked on return to its
level.

"20

lXOI

~evel 4 is interruDted by L3
via PCI L3.
-

Pretest error.

,)X02

Level 3 is interrupted ty 12
via Oia9 L2.

Diag L2 irpt failed to occur.

1. E X3 70 SEAl

6-090

(See RTHS.
'113-1'1F)

6-090

NIA

6-090

CCU IF':'

o

o

left 3705 COftftUHICATIOHS COHTROLLER
C!NTRAL COHTROL UWIT 1FT SY!PlO! IHDEI

o

RCUT. ERROR PUHCTIOR TESTED
CODE
0101 Prior to forcing ~he L3 irp~,
the level q CZ l~ch are set
~o CZ = 10.
On return ~o LQ,
~he CZ ltch ar~ tested to
ensure that the L3, L2, and
L1 irpt did not al~er the
prese~ Lq CZ ltch.

o
o

o

D9!'- 37 05E- 09

EBBOR DESCRIPTIOR
The level Q CZ = 10 ltch
vere affected by the L3, L2,
and Ll irpt Daisy-Chain.

SOSPECTED CARD
LOCAUOJl(s)

=

PROG
!ASIl
0003

FEUD
PAGE

FET811

OX02

Prior to forcing the L2 irp~,
~he level 3 CZ l~h are set
~o CZ = 01.
On re~urn ~o L3,
the CZ ltch are tested.

The level 3 CZ
10 ltch vere
affected by the L2 and Ll
irpt Daisy-Chain.

0003

6-090

OX03

Prior to forcing the L1 irpt,
the level 2 CZ ltch are set
to CZ = 10. On return to L2,
the CZ ltch are tested.

The level 2 CZ = 10 ltch
vere affected by the L1
irpt.

0003

6-090

1121 0101

o

Level 4 masking and unmasking The level 4 mask function
=unc~ions are tes~ed.
failed ~o prevent a PCI LQ
Since the DC8 runs under
irpt from occurring.
PCI L4, this routiue rese~s
PCl L4 and wai~s for a level 3
interval ~imer L3 irpt. Level
q is then masked and tested.

l-B3112
A-B3L2

R/A

CP002
CP006

6-090
6-9110

A-B382

II/A

CP002

6-090
6-950

Level 3 masking and unmasking
func~ions are ~es~ea.
level 3 is masked, an
attempt is made to force
a L3 irpt via a set PCI L3
irp-:-..

The leVel 3 mask func~ion
l-B3112
failed to preveD~ a PC! L3
i=pt from occurring.
If the level 5 eask function
is not active, erroneous errors
aay occur. If so, run routine
1125 to test the level 5 mask
function.

11/1.

CP002

6-9QO
6-950
6-9qO

Level 3 ~s unmasked. an
attempt is made to force a
L3 irpt via a se~ PCI L~
irpt.

The level 3 unmask function
failed. 1 PCI L3 irp~ did not
occur.

l-B 311 2

11/1

CP002

6-940

On the

nex~ ~1.e=

L3

COIlI!IHTS

PAGE

6-090

irp~,

level 4 is unmasked and
tested.

o
e

OX02

level q is unmasked and a PCI The level 4 uneask func~ion
irpt is set while in
failed. 1 PCI L4 irpt did Dot
level 3. An exit from level 3 occur.
is performed and level q
should irpt via PCl L4.
~q

1122 0101

o

0102

1123

o

This routine test for a level
q service interrupt (SVC L4)
when an exit from level 5 is
performed.
0101

In order to reach level 5 the
PCI LQ irpt must be reset and
an exit from Lq is performed.

Level 5 failed to become
active or level Q failed to
exi~ (previously tested).

1-83ft2

II/A

CP003

6-090

0102

The exit from level 5 should
svc Lq irpt. The irpt req
grp 2 (X"?') vi11 be tested
to verify.

The level 5 exit failed to set
svc L4 irpt bit.

l-B3112

0001

C0015

6-860

0103

The level 4 svc L4 irpt 'vi11
be reset ~o verify that it

svc Lq irpt failed to reset.

A-B3!2

0001

COO 15

6-090

can be rese't:.

OX05

0101

e

e
e
e

e

A level 5 exit is performed.

Level 5 failed to exit.

6-750

H/1

This routine tests ~hat level
5 can be interrupted by level 1.

1'24

0102

: co IF!

Level 5 is interrupted by
level 1 via an in/out check.
~rpt reg g=p ,
(X'7E') is
~es~ed to verify ~hat a
Level 1 irpt did occur.
utility reg (X'79') is
fOI a Prog level 5

~he
~ested

The

cbeck L1 bit did
set. Level 1 irpt failed
to occur.
~n/out

FFFF

C0014

6-850

001~

CPOOq

6-830

n~~

The Prog level 5 Interrupted
bi~ failed ·to se~.

A-B3112

X3705BAA 1.7

IEM 3705 CO~'~IIC.TJONS CONTROLLER
CeNTRAL CONT"OL UNIT 1FT SY"PTOM INDEX

ROUT. ERROR ?UNCTIOV TESTED
CODE
interrupted bit. The Ll
~rpt should cause ~o utility

ERBOR DESCRIPTION

SOSFFCTED CAaD
LOCA nOli (s)

PROG
IIASK

FEALD
PAG;;

FETe"

COftflFN7S

PAG~

=eg to set the above

mentioned bit"

OX03

Prior to forcing ~he L1 irpt
~he L5 CZ Itch are set ~o
CZ = 01. On return to level
5 the CZ Itch are tested.

Tbe L5 CZ = 01 Itch vere
affected by the Ll irp~.

OXDQ

Upon return to level q the
saved u~ility ~eg is tested
to verify t.bat the level 5
C and Z condition bits are
correct. ..

The CZ
01 bits of the
utility reg are in er=or.

OX05

Opon return to level 4 and
and after the above test have
been run, the utility reg
is tested to verify that
the exi~ from L2, L5, and
~he L4 ~rpt did not affecthe level 5 CZ = 01 latch.

The C2

~be masking and unmasking of
level 5 is test.ed.
Level 5 is masked and

The LevelS .asking function
failed.

1125 OXOI

=

U~~lit!

= 01

bi~s

0003

A-B31!2

of the

reg are in error.

6-090

0300

CPOOI!

6-090

0300

CPODI!

6-090

B/~

CP002

6-940
6-950

The L5 exit or svc L4 .irp't

affected the L5 C1 latCh.

1I-B3112

instrnc«:.ion execution is halted
on Level 4 and an

ex~~

from

L4 is performed. Th~s should
allow Level 5 cO become active
if tbe maskinq function failed.
OX02
112A OXOl

Level 5 ~s unmasked to allow
level 5 to become ac~ive.

The level 5 un.ask functior
failed.

:::nvalid input

~be

reg~ster

decode

~est.ing.

~nva~d iuput register
failed to set in/ou~ check.

An aT.~emp~ ~s made to input
an invalid register. ~n
in/on: check Ll irpt should
result .
Invalid register values are

6-950

8/1

l-B3L2

FFFF

CKOO?
CU01/!
CQOOl
CDOOl

6-120
6-120
6-850

3FFFF CSOOl

6-800

FFF?

6-120
6-850

1I-B31':2

A-B3H2

in a 'table ..
Irpt reg g=p 1 (XI7Et) .lS
~es~ed for an ~n/ou~ check
!. 1 b:l:' ..

OX02

'1211 OXO,

~he LAG Register is tested
to verify that the 11 irpt
occurred at the inval~d
~est slo't..

!nvalid

LAG Register failed to ~ract
or ~he 11 irp~ cccurred at
the wrong address.

register decode ~e iuvalid outPUt register
An attempt is made
failed to set in/out check~
an invalid regis:er.
An in/out check Ll irpt should
ou~put

1-B3L2

~estinq.
~o

ou~pu't.

result..

A-B3K2
A-B3H2

CKOO"
COO 14
CQ007
CDOOl

Invalid register

values are in a table.
Irpt reg glOp 1 (X' 7F') is
tested for an in/out check
lrpt reg grp , (X'7E') is

Beg X'16' will
con tail: t.he
value of the
input reqistE=r
that produce the
error. Errors
~n this RTN coula
be external to
tbe CCO. (CSB's
CA's). Byte 0
Bit 0-3
and byte 1 bus
0-3 are the ';WD
Bex values tha ~
define the
register

Reg X'16' will
contai& the value
of the outpu~
register that
produced tbe error
Byte 0 b~ts 0-3
and byte 1 bits
0-3 are the two
Hex values tha-:.

define the reg ..

OX02

The LAG Req1ster is tested
to verify chat the 11 ~rpt
occurred at the invalid

~AG

c=
~be

Beqister failed
~be

~o

track

A-S31!2

3FFFF CSOOl

6-800

1-B312

FFFF

6-050
6-850

L1 irpt occurred at

wrong address.

test 510-:'.

112C

:nvalid Op

(lnstr~ct'''n)

'!estin:J~

ox 01

~n

at:'tem pt. .is made to execu'te

a half-word of code
inval~dR

1.8 X3105BAA

tha~

is

Invall.d operations

invalid oepration failed
.0 set op check L1

~he

CU01Q

Reg X'16' w::.ll
con~alL

valu~
~hat

the

of the OP

CCU 1FT

o

o
o
o
o

Ie~ 3705 CO~BUNICATIONS CONTROLLER
C!NTRAL CONT30L UNIT IFT SYBPTOe INDEX

BOUT. ERROR FUNCTION TESTED
CODE
are in a ~able.
Irpt req grp 1 (X'7l') is
tested for a op Check Ll bit.
OX02

The LAG register is tested
verify that the tl irpt
occurred at the invalid

OX02

L1G register failed to ~rac~
• or -ehe L1 irpt occured at the
wrong address.

CU01"

6-050
6-850

The tAG register is tested.

A-B3ft2

1'1'1'1'

CSOOl

6-800

A-BlB2

1'1'1'1'

CDOO"

Sase as OX02 above
nnder rou~ine 112D.

OXOl

Sase as OXOl aDove
nnder roa~ine 112D
~his rOUt1ne sakes over
180 passes.

OX02

Sase as OX02 above nnder
routine 112D.

LAG register failed to track
or the L1 irpt occUrred at the
"rang address.

Sase as OXOl above
under routine 112D
~his routine makes ove:
50 passes.
Same as OX02 above nnder
routine 112D.
Test for a level 1 program
check vhen an tPvalid OP ~s
detected while in level 1.
Since the DCft runs in level
4, aL invalid in/out check
will be used to force this
routine to ron in level 1.

In/OUt Check failed to torce a
L1 irp't (pretes1; error)

OXOl

Once level 1 is ac~ive, an
invalid op check is forced.
irpt reg qrp 1 (X'7E') is
tested for an invalid op
check.

Tho invalid op failed to force
an error when opera1;ing under
le'lel 1.

The invalid op in level 1
should set tl prog check
and CCU check.
CCU check reg (X'7D') is
tested.

The le'lel 1 invalid OP faile~
A-B3N2
to set the expected check bits.

1'1'1'F

Test for a level 1 program
check vhen an invalid in/ou~
check is detected while in
level 1.
~
Since the DCft runs in level
4, an invalid in/ou~ check
viII be nsed to f~rce this
routinE to ru~ in level 1.

Initial in/out check failed
1;0 force a L1 raPT. (pretest
error)

H/A

Once level 1 is active, an
~n/ou~ check is forced.
~rp~ =eq q=p 1 (I'1E') is

The in/out Check failed to force
an error when operating under
level 1

1'I'1'F

1132 1103

0101

::CU IFT

Reg X'16' viII
contain the value
of the invalid
Op that produce
the error.

Same as OXOl above
nnder rou~ine 112D.
~his ron~ine sakes over
600 passes.
-,

1131 lX03

OX02

COBmENTS
produce the error.

1'1'1']1'

OX02

OX02

1'ETft!
P1GE

1-B3:1.2

o

1130 OXOl

1'EAtD
PAGE

slo~.

112E OXOl

nu

PROG
ftASK

Invalid Op (instruction)
The invalid operation failed
Testing. 1n attespt is sade
to set op check Ll
to execute a half-vord of
code that is invalid. The
invalid Op's are forsed
from table data or'ed with a
varying data field. This
routine sakes over 300 passes.
Irpt reg grp l-ll'7!" is
tested for a Op check L1 bit.

o

112F

SUSPECTED C1PD
LOCATION(S)

ll'l'FF

'test

o

EBFOB DESCRrPTIOB

1-B 3112

~o

112D OXOl

D99-3705l!-0~

6-050
6-850

(See RTH 112C
or' 12D)

CK007

6-050

CU01Q

X3705BAA 1.9

lEft 3705 COftftUBICATIONS COBTBOLLEB
C!N~BAL COBT30L UNIT IPT SYBPTOft IBDE1
ROUl. ERBOR
COOL

~OBCTIOB

~ested

0102

TESTED

for an

D99-3705E-O"

ER30R DESCP.lPTIOB

in/ou~

check.

~he in/out check in level
should set t1 prog check
and CCO check.
CCO check reg (1'70') is

SOSPZC=ED CA~D
LOCATION Is)

The level 1 in/oot check failed A-83B2
to set the expected check hits.

PBOG
BASK

PE~LD

PE~ft~

PAGE

PAGE

PPPF

CK007

6-050
6-840

CO"ftEN~S

~ested~

1133

Address exception test.
~his routine attespts to
10ad data fros the first
~nvalid address and expects
an address exception check
~o occor.
The address
under test is then
~ncreased in incresents of
41 until the saxisos
address is reached.
ur01

OX02

'\I

Y

y

0040

'!est for address exception.
lrpt req grp (X'7E') is
~ested for address exception
check L1 bit.

Address exception i'iled
to occor.

LAB is tested to verify
it tracks and that
address exception
occorred at the expected

LAP failed to track or address
exception check ahove failed
~o occur.

PP1'1'

PCl L3 irpt failed to
occor (don't care hits do care).

PDP!!

~hat
~he

l-BIIE2
A-83P2

CS002
CB003

6-050
6-850

Eegister X'13'
will contain
address under
test.

6-800

"

;/

~nstroction.

1'34 0101

PCI L3 interrup~ register
unused hit testing.
~he data in reg X'11' is
varied froa 0000 to PPPP ~o
verify that the value of the
data does not satter.
COt R1, PCI L3

1135

Level 4 instruction
interaction test.
OX01

A given half-vord instruction Da~a expected did not agree.
is inserted into an arithsetic Test instruction vas betveen
sequence at three differen~
A 'LBR' and a 'OBB'.
points to

~est

fo= ar.y

The test loop
~s repeate~ 48 tises with
different half-vord instruc~ions.

~nterac~~on.

, . 10 X3705B' A

J

PPPP

Peg X'16' vill
contair. the value
of reg 1'1" vhen
error occurred.

6-220

/

Beg X'16'
con1;.air.s
the half-vord
instruction
t.hat caused
tbe interaction.

CCO IPT

)

o

o
o
o
o

3705 COftMONICATIOBS CONTROLLER
CENTRAL CONT~OL UNIT 1FT SYftPTOft INDEX

IE~

ROUT. ERROR PUNCTION TESTED
CODE
SPECHL NOT E:

D99-370~E-Oq

!RBOR DESCRIPTION

LOCATIO~(sl

LA 112,1'81121'
LA BII,1'12118
LBR RII,RII
....
·TEST SLOT-

..---- ----.
•• --------*

OBB B2,BII
STB H2,SAVEl
LA R6,I'FFFl"

••*TEST
---------*
51.0'1'*
••---.. -----*

o
o

"

f~Lal

sum of

B2:
BII:
BII:

1000
0001
0001

0100
0010
0010

0010
0100
0100

FEALO
PAGE

FETft~

COftKENTS

PAGE

0001
1000
1000

THE IISTBOCTIOJl ORDER TEST IS STOBl!D IN THIS SLOT
B2= 1001 0110 0110 1001
SAVE 112 FOR ERROR CODE 0101 ANALYSIS
B6" 1111 1111 1111 1111
THE IJISTRUCTION UNDER TEST IS STORED IN TnS SLOT
R2:

IHB H2,I15
STH R2,SAVE2

R5= 1001 0110 0110 1001
R2" 0000 0000 0000 0000
SAVE B2 FO~ EHROR CODE OX02 ANALYSIS

0110

1001

1001

The

te2~

0110

THE IJiSTRUCTIO. U.DER TEST IS STORED IN THIS SLOT

6-220
6-600

Data expected did not agree.

~h~

arithmetic sequence is
tested.

instruction vas

Same as above.

betveen a 'LA' and a 'IBB'.

Level 3 instruction

1136

~nteraction

~es~.

This routine is the same
as 1135 above except the tes~
~s run under program level 3.

o

0'.

~he

PROG
MASK

IBR 1I2,B6

••*TEST
---------*
5LO'l'*
•• ---------*
Ll R5,I'9669'
OX02

SOSPECTED CARD

The purpose of this ~es~ is to p~oduce a
rando. sequence of inst~uc~ions to ve~ify
auy inte~action that .ay exi~~.
The
folloving code is listed to ill~strate the
technique used to detec. interac~io~.

lXO 1
OXOl

A PCI L3 irpt is used to
force a level 3 irp~.

PCI 13 irpt fa~led.
I Pretes't e~ror)

N/A

Same as 0101 above unde"
1135.

rou~ine

OX02
1137

Same as OX02 above under
routine 1135.
Level 2 instruction
interac~ion

~est.

This rout~ne is the same
as 1135 above except the test is
run under program level 2.
1X02

Diaa L2 irpt is used to force
a level 2 irpt.

OX01

Sa.e as OXOl above under
routine 1135.

OX02

Same as OX02 above under
routine 1135.

1138

Diag 1.2 irpt fai):ed.
(Pretest error)

II/A

6-090

Level 1 instruction
~nterac~ion

~es~.

:his rou~ine is ~ne same
as 1135 above excep~ the test
~s run under program level 1.
lI03

An invalid output reg is used
to force a Ll irpt.

OXOl

Same as 0101 above under
routine 1135.

OX02

Invalid outPUt reg
failed to produce A
Ll irpt.
(Pretest e~rorl

1/1

6-090

SamE:: as 0102 above under
rou":l.ne 1135 ..

'139 OXOl

6-090

Level 5 ins.ruction
~nterac~ion tes~.
~his rou~~ne is the

sa.e as 1135

13705BAA 1.11

IE~ 3705 COM"OHICATICN5 ~ONTEOLLEE
CENrRAL CONTROL UNIT 1FT SY!PTO~ INDEX

RCU!.

ERRO~

FUNCTION TESTED

D9 9- 3705E- 0'

EEBOP DESCRIPTION

C::lDE
above
under
3rror
under

OX02
113C

SUSPECTED CASP
LOCATION(s)

PROG
I!ASK

FEA1.D
PAGE

FETAh

COI!I!EN:rS

PA~E

except the test is run
program level 5.
is same as OXOl above
routine 1135.

Same as OX02 above under
routine 1135.
Verify correct inaication and
operation of Beg X'7A'.
!nput X ' 7A' byte 0
bit 0 not on - CU~

CDS defin~t10n indicates
CUC installed, but

~llstrnction.

hardware indica~or
bi-: is off,.

OX02

Input Y'?A' byte 0
bi~ 0 is on no
CUC instruction.

CDS indicates eu:
no~ installed, but
hardware bi~ is on

OX03

Cycle O~ilization Counter
value is not correct.
Several passes are made
using different values.

OXOI

A-BfI'!'2

Verify CDS
defiti -:.ion in
I!odel/?lag by'!:e.

A-84'1'2

Verify I!odel/Flag
byte of CDS.
Reg X"4' conta1ns
ac'!:ual cue value.
Reg X'15' conta~nE
bits in erro:- ..
Feg X'16' conta1ns
expected cue value.

BSe CRC polynomial ~est.
~his routine viii test the
hardware CRe circuitry to
verify that the correct
eRe character is developea.

113?

OXOI

Using input
~'7B'

1140 OXD'

regis~er

•

8-Bit CEC
polynomial test

The developed and
expec~Ed CPC characte=s
did not compare.

A-B 352

The developed and
expected CRe
characters did nO~

A-B352

FFFF

CBOOI-3

See commen":

below to::Rout:..ne l1qO.
FFFF

eR001-3

compare.

X'13'
will contal.r.
an address
pointer to the
data table. To
determine the
old CRC, da ta
charaCter, ana
expected new CRe
display the
following storagE
addresses:
Reg X' 13' Ad::-=
old eRe
Reg X'13' Ad::plus 2 = Data
Reg X'13' Adr
plus 4 = New
CRe
NOTE: Reg X'D'
above impl::.es "the
address con'!:ained
Reg~ster

in Reg X'13'

1141

1142

OXOI

"-Bit CRC
Polynoaial Tes-:

eRe Polynomial Test for
ALC RPQ t8:;8655

ALe CS3

regis~er

=onti~e

Should run only

Test.

The developed an3
expected eRC
characters did no~
compare.

A-B352

The developed and expected
eRe charac~ers did not
cOllpare.
This routine should run
onlv when BPQ 858655 is
instal1edm
If the fail~ng
3705 does no~ have RPQ
858655 ins~alled, check the
CDS data.

A-B3C2

l'FFF

CR001-3

See

commen~s

for routl.ne
1140.
FFFF

See comment.s

for routine
1140.

Th~s
whe~

,PQ 858911 is ins-:alled.
If
the failing 3705 does no:

1.12 X 37 ():;BA A

eeD IFT

o
o
o

!t~

31ns

:;:N·:P~.:.

CO~~UNI=ATISN5

:;:NDEY
EF?C? DESCEIPT1TjN

S05FEC'Itt CAEt
!A,CATION (S)

have RPQ 858911 installed,
cbeck the CDS ~a~~.
OX01

:es,: bi':s fo:: llC'{IXmi': c'-ec,io~ ana all CCC b~~s iL
~nput and ou~pu~ registerz
:":-75'.

and OnTpu~
compare.

lnpu~
no~

req~

X'~5'

do

T-'rl.Lr
P~.GE

FE TlH'\
N.t;"£

C:::HH1EWl:

I~ 14 :: aa':a !'eaa.
!roll inpu,,: reg

x' "lC'

F 15 = Bel:'B it!

F 16

= Data

~ei:.

1D

sto-

QU'tpu-:

reg 1"75' ..
ALC ~ait ~es~.

This rou"iLe
should run only when RPQ
858911 is installed. If the
!ailing 3105 does not have
~PQ 858911 installed, check
':.he CDS dao.a.

OXOI

~est

ALC L 1

hardware bv alt-

e=ing one !ns~ruc~ion ir. ~he
data processing

0102

OX03

Altered instruc':.ion £ailed to
produce a Ll inrpt.

Inpu':. reg I'1E'
byte 1 b:'t 7
should be OIl to
indicate ALe
suppor-: Ll err.

EOM remember vas e~pected but
vas no~ detected. Bit ~es~ea
~s bY1:e 0 bit 1.

R 111 = actual

E0M =emember vas de~ected bu~
was not expected. Bi~ tes~ed
is byte 0 bi": 1.

Rll1 = ac~ual
data.
Rl0 = eipec,ed
data.

EOM vas expected but was DO~
detected. Bit tested is byte 0
bit 2.

Rll!
Rl('

expected

EO~ vas detected but
e~pec"ed.
Bit tested

Rll!
R16

ac,,:ual
expected

seguenc~.

":'es"':. EOIl remembe::
':es't i f expected.

par~

1.

":e5: ::OM remember part 2.
Tes:' if de'tec'ted

da~a.

P 16 = Expec"ec
data.

:I

OXOq

o

P,(iG
liAS!\:

error ..

0·"
,

SY~PTO~

CODE

o

o
o
o
o

:ONT?~LLER

::ONT30. "!lIT: :'T

0105

':es-: !OM expec":ed.

':e5':

EO~

de"Oected.

vas
is

no~
by~e

0

ac~ual

bio. 2.
OX06

'lest end

cha::ac~e::

counte::.

ac~ual end char. cntr. does
coepare vi~h the expected.
Bi':.s tested are byte 0 bits 5,
6, and 7.

Rll! = ac"Cual
R15 = bi~s ir..

The

no~

error
R16

e~pec~ed

OX07

Tes':; CCC.

The act. cce does not compare
vith ~b€ expec~ed. Bi~s tested
are by~e 1 bi~s 2, 3, 4, 5, 6,
and 7.

Rlq
ac,,:ual
P15
bi~s !.!!
error:
R16 = expect-eo

OX06

!est 1st 2 by":es of buffe::.

First tvo bytes of buffer are
in error ..

1113 = aJ!dr.

o

of

buffer.
Rll! = aCt. data
fro. butfer
R15 = bits in

error

OX09

Test 2nd 2 bytes of buffe::.

Second tvo

by~es

of

bu~fer

are

in error.

P16

e~pec,ed

F13

addr. of

buffe=

Il 11! = ac:.. data

fro. buffe::
Il15 = bits ir.

error

expec"t-ed

R16
01011

les': 3=d 2

by~es

of buffe::.

7hird tva bytes of buffer are
in er=or ..

R13
add::. of
buffe:::
R14
ac~. data
fro. buffe=
P 15 = hits ~"

=

erro=

Rlb ::: €:xpec"ted
OXO~

::::0 IF':

~e~:

ALe Ll regnest

bi~.

ALe L1 regues~ bit no~ se~.
Bit
tested is Dy~e 1 bi~ 1 cf i~pu~
reg I'7E'.

Reg X' 03' =
contents c:::: i!lput reg. Xt ?"!!'

X3705BAA

1.13

IE" 3705 CO~~UNICATIONS CONTROLLER
C!NTRAL CONT~OL UNIT IFT SyftPTO! INDEX
R~UT.

ERROR ~UNCTION TESTED
;::OD£
OX OD !est for correc t L1 i:pt.
address.

OXOE

11115

Test reset of ALC L1
bit.

reques~

D99-3705<.- Og

ERP-OR DESCRIPTION
Ac~ual

irp~.

CARD
LOCATION Is)

SUSPEC~ED

no~
~rpt.

address does

compare with expected
address.

PBOG
!ASK

FEALD
PAGE

FETft~

PAGE

C08!EBTS
LAP. should po~n-::
to irpt. add::.
but does no,::.
&eg X'Oq' =
conteuts of LAP.
Beg 1'05' =
bl.ts l.n erro=
Beg X'06' = expected irp-::.
address.

ALC L1 request bit did not
reset. Bit tested is byte
bi,:: 7.

Reg 1'05' " contents of inpn'::
reg 1'7£'.

ALC receive test. Tbis rootioe shoold run only when EPQ
858911 is installed. If ~be
failing 3705 does not have
BPO 858911 installed, check
the CDS da~a.
OX01

Test ALC L1 hardware by Altering one instrnction in the
data processing sequence.

Al,::ered instruction failed to
produce a L1 interrupt.

Input req X'7£'
byte 1 b~t 7
should be on to
indicate ALC
support L1 error

OX02

Test EO I! remember par':: 1.

Test i f expected.

EOII remember vas expected bu~
was not detected. Bit tested
is byte 0 bit 1.

B14
actual
B16 " expected

~est

Test EOI! remember par'::. 2.
i f de'tected.

EOII remember detected but not
expected. Bit tested is by'te
0 bit 1.

Rll1
R16

ac,:;ual
expected

OXD4

'!est GA part 1.
Tes't i f expected.

GA expected but not detected.
Bit tested is byte o bit 2.

B14
B16

expected

axos

'lest GA pa:t 2.
Test i f detected.

GA detected but not expected.
Bit tested l.S byu 0 b1t 2.

B14
B16

ac-::oal
expected

OX 06

'lest

CCC remember expectea.

CCC remember expected bot not
detected. Bit tested is by':;e 0
bi-:: II.

B14
B16

actual
expec-::ed

OX07

~est

CCC remember detected.

CCC :emember detected bu~ no";.
expected. Bit tested is bY'te 0
bi. II.

B1q
BH.

ac,::ual
expected

OX08

Test end character counte::.

The actual end char. CNTR. does
not compare with the expected.
Bits tested are byte 1 bits 5,
6, and 7.

B111
actual
B1S "" bi'ts iL
erro::
B16
expected

OX09

Test CCC.

The actual CCC does not compare
with the expected. Bits tested
are byte 1 bits 2, 3, II, 5, 6,
and 7.

B111
actual
B1S
tits ir.
error
B16
expected

OXOA

Test f1rst tWo bytes of
l::uffer.

First two bytes of buffer: are
in error.

B13
addr. of
buffer
B111 " ac~. da-:;a
from buffe::
B15 = bits ir.
error
B16
expectej

OXOB

~est

second two bytes o!
buffe::.

second two bytes of buffer are
in error.

R13
addr. of
buffer
1'111 " act. da!:a
frail buffe::
B1S = l::i":.s ~t

OXD3

ac'toal

erro!'
B16

OX 0:::

Tes':: third tWO byt:es of
boffe::.

1.14 X3705BAA

Third 'tvo bytes of buffer are
in error.

expected

B13 " addr. of
buffer
B14 " ac-::. da':;a
from buffe::

ceo

iFT

o

Ie~ 3705 COftftURIC1TIONS CONTR~LLEB
CENTRAL CONT~OL UNIT IPT SlftPTO" INDEX

BOUT. ERROR PUBCTIOI TESTED
CODE

;>9 q - 37 05E- 09

ERROR DESCRIPTION

SUSPECTED C1RD
LOCATION(s)

PRO;
ftASK

PEALD
PAGE

PETft!
PAGE

COftftENTS

= bits ir.
e=ror

P 15

R1G : expected
OXOD

~est

fourth
buffer.

~wo

bytes of

Pou~th

two bytes of buffer are
in e::ror.

R13 = addr. of
buffer
Rll1
acr.. ~ata
froa buffe::
R15 = bits ~n

=

erro=
R16
axOE

~est

OXOP

Test for correct L1 interrupt
address.

1LC L1 request

bi~.

= expected
X'03' =

lLC L1 request bit did not set.
Bit tested is byte 1 bi~ 7 of
input reg X'7E'.

Reg
contents of :in-

Actual irp~. addr. does not
compare with expected irpt.
add::.

LAR sbould point
to irpt addr but

put reg X'7E'

does no-:'.

=

Beg 1'04'
contents of LU
Beg X'05'
Bits

:'n error

Peg 1'06'
expected
OX10

1146 OXOl

Test reset of 1LC Ll request
bit.

ALC tl request b~t did not reset.
Bit tested is by'!:e 1
bit 1.

S~orage protect 'test
Set all storage keys
to 000.
~he storage keys are
!irst set and then read
and compared fo:: the
correct key value.

One of the storage block
keys failed to set to
000.

0007

CVXIX

6-0110

See Note 2.

0007

CVIIX

6-0110

See Note 2.
See \iote 3.

0007

CVXII

6-040

See Note 2.
See Note 3.

0007

CVIIX

6-0110

See Note 2.
See Note 3.

Beg X'OS'
contents of
inpllt reg X'7E'

~he se~ting and reading
of keys is perfor_ed by
a major subroutine (S.skPT1).

1147 OXOl

Set all storage keys
to 001.

One of the storage block
keys failed to set to
001.

1148 OXOl

Set all storage keys
to 010.

One of the storage block
keys failed to set to
010.

lll1q OXOl

Set all storage keys
to 011.

One of the storage block
keys failed to set to 011.

114A OXOl

set all storage keys
to 100.

One of ~he storage block keys
failed to set to 100.

A-B4D2

0007

CVIIX

6-040

See Note 2.
See Note 3.

Set all storage keys
101.

one of the storage block keys
failed to set to 101.

1-B4D2

0007

CVIIX

6-040

~o

See \iote 2.
See \iote 3.

l111C OXOl

Set all storage keys
~o 110.

ODe of the storage block keys
failed to set to 110.

A-B4D2

0007

CVIX7.

6-0110

See Rote 2.
See Note 3.

114D OXOl

set all storage keys
to 111.

One of the storage block keys
failed to set to 111.

A-BIID2

0007

CVIIX

6-040

See Note 2.
See \iote 3.

l111E OXOl

Storage protect test.
Set all pro~ect keys
to 000.

One of the protect keys
failed to set to 000.

1-B4D2

0007

CVIXX

6-040

See Note 2.
See NolOe II.

Set all protect keys
001.

ODe of the protect keys
failed to set to 001.

0007

CVXXX

6-040

~o

See Note 2.
See Rote 4.

Se'!: all protect keys
010.

One of the protect keys
failed to set to 010.

A-BIID2

0007

CVXIX

6-040

~o

See Note 2.
See Note 4.

1151 OXOl

Set all protect keys
to 011.-

One o! the protect keys
failed ~set to 011.

l-BIID2

0007

CVXIX

6-040

See Note 2.
See Note II.

1152 OXOl

Set all protect key",

one of the protect keys

1-1l4D2

0007

CVIXI

6-0110

See No"e 7

114B axOl

l111P OXOl
1150 OXOl

C::U IPT

1-511D2

X3705BAA 1.15

lEft 3705 COMIIUNICATIONS CONTROLLER
CENTRAL CONTROL UIIT IPT SYBPTOe INDEX

ROUT. ERROR FUNCTION TESTED
CODE

"

D99-3705:>-09

ERROR DESCRIPTIO.

SUSPECTED CUD
LOCATION IS)

PROG
BASK

!"fALD
PAGE

FETII!!
PAG':

"

COlldENTS

J!

'.:0 100.

failed t.o set to 100.

1153 ala 1

Set all protect keys
to 101.

One of the prot.ect keys;
failed to set to 101.

1I-BqD2

0007

C\fXXI

6-040

See Note 2.
See Note 4.

1154 OXOl

Set all protect keys

One of t.he prot.ect keys
failed to set to 110.

1-81102

0007

CYXXI

6-040

See Note 2.
See Note 4.

One of the protec~ keys
failed to set to 111.

l-B4D2

0007

CYXXI

6-040

See Note 2.
See Note 4.

4-080

For 10op~Dg on
error the DCft CE
switcb shaold be

";0

1155 OXOl

110.

Set all protect keys
";0

111.

See Note 4.

Special storage protect rout.ine for problem definition mode.

1156

This routine will run only if the problem definition mode
and the mannal intervention CE sense switches are se~ or
if a single ron tine is requested and tbe routine
requested is 1156. If the poe sense switch is on, a
manual int.ervention code vill be displayed. The CE should
~hen

en~er

the desired 'key' qata into switches 5, C, Dr

and E (see Note 2 for layout oot 'set key' data - also note
that by'.:e a bits 0-3 should be entered into switch S, etc).
Tbe data entered viII determine if a storage key or protec~
key is set and/or read.
This test

ron~

uUler program level 4.

£![I!Q!:

Ensure ~ha~ the block
under "est (for set~ing storage key) does not
prevent this roo~ine or the DCM for executing
instruct ions.

1'101'

Manual intervention code - CE
should enter the desired
da~a

into switches S, C,

H/A

N/1.

~r

se't..

and E

0101

The 'key'

se~

~p

~hat

verify

with the

1.16 X3705B1.A

If

no~,

routine viII .ake
only one pass.
is tested
it agrees

expec~ed

Key failed to set to the
desired val ue

0007

6-040

key.

CCU

IF~

o
o

o
o

IE" 3705 co~nUNICATIONS CONTROLLER
CENTRAL CONT30L UNIT 1FT SY"PTOn IN DE!
ROUT. ERROR FUNCTION TESTED
CODE

D'l9-3705E-09

ERROR DESCRIPTION

Storage protection aechanism testing at proqram

level 5.

Sec~ion

SUSPECTED CARD
LOCATION(s)

PROG
MASK

FEALD
PAGE

FETnM
PAGE

FFFF

CVI!!

6-0110
6-850

COMMENTS

1.

The following seven rou~ines ~es~ to verify ~hat, if the
protec~ key and s~~rage key match, ~he user (level 5 is
~be user) is allowed to access storage for instruction

execu't.ion.

o
o

Since tbe protect keys for program levels " 2, 3, and 4
are fixed equal to 0, program level 5 is set up for the
appropria~e protec~ key and the ac~ual test section of
each routine is tested at program level 5.

~o

001

~hat

no storage

protec~

e~rors

occur, when an instruction
execution is performed.

o

o

Test that wben the storage
key is egual to 001 and the
protect key (level 5) is equal

1158

0!01

Irpt req grp 1 X ' 7E' is
tested to verify that a
protection cbeck did not
occur.

lXl1
1X21

Pretes~ Error
Pretest Error

A protection check di:l occur

Tes~ ~hat when the s~orage
key is engal to 010 and the
protect key (level 5) is
equal to 010 tha~ no storage
pro~ect errors occur, when

1159

an

instruc~ion

exeCUt~on

~s

performe:i.

OXOl

reg qrp 1 (!'7P') is
to verify ~ha~
a protec~ion cheCK did
~rp~

~ested

f .•

U

A protection cbeck did
occur

A-B4D2

FFFF

CVI!!

6-040
6-850

A protection cbeck did
occur

A-B4D2

FFFF

CVIXX

6-040
6-850

A-B4D2

FFFF

CVXX!

6-040
6-850

:not. occur

lX12

Pretest Error

1122

Pretest Error

115A

Test that when -che storage

key is equal ~o 011 aDd the
pro~ec~ key (level 5) is
egual to 011 tha~ nc storage
pro-r.ect erro::-s occur, whe!_

o

an

instruc~ion

execution is

performed.

OXOl

~rpt reg grp 1 (!'7IC')
~ested to verify tbat

is
a
protection check did not

occur ..
1X13
1X23

1158

2retest error
Pre~est error
Test that when the

storag~

key is egual to 100 and the
protex~ key (levelS) is equal
to 100 that no storage protec~
errors occur, when an instructior.
execution is perf~r.ed.

OXOl

Irpt reg grp 1 (!'7E') is
to verify ~hat
a protection check did

~ested

no"':

1X14
lX2~

115C

A pro~ectioD cbeck did
occnr.

OCCU1:*

Pretest error

Pretest error
~est

that wher. the storage

key is equal to 101 and the
protect key (levelS) is equal
~o 101 tha~ no storage protec~
errors occur, when an

ceo 1FT

ins~ruction

X3705BH 1.17

rEM 37 05
C~NTRAL

ROUT.

COM~UNJCA'!':rONS

CONTnOL UNIT 1FT

COIf'TRJJ.LER
Sr~PTO~ INDEX

ERROE FUNCTION TEST=D

0.01

ERROR DESCRIPTION

SOSPEC'!ED CUU·
LOCATION(s)

FROG
MASK

FEtU
PAGE

Fl'n~

A-BIID2

FFFF

~VXlJ

6-04n
6-850

di~

A-B11D2

FFFF

CVXXI

6-040
6-850

check aid

A-BqD2

FFPF

eVIIX

6-040
6-850

pe~f~rmed.

execuLion is

Irpt reg gep 1 (X'7!") is

A protection check did

~ested

occu:: ..

to ve=ifv ~hat a
pro~ec~ion check did no·

:-L~MEN':

,;

PA~P

occur.
lX 15

Pretest e!"ro!"

lX25

?retes~

115D

e=ro=

':'es't 'that vher.. "the storage

key is equal

110 and

~0

~be

Key CLevel 5) is equal

pro~ect
~o

110 that no

s~orage

protec~

errors occur,. "be:J an ~Ilst.l:uctio!',
execution 1.5 performed.
OXOl

Irp~ reg geD 1 (X'7E') is
~e~~ed ~o ve~fy ~hat a
protection check did no,.
occur.

1X16

Pretes~

1X 26

Pr. j~t:.es\: er-ro!:"

1 15~

~e£~

key

when

equal
key

pro~ec~

'":.0

protec~ion

check

error

~hat
~s

A

occu:;:-.

~he

storag~

111 and the
(levelS) is equal
~o

111 "that. DoC storage p:-!"J7.ec":

errors occu~, ~teD an ~ns~ruc~~on
extcu-:.ion is pe:=f'Jrmed.
OIOl

:::rp: ::eq grp 1
~ested

~o

(X'7~1)

ve=~fY

pro~ection check did

A

:'5

protec~iot

a

~hat

!IO:

OCCUI..

1X17
1X;7

Pretest
Pretest

e==o~

S~ordge

p=o~ec~ion

e~ro~

mechan~sm

~esting

at program level 5.

Se~ion

2~

teSL to verify tha:, if proteCt key ant
s~oraqe key .a~ch 0:: ~f the storage key ~s 111 (unprotected storage).
~he use::
(levtl 5 is the user) is allowed ~o modify storage vithou~
~he

follov~n9

caus~n9

115F

Tes~

eight

rou~~~es

p:-o-:.€c::.ion checks.

~hat

when the

sto~aqe

key is equal ~o 001 and the
key rlevel 5) is equal
":0 001 ~ha~ no s~"rage p::-otec~
errors occu~, when an a:tempt
is made ~o .odify storage.
p=o~ec~

0101

1111

lX21
1160

:::ep~ reg grp 1 (X'7E')
~ested to ve=ify Lhat

is
a
protecoion check did not
occur ..

check did

A-B4D2

FFFF

eVIXI

6-040
6-650

& protection check d:'d

A-811D2

PFPF

evxxI

6-0QO
6-85C

A

protec~ion

occur.

Pre~est e=::-o.
Pretest erro=

'!'est that whe!!. 'the st.orage

key is equal ~~ 001 and ~he
pro~ec~ Key (levelS) is equal
~o

010

~ha~

nc storage

p~otec~

errors occur, when an a~~emD~
is made ~o .odify storage.
0101

:rp~

~s

req g=p 1 (X'7E')

:'est..ed

~

c ve=i.fy -:.ha t

protection check did

i:l

occur.

30:

occu=~

1X12
1X22

1151

P~e~eE:

e=ro~

?retes~

e==~=

Test

tha~

whe~

~be

storaoe

kev ~s equal ~o 011 a~d ~he

proteCt key (level S) 2S equal

1.18 X3705BAA

ecu IFT

0

0
0

e
e
e
e

e
e

ERROR DESCRIPTION
ROOT. EBBOR PONCTION TESTED
CODE
":0 011 'tha~ no storage protec":
errors occur~ when an attempt
is made to mod1fy storage.

e
e

Irpt req qrpl (X'1E') is
tested to verify ":hat a
protection check did no":
occur ..

1X13
1X23

Pretest error

PBOG
"ASIt

PEUD
PAGE

F.E'!II11
PAGE

A p:o~ection check diel
occur.

A-811D2

PPPP

CVXX!:

6-040
6-850

A protectl.on check did
occur.

A-sqD2

PPPP

evxxx

6-040
6-850

A protection check did
occnr.

A-B4D2

PFFP

evxxx

6-040
6-850

A protection check did
occur.

1-811D2

FPFP

evxxy.

6-0110
6-850

A protection check did
occur.

"-B4D2

FFPP

evxxx

6-040
6-850

COII"ER'rS

Pretest error
:est that when the storage
key is equal to 100 and the
protect key (level 5) is equal
'to 100 that no storage protec":
errors occur. when an

at~e.pt

OXOI

Irpt req grp I (X'7F') is
":ested to verify that a
protection check did not
occur.

1% 14
1X24

Pretest error
!?'re'tes't. erro=
Tes~ that when the storage
key is equal to 101 and the
p:otect key (level 5) is equal
';0 101 ":hat no storage protec~
errors occur, when an a';tempt
is made to modify storage.

1163

OXOI

:rpt req grp 1 (x'7F') is
":ested to verify that a
protection check did not
occur.

1115
1%25

Pretest error
Pretest error
Test that when the storage
key is equal to 110 and the
protect key (level 5) is equal
';0 lID that no storage protec":
errors occur, when an attempt
!s made to modify storage.

116~

OXOI

I:pt reg grp I (l['7F') is
~ested to verify ~hat a
protection check did no~
occur.

1%16
1X26

Pretest error
Pretest error

1165

~est

that when the storaqe

key is egu~l ~o 111 and the
protect key (level 5) is equal
":0 111 tha~ no storage p=otec~
errors occur. when an a'tteupt
is made to modif,\, storaqe.
OXOI

:rp1: reg grp 1 (X'7F') is
tested to verify that a
protection check did no":
occur.

1%17
1X27

ceu

Pretest e=ror
Pretest. error
~est

1166

tha~

when the storage

key is egual to 111 (unprotec-:ed
storage) and the pro1:ec-: key
[level 5) 15 some value o~her
than 111 ( (101 for this test))
~hat no s~orage protec~ errors
occur, when an at~e.p~ is .ade
to modify storage.

e
e

e
e
e

SOSPECTBD CAPD
LOCATIOR (s)

!s made to lIodify sto:age.

e
e

e

OXOI

1162

e

0

D9 51-37 05E-09

Ie! 3705 CO""ORICATIORS CONTROLLER
CENTRAL CONTROL ONIT 1FT SJ"PTOP INDEX

1FT

X3705BJlA 1.19

IE! 3705 C05ftUNICATIONS CONTROLLER
CENTRAL CONTROL ONIT 1FT SYftPTOft INDEX

D99-3705E-OQ

ROUT. ERROR FUNCTION TESTED
CODE
OXOl Irpt req grp 1 (X'7!') is

ERROH DESCRIPTION

A protectiou check did
occur.

to verify ~hat a
protection check did no~
occur.

~ested

1115
1117
1127

SOSPECTED CUD
LOC'.'1'IOIl (s)
AB4D2

PROG
USK

FEALD
P'-GE

PET!!!
PAGE
6-040
6-850

Pl'FF

CnXI

FFl'l'

CVXXI

6-0QO
6-8SC

l'l'FF

CVXXX

6-040
6-850

1'F1'F

CVXXX

6-040

CO!IIEHTS

Pretest error
Pretest error
Pretest error
Storage protection mechanism

~es~ing

at program levelS.

Section 3.

The following four routines test~to verify tha~ if tbe protect key
aud the storage key are not equal. the user (level 5 is the user) is
not allowed to execute an instruction. In addition. protection cbeck
should be set.
Test that when the storage key
is equal to 001 and the protect
key (level S) is equal to 110
that storage protection checks
vill occur. when an a~tempt is

1161

made to execute an
OXOl

1r 11

1X 16
1r26

Irpt reg grp 1 (X'7E') is
tested to verify ~bat a
protection check did occur.

1

protection check did
occur.

no~

Pretest error
Pretest error
l'retest error
when the storage key
is equal to 110 and the protec~
key (level 5) is equal to 001
that storage pro~ection checks
vill occur. when an attempt is
made to execute an instruction.

1161'

~est ~hat

OXOl

1111
1116
1121

lno

A protection check dia
occur.

Irpt reg grp 1 (X'7E') 1S
tested to verify ~bat a
protection check did occur.

A-BIID2

DO~

Pretest error
Pretest error
Pretest error

Test that when the storage key
~s equal to 000 and the protect
key (level S) is equal to 111
that storage protection checks
vill occur. when an attempt is
made to
OIOl

1110
U17

lX21

execu~e

an

iDstrDc~ion.

Irpt reg grp 1 (X'7E') is
tested to verify ~hat a
protection check did occur.

1

protection cbeck did

no~

6-850

occur.

Pretest error
l'retest error
l'retest error
Test that when the storage key
is equal to 111 and the protect
key (level 5) is equal to 000
that storage protection Checks
vill occur. when an at~empt is
made to execute an instruction.

1171

OXOl

lXl0
1117
112C

1112

iDs~ruction.

Irpt reg grp 1 (X'1F') is
~ested to verify ~hat a
protection check did occur.

A protection cbeck did
no":. occur.

A-B4D2

FFTl'

CVXXX

6-0QO

6-850

Pretest error
Pretest error
?retest error
Test that when the 'storage key
~s equal to 110 and the protect
key Ilevel 5) is equal to 111

1.20 X3705BH

ceo

1FT

o

o

lEft 3705 CO!ftURICATIORS CONTROLLER
CEHTEAL CONTROL UNIT 1FT STftPTOft INDEX

D99-3705E-04

ROUT. ERROP. FUNCTION TESTED
CODE

ERROR DESCRIPTION

SUSPECTED CARD
LOCATION(s)

PROG
ftASK

YEALD
PAGB

FETM"
PAGE

A pro~ection cbeck did
not occur.

A-3 11D2

TFFF

CVXII

6-0110
6-850

A-BIID2

FFFF

CVIXX

6-0110
6-850

A-BIID2

FFFF

CVXXX

6-0110

storage protection checks
will occur, wben an attempt is
aade to aodify storage.
~hat

o
o

OXOI

Irpt req grp 1 (X'7E') is
tested ~o verify that a
protection check did occur.

1116
1117
1127

Pretest error

COftftENTS

Pretest error
Pretest error
S~orage

protection aechanism testing at program level 5.

Section II.

~he

following six routines test to verify that, if the protect key
and tbe ~orage key are not equal aud if the protect key is not equal
to zero, tbe user (level 5) is not allowed to modify storage. In
addition, protection cbeck should be set.
Test tbat wben tbe storage key
is equal to 100 and tbe protect
key (level 5) is equal to 110
tbat storage protection cbecks
viII occur, vhen an attempt is
Dade to modify storage.

1173

o
o
o

,
·
U

OXOI

lXl11
11 16
lX26

i'

.

A protection cbeck did
no~

occur ..

Pretest error
!'reteSt error
Pretest error
~est tbat when tbe storage
key is equal to 001 and the
protect key (level 5) is egual
to 101 that storage protection
checks viII occur. wben an
attempt is aade to modify
storage.

11711

~.il

Irpt reg grp 1 (X'7E') is
~ested to verify ~bat a
protection cbeck did occur.

OXOI

,

IXII
lX15
1125

~rpt req grp 1 (X'7E')
~ested to verify ~hat

is
a
protection cbeck did occur.

A protection cbeck did
not occur.

6-850

!'re'test err,=,=

Pretest erro=
Pretest erro=
~est that when the storage
key is equal to 000 and the
protect key (level 5) is egual
to 100 tba~ storage p~o~ection
checks will occur, vben an
a~temp~ is aade to modify
storage.

1175

OXOl

=rpt req grp I (X'7F') is
tested ~o verify tbat a
protection check did occur.

lX 10

Pretest error
Pretest error
Pretest error

lXl~

lX211

A protection cbeck did

FFFF

CVXXI

FFFF

CVXXX

no'!. occur.

6-0QO
6-850

Test tbat wben the storage
key is equal to 011 and tbe
protect key (levelS) is equal
to 010 tbat storage protection
checks viII occur, when an
a~te.p~ is made to modify
storage ..

1177

OXOl

lX12

lX13

ceu IFT

~rpt reg grp 1 (X'7E')
~ested to verify ~hat

is
a
protection cbeck did occur.

A protection cbeck did
no~ occure

l-BIID2

6-0QO
6-850

Pretest error
Pretest error

X3705BAA 1.21

IE~ 3705 COftftOBICATIOBS CO.TROLLER
CzRTRAL COBT30L OBIT 1FT SYBPTOB IBDEI

D!19-3705f-09

ERROR DESCRlPTlON

RCOT. ERROR FONCTION TESTED
CODE
1122 ?retest error

LOC~TIQH(S)

PBQG
SASr.

FE~LD

FETII~

PAGE

PAGE

FF~F

eVllx

6-040
6-850

FFFF

CVXII

6-040

COIIIIEIl:rS

Test that vhen the storage
key is equal to 101 and the
protect key (level 51 is equal
~o 001 that stcrage protectioc
checks vill occu~, vhen ar
atteapt is made to aodify
storage.

1178

0101

!rpt req grp 1 (I'7E') is
tested to verify that a
protection check did occur.

1111
1115
1121

l'retest error
Pretest error
Pretest error

A protection check did
DO~ occur.

that vher. the storage
key is equal to 100 and the
protect key (level 5) is equal
to 111 that storage protection
checks vill occur, vhen an
attempt is .ade to aodify
storage.
~est

1~79

OXOl

1114
1117
1127
1190

SUSPECTED CABP

I'rpt req grp 1 (I'7!') is
tested to verify that a
protection check did occur.

A protection check did
occur.

DOt.

A-P"D2

1-040

Pretest error
!>retest error
!>retest error
1-040

The customer usage meter
should run vhen an ~nstruct~on
~s executed at program levels
1, 2, 4, 5, and level 3 if 8
ms bas elansed since the
~nterval timer interrupt
occurred or if an instruction
is executed at level 3 and a
non in~erval ti.e= ~n~errup~
has occurred.
A ser~es of ins~=uc~ions ~o~aling 24 seconds
vill be executed on eact. level for a total run
time of 2 minutes (0.~34 run time o~ .eter)

The CE vill he requested to read and enter the
meLer

a~ ~he

s~a=~

o! the

~es~

and

a~

the end.

As a result, this routine viII run only if the
aanual intervention CE sense switch is set.

1.22

I3705B~~

ceo J:n

o
o
o

o

I2" 3705 C'ft~UNICATIONS CONTROLLER
CENTRAL CONT30L UNIT 1FT SY!PTOft INDEX
ROUT. ERPOR
CODE
FXOl

FUHCTIO~

119 9- 37 05E- 09

TESTED

ERROR DESCRIPTION

~anual

in.ervention
code - CI should enter
meter reading per the
~ollowing procedure.
!leter

. .. . .. ..
.
.
.. '" ....
..
.
.. •'"
.
"
.
..
•
••• • •..• • ..'" .'•" . •• • • • ... •••
·..
* * ..*
* •
* 1 .

•
•

.... .... .. .... ..
'"

*

5

2 '" 3

*6
..

SOSFECTEll CARll
LOCATION(s)

PROG
"ASK

PEALD
PAGE

.Data switches

B
I

D
I

*

'"

C

I

I

PAGE

!l

+----------

I

I
I
I

Readi&g 1£
~housandth5 - for
example at left
the value would
be 2 (must be 2.
II, 6, 8, or 0)

I

t-----------Read1ng ~n
hundredths - for

1- When this code 1s displayed, set the function

switch to position

COftftENTS

FET~~

(prepare to enter data).

example at left
the value would
be 6 (digit 6
from the left)

2- Set the seter reading in the data switches
B, C, D, and E.
(For exaaple, the above
meter read1ng entered would be 11562. The
thousandths posit~on should be rounded-off
to the neI~ mark ~o reduce e=rors.)
the s~art pushbu~ton.

Press

+--------------

Pead1ng of
digit 5

t-----------------

Reading of
digit 4

3- After entering the first meter reading leave
the function switch set to DositioD 5, watch
for display code FX02 and observe the meter.
Th1S meter value should then
be entered into the data switches as outlined
above. Press the sta~ pushbutton.
3101

Display code to ind1cate that this routine
runninq (2 ain.).

&/A

\I/A

~s

FI02

ftanual intervention
code - CE should ente=
the meter value observed
under Ho. 3 above.

0101

The first meter reading
is updated by 0.034
and compared with the
second reading to verify
~hat

the run t1ae is

"/A

1-0110

II/A

The seter fail to run
correctly or seter
reading were DOt consistent.

A-e3 L2
A-B3 1!2

FFPF

CPO~6

1-040

CPO~7

FXOl was lle~ween 9.966 and
9.999 1DCluS1V€
a false error
viII be reporte~_
Rerm: tl;e te""
again.

~vo

minutes (0.034 in teras of
meter reading) •

1191

Warning: If
meter reading
ED't.ered unde::

Customer usage meter test
2 of 2
no other program levels
are act1ve and a level 3

1-040

~f

~nte=val

~1.er

in~errup~

occurs, the customer usage
meter should not run until
atter 8 ms has elapsed.
This rOUt1ne will mask off
all execution except the
~nterval timer and update
a real time type of count.
~be

CUSLo.er usage

.e~er

should DOt ruT. dur1ng this
=ou~ine.

FXOl

Same as FXOl above.

3102

Display code to
~b1S

indica~e

\1/:1.

H/J.

N/A

rout1ne is running

(1min.) .
PX02

CCU 1FT

Same as 1'X02 above.

X3705BU 1.23

IBa 3705 COaaORIC1TIOJS COITROLLBR
CORT30L DR IT 1FT S!8PlO~ IaDEI

D99-370~£-09

C~7BlL

ROOT. BRBOR POReTIOR ~BSTBD
CODE:
0101 The firs~ aeter rea~~g
is saved and c~apared
witb the second siDce the
me~er should DO~ run. the
two aeter readiDgs should
be equal.

1.24 13705511

EB!IOII Dl!:SCQPTIOIil

The aeter raD or aeter
readiDgs vere Dot cODsisteDt

SDSH!;'!!D CAIID
1.0CA TIOR Is)
1-83 1.2
i-B3 112

PROG

l!'ElLD

11151

PAGE
CP006
CP007

PPJ'F

Fnall
PAGE
1-0QC

COIIIIER'!'S

",

ceo Il!'T

Ie! 3705 C08!OIIC1TIORS CORTROLLER
CENTRAL CORT!OL ORIT 1FT SfBPlOS IRDBX
ROOT. ERROR FO.crIOR TBSTED
CODE
!~~iA! fRglg~t ~~g~ g2~!§

t!t9-3705E-09

BRBOB DB SCRIPTION

11k!

SOS~CTED

CABD
LOC1TIOI(s)

PROG
BASK

FEALD
PAGE

PETftt
PAGE

COSSEIlS

The f0110vinq error codes define failures of functions
previously tested by other rou~iDeS. Por each error
code 1 cross reference viII be qiYen ~o pOint to the
rou~ine ~at oriqina11y ~ested the. qiven function.

n

1111

1101

Force a Level 3 interrupt
via an oatpu~ 1'7C' to set
PCI L3

Level 3 interrrupt failed
to occur.

I/A

6-940

Rout1ne 1113
previously tested
this function.
Request rout1ne
'113 and verify
if PCI L3 will
force a L3 irpt.

1111

1102

Force a Level 2 interrupt
via an output to set diaq
::'2 irpt.

Level 2 interrupt failed
to occur.

I/A

6-900

The DCft set the
Level 2 aask
prior to 10ad1nq
a qiven 1FT. As
a result, Level 2
aust be una asked
before for-ainq
a Level 2 irpt.
Routine 1115 test
both the Onaaskinq
of L2 irpt and
aask1nq of L2
1rpt via an
OUtPUt to set
diag L2.

1111

1103

Force a Leyel 1 interrupt
via a~ invalid output
reqister 1'21".

Level 1 in~errupt failed
to occur.

!I/A

6-050

~outine

1116
previously ~ested
~his funct:'on.
Request rou-::ine
1118 and ver:'fy
:"f a Level ,
irpt can be.
forCEd via .an
:'n/ou':. check..

1111

1110

Set a qiven Storaqe
Key to 000.

Key failed

~o

I/A

6-0~O

See notes 2 and
5. Eoutine 1146
previously tes~ed
~his function.
Ban rouT.ine 1146
or 1156.

set.

6-880

1111

lXl1

Set a qiven Storaqe Key
to 001.

Key failed to set.

1/1.

6-040
6-880

See notes 2 aaa
5. Routine 1147
previously tested
this funcl::'on.
Run routine 1147
0::: 1156.

1111

1112

Set a qiven Storaqe Key
to 010.

Key failed to set.

5/1

6-040
6-860

See notes 2
and 5. Fou~ine
11~8 tested
T.his function.
Bun rout1ne 1148
or 1156.

1111

1113

Se~ a qiven Storaqe Key
to 011.

Key failed to set.

I/A

6-040
6-880

See notes 2 and
5. Rou':.ine 1149
previously tested
~h1S

function . .

Run routine 1149
or lISt..
1111

111~

Set a qiven Storaqe Key
to 100.

Key failed to set.

8/A

l11X

1115

Set a qiven Storaqe Ke!
to 101.

Key failed to set.

I/A

CCO 1FT

6-0ttO
6-880

See no~es ~ and
5. Rou~ine 114A
previollsl y testeil
this funct1on.
Bun roul:ine 114A
0::: 1'56.

6-0~O

See notes 2.and
5. Rout1ne 114B

6-880

:l:3705B11 1.25

-,

I~B 3705 COBBUNICATIORS COJtBO~J5
C!:NT5AL COlITliOL UBIT IP'l' ~IIIPI'
I/lIlJlI

BOUT. ERBOB !'UJC'fIOJl TESTED
CODE

099- 3705;;- 09

~.BOB DB~B~~IOJ

,,5 ~!=TBIl ClID
LOcl~IO\l Cal

PIOG
IIlSK

FEALO
PAGE

FETIIII
PAGE

COBIIEBTS

--

II'-

-)

prev~ously ~ested

'this fnnc"tJ..on.
Boc rou~iDe lll1E
or 1156.
1111

1116

Set a giyen storage ""
';0 110.

llIX

1111

1117 ' Set a giYen Storaglt ley
~o 111.

1120

Set a giYen Protect Key

•• , taile4

to

ae~.

R/l

6-0110
6-880

It.,

See notes 2 aDd
S. P.ou~ine lHe
previoosly ues;:e.:l
this fooction.
Bon roo tine nqe
or 1156.

to .et.

B/A

6-0QO
6-880

See notes 2 and
Bout1ne 11110
previoosly tes;:ed
this function.
Ron routine
11110 or 1156.
See notes 2
and 5. BoutiDE
l111E tested
th1s fllnction.
Run rou.tine l1JiE
or 1156

fdle4 to aet.

B/A

6-0110
6-880

ley failed to set.'

B/A

6-0110
6-880

~e,

";0 000.

lUX

1121

Se~
~o

a given prOlle"" !l.ey

,fa~lllol

001.

5.

See noues 2 and
Routine 1111l'

5.

previously tested
this fonctior:..
BUll rou~iDe l111P
or 1156.

,'XX

1122

Seu a 'liveD Protec;:

';0 010.

Ie'

'Key faUed

1:0

JI/A

se';l

6-0110
6-880

See noues 2 and
Pootine 1150
previously uested
this foncuion.
5.

Run rou't.l.ne 1150

ll1X

l11X

1123

lX211

or 1156.

Sel: a given Prot4lC;t ley
";0 all.

"lI,

fa~llU1 to set.

H/A

Se't a given Prote::t. Ie,

ley faUe~ to flet.

,leJ: failed

6-0110
6-880

See notes 2 and
Rootine 1151
previoosly testeCi.
';bi.s fonction.
Bon roo-::ine 1151
or 1156.

H/A

6-0110
6-880

See noues 2 anil
5.
Roouine 1152
previously tes;:ed
this func't.~or,.
Run routine 1152
0= 1156.

B/A

6-0110
6-880

";0 100.

l1XI

1125

Set. a giYell
';0 101.

Pro~ect

"itT

~Q

. . ~.

5.

See notes 2 and
Boutine 1153
previously ~es~ed

5.

'!his fUDctioI!.
Bun rou~iDe 1153

or 1156.
lUX

1126

Set a given Proteot Key

~ey

H/!

failed tD se-::.

6-0110

llIX

lUI

1X2"'1

2X 11

Set. a given
";0 111.

RoutinE 11511

previoosly 'test.ed
this fonction.
!lon routin .. 11511
or 1156.
Protect F,fIY

Soo=oo-::ine -::0 b"nl1:l·e
interrup-:.s.

~vel

1 level , l,nte=upt bas
ocourred and ";bere are
no CCO I!::.ts Oil :i.p e:'.hll;:

cao

~heck
~lIte:;;rUpt

reg

See notes 2 and

H/A

ley faileol to Set.

1"711'
1'7F'

1.26 X 37 05B;';'

See notes 2 ani!
5.

';0 110.

0=

11/-'

B/A

B/A

Bou'!:ine 1155
previoosly 1:.ested
this fonction.
Son rout.ine
1155 or 1156.

6-880

5.

6-8110
6-850

bas

Register 1'05'
8

du••!

bits-in-error

data 1'9999'.

rell grp 1.

cell 1FT

~

"

IE" 370S COSBURICATIORS CORTEOLLER
C!JTnL COITROL uaIT 1FT S!IIPTOII IBD~

01

lOUT. ERIOI FURCTIOI TESTED
CODE

D99- 370SE- 09

EIBOE DESClIPTIOR
All level 1 interrupts shOUld
occur as a result of a CCU
type error.

11Xl

2112

Subroutine to handle Leyel 1
!.nterrnpts.

SDSPECTED CARt
LOC1TIOR(s)

PROG
BASK

A level 1 interrupt bas
R/A
occurred due to sooe bit in
ei~ber interrupt req qrp 1
(X'7F) and/or adapter interrupt
req qrp 1 & 2 (X'76' & X'77')
The CCDIFT leyel 1 subroutine
resets all forced Cco interrupt
conditions and deter.ines that
all bits cannot be rese-e.

I/A

FEA~D

PIGE

FETltIl
PAGE

COIIIIERTS

6-810
6-820
6-860

legl.ster X'OS'
viII contain bl.ts
thaD cannot be
reset.
If any adapter
21 bits are on,
tbey .ust be •
.anually reset
before pressl.ng
s~art to con~inQe.

11Xl

2113

Subroutine to handle Leftl 1
!.nterrapts.

A level 1 interrupt bas
occurred due to a CCU level 1
interrupt. Tbe CCOIFT leyel
subroutine attempts to reset
the level 1 interrupt
conditions and determines
tbat all bits cannot be reset.

A-8312
l-B'JD2

I/A

CPI)OS

6-090

Register X'OS'
viII contain tbe
'or' of tbe CCD
cblt req 1'7D'
and irpt req
grp 1 X17E'

llXl

2Xl.

Subroatine ~o handle Leyel
interrup-es.

A level 1 interrupt has
occurred and tbe routine
under test did not expec~
to force a Level 1 irpt.

a/A

1/1

CK006

6-090

lIegister X'OS'
viII contain
the 'or' of
~e CCII chit
req X'7D' and
irpt reg grp
1 X'7!'.

a/A

a/A

a/A

6-090 IlilE!gister X' 05'
6-810 bas a dnaay
6-820 -bits-in-error
6-860 data 1'9999'
Display tbe
folloving
c.egisters to

Tbe irpt occurred due to
a CCU error.
1111

2X1S

Subroutine ~o
interrupu..

handl~

Level 1

A level 1 interrupt has

occurred· and tbe routine
under -eest did not e%pec-e
to force a level 1 irp~.
There is no~ any ceu error
~i~s on; as a resul~. ~he
irpt DUst be due to ei~her
a channel adapter 0= CS8
request.

aeterlline 'the

cause of the L1
-irpt:
X'7P' irpt reg
qrp 2
X'76' adpt req
grp 1
X177' adpt req
grp 2
If any adapter
bits are on,
tbey aust be
manually reSct
before pressing
s-eart to
-continue •
.,..

.

llXX

2121

lUI

2122

lUI

2123

1111

2X211

Subroutine to handle Level 2
interrupts.

"Diag L2" irpt reg bit
failed ~o reset

A-83112

I/A

CD01.

6-0S0

A level 2 interrupt bas
occurred and tbe "diag L2"
bi~ is not on in tbe interrupt
reg grp 2 (X'7F') - vben
running the CCUIPT's a!l
level 2 interrupts sbould
result froD Diag L2 bi~.

II/A

a/A

R/A

6-8S0

Register 1'05'
vill contain
irpt req grp 2
X'7F'

Subroutine to handle Leyel 2
interrupts.

A level 2 interrupt bas
a/A
occurred and eitber tbe Type 1
eSB L2 and/or Type 2 CSB L2 bits
are on in adapter req grp 2
IX'77') - The CCUIFT level 2
subroutine has atteop-eed to
reset by resetting all forced
CCU error conditions.

R/A

CX003

6-820

Register X'OS'
viII contain adpt
reg grp 2 X' 77'

Subrou-eine to handle Level 2

A level 2 interrupt has
occurred and the routine
under test did not expect
~o force a level 2 irp~.

I/A

I/A

6-090

Ji,egister X'05'
It'as a duaay

Snbrou~ine

interrupts.

interrupts.

CCO IF'!

~o

haudle Levei 2

R/A

b.i ts-in -err or

data 1'9999'.

X370SBAA 1.27

IE! 3705 CO~ftURICATJCIS CORrROLLYB
CYlrPlL COBf30L UlIT IPT SYBPTOB ZIDEI
ROUT. ERROR
CODE

~OICTIOD

TRSTED

D9q- 37'l5E- O?

EaRoa DESCRIPTIO.

SOSP.!CTED CARD
LOCAtIOI(s)

PROG
BASK

FRALD
PAGE

FET!P.
PAGE

COBftEITS
D1splay reg1sters:
ll'77' adp-: reg
grp 2 X'77' irp~
reg qrp 2

~ 0

deteraine

~

be

caUSE of ..t:he
L2 up't.

1111

2131

Subroutine to handle Level 3
inte=upts.

A level 3 interrnpt has
A-5352
occurred via a PCI L3 interrupt
(X "C'). The level subroutine
atte.pts to' reset the PCI L3
inte=upt but fails

B/A

1111

2%32

Subroutine to handle Level 3
interrupts.

A level 3 interrupt has
occurred and neither
the PCI L3, timer L3,
nor pushbutton L3 bits
are on. All Level 3
interrupts that occur
should result fro. one
of the above conditions.

1/1

I/l

1 level 3 interrupt has
occurred and either the Type I
CA L3 and/or Type 2 CA L3 bits
are on in adapter reg grp 2
(1'77') - The CCOIFT level 3
subroutine has atte.pted to
reset by resetting all forced
CCO error conditions.

N/A

lUX

2%33

Subroutine to handle Level 3
:'nterrup'tS •

COOlS

6-940

Register X'OP'
du ••y
bits-in-error
data X' 9999'

bas a

Register X'OE'
contains adp";
reg grp 2 X'77'.
II/A

CP005

6-820

Reg1s~er X'OS'
CCD'";.a:.r:.
adpt req g=~

will

2 X'"77'

If any

aciap~er
O~r

bits are

they .Us"; be
manually rese~
before press::,n~
s't.a=~

"to

cont:..nue~

l11X

2X34

Subroutine to handle
level 3 interrupts.

1 level 3 interrupt has
occurred and the routine
under tes~ did not expect
to force a L3 irpt.

I/A

II/I.

P/I.

6-090

The timer L3 and pushbutton L3 interrupts are
expected at all times.

l1XX

21Ql

Subroutine to handle
Level II in~errupts

reqister %'11'
adpt reg gr~ 2
to determine

if a channel
adapter L3 irp-o
reguest occurred.

J PCI LII or SVC LQ
irpt has occurred. The
SLV4 atte.pts to Eese"
either or both but
determines that one or

both

canno~

Register X'OD'
has CCO ~rp";
reg grp X'7!"
loaded. Ir.
addition d1splay

II/A

COOlS

6-090

be reset.

Pegis~er X'lS'
contaiL ~ne 1IP~
reg tha~ can:lc-:
be rese"

Byte 0

B~+

7

Bl,~

7

PCl Lq
By~e

t

SVC L4
ttl!

2X42

Subroutine to handle
Level II interrupu;

1 Level II irpt has
occurred and neither
the PCI L4 or SVC L4
bits are on in X'7F'.

R/A

II/A

COOlS
CP005

6-860

Begister X' 15'
has a dUllay bi-oF1n-error da't.a.
X'9999' •

If any

adap~e::

bits a=e

011,

tiley .us":. be
manuall y rese"":
tefo~e
sta~-:

pzess;,ng
"':.0

c02:.~inue.

1.2d

13705B1.1

CCO IF7

IEM 3705 COMn"Nl:~~rONS CONTROLLEF
CrITp.AL CONT~OL ON IT IPT Sl!PTOM INDEX
R~OT.

EEROR PUNCTION

TESTE~

ERROR DESCRIVTIOH

SOSPECTE!; CARn
LOCAtIOIi (5)

CODE;
1UlI:

2XII3

Sni;>rontl.ne ~o hand.le
Level 4 2nte==upts.

1 Level 4 ~n,e=ropt has
occo==ed and the rou~'ne
under tes~ did Dot expec~
~o force a 111 iD~rpt.

N/l.

PBCG

YEALD

!'ET~I\

IIASK

P&G"

lin

H/A

T?AGE
6-090

CO~r.fll~

s

Reg::.s-::er X""
nas a dummy L.l'":.51D- er:-or

da t.a

X'OOOl' •

Display register
1'71'; ceo IF.P~

reg

g=r

1.

Byte 0 Bit 7
PCI L4
Byte 1 Bit 7
SVC LII

n

u

:::U 1FT

X3705B11 1.29

-----------~--

__ J
IE~ 3705 COft~UNICATIOHS COHTROLLEB
CENTRAL COHT~OL URIT 1FT SY8PTOft IN~EI

D99-3705E-09

ROUT. ERROR ?UNCTION TESTED
ERBOR DESCRIPTION
CODE
HOTE 1: Since the error forcing circuitry has not been previously
of ~he same rou~ine has been run without failnre.
NOTE 2:

tes~d,

SUS'ECTED CARD PROG FEALD FETaa COaaEBTS
LOCATION Is) aASK PAGE
PAGE
bypass this error code until code 0002

For all of the above Storage Protect Testing routines. regis~er X'16' for error display has special mea~ng.
i!g X'16' will contain the data that was used to output to i@9 X'73' (SET KEY). Th~s will allow the BLOCK
Address to be displayed as ~lustrated below.
See routine 1156 for set~in9 up a loop on a given storage or protect key.

For storage size of 256k or less use
Q!!TPUT_!.!.U!.

~he

following chart.

aL!ll

BYTE 0, 0

SKA
SKA
SKA
SKI
SKA
SKA
SKA

1

2
3
II

5
6
7
BYTE 1, 0

BIT
BIT
BIT
BIT
BIT
BIT
BIT

••
•
•
SBtECT

1

2
3

SET
KEY
KEY
KBY

II

5
6
7

• BYTE _ _BYTE
_0_____ _

0 --------------(G)
1 -----------~--(3)
2 --------------(J)
3 --------------(K)
II or PKA BIT O--(L)
5 or PKA BIT 1--(!)
6 or PKA BIT 2--(1)

_X_

o

II
GB

JItLIIN---

123 II 5 6 7

I I I I I I I I

KEY
- BIT 0
- BIT 1
- lIIT 2

1=SKA
l=SET

--,------012311567
I I I I I I I I

Use this chart to convert
block nuaber into address
range and vice versa.
EXp.

ItBY ADlI

BYTE

67

D=PItI

If no key address bits are
on. then the block nuaber
in question is zero and
covers the address range of
0-11097 bytes.

For storage size greater than 256k use the following chart.

BYTE 0, 0
1
2
3
4
5

SII:A BIT 0 --------------lIeserved
SII:A BIT 1 --------------Reserved
SItA BIT 2 -----------lIeserved
SItA BIT 3 -------------(G)
SItA BIT II or PItA BIT 0-- (B)
SItA BIT 5 or PItl BIT 1-(J)
SItl BIT 6 or PItA BIT 2-(K)
SKA BIT 7 --------------(L)
SItA BIT 8 --------------(8)
SKA BIT 9 - - - - - - - - - - - - - (N)
SII:A BIT 10 - - - - - - - - - - - - (0)
SELECT KEY ADR
O=PKA
'=SKA
SET KEY
l=SET
KEY - BIT 0
KBY - BIT
KEY
BIT 2

6

,, ,
7

BYTE

0

2

3
II

5
6
7

BY!!
• BYTE ___
2.-_ _ _
_ X_
• 567 012311567

• III
GBJ

I I I II I I I

KLIIIO--Dse

I I I I I I I I

tD conver~

Exp.

If no key address bi~s are
on, then the block nuaber
iD

question 1S zero and

covers the address range of
0-11097 bytes.

NOTE 3:

The first two S~orage Block Keys are not changed but are allowed ~o reaa1n set to 000. Th1s
yill allow the dire~ addressable areas. the DC! control module, and ~e CCUIFT interrupt and
subroutine areas to be addressed without Protection checks.

NOTE 4:

Only

NOTE 5:

Use the following chart ~o determine the first suspected cardls).
the failing bi~s in aEG X'1S' (Bi~s in error) •

~hree

012311567

block number in~o address
range and vice versa.

,

-

~his char~

BYTE_______ _
_..1

of the ava1lable settable Protect Keys are currently used.
%he table should be keyed off of

BIT IN ERROR
I
PAILURE
I
PONCTION
I
CARD
I
LOGIC PAGE
_IDllL!.!..l:i! _ _ _ 1 ________ L ___.!!::!H1ID..___ L...-_____L..--_ _
Byte 0,

Bi~

0

0, Bit 0
0, Bit 1

0, Bit 2
NOTE 6:

I
I
I
I

I

I

By.e I 20 bit1
Byte 1 18,201
Byte 0
I
Byte'
I

UU,
ALU,
ALU,
ALU,

ARBG,
AREG,
AREG,
AREG,

BREG
BREG
BREG
BREG

I
1
I
I

I

A-B452
A-BIIJ2
&-BIIlC2
&-BU2

Use the folloYing chart ~o determine the first suspected card IS).
in Reg X'lS' (bits in error).
BIT IN BRROR
PAILURE
FONCTION
CARD
___ .J.I ________
LI ____________
LI _____
I
I
I
Byte 0, Bit 1
I Byte 0
I
SDP.
I I-B4~2
0, Bit 2
I By~e 1
I
SDR
I &-BII&2

_l!l;i..!.!.l~_'

ROTt: 7:

1.3~

13705BAA

Use ~he following chart to determine the first suspecte1 card(s).
in !leg X' '5' rbi~s in error).

I
I
I
1
I

DE976
DF976
DG976
DK976

Key off of the failing bits
I ______
LOG~C PAGE
_

~_L

1
I
I

DP993
DR993

Key off of the failing bits

CCU 1FT

o
o

Ie! 3705 CO!ftOBICATIONS CONTHOLL!!
CEITBAL COIT90L UNIT IPT ~t"prO! X.DEI
BOUT. BBBOR PUBCTION TBSTED
CODE
BITS II BiROR

D99-3705r-09

BiROB DESCRIPTIO.
I

PArLUB!

I

PUBCTIp.

I

SOSpeCTBD CAED paOG PE~LD
LOCATIOB(s)
BASK PAGE
I
LOGIC PAGE

PET!!
PAGE

CO!!EN~S

CABO

__!J!LI!!2_'---...J.--_..-..__-L-___-r_--_l. __________ L _______
Byte 0, Bit 0
0, Bit 1
0, Bit 2

ceo 1PT

I
I
I

I

Byt:e I
Byte 0
Byte 1

I
I
I

,

Sll!
SA9
SAl!

I
I
I

I

l-BqD2
A-BqD2
A-BIIC2

I
I
I
,

CYOOl
crOOl
»5001

13705BAA 1.31

If" 3705 COBnUNICATIONS CONT30LLER
C~TRAL CONTROL UNIT 1FT SYftPTOB INDEX
RCUT. ERROR FUNCTION TESTED
CODE

1.32 X3705BAA

D9 9- 37 05 E- 09

EREOR DESCRIPTION

ClED
LOCATION(s)

SUSPEC~ED

FROG
BASK

FEALD
FAGE

FET!!
PAGE

COBBENTS

CCU

:r~

o

lEft 3705 COftftU.rCATIONS COITROLtEB
S~ORAGE 1FT SY!PTOB IIDEX

D99-370!SE-09

CHAPTEI 2.0: STORAGE 1FT SYIPTOft INDEX
Bon";ine 1:

Reuti-ne
Beutine
Beutine
Routine
Beutine
lou'!:ine
Rontine
lontine

2:
3:
4:
5:
6:
7:
8:
9:

Bout.ine
Rontine
Bout.ine
Boutine
Reutine
Boutine

10:
11:
12:
13:
14:
15:

Rentine 16:
Reutine 17:

Addressability (Bridge onlJl
Address Analysis (Bridge onlJl
Address capability (Bridge only)
Address Exception (Bridge only)
~andoa Addressing (Bridge only)
Coapleaent/lecoapleaent (Bridge only)
Varied Tiaing Repetition (Bridge only)
Balf SeleC'!: Repetit.ion (Bridge only)
lorst. Case and Schaoo (Bridge only)
(See Special Purpose Boutines)
Single Bit Error Correction (FET only)
Donble Bi'!: Error Detection (FET only)
Bus OUt Parity Test (FET only)
Address Exception (FET onlJl
Double Bit Error Test (FET only)
~orst Card Analysis (FET only)
(See Special Paspose Routines)
Address Failure Analysis (FET only)
Addressing Capability (FET only)

SPECIAL PURPOSE ROUTINES DESCRIPTION
Reutine 09: Can be used for schmoo teSt (Bridge only)
Routine 15:

~orst

card analys1s, problea definition (FET only)

This description provides a reference to the 1FT routines that have special purpose. These rontines can be seleC'!:ed
via a single routine request.; they caD also he selected in sequence with the other rout1&es by setting the CX Sense
switcc to run the .anual intervention routine Crtn. 09), or problem definition Crtn 15).
This description serves only as a guide into the .ore de'!:ailed symptom index and does not describe the error st.ops
or Ranual in.i;erYelition stops for t.hese ron"tines.

1215

o

~outine 15 can be rnn by sett.ing the SSW for problea defin1tion, or by making a single routine request
for 15, at IPT selec'!: time. This rt.n is designed to be run after rtn 14, when a double bit error was
det.ected by rtn 14. This will cause only the 32K ie which the double bi'!: error resides to be tested. A , vorst
card' in the address ranqe being tested will be indicated if a double bit error vas detected by rtn 14. This
rou~iLe is for FET storage only.

!.!!apte~ £!!!!§U!!n~

3705 storage rou'!:~nes are executed independen'!:ly on each BS! (or adapter) except the BSB addressability routine which
be execnted on all BS!s simultaneously for a valia test.. Errors are detected and displayed by the DCI as
established by DCB-IFT convent.10ns.

mus~

If FET storage is installed, t.he entire storage array 1S considered one BSB.
~~~~~~ !~~!I2!§

Because a printed list of errors is not available, ~he recoaaended failure analys~s procedure is '!:o record the erro~
cond~tions and cortinue to the nert error until a failing pattern is established, such as, Single data bit, BSB decod6,
address decode, etc. Refer to page 1-010 in the FET!I, SY27-0107, to assist in relating failing pattern to component
lccation.

When FET is installed, errors i~ storage support circuit.s can appear
an array card error is indicated by diagnostics, suggested procedure
ru~ the same diagnostics again.
If the error indicat.ions remain the
support circuitry (FET!!, SY27-0107, page 7-260). Error indications
Symptom Inder:
Reg X'13'
Reg X'1Q'
?eg X'15

1

!leg X'1E'

as array card Errors when diagnostics are rnn. If
is to swap the indicated card with another one and
same, panel procedures should be used to test the
are as follows unless eoted otherwise 1n the

failirg Address
actual da~a received
failing data bits or
expect.ed data

All routines ercep~ worst case rou~~ne se~ bypass CCU check stop mode during the test ~o allow an error display ins~ead
o~ a harastop.
1 wo=s~ case routine does not set. bypass C=U check stop because parity errors aust be detected by a CCP
check rather than dat.a ver1fica'!:ion. Set the DIAGROSTIC CORTROt sW1tch to BYPASS CCU CHECK STOP position for ar e=ro=
disrlay of data bi'!:s if des1red.

S'rORAGE Il'T

X3705CAA 2.1

3705 COftftUIICAT~ONS CONTROLLER
STORAGE ~FT StftPTOft ~NDEX

~2ft

ROUT. ERROR PURCTIOR TESTED
CODE
~!il!1.22

D99-3705E-09

ERROR· DESCRIPTIOB

SUSPECTED CARD
LOCATIOR(s)

PROG
ftASK

FEALD
PAGE

FET!ft
PAGE

COftftEBTS

lUi

The schmoo test is accoaplished by setting DIAGNOSTIC CONTROL sv!tch to BYPASS CCU CHECK STOP and set DCft sense sV1tches
as follows:
1.

2.
3.

Bypass Jew Error Stop Bypass Error Stop
cycle on Request

Byte 0, Bit 7
Byte 1, Bit 4
Byte 1, Bit 3

Errors can be detected by observing the CCU check 1ight on tbe control panel.

X2Xl

1X01

~nitialize

snbrontine Provides inforaation needed
in routine coaaunication
table and verifies correct
CDS storage configuratio~
on 1st execution after
being loaded.

Configuration data is nat
equal to aachine data. Verify
BSft count in CDS. CDS data
should agree vith hardware
~nput X'70' storage size.

6-770
4-070

Reg X'14' =
data derived
from CDS.
Reg X'16' '"
data froa
Input reg
X'70'.

i2XX

2X01

1.1 interrupt handler
subrontine - Error 1
verifies that a level
interrupt has been
caused by address
exception condition
in the address exception
routine.

Unexpected 1.1 interrupt
encountered. Address
exception expected other interrupt bit(s)
also on. Flag stored
by the address exception Toutine
should'" Input reg X'7!'.
(Interrupt Request)
,
Definition of Unexpected bits:
1.0 - Address compare
1.2 - ~n/out check
1.3 - Protection check
1.4
Invalid op
1.6
IP1. level 1 reguest

6-090

Reg X'04'
interrupt
request bits
froll Input

Leve11 interrupt handler
subroutine - Error 2

A leve11 address exception did not
occu= at expected instruction
in address exception routine.

6-050

X2XX

'X2XX

2102

2103

1.1 interrupt handler
subroutine - Erro= 3
verifies that address
exception condition can

X'7!'. Bit 1.1

expected.
Reg 1'06' =
expected data.

Reg X'O~' '"
adr of in~
following the
'One causing
the level 1
interrupt.
Feg X'06' =
adr of inst
fo110ving the
that should
have caused
in.terrupt.

Address exception bit failed
te reset after the expected
address exception condition.

6-050

Beg X'7E' bit 0
vas set by address
exception but
could net be
reset.

BSft addressability
Verifies that each 8Sft
can be addressed properly.
Coapleaent of the data is
tested to provide a basic
sense aaplifier test.
This Boutiue runs on bridge
storage only.

Incorrect 85ft data in 1st
ha1f-vord 'Of last fnll-verd
address of BSft under test.
BS! decede 'Or sense aaplifier
failure.
8yte 0
number 'Of 8SKs in
aachine and byte 1
BSft
addressed.

7-010

Suspect the
sense allp if
errer OX02
does not
occur, BSlI
decode if
errer OX02
occurs.

BSft addressability
Ref to error code OX01

Incorrect BSft coapleaent data
at 1ast half-vord address
of BS! addressed. BS! decode
or sense aap1ifier fai1ure.

7-010

Byte 0 ~
compleaent 'Of
number BS/!s
in aach1ne.
Byte 1 =
cemp1eaent of
BS/! addressed.

be reset.

X201

OX01

OX02

2.2 X3705CAA

ODe

=

=

STORAGE IF'!

o
o
IBB 3705 COBBUNICATIONS CONTROLLER
STORlGE 1FT SYBPTOft IBDEI

D99-370SE-09

ROUT. ERROR PUBCTION TESTED
ERROR DESCRIPTIO.
SUSPECTED CU.D PROG
CODE
LOCATIO. (s) BASK
1202
Address analysis test - solid address £ailure.
This routine test the ability to store aud display each address.
The failing address bits are saved to provide a £ailing
address pattern.
Use the diagram below to £orm the £ailing pattern from the indications in both
error code 0101 and 0102 as follows:

FEUD
PAGE

FE'l'ftB
PAGE

COft II EIlTS

0101 - Pailing pattern bits on are saved as l's in register X'1S'.
0102

Failing pattern bits of£ are saved as 1's in register X'1S'.

1 address bits that are not replaced in either error display vere
not consisteutly on or off at the tiae of £ailure. Y bits in the
diagraB do not affect the addressing within a 8Sft.
This Routine runs on bridge storage only.

L I - I ! LL.L! LL..l LL! LL! 1
I
I
I
I
I
I
I
I
I
I 16K
I
I Select I
I
I

85ft
Select

I
I
I

I
I
I
I
I
I

Low Y
Decode

I
I
I
Low 1 I
Decode I
I

Hi Y

Hi 1

Decode

Decode

I
I
I

Bot

Dsed

OXOl

Address Analysis.
Individual £ailures are
not displayed, but the
bits that were on at the
ti.e of the failure are
saved for a co.posite display
of the co.mon bits that vere
on in the failing address
pattern.

Solid address failure.
Replace l's in the diagram
vith 1's for the bits in
register X'1S' that are on.

Register X'lS'
is a composite
of the failing
address. Ignore
reginers X' 13'
X'1Q', and 1'16'.

OX02

Address analysis.
Individual failures are
not displayed, but the
bits that vere off at the
ti.e of the failnre are
saved to form a composite
display of the coamon bits
that were off in the failing
address pattern.

Solid Address £ailure.
Replace X's in the diagram
with D's for the bits in
register X'1S' that are on.
Ignore the lov order bit in
register X'1S'.

Register X'1S'
is a composite
of the failing
address. Ignore
registers X'13'.
X'1.', and X'16'.

1203

OXOl

Addressing capability.
Routine runs on bridge
storage only.

Address data is not equal
to the address. can be data
bit failure or address decode.
Address decode failure
causes au 'overlay' condition
in vhich one of the affected
addresses is not addressed.

7-010
7-030

Data sbould
eqnal to 16
bit address.
Establish
pattern to
determine
whether data
or address is
failing.

X20Q

0101

Address exception
Verifies that address
exception causes
correct indications.
~his Rontine runs on bridge
storage only.

Pailed to cause program L1
check iuterrupt in address
exception routine. A level
interrupt sbould have occnrred
because an attempt to store
data a~ an invalid address.

6-050

The invalid
address is in
reg X'13'.

X20S

OX01

Random addressing
Address is stored as
data in non-sequential
operation then verified.
~his Routine runs on bridge
storage only.

Address data not eqnal to
the 16 bit address.

7-010
7-030

Data should equal
to the low order
16 bits of its
address.

STORlG!! IPT

This

D105CAA 2.3

XEft 3705 C08ftDBXCATIONS CONTROLLER
STORAGE XFT SyftPTOft INDEX
BOOT. EBBOB FUNCTION TESTED
CODE
X206 OX01 COllplesent/recosplesent
This Routine Runs on bridge
storage only.

~07

X208

X209

D99-370SE-09

ERROR DESCRIPTION
Data pattern failure. Pattern
is stored then verified.
Data in reg X'14' should
eqoal pattern in reg X'16'.

SUSPECTED CABD
LOClTXOHls)

PBOG
ftASK

FEALD
PAGE

COIIIIEHTS
),

Y

OX02

Coapleaent/recoapleaent
Above pattern is coapleaented. stored. then
verified. Ezpected data=
coapleaent of pattern ••

Coaplement pattern failure.
R111=Beceived
B1S-Bits in error
Ji6=EJ:pected

7-030

OX03

Coaplement/recoaplement
Above coapleaented pattern
is re-coapleaented. stored.
then verified. Shoold be
eqoal to the pattern.

Becoapleaent pattern failore.
1!' ...Received
1!1S=J!its in error
Ji6=:!zpected

7-030

or01

Varied repetiton
X'FFFF' is stored
in the BSft being tested
and varie~ after a
60~ aicro sec. delay_
This Rootine rons on bridge
storage only.

:tncorrect data-600 aicrosec
delay after store.

7-030

OX02

Varied repetition
Bef Error Code OX01

Incorrect data -- 3 sec delay
after store.

OX01

Continoed.repetition
Addresses-are selected
diagonakly in array to
be beat 32 times with
pattern. Balf selected
cores on the saae X and
! drive lines as
the selected addresses
are tested. This Rootine
rons on ~~idge storage only.

:tncorrect data - X Drive Line.
Increaenting Y drive address
to test X drive line cores.
X drive line sase as selected
'beat' address.

7-030
7-020

Refer to 7-010
for drive line
relationship
to failing
addresses.

OX02

Continoed repetition
Bef error code OX01

Incorrect data - I Drive Line.
Increaenting X drive address
to test I drive line cores.
I drive line same as selected
'beat' address.

7-020

Saae as error
code OX01.

OX01

Worst case.
Generates 'worst case'
pattern in core then
verifies data. Pattern
is reversed to change
parity. ~est is ron
in check·stop aode to
detect parity bit
failures. Xf DCft error
codes are desired. set
DIAGNOSTXC CONTROL Switch
to BYPASS CCD CBECK STOP.
For SCBftOO testing reference
1FT heading. This Routine
runs on bridge storage only.

Failed worst case pattern
When CCU check occurs. set
DXSPLAI/FUNCTIOB switch to
STATOS to determine failing
data byte. Coapare ezpected
and actual data to deteraine
failing bit. Note tha~
parity is not indicated. but
can cause failure.

7-020

Worst case
pattern is
generated on
a core pl.ane
basis. Bits on
a core pl.ane ..
11001100.
coapl.ellented
each 11096
bytes. Varioos
data val.ues
are osed to
generate
this pattern.

2.11 X3705CAA

STOBAGE 1FT

I

o
o
o

lEa 3705 coaaOIICATIONS COITROLLER
STORAGE IPT SYSPTOe INDEI
ROOT. ERROR POICTIOI TESTED
CODE
Single bit error correction

D99-370,E-09

ERROR

DESCRIPr~OI

X210

SDSPECTED CAilD
LOCATIO I (sl

PROG
SASI

PEALD
PAGE

PEUS
PAGE

COSIIENTS

'tes~

~his rontine tests the
abili~y to detect and

correct a single
bit or check bit error
in storage. An error
is forced via the
diagnostic register
for each of the data
bits and check bits
in both the on and
off condition. The
results are tested
to verify that the
bit vas corrected.
An error in this
routine could be
caused by storage
support circuitry. See
i l l 3705 £2!l!l1!];£!'UOIS
91!!1!Q1J.I!! THEORY
IIAIITENANC~ SANDAL,
SY27-0107. page
7-260. This
routine runs on
PET storage only.
OXOl

Single

error correction.

Pailed to correct single bit
error. Error vas forced via
the diagnostic register.

7-220

R11J=Actnal data
R15=Bit in error

0102

single bit error correction.

Failed to correct single
bit error in co.ple.ent
pattern. Error vas forced
via the diagnostic register.

7-220

R14=Actnal data
R15=Bit in error

0103

:lata bit error. !!rror(sl
already exists in storage.

Dnable to verify single bit error
correction due ~o error(sl already
existing in storage at several
addresses.

7-220

R14=Actual data
R15=Bit in error

OX 011

Check bit error. Error(s)
already exists in storage.

Dnable to verify single hit error
correction due to error(s) already
existing in storage at several addresses.

7-220

Rll1=Actual data
R15=Bit in error

pailed to detect a double
bit error. ceo cbeck
register I'7D' should
indicate SDR check.

7-220

R13=Data address
R14=Actual b1ts
frOB cel:
check reg
I'7D'
R15=CCO cbeck
reg. b1ts
in error.
R16=Data stored

bi~

Double bit error detection

1211

'test

This routine tests the ability
to detect a don ble bi~ error
and provide the correct error
indications. Double bit
errors are forced via the
diagnostic register. This
routine runs on FET storage
only.
0101

STORAGE IPT

!louble bit error detection.
Problea aay be ECC card or
other storage support logic.

I3705CAA 2.5

IE! 3705 CO!3UNICATIOBS CORTROLLER
STORAGE 1FT SY!PTO! IBDEI

D99-3705E-09

ROUT. ERROR FUBcrIOR TESTED
ERROR DESCRIPTION
CODE
][212
Bus out parity-store
zero test
~his routine forces bad parity
on CCU bas out via output reg.
%'78' to verify that
if a bus out check occurs,
zeros are stored in storage
and a double bit error
condition is indicated
'to the CCO _hen that address
is read. This routine runs
on FET storage only.
0101

Bus out parity

0102

Bus out parity.

'SDR check not indicated.

,,;Stored data not equal
to zero with forced
bus out check.

SUSPECTED CARD
LOCAtION (s)

PROG
!ASK

FEALD
PAGE

FET!!
PAGE

CO!!ENTS

7-220

R13=Test address
R14=Data Bead from
test address
should=X' 0000'
B1S=CCU check reg_
bits received
should contain
SDB check.
R13=Test address
R15=Beceived data
should =1'0000'
R6=Stored data

Address exception test
This routine tests ability
to generate an address
,exception Ll interrupt
or fold condition in which
the data is stored in
address zero. Flags are
set to indicate to the Ll
interrupt handler subroutine that an address
exception Ll Interrupt
is expected. The interrupt
or fold should occur during
an attempt to store into an
invalid address. This routine
runs on'FET storage only.

1213

0101

CDS.input 1'70' compare

0102

Address exception or fold
For 6nK or 256K • • ax. addr.
+2=addr. 0 or fold. For any
other Storage size,
max. addr. +2=
addr. excep.

2.6 13705CAA

Bumber of 32K increments
derived from CDS and input
1'70' do not compare.

Failed to indicate
address exception or
-·,,£old. Address exception
should occur except
for 6nK or 256K. in
which cases the address
should fold to zero.

Rln=Bumber of 32~
increments. taken
from CDS data.
after one shift
left and should
compare with
input X'70·.
Ex: 611K
in CDS=8200,
after one
shift left=OnOO_
611K in 1nput
1'70=01100.
B15=Bits in
error. R16=
Input X'70'.
R13=ftaxi.um valid
address determined from input
X'70' •
R111=Data Read fra.
Address zero.
Should be zero
due to fold
condition

STORAGE IFT

IB~

3705

CONTROLLER
IBDE!

COft~UNICATIOIS

STORAGE IFT

SYBPTO~

D99-3705E-09

BOUT. ERROR PUICTIOB TESTED
ERIOR DESCRIPTIO.
CODE
:1214
Double bit error pattern
test.
This routiue stores, loads and
tests a pattern. its coapleaent
aud its recoapleaent. ~vo
patterns are used to proYide
bit Yariation. 10 errors are
forced y18 the diagnostic
register. If a double bit
error occurs. a test is aade
to deteraine if both bits
in error are on the saae card,
in which case the card is
identified. If the bits in error
are on both cards of a pair,
inforaation is sayed for worst
card analysis routine '15.

SUSPECTED CARD
tOCATIOI(s)

PROG
aASl

FEALD
PAGE

FET~B

PAGE

COB BENTS

Pattern 1 = 5555/AAAA
Pattern 2 = 8001/1PPE
This Routine runs on PET
storage only.
OI01

Double bit error

1 double bit error has
occurred and both errors
haye been determined to
be in a single array card
as identified by reg X'15'
displaceaent Yalue.

7-220

R13=Pailing addr.
R1S=Displacement
into worst card
table (See note
1 rtn '15)

OI02

Double bit error

A double bit error has
occurred, but cannot
be isolated to a single
array card. suggested
procedure is to set DCB
sense switch for 'Problem
Definition' to cause
rtn t1S to be run, or run
RTI as a single Routine.
A flag is set to cause
rtn .15 to test only the
failing array cards.

7-220

R13=Pailing Addr.
at which the
double bit error
occurred.

If rtn. 14 vas run as
single rtn. reguest
coutinue to termination
and reguest rtn 15. If
problem definition 551
was set at 1FT select,
continue. If it was not,
set 9101 iu data switches,
function 1, and continue.

o

STORAGE IFT

I3705CAA 2.7

ISB 3705 CO!!ONICATIONS CONTROLLER
STORAGE IPT SlBPTO! INDEI
BOOT. ERBOR YONCTION TESTED
CODE
Single bit error pattern
X215
Test.

D99-3705E-09

EBROF DESCBIPTION

SOSPECTED ClRD
LOCATION IS)

PROG PElLD
BASK 'PAGE

PET!!
PAGE

CO!!EHTS

)

Jote: This Boutine runs
in 'Problea Definition'
aode and requires either
the DCB sense switch or to
be run as a single routine
reguest.
This routine stores, loads
and tests a pattern, its
coapleaent and its recomple'aent. Two patterns are used
to provide bit variation •
•••Single Bit Error Forced •••
Pattern 1
Pattern 2

s
s

5555/AAAA
8001/1PPE

Boutine runs on PET
storage only.

~his

0101

Vorst card analysis

The 'vorst card' has
been deterained.

7-220

R15s Displaceaent
into vorst card
table.
See Hote 1.
If Beg 15=X'10',
vorst FET card=
Pos. H2

0102

Vorst card analysis
Worst Card=card vith
greatest nuaber of
single bit errors.

Donble bit error detected in
Rontine 14 has caased 'vorst
card' within tbe range of
addresses where the double
bit error exists to be
deterained.

7-220

R15=Displaceaent
into worst card
table. See Hote 1.
If Beg 15=1'10',
worst FET card=
Pos. N2

Note 1:

Array card identification:

Praae 01 Gate 01S
Address
Displaceaent/Card
00000
08000
10000
18000
20000
28000
30000
38000
EOII

2.8 X3705Cll

07Pl'E
OUPE
17PFE
UPFE
27PFE
2UFE
37F!'E
- 3!'!'!'E

-

00/J2
0ll/K2
08/L2
OC/B2
10/H2
111/P2
18/02
1C/B2

02/J4
06/KII
01/LII
OE/!II
12/HII
16/P1I
l1/QII

1E/HII

Praae 02 Gate 028
Address
Displaceaent/Card
110000
118000
50000
58000
60000
68000
70000
78000

-

117!'!'E
II!'!'!'E
57PPE
5PFPE
67P!'E
6FPFE
77FPE
- 7!'!'!'E

20/J2
211/K2
28/L2
2C/!2
30/H2
311/P2
38/02
3c/R2

This code is displayed because
rtn. 15 takes longer than 20
sec. to run. It indicates only
that the rtn. is running and
not in a l.oop.

STOllAGE IPT

22/J4
26/KII
211'LII
2E/II4
32/1111
36/PII
31/011

3E/1I4

,_ _ _ _ _ _ _ _ _

...J.-..~_

•• _ _ _ _ _ _ _ _

o
D99-3705E- 09

IEB 3105 COBBUIICATIOBS CO.TIOLLII
STOIAGI IPT STBPTOft IIDII

o

'£.1101 J)ESCIIXnXOI

ROOT. IIIOB POlerIOI TISTED
CaDI

SDSPECTED CABD
WCITXOI (s)

PIOG

l'EALD

PET!!!!

III Sit

PAGE

PIG!!

COftBU':5

Address FaLlar. AaalysLa
Thi. loatiae .tte.pt. to
.aalyse a so11d .ddr••• iag
f.ilare hy .toriag
each addr.s. ~a it.
ova locatioa •• aata.
Pailare • • r •••••a for a
co.po.it• •rror di.play_
fro. vhi~ cOD.l.t•• t
addr... bits ca. be
a.alysed. Pai11Dg ~ttar.
caa be aet.r.iDea by co.hi.iag hits coaalsteat1y
01 fro. error coae OXOl ...a
hits coa.i.teatly OFF fro.
error code 0102. ~. ro~~ae
raas Oa PET .torag. oaly." lit
aefiD1tioas .re a. follow.:

I:l16

IT!!

I I I
5 6 1

00 o 0
1 :l l

000 0

• 1
1 Ll-ll LL..l 1 iii 1
I
I

I
I

I I
Pra.e Select I

o

I

5 6

I

I
I

I
,CST

I
ICSS

1 1 1 1
0 1 2 3
iii ! I I

I

I
I

sn lits

1 1 1
/I

561

I...L.! 1

I
1
I

Daased

I

C.rd Pair Select
115aBits cODsisteatl, OM in all
failures

0101

Address failure aaalysis

Addre.s failare aaalysia
P.rt 1 of 2 - Address
failure - leplace bits ia
addre.s layoat with a 1 for
each bit oa ia leg '15','
Coatiaae to error code 0102 to
co.plete failing pattera.

7-220

0102

lddress failare aaalyals

Addre •• failure aa.lysis - Part
2 of 2 - lddre.siag failore leplace bits ia addres. layoot
vith a 0 for each bit oa iD
Reg 1'15'. Bits re.aiaiag
I sfter error code 0101 aDd
0102 were not cOaalsteat ia
the f.ilore ••

7-220: 1115a Bits CODSl-1>tently OPF in .~l

Iddre.slDg f.llure. Co. pare
expected aad .ctual data to
aeter.iae addres. bit. ia
error.

7-230

failnre.

.s

lddressiag capabillty

1217

This rootiae chects sddressiDg capability by storiag
each locatioa vith ita ova
sddres. as data aDd testing
that the data vas stored
correctly. This roatlae
ruas oa FET storage oaly.
0001

I

STORIG! 1FT

lddressiag capability

113.F8iliD9 84.i.&s
11/1-Actllal data
lIS-Bits in errer
I"-Expect•• D'~

X3705CU 2.9

Ie8 3705 COM~UNICATIONS CONTROLLER
STORAGE 1FT SYMPTO! INDEX
ROUT. ERROR FUNCTION TESTED
CODE

2.10 X3705CAA

D99-3705E-09

ERROB DESCRIPTION

SUSPECTED CARD
LOCATION(s)

PROG
ftASK

FEALD
PAGE

FETKK
PAGE

CO!ftEHTS

STORAGE 1FT

IBft 3705 COftftUIICATIOIS COITROLLER
TYPE 1 CB111~L 1D1PTER IpT SYftPTOft IIDEX
CBAPTER 3.0:

~YPE

1

CB~IIEL

D99-370SE-09

AD~~ER SYftP~ft

IIDEI

The type .,. CA 1FT symptom index is a listing of error codes relating to failures occurring during the operation of tne
IpT. A11 bits of the C~ registers vhich have both input and output capability are tested vith several patterns,
including all ones, zeros, every other bit, groving-ones, and floating-zeros patterns. Interaction betveen these
registers is also checked. In addition to verification of register operation, the function of program requested and
suppress-out aonitor level 3 interrup~s are verified. Error codes are a1so given for unexpected and/or unknown level
and level 3 interrupts and if the C1 interface vas not disabled.
RTI

ERROR FOICTIOI TESTED
CODE

1301

0101

Disable CA

1302

OX02

CA Diagnostic Reset

~ype

1 interface

ERROR DESCRIPTIOI

SUSPECTED CABD
LOCATIOI(S)

PROG
ftASK

pEALD
PAGE

pETftft
PAGE

Channel interface was not
disabled

AIIP2

0008

RC103

Did not clear reg X'60'

AIIL2

PPPP

BCII02

8-130

PFFp

RCII03

8-130

1302

OXO,

CA Diagnostic Reset

Did not clear reg %'62'

14L2

1302

0108

C1 Pia gnostic R.,set

Did not

AlIT 2

PPPP

BC601

8-130

BC505

8-130

c~ear

reg X'66'

1302

0109

C1 Diagnostic Reset

Did not clear reg X'67'

lIIK2

OOpF

1303

OX01

Set -reg X'63' to X'OOOO'

Onable to set reg %'63' to
X' 0000'

A4ft2, A4P2
AIIK2

FPPP

BCS02

8-100

13011

OXOB

set reg X'63' to X'ppFF'

Onabl~

to set reg %'63' to

A4ft2, A4P2
lIIK2

FFPP

BCS02

8-100

X'PPPP'

PFFp

BC502

8-100

PFFP

RC502

8-100

pFFP

BCS02

8-100

PFPP

RCS02

8-100

BC502

8-110

1305

OXDe

Set reg X'63' to %'5555'

Unable to set reg X'63' to
X'SSSS'

111ft2, 1llP2

1305

OIOD

Set reg X'63' to X'lllA'

Onable to set reg %'63' to
X'11A1'

A4ft2, 14P2

1 11K 2
~IIK2

1306

OXOE

set J:eg X'63' using floating'
zeros pattern

Onable to set reg X'63' using
floating zeros pattern

1307

OXOP

Set Reg X'63' using groving
ODes pattern

Unable to set reg X'63' using
groving ones patteru

14ft2, A4P2
lIIK2

1308

0101

5et reg X'611' to X'OOOO'

Unable to set reg X'611' to
X'OOOO'

14ft2, 14P2
14K2

1309

OXOB

Set reg X'611' to X'pFFp'

Unable to set reg X'64' to
X'PPPP'

~

4ft2, AIIP2
AIIK2

PFPF

BC502

8-110

130A

OXOC

set reg X'611' to x'5S5S'

Unable to set reg X'64' to
X'SSSS'

1IIft2. A4P2
lIIK2

PFPF

BC502

8-110

1301

0I0D

Set reg X'611' to X'1111'

Unable to set reg X'64' to
X'll11;

1 11ft 2, 1llP2
111K2

PFpP

BCS02

8-110

130B

OXOE

Set reg X' 611' -using floating
Zeros pattern

Unable to set reg X'64' using
floating zeros pattern

A4ft2. AIIP2
AIIK2

FFPP

BC502

8-110

130e

OXOP

set reg .X'64' using
ones pattern

On able to set reg %'64' using
groving ones pattern

Allft2. AIIP2
AIIK2

FFFP

BC502

8-110

130D

OI:OA

Set reg X'65' to 7'0(100'

Unable to set reg X'65' to
X'OOOO'

1 11ft 2. AIIP2
lllK2

PpPF

BC502

8-110

130E

0I0B - Set reg X'65' to X'PPPP'

Unable to set reg X'6S' to
X'PPPP'

11182, 14P2
AIIK2

PFFP

BC502

8-110

1301'

OXOC

Set reg X'65' to X'5555'

Unable to set reg X'6S' to
X' 5555'

Allft2. AIIP2
AIIK2

FFPP

BCS02

8-110

1301'

OXOD

Set reg X'65' to X'AAA1'

Unable to set reg X'6S' to
X'A111'

1IIft2. AIIP2
14K2

PPPP

BCS02

8-110

1310

0I0E

Set reg X'65' using floating
zeros pattern

Unable to set reg X'6S' using
floating zeros patteru

FFPP

BCS02

8-110

1311

0I0P

Set reg X'6S' using groving
ones pattern

Unable to set reg X'65' using
qroving ones pattern

1IIft2, AIIP2
AIIK2

PPFP

RC502

8-110

1312

OXOB

Set reg X'66' to X'CPOO'
by output of X'40Cp' to reg
X'66'

Uuable to set reg X'66' to
X'CPOO'

~IIT2

~PPP

BC601

8-120

gro~ing

COftftEITS

lEe 3705 COeMUNICATIONS CONTROLLER
TTPE 1 CBANN~L ADAPTER 1FT STePToe INDEX
RTN

ERROR
CODE
1313 OXOC

1313

OX 00

D99-3705E-09

FUNCTIOH TESTED
EaaOR DESCRIPTION
SUSPECTED CARD FROG FEALD PETee coeeENTS
LOCATIO.CS) eASK PAGE PAGE
Set reg X'66' to X'II500'
Unable to set reg X'66' to
FFFP
by output of X'OOqS' to reg
X'4S00'
X'66'

RC60'

8-120

Set reg X' 66' to X'8AOO'
by output of X'008A' to reg

Unable to set reg X'66' to
X'8AOO'

AlIT 2

PFPf

BC601

8- 1 20

:1:'66'

1314

OXOE

Set reg X'66'
2eros pattern

us~ng

floating

Unable to set reg X'66' using
floating zeros pattern

AIIT2

CPOO

RC601

8-120

1315

OXOf

Set reg X'66'
Zeros pattern

us~g

grow~ng

Unable to set reg X'66' using
growing zeros pattern

AIIT2

CFOO

RC601

8-120

1316

0101

Set reg 1'62' to 1'0000'

Unable to set· reg X'62' to
X' 0000'

Aill 2

FPPF

RCII03

8-080

1317

OX10

Set reg X'62' to X'8000'
outbound transfer sequence

Unable to set reg X'62' to
X' 8000'

AU2

PFPF

BCII03

8-080

1318

OX11

Set reg X'62' to X'IIOOO'
inbound transfer sequence

Unable to set reg X'62' to
X'IIOOO'

AIIL2

PFFF

BCII03

8-080

1319

OX12

Set reg X'62' to X'2000' ESC
final status transfer
sequence

Unable to set reg X'62' to
X'2000'

AIIL2

FPFf

BCII03

8-080

1311

OX13

Set reg X'62' to X'1000'
MSC channel end transfer
sequence

Unable to set reg 1'62' to
1'1000'

AIIL2

PPPF

RCII03

8-080

131A

OX14

Set Cbannel End status when
reg X'62' to X'1000'

Unable to set reg X'66' to
1'0800'

A4L2

FFFF

RC601

8-080

sett~ng

1315

OX15

Set reg X'62' to X'0800'
NSC final status transfer
sequence

Unable to set reg X'62' to
1'0800'

AIIL2

FFFF

RCII03

8-080

131B

0116

No b~ts are set in reg X'66'
when sett~ng reg X'62' to
1'0800'

Reg X'66' not all zeros

AlIT 2

PFFF

RC601

8-080

131C

OXOA

PRE-TEST.
X'OOOO'

Unable to set reg X'62' to
X' 0000'

AU2

PPFF

RCII03

131C

OX20

Set level 3 progra. requested
interrupt

Level 3
occur

lilT 2

0006

RC601

131D

OXOA

PRE-TEST.
1'0000'

Unable to set reg 1'62' to
X' 0000'

A4L2

PFPF

RCII03

1310

OX21

Set suppress out .onitor

Level 3 interrupt dia not

AIIT2

OOOA

BC602

Unable to set reg X'63' to
1'0000'

Alle2

FFPF

RCII03

A4D2,· AIIK2

PPPP

RC502

Set reg X' 62' to

Set reg X'62' to

~terrupt

d~d

not

Rerun Rtn 1316
8-080
Rerun Btn 1316
8-080

OCCUl:

131E

OXOA

PRE-TEST.
X'OOOO'

Set reg X' 63' to

131E

01110

IIhen X' 0000' ~s set in reg
X'63' it does not set reg
X'SII'

Beg X'611' set incorrectly

Rerun Btn 1-303
8-100
8-110

131E

OX41

IIhen X' DODO' ~s set ~n reg
X'63' it does not set reg
X'6S'

Beg X'6S' set

~ncorrectly

AIID2, AIIK2

PFFP

BCII02

8-100
8-110

131E

01112

IIhen 1'0000' is set in reg
X'63' ~t does not set reg
X' 66'

Reg %'66' set incorrectly

AIID2. AIIK2

PFFP

BCS02

8-100
8-120

131F

OXOA

PRE-TEST.
X'OOOO'

Unable to set reg X'6Q' to
X'OOOO'

All!! 2

PFFF

RC502

131F

OX43

When X' 0000' is se-t in reg
X'6Q' ~t does not set reg
X'65'

Reg X'65' set incorrectly

1.1102. AIIK2

FFFF

RCS02

8-1tO
8-120

131F

01114

IIhen 1'0000' is set in reg
X'64' it does not set reg
X' 66'

Reg 1'66' set incorrectly

PPFF

RC601

8-110
8-120

3.2 X3 705DAA

Set reg X'64' to

Rerun Rtu 1308

Type 1 CA In

. . . --.. ---.- ._'".-..- ---.-----.-______. ._____ . . _.

_~B~_~~

o
o

UII 310S COIIIIOHICA'fIORS CORTlIOLLER
TIPE 1 CBABREL ADAPTER 1FT SYIIPTOII IRDEI

BC502

OXOA

'PRF-TBST.
%'0000'

1320

0146

1320

1311'

ElIROll
CODE
OX"S

1320

set reg X'6S' to

8-100
8-110

Unable to set reg X'6S' to
X' 0000'

All II 2

1"1"1"1"

BCS02

Rhen X'OOOO' is set in reg
X'6S' it does not set Teg
X'66'

Beg X'66' set incorrectly

I"D2, ."1t2

l"PPP

BC601

8-110

OX"7

When X'OOOO' is set in reg
X'6S' it does not set reg
X'63'

Beg X'63' set incorrectly

.IID2, l111t2

PPPP

BCS02

8-110
8-100

1320

0%118

When X'OOOO' is set in ! .g
X'6S' it does not set reg
X'64'

Beg X'6'"

H02, ""1t2

l"PFl"

BCS02

8-110

1321

OXOB

PBE-TEST.
X'1"1"1"1"

Unable to set reg X'63' to
X'l"1'PP'

'l1li2

-PPFl"

BCS02

1321

onc

When X'PPF1" is set in reg
X'63' it does not set reg
X'6'"

Reg X'611' set incorrectly

'/lD2, .II1t2

l"PPP

BCS02

8-100
8-110

1321

01llD

Rhen X'PPPP' is set in reg
X'63' it does not set reg
X'6S'

Beg X'65' set incorrectly

l11D2, Alllt2

FPPF

BCS02

8-100
8-110

1321

OnE

Rhen X'PP1'l'" is set in reg
X'63' it does not set Teg
X'66'

Beg 1'66' set incorrectly

.1102, '''1t2

PPFl"

BC601

8-100
8-120

1321

OI"P

When X'1'l"PP' is set in reg
X'63' it does not set reg
X'60'

Beg 1'60' set incorrectly

&IID2, '"1t2

FPFF

BCII02

8-100
8-120

1321

OXS1

Rhen X'l"PFl'" is set in reg
X'63' it does not set reg
X'62'

Beg X'62' set incorrectly

AIID2, AIIlt2

PPFl"

BCII03

8-100
8-080

1322

OXOB

PRE-TEST.
X'PFPF'

Unable to set reg X'611' to
X'FFFP'

111112

FFPP

BCS02

1322

OXS2

Rhen X'FFPP' is set in reg
X'6/1' it does not set reg
X'65'

Beg X'6S' set incorrectly

l11D2, 1111(2

FPPP

l!CS02

8-110

1322

OXS3

When X'PPPP' is set in reg
X'64' it does not set reg
X'66'

Beg %'66' set incorrectly

A"D2, ""1(2

FPPP

BC601

8-110
8-120

.322

015"

Rhen X'FPPP' is set in reg
X'64' it does not set reg
, X'60'

Beg X'60' set incorrectly

l11D2, IIIlt2

?FPP

BC"02

8-110
8-070

1322

0lS6

When X'PPFP' is set in reg
X'64' it does not set reg
X'62'

Beg 1'62' set incorrectly

'"D2. 141t2

Pl"FP

BCII03

8-080
8-110

1322

OX56

When X'PPPP' is set in reg
%'611' it does not set reg,
X'62'

Beg X'62' set incorrectly

l11D2. AIII(2

1"1"1"1"

BCII03

8-080
8-110

1322

OXS7

Rhen X'l"l"PP' is set in reg
X'6/1' it does not set reg
X'63'

Beg %'63' set incorrectly

11102. 1111(2

'1"1"1"1'

BCS02

8-100
8-110

1323

OXOB

PRE-TEST. Set reg X'65'
to X'1'1'1'1"

Onabl.e to set reg %'65' to
X''1''1''1'1''

111112

'1"1'1'1'

RCS02

1323

0158

When X'l'FPP' is set in reg
1'65' it does not set reg
1'66'

Beg X'66' set incorrectl.y

AIID2, "/l1t2

1'1"1'1'

BC601

8-120
8-110

1323

0159

Rhen X'l'l"PP' is set in reg
X'65' it does not set reg
X'60'

Reg X'60' set incorrectly

11102, 1111(2

FPFP

BCII02

8-070
8-110

Type 1 Cl IFT

Set reg X'63' to

Set reg X'6'"

to

~~_""---=,,_~

D99-310SE-09

l"URCTIOR 'HSTBD
ERlIOR DESCRIPTIOR
SUSPECTED CllID PlIOG l"ElLD l"ET1I1I COIIIIEBTS
LOCUIOR,S) IIASIt P1GE P1GE
When X'OOOO' is set in reg
Reg X'63' set incorrectly
l"PF1'
I"D2, 1II1t2
X'64' it does not set reg
X'63'

RTl!

__ ,_

set incorrectly

Bernn Btn 130D

Beran Btn 13011

Beran Btn 1309

Beran Btn 130E

D70SDAA 3.3

IBft 3705 COM"UNICATIONS CONTROLLER
TYPE 1 CBAINEL ADAPTER IFT SY8PTOft INDEX
RTI
1323

ERROR
CODE
OXSB

D99-3705E-09

FUNCTION TESTED
ERROR DESCRIPTION
SOSPECTED C1RD PROG FE1LD YET!! C088ENTS
LOC1TION(S) !lSK PAGE PAGE
When X'FFFF' is set in reg
Beg X'62' set incorrectly
14D2, l11K2
FFFF
X'6S' it does not set reg
X'62'

RCQ03

8-080
8-110

1323

OXSC

When X'FFFF' is set in reg
X'6S' it does not set reg
X'63'

Beg x'62' set incorrectly

A4D2, 111K2

FFFF

BCS02

8-100
8-110

1323

OXSD

When X'PFFP' is set in reg
X'6S' it does not set reg
x'64'

Reg X'64' set incorrectly

&IID2, l11K2

FFFF

RCS02

8-110

1323

OxSE

When X'OOCF' is set in reg
x'66' it does not set reg
x'60'

Reg 1'60' set incorrectly

14D2, l11K2

FFFF

RC402

8-120
8-070

1324

OXOB

PRE-TEST.
reg X'66'

Input fro. reg X'66' not
X' CFOO'

111T2

FFFF

RC601

1324

0160

When X'OOCF' is set in reg
x'66' it does not set reg
X'62'

Reg 1'62' set incorrectly

14D2, l11K2

FFFF

RC~03

1324

OX61

When X'OOCF' is set in reg
X'66' it does not set reg
X'63'

Reg X'63' set incorrectly

l11D2, l11K2

FFFF

BCS02

When x'oocr' is set in reg
X'66' it does not set reg
X'64'

Beg 1'64' set incorrectly

111D2, 111K2

FFFF

RCS02

8-120
8-110

When x'OOCP' is set in reg
X ' 66' it does not set reg

Beg X'6S' set incorrectly

11102, 14K2

FFFF

RCS02

8-120

1324

OX62

1324

OX63

Output I'OOCF' to

Beruu lItu 1312
8-120
8-080
8-120
8-120

8-110

X'6S'
131X

lXOl

Disable Cl type 1 interface

Channel interface vas not
disahled

AliP2

0008

RC103

8-130

13XX

lXOl

Set regs to X'OOOO'

Unable to set regs to X'OOOO'

11182, AIIP2

FFPF

RCSOl

8-100
8-110

13XX

lXOB

Set all used bit positions
to l's

Onable to set l's to all used
bit positions

111!2, 111P2

FFFP

RCSOl

8-100

13XX

2XOO

Unexpected level

interrupt

Level 1 interrupt with no
reguest bits on

111K2

XXXX

BC50S

13XX

2X01

unexpected level 3 interrupt

Initial selection level 3
interrupt bit on in reg
X'77' (bit 1.4)

111L2

XXXX

RCII02

13XX

2X02

Reset initial selection
level 3 interrupt

Failed to reset initial
selection level 3 interrupt

l11L2

XXXX

RCII02

8-080

13Xl

2X03

Unexpected level 3

Data/status level 3 interrupt
bi t on in reg X'77' (bit 1.3)
without suppress out .onitor
or program requested interrupt
bits on in reg X'67'

AIIL2

IXXX

RCII03

8-090

13XX

2X04

Reset data/status level 3
interrupt

Pailed to reset data/status
level 3 interrupt

14L2

XXXX

RC602

8-080

13XX

2105

Unexpected suppress out
level 3 interrupt

Suppres~ out interrupt bit
on in reg X'77' (bit 0.6)

lllT2

XXXX

RC602

13XX

2X06

Reset suppress out monitor
level 3 interrupt

Failed to reset suppress out
.onitor

XXXX

RC602

8-080

13Xl

2X07

Unexpected level 3 interrupt

Unexpected prog reg interrupt

interrup~

8-110

111T2

8-3110

XXXX

RC602

8-090

XXXX

RC602

8-080

13Xl

2X08

Reset prograR requested
level 3 interrupt

Failed to reset program
requested level 3 interrupt

13XX

2109

Unexpected level 3 interrupt
from type 1 CA

NO request bits on in reg
X'62'

lllL2, AIIT2

XlIX

RCII07

8-090

131X

2X1X

Unexpected level

Local store check

14K2

XXXX

lICSOS

8-340

3.4 X3705UAA

interrupt

Reg X'62' should
indicate cause
interrup't

Co.binations of
aore than one

Type 1 CA IFT

D99-370SE- 09

lEft 3705 COftBURICATIORS CORTROLLEI
TYPE 1 CHARREL ADAPTER 1FT StlPTOI IIDEI
EIIOR
CODE
13XI 2X21

FURCTIOI %!StED
EIIOR DESCRIPTIO!
SUSPECTED CAID PIOG PEALD PETBB COBIEITS
LOCAtIO!(S) BASK PAGE PAGl
unezpected level
interrupt
ccu Outbus check
A4K2
IXII

llC505

8-3110

level 1 in'l:errny
cause vill be

1311

2X41

Unexpected level

interrupt

In/Out instr accept check

14K2

XXII

lIC50S

8-3110

indi..ated by t
in error code

1311

2X81

unezpected level

interrupt

Channel Bus-in cbeck

lU2

IIII

IlC505

8-3110

X'2IYI' and thes'
causes aay he

1311

2XPF

Beset uDexpected level
J.nterrupt

Pailed to reset level 1
interrupt

A4K2

IIII

lICS05

8-130

separated into
codes 1'2111' 1'2181'

ITI

"
fl
"

I

:,

Type 1 ClIFT

X3705DlA 3.5

IBft 3705 COftftUBIClTIOBS CO.TROLLER
TYPE 1 CHABBEL lDlPTER IF! SyftPTOft IBDEX

3.6 :X370SDAl

D99-370SE-09

'rype 1 Cl IFT

o
o
o

X5! 3705 CO!ftDRIC1TlORS CORTBOLLEB
TIPE 2 lRD TYPE 3 CH1RREL AD1PTEB X~T SI!PTOK XKDEX

D99-370S5-09

CHAPTEB 4.0: TIPE 2 AKD TYPE 3 CHA.KEL ADAPTEB SIftPTOB IRDEX

The type 2 channel adapter syaptoa ~ndex lists ~he error codes relating ~ failures occurring during the operation of
the XFT. The Cl is tested in diagnostic wrap aode. which wraps around the channel bus and tag interfaces. These
interfaces are then controlled by 3705 instructions aanipulat~g the diagnostic bus and tag registers to sieulate the
operat~n of the CA.
This Syeptoe Xndex can be used to its aaxieue effectiyeness to isolate channel faiures hy
continuing the current routine (DISPLAI/pDRCTIOK SELECT switch set to ~DICTIOR 5) or aborting the cur,rent routine
(DXSPLAI/pUKCTIOR SELECT switch set to PURCTIOR 6) to locate additional error codes after the first error code is
displayed. Xn the FEALD PAGE coluen, the pages are gi.en for Type 2 CA. Look at the equi.alent FE1LD S-series paqes for
Type 3 CA.

PE1LD
PAGE

PETB!
P1GE

.1.412

X0008 OJ001

9-210

Le.el 3 interrupt with no
request bit
(Reg X'77' bits 1.2, 1.4)

A4I.2

XXIIX OB001

9-210

Select type 2 CA1 or CA2
(Beg X'S7' bit 1.41

Level 3 iDterrupt froe both
type 2 CAts
CReg X'71' bits 1.2. 1.11)

a4L2

XXXXX OB001

9-210

axOl!

Select type 2 C11 or C12
(Beg X'S7' bit 1.4)

Level 3 ~nterrupt froe other
type 2 Cl
(Beg X'll' b~ts 1.2. 1.11)

XXXXI OB001

9-210

0105

Prograe requested type 2
CA le.el 3 ~nterrupt

Prograe requested type 2 C1
level 3 bit off
CBeg X'SS' bit 0.11)

X0008 OJij02

9-190

0106

Beset type 2 Cl leYel 3
request (Beg X'S7'
bit 1.31

Prograa requested type 2 Cl
level 3 bit on
(Beg x'5S' bit 0.11)

XOOOl 0.1001

9-190

0107

CA selected hit for
selected channel

CA selected bit off
(Reg X'SS' bits 1.6. 1.1)

OB~01

9-190

XII 02

OX01

Set diagnostic eode
(Beg X'S7' hit 1.7)

Pailed to set diagnostic aode
CReg X'SS' bit 0.0)

X8000 OH006

9-210

n03

OXOl

CA reset
(Beg X'SS' hit 1.7)

Failed to reset CASKSB
(Beg X' S3')

111.12

11'300 OK003

9-220

OX02

CA reset
(Reg X'S8' bit 1.7)

Pailed to reset CASTE
(Beg X'SII')

14L2

XDPOO I:1E002

9-220

OX03

Cl reset
(Reg X' SS' bit 1.7)

Pailed to reset CTDB
(Beg X'SS')

&4R2

XPCPD 01'003

9-220

OX 011

CA reset
(Reg X'SS' bit 1.7,)

1'ai1ed to -reset CBDB
(Reg X'5C')

XPA01 0.1003

9-220

OXOS

CA reset
(Reg X'SS' bit 1.7)

Failed to reset CBODB
(Beg X'SS')

AII1!2

XPFSO OB001

9-220

OX01

set all C1DB bits on
(Reg X'SA')

C1DB bits Dot all on
(Beg X'Sl')

.1.482. AIIG2

XPFPF OL001

9-2110

OX02

Set all C1DB bits off
(Reg X'SA')

C1DB bits not all off
(Beg X' 51')

AIIB2. AliG2

XPFPF OL001

9-240

Saee as above

OX03

Set CADB to X'1AAA'
(Reg X'SA')

Invalid bit pattern
(Beg X'Sl')

AIIB2. A4G2

xnn

9-240

Saae as above

iTK

X401

I!
U

XIIIM

'rESTED

BBROB DESCRXPTIOK

SUSPECTED C1BD

lIllBOB
CODE

~DRCTlOK

ax01

1'orce leYel 3 ~nterrupt
(Beg x'S7' hit 1.0)

KO -type .2 Cl leYel 3 interrupt
occurred

OX02

Select type 2 Cll or C12
(Beg X'S7' bit 1.4)

0103

LOC1TXOB(~

Type 2 and 3 Cl ZFT

~n

CADB

aU2

a4L2

PBOG
BASE

10003

OL001

COBBEBTS

Boutine has 60
second ties out.
Clock-out froe CP
aay not bave drap
'rest routine XII02
to observe whethe
the CA can be
selected if clock
out bas dropped
froe tbe CPU.

Byte
Byte

0=1~G2
1=A~G2

X310SEU 11.1

IB~

3705 CO~~ONICATIONS COITROLLBR
TIPB 2 AND TIPB 3 CBAIBBL ADAPTER IFT

SI~PTO!

ROOT. ERROR FOICTION TESTED
CODE
OX Oil set CADB to X' 5555'
(Reg X'sA')

ERROR DBSCRIPTION

X405

X406

X407

X408

1409

XII OS

D99-3705E-09

IBDEX

Invalid bit pattern in CADS
(Reg X'5A')

SUSPECTED CARD
LOCA'l'IOIi (s)
A4B2, AIIG2

PBOG

FBALD
PAGE
IFFFF OL001

FETII!!
PAGE
9-240

COII~B!fTS

~ASK

Sase as above

OX01

Set all IICWAR bits on
[Reg X'sO')

INCIAR bits not all on
(Req X' SO')

HB2, AIIG2

XFFF! OL001

9-110

Sase as above

OX02

Set all >IICIAR bits off
(Reg X'sO')

IBCWAR bits not all off
(Reg X'50')

.4B2, A4G2

XFFFB OL001

9-110

Sase as above

OX03

Set INCIAB to X'UAA'
(Reg X' 50')

Invalid bit pattern in INCIAB
(Beg X'50')

14B2, AIIG2

XFFFB OL001

9-110

Sase as above

OXOII

Set IBCIAR to X'5555'
(Reg X' SO')

Invalid bit pattern in INCIAR
(Req X' SO'.)

AIIB2, AIIG2

XFFF! OL001

9-110

Sase as above

OX01

Set all OOTeIAB bits on
(Reg X' 51')

OUTCIAR bits not all on
(Reg X'S1')

",4B2, 14G2

XFFF! OL001

9-120

Sase as above

OX02

Set all ourCIAR bits off
(Beq X's1')

OUTCWAR bits not all off
(Reg X'S1')

1llB2, AIIG2

XFFFE OL001

9-120

Sase as above

OX03

Set OUTCWAR to X'AAAA'
(Reg X'51')

Invalid bit pattern in
OU~ClIAR (Reg X's1')

AIIB2, A4G2

XFFF! OL001

9-120

Sase as above

OX 011

Set OUTCIlR to X'sss5'
(Reg X'51')

Invalid bit pattern in
OOTClIAR (Beg X'51')

lIIB2, AIIG2

XFFFE OL001

9-120

Same as abOve

OX01

Set CTDR byte 0 to all
(Reg X' sX' byte 0)

CTDR byte 0 not all zeros
(Reg X' SB')

AIIN2

XFCOO OF002

9-250

0102

Set CTDR byte 0 to all ones
(Reg X'SI' byte 0)

>CTDR byte 0 not all ones
(Reg X' 5S')

""N2

XFCOO OF002

9-250

0103

Set CTDR Byte 0 to X'AA'
(Req I'5B')

Invalid bit pattern in CTDR
(Beg X'SB')

A4N2

XPCOO OF002

9-250

OX04

Set CTDR Byte 0 to X'5S'
(Reg X'SB')

Invalid bit pattern in CTDR
(Reg X'SB')

1412

XFCOO OF002

9-250

0101

Set CBODR to all zeros
(Reg X' 58')

Invalid bit pattern in CBODR
(Reg X' 58')

""R2

XPF80 OB001

9-220

0102

Set CBODB to X'XFF80'
(Reg X'S8')

Invalid bit pattern in CBODR
(Reg X'58')

.4R2

XFP80 OBOO'

9-220

0103

Set CBODB to X'l180'
(Reg X'58')

Invalid bit pattern in CBODR
(Reg X'58')

14B2

XFFBO OB001

9-220

OX04

Set CBODR to X'5500'
(Reg X'58')

Invalid bit pattern in CBODR
(Reg X' 58')

AlIR2

XFF80 OE001

9-220

OX01

Set INCIAR, OUTCIAR valid
latches
(Reg X'S5' bits 0.2, 0.3)

Failed to set INClIAB, OOTCWAR
valid latches
(Beq X'sS' bits 0.2, 0.3)

AIIL2

X3000 ORO 05

9-180

0102

Reset INCIAR, OOTeIAR valid
latches
(Reg X's6' bits 0.2,0.3)

Failed to reset INClIAB,OUTClIAB
valid latches
(Beg X'5S' bits 0.2, 0.3)

A4L2

X3000 OB005

9-180

OX01

Bo response to 'op-out'
(Req X'sX', bit 0.11)

Invalid response to 'op-out'
in CTDB (Reg X'sB')

AII!f2, A4R2

XOOFF OF002

9-250

~eros

Display level q.
reg 5 to see

error

~ines

XIIOC

OX01

Ho response to 'op-ont' with
device address on bus-out
(Reg X' 58')

Invalid Desponse in CTDR
(Reg X' 58')

A4H2

XOOFP OF002

9-220

Display level 4.
reg 5 to see
errQr 1ines

XIIOD

OX01

'Select-in' response to
'op-out' and 'sel/hold-out'
(Reg X' 5S')

Invalid response in CTDR
(Beg X' sB')

AIIN2

XOOPF OF002

9-250

Display level q,
reg 5 to see
error 1ines

4.2 X370SEA!

Type 2 and 3 CA :In

o
IS! 3705 Co~eO.lc~TIONS COITIOLLEI
TYPE 2 AID TYP! ) CUA.IEL ADAPT!I IPT StaPTOR IIDEX

D99-310SE-09

lOUT. ElIOI PUICTIO. TISTED
BIIOB DESCRIPTIO.
alDI
xaOI OXOl 'Op-1D' r •• paa •• to 'op-oat'
Op-i. Dot •• t iD eTDI
aDO 'BOdre ••-oat· .Dd • . .1/
(B., X'S8')
bold-DDt' aDO valLO .Odr••• OD
bas-oat (B.g. X'S8', X'S8')

SUSl'ICTED CUD
LOCl 'fIOII Cs)
UI2

nOG PIlLD
IIlSK PAGE
X0020 OP002

PU81!
PIGE
9-220

XaOP

aa52, a.12

%OOPP QC007

9-220
9-250

COIIIIEIiTS
Cauae of tbe failur
.ay be a ais.atch
betweeD CDS address
aDd tbe plugged cba
addr.ss.

OXOl

'S.lect-Lo' re.pOD88 to 'opoot·.aDd ·.Odr.... oat· _Dd
'sel/bold-oat' aDd .11
iD •• liO .ddre.... OD ba..oat
(\leg. X'S8'. X'58')

OX11

PllI-TIST. cn. ...et
by Cl r •••t

UI2. U02

XOOl'l 01'006

9-220

lerUD IItD 1401

Ul0

OXOl

IDv.li4 ~.pOD.. io eTDI
's.l.ct-LD· respon .. to
'op-oat' aDO ·.OOr •• s-oat· aDO (B., X'SI') or iDvaliO aOdr...
's.l/bolO-oat' aDO bad parity parity io CIODI (R.g ~'S8')
aD cbaDD.l bas-oat

1 IIr 2. 11112

%OOP1' 01001

9-250

10dreas is anit
a4dr.ss of ehBDDel
adapter.

xall

OXOl

'a4dr•••-io' Oari.g iD1t1al
.IDvaliO re.poo •• io eTDI
selectloo seqa.oce aeiDg CTDI (B.g X'S8')
Ileg X'58')

""12

XOO1'1' OP003

9-250

OX11

PII-TEST. 'Op-io' r.sp.oo.e
to 'op-oat'. aDd 'aOOr.ss
-oat,' aDd ' •• l/bolO-oat' aDd
.alid addre.s OD bDe-iD

ID.ali4 respOJl •• iD CTD.

AU2

XOOI1' 01'002

9-250

OXOI

select i.e Bes.t fros
'sappr.ss-oat' ap aDd op-oat
dOVD iD CTDB (I.g 1'58')

Sel.ctive res.t bit io CACI
(leg X'S5' bit 1.3) Oid

111.2

X0010 OP005

9-250

OX02

Beset of selectl.e reset
4ariDg le.el 3 iot.rrapt

Sel.ctiv. reset bit io CICI
(leg 1'55' bit 1.3) dld Dot
reset

10010 OP006

9-1aO

0111

PIE-TEST. Selective reset
bit off iDitially (leg X'SS'
bit 1.3)

Sel.ctive r.set
OD

AU2

X0010 01'006

9-1aO

'rite Break cos.aDd bit ia caDI 14K2
(I.g 1'5C' bit 0.6) Dot s.t

xnOl OJ003

9-260

XOOIIO

9-390
9-1aO

X1'181 OJ003

9-220

%001'P OPOO)

9-250

Ia12

IDvalid respoo •• io eTDI
(leg X'S.·) or iovalia addr. . s
.in CBODB (B.g X'S8')

lerUD BtD XIIOE

Dot set.

bi~

iaitially

OX02

CbaDDel 'rite Breat.
reseabraDc. latcb

CbaDo.l 'rite Br.ak
le.esbraDce latcb (I.g X'SS'
bi~ 1..1) Dot •• t

OX11

PIE-TIST. 8es.t of caDI
II.g X' SC')

caDI Oi4 Dot r.s.t frO. a
Cl reset

xalS

OXOI

'lOdress-iD' dropp.d after
'coaaaDO-oat' r.sp>Dse to
'address-iD' witb A VAlid
coaaaD4 on cbsoa.l b~oat.

'ldOr.ss-iD' bit 10 eTDI
(R.g X'SI') Oi4 Dot Orop

xa16

0101

'Io-op' cossanO d.-.:ode

Io-op cossaDd bit iD C8DI
(leg X'SC' blt 0.3)·.0~ ..t

UK2

XPA01 QJ003

9-260

DIll

PIE-TEST. B.set of caDB
(Beg X' SC')

C8DI Oid DOt re.et fro. •
Cl le.et

AU2

XPA01 OJ003

9-260

0101

Test I/O cossaD4 OecoO.

~••t

XIO co •• aDO bit ia CaDI
(I.g X'SC' blt 0.0) Dot set

%pa01 OJ003

9-260

OX11

PBE-TEST. Ie set of caDI
IReg X'SC')

caDa Oi4 Dot reset fro. a
Cl reset

X1'l01 OJ003

9-260

0101

SeDse cosssDd decode

Seos. co •• aod bi~ iD C8DI
(I.g X'SC' bit 0.', Dot set

%1'101 OJ003

9-260
9-310

XQ17

I

1 lilt 2

./

lale

Type 2 aDd 3 Cl IPT

un

13705E11 11.3

.t-

--

lEft 3705 COnftORICATIORS CONTROLLEI
TYPE 2 AND TTPE 3 CBANIEL ~DAPTER IPT STIPTOR IIDEI
lOUT. EaROR PO'CTIO! TESTED
COOl
0111 PRE-TEST. Reset of caDB
(R.g I'SC')

X'11

X'1B

XQ lC

I"D

Iq11

099-

EBROI DESCRIPTIO.
CaDB d1d not r ••et frOB a
Cl r.set

lQIC2

SDSPECTED CABO
LOCATIOII (s)

PBOG PEAI.D
P1GE
XPl01 OJ003

PET""
PAGE
9-26u

Irite co •• aDd tit iD caDI
(I.g r'sc' bit 0.1) DOt set

AIIK2

HAO 1 OJ003

9- 260
9-390

ftASIt

OX11

PRE-TEST. • ••• t of caOB
(8'1g. X' SC')

CIIDR 4i4 uot'r••• t fr". a
C1 re.et

Ult2

lr'01 OJ003

9-260

0101

R.ad co ••• ud d.code

lead co ••aDd bit iD CIIDI

Ult2

lPAO) OJ003

9-260

0111

PRE-TEST. Beset of caDI
(Reg X'SC')

caDI did Dot reset fro. a
CA reset

UK2

XrA01 OJ003

9-26b

OXOl

Chauuel Irite IPt co •• aud
decode

ChauDel Irite IPL co •• aud bit
in CHDll (Beg X'SC' bit 1.7)
not .e~

11U2

xrA01 OJ003

9-260
9-320

OX"

PBE-TEST •••set of caDR
(Beq X'SC')

caDB di4 not reset fro. a
CA reset

Alilt 2

xrA01 OJ003

9-260

OXOl

ChanAel CO •• lUld decode

Test decode of Yalid co•• aods
Bit 1.Q ezp.ct.a to be set in
Beg SC

IPl01 OJ003

9-260

OX02

'a1id c.d in reg 51

Ezpecte4 ca4 in reg 15
C.d rcy4 fro. R.g 51 iD Beg "

1q~2

11"&09 OJ003

9-260

0103

Check status reg Sq

cbannel ·eu4 DOt se~ in reg 5/1
lesults of iDput 511 in reg "

Ult2

IPAOl OJ003

9-260

OX11

PBE-TEST • •eset of caDI
Ileq X'SC')

cnDB 4id Dot reset fro. a
CA reset

Alllt2

IrAOl OJ003

9-260

0101

Decode all iuya1id co •• auds

Ioyalid co ••• nd iu CHODa
(Reg X'S9') decoded as yalie
co •• and in CnD! (8eg I'Se')

XI"101 OJ003

9-260

DIll

PBE-TEST. CTDa (8eg I'SB')
reset by CA reset

eTDB did uot reset fro. a
CA Beset

UPFl' OP006

9-250

0101

10 actiYe inbound tag lines
after selectiye reset

XOOPP 01003

9-250

AIIII2. AII02

Actiye iubound tag l~ne iD
A4N2
eTDa (Reg I'SB') after selective

370~E-

C9

reset

XQ20

0101

'Co •• and-out' dropping brings
np 'status-in'

OX11

PBE-TEST.

0101

iuitial status tro.
Test I/O co •• and

Z~ro

B

IQ21

Rtn l"'S procedure

'Status-in' Dot up iu CTDB
(Beq I'Se' bit 1.4)

14112

10008 OP003

9-250

'Address-iu' bit in CTDa
(Beg X' SB') 4id Dot drop

11112

X0010 01"003

9-250

Seuse byte uot zero lu
(aeq X'SII' byte 0)

C1ST~

lIIJ2

XI"POO OIC001

9-170

0102

Zero iuitial status fro.
Bead cO.Nnd

sense byte uot zero iD CISTE
(Req 1'511' byte 0)

lIIJ2

XI"POO 01t001

9-170

OX03

Zero iDitial statas tro.
Sense co •• and

SeDse byte not zero iu CASTP
(Beq X' Sq' byte 0)

UJ2

I1"POO 01(002

9-170

0104

Zero lDlt~l .tatus tro.
Irite co •• and

SeDse byte not zero iu CASTI
(Beg X' 511' byte 0)

AIIJ2

I1"POO OItOOl

9-170

0111

PRE-TEST.

XDY .. lid CTD!! (Beg X'SB')
respoDse to droppiug
·co •• aD(I-out'

1'112

looor 01"003

9-250

0101

CF aDd DE status to lo-op
co .... nd

IuYalld status iu C1STa
(Reg I' Sq' byte 0)

UJ2

IPPOO 01002

9-170

OX11

raE-TEST.

CASTa dld uot reset. fro. a

AQJ2

11"'00 01t002

9-170

q.1I 13"705E11

Bt.u XII1I" procedure

Beset ot CASTB

lerUD Btu III1S

tzpected: 'Statosiu'; Berun P.tn X"'F

Type 2 and 3 CA IfT

-"

o
o
D99-3705E-09

IBft 3705 COftaURICATIONS CONTROLLER
TYPE 2 AND TYPE 3 CHANNEL ADAPTER 1FT SYaPTO! IHDEX
ROUT. EBROR PURCTION TESTED
CODE
(Reg X'SII')

11123

I

e

SUSPECTED CABD
LOCATION(s)

PBOG
BASK

PEALD
PAGE

PETft!
PAGE

COft!ENTS

Invalid crDR (Beg X'5B')
response to dropping
'co ••and-oat'

UB2

IPPPP 01'003

9-250

Beran Btn XII1P

Expected:
-in

request

Expected:
adr-in

Op-in

ERROR DESCRIPTIOH
CA reset

OX12

PRE-TEST.

Rtn XII1P procedure

OX01

Asynchronoas device
end presentation after
setting ~PL prep device
end

~n-tags invalid ia CTDB
(B~g X'SB') initially

UR2

100PP 01'003

9-250

0102

Asynchronous device
and presentation after
setting IPL prep device
end

In-tags' invalid in CTDB
(Reg X'5B') after raising
select/hold out

UN2

100PP OP003

9-250

OX03

Asynchronous device
end presentation after
setting IPL prep device
end
- '

In-tags invalid in CTDB
(Beg X'5B') after raising

l11N2

XOOPP 01'003

9-250

Expected:
only

Op-in

OXOII

Asynchronous device
end presentation after
setting IPL prep dev~e
end

~n-tags

invalid in CTDR
(Beg X'SB') after dropping
co•• and-out

11112

100PP OP003

9-250

Expected:
status-in

op-in &

OX05

Asynchronous device
end presentation after
setting IPL prep device
end

Invalid status in CASTR
(Reg X'SII' byte 0)

UJ2

:InDO 01t002

9-170

Expected:
end

device-

OX11

PBE-TEST reset of
CASTB (Beg X'511')

CASTB did not reset fro.
a CA reset

14J2

XppOO OK002

9-170

OX01

Accept initial status fro.
No-op co•• and. part~.

In-tags invalid in CTDR
(Beg X' 5B')

l11B2

XOOpp 01'003

9-250

r;

• Status-in'
should drop
when 'service-

·Seryice-out' is raised

out '0 is raised
leaving only
'op-in' tag

IQ25

OX01

Accept initial status fro.
Ho-op co •• and. part 2.
'Service-out' is dropped

b-tags invalid in CTDB
(Reg X'SB')

14M2

100PP 01'003

9-250

only 'op-in'
should be up

IQ26

0101

Accept initial status fro.
Ho-op co •• and. part 3.
'op-out' is dropped

~n-tags

invalid in CTDR
(Beg X'5B')

111M2

lOOP!' 01'002

9-250

110

U29

OX01

Stack status of Bo-op
co ••aud. part 1. 'Status-in'
drops with 'co ••and-out'
response to 'status-in'

Invalid in-tags in CTDB
(Reg X'5B')

14M2

loon OF003

9-250

Only "op-in'
tag valid

XII21

OX01

Stack status of Bo-op
co •• and. Part 2. 'Request-in'
up when 'sel/hold-out'
dropped

Invalid in-tags in CTDR
(Beg X'5B')

UN2

:IOOFP 07004

9-250

Only 'request-in'
tag valid

IQ2B

0101

Invalid in-tags in CTDB
Stack status of Bo-op
co ••and. part 3. 'Request-in' (Beg X'5B')
up when 'co ••and-out' and
'sel/hold-out' dropped

14M2

lOOP!' OF004

9-250

Only 'request-in'
tag valid

11I2E

OX01

Bo in-tags after stacked
status suppressed

In-tags in CTDB (Reg X'SS')
not all zero

AIIB2

:IOO 'F OF005

9-250

OX11

PRE-TEST.

Invalid CTDB (Beg X'SB ')
response

14M2

lOOP!' OFOOII

9-250

Exp 'request-in'
Berun Rtn 142B

0101

Present stacked statusPart 1. -'Op-in' and

Invalid in-tags in CTDB
(Beg X'5S')

HB2

XOOFF oPOOq

9-250

Only "op-in' and
'address-in' tags

XII2P

Type 2 and:3 CA 1FT

Btn X42B

~rocedure

in-tag
should be up

:I370SEAA q.5

IB~ 3705 Co!eONIClTIOBS COJTBOLLEB
TYPE 2 lID TYPE 3 CBllHEL ADAPTEB I~T SYKPTOB IIDEI

800T_

ERROl
CODE

~U.CTIO.

TESTED

ERROR DESCRIPTIO.

'address-iu' witb stack status
after 'op-out' and 'sel/bold-

D99-3705£-0"

SQSPECTED CARD
LOCA'rIOl! (s)

PBOG
BASK

FElLD
PAGE

~ETa!

coaaER,s

PAG~

valid

out'
OX11

I~30

OXOl

PRE-TEST.

Btn 1428 procedure

Present stacked status, part

2. CA selected up tbrough

IDvalid erDa (Reg 1'58')
respoDse

UlI2

IOOPF 0'004

9-250

Exp 'reguest-in'
Berun Btn X42P

Ioval1d 1D-tSgs iD erDR
(Beg I' 58')

UJ2

IOOPP OPOOII

9-250

Only 'op-in' taq
valid

'op-out', 'sel/bold-out', and

'co•• and-out'
n31

Present stacked status of
CE-DE on lo-op cossand

Invalid iD-tags in erDR
(Reg 1'58')

AQR2

IOOFP OFOOII

9-250

Only 'op-in' and
• Bto tus-in'
tags vahd

0102

PreseDt stacked status of
CE-D!l 00 lo-op cos.and

IDvalid status iD CAST!
(Reg I ' 5'1'1

UlI2

IFFOO OF004

9-170

Only CE-Dt
status valid

0111

PRE-TEST.

ltD

procedure

IDvalid erDa (Reg 1'5B')
response

A4112

IOOFP OFOOa

9-250

'op-in' and
· address- in': Berun
Btn IQ2£<

0112

PRB-TEST.

BtD 1430 procedure

Invalid erDR (Reg I'SB')
response

14M2

100'1' OF004

9-250

Expec~cd:

142~

~

Iq32

,

0101

0101

Present

~ero

stacked status

on Mo-op co •• and

EXp

Be::un

lnvalid in-tags in erDB
(Beg I' 58')

IOO'F

O~OOQ

9-250

P~n

'op-in'
lQ30

Only 'op-in' and
• statuS-.l.n t

tags valid

Iq33

Iq34

0102

Present zero stacked statns
on Ko-op co •• and

Statns in CASTB (Beg 1'54')
not all zeros

DIll

PRE-TEST.

Rtn 142' procedure

Inyalid crDR (Reg X'S8')
response

0112

PBE-TEST.

Btn U30 procedure

IDVUlid erDB (Beg 1'58')
response

0101

Co •• and reject response to
all iDyalid co •• ands

Cos. aDd reject bit iD CAS.SB
(Beg 1'53' bit 0.0) Dot set
by invali4 co •• and

0102

Onit check respoDse to all
invalid co •• ands

Invalid status in CASTP
(Beg 1'511')

01"

PRE-TEST_ Beset of CASKSR
[Beg 1'53') aDd CASTS
(Beg X' 54')

C1SHSB or CASTB did not reset
after Cl reset

0101

Set InterYention required
bit in C~SNSR (Reg 1'53'

Intervention reqnired bit
in CASRSR Dot set or invalid
status in CASTB (Beg 1'54')

bit D.1)

I~POO

01(006

9-170

1001"

O~OOQ

9-250

Expected:
'op-in'
and 'addr-in'; Beru
Btn 1421

UlI2

100"

01'00Q

9-250

Expected:
'op-in';
Beran Btn 1430

AIIJ2, AIII(2

18000

O~OOQ

9-150

IOEOO

0~003

9-170

UJ2

II'I'1'F 01(003

9-220

AIIJ2

I'PPF

0~004

9-1QO

~4J2

Expected:

QC

Expected
statuE: CE, and
DIl, and DC;
byte 0 of .ask
sense and byte
of .askCIIsta tus

IQ35

0111

PRE-TEST. Beset of CAS.Sa
(Reg X'S3"
and CASTE'
(Reg 1'54')

CASISB or CaSTS did not reset
after Cl reset

14J2

I'FI'F 01(003

9-1110

OXOI

Set abort,b~t in CASNsa
(Reg I ' 53 1 bit 0_ 7)

Abort bit in CAS. 58 not set or
invalid stlltus in C~STB
(Beg 1'54')

A4J2

IFPFP

0~005

9-140

ClSRSB or CASTR did Dot reset
after Cl reset

AIIJ2

IFFFP 01(003

9-1QO

Expected status:
QC;
byte 0 of sask:
sense and byte 1
of .ask=sta tus

0111

Q.6 1370 SEU

PRE-TEST.

Reset CASHSa
(Reg X'53"
and CASTS
[Reg 1'54')

Type 2 and 3 Cl IPT

o
IEft 3705 COB~OHIC1TIOHS COHTROLLEB
TYPE 2 liD TIPE 3 CHANNEL 101PTER IPr SIBPTOB IBOEI
BOOT. ERBOR PONCTION TESTED
CODE
1&36 OXOl Bns-ont Cbeck cansea by bad
parity on cbannel Test 110
co •• ana

Iq38

ra3A

XQ3B

EBROI DESCRIPTIO.

D99-)70Sl-09

Bns-out Cbeck ana Equip.ent
Check bits in CAS.SB (le9
1'53' bit 0.2) not set or
in"alid statas in C1STI
(leg I' 5.1' )

SUSPECTED ClBO
IOCATIOR (s)

PROG
IIASK

111.12

XYYYY

14.12

0102

8us-out check causea by bad
parity on cbanDel Irite
co •• and

Sa•• as abo"e

OXOJ

8as-out cbeck cansed by bad
parity on cbanDel Bead
co ••• na

Sa.e as abo"e

OXOa

Bns-oat Cbeck caased by baa
parity on cbannel lo-op
co •• and

sa.e •• abo.,e

0105

Bas-out Cbeck caased by bad
parity OD cbannel SeDse
co •• and

0106

YEiLD
PAG!
OKOO"

COftftENTS
Expected:

eUS-OOL

Cbeck and Equl.p
Check and UC:
Bask byte O=sense
and ~ask byte I-st.
IPPPY OIOOa

9-140

Sase as above

IPPPP OlOoa

9-1110

Sase as above

AtJ2

IPYPP 0100", 9-140

Sa.e as above

Sa.e as abo"e

lIIJ2

IPPPY OKOOa

9-1QO

Saae as above

Bus-oat cbeck cuesed by bad
parity on Irite Break co•• and

S•• e as abo"e

UJ2

IPPPP OIOOa

9-IQO

Saae.s above

0107

La".l 1 interrupt occurring
due to bus-oat cbeck

Le"el, interrupt did Dot
occar

12000 0.1001

9-500

0108

Chan Bas Out Check bit (leg
X'S6' bit 0.6) set becaose of
bsd parity on bas ont lines

Chan Bus Out Check bit not
set because of bad parity
on bus out lines

OX"

PIE-TEST. leset of C1S'Sa
(Beg 1'53') and C1STB
(Beg X'S~')

CAS'SB or CASTB did not r . .et
after ClI reset

OXOl

Unit Exception (UE) set by
cbaunel trite coa.aua '1itb in
and out CllB "alid latcb not
set

Onit Exception not set in
C1STa (Reg 1'54')

0102

Onit Exception (UE) set by
cbannel aead co.annd 'lith in
and out CIA! ".lid latch not
set

0111

UP2

IFPFP ONOOl

IPPYF 01003

9-140

111.12

UYPP 0(00)

9-170

Bask byte O=sense
"ask byte '.sta~us

Unit Exception not set in
CASTB (Beg 1'54')

UJ2

InFF OK003

9-170

lIask byte O=sense
lIask byte l=status

PBE-TEST. leset CAS'SB
(Beg X'S3') and CASTa
(Re9 I' Sa')

CASWSB or CAST! 4id not reset
after Cl reset

AtJ2

Inpp OlO03

9-160

0101

Issue in"aUd co •• and: stack
and present stacked status

Co.aand reject bit in CAS IS!
(Beg 1'53' bit 0.0) not
set or in"a1id status in
CASTB (!eg I'Sa')

111.12

Inn OKOOa

9-160

E:rpected status:
OC;
lIask byte O-sense
Bask byte 1~statDS

DIal

Issue '1a1id co•• and 'lith bad
parity: stack and present
stacked status

Bas-out cbeck and equip.ent
check bits in C1SISB
(Be9 X' 53' bit 0.2) not eet
or in.alid status in C1STB
(le9 1'511')

UJ2

InPF OKOOII

9-'60

Expected status:
CE, DE, and OC
status
Bask byte O-sense
Bask byte '-status

OX02

Sa.e as abo"e

Le'lel 1 interrapt fro. bus-out
cbeck did Dot occur

laK2

12000 OJOOt

9-160

OXOl

Issue channel 'o-op coa.and:
sta~k, present and accept
stacked in itial statas up
tbrough raising 'ser"ice-out'

In"a1i4 tags in CTDR
1.12
(Beg I'SB'): 'status-in' did
not fall wben 'ser"ice-out' was
raised

IPPPF OP003

9-250

'Op-in' only intag e:rpeeted

0111

PRE-TEST.

J:n"ali4 C1STB (Reg X' Sa ')
response

1412

IP},OO oPOOq

9-160

Expected: CE end
DE; Rerun Btn 1.31

0101

Issue Channel Wo-op co •• ana;
stack, present and accept
stacked initial status

Invalid tags in CTDB
AaW2
(Beg I'SB'): 'status-in' failed
to droF when 'ser"ice-out'

IPPF}, OY003

9-250

'op-in' oDly
tag expected

Type 2 aud 3 Cl IYT

Btn Ia31 procedure

I370SE11 q.")

i~

IB! 3705 CO!!OBIClTIONS CONTBOLLEB
TYPE 2 AND TYPE 3 CBAIBEL ADAPTER IFT SYSPTOB IIDEI
lOOT. EIIOB FOleTIOI TESTED
CODE
0111

PRE-TEST.

Itn 1431 procedure

~BBOI

099- 3705E- 09

DESCBIPTIOI

Inyalid ClSTI (Reg X'SQ')
response

SOSPEeTED CABO
LOCA TIO I Is)

PBOG
BISK

PEALD
PAGE

PETS!
PlGE

1 .. 2

IFPOO OPOOII

9-ltO

COftftENTS

Expected:

eE and

DE status; Rerun

Itn 1431
0112 PIE-TEST.

X.3D

ltD 143l procedDre

Xnnlid ~DI (leg X'SB ')
response

UI2

IPFFY OF003

9-250

Berun Rtn

I43~

0101

Issoe !nyalid cos. and and
accept initial statns

IDyalid~n-tags in CTDB
A482
(leg X' 58'): '.tato .... in' failed
to drop vben '.erYice-oot' case
up

IOOFY oF003

9-250

'Op-in' only intag expected

0111

PBE-TEST.

lnTalid CAST. (Beg X'SQ')
response

IPPOO OItOO"

9-170

BerUD BtD X433

0112

PIE-TEST.
'Statos-in'
yespon •• to dropping 'cossand

''''2

100FY OFOOII

9-250

lerun Btn 1433

Btn XQ33 procedore

XnTal1d CTD. (leg 1'58')
response

-out'
IQ3E

IqQO

0101

accept initial statns fros
all valid co •• ands vitb
bad parity

Inyalid-!n-tag •. in erDI
Aql2
(leg X'S8'): 'status-J.n' failed
to drop vben 'service-oot' case
op

IOOFY OFOO)

9-250

'Op-in' only iotag expectea

0111

~BE-TEST.

Level 1 interrupt
on bus-oat cbeck

Level 1 interrnpt did not

14lt2

12000 QJOOl

9-500

Berun Btn 1436

0112

'PBE-TEST.

Btn XlI361'rocedure

Xnvalid CASTB (leg X' SQ')
response

AIlJ2

IFPOO QItOOq

9-170

Expected: OC statu
Rerun RtD %436

0113

PBE-TEST.

Btn 1436 procedure

Invalid CTDI (leg X'S4')
nlsponse

UB2

XOOFY OF004

9-170

Expected: 'status-i
and 'op-in t ; Rerun
Btn 1436

0101

sen.e co.sand does not reset
C1S.SB (leg 1'53')

casasl (leg 1'53') vas re.et
by Sense cos.and

AIIJ2

XFYOO QK006

9-150

OX02

ao-op cossand does not reset
CASISI (Beg 1'53')

CAStSI (Beg 1'53') vas reset
by 1I0-op co ••and

AqJ2

IPPOO OK006

9-150

0103

Test 1/0 cossand does not
reset CISaSI (Beg 1'53')

CISISI (Beg X'S3') vas reset
by 10-OP co.sand

liiJ2

tFPOO OKOO6

9-150

0111

PRE-TEST. Reset of caSISI
(Beg 1'53')

CaS.SB did .ot reset witb
Cl reset

IIIJ2

IPFOO OK006

9-150

0101

Issue cbannel Test·I/O
co •• and after stacked stat os
for lo-op co •• and

Invalid C~STI (Beg X'Sq') or
eTDI (Reg I' 58')

Jl.QJ2, AQI2

XFYFF 01t006

9-170
90-250

occur

• Status-in'
sboold be up
vitb Cll, DE
stat.us;

Bask byte O=statos
Bask byte l-tags in
~ssne

a cbannel Test 1/0
co •• and after stacked statns
for Ia-OP co.sand vitb bad
parity

Invalid C1STR (leg X'S4"
erDI (Beg 1'58')

OX',

PRE-TEST. Levell interrupt
frOB valid co.sand with bad
parity
I

Level 1 interrupt did not

PIE-TEST.

Invalid CTDR (leg X'S8 ')
response

UB2

Inva11d CTDB (Beg I'5S')
response

UII2

IOOFP gP004

9-250

Expected: 'requestiD' Rerun Rtn 1439

10 level 1 interrnpt

Jl.U2

IOOFP 03001

9-500

Rernn Rtn Iq39

0112

RtD 1:439 procedure

0113

PIE-TEST.

0114

PRE-TEST.
Level 1 interrupt
fro. bus-oot cbeck

4.8 I3705E11

Itn IQ39 procednre

or

lllJ2, 1412

0101

IFFFP OKOOq

9-170
9-250

Expected: 'statnsin' and 'op-in' up
vith Cll, DE, and DC
Bask byte O-status
Bask byte l=tags in

12000 OJOOl

9-500

Berun"BtD %439

100FY OFOOII

9-250

Decal"

Expected: 'op-in'
'stat as-in':
ReruD RtD 1439

and

Type 2 and 3 ClIFT

o
o

"-~~~"--~-~--

lEI 3705 COISDWIC1TIOWS COITBOttEB
TYPE 2 AID TYPE 3 C8AIIEL ADAPTEB xrr SYBPTOB XIDEX
BOOT. BBIOB ~UICTIO. TBSTBD
CODE
0101 X.eae e Chaa Test XIO
co •• aDd afte~ atatue stacked
oa 'o-op co ... ad ••4 brla, ap
'eer"lce-oat'

laa3

ruS

r •• 7

lDaB

lDU

Ita XU, procedure

~IIOI

O99-370SE-09

DBSCIXPTXO'

svsnCTID CUD
LOCITXO. (s)

PIOG

JlISK

rULD
P1GE

rETIII
paGE
9-250

11112

nopp OP003

byaUd napoa .. ia C1S.SI
,Beg X'S3" o~ C1STa
(leg X'SII"

111072, 11112

XPPPP OK004

9-110 -Beraa BtD 14111
""60

11"2. UI2

Inn OKOOI

9-160
9-2S0

0111

nlt-UST.

OXO'

x.sae • ebaaael Brite
co •• aad afte~ stat. . staCked
oa Io-op co•• aa4

~ayal1d

0101

Xssae • cbaaael Br1te co•• aa4
after stat as stacked aD
1a"aUd co •• aad

Xa"al1d CISTI (1.9 I'Sa')
o~ CTDI (Be, X'S8')

ox 11

nlt-TEst_ D~oppiag 'co•• aadoat' brla,. up 'stat..-la'

Xa-tag. iII".11d i1l eTDI
(Ie, 1'58')

1812

XOOPP or003

9-250

OX12

PBE-US!. Xaitial selectioD
up to tcoa.aad-oat' up .ad
teel/bold-oat' dowa

Xa-ta,. iayali4 ia CTDI
(Ie, X'58')

11112

xoo~r

or004

,..2S0

Or01

%Ssae CbaDDel Be.4 aad Brite
co ••aDd. aftar iater"eatioD
reqaire& aad abort bite are
eet iD CAS.SI (Ie, XtS3')

CISISI 'e, X'S3') aot
~e.et after cbaaael .ea4 or
B~lte co•• aad.

1""2

or11

PIB-TEST. Sat abort ..4
iate~"eatioD required bits ia
C1SUB (Be9 XtS3')

%aYal14 CISI5I

UJ2

or01

Xaitlal aelectioa .a4 selecti"e-re.et after iaterYaatioD
require4 aad abort bit. .~a
eet iD CASISB (Beg X'S3',

CISISB (le9 X'S3') aot ~et
iDitia1 .elactioa or
selectiYe reset

Or11

.. It-TBST. Sat abort &lid
iater"eDtioD reqaired bit. iD
C1S'SB (Ba, X'S3',

XDYal1cJ CASU!

or01

Selecti"e reset after lo-op
co •• aDd aa4 iaitia1 stat as
preseDtea

OX01

O~

xpppp OItOOl

'Op-iD' only tag

1~

expected up

Expecte~: 'statasia' aDd 'up-iu' tag
ap witb basy. and
CI and DE status;
.a.k byte O-statas
.a.t byte 1-tags-in

Expected: 'statasia' aDd 'Op-iD' tag
ap witb Basy
aad DC .tatas;
.ast byte O-statns
.ast byte 1-tags iL

,..,ao

lixpected: 'UP-J.D'
".ad 'statas-iD.
leran It II I II 1F •
Expected: 'reguestia'; BeruD ltD SII3S

lerun ltD X1l311
-and xII3S

XPPOO OItOOS

"'180

,..1110

XPPOO OItOOS

""10

le~ua Ita X1I311
aDd xU5

laya11d ill-tags ia eTDB
(Ie, X'S8') o~ ia'l'81i4 C1STI
(Ie, X'S")

xrPFr OP003

9-250" Ixpected: 'seleet,..,60 ia' oDly;
lIaslt byte O-stat1l&
lIask byte lata,s in

Selacti"e ~asat after lo-op
co •• aDd witb bad parity aad
statDs praseDtad

Xa"alid ia-tag. ia'crDB
ele, X'S8') or lay.lid ClSISI
(Ie, X'S3')

XPPPF OP003

9-2S0
9-,.0

Expected: 'selectia' oaly;
lIast byte O~statns
lIaslt byte I-ta,s in

OX',

PBB-TES!. presaat statas
after lo-op co .... d witb
ba" parity

Xa"ali4 CAS.SI eleg X'S3')
ao Le"el 1 iater~apt

XPPPP oltOOq

9-500

Bxpected: Sas-out
cbeck aDd e9uip"l1~
checlt bits. Berlll>
BtD XU6.

or12

PIE-TEST. P~eseat stat as
afta~ .o-op co•• aDd witb
bad pa~ity

XD"alid C1STB ele, X'SII')
ia"ali~ CTDI Cle, X'SS"

XPPPP OItOOQ

9-160
9-2S0

Expected: DC aDd CE
and DE stat (byte 0

Selecti"a reset afte~ aa
ia"aUd co .... d aa4 statas

Xaya114 la-tags ia CTDI
(Ie, X'5S') o~ ll1Y811d OSISI

afte~

111072

o~

.11072

I

raac

COllftE.TS

bYal iD-ta,. 18 CTDB
(Beg X'S8"

CASTB (leg 1'511')
CTDI ,Ie, X'S8')

--

OX01

Type 2 aad 3 CI XPT

o~

aD4 'op-iu' and

·S~

ia' ta,s (byte II.
IUUD BtD X1I36.

UI2, 111072

XPPPP OP003

,..350 "Ixpected: 'select9-,.0 il\' oa1y;

I13705Ell 11.9

Ille 3105 coe~UNIC~TIONS CON'): !!OLL £lI
TYPE 2 AND TIPE 3 CHANREL ADAPTEB IPT S111PTOII IlIon

D99-3705E-09

'"
,i

BOUT_ :eRBOB PDRCTIOII TESTEll
CODE
presented
OX "

PRE-TEST. Present status
after in" .. lid co •• and

'. EBROB llESCIIIPT:10N

SDSECTED CARD
WCUIOI (s)

(Reg X'S3')

PBOG
11151(

PEALD
PIGE

PETe II
PIGE

COlleENTS
Bask byte O=Sens(
Bask byte 1=taqs l.t.

In"alid C1SRSa (Reg X'S3')
or in .. alid CASTR
(Reg X'Sq')

lQ"2. IU2

IPPPP 011:003

9-160

Expected:

(byte

')

Btn 143,

IUD

0101

Sense co •• and test, part 1:
initial selection through
raising 'ser .. ice-out'

0111

PBE-TEST. Set inter'Yention
Inv .. lid CISaSB
·required in CISRSI (Beg I' 53',)

0112

In"alU in-tags in CTDB
(Beg I'SS')

COllmand

reject bit in
sense (byte 0)
an~ OC stat.us

.

Rer:J:t.

1.11112

IOOl'P OF002

9-320

Expected: top-in'
only

UJ2

IFPOO 01t003

9-320

Expected: lnter"ention required
bit. BeruD
IItn X434

PRE-TEST. Set Inter"ention
In ... 11d CASISI or in"alid CAS'll AqJ2
lIeqnired in C"S.S8 (Reg 1'53') (Beg I'Sq',

n'PPF OK003

9-320

Expected: Int.ery.ntioD required
bit in sense
(byte 0)
Rerun Rtn I43q

.

0113

PRE-TEST. Tag cbeck after
dropping 'co •• and-oot'

1n"a114 response in CTllll
(Ileg 1'58')

UI2

loon OF003

9-320

Expected: 'op-ill"
and ·status-1n'.
lIeruD 11th I q 11'

laU

OXOl

Sense co •• and test. part 2:
initial selection throuqh
dropping • ser.ice-out'

:1n"alid in-tags h
(Beg I'SB')

CTD!'

"lin

loon 01'003

9-320

Expected: 'Op-ill'
aod 'service-1D' on

lqllP

0101

Sense co •• and test. part 3:
In .... 11d in-tags in CTDB
initial selection throuqh
(lleg I'SS',
raising • sar-,ice-out' a second
ti.e

un

1001'1' OP0 92

9-320

Expected: • op-i 'D.
only

0111

PlIE-TEST. Btn
procedure

1n"ali4 in-tags in CTDII
(Beg I'SB')

lIII2

100rF OPOOl

9-320

Expected: ·op-in·
and 'service-in '.
BerUD Btn I411E

CI01

Sense co •• aud test. part q:
initial selection through
dropping 'ser"ice-out' second

Invalid CISTII (Beg I'Sq', or
inv .. 11d in-tags in crDR
(Reg 1'58')

lU2. U"2

UFPJ' 01'003

9-320

2xpected:'status-in' and 'op- in' IU
CE and DE only;
Bask byte O=statns
Bask byte 1=intags

USO

lilliE

tiae

H51

0111

PBE-TEST. Rtn lilliE
procednre

Innlid in-tags in CTDI
(lleg 1'58')

UII2

IOOFF 01'003

9-320

Bxpected: 'OP-10'
and • aerY ice- in' ..
lIerun Btn lilliE.

0112

PRE-TEST. IItn IliU
procedure

Inv .. lid in-tags in CTDB
(lleg I 'SS')

UI2

IOOPF 01'002

9-320

Expected: 'op-in'.
Berun Btn filliP

0101

Sense co •• and test, p.. rt 5:
initial selection through
dropping , sel/hold-out'

In .. alid in-tags h
(Beg I'SS')

CTDB

""12

loon OP003

9-320

Expected: 'statusin' and 'op-in' on!

01~1

PIlE-TEST. Rtn nilE
procedure

In .. a11d in-tags in CTDR
(Reg 1'58')

UI2

1001'1' 01'003

9-320

Bxpected: 'op-in'
and 'service-iDle
Berun Btn 11I4E

0112

PRE-TEST. IItn 1411P
procedure

In"ali4 in-tags in CTllB
(Beg 1'58"

1".2

:t001'1' OP002

9-320

Expected: 'op-in'.
Berun Btn XIIII1'

0113

PBE-TEST. IItn XII50
procednre

:1n1'a1i<1 in-tags in CTDB
(lleg 1'58')

""112.

loon OP003

9-320

Expected: lop-in'
and • stat.os-in· ...

Sense co .... nd test, part 6:
initial selection through
raising 'seryice-ont' a third

:tn-tags not all zero in CTllB
(Reg I'SS')

I

US2

.

0101

".10 I310SEH

,,",12

Rerun IItD 1450
11112

IOOl'F 01'003

9-320

Trpe 2 and 3 CA IPT

o
o
o
o

BOUT. !lROI PUICTIO. TESTED
CODE

EIIOI DISCIIPfIOI

SOSPECTED ClID
LOCaTIOI(s)

PROG
8ASK

PEILD
PAGE

PET!!
PAGE

1. .2

100PP OP003

9-320

COft!!NTS

'ti ••

0111

PI II-TE S':. Ita 1/10

proceilure

Iayalid iD-1:a9S
(ae9,1'58')

~D

CTDI

Expected:
Reran

XOOPP OP002

9-320

%Dya114 1D-tags 18 CTDI
(Beg 1'5B')

100PF OP003

9-320

%8ya114 la-tags 18 CTDI
(B8g I'SB')

IOOPP OP003

OX12

PIE-TEST. BtD I"P
proceilure

%Dyal1d 1a-tags 1D CTDI
(1Ieg X' 5B')

OX13

PBE-TEST. BtD x.50
procedare

0I1a

PIli-TEST. BtD X.51
procedare

&/112

'op-~n'

ana ·serVlce-loll'.
~tn

Iuqr

Expected: ·op-~n·.
lIerun Btn IUP
Expected:

'op-~n'

and 'stat as-in I .

Beran ltD 11150

9-320

Expected: 'OP-1D'
and' status-iD' ..

BernD Itn IllS'
UI2

100PP OP003

9-320

%Dyalid in-tags i8 CTDB
(Beg X'511')

UI2

XOOPP OP003

9-320

PIE-TEST. ltD I •• P
procedare

%nyali4 18-tags In CTDB
CBeg X'5B')

un

100PP OP002

9-320

Expected: 'op-in'.
Beran Eta IUUP

PBII-TEST. Bta X.51
proce4ure

18yali4 in-tags iD CTDB
(leg X'S8')

1 .. 2

XOOPP or003

9-320

Expected: 'op-in'

011.

PBII-TEST. ata 1.52
procedure

18yalid la-tags
Cleg X'51')

1 . .2

·IOOPP OP003

9-320

0101

CICIT (Reg 1'52') 10a4iag

CICIT CBeg X'52') 41d Dot 10a4 a.L2
1'03PP'(18 lit) or X'OO"'C20 81t)

X03PP OB002

9-130

OX02

CICIT (Beg X'52') 10a4ia'1

ClCIT (Beg X'52') 41d not 10a4
X'OOOO'

aaL2

103PP OB002

9-130

0103

CICIT (Beg X'52') 10a4ia'1

CICIT (leg X'52') 41d Dot 10a4 I'L2
X'021I'(18 ait) or X'0011'C20 Blt)

103PP OB002

9-130

OXO.

CICIT (Reg X'52') 10a4iD'1

CICIT (leg 1'52') 414 Dot
I'L2
load X'0155'118 B1t) or X'OOSS' C20 Bit)

X03PF OB002

9-130

0101

OUTeIU (le9 X'51')
during chaDDel Bea4 co•• an4

OUTe'IB did Dot lncraae8t bJ
a 08 a coatrol word ~atch

laa2

xrppp OG003

9-430

0101

IICIAB (Be9 x'50') 4nriag
'ri.te co •• and

IIClll (leg 1'50') did
Dot i8cre.eDt b7 4 atter
cODtrol word fetcb

&/Ia2

IPPPP OGOOl

9-3'0

1457

0101

II CI bit in caDB (Beg X'SC'
bit 0.2) 4aring ebannel Irite
co ••and

%1 CI bit and,or chanDel 'rite
co •• and blt Dot ~ound in caDI
CBeg I'SC' bits 1.2 aDd 0.1)

UL2, 111a2

XPPPO OB005

9-390

11158

0101

csal (le9 X'S9') dari8g
CbanDel Irita coa.aDd with
ad4ress of all ODes

CSAI (Be9 1'59') fail ad to
set to all ODe.

"aB2, AaG2

IPPPB OLOOS

9-400

87te 0 and ,
on17: bJte 0 •
&IIB2: byte ,.
14G2

0102

CSAB (leg X'59') 4ariD9 Write
co ••• nd with ad4res. of all

CSII (lag X'59') tailed to
set to all seros

111B2. 1aG2

XPPPE OLOOS

9-400

B7te 0 aud 1
only: bJte 0 •
&IIB2: bJte 1 "
AOG2

CSAR IBag 1'59') tailed to
set to l'IAla'

laB2,l'G2

IPrrE OL005

9-.00

IJte 0 aDd
onlJ: b7te 0UB2; bJte , "

1.53

,0'

D99-3705l-05-

II! 3705 COB!UBICA:IOHS CONTBOLLER
TYPI 2 lID TYPE 3 CH1.3EL lD1PTER IPT SY8Pf08 IIDEI

X.S'

"

,

U55

0101

Sebse co •• aaa test. part 7:
%D-t.gS Dot all sero 18 CTDB
iDitial selectioD through
(Beg X'5B')
4ropping 'serYice-oat' a thir4
ti.e

0111

PIli-TEST. 'ltD XUE
procedare.

0112
0113

~D

CTDB

Expected: 'op-1a'

ana • aery ice- in' ..

lerall Itn XqUE.

and

·sta~us-ill·.

Reran EtD IUS 1
Expected: no intags. Bera D I!~ I)
US2

I

'Zeros

0103

csaB (Beg X'59') darlng Irita
co •• and with address of
X'1AA1'

T7pe 2 aDd 3 CI :lPT

lOG 2

X3105EU 11.11

IBB 3705 COII"OJICATIOHS CONTROI.LER
TYPE 2 AHD TYPE 3 CHAMNEI. ADAPTER 1FT SYBPTOB IIDEI
10DT. EBROS FOMeTIOI TESTED
CODE
01011 CUR (Beg 1'59') during 'rite
co.aand with address of
1'55511'

D99-3705£-09

'I'

)

ERBOI DESCBIPTIOI

"csn (leg 1'59') failed to
set to I'SSSQ'

SOSPECTED CARD
LOCITION (s)

U82, 14G2

PBOG FElLD
IIlS~
PIGE
IFPP! 01.005

FETIIII
PAGE

9-400

COIISFNTS
Byte 0 and ,
only: by~c 0
)"82: byte ,:
AUG2

U59

0101

CSI! (Reg 1'59') duriog 'rite
coaaand with address of
1'30000'

Byte X failure io CSAB
(Beg I'S8') 18 Bit
(Reg %'53') 20 Bit

All 112
10003 OGOOQ
UT2(lIod J,It,L)
OBOOl

CSAB (Beg 1'59') during 'tite
co.aand with addre •• of
I' 00000'

Br te I failure in CSlB
(Beg I'SS') 18 Bit
(Beg 1'53') 20 Bit

111112
lQT2 (llod J

10003 OGOOq
01001

9-400

CSla (Reg 1'59') dnring Irite
co •• and with address of
1' 200 11 0 '

Brte I failure in CSAB
(Raq I'SS') 18 Bit
(Beg X'S3') 20 Bit

111112
t0003 OGoOQ
AilT2(BOd J,It. I.)
OBOOl

9-"00

CSAR (Beg X'S9') dllring trite
co.aaod with address of
1'10000'

Brte I failure in CSli
(Beg X'S8') 18 Bit
(Beg 1'53') 20 Bit

AQII2
10003 OGOOq
1QT21110d J,It. L)
OBOOl

9-400

eSla (Beg 1'59') during Brite
co.aand witb address of
actual storage

Brte I failure io CSli
(Beg I'S8') 1S Bit
(Beg 1'53') 20 Bit

A4112
A4T2(ftod

10003 OGOOq
OBOOl

9-QOO

0101

Ioitial status to seose
coaaand after setting sense
prep unit exception

In-tags iovalid in CTDB
(Beg I'SB')

111112

IPFPP OF003

9-250

0102

Initial status to sense
co •• and after setting
sense prep uuit exception

IDyalid status in ClSTB
(Beg I ' SQ' byte 0)

lQJ2

IPFOO 01t002

9-170

0103

Test Beset of
CASTB (Beg I' 511 ')

CASTa dld oot reset after
the endiog seguence

AliJ2

IFFOO 01(002

Exp: zero statUE

01011

Tag sequeDce, SeDse
DE latcb on

Io-tags inTa11d in CTDB
(Seg I'SB')

lIIH2

10010 OP003

EXP: Iddr.in droF

0105

Cbeck for initial
status

Iovalid status in CASTa
(Beg X'S4' Byte D)

AIIJ:!

IFPOO 01t002

Exp: Zero status

0106

Tag sequeoce

Io-tags ioyalid io CTDB
(Beg x'SB')

UH2

10008 OF003

!:rp: status 1D

Tag seguen ce after

Io-tags invalid iD CTDR
(Beg lr'SB')

14112

10008 OP003

Exp: status drof

raising service out

OIoe

Tag seguence after
dropping service alit

lo-tags invalid io CTDB
(Beg :r'S8')

111M2

10004 OP003

Exp: sery in ur

OX09

Tag segoence afte"
raising seryice out

In-tags ioyalid in CTDB
(Beg x' 58')

10004 OF003

Exp: ser. drop

OIOA

Cbeck for final

Ioyalid status in ClSTR
(Reg z'S/I')

lQJ2

IFFOq 01t002

Exp: Cl,DE,Dt

status

End segueDce
drop seryice oot

Io-tags inTalid io eTDR
(Reg x'SB')

1IIN2

10008 OF003

Exp: status 1D up

EDd seguence

In-tags inyalid io CTD!
(Beg x'SB')

AIIN2

10008 OF003

Exp: status 10 droF

raise seryice out

0100

End segueDce
drop sel out.svc out

Io-tags ioyalid in CTDB
(Beg x'S8')

10020 OF003

!xp: Op In drop

OIOE

Reset senoia OE
latch

Ioyalid status io CISTa
(Reg I' 54)

AlIJ2

IFPOO 01(002

Exp: CE,DE

OIOF

Set both latcbes on
aDd Yerity IPL DE (Beg 1'5,,)
bas precedence

Iovalid status iD

HJ2

IFPOO 01t002

Exp: OP

0111

PRE-TEST Reset of
CASTB (Reg 1'511')

CASTS did oot reset frOB
Cl reset

AliJ2

XPFOO 01t002

9-170

0101

OOT CII bit

Out CB bit and/or Bead cosBand

14L2

XFOPO OBOOS

9~qQO

0102

0103

OXO/l

DIOS

XQSA

0107

OIOB
DIOC

IaSD

Q.12 I370SEH

io CIIDB (Reg

CAST~

.It, L)

J,~,l.)

Exp: OP-10 &
sel/hold & sta~us
1D
Exp:

oDi~

exception

DC

Type 2 aod 3 CA 1FT

s~at.u!'

~F

IE! 370S CO!ftOBICATIORS COITROLLER
TIPE 2 IBD TYPE 3 C81RIEL IDIPTER IPT SIftPTO! IBDEI
BOOT. ERROa
CODE

~UBCTIOB

TESTED

EBRO! DESCRIPTIOJ

X'SC' bit 1.0) daring Read
coBBand

bit not found in CRDR (Beg X'SC'
bits 1.11 and 0.2)

D99-370SE-09

SUSPECTED CIRD
LOCATIOR(s)

PROG
!ASK

PEALD
PAGE

PET!!
PAGE

IIIL2

XPOPO OROOS

9-4110

CO!REJTS

USE

0101

Check Oat Stop CII bi.t in
CRDa (Reg X'SC' bit 0.1)
during Read cOBBand

Ont Stop CII bit and/or Read
Coaaand bit not found in caD!
(Beg I'SC' bits 1.1 and 0.2)

X'60

OX01

~

CII bit in CRDa (Reg X'SC'
bit 1.3) daring write fetch

'Iddress in' XBCRIB (Beg 1'50') AIIL2, IIIR2
does not aatch address of CR
to which TIC points

XPPPP 08001

9-4110

X'61

OXD1

Chain bit in XBCIIIR (Reg
1'50' bit 0.3) sets Ya1id
1atch in CICRS (Beg X'SS'
bit 0.2)

Chain bit in CII did not set
valld 1atch

A'L2

12000 08005

9-4110

OX02

10 chain bit in IICRla resets
va1id 1atch in CICRS

10 chain bit in CII did not
reset valld 1atch

14L2

12000 08005

9-11110

0101

Chain bit in OUTCIIAR (Reg
X'S1' bit 0.3) sets va1id
1atch in CACRS (Reg 1'55'
bit 0.3)

Chain bit in CII did not set
va~id 1atch

AIIL2

X1000 08005

9-11110

0102

Bo chain biot in OOTellAR
resets va1id 1atch in CICRS

Bo chain bit in CII did not
reset valld 1atch

IIIL2

11000 08005

9-4110

0101

Chain bit in Out Stop CII
(Reg 1'51' bit 0.3) sets
va1id 1atch in CACRS (Reg
1'55' bit 0.3)

Chain bit in CII did not set
valld latch

I'L2

11000 08005

9-4110

0102

10 chain bit in OOTCIIIR
resets va1id 1atch in CICRS

10 chain in CII did not reset
va11d 1atch

lIIL2

11000 08005

9-4110

0101

7ransfer byte bits in CBODR
Transfer Byte 1 bit not on
(Beg. 1'58' bits 1.2, 1.3)
and/or transfer byte 2 bit
after Read coaaand to
not off
'service-oat' is up in response
to initia1 statas

111112

10030 OG001

0101

lIead 1023 bytes (18 Bits)
or 255 Bytes (20 Bits)

ClleBT (Reg X'S2') failed to
decreaent properly

AIlL 2

103PP 08002

9-11110

CSIR (Reg 1'59 ' )
contains fai1ing
address

0111

PRE-TEST. Chain bit in
OUTeIIB (Reg X'S1' bit
0.3) sets valid 1a~h in
CACRS (Reg X'SS' bit 0.3)

Invalid CICRS (Beg X'SS')

I'L2

13000 08005

9-4110

Rerun Btn
%1162

0101

Access a11 va1id addresses
with CSAR (Reg X'S9')

CSAR (Beg X'S9') did not
proper1y increaent +2 froa
1ast data fetcb

A4P2, A4112

3PPP:P OBOOS
or
7PPPP

9-4110

18 Bit

0111

CSIR did not increaent
PRE-TEST. lncreaent of CSIR
(Reg X'S9 1 ) after Out-CII fetch

3l'Pl'P OG003
or
7l'PPP

9-11110

X'62

11163

n

u
11165

11166

11167

20 Bit
18 Bit
20 Bit

0101

Cycle steal froa data address
of progressive ones

Inva1id address pattern in CSAR 111112,1482.
(Beg X' 59 1 )
AIIG2

3l'P:PP OLOOII
or
l'PP:PP

9-11110

18 Bit
Byte I =1"!2
Byte 0 =A1I82
20 Bit
Byte 1 =IIIG2

0102

Cycle stea1 fro a data address
of f10ating zeros

Inva1id address pattern in CSAR 1'112.1482.
(Reg 1'59 ' )
IIIG2

3PPPP OLOO'
or
:Pl'PP:P

9-1140

18 and 20 Bit
saae as Ibove

Type 2 and 3 CA IPT

X370S8AI 4.13

Iae 3105 COHHUNICATIONS CONTROLLER
TYPE 2 AND TYPE 3 CBANNEL ADAPTER 1FT SYHPTOe INDEX
ROUT. ERROR FUNCTION TESTED
CODE
XII68 OX01 Fetch Out Ci with flags
X'OO'

XII69

XII6A

XII68

XII6C

XII6D

D99-310SE-09

ERROR DESCRIPTION

PROG FEALD
eASII PAGE
XFFOO 011002

FETe!!
PAG!
9-1140

Level 3 interrupt did not occur AIIF2, AIIK2

X1000 OJ001

9-11110

Invalid CASTR (Reg X'54')

XPFOO OK002

9-1140

Invalid CASTR (Reg X'511')

SUSPEC'l'ED CARD
LOCATIOIl (s)
AIIJ2

COHeEIiTS
Only CE
expected

OX02

Fetch Out Ci with flags
X'OO'

OX01

Fetch
X'01'

OX02

Fetch Out C8 with flags =
X'01'

Level 3 interrupt did not occur AIIP2, AIIK2

X0010 QJ001

9-11,,0

OX03

Fetch Out C8 with flags =
X'01'

Chaining to next C8 failed

XS10" OBOOS

9-440

OX04

Fetch Out CW with flags
X'01'

Invalid CACRS (Reg X'SS')
prior data transfer

AIIL2

XS1PII OK002

9-1140

-~X05

Fetch Out Ci with flags
X'11'

Invalid CASTR (Reg X'511')

AIIL2

XFFOO OK002

9-1140

Ol06

Fetch Out Ci with flags =
X'11'

Level 3 interrupt did
occur

l1lF2. AIIK2

X0010 OJ001

9-440

OX07

Fetch Out Ci with flags =
X'11'

Chaining to next Ci failed

AIIL2

XS1011 QBOOS

9-IIQO

0~08

Fetch OUt CW with flags
X'11'

Invalid CACRS (Reg X'SS')
prior data transfer

AU2

XFPOO QK002

9-IIQO

OXD1

Zero Ct OVerride bit in CACH
(Reg X'55' bit 0.1)

Override bit not on with flag
bits = X'10' during Ci fetch

AIIL2

X4000 QBOOS

9-4110

0~02

Zero Ct Override bit in CACR
(Reg X'SS' bit 0.1)

Override bit on with flag
bits
X'OO' during Ci fetch

lIIL2

XIIOOO OBOOS

9-440

OX01

Out C8 with flag = '10'

Zero ccunt override bit did
not cause Level 3 interrupt

AIIK2. AIIL2

X0010 OJ001

9-IIQO

OX02

Out C8 with flag = '10'

CASTR (Beg X'S4') not set
to all Zeros by zero count
override bit

AIIJ2. AIIL2

OX01

Out Stop CW with flag = '00'

HO Level 3 interrupt or CE
status only not in CASTR
(Beg X' 511')

AIIL2.AIIK2,
AIIJ2

XFFOP OBOOS

9-11110

Status = byte 0;
Level 3 interrupt
Byte 1

aX02

Out Stop CW with flag

'10'

Ho Level 3 interrupt or CASTR
(Reg X'Sq') not set to all
zeros

AIIL2,AIIK2,

XFPOP OBOOS

9-4110

Status = Byte 0;
Level 3 interrupt
Byte 1

OX01

Oot Stop Ci with flag

'01'

Level 3 interrupt or CASTB
{Reg X'SII'} not having CE
+ DE statns only

AIIL2.AIIK2,
AIIJ2

XPF01 QBOOS

9-4110

Status = Byte 0;
Level 3 interrupt
Byte 1

OX02

Out Stop Ci with flag

., "

XFF01 OBOOS

9-11110

Status = Byte 0;
Level 3 interrupt
Byte 1

Ou~

CW with flags

=

~ot

llIL2

HO Level 3 interrupt or CASTR
(Reg X'SII') not set to all

zeros
XII6E

Ol01

In CW with flag

'aD'

BO Level 3 interrupt or CASTR
(Reg X'S4') not baving CE
only status

AIIL2.AIIK2,
A4J2

XFFOl OBOOS

9-1140

Statns = Byte D.
Level 3 interruFt
Byte 1

XII6F

OX01

In CW with flag

• 0 l'

Level 3 interrnpt or CASTR
CReg X'SII') not set to all

A4L2. AIIK2,
AIIJ2

XFP01 OHOOS

9-440

Status = Byte 0;
level 3 interrupt
Byte ,

OX"02

In CW with flag

I"~,

XFFOl QBOOS

9-440

Status = Byte 0;
Level 3 interrupt
"Byte 1

XFFPP OHOOS

9-11110

zeros
Bo Level 3 interrupt or CASTR
CReg X'SII') not set to all

zeros
OX03

INCiAR address=zero

11.14 X3'16SEAA "

IBCWAR address not zero

AIIL2.AIIK2,
AIIJ2

Type 2 and 3 CA 1FT

o
IBB 3705 COBBUIICATIOIS COITIOLL!B
TIP! 2 AID TIP! 3 CBANI!L ADAPT!I 1FT StBPTOB IID!1
IPUT. £IB08 PUICTIOI TIST!D
CODl':
1'70 or01 I. CI with fl., • '10'

D9 9- 37 05 E- 09

IBIOI DBSCBIPTIOI
10 LeYel 3 interrupt or CISTB

Ie, X'511')
zero.

~ot

set to all

SOS1'I:CTl':D CABD
LOCIUOI(.)
I"L2,I"l2,
UJ2

PIOG rEAtD· rETBB
alSK PAGE
PAGE
IPP01 OBOOS 9-'_0

counTS
Statos • 8y~e 0;
Level 3 1D~erraFt •
8yte 1

1_"

%III

'erify that the CUC
i.cre.. nt. o. cycle .te.l
cycle.

This te.t yerifie. proper increaentia, of the CDC froa cycle
.teal cycles by the adapter
UDder test. CUC y.lae repre.eata a
coabiaatioa of crcle ataal aad
iastrGctioa cycle.. CCO operatioa
of the cue for 11, X2 and %3 cycles
b•• bee. Yerified .1a the CCU
dia,aoatic roatia.a.

11171

0101

'erify that the CUC
i.creaents o. cycle
• te.l cycle.

CUC yalae i. Dot correct after
cycle .teal operaUoa •
Ie, 1'111' • Ictaal CUC yalae
Ie, 1'15' • 81t. 1D error
Ie, J'16' • exp'd. CUC yalae
If a cycle steal error bas
preyioosly occarred ia the
adapter aader teat, tbis teat
is laYalid. If ao prey loa.
errors ba.e occarre4, tbe.
error i. ia tbe CUC area of
the CCU.

1AJ'

CI001

11172

or01

aead with Oat stop CI w1th
ch.i. bit 0., p.rt 1

Iayalid CTDI (Ie, X'S8') .fter
readiD, 2 bytes

11112

loon or003

9-IIqo

'Statas-in' aad
'op-in' 0.11
e"'pected

1'73

0101

aead with Oat Stop CI with
Chai. bit a., p.rt 2

In•• lid CTDI ,Ie, X'S8'. after
bringia, ap 'serYice-oat'

1'12

loon OP003

9-•• 0

'Op-iD' oaly
e"'pectell

1.7,

0101

Bead with oat Stop CI with
Cb.in bit a., part 3

Iu&114 aDI ,Ie, X'S8'j after
ending stata. accepted

1,'2

loon OP003

9-0110

10 is-ta,s
expected

0111

PII-UST.
proce4are

I ••• lid ia-ta,s iD CTDB
(leg J'SB')

"82

%Oorp or003

9-CIIIO

E"'pected: 'Op-iD'
osly
leraa Ita I1173

or01

ChaiR 2 .ead co•••• d.

I ••alid CTDB (Ie, J'SI') after
.oppre.s-oat caae ap

1"2

loon or003

9-270

0102

Ch~i. 2 B•• d coaaand.

Ch.in bit ia CICIS (leg 1'55'
bit 1_0) .et after Level 3
illterrapt

1"2

looao oro 011

9-270
9-'qo

or01

Ch.i. 2 le.d coa.a.d • • Dd ead
oper.tion with chaiaia,
1D4icated

Chai. bit in C1CIS (I., 1'55'
bit 1.0) not set

11112

J0080 orooo

9-270
9- .. 0

or02

Is.ae .ead co.aaad a,.ia
withoat chainia,

Cheis bit is C.CIS (Ie, %'55'
bit: 1.0) .et

• 1112

%00110 oroo •

9-0110

OX01

Isaae Bead cosaaad a~d fetch
TIC CI with addres. aboye

I.yalld CVAB 8ddre.s bit: i.
CACBn (Ie, X'S6' bit 0.0)
did .ot set darisg ~eyel 1
i.terrDpt or 8 leyel 1
laterrapt did Dot occar

ur2

J8020 08002

9-1100

aast byte O-CACUlI
ault tJte '-level ,
iaterrDpt

OX',

PBB1Tl':ST. Iaitial .tata.
after Bead coaaa.d a.d
fetcb of TIC CI.

Is.alid response 1a CTDB
(Be, 1'58') or CIST.

UI2

'%FFn orOOl

9-.110

Expected: DO
.tata. (byte
'op-i.' aad

U77

XH9

Bt. U73

"It

0) ,

tat.at •• -1D'

(byte 1)
XQ71

0101

lssae Bead co••••d and fetch
aa la-type CI

TJpe 2 aad 3 CI IrT

la.alid CI Poreat bit 1.
CICBlB (Beg X'S6' bit 0.1)
did Dot .et dari.g ~e.el 1
iaterrapt or ~evel 1 iaterrapt
4id sot occor

1.P2

:U020 01002

9-UO

last byte O-cACBItlt
Bast byte 1-1e .. e1 1
interrapt

1370SEll '.15

IE" 3705 COe"UNICATIONS CONTROLLER
TYPE 2 ~ND ~!PE 3 CHANNEL ~DAPTEH IYT SY8PTOe INDEI
BOOT. ERROR YUNCTION TESTED
CODE
0102 Issue Read co •• and and fetch
an In-type cw
0103

n7B

Inc

Iq7D

Issue Read co •• and and fetch
an In-type CW

OXOI

Issue Write co •• and and fetch
an Out-type CII

D9 9- 37 05E- 09

ERROR DESCRIPTION
Invalid response in C1STR
(Reg X'Sq')
Invalid response in C1SNSB
(Reg 1'53')
Invalid CV Yor.at bit in
CACRKR (Beg 1'56' bit 001)
not set during level I
.interropt or level 1 interrupt
did not occur

50S PECTED CARD

PROG

I'E~L

LOCl TION (s)
'U2

~lS~

P~GE

D

COf'!.I'!ENTS

11'1'00 QH002

lQJ2

111000 OK005

9-qoO

Iq7F

Expect~d:

vent.ion
lU2

U020 ON002

Inter-

requ~red

CACHKB = Byte 0
Level 1 iDterrup~
Byte 1 of

.'5'

OX02

Issoe Write co •• and and fetch
an Oat-type CII

Invalid response in C1STB
(Beg X'Sq')

UL2

11'1'00 OB002

9-1106

Expected,
Ct.
DE, and DC statu~

0103

Issue Write co •• and and fetch
an Oat-type CII

Invalid response in CAS.SB
(Beg X'S3')

UJ2

111000 OK005

9-1100

Expected:
lnter'fentl.on requl.r-ed

OXOI

~SSQe

Bead com.and and fetch
Cil with address of X'3YYYY'

Data address error bit in
C1COU (Reg X'S6' bit 0.2)
did not set daring level 1
interropt or level 1
interrupt did not occor

HY2

120110 ON002

Invalid C1SNSB (Beg X'S3')
or invalid CASTR (Reg X'S4')

'''J2

Issue Read co •• and; set abort
bit after serVicing initial

0101

~ask

byte

Mask

byte 1=le..-el

~

IFI'YI' OK005

9-4110

statas

1117E

0:.

Elpected:C~,

and DC :;;tatur-

O=C~CH~P.

Expected;

~

bon

bit and Ct"

DE,

and DC;
eask byte O=Secs~
eask byte 1=5tatus

0102

Issoe Read co •• apd; set abort
bit after servici~9 initial
status

Invalid C1CRS (Reg X'SS')

lIIJ2

10700

0~005

9-QIlO

0103

Issne aead co •• an~~ set abort
bit after servicing initial
status

Level 3 interrupt did Dot occur

lq~2

XXIII OJOOI

9-Q40

0101

BaIt I/O during Read co •• and

Invalid in-tags in crDR
(Reg 1'50')

11112

100FY OJ004

9-QeO

Expected:
. request-in'

0102

BaIt I/O during Bead co •• and

~nvalid

.... J2

XFFOO

0~002

9-QaO

Expected:
status

0101

cycle steal fro. data
address of deqressive

Invalid address pattern in CSlB lll82,)lIIB2
(Reg X'S9')
lllG2

3Fl'Y? OLOOII
or
?FYFY

9-230

18 B1t
Byte I
~Qe2
Byte 0 : 11182
20 BIT
Oyte I z 14G2

9-230

5".e as above

C1STS (aego 1'511')

ones

Expected:
ClllP.
valid bit
reset; abort.
bit set

C!

0102

Cycle steal fro. data
address of floating zero

Invalid address pattern in CS1R lQB2,lQB2,
14G2

31'1'FY OL004

0111

paE-TES:t.
Valid address in
CSAR (Reg 1'59') fro.
deqressive ones address

Invalid CS1B

U1'2, AtI!!2

3F7FF OJOOS
or
l'FY?1'

18 Bit
Berun Btn I Q66
20 Bit

PRE-TEST.
Valid address in
(Reg X'S9') fro.
floating zero address

Invalid CSAR

3Fl'FF OJ005
or
YYYFF

18 Bit
Rerun Rtn 11166
20 Bl.t

0113

PRE-17ST.

CliCNT (Reg 1'52')

CIICRT not

'"L2

x03FF 08002
or
IOOYY

18 Bit
Rerun Ptn 145B
20 BH

01111

POE-TEST.

Read 2 bytes

Invalid response in CTDB
(Beg. 1'55')

JlqB2

IOOY!' OY003

Expected

0112

CS~R

0115

PRE-TEST.
Read 2 bytes
& raise ·serv1ce-~t·

II .16 X3705EH

1

nterrupt

~

CIlCNT not=1

2

'op-~'

I serv ~ce- io ' ..
Berun Btu. XQ 12

I03FF 00002
or
1001'1'

1a Bit
Rerun Rtn 1465
20 Bit

Type 2 and 3 ClIFT

aD

o
o
o

IBB 3705 COBBUIIICATIOIiS COli TROLLER
TYPE 2 AIID TYPE 3 CHAIIBEL ADAPTER 1FT STBPTOB I.DEX
ROUT. ERROR PUIICTIOII TESTED
ERROR DESCiIPTIOR
CODE
OX01 110 duplication of nert to last InYalid CASTR (Reg X'S4')
byte after issue of write
coaaand with odd byte count

11180

X1181

XII 82

X1183

111811

D99-370SE-09

SUSPECTED CARD
LOCATIOJ (s)
AIIJ2

PROG PEALD
BASK PAGE
XPPOO Oll:002

PET!!B
PAGE
9-390

CO!!BEIITS
Expected: CE
status

Pirst 2 bytes not written

AIIL2

XPPPP OB002

9-390

OX03

Saae as aboye

Last 2 bytes incorrect

AIIL2

XPPPP OB002

9-390

ax01

Transfer byte bits in CSODR
(leg X' 58' bits 1.2, 1.3)
after read coaaand and
transferring one byte

Transfer byte 1 bit not off
and/or transfer byte 2 bit
Dot on

All II 2

X0030 OG001

0111

PIE-TEST. lItn XII611 pro. sdnre

Transfer byte 1 .bit not on
and/or transfer byte 2 bit
not off

All 112

X0030

OX01

CTDR (Reg X'SB') after
Inyalid response in CTDI
Halt I/O during lead coaaand
after transferring one byte of data

AIIJ2

XOOPP OPOO/l

9-1130

Expected:
, request-iD' onll'

OX02

CTDI (Reg X'SS') after
XDvalld response :in CTDI
Balt I/O during Write coaaand
after transferring one byte of data

1. . . 2

XOOpp OPOOII

9-390

Expected:
'request-in' only

OX03

CAS'll (Reg X'S4') after
Inyalid response in CAS'll
Balt I/O during Read coaaand
after transferring one byte of data

AIIJ2

XPFOO Oll:002

9-430

Expected: CE
stat as only

ax 011

CASTR (Reg X'SII') after
Inyalld 1:8sponse in CAS'll
Balt I/O during Write coa.and
after transferring one byte of data

AIIJ2

XPPOO OK002

9-390

Expected: CE
sta,tus oDly

OXOS

CWCRT (R~g X'S2') after
Inyalld count in CWCRT
Halt I/O during lead coa.and
after transferring one byte of data

A4L2

OX06

CIICRT (Reg X'S2') after Halt
Inyalid count in CWCRT
I/O dnring Write coaaand after
transferring one byte of data

AIIL2

XPPPF 08002

9-390

Expected: couDt=1

ax01

CTDR (Reg X' SS') after
Halt I/O during sead coaaand
after even byte transfer

Inyalld 1:8sponse in CTDR

All II 2

XOOPP OF004

9-430

Expected:
'request-in' only

OX02

CASTR'(Reg X'S4') after
Balt I/O during Read coa.and
after even byte transfer

Iny.lld response in CASTR

AIIJ2

XPPOO OK002

9-430

Expected: CE,:/
status only

OX03

Bo level 3 interrupt after
Balt I/O during Read coaaand
after even byte transfer

Dnexpected level 3 interrupt
before accepting status

UK2

X1000 OJ001

9-1130

ax 011

CDR (Reg X' SS') after
Balt I/O during Write coaaand
after even byte transfer

Inyalld response in CTDR

1.. . 2

XOOPP OPOOII

9-390

Expected:
, request-in' onll'

OX 05

CASTR (Reg X'S4') after
Balt I/O during Write coaaand
after even byte transfer

Inyalld response in CASTR

AIIJ2

XPPOO OK002

9-390

Expected: CE
status oDly

OX06

Ro level 3 interrupt after
Balt I/O during Write coaaand
after eyen byte transfer

Unexpected Level 3 interrupt
occurred

Alilt 2

X1000 OJ001

9-390

ax01

C'lDII (Reg X'SS') after
Balt I/O during Bead coaaand
after first 'service-in'

Invalid response in CTDR

A1iJ2

XOOPP 01>004

9-/130

Expected:
'request-in' only

OX02

CASTR (lleg X'SS') after
Halt I/O during Read coaaand
after first 'service-in'

Inyalid response in CASTR

AIIJ2

XPPOO Oll:002

9-/130

Expected: ell
status only

OX03

80 Level 3 interrupt after

Dnexpected level ~interrupt
befor, accepting status

AIIK2

X1000 QJ001

9-/130

Halt I/O during Read coaaand
after first 'service-in'

Type 2 and 3 CA IPT

Reran IItn X/l6/1

X3705EAA 11.17

IBM 3705 COM"UNICATIONS CONTROLLER
TYPE 2 AND TYPE 3 CHANNEL ADAPTER 1FT SYMPTOM INDEX
BOUT. ERROR FUNCTION TESTED
CODE
OX04 CTDR (fleg 1'5B'I after
lIalt I/O during write cOlllmand
after first 'service-in'

ERROR DESCRIPTION
Invalid response in CTDR

099- 3705E- 09

SDSfECTED CARD
LOCATION (s)
A4N 2

PROG
MASK

COIIMENTS

FEAt 0

FETIII!

PAGE
QF004

PAGE
9-390

XFFOO QK002

9-390

A4K2

Xl000 QJOOl

9-390

A4J2

XFFOO OK002

9-430

Expected: CE, DE,
and DC status

xoon

Expected:
'tequest-in' only

OX05

C1STB (Reg X'5B'I after
Halt I/O during Write command
after first 'service-in'

Invalid response in CASTR

OX06

No level 3 interrupt after
Halt I/O during Write command
after first 'service-in'

Unexpected Level 3 interrupt

OXOl

CASTR (Reg X'54'I after
Invalid response in CASTR
progralll abort during Read
command after first 'service-in'

OX02

CASNSR (Reg X'53'I after
program abort during Read
command after first
'service-in'

Invalid CASNSB

A4J2

XFFOO QK003

9-430

Expected: Abort
sense bit

OX03

CASTa (Reg X'54'I after
program abort during Write
command after first
'service-in'

Invalid response in CASTR

AIIJ 2

XFFOO QK002

9-390

Expected: CE, DB,
and uc status

OX04

CASNSR (Reg X'53'1 after
Invalid CASNSR
program abort during Write
command after first 'service-in'

A4J2

XFFOO OK003

9-390

Expected: Abort
sense bit

OX08

CACRS (Reg 1'55') after
program abort during
write command after first
'service-in'

Invalid CACRS

X0400 OH006

9-390

Expected:
Program
reguested
abort bit

X486

OXOl

CACRS (Reg X'55') after
program abort with
CA inactive.

Invalid CACRS or
no level 3 interrupt.

X0400 QH006

9-390

Expected:
Program requested
abort bit &
level 3 interrupt.

X487

OXOl

Attention status in CASTR
(Reg X'54'1 after setting
program attention bit in
CACR (Reg X'55' bit 0.2)

Invalid response in CASTR

A4J2

XFFOO QK002

9-170

Expected: Attention
status only

OX02

Zero sense in CASNSR
(Reg X'53'1 after setting
Program Attention bit in
CACR (Reg X'55' bit 0.2)

Invalid response in CASNSB

A4J2

XFFOO QK003

9-150

OX11

PRE-TEST. Reset CASTR
(Reg X'54'I and CASNSR
(Reg X' 53'1

CASTR or CASNSR did not
reset

A4J2

XFFFF QK002

9-150
9-170

1488

OXOl

Busy status after initial
selection with Intervention
Reguired bit set in CASNSR
(Reg X' 53'1

Invalid status in CASTR
(Reg X'54'I

XFFOO QK002

9-150

X4XX

1X01

SUBR-TEST. configuration data

Invalid configuration data

%XXXX

Check Configuration
Data Set
(CDS) •

lX02

SUBR-TEST. Storage size in
Reg X'70'

Invalid storage size in
Reg X'70'

XXXXX

CDS may be
incorrect.

lX03

SUBR-TEST. Set diagnostic
mode

Diagnostic mode not set in
CACR (Reg 1'55' bit 0.0)

A4L2

X8000 08006

9-210

Run Rtn X402

lX04

SUBR-TEST. Initial selection:
'op-out', 'address-out', and
'sel/hold-out'

Invalid response in CTDR
(Reg X'5B'I

A4N 2

XOOFF QF002

9-250

Run Rtn 140E

lX05

SUBR-TEST. Adr-in during

Invalid response in CTDR

A4N2

XOOFF OF003

9-250

Run Rtn X411

X485

4.18 X3705EAA

Expected: CE
status only

Expected: CE, DE,
UC, and Busy
status

Type 2 and 3 CA 1FT

.~-------~-------.-.--.-

o
o
IeH 3705 COftftUMICATIOMS CONTROLLER

D99-37058-09

UPB 2 UD UPB 3 CUA.NNn &DUUR IFT SYftP'tOIl nDn

ROUT. ERROR PONCTION TESTED
CODB
initial selection

o

1106

SOBR-TEST. 1dr-in dropped
~fter 'coa.and-oat' daring
initial selection

1107

SOBR-TEST. Selective/sysl
reset bit in CACR (Reg X'55'
bit 1.3) off

!.

ERROR DESCRIPTION

SOSPECTED C1BD
LOCATION(S)

PROG
BASK

PEALD
PAGE

rETftS
PAGE

COftSENTS

Adr-in bit in CTDR (Beg X'5B')
did not drop

1~H2

X0010 OP003

9-250

Run Btn X415

Selective/system reset bit in
on

14M2

10010 Or005

9-190

Ran Btn 1412

C~CB

lX08

SUBR-TEST. selective/system
reset

Selective/system reset bit in
C~CR (Reg X'55' bit 1.3) did
not reset or level 3 interrupt
did not occur

~4H2

10010 OP005

9-190

Ran Btn X412

1X09

SOBR-TEST. Selective/system
reset

Selective/system reset bit in
C1CR (Reg X'SS' bit 1.3) did
not reset after level 3
interrupt

14M2

X0010 OP006

9-190

Run Btn X412

1XOA

SOBR-TEST. Selective/system
reset

Invalid CTDR (Reg X'5B'l after
selective/system reset

A4&2

X0020 OP003

9-250

Ban Rtn X41E

1X08

SUBR-TEST. DJ:opping
'comaand-oat' daJ:ing initial
selection

'Op-in' and 'statUs-in' not set 14M2
in CTDR (Reg X'SB')

X0028 OP003

9-250

Ban Rtn XII11

110C

SOBR-TEST. Status after
dropping 'co •• and-oat' daring
initial selection

Invalid statas in C1STR
(Reg X'S4')

AU2

XPPOO OKOOI

9-170

Ban Rto X420

lXOD

SUBR-TEST. Status after
dropping 'comund-oat' daring
initial selection with Ho-Op
co.und

Invalid status in CASTR
(Reg.• 1'54')

AIIJ2

XPPOO OK002

9-170

Ran Rtn X421

1XOE

SUBR-TEST. Initial selection
and status stacked

Invalid response in CTDR
(Reg X'SB')

UN2

XOOPP OP004

9-250

Run Rto X42A

1XOP

SUBR-TEST. Accept initial
statas

Invalid response in CTDR
(Beg X' 5B')

~4N2

XOOP' OP003

9-250

Run Btn 1425

1110

SUBR-TEST. Stack initial
status

Invalid response in CTDR
(Reg X' 5B')

14M2

XOO'P OP004

9-250

Run Rtn X42B

lX,'

SOBR-TEST. Drop 'couand-oat'
during present stacked status

Invalid response in CTDR
(Reg X'5B')

14N2

XPFPP OP003

9-250

Bun Btn X41P

1X12

SUBB-TEST. Raise 'co ••and-oat' Invalid response in CTDa
during present stacked status (Reg X'5B')

All II 2

XFPpr OP004

9-250

Run Bto X421

1X13

SUBR-TEST. Drop 'command-out'
during present stacked status

Invalid response in CTDR
(Reg X'5B')

All II 2

XPPJP OP004

9-250

RUD Btn X42B

1X1Q

SUBR-TEST. Raise 'sel/hold-out'Invalid J:esponse in CTDK
during present stacked status (Reg X'5B')

14112

IPPPP OP004

9-250

Rao Rtn

1X15

SOBR-TEST. Raise 'comaand-out' Invalid response in CTDK
daring present stacked status (Reg X'5B')

14112

XPPPP OFOOQ

9-250

Ran Rtn X430

1X16

SOBR-TEST. Drop 'coaaand-out'
during present stacked status

XPPJ' oPOOQ

9-250

Run !ltn X431

1X17

SOBR-TEST. Drop 'sel/hold-out' Invalid response in CTDR
daring present stacked status (Reg. X'5B')

14M2

XPPFP OP004

9-250

Bun Btn X431

1X18

SOBR-TEST. 'Coa.and-out' up
daring initial selection

CASTB (Beg X'54') or CASNSR
(Beg X'53') not reset

AIIJ2

XPPPP OKD02

9-250

Ran Rtn X421

lX19

SOBR-TEST. Drop 'co.aand-out'
during initial selection

Invalid response in CTDB
(Beg X' 58')

AIIH2

XOOPP OF003

9-250

Bun Rtn 141P

1X1A

SUBR-TEST. Raise 'service-out' Invalid response in CTDR
daring initial selection
(Reg X'5B')

14M2

100PP OP003

9-250

Run Rtn X425

Invalid response in CTDR
(Reg X'5B')

X~2P

1X1B. SOBR-TEST. Drop 'co•• and-out'
during initial selection

Invalid response in CTDR
(Reg X'58')

UN2

XPPPP OP003

9-250

Run Btn X41P

111C

Invalid response in CTDR
(!leg X'5B')

AIIH2

XOOPP OP002

9-250

Run Bto X426

SOBR-TEST. Raise and drop
'service-out' during initial

Type 2 and 3 CA 1FT

X37051!lAA 4.19

1B~ 3705 COHnUNICATIONS CONTROLLEft
TYPE 2 AND TY~! 3 CHANNEL AD~PTEB 1FT synPToK INDBX

ROUT. ERROR PONCTION TESTED
CODE
selection

099- 370SB- 09

ERROR DESCRIPTION

SUSPECTED CABD
LOCATION(s)

PROG
"ASK

PEALD
PAGE

PET""
PAGE

CO"KENTS

1I1D

SUBR-TEST. Set CVAR Valid
bits

CVAR valid bits not set
in CACR (Reg X'55')

AlIL2

X3000 OR005

9-250

Bun Btn X409

lX1E

SOBR-TEST. Read 2 bytes

Invalid response in CTDR
(Reg X'58') after dropping
'service-out'

14M2

XOOFF OP003

9-250

Run Bto 1472

IX IF

SUBR-TEST. Read 2 bytes

Invalid response in CTDR
(Reg X'58') after raising
'service-out'

A4N2

XOOFP OP003

9-250

Run Btn X473

lX20

SUBR-TEST. Read 2 bytes and
present ending status

I~valid response in CTDB
(Reg X'5B') after presenting
$tatus

A4M2

XOOFF OF003

9-250

Bun Btn 1414

lX21

SUBR-TEST. Check that
proper CA selected.

Cl not properly selected

X0003

9-080

Run Btn 1402

2X 12

IPRT-TEST. Level
handling

interrupt

unexpected level 1 interrupt
from channel adapter 1

14K2

XXXIX OJ001

9~500

2X13

1RPT-TEST. Level
handling

interrupt

unexpected level 1 interrupt
from channel adapter 2

A4K2

XXXXI OJ001

9·500

2Xlq

1RPT-TEST. Level
handling

interrupt

Level 1 interrupt from wrong
channel adapter

A~K2

XXXXX OJOOl

9-500

2X 15

1RPT-'rEST. Level
handling

interrupt

Level 1 interrupt with no reg
bit on and not expected

14K2

XXXXX OJ001

9-500

2116

1RPT-TEST. Level
handling

interrupt

Level 1 interrupt expected,
but no request bit on

A4K2

XXXXX OJ001

9-500

2X31

IRPT-TEST. Level 3 interrupt
handling

unexpected level 3 interrupt

A4L2

XXXIX 08001

Bun Btn

2X32

IRPT-TEST. Level 3 interrupt
handling

Level 3 interrupt from wronq
channel adapter

A4L2

XXUX OUOOl

lIun Btn 1401

2133

IR~T-TEST. Level 3 interrupt
reset bit (Beg X'57' bit 1.3)

Level 3 interrupt did not reset A4L2

XXXXX OU001

Q.20 X3705EAA

X~01

9-210

Type 2 and 3 CA 1FT

/

o
o
o
Cit

IBK 3706 COKftUNICATIO"S CONTROLLER
.
. ~YPE 1 CO"KUNICltION~ SCI"NBR 1FT SYKPTOH INDEX

ICHAPTER 5.0: TYPE

1)99-3705E-09

1 COIIIIUNICATIOIl SCANlin IFT SYKPTOII INDEX

I
If

I
tS02

XXXX

This routine checks the integrity of certain necessary d~ta in the configuration data set. It issues no
error stops. as such. Instead, it issues manual intervention stops to ensure that positive action is taken
to correct the configuration data set. If any of these stops is encountered and the configuration data set
is not corrected, the validity and reliability of all routines is in jeopardy. (See the manual intervention
codes following the error code listings.) This routine vill be run even if the DCft sense switch to include
manual intervention routines is not set.

1~04

XXXX

Normal Static Conditions:

150~

OX01

Ensure that after an OUT
error. X'~S' vith byte 0, bit
'scanner on (disable scanner).
being CS is reset.
resets the

o
o

One scanner pass 130 micro2
the
was not reset. Reg. X'IS'
contains the IN X'4~' bits
that were in error:
Byte 0:
Bit O-mode bit 'override'
latch failed to reset.
Bit 2-'override remember'
latch failed to reset.
Bit 3-' scanner enabled'
latch failed to reset.
Bit ~-'character service
pending' latch failed
to reset.
Byte 1:
Bita 2 thru 5-bit clock
check for LIBs 1,2,3,
or 4 (respectively)
failed to reset.
Bit 6-'LIB select check'
failed to reset.
Bit 7-'outbus check' failed
to reset.

o

e

Ensure that static conditions are normal after a scanner reset.

1506

XXXX

Scanner Enable:

1506

OXOl

Ensure that, after an OUT
X'4S' with byte 0, bit 2 on
(disable scaoner), tbe CS
is reset.

1506

0102

Y4E2

RS104

nE2

RS104

14E2

RS105

nE2

RS1Q5

n1'2

RS206

Y41'2

RS206

Y~E2

8S102

Test

off

One scanner pass (30 microseconds) after the OUT X'4S',
an IN l'q~' indicated the CS
vas not reset·. lIeg. X'1S'
contains the III 1'44' bits
that vere in error:
Byte 0:
Bit 3-'5canner enabled'
latch failed to reset.
Bit 11-' Character service
pending' latch failed
to reset.
Byte 1:
Bits 2 thIu 5-Bit clock
check for LIBs 1.2,3,
or 4 (respectively)
failed to reset.
Bit 6-'LIB select check'
failed to reset.
Bit 7-'Outbus check' failed
to reset.

'Scanner enabled' latch failed
to set. (IN 1'44', byte 0,
bit 3).

Since
enabled'

others, 1£ byte
O. bit 3 18 on
in error. ignore
any others on
until it is
fixed. lIeg.
1'111' contains
A-310 the result of
the III X'1I4'.
1-210, Byte 0, bit 3
1-220 in error lIould
flost likely be
caused by a
1-210 problem in the
A-220 latch itself or
by a failure in
power-on reset
A-210, ("+reset" on ALD
1-220 page aS10S).
A-210,
11.-220

Ensure that. after a successful scanner reset, the 'scanner enabled' latch can

Ability of the 'scanner
enabled' latch to be set
by OUT X'4S' with byte 0,
bit 1 on.

Type 1 Scanner 1FT

l'FF1'
seconds) after tbe OUT X'4S',
an IN X'4~' indicated the cs

1'1'1'1'

be

Pretest error.
Rerun routine
1504. Since
'scanner enabled'
being off resets
the others, i f
byte 0, bit 3
A-310 is on in error,
ignore any others
1-210, that are on. Reg
1-220 X'14' contains the
results of the

Y4E2

IIS105

Y4E2

RS105

Y4F2

R5206

A-210.
A-220

Y41'2

115206

I4E2

8S102

A-210.
1-220
1-210.
1-220

85105

1-310

Y~E2

1000

set.

III X'44' .•

Test error.
Reg X' 1'" contains the
results of the
IN X'

q,,'.

X370S1'AA 5.0.1

P9 9- n 05E- 09

IDK 3705 COMftUNICATIOHS CONTROLLER
l COSKUNICATIONS SCANNER 1fT SYKPTOK INDEX

TY~E

ROUT. EBBOR PU"CTION TESTED
CODE
1508 XXIX Scanner Disable:

EBBOR DESCRIPTION

SU5EECTED CARD PBOG FEALD PETHH COKSENTS
LOCATION(S) "ASK PAGE
PAGE
Ensure that, after tbe CS bas been enabled, it can again be disabled via OOT X'45'.

1508

OX01

Ability of the 'scanner
enabled' latch to be reset
by OOT X'45' with hyte 0,
bit 2 on.

150A

XXXI

Unwanted Levell Interrupts IIITH LIBs Disabled: The CS is reset and enabled, adapter L1 interrupts unmasked
for 30 milliseconds, and a check made to ensure that no level 1 interrupts occur without an error condition
up in the CS.

150A

OX 0 1

I f a level 1 interrupt

occurred after unmasking,
ensure that IN X'76' indicated a "type 1 CS level 1
check".

'Scanner enabled' latch
failed to reset. (In
X'44', byte 0, bit ~.

No indication was gi,en, of
which adapter caused tbe
interrupt in IN X'76'.

1000

YI/D2

B5105

A-310

SA102

6-082

Test error.
Beg. X' 14' COIItains the
results of the IN
X'44'. This
failure is different froll
error OXOI in
routine 15011 in
that the failure
is most probably
associated with
the lines '-output 45' and
'-outeus bit
0.2' on ALD
page given.

Test error.
Failure was most
probably "-type
1 CS bid level 1"
on 1LD page given,
failing to bring
up "+ input
type 1 C5 level
1 ".

150A

OX02

If a level 1 interrupt
occurred, ensure that no
error conditions were present
were present in the
CS, before continuing.

A level 1 interrupt has
occurred and IN X'44' did
indicate an error condition.
Reg. X'15' contains the error
condition bits that were on in
the IN X'44':
Byte 1:
Bits 2 thru 5-bit clock
check for LIBs 1.2.3.
or 1/ (respectively).
Bit 6-LIB select cbeck

Bit 7-outbus check

1S0A

150C

OX03

XXXX

Ensure that no level 1
interrup~s occur without an error condition
in the CS.

A level 1 interrupt has
occurred indicating tbat
a bid for level 1 was present without any of the
error conditions being
present in IN X'44'.

A-210

003F

Y4P2

R5206

Y4F2

BS206

Y4E2

B5102

Y4F2

B5206
RA102

UD2

Test error.
Serun routi nes
1504 thru 1508,
since this
error condi tion
should have
occurred in an
A- 21 0, earlier routine.
1.-220 Trouble is
possibly
1-210, intermittent.
1.-220 Beg. X'14'
1.-210, contains the
1.-220 results of
the IN X' 44'.
6-082

Test error.
If error code OX02
in this routine
occurred, this
error stop
will always
occur.

Outbus Parity Error Detector: Ensure the validity and proper operation of the outbus parity error detection
circuitry by forcing bad parity on the outbus (via OUT X'78') with various data patterns and ensuring that
an outbus parity error does occur. Thirty-fGur passes through the routine are made, with different data, as
follows:
1.

2.
3.
4.

All 16 bits off.
High-order bit on and then shifted right each pass until the low-order bit is on.
The two high-order bits on and shifted right eacb pass until the two low-order bits are on.
All 16 bits on.

In addition. after forcing an out bus check. a check is made to ensure that it can be reset.

5.0.2 13705F1A

Type 1 Scanner 1FT

~o

o

o

1811 3705 COUUIIIClTIONS COIITIIOLLBII

1)99- 31 OSE- 09

TIPI 1 CONftUliCATIOBS SCAWIIII 1FT SYIPTOft IRDII

oi

:1I0UT. EIIBOII FUNCTION 'rESTED
I
CODE
1'50C 0101 Before continning the test,
ensure that no level 1
interrupts are already
pending.

11111011 DESCIlIPTIOIi

CAIID
WCl'fIOI! (s)

SUS~ICTID

1fter unmasking adapter level 1
interrupts. a level one interrllpt
occurred. leg. X'111' indicates
the calise of the interrupt:
Byte ,:
Bi to-Ignore
Bit 1-See Co ••ent 1.
YIID2
Bit 2 thru 5-bit clock
JIIP2
check for LIBs 1.2.3.
or II Irespectively).
Bit 6-LIB address clleck.
1"'2
Bit 1-outbus parity error.

PIIOG
IIlSK

PIALD

nGI

n102
85206
115206

Y"E2

115102

'HIIII

PAGI

COIlIlEIITS
Pretest error.
lIerun routines
15011 thru 150A.
Additional
co•• ents:

6-082 1. If this bit is
1-210,
off, III X'76'
failed to
indicate
A-210,
which adapter
caused the
A-220
A-210.
interrupt.
11-220

I

e
o
o

,SOC

OX02

Ability of the type 1 CS
to detect bad parity on
the CCU outblls.

After inverting the outbus
parity bits (via OOT X'78'I
and putting bad data onto the
olltbus Ivia OUT X'II"I. no
level , check, indicating
out bus check. occurred.
lIeg. X',5' describes the
error:
If byte 1X'01' - level 1 interrupt
occurred but I I
X'Qll', byte 1,bit1,
loutbus check bit)
failed to set.
X'81' - outbus parity
detector apparently
failed to detect
bad parity.
If byte 1, bit 1 is on, see
comment 1.

OOC1

YIIE2

115102

'"E2

115'01,
115102

I'D2

111102

1-210
A-220

Test error.
lIeg. X'13' contains the data
pattern that was
set onto the
olltbus with
the parity bits
illt'erted. If
byte 1 of leg.
X'1S' was X'81',
record the contents of Reg.
X'13' and continue the routine. (See
General Co ••ents,
n.) By
continuing and
recording tile
contents of leg.
X'13' each tiae
this error stop
OCCllrs, a failing
bit pattern aay
be detected.
Additional
coaaents:
1. If this bit is
on, III x'16'
failed to
indicate which
adapter caused
the interrupt.
Rerun routine
1S0A.

1S0C

OX03

Ability to reset the olltblls
check bit in III X""'
Ibyte 1, bit 2).

After having forced and
atte.pting to reset Ivia
OUt X'IIS' with byte 1,
bit 5 onl an OUtbUR check,
IN X'IIII' still indicated
an outbns check.

YQE2

RS102

A-210, Test error.
A-220

150C

01011

Ensllre that after resetting the sOllrce of a bid
for level " no lIore level
1 interrllpts occllr.

After having reset the out bUR
check bit in IN X'''"', level
1 interrupts were unmasked
and another level 1 interrupt
occurred •

rQD2, IIIP2

R1l02

1-210

• 500

XXXX

Unwanted Level 2 Interropts With LIBs Disabled: The CS is reset and enabled. Level 2 interrupts are
unmasked for 30 milliseconds, and a check aade to ensure that no level 2 interrupts occur.

1500

OXOl

Ensure that, after only
a scanner reset and
enable, no level 2 interrllpts are pending.

Type 1 Scanner IPT

After unmasking level 2
interrupts for 30 .illiseconds, at .ost, a level 2
interrupt occurred.

tIIP2, !IIG2

Test error.

115202, A-010, Test error.
85305 A-OliO Display reg.
X'111'. If it
contains X'86PO',

13105PAA 5.0.3

Bft 3705 COK~UMICATIONS CONTBOLLER
Y~B 1 COftHUBtCATtOHS SCAMREi IFl SYH~TOft INDBX
OUT. EBBOR FUNCTION 'lISTED
CODE

EBROR

099-3705E-09

DESCBI~TION

CABO
LOCATION(S)

SUS~ECTID

~BOG

HASK

FEALD
~AGE

FITKK
PAGE

COKHINTS
an unwanted character service
interrupt
occurred. Try
replacing Y4F2
first. If byte
0, bits a and 4
are on, an
unwAnted bi t service occurred.
Try replacing
14G2 first.
Display reg.
X'1I2'. If
either byte 0,
bits 6 or 7 lire
on, the 1II0de
bits in 10ce1
store (ALD page
BS 304) heve
probably not
been reset properly. If none
of the above
cases are true,
the '+ bid level
2 interrupt' line
on lLD page B5202
is hot.

1501

XXXX

Set Mode Bit Override: After resetting and enabling the scanner, ensure that both the 'mode bit override'
and 'override !;emember', latch~s. G'In ,be se*" ~i~ OOT X'40':,

OXOl

Ensure that· the
'lode bit override'
latcb can be set
via OUT X' 40'.

After resetting and
enabling the scanner,
and issuing an OUT
X'IIO-, and IN X'IIII'
indicated the 'mode
bit override' latch
had not set (byte
0, bit 0 vas off).

'fIIE2

The same in X'IIII'
that followed the OUT
X'40' in error code OX01,
above, indicated the
'override remember'
latch failed to set
(byte 0, bit 2 was off)_

Y412

6000

BS1011

A-230

Test error.
~roblem

is

in the CS
itself. If
needed, Beg
X'14' contains
the result
of the IN
X'44' •

1508

0102

Ensure that the
'override remember'
latch can be set
via OIlT X' 40'.

150F

XXXX

Beset node Bit Override: After resetting the scanner and setting both the 'mode bit override' and 'override
remember' latches, ensure that an OUT 1'114' can reset the 'mode bit override' latCh.

150F

OXOl

Ensure that an
error. OUT X'II0' can
routine set the 'mode bit
override' and
reg. 'override remember'
contaills latches.
actual

After having reset the
scanner and issuing
an OUT X'40', an IN
X'44' indicated tbat
one or both of tbe latches
failed to set. If byte 0,

Y4E2

2000

AOOO

B5104

B51011

1-230

A-230

Test error.
Problem is in
the C5 itself.
If needed, Beg
X'111' contains
tbe results
of tile IN X'44'.

Pretest
Berun
150E. I f
needed,
X'111'
the

bit 0 of Beg X'15' is
received
IN on, the 'llode bit override'
X' 43'
data. latcb failed to set. If byte 0, bit 2 is on, the 'override remember'
latch failed to set.
150F

OX02

Ensure that the
error. 'mode bit
is override' latch
cs, can be reset

5.0.11 X3705FAA

After setting 'mode
bit override', an OUT
X'44' with byte 1, bit
2 on was issued to

14E2

6000

85104

1-230

Test
Problem
in the
itself.

Type 1 Scanner 1FT

o
lBH 3705 CO!HUHICATIOHS CONTROLLER
TYfE 1 COH"UHICAtIONS SCANHER 1Ft StHfTOft INDEX
ROUT. ERROR PUNCTION TESTED
CODE
If via OUT
lI.g.

ERROR DESCIIIPTION

"_4'.

099- 3705E- 09

SUSPECTED CARD
LOCATION(s)

PROG
ftASK

PEALD
PAGI

PETftB
fAGE

An IN 1'1111'
contains th.n iDdicat.d that
actual '.od. bit ov.rrid.',
r.ceived byte 0, bit 0, vas
still OD.
150P

OX03

Ensur. that
• rror. r.s.tting '.od.
bit ov.rrid.' do.s
caus. not r.s.t
'override rem •• b.r'.
is

After res.tting .od.
bit override, the sa ••
II X'/I,,' d.scrib.d
in error code OX02.
abov., indicated

COHftBITS
need.d,
X'1II'
the
data
by the IH
X·/I/I'.

t4E2

RS10~

A-230

that 'overrid. r •••• ber.
outbus had r.set also •.

Test
Th. only
possible
of this
probl..
that
bits 1.2

and

1.3 on
ltD page
giv.n are
ti.d together.

e

1510

XXXX

Reset Override Re.eaber: After resetting the scanner and s.tting both the 'mode bit 0r.rride· and 'ov.rrld.
r ....b.r· liItc~.s, ensure tha1: ':I1I1.i0O'1' X'4~· .. ca;n r ••• t the 'ov.rdd".fe ••• b.r' latch.

1510

OX01

Ensure that an
OUT "/1O' can
s.t the 'mod. bit
ov.rrid.' and
'override rele.b.r'
latch.s.

Aft.r having reset the
scanner and issuing
an OOT ""0', an IN
X'/lII' indicat.d that
on. or botb of the latches
fail.d to s.t. If byte 0,
bit 0 of R.g X'15' is
on, the 'lode bit overrid.'
latch failed to set. If
byte 0, bit 2 is on,
the 'override re.elber'
latch fail.d to set.

nB2

AOOO

aSl04

A-230

OX02

Ensur. that the
'override rem •• b.r'
latch can b.
r ••• t via OUT

After setting 'ov.rrid.
r.lelber' and 'lode
bit overrid.', an OOT
X'q/l' with byte " bit 3
on vas i.su.d to
reset 'override r •• emb.r'.
An IN X'/I,,' th.n
indicat.d that 'ov.rride
remelber', byte 0, bit 2,
liaS still on.

YIIE2

2000

aS10"

A-230

After resetting override,
the saa. II X'/I/I' describ.d
in error code OX02,
above, indicat.d that lod.
bit override had r.set also.

Y/l12

o
1510

X''''''.

Pr.test error.
R.run routine
1501. If
ne.ded. Reg
X' ,,,, contains
the actual
recehed lR
X'II3' data.

Test error.
Problel is

in the CS,

itself. If
need.d, R.g
X'111' contains
the data receh.d by the
IH X'4/1'.

1510

0103

Ensure that resetting
'override re.e.ber' do.s
not r.set
'mod. bit overrid.·.

1511

XXXX

Unwanted Lev.l 2 Interrupts With LIBs Enabled: The CS is reset and enabled, and a LIB is enabled, Lev.l 2
interrupts are unaasked for 30 lilliseconds, and a ch.ck aade to ensure that no l.v.l 2 int.rrupts occur.
The routine is run first vith the first LIB enabled, th.n again, vith the s.cond LIB .nabled, and so on.

1511

OX01

Befor. starting the test,
ensure that no lev.l 2
interrupts are already

Type 1 Scanner IPT

Aft.r res.tting and .nabling
the scann.r and unmasking
l.vel 2 int.rrupts for, at

nu,

aS1011

l'IIG2

RS202

1-230

1-060

Test .rror.
Th. only
possible cause
of this
problem is
that OOTBUS
bits 1.2
and 1.3 on ltD
page given
are ti.d together.

Pr.test error.
Rerun routine
1500. I f reg.

X3705FAA 5.0.5

IBft 3705 COftKUNICATIONS CONTROLLER
TJfE 1 COftKDHICATIORS SCANNBR 1FT SYKfTOft IHDBX
ROUT. ERROR PUNCTION TESTBD
co DB
pending, e~en with the
LIBs disabled.

EaRoa DBSCRIPTIOH
lost, 30 .illiseconds, a
level 2 interropt occorred.

D99-31051!-09

S05PI!CTI!D CARD
LOCATION(s)

fROG
BASK

PI!ALD
PAGE

PETftft
PAGE

COMftENTS
X'll1' contains
1'86FO', a character service
interrupt
occorred. If
byte 0, bits 0
and 4 are on, a
bit service
interrupt
occorred.

1511

0102

Knowing, now, tbat no level
2 interropts have occorred
with the LIBs disabled,
ensore that after enabling
a LIB, no .ore level 2
interropts occor~

1512

XXXX

Porce Bit service Instruction (OUT X'Q1'): Test all 64 addresses, in turn, to ensure that forcing bit
service to a given line will cause a bit service interrupt to occur fro. that line, and that line only,
witbin one scanner pass. (LIBS ue kept disabled.) Then cbeck the ability to reset tbe forced bit service.

1512

OX01

Ability of an ODT X'41'
to caose a bit service
level 2 interropt.

After resetting and enabling
the scanner (not the LIBS),
an OOT 1"7' faile4 to caose
a bit service interropt. Reg.
X' " , conta ins line (BCB)
address of line being tested.

r1lG2, rllP2

RS305

A-330, Test error.
A-OliO Continoe from
error stop after
rtacording the
failing line
address. (See
General Co ••ents,
.4.) By Iecording the line
address each ti.e
tbis error stop
occurs, the
trouble .ay be
further isolated.
If all line addresses fail; failure is probably
near the 'bit
service latch' on
ltD page R5305
or the 'force
bi t service'
line on ILD page
R5201. If not,
failore is probably near the
scan coonter.

1512

OX02

Bnsore that the OUT 1'41'
(force bit service), wbich
caused tbe interropt just
received, forced 'bit service' frOB the correct address.

The address received via an
Y4P2, YIIG2
III X"'41 " (inpot address) indicated that the scanner was
forced to stop at the wrong
address. Reg. X'l" contains
the line (BCBI address of tbe
line fOIced. Reg. X'14' contains
the line (BCB) address
received by tbe 1M X'1I1'.

85201

1-330

5.0.6 X3105PAA

After enabling a LIB, a
level 2 interrupt has
occurred. (Byte 0, bits 6
and 7 of reg~ I"" indicate whicb LIB vas enabled:
0, 1. 2, or 3.)
.

YQG2

RS305, A-040
1153011

Test error.
"supled bit service" fro. the
LIB has probably
been allowed
to set the 'bit
service level 2'
latch. Display
reg. 1'42'. If
eitber byte 0,
bits 6 or 7 are
on, the lode
bits in local
store (ltD page
RS304) hue
probably not
been reset properly, alloving
the bit service
to occur.

Test errOI.
Bither the scan
counter is not
stopping properly or the
force bit
service compare
Circuits failed.
Continue froll

Type 1 Scanner 1FT

o
o

o
0

e

IBM 3105 COKHUNICATIONS CONTROLLED
TYPE 1 COMMUNICATIONS SCANNEB 1FT S¥"~TaM INDEX
BOUT. ERROR FUNCTION TESTED
CODE

ERBOB DESCBIPTION

D99-3705E-09

SUSPECTED CARD
LOCATION(S)

PROG
HASK

FEALD
PAGE

1'ETMM
PAGE

(General
Comments • • 4.)
to determine
which addresses
ere tailing.
1512

OX03

Ensure that trying to reset
a forced bit service does
not cause a feedback check.

An OUT X'41' (reset bit
service) caused a feedback
check to be indicated in an
IN X'43'. Reg. X'11' contains the line (BCBI address
of the line under test.

Y41'2, Y4G2

4000

85202

A-240

Test error.
This failure
could be
caused by a
failure in the
'feedback check'
latch itself or,
most likely. a
solid bit service condition
present in a LIB
or line adapter.
See General Comments, '3.

1512

OXO~

Ensure that OUT X'41'
(reset ' bi t serv ice' I can
reset a forced bit service.

In X'71' still showed a bit
YQF2, YQE2
service level 2 pending after
Y4G2
the OUT 1'41' was issued. (Beg.
X'1" contains the line (BCB)
address of address under test,
i f needed.)

4000

RS202

A-240

Test error.
Either the 'start
scanner' line
failed to come
up or the 'bit
service' latch
failed to reset.

1512

OX05

Ensure tha t after resetting the forced bit ser~ice, no other bit service interrupts occur.

After resetting the forced
141'2
interrupt, unmasking level 2
interruptn 8gain, and awaiting
a scanner pass, another level 2
ipterrupt occurred. Reg. l'lQ'
contains the modified results of
an 1M X'4" issued to determine
the address of the line causing
the second interrupt. (Ignore
byte 0, bit 0.)

85201

A-330

Test error.
Most likely canee
is fa Hure to
reset the OUT
l"n' (force
bit service)
latch on ltD
page given.

1514

XXXX

Reset Bit Service in Scanner: Test each address to ensure that, after a bit service interrupt has been
forced from that address, 'bit service' can be reset by both OOT X'q1' and OU~ 1'46'.

151q

OXOI

Ensure that force bit
service (OUT 1'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
YQP2, YQG2
bit service level 2 interrupt
(via 00'1 X'47'1 from the line
(BCB) address in Beg. X' 11' •
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred trom that line.

1514

OX02

Ability to reset (via OUT
1'41' or OUT 1'46') a bit
service, level 2 re~uest.

After having forced a bit
service request from the
line under test and attempting to reset it. an IN X'77'
still showed an outstanding
type 1 CS level 2 request
(bJte 0, bit 1 was on).
Reg. I'll' contains the
address to which bit service was forced. If byte
0, bit 3 is off. the reset
attempted vas an OUT X'41'.
If it is'on, the reset was
an oo'! X'Q6'.

0

e
0

0
0

G
t
,;,

o
o

COMMENTS

Type 1 Scanner 1FT

Y4P2
t4E2

RS305

4000

A-330. Pretest error.
A-040 Rerun routine
1512.

RS202, A-2QO, Test error.
RS104 A-320 Failure is probably near the
start scanner
line on "LD
page RS202. If
failure occurs
only when OUT
X'46' is used.
problem may be
on card Y4D2. on
ALD page BTl 101.
(This routine
cbecks only the
capability of
resetting a
bit service in
the scanner. It
does not check
the capability

X3705FAA 5.0.7

IBII 3705 call !to NICATIONS CONTROLLER
TYPE 1 COIIIIONICATIONS SCANNER 1FT SYKPTOII INDEX
ROUT. ERROR PONCTION TESTED
CODE

ERROR DESCRIPTION

D99-3705E-09

SUSPECTED CARD
LOCATION(s)

P80G
IIASK

FEALD
PAGE

FETHII
PAGE

COHIIENTS
of rese tting a
bit ser vice in
a line adapter. I

1516

XXXX

Reset All Bits ift IN X' 42': Test each line address, in turn, to ensure that, after a scanner reset and
enable, all bits in an IN X'42' vere reset to O. (LIBS are enabled.)

1516

OX02

~nsure th~t, following an
OUT X'45' with byte 0, bit
2 on, the CS is reset.

After waiting 30 microseconds
(one scanner pass), an IN X'44'
indicated the scanner was not
reset. Beg. X'15' contains the
bits in IN X'44' in error:
Byte 0:
Bit O-'mode bit override'
latch failed to reset.
ait 2-' override ruelBber'
latch failed to reset.
eit 3-'scanner enabled'
latch failed to reset.
Bit 4-'Character service
pending' latch failed
to reset.
Byte 1:
Bits 2 thru 5-bit Clock
check for LIBs 1,2,3,
or 4 (respectively)
f aile d to reset.
Bit 6-'LIB select check'
f ailed to reset.
ait 7-'outbus check' failed
to reset.

PPP1'

Pretest error.
Rerun routine
1504. Since
'scanner
enabled' being
off resets the
1-210 others, if byte
0, bit 3 is on
A-210 in error, ignore
any others that
1-310 are on. Reg.
1 '14' contains
1.-210, the result of
1-220 the II X'44'.

Y4E2

85104

1422

R5104

14E2

85105

Y422

R5105

Y4P2

RS206

A-210,
A-220

Y41'2

RS206

1482

85102

A-21D,
1.-220
A-210,
A-220

1516

OX04

Ensure that following an
OUT X'45', with byte 0,
bit, on, the CS can
be enabled.

IN X'44' byte 0, bit 3
(scanner enabled latchl failed
to set.

1516

OX06

Ensure that force bit
service lOUT X'47'I cau&es
a bit service interrupt fro.
the line address under test

After attempting to force a
141'2, Y4G2
bit service level 2 interrupt
,via OOT X'47') fLo. the line
(BCBI address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1516

OX08

Ensure that after a sClInner
reset, all IN X'42' bits
have been reset.

After baving stopped on the
line address under test,
an IN X'42' had some bits
on. Beg. X'11' contains the
line (BC8) address of the
line under test. Reg. x'1S'
contains the bits in the IN
1'42' that vere on:
Byte 0:
Bit 6-mode bit 1
Bit 1-mode bit 2
Byte 1:
Bit O-low priority
Bit 1-diagnostic mode
Bit 2-data terminal ready
Bit 3-synchronous mode
Bit II-external clock
Bit 5-data rate select
Bit 6-oscillator select bit
Bit 7-oscillator select bit

5.0.8 X3105uA

1-250

YijE2

Y4G2
Y4E2

1000

031'P

R5105

1-210, fretest error.
1-220 Reron routine
1506. Reg.
X'14' contains
the result of
the IN 1'44'.

115305

A-330, Pretest error.
A-040 Rerun routine
1512.

B5107

115304
85304

1
2

RS304
RS306
RS306
115306
R5306
BS306
115306
115306

1.-150, Test errot.
1.-190 If the failing
bits are byte 0,
bits 6 or 7,
or byte 1, bit
0, the problem
is within the
C5, probably in
the local store
A-110 array.
If not,
A-110 t he problem may
be in the CS,
A-170 in a LIB or in
1-160 a line adapter.
1-160 ISee General
1-160 Comments, '3.)
1-160 As indicated
1.-160 in the FEU!!
1-160 pages referenced,
1-160 a problell could
also exist in the
control-in
signals. IThis
would be most
likely 1£

Type 1 Scanner 1FT

IBn ~105 COftKUNICATIONS COHTlo~~Ba
tYPB 1 COft.UHlCATIORS SCAN.Ba 1Ft Iy.p~on IRDII
ROUT. BIBOR PDRCTIOI TBSTED

IIIOR DBSCRIPTIO!

COOl

D99-31051!-09
SUSPBCTBD CAaD
LOC1TION(S)

PIOG
K1S~

Fl!lLD
P1GI!

FETKK
P1GE

COKIERTS
aultiple bits are
euor.)

ip

1_
:1

1518

JXXX, Beset All Bits in II X'43': Test each line address, in turn, to ensure that, after a scanner reset and enable,
byte 0, bits 4 tbru 1, and byte 1, bit 5 of an I. X'43' were reset to O. ,LIBS are enabled.) (Tbis test is not
run on autocall lines!.

1518

0102

e

o

Ensure that following an
ODT X' 45' v1t~ byte 0, ,bit
2 on, the CS ie" reset. '
I

lfter waiting 30 aicroseconds
(one,sca.n~r pass), an II X'44'
not
reset. Beg. X'15' contains the
bits in IN X'44' in error:
Byte 0:
Bit O-'aode bit override'
latch failed to reset.
Bit 2-'override reaeaber'
latch failed to reset.
Bit 3-'scanner enabled'
latch failed to reset.
Bit 4-'character service
pending' latcb failed
to reset.
Byte 1:
Bits 2 thru 5-bit clock
check for LIBs 1,2,3,
or 4 (respectively)
failed to reset.
Bit 6-'LIB select check'
f ailed to reset.
Bit 1-'outbus cbeck' failed
to reset.

, FPFl'

1504. since
'scanner enabled'
being off resets
the otbers, i f
byte 0, bit 3
i8 on in error,
ignore any
others that are
1-310 on. Beg. X'll1'
contains tbe
A-210, result of the
A-220 IN X'1I4'.

!4B2

15104

Y41!2

15104

r4E2

15105

Y4E2

15105

Y4P2

RS206

A-210,
1-220

y4P2

85206

r41!2

85102

1-210,
A-220
A-210,
A-220

OX04

Bnsure that following an
OUT X'45' with byte 0,
bit 2 on, tbe CS can
jle enabled.

IN X'_4' byte 0, bit 3
(scanner enabled latch) failed
to set.

1518

0106

Bnsure that force bit
service (ODT X'41') causes
a bit service interrupt fro.
the line address under test.

After atteapting to force a
Y4P2. r4G2
bit service level 2 interrupt
(via ODT X'41') fro. the line
(BCB) address in leg. X'11',
unaasking level 2 interrupts and
waiting'the tiae of a scanner
pass, no bit service interrupt
occurred fro. that line.

1518

0108

Bnsure that, after a scanner
reset and enable, all bits
1n an IN X'43' that should
be reset, are reset ••

lfter having stopped the
scanner at the l1ne address
under test, an IN X'43' had
some bits on that should
have been reset. leg. X'11'
contains the line (BCB)
address of the line under
test. Beg. X'lS' indicates
the bits in the IN X'43' tbat
should have been reset but
were on:
Byte 0:
Bit 1-feedback error
Bit _-transmit mode
B1 t 5-nell sync
Bit 6-request-to-send
Bit '-send data
Byte 1:
Bit 5-diagnostic mode

XXXX

Pretest error.
Berun~',follt1ne

1518

1519

1-310

"iil~icated ~he ~c8llner lias

Y4B2

1000

85105

A-210. ~retest error.
1-220 Rerun routine
1506. leg.
I,',/f' contains
the result of
tbe IB X' 44'.

15305

A-330, ~retest error.
A-040 Rerun routine
\
1512.

JIIB2

BS101

A-1BO
A-190

r4P2

'"02

15202
85308
15308
1S308
15308

A-200
1-200
1-200
1-200
A-200

tIIG2

15301

A-200

4P04

HG2
HG2
rllG2

Test error.
The proble.
.sy be in the
C5, in II LIB,
or in a line
adapter. (see
General Co.aents,
.3.) As also
indicated, PETnl
pages referenced,
the problea
may be in
the control-in
&1gnals. (This
1I0uld be sore
likely if a
nuaber of bite
are in error.l

Beset All Bits in IN X' 43' (autoc:all):
Test eacb autocall line address, in turn, to ensure that after a
scanner reset and enable, all bits in IN X'II3' that can be reset are reset. (LIBS are enabled.)

Type 1 Scanner 1FT

X3105PU 5.0.9

lEft 3705 COftftUNIC1tIONS CONtROLLER
tYPE , COftftUNIC1TIONS SCANNBR 1FT SYftPTOft INDEX
BOUT. BRBoa PUNCTION TESTED
CODE
0102 Ensure tbat, fo11oll1ng
OUT 1'45' witb byte 0, bit
2 on, tbe CS is reset.

1519

ERROR DESCRIPTION
After vaiting 30 .icroseconds
(one scanner pass), an IN 1'44'
indicated the scanner was not
reset. Reg X'15' contains the
bits in II X'IIII' in error:
Byte 0:
Bit O-'.ode bit override'
latcb failed to reset.
Bit 2-'override remember'
latch failed to reset.
Bit 3-'scanner enabled'
latcb failed to reset.
Bit 4-'character service
pending' latch failed
to reset.
Byte 1:
Bits 2 tbru 5-bit clock
cbecks for LIEs 1. 2,
3, or II (respectively)
failed to reset.
Bit 6-'LIB select check'
failed to reset.
Bit 7-'outbus check' failed
to reset-

D99-3705E-09

.'
SUSPBCTBD CARD
LOCATION (sl

PROG
ftJ\SK

rrrr

PEALD
PAGE

1:482

aSIOIi

PEt"K
PAGE
1'-310

YQE2

aSl011

1:4£2

aSl05

1'-310

1:4E2

8Sl05

1-210
1-220

UE2

8S206

1:41'2

8S206

1:4E2

R5102

COKIlENTS
Pretest error.
Rerun routine
15011. Since
'scanner
enabled' being
off resets the
others, i f byte
0, bit 3 is on
in error, ignore
any others that
are on. Beg.
X""' contains
the result of
the IH X' 114 , •

1-210,

1\-220
A-210,
1-220
1-210,
1-220

1519

0104

Ensure tbat following an
OUt X'45' witb byte 0,
bit 2 on, the CS can
be enabled.

IN X'lIq' byte 0, bit 3
I_E2
('scanner enabled' latch) failed
to set.

1519

OX06

Ensure that force bit
service (OUT X'47')
a bit service interrupt from
tbe line address under test.

After atte.pting to force a
lflF2, lllG2
bit service level 2 interrupt
(via OUt X'1I7') frOB tbe line
(BCB) address in 8eg. X'11',
un.asking level 2 interrupts, and
waiting the time of a scanner
pass, no bit service interrupt
occurred fro. that line.

1519

OX08

Ensure tbat after scanner
reset and enable, all bits
in IN X'43' tbat sbould
be off, are off.

After having stopped the
14G2
scauner at the line address
1:4E2
under test, an II X'43' had on
bits that should have been
reset. Reg. X'11' contains tbe
line (BCB) address of tbe line
under test. 8eg. X'15' indicates the bits in the IN X'43'
that should have been reset
but were on:
Byte 0:
Bit 3-diqit present
Bit 4-dig1t NBB 8
Bit 5-digit NBB II
Bit 6-digit NBB 2
Bit 7-digit BBB 1
Byte 1:
Bit fl-call request

151A

XXXX

Set Trans.it ~ode/NBR-a Bit. After resetting and enabling the CS, then stopping the scanner on the tested
line and ensuring a successful reset, ensure that the trans.it .ode/NBB-8 bit at that address can be set.
(this test is run on all installed line adapters, in turn.)

151A

OXOl

Rnsure that force bit
service (OUt X'47') causes
a bit service interrupt from
the line address under test.

5. O. 10 X3705PAA

After attempting to force a
l1lF2, Y4G2
bit service level 2 interrupt
(via OUT X'1I7') fro. the line
(BCB) address in Reg. X'11',
unmaSking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred fro. that line.

1000

1F08

8S105

1-210, Pretest error.
1\-220 Berun routine
1506. 8eg.
X'll1' contains
tbe result of
the U X'IIII'.

R5305

1-330, Pretest error.
1-040 Berun routine
1512.

R5308
8S107

A-190

85305

Test error.
Tbe problem aay
be in the CS,
in a LIB, or
in a line
adapter. (See
General Comaents, '3).
As indica ted,
PE'U!! page
referenced,
the problem
lay also
be in the
control-in
signals. (this
would be the
.ore likely
if a nuaber
of bits are in
error .• )

&-330, Pretest error.

A-040

Berun routine
1512.

Type 1 Scanner 1FT

!

IBK 3105 COKKUHICATION5 CONTROLLER
TYPE 1 COKftUNICATIOHS SCANNER 1FT SYHPTOK INDEX

e
e

ROUT. ERROR PUNCTION TESTED
CODE
0%02 Before attempting to
set the tested bit,
ensure that the CS
reset was successful.

151A

e
e
e
fa

ERROR DESCRIPTION
After resetting and enabling
the scanner and forcing
the scanner to stop at the
tested address, bits in an
IN X'Q3' that should have
been reset, vere not. Beg.
X'11' contains the line (BCB)
address under test. Reg.•
X"5' indicates the bits that
were not reset in the IN 1'43':
Byte 0:
Bit 3-digit present
Bit 4-transmit model
HBB-8
Bit 5-new sync/NBR-4
Bit 6-request to sendl
IIBB-2
Bit 1-send data/HBR-l
Byte 1:
Bit 4-call request
Bit S-diagnostic mode

D99- 3105E~ 09

SUSPECTED CARD
LOCUION(S)
YIIG2

PROG
U5K

FEAtD

UTilI!

PAGE
B5308

PAGE
1-200

R5308
8S106

1-200
A-290

COl!I!ENT5
Pretest error.
Rerun routines
1518 and 1519.

1511

OX03

Ensure that the transmit
mode/NBR-8 bit, and that
bit only, can be set by
issuing OOT X'43' with
byte 1, bit 4 on.

151C

XXXI

Reset Transmit ftode/NBR-8 Bit: After the CS has been reset, tbe scanner is stopped at the tested address,
the transmit mode/NBR-8 bit is set, and a test is made to ensure that it can then be reset. (This test is
run on all installed line adapters, in tarn.)

151C

010'

Ensure that force bit
service (OUT 1'47') causes
a bit service ~;l.nterrupt from
the line addre~s under test.

e

Either the transmit lIodel
NBB-8 bit failed to set
or other bits in IN X'43'
set in error. Reg. X'15'
contains the bits in error.
If byte 0 .. bit 4 is on,
tbe transmit mode/NBR-8
bit failed to set. Reg.
X'l" contains tbe line
(BCB) address under test.

Y4G2
Y4E2

Test error.
Problem is most
likely in assocated line adapter.
(5ee General
Comments, f3.) If
bits other than
byte 0, bit 4 are
in error, sOlie
kind of interaction occurred.
Beg. X'll1' contains
the received IN
X'43' data.

After atwmpting to force a
Y4P 2, Y4G2
bit service level 2 interrupt
X.~II7')' froll the line
IBCB) address :Ln Reg. X' 11',
unmasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred froll that line.

85305

1-330, Pretest error.
1-040 Berun routine
1512 ••

"(Via' OU,!

lS1C

OX~

Ensure that the transmit
mode/HB8-8 bit, and that
bit only, can be set by
issuing OUT X'43' with
byte 1, bit 4 on.

Either the transllit model
NBB-8 bit failed to set
or other bits in IN X'43'
set in error. Reg. x',5'
contains the bits in error.
If byte 0, bit 4 is on, the
transmit mode/NB8-8 bit
failed to set. 8eg. x'11'
contains tbe line (BCBI
address under test.

Y4G2
YIIE2

85308
R5106

1-200
A-290

151C

OX03

Ensure that the transllit
mode/HB8-8 bit can be reset
via OUT X'43'.

1fter setting the transmit
mode/NB8-8 bit and attempting to reset it via OUT X'43'
vith all bits off, an
IN 1'113' still indicated
it as being set (or other
bits in IN X'43' were on
in error). Reg. 1'15'
contains the bits in
error. Byte 0, bit 4 on
indicates that the
transmit mode/HBB-B bit
failed to reset. Beg.
X'11' contains the line

Y4G2
tllE2

R5308
B5106

1-200, Test error.
1-290 Problem is most
likely 1n the
associated line
adapter. (See
Gene!:al Comments,
13.) If error
bits other than
the translli t
m04e/NBR-8 bit
are on, 1I0me
kind of interaction occurred.
Reg. X'14' con-

Type 1 Scanner 1FT

Pretest error.
Rerun routine
1511.

X3705PlA 5.0.11

,,'
IBK 3105 COKftUNICATIONS CONTROLLBR
TYPE 1 COKKUHICAT10NS SCANNER 1FT SYKPTOK INDEX
BOUT. ERROR FUNCTION TESTED
CODE

ERROR DESCRIPTION

D99-3105E-09

SUS PECTED CARD
LOCATION(s)

pROG
IIASK

FEUD
PAGE

PETIIK
P1GE

COIIKENTS
tains the dat4
received by tbe
1M %'43'.

(BCB) address under
test.

ISlE

XXIX

Set New 5ync/NBB-Q Bit:
After resetting and enabling the C5, stopping tile scanner on the tested line
address, and ensuring a successful reset, an attempt is made to set the new sync/NBR-4 bit. (This test is
run on all installed line adapters, in turn. It ensures that the bit can be set on All synchronous and
autocAll lines and ensures that the bit is not set on all others.)

ISlE

OXOI

Ensure that force bit
service (OUT X'41') causes
a bit service interrupt froD
the line address under test.

After attemptin9 to forc~ a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUT X'ij7') from the line
(BCB) address in 8eg. X'11',
unmasking level 2 interrupts and
vaiting the ti.e of a scanner
pass, no bit service interrupt
occurred fro. that line.

8S305

A-330, Pretest error.
1-040 Rerun routine
1512.

ISlE

OX02

Defore atte.pting to
set the tested bit.
ensure that the CS
reset vas successful.

After resetting and enabling
Y4G2
the scanner and forcing
the scanner to stop at the
tested address, bits in an
IN I'Q3' that should have
been reset, were not. Reg.
X'I1' conta ins the line (BCB)
address under test. Reg.
X'1S' indicates the bits that
were Dot reset in the IN X'43';
Byte 0:
Bit 3-digit present
Bit 4-transmit mode/
NBB-8
Bit 5-new sync/NBR-~
Bit 6-reguest to send/
"BB-2
Bit 7-send data/NBR-l

R5308

A-200

Pretest error.
aerun rouU DeS
1518 and 1519.

151J!

OXO 3

Ensure tha t the new
sync/NBR-4 bit in IN X'Q3'
can be set by issuing an
OUT X'43' with byte I,
bit 5 on.

Either the new sync/NBR-4
bit failed to act correctly
or other bits turned on in
error in the IR X'43'. Reg.
X' I I' contains the line (BCB)
address under test. Reg.
X'15' contains the bits in
error. (Byte 0, bit 5
indicates a new sync/NBR-4
bit error.) Reg. X'14'
contains tbe actual data
received by the IN X'43'.

R5308
R5106

A-200
A-290

Test er~or.
The problem is
probably in the
associated line
adapter. (See
General COII.ent,
13.) I f other
bits are in
error also, salle
kind of intetaction occurred.
If byte 0, bit 5
is on in both Reg
1'14' and 1'15',
the line address
tested was a start
stop adapter and
tbe new sync/NBB-4
bit set and should
not have.

1520

XXIX

Reset New Sync/NBR-4 Bit:
After the CS has been reset, the scanner is stopped.at the tested address. the
(This test will be run on
Dew sync/NBR-q is set, and a test is .ade to ensure that it can then be reset.
all installed line adapters, in turn, except start/stop.)

1520

OXOI

Ensure thdt force bit
service (OUT X'Q7') causes
a bit service interrupt from
the line address under test.

Y4F2, Y4G2B5305 A-330 Pretest error.
After attempting to force a
A-040 Rerun routlne
bit service level 2 interrupt
1512.
(via OU~ X'47') fro. the line
(BCB) address in Beg. I " l' ,
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1520

OX02

Ensure that the ne"
sync/NBR-4 bit in IN X'43'

Either the new sync/NBR-4
bit failed to act cQtrectly

5.0.12 X3705PAA

Y4G2
Y4E2

Y4G2
Y4E2

R5308
85106

A-200
A-290

Pretest error.
Rerun routine

Ty po 1 Scanner 1FT

..

--------~

o
o

----------~-~

IS5 3705 CO""UMICATIOHS CONTROLLER
TYPE, • COII!\UNICATION5 5C1UMI!R 1FT SYIIPTOII INDEX
~OOT.

It,
U

ERROR PUNCTION TEST~Q
CODE
can be set by ~ssuing an
OOT X'43' with byte 1,
bit 5 on.

ERBO~ DESC~IPT~ON

or'other bits turned on in
error in the IN X'43'. Beg.
X' 11' contains, the Une (BCSI
address under test. Beg.
X'15' contains the bits in
error. (Byte 0, bit 5
indicates a new sync/NBB-4
bit error.) 8eg. l'll1'
contains the actual data
received by the IN X'43'.

D99-3705E-09

SUSPECTED CABO
, tO~ATION(s)

PROG
"ASK

PEALD
PAGE

PETII!!
PAGE

CO!!ftE,1S,
15U.

1520

OX03

Ensure that the new sync
NBR-4 bit can be reset
via OUT X'43'.

1522

XXXX

Set Send Data/NBR-1 Bit: After the CS has been reset. the scanner is stopped at the tested address. and an
atteapt is made to set the send data/HBR-' bit. (This test is run on all installed line adapters, in turn.)

1~22

OXOI

Ensure that force bit
service (OOT X'47'I causes
a bit service interrupt fro.
the line address under test.

After attempting to force a
I4P2. Y4G2
bit service level 2 interrupt
(via OOT X'47') fro. the line
(BCBI address in Beg. x'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred fro. that line.

B5305

1-330. Pretest error.
A-040 Berun routine
1512.

1522

OX02

Before attempting to set
the tested bit. ensure
that the CS reset
was successful.

After resetting and enabling
the scanner and forcing the
scanner to stop at the tested
address. bits in an IN 1'43'
that should have teen reset.
were not. Beg. X'1,' contains
the line (BCBI address under
test. Reg. X'15' indicates
the bits that vere not reset
in the III X'43':
Byte 0:
Bit 3-digit present
Bit 4-transmit .ode/
NB1I-8
Bit 5-new sync/HOIl-4
Bit 6-reguest to send/
NBB-2
Bit 7-send data/NBB-l
Byte 1:
Bit 4-call request
Bit 5-diagnostic mode

Y4G2

85308

A-200

Pretest error.
Berun routines
1518 lind 1519.

1522

0103

Ensure that the send
data/NBB-1 bit in IN
X'43' can be set by
issuing an OUT X'43'
with byte 1, bit 7 on.

Either the send data/NBB-!
bit failed to set or other
bits were set in error in
the IN X'43'. Reg X'15'
contains the bits in IN
X'43' in error. (Byte 0,
bit 7 on indicates a send
data/HBR-' bit set failure. I
Beg X",' contains the line
(BCBI address under test.

Y4G2
Y4E2

115308
85106

A-200
A-290

Test error.
The problem is
probably in
the associated
line adapter.
(See General
Comments. 13.1
If other bits
are in error.
sOllie kind of
interaction problem
exists. Beg. X"4'
contains th. actual

Type 1 Scanner IPT

After.setting the new
sync/NBR-4 bit, an attempt
vas made to reset it via
OUT X'43' with all bits
off. An IN X'43' then
indicated the bit as still
being set (or other bits
were set in error). Beg.
X' 15' contains the bits
in error. Byte 0, bit 5
on indicates that the
new sync/NBR-4 bit failed
to reset. Reg. X'11'
contains the line IBCBI
address under test.

Y4Cl2
14E2

85308
R5106

A-200
1-290

Test error.
Problem is
probably in the
associated line
adapter. (See
General Comments.
'3.) If error bits
other than the
nev sync/HB 11-11
bit are on. some
kind of interaction occurred.
lIeg. X'14' contains the actual
datil received by
t be IN X' 43' •

X3705FAA 5.0.'3

v

IBK 3105 COHHUNICATIONS CONTROLLER
TYPE 1 CO"HUNICATIONS SCANNER 1FT SYKPTOH INDEX
BOUT. ERROR PUNCTION TESTED
CODE

ERROR DESCRIPTION

099-37058-09

SUSPECTED CARD
LOCATION Is)

PROG
"ASK

PEALD
PAGE

PETKS
PAGE

COKHENTS
data received by
the IN X'43'.

1524

XXXX

Reset Send Data/NBR-l Bit: After the CS has been reset, the scanner is stopped at the tested address, the
send data/NBR-l bit is set, and a test is ude to ensure that i t can then be reset. (This test is run on
all installed line adapters, in turn.)

1524

OXOI

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4P2, Y4G2
bit service level 2 interrupt
(via OUT 1'47') from the line
(BCB) address in Beg. X'11',
unmaeking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

8S305

A-330, Pretest error,
A-040 Rerun routine
1512.

OX02

Ensure tha t the send da tal
NBB-l bit in IN x'43'
can be set by issuing
an OUT X'4j' with
byte 1, bit 7 on.

Either the send data/NBR-l
hi:1; failed''to set or other
bits were set ill error in
the IN 1'43'. Reg_ X'11'
contains the lins (BCB)
address under test. Reg.
X'15' contains the bits
in IN X'43' in error.
(Byte 0, bit 7 on indicates
a send data/NBR-l bit set
failure. )

R5308
85106

1-200
A-290

prete~t error.
Berun routine
1522.

OX03

Ensure that the send
data/NBR-l bit can be
reset via OUT X'43'.

After having set the send
data/NBR-l bit, an atteapt
was made to reset it via
OUT 1'43' with all bits
off. An IN 1'43' then
indicated the bit was still
set (or other bits were set
in error). Reg. X'15' contains the bits in error.
Byte 0, bit 7 on indicates
that the send data/NBB-l
bit failed to reset. Reg.
X'11' contAins the line
(BCB) address under test.

Rs308
85106

A- 200
A-290

Test error.
Problem is
probably in
the associated
line adapter.
(See General
Comments, '3.) If
error bits other
than the send
data/NBR-l bit
are on, some
kind of interaction occurred.
Reg. X'14' contains the actual
data received by
the IN X' 43'.

1526

XXXX

Set Rcquest-to-Send/NBR-2 Bit: After the CS has been reset, the scanner is stopped
and an attempt is made to set the request-to-send/NBB-2 bit. (This test is run
adapters, in turn.)

1526

OXOI

Ensure that force bit
service (OUT X'47') Cduses
a bit service interrupt from
the line addres. under test.

After attempting to force a
Y4P2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCD) address in Reg. X' 11',
unmanking level 2 Intdtruptl and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

85305

A-330, fretest error.
A-040 Berun routine
1512.

1526

OX02

Before attempting to
set the tested bit,
ensure that the CS
reset was successful.

After resetting and enabling
Y4G2
the scanner and forcing
the scanner to stop at the
tested addr~ss, bits in an
IN X'43' that should have
been reset, vere not. Beg.
X'11' contains the line (BCB)
address under test. Reg.
X'15' indicates the bits that
were not reset in the IN X'43':
Byte 0:
Bit 3-digit present
Bit 4-transmit model
NB8-8

RS308

1-200

5.0.14 X3705PAA

Y4G2
Y4E2

at the tested address,
on all installed line

fret est error.
Rerun routines
1518 and 1519.

Type 1 scanner 1FT

o

o
099-3705E-09

rBft 3105 CONftUNICATIONS CONTROLLER

TY,E 1 COftftUNrCATIONS SCANHBB rrT staPTO! INDEX
ROOT. ERROR PORCTIOH TESTED
COpE

o

PROG
BASK

PEALD
P1GE

PETftft
P1GE

COftSENTS

RS308
BS106

A-200
1-290

Test error.
The problem
is ,probably lon
the associated
line adapter.
(See General
COllments, 13.)
I f other bits
are in error,
sOlie kind of
interaction
problem exists.
Beg. X'111' contains the actual
data received by
the IN X'1I3'.

Bit 5-new sync/HBR-4
Bit 6-request to sendl
lIIB8-2
Bit 7-sen4 4ata/HBR-1
Byte 1:
Bit 4-call request
Bit 5-~iagnostic lIode
,

o
e

SOSPECTED CARD
LOCATION Is)

EBROR DESCRIPTIOH

,

Eit'her the request-to-sendl
NBB-2 bit failed to set or
other bits vere set in
error in the IN X'43'. Deg.
X'11' contains the line
IBCB) address under test.
Reg. X'15' contains the bits
in IN X' 113' in ertO,t. (Byte
0, bit 6 on indicates a
request-to-send/BBB-2 bit
set failure.)

1526

OX03

Ensure that the request
to-send/HBD-2 bit can be
set by issuing an
ODT X'43' with byte 1,
bit 6 on.

1528

XXXX

Beset Bequest-to-Send/NBR-2 Bit: After the CS has been reset, the scanner is stopped at the tested address,
the teguest-to-send/NBR-2 bit is set, and a test is lade to enSUre that it can then be reset. (This test is
rUn on all installed line a4apters, in tutn.1

1528

OX01

Ensute that force bit
setvice (ODT X'Q1') causes
a bit service intetrupt fto.
the line address undet test.

1528

OX02

Befote atteBpting to
set the tested bit,
ensute that the cs
reset vas successful.

After resetting and enabling
the scan net and forcing
the scanner to stop at the
tested address, bits in an
IU I'~3' that should have
been reset, ~ere not. Beg.
X'11' contains the line
IBCB) address under test.
Reg. X'15' indiCates the
bits that vere not reset in
the IH 1'113':
Byte 0:
Bit 3-digit present
Bit II-transmit lIodel
N88-8
Bit 5-nev sync/HBR-4
Bit 6-reguelt to le04/
RBB-2
Bit 1-send data/RBB-l
Byte 1:
Bit q-call tequest
Bit 5-diagnostic lIode

Y4G2

BS308

A-200

Pretest error.
Beton routine~
1526.

1528

OX03

Ensure that the request-to
send/NBR-2 bit can be reset
via OOT X'43'.

After baving set the requestto-send/RBR-2 bit, an attempt
vas made to reset it via OUT
X'II3' vith all bits off.
in IU X'II3' then indicated the
bit vas still ,set lor other
bits were sat in ertor).
Reg. X'15' contains tbe bits
in errot. Byte 0, bit 6 on
indicates that the requestto-send/RBB-2 bit failed to
reset. Beg. X'11' contains
the line IBCB) address
under test,.

Y4G2
Y4E2

RS308
BS106

A-200
A-290

test error.
The problem is
prollably in the
associated line
adapter. (See
General Comments,
13.) If other
error bits are
on, SOBe kind of
interaction
occurred. Reg.
1'14' contains
the actual data
received by

Type 1 Scanner IPT

Aftet attempting to force a
YQP2, t4G2
bit service level 2 interrupt
(via OO! 1'41') froa the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
vaiting the tiBe of a scanner
pass, no bit service intertupt
, occurred froll that line.

B5305, A-330, Pretest error.
A-040 Retun routine
1512.

X3105PU 5.0.15

IP" 3705 CO~"UN~cATIONS CONTROLLER
TYPE 1 COKKUNICAtIONS SCANNER 1FT SYKFTOK INDEX
I

BOUT. ERROa PUNcTION TESnD
CODE

ERROR DESCRIfTIOH

P99-3705E-P9 .

SUSPECTED CARD
LOCATION(s)

PROG
"A5~

PEALD
PAGB

PETKK
PAGE

COKKEHT5
the IN X'43'.

152A

XXXX

Set Synchronous Kode Bit: After the CS has been reset, the scanne~ is stopped at the tested address, and an
attempt is made to set the synchronous mode bit. (This test is run on all installed line adapters, in turn.
It ensures that the bit can be set on all synchronous lines and en&Ures that it is not set on all others.)

152A

OX01

Ensure that force bit
service (OOT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4P2,14G2
bit service level 2 interrupt
(via OUT X'41') fr~. the line
(BC~ aSdress in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line .•

152!

0102

Before attempting to set
the tested bit, ensure
that tbe CS reset was
succelllhl.

After resetting and enabling
the CS and forCing the scanner
to stop at the tested address,
all bits in an IN I'Q2' shou14
havo bien ott (rlsotl an4
were not. Ile'i!. X'11' contains
the line (BCB) address under
test. Beg. X'15' indicates
the bits in the 1M 1'42' that
were not reset:
. eyte 0.:
Bit 6-mode bit 1
Bit 1-mode bit 2
Byte 1:
Bit O-low priority
Bit l-diagnostic mode
Bit 2-data terminal ready
Bit 3-syncbronous lode
Bit 4-oxternal clock
Bit 5-data tate select
Bit 6-oscillator select 1
Bit 7-oscillatot select 2

Y4G2

Either the synchronous mode
bit failed to act correctly
or other bits in the IN
X'42' turned on in error.
Beg. X'11' contains the
line (BCB) address under
test. Beg. X'151 contains
the bits in error. (Byte
1, bit 3 on indicates a
sync~ronous mode bit
error.) Beg. 1'14' contains
the actual data received
by the IN X'42'.

nG2

B5305

1-330, Pretest error.
1-0.40 Berun routine
1512.

1-150

l'PPl'

85304
8530Q

1.-170

85304
B5306
8530.6
8530.6
RS3o.6
B53o.6
8530.6
85306

1-170
1-160
1.-160.
1-160.
1-160.
1-160.
1-160.
1-160

8530.6
8510.6

A-16o.
A-270

Pretest error.
Beron routi ne
1516.

A-17o.

152A

OX03

Ensure that the synchronous mode bit in IN
X'42' can be set by
issuing an OUT 1'42'
with byte 1, bit 3 on.

152C

XXXX

Reset synchronous Mode Bit: After the CS has been reset, the scanner is stopped at the tested address. the
synchronous lIode bit is set, and a test is made to ensure that it can then be rjlset. (This test is run on
all installed synchronous line adapters, in turn.)

152C

DXOl

Ensure that force bit
service (OOT 1'41') Causes
a bit service interrupt from
the line address under test.

5.0..16 X3105PAA

Y41!2

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OO! 1'41') from the line
(BCB) address in Reg. X'11' ,
unmasking level 2 interrupts and
waiting the tiae of a scanner
pass, no bit service interrupt
occurred from that line.

O~FP

RS3o.S

A-3~D,

A-D4o.

Test error.
Problem is probably in the
associated line
adapter. (See
General COil menta,
'3.) If other
bits are in
error, some kind
of interaction
occurred. If byte
1, bit 3 is on in
both regs. X'14'
and X'15'. the
line address tested
was a start-stop
adapter an4 the
synchronous mode
bit set and shoold
not have.

Pretest error.
Rerun routine
1512.

Type 1 Scanner IPT

I
ISH 3705 COMMUNICATIONS CONTROLLER

D99-3705E-09

TYPE 1 COMMUNICATIONS SCANNBR 1FT SYMPTOM INDEX
~OUT.

152C

ERBOR FUNCTION TESTED
CODE
OX02 Ensure that the synchronous mode bit in IN
X'42' can be set by
issuing an OUT X'42'
with byte 1, bit 3
on.

ERROR DESCRIPTION
Either the synchronous mode
bit failed to set,
or other bits in the IN
X' 42' turned on in error,.
Reg. X'11' contains the
bits in error. (Byte 1.
bit 3 on indicates a
synchronous mode bit
error.) Reg. X'14' contains
the actual data received
by the IN X'42'.

SUSl'ECTED CARD
LOCATION (s)
Y4G2
HE2

PROG
IIASK
03FF

FEUD
PAGE
BS306
BS106

FETIIM
PAGE
A-160
1-270

COIIMENTS

03FF

R5306
B5106

A-160
A-270

Test error.
Problem is
probably in the
associated
line adapter.
(See General
COlllments, '3.)
I f otber bits
are on in error,
sOllie kind of
interaction
occurred. Reg.
1 '14' contains
the actual data
recei ved by the
IN X'42'.

Pretest error.
Rerun Loutine
152A.

.S2C

0103

Ensure that the synchronous mode bit can be
reset via OOT X'42'.

152E

XXXX

Set Data Rate ~elect pit: After the CS has been reset, the scanner is stopped at the tested address, and an
attempt is lIlade'to set the data'r,ate selebt bit. '(This test is run, Qn all installed :joine adapters, in t~!;n.
This ensures t~at tbe bit can be set on all synchronous lines and enkures that it is not set on all otpers.)

152E

OXOl

Ensure that force bit
service lOUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUT 1'47') from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

152E

0102

Before attempting to set
the tested bit, ensure
that the CS reset vas
successful.

After resetting and enabling
the CS and forcing tbe scanner
to stop at the tested address,
all bits in an IN X'42' should
have been off (reset) and
were not. Reg. X'11' contains
tbe line (BCB) address under
test. Reg,. X' 15' indica tes
the bits in the IN X'42' that
were not reset:
Byte 0:
Bit 6-mode bit 1
Bit 7-mode bit 2
Byte 1:
Bit O-low priority
Bit I-diagnostic mode
Bit 2-data terminal ready
Bit 3-synchronous mode
Bit 4-external clock
Bit 5-data rate select
Bit 6-oscillator select 1
Bit 7-oscillator select 2

Y4G2

Ei ther the data rate select
bit failed to act correctly
or other bits in IN 1'42'
turned on in error. Reg.
X'11' contains tbe line
(BCB) address under test.
8eg. X'15' contains tbe
!lits in orror. (Byte 1,
bit 5 on indicates a data
rate select bit failure.)

Y4G 2
Y4E2

152E

OX03

Ensure that the data
rate select bit in IN
X'42' can be set by
issuing OUT X'42' with
byte I, bi t 5 on.

Type 1 Scanner 1FT

After baYing set the synchronous mode bit, an attempt
to reset it was made via
OOT 1'42' with all bits
off. An IN 11' 42'
then indicated the bit
was still set (or other
bits wete set in error).
Reg. 1'15' contains the
bits in error. Byte 1, bit
3 on indicates that the
synchronous mode bit
failed to reset. Reg.
X'11' contains the line
(BCB) address under
test.

8S305

Fl'FF

031');'

A-330, Pretest error.
A-040 Reron routine
1512.

1-150

8S304
R5304

A-110
A-110

RS304
R5306
8S306
IlS306
RS306
R5306
RS306
85306

A-170
A-160
A-160
A-160
A-160
A-160
1-160
1.-160

85306
R5,06

A-160
A-270

Pretest error.
Eerun routine
1516.

Test error.
Problem is
probably in the
associated line
adapter. (5 ee
General Comments,
13.1 If other
bits are on in
error, some kind
of inUnction

X3705FAA 5.0.17

,,'

IB~ 370' COftftUNICATIONS CONTROLLER
TIP! 1 COftftUHIC1TION5 SCANNBR 1FT SYftPTO~ INDBX

ROUT. BRROR FUNCTION T!ST!D
COD!

BRBOR DESCRIPTION

099-31051-09

SUSPECTED CARD
LOCATION(s)

FROG
IIASK

l'l!AtD
PAGB

FETftII
PAGB

COllftl!lI'rS
occurred. If byte
1, bi\ 5 is on in
both tegs x',4'
and X'15'. the line
under test was a
start-stop adapter
and the data rate
select bit set and
should pot ha,e set

Beg. 1'14' contains the
actu~l dat, recei,ed by
:

'\;Ii.~ 1M X'42~.

1530

XXXX

Beset Data Bate Select Bit: After the CS has been reset, the scanner is'stopped at the tested address, the
data rate select bit is set, and a test is made to ensure that it can then be reset. (This test is run on
all installed synchronous line adapters, in turn.)

1530

OXOl

Bnsure that force bit
service (OOT X'41') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OOT X'47') fro. the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1530

0102

Ensure that the data
rate select bit in IN
X'42' can be set by
issuing OUT X'42' with
byte 1, bit 5 on.

Either the data rate select
bit failed to set
or other bits in IN X'42'
turned on in error. Reg.
X"" contains the line
(SCS) address under test.
Reg. X'15' contains the
bits in error. (Byte 1,
bit 5 on indicates a data
rate select bit failure.)
Beg. X'14' contains
the actual data recei,ed
by the IN X'42'.

1530

0103

Ensure that the data rate
select bit can be reset
via OOT X' 42' •

After having set the data
rate select bit, an attempt
to reset it was msde via
OUT Z'42' with all bits
off. An IN I' 42' then
indicated tbe bit vas still
set (or other bits vere
set in error). Beg. 1'15'
contains tbe bits in error.
Byte 1, bit 5 on indicates
tbat tbe data rate select
bit tailed to reset. Beg.
I'll' contains the line
(BCB) address under test.

1532

XXXX

Set Data Tetainal ~eady (DTR) Bit: After the CS has been reset, the scanner is
address, and an attempt 1s made to set the data terlinal ready (DTI) bit. (This
installed non-autocall line adapters, in turn.)

1532

OX01

Ensure that force bit
service (OUT X'47') causes
a bit service intertupt from
the line address under test.

After attempting to force a
Y4F2,X4G2
bit service level 2 interrupt
(via onT 1'41') from tbe line
(eCS) address in Beg. X'11',
unlasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred fro. that line.

1532

0102

Before attempting to set
the tested bit, ensure
that the CS reset vas
successful.'

After resetting and enabling
the CS and forcing tbe scanner
to stop at tbe tested address,
all bits in an 1M X'42' should
bave been off (reset) and
vere not. Reg. X'11' contains
the line (BCB) address under

5.0.18 X3705PAA

15305

1-330, Pretest error.
1-040 lerun routine
1512·

Y4G2
14E2

03FF

85306
15106

A-160
A-270

Pretest error.
Rerun routine
152E.

Y4G2

03FF

BS306
85106

1-160
1-210

Test errot.
Problem is
probabl y in the
associated line
adapter. (See
General Co.ments,
.3.) If other
bits are on, in
error, soae kind
of interaction
occurred. Reg.
X"II' contains
the actual data
recei ted by the
1M X'42',

nB2

Y4G2

stopped at the tested
routine is run on all

BS305

l'FFF

1-330, Pretest error.
1-040 Berun routine
1512.

1-150

Pretest error.
Rerun routine
'516.

Type 1 Scanner 1FT

Ie~ 3705 COK~UNIC1TIONS CONTBOLLER
. TYPE 1 COKKUNICATIOHS SC1NNBR IPT SYftPTOft INDEX

It
It
It
It

ROUT. EUOR PUNCTION TESTED
COOS

BIBOB DESCRIPTION
test. Beg. X'1S' indicates
the bits in the II X'42' that
IIere not reset:
Byte 0:
Bit 6-lIode bit 1
Bit 7-lIIode bit 2
Byte 1:
Bit 0-1011 priority
Bit 1-diagnostic mode
Bit 2-data terminal ready
Bit 3-synchronous .ode
Bit 4-external clock
Sit S-data rate select
Bit 6-oscillator select 1
Bit 7-oscillator select 2

D99-3105E-09

SUSPECTED CARD
LOCATION (S)

PROG
USK

FBALD
lIAOB

FETKft
PAGB

BS304
IS30Q

1-170
A-110

IS304
IS306
B5306
15306
15306
RS306
B5306
15306

A-170
1-160
1-160
1-160
1-160
1-160
1-160
A-160

15306
15106

A-160
1-270

CORRENTS

1532

OX03

Ensure that the data
terminal ready (DTI) bit
in IN X'42' can be set
by issuing OUT X'42' with
byte 1, bit 2 on.

1534

XXXX

Beset Data Terminal Beady (DTI) Bit:
After the CS has been reset, the scanner is stopped at the tested
address, the data terminal ready (DTB) bit is set, and a test is made to ensure that it can then be reset.
(This test is run on all installed non-autocall line adapters, in turn.)

153',

OX01

Bnsure that force bit
service (OUT X'1I7') causes
a bit service interrupt from
the line address under test.

After attempting to force a
YQF2, Y4G2
bit service level 2 interrupt
(via OO~ X'47') from the line
(BCB) address in Beg. X'11'.
unmasking legel 2 interrupts and
waiting the time of a scanDer
pass, DO bit service interrupt
occurred from that line.

15311

OX02

Bnsure that the data
terminal ready (DTB) bit
in IN X'42' can be set
by issuing OOT X'42' vith
byte 1, bit 2 on.

Bither the DTB bit failed to
Y4G2
set or other bits in IN X'II2'
YQB2
were set in error. Beg. X'11'
contains the line (BCB) address
under test. Beg. X'15' contains
the bits in error. (Byte 1.
bit 2 on indicates a DTI bit
failure.) Beg. X'14' contains
the actoal data received by
IN X'42'~

1534

OX03

Ensllre that the data
teninal ready (DTB) bit
can be reset via OOT
X'1I2'.

After having set the data
terminal ready bit, an
attellpt to reset it lias made
via OOT X'Q2' witb all bits
off. An IN 1'112' then
indicated the bit lias still
set (or other bits IIere set
in error). Beg. X'15' contains the bits in error.
Byte 1, hit 2 on indicates
that the data terminal ready
bit failed to reset. leg ..
X'11' contains the line
(BCB) address under test.

1536

xxxx

Set External Clock B1 t: After the CS has been reset, the scanner is stopped at the tested address, and an
attempt is made to set the external clock bit. (This rou~ine is run on all installed line adapters, in
turn. It ensures that the bit can be set on all synChronous lines and ensures that it is not set on all
others. )

e
e

0·
,

I

Type 1 Scanner 1FT

Either the DT8 bit failed to
yqG2
set or other bits in IN X'Q2'
YQB2
IIere set in error. leg. X'11'
contains the line (SCB) address
under test. Beg. X'15' contains
the bits in error. (Byte 1,
bit 2 on indicates a DTI bit
failure.) leg. X'14' contains
the actual data received by
n X'42'.

YII02

Y4B2

03FF

Test error.
Problelll is
probably in the
associated line
adapter. (see
General COllments,
13-) If other bits
are on in error,
salle kind of
interaction has
occurred.

15305

A-330, Pretest error.
1-040 aeron routine
1512.

03FF

BS306
aS106

A-160
1-270

Pretest error.
Berun routine
1532.

03FF

8S306
BS106

A-160
A-270

Test error.
Problem is
probably in
the associated
line adapter.
(See General
Comlllents •• 3.)
If other bi ts
are on in error,
sOllie kind of
interaction
occurred. leg.
X'H' contains
the actual data
received by the
IN X'42'.

X3705FAA 5.0.19

IBK 3105 COMMUNICATIONS CONTPOLLER
TYPE t COMMUNICATIONS SCANNEP 1FT SYMPTOM INDEX
ROUT. ERROR FUNCTION TESTED
CODE
1~36
OXOl Ensure that force bit
service (OUT 1'41') causes
a bit service interrupt from
the line address under test.

1536

OX02

Before attempting to set
the tested bit, ensure
that the CS reset was
successful.

ERROR DESCRIPTION
After attempting to force a
bit service level 2 interrupt
~ia OUT X'41') from the line
(BC~ address in Beg. X'll',
unmasking level 2 interrupts and
waiting the time ot a Bcanner
pass, no bit service interrupt
occurred from that line.
After resetting and enabling
the C5 and forcing the scanner
to stop at, the tested address,
all bits in an IN X'42' sbould
have been off (reset) and
were not. Reg. X'11' contains
the line (BCB) address under
test. Reg. X'15' indicates
the bits in the IN X'42' that
were not reset:
Byte 0:
Bit 6-mode bit 1
Bit 7-mode bit 2
Byte 1:
Bit O-low priority
Bit l-diagnostic mode
Bit 2-data terminal ready
Bit 3-synchronous mode
Bit q-external clock
Bit 5-data rate select
Bit 6-oscillator select 1
Bit 1-oscillator select 2

099- 3105E-09

SUSPECTED CARD
LOCATION (s)
Y41' 2, Y4G2

PPOG
MJl.SK

Y4G2

Fl'l'F

l'ET!lM

nGE

PAGE

R5305

1-330
1-040

Pretest error.
Berun routi ne
1512.

A-150

Pretest error.
Rerun routine
1516.

R5304
B53011

1\-170

B5304
R5306
RS306
RS306
B5306
R5306
RS306
RS306

A-170
A-160
"'-160
"'-160
A-160
A-160
1-160
&-160

R5306
85106

A-160
A-270

COMMENTS

A-170

'536

OX03

Ensure that the external
clock bit in IN X'42' can
be set by issuing OUT 1'42'
with byte 1, bit 4 on.

1536

XXXX

Reset External Clock Bit:
After the C5 has been reset, the scanner is stopped at the tested address, the
external clock bit is set, and a test made to ensure that it can then be reset. (This test is run on all
installed synchronous line adapters, in turn.)

1538

OXOl

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After. attempting to force a
Y4P2, Y4G2
bit service level 2 interrupt
(via OU7 X'41') from the line
(BCB) address in £teg. X"",
unmasking level 2 interrupts, and
waiting the time of a scanner
pass, no bit service interrupt
occurred tram that line.

1538

OX02

Ensure that the external
clock bit in IN X'42' can
be set by issuing OUT 1'42'
with byte 1, bit 4 on.

Either the external clock bit
Y4G2
failed to act correctly or
Y4E2
other bits 1n IN X'42' turned
on in error. Eeg. X'll' contains
the line (BCE) address under
test. Reg. X'15' contains the
bits in errOl:. (Eyte 1, bit 4
on indicates an external clock

5.0.20 X3705l'AA

Either the external clock bit
Y4G2
failed to act correctly or
YQE2
other bits in IN X'Q2' turned
on in error. Reg. X'11' contains
the line (BCB) address under
test. Reg. X' 15' contains the
bits in error. (Byte 1, bit 4
on indicates an external clock
bit set failure.) Beg. )('14'
contains the actual data
received by the IN X'42'.

l'EAtD

03fP

03l'F

Test error.
Problem 1s
probably in the
associated line
adapter. (See
General Comments,
13.) If other bits
are on in error,
sOllie kind of
i nt eraction
occurred. If
byte 1, bit 4 is
on in both regs
X'14' and X' 15',
the line under
test was a startstop or autocall
adaptEr and the
external clock bit
set and should
not have set. '

R5305

A-330, Pretest error.
A-040 Berun routine
1512.

R5306
RS106

A-160
A-270

Pretest error.
Rerun routine
1536.

Type 1 Scanner IPT

II

II

o
o
lell 3705 COIIIlUHICATIONS CONTROLLER
TYPE 1 COIIIIUHICATIOHS SCARKER 1FT SYII~TOIl INDEX
BOUT. EBBOB PONCTIOR TESTED
CODE

ERROB DESCRIPTION

D99-3705E-09

SUSPECTED CABO
'lOC1TIOK(S)

PROG
111SK

FEALD
P1GE

FETIIII
PAGE

COIIIIENTS

03FF

RS306
RS106

1-160, Test error.
A-270 ~roble. is
probably in
associated line
adapter. (See
General Comments,
'3.) I f other
bits are on, in
error, some kind
of interaction
occurred. Reg.
X'14'contains the
actual data
received by the
IB X'42'.

bit set failure.) Reg. X'14'
contains the actual data
received by the IN X'q2'.
1538

OX03

Ensure that the external
clock bit can be reset
da OU'1' X'42'.

15lA

XXXX

set Diagnostic 1I0de Bit in IN X'42': After the C5 has been reset, the scanner is stopped at the tested
address, and an attempt made to set the diagnostic mode bit. (This routine is run on all installed line
adapters, in turn. It tests that the bit can be set on all non-autocall lines and that it is not set on all
autocall lines.)

153A

OXOl

Ensure that force bit
service (00'1' X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
YQF2, X4G2
bit service level 2 interrupt
(via 00'1' X'Q7') from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred frol that line.•

OX02

Before attempting to set
the tested bit, ensure
that the CS reset vas
successful.

~fter resetting and enabline
the Cs and forcing the scanner
to stop at the tested address,
all bits in an IN X'42' should
have been off (reset) and
vere not. Reg. X'I" contains
the line (BCB) address unde;
test. 8eg. X'15' indicates
the bits in the IN "Q2' that
vere not reset:
Byte 0:
Bit 6-lode bit 1
Bit 7-IOde bit 2
Byte 1:
Bit O-lov priority
Bit 1-diagnostic mode
Bit 2-data terminal ready
Bit 3-synchronous mode
Bit 4-external clock
Bit 5-data ~ate select
Bit 6-oscillator select ,
Bit 7·oscillator select 2

o

o

U

153A

o
o
'53&

OX03

Ensure that the diagnostic
mode bit in IN X'42' can
be set by issuing OU'1' X'Q2'
vith byte 1, bit 1 on.

Type 1 Scanner 1FT

After having set the external
Y4G2
clock bit, an attempt to reset Y4E2
it vas made via 00'1' X'42' with
all bits off. An IN X'42'
then indicated the bit vas still
set lor other bits were set in
error). Reg. X'lS' contains the
bits in error. Bytes 1, bit 4
on indicates that the external
clock bit failed to reset.
Reg. X"l' contains the line
(BCB) address under test.

YQG2

Either the diagnostic lode bit 14G2
failed to act correctly or
Y4E2
other bits in the 1M X'Q2'
turned on in error. Beg. X'11'
contains the line (BCB) address
under test. Reg. 1'15' contains
the bits in error. (Byte 1,
bit 1 on indicates a diagnostic
lode bit failure.) Reg. X"Q'
contains the actual data
received by the IN X'Q2'.

85305

PFFF

03FP

1-330. Pretest error.
1-040 Rerun routine
1512.

1-150

RS304
85304

A-170
1-170

RS304
B5306
R5306
BS306
B5l06
B5306
RS306
R5306

A-170
1-160
A-160
A-160
A-160
A-160
1-160
1-160

B5306
B5106

1-160
1-270

Pretest error.
Rerun routine
1516.

Test error.
Problem is
probably in the
associa ted line
adapter. (5ee
General Comments,
'3.) I f other
bits are on in
error, soae kind
of interaction
occurred. If
byte 1, bit 1 is
on in both Begs.
X'1S' and X'14',
the line adapter
tested vas an
autocall adapter
and the diagnostic

X370SFAA 5.0.21

IBM 3705 COMMU~ICATIONS CONTROLLER
fYPE 1 COMMUNICATIONS SCANNER 1fT SYMPTOM INDEX
ROOT. ERROR PUNCTION TESTED
CODE

ERROR DESCRIPTION

099- 37 05E- 09

SOSPECTED CARD
LOCATION(s)

PROG
MASK

PEALD
PAGE

PETM"
PAGE

COMMENTS
mode bit set and
should not have.

153C

XXXX

Reset Diagnostic Mode Bit in IN X'42': After the CS has been reset, the scanner is stopped at the tested
address, the diagnostic mode bit is set, and a test made to ensure that it can then be reset. (This test is
run on all installed line adapters, in turn, except autocall.• 1

IS3C

OXOI

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2. Y4G2
bit service level 2 interrupt
(via OOT X'47') from the line
(BCB) address in Reg. X' 11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred frol that line.

ISle

OX02

Ensure that the diagnostic
mode bit in IN X'42' can
be set by issuing OUT 1'42'
with byte 1, bit Ion.

Either the diagnostic mode bit YQG2
failed to act correctly or
Y4E2
other bits in the IN X'42'
turned on in error. lie '.I.. 1'11'
contains the line (BCBI address
under test. Reg. X'lS' contains
the tits in error. (Byte I,
bit 1 on indicates a diagnostic
mode bit failure.) lIeg. 1'14'
contains the actual data
received by the IN X'42'.

153C

OX03

Ensure that the diagnostic
mode bit can be reset via
OUT X'42'.

After having set the diagnostic Y4G2
mode bit, an attempt to reset
Y4E2
it was made via DDT X'42' with
byte 1, bit I off. An IN X'42'
then indicated the bit was still
set (or other bits were set in
error). Reg. X'lS' contains the
bits in error. Byte 1, bit 1
on indicates that the
diagnostic mode bit failed to
reset. Reg. X'11' contains
the line (SCBI address under
test.

153E

XXXX

Set Diagnostic Mode Bit in IN X'43': After the CS has been reset, the scanner is stopped at the tested
address and after ensuring that tpe diagnostic mode bit in IN X'43' is not on, the diagnostic mode latch in
the line adapter is set via OOT X'42'. The scanner is then started and stopped again to allow the
diagnostic Ilod,e bit in IN X'431, 1'0 I>e set;.by control-in-B and a Ch~Ck made to ensure that it has set. (;r~is
test is run on: all installed line, adapters, in turl., except autocalll)

153E

OXOI

Ensure that force bit
service (DOT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4P2, Y4C2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCB) address in Reg. X'll',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

RS305

A-330, Pretest error.
A-040 Rerun routine
1512.

153E

OX02

Before attempting to
set the tested bit,
ensure that the CS
reset was successful.

After resetting and enabline
Y4G2
the scanner and forcing
the scanner to stop at the
tested address, bits in an
IN X'43' that should have
been reset, were not. Reg.
X'II' contains the line (BCIlI
address under test. aeg.
X' IS' indicates the bits that
were not reset in the IN X'43':
Byte 0:
Bit 3-digit present
Bit 4-transmit model
NBB-8

BS308

A-200

5.0.22 X3705FAA

115305

1.-330, Pretest error.
"-040 Rerun routine
1512.

03FF

115306
B5106

A-160
A-270

Pretest error.
Rerun routine
1531..

03PF

115306
115106

&-160
A-270

test error.
Problelll is
probably in
associated line
adapter. (See
General Comments,
'3.) If other
bits are on in
errot, some kind
of in teract ion
occurred. Reg.
I' 14' contains
the actual data
rece! ved by the
IN 1'42'.

Pretest error.
Rerun routi nes
151e and 1519.

Type 1 Scanner 1FT

1BK 3705 CO"KUNICATIONS CONTROLLER
TYPE 1 COMMUNICATIONS SCANHEa 1FT Sla~TO" INDEX
, ROUT. ERROR FUNCTION.TESTED
CODE

ERROR DESCaIPTION

P99-3705E-09

SUSPECTED CARD
LOCATION(s)

PROG
MASK

FEALD
PAGE

FET"S
PAGE

COMSENTS

85306
aS106

A-160
1-270

~retest error.
Berun routine

Bit ~new sync/NBR-4
Eit 6-request to sendl
NBR-2
Bit 7-send data/NB8-1
Byte 1:
Bit 4-ca11 request
Bit 5-diagnostic 80de
lS3E

OX03

Ensure that the diagnostic
. mode bit in IN X'~2' can
be set by issuing OUT X'42'
with byte 1, bit 1 on.

Either the diagnostic mode bit Y4G2
failed to act correctly or
Y4E2
other bits in the II X'42'
turned on in error. aeg.• X'11'
contains the line (BCB) address
under test.. Reg. X'15' contains
the bite in error. (Byte 1,
bit 1 on indicates a diagnostic
mode bit failure.) Reg. 1'14'
contains the actual data
received by the 1M 1'42'.

OlFF

0004

1531.

153E

OX04

Ensure that the diagnostic
mode bit in IN 1'43' can
not be set by the OCT X'42'
just issued until the
scanner bas again been
started.

After having set the diagnostic Y4G2
mode bit in 1M X'42' and not
starting the scanner, the
diagnostic mode bit in IN X'43'
vas on (byte 1, bit 5). Reg.
X' 11' contains the line (BCB)
address under test.

153E

OX05

Ensure that force bit
service (OUT X'41') causes
a bit service interrupt from
the line address under test.

After attempting to torce a
l4F2, Y4G2
bit service level 2 interrupt
(via OU1 X'47') from the line
(BCB) address in Beg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

153£

OX06

Ensure that once the
diagnostic mode latch in
a line adapter has been
set and the scanner has
been started and stopped
again, the diagnostic
mode bit in IN X'43'
can be set.

After having set the diagnostic Y4G2
mode bit in IN X'42', starting
the scanner and stopping it
again, an IN 1'43' failed to
indicate diagnostic mode as
being set (Byte 1, bit 5 on).
Reg. X'll' contains the line
(BCB) address under test.

1540

XXXX

Reset Diagnostic Mode Bit in IN X'43': After the CS has been reset, the scanner is stopped at the tested
address and the diagnostic mode latch in the line adapter is set. The scanner is started and stopped again,
and a check made to ensure that diagnostic mode is on in IN X'43'.
OCT 1'42' is issued to reset the
diagnostic mode latch, the scanner is again started and stopped, and a check made to ensure that the
diagnostic mode bit in IN X'43' is now off. (This test is run on all installed line adapters, in turn,
except autocall.)

Type 1 Scanner 1FT

0004

R5301

A-200

R5305

A- 330, Pretest error.
1-040 Berun routine
1512.

R5301

A-200

Pretest error.
Problem is
probably in the
CS. (See General
Comments, #3.)
The 'B in 6! latch
on the ALD given
should not be set
until the next
'53 time'. Since
the scanner is
stopped, '53 tillie'
should not occur
again until the
scanner is
started.

Test error.
Problem is
probably in the
associated line
adapter. (SeeGeneral Comments,
f).)
Beg. 1'14'
contain" the
actual data
received by
the IN X'43'.
If byte 0, bit
1 is on, a
feedback cbeck
has occurred.
Ignore the
diagnostic mode
bit failure and
rerun routines
1512 and 1514.

X3705FAA 5. O. 23

IBft 3105 COftftUNICATIOHB CO_TROLLBR
TIPB 1 COftRORICATIORS SCAHNER 1FT SYftPTOR IHDBX

D99-31058-09

ROOT. BRROR FUNCTION TBSTBD
CODB
15qO OX01 Bnsure tbat force bit
service (OOT X'47') causes
a bit service interrupt from
tbe line address under test.

SUSPECTED CABD
tOCA '1'1 oN (sl
attempting to force a
tIIn, tflG2
bit service level 2 interrupt
(via OOT X'Q7') frol tbe line
(BCB) address in Beg. X'11',
unmasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred from tbat line.

PIIOG

15QO

Bitber the scanner could not
be started again or after
attempting to force the next
bit service interrupt and
vaiting the time of a scanner
pass, no bit service interrupt
from the line ander test
occurred. Reg. 1",' contains
tbe line IBCB) address from
wbich bit service vas to be
forced. Value of Reg. X'15'
describes the failure:
X'BOOO' - tbe OUT X'Q1'
tIIG2
failed to reset the type 1
CS level 2 bit in IN X'17'
(hovever, no feedback
cbeck vas present).
X'COOO' - the OOt X'41'
failed to reaet the type 1
CS level 2 bit in IN X'11'
because a feedback check
was present.
X'8000' - The OUT X'Q1'
vas successfUl but the
OOt X' 47' (force bit
service) failed to cause
a bit service interrupt.

BOOO

Bnsure that once tbe
diagnostic lode latcb in
a line adapter has been
set and tbe scanner bas
been started and stopped
again, the diagnostic
lode bit in II X'43'
can be set.

After having set tbe diagnostic Y4G2
mode bit in IN X'1I2', starting
the scanner and stopping it
again, an IN X'43' failed to
indicate diagnostic mode as
being set (Byte 1, bit 5 onl.
Beg. X"1' contains the line
(BCB) address under test.

00011

Bnsure that once the scanner
is stopped, it can be started
again via oot X'41' and then
stopped again by forcing a
bit service (OUT '41')
interrupt.

Either the scanner COQld not
started again or after
attelpting to force the next
bit service interrupt and
vaiting the tise of a scanner
pass, no bit service interrupt
from tbe line under test
occurred. Reg. 1'11' contains
the line (BCB) address from
which bit service was to be
forced. Value of Beg. X'15'
describes the failure:
1'8000' - The 00'1' X'4"
YQG2
failed to reset the type 1
CS level 2 bit in IN 1'77'
(hovever, no feedback
check vas presentl.
X'COOO' - The OUT X'41'
Y4F2
failed to reset the type 1
CS level 2 bit in II X'77'
because a feedback check
was present.
X'8000' - The OUT 1'41'
Y4F2, YQG2
vas successful but the
OOT 1'47' (force bit
service) failed to cause
a bit service interrupt.

!l000

After issuing OUT X'42' (with
byte " bit 1 off) to reset

00011

OX 03

OX04

1540

1540

OX05

OX 06

Bnsure that once the scanner
is stopped, it can be started
again via OUT X'41' and then
stopped again by forcing a
bit service (OUT X'Q1'I
interrupt.

Ensure that resetting the
diagnostic mode latch in

5.0.2Q X3705l'AA

ERROR DESCRIPTION

Aft~r

Y4G2

BAliK

FEAtD
l'AGB

RS305

FETIIII COIIIIEH'r$
PAGB
"-330, Pretest erro~.
A-OliO Rellun routine
1512.

Pretest error.
Berun routhe
1512.

111305

a~202

RS305

85307

A-200

Pretest error.
rOlltille

lIeru~

153B.

Pretest error.
Rerun rout1 ne
15'2.

8S305

11-2'10

85305

A-330,
1·040

8$307

1·200

Test error.
PrClb.!.es 1&

Type 1 Scanner 1''1'

r

IB~ 310S CO~~UHICATIONS CONTBOLLEB
TYPE 1 COaaUNICATIONS SCANNER 1FT SYKPTOK INDEX

ROUT. ERBOS FONCTION TESTED
CODE
the line adapter (via OUT
X'42') resets the diagnostic
mode bit in IN X'43'.

FETKII
PAGE

the diagnostic mode latch in
the l~ne adapter and starting
and stopping the scanner again,
an IN X'43' still indicated
that diagnostic mode vas set
(Byte 1, bit 5 on). Reg.
X'11' contains the line (BCB)
address under test.

COIlHENTS
probably in the
C5; however, see
general comments,
'3. Apparently,
once the 'B in 6'
latch, on ALD
page given, is
set, i t cannot
be reset.

1542

OX01

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
YIIF2, YIIG2
bit service level 2 interrupt
(via OOT X'1I7') from the line
(BeB) address in Beg. X'II',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

15q2

OX02

Before attempting to set
the tested bit, ensure
that the CS reset was
success f ul.

After resetting and enabling
the cs and forcing the scanner
to stop at the tested address,
all bits in an IN 1'42' should
have been off (reset) and
were not. Beg. X'11' contains
the line (BCB) address under
test. Reg. X'15' indicates
the bits in the IN X'42' that
vere not reset:
Byte 0:
Bit 6-mode bit 1
Bit 7-IDode bit 2
Byte 1:
Bit o-low priority
Bit 1-diagnostic mode
Bit 2-data terminal ready
Bit 3-synchronous aode
Bit II-external clock
Bit 5-data rate select
Bit 6-oscillator select 1
Bit 7-oscll1ator select 2

YIIG2

A-150

FFFF

IIS304
115304

A-170
A-170

RS304
115306
RS306
B5306
115306
IIS306
IIS306
115306

A-170
A-160
1-160
A-160
A-160
1-160
A-160
A-160

IIS306
115106

A-160
1-270

Pretest error.
Rerun routine
1516.

Ensure that oscillator
select bit 1 (IN X' 42' ,
byte 1, bit 6) can be
set by issuing OUT X'42'
with that bit on.

1544

XXIX

After the CS has been reset, the scanner is stopped at the tested address,
Reset Oscillator select Bit 1:
(This test is run on all
oscillator select bit 1 is set, and a test made to ensure that it can be reset..
installed line adapters, in turn, except autocall.)

Type 1 Scanner 1FT

03FF

A-330, Pretest error.
A-OliO Rerun routine
1512.

OX03

e

Either oscillator select bit
YIIG2
failed to act correctly or
other bits in the IN X'42'
turned on in error. Beg_
X"1' contains the line (BCB)
address under test. Beg. X"5'
contains the bits in error.
(Byte 1, bit 6 on indicates
the oscillator select bit
failed.) Beg. X'II1' contains
the actual data received by
the IN %'112'.

BS305

'542

e

e
e
e
e

FEALD
PAGE

Set Oscillator Select Bit 1: After the C5 has been reset, the scanner is stopped at the address under test,
and an attempt is made to set OSCillator select bit 1. (This test is run on all installed line adapters, in
turn. It tests to ensure that the bit sets on all adapters except autocall.)

e

e

PBOG
IIASK

XXXX

e
0

SUSPECTED CARD
LOCATION (s)

1~42

o

o
o

EBROB DESCRIPTION

099-3705£-09

Test error.
Failure is
probably in the
associated line
adapter. (See
General Comments,
13.)
If other
bits are in
error, some kind
of interaction
occurred. If
byte 1, bit 6
is on in both
regs. X'15' and
X'111 '. t he line
adapter under
test was an
autocall adapter
and oscillator
select bit 1 vas
on and should
not h ave been.

X37051'AA 5.0.25

16ft 310S COM"UNICATION5 CONTROLLER
TYPE 1 COft"ONIC~TIONS SCANNER 1FT SyaPTO" INDEX
ROUT. ERROR FUNCTION TESTED
CODE
1544 OXOl Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

1544

OX02

ERROR DESCRIPTION
After attempting to force a
bit service level 2 interrupt
(via OUT X'41') from the line
(BCS) address in Reg. X'1",
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred fro. that line.

099-31051\-09

SUSPEC'l'EO CARD
LOCATION (S)
YU2, Y4G2

PROG
IIASK

FEALD
PAGE
1\5305

I'ETftft
PAGE
"-330, Pretest error.
"-040 Rerun routine
, S '2.

Ensure that oscillator
select bit 1 (IN X'42',
byte I, bit 6) can be
eet by iesuinq OUT x'q2'

Either oscillator select bit
Y4G2
failed to act correctly or
other bits in the IN X'42'
turned on in error. Reg.
X' ,,, GClllt4ina the linll (llell)
4,ldroDd un~ot tnt. II.,\!. X' 1!1'
contain. thu bit, in orror.
(uyte 1, bit b on indicates
the oscillator select bit
failed.) Reg. X'14' contains
the actual data received by
the III X'42'.

03fl'

R5306
R5106

A-160
A-210

Pretest error.
Rerun routine
1542.

After having set oscillator
select ~1t 1, an attempt to
reset it vas made via OUT
X'42' with byte I, bit 6 off.
An IN X'42' then indicated the
bit vas still on (or other
bits were set in error). Reg.
X'1S' contains the bits in
error. Byte 1, bit 6 on
indicates that oscillator
select bit 1 failed to reset.
Reg. X'11' contains the line
(BCB) address under test.

03PF

R5306
RS 106

A-160
A- 210

Test error.
Problem is
probably in thll
Ilssociated 11ne
adapter.
(See
General Comments,
B.)
If other
bits are in error,
eo.e kind of
interaction
occurred. Reg.
X'14' contains
the actual data
received by the
IN X' 42'.

with thAt bit un.

Y4G2
Y422

1544

OX03

Ensure that oscillator
select bit 1 can be re~et
via OUT X'42'.

1546

XXXX

Set Oscillator Select Bit 2: Uter the CS has been reset, the scanner is stopped at the address under test,
and an attempt is made to set oscillator select bit 2. (This test is run on all installed line adapters, in
turn. It tests to ensure that the bit sets on all adapters except autocall.)

15q6

OXOl

Ensure that force bit
service (OUT X' '17') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUT X'41') from the line
(BCB) address in Reg. X' 11' ,
unmasking level 2 interrupts and
waiting the ti_e of a scanner
pass, no bit service interrupt
occurred from that line.

1546

OX02

Before attempting to set
the tested bit, ensure
that the CS reset was
successful.

After resetting ana enabling
the CS and forcing the scanner
to stop at the tested address,
all bits in an IN X'42' should
have been off (reset) and
were not. Reg. X'II' contains
the line (BCBI address under
test. Beg. X"S' indicates
the bits in the IN X''I2' that
were not reEi,et:
Byte 0:
Bit 6-mode bit 1
Bit 7-mode bit 2
By te 1:
Bit O-low priority
Bit '-diagnostic mode
Bit 2-data terminal ready
Bit 3-synchronous made
Bit 'I-external clock
Bit 5-data rate select
Bit 6-oscillator select 1
Bit 7-oscillator select 2

5. 0.26 X370SFAA

Y4G2

RS305

A-330, Pretest error.
1-040 Rerun routine
IS12.

A-150

FFfF

IiS304
RS30'1

A-170
A-170

R5304
115306
R5306
RS306
R5306
R5306
R5306
RS306

1-170
A-160
A-160
A-160
A-160
"-160
A-160
A-160

Pretest error.
Rerun routine
1516.

Type , Scanner 1FT

tBM 3705

CO~Ha"lC~TIONS

CONT80LLEB

1l99-3705E-09

TlPE 1 COKIIUHICATIONS SCANNER 1FT SIHVTOn INDEX
ROUT. E8ROR fUNCTION TESTED
CODE
1546 OX03 Ensure that oscillator
select bit 2 (IN X'42'
byte 1, bit 7) can be
set by issuing OUT X'42'
with that bit on.

o
o
o

Either oscillator select bit
failed to act correctly or
other bits in IN X'42' turned
on in error. Reg. X'll'
contains the line (BCS)
address under test. Reg.
X'15' contains the bits in
error. (Byte 1, Ili t 7 on
indicates the oscillator
select bit failed.) Reg.
X'14' contains the actual
data received bf the IN
X'42' •

SUSPEC'l'ED CABO
LOCATION (s)
Y4G2

PROG
IlASK

03Fl'

FEAtD
PAGE
115306
liS 106

fET~1I

PAGE
A-160
A-270

COIIIII!NTS
Test error.
Failure is
probably in the
associated line
adapter.
(See
General Comments,
*6.)
If ot her
bits are in error,
some kind of
interaction
occurred. If
byte 1, bit 7 is
on in both regs
X'14' and X' 15' ,
the line adapter
under test vas
an autocall
adapter and
oscillator select
bit 2 vas set and
should not
have been.

XXXX

Reset Oscillator Select Bit 2:
After the CS has been reset, the scanner is stopped at the tested address,
oscillator select bit 2 is set, and a test made to ensure that it can then be reset.
(This test is run on
all installed line adapters, in turn, except autocall.)

15qa

OXOl

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
14F2, Y4G2
bit service level 2 interrupt
(via OU~ :'47') from the line
(BCB) address in Reg. X'l1',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1548

OX02

Ensure that oscillator
select bit 2 (IN X'42'
byte 1. bit 7) can be
set by issuing OUT X'42'
with that bit on.

Either oscillator select
bit 2 failed to act correctly
or other bits in IN X'42'
turned cn in error. Reg.
X'll' contains the line (BCB)
address under test. . Reg.
X'lS' contains the bits in
error.
(Byte 1, bit 7 on
indicates the oscillator
select bit failed.) Reg_
X'14' contains the actual
data received by the IN
X' 42'.

Y4G2

1548

OX03

Ensure that oscillator
select bit 2 can be
reset via OUT X'42'.

After having set oscillator
select tit 2. an attempt to
reset it vas made via OOT
X'42' with byte 1, bit 7 off.
An IN X'42' then indicated
the bit was still on (or
other bits were set in error).
Beg. X'1S' contains the bits
in error. Byte 1, bit 6 on
indicates that oscillator
select bit 2 failed to reset.
Beg. X'11' contains the line
(BCB) address under test.

Y4G2
Y4E2

154A

XXXX

Set Low Priority Bit: After the C5 has been reset, the scanner is stopped at the tested address and a test
made to ensure that the low priority bit for that address can be set. (This test is run on all addresses,
in turn.)

lS4A

OXOl

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

o

o
e

E8ROB DESCRIPTION

Type 1 Scanner 1FT

After attempting to force a
bit service level 2 interrupt
(via OUT X'Q7') fro. the line
(BCB) address in Reg. X'11',

14F2, 14G2

85305

A-330. Pretest error.
A-040 Rerun routine
1512.

03FF

BS306
115'06

A-160
A-270

Pretest error.
Rerun routine
1546.

03FF

R5306
85106

A-160
A-270

Test error.
Problem is
probably in the
associated line
adapter. (See
General Comments,
f3.) If other
bits are in error,
sOlDe kind of
int eraction
occurred. Beg_
X'14' contains
the actual data
r ecei v ed by the
IN X'42'.

R5305

~-330,

A-OqO

Pretest error.
Rerun routine
1512.

X3705fAJI. 5.0.27

IBN 3705 CQaNUHICATIONS CONTROLLER
TtPE 1 CONNUHIClfIOHS SClHHEa 1FT StaPTO" IRDEX
aOUT. ERROR PUNCTION TESTED
COllE

ERROR DESCRIPTION

SUSPEC'l'ED CUD
. LOCATIOH (e)

PROG
NASK

After resetting and enabling
tbe CS and forcing the scanner
to stop at the tested address,
all bits in an 1M X'42' should
bave been off (reset) and
were not. Reg. I'll' containe
tbe line (BCB) address under
test. Reg. X'lS' indicates
the bits in the 1M X'42' that
were not reset:
Byte 0:
Bit 6-lIode bit 1
Bit 7-aode bit 2
Byte 1:
Bit O-lov priority
Bit 1-diagnostic lode
Bit 2-data terainal ready
Bit 3-synchronoue lode
Bit _-external clock
Bit 5-data rate eelect
Bit 6-oscillator select 1
Bit 7-oscillator select 2

YflG2

PFn

Either the low priority bit
failed to set or other bits
turned en in error. aeg.
X'11' containe tbe liDe (BCB)
address under test. Reg.
X' 15' contains tbe bits iD
error. (Byte', bit 0 on
indicatES the low priority
bit failed.) Reg. X'l11'
contains the actual data
recei,ed by the IH X'42'.

tIIG2

unmasking level 2 interrupts and
vaiting the tile of a scanner
pass, no bit service interrupt
occurred fro. that line.
1!iliA

1511A

OX02

0103

Before atteapting to set
the tested bit, ensure
that the CS reset was
successful.

Ensure that the low priority
bit (Ill X'42', byte 1, bit 0)
can be set by issuing OUT
X'42' vith tbat bit on.

099-37051-09

y4B2

03PP

FEALD
PAGE

FET"K
PAGE

COUIIIU

A-150

Preteet error.
Rerun routine
1516.

A-no

RS30"
1S304

l-170

a530"
an06
1S306
In06
InOI
81306
115306
1S306

l-170
1-160
a-160
&-160
&-160
&-160
1-160
1-160

aS301i
15101

1-170, feet error.
A-260 Proble. il
pcoblbly 1D tile

ca.

If

,.11l1r.

~a uDi~II.

to
one Iddreae Oily,
pcoble. 18
problb17 Isaoeiated
lIitla' addre..
selection 11 til'
interface eOlt~ol
stick. lf otbe,
bite Ire 011 in
error, 1018 kind
of lDteract101
ClCCUJ:l;ed'

lS4C

XXXX

Beset Low priority Bit: After the CS has been reset, the scanner ie stopped at tbe telted addrea~. the low
priority bit is set, and then a test lade to ensure that it can tbel be reset. (!his teet ie Eun 011 all
addresses, in turn.)

154C

OXOI

Ensure that force bit
service (OOT X'~7') causes
a bit service interrupt frol
the line address under test.

After attespting to force a
X4F2, Y4G2
bit seJ:vice level 2 interrupt
(,ia OO! X'1I7') frol t~e line
(BCB) address in Reg. X'11',
unsasking le,el 2 interrupte and
waiting the tile of a scanler
pass, no bit service interrupt
occurred frol that line.

lSIIC

OX02

Ensure that the low priority
bit (IN 1'42', byte 1, bit 0)
can be set by ieeuing OU!
X'II2' vitb that bit on.

Either the lov priority bit
failed to set or other bits
turned on in error. aeg.
X'1" contails the liDe IBCB)
address under test_ aeg.
X'lS' contains the bits in
error. (Byte 1, bit 0 on
indicatee the low priority
bit failed.) leg. 1'111'
contains the actaal data
recei,ed by the 1M X'_2'.

En sure that the low priority
bit can be reset via OUT
X'''2'.

After having set the low
priority bit, an atteapt to
reset it was made via OOT

lS4C

OX03

5.0.28 X370S1'AA

Y4G2

IS305

1-330, Preteat error.
1-0,,0 aerun routine
l512.

03pr

8S3011
BS107

1-170, Pretest error.
1·260 Berun routine
15U.

03rF

RS304

1-170
l-260

fIIB2

Test error.
Problel ie
probably in

Type 1 Scanner IFf

IBM 3705 CO~HUNICATIONS CONTROLLER
TYPE 1 COMMUNICATIONS SCANNER 1FT SYHPTOK INDEX

i

o
e
o

ROOT. ERROR FONCTION TESTED
CODE

ERROR DESCRIPTION
X'~2' with byte 1, bit 0 off.
An IN 1'~2' then indic~ted
the bit vas still on (or
other bits were set in error).
8eg. X'15' contains the bits
in error. Byte 1, bit 0 on
indicates that the low
priority bit failed to reset.
~eg. X'11' contains the line
(BCD) address tested.

SUSPECTED CARD
LOCATION(S)

PROG
KASK

FEALD
PAGE

FETKH
PAGE

COKKENTS
the CS.

l~~E

XXXX

Set Hode Bit 1: After the cs has been reset, the scanner 1s stopped at the tested address and a test made
to ensure that mode bit 1 for that address can be set. (This test is run on all addresses, 1n turn.)

1511ll

OXOl

Ensure that force bit
service (OUT X'47'I causes
a bit service interrupt from
line address under test.

After attempting to force a
14r2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from th. line
(BCB) address in 8eg. X'11'.
unmasking level 2 interrupts and
waiting the time of a scanner
pass, DO bit service interrupt
occurred from that line.

154E

OX02

Before attampting to sat
the tested bit, ensure
that the CS reset was
successful,.

After resetting and enabling
the cs aDd forcing the scanner
to stop at the tested address.
all bits in aD IN X'II2' should
have been off (reset) aDd
were not. Reg. J'11' contains
the line (BCB) address under
test. Eeg. X'15' indicates
the bits in the IN X'42' that
were not reset:
Byte 0:
Bit 6-mode bit 1
Bit 7-mode bit 2
ayte 1:
Bit G-low priority
Bit I-diagnostic aode
Bit 2-data terminal ready
Bit 3-synchronous mode
Bit II-external clock
Bit 5-data rate select
Bit 6-oscillator select 1
Bit 7-oscillator select 2

fl·

"···,I.,..

"

o

D99-3705E-09

,5~E

OX03

Ensure that Ilode bit 1
(IN X'Q2', byte 0, bit 6)
can be set by issuing
OUT 1'42' with that bit
on.

1550

xxxx

Reset Kode Bit 1: After the CS has beEn reset, the
set. and then a test is made to ensure that it can
turn. )

1550

OXOl

Ensure that force bit
service (OOT X'47'1 causes
a bit service interrupt from
the line address under test.

o

1550

OX02

Ensure that mode bit 1
lIN X'~2', byte O. bit 6)
can be set by issuing

Type 1 Scanner 1FT

85305

1'1'1'1'

YIIG2

Either mode bit 1 failed to set 14G2
or other bits turned on in
YIIE2
error. Reg. I'll' contains
the line (BCB) address under
test. Beg. 1'15' contains
the bits in error. (Byte 0,
bit 6 on indicates mode bit 1
failed.) Reg. 1'14' contains
the actual data received by
the IN X'42'.

031'1'

A-330. Pretest error.
A-OliO Rerun routine
1512.

1-150

BS304
RS304

1-170

RS304
85306
85306
115306
115306
8S306
85306
8S306

A-no

Rs304
RS107

Pretest error.
Berun routine
1516.

A-nO

A-160
11-160
11-160
A-160
A-160
A-160
A-160
A-170. Test error.
1-260 problem is
probably in the
CS. If other bits
are on in error,
some kind of
interaction
occurred.

scanner is stopped at the tested address. mode bit 1 1s
then be reset. (This test is run on all addresses. in

After attempting to force a
bit service level 2 interrupt

141'2.

85305

I~G2

A-330. Pretest error.
A-040 Rerun ,routine
1512.

::~:) O~~d~::~'inf~~:.}~~,~;~e
unmasking level 2 interrupts and
waiting the time of a scanner
pass. no bit service interrupt
occurred from that line.
Either mode bit 1 failed to set I4G2
or other bits trnned on in
!4E2
error. Beg. X'11' contains

031'1'

RS304
8S107

A-170. Pretest error.
A-260 Bernn routine
lSQE.

X3705l'AA 5.0.29

-

IBK 3105 CO"ftUNICATIONS CONTROLLER
1 COHHONICATI0NS SCANNER 1fT SYK?TOK INDEX

D99- 31 05E-09

~YFE

ROUT,. ERaOR FUNCTION TESTED
COOl!:
OUT X'42' with that bit
on.

ERBOR DESCRIPTION
the line (aCB) address under
test. Reg. 1'15' contains
the bits in error. IByte 0,
bit 6 on indicates mode bit 1
faUed.) Beg. X' 14' conUins
the actual data received by
the III X'42'.

SUSPECTED CARD
LOCATION lsI

PBOG
"ASK

FElLD
PAGB

1'ETK"
PAGB

COKKEHTS

Y4G2

031'1'

BS304

A-l10, Test error.
A-260 Problem is
probably in the
CS. If other
bits are in
error, some kind
of interaction
occurred.

1550

0103

Ensure that mode bit
can be reset via OOT
X'42'.

1552

XXXX

Set "ode Bit 2: After the CS has been reset, the scanner is stopped at the tested address and a test, made
to ensure that .ode bit 2 for that address can be set. (This test is run on all addresses, in tUl:n.)

1552

OXOI

Ensure that force bit
service (OOT X'41') causes
a bit service interrupt fro.
the line address under test.

After attempting to force a
YII1'2, Y4G2
bit service level 2 interrupt
(via OOT X'41') from the line
(BCB) address in Reg. X' 11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred fl:oll that line.

1552

OX02

Before attempting to set
the tested bit, ensure
that the CS reset vas
successful.

After resetting and enabling
the CS and fOl:cing the scanner
to stop at the tested address,
all bits in an IN X'1I2' should
have been off (reset) and
were not. Reg. X'11' contains
the line (BCB) address under
test. Beg. 1'15' indicates
the bits in the IN X'42' that
were not reset:
Byte 0:
Bit 6-lIode bit 1
Bit 1-lIode bit 2
Byte 1:
Bit O-low priority
Bit l-diagnostic mode
Bit 2-data terminal ready
Bit 3-syncbronous mOQe
Bit 4-external clock
Bit S-data I:ate select
Bit 6-oscillator select 1
Bit 1-oscillatol: select 2

Y4G2

Eitber mode bit 2 failed to
set or other bits were set in
error. Reg. X'11' contains
the line (BCB) address under
test. Reg X'15' contains the
bits in error. (Byte 0, bit
1 on indicates mode bit 2
failed.) Reg. 1'14' contains
the actual data received by
the IN X'42'.

Y4G2
Y4E2

After having set mode bit 1,
an attempt to rese~ it was
made via OUT X'42' with byte
0, bit 6 off. An IN 1'42'
then indicated the bit was
still on lor other bits were
on in error). Reg. 1'15'
contains the bits in error.
ayte 0, bit 6 on indicates
mode bit , failed to reset.
Beg. X'II' contains the line
(BCB) address under test.

1552

OX03

Ensure that mode bit 2
(IN X' 42', byte 0, bit 7)
can be set by issuing OOT
X'42' with that bit on.

1554

xxxx

Reset eode Bit 2: After the CS has been reset, the
set, and then a test is made to ensure that it can
turn. )

'554

OXOI

Ensure that torce bit
service (ODT X'1I1') causes

5.0.30 X310Sl'H

RS305

A-330, Pretest error.
1-040 Berun routine
1512.

1'1'1'F
A-ISO
Rerun I:outine
1516.

031'r

R53011
115304

A-110
A-110

BS3011
R5306
BS306
BS306
BS306
B5306
BS306
B5306

A-110
A-160
1-160
1-160
1-160
1-160
A-160
A-160

115304
RS101

A-110
1-260

Pretest enor.

Test error.
Problem is
probably in the
cs. If other
bits are on in
error, some kind
of interaction
occul:red.

scanner is stopped at the tested address, mode bit 2 is
then be reset. (This test is run on all addresses, in

After attempting to force a
bit service level 2 interrupt

lC41'2, tllG2

IIS305

1-330, Pretest error.
1-040 Rerun routine

Type 1 Scannal: 1FT

l'

;/

o
o
IBN 3105 CO~"UNICATIONS CONTROLLER
TYPE 1 coaKUNICATIONS SCANNER 1FT SYKPTOK
ROOT. ERROR FUNCTION TESTED
CODE
a bit service interrupt from
the line address under test.

0

155q

OX02

Ensure that mode bit 2
(IN X'1I2', byte 0, bit 1)
can be set by issuing OOT
X'42' with that bit on.

e
0

ERROR DESCRIPTION

SUSPECTED ClRD
LOCATIOHIS)

PROG
KASK

FEALD
PAGE

FETaK
PAGE

(via OUT X'41') from the line
{BCBI address in Reg. X'11',
unmasking level 2 interrupts and
waiting the tile of a scanner
pass, no bit service interrupt
occurred from that line.
Either mode bit 2 failed to
set or other bits were set in
error. Reg. X'11' contains
the line (BCB) address under
test. Eeg X'15' contains the
bits in error. (Byte 0, bit
7 on indicates mode bit 2
failed.) Reg. X'14' contains
the actual data received by
the IN X'42'.

COnSENTS
1512.

YIIG2

03FF

85304
R5101

A-l10
1-260

03FF

R5304

1-110, Test error.
1-260 Problem is
probailly in the
CS. If other
bits are in
in error, some
kind of
int eraction
occurred.

HB2

Pretest error.
Rerun routine
1552.

15511

OX03

Ensure that mode bit 2
can be reset via OUT
X' 42'.

1556

xxn

Set Call Request Bit: After the CS has been reset, the scanner is stopped at the tested address and a test
made to ensure that call request can be set. (This test is run on all installed autocall adapters only, in
turn. )

1556

OX01

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
tpe line address under test.

After attempting to force a
Y4F2, YIIG2
bit service level 2 interrupt
(via oO't X'47') from the line
(BCB) address in Beg. X' 11' ,
unmasking level 2 interrupts and
waiting the time ot a scanner
pass, no bit service interrupt
occurred from that line.

85305

1-330, Pretest error.
A-040 Rerun routine
1512.

,556

OX02

Before attempting to
set the tested bit,
ensure that the CS
reset was successful.

After resetting and enabling
Y4G2
the scanner and forcing
the scanner to stop at the
tested address, bits in an
IN 1'43' that should have
been reset, were not. Beg.
X'11' contains the line (BCB)
address under test. Reg.
X'15' indicates the bits that
were not reset in the IN 1'43':
Byte 0:
Bit 3-digit present
Bit 4-transmit mode/NBR-8
Bit 5-new sync/NBR-4
Bit 6-reguest to sendl
NB1I-2
Bit 7-send data/NBR-l
Byte 1:
Bit 4-ca11 request
Bit 5-diagnostic mode

R530B

1-200

Pretest error.
Rerun routi nes
1S1e and 1519.

1556

OX03

Ensure that the call
request bit in IN X'43'
can be set by issuing
OUT 1'43' with byte 1,
bit 2 on.

Either call request failed to
Y4G2
set or other bits in IN X'1I3'
Y4E2
were set in error. Reg. X'11'
contains the line (BCB) address
under test. Reg. X'15' contains
the bits in error. (Byte 1,
bit 4 on indicates call request

RS30B
85106

A-200
A-290

Test error.
Problem is
probably in the
associated line
adapter. (See
General Comments,
13. I I f other

o
o

o

D99-3105E-09

IND~1

o

Type 1 Scanner 1FT

After having set mode bit 2,
an attempt to reset it was
made via OUT X'42' with byte
0, bit 1 off. An IN X'42'
then indicated the bit was
still on (or other bits were
set in error). Reg X'15'
contains the bits in error.
Byte 0, bit 1 on indicates
mode bit 2 failed to reset.
. Reg. X'1" contains the line
(BCB) address under test .•

Y4G2

lF08

X3105FAA 5.0.31

18" 3105 COM~UNICATIONS CONTROLLER
1 COMMUNICATIONS SCANNER 1FT SYM~TO" INDEX

D99- 37 05E- 09

TY~E

ROUT. ERROR FUNCTION TESTED
CODE

ERROR

DESCRI~TION

SUSFECTED CARD
LOCATION(S)

PROG
MASK

FEALD
PAGE

FETMH
PAGE

failed to sot.) Reg. X',q'
contains the actual data
received by the IN X'43'.

COMMENTS
bits are on in
error, some kind
of interaction
problem occurred.

1558

XXXX

Reset Call Request Bit: After the Cs has been reset, the scanner is stopped at the tested address. the call
request bit is set, aDd then a test made to ensure that it can be reset. (This test is run on all installed
autocall adapters only, in turn.)

1558

OXOl

Ensure that force bit
service (OOT X'47') Causes
a bit service interrupt froa
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCB) address in Reg. X'II',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1558

OX02

Ensure that the call
request bit in IN X'43'
can be set by issuing
OUT X'43' vith byte 1,
bit 2 on.

Either call request failed to
J4G2
set or other bits in IN X'43'
Y4B2
were set in error. Beg. X'tl'
contains the line (BCB) address
under test. Reg. X'15' contains
the bits in error. (Byte I,
bit 4 on indicates call reg 'est
failed to set.) Reg. 1'14'
contains the actual data
received by the IN X'43'.

1558

OX03

Ensure that the call
request bit can be reset
via OUT X'43' with byte
1, bit 2 off.

After having set the call
request bit and attempting
to reset it, an IN X'43' still
indicated the bit was set
(or other bits were set in
er ror.) Reg. X' 15' contains
the bits in error. Byte I,
bit q on indicates call
request faileu to reset.
Reg. X'11' contains the line
(BCB) address under test.

155A

XXXX

Set Digit Present Bit: After the CS has been reset, the scanner ~s stopped at the tested address and a test
made to ensure that digit present can be set. (This test is run on all installed autocall adapters only, in
turn,.)

155A

OXOI

Insure that force bit
service (OUT X'47') Cduses
a bit service interrupt from
the line address under test.

155~

OX02

Before attoMp~in9 to
sot the tested bit,
ensure thatth~ CS
reset was successful_

5. 0.32 X3105 PAA

Y4G2
Y4E2

After attempting to force a
X4F2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCB) a ddress in Beg. X' 11' ,
unmasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred from that line.
After resetting and enabling
Y4G2
'the scannet an~ forcing
the scanner to stop at the
tested address, bits in an
IN X'43' that should have
been reset, were not. ~eg.
X'1 I' contains the line (BCB)
address under test. Reg.
X' 15' indicates the bits that
vero not reset in the IN X'43':
Byte 0:
Bit 3-digit present
Bit 4-transmit mode/NBR-a
Bit 5-nev sync/NBR-4
Bit 6-reguest to sendl
NBR-2

B5305

A-330, Pretest error.
A-040 Berun routine
1512.

lFoa

RS308
RS'06

A-200
1-290

Pretest error.
Rerun routine
1556.

lFOB

R530B
R5106

A-200
A-290

Test error.
Problem is
probably in the
associated line
adapter. (See
General Comment~,
'3.) If other
bits were in
error, some kind
of interaction
occurred.

R5305

~-330,

A-040

R5308

A-ZOO

Pretest error.
Berun routine
1512.

Pretest error.
Reru/J" "routi nes
15t8 and 1519.

Type 1 Scanner 1FT

o
o
IBM 3105 COMMUNIC~TIONS CONTROLL~R
TYPE 1 CO~~UNICATIONS SCANNER 1FT SY~PTOM INDEX
ROUT. ERROR FUNCTION TESTED
CODE

ERROR DESCRIPTION

P9~-3705E-09

SUSPECTED CARD
LOCA TION (s)

PUOG PEALD
liAS K PAGE

PETM"
PAGE

COMMENTS

1F08

A-200
1-290

Test error.
Problem is most
likel y in the
a ssocia ted line
adapter. (See
General Comments,
13. ) I f at her
bits are in
error, some kind
of interaction
occurred.

Bit 1-send data/NBR-l
eyte 1:
Bit 4-call request
Bit 5-diagnostic mode
155A

OXO)

Ensure that the digit
present bit in IN X'ij)'
can be set by issuing
OUT X'43' with byte 1,
bit 3 on.

1SSG

XXXX

Reset Digit Present Bit: After the CS has been reset, the scanner is stopped at tI.e tested add;:Elss, digit
present is set, and then a check made to ensure it can be reset.
(This te st is run on all installed
autocall adapters only, in turn.)

15~C

OX 01

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attewpting to force a
14F2, Y4G2
bit service level 2 interrupt
(via ou:r X',ij7'), from the line
'(BCe) addreSs in Reg. X'11',
unmasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

15se

OX02

Ensure that the digit
present bit in IN X'43'
can be set by issuing
OUT X'43' with byte I,
bit 3 on.

Either digit present failed
to set or other bits in IN
X'43' were set in error.
Reg. X'll' contains the line
(BCB) address under test.
Reg. X'15' contains the bits
in error. (Byte 0, bit 3 on
indicates digit present
failed to set.) Reg. X'14'
contains the actual data
received by the IN X'43'.

155C

OK03

Ensure that the digit
present bit can be reset
via OUT X'43' with byte
1, bit ) off.

After having set digit present
and attempting to reset it
an IN X'4J' still indicated
the bit was set (or other bits
were set in error) '. Reg.
X'15' contains the bits in
error. Byte 0, bit 3 on
indicates digit present
failed to reset. Reg. X'11'
contains the line (BCS)
address under test.•

155E

XXXX

Output X'42' Interaction Test: After ensuring that all IN X'42' bits are off at two line addresses, all
possible bits are turned on at one of them. A check is then made by doing an IN X'42' at the other to
ensure that no interaction occurred (that is, that no bits were set).
This test vill be run on all
installed line adapters. It is designed to run all possible address combinations. (Example: Assume line
adapters are installed in addresses 0-5. The first pass through the test will set all bits on at line 0 and
then ensure that no bits were set at line 1. The second pass will again set all bits on at line 0 but this
time check line 2. This continues until line 5 has been checked. :rhe sixth pass will set all bits at line
1 and check line 2. This pattern is continued until all addresses have been cheCked with all others.)

155E

OXOI

Ensure that force bit
service (OUT 1'47') causes
a bit service interrupt from
the line address under test.

o
o

o
o

e
0·· '
,

,

o
o

Type 1 Scanner 1FT

Either digit present failed
to set or other bits in IN
X'43' were set in error.
Reg. X'11' contains the line
(eCE) address under test.
Reg. X'15' contains the bits
in error. (Byte 0, bit 3 on
indicates digit present
failed to set.) Reg. X'14'
contains the actual data
received by the IN X'4J'.

After attempting to force a
bit service level 2 interrupt
(via OOT X'47') froll the line
(BCB) address in Reg. X'11',

lF08

Y4G2
14E2

14P2, Y4G2

RS308
RS106

RS305

A-330, Pretest error.
A-040 Rerun routine
1512.

RS308
RS106

A-200
A-290

Pretest error.
Rerun routine
155A.

RS308
RS106

A-200
1-290

Test error.
Problem is
probably in
the associated
line adapter.
(See General
Comments, 'J.)
If other bits
were in error,
some kind of
interaction
occurred.

RS305

A- 330, Pretest error"
A-040 Rerun routine
1512.

X3705FAA 5.0.33

IPK 3705 COK"UNICATIONS CONTROLLER
1 COKftQHICATIONS SCANNER 1FT SlftPTOft INDEX

D99-H05E-Q9

~lPS

ROUT. ERaOR FUNCTION TESTED
CODE

eRnOR DESCRIPTION

SUSPECTED CARD
LOCATION(S)

PROG
ft15K

YQG2

I'1'F1'

FEALD
PAGE

FETKR
PAGE

COR RENTS

A-OIS

Pretest error.
Rerun routine
1516.

unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.
lSSE

OX02

Before attempting to set
the tested bit, ensure
that the CS reset vas
successful.

After resetting and enabling
the CS and forcing the scanner
to stop at the tested address,
all bits in an IN X'Q2' should
have been off (reset) and
were not. Reg. X'11' contains
the line (BCB) address under
test. Beg. X'15' indicates
the bits in the IN X'42' that
vere not reset:
Byte 0:
Bit 6-mode bit 1
Hi t 7-lIIode bit 2
Byte 1:
Bit O-low priority
Bit 1-diagnostic aode
Bit 2-data terminal ready
Bit 3-synchronous mode
Bit 4-external clock
Bit 5-data rate select
Bit 6-oscillator select 1
Bit 1-oscillator select 2

155E

OX03

Ensure that force bit
service (OUT X'q7') causes
a bit service interrupt from
the line address under test.

After attempting to force a
YQP2, Y4G2
bit service level 2 interrupt
(via QUT X'47') from the line
(BCB) address in Reg. X'll',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

155E

OXOq

Before attempting to set
the tested bit, ensure
that the CS reset was
successful.

After resetting and enabling
the CS and forcing the scanner
to stop at tb~ tested address,
all bits in an IN X'42' should
have been off (reset) and
were not. Reg. X'11' contains
the line (BCB) address under
test. Eeg. 1'15' indicates
the bits in the IN X'42' that
were not reset:
!lyte 0:
Bit 6-lIIo(\e bit 1
Bit 1-mode bit 2
Byte 1:
Bit O-low priority
Bit I-diagnostic mode
Bit 2-data terminal ready
Bit 3-synchronous 80de
Bit 4-external clock
Bit S-data rate select
Bit 6-oscillator select 1
Bit 7-osclllator select 2

YQG2

An,l~ X'q2·'fol~owing the
OUT' X' 42' indicated a bit or
bits failed to set. Reg.
X'11' contains the line (BCB)
address of the line being set.
Eeg. X'lS' indicates which
bits failed to set.

Y4G2

155E

OX05

To check for in,teraction,
set all possibl:e bits in
an OUT X'Q2' on at one
line address before
checking the other
address.

5. O. 3q X370Sl'AA

115304
IIS304

1-170
A-170

115304
85306
R5306
85306
RS306
R5306
R5306
115306

A-170
A-160
1-160
1-160
1-160
1-160
A-160
A-160

RS30S

A-330, Pretest error.
1-040 Rerun routine
1512.

A-150

Pl'FF

Pretest error.
Rerun routine
1516,.

RS304
IlS30Q

1-170
1.-170

RS30Q
R5306
IlS306
RS306
RS306
R5306
R5306
R5306

A-170
A-160
1-160
1-160
A-160
1-160
A-160
A-160
A-150

",
Test error.
Although this
has been designated as a test
error, the
capability to set
the individual
bits bas been
previously tested.
Rerun routines
152A through
15SQ to attempt
further isolation.
If necessary,
refer to FETIIR
page given to

Type 1 SCanner 1FT

IBH 3105 COMMUNICATIONS CONTROLLER
TY~E 1 COMMUNICATIONS SCANNEB lFT SYMPTOM INDEX
ROUT. ERROR FUNCTION TESTED
CODE

ERROR

DESCRI~TION

SUSPECTED c~np
LOCATION(s)

~ROO

MASK

FEALD
PAGE

FETMM
PAGE

COMMENTS
determine failing
bit or bits.
If only one line
address fails,
problem is
probably in the
associated line
adapter. (See
General Comments,
13. )

155E

OX06

Ensure that once the scanner
is stopped, it can be started
again via OUT l'q1' and then
stopped again by forcing a
bit service (OUT X'47')
interrupt.

o
o
o

D

lS5T::

OX07

Ensure that no problem
exists in address selection
such that interaction
occurs between two lines
when issuing an OUT 1'42'.

o

1560

XXXX

Either the scanner could not
started again or after
attempting to force the next
bit service interrupt and
waiting the time of a acanner
pass, no bit service interrupt
from the line under test
occurred. Reg. X'11' contains
the line (BCB) address from
which bit service was to be
forced. Value of Reg. X'15'
describes the failure:
X'EOOO' - The OOT X'41'
yqG2
failed to reset the type 1
CS level 2 bit in IN X'77'
(however, no feedback
check was present).
X'COOO' - The OOT X'41'
Y4F2
failed to reset the type 1
C5 lewel 2 bit in IN X'17'
because a feedback check
was present.
1'8000' - The OUT X'41'
Y4F2, Y4G2
was successful but the
OOT X' 47' (force bit
service) failed to cause
a ~it service interrupt.

EOOO

After setting all bits in
OUT X'42' at one address and
stopping the scanner at a
second address, bits were
found on in an IN X'42' at
the second address. Beg.
X'15' indicates the bits
that were found on. Reg.
X' 13' contains the second
11 ne (BCB) address and
Reg. X'll' contains the
first,.

03FF

Y402

A-2qO

R5305

A-240

R5202

A-240

RS305

1-330,
A-040

RS301
RS302
RS304

A-Ol0

Test error.
Rerun routine
1512.

Test error.
byte 0, bits
6 or 7, or byte
1, bi t 0 ar e in
error, problem
is in the CS.
If not, try to
determine the
pattern of
failure by
recording the
line addresses
and continuing
from the error
stop.
(See
General Comments,
t4.) Failure may
be restricted to
line selection
within a LIB
(replace LIB
cards). If not,
failure is
probably in line
and LIB select
circuitory within
the C5. (lieplace
card indicated.)

If

output X'43' Interaction Test: After ensuring that all bits that can be set by DOT X'4)' are off in IN
X'43' at tvo line addresses, all possitle bits are turned on at one of them. A check is then made by doing
an IN X'q3' at the other to ensure that no interaction occurred (that is, that no bits were set). This test
will be run on all installed line adapters.
(See routine 155E, xxn for description of the order in which
lines are tested.)

Type 1 Scanner IFT

x)705FAA 5.0.35

IB~ 3105 COH~U"IC1TI0"S COHTROLLER
TYP~
COK~UNICATIONS SCANHER 1FT SY"PTOM

I

ROUT. ERROR FUNCTION TESTED
CODE
1560 OXOI Ensura that force bit
service (OUT X'q7') causes
a bit service interrupt from
the line address under test.

Before attempting to
set the tested bit,
ensure that the CS
reset was successful.

099-37052-09

INDEX
EBROR DESCRIPTION

FEUD
PAGE
RS305

PETIIH COHMENTS
PAGE
1-330, Pretest error.
A-OQO Rerun routine
15 12.

After resetting and enabling
Y4G2
the scanner and forcing
the scanner to stop at the
tested address, bits in an
IN X'43' that should bave
beun reset, were not. Reg.•
X'l1' contains the line (BCB)
address under test. Beg.
X' 15' indicates the bits that
were not reset in the IN X'43':
Byte 0:
Bit 3-digit present
Bit 4-transmit mode/NBR-8
Bit 5-nev sync/NBR-Q
Bit 6-request to send/
NBB-2
Bit 1-send data/NBR-l
Byte 1:
Bit ~-call request
Bit 5-diagnost;c lode

RS30B

1-200

After attempting to force a
bit service level 2 interrupt
(via 00'1 X'47', from the line
(BC~ address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

SUSFECTED CARD
LOCATION Cs}
HF2, Y4G2

PROG
IlASK

1560

OX02

1560

OX03, Ensure that force bit
service (OUT x'q1') causes
a bit service interrupt from
the line address under test.

After attempting to force a
14F2, yQG2
bit service level 2 interrupt
(via OO~ X'47') from the line
(BCB) address in Reg. 1'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred froa that line.

RS305

1-330, Pretest error.
A-OQO Rerun routine
1512.

1560

OX04

Before attempting to
set the tested bit,
ensure that the CS
reset was successful.

After resetting and enabling
Y4G2
the scanner alld forcing
the scanner to stop at the
tested address, bits in an
in X'43' that should have
been reset, vere not. Beg.
X'II' contains the line (BCB)
address under test.. Reg.
X'15' indicates the bits that
were not reset in the IN X'43':
Byte 0:
Bit 3-digit present
Bit Q-transmit mode/NBR-8
Bit 5-new sync/NBR-4
Bit 6-request to sendl
NBR-2
Bit 1-send data/NBR-l
Byte 1:
Bit 4-call request
Bit 5-diagnostic mode

R530B

1-200

1560

OX05

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUT X' 47') from the Une
(BCB) address in Reg. X'11'.
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
oC,curred from that line.

RS305

A-330, Pretest error.
A-OQO Rerun routine
1512.

1560

OX06

To check for interaction,
set all possible bits in
an OUT X'Q3' on at one
line address before
checking the other address.

An IN 1'43' following the OU~
X' 43' indicated a bit or bits
failed to set. Reg. X'll'
contains the line (BCB)
address of the line being set.

5.0.36 X3705FAA

Y4G2

A-180

Pretest error.
Rerun routines
151B and 1519.

Pretest error.
Rerun routines
1518 and 1519.

Test error.
Although this has
been designated
as a test error,
the capability

Type 1 Scanner 1FT

o
laM 3105 COMMUNICATIONS CONTROLLER
TYPB 1 COft"UNlCATIONS SCANNER 1FT SYftPTOft INDEX

D99-31058-09

I

ROUT. ERRoa PONCTION TESTED
CODE

ERaOR DESCRIPTION
Beg. X'1S' indicates which
bits failed to set.

SUSPECTED CARD
LOCATION(s)

PROG
!ASK

PEALD
pAGE

PET"M
PAGE

COMftENTS
to set the
incUvidual bits
bas been
previously tested.
Rerun routines
151A tbrough 1528
to attempt further
isolat1on~

o
o
o

If

necessary, refer
to PEnll page
given to determine
failing bit or
bits. I f only
one line address
fails, problell
is probably
in the associated
line adapter.
(See General
COII.ents, 13.)
1560

OX07

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt fro.
the line address under test.

After att~mpting to force a
Y4P2, Y4G2
bit service level 2 interrupt
(via OOT X'47') froll the 11.ne
(SCS) address in Beg. X'1 1',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

BS305

A-330, Pretest error.
1-040 Rerun routine
1512.

1560

OX08

Ensure that no problem
exists in address selection
such that interaction occurs
between two lines when
issuing an OUT 1'43'.

After setting all possible
bits in OOT X'43' at one
address, one or more if those
same bits were found on in an
IN X'43' at the second
address. Reg. X'15' indicates
the bits that were found on.
Reg. X'13' contains the second
line laCB) address and Beg.
X'11' contains t~e first.

RS301
RS302

A-010

1510

XXXI

Force Bit service on Low Priority Lines: Each line address is tEsted, in turn, to ensure that aftor setting
the address to low priority via OUT X'42', a bit service interrupt from that line can be forced via OUT
X'41'.

1570

OX01

Ensure that force bit
service (OOT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4P2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1570

Ox02

Before attempting to set
the tested bit, ensure
that the CS reset was
successful.

After resetting and enabling
the CS and forcing the scanner
to stop at the tested address,
all bits in an IN X'42' should
have been off (reset) and
were not. Reg. X'11' contains
the line (BCBI address under

o

Type 1 Scanner 1FT

Y4G2

Y4G2

RS305

Test error.
Try to determine
the pattern of
hilure by
recording the
line addresses
and continuing
from the error
stop. (See General
COllments, • 4.)
Failure 1118y be
restri;ted to line
selection within
a LIB (replace
LIB cards). I f
not, failure is
probably in the
line and LIB
select circuitory
in the CS.
(Replace card
indicated .1

1-330, Pretest error.
1-040 Rerun routine
1 ~12.

1-150

Pretest error.
Rerun rout! ne
,516.

X3105PAA 5.0.37

IBK 3105 COKftUNICATIONS CONTROLLER
TYPE 1 COHKONICATIONS SCANNER 1FT SYMPTOM INDEX
ROOT. ERBoa FUNCTION TESTED
CODE

ERROR DESCRIPTION

D99-3105E-09

SUSPECTED CARD
LOCATION(S)

PROG
MASK

test. Reg. X'15' indicates
the bits in tbe IN X'42' tha~
were no t reset:
Byte 0:
Bit 6-lIode bit 1
Bi t 1-1I04e bi t 2
Byte 1:
Bit O-low priority
Bit l-diagnostic aode
Bit 2-data terminal ready
Bit 3-syncbronous mode
Bit Q-external clock
Bit 5-data rate select
Bit 6-oscillator select 1
Bit 7-oscillator select 2

1510

OX03

Ensure tbat the low priority
bit (IN X' q2', byte 1, bit 0)
can be set by issuing OUT
X'q2' witb tbat bit on.

Eitber the low priority bit
failed to set or otber bits
turned on in error. Reg.
X'11' contains the line (BCB)
address under test. Reg.
.
X'15' contains tbe bits in
error. (Byte 1, bit 0 on
indicates the low priority
bit failed.) Reg. X'14'
contains tbe actual data
received by tbe IN X'1I2'.
By the tiae tbe OUT X'47'
was issued, the allow low
priority latch should have
set and allowed the forced
bit service. NO interrupt
occurred. Beg. XIll'
contains the line (BCB)
address from which bit
service was forced.

YIIG2
YU2

03FP

PEALD
PAGE

PETMM
PAGE

COMMENTS

RS30Q
RS30Q

1-110
A-110

RS30Q
RS306
8S306
BS306
BS306
85306
RS306
RS306

A-170
1-160
1-160
A-160
1-160
1-160
1-160
A-160

RS3011
R5107

1-170, Pretest error.
1-260 Rerun routine
'541.

BS305

1-040

1510

OXOq

Ensure tbat a bit service
interrupt occurs witbin
one scanner pass after
issuing OUT X'47' to a
line address set to low
priority.

1512

XXXI

Diagnostic Bit Service (Test "): Test ail addresses individually to ensure that diagnostic bit service
causes a bit ..ervice' level 2 i,llterrupt . ffo. !lach. This is accollplishecl by stopping the scanner (via tAo'!:
X'Q7') at the 'address 'just preceping the "one tested, setting dUgn!lst;J.c !lit service, and resetting the
forced interrupt. The address under test should interrupt immediately.

1572

OXOl

Ensure that force bit
service (OOT X'1I7') causes
a bit service interrupt froll
the line address under test.

After attempting to force a
YQF2, YQG2
bit service level 2 interrupt
(via 001 X'1I7') fro. the line
(BCB) address in Beg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred froa that line.

B5305

Ensure that setting
diagnostic bit service
(Byte 1, bit 0 of OUT
X'44') will cause a
level 2 interrupt as
soon as the scanner
is started froll a
previous stop.

A level 2 interrupt failed
to occur after setting
diagnostic bit service.

BS105
BS305

1512

OX02

5.0.36 X3105FAA

Y4E2
YIIG2

Test error.
Proble. is
probably in the
C5 near the
allow lov
priority latch
on lLD and lETHK
pages given.
(If ~yte 0, bit 1
of reg. X'II3' is
on, rerun routines
1512 and 15111 •.
1 feedback error
has occurred and
this error is
invalid.)

A-330, Pnetest error.
A-040 Berun routine

1512.

A-300
A-OliO

Test error.
Problem is
probably failure
of the diagnostic
bit service
latch to set.
(If needed,
reg. X'13'
contains the
address of the
line expected
to interrupt.,

Type 1 Scanner 1FT

o
IBK 3105

CO"KQHIC~TIOHS

CONTROLLER

099- 3105E-09

TIPI 1 CO"MONICAtIONS SCAHMBR 1fT SYKPTOR INDEX
,ROOT. BRROR fONCTION TBSTED
CODE
1512 OX03 Bnsure that the interrupt
"hicb just occurred was
rroa the address expected.

o

PROG
KASK

FEALD

PAGE
115301,
19302

COMMENTS
fest error.
Display reg.
I'U'. U
byte 0, bit 1
is on, a feedback
check bas
occurred. Rerun
routines 1512
and 15111. If
not, the scan
counter is
probably not
increBenting
properlf·

Diagnostic Bit Service ('Test '2):
Ensure that after diagnostic bit service has been set, all line
addresses present a bit service interrupt in address order. This is accomplished by forCing bit service
(9ia OOT X'47') from line (BCB) address l'OBlO' and then setting diagnostic bit service.
All addresses
should then interrupt in address order frOB 0 thru to 64. (Tbis allowed to occur twice.)

OXOI

Ensure that force bit
service (OOT 1'47') causes
a bit service interrupt froa
the line address under test.

After attempting to force a
14l2, Y4G2
bit service level 2 interrupt
(via OUt X'47'I from the line
(BCB) address in Beg. X'11',
unmasking legel 2 interrupts and
waiting the tiae of a scanner
pass, no bit service interrupt
occurred from t~at line.

RS305

1574

OX10
tbru
OX8r

Bnsure that after setting
diagnostic bit service, all
addresses interrupt in
address order through two
successive passes of the
scanner. (To facilitate
a scope loop, the error
code is incremented just
before each interrupt is
expected.)

A line did not interrupt in
address order. Beg. 1'13'
contains the line address
ezpected to interrupt. (If
byte 0, bit 5 is on, this
was the second pass.) Byte
0, bit 0 of reg. X'15'
describes the error. If on,
no interrupt was received
at all. If off, the wrong
address interrupted. (See
reg. X'14' for interrupting
address.)

RS305
RS301,
BS302

1576

XXXX

High-Low Priority Test: Ensure the proper operation of the priority counter and control Circuits. tbis is
accomplished in two ways after baving set all lines to low priority. First, a check is made to ensure that
with all lines set to low priority and utilizing the diagnostiC bit service function, each address
interrupts in address order.
Secondly, after tbe first pass, as each line interrupts, its priority Is
changed to high. Tbis should cause the next interrupt to be from the saae address. Tbe address's priority
is then changed back to low to allow the next address to interrupt. this is done through all 64 addresses.
(Note: to determine at an error stop which of the above tests was In progress, display reg. X'13'. If
contents are X'OOOO', first test was in progress. If not, the second test was.)

1576

OXOI

Bnsure that force bit
service (OaT X'~7') causes
a bit service interrupt from
the line address under test.

After attempting to force a
14f2, 14G2
bit service level 2 interrupt
(via OUt 1'47') frOB the line
(BCB) address in Reg. I'll',
unmaSking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1516

OX02

Ensure that the lOll priority
bit (IN X'42', byte I, bit 0)
can be set by issuing OUT
X'42' with that bit on.

Either the low priority bit
failed to set or other bits
turned on in error. Beg.
X' 11' contains the line (BCB)
address under test. Beg.
X'15' contains the bits in

o
o

o
o

SUS PECTED CARD
LOCA'lION (s)
JqG2

XXXX

157~

o

ERROR DESCRIPTION
The address received by an
IN X'41' indicated tbe
scanner stopped at tbe wrong
address. Reg. X'13' contains
the line (BCB) address
expected. Reg_ 1'1~'
contain. the address received
by the IN X'41'. (Not
valid if byte 0, bit 0 is
off.)

Type 1 Scanner 1fT

Y4a2

Y4a2
f4B2

03lF

A-330, Pretest error.
A-040 Rerun routine
1512.

Test error.
Problem is
within the CS,
probably in
the scan counter.
(Bowever, if
interrupt was
received frOB
wrong address,
display reg.
X'43'. If byte
0, bit 1 is on,
a feedback
check has
occurred and
stopped the
scanner frOB
increaenting.
Rerun routines
1512 and 1514.)

RS305

A-330, Pretest error.
A-040 Rerun routine
1512.

RS304
RS107

A-170, Pretest error.
A-260 Rerun routine
154A.

X3705FAA 5.0.39

)1

IBM 3705 COMMUNIC~TIONS CONTROLLER
TYPE 1 COMMUNICATIONS SCANNER 1FT SYMPTOM INDEX
ROUT. ERROR FUNCTION TESTED
CODE

ERROR DESCRIPTION

D99-3705E-09

SUSPECTED CARD
LOCATION (s)

PROG
MASK

FEALD
PAGE

FETMM
PAGE

COMMENTS

error. (Byte I, bit 0 on
indicates the low priority
bit failed.) Reg. X'14'
contains the actual data
received by the IN X'42'.
1576

OX03

Ensure a bit service level
2 interrupt occurs fro.
each line as it is expected
(described in the description
for this routine, see
1576, XXXX, above.)

No interrUpt was received from
the expected address. Reg.
X'15' describes the errOr. If
byte 0, bit 0 is on, no
interrupt was received at all.
If off, the wrong address
interrupted. Reg. X'11'
contains the address
expected to interrupt.
Beg. X'14' contains the
interrupting address.

1576

OX04

Ensure that the low priority
bit (IN X' 42', byte I, bit 0)
can be set by issuing OUT
X'42' with that bit on.

Either the low priority bit
failed to set or other bits
turned on in error. Beg.
X'11' contains the line (BCB)
address under test. Reg.
X' 15' contains the bits in
error. (Byte 1, bit 0 an
indicates the low priority
bit failed.) Beg. X'14'
contains the actual data
received by the IN X'42'.

1576

OXOS

Ensure that the low priority
bit can be reset via OOT

After having set the low
priority bit, an attempt to
reset it was made via OUT
X'42' with byte 1, bit 0 off.
An IN X'42' then indicated
the bit was still on (or
ather bits were set in error),.
Reg. X'1S' contains the bits
in error. Byte 1, bit 0 on
indicates that the low
priority bit failed to reset.
Beg. X'11' contains the line
(BCB) address tested.

X' 42'.

R5305

Y4G2

Test error.
Priority counter
is probably at
fault. (llowever,
if interrupt
OCCurred from
the wrong address,
display reg.
X'43'. It byte
0, bit 1 is on,
a feedback check
bas occurred an d
stopped the
scanner from
incrementing.
Rerun routi nes
1512 ,!~d 1514.)

03FP

RS304
aS107

1-110. Test error.
A-260 Rerun routines
154A and 154C.

03PF

R5304

A-170
1-260

Test error.
Rerun routines
1541 and lS4C.

1578

XXXX

Set Data Set Ready, Carrier Detect, and Clear-to-Send (via diagnostic mode): Ensure that after setting a
line to diagnostic mode and setting on request-to-send, data set ready, carrier detect, and clear-to-send
are on. This test is run on all installed adapters except autocall, in turn. (This test can only ensure
that tbese lines have been set. Due to the actual hardware, it cannot determine if diagnostic mode or the
actual presence of the signal on the communications line set the •• )

1518

OXOI

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt fro.
the line address under tast.

After attempting to farce a
Y4P2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1578

OX02

Ensure that the diagnostic
mode b it in IN X' 42' can
be set by issuing OUT X'42'
with byte 1, bit 1 on.

Either the diagnostic mode bit Y4G2
failed to act correctly or
Y4E2
other bits in the IN X'42'
turned on in orror. Reg. X'11'
contains the line (BCD) address
under test. Reg. X'15' contains
the bits in error. (Byte I,
bit 1 on indicates a diagnostic
made bit failure.) Reg. X'14'

5.0.40 X3105PAA

03FF

RS30S

A-330, Pretest error.
A-040 Rerun routine
1512.

RS306
RS106

A-160
A-270

Test error.
Problem is
probably in the
associated line
adapter. (See
General Comments,
13.) If other
bits are on in
error, some kind

'Type 1 Scanner 1FT

o
IBft 3705 CO""UHiCATIOH5 CONTaO~L!R
TYPB 1 COft"O.ICAfIOHS SCAMHBR I'T SYftPTOft INDEX
ROUT. E880B 'UHCTIOR TISflD
CODE

E8ROR DESCRIPTION
contain. the actual data
received by the 1M X'42'.

o

o
o
o
o

o
o
o

Ensure that the re'luestto-send/NBB-2 bit can be
set by issuing an
OUT X'43' with byte I,
bit 6 on.

099-370511-09

SUSPBCTID CABO
LOCnIOII,_,

1576

OX03

1578

OX04, Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
YII'2, Y4G2
bit service level 2 interrupt
(via OUT X'41') from the line
(BCB) address in aeg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurrea ,fro. that line.

1578

0105

Ensure that setting
diagnostic 80de sets
clear-to-send in IN
X' 43' (byte 1, bit 0
off) if reguest-tosend is already OD.

After setting diagnostic .ode
ana re'luest-to-send, and
forcing the scanner to again
stop at the tested address,
an IN X'43' indicated that
c1ear-to-send was still off
(or diagnostic .ode or
re'luest-to-send bad dropped).
ae9. X'lS' contains the bits
in error. Byte 1, bit 0 on
indicates clear-to-send
failed to set. Reg. 1'111'
contains the d~ta received
bJ the III X'43'.

1'576

OX06

Ensure that diagnosti¢ ,
mode sets da ta :set read y
in IN X'43' (btte I, bit
2 off).
.

I~he,

1576

OX07

Ensure that diagnostic
mode sets carrier detect
in IN X'43'.

Type 1 Scanner IPT

Bither the request-to-send/
HBR-2 bit failed to set or
other bits were set in
error in the IN X'43'. aeg.
X'11' contains the line
(BCB) address under test~
Reg. X'15' contains the bits
in IN X'43' in error. (Byte
0, bit 6 on indicates a
request-to-send/HSR-2 bit
set failure.)

PROG
IASK

Y4G2
1412

PBAtD

nOB

PBTU
PaO!

COUENTS
of interaction
occurred. If
byte I, bit 1 is
on in both Begs.
1'15' and X'14',
the line adapter
tested was an
autocall adapter
and the diagnostic
aode bit set and
should not have.

a5308
BS106

A-200
A-290

Test error.
The problem
probablr is in
the associated
line adapter.
(See General
eouents. fl.)
If other bits
are in error,
so.e kind of
interaction
problell exists.
Reg. X'll1'
contains the
actual data
received by tbe
III X'43'.

aS305

1-330, Test error.
1-040 aerun routine
1512.

Y4G2

0264

85307

A-160, Test error.
1-200 ,ailure is in
the CS. however,
if needed, reg.
X'1" contains
the line (BCBI
address under
test. If reg.
X'15' indicates
that diagnostic
sode or requestto-send bave
dropped (byte 1.
bit 5 or byte O.
bit 6,
respectively),
rerun routines
IS3E and 1526.

same I~. X'lIa' described
I4G2
In'.error OXO!:;. above. indicated
that data set ready was not
set by setting diagnostic sode.
Beg. X'14' contains the
received IN X'43' -uta.

0020

~5307

1-180

Byte 1, bit 3 of the same IN
X'43' in error OX05, above,
was off indicating that
carrier detect was not set
by diagnostic sode. Beg_
X"_' contains tbe
received IN X'43' data.

0010

85307

1-160. Test error.
1-200 As above, failure
is in tile es.
aeg. X'11'
contains the
tested line
address, i f
needed.

I4G2

Test e'rror.
1s above, failure
is in the CS.
Reg. X'11'
contains the
tested line
address.

X3705FlA 5.0.41

lau 3705 CO~~Q"JCATIOH~ CONTROLLER
TYPE 1 COKKUU1CATIOaS SCAHHEB 1FT SYKPTOK INDEX

099-37058-09

BOUT. ERROR PUNCTIOH TBSTED
ERROR DESCRIPTION
SUSPECTED CABO PROG FEALD lETKK coaBENTS
CODE
LOCATION(SI BASK PAGE
PAGE
157A nn Feedback Error (Test "1:
After the CS has been reset, the scanner is stopped at the tested line address
and a check made to ensure that issuing an OUT X'43' with the transa1t mode and send data bits on
(trans.it-sarkl does not cause a feedback check. After testing all insta11ed.adapters except autoca11, the
entire test is run again but with send data off (trans.it space).
157A

OX02

Ensure that force bit
service (OOT X'II7'I causes
a bit service interrupt fro.
the line address under test.

After atteepting to force a
Y1I12, YIIG2
bit service level 2 interrupt
(via OOT X'41') fro. the line
(BCB) address in Reg. X'11',
uneasking level 2 interrupts and
vaiting the tile of a scanner
pilI, no bit lervice interrupt
occurred fro. that line.

1571

OX 011

Before continuing the test,
ensure that a feedback error
is not already indicated.

After stopping the Icanner at
the tested address, an IN
X'43' indicated a feedback
error. (Byte 0, bit 1 vas
on.) (Reg. X'14' contains
the result of the II X'1I3'.)

Yllr2

157A

OX06

Betore checking for feedback
error, ensure via IN X'II3',
that the transmit sode and
send data bits vere properly
set.

Either the transeit .ode bit
failed to set or the send data
bit failed to act correctly.
Beg. X'15' contains the bits
in error. ~yte 0, bit 4 on
on indicates the trane.it
Bode bit failed to set.
Bfte 0, bit 7 on indicates
a send data bit failure.
IReg. X'14' contains the data
received by tbe II X'43-.)

157&

OX08

Ensure tha t issuing OUT
X'II3' vith transmit-.ark
or transeit-space set,
does not cause a feedback
error.

After setting transmit mode
and sark or space, the IN
X'43' described in error
OX06, above, indicated a
feedback check occurred.
(Byte 0, bit , of the IN
X'43' vas on.1 Beg. X'14'
contains the received IN
X'43' data. If byte 1, bit
7 of Reg. X'13' is on, send
data was on (mark). If not,
it was off (spacel.

lS7C

XXXX

Peed back Error (Test '2): Ensure the ability of the feedback error detection circuitry to detect a feedback
check thus preventing a bit service level 2 reset, and the ability to reset a feedback error.
fbis i8
accomplished by resetting the scanner (keeping the LIBS disabled), forcing the Icanner to Itop at the tested
address, attempting to set transmit mode and space via an OUf X'43' and checking that no feedback error
occurs and that the bit service can be reset. The scanner is again stopped at the tested address and an
attempt aade to set transdt lode and mark..
This tiee a feedback error should occur (since the LIB is
disabledl and tbe level 2 interrupt should Dot reset. An attempt is then made to reset the feedback error
and a check made that the level 2 interrupt can nov be reset. (This test is run on all addresses.)

lS7C

OXOI

Ensure that force bit
service (OOT X'47'1 causes
a bit service interrupt fro.
the line address under test.

~fter attempting to force a
14P2, Y4G2
bit service level 2 interrupt
(via OOT X'47'I from the line
(BCBI address in Beg. X'll',
onmasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

lS7C

0102

Before continuing the test,
ensure that attellpting to
set transmit aode and space,
via OOT X'43', does not

After issuing an OUT X'II3' to
the line under test (Reg.
X'11'1, with only the transmit
mode bit on (byte 1, bit 41

5.0.42 X37051'U

85305

A-330, Pretest error.
A-040 Rerun routine
1512.

4000

B5202

1-200

Pretest error·.
Rerun routine
1518.

Y_G2

0900

B5308

A-200

~est error.
Berun routine
ISlA i f transmit
.ode bit failed
lind routines
1522 and 1524 if
the send data
bit failed.

Y4E2
YIIP2

4000

RS104
BS202

A-200

'est error.
Problem is
prollably in tbe
feedback error
detection circuits
in the CS. (SeB
General Cosaents,
fl.. I If problu
appearl not to
be in the CS,
rerun routines
1522 and 1524
before proceding.
If needed, Reg.
X'11' cOlltains
the line address
under test.

>,

"

85305

11900

A-330, Pretest error.
A-O_O Rerun routine
1512.

A-200

Pretest error.
If Reg. X'lS',
byte 0, bits 4
or 7 are on,

fype 1 Scanner IPT

",

1
'·i

,<

o
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o

IDM 3705

CO~MUNICATIONS

CONTROLLER

ROUT. EEBOR FUNCTION TESTED

ERROR DESCRIPTION

CODE

cause a feedback error to
occur.

o
o

c
C,

RS202

Y4G2

85307

Y4G2

R5301

An IN X'71' following an OUT
X'41' to reset bit serVice,
indicated a level 2
interrupt was still present.

157C

0104

Ensure that force bit
service (OUT X'47') causes
II bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OOT X'47') from the line
(BCB) address in Reg_ X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

Ensure that attempting to
set transmit mode and mark
(byte 1, bits 4 and 7 of an
OUT 1'43') on a line on a
disabled LIB, causes a
feedback cbeck to occur.

After stopping the scanner
and issuing the OOT x'43',
an IN X'43' indicated that
a feedback error failed to
occur (or the transmit mode
or send data bits set
erroneously). Reg. X'15'
contains the bits in error:
Byte 0:
Bit 1-a feedback error
failed to occur.
8it 4-the transmit
mode bit set.
Bit 7-the send data
bit set.

OX05

FEALD
PAGE

Y4F2

Ensure that with no feedback
error present, the bit
service level 2 interrupt
that was forced can be
reset.

157C

PROG
MASK

FET""
PAGE

COMIIENTS
ignore bit 2.
If rerunning the
routines specified
failes to locate .
tMi problem, a
LIB may be enabled
in error. Try
replacing Y4F2,
ALD page R5206,
PET"" page A-310.

OX03

OJ

Y4G2

4000

RS305

RS30S

4900

A-240

Rerun routine
'5H.
Reran routine
ISlA.
Rerun routine
1522.

A-040

Pretest error.
Rerun routine
1514.

A-330, Pretest error.

A-040

Rerun routine
1512.

A-200

Y4F2

RS202

Test error.
If Reg. X'lS',
byte 0, bit 4
or 7 are on,
ignore bit 1
and rerun the
specified
routines.
(See
error code
0102, above.)

Y4G2

RS301

Rerun routine

Y4G2

RS307

Rerun routine
152 2.

ISH.

157C

OX06

Ensure that after a
feedback error has occurred,
the bit service level 2
interrupt cannot be reset.

After forcing a feedback
check (see above), an OUT
X'41' vas issued to attempt
to reset the level 2 interrupt
and start the scanner. A
following IN X'71' no longer
indicated a pending level 2
interrupt and should have.

Y4F2

4000

RS202

A-240

Test error.
Feedback error
has appuently
failed to block
the 'start
scanner' line on
ALD page given.

157C

OX07

Ensure that after a
feedback error has occurred,
an OUT X'44' with byte 1,
bit 6 (reset feedback error)
can reset it.

An IN X'43' following the
OUT X'44' still indicated a
feedback error. Reg. X'14'
contains the results of the
IN X'43'.
Byte 0, bit 2 on
indicates the feedback error
reset failure .•

Y4E2

4900

RS105

A-300

Test error.

151C

OX08

Ensure that now that the
feedback error has been
reset, an OUT X'41' can
reset the level 2
interrupt.

After resetting the feedback,
check an OUT X'41' (reset bit
service) was issued and a
folloving IN X'77' still
indicated a level 2 interrupt
present. Beg. X'14' contains
the IN X'77' data.

Y4F2
Y4G2

4000

R5202
BS305

A-240

Test error.
The 'start
scanner' line on
ALD pages given
failed to
come up.

o

Type 1 Scanner 1FT

e

(send dat4 off=space), an IN
X'43' indicated that either a
feedback cbeck occurred,
transmit mode bit did set (it
should not have since the LIBs
vere disabled). or send data
erroneously set. Reg. X'14'
contains the actual data
received by the IN X'43'.
Reg. 1'15' contains the bits
in error:
Byte 0:
Bit 1-feedback cbeck
was on.
sit 4-transmit mode
bit set.
Bit 7-send data bit
lias set.

SUSPECTED CARD
LOCATION(s)

151C

"

c'

D99-3705E-09

TYPE 1 COMMUNICATIONS SCANNER 1FT SYMPTOM INDEX

X3705FAA 5. o. 43

IBn 3105 COMMUNICATIONS CONTBOLLE~
TYPE 1 COnMONICATIONS SCANNEB Ir~ SYMPTOM INDEX

D99-3105E-09

BOUT. ERROR FUNCTION TESTED
ERROR DESCRIFTION
SUSPECTED CARD PROG FEALD fETM" COMMENTS
CODE
LOCATION(s) MASK PAGE
PAGE
151E XXXX LIB Bit Clock Check: Enable a LIB and check to ensure that no LIB bit clock error is indicated for any LIB.
[This test is run four times; once for each LIB.)
151E

OX02

Before enabling any LIB,
ensure that no bit clock
is indicated.

After having reset and
enabled the scanner, an IN
X'4q' indicated a LIB bit
clock check even though all
LIB's were disabled. Reg
X'lQ' contains the results
of the IN X'q4':

003C

RS206

&210
&220

I?retest error.
Rerun routines
15011 through
150&.

Byte I:
Ili t 2-LlB

bit clock
check
Bit 3-LIB 2 bit clock
check
Bit 'I-LIB 3 bit clock
check
Bit 5-LIB q bit clock
check

157E

OXOq

Ensure that with any LIB
enabled no bit clock check
is indicated for the first
LIB.

After enabling a LIB, the
LIB 1 bit clock check bit
was on in an IN X'q,,'. Reg.
X'lq' contains the results
of the IN X'1I4'. Byte 0,
bi~s 6 and 7 indicate which
LIB was enabled; '00', '01',
'10', and '11' for LIB's
1, 2, 3, and 'I respectively.

YQF2

0020

RS206

A-210
1-220

Test error.
If the first
LIB 1185 the
one that was
enabled, suspect
a failure in
that LIB's bit
clock control
carll.

1"7£

OX06

Ensure that with any LIB
onabled no bit clock check
is indicated for the second
LIB.

After enabling a LIB, tho
LIB 2 bit clock check bit
was on in an IN X'q4'. Reg.
X' 14' contains the results
of the IN X'44'. Byte 0,
bits 6 and 7 indicate which
LIB was enabled; '00', '01',
'10', and 'II' for LIB's
1, 2, 3. and 4 respectively.

HF2

0020

RS206

1-210
1-220

Test error.
If the second
LIB vas the
one that was
enabled, suspect
a failure in
that LIB's bit
clock control
card.

1578

OX08

Ensure that with any LIB
enabled no bit clock check
is indicated for the third
LIB.

After enabling a LIB, the
LIB 3 bit clock check bit
was on in an IN X'4q'. Reg.
X'lq' contains the results
of the IN X'II4'. Byte 0,
bit 6 and 7 indicate which
LIB was enabled; '00', '01'
'la', and '11' for LIB's
1, 2, 3, and q respectively.

r41' 2

0020

RS206

A-210
1-220

Test error.
If the third
LIB was the
one that was
enabled, suspect
a failure in
that LIB's bit
clock control
card.

1578

OXOA

Ensure that with any LIB
enabled no bit clock check
is indicated for the fourth
LIB.

After enabling a LIB, the
LIB q bit clock check bit
was on in an IN X'44'. Reg.
X'14' contains the results
of the IN X'qq'. Byte 0,
bit 6 and 7 indicate which

yqF2

0020

RS206

A-210
A-220

Test error.
If the fourth
LIB was the
one that was
enabled, suspect
a failure in
that LIB' 5 bit
clock control
card.

LIB was enabled;

'OOt, '01 1

,

'10', and 'II' for LIB's
1, 2, 3, and q respectively.

1580

XXXX

Oscillator Interrupt Test (or Konitor Kode 11): By setting monitor mode'1 (allow nor.al bit service
requ£,sts) and checking tor a bit service level 2 interrupt trom each installed adapter. ensure that all
oscillators can cause a bit service interrupt from all installed adapters. (This' test runs first with
oscillator 0 and each line, first in receive and then in transmit mode. It then tests all other installed
oscillators with each installed adapter except autocall.)

1500

OXOl

Ensur~ that force bit
service (OUT X' q7') causes
a bit service interrupt from
the line address under test.

5. O. qq X370SPAA

After attempting to force a
bit service level 2 interrupt
(via 001 X'47') from the line
(BCB) address in Reg. X " " ,

YQ1'2, yqG2

RSJ05

A-330, I?retest error.
A-OqO Rerun routine
'512.

Type 1 Scanner 1FT

,-,-,\,

,,_J

.-~-~.------

o
o
o

o
o

18" 3105 COft"UNICATIONS CONTROLL!R
TtPB 1 COftftUHICATIONS SCAHHBR 1fT SYftPTOft INDEX
lOUT. BRBOB PUNCTION TBSTBD

USK

After stopping the scanner and
issuing an OUT X'42', an IN
1'42' indicated that lIode 11
was not set or the proper
oscillator select bits were
not set (or other bits vere
set in error). Reg. X'14'
contains tbe actual data
received ~y the IN X'42'.
Reg. X'15' contains the bits
in error:
Byte 0:
Bit 6-80de bit
failed
to set.
Bit 'I-mode bit 2 failed
to set.
Byte 1:
Bit O-low priority set
in error.
Bit l-diagnostic wrap
80de set in error.
Bit 2-datl terllinal ready
set in error.
Bit 3-synchronous lIode
set in error.
Bit 4-external clock bit
set in error.
Bit 5-data rate select
bit set in error.
Bit 6-oscillator select
bit 1 failed to set or
vas set in error.
8it 'I-oscillator select
bit 2 failed to set or
vas set in error.

t4G2

03PP

After issuing an OUT X'43' to
the line under test, an IN
X'43' indicated tbat the
transmit lIode ~it failed to
set or reset. Reg. 1'14'
contains the received IN
X'43' data. !he transait mode
bit (byte 0, bit 4) should
have been the opposite of
what it was.

t4G2

unmasking level 2 interrupts and
.aiting the ti.e of a scanner
pass, no bit service interrupt
occurred from that line.
1580

OX02

I!nsure that an OUT 1'42'
has set aode 11 and bas
properly selected an
oscillator.

o
o
o

PROG

SUSPECTED CARD
LOCATIOllls)

COOl!

o

o
o
o
o

BRBOB DESCRIPTION

D99- 3'1 051- 09

PETU

counTS

A-150

Pretest error.
RerUn routines
specified below.
leg. X'11'
contains the
line address
under test.

R5304

1-170

15304

A-l'10

Rerun routine
1541!.
Berun routine
1552.

85304

A-170

R5306

1-160

R5306

1-160

FEUD

PAG!

P1GB

R5306

A-160

BS306

1-160

B5306

1-160

BS306

1-160

8S306

A-160

Berun routines
1546 and 1548.

R5308

1-200

Pretest error.
Berun routines
15111 and 151C.

I

0800

Rerun routines
1541 and 154C.
Rerun routines
153A and 153C.
Rerun routines
1532 Ind 1534.
Berun routines
152A and 152C.
Rerun routines
1536 and 1538.
Berun routines
152B and 1530.
Beran routines
1542 and 1544.

1580

OX03

Ensure that an OUT 1'43'
has set transmit or receive
lode.

1580

OX21

The remaining error codes in this routine are basically the same, changing to indicate the oscillator
selected at time of failure and to indicate whether the failure occurred vhile in transmit or receive Bode.
The aajoritJ of failures detected by this routine will be caused by a faulty line adapter, but aay be caused
by a LIB failure or the CS itself. ISee general co.ments, '3.) If III lines fail in both transBit Ind
receive Bodes and with all oscillators, suspect card at location Y4G2, ALD page BS305. I~ all lines fail
with a given oscillator, regardless of Bode, replace cards 1482 and Y4J2 for oscillators 0 or 1 and 2 or 3,
respectively. If all lines fail on one LIB in transmit Bode only, replace the LIB ISOLATIOH CARD. If all
lines on one LIB fail in receivs mode only, replace the LIB BIT CLOCK CONTROL CABD. If only one line fails,
replace the line interface card for that address.

1580

OX20

co ott
Ensure that the first
After having set monitor
error. oscillator can create a
Beg. X'11' strobe in a line adapter
the line set to receive mode, oscillator 0, setting receive
under causing a bit service
mode, starting the scanner,
ISee level 2 interrupt.
and vaiting a maximo. of 30
follow! ng the
milliseconds for a bit
for service interrupt from the
code 0103 line under test, none
routine.)

Type 1 Scanner IPT

1482
BS401
mode 11 to allow normal bit
service requests, selecting

occurred.

t4G2

Test
BS305 &-040
contains
address
test.
note
description
error
of this

X3705PAA 5.0.45

ID~ 3105 CO~~UNICATI0NS CONTROLLER
T1PE 1 CO~~UNICATIONS SCANNER 1fT SYMPTOM INDEX

099- 37 05E- 09

ROUT. ERBOR FUNCTION TESTED
ERROR DESCRIPTION
SUSE~C'ED CARD
PROG PEALD PETH"
CODE
LOCATION (s) MASK PAGE
PAGE
1580 OX21 Ensure that the first
After having set monitor mode
Y4H2
RS401 A-040
error. oscillator can create a
11 to allow normal bit servica
X'11' strobe in a line adapter requests, selecting oscillator
the line set to transmit mode, 0, setting transmit mode,
under causing a bit service
starting the scanner, and waiting
(Soa lovol 2 intorrupt.
a maximum of 30 milliseconds
following the
for a bit service interrupt from
for the line adapter under test,
code OX03 none occurred.
routine.)

Test
fleg.
contains
address
test.
note
description
error
of this

1580

OX22

Ensure that the second
After having set monitor mode
Y4U4
R5402 A-040 Test
error. oscillator can create a
11 to allow normal bit service
Reg.
X'11' strobe in a line adapter requests, selecting oscillator
contains
the line set to receive mode, 1, setting receiYe mode, starting
address under causing a bit
service
the scanner, and waiting a
test.
(See level
interrupt.
maximum of 30 milliseconds for
note
following
a bit service interrupt from
the
description the line under test, none
for
error code occurred.
OX03 of
this
routine.)

1580

OX 23

Ensure that the second
After having set monitor mode
Y4H4
RS402 A-040
error. oscillator can create a
11 to allow normal bit service
X'11' strobe in a line adapter requests, selecting oscillator
the line set to transmit mode, 1, setting transmit mode,
under causing a bit service
starting the scanner, and waiting
(See level 2 interrupt.
a maximum of 30 milliseconds
following
for a bit service interrupt
description from the line under test,error code none occurred.
this

Test
Reg.
contains
address
test.
note
the
for
OX03 of
routine. )

1580

OX24

Ensure that the third
YQJ2
R5403 A-OQO
After having set monitor .ode
error. oscillator can create a
11 to allow normal bit service
X'11' strobe in a line adapter requests, selecting oscillator
the line set to receive mode, 2, setting receive mode,
under causing a bit service
starting the scanner, and
(See level 2 interrupt.
waiting a maximum of 30
following
milliseconds for a bit service
description interrupt from the line under
error code test, Ilone occurred.
this

Test
Reg.
contains
address
test.
note
the
for
OX03 of
routine.)

1580

1580

OX25

OX26

Insure that the third
After having set monitor mode
Y4J2
RS403 A· OQO
error. oscillator can create a
11 to allow normal bit service
X'11' strobe in a line adapter requests, selecting oscillator
the line set to transmit mode, 2, setting transmit mode,
under causing a bit service
starting the scanner, and
(See level 2 interrupt.
waiting a maximum of 30
following
milliseconds for a bit
description service interrupt from the
error code line under test, none
this occurred.

Test

Ensure that the fourth
After having set monitor
Y4J4
RS404
error. oscillator can credto a
11 to allow nor.al bit
X'11' strobe in a line adapter servic., requests, selecting
the line set to receive mode, oscillator 3, setting receive
under causing a bit service
mode, starting the scanner,
(see level 2 interrupt.
and waiting a maximum of 30
following
milliseconds for a bit
description service intorrupt from the
error code line under test, none
this occurred.

Test
Reg.
contains
addreas
test.
note

A-040

Reg.
contains
address
test.
note
the
for
OX03 of
routine. )

the
tor
OX03 of
.ouline. )

Type 1 Scanner 1FT

o
()

o
o

o
o
o
o
o
o

IB~ 3705 COM"UNICATIONS CONTROLLER
TY~E 1 COK~UNlc~TIONS SCANNER 1FT SYMPTOM

P99-3705E-09

INDEX

ROUT. ERROR FUNCTION TESTED
ERBOR DESCRIPTION
SUSPECTED CARD PROG FEALD
CODE
LOCATION Cs) MASK PAGE
1580 0127 Ensure that the fourth
After having set monitor mode
Y4J4
R54011
error. oscillator can create a
11 to allow normal bit
X'11' strobe in a line adapter service requests, selecting
the line set to transmit mode, oscillator 3, setting transmit
under causing a bit service
mode, starting the scanner, and
Isee level 2 interrupt.
waiting a maximum of 30
tollowinq
milliseconds for a bit service
description interrupt from the line under
error code test, none occurred.
this

FE'l'ft~

PAGE
A-OliO

Test
Reg.
contains
address
test.
note
tho
for
0103 of
routine. )

1580

OX30

Ensure that after a bit
After receiving a normal bit
error. service level 2 interrupt
the has been caused by a strobe
service in a line adapter, the 'bit
was not service' bit in IN X'~3' is
onto the set.
the actual data received by
during the
the IN X'ij3'.

Y4G2
0002 RS307 A-200
service request from a line
set to monitor mode 11, byte
1, bit 6 of an IN 1'43' was
not set. Reg. 1'14' contains

Test
Apparently,
bit
bit
gated
inbus
IN X'43'.
CIf
needed,

o

\leg.

X'11'
contains
the line
address
under
test. )

o

0

COMMEK'lS

1582

XXIX

Reset Interface Bit Service Request: After the CS has been reset, the tested line address is set to mode
11. oscillator 0 selected, and a bit service level 2 interrupt caused by a strobe in the line adapter is
allowed to occur. An OUT 1'41' or X'46' is issued in an attempt to reset the interface bit service and a
check made to ensure that it did. ~lso, if the bit service failed to reset, a check is made to ensure that
a feedback occurs. (This test runs on each installed line adapter, first using OUT X'4,' then OUT X'46', in
turn. )

1582

OXOl

Ensure that force bit
service COOT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUT X'47') froll the line
IBCB) address in Beg. X'l1',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from. that line.

1582

0102

Ensure that an OUT 1'42'
has set mode 11 and has
properly selected an
oscilla tor.

After stopping the scanner and
issuing an OUT X'42', an IN
X'42' indicated that ~ode 11
was not set or the proper
oscillator select bits were
not set (or other bits were
set in error). Reg. X'14'
contains the actual data
received by the IN X'~2'.
Reg. X'15' contains the bits

1

i.,.•.
.. ,I

1

1

"j

o
o
o

o

in errot::
Byte 0:

Bit 6-mode bit
failed
to set.
Bit 7-mode bit 2 failed
to set.
Byte 1:
Sit O-low priority set
in error.
Bit l-diagnostic wrap
mode set in error.
Bit 2-data terminal ready
set in error ..
Bit 3-synchronous mode
set in error.
Bit 4-external clock bit
set in error.
Bit 5-data rate select
bit set in error.

o

Type 1 Scanner 1FT

o

Y4G2

RS305

03FF

1-330, Pretest error.
A-040 Berun routine
1512.

1-150

Pretest error.
Rerun routines
specified below.
\leg. X'11'
contains the
line address
under test.

BS304

A-170

R53011

A-170

Berun routine
154 E.
Rerun routine
1552.

R53011

A-170

R5306

"-160

RS306

A-160

R5306

A-160

R5306

A-160

R5306

A-160

Ilerun routines
154A and 154C,.
Rerun routines
153A and 153c.
Rerun routines
1532 and 1534.
Rerun routines
152A and 152C.
Rerun routines
1536 and 1538.
Rerun routines
152E and 1530.

X3705FAA 5.0.47

lEa 3705 COKHDNICATIONS CONTROLLER
TYPE 1 COftBUNICATIONS SCANNER 1FT SYKPTOK INDEX
BOUT. ERROR FUNCTION TESTED
CODE

D99- 37 05E- 09

ERROR DESCRIPTION

SUSPECTED CARD
LOCATION (sl

PROG
IIASK

Bit 6-oscillator select
bit , failed to set or
was set in error.
Bit 7-oscillator select
bit 2 failed to set or
was set in error.
1582

OX03

, 582

O~

1582

FEALD
PAGE
R5306

l'ETItK
PAGE
A-160

COUENTS

RS306

A-160

8erun routines
15116 and 15118.

Rerun routines
1542 and 151111.

Ensure that the first
oscillator has created a
strobe and caused a bit
service level 2 interrupt.

After having set monitor mode
11 to allow normal bit service
requests, selecting oscillator
0, start,\ng the scanner, and
waiting up to 30 milliseconds
for a bit service level 2
interrupt from the line under
test, none occurred.

Y482

RS401

A-OliO

Pretest error.
Beru n rout! ne
1580.

Ensure t hit t if A reset
bit service fails to do
so, then a feedback
check will occur.

After a failing attempt to
reset an interface bit service
request, an IN X'II3' failed
to indicate a feedback error.
(Byte 0, bit 1 MaS off.)

YIIF2
Y4E2

8S202
RS104

A-240

Test error.
Since feedback
errors of this
type cannot be
forced, this
problem should
be fixe(l be fore
t he problem of
the reset failing.

OX05' Ensure that an OUT X'41'
or X'II6' can reset a bit
service level 2 request.

After allowing a bit service
Y4F2
level 2 request to cause an
I4E2
interrupt, an IN X'77' following
an OUT X'41' or X'46' still
indicated that a type 1 CS
level 2 request vas present.
(Byte 0, bit 1 was on.) Reg.
X'11', if needed, contains
the line address under test.
I f byte 0, bit 3 of that Reg .•
is off, the reset attempted
was an OUT X'41'. It not, it
was an OU~ X'46'.

RS202
BS104

A-240
A-320

Test error.
Although this
error code has
been designated
as a test error,
the reset
circuitry i t
tests has
previously been
tested. Rerun
routine 1514.

1582

OX06

Ensure that in addition
to resetting a bit service
level 2 interrupt, an OUT
X'II1' or 1'46' can reset
the interface bit service
request that caused the
level 2.

After resetting the level 2
interrupt and thus starting
the scanner, another bit
service .interrupt from the
same line occ2rred within the
next pass of the scanner.
Tbis indicate4 that the
intertace bit service reque8t
in the tested line adapter
was not reset. 8eg. l'tl'
contains the line IBCB)
address under test.. (If
byte 0, bit 3 of that aeg.
is off, the reset tried was
an OUT '41'. If not, it
was an OUT X'46'.)

85308

A-240
A-320

Test error.
Failure may be
in the CS, the
LIB, or line
adapter. (See
General Comments,
.1.1 Howev8t,
it tailure ocours
with only one ot
t be output
instructions,
problem is
probably in
instruction
decode. Try
rerunning
routine 1514.

1584

XXXX

Disable Level 2 Interrupts (Or Monitor Mode 001: Ensure that once normal bit service requests are allowed
via monitor sode 11, they can again be disabled via monitor mode 00. (This test is run on all installed
line adapters, in turn. I

1584

OXO 1

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
141'2, HG2
bit service level 2 interrupt
(via OCT X'47') from the line
(BCB) address in Beg. X'11' ,
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1584

OX02

Ensure that an OUT X'42'
has set mode 11 and has

After stoppin~ the scanner and
issuing an OUT 1'42', an IN

011

5.0.ij8 X3705FAA

Y4G 2

Y4G2

RS305

03FF

A-330, pretost arror.
A-040 8erun routine
1512.

A-ISO

,~

Pretest error.
Rerun rou ti nes

Type 1 Scanner 1FT

,1'vty
1'1

o
o
o
0
0
0
0
0
0
0

IBK 3705 COftftONICATIONS CONTROLLE!
TYPE 1 COMftOJICATIORS SCANNER 1fT SYMPTOa INDEX
ROUT. EBROB FUNCTION 'liSTED
CODE
properly selected an
oscillator.

X'42' indicated that .ode 11
vas not set or the proper
oscillator select bits were
not set Cor other bits were
set in error). Reg. X'14'
contains tbe actual data
received by the IN 1'42'.
Reg. X'1S' contains the bits
in error:
Byte 0:
Bit 6-mode bit 1 failed
to set.
Bit 7-.ode bit 2 failed
to set.
Byte 1:
Bit o-low priority set
in error.
Bit '-diagnostic wrap
mode set in error.
Bit 2-data terminal ready
set in error.
Bit 3-synchronous mode
set in error.
Bit q-external clock bit
set in error.
Bit 5-data rate select
bit set in error.
Bit 6-oscillator select
bit 1 failed to set or
was set in error.
Bit 7-oscillator select
bit 2 failed to set or
was set in error.

SUSPECTED CARD
LOCATIONCsl

PROG
ftASK

FEALD
PAGB

PETHa
PAGE

COnftEHT5
specified below.
Reg. 1'11'
contaiu the
line address
undu test.

R5304

A-170

B5304

A-nO

RS304

A-170

RS306

A-160

R5306

1-160

Rerun routine
1541!.
Rerun routine
1552.
Rerun routines
1511l and 1511C.
Rerun routines
153A and 153e.
Rerun routines
1532 and 1534.
Berun routines
152A and 152C.
Rerun routines
1536 and 1538.
Berun routines
152E and 1530.
Rerun routines
15112 and 15411.

B5306

A-160

BS306

A-160

85306

1-160

R5306

A-160

R5306

A-160

Rerun routines
15116 and 1548.

OX03

Ensure that the first
oscillator has created a
strobe and caused a bit
service level 2 interrupt.

After having set monitor mode
Y482
11 to allOW normal bit service
reguests, selecting oscillator
0, starting the scanner, and
vaiting up to 30 lilliseconds
for a bit service level 2
interrupt fro. the line under
test, none occurred.

BS401

A-040

Pretest error.
Rerun routine
1580.

1584

OX04

Ensure tbat once monitor
mode 11 bas allowed normal
bit service requests, they
can again be disabled via
monitor mode 00.

After having insurred that
monitor lode 11 allowed at
least one normal bit service
request, an OUT 1'42' vas
issued to set mode 00 Cdisable level 2 interrupts).
Another bit service interrupt
from the same line address
then occurred. Reg. X'11'
contains the line address
ander test.

B5305

A-040

Test error.
Although this
failure is
designated as
a test error,
the separate
functions have
been previously
tested. Display
Reg. X'1I2'. If
bits 6 or 1 of
byte a are on,
rerun routines
154E thru 1554.
If not, rerun
routine 1511.

1586

xxn

Bit Overrun (Test .1): After the CS has been reset, the scanner is stopped at the tested address, and lode
11 (allow normal bit service requests) is set along with translit or receive mode. The scanner is again
started and when the next interrupt occurs fro. that line, a test is lade to ensure that no bit overrun is
present. (This test is run on all installed line adapters, in turn, in receive mode and then, in turn, in
transmit mode.)

1586

OXOl

Ensure that force bit
service (ODT X'47') causes
a bit service interrupt fro.
the line address under test.

1 ~~4

G
o
o
o
o
o

ERRoa DESCRIPTION

D99-3705E-09

Type 1 Scanner 1FT

14G2

After attempting to force a
Y4F2, YIIG2
bit service level 2 interrupt
(via ou~ X'41') frOB the line
CSCS) address in Reg. X' 11' ,
unmasking level 2 interrupts and
waiting the tile of a scanner
pass, no bit service interrupt
occurred frol that line.

R5305

A-330, Pretest error.
A-040 Rerun routine
1512.

X3105FAA 5.0.49

>',

IB" 3105 COMMUNICATION~ CONTROLLEP
TYPE 1 COMMUNICATIONS SCANNER 1FT SYMPTOM INDEX
ROUT. EaaOR FUNCTION TESTED
CODE
1566 OX02 Ensure that an OUT X'q2'
has set mode 11 and has
properly selected an
oscillator.

15U6

OX03

Ensure that dn OUT X'q3'
has set transmit or receive

mode.

ERROR DE5CRIiTION
After stopping the scanner and
issuing an OOT X'Q2', an IN
X'Q2' indicated tbat mode 11
vas not set or the proper
oscillator select bits were
not set (or other bits were
set in error). Reg. X'14'
contains the actual data
received by the IN X'Q2'.
Reg. X'1S' contains the bits
in error:
Byte 0:
Bit 6-mode bit
failed
to set.
Bit 1-mode bit
failed
to set.
Byte 1:
Bit O-low priority set
in error.
Bit I-diagnostic wrap
mode set in error.
Bit 2-data terminal ready
set in error.
Bit 3-synchronous mode
set in error.
Bit Q-external clock bit
s~t in error.
Bit 5-data r~te select
bit set in error.
ait 6-oscl11ator select
bit 1 failed to set or
was set in error.
Bit 1-oscillator select
bit 2 failed to set or
was set in error.

D99- 31 05 E- 09

SUSPECTED CARD
LOCATION (S)
yqG2

After issuing an OUT X'Qj' to
the line undc" test, an IN
X'Q3' indicated that the
transmit mode bit failed to
set or reset. Reg. X'IQ'
contaias the tBceived IN
X'Q3' data. The transmit mode
bit (blte 0, bit 4) should
have been the opposite of
what it was.

Y4G2

PROG
MASK
031'1'

0600

FEUD

PAGE

n'rM"

PAGE
A-ISO
A-3qO

COMIIENTS
Pretest ell"Or.

Rerun routines
specified below.
Reg. X'11'
contains tb.:~
line address
under test.

R530q

A- 170

IH!l.

RS30Q

A-170

15U.
Rerun rOllt!
1552.

R530Q

1.-110

R(:run routlnH: J

R5306

1-160

RS306

1-160

115306

A-160

a5306

A-160

un routi no
l~(j

1SH and lS4C.
Rerun Louti rle~
153A and 153C.
Rerun Loutines
1532 and 1534.
Rerun routines
152A and 152C.
Reron routines
1536 and 1538.
Rerun routines
152E and 1530.
RerUn routi nes
1542 and 1544.

RS306

1-160

85306

1-160

R5306

A-160

Rerun routines
15£16 and 1546.

R5308

A-200
A-3QO

Preteut error.
Rerun routines
ISlA and 151C.

R5ijOl

A-OQO

Test error.
Although this
failure is
designated as
a test error,
this function has
been ptev ir"test enOL:.
Reg. X' 11'
contains line
address under
test. Rerun
the appropriate
routine.

R5304

A-170

B5304

A-170

Rerun routine
154E.
Rerun routine
1552.

R5304

1.-170

RS306

1-160

RS306

1-160

RS306

"'-160

R5306

lI.-lbO

RS306

1-160

R5306

1-160

RS306

A-160

85305

A-330, Pretest error.
1-040 Rerun routine
1512.

OJFF

set in error.

Bit 6-oscillator select
bit 1 set.
Bit 7-oscillator select
bit 2 set.
ISBA

OX06

Ensure that force bit
service (OUT X'47'1 causes
a bit service interrupt from
the line address under test.

After attempti~9 to to~ce a
Y4F2, lC4G2
bit serv ice level 2 interrupt
(via oo·r X'47'1 from the line
(BCB) address in Beg. X'l1',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

158A

OX07

Ensure that the transmit
line has now been properly
set to transmit mode and
send data (and thus the
test data latch) has been
set to the proper state.

After baving stopped the
Y4G2, Y4F2
scanner at tbe transmit
address for the second time
and issuing an 00'1' X'43' to
set send data to a mark or
space and to set transmit
mode, an IN X'43' indicat~d
the transmit line had not
been properly set up. Reg.
X'11' contains the line
address under test. Reg.
X'1~' contains the actual
data ~eceived by the IN
X'~3'.
Reg. X'lS' contains
the hits in error:
Byte 0:
Bit 1-a feedbaCK check
occurred when the OOT
X'43' was issued.
Bit q-transmit mode bit
failed to set.
Bit "send data did not
set to the proper state.
Byte 1:
Bit 5-diagnostic aode
f~iled to set in IN X'43'.

5.0.54 X3705FIU

4904

A-200
A-350

Rerun routines
1S16,154A,&154C.
Rerun rout! ne
153A.
Rerun routines
1516,1532,& 1534.
Rerun routi nes
1516,152I1.,&152C.
Berun routines
1516,1536,&1538.
Rerun routines
1516,15 2E, & 1530.
Rerun routines
1516,15Q2,&1544.
Rerun routines
1516,1546,&1548.

Pretest error.
Rerun the
appropriate
routine 9iVf:O.

RS202

Rerun routilles
157A and 157C.

R5308

Rerun routines

RS30B

Rerun routines
1522 and 1524.

R5307

Rerun routines
1532 and 1540.

151A and lS1C.

"

Type 1 Scanner 1FT

·f....

~

o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o

tBK 3705 CO""UHlCl~IO.S COH~ROLLER
TIP! 1 CO""DNIC1TIONS SC1NNER If~ 5Y"P~O" INDEX

D9 9- 31 05 E- 09

ROOT. ERROR fDNCTION TESTED
CODE
ISBA OIOB Ensure that the first
oscillator has created a
strobe and caused a hit
service level 2 interrupt
from the receive line.

SDSPEC'l'ED C1RD
LOCATION lsi
After having set lonitor lode
nU2
11 to allow norsal bit service
reguests, selecting oecillator
0, starting the scanner and
vaiting up to 30 milliseconds
for a bit service level 2
interrupt fros the line under
test, Done occurred.

lS8A

Ensure that the first
oscillator has created a
strobe and caused a bit
service level 2 interrupt
from the receive line

After hav~ng set lonitor so de
to allow norsal bit service
requests, selecting oscillator
0, starting the scanner, and
waiting up to 30 .il11seconds
for a bit service level 2
interrupt fros the line under
test, none occurred.

TIIU2

After giving the receive line
a chance to strobe in tbe data
transmitted, an IN X'Q3' at
the time the scanner stopped
indicated the data transmitted
vas not received. Beg. X'IQ'
contains the received IN X'II3'
data. Beg. X'15' contains the
bits in error (ignore byte 0,
bit 0 if any others are on) :
Byte 0:
Bit O-received data was
not the same as the
data transmitted.
Byte I:
Bit 5-diagnostic 80de
has dropped.
Bit 6-interface bit
service request vas
not present.

14E2

0109

again~

BRBOB

DESCBIP~IOH

.

PROG
USIt

fBALD
PAGE
BSIiOl

PAGE
A-OliO

aSQOl

A-040

Pretest error.
Rerun routinG
1580.

8S105

&-350

Test error.
If diagnostic
mode or interface
service request
vere in error,
rerun routines
153E and 1580,
respectively.
I f not problem
may be in the C5,
a LIB, or line
adapter. (See
General Comments,
'3.) If probles
appears to be in
a tIB, try
replacing the LIB
isolation card
first. Beg. X'11'
contains tho line
address of the
receive line. If
needed, Beg. X'16'
contains the
storage location
of the line
address of the
transmit line.

II

FBT!!!!

IS8A

OXOA

Bnsure that (nov tbat the
receive line bas bad a
chance to strohe in the
transmitted data) data can
be sent from one line to
anotber througb the use
of tbe test data latch in
diagnostic lode.

lS8C

XXXX

~est Data Latch:
Bnsure that setting diagnostic mode cauaes the test data latch to be set to a
mark. After the CS bas been reset, the tested line address is set to diagnostic mode and transsit
space (to set the test data latch to a space). the saae line is then set to receive mode and a
check .ade that it is now receiving a space (via the test data latch). Another ODT X'42' is
then issued to set diagnostiC .ode again and a test .ade to ensure that the nezt tile the
scanner is stopped at that address, it will be receiving a mark. (Hate that since sending the
space, send data has never changed.) (This test is run on all installed non-autocal1 line
adapters, in turn.)

lS8C

0102

En sure t hat force bit
service (OOT X'1I7') causes
a bit service interrupt from
the line address under test.

1S8C

0103

Bnsure that the diagnostic
mode bit in IH 1'42' can
be set by issuing ou~ X'42'
with byte 1, bit Ion.

Type 1 Scanner

If~

8006

lfter attempting to force a
Y4P2, Y4G2
bit service level 2 interrupt
(via OD~ X'Q7') fro a the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred fro I that line.
Either the diagnostic mode bit YQG2
failed to act correctly or
Y4B2
other bits in the IN X'1I2'
turned on in error. Reg. I'll'
contains the line (BCB) address
under test. Beg. X'15' contains
the bits in orror. (Byte I,
bit 1 on indicates a diagDostic
mode bit failure.) Beg. X'll1'

BS305

CO!!!!EN~S

Pretest error.
Rerun routine
1580.

1-330, Pretest error.
I-OliO Berun routine
1512.

-c

03Ff

R5306
BS106

A-160
A-270

Pret est error.
Berun routine
1531.

X3705PU 5.0.55

15K 3705 COKKUNICATIONS CONTROLLER
TYPE 1 COMMUNICATIONS SCANNER 1FT SYftPTOK INDEX
aOUT. ERROR FONCTION TESTED
CODE

EBROR

099- 37 05E- 09

DESCRI~TION

SUSPECTED CARD
LOCATION(S)

PROG

"ASK

FEALD
PAGE

FETMM
PAGE

COftMEHTS

1-240

Pretest error.
Rerun rou ti ne

contains the actual data
received by the IN 1'42'.
1SSC

15SC

OXOq

OX06

Ensure that once the scanner
is stopped, it can be started
again via OUT I'Q1' and then
stopped again by forcing a
bit service (OUT X'47')
interrupt.

Ensure that. before
continuing, diagnostic wode
and trans. it space have
been able to be set in the
line adapter under test.

Either the scanner could not
started again or after
attempting to force the next
bit service interrupt and
waiting the time of a SCanner
pass, no bit service interrupt
fro. the line under test
occurred. Beg. 1'11' contains
the line (BCB) address fro.
which bit service was to be
forced. Value of Reg. X'1S'
describes the failure:
X'EOOO' - the OUT X'41'
tailed to reset the type 1
CS level 2 bit in IN X'17'
(however, no feedback
check was present).
X'COOO' - the OUT X'Q1'
failed to reset the type 1
C5 level 2 bit in IN X'77'
because a feedback check
was present.
X'8000' - The OUT X'41'
was successful but the
OOT X'47' (force bit
service) failed to cause
a bit service interrupt.

EOOO

1512.

Y462

85305

1-240

Y4P2

R5202

1-240

Y4P2, Y4G2

115305

1-330,
1-240

After setting diagnostic mode
YQG2
via OUT X'42', setting transmit
space via OOT X'43', and then
forcing the scanner to stop
again. an IN X'Q3' indicated
something was not set up
correctly. Beg. X'15'
contains the bits in error:

0904

Byte 0:
Bit 4-Transmit mode failed
to set.
Bit 1-Send data was not
a space.
Byte 1:
Bit 5-Diagnostic mode vas
not set in IN 1'43'.
15SC

OX08

Insure that once the scanner
is stopped. it can be started
again via OUT X'41' and then
stopped again by forcing a
bit service (OUT X'47')
interrupt.

5.0.56 X3705FAA

Either the scanner could not
started again or after
attempting to force the next
bit service interrupt and
waiting the time of a scanner
pass, no bit service interrupt
from the line under test
occurred. Reg. X'11' contains
the line (BCB) address from
~hich bit service was to be
forced. Value of Reg. X'15'
describes the failure:
X'EOOO' - the OUT 1'41'
failed to reset the type
CS level 2 bit in IN X'71'
(however. no feedback
check was present).
X'COOO' - the OUT X'41'
failed to reset the type 1
CS level 2 bit in IN X'77'
because a feedback check
was present.
X'8000' - the OUT X'41'
was successful but the
OOT X'47' (force bit
service) failed to cause
a bit service interrupt.

1-200

Protest error.
Reg. 1'14'
contains the data
received by the
1N 1'43'. Reg.
X'11' contains
tbe line address
under test. Rerun
appropriate
routine as shown
below.

85308

A-340

R5306

A-340

Rerun routine
1511.
Rerun routines
1522 and 1524.

85307

A-340

Rerun routine
153E.

EOOO

1-240

Pretest error.
Rerun routine
1512.

'l4G2

IIS305

Y4F2

R5202

YU2, Y4G2

as.105

A-240

A-330,
BP492

Type 1 Scanner 1FT

o
o

o
o
o

o
o
o
o
o

IBM 3705 CO~~UNICATIONS CONTROLLER
TYPE 1 COftftONICATIONS SCANNER 1FT SYftPTO" INPBX
ROUT. EBBOB FUNCTION TESTED
CODE
158C OXOA Ensure that an OUT X'43'
llith data of all zeroes
has set the tested address
to receive sode.

One scanner pass after the OUT
X'43', an IN 1'_3' indicated
that the line was still set to
trans. it sode. (Byte 0, bit _
vas on.1 Reg. X'14' contains
tbe results of the III X'431.
Reg. X'11' contains tbe tested
line address.

SUSPECTED C1BD
LOCATIOII (sl
Y4G2

PROG
IIASK
0800

PEAt 0

FUll II

PAGE
RS308

l'AGE
A-200

COli II EnS

Pretest error.
Rerun routine
151C.

158C

OXOC

Ensure that when a line is
in receive and diagnostic
sodes, receive data reflects
the status of the test
data latch.

After having set tbe test data 14E2
latcb to a space and turning
the Hne adapter around to
receive mode, an III 1'43'
indicated receive data was set
to a mark, not a space. Reg.
X'14' contains the actual data
received by tbe IN X'43'. Reg.
X'11' contains the tested line
address.

0100

RS105

1-340
A-350

Pretest error.
Rerun routine
158A.

158C

OXOE

Ensure that after issuing
another ODT 1'42' with the
diagnostic mode bit set
(byte I, bit II, the
diagnostic mode bit remains
set.

Now that the test data latch
bas been set, and tbe tested
address set to receive mode,
an OOT X'42' was issued witb
tbe diagnostic mode bit set
in,an attempt to reset tbe
test data latch. 1n IU 1'42'
then indicated that diagnostic
sode bad dropped. ,(Byte 1,
bit 1 vas off.)

0040

BS306

1-160

Test error.
Berun routine
153A. Reg.
X"4' contains
the received
II X'43' data.
If needed,
reg. X',1'
contains the
tested line
address.

158C

01[10

Ensure that once the scanner
is stopped, it can be started
again via OUT X'41' and then
stopped again by forcing a
bit service (ODT 1'47'1
interrupt.

Either tbe scanner could not
started again or after
attempting to force the next
bit service interrupt and
waiting the time of a scanner
pass, no bit service interrupt
from tbe line under test
occurred. Reg. 1'11' contains
."be line (IlFBI address fros
wb'l.cb bit service was to be
forced. Value of Reg. X"5'
describes tbe failure:
I'EOOO' - Tbe OUT X'41'
14G2
failed to reset tbe type 1
CS level 2 bit in IN 1'77'
(however, no feedback
cbeck was presentl.
X'COOO' - !he OD! X'41'
Y4P2
failed to reset tbe type 1
CS level 2 bit in II X'77'
because a feedback cbeck
was present.
X'8000' - Tbe OOT 1'41'
Y4F2, Y4G2
vas successful hut the
OOT J('47' (force bit
servicel failed to cause
a bit service interrupt.

EOOO

A-240

!est error.
Rerun routine
1512.

o

o
o
o
o
o
o
o
o
o

ERROR DESCRIPTION

D9 9- 37 0511- 09

Y4G2

R5305

1-240

R5202

1.-240

B5305

1-330,
A-O_O

158C

ox 12

Before checking to see if
the test data latch was
set to a mark, ensure that
diagnostic mode vas indeed
set in the tested line
adapter.

After allowing a scanner pass
to latch up diagnostic mode in
IN X'43', the diagnostic mode
bit (byte 1, bit 5) in an IN
X'43' was not on.

Y4G2

0004

B5307

A-200

!est error.
Rerun routi nes
153E and 1540.

ISSC

ox 14

Ensure that after setting
the test data latch to a
space, setting diagnostic
mode on any line adapter
will reset it to a mark.

After having set the test data
latcb to a space, turning the
line arcund to receive mode,
and checking that a space was
being received, an OUT X'42'
was issued with the diagnostic
mode bit set. After stopping,
the scanner again at tbe

Y4E2

8000

BS105

A-340
A-350

Test error.
Problem is most
likely near the
test data latcb
itself. If
needed, reg.
X'14' contains
received IN X'43'

Type 1 Scanner 1FT

13705F11 5.0.57

18K 3705 CO"~UNICATION~ CONTBOL~ER
TYPE 1 COllKUllICATIONS SCANNER IFT SYKPTOK INDEX
ROUT. ERnon FUNCTION TESTED
CODE

EnnOR DESCRIPTION

099-3705E-09

SUSPECTED CARD
LOCATION(S)

PROG
MASK

FEALD
PAGE

FETnK
PAGE

tested address. an IN 1'43'
indicated the test data latch
vas not reset to a mark
(receive data, byte 0; bit 0
vas still a space.)

COKHENTS
data and reg.
X'11' contains
the tested Une
address.

15AO

XXXX

Oscillator Speed Test: By stopping the scanner at the tested address, allowing two bit overruns to
occur, the average speed of each oscillator is determined and then examined to ensure that the tested
oscillator has caused strobes to occur within 0.1~ of the oscillator's bit rate.
(The speed of all
installed oscillators is checked on all installed line adapters in both transmit and receive modes,
except autocall adapters. Autocall adapters are checked only with oscillator 0 and in receive mode.)

15AO

OX02

Ensure that force bit
service (OUT X'Q7') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(Yia OUT 1'41') from the line
CBCB) address in Reg. lC'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1 SAO

OX04

Ensure tha t an OUT 1 '42'
has set the selected
oscillator select bits
(aDd ha s eit her set or
reset diagnostic model.

After issuing an OUT X'42' at
Y4G2
the tested line address, an IN
X'42' failed to reflect the
OUT X'42'. Reg. 1'14' contains
the actual data received by the
IN 1'42' and reg. X'15' contains
the bits in error:

RS305

A-330, Pretest error.
A-OQO Rerun routine
1512.

Pretest error.
Herun appropriate
routines as
specified
below. Reg.
X'11' contains
failing line
address is needed.

Byte 0:
set
Bit 6-mode bit
in error.
Bit 7-mode bit 2 set
in error.
Byte 1:
Bit 0-10. priority set
in error.
Bit 1-diag~ostic mode
failed (it should have
set on all tut autocall
adapters).
Bit 2-data terminal ready
set in error.
Bit 3-synchronous ~ode
set in error.
Bit 4-external clock bit
set in error.
Bit 5-data rate select
set in error.
Bit 6-oscillator select
bit 1 failed.
Bit 7-oscillator select
bit 2 failed.

RS304

1-170

Rerun 155Q.

HS304

A-170

Rerun 1554.

R5304

A-110

Rerun 154C.

R5306

1-160

Rerun routines
1531 and 153C.

RS306

A-160

Rerun 1534.

RS306

A-160

Rerun 152C.

IIS306

0\-160

Rerun 1538.

R5306

A-160

Rerun 1530.

RS306

1-160

RS306

A-160

Rerun routines
1542 and 1544.
Rerun routines
1546 and 1548.

15~0

OX06

Ensure that an OUT X'43'
has set transmit or rec~ive
mode.

After issuing an OUT X'43' to
the line under test, an IN
1'43' indicated that the
transmit mode bit failed to
set or reset. Reg. X'14'
contains the received IN
X'43' data. The transmit
mode bit (byte 0, bit 4)
should have been the opposite
of what it was.

yQG2

0800

R5308

A-200

Pretest error.
Rerun routines
1511 and 151c.

15AO

OX08

Ensure that bit overrun
can be set in the l i ne
adapter under test.

After waiting up to 60 milliseconds (the scanner is still
stopped at the tested address)
no bit overrun occurred. Reg_
X'll' contains the line
address under test.

Y4G2

0001

R5308

0\-200

Pretest error.
Rerun routine
1588.

5.0.58 X3105FAA

Type 1 Scanner 1FT

o

o
o

IBK 3705 COftMUNICATIORS CONTROLLBR
TYPE 1 CO"ftUHICATIOHS SCANNBR 1FT SYftPTOft INDBX
ROUT. ERROR FURCnOIl TESTED
CODE
15AD OIOC Ensure that bit overrun
can be set in the line
adapter under test.

0
0
0
0
0
0
0

PBOG
USK
0001

rEAtD

rBTU

PAGE
85308

PAGB
&-200

COli IIBHT S
Test error.
Rerun routine
1588.

OXOE

Bnsure that IIhile lIeasuring
the oscillator speed, as
eacb bit overrun occurs, it
can be reset.

Following a bit overrun, OUT
X'44' IIitb byte 1, bit 7 on
was issued to reset tbe overrun. An I I X' 43' t ben indicated tbe overrun was not
reset. Reg. X'11' contains
tbe line address under test.

14E2

BS105

A-300

Test error.
Berun routine
1588.

15AO

OX 10

Before checking tbe
oscillator's average speed,
ensure that all five
overruns occurred.

After waiting a maxisus amount
of time, less than five bit
overluns occurred.

Y4G2

BS308

A-200

Test error.
Problell is
probably interaittent. Berun
and loop on
routine 1588.
(If needed,
byte 0 of reg.
X"4' contains
the nUllber of
overruns tbat
were not
received.)

151.0

OX12

Ensure tbat no oscillator
is running too aloll.

The aaount of tine it took
five bit overruns to occur was
greater than 0.11 lore than
IIhat it sbould have taken.
Beg. X'11' contains the tested
line address. Byte 1, bits 6
and 1 of reg. 1'16' indicate
the oscillator under test (00,
01, 10, or 11 are the first,
second, third, or fourth
OSCillators, respectivelyl.
If byte 0, bit 4 of reg. X'16'
is on, tbe tested address was
in transait sode. If not, it
was in receive lIode.

nU2-for tbe
first and
second
oscillators.
Y4J2-for tbe
third and
fourth
oscillators.

RS402

Tbe asount of time it took
nU2-for tbe
five bit overruns to occur lias
first and
second
greater tban 0.1. les. than
what it should have taken.
oscillators.
Reg. X'11' contains tbe tested YQJ2-for the
line address. syte I, bits 6
third and
and 7 of reg. x'16' indicate
fourtb
tbe oscillator uoder test (00,
oscillators.
01, 10, or 11 are tbe first,
second, tbird, or fourtb
oscillators, respectivelyl.
If byte 0, bit 4 of reg. X'16'
is on, tbe tested address was
in trans.it mode. If not, it
was in receive aode.

RSII02

U
0
'5AO

OXl4

Ensure that no oscillator
is running too fast.

o

o
o

After waiting up to 60 silliaeconds (the scanner is still
stopped at the tested address I
no bit overrun occurred. Reg.
X'11' contains the line
address under test.

SUSl'BCTED CABO
LOCATION (S)
UG2

15AO

,

o

BRROB DESCRIPTION

D99-3705B-09

BSII03

115403

Test error.
problem lIay be
in tbe CS, LlB,
or line adapter.
(See General
COlllents, 13.1

Test error.
problell say be
in the CS, 1.IB,
or line adapter.
(See general
couents, f).)

15A2

XXXX

Interrupt aode 01 (Test .11: Ensure that interrupt mode 01 allolls bit service level 2 interrupts from the
tested line address when data set ready is active for at least one bit tille by forcing data set ready
up with diagnostic lode. (This test is run on all installed non-autocall line adapters, in turn. It
does not check tbat aode 01 will prewent level 2 interrupts when data set ready and ring indicator are
inactive·1

15A2

0101

Bnsure tbat force bit
service (OOT X'47'I causes
a bit service interrupt froll
the line address under test.

Type 1 Scanner 1FT

After attempting to force a
14F2, Y4G2
bit service level 2 interrupt
(via OUT X'47'I fros the line
(BCSI address in Beg. X'11',
unlasking level 2 interrupts and

R5305

A-330, Pretest error.
A-OliO RerUn routine
1512.

X3705FU 5.0.59

IBft 3705 COftnUNIC1TIOHS CONTROLLBR
TYPE 1 COftftOnICaTIOHS scaRKBR 1FT SYftPTOa IHPBX
ROUT. BaaOI rUHCTIOn TISTBD
COOl

BBBOI DBSCRIPTION

5U5ncnD ClIO
LOC~TIOH (a)

PIOO

After stopping the scanner at
the tested address and issuing
an OUT X'42' to set the proper
aodes, an IH X'42' indicated s
failure to do so. Reg. X'14'
contains the data received h)'
the II 1'42'. leg. 1'15'
contains the bits in error:
Byte 0:
Bit 6-sode bit 1 falled
to set.
Bit 7-a04e bit 2 tliled
to set.
Byte 1:
Bit O-lov priority set
in error.
Bit 1-diagnostic lode
flUed to set.
Bit 2-data terlinal
ready set in error.
Bit 3-synchronous aode
set in error.
Bit 4-external clock
set in error.
Bit 5-4ata rate select
set in error.
Bit 6-osoillator select
bit 1 set.
Bit 7-oscillator select
bit 2 set.

t4G2

03PP

Ensure that tile first
oscillator can create a
strobe and cause a bit
service level 2 interrupt
fron the tested line.

After having set nonitor node
11 to allov nornal bit service
requests, selecting oscillator
0, starting the scanner and
vaiting up to 30 li11iseoonds
for' a bit servioe level 2
interrupt fro. the line uuder
test, none occurred.

I4H2

Bnsure that the tested line,
as a result of having been
reset and of having sat
diagnostic .ode, is in
receive node, diagnostic
.ode, and that data set
rea"y is on.

After having reset tbe scanner, 14G2, 14E2
setting diagnostic node, and
alloving a bit service interrupt,
an IV 1'43' indicated that
the expected conditions vere
not .et,. Beg 1'14' contains
tbe data received b1 the IH
X'43' and reg. 1'15' contains
the bits that were in e~~or:

vaiting the tiae of a scanner
pass, no bit service interrupt
occurred froa that line.
lS~2

15&2

15A2

OX02

OXO:l

OXO'

P9!1-3'10!il-09

Be£pre continuing, ensure
that the tested line has
been set to diagnostic
.ode and nonitor .ode 11.

ft~SK

OX05

Bnsure that an OUT X'42'
bas set .onitor sode 01,
and bas kept diagnostic
aode set.

5. O. 60 X3705l'A1

PET""
P~QI

1-150

COUJlNTS

f~etest e~ro~.

Beg. 1'11'
contains line
address under
test. Berun
the appropriate

C)

~outine.

Hhile the scanne~ was stopped
t4G2
for the prior bit service, an
OU~ X'1I2' vas issued to set
the prope~ lodes. An 1M 1'42'
then indicated that tbe p~ope~
bits vere not set or otbe~ bits
were set in er~or. Beg. X'14'
contains the actnal data
received by the II X'42 1 and

85304

A-170

Bs~un ~out1ne

BS304

1-170

15111!.
Berun routine
1552.

B5304

1-170

BS306

A-160

BS306

&-160

IS306

1-160

BS306

a-160

a5306

1-160

IS306

&-160

aS306

1-160

BS401

1-Q~0

0824

Byte 0:
Bit '-t~ansnit lode bit
was on~
Byte 1:
Bit 2-data set ready vas
not on (the bit 1n I.
X'43' vas on).
Bit 5-diagnostic .ode vas
not on.
15A2

PIALD
P&GI

03PP

A-200

Berun ~outines
1516,15I1A, & 154c.
Berun routine
153A.
Be~un ~out1nes

1516,1532, 6 1534.
Rerun routines
1516,1521, 6 152C.
Berun routines
1516,1536, & 1538.
Berun ~outines
1516,1521, 6 1530,.
Berun rontines
1516,1542, & 15411.
Be~un routines
1516,~546, 6 15118.
Pretest error.
Berun routine
1580.

fretest error.
Berun appropriate
~out1nes as
given. If
diagnostiC lode
was in error,
ignore data set
ready e~ror.
If needed,
~eg. 1'11'
contains 'line
(BCB) address
unde~ test.

BS308

Berun
151C.

~outine

BS307

Be~un

routine

15307

Berun routine
153!.

1518.

1-150

<. /

(

--"

Pretest error.
Berun appropriate
~outines as
specified belovo
If needed, reg.
X'1 1 I contains
the line address
under test.

!ype 1 Scanner Il!

(}

o

o
o
o

IBM 3105 CO~MQNICATIONS CO "TROLLER
TYPE 1 coaKUNlcATIONS SCANnER 1FT SYKPTOK INDEX
ROOT.

ERROR FUNCTION TESTED
CODE

reg. X'15' indicates tbe bits
in error:
Byte 01
Bit 6- mode bit
tailed
to reset.
Bit 7-lIIode bit 2 reset
in error.
Byte 1:
Bit O-low priority set
in error.
Bit I-diagnostic wrap
lIIode reset.
Bit 2-data terminal ready
set in er.ror.
Bit 3-syncbronous mode
set in error.
Bit II-external clock M.t
set in error.
Bit 5-data rate select
set in error.
Bit 6-oscillator select
bit , set.
Bit 7-oscillator select
bit 2 set.

o

o
o
o
o
o

ERROR DESCRIPTION

SUSPECT ED CARD
LOCATION IS)

PROG
IIASK

FEUD
PAGE

FETn!!
PAGE

COIIIIEHTS

119304

A-170

I1S304

A-170

11erlln rout1ne
1550.
Rerun routine
1552.

1153011

1-110

115306

A-160

85306

11-160

115306

1-160

115306

A-160

R5306

A-160

R5306

A-160

115306

11-160

115305

,--040

lIerun routines
154A and 15QC_
Rerun routines
15311 dna lSlC.
lIerun routines
1532 and 1534.
Reron routines
1521 and 152C.
Rerun routines
1536 and 1538.
Rerun routines
152E and 1530.
Rerun routines
15112 and 1544.
Berun routines
1546 and 1548.

1JA2

OX06

Ensure that monitor mode
01 allows an interface
service request to cause
a level 2 interrupt when
data set ready is active.

lSh4

XXXX

Interrupt Kode 01 (Test .21: Ensure that interrupt mode 01 allows bit service level 2 interrupts from
the tested line address if data set teady or ring indicator are active for at least one bit tiae.
After setting monitor mode 11 and allowing a normal service request, a cbeck 1s made to see if
data set ready or ring indicator happen to be up on the tested address. If either is up, the
tested line address is set to mode 01 and a test made to ensure that a bit service interrupt occurs·
from that line. If not, the test is bypassed on this address. (This test is run on all installed
non-autocall line adapters, in turn.)

o
o

15A4

OXOI

Ensure that force bit
service (ODT 1'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OOT X'411) from tbe line
(SCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit servica interrupt
occurred from that line.

o
o

15A4

Ensure that an OUT X'42'
has set mode 11 and has
properly selected an
oscillator.

After stopping the scanner and
issuing an OUT 1'42', an IN
1'42' indicated that mode 11
was not set or the proper
oscillator select bits were
not set (or other bits vere
set in error). Reg. X'14'
contains the actual data
received by the IN X·~2'.
Reg. 1'15' contains the bits
in error:
Byte 0:
Bit 6-mode bit
failed
to set.
Bit 7-mode bit 2 failed
to set.
Byte 1:
Bit O-low priority set
in errot:.
Bit 1-diagnostic wrap
mode set in error.
Bit 2-data terminal ready

u
o

OX02

Type 1 Scann er IFT

o

After having forced data set
ready up via diagnostic mode,
settir.g monitor mode 01, and
waiting one bit time, no
level 2 interrupt occurred
from tbe tested line address.

1l99-3705E-09

YIIG2

Y4G2

IIS305

Test error.
Problem probably
lies within
the CS.
iSee
General Comments,
13. ) Reg X'11'
contains tbe
line address
under test.

A-330, Pretest error.
A-OliO Rerun routine
1512.

A-150

Pretest error.
Rerun routines
speCified below.
Reg. X'11'
contains the
line address
under test.

R5304

A-110

R5304

A-\70

Rerun routine
154E.
lIerun routine
1552.

R5304

A-170

R5306

1-160

R5306

1-160

03FF

Rerun routines
154A and 154C.
Rerun routines
1531 and IS3C.
Rerun routines

X37 05 FAA 5.0.61

I

IBft 3705 COKftUNIC1TIO"S CONTROLLER
TYPB 1 COft"UPIC~TIONS SCAN HER 1FT SyftPTOft INDEX
ROUT. BBBOR FUNCTIOH TESTED
CODa

1l99-3705E-09

BBROR DBSCRIPTIO.
set in error.
Bit, )-synchronous sode
set in error.
Bit 4-externa1 clock bit
set in error.
Bit 5-data rate select
bit set in error.
Bit 6-osci1lator select
bit 1 failed to set or
vas set in error.
Bit 1-oscillator select
bit 2 failed to set or
vas set in error.

I

SUSPECTED CABD
LOCATION Is)

1514

OX03

Bnsure that the first
oscillator can create a
strobe and caused a bit
service level 2 interrupt
fro. tbe tested line.

After having set sonitor sode
11 to allow norsal bit service
requests. selecting oscillator
O. starting the scanner and
waiting up to 30 lilliseconds
for a bit service level 2
interrupt fros the line under
test, none occurred.

1482

15A4

OX04

Ensure tbat sonitor SOde
01 bas been set at the
line address under test.

After finding data set ready
or ring indicator on at the
tested address, an OUT X'42'
vas issued to set 80de 01.
ln lR 1'42' then indicated
80de 01 vas not set. If
byte 0, bit 6 of reg. 1'15'
is on, mode bit 1 failed to
reset. If bit 7 is on, sode
bit 2 failed to set.

Y4G2

15A4

OX05

Ensure that ring indicator
or data set ready are still
active on the tested line
address.

Caution: ~his lay not
actually indicate a hardware
failure. Before vaiting for
an interrupt, data set ready
or ring indicator was actiYe.
How. after waiting for the
interrupt, neither is active,.
Conditions on tbe line
connected to the line adapter
under test bave cbanged. ~his
invalidates error code OX06
which you should get after
this failure.

15A4

OX06

Bnsure that sonitor 80de
01 allolls an in'terface
service reques1i to cause
a 1eyel 2 interrupt vben
data set ready or ring
indicator are active.

After baving found ring
indicator or data set ready
actiYe, setting lonitor lode
01. and vaiting a bit tise,
no level 2 interrupt occurred
fros the tested line address.

15A5

XXXX

PROG
BASK

FEALD
PAGE

FETaB
PAGB

aS306

A-160

B5306

1-160

R5306

1-160

B5306

1-160

BS306

A-160

B5401

0300

COB"EHTS
1532 and 1534.
aerun routines
1521 and 152C.
Rerun routines
1536 and 1538.
Rerun routines
152E and 1530.
Berun routines
1542 and 1544.
Berun routines
1546 and 1548.

,,-

/

"

Pretest error.
Berun routine
1580.

B5304

1-170

Pretest error.
Rerun routines
1S4! through
1554. If
needed. reg.
X'11' contains
the line address
under test.

NOHE

lion

ROllE

Test error.
If it is desired
to find out vhat
conditions on
the line have
Changed. display
reg. 1'15'. Byte
1, bit 1 on
indicates ring
indicator has
dropped. Byte 1,
bit 2 on indicates
data set ready
bas dropped.
Reg. X'11'
conUina the
line address
under teSt.

14G2

RS305

A-OqO

Test error.
Proble. is lost
probably io the
CS. (See General
COlsents, '3.)
If needed, the
tested line
address ..y be
found in
reg. 1'11'.

Interrupt Kode 010: Ensure that looitor sode 010 prevents level two interrupts
when either data set ready or ring indicator are active. After resetting the scanner,
setting the tested line address to diagnostic lode and lode 011, and ensuring that
an interrupt does occur (data set ready is active because of diagnostic lode), lov
priority is reset (thus lode 010 is set) and a test lade to ensure that no sore interrupts
frol that line occur. (~bis test vill be run only on the first installed non-auto call adapter
found.)

5. O. 62 X3705FAA

,~

Type 1 Scanner 1FT

/'

I

,

'

""""--------~.-..,.,

0
0
0
0
0
0
0
0
0
0

IBR 3705 CORRUNlCAfIORS COHfBOLLIR
TtPI 1 CORBUHICAfIONS SCAHIIR ,1FT StRPfO" lllDI!I
IIDUT. BRBOR FUNCtION TISTID
COOl
15A5 0101 Ililu. thai forc.
bit •• r,loo COUf X'q,',
OIU.O. • bit .or,10.
htotnpt trill

thl ltn. add,I ••

uhdaf hill.

1515

OX02

Dnsur. that an 0 UT
X'II2' hal soi
1104. 01 an4 has
prop.rly select.4
lov priority and
diagnoltic m04e.

0
i

"

0
0
0
0
0

15A5

OX03

Bnsure tbat once the scanner
is stopped, it can be started
again via OUT X'41' and then
stopped again by forcing a
bit service (OOf X'47'\
interrupt.

e
e

e
e
e

15A5

OX04

Ensure that the tested line,
as a result of having been
reset and of having set

Type , Scanner Il'T

D99- 37 05B- 09

BaIlOB DBSCaIP'ZIOII
Attar atto.pting to
toroo a bit 80rv1co
lavol :2 1nterrupt ,vl.
OUT X'/f"'1 trQI tho Un.
I"~"'

SUSl'BCfID CARD
LOCUION(s,
¥IIF2, nG2

nOG
USK

FBALD
P1GB
BlI305

l'IlT""
PlGB
&-330

a-oqo

COIIRl"fS
Pretest el:l:ot.
1I0nn routhe
1512.

tddr ••• in RMq

1 ' 11 ' , uOlutllll1f1l1 lUII1

~ intettupts and .aiting
the tile of a scannet
pass, no bit setvice
intorrupt occurred frol
tlie Une.

after stopping the scanner
at the to.ted a4drosl and
111u1ng an OUT 1'112' to
I.t tho proplr 10401,
an IN 1'42' indicate4
that bits faile4 to set
or bits set in error
Beg X'1_' contains the 4ata
received by tbe IN X'42'
Beg X'15' contains tlie bits
in error:
Byte 0:
Bit 6 - 104e bit 1 Bet
in error.
Bit 7 - lode bit 2 failed
to set.
8yte 1:
Bit 0 - low priority
failed to set.
Bit 1 - diagnostic lode
faUed to set.
Bit 2 - data terllinal
ready set in error.
Bit 3 - synchronous
lode set in error.
Bit 4 - external clock
set in error.
Bit 5 - data rate
select set in error.
Bit 6 - oscillator select
bit 1 set in error.
Bit , - oscillator select
bit 2 set in error.

R93011

A-FO

R53011

A-170

BS3011

Rerun routine
1511& and 154C.
Berun routine
1531 and 153C.
1-160 Berun routine
1532 and 15311.
A-160 Rerun routine
152A and ,52C.
A-'60 Berun routine
1536 and 1538.
1-160 Berun routine
152! and 1530.
1-160 Berun routine
15112 and 15411.
A-16Q Rerlln routine
15116 and 15118.

RS306
B5306
115306
85306
85306
BS306
RS306

Bither tbe Bcanner could not
started again or after
attempting to force the next
bit service interrupt and
vaiting tbe tiae of a scanner
pass, no bit service interrupt
frol the line under test
occurred. Beg. 1'11' contains
tbe line (BCB) address froll
wbich bit service vas to be
forced. Value of Beg. X'15'
describes the failure:
YIIG2
X'BOOO' - 'be OOf X'1I1',
failed to reset the type ,
CS level 2 bit in IN X'77'
(however, no feedback
check vas present).
'l41'2
X'COOO' - '.the aUf X'II1'
failed to reset the type 1
CS level 2 bit in IN X'~7'
because a feedback check
vas present.
Yfll'2, Y4G2
1'8000' - the ODT X'"''
vas successful but tbe
00'.t X'/I7' (force bit
service) failed to cause
a bit service interrupt.
After having reset tbe
scanner, setting diagnostiC
lIode, and allowing a bit

Pr.test .rror.

1402

YIIG2

Rerun routine
1550.
Berun routine
1552.

A-170

A-160

lire test error.
Rerun routine

BOOO

151~.

00211

BS305

A-240

RS202

A-240

BS305

A-330,
A-040

RS307

A-200

Pretest error.
Rerun appropriate
routine~ as given.

X3705l'AA 5.0.63

.........

IBM 3105 COMMUNICATIONS CONTROLLER
TYP& I COftftUNICATIONS SCANNER 1FT SYMPTOM INDEX
ROUT,~

ERROR FUNCTION TESTED
CODE
diagnostic mode is in
diagnostic mode, and that
data set ready ,is on.

ERaOR DESCRIPTION

D99- 3105E-09

SUSPECTED CARD
LOCATION(S)

Ensure that monitor mode
01 allows an interface
service request to cause
a leyel 2 interrupt when
data set ready is active.

After having forced data set
ready active by setting
diagnostic mode. setting
monitor mode 01, and waiting
a bit tille, no level 2
interrupt occurred from
the tested line address.

Y4G2

15A5

Olt06

Ensure that an OOT X'Q2'
has set 1I0nitor 1I0de 01,
and has kept diagnostic
1I0de set.

While the scanner was stopped
for the prior bit service, an
OUT X'42' vas issued to set
the proper modes. An IN X'Q2'
then indicated that the proper
bits were set or other bits
wete set iD error. Reg. 1"4'
contains the actual data
received by the IN 1'42' and
Reg. X'15' indicates the bits
in error:
Byte 0;
Bit 6 - mode bit
set in error.
Bit 1 - m~de bit 2
failed to set.
Byte 1;
Bit 0 ...' 10v priority
set in error.
Bit 1 - diagnostic wrap
1I0de reset in error.
Bit 2 - data terminal
ready set in error.
Bit 3 - syncbronous
mode set in error.
Bit 4 - external clock
bit set in error.
Bi t 5 - data rate select
set 1n error.
Bit 6 - oscillator select
bit , set 1n error.
Bit 1 - oscillator select
bit 2 set in error.

YQG2

'~A5

OX08

FET~~

COHftEN~S

PAGE

A-040

Pretest error.
Problem is most
probably in the
CS. Rerun
routine 1512.
If needed, the
tested line
address lIay be
found in
reg. X',1'.

A-'sO

Pretest error.
Berun appropriate
routines as
specified below.
I f needed, reg.
1"" contains the
line address
under test.

R5304

A-110

RS304

A-'70

Rerun routine
1552.
Rerun routine

RS30s

01110

1550.

RS3011

1-110

RS306

A-160

RS306

A-160

RS306

1-160

RS306

1-'60

RS306

A-160

Rerun routines
lS4A and 1s4C.
Rerun routines
153A and ls3C.
Berun routines
1532 ana 1534.
Berun routines
152A and 152c.

Ensure that force bit
service (OUT 1'41')
causes a bit service
interrupt from the
line address under
test.

After attempting to force a bit Y4r2, Y4G2
service level 2 interrupt (via
OUT X' 47') from the line
address in Reg« X' 1 l' unmasking
level 2 interrupts and waiting
the time of a scanner pass, no
bit service interrupt occurred
frOID that line.

Ensure that the line
tested is still set to
diagnostic mode and
data set ready is
still active.

With the scanner stopped at
the tested address, aD IN
1'43' indicated ODe of the
following conditions existed
as described in reg. X"s';
Byte 1:
Bit 2 - data set ready
f ailed to set.

5.0.64 X3105FAA

FEALD
PAGE

If diagnostic
mode was in
error, ignore
data set ready
error. If
n eedeil, reg.
X'11' contains
line address
under test.
Rerun routine
1578.
Rerun routi ne
IS3E.

OX05

OX01

~ASK

service interrupt, an IN
X'q)' indicated that the
expected conditions were not
lIet. Reg. X'14' contains
the data received by the
IN X'43' and reg. X'ls'
contains tbe bits that were
in error;
Byte ,;
Bit 2 - data set ready
was not set.
Bit 5 - diagnostic
mode was not set.

15A5

1515

PROG

Y4G2

RS306

A-t60

R5306

1-'60

RS305

A-330
A-OliO

Rerun routines
1536 and 1538.
Berun routines
152E and 1530.
Rerun routines
1542 and 1544.
Rerun routines
1546 and 1548.
Test error.
Rerun routine
'512.

0024

RS307

A-200

Test error.
Rerun appropriate
routines as
indicated below.
Berun routine

1516.

Type 1 Scanner 1FT

o
o
o
o
o
o
o
o

1 £5tl.

nG~ CL'{~~IJ!HCATIOWi CONTROtLER
CO~"UNICATIONS SCANNER 1fT SIHPTOM

IIPE !
BoaT ..

BaHDn

I"UNCTION 'l'ESTBD

[)99- 3705£-·09

INDEX
ERBOR DESCRH1'10N

SUSPECTED CARD

CODE

LOCATION (s)
Bit 5

di'lgno~tiG

PROG
HASK

FEAJ.D
PAGE

FETMM
PAGE

frtiled to S€t.
Reg. X'14' contains the received
IN X'43' data and reg. X'11'
contains the tested address.
15A5

0109

Ensure that a bit
level 2 interrupt
prevented if mode
been set and data
ready is actue.

15A6

XIXX

Interrupt no do 10 (Test BI): Ensure that intorrupt reode 10 prevents normal bit service requests from
interrupting aud that they a~H reset while recei,ing a mark. Also, ensure that as soon as a space
is received, a normal bit service reguest can cause a bit service level 2 interrupt. After ensuring
that the tested line address can caase a bit service interrupt while in monitor mode 11 and that
diagnostic mode has forced data sot toady up, monitor mode 10 is set. The routine then waits a
total of two bit tiwes. Since receive data bas been a steady mark (via setting diagnostic mode) no
interrupt should OCcur from the line under test and since mode 10 services bits while monitoring,
no overrun should be indicated. 'rhe tested address is then set to transmit mode just long enough
to set the test data latch to a space. The line is then set back to receive mode and a cbeck made
to ensure that mode 10 allows an interrupt as soon as a space is received.
(This test is rUD aD all
installed line adapters, except autocall, in turn.)

OXOI

Ensure that force bit
service (OUT X'47-) Cd uses
a bit service interrupt from
the line address under test.

After attempting to force a
14F2, Y4G2
bjt service level 2 interrupt
(via OUT X'47') from the line
(BCE) address i 1\ Reg. X' II' ,
unmasking level 2 intecrupts and
waiting the timo of a scanner
pass, no bit service interrupt
occ'lITed from tha t line.

Defore continuing, ensure
that the testod line ha~
been set to diagnostic
mode and monitor mode 11.

Aftar stopping the scanner at
the tusted address and issuing
an DOT X'42' to set the proper
modes, an IN X'42' indicated a
failed to do so. Reg. X'14'
contains the data received by
the IN X'42'. Re9. X'15'
contains the bits in error:
Byte 0:
Bit 6-mode bit
failed
to set.
Bit 1-mode bit 2 failed
to set.
Byte 1:
ait O-low prlority set
in error.
Bit 1-diagnostic mode
failed to set.
Bit 2-data termin&l
ready set in error.
Bit 3-synchronous mode
set in error.
nit ~-external clock
set in error.
Bit 5-data rate select
set in error~
Bit 6-oscillator select
bit 1 set.
Bit 7-oscillator select
bit 2 set"

14G2

After baving set monitor mode
'1 to allow normal bit service
requests, selecting oscillator
O. starting the scanner and
waiting up to 30 milliseconds
for a bit service level 2
interrupt from the line under

14H2

'U

15A6

service
is
010 has
set

COMIIENTS

Rerun routlne
1538.

mode

J,

After having set mode 010 and
data set readr, unmasking
level 2 interrupts and waiting
at least one bit time, an
interrupt did occur and should
not have.

RS305

Y4G2

RS305

A-040

Test error.
Problem probably
lies in the CS.
If n£eded, reg.
X"1' contains the
11 ne dddress
under test.

A-330, Pretest error.
A-040 Rerun routine
1512.

"

"

"

15~6

0102

o
o
o

o
o
o

o
o
o

15A6

Typ~

0103

Ensure that the first
oscillator can create a
strobe and caused a bit
service level 2 interrupt
from the tested line.

1 Scanner 1FT

A-150

Pretest error.
Reg. X'11'
contains line
address under
test. Rerun
t he appropriate
routine.

RS304

A-170

R5304

A-110

Rerun routine
154E.
Rerun routine
1552.

031'1'

RS304

A-170

RS306

1-160

R5306

A-160

RS306

11-160

RS306

1.-160

R5306

A-160

RS306

A-160

RS306

A- 160

RS401

Rerun routines
1516,154A, & 154C.
Rerun routine
153A.
Rerun routines
1516,1532, & 1534.
Rerun routines
1516,162A, & 15 2C.
Rerun routines
1516,1536. & 1538.
Rerun routines
1516,162E, & 1530.
Reron routines
1516,1542, & 1544.
Rerun routines
1516,1546, & 1548.
Pretest error.
Rerun routine
1580.

X310SFAA 5.0.65

ISH 3105 cOKnUNICATIONS CONTBOLLED
TYPE 1 COftKUHICAtIONS SCAN HER 1Ft SIHPTOn INDEX
BOUT. ERBOB PUICtION TEStED
CODE

099-31 05E-09

ERROR DESCRIPTION
test, none occurred.

15A6

OIOij

That after having set the
tested line address to
diagnostic aode, the
expected conditions have
been set to,continue the
test.

Ensure that an OUT X'Q2'
has set Dlonitor aode 10,
and has kept diagnostic
lIIode set.

PROG
"ASK

PEAtD
PAGE

PETHft
PAGE

After having done nothing but
set diagnostic 1I0de a'nd allowed
an interrupt fro. the tested
line, an IN X'_3' indicated
other than the proper conditions.
Reg. X'14' contains the received
IN X'43' data and reg. x'15'
contains the bits in error:

Byte 0:
Bit O-receive data was
not set' to a mark.
Bit 4-the line vas in
transmit aode.
Byte 1:
Bit 2-data set ~eady
was not set.
Bit 5-diagnostic aode
failed to set.
15A6 ,OX05

SOSPECTED CARD
LOCATION(SI

Pretest error•.
Berun appropriat~
routines as
indicated below.
(If diagnostio,
mode failed,
ignore the
receive data and
dat a set ready
failures.) If,
nEeded, reg.
X'11' conta ins
the tested
line addre$s.

1482

a5 105

t4G2

R5307

While the scanner was stopped
Y4G2
for the prior bit service, an
OUt X'42' was issued to set
the proper DIodes. An 1M X'42'
then indicated that the proper
bits vere not set or other bits
were set in error. Reg. X'14'
contains the actual data
received by the IN X'42' and
reg. X'15' indicates the bits
10 error:
Byte 0:
Bit 6-lode bit
failed
to set.
Bit 7-mode bit 2 set
in er~or.
Byte 1:
Bit O-low priority set

A-200

B5307

A-200

8S301

1-200

03F!

Bit l-diagnostic wrap
mode reset.
Bit i-data terminal ready
set in error.
Bit 3-synchronous mode
set in error.
Bit 4-external clock bit
set in error.
Bit 5-data rate select
set in error.
Bit 6-oscillator select
bit 1 set.
Bit 1-oscillator select
bit 2 set.

1~A6

OX01

OX08

Ensure that force bit
service (OOT X'Q1') causes
a bit service interrupt from
the line address under test.

Ensure tbdt any overrun
that may have existed
before starting the test,
have been reset by an
'OUT X' 44'.

5. 0.66 X3705PAA

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OOT X'47'1 fro a the line
(aCBI address in Reg. X'''',
unaasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred f~om that line.
After an OUT X'44' with byte
" bit 1 on, an IN X'43' still
indicated a bit overrun. Beg.
X' 14' contains the results of
the IN X'43' and reg. X'11'
contains the line address

l482

Rerun rout! ne
158C.
Rerun r'outine
151C.
Berun routine'
1578.
Rerun routine
153E.

1-150

Pretest error.
Rerun appropriate
routines as
specified below~
If needed, reg_
X'11' contains
the line address
undet test..

Rerun routine
1550.
Retun routine
1552.

RS304

A-170

RS304

1-170

B5304

A-l10

RS306

A-160

RS306

A-160

RS306

1-160

R5306

A-160

B5306

A-160

B5306

A-160

RS306

A-160

RS305

A-330, Pretest error.
A-040 Reran routine
1512.

in error ...

15A6

COftMENTS

Rerun routines
154A and 154c.
Rerun routines
153A and 153c.
Rerun routines.
1532 and 1534.
Rerun routines
1521 and 152C.
Berun routines
1536 and 1538.
Rerun routines
152E lind 1530.
Rerun routines
1542 and 1544.
Rerun routines
1546 and 1548.

,

/

,

-'

\,

/

/

,

.j

~-_/

/

0001

RS105

A-300

Pretest e.ror.
Rerun routine
1588.

Type 1 Scanner IFr

o
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o

o
o
o
o
o
o

IBM 3705 COMftONICATIO"S CQNTROLLER
TYPE 1 COftKOHICATIOHS SCANNBR 1FT SY"~TO" INDEX
ROUT. BRROR FUNCTION TESTED
CODE

under test.

SUSPECTED CARD
LOCATIOH(S)

PROG
RASK

FEALD
PAGE

FETRR
PAGE

COR RENTS

Test error.
Problem probably
lies "ithin the
CS, however if
needed, reg.
X'11' contains
tbe line address
under test.
(See General
COllents, 13.)

15A6

OX09

Ensure that while receiving
a mark, a line set to
monitor lode 10 does not
cause any level 2 interrupts.

After baving set tbe tested
YQG2
line to lode 10, and ensuring
that a mark vas being received,
a level 2 bit service interrupt
was received fro. that line.

85305

1-040

15A6

OXOA

Ensure tbat force bit
service (OUT X'Q7') causes
a bit service interrupt frol
tbe line address under test.

After attempting to force a
YQF2, YQG2
bit service level 2 interrupt
(via OUT I'Q7') fro. the line
CBCB) address in aeg. X'11' ,
un.asking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred frol that line.

85305

A-330, Pretest error.
A-040 Rerun routine
1512.

15A6

OXOB

Bnsure that tbe hardware
services bits wbile in
lonitor lode 10 (i.e. as
long as a lark is being
received, bit service
requests are reset.)

After waiting two bit times
YQG2
while in lonitor lode 10 and
·receiving a lark, and no level
2 interrupt occurring, a bit
service interrupt was forced.
An IN 1'43' should then have
indicated no bit overrun
(hardware should service the
bits) but did (or other
conditions were in error).
Reg. X'1Q' contains tbe results
of the IN X'Q3' and reg.
X'15' contains the bits in
error:
Byte 1:
Bit 2-data set ready
etroneollsly dropped,.
Bit 5-diagnostic lode
hIlS dropped.
Bit 7-a bit overrun has
occurred.

RS305

1-040

Test error.
Probl .. is
probably in the
CS, however if
needed, reg.
x'l1' contains
the line address
under test.
(See General
Couents, '3.)
If data set
ready or
diagnostic aode
are in error,
ignore the
overrun failure
and rerun
rOlltines 1518
and 153!,
respectively.

OIOC

Ensure that after att8llpting
to set tbe test data latch
to a space to continue tbe
the test, tbe proper
conditions bave been set.

A-200

Test error.
Although this
has been
designated as a
test error,
each functic;m
has been ,
previously
cbecked. Rerun
the appropriate
routines as
given belovo If
neeiled, r,g.
X'11' contains
the line address
under test.
Rerun routine
151C.
Rerun routine
152Q.

o
o
o

ERROR DESCRIPTION

D99-3705B-09

15&6

o
o
o

Type 1 Scanner 1FT

0925

After setting the tested
address to trans.it lode,
setting send data to a space,
resetting trans lit lode, and
resetting any possible bit
overruns, an IN X'43' indicated
the proper conditions to
continue bad not been set. Reg.
X'14' contains the results of
of the IN X'43' and reg. X'15'
contains the bits in error:

Byte 0:
Bit 4-transait mode bit
"as not reset.
Bit 7-send data latch
(and thus the test data
lat~h) was not reset
(space).
Byte 1:
Bit' 2-data set ready
dropped (ignore if bit
5 is on).
Bit 5-diagnostic lode
dropped.
Bit 1-any possible bit
overrun was not reset.

0025

Y4G2

85308

A-180

Y4G2

85308

1-180

Y4G2

R5307

A-180

Rerun routine
1518,

14G2

85307

1-180

Y.E2

RS105

1-1BO

Rerun routine
153E.,
Rerun routine
158B.

X3105FU 5.0.67

1l
,J;

16K 3705 COKnUNIC1TIONS CONTROLLBR
TYPE 1 CO"KUNICATIONS SCANNER 1fT SYMPTOM INDEX
ROUT. ERROR PUNCTION TESTED
CODE
1516 0100 Ensure t ha t vhen a line
adapter set to monitor
mode 10 receives a space,
a level 2 interrupt can

ERROR

DE5CRI~TION

The tested line address failed
to interrupt while receiving
a space in mode 10.

SUSPECTED CARD
LOCATION (sl
Y4G2

PROG
"ASK

FEAtD

PAGE
RS305

PETIIII
PAGE
A-040

occur.

15A6

OXOB

Ensure that force bit
service (OUT X'Q7') causes
a bit service interrupt from
the line address under test.

After attempting to force a
141'2, Y4G2
bit service level 2 interrupt
(via au'! X'47'1 from the line
(BCBI address in Reg. X"",
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

15A6

OIOP

Ensure that when the
interrupt caused by
receiving a space in
mode 10 (see error code
OXOD) occurred, the line
tested was ind.ed receiying
a space and th~t the service
request that caused the
interrupt vas the first
since receiving a space
(bit overrun was not setl.

After receiving the interrupt
(or forcing an interrupt if
one failed to occurl, an IN
X'43' indicated conditions
which invalidated the test.
,e~. ~'14' !Font~ins the
received IN 1'43' data and
reg X'15' indicates the bits
that were in error:
Byte 0:
Bit a-receive data was
not a space.
Bit 4-transmit mode
erroneously set.
Bit 7-send data (thus
the test data latc~
was not a space (offl.
Byte 1:
Bit 2-data set ready
dropped.
ait 5-diagnostic mode
dropped.
Bit 6-bit service request
not set.
Bit 7-bit overrun occurred
indicating this was not
the first interrupt.

RS305

Test error.
Problem probably
lies in the Cs.
(See General
COlllaents, 13.1
If needed, reg.
X'll' contains
the line address
under test.
By continuing
from this error
stop, lIore
information about
the failure may
be gathered frol
the data given
at error OXOP.

A-330, Pretest error.
A-OqO Rerun routine
1512.

A-260

8927

COKIIENTS

Y4E2

BS105

A-280

Y4G2

85308

1-200

Y4G2

85308

1-200

Y4G2

RS307

10-200

Y4G2

RS307

A~200

Y4G2

RS301

1-200

14G2

R5305

1-0'10

Test error.
If an, bits
other than byte
1, bit 7 are on,
rerun a ppropria te
routine as given
below!'" If not,
problem is
probably in the
CS. (See Genera 1
Comments, .3.1

15AA

XXXX

/lonitor /lode 10 (Test .31: By selecting the first tvo installed non-autocall line adapters, setting
the first to transmit mode and the second to receive, and monitor .ode 10, and sending 255 bits,
alternating betwoen m~rk and space, ensure that the receive line will interrupt no more or less
than '27 times because of monitor mode 10. (This test runs only on the first tvo installed nonautocall line adapters found. If two are not found, the test is bypassed.1

15AA

0102

Ensure that force bit
service (OOT X'47'1 Cduses
a bit service interrupt from
the line address under test.

After attempting to force a
Y4P2, Y4G2
bit service level 2 interrupt
(via OUT X'47'I from the line
(BCBI address in Reg. I'll',
unmasking l~vel 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

15AA

OX04

Ensure that an OUT X'42'

While the scanner was stopped

5.0.68 I3705FAA

Y4G2

RS305

03PP

A-330, Pretest error.
1-040 Rerun routine
1512.

1-150

Pretest error.

type 1 Scanner 1FT

o

o
o
o
o
o

i105 CO""UNICAT10HS CONTROLLER
TIFE 1 COHHUUICATIONS SCANNER 1FT SYK~TOft INDEX

!~M

ROUT. EHROR FUNCTION TESTED
CODE
has set monitor mOl\e 10,
and has set diagnostic
1II0de.

o

o
o
o

o

OX06

o
o
o

o
o
o

15AA

OX08

ERROR DESCRIPTION
for the prior bit service, an
OOT X'42' was issuod to set
the pLoper modes. An IN X'42'
then indicated that the proper
bits were not set or other bits
were set in error. Reg. 1'14'
contains the actual data
received by the IN X'42' and
reg. X'15' indicates the bits
in erro!::
eyte 0:
Bit 6-mode b~t
failed
to set.
Bit 7-mode bit 2 set
in error.
Byte 1:
Bit O-low prioLity set
in error.
Bit l-diagnostic wrap
mode failed to set.
Bit 2-data terminal ready
set in error.
Bit 3-synchronoQs mode
set in error.
Bit 4-external clock bit
set in error.
Bit 5~data rate select
set in error.
Bit 6-oscillator select
bit 1 set.
B1t 7-oscillator select
bi t 21 set'.

1l99-3705E-09

SUSPECTED CARD
LOCA!l:ION ,IS)

PROG
"1SK

EOOO

Ensure that at this point
of the test, the receive
address has been set to
the proper condition to
continue.

8825

Type 1 Scanner 1FT

PETftH
PAGE

COHHENTS
Rerun appro~riato
routines as
specitied below.
If needed, reg.
X'11' contains
the line addre3e
under test.

Ensure that once the scanner
Either the scanner could not
is stopped, it can be started started 8gain or after
again via OUT 1'41' and then 'attempting to force the next
stopped again by forcing a
bit ser~ice interrupt and
bit service (OUT X'47')
waiting the time of a scanner
interrupt.
pass, no bit service interrupt
from the line under test
occurred. Reg. X"" contains
the line (BCB) address from
which bit service was to be
forced. Value of Reg. X'lS'
describes the failure:
X'EOOO' - 1he OOT X'41'
Y4G2
failed to reset the type 1
CS level 2 bit in IN X'77'
(however, no feedback
check was present).
X'COOO' - The OUT X'41'
Y4F2
failed to reset the type 1
C5 level 2 bit in IN 1'77'
because a feedback check
was present.
X'8000' - ~he OUT X'41'
Y4F2, Y4G2
was successful but the
OUT X'47' (force bit
service) failed to cause
a bit service interrupt.
After setting diagnostic
mode and resetting any possible
bit o~erruns. an IN X'43'
indicated tbat conditions were
not SUitable for continuing
the test. Reg. X'14' contains
the received IN X'43' data and
rog. X'15' indicates which
bits were in error:
Byte 0:
Bit O-receive data was not Y4E2
a lark (should have been
via test data l~tch and
diagnostiC mode).
Bit ~-line was in transmit Y4G2
lode.
Byte 1:

FEALD
PAGE

RS304

A-170

RS304

1-170

RS304

A-170

RS306

1-160

RS306

1-160

RS306

A-160

RS306

A-lbO

R5306

1-160

R5306

1-160

RS306

A-160

1-240

R5305

A-240

RS202

1-240

, R5305

R5308

Rerun routines
154A and 154C.
Rerun routines
1531 and 153C.
Rerun routinos
1532 and 1534.
Rerun routines
1S2A and 152C.
Rerun routines
1536 and 1538.
Rerun routines
152E and 1530.
Rerun routines
1542 and 1544.
Rerun routines
1546 .rnd' 15Q8.
Pretest error.
Rerun routine
1512.

1-330,
1-0QO

A-180

85105

Rerun routine
1550.
Rerun routine
1552.

A-leO
11-200
1-200

Pretest error.
Rerun appropriate
routines as
given below.
If diagnostic
mode failed to
set. ignore the
receive data and
data set ready
failures.
Rerun routine
lSeC.

Rerun routine
151C.

X3705FAA 5.0.69

IBII 3105 COIIl\UNICATIOIiS CONTROLLER
TYPE 1 COlIlIUHlCATIONS SCANNEa 1FT S¥ftPTOII INDEX
ROUT.. ERROR PUIICTION TESTED
CODE

D99-37051!-09

ERROR DESCRIPTION
Bit 2-data set ready vas
not forced up by
diagnostic 80de.
Bit 5-diagnostic 80de
failed to set.
Bit 1-overrun, if present,
vas not reset.

151.1

15U

15A1

lSlA

OXOA

OIOC

OIOE

0110

SUSPECTED CARD
LOCUIOR(s)

PETIII!
PAGE
A-200

COIIIIU'U

Y~G2

PElLD
PAGE
B5307

YQG2

B5307

A-200

IQG2

85308

1-200

Berun routine
153!.
Rerun routine
1588.

RS305

A-330, Pretest error.
A-040 8erun routine
1512.

Ensure that force bit
service (OUT X'~1') causes
a bit service interrupt frOB
the trans8it address under
test.

After attempting to force a
Y41'2, Y4G2
bit service level 2 interrupt
(via OUT X'47') fr08 the line
(aCB) address in Reg. X'11',
unmasking level 2 interrupts and
vaiting the tile of a scanner
pass, no bit service interrupt
occurred fro. that line.

Before continuing, ensure
that the transmit line has
been set to diagnostic
sode and sonitor 80de 11.

After stopping tbe scanner at
the tested address and issuing
an OUT l'q2' to set the proper
80des, an IN X'42' indicated a
failure to do so. Beg. X'l~'
contains the data received by
the IN 1'42'. Reg. x'15'
contains the bits in error:
Byte 0:
. &it '6-,pde bit, failed
to set: .
Bit 1-.ode bit 2 failed
to set.
Byte 1:
Bit O-lov priority set
in error.
Bit 1-diagnostic .ode
failed to set.
Bit 2-data terminal
ready set in error.
Bit 3-synchronous .ode
set in error.
Bit ~-external clock
set in error.
Bit S-data rate select
set in error.
Bit 6-oscillator select
tit 1 set.
Bit 7-oscillator select
bit 2 set.

03PF

Ensure that the first
oscillator has created a
strobe and caused a bit
service level 2 interrupt
from the transmit line.

After setting .onitor .ode
11 to allov noraal bit service
~eguests, selecting oscillator
0, starting the scanner and
waiting up to 30 milliseconds
for a bit service level 2
interrupt from the line under
test, none occurred.

Bnsure that at this point
of the test, the transmit
address has been set to
the proper condition to
continue.

After setting diagnostic
T4G2
mode, transmit 80de, send data
to a mark and resetting any
possible bit overruns, an
IN X'Q3' indicate4 t~at
conditions vere not suitable
for continuing the test. Beg,.
X' lQ' contains the received
IN X'Q3' data and reg. 1'15'
indicates vhich bits were in
error:
Byte 0:
Bit 4-trans.it .ode failed
to set.
Bit 7-send data failed to
to set to a mark.
Byte 1:
Bit 5-diagnostic .ode failed
to set.

5.0.70 137051'U

PROG
IIlSK

X4H2

Reron routine
1578.

1-150

fretest error.
8eg. X'11'
contains line
address under
test'. Rerun
the appropriate
routine.

I!S304

A-no

lIerun !'routine

IIS304

1-170

RerUn routine
1552.

B530~

1-170

B5306

A-160

Rerun routines
1516,15~A, & 1S4c.
Rerun routine
153A.
Berun routines
1516,1532, & 1534.
Rerun rontines
1516,152A, & 152C.
Berun rootines
1516,1536, & 1538.
Berun routines
1516,152B, & 1530.
Rernn routines
1516,1542, & 1544.
Berun routines
1516,15Q6, & 1548.

B5306

A-160

RS306

1-160

BS306

1-160

8S306

A-160

R5306

A-160

RS306

A-160

0901

A-200

"

"

c:

15~B.

Pretest error.
aerun routine
1580,.

8S401

";)

/
\

,r'

fretest error.
aerun appropriate'
routine as
shown below.

RS308

Rerun routine

RS308

Rerun routine
1522.

85307

Rerun routine
15313.

15U.

{
.'

-~

I

Y

Type 1 Scanner 1FT

o

o
o
o
o
o
o

..

---~-'-------------------------------'--~--

IBft 3705 COftftUNICATIONS CO"TBOLLEB
TYPE 1 CO""UNICATIONS SCANNER 1FT SYMPTOK INDEX
BOOT. ERROR PUNCTION TESTED
CODE

15AA

0112

Ensure that after sending
255 bits (alternately mark
and space) to a line (set
to receive and diagnostic
modes and interrupt mode
10), 127 bit service
interrupts are received
from that line.

o
o
o

SUSPECTED CARD
LOCATION(S)

PROG
KASK

PBALD
PAGE
RS307

FBTKK
PAGE

RS308

During the process or end of
sending the 255 bits an error
occurred. The value contained
in reg. X'16' is the storage
location of the transmit line
address. The value in reg.
X'16' .2 is the storage
location of the receive line
address. The hex value in
reg. 1'15' describes the
error:
X'8000' - No interrupt
occurred from either the
transmit or receive lines
after a 30 millisecond
lIait.

1-340
1-350

i

Test error.
Probles is
probably in the
C5 near the
I reset bit
service' line on
ALD page given.

Beg X'14', byte 0
contains the
number of bits
left to send at
the the of
failure. Rerun
routine 1580.
Beg. X'13'
contains the
address from which
the interrupt
occurred. Berun
routine 1511.

X'2000' - 00'1' 1'43' issued
to transmit line failed.
Display reg. X'13' for
bits in error:
Byte 0:
Bit 4-Transmit 80de
. dropped.
Bit 7-Send data failed
to set to proper state.
X' 1000' - Receive line
interrupted too many times.
X'0800' - Konitor mode 10
Y4G2
did not alloll a level 2
interrupt each tile a
space was received. Reg.
X'14', byte 1 contains the
received interrupt count in
hex. This should have been
127 (XI'/P').

,;

COKMENTS
Rerun routine
1580.
Rerun routine
1588.

X'4000' - An interrupt from
an address other than the
tllO being run has occurred.

'0"
il'

ERROR DESCRIPTIO.
Bit 6-bit service request
vas not up.
Bit 7-bit overrun vas not
reset (if present).

o

o
o
o
10

D99-3705B-09

Rerun routine
15U.

Rerun routines
1522 and 1524.
Rerun routines
15A6 and 158C.

RS308

15AC

XXIX

Interface Check Summary (Test "): Ensure that interface check suasaxy 1s set whenever bit overrun is
and that once the overrun is reset, so is it.. After causing a bit overrun by ignore interface
service requests, a check is'made to ensure that interface check suaaary is on. Bit overrun is
then reset and a check made to ensure that interface check su ••ary is then off. (This test is
run on the first installed non-autocall 11ne adapter found.)

1SAC

OX01

Ensure that force bit
service (00'1' 1'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4P2, Y4G2
bit service level 2 interrupt
(via DO! X'47'1 from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the tiae of a scanner
pass, no bit service interrupt
occurred from that line,.

Before continUing, ensure
that the tssted line has
been set to diagnostic
mode and monitor .ode 11.

After stopping the scanner at
the tested address and issuing
an OUT X'42' to set tbe proper
modes, an IN 1'42' indicated a
failure to do so. Reg. 1'14'
contains the data received by
the IN X'42'. Reg. X'1S'
contains the bits in error:
Byte 0:
Bit 6-80de bit 1 failed

o
15AC

OX02

Type 1 Scanner 1FT

Y4G2

B5305

A-330, Pretest error.
A-O'O Rerun routine
1512.

03PF

85304

A-ISO

Pretest error.
Beg. 1'11'
contains line
address under
test. Rerun
tba appropriate
routina.

1-170

Rerun routine

X3705PAA 5.0.71

16M 3705 COMMUNICATIONS CONTROLLER
TYPE 1 COHNON1CATIONS SCANNER 1fT SY~PTON INDEX
ROUT. ERROR FUNCTION TESTED
CODE

ERBOR DESCRIPTION

D99-3705E-09

SUSPECTED CABD
LOCATION (s)

PROG
IIA5K

to set.
Bit 7-aode bit 2 tailed
to set.
Byte 1:
Bit O-lov priority set
in error.
Bit I-diagnostic mode
f ailed to set.
Bit 2-data terminal
ready set in error.
Bit 3-synchronous mode
set in error.
Bit q-external clock
set in error.
Bit 5-data rate select
set in error.
Bit 6-oscillator select
bit 1 set.
Bit 7-oscillator select
bit 2 set.
15AC

OX03

Ensure that the first
oscillator can create a
strobe and caused a bit
service level 2 interrupt
from the tested line.

After baving set monitor Bode
11 to allov normal bit service
requests, selecting oscillator
0, starting the scanner and
waiting up to 30 milliseconds
for a bit service level 2
interrupt from the line under
test, none occurred.

Y482

1SAC

OXOq

Ensure that diagnostic
mode has forced data set
ready up. (Data set ready
being off will cause
interface cbeck su •• ary
to be on.)

After setting diagnostic mode,
an IN X'43' indicated data set
ready was off. (Byte 1, bit 2
ot the IN X' 43' was on.1

Y4G2

1SAC

OXOS

Ensure that an OUT X'44'
has reset any bit overrun
condition. (Bit overrun
being on vill cause
interface check summary
to be on.)

After issuing an OUT X'4Q'
with byte 1, bit 1 on to
reset any possible overruns,
an IN X'43' still indicated
an overrun condition.

15AC

OX06

Ensure that with bit
overrun off and data set
ready on, no interface
check summary is present.

Atter ensuring that the
conditions that can set
interface check summary
(except feedback error)
were not present in an IN
X'43', interface check
summary vas found on.

Y4F2

1SAC

OK01

Ensure that the first
oscillator has created a
strobe and caused a bit
service level 2 interrupt.

After baving set monitor mode
11 to allow normal bit service
reguests, selecting oscillator
0, starting the scanner, and
waiting up to 30 milliseconds
for a bit service level 2
interrupt from the line under
test, none occurred.

Y482

1SAC

OX06

Ensure that the only
condition present to
cause interface check
summary to be on is b~t
overrun.

After attempting to cause a
bit overrun by not allowing
level 2 interrupts for 60
milliseconds and then allowing
one, an IN X'43' indicated that
the conditions needed vere not

5.0.72 X3705PAA

FEALD
PAGE

fETNM
PAGE

COMMENTS

B530q

1-110

Rerun routine
1552.

RS304

1-110

R5306

A-160

85306

A-160

Rerun routines
1516,154A, & 154C.
Rerun routine
153A.
Rerun routines
1516,1532, & 1534.
Rerun routines
1516,152A, I; 152C.
Rerun routines
1516,1536, I; 1536.
Rerun routines
1516,152E, I; 1530.
Rerun routines
1516,1542, & 1544.
Rerun routines
1516,1546, I; 1546.

B5306

A-160

RS306

A-160

R5306

1-160

&5306

A-160

BS306

A-160

Pretest error.
Rerun routine
1580.

R5401

0020

B5307

1-200

Pretest error.
Rerun routine
1578. If
needed, teg.
It'11' contains
the tested
line address.

0001

85306

A-200

Pretest error.
Rer un routi ne
1566. If
needed, reg.
X'11' contains
the tested
line address.

2000

RS202

A-200

Pretest error.
Problem lies
within the cs.
Display reg.
X'14',. If byte
0, bit 1 is on,
i9no1'e this
error and rerun
routine 157 A
(feedback error
vas present).

RS401

A-040

Test error.
Although this
failure is
designated as
a test error,
this function has
been previously
tested. Berun
routine 1560.

A-200

Test error.
Rerun appropriate
routines as
given belovo

4021

Type 1 Scanner 1FT

o

o
o
o
o
o
o
o
o
o

IBM 3105 COHHUNICATIONS CONTROLLER

ROUT. ERROH PUNCTION TESTED
CODE

FEALD
PAGE

FET"M
PAGE

COMMENTS

RS202

A-180

Rerun routine
157A.

R5307

A-160

RS308

A-180

Rerun routine
1518.
Rerun routine
1SBB.

Bnsure that after having
met the proper conditions
for setting interface check
suaaary (see error code OX06,
above) by ~it overrun, interface check sum.~ry bas been
set.

With bit overrun on in an IN
X'43'. interface check sum.ary
was not on. (Byte 0, bit 2 of

Y4P2, Y4G2

2000

RS202

A-200

Test error.
Problem is in
the Cs.

15AC

OXOA

Ensure that an OUT X'44'
has reset any bit overrun
condition. (Bit overrun
being on viII cause interface
check summary to be on.)

After issuing an OUT X'44'
with byte 1, bit 7 on to
reset any possible overruns,
an IN I'Q3' still indicated
an overrun condition.

Y4G2

0001

RS30B

A-200

!test error.
Rerun routine
1586. I f
needed, reg.
X'11' contains
the tested
line address.

15AC

OXOB

Ensure that after the bit
overrun vas reset, interface
check summary is no longer
on.

The IN X'43' that just
14F2, Y4G2
indicated no bit overrun, still
indicated interface cbeck
summary as being on. (Byte 0,
bit 2 of the IN 1'43'.)

2000

RS202

A-200

Test error.
Problem lies
within the CS.

15AE

xxxx

Interface Check Summary (Test '2): Ensure that after causing a feedback check error summary in
IN X'43' is set and after resetting the feedback cbeck, it Is off. (This test is ron only
on tbe first installed non-autocall line adapter found.)

15AE

OXOl

Ensure that force bit
service (OOT X'41') causes
a bit service interrupt from
the line address under test.

After attempting to force a
14F2, Y4G2
bit service level 2 interrupt
(via OOT 1'47') from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
vai ting the time' of a scanner
pass, no bit service interrupt
occurred from that line.

15AE

OX02

Ensure that the diagnostic
mode bit in IN 1'42' can
be set by issuing OUT X'42'
with byte 1, bit 1 on.

Either the diagnostic mode bit Y4G2
failed to act correctly or
Y4E2
other bits in the IN X'42'
turned on in error. Seg. X'11'
contains the line (BCBI address
under test. Reg. X'15' contains
the bits in error,. (Byte 1,
bit I on indicates a diagnostic
mode bit failure.) Reg. X'14'
contains the actual data
received by the IN X'~2'.

15AE

OX03

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After atteapting to force a
14F2, Y4G2
bit service level 2 interrupt
(via OOT X'47'1 from the line
(BCB) address in Reg. X'11',
unmaskIng level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

15AE

OX04

P.nsure that none of the
conditions that can cause
interface cbeck summary

After forcing data set ready
up via diagnostic mode and
disabling the LIB associated

o

Type I Scanner 1FT

8

PROG
MASK

OX09

o

o

SUSPECTED CARD
LOCATION(S)

15AC

o

o

ERROR DESCRIPTION

present. Reg~ X'14 contains the
received IN X'q~' data and reg.
X'1S' contains the bits in error:
Byte 0:
Bit 1-feedback check was
14F2
present.
Byte I:
Bit 2-data set ready
Y4G2
dropped,.
Bit 7-Bit overrun was
HG2
not set..

o

o

099-3105E-09

TYPE 1 COMMUNICATIONS SCANNER 1fT SYHPTOM INDEX

03FF

4021

85305

A-330, Pr6test error.
1.-040 Rerun routine
1512.

R5306
8S106

A-160
1.-270

RS305

A-330, Pretest error.
1.-040 Rerun routine
1512.

A-200

Pretest error.
Rerun rootine
1531..

Pretest error.
Rerun appropriate
routines as

X310SFAA 5.0.73

t'~It
/\,

~J
,.
IBft 3705 COft~aNICATIONS CONTROLLER
TIPE 1 cos~UNIC1TIONS SCANNER 1FT SY~PTOS INDEX
BOUT. ERROR PUIiCnOR TESTED
CODE
are on.

lSAE

OX 05

Bnsure that with no condition
present that should set
interface check su.sary.
interface check su •• arr is
indeed off.

D99-3705£-09

UROD DE5CRIPTIOII

SUSPECTED CARD
LOCATION(S)
with the line under test to
~revent a bit overrun condition,
n IN X'43' indicated a
condition that could set-interface check su •• ary. Reg. X'14'
contains the received 1M X"3'
data and reg. X'15' contains
tbe bits in error:
Byte 0:
Bit ,-a feedback error
Y4F2
lias present.
Byte 1:
Bit 2-data set ready
Y4G2
was off.
Bit 3-a bit overrun
Y4G2
IIU present.

PROG
SASK

The saae IN X'43' that did
not indicate bit overrun,
data set ready off, or
feedback error, did indicate
interface check sum.ary (byte
0, bit 2 of the 1M X'43'1.

2000

Y4P2. Y4G2

PBALD
£IAGB

PEUl!

£IAGB

'"

COllftENTS

OX 06

Bnsure that after having
forced a feedback error,
the feedback error bit in
IN X'43' has been set (and
bit overrun is still ott
and data set ready is ani.

After issuing an OUT X'43'
with the send data and
transmit mode bits on to
the line adapter under test
(the LIB is disabledl, ap
1M X'43' indicated no feedback error occurred (or the
other conditions were on in
error). Beg. 1'15' contains
the bits in error:
Byte 0:
Bit 1-no feedback cbeck
occurred.
Byte 1:
Bit 2-data set ready
dropped.
Bit 7-bit overrun
was on.

.i'

'"

given below.

,
\

;'

'.

J'

",
B5202

A-180

Berun routine
1571.

RS307

1-160

88308

10-180

Rerun routine
1578
Rerun toutine
1588.

85202

"-200

".I

\,

",

l'retest error.
l'roblea Ues
within the CS.

J

-'

'\

'--

15AE

"

jI

'<

1-200

4021

Test error.
Berun appropriate
routine as
gl9en below.

,j

j

'\

/

'<.._,--"

.

XIIl'2

BS202

1-180

Berun routine
1S7c.

Y4G2

B5307

1-180

t4G2

85308

1-180

Rerun routine
1578.
Rerun routine
1588.

,

'-

/

, / - ...... ,
Ie.... --",J

15AE

15AE

OX 07

0108

Ellsure that a feedback
error has set interface
check summary.

Ensure that issuing an OqT
X'44' with byte 1, bit ~
on (reset feedback check)
has reset the forced feedback check, that bit
overrun is still off, and
data set ready is still up.

lfter baying caused a feedback 14F2
error to be indicated in an IN
X'43', interface check su.mary
in the same 1M 1'43' lias not on.

2000

An IN 1'43' following the OUT
1'44' still indicated a feedback error (or bit overrun vas
on, or data set ready dropped).
8eg 1'15' describes-tbe error:
Byte 0:
Bit 1-feedback check
14F2
£Oiled to reset.
ayte 1:
a'-t 2-data set ready
!4G2
dropped.
Bit 1-overrun was
t4G2
erroneously set.

4021

Tbe same IN X'43' tbat
indicated that feedback check
lias reset also indicated that
interface cbeck sUlmary lias
still on.

2000

85202

1-200

A-;-200

Test error.
Frable. is in
the CS.

test error.
Berun routines
as specified
below.

R5202

A-180

Berun routine
157C.

R5307

A-180

85308

1-180

Rerun routine
1518.
Berun routine
1588.

B5202

1-200

15A8

0109

Ensure tbat resetting the
feedback check that caused
interface check susmary to
set, resets it.

15ao

IXXX

Interface Check Sum.ary (Test .31: Ensure that data set ready being off,sets interface check ~u •• arJ
and that turning data set ready on, turns it off. (This test is run only on the first install~d
non-autocall line adapter found. I

14'2

r

'\

,,-

/'

/

'\

\_-~/

/-''',

'--/

I

,/C' '\
\
"'-~

test error.
ProblGl 18 in
tbe CS.

,-y

J ",
5. O. 74 X3705FAl

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IBK 3105 CO"KU~ICA~ION5 CONTROLLER
TYPE 1 COK"UHICATIONS'SCARNBR XFT SI"PTO" IIDlt

1l99-3105t:-09

BOUT. ERROR PONCTIOR TBSTED
CODE
15BO OXOI Ensure that force bit
service (OOT X'47'I causes
a bit service interrupt froa
the line address under test.

ERBOR DESCRIPTION
SOSPECTED CUp
LOCAUONlsl
After attempting to force a
YIIF2, IIIG2
bit service level 2 interrupt
(via OOT 1'111'1 fro. the line
(DCDI address in Beg. X'11',
unaasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred frol that line.

PROG
IlASK

FEUD
PAGE
B5305

FETftlI COIIIIENU
PAGE
1-330, Pretest error.
1-0110 Berun routine
1512.

15BO

OX02

Ensure that the diagDostic
lode bit in IN 1'42' can
be set by issuing OUT X'II2'
with byte 1, bit Ion.

Ei~ber the diagnostic lode bit
YIIG2
failqd to act correctly or
YIIB2
other bits in the IN X'II2'
turned on in error. Beg. X'11'
contains the line (DCBI address
under test. Beg. X'15' contains
the bits in error,. (Byte 1,
bit 1 on indicates a diagnostic
lode bit failure.1 Beg. X'll1'
contains the actual data
received by the IN X'42'.

03PP

B5306
85106

1-160
1-270

15BO

OX03

Ensure that force bit
service (OOT X'II7'I causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4P2, YliG2
bit service level 2 interrupt
(via OOf X'II1'I from the line
(DCBI address in Beg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

BS305

A-330, Pretest error.
A-OliO Berun routine
1512.

15BO

OX04

Ensure that none of the
conditions that can cause
interface check suamary
are on.

After forcing data set ready
up via diagnostic 80de and
disabling the LIB associated
with the line under test to
prevent a bit overrun condition,
an IN X'II3' indicated a
condition that could set interface check summary. Beg. X'111'
contains the received II X'II3'
data and reg. X'15' contains the
bits in error:
Byte 0:
Bit I-a feedback error
IIIF2
lias present.
Byte 1:
Bit 2-data set ready
YIIG2
vas off.
Dit 3-a bit overrun
14G2
was present.

o
o
o

15BD

0105

Ensure that with no condition
present that should set
interface check sum.ary,
interface check suamary is
indeed off.

fhe sa.e IN X'II3' that did
not indicate bit overrun,
data set ready oft, or
feedback error, did indicate
interface check summary (byte
0, btt 2 of tbe IN X'1I3'1.

o

15BO

OX06

Ensure that force bit
service (OOT X'II7'I causes
a bit service interrupt froa
the line address under test.

After attempting to force a
Y4F2, YIIG2
bit service level 2 interrupt
(via OOf X'II7'I from the line
(BCBI address in Reg. X'11',
unmaskin'g level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1580

0107

Ensure that by starting
and stopping the scanner
and leaving the LIB
disabled, data set ready
is no longer latched up
in the CS and that feedback
error and bit overrun are
still off.

After stopping the scanner
again, an IN X'II3' indicated
tbat data set ready, feedback
error, or bit overrun were on.
Beg X'15' describes the error:
Byte 0:
Bit 1-feedback error
erroneously set.

o

Type 1 Scanner 1FT

UF2, Y4G2

11021

2000

A-200

Pretest error.
Berun appropriate
routines as
given below.

B5202

A-180

Berun routine
1571.
Berun Loutine
1518.
Rerun routine
1588.

B5307

1-180

85308

A-1DO

R5202

A-200

RS305

A-330, Pretest error.
A-OliO Berun routine.
1512.

11021

YIIF2

fretest error.
Rerun routine
'531.

R5202

Pretest error.
Proble. lies
witbin the CS.

A-200

fest error.
Rerun routines
specified belovo

A-180

Rerun routine
1571.

13105FAA 5. O. 75

1

~~

',,- ,)I

D9 9- 31 05!!- 09

IBM 3105 CO""UNICATIONS CONTROLLER
TYPE 1 COMKU"ICA~IONS SCANMER IF~ SYMPTOM INDEX
ROUT. ERROR FUNCTION TESTED
CODE

ERROR DESCRIPTION
Byte 1:
Bit 2-data set ready did
not reset.
Bit I-bit overrun
etro~,e?usl~ set.

.,:
SUSPECTED CARD
LOCATION (s)

PROG
"ASK

Y4G2

PEALD
PAGE

PETM"
l'AGE

COMMENTS

R5307

A-1aO

Rs308

A-laO

Rerun routine
1518.
Rerun toutine
1588.

15BO

OX06

Ensure that data set ready
being off has caused interface check summary to be on.

After forcing data set ready
Y4F2
down by keeping the LIB disabled,
the same IN X'43' that indicated
data set ready off, failed to
indicate interface check summary
on.

2000

R5202

1-200

Test error.
Problelll is
within the CS.

15BO

OX09

Ensure that the diagnostic
mode bit in IN X'42' can
be set by issuing OUT X'42'
with byte 1, bit 1 OD, DOW
tbat the LIB has again been
enabled.

Either the diagnostic mode bit Y4G2
failed to act correctly or
Y4E2
otber bits in the IN X'42'
turned on in error. Reg. X'11'
contains the line (BCB) address
under test. Reg. X'15' contains
tbe bits in error. (Byte 1,
bit 1 on indicates a diagnostic
mode bit failure.) Reg. X'14'
contains the actual data
received by the IN X·42'.

03FF

RS306
R5106

A-160
1-270

Pretest error.
Rerun routine
1531.

15BO

OXOA

Ensure that force bit
service (OUT X'41') Causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4P2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the 11ne
(BCB) address in Beg. X' 11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred fro. that line.

R5305

A-330, Pretest error.
A-OqO Rerun routine
1512.

15BO

OXOP

Ensure tha t setting
diagnostic mode has forced
data set ready back up in
IN X'43'.

After setting diagnostic mode
(and disabling the LIB again)
an IN X'43' indicated data
set ready vas off. (Byte 1,
bit 2 of the IN 1'43' was on.1

Y4G2

0020

RS307

A-200

Test error.
Rerun routine
1518 •

15BO

OXOC

Ensure that feedback error
and bit overrun are still
off in the IN X'43' (LIB
is disabled).

The same IN X'43' that indicated
that data set ready was back
on also indicated bit overrun
or feedback check as being on.
Reg. X'15' says which:
Byte 0:
Bit 1-feedback error
Y4F2
set in error
Byte 1:
Bit 7-bit overrun vas
Y4G2
set in err or~

4001

A-200

Test error.
Rerun appropriate
routine as
indicated belo~.

RS202

A-160

Rerun routine
151&.

R5306

A-180

Berun routine
1588.

Tbe same IN X'43' that
indicated that data set ready
was back on, also indicated
an interface check summary.
(Byte 0, bit 2 of the IN
X' 43' was on.1

2000

R5202

A-200

'rest error.
l'roblem is in
the CS.

BS10S

A-210, Test error.
A-220 Problem is
in CS.

Y4P2

15BO

OXOD

Ensure tbat interface check
summary is off, nov tbat
data set ready 1s back on.

15B3

XXIX

Character Service (test 10): Ensure that the character service pending latch
can be set by an OOT X'46' and then reset by an OOT X'44'.

15B3

OXOl

Ensure that an OUT
X'q6' can set the
character service
pending latch.

5.0.76 X3105PAA

After attempting
to set the character
service pending latch
with an OUT 1'46' an
IN X'44' contained
other than X'0800'. Reg.
X'14' contains the received IN X'44' and Reg.

Y4E2

Type 1 Scanner 1FT

'~.

'" j.;

o

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IBK 3705 COftftOHICATIONS COHTBOLLER
TYPE 1 COKKOHIC1TIOHS SC1HHBB IPT SYBPTOK IHDBX

o

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0'(
,

ROUT. ERROR PUHCTION TBSTBD
CODB

EBBOR DESCRIPTION
X'15' contains the bits
in error.

D99-3705B-09

SUSPECTED CARD
LOCATION IS)

PBOG
"ASK

PE1LD
PAGB

PET"B
PAGE

COBBERTS

0800

BS105

A-300

Test error.
Problem is
18 C~.

15B3

OX02

Bnsure that the
character service
pen4ing latch 1s
reset after an OUT
X'qq' vith the resot
character service bit
on (Byte 1, bit ~I.

15B4

XXXX

Character Service (Test ")): Bnsure that a character service interrupt can and does ocCUr within 3
idle passes of tho scanner after requesting a cbaracter service interrupt via OUT X'46'. This
is accomplished by resetting the scanner, forcing a bit service interrupt to stop tbe scanner,
and requesting a character service interrupt and starting the scanDer via an OUT X'46'. since
no lines are enabled a character service interrupt should occur at the end of the third scanner
pass.

15B4

OX01

Bnsure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
YIIY2, YIIG2
bit service level 2 interrupt
(via OOT X'47') fro. tbe line
(BCB) address in leg. X'11',
un.aaking level 2 interrupts and
waiting tbe time of a scanner
pass, no bit service interrupt
occurred frOB that line.

85305

1-330, Pretest error.
1-0110 Berun routine
1512.

.5B4

OX02

Ensure that an OUT 1'46'
causes a level 2 interrupt.

After waiting, no level 2
interrupt occurred.

RS102
RS202
B5201

1-320

fest error.
Problem is in
the CS. Character
service level
2 latch never
set.

Ensure that tbe interrupt
tbat occurred caused
X' 06PO' (the psuedo
character control block
address) to appear in
IN X'II,..

After tbe level 2 interrupt
occurred from requestinq
character service, an IN
X'41' contained otber than
X'0610'. Reg 1'14' contains
tbe results of the II X'II1'
and reg. X'15' contains the
bits in error:
Byte 0:
Bit " - VIIS on
Bit 5 - vas off
Bit 6 - was off
Bit 7 - was on
Byte 1:
Bit 0 - was off
Bit 1 - vas off
Bit 2 - was off
Bit 3 - vas off

A-1'10
1-060

Test error.
Problem is in
tbe CS.

1-060

fest error.
The counter in
tbe character
service circuitry
is apparently
counting wrong.

After an OUT X'~4' with
the reset character
service pen4ing bit on,
an IN X'qq' in41cate4
that byte 0; bit 4
(character service pending)
was not reset. Beg X'111'
contains the received IN
X' 411' data.

Y4B2
fliP 2

\

15BII

OX03

o
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15B4

OX04

o

I_

Ensure that tbe character
service interrupt that
occurred as a result of an
DOT 1'116' did so witbin
exactly 3 idle passes of
the scanner.

fbe character service
interrupt occurred before
or after tbe tbird pass.
(It actually sbould occur
right at the end of it.,
Reg. X'15' indicates wbether
it vas early or late. If
tbe value in reg. X'15' is
greater than X'7D' the
interrupt vas early (before
tbe third pass) and if less
than X'78' it was late (after

OPPO

fIIG2
14P2
YIIG2
YliG2

18303
15202
B5303
15303

YIIG2
14G2
fIIG2
HG2

15303
BS303
BS303
BS303

I'IP2

B5202

it) •

15B6

XXXX

Character Service (Test '2):

Ensure that a bit service interrupt occurring witbin tbree scanner passes

I
I

Ie

Type 1 Scanner 1FT

13705PAA 5.0.77

15" 3105 CO"~UNICATIONS CONTROLLER
TYPE 1 CO"~ONICITIONS SCANNER 1FT SYMPTOft INDEX

D99-3105E-09

ROUT. ERROR PUNCTION TESTED
ERROR DESCRIPTION
SUSPECTED CARD PROG PEALD
CODE
LOCATION(s) "ASK PAGE
of a reguested character service interrupt can override the character service reguest.

PETn"
PAGE

1656

OX01

Ensure that force bit
service (OOT X'ij7') causes
a bit service interrupt fro.
the line address under test.

After attempting to force a
Y4P2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the ~ine
(BCB) address in Beg. X'll',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred trom that line.

B5305

1-330, Pretest error.
A-040 Rerun routine
1512.

1556

OX02

Ensure that no interrupt
occurs up to the end of the
third idle pass of the
scanner after reguesting a
character service interrupt.

Within 76.8 aicroseconds of
14P2
an OUT X'46' (request character
service) an interrupt occurred.
(All lines were disabled.)

85202

A-060

Test error.
Rel:IlD routine
t 554.

1566

OX03

Ensure that if a bit service
interrupt is reguested within
three idle passes of the
scanner after requesting
character service, it will
override the reguested
character service.

A force bit service (OUT
X'47') tailed to cause a
bit service level 2 interrupt.
If byte 0, bit 0 of reg.
X'lS' is on, no interrupt was
received at all. If byte 0,
bit 5 is on, the character
service interrupt reguested
was not overridden.

Y4F2

BS202

1-060

Test error.
Problem is in
the CS. If no
interrupt was
received at all,
rerun routine
1512.

1566

OX04

Ensure that no interrupt
occurs up to the end of
the third idle pass of the
scanner after reguesting a
character service interrupt.

Within 76.8 microseconds of
Y4F2
an OUT 1'46' (request character
service) an interrupt occurred.
(All lines vere disabled.)

RS202

1.-060

Test error.
Berun rOlltine
1554.

1556

OXOS

Ensure that if a bit service
interrupt is reguested
within three idle passes
of the scanner after
reguesting character
service, it will override
the reguested character
service.

A force bit service (OUT
X'47') failed to cause a
bit service level.2 interrupt.
If byte 0, bit 0 of reg. X'15'
is on, no interrupt was
received at all. If byte 0,
bit 5 is on, the character
service interrupt reguested
was not overridden.

Y4F2

R5202

1-060

The only
difference
bEtween this
error and error
OX03 of this
routine, is
that this error
tests the reset
capability of
the 'allow
character service
counter' •

1566

OX06

Ensure that an OUT X'46'
causes a level 2 interrupt.

After waiting, no level 2
interrupt occurred.

14P2

RS202
RS201

1-320

Test error.
Problem is in
the CS.
Character
service level
2 latch never
set.

1566

OX07

Ensure that the interrupt
that occurred caused
1'06FO' (the psuedo
character control block
address) to appear in
IN 1'41'.

After the level 2 interrupt
occurred from requesting
character service, an IN
X'41' contained other than
X'05FO'. Reg. X'14' contains
the results of the IN X'41'
and reg. X'tS' contains the
bits in error:
Byte 0:
Bit 4 - was on
Bit 5 - was off
Bit 6 - was off
Bit 1 - vas on
5yte 1:
Bi t 0 ~ vas 0 ff
Bit , - was off
Bit 2 - was off
Bit 3 - was off

A-140

Test error.
Problem is in
the CS.

5.0.78 X3705FAA

OFPO

Y4G2
Y4F2
YijG2
'qG2

85303
8S202
8S303
BS303

HG2
Y4G2
Y4G2
y1fG2

B5303
R5303
B5303
RS303

COftftENT5

Type 1 Scanner 1FT

o
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11.

U
o
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IBK 3705 COHHUNICA1IONS CONT80LLea
TYPi 1 COHHOHICATIONS SC~NNER 1FT SYHPTOH INDEX

ROUT. EaaOR FUNCTION TBSTED
ERBOR DESCRIPTION
SUSPECTED CABO PBOG PEALD PETSS COHnENTS
CODE
LOCATION(s) SA5K PAGE
PAGE
15B8 lUX Character Service (Test 13): Ensure that a character service interrupt occurs after the scanner has
passed four enabled high priority lines. This is accomplished by setting the first four line
addresses to a lode other than 00, requesting a character service interrupt, waiting one scanner
pass only. and ensuring that a character service interrupt does occur. (Tbis test first sets
the four addresses to mode 01. tben mode 10. and then .ode 11.)

15B8

OXOI

Ensure that force bit
service (OUT X'Q7') causes
a bit service interrupt from
the line address under test.

After attempting to force a
YQP2. YQG2
bit serlice level 2 interrupt
(~ia OOT X'47') from tbe line
(BCB) address in Reg. X'11'.
unmasking level 2 interrupts and
waiting the time of a scanner
pass. no bit service interrupt
occurred from that line.

B5305

A-330. Pretest orr or.
A-040 Rerun routine
1512.

15B8

OX02

Ensure that an OUT X'ij2'
has set the proper mode
bits.

After stopping the scanner
at the tested addresa. an OUT
X'42' Mas ~ssued to set the
mode bits. An IN X'42' then
indicated the correct mode
bits were not set. Reg. X'15'
indicates whicb mode bit was
in error. (Byte o. bits 6
and 7 represent mode bits 1
and 2. respectively.)

RS304

A-110

15B8

OX03

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2. Y4G2
bit service level 2 interrupt
(via OUT 1'41') from the line
(BCB) address in !leg.• I ' l l ' .
unmasking level 2 interrupts and
waiting the time of a scanner
pass. no bit service interrupt
occurred from that line.

R5305

1-330. Pretest error.
1.-040 Rerun routine
1512.

15B8

OX04

Ensure that an OUT X'Q2'
has set the proper mode
bits.

After stopping the scanner
at the tested address. an OUT
X'ij2' was issued to set the
mode bits. An IN 1'42' then
indicated the correct mode
bits were not set. Reg. X'15'
indicates wbich mode bit was
in error. (Byte o. bits 6
and 7 represent mode bits 1
and 2. respectively.)

BS304

A-170

15B8

OX05

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2. Y4G2
bit service level 2 interrupt
(via OUT X'Q1') from the line
(BCB) address in Beg. X'11'.
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

B5305

1-330. Pretest error.
1.-040 Berun routine
1512.

15B8

OX06

Ensure that an OUT X'Q2'
has set the proper Bode
bits.

After stopping the scanner
at the tested address. an OUT
X'42' was issued to set the
mode bits. An IN X'42' then
indicated the correct mode
bits vere not set. Reg. X'15'
indicatEs which mode bit was
in error. (Byte o. bits 6
and 7 represent mode bits 1
and 2. respectively.)

R5304

A-170

15B8

OX07

Ensure that force bit
service (OOT 1'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2. Y4G2
bit service level 2 interrupt
(via OllT 1'47'·) from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and

RS305

1-330. Pretest error.
A-OliO Rerun routine
1512.

o
o
o

Type 1 Scanner 1FT

o

099- 37 05E- 09

YQG2

YQG2

Y4G2

Pretest error.
Rerun routines
154E. 1550. and
1552. 1554 for
mode bits 1 and
2. respectively.
(If needed,
reg. 1'11'
contains the
line address
under test.)

Pretest error.
Berun routines
154E. 1550, and
1552. 1554 for
lIode bits 1 and
2. respectively.
(If needed. reg.
1'11' contains
the line address
under test.)

Pretest error.
Rerun routines
15QE. 1550. and
1552. 1554 for
lIode bits 1 and
2, respectively.
(If needed. reg.
X'.,' contains
the line address
under test.)

X3705FAA 5.0.19

IDa 37'05 COllftUHICATIOIlS CONTROLUS
TYPB 1 CO!KUHICATIOHS SCANNER 1fT SYNPTOft INDBX
BOUT. EBROB PUlICTION TESTED
CODE

ERROR DBSCRIPTION
vaiting the time of a scanner
pass, no bit service interrupt
occurred frolll that line.

099- 37 05E- 09

SOSfECTED CABO
LQCATIOH(s)

PBOG
BASK

fBALD
PAGE

fETBB
PAGE

COBBEHTS

1588

OX08

Bnsure that an 00'1' X'ij2'
has set the proper mode
bits.

After stopping the scanner
at the tested address, an OUT
X'ij2' was issued to set the
lIIode bits. An IN 1'112' then
indicated the correct lIIode
bits were not set. 8eg. X'lS'
indicates wbich lIIode bit was
in error. (Byte 0, bits 6
and 7 represent lIIode bits 1
and 2, respectively.)

YIIG2

RS3011

1.-170

Pretest error.•
Rerun routines
1511E, 1550, and
1552, 15511 for
mode bits 1 and
2, respect! vely.
(If needed, reg.
X'11' contains
the line address
undu test.)

1588

OXOA

Bnsure that an OUT X'q6'
(set character service
request) will cause a
character service level
2 interrupt after the
scanner has passed four
Gnabled high priority
lines.

After baving reset the scanner, YIIG2
setting tour lines to other
fljf2
than lode 00, and waiting no
1Il0re than one scanner pass,
no character service interrupt
occurred.•

85306
85201

1.-060

Test error.
Proble. is in
the CS (probably
near the '+
enabled hi pd
intf' line).

158A

XXXX

Character Service (Test lij): After ensuring that OUT X'1I6' will cause a character service interrupt,
ensure that both OUT X'IIO' and scanner reset can reset the character service request such that
no character service interrupt occurs again~ (This test is first run using OO~ X"6' and then
using reset scanner.)

15Bl

OXOI

Ensure that an OU~ X'46'
[request character senice)
causes a character service
interrupt.

After waiting four scanner
passes, no character service
interrupt occurred.

Yllf2

85202

A-320
A-060

Pretest error.
lIerun routine
lSBq.

ISBA

0102

Ensure that 00'1' X'46' or
reset scanner can reset
a character service
interrupt.

After a character service
interrupt occtrred, an OUT
X'40' or scanner reset (00'1'
X'4S' with byte 0, bit 2 on)
vas issued. Another interrupt
vas then received. If reg.
X'11' contains X' 0000', the
reset attempted vas an 00'1'
X'40'. If not, it vas a
reset scanner (after the
reset scanner, the scanner 1s
enablel1 agllin).

Y4P2

115202

1-320

Test error.
Problem is in
the CS.

"

lSBC

IXXX

character Service (Test IS):
indicates all zeroes.

15BC

OXOl

Ensure that an OUT X'46'
(request character service)
causes a character service
interrupt.

After waiting four scanner
passes, no character service
interrupt occurred.

YijP2

.15BC

OX02

Ensure that after a character
service interrupt, IN X'43'
is all zeroes.

After II character service
interrupt lind aD IN X'41',
IN X'1I3' was executed and
the resultant data was not
all zeroes. 8eg. X'15 1
contains the bits in 1ft
X'43' that vere not 0,
i f needed.

!4P2

15aE

XXXX

Ensure that after a requested character service interrupt, an IN X'43'

102

ffrr

85202

A-320

Pretest error.
Rerun routine
lS8ij.

115203
85103

A-180

~elit error.
Proble. is 1n
the CS and
caused by not
degating the
' t input 43'
signal on ALD
page 115103.

Level One Interrupts with LIBs Enabled: After ensuring that no level ODe interrupts occur when
adapter level 1 interrupts are unmas~ed with the LIBs disabled, ensure that no level one interrupts

5.0.80 X3705PAA

Type 1 Scanner 1fT

'

o

o
o

o
o
o
o
o
o
o

IBK 3105 COKKUHICATIOHS CONTROLLER
TYPE 1 COK"UHICATIORS SCANNBR lIT SYKPTOn INDEI
ROUT. ERROR FUHCTIOR TESTED
EBBOR DESCRIPTIO.
CODE
occor with each LIB enabled in turn.

SOSPECTED CARD
LOCATIO.(S)

15BE

OXOl

Ensure that with the LIBs
disabled, no le,el 1
interrupts occur.

After resetting the scanner,
level one interropts vere
unsasked for 30 lilliseconds
and vhile they were unmasted,
a type 1 CS level 1 check
occurre4.

15BE

OX02

If a level 1 interrupt
occurred after unsasking,
ensure that 1M 1'76' indicated "type 1 cs level 1
check".

No indication of which adapter
caused the interrupt was given
in III X'76'.

15BE

OX03

Ensure that an OUT I'~~'
can reset a level one
cbeck.

After having found a level I
Y~E2
check present, the LIBs vere
yqr2
disabled and an OUT X'4Q' with
byte 1, bit 5 on (reset level
one checks) was issued. An IH
X'Qq' then indicated a level
one check as still being present.
Beg. X'1Q' contains the results
of the II X'qq' and reg. X'15'
indicatEs the check bit that
failed to reset:
Byte 1:
Bits 2 thru 5 - bit clock
check for LIBs I, 2, 3, or
4, respectively.
Bit 6 - LIB select check.

158E

OIOq

Ensure that no leyel one
checks are present when
a LIB is enabled.

After enabling a LIB and
unlasking le,el 1 interrupts,
a level 1 check occorred.
Beg. X'11' byte 0, bits 6
and 7 indicate which LIB was
enabled (0, I, 2, or 31.
Reg. X'15' indicates wbat
check occurred:
Byte 1:
Bi t$ 2- 5 - bit clock
cbeck for LIBs one
through q, respectively.
Bit 6 - LIB select check.
Bit 7 - outblls cbeck.

15BF

XXXI

Sode Bit Override: Ensure that sode bit override can override all interrllpt modes except sode 010. lfter
resetting tbe scanner, setting all line addresses to lode 010, and then ensllring that a line set to mode 00
cannot interrupt, lode bit override is set and a test made to ensure that the only line that interrupts
is the one set to lIode 00. (Tbe line set to sode 00 11111 be the first installed Don-autocall line found.)

15Br

OXOI

Ensllre that force bit
service (OU'I' X' 47')
callses a hit service
interrupt fros a line
set to sode 010.

o
o

o
o

o
o

o

D99-3705E-09

Type 1 Scanner 1FT

After attempting to force
a bit service level 2
intetrupt (via OUT l'q7'1
from the line a4drass
in Reg. X'11'. unsasking
level 2 interrupts and
vaiting. tbe time of a

FEALD
P1G!

FETKR
P1GE

CORKENTS

nF2

RS206

1-220

Pretest error.
Rerun routine
150&. (If
needed, display
reg. X' 1~' for
the I:8s01 ts of
aD III X.qq. to
determine the
sOQtce of the
level one.1

yqD2

Rll02

6-082

Test error.
Failure vas most
probably P-type
1 CS bit level In
on lLD page given,
failing to bring
up '+ input
type 1 CS
level I'.

BS105
R5206

1-300
1-220

test error.
Problem is in
the CS. Please
note that there
is no way to
force a level ope
cbeck of this
type in the
type 1 CS.
Tberefore, the
cause of this
error should be
found before
finding the
cause of the
level one
cbeck itself.

BS206

A-220

Test error.
Proble. is
probably in the
LIB tbat lias
enabled. Beplace
the LIB bit clock
control card
first. If failure
is a LIB select
check, first trJ
to deter.ine a
failing pattern
by continuing
from this error
stop and seeing
wbich other
LIBs fail.

Y~F2

1'4E2, lC4G2

PROG
IASK

003E

BS305

A-330
A-040

Pretest error.
Berun routine
1512.

X3705FU 5.0.81

IBn 3705 COftHUNICATIOHS CONTROLLER
TYPE 1 COftftUNICATIOHS SCANNER 1FT SYftPTO! INDEX
ROUT. ERROR POBCTION TESTED
CODE

setting all lines
to lode OlD, the
tested line address
can nov be set to
mode 00 via an OUT X'42'.

ERROR DESCRIPTION
scanner pass, no bit
service interrupt occurred
frol that line

15BP

0103

OX04

SUSPECTED ClRD
LOCATION(S)

PROG
ftASK

PEALD
PAGE

PETftft
P1GE

with data of all zeroes, an
IN 1'42' indicated SOle bits
were still set. Reg. X'1'"
contains the IN l'lf2' data
(anl bit ou is in error):
Byte 0:
Bit 6
Bit 7
Byte 1:
Bit 0
Bit ,
Bit 2
Bit 3
Bit 'I
Bit 5
Bit 6
Bit 7

15BP

D99-3705B-09

COft!ENTS

Rerun appropriate routines
as given. Reg
X'11' contains
tested line
address if
needed.

-

- lode bit 1
lode bit 2

RS3011
8S3011

A-170
1-170

Rerun 1550.
Rerun 155Q.

- low priority
- diagnostic lode bit
- data terlinal ready
- synchronous lode bit
- external clock bit
- data rate select bit
- oscillator select bit 1
- oscillator select bit 2

RS301f
8S306
IIS306
8S306
RS306
85306
RS306
R5306

1-170
1-160
1-160
A-'60
A-160
1-160
1-160
1-160

Rerun
Berun
Rerun
Rerun
Berun
Berun
Rerun
Berun

RS305

A-OlfO

Pretest error.
Rerun routine

Ensure that a bit service
level 2 interrupt is
prevented if lode 00 has
been set and lode bit
override is not set.

After having set lonitor
YlfG2
lode 00 and not setting
lode bit override,
starting the scanner and
waiting up to 30 lilliseconds for a bit service level
2 interrupt, one occurred.

Ensure that the lode
bit override latch
can now be set via OUT
l'ljO'.

After having issued
an OU~ X'IIO', an IN X'IIIf'
indicated that lode bit
override (byte 0, bit 0)
had not ~et.

YIIE2

1511C.
153C.
153'1.

\..

"
,/

152C.
,538.
'530.
15118.
15U.
(

"

158q.

8000

RS1011

A-230

Test error.
Rerun routine
150E.

15BP

OX05

Ensure that setting
mode bit override will
allov level 2 interrupts
frol all lines but lines
set to lode 0'0 (disable).

After having set lode
bit override with one line
Bet to lode 00 (norlally
disable), no level 2 interrupt
Occurred. (node bit override
did not override the lode 00
setting.)

IllG2

853011

1-230

~est error.
Prohle. 11
in tbe CS.
Probably
override
control on
ALD page
given failed.

15BP

OX06

Ensure that the line
address that caused the
bit service interrupt
was froa the line that
was set to lode 00.

After the interrupt, the
address of the line under
test did not coapare with
the line address that caused
the interrupt. Beg X""
contains the address expected to interrupt and
Reg X',II' contains the
address that did interrupt.

'"G2

RS305

A-OliO

~est

15BP

OX07

Ensure that setting
mode bit override vill
allow level 2 interrupts
frol all lines but lines
set to lode 010 (disable).

After having set mode
bit override with one line
set to lode 00 (normally
disable), no level 2 interrupt
occurred. (llode bit override
did not override the lode 00
setting.)
,

14G2

BS304

A-230

Test error.
Problem is
in CS.
Probably
override
control on
lLD page
given failed.

5.0.82 X3705PAA

(

error.
Apparentl,.,
since all
other lines
were set to
lode 010
and yet one
of them bas
caused an
interrUpt,
lode 010 bam
failed to
cOlpletely
disable two
interrupts
fro. that line.
Problem is
probahly in
the CS.

Type , Scanner IPT

o

o
o
o
o
o

18K 3105 COKKUNICATIONS CONTROLLER
TYPE 1 COKKUHICAflOHS SCANNER 1FT StKPfOK INDEI
ROOT. ERROR FONCTION TESTED
CODB
15BF OX08 Bnsure that the line
address tbat caused the
bit service interrupt
was fro. the line that
was set to aode 00.

BRROR DESCBIPTION
After tbe interrupt, tbe
address of the line under
test did not coapare witb
the line address tbat caused
the interrupt. Beg X'11'
contains tbe address eKpected to interrupt and
Reg X'14' contains the
address tbat did interrupt.

099- 31 058- 09
SUSPECTED CABO
LOCATIO. (s)
!4G2

nOG
IlASK

FElLO
PAGE
BS305

FETU
PAGE
A-OliO

o
o

o
o
o

15CO

XUX

Data set Ready and clear to Send on IS" Integrated Bodeas (leased lines only).
Bnsure first that Data Set Beady is always active and then ensure that Clear to send coaes
up .ithin 300 ailliseconds after setting Bequest to Send. {This routine is rnn on line types
Sa, 5b, apd 8a onlY.1

B21E:

,
0

All routines working witb IBK integrated lodeas, autocall Or answer units bave been
designed to atteapt to functionally test the aodeas. In aost cases, no suspected card
locations are given since the maintenance procedures on C-440 provide a
more tborough trouble isolation procedure. Wbep any error occurs that indicates
a possible aodea, autoca11 or answer problea please refer to these procedures.

15CO

0102

Force a bit service interrupt fro. tbe line address
under test.

After atteapting to force a
bit service level 2 interrupt
(via 00TI'41') froa the line
(BCBI address in Reg.X'.I',
unmasking level 2 interrupts
and waiting tbe tiae of a
scan neE pass, no bit service
inteErupt occurred fro. tbat
line.

15CO

OXQ4

Bnsure tbat data set
ready is always acti,e on
the 104ea interface.

An IN 1'43' failed to indicate
that Data set aeady was active
(Byte " bit 2 wal on aDd
Ibould not have been on.1 Reg_
1'14' contains the received
II X'43' data. Reg. X'11' contains the line address under
test.

15CO

OX08

Bn sure t ha t Beq ues t
to send can be set
with an OUT X'43'

rollowing an DOT X'43' witb
Y4G2
data of X'0002' to set Request to
send bit, an IH'43' indicated
i t 'falle~ to set. Beg X'11'
,po,n,tains t~fI line address
under test and Beg,x'14' contains
tbe received 1M 1'43' data.

15CO

OXOA

Force 'a bit service interrupt froa tbe line address
under test.

After attempting to force a
bit service level 2 interrupt
(via OOT X'41') fro. the line
(BCB) address in Beg. X'1",
unmasking level 2 interrupts
and waiting tbe tile of a
scanneE pass, no bit service
interrupt occurred fro. tbat
line.

15eo

oxoe

Bnsure that Clear to Send
coaes up witbin 300 .illiseconds after setting
Requ~st to Send.

Clear to send failed to set
in 1M 1'43'. Reg X'II' contains the line address under
test and Beg X'141 contains

'I

o
o
o
o

eOBBENTS
'rest error.
Apparently,
since all
otheE lines
were set to
aode 010
and yet one
of th.. bas
caused an
interrupt,
1I0de 010 bas
failed to
completely
disable tllO
interrupts
froa tbat line.
"'roble. is
probably 10
the cs.

Type 1 Scanner 1FT

Y4F2, Y4G2

BS305

A-030
A-040

Pretest error.
Berun routine
1512

Test error.
If necellary,
thil hUun
can be Ie oped
wbile Itopped
at tbis error.
Bun routine
1500 to belp
isolate probl ...
Uso, if UB
type 8, cbeck
OSB juaper on
ltD page
'QXU.
0200

IS308

A-180

'rest error.
A-200 Berun routine
1526.

BS305

A-030
A-040

Test error.
Rerun routine
1512.

Test error.
Berun routine
1518 to prove
tbat clear to

X3105FAA 5.0.83

IBK 3705 COnnUHIC1TIOHS CONTROLLER
, TYPE 1 COKHUNIC1TIONS SCANNEB 1FT SY"PTOK INDEI
ROOT. ERROR PUNCTION TESTED
CODE

EBROR DESCRIPTIO.
the results of the IN X'43'.

15C2

XXXX

119 9- 31 05E- 09

SOSPECTED CARD
LOCATIOn(S)

PROG

!ASK

FEALD
PAGE

FETK!
PAGE

COKUHTS
send can be
set via diagnostic lIode. If
that runs, run
routine 15EO
(manual intervention Routine)
to help diagnose
tbe error further. Also,
cbeck botb
DSB and CTS
delay
jUllpering.

.,'
,

~I'

External Clock Test: By stopping tbe scanner at the tested address and allowing five bit overruns to
occur, the average speed of each external clock in all integrated lIodems is deterlline4 and tbep
examined to ensure that the tested clock bas caused strobes to occur within 0.1' of the external clock's
bit rate. This routine will be run on LIB types 5 tbrough 1 only. Each line is run, first in receive
and then in transmit lode, with data rate select off (1200 BPS). Then each line is run, as above, hut
witb data rate select on (2400 BPS).
All routines working with IBK integrated lIodels, autocall or answer units, have been
designed to attellpt to functionally test the lodells. In lost cases, no suspected card locations
are given since the maintenance procedures on C-440 provide a lore thorough
trouble isolation procedure. When any error occurs that indicates a possible lIodell,
autocall or answer proble., please refer to these procedures.

!~~!:

15C2

OX02

Ensure that force bit
service (Out X'47') eauses
a bit service interrupt from
tbe line address under test.

15C2

OX04

Ensure that an OUT 1'42'
After issuing an OOT X'42 at
r4G2
bas properly set the external the tested line address, an IN
clock bit and data rates
1'42' failed to reflect the
select bits.
OOT X'42'. Beg. X'14' contains
the actual data received by the
IN X'42' and teg. X'15' contains
the blts in error:

B5305

After attempting to force a
14F2, Y4G2
bit service level 2 interrupt
(via OOT X'47') from the line
(BCB) address in Beg. X'11',
unmasking level 2 interrupts and
vaiting the tile cf a scanner
pass, no bit service interrupt
occurred frol that line.

15C2

0106

Ensure that an OUT X'43'
bas set transmit or receive
lIode.

5. 0.84 X31051'AA

After issuing an OOT X'43' to
the line under test, an IN
X'43' indicated that the
trans.it lode bit failed to
set or reset.. Reg. 1'14'
contains the received IN
X' 43' data.. The transllit
lode bit !byte 0, bit 4)
should have been tbe oP.posite

14G2

A-030
1-040

Pretest error.
Rerun routine
1512.

1-150

Pretest error.
Rerun appropriate
routines as
specified
below. Beg_
X'11' contl1ns
tailing Una
address 1f needed.

B5304

1-170

Rerun 1550.

RS304

1-170

Rerun 1554.

85306

1-110

Rerun 154C.

RS306

A-160

FF1'l'

Byte 0:
Bit 6-lode bit
set
in error.
Bit 1-mode bit 2 set
in error.
Byte 1:
Bit O-lov priority set
in error.
Bit 1-diagnostic mode bit
set in error.
Bit 2-Data Terminal Beady
set in error.
Bit 3-synchronoQs lode
set in error.
Bit 4-external clock bit
failed to set.
Bit 5-data rate select failed
to set to the proper state.
Bit 6-osc111ator select
bit 1 set in error.
Bit 1-oscillator select
bit 2 set in errnr.
0600

'-

RS306

1-160

Rerun routines
153A and 153C.
Berun 1534.

BS306

A-160

Rerun 152C.

.BS306

1-160

Berun 1538.

BS306

A-160

Berun 1530.
Rerun routines
1542 and 1544.
Rerun routines
1546 and 1548.

BS306

1-160

RS306

1-160

B5306

A-200

>,,'

,,

Pretest error.
Berun routines
1511 and 151C.

.'

Type 1 Scanner 1FT

,.(~,

L\

J/

"~'~-~""'"

0
0
0
0
0
0
0
0

0

-.-~,~,~~~-~-.~-

...

_------'---

IBft 3705 cosnU.ICATIOR' CORTROLLER
TYPE 1 COftftUHICATIOBS SCABBBR 1Ft S'"PTO" IIIDEX
BOUT. BRRoa l'UIICUOII nSTID
CODa

BaBOR DBSCRlPUOI
of vhat it vaa.

D99- 3105E-09
SOSRCTID CARD PBOG
LOCAUOII(s, "UII

FBALD
PAGI

i
I

Insure that bit overrun
can be set 1ft the Une
1nt~rface Inder test.

After vaiting up to 60 ailliseconds (the scanner is still
stopped at the tested address)
no bit overrun occurred. Beg...
1'1" contains the line
address under test.

0001

pretest error.
DispllJ Beg •.
1'111'. If bfte
0, bit" is
on Une 18 in
TI aode. If
Ilot. it is in
receiv. aode.
lOTI: :tf in
trallsait aode.
this error Bal'
be caused bf
loss of external
clock. (Ill
receive aode.
overtons shou14
occur anJwa!
beense at the
internal
backup clock ••

15C2

Oloe

Bnsure that bit overrun
can be set ill the line
interface under test.

After vaiting up to 60 ailliseconds (the scanner is still
stopped at the tested address)
no bit overrun occurred. Beg.
1'11' contains tbe line
address u~der test.

0001

'fest error.
Berun routine
1588. problea
aaJ be in overrun
latch on. line
interiace card.
Ion: If in
transa1t aode.
tbis error. aa!
be caused bJ
loss of external
clock. (In
receive .ode.
overruns should
occur anyvay
because of the
internal
"actop c~oclt.1

15C2

OIOB

Bnsure that vhile aeasuring
the external clock speed.
as each bit Overrun occurs,
it can be reset.

Folloving a bit overrun, OUT
I'''''' vith byte 1, bit 7 on
vas issued to reset the overrun. An IN X'1I3' tben indicated tbe overrun vas not
reset. Beg. I'll' contains
tbe line address under test.

15C2

0110

Before cbecking tbe
extexnal clock's average
spee • ensure tbat all five
overruns occurred.

After vaiting a aaxiana .aount
of tiae. less than five bit
over tuns occurred.

I

I

G!

, I
II

e

c 011 IIB11'U

0108

I

0
0
0
0
0
0
0

UTI"
PAGI

15c2

I
I
I

0

........

!

tIIB2

IS 1Oli

1-3110 'fest error.
Beron ro"tine
1588.

test error.
Vroblel 1a
Probabll' interaittent. lIerun
alld loop on
. routine 1588.
elf needed.
byte 0 Clf reg.
11'1 .. ' contains
the Duabet of
. overtune that
were not .
t8~~lYe4.)

lOTI:' U in
transaU lode.
tbie error lay
be caused.b,
loss of external
clOCk. (In
recei". 104e.
overrUDS sbou14
oc,cur· anyllay
because of the
internal
..
backup c~ock~t
,5C2

0112

Ensure tbat no external
clock is running too slow.

'.fest error.
Problea is probably in tbe
lode .. clock

The amount of tile it toak
flve bit OyerrUDS to occur vas
greater than 0.11 aore tban
vbat is sbould have taken.

0

e

lC3105FU 5.0.85

TfPe 1 Scanner 1FT
\'

1

()
IBlI 3'105 COIII\UNICA'fIONS COII'rROLLElI
TYPE 1 CO""OHICATIOIIS SCANIIBlI 1FT SYI\PTOI\ INDEX
ROUT. ERROll FUIICTION TBSTED
CODE

EaaOR DESCRIPT10N

D99-3705E-09

Beg. X'11' contains the tested
line address. Byte 1, bit 5 on in
reg X'16' indicates tbe 2400 BPS
external clock was under test. Bit
5 off indicates the 1200 BPS external
clock was under test. If byte 0, bit
4 of reg. X'16' is on, the tested address
is on, the tested address was
was in trans_it lIode. If not, it
was in receive mode.

15C2

15C"

Ensure that no oscillator
is running too fast.

XXIX

.:( )
'Ie.

SUSPECTED CARD
LOCATION(s)

PROG
IIASK

FEALD
PAGB

PETftK
PAGE

The amount of time it took
five bit overruns to occur was
greater than 0.11 less than
what it abold hsve taken.
Beg X'11' contains the ~ested
line address. Byte 1, bit 5 on in·
reg X'16' indicates the 2400 BPS
external clock was under test. Bit
5 off indicates the 1200 BPS external
clock was under test. If byte 0,
bit 4 of reg X'16' is on, the
tested address was in transmit
mode. If not, it was in receive
Bode.

COIIIIENTS
card, but may
also te in tbe
line interface wbe
the external clock
is gated in.
It should
be possible
to scope
this failure
while stopped
at this error
stop. Start
scoping at
the Une
interfaca card.
NOT!: Becauso
of the backup
clock, in
receive lIode
strobes lIill
stUl be
present even
if tbe external
clock :l.s not
there at all.
Test error.
Problem is probably in the I
lodems clock card,
but may also be in
the line interface
where the eEternal clock is
gated in. I t
should be
possible to
scope this
failure IIhile
stopped at
this error
stop. Start
scoping at
the line
interface card.

... J

.j

Internal Kodem wrap: Insure that 255 marks can be internally wrapped through the IBK integrated
modems in LIB types 5 through 7. This ~outine is run on all 80dems installed in LIB types 5 througb 7.
It is equivalent to test 2 of the 3872. Each line is run with the ~ata rate selector bit off and then
each line is run wit~ it on.

!2l!: All routines working with integrated mode8s, autocall or answer units have been
designed to attempt to functionally test the modems. In sost cases, no suspected card
locations are given since the maintenance procedures on C-440 provide
a Bore thorough trouble isolation procedure. When any error occurs that indicates
a possible mode8, autocall or answer problem, please refer to these procedures.
ISC"

0102

Ensure that force bit
Service (out 1'41') causes
a bit service interrupt frol
the line address under test.

After attempting to force a bit Y"P2, Y4G2
service level 2 interrupt (via
OUT X'lj7') frOI the line (BCB)
address in Reg. X'11', u.masking
level 2 interrupts and waiting
the time of a scanner pass, no
bit service interrupt occurred
froll that line.•

8S305

&-030
A-040

Pretest error.
Rerun routine
1512.

1SC"

OXO"

Ensure that the external
clock and aiagnostic mode
bits in IN X'42' can be
set by issuing OUT 1'42'
with byte 1, bits 1 and
4 on.

Either the external clock
bit failed to set or tbe
diagnostic mode bit failed
to set or other hits in tbe
IN X'42' turned on in error.
Reg X'11' contains the line
(BCB) address under test.
Reg. X'15' contains the bits
in errOl:. (eyte 2, bit "

R5306

1-150
A-160

Pretest error.
Rerun routines
1536 and 1538

{ .',

'...

5.0.86 X3105l'AA

Type 1 Scanner IPT

'i

.F

o
o

o
o
o
o
o

15K 3705 CON~UNICATIOHS CONTBOLLEa
TYPE 1 CO~"UNIClTIONS SCANNEB 1FT SyaPTO" INDEX
BOUT. EBBOB FUNCTION TESTED
CODE

OXD6

Ensure that the external
clock can create a strobe
and cause a bit service
level 2 interrupt from
the tested line.

After having set monitor mode
11 to allow noraal bit service
requests, selecting the
external clock. starting the
scanner and waiting up to 30
milliseconds for a bit service
level 2 interrupt fro. the line
under test, none occurred.

1 SC~

oxoa

Ensure that request to
send has been set by
issuing an OUT X'43' with
byte 1, bit 6 on.

Either the Request to Send bit f4G2
failed to set or other bits
were set in error in the IN X'43'.
Reg. 1'11' contains the line
(BCR) address under test. Reg 1'15'
contains the bits IN X'43' in error.

15C4

OX10

Ensure that the line under
test interrupts at least
once every 30 milliseconds.

During the process of sending 255 bits
no interrupt occurred fr08 the
line under test within 30 8illiseconds of the previous interrupt.

15c4

OX12

Ensure as each interrupt
occurs, that the tested
line is receiving a mark
and that no error conditions
are present.

During the process of sending 255
bits an 1M '43' indicated that
conditions were not sutiable
for continuing the test. Req.
X'14' contains the received
IN X '43' data and reg X'15'
indicates Which bits were in
error;

o

Byte 0:.
Bit O-receive data
was a space.
Bit 3-receive data lead
set to 1\ space
Bit II-trans.it mode erroneously set
Bit 6-Bequest to send latch
not set
Byte 1:
Bit o-Clear to Send was
Dot up
Bit 5-diagDostic lode not
set
Bit 7-bit overrun/underrun
set in error.

o
o
o

o
o

SUSPECTED CABO
. LOCl\TION Is)

15C4

o
o

o
o

EBBOH DESCHIPTION
on indicates an external
bit failure.) Beg. l' 14'
contains the actual data
received by the IN '42'.

D99-3105E-09

PROG
IIASK

FEALD
PAGE

FET""
PAGE

COKHENTS

P retest error.
Rerun routine
15C2.
IBemeliber that
in receive
mode, the
internal backup
clock should be
causing strobes.)

OABQ

B5308

A-1ao

.-200

Pretest error.
Rerun routine
1578.
.
&eg. X'14' contains the actual
data received by
the IN 1'43'.
Also, rea ember
that diagnostic
.ode should
force up RLSD,
DSR and (if RTS
is upl CU.
Test error.
Beg X'16' contains the storage
address of a byte
in core which contains the residual
bit count left.
Reg X'13' contains
the OUT 42 data.
Reg X'11' contains
the line under
test. Rerun
routine 15C2.

8215

'J:est error.
Reg X'16',
contains tile
storage
address of
Ii byte in
core whicb
contains the
residual count
left. Reg_
1'1" contains
tbe line
un4er test.
(See note.
below)
(See note,
below)
Rerun routine.
,51A and 1SaC
rerun routine.
1526 alld 1528
Herun routine.
1578

RerUn routine
153:8 alld a540

NOTE: If receive data vas in error but receive data lead was not,
--prOblem is probably in line interface. If not, problem probably
exists in modem. It should be possible to scope a problem ill tbe
modea while stopped at this error stop •. The mode, sbould still
be wrapping the all marks pattern. Also please see note following
the routine description.

Type 1 Scanner 1FT

X3705FAA 5.0.87

IBn 3106 CO"nUNtcATIONS CONTROLLER
~ffE 1 COn"QNICA'.rIONS SCANNER IF~ SYnf'.ron INDEX

D99-3105E-09

ROUT. ERROR FUNCTION TESTED'
EBBOB DESCRIPTION
SUSPECTED ClIlD PBOG FEALD rET"" COli IIl!NT S
CODE
LOCATION (Sl IlASK fAGB
fAGB
15C6 XXXX Internal nodel Wrap (LIB's 8 and 91: Insure that 25q alternate larks and spaces can be wrapped
through the integrated modems of LIB types 8 and 9 utiliZing the modelS self-wrap capability.
The routine finds the highest allowable speed oscillator installed and uses it to run the test.
The first installed non-autocall interface is used as the transmit line to set the test data latch
in the CS. 25q bits are then wrapped through each installed lodea in turn.

HQ1E:

Throughout the error descriptions for this routine, reference will be lade to
"the transmit line" and lithe receive line." lIemelbel: that the transait line is not
associated with the lode. that is being tested. It is nothing lore than a vehicle used to
set the test data latch in the CS. The line interface for LIB types e and 9 is designed
such that if the line interface is in diagnostic and receive aodes with data terlinal
ready on, the test data latch in the CS is gated into the send data trigger in the line
interface. Send data is then wrapped through the lodel and back into the roceive buffer of
the saae line interface. Thus "the transmit line" refers to the interface being used to set
the test data latch and "the receive linen refers to the interface and lode. through which
the data is actually being wrapped.
All routines working with integrated modems, autocall or answer units have been
designed to attempt to functionally test the modems. In most cases, no suspected card locations
are given since the maintenance procedures on C-IIIIO provide a aore thorough
trouble isolation procedure. When any error occurs that indicates a possible modem,
autocall or answer problem, please refer to these procedures.

~Ql~:

15C6

15C6

OXP2

OXOq

l'orce a bit service level
2 interrupt fro I the receive
line.

After attempting to force a
bit service level 2 interrupt (via OU'I X'q1'1 from
the line (BCBI address in
reg X'11', unmasking le,el
2 interrupts and waiting
the time of a scanner pass,
no bit service interrupt
oC~.~1':red frdll t~at line.

yq1'2,Y4G2

Set the receive diagnostic
and monitor mode 11 with
Data Terainal Ready on and
select an oscillatqr.

After issuing an OUT X'42'
at the selected line address,
an IN X'Q2' failed to reflect
the OUT X'Q2'. Reg~ X""
contains the line address of
the receive line. Beg X'14'
contains the received IN
X'Q2' data and reg X'15'
contains the bits in error:

YIIG2

RS305

A- 330
A-OliO

,,,.

Pretest error.
Rerun routine

r'

'512

031'F

A-1~0

Pretest error.
Rerun the
appropriate
routine as
given below.

'\,

Ilfte 0:
Bit 6 - lIIode bit
to set.

failed

BS3011

A-110

Berun routine
15QB.

r

Berun routine
'552.

Bit 1 - lode bit 2 failed
to set.
8yte 1:

5.0,.88 X3105l'AA

Bit 0 - low priority set
in error.

RS3011

1-"0

Berun rOlltine
1540.

Bit 1 - diagnostic aode
failed to set.

BS306

A-160

Berun routine
1531.

Bit 2 - data teuinal
ready tailed to set.

BS306

A-160

Rerun ,0llUne
1532.

Bit 3 - synchronous lode
bit set in error.

BS306

1-160

Rerun routine
1521.

Bit Q - external clock
bit set in error.

BS306

1-'60

Berun routine
1538.

Bit 5 - data rate select
bit, set in error.

115306

A-160

Rerun routine
1530.

Bit 6 - oscillator select
bit 1 failed.

BS306

A-'60

Berun routines
15112 and 15/iQ.

Bit 1 - oscillator select
bits 2 failed.

B5306

1-,60

Berun routines
15Q6 and 15118.

Type 1 Scanner 1FT

"

.r

o
o

o
o
o

IBII 3105 COIII\UMlCA'l'lOt/S CONTROLLER

D99-370SE-09

TYP! 1 COllftUdICATIOMS SCANNER 1FT SllIPfOIl INDEX
lOaf. ERROl PUNCTION TESTED
15C6

COOl!

0106

,0

lait 300 .1lliseconds then
start the scanner and force
another bit service level
2 interrnpt fro. the
receive line.

o
o
o

o
15C'

o

IXOI' Check that Clear to Send has
now co •• np at the receive
address. (E,en though !TS
has not been set, diagnostic
•• de in LIi types 8 and 9
forces RTS np in the modea.
As a resnlt, after the
aaxi.na CTS delay, CTS
shedd can up.)

o

ERROR DESCRIPTION

SUSPECTED CARD
LOCATION (s)
Either the scanner could not
be started again or after
attelpting to force the next
bit service interrupt and
w~iting the time of a scanner
pass, no bit service interrupt
from the line under test
occurred. Reg. J'11' contains
the line (BCB) address from
which bit service was to be
forced. Value of Reg. X'15'
describes the failure:
I'EOOO' - the OaT X'41'
nG2
failed to reBet the type 1
CS level 2 bit in IN 1'77'
(however, no feedback
check was present).
X'COOO' - the OaT 1'41'
141'2
failed to reset the type 1
CS level 2 bit in IN X'77'
because a feedback cheCk
vas present.
X' 8000' - the OUT X'Ql'
nF2, X4G2
was successful but the
OUT I' 47' (force bit
service) failed to cause
• bit service interrupt.
lfter waiting 300 .illiseconds
an IN X'43' executed while
stopped at the receive adiress
indicated either Clear to send
bad not coae up or other
conditions were in error. Reg
X'11' contains the receive
line (BCB) address. Reg 1'14'
contains the results of the
III 1"3'.• Reg X'15' contains
the bits in error:

14G2

PROG

PEltO

PETIIII

nASK

PAGE

PAGE

EOOO

RS202

1-240

BS305

A-330
1-2QO

1-1BO
1-200

4FBII

pretest error.
If cors failed,
problea 1&
probably in
lodel. Try
running routine
15EO. Uso,
if necessary,
it should be
possible to
IIIcope this
failure wbile
stopped at thi
error stop. I f
oth er III till are
in error, rerun
routine. as
given helow;

Bit 1 - a feedback cbeck
present.

!S202

aerun routine
1571.

Bit q - transsit .ode bit
set in error.

115301

aerun [olltine
151C.

Bit 5 - new sync bit set
in error.

IIS30B

lIerun routine
,520.

Bit 6 - RTS set in error.

R530B

Rerun routine
1528.

Bit 7 - Send data mark
set in error.

!53011

Rerun rouU ne
152Q.

illS

o

Pretest error.
Rerun routine
1512.

115305

Byte 0:

o
o

COllllEIIT5

Byte'1:
Bit 0 - CTS failed ~o coae
up. (Ignore if byte 1, bit
5 in error also).

RS307

Bit 2 - DSR not forced up
by diagnostic sode. (Ignore
if byte 1, bit 5 in error
also. )

BS307

Rerun routine
1578.

Bit 5 - diagnostic aode
bit failed.
15c6

0101

1'orce a bit sen ice level

Type 1 Scanner 1FT

After attempting to force a

RS305

1-330

pretest error.

X37051'11 5.0.89

/)
.'1<.)1

IBM 3'05 COMMUNlCATIONS CONTROLLER
Tl?E 1 COMMUNiCATIONS SCANNER 1FT SYMPTOM INDEX
ROUT. ERROR FUNCTION TESTED
CODE
2 interrupt from the
transmit line.

1SC6

OXOC

Set the transmit line to
diagnostic and .onitor
mode 11 and select an
oscillator.

D99-370SE-09

ERROR DESCRIPTION
bit service level 2 interrupt
(via OUT X'Q7') from the line
(BCB) address in reg X' 11',
unmasking level 2 interrupte
and waiting the time of a
scanner pass, no bit service
interrupt occurred from that
line.

SUSPECTED CARD
LOCATION(s)

After issuing an OUT X'q2'
at the selected line address,
an IN X'q2' failed to reflect
the OOT X'q2'. Reg X',q'
contains the actual IN X'1S'
contains the bits in error:

PROG
"ASK

FEALD
PAGE

031'1'

FETMM
PAGE
A-OqO

COMMENTS

A-ISO

Pretest error.
Reg X'11' contains
the selected
line address.
Rerun the appropriate routine
as given:

Rerun routine
1512.

'.. /

~.

BytE. 0:

Bit 6 - mode bit
to set.

failed

RS30Q

1-110

Rerun routine
ISQE.

Bit 1 - mode bit 2 failed
to set.

RS30Q

A-170

Bit 0 - low priority bit
set in error,.

R530Q

A-110

Rerun routine
15QO.

Bit 1 - diagnostic mode
failed to set.

RS306

A-t60

Rerun routine
153A.

Bit 2 - data terminal
ready set in error.

nS306

A-160

Rerun routine
153Q.

Bit 3 - synchronous mode
bit set in error.

R5306

1-160, Rerun routine
152C.

Bit Q - external clock
bit set in error.

R5306

A-160

Rerun routine
1538.

Bit 5 - data rate select
bit set in error.

RS306

A-160

Rerun routine
1530.

Bit 6 - oscillator selected
bit 1 failed.

RS306

A-160

Rerun routines
15Q2 and 15QQ.

Bit 7 - oscillator select
bit 2 failed.

RS306

1-160

Rerun routines
ISQ6 and ISQS.

RS305

1-330
1-0QO

Pretest error,
Rerun routine
1512.

A-leo
A-200

Pretest error.
Probably a
bad line
interface. Rerun
routines as
indicated
below:

Rerun routine

1552.

Byte 1:

1SC6

OXOE

Force another bit service
level 2 interrupt from the
transmit address.

After attempting to force
YQ1'2, y4G2
a bit service level 2 interrupt
(via an OUT X'Q7') fro. the
line (BCB) address in reg.
X'11', unmasking level 2
interrupts and waiting the,
time of a scanner pass, no bit
service interr,upt occurred
from that line.

15c6

OX10

Set the transmit line to
transmit mode and set
send data to a mark.

After having set the selected
address (found in reg. X' II')
to diagnostic mode 'and issuing
an OUT X'43' to set transmit
mode and mark, an IN X'Q3'
indicated one or more improper
conditions. Reg X',q' contains
the actual IN X'43' data and
reg X'1S' indicates the bits
in error:
Byte 0:
Bit 1 - a feedback check
occurred.

5. O. 90 X3705FAA

R5202

Rerun routine
157 A.

Type 1 Scanner 1FT

t-),

t

)!

o
IBK 3705 COKnUIIICATIOIIS CONTIOLtEB
TYPE 1 COftKUIIICATIOIIS SCAIIKBB 1fT St"PTOft INDEX

, ROUT. ERBOR fUNCTIOII TE5'EED
CODE

0
0
0
0

ERROR DESCRIPTION

D99-3705E-0!)

SUSPECTED CABO
LOCATION(S)

PIOG
BASK

PEAtD

PETISB

UG2

Bit 7 - send data bit
failed to set.

fIIG2

115308

Rerun routine
1522.

tIIG2

BS307

Berun routine
153E.

YIIG2

115305

A-OliO

PAGE

Rerun routine
151&.

Byte 1:
Bit 5 - diagnostic mode
fdled to set..
-:5C6

0112

Allow 2 normal bit services
froll the transmit line to
occur.

Although the translli t time
has been set to lIode 11, 2
level 2 bit service interrupts failed to occur froll
that line in 60 milliseconds.
(Beg X'11' contains the
transmit line's address.)

o

15c6

OX13

The expected line did not
interrupt. Reg 15 contains
the bits in error.

12P2

SB2011

7-260
7-0'10

o

forced bit SYC froll xllit line
to turn off all interface
leads. Beg 14 contains the
xllit line address.

15<:6

112P2

5B2011

7-260
7-040

o

forced bit SYC froll receive
The expected line did not
line to turn off all interface interrupt.. Reg 15 contains
leads. Reg 14 contains the
the bits in error.
receive line address.

15C6

Forced bit SYC fro. xai t
line to set the send data
to space. Reg 111 contains
the xmit line address.

The expected line did not
interrupt. Reg 15 contains
the bits in error.

121'2

5B204

7-260
7-0110

forced bit SVC from receive
line to turn on the break
featllre. Reg 14 contains
the receive line address.

The expected line did not
interrupt. Reg 15 contains
the bits in error.

112P2

SB204

7-260
7-040

forced bit SYC fro II x.it
line to begin sending "ark
for 500ms. Beg 14 contains
the x.it line address.

!he e,pected line did not
interrupt. Beg 15 contains
tbe bits in error.

121'2

5B2011

7-260
7-0110

Porced bit SVC froll xmit
line to begin sending space
for 5001ls. Beg 111 contains
the xmit line address.

The expected line did Dot
interrupt. Beg 15 contains
the bits in error.•

1<2P2

SB204

7-260
7-0110

forced bit SYC froll receive
line to change, 1I0de bits~
Reg 111 contains'the receive
line address.

''tll~ Iii ts ih' err'or.

The expected line did not
interrupt., Beg 15 contains

121'2

SB2011

7-260
7-0110

15C6

O
!

',I

o

o
o
o

COIIIIBIITS

Bit II - tunuit mode bit
failed to set.

P1GE
85308

15C6

15c6

15C6

OX14

OX 15

OX16

OX17

OX 18

OX 19

Pretest error.
Probably an
interaittent
loss of strobe.
Rerun routine
1580.

This is is break
feature test error.

This is a break
feature test error.

This is a break
feature test error.

This is a break
feature test error.

This is a break
feature test error.

This is a break
feature test error.

This is a break
feature test error.

At this point the Routine vill start handling transmit and receive interrupts
asynchronously. AS each transllit interrupt occurs, the send data bit will be inverted.
As each receive line interrupt occurs, receive data is checked to ensure that the
alternating bits being sent are being received. !his continlles until 254 bits have
been sent and received. Since there is approximately a 1.5 millisecond delay through
the lIodem, the transmit line will always be a few bits ahead of the receive line.
At each of the remaining error stops in this routine, Beg X'16' contains the
storage address (~ of additional error information. Check the break test flag when checking
the following stops, if the break test flag is on, the break feature lIay be failing.
X
1+2
1+11

line address of the transllit line.
address of the receive (wrapped) line
receive bit count (this count is decremented froll X'fE' after each bit is
received)
1+5
expected receive data (receive data bit is bit 0)
1+6 = transllit bit count (this count is decrellented froll X'PP' before each bit
is sent.)
X+7 = last transmitted data (send data bit is bit 7)
1+10
Break test flag: 0001 indicates that a line set 12A or 12B is being tested
with the alternate bit wrap; 0002 indicates that the break feature is being
tested on the line set 12A or 12B.

Type 1 Scanner 1fT

= line

X3705fA1 5.0.91

IBn 3705 COnftUHlC1TlOHS CONTROLLER

D99- 370511- 09

TIPB 1 COKKUHICATIOHS SCAHHII 1FT SYKPTOn INDEX
ROUT. BRBOR PUBCTIO. TBSTED
CODE
15c6 OX22 Ensure that a bit service
level 2 interrupt occurs
froa one of the lines under
test at least once every 30
11111.econd ••

SUSPECTED CARD
LOCUIONIsl
tIIG2
After resetting the previous
bit service interrupt, either
no interropt occurred wit bin
30 lilliseconds or a line otber
than the two being used
interrupted. If byte 0, bit 0
of reg. 1'13' i. off, no bit
lervice occurred. If it l_
on, I line other thin tbe two
being te.ted interrupted (it.
address is in the relainder
of reg. 1'13'1.

PROG
IIUK

15C6

An IH 1'43' executed following
a bit service interrupt fro.
the transait line, indicated
that the previous bit had not
been properly sent. Reg X'13'
contains the received IN 1'43'
data. Any of the following
bits aay have caused the error:

2900

OX2~

As each trans.it line
interrupt occurs, check
that each b!t has been
sent.

BRROR DBSCRIPTIO.

PEALD
PAGE
85305

PET"II
PAGE
1-040

COIIIIENT5

A-200

Test error.
Probably an
inteuittent
problem in
the assocb ted
line interface.
Rerun routine
158A or as
indicllted belo,,:

Byte 0:

15C6

OX26

After transaitting all 254
alternate marks and spaces,
disable the transait line.

Test error.
Rerun routine
1580. PrObably
an intersittent
loss of strobe.
(See the comlIent above
this error
deSCription
for additional
infonation.)

pit 2 - interface check
sUllIarJ if on

XlIP2

RS202

Berun routin&s
151C, 15n,
or 15BO.

Pit 4 - trans lit lode bit
i f it dropped.

14G2

R5308

Berun routine
152A.

Bit 7 - send data bit if it
was not the sa.e as the last
tranSiitted bit.

14G2

RS308

Rerun rout! nes
1522 and 1524.

After the transmit bit count
went to 0, an OUT X'42' was
issued with all zeroes. An
in X'42' indicated a bit
or bits still on. Reg X'13'
contains the in X'42' data.
Any Bit on is in error:

"/

Hso. i f diagnostic lIode
dropped layte 1,
bit 5 of the IR
X'43' data "as
off) rerun
routine 1531.
(See the co,aent
preceding
error code
15C6, 0122 for
additional
iaformation.)

Y4G2

pppp .

A- 150

Test error.
Probably a
bit intermittently failing
in the Associated line
interface. (See
the COlllent
preceding
error code
15C6, 0122
for additional
infor.ation.
Rerun:

Byte 0:
Bit 6 - lode bit 1

BS30~

11-110

Routine 1550.

Bit 7 - lode bit 2

R530Q

1-170

Routine 1554.

Bit 0 - low priority bit

85304

A-170

Routine 154C.

Bit

Byte 1:

5.0.92 X3705PU

RS306

A-160

Routine 153C.

Bit 2 - data terainal
ready bit.

RS306

A-160

Boutine 1534.

Bit 3 - synchronous

R5306

11-160

Routine 152C.

- diagnostic .ode

Type 1 Scanner 1fT

'.;,.

,I'

t. , ~\j

('~
\~,

.;/

o
o

o
o

IeM 3705 CO"MUNICATIONS CONTROLLER
TYPE 1 COMMUNICATIONS SCANNBR 1FT SYMPTOM INDEX
ROUT .• ERROR FUNCTION TESTED
CODE

FEUD
PAGB

FETH"

COKIII!NT5

Bit 4 - external clock
bit.

R5306

A-160

Routine 1538.

o

Bit 5 - data rate
select bit (secondu:y llrap) •

R5306

A-160

Rout1ne 1530.

B5306

A-160

Routine 1511".

o

Bit 6 - oscillator
select bit 1.
Bit 7 - oscillator
select bit 2.

R5306

A-160

Routine 1548.

o

15C6

0128

After tunsdtting all bits
ensure that the receive line
has received at least the
first space bit.

Even after all bits were
transaitted, the receive line
had not yet receiYed the first
space. There should be no
more than 1.2 lilliseconds
4elay througb the modol and
since 2SQ bits IIere sent the
receiye line should have
received the first one by
the time tbe last one is
transd tted.

15c6

012&

As each receive line
interrupt occurs, ensure
that modem is IIrapping
data and operating properly.

After a receive line interrupt,
an IN X'Q3' indicated that
either incorrect data lias
received or an error condition
vas detected. Reg X'13'
contains the received IV X'43'
data. Any of the follolling
bits could have caused the
error:

o
o

PROG
1lA5K

PAGE

Test error.
Suspect a
problem in
the path of
carrier
through the
model. 1'he
ent ire moae m
receiver may
be bad. Try
adjusting
lIodem 1'X
level.
A080

'lest error.
If C'r5 ~ropped
or receive
data did not
cOllpare, look
for a modem
problem (see
comllents preceeding 15C6,
OX22 for
additional
information. )
If interface
check sillmary
was on, rerun
routines 1586,
l5AE, or 15BO.

Byte 0:
Bit 0 - received data may
not have been as expected
(See the expected receive
data field.1

o

Bit 2 - interface check
sUlillary lias on.

o
o

SUSfECTBD CARD
LOCATION (Sl

mode bit.

o

o
o

ERROR DBSCIIIPTION

D99- 3105E-09

Byte 1:
Bit 0 - if on, CTS dropped.
15C6

012B

The routine has completed
the normal data IIrap and is
nOli testing the break
feature. The routine is
holding the xmit line at
mark level for 5001s.

The receive line was found
at spsce rather than mark.
check the lodel card for the
line set under test.

15C6

OX2c

Tbe routine has coapleted
the normal data IIrap and has
transmitted all .arks for
500as IIith the secondary
wrap turned on. The routine
is sending space for 500ls
and should receive space.

After a 10ms delay at the
lark-to-space change, the
receive line was found at
mark rather than space. The
address in register x'16' plus 2
bytes contains the address
of the failing line. Check
the model for the failing
line.

Type 1 Scanner 1FT

X3705FU 5.0.93

.f I.

"'- j

IBft 3705 COftftOHICATI0HS CONTROLLEB
TUS, 1 COIIIIONICA'l'10HS SCAlllln 1FT SYIIPTOft IIiDEX

099-37058-09

BOUT. EBBOR FONCTION TESTED
ERRoa DESCRIPTIOH
SUSPECTED CARD PROG FEALD FETsn conBEIiTS
COOS
LOCATION(sl "ASK PAGE
PAGE
15C7 XXXI Internal aodel Rrap (LIB 10 and line set X and II: Insure that 25~ alternate larks and spaces can be
wrapped through the integrated lode IS of LIB types 10 and 11 utilizing the lodels self-wrap capability.
The routine finds the highest allowable speed oscillator installed and uses it to run the test.
25q bits are t~en wrapped through each installed lodel in turn.

lQl!:

Throughout the error descriptions for this routine, reference viII be lade to
"the translit line" and "the receive line." Reaelber that tbe translit line is tbe
eYen nUlbered interface.
tbe Beceive Line is tbe even line associated witb tbe lodem tbat is being tested. The line interface for
LIB types 10 and 11 is designed sucb that if tbe eyen line interface is in diagnostic
lode with data terlinal ready on, send data is tben wrapped through the translit
aode. and back into the receive lode I of the Odd line interface.

!Ql!: 111 routines working with integrated lodems, autocall or answer units have been
designed to attelpt to functionally test the modems. In lost cases, no suspected card locations
are given since the laintenance procedures in tbe FSTHH, Chapter e proyide a lore thorough
trouble isolation procedure. When any error occurs tbat indicatel a pOI.ible lodel,
autocall or answer problem, please refer to these procedures.

15C7

OXOl

After vaiting 300 lilliseconds for tbe lodem to
settle down because of any
previous testing Data
terminal Ready is set on,
then the line is tested
that RLSD is down, Rec.
data is It I Ilrk and
that Data Set Reldr is on.

After setting Data Ter.inal
Ready a input 43 indicated
that incorrect bits were set.
Beg X'11' contains the line
address under test. Beg X'14'
contains the in 43 data and
Beg X'15' contains the bits
in errot.

Test error.
Suspect a
problea 10
tbe lIodell
Bec path

Byte J
Bit 3 - aeceived Data
Byte 1
Bit 2 - not data set ready
Bit 3

~

received line signal
deter.tor~

15C7

OX02

porce a bit service level
2 interrupt fro II the
transmit line.

After attelpting to force a
bit service level 2 interrupt (via 00'1' 1'47'1 trom
the line (BCBI address in
reg X'11', uPllasking level
2 interrupts and vaiting
the tille of a scanner pass,
no bit service interrupt
occurred fro II that line.

Y4G2

15C7

OX04

Set the transmit diagnostic
and monitor lode 11 with
Data Terminal Ready on and
select an oscillator.

After issuing an 00'1' X'42'
at the selected line address,
an IN X'42' failed to reflect
the OUT l'~2'. Beg. X'11'
contains the line address of
the receive line~ Beg 1'14'
contains the transmit II
1'42' data and reg X'15'
contains the bits in error:

Y4G2

RS305

03P1'

A-330
A-040

Pretest error.
Rerun routine
1512

1-150

Pretest error.
Berun the
appropriate
routine as
given below.

A-170

Rerun routine

Byte 0:
Bit 6 - mode bit
to set.

failed

RS304

15~B.

Rerun routine
1552.

eit 7 - mode bit 2 failed
to set.
eyte 1:

5. O. 94 X3705PAA

Bit 0 - lov priority set
in error.

85304

A-170

aerun routine
1540.

Bit 1 - diagnostic 1I0de

aS306

A-16O

Rerun routine

Type 1 Scanner 1FT

o
o
o

!0
0
0
0
0
0
0

JBN 3705 cONnU.ICATIOHS COHTBOLiEB
~iPB 1 COft"DNICATIONS SCANBPI Iff STftPTON IRPII
BOOT. ERBoa PO IIcno H 'rI!STE D
CODE

15C7

OX06

Wait 300 lIilliseconds then
start the scanner and force
another bit service level
2 interrupt froll the
transllit line.

o
o
o
o
o
o

15C7

0108

Check that Clear to Send has
nov cOile up at the transmit
address. (EVen though aTS
has not been set, diagnostic
1I0de in LIB types 10
forces aTS up in the Ilodell.
LIB type 11 RTS is set
in the norul lIanner.
As a result, after the
maximull CTS delay, CTS
should CODe up.)

SOSIiECTlilD CllaD
toCl'l'IOIi (S)

PROG
USK

PAGB

FEAt 0

PETittI
PUB

COUBHTS

Bit 2 - data terllinal
ready faUed to set.•

B5306

1-160

Berun routine
1532.

Bit 3 - synchronous Ilode
bit set in error.

R5306

A-160

Rerun routine
152A.

Bit q - external clock
bit set in error.

15306

1-'60

Rerun routine
.1538.

Bit 5 - data rate select
bit set in error.

R5306

1-160

Berun routine
1530.

Bit 6 - oscillator select
bit 1 faUed..

RS306

11-160

aerun routines
,542 and 151111~

Bit 7 - oscillator select
bits 2 faUed.

RS306

A-160

Rerun routines
15U and 151111.

failed to set.

o
o

IIROB DPSCRIPTIOH

P99-3705P-09

Either the scanner could not
be started again or after
attellpting to force the next
bit service interrupt and
waiting the tiae of a scanner
pass, no bit service interrupt
froll the line under test
occurred. Reg. X"" contains
the line (BCB) address froll
which ~it servi~e was to be
forced. Value of Reg. X'15'
describes the failure:
X'EOOO' - tbe OOT X'41'
rllG2
failed to reset the tlpe t
CS level 2 bit in IN x'77'
(however, no feedback
check was present).
X'COOO' - the OoT X'41'
Y4G2
failed to reset the tlpe 1
C5 level 2 bit in II X'77'
because a feedback cbeck
vas present.
x'8000' - the OUT X'4,'
y4G2
was successful but the
DOT X' Q7' (force bit
service) failed to cause
a bit service interrupt.

EOOO

After vaiting 300 ailliseconds IIIG2
an IN 1'43' executed wbile
stopped at tbe transmit address
indicated eitber Clear to Send
had not come up or otber
conditions vere in error. Reg
X'11' contains the transmit
line (BCB) address. Beg 1',_,
contains the resolts of tbe
II I'Q3'. Reg X',5' contains
tbe bits in error:

'lPSII

Pretest error.
Berun routine
1512.

RS305

1-0110

R5308

A-OliO

RS305

1-330
A-040

A-180
1-200

Byte 0:

Type 1 Scanner IPT

1531.

Pretest error.
If C~5 failed,
problem is
probably in
lI04e.. Try
tunning routine
15EO. Uso,
if necessarl,
i t should be
possible to
scope tbis
failure lIbile
stopped at this
error stop. If
other bits are
in error, rerun
routines as
given below:

Bit 1 - a feedback check
was present.

1lS308

Rerun routine
157A.

Bit Q - transllit mode bit
set in el:ror.•

RS308

Rerun routine
,S1C.

Bit 5 - new sync bit set
in error.

R530B

Rerun routine
1520.

Bit 6 - ITS set in error.

RS308

Rerun routine

X3705PAII 5.0.95

- --------

----------

--

~

-------- - -

'~,

i

/

""
IB" 3705 CO""UHICATIOH9 CONTROLLER
TYPE 1 COKBUNICATIONS SCANHEB 1FT SY"PTon INDU

I-

099-37058-09
;;

"

ROUT. ERROR PUNcnON TESTED
CODE

ERROR DESCRIPTION

9USl'ECTED CARD
LOCUIOR(S)

fROG
USK

PEALD 1'ETIIII
PAGE

PAGE

COIIIIENTS
1528.
;;.

Bit 7 - Send data .ark
set 10 error.

R5308

Rerun routine
15211.

Byte 1:
Bit 0 - CTS tailed to come
up. (Ignore if byte 1, bit
5 in error also).

B$307

Bit 2 - DSB not forced up
by diagnostic lode. (Ignore
if byte " bit 5 in error
also. )

RS307

"

Rerun routine
1578.

• ~i

Bit 5 - diagnostic mode
bit f;ailsd,.
15C7

0101.

Force a bit service level
2 interrupt troll the
receive line.

After attellpting to force a
bit seryice lsyel 2 interrupt
(via OUT X'47') froe the line
(BCB) address in reg X'11',
un.asking level 2 interrupts
and waiting the tise of a
scanner pass, no, bit senice
interrupt occurred fros that
line.

JIIG2

15C7

OIOC

Set the receive line to
diagnostic and monitor
mode 11 and select an
oscillator.

After issuing an OUT X'42'
at the selected line address,
an IN 1'42' failed to reflect
the OUT X'42'. Beg X'14'
contains the actual IN X'15'
contains the bits in error:

t4G2

BS305

03l'P

1.-330
1-0110

Pretest euor.
Reron routine
1512.

1-150

Pretest error.
Reg X'11' contains
the selected
line address.
Rerun t~e appropriate routine
as giYell:

Byte 0:
lIit 6 - mode bit
to set,.

failed

RS30Q

1-170

Rerun routine
1511E.

Bit 7 - lIode bit 2 failed
to set.

BS304

1.-170

Berun routine
1552.

Bit 0 - low priority bit
set in error.

BS30Q

1-170

Berun routine
1540.

Bit 2 - data terminal
ready set in error.

B9306

1.-160

Berun routine
1534.

Bit 3 - synchronous lIode
bit set in error.

BS306

1.-160

Berun routine
152C.

Bit II - external clock
bit set in error.

B5306

1-160

Rerun routine
1538.

Bit 5 - data rate select
hit set in error.

B5306

1-160

Rerun routine
1530.

Bit 6 - oscillator selected

B8306

A-160

Rerun routines
1542 and 1544.

Bit 1 - oscillator select
bit 2 hUed.

B8306

1.-160

Rerun routines
1546 and 1548.

R5305

A-OliO

Pretest error.

Byte 1:

bit 1 failed.

15C7

0112

Allow 2 normal bit services
fro. the tr~ns~+t line'to
occur.

Although the transmit time
has ~een srt to .ode 11, 2
'ie'y,el 2 bi I ser:vice interrupts failed to occur from
that line in 60 .illiseconds.
(Beg X'11' contains the
transmit line's a~dress.)

HG2

Proba~h,an

intermittent
loss of strobe.
Rerun routine
1580.

•

..*
~

5.0.96 X37051'U

Type 1 Scanner 1FT

'.!t~

/'

1 ".
....

_~I

o
o

o
o

o
o
o

Iaft 3705 COMIIUNICATIONS CONTROLLER
TYi'E 1 COHlltlNlCATIONS SCANNED ll'T SYtll'TOII INDEX

D99-37052-09

ROUT. ERROR PUNCTION TESTED
ERROR DESCRIPTION
SUSPECTED CARD PROG PElLD
CODE
LOCATION(s) IIASK PAGE
15C1 XXXX NOTE: At this point the routine will start handling transmit and receive interrupts
asynchronously. As each transmit interrupt occurs, the send data bit will be inverted.
As each receive line interrupt occurs, receive data is checked to ensure that the
alternating bits being sent are being received. Tbis continues until 254 bits have
been sent and received. since there is approximately a 1.5 millisecond delay through
the modem, tbe transmit line will always be a few bits ahead of the receive line.
15C7

XIXX

1+2

It4
1+5
X+6
X+7

1-040

Test error.
Rerun routine
1580. Probably
an intermittent
loss of strobe.
(See the comlent above
this error
description
for additional
information. I

A-200

~est error.
Probably an
interaittent
problem in
the associated
line interface.
Rerun routine
1581. or as
indicated below;

• line address of the transmit line.
• line addrellS ot the receive (wrapped) line
receive bit count (this count is decremented from X'FE' after each bit is
received)
expected receive da~a (receive data bit is bit 0)
= transmit bit count (this count is decremented from X'FF' before each bit
is sent.)
last transmitted data (send data bit is bit 7)

=
=

15C1

OX22

Ensure that a bit service
level 2' interrupt occurs
from one of the lines under
test at least once every 30
milliseconds.

After resetting the previous
Y4G2
bit service interrupt, either
no interrupt occurred within
30 milliseconds or a line other
than the two being used
interrupted. If byte 0, bit 0
of reg. X'13' is off, no bit
service occurred. If it is
on, a line other than the two
being tested interrupted (its
address is in the remainder
of reg. X'13').

lSC1

OX2Q

As each transmit line
interrupt occurs, check
that eac~ bit has been
sent.

An 18 1'43' executed following
a bit service interrupt from
the transmit line, indicated
that the previous bit had not
been properly sent. Reg x'13'
contains the received 1M X'43'
data. Any pf the following
bits may have caused the error;

rU.l

COIIIIENTS

NOTE: At each of the remaining error stops in this routine, reg X'16' contains the
storage address (X) of additional error information:
X

o

PETII"
PAGE

BS30S

2900

Byte 0:

o

Bit 2 - interface check
sum"u:y if on

Y4G2

115308

Rerun routines
1SAC, 15AB,
or 1580.

Bit 4 - transmit lIode bit

Y4G2

RS308

Rerun routine
152A.

Y4G2

RS30B

Berun routines
1522 al)d 1524.

i f i t dropped.

Bit 7 - send data bit if it
was not the same·as the last
transmitted bit.

o
15C7

OX26

~fter transmitting all 254
alternate marks and spaces,
disable the transmit line.

Type 1 Scanner 1FT

After the transmit bit count
went to 0, an OUT X'42' was
issued with all zeroes. An
IN X'42'tben indicated a bit
or bits still on. Reg X'13'
contains the IN 1'42' data.
Any bit on is in error:

Also, if diagnostic mode
dropped (Byte 1,
bit 5 of the IN
X'43' data was
off) rerun
routine 153E.
(See the comment
preceding
error code
lSe7, OX22 for
additional
information.)

YQG2

l'Fl'F

1.-150

Test error.
Probably a
bi t intermittently failing
in the associated line
interface. (See
the cOllment
preceding

X3705FAA 5.0.97

'.
IBft 3705 COKftUNICATIONS CONTROLLER
TYPE 1 COKKDNIClTIONS SCANNER tFT SYH~TOM INDEX

f

D99-3705E-09
"

ROUT. ERROR PUNCTION TESTED
CODE

ERROR DESCRIPTION

SUSPECTED CARD
LOCATION (s)

PBOG
IIASK

FEALD
UGE

PETIIII
pAGE

COMIIENTS
error code
15C7, OX22
tOt addlt 10nal
information.
Rerun:

Byte 0:
8it 6 - mode bit

IIS304

A-170

Boutine 1550.

Bit 7 - mode bit 2

IIS304

A-170

Boutine 1554.

Bit 0 - low priority bit

BS304

A-170

Routine 15qC.

Bit

Byte 1:

- diagnostic mode

153C •

R5306

A-160

lIoutine

Bit 2 - data terminal
ready bit.

115306

A-16P

8c>utine 1534.

Bit 3 - synchronous
1I0de bit.

BS306

A-160

Routine '52C.

Bit 4 - external clock
bit.

RS306

A-160

Routi,ne 1536.

Bit 5 - data rate
select bit.

B5306

A-160

Routine 1530.

Bit 6 - oscillator
select bit 1.

85306

A-160

Boutine 15411.

Bit 7 - oscillator
select bit 2.

B5306

A-160

Iloutine 1548.

15£7

OX28

After transmitting all bits
ensure that the receive line
has received at least the
first space bit.

Even after all bits were
transmitted, the receive line
had not yet received the first
space. There should be no
more than 1.2 milliseconds
delay through the modem and
since 250 bit& were sent the
receive line should have
received the first one by
the time the last one is
transd tted.

15C7

0121

As each receive line
interrupt occurs, ensure
that modem is wrapping
data and operating properly.

After a receive line interrupt,
an IN X'43' indicated that
either incorrect data was
received or an error condition
was detected. Beg X'13'
contains the received IN X'43'
data. Any of the following
bits could have caused the
error:

Test error.
suspect a
proble. in
the path of
carrier
through the
1I0dem. The
entire modem
receiver may
be bad. Try
adjusting
lIIodem TX
level.
AOeO

Test error.
I f CTS dropped
or receive
data did not
compare, look
for a modem
problem (see
comments preceeding 15C7,
OX22 for
additional
infonation. )
If interface
cbeck summary
was on, rerun
routines 1566,
15A¥, or 15BO.

Byte 0:
Bit 0 - received data may
not have been as expected
(See the expected receive
data field.)
Bit 2 - interface check
summary was on.
Byte I:
,1

5.0.98 X3705PAA

Type 1 Scanner 1FT

{ ..

o
o
o
o

IB~ 3705 COMMUNICATIONS CONTROLLER
TYPE 1 COMMUNICATIONS SCANNER 1FT SYMPTOM INDEX

BOUT. En non FUNCTION TESTED
CODE

SUSPECTED CARD
LOCATION(s)

PROG
MASK

FEALD
PAG!

tETM"
PAGE

COMMENTS

Bit 0 - if on, CTS dropped.

15Ca

0

ERROR DESCRIPTION

D99-3105E-09

xxx X

0

Autocall Dial and Transmit (Manual Intervention Routine): This multipurpose routine allows
the operator to select 4 basic test functions to ensure the proper operation of integrated
autocall units and modems. The description of each test function is as follows: (The 4 digit
hexadecimal identifier is the code that is entered at the first manual intervention stop to
select the test function desired.)
1'0000' - Autocall Dial only. This function allows the operator to enter the line address
of an integrated autocall unit and a telephone number to be dialed. After
testing the static conditions on the autocall interface, the number given is
dialed. After dialing is complete, the routine goes to its ending manual intervention stop to indicate that the dialed number should be ringing.

0
0
0
0

X'0001' - Autocall Dial and Disconnect. This function allows the operator to enter the
line addresses of an integrated autocall unit and its aSSOCiated co.munications line interface, and a telephone number to be dialed. After testing
the static conditions on the communications line interface and the autocall
interface, the number given is dialed. After dialing and waiting for an
answer tone, the routine insures that control of the telephone line can be
turned over to the communications line interface and then insures that a
successful disconnec t can be executed.
X'0003' - Autocall Dial, Transmit Mark, and Disconnect. This function provides for
the same function as X'0001' (above) except that after having turned a
control of the telephone line over to the communications line interface, a
continuous mark is sent down line until the operator tells the routine to
stop via the dynamic communications facility of the DCM. This test function
was designed primarily to simulate the test 3 function of the 3872 modem on
a switched network.

fl

X'0006' - Transmit Hark Only. This function provides the facility of sending a
continuous mark down line from a non-autocall line interface. This
function was designed primarily to simulate the test 3 function of the
3812 modem on a leased line network. (This function may also be used
to ad lust the equalization meter).
X'0007' - Continuously transmit all ones down line in DLC mode (this test will
simulate the zero bit insertion of the DLC hardware). The bit pattern
being transmitted vill be a space and then 5 marks.

I

,

NOTE:

0
0

Functions '0000', '0001', and '0003' also allow for testing of the 'abandon
call and retry' circuitry of the autocall unit. To do so, simply enter the
telephone number of a nearby telephone that is off hook. This vill present a
busy signal to the autocall unit and lCR should come up and cause error code
OX18. If it does not come up within one minute, the routine should time out
and give error code OX1A.

Before running this routine, it is suggested that the reader review the function tested
column of each of the following error codes to obtain a basic understanding of the
routine and its fl~v. Because of the different options available, not all error conditions described will be tested. The digits immediately underneath each error code describe
under which test function that particular error condition can occur. (0, 1, 3, and 6 for
K'OOOO', X'OOOI', X'0003', and X'0006' respectively. I

o

NOTE: All routines working with integrated modems, autocall or answer units have been
designed to attempt to functionally test the modems. In most cases, no suspected card
locations are given since the maintenance procedures on C-440 provide a more
thorough trouble isolation procedure. When any error occurs that indicates a possible
modem, autocall or answer, problem, please refer to these procedures.
ISC8

OX02 Force a bit service
1,3,6 interrupt from the selected
communications line interface

15ce

OX04

Set the selected comllunications line interface
to interrupt mode 11 with
Data Terminal Ready and
the other selected line

Type 1 Scanner 1FT

After attempting to force a
bit service level 2 interrupt
(via OU'I X' 41') froll the line
(BCB) adilress in reg_ 1'11',
unmasking level 2 interrupts
and waiting the time of a
scanner pass, no bit service
interrupt occurred from that
line.

Y4F2. Y4G2

After issuing an OUT X'42'
at the selected line address,
an IN X'42' failed to reflect
the OUT X'42'. Beg 1'14'
contains the actual IN X'1S'

Y4G2

115305

03FF

A-330
A-040

Pretest error.
Rerun routine
1512.

A-1S0

Pretest error.
Reg X'11' contains
the selected
line address.
Rerun the appro-

X370SFAA 5. O. 99

IBI 3705 CO"SUNICATIONS CONTBOLLBR
TYPB 1 CO""UKICATIOIS SCANHBI 1fT SYIPTOn IHDBX
BCUT. BRIOI PORCTIOR TBSTBD
CODB
control bits on.

ERIOI DESCRIPTION
contains the bits in error:

D99-370SB-09

SOSPECTED CABO
LOCATION!s)

PBOG
BASK

FEALD
PAGB

PET""
PAGB

COftftEHTS
pdate routine
as given:

Byte 0:
Bit 6-mode bit
failed
to set
Bit 7-lIode bit 2 failed
to set

8S304

1-170

IS304

A-170

8S3011

A-170

lerun routine
1548.
Rel:un I:outine
1552.

Byte 1:
Bit O-low priority
bit set in error ,
Bit ,?diagnostic lIode
set in errol:
Bit 2-data tel:linal
I:eady failed to set
Bit 3-synchronous lode
bit failed
Bit ~-external clock bit
failed
Bit 5-data I:ate selected
bit failed
Bit 6-oscialltor selected
bit 1 failed
Bit 7-oscillator select
bit 2 hiled
1sca

15C8

0106 I'Illow a norllal bit service
1,3,6 interrupt froll the selected
communications line interface to occur.

OX08

1,3

Since the selected cOllmunications liue interface is a
switched line, ensure that
Data Set Ready is not up
until the call in progress
is co.plete.

After setting lonitor lode 11
to allow norlal bit sel:vice
requests, starting the
scanner, and waiting up to
30 milliseconds for a level 2
interrupt fl:om the selected
line, none occurred.

YIIG2

With the scanner stopped at the
selected line addl:ess, an IN
X'43' indicated that data set
ready vas already active. If
needed I:eg. 1'111' contains the
IN X'II3' data.

0020

15C8

OXOA Porce a bit service
0,1,3 interrupt froll the selected
autocall interface.

After attelpting to force
a bit service level 2 interrupt (via OOT 1'117') frOB
the line !BCB) addl:ess in
reg X"11', unmasking level
2 interrupts and waiting
the tiae of a scannel: pass,
no bit service interrupt
occul:red from that line.

YIIP2, YIIG2

15C8

OXOC Set the selected autocall
0",3 interface to interrupt mode

After issuing an OOT X'II2'
at the selected line
address, an IN 1'112' failed
to reflect the OOT X'42'.
Reg. X"II' contains the
actual IR X'II2' data and
reg X',5' contains the
bits in error:

YIIG2

1'.

IS306

1-160

BS306

1-160

8S306

A-'60

IS306

A-160

Rerun routine
1540.
Berun routine
153C.
Berun routine
1532.
Berun I:outines
1521 6 152C.
Bel:un routines
1536 8 1538
Berun I:outines
152B S 1530
Bel:un'routines
15112 6 151111
Berun I:outines
15116 6 15118

BS306

1-160

IS306

1-160

15306

1-160

IIS305

A-OIIQ

Pretestel:l:ol:.
Berun routines
1590 anel 15c2.
Beg X'l,. contains the selected line IBCB)
address.

15307

A-190
A-200

Pretest erl:ol:.
8el:un ~outine
1579 and then
run I:outine
1502 to belp
isolate proble ••
The problem may lie
in the autoans.er
or aSSOciated
autocall circuitl:Y. If scoping
is necesslll:f it
should be possible
to scope this failure while stopped
at this errol:
stop. Beg X'11'
contains the selected line address

BS305

A-330
A-OliO

Pretest error.
Berun routine
1512

A-170

Pretest error.
Beg I" l' contains the selected line (BCB)
address. Rerun
the appropriate
routines as given:

IS304

A-170

15304

A-170

Rerun I:outipe
15"B.
Berun I:outine

0300

Byte 0:
Bit 6-aode bit
failed
to set.
Bit 1-aode bit 2 failed

\1 "
5.0.100 X3705fA1

Type 1 Scanner 1FT

~

"

o
o

o
o
o

IBM 3705 CO""ONICATIOHS CONTROLLER
TYPE 1 COftKONICATIOHS SCANHBR 1fT SYK~TOK INDEX
ROUT. BRROR fONCTIOH TEStED
CODE

to set.

SOSPBCTBD CARD
LOCAtION Is)

PROG
ftASK

Bit O-lov priority bit
set in, ettor
lSC8

OXOB Allow a nor.al bit service
0,1,3 inteerupt frol the selected
autocall interface to occur.

After .~tting lonitot 80do
rQ02
" to allow noelal bit service
requests, starting the scanner,
and vaiting up to 30 .illiseconds for a level 2 intettupt
frol the selected line, none
occurred.

ISC8

OX10 Check the static conditions
1,1,3 on the autocall interface
1~!lI should be the only
active line.)

Witb the scannet stopped at
the selected line address,
an IN 1'113' indicated that
PWI vas not on or other
bits were on in etror. Beg
1'14' contains the results
of the 1M X'Q3' and reg.
X' 15' contains tbe bits
in etrot:

FEILD

PBTKK

~AGE

~AGE

YIIG2

BS3011

A-110

Rerun routine
1511C.

B5305

l-OqO

fretest eeror.
!lerun routin ..
1580 and 1SC2.
Reg X'11' contains the selected Une (BCBI
address.

1-190
A-200

Pretest ertor.
Proble. probably
lies in the alltocall circuitry
in the line adapter. Reg 1'11'
contains the
selected line
address. If scoping is necessary, ,
it should be possible to scope
this failure while
stopped at this
error. Rerun routines giVen:
Reron relltine
155C
Berun routine
lS1C
Berun routine
1520
Berlin routine
1528
Beran routine
152Q

9PFC

BS307

Bit O-should always be.
zero.
Bit 3-DPR was on in error.

B5308

Bit II-NB8 bit was on in
error
Bit 5-,BII bit was on in
error
Bit 6-NB2 bit ~as on in
error
Bit 1-HBl bit vas on in
error.

R5308
R5308
B5308
BS308

Byte 1;
on in error
on in error
on in error
not on
on in error

B5301
85307
R5307
B5307
B5308

Bit 5=C05 vas on in error

RS307

Bit
Bit
Bit
Bit
Bit

O-lCR
1-PHD
2-DLO
3-PWI
II-CBQ

vas
vas
vas
vas
vas

R5305

YIIG2

1SC8

OX12 Uter setting CBQ at the
0,1,3 autocall interface, allow
another bit service interrupt to occur. ITO check
status of line after setting CRQ)

With mode 11 set at the
selected "line address, the
scanner vas started, and
after waiting up to 30 lilliseconds for a level 2 interrupt from the selected line,
none occurred.

15C8

ox 111 Check that caQ bas been set
0,1,3 at the selected autocall
interface and that DLO is
nOli up also.

!litb the scanner stopped at the IIIG2
selected line address, an I.
X'43' indicated tbat DLO had
not cOle up or otber conditions vere in error. Reg
X'111' contains tbe received
IN X'43' data and reg X'15'
contains tbe bits in error.

9PFC

Berun routi ne
1558.
1-040

Pretest error.
Berlin routine
1580. Reg X''''
contains the
selected line
(BCB) address.

1-190
A-200

Pretest error.
~roble. probably
lies in the autocaU cirelli try
in the line
interface. Beg X'l
contains the selected line addtess. If scoping
is necessary,
it should ,be possible to scope
tbi8 failure while
stopped at this
error stop. Berlin
routine given:
!lerun routine 155C
Berun routine a5aC
Rerun routine 1520
Berun routine 1526

efta 0;

e

COftSENTS
1552.

Byte 0;

u
o
o
o
o

ERROR DESCRlfTIOH

Byte 1;

o

o
o
o
o

D99- 31 05B-09

type 1 Scanner 1Ft

Bit O-should alvays be zero.

B5307

Bit 3-D~B vas on in error
Bit II-RB8 bit vas on in error.
Bit 5-IBII bit vas on in error
Bit 6-8B2 bit vas on in error

BS308
R5308
R5308

B5308

X3705FA1 5.0.101

18K 3105 COKftONIClTION5 CONTROLLER
TYPE 1 COnnONICATIONS SCANNER IFT SynPTOft INDEX
BOUT. ERRoa PUNCTION
CODE

~ESTED

D99-3105E-09

ERROR DESCRIPTION
Bit 1-NBI bit
Byte 1;

v~s

SUSPECTED CARD
LOCATION(S)
on in error

Bit
Bit
Bit
Bit
Bit

PROG
"ASK

FEALD

PE'Pllft

PAGE
115306

PAGE

RS307
RS301
nS301
R5307
11530B
IIS307

O-AClI ~as on in error
1-PND VIIS on in etror
2-0LO faile~ to come up
3-PIII dropped
4-CRQ failed to set
Bit 5-COS was on in error

CO/ItIENTS
Rerun routine 1524

~e~un

routine 1556

15CB

OX15

Wait up to 30 seconds for
Data Line Occu~ied (DLO)
to come up on the selected
auto-call line interface.

15ca

XXXX

Note: At this point the
selected telephone number
is dialed by a subroutine
Before each number is d&iled,
l'E03n' will be displayed,
where 'n' is the digit to
be dialed.

See the description of subroutine
error codes 'lXOC'
through'1X1A'
for a description
of the 'd1al-a- '
digit' subroutine
and its etror
codes.

15ca

XXXI

Note: After dialing the
selected number, the routine vill wait up to one
minute (or until ACa comes
Up) for an answer tone.

See the description of II an ual
intervention
stop code I'POlc'
for more information.

15ca

OX16
1,3

While waiting for COS to
come up, check to ensure
that a bit service interrupt occurs from the 8Utocall interface at least once
every 30 milliseconds.

Although the selected autocall interface ~as set to
mode 11, no level 2 bit service interrupt occurred from
that line within 30 milliseconds of the previous one.

15c8

OX16
1,3

Also while waiting for COS,
monitor Aca to insure that
it never comes up on the
autocall interface.

After a bit service interrupt
from the selected autocall
interface (reg X'11' contains
its address), an IN 1'43' indicated that ACR bad come
up. Reg X'13~ contains the
received IN X'43' data. If
byte " bit 5 is off, ACR
probably came up as it should,
indicating that the autocall
unit never received an answer
tone from the called number.
If that bit is on, some other
improper condition in the
autocall circuitry brought ACR
up.

Ensure that either COS or
1ca comes up within one minute after dialing the selected number.

After ~a1ting one minute, neither
came up.. If an answer tone was
received, COS should have come
up. If not, the lCR counter in
the autocsll unit should have
timed out and brought up ACR.
Reg 1'13' contains the last
received IN X'43' data. Reg
X'11' contains the selected

15CB

OXIA
1,3

5.0.102 X3105FAA

After setting Call Request and
waiting 30 seconds, DLO failed
to come up. Reg X'14' contains
the received IN X'43' data.

l'rotest IItt·or.
Problem probably
lies in the autocall circuitry in
the line interface.
Beg X'11' contains
the selected line
address. If
scopiog is neceSS8L
it should be
possible to scope
this failure while
stopped at this
error stage.

HG2

85305

A-040

Test error.
Probably caused
by an intermittent loss of
strobe. Rerun
and loop on routine 15BO. I f
needed, reg X'11'
contains the
selected line
(BCB) address.
Test error.
If it appears

that an answer
done ~as never
received, be sure
that the correct
telephone number
was entered.
Also try dialing
the number from
a manual phone
and ensure that
the line is not
busy or out-oforder.

~-

Type 1 Scanner 1FT

o
o
o
o
o
o
o

o
o
o

---,--,,--_.

IBB 3705 COBftONICATIONS CONTROLLER
TYPE 1 COKKUNICATIOHS SCANNER 1FT SYKPTOK INDEX
BOOT. BRROB rUHCTION TESTED
CODB

BRROR DESCRIPTION
line (BCB) address.

After receiving COS, indicating that the communications line interface now h4s
control of the line, reset
CRO to free the autocall
unit.

1Sc8

SUSPECTED CARD
LOCATION(s)

After issuing an OOT X'43' with Y4G2
data of all zeros to the selected autocall address to
reset CRO, an IN X'Q3' indicated CRO was still active.
Reg X'11' contains the line
(BCB) address and reg. X'14'
contains the received IN X'43'
data.

OX1B Start the scanner and allow
1,3,6 a normal bit service inter·
rupt frol the selected
coaaunications line interface.

Since the selected cOlaunicaY4G2
tions line interface is set
to mode 11, when the prior
bit service interrupt was reset
and the scanner started, an
interrupt from that line should
have occurred within 30 milliseconds and did not.

1sca

0120 Check that Data Set Ready
1,3,6 is active on the communications line interface

lfter the scanner stopped at
tbe selected line {BCB)
(which ~s reg X'11'), an IH
X'43' indicated tbat DSR was
off. If this is a leased
line, DSR should always be
up. If this is a switched
line, tbe call bas been completed and DSB should now be
up. (Beg X'14' contains the
received IN X'43' ~ata.1

OX22
3,6

~ith the scanner stopped at
the selected co •• unications
line interface, an OUT X'43'
was issued to set the transmit 80de, RTS, and send data
bits. On 18 X'43' tben indicated that one of the bits
failed to set or the nev sync
bit set in error. Reg X'14'
contains the IN X'43' data and
reg X'lS' contains the bits in
error:

Set transmit DIode, requestto-send, and send data to a
aark on the cO.lunications
line interface.

.0

..

D99-3705B-09

1sca

o

o
o

__ _--"------

Y4G2

PROG
KASK

PEALD
PAGB

PETKK
PAGE

COKKEHTS

1-190
A-200

Test error.
Problem is probably in the autocall line interface
Rerun routine 1558.

RS30S

1I-OQO

!est error.
Rerun routines
1580 and 15C2 to
try to tind why a
strobe vas appal:ently lost. Beg
X'11' contains
the selected COIlunicatioDs line
(BCB) address.

0020

85307

A-laO
1-200

!est error.
Rerun routine
151a and then run
routine 1500 to
belp isolate problel may lie ip
the associated
autocall circuitry.
It should be possible to scope
this error while
stopped at this
error stop.

Oroo

RS308

1-180
1-200

Test error.
Rerun the appropriate routine
as given below.
If needed, I:eg.
X' l1' contains
the selected co alunieations line
address.

0008

Byte 0:
Bit q-trans.it lode bit
failed to set
Bit S-new sync bit set in
error.
Bit 6-RTS faile~ to set

lIerun
1511
lIerun
1520
Rerun
1526
aerun
1522

Bit 1-send data bit failed
to set.

routills
routine
routille
routine

1sce

OUlf
3,6

While waiting for clear to
send frol the lodel check
to ensure that a bit service
interrupt occurs fro. the
selected co •• unications line
interface at lease once every
30 dlliseconds,.

Although the selected co •• uni- Y4G2
cations line interface waa set
to mode 11, no level 2 bit
service interrupt occurred frol
that line within 30 milliseconds of the previous one.

RS30S

A-OqO

Test error.
probably caused
by an intetlittent loss ot
internal or
extrraal clock.
Rerun and loop on
routine '5C2~ If
needed reg X'1,'
contains the selected line (BCBI
address.

15ca

0126
3,6

Write up to 30 seconds for
Clear to Send to cOle up aD
the selected cO.lunications
Une interface.

After setting Reguest to Send
and waiting 30 seconds, clearto-send failed to cose up.
Reg X'13' contains the last
received 18 X'43' data. Reg.
I'll' contains the selected

85307

1-1ao
1-200

Test error.
Rerun routine
1518 and then run
routine 1SEO to
belp isolate
problem. Problem

Trpe 1 Scanner IPT

tlfG2

X3105F11 5.0.103

18K 3705 COn"UNICATIONS CONTROLLER
TYPS 1 ConftUHICATIOHS SCANNER IFT SYftPTOft INDEX
ROUT. ERBOR FUNCTION TESTED
CODE

ERROR DESCRIPTION
line address.

D99-3705B-09

SUSPECTED CARD
LOCATIONCs)

FBALD
PAGE

XXIX
3,6

Note: At this point the
routine vill start continuously sending marks until
either an error occurs or
the operator uses the dynamic
communication facility to end
the routine. While doing
this, I'SOOO' and l'EOFF'
will alternately be disdisplayed every 255 bit
thes.

15C8

OX28
3,6

While translitting the continuous lark, check to ensure
that a bit service interrupt
occurs frail the co •• unications line interface at least
once every 30 si11iseconds

Although the selected cosmuni
Y4G2
cations line interface was set
to sode 11, no level 2 bit
service interrupt occurred
from that line within 30 lilliseconds of the previous one.

15c8

OX2A

Rhile translitting the continuous sark, each tise a
bit service interrupt occurs,
an IN 1'43' is executed to
check for any error conditions line interface.

After a bit service interrupt,
an IN X'_3' indicated aOle kind
ot error. Reg X'13' containS
the received IN 1'43' data
that was in error:

COnSENTS

Por more intormation on using the
dynamic cOllllllunication facility
to end the routine, see the
description of
the infor.ational
displays under
15XX, EOOO and
15U, EOFF.
8S305

6BOO

Bit I-a feedback error
occurred
Bit 2-the interface cbeck
summary' bit was on
Bit 4-the translit lode
bit dropped
Bit 6-BTS dropped
Bit 7-send data dropped
froll a !lark.
INote: eit 2, interface check
sumllary may have been set by
dropping Data Set Beady, getting a feedback check, or
gettlng a bit overrun, none
of which should have occurred)

Test error.
Probably caused
by an inter.ittent
10s8 of internal
or external clock.
Rerun and loop
on routine 1580
or external clock.
lIer un~and loop on
routine 1580 or
routine 15C2. If
needad, reg X'11'
contains the
selected line CBCB)
address. Note:
If the 'loop on
error' option is
on instead of
looping back to
t he very start
of the 'routine,
this error will
cause a loop back
to wbere the routine starts to
continuously
translit a lark.
A-180
A-200

Byte 0:

5. 0.104 X3705FAA

PETnn
PAGE

lIIay be in the
lodell. If scoping is required,
it can probably
be done while
stopped at this
error stop.

15C8

3,6

PROG
BASK

'rest error
Proble. is probably interlilittent.
Reg X"" contains the selected
line (BCB) address
Rerun rontines
as given below:

1'482, Y4P2

85202

1'4F2

85202

I4G2

RS308

Berun rOlltine
1571
Berun rOlltines
1586, 15AC, 15AE
or 15BO
Berun routine ISlA

1'4G2
f/lG2

RS308
8S308

Rerlln routine 1526
Ber'!)l rOlltine 1522

I-

"

"

If Data set Beady
dropped. scoping
can be done while
stopped at this
errOl: stop. ls
in error code
0128 above, it
the 'loop on
error' option
is on, instaad
of looping back
to the yery stlll:t
of the routine,

Type 1 Scanner IPT

·f
,<

..,

·t

,
;'

)'.

o
o
o
o

IBK 3105 COftftUHICATIONS CONTROLLUR
TYPE 1 COftKUNIC1TIOHS SClN.BR 1fT SYKPTOft
ROUT. ERROR PUHCTIOH TESTED
CODE

IND~X

EBBOB DESCBIPTION

SUSL'BCTBD CARD
LOC1TIOH(al

L'BOl!
"A~K

FBALD
PUB

rtT""
PlOD

CO""INTS
t Id.m

lsce

OX2E
1.3

To disconnect the switched
line from the co•• unications
line interface. reset data
terainal ready.

o

o
o
o

After issuing an OUT X'42'
with nothing but toth lode
bits on, an 1M X'42' did
not reflect the OUT X'42'.
Beg 1'14' contains the 1M
X'42' did not reflect the
OUT X'42'. Reg X'14' contains
the bits in error:

14G2

0320

&-150

Test error.
Rerun the appropriate routine
as given. If
needed. reg X'11'
contains the selected co •• unications line address.

Byte 0:
Bit 6-.ode bit 1 dropped
Bit 7-lode bit 2 dropped
Byte 1:
Bit 2-Data Terminal Ready
failed to reset

BS30Q
BS304

1-170
A-170

Berun routine 154E
Berun routine 1552

BS306

A-160

Berun routine 15311.

B5305

A-OliO

Test error.
Berun routines
1580 and 15C2 to
try to find "hy
a strobe was
apparently lost.
Reg X'11' contains the selected
coallunications
line (BCB) address.

lsce

0130
1. :3

Start the scanner and allow
a normal bit service interrupt frol the selected
comlunications line interface.

Since the selected cO.luniY4G2
cations line interface is set
to mode 11, when the prior bit
service interrupt was reset
and the scanner started, an
interrupt fro. that line should bave
occurred within 30 milliseconds and
did not.

~5C8

DI32
1.3

Check that Data set Beady has
now dropped on the com.unications line interface.

After having dropped data terainal ready to disconnect the
line interface, an IH X'43'
indicated that Data Set Beady
was still active. If needed.
reg 1'14' contains the
received IN X'Q3' data.

lsca

0134
1.3

wait 2 seconds and then start
the scanner and allow a bit
service interrupt to occur
frol the selected autocall
interface.

Since the selected autocall
interface is set to lode
II, an interrupt from that
address should ha.e occurred
within 30 milliseconds after
the scanner was started and
did Dot.

YIIG2

15ca

OX36
1,3

Now check to insure that the
selected autocall interface
is back to a reset condition.
(Particularly that DLO is now
off.)

After baving waited 2 seconds
from the ti.e data terminal
ready vas dropped on the
communications line interface, an IN X'43' executed
while stopped at the associated auto call interface,
indicated that the autocall
interface was not back to
noraal. Beg I'lQ' contains
tbe results of the IN X'43'
and reg X'15' contains the
bits in error:

I4G2

o
o

11111

to wbvr. thll tou·
UII. .tut. to
oOhtinuoully t~.I1.·
lit ••• rk.

o

o

41~rol'

/JIIII"" • 1111111, IllIuk

o

0020

Test error.
The associa ted
autocall unit
should have
dropped data set
ready. If nee~ed.
reg 1'11' contains
the selected line
address. It should
be pOSsible to
scope this failure
while stopped at
this error code.
BS305

A-040

Test error.
Berun routines
1580 and 15C2
to attempt to
find wby a strob~
cUd not occur.
Beg X'111 contains
tbe selected autocall line (BCB)
address.

1-190
1-200

Test error.
Problem probably
lies in the autocall circuitry in
the line interface
Beg X'11' contains
the selected line
- address. If necessary, it should
be possible to
scope this failure
while stopped at
this error stop.
Rerun routines as
given below:

9PFC

Byte 0:
Bit O-shoudl always be zero

Type 1 Scanner 1FT

BS307

13705F&A 5.0.105

IBM 3705 CO~MUNICATIONS CONTROLLER
TYPE 1 COMMUNICATIONS SCANNER 1FT SY~PTOM INDEX
ROUT. ERROR 1'UNCTION TESTED
CODE

D99-3705E-09

ERROR DESCRIPTION

Bit 3-DI?R was
Bit 4-NB8 bit
error
Bit 5-NB4 bit
error
Bit 6-NB2 bit
error
Bit 7-NBl bit
error

SOS PECTED CARD
LOCATION (s)

PROG
MASK

FEAtD

FEn 1'1

PAGE

PAGE

COIIIIENTS

on in error
was on in

RS30S
RS30S

Rerun routine 15SC
Berun routine 1S1C

was on in

R5308

Rerun routine 1520

lias on in·

85308

Rerun routine 1528

lias on in

R5308

Rerun routine 1524

Byte 1 :
Bit
Bit
Bit
Bit
Bit
Bit
15CA

XXXX

O-ACa
1-PND
2-0LO
3-PWI
q-CRQ
5-cOS

was on in error
was on in error
failed to drop
was not on
was on in error
was on in error

R5307
R5307

RS307
85307

Re.un routine 1558

OS30S
85301

Autoanswer and Receive Test (Manual Intervention Routin,,): This multipurpose routine allolls th~ operator
to select 3 basic test options to insure the proper operation of integrated modems and autoanswer
features. The description of each test function follows. (The q digit hexadecimal identifier is the code
that is entered at the first manual intervention stop to select the test function desired.)
X'OOOO' - Autoanswer only. This function allows the operator to enter the line address of an
integrated switched line ~odem with autoanswer. After testing the static conditions on the communications interface and enabling the line to receive a call,
the operator is instructed to call that line's phone number and wait for an
answer tone. After doing so, the routine will check to ensure the connection has
been made, then disconnect and ensure a successful disconnection. (Also. if the
switched line interface also has autocall attached, LIB types 7 and 9, the routine
will check the status of DLO on the autocall interface before, during, and after
the test.)
X'OOOl' - Autoanswer and Receive (no data checking). This function provides the same test
capability as in X'OOOO' above, except that after having ensured the connection, the
routine will check for carrier detect and then go into a continuous receive operation.
(No data is cheCked) It will continuously receive until the operator tells it stop
through use of the dynamic communications facility of the DCK.
%'0003' - Autoansller and Receive (check data for a mark). This function provides the same
capability of X'OOOl', above, except that it will check the received data to
ensure that it is a steady mark.. This function was designed primarily to simulate
the test 4 function of a 3972 modem.
X'0007' - To enable a selected line, check for carrier, and then put the line into receive
Bode. The receive data ~ill be cheCked for the DLC pattern of one space and 5
marks. Data errors will be counted and displayed with the error display of EXX!.
!Q1~ 1:
In all three of the above functions, the address entered by the operator can be tbat of a
non-switched line, in which case all parts of the test which deal witb autoanswer will be
bypassed. In the case of function X'OOOO' this will virtually bypass all testing.
(If the
. address entered is that of II switched· line other than types 6a, 7, ab, or 9a, only functions
X'OOOl' and X'0003' may be selected, all testing is done as if the line were a leased line,
alld the switched connection ai~st be· completed before continuing from stop '1'044' .• )
]Ql~ 2:
Before running this routine, it is suggested that the reader review the function tested column of
each of the following error codes to obtain a basic understaniling of the routine and its floll.. Because of
the different· options available, not all error conditions described will be tested. The digits immediately underneath each error code describe under which test function that particular error condition
can occur. (0, 1, and 3 for X'OOOO', X'0001', and X'0003' respectively.)

!Ql~ 3:
~11 routines vor~ing with integrated modems, autocall or answer units have been deSigned
to attempt to fnnctiona1ly test the modems. In most cases, no suspected card locations are given since
the maintenance procedures on C-440 provide a more thorough trouble .isolation procedure. When any error
occurs that indicates a possible modem, autoca 11 or answer problem please refer to these procedures.

15CA

OX02 Perce a bit service
0,1,3 interrupt from the associated
autocall interface, if one is
present. (LIB types 7 and 9
only) •

1SCA

OXOq

Check that OLO (Data Line

5.0.106 X3705PAA

RS305

After attempting to force
YQP2, YQG2
a bit service level 2 interrupt
(via an OUT X'47') from the
line (BCB) address in reg.
X'11', unDli\sking level 2 interrupts and waiting the time
of a scanner pass, no bit
service interrupt occurred
from that line.
An IN X'Q3', executed wbile

0020

A-330
1-040

Pretest error.
Rerun routine 1512

Pretest error.

Type 1 Scanner 1FT

o
o
o
o
o
o
o
o
o
o

lBlI 3705 COIIIIUIIICA'UOIlIi COII'rR01.LEII
tYPB 1 COftllOHICAtIORS SCAHNER 1Ft SYIIPTOII IN DEI
BOOT. ERROR PUNCTION TBstED
CODE
0,1,3 occupied is off at the
associated autocall
interface, if one is
present. (LIB type 7
an4 9 onlY.1

SUSPECTED CABO
LOCITION(S)

PROG
IIASK

FEALO
PiG!

FETIIII
PIG!

COIIIIEHT5
Problem is probably in the associated line interfa
or auto call unit.
If necessary, it
should ~e possible
to scope this failure while stopped
at this error stop

0106 Force a bit service inter0,1,3 rupt frOB the selected line
address.

After attespting to force a
bit service level 2 interrupt
(v1a an OUT 1'47') from the
line (BCB) address in reg
X'11', unaasking level 2
interrupts and waiting the
tise of a scanner pass, no bit
service interrupt occurred fros
that 11ne.

Y~F2,

15CA

0108 Set the selected line add0,1,3 ress to interrupt Bode II
with DTR and other selected
control bits on.

After issuing an OUT 1'42'
wbile stopped at the line
(BCB) address in reg X'II',
an IH 1'42' failed to
reflect the OOT 1'42. Beg
X'14' contains the received
1M X'Q2' data. Reg 1'15'
indicatES which bits were in

Y4G2

Y4G2

85305

1-330
A-040

Pretest error.
Rerun routine 1512

1-150

Pretest error.
Rerun and loop on
appropriate routines as given
below:

B53011
BS30q

A-170
A-170

Routine 154£
Routine 1552

Bit O-low p~iority bit
Bit 1-diagn9stic lode bit
Bit 2-0ata Terlinal Beady
Bit 3-synch~onoos lode bit

BS30"
8S306
R5306
liS 306

1-170
A-160
1-160
1-16C)

Bit

Routine 154C
Bouthe 153C
Routine 1532
Routines 1521
152C
Routines 1536
1538
Routines 1521
1530
Routines 15"2
15114
Boutines 1546
15118

erro~:

Byte 0:
Bit 6-mode bit 1
Bit 7-IGde bit 2
Byte 1:

o

Start the scanner and
0,1,3 allow a norsal level 2
interrupt to occur fros the
selecte4 a44ress.

15CA

OIOA

15CA

OXOC

If the line selected is a
switched line, check that
Data 5et Ready is not up.

clock bit

R5306

1-160

Bit 5-data rate select bit

R5306

1-160

Bit

~-oscillator

select bit

B5306

&-160

Bit

7-oscillato~

select bit 2

R5306

1-160

as305

1-0QO

4-exte~nal

Although the selected line has
been set to sonito~ sode 11,
after starting the scanner no
bit service level 2 interrupt
occurred frol that line within 30 .illiseconds. (Beg 1'11'
contains the line's address.)

Y4G2

Witb the scanner stopped at the
selected line address (in reg.
I'll'), an II 1'43' indicated
that Data Set Beady was up.
On a switched line, OSB should
not be up until a call has been
sade and the connection is cosplete. If needed, reg X'14'
contains the resolts of the

0020

1SC!

0100
0,1,
3

Set the selected line address
to Donitor Bode 011 to wait
for Data Set Beady.
[Switched lines onlY.1

After issuing an OUT X'42' to
Y4G2
set sode 011, an IN X'42' failed
to reflect the out 1'42'. ' Reg.
X'14' contains the results of the
IN 1'42' and reg. 1'15' contains
the bits in error:

PUP

&
&
&

6

&

Pretest error.
probably an intermittent lOBS of
strObe. Berun
and loop on routines 1580 aDd
15C2.
Pretest error.
Rerun routine 1578
and then run
routine 1502 to
help try isolate
tbe problem. It
shoold be possible,
if necessary, to
scope this failUre
wbile stopped at
this error stop.

IH X'II3'.

0'

o
o

ERROR DESCRIPTION
stopped at the line (BCB)
address 1n reg X'1", indicated that DLO was already
on. since a call has not
yet been placed or received,
OLO should bave been off.
Beg 1'1~' contains the actual
IN 1'~3' data received.

15cl

o
o
o
o
o
o

099- 37 05E- 09

A-150

Pretest error.
Berun and loop
on appropriate
routines as
given below:

RS304
RS304

A-l10 Rerun 1550.
A-170 Rerun 1552.

Byte 0:
Bit 6-lIode bit 1 set in error.
Bit 7-lIode bit 2 failed to set.

Type 1 Scanner 1FT

X3705Fll 5.0.107

IBM 3105 CQM~UNICATIONS CONTROLLER
TYPE 1 COM~UHICATIONS SCANNER 1FT SYMFTO" INDEX

D99-3705E-09

'I't

,""j

ROUT. ERROR fUNCTION TESTED
CODE

ERROR DESCRIPTION
Byte 1:

SUSPECTED CARD
LOCA'rION (s)

PROG
"A5K

Bit O-low priority bit failed
to set.
Bit 1-diagnostic mode set
in error.
Bit 2-DTR dropped
Bit 3-syncb~onous mode bit
failed
Bit 4-external clock bit
failed
Bit 5·oata rate select bit
failed
Bit 6-oscillator select
bit 1 failed
Bit 7-oscillator select
bit 2 failed.
15CA

fETMM
PAGE

COMMENTS

8S304

A-l10

Rerun 154A.

R5306

A-160

Berun 153e.

R5306
R5306

1-160
A-160

R5306

A-160

R5306

A-160

R5306

A-160

R5306

A-160

Rerun 1532.
Rerun 152A
and 152C.
Rerun 1536
and 1538.
Rerun 1S2E
and 1530.
Rerun 1542
and 1544.
Rerun 1546
and 1548.

xxx X Note:
0,
3

15CA

PEALD
PAGE

1,

OXOF
0,1,
3

At this point, if
the line tested is a switched
line, the routine will
display X'EOOA' in Display
B to indicate that it is
waiting for Data Set Ready.
At this time, the operator
should place a call to the
tested address.
After having received the
call, set the selected line
address back to monitor
mode 11.

See the description of
informational
display X'EOOA'
for·further
information.

After issuing an OUT X'42' to
mode 11, an IN X'42' failed to
reflect the OOT X'42'. Reg.
X'14' contains the ~esults of
the IN X'Q2' and reg. X'lS'
contains the bits in error:

Y4G2

A-ISO

ffFf

Test error.
Berun and
'"loop in the
apPJ:opriate
rolitines as
given below:

Byte 0:
Bit 6-mode bit 1 failed to set
Bit 1-mode bit 2 failed to set

R5304
R5304

A-170 Berun 154E.
A-110 Berun 1552.

R5304

A-170

Berun 154C.

R5306

A-160

Rerun 153C.

R5306
R5306

A-160
A-160

Berun 1532.
Rerun 152A and
152C.
Rerun 1536 and
1538.
Rerun 152! and
1530.
Rerun 1542 and
and 1SQ4.
Rerun 1546 ~nd
1548.

Byte 1:
Bit a-low priority bit set in
error.
Bit l-diagnostic .ode set in
error.

Bit 2-DTR dropped
Bit 3-syncb~onous mode bit
failed
Bit 4-External clock bit
failed
Bit 5-data rate select bit
failed
Bit 6-oscillator select
bit 1 failed
Bit 1-oscillator select
bi t 2 failed.
15CA

OX10

Check that Data Set Ready
is up on the selected line
address.
(leased lines only)

15CA

OX12 force a bit service inter0,1,3 rupt from the associated
autocall interface, if one
is present.
(LIB types 1
and 9 only).

15CA

OX14

Checl< that OLO is now on at

5.0.108 X3705FAA

With the scanner stopped at
the selected address (found in
reg X",'), an IN X'43' indicated that Dsa was not up.
since this is a leased
line, it should be up all
the time. Reg X'14' contains
the results of the IN X'43'.
After attempting to force a bit Y4F2, Y4G2
service level 2 interrupt
(via an OUT 1'47') from the
line (BCB) address in reg.
X'11', unmasking level two
interrupts and waiting the
time of a scanner pass, no
bit service interrupt occurred
from that line.

0020

An IN X'43', executed while

0020

R5306

A-160

R5306

A-160

RS306

A-160

R5306

A-160

Test erro~.
This failure also
can be seoped while
stopped at tbe
error stop.

R5305

A-330
A-040

Fretest error.
Rerun routine 1512

Test error.

Type 1 5canner IPT

I

t_

~
':i

o
o
0
0
0
0
0
0

IBK 3705 COKKUHICATIOHS COHtROLLER
TYPE 1 CO""UNIC1~IOHS SCANHER 1FT SYKPtOK IIIDEX
ROUT. ERROR FUIICTtOIi TES',rED
CODE
the associated autocall interface, if one is present.
ILIB trpes 7 and 9 only)

ERROB DIISCRII?TtON
stopped at the line (BCB)
address in reg x'll', ind1cated tbat DLO has not co.e
on. Since a line connection
has been made, DLO should be
up. Beg X',4' contains the
receiYed IH X'43' data.

SUSPECTED CABO
LOCATION(S!

PBAtD
PAGI

PETllII
PAGB

85305

A-O'O

lSCA

OUX
1, 3

Note: At this point the
routine displays X'EOOB'
in Display B to indicate
that it 1s waiting for
lILSD. It vill automatically
continue as soon as BtSD is
present.

See the description
of informational
display X'IOOB'
for furtheJ:
inforution.

1SCA

OUX
" 3

Note: At this point the rontine will start to continuously receive and will do so
until either one of the following errors occur or until
stopped by the operator
through use of the dynaaic
co.mnnication fac1l~tf of the
DCK.

Por more inforllation on how to
stop this continuous receive function, see the
writeup for the
informational displays EOOO ~r 'EOrp

'iSCA

OX 16
1,3

While continuously receiYing,
ensure that a bit service
interrupt occurs from the
selected address at least
once eyery 30 .illiseconds

l_eA

OX11

As each bit is received,
check that no error conditions are present (and,
if function 3 was selected,
check that receive data is
a mark.)

U

HO bit service level 2 inte~
rupt from the selected line
address (in reg X'11')
occurred within 30 .illiseconds of the previous one.

UG2

RS30S

1-040

0

o

o
o
o

o

COIIKEIITS
Problem is probably in the associated line
interface or autocall unit. If
necessary, it
sbould be possible
to scope this failure while stopped
at the error stop.

OX15 Start the scanner and allow
0,1,3 a normal level 2 interrupt
to occur fro. tbe selected
address.

0

YQG2

PROG
HASK

lSC.

0

Although the selected line has
been set to monitor .ode 11,
after starting the scanner
no bit service level 2 interrupt occurred from that line
within 30 milliseconds. (Beg.
X'11' contains the address
of the line.)

1l99-3705E-09

1,3

Test error.
Probably an inter.ittent loss of
strobe. Rerun
and loop on routine
1580 and 15C2.

Test error.
probably an intermittent loss of
strobe. lerun
routines 1580 and
15C2. Ilote" I f
the 'loop on error'
option of the DCft
has been set, tbis
error will cause a
loop back, to continuously J:eceiving rather than
back to the initial start of the
routine.
Test error.
Berun routines
given for byte 0,
bits 1, 2 or .. in
error.

After a bit service level

2 interrupt from the selected

line address (in reg.
1'11'), an IN X'Q3' indicated
one or more error conditions.
Reg X' 13' contains the
received III X"3' data
(ignore bits not described):
Byte 0:

Bit O-bit off indicates
receive data was
a space (ignore
if function 1 was
selected)
Bit l-bit on indicates a
feedback check
occurred.
Pit 2-bit on indicates error
sua.ary was on.

Type 1 Scanner IPT

1412, 14F2

RS202

A-200
A-180

Rerun routine
157A.

Y4P2

115202

A-200

Bit 4-bit on indicates trans- t4G2
mit mode bit set.

115308

A-200

Berun routines
1586, 1SAC, 15lE or
15BO.
Berun routine 151C

13705PAA 5.0.109

f),

,-;
lB~ 3705 CO"MU"IC~TIONS CONTROLLER
TY?E 1 COK~UNIClTIONS SCANNER 1FT SYMPTOM INDEX

ROUT. ERROR PUNCTION TESTED
CODE

099-J'105E-Q9

ERROR DESCRIPTION

SUSPECTED CARD
LOCATION !s)

Byte 1:

PROG
IIASK

PEALD
PAGE

FETKH

COKMENTS

HGE

Bit 2-bit on indicates DSR
dropped
Bit 3-bit off indicates
RLSD dropped.
Note: If the 'loop
on error' option
of the DCII has teen
set, this error wil
cause a loop back
to continuously
receiving rather
than back to the
initial start
of the routine.
lSCA

OXIC Start the scanner and allow
0,1,3 another normal bit service
level 2 interrupt to occur
from the selected line address. (Switched lines only)

Although the selected line had
been interrupting every bit
time after starting the scanner
this time no level 2 interrupt occurred from that line
within 3q milliseconds. (Reg.
,~ 1, ~ 1', contn,i.ns .,the address of
the line.)
.

15CA

aXlE ~eset Data Terminal Ready
0,1,3 at the selected line address. (Switched lines only)

After issuing an OUT X'Q2'
IIhile stopped at the selected line address (in
reg X'11'), an IN X'Q2'
indicated that either data
terminal ready failed to
reset or one of the mode
bits reset in error.
Reg X'I~' contains the
received IN X'Q2' data
and reg X'15' indicates
which bit lias in error:

Test error.
Problem is probably an intermittent loss of
of strobe..
Rerun and
loop 9~ routines 1580 and 15C2

R5305

YQG2

A-ISO

0320

Test error.
Rerun and loop
on appropriate
routine as given.
,

/

Byte 0:
reset

RS30~

A-170

Bit ?-mode bit 2 reset
Byte 1:

R530Q

A-170

Rerun routine
1548.
Rerun routine 1552

RS306

A-160

Rerun routine 1534

R5305

A-040

Test error.
Problem is probably an intermittent loss of strobe
Rerun and loop on
routines 1580 & 15C

Bit 6-mode bit

Bit 2-Data ~erminal Ready
failed to reset.
1SCA

OX20 Start the scanner and allow
0.1,3 another normal bit service
level 2 interrupt to occur
from the selected line address. (SIIi tcbed lines onlY)

1SCA

OX22 Ensure that D5R baa now
After having dropped data ter0,1,3 dropped at the selected line
minal ready at the selected
address. (Switched lines onlYl address and allowing another
bit service to occur, in IN X'43'
indicated that DSB did not drop.
(Reg X'11' contains the selected line address and reg X,14'
contains the received IN X'Q3'
data.)

15CA

OX2q Porce a bit service inter0".3 rupt from the associated autocall interface, if one is
present. ILIB types 7 and 9
only. )

lSCA

OX26 Check that DLO is not off
0,1,3 again at the associated autocall interface, if one is
present. (LIB types 7 and 9

5.0.110 X3705FAA

Although the selected is still
set to monitor mode 11, after
starting the scanner no level
2 ~nterrupt occurred from that
line within 30 milliseconds
(Reg X'11' contains the lines
address. J

YQG2

R5305

After attempting to force a bit HF 2, Y4G2
service level 2 interrupt (via
an OOT X'Q7') from the line
(BC~ address in reg X'11' and
waiting the time of a scanner
pass, no bit service level 2
interrupt occurred from that
line.
After having dropped DTR on
communications line interface
to disconnect the line, an IN
X'43' executed while stopped

Test error.
Problem is probbably in the associated autoanswer
circui try. It
should be possible
to scope this failure while stopped
at this error stop.

0020

A-330
A-OliO

Test error.
Berun routine 1512

/

0020

Tea t erro r.
Problem is probably
in the associated
line interface or

Type 1 scanner 1FT

o
o
o

o
o
o

o
o
o

o

G
,
I

" '"i,'
1::

o
o
o

o
o

IBM 3705 CO"KUNIC~TIO"S CONTROLLER
TYPE 1 COMMUNICATIONS SCANNER 1FT SYftPTOft INDEX
ROUT. ERROR PUNCTION TESTED
CODE
only.)

15CE

XXXX

ERROR DESCRIPTION
at the associated auto call
interface indicated that OLO
was still up. It should
have dropped. (Reg X'1Q' contains the received IN X'Q3'
data. Reg X.". contains
the line address of the associated autocall interface.)

099-370&2-09

SUSPECTED CARD
LOCATION(S)

PROG
ft~SK

PEALO
PAGE

PET"ft
PAGE

COftftENTS
autocall unit. It
necessary, it
should be possible
to scope this
failure while
stopped at this
error stop.

External Data Wrap (Manual Intervention Routine): This routine allows the operator to select
virtually any two similar lines and through a wrap block (or any other leans available to hil)
send data from one line to the other. The lines may be wrapped anywhere, even down line, and
may be both leased or both switched. If switched lines are used, the wrap block is not
necessary as the transmit line can call the receive line. The operator may elect to either
utilize an autodial unit, if one is available, or to place a manual call. If leased lines are
selected, all dialing is, of course, bypassed.
'
This routine is arranged somewhat differently than other routines in this IPT; indeed, its
error looping and ending facilities are unique. The following is a brief outline of its composition
and flow:
1.
2.
3.

q.

5.
6.

7.
8.
9.

10.
11.
12.
13.
14.

15.

16.
11.
18.
19.
2L
21.
22.

23.
2Q.

Request transmit line address.
Request receive line address.
Request telephone number to be dialed. (Only if switched lines present).
Request auto call interface address. (Only if switched lines present and not manual
dialingl •
Request line speed, etc.
Request data option (start-stop ,0/7, etc.) and number or characters to wrap.
Request data characters to be wrapped.
Reset hardware.
Enable receive line.
Enable transmit line.
Dial the autocall interface. (Only if switched lines present and requested).
Wait for .anual dial completion. (Only if switched lines present and necessary).
Set mode on transmit line and wait for CTS.
Initialize program control fields.
Initialize transmit line.
Initialize receive line and set mode.
Interrupt level 2 first stage interrupt handler.
Transmit line start-stop bit service handler.
Transmit line bisync bit service handler.
Receive line start~stop bit service handler.
Receive line bisync bit service handler.
Transmit character service handler.
Beceive character service handler.
End routine (or restart).

After all needed information has been obtained from the operator, the hardware is reset,
line connection made, and the hardware and program are initialized. (Prior to this point,
if leased lines are to be wrapped, the operator must have wrapped the two lines.)
(Up to
this point any error that occurs will force a loop back to step 8, hardware reset.) Now
the routine's second level interrupt handler is allowed to process all level 2 interrupts.
As each bit service occurs, the approfriate bit service handler is given control, and it
serializes/deserializes each character, checking for line errors, start and stop bits, etc.
As each character is sent/receiveO, a request for a character service level 2 interru~t is
made. As each character service interrupt occurs the next character to send Is buffereO or
the character just received is compared to the expected data. When the last character has
been sent, the routine will start over at the start of the data, continuously'wrapping the
same data over and over. This continues until the operator makes use of the dynamic
communications facility of the DCft. At this time he may elect to either end the routine
or restart at certain points. (SEe the note under manual intervention code 'SXX, P06B for
details on ending or restarting the routine).
Most errors occurring during the test will be detected by one of the handlers in level 2.
When such an error occurs, level 2 interrupts are masked off, and the routine exits level 2
leaving the scanner and line interface hardware as it vas at the time of the error.
Any error that occurs while actually transmitting and receiving data will automatically
force a loop back to step 14. There is no way of preventing this loop except to abort the
routine. This loop vas provided so that by setting the "bypass error stop" sense switch
a good scoping loop would be available. (Note that this loop does not go back to hardWare
setup. This way it prevents any switched line connection from being broken and does not
have to wait for CTS again.)
Please note that this routine provides more of a functional test than most routines do and
was designed to be utilized as a debug and scoping tool rather than a trouble isolation
routine. As such, no suspected card locations are given except in some of the early errors
in setting up the hardware. In some cases, the comments may callout a routine to rerun to
help isolate a failure but due to possible line problels these routines may not help_

o

Type 1 Scanner 1FT

X3705PAA 5.0.111

IB~ 3705 COKKUHIC1TIONS CONtROLLER
tYPB 1 COKKUNIC1TIORS SCANKBR 1FT SynPTOn INDEX

ROUT. ERROR PUNCTION 'rBStED
CODB
15CB 0102 Porce a bit service level 2
interrupt froll the receive
11ne.

15CE

OX 011

Set data terminal and
the other selected line
control bits on at the
selected receive line
address.

D99-3105E-09

ERROR DESCRIPTION

SUSPECTED CARD
LOCUIOR(s)
After attemptinq to force a bit H1'2,YliG2
service level 2 interrupt (via
OUT X' 41' froll the line (BCB)
address in req X'11', unmaskinq
level 2 interrupts and waitinq
the time of a scanner pass,
no bit service interrupt
occurred froll ,that line.

PROG
KioSK

After issuing an OUT X'II2'
Y'lG2
at the selected line address,
an IN X'II2' failed to reflect
the OUT 1'112'. Beg X'111'
contains the actual input. X'15'
contains the bits in errors:

031'1'

PEALD

PEUII

PAGE
RS305

PAGB
1.-330
A-OliO

COIIIIENTS
}

Pretest error.
lIerun routine
1512.

Ii

..

1-150

Pretest error.
lIeg X'11' contAins
the selected
line address.
Berun the appropriate routine
as given:

B53011

1-170

R53011

A-170

Rerun routine
1550.
Rerun routine
15SIi.'

B53011

A-170

R5l06

A-160

-:P'

Byte 0:
Bit 6-lIode bit
set in
error
Bit 1-lIode bit 2 set in
error
Byte 1:
Bit. O-low priority
bit set in error
Bit 1-diagnostic lIode
set in error
Bit 2-data terainal
ready failed to set
Bit 3-synchronoos 1I0de
bit failed
Bit II-external clock bit
failed
Bit 5-data rate selected
bit failed
Bit 6-oscillator selected
bit 1 failed
Bit 1-oscillator select
bit 2 failed
Porce a bit ser y ice leyel
2 interrupt from the
transmit 1 ine.

15cE

OX06

15CE

OX 08' 5et the selected tra nsmi t
line interface to interrupt
mode 11 with data terminal
ready and the other selected
line control bits on.

After attempting to force a
bit seryice level 2 interrupt
(via OOT X'1I1') from the line
IBCB) address in reg 1'11',
unmasking level 2 interrUpts
and waiting the time of a
scanner pass, DO bit service
interrupt occurred from that
line.

YIIP2, YIIG2

After issuing an OOT X'II2'
at the selected line address,
an IN X'II2' failed to reflect
the OUT X'1I2'. Reg X'll1'
contains the actual IN X'II2'
data and reg X'15' contains
the bits in errors:

YIIG2

RS306

A-160

R5306

1-160

R5306

1-160

BS306

1.-160

aS306

1-160

R5306

A-160

R5305

031'P

Berun routine
1S1I0.
Rerun rootine
1S::IC.
Rerun routine
1532.
Berun routines
1521. and 152C.
Rerun routines
1536 and 1538.
Rerun routines
152E and 1530.
Rernn routines
15112 and 15114.
Rerun routines
1546 and 15118.

1-330
A-OliO

Pretest error.
Rerun routine
1512.

1-150

Pretest .. rror..
Reg X'11' contains
'the selected
line address.
Rerun the appropriate routine
as given:

Byte 0:
Bit 6-lIode bit
failed
to set
Bit 1-mode bit 2 failed
to set

R53011
115304

A-nO

Rerun routine
1511E.
Rerun routine
1552.

Byte 1:
Bit O-low priority
bit set in error
Bit 1-diagnostic mode
set in error
Bit 2-data terainal
ready failed to set
Bit 3-synchronous mode

5.0.112 X3105FAA

RS3011

1.-110

B5306

1-160

R5306

1-160

R5306

&-160

Rerun
1540.
Rerun
153C.
Rerun
1532.
Rerun

:toutine
routille
routine
routines

Type 1 Scanner IPT

,

./

o
o
o
0

IDa l7Q5 coalUNIC1TIOHS CORTROLLER
TYPE 1 COMMunIcATIONS SC1.HSa IlT SY.'TO~ INDIX
ROOT. ERROR FURCTION 'lISTED
CODE

15CE

15cE

OXOA

OXOC

SUSPECTED ClBD
LOCATION IS)

Force a bit seryice
interrnpt froe the selected
autocall interface.

1fter attelpting to force
a bit service leyel 2 interrnpt (v1a OUT X'47') frol
the line (BCBI address in
reg I'll', unaasking level
2 £nterrqpts and waiting
I~b.e, 1:,i" 'of, a scanner pass,
no,.bit service -interrllpt
occurred frol tbat line.

Y1Il'2, YIIG2

Set the selected autocall
interface to interrnpt sode
11.

After issuing an OOT 1'42'
at the selected line
address, an II X'42' failed
to reflect the 00'1' X'42'.
Reg X'14' contains tbe
actaal II X'42' data and
reg X'15' contains the
bits in error:

Y4G2

.ROG
USK

PElLD
PAGE

lEU II

85306

A-160

RS306

1-160

R5306

1-160

R5306

1-160

RS305

1-330

PAGE

1-0110

0300

COIIUNT5
1521 and 152C.
Rerlln rOil tines
1536 and 1538.
Rerun rOllti nes
152B and 1530.
Reran roatines
1542 and 1544.
Rerun rOlltines
1546 and 1548
Pretest error.
Rerlln routine
1512

1-170

Pretest error.
Reg X'11' contains the selected line (BCBI
address. Bernn
the appropriate
rontines as 9iyen:

R53011

A-170

BS3011

1-170

Reran routine
1 Sill!.
Reran routine
1552.'

B5305

A-040

Pretest error.
Rerun rOil tine
1580. Reg.
X'''' contains
the selected
line (BCBI
address.

A-190
A-200

Pretest error.
Proble. probably
lies in the aotocall circuitry
io the line adapter. Reg X'11'
contains the
selected line
address. If scopis necessary,
it should be
possible to
scope this
failure while
stopped at
this error.
Berun routines
given:
Rerun routine
155C
Rerun routine
151C
Berun routine
1520
Rerun routine
1528
Rerun routine
15211

Byte 0:
Bit 6-lode bit
failed
to set
Bit 7-lode bit 2 failed
to set_
15CE

o
o
o

ERBOR DESCRIPTION
bit failed
Bit Ii-external clock bit
failed
Bit 5-data rate selected
bit failed
Bit 6-oscillator selected
bit 1 faUed
Bit 7-oscillator select
bit. 2 faUed

0

0
0
0
0
0

D99-3705E-09

OXOE

1110w a norsal bit service
interrupt frol the selected
autocall interface to occur.

After setting sonitor .ode
Y402
11 to allow Dorlal bit service
reqllests, startiDg the scanDer,
and waiting up to 30 .il11seconds for a level 2 interrupt
frol the selected line, none
occurred~

15CE

OX10

Cbeck tbe static conditions
on the autocall interface
(.VI should be the only
active line.)

Vith the scanner stopped at
the selected line address,
aD 1M X'43' indicated that
PWI was not on or other
bits vere OD in error. Reg
1'14' contains tbe results
of tbe IN X'II3' and reg.
X'1S' contain, the bits
in error:

r402

91'1'C

Byte 0:
Bit O-should always be
zero
Bit 3-IIPR vas on in error.

o

Bit 4-BB8 bit
error
Bit 5-184 bit
error
Bit 6-RB2 bit
error
Bit 7-HBl bit
erroc.

RS308

lias on in

RS308

was on in

R5308

was on in

115308

was 011 in

RS308

Byte 1:
Bit O-ACB was on in error

Type 1 Scanner IF'l'

RS307

13705PU 5.0.113

,.",

1~" 3105 CO""QN~CATlONS COHTRO~LER
TYPE 1 CO~~UNICATIONS SCANNER 1fT 3YNPTOM

ROUT. ERROR PUNCTION TESTED
CODE

099- 31 05E- 09
INQ~X

EaROR DESCRIPTION
on in error
on in error
not on
on in error

FEALD
PAGE
R5301
RS301
R5301
R5306

Bit 5-cOS vas on in error

85307

Bit
Bit
Bit
Bit

I-PHD
2-DLO
3-PWI
q-CBQ

vas
was
vas
vas

SUSPECTED CARD
LOCATION (sl

15CE

OX12

After setting C8Q at the
autocall interface, allow
another bit service interrupt to occur.
(To check
status of line after setting CRQI

With ~ode 11 set at the
selected line add ress, tho
scanner vas started, and
after vaiting up to 30 milliseconds for a level 2 interrupt from the selected line,
none occurred.•

15CE

0114

Check that CRQ h as been set
at the selected autocall
interface and that DLO is
nov up also. (CRQ should
have been set via an OUT
X'43' just after cbecking
the static conditions of the
aetocall interface.)

Witb the scanner stopped at the f4G2
selected line address, an IN
X'43' indicated that OLO had
not coae up, CRQ was not set,
or othor conditions were in
error. Beg X'14' contains the
received IN X'43' data and reg
X'15' contains the bit. in
error:

PROG
IIASK

85305

Y4G2

91'PC

FETKK
PAGE

Rerun routine
1556.

A-040

Pretest error.
Rerun routine
1580. Reg X'11'
contains the
selected line
(BCBI addrel3s.

A-190
A-200

Pretest error.
Problem probably
lies in the autocall circuitry
in the line
interface. Reg X'lt
contains the selected Une address. It seoping
is necessary,
it should be possible to scope
this failure while
stopped at this
error stop. Rerun
routine given:
Berun routine 155C
Rerun routine lS1C
Rerun routine 1520
Rerun routine 1528
Berun routine IS2Q

Byte 0:
R5301
R530B
R5306
R5308
RS306
R5306

Bit O-should always be zero.
Bit 3-DPR ~as on in error.
Bit 4-NSB bit vas on in error
Bit 5-NB4 bit vas on in error
Bit 6-NB2 bit vas on in error
Bit 1-NB1 bit vas on in error
Byte 1:
Bit
Bit
Bit
Bit
Bit
lSeB

OX15

Wait up to 30 seconds for
Data Line Occupied (DLa)
to come up on t.he selected
auto-call line:interface.

15CE

XXXX

!lote: At this point the
selected telephone number
is dialed by a SUbroutine
Before each number is dailed,
X'E03n' will be displayed,
where 'n' is the digit to
be dia led.

15CE

XXXX

Note: After dialing the
selected number, the routine will wait up to one
minute (or until ACR comes
Up) for an answer tone.

15CE

0116

While waiting for COS to
come up, cbeck to ensure
that a bit service interrupt occurs from the auto-

5.0,.114 X3705FH

O-ACD
1-PNO
3-PWI
4-CDQ
5-COS

was on in
was on in
dtopped
failed to
vas on in

R5301
R5301
RS301
R5306
115301

error
error
set
error

COKKENTS

Rerun routine 1556
Pretest error.
Problem probably
lies ~P the autocall circuitry in
the line interface.
Beg X'11' contains
the selected line
address. If
scoping is necessar
i t sbould be
possible to ~cope
this failure while
stopped at this
error stage.

After setting Call Reguest and
waiting 30 seconds, DLO failed
,;tq ,come uP~1 Reg X'14' contains
the received IN 1'43' data.

See the description of subroutine
error codes '1XOC'
thro'lgh '1I1A'
for a description
of the 'dial-adigit' subroutine
and its error
codes.

Although the selected 8utocall interface was set to
mode 11, no level 2 bit service interrupt occurred from

Y4G2

RS305

A-040

Pretest error.
Probably caused
an inter mi ttent loss of

by

Type 1 Scanner 1FT

"

o
o
o

o

Ie~

3705

CO"~UNICATIO"$

CONTROLLED

TTPE 1 COH"PNIC1TIONS SCANNER 1fT SI"PTOK
ROUT. ERROR FUNCTION TESTED
CODE
call interface at least once
every 30 milliseconds.

PROG
"ASK

After a bit service. interrupt
fro. the selected autocall
interface (reg X'll' contains
its addrsss), an IN X'43' indicated that lCR had come
up. Reg X'13' contains the
rece1ve4 IN X'43' dAtA. It
byte 1, bit 5 is oft, Aca
probably came up as it should,
indicating that ·the autocall
unit never received an ansver
tone frol the called number.
If that bit 1s on, SOle other
i.proper condition in the
autocall circuitry brought ACR
up.

15CB

OX1A

Ensure that either COS or
lCR comes up within one minute after dialing the selected number.

After waiting one minute, neither
cale up. If an answer tone vas
received, COS should have cOle
up. If not, the ACB counter in
the autocall unit should have
timed out and brought up ACB.
Reg X'13' contains the last
received IN X'43' data. Reg
X'11' contains the selected
line (BCBI address.

OX1C

After receiving COS, indicating that the communications line interface now has
control of the line, reset
CRQ to free the autocall
unit.

After issuing an OUT X'43' with 14G2
data of all zeros to the selected autocall address to
reset eRg, an
X'43' indicated CRg was still active.
Reg X'11' contains the line
(BCB) address and reg. X'14'
contains the received IN X'43'
data.

0008

0300

·
U

15CB

!:

.;.'......

'Ii','

PET""
PAGE

COMMENTS

Pretest error.
If it appears
tha t an answer
done was never
received, be sure
that the correct
telephone number
vas entered.
Also try dia11ng
the number froll
a manual phone
and ensure that
t he line is not
busy or out-ofoJ:der.

A-190
A-200

Pretest error.
Problem is probably in the autocall line interface
Rerun routine 1558.

R5304

1-170

Pretest error.
Rerun routi nes
1550 and 1554.

R5305

A-040

Pretest error.
Rerun routine
1580 to try
to find why
a strobe was
apparently
lost. Reg
I'll' contains
the selected
communications
line CBCB)
address.

RS307

A-180
A-200

Pretest error.
Rerun routine
1578 and then
run routine
l5DO to help
isolate problem
may lie in the
associated autocall circuitry.
It should be

I"

~5CE

OXID

Nov, disable the autocall
interface from interrupting.

While stopped at the autocall
interface address (found in
reg X'll') an OOT X'42' was
issued with all bit off. An
IN 1'42' then indicated that
one of the 1I0de bits failed
to reset. Reg X'14' contains
the results of the IN X'42'

Y4G2

15CB

OX1E

Start the scanner and allow
a nor.al bit service interrupt from the selected
transmit line.

Since the selected transmit
line interface is set to
aode 11, when the prior
bit service interrupt was
reset and the scanner started,
an interrupt from that line
should have occurred within
30 milliseconds and did not.

Y4G2

15CE

OX20

Check that Data Set Ready
is active on the transmit
line interface.

After the scanner stopped at
the selected line CBCB)
(which is reg X'll', an IN
X'43' indicated that DSR was
off. If this is a leased
line, DSR should aLways be
up. If this is a switched
line, the call has been completed and DSR should now be
up. (Reg X'14' contains the

Type 1 Scanner 1fT

FBALD
PAGE

strobe. Rerun
and loop on routine 1580. If
needed, reg X'll'
contains the
selected l1ne
(BCB) address.

Also while waiting for COS,
monitor ACB to insure that
it never comes up on the
autocall interface.

o

e

SUSPECTED CARD
tOCATION(e)

OX18

o

o
o
o
o

ERROR DESCRIPTION
that line within 30 milliseconds of the previous one.

15CE

o
o

o

099- 3705E- 09

IN~EX

0020

X3705FAA 5.0.115

'4, . J

,

" ..#/

'-,
IB~ 3705 CO"~UHICATIONS CONTROLLBR
TYPB 1 COKKUPtCATIONS SCANHBR 1fT SYftPTOn INDBX

ROOT. EaROR PORCTIO. TESTED
CODE

EaaOR DESCRIPTION
received IN x'Q3' data.)

D99-3105B-09

SUSPBCTBD CABD
LOCATION,s)

PROG
nAS~

PEUD
PAGB

PETKK
PAGE

~.

",.

;;

COIIII'ENTS
possible to
scope tbis
error while
stopped at this
ettot stop.

\,

..... _....

lSC!

lSCE

0122

OX2Q

While waitinq for a manual
call to be placed, ensure
that a bit service interrupt occurs from the
selected transmit line at
least once every 30
lIi11iseconds.

Although the selected transmit Y4G2
address (found in reg x'll'
was set to monitor mode 11,
no level 2 interrupt occurred
from that line within 30 milliseconds of tbe previous one.

Set transmit Bode, requestto-send, and send data to a
mark on the transmit line
interface.

With the scanner stopped at
the selected transmit
line interface, an OUT I'Q3'
was issued to set the transmit mode, RT5, and send data
bits. An IN 1'43' then indicated that one of the bits
failed to set or the new sync
bit set in error. Req 1'14'
contains the IN X'43' data and
reg X'lS' contains the bits in
error:

Y4G2

R5305

OPOO

R5308

A-OQO

A-180
A-200

Pt.etest error.
Probably caueed
by an intetmittent loss of
strobe. Berun
and loop on
rOlltine 1580.

,

Test error.
Rerun the appropriate routine
as given below.
If needed, reg.
x'll' contains
the selected COImunications line
address.

Byte 0;
Rerun
l5lA.
Berun
1520.
Berun
1526.
Berun
1522.

Bit 4-transait mode bit
failed to set.
Bit S-new sync hit set in
error.
Bit 6-BTS failed to set.
Bit 1-send data bit failed
to set.

routine
rOIlUne
rOIlUne
routine

15cfi

OX26

IIh11e waitinq for clear to
send, check to ensure that
a bit service interrupt
occurs frol' th, "selected
transmit line ~nterface at
least once eVllry 30 milliseconds.

Although the selected transmit
line interface was set to Gode
11, no lev,l 2 bit service
Ii,n.telifupt C)ccur~e4 fro. that
1ide within 30 ai1lia.conds of
tbe previous one.

Y4G2

R5305

&-040

Preteet error.
Probably caused
by au ,l,nter- .
I1tte~:e ioea
of strobe.
Rerun and loop
on routine
1580. If
needed reg X'll'
contains the selected line (BCB)
address.

15CE

OX28

Wait up to 30 seconds for
Clear to Send to come up on
the selected transmit line
interface.

After setting Bequest to Send
and waiting 30 seconds, clearto-send failed to come up.
Beg X'13' contains the last
received 1M X'43' data. Reg.
X'11' contains the selected
line address.

Y~G2

R5307

A-180
A-200

Pretest error.
Berun routine
1578 and then run
routine l5BO to
hel p iaolllte
problem. Problem
l18y be in the
1I0de.. If scoping is required,
i t can probably
be done wbile
stopped at thill
error stop.

15CE

Ox30

Set the selected transll1t
line interface to interrupt
mode 11 with data terminal
ready and the other selected
line control bits on.

After issuing an OOT 1'42'
at the selected line address,
an IN X'42' failed to reflect
the OUT 1'42'. Req X'14'
contains the actual 1ft 1'42'
data and reg 1'15' contains
the bits in errors:

I4G2

&-150

Pretest error.
Reg x'll' contains
the selected
line address.
Berun the appropriate routine
as gi'fen:

03PP

.... ~-

Byte 0:

5.0.116 X3705FAA

-

Type 1 Scanner 1FT

---."

~---"------------~---,---~-

o
o
o

o

till! 3706 COIlIIOIlICATIOHS COIl'UOLLBR
~iPE

1

CO"l\OHIC1~IO'S

,0:

lOUT. BRROR FOIICTION TESTED
CODB

BRROI DESCRIPTIOII
Bit 6-.ode bit 1 failed
to set
Bit 7-.ode bit 2 failed
• to set
Byte

SOSPBCTED CARD
LOCATI0HCsI

PROG
aASK

1SCE

XXII

I~CE

OXll _ Force another bit
service interrupt
fro. tbe selected
transait line
address.

After atteapting to force
a bit service level 2
interrupt (via OUT
1'47' frOB tbe line
(BCB) address in reg.
X"", unlasking
level 2 interrupts
and waiting the tiae
of a scanner pass, no
bit service interrupt
occurred froa that
line.

15CE

0132

After issuing an OOT X'43'
14G2
(with tbe transmit aode, BTS,
and send data bits) wbile stopped
at the transmit line address,
in 1M X'43' indicated that one
of those three bits bad failed
to set or CTS had dropped. Beg.
X'14' contains tbe received 1M
X'43' data and reg 1'15'
indicate. the bits in error:

"

FBALD
PAGB
1IS30q

FETHa
PAGE

RS301!

&-110

BSlOq

A-170

RSl06

1-160

coalENTS
Rerun routine
15111.
Rerun routine
1552.

,=

Bit 0-10w priority
bit set in error
Bit I-diagnostic .ode
set 1P error
Bit 2-data terlinal
ready failed to set
Bit 3-synchronous .ode
bit fll1184
Bit q-external clock bit
failed
Bit 5-data rate selected
bit failed
Bit 6-osci11ator selected
bit 1 failed
Bit 7-oscillator select
bit 2 failed

",i

Berun routine
15qO.
Berun routine
153C.
lerun routine
1532.
lerun routines
1521 and 152C.
lerun routines
1536 and 1538.
Rerun routines
152E and 1530.
Berun routines
1542 and 15QQ.
Rerun routines
15116 and 1548.

BS306

A-160

15306

1-160

15306

1-160

RS306

1-160

B5306

A-160

BS306

A-160

8S305

A-330
A-OliO

Pretest error.
Berun routine
1512.

1-180
A-200

Test error.
leron and loop
on routines
given below;

Bote: The code associated with error codes OX31 through 0134 was inserted to prevent
erroneous error indications wben continuing fro. an error stop that occurred
while wrapping data. Wben continuing fro. such an error stop, the routine
will loop back to this pOint4 The traDs.it line is set to a lark and
the routine waits until the receive line sees a sark. This is done to
ensure that if the trans. it line was at a space at the tiae of failure,
the delay tise through any sode. will not allow that space to get
through as tbe test restarts and be detected as a start bit and thus
cause an error.

"

o
o
o

D99-3705B-09

SCl.RBI 1FT SYRPfOa IHDBI

o

o
o
o
o
o

-~~-

Ensure that tbe trans.it
line is still in transsit
mode, witb send data at a
aark, and BTS and CTS still
up. (This action is done
this second tiae to allo.
for looping.)

l'flF2, HG2

OB20

Brte 0:
sode bit
failed
Bit 6-BTS bit failed

R5308

Berun routine

BS308

Bit '-Send data bit failed

BS308

Rerun routine
1526.
Berun routine
1522.

85307

Berun routine
1578.

Bit

q-transai~

ISlA.

Byte 1:
Bit 2-CTS bad dropped

l5CE

0133

Force a bit service
interrupt frOB tbe selected
receive line interface.

Type 1 Scanner 1FT

lfter atteapting to force a
bit service level 2 interrapt
(via OO! X'41') froa the line
(BCB) address in reg. I'll'

rQF2,Y4G2

85305

A-330
A-040

Pretest error.
Berun routine
1512.

13705FAA 5.0.117

IBa 3705 COKKDHICATIONS CONTROLLER
TYtl , COKauHICATIONS SCANNER Iff SyaPTOa INDEX
lOUT. EBROB FUNCTION TBSTBD
COOl

BBIOB DESCBIPTIOn
un.asking level 2 interrupts
and waiting the tille of a
scanner pass, no bit service
interrupt occurred froll tbat
line.

lSCE

OX34

Check that Data Set Beady
is up on tbe selected
receive line address.

1SCE

XXXX

lSCB

OX36

Note: 1t this
point the routine
will display 1'1I00C'
in Display B
IIbile waiting
for tbe receive
line to see a mark.
Set the selected receive
line interface to interrupt
mode 11 IIith data terminal
and the otber selected line
line control bits on.

D9 9- 37 05E- 09

SUSPECTED CABO
LOCATION(S)

FEALD
PAGE

FBT"n
P1GE

COnnZHTS

,
\

Witb the scanner stopped at
ths selected address (found in
reg I'll'), an IN X'43' indicated that DSB was not up.
If this is a sllitcbed line,
completion of the autoanswer
function should have brougbt
it up. If this is a leased
line, it should be up all
tbe tille. Beg 1'14' contains
tbe results of the IN X'43'.

After issuing an OUT X'42'
at tbe selected line address,
an IN X'42' failed to reflect
tbe OOT X'42'~ Beg X'14'
contains the actual IS X'15'
contains the bits 'in errors:

PBOG
"ASK

0020

Y4G2

pretest error.
This failure also
can be scoped
while stopped
at the error
stop.

03F1'

1-150

See the note
preceding error
code OX31 and
the desCription
of informational
display X'EOOC' for
1I0re information.
Pretest error.
Beg X'll' contains
the selected
line address.
Berun the appropriate routine
as given:

Byte 0:
Bit 6-lode bit 1 failed
to set
Bit 7-lIode bit 2 failed
to set

RS304

1-170

R5304

A-170

RS304

1-110

B5306

1-160

Berun routine
1542.
Berun routine
1552.

Byte 1:
Bit O-low priority
bi t set in error
Bit 1-diagnostic mode
set in error
Bit 2-data terminal
ready failed to set
Bit 3-synchronous mode
bit failed
Bit 4-external clock bit
failed
Bit 5-data rate selected
bit failed
Bit 6-0~cillator selected
bit 1 failed
Bit 7-oscillator select
bit 2 failed
lSCE

OX38

Start the scanner and alloll
another noraal bit service
level 2 interrupt to occur
froll the selected receive
line address.

Although the selected address
Y4G2
is still set to monitor Bode
11, after starting the scanner
no level 2 interrupt occurred
fro. that line witbin 30 milliseconds (Reg X'13' contains the
lines address.)

1SCE

OX3A

Set the selected receive
line address to interrupt
mode 10 with DTB and other
selected control bits on.
(If wrap to be in startstop 1I0de).

After issuing an OUT 1'42'
while stopped at the line
(BCBI address in reg X'13',
an IN X'42' failed to
reflect the OUT X'42'. Reg
X'14' contains the received
IN X'42' data. Beg 1'15'

5.0.118 X3705FA1

Y4G2

B5306

A-160

IS306

A-160

Rerun routine
1540.
Berun routine
l5aC.
Berun routine
1532.
Berun routines
15211 .. 1S2C.
Rerun routines
1536 6 1538.
Rerun routines
l52E & 1530.
Rerun routines
1542 1\ 1544.
Rerun routines
1546 & 1548.

15306

1-160

R5306

1-160

R5306

A-160

RS306

A-l60

B5305

1-040

Test error.
Problem is
probably an
interaittent
loss of strobe.
Rerun and loop
011 routine 1580.

11-150

Test error.
Rerun and loop
on appropriate
routines as
given below:

o
o
lBK 3705 CO""UNICATIOHa CO"TROLLa8
TYPE 1 CO""UNICATION5 SCANNBR 1FT SYKPTOK INDEX

o
o

o
o
o

ROUT. ERRoa FUHCTION TESTED
CODE

ERROR DESCRIPTION
indicates

in error:

u'
o
o
o
o

bits were

Bit 6-lIIode bit 1
Bit 7-lIIode bit 2

PROG
"ASK

FEALD
PAGE

FETK!
PAGE

COKKEHTS

85304
BSlOI!

1-170
1-17q

Routine 154E
Routine 1552

RS301!
R5306
R5306
B5l06

A-nO
A-160
A-160
1-160

Routine 154C
Routine 153C
Boutine 1532
Routine 1521
and lS2C.
Routines 1536
and 1538.
Ilout iDes 152E
and 1530.
Routines 1542
and 1511Q.
Boutinu 15116
and 15118.

erte 1:
Bit
Bit
Bit
Bit

~I

O-low priority bit
I-diagnostic lIIode bit
2-Data Terminal Ready
3-srnchronous lode bit

Bit II-external clock bit

RS306

A-160

Bit 5-data rate select bit

R5306

1-160

Bit 6-oscillator select bit 1

1l5l06

1-160

Bit 7-oacl11ato£ aelect bit 2

88306

1-160

RS305

1-040

lSCE

OXlC

Start the scanner and allow
a norillal bit service interrupt from the selected
transmit line interface

15CE

XXXX

NOTE: All of the remaining errors are those which can occur at any tillle while continuously
wrapping data. They are the result of chec~s that are made as each bit or character is
transmitted or received. At any of tbese error stops reg X'll' contains the address of a
co.mon information and control area for the routine. Beg X'16' wil~ contain the address of
the individual transmit and receive lines buffers and control areas. It is hoped tbat these
areas may provide additional helpful failure infor.ation~ The following describes these
areas:

o
11.'.

~hich

SUSPECTED CARD
LOCATION Is)

Byte 0:

o
o

D99-J705E-09

Reg X'll'

Since the selected cOIII.unications line interface is set
to lIIode 11. when the prior
bit service interrupt was
reset and the scapner started.
an interrupt fro III that line
should have occurred within 30
lIIilliseconds and did not.

Y4G2

Test error.
Rerun routine
1580 to try
to find why a
strobe was
apparently lost.
Reg X'll' contains the
selected COIImunications line
IBCB) address.

address of a two byte common control area, where:

Byte 0:
Bit
Bit
Bit
Bit

O-error occurred while in level 2
1-wrap running in ASCII mOde
2-wrap running in EBCDIC mode
3-leased lines are being used

Bit
Bit
Bit
Pit

4-ununsed
5-character service has been requested
6-Transmit line not running
7-receive line not running

Byte 1;
Total (in hex) number of characters in data string to be wrapped.
Reg x'16'

= address

of 2 byte transmit control field. where:

Byte 0:
Bit
Bit
Bit
Bit

O-BSC mode flag
'-Pads sent flag
2-Start bit sent flag
3-sending stop bits flag

Bi t
Bit
Bit
Bit

4-un used
5-character service has been requested
6 lind
'-number of stop bits per character

Byte 1:
Total number of data bits per character.
Reg X'16' + 2 = address of 2 byte receive

contro~

field. where:

Byte 0:
Bit O-BSC mode flag
Bit 1-srn character received
Bit 2-start bit received

o

Type 1 Scanner 1FT

Bit 4-unused
Bit 5-character service has been requested
Bit 6 and

Xl70SFAA 5.0.119

IBft 3105 CO""UNICATIONS CONTROLLER
TYPB 1 COIIUNICATIORS SCANNER 1FT SYIPTOI INDEX
BOUT. EBROR PUNCTION TESTED
ERROR DBSCRIPTION
COD!
Bit 3-receiving stop bits

099-31058-09

SUSPECTED ClRD PROG fEALD fETnl
LOCATION(s) RlSK PlG!
P1G!
Bit 7-nusber of stop bits per character

CO""EHTS

Byte 1:
Total nUlber of data bits per character.
Reg X'16' + q • address of 2 byte trans.it bit control field, where:
Byte 0:

Character currently being sent (shifted right by nUlber of bits sent so far)

Byte 1:

Nusber of bits of this character sent thus far

Beg X'16' '. 6 .. address of 2 byte receive bit control field where:
Byte 0:

That portion of the current character received thus far (left-justified)

Byte 1:

Husber of bits of this character receive thus far

Reg X'16' + 8 .. address of 2 byte translit character control field, where:
Byte 0:

Trans.it character buffer (next character to be sent)

Byte 1:

Displacement into data string of that character

Reg X'16'

+

Byte 0:
Byte 1:
Reg X'16'

+

10 (1'1')

= address

of 2 byte receive character control field, where:

Receive character buffer (last complete character received)
Displacesent into data string of what that character should be
34 (X'22') .. address of data string (63 bytes long saximum,

15CB

Ol3E

As each character is
1fter having completed
received, ensure that it is
assembling a character, tbe
egual to the expected receive character received ( in reg.
character.
1'13', byte 0) was compared
to the character expected (in
reg 1'15', byte 0) and the
two were not identical.

Continuing
frOB tbis
error will
always cause
a loop back
to wrapping
data. See
cOlaents preceding error
codes 0102,
and tbis one.

lSCB

0140

Ensure that a character
service interrupt occurs
fros both the transmit
and receive lines at least
every 500 li11iseconds.

Par sase reason, either the
transmit or receiYe lines or
both bave stopped operating
or never started. Look at
the co~.on control area to
see which is DOt running.
Analyze the transmit and
receive control fields to
find out why. Look at such
things as the pads sent, syn
received, start bit sent,
etc., flags.

Continuing from
tbis stop will
always cause a
loop back to
wrapping data.
See coa.ents
preceding error
codes 0102, and
OXlE.

15CB

0142

Ensure that no bit service
interrupts occur fros lines
other than those being
wrapped.

An interrupt occurred fros a
line other than the translit
or receive lines. Reg 1'14'
contains the address that
interrupted.

Continuing frol
this stop Ifill
cause a loop
back to napping
data. See comsents preceding
error codes
0102 and OX3B.

lSCE

0144

As each transmit bit service
interrupt occnrs, ensure
'that no line errors are
present.

After a bit service interrupt
from the transmit line, an
IN 1'43' indicated an error.
Beg 1'14' contains the
results of the IN I'Q3'. Reg
X' 15' contain. the bit. in
error:

2188

Continuing fro.
this stop will
cause a loop'
back to wrapping

data.

See

co.uate preceding error
codes 0102
and OX3E.

t
5.0.12013705f11

->-

,\

;'

Type 1 Scanner IFT
f

- ....,

f

~

i.

o
o
o
o
o

IBM ~705 COMMONICATIONS CONTROLLER
TYPE 1 COKKONleATIOSS SCANNBB 1FT SlKPTOft INDEX
ROUT. BRROR FONCTION TBSTED
CODB

Byte 0:

PBlLD
PAGB

PBT~ft

PAGE

COftftEMTS

(Check SUll1ll8l:Y
lIay be on
because of a
fesdback check,
0511 dl:opping,
or a bit
overrun)

Bit 6-BTS dropped
Byte 1:
Bit O-CTS dropped
Bit ~-TTY echo check
occurre4
lSCE

lSC!

OX~6

OXlia

Bach tiae a start bit is
transmitted, ensure that
no error conditions are
present. (Start-stop lode
only)

Bach time a data bit is
traDslitted, ensure that
it vas indeed sent.
IStart-stop lode only,

After issu1ng an DOT X'43'
to the translit 11ne (with
data of X'OOOA') to send a
start bit, an IU 1'43'
indicated a failing condition.
Beg. 1'14' contains the
received IN X'43' data Ind
reg. X'15' contains the bits
1n erro~ as described in
error code OXqa, below.

2B80

After issuing an OOT X'43'
to the transsit line to send
a bit, an IN X'II3' indicated
a failure. Beg X'lll' contains
the results of the IN X'43'
and reg. X'lS' contains the
error bits:

2B80

'I

Continuing frol
this stop will
cause a loop
back to wrapping
data. See
co ••ents preceding erI:or
codes OX02 and
DUB.

(Interface checi
su •• ary lIay be
on because of
a feedback check,
DSB dropping, OI:
a bit overrun.)

Bit 2-interface check
suslary bit vas on
Bit Ii-transmit lode dl:opped
Bit 6-BTS dropped
Bit 7-Send data failed

:i

Continuing froll
thia atop will
cause a loop
back to wrapping
data. See comsents preceding
erI:or codes OX02
and OUB.

Byte 0:

"'.1

Byte 1:
Bit O-CTS dropped
c5CE

OX4&

Bach tile a stop bit is
sent, ensure that no error
conditions are present
(start-stop sode).

o

o

PBOG
ftASK

Bit Ii-trans lit sode bit
reset in errol:

'0,
o
o

CABO
LOCATION(s)

SUS~BCTBD

Bit 2-interface check
summary bit vas on

o

o
o
o
o

BBBOB DESCRIPTION

D99-3705B-09

After issuing an DOT X'~3' to
the trans.it line with data
of X'OOOB' to send a stop bit,
an IB X'43' indicated a failure.
Beg X'14' contains tbe IN
X'43' data and reg X'lS' contains the error bits as
described in error code
OX4a, above.

2B80

Continuing frOID
this stop vill
cause a loop back
to wI:apping data.
See cOlDments
preceding error
codes 0102 and
OIlB.

lSCE

OX4C

As each pad bit is sent,
ensure that no error
conditions exist on the
transait line. (Bisync
mode only)

After issuing an DOT X'43' to
the transmit line to send a
pad b1t, an IN 1'43' indicated
a fa 1111I:8. !leg I' 14' contains
the results of the IN X'~3'
and reg X'lS' contains the
bits in eI:ror as described in
error code OX~8.

2880

Continuing frOID
this stop will
cause a loop
back to wrapping
data. see
coa.ents preceding error
codes 0102
and OX3B.

ISCE

OX4E

As each data bit is sent,
ensure that no error
conditions are present
on the trana.it line.
IBisync only)

After issuing an OUT X'43' to
the transait line to send a
data bit, an IN X'43' indicated a failing line condition.
Beg 1'14' contains the results
of the 18 X'q3' and reg X'lS'
contains the bits in error as
described in erI:or code 0148.

2B80

continuing frOID
this stop will
cause a loop
back to wrapping
data. See COIIlents preceding
error codes
0102 and OX3E.

Type 1 Scanner IPT

X3705PA& 5.0.121

---------~-

---~

()
IBK 3705 CO""UHICATIONS COMTBO~~Bft
TY~B 1 CO~KUHlcATloHS SCANNBft 1fT STKPTOK INPEX
BOUT. ERBOR FUNCTION TBSTED
CODE
lSCE OX50 As each receive bit service
interrupt occurs, ensure
that no line errors are
present.

eaaOR DESCRIPTION
After a bit service interrupt
from the receive line, an IN
X'43' 1ndicatdd an error on
the line,. Reg X'14' contains
the results of the 1M X'43'
Reg X'lS' contains the bits
in error:

SUSPECTED CARD
LOCATION(S)

PROG
"1SK
2810

Byte 0:
Bit 2-Interface check
sum.aty bit was on
Bit 4-Transmit 80de hit was
set in error.

FEALD
PAGE

PETKK
PAGE

COUENTS
Con tinuing from
this stop will
cause a loop
back to wrapping
data. See
comments preceding
error codes
OX02 and OX3E.
(Check summary
may be on because
of a feedback
check, DSB
dropping. or a
bit overrun.)

Byte 1:
Bit 3-RLSD dropped
lSCE

15CB

Ox52

OXSq

As the first bit of each
character comes in, ensure
that it is a space (start)
bit. (start-stop mode
only.)

After each start bit is
received, set the receive
line to monitor mode 11
. to receive the rest of the
character. (Start-stop
lIode only.)

After each start-stop character
is received, the receive line
i~ placed in monitor mode 10
to look for the next start bit.
After the next interrupt, an
IN X'43' indicated that receive
data was not a space. Honitor
• ode 10 should allow an
an interrupt onlJ when receive
data is a space or Dsa drops.
Reg X'14' contains the results
of the IN X'43'.

8000

After issuing an OUt I'Q2' to
set the receive line to
monitor mode 11, an IN I'Q2'
failed to reflect the OUT 1'42'.
Reg X'lQ' contains the results
of the IN X'42'. Reg X'lS'
contains the bits in error:

PFFP

ContinUing frolll
this stop will
cause a loop
back to wrapping
dat II. See comaents preceding
error codes
0102 and OX3E •
"

Continuing from
this stop will
cause II loop
back to wrappi n9
data. See comments preceding
error codes
0102 and OX3E.
I t may help
to rerun routines
indicated below.

-",

~~

/

Byte 0:
Rerun lSIIE

Bit 6-.ode bit
failed to
set
Bit 7-lIode bit 2 failed

Rerun lSS2
and lS5Q.

Byte 1:
Rerun 15110

Bit O-low priority bit

Bit
Bit
Bit
Bit
Bit
Bit
Bit

lSCE

OXS6

Aftet all data bits of each
character have come in,
check that the proper number
of stop bits are received.
(Start-stop mode only.)

set in error.
1-diagnostic 80de set
in error
2-DTR dropped
3-synchronous mode bit
failed
II-external clock bit
failed
5-data rate selector
bit failed
6-oscillator select
bit 1 failed
7-oscillator select
bit failed

After an entire character
was received, one of the
ensuing bits was not II mark
(stop bit). Reg X'14' contains the data received by
an IN 1'43' frail the receive
control fields to determine
which stop bit vas not
received. The receive

Rerun lS3C
Rerun 1532
Berun 152A
and lS2C
Rerun 1536
and 1538
Berun 1S2E
and 1530
Rerun 1SQ2
and l5Q4
Rerun lSII6
and lS48
8000

Continuing from
this error stop
IIill cause a
loop back to
wrapping data.
See CQ.ments
preceding
error codes
0102 and OX3E.

( ~~
)

5.0.122 X310SFAA

Type 1 Scanner 1FT

10
o
IBft 3705 COftftUHICATIONS CONTROLLER
TIPE 1 COnftUHICATIONS SCANHBR 1fT SYftPTO" INDEX
ROUT. ERROR PUHCTION TBSTED
CODE

o
o

lSCE

OXS8

l5CE
l5CB

o

PROG
BASK

PB1LO
PAGE

PETnn
PAGE

COBftENTS

After issuing an OUT X'42' to
set the receive line to
lonitor sode 10, an 1M X'42'
failed to reflect the OOT
X'42'. Reg. X'14' contains
the results c·f the IR X'42'
and reg X'lS' contains the
bits in error as described
in errcr code 0154.

Continuing fro.
this error stop
will cause a
loop back to
wrapping data.
See cos.ents
preceding error
codes 0102 and
013E.

OISA

After baving asselbled an

Before requesting the cbaracter

continuing frol

OX5C

entire received character,
request a cbaracter service
interrupt. 10(5A is issued
when in start-stop sode and
OX5C is issued when in
'
bisync 10de.1

service interrupt, a cbeck
found tbat tbe previous
character received bad not
yet been serviced. Probably,
tbe previous cbaracter service
interrupt request was never
honored.

tliis stop 11111
cause a loop
back to wrapping
data. See
COlments preceding error
codes 0102 and
OXlE. Try
rerunning
routines l5B3
through l5BC.

1500

XXXX

Data Set Beady - Active (ftanual Intervention Boutine); Ensure that wben Data Set Ready is active on
the communications line interface, it is indicated as being active in an IN 1'43'. (Tbe operator
selects tbe particular line address to be tested.) After forcing a bit service interrupt froa the
tested address, Data Terlinal Beady 1s set and a test is then sade to ensure that an II X'Q3' indicates
that Data Set Ready is active.

15DO

0101

Bnsure that force bit
service (OOT X'47') causes
a bit service interrupt from
the line address under test.

1500

0102

15DO

OX03

Bnsure tbat force bit
service (OOT 1'47') causes
a bit service interrupt from
the line address under test.

1500

OX04

Ensure that force bit
service (OOT 1'47') causes
a bit service interrupt from
the line address under test.

o
o
o
o
o

SUSPBCTBO C1RO
tOCATIOHlsl

After an entire character,
including stop bits, has
been received, set sonitor
lode 10 to wait for tbe
start of tbe next character.
Istart-stop lode only.)

o
o

BBBOR DESCRIeTION
control field contains the
total expected stop bit count
and the count portion of
the receive bit control
field contains the nusber of
stop bits received thul far.

D99-3705B-09

Ensure that the data
terminal ready (DTR) bit
in IN 1'42' can be set
,by issuing OUT X'42' with
byte 1, bit 2 on.

Type 1 Scanner 1FT

After attempting to force a
14P2, 14G2
bit service level 2 interrupt
(via OOT 1'47') from the line
(BCB) address in Reg. ('11',
un.asking level 2 interrupts and
waiting the ti.e of a scanner
pass, no bit service interrupt
occurred frol that line.

R5305

A-330
A-040

Pretest error.
Rerun routine
1512.

B5306
85106

1-160
A-270

Pretest error.
Berun routine
1532.

After attempting to force a
14P2, 14G2
bit service level 2 interrupt
(via OUT 1'47') from the line
IBCB) address in Beg. 1'11',
unmasking level 2 interrupts and
waiting the tiae of a scanner
pass, no bit service interrupt
occurred fro. that line.

RS305

1-330
A-040

Pretest error.
Berun routine
1512.

After attempting to force a
Y4f2, 14G2
bit service level 2 interrupt
(via OOT,X'47') fro. the line
(BCB) address in Beg. 1'11',
unmaskiqg legel 2 interrupts and

05305

A-330
A-040

Pretest error.
Rerun routine
1512.

Either the DTB bit failed to
Y4G2
set or other bits in 1ft X'Q2'
14B2
were set in error. Beg. 1'11'
contains the lins (BCB) address
under test. Beg. X'1S 1 contains
the bits in error. (Byte 1,
bit 2 on indicates a OTB bit
failure.) Reg. 1'14' contains
tbe actual data received by
III 1'42'.

03PP

13705Pll 5.0.123

IBK 3705 COHKONICATIONS CONTROLLER
TYPE 1 COKKONICATIOHS SCANNBD 1FT SYKPTOK IHDEX
BOOT. ERROR FUNCTION TESTED
CODE

ERROR DESCRIPTION
waiting the ti.e of a scanner
pas's. no bit sen ice interrupt
occurred fro. that line.

D99-37058-09

SUSPECTED CARD
LOCATION(S)

PROG
HASK

FBALD
P1GE

FETH"
PlGB

COHBBHTS

0020

8Sl07

A-200

Test error.
Problem say be in
the CS. LIB. or
line interface.
Try testing other
lines. If failure
appears to be
isolated to a ~IB,
try replacing the
LIB isolation
card. If only
one line fails.
failuIe is in
the associated
line interface.

1500

0105

Ensure that when data set
ready is active on the
co •• unications line interface. it is so indicated
in an IN X'43'.

1501

XIXX

Autocall EIA test (Hanual Intervention Routine): Insure that all auto call EIA Receivers and drivers
can be activated at the communications line interface. (The operator selects the particUlar liQe
address to be tested.) After forcing a bit service interrupt fro. the line under test. each autocall
interface line in turn is set on and one interface line is tested to see if it is up. If the line is
up the prograa steps to the next pair of interface lines. If the interface line is not up. the
prograa stops with a Hanual Intervention code telling the operator which line to bring up.
NOTE:

15D1

1501

15D1

1501

OxO'

OX02

OX03

OX04

Digits HB8. NB4. NB2. and NBRl are turned on eaph time except when that individual Digit is
being tested. This keeps all the EIA lines down except the line being tested.

Insure that force bit
lervice (OOT X' 47') CQUUUN
a bit lervice interrupt frON
the line address under test.

Insure that Call Bequest can
be set with a Qut 1'43'

Insure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

lnaure that force bit
service (OOT X'47') causes
a bit service interrupt from
the line address under test.

5.0.124 x3705FAA

An IN X'43' failed to indicate Y4G2
that Data Set Beady was active.
(Byte 1. bit 2 was on and should
have been of,i'.) Reg. 1'14'
contains the received IN X'43'
data. Reg. X'11' contains the
line address under test.

After attemptinq to force a

bit latvico llvol 2 interrupt
(fia OUT 1'47') froe the line

Y4G2

8S305

A-330
1-040

~retest

8S307

A-200

Test error.
Problem Bay
be in CSt lib.
or line interface.
Try testing other
lines. If
failure appears
to be isolated
to a lib. try
replacing the
lib isolation
card. If only
one line fails
failure is in
the associated
line interface.

(eCB) address in Reg. X'11' •
unmasking level 2 interrupts and
waiting the time of a scanner
pass. no bit service interrupt
occurred froe that line.
ln IN '43' indicated that bits Y4G2
set in error or failed to set
because of the output X'43'.
Reg X'1S' contains the bits in
error. Reg 1'14' contains the
received IN X'43' data. Reg.
X'11' contains the line address
under test.

OFOB

After attempting to force a
Y4G2
bit service level 2 interrupt
(via OUi 1'47') from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit seryice interrupt
occurred from that line.

RS305

Atter attempting to forco 8
YQ02
bit service level 2 interrupt
(via OUT X'47') froa the line
(BCB) address in Reg. X'11'.
unmasking le,el 2 interrupts and
waiting the time of a scanner
pass. no bit service interrupt
occurred fro. that line.

RSl05

A-330
A-OqO

error.
Penn ,outinG
1512.

~retest error.
Rerun routine
1512.

.'

"-

,

\" ,.,
"

,f;

,v

"

',,<-j'

A-JJO
A-040

error.
Rerun routine
1512.

~roto8t

'~

~

..

- '-,

'\.7
Type 1 Scanner 1FT

C'
f,

\.

:{

o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o

tnM no', CUIIHIIUCAT lOlIO CUA1'IWLI.III
TYPE 1 C088UNICATIONS SCANN2k I'T SY"PTU8 INDEX

'ROU'I:. EIIROR I'UNC'l:IOII "rESTEDI, "
CODE
,
,1~01
OX05 Insure that Pover Indicator
can be set with II Out X'q3'

D99-37052-09

S~SPEC"rED CARD
;R~9B,OEsen~PTI~N
Lo'd'l\XOlilsl
An IN 'Q3' indicated that bits Y4G2
set in error or failed to set
because of the Output X'43'.
Reg X'15' contains the bits in
error. Reg X'14' contains the
received III ~'Q3' data. Reg.
X'll' contains the line address
under teat.

PROG
IIASK
OF08

PAGE
aS307

A-200

Test error.
Problem may
be in CS, lib,
or line interf~ce.
try testing other
lines. I f '
failure appears
to be isolated
to a lib, try
replacing the
lib isolation
card. It only
one line fails
failure is in
the associated
Une interface.

OF08

BS307

A-200

Test error.
Problem aay
be in CS, lib,
or line interface.
'l:ry testing other
lines. I f
failure appears
to be isolated
to a lib, try
replacing the
lib isolation
card. If only
one line fa ils
failure is in
the associated
line 1ntetface.

FEltD

FEtll1l

COIIIIEIIIJ!S

PAGE

1501

OX06

Insure that Digit Present can
be set with a Out X' 43'

An 18 '43' indicated that bits rQG2
set in error or failed to set
because of the Output X'43'.
Beg X'15' contains the bits in
error. Reg X'14' contains the
received IN X'43' data. lIeg.
X'11' contains the line address
under test.

15Dl

OX07

Insure that force bit
service (OOT X' 47') causes
a bit 'sen ice interrupt froll
the line address under test.

After attempting to force a
Y4G2
bit service level 2 interrupt
(via OD'I X' 47") froll the line
(BCB) address in Beg. X'11',
unmasking level 2 interrupts and
waiting the tiee of a scanner
pass, no bit service interrupt
occurred froe that line.

85305

A-330
A-040

Pretest error.
Rerun routine
1512.

1501

0108

Insure that force bit
service (OU'I: X'47') causes
a bit service interrupt from
the line address under test.

lfter attempting to force a
Y4G2
bit service level 2 interrupt
(via OD~ X'47') frOB the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

RS305

A-330
A-040

Pretest error.
Berun routine
1512.

1501

OX09

Insure that DLO can
be set vith II Out X'43'

An IN '43' indicated that bits r4G2
set in error or failed to set
because of the Output X'43'.
Reg X'lS' contains the bits in
error. Reg X'14' contains the
received IN X'Q3' data. Reg.
X'll' contains the line address
under test.

or08

85307

A-200

Test error.
Probln uy
be in CS, lib,
or line interface.
try testing other
lines. If
failure appears
to be isolated
to a lib, try
replacing the
lib isolation
card. If only
one line fails
failure is in
the associa ted
line intel:face.

lsDl

OXOA

Insure that Digit IIBB 8 can
be set vith a Out X' Q3'

An IN '43' indicated that bits
set in error or failed to set
because of the output X'43'.
Rag X'15' contains the bits in

OF08

85307

A-200

~est error.
Problell lIay
be ill CS, lib,
or line interface.

o
'l:ype 1 Scanner 1FT

!4G2

X3705FAA 5.0.125

IBft 31Q5 COftftUHICATIOHS CONTROLLER
TlPE 1 COMMUNICATIONS SCANNER 1FT SYKPTOM INDEX
ROUT. ERROR FUNCTION TESTED
CODB

1501

OXOC

ERROR DBSCRIPTION
error. Reg X'14' contains the
received IN X'43' data. Reg.
X'11' contains the line address
under test.

D99-3705E-0'l

SUSfECTED CARD
LOCATION(s)

PROG
"1SK

PEALD
PAGB

PETNK
PAGB

A-330
1-040

COMMENTS
Try testing other
lines. If
failure appears
to be isolated
to a lib, try
replacing the
lib isola tion
card. If only
one line fails
failure is in
tbe associated
Une interface.

Insure that force bit
service (ODT X'41') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4G2
bit service level 2 interrupt
(via OUi X'47') from tbe line
(BCB) address in Beg. X'll',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

8S305

8S305

A-330
A-040

Pretest error.
Rerun routine
1512.

Pretest error.
Berun rQutine
1512.

1501

OXOE

Insure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4G2
bit service level 2 interrupt
(via OUt X'47') from the line
(BCB) address in Beg. X'11',
unmasking level 2 interrapts aod
vaiting the time of a scanner
pass, no bit service interrupt
occarred from that line.

1501

OX10

Insure that PHD can
be set with a Out X'43'

An IN 'Q3' indicated that bits Y4G2
set in error or failed to set
because of the output X'43'.
Reg X'15' contains the bits in
error. Beg X'lq' contains the
received IN X'43' data. Reg.
X'11' contains the line address
under test.

OF08

B5307

A-200

Test error.
Problem uy
be in C5, lib,
or line interface.
Try testing other
lines. If
failure appears
to be isolated
to II lib, try
replacing the
lib isolation
card. If only
one line fails
failure is in
the associated
line interface.

1501

OX12

Insure that Digit HBR 4 can
be set with a Out 1'43'

An IN 'Q3' indicated that bits YQG2
set in error or failed to set
because of the Output X'Q3'.
Beg X'15' contains the bits in
error. Reg X'1Q' contains the
received IN X'Q3' data. Beg.
X'11' contains the line address
under test.

OP08

58212

1-200

Test error.
Problem lIay
be in CS, lib,
or line interface.
Try testing other
lines. If
failure appears
to be isolated
to a lib, try
replaCing thll
lib isolation
card. If only
one line fails
failure is in
the associated
line interface.

(

.\....
1501

OX14

Insure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

5.0.126 X3105F11

After attempting to force a
YQG2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCB) address in Reg. X' 11',
unmasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

85305

A-330
A-OQO

Pretest error.
Berun routine
1512.

Type 1 Scanner 1FT

\

le
IBII 3705 COIIIIUNICATIONS COHTROLLBR
TYPS 1 COIIIIUBICATIOIS SCANNBR 1FT SYIIPTOft INDBX
ROOT. BRROR PURCTION TESTED
CODB
,SOl OX,6 Insure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

o
o

EBBoa DESCBIPTION
After attempting to force a
bit service level 2 interrUpt
(via OUi 1'47') frol the line
(BCB) address in Reg. I'll',
unlasking level 2 interrupts and
waiting the ti.e of a scanner
pass, no bit service interrupt
occurred fro. that line.

D99-3705E-09

SUSPECTED C1BD
LOCA'1'IOII (s)
!4G2

PROG
IIIISJ(

FEUD

PET II II

nGE

PAGE

RS305

A-330
11-040

Pretest error.
Rerun routine
1512.

15Dl

0118

Insure that Abandon Call can
be set with a Out X'43'

ln IN '43' indicated that bits Y4G2
set in error or failed to set
because of the Output X'43'.
Reg X',5' contains the bits in
error. Reg X"4' contains the
received IN 1'431 data. Beg.
X'11' contains the line address
under test.

OF08

RS307

11-200

Test error.
Problem uy
be in CS, lib,
or line interface.
Try testing other
lines. If
failure appeus
to be isolated
to a lib, try
replacing the
lib isolation
cud. If only
one line faUs
failure is in
the associated
line interface.

lSD'

OXIA

Insure that Digt HBR 2 can
be set with a Out 1'43'

An IN '43' indicated that bits Y4G2
set in error or failed to set
because of the output 1'43'.
Beg 1"5' contains the bits in
error. Reg X"4' contains the
received 18 1'43' data. Beg.
X'l" contains the line address
under test.

OP08

BS307

11-200

Test error.
Problem may
be in CS, lib,
or line interface.
Try tes,ting other
lines. If
failure appears
to be isolated
to a lib, try
replacing tbe
lib isolat10n
card. If only
one line fails
'failure is in
the associated
line interface.

15DI

011C

Insure that force bit
service (ODT X'41') causes
a bit service irterrupt fro.
the line address under test.

After attempting to force a
!4G2
bit service level 2 interrupt
(via OUT 1'47') from the line
(BCB) address in Beg. I'll',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred fro. that line.

RS305

A-330
11-040

Pretest err.or.
Rerun rOQt~ne
1512.

15D1

OXIE

Insure that forse bit'
service (OUT X'47') causes
a bit service interrupt fro.
the line address under test.

lfter attempting to forse a
rqG2
bit service level 2 interrupt
(via OUi 1'47') from the line
(BCB) address in Reg. I'll',
unsasting level 2 interrupts and
waiting the tile of a scanner
pass, no bit service interrupt
occurred from that line.

RS305

11-330
11-040

petest error
Rerun routine
1512.

1501

OX20

Insure that COS can
be set with a Out X'43'

An IN '43' indicated that bits t4G2
set in error or failed to set
because of the Output 1'43'.
Reg 1'15' contains the bits in
error. Reg X'14' contains the
received IN 1'43' data. Beg.
1'11' contains tbe line address
under test.

RS307

A-200

Test error.
Problem .ay
be in CS, lib,
or line interface.
Try testing other
lines. If
failure appears
to be isolated
to a lib, try
replacing the
lib isolation
cud. If only
one line fails
failure is in

o

o
o

o
o
o
o
o

e

ie

i.

COIIIIEIiTS

Type , Scanner IPT

OP08

X3705PIIII 5.0.127

~

IB! 3705 COftftUNICATIONS CONTROLLER
TYPE 1 CO""UNICATIONS SCANNER 1FT SYftPTOft INDEX
ReCT. ERBOR FUNCTION TESTED
CODE

ERROR DESCRIPTION

099-3705E-09

SOSPECTED CARD
LOCATION(s)

PBOG
ftASK

FEALD
PAGE

PET!ft
PAGE

COftftENTS
the associated
line interface.

1501

OX22

Insure that Digit NBB 1 can
be set with a Out 1'43'

An IN 'q3' indicated that bits yqG2
set in error or failed to set
because of the Output X'Q3'.
Reg X'15' contains the bits in
error. Reg X'1Q' contains the
received IN X'Q3' data. Reg.
X'11' contains the line address
under test.

1501

0124

Insure that force bit
service (OUT 1'~7') causes
a bit service interrupt from
the line address under test.

1501

0126

1501

RS307

1-200

After attempting to force a
Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

RS305

A-330 Pretest error.
A-OQO' Rerun routine
1512.

Insure that force bit
service (OOT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4G2
bit service level 2 interrupt
(via OUT X'47') froa the line
(BCIll address in Reg. X' 11' ,
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred froa that line.

RS305

A-330
A-040

Pretest error.
Berun routine
1512.

OX28

Insure that Data Line
Occpied can be set with a

Au IN '43' indicated that bits
set in error or failed to set
bexause of the Output 1'43'.
Reg 1'15' contains the bits in
error. Reg X'14' contains the
received IN X'43' data. Beg.
X'11' contains the line address
under test.

BS307

A-200

Test error.
Problem aay
be in CS, lib
or line interface.
Try testing other
lines. If
failure appears
to be isolated
to a lib, try
replacing the
:",',
lib isolation
'
card. If only
one line fails
failure is in
the associated
line interface.

1502

XXXX

Data Set Ready - Inactive (ftanual Intervention Boutine): Ensure that when Data set Ready is inactive
on the communications line interface, it is indicated as being inactive in an IN X'~3'. (The operator
selects the particular line address to be tested.) After forcing a bit service interrupt from the
tested address, Data Terminal Ready is set and a test is then aade to ensure that an IN X'Q3' indicates
that Data Set Ready is inactive.

15D2

OX01

Ensure that force bit
service (OUT X'Q7') causes
a bit service interrupt from
the line address under test.

After att~pting to force a
YQF2, Y4G2
bit servi~e level 2 interrupt
(via OUT 1'47') from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

15D2

0102

Ensure that the data
terminal ready (DTR) bit

Either the DTR bit failed to
set or other bits in IN x'Q2'

Y~G2

YQG2
Y~E2

OPOB

OPOB

03PP

!est error.
Problem may
be in CS, lib,
or line interface.
Try testing other
lines. I f
failure appears
to be isolated
to a lib, try
replacing the
lib isolation
card. I f only
one line fails
failure is in
the associated
line interface.

RS305

1-330
1-0QO

Pretest error.
Rerun routine
1512.

RS306
RS106

1-160
1-270

Pretest error.
Rerun routine

"
.~

5.0.112B X3705FAA

-

Type 1 Scanner 1FT

(
\0

!{
:~

/

~

o

o
o
o

o
o
o
o
o
o

IBft 3105 COMMUNICATIONS CONTROLLER
TYPE 1 COaftUNICATIONS SCANNBR 1FT SYHPTOM INDiX
ROUT. ERROR FUNCTION TESTED
CODE
in IN X'q2' can be set
by issuing OOT X'Q2' with
byte " bit 2 on.

1>99-3105E-09

ERROR DESCRIPTION
were set in error. Reg .• X'11'
contains the line (BCB) address
under test. 8eg. X'15' contains
the bits in error·. (Byte 1,
bit 2 on indicates a DTR bit
failure.) Reg. X'14' contains
the actual data received by

SUSPECTED CARD
LOCATION(s)

PROG
MASK

FEALD
PAGE

FETM"
PAGE

connENTS

XlI X'Q2'.

1502

OX03

'~02

OXO~
.

Ensure that force bit
service (OOT X'Q7') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUT 1'47') from the line
(BCB) address in lleg. 1 '11' ,
unmasking level 2 interrupts and
waiting the ti.e of a scanner
pass, no bit service intetrapt
occurred from that line.

R5305

A-330
A-OijO

Ptetest error.
llerun routine
1512.

Dn_url thnt torol bit

ACtor attompt1ng to tOlOO Q
bit lorvicQ 1evo1 2 lnturrupt

DUJ05

A-330
A-OqO

PCltout .tror.

RS307

A-200

Test error.
Problem may be in
the CS, LIB, or
line interface.
Try testing other
lines. If failure
appears to be
isolated to a LIB,
try replacing the
LIB isolation
card. If only
one line fails,
failure is in
the aasociated
line intez:hce.

service (OUT 1'47'1 OaUSOR
1\ bit service interrupt trolll
the line addrese under test.

¥~r2,

YQ02

(via OUT x' Q7') froll the line
(BC~ addross in ~eg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no b1t eervice interrupt
oocurrea trom ihat 11nft.

OX05

Ensure that when data set
ready is inactive on the
communications line interface, it is so indicated
in an III X'43'.

15Dij

XXXX

Carrier Detect - Active (Manual Intervention Routine): Ensure that when carrier detect is'a~tive on
the communications line interface, i t is indicated as being active in an IN X'II3'. (The operator
selects the particular line address to be tested.) After forcing a bit service interrupt from the
tested address, Data Ter.inal aeady is set and a test is then lade to ensure tbat an IN X'43'
indicates tbat carrier detect is active.

15Dij

OXOl

Ensure that force bit
service (OOT X'Q7'1 causes
a bit service interrupt from
the line addres~ under test.

After attempting to force a
YijF2, YQG2
bit service level 2 interrupt
(via OOT X'47') from the line
(BCB) address in lleg. X" l' ,
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

15D~

OX02

Ensure that the data
terminal ready (DTR) bit
in IN X' Q2' can be set
by issuing OUT X'42' with
byte 1, bit 2 on.

EithEr the DTR bit failed to
YijG2
set or other bits in IN X'42'
Y4E2
were set in error. Reg. X'11'
contains the line (BCS) address
under test. Beg. 1'15' contains
the bits in error. (Byte 1,
bit 2 on indicates a D~R bit
failure .. ) Reg .• X'H' contains
the actual data received by
INX'ij2'.

1504

OX03

Ensure that force bit
service (OUT X'Q7') Causes
a bit service interrupt from
the line address under test.

After attempting to force a
bit service level 2 interrupt
(via OUT X'1I7') from the line
(BCB) address in Beg. X'11',

fl·':·,

An IN 1'43' failed to indicate YQG2
that Data Set Ready was inactive.
(Byte 1, bit 2 was off and shOUld
have been on.) lleg. X'1Q'
contains the received IN X'I13'
data. Reg. X'11' contains the
line address 'under test.

0020

I:
I, ~

o

o

norun routlnu
1512.

1502

',',

o

1532.

"'If

Type 1 Scanner IFT

YIIF2, Y4G2

03FF

a5305

A-330
A-OliO

Pretest error.
Rerun routine
1512.

85306
R5106

A-160
1-270

PretEst error.
Rerun routine
1532.

R5305

A-330
A-OQO

Pretest error.
Rerun routine
1512.

X3705FAA 5.0.129

;1-- )

,_i
IBft 3105 CO"nUHICATIONS CONTROLLER
1 COnRUHICATIOHS SCANNER 1FT SynPTOn INDEX

099-31058-09

TY~!

ROUT. IRROR FUNCTION TESTED
COOE

1504

1504

0104

0105

Ensure that force bit
service (OOT X'41', causes
a bit service interrupt fro.
the line address under test.

Ensure that vhen cal!rier
detect is active on the
co •• unications line interface, it is so indicated
in an In I' III ' •

EBROR DESCRIPTION
unmasking level 2 interrupts and
waiting tbe time of a scanner
paas, no bit .ervtce lnterrupt
occurred from that line.

SUSPECTED C1RD
LOCATION Is'

PROG
nASK

After attempting to force a
Y4P2, 14G2
bit service level 2 interrupt
(via OOT X'41', frol tbe line
(BCB) address in Beg. X'11',
unmasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred from that line.
1n IN 1'43' failed to indicate Y4G2
that carrier detect vas active.
(Byte 1, bit 2 was off and should
have been on.) Beg. X'14'
contains the received IN 1'43'
data. Beg. X'11' contains the
line address under test.

PEALD
PAGE

PETn"
PAGB

CO"nBNTS

BS305

A-330
1-040

Pret est error.
Berun routi ne
1512.

"

0020

B5307

A-200

T,est error.
Problem .ay be in
the CS, tIB, or
line interface.
Try testing other
lines. If failure
appears to be
isolated to a LIB,
try replacing tbe
LIB isolation
card. If Only
on. Une faU.,
hUIIt. 11 in
tile I18soc1ll ted
lloe loterface.

1506

XXXI

Carrier oetect - Inactive (ftanual Intervention Boutine): Ensure that when carrier detect is inactive
on tbe communications line interface, it is indicated as being inactive in an IN X'~3'. (The operator
selects tbe particular line address to be tested., After forCing a bit service interrupt from the
tested address, Data Terminal Beady is set and a test is tben made to ensure that an II 1'43'
indicates that carrier detect is inactive.

1506

OXOI

Ensure that force bit
service (OOT 1'41') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4P2, ¥4G2
bit service level 2 interrupt
(via OUi X'47', from the line
(BCB) address in Beg. I'll',
unmasking level 2 interrapts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

1506

OX02

Ensure that the data
terminal ready (DTR) bit
in IN X'42' can be set
by issuinq OUT X'42' with
byte 1, bit 2 on.

Either the DTa bit failed to
,!4G2
set or other bits in IN X'42'
!4£2
were set in error. Reg. 1",'
contains tbe line (BCB) address
under test. Beg. X'15' contains
the, bits in error,. (Byte 1,
bit 2 on indicates a DTB bit
failure.) Reg. 1'14' contains
the actual data received by
IN X'Q2'.

1506

OX 03

Ensure t ha t force bi t
service (OOT 1'47') causes
a bit service interrupt from
the line address under test.

1506

0104

Ensure that force bit
service (OOT X'41', causes
a bit service interrupt from
the line address under test.

5.0.130 X3105PAA

B5305

A-330
A-040

Pretest error.
Berun routine
15 12 •

B5306
BS106

A-160
A-270

Pretest error.
Berun routine
1532.

After attempting to force a
14P2, t4G2
bit service level 2 interrupt
(via OOT 1'41') fIom the line
(BCB) address in Reg. X'11',
unmasking le,el 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred fro. that line.

B5305

A-330
A-040

Pretest error.
Berun routine
1512.

After attempting to force a
14F2, 14G2
bit ser,ice level 2 interrupt
(via OUT X'41" from the line
(BCB) address in Beg. X'11' ,
unmasking level 2 interrupts and
vaiting the time of a scanner

R5305

1-330
1-040

Pretest error.
Berun routine
15,2.

03ff

Type 1 Scanner 1FT

,

"

;y

/

(~
___ ;t

~BII 3105 COIIIIUNICUIONS CONTRO'1LER
TYPE 1 COKKONlcATIONS SCANNER 1Ft SYIIPTOII INDEX

ROUT. ERROR FUNCTION TESTED
CODE

D99-3705E-09

ERROR DESCRIPTION
pass, no bit service interrupt
occurred from that line.

SUSPECTED CARD
LOCATION (s)

PROG
IIASK

FEALD' FETIII!
PAGE
PAGE

COI!IIENTS

Y4G2

0010

R5307

~est error.
Problem may be
in the CS, LIB,
or line interface.
~ry testing other
lines. If failure
appears to be
isolated to a LIB,
try replacing
the LIB isolation
card. If only
one line fails,
failure is in
the associated
line interface.

1506

OX05

Ensure that when carrier
detect is inactive on the
communications line
interface, it is so
indicated in an IN X'43'.

15DS

XXXX

Beceive Data - Space (llanual Intervention Routine): Ensure
the communications line interface, received data lead is on
the particular line address to be tested.) After forcing a
address, Data Terminal Ready is set and a test is then made
that received data lead is on.

1508

OXOl

Ensure that force bit
service (OOT X'47') causes
a bit service interrupt from
the line address under test.

After attemptillg to force a
14F2, Y4G2
bit service level 2 interrupt
(via DOT X'47') from the line
(BC~ address in Reg. X'tl',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

Ensllre that the data
terminal ready (OTR) bit
in IN X'42' can be set
by issuing OUT X'42' with
byte 1, bit 2 on.

Either the DTR bit failed to
Y4G2
set or other bits in IN X'42'
t4E2
vere set in error. Reg. X'11'
contains the line (BCB) address
under test. Reg. X'15' contains
the bits in error. (Byte 1,
bit 2 on indicates a OTR bit
failure.) Reg. 1'14' contains
the actual data received by
IN X'42'.

1508

0102

An IN X'43' failed to indicate
that carrier detect was
inactive.
(Byte 1, bit 2 was
on and should have been off.)
Reg. X'14' contains the
received IN X'43' data. Reg"
X'11' contains the line
address under test.

A-200

that when receive data is a space on
in all IN X'Q3'. (The operator selects
bit service interrupt from the tested
to ensure that an IN X'43' indicates

RS305

A-330
1-040

pretest error.
Rerun routine

15 '2.

03FF

R5106

A-160
1·270

Pretest error.
Rerun routine
1532.

R5306

15D6

OX03

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt froa
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OU~ 1'41') from the line
(BCB) address in Reg. X'1",
unmasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

R5305

1-330
1-040

Pretest error.
Rerun routine
1512.

1508

OX04

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
14F2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCR) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

RS305

A-330
A-040

Pretest error.
Rerun routine
1512.

15D8

OX05

Ensure that when receive
data is a space on the
communications 1ille
illterface, received data
lead is on in an IN
X'43'.

An IN X'43' failed to show
received data lead on. (Byte
0, bit 3 was off and should
have been on.) Reg. 1'14'
contains the received IN
X'43' data and reg. X'11'
contains the line address
under test.

85307

A-200

Test error.
problem may be
in the CS, LIB.
or line interface
Try testing other
lines. If failur
appears to be
isolated to a LIB

Type 1 Scanner 1FT

Y4G2

1000

X3105FAA 5.0.131

IBK 3705 COHMUNICATIONS CONTROLLER
1 CO""UHICATIONS SCANNER 1FT SYMPTOM INDEX

D99- 37052- 09

TY~E

ROUT. ERROR PUNCTION TESTED
CODE

ERROR DESCRIPTION

SUSPECTED CARD
LOCATION(S)

PROG
KASK

PEALO
PAGE

PET"K
PAGE

lS0A

XXXX

Receive Data - Hark ("anual Intervention Routine): Enijure that when receive data is a mark on
the communications line interface, receiVed data lead is off in an IN X'1I31.. (The operator selects
the particular line address to be tested.) After forcing a bit service interrupt from the tested
address, Data Terminal Ready is set and a test is then made to ensure that an IN X'~3' indicates
that received data lead is off.
.

lS0A

OXOl

Ensure that force bit
service (OOT 1'41') causes
Ii bit service interrupt from
the line address under test.

After attempting to force a
XIIF2, XIIG2
bit service level 2 interrupt
(via OUt X'47') from the line
(BCB) address in lIeg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

15DA

OX02

Ensure that the data
terminal ready (OTR) bit
in IN X'42' can be set
by issuing OOT X'42' with
byte " bit 2 on.

Either the OTII bit failed to
XqG2
set or other bits in IS X'4a'
YIIE2
were set in error. lIeg. X'11'
contains the line (BCB) address
under test. Beg. X'15' contains
the bits in error. (Byte 1,
bit 2 on indicates a DTH bit
failure.) Reg. l'lQ' contains
the actual data received by
IN X'Q2'.
.

lS0A

OX03

Ensure that force bit
service (OUT X'41') causes
a bit service interrupt from
the line address under test.

15DA

OX04

lS0A

150C

OX05

COnKENT5
try replacing
the LIB isolation
card. If only
one line fails,
failure is in
the associated
line interface.

R5305

A-330
1-0QO

P~test error.
Berun routine
15 12.

B5306
R5106

A-160
1-270

Pretest error.
Rerun routine
1532.

After attempting to force a
XQP2, YQG2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCB) address in lIeg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

aSJOS

1-330
1-0QO

Pretest error.
Rerun routine
1512.

Ensure that force bit
service (OUT X'1I7') causes
a bit service interrupt from
the line address under test.

After attempting to force a
XQF2, YQG2
bit service level 2 interrupt
(via OOT X'Q7') from the line
(BCB) address in Reg. 1'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from t~at line.

RS305

A-330
A-OliO

Pretest error.
Rerun routine
1512.

Ensure that when receive
data is n mark on the
communications line
interface, received data
lead is off in an IN
1'43'.

An IH 1'43' failed to show
received data lead off. (Byte
0, bit 3 was on and sbould
have been off.) Reg. X'1Q'
contains the received IN
X'43' data and reg. X'll'
contains the line address
under test.

YQG2

03FF

' .. ./

1000

R5301

1-200

Test error.
Problem may be
in the C5, LIB,
or line interface.
Try testing other
lines. If failuu
appears to be
isolated to a LIB,
try replacing
the LIB isolation
card. If only
one line fails,
failure is in
the associated
line interface.

"'.

,-

XXX X Bing Indicator - Active (Kanual Intervention lIolitine): Ensure tbat when rinq indicator is active
on the cOlllllunications line interface, it is indicated as being active in an IN X'Q3'. (The operator

5.0.132 X3705FAA

Type 1 Scanner 1FT

.{

./

/

.

o
o
o
o
o
o
o
o
o

IBM 3705 COKauNtqATIOij~ qONTROLL~R
TYf2 1 conKuHICATIONS SCARNED 1FT SYMPTOM INDEX
ROUT. ERROR PUNCTION TESTED
ERROR DESCRIPTION
SUSPECTED CABD PROG PEALD PETMM COMMENTS
CODE
LOCATION(S) MASK PAGE
fAGE
selects the particular line address to Ile tested.) Aftex: forcing a bit service interrupt from the
tested address, Data Tex:minal Ready is set and a test is then .ade to ensure that an IN X'43' indicates
that ring indicator is active.

150C

OXOI

Ensure that force bit
service (OUT 1'41') cause~
a bit se.rv ice interrupt f~'om
the line address under test.

After attempting to force a
14F2, 14G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCB)' address in Reg. X'll',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that ,line.

1SDC

OX02

Ensure that the data
terminal ready (DTa) bit
in IN X'42' can be set
by issuing OUT X'42'
with byte 1, bit 2 on.

Either the DTR bit failed to
Y4G2
set or other bits in IN X'42'
JIIE2
were set in error. Reg. X'11'
contains the line (BCB) address
under test. Reg. X'l~' contains
the bits in error. (Byte I,
bit 2 on indicates a DTR bit
failure.) Reg. X'14' contains
the actual data received by
IN X'42'.

lSDC

OX03

Ensure that force bit
service (OUT 1'47') causes
a bit service interrupt from
the line address under test.

l5DC

OX04

15DC

85305

A-330
&-040

Pretest error.
Rerun routine
1512.

RS306
RS106

&-160
A-210

Pretest error.
Rerun routines
1532.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OOT X'41') from the line
(BCB) address in Reg. 1'11',
unmasking level 2 interrupts and
vaiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

RS305

&-330
&-040

Pretest error.
Rerun routi ne
1512.

Ensux;e that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
14F2, 14G2
bit service level 2 interrupt
(via OUT 1'41') from the line
(BCB) address in Reg_ X'11'.
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

R5305

A-330
A-040

Pretest error.
Berun routine
1512.

OXOS

Ensure that when ring
indicator is active on the
communications line
interface, it is so
indicated in an IN X'43'.

An IN %'43' failed to indicate Y4G2
that ring indicator was active.
(Byte 1, bit 1 was off and
should have been on,.) Reg.
X'14' contains the received
IN X'43' data. Reg- X'11'
contains the line address
under test.

RS301

&-200

Test error.
Problem lIay be
in the CS, LIB,
or line interface.
Try testing other
lines. If failure
appears to be
isolated to a
LIB, try
replacing tbe
LIB isolation
card. If only
one line fails.
failure is in
the associated
line interface.

15DE

XXIX

Ring Indicator - Inactive (Hanual Intervention Routine): Ensure that when ring indicator is inactive
on the communications line intex:face, it is indicated as being inactive in an IN X'1I3'. (The operator
selects the particular line address to be tested.) After forcing a bit service interrupt from the
tested address, Data Terminal Ready is set and a test 1s then made to ensure that an IN X'43' indicates
that ring indicator is inactive.

15DE

QK01

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

03FF

I

o
o
o
o
o
o

o
o
o

Type 1 Scanner 1FT

After attempting to force a
t4F2, Y4G2
bit service level 2 interrupt
(via OUT X'41') from the line
(BCBI address in Reg. X'11',
unmasking level 2 interrupts and

0040

BS305

A-330
1-040

Pretest error.
Rerun routine
1512.

X3105PAA 5.0.133

1

IB~
Tr~E

3705 COMMUNICATIONS CONTROLLER
1 COMMUNIC1TIONS SCANNeR 1FT SYMPTOM INOEX

ROUT., ERROR FUNCTION TESTEO
COOE

ERROR DESCRIPTION
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

099- 37 05E- 09

SUSPECTED CARO
LOCATION(s)

PROG
~ASK

FEALD
PAGE

FETMft
PAGE

COftKENTS

RS306
R5106

A-160
1-270

PretEst error.
Rerun routine
1532.

150E

OX02

Ensure that the data
terminal ready (OTH) bit
in IN X'42' can ~e set
by issuing OUT X'42' with
byte 1, bit 2 on.

150E

OX03

Ensure that force bit
service (OOT X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OOT X'47') from the line
(BCB) address in fleg. X'11',
unmasking level 2 interrupts and
, waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

BS305

1-330
1-040

Pretest error.
Rerun routine
1512.

150E

OX04

Ensure that force bit
service (OUT X'~7') causes
a bit service in~errupt from
the line address under test.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUt X'41') from the line
(BCB) address in Beg. X'll',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

85305

A-330
A-040

pretest error.
Rerun routine
1512.

An IN X'43' failed to indicate
that ring indicator was
inactive. (Byte 1, bit 1 was
on and should have been off.)
Beg. X'14' contains the
received IN 1'43' data. Reg.
X'11' contains the line
address under test.

Either the OTa bit failed to
Y4G2
set or other bits in IN X'42'
14E2
were set in error. Reg. X'11'
contains the line (BCB) address
under test. Beg. X'15' contains
the bits in error. (Byte 1,
bit 2 on indicates a OTR bit
failure.) Reg,. X'14' contains
the actual data received by
IN X'42'.

Y4G2

03FF

150E

OX05

Ensure that when ring
indicator is inactive on
the cOlmunications line
interface, it is so
indicated in an IN X'43'.

15EO

XXXX

Clear to S~nd (Manual Intervention Soutine): Ensure that Clear to Send in IN X'43' correctly
indicates the state of clear to Send on the communications line interface. (The operator
selects the line address to be tested.) After forcing a bit service interrupt from the tested
line address, Data Terminal Ready, transmit mode, send data, and Bequest to Send are set.
A test is then made to ensure that Clear to Send became active within 30 seconds. Request to send
is then dropped, and a test =ade to ensure that Clear to Send drops within 5 seconds.
send drops within 5 seconds.

15EO

OXOI

Ensure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

15EO

OX02' Ensure that the data
terminal ready (DTR) bit
in IN X'42' can be set
by issuing OUT X'42' with
byte 1, bit 2 on.

5.0.134 X3105FAA

0040

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCB) address in Reg. X'll',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrUpt
occurred from that line.
Either the OTR bit failed to
Y4G2
set or other bits in IN X'42'
14E2
were set in error. Reg. X'll'
contains the line (5CS) address
under test. Reg. X'15' contains

03FF

B5307

A-200

/

Test error.
Problem may be
in the CS, LIB,
or line interface.
Try testing other
lines. It failure
appears to be
isolated to a
LIB, try
replacing the
LIB isolation
card. I f only
one line fails,
failure is in
the associated
line interface.

85305

1-330
A-OliO

Pretest error.
Rerun routine
1512.

RS306
85106

A-160
A-270

Pretest error.
Rerun routine
1532.

Type 1 Scanner 1FT
1~

''!c,

,t .~

o
o
o
o

left 3705 COKftDNICATIOWS CONTROLLER

TYPE 1

CO~~UNICATIOHS

099-3705£-09

SCANNER 1FT SYKPT06 INDEX

ROUT. ERBOB PUNCTION TBSTBD
CODB

BBROR DESCRIPTION
the bits in error_ (Byte 1,
bit 2 on indicates a DTR bit
failure.) Beg. X'14' contains
the actual data received by
lH 1'42'.

SUSPECTED CARD
LOCATION(s)

o

15£0

OX03

o
o

Bnsure that force bit
service (OUT X'47') causes
a bit service interrupt from
the Une address under test.

After attempting to force a
Y4P2, Y4G2
bit service level 2 intsrrupt
(via OUT 1'47'1 from the line
(BCB) address in Beg. X'11',
unmasking level 2 interrupts and
vaiting tbe time of a scanner
pass, no bit service interrupt
occurred from that line.

15BO

OXOij

Ensure that transmit mode,
send data (mark), and
Bequest to Send have been
set in the line interface
under test.

After issuing an OOT 1'43' with Y4Gl
data of I'OOOB', an 1ft X'43'
indicated that the expected
bits were not set. Reg. X'1_'
cQntains the recei.ed 1M
X'43' data and reg. 1'15'
indicates the bits that vere
not set:
Byte 0:
Bit 4-transmit .ode
Bit 6-Request to Send
Bit 7-send data

o
o
o

,0'

OBOO

FBALD
PAGB

FETa!
PAGE

CO!HENTS

85305

1-330
A-040

Pretest error.
Rerun routine
1512.

B5308

A-200

Test error.
Rerun appropriate
routine as shown
below. Beg.
X'11' contains
the line address
under test, i f
needed.
Rerun routine 151A
Rerun routine 1526
Rerun routine 1522

15BO

0105

Bnsure that force bit
service (OOT 1'47') causes
a bit service interrupt from
the line address under test.

After attempting to fo~ce a
Y4F2, Y4G2
bit se~vice level 2 interrupt
(via OUT X'41') from the line
(Be B) address in Beg. X'11',
unmasking level 2 interrupts and
waiting the ti.e of a scanner
pass, no bit service interrupt
occurred from that line.

R5305

A-330
A-040

Pretest error.
Rerun routine
1512.

15BO

0106

Bnsure that force bit
service (OOT l'ij7') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, 14G2
bit se~Yice level 2 interrupt
(via OUT X'47'I f~om the line
(BCB) address in Beg. J'11',
unmasking le.el 2 interrupts and
waiting the time of a scanner
pass, no bit se~vice interrupt
occurred from that line.

B5305

A-330
A-a40

Pretest error.
Rerun routine
15'2.

15BO

0107

Ensure that vhen clear to
send is active on tbe
co.munications line
interface, it is so
indicated in an IN 1'43'.

An 1M 1'43' failed to indicate
that Clear to Send vae active.
(Byte 1, bit 0 vas on and
should have been off.) Reg.
X'14' contains the recei.ed
IB 1'43' data. Reg. 1'11'
contains tbe line address
under test.

R5J07

A-200

Test error.
Problem l8y bot
in the CS, LIB,
or line interface.
Try testing other
lines. If failure
appe.rs to be
isolated to a
LIB, try.
replacing the
LIB isolation
card. If only
one line fails,
failure is in
the associated
line interface.

15BO

0108

Bnsure that force bit
service (OUT 1'47') causes
a bit service interrupt from
the line address under test.

Afte~ attempting to force a
14P2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BCBI address in Beg_ X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

RS305

1-330
1-0110

Pretest error.
Berun routine
1512.

15BO

OX09

Bnsure that force bit

After attempting to force a

R5305

A-330

Pretest error.

:1

o
o
o

PROG
BASK

Y4G2

0080

e

Type 1 Scanner IPT

1370.5FAA 5.0.135

f)
18K 3705 COKKUNICATIONS CONTROLLER
TYPE 1 COMKUNICATI0NS SCANNB8 1FT SYHPTOH 10D$X

D99-3105E-09

ROUT,. ERROR FUNCTION 'rESTED
CODE
service (OUT 1'41') causes
II bit service interrupt from
the line address under test.

ERROR DESCRIPTION

15EO

OX10

Ensure that when clear to
send is inactive on the
communications line
interface, it is so
indicated in an IN X'43'.

An IN X'43' failed to indicate Y4G2
that Clear to send vas inactive.
(Byte 1, bit 0 was off and
shou Id have been on.) Reg.
X'14' contains the received
IN X'43' data. Reg. X'11!
contains the line address
under test,.

15E4

XIXX

New Sync Active (Hanual Intervention Routine): This routine sets the new sync bit and leaves it
active so that it can be checked externally on the communications line interface. (The operator
selects the line address to be tested.)

15E4

OXOI

Ensure that force bit
service (OOT X'47') causes
a bit service interrupt from
the line address under test.

bit service level 2 interrupt
(via PUT X'47') from the line
(BCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred frol that line.

SUSPECTED CARD
LOCATION (s)

PROG
IIASK

FEUD

FETIIII

PAGE

PAGE

COIIIIENTS

1-040

Rerun routine
1512.

A-200

Test error.
Problem may be
in the CS, LIB,
or line interface.
Try testing other
lines. If failure
appears to be
isolated to II
LIB, try
replacing the
LIB isolation
card. If only
one line fails,
failure is in
the associated
line interface.

:. J

.1'

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(BeB) address in Reg. I'll',
unmasking ~evel 2 interrupts and
"\oa; t1ng thtl ti~e of a scanner
'
pass, no bit service interrupt
occurred from that line.

15E4

0102

Ensure that the data
terminal ready (OTR) bit
in IN X'42' can be set
by issuing OOT X'42' with
byte 1, bit 2 on.

Either the OTa bit failed to
Y4G2
set or other bits io IN X'42'
1482
were set in error. Reg. x'11'
contains the line (BCB) address
under test. Reg. X'15' contains
the bits in error. (Byte 1,
bit 2 on indicates a DTR bit
failure.) Reg. 1'14' contains
the actual data received by
IN 1'42'.

15E4

OX03

Ensure that force bit
service (OUT X'41') causes
a bit service interrupt from
the line address under test.

15Eq

OX04

Ensure that the new
sync/NBR-4 bit in IN X'43'
can be set by issuing an
OOT X'43' with byte I,
bit 5 on.

5.0.136 X3705FAA

0080

RS301

aS305

A-330
A-OqO

Pretest error.
Rerun routine
1512.

',-

031'1'

RS306
liS 106

A-160
A-270

Pretest error.
Rerun routine
1532.

After attempting to force a
Y4F2, Y4G2
bit service level 2 interrupt
(via OUT X'47') from the line
(eCB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

RS305

A-330
A-04Q

Pretest error.
aerun routine
1512.

Either the new sync/NBR-4
bit failed to act correctly
or other bits turned on in
error in the IN X'43'. 8eg.
X'11' contains the line (BeB)
address under test. Reg.
X'1S' contains the bits in
error. (Byte 0, bit 5
indicates a Dew 61oc/N88-4
bit error.) Reg X'14'
contains the actual data

RS308
RS106

A·200
A-290

Test error.
The problem is
probabl y in the
associated line
interface~
(See
General Comment,
13.) I f otller
bits are in
error also, some
kind of interaction occurred.

Type 1 Scanner 1FT

~/

o
o
o
o
o
o
o
o
o
o

- .. -...

,
1Bft 3705 call SUNICATIONS CONUOI,LBB
~lPB 1 COftftUHIC1TIOHS SClNNEB Ir~ 5¥~PToa INDEX
ROUT. ERROR pOHCTIOH TISTED
COD! .

D99-3705B-09

SOSPBCTED ClRD
LOCATIO. lSI

PROG
ftASK

PEALD
PAGE

FETIIII
PAGE

XXXX

Telegraph Ecbo Check (llanual Intervention ROutine): After the operator has selected the address
to test and has indicated whether or not the telegraph cOMMunications line is connected to the
interface or not, a test is made for tbe proper condLtion of %elegrapb ecbo check when a Mark is
transd tted.

15E6

OXOl

Bnsure that force bit
service (OUT X'47') causes
a bit service interrupt from
the line address under test.

After atteMpting to force a
14P2, X4G2
bit service level 2 interrupt
(via OUT X'47') frOM the line
(BCBI address in Beg. 1'11',
unaasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred froe tbat line.

15E6

OX02

ansure that an OOT X'42'
has set sode 11 and has
properly selected an
oscillator.

After stopping the scanner and
issuing an OOT X'42', an IN
X'42' indicated that eode 11
was not set or the proper
oscillator select bits vere
not set (or other bits vere
set in error). Beg. 1'14'
contains the actual data
receiYed by the IN X'42'
Beg. X'15' contains the bits
in error:
Byte 0:
Bit 6-lode bit
failed
to set~
Bit 7-Mode bit 2 failed
to set .•
Byte 1:
Bit O-lov priority set
in error.
Bit 1-diagnostic vrap
lode set in error.
Bit 2-Data Terminal Beady
set in error.
Bit 3-synchronous lode
set in error.
Bit II-external clock bit
set in errOE.
Bit 5-data rate select
bit set in error.
Bit 6-oscillator select
bit 1 failed to set or
vas set in error.
Bit 7-oscillator select
bit 2 failed to set or
was set in error.

1586

OX03

Ensure that the transmit
line has properly been set
to transMit aode and tbat
send data is a .ark.

Type 1 Scanner 1FT

Following an OUT X'43' with
data of I'OOOB' to set send
data, Bequest to Send, and
transmit lode, an IN X'43'
indicated either one of thea
failed to set or a feedback
check occurred. Beg. X'14'
contains the received 1M 1'43'
data and reg. X'15' contains
the bits in error:
Byte 0:
Bit 1-a feedback check
occurred.
Bit 4-transmit mode

COIIIIEHTS
If byte 0, bit 5
is on in both oeg.
X'14' and X'15',
the line address
tested was a start
stop interface and
the new sync/HBB-4
bit set and should
not have.

15E6

o

o

ERBoa DESCRIPTION
received by the IN 1'43'.

o
o
o
o
o
o
o

----

~.------"-------.

i5305

03FF

A-330
A-040

Pretest error.
Berun routine
1512.

A-150

Pretest error,
Berun routines
specified below.
Reg. X'11'
contains the
line address
under test.

Berun routine
154E.
RerOn routine
1552

Y4G2

B5304

A-170

14G2

RS304

A-170

Y4G 2

B5304

A-nO

X4G2

BS306

&-160

14G2

R5306

1-160

Y4G2

BS306

A-160

14G2

RS306

A-160

Berun routines
15U and 154C.
Berun routines
153& and 153C.
Rerun routines
1532 and 1534.
RerUn routines
152A and 152C.
Berun routines
1536 and 1538.
Rerun routines
152E and 1530.
Berun routines
1542 and 1544.

f4G2

R5306

A-16O

r4G2

BS306

&~160

r4G2

RS306

A-160

Rerun routines
1546 and 1548.

A-200

Pretest error.
Berun appropriate
routine as
given belovo
(If needed,
reg. 1'11'
contains line
address under
test.)

RS202

A-180

R5308

A-laO

Rerun routines
157A and 157c.
Berun routines

14G2

4900

X3705FAA 5.0.137

rf

t

~j!

IRK 3105 COKKUNICATIONS CONTROLLER
TYPE 1 CO""ORIClTIONS SCANNER 1FT SY~PTOK INDEX
ROUT. EaaOR FUNCTION TESTED
CODE

D99-3705E-09

ERROR DESCRIPTION

SUSPECTED CARD
LOCATION Is)

PROG
IIA511

failed to set.
Sit 5-New sync was set
in error
Bit 6-Request to send
faUed to set
Bit 7-send data failed
to set.

FEALD
PAGE

FET/III
PAGB

R5308

A-180

RS308

A-180

R5308

15E6

OXOq

Ensure that the first
oscillator has created a
strobe and caused a bit
service level 2 interrupt
from the tested line.

After having set monitor mode
11 to allow normal bit service
requests, selecting oscillator
0, starting the scanner and
waiting up to 30 milliseconds
for a bit service level 2
interrupt fro. the line under
test, none occurred.

15E6

OX05

Ensure that carrier detect
is up on the tested address
and that none of the bits
previously set have dropped.

Atter allowing an interrupt to yqG2
stop the scanner, an IN X'43'
indicated that carrier detect
was not up on the line under
test or other bits had dropped.
Reg. X'14' contains the
received IN X'43' data and reg.
X'1S' indicates which bits
were in error:
Syte 0:
Sit q-transmit mode
dropped,.
Bit 6-Bequest to Send
(lropped,.
Bit 1-send data was no
longer a mark,.
Byte 1:
Bit 3-carrier detect was
net up.

OS10

After sending a mark to an
installed telegraph line an
echo check should not have
occurred and did (or if the
line was not installed, an
echo check did not occur).
Echo check is byte 1, bit q
an IN X'43'. Reg. X'1q'
contains the expected
condition of echo check.

OOBO

Y4H2

BS401

COIIIIENTS
151A and 1S1C.
Rerun routi nes
1518 and 1520
Rerun routine
1526.
Rerun routines
1522 and 152q.•

A-250

Pretest error.
Rerun routine
1580.

A-200

Test error.
Berun appropriate
routines as given
below. IReg .•
X'11' contains
line address
under test.)

BS308

A-180

Rerun

1511.

RS308

1-180

Rerun

1526.

R5308

A-180

Berun

1522.

R5301

A-180

Rerun

1504.

R5308

A-200

'lest error.
Problem may be
in the C5. LIB,
or line interface.
Try testing other
lines. If failure
appears to be
isolated to a
LIB, try
replacing the
LIB isolation
card. If only
one line failS,
failure is in
the associated
line interface.

15E6

OX06

IlnsurA that telegraph echo
check reacts correctly to
sending a mark.

15E8

XXXX

~onitor Mode 01 (Manual Intervention Routine):
After the operator selects the line address to test,
a test is made to ensure that monitor mode 01 (monitor for ring indicator or Data Set Beady) will
allow a level 2 bit service interrupt when either Data Set Beady or ring indicator become active.

15E8

OX01

Ensure that force bit
service lOUT X'41') causes
a bit service interrupt from
the line address under test.

After attempting to force a
Y4F2, YQG2
bit service level 2 interrupt
(via OUT X'41') from the line
IBCS) address in Reg. x'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

ISE8

OX02

Ensure that the data
terminal ready (DTR) bit
in IN X'q2' can be set
by issuing OUT X'42' with
byte 1, bit 2 on.

Either the DTR bit failed to
Y4G2
set or other bits in IN X'42'
Y4E2
were set in error. Reg. X'11'
contains the line (BCB) address
under test. Beg. X'1S' contains

5.0.138 X3705FAA

Y4G2

03FF

R5305

A-330
A-040

Pretest error.
Rerun routi ne
1512.

RS306
R5106

A-160
A-270

Pretest error.
Rerun routine
1532.

Type 1 Scanner 1FT

if .;/)
~

o

o
o
o
o
o
o

o
o
o

IBft 3705 COKKUNICATIQNS CONTROLLER

ROUT. ERROR FUNCTION TESTED
CODE

PROG
IIASK

FEUD
PAGE

FET"II
PAGE

COIIIIENTS

8S305

A-330
A-040

Pretest error.
Rerun routine
1512.

BS304

A-170

Pretest error.
Berun routines
15411 through
,554. It
needed, reg.
X" l' contains
the line address
under test.

OX03

Ensure that force bit
service (OUf X'47') causes
a bit service interrupt from
the line address under test.

After attempting to force a
14F2, YIIG2
bit service level 2 interrupt
(via OUf X'41') from the line
(BCB) address in Beg. X' 11' ,
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

15Ea

OX04

Ensure that monitor 80de
01 has been set at the
1ina address under test.

After finding Data Set Beady
or ring indicator on at the
tosted address, an OUT 1'42'
was iSBued to set mode 01,.
An III 1'42' then indicated
mode 01 was not set. If
byte 0, bit 6 of reg. X'15'
is on, mode bit 1 failed to
reset. If bit 1 is on, mode
bit 2 failed to set.

15E8

OX05

Ensure that ring indicator
or Data Set Ready are still
active on the tested line
address.

Cuation: This may not
NONE
actually indicate a hardware
failUre. Before waiting for
an interrupt, Data Set Ready
or ring indicator was active.
NOW, after waiting for the
interrupt, neither is active.
Conditions on the line
connected to the line interface
under test have changed. This
invalidates error code OX06
which you should get after
this failure.

NONE

NONE

Test error.
If it is desired
to find out what
conditions on
the line ha ve
changed, display
reg. 1'15'. Byte
1, b1t 1 on
indicates ring
indicator bas
dropped. Byte 1,
bit 2 on indicates
Data Set Beady
has dropped.
Beg. X'1"
contains the
line address
under test.

15E6

OX06

Ensure that monitor mode
01 allows an interface
service request to cause
a level 2 interrupt when
Data Set Ready or ring
indicator are active.

After having found ring
indicator or Data set Ready
active, setting monitor mode
01, and waiting II bit time,
no level 2 interrupt occurred
from the tested line address.

BS305

A-040

Test error.
Problem is most
probably in the
CS. (See Genera 1
Comments, 13.)
If needed, the
tested line
address may be
found in
reg. X',,'.

15EA

XXXX

Interrupt Mode 10: After setting 'Data Terminal Ready' in an attempt to bring up 'Data Set Beady'
from the communications line on the tested line address, the condition of
Data Set Ready is determined. Monitor mode 10 is set, and a check is made for the presence
of level 2 interrupts according to the state of 'Data Set Beady'. !onitor mode 10 should allow level
2 interrupts whenever Data Set Beady is inactive' for at least one bit tille.
This test can be run on
all installed non-autocall line interfaces. The CE must select the line address to be tested.
The test is bypassed i f the line happens to be receiving a space.

15EA

OX01

Ensure that force bit
service (OUT X'47'1 causes
a bit service interrupt from
the line address under test.

\',

'I

.'

o
o

e
Type 1 Scanner 1fT

o

SUSPECTED CARD
LOCATION (Sl

1SEa

li,:~ ,.

o
e

EBBOR DESCRIPTION
the bits in error. (Byte 1,
bit 2 on indicates a DTR bit
failure.) Reg. X'14' contains
the actual data received by
III X'1I2'.

"
U
o
o

099-3105£-09

i fYPE 1 COftftOnICATIONS SCANNER 1FT SYftPTOn INDEX

Y4G2

I4G2

After attempting to force a
1412, Y4G2
bit service level 2 interrupt
(via OOT ,X' 41'1 from the line,
(8CB) address in Reg. X'11',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
occurred from that line.

0300

BS305

A-330
A-OliO

Pretest error.
Rerun routine
1512.

X3705FAA 5.0.139

laM 3705
TYPE 1

CO~"ONICATIONS CONTBOLLEft
COKKUNI~AT10NS SCANHEB 1fT SYKPTO"

aOUT. ERROB FUNCTION TESTED
CODE
15EA OX02 Ensure that force bit
service (OOT X'47') causes
a bit service interrupt from
the line address under test.

ERROR DESCRIPTION

15EA

OX03

Ensure that LIlls
that have Data Set Ready
tied up, Data Set Ready is
indeed up.

After forcing the scanner to
stop at the tested address,
an IN X'43' indicated data
set ready was off (byte 1,
bit 2 was on). (Reg. X '1"
contains failing line
address. )

15E1

OX04

Ensure that an OUT X'42'
has set monitor mode 10,
and has kept data terminal
ready on.

I

SEA

15ro

OX05

Dependent upon state of
Data Set Ready (see
routine description),
ensure that l1lonitor Ilode
10 allows or prevonts
level 2 bit service
interrupts from the
tested address.

1l99-3705E-09

INDEX

After attempting to force a
bit service level 2 interrupt
(via OU! X'47') fr~m the line
(BCB) address in Reg. X",',
unmasking level 2 interrupts and
waiting the time of a scanner
pass, no bit service interrupt
o~r.urred from t~at line.

While the scanner was stopped
for the prior bit service, an

SUSPECTED CARD
LOCA TION (s)
Y4F2. Y4G2

PROG
HASK

0020

Y4G2

FEUD

PAGE
115305

115307

03FF

FETH"

PAGE
A-330
A-040

After setting mode 10 and
waiting one bit time for an
interrupt, an interrupt did
or did not occur in error.
Reg. X'14' doscribes what
occurred. It byte 0, bit 0
is off, Data set Ready was
off and therefore an interrupt
shou1d'have occurred and did
not. If on, Data Set Ready
was on and an interrupt should
not have occurred and did.

Y4G2

Pretest error.
l1erun routine
1512.

A-200

Pretest error.
Problem is
probably in
the associated
line interface
or LIB.

A-150

Pretest error.
Berun appropriate
routines as
specified below.
If needed, reg.
X'11' contains
the lin~ address
under test.

OUT 1'42' was issued to set

the proper modes. An IN X'42'
then indicated that the proper
bits were not set or other bits
were set in error. Reg. X'14'
contains the actual data
received by the IN X'42' and
reg. X'15' indicates the bits
in error:
ayte 0:
Bit 6-m04& bit
failed
to Bot.
Bit 7-mode bit
set
in error.
Byte 1:
Bit O-low priority set
in error.
Bit I-diagnostic wrap
mode set.
Bit 2-Data Terminal l1eady
reset in error.
Bit 3-synchronous mode
set in error.
Bit 4-external clock bit
set in error.
Bit 5- data ra;e select
set in error.
Bit 6-osci1lator select
bit 1 is set.
Bit 7-osci11ator select
bit 2 set.

COIIIIENTS

ft5304

A-1?O

R5304

~-170

R5304

A-170

R5306

A-160

RS306

A-160

RS306

A-160

RS306

A-160

115306

A-160

I1S306

A-160

8S306

A-160

115305

A-040

Rerun routine

1550.

Rerun routine
1552.

Rerun routines
154A and '54C.
Rerun routines
153A and 153C.
Rerun routines
1532 and 1534.
Rerun routines
152A and 1S2C.
Rerun routines
1536 and 1538.
Rerun routines
152! and 1530.
Rerun routines
1542 and 15Q4.
Rerun routines
1546 and '548.
Test error.
Problem is
probably in the
CS. If needed,
reg. X'11' ,~ ,
contains tl;,tt
tested line
address. (See
General Comments,
13.)

xxn SOLC LINK TEST..

This is a manual intervention routine and will not be run unless you set the CE sense
switch to run IIlllllual intervention routines or unless you reguestod a single routino to be run.
This routine stops with manual intervention stop codes F010 througb F07C waiting for you to enter options
needed to run this routine. These stop code definitions are listed in the TICS-MAN section in Chapter 9.2
of this manual.
This routine may be used for SDLe data link problem determination and repair verification when
(under host systel control) are not available.

o~line

tests

When using this routine for problem determination external to the 3705, all normal internal functional tests
should run normally without internal hardware errors. Local interface problems, such as line set drivers and

5.0.140 X3705FAA

Type 1 Scanner IFT

.--"It

'it ;./

o
o

o
o

3705 COftftUNICATIONS CONTROLLER
TYPE 1 COKKUHICATIOHS SCAHNER 1FT SYftPTOft INDEX

IB~

ROOT. ERBOB PUNCTION TESTED
EBROR DESCRIPTION
SUSPECTED C~RO PROG PEALO PETKK COftftEN~S
CODE
LOCATION(s) ftASK PAGE
PAGE
terminators, should bo testod using toutine 1SC! with external local wrap options because that routine
provides lore detailed information about local failuros.
This SDLC link test is basically an ECHO test. The primary SOLC station sends a SDLC link test comsand
frame down the link and expects to receive the ease test frame back; provided the resote end of the link
received the test frame without errors. Sose SDLC terminals only respond with a non-se~uenced
aCknowledge.ent response rather then sending back the link-test frame received.

o
o

Options are provided to r,.n as a SOLC primary station or as a SOLC secondary station. The priaary station
option initiates the link-test co •• ands and expects to receive responses. The secondary SOLC station
responds to test-frames received; if the test frame was received without errors, the secondary station sends
back the same test frame as a response. If a test frame was received without block check errors and had
either sore data than could be buffered or did not have the poll bit on in the control field, the secondarI
station responds with a cosmand reject frase. All f~a.es received with block check errors or with abort
detect conditions are counted as errors and no response is provided. All frames received with a SDLC
station address other than the SOLC station address selected in the F078 manual intervention stop code are
counted as an unexpected or non-supported frame and no response is provided. Ho response is provided for
frames received with anfthing but a link-test co.sand field.

o

The structure of the link-test comsand enables this test to also run a local external duplex modea wrap if
you select the primary station option and connect the transsit and receive lines together properly. A resote
wrap can be done if the remote end of the link can tie the transmit and receive duplex lines together with
proper loading etc. Because the resote node (on balf-duplex links) must store the received frase and send
it back, this wrap option will not work on half·duplex lines.

o
o
o

"
0

This routine always stops on transmit errors such as modem check, timeout or overrun, but does not stop on
receive errors except for modea check error unless an option is selected to stop on frases in error or stop
on any fra me.
Continuation (select function 5 and press ST1RT key) from the 0120, 0160, or 0161 stops, the routine cleats
all error counts and summary statistics and restarts the test fros the transmit/receive data portions~ This
allows continueing the test on a manual switched line connection without making a new connection. The same
restart is used for the 0000 dynasic restart option Ot the 0000 restart option at stop code F07C. lny
manual switched line connection is not broken until you abort the ~outine or use a restart option that goes
through total hardware setup such as 0002 restart code.
1SPO

Tbe format of all transmissions from this LINK-TEST ate:

III

Pad

Pad

C dd

P

',I

Be

BC

F ee

where-

,'I
\

= Alternate

Pad

o
o
o

data transitions characters for clock correction and
will ~ X'AA' if RHZI mode is not being used or X'OO' if NRZI
mode is being used.

P = SDLC flag character cosposed of a zero bit followed by six one
bits followed by another zero bit (X'7E').
A

= SDLC

C

station address.

SOLe control field and will either be X'P3' if a LINK-TEST command/
response is being sent or X'97' if a co.sand reject response is
being sent.

dd • Optional transmit/receive data field wben the LINK-TEST cos.and
1s being used. When the co •• and reject response is being sent
the first byte of this field is the command field of the received
frame that is being rejected, the second byte is set to zeros (it
is defined as the send and receive sequence counts) and the third
byte is set to X'04' if more data was received than could be
buffered; or to X'Ol' if the LINK-TEST cosmand was received without
the poll bit on.

o

BC

= Block

ee

~

check (CRC) cbaracters. Two block check cbaracters are always
sent and their bit configuration vary according to the SOLC station
address, control field and optional data fields.
An ending transmission of X'FF' to make line go to an idle state
and to allow time for bits to be sent before dropping the
'request to send' lead on trans~it turnarounds.

This routine refers to a frase as that segment of transmitted or received
data defined above and enclosed between two flag characters. If the frame
above is being sent/received in RRZI lode, the actual bit configuration
on the line and the ones shown above will be different. Also SDLC zero bit
insertion/doletion will apply to all characterl exeept the flags and ending
sequence defined under ve.

Type 1 Scanner 1FT

it
,,_J"

IBM 3105 COK~UNICATIO~S CONTROLLER
TYPE 1 COMKUNICATIONS SCANNER 1fT SYM~TOM INDEX
ROUT. ERROR FUNCTION TESTED
ERROR DESCRIPTION
SUSPECTED CARD
CODE
LOCATION (5)
Test statistics and error count are available while the test is running
and at the r07c test completion code.
In addition, certain registers are used for current status indicators
~.
and may be displayed while the test is running or at the r01c stop code.
\.
Following is the definition of tile status indicators:
15fO

D99-3105E-09

PROG
IIASK

rEALD
PAGE

FETMM

COMMENTS

PAGE

X'IE' Register contains the current transmit and receive line status.
Byte 0 of reg X'IE' m last received frame type indicator and may contain
o~e of the following indications:
X'OO'

Timeout occurred on last receive completion.

X'60' .. A good link t.est fratlle was received with no errota.
A command reject response was received as the last
frame received at this primary station.

X'20'

A non-sequenced acknowledgement was received as the
last frame at this primary station.

X '10'

A block check (CRC error) was detected in the last
received frame.

X' OS'

An invalid or non-supported frame was received as the
last received frame. This link test only supports the
lin k- test response, the non-sequenced acknowledgement
response and the command reject response if running as
a primary station. The secondary station option will
only accept a link-~est command but may respond with
a link-test respons~ ot a command reject response.
This type indicator is also set if a partial frame vas
received followed by an 'abort detect' sequence of seven
or more consecutive one bits.

A valid link-test frame was received but it contained more
data than could be buffered. If this is a secondary station,
a command reject response will be sent for this frame.
The maximum length of the receive (and transmitl data buffer
is 102~ characters if this 3704 has more than 16K storage or
10 characters if 370q has only 16K of storage.
Invalid SDLC station address received or, for primary station
option with optional transmit data, the received data did not
compare with the SOLC station address or optional transmit data
that was sent. The SOLC station address provided in the
F016 stop code 1s used to make this comparison. If the socondary
station option was selected, no response vill be provided
for this frame.
X' 0 l'

A hardware detected error such as modem check or overrun has been
detected. No response .ill be made to any frames received vith
this type of error.

Byte 1 of reg X'IE': transmit line status and other information bits. MUltiple bits may be
on in this byte as opposed to byte 0 which never will have mare than one bit on.
The bits within this byte are defined as:
1'60'

=A

reply is pending to be sent to the last frame received at this
secondary station.

A command reject reply is now being sent or was the last frame
transmitted from this secondary station.

X'20'

A link-test command (from primary station) or response (from
secondary stationl was the last frame sent or is being sent
at this time.

10'

A 'transmit initial' operation is being done or was the last
transmit operation done. This 'transmit initial' is done to
set 'request to send' and wait for 'clear to send' from the
modem interface for the tirst transmit operation of all
primary station options and for secondary station options
when 'request to send' should be on at all times. See manual
intervention stop code P070 for this option.

X'

X' 06' • Tnnfjmit line 11 busy i f this bit is on.

Receive line is busy if this bit is on.

5.0.IQ2 X3705FAA

Type 1 Scanner 1FT

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IBft 3105 CO~ftUHICITIONS CONTROLL'R
TYPB 1 COKftOHICITIOHS SClHKIB IPT SynPTOa INOEI
ROUT. ERBOB PUNCTION TESTED
COOl

EBBOB DESCRIPTION

SUSPECTED CIRD PROG PEALO
LOCUIOR (s) !!ASK PAGE
X'02' = Pit not defined. aay be used as added indicator at later tile.
X' 01'

099-31051-09
PETaK

COKaENTS

PAGB

pit not defined .• aay be used as added indicator at later tille.

X'lP' Register contains the accusulated trans.it and receive line status indicators.
The bits in tbis register bave tbe same seanings as tbe bits defined in tbe
register X'lB' except once tbese bit are set on they are not reset until tbe
test is restarted. These bits serve as a sus.ary of all the transmit and receive
operations tbat bave occurred up to the tise tbis register is displayed.
15PO

X'10' Register is used to control tbe EO?? display code that is displayed in the panel
display B lights (if function 4, 5 or 6 is selected). Tbis tegister is cleared
to zeros at approximately tvo second intervals and in between tbis clearing to
zeros it is used as sn accu.ulstor of all the bits defined in tbe bits in
register l[l1ll'.

15PO

10?? Display codes. Wbile the link-test is running, various display codes are
in the display B lights if the PUNCTION SILECT switch is set to function
position 4, 5 or 6. These display codes (except 106P) are displayed approximately once
every other second with the display B lights cleared to zero betveen each l01? display.
The 8011 display codes are defined as follows:
1000 Alternating with 10PP • waiting for 'data set ready' to cose on before doing
any transmit or receive operations. These codes vill be
continously displayed until 'data set ready' comes on Via
co.pleting a lanual switChed connection or via connecting
(or jumpering) the proper modea interface leads.
On a leased line connection you vill not see tbis display
code if 'data set ready' is alvays on (as expectedl.

o

o

1060 • A good test frame was received within the last two seconds and no other error
was detected (except a possible timeout) during tbat time.
B061

Nothing was received (theollts) during the last two seconds.

o
o

1062

=1

E063

=1

o

1067

1064
E065
E066

block check error (CRC errorl was detected during the
last two seconds.
non-supported or invalid trase was received during the last two
seconds.
lIore data was received than could be buffered during the last two
seconds.

=1

command reject response was received at this primary station
during the last two seoonds.
1 Don-sequenced acknowledgesent vas received at this primary station
during the last two seconds.

= lither

of 3 conditions may exist:

1 - SOLC station address did not compare equal.
2 - Received data did not compare equal to the transmitted data.
3 - Secondary station received more data than could be buffered.
In all cases 'E061' indicates that the data received does not
compare equal to the aata transmitted.

o

E068

= A hardware

detected error such as modem check or overrun has been detected
during the last two seconds.

806P = This code is displayed if you are using the dyna.ic cosmuDications option
(function select 1 and switches B-1 set to 00171 and have entered a DO??
code that is not defined. No action is taken if tbis code is displayed.

o

151'0

0011 Dynamic communications codes. These dynamiC communications codes allow termination
or restarting the link-test at various points within the test. Inter these codes vhile
the prograa is running by setting (11 the PDNCTION SILECT switch to function
" (21 the selected code in switches 8-1, and (3) pressing the INTIRRUPT
key on the control panel. These dynamic co.sunication options are the saae as those
defined in the p01c manual intervention stop code definition. They are repeated here in
a su •• ary form. Por aore details see the P07C stop code definition.
0000

Restart link-test at transmit/receive data point(no line resetsl.

0001 = Restart routine from beginning including asking for option$.
D002 = Restart link-test including hardware resets and enables.
D003

Type 1 Scauner IPT

= Stop

routine at POle stop code and display statistics.

13105PAI 5.0.143

()
IBK 3705 COftftUHIC1tIONS CONTROLLER
1 CO"ftOHtCAtIOHS SCANNER 1FT sYnpto~ IHP£X

D99- 3705E- 09

TY~B

ROUT. BRROR PUNCTION TBSTBD
EBROR DESCRIPtION
CODB
D004
Terminate routine after hardware'resets.

=

15FO

~I!I!~!£~

SOSPECTED CARD
LOCATION(s)

PROG
B1SK

FEALD
P1GB

PETaK
PAGB

COftftBNTS

at link test termination.

X'1c' Register contains the address of a statistics table in storage. At all times
while the test is running and at the P07c and Ol?? stop codes, you may get the
storage address of the statistics table from
this register and display the storage locations for the following half-word counters.
A list of the available statistics follows:
lIex displaceaent
within statistics
pointed to by
reg X'1C'.

"

"

00 • Humber of SDLC link-test frames transmitted successfully. This count
does not include coamand reject responses sent from a secondary station.
02

.,

= Nuaber

of SDLC link-test frames received with no errors. If this 1s a
primary station then the received SDLC station address and (if used) the
optional data must compare in order to have one added to this count.
On a noraal P07C completion at a primary station this count should match
the number of test frames transmitted count if no'errors have been detected.
An exception is vhen the secondary station reaponds with non-sequenced
acknowledgements to test frames then this count should be zero and the
received non-sequenced acknowledgements connt should match the number of
test frames transmitted count.

04 = Humber of fraaes received with bleck check errers (CRC errors).
06 = Huaber of command reject responses received at this primary station.
08

= Humber of

01

= Humber

OC

non-sequenced acknowledgements received at this primary station.

of frames received that vere not included in other ~eceive counts.
This count includes frames received with invalid SDLC station addresses,
non-supported commands/responses, non-data compares with optional t~ans.it
data and fraaes terminated by an abort detection condition. Hote that sOle
of these conditions may have caused a block check error and be inCluded in
the block check error count and not this count.
If pri.ary station then this field contains number of test frames requested
to be sent in the F072 stop code. If this field is all zeros and a prilary
station option was selected then test frames vill be sent continously (allowing
for receiving etc) without ever terminating the test.

O! • Humber of hardware errors detected, such as aodem check or overcuns, on the
transmit and receive operations.
10
15FO

16PO

Number of command reject responses transmitted by this secondary station.

The error stop codes that .ay occur
stop codes beginning with 1 or 2 in
section of this sy.ptom index. The
manual intervention section of this
OX07

Auto call failed to complete

in this test follow. Note that any error
display B byte 0 bits 0-3 are defined in another
display B codes starting with F are defined in the
docuaent.

An auto call error has been detected.
Reg. 1'15' byte 0 centains an error indicator
number. Determine error indicator and see
description below.
ERBOR INDICATOR
1 -- Error in auto call connection.
Reg.I'15' byte 1 contains SDP bits in
error. SDP bits 0-4 on, 5-7 off. Also
an error, if LCD not=3, PCP not=q
(reg. X' q5' byte 0\.
2 -- Error in dialing.
See error indicator 1 description.
q,5&6 -- If last digit dialed vas net an
EOR digit. PND may come on an cause
a L2 interrupt if the distant station
does not ansver imaediately. The saae
thing will occur with EON, as last
digit, on some BOH ( non-IBK ) and
on IBH auto-call units that do not have
the EON feature strapped on. On some

5.0.14 q X370SPU

!leg.X'15' byte 1SDl' bi ts 0-7,. SDF
bit definitions
for auto-call are:
Bit 0= (IB\ intrpt
reme.ber.
Bit 1= (PilI) POllet
indicator.
Bit 2- (CRO) call
request.
Bit 3= (DLO) data
line occupied.
Bit q= (PHD) presen
next digit.
Bit 5= (DPR) digit
present.
Bit 6= (COS) call
originate status.
Bit 7= abandon call
and retry.

Type 1 Scanner 1FT

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IBft 3705 COBftUHIC1TIONS COHTBOLLIB
TYPB 1 COftftDNlcATIOHS SCAM RIB 1FT SYftfTOa INDEX
aOUT. IBBoa PUHCTIOR TBSTED
CODE

o

SUSPECTBD CARD
LOCATION(S)
EOB auto-call units the BOB will cause
the auto-call unit to transfere control
to the aodes/data set with DATA-SET-BEADY
on i.sediately, even though no distant
station has been connected and given
an answer tone.

PROG
BASK

4

Error indicating PYI, CRQ or DLO not on.
Reg. X'15' byte 1 bits 1,2 & 3 should be on.

5

No auto-call coapletion (timeout).
Reg. I' 15' byte 1 bit 6 (COS) should be on.

FBALD
PAGE

PET""
PAGE

CORRENTS

15PO

OX20

Transait line operations.

A transmit line error has been
detected. Beg X'13'=accumulated
simulated ICW bits 0-15
during this transmit operation.
On each level 2 interrupt
simulated ICW bits 0-7
are OBed together and saved
for this error display. If
reg X'15' byte 0 bit 3(1'10')
is on then tbe transmit line
bas timed out due to 'clear
to send' not cosing on or due
to scse other transmit failure
such as loss of transait
clock.
Definition of tbe simulated ICW
bits:
8it 0 = Abort Detect
,
Horaal char SVC L2
2 • Over/Under rUD
3 • lIodem check
_ • Receive Line Signal Det
5 • Plag Detect

See Rtn beading
for more registers
and error statistic,
If you continue fro
this error stop by
selectinq PUNeTIO.
and press START
the test restarts
at the transmit or
receive part of tbe
test witbout hardware reset enable.
This error may
be easier to
find and correct
,itb rtll 15CE.

15PO

OX60

Beceive error coapletion.

This error stop occurs if a
aodea check bas been detected
(siaulated ICW bit 3 on) wbile
in receive sode or tbis stop
occu~s if JOu selected the
options to stop on any frame or
any frame in error. Beg 1'13'
contains the silulated ICW bits
accumulated during this receive
operating by o~ing ICW bits 0-1
together and saving them on
each level 2 interrupt. Hote
that program does not stop on
receive tiseouts but setups to
transait again if a primary
station or to receive again if
a secondary station. Reg 1'16'=
address of receive data buffer in
storage and reg X'19'=adr+1 of
last received character. Hote
that regs defined in routine
beading provide more information.

See Rtn heading for
test details,
registers and
test statistics.
Cqntinueing
from this stop
by selecting
FUIICTtO. 5,
press SUR':
the test
restarts from tbe
xait or ree
portion of the
test without doing
the hardware
reset and enables.

15PO

0161

Beceiving frues.

This stop code occurred because
you selected an option to stop
on the type of frame just received.
Beg I' IE' defines type of frame
receive4 and is defined in the
routine heading. Reg X'16= adr of
start of receive data buffer.
Reg X'19'=adr+1 of last cbaracter
received (less block check
chars). Beg X'14'-accumulated
block check (Cac) characters
accumulated by this program and
should = X'POB8' if no errors
occurred. Reg X'13'=last two
received characters (prior to
flag char) and should be the

See 8tn heading for
reg isters, test
statistics.
continue from this
stop select rUHCTIO
5 and press
SURT, the
program restarts
at tbe transmit/
receive portion
of the test
withQut doing
hardware reset
enable operations
but clears the
statistics

o

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EBBOB DESCRIPTION

6 -- Abandon-call and retry case on.
Beg. X'1S' byte 1 bit 7 case on.

o
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o
o

D99- 3705E- 09

Type , Scanner 1FT

X3705FAA

5.0.1~5

15M 3705 COMMUNICATIONS CONTROLLER
TYPE 1 COMMUNICATIONS SCANNER 1fT SYMPTOM INDEX
ROUT. ERROR FUNCTION TESTED
CODE

ERROR DESCRIPTION

D99-3105E-09

SUSfECTED CARD
LO~ATION(s)

actual received block check
(CRC) characters.

PROG
HASK

FEALD
PAGE

fETHM
PAGE

COMMENTS
counters.

,
"

5.0.146 X3705FAA

Type 1 SCdnner 1FT

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lOft 3705 COftnU.IC1TIOBS CO_TBOLLBB
TIPB 1 COBftURIC1TIOUS SCANHBft IrT SyftPTOft IBDBI
BOUT. EBaOa rUBCTIOR TESTBD
BBBoa DESCBIPTIOH
SUSPBCTBD C1BD
CODE
LOCATION(s)
Type 1 Co ••unications Scanner Cos.on Subroutine and Interrupt~Handler Error Codes

rBALD
PAGB

rBTKft
PAGB

COftftEHTS

151X

tXIX

The following error codes are error stops caused by a failure detected in one of tvo co ••on subroutines.
These failures say therefore occur in any routine. The first subroutine, error codes lXOl and 1102,
atte.pts to reset and enable the scanner by disabling the scanner Yia OUT 1'45', waiting 30 aicroseconds for
the scanner to disable, and then enabling the scanner only (not the LIBs) via OUT X'45'. The second subroutine, error codes 1104 through lX01, sets diagnostic bit service and atteapts to set each of the 64 line
addresses to aode 010 (disablel as each line interrupts. Error codes (lXOC through 1X1A) are error stops
issued by the 'dial-a-digit' subroutine. This subroutine is used by any routine that wishes to dial a digit
on an autocall interface. The dial digit is passed to the subroutine which then handles the dial operation
froa the ti.e PID coses up on the autocall interface until DPR is drOpped by the subroutine after tbe digit
has been sent. Bf reviewing the 'function tested' coluan of each Of the error stops, the reader should be
able to follow the flow of the dial operation.,
'
'

15IX

1101

Bnsure that following an
OUT X'q5' with byte 0, bit
2 on, the CS is reset.

o

o
o
o
o
o

PBOG
BASK

After waiting 30 .icroseconds
Cone scanner pass), an IU X'qq'
indicated tbe scanner vas not
reset. Beg. X'15' contains the
bits in II X'44' in error:
eyte 0:
Bit 3-scanner enabled latch
failed to reset.
Bit 4-character service
pending latch failed
to reset.
Byte 1:
Bits 2 thru 5-bit clock
check for LIBs 1,2,3,
or _ (respectively)
. failed to reset.
Bit 6-LIB select check
failed to reset.
Bit 7-outbus check failed
to rsset.

rrFF

Pretest error.
Berun routine
1504. Since
'Scanner
enabled' being
off resets the
A-310 others, if byte
0, bit 3 is on
A-210 in error, ignore
A-220 anr otbers that
are on. Beg.
X'14' qontains
1-210 the resal t of
1-220 the III 1'44'.

Y4E2

BS105

t4E2

BS105

tflF2

BS206

nr2

BS206

t4E2

BS102

A-210
A-220
A-210
1-220

u105

1-210
1-220

Pretest error.
Berun routine
1506. Beg.
1'14' contains
the result of
the IN X' qq'.

Pretest error.
Berun routine
1512.

Bnsure that folloving an
1'45' with byte 0,
bit 2 on, tbe CS can
be enabled.

U i'4'" byte 0, bit 3
(scanner enabled latchl failed
to set.

lXOli

Ensure that force bit
service (OOT 1'47') can
cause a bit service
interrupt fro. the first
line (BCB address 1'0800'1.

lfter attempting to force
YQr2. Y"G2
a bit service level 2 interrupt
cvia OUT X'47') fros the first
line address, un.asking level
two interrupts and waiting tbe
tile of a scanner pass, no bit
service interrupt occurred
fro. that line.

BS305

1-330
A-OliO

15IX

1106

Bnsure that with diagnostic
bit service set, eacb tise
a pending bit service
interrupt is reset and the
scanner is started, another
level two interrupt is
1.lediat81r pending.

with diagnostic bit service
Y4G2, '4B2
having been set and the previous
bit service request being reset,
an 1ft X'77' ia.ediately
following the preYious reset
failed to indicate a pending
level two interrupt. CByte 0,
bit 1 of the U X'77' was off.)

BS305

A-040, Pretest error.
B5105 A-300 Display reg.
X'1I3'. If byte
0, bit 1 is on,
a feedback error
has occurred;
rerun routines
1512 and 1514.
If not, rerun
routines 1572
and 15711. If
needed, reg.
X'lS' contains
the address tbat
should have caused
the next level
t 110 interrupt.

151X

lX08

Bnsure that the level two
interrupt condition just
caused was caused by the

After baving found a pending
level 2 interrupt condition
as expected, an IH X'41'

RS301

A-140

1511

110l

15XX

~ype

ou~

1 Scanner 1FT

!4E2

Y4G2

1000

Pretest error.
Rerun routines
1572 and 1574.

X3705rAA 5.0.147

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()
leK 3105 CO""UNICA~IONS CONTROLLER
TlPB 1 CO"KONIC~~IONS SCANNER 1FT SY"fTOH INDEX
ROO~.

lSXX

ERROR PUNCTION TESTED
CODE
the next sequential
address.

lXOA

ERROR DESCRIPTION
indicated that it vas not
caused by the next seguential
address.

Ensure that mode 010 can
be set via an OUT X'42'
with mode bit 2 (byte 0,
bit 1) on only.

After issuing the described
OUT X'42', with the scanner
stopped at the line address
found in reg. X'lS', an IN
X'42' did not reflect the
OOT 1'112'.

D99-3105E-09

SOSPECTED CARD
LOCATION(SI

PBOG
nASK

FFPP

PEALD
PAGE

IIS30Q

FET"n
PAGE

A-110

COHnENTS
If needed, reg.
X'lS' contains
the line address
t hat caused the
interrupt aB
determined by the
III X'Ql'. Also,
reg. x'16'
containB the
address tbat
sbould bave
ca~sed it.
Pretest error.
Berun routines
1552 and 1516.
If needed, reg.
X'1 Q' indicates
the bits in
error, and reg.
X' 16' ir.dicates
what tbe III
X'Q2' shollld have
contained.

\~

,~'

,

I

lSIX

lXOC

While vaiting for PHD
(present next digit) to come
up from the autocall unit,
ensure that a bit service
interrupt occurs at least
once every JO milliseconds

A bit service interrupt from
the tested address (found in
reg 1'11'1 failed to occur
witbin 30 milliseconds of the
previous one.

lSn

110E

While waiting for PHD, keep
cbecking for ACR (abondon
call and retry).

Wbile waiting for PHD, an IN
X'43' indicated that ACB bad
co.e up from the autocall unit.
Reg X'13' contains the results
of tbe III X'4J'. (ACR CODling
up may not in itself be the
of the failure but just a symptom of it. In example, wben
dialing tbe first digit, lCR
should COlO up if dial tone
was not detected within the
proper amount of timel.

Pretest error.
If n-eeded, reg
X'16' contains a
storage location
address. ne
byte at tbis
address contains
tbe digit count
to identify which
digit of the
number h being
dialed. the latit
four bits of the
next byte at this
address contain
the digit itself.
Reg X'1" contains
the autecall line
(BCel address.
It Dlay be possible
to scope this failure wbile stopped
at this error stop.

After waiting 60 seconds from
the beginning of tbis subroutine, PND failed to come
up from the autocall unit.
nor had it brougbt up lCB to
indicate an error condition.
(At the start of this subroutine, if this is the
first digit being dialed,
CRQ has been set. If this
not th~jfirst digit,
DP! bas been dropped after
sending the previous digit.
In eitber case, PUD should
have come up within 60
seconds.) Beg X'13' contains
the res~lt of the last IN
X'qJ'.

Pretest error.
·:;14
'1 . . . -/
If needed,
reg X'16'
contains a
storage 10catiQn
address. The byte t
at this address
contains the digit
count to identify
which digit of'the
numbel:" is being
dialed. The last
four bits of the
next byte at tbis
address contain
the digit itself.
Beg I'll' contains
/
the autocall line
(BCB) address. It
may be possible to
scope this failure
while stopped at

15XI

1Xl0

Hait up to 60 seconds for
PND to cODle up.

,'ij

5.0.148 XJ105PAA

YQG2

RSlOS

A-OQO

Pretest error.
probably an intermittent loss of
strobe. Berun
routine 1580.

/

Type 1 Scanner 1FT

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IBB 3705 COftftORICATIORS CORTBOLLER
TYPE 1 COKBOIICATIORS SCARIER IPT SYBPTOB IIDEX
BOOT. EBBOR PORCTIO. TESTED
CODE

EaBOR DESCBIPTIOI

CAaD
LOCATIOI(s,

SOS~ECTED

1SXX

1X12

Present the digit to be
dialed to the a.toeall unit.

o
o

PEALD
PAGE

PETKK
PAGE

COKftE.7S

After issuing an OOT X'43'
while stopped at the autocall
line address (found in reg.
X'11'), aud II X'43' did not
reflect the OOT X'43' as it
should have. Beg. X'1Q'
contains the results of the
II X'Q3' and reg. X'15'
contains the bits in
error:

Y4G2

1P08

BS308

A-190
A-200

Pretest error.
Berun and loop
on the appropriate routines
as given below.
Pailure is
probably in the
associated line
interface.

Byte 0:

o

o

Bit 3 - DPB failed
to set

lIerun routine
155A

Bit 4 - 188 bit
failed

Berun routines
1511 and 151C.

Bit 5 - IB4 bit failed

Berun' routines'
151E and 1520.

Bit 6

Berun routines
1526 IUld 1528.

IB2 bit failed

Bit 7 - IB1 bit

o

Berun routines
1522 and 152Q.

fail~d

Bit 1:
Bit 4 - ClIQ dropped

Rerun routine
1556.

1SXX

1X14

While waiting for PRO to
drop, ensure that a bit
service interrupt occurs
at least once every 30
ailli-seconds.

A bit service interrupt froa
the tested address (found
in reg 1'11', failed to occur
within 30 ailli-seconds of
the previous one.

1SXX

1X16

While waiting for PRO to
fall, keep check for ACR.

After having presented DPB
and the digit to be dialed
to the auto call unit and
while waiting for PID to
fall, the autocall unit
brought up ACB. Beg X'13'
contains the results of the
II X'43' that indicated
ACB. (ACR itself may not
be the actual cause of
failure but just a sy.pto.
of it. In ezaaple, the
autocall unit will bring
up ACB if it doesn't
recognize the presented
digit as a valid digit.)

Pretest error.
If needed, reg.
X'16' contains
a storage location address.
The byte at thi~
address containf
the digit count
to identify
which digit of
the nUllber is
being dialed.
The last four
bits of the nezi
byte at this

After waiting 60 seconds, PHD
never dropped to indicate that
the dial digit bad been dialed,
nor had ACR ever coae up to
indicate a failure. Beg 1'13'
contains the results of the

Pretest error.
If needed, reg.
X'16' contains
a storage locatl.on address.
The byte at thi:

i

I

o
o
o

PROG
BASK

this error stop.

o

"U

D99-3705E-09

e
1SXX

1X18

Wait up to 60 seconds for
PID to fall after having
presented DPR and the
dial digit.

Type 1 Scanner IPT

UG2

BS305

A040

Pretest error.
Probably an
interaittent
loss of strobe.
Berun routine
1580.

address contain
the digit itsell
Reg X'11' contains the autocall line (BCB)
address. It
may be possible
to scope this
failure wbile
stopped at this
error stop.

X3705P1A 5.0.1Q9

t!lll 3705 COlltlUNICATIONS CO~TROLUR
TYPS t eOtlIlUHIC~TIONS SCANNSft 1fT S1MPTOII INDEX
ROUT. ERROR PONCTION TESTED
CODE

D99-3705E-09

ERROB DESCRIPTION

SUSPECTED CARD
LOCATION(s)

PROG
IIASK

FEALD
PAGE

FETHH
PAGE

last executed IN X'43'.

COIIIIENTS
address contains
the digit count
to identify
which diqit of
tho number is
being dialed.
The last four
bits of the next
byte at this
address contains
the digit itself.
Reg X'II' contains the auto-

call lina (nCO)

addross. It
may be possible
to scope this
failure While
stopped at this
error stop.
15XX

lXIA

Reset DPR to complete the
dialinq of the cu~rent
digit.

After having seen PHD drop,
an OOT X'43' vas executed
with just the CRa bit on
to reset the digit bits and
DPR. An IN X'43' then
indicated that either the
bits ~id not reset or eBa
had. Beg X'14' con\ainr
the results of the IN ,
X'43'. Beg X'1S contains
the bits in error:

Y4G2

lF08

RS30B

A-190
A-200

Pretest error.
Rerun and loop
on the appropriate routines
as given below.
Failure is
probably in the
associated line
interface.

jY

Byte 0:
Bit 3 - DPR failed to
reset.

aerun routine
155C.

Bit 4 - NB8 bit failed
to reset.

!lerun routine
151C.

Bit 5 - NB4 bit failed
to reset.

Rerun routine
1520.

Bit 6 - NB2 bit faibd
to reset.

Rerun routine
1528.

Bit 1 - RBI bit failed
to res( t.

Berun routine
1524.

Byte 1:
!lit 4 - eRQ dropped

Rerun routine
1556.

15XX

2XIX

following error codes are error stops caused by a failure detected in either the first or second level
interrupt handlers. When a level one or two interrupt occurs, certain checking is done by the appropriate
interrupt handler to ensure the validity of the interrupt. since the interrupt handlers are common to all
routines, these errors may occur in all routines and in either pretest or test.

15XX

2X 10

Ensure tha t the level 1
interrupt which has just
occurred is expected by
the routine running. (i.e.
adapter level 1 interrupts
have been unmasked).

~he

An unexpected
interrupt has
(i.e. A level
occurred with
masked off.)

level 1
B3~2
occurred.
1 interrupt has
level 1 interrupts

CP002

6-082

Rerun 1FT l1XX
(ceu In).
Reg. X' 05' contains additional
information. If
byte 1, bit 1
is off, neither
IN X"76" nor

IN X"7E" contained an interrupt request bit.
If this bit is on,
the type 1 CS
requested the
level 1.

5.0,. 150 X3705FAA

Type I Scanner 1FT

1(-'

;fr

.~ "'.
lIdr under tost.
. Rog rnr(j-~ shoul/l-rsg X' 11 '.
n no feedbliCk check (LCD-!')
occurred, the LCD should
be 7 if the line runs in
startlstop mode; the LCD should
be 'C' if the line runs in BSC
,9Cc.JU-~

~_'!!LiJ. If

6.1.6 X3705GAA

TA331

\

'"

B-170

\

"'

B-310

All SIS and
B-260 BSC line sets
I some RPQ line set
are tested via a se
lode operlltion. Thi
checks some of the
scanner, osc, LIB,
line set Circuits.
1 likely source
of error is the lin
set card in the
failing line addr.
Display bit is set
whilo line alldr is
under test 80 that
the display Req
(reg X'46')
is valid for
line adr under

~ype

(

2 Scanner 1FT

"

,

"

"

o

o
o

o

IBM 3705 CO~"UNICATIONS CONTROLLER
TYPE 2 COKMUNICATIONS SCANNER 1fT S¥nPTon INDEX
ROUT. ERROR PUNCTION TESTED
CODE

ERROR DESCRIPTION
mode. If PCP = 1 the
set mode never completed for
start/stop or BSC lines.
If PCF=O the set mode
completed normally
but the level 2
interrupt expected
did not occur within
25 mili-seconds after
it was issued. Register
X'11' byte 0 bit 1 will be on
if a L2 pending occurred after
the 25 milli-sec. The SDF
contains the bits used for
set-mode. The card called is
only a starting point to look
for bit service.

o

o
o
o

"
U!

,-

FEAtO PETMII
P~GE

,

Set mode and scanner test

Level 2 interrupt from wrong
A3L2
address. check the line that
caused the interrupt for faults.
Reg 1'11'=line address under
test. Reg 1'40' should=reg
X'11'. Reg X'14' has line adr
obtained from ABAR by Input
1'40' when the L2 occurred.

TA621

1621

OX03

Set mode and scanner test

PCF field did not set to zero
on set mode. Regs X'11'
and X'14' setup sawe as
errors OX01 and 0102.

TAB11

X628

XXXX

,

A3F2

COIIIIENTS

PAGE

test. The PCF
is checked for
a aftEr a
set mod e. A set
mode lIIay cause
a level 2
interrupt even
if the oscillator
is not working
properly. See note
in T2CS-NOTES
for aid in isola tin
the problem.

OX02

,'1

8-jl0
B-260

See error OX01 for
details.

8-310

See error OXOl tor
details.

6-260

Feedback check test. All installed line sets are tested to insure that a feedback check will occur if an
invalid bit is used during set mode and that a feedback check does n~ occur if a valid bit is used during a
set mode. This routine will most likely produce error stops if the CDS (configuration data set) defining
the LIB and line set types is not set up properly for the hardware that is installed. If the CDS is correct
then the most likely source of the error is in the line set card(s) for the failing line address. See note 1
in section T2CS-NOTES for an aid to problem determination.
'
Each installed line set is tested in the following steps:
a.
b.
c.
d.
e.
f.

Reset then enable the scanner.
Set the display bit on in tbe line address under test.
Set the SDF via an output X'46' with the bits in reg X'13'.
Set scope sync 2.
Set LCD-O and pcP.' to initiate the set mode operation.
Unmask level 2 interrupts and wait until either 8 level 2 occurs or
25 mili-seconds have elapsed.
g. Verify that the LCD was set to F by the scanner if a feedback check
should have occurred due to an invalid bit being used in the SOF during
the set mode or verify that LCD was not set to p if a valid bit was used
during tbe set mode.
h. Repeat steps a through 9 until all set lIIode bit positions have been
tested.

o
o
o
o

o
o
o
o

SOSPECTED CARD
LOCATION (S)

X627

o

o

1J99-3'105E-09

On all error stops in this routine the following tegisters are setup:
neg X'11'. line address ot line undet test(ss uaed to set A8AO).
Reg X'13'= bit pattern being output to the SDF for this step of the test. The bit
position that is a 1 is tbe bit being tested. Each bit of byte 1
is defined in more detail as:
Bit

ICW bit

SDF

bit

Noru 1 use if this bit is a 1 during Bet modo.

0 ••••• 26 •••••••• 2,••••• w ••• Not used.
1••••• 21 •••••••• 3 •••••••• Set diagnostic wrap mode.
2 ••••• 28 •••••••• 4 •••••••• Set Data Terminal Ready.
3 ••••• 29 •••••••• 5•••••• ~.Set sync bit clock(synchronous clock correction).
4 ••••• 30 •••••••• 6 •••••••• Set external clock selected.
5 ••••• 31.,••••••• 1 •••••• ,•• Set Data Bate Select(sel¢ct high rata).
6 ••••• 32 •••••••• 8 •••••••• Set oscillator select bit 1.
1 •• ~ •• 33 •••••••• 9,•.••••••• Set oscillator select bit 2.
X628

aX01

Check that an invalid bit
in the SOP during s set
mode operation causes a
feedback check.

Type 2 Scanner IFT

Error it a feedback chock
did not occur setting the
LCD to F. See reg X'13'
bit definitions in the

A3E2

TA341

8-260

A te~dback check
should hav~ occurre
since CDS indicates
a line set is

X3105GAA 6.1.7

- - - - - - -- - -- -- -- - -

c
lUH 3705 COKNUHICATIONS COH'BOLLER
TYPS 2 COKKONiCATiOHS SCAN"B. 1fT SYKPTOK
ROUT. ERBOR FUNCTION TESTED
COOS

P99- 37052- 09

IND~X

ERROB DESCRIPTION
routine,heading for aore
inforlDation.

SUSPECTED CARD
LOCATION (SI

FEALD FETHH
PAGE PAGE

13E2

TA3q1

1628

0102

Check that a valid bit in
the SDF during a set 1D0de
operation does not cause
a feedback check.

1629

XXXX

Diagnostic 1D0de test. Each installed start/stop or synchronous line adr is set into diagnostic 80de with a
set 1D0de operation. Then a check is aade that Clear to Send, Data Set Ready and Diagnostic Hode bits are on.
Auto call line sets are not checked. Each adr is tested in the following seguence: (11. Beset and then
enable the CS. (2). Set display bit (ICN bit 381. (31. Set SOP bit on for Diagnostic aode and set bit on
for Syn Bit Clock if line will run in synchronous aode only. (q). Set scope sync 2. (5). set PCF=1 and LCD
=7 for start stop lines or LCD =C for syncbronous lines. (6). Wait for level 2 interrupt fr08 the set mode
and check the results.

Error if a feedback cbeck
occurred setting LCD to F.
See reg X'13' bit definitions
in routine beading for
failing bit.

B-260

COHHENTS
installed without
a latch for
the bit position
under test
1n tbe SDP.
1 feedback check
should not occur
CDS indicates
a line set
is installed
with a latch that
could be set
on for this SDP
bit position
during a set
1D0de operation.

The aost likely source of hardware failures detected in this routine are the line set card(s) for the line
address under test. Reference note 7 in section T2CS-NOTES for aid in deterlDining a failing pattern.
X629

OX01

Diagnostic 80da

Level 2 interrupt did not
occur. See routine X627
error OX01 for regs.
card called is only
a starting point to
look for bit service.

A382

TA331

8-310
8-260

Sae routine
heading for
aore info.

X629

OX02

Diagnostic 1D0de

Level 2 interrupt from wrong
line address. Check the
line address for faults.

A3L2

TA621

8-310
B-260

See routine X621
OX02 for
regs. See rtn
heading for
80re info.

1629

0103

Diagnostic .ode

PCP did not change to zero on
set mode completion. Sea
routine X627 error OX03 for
registers.

A3F2

TA811

B-310
B-260

See rtn beading
for more infor.atio

X629

OXOq

Diagnostic 1D0de

Proper latches did not set.
Display reg X'q6' byte 0,
bits 0,2 and 5 should
be on_ Reg X'1Q' contains
input fro. reg X'Q6' at the
time failure was detected.
Reg X'15' has a bit on for
each bit position in reg X'1Q'
which is in error. Reg
X' 11'=1ine address under test.

A3E2

TA331

B-150

Reg X'46' bit 3
(BLSD) is ignored
in this test;
it may be on or
off. Errors may
be detected if an
incoming call on a
switched line
brings up 'ring
indicator' (Rsg
1'46' bit 0.1).

X62D

0101

Service request (ICW bit 1)
and level 2 interrupt

Level 2 interrupt did not
occur for set moae. See
routine OX27 errOE OX01
for regs and checks.

A3E2

TA33,

B-130
B-260

Each installed SIS
or Bse line set
into diagnostic
receive mode and
SDP bit 9 set on.
A L2 interrupt
should occur and
sve reg bit (ICW
bit 11 should
turn on.
The reset of
the SYC req bit
is then checked.

X62D

0102

Service request (ICW bit 1)
and level 2 in~errupt.

Level 2 interrupt was from
A3L2
',the nong ,line' address.
Check the line address that
causes the interrupt for faults.

TA621

B-300

See comments in err
code IOX01.

~,

V

()
6.1.8 X3705GAA

Type 2 Scanner 1FT

o
o
JBft 3105 COftftUHICATIOHS CONTROLLBR
~YPB 2 COftftUDICATIONS SCAN"BR Ir~ SY"PTOn INDEX

o

BOUT. BBROR PUNCTION TESTED
CODE

o

ERaOB DESCRIPTION
Beg X'll'=line address under
test. Beg X'40' should
reg
X'11'. Reg 1'14' has l1ne adr
obtained from ABAB by Input
X'40' wben the L2 occurred.

SUSPECTED CARD
LOCATIO. (S)

PEALD FBTftII
PAGE PAG8

COllllENTS

=

X62D

o

P99-3105B-09

OX03

1620

SOP bit 9 vas turned on
and should cause a
character service level
2 interrupt.

Level 2 interrupt did not
occur,. Check osc or scanner
or miSSing line set card
for that line. Reg X'll'
• line adr of line under test.
Reg X'40' should. reg X'11'.

A382

fA331

SOP bit 9 vas turned on
and should cause ,a
character service level
2 interrupt.

L2 interrupt occurred from
wrong line address. Reg X'14'
=line address tbat caused tbe
level 2. Reg X'11'=line
addr_ss L2 was expected from.

A3B2

TA331

8-310
8-260

See COlillents in err
code OX01.

See comments in err
code ,OX01.

o

X620

OX 05

SOP bit 9 was turned on
and should cause a charservice level 2 interrupt
with ICW bit , on.

ICR bit l(svc-re~uest) is not
on or ICI bits 0,2,3,5,6 or 7
are on. Beg X'441 byte 0=
ICW bits 0-7 in bits 0-1.

13P2

'l'A 121

B-1II0

o

X62D

OX06

SOP bit 9 was turned on
and should cause a character
service L2 interrupt

Service reguest did not
reset (ICR bit 1). Beg X'44'
byte O. bit ,.

AlP2

TA121

8-180

o

X62E

OXOl

priority bits 1 & 2
Reg X1117 '

Priority bit 2 failed to set.
Beg X'11'=line address of line
under test. Reg X'40' sbould
• reg X' 11'.

13G2

TB021

B-210

1628

0102

Priority bits 1 & 2
Reg 1'1i'7'

Priority bit 1 hiled to set.
Reg X'll' -line address
under test. Beg X'40' should
• reg X',,'.

U02

~D02'

8-210

X62B

OX03

priority bits 1 & 2
Reg X'II1'

priority bit 1 and 2 failed
to set. Reg 1'11' = line
address under test.

13G2

TB021

8-210

X62E

OX04

priority bits 1 & 2
Reg x'41'

Prio~ity bit 1 and 2 failed
to turn off. aeg X'11' =
line address under test.

A3G2

n021

8-210

1632

OXOI

Interrupt re~uest pending
bit (ICW 41). Reg X'47'

L2 interrupt reguest
pending bit did not set in
ICi ql, or reg I'Q7'. check
that 1st set mode caused tbe
priority reg to be occupied.
Reg 1'13'-line address tbat
should be in priority reg 3.
Reg X'16'=line address tbat
should bave interrupt request
pending bit on. Reg X'QO'
should. reg 1'16'.

&3L2

T&6ql

8-300

L2 interrupts are
sasked off and a se
1I0de puts a line
addr (ICIII in
diag lIode witb
priority select met
to 3. A 2ncl
line addr is put
into diag 1I0de;
priority select set
to 3 by another.
set mode operation.
Then the
on state of tbe
interrupt pending
bit is tested
in tbe 2nd
line. Level 2
interrupts are
unmasked and
checked tba t
they occur in
correct order

X632

OX02

Interrupt request pending
b1t (ICI! 41). Reg X' 47'

No level 2 interrupt. Should
have bad a L2 fro. line adr
in reg X'13'. Reg X'16' =
line adr of the next expected
L2 interrupt.

AlL2

TA611

8-300

See in error
code OX01.

o
o
o
o

OOQO

o

o
o

o

Type 2 Scanner IPT

ICI bit q is ig nore
in this test since
may 1>8 on or of f.

All cOllbinations of
tbe priority b~ts a
checked that tbey c
be set and reset.

X3105GAA 6.1.9

o
IBII 3705 COIIIIUNICA'rIONS CON'l'ROLUR
TYPB 2 COIINUNICATIONS SCANNBR 1FT SYIIPTOII INDEX
ROUT. BRROR FUNCTION TESTBD
CODB
1632 OX03 Interrupt request pending
bit (ICW 41). Beg X'47'

D9 9 - J 7 0 5 E- 09

EBBOR DESCRIPTION

eABD
LOCnION (51
A3L2
SUS~ECTED

1st level 2 interrupt occurred
but not from the expected line.
Beg X'13' = line adr expected to
interrupt first. Beg
X'14' = line adr that caused
the L2 interrupt. Reg X'16'
line adr expected to interrupt
next.

FEUD FETIIII
PAGE PAGE
TA611 B-300

COIlIlENTS
See in error
OX01.

=

1632

OX04

Interrupt request pending
bit (ICW 41). Reg X'47'

No level 2 interrupt from 2nd
A3L2
line that had interrupt pending
bit on. Beg X'13' .. line adr
of line that should have
interrupted previously. Beg
X' 16' = line address expected
to cause the L2 interrupt ..

TA611

B-300

Check scannur,
oscillator, and
LIB clock i f no
L2 interrupt
occurred. See
comlllents in
error code 0101.

X632

OX05

Interrupt request pending
bit (ICII 41). Beg X' 47'

2nd Level 2 inter~upt occurred A3L2
but from wrong adr. Reg X'13'
=line adr of previous line that
should have interrupted on
previous error check. Beg X'14'
line adr of 11ne causing L2
interrupt.. Reg X'16' .. line adr
expected to cause L2 interrupt.

Tl611

B-300

See error
code OXOI.

Opper scan limit
test (8 lines).

Did not get level 2 interrupt
A3L2
from one of the 1st 8 lines when
ICII bit 41 was set on. Beg X'11'
= line adr L2 expected to L2
interrupt Beg X'40' should =
reg X'I1'.

Tl621

B-220

Only 8 lines
should interrupt
when lew bit 41
is set on; upper sc
limits are setup to
scan 8 line addrs.

OX02

Opper scan limit
X'OI' test (8 lines).

Level 2 from wrong adr. Beg
X'11'
line adr expected to
L2 interrupt. Reg X'14' .. line
adr causing the L2 interrupt.

A3L2

TA621

B-300

OX03

Upper scan limit
X'OI' test (8 lines).

Got an unexpected L2 interrupt A3L2
when ICW bit 41 was set in one
of the lClis beyond the 1st
8 lines. ~his interrupting lCIl
should not have been sCAnned
to cause a L2 interrupt even
though its L2 interrupt pending
hit was set. Beg X'l" = line
adr in _hich the ICW bit 41 was
set. Reg X'14' is the line adr
causing the L2 interrupt.
If reg
reg X'14',
the upper scan li.it 01 is not
working properly.

TA621

B-220

If reg X'11' is
not. to reg 1'14',
the unexpected L2
may be caused by a
scan problem not
related to the uppe
scan Ii.it controls

Did not get level 2 interrupt
from one of the 1st 16 lines
when lew bit ql was set on.
Beg X'11'
line adr expecting
a L2 interrupt.

A3L2

TA621

B-220

Only 16 line
addrs should
interrupt when
ICII hit 41 set
on with scan lint
set for 16 lines.

=

X634

OXOI

X' 01'

1634

=

X'."=

1635

OXOI

Opper scan limit X'11'
test (16 lines).

=

X635

OX02

Upper scan limit X'11'
test (16 lines).

Level 2 interruFt from wrong
adr. Reg X'11'
expected adr;
reg X'14' = line adr causing
the L2 interrupt.

A3L2

TA611

B-300

X635

OX03

Opper scan limit X'11'
test (16 lines).

Got an unexpected level 2
interrupt when ICW bit 41 was
set in one of the lew's beyond
the 1st 16. This line
adr should not be scanned
with scan limit bits
11 so
a L2 should not occur. Beg
X'11' = line adr of ICII
in which bit 'II
was set. Beg X'14' = line
adr causing the L2. If reg
X'll'
reg X'1Q', the upper

A3L2

TA621

B-220

=

=

f!

"-:. "
/~

'\

~~~ !~!~~,

to Reg X'14',
the unexpected
L2 interrupt
lIay be caused by
a scanner problem
not related to
the upper scan
limit controls.

,(--"

=

6.1.10 X3705GAA

Type 2 Scanner 1FT

.,
'<

~.

o
o
IBK 3105 COHftUHICATIONS CONTROLLER
TYPE 2 COHKONIC1TIOHS SC1HRIR 1fT SYHPTOft IMPEX

o
o
o
o
o

ROUT. ERRoa FUNCTION TESTED
CODE

EaROR DESCRIPTION
scan limit 01 is pot working
properly.

SUS PECTEI! CARD
LOCATIOH (S)

Ff;ALD rETlI1I
PAGE l'AGE

OXOl

Opper scan limit X'10'
test (4a lines).

Did not get L2 from one of
the 1st 48 lines when ICW bit
41 was set. Reg X'll' = line
adr expected to L2 interrupt.

A3L2

TA621

8-220

X636

OX02

Opper scan li.it X'10'
test (48 lines).

Level 2 froe wrong adr. Reg
A3L2
X'11' = line adr expected to L2
interrupt. Reg 1'14' = line adr
on whicb the L2 inter~upt
occurred.

TA611

8-300

1636

OX03

Opper scan li.it X'10'
test (48 linell).

unexpected L2 interrupt when
ICW bit 41 was set in one of
the ICI's beyond the 1st 48
line adrs. Witb scan li.it
10 set, tbis line should
not be scanned so no L2 sbould
occur. Reg X'll' = line adr
of ICW in which ICW bit 41
was set on. Reg 1'14'=1Ine
address that caused tbe L2.
If reg X'11'
reg 1'14' then
upper scan lilit 01 Is Dot
working properly.

A3L2

'rA621

8-220

If reg X'11' is
not equal
to Reg X' lQ',
the unexpected
L2 interrupt
II 8y be caused
by a scanner
problem not
to the scan
limit controls.

Level 2 interrupts did not
occur after uDmasking level 2.
Reg X'13'
line adr L2
expected froe •

A3L2

T1611

8-300

Tbe 1st 4 ICW's are
setup with priority
settings of 3,2,1,
and 0 in that
orde1:.
ICII bit q 1
(interrupt request
pending) is set
in tbe 1st four
ICWs. Level
2 is unmasked
and the ICWs
are cbecked to
ensore
they interrupt
in proper order
(1st, 2nd,
3td, 1\ 4th lCN) •

o

=

X63B

OXOl

Interrupt

prio~ity

register.

=

1

,,',
.

!

o
o
o
o

1E3B

0102

Interrupt priPJ;lty register.

Level 2 interrupt is not frol
A3L2
the expected address. Reg 1'13'
= line adr L2 expected from.
Reg I' 14' = line adr that
caused L2.

'r1611

8-300

X630

0101

Substitution
bit 1

Unexpected level 2 interrupt
occurred. Reg 1'14'=line adr
of line causing the level 2
interrupt. Reg X'11'
line address that had
ICW bit 41 (L2 pending) set.
If reg X'11' does not equal
reg X'14', there may be a
LIB or scanner failure. If
reg X'lQ' = reg X'11',
subst ctrl reg
bit 1 1s not working
and reg X'14' is the line
address that should not have
been scanned and therefore
should not bave caosed a
L2 interrupt.

CIOOl
I;X009

8-220

co~trol

reg

=

o

o
o
o

COIIIIENTS

X636

o

.0

P99-3105E-09

Type 2 Scanner 1FT

8382
83D2

only 48 line
addrs should
interrupt
"lren ICI! bit
41 is set on
when upper scan
limit is set for
Q8 lines.

subst ctrl reg bit
1 is set on and an
attempt is made
to cause a L2
interrupt on
lines E 1\ F of
all LIBs. These
addresses should
not be scanned.

X3105GAA 6.1.11

18K 3705 cOllnUHICATIONS CONTROLLER
TY;S 2 COKKUNICATI0NS SCANNER 1FT SYKPTOK INDEX
BOUT. ERROB FUNCTION TESTED
CODE
OX01 Substitution control reg
bit 2

1638

1631'

OX01

Substitution conttol reg.
bit 3

EBROR DESCRIPTION

099-37058-09

SUSPECTED CABD
LOCATION (S)
8382
83D2

unexpected level 2 interrupt.
8eg X'14' = line address of
line causing the level 2.
Reg X'11' • line adr of
line that had ICW bit 41 (L2
pending) set. If reg X'",
does not equal reg X'14' there
aay not be a LI8 or scanner
failure.
If reg 1'14' • reg X'11', subst
ctrl reg bit 2 is not vorking,'
and reg X'14' is the
line adr that should not have
been scanned and therefore
should not have caused a level 2.

FEALD FETIIII
PAGE PAGE
CX001 8-220
CX009

Unexpected level 2 interrupt.
83E2
aug X'14' -11ne adr causing
83D2
the L2 interrupt. neg X'11'.
line addr tbat had ICW bit 41
(L2 pending) set on. If reg
X'11' does not .. reg X.,II'
then there may be a LIB or
scanner failure. If reg X'111'
=reg X'11' then the substitution control reg bit 3 is not
vorking properly and reg X'11'"
the line address that should
n~t have been scanner and
should not have caused a L2.

CX001
CXOO9

Unexpected level 2 interrupt.
B322
Reg X'14' = line adr causing
83D2
the L2 interrupt. Beg X'11' =
line adr that bad ICW bit 41
(L2 pending) set. It reg X'11'
does not equal reg 1'14', there
aay be II LIB or scanner failure.
If reg 1'111'=reg X'11', the
subst ctrl reg bit II is not
working in which case reg X'14'
is the line adr that should not
have been scanned and therefore
should Dot have caused a level
2 interrupt.

CS001
CI009

8-220

COIIIIENTS
Subst cttl reg bit
2 is set
and an attempt
is made to cause
a L2 intertupt on
lines C & 0 of
all LlBa. These
addresses should
not be scanned.

5 ubst ctrl reg

bit 3 is eet and
an at tempt is
made to cause
a L2 interrupt on
lines A & 8 of all
LI8s. These address
should not be scann
with the scan
substitution contra
bit 3 on.

./

"- ./

1640

X645

X645

OX01

XXXX

OX01

substitution control reg
bit 4

8-220

SCB bit 4 is set
and an atte.pt
is made to cause
L2 interrupt on
lines 8 1\ 9 of
all LI8s. These
addresses should
not be scanned.

II

Diagnostic transmit test for start/stop line sets. All 1nstalled line addresses that will run in start/stop
mode are tested, one at a time. ~be test goes through transmit initial (Pcr=S) to trans.it data (PCF=9)
through trans.it turn-around (pcr=g to PCF=7). The characters transmitted are a PAD character of X'FP'
followed by two data characters of X'AA'. The start stop LCD of 7 (start bit. 8 data bits, 2 stop bits) is
used in this test. You should reference notes 4 and 7 in section T2CS-NOTES for aid in problem
determination if this routine detects any errors. Prior to setting transmit initial the program does a set
mode with the 'diagnostic mode' bit on. If this set Bode fails you vill get pretest error stop codes in
display 6 beginning vith 1. These codes may be found in section T2CS-CO" near the end of the symptom index.
With 'diagnostic mode' set properly the scanner should force on the 'clear to send' condition so that when
transmit initial is set the next bit time should result in PCP changing from 8 to 9 (transmit initial to
transmit data). The most likely Bource of hardware failure for this routine is in the line set card(sl for
the line addrese that is under test.
Diagnostic transait test
for start/stop.

L2 interrupt did not occur
after transmit initial
was set. Display reg. X'45'
and check byte 0, bits 0-3 for
!eedback cbeck (all bits on).
LCD shOUld =7. PCF should =9.
(PCF VIIS set to 8 by proqraml.
Beg X'1"=line address under
test. See routine beading
for more information.

A3L2

TA611

6-310
8-260

".---"

The scanner hdrdwar
sholild change the P
from 8 to 9 when it
detects 'CTS'
which should be
forced on bf the
scanner 1f
'diagnostic
modo latcb' set
on properly when
the set mode vas
done. After sea nne
changes PCP to 9,
it should serialize
and transmit a
bit every bit
service time and
cause a char-svc L2

/,r~,

\'

6.1.12 X3705GU

Type 2 Scanner 1FT

"

f
\'

',:..

-

o
o
o
o
o
o
o
o
o
o

-~~-~~~-~~'----"-'-~---------

IBft 3705 COftftONIClTIONS CONTROLLER
TYfB 2 CO"ftONICATIONS SCAHNBR IrT SXaPTO" I"DEX
ROOT. ERROR rONCTION TESTED
CODE

o
o
o
o

p99-31052-09

BRBOR DESCRIPTIO.

SDSPECTED CARD
LOCATl:ON (S)

fEUD PBTU
P,.GB PAGB

COllftENTS
interrupt when
tbe PAD char has
been sent.

X6q5

OX02

Diag transmit test for
start/stof·

Level 2 interrupt was not
fro I expected line adr. Reg
X'lq'·llDe adr that caused
the level 2 interrupt.
Reg 1'11'=line address tbat
level ~ vas expected from.

A3L2

TA611

B-3DO

X6QS

OX03

Diag transmit test for
start/stop.

Primary control field (PCP)
did not change to J'9'.
Reg X""-line address under
test. See routine heading
for more information.

AlP 2

TA8tl

8-080

Ho level 2 interrupt after
2nd transmitted char. Reg
X'11'-line address under test.
If LCD-P a feedback check has
occurred. LCD should
7,
PCP should = 9.

A3L2

TUll

B-3,0

XeQ5

OXOQ

Oiag transmit test for
start/stop.

Check scanner, osc.
and LIB clock if no
level 2 interrupt
occurred or
L2 was frOB tbe
wrong line addr.
See rtn heading for
Bore inforlatioD.
ScaDner should chan

pcr to 9 frol 8 .he

it detects 'clear t
send' whicb
should be forced
by the scanner
i f diagnostic
lode set properly.

=

X6QS

OX05

Diag transmit test for
start/stop.

2nd level 2 interrupt from
wrong line address. See
error stop OX02 for regs.

A3L2

IA611

8-300

See rtn beading
for more inforlatio

1645

OX 06

Oi8g transmit test for
start/stop.

Ko L2 for trans.it turnaround. 13L2
Reg X'1,' aline address under
test. Check reg I'QS' for LCD.
If LCD-P a feedback check
occurred. LCD should. 7, PCP
should • 7 since PCP was set to
'0' (transait turnaround) aD
tbe pre,ions character
service level 2 interrupt.

T16tt

8-3tO
8-080

See rtn beading
for aore inforsatio

X645

OX07

Dia9 transmit test for
start/stop.

3rd level 2 interrupt froD
wrong line adr. See error
stop code 0102 above for regs.

A3L2

IA61'

8-310

See rtn beading
for more informatio

X645

OX08

oiag transmit test for
start/stop.

PCP did Dot change to 1'7'
(receive sode) after turnaround or LCD changed.
Reg X'11'=line adr under test.

13P2

TA8tl

8-080

Scanner should chan
PCP to 7 on normal
turn-around
coapletion.
LCD should be 7.

X6QS

OX09

Dia9 transait test for
start/stop.

SOP did not set to O.

13H2

TA22'

8-480

SOP should be chang
to 0 by
scanner hardware
on transmit
turnaround.
Beg X"S' byte 0,
bits 6 and 7
contain SDr
bits 0 and 1.
Byte 1 contains
SOP Bits 2-9.

X6QA

XXXX

Diagnostic receive mode bit service and tag detection test. All line sets that will run in start/stop or
synchronons Dode are tested. After tbe set mode is cos~leted a bit pattern of 1'0301' for start/stop line
sets or 1'0201' for synchronous line sets is output to SOP via an output to reg 1'~6'. Tben the PCP is set
to 7 (receive Dode) with a LCO=7 for start/stop line sets or LCO=C for a synchronous line set. Por start/stop
line sets this should cause a character service level 2 interrupt on the first scan cycle after the next bit
service occurs in the line set. Par a synchronous line set (due to LCD=C) the character service level 2
interrupt should occnr after the second bit service and should strobe a one bit into PDP bit 0 from the Test
Data Latcb. In eithe~ case the result s~oula b~ a character of X'CO' in the PDr when t~e character service
OCClirs.

X641

OX01

Diagnostic receive Dode
bit deserializing and bit
service for all installed

o
o
o
o
o

-----

Type 2 Scanner IPT

PCP did not set to X'1'
(receive aode) or LCD has
changed. Reg 1'1"=line

A3P2

TABt1

8-190

pga did an output
to reg X'45' to set
LCD and PCP. Tben a

I3705GU 6.1. t3

18K 3105 CO"KUHtC1TIONS CONTROLLER
2 COft~ONICAT10.S SCA_HBR 1fT SYftPTOK lfiDEX

1199- 3705E-09

TY~B

BOUT. ERROR PUMCnOIi TESTED
CODE
line addresses in receive
lIode (PCpc,) •

EBROR DESCRIPTION
address of line set under
test.

SUSPECTED CARD
LOCATION IS)

FEUD lETnll
1'lGE

~lGE

input X'4S' is don~
to check LCD G PCP.

X641

OX02

D1ag receive 80de, bit
deserializing and bit
service for all lines in
receive 80de.

Level 2 interrupt did not
13L2
occur. Cbeck oscillator,
scanner lillits, or LIB clock.
Beg X'11' • line address
elpected to cause L2 interrupt.

TA611

B-490

Sue rtn heading.

1641

0103

Diag receive 80de, bit
deserializing and bit
service for all lines in
rcy 1I0de.

L2 interrupt fro. wrong adr.
Beg 1'14' • line adr that
caused 12 interrupt. Beg
X'11'. line adr expected to
cause level 2 interrupt.

13L2

TA611

B-300

See rtn heading.

x64 ...

OX04

Diag receive 80de, bit
deserialiling and bit
service for all lines in
rcy 80de.

Data byte in PDP (parallel
data field) not elpected
data, or cbeck flag on in
ICW bits 0-3. Beg 1'11'=line
adr. Beg X'14'=flags and PDP
input froll Beg X'44'. Beg
X'16'=expected bits that
should be on in Beg 1'14'.

A312

TA311
Tl131

B-490
B-1I20

See rtn heading.

X611C

XXXX

13~2

Diagnostic transllit test for synchronous lines. All installed line sets that will run in synchronous 1I0de
are tested fro. transllit initial (~cp=e) through transmit data IPCP=91 to transmit turnarognd (PCpaD to
PCP-S). Characters transllitted are two pad charactets of X'lA' and the character x'32'. Prior to setting
transmit initial the program does a set mode with the 'diagnostic lode' and 'sync bit clock' bits both on.
If this set lode fails you will get pretest error stop codes in display B beginning with 1. These codes may
be found in section T2CS-COft near tile end of the symptom inder. VUh 'diagnostic lode' set properly the
scanner should force on the 'clear to send' condition so that when transllit initial i8 sst tho next bit time
should result in ~CP changing from 8 to 9 (transmit initial to transmit data).

OXOI

Diagnostic transmit test
for BSC line sets.

Level 2 did aot occur after
transmit initial. LCD should=
C. If LCD=P a feedback check
occurred so line set or LIB
is probably in error. If
LCDeC check PCF. PCP vas set
to 8 but should have changed
to 9 as the 1st character was
transmitted. If the character
was not transmitted check for
oscillator/LIB clock error or
scanner failure.

A3L2

TA611

B-310
B-260

See rtn beading
and notes q and 1 1
T2CS-HOU5 for
checks to aake
information to
to aid problea
det erllina tion.
Reg X'11'=line addr
of line set
under test.

X64C

OX02

D18g transmit test for BSC

Level 2 from wrong line adr.
Display reg X'14' for line
aar that caused the level 2
interrupt: reg X'11' for
the line adr expected to
cause the level 2 interrupt.

AlL2

TA611

B-300

5ee notes 4 & 7 in
T2CS-NOTES for
prohlem
determination.
aids.

X64C

OX03

Diag transmit test for BSC

PCF did not cbange to X'9'
(transmit data). Beg X'11'=
line adr. LCD S PCP saae
as error OXO t.

A3F2

TA811

8-080

See rtn heading.

X64C

OX 011

Diag transmit test for esc

2nd L2 interrupt did not
occur. See error 0101 above
for LCD S PCP.

13L2

TA611

B-310

See rtn heading.

2nd L2 interrupt from wrong
line address. Check failing
line adr for cause of error.
See routine heading.

1,3L2

L2 interrupt did not occur
after setting pce I'D' for
transmit turnaround. Check if
LCD=F(feedback check). pcr
should=S since on last char
service it was set to '0'.
If PCP is not 5 then turnaround did not work. Beg
X'11'=110e adr under test.

A3L2

X64C

OX05

Oiag transmit test for esc

ox 06 D1ag transmit test for BSC

6.1.14 I3705GAA

'

/

X611C

t64C

\..,

,

"

'-

"

/""

,

-

~,

e-260

TA611

TA611

B-300

5-080

Beg X'14'=11ne addr
that caused the
L2 in error.
Reg X'11' "
line addr expected
to cause L2.

i

/

.,,--/.

See rtn beading.
LCD should =c. peF
should have changed
to 5.

Type 2 Scanner 1FT

(

"'-

,

o

o
o
0

0
0
0
0
0
0

le~ 3705 COftftUNICATIONS CONTROLLER
TlfB 2 COft!UHICATIOHS SCARHBft 1FT SYftPTOft INDEX

X6QC

ERROR PUNCTtON TESTED
CODE
0107 Diag transmit test for BSC

X6ijC

OX08

Diag trans.it test for BSC

1650

XIXX

Wrap data test for start stop line sets using LCD~7. All lines that run in start/stop mode (except
telegraph line sets) are wrapped two at a time. Tbe first installed SIS line is made the receive
line and the next installed 5/5 line is made a transmit line. As each pair of lines completes its
wrap, the lines are reset. The line tbat was the transmit line is now made the receive line and
the next iostalled 5/5 line is ude tbe transmit line. This is continued until the last installed
S-S line has been used as a transmit line. The last installed SIS line is then made a receive line
and the first installed line is made the trans.it line for the last Mrap performed in this routine.
Data sent on the transmit line will be the PAD character (X'PP') and the characters X'AA', X'Ol'
and X'PE'. The test is run with LCD=7 so the hardware shoul& add a start bit and two stop bits to
the character being transmitted. The receive line should receive the transmitted characters except
for the PAD character.
'

aOUT~

Hote , :
Note 2:

o
o

ERRoa DESCRIPTIOR
3rd L2 interrupt from wrong
line address. Check failing
line adr for cause of error.
See routine beading.

PCF did not change to 5 on
transmit turnaround or LCD
is not~C. Reg 1'11'=line
address under test.

SUSPECTED CARD
LOCATION (S)
13L2

FEUD FEU!
P1GE PAGE
TA6"
B-300

A3F2

TA811

B-OBO

COIlIlENTS
Reg X'lij'=line addr
that caufOed the
L2 in error.
lIeg X,'11' •
line addr expected
to cause L2.
fCP should change
to 5 and LCD
should have
remain&d at C.

See notes 4, 5 and 7 in section T2CS-NOTES for more information
and for aid in problem determination and isolation.
For
reg
reg
reg

all error stops in this routine, the following registers are setup:
I ' l l ' a transmit line address (as used to set ABAR)
X'13' = receive line address (as used to set ABAR)
1'14' for errors that indicate level 2 interrupt occurred fro. wrong address
and contains the line address that caused the L2 interrupt.

reg X'14' for errors that indicate the received data is bad, or indicates that ICW bits
0-7 are in error and contains ICW bits 0-15 from the receive line ICN obtained
by executing lnput X'ijij'. ICW bits 8-15 (the PDP) contain the
received data. lew bits 0-7 are check and control flags and are always
expected to be set as follows:
ICW bit 0
Stop bit check and should be off
ICW bit 1 • Service request and should be on
leW bit 2 = Character overrun/under run and should be off
ICi bit 3 • Hodem check and should be off
ICW bit 4 = Receive line signal detector. This bit is ignored in this test.
ICW bit 5
Beserved bit. This bit is ignored in this test.
ICW bit 6 = Program flag. This bit is ignored in this test.
ICW bit 7
Pad flag. This bit is ignored in this test.
reg 1'16' for errors that indicate the received data is bad, and contains'the expected ICW
bits 0-1~ that are being tested against the contents of reg x'lQ'.

o

o

D99-310511-09

The receive line always has the display bit on in its ICW, so register X'46'
is valid for the receive line under test. All lines are set to priority 3 and oscillator select O.
The following 'el=ror codes are li~1:eil in tll,e s~:rup1: occurred.

1650

OX10

Deceiving character X'FE'

Level 2 interrupt frol wrong
adr. Reg X'11'
transmit line
adr. Reg X'13' • receive line
adr and adr expected to
cause level 2 interrupt.
Beg X'14' = line adr causing
tbe L2 interrupt.

13L~

TA611

8-300

See checks and
comments in the
J;outine heading.

1650

OX11

Deceiving character X'FE'.

Received data not X'FE', or
ICII bits 0-3 in error.

13E2
A3P2

TA311
n131

8-490

See comments
in routine beading.

X650

0112

Transeit of X'FE' coepleted
and transeit turnaround.

Ho level 2 interrutp occurred.
Reg X'11' = trans.it line adr
and adr expected to cause L2.

A3L2

TA611

8-310 7tb L2
8-260' line qtb from rec
addrl after prog
set scope sync 2.
Transmit turnaround
(PCF=DI
was set after the
previous L2 interru
for transmit lin8
so transmit line
ebould nOli be
turned around to
receive lIode
(PCP·') •

X650

OX13

Transeit of X'FE'
coepleted and transait
turnaround.

L2 interrupt from wrong adr.
A3L2
Reg X'11' • transmit line adr
S adr expected to cause the L2.
Reg X'13'=receive line address.
Reg X'lQ'=line address that
caused the level 2 interrupt.

TA611

8-300

See checks and
cOlllments in the
routine heading.

1650

OX1Q

Transllit turnaround.

Translit line pcr did not
change to 7 on turnaround,
or transait SOP did not set
to 0 or LCD not=1.

TAS11
T1211

8-060

Wben transmit
turnaround is
co.pleted the S_-'
should be x'OOO', P

o

o

099-31058-09

Type 2 Scanner 1FT

=

A3r2
A382

X3105GAA 6.1.17

t;·

I\.,}

,0
lEft 3105 COM~UNICATIONS CONTROLLER
TYPE 2 COMMUNICATIONS SCANNER 1FT SYMPTOM INDEX

D99-3105E-09

,0···"
I·

ROUT. ERROR PUNCTION TESTED
CODE

ERROR DESCRIPTION

SUSPECTED C"RD
LOCATION (5)

FEALD FETe"
PAGE PAGE

COMMENTS

,II

should be 1. LCD
should be 7.
See checks and
comments in the
routine head1ng.
X65'

IIXX

Wrap data test for telegraph line sets. All telegraph line addresses are wrapped. two at a time. The 'st
telegraph line address is made the receive line then the next installed telegraph line is made a transmit line.
As each pair of lines completes its vrap the lines are reset. The line that was the transmit line
is nov made the receive line and the next installed telegraph line is made the transmit line. This is
continued until the last installed telegraph line has been used as a transmit line. The last installed telegraph line is then made a receive line and the first installed line is made the transmit line for
the last wrap performed in this routine.. Data sent on the transmit line viII be the PAD character. of X'FF'
and the characters X'A"'. X'O" and X'PE'. The test is run with LCD=1 so the hardware should add
a start bit and two stop bits to the character being transmitted. The receive line should receive the
transmitted characters except for the PAD character.
Note: See notes 4. 5 and 7 in section T2CS-NOTES for more information and for aid in
problem determination and isolation.
~hroughout this test. register X""
contains the transmit line address and register
X'13' contains the receive line address.
The receive line
will always have the display bit on in its ICW so register X'46' is valid for the
receive line under test. All lines are set to priority 3 and oscillator select O.
Note: when telegraph lines are wrapped. an echo check will occur if there is
no external current loop. This echo check sets modem error (ICW bit 3) that prevents
service request interlock froll being set. This routine ignores the modem error and
all the ICW 0-7 error conditions.
The following error codes are listed in the sequence that the actual test is run.

X651

0101

First level 2 for transmit
line (not counting set
mode).

No level 2 interrupt occurred.
Reg X'11'
transmit line adr.
Reg X"3' = receive line adr.

"3L2

TA611

B-310
B-260

Should have charservice L2
interrupt after
the PAD character
was transmitted.
See notes 4. 5 & 7
T2CS-NOTES for
checks and aids
in problem
determination.

X65'

OX02

Pirst level 2 interrupt
for transmit.

Level 2 interrupt from wrong
address. Reg X"" = transmit
line adr: the adr expected to
L2 interrupt. Reg 1"3' =
receive line adr. Reg X"4'
= line adr that caused the
level 2.

A3L2

TA6"

B-300

See checks and
comments in the
routine heading.

X651

OX03

Transmit line PCF changed
to 9 as the PAD character
X'FF' is transmitted.

Transmit line PCF did not
change to 9. Reg X""
transmit line adr.

A3F2

TAS"

B-OSO

See checks & commen
in the Btn heading.
Character
X'O,' is set
in transmit PDF
after this error
display. Previous
PDF character
of X'AA' should now
be in process
of transmission
from SDF.

X651

OX04

Receive line rece1v1ng
character X' AA' • (First
receive line L2 interrupt
after set mode.)

No l~vel 2 interrupt occurred.
Reg X"" = transmit line
adr. Reg X'13' = receive
line adr and the line adr
expected to cause L2.

"3L2

TA61'

8-490

See checks & co.men
in the Rtn heading.
This is the 2nd
L2 after program se
scope sync 2.

X651

OX05

Receive line rece1v1ng
character X'AA'.

Level 2 interrupt from wrong
A3L2
address. Reg X'1" = trans. it
line adr. Reg X"3' = receive
line adr; the line expected to L2
interrupt. Reg X'14' = line adr
causing L2.

TA6"

B-300

Receive line receiving
character X' AA' •

ReceiYe line PCP not = 1.
Reg X'13' = receive line adr.

A3F2

TAS"

X651

OX06

See checks and
comments in the

routine heading.

B-OSO

Rec PCF vas set
to 1 (receive mode}

'{".

l'
6.1.~S

X3705GU

;

Type 2 Scanner 1FT

(

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_____ n_... _______ ""_..._..... _ ..._._....... __________.__ ________
~

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IBII 3705 COltftUHICA'l'IONS COHnOLLER
TIPS 2 COKBUIICATIONS SCAHHaB 1fT SlKPTOK INDEX
SUSPECTED CARD
LOCUIOR IS)

eOnllENT5

BOOT. ERBOB PONCTIOR TBSTED
CODB

EBBOR DESCRIPTIOH

1651

0101

Receiv ill.

transmi~

A3L2

TA~11

See rtu headi ny
notes 1 and 2 for
registers & checks.
After this .. rcot:
displdY, the
t Ia nsmit PCF is
set to X'D' tOl:
transmit turn-

around.

Should

now be in process

of transmitting
X'00' 85 last
character to
transmit.
1656

0127

Receive chardcter X'OI',

No level 2 occurred from
receive line address.

A3L2

TAb11

12th level 2 (7th
from receive). See
1 &2
in hedding of
th1S routine
for registers
and checks.
Last 1.2 for

note~

rece.lve.

X656

OX28

Receive character X'Ol'.

X656

0129

Receive character X'Ol'.

l,evol 2 !lot f,om ."cei ve
line address.

A3L2

TAO 11

See I t l l heading
notes 1 and 2 fOL
registers & checks.

Received data in

A 3E2

TA311
TA 131

See

PDF

not

I' ,,, or ICW bits 0-3 in

error.

A31' 2

ttl!

heading

notes 1 and 2
tor registers,
lCW bits 0-7,

and checks.
After this en'or
display, the
rcceiv" PCF is

6. I. 28 X3705GAA

Type 2 Scanner 1FT

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0
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IBft 3105 COftftUNIClTIONS CONTBOLL!B
TIPB 2 COKftUNIClTIOHS SClHHBB 1fT StaPTOR IRDBX
ROUT. BRBOB PONcnOR TBSUD
CODB

BBBOR DBSCBIPTION

D99-370S!-09

SIISPECTBD CUD
IOCA 'f101i (S)

PEALD PETltIl
PAG! PAG!

1656

012A

Transmit of 1'00'
completed and transmit
turn-around.

Ho level 2 occurred frail
transmit line address.

AlL2

'U611

13th level 2 (10th
from transmit) and
should be the last
level 2. See
notes 1 II 2
in heading of
this routine
for registers
and cbecks. At
this the the
transait PCP
should have
turJled around
to PCl'=5.

1656

OX28

Transmit of X'OO'
completed and transmit
turn-arOllnd.

Level 2 not from transmit
line IIddress.

A3L2

'U611

See rtn beading
notes 1 and 2
for registers
and cbecks.
PCl' should
be turned around
to PC,=5.

1656

OX2C

Transmit turJl-llround.

Transllit PCP did not turn
13P2
around to PCP=S or LCD changed.

'U811

lfter previous
transmit level 2
(see error 0126)
t~ans.it PC, vas
set to' X' 0' to
cause a turnaround. Tbe
hardvare should
have completed
tbe transmission
of tbe character
1'00' and theJl
set PCP=S. See
notes 1 II 2
in beading of
this routine
for registers
and checjts.

XXXX

BPQ 10 bit time out test: Test vill only run if the CDS block for the scanner under tes~ has a bit on
to define this BPQ. All lines that run in startlstop mode
are vrapped tvo at a time. The first installed SIS line is made tbe receive
line and the next installed SIS line is made a transmit line. Is each pair of lines completes its
vrap, the lines are reset. The line tbat was the transmit line is now made the receive line and
the next installed SIS line is made the transmit line. Tbis is continued until tbe last installed
SIS line has been used as a transmit line. The last installed SIS line is then made a receive line
and the first installed line is made the transmit line for the last vrap perforaed in this routine.

U
0
0
0
0
0

e

COIIIIEIiTS
set to 0 so no
further level 2
interrupts shollid
occur from the
receive line
addr.

X6S8

Data sent on the transmit line vill be the PAD character (X'Pl") and th. characters 1'1", I'Pl", I'PP',
and 1'l'P'. The test is run with LCD-1 so the hardware sbould add a start bit and two stop bits to
the character being transmitted.
Receive line vill have ICW bit 39 set on to activate the BPQ. The ICN bit 1 pad
flag is set to bold the start bit tc a mark in place of the norlal space. The receive
line not seeing start bits vill recognize the first space received as a start bit.
This vill cause tbe receive liQe to receive different data than was transmitted.
Data received vill be P5, 8 bit times of marks, PP, then 10 or sore bit tiaes of
marks to give the RPQ time to tiae out.
Hate

0

Par
reg
reg
reg

all error stops in this routine, tbe following registers are setup:
X'11' • transait line address (as used to set ABAR)
X'13' • receive line address (as used to set ABARI
X' 14' for errors that indicate level 2 interrupt occurred from vrong address
and cOQtains the line address that caused the L2 interrupt,

reg 1'14' for errors tbat indicate the received data is bad, or indicates that ICW bits
0-3 are in error and contains ICW bits 0~1S froa the receive line ICW obtained
by executing Input X'44'. ICW bits 8-15 (the PDP) contain the
received data. ICW bits 0-3 are check and control flags and are .lways

o
Type 2 Scanner IPT

X370SGAA 6.1.29

IeM 3705 COMMUNICATIONS CONTROLLER
TYPE 2 COH6UN1CATIONS SCANNER 1FT SYMPTOM INDEX
BOUT,. EBROR FUNCTION TESTED
CODE

D99- 37 05E- 09

ERROR DESCRIPTION
SUSPECTED CARD
FEUD I'ETMM
LOCATION (5)
PAGE PAGE
expected to be set as follows:
ICW bit 0
Stop bit check and should be off
ICW bit 1 • Service request and should be on
ICW bit 2 • Character overrun/under run and should be off
ICW bit 3
~ode. check and should be off
ICW bit 4
Receive line signal detect. This bit is ignored
in this routine.
ICW bit 5 = Reserved bit, This bit is ignored in the routine.
lCW bit 6 • Program flag and should be off
ICW bit 7 = Pad flag. This bit is ignored on the received
data character ICW bits 0-15 tests.

COIIH ENTS

reg X'16' for errors that indicate the received data is bad, and contains t'he expected ICII
bits 0-15 that are being tested against the contents of reg X'14'.
Section T2cs-Notes is referenced by some of the error stops in this routine.
These notes give more detailed information about the above regs. Section T2CS-Notes
note 7 also give some information that you may use to help isolate the problem.
The receive line always has the display bit on in its ICW, so register X'46'
is valid for the receive line under test. All lines are set to priority 3 and oscillator select
The followiug error codes are listed in the sequence that the actual test is run.
X658

OXOl

o.

t~ansmit

First level 2 interrupt for
line (not counting
set DIode).

No L2 or L2 not from the
transmit line address.

A3L2

TA611

Should have had a
char service level
interrupt after
the PAD character
was transd tted.
See section
T2CS-Notes notes
2, 5 & 1 for regs
& checks.

X658

OX02

Transmit line PCF changed
to 9 as the PAD character
X'I'F' is transmitted.

Transmit line PCP did not
change to 9 or the LCD did
remain at 7.

1.31'2

TA811

See comments
in the rtn heading
X'FF' is set in
PDF in transmit ICW
after this error
display. Previous
PDF character
of X'7F' should
be in process
of transmission
froll SOP now.

X658

OX04

Transmit of char X'7F'
cOllpleted.

No L2 or L2 not from the
transmit line address.

13L2

TA611

Should have just
completed the
transm1ssion of
X'7F'. The
X'FI" that WIlS
in the PDP should
have transferred to
the SOl' and
be in tbe procell
of being
transmitted.
This is the 3rd
L2 interrupt after
firing fiCOpe
sync 2.
See notes 2, 5 & 7
T2CS-NOTES for
registers & checks.

X658

OX06

Receive character X'FI".

No L2 or L2 not from the
receive line address.

A3L2
A31'2

TA611

Should have receive
char X'FF' and had
a char-service L2.
This should be the
2nd L2 interrupt 2
(1 st from the
receive line adr)
after program set
scope sync 2.
See section
T2CS-Notes notes
2, 5 & 7 for regs
& checks.

(.,
6.1.30 X3705GAA

Type 2 Scanner 1FT
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IBM 3705 COMMUNICATIONS CONTROLLER

D99-3105E-09

TYPE 2 COKHUNICATloNS SCANNER 1FT SYMPTOM INDEX
ROUT,. ERROR FUNCTION TESTED
CODE
X658 OX08 Receiving character X'FF'.

ERROR DESCRIPTION
Data Received npt X'FF', or
ICW bits 0-3 in error.

SOSPECTED CARD
LOCATION (5)
A3E2
A3P2

1'EALD FETlIII
PAGE PAGE
T1,311

TA131

X658

OXOA

Transmit of 1'1'1"

X658

axoc

Receive line is in a time
out Alode. loCO of 7, PCI'
of E.

Receiv~ line PCI' not = E
or LCD not = 7.
Reg X'13' = receive line adr.

Receive line is in a time
out aode. lCW bit 39 set.

Receive line lCW bit 39 not
on. Reg 1'13'=receive line
address.

A3L2
A3G2

TA611
TA021

completed.

No L2 or L2 not from the
transmit line address.

A3L2

'U611

Should have just
transm! tted
character 1'1'1".
Character
X'57' should be
transferred from
the PDF
to the SOP and be
in the process of
being transmitted.
This is the
4th L2 (3rd from th
transmit line adr)
after program set
scope sync 2.
See notes 2, 5
and 7 in
T2cs-NOnS for
registers & checks.

131'2

TASll
TA211

Receive line ~CF
should change to E
(receive timeout
DIode).

o
0

0
0

X658

e

OX10

1382

A3J2

OX 12

Transmit of char X'57'
completed.

No L2 or 1.2 not froa the
transmit line address.

13L2

TA611

Should have just
completed the
transmission of
X'57'. The'
X'1'1" that was
in the fD1' should
have transferre4 to
the SOl' and
be in the process
of being
transmitted.
This is the 3rd
L2 interrupt after
firing scope
sync 2.
See section
T2CS-Hotes notes
2, 5 & 7 for regs
& checks.

1658

OX 14

Receive line receiving
character X'1'5'

Receive line PCl' not = 7
or LCD not = 7. Reg 1'13'=
receive line address.

A31'2

TA8t1

Rec fC1' Nas
=E but should have
changed to 7 when t
start bit was
received.

X658

ox 16

Receive character 1'1'5'.

No L2 or L2 not from the
receive line address.

A3L2

TA61t

Should receive
char x'P5' and bad
char-service level
interrupt. This
should the 6th
L2 (2nd from the
receive line edr)
after program set
scope sync 2.
See notes 3, 5
and 7 in
T2CS-NO'lES for
registers & cheCKS.

X658

OX18

Receiving character 1'1'5',

Data Received not 1'1'5', or
lCW bits 0-3 in error.

A3E2
UP2

TA311

See comments under
error code OX05.

x658

OX1A

Transmit of X'FF'

No L2 or L2 not from the
transmit line address.

13L2

TUll

0
0
0

0

o
o

Type 2.Scanner 1FT

o

Receive line ICW bi
bit 39 was set on
during the initial
program setup and
should have
remained on.

1658

0

0

see comments under
error code OX05.

compl~ted,

~A131

Should have
transmitted

X3705GAA 6.1.31

IBM 3705 COMMUNICATIONS CONTROLLER
TYPE 2 COM"UNICATIONS SCANNER 1fT SYMPTOM INDEX
ROUT. ERROR PUNCTION TESTED
CODE

ERROR DESCRIPTION

1l99-3105E-09

SUSPECTED CARD
LOCATION (S)

FEALD FETII~
PAGE PAGE

COMMENTS
charact er X' 1'1" •
I'Ff' should be
transferred from
the PDF to the
SDf and is
being transmitted.
This is the
7th (Srd from
transmit) L2 int~r­
rupt after firing
scope sync 2.
See section
T2CS-Notes notes
2, 5 1\ 7 for regs
S checks.
After this error
display, the
transmit line PCl'
is set to D for
tran8lllit
turnaround.

X658

OX18

Receive Line time out

No L2 or L2 not frOB the
receive line address.

A3L2

X658

OX1C

Receive line time out.

Service request bit 0.1
should not be on but was.

A3P2
12P2

SVC reguest bit
should te blocked
by the scanner
because of the
tillie-out.

1658

OX1E

Receive line timed out,
test ICW

ICW
off
Beg
Reg

bit 39 should have turned
because of the tile out.
X'13' receive line addr
1'14' input 4q data
Reg X'15' bits in error

A3f2

Recei ve line ICW
bit 39 should
have turned off
because of the
tin out.

TA611

A3J2

A3L2

x658

OX20

Receive line time out.

Rece ive line PCP not = 7
or LCD not = 7. Reg X'13'=
receive line address.

A3p2
A382

X658

OX22

Transait of X'fP' completed
end transmit turnaround.

NO L2 or L2 not from the
transmit line address.

13L2

This is the 8th (3r
from receive addr)
and last L2 interru
for receive line.
See section
T2CS-~oteB notes
2, 5 & 7 for regs
1\ cl>ecks.

Receive line PCP wa
= E but should have
changed to 7
because of
the time out.
TA611

This is the
9th L2 (6th from
transmit line addr)
after scope sync 2.
Transmit turnaroun d (PCrcD)
was set after the
previous L2
fro. transmit line
so transmit line
should now be
turned around to
receive mode'
(PCF=7) •

See section
T2CS-Notes notes
2,5 1\ 7 for regs an
checks.
1658

OX 24

Transmit turnaround.

Transmit line PCF did not
change to 1 on turnaround, or
transmit SDr did not Bet
to 0 or LCD did not remain
at 7.

131'2
131'2

TASll

/-

~,

When transmit turnaround 1a
completed thoa
SDP should. 000,
pcr should .. 7,
LCD should remain
at 7. See notes 2.
S 7 in T2cS-NOTES
for regs 1\ checks.

of
6.1.32 X3705GAA

Type 2 Scanner 1fT

"t",'
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IBft 3705 COHnUNICATIONS CONTROLLER
T¥PE 2 COKHUNICATIQHS SC~NNBB 1FT SYHPTOH INDEX

ROUT. ERROR FUNCTION TESTED
EBROB DESCRIPTION
SUSPECTED CARD
PEALD PETKK
COHHENTS
CODE
LOCATION (5)
PAGE PAGE
1651 xxxx DLC line sets wrap data test. 111 installed line sets that will run in DLC mode are wrapped two at a time.
The first installed DLC line set is made the receive line and the next installed DLC line set is made the
trans. it line. The test is then performed on this pair of lines. When the test is completed on this pair
of lines, the lines are reset and the line that was the transmit line is now made the receive line and the
next installed DLC line set is made the new transmit line. Then this pair of lines is wrapped. This
stepping up through the lines is continued until the last installed DLC line has been the transmit line.
The first installed line is then made the transmit line and the last installed DLC line is made the receive
line and this pair of lines is wrapped.
A set mode is done on both the transmit and receive lines with lCW bit 27 (diagnostic wrap mode) and ICW bit
Oscillator select bits are 0 so the first oscillator is selected. The
priority bits are set to 3. The set mode is done before the setting of scope sync 2 as each pair of lines
is wrapped. The set mode must be completed successfully for the wrap to function and any errors detected
during set mode are pre-test errors and start with error code lXXX. These error codes are near the end of
the symptom index after all routine error codes. References to level 2 interrupts in the following error
codes are the character service level 2 interrupts that occur after scope sync 2 is set and do not include
level 2 interrupts that occurred for set mode before scope sync 2.
29 (sync. bit clock) both on.

Note 1:

On all error stops in this routine, the following registers are set up:
Reg X'11' = Transmit line set address (as used to set ABAR)
Reg X'13' = Receive line set address (as used to set ABAR)
Reg x'14' for errors that indicate no level 2 occurred or L2 from wrong address
Line address that caused the L2 or
0000 if no L2 occurred.

=

o

Stop bit check, should be off
Service request, should be on
Character overrun, should be off except when
misaligned flag character is detected.
lCW bit 3
"odem check, should be off.
Receive line signal detect(this bit is
ICW bit q
ignored in this test) •
DLC flag detect/disable stuffer remember,
lCIi bit 5
on when a flag character is detected
Program flag(this bit is ignored.)
lCW bit 6
pad flag/disables stuffer bit, on only when a
ICN bit 7
flag or pad char is set into the PDP for the transmit
li~e address. This bit is ignored on the receive
,
line address.
" ' , I'
for errors that indicate the LCD or PCF is bad, contain the LCD
in byte 0 bits 0-3, and the PCF in byte 0 bits 4-7.
Reg 1'16' for errors that indicate received data is bad, contains the expected
lCW bits 0-15 that are being tested against the contents of Reg 1'14'
except bits ~,6 and 1 are ignored.
lCW bit 0
ICW bit 1
ICII bit 2

"

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=

Reg X'14' for errors that indicate received data is bad or lCW bits 0-3 or 5 are in error
= What was obtained by an input X'44' from tbe receive line lCW (bits 0-15)
lCW bits 8-15 are the PDP and should contain the receive data
ICW bits 0-1 are error and control flags and are expected to be
set as follows;

'0
o

1>99-37052-09

Checks to be made on all error stops:
A. Check LCD of failing line set. If LCD='. a feedback check has occurred.
If the CDS indicates a line set that will run in synchronous mode is
installed, but this is not the case, then a feedback check will occur.
B. Use the continue function (except on pre-test errors starting with 1) to
continue from tbe error, to see if just this line set is failing, if
all line sets in this LIB are failing, or if all DLC lines are failing.
"ultiple error stops on the same pair of wrapped lines may occur so the
continue function may bave to be used many times. If only one line set
is failing or a pair of even/odd addresses, then the line set card is
probably bad. If all addresses fail in one LIB, the lIB's bit clock control
card or terminators may be bad. If all DLC line sets fail, the CS
cards may be bad. If the line sets are the type that will run also in
synchronous and start/stop mode and if they run successfully in routine X652
and X656 then suspect the LCD or DtC circuitry or sync bit clock control.

Note 3,
The transmitted characters are offset by 1 data bit so to cause receive data characters to be
offset by 1 data bi~ from transmitted characters. See notes q and 6 in section T2CS-NOTE5 for more info.
Transllit data
Receive data

Type 2 Scanner 1FT

2"

3P
flag

50

AO

7F

FE

00

00

1F
idle

13705GAA

6.1.33

IBH 3705 COHaONICATIONS CONTROLLER
TYPE 2 COftftUNICATlONS SCANNER 1FT SYHPTOH INDEX

D99-3705E-09

ROUT. ERROR FUNCTION TESTED
ERROR DESCRIPTION
CODE
All installed DLC line sets are tested in 8 bit mode (LCD:9) •
of the following error codes.

SUSPECXED CARD
FEALD FEXMM
LOCATION(S)
PAGE PAGE
The routine is run in sequence

COHH!NXS

165A

0101

Transmit of 1st pad(%'U')
character completed.

No level 2 or L2 not
from transmit line adr.

A3L2

TA611

1st level 2 cbarservice interrupt
after program set
scope scope sync 2.
See notes 1 & 2
at heading of
this routine for
registers & checks.

X65A

OX02

Transmit of 1st pad(X'AA')
character completed.

Transmit PCF not
LCD changed.

113F2

TA811

Xransmit PCF was se
to 8 by prog in
hardware setup.
CS hardware shOUld
have changed it
to 9. Should
now be '.n process
of transmitting
2nd pad. The
transllit PDF is
set to an offset
flag char after
this error. See
notes in
routine header.

X651

OX03

Transmit of 2nd pad(%'2A')
character completed.

No L2 or L2 not from
transmit line address.

13L2

TA611

2nd L2 after scope
sync 2. See routine
header for register
& checks. After tbi
error display the
the transmit PDP
is set vith X'3F'
flag character.

X651

OX04

Receive flag character
X'7E' •

No level 2 or L2 not
from transmit line address.

A3L2

TA6H

3rd L2 after scope
sync 2. See routine
header for register
& cbecks.

I65A

OX 05

Beceive flag character
l'7E'.

Receive LCD not .. 9 or
PCF not .. 6.

A3G2

TB021

Receiving a flag
char should change
PCF to 6.

1651

OX06

Receive flag character

ICW bits 0-3 or 5 are in
error.

113G2

n02l

lew bit 5 should be
on; bits 0-3
should be
off. Reg X'14'
: lew bits
0-15.

X651

OX07

9

Transmit of flag (X'3F')
character completed

NO level 2 or L2 not

01:

A3L2

TA611

4th L2 after scope
sync 2. See routine
header for register
& checks.

from transmit line address.

X65A

OX08

Receive data character 'AO'

No L2 or L2 not from
receive line address.

A3L2

TA611

5th L2 after scope
sync 2. See routine
beading for registe
6 checks.

X65A

0109

Receive data character 'AO'

The receive LCD was not=9 or
PCF not=7

A 3F2

uell

Reg X'14' contains
LCD in bits 0-3 and
PCP in bits 4-1

X651

OXOl

Receive data character '10'

The receive data not:X'AO' or
ICW bits 0-3 or 5 in error

113E2
A3P2

XA31l
TA121

lew bit 1 should be
on.. lCW bits 0,2,3
5 should be off.

X65A

OXOB

Transmit of data character
'50' completed

No level 2 or L2 not
from transmit line address.

A3L2

U611

6th L2 after scope
sync 2. See routine
header for register
& checks.

X65A

OXOC

Receive data character
• FE'

No level 2 or L2 not
from receive line address •

A3L2

TA611

7th L2 after scope
sync 2. See routine

6.1.34 X3105GH

/

Type 2 Scanner IPT

1
,{

o

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0

IBK 3705 COnKUIICiTIONS CONtROLLER
:11'E 2 ~OKKO"IC1TIO.S SCAINEB IPT SY"PTO~ INDEX
1

ROO'1'. ERROR PONCTION nS'rED
CODE

0'
0
0
0

o

1651

OXOD

Receive dat,a

PEltO I'E'm1l
PAGE PAGE

CO 1111 EHTS

16SA

OXOE

: i5A

1651

,'rE'

'I'll!'

TA3l'
'U121

See r~utine header
for regs.

Trans.it of data character
'7F' co.pleted

No level 2 or L2 not
fro. traDSdt line aelelress.

Alt2

'U611

8tb L2. See routine
header for register
r; checks.

OXOP

Receive data character
'00'

No level 2 or L2 not
fro. receive line address.

13t2

'1'1611

9th L2 after scope
sync 2. See routine
header for register
& checks.

OX10

Receive elata character
]['00' •

The receive data not-X'OO' or
ICW bits 0-3 or 5 in error

AlE2
A3P2

'U 121

'U311

See routine
header for regs.

13t2

'U611

10tb L2 after scope
sync 2.

13P2

'1'A811

Reg I"Q' byte 0 =L
in bits 0-3 & PCI' i
in bits ~-1.

A3G2

TB01'

ICII bit 0 sbould be
on. ICII bits 1.2.3
5 sbould be off.

X651

OX11

Receive idle character

Ho level 2 or L2 not
fro. receive line address.

1651

0112

Receive idle cbaracter.

The receive tCD not
not=7.

X651

0113

Receive idle character

1658

XXXX

DLC LCD B. 1. 8 :est. The first two installed lines that will run in DLC sode will be wrapped and tested
using tbe LCDs for 5.6 and 7 bit characters.
'1'he error stop checks to be .ade and the register contents to check are as indicated in Routine 165A
header.

0

=9

or pcr

ICII bits 0-3 or 5 are

in error.

'1'he transaitted cbaracters are offset by 1 bit position to cause receive data cbaracters to be offset by 1
elata bit position fro. tbe translitted cbaracters. See notes q and 6 in section '1'2CS-HOTES for sore info.

Il

o
o

q~",racter

UE2,
A.3P2

,,1

0
0
0
0

SUSPEC'1'I!D CABO
tOCATION IS)

rece1v~ dat-a not "XlrE'
or·,ICII bits 0-3 or 5 ill error

,[

"

EUOB DI!SCIII1'TIO.

header for regieter
& checks.

0,

0

1199-3105£-09

'l'rans.it Data - 5 bit (LCD=B) -AA
Received Datil - 5 bit (LCD-B) -

21

'1'rans.it Data - 6 bit (LCD:A) -u
Received Data - 6 bit (tCD:A)
Trans.it Data - 7 bit (LCD=B) -AA
Received Data - 7 bit (LCD-B) -

-

31'
flag

00
00

11

01'

21

31'
flag

00
00

38

2A

31'
flag

00
00

7B

11'

31'
flag

31'
11
3P

lP
flag

31'

31'
flag

3E

31'

7B

'1'he routine is run in sequence of tbe following error codes, first 10 5 bit 80de. then in
6 bit .ode and finally ill 1 bit 80de.
Ho level 2 or L2 not
fro. trans.it line adr.

13L2

'!'A61l

1st level 2 cbaract
service interrupt
after setting
scope sync 2.
See routine 165A
header for
registers 6 cbecks.

Tbe transllit PCI' not=9

A31'2

~A811

Transmit PCI' was se
to 8 by prog in
hardware setup.
'file CS hardware
sbould bave
changed it to 9.

~rans.it of 2nd pad
Character completed.

110 level 2 or L2 ves not
frol transd t line address.

13L2

'1'1611

2nd L2 after scope
sync 2. See routine
X65A beader for
regieters 6 cbecks.

OXOII

Receive flag character.

No level 2 or L2 not
fro. receive line~address.

A3L2

'!'A 6 t1

3rd t2 after scope
sync 2. See routine
X65A header for
registers 6 ~becks.

oxols

Receive flag character.

ReceiVe LCD not-9 or PCI' not-6
for receive line address.

13G2
&3P2

'l'1111
'U12l

See rtn 1651 beader
for registers
and checks.

165B

0101

~rans.it of 1st pad
cbaracter co.pleted.

X65B

0102

Transmit of 1st pad
character completed.

1658

OX03

X658

X658

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Type 2 Scanner 11''1'

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X3105Gll 6.1.35

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IBK 3705 COM~QNIC~TIONS CONTROLLER
TYPE 2 COMftONICATlONS SCANNER 1FT SYKPTOft INDEX
ROUT. ERROR FUNCTION TESTED
CODE
165B OX06 Receive flag character

D99- 37 05E- 09

ERROR DESCRIPTION

SUSPECTED CARD
LOCATION (5)

lCW bits 0-3 or 5 are
in error.

~3G2

FEUD FETMII
PAGE PAGE
n021

COIIIIENTS
ICW bit 2 should
be onlflag detl.
lCW bits 0,1,3
& 5 should be off.

1\658

OX 01

Transmit of flag character
cOllpleted.

No level 2 or L2 not
from transmit line address.

A3L2

TA611

4th L2 after scope
sync 2. See routine
X651. beader for
registers & check ••

X658

OX08

Receive data character X'OO'

No level 2 or L2 not
from receive line address.

A3L2

TAb11

5th L2 after scope
sync 2. See routine
X651 header for
registers & checks.

1656

0109

Receive data character 1'00'

The LCD changed or the PCF
is not"7.

13F2

TA811

See rtn 1651
note 1 for register
and checks. The LCD
was previously
sat for either 5,
6, or 7 bit mode.
Reg X'161 byte 0
contains expected
LCD and l'Cr.

1656

OXOl

Receive data char X'OO'

The received data is not=X' 00'
or ICW bits 0-3 or 5 are
in error.

A3E2
A3l'2

'U311
TAl21

ICW bit 1 should be
on. lCW bits 0,2,3
& 5 should be off.
50e routino 1651
he.der for
registers & cbecks.

X658

OXOB

Transmit data character X'OO'
completely transmitted.

No level 2 or L2 not
froll transmit line address.

13L2

'rl611

6th L2 atter scope
sync 2. Sea routine
165A header for
registers & cbecks.
After this error
display, the POl'
is set with data
character X'3F',
tbe disable stutfer
bit is set on,
the LCD is set
to 9 and the l'Cl'
is set to D.
This should cause
the transmit line
to send constant
DLC idle characters
without causing any
more L2 interr~pts.

165B

OXOC

Receive data char X'lE',
X'3E', or X'7E'.

L2 interrupt did not occur
or L2 not from the receive
line addreliis.

A3L2

TA611

7th L2 after
scope sync 2.
See Rtn X651
header for
registers and
checks.

X658

OXOD

Receive data char X'lE',
X' 3E' or l'7E'

The received data char
not as expected (X'lF' or
X'3F' or X'7F') or ICW bits
0-3 or 5 are in error.

A3P2
A3N2

TA 111

See routine 165A
header note 1 for
registers & checks.
Reg X'16'=
the expected lCW
bits 0 through 15.
ICW bit 1 should
be on, bits 0,2,
3 & 5 should be off

X65B

OXOE

Receive data char l'lE',
X'3E' or X'7E'.

6.1.36 X3705GAA

No L2 or L2 not from the
receive line address.

A3L2

U511

TA611

.,

f

"

8th L2. This is the
2nd time this char
is received. This
is actually a flag
char but due to
char boundry
alignment on the
5,6 or 7 bit chars
this is detected
as a data char.

Type 2 Scanner 1FT

(('. ~,

...

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}

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1811 3705 COIIIIQIIICATIOU COII'fROLLBa

TYPB

a COIIIIUHICATIOHS

SCAH •• I 1fT SYBPTOI IHD.l

aOUT. Baaoa FUIICTIOII USTBD
CODI
1658 010, Recei~e data char X'11' •
1'31' or X'1I'.

Baaoa DESCRIPTIO.

165B

aeceive data char X'11' •
1'3B' or X'lB'

The received data char
not as expected (X'1F' or
X'3F' or X'7r') or ICII bits
0-3 or 5 are in error.

Receive PCF not~7 or the
LCD ChaDged,"

SUSPBCTBD CARD
LOCUIOII'S)
13F2

FRUD FRUII

PAGB

PAGB

LCD 6 PCF should no
have changed. See
routine X651 header
for registers
and checks.

1312

TA 111
'U51,

See routine 165A
header note 1 for
registers 6 checks.
aeg X'16' contains
the expected ICN
bits 0 through 15.
ICW bit 1 should
be on.bits 0,2,3
B 5 sbould be Off.

0
OX10

0

UP2

0

0
0
0

1658

OX 11

Receive flag character.

Level 2 interrupt did not
occur or L2 was not from tbe
receiVe line address.

13L2

1'1611

9th L2 after
scope sync 2.
See Itn USA
header for register
and checks.

16SB

0112

Receive flag character.

Tbe LCD notag or PCF not=6
for receive line address.

13F2

TA811

See rtn X65A
for registers
and cbecks.

X658

OX 13

aeceive flag character.

ICI bits 0-3 or S are in error

13G2

1'801,

ICW bits 0,1 6 3
sbollld be off.
ICII bits 2
and 5 (DLC flag
detect) should be
on. See routine
165A beader.

1660

XXXX

DLC DAT1 lIaAP IllIZI IIODB. Tbe routine beader for routine 165A is valid for tbis routine except
for note 3. All DLC lines in this routine are tested in 8 bit aode.
Transaitted Data -

o
o

1A
2A
3F
01

00

00
00
aeceived Data

o

o

COIIIIEIITS

'UB"

for cloc~ correction.
for clock correction
a shifted flag character send with tbe 'disable stuffer' bit on.
after the low order bitea one bit) is sent frOB this character tbe
transmit SDF is cleared to zeros and the HBZI bit is set in the transmit
ICW by doing an output 1'46' with data of X'8000', The 'last line state'
bit is also set on when the one bit is being transmitted. FrOB tbis point
on all zero bits are serialized out of tbe SDF but due to the HRZI
circuits alternate data bits should be transBitted.
see coa.ents under the 01 character.
see cOB.ents under the 01 character.
see com.ents under the 01 character.

flag recognized from the transmitted X'3" plus the extra one bit.
AA alternate data bits received. Hote that the HaZI bit is not set on
for the receive line address,.
A1 alternate data bits received.
11 alternate data bits received.
11 alternate data bits received.
lA alternate data bits received~

This routine tests ability of CS to transait data in NBZI aode. Tbe transmitted and received
characters are offset to generate a predictable interrupt sequence. See notes q and 6 in
section T2CS-NOTBS for reason for tbis offset.
X660

OXOl

Transmit of first
character coap1eted.

No level 2 character service
interrupt occurred or level 2
vas not from the trans.it
line address.

A3L2

TA611

First character
service level 2 aft
program set
scope sync 2.
See Rtn X651 header
for registers and
otber checks.

1660

0102

Trans.it of first
character coapleted.

The transait PCF not=9 or
LCD not -9.

131'2

1'1811

The PCF was set
to 8 by the program
during setup and
sbou1d have been
changed to 9 by CS.

Type 2 Scanner, 1.1'

X3705GAA 6.1.31

IBft 3705 COaaUHICATIOHS CONTROLLEI
TYPE 2 COKKONICATIONS SCAHHBB 1FT SyaPTOS INDEI

ROOT. BRRoa PUICTION TISTED
CQPIl
UtiO 010) 1J1'~,ujIllH III ~IIII
ohataotet do.p1eied,

ERROR DBSCRIPTION

NO 1.,••

~

SU5l'1!CTED CABO

nAtO n'un

A1L2

fAfJ 11

~ cba,· ••
hteuapt atter
prograa set scope
sync 2. See routine
X65A beader for
registers 6 checks.

lAentoli I')

or L2 Rot

fro. trabs.it line address.

IIAGJ!

P&GB

CO II KI H'l:S

2nd 1.v.1

1660

OIOq

Receive flag character

No level 2 or L2 not
fro. ~eceive line add~ess.

A3L2

TA611

3rd level 2 char-sv
interrupt after
progra. set scope
sync 2. See routine
16SA beader for
registers & checks.

X660

OX05

Receive flag

cha~acte~

Receive LCD not=9
not=6

o~

A3P2
A3P2

'U111
TAa11

Beg X'1/1' byte 0=
LCD nil PCP.

1660

0106

Receive flag

characte~

ICW bits 0-3 or 5
in e~~o~.

a~e

A3G2

TB011

ICIi bits 2 ("har
overrun) and ICW
bit 5 (flag detect)
should be on.
Bits 0,1 I: 3
should be off.

1660

0107

Transmit of cha~acte~
X'3F' completed.

No L2 inte~~upt occu~red
or L2 was not from the
transmit line address.

13L2

TA611

qth level 2 char-sv
interrupt after
progtall set
scope sync 2. See
routine 165A header
for registers
anil checks.

1660

oxoa

Wait for Transmit or
receive line address to
cause a L2 intertllpt.

No L2 inte~rupt occurred
from either transmit or
receive line address.

A3L2

n611

1660

0109, Receive data character
X'AA'

L2 interrupt not from receive
line address.

A3L2

Tl\611

Beg X'lq' =
interrupting
line aildress.

X660

OIOA

Receive data character
X' AI.'

Receive LCD not=9 or PCP
not=1

A3P2
13P2

U 111
'r181,

Beg X'14'
byte 0 = LCD/PCl'.

1660

OX08

Receive data character
X'AA'

Receive data not"X'AA' or
ICII bits 0-3 or 5 are in error

A3G2
1362

TB02,
US11

Reg X' H'
byte 1 • PDP data
byte O"XCII bits
0-7. ICW bit
1 shollld be on.
ICII bits 0,2,3
& S sbould be off.

~660

OXOc

Bait for transmit or
receive line address to.
cause a L2 int~rrupt.

No L2 interrupt occurred
,,fljqm ·eithe~t tn·nstit or
receive line address.

A3L2

TA611

X660

OXOD

Receive data character
X'U'

The level 2 interrupt not
from receive line address.

A3L2

n611

Reg X'1Q' •
interrupting
line address.

1660

OXOE

Receive data character
X'lA'

Receive LCD not=9 or PCP
not"7

AlP2
A3P2

TA1ll
TA8H

Beg X'1q'
byte 0 " LCD/PCl'.

1660

OXOF

Receive data character
lPU'

aeceive data not-X'AA' or
ICIi bits 0-3 or 5 in error

A3G2
A3B2
A3P2

TB021
TA31'
US"

Reg 1'14'
byte 1 • PDP
DATA, BYTE 0ICW bits 0-7.
ICII bit 1 sbould
be on. ICIi bits
0,2,3 I: 5 sbould
be off.

PCP

1660

OX10

Bait for transmit or
receive line address to
cause a L2 interrupt.

Ho level 2 interrupt occurred
from either transmit or
receive line address.

13L2

TA611

1660

OX 11

Receive data character
X'AA' line address

Level 2 not fro. receive

A3L2

TA611

Reg X'1/1' ;:
interrupting
line adllress.

{,
6.1.38I3705GAA

Type 2 Scanner IPT

-------------- ------ ----_.

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leK 3705 COBaUHIC1TIO.~ CONTROLLER
TYPE 2 COBKUUICATIONS SCAHNIB IPT SyafTOH INDEX
!lOUT. BBBOB PUNCUON nSTED
CODB
X66Q 0112 Beceive data character
I'U'

0
0
0
0

o
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11\

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IRBOB DISCBIPTIOII

099-3105E- 09

Receive LCD lI,ot-9 or pcr
1I0t-l

SUSeBCTED CABO
tOC1'UOR (5)
13P2
13P2

FEUD l'BTIIK
PAGE PAGE
'1'1111
'1'1811

X660

0113

Beceive data cbaracter
X'U'

Receive data not=X'll' or
ICII bits 0-3 or 5 in error

1312
A3P2

'U511
TA 121

X660

01111

Wait tor translit or
receive line address to
cause a L2 interrupt.

Ho L2 illterrupt occurred
trol either the translit or
recei,e line aGdress.

l3L2

'1'1611

1660

0115

Beceive data cbaracter
X'U'

Level 2 not frol receive
line address

UL2

'U611

Reg X'111' •
interrupting
line address.

1660

0116

Beceive data character
I'AA'

Receive LCD not=9 or PCP
not=7

A3P2
13P2

TAl11
'flB'l

Beg X'14'
byte 0 .. lCD/PCl'.

1660

0117

Beceive data cbaracter
X'U'

Beceive data 1I0t-X'll' or
ICW bits 0-3 or 5 in error.

13B2
131'2

T15H
'U121

Beg 1'111'
byte 1 • PDP data.
ICW bit 1 shOUld
be on, ICII bits
0,2,3 6 5 should
not be on.

1660

OX1B

Wait for translit or
receive line address
to .cause L2 interrupt.

80 L2 interrupt occurred
trol either the translit or
receive 1ille address.

A3t2

TA611

See rtn beading for
registers and check
to be IIlde.

1660

0119

Beceive data charactsr
X'll'

Level 2 not from receive
lille address.

13L2

'lUll

Beg X'111' ..
interrupting.
Une address.

1660

OX 11

Beceive data character
X'U'

Beceive LCD lIot=9 or I'cr
not-7

131'2
U1'2

TA11t
TABH

Beg X'14'
byte 0 .. LCD/PCr.

X660

OX1B

Beceive data character
lPU'

Beceive data not"X'AA' or
ICII bits 0-3 or 5 in error.

13G2
13H2

'fB02t
TA511

Seg X'1'II' byte 1 ..
received data
(frail PDP). ICIl
bit 1 (BfC-reg)
should be on,
bits 0,2,3 6 5
should be off.

1660

0130

Transmit of data, character
X'OO' cOlp1ete.

Tbe translit LCD not=9 or
PCP not=9.

13P2

'UB"

Beg X'14' byte 0
LCD and PCP.
This error is in
a subroutine
COIIOD to
all transmit
interrupts
after initial
transllit
of X' 00'.

X662

XXXX

SYHCBBOHOUS IIONITOB 'lIST - When in synchronous monitor state (LCD=9, PCP.4 or ~ the scanner
is salp1ing tor an BBCDIC syn character, a DSASCII syn character or all OLC tlag character.
This routine tests that when a BBCDIC syn character is detected in the recei,e data streal,
the scanner sets the LCD to I'C', PCP to X'7' and that when a OSlSCII SYII character is detected
in the receive data strea., tbe scanner sets the LCD to X'D', PCP to x'7'.
The first installed line set pair that will run in DLC lode is wrapped. The set
lode is done betore setting the scope sync 2 as the pair of lines is wrapped. Any errors
detected during set lode are pretest errors and start with error code tXXX. These error
codes are near the end ot the SYlptO. index atter all routine error c04es.

Reg 1'14' byte 1 •
received data
froll PDP, byte 0
=ICII bits 0-7.
ICW bit 1 should
be on. ICII bits
0,2,3 6 5 should
be off.

o

o
o

o
e

COHIIl!NfS
Beg X'14' byte
o • LCD and PCl'.

Bote 1

, Type 2 Scanner IrT

On all error stops in this routine the following registers are set up:
Beg X'11' • franslit line set address
Reg X'13' a Receive line set address
Beg X'14' tor errors that indicate receive data is bad or ICW bits 0-3 or 5 are in error
• What was obtained by an ioput X'44' fro. the recei,e line ICW
ICW bits B-15 are the PDr and contains the receive data

X3705GU 6.1.39

i

IBK 3705 COKKUHtCA~10NS CONtROLLB!
2 CO""QHtCAtIOHS scaM.lft IPt SY"P~O" IHDII

DIIII- nODI-Oil

~YPB

nOll'!'. 1Ift1111. 'UNI:'1'101 TIIIUD
ClOIl.

JlIIIIPIIW'I'1I0 I:UII

lew bitl 0-' ate error and ooattol
ICW
ICV
ICW
ICV
ICI

bit
bit
bit
bit
bit

fla~1

nUll

nru

toCA'l'tuN IlIl
PAUJI Uti.
and ate defined .. follow II

COIIIIUTI

0 • Stop bit oheok/OLC idle deteot.
1 • Service request
2 a Cbaracter overrun
3 a Bode. cbeck
q ,. Receive line signal detectltbis bit is ignored
111 this test.)
lCN bit 5 = DLC flag detect/disable stuffer remember.
lCIl bit 6 Progra. flag(tbis bit is ignored in this test).
ICII bit 7 • PAD flag/disable stuffer(this bit is ignored
on the received data ~CV bits 0-15 testing)

Beg X'14' for errors that indicate tbe LCD or pcr is bad,
• ~he LCD in byte 0 bits 0-3, and pcr in byte 0 bits 4-7.
Tbe line is tested in 8 bit mode. Tbe transmitted cbaracters are offset fro. tbe received
characters. See note. 4 and 6 in section ~2cS-RO~ES for tbe reason tor this offset.
~ran .. it

Data
aeceive Data

1662

OXOl

Transmit of 1st cbaracter
X'AA' completed

1662

OX02

Transait of 1s'1'" char~ct'er
X'AA' coapleted.

X662

0103

'!ransait of 2nd character
X' 21' cOlpleted

1662

OX04

U62

AA

2A

19

19
32

OB

OB
16
A3L2

:rA611

1st level 2 interru
after scope
sync 2. Reg
X'14' .. 00 i f
no L2 occ\lrred;
Beg X'14' egual
interrupting addr
in error.
Beg X'11'· transmit
line adr. :

~3r~l,

'lAd 11

After'transllit
initial. the
scanner sbould ba,e
c~anged pcr to 9.

Ho level 2 character service
interrupt occurred froa
transait line or L2 interrupt
not froa trans.it line.

A3L2

'U611

2nd level 2 interru
after scope sync 2.
See co •• ents for th
OXOl error stop cod

Transait of 1st EBCDIC
syn cbaracter X'19'
coaplate4.

Ho level 2 interrupt or
level 2 interrupt not tro.
transait ad4re.s.

A3L2

TA611

3rd level 2 interru
after scope sync 2.
Sea cO.lents for th
OX01 arror stop cod

0105

Transmit of 1st BBCDIC
sfn character X'19'
co.pleted.

Translli t fcr not"9 or
LCD not .. 9.

13r2

'Ual'

Beg X'14' byte 0 ..
actual transait LCD
and pcr.

1662

0106

Beceive EBCDIC sfn
charactar X'32'

No level 2 interrupt froa
recei~e lina adr or intarrupt
fro. wrong line a4dress.

A3L2

TA611

Reg X'14'= 0000 if
no L2 occurred el.e
reg X'14- line edt
ICI interrupting in
error. Reg
X'13'=receive
line address.

1662

0107

Receive EBCDIC sfn
character X'32'

Receive LCD not=C or pcr
not" ".

13r2

T1261

Beg X'14' byte 0
LCD & pcr. Tbe CS
hard.are
sbould change
LCD to X'C'
wben e BBCDIC
SYH character
is recehed.

1662

OIOa

Receive EBCDIC syn
character X'32'

lCW bits 0-3 are in error
or data received in por
is not .. to X'321.

'fAS11
'fA 121

lCV bit 1 (sve-reg)
should be on and
lCI bits 0, 2, & 3
should be off. see
Rtn beader Dote ,.

6.1.110 X3705GU

level 2 cbaracter service
interrupt occurred fro.
translit line addr of L2
occurred but not fro.
trans,it line address.
80

'

'i.r~;l.nSait p!!r" not-g or
LCD not

= 9..

'

Type 2 Scanner IrT

,

/

=

('

(t
\

o
o·
o

IBI 3705 COIlUHICATIORS CONTBOLLBB
tiPI 2 COlftORICATIORS SC1.RIB IPT SiRPTO" INDIX

0
0

X662

OIDA

0

Transait of 1st DSACII
syn character X'OB'
coapleted.

1662

OXOB

0

X662

0

BOOT. IRBOB PDIICnOR TUTU
COOl
X662 0109 Transait of 2nd IBCDIC
syn character X'19'
coapleted.

IBBOB DBSCBIl'TIOR

D99-31058-09
SDSPECTID CABO
LOCA'UOIl (S)
UL2

FEUD PBTI$II
PAG8 UGB
'U611

10 L2 interrupt occurred froa
trans. it line or interrupt
occurred froa wrong line adr.

A3L2

T1611

See cOllent
for error
etop OX01_

Translit of 1st DS1CII
syn character X'OB'
cOlpleted.

TranBlit LCD not-9 or PCP·
not .. g

A3P2

TAB11

Beg X'll1' byte a
contains actual
LCD aod PCl'.

OXOC

Beceive DSACII sJnc
character X' 16'.

10 L2 interrupt occurred froa
receive line or interrupt
occurred froll wrong Une adr.•

UL2

n611

See COlDlent
for error
stop OX06.

1662

OXOD

Beceive OSlCII syn
character X' 16'

Beceive LCD not=D or pCP
not-7.

A3P2

'U261

Beg X'111' byte 0=
LCD S PCP. The CS
harGware sbould
change LCD to
D when OSACII
syn character
is received.

X662

OXOB

Beceive USACII sfn
character X' ,6'

Beceive line ICW bits 0-3
are in error or the received
data character in the PDP is
not· to X'16'.
.

1663

OXOI

Bnsure that IPCA BPQ Bit 39
lOOT X'II7' byte 1, bit 3)
can be set by issuing OUT
X'1I1' with that bit on.

III X'1I1' byte 0, bit 7 failed
to set.

AlG2

1663

OX02

Bnsure that IPCA BPQ Bit 39
IOU'r X' 47' byte 1, bit 3)
can be reset by issuing OUT
X'II1' with that bit off.

IN X'1I1' byte 0, bit 1 failed
to set.

1362

X664

OXOI

Bnsure that IPCl BPQ bit 39
lOUT 1[1111' byte 1, bit 3)
can be set by issuing OUT
X'1I1' with that bit on.

IH X'II1' byte 0, bit 1 failed
to set.

AlG2

Insure that disabling CSB
under test will reeet IPCA
BPQ bit 39.

I I U7' byte 0, bit 7 failed
to reset.

13G2

lIo L2 interrupt occurred froa
transait line or interrupt
occurred froa wrong line adr~

0

o
o

o
o
o
o
o
o

1665

XXXX

COIIIIBNTS
See COl lent
for error
stop OXOI.

ICW bit 1
(svc-req) should
be on, ICW bits 0,
2 and 3 should be
off. See rtn
heading note 1.

Synchronous line sets wrap data test for IPCl BPQ. III installed line addresses that run in synchronous
lode (even though they also run in start/stop aode and haye been already tested in routine SO) are wrapped
two at a tiae. The first installed synchronous line address is aade the receive line aDd the next installed
synchronous line address is aade the transait line. The test is perforaed on this pair of lines. When the
test is coapleted 00 this pair of lines, the lines are reset aDd the line that was the translit line is now
aade the receiYe line and the next installed synchronous line address is aade the new trsnsait line. This
pair of lines is then wrapped. This stepping through the lines is continued until the last installed
synchronous line bas beeD the transmit line. Then the first installed line is aade the translit line and
the last installed synchronous line is made the receive line and this pair of lines is wrapped. All the
installed synchronous line.sets are srapped with LCD=C and then the aboye procedure is repeated using LCD=D.
A set lIode is executed for both the transait aDd receive lines witb ICW bit 27 (diagnostiq wrap lode) and
ICW bit 29 (sync bit clockl on. Oscillator select bits are zeros to select the first oscillator.
The priority bits are set to 3. the set aode is executed before the setting of scope syne 2 as each
pair of lines is wrapped. The set lode must coaplete successfally for tbe wrap to function and any
errors detected during the set aode are pre-test errors and all start with error code 1XXX. These
error codes are located near tbe end of the sYlptoa index following the routine error codes. References to
level 2 interrupts in the following error code displays are the character service level 2 interrupts
that occur after scope SYDC 2 is set and do Dot include the level 2 interrupts that occurred for the
set aodes that occur before scope sync 2.
, 1I0t'e 1:

Type 2 Scanner 1FT

For
reg
reg
reg

all error stops in this routine, the fOllowing registers are setup:
X'11' • translit line address (as used to set lB1BI
X'13' - receive line address (as used to set IBlB)
X'1Q' for errors tbat indicate level 2 interrupt occurred frol wrong address

X3705GU 6.1.41

IBK 3705 COftftONIC1TIOHS CONTROLLER
TiPE 2 COftftUNIC1TIOHS SClNNER 1FT StIPTO! IDDEI
ROOT. ERROR POHCTIOH TESTED
COD!
reg

1>99-31115E-09

ERBOB DESCBIPTION
and

contai~s

SOSPECTED ClRD
LOCATION (S)
tbe line address tbat caused tbe L2 interrupt.

FElLD FlIUII

PAGE

PAGE

o

COIIIIEIiTS

for errors that indicate the received data is bad, or indicates that ICW bits
0-7 are in error and contains ICW bits 0-15 fro. the receive line ICW obtained
by executing Input X'~4'. ICW bits 8-15 (tbe PD') contain the
received data. ICW bits 0-7 are check and control tlags and are always
eJpected to be set as follows:
ICI bit 0 • Stop bit check and sbould be off
IC¥ bit 1 • Service re~uest and should be on
ICI bit a • Character overrun/underrun and .bould be off
,,1<;, bit 3 '" lIod81 check and should bp .off
,'
ICW bit _ • aeceive line signal detector~ This bit is ignored in this teat.
ICH bit 5· Beserved bit. Thia bit'is ignored in tbia teat.
ICI bit 6 • Progra. flag. Thia bit ia ignored in thia test.
ICI bit 7 • Pad flag. This bit is ignored in this test.
reg X'16' for errors that indicate tbe received data ia bad, and contains tbe eJpected ICW
blts 0-15 that are being tested against the cOntents of reg 1'14'.

Dote 2:

1'1~'

Cbecks to be made on all error stops:
a. Check LCD of failing line address. If LCD=P, a feedback cbeck has occurred.
If the configuration data set (CDSI erroneously indicates a line set is installed
that will run in synchronous .ode, a feedback cbeck will occur.
b. You aay use tbe continue function (except on pre-test errors atarting with 1)
to continue fro. tbis error to (1) see if just this line addreas is failing, (2) see if
all line addreses in this LIB are failing, or (3) see if all syncbronous lines are
failing. You aay get additional error atopa on the aa.e line pair being wrapped
so you may have to use the continue fUnction multiple timea. If only one
line set is failing, or a pair of even/od4 addresses, then the line aet
card is probably bad. If all addresses fail in one LIB, the LIB's bit clock
control card lay be bad, or the terlinators may be bad. If all syncbronous
line ad4resses fail, the scanner cards aa} be bad. If the line addressea are the
type that run in both synchronous and start/stop lode, and if they run
suc~essfully in routine 1652, then auspect LCD-C or LCD-I> circuitry or tbe
sync bit clock control line. Beference LIB card positions in
section c-xxx in FE!!! (LIBs and line setsl because card locations
vary in location according to tIB types.

!he transmitted characters are offset by 1 data bit to cause receive data characters to be offset
by 1 data bit froa transmitted characters. See notes 4 and 6 in section !2CS-RO!ES' for aore information.
!ransait I>ata

55
55
55

55
55
55

Beceive I>ata

Pl'
E9

16

FP

E9
16

'C

PC
7C

- Fp P9 01
53 79 01
2C 38 01
!he routine ia run in tbe sequence of
1665

0101

Transmit of 1st PlO
co.pleted.

1665

0102

Transait of 1st PAD
coapleted.

X665

0103

~rans.it

8 to 9.

6.1.. 112 13705GU

PCF changes fro.

00
00
00

(EBCDIC)
(SDLC-7)
(SST)

(EBCDIC)
(SOLC-7)
(SU)
tbe follolling error codes.

No level 2 interrupt
occurred from transmit
line address.

A3L2

TA611

B-310
B-260

1st level 2 charservice interrupt
after progra. aet
scope sync 2.
See notes 1 S 2
at heading of
this routine
for register
and cbecks to aake.

Level 2 interrupt not from
transmit line adr.

A3L2

TA611

B-300

See rtn heading
notes 1 and 2
for registers
anel checks
to aake.

Transmit PCP not· 9
Ot LCD changed.

A3F2

TA811

B-080

Transmit PC, was se
to 8 by p~ogra.
during hardware
setup. The scanner
hardware should
have changed
the' PC, to 9 and
should nOli be
in process of
traoslitting 2nd
pad cbaracter.
The transmit
PDP is set to
the 'st Stll
character after

Type 2 Scanner 1FT

\

C~i

~~ -----"~ ~--~--

o
o
o

o
o
o

----------------.----,-~

--_. __ . -_.

-~--

,._._--_._......_.. _,--_ ..-.-.",._-------_.

IBS 3705 COSRORICATIORS CONTROLLBR
TYPB 2 COSSORICATIORS SCARRBR IPT SYSPTOS IRDEI
ROOT. BRROR PORCTIOR TESTBD
co DB

D99-3705B-09

ERROR DESCRIPTIOR

SOSPEC'%BD CARD
LOCITZOII(S)

PEUD PBTIlIl
PIGE PAGE

CO IIIIE1lT S
this error
display. See notes
1 & 2 in heading
of this routine
for registers
and checks to aate.

1665

0104

Trans.it of 2nd PAD
coapleted.

10 le~el

2 interrupt
occurred froa transait
line adr.

A3L2

TA611

8-310
B-260

2nd L2 after
scope sync 2.
See notes 1 and
2 in heading of
this routine
for registers
and checks to aake.

1665

0105

Trans.it of 2nd PAD
coapleted.

Le~el 2 interrupt not froa
transait line address.

13L2

Tl611

B-300

See rtn heading
notes 1 and 2
for registers
and checks to aake.
After this error
display, the
transai t PDP is
set with the 2nd
SYII character'.

1665

0106

Tranuit of 1st SYI
coapleted.

10 le~el 2 interrupt
occurred froa transai 11
line address.

13L2

TA611

B-310
8-260

3rd L2 after
scope sync 2.
See notes 1 and 2
in the rtn heading
for registers
and checks to aake.

1665

0107

Transait of 1st SYII
coapleted.

Le~el 2 interrupt not froa
transait line address.

A3L2

TA6.,

8-300

See rtn heading
notes 1 and 2
for registers
and checks to aalte.
After this error
display, the
transait PDP is
set to character
l'AO' to be
transaitted n8Zt.
Should now be
in process of
trans.itting 2nd
SYR character.

1665

0108

Recei~e

'st SYI.

Recei~e line PCP not • 7
or LCD changed.

A3P2

TA811

8-080

liDe PCP «2
initially set to S.
When the 1st SYI
character is
recei~ed and
recognized the
hardware should
changed the recei~E
PCP=7. lote:
this setting
of PCP=7 fro.
PCP=5 does not
cause a l~el
2 interrupt. See
notes 1 & 2
in heading of
this routine
for re.!Jisters
and c~cks to aalte.

o

IE65

0109

Recei~e

2nd SYI.

13L2

Tl611

B-310
B-420

4th le~el 2 (1st £1
receiYe line
addr) after
scope sync 2. See
notes 1 & 2
in heading of
this routine
for registers
and checks to aake.

o
o

1665

A3L2

TA611

8-300

See rtn heading
notes 1 and 2

o

o
o
o
o
o
o
o

110

le~el 2 interrupt occurred
recei~e line address.

froa

OIOA

Recei~e

Type 2 Scanner IPT

2nd SYI.

Le~el 2
recei~e

interrupt not froa
line adr.

Recei~e

13705GAI 6.1.43

IBft 3105 CO~5UHICATIOHS CONTROLtER
TYPE 2 COftKUNICATIOHS SCAHBER 1fT SYftPTOK INDBX
ROUT. BRROR PUNCTION TESTBD
CODE

1665

OX08

Receive 2nd 5tH.

ERROR DBSCRIPTION

Received data in PDF not
a SYR cba:cacte:c, or IC'
bits 0-3 in e:cror.

D99-3105B-09

SUSPECTBD CABO
tOCUION IS)

1312
A3P2

PBALD PETIIII
PAGE PAGE

TA311
TA131

B-420

CO 1111 BN'I S
fo:c registers
and checks to lake.
Received data in PO
should be 1'32'
if LCD=C or
1'16' i f LCD-D.
See notes 1 6 2
in heading of
this routine
for registers,
ICI bits 0-1, and
checks' to aake.

1665

oxoc

Transmit of 2nd SYH
completed.

NO level 2 inter:cupt
occu:cred for t:canssit
line add:cess.

AlL2

U611

8-310
&-260

5th level 2 Illth fr
transmit line adr)
alte:c scope sync 2.
See notes 1 II 2
in heading of
this rOIlUne
for registers
and cbecks to lake.

X665

OXOD

Transsit of 2nd SYH
cospleted.

tevel 2 inte:c:cupt not f:com
transmit line ad:c.

13t2

T1611

8-l00

See rtn beading
notes 1 and 2
for registers
and checks to lake.
Afte:c this errOr
display, the
tun .. 1t PD. is
set to the
ne:1t character
to tunsa~t.

X665

OXOB

Second Receive cbaracter.

No level 2 interrupt occurred
fros the :ceceive addr.

13t2

T1611

8-310
8-420

6th level 2 interru
12nd fros receive
address) after
scope sync 2.
See potes 1 II 2
in heading of
this routine
for registers
and cheCks to lake.

. X665

OXOF

Second aeceive cbaracte:c.

tevel 2 interrupt not fros
receive line address.

A3t2

TA611

8-300

See rtn heading
notes 1 and 2
for J:8g1sters
and cbecks to sake.

1665

0110

Second Receive cba:cacte:c •

Received data in PDP not.
X'AO', or IC' bits 0-3 in
error.

A3B2
A3P2

TAll1
TA,31

&-420

See rtn heading
notes 1 and 2
for registers,
ICI bits 0-1,
and cbecks to lake.

1665

OX11

Transmit of second character
completed.

No level 2 occurred fo:c
translit line address.

13L 2

Tl611

1th level 2(Sth fro
translit lipe
addrl. See
notes 1 & 2
in heading of
this routine
for registers
and cbecks.

1665

0112

Transmit of second cha:cacter
coapleted.

Level 2 not f:col t:cans.it
line add:cees.

A3t2

'U611

See rtn beadin!!
notes 1 and 2
for registers
and cbecks.
After this error
display, the
trannit PDF is
set to 1'80' as
the next
cbaracter to
t~ans.it.
ShOUld
now be in p~ocess
of tranSilit Ung
the chatacter
1[11" •

6.1.411 13105GAA

Type 2 Scanner I.f

"

:.,

\
,~

'.

-,'

--------~.--~-

o
o
o
0
0
0
0
0
0
0

BOUT. BRBOR lUNCTIOII 'rESTED
CODE
OX21 Receive character X'01'.

X665

HO level 2 Qccurred froa
receive line address.

1)99-3705];-09

SUSPBCTED cAaD
LOCU1IOII (S)
A3L2
.

U61'

12th leyel 2(7th fr
receive line
addr). See notes
1 and 2 in beading
of this routine for
registers and check
Last 12 for
receive.

FEUD FBUR
FAGB

COIIIIUlTS

PlGB

0128

Receive character 1'01'.

Level 2 not from receive
line adllress.

A3L2

U611

See rtn heading
notes 1 and 2
for registers
and check8.

",665

0129

Receive character 1'01'.

Received data in PDl not.
X'II' or ICI bits 0-3 in
errQr.

13E2
UP2

TUII
T1U1

See rtn heading
notes 1 and 2
for registers,
ICII bits 0-7,
and checks.
After this error
display, the
receive pCl is
set to 0 so no
further level 2
interrupts should
occur from the
receiVe line
addr.

1665

Ol2A

Transait Qf 1'00'
cQapleted and transmit
tllrn-around.

HQ level 2 occurred frQm
transait line address.

A3L2

U611

13th L2 (IOtb froa
transait addr) and
is tbe last L2.
See notes 1 6 2
10 beading of
thi8 routine
for registers
and checks. I t
this tilDe tbe
transait E'C,
should bave
turned around
to PC'=5.

1665

OX28

Transait of X'OO'
completed and transait
turn-arollnd.

Level 2 not from transmit
line address.

13L2

TA611

See rtn beading
notes 1 and 2
for registers and
checks. E'Cl should
be turned around
to PCr-5.

1665

onc

Transait turn-arQllnd.

Transait PCl did not turn
UF2
around to PCl=S or LCD changed.

TA811

After previous
transmit leyel 2
(see error 0126)
transait PCl vas
set to I'D' to
cause a turnaround. The
hardware should
have coapleted
the transmission
of tbe character
1'00' and then
set E'Cl=5. See
notes 1 & 2
111 heading of
thie routine
for registers
and checks.

1666

XUI

Stop bit error test for all start/stop lines. All start/stop line addresses are tested to see if a stop bit
check can be detected. The lines are used in peirs with one line aade the receive line. This is the
line that should detect the stop bit check. The receive line is tested with LCD's of 0, 2, ~, 5, 6,
and 7. ~he trausait line always is setup with LCD a 1. A PAD character of X'03' is transaitted
followed by the Character 1'02'. When the 1'02' is heing transsitted, the prograa loops checking
transait SDl bits 8 and 9 for 00, then the transait SDl is set to X'180'. fhis should cause the
trans,it line to send extra bits of zero and cause the receive line *0 get a stop bit check.
fhe sequence of operation in this routin. is:

e

e

BBROB DBSCRIPTIOH

--~~~-

1665

e

0
0
0

._- -.- . - .. ------ ..--------- .. --- ..

18K 3105 COKKUNIC1TIONS CONTBOLLEB
TYPE 2 COKKUNIC1TIOHS SC1.RBa IlT StKPTOR INDEX

U
0
0

~--

Type 2 Scanner IlT

X370SGU 6.1.45

IeH 3105 COKHOHICATIONS CONTROLLER
TYPE 2 COftKONIC1TIONS SCANNER 1FT SYftPTOft INDEX

D99-3105E-09

ROUT. ERROR FUNCTION TESTED
ERROR DESCRIPTION
SUSPECTED CARD
CODE
LOCATION (SI
a. Reset scanner.
b. Enable scanner.
c. Set display bit in the receive lines ICW.
d. Set receive line address in receive mode.
e. Set lIode on the transmit line address.
f. Set transmit line 5D1=X'03'.(2 bit tilles of pad)
g. Set transmit line PDF=x'02 ' •
h. Set transmit PCF=8.
i. set scope sync 2.
j. Wait for level 2 interrupt on trans.it PAD character completed.
k. Wait for transllit SDF bits 8-9=0.
1. Set transmit SDFaX'180'.
II.
Wait for receive line address character service level 2 interrupt.
n. Check that 'stop bit check' bit is on in receive lines ICW.
o. Beset the 'stop bit check' bit.
p. Check that the bit reset.

FEUD FET!!!!
PAGE PAGE

COHIIEN'lS

.1

~

'~I...- j~'

The above sequence is done for LCD's 0, 2, 3, 4, 6, and 7 on the receive line address and then the
next start/stop line is setup and the whole test is run again, All lines use priority 3 and
oscillator select O.
Note,.

The
Reg
Rag
Rsg

following registers are setup for all errors displayed in this routine;
1'11' • Transmit line edr.
1'13' • Receive line edr; the adr that should detect tha stop bit errors.
1'16' • The LCD being tested on the receive line. (in byte 1, bits 0-3.1

Hate 2.

On all error stops', the LCD's should be checked for LCD=F (feedback cbeck). Iou can use
the continue function (except for pre-test errors during the set modesl to continue from
the error stop to see if (1) only one line set, (2) the wbole LIB, or (3) all start/stop line
sets in the scanner are failing, and if the failure is for one LCD setting or all LCD
settings. If only one line or one pair of lines is failing, suspect the line set
card as being bad. If all lines on a LIB fail, cbeck LIB cards and terminators. If
all of lines on scanner fail, or if only one LCD setting fails, suspect the scanner cards.
Reference LIB card positions in section c-xxx in FETIIH (LIBs and line setsl because card
locations vary according to LIB type. Other possible failures are that oscillator 0 is
failing or oscillator select is not working.

X666

OX01

Transmit of PAD completed.

No level 2 interrupt occurred.

A3L2

TA611

B-310
B-260

Reg X'11' ..
transmit line addr
expected to cause
L 2 interrupt.
See notes 1 & 2
in heading of
this routine for
other registers
& checks
to be aada.

X666

OX02

Transmit of PAD completed.

Level 2 interruFt not from
trans.it line address.

A3L2

U611

B-300

Reg X'11' "
transmit line addr
expected to cause
L2 interrupt.
Reg X'14' "
line adr that
caused the L2
interJ;upt.
See notes 1 & 2
in heading of
this routine for
other registers
& cbecks
to be made.

1666

OX03

Shifting of transmit SDP.

Transmit SOP bits 8 & 9 did
not get zeros shifted into
them within 200 ail1iseconds.

AlL2

TA611

8-480

See rtn beading
notes 1 and 2
for registers
and checks.
I f this failure
/1
occurs suggest
you run routines
X650 g 1652 to test"
diagnostic wrap.

X666

0104

Received character.

No level 2 interrupt occurred.

13L2

TA611

B-310
B-260

Beg X'13' =
receive line addr"
expected to cause
L 2 interrupt.
See notes
1 & 2 in heading
of this routine

6.1.46 X3705GAA

Type 2 Scanner 1FT

('

o
o
o
o

o

iBK 3105 COftftOHIC1TIO"~ CONTROLLER
TYPE 2 C08"UHICATIOHS SCANNER tFT SyftPTOft IIIDEX
ROOT. ERBOR PUNCTION TESnD
COOS

ERROR DESCRIPTION

D99- 3105E- 09

SUSPECTED CARD
LOCATtON(S)

nAtO PE'l'1I11
PAGB PAGB

A,,66

OX05

Received character.

tenl 2 lIIternpt not frail
receive lbe address.

I\3L2

'U6H

8-l00

Reg X'13' •
receiYe line addr
expected to cause
the L2 interrupt.
Reg X'111"Une
adr that
caused the L2.
See notes 162
in heading of
this routine for
other registers
II checks.

X666

OX06

Stop bit check bit on.

Stop bit checlt (tCI bit 0)
not on.

1\31'2

'fA 121

B-1110

Stop bit check
8hou14 be all
ill the receive line
ICII. See notes 1 6
ill hellding of
thls routine
for registers
II checks.

X666

OX07

Stop bit check hit off.

Stop bit check did not reset.

AlP2

'U121

8-180

Program IIttempted
to reset the
stop bit check
but it did not
reset. See
1I0tes 1 1\ 2 in
belliling of this
routine for
register8 lind
checks.

X668

XXXX

Pllil flllg test for stllrt/stop lines. Cbeck tbat wbile tbe PAD flag (ICI bit 7) is on lind the
trllnsmit PDPaX'pp', no charllcters lire receiYeil. Then turn the PAD flllg off lind check thllt
characters can be received. A pair of lines are used in each run of the test with one line
being the receive line and tbe other the trans.it line. All start/stop lines are testeil with
LCO=2, priority l, and oscillator select O. A set sode 1s executed for both tbe receive and
tbe transsit line. The receiYe line is set in receiYe sode, tbe transmit SOP is set to X'PP',
tbe trans.it PDP is set to X'05', the transsit PCP is set to X'8', and tben scope sync 2 is
set and tbe rest of the test runs in the salle sequence as the following error coiles. As eacb
test is f1nisbed, the next start/stop line address is used with the previous transmit line
and the test is ruo agaio. This contiDoes until all installed start/stop lines in the scanoer
under test are rlln in both trans.it and receive lode.
.

o

o
o
o
o
o

o

Bote 1:

Tbe followiog registers are setop for error displays:
Beg X'11'=Transsit line (ICM) address as used to set ABAR.
Beg X'13'=Receive line (ICH) address as ossd to set AB1R.
Re~ X'1~' for errors indicating level 2 interrupts fros wrong
address = the line address of tbe line that causeil
tbe level 2.
Beg X'1~' for uneKpected received data in the PDP or for errors that iodiclte
ICI bits 0-7 are in error. Contains ICW bits 0-15 fro. the receive line
ICI obtained by an Input X'411'.
Reg X'16'aExpected receive lines ICI bits 0-15 for receive datil
por errors, or ICW bits 0-7 error. Tbe receive ICW
bits 8-15 are the PDP, and byte 1 of botb reg X'111'
and reg x'16' should always be equal on all received
data tests. ICI bits 0-7 are norsally expected to =
X'q?' in reg X'1~1 (service reqnest bit on, 'receiye line
signal detect' bit ignored, all other bits off). Par telegraph
LIB's, ICW bits 0-7 lire not checked since ao echo
cbeck .ay occur setting lodel check if 110 external
current loop is present.

Hate 2:

Par all error stops, the LCD's shoulil be exallined for a feedback check; LCD-X'P'. rou
can use the continue function (except for set mode pre-test errors) to soe if
only this line address, a pair of line addresses, all lines in a LIB, or all lines
in the scanner are failing. If only one line, or a pair of lines is failing, saspect
the line set card. If all lines in a LIB are failing, suspect the LIB bit
clock control cllrd or line terlinators. If all lines in the scanner fail,
snspect scanner carils or first oscilllltor cllrd. See LIB card positions in
section c-xxx in rBT"! (LIBS lind lioe sets) because tbey yarJ according to LIB type.

o

o
o
o
o
o

COIlIlENTS
for otber
registers and
checks.

1668

OX01

Pirst PAD character
completely translitted.

Type 2 Scanner IPT

Ho levsl 2 interrupt occurred.
Expected frol trans.it line

A3L2

TA611

B-310
B-260

See rtn heading
notes 1 lind 2

X3705GAA 6.1.117

IBft 3705 COftftUHICATIONS CONTROLLEB
TYPS 2 COftftUNICATIONS SCAN.RB IPT SY.PTO! IHDEI
BOUT. EBBOB PURCTION TESTED
CODE

EBBOB DESCBIPTIOH
address.

D99-3705B-09

SUSPECTED CABD
tOCUION (51

P1GB

rEALD PET II II

COIIIIBNTS

flGB

for registers
and Checks. This
Ihould be 1st L2
interrupt aher
ICO pe ayllc 2.

1668

0102

Pirst PAD coapletely
transaUted.

Lsvel 2 interrupt not fro.
transait line address.

UL2

TA611

8-300

See rtn heading
notes 1 and 2
for registers
alld checks. lfter
this error display,
the transllit line's
pad flag is
turned on and
the PDP is set
to X'PP'. 1'05'
is being
tuns.itted.

X668

OX03

Beceive first cbaracter
of X'05'.

No level 2 interrupt occurred.
L2 interrupt expected from
receive line address.

13t2

T16"

8-3'0
B-1I20

See rtn heading
notes' and 2
for registers
ana checks.
This should be the
2nd level 2
interrupt (1st from
receive line adrl
after scope sync 2.

X669

OXOQ

Beceive first character
of X'05'.

Level 2 interrupt not fro.
receive line address.

A3t2

TA611

8-300

See rtn heading
notes' and 2
for registers
ana checks.

X669

OX05

Beceive first cbaracter
of 1105'.

Received data in PDP not •
1'05', or ICI bits 0-1 in
error.

A3E2
U1'2

TA3ll

8-1120

See rtn heading
notes , and 2
for registers, ICN
bits 0-7, & cbecks.

1669

OX06

Transait of 1'05'
coapleted.

Ho level 2 interrupt occurred.

A3L2

TA6',

11-310
B-260

See rtn heading
notes 1 and 2
for registers Ii
checks. This
should be 3d
level 2 interrupt,
2nd for transmit
line address.

1669

0107

Transait of X'05'
COllpleted.

Level 2 interrupt not from
transmit line address.

13L2

TA6"

8-300

See rtn heading
notes , and 2
for registers and
checks. After
this error
aisplay, the
tranuit line's
pad flag is
turned on and
the PDP is Bet
to X'PP'. Should
nov be
transmitting the
pad cha::acter
setup after error
display OX02 and
receive lille
should not be
receiving allY
data bits.

][668

OX09

Transllit of 2nd PAD
coapleted.

No level 2 interrupt occurred.

A3t2

TA611

8-310
8-260

See rtn heading
notes 1 and 2
for registets
and checks. ~his
is the Qth L2
(3rd froll transmit
line address).

IE68

OX 09

Transait of 2nd P1D
cOllpleted.

Level 2 interrupt not froll
transllit line address.

8_ 300

see rtn heading
notes 1 and 2

6.1.118 13705GU

TAU'

8-1120

Type 2 Scanner

Il'~

l

~----

o
o
o

IBK 3705 COKKOHIC1TIOIS COHtROLLER
tIPE 2 COKKOHICltIOIS SC1.lla ItT StftPTOK 11011

0

aOot. Eaaoa POICTIO. tlSTBD
CO!)I

BBaoa DBSCBIPTIOI

....

---,

D99-31058-09

SUUISCUD CUD
toCUtOIl(S)

PULD '1'1'l1li
PlOS

no.

0
-0
0
0

r.v1.to~. 104

lC668

OX 01

Pad flag reset.

Pad flag did not reset in
tunult ICW.

13B2

TA3',

8-180

See ttn,heading
notes , and 2
for registers
and cbecks.

1668

OXOB

Trans.it of ,3rd P1D
co.pleted.

10 level 2 interrupt occurred.

A3L2

T1611

8-310
8-260

See ttn heading
notes 1 and 2
for tegisters and
checks. This
should be the
,5th level 2
interrupt ,qth froll
ttansllit line adtl.

trans.it of 3rd PAD
co.pleted.

Level 2 interrupt fro. vrong
address. Expected a L2 fro.
transait 11ne address.

A3L2

TA6'1

8-300

See rtn beading
notes 1 and 2
for registers
and checks. lfter
this error display,
the transllit pad
flag is turned
on and the PDf
is set to X'P".
Sbould nov be '
in tbe, process of

0

o
o

X668

o

for

If tbo
1.2 interrupt
lias cauae by
the receive line ad
suspect that the
receive line vas
receiving data
hstead of the
pad character
that vas supposed
to be transllitted.
lfter this error
display. the pad
flag is turned
off and the
transait lIDP is
set to X'OE' as
the next
character to
trans.it. 1 pad
character should
1I0V be in the
ptOCess of
transaieeion.
GI.IGIlI.

0

o
o
o
o
o

COIlUlItl

I

OXOC

transa1tt~ng

character X' OB'.
I

X568

OXDP

Beceive character X'OE'.

X668

OX10

Receive character X'OE'.

Ho level 2 interrupt occurred.
Should have level 2 interrupt
fro. receive line address.

A3L2

TA611

8-310
8-Q20

See rtn heading
notes 1 and 2
for registers
and checks.
This should be the
6th level 2 interru
(the 2nd fro.
receive line adr).

Level 2 interrupt not fro.
line address.

llL:!

TA611

B-300

See rtn heading
notes 1 and 2
for registers
and checks. If the
level 2 interrupt
lias caused by the
trapsait line
ad4r the trlPslit
lines ICV lay ha,.
failed to recognize
the reset of the
pa4 flag after
error display 0109.

TA3"
'U 131

8-~20

See rtn heading
notea 1 and 2
for registers, lCW

~ecelve

X668

OX1,

Receive

type 2 Scanner IPT

charact.~

X'OE'.

Received data in PDP not
X'OE', or ICY bits 0-7 in
error.

X3705GAA 6.1. ~9

(J
tPft 3705 CO"ftUMICATtO_S CORTROLLBB
TIPB 2 COftKQHleATIOHS SCARNBR 1fT SYftPTOH IHDEX
aOOT" EIIROR lUlIcnoll nS'rED
CODI

ERROB DESCBIPTIO.

SOSPECTED CARD
LOCATION (5)

PEALD FEtHlI
PAGE flGE

X669

XXXX

Scanner priority test. Tbis routine tests tbat tbe priority between multiple scanners is correct.
If level 2 interrupts are pendinq frol lultiple Bcanners at tbe same tile tben tbe 1st scanner
sbould bave the highest priority, the 2nd scanner the next priority, etc. In this test the 1st ICW
of eacb installed scanner is aetup to have a level 2 interrupt pendinq by setting ICW bit 41. Tben
tbe proqral checks that tbe scanners interrupt in the correct sequence. The test is run using
priority select 3 for all tested scanners. !his test is not run if only one scanner is installed.
If tbis test detects failures you should lake sure that all preyious test routines bave run on all
scanners before fOU use tbis routine to try to isolate tbe problem.

1669

OX01

Scanner prioritf test.

Did not get leyel 2 interrupt
after all scanners were set
to cause a leyel 2 interrupt.

13L2

Leyel 2 interruft occurred
frol IIrong adr,. Req X'13'=
line adr expected to cause
t2 interrupt. Req 1"4'.
line addr.ess causing L2.

A3L2

:C1611

CO HII BIITS
bits 0-7, and
checks.

8-300

X669

OX02

Scanner priority test.
Scanner 1 bas bighest priority, scanner 2 next, scanner
3 next, and acanner 4 the
l~west priority.

X66B

XXXX

Character oyerrun and underrun test for start/stop lines. Check that character overruna on
the receive line and character underruns on tbe t~ans.it line can be detected and reset. All
start/stop lines are tested except for telegraph lines which cause an echo check
if no external current source is connected to the line. Tbe echo check
sets model check tbat suppresses the setting of service requeat. Overrun cannot be set when the
service reqQBst bit is off. 1 pair of start/stop lines are used in eacb
run of tbe test with one line made the receive line and one the transmit line.
As each test finishes, the next start/stop line is lade the transmit line and
the last translit line is made tbe receive line. This continues until all atart/atop
11nes have been both a transmit and a receive 11ne in the scanner under test. All lines are tested
witb tCO-2, priQrity=3, and oscillator select=O. A set mode is executed for the receiYe lins
and then tbe transmit line. The receive line is set ln receiYe mode. The transmit lins's
sor 1a Bet to x'rp', PDP to X'OA', and pCP=X'S'. Scope aync 2 is set, tben the routine
runs in tbe sequence of the followinq error display codes. The scanner is reset then enabled
and the above test is run on the next line. Tbis continues until all start/stop lines except
telegrapb bave been tested.
Hote1:

Bote 2:

X66E

OX01

B-300

See routine heading
Reg X'13'-line adr
t2 is expected fr08
See routine heading

Tbe following regiaters are setup fox error displays:
Reg X'11'-Translit line (ICII addreas as used to set lBA8.
Req X'13'-Becelve 11De (ICN) address as used to Bet ABAR.
Reg X'1~' for errors indicating level 2 interrupts fros wronq adr and contains
the address of the line that caused the level 2 interrupt.
Beq X' 1.' for Unexpected received data in the PDP or for errors that indicate
ICW bits 0-7 are in error. Contains ICN bits 0-15
fro. the receive line ICI obtained by an Input X'qq'.
Reg X'16'=Expected receive lines ICN bits 0-15 for received data,
PDP errors, or ICW bits 0-7 error. The receiYe ICW bits
8-15 are tbe PDP, and byte 1 of both reg X'14' and req
X'16' should alwaya be equal on all received data teats.
ICW bita 0-7 are expected to be • to I'q?' in reg X'1Q'
(service request on, 'receive line algnal detect' iqnored, all
other bits off). The exception to ICW bits 0-7 occurs when
an OYerrun is created. The service request bit (ICW
bit 1) should be off and character overrun bit (ICW bit
2) should be on.

f

,-

/

\ ... - j

For all error stops, the LCD's should be examined for a feedback check; LCD-X'P'.
You can use the continue function (except for set mode pre-test errors) to
aee if only this line address, a pair of line addresses, all lines in a LIB, or
all lines in the scanner are failing. If only one line, or a pair of lines, is failing,
suspect the line set card. If all lines in a LIB are failing, suspect the
LIB bit clock control card or line terminators. If all lines in the scanner fail, suspect
tbe scanner cards or first oscillator card. See LIB card positions in section c-xxx
(LIBs and line aets) because they yary according to LIB type.

Completed transmit of
PAD character.

6.1.50 X3705GAA

'lA611

()

No leyel 2 interrupt occurred. A3L2
Should have bad a L2 interrupt
from the transmit line address.

TA6.1

8-310
B- 260

See rtn heading
notes 1 aDd 2
for registers
and checks.
This should be the
1st L2 interrupt
after program set
scope sync 2.

Type 2 Scanner 1FT

( "
\
,",,/
{-,
_

(

t

(

>.

----,._- _..

o
o
o
o

o
o

18K 3705
~tPB

COKKURlc~TIORS

a COKKUaICA~IoaS

~.

._,._._------

-_._-_. __ ..,--_ ... ,-------_.. __

1199-3105B-09

CO.TBO~L.a

SCARRBR 1FT StKPTOR IRDil
SOSPECTED CARD
~OCnIOIl (5)

EBBOB DBSCRIPTIO.
Level 2 interrupt not fro.
trans.it line address.

13L2

'Ufill

i-300

see rtn heading
notes 1 and 2
fot tegistets
and cbecks.

1668

0103

Co.pleted trans.it of
PAD character.

Trans. it line PCP did not
change to 9.

A3P2

TAB1'

8-0BO

See rtn heading
notes 1 and 2
for tegisters and
checks. progral
sets transmit
PCP-B during
har/hlate setup.
Bardware
should have
cbanged the PCP to
9 as 1st
charactet is
transdtted.
Uter this
error display,
the tunu1t
PDP is set to
X'Ol' as the
next character
to be transmitted.
ShOUld 11011 be
ill pto'C'es's of
transd tt:l.ng
char X'OA'.

X668

OXO'

Receive bharacter X'OA'.

10

A3L 2

TA6"

&-490

See notes 1 & 2
in heading of
th:l.s tout:l.ne fot
regiaters and
checks. This
shollld he' the
2nd level 2
iDtertupt (1st
fro. teceive l1ne
address) •

%66B

0%05

Receive character X'Ol'.

Level 2 interrupt not fro.
receive line address.

A3L2

TA6l1

&-300

See rtn headin~
notes 1 and 2
fot registus
and checks.

X66B

OX06

Receive cbaracter X'OA'.

Received data in PDP not •
X'OA', or ICV bits 0-7 in
errot.

A3!2
A3p2

TA3',
TAt31

&-490

See rtll heading
notes 1 and 2
fot reg1steu
and cheCkS.
Service- request
bit is not teset
after this error
display, so \
next tsceived
charactet should
cause a character
overrun.

166B

0107

co.pleted trans.1ssion
of X'OA'.

NO level 2 1ntetrupt
occllrred. Should have
had a L2 1ntertupt from
ttans.it line addtess.

13L2

~1611

8-310
8-260

See rtn heading
notes 1 and 2
for registets
and checks
This should be the
3rd ~2 interrupi
iDterrupt (2nd
fro. transmit line
address).

166B

OX08

Co.pleted transmission
of X'OA'.

Level 2 intetrupt not fto.
transait line address.

A3L2

~A6'1

&-300

See rtn beading
notes 1 and 2
for registers and
checks. Afier
this error
display. the
transmit PDP
is set to l'OB'
as the next charact
to be transmitted.
Service reguest bit

PElLD PEUIS
PAGE PlG!

o

o
o
o

o
o
o
o
o

COIIIII!IlTS

BOOT. ERBOR FOBCTIOR TES~ED
CODE
OX02 'co.pleted trans.it of
P1D character.

1668

o
Type 2 Scanner 1FT

level 2 in terr upt occllrred,.

13705GAA 6.1.51

IBH 3705 COKMUNICAT10NS CONTROLLER
TYPE 2 COftftUHICAT10NS SCANNER 1FT sYftPTOn INDEX
ROUT. ERROR FUNCTION TESTED
CODE

ERROR DESCRIPTION

099-3705E-09

I{··~
SUSPECTED CARD
LOCATION (5)

FEALD l'ETIII!
PAGE PAGE

is not reset
so the next
trans.1 t level
2 interrupt
should set the
character
underrun bit.
Should now be
in the process
of transmitting
the character
1'01'.

166E

0109

Receive character 1'01'
and get character
overrun.

No level 2 interrupt
occurred. Should have a
t2 interrupt froll reoeive
line address.

A3L2

TA611

B-490

See rtn heading
notes 1 and 2
for registers
and ohecks.
This should be 4th
L2 (2nd from
receive line
Ildr). Check reg
1'44'; ICII bit 2
(character
overrun bit)
should be on
in receive line,
ICH bit 1 (service
request) should
be off and PDP
should contain
X'01'. If you (1)
display reg
1'40', (2)
store tbe receive
line adr
and (3) display
reg X'44' (ICIl
bits 0- 15), the
PDP should now
= I'OE' since
the trans.it
line is still
sending characters
I' OE' and the
receive line
should be
receiving the
character and
setting overrun.

166E

OIOA

Receive character X'Ol' and
get character overrun.

Level 2 interrupt not fro.
receive line adr.

A3L2

TA611

8-300

See comments on
previous error 0109

X66E

OIOB

Received character X'Ol' &
get character overrun.

Character overrun (ICW bit
2) not on, or service request
(ICII bit 1) is on, or PDF
(ICW bits 8-15) not = 1'01'.

A3P2

TA611

8-490
8-140

Rec ICH bit 2
should be on.
See error stop code
OX09. Reg X'14'= th
receive ICA bits
0-15 obtained via a
input I' 44' •

X66E

OXOC

Reset of ICW bit 2.

ICW bit 2 (character overrun)
did not reset,.

AlP2

TA611

B-180

See rtn beadiug
notes 1 and 2
for registers
and checks.

X66E

OXOD

Transmit of X'01'
completed and
transmit underrun.

No level 2 interrupt occurred.
Should have had a L2 interrupt
from transmit line address.

A3L2

TA611

8-310
B-260

See rtn heading
notes 1 and 2
for registers
and checks.
This ahould be 5th
level 2 interrupt
(3rd from transmitl

X66E

OXOE

Transmit of X'Ol'
completed and
transmit underrun.

Level 2 interrupt not from
transmit line address.

A3L2

TA611

B-300

See rtn heading
notes 1 and 2
for registers
and cbecks.

6.1.52 X3705GAA

~

COIIIIENTS

Type 2 Scanner 1FT

'C.

(

o
o
o

IBK 3705 COaHQRICATIOHS CONTROLLER
TYfB 2 cOHftUnlcATloHS SCA.HBa 1FT SYftPTOK INDEX

0
0
0;

X66B

aOUT~

Buoa POlIcnOR TESTED
CODE
OXOF Trans-it underrun.

~BRBOB

~9-3705B-O~

DBSCRIPTION

Onderrun (ICW bit 2) not on
in transmit lines ICW.
(Should be on.)

SOSfECTEI> CARD
LOCATION (5)
A3P2

PEALD PETHI!
fAGE PAGE
TA121 8-3'0
8-,110

0

0
0
0

X66B

0110

Reset of transait underrun.

X672

XUX

Character overrun and underrun test for synchronous lines. All synchronous lines are checked to ensure
that character overrun can be detected on receive lines and character underrun can be detected
on transmit lines. All lines are tested with LCI>=C, priority=3, and oscillator select=O.
Bach pair of lines is setup by (1) setting the display bit in the receive line, (2) e~ecuting set mode on
the receive line, (3) setting the receive line PCPaS, (4) e~ecuting set mode on the trans.it line, (5)
setting transmit SDP and PDF to X'SS', (6) setting transmit PCP=8, and (7) setting scope sync 2. Tbe rest of
the test is run in the same sequence as the error codes that follow. IIhen the test is finished
on a pair of lines, the scanner is disabled then enabled, the next synchronous line address is made
the new transait line and the last transait line is made the new receive line and ~be Whole test
is run again. This is continued until all synchronous lines have been tested botb as transmit
and receive lines.

U
0
0
0

e

e
e

Onderrun bit (ICW bit 2) did
not reset in transmit lines
ICII.

A3P2

'rA121

B-180

1I0te 1:

The following registers ara setup for etror displays:
Beg 1'11'.TransBit line (ICM) address as used to set ABAK.
Beg 1'13'.Receive line (IC8) address as used to set ABAR.
Reg 1'14' for errors indicating level 2 intertupts from wrong adr and contains
the address of tbe line tbat caused tbe leyel 2 interrupt.
Beg 1'14' for unexpected received data in tbe PDP or fot errors that indicate tbat
ICM bits 0-7 ate in error. Contains ICV bits 0-15 from tbe receive line ICII
obtained by an Input 1' __ '.
'
Beg X'1"~Expected receive lines IC8 bits 0-15 for received data,
PDP errors, or ICI bits 0-7 error. Tbe receive ICW bits
8-15 are the PDP, and byte 1 of both reg X'14' and reg
1'16' should always be equal on all receiyed data tests.
ICV bits 0·7 are expected to be: bit 1(sve-reg) on,
bits 0,2,3,5,6 & 7 off; bit 4 ignored.
The exception to IC8 bits 0-7 being as aboye is when
an oyer run is created. The service reguest bit (ICV
bit 1) should be off and character oyerrun bit (ICI bit
2) should be on.

Dote 2:

Por all error stops, the LCD's should be examined for a feedback cbeck; LCD=I'P'.
You can use the continue function (except for set a04e pre-test errors) to
see if only this line addtess, a pair of line addresses, all lines in a LIB, or
all linea in the scanner are failing. If only one line, or a pair of 11nes, is failing,
SIiSpeCt the line set card,. If all lines in a LIB are fai11ng, suspect the
LIB bit clock control card or line terminators. If all lines in the scanner fail,
suspect the scanner cards or first oscillator card. See LIB card positions in
in section C·XXX in PET II I! (LIBs and 11ne sets) because they vary ,accotding to LIB type.

Hote 3:

See note 6 in section T2CS-Notes for explanation fOJ; the shifted SYII and data cbars,.

I

0
0

COHIIENTS
See rtn beading
notes 1 and 2
for registers
ana checks.
After error display
OX08 on last
transmit character
service L2, the
service request
bit was not
reset so when
tbis v.:anSllit
level 2 interrupt
occurred, the
character underrun
bit should have
been set on
by hardware.

1672

OX01

Transait 1st pad (X' 55' )
cOBpleted.

BO level 2 interrupt occurred.

A3L2

TA611

See notes 1 & 2
in heading of
this routine for
registers and
checks. 1st
level 2 (from
trallsmit) after
scope sync 2.

X672

OX02

!ransait 1st pad (1'55')
completed.

Level 2 not frOB transmit
line adr.

13L2

'rA611

See rtn beading
heading of

Type 2 Scanner 1FT

1370SGU 6.1.53

IRK 3105 COH"DHIC1~IONS COHTRO~LEB
~lPB 2 COKKDNIC1TIONS SCANMER lrT SYHP~OK INDEX
ROU~.

ERROR 'fUNCTION TESTED

D99-3705E-09

ERROR DESCRIPTIOH

)~ODE

SUSfECTED CARD
LOCATION (S)

FEl'ILD UTilI!

PAGE

COIlIlENTS

PlGE

t hi s routine
for registers
& checks.

pcr went to

1672

OX03

Trans.it

1612

OXOq

Trans.it 2nd pad (1'55')
cOllpleted.

X612

OXOS

1612

0106

9.

Transmit

pcr did not go to 9.

13F2

TAe"

See rtn heading
heading of
this routine
for registers and
checks. Program
set PCF=8 in
hardware setup
and hardware
shoUld have changed
the PCF to 9.
lfter this error
display, the
transmit PDF is
set to X' 19 I
(shifted sync char)
and service
.
request is reset.

No level 2 interrupt occurred.

13L2

TA611

See rtn beading
heading of
this routine
for registers and
checks. 2nd
level 2 (2nd
from transmit)
after scope
sync 2.

Transmit 2nd pad (1'55')
cOllpleted.

Level 2 not fro. transmit
line adr.

A3L2

TA611

See notes 1 & 2
in heading of
this routine for
registers and
checks. After
this error
display, the
translRit PDP is
set with the 2nd
shifted sync char
(X'19') and
service request
is reset. Should
now be in process
of transmit t!ng
the 1st sync
character •

Transllit 1st sync (X'19')
co.plated.

No level 2 interrupt occurred.

A;L2

TlG11

1672

OX07

Transmit 1st sync (1'19')
cOllpleted.

Level 2 not from transmit
line adr.

13L2

TA6"

X672

OX08

Receive line detected
1st SIN.

Receive line's PCP not ;7.

13F2

TA811

6.1.Sq X3105GAA

• See rtn beading
heading of
this routine tor
registers lind
checks. 3rd
level 2 (3rd
from trann! t).
See notes 1 & 2
in heading of
this routine
tor registers
& checks.
After this error
display, the
transmit lines
PDF is set to
character 1'50'
!lnd service
reguest is reset.
Should DOV be
in process of
transmitting the
2nd sync
character.
8-080

~¥pe

~her rec addr
PCF vas set
to 5 by the
progum during

2 Scanner

IF~

!.

o
o

o
o
o

IBft 3105 COHftUNICATIONS CONTROLLBR
TiP! a COftftUNICATIONS SCANNER IPT SYftPTOft INDEX
BOUT.. BBROR FUNCTION TEsnD
CODE

ERROR DESCRIPTION

D99-37058-09
SUSPECTBD CARD
LOCATION (SI

FEALD PETftft
PAGB PAGE

hardware setup
bllt the 1st SYN
character sbould
have been
received and
detected by the
hardware and
caused the PCP
to be changed to 7.
Note: no
level 2 interruFt
should result
from changin'l
PCl'=5 to PCF=7.
See notes 1 & 2
in heading of
this routine
for registers
& checks.

o
o

o
o
o

C

X612

OX09

Receive line
2nd SIN.

X612

OXOA

X612

~eceiyed

Ho level 2 interrupt occurred.

A3L2

TA611

B-310
8-Q20

See rtn heading
heading of
this routine for
registers and
checks. Qth
level 2 interrupt
(1st fro. receive).

Receive line received
2nd SU.

Level 2 interrupt not from
receive line address.

A3L2

T1611

8-300

See rtn beading
heading of
this routine
for registers
Ii checks.

OXOB

Receive line received
2nd SYH.

Received data in· receive line
PDF not a SYN character
(1'32',. or ICW bits 0-1 in
error.

A3E2
A3P2

TA3ll
TA131

B-240

See rto heading
notes 1 and 2
for registers, leW
bits 0-7 and
checks to .&ke. .
Service reguest bit
is not set off in
the receive line
ICII so the next
receive line level
2 interrupt should
indicate character
overrlln.

1612

OXOC

Trans.it of 2nd SIN
completed.

No level 2 interrupt occurred.

A3L2

TA61'

8-310
8-260

See rtn heading
heading of
this routine for
registers and
chech. 5th
level 2 interrupt
(qtb from trans lit)

1612

OXOD

Transmit of 2nd SY"
completed.

Level 2 interrupt not from
transmit line address.

A3L2

TA6"

8-300

See rtn beading
heading of
this routine for
registers and
checks. After
this error display,
the transmit line's
PDF is set to
X'OO'. The
service reguest
bit is not reset.
On the nezt level
2 interrupt for
the transmit line
address a charact8r
underrun error
should be
indicated. Should
nOli be in the
process of
transmitting the
char X'SO'.

'.

-fr:
'···.·I

:1

,

o

o
o

COHftENTS

o

o
o
Type 2 Scanner 1FT

X3705GAA

6.1.55

( l.'
'\.'
IBM 3705 CO"~UNICATIONS CQ"TBO~LEB
2 eOftftO~lCATIONS SCANNER 1FT SYH~TO" INDEX

1l99-370SE-09

TY~E

ROUT. ERROR PUNCTION TESTED
CODE
OXOE Receive character X'lO' and
get character overrun.

X672

1672 OXOP

Receive character X'AO' and
get character overrun.

ERBOB DESCBIPTION

No level 2 interrupt occurred.

Level 2 interrupt not from
receive line adr.

SUSPECTED CARD
LOCATION {S}
A1L2

1.3L2

PEALD FETIIII
PAGE

Tl\611

TA611

COIIIIENTS

PAGE

B-310
B-420

B-300

See rtn beading
beading of
this routine for
reg iaters and
checks. Beg
X' qq' contains
the receive line's
ICII bits 0-15.
lCIi bits 8-15
are the POl' and
should=X' AO'.
lCII bit 2
(character
ovenuD) should
be on since
service request
(ICW bit 1) was
not reset on
the last receive
1 ine level 2
interrupt. lCi
bit , (ccrvice
request) should
be off since
hardware sbould
turn it ott when
it turns on leW
bit 2. This is
the 6th level
2 interrupt (2nd
from receive).
See notes 1 & 2
in heading of
this routine for
registers and
checks. Reg
X·qq· contains
the receive line's
lCW bits 0-15.
ICW bits 8-15
are the PDF and
should .. X' 10'.
leW bit 2

(character
overrun) should
be on since
service reguest
(ICN bi t 1) was
not reset on
the last receive
line level 2
interrupt. lCW
bit 1 (service
request) should
be off since
bardvue should
turn it off when
it tu,llS on ICI!
bit 2.
X672

OX10

Receive character X'lO' and
get character overrun.

Character overrun (lCW pit
2) is not on, or service
request {ICW bit 1} is on,
or PDP not = X'AO' in
receive line's ICII.

131'2

TA121

B-q20
B-1qO

See comments
under error OIOF.

X672

OX',

Character overrun reset.

Character overrun (ICW bit 2)
did not reset.

A31'2

TA121

8-180

Program attempted
to reset character
overrun and then
checked to malte
sure it vas off.
See notes 1 & 2
in heading of
thiS routine
for registers
& checks.

6.1.56 X3705GAA

()

Type 2 Scanner 1FT

'"

;

o
o

IBM 3705 COKKUNICATIONS CONTBOLLE8
TYPS 2 COKKUNICATIONS SCANME8 lFT SYKPTOK lNDEX
ROUT.• ERROR

Level 2 not from transmit
line address.

A3L2

tA611

See notes 1 & 2 in
the beading of
this routine for
registers and
checks. The
trans.it line's
lCW sboula have
t he character
underrun bit on
(ICW bit 2)
since the service
request bit lias
not reset on the
last transmit
level 2 interrupt.

Transmit of 1'50' completed
and character underrun.

The character underrun bit
(ICW bit 2) is not on but
should be.

13P2

tA12l

See notes 1 & 2 in
notes 1 and 2
for registers &
checks. the
transmit
line's ICW
should have
the character
under run bit on
(ICN bit 1)
since the service
request bit was
not reset on tbe
last transmit
level 2 interrupt.

0115

Beset underrun.

The character underrun bit
did not reset.

A3P2

tA121

X675

XXXX

Force level 1 cbeck test. Checks that an Output X'Q3' with byte 0, bit 0 and byte 1, bit 5 on forces the
check bits on in the scanner cbeck register (Input 1'43'). Then checks that an Output 1'43' with byte 0, bit
, and byte 1, bit 5 on resets the check bits. the scanner is disabled ('CSB disable' latCh is set) then
enabled ('csa disable' latch turned oft). then lB1B is set with an output x'40', scope sync 2 is set and an
Output X'43' is done with byte 0, bit 0 and byte 1, bit 5 on.
The rest of the test is run in the same
sequence as the following error codes.

X675

OXOl

Scanner check register
bits on.

o

o
o
o
o
o

X672

u

Transmit of 1'50'
complete .nd character
underrun.

No level 2 interrupt occurred.

0113

transmit of 1'50' completed
and Character underrun.

1672

OX14

1672

o

o

Eaaoa DBSCRIPtION

PAGE PAGE
'rA611

CODE
0112

o
o
o

TES'rED

CARD
LOCATION (51
A3L2

1672

o
o

FUNCTION

099- 3105E-09

type 2 Scanner 1FT

All check bits not on.

SUSPBctED

A3C2

FEUD FEtIlIl

Tel31

B-180

B-170
B-130

COIIIIENTS
See rtn heading
notes 1 and 2
for registers and
checks. Should
have transmit
line's lCW bit 2
on (underrun)
since tbe service
request bit was
not reset on
the last transmit
level 2 interrupt.
7th level 2 15th
from transmit).

See notes 1 6 2
in heading of
this routine for
registers and
checks. The
program attempted
to reset the
character underIun
bit ill the
translit ICW
and then checked
and found tbe bit
lias still on.

Req X'14 ' =
the scanner
check register
bits obtained by
an Input X' 43'.
Byte 0, bit 0-7
and byte 1,
bits 0-3 should
all be aD.
Note: level 1

13705GAA 6.1.51

IBK 3705 COMMUNICATIONS CONTROLLER
TYPE 2 COKKUNIClTIONS SCANNER 1FT SYKPTOK INDEX
ROUT. ERROR FUNCTION TESTED
COD!,

'..

D99-3105E-09

ERBOa DESCI1U'TIOIi

SUSPECTED CARD
LOCA'fIOIl (S)

FEALD FETHK
PAGB

"

COIIHENTS

PAGE
a~apter chock.
lIere uske~ off

so the normal
level , adapter
check that shoul~
occur is blocked
at this time.
Reg X'11'= line adr
of scanner onder
test as used to
set ABAR. After thi
error display, ABAR
is set again and
another output
1'113' executed with
byte 0, bit 1 and
byte 1, bit
5 on to reset the
scanner check reg
bits.
X615

0102

Scanner check register reset.

All check bits not reset.

A3C2

TB131

B-140
8-130

All scanner check r
bits shculd be rese
Reg X'14' contains
the scanner check
reg obtained by
an Input X' 43'.
Reg X' 11' = line
addr of scanner
under test set in
lBU. After this
error display,
output I'Q3' is
executed again to
Bet the BCllnnlr
chock reg bits on.
Then adaptor level
1 interrupts are
unusked and a
check is .ade
that a level
actually occurred.

,

X615

OX03

Scanner check register
causes level 1 interrupt.

No level 1 interrupt occurred.

A3C2

TB131

B-130

A level 1 interrupt
should have occurre
for scanner under
test. Reg X'11'=
line addr set in
AllAR..

X615

OX04

Scanner under test caused
the Ll interrupt.

The Scanner under test was not
the scanner that caused the
level 1 interrupt.

A3C2

tB131

B-300

Reg X'14'=line
addr causing the L1
intenupt. Rell
X' 11 ' aquilla
11ne kddr ot Bcanna
under test.

X618

XXXX

Modem error bit test,. This routine tests that the modem error bit (ICII bit 3) is set according
to the modem interface lines of Data set Ready (DSR) and/or Clear To Send ICTS). only one error
stop can occur in this routine with Register 1'15' indicating the failure. If Reg 1'15'=0001
then the error is that the modem check bit did not come on with DSR off and a PCF of 5, 1, 8, 9,
A, B, C, or no If Reg. 1'15'=0002 the error is that the lodel error bit is not on with CTS off
and a PCF of 9, A, B, or D. Reg X'13' contains the contents of tbe display reg obtained by an
input X'46' vith bit 0.0 being CTS and 0.2-DSR.
,
Beg. X'11' contains line (leW) address of line under test.
Reg. X'14' contains ICW bits 0-15 with bit 0.. 3 being tbe modem check bit.
Reg. X'45' contains LCD and PCF with bits 0.4 - 0.1 being PCF now in ICW.
Reg. 1'16' bits 1.0 - 1.3 = LCD in use and bits 1.4 - 1.1 = PCP that was used. PCP nOli in ICW
may be different than pcr that lias used and this may be normal.
Example: if PCF lias set to 0 vith an
LCD of C, then the pcr would change to 5.

X618

OXOl

Modem error bit.

6.1.58 X3105GAA

lIodem error bit (ICW bit
is at wrong value.

3)

13P2

TA131

B-140

Regs defined in
routine heading.

Type 2 Scanner 1FT

''.

/

o

o
o
0'
0

lBN 3705 COMnONICATIONS CONTBOLLEB
'lYPE 2 COK50HIC1TIONS SC1.HBB IP'l 51.PTO! INDEI

P99-370511-09

BOUT. ERROR PUNCTION TESTED
ERBOB DESCRIPTIOH
SUSPECTED CARD
PEALO PITaft
CODB
LOCATION IS)
PAGB PAGI
X67A lUI Oscillator speed test. Bacb 1nstalled oscillator in tbe scnno,r Ilnder test is checked. Tbe
oscillator fre~llencr is cbecked to ensllre that there 11 no sore than a p11l1 or einlls 0.25 percont
variation froe its expected freqllencr. The first installed line in tbe scanner is used to run
tbe test. The test;
-

t.

2.
3.
q.
5.

0
0
0
0
0

6.

7.

B.

9.

10.
,,.

12.
13.
'4.

15.
16.

COftftENTS

lIesetl and tben enable the Icanner.
Setl IIp the belt poslib1e upper Ican 1isit for the line being used for tbe test.
Sets priority • 3.
Sets tbe disp1ar request bit 10 reg X'461 will be valid for tbe line in ule.
Bxecutel set 80de witb oscillator select 0 to ensllre tbe line operates. (Pretest errors are
indicated if set sode fails.)
Sets scope Iync 2.
Bxeclltes a set sode with oscillator le1ect bitl ~or the oscillator position under test.
Kasks off level I, 2, and 3 interrupts.
Sets PDP to X'55' and the SOP to X'IDS',.
Sets PCP=B (trans.it initial).
Loops until SOP bit 3-0 (tbe 1st 3 bit tises are not included in tbe speed test because
the 1st 3 bit ti88s are unpredictable. Exaeples: the 1st bit service is caused br the
receive clock because trans.it state is Dot active ret. Also wben trans sit state is set it
sar cause an extra strobe pll1se if tbe oscillator is in a negative state at this tise).
lIeports an error if the SOP did not sbift 3 tises to set SOP bit 3 to 0 within 180 silliseconds.
Sets SDP-X'S4 1•
Loops for One second plus enollgh tise to round bits per second count to a wbole
nusber, counts the nusber of bits that occur wbile in tbe loop, saves tbe loop
count wben and if tbe nllsber of bits to be counted is actually counted, and
alternatelr sets the SOP to X'S4' and X'SS' after eacb bit ti88 to cause the TBST
DATA LATCR (transsit data) to bave alternate bits for a possible trouble shooting aid.
Calclllates fros the nusber of bits counted, tbe loop COQnt and the tolerance whetber
tbe oscillator is running at tbe correct frequency.
Reports an error if tbe detected frequency is not within tolerance.

Tbe above ls' done for eacb of the 4 possible oscillators if tbe CDS entrr for tbat oscillator
pOSition contains a valid oscillator type.
Rotes:

Tbis rOlltine is dependent on tbe proper operation of tbe first installed line since the
rOil tine is designed to test tbe oscillators rather tban the line sets. Also the
oscillator type fields in tbe Configuration Data Set (CDS) SQst be rigbt. If tbis routine
fails, tbe oscillator card for tbe oscillator under test could be bad, tbe oscillator
select bits could be baa, or tbe gating controls for tke oscillators could be baa. 1nother
possible failure is getting extra or aissing strobe pulses not caused br the oscillator.
Tbe following registers are setup for all rOil tine error displays except tbe set sode pretest
errors beginning with 1:

o
o
o
o

o
o
o

Beg l'11'-Line adr of line used in test ladr as used to set lBlll).
aeg X'14'=Husber of bits counted auring the test.
Reg X'ISI-aelative oscillator position under test in byte 0, bits 0-7
witb Hex 0 being 1st oscillator, 1 being 2nd oscillator, 2 being
3rd oscillator, and 3 being the 4tb oscillator.
aeg X'15 1.Oscillator type in brte t, bits 0-7. Tbis type is as obtained
from tbe CDS.
'
Beg X'16'=lumber of bits per second expected to be counted (rounded off
~o a wbole nusber).
1671

0101

Set sode witb oscillator
under test.

UU4

SDP bit 3 did not set to 0
in tbe 180 millisecond
wait the.

A3L2
A3T2
A3'lII
13U2
1304

'U611
TB411
TB412
TB413
TBQ14

C-020

Oscillator under test
running too fast.

13L2
lJT2

TA611
TBII11
TB412
'rEII13
'rE414

C-020
C-040

A3L2
AlT2
A3U

AJ02
X67A

167A

OX02

0103

SDP shifting.

Oscillator frequency.

13T4
1302

AlU4

e
Type 2 Scanner IPT

C-020- See notes in
C-160 beading of
tbis routine
'\ for registers
& cbecks.

'fA611
'rEQ 11
'rE412
'rE413
TBQ14

BO level 2 interrupt occurred.

8-480

B-410

SDP bits 1,2 &3
were set via an
output X'II6' witb
l'OID5'. The SOP
sbould have
been shifted
rigbt, setting
SOP bit J to a O.
See notes in
beading of
this routine
for registers
S cbecks.
Beg x'14' contains
the nusber of bits
actually counted.
lIeg x'16' contains
the nusber of bits

x3705GU 6.1.59

:1,.,f'
left 3705 C06nUHICATIONS CONTROLLER
TYPE 2 COftKUHIC~TIONS SClHQER 1FT SYKPTOH INDEX
ROUT. ERROR FUNCTION TESTED
CODE

EBROR DESCRIPTION

D99-3705£-09

SUSPECTED CABD
LOCA'l'ION (S)

FEUD PETHft
PAGE

COftll:ENTS

PAGE

expected to be
counted. If
reg X'll1'=reg
X'16', the
oscillator is
getting less than
1 bit the extra
in the one second
run but is still
too fast (not
within 0.25
percent of
expected
frequency) • See
notes in the
heading of this
routine for other
registers and
checks to be made.
X671

1680

OXOll

XXXX

Oscillator frequency.

Oscillator under test
running too slow. Not
enough bits coupted in
one second.

A3L2
HT2
A3U

A3U2
A3UQ

TA611
TB411
TeQ12
Te413
Tell 14

C-020
C-040

Beg X'lij' contains
the number of bite
actually counted
a nd is less tbau
reg X'16' which
contains number of
bite expected
to be counted.
See note a in the
heading of this
routine for otber
regiatera and
checks to make.

IBK HDX Integrated Hodem Test. This routine tests line set Types SA, 5B, 6A, and LIB type 1. These are
integrated veraions of the 3872 modema. The test ia equivalent to the Kode. Test 2 defined in the 3812
lIodel Kaintenance lIanual. The routine seta the test lead in the modem by setting both diagnoatic mode and
Data Terminal Ready ~uring the set Rlode,operation. Then it sets transmit initial and sends 1 bit to allow
for Ilequeat Tal, Send to be set, It 011 1st trll!ns.~t Interrupt the PC!' il> l\sej: to X'D' for ~dt turnaround leaf:l;ng
Bequest To Senli 011. Usa PDl' is ilet to l'l' to xmit a char:acter of all' 1 bits' before the turnaround occurs.
The program then waits 180 lili-seconds for the 'request to send' to 'clear to aend' delays and then checks
that the 'receive line signal detect' modem interface lead is on. The program then aets PCl' to 7 (receive
mode) and checks the received characters to insure an all mark character condition is received after a wrap
is established through the modem scrambler Circuits. An oscillator speed test is performed to check the
modem clocka. The oacillator frequency is checked that there is no more than a plua or ainua 0.5 percent
variation from its expected frequency. 1n LCD of C ia used through out this routine.
Reg X'11' = Line address (IeM "dr.) of line under test. (As used to set AllAR.)

1680

0101

Set Kode

No Level 2 interrupt occurred
or Level 2 not from line in
test. If display reg 1'1I5'
byte 0 bits 0-3 (LCD) are all
on a feedback check occurred.

If reg X'll1'=OOOO
no L2 occurred; Ileg
X'14'= line addr th
caused the L2.
Should have a L2
from set mode,
the PCl' should
nov = O. If
E'Cl' = 0 the Set
lIode completed
OK but the 12
did not interrupt
within 25 milliseconds after it
vas issued.
Beg X'13' =
the bits used
to set the SDF
before Set lIode.

X680

OX02

Set

The LCD is not C or PCF did
not go to 0 after set mode.

Reg X'll1'= LCD & PC
in bits 0-7.

X680

OX03

Set ftode

lCW bits 0-3 are in error.

Reg X'14' contains
ICW bits 0-3 in
byte 0 and only
bit 1 (service

6.1.60 X3705GAA

~ode

Type 2 Scanner 1FT

'{"..
\'

t, "

,

,

o
o
o
o
o

III" 3105 COftllOIlICATIOIIS CONTROLT,BR
tY~B

2 COftftOHlCATIOHS SCARRBB ltl SlKPTon IHDBX
lO.C~IOII ~BStED

1680

0111

Brror if bits for 'data set,
Cbeck aodea and line set
interface lines after tbe
ready', 'clear to send' or
'diagnostic aode' are Dot aD
aodea bas been set into
or error if bits are on for
test'aode via a set
'receiye line signal detect' or
diagnostic sode and
'ring indicator'.
waiting '5 aili-seconds.
this error will occur '
witb 'receive line signal detect'
bit being on if Type 2 scanner
1s not at or above Be 31028_ or
does not bave RBA 23-106_5 installed.

1680

OX111

Transsit initial.

o

o

ERROR DBSCRIPTIO.

ROUT. ERROR
CODE

o
o

Ho L2 occurred or L2 fro.
wrong line address.

o

,0'

,

"I

!

o
o
o
o

SUSPBCTED CABD
LOCATION (S)

FEUD FETHn
PAGE PAGB

COUI!HTS
request) should
be on.
Reg X'14'. display
reg(X'II6') bits.
aeg X'l/1' byte 0
'Bits 0,2 & 5
sbould be on.
Bits 1 & 3 sbould
be oU. otber
bits ara not
chacked.
If pcr is still D 8
this indicates tbat
'CTS' did not
occur. ( 'CTS!
should be forced by
tbe CS hardware
since diagnostic
aode is set).
If the external
(in the aodesl
clock 1& not
running this
error will
occur. Also,
check Beg.
X'IIS' bits 0.0 to
0.3 and if they
are allan. a
feedback check
bas occurred.
Beg. X'11' contains line addr
of 11De under
test. Reg. X'll1'
contains tbe line
address that caused
the L2 or Reg.
X'1II' .. 0 if no
L2 occurred.
Reg. X'13' • bits
output to SDI!'
via output X'II6'
during tbe set
1I0de.

X680

QX15

Transait initial

ICW bits 0-3 in error.

Reg. X'll1'=ICi bits
0-15. Bit 0.1
should be on
(service request).
Bits 0.0, 0.2
and 0,,3 should
be off. Reg.
X'11' and X'13' .. am
as in error stop
OIH co.aents.

1680

OX16

Transait initial

LCD or pcr is bad.

Reg X"II' bits
0.0-0.3 are
LCD and sbould
be = X'C'.
Bits O. /i-O. 7
are PCI!' and
sbou1d be X'9'.
pcr vas set to
8 and should
bave changed to 9.
Regs. X'11', X'13'
saae as in error
stop OX1Q comaents.

Type 2 Scanner

Ir~

X3705GU 6.1.61

18K 3105 COKKUNICAtIONS CONtROLLER

099- 3105E- 09

TYPE 2 COHKUHlcATIONS SCANNER 1FT SY"PTOK INDEX

ROUt .• ERROR PUNCtION TESTED
CODE
X660 0111 Transmit turn-around

ERROR DESCRIPtION

X660

OX18

Transmit turn-around

ICW bits 0-3 in error.

X680

OX19

transmit turn-around

LCD not=C or

X680

OX22

Wait for 180 lIIiliseconds for the 'request
to send' to 'clear to
send' delay and cbeck
interface lines.

Error if modem interface or
line set interface leads are
not correct.

No L2 occurred or L2 from wrong
line address.

pcr not=5.

SUSPEctED CARD
LOCA'rION (5)

FEAtO PEt I! "

PAGE

PAGE

COKI'IENtS
Beg X '11 "'line
addr under
test. Reg X'14'=
line address
that caused the L2
if Beg 1'14'=
0000 then no L2
occurred. On
the previous
character service
interrupt the PCF
vas changed to
X'D' to cause a
transmit turn-aroun
leaving 'atS' on.
the PCF should
change to 5
when the last
charaQt:'er of all
1 bits vas
ser ialized.
Reg X'l1' =line
address under
test. Reg X'14'=
ICW bits 0-15.
Bits 0,2 and 3
should be otf, bit
1 should be on.
Reg X'11'=line
address under
test. Reg X'14'
= LCD in bits 0-3
and PCF in bits
4-1. LCD should
have remained
at t'c'. PCP
should have
changed from
X'D' to X'S'.
Reg X'14' c bits
input frail the
display reg(X'46'1.
Reg X' 14' byte 0
bits 0,2,3 & 5
shou14 be on for
'clear to send',
'data set ready',
'recelve line signa
detect' (carrier
detect) and
'diagnostic mode'.
Bit 1 ('ring
indicator') should
off. Other bits
are not checked.

At this point the pcr is set to 1 (receive data mode). the routine now loops for 300 character times to
verify the stea4r mark condition. During this time the modem should be using its scramb1er/descraabler
circuits to trans~it and receive a variable bit pattern generated by the m04em. the output from the
de-scrambler on the receive side should be all mark(one bits) if the modem is working correctly. The CS
should serialize all 1 bits and every 8th bit time the routine should detect a character service interrupt
with no error bits on and the PDF should be set to x'pr' each character interrupt time.
1680

6.1.62

OX3A

Continuous mark received
from modem.

X 3105GAA

No L2 interrupt occurred
or L2 interrupt occurred
from the wrong line address.

If reg X'14' = 0000
no L2 occurred;
reg 1'14' = addr
causing the L2. If
LCD (input X'45'
bits 0-3) is
all ones, a
feedback check
bas occurred.
Beg. X'16'
the number

type 2 Scanner 1Ft

('

o

IB! 3705 COaHUNICATIORS COHTBOLLBB
TIPI 2 CoaKUN1CAtIONS SCANHBB 1FT SYIPtoa IHDIX
BOUT. EBBOR FUNCTION TISTED
COOl

0
0

ERROR DBSCRIPTION

p99-3705E-09

SUSI!ECTED CABD
LOCATION (5)

FEAtD FET!II
nGB

COftlll!HTS

PAGB

of all one bit
characters
received up
to this error.
Reg. X'13' =
bits used to
output 1'46' to
set the SDP
IIhen set lode
lias 40ne. If
Reg X' 13' bit
1.5 is a 1,
'DRS' is on;
if 0 'DRS' is off.

0
0

X68()

OX3B

Continuous .ark received
fros aodes.

The LCD is not • C or tbe
PCF ill not .. 7.

Reg X'IIS'.
Byte 0 bits
0-3 are actual LCD
and bits 11-7 are
actual PCF. If the
LCD is = P, a
feedback check
occurred. The
progru set
LCD '" C and PCP
= 7 during routine
test and they
should remain
thus till the
progra, changes
thes. Regs X'13'
and X'~6' are
sase liS error
stop OX3A.

OX3C

Continuous aark received
froe aodee.

ICi bits 0-4 are in error
or the PDP is not = X'PF'~

Reg X'''''' = ICW bit
0-1 in byte o.
ICII bit 1
(service request)
and bit II (receive
line signal
detect) shoul~ be
on~
I f ICII bit 3
(eodem check) is
on tbis
indicates that tbe
'data set ready'
line is inactive.
Reg X'IIII'
contains the PDP
(received data cbar
in byte 1. A
zero bit is in
tbis field for
eacb bit failure
of the eodell.
After each
cbaracter service L
tbe prograll resets
this field to
zeros to test tbe
dita on tbe next
character service
interrupt.

0
0
0

0
1

,\

X680

o
o
o
o

o
o
o
e

The routine nOli loops for 25 cbaracter tiees to test tbe speed of external clocks in tbe aQdea under test to
a tolerance of 0.50 percent. Level 2 and 3 interrupts are easked during tbis test and the rate at IIhich
character service bits occur, coepared lIitb expected counts, form the basis of oscillator speed measurement.
the sloll speed oscillator(1200 BPS) is selected by baving tbe 'data rate select' bit off during the set
Dode. The bigb speed(21100 BPS) oscillato~ is selected by baving the 'data rate select' bit on during the set
lode. In bot~ cases the external clock bit was selected to select tbe Bode. Clock.
1680

OXIID

Bxternal oscillator
frequency

Oscillator under test is
running too slow.

Reg X'13' byte 1

bit 5 is

Type 2 Scanner

~PT

~

0 if

speed
oscillator is

1011

X3105GAA 6.1.63

o
IBK 3705 CO"~UHICATIOHS CONTROLL!R
TYfB 2 COaftUHICATIORS SCARRBB 1FT StftPTOft IHDBl
ROOT. BRBOR rUBCTION TBSTBD
co DB

BRROB DBSCBIPTIOH

1>99-3705B-09
SD5PBC1'BD CARD
LOCUION (5)

nUD rU1I1I

l'AGB

US!

COIIIIBIiTS
under test (Data
Bate select
off), • 1
i f high speed
oscillator is
under test (Data
Bate Select on).
The greater the
difference between
the contents of
X'16' (expected
count) and 1"11'
(actual count)
the sloller the
oscillator is.

1680

OXII!

Bxternal oscillator
rrequency.

X681

1I111X

IBft HDI Integrated lIodea Vrap Test. This routine tests installed line set types 8A, 8B, 9A, 12A and 12B.
The 80deas are wrapped IIith the fastest internal clock up to 1200 BPS. The test is run with an LCD of 6.
An alternate 0 and 1 bit pattern is transmitted and received. The receive line will have Data Terainal
Beady bit set along with diagnostic aode bit to cause the test lead to be activated in the aodes. The
transait line will not have the Data Terainal Beady bit set so it vill run in internal diagnostic aode and
no errors should occur on the transait line since it should have already been tested with internal vrap in
previous routines. The adapters ars not tested in synchronous sode since there is no difference in the
aodea operation than fros start/stop 80de.
lIote 1:

Oscillator under test is
running too fast.

()

(

\.

Beg X'13' byte
bit 5 is
= 0 if lOll speed
oscillator is
under test,
= 1 if high speed
oscillator is
under test.

On all error stops in this routine, the folloving registers are set up
Beg X'11' • transmit line address which is ueed to set the 'test data'
latch to provide the trans.itted data bits. This is not the
80des interface address that is being tested at this tiae.
Beg X'13'
receive line address which is the address of
the aodea interface that is being tested.

=

1681

OX01

1st level 2 for ;eceive
line set aode

BO level 2 interrupt occurred
or level 2 not froa expected
line address.

If reg X'111' = 0000
: O. no L2 interrup
occurred; reg X""'
line address of the
interrupting line

1681

0102

1st level 2 for receive
line set aode

The LCD is not 6 or the
pcr 11 not 0

Beg 1',4' •
LCD and pcr.
When the set mode
is completed, the
CS shOUld change
pcr frol 1 to O.

1681

OX03

1st level 2 for transait
line set mode

~o level 2 interrupt occurred
or level 2 not from expected
line address.

If reg X'14'
: 0, no L2 interrup
occurred; reg X"II'
line address of the
interrupting line.

X68,

OXOII

1st level 2 for transmit

The LCD is not 6 or the pcr
is not o.

Beg 1'111' :
LCD and pcr.

Setting diagnostic mode on the line sets under test causes the 'request to send' line to be activated to the
sodea interface. The prograa nov vaits 300 aili-seconds for the 'request to send' to 'clear to send' delays
and for the 'receive line signal detect' circuits to function. Then transait initial is set (PCr=8) to
transait a pad character of all one bits followed by a character of X'55' to cause alternate 0 and 1 bit
(space and mark) transmission. rro. this point on the transait and receive lines aay interrupt in any
order. When the 1st character is received, it and an additional 24 received characters are checked that
they are alternate bits (X'55')_ The transmit interrupts are ~cepted and the trans.it LCD is validated on
each transmit interrupt and the PDr is setup to send another alternate data bits cbaracter. The transmit
line may be any type start/stop line set and is being run in internal diagnostic vrap mode and should cause
no errors since it should ba,e already been tested in previous internal wrap tests.
1681

OX05

Character transaitted.

6.1.611 X370SGAl

No L2 interrupt occurred or
L2 interrupt from vrong
line address

I

'<.../

If reg X'111' •
0, no L2 interrupt
occurred; reg X',4'

Type 2 Scanner 1FT

{.
(
,

~'

o
o
o

IBft 3105 COft"UNIC1~10NS COHTROLLER
TYPE
COMftUNICAT10NS SCANNER t'~ STftPTOft INDEX
ROOT .• ERROR PUNCTION TESTED
CODE

0

1l99-3105B-0,:!

a

EaaOR DESCRIPTION

SUSPECTED CARD
LQCUIOII (5,

OX06

Character transll·itted.

0

An expected interru
occurred from
transmit line
address, however
the LCD or PCF was
not as expected.
Reg X'14' contains
the LCD and PCl'
in bits 0-7.
Carrier detect
(' receive line
signal detect')
should be on in the
modem and should be
receiving alternate
data bits.

0
1661

OX07

1st character received

No L2 interrupt occurred from
receive line address within
500 lili-seconds.

X681

OX08

1st character received

The receive LCD is not
6 or the receive PCP
is not 7

0

0
0

X661

0

0109

1st character
received

ICW bits 0-4 are in
error or the PDP is not
=x'55'

U
'

'~, 1I
. .•

. ,"';

o
o

o
o

e

COII~ENTS

UGE

The transllit LCD is not

6 or the transmit PCP is
not 9.

o

PAGE

interrupting 11ne
address.
X681

~

fEAtD l'BTIII1

The expected L2
occurred from recei

line address boweve
the LCD or PCP was
not as expected.
Reg 1'14' contains
the LCD and PCP
in bits 0-7.
Beg X' 14' = lCW
bits 0-7 in byte 0,
bit 1 (S vc-reg) ,
bit 4 (8LSD) should
be on. lCIl bit 3
(modem check)
is on indicates
that 'DSft' line is
inactive reg X'14'
contains the PDP in
byte 1 and this
received data
character should
be I' 55'

The following errors yere detected when the routine looped to Gount 24 additional
receive line character service level 2 interrupts and verified the integrity of the
received data characters.
X661

OX10

Character received

No level 2 occurred or
level 2 froll wrong line
address

If reg 1'14' is all
zeros no L2 interru
occurred; reg X'14'
= line addr of the
interrupting line.
Reg X'16' • the
transmited characte
count .•

K6Bl

OXll

Character transmitted

The transmit LCD is not=6
or transmit PCP not=9

See error code OX06
Reg 1'16'=received
character count.

X681

OX 12

Character received

The receive LCD is not=6
or receive PCP not=7

See error code OXOB
Reg X'16'= received
character count.

X6B 1

OX 13

Character received

lCW bits 0-4 are in error
or PDP is not=X'55'

See error code Ox09
Reg X'16' = receive
character count.

K661

OX14

Check that 25 1'55'
characters have ~een
received.

Twenty-five X'55'
characters were not
received. Reg 16 contains
the received character
count.

The following errors we •• detected w·hen the routine was testinq the break fjaature.
Check the line set cards for the receive line under test.

Type 2 Scanner 1FT

X3705GAA 6.1.65

IB" 3705 COMMUNICATIONS CONTROLLER
TYPE 2 COMMUNICATIONS SCANNER 1FT SYKPTOK INDEX
ROUT. ERROR PUNCTION TESTED
CODE
OX20 Attempted to execute a set
mode on the receive line (Reg
13) •

X681

EaROR DESCRIPTION
Either the wrong line or no
line interrupted. Reg 14
contains the interrupting line
address.

D99-3705£-09

SUSfECTED CARD
LOCATION (5)

1681

OX21

Attempted to execute a set
mode on the receive line to
Set the Break feature and
Oiag Wrap. Reg 13 contains
the receive line address.

Either the wrong line or no
line interrupted. Reg 14
contains the interrupting line
address.

168'

OX22

Transmitted and received
I·PP'. Either the Xmit (Reg
111 or the receive line (Reg
131 should have interrupted.

Either the wrong line or no
line interrupted indicating
The data was not sent.

x681

0123

Transmitted I'PP' from the
line address in Beg 11.

Bither the LCO and/or the
PCP changed. Reg 15 contains
the incorrect LCDPCP.

X681

OX2ij

Should have received from
line address in Reg 13 X'OO'.

The data received was not
X'PP'. Reg 15 contains the
bits in error.

1681

OX25

Transmitted and received
1'00'. Either the Xmit (Beg
"lor the receive line (Beg
131 should have interrupted.

Either the wrong line or no
line interrupted indicating
the data was not sent.

1681

OX26

Transmitted X'OO' fro. the
line address in Beg 11.

Either the LCO and/or the
PCP changed. Reg 15 contains
the incorrect LCDPCP.

1681

OX27

Should have received X'OO'
from the line address in
Reg 13.

The data received was not
X'OO'.

X683

XXXX

IBft PULL DUPLEX ftODEM WRAP TEST POR LIB 11.
These modems are integrated versions of the 3872 full duplex modems.
The modem is connected to an even/odd pair of line interface addresses with the
even address being the translit line address and the odd address being the
receive line address.
If errors are detected in this routine and routine X656 ran without errors,
the modea cards for the failing line address are the most likely source
of the probleaa.

PEALD PET""
PAGE

COftftENTS

PAGE

See tho routine
heading for
more information

,

j

Each pair of Pull Duplex LIB 11 line sets are wrapped in the following
sequence of steps:
1 ••••• Beset and then enable the scanner and set the transmitted and received
character counts to zero.
2 ••••• set tbe display bit in the transmit ICW.
3 ••••• Wait 15 mili-seconds for the modem interface lines to settle
down after the reset.
4 ••••• Set the receive ICW bits for LCD, PCP, SOP and ICW bits 0-3
all to zero.
5 ••••• Set scope .sync 2.
6 ••••• Input and check the display register bits (Input XI 46').
These bits represent the transmit line modem interface leads after the
interface bas been reset and before diagnostic mode bas been set.
If any of the transmit interface leads are in error then report the error
with error code aXIl. only the 'data set ready' lead should be on
at this time.
See reg 1'46' definition for the bits being tested.
7.,•••• Set mode on the transmit line address.
RP 9 X'1D' byte 1 bits 0-7 are the bits output to SDP (ICW bits 26-33) prior
to setting PCP to 1 for the set mode.
Reg 1'1D' byte 1 bit 1 on is used to set the diagnostic mode latch on the
transmit line interface and that diagnostic mode latch should cause the .odem
test lead to be activated to pick the modem test relay.
IIhen the test relay is picked it should cause the transmit line interface to be
connected to the receive line interface so that data may be wrapped from the
transmit to the receive line address without an external wrap connection. This
test relay should also disconnect the actual communications line while the wrap
is being done to prevent data from going to the communications line.
Reg 1'1D' byte 1 bit 2 is on to cause the 'data terminal ready' latch to be set on.
Bit 3 is on to cause the 'sync bit clock' latch to be set for synchronous clock correction.

6.1.66

X3105GA~

Type 2 Scanner IPT

4,--,

."l/

o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o

Ilia 3705 CORftUHICATIOHS CONTBOLLEB
~f'E 2 conauHlcAflOSS SClNNEB IFf syaPron IHDEX
BOUT. ERROB POHCTIO. TESTED
ERBOR DBSCRlfTIOH
SUSfECTED CARD
PEALD PETRK
COD!
LOCATION (51
nGB fAGB
Bit q is on to cause the 'external clock' latch to be set to select the clock within
the .odes.
Bit 5 is off tbe first time through the test for this pair of lines so that
the 'data rate select' latcb will not be turned on and the 1200 BfS clock
will be selected in tbe eode.. The second tise througb the test this bit is on
so that tbe 'data rate select' 1atcb vil1 be turned on to select the 2400BPS clock.
Bits 6 & 1 are off to select tbe first internal oscillator as the backup clock used for
tbe set sode aDd setting transait iDitial.
'
After the SDP is setup, the LCD is set to C and the fCP is set to 1 to initiate the
set .ode operation and then the prograa wait for & checks for a le,el 2 interrupt
and normal coapletion of the set lode.
8 ••••• Be ••t tbe display bit in the transsit leW and then set the display bit
in tbe receive ICV.
9 ••••• »,rlors the set aode for the receive line intertace address.
The aaae bits
are used as defined in step 1 except the diagnostic sode bit is not set on.
Cbeck for Dorsal le,el 2 interrupt and noraal LCO, fOP and ICW bits 0-4.
10 •••• Beset the display bit in the recei,e lew and then set the display bit
, in the transsit ICI.
11 •••• Iait for 15 sili-seconds for the test relay to pick and for the
sodel interface leads to settle dovn.
12 •••• Get the display register bits for the translit line sode. interface
conditions. Check that bits are on for 'clear to send', 'data set ready'
and 'diagnostic .ode'. Rate that the 'clear to send' and 'data set ready' bits
are forced on by the scanner via diagnostic lode and do not reflect the actual
sodes interface conditions.
Also cheCk that the 'ring indicator' and 'recei,e line signal detect' bits
are off.
13 •••• 8eset the display bit in the translit ICW and tben set tbe display bit in
the receive ICII .•
lq •••• Get tbe display register bits for the receive line eodee interface conditions.
Check that tbe 'data set ready' and 'recei,e data bit buffer' bits are on.
Check that t~e bits for 'clear to send', 'diagnostic Dade', 'ring indicator'
and 'receive line signal detect' are all off.
Rate that 'request to send' has not been set on tbe transeit line interface yet
so that no carrier should be transeitted at this tiee so that the 'recei,e line
signal detect' (carrier detectl bit should be off. If tbe 'recei,e line signal detect'
bit is off tben tbe aodee should clasp the recei,e data to a larkll bit) and the
'receive data bit buffer' sbould be a one bit.
15•••• Beset tbe display bit in the recei,e ICN and tben set tbe display
bit in tbe transsit ICII.
16 •••• 8eset trans.it ICII bits 0~3 6 5-1 and set PDP to X'PP'. Set trans.it
SOP to X'0003'. Set translit LCO to C and fCP to 8 to set trans.it initial
which sbould bring up the 'request to send' interface lead to the aodel
and cause the lodem to start sending carrier.
17 •••• Wait for the le,el 2 frol the translit line to occurr and check the results
including the display register contents for tbe transsit line aodee interface leads.
18 •• ~.Beset tbe display bit in the transmit ICII and then set tbe display bit
in the receive ICW.
19 •••• Hait for 180 lili-seconds to allow for the .axisu. 'request to send' to 'clear to send'
delay in the aodem and for 'receive ~ine signal detect' to coae on.
During tbis tiee the transmit lines SOP is constantly set to X'PP' to cause
all one bits(earkl to be transaitted.
20•••• Get the receive line display register bits.
Check that the 'data set ready'. 'recei,e line signal detect'(carrier detect) and
'recei,e data bit buffer' bits are On. Cbeck that the 'diagnostic .ode',
'clear to send' and 'ring indicator' bits are all off. Note tbat the
'receive line signal detect' bit sbould be on now since tbe translit line
sbould ba,e been transmitting carrier and then a scrasbled data bit pattern
after tbe 'clear to send' delay.
Tbe receive side of the aodea should be detecting the scra.bled data pattern and
resulting in an all one bits(aarkl output to tbe 'recei,e data bit buffer'.
21 •••• Set tbe recei,e LCD to C and fcr to 5 to cause the received data to be sonitored
for an EBCDIC SYNC cbaracter of X'32' which is used to estab1isb character pbase.
22 •••• lIait for level 2 interrupt froa trans.it line wbicb is sending a I'FP'.
Check for noraal completion.
23 ••.•• Set the transsitted character count to zero. (In reg X' IF'I.
2q •••• 8eset the display bit in the transait ICW, set the display bit in tbe
receive lCIi.
25 •••• Cbeck tbat the receive LCD is still equal to e, that the fCP is still
equal to 5 and tbat SDP bits 2 througb 5 are allan. Hate that if SOP bits
being tested are not allan tben all one bits are not being received and
tbe aodel scraabler, de-scraabler or clock correction/selection circuits
are not working properly.
26 •••• Set translit SOP to X'0355' to o,erlay the X'FP' tbat is now being sent. This is
to allow for alternate data transitions for clock correction. Set transmit fOP to X'6Q' as tbe
next data cbaracter to be sent after the alternate data transitions character in the SOP.
This X'6Q' put into the fDP is an EBCDIC StNC character shifted left one bit position.
Tbis shifting of the SYRC character is to insure tbat the receive line level 2 interrupts
always occurrs after tbe transmit line level 2 character service interrupts even under
worse case clock correction.

Type 2 Scanner IPT

o

D99-3105£-09

CORRENTS

X3105GAA 6.1.61

IBM 3105 COM"U~ICATIONS CONTROLLER
TYPE 2 COMKUNICATIONS SCANNBR 1FT SYMPTO~ INDEX

D99-370SE-09

ROUT. ERROR FONCTION TESTED
ERROR DESCRIPTION
SOSEECTED CARD
CODE
LOCATION (5)
27,•• ,•• Set the transmitted character count to 1.
28 •••• Wait for and check results of the transmit line level 2 interrupt that should
occurr after the alternate data bits character is completely transmitted and the
shifted SYNC character is starting to be sent.
29,•••• Setup to transmit another shifted SINC character.
lO •••• Set the transmitted character count to 2.
31 •• ,•• lIill nov enter a cOlilmon lIait sub-routine to wait for either a transmit
or receive line level 2 character service interrupt.
32 .•••• If no level 2 interrupt occurred then set the error indicator to X'0001'
and go to step 48 to report the error.
33 •••• If the character service level 2 interrupt was not from the transmit or
the receive line address then set the error indicator to X'0002' and
go to step 46 to report the error.
3~ •••• If the level 2 vas from the receive line address then go
to step 41.
35 •••• If here than level 2 was from the transmit line address.
Check that the transmit LCD ~ C and that the PCP
9 and if they are
in error sat error indicator to X'0003' and go to step 48 to report the error.
36 •••• If transmit ICW bits O~4 are bad then set error indicator to X'0004'
and go to step 46 to report the error.
37 •••• ldd 1 to the transmitted character count. If count = 300 then set
the error indicator to X'OOOO' to indicate no error and then go to
step 48.
38 •••• Compare the transmitted and received character counters.•
Note that the transmitted character count should always be 3 or 4 higher
then the received character count due to no character service level 2
interrupts from the receive line until the second SYNC character is received.
If too many characters have been received then set the error indicator
to X'OOOA' and go to step qS to indicate error has occurred.
If too few characters have been received then set the error indicator
to l'OOOB' and go to step 48 to indicate error bas occurred.
39•••• Set the transmit por to X'AA' to ca~se alternate data bits to be transmitted.
Note that this should be received as alternate data bits at X'5S' in the receive
PDF due to the shifted SYNC characters.
40 ••• ,.Go to step 31 to wait for next character service level 2 interrupt.
41 •••• If here then just got a rece.i.ve line character service level 2 interrupt.
42 •• ". Check that the receive line LCD = C and PCF = 7 and if not then set the
error indicator to X'0008' and go to step 48 to indicate an error has occurred.
43 •••• Check that the receive lines ICW bits 0-4 are good an~ that the received data
in the PDF is good. If the received character counter is zero than the first
received data character should be X'32' (an EBCDIC SYNC character). If the received
character counter is not zero that the received data in the PDP should be X'SS'.
If the received data is bad or lCW bits 0-4 are bad then set the error indicator
to 1'0009' and go to step 48 to report the error.
44.... Add one to the received character counter.
45 ••••• Collpue the transmitted and received character counters. If any errors
then go to ste p 48 to report them. (See step 38 for error conditions).
iIE ..... lleset receive lew bits 0-3, 5 and 8-15 to zeros.
47 ••••• Go to step 31 to wait for the next character service level 2 interrupt.
48..... If here and the error indicator is zero, then no error has occurred
and the previous portion of the test has run ok. If the error indicator
is not zero, then the type of error will be indicated by loading reg X'15'
with the error indicator and displaying error code OX60.
49.o ... Will now mask off level 2 and level 3 interrupts and loop for 200
bit(25 character) times to test the speed of the external clock.
SO •••• Report an error if clock is running too slOw or too fast. These errors are
based on counting the number of character service requests that were made
by the scanner for the receive line during a program loop time based on the
number of machine cycles per character time. If a failure is detected it could
be the transmit or receive clock in the modem or the fact that the 'data rate
select' fU'Ir.tion is not wo:t!':';_!19 O~ on" of the line ipterfaces.
51 ..... 1f the 'data rate select' bit was off for this test run then turn it on
and go back to step 1 to repeat the test on the same pair of lines with
'data rate select' on.
52 ..... Bepeat all previous steps on the next pair of similar
lines if any are installed.

FEALD FET""
PAGE PAGE

COHHENTS

=

Register usage within routine for all error stops:
reg It' '11 •

reg x'n'
reg X'ID'

reg X'1E'
reg X'1F'
reg J['ij6'

6.1.68 X3705GAA

a

the transmit line interface address as used to set ABAR.
the receive line interface address as used to set ABAR.
the set mode bits output to SDF on the transmit line during a
set mode operation. The same bits are used to do the set mode
for the receive line except byte 1 bit 1 is not set on so that
diagnostic mode is not set on the receive line.
the received character count.
the tr~nsmitted character count.
the display register modem interface lines for the ICW that has
the display bit on. Following is the meaning of each bit in
byte O.

Type 2 Scanner 1FT

o

o
o

o
o

IBM 3105
TYP~

caH~UNICATlaNS

ROUT. EaROR FUNCTION TESTED
CODE
Bit
Bit
Bit
Bit

o

o

1681

0

OX11

ERBOB DBSCRIPTION
SUSPECTED CABO
FEALD UTilI!
LOCATION (S)
PAGE £lAGE
to send is on if this bit is on.
ring indicato~ is on if this bit is on.
data set ~eady is on if this bit is on.
receive line Signal detect (ca~~ie~ detectl is on if
this bit is on.
~eceive data bit buffer and a one bit(mark) was the last
data bit received if this bit is a one.
diagnostic mode latch is on if this bit is on.
bit service request latch vas on if this bit is on. Note
that this bit is turned on by the strobe pulse in the line set
and is turned off by the scanner when the scanner processes the
bit service. ~his bit may be on or off at any time and is ignored
in this routine.
• not used.

Bit 4

=

Bit 5
Bit 6

=

Transmit line .odem
interface leads after
reset and before setting
diagnostic 1I0de.•

eadem inte~face lines in e~ror
for transmit line. 'Data set
ready' should be on. 'Clea~ to
send', 'receive line signal
detect', 'ring indicato~' and
'diagnostic mode' bits should
be off.

see routine
heading for
lIore regs.

Set mode level 2
interrupt.

No L2 o~ L2 not f~oll the
transmit line address.
If ~eg X'14' = 0000 then
no L2 occurred .• If reg X' 14' is
not ze~os then it is the address
of the line that caused the L2.

X683

(lX21

LCD & PCF are valid
after set 1I0de.

Transmit lines LCD is not
C
PCF is not O. Reg X'14' byte 0
• LCD & fcr input from transmit
ICW via an input X'45'. If LCD is
c r then a feedback check has
occurred indication that one of
the bits being used to do set mode
did not set properly in the line
set card or that some extra latch
did set. If LCD is ok but pcr is
still 1 then the set mode did not
complete probably due to missing
a bit se~vice.

see routine
heading fo~
lIore regs.

lCN bits 0-3 are
valid after set 1I0de
has completed on the
transmit line.

ICW bit 1(svc-~eq) is not on o~
ICW bits 0,2 o~ 3 a~e on.
Reg X'14'
lCW bits 0-15
input via an input X'44' f~olD
the transmit line.

See routine
hElading for
aore regs.

NO L2 or L2 not f~om the
receive line add~ess. If ~eg X'14'
=0000 then no L2 occurred. If
~eg X'14' is not zero then it is
the add~ess of the line that
caused the L2.

See ~outine
heading for
more regs.

I

X683

OX22

X683

OX24

Set mode level 2
interrupt froll the
receive line.

1663

OX26

LCD & PCF are valid
for receive line afte~
set mode has been
completed.

X683

0X28

lCW bits 0-3 after
set mode has completed
on the receive line.

0

"
0

0

=

o~

=

=

=

LCD not
C o~ PCF not
O.
Reg X'14' byte a • LCD & PCF
obtained from ~eceive ICW via
an input X'45'. If LCD = P then
a feedback check has occurred
indicating some latch being set
by the set mode did not come on
.,of· that sqQ1~ latch that should not
come on did come on. If LCD = C
but PCF is still 1 then the set
mode did not complete normally
which is usually caused by a
missing bit se~vice f~om the
line set under test.
E~~or if ICW
a~e on o~ if

bits 0,2 or 3
lCW bit 1(svc-~eq)
is not on. Reg X'14' = leW
bits 0-15 input from the receive
lCW via an input 1'44'. Beg X'lS'

SQe routine
h'llding for
IIpre regs.

See routine
heading fo~
more registers.

t)

e
e

Type 2 Scanner 1fT

for
X'14

reg x'46' bits
(scanner displa y
~eg). Reg X'15' has
a bit on fo~ each b
bit position in
error in ~eg X'14'.

OX20

"~I

e

See ~tn heading
r~9isters. Reg

:e663

n
0

COIlIlENTS

= clear

,ii

0

1l~9-3705E-09

0
1 c
2
3 •

Bit 1

o
0

CONTROLLER

2 CO~~UNlCATIONS SCANNBR IrT SYKPTOH INDBX

X3705GAA 6.1.69

{. J
(
IBft 3705 COKftUHIC1TIONS COHTROLLER
TYPB 2 COft"UHIC~TIONS SCAHHBR 1FT StKPTO! INDEI
ROUT. ERROR POUCTION TBSTED
CODE

1683

OX 21

P99-3705B-09

ERROR DESCRIPTION

SUSPECTED CARD
LOCnIOR (S)
has a bit on for each bit pOSition
in error in reg X'14'.

PBAtD PET 11ft
PAGE P1GE

COftllEHTS

Error if bits for 'clear to
send', 'data set ready' and
'diagnostic mode' are not on
or if bits are on for 'ring
indicator' or 'receive line
signal detect'. Reg X'14' =
bits input via an input 1'46'
at the tise the failure was
detected.

See routine
beading for
lore regs II
display reg
(1'116'1 bit
definitions.

\t
,{

"/

1683

OX2C

Kodem interface bits
from display register
for receive line
interface.

Error if bits for 'data set
ready' & 'receive data bit
baffer' are not on or if bits
are on for 'clear to send',
'ring indicator', 'di4gnostic
lode' or 'receive line signal
detect' (carrier detect).
Reg 1'1q' • bits in pat from the
display reg via an inpat X'46'.
Note that 'reqoest to send' has
not been set on the translit
line yet so no carrier should
be received and the 'receive
line signal detect' line should
not be active and the lodel
should be clalping the receive
data lead to a lark(1 bit) which
sbould cause the 'receive data bit
baffer' to be a one bit.

See routine
heading for
more rega II
for display
reg (X'46') bit
definition ••

X683

OX30

Level 2 character
service interrapt after
setting translit
:lnitiel (pcp-a).

No L2 or L2 not fro. the
tranamit line address.
It reg X'14 1 • 0000 then no
no L2 occarred. It reg 1"4' is
not zeros then it is tbe line
address that caused the L2.
If this error occarred yoo sboald
display reg X'45' and check byte 0
bits 0-3 (LCD) and if LCD-P then
the setting of 'reqaest to send'
and/or transmit lode .ay bave
caased a feedback cbeck. LCD should
be C and PCP should ~e 9(PCP was
set to 8 for translit initial and
tbe scanner abould have changed it
to 9 at tbe ~irat bit lervice ti.e.1

See routine
heading to!:
101:8 regl.

1683

0132

ICW bits 0-4 from
transsit ICW after
L2 froa translit
:lnUiel.

Error if ICW bits 0,2,3 or 4 are
on or if lCW bit 1(svc-req) is off.
Reg X"'"
transmit lew bits 0-15
obtained via an input X'44'.
Reg 1'15' has a bit on for eacb bit
pOSition in error in reg X""'.

See routine
heading for
lore regs.

=

(J
,f

Kodu interface bits
fr08 display reg for
the transeit line after
set eode and a 15 8ilisecond wait.

"

,,

X683

0134

LCD & PCF after
transmit initial L2,.

Error if trans lit LCD not • C
or PCP not· 9. Reg X'14' byte 0
• LCD & PCF inpat via an input
X'45' frol translit ICW.

See !:outine
beading for
lIore regs.

X683

OX36

Kodem interface bits
frol display register
for translit line after
transmit initial.

Error if bits for 'data set
ready', 'diagnostic lode' and
'clear to send' are not on or
if bits are on for 'ring
indicator' or 'receive line
signal detect'.
Reg X'14' • display reg bits
input via an input 1'46'.

See rootine
beading for
lore regs &
display reg
(X'46') bit
definitions.

X683

OX3A

'Receive line signal
detect' is on after a
180 aili-second wait
daring which time all
one bits (mark) are being
transmitted with 'request
to send' on.

'Deceive line signal detect'
is not on or 'data set ready'
is not on or 'receive data bit
baffer' is not on or 'clear to
send' is on or 'diagnostic lode'
is on or 'ring indicator' is on.

See routine
heading for
more regs &
display reg
(X' 46') bit
definitions.

6.1.70 X3705GU

~

I

,

Type 2 Scanner IPT

(,

.-------..........

~

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18B 3705 COftftO.ICA~IORS cO.~aOtLBa
T'PI 2 COftBOBICATIOIS SCABHBa lrT stBPToa INDBX
aOUT. Baaoa rURCTIOI TBSTBD
CODB
X683 OX40 t2 char-svc frol translit
line sending a X"" char.
Rote: prior to checking for
this t2 the receive PC, vas
set to 5 to lonitor for an
an EBCDIC SIRC character.

D99-3705B-09

BBBoa DBSCaIPTIOR
Bo t2 or t2 not frol the
translit line address.
If reg 1'14' • 0000 then no
t2 occurred. If reg 1'14' is not
zero then it is the address of
the line that caused the t2.

SOSPECTBD CUD
tOCA 'fIOR (S)

'BUD FBTaII
P1GB PAGE

CO l1li EBTS
See routine
beading for
lore regs.

X683

OX42

ICI bits 0-4 frol trans.it
of X'", char-service L2.

Brror if ICI bits 0,2,3 or 4 are
on or if ICI bit 1(svc-req) is
off. Reg X"4' • ICI bits 0-15
obtained via an input X'44' frol
the translit ICI. Reg X't5' has
a bit on for each bit position
that is in error in reg x'14"

see routine
heading for
lore regs.

1683

OX46

tCD & PC. frol trans lit
of X'FP' char-svc t2.

Brror if tCD not • C or if
PC, DOt. 9. aeg X'14' byte 0 •
translit LCD S pcr obtained via
an input 1'45'.

See routine
heading for
.ore regs.

1683

01'8

Receive line LCD 5 PCP
are valid and that the
receive line is receiving
all one bi ts.

ErrQr if LCD not • C or if
PCP not a 5 or SOP bits 2-5
are not all one bits.
aeg X'14' byte 0 = receive LCD 6
PCP and byte 1 SDr bits 0-7.
aeg X'15' has a bit on for each
bit positioD that is in error
in reg ~'1"'.

=

See routine
beading for
Ilore regs 6
display reg
(X'46') bit
definitions.

X683

OX 41

t2 frol tr~nslission of
alternate data bits for
clock correctioD. Prior to
checking for this char-svc
t2 the translit SO, vas
set to 1'0355'·to overlay
the X'''' that vas being
sent and the PDP vas set
to 1'64' as a shifted
18CDIC SIIC character.

Ho L2 or L2 not frol the
trans lit line a4dress.
If reg X'1Q' = 0000 then
no t2 occurred. If reg X'14'
is not zeros then it has the
line address that caused the
character service level 2
interrllpt.

See routine
heading for
lore I:8gs.

1683

0I4C

ICI bits 0-4 after t2 frol
traDslissioD of alternate
data bits.

Btror if ICW bits 0,2,3 or " are
on or if ICW bit 1 (svc-req) is
not on. Reg X'14'
ICW bits
0-15 input fro. transmit ICW
via an input X'qq'. Reg X'15'
bas a bit on for each bit
position tbat is in error in
reg X' lQ'.

See routine
beading for
lore regs.

.1683

014E

tCD & PCP after t2 frol
traDslission of alternate
bits for cloc~ correction.

1683

0160

Wrap 300 data characters
checking for norlal charservice level 2 interrupts
and translit/receive ICI
bits including tCD,PCP,PDF
and ICI bits 0-4.

o

Register X' 15'
0001
0002
0003
0004

o

0008
0009 - - - -

Type 2 Scanner 1FT

=

See routine
headUg for
.ore regs.

Error if, translit LCD is not
,,=.,\= or pcr"l)ot·= 9.
Reg 1'14' byte '0 • LCD S
pcr obtained via an input
X'45' frol transmit ~C ••

See routine
headiDg for
lore regs.

Reg X'15' tells vhat type of error
has occurred. If reg X'15' is 0000
then no error has occurred.

If reg X'15' is not zero then the following table shows what the error vas
according to the contents Of reg.x'15'.
Error indication.
NO character service level 2 interrupt occurred for either
the transmit or receive line addresses.
The character service level 2 interrupt vas caused by some line
address other tban the trans.it or receive line under test.
Reg X' 14' = the line address that caused the L2 interrupt.
Transmit line tCD is not C or PCP is not 9.
Transmit lines ICW bits O-q are in error. ICW bits 0,2 and 3
should be off, ICW bits ',svc-reg) should be on. ICI bit 4 is
'receive line signal detect' and should be off on the transmit line.
Beceive line LCD is not C or PCF is not 7 on a receive line
character service level 2 interrupt.
Beg X'14' byte 0 = receive line LCD 6 PCP input via an input X'45'.
Received data in the PDP is bad or Eeceive line ICW bits 0-4
are in error. Reg X'1q' • receive lines ICI bits 0-15 with byte 1
(ICW bits 8-15) being the received data in the PDP.

13705GU 6.1.71

'.{ )'~
IB~ J10~ COMMUN1CATIONS CONTROLLER
TYPE 2 CO""UNICAT10NS SC~NNER 1fT SY"fTO~ INDEX

ROUT. ERROD FUNCTION TESTED
CODE

p99-J'105E-09

SUSPECTED CARD
fEALD PET""
COMMENTS
LOCATION(SI
PAGE PAGE
ICW bit 1 (service requestl should be on. IC~ bit 4(receive line signal
detect) should be on and it reflects the actual 'receive line signal
detect· signal from the modem since the receive line is not in
diagnostic mode. lCW bits 0,2 and 3 should be off. If the received
character counter (reg X'lE') is zero then the received data
in the PDF should = X'32' (an EBCDIC SYNC character).
If "he received character counter(reg X'lE') is not zero then
the received data in the PDF should = X'55'.
If the received character count
0000 and the received data in
the PDF = X'AA' then the first SYNC character was not recognized
possibily due to a data bit error. Received data errors can be
caused by clock correction or clock selection(data rate select)
problems in the modem or by a scrambler/descrambler circuit
failure in the modem.
TOO many characters have been received. Reg X'lE' = the received
character counter, reg X'lP' = tho transillitted character counter.
~he transmitted character counter should always be 3 or q higher then
the received character counter due to line delay and the fact that
the the alternate data bits character and the first SYNC character
do not cause a receive line L2 interrupt and are not counted.
~oo few characters have been received. Reg X'lE' = the received
character counter, reg X'lF'= the transmitted character counter.
~he ICW input register is loaded with the receive ICW bits at this
time so you may display regs X'44',X'45' and X'41' to get information
about the state of the receive line. Also the display bit 1s set in the
receive lines ICW so the display reg(X'46') is valid for the receive line.
If reg X'45' byte OILCD & PCF) = C5 then the receive line is still in
monitor mode and has never recognized an EDCDIC SYNC character in which case
you should look at reg 1'45' byte 1 (SDF bits 0-11 to see if an all one
bit.s, all zero bits or varying data is being received. If SDF bits 2-1 are
all one bits then the data is not being wrapped through the modeill.
If SDP bits 2-7 are alternate one and zero bits then the alternate data
bits being transmitted at this time are being received but the two SYNC
characters transillitted were not recognized.

(J

ERROR DESCRIPTION

=

0001 - - - -

Oooe - - - -

X683

0110

Checking speed of the
external modem clock.

Error if the external clock is
too slow(not enough characters
counted in what should have been
25(X'19') characters tiDIes).
Reg X'14' = the number of chars
counted. If reg X'lD' byte 1 bit
5 is off then the external
clock in use should be 1200 BPS.
If reg X'lD' byte 1 bit 5tdata
rate select) is on then the
clock in use should be 2400 BPS,.

See routine
heading for
lIore regs.

X683

OX71

Checking speed of the
external mode. clock.

Etror if the external clock is
too fast(25 characters were
counted before the minimua
loop count had been reached).
If reg 1'10' byte 1 bit 5
(dAta rate select) is off the
clock in use should be 1200 BPS.
If the data rate select bit is
on then the clock in use should
be 2400 BPS.

See routine
heading for
more regs.•

X684

XXIX

IBM full Duplex Kodem wrap test for LIB 10.
These modeills are similar to the Mini-12 full duplex modems.
~he modem is connected to an even/odd pair of line interface addresses with the
even address being the transmit line address and the odd address being the
receive line address.
If errors are detected in this routine and routine X656 ran without errors
then the modem cards for the failing line address are the most likely source
of the pro blem.
'
Each pair of Full Duplex LIB 10 line sets are wrapped in the following
sequence of steps:

1,...... Reset and then enable the scanner and set the transmitted and received
character counts to zero.
2 ••••• Set the display bit in the transmit lCW.
3 ••••• Wait 15 mili-seconds for the modem interface lines to settle
down after the reset.

6.1..72 X3705GH

Type 2 Scanner 1FT

_.-.1

o

o
o
o
o

o
o
o
o
o
o
c
o
o
o
o
o

IBK 3705 CQSnOHICATIOHS CONTROLLER
fYPE 2 COHKQHICAfIOHS SCAHHER 1FT SYKPTOft INDEI

D99-3705E~09

ROOT. ERROR PONCTION TESTED
ERROR DESCRIPTION
SUSPECTED CARD
PElLD PETKK
CODE
LOCATIOII (5)
PAGE PAGB
4 ••••• Set the receive ICI bits for LC.D, PCP, SOP and ICII bits 0-3
all to zero.
5 ••••• Set scope aync 2.
6 ••• ~w Input and check the display register bits (Input X'46').
These bits represent the transmit line modem interface leads after the
interface has been reset and before diagnostic mode has been set.
If any of the transmit interface leads are in error then report the error
with error code OX11. only the 'data set ready' lead should be on
at this the.
see reg X'46' definition for the bits being tested.
Set aode on the translli t line address.
Reg X'1D' byte 1 bits 0-7 are the bits output to SOP (ICW bits 26-33) prior
to setting PCP to 1 for the set aode.
Reg X'1D' byte 1 bit 1 on is used to set the diagnostic aode latch on the
transmit line interface and that diagnostic aode latch should cause the modem
test lead to be activated to pick tbe aodea test relay.
When tbe test relal is picked it should cause tbe transmit line interface to be
connected to tbe receive line interface so that data aay be wrapped froa tbe
transmit to the receive line address without an ezternal wrap connection. Tbis
test relay should also disconnect tbe actual cosmunications lin a wbile tbe wrap
is being done to prevent data from going to tbe communications linL
Reg X'1D' byte 1 bit 2 is on to cause tbe 'data terminal ready' latcb to be set on.
Bit 3 is on to cause tbe 'sync bit clock' latch to be set for syncbronous clock correction,
Bit 4 is off so tbat external clock vill not be selected.
Bit ~ is off so tbat tbe 'data rate lelect' latcb will not be set.
Bits 6 & 7 are tbe oscillator select bits. Tbese bit are setup to select
the highest speed internal oscillator up to and including 1200 BPS.
B••••• Reset the display bit in the transait ICI and tben set the display bit
in tbe receive ICI.
9 ••••• Perform tbe set mode for the receive line interface address~
~he same bits
are used as defined in step 7 except tbe diagnostic mode bit is not set on.
Cbeck for normal level 2 interrupt and normal LCD, PDP and ICW bits 0-4.
10.~ .• _. Reset tbe display bit in the receive ICII and tben set tbe display bit
in the translit ICW.
II ••••• I~it for 15 aili-seconds for the test relay to pick and for the
modea interface leads to settle down.
12 ...... Get tbe display register bits for tbe transmit line aodea interface
conditions. Check that bits are on for 'clear to send', 'data set ready'
and 'diagnostic aode'. Note that the 'clear to send' and 'data set ready' bits
are forced on by the scanner via diagnostic lode and do not reflect the actual
aodem interface conditions.
Also cbeck tbat the 'ring indicator' and 'recei,e line signal detect' bits
are off.
13.••••• Beset the display bit in the transdt ICII and tben set the display bit in
tbe receiVe ICW •
. ~ ••••• Get the display register bits for tbe receive line modem interface conditions.
Check that the 'data set ready' and 'receive data bit buffer' bits are on.
Cbeck that the bits for 'clear to send', 'diagnostic mode' and 'ring indicator'
are all off. ~he 'receive line signal detect' bit is not checked at this tiae
since it lay be on or off.
~5 ••••• Reset tbe display bit in the receive ICW and tben set tbe display
bit in the transait ICW.
16 ••••• Reset transmit ICI bits 0-3 & 5-7 and set PDP to X"P'. Set transmit
SOP to X'0003'. Set transmit LCD to C and PCP to 8 to set transmit initial
which should bring up the 'request to send' interface lead to the .odea
and cause the modem to start sending carrier.
11 ••••• lait for tbe le,el 2 froa tbe translit line to occurr and cbeck the results
including tbe display register contents for tbe transait line lodel interface leads.
lB ••••• Beset tbe display bit in tbe transait ICN and then set tbe display bit
in tbe receive ICW.
19 ••••• Wait for 1BO lili-seconds to allow for the maxiaum 'request to send' to
'clear to send' delay in tbe aodea and for 'receive line signal detect'
to cOlDe on.
During this time tbe transmit lines SOP is constantly set to X'PP' to cause
all one bits(lark) to be transmitted.
20 ••••• Get tbe receive line display register bits.
Check tbat the 'data set ready', 'receive line signal detect'(carrier detect) and
'receive data bit buffer' bits are on. Check that tbe 'diagnostic sode',
'clear to send' and 'ring indicator' bits are all off. Note that the
'receive line signal detect' bit sbould be on nov since tbe transmit line
should have been transmitting carrier and all one bits(lark)
after tbe 'clear to send' delay.
~be receive side of tbe lodem should be detecting tbe carrier and
resulting in an all one bits(sark) output to tbe 'receive data bit buffer'.
21 ••••• Set the receive LCD to C and PCP to 5 to cause tbe received data to be aonitored
for an EBCDIC SYNC character of X'32' wbicb is used to establish cbaracter pbase.
22 ••••• Wait for level 2 interrnpt frol transmit line wbicb is sending a X'PP'.
Cbeck for normal coapletion.
23 ••••• set the transmitted character count to zero. (In reg X'lP').

OO"KEH~S

7......

Type 2 Scanner 1FT

U705GU 6. h 73

IBH 3705 COMMUNICATIONS CONTROLLER
TlfE 2 COHHUNICATIONS SCANNER 1FT SYNPTOK INDEX

D99-310SE-09

ROUT. ERROR FUNCTION TESTED
ERROR DESCRIPTION
SUSPECTED CARD
FEALD FETHH
CODE
LOCATION (S)
PAGE PJ\GE
24 ••••• Reset the display bit in the t~ansmit ICN, set the display bit in the
receive lew.
25 •.•••• Check that the receive LCD is still equal to C, that the PCF is still
equal to 5 and that SDF bit.s 2 through 5 are all 011. Note that if SDF bits
being tested are not all on then all one bits are not being received and
the modem or line set transmit and/or receive data circuits
are not working properly.
26 ••••• set transmit SOP to X'0355' to overlay the X'FF' that is now being sent. This is
to allow for alternate data transitions for clock correction. Set transmit fOP to 1'64' as the
next data character to be sent after the alternate data transitions character in the SDP.
This X'64' put into the PDF is an EBCDIC SYNC character shifted left one bit position.
This shifting of the SYNC character is to insure that the receive line level 2 interrupts
always occurrs after the transmit line level 2 character service interrupts even under
worse case clock correction.
27 ••••• Set the transmitted character count to 1.
28 ••••• Wait for and check results of the transmit line level 2 interrupt that should
occurr after the alternate data bits character is completely transmitted and the
shifted SYNC character is starting to be sent.
29 ••••• Setup to transmit another shifted SYNC character.
30 ••••• Set the transmitted character count to 2.
31 •• ·••• lIill now enter a common wait sub-routine to wait for either a transmit
or receive line level 2 character service interrupt.
32 .••••• If no level 2 interrupt occurred then set tbe error indicator to 1'0001'
and go to step 48 to report the error.
33 •.•••• If the character service level 2 interrupt was not froll the transmit or
the receive line address then set the error indicator to X'0002' and
go to step 48 to report the error.
34 ••••• If the level 2 was from tbe receive line address then go
to step 41.
35 ••••• If here than level 2 vas from the transmit line address.
Check that tbe transmit LCD = C and that the PCF = 9 and if they are
in error set error indicator to X'0003' and go to step 48 to report the error.
36 ••••• If transmit ICW bits 0-4 are bad then set error indicator to X'0004'
and go to step 48 to report the error.
37 ••.••• Add' to the transmitted character count. If count = 300 or 3 seconds have elapsed then set
the error indicator to X'OOOO' to indicate no error and then go to
step 48.
38 ••••• Compare the transmitted and received character counters.
Note that the transmitted character count should always be 3 or 4 higher
then the received character count due to no character service level 2
interrupts from the receive line until the second SYNC character is received.
If too many characters have been received then set the error indicator
to X'OOOA' and go to step 48 to indicate error has occurred.
If too few characters have been received then set the error indicator
to X'OOOB' and go to step 48 to indicate error has occurred.
39 ••••• Set the transmit PDP to I'AA' to cause alternate data bits to be transmitted.
Note that this should be received as alternate data bits of X'S5' in tbe receive
PDF due to the shifted SYNC characters.
40 ••••• Go to step 31 to wait for next character service level 2 interrupt.
41 ••••• If here then just got a receive line character sen ice level 2 interrupt .•
42 ••••• Check that the receive line LCD = C and PCF = 7 and if not then set the
error indicator to X'OOOB' and go to step 48 to indicate an error has occurred.
43.~ .••• Check that the receive lines ICII bits 0-4 are good and that the received data
in the PDF is good. If the received character counter is zero than the first
received data character should be X'32' (an EBCDIC SYNC character). If the received
character counter is not zero that the received data in the PDf should be X'55'.
If the received data is bad or ICW bits 0-4 are bad then set the error indicator
to X'0009' and go to step 48 to report the error.
44 ••••• Add one to the received character counter.
45 ••••• Co~pare the trans~itted and received character counters. If any errors
then go to step 46 to report them. (See step 38 for error conditions).
46 ••••• Reset receive rcw bits 0-3, 5 and 8-15 to zeros.
47 ••••• Go to step 31 to wait tor the next character service level 2 interrupt •.
4e •• ~ •• If here and the error indicator is zero, then no error has occurred
and the previous portion of the test has run ok. If the error indicator
is not zero, then the type of error will be indicated by loading r~g X'15'
with the error indicator and displaying error code OX60.
49 ••••• Repeat all previous steps on the next pair of similar
lines if any are installed.

COMHENTS

Notes on register usage within this routine for all error stops:
reg Xf 1 ~ •
reg 1'13'
reg I'1D'

regI'lE'

6.1.74

X3705G~A

the t.ansmit line interface address as used to set ABAR.
the receive line interface address as used to set ABAR.
the set mode bits output to SDF on the transmit line during a
set mode operation. The same bits are used to do the set mode
for the receive line except byte 1 bit 1 is not set on so that
diagnostic mode is not set on the receive line.
the received character count.

Type 2 Scanner 1FT

!O

i:

[0

i

o
o

o
o
o
o

o
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o
o
o
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IBK 3105 COKHUNICATIOHS CONTPOLL!B
tr~B 2 COKHqHtC1TtONS SClNHEB tFt SlHPTOK tNDEX
ROOT. ERROR POHCTIOH TESTED
ERPOR DESCRIPTION
SUSPECTED CARD
PBALD FB'l'1I11
CODE
lOCATION (SI
PAGE PAGB
reg I'1P' = the transaitte~ character count.
reg 1'46' • the display register sodes interface lines for the ICW that has
the display bit on. Polloving is the seaning of each bit in
byte o.
Bit 0 • clear to send is on if this bit is on.
Bit 1
ring indicator is on if this bit is on.
Bit 2 • data set ready is on if this bit is on.
Bit 3 D receive line signal detect (carrier detectl is on if
this bit is on.
Bit 4 = receive data bit buffer and a one bit (Bark) vas the last
data bit received if this bit is a one.
Bit 5 • diagnostic 80de latch is on if this bit is on.
Bit 6 • bit service reguest latch vae on if this bit is on. Hote
that this bit 1s turned on by the strobe pulse in the line eet
and is turned off by the scanner when the scanner processes the
bit service. This bit say be on or off at any tise and is ignored
in this routine.
Bit 1 • not used.

co BUIITS

=

1684

OX11

Trans.it line Bodes
interface leads after
reset and before setting
diagnostic B04e.

Bodea interface lines in error
for transmit line. 'Data set
readJ' should be on.
'Ring indicator', 'clear to
send' 6 'diagnostic Bode' bits
should be oft.

1684

0120

Set mode le.el 2
interrupt.

Ho L2 or L2 not frOB the
transmit line address.
If reg J'14' = 0000 then
no L2 occurred. If reg 1'14' is
not zeros then it is the address
of the line that caused the L2.

X684

0121

LCD II PCP are valid
after set sode.

TransBit lines LCD is not = C
or pcr is not O. Reg 1'14' byte 0
= LCD 6 pcp input frOB transBit
ICW via an input X'45'. If LCD is
• r then a feedback check has
Occurred indication that one of
the bits being used to do set sode
did not set properly in the line
set card or that SOBe extra latch
did set. If LCD is ok but pcr is
still 1 then the set lode 4id not
cosplete protably due to Bissing
a bit setvice,.

X684

OX22

IC Wbits 0_3 are
valid after set Bode
has coapleted on the
transBit line.

ICW bit 1(svc-reg) is not on Or
ICN bits 0,2 or 3 are on.
Reg 1'14' = ICW bits 0-15
input via an input 1'44' frOB
the transmit line.

X684

0124

Set mode level 2
interrupt froa the
receive line.

Ro L2'or L2 not fros the
receive line address. If reg X'14'
=0000 then no L2 occurred. If
reg 1'14' is not zero then it is
the address of tbe line that
ca used the L2.

1684

OX26

LCD II PCP are .alid
for receive line after
set .ode has been
co.pleted.

LCD not = C or PCP not = O.
Reg 1'14' byte 0, = LCD & pcr
obtained from receive ICW via
an input 1'45'. If LCD = r then
a feedback check bas occurred
indicating soae latcb being set
by the set 80de did not cose on
or that soae latch that should not
come on did ccse on. If LCD = C
but PCP is still 1 tben the set
aode did not coaplete normally
which is usually caused by a
aissing bit service from the
line set under test.

See rtn heading
for registers.
aeg 1'14' • bits
fros reg X' 46 '.
(scanner display
r4lg). aeg X'15'
hall a bit
on for each bit
positlon that 1.
in error in Beg
X'lll' ..

Type 2 Scanner IPT

lt3105GU 6.1.15

IBn 3705 COMMUNICATIONS CONTROLLER
TYPE 2 COIIIlUNICATIONS SCANNEll IFT SYl1P.TOII INDEX

BOUT. ERROR FUNCTION TESTED
CODE
X664 OX 26 lCW bits 0-3 after
set mode has completed
on the receive line.

ERROR DESCRIPTION

D99- 37 05E- 09

SUS fECT ED CARD
LOCA nON (S)

PEAtD PET II II

PAGE

PAGE

COIIIIENTS

Error if ICW bits 0,2 or 3
are on or if ICW bit l(svc-reg)
is not on. Reg X'II\' = ICY
bits 0-15 input from the receive
ICW via an input X'44'. Reg 1'15'
has a bi~ on for each bit position
in error in reg X'14'.

See routine
heading for
lore registers.

See routine
heading for
lIore regs S
display reg
(%'46') bit
definitions.

X664

OX2A

Modem interface bits
from display reg tor
the transmit line after
set mode and a 15 milisecond wait.

Error if bits for 'clear to
send', 'data set ready' and
'diagno~tic mode' are not on
or if bits are on for Iring
indicator' or 'receive line
signal detect'. Reg X'14' =
bits input via an input X'46'
at ·the time tbe hUun was
detected.

X684

OX2C

Modem interface bits
trom display register
for receive line
interface.

Error if bits for 'data set
ready'S 'receive data bit
buffer' are not on or if bits
are on for 'clear to send',
'ring indicator' or
'diagnostic mode'.
Reg X'14' = bits
input from the display
reg via an input X'46'.

X684

0130

Level 2 character
service interrupt after
setting transmit
in iUal (PCF=8) •

No L2 or L2 not from the
transmit line address.
If reg 1"4' = 0000 then no
no L2 occurred. If reg X'14' is
not zeros then it is the address
of the line that caused the L2.
If this error occurred you should
display reg X'45' and check byte 0
bits 0-3 (LCD) and if LCD=F then
the setting of 'request to send'
and/or transmit mode may have
caused a feedback check .• LCD should
be C and PCP should be 9(PCF was
set to 8 for transmit initial and
the scanner should have changed it
to 9 at the first bit service time.)

X664

ox 32

lCW bits 0-4 from
transmit ICW after
L2 from transmit
initial.

Error if ICW bits 0,2,3 or 4 are
on or i f ICW bit 1 (svc-reg) is off.•
Reg X'14' = transmit ICW bits 0-15
obtained via an input X'44'.
Reg X'IS' has a bit on for each bit
pOSition in error in reg X'14'.

See routine
heading for
1I0re tegs.

X684

ox 34

LCD & PCP after
transmit initial L2.

Error if transmit LCD not = C
or PCF not = 9. Reg X'14' byte 0
= LCD & PCF input via an input
X'45' from transmit lCW.

See routine
heading for
more regs.

1684

OX36

Mode. interface bits
from display register
for transmit line after
transmit initial.

Error if bits for 'data set
ready', 'diagnostic mode' and
'clear to send' are not on or
if bits are on for 'ring
indicator' or 'receive line
signal detect'.
Reg X'14' = display reg bits
input via an input X'46'.

See routine
heading for
more regs I:
display reg
(X'46') bit
definitions.

1684

OX3A

'Receive line signal
detect' is on a fter a
,ao mil i-second wait
during which time all
one bits(mark) are being
transmitted with 'request
to send' on.

'Receive line signal detect'
is not cn or 'data set ready'
is net on or 'receive data bit
buffer' 1s not on or 'clear to
send' is on or 'diagnostic mode'
is on or 'ring indicator' 1s on.

See routine
heading for
more regs 1\
display reg
(X'Q6') bit
definitions.

X664

OX40

L2 char-svc from transmit
line sending a X'FF' char.
Note: prior to checking for
this L2 the receive PCP was
set to 5 to monitor for an
an EBCDIC SYNC' character.

No L2 or L2 not from the
transmit line address.
If· reg X"4' • 0000 then no
.,q oeourte,q. U reg X"4' is not
zero then it is the address of
the line that caused the L2.

See routine
beading for
more regs.

6.1.76 X370SGH

Type 2 Scanner 1FT
..":·.

,

o

SUSPECTED CARD
LOCATION (51

X684

.1

f

Error-if ICW bits 0,2,3 or 4 are
on or if ICW bit 1 (svc-reql is
off. Reg X'14' = ICW bits 0-15
obtained via an inFut X'44' from
the transllit ICN. Reg 1'15' has
a bit on for each bit position
that is in error in reg X'14'.
Error if LCD not = C or if
PCP not = 9. Beg 1'14' byte 0 =
transmit LCD & PCF obtained via
an input 1'45'.

to
checking for this char-svc
L2 tbe transmit SOP was
set to X'0355' to overlay
the X'FF' that was being
sent and the PDP was set
to X'64' as a shifted
EBCDIC SYNC character.

o

ERROR D\SCRIPTION

LCD & PCF f~o. t~ans.it
of X'FF' cha~-s.c L2.

all one bits.

X684

D99-3705E-09

!l.!lgi~.!l£

l!.!1l!
0001
0002

o

0003
0004

0008
0009 - - - -

~IIQI inS!£~1iQn:

No character service level 2 interrupt occurred for either
the transmit or receive line addresses.
The character service level 2 interrupt was caused by some line
address other than the transmit or receive line under test.
Reg X'14' = the line address tbat caused tbe L2 interrupt.
Transmit line LCD is not C or PCP is not 9.
Transmit lines ICW bits 0-4 are in error. ICW bits 0,2 and 3
should be oft, ICI! bits 1 (svc-req) sbould be on. ICII bit" is
'receive line signal detect' and should be off on
the transmit line.
Receive line LCD is not C or PCF is not 7 on a ~eceive line
character service level 2 interrupt.
Beg X'14' byte 0 : receive line LCD & PCP input via an input X'45'.
Received data in the PDP is bad or receiVe line ICW bits 0-4
arE in error. Reg X'1'" = receive lines ICW bits 0-15 with byte 1
(ICW bits 8-151 being the received data in the PDP.
ICW bit 1 (service request) should be on. ICW bit 4(receive line signal
detect) should be on and it reflects the actual 'receive line signal
detect' signal from the modem since the ~eceive line is not in
diagnostic lode. ICW bits 0,2 and 3 should be off. If tbe received
character counter(reg X'1E'1 is zero tben tbe received data
in the PDr should = X'32' (an EBCDIC SYNC character).
<

e
Type 2 Scanner 1FT

X3705GAA 6.1.71

IBM 3105 COMMUNICATIONS CO~TROLLEa
TIPE 2 COMMUNICATIONS SCANNER 1FT SYMPTOM INDEX
ROU~

ERROR FUNCTION TESTED
CODE

0001 - - - -

0008 - - - -

099- 37 05E- 09

ERROR DESCRIPTION

SUSPECTED CARD
FEALD PETIII!
COMIIENTS
LOCATION (S)
PAGE PAGE
If the received character counter(reg X'1E') is n at zero then
the received data in the PDr should. X'55'.
If the received cbaracter count • 0000 and the received data in
the PDP. X'Al' then the first SYNC character was not recognized
possibily due to a data bit error. Received data errors can be
caused by clock correction or clock selection
proHn. in the line set or by a transmit or receive data
failure in the mode ••
Too many characters bave been received. Reg X'1E' • the received
character counter, reg X'1P' = the transmitted character counter.
The transmitted Character counter ehould always be 3 or 4 higher then
the received character counter due to line' delay and the fIIct that
the the alternate data bits character and the first SYNC character
dQ not cause a receive line L2 interrupt and are not counted.
Too few characters have been re.ceived. Reg X'1E' = the received
character counter, reg X'1F'= the transmitted character counter.
The lCW input register is loaded with the receive ICW bits at this
time so you may display regs X'44',X'45' and X'41' to get information
about the state of the receive line. Also tbe display bit 1s set in the
receive lines ICW so the display reg(I'46') is valid for the receive line.
If reg 1'45' byte O(LCD & PCP)
C5 then the receive line is still in
aonitor mode and has never recognized an EDCDIC SYNC character in which case
you should look at reg 1'45' byte t(SDr bits 0-7) to see if an all one
bits, all zero bits or varying data is being received. If SOP bits 2-7 are
all one bits then tbe data is not being wrapped tbrough the aode ••
If SDF bits 2-1 are alternate one and zero bits then the alternate data
bits being transmitted at tbis ti.e are being received but the two SYNC
characters transeitted were not recognized.

=

X68'6

XXXI

SABRE line control RPQ test 1. BPQ's number 858655 and 858651 are the SABRE BPQ numbers. Tbis routine test
that pcr states 4,5 & 1 allow lCW bits 34 through 31 to be set and that other ~CF states reset and hold all
th ••• bit. to zero.

1686

OX11

wait for bit service
before setting LCD & PCF.

No bit service occurred.

13Q2

Suspect bad line
set card for line
adr in reg X'11'.

X686

OX 12

Check tbat all PCF
states except 4, 5. & 7
reset ICW bits 34-37 to
zero when in LCD state
'E' (SABBE .ode BPQ).

Bits 34-37 not egual
to zero.

A3Q2

Beg '15' bits 0.2-5
have a bit
on for
eacb bit found
in error. Beg
X'13' bits 1.4-1.7
• pcr in use.

1686

OX 14

Check that PCF states
4. 5, & 7 allow ICW
bits 34-37 to be set
when in LCD state 'E'
ISABRE DIode BPQ).

Bits 34-31 not equal
to one.

A3Q2

Beg '15' bits
0.2-0.5 indicate
wbicb bits did
not set on. Reg
X'13' byte 1
bits 4-7 Bre the
PCP bits in use.

1681

OXOl

Check that lCW bit'39
can be set and reset
in LCD state 'E' (SABRE
lIode Rl?Q).

ICW bit 39 expected and
actual results not equal.

13Q2

Reg '13' bit 0.7 is
expected results. B
X'15' bit 0.7 is
actual j:esu1ts.

X688

XXIX

Sabre RPQ line sets wrap data test. All installed line addresses that will run in sabre mode are wrapped
two at a time. Tbe first installed Sabre line adr is made tbe receive line and the next installed Sabre
line adr is made the transmit line. Then tbe test is perfor.ed on this pair of lines. When the test is
completed on this pair of lines, the lines are reset and the line that was the transmit line is nov made the
receive line and tbe next installed sabre line adr is made the new transmit line. Then this pair of lines
is wrapped. This stepping up through the lines is continued until tbe last installed Sabre line has been
the transmit line. Then the first installed line is made the transmit line and the last installed Sabre
line is made the receive line and tbis pair of lines is wrapped. All the installed Sabre line sets are
wrapped with LCD=E.
A set mode is done on both the transmit and receive lines with ICW bit 27 (diagnostic wrap mode) and ICW bit
29 (sync bit clock) on. Oscillator select bits are 0 so tbe first oscillator is selected. The priorit¥
bits are set to 3. The set mode is done before the setting of scope sync 2 as each pair of lines is
wrapped. Tbe set mode must complete successfully for the wrap to function and any errors detected during
the set mode are pre-test errors and all start with error code lXXX. These error codes are near the end of
the symptom index after all routine error codes. References to level 2 interrupts in the following error
code displays are the character service level 2 interrupts tbat occur after scope sync 2 is set and do not
include the level 2 interrupts that occurred for the set modes which occur before scope sync 2.

6.1.78 X3705GAA

Type 2 Scanner 1FT

o
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IIa 3705 COa"UNICATIOBS CONTROLLIR
fTP! 2 coaaUHIC1TIOHS SC1 •• BR IPf STaPfoa INDII
ROOT. BRROa POHCTION fBStBD
co DB
Hote1: On all

er~or

stops in this

~outine,

SOSPICTBD ClftD
LOCAfIOIi (S)
the following registers are setup;

PBALD UTIlI!
PAG!

COUI!II'fS

PAGI

reg X',q' for errors that indicate received data is bad or ICW bits 0-7 in error.
wbat .as obtained by an input X'_q' fros tbe receive line ICW this is
IC' bits 0-15. ICI bits 8-15 are the PDP which should contain the
recei.ed data. ICI bits 0-7 are error and control flags and are always
expected to be let as follows:
ICW bit 0 • Stop bit check and sbould be off
ICI bit 1 • Service reguest and should be on
ICI bit 2 • Character overrun and should be off
ICI bit 3 • aodel check and sbould be off
ICI bit q • Beceive line signal detect and is not cbecked.
ICI bit 5 = Beserved bit and sbould be off
IC. bit 6 • Progr.1 flag and sbould be off
ICI bit 7 • Pad flag and sbou1d be off

o
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o

reg 1'16' for errors tbat indicate received data is bad, contains tbe expected ICI
bits 0-15 tbat are being tested against tbe contents of reg X'1q'.

o
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Bote 2:

'G;
"

I
i

o

ERROR DESCRIPTIO.

reg X",' • transsit line address (as used to set AIARI
reg X'13' • recei.e line address Cas used to let ABAft)
reg X'.q' for errors that indicate le.el 2 occurred fros wrong address.
line addrels tbat caused the L2 or .0000 if no L2 occurred.

o

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D99-37051-09

Checks to be lade on all error stops:
a. Check LCD of failing 11ne set~ If LCD-P, a feedback cbeck bas occurred.
Hote that if the CDS indicates a line set that will run in Sabre
lode is installed but this is not the case, a feedback cbeck will occur.
b. Tau lay use tbe continue function (except on pre-test errors starting witb 1)
to continue fros tbis error to see if just this line set is failing, if
all line sets in ibis LIB are failing, or if all Sabre lines are
failing. Tau lay get additional error stops on sale line pair being wrapped
so you say have to use the continue function sultiple tises. If only one
line set is failing or a pair of even/odd addresses, tben tbe line set
card is probably bad. If all addresses fail in one LIB, tbe LII's bit cloct
control card say be bad or tbe tersinators lay be bad. If all Sabre
line sets fail, the CS cards lay be bad. If the line sets are the
type that will run in botb Sabre and synchronous .ode and if they run
successfully in routine 1656, tben suspect LCD=I or the sync bit clock
control line. Reference card location charts in the PE!II for tbe CS,
LIB, and line set card locations whicb vary in location according
to LIB types.

lfter the PlD characters of alternate data bits are sent for receive clock correction tbe synchronizing bit
sequence of " consecutive zero hits and the transsitted data cbaracters are sbifted left by 1 data bit
position. 'fbis is to cause the received dats characters to be offset by , data bit froa transsitted
characters so tbat tbe interrupt sequence can be predictable and tested.
Pad Pad Stnc-char
~ranslit

Data -

55

Becei,e Data

15

00

10

15

00

'0

00

00

15

01

2A

00

20

00

00

2A

(Sabre)

(Sabre)

The routine is run in the sequence of the following error codes.
X688

OXOl

'fransait of 1st pad
coapleted.

Bo level 2 interrupt
occurred froa trans.it
line or L2 not frol tbe
transsit line address.

13Q2

1st L2 char-svc
after setting of
scope sync 2. See
rtn heading notes
, and 2 for registe
and cbects to eake.

1688

0102

Translit PCP went fros
8 to 9.

Trans.it PCP not • 9.

A3Q2

!rans.it PCP set
to 8 by progrBII
during hardware
setup. The CS
hardware should
have changed
the PCP to 9.
Should now /Ie
in process of
transsitting 2nd
pad character.
'lhe trans.i t
PDP is set to
tbll 1st sync
character after
this error

o
'fype 2 Scanner IP!

X3705GAA 6.1.79

...

(1

1EK 370S CO~"ON1CAT10NS CONTROLLER
TYPE 2 COK"UN1CATIONS SCANNER 1FT SY"PTO! 1RDEI
ROUT. ERROR FUNCT10R TESTED
CODE

ERROR DESCRIPTION

D99-3705E-09

SOSPECTED CARD
LOClTIOR (5)

FEALD FET""
P1GE PAGE

CO"IIENTS
display. See notes
, & 2 in beading
of tbis routine
for registers
& checks.

II,' .

0103

Transmit of 2nd
pad completed.

Ro level 2 interrupt occurred
or L2 was not from the
transmit line address.

13Q2

2nd cbar-svc L2
interrupt after sco
sync 2. See notes a
heading of this
routine for
,
registers and
cbecks.

1688

010~

Transmit of 1st 6 ~ero bits
of synchronizing sequence
completed.

10 level 2 interrupt occurred.

A3Q2

3rd L2 interrupt
"
after setting o f '
scope sync 2.

1688

OIOS

Transmit of 1st part of SYRC
char sequence completed.

Level 2 not from transmit
line address.

13Q2

See rtn beading
notes 1 and 2
for registers
& checks.
After this error
display, the
transmit PDF is
set with 1'1S'.

1688

0106

Transmit of 2nd part of SYRC
char sequence completed.

Ro level 2 interrupt
occurred from the transmit
line address.

13Q2

~th L2 after
scope sync 2.
See rtn heading
notes 1 and 2
for registers
& checks.

1688

0107

Transmit of 2nd part of SYNC
character sequence completed.

Level 2 not from transmit
line address.

A3Q2

1688

0108

Receive line recognized
SYNC character.

Receive lines PCP not =7.

13Q2

Receive line PCP ..·a
initially
set to 5 and
as 2nd sync
character is
received and
recogni~ed, the
hardware should
set the receive
PCF=7. Note
that this setting
of PCF=7 from
PCF=5 does not
cause a level
2 interrupt. See
notes 1 & 2
in heading of
this routine
for registers
& checks.

1688

0109

Receive 1st data char
of 1'2A'.

Ro level 2 occurred
frem receive line adr.

A3Q2

5th L2 (1st from
receive line adr)
after scope
sync 2. See
notes 1 & 2
in heading of
tbis routine
for registers
& cbecks.

1688

0101

Receive 1st data char
of 1'2A'.

Level 2 not from the receive
line address.

13Q2

See rtn beading
notes 1 and 2

See rtn
heading notes
and 2 for registEr$
and checks. After
this error display_
the transmit PDF is
set to character
1'00' to be
transmitted next.
Should now be
in process of
transmitting 1'15'.

Type 2 Scanner 1FT

'~

....1

1688

6.1.80 1370SGAA

,~,'

o

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0

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3705 CO~~UNICATIONS CONTROLLER
TYPE 2 CO~~UNIC1TIONS SC1NNER 1FT SYRPTOR INDEX

D99-3705E-09

IE~

ROUT. ERROR FUNCTION TESTED
CODE

ERROR DESCRIPTION

SUSPEC'IED CARD
LOCATION (5)

X689

OXOE

Receive 1st data clla!;
of X'2A'.

Received data in PDF is not
X'2A', or ICW bits 0-7 are
in error..

A3Q2

Received data
in PDF should be
1st char of
X'21'. See
notes 1 & 2
in heading of
this routine
for registers,
lCIl bits 0-7, &
checks to make.

1688

OXOC

Transmit of X'ls' char

No level 2 interrnpt
completed.
line adr.

13Q2
occu;red for transmit

6th L2 (5th from
transmit adr) aft
scope sync 2.
see notes 1 & 2
in heading of
this rontine
for registers
& checks.

X688

OXOD

Transmit of X'ls' char
completed.

Level 2 not from ,transmit
line adr.

P.3Q2

See rtn heading
notes 1 and 2
for registers
& checks.
P.fter this error
display. the
transait PDF is
set to the
character X'10'
which is the
next character
to transmit.
The character
X'OO' should
now be in the
process of being
transmitted.

X688

OXOE

Receive character X'OO'.

80 level 2 occurred from

A302

7th L2 (2nd from
receive addrl after
scope sync 2.
See notes 1 & 2
in heading of
this rontine
for registers
& checks.

X688

OX OF

Receive character X'OO'.

Level 2 not from receive
line adr.

13Q2

See rtn heading
notes 1 and 2
for registers
& checks • . :

X688

0110

Receive character X'OO'.

Received data in PDF not
X'OO' or ICW bits 0-7 in
error.

1302

See rtn heading
notes 1 and 2
for registers.
ICW bits 0-7.
& checks.

1699

OXll

Transmit of X'OO'
completed.

80 level 2 occurred for
transmit line address.

P.302

8th L2 (6th from
transmit addr). SeE
notes 1 & 2
in heading of
this rontine
for registers
& checks.

X698

OX12

Transmit of X'OO'
completed.

Level 2 not from transait
line adr.

1302

See rtn heading
notes 1 and 2
for registers
& checks.
lfter this error
display, the
transmit PDF is
set to X'OO' as
the next
character to
transmit. Should

0

0

C,

II',,'~,I,I
I,
~;

receive line adr.

o

o
o
o

o
o

COftIlENTS
for registers
and checks.

0

0
0
0

FEUD FET~M
PAGE PAGE

Type 2 Scanner 1FT

~

X3705GAA 6.1.81

(I

Il. )'
:f '

'(.)

IBII 3705 COlIlIUlIICATIONS COIiTBOLLl!B
'rtfB 2 COIIKUlIICAfIOHS SCAIMBB 1FT SYllfTOII INDEX
BOUT. BBBOB FUHCTIOll TBSTBD
CODB

1688

1688

0113

0115

Recei,e

Beceive

cha~acte~

cha~acter

1>99-3705B-09

BBBOB DBSCBIPTIOH

1'20'.

1'20'.

Ho le,el 2 occu~~ed
line adr.

SUSPBCTBD CARD
LOCnIOI1(S)

fo~

~eceiye

1.302

0116

T~ao •• it of 1'10'
cOBpleted.

COIIIIBIiTS

9tb L213rd frOB
recei,e addr). see
notes 1 II 2
in beading of
tbis roatine
for reghten
II cbecks.

~.i

0117

Trans.it of
cOBpleted.

1688

QX18

1688

0119

1688

0111

1'10'

See ~tD beading
not.. , and 2
for regiltera
II chech.

'...

Blceived data io PDF not •
1'20' Or ICI bits 0-7 io

AlQ2

See rtll beading
notes 1 and 2
for registers;
ICI bUs 0-7,
8 checkl
to nit••

,

UQ2

10tb L2 (7th from
t r:lIIIslit addr:). Se.
lIotes 1 II 2
111 beadin! of
tbh r:out nl
fOI: !:Illtltau

AlQ2

See rtn lIeaUng
notes 1 and 2
for registers
8 cbecks.
After tbis error
displal', the
translU PDF is
set to 1'00' as
tbe next cbaracter
to tran .. U.
Shou14 nov be
in tbe process of
transBitting 1'00'.

Beceive cb&r&cter 1'00'.

Ho level 2 occurred
receive line adr.

AlQ2

11tb L2 (qtb frOB
receive line ad~).
See notes 1 1\ 2
in beading of
tbis routine
for registers
II cbecks.

Beceive cb&r&cter 1'00'.

Level 2 not fro. receive
line adr.

13Q2 :

See rtn heading
notes 1 and 2
for registers
II checks.

cbar&cte~

1'00'.

f~o.

Beceived data in PDF not·
1'00' or ICI bits 0~7 in

13Q2

e~ror.

See ~tn beading
notes 1 and 2
for registers,
ICI bits 0-7 f
II cbecks.

X688

OX1B

Traosmit of X'OO'
co.pleted.

NO level 2 occurred fro.
transmit line ad~.

~3Q2

12tb L2 (Stb fro.
transdt ad4rl. See
notes 1 II 2
in beading of
this routine
for registers
& cbecks.

X688

OX1C

Transmit of X'OO'
completed.

Level 2 not from transmit
line adr.

13Q2

See rtn beading
notes 1 and 2
for registers
" checks.
After tbis error
display, the
tralls.it PCF is
set to I'D' fOI;

'\

/

/

/

/

,

.,

"',,--/

,-

/

"
,If

''\

(
6.1.82 X37Q5GAA

.

ChICItI.

Level 2 oot fro. trans.it
line adr.

Beceive

,.-

AlQ2

Ho level 2 occur~sd fOr
transmit line adr.

,

'{ f

8

X688

,e(

nov be in process 0
transBitting 1'10'.

Level 2 not frol recei,e
linl adr,

erro~.

1688

PBALD PBTIIll
PlGB P1GB

()

Type 2 Scanner In
~

I,

"
f

"

o
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0

lEN 3705 COftaUNICATIONS COHTRqLLBR
~tPB a COftnuNICATIONS SCAHRII 1fT SYftPTO! INDBX
BOOt,. EIBOI FottCnOR TEStljD
CODB

BRBOB DISCRIPTION

1>99-3105E-09

SUSPBCTED CARD
LOCUION (SI

o

lI'OOI,.

Beceive

X'OO'

No level 2 occurred froD
receive line adr.

AlQ2

13th L2 (5th from
receive addrl. see
notes 1 & 2
in beading of
this routine
for registen
1\ cheeks.

1668

OX 1B

Receive characte!: X' 00'

Level 2 not froD receive
line adr.

13Q2

See rtn beading
notes 1 and 2
for ICII bits 0-7,
registers II checks
be lIade,

1668

OX1F

Receive character

Received data in PDF not =
X'OO' or ICR bits 0-7 in
ertor,.

A3Q2

See rtn heading
notes 1 and 2
for registers
and checks, and leN
bits 0-1 should be.

X666

0120

Transmit ot
completed.

NO level 2 occurred for
trans.it line adr.

13Q2

lijth L2 (9th troll
transmit .. line adr.,
See notes 1 II
2 in headin9 '
of tbis routine
for registez;s
1\ cbeclts.

1688

OX21

Transmit of X'OO'
co.pleted.

Level 2 not from transmit
line adr.

A3Q2

See rtn heading
notes 1 and 2
for registers
II checks.
After this error
display, the
transmit PDP is
set to 1'01' as
the next
character to
transmit. Should
nov be in the
process of
transmitting XI15'.

1688

OX22

lCW bit 39 (reseg re.em~e~
~hould be turn~d on hYthe
scanner becaus'e more th·an
" consecutive zero bits
should have beep received
at this the.

lCIi hit 39;, did, not COme on
for the receive line,

X688

0125

Transmit of X'15'
co.pleted

No level 2 occurred for
transmit line adr.

13Q2

15th L2 (10th frOID
transmit line adr).
See notes 1 1\
2 in beading
of this routine
for registers
& checks.

X686

OX26

Transmit of X'15'
cODpleted

Level 2 not from transmit
line adr.

AlQ2

See rtn heading
notes 1 and 2
for registers
II checks.
After this error
display, the
transmit PD F is
set to X'OO' as
the next
character to
transmit. ShOUld
nov be in the
process of
transmitting X'Ol',

characte~

x'oq'

X'OO'

o
o

See rl~ headl.n9
notes 1 and 2
for registers
and checks.

o

e

transmit tu.naround. Should
now be in process
of tranSBIit Hng

OX1D

o

o

COIIIIENTS

X666

o
o
o

FEALD PETllft
P1GB P1GB

o
Type 2 Scanner 1FT

X3105GAA 6.1.83

ISII 3105 COIl'lUNIC1UOH.S COnBOLLEB
TYPB 2 COIIBONIC1TIORS SCaRRIB 1FT SYBPTOII INDIX
BOUT. BBBOB PURCTIOH TISTID
CODI
0121 Beceive character X'2A'.

B8Boa DISCRIPTIO.

UB8

OX 28

Beceive character X' 21'.

tevel 2 not fro. receive
line adr.

16B8

0129

Beceive character 1'21'.

aeceived data in PDP not
1'21' or lca bits 0-1 in
error.

X688

0121.

Transait of 1'01'
coapleted and trans. it
turn-around

X688

012B

1688

X689

1688

D99-31058-09
SUSPICTID CABD
LOCA'j:IOII(SI
A302

Ho level 2 occurred froa
receive line adr.

plALD PBTIIK
PAGB

PAG!

COKBINtS
16th L2 16th froe
receive addr). See
notes 1 8 2
in beading of
this routine
for registers
II checks.
Last 12 for
receive.

U02
1302

See rtn beading
notes 1 and 2
for registers
nnd Checks. ICW bit
1 Isvc-teq) and bit
1 la synchronizing
sequence bas been
detected) sbould be
on .• ICII bits 0 II 2
Bhould be aU.
After tbiB error
display ·tbe
receive PCP is
set to 0 /10 no
further level 2
interrupts sbould
occur troB tbe
receive line
addr.

90 level 2 occurred fro.
trans.it line adr.

1.302

11th L2 ,,1th froB
trausait line adr.)
and should be last
level 2. See
uotes 1 8 2
in beading of
thi/l routine
for registers
II checks. at
tbis the tbe
tranui t pcr
Bbould ,line
turned around
to pcP-S.

Trans.it of X'01'
coapleted and trans.it
turn-around.

Level 2 not fro. transmit
line adr.

13Q2

OX2C

Transait turn-around.

TransBit PCP did not turn
around to PCP"5.

13Q2

xxxx

Practional Stop Bit BPO: Insure th~t normal trans.ission ot characters for Start-Stop interfaces with an
B/S for. at are followed by fractional C1.Q315) stop bits.

a.

After previous
transmit level 2
Csee error 01261
transBit PCP was
set to X'D' to
cause a turnaround. the
hardware sbould
bave cOBpleted
tbe transBi8s1on
of the character
X'OO' and then
change pcP=5. See
notes 1 II 2
in heading of
this routine
for registers
& checks.

(Hote: This BPQ is restricted to a 31051 with a Type II CO.lunications Scanner, using a Type 2A (TTY) line
set. The .odified oscillator must be installed in Oscillator Position 1 and is modified to operate at 16
times norlal speed. Oscillators are restricted to those whose normal operation is ~5.5 bps, 50.0 bps, 56.89
bps, and 7~.2 bps. Prior to running test, please insure that the proper BPO bit is set in the Configuration

6.1.811 13105GU

Type 2 Scanner 1PT

(

o

o
o
o
o
o
o
o
o

o
"
'
·
G·

IBK 3105 COHHUH1CATIONS CONTROLLER
TY~B 2 COKHUftICAT10NS SCANNER 1Ft SYHPTOK INDEX
ROUT. ERROR rUIiCTION TBSTBD
CODE
Data Set.)
Insure that bit service is
occurring under Transmit
Noraal operation,.

ERROR DESCRIPTION

sqSFECTED CARD
LOCATION (5)

pEALD pETH!!
£lAGB UGE

COMIlENTS

1689

OX01

1689

OX02 'Insure that the SDLC
Counter (ICII bits 34- 37)
cycles from 0 to 16 to
initiate bit service,.

Because of the modified osc01A-A3Q2
illator operating 16 tiles its
norlal speed, gated bit service
is dependent upon the counter
which triggers bit service at
the count of 16. The counter
then resets to 0 and resumes
count for the next bit service.
An error will be flagged if
this counter fails to reach the
count of 16 or if bit service
occurs prior to t~e count of 16.

'rB701

£lretest error.
Check counter
aard.

1689

OX03

Error is flagged when SDp bit 8 01A3T4
does not go to O. This
01A-A3Q2
indicates that the first stop
bit has not been transmitted
normally. could indicate b~t

TB101

Pretest error.
Be-run routine
f or Err or 1 ck.
(Could indicate
a time-out on
loop ~ount.1

Checks transmission of
first stop bit.

Error is flagged to indicate
the character is not s~ifting
out of the SDF.

Ils~.f'lce

Pretest error.
Problem is probab1r in the card
for oscillator
£losition 1.

is ,t!li~in",.

1689

OX 011

checks transmission of
secoQd (last) stop b~t.

Error is flagged wben second
stop bit in SOP 9 does not go
to O. this indicates either
failing bit service or
timeout on the ~oop count.

OU3T4
OU-A3Q2

TB101

Pretest error.
lie-run routine
for IItror 1 ck.

168\1

OX05

Insure that the last or
fractional stop bit does
not exceed .4375 .•

Error is flagged if the last
01A-A3Q2
stop bit does not transmit
Q1A3TIj
norlally but the counter has
exceeded 7. This will show if
the counter as displayed in the
low order of Beg. 5 exceeds 6
and the SDp bit 9 is still
turned on.

TII701

Error could
indicate failing
bit service.

1689

0106

To insure that the last
or fractional stop bit
does not exceed .4315.

Error is flagged if the last
stop bit in SDp position 9
transmits but the counter
exceeds ".

o11-13Q2

TB101

The counter in
ICII bits 34- 31
should read 0
wben the last stop
bit transD~ts. The
counter 1. to activate bit service
and reset when the
bits read 6.

\'

"

o
o

o
o
o

1690

XIXX

SABRB 1IpQ New Sync data lead test. This routine is a manual intervention routine and will not run unless you
set the CE sense switch to run manual intervention routines or unless you request this routine as a single
routine to run. This routine will rUn on SABB! BPQ line sets only. The output of this routine is a square
wave on the 'New Sync' data lead for scoping. The routine will run for two minutes unless you abort it.
This routine will stop with manual intervention stop codes of PO-- asking you for the needed information to
run the test. These PO-- codes may be found near tbe end of this Type 2 cs sympto. index.
There are no error stops in this routine but wbile the routine is running it will display a EO-- code in the
display B lights indication that a s~uare wave output shOUld be available at the 'New Sinc' data lead for
the line under test.

o

o
o

1694

IIXX

PCP state P disable test. This routine is a manual intervention routine and will not be run unless you set
the CE sense switch to run manual intervent~n routines, or unless you requested a single routine to be run.
This routine will stop with manual intervent!On codes of PO-- in display Br asking you to enter the
information required to rUn this routine. These po-- codes lay be found at the end of this symptom index
for the type 2 communication scanner IpT. This test routine does a £lCP=p switched line interface disablQ to
the line Is) fOU entered. The routine;

Type 2 Scanner IpT

e

01A3T4

X3705GAA

6.1.65

IBK 3705 CO!!UHIC1TIORS CONTBOLLEB
2 coaKUBICA~IONS SCANNBB lr~ SYK~TOK INDBI

D99~3705E-09

TY~B

BOUT. BRROR PUNCTIOR TBSTBD
BBRoa DBSCBI~TIOH
SUSfBCTED CABD
PBALD PETKK
CODB
LOCATIOII (5)
P1GB PiGB
1. Disables ('CSB disabled' latch turned anI then enables the scanner under test.
2. Sets the display re~uest bit in the line (ICI, under test.
3. sets scope sync 2.
4. Sets the diagnostic aode bit, and if the line is only synchronous, sets
the sync clock bit in the SOP.
5. Sets pcr=. and LCD=7 for start/stop lines, or LCD=C for synChronous lines.
6. laits for and yalidates that r leyel 2 interrupt occurred for the line under test.
7. Checks that the PCP vent fro. 1 to O. (Set 80de coapleted ok.)
8. Sets pcp=r.
9. laits for and yalidates that a level 2 interrupt occurred for the line under test.
10. Checks that the pcr vent to O.
11. Checks that the scanner display reg (1'46') byte 0, bits 0, 1, 2, 3, and 5 are all
off that indicates the line interface has been reset.
Notes:

()

CO!KBNTS

It should be noted that this routine vill indicate failures on any line interface that
has aode8 interface lines 'clear to send A , 'ring indicator', 'data set ready' or 'receiYe
line signal detector' tied up' to active levels. ror so.e 8Ode8s, data sets and line
set types, it is noraal for Sale of these interface lines to be tied up to an active
(on) level. If you re~ueated all linea to be run, this routine vill bypaaa LIB types
2, 3, and ~ aince they alvaya have aOle interface line active. If the teat indicatea
failures due to lodel iuterface lines being on when they should not be, you could have
a bad interface converter on the line set for the line that failed or there could
be a bad aode8 or data set connected to the line. If none of the lines cOlpleted the
pcp=r portion of the test, the scanner cards lay be bad. It is assumed that tbe otber internal
test routines have been run and that set lodes and internal data vraps vork properly. If
tbis is not true, tbere could be a bad oscillator, a bad line set, a bad LIB, or so.e
scanner failure. The following registers are valid for all error displays in this routine:
Beg 1111'=line address that is under test. (As used to set ABAB.)
Beg X'46'=The scanner display register for tbe line under test.

1694

0101

Set lode.

110 level 2 interrupt occurred.

13B2

U331

B-310
B-260

This error shoul~
not occur if
routines 1627
and 1629 ran
aucca.aflllly.
Suggeat you run
tbose routinea
again. Should
bave had a level
2 interrupt
fros the set lode
and pcr sbould
nov. O. See
notea in tbe
beading of this
routine for
registers anc!
lore inforlstiop.

Set aode.

Level 2 interrupt not frol
the line under test.

13E2

TA331

8-300

Tbis error should
not OCCllr if
routines 1627
and 1629 ran
auecesatully.
Suggest JOu run
those routinea
again. Should
have had s level
2 interrupt fro.
the set lode and
pcr sbould DOV •
O. See notes 111
tbe beading of
this routine for
registers aDd lore
inforaation. Reg
X'tq'=line sdr
that caused
the L2 interrupt.

/,

16911

X6911

0102

OX03

Set lode.

PCP did not go to 0
after aet mode.

~3B2

TA331

B-080

See COlllenta 10
error 0101. Beg
X'14' byte 0
-LCD and
pcr obtained bJ
an Input 1'115'
at the the
of failure.

~

'/

",
/f'
\,

,~

"

1

"'-

(
6.1.86 X370SGU

Type 2 Scanner

Ir~

(,

It

,
/

o
o

o

IBft 3705 COK"UHIC~TIOHS COHTBOLLI~
TYPB 2 CO""UHICATIONS SCA~.la 1fT STftPTOft INDEX
ROUT. EBROR l'URCnOR TESTED
CODE
xe94 01011 PCl'=l' co.pleted .•

0
0
0
0

EBBoa DESCRIfTIOH

1l99-3705E-09

SUSPECTED CARD
LOCUIOR IS)

1'ElLD PETII8
PAGE PAGE
8-3,0

No level 2 interrupt occurrea
after PCP was set to 1'.

131'2

TA8H

r59~

OX05

PC 1'= l' cOlllpleted.!
the line under te$t.

Level 2 interrupt not froll

A3E2

TA331

%694

OX06

PCl'=1' cOllpleted.

PCP did not change to O.

13l'2

TA811

A3E2

TA331

8-300

This error may
bave nothing to
do with the fCP-l'
tea t a1 nce no
other line should
cause a level 2.
See notes in the
heading of this
routine for
registers and
more information.
Beg X'14' contains
the line adr
that caused
the level 2
interrupt.

8-060

Hardware should hay
changed PCP to 0
from PCFaF after
the 1I0deil interface is reset.
I f 'Data Set
Beady' and 'Receive
Line Signal Detect'
interface lines did
not reset properly.
PCl' II1lly stiU r. See notes in
the beading of
this routine fo~
more information.

8-150

Beg X' 14'=
Reg X'1I6'
at the time of
failure. Hote:
reg X'46' is
loaded every
scan cycle
so it II1I1Y not be •
to reg X'1'"
at this the.
Reg X'15' bas a
bit on for each
bit poa1t1on
that is bad in
reg X'14'. See
notes in heading
of this routine
for .ore
information.

0

0
0

8-260

U
~

:

\1;

"'1

0

t694

0%07

80de. interface res.t.

1698

xx XX

Diagnostic tran$ait test eor pCF=B. This routine is II manual intervention routine and will not be rUD
unless you set the CB senSe switch to run Illnual intervention routines, or unless you requested II single
routine to be run. This routine will stop with manual intervention codes of ro-- in display B, asking you
to enter the infor.at1on required to run this routine. These FO-- codes may be found at the end of this
symptom index for the type 2 comllunication scanner 1F1. This routine transmits a PAD character IX'Ff'). and
2 data characters Cl'AA'I, The routine sets fCl'aB to transmit the second data character, then the scanner
seta pcr.e & chacka thl!.t the tran8llit line turned around. This is I. unual intervention routine because
FCP=C turnaround requires the 'clear to send' mode II interface line to drop and this does not occur on Bome
model interfaces t~at haVe this'line tied up to an aative (on) level. This routine runs on start/stop lines
only, and uses LCD.7.

0

0

e
0

0

e

COIIUNTS
No level 2
interrupt will
occur if sOllie
modem interface
lines did not
reset. See notes
in the heading
of this routine
for registers ana
.ore information.

Qotes:

e
Type 2 Scanner IFT

All aodem interface lines
that sbould be reset lire
not r.aset.

This routine inQ1cates a failure on any line interface that does not drop the 'clear to
send' Dodea interface line. If 'clear to send' should not be on for this interface, you should
suspect the line set card for the failing line. If all lines fail, there may be a bad
scanner card. Errors 0101 through OX05 should not occur and if they do you should run routine X645

13705GAA 6.1.87

IBK 3705 COKftURICATIOHS CORTBOLLBB
TYPB 2 COftftUHICATIOHS SCARRBB IrT SYftPTOK INDBX

D99-3705B-09

ROOT. BBBOB lOHCTIO. TBSTBD
ERBOB DBSCRIPTION
SO~PECTBD CABD
rBALD rETKK
CODB
LOCATIOHISI
PAGE PAGE
to tr, to find the failure. The following registers are setup for all error displa,s:

COftftBHTS

Beg X'11'-Line address of line under test ,as used to set AB1R).
Beg X'~6'·Scanner display register and is valid for the line under test.
Beg X'1~'=Line that caused the L2 interrupt for errors that saf
'L2 interrupt not froa the line under test'.
X698

OX01

Transait of PAD coapleted.

80

X698

OX02

Transait of PAD co.pleted.

X698

OX03

Transait of PAD coapleted.

level 2 interrupt occurred.

A3L2

TA611

B-310
B-260

Level 2 interrupt not frol
the line under test.

13L2

TA611

B-300

pcr did not go to 9.

13r2

TAB11

B-080

pcr set to
8 by prograa
for transait
initial. The
scanner hardware
shou14 ba"
chang84 it to 9.
See notes in
the beadiDg of
tbis roqtine.

X698

OXO_

Transait of 1st data (X'AA'I
coaplated.

10 level 2 interrupt occurred.

A3L2

TA611

11-310
B-260

x698

OX05

Transait of 1st data (I'AA'I
co.pleted.

Level 2 interrupt not froa
the liDe under test.

UL2

T1611

B-300

See routine
beadiDg notes
After tbh
error 4isplaf,
tbe pcr is
set to B.

x698

OX 06

Tnns.it of 2nd data (X'U"
coaplet,ed,

Ro

UL2

TA611

B-080
11-3'0
B-260

If 'c-t-s'

X698

0107

Tnnsait of 2nd datil 'X'U"
co.pleted.

Level 2 interrupt not froa
the line under test.

A3L2

'U.611

B-300

X698

OX08

pcr went to 7.

pcr did not set to 7
after transait turnaround.

A3r2

TABll

B-080

pcr was changed
to C bf tbe
bardware, an
an additional ~it
Hlle should
occur and if
'clear to send'
is off, per
sbould be cbanged
to 7 bJ tbe
scanner hardware.
See notes in the
heading of tbis
routine for
lore inforaation.

X69~

OX09

SDr

SDr bits 0-7 did not

13H2

tA22'

B-480

Turnaround sbould
leave SDr-O. See
notes in the
heading of tl\~s
routine for
aore infor.atton.

TA221

B-Q80

Turnaround shOUld
leave SDr-O •
See notes in the
heading of this
routine for
aore information.

O.

lo~al

2 interrupt occurred.

" O.

X698

OXOA

SDr

6.1.88 X3705GU

= O.

SO,, bits 8'.! 9 did not
• O.

'~,

did not drop, tbis
interrupt will
not occur. pcr
sbou14 have been
cbanged to C U
the last data
cbaracter was
tnnsaitted ok.
See notes in the
UadiDg of tbis
rout iDe for
lore inforaation.

Tfpe 2 Scanner IPT

(

,/

o
o
o
0
O.

IBft 3105 COftftOHICATIONS CONTIOLLla
TYPE 2 COaaq.ICATIOBS SCA•• IB If~ StaPfoa IHDBI

•

BOOT. IBIoa fOHCfIOH TISflD
IBBOB DBSCBIPfIOB
SOSPICflD C1BD
fElLD flTaa
CORRBNTS
CaDI
LOC1TION(S)
P1GE P1GE
1699 lUI Diagnostic transsit test for PCf-C. This routine ia a sanual intervention rontine and vill not be run unlesa
you set the CB sense svitc~ to run sanual intervention routines, or unleas y,ou requested a single routine to
be run. This routine vill stop vith lanual intervention codes of fO-- in display B, asking you to enter tbe
inforsation required to run this routine. These fo-- codes say be found at the end of tbis sYlptoa index for
the type 2 cossunication scanner If!. This routine transaits I PAD character (X'll'), and 2 data characters
(X'AAI). The routine tranasita tbe second data character, then sets PCr-C and cbecks t~e 'clear to send'
.odes interface line to drop and thia 40es not occur on aOle sodes interfacea that ~a,e this line tied up
to an acti,e (onl ley81. 'fbia routine runs on DtC 11ne on~l" and nna LCD-g.

0

Thi. routine indicata. a failure on any line interface tbat doe. not drop the 'clear to .. nd' lode.
interface line. If 'clear to .end' sbould not be on for this interfaoe, you should .uspect the line set
card for the failing line. If all lines fail, tbere say be a bad scanner card. Errors OIOt through 0105
sbould not occur and if they do you shOUld run routine 1645 ~o tti to find the failure, fhe following
regiaters are setup for all error displays;,

0

Beg 1'11'~Line address of line under test (aa used to set ABAI).
Beg X"6'aScanner display register and is yalid for tbe line under test.
Beg I',"-Line tbat caused tbe L2 interrupt for errors that say
't2 interrupt ~ot fros the line under test'.

0

0
0

D99-31051-09

B-310
8-260

See notes in the
heading of this
rOil tiDe.

11-300

See notes in the
b1iladiDg of this
routine.

' 1699

0101

Trans, it of 1st data
(X'U'I cospleted.

Bo level 2 interrupt
occurred.

A3L2

X699

0102

Trans,it of 1st data
IX'U'I cOlpleted.

Leyel 2 interrupt not :ro.
the line under teet

A3L2

~~99

0103

Trans, it of 1st data
IX'U') cOlpleted.

PCI' did not go to 9,.

1312

'fAa"

B-oao PCl vas set to a

li699

010'

Translit of 2nd data
(X'AA') cospleted.

10 level 2 interrupt occurred.

UL2

TA611

B-310
B-260

See notes in tbe
heading of tbis
routine.

X699

Olt05

!ranslit of 2nd data
11'11') coapleted.

Level 2 interropt not frol
the line under test.

13L2

'U611

B-300

See notes in tbe
heading of this
routine. After
this error d1splai,
tbe pel is set
to B.

1699

OX06

Translit turn coapleted.

10 leyel 2 interrupt occurred.

AlL2

X699

0107

Trans.it turn coapleted.

Level 2 interrupt not fros
the line under test.

13L2

X699

OX08

PCl vent to 5.

PCl did not set to 5
after tranalit turnaround.

131'2

TA611

by prograa for
transsit initial.
The scanner hardvare should have
cbanged it to 9.
See notes in the
heading of this
routine.

U
0
0
0
0
0
0

Type 2 Scanner IlT

II-oao If 'clear to send'

8-310
8-260

did not drop, this
interrupt vill not
occur. PCl sbould
have cbanged to 5
if the last data
character vas
trans8itted ok. See
notes in the beading of tbis routine
for lore inforsation.

'U611

B-300

See notes in the
heading of tbis
routine.

TA811

11-080

After PCl vas set
to C, an additional
bit Use should
occur and if 'clear

13105GU 6.1.89

if '
\l ,I"
if- "

'{.J
IBa 3705 COM~UHIC~TIONS CONTROLLER
2 COKKUNICATIOHS SCANNER 1FT SYMPTO~ INDEX

1l99-3105E-09

TY~E

ROUT. ERROR PUNCTION TESTED
CODE

ERROR DESCRIPTION

SUSPECTED CARD
LOCATION (S)

PEALD PETIIM
fAGE PAGE

XXXX

,-\,

COMMENTS
to send' is off,
PCP should be
changed to !i by
tbe scanner hardware. See notes
in the beading of
this routine for
more information.

169C

(j

!\

(

'i __ '

nodem interface cbeck. Tbis routine is a manual intervention routine and will not run unless you set the CB
sense switch to run manual intervention routines, or unless you requested a single routine to be run. Thi.
routine stops with manual intervention ,codes of PO-- in display B asking you to enter the information
required to run this routine. These FO-- codes may be found at the end of this symptom index for the type 2
communication scanner IPT. This routine checks that the modem interface lines 'clear to send' and 'receive
line signal detector' are not on, and that the 'receive data bit' tuffer is on. This test is run with
'request to send' off and diagnostic wrap mode off.
Notes:

This routine will indicate failures on all modem interface and/or line sets that
have 'clear to send' and 'receive line signal detector' ties up to active (on) leyels.
Example - all LIB type 2 telegraph line sets should have 'receive line signal
detector' active all the time and should cause failures. If failures occur and the
interface line in error should not have lines tied to active levels, suspect
a bad line set card or modem interface problem. The following registers ara
setup for error displays:
Beg 1'11'=Line address (as used to set ABAP) of tbe line under test.
Reg X'ij6'=The scanner display register which should be loaded by the scanner
every scan cycle for the line under test.
Reg X'lij'=What was in the display reg 1'46' at the time the failure
was detected. Peg X'14' may not = reg X'46' if yOU display
reg X'46' since reg X'46' may be cbanged on eacb scan
cycle.
Beg X'15' contains bits in error with each bit pOSition that is on
representing the bit position in reg 1'14' that is in error.

X69C

0101

1I0dem interface.

X6CE

XXXX

Modem, auto-calI-originate, DLC link test and external wrap test. This is a manual intervention routine and
will not be run unless you set the CE sense switch to run manual intervention routines or unless you .a~e a
single routine request. See notes after step 18 writeup for restrictions on use of Full-Duplex modems,
ful~-duplex line set interfaces and other wr~p options.
You should not have the 'loop on first error' or
'restart rout\ne on llirst erro!;', ~E, sense s"i~ches on while this routine is running since this routine I
always causes ,a repeat 'of prevlou~ly exeduted,steps it any errors a~e detected. If you get an error stop
code, you lIay 'use the continue function (function 5) to cause the test to restart. The restart point varies
according to the type of error and the step within the test. You !Day ,also use the dynamic communications
function of the DC! to pass some restart or loop requests to this routine. The accepted dynamic
cOllmunication codes are defined in step 18 of this routine heading. This routine will stop with manual
intervention stop codes from P030 through POQ2 in sequence asking you for the test options and line
addresses to be tested. Some of the P030 tbrough POQ2 stop codes viII be bypassed according to wbat options
you have previously selected. These stop codes are defined near the end of the Type 2 communication Scanner
IP~ symptoa Index.
This routine is designed to test line set cards and/or IBH modems and/or IBII auto call
originate or IBM local attachments. This routine may also be used with non-IBa modems/data sets and/or auto
call originate eguipment but 1s only intended as an IBN line driver and terminator test in the line set
cards and not as a test of the non-ISH equipment. During the running of this routine the timer interrupt
dependent functions within the DCM vill not function properly due to the fact that this routine ,intercepts
all timer interrupts. This means that the DCH utility functions to display or stop during tiler interrupts
and the scoping indicator in display B byte 0 bit ~ will not operate. lou should not use the IlCA utility
function for address compare level 1 interrupt while this routine i. runninq or overrun/uoderrun or other
ICW bits 0-4 errors may occurr.

Interface lines not in
expected condition.

B-150

Reg 1'14'
byte 0 bit 0
is the 'cts'
bit and should be
off: bit 3 is the
'receive line
signal detector'
bit and should
be off; bit "
is' the receive
datil tit buffer
bit and
should be on.

This routine is broken down into steps, each of which performs one or more functions. Each step is assigned
a nuber. Each step number uy be referenced as a reetllrt point lifter an error stop code is displayed or all
a dynamic communication. option entered. All references to going to another step 3fter an error stop,
IIssume either that you used the continue function (select fUDction 5 and press the start push button) or
that the bypass error stop and bypass Dew error stop CE sense switches are on.

6.1.90 X3705GAA

Type 2 Scanner 1PT

""'-- . /

o

o
o
o
o
o
o

o
o
o

IBH 3705 COftMUNICATIONS CONTBOLLER
TIPE 2 COMnUNlcATIONS SCAN"2B 1FT SyaPTOn INDEX
BOUT. ERBOR FUNCTION TB5T2D
ERRoa DBSCRIPTION
SUSPECTED CARD
COOB
LOCATION(S)
NOTB 1: No card calling is done within this routine. The IBn CB should refer to the
Haintenance Procedures for IBn Integrated Kodems in the PETHH for trouble shooting
IBM integrated lodems. The line set interface pages in the PETaK should be referenced
for line interface drivers, terminators and cable connections ;0 external interfaces.
NOTE 2:

HOTB II:

Pull-duplex line sets and modems should be tested with the following restrictions.
You should always select option 0003 (wrap datal ~hen you get manual intervention
stop code r030. If you want to do a transmit only test then you sbould select the
'ignore receive interrupts' option vhen you get tbe FOll2 stop code. If you want to
do a receive only test you sbould select the 'transmit all ones' option when you get
tbe FOliO stop code. The receive onlI test vill vork only for 'OLC link test', 'receive
all ones', 'receive all zeros' or , gnore receive interrupts' options. When you are
asked for the transmit and receive line addresses you should select botb the transmit
and receive line addresses that are connecte~ to the same full-duplex interface.
The above restrictions are not program enforced since you aay select to do an internal
diagnostic wrap for modem self-test or to internally wrap betveen a single side of a
full-duplex interface to a different interface.
'

X6CS

OxOl

Auto Call originate.

SDP bits are in error or
LCD is not =3 or pcr is
not .. O.

Beg. X'l~' byte O~
LCD in bits 0-3
I: PCF i,o hi til
4-1: byte 1
bits 0-7 are SOl'
bits 0-7. only bit
, of the SOP, paver
indicator (PWI)
should be on.
sor bit definitions
for auto call are:
Bit O-Interrupt
remember.
Bit ,=Fower
indicator.
Bit 2=c8l1 request.
Bit 3=Data Line
occupied.
Bit 4=Present next
digit.
Bit 5=call ori9
status.
Bit 7=Abandon call
and retry.

X6CE

OX02

Auto Call originate.

No level 2 interrupt occurred
after an auto call interface
reset or level 2 interrupt vas
fro. the ~rong line address.

If lIeg. X'1I1'=
o no L2 occurred;
reg X'll1'= addl:
cllll&1ng the L2.

X6CE

OX03

Auto call originate

After atte.pted reset of auto
call interface by setting the
FCF to F, the LCD is not=3,
PCl' did not go to 0" or
SDF bits are in error.

See cOII.ents in
error code 0101
for reg and SDF
definition.

X6CE

OXOq

Auto call originate.

Character service request bit
(ICW Bit 1) is not on or
PDF is not=O.

Beg

No level 2 interrupt occurred
after switched line reset

If reg X'1ij'=OOOO
no 1,2 occurred;

"

o

o

o
o

COHUNTS

PAGB

NOTE 3: for examples on using tbis routine, refer to examples witb the lanual intervention stop
codes.

f~

o

FEALO FETIIII
PAGB

Por external wrap options utilizing a wrap block an error may occur indicating ICW
Bit II (Receive Line 5i' nal Detect) is not on for the re,ceive line. This may be attributed
to carrier not being present at the wrap block. On ElA interfaces the 'request to send' interface
pin should be jumpered via a 'Y' jumper to both tbe 'clear to send' interface pin on
tbe same interface and to tbe 'receive line signal detect' pin on the other
interface.

u:·'
o
o

D99-3705E-09

X6CE

0106

Setup of switched
receive line address.

Type 2 Scanner 1FT

l'l~'=ICW

bits 0-15 with

the service-request
bit in byte 0
bit 1 and the
autocall interface
PDF in byte 1
bits 0-1.

X3705GU 6.1.91

'('
, jl

IBK 3105 COKftONICA~IPNS COM~BOLLER
TYPE ~ COK"DUICAT10NS SCANNER 1FT ST"PTOK
ROOT. ERROR FUNCTION TESTED
CODE

1l99- 37 051:- 09

INP~l

ERROR DESCRIPTION
(PCF=F), or a level 2 interrupt
occurred froa the wrong line
address.

SUSPECTED CARD
LOCATION (S)

FEALD FETIII!

PAGE

PAGE

COIIIIENTS
I:8g %'14'· adClr
tbat causeCl the L2.

X6CE

0107

Setup of switcbed
receive line address.

Tbe receive line LCD has
cbanged or the PCF did not
get changed to 0 from F wben
doing switcbed line reset.

Reg X'13' byte 0=
expected LCD in
bits 0-3. Reg
1'14' byte 0 is tbe
actual LCD in bits
0-3 & actual pcr in
bits 4-1.

16CE

0108

Setup of switched receive
line address.

The modem interface line bits
in the display register are
in error for the receive
line address.

Reg X' 111'= bits
from X'46' (scanner
display register.)
Only bit 4
(teceiYe data
bit buffet)
should be on tOt a
switched line in
J:eset condition.
Bit O=C'lS.
II1t 1"Ring indo
Bit 2=0511.
Bit 3=Rec linesignal det.
Bit 4=Receive d~ta
bit buffer.
Bit 5=PiagDostic
wnp lIIoile.

16CE

0109

Setup of switched
receiYe line address.

Cbaracter service reguest
bit (ICW bit 1) is not on,
PDF 1s not=I'OO' or any of
lC~ bits 0,2 or 3 are on.

Reg 1'14'= PDF in
byte 1 bits 0-7 and
reg 1'14' by~e 0XCII bits 0~1.
lCIl b~j;S.l .
(svc-reg) shou14
be on, lCW bits 0,
2,3,4,6 & 8
sbould be off. lCW
bit definitions
are:
Bit O=stop bit c~.
Bit l=SeJ:vice
reguest.
Bit 2=Cbaracter
overrun/
underrun.
Bit 3=ftode. cbeck.
Bit 4=ReceiYe lineSignal Cletect
8it 5- is ignored
Bit 6-Program flag
Bit 7"Pad flag.

X6CE

OXOA

Set mode for switched
receive line address.

Level 2 interrupt did not
occur for set mode or a level
2 interrupt occurred from
the wrong line address.

Reg 1'14'=all zeros
if no L2 occurreCl;
reg l' 14 haddr
that c~used the L2.

X6CE

OlOB

Set mode for switched
receive line address.

The LCD changed or the PCF not=O
after set mode completion.

"

''(

Reg 1'13'
bits 0.0-3
is the LCD useil
Cluring set lIoile.
Beg 1'14' byte 0=
LCD in bits 0- 3
and PCF in bits
4-7 after set
mode.

X6CE

OXOC

Set aode for switched
receiye line address.

The modem interface line bits
in tbe displar register are
in error.

See cOlDment for
error stop OX08

(.
6.1.92 X3705GU

Type 2 Scanner 1FT

(

,c

o

o
o
o
o
o

IBft 3705 COftftOHIClTIOHS CONTROLLER
TYfE 2 COftftOHICATIONS SCANNER 1FT SYRPTOR INDBX
nOUT. BRROB FUNCTION TESTED
CO DB
X6CB OXOD Set aode for switched
receive line address.

o
o
o
o

Character service request bit
(XCI Bit " is not on, PDF i.
notaO or any error bits on.

PBALD PETRft
PAGB PAGB

CORRBNTS
See cosment tor
error stop 0109

0112

Setup of switched or
autocall t rails ait lille

No level 2 occurred after a
svitcbeoS line reset (PCF-F,
froa the wrollg lille address.

If reg X'111'
.. 0000, no L2
l',q'= add.: that
caused the L2.

~6CB

OIU

Setup of svitcheoS or
autocall trallsait line
address.

The switched line re.et has
changed the LCD or the PCF
has not been forced to O.

Beg X'13' byte 0
bits 0-3=LCD used
before reset. Reg
X',q' byte 0= LCD
in bits 0-3
and PCF in bits
11-7 after
line reset.

I6CB

OIH

Setup of switched or
autocall transsit line
address.

the aodes interface line bits
in the display register are
ill error.

See co. sent fOl:
euor stop OX08.

X6CB

OX15

setup of sllitched or
autocall transsit line
address.

Character service request
bit (ICI bit " is not set,
PDP is notaO or any error
bi t (s) on.

See cos sent for
error stop OX09

X6CB

OH6

Set so de for switched
transait line address.

80 level 2 interrupt occurred
after a set sode or a level 2
interrupt occurred froa wrong
line address.

Set 80de done
with the externalclock bit and the
diagnostic lode bit
off but with any
other set aode
bits selected
except the 'data
tersinal ready'
bit, is always
turned on. If reg
X',q'= all zeros,
no L2 occurred,
else reg X' 1q'
contains the
address of the
interrupting line.

X6CB

OX17

Set aode for switched
transsit line address.

the LCD changed during a set
80de or the PCP did not
change to O.

LCD in Reg
X'13' bits 0.0-3
used for set sode.
Reg X'14 byte 0 bit
0-3=LCD & bits q-7
• lICF froa ICII
afte~ set 80de.

~6CB

OX18

Set sode for switche",
transsi\: line ~jl4dress.

the sodes interface line bits
"in, the diSlll,IlY 'register are
in I error.
'

I6CE

ox 19

Set sode for switched
transait line address.

Character service request bit
(ICI bit 1) is not set, or lIDF
is not=OO or aoy other
bit on in error.

X6CB

OX1F

Any type of switched and
line connection established
by CB by dialing.

No level 2 interrupt is pending
after the progral has looped
for 3 ainutes waiting for CB
to press the STARt
puSh button and progras
will loop, vaiting for a L2
interrupt pending, for
another 3 sinutes.

o

o

SUSl'BC::-:BD C~BD
LOCAtION(S,

16CB

o
o

E8808 DISCRIPtIOM

D99-370SE-09

type 2 ScaDoer 1Ft

see cos sent for
errorfstop OX08

See cos sent for
error stop 0109

X3705GAA 6.,.93

f \
'( j

IBM 3105 COM"UNICATIONS CONTROLLER
TYPE 2 COMMUNICATIONS SCANNER 1FT SYMPTOM INDEX

099-3705B-09

ROUT. ERROB FUNCTION TESTED
CODE
16CB OX20 Dial on autocall
originate line interface

ERROB OBSCRIPTION

16CE

0123

Dial on autocall
originate line interface.

No L2 interrupt is pending
within 8 maximum wait time of
20 seconds.

After a 1.5 _ilisecond delay to
within 20 seconds
an interrupt should
haY e occurred
frail autocal1
unit. Both
this and the
previous error
stop indicate
a failure in
autocall timing.

16CE

OX2Q

Dial on autocall
originate line interface.

While waiting for a L2 interrupt
trom auto call line interface
a level 2 interrupt occurred
from seme other line address.

Beg X'11'. auto
call Une adar.
Reg X'1~'" addr
that caused the L2.

X6CE

OX25

Dial on autocall originate
line interface

The LCD is not=3 or PCP is
not=4 or SOP bits are in
error.

Reg X'14' byte a =
LCD in bits 0-3 & P
bits 4-7. Beg X'14'
byte 1=SOP and
should = X'F8'.
The following bit
definitions are SOP
bit definitions for
autocall interface:
Bit O=IB should
be on
Bit 1=PWI should
be on
Bit 2=CBQ should
be on
Bit 3=OLO should
be on
Bit q=PND sbould
be on
Bit 5=DPB should
be off
Bit 6=COS should
be off
Bit 1=ACR should
be off

X6CE

OX26

Dial on autocall
originate line interface

Character service request
bit (ICi Bit 1) is not on
or PDF is not=OO or any
other error hits on.

See comment in
error stop OX09
for register and
ICW bit def.

X6CE

OX28

Dial on autocall
originate line interface.

No L2 interrupt occurred from
autocall or a L2 interrupt
occurred froll sOlie other'
line address.

The dial. digit
was set in PDF,
PCP was set to a.
If reg X'14'= 0000
no L2 occurred.
If reg X'14' is not
all zeros then reg
X'14'= addr that
caused the level 2.

A L2 interrupt occurred
within 500 milliseconds

SUSPECTED CARD
LOCATION (5 I

FEALD fETMM
PAGE PAGE

COHIIENTS
set auto call PCP
to " to cause
the CRQ latch to
be set on the
next bit tille.
IBII autoca11
units have a
linimull of 1.5
seconds delay
before PHD should
be set.
Beg X'1S' contains
address of line
causing L2
interrupt.

(
6.1.94 I3105GAA

Type 2 Scanner 1FT

(

..

IBK 3705 CO"ftUHIC~TIONS CONTROLLBR
TYPE 2 COK"DHIC~TIONS SC~MNBB IPT 5YHPTOft INDBX

e

lOUT. lanOR rUNCTIOH 'ISTID
lC6cB

COOl!
0129

1I:6CE

OX2~

.BaOB nl.CRIPTIOI

Dial on autooall
originate line interface

The aut OOaU pcr 18 not-/j
or LCD i. not-3 Ot sor bits
in error.

Dial on autocall
originate line interface.

Charaoter service request bit
(ICIi bit 11 is not on.

0
0

0
0
0

0

IU9I'JlC'U1)

C~BD

tOCUJIIN(lI)

'BALD ••TH"
PAU. PAOI!

CONK.NTB
Reg X'14' byte 0
contain. LCD
in bi til 0-3 and
pcr in bits 4-7.
Byte 1 contains
the Sop and
.hou14 be -X'P8'.
Bit 0-18 should
be on
Bit 1=PIII shOUld
be on.
Bit 2=CBO should
be on
Bit 3=DLO should
be on
Bit q-PND should
be on
Bit S=DPB sbould
be off
Bit 6=COS sbould
be off
Bit 7-ACB should
be off
Reg X'111' byte
ICIi bits
0-7 obtaine4 via
an input X'1I4' frol
auto call ICII.

o•

The last digit to dial is nov in the process of being dialed. If the last digit vas not an EOR digit then
PRO aay coae on if the distant station does not ansver i.mediately. The saae thing will occur vith EOR as
last digit au sale OBft (nOn-IBK) and on 18! autocall units that do not have the EOR feature strapped on.
ror soae OE! autaoall units the EOR vill cause the autocall unit to transfer control to the aodel/data set
vith Data Set Ready set i.aediately even though no distant station bas been connected and given an answer.

0
0
0

IEeB

012B

Dial on auto call
originate line interface

SOP autocall interface bits
power indicator (PiI). or
call request (CBO) or data
line occupied (01.0) are not
on.

Beg X'lS' byte 1
contains PilI in
bit 1 CDO in
bit 2 and 01.0
in bit 3.

X6CB

OX2l'

Dial on autocall
originate line interface.

Ho autocall coapletion.

Reg X'15' byte 1
bit 0 = 1 if pcr
vas set to 5.
If bit 2=1 then
a rec line level
2 interrupt
has occurred.
If bit 3= 1 tben
the abandon call
and retry (lCB)
bit is set.
If bit q=l then
a L2 occurred
on the auto call
line.

X6CB

0130

Dial on autocall
originate line interface.

During 60 second wait for level
2 frOB auto Call line interface
after dialing last dial 4igit
a l2 occurred froa soae line
otber the auto call line
interface address.

Reg X'14'- addr
causing the 1.2.
Beg X'16' = addr
of auto call line
interface the L2
was expected from.

X6CE

OX 110

Complete switched
connections.

Ho 1.2 occurred from switched
trans.it line address.

'DSR' did not
coae on and cause
a L2 interrupt
properly. Beg
X'11': x.it l1ne
address L2 was
expected from.

0

0

e
e
0

e
e

Type 2 Scanner trT

X370SGU 6.1.95

lBn 3105 CO"~UNIC~TIONS CONTROLLER
rYPE 2 CO"~DNICATlaNS SCANNEB 1FT SYHPTO" INDEX
ROUT,. EBBOR pUNcnON TESTED
CODE
X6CE OXql Complete switched
connections.

099-3705£-09

EaaOD DESCDIPTION
The L2 interrupt
while waiting GO
'data set ready'
was not from the
address.

which occurred
seconds for
to come on
transmit line

SUSPECTED CARD
LOCAtION (5)

PEltD PETn"
PAGE

PAGE

COHII!N'I!S
Beg X'lQ' = addr
that caused the L2.
Beg X'11'= transmit
line addr the
L2 was expected
from.

XGCE

OXq2

Complete switched
connections.

The transmit line LCD and
PCP are not valid.

XGCE

OXq3

Complete switched
connections.

Character service request bit
(ICW bit '1 is not on or error
if lCW bits 0,2 or 3 are on.

XGCE

OXq~

Complete switched
connections

No level 2 interrupt
occurred from switched
receive line ad~rese.

Data Set Beady
did not come on
and cause a L2
interrupt request.
Reg X",'. receive
line address.

XGCE

OXQ5

Complete switched
connections.

The L2 interrupt
while waiting 60
'data set ready'
was not from the
ac1dress.

Beg X~lQ'.addr of
line causing the
level 2 interrupt.
Reg X"" =recelve
line address the t2
was expected tro ••

XGCE

OXQG

Complete switched
connections

The receive line LCD is
not VIIl1~.

Reg X'45' byte 0=
receive lines LCD
in bits 0-3.

XGCE

OXQ7

Complete switched
connections.

Character service request bit
(ICIi bit 11 is not on or lew
bits 0,2 or 3 are on.

See cOlllment for
error stop OXQ3 ••

XGCE

0150

Set mode on transmit line

No level 2 interrupt
occurred fro. transmit line
or L2 from wrong address.

If reg X',Q'= 0
then no level 2
interrupt occurred.
If reg X'14' is not
0000, reg X' 14'"
the addr that
caused the L2.
Reg 1'45' byte 0=
tCD in bits 0-3
and should be
equal to what
you optioned,
and bits Q-7
contains the PCI'.

X6CE

OISl

Set mode on transmit line

Transmit line LCD in error or
PCP not=O.

Beg X'Q5' byte 0=
LCD in bits 0-3 &
PCl' in bits 4-7.

6.1.96 X3705GAA

which occurre~
seconds for
to come on
receive line

Beg X'45' byte
o • tCD in
bits 0-3 S pcr in
bits Q-1. Beg X'IS'
byte 0 has a bit on
for each bit
position that is
in error in·
re~ 1'45' byte O.
Reg X'14' byte
lCIi 0-7.
Bits 0-3 are:
bit 0 - stop bit
. check - off
Bit 1 - service
reguest - on
Bit 2 - Cha:r:
overrun;
Ilnderrun
- off
8it 3 - "odell
cbeck - off.

o•

Type 2 Scanner 1FT

---------------_._--'._-,.,,,

o
o

Isa 3105 COftKUMICAfIORS COHflOLLBR
ftPB 2 COllOqICAfIOHS SCA.,BR Irf Sf.PTaI IIDBI
lOUT. BBIOB rUBCTIOI flSflP
CODI
16CI 0152 Set sode on transsit line

o
o
o
o
o

BBROR DBSClIPTIOH
Character ser,ice re~uest bit
(ICI bit 11 is not on or ICI
bits o,a or 3 are on.

1199-37051-09
CAID
LOCATIOIUI)

SUSPB~BD

rlAtD pnlla

l'AGB

IAGB

CO II II! II 'I S
See cos sent for
error Itop 0143.

16CI

0153

Set sode on recei,e line

110 le,el 2 interrupt occurred
or le,el 2 interrnpt was
not fros the receive line
addresllo

16CI

OX54

Set sode on receive line

lecei,e line LCD 10 error or
PCP not. O.

Beg 1'45' bJte
o • LCD in
bits 0-3 6 fcr
in bits 4-1.

16CB

0155

Set sode on recei,e line

Character ser,ice reguest bit
(ICI bit 1) is not on or ICI
bit. 0,2 or 3 are on.

See co ••ents for
error IItop 0143.

X6CI

0160

Set trans.it initial

HO L2 interrupt was received
fros transsit line.

A L2 should occur
vithin 30 seconds
after 'CTS'
has been brought
IIp by the
80d81 and the
first character
that VIIS put,:in SOP is

0,

COsPlt·~elf

trails ltted.

0
,

0161

Set transmit initial

fhe interrupt received was not
tros transmit line address.

leg X'1Q' • addr
of the interrupting
line. leg II",
egual the trans.it
line the L2 VIIS
expected fro ••

16CI

OIU

set transsit initial

'lhe tr8ns.it LCD i. nQt vali401:
the pcr is not -9.

leg 1'45' bIte 0LCD in bits 0-3 S
pcr in bits 4-7.
leg 1'15' byte 0
has a bit on for
each bit position
is in error in
leg I'Q5'
bIte 0.'

X6CB

0163

Set trans.it initial

Character service reguest bit
(ICI bit ') is not on or lCI
bits 0,2 or 3 are on.

,

0
0
0
0
0
0

e
e

I6CI

-e

16CB

01611

16CB

(6CB

16CB

See co.sents under
code 0143 for .o,e

1nfo,~ation.

in~errupts

Wait for charactel: service

BO level 2 interrupt occurre4
fros receive line.

0166

lait for character service
interrupts

Ho level 2 interrupt occurred
fros receive line address.

Reg 1'11'~ ,eceive
Une addr X. 2
vas expecte/l frol.
leg 1!14' ..
received
character count.

0167

lait for character service
interrupts.

~ro.

Mo L2 interrupt vas received
trans.it line .44ress.

Beg X'11'. transmit
line address L2 vas'
expected fro ••
Reg l'lQ' • the
tranea1tted
cbaracter count.

0168

W.it for character service
interrupts

A L2 interrupt occurred fro.
an address ether tban the
trans.it or recei,e line.

Beg X'1Q' .. addr
of the interrupting
Une caused the

'lfpe 2 Scanner IPT

1310SGAA 6.1.97

o
:()
IBft 3705 COBNUBICATIO.S CONTROLLBR
TY~I 2 COIIONICATIOBS SCAHHBR 1ft S~"PTO" IHDIX

1l99-3705&-09

BOUT. BRaoa POHCTIO. TBSTBD
CO DB

BaROR DBSCRIPTIO.

16CB

0170

Transsit line interrupts

The trans8it LCD or pcr is in
error,.

.eg X'11 ' • trans.it
aadr. Beg X'1SI
bIte 0= actual
(bad) LCD ana
pcr. Byte 1expected LCD
ana Pc,.

16CB

0171

Transsit line interrupts

The transsit LCD or pcr
is in error.

Beg X'1S' byte 0-,
actaal (bad) LCD &
pcr~ 8yte ,. the
expectea LCD II PCf.

16CB

0172

Transsit line interrupts

Character service request bit
(ICW bit 1) is not on or ICW
bits 0,2 or 3 are on.

Beg 1'151 byte O-IC
bits 0-7. lIi1:S
0-3 atel
O.J ",top bit
, cbeck.
Bit 1 • BYC re~
Bit 2 • Char o'erru
underrun
8it 3 • Bodes check

Bore characters have been
received than vere tran.sitte4.

Beg X'1Q' -received
character count.
Beg 1'15' ..
trans8itted
cbar count.

SUSPBCTBD CARD
LOC1UOH (51

rULp nUB
PAGB flGB

()

COBURU
l.vel 2 interrupt.

X6CB

OX73

Transsit line interrupts

pit

16CB

0174

Transsit lin8 interrupts

20 sore characters have been
sent than vere received.

See registers in
error code OX73.

X6CB

0180

aeceive line interrupts

Character service request
bit(ICW bit 1) 11 not on or
ICW bits 0,2,3 Or ~ are in
error.

Beg 1'1_' byte 0 •
bits 0-7 of ICII.
ICII bits 1 II 4
shoula hs on,
bits 0,2 II 3
should be off.

16CB

0181

Beceive line interrupts

&11 ones vere not recaived.

Beg 1'14' bIte ~=
received data
('Dl) ana shou14 .
be .1'r.

X6CB

0182

Beceive line interrupts

Bore characters vere received
than vas transsitted for vrap
options.

Caution: this error
vill occur if ycu
selected a startl
stop wrap option
With the vrap
all zeros option
ana with an LCD
that cusss tvo
stop bits to be
sent.

16CB

0183

Beceive line interrupts

lin all zeros character vas not
recehea.

Beg 1'15' byte 1=
actaal receivea cb~
frail I1Dr. Beg
X'16'= received
character coont.

X6CI

0184

Receive line interrupts

The vrong character vas receivea

Reg X'1S' byte 0=
expectea receive
character. 1Ieg
1'15' byte ,.
actual received
character (IIDP).
Beg 116' • received
character count.

16CI

0185

Beceive line interrupts

6.1.98 13705G"II

Received
vith the
options.
L2 since
no start
received

()

a L2 for receive line
receive all ones
Should not get any
a SIS LCD is in use and
bit should be
to caase a ~evel 2.

..,)

'\...

"r

"
l,

of-

'l

~ype

2 Scanner 1rt

(
('

(

',",

o
o

o
o
o
o
o
o

o
o

IB6 3705 COn"UHIC~TIOHS CONTROLLER
TYPB 2 COftftUNICATIOHS SCA.HBP 1FT SY6PTOn INDEX
ROUT. ERROR FUNCTION TESTED
CODB
X6CE OX86 Receive line interrupts
for start/stop receive
all zeros option.

099-31058-Q9

ERROR DESCRIPTION
ICI bit 0 (stop-bit-error) is
not on and should be for this
receive all zeros option in
start/stop aode.

SQSPECTED ClBD
LOCAnOR 151

FElLD FETHII

PAGII

l'AGIL

COIlIlENTS

Beg 1'16 ' -received
char cOllnt. ae~
X"4' byte 0 •
ICII bita 0-7.
Bits O-Q sbould be;

Bit 0 • Stop bit

errQI: on.
Ut 1 • SVC
reg - off
pit 2 • o/U run off
Bit 3 .. eodem
check off
Bit " .. lIec-LNSig-Det OD

X6CB

OX87

Beceive

~ine

interrupts

lCW bits 0-4 are in error for
DLC receive line.

lIeg X"II' byte 0=
lCI bits 0-7.

X6CE

OX88

Beceive

~ine

interrupts

Flag detect bit vas on and
tbis is not the 1st char~cter
received (this error occurs .
only if an DLC LCD vas selected
and a previous flag or data
character has been received.
If a receive only option then
the sending terlinal say have
sent aore than 1 flag character.

Reg X'16';received
character count.

16CB ,OX89

Beceive line interrupts

The DLC idle character not
received or ICI bits 0-4 are
~Il eItor.

"'1

,I'
i'\
• '··i.I

C····"~'I

Reg X'l11' byte

O~

lCW b1 til 0-'.

Bits 1, 2, 3
should be off.
Bits 0 (idle char
reel and q
(rec-LN-s1gdet) should
be on. The
PDF should
• X'lr', X' 31",

o
o
o
o

]1:'71' "

or X'1'1' I

,

X6CB

OX8A

Beceive line interrupts

All ones not received using
an DLC LCD.

Reg X'16'=received
character counter.
Reg X'14' byte 1 =
PDF receive
data.

X6CB

OX8B

Beceive line interrupts

DLC LCD is not valid

Rec line LCD has
changed to an iDval
1(alue.

X6CB

0190

Disconnect line

X6CE

0191

Disconnect line

The scanner display register
bits are in error for the
transmit line interface.

X6CE

0192

Disconnect line

The transmit LCD is in error or
PC1' not=O.•

~utocall

not = 1'.

LCD not=3 or PCF

o

Type 2 Scanner 1FT

Beg 1'45' b:(te
in
bits 0-3 & pCP
111 bits 4-7.
Thill 'lilY be
II normal
condi tioll i f
the transmit
line cOllnected
to the lIutocall
unit has already
disconnected
IIlld dropped
Pata set Relldy.

o = LCD

After a reset the
following reg 1'46'
bits should be off;
Bit 0 - CTS.
Bit 2 - DSIl.
Bit 3 - BLSD
Bit 5 - 011.
Reg x'1Q' byte
LCD in

o"

X3705GAA 6.1.99

(J
IBM 3105 COMftUNICATIONS CONTROLLEa
TYPE 2 COMMUNICATIONS SCANNBB 1PT SYMPTOM INDEX
ROUT. ERROR FUNCTION TESTED
CODE

099-310511-09

ERaOB DESCRIPTION

SOS £IECTED CARD
LOCUION(S)

FEUD FETSII
l'AGE flGE

COll1l1lNTS
bi ts 0-3 1\ PCI'
in bits 4-7.

16C1I

OX93

Disconnect line

The scanner display register
bits are in ettor (teceive)

See cOB.ent fOI:
error stop OX91.

16C1I

OX94

Disconnect line

Th' receive LCD 111 in error or
PCP notaO.

Reg l[l14'- LCD
in bits 0-3,
l'CF in bits 4-7,.

X6CB

0195

Disconnect line

The l'CP is still-F after a
maximuIII wait time. This
indicates the bits in the SDF
for DLO, COS, lCB, or l'ND did
not reset) to cause a normal
auto-call disconnect.

Reg X'14' byte Q •
LCD in bits 0-3
PCF in bits q-1.

16CE

OX96

Disconnect line.

The LCD is not=3 or l'CF
is not O.

Reg 1'14' byte O. L
in bits 0-3 6 l'CF
in bits 4-1.

X6DO

nn

PLOTTER ADAl"rEB Rl'Q TEST,. This is a manual intervention routine and will not be run unless you set tbe eE
sense switch to run all lIIanual intervention routines or you request a single routine to be run.
ftanual intervention stop codes F01E and F01F are used by this routine.
chapter 13.5 of this manual.

fJ
( jl"
' ..~ ..

These stop codes are listed in

The diagnostic program will cause the adapter to generate commands for an IBK 1621 type plotter which uses
either an encoded interface or an unencoded interface as defined by 8l'Qt1663250. The routine tests only the
ability of the plotter adapter to output commands that will move the plotter properly. The diagnostic
routine does not test the plotter, the plotter is only a convenience lO the testing.
l'lotter commands are issued and the adapter status is checked in the following seguence:
,.

The co.mand is transferred to the plotter by first placing tbe proper bit configuration'
into the SDF. Figure 1 in the IBH THEORY OF Ol'ERATIONS for Rl'Qt1863250 shows the
leaning and position of the bits that make up a command.

2.

The LCD and the PCF are then set to

3.

When the data has been transferred from the scanner to the adapter a level 2 interrupt
will occur and the l'CP will be set to zero.

q.

After the level 2 interrupt occurs, the status of the adapter is placed into
SDF bits 1-7 as shown in figure 2 in the IBft THEORl OF OPERATIONS for Rl'Q'le63250~

5.

Before issuing another instruction, the program will turn off the Service Reguest bit.

6.

If no errors occur, the program will continue issuing instructions to draw the pattern
shown in figure 3 until the routine is aborted.

7.

Whenever an error occurs, register X'11' will contain the line address and the low
order byte of register Xl13' will contain the command that was issued to the plotter.

X'3' and X'l' respectively.

X6DO

OXOl

Doe8 level 2 interrupt occur
after a set mode

A level 2 interrupt did not
occur within 12 lilli-seconds
after issuing a set mode

X6DO

OXO~

Level 2 interrupt

Level 2 interrupt caused by
incorrect line address. Reg
X'l~' contains address of
line that caused the interrupt.

16DO

OX05

Adapter status

The condition of the adapter
and several sense signals fro.
the plotter are checked. Reg
X' 14' contains the data that
was returned to the scanner.
Beg X'15' contains the error
bits. Reg X'1ti' contains the
ex pected datil..

.6DO

0106

PCF state zero

The l'CF was not set to zero
after a command was issued to
the plotter. Beg X'14' contains

yP901

Probable scanner
error.

VB904

See rto beader for
a description of
a~apter status bits
and the contents of
other registers.

Probable scanner
error.
,'f
,~

6.1.100 13105GAA

Type 2 Scanner 1FT
'-J

{

it

'-!:

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IB! 3705 COS!ORIC1TIORS OORTROLLBR
TYPE 2 COK!QUICATloRS SCAHHBB IPT SJftPTOa IHDIX
BOUT.. BRBOII 1'UIiCnOIi TUtl!lD
CaDI

D99-3105B-09

BI80B DBSCBIPfIOR
the CUt tent state of tbe PCI'
ia bits 3-7 of b,te O.
Beg 1"5' sbows ~he bits in
ertor. Beg 1'16' contains tbe
elpecte4 data.
'

SDSPBCTBD CUD
"OC~'fIOBIS.

1'I1LD rEna
nGB PAGB

COIIIIIIITS

16DO

0107

Tbe condition of tbe
adaptet and plotter
sense signals aftet the
last ins~tuction(I'OO'1
is issued.

16PO

XlIX

SDLC LIRK TBST.
Tbis ron tine is a eannal intetvention rontine and will not be run unless ron set the CB
sense switcb to run sanual intervention rontines ot ualess rou re~nested a single routine to be run.

See ettor conditions for ertor
code 0105.

YB90'1

See etror
code OX05.

Tbis routine will stop witb eannal intet,ention stop code P020 tbrougb p02C asking you to entet options
needed to run this routine. Tbese stop code definitiQns ate listed in tbe T2CS-IAB section in Chapter 13.5
of tbis sanllsl.

o

Tbis rOlltine ea, be IIsed for SDLC data link proh~es detereination and repair verification when on-line tests
lunder bost s,ste. conttol) are Dot available.

o
o

When nsing tbis routine for problee deteraination external to the 3705, all noraal internal fnnctional tests
sbould run norsalll witbout internal batdware errors. An, local interface ptobleas, sucb as line set drivers
and terainators, sbould be tested using roatine X6CB witb extetnal loca~ wrap options because X6CB provides
aore detaile~ infotaation aboqt local fail ares.

o
o

Tbe stroctare of tbe link-test command enables tbis test to also ron a local external duplex eodee wrap if
you select the primary statiOn option and cOnnect the ttanssit and receive lines togetbet propetly. A reaote
wrap can be ~one if tbe reeote end of tbe link can tie the transait and teceive duplex lines togetber witb
proper loading etc. Because tbe relote end of tbe link eust stote tbe test fraee and send it back, ~be wrap
o~tion does not work on half-~up1ex lines.

o
o

Continuation (select PUNCTION 5 and press STABT key) ftoe tbe OX20, OX60 or OX61 stops tbe routine clears
all error counts and suseaty statistics and restarts tbe test froe tbe ttanseit/recei,e data pottions. Tbis
allows continaing the test on a eanual switched line connection witbout eaking a new connection. Tbe saae
restart is nsed for tbe 0000 dynaaic testart option or tbe DOOO restart option at stop code F02C. Anr
.anual switcbed line connection will not be broken until yoa abort the roatine ot ase a restart optioD that
goes throagh total bardwate setup such as D002 test art code.

This SDLC link test is basicalll an BeBO test with the priaarr SDLC station sending a SDLC link test coeeand
fraee down the link. The priaary station expects get tbe saee test ftaee back if tbe resote end of tbe link
received the-test fra.e witbout errors. Sase SOle tereinals only respond witb a non-se~nenced
acknowledgeeen~ response tather tban sending back tbe link-test frame ,~ received.
Options ate provided to run as a SDLC ptiear, station or as a SOLC secondary station. ,be prieary station
option initiates tbe link-test coesands and expects to teceive responses. The secondary SDLC station
responds to test-frames received; if the test fraae was received withoat errors, tbe saee test fraae is sent
back as a response. If a test fraee .as received .ithoat block cbeck ertors and bad eitber .ore data than
coo1d be buffered or did not have tbe poll bit OD in tbe conttol field, the secondarr station responds witb
a test fraee without optional data. All fraees received with block cbeck etrors or witb abott detect
conditions are coanted as etrors and no tesponse is ptovided. All frases received with a SOLC station
address otbet than tbe SDLC station address selected in tbe P028 eanoal intervention stop code are connted
as an anexpected or non-suppotted fraae and no response is ptovided. ~o tespoDse is provided for fraaes
witb anlthing but a link-test coeund tield.
'

Tbis rootine always stops on ttanslit ertots sucb as eodea cbeck, tiseout. or overtun, but does not stop on
teceive ettots except fat eodel cbeck ertor unless an optioD is selected to stop on frames in errot Or stop
on anr fraee.

X6FO

Tbe foraat of all ttansmissions ftol tbis LINK-!BST ate;
Pad

o
o

hd

l'

C dd

BC

BC r

ee

"hetePad • alternate data transitions chatactets for clock cortection and
will be X'Al' if HaZI lode is pot ~eing Dsed Or ~'OO' if RaZI
.00e s.s being llsed.
• SDLC flag cbatacter cosposed of a zero bit followed by silane
bit. followed b¥ anothn zeta Utll'1B'I.
A • SOLC station address.
C

!ype 2 Scannet I1'!

= SOle

control field and will always be I'P3' if a LIRK-TIST cOlsand/
response is being sent or X'97' if a co •• and teject respoDse is
being sent.

13705GAA 6.1.101

11K 3105 COaaUHICATIONS CORTBOLLBB
TYPB 2 COIIUHICATIOBS SCAHIll 1FT SYIPTOK IHDEX

099-37051-09

ff"

'","Y

BOUT. !BBOB FUBCTIOB TESTED
EIBoa DBSCIIPTIOB
SQSPEctED CABO
CODa
LOCATION IS)
d4 a optional t~anssit/~eceive data field wben tbe LIIK-TEST cossand
is being used. When tbe cos sand reject response is being sent
the fi~st byte of this field is the cOlland field of tbe ~eceived
f~ase that is being rejecte~. tbe second byte is set to ze~os (it
is defined as tbe send and recei.e sequence countsl and tbe third
byte is set to X'04' 'if sore data was received then could be
buffered o~ to X'01' if the LIIK-tIS! cossand was ~eoei,ed without
tbe poll bit on.
'
.
BC •

bloc~ check(CICI cba~acters.
Two block cbeck characters a~e always
sent and tbeir bit configuration yary according to tbe SD,C station
address. control field and optional dat_ fields.

se

an ending transsission of X""
to sake line go to an idle state
and to allow tile fo~ bits to be sent befo~e dropping t~e
'request to send' lead on transsit turna~ounds.

FllLD FlUI

PAGI

PAGE

COIIBl!IITS

All the data defined aboye between the two flag cbaracters is defined as
a '11111,. All references in tbis docusent to the f~ase refers to tbis
portion of eacb translitted or received segsent of data. Bote tbat if the
above is being Bent/received in BBZI lode tben the actual bit configu~ation
on tbe line will differ f~os the ones shown above. Also. SDLC zero bit
insertion/deletion applies to all characters except the flags apd ending
sequence defined under ee.
.
Test statistics and error count are available while tbe test is running and at tbe P02c test cospletion
code. In addition certain registers are used for current status indicators and say be displayed wbile tbe
test is running or at the P02C stop colle. Pqllowing is tbe definitio!' 9f the status indicators; ~ ,
I6PO

X'11' register contains the

cu~rent

/

transsit and receiYe line status.

=

Iyte 0 of reg X'lE'
last received frase type indicator and aay contain
one of the following indicatione:
I!OO' • Tiseout occured on last receive cospletion.
X'80'

=1

X'~OI

• A cos.and reject resfonse was received as tbe last
fraae receiv~d at this prisary station.

X'201

= A non-sequenced

1'10'
X'08'

I'O~'

good link test fraae was received witb no errorS.

acknowledge.ent was received as the
last fraae at tbis prisary station.

A block cbeck (CDC errOr) was detected in the last

received fraae.

= An

invalid or non-supported frase was received as tbe
last received fra.e. This link test only supports the
link-test response. the non-sequenced acknowledgesent
response and the co •• and reject response if running as
a prisary station. The secondary station option will
onl, accept a link-test co. land but lay respond with
a link-test reeponse or a cos send reject response.
Tbis tYfe indicator is also set if a partial frase was
receiYed followed b7 an 'abort detect' seguence of seyen
Of lore consecutive one bits.

/

• A valid link-test frase was received but it contained lore

data tban could be buffered,. If this is a secondary station,
a cos.and reject response is sent for tbis frase.
The mazisus length ~f tbe receive(and translitl data buffer
is 1024 cbaracters if tbis 3105 bas lore than 16K storage or
10 characters if 3105 has only 16K of storage.

X'02' • Invalld SDLC station addreel received or. for prisary station
option with optional transmit data. the received data did pot
compare with the SDLC station address or optional transmit data
tbat was sent. The SDLC station address that fOU provide 1n the
P028 stop code is used to sake tbie cos pari son. If tbe secondary
station option was selected, tbis frase will ~ot be responded
to.
1'01'

A bardware detected error sucb as lodes check or overrun bas been
detected. No response is lade to any frases re~eived witb
this tfpe of error.,

°

Byte 1 of reg I'1S'. transmit line status and othe~ information bits. ftultiple bits lay be
on in this byte as, of posed to byte
wbicb never will haye sore than one bit on.

6.1.102 I3705GAA

Type 2 Scanner IPT

,

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IB~ ~105 COKnOHICA~IOHS CONtBOLLER
tY~E 2 COn~URICA!IOHS SCAHNBB IF~ Sya~!On

BOOt. EBBOB
CODE

D99-3105E-09

INDEX
ERBOR DESCRIPtION

FUHCtIO~ ~EStED

T~e

SUSPECtED CARD
LOCATIOIiISI

bits withiq this byte are defined as:

FE At D FEt 11K

PAGE

PAGE

COIIUlitS

"80' • A reply is pending to be sent to the last fra.e received at this
secon4ary station.

o
o

X'40'

= A co •• and

X'20'

= A link-test

"10'

= A ·transmit

reject reply is now being sent or was the last frame
transMitted fro. this secondary station.
command(fros primary station) or response(from
secondary stationl was the lasr frame sent or is being sent
at this the.

o

initial' operation is being done or was last
trans.it operation done. This 'trans.it initial' 1s done to
set 'request to send' and wait for 'clear to send' from the
modem interface for the first transmit operation of all
primary station options and for secondary station options
when 'request to send' shoUld be on at all times. See manual
intervention sto~ code F020 fo; this option.

XI08' • Transmit line is busy if this bit is on.

X'04' •

o
1(61'0

%6FO

o

l'l D'

add~d

indicator at later time.

not defined. Hay be used as added indicato; at later time.

register is used to control the EO?? display code that is put out to the panel
display 8 lights (if function select switch is in positions 4, 5 or 6).
This register is cleared to zerOa at approximately two second intervals and
in between tbis clearing to zeroa ~t is Uled aa an accumulator ot all the bits
aefined in the register X!1E' bits.
register is the scanner display register. This program sets the display bit in
the ICW for the receive line used in this test. For half-duplex lines this register
gives IOU the current line interface conditions for both the trans.it and receive
operat ons. Por duplex lines this register contains the receive line interface
cond1t~ons,. pollowing is bit definition fo; byte 0 of this ugister.
Bit

Hex

o

80

,
2

40
20

o
o
o
o
o

line is busy if this bit is on.

not defined. "ay be used as

X'1F' registers contains the accumulated transait and receive line status indicators.
The bits in this register have the saae meanings as the bits defined in the
register X'll' except once these bit are set on they are Dot reset until the
test is restarted. these bits serve as a sumaary of all the transmit and receive
oFerations that have been done up to tbe time this register is displayed.

o

ru. \.

Receiv~

= Bit
1'01' = Bit
1'02'

3

10

4
5

08

6

X6FO

04
02

Heaning if bit is on.
'clear to send' is active. Should be on while in transmit mode and may be on
while in receive mode. For duplex lines this bit probably will not be on since it
reflects the status of the receiye half of the duplex pair.
'ring indicator' ~s active.
'
'data set ready' is active. Shollld be on for leased lines and should come
on after line is cOnnected for switched lines.
'receive line signal detect' (carrier detect! is active. Should be on Wbile receiving
and may be on while transmitting.
'receive data bit buffer' is a one bit. Should vary as received data yaries.
'diagnostic mode bit' is on. Should not be on in this test.
'bit service request bit' is '. Should be on once each lIit service.

EO?1 display codes. While the link-teet is running, various display codes are
displayed in display B if you have the FUNCTION SELEC~ SWITCH in function
position 4, 5 or 6 (except E06F). These display codes are displayed approximately once
every other second with the display B lights cleared to zero between e~ch BO?1 display.
These EO?? display codes are defined as;
EOOO alternating with EOFF

= waiting

for 'data set ready' to come on before doing
any transmit or receive operations. These codes will be
continously displayed until 'data set ready' co.es on via
completing a manual switohed connection or via connecting
lor jumpering) the proper lodem interface leads.
On a leased l~ne connection you will not see this display
code if !data Bet ready' is alwaJs onlaB ex~ectedl •

E060 • A good test frame was received within the last two seconds and no other error
was detected (except a possi~le tiaeoutl.
8061

e

type 2 Scanner 1FT

Nothing was receiYed(tiaeouts) during the last two seconds.

X3705GAA

6.1.'O~

.1 '

'lJ.

IBn

370~ COKnUNIC1~IONS CON~BOLLEB

~YPE

ROD~.

2

SCANNER 1FT

COKftUNiCA~IONS

ERRoa
CODE

PUNC~ION

D9 9- 37 05B- 09

INDEX

SlMP~OK

TESTED

E06~

BRROR DESCRIPTION
SUSPECTED CARD
LOCATIOII (SI
• A ~lock check error(CBC error) was detected in some frame during the
lut t~o ·seconds.
,

E063

'_

h

•

PEAtD PET II II

P~GB

. COIlIlEN~S

J?~GE

()
il):.
\ .1"

r

non-supported or invalid frame was received during the last two
seconds.

1

£06Q • lIore data was received than could be buffered during tbe last two
seconds.
E065

A command reject response vas received at this primary station
during the last two seconds.

£066 = A non-sequenced acknowledgement wos received at this, priury station
during the last two seconds.
£067 • Eitber of 3 Conditions aay exist:
1 - SDLC Station Address did not co_pare.
2 - Received data did not compare witb transaitted data.
3 - Secondary Station received Bore data than could be buffered.
In all cases IE067' indicates that the data received does not
compare witb data transmitted.
E068

= A hardware

detected error such as modem check or overrun has been detected
dUring the last two seconds.

1I06P • This code is displayed if you are using the dynamic communications option
(function select 1 and switches B-1 set to DO??I and have entered a DO??
code that is not defined.. NO action is tallen if this code is displayed.
X6PO

DO?? dynamic communications codes. These dynamic communications codes allow you to terminate
or restart the link-test at various points within the test. IOU enter these codes wbile
the program is running by setting the DISPLAY/PUNCTION SBLECT SWITCH to function
position " by setting tbe selected code in switches B-II and then pressing the interrupt
key on the control panel. These dynamic co.munication options are the same as tbose
defined in tbe P02C manual intervention step code definition. They are repeated here in
a summary form. For mOre details see the F02C stop code definition.
0000 • Bestart link-test at transmit/receive data pointlno line resets).
0001 • aestart routine from beginning including asking for options.
0002
D003

D004
X6N

a

aestart link-test including hardware resets and

enable~

Stop routine at P02C stop code and display statistics.

= Terminate

routine after hardware resets.

STATISTICS at link test termination.
1'1C' register contains the address of a statistics table in storage .• At all times while tbe test is rlillnillg
and at the P02C and OX?? stop codes yoo may get the storage address of the statistics table from this
register and display the storage locations for the following.balt-wor~ coullters. following 1s a list ot
what is available in these statistics:
Hex displacement
within statistics
pointed to by
reg X'1C'.
00
02

Number of SDLC link-test frames transmitted successfully. ~his count
does Ilot include command reject responses sent from a secondary station.
c

Nlimber of SDLC link-test frames received with PO errors. It this is a
primary station then the received SDLC station address and(tf used) the
optional data must compare in order to have one added to this count.
On a normal r02C completion at a primary station this CQunt should match
the number of test frames transmitted count it no errors bave been detected.
An exception is when the secondary station responds with DOll-sequenced
acknowledgements to test frames then this count should be zero and the
received non-seqllenced acknowledgements count should match the Ilumber of
test frames transmitted count.

04

Number of frames received with block check errorslCBC errors).

06

Number of command reject responses received at this secondary station.

08

Number of non-sequenced

acknowled~ements

received at tbis secondary station.

OA = Number of frames received that were not included in other receive counts.
This count includes frames received with invalid SDLC station addresses,

(
6.~104

X3705GAA

type 2 Scanner 1FT

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lDft 3705 COftftUNICATIONS COBTROLLER
TYPB 2 COftftOBICATIOHS SCAHIBS 1FT SYftPTOK INDEX
ROUT. IRaoa FOBCTION TESTED
ERROR DESCRIPTION
SUSPECTED CARD
CODE
LPCATIOIl (S)
non-sQPported comlands/responses, non-data compares with optional transmit
data and frames ter.inated by an abort detection condition. Note that sose
of these conditions may have caused a block check error and be included in
the block cbeck error count and not this count.
OC

DE
10
X6l'O

X6FO

FEUD 1'IlTKft

PAGE

PAGE

COftUNTS

= If

primary station then this field contains nQmber of test frames reqQested
to be sent in the F022 stop code. If this field is all ~eros and a primary
station option vas selected then test frases vill be sent continoQsly lallowing
for receiving etc) withoQt ever terminating the test.
Number of hardware errors detected, such as lodem check or overruns, on the
transmit and receive operations.

= HUmber

of command reject responses transmitted by this secondary station.

Following are the error stop codes that may occur in this test. Note that any error
stop codes beginning with 1 or 2 in display B byte 0 bits 0-3 are defined in another
section of tbis symptol index. The display B codes starting vith F are defined in the
manual intervention section of this dOCUment.
OX07

Auto call failed to complete

An auto call error has been detected.
Reg. X'1S' byte 0 contains an error indicator
number. Determine error indicator and see
description belovo
ERBOR INDICATOR
1 -- Error in auto call connection.
Reg.X'1S' byte 1 contains SDF bits in
error. SDF bits 0-4 on, 5-7 off. Also
an error, if LCD not=3, pcr not=~
Ireg. X' 45' byte 0).

o

o
o
o
o

119 9- 37 05 E- 09

2 -- Error in dialing.
See error indicator 1 description.
4,5&6 -- If last digit dialed vas not an
EOB digit, PRO lIay come on an cause
a L2 interrupt if the distant station
does not answer i.mediately. The saae
thing will occur with EOR, as last
digit, on soae EOft I non-IB~) and
on IBft auto-call units that do not have
the EON feature strapped on. On sOle
EOft auto-call units the EON will cause
the auto-call unit to transfere control
to the eodea/data set with DATA-SET-RBADY
on immediately, even though no distant
station has been connected an4 given
an answer tone.
~

Error indicating PVI, eBO or 010 not on.
Beg. X'15' byte 1 bits 1,2 & 3 should be on.

5

Ro auto-call completion (timeout).
Beg. X'1S' byte 1 bit 6 ICOS) should be on.

6

Abandon·call and retry caae on.
Beg. X'15' byte 1 bit 7 came on.

Reg.I'1S' byte 1=
SOP bits 0-7. SOl'
bit definit ions
for auto-call are:
Bit 0= lIB) intrpt
remember.
Bit 1= (PWI) power
indicator.
Bit 2= ICRO) call
reguest.
Bit 3= (DLO) data
line occupied.
Bit 4= IPND)
present next digit.
Bit 5= (DPBI digit
present.
Bit 6= ICOS) call
originate status.
Bit 7= abandon call
and retry.

X6FO

0120

Transmit line operations.

A transait line error bas been
detected. Reg 1'13'=accumulated
ICW bits 0-15 during this
transmit operation. On each
level 2 interrupt ICV bits 0-1
are stored together and saved
for this error display. If
reg X'15' byte 0 bit 3(X'10')
is on then the transmit line
has timed out due to 'clear
to send' not coming on or due
to some other transmit failure
such as loss of transmit
clock.

5ee routine beading
for more registers
and error stats.
If continuing from
this error stop by
selecting FUNCTION
5 and press START
the test restarts
at the transmitl
receive portion
without hardware
reset and enable.
This error
may be found
lIore easily in
routine X6CE.

X6FO

OX60

Receive error coapletion.

This error stop occurs if a
aode. check has been detected
IICW bit 3 on) while in receive

See Rtn heading for
test run details,
registers and test

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Type 2 Scanner 1FT

X3705GAA 6.1.105

--------

--- - - - - - - - - - - - - - -

(J
IBK 3705 COKKUHICATIOHS CONTROLLBR
TYPB 2 COftKOHICATIOR5 SCARHIR 1fT SYKPTOK INDEX
BOUT. BRBOB FOHCTIOB TBStED
CODI

X6FO

16F2

0161

un

ERBOR DBSCRIPtiON

D99-3105E-09
SUSPEcnD CARD
LocnION (5)

lode or this stop occurs if
you selected the options to
stop on any fraae or any fraae
in error. Reg X'13'=lCt bits
accumulated during this receive
operating by storing lCN bits 0-1
together and saving tbea on
each level 2 interrupt. Note
that program does not atop on
rsceive timeoats but setups to
transmit again if a priaary
station or to receive again if
a secondary station. Reg 1'16'.
address of receive data buffer in
storage and reg 1'19'=adr+1 of
Jast received character. Hote
that regs defined in routine
heading provide lore inforlation.

Receiving fraaes.

This step code occurred because
you selected an option to stop
on the type of fraae just received.
Reg X'lB' defines type of fraae
received and is defined in the
routine beading. Beg X'16- adr of
start of receive data buffer.
Beg X'19'=adr+1 of last cbaracter
received (less block check
cbars). Reg X't4'-accululated
block check (CRC) characters
accumulated by this prograa and
should = X'FOeB' if no errors
occurre~. Reg 1'13'-last two
received characters(prior to
flag char) and should be the
actual received block check
(CRC) characters.

fEALD .aTKK
PUI PAGB

COBBENTS
statistics. TO
continue frol this
stop select
'ORCTIOII
5 and press
START, the test
restarts at the
transait/receive
portion of the test
witbout tbe
hardware resets
and enables.

Ir~

\(.J'

'",-

See routine heading
for regs. & test
statistics. to continue , selecl;
,OICTIOI 5,
press sun,
progral restarts
at the transait/
receive dati portio
of the test wit bout
bardware resets ap4
enable operations
bllt clears tile
atat coullters.

/1

',<--

'-

/

trap Data Test - BSC and SDLC.
Tbis is a manual intervention wrap rOlltine and runs on1l if you set tbe CB
sense switcb to rllD aanual intervention routines or request a sin91e routine to be rlln.
At tbe f'irst manllal intervention stop X"049' enter tbe desired options:
SIlITCH
BCD B

o

,
2 3 q -

a

- 0

o0
o1
o2
o3

first oscillator
second oscillator
third oscillator
fOllrth oscillator
data rate select (turns on break if line set 121 or 12B)
elterna1 clock
no request
no reqllest
transmit without a receive line (no wrapl
transmit and receive, swap lines and repeat
transmit and receive sale pair

'--

At stop .050 enter a valid translit line address and wrap type operator.
/

BSC
SIiiTCHIS
BCD I

SDLC
SWITCHES

5 I 1 X

o XX1

6 III

B X X X
F 1 1 X

7 XX1

e

\.

C D B

Normal (DTR/NOT OK) An external wrap facility .ust be provided to wrap data with this
option
Line set Wrap (Oft/NOT DTH)
Kodea wrap (Dft/DTR) ror lad ems that use tbe Bodem Wrap signal

r: "- '

,

''''-j

At stop .052 enter a valid receive line address and wrap type operator in the saae format as in stop r050.
16.2

OXOl

A set mode was elecuted on
the receive line (Addr in
register X'13')

6.1.10613105G1A

litber tbe expected L2 did
not occllr or the wrong line
interrupted. aegister 1"4'
contains the interrllpting
line address.

The reference
data for this
test is
variable and
is not given.

Type 2 Scanner I'T

(

o
o
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o
o
o
o
o
o

U
I'I

IBft 3105 COftftOHIC1TIONS CONTBOLLBR
2 CORftoU1cATIORS SCANHBI 1fT SYftPTOft INDBX

BOOt. BBBOB 1'OIlCUOIi TBS'fBD
CODB
161'2 0102 The LCD of the receive
line vas checke4 fQr a
feedback check.

o

o
o

EBBOB DBSCRIP'lION
A feedback check occurred in
the seteode to tbe receive

SUSiECTED CABO
LOCUIOR(S)

FE AL 0 FE'l1lll

PAGB

UGB

COftnllfS

11l1e.

X61'2

OX03

1 setmode vas executed on
the translit line (14dr
in reg18ter I' 11')

Bitber the expected L2 did
not occur or the wrong line
interrupted. Register 1'14'
contain a the interrupting
linjl address.

X61'2

OX04

The LCD of the translit
line vas checked for a
feedback check.

A feedback cbeck occurred in
the setlode to the translit
line.

161'2

0106

The eodem should cause
clear to send to come up
on the transsit line
after approxieatelr
300.".

The transmit line display
register did not contain
the clear to send bit.

X61'2

OX07

The eodem should cause
data set ready to come up
on the transmit line.

Tbe transmit line display
register did not contain
the data set ready bit.

161'2

0110

An interrupt vas
expected from either the
transmit or the recei,e
line. The test is
transmitting and
receiving (if receive is
selected).

Neither the transmit nor the
receive line interrupted or
an unexpected lin~
interrupted. Register 1'14'
contains the address of the
interrupting line address or
zero if no line interrupted.

16'2

01,3

The transmit and receive
should interrUPt for'
service each Q.haracter
the.

"20" transai'1! Une interrupts.

the receive line has not
intefrUpte4 af~er at least

161'2

OX15

Checking input 1'44'
for correct flags set.

1'lags set in SC1'
during the receive
were not set properly.
Register 1'15' contains
the address of the
flags and data received.

161'2

0116

Checking data received
against the data expected.

The data received is
not equal that expected.
Beg 1'15' byte one
is tbe data received,
byte tvo is tbe data .
received. Beg 1'17'
points to the expected
~yte, Beg 1'16'points
to the received data;
SC1' flags in byte 1
at addr pointed to
bl' Beg x'16'.

161'_

XIXX

X.21 LIRB SET TBST

,"

o
o
o

099- 3105B- 09

TY~B

Tbis is a sanual intervention routine and runa onlf if directlf selected or the CB sense switcb is set to
run aanual intervention routines,.
Tbis routine tests tbe 1.21 Line Sets unique handling of Data Set aeady and Clear to Send. If the switch
option is specified, the bit pattern generator and state generation circuits are also tested. The trans.it
and receive lines lust be wrapped Itransl1t 'land C signals Connecte4 to the receive a and I signals
respectively) via an external facility. Befer to rET!! Page 1-~30 for wrap test block inforlation.
Rost of the tests are perforsed on the transmit line with the results being checked on the transmit and/or
receive lines. Tbis routine should be run twice on a balf duplex pair, reversing the addresses specified as
tbe transsit and receive lines tbe second tile.
'
Data i. not explicitlf wrap bf this routine.
line 8et and external wrap connection.

Us. routine 16r2 for tbis purpose an4 to further yerify the

Befer to logic page 'A017 for the jasper inforlation.

The following lanual intervention stops occur,

At stop 1'055, enter the routine options as follo.sl

Type 2 Scanner I1'T

X3105GU 6.1.101

IB" 3105 COK"U.ICATIOBS CO.TROLLEI
TYfB 2 COIIURICATloas SCAB.BB lFT SYIPTOM IIIDn
aOUT. BRROR PUICTIO,
CODII
SWITCH
BCD II
J
J

'US~BD

o
o
o

D99- 37 051- 09

lIaBOR DIISCBlP'UOI

SOSPIICTIID CABD
LOCl Tloa (SI

lEALD lET"K
PAGII PlGII

COIIIIBH'rS

t z 2 21100 BPS olilapers are in delay position
t z 3 21100 BPS olupers are in no delay position
BPS olilapers are in 'alay positioD
11800 BPS olilapers are ill ,\0 delay position

J 8 Z "
J 8 Z 5

11800

J 8 Z 6
J 8 Z 7

9600 BPS olupers are iD delay position
9600 BPS olilapers are iD no delay positioD

8 Z 8

~

Z

8

where

c

BPS oluapers are in delay position
9 I18It BPS olupers are iD no delay position

I

~

/l81t

=0

If the routine is not to be looped withollt respecifying the manual input.

• 1 If the routine is to be looped without respecifying the aanual iDPllt.

o

If internal 2/100 BPS clock is to be used.
HOTII: This option is only valid fOr 21100 BPS.
• 8 If e~ternal clock is to be Ilsed •
• • 0 If the line set is juapered for non switched half duplex operatioD.
• 1 If the line set is jllspered for switched opertion.
• 2 If the line set is jllspere4 for non switched full dllplex operation.
At stop P056, enter the transsit line address.
SIliTCH
BCD B

o

X J X "XXX is the transait line address as defined in the POOl manual intervention stop code.

lt stop F057, enter the receive line addressSIIITCR
BCD B

o

~

X X XXX is the receive line address as defined in the P001 aanual interYention stop code.

At stop P059, disconnect the external wrap facility.
wal Ipecified in reaponae to Itop code ross.

This stop code will be bypassed if the loop optiOn

Brror stops in this routine, except for the set aode pretest errors (lX03 and lXOlIl, are aost likely caused
by failures in the line set cards, if the other type 2 scanner routines haye rUD successfully. lefer to
logic page VAOOO for line set card locations. Anyone of the three cards of the line'set cOllld ~e caqsing
the error as no attespt is sade ~y this routine to isolate fai~ures any further.
X6P~

0005

DTB controlled
OOt ready ltate.

NOTI:
X6P/I

x6pQ

00Q7

0008

DSI acti,e on the
transllit side.

10 bit tiles after
DTI was set on tbe
tran.lit line all
1's were not detected
in the SOP of tbe
receive line.
DSI on the translit side
was not actiye.

Error 0008 will only occur if non switched duplex or switched option is specified.

x61'11

0009

DSI active on tbe
receive lide.

DST on the receive side
was not acti ve.

I6PII

OOOB

PSI on tbe receiYe
line stays acti,e
at least 12 bit
ti.e. after d1ag
sod, il let on the
ttansait line

DSB' became inactiye
on the receive line
too loon after
diagno.tic aed. waa
let on the trlnl.it
line.

051 on the receiYe
line becoses

DSI on the receiYe line
was still ~ctiye

HP/I

OOOC

'-

/
\

",r

\....

Brror 0005 vill only occur if switched and external clock options are specified.

DTII ready state

ROTE:

12 bit tisel after the
receiYe line val
ioitialiled an alternating
bit pattern val Dot
detected ip t~e SDF.

\

("
\

"/

"\

"-

(J

'\

\l..

~

(

",

~

"'-

(
6.1.'08 X370SGAA

(
('

()

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11ft 3705'COaaOHICATIOaS CO~TIO~tll
Ttfa ~ COaaOIXCATIORS SCA•• Ba 1fT StKfTOK IMDBI
IOOf. BllIOR POllcnOM 'rBS'fID,
CODa
lucth. 22 bit
tlles .~t't dl.g
lode is set on the
tuosdt line

16P4

0000

16P'+

0001

1I0Tl:

X6P4

Er~or

I~~o~

IIiBOB DESCBIPnOIl
22 blt ti •••• ~t.t

0001 will onll

COHIIBH'rS

UGI

t~e

switched optioo was specified.

OSlSCII SIll
bi t pattern vas
oot detected in the
SOP witbin at least 20
bit tiees afte~ tbe
SDLC flag bit patte~n
was detected.
occu~

if the

switc~

option was specified.

All la~ks we~e not
detected in tbe receive
line's aDP 10 bit til'.
aft.t tbs set lode
inter~upt froe tbe
t~lnslit line.

0013

I is inacti,e on t~e
receive line when
aequest to send is
inacti,e on t~e
tunult 11ne.

I is acti,e on the
line before Bequest to
Send IT) hiS been acti,ated
on the trlnslit line.

16P4

0015

Clear to Send i. inactive
on the t~ansait line
when aequest to Send
is inacti,e on the
tunslit line.

Clea~

16P4

0018

I

becoaes active on
the receive 11ne wben
clear to Send is
acti'lted on tbe
tunsait line.

I did not becoae acti,e on
the receive line after
Bequest to Send was
activated on the
transBit line.

X6P4

0019

Clear to Send delal

Clear to Send bee ale acttve
less thin 21 bit tiaes after
Bequest to Send WIS set
in the line set (I detected
on the recei,e linel.

16P4

0020

Clear to Send becoles
Ictl,e Ifter lIequelt
to Send Is Ictivated

to Send did not
hecaa. Ictive within ODe sc,n
tile vith no delli, 31 bit
timel with dela1 Ifter
Bequest to Send vas set in
the line let (I detected
on the recsl,e sidel.

¥6F4

0021

Call aegaest etlte

ill D's ve~e not detected
in tbe receive 11ne'e SDf
when aeque.t to Send, Dltl
aate .e1ect, .nd Dltl f.talol1
leadl Ire on In tbe ttln.llt
line.

1FT

UGI

An

All larks generated
bl the ttanslit line
and received w~eD
dilgnostic l04e 1.
~eset and dats terainal
~eadl is set on t~e .
transait line. Data
rate select is also
set at tbis tile, but
lt sbould bave no
effect because
aequest to Send is
off.

Sc~nner

UUO UTHH

A SDLC fllg bit plttetn
was not detected in
tbe SDP within 20
bit tis •• Ifte~ DSI
beClle iOlctive.

0012

NOTI:

SOSPECTED CARD
LOCATIOR IS)

diagnostic lod. op
the ttaoslit lioe
should have fotced
C and T aod tbetefo~e
lind I 00 the tecei'e
.14e to Ols.

0000 will 0011 OCCUt if

bit plttern for
an OSlSCII SlII
is gene~lted 00 the
~eceive line after
DSR beeale inacti,e.
1

lOTI:

Tlpe 2

...

A bit pltte~o fo~ I
SDLC flag is
gene~ated OD the
~eceive line .fter
Dsa becoles inlctive.

1199-37051-09

to Send is acti,e on
the trlnslit line before
Reqqest to Send bas been
activated on the ~anslit
line.

Irror 00'9 wl11 only occur if tbe delay option vas Specified.
Clea~

X3705GAA 6.1.109

fl.,"

'V
IBft 3705

CO~"UNICATIONS

CONTROLLER

TYPS 2 COKKUNICATIONS SCANNER 1FT

SYKPTQ~

1>99-3705£-09

INDEX

ROUT. ERROR PUNCTION TESTED
ERBOB DESCRIPTION
SUSPECTED CABO
CODE
LOCATION (5)
NOTE: Error 0021 vill only occur if the svitch option was specified.
X6F4

0022

Data Set Beady stays
active on the transmit
line when I is active
and the receive data line
is held at space for
at least 20 bit times.

X6F4

0023

Data Set Ready stays
active on the receive
line when I is active
and the receive data line
1s held at space for
at least 20 bit tiles.

X614

0025

DSR stays act1~e on
the transruit line
at least 12 bit times
after diag mode is
set on the transmit
line .•

X6FQ

0026

Dsa becomes inactive
on the transmit line
22 bit times after
diag mode is set on
the transmit line

NOTE:

NOTE:
X6P4

0027

,

<~1r

"It.)!

Data Set 3eady beca.e inactive
On the tra~smit line while
a continuous space was being
received when I vas active
(Request to Send active on the
transmit line).

'

Data Set Ready becomes inactive
on the receive line while
a continuous space was being
received when I was active
(Request to Send active on the
transd t Il,ine) •
1~

',;

~'

lI

I~

DSR became inactive
on the transmit line
too soon after
diagnostic mode
\las set on the
transmit line.

Error 0025 will only occur if the non switch duplex or switch optton is specified.
DSR on the transmit line
was still active 22 bit
times after diagnostic
mode on the transmit line
should have forced C and
~ and therefore I an B"
on the receive side tQ O's.

Error 0026 will only occur if the non switch duplex or switch option is specified.

DSR becomes inactive
on the trans.it line
when the external
connection is broken
NOTE:

COIIIIENTS

Error 0022 vill only occur if the non switched duplex or switched option is specified.

~

NOTE:

PEUD PETIIII
111GE PAGE

Data Set Ready did Dot
become inactive on the
trans.it line when tbe
external connection
was unplugged~

Error 0027 will only occur if the non switch duplex or switch option is specified.

X6FQ

0028

DSR becomes inactive
on the receive line
when the external
connection is broken

Data Set Beady did not
become inactive on the
receive line when the
external connection
wn unplugged,.

X6P5

XXXX

High Speed Local ~ttachment Oscillator Speed Test. This manual intervention routine checks the
14.4KHZ/57.6KHZ high speed oscillator that is supplied for the High Speed Local Attachment Line features.
The frequency to be checked must be jUllpered on the LIB type , board in which the oscillator is installed.
See the following switch entry specifications for the jumper information. The oscillator frequency is
checked to ensure that there is not more than a plus or minus 0.' percent variation from its expected
frequency.
'the oscillator fre

c

x••

3705 COI.URXOA'IOHG CO.!ROLLI,
'TPB 2 COR.UftXCATIOHS SCA•• IR ~P! STIPTOI IIDI'

IlCL-37 051-09

DISPLAT a S!OP
11.0AL IH!IR'I.tlOI lCTlOI RIQUIRID COllI
Inter next optional tran.ait data cbaracter to be sent froa tbis prilary station of the SDLC LIBK-tEST. Set
svitcbe. II and I ~o tbe bex cbaracter tbat you vant to use as tbe next data character to be trans.itted.

P02~

If this is the last optional translit data character you vant to send, set .witcbes a or C to Iny non-zero 'Ilue.
If you vant to enter lore optional transait data tben let Ivitcbea a and C to 00 and the current data cbarlcter in
.witcbes D and I will b. stor.d wb'n you .elect function 5 and pr.s. start. !ben IOU will get this stop code again
unlels end of trans.it buffer bas been reached. If tbe lachine tbis test is runn ng in has over 16K of storage
tben JOu la, enter up to 1022 character to be translitt.d with tb. P02Q Ind P025 stop codes. If tb. lacbin' bas
only 16K of .torage then you ate li.i~ed to a 2Q character laxilua.
r026

Inter translit line interface addre.s. Inter line .ddress in same forlat as aefined in the rOOl aanull
interv.ntion stop cod••
If s.l.cted an option using duplex lines enter the translit line interface address of tbe duplex line interface
pair. Hate: duplex translit lin. interface is always first line iuterface address of tbe even/odd line interface
pair witb tbe e,en lin. interface address being used as tbe trans.it line and tbe odd line int.rface address being
used as tbe receive line. late also tbat this line interface Iddr.ss to be entered does not use tbe·low order bit
of byte 1 to set/input lalR so tbat lin. Iddr.sses sucb as 08Q2 and 08Q6 are consid'red to be ada line interface
ad4r ...es and liDe addtelses luch IS oe40 ana oeqa are e,en lin. interflOl Iddre.....
.
Tbe line interface Iddr'.1 you .nt.r is uI'd to get lin. set type and optionl according to wbat is found in tbe
configuration data set(CDS). If you ha,e s.lected I not-installed or in,alid line address you will get stop code
P027 asking for tbe line int.rface address aglin. If selected a duplex line option tben tbe line set type aust ~.
a type tbat cln run.in dQplex .ode and tbe sa.e appli.s fo~ balf-duplex, switched and internal/external clock
s.l.ction.
If you enter rr in switcbes Band C and continQe, tb.
initial options again.

~rograa

vill go back to tb. r020 stop code to Isk for
/'

r021

!ransait l1ne interface address enter.d in stop code r026 was in,alid line set type for running witb options
selected. Iqt.r transait line interface address again IS defined in stop code r026. If you enter rr in switches 8
and C ~nd tb.n continue t~e prograa vill go back to tbe r020 stop code to ask for initial options again.

r028

IDter SDLC station address in switcbes D and B. ~bis is the SDLC Itation address put into all test fraaes
transmitt.d on tbe lin. and tbe SDLC station address tbat tbis station expects to recei,e froa tbe resote
secondarJ station if tbe priaary station option was selected. If selected t~e secondary station option then tbis
vill b. the SDLC stltion address searched for in all incasing frases and the SDLC station address put into the
response t.st fraaes or co.aand reject respOnse sent blck to tbe relate pri.ary station.
If tbe s.condary station receives I frale tbat bas a different SDLC station address than the one you Ire entering
then it will not respond to tbat frale but vi1l count it in the statistics counters defined in routine 16ro
writeup. .
After you continue frol tbis code the progra. will reset and enable the scanner and start the
routine writ.up for displly codes you vil1 get wbile test is running •

LIKK-~ES:.

See

• 029

Inter the line address of the auto call originate line interface to be used in tbis test.
for.at to enter tbe line address.
Bot.;If the line address .nter.d is eitber in,alid or not configured
as an auto call originate line, tbis stop code will be displayed again.
Inte~ line address again as d.fined for this stop code.

r02A

Inter tbe first digit to be dialed On the auto call originate line.
digit to be dialed (Press STAR!)

r028

Ent'r tbe n.xt digit to be dialed. Set switcb D to 0 and switcb I to the next digit to be dialed (Press S!ARTI
Continue entering digits in tbis aanDer and after ~ast digit bas been entered set switches D and B to rp apd Press
start.

See stop code rOOl for

Set switcb D to 0 and switch I to the next

the progral will now reset and enable the scanner and start the link-test. Wait for noraal connection or tiseout
(20 ,eC) to occur. If noraal connection occu~s each dial digit w~ll be displayed in display a, BY!I 1, as it is
d1s1ed .•
r02c

LIKK-TIST bas terlinated. Cbeck statistics and register indicators defined .in tbe routine beading if necessary.
!hen enter a link test restart or tersination option.
/'
~he following list of options are acceptable with switcbes Band C set to DO or 00 for the is r02c stop code. ~he

sa.e options say be used witb the DO settings when using the dynamic cOlsunications options defin.d in the routine
writeup. Pollowing is , list of the re.tlrt/terlination optionsl
Set switcbes
B,C,D and I

!o;

DOOO

6.2.6 X3705GAA

(.

\
ror this restart/ter.inate

option~

Restart the link test at point where it setup initial transmit and receive
operations witbout dOing a scanner reset and enable operation. This option
allows you to restart tbe test on a switched line witbout laking a new
dialed connection, but say be Qsed on any type of restart except a scanner
or LIB fai1Qre. If you use tbis restart option then all tbe statistic COQnters
vill be c1eared(except nUlber of frales to translitl and run indicators will
b. res.t to starting options.

Type 2 Scann.r 1fT

(

o
o
181t

nos

COIIIIQIIIC&nOIl!l

couaonn

01

flPB 2 COlIlIORICltlOIS SC1I.II IFf SlliPtOIi I.DIX

0:

»ISI!LU 8

I

0001

1Il10A~" IIIUJlVI'JIlt%OIl Ml'l~O. fiBOOIQ8.D coDB'
lestart rputille at stop code"F020 IIsking 'for the 1111k test options:
this restart option vill aask level 2 interrupts alld aess ap trillsait IIl1d recel,e
buffer poi liters but vill IIOt sodify allY of the other lillk test stlltistics alld
vill lIot reset the lines currently in use until after JOu haye entered your
nev options. therefore this optioll allY be used to teraillate the current test
but still be able to look at te~t statistics or be able to respecify optiolls.

Stop

I

o
o
o

0002

lestart the lillk test froll hardware reset and ellible in the scallller. This optioll
will clear all rUII illdicators alld statistics as in optioll DOOO but ill additioll
it vill disconllect Iny switched lille cOllnectiOIl due to the ,scanner reset alld
enllble. T~is restart optioll should be used if a scanller or LIB failure occurred
or if JOu did allY outputs froll the cOlltrol panel that challged the currellt lille
cOllditiolls.
,

D003

00 to stop code r02C and wait for lIext selectioll of optione.
This stop code is used for dynallic cOllllunicltiollS(fullction select
position 1 and 0003 ill svitches 8-1). If used at P02C stop code then
it will jast resalt in stop F02C IIgain. This dJnaaic cOllaaniclltioas
allY be used to teraillllte the test before the trallslllt frllae count 1S
reached for the priaarJ station or to terainllte the secondllry
statioll vhen nothing is being recei,edlilldicated by 1061 dlsPlay
code being displll,ed continoasly).

o

Terainllte routine lifter resettillg SCllnller. Thi. optioll should be used vhen
you are done testillg with the link test. this vill terllll1ate the link
test routille IIlId if you hllve not set the CI sellse svitches to cycle 011
request or if you sre not runlling aultiple IPt's or IIdllpters tbell the
DCII will coae out vith II diSplay B stop code of 80?? IIs~illg tor your
next test request.

o

o

1'030

Bnter transait, recei,e, vrap or dial option.
I~~!:

Inter 1n
0001 0002 0003 000" -

o

0005 0006 -0001 -

c
o

o
o
o

0008 -

0009 0001 -

See eXlllple. 011 how to use stop codes P030 through
POQ2 after the 1'042 stop cods deacription at the _lid
ot the aalloal illtervelltion stop codes.

sw~tches

8-B four selected option. options Ire:

trallsait test 011 a non-switched leased line or
local attach.ellt.
aeceive test on a 1I01l-svitched leased lille or lOCal
attacbaent.
'
Irap a pair ot lIoll-switched or local linea.
trallsait test 011 II swltch_d 11ne Bsing aallolll dillillg
alld 1111e connection.
aeceive test 011 a switched lille using IIlIlIual dialing
and line connection.
wrap a pair ot svitched lillss usillg lIallual dialillg
alld 1ille cOllnection.
Dill nuabers on all lIuto call originate line interface
and then transllit on tbe attached svitched lille
illterface.
'
Irap data on switched lilies. this option vill
dial nuabers 011 an auto call originate interface.
lnsver the call on a switched line interface.
Go into receive aode on the line illterface that
allsvered the call.
!hell trillsait 011 the lille interface IIttached to the
auto cill origillate line illtertace to the recei,e ~.
line.
,
Dial nuabers cOlltinuously on an auto-call origillate
lille interface.
Dial nuabers on an auto call originate liDe illterface
and then traDsllit an alterllate all zeros and all olles
character pattern for 12p characters, tbell discollnect
the lille address.

1'031

Enter the liDe address of the auto call origillate lille interface to be used ill this test.
foraat to ellter the line address.

r032

the line address entered is either in9alid or not configured as an auto call originate line.
address IIgllin as define4 !n stop cods P031.

r033

Bnter the first

dl~lt

See stop code 1'001 for
Illter the line

to be dillled 011 the auto call origillate lille.

set switch D to 0 and switch I to the digit to be dlaled. !he digit to be 4illled aay be 0 through 9 for dial
diglts, C for the elld of lIullbers character or D for the sepllrator character. It should be IIOted that the flld of
lIulbsrs IIn4 separator characters are lIot supported by aost IBK alld Don-I8B auto call units ill the O.S.l. alld
should be used with cautiOn. At this tlle register r'13' points to a 10cat1011 in storage vhere JOu (as all optionl

Type 2 Scanner Ir!

X37050U 6.2.1

IBK 3105 COK"QHICA!IONS CONTROLLER"
TlPE 2 CO!aQNIClTIONS SCANNER IFT SY!PTO! INDEI

DC!.-3105E-09
!(.

DISPLAY B STOP
!ANOlL INTERVENTION ACTION REQUIRED CODE
may store up to 32 bytes of dial digits and then set switches C and D to PF and press the START push button to
continue. If you select this option to store the dial digits, then the first 4 bits of each byte should be 0 and
the last q bits should be the dial digit, and you should store a I'FP' character after the last digit to be
dialed. If you make any errors in entering any dial digits you will be asked to enter the first dial digit again.
If you used tbe end of numbers c~aracter, it must be tbe last digit entered.
F034

!

--'"

Enter the next digit to be dialed.
Set switch D to 0 and switch E to digit to dial or set switches D and E to Fr if last digit to dial was entered
previously. See stop c04e 1'033 for caution on d1ll1 digits and optional use of register 1'13' storage address
which you may still use as an option. After you have entered the dial digits,the digits will be validated, and if
any digit is invalid, you will be asked to enter the first dial digit again. This manual intervention code may be
repeated up to 3l times to get a total of 32 digits.

1'035

Bnter the transmit line a4dress to be used in this test.

See stop code 1'001 for format to use.

r036

The transmit line address entered is invalid or not configured as a line that can run in transmit mode.
transmit line address again as defined in stop code p035.

F031

The transmit line address entered can not be used with the switched line and/or auto call originate test option
you selected. Enter the trans.it line address again as defined in stop code f03S.

P038

Bnter LCD and set mode bits for transmit line.

Enter the

set switch B to the line control definer (tCD) wanted.

Set Hex;

o

for start/stop 9/6 line control whicb has one start
bit, 6 data bits and 2 stop bit ••
for start/stop 8/5 line control.
for start/stop 9/1 line control.
for start/stop 10/1 line control.
for start/stop 10/8 line control.
for start/stop 11/8 line control.
for DLC 7 bit character line control.
for DLC 8 bit character line control.
for DLC 6 bit character line control.
for DLC 5 bit character line control.
for BSC EBCDIC line control.
for SSC OSASCII line control.

2

"
5
6

1
8
9
A
B
C

D

!2I!: Do not use LCD=O, 2,5 or 7 when transmit and receive(wrap)
all zeros is selected else an error may occur indicating
more characters were received than were transmitted.
Do not use !.CD- 4 or 6 when transmitting on a line set
that can detect a receiYe break Yia the stop bit check since
you may get error stops indicating ICW bits 0-3 are in error
with the 'stop bit check' bit being on.
Set switch C to o.
Set switch D and E to the hexadecimal sum of the following
bit definitions.
The 8 bits obtained are used to set SDP bits 2-9 (ICW bits 26-33)
during the set mode operation.
Switch D
hex 8 This bit is reserved and should be O.
hex

~

Diagnostic aode latch is set if this bit
is a 1.
This bit sho~ld normally be a 0
to test normal modem operation.
If this bit is a 1 and the set Data Terminal Beady
bit is a 1, the modem test lead wlll be activated
in IBft integrated modems.
When the diagnostic mode bit is set
on, that CS hardware forces on a Data Set Ready and may force
a Clear To Send indication according to the line status.
This bit should be 0 for all auto call originate
and switched line test options.

hex 2 Set data terminal ready if this
This bit should notlllally be a 1
modems.
If you select to do an internal
operation, this bit should be a
bit should be a 1.

bit is a ,.
to test
trans.it or wrap
0 and the disgnostic mode

hex 1 Sync bit clock latch is set if this bit is a 1.
This bit should normally be a 0 for start/stop

6.2.8 X370SGAA

Type 2 Scanner 1fT

t'·

~j'

o
o
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lIn 3105 CO!"Q.ICA~IOHS CO~!BotL!B
2 cOlaQnlcA~IO.S ICl.HIB lr~ ~YIP!Ol lHPII

~YPI

DISPLAY

~

STOP

IAHUlt IHTIBVIB!IOH ACTIO a B!gulalD COOl
line control anll a , for synchronous and Bse line control.
8ith S08e special features, this bit aay control other tha~ tbe
clocking .ethod.

0
Switch a

I

0'

hex 8 axternal clock latch is set if this bit is
a ,.

If this bit is 0, an internal clock is used.
For proper aodea operation, sase lodess re9uire that external
clock be usell.
If you set this bit to 1 to select external cloak, then you
sboulll set tbe two oscillator select bits to O.
If you set the diagnostic aode bit to a " tbis bit sbould
be a 0 except for the case wbere IBa integrated
80de8s that provide external clock are put in test 804e
by ha,ing both the lIiagnostic aode anll Dlta Terlinal leally
lIits set to 1.

0
0'
hex

0
0

0
0

o

o
o

Data rate select latch is set on if tbis bit is a 1.
On 101l8ls that proville two operational speell's, this bit
being on shoulll select the highest of tbe tva speells.
The lIata rate select latcb lay be usell for otber purposes
on soae line sets.
An exaaple is tbe alA local line Bet type 1r wbere
it dri,es the local attachlents lecei,e tine Signal
Detect leall.

hex 2 and
hex
Oscillator select bits used to select one of ij possible
oscillators.
Tbese bits aay be set to 00, 01, 10, or 11 to select
the 'st, 2nll,lrd, or ijth oscillator position.
The 1st oscillator is reguired to be the lowest speed
oscillator.
You sboulll use caution in selecting tbe 2nd, 3rd, or ijth
osCillator since that oscillator aay not be installed
or lay exceed the aaxiaul allow operating speed of the line
set under test.
Tbe oscillato~ select bits should be set to 00 i~ fOU
ha,e tbe external clo~ bit set to ,.

0

U

ij

1'039

LCD enterell for transait line in in,alid or tbe transait line set type can not run witb tbe Leo type selected.
Enter teo and set lode bits again as in stop code 1'038.

rou

Enter the recei,e line address to be used in this test.

1'038

Tbe recei,e line address entered is in,alid or not configured as'a line set type tbat can run in receive aode.
I~ter the recei,e line address again as in stop code 1'03A.

1'03C

~e

r03D

!nter tCD and set aode bits for receiYe line.

f03!

LCD entered for receive line is invalill, or the receive line set type can not run with the tCD type selected, or
for vrap options the teo selected is not the saae as t~e transsit ~D. Inter the tCD and set lode ~its for tbe
receive line again. See Itop code 1'038 for forlat.

1'040

See stop code r001 for toraat to use to enter alldress.

receive line address entered can not be used witb the switched line and/or auto call originate test option
select ell. Inter tbe recei,e line address again al in stop code 1'031. Tbia error vill alao occur if a vrap option
vas selectell anll the receiye line can not run vith the trans.it line teD Of a.t loll. options.
See atop colle r038 tor foraat to enter teo and let lad. bits.

anter trans lit lIata options and/or first data cbaracter to trans.it.
111 data characters Ire transaitted as enterell
with bit 1 trans.itted first, then bit 6, then bit 5, etc.
The characters are transmitted frol the first enterell to the
last entered anll then tbe same character pattern is repeated
continously until the test is terminated.
If you select the option to tranSmit all sarks (one bits)
or all space (;ero bits) any data characters entered are
19nored.
Set switch B to the bexadecisal sum of the following options:
hex 8 Translit in HaZI lode if a DtC lCD is selected.
hex

ij

All ODe bits (larks) are transmitted if this bit is a ,.
For start/stop the pad flag will te set on to suppress the
start bit and data characters of all one bits will be
transmitted. For OLe the 'disable Stuffer' bit vill be
set on to suppress the zero bit insert function and
data characters of all one bits vill be trans.itted.
Hate that tbia translit all ones options ia intepded for aode.

Type 2 Scanner 1FT

X3705611 '6.2.9

IBS 3105 CORftUNICATIONS CONTROLLER
TYPE 2 COKKUJICATIONS SCANNER 1FT SYMPTOM INDEX
DISPLAY B STOP

DCL-3705E-0~

RANOAL INTERVENTION ACTION REQOIRED CODE
equalization functions and can not detect a failure such as
an open transait data lead. You should wrap data using some
charaeter with both zero and one bits for a better exercise of the
mode a or coa8unications line.

(~~

''(.1'

hex 2 Transmit a 11 zeros" For start/stop LCDs two
pad characters of all one bits are transmitted
and the~ the transmit lines pcr is set to 'l'
to suppress stop bits and all zero bits are
tnnnitted.
FOr other LCDs all zero bits are transmitted
vithout any SIn or flag characters.
hex 1 Transmit all ones in DLC mode without setting the
'Disable Stuffer' bit so zero bit insert will operate.
This option vill work only if selected a DLC LCD.
Set Switch C to the hexadeciaal SUI of the following options:
hex 8 Ignore ICW 0-3 if this bit is a 1.
OtherWise, after every transmit line character service
ICW bits 0-3 are checked, and if any of these bits are
in error, an error code is displayed.
hex 4 aeserved. set to O.
hex 2 Transmit DLC Link Test. This bit is ignored unless selected
a DLC LCD or if selected the transait all ones, the transmit all zeros
Or the trans. it DLC all ones options.
hex 1 Alternate data input option if this bit is a 1.
If you set this bit to 0, then set switches D and E to
the 1st character to be transmitted, select FUNCTION 5 and press
the StAaT push button and you will get stop code F041 asking for
next data character to transmit.
If fOU want to use the alternate data input option, do the following;
a.

Get storage address from register X'13'.

p.

store the count of the number of characters
to be transmitted as the first character.
The highest valid count is X'78'
to transmit 120 characters.
The program will transmit this number
of characters and then go back to the
first character and repeat the same
number of characters continooslr until
the test is terminated.

c.

Store up to 120 consecutive characters after
the count byte.
The 'characters to be transmitted are put in the
PDF in the same format that you store them except bit 0,
bits 0 & 1 or bits 0,1 & 2 may be cleared.
If selected LCD 4, 5 or 8 the characters
you store will all have the 0 bit set to 0 since these are all
7 bi t character LCDS"
If selected LCD 0 or 1, then bits 0 and 1 will be set to 00.
If selected LCD 2 or B then bits O,l,and 2 will be set to 000.

d.

Set switch B to O.

e,.

Set switch C to 1 or 9 (according to the
ignore ICW bits 0-3 option) to indicate this
alternate data input is being used.

f.

Select function 5 and press the start push
button.

Set switches D and E to the first character to he transmitted
unless selected the alternate data input format or the
transmit ~ll one or all zeros option in which case switches
D and E are ignored.
F041

Enter next character to be transmitted.
set switches Band C to 00 and switched D and E to the next
character to be transmitted or set switch B or C to any non
zero position if the last character has heen entered previously.
At this tiae register X'13' contains an address painting to a storage location that contains a

6.2,.10 X3705GU

•

Type 2 Scanner IFT

(

o
o

o
0
0'

IBM 3105 CORnONICATIOHS CONTROLLEB
T'PE 2 eOnHQ~ICATIOHS SCANNEB 1fT SYHPTOH INDEX
DISPLAf 8 STOP
HAHOAL INTERVENTION ACTIOH BEQUIRED CODB
byte that has the number of characters you have previously entered
followed by the characters you have entered.
You may (as an option) use the alternate data input steps a,b and c
define4 in stop code POqO and
then set switch B or e to a non zero pOSition, select function 5
and press the STlB~ push button.
F042

0

Enter receive data options.
If you are wrapping data then the received data characters are compared vith the transmitted characters selected
unless selected the receive all ones, all zeros, DLC link test or ignore receive interrupts options. If you are
doing a receive only test and have not selected one of the above options then the received data characters are
ignored but you may display the the last data character received by displaying reg X'qql (byte 1) while the program
is running. If selected a synchronous LCD (S,9,l,B,C or D) end did not select one of the above options then there
vill be no indication of apy data being received unless a valid synchronizing character for the tCD in use is
received.

. BQI~:

Par a wrap option trans.itting all ones, all zeros, DLC all ones or DLC link test
the same receive data option should be selected or error stops aar occur.

0

Set switch B to the hexadecimal su, of the following options:
hex 8 Beceive in NRZI mode if this bit is a 1 and if
selected a oLe LCD.

0
0

hex

0

~

111 one bits are expected to be received if this bit
is'a 1.
If this bit is a 1 and all one bits are not received,
an error will be reported.
Note that this receive all ones option is intended to be used
for 80dea equalization and can not detect a failure such as an
open receive data lead or a receive data lead clamping probles.
You shOUld wrap some data character containing both zero and one
bits for a complete exercise of the 80dems or co,aunications line.

hex 2 111 z~ro bits are expected to be received. If this bit
is a 1 and all zero bits are not received, then an
error is reported.
hex 1 Ignore all receive character service interrupts. ~f
this bit is a 0, and you have selected one of the wrap
options, and all ones Gnd all zeros options are 0, then a check is made
that characters received are the saae as characters transmitted.
Set switch C to the hexadecimal sum of the folloving options:
hex 8 Ignore ICW bits O-q if this bit is a 1.
If tbis bit is a 0 and the Ignore All Receive Character
Service Interrupts bits is a 0, then ICW bits O-q are
checked on every receive character service interrupt and an error
is reported if they are in error.

o

bex 4 Beser,ed. Set to O.
hex 2 Beceive OLC Link Test. This bit is ignored unless you
selected a DLC LCO or if selected the receive all ODes
or the receive all zeros options.
If you select this option then receive dsta errors are counted
and displayed in the display B indicator lights as an X'E0111 code
where the 11 is the low order byte of the received data error count. The total
error count is always available in reg X'1B'. Hate that it is common to
get one or two errors when the routine first starts receiving due to clock
correction time and the DLC ones bit counter circuit.

o
o
o

hex 1 Reserved. Set to O.
Set switches 0 and E to 00 .•
1'049

Enter options for routine X6!'2; see routine heading for selections.

rOSO

Euter transmit line address for routine X6P2; see routine heading for se lection s.

li052

Enter the receive line address for routine 161'2; see routine heading for selec1:iona.

1.'055

Enter options for routine X6l'4; see routine heading fot selections.

11056

Enter the transmit line address for rontine 161'q; see stop code FOO, for format.

F057

Enter the receive line address for routine X6PQ; see stop code 1'001 for format.

Type 2 Scanner lilT

X310SGAA 6.2.11

{

i,'

DISPLAY 8 STOP
ft!NUlL IHTEBVEHTION ACfION BEQQIBED COOS
r058 Enter the high speed local attach.ent oscillator frequency and line address for routine X6r5; BBe
for selections.

Disconnect the external wrap facility for routine

,~

X6r~i

rout~nB

heading

1"
't_f

Bee routine beading.

/1-"""-_/

6.2. 12 X3705Gll

I

-'"

I)CL-3705E-09

18" 3105 COKK08ICAT10HS CORTBOLLEB
TI~E 2 COKKOHXCAfIONS SCANRER 1fT SIK~TOft INDEX

r059

\'

Type 2 Scanner 1fT

(

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IBM 3705 COMftUHICATIOHS CONTROLLER
TYPB 2 COftSUNICATIONS SCAHNER 1FT SYftPTOS INDEX

0:

EUIIPLB A:

Transait All ones.

o

This test aay be used for equalization of transait lines.
This test is equivalent to aodee Test 3.
, IIAnL UDIC1TIOil

o
o

F030
1'035
FOla

o
o

c

(Select Option)
(Select Jeit
Line)
(Select LCD
and ~ode Bits,

TYPICAL

SWITCH RBSPONSB IN FUHCTION5

0001
0040

(Transmit Option. Press START.
(1st LIB, 1st Line Address).
Press START.
C03a (LCD for BBCDIC line control, Data
Terminal Beady, Sync Bit Clock and
External Clock.l ~re~s STABT.

4000

(Transait 111 ones).

Press START.

The scanner transaits all ones on the selected line address.
Successfu~ transmission is indicated by an incrementing count
In Byte 1 of Display B.
Bqualization tests can then be performed.
To restart on any error stop, press START pushbutton wbile in
1'OHCTIOII 5.

EXAMPLB B;

Beceive All Ones.
This test eay be used for equalization of receive lines when all ones
are being transmitted froa another station to this station On a
sele~ed line. Tbis test is equivalent to !ODEa TEST 4.

PANEL IHDICATIOII
F030
F031
F03D

"

TYPICAL CB SWITCH RESPONSB

(Select
0002
Option)
(Select
00""
lIeceivs Linel
(Select LCD
C038
and Set Mode Pits)

"j

F042

o

(Select receive
data option)

4000

(Receive Option).

Press START.

(1st CS, 1st LIB, lrd Line Address).
Preu nUT.
(EBCDIC LCD 8 Bit Line Control, Data
terminal Ready, Sync Bit Clock, External
Clock!_ Press START.
(Receive all ones).

press START.

!g!!i

Reception of all ones successfully, in synchronous mode, is
indicated by an incrementing display in Byte 1 of Display B.
Bqualization tests can then te performed.
to restart on any error stop, press start pushbutton while in Function 5.

BlAULB C:

Dial nuaber 6238 ou an autocall originate line interface.
Answer the call on a switched line interface.
Go into Receive Kode on the line interface tbat answered the call.
Trans.it data characters X'01' and 1'02' continously from the line interface attached
to the auto call originate line interface to the receive line.

PANEL INDICATION

o
o

C~

!Ql!:

C:,"·'
o

DCL- 3105B- 09

F03Q
POJI
1'033

F034
F034
F034
1'034
F035
FOJ a

TYPICAL CE SWITCH BESPONSB5

(select
0008
Option)
(Select Auto004C
call Originate
Line Address)
(Select 1st
0006
Digit to be
dialed)
(select
I
00Q2
subsequent ~igit)
(Select
.
0003
subsequent digit)
(Select
0008
subsequent digit)
(Select
oopp
SUbsequent digit)
(Select
0048
transmit line.)
(Select LCD
and Kode Bits for
Transll1t Line)

Type 2 Scanner IPT

(Test autocall as described above) •
Press start.
(1st CS, 1st LIB, lutocal1
Originate Line Address). Press start.
(6 is 1st dial digit).
(2

iii

fr

dial i1~giH

Press start.

• Press start.

(3 is 3rd dial digit).

Press start.

(8 is 4th dial digit).

Press start.

IFP to indicate last digit bas been
entered. Press start.
(1st CS, 1st LIB, 5th
Line lddress.) Press start.
COlc (BSC
EBCDIC Line Control, Data
Terminal Ready, sync Bit Clock,
External Clock, Data Rate Select).
Press start.

X3105GU 6.2.13

It)

(J
IB" 3705 COn"ONIC1TIOHS CO.T~OLLeR
TY~B 2 cOlnONICATIOKS SCANNBI 1FT SYKPTOK IIDBI

DCL-3705B-09

(}

FOll (Select Receive 0050 (1st CS, 1st LIB,9th Lipe Address).
Line)
Ptess start.
C03C (BSC EBCDIC Line Control, Data
r03D (Select LCD
Terainal Ready, Sync Bit Clock,
and lIode Bits for
ReceiYe X,be)
external Clock, Data Rate Select).
press, StART.
0001 IData character. 01). 'te •• SUBT.
ro,+o (Select hit
Data)
0002 (Data Characters 02). pres. STAIIT •
rOil 1 (Select
• Ilbseljllent data)
noo (Indicate last data character has
FOll1 (Select
been entered). Press STABT
sllbseljnent datll.1
rOIl2 {Select lIeceive 000,0 (Indicate expected receiYe data same as
Trauait data). 'ress STABT.
Datal
While in dialing process the dial digits are indicated in Byte
1 Bits 11-7 of Display B.
On reception of datil. s~ccessfully, liP increaenting count is indicated
in Byte 1 of Display B.

I

'"

6.2.111 X3705Gll

Type 2 Scanner 1FT

(

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IBft 3105 cOnftUNleAfloRs cORfaoLLBB
tYfl l COftftDHlCATlOHS SCARHII X't SllfTOft IHDIX
CHlfTBB 7.0:TIPI 3 COIIUHIC1TIOIS SC1HRII StIPTO! IIDBX

X101

Conf1gQration Data Set (CDS) Cbeck loutine

EllUl J!D~!ln12J
This routine ,erifies that necessar! CDS control data is valid. Data ,alidated is (1) scanner
type, (2) scannel: UQs, (3) SCaRllel: featutes, (41 oscUla to!: tne, (5) LIB tfpe, and (6) line
set type.
BBaOa
~U

110'

oieOl
The CDS is in el:ror; the scanner is not configured as a type 3 cOllunication scannel:.
aegistel: X'16' contains tbe stol:age address of the CDS data block in tbe CDS fOI: tbe
ad~ptel: under test.
EBaOR

!;!lBI
nOl

OX02
The CDS is in error; either no oscillators or an invalid oscillator t!pe is coded in the
CDS for oscillator nusber
(first oscillator position).

°

BBaOB

!¥!tnl
1101

0%03

,II

The CDS i. in el:ror; either the oscillator in tbe first oscillator position is not the
lowest speed available, or an invalid oscillator type code was found in the CDS for the
second, tbird, or fortb position.

:1

I

o
c
o

o
o

D99-310511-09

BIIaOB
~l!J

1101

01011

The CDS is in etrOr; no LIBs are configured in the CDS data. Begistel: X'16' contains
tbe address of tbe CDS data block for tbe scanner undel: test.
BRaoa
~RI

x101

OX05
Tbe CDS is in errol:; no lin~ sets are configured in tbe CDS data.
contains the CDS data block fOI: the scanner undel: test.

X103

aegister X'16'

Input/Output aegister Test
111 valid input and output registers that are used with,the type 3 cossunication scanner are
tested b! this routine. The first line address is used to setup the scanner and outputs X'40'
thl:ough X'4P' are executed to ,eriff that no level 1 interrupts occur for anY of the output
instnctions.,
,
Input inatl:uction. X'IIO' through X'4P' 'are te.ted in like Iinnel: to Tel:1ff that nO level,
interrupts occur.
EBaOI CABO
PlAto
FUftll
r&SAU!!1 fWIQ .. i&JiU!!..
TE26X
OXOl E312
6-090
E3S2
TEsOI
B3Q2
Us2I
B3B2
CK001

~J!D

x103

Tfpe 3 Cossunication Scanner IPT

ADDI'UOIlAL
UI2!l!!UIU!

1~105Hll

7.0.1

tB! 3705 CQ!!UNICATION5 CONTROLLER
TJ'8 3 CO!!UHICATIOR5 SCABNER 1fT 5YK~TO! IND8X

D99-370SE-09

i("').

I,

An I/O check occurred after an input or output instruction. Register X'14' contains the
failing input/output instruction. Register X'16' contains the storage address of the
instruction tbat caused tbe error.

}'

J

~,

Iil~)

X703

ERROB CARD

LillUQ!!

fElLD

~~!

~!!!El!Q

OX02

83E2
8302
B3B2
8352

TE70X
TES2X
TE26X
TESOX

...

fET!1I
~~!l!Q

ADDITIONlL

... ll!fQUJU9l!

6-090

A level
cheek occurred after an input or output instruction. Begister X'14' contains
the error bits stored in tho level 1 routine fro. the input 1'43' Register X'16'
contains the address of the input/output instruction causing the level 1 check; Register
X'11' contains tbe line address.
1705

(t: '
ij

Attachment Buffer Address Register (ABAB) Test

All valid addresses are written into and read from the attachment buffer address register via
an output and input X'40! instruction.
ERROR CABO
LQS!UQl!

~~!

nos oxoe

E3H2
8352
1!3E2
83D2

FElL 0

FETIII!

usn

f-180
f-2S0

ADDITIONAL

U!!E!!J.l ... UiIUiQ.. 1l!lQ!lllAUQ!!
TBSOX
CXOOl
CXOOg

The address set via an output X'40' and the address read via an input X'40' are not
equal. Register X'14' contains the address read via the input X'40' and Register X'11'
contains the address used in the output X'40'.
X707

~ower

On Reset, Communication Scanner Disable, and ICW Array Reset Test

The routine disables all LIBs followed by a pover-on reset to the scanner. An output X'43'
with bits 0.0 and 1.6 on is used to disable the scanner (~ower on Reset). Beginning with the
first 11ne, all ICW bits are checked to verify that they are reset to tbe correct state. Each
line address is checked in turn.

X101

BIlliOR CARD
k21ll! Lj2gIlQ!!

FEALD

2Ali~!Q..

U!Ull!Q.. UI211!1A'l:lQ!

OX01

TBS21t
TEIiOt
USOX
TB211X
TE20X
TBSIIX
TB32X
TE26X
TfSOX
TF30X
'lF20X
TF41X

f-210

B302
B3L2
B352
B3K2
B3F2
B382
B3112
B3112
B2J2
B202
B2T2
E2V2

FETH!

ADDITIONAL

\,

The ~CF field read via an input X'4S' vas not zeros after the Communication Scanner
disable. Register X'15' (bits 0.4-0.1, contains the bits in error; ~egister X'11'
contains the line address.
Ell 110 II CABO
LQS!U2!!

~llll

X707

OX02

B3E2
B2G2
B3D2
B302
B3f2
B3R2
B3S2

1.0.2 X370S8AA

FEALD

FETIII!

UiUQ..

UliE,!!9~

TB70X
TB21X
TE311X
TBS2t
TE20X
TB26t
TBSOX

F-270

ADDITIONAl

l!!fQ!I!J!llQll
\~

.'/
",

Type 3 Communication Scanner 1FT

if
\~,

-

'~~-'----

o
o
o

"
D

BRROR CUD

£9.!lE. LQCATIO,
1707'

0103

1!3D2
E3L2
B3E2
B3K2
E3S2
E3Q2
!2D2
E2J2
32.2
E2G2
32T2

1'BALD

PETKII

nnl2a. lAG no.
T1!3111
T1!/IOI
TE701
TE2111
U501
TE521
Tp621
Tp501
T1'221
TpQOI
'fl'201

ADDITIOIAL

!!!2!Jmg!

1'-210

NOTE •••• If the High Speed Scanner Peatare (230KB) is installed:
E312 {T1!351J is also a possible failing card.
The PCP did not resain at zero during an output 1'/15' attespting to set the PCP to 1'1'
with the cossunication scanner disabled. The bits in error (read via an input 1'/15')
are contained in Register 1'15' (bits 0.11-0.7): Register I'll' contains the liDe
address.
!BROB CAiD

£9.J!I IoQ£ATIOI
1707'

OIOQ

~

1!3E2
E3K2
E2J2
E2112
E3L2
!2V2
E2C2

PEALD
nli.I!!b.
' T1!101
TE521
TP501
TP3U
TE/IOI
TP/IU
TP601

PE!!.'1I11
faIUNQ.

ADDITIONAL

!!I2!UIUl2!

1'-270

The PCP did not resain at zero during an oatput I'Q5' attespting to set the PCP to 1'7'
with the cossanication scanner disabled. The bits in error (read via an input 1'/15')
are contained in Begister 1'15' (bits 0./1-0.1): Register I'll' contains tbe line
address.

o
o
o

D99-3105E-09

The PCP field read via an inpat I'Q5' vas not zeros after the Cossanieations Scanner
disable. Register 1'15' (bits O.Q-O.l) coatains the bits in error: Register I'll'
contains the line address.

ni

o

- _.. _.... --_.._----,._-----_. "._-." ..,,_... _..

ROTE •••• If the 8igh speed Scanner Peatare (230KB) is installed:
33N2 {TE35 I) is also a possible failing card.

o
o

o

_.. - .. _--_. --_...

IB! 3705 CO!!UNICATIONS COITBOLLEB
TYPE 3 CO!!UNICATXONS SCAIIEB IPT SYKFfOK INDEI

o

o
o

-

EBROB CUD
LO£A'lION

£Q.J!I

170T 0105

1!3E2
1!3S2
1!3Q2
1!3112

PEALD
PAGE.o..

PETK!
llill2:.

TE701
TE501
'!ES21
TE321

1'-270

ADDITIORAL
!UQ!J!J:u2!

All check bits (input 1'/13') sbould bave been reset by the eossanication scanner
disable. Register 1'15' contains the bits in error. Register ~'11' contains the line
address.
ERROB CABD
LO£AUOB

g}J!I

170T

0109

o

E2J2
32V2
1!2B2
E2C2
E2U2
!!3Q2
E382

PEUD
ll§ll!!1&,

TP501
TPIlU
TP9U
TP601
TP301
TES21
TE5111

. ADDITIONAL
PET!!
PAliIiBO. !!lQllllIl!!!
1'-270

ICI /1.2-/1./1 (ones coanter) shoald have been reset by the cossunication scanner disable.
Register 1'15' contains the bits in error. Register I'll' contains the line address.

1707

ERROR CARD
£Q.J!I LOCAnON

PEALD
fAGEIO.

0109

'fl'601
TEIIOI
TE5111
'!E501
TE3/11
TE2/11

E2C2
E3L2
!!3H2
!!3S2
!!3D2
E3K2

Pl!UII

ADDITIONAL

!!ill!!:. l!lQ!!Illl2!
1'-270

Type- 3 CO.llanieation Scanner IPT

137058AA 7.0.3

(t J
t'

IBN 3705 COftHUKICATIOHS CONTROLLEB
TT~E 3 ConnUNIC1TIOHS SC1RREB 1FT SynPTOH INDEI

D99-3705E-09

NOTE •••• If tbe Higb speed Scanner Feature (230KB) is installed:
B3N2 (TB351) is also a possible failing card.
ICW 4.5 (last line state) should be set on by tbe co •• unication scanner disable.
Register 1'15' contains tbe bits in erroe. Register 1'11' contains the line address.
ERROR CABD
1707

PBALD

PETnn

ADDITIOHAL

~RI

L2£!Il2!

!liE!2~

!Agl!2~

1!I~BD11121

0101

E2C2

TP601
TP41X
TE701

P-270

E2'i2

E3B2

t-"

I'

,

ICW 4.6 (Display bit) sbould bave been reset by tbe co •• unication scanner disable.
Register 1'15' contains tbe bits in error. Register X'11' contains tbe line address.
ERROR CARD

1707

PEUD

PITH!!

£2RI LQguQ! fA!i!!9..

Ug1!~

OIOB

P-270

B2'2
B2C2
B2H2
E3L2
B3Q2
E3112
B3G2
1l31l2

TPIIU
TF601
Tl'31X
TB401
TB52X
TE321
TB21X
TE701

ADDITIONAL

IUQIUIUl21

ICW 1i.7-5.0 (ones counter) sbould bave been reset by tbe co •• unication scanner disable.
Register 1'15' contains the bits in error. Register I'll' contains the line address.

1707

ERROR CARD

FlllLD

PBT!!

~RI

LQ~Q!!

R!gJ!!2~

!l!il!!~

OIOC

1l2N2
1l3Q2
1l3H2
1l3G2
Il3L2
1l31l2

Tr221
'lB52X
TE32X
TE211

P-210

ADDITIONAL

IIlQU1U2l\

TIlIiOI

TE701

ICW 5.1 (level 2 pending) sbould bave been reset by tbe comsunication scanner disable.
Register X'15' contains the bits in error. Register X'11' contains the line address.
IlRROR CARD
1707

PIlALD

PETHH

ADDITI08AL

~QI

L9£61l21 119112& !AiJ!2& 11121411121

OXOIl

E3L2
1l3D2
1l3K2
1l3P2
11282

TBIiOX
'lB311X
TIl 2 II X
TE20X
TP22X

P-270

NOTE •••• If tbe Higb Speed Scanner Peature (230KB) is installed:
E382 (TE35X) is also a possible failing card.
Cycle steal valid bit (ICW bit 6.5) sbould bave been reset off via tbe co •• unication
scanner disable. Register x'll' contains tbe line address under test.
BRROR CARD
X707

l'EALD

PETK!

~QRI

LQ~IIQ!

fA~!QL

f~I!~

OXOP

1l3S2
23D2
B2P2
B2G2

rESOX
TE3'U
TrIlBX

P-270

(
\

lDDITIONll

I!IQ!D1II2!

B2'i2

"2C2
NOTB •••• If the Higb Speed Scanner Feature (230KB) is installed:
2382 (TE3SX) is also a possible failing card~
All cycle steal array address and PDP array address bits (read via input X'IiE') should
bave been set on via the communication scanner disable. Register X'1S' (bits 0.0-0.7)
contains tbe bits in error; Register X'll' contains tbe line address under test.
ERROR CARD
Q!!!! LQ£!nQ!!
1707

OX10

22l!2
l!2112
l!2T2

7.0.4 i1705HAA

PEUD

FETIIII

lDDITlOlllL

u'2199-3105E-09

!he data read from the cycle steal address field of the ICW and from the Bce field
contained identical 'hot' bits. Register X'15 contains the bit(s) in error. Register
X',,' contains the line under test. Brror stops OXOl and OX02 Should bave occurred.
!he error is probably caused by tbe out register.
EBlIOR CABO
X709

PBALD

~!lRB

UTilI!

J.1l~W2l!

iA!i!!g.. fMing .. lU2l!I!U12!

OXOII

B2112
B202
B3&2
B3Q2
B3S2
B3J2

TU1X
T,30X
'US III
TB52X
!BSOX
TE22X
TB21X

'-320
P-230

B3G2

The data
contains
could be
If error
the vork

X109

,

("
,

~,

ADDITIONAL

read from the BCC field of the ICW is not X'OOOO' as expected. Register X'15'
the bites) in error. Register X' 11' contains tbe line under test. Tbis error
caused by eitber the out register, ICW control circuits, or tbe work register.
stop OXOS, OX06, OX07 or oxoe do not occur, suspect tbe ICW control circuits or
register.
'

BIROR CARD

PBALD

FETIIII

kSlDE

*Q~lIlQ!

!lgEl!2~

!A§!!2.. !!f211l!lI!2!

OX05

B2D2
B3Q2
B312
B3F2
B312
B3L2
B3S2
E3G2
8302
8382

"62X
'-320
US2x
P-230
'rE26X
TE20X
Terminator
'rEliOO
TBSOX
'rE21X
U34X
'rE70X

ADDITIONAL

Gate ICW Work Reg to In Reg

NOTE •••• If the Higb Speed Scanner Feature (230KBI is installed:
1382 (fI3SX) is also a possible failing card.
ICV 8.0-8.11 bits are not X'F' as expected. Register X'15' contains the bits in error.
If error stop OXOII did not occur, suspect the ICW control cirCUits or tbe work register.
ERROR CARD

x709

'EALD

'ETIIII

ADDITIO~AL

£2D!

L2~!1Q!

EAiE!2~

fAi!l!9..

OX06

13J2
1302
13F2
B2L2
B2U2
12112

TE22X
TB52X
TB20X
Tl'II6X
Tl'30X
Tl'31X

l'-320
,-230

·1l!~211ttA~!2!

IC' 8.5-8.7 bits are not X'l" as expected. Register X'1S' contains tbe bits in error.
If error stop OXOII did not occur, suspect tbe ICW contIol circuits or tbe work register.

n09

ERROR ClBD

nALD

FETHII

kSl~!

I.2~!!1Q!

f!!i!l!Q ..

flgll!~

OX07

ElJ2
E3G2
E302

'rE22X
TB2n:
TB52X

F-320
P-230

, ADDITIONAL
lltI2UUUll

ICW 9.0-9.11 bits are not X'l" as expect~d. Bcgister X'lS' contains the bits in error.
If error stop OX04 did not occur, suspect the lCW control circuits or the work register.
ElROa CARD

X709

FEUD

l'ET II I!

£2Dl

I.Q~!!Q!

EAi!l!Q.. EAgll!9..

OXOII

B3J2
B3G2
B3Q2

TB22X
TB21X
TBS2X

ADDITIONAl.
ll!lqRttA~lQll

'-320
F-230

ICW 9.5-9.1 bits are not

~'l"

as expected.

Register X'15' contains the bits in error.

The data read from the CS address field of the rcw is not X'FFl'F' as expected. Register
X'1S' contains the bit(s) in error. Begister X'11' contains the line under test. If
error stop OX04 did not occur, suspect the lCW control circuits or the work register.
ERROR CARD

£QDl

I.~~I!2!

7.0.6 X3705HAA

FEALD

EAiEl!9..

FETIII!

ADDITIONAL

f!il!Q~

l!~QiDAIIQ!

Type 3 Communication Scanner 1FT

\

'.)'

1(·

-"

- - - - - - - - - - - - ' - - , .. ""----".. _"" ......... ,
,

o
o

o

o

IBM 3705 COKMUNICATIONS CONTROLLER
TYPE 3 COft"QNIC1TIORS SCANH8~ 1fT SYftPTO" INOEI
X709

OXOP.

o
X109

ER ROB CARD

FEUD

Pl!TKII

ADDITIONAL

~Qn§

LQ~!!IQH

l!~HQ~

l!~§!Q~

!!fQB~Jl!Q!

OXOC

Bl02
l!lQ2
Bl52

TESI!I
TES2X
TESOI

F-320
F-230

The data read from the cycle steal address and the data read from the BCC field of the
ICW was missing identical bits. Register X'1S' contains the bit(s) in error. Register
X'11' contains the line under test. Error stops 0105, OX06, 0101 or OXOB should have
occurred. This error is probably caused by the output register.
!BROB CARD

n09

SQIlI

nALO

1'l!TftM

IoQ~Q!!

U!!lI!Q..

U§I.!!~

OXOB

l!2M2
B2R2
E202
B3F2
l!lG2
E3L2
BlS2
ElQ2
E3-12

'rF31l
TP321
Tl'30X
TE201
'fB21l
TE40X
TESOI
nS21
TE221

1'-320
F-230

U
¥;'I1
I

X70C

Power On Reset Off

This routine sets the power on latch and waits for one scanner cycle. After the wait, the
power on reset latch 1s set off and the PCP field is checked to verify that it contains X'OO'.
Pover on reset is turned off with an output X'43' with bits 0.1, 1.5 and 1~6 on (see 1'-270).
The ~CP is set to X'1' and the LCD is set to X'O' and the pcr is again checked to verify that
the X'1' set correctly. Tbis routine also verifies tbat no error bits were set via an input
X'43' and tbat tbe display bit did not set.

o
o

o
o

ADDITIONH
l!!fQB!!UISH

The data read from the cycle steal address field and the data read from the BCC field
was lissing different bits. ErrOr stop OXOS, 0106, 0101 or OXOS should have occurred.
Begister X'1S' contains the bites) in error. Register X'11' contains the line under
test. The ICW control circuitry Or the work register probably caused this error.

','I

o

'-320
F-230

This error is probably caused by the ICN control circuits or the work register if error
stop 0105, 0106, 0101 or OXOS did not occur; The out register probably caused the error
if error stop OXOI! occurred.

o
o

TEIIOX
TE501
TP31X
TPlOX

The data read from the BCC field is not X'FF'" as expected. Either stop OX04 or OX05
should have occurred. Register XItS contains the bit(s) in error. ~egister X'11'
contains the line under test.

o
o
o

ElL2
l!lS2
l!2"2
8202

099-3705E-09

ERROR CARD

X1DC

SQU

PBALD

UTilI!

IoQ~UIQ!i

l!~!~

UU!lQ~

OX01

B2J2
8382
B302

TFSOX
T870X
TES4X

1'-270

P.DDITIOHAL
UlQ!l!J!UQ!!

Tbe PCF did not remain at 1'0' after tbe disable latch was set off.
contains the line address under test.
ERROB CARD
£QULQ!;AUQ!!
X1DC

0102

B382
BlD2
83S2
E3Q2
E2C2
82D2
l!2J2
l!2H2
B2G2
B202

FEALD

PETMII

U§!!iQ~

n§~!!Q

TE10X
TE34X
'USOX
'US2X
TF60X
TF62X
Tl'SOI
TF221
T1'II0X
'fP301

1'-290

Register X'11'

ADDITIONAL

.. !H!9,B!!Ul9,.I!

HaTE •••• If the High Speed Scanner Feature (230KB) 1& installed:
B3M2 (T83SI) i& also a possible failing card.

Type 3 Coamunication Scanner 1FT

Xl1050U 7.0.7

IBK 31Q5 COHNUNICATIONS COHTBOLL~R
TiPS 3 COK8UNICATIONS SCANNBR 1FT SyaPTOK INDEX

D99-3705E-09

With the scanner enabled, the PCI' did not set to X'1', when an output X'45' with
data=0007 was executed. Register X'11' contains the line address under test; register
X'15' (bits 0.4-0.7) contains the bits in error.

X70C

ERROR CARD

FEAtD

~!!~LQ!;;UIQ!

UQE!!Q ... £!!i.!!]Q... l.!!fQ!!!!!UQ!!

OX03

TE24X
TE20x
TB5114
T1'481
TF9n
TF301

l!3K2
E3F2
B3H2
1121'2
E2B2
E202

FETII!!

ADDITIONAl

1'-270
1'-200
ICI' SEL LIE 1 or /I

Error register 1'43' bits are on after setting the disable latch off and setting the PCI'
to X'7'. Register X'11' contains the line address under test; register X'15' contains
the bits in error.

HOC

ERROR CARD

FEUD

!;;QU1Q!;;A.'l;I2!!

f.MiE!!Q1 fAQ.!l!iQ.. l!fQUAlIQ.li

OX04

TF41X
TF60X
TB50X

E2V2
B2C2
B3S2

FETH!!

ADDITIONAl.

1'-270
1'-210

The display bit should have been set eff after setting the disable latch off. Register
X'41' bit 0.6 contains the display bit. Register x'11' contains the line address.
1110

Unexpected Level 1 Interrupt Test • 1

This routine disables via power on res~t all installed communication scanners and waits a full
scan cycle time for the power on reset to cowplete. Another power on reset (POR) is issued
for the scanner under test. Then the program unmasks or allows level 1 interrupts to occur
and waits one-hundred-eight miliseconds for unexpected level 1 interrupts to occur.. An output
1'43' with bits 0.0 and 1.6 on is issued to do the paR (see 1'-270). If a level 1 interrupt
occurs, the routine displays an error stop; the routine terminates i f no interFupts occur.
ERROR CARD

X710

!'EAL D

FET" l'l

ADDITIONAL

~!l~

1Q£!UQ.li

fA!iE!i9~

faQ~!Q~

!!ifQ!l!!AllQ!t

OX01

E3E2
E3H2

TB70x

TB5!1X

F-190
F-200

The scanner is reset with an output to set the 'cse disable latch' and a level 1
interrupt occurred. Register X'11' contains the input data from ABAR (line address
under test) when the interrupt occurred. Register X'13' contains the contents of the
scanner check register (X'42') when the interrupt occurred. Register X'16' contains the
contents of the scanner checks register (X'43') when the interrupt occurred. Register
%'43' and X'42' should contain X'OOOO' unless another ~1 interrupt error condition
oceurre!1.
X111

unexpected Level 1

~nterru!lt.

Test. 2

1l2!!l!U ]!a£!lUUQ!!
This routine disables all installed communication scanners with a power on reset (POR) and
waits for a scan cycle time before reseting the POR. ~he POB is reset by issuing an output
X'43' with bits 0.1, 1.S and 1.6 on, (see 1'-210). The routine unmasks level 1 interrupts for
lbO milliseconds and checks to see if any unexpected L1 interrupts occurred. No level 1
interrupts are expected.

X711

ERROR CARD

PEltD

FETH!!

ADDITIONAL

!;;Q!!!l. !'.Q£AUQ.!i

f!!i.!l!Q~

f!QE.liQ~

!!tI::Q!!!!UIQ!t

OXOl

TE54X

1'-190
1'-200

E3H2

E3E2

TE70X

An unexpected level 1 interrupt occurred after the scanners were reset and enabled by
setting the 'csa disable latch' off.
Register X'11' contains the input data from ABAR (line address under test) when the
interrupt occurred. Register X'13' contains the contents of the scanner check register
\X'42') when the interrupt occurred. Register 1'16' contains ~he contents from the

1.0.a X37056A1I

Type 3 Communication Scanner 1FT

o
o
o
o
o
o
o
o
o
o

IBK 3105 COftftUaICATIOHS CO.f~OLLB~
3 COKftUHICATIOHS SClIHBB 1FT SYK~TOft INDaX

TY~B

sconner check register (I'Q3') when the interrupt occurred4 Register x'43' and X'42'
should contain X'OOOO' unless onother L1 error condition hos occurred.
1713

Unexpected Level 2 Interrupt Test "

This routine disables all installed cO.lunication scanners via a power on reset
vaits for a scan cfcle for the POR to cOlplete. output X'Q3' is issued to elch
bits 0.0 Ind '.6 on to dislble scanners. The routine un.lsks level 1 Ind level
and waits for '80 .illiseconds for anf unexpected level 1 or level 2 interrupts
BRROR CARD
X713

rBTftft

~gnQ!

U!i.lU!Q.. lMi!!Q.. lIfrgl!U1l2!

OXOl

BU2
B3B2

tB70X
'U54l

r-190
r-200

An unexpected level 1 interrupt occurred after the scanners were reset and enabled by
turning off the 'CSB disable lotchl.
Register X'11' contains the input data fro. ABAR (line address under test) when the
interrupt occurred. Register 1'13' contains the contents of the scanner check register
(1'42') when the interrupt occurred. 'Register 1'16' contains the contents of the
scanner cbeck register X'43' when the interrupt occurred. aegister 1'43' and l'q2'
sbould contain 1'0000' unless another level 1 error condition has occurred.
BBBOR CABD
r.2WIID!

FBTIIII
rBALD
UmQ.. lAmQ..

0102

rE701
n201
TB541
Tl!401

~JlJ

1113

u

R3B2
B3r2
B3B2
B3L2

ADDITIOIIAL

1I!12!!!!U2!!

F-190
r-200
r-550

An unexpected level 1 and level 2 interrupt occurred after the scanners were reset and
enabled bY turning off the 'CSB disable latch'.

11

o
o

(POR, and
sClnner with
2 interrupts
to occur.

ADDI'UOIIrIL

FBALD

~1lI

,j

o
o

1199-3705B-09

Begister X'11' contains the input data fro. ABAR (line address under test) when the
interrupt occurred. Register 1'13' contains the contents of the scanner check register
11'42') when the interrupt occurred. Register 1'16' contains the contents of the
sClnner check register 1'43' when the interrupt occurred. Register 1'43' and I'Q2'
should contlin 1'0000' unless another leyel 1 error condition has occurred.
BBBOIl CUD

FBlLD

0103

tE201
U401
'U701

rBTftll

ADDIT10HAL

GQeI I&SW2!! iAiII9L lAi!!2L 1!!QaAll19!
1713

B3r2
B3L2
IlB2

'-550
r-560

An unexpected leyel 2 interrupt occurred after the scanners were reset and enabled by
turning off the 'CSS disable lltcb'.
Register 1'11' contains the input data fro. ABAR (line address under test) when the
interrupt occurred.
171Q

Unexpected Leyel 2 Interrupt Test • 2

!2!!IllU n!~~!!U!Q!
This routine disables via a power on reset (POR) all installed communication scanners and
waits a scan cfcle time for the POR to complete,. The routine resets the POll and 'allows leyel
1 Ind leYel 2 interrupts and verifies that none occur. An output I'Q3' with bits 0.1, 1.5 and
1.6 is i88Ued to reset the POR (enable scanner).

o

BRROR CARD
1714

PBlLD

'BTIIM

~D!

L9~lQ!

lAiJ!Q..

lAi~!QL

OX01

B382

U54X
'U701

'-190

IlB2

ADDIT10aAL

1!!!QaAAl!9!

'~20D

An unexpected leyel 1 interrupt occurred after the scanners were reset Ind enabled by
turning off the 'CSB disable latch'.

Type 3 CommUnicltion Scanner 1FT

13705HAA 1. O. 9

o
o
18a 3705 coaKu.lcA~IOMS COH!BOLLBR
tlPB 3 coaaURICAtlOHS SCA.IIB 1ft SY.PTO" IHDIX

D99-37051-09

Register X'll' contains the input data from A8AR (line address under test) when the
interrupt occurred. Register X'13' contains the contents of the scanner check register
IX'_2') when the interrupt occurred. Register X'16' contains the contents of the
scanner check register X'_3' when the interrupt occurred. Register X'II3' and X'42'
should contain X'OOOO' unless another level 1 error condition has occurred.
IRROB CABD

rlALD

rIT!!

QeDI

19~!

f!il!!l~

f!gj!~

~X02

1112
13H2
13t2

U70X

'r-190
r-200
r-550

usn

nllox

o
o

ADDITIONAL
l!lQ!A!%l!l!

An unexpected level 1 and level 2 interrupt occurred after the scanners were reset and
enabled br turning off the ICSB disable latch'.
Register X'1,' contains the input data from lBlR (line address under test) when the
interrupt occurred. Register X'13' contains the contents of the scanner check register
(X'II2') when the interrupt occurred. Register X'16' contains the contents of the
scanner check register X'1I3' when the interrupt occurred. Register X'43' and X'_2'
should contain X'OOOO' unless another level 1 error condition has occurred.
IRROR CARD

17'_

QeI!I

~S!%IID!

rBALD
U!i!!9.t.

una
lA!Ul!ga,

OX03

13L2
13S2
13Q2
B2J2
B212
B2r2
12B2
12H2
121'2

TBflOX
'rI50X
nS2X
U50X
!raox
u_ax
nan
TP22X
na2X

r-550
r-560

ADDITIOIiAL
lIllQIUIUI!!.I!
'o.i.._, /'

,IT

,

An unexpected level 2 interrupt occurred after the scanners vere reset and enabled by
turning off the ICSB disable latch'.
Register X' 11'" contains the input,: data fr~. )'BU (11ne address under i·test) v,hen the
interrupt occurred.
X716

ICI Disable !est

!2l!UU R!~!l!fU!l.!l
This routine verifies that all ICW bits that should be set or reset vere, after disabling
(pover on resetl and enabling the type 3 scanner. An output X'43' vith bits 0.1, 1.5 and ,.6
is issued to enable the scanner.
Bach address is checked by using input and output instructions to read

X716

BRROR ClBD
SQ.!l1 LQSWQ.!

UltD
Ulil!!Q....

rlTII"
UliU!!...

OXOl

TP22X
TB40X
n10X

1-210

B2H2
13L2
3312

th~

lCls.

(

\../

ADDITIOllAL
UlQ!!IU!!!!!

ICW bit 0.1 is on after an input X'IIII'.
off by the disable.

fhis bit (service request) should have been set

Register X'11' contains the line address under test and Register X'15' contains the bit
in error.
IRROR CARD

PEAtD

PETK!!

Bl32
B2C2
B2J2
B212
12B2

!B70X
T1'60X
n50X
naox
Tran

P-270

ADDITIOIiAt

Qelll l!!SAIIOl! Uil!,Q .. Ulill!!:l:., lUQUUl,Q1!
1716

OX02

The PCP is verified vh an Input X'II5' to be set to XIO' after

7.0.10 X3705l1AA

t~e

scanner enable.

Type 3 Co •• unication Scanner IPT

(~.

o

o
o
o
o

IBII 3105 COII~UNICATIONS CONTROLLER
tYPE 3 COK~QNICATIONS SCANNER 1FT SYKPTOft INDEX

Begister X'11' contains the line address under test and Register X'15' contains
bits in error.

1116

BRROR CUD

1'EAtD

l'BT~1I

~RII

1.~~U~li.

U~llU..

UliElliQ.. ll!IQUAIU.!!

OX03

B2C2
B2112
B2'12
3382

TF60X
U31X
U41X
'n10X

F-270

o
o

[

ERROR CARD

PEALD

PET II II

OX04

'rE10X
TE20X
TE24X
TJ!34X

1'-270

ADDITIONAL

£.Q!!! &Q£UIQ!! R!li!!!Jl ... R&liEl!!Q... I!!IQU!IIQ!!
X716

B3E2
B31'2
B31'(2
B3D2

NOT I •••• It the High Speed Scanner Feature (230~RI 11 installed;
B3S2 (TB35X) 1s also a possible failing card.
The cycle steal valid bit (ICN 6.5) is cbecked via an Input X'48' to see that it was set
off bf the disable and enable operations.
Register X'11' contains the line address under test and Register X'15' contains the bits
in error.

,

ERROR CARD

PEAL 0

1'ETIII!

OX05

TI3liX
TB52X
Tl!54X
T1'aOI
T1'48X
U81X
TP46X
U82X

F-270

ADDITIONAL

£.Q!!! J:Q£A!1Q!! f!!i!.!tQ ... Ulil!1.!t2.:. I!!!Q!HlUIQ!!
X716

o
o

o
o

ADDITIONAl.

Register X'11' contains the line address under test and Register X'15' contains the bits
in error.

,

o

the

The ones counter and the display bit are checked via an Input X'41' and should have all
bits off, (ICII bits 4.2-4.4 and 4.6 and 4.7).. ICII bit 4.5 (last line state) should be
on.

o

o
o

D99-3705E-09

1302
B3(12
B382
B2B2
B21'2
B282
B2L2
B2P2

NOTB •••• If the High Speed Scanner 1'eature (230I'(B) is installed;
B3"2 ITE35Xl is also a possible failing card.
The cycle steal array address bits (ICi 12.0 ~ 12.3) and the PDF-1 array address bits
(ICW 12.4 - 12.7) are checked via an Input X'42' to see that they were set on by the
disable and enable operation.
Register X'11' contains the line address under test ann Begister X'15' contains the bits
in error.
1711

1'orce Level 1 Interrupt Brrors Test

This routine checks that a set function with level 1 request bit on (register X'43' bit 1.5)
turns on all error bits in input X'42' and X'43'. DBAR address and the inrut X'40' address
are compared.
2BBOB CABD

fEALD

1'ETII!!

ADDITIONAL

£QIHt I.QS;!Il2!! UiE!!Q.. Uli!!!2.:. !.!t!Q!!.!I!lIQ!
1711

OX01

B3L2
E3D2
B3B2
B3K2
l!3H2
B3S2
·l!3112

fBlIOX
n3U
TB70X
TE2qX
TE54X
'USOX
TEl2X

P-270
1'-200

Type 3 Commupication Scanner I1'T

X31051!AA 7.0 •• ,

{;

IBft 3105 COSKUNICATlONS CONTROLLER
TYPE 3 COMMUNlCATloNS SCANNER lFT SYKPTO!! INDEX
83Q2
82J2
82N2

099- 3105£-09

o

TE52X
USOX
TP22X

NOTE •••• If the High Speed Scanner Feature (230KB) is installed:
83M2 (TE3SX) is also a possible failing card.
.
All error bits in the input X'43' are tested to be set correctly.
Register X'11' contains the line address for the line under test. Register X'14'
contains the scanner checlt register bits via an input X'43" and register X'1S' contains
the bits in error.
EJlROR CARD
%117

nuo

FETII!!

TE70X
TBSOX

F-210
F-190

AODITIONU

~U

LQ!be line under test. ~tgister X'14'
,
contains tbe s~anner check register bits via an ~I\put X'421, and reg ster Xl lS' contains
tbe bits in error.

"- . .
ERROl CARD

Xl 11

nALD

ADDITIONAL

UTIlI!

£QR! I.2£AUQ!

Ulilill9.. U!i!!Q.. lUQUAUQ!

OX03

'rE70X
TBS411
T1!31X
TE30X
TE32X
TE40X
USO!

£3E2
E382
B3P2
l!3N2
£3112
Bn2
£352

F-260
1'-190

IC" Address Lines

NOTB •••• If the High Speed Scanner feature (230KB) is installed;
£3P2 bas been deleted.
The address in an input X'40' did not equal the address in an input X'42' byte 1, (this
is a binary representation of the address).
Register X'11' contains the line address of the scanner under test,

X111

ERROR CARD

LQ£AIIQ!

FEALD

PETS"

ADDITIONAL

£Qn~

fAli~!Q~

!!!iE!Q~

l'!!!QB~AIIQ!

OXOl!

E3Q2
l!3E2

TES2X
TEl0X

after the L1 requeet bit was reset, all error bits in input X'Q3'did not reset.
bits should have been reset with an output X'43' with bite 0.1 and 145 on.

Error

Register X'11' contains the line address of the scanner under test; register X'14'
contains the check register bits via an i~put X'43'; aegister X'15' contains the bits in
error.
ERROB CABO
X117

FEUD

£Q!!~

LQ£UIQ!! f!!i!!iQ ..

0.:05

E3L2
B3B2
B2H2

TE40X
TE10X
TP42X

FETtlS
U~E.!!Q

..

ADDITIONAL
ll!!Q!!~!UQl!

P-270
F-190

After the L1 request bit was reset, all error bits in input X'42' did not reset.
bits sbould have been reset via an output X'Q3' with bits 0.1 and 1.5 on.

Error

Register X'11' contains the line address of the scanner under test;
Register X'14' cORtains the check register bits via an input

X'4~';

lIegister X'lS' contains the bits in error,.

7.0.12 X370SIIU

Type 3 Communication Scanner IPT

o
o

o
o
o
o
o

o
o
o

IBK 3705 COKKOHICATIOMS CONTROLLEi
3 COftKOaICA~IO.s SCA.H~i If! SY"PTO~ IMPEX

D99-3705E-09

~TiE

EBBOB CABO

1717

sgD) L2£AtI2!

PEALD

PETKK

fAi!!2~

flil!2~

OX06

n70X

1'-270

113112

ADDITIONAL

1!12BAA%12!

A level 1 ~nterrupt should have occurred for the line under test, because an output
X'43' with bits 0.0 an4 1.5 vas issued.
Ignore this stop and use the abort routine function (PUNCTION 6) if the service aid to
aask L1 errors off is being used.
aegister X'11' contains the line address
ERBOR CARD

PEALD

sgR! k9SA1l2! EAi!!2L
1717

OX07

PETKK
fAi!!2~

expecte~

to cause the interrupt.

ADDITIONAL

lUf2B!Al12U

UE2
UR2

TE70X
n26X

P-190
1'-200

A level

interrupt occurred froa an unexpected line address.

Register X'11' contains the line address expecting the interrupt; register X'14'
contains the line address causing tbe interrupt.

X718

ICII Set and

ab51793
a~et

Tbis routine sets the diagnostic 80de bit via an output 1'43' with bit 0.6 on. Diagnostic
aode peraits tbe progral to use the ICI as if they vere storage. Starting vitb the first line
ad4ress and bit 0.0 ,of tbe ICW, all bits are set on using the applicable output instruction.
Input instructions are used to verify tbat each bit did set properly. Tbe operation is
repeatea until all ICI bits of all ICI ~ave been checked.
The diagnostic progral starts vith the first line address and sets all the ICII bits off to
,erify that the ICI bits turn off correctly.
ERBOB CARD

o
o
o

o
o
o

1718

PEAt 0

PETltK

ADDITIONAL

TB50X
'tU4X
TE521
n70X
TP201
U81X
TP221

P-210
P-280

Input 44
Output 44, ICII 0.4
Bncode for str
Input 42 or 43 bits
ICII 0.7
ICII 0.7
ICII 0.0-7

~1l1

L2gnQ! fli!U2", nliUQ", lUQlUIUlQl

OXOl

a3s2
E3D2
B302
B3E2
B2T2
E2B2
B2M2

BO'tE •••• If tbe 8igh Speed Scanner Peature (230KB) is installed:
13112 ('fE35X) is also a possible failing card,.
One or sore bits vere set in the ICII byte 0 bits 0 tbrough 7 via an output x'44'.
bits read via an Input 1'44' vere not equal to those set.

The

Hegister 1'19' contains the bits that were set via tbe output 1'4Q'. Register 1'18'
contaiQs the bits expected in the Input 1'44'. Register X'15' contains the bits in
error. Register X'11' contains the ICI line address under test.
ERRoa CliO
1718

PEltO

FET!!!!

IDDITIOlllt

U50X
TP501
U80X
TP421
U4U
'fP46X
'fP220
TP3U
'tP321
'lP3Q1

P-210
1'-290

Output 45
ICII 2.0, 2-Q
ICII 2.0
ICII 2.4,2.5
ICII 2.0
ICII 2.1-3
CCO Tiae
ICI 2.• 0
ICII 2.0
ICII 2.0-7

~!ll

la2Gln2! Ui!U!l", Uling,. 1ll!2B!lU191

0102

E3S2
B2J2
B2E2
E282
B2K2
E2L2
E2112
B202
1!2H2
£2U2

One or aore bits were set in tbe ICI byte 2 bits 0 through 7 via an output 1'45'.
bits read fi, an Input X'45' vere not equal to those set.

Type 3 Co •• unication Scanner IPT

The

137058AA 7,.0.13

tJ
IBft 3705 COKftUNICATIOHS CONTBOLLea
TYPS 3 COMMUNICATIONS SCAHNBB 1FT SYMPTOM INDEX

O!l9-37051!-09

Begister XI 19' contains the bits that were set via the output X'45'. aegister X'18'
contains the bits expected in the Input X'45'. Register X'15' contains the hits in
error. Register X'11' contains the ICM line addres~ under test.
ERROR CARD

£.Q~

X718

OX03

F1lAL~Il'

FETtlK

AODI':q:ONAL

TE50X
TE52X
Tp60X
Tp621
Tp50X
Tp48X
Tp40X
TP811
Tp42X
Tp44X
Tp461
'rP821
Tp341

1'-210
1'-300

.

\

'i(}
. J!
dr').

J,,Q£AU,Q!! EAlllll!,Q.. !'AlilHiQ.. !!!!Ql!!!!U,Q!!
l!3S2
B302
1!2C2
B202
B2J2
B2p2
B2G2
1!2B2
B2H2
B2K2
l!2L2
B2P2
B202

'0"

i"j

Output 116
Out Reg bus A~0-7
ICW 3.1
SOP 0-7
Output 46
aPCP bit 0
SOP field
Porce constant to ,sop
ICII 3.0-7
ICII 3.0-7
ICII 3.11,3,. '1
Output 46
force COllstant to SOP

,1--'1\
ily

One or more bits vere set in the ICW byte 3 bits 0 through 7 via an output X'46'.
bits read via an Input x'45' were not equal to those set.

The

lIegiBtet X'19' contains the hits that vere set v1ll the output X'46'. Regiltat' X'181
contains the bits expected in the lllput X'4S'. Register 1,,5' contain. the hits in
error. Register 1'1" contains the ICM line address under test.
BRROD CARD

1718

nUD

PETKI!

ADDITIONAL

~U

I.51~WlUi

UgUQ.. 2l.lillli21.

Ul2BUn2~

OXOII

B3S2
B2C2
B2B2
82V2
B282
821':2
B2L2

TE50X
Tp60X
Tp801
TP41X
TPII2X
Tp411X
TP46X

Output 46
ICM 4.0-,
ICII 4.0
SOP 8. 9
ICII 11.0,11.1
ICII 4.0.4.1
ICII 4.0,11.,

1'-210
1'-300

'..,

One or more bits vere set in the ICN byte II bits 0 through 1 via an output X'46'.
;ead via an Input X'II7' were not equal to those s e t . .
.

/

~he

b~ts

Register X'19' contains the bits that "ere set via the output X'1I6',. Register X'181
contains the bits expected in the Input X'1I7'. Register X'15' contains the hits in
error. Register I'11' contains the lew line address under test.

1718

ERROR CARD

pBALO

FBTK"

ADDITION~L

Q,gni I..Q£AI!2!

iA~!!,QL

iA~~!QL

!!l2R§A1IQ!

OXOS

TplI1X
TBSOX
Tf60X

82'12

l!3S2
l!2e2

One or more bits vere set in the lCW byte q bits 2 through 5 via an output X'47'.
bits read via an Input X'47' were not equal to those set.

~be

Register X'19' contains the bits that vere set via tbe output J'47'. Register X'18'
contains the bits expected in the Input X'47',. Register 1'15' contains the bits ill
error. Register 1'11' cofttains the ICW line address under test.
BIUIOIi CARD
£.Q1l1 !'.Q~AU.Q!!
X718

OX 01

B3R2
B3S2
B2C2
82112
B2V2

FEALO

FETII"

ADDITIONAL

1'-210
f-310

lCIi 5.1
Output 4'1
ICII 11.7. 5.0-3
ICII 5.0-3
ICII 11.0-7

Hlil!!,Q:. fA!Hi!!,Q .. !!!l,QI!!!AU,Q!
TE26X
'rESOX
TP60X
Tp31X
TP41X

One or more bits vere set in the lCW byte 4 bit 7 and byte 5 bits 0 through 3 via an
output X'1I1'. The bits read via an Input 1'47' were not equal to those set.
Register X'19' contains the bits that vere set via the output X'47'. Register X'18'
contains the bits expected in the Input 1'47'. Register X'15' contains the bits in
error. Register x,11' contains the ICa line address under test.

7.0.14 X3705HAA

Type 3 Communication Scanner IPT

(1

o

o

IBM l105 CONnUNICA~IONS CONTROLLER
TYPE 3 Co~"aNICATIONS SCANNER 1FT SYHPTOn INDEX

o

o

ERROB CABO
J.Q£UIlH!.

FEALD
f!!Ui!!Q ..

FUn!!

OX08

TP62X
'rP60X
TP50X
TPII8X
TP81X
TP80X
TPII2I
'rPJlI
T1'222
Tl'82X
'rPJ2X

F-210
F-JOO

~U

X118

o

o

ADDITIONAL
!!!fQlHIU!QI!
ICII
ICII
ICW
ICII

5.5
5.11-1
5.6
S.1i

NUl or %Par
ICII 5.4
ICII 5.11-1
ICW 5.11-7
'fest lIode
ICII 5.11
ICII 5.1

One or more bits vere set in the ICII byte 5 bits II through 1 via an output X'46'.
bits read via an Input X'47' vere not equal to those set.

The

Register X'19' contains the bits that vere set via the output X'46'. Register X'18'
contains the bits expected in the Input X'41'. Register X'15' contains the bits in
error. Register X'11' contains the ICW line address under test.

().

o

E2D2
D2C2
l!2J2
l!2P2
E2B2
D2E2
B2H2
112112
E2N2
l!2P2
E2R2

f~UQ..

099-3705B-09

ERROD CABO
X718

l'BUD

FETH!!

ADDITIONAL

k212A L2$;U12li EA!illiQ.. U!UilHl..

UfQUUlll1!

OX 09

ICII 6.5-6
Input 48
ICIl 6.5
lCIl 7.0-1
Write bytes 6, 7
Input lie
ICW 6.0-1
Set ICII 6.6 OLE ITB END

E3L2
E3G2
E3D2
E3J2
E3K2
E3S2
E3P2
E2f2

Tl!40X
n21X
n34X
TE22X
TE24l1:
TE50X
TE20X
'ff1l88

10-230
F-320

NO'fE •••• If the High Speed Scanner Feature (230KBI is installed:
E3112 !TE35XI is also a possible failing card.
One or more bits vere set in the ICII byte 6 bits 0 through 7 and byte 1 bits 0 through 7
via an output X'1I8'. The bits read via an Input X'IIS' were not e~ual to those set.

o
o
o

Register X' 19' contains the bits that were set via the output X'IIS'. Register X'1S'
contains the bits expected in the Input X'48 1 • ~egister XI15' contains the bits in
error. Register X'11' contains the ICW line address under test.

X718

FBlLD

FETII"

#Q~!I!Q!

l!~!!Q£

E!~!!Q..

OXOA

E3P2
E3G2

TE20X
TE21I

10-230
f-320

ADDITIONAL
UlQUUl'\H!

Qne or aore bits were set in the lCW byte 8 bits 0 through 1 and byte 9 bits 0 through 1
via an output X'49'. The bits read via an Input X'49' were not equal to those set.
Register X'19' contains the bits that were set via the output X'49'. Register X'18'
contains the bits expected in the Input X' 49',. Register X'lS' contains the bits in
error. Register Xll1' contains the lCW line address under test.

o

o

ERRoa ClaD
~n!

X118

eRROD CABO

PEALD

FETMN

ADDITIONAL

~n!

LQ~I!Q!

f!gJ!Q~

E!~!BQ£

l!fQB~!IIQ!

OXOB

E202
E2112

TP30X

1"-230

TP31X

10-320

One or more bits vere set in the ICW byte 10 bits 0 through 7 and byte 11 bits 0 through
1 via aq output X'4A', The bits read via an Input X'4A' were not equal to those set.

o

Register X'19' contains the bits that were set via the output X'4A'. Register X'18'
,contains the bits expected in the Input X'4A'. Register X'15~ contains the bits in
error. Register Xll1" contains the ICW line address under test.
ERROR CARD
LQqTIQ!

FEALD
!!!§.!!H!..

PETIIM
E!ll!!Q..

ADDITIONAL
lUQJ!.!!!I!Q!

OXOc

TESOX
TE311X
TEll OX
USOX
U80X

10-240
10-3110

ICV 12.0-1
Output liE, ICII 12.0-1
ICI! 12.0-7, 13.0-7
lCIl 13.3, 1.0
lCII 13.0-1

~n!

X118

E3S2
E302
E3L2
E2J2
E2E2

Type 3 Comlunication Scanner 1FT

X3105HAA 1.0.'5

il~'
,#

( "'"
'J
lpn 3705 COKKUNICATIOlS CONTROLLER
tlPB 3 COK~URICifIORS SCiMNER tFt S¥KfTOK INDEI
l!2r2
l!2B2
l!2R2
112G2
112H2
l!2P2
l!2Y2

ICW
ICII
ICII
ICII
ICII
ICII
ICII

TP481
uett
tr321
tr401
fP421
nSlI

n,.tt

D99-31051-09

12.0-1, 13.2-5
13.3
13.1-3
13.0-7
13.3
13.0
12.0-7

NOT II •••• If tbe Higb speed Scanner Feature C230lB) i. installed:
l!3a2 (TI351) i. also a possible failing card.
One or sore bits vere set in the ICII byte 12 bits 0 tbrough 7 and byte 13 bits 0 through
7 .ia an output 1'41'. Tbe bits read ,ia an Input X'qB' vere not equal to those set.
Register 1'19' contains tbe bits that were set via tbe output X'q£'. Register X'18'
contains the bits expected in the Input 1'4£'. Register X'15' contains the bit. in
error. Register X'11' contains the ICII line address under test.
l!BBOR CABD
X718

,nALD

Pl!T!lK

ADDITIONAL

U50X
trSOI
n201
flQaX
'rP221
tr211
'flS21
'fPl4X
TU2X
'U311X

r-240
r-350

Output qF
ICII 14.5
ICII 14-0-7
ICII 15,.6
ICII 14,.0-7
ICII 15.0-1
ICII 111. 1 set
ICII 14.',15.0-1
ICII 15.1
ICII 1q~ 2

~RI

LSmI!ll!, Uill!.9.. fASin2.&. lU!lUUl!l!1

OIOD

113S2
12B2
l!2T2
l!2F2
l!2M2
B2S2
l!21'2
B202
B2R2
B3D2

ItOTB •••• If tile 111gb Speed Scanner Feature (230118) 18 installed;
(TIl51) is also a possible failing card.

B3~2

One or sore bits vere set in the ICII byte " bits 0 tbrough 7 and byte 15 bits 0 through
7 via an output X'4P'. The bits read via an Input X'4P' vere not equal to tllose set.
Register X'19' contains the bits that vere set via the output X'4F'. Register X'18'
contains the bits expected in the Input 1'4p'. Register 1'15' contains the bits in
error. Register X'11' contains the IC, line address under test.
l!BBOR CABO

PBALD

FIITIIII

l!lS2
B302
B2B2
B2r2
B2S2
l!2B2
B282
B2P2
B2112

T1!50X
US21
nsol
TP4S1
'rP21X
na1X
n42X
n821
nl21

p-240
f-290

ADDITIONAL

&QDI l,!lS!!lQl!, UiI!!!!.. U!!UQ£, lUQUUlQ.I!
17,a

010l!

, ICII
ICII
ICII
ICII
ICII
ICII
ICII
ICII
JCII

16.0-7
16.2,3
16.4,5,7
16.4-'1
16.0-7
16.11-7
16.0,16.,
16.0-1
16.0-7

One or more bits vere set in the ICII byte 16 bits 0 through 7 Yia an output X'45'.
bits read via an Input X'q8' were not egual to tbose set.

The

Reqister X'19' contains tbe bits that vere set lia the output X'1I5'. aeqister X'18'
contains tbe bits expected in the Input, X'48'. Register X'15' contains the bits in
error. Register 1'11' contains the ICII line address under test.
ERBOR CUD

PEltD

PET II II

ADDITIONAL

f

&QU l,Q£AUQ! RW.I!Q£, 'u!!l!!!h. U!!lIUlAUQ!
1718

0121

E3S2
B3D2
11302
1I3B2
B2T2
11282
B2112

n50x
Tl!3qx
nS21
TB101
Tr201
nSl1
n221

r-210
r-280

\,

Input 1111
output 114, ICII 0.4
Bncode for str
Input 42 or ,,3 bits
ICII 0.7
ICII 0.7
ICII 0.0-7

NOTB •••• If the High Speed Scanner Feature (230118) is installed:
B3H2 (TBl51) is also a possible failing card.
One or more bits vere set in tbe ICII byte 0 bits 0 through 7 via an output X'44'.
bits read via an Input 1'4q' were not egual ~o those set.

7.0.16 x3705BAA

The

Type 3 Co.sunication Scanner IrT

o
o
o
o
o
o
o
o
c

lEft l7QS COMMUHICA~IOHS CONTROLLER
TYPE 3 COftftUNICATIOH5 SCANNER 1FT SyaPTOH IHDEX
Register X'19' contains the bits that vere set via the output X'44'. Register X'18'
cOllta1ns tbe bits expected in the Input X' 44'.. Register XI 1S' contains the bits til
e~ror.
aegiste, X'11' contains the ICI line addre.s under te.t.

1718

EBBOD CAIID

rEUD

~I!!

M!l£AIl2JI

iAlUllH! .. l!A1U1!1!..

lU2lU1aI12li

OX22

E352
B2J2
B2E2
E282
B2\\:2
B2L2
E2N2
E2Q2
E2R2
B202

rE50X
T1'501
T1'BO[
T1'421
TFII4X
Tl'461
T1'220
TF34X
TF321
T1.'301

Output 45
ICII 2.0, 2-4
rCIl 2.0
ICII 2.4,2.5
ICII 2.0
ICII 2.1-3
CCO Time
ICII 2.0
ICII 2.0
ICII 2.0-1
The

Register ['19' contains the bits that were set via the output X'1I5'. Register X'18'
contains the bits expected in the Input ['45'. Register X'15' contains the bits in
error. Register X'll' contains the ICII line address under test.
BRROR CARD
£gill l&!P array for each line address is checked that it can be set to all ones and reset to all
zeros. Also, alternate bits are set in the array to check that no interaction between bits
occurs. The array address are checked to see that they do not change because of input
instructions.

X120

ERROB CARD

FEALD

FET~~

ADDITIONAL

QQ~!

f!2~HQ£

fa2~!Q£

!!lQB~!I!9!

TFII8X
'fElliX
'U50'

F-110
F-2110

oxO 1 82F2
BlD2
8152

The array address is set to X'OOOO' and an output X'IIC' sets bits 0-10 in the
input X'IIE' verifies that the ~DF array address aid not change because of the
X'4C'. Register X'15' contains the bits in error and register X'13' contains
expectea PDF array address. Register X'11' contains the ICW line address and
X'18' contains the data set into the array.

fl

ERROR CARD
1720

FElLD

PEn II

&Q~nQH

f!2UQ ... !!!U!!Q.. lUQB.l!!U9!

OX02

E3S2
BlD2
83N2
E31'12
E2C2
82H2
82K2
E3L2
8JP2
82E2
82R2

TE50X
TEJIIX
TE30X
TE32X
TF60I
Tl'II2X
TFIIIIX
TE40I
TE31X
T1'80X
TF32X

u

array. An
output
the
register

ADDITIONAL

~~E

o

F-2110

NOTE •••• If the High Speed Scanner Feature (230KB) is installed:
E3P2 has been deleted.
The POI' arrays are set with data and read to verify that the data set correctly.
input data fro. the array using an input 1'4C' did not agree with the data set.

The

Register X'11' contains the ICW line address. Register X'15' contains the bits in error
and register x'~a' contains the expected data.
ERROR CABO

l'EALD

FETII~

83112
E3P2
83112
83D2
82C2
821'2

TE30X
TE31X
TE32I
TE34I
TF60!
TF48X

F-210

ADDITIOIIAL

QQllE &9£!!!Ql1 UliUQ .. U2.!B!Q:. !!!fQUUIQ!
X720

OX03

NOTE •••• If the High Speed Scanner Feature (230KB)
E3P2 has been deleted.

o
o

o
o

&Q~I!QH

NOTE •••• If the High Speed Scanner Peature 1230K~ is installed:
BlM2 (TElSX) is also a possible failing card.

1 0
'0

o
o
o

1>99-3105B-09

INDEX

~s

installed:

After data was set into the array, the data is read to verify that the data set
correctly. The data is read via an input X'44' i tile data read did not agree with the
data set.
Register X'11' contains the lew line address and register X'13' contains the expected
PDF array data. Register X' 15' contains the bits in error.
ERROll CARD
1120

fEALD

FET~II

ADDITIONAL

~IlE

&Q£!!!Q!! U211!!Q .. fP&El1Q .. HfQ.!lllUH1!

OX04

E3N2
B3P2
83112
E3D2
82c2
B21'2

TE30X
TE31X
TE32X
TE34!
TF60X
T1'4SI

1'-330

NOTE •••• If the High Speed Scanner Feature (230KB) is installed:
E3P2 has been deleted.

.Type 3 Communication Scanner 1FT

X3705HAA 7.• 0.67

IBK 3705 COKnUHlcATIOHS COHTROLLER
ornE 3 COKKUHIClTIOHS SClHUR In SYIIl'TOII IIIDBX

099-3105£-09

After reading the data fro. the l'DP array via an input X'qq' and input X'4C', the array
address is checked to verify that it did not change.
Register X'11' contains the ICY line address and register X'13' contains the expected
array address. Register X'1S' contains the address bits in error.
X722

Array Addressing Test

This routine sets the diagnostic aode bit (see routine 18 for description).
Data is set into the array using the cycle steal address pointer (ICW bits 12.0-12.31 along
with an output X'4D'. The data is X'11' for address " X'22' for address 2, etc. Address 0
has data of X'88'. The l'DP address pointer (ICW bits 12.4-12.71 is used with an input X'44'
to read the data out of the array.
ERBOR CnD
1722

PEltO

PEUK

ADDITIOUL

~!I

LQkAUQl! iAilll!Q:, lA!i.ll!!!h. ll!lQUAlUll!

0101

E3S2
E3D2
E3"'2
El82
ElK2
E3Q2
B3L2
E282
E2P2

U501
TE34X

P-330

Tun

TElOI
TU21
U521
UIIOI
'£F22X
TP82X

nOTE •••• If the High Speed Scanner Peature (230KBI ia installed:
ElP2 bas been deleted.
The data read fro. the array using the PDP address did not agree with the data set into
the array.
Register 1'15' contains the bits in error and register X'18' contains in byte 1 the
expected data. Byte 0 of register X'18' contains the PDP address used.
ERBOa CARD
X722

PEltO

PET" II

TE341
TE401
TE50X
TE32X

P-330

ADDITIOI'Al

~!21

LQ!

~

E3K2
l!3E2
l!3J2
l!3D2
l!3L2
ElQ2

PElLD

FETIIII

iA!i!!!'Q~

lAgEHQ~

TE211X
'U70x
TE221
Tl!341
TEIiOr
'U52X

P-360

II

NOTE .... If the High speed Scanner Feature (230KB) is installed:
E3M2 (TE3511 is also a possible failing card.
The data fetched into ICW PDP array on a cycle steal function, doe. not equal expected
data. Register X'14' contains the byte nUlber in error. Register X'4C' contains actual
byte in error. Register 1'15' contains bits in error. Expected data·
55667788991ABBCC.

o
o
o
o

NOTE •••• If 8igh Speed Scanner Feature (230.4KBPS) is installed, the expected data
pattern is 5566118899AABBCCDDEEFFt021324354.
EBIlOD CARD
£Q!lll 1.2£AIl2!!
17411

OX07

l!2B2
l!2R2
B2K2
B2J2

FEUD
U!il!!!2.:.

PET II I!
f!!i!!iQ.:.

na1X

P-580
'-590

TP32X
TF4/IX
U501

The PCF/EPCF should be 5/0 with sequence bit t3.0 undefined.
PCF/EPCF to 7/11~

The program set the

Register 1'15' contains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0.4-0.7), sequence
bit (bit 1.0).
ERBOB CARD
17114

FEALD

PET III!

£Qn~

liQ!'cAUQI!

fAgJ!!.g~

U!iE.l!Q.:.

0101'1

!!2D2
B2C2
E3112
l!3E2
ElH2
l!lJ2
l!3C2
EJD2

rF62X
TF60X
TE2fIX
'lE70X
TE54X
'lE22X
'lE71X
'lE34X

P-360
P-560

NOTE •••• If the lIigh Speed Scanner Feature (230KB) is installed:
(TE35X) is also a possible failing card.

E3~2

Type 3 COllmunication Scanner IFT

X3705HAA 7.0.83

c
099-370511-09

IDK 37115 CO""UNlcA'l'lONS CONTltoLLllR

fYPE 3 COKKUNICATIONS SCANNER 1fT SYdPTO" INUEX

(.

No 1.2 interrupt occurred. A 1.2 interrupt should bave occllrred withln 2UO/HSEC,
following a cycle Steal store function of B test Bytos of Data (or 16 byt&s for IIi-Speed
Scanner). The 1.2 interrupt should occur because tbe Byte Count. 0 and cycle Steal
valid (input ~B Byte 0 Bit 5) are reset.

XH~

ERROR CARD

FEAt 0

£9R11

lJlS!ngl!

U!illU,9L

Ulll!IH1L

OX08

82E2
82P2
831.2

TP80X
TpqeX

p-5S0
P-560

FET""

TB~OX

A 1.2 interrupt was expected frail the receive line. The interrupt was from the wronq
line. Register X'14' contains the address of the lino t.hat interrupted. Register X'll'
contains the address of the line the interrupt vas expected froll.
ERROB CABO
I74~

FETIII!

PEAL 0

s;Q!l!

LQS!l!g!!.

U\Ui!!.Q... f!gl!!Q...

oxoe

l!3K2
E3J2
8302
l!2D2
82H2

TE241
T1!22X
fl!34X
TP62X
TPII2X

F-~50
(

"-

NO'll! •••• If the High Speed Scanner Feature (230KB) is installed:
83M2 (TE35X) is also a possible failing card.

/

,
\ .... - .'

The data cycle stolen into the main storage on a cycle steal store function, does not
equal the expected data. Register X'l~1 contains the address + 1 of tbe byte expected.
Register X'16' contains address +1 of byte in error. Register X'15' contains bits in
error. Expected data = 5566778899AABBCC.
NOTE •••• If High Speed Scanner Feature (230.4KBPS) is installed,
pattern is 5S66778B99AABBCCDDEEPF102132~35~.
X7Q5

t~e

expected data

Cycle Steal from and~ to main Storage on 'Odd Byte Boundary -- Odd Byte Count
LCD=C EBCDIC Not EP BSC

This routine verifies that cycle steal hardware moves data correctly from aain storage into
ICW PDP array_ After cycle stealing data frail storage, the routine moves data from ICW PDP
array into main storage (7 bytes), and (15 bytes for High Speed Scanner). Cycle steal test
data --- X'S5' - X'5B' (SC - 63 for High Speed Scanner) Diag 0=1 for both lines.
ERROB CARD
X7QS

PElLD

FETIII!

s;Q~~

LQ!:!UQ!!' U!iJ!!g... Ug!!!g..

0101

E3P2
B3R2
E2J2
E2D2

TE20X
TE26X
TPSOX
TF62X

,c

P-220
F-S50

"(

A set mode interrupt failed on the transmit line (address in Register X'll').
Register X'lS' to determine the cause of tbe error.
Register X'15'
0001
0002
0003
EBROR CARD
X7Q5

Display

Description

PElLD

s;Q~~

I.Q!:!:nQ!{

~!'il!!Q ...

OX02

E3F2
E2D2
1!2J2
E3R2

TE20X
TP62X
TFSOX
TE26X

\..
(

No set mode 1.2 occurred.
Interrupt froll wrong line - register X'14'
not equal to register X'11'.
peed back check error.

\

;7

\

FEUII
fAgl!!!g ..

r

F-220
F-5S0

\.

A set lode interrupt failed on the receive line (address in Register X'11').
Regieter X'15' to determino the cause of the error.
Register X'lS'

,,c

l

Display

:(

\l

Description

(
7.0.811 X370SHU

Type 3 Communication Scanner IFT

(
(~'
"

()

o
()

o
o

o

leH 3705 CO~~UNICATIONS CONTROLLER
TYPE 3 COH~UHlcATIONS SCANNBP 1FT SYHPTOH INDEX
0001
0002
0003
ERROR CARD

nqs

FET!!!!

OX03

E2c2
8282
E2J2
B2R2

TF60X
T1'81X

F-580
1'-600

TFSOX

TP32X
Refer to 8SC Transmit

Begister X ' 15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.q-0.7), sequence

bit (bit 1.0).

ERROR CABO

FEUD

FET!!!!

~!lll

!.Q£AUQI! UQ!.!iQ ..

~A~II!iQ ..

OX04

B3H2
E2E2
E2P2
E3L2

1'-550
F-560

TE54X
T1'80X
nqax
TE40X

No L2 interrupt occurred. A L2 interrupt should have occurred following a cycle steal
transfer of 7 bytes of data from main storage to an lCIi PDF array.
(fetch). The
interrupt should have occurred from byte count ~ 0 and cycle steal valid reset (input
Q4. Byte O. Bit 5)
ERROR CARD
X7Q5

PEAtD

~!lll

I.Q£A!IQI!

~A!n;!iQ

0105

E2E2
E2P2
E3L2

T1'80X
TF48X
TEQOX

FET!!!!

.. f!!H!.!iQ..
1'-550
1'-560

A L2 interrupt vas expected from the transmit line. The interrupt was from the wrong
line. Register X' 14' contains the address of the line that interrupted. Register X'II'
contains the address of the line the interrupt vas expected from.

o

ERROR CARD
1745

FEALD

FET!!n

£QJ!II

I.Q£AUQI! R!!i]!iQ ..

UlH;~Q..

OX06

E3J2
E3K2
E2c2
E2E2
E2P2
E2H2

F-360

o
o
o

PEUD

!'Q£U!QIi U!i]liQ ... U!HI.!iQ..

The PCF/EPCF sbould be 9/0 with sequence bit 13.0 undefined.
state transition 1.

o
o
o

[

No set mode L2 occurred.
Interrupt from wrong line - register X' lq'
not equal to register X'11'.
Feedback check error.

~!lll

o

1l99-3705E-09

TE22X
TE24X
TF60X
T1'80X
TpQaI
TPQ2X

The Data Petched into the ICW PDF Array on a cycle Steal Petch function. does not equal
the expected data. Register X'14' contains the Byte number in error. Register X'4C'
contains actual byte in Error. Register X'15' contains Bits in Error. Expected Data =
55. 56,57, 58, 59. 5A, 5B (also 5C - 63 for Hi-Speed Scanner).
ERROR CilRD
X745

fEUD

FET!!!!

~!lg

!'Q~!!IQ.!i

U!l].!iQ"

~AQII.!!Q

OX 07

E2K2
E2R2
E2B2
E2J2

T1'4U
Tl'32X
TP8tX
TP50X

1'-580
1'-590

..

The PCF/EPCF should be 7/4 with sequence bit 13.0 undefined.
to 7/Q.

The program set the

~CF/EPCF

e

Register X'15' contains tho incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4-0.7), soquonce
bit (bit 1.0).
ERROR CARD
!l!Hl~

LQl;.6UQIi

Type 3 Communication Scanner 1FT

X370511AA 7.0.85

IBII 3705 COUUHICATlONS CONTROLLER
TYPS l COIIIIUNICATIONS SCANMER 1FT SYIIPTOII INPEI
X7115

OIOA

113J2
113K2
112112
112P2
I13L2

'rE22X
T112'"
Tr801
TP"81
'rE401

P99-3105E-09

P-550
P-560

80 L2 interrupt occurred. A L2 interrupt sbould have occurred wit bin 280/IISEC following
a Cycle Steal store function of 7 test data bytes. The L2 interrupt sbould have
occurred from Byte Count Q 0 and Cycle Steal valid reset (input 411, Byte 0, Bit 5) •
IIBROD ClBP

PIIALD

PUIIII

OIOB

TP801
TFII81
'lE1i01

P-550
F-560

mDI !'QS!I!!1! fA!!!!!!l .. U!!!!!!.:.
1745

11282
82P2
83L2

A L2 interrupt was expected from tbe receive line. The interrupt was from the wrong
line. Register 1'14' contains the address of tbe line that interrupted. Register 1'11'
contains the ~d4ress \of tbe line th? in~e,rrup~ was ezpected from.
I" - ,

8BDOR CARD

X7115

saDI

~!OWS!!

OXOC

83K2
B2C2
B282
B2P2
B282

PEUD
U!i!!2..

fA!!!!!!!.:.

'U211X

P-1I50

TP60X
U80'
'fF1I81
Tr421

PETIII!

Tbe data cycle stolen into the main storage on a cycle steal store function does not
equal the ezpected data. Be9ister X'111' contains Byte Humber in Error. Register X'16'
contains Addr +1 at Byte in error. Register X'15' contains Bits in Brror. Bzpected
Data· 55, 56,57, 58, 59, SA, 5B lalso 5C - 63 tor Hi-Speed scanner).
X746

SDLC Transmit Test •

LCD"1

EP

This routine test state transitions and acsociated functions for SOP shifting, PAD insertion,
Plag insertion, PDP to SOP shifting, BCC insertions, and line turn around. Tbe line is
functioning in SDLC Non-NDZI mode witb tbe PAD before Line Turn (ICW bit 15.6) bit on, DTS
Turn control (ICW bit 13.2) bit off, and Line Turn after transmission (ICW bit 15.7) bit on.
Diag 0=1 for tbe transmit line. Receive not used. cycle steal is used.
IIDDOD CARD

17"6

saD!

PEUD

PETIII!

I.Q~AUQ!!

U!!!l!9..

fA!i!!i!1..

OX01

113P2
B382
E2J2
B2D2

TE20X
'lE26X
'lF50X
TF62X

P-220
P-550

A set mode interrupt failed on the transmit line (address in Degister X'11'1.
Register X'15' to determine the cause oe the error.
Reg X'15'
0001
0002
0003

X7116

Display

Description

No set mode L2 occurred.
Interrupt fro. wroDg line - Reg X'1Q'
not equal to Reg X'11'.
Peedback check error.

ERROD CARD
~.!!!

1Q~!I!Q!

PEUD

fA!!!!iQ ..

fA!!!l!Q~

0102

E2C2
B2B2
B2J2
82112
B2K2

'fF60X
TP8U
TF50X
TF32X
TP411l

P-580
P-600

t
~.J

FET"II

The PCP/EPCP should be 9/0 with sequence bit 13.0 undefined.
state transition 21.

Defer to SDLC Transmit

lIegister X'1S' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.11-0.7). sequence
bit (bit 1.01.

7.0.86 X3705HAA

Type 3 Communication Scanner IPT

o
o
o
o
o
o
o

o
o

I6H 3105 COKHUNICATIONS CONTROLLER
TY~E 3 COH"UN1CATIONS SCANNER 1fT SY~~TO" INDEX
ERROR CARD

FETIIII

!'Q~!UQi!

fAg!i!Q... f!!Ul!l2:.

OX03

E282
B2C2
B282
B3J2

U8lX
TF601
TF42X
'lE22X

1'-440

The transmit line SOP should contain 1'0155',
X' 15'. (bits 0.6-1.11.
ERROR CARD
x746

FEALD

FET!!!!

~!!tl

!'Q£AIIQl! Uli!!Q.. Uli!l!Q ..

OXOII

E3F2
11282
B2C2
B282
B3J2

TE201
T1'B1X
T1'GOX
TF42X
TE221

The incorrect SOP data 1s contained in

1'-4110

The SOp is not shifting properly. The Sop is monitore4 for II X'0043' (~AD shifted one
bitl tor approxintely 1 mSGe. Register X'1S', (bits O.~-'.71 contains the SDp value at
time out.
BRROR CARD

FEUD

FETIIII

£Q!!tl !'Q9IIQl! f!!!UQ.:. f!li!!!Q ..
17116

[
o

FEALD

~!!§

099- 3705E-09

OX05

E282
E2J2
B2C2
B2l'2
B2R2
B2K2

T1'BlX
T1'50X
TF60X
TnSI
Tl'32X
Tl'441

1'-580
1'-600

The ~C1'/8PCF should be 9/2 with sequence bit 13.0 undefined.
state transition 1.
Register X'lS' contains the incorrect
bit (bit 1.01 '"
ERROR CARD
0116

FEAt 0

(bits 0.0-0.3), EpCP (bits 0.4-0.71, sequence

PET!!!!

~!!!

!.Q£!IIill! U!z!!Q .. Uli!!!2.:.

OX06

E282
E202
l!21'2
E2E2
E2K2

Tl'8lX
TP311X
T1'481
TpBOX
Tp44X

~Cl'

1'-440

The Transmit line SOP should contain X'017E',.
1'15'. (bits 0.6-1.7).
EIiROR CARD
][746

FEAt 0

l'ETII!!

TE54X
TF811
U50X
TF44X

1'-580
1'-590

~lltl

!'Q£illQ!! H!z!!Q,. fAll!!!Q ..

Ox 07

8382
82B2
E2J2
E2K2

The incorrect SOl' data is cOlltained in

The PCl'/EPC1' should be 9/4 with sequence bit 13.0 undefined.
state transition lS.

o
o
e

Register 1'15' contains the incorrect
bit (bit 1.01.
EBROR CABO
X746

pEAtD

pcr

Refer to SDLC Transmit

(bits 0.0-0.3), EPCl' (bits 0.q-0.7),

sequ~nce

PET!!!!

~ll!l

!'Q£!UQ!! f!!i!!!Q .. fAlltl!!.2 ..

OX08

E3R2
E3S2
B2D2
E2C2
B2E2
E282
E2V2

TE26X
TESOX
Tl'62X
TP60I
nBOI
TPII2I
Tl'lIlX

Refer to SDLC Transmit

1'-220

Type 3 Communication Scanner 1FT

X370S8AA 7.0.87

(l
J8K 3105 COK"O"laA~IONS COHTRO~LBR
TYPB 3 COKftOBXCATIOHS SCAHNEB 1fT STKPTOK IHDBt

D99-310SB-09

()

The display register vas checked for IftIT and RTS to be on in Data Out 1-7, and NEW SYNC
and SEND DATA to be off.
Register 1'15' contains bits in error (D.3-XftIT, D.II-HEW SINC, D.S-RTS and D.6-SE8D
DATA). Register X'll' is the line under test.

X1116

BaROR CARD

FEUD

mill loQ£AUQI

E!~Q£

0lD9

U81X
TPIl8X
TP60X
TPII2X
TE22X
'U341

B2B2
82P2
82C2
82H2
83J2
8302

FETII"
f!li!!!!k
f-III1G

HaTE •••• If the High Speed Scanner Feature (230KB) is installed:
E3H2 (TE3SI) is also a possible failing card.
The Transait line SDF should contain 1'0101'..
X'lS', (hits 0.6-1.1).

The incorrect SDP data is contained in
.f,\
I

ERROR CARD
IJ!£AUQ'!!

PEUD
fA!!!,!!!;!:.

FETU
fA!!U!k

DXDA

TF821
'US2X
TE26X
TPII2I

F-2110

~!ll

11116

E2P2
8302
B3B2
B2H2

'

..

ICW bit 16.0 should be off. ICW bit 16.0 should only be set if the PCF is I'B': this
routine runs vith PCF egual to X'9'. Refer to SDLC Transmit state transition 15.
ERROR CABD

nll6

!;QDI

I.Q~A.u!H!

FEUD
filinQ ..

UTilI!
U!i.lU!!k

OX08

E2B2
E2L2
82112
E2P2
E202
E3D2

U8n
TFII61
TF31X
TP821
TP301
TE3111

F-III10
F-230

HOTE •••• If the Higb Speed Scanner Feature (230KB) is installed:
E3N2 (TE3SX) is also a possible failing card.
The BCC (input X'IIA') should have been reset and accumulation made on the first
character. The expected value of the BCC vas X'E1Pl'. Reset and/or BCC accumulation
could be at fault. Begister X'lS' contains the bits in error. Register X'11' is the
line under test.
EB BO B CARD
X1116

l'EAtD

FETIII!

~QI

J.Q!;UIQlt U!l1O!!Q.. USilillQ..

OX 11

E2B2
12C2
12H2
E3J2
E3D2

n8l1
TP60X
TFII21
TE22x
TE311X

F-III10

NOTE •••• If tbe High Speed Scanner Feature (23DKB) i8 installed:
13M2 (TI3SXI 11 allo a possible failin9 card.
The transmit line SDF should contain X'0103'.
X'15 ' • (bi ts 0 .• 6- 1 .7) •
EsaOB CUD
£gIll! J,QWIQ.!!
X7116

OX12

12B2
12E2
12112
B2P2
1302
12K2
12J2
1202

7.0.88 X370SHU

lEUD

The incorrect SDr data is contained in

FETIII!

iAlil!l!tQ.. Uli.l!!!Q£
TP81X
TF80X
TF32X
'rFIIBX
TElII'
TFII4X
TP50l[
TF311X

F-580
F-S90
F-510

(
Type 3 Co••unication Scanner 1FT

;/

o
o
o
o
o
o
o
o
o
o

IBM 3105 COMMUNICATIONS CONTBOLLEB
TYPI 3 conMUNICATIONS SCANNI. 1FT SyaPTOn INDEX

D99-3105E-09

NOTE •••• If the High Speed Scanner Feature (230K81 is installed:
E312 (TE351) is also a possible failing car~.
The PCP/EPCP should be 9/6 with sequence bit 13.0 on.
transition 11.

Befer to SDLC Trans.it state

Begister X'15' contains the incorrect PCF (bits 0.0-0.31, EPCF (bits 0._-0.7), sequence
bit (bit 1.0).
EBBOB CABO

FEUD

FETall

k2!21 1o!!IOAU2!! 1A1i1!!!!.. iA§J!l2£
17_6

0113

~E2L2

B282
12C2
I2H2
!lol2
E2P2
1302

Tn61
usn
T1601

F-UO

'fP~21

n221

orrBlI
'U3U

BOTB ••• * If the High Speed Scanner Feature (230K81 is installed:
B382 (TB351) is also a possible failing card.
~he Trans.it line SOP should contain
1'15', (bits 0.6-1.1).

EBBOB CABO

FEUD

!OQU L!!gn2J! UW!!..
X1116

0114

B2E2
B2B2
B2ol2
1f2B2
E2K2

UBOX
TFBlI
U50X
n32X
.,lF44 I

l'010~'.

The incorrect SOP data is contained in

nUK
.f!Ii!!~

P-580
P-590
P-510

I

The PCP/EPCP should be 9/6 with sequence bit 13.0 off.
transition 16.

,',

[

1,:

Begister X'15' contains the incorrect PCF (bits 0.0-0.3), EPCP (bits 0._-0.7), sequence
bit (bit 1.01.

';

o
o
o
o
o
o
o

Be fer to SDLC Trans.it state

EBBOB CABO
X746

FEUD

FETKII

102U

lo!!~Wg!

UIiU!!.. US)!!!..

aXIs

E2L2
B2B2
B2C2
E2112
E3J2
E2P2
E3D2

n4U
n8n
n60X
n42X
'U22X
n821
TE341

F-_40

NOTE *.*. If the High Speed Scanner Feature (230K8) 1s installed:
B3N2 (TE351) is also a possible failing card.
The trans.it line SDP should contain 1'0124'.
X'15', (bits 0.6-1.1).
EBBOB CABO

FEUD

FETIIII

OX 16

TF34X
Tl'BlI
n441
Tl'32X
TF501
n82X

F-580
F-590

Tbe incorrect SOP data is contained in

!OQ!2! LQ!OU!!l! UIi!!!!!.. RAUBQ..
1746

E2Q2
B2B2
E2K2
E282
E2J2
E2P2

The PCP/EPCF should be 9/5 with seguence bit 13.0 undefined.
state transition 22.

Refer to SDLC Transmit

Begister X'1S' contains the incorrect PCP (bits 0.0-0.31, EPCF (bits 0.4-0.7), sequence
bit (bit 1.0).
EBROB CABO

FEAtD

FETRII

QQDB

i!IiJ!!!~

fag!BQ ..

!Q~!IIQ!

Type 3 Co •• unication Scanner IFT

X3705HU

7.0.8~

I~K 370S COMMUNICATIONS CONTBOLLED
TYPE 3 COMMUNICATIONS SCANNER 1FT SYMPTOM INDEX

X7~6

OX 17

l!2B2
B2C2
112U2
B3J2

TFS1X
U60X
UQ2X
'rE22X

PEAt 0

l
"( . J

F-~40

The Transmit line SOP should contain X'017E'.
X'15', (bits 0.6-1.7).
ERROR CARD

099-370SE-09

Tbe incol:roct SOP data 18 contained in

FETIIII

£SIIlE Io!l9UQ!! U!lU!l.. fA!lll!l.Q..
X7~6

OX 1S

E2E2
E2B2
l!2J2
112112
E2K2

USOX
US1X
Tl'SOX
TF321
TP4QX

F-SSO
P-S90
P-S70

The PCF/EPCF shou14 be 9/7 with sequence bit 13.0 off.
transition 9.

X1116

OX19

B2B2
E2C2
E2Q2
112P2

FEALO

FETIIII

US1X
Tl'60X
TP34X
TFS2X

F-440

y

0.~-0.1),

sequence

U!ll!!H!a. UgE!!Q..

Tbe transmit line SOP sbould contain X'OlPF'.
X'1S', (bits 0.6-1.7\.
ERROR CARD

'~,

Refel: to SOLC Transmit stnte

Registel: X'lS' contains the incorrect PCP (bits 0.0-0.31, EPCP (bits
bit (bit 1.0).
ElUIOR CUD
Q2Dl\ !'Q~U!Ql!

/(

't

PEALO

Tbe incorrect SOP data is contained in

FET II II

£SI1ll L!l9UQl! UglU!l2.. Eagll!Hh.
1746

0120

B2J2
B282
B2K2
112C2
112H2
112B2
B2B2

TPSOX
TPS1X
U44X
TF60X
TP42X
USOX
TF32X

P-S60
F-600

PCF/EPCP shoula be 5/0 with sequence bit 13.0 unaefinea.
state transition 17.

The

Befer to SOLC Transmit

Register X'lS' contains the incol:l:ect PCP (bits 0.0-0.3). EPCP (bits 0.4-0.7), sequence
bit (bit 1.0).
ERRoa CUD
1746

PEALO

FETMI!

~QIlE

J.Q~!n2li

UlU,!!Q .. fAgE!!Q..

0121

B202
E2C2
112B2
B2H2

TF62X
TF60X
TFaOX
TF42X

F-220

The display I:egistel: was checked for RTS off in Data Out 1-7.
EaROR CARD
x746

FEAtD

FETIIM

TF60X

F-550

£SIIlE

1&~AI!Q!!

fAgll!!Q .. fA!l,f;!!Q ...

OX22

B2E2
B21'2
B3L2

TEllO X

TP~6X

A L2 interrupt was expected from the transmit line.

Refer to SOLC tl:ansmit state 17.
Bither, the in\el:rupt did not occur (Register X'14' equal zero), or the intel:tupt was
1
from tbe Hong'line (Register X'1 1' not equal Ilegister
11 ).

X"

ERROR CAaD

PEALO

FETIIM

~Il~

E!Q]!!Q~

f!g,f;HQ~

~Q~AIIQ~

(
7. O. 90 13705 HAl

Type 3 Communication Scanner 1FT

(
II

"'.
,

'

.P

,',~"_J,

,(.
t,

o

o
o

o

IB! 3705 COKftONICATIOHS CONTROLLBR
3 COaBUBICATIOHS 9CABHIR 1FT SyftPrOft IMDEX

X146

0123

o
o

o
o
o

o
o
o

U22X
Trsox
TP4SX
TB34X
'fF3U
TF82X

F-160
F-210
F-240

The status Rosted in the transmit line ICW vas expected to be X'0403'.
The status bits in error are in Register X'15'.
lIeg X'lS'
Bits
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1.0-1.1

o

rlJ

1I2N2
1I2E2
1I2F2
1I3D2
1I2Q2
1I2P2

NOTB •••• If the High Speed Scanner Feature (2301S) is installed:
11312 (TB3SX) is also a possible failing card.

o
o
o

p99- 310SE- 09

~rpB

IRBOR CUD

1146

Description

ICI
Sits

Abort Detect
roraat Exception
Char over/Under run
Data Check
BSC bad PiD flag
BOB
Leading OLE Brror
Length Check
ICI byte 15

!;;Unl J.Q£!lIQl!

U!i!lU!... EAU!!Q..

PElLD

PBTU

0124

TF41X

F-210

112'2
1I2C2
B2P2

TP601
US21

0.0
14.1
0.2
14.3
1/1.11
0.5
14.6
14.7
15.0~7

ICI bit 4.5 should have been set on.
ERROR ClBO

FElLD

OX25

U221
TrSOI

Befer to SOLC transmit state 17.

~ETBft

!C2!!1 r..2g.nQl! EA!i!l!Q.. EA!i!!Q..
17116

B2N2
1212

Input X'4E' was used to check the message count (ICN bits 13.6-13.1) for reset.
Begister X'15' bits 1.5 and 1.6 indicate the bits in error. Befer to SOLC Transmit
state transition 17.
ERROR CABO
X146

PEUO

FETR!

~1Hl

r.Q9UQ! i!!i!l!Q.. lli.ID!Q..

OX 26

1I2C2
E2B2
E2B2
1I3L2
B21'2

!F60X

F-210

!1'22X

!FSU
TE40X
TF4al

Input 1'41' was used to check the ones counter (ICN bits 4.2-4.4. 4.7. and 5_0) for
reset. Register X'15' bits 0.2-0.4. 0.7. and 1.0 contain the bits in error. Befer to
SDLC Transmit state transition 17.
1747

SOLC Transmit Test • 2

LCO=l

liP

].QgI!!~ !!!~£gIf!!Q!

Tbis routine tests state transitions and associated functions with the line in SOLC HB~I mode.
and with the PAD Before Line Turn (ICW bit 15.6) bit off. Line Turn after transmit (ICW bit
15.7) bit on, RTS Turn Control (leW bit 13.2) bit on. and 11IN SIH (PCl' Q 1 and B). Diag 0=1
for Transmit line. Receive not used. Cycle steal is used.
EBBOB CABO
X747

PElLO

FEU II

~I!I

J.!!S!I!Ql! i!!i!!Q\L EAliUQ..

0101

1I3P2
1!:3R2
B2J2
B2D2

TE20X
'lB26X
U50X
TF621

F-220

P-550

Type 3 Communication Scanner 1FT

X310SUAA 1.0.91

( )\

..

,

IBM 3105 COK"UNIC~TIONS CONTROLLER
TiPE 3 COMHON~CATIONS SCANNeR 1FT SYMPTOM INDEX

D99-1705E-09

A set mode interrupt failed on the transmit line (address in Register X"l').
Register X'15' to determine the cause of the error.
!eg X'15'
0001
0002

Display

f

Description

"()Ii

No set 1110110 1.2 occurred.
Interrupt frolll wrong line - Reg X'll1'
not equal to Reg X'11'.
Feedback check error.

0003
ERROR CASD

PEAtD

FETH"

'U60X '
TF811
TE211X
TF32t
TFIi4X

r-580
1'-600

£QQ§ !'Q£U!Q!! UJH;j!!Q ... £!!i]l!Q...
X7q7

OX02

1l2C2
B2B2
E3K2
82R2
E2K2

The PCF/EPCF should be B/O with sequence bit 13.0 undefined.
state transition 2Q.

Refer to SDLC Transmit

Register X'15' contains the incorrect PCI' (bits 0.0-0.3), EPcr (bits 0.11-0.7), sequence
bit (bit 1.0).
ERROS CARD

FEUD

PETMI!

£2l!§ LQ£bI!Ql! U!i]!!Q ... U!i199- 3 7 O.5E- 0 9

Bithe. the PDP ar.ay pointers (ICM byte 12) are not correct (the expected value is
X'56') or sequence bit 1 (ICW bit 13.1) is not on. o~ the .essage count (ICW bits 13.6
and 13.7) are not as expected. (The expected lIessage count is 13.6 off and 13.7 on).
Refer to SDLC Receive state transition 23. Register X'15' contains the bits in error.
Regi'ter X",' 1s the line under test.

o

o
o

CONTROLLER

COM~UNICAT10NS

TYPE 3 COMMUNICATIONS SCANNER 1fT SYftPTOft INDEX

ERROR CARD

'

X74F

l'EALD

FETIIII

TP81X
TF80X
TP4BX
TP22X
TFSOX

F-520

~!!!

r.Q!;aUQ!!' U!lUQ.. UQ!!!.Q...

OX 12

E2B2
E2E2
E2P2
E2N2
l!2S2

The last entry in the PDF is not equal to X' 40B' (control, EOII, leading graphics and L2
pending).
negister X' 15' (bits 0.5-1.7) contatns the bH/s in error.'

o

Register X' 11' con tains the address of the line under test.
ERROR CARD
X1l11'

PEALD

FETMM

~!!!

!.Q£UIQ!!. U!i!!!.Q .. fA9.!;I!Q",

ox 13

E2E2
E2P2
E3L2

o

TI'80X
TN8!
TE40X

1'-560

A L2 interrupt was expected from the receive line~ Either, the interrupt did not occur
(Register X'14' equal zero), or the interrupt was from the wrong line (AQ9ister X'14'
not equal Register X"l'). Refer to SDLC receive state 33.
ERROR CARD

PEALD

FETHII

£QIl! 1Q£AIIQ!!' U!il;!!.Q.. faQ!!!'Q",
X7l11'

Ox 14

E2N2
E2B2
E2E2
E2P2
E202

TP22X
TF81X
TI'80X
TN8lt
TF34X

1'-160
1'-210
F-240

The status posted in the receive line lCW was expected to be X'0500'.
The status bits in error are in Register X'15'.
neg X'lS'
Bits
0.0
0.1
0.2
0.3
0.4

Description
Abort Detect
Format Exception
Char Over/Under run
Data Check
BSC bad PAD flag

0.• 5

tOll

0.6

Leading OLE Error

Type 3 Communication Scanner 1FT

lCW
Bits
0.0
14. 1
0.2
14.3
14.4
0.5
14.6

X3705HAA 7.0.125

IBK 3705 COftftUKlClfIONS COHTRO~~ER
TY'. 3 COftftOBlCATlOHS SClRHER I'T SYK'TOft lRDEX
0.7
1.0-1.7

I7I1F

Length Check
lCIi byte 15

BBBOR CABO

FEALD

~U

I.2~An2!

fA!UiIi2 .. fAiJOli2..

0115

B2C2
B282
B2K2
B2R2
B2J:l

'U60X
USU
TP4qx
U321
U501

14.7
15.0-7

'ITIIII

'-580
'-600

/

The ~r/EPC' should be 7/3 with
state transition 22, 23 and 17.

se~uence

bit 13.0 undefined.

Refer to SDLC Receiwe

-"

Register X'15' contains the incorrect pcr (bits 0.. 0-0.3), EPcr (bits 0.11-0.7), sequence
bit (bit 1.0).
ERROR ClRD
174r

FEUD

'ETIIII

TF81X
TFII4X
U321
TP501

'-590
'-580

~Q!

LQs!I1Q!I 2A!iU2.. U!iJ!!Q..

OX 16

E282
12K2
E2R2
E2J2

The PCP/BPCP should be 7/5 with sequence bit 13.0 undefined.
state transition 28.
;,

•

•

Refer to SDLC Receive
h ~.

'

Register X'1S'; contains the incortect pcr (biis 0.. 0-0.3), EPcr (bits 0.4-0.7), sequence
bit (bit 1.0).'
ERROD CABD
X74F

FEAt 0

FETSII

~121

li2~nQ!

U!iJl!Q.. Ulil!lQ..

OX 17

E2B2
E2E2
B2r2
E2M2
B2S2

U8n
Tl"801
TP4SX
!I'221
TF50X

'-520

'.

!

The last entry in the PDF is not equal to 1'509' (control, abort detect, EOK and L2
pending).
Register 1'15' (bits 0.5-1.7) contains the bit/s in error.
Register X'11' contains the address of the line under test.

X71U'

ERROR CARD

l'EUD

unll

~!!~

J.Q~AUQl!

UliE!!Q..

fA~U;!lQ...

OX 18

1!282
B2K2
1!2R2
E2J2

TPSa
UII4X
TP321
TPSOX

p-600
l"-580

The PCl"/EPCl" should be 7/3 with sequence bit 13.0 undefined.
state transition 37, 22, 23 and 17.

Refer to SDLC Receive

Register X'1S' contains the incorrect PCl" (bits 0.0-0.3), EPCP (bits 0.4-0.7), seguence
bit (bit 1.01.
ERROR CARD
£QQl I.,2£illQ!I
X74'

OX19

E3L2
B2B2
B2N2
E2F2

l'EUD

rETSil

f!!Ull!Q .. Uli!!Q...
TE40X
U8n
T'221
TP48X

F-380
F-390
p-510

Either the PDP array pointers (ICII byte 12 - input X'4E') are incorrect, (the
value of byte 12 was X'AC') or the message count (ICY bits 13.6 and 13.7) are
expected. (The expected message count is 13.6 off and 13.7 on) or seguence 1
is not on. Register X'15' contains the bits in error. Register X'11' is the
test.

expected
not as
(ICY 13.1)
line under

/
1. 0.126 1370S8AA

Type 3 Communication Scanner 1FT

o
o

o
o

181 3105 COKftUHIC1TIOBS CO.TaOLLER
TY~E 3 COftftDHIClTIORS SClNNE* 1FT SY"~TO! IHDEI
ERROR cnD

PEAtD

FETIIII

OX20

Tr601

F-SSO
1'-600

D99-3105E-09

SQIUI LQ!;W2! . ElIiUQ .. Ulill!g...
nllp

o
o
o

82C2
82B2
82K2
82R2
82"2

usn

Trqlll
U321
'11'501

The ~CF/E~CP should be 5/0 vith sequence bit 13.0 undetined.
state transition 9.

Refer to SDLC Receive

Register 1'15' contains the incorrect PCP (bits 0.0-0.3), 8PCP (bits 0.4-0.1), sequence
bit (bit 1.01_
ERROR CARD

.BALD

PETIIII

SQ!! 1I2S'

Tbe status posted in the receive line ICN was expected to be X'ODOO'.
The status bits in error are in Register X' 15'.
Req X'15'
Bits
0.0
O. ,
0.2
0.3
0.4
0.5
0.6
0.1
1.0-,.1
EBBOB CABO
s:2Q! It!lS:AU2!!
1750

OX 111

l!2112
B2P2
83K2

ERROR CABO
1750

Description

ICW
Bits

Abort Detect
0.0
por.at Bxception
14. 1
Cbar Over/UndeF run
0.2
Data Check
14.3
asc bad PAD flag
14.4
EOII
0.5
Leading OLE Error
14.6
Length Check
14.1
15.0-1
ICW byte '5
FEUD

PETII!!

EA~!!!L

E!!!!!Q.:.

TP221
TF821
TE2U

F-230

FEUD

PET II II

£QQ!

lI!!S:All!!!!

U~!!!JI.

U!!!.!!!!..

OX15

82B2
E2K2
E2R2
B2.12

US11
TF411X
TF32X
U50l

F-590
F-580

Tbe PCF/EPCF sbould be 114 witb sequence bit 13.0 undefined.
state transition 22, 23, 44, 45, and 49.

Refer to SDLC Receive

Register X'15' contains the incorrect PCF (bits 0.0-0.31, EPCP (bits 0.4-0.71, sequence
bit (bit t.O).

1750

BRROB CARD

I.2!;AUQlt

F1iUO

~U

U!iJlt~

U!!IB.!h

OX16

B2B2
B2K2
8282
82.12

nS1X
TFIIIIX
TPl2X
TP50X

F-600
,-580

PET II II

The PCP/EP~F should be 6/1 with sequence bit 13.0 undefined.
state transition 42.

Befer to SDLC Beceive

Register X'15' contains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0.4-0.7), sequence
bit (bit 1.0).
ERBOD CABO
1750

~U

l.Q!aIlQ!!

OX 11

E2E2
82F2
E3L2

7.0.134 X3705HAA

FEUD

PB Til II

TrSOX
TFII8X
TEIIOX

F-560

U!!!!Q.. lAg};!Q..

Type l Communication Scanner 1FT

o
o

o

rBM 3705 COM~UNICATlaNS CO~TROLLEB
3 CO~~UNICATIONS SCANNEa 1FT SYMPTOM INPEX

o

o
o

A L2 interrupt vas expected

fro~ the receive line.
Either, the interrupt did not occur
(Register X'14' equal zero), or the interrupt vas from the wrong line (aeyister X'14'
not equal Register X'11'). Refer to SEI,C receive state 42.

X150

ERROR CARD

FEUD

FETIIM

£Q.!H;

~£~!!!Q!!

U;i!501
TEJ4X

1'-600
1'-580

NOTE •••• If the High Speed Scanner Feature (230KB) is installed:
l!3N2 (TEJ51) is also a possible failing card.
The PCF/EPCF should be 1/3 with sequence
state transition 10.

b~t

13.0

und~fined.

Refer to SDLC Receive

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EpCF (bits 0.4-0.11, sequence
bit (bit 1.0).

1751

ERROR CARD

FEUD

1'RTMM

~~!l§

!!!g~lIg:.

Ug~!Q ..

!F1I8X
Tl'221
TF81X
TEqOX
TE341

1'-380
1'-390
1'-510

OX09

.. I.Q~~!!QIi
821'2
E2N2
E2B2
E3L2
E3D2

NOTE •••• If the High Speed Scanner Feature (230KB) is installed:
E3N2 (TE35X) is also a possible failing card.
Ei ther the PDF array pointers were not set to 1'1'1" or the message cOUllt was not 13.6
off and 13.7 on, or 13.1 was not on. negister X'15' contains the bits in error; byte 0
is the PDF array pointers, byte 1, bit 1 is sequence bit 1 and byte 1, bits 1.6-1.7 are
the message count. If the Hi Speed Scanner Feature (230KBI is installed, bits 1.4 lind
'.5 are the extended PDF pointer bits. Reter to SDLC receive state transition 10.

1751

ERROR CARD
!;;Q!lll LQ£AUQlI

FEALD
!!Ml.!l!Hh.

FETMM
UglD!£l..

OX 10

!F81X
TFqqX
TF32X
TF501

F-600
1'-580

E2B2
E2K2
E2B2
E2.,2

The PCF/EPCF should be 7/3 with sequence bit 13.0 undefined. Receiving non-fldg and
non-idle characters cause the scanner to remain in state 1/3.
Register 1'15' contains the incorrect PC!' (bits 0.0-0.3), EPe!' (bits 0.q-O.7), sequence
bit (bit 1.01.

1751

ERROB CARD

FE~LD

FETMM

£QQ~

LQ£!UQ!f

!!A!H;lIQ..

UQl;!fQ..

OXll

E2B2
E2K2

7.0.138 X3705HAA

1'-590
1'-580

Type 3 Communication Scanner 1FT

I0
J!,

I 0
~

w

I

0

IBK 3105 COHHUNlcATIOMS CONTROLLER
3 COH"UN~CAT~OHS SCANNER 1FT SYHPTOH INDEX

TY~E

82R2
E2J2

0

Refer to SDLC Receive

Register X'lS' contains the incorrect PCP (bits 0.0-0.3), 8PCF (bits 0.4-0.7), sequence
bit (bit 1.0).

0
0
0
0
0;

ERROR CARD

X751

nAtO

UTIIII

~I!:

L!2~UI2li

U2U2 .. EIIUtlQ..

OX 12

82B2
E2K2
82R2
l!2J2
E3D2

Tl"81X
Tl"44X
TPJ2lC
TP50X
TE34I

P-590
P-580

NOTE •••• If the High Speed Scanner Feature (230KB) is installed:
83N2 (TE35X) is also a possible failing card.
The PCF/EPCF should be 7/q with sequence bit 13.0 undefined.
state transition 48, 23, qq, 45, and Q9.

Refer to SDLC Receive

Register X'lS' contains the incorrect PCF (bits 0.0-0.3), EpCF (bits 0.4-0.1), sequence
bit (bit 1.0).

ERROB CARD
X751

~I!g

I.Q~UI!Hf

FEALD
f!m1!fQ...

OX13

ll2B2
ll2K2
1!2R2
1!2J2
83D2

TF811
Tl"44 X
TF32X
TF50X
TE34X

G

FETII!!

Ulill.!Hl..
F-580
F-590

NOTE •••• If the High Speed Scanner Feature (230KB) is installed:
1!3H2 (TE35X) is also a possible failing card.

'I',

0
0:'

0

TPSOX

The PCF/EPCP should be 7/5 with sequence bit 13.0 undefined.
state transition 28.

0

"

TP32X

The PCF/EPCF should be 7/5 with sequence bit 13.0 undefined.
state transition 35.

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4-0.1), sequence
bit (bit 1.0).

X751

EaROR CARD

FEUD

FETIIII

~I!g

I.Q~U!Q!!

!i!!~1 ICW bit 15.3 off
~o program requested interrupt on line idle detect or flag) functions.
Diag 0=1 for both
lines. Diag 1=1 for transmit line. cycle steal is used.
ERROR CARD
X753

PEALD

FETIIII

~!l~

1Q~!UQ!!

U!lll!!Q... nQUQ...

OXOl

E3p2
E2D2
E2J2
E3R2

TE20!
TP621
Tp50X
TE26X

F-220
p-550

A set mode interrupt failed on the receive line (address in Register X'll').
Register X'15' to determine the cause of the error.

Re 9 X' 15'
0001
0002
0003
ERROR CABO
1753

Descripti on
No set mode L2 occurred.
Interrupt from wrong line - Reg 1'14'
not equal to Reg X'11'.
Feedback check error.
PEALO

FErIlM

~Q!lEl

LQ~!UQ!!

UQ]!!.Q.. fUElllQ ....

OX02

E3p2
E2D2
B2J2
E3R2

TE20X
Tl'62X
TF50X

F-220
F-550

TE26X

A set mode interrupt failed on the translllit line (address in Register X'11').
Register X'lS' to determine the cause of the error.
Beg X'15'
0001
0002

7,.0.146' X370SHAA

Display

Display

Description
No set mode L2 occurred.
Interrupt from wrong line - Reg X'14'

Type 3 COlllmunication Scanner IFT

o

o
o

1811 3105 COIIIIUII1CATIO"S CONTROLI,Eft
TYPE 3 COIIIION1CATIONS SCANNER 1FT SYIIPTOII INDEX

o

not equal to Reg X'11'.
Peedback check error.

0003
ERROR CARD
1753

PEUD

FETIIII

£.Q!!~

l&£lliQ.!i U!i!.!iQ .. U9nQ",

OX03

11282
B2K2
E2B2
E2J2

o

D99-3'/05E-09

U61X
TP4q[
TP32X
TFSO[

F-560
F-S90

The PCP/EPCP should be 7/7 with sequence bit 13.0 undefintld,.
state transition 3, 22, 23, 44. 45, 49, 29, and 11.

Refer to SDLC Receive

Register 1'15' contains the incorrect PCP (bits 0.0-0.31. EPCP (bits 0.4-0.7). sequence
bit (bit 1.0).

o
o
o

r.u
o
o
o

ERROR CARD
1753

PElLD

PET III!

£.Qn~

LQ!cAIIQ!! U9fj!!Q ..

~A!i!l!Q",

OX04

ll2B2
E2K2
22R2
22J2

F-580
F-590

'rP8U
TFIIIII
U32X
USOX

The PCF/EPCP should be 7/7 vith sequence bit 13,0 undefined. Refer to SDLC Receive
state transition 11. Received idle and data cbaracters witb lCW bit 15.3 off; state
should not cbange.
Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCl' (bits 0.• 11-0.1), sequence
bit (bit 1.0).
X754

SDLC Receive Test f 9

LCD=l

EP

!QY!!!!~ ~fj~£R!fl!Ql!

This routine tests the follolling conditions when a flag is received il\ PCI'/EPCF state 6/4 with
sequence bit 13.0 off; (1) information frame/CRC good, (2) inforlllltion frame/CRC bad, (3)
non- infonation fralle/CRC good, and (41 non-information frame/CRC bad. Diag 0=1 for both
lines. Diag 1=1 for transmit line. Cycle steal is used.
ERROR CARD
£.Q!!!l IoQ!:.AUQ.!i
X754

OXOI

23P2
E2D2
E2J2
23B2

PEUD

U!il!!Q ..
TE20X
TP62X
TI'SOX
TE26X

FE Til I!
U~l!Q~
F-220
1'-550

A set mode interrupt failed on the receive line (address in Register X'11'1.
Register X'1S' to deterlline the cause ef tbe error.
neg X'15'
0001
0002
0003

x754

Description

No set mode L2 occurred.
Interrupt fro. wrong line - Reg X'14'
not equal to Reg X'11'.
Peed back check error.

ERROR CARD

FEUD

FETIII!

£.Q!l~

IoQ~A!!Q!i

U!i!.!iQ ..

~A!i!!!Q

OX02

E3P2
22D2
E2J2
E3R2

TE20X
TP62X
TF50X
TE26X

F-220
F-SSO

..

A set mode interrupt failed on the transmit line (ad~ress in Register X'11',.
Register X'lS' to determine the Cause of the error.
Reg X'lS'
0001
0002
0003

Display

Display

Description

No set mode L2 occurred.
Interrupt from wrong line - Reg X'14'
not equal to Reg X'11'.
Peed back check error.

'rype 3 Communication Scanner 1PT

X370snAA 1.0.147

leN 3105 CO""U~IC1TIONS CONTROLLER
3 COKKUKICATIONS SCANNER 1FT SYK~TOK INDEX

TY~E

EBBOB CARD

x7511

£QnJ

l'EALD

I.~:UQ!!

U!i!!!.Q.. Ug}!;!!!!.:.

PET""

OX03

E2B2
11302
1I2J2
1I2B2
E2R2
E2K2

TP80X
TE54X
Tl'501
U811
TP321
TFII4I

P-580
F-590
F-570

)
)

The ~P/B~CP sholild be 6/11 with seqllence bit 13.0 off.
transition 3. 22, 23, 1111, and liS.
Begister X'15' contains the incorrect
bit (bit 1.0).
EBROR CARD
~U

1754

01011

PEltO

~P

Befer to SDLC Receive state

'\

(bits 0.0-0.3).

E~CF

(bits 0.4-0.7). seqllence

/

FETKII

LQSAn2!!. Ugli.!!.2.. fAgEI!Q..
E2~2

E2B2
E2K2
E2R2
ll2J2

TP82X
Tl'811
TPIIIIX
TFl21
TP50X

P-500
F-590

The ~CP/EPCP sholild be 7/5 with segllence bit 13.0 Ilndefined.
state transition 311.

Refer to SOLC Beceive

Begister X'15' contains the incorrect PCP (bits 0.0-0.3). BPCF (bits 0.11-0.7), seqllence
bit (bit 1. a) •
BRBOR CARD
s;Ql!! I.QSAU2.1i
11511

OX05

E2B2
ll2F2
ll3t2

PEAt 0

FET!!"

U80X
TFIIOX
TEIIOI

P-560

U!i!!!g.. UgnQ:.

A L2 interrllpt was expected from the receive line. Either, the interrllpt did not occllr
(Register ,X' 14' eqllal zero). or the interrllpt vas fro. the wrong line (Register X'111'
not egllal Register X'll'). Refer to SDLe ReceiYe state transition 34.
EBBOR CARD
£QU LQ!;;!nQ!!
X754

0106

E2N2
E2B2
E2E2
E2P2
E2Q2

FEltD

PETII"

TP22x
TP811
TF801
TP"81
TP311X

1-160
P-210
P-2110

U!i!!!Qa. UgE!!!..

The stat liS posted in the receive line lew vas expected to be 1'01100'.
'lhe statlls bits in error are in Register 1'15'.
Reg X'15'
Bits
0.0

0.1
0.2
0.3
0.11
0.5
0.6
0.7
1.0-1..7
ERBOR CARD
£Q!!! 1Q!;;!UQ.Ii
1754

0107

E2B2
E2B2
B2K2
E2B2
E2J2

Description

ICIl
Bits

0.0
Abort Detect
PorBat Bxception
111. 1
Char OverlUnder rlln
0.2
Data Check
111.3
BSC bad PAD flag
'''.11
0.5
BO"
Leading DLB Error
111.6
Length Check
14.7
ICII byte 15
15.0-7
PEAt 0

FETIII!

TP801
TP8U
TP""I
TPUX
TP50X

1-580

Ug}!;!!Q.. ,ngl!!Q:.
P-590
P-570
\

)

1.0.1118 X3705HAA

Type 3 CO ••llnication Scanner 1FT

•

o

o
o
o
o
o

IBft 3705 eOftNUNICATIOWS CONTBO~LEB
TY~B 3 COftNUHICATIOHS SCAHNER 1FT SYMPTOK INDEX
The PCF/EPCF should be 6/4 with
transition q8, 23, 4q, and 45.

bit 13.0 off.

Refer to SDLC Receive state

Register X'15' contains the incorrect pcr (bits 0.0-0.3), EPcr (bits 0.4-0.7), sequence
bit (bit 1.0).
ERROR CARD

FEAt 0

FETIIII

!<2!!1 lIQQHQJ! U!ilI!Q:a. n!i!!IQ.,.
X7511

0108

o

o
o

se~uence

D99-37052-09

E2B2
E2K2
E2R2
E2J2

U81X
TFIIIIX
Tr32X
U50X

F-580
r-590

The PCF/EPCF should be 7/5 with sequence bit 13.0 undefined.
state transition 36.
Register X'15' contains the incorrect PCF (bits 0.0-0.3),
bit (bit 1.0).
EBROR CARD

X7511

QQaJ

*9~QB

OX09

E2E2
E2F2
BlL2

FEALD

~pcr

Reter to SDLC Receive
(bits 0.4-0.7),

.e~oence

FETIIM

EAiIIQ.. fA!!!!!Q:a,
F-560

A L2 interrupt was expected fro. the receive line. Bither, the interrupt did not occor
(Re~ister X'14' egual zero), or the interrupt was frol the wrong line (Begist9t X'14'
e~ual Register XI 11').
Befer to SDte Receive state transition 36.

0'

not

ERBOR CUD
17511

FEAtD

FET""

IO!lDI

LQIOUI!lB

U!ilIQ.. !1!i.§.I!Q..

OXOA

E2112
E282
E2E2
E2r2
E202

TF22X
U81X
TF80X
U4aX
Tr34X

r-160
F-2'0
F-2110

The status posted in the receive line ICI was expected to be X'1400'.
The status bits in error are in Begister X'15'.
Reg X'15'
Bits
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1.0-1.7

o

ERBOR CABO
X7511

Description

ICI
Bits

Abort Detect
0.0
roreat Exception
14. 1
Char Over/Under run
0.2
Data Check
'11.3
BSC bad PAD flag
14.4
BOil
0.5
Leading OLE Error
14.6
Length check
14.7
lCIi byte 15
15.0-7
FEAt 0

FETIII!

Tr80X
Tr81X
UQ/IX
Tr32X
Tr60X

F,.570
F-580
F-590

£211fl

LQ£!llQl! U!ilIQ:, ElU!!2...

OXOB

E2E2
E2B2
E2K2
E2R2
E2J2

The PCF/EPCf should be 6/11 with
transition 48, 23, 411, and 115.

se~uence

bit 13.0 off.

Befer to SDLC Beceive

sta~e

Register x',5' contains the incorrect pcr (bits 0.0-0.3), BPCF (bits 0.4-0.7), sequence
bit (bit 1.0).

1754

ERROR CARD

FBALD

FETftft

QQR!

~g~!!Q!

fA!i!!!Q~

f!!!!l!Q:a,

OXOC

E2C2
B2B2

TF60X
'USlI

F-580
F-590

Type 3 Co ••unication Scanner 1FT

IeH 3105 COMMUNICATIONS CONTROLLER
T¥PE 3 COHMUNICATIONS SC~HNEQ 1FT SYMPTO~ INDEX
E2K2
B2R2
E2J2

D99-3105E-09

TF44X
TF32X
U50X

The PCF/EPCF should be 7/5 with sequence bit 13.0 undefined.
state transition 51 and 52.

Refer to SDLC Receive

Register X'15' contains the incorrect PCF (bits 0.0-0.3), EPCP (bits 0.11-0.7), sequence
bit (bit 1.0).
ERROR CARD
1754

J.QQIIQll.

FEUD

FETtItI

t;;Q!!~

~A!ilill.Q ...

Ugl!!Q ...

OXOO

E2E2
E2P2
E3L2

TF80X
nllex
TE40X

F-560

A L2 interrupt vas expected from the receive line.

Eithor, the interrupt did not occur
(Register X'14' equal zero), or the interrupt was from the wrong line (Register X',II'
not equal Register X'11'1. Refer to SOLC Receive state transition 52.

ERROR CARD

PEALD

FETKII

OXOE

TF22X
U8n
TFBOX
TF48X
TF3q[

F-160
F-210
F-2110

£Q!!!l !Qt;;U!Qll. Ug.llliQ... fAg];!,!Q ...
x754

E2N2
E2B2
E2E2
E2F2
B202

The status posted in the receive line ICW vas expected to be X'0400'.
The status bits in error are in Register X'15'.
Reg X'15'
Bits
0.0
O. 1
0.2
0.3
0.11
0.5
0.6
0.7
1. 0-1.7
ERROR CARD
x154

Oeser iption

ICW
Bits

A bort Detect
0.0
Format Exception
14. 1
Char Over/Under run
0.2
Data Check
14.3
BSC bad PAD flaq
111.4
EO!!
0.5
Leading OLE Error
14.6
Length Check
111.7
15.0-1
leW byte 15

FEAt 0

FET!!tI

~!!.l!

I&t;;U!Qll.

U!HI!,!Q ... fAg];!!Q ..

OXOI'

E2E2
l!2B2
E2K2
B2R2
E2J2

TF80X
TF8U
TPIIU
TI'321
TI'501

F-570
F-580
1'-590

The Pcr/EPCF sbould be 6/4 witti'S'lquence b'it 1:3.0 off.
transition 48.~23, 411, and 45.
.

Refer to SDLa Receive state

Register X' 15' contains the incorrect pcr (bits 0.0-0.3), EPCl' (bits 0,.4-0.1), sequence
bit (bit 1. 0) •
ER90R CARD
X154

FEALD

FETIIM

t;;Q!!~

LQ!:;UI2ll.

~,A!ilill.Q ...

fAg];ll.Q ..

OX 10

E2B2
E2K2
E2R2
B2J2

TI'81X
TI'II4X
n32X
TP50X

F-580
1'-590

The PCP/EPCP should be 1/5 with sequence bit 13.0 undefined.
state transition 51 and 54.

Refer to SDLC Receive

Register X'15' contains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0.11-0.1). sequence
bit (bit 1.0) .•

1.0.150 X3705HAA

Type 3 Comaunication Scanner 1FT

o

o
o
o

IBH 3705 COMKUNICATIO.S CONTROLLER

TIPB 3 CO""UNIC1TIoas SClNMER
ERROR ClRD

1754

FE1LD

IF~

FET"M

QaQ! LQSAl1Q!

f!2!!Q~

f!SE!Q~

OX 11

U80X
!P4BI
fEllOI

1'-560

E2E2
E2P2
E3L2

D99- 3705E-09

SXMPTOft INDEX

A L2 interrupt was expected fro. the receive line.

Either, the interrupt did not OcoUr
(Register 1'14' equal zero), or the interrupt was fro. the wrong line (Register X'14'
not equal Register X'11'). Refer to SDLC Receive state transition 54.

o

ERtlO B CARD
X754

FEAt 0

~QQE

,LQ£WQ! fA!.Ui!Q ..

OX12

E2N2
E2B2
B2B2
l!2P2
B2Q2

o

TP221
U8n

U801
!P1I81
TP3U

FETII"

fAgll!Q~

1'-160
1'-210
F-240

The status posted in the receive line ICW was expected to be X'1400'.
The status bits in error are in Register X'15'.

o
o

Reg 1'15'
Bits
0.0
0.1
0.2
0.3
0.11
O.S
0.6
0.7

ICII
Bits

Abort Detect
0.0
Por_at Exception
14. 1
Char Oyer/Onder run
0.2
Data Check
111.3
BSC bad PAD fla9
14. II
BOil
0.5
Leading OLE Error
14.6
14.7
Length Check
, 5. 0-7
ICII byte 15

1.0-'~7

X755

Descrip~ion

SOLC POF1 Pointer Back-up Test

Transait LCD=C

Recei ye LCO=9

Not EP

This routine checks that the PDF array pointer is dreceaented correctly when a valid fraae is
not detected. Dia9 0=1 for both lines. Trans.it PCF=E/O. cycle steal is used.
BRROR CUD

PElLD

FETU

0101

'rE201
'rP621
TPSOI
'rE261

P-220
P-550

£QQ§ LQWIQl! Uil!lIQ... lAUl!Q...

o
o

X755

BJP2
B2D2
B2J2
B3R2

A set .ode interrupt failed on the receiYe line (address in Register 1'11').
Register 1'15' to deter.ine the cause of the error.
Beg 1'15'
0001
0002
0003

Display

Description

No set .ode L2 occurred.
Interrupt fro. wrong line - Beg X'111'
not egual to Beg X'11'.
Feedback check error.

ERROR CARD

FEAtD

FBTH"

E3P2
E2D2
E2J2
E3R2

TE20X
TF62X
U501
TE261

F-220
P-550

£QQ! I.Q£UIQ!! U!l.UQ.. f!g.l!l!Q ...
1755

OX02

A set .ode interrupt failed on the transmit line (address in Register X'11'1.
Register X"S' to determine the cause of the error.
Beg X'15'
0001
0002

Display

Description

No set lode L2 occurred.
Interrupt fro. wrong line - Reg 1'14'
not egual to Reg X'11'.

Type 3 Co •• unication Scanner 1FT

XJ705HAA 7.0.151

IBII 3705 COllftUHICATIONS CONTROLLBR
TYPB 3 eOftnUNIc~TIONS SCANNER 1FT SYftPTOft INDEX
0003

D99-3105B-09

Feedback check error.
"'-,

BRROR CARD
X755

nUD

FET!ln

'rP81X
TF60X
TF42X
TE22X

F-520

~ll!!

!eQ£WlU! 'uliJ,lt.9.. UlilliQ..
,
.J'

OX03

112B2
112C2
82H2
.83012

The receive line SOP should contain X'017F'.
X'15', (bits 0.6-1.1).

)

The incorrect SDP data is contained in
'.,

j

BRROR CARD

PBUD

FETIIII

Ql12!! J.Q£UIQ!

R!!il!Q~

,Ulil1!Q..

OX04

TF81X
TF60X
'rF42X
T822X

F-520

112B2
112C2
B2H2
83012

The receive SDF did not shift properly or the wrap function did not work correctly.
rontine is checking for an Abort in the receive SDF.
IIRROR C1RD

Qllll tQ£!IIQ!
X155

0105

82C2
E3D2
82F2

FEALD

The

FETIIII

f!gl!Q~

f!lilliQ ..

'rP60X
T.3U
TrlleX

F-380
p-390

ROTE •••• If the High speed Scanner Feature (230KB) is installed:
B3M2 (TE35X) is also a possi~le failing card.
PD.F array pointers, ICII byte 12 - input X'IIB' (also input X'41' for HS5), are incorrect.
Register X' 111' (bits 0.11-0.7) contains the expected ulue. Register X'15' (bits
0.4-0.7) contains the bit/s in error. Befer to SDLC Receive state transition 4. par
US5 extended PDP ptr bit is contained in bit 1.5 of Register 14 and 15.
ERROR CARD
X755

PBALD

PETlln

TP8U
TF44X
TP32X
U50X

F-580
P-600

~.!!l

1Qs;!llQ.l! Ulil!.9.. nlil!Q..

OX06

82B2
B21t2
82R2
E2012

The PCP/EPCF should be 5/0 with sequence bit 13.0 undefined. Program forced state 6/2,
13.0 off before this test. Refer to SDLC Receive state transition 4.
Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4-0.7), sequence
bi t (b it ,. 0) •
8RROR C1BD

X755

PE1LD

PETnll

Qllll LQ£!IIQI f!lilliQ..

f!lil!i~

OX 07

P-380
P-390

8302
E2p2
E2C2

'rE34X
UII8X
TF60X

NOTE •••• If the High Speed Scanner Peature (230KB) is installed:
83M2 (TE35X) is also a possible failing card.
PDP array ~ointers. lCII byte 12 - input X'4E' (also input X'41' for H55). are incorrect.
Register X'14' (bits 0.4-0.7) contains the expected value. Register X'15' (bits
0.4-0.7) contains the bit/s in error. Refer to SDLC Receive state transition 6. For
H55 extended PDP ptr bit is contained in bit 1.5 of Register 14 and 15.
ERROR CARD
X755

PEUD

1'ETIIII

U81X
Tl'44X
Tl'32X
U50X

1'-580
1'-600

Ql~E

J.Sl£!.t!Q! EAWSl", f!l!lllQ",

oxoa

8282
E2K2
E2R2
82012

/

7.0.152 X37058,.,.

Type 3 Communication

Scanne~

1FT

o
o
o

IB" 3705 COft~UNICATIO"S CONTIOLLEB
TtP! 3 COftftUNICAfIONS SCANNER IPT SY"PTOa IHDEX

099- 3705£- 09

The PCF/EPCF should be 5/0 with sequence bit 13.0 undefined. Prograa forced state 6/3,
'3.0 off before this thest. Befer to SDLC Beceive state transition 6.
Begister X'ls' contains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0._-0.7), sequence
bi t (bit 1.0).
.
ERROB CABO

o

X7ss

FEALD

FETftl!

~l!~

I&SU!Q!! U!!!!Q,.

U~!!Q..

OX 09

B2P2
B3D2
B2C2

P-380
P-390

'lPII8X
Tl!311X
TP60X

nOTE •••• If the High Speed Scanner Feature (23018) is installed:
E3M2 (TE35X) is also a possible failing card.

o
o
o

PDP array pointers, ICV byte 12 - input 1'4E' (also input X'41' for HSS), are incorrect.
Register X'14' (bits 0./i-0.7) contains the expected value. Begister X'15' (bits
0.11-0.7) contains the bit/s in error. Befer to SDLC Beceive state transition 8. Por
nss extended PDP ptr bit 1s contained in bit 1.5 or Register '" and 15.
ERROB CARD
1755

PElLD

PEUII

~l!~

102SU!Q! nil!!! .. n!H'!!!..

OXOA

E282
E212
E2R2
E2J2

TP811
nll4X
T!'32X
TP50X

P-580
P-600

The PCP/EPCP should be 5/0 with sequence bit 13.0 undefined. prograa Porced state 6/4,
13.0 off before this test. Befer to SDLC Receive state transition 8.

'
G

Begister X'15' con tains the incorrect PCP (bits 0.0-0.3), EPCP (bi ts 0.11-0.• 7), sequence
bit (bit 1.0) •

•1

ERROR CARD
S2n J.QCATIQ!!

~,<

I

X75s

OXOB

E2P2
E3D2
E2C2

PEUD

PETIII!

TPII8X
TE34X
U60X

P-380
P-390

UiI!!!',!.. fA!!!!!Q ..

BOTE •••• If the High speed Scanner Peature (23018) is installed:
83M2 (TE35X) is also a possible failing card.
PDP array pointers, ICV byte 12 - input X'IIE' (also input X'II" for ass), are incorrect.
Begister x"II' (bits 0.4-0.7) contaiDs the expected value. Begister X"S' (bits
0.4-0.7) contains the bit/s in error. Befer to SDLC Beceive state transition 7. Por
HSS extended PDP ptr bit is contained in bit ,.5 of Register ,,, and 15.
ERROB CABO
S21l1 loQ~m2!
X755

OIOC

E282
E2112
B2B2
B2J2

PEUD

PET II I!

UiI!!!h

iA~l!!QL

TP811
TPII4X
TP32X

P-580
F-600

U501

The PCP/EPCP should be 5/0 with segQence bit 13.0 undefined. Progtaa forced state 6/_,
'3~0 on before this test.
Befer to SDLC Receive state transition 7.
Begister X'15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0._-0.7), seqQence
bit (bit 1.0).

X755

B880B CARD

PElLD

FBTIII!

S2U !'QSAI!Q!!

U~!!!Q ..

U!!!!!Q..

OX 00

TE311X
n48X
TP60X

P-380
P-390

B3D2
E2P2
E2C2

HOTE •••• If the High speed Scanner Peature (23018) is installed:
B382 ('1'E351) is also a possible failing card.
PDP array pointers, ICW byte 12 - inpQt I'IIE' (also input 1'41' for H5S), are incorrect.
Register X'1Q' (bits 0.4-0.7) contains the expected value. Begister X'15' (bits

Type 3 Coa.unication Scanner IPT

X3705au 7 .• 0.153

.
IBK 3105 COKKaNIC~TIO.S CONTROLLER
Tt~S 3 COllftUNICATIONS SCARRER 1fT SynPTOII INPEX
O.~-O.l)

contains the bit/s in error.

Refer to SnLC Receive state transition 8.

.or

ass extended PDP ptr bit is contained in bit 1.5 of Register 1q and 15.

1755

ERROR CUD

PEUD

~n

I&!OUIQl!

21gj/1tQ.. fl!Hl!!Q ..

OXOE

B282
B2K2
B2R2
£2J2

na1X

nQ4X
Tl'32X
TP50X

fETK!!
f-580
f-600

The PCP/BPCP should be 5/0 with sequence bit 13.0 undefined. Program forced state
13.0 off before this test. Refer to SDLC Receive state transition 8.

6/~,

Register X'15' contains the incorrect PCF (bits 0.0-0.3), BPt. (bits 0.Q-0.7), sequence
bit (b it 1. 0) •
X156

SDLC Zero Bit Insertion Test

LCD=9

Hot liP

This routine checks "that tile SDI,C transmit line, ins~rts zero bits correctly. The transmit and
receiVe lines have D'.iag 0'" (scanner"wrapj and 1lhe J;eceive line has Diag .If.1 (PCf/lPCf"l/C).
cycle steal is used.~
EBBoa CUD
!.QgUQ!!

'BALD
fill!!lh.

PETK!!
USill!!Q ..

0101

TE20X
TE26X
Tl'62X
T'50X

F-220
'-550

!02IH,
X756

B31'2
33R2
E2D2
B2J2

A set mode interrupt failed on the receive line (address in Register X'11').
Register X'15' to determine the cause cf the error.
Reg X'15'
0001
0002
0003

x756

Description

NO set mode L2 occurred.
Interrupt froll wrong line - Reg X'14'
not equal to Reg X'11',
Peedback check error.

ERROR CARD
!OQ!lll J,Q5;UIQ!!

FEAtD
USill!!lh.

Ox02

TE20X
TE26lt
T1'50X
T1'62X

E3'2
£3R2
B2J2
E2D2

PETKII

2a!!1l1lQ..
f-220
1-550

A set lIode interrupt failed on the transmit line (address in Register X""I.
Register X'15'"to determine the cause of the error.
aeg X'15'
0001
0002
0003

Display

Description

Ho set mode L2 occurred.
Interrupt fro. wrong line - Reg X'14'
not equal to Reg X'11'.
Feedback check error.

EBBOB CARD
x156

Display

FEALD

!OQJl~

!'Q!OU!Q!!

fA~l!Q ..

0103

E21'2
E2E2
B3L2

Tl'Q8X
TrBOX
nQ6X

PETIIII
nSiUQ.:.
1'-550
1-560

A L2 interrupt was expected from the receive line. Bither, tho interrupt did not occur
(Register X'1Q' equal zero), or the interrupt was fro. the wrong line (Register 1'14'
not equal Register X'11').
ERROB CUD

'BALD

!OQ!l~

~l!ilO!!Q ..

1.0.15~

LQ!nQ.I!
X16"

0121

E2B2
11202
1121'2

FEUD

PETIIM

US1X
TFlU
!'PS2X

F-210

U!!!.I!Q.. Ulil!!Q...

ICII bit 5." should hue been set off.
X165

BSC Transmit Test; Not BP, Transparent

!QYIlll!

LCo-C

BBCDIC

~1£!!1!!12J

This routine checks transparent operation and various conditions of control characters in the
data stream. Data chain on with and without the last byte being a control character, and a
control character in data with and without the byte count ~ G are tested. The transmit line
uses Diag 0-1 (scanner "rapl. Ileceive functions sre not used. cycle steal 1s used.
ERBOII CABO
£QU J&lSOnIQ!
x165

OXOl

ElF2
B2D2
E2J2
UR2

FEUD

PET II II

TE20X
T'P62X
U501
TE2ljX

F-220
F-55r.

fA!!l!!9.. fA!i!liQ..

A set mode in~errupt failed on the transmit line (address in Register X'11'1.
Register X'15' to determine the cause of the error.
lIeg 1'15'

Display

Description

()
1.0.1S0 X3105HH

Type 3 communication Scanner 1FT

c

o
o
o

Ie~ 3705 CO~IIONICATlOIiS COUROLLER
TYPE 3 COIIIIONICATIORS SCAN"ER IF"r 5JIIP'lOn INDEX

o

o
o
o
o
o
o

0001
0002
0003

110 set mode L2 occurred.
Interrupt from wrong line - Reg
not equal to Reg X'11'.
Peed back check error.

BIlROB CABD
X765

~.l!ll

lo9SAlIQ!t

UTIIII
PEALP
UIUI1H!... .EAiUQ..

OX02

E2J2
B2B2
B2K2
B2R2

U50X
TP8U
'lP4QX
TPl2X

o
o
o
o
o
o
o

o

P-580
P-600

Refer to BSC Transmit

Register X'lS' contains the incorrect PCP Cbits 0.0-0.31, BPCP (bits 0.4-0.71. sequence
bit (bit 1.01.
ERROB CUD
L2£Ul!l!t

~~I

1765

0103

B3K2
B2B2
B2C2
B282
E3J2

PElLD

UTIIII

'U2U
TPS1X
TP601
TPfl2X
'U22X

P-Q10
P-Q20

UgJIHI... nglJ!Q,.

The transmit line SOP should contain X'0110'.
Register X'lS', (bits 0.6-1.71.

1765

PEUO

PETIIII

USOX
U81X
TP4U
TP321
USOX

p-S10
P-580
P-S90

~1!11

lo9£U!Q! UgU!l... fAill!!l ..

OX04

B2B2
B282
B2K2
B2R2
B2J2

The incorrect SOP date is contained in

The PCP/BPCF should be 9/4 with sequence bit 13.0 off.
transition 50.

Befer to BSC Transmit state

Register 1'15' contains the incorrect PCP (bits 0.0-0.31, BPCP (bits 0.4-0.7"
bit (bit 1.01.
BBIlOIl ClilD
1765

PBlLD

PETIIII

US1X
TP601
TP421
'U221

P-410
P-420

£!!.~!

.QS1UQ! flgU!l .. UggQ...

0105

B2B2
B2C2
B282
BJJ2

The transmit line SOP should contain X'0102'.
Ilegister X'15', (bits 0.6-1.7) •
EIlIlOR CAllD
£QI!! I.9£AUQ!
1765

OX06

B2B2
B2J2
B2B2
B2B2
B2K2
B2Q2

PBUD

sequence

The incorrect SOP data is contained in

rET1I1I

iUUQ..

Uglll!Q..

T1'32X
Tl'50X
Tl'SOX
'!PS1X
TP4U
TP34X

p-5S0
1'-510
1'- 590

The PCP/BPCP should be 914 with sequence bit 13.0 on.
trallsition 64.

Refer to BSC Transmit state

Ilsgister X'15' contains the incorrect PCP (bits 0.0-0.3), BPCF (bits 0.4-0.71, sequence
hi t (bit 1.01.
BBROR CABO

PEALO

~~§

ilQllHQ4 f!g!!Q ...

LQ~AIIQH

PB~II"

Type 3 Co •• unication Scanner 1FT

o

X'l~'

The PCP/EPCP should be 9/3 with sequence bit '3.0 undefined.
state transition " 2, 3, 4, 5 and 49.

BRIlOIl CUD

o

1)99-3105E-OII

131058U 1. 0.181

o
lea 3705 COKKUNICATloKS CONTBOLL!R
TYPB 3 COKBUNICATIOHS SCANNBB lrt SYfteTOft INDBX
1765

OX07

l!2B2
l!2C2
B282
B3J2

TP81X
TP60X
TPII21
TB22X

D99-3705B-09

P-/jIO
P-1I20

The transmit line SDP should contain 1'0110'.
Begister X'15'. (bits 0.6-1.7).
EIlRoa CUD

PEAtD

PEUK

OX08

TP80X
TP81X
TP/iql
TP32X
'!P50X

P-570
,-580
r-590

The incorrect SDP data is contained in

£2lll! 12SU!Q!! 2WllQ... RAW2...
1765

E2E2
1I2B2
1I2K2
B2R2
E2J2

The PCP/EPCr should be 9/1i with
transition 66.

seq~ence

bit 13.0 off.

lIefer to

esc

o

o

Transmit state

Register X'15' contains the incorrect fcr (bits 0.0-0.3). EPC? Cbits 0.1i-0.7), sequence
bit Cbit ,.0).
EBBoa CABD

PEALD

PET""

£2ll! 12SAll!2!! 2A§J!!9... lAg)!!!2...
1765

OX09

B2B2
TP81X
P-II10
1I2P2
TP821
,-1120
B2C2
'U601
B282
UII21
U221
B3J2
The transmit line SDr should contain 1'0110'.
llegister 1'15', (bits 0.6-1.1).

naoa CABD
1765

PBAtD

PETIIB

U821
'!P8U
TpfjliX
TP321
'!P501

P-580
f-590

~Q§

LQS;UIQI Uilillll... UgUQ...

OXOl

1I2P2
1I2B2
B2K2
B2B2
B2J2

The incorrect SDP d4ta is contained in

The Pcr/BPCP should he 9/8 with sequence bit 13.0 undefined.
state transition 73.

Befer to BSC Transmit

Begister X'15' contains the incorrect PCP (bits 0.0-0.3). BPCP (bits 0.11-0.7). sequence
bit (bit 1.0).
ERlIOB CABD

PEAtD

PETU

OXOB

U81l
U601
Tl'421
U22X

P-II10
P-/j20

£2ll! 12SAI!!2l! n!l!l!!9... U!l)!!!2.:.
1765

B2B2
B2C2
B282
B3J2

The transmit line SDl' should contain X'0110'.
Register X' 15'. (bits 0.6-'.71 •
BRROB CABD

£2lll!
X765

01 DC

LQS!~!!2!!

B2E2
E2B2
82K2
82R2
B2J2

PEALD

The incorrect SDP data is contained in

PETK"

f!§J!!9... fAQ!I!!!2.:.
TrOOI
TP81X
'!P/j4X
TP32X
TP50X

,/

I\".

F-570
F-S80
p-590

Tbe PCP/EPcr should be 9//j with sequence bit 13.0 off.
transi tion 48.

lie fer to 8SC Transmit state

Register 1'15' contains the incorrect PCF (bits 0.0-0.3). EPCF ,bits 0.11-0.1). sequence
bit (bit 1.01.

7.D..182 lt37QSUTIA

Type 3 communication Scanner 1PT

o
o
o
o

~BK 310' CO""Q"ICA~IOHS CGH~pOLLEB
TYPB 3 CO""ONICiTIONS SCANHBR IF~ SY"PTO" IIOBX

BRROR ClBO
£Q.U J,Q£!llQ!
1765

o
o

o
o
o

oXoo

E2B2
B2C2
B2H2
B3J2

X765

F-420

F~II10

PEALO
FET"I!
!!2J!2£ fAiJ!!Q ...

OXOE

Tr801
'ln8X
TEIIOX

E2B2
B2F2
B3L2

The incorrect SOF data is contained in

P-550
F-560

An L2 interrupt vas expected fros the transsit line. Either. the interrupt did not
occur (Register X'111' equal zero). or the interrupt vaa fros the vrong line (Register
X'14' not equal Begister X'11').
ERROR CARD
£Q.I!! L!l!;!ll2.!!
1765

OXOP

B282
B2C2
B2H2
E3J2

FElL 0

U!!!!Q...
TF81X
'fF60X
'fF42X
'lB22X

FETIIII
fWl!2...
F-II10
F-1I20

'lhe trans.it line SOP should contain X'0103'.
Register X'15'. (bits 0.6-1.71~

x765

o
o

TF81X
TF60X
TFII2X
TE22X

BRBOR CARD
J,2£!1!Q!

QQRI

BRROB CARD

o·

FE TIl I!
n!i1!.!!Q...

The transsit line SOF should contain X'0132'.
Register X'15'. (~its 0.6-1.7).

o

o
o
o
o
o

FEALO
U!!!!!Q£

FEUD

PH""

~RI

LilWl!lJl iAli.llil& UUIl!l.:.

OX10

B4!E2
B2B2
lI21'\2
lI2R2
B2J2

TP80X
U81X
TPIIU
'lP32X
!p50X

'lhe incorrect SOP data is contained in

F~570

p-580
l'-590

The PCP/EPCF should be 9111 vith sequence bit 13.0 off.
transition 60.

Refer to BSC Trans.it state

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCF (bits 0.11-0.7). sequence
bit (bit ,.01.
ERROR CUD
£Q.I!! LQ£!llQl!
X765

OX11

B2B2
B2C2
B282
B3J2

nuo
U!!!!!Q ...

FE'l""
nglU!2.:.

TP81X
U60X
TFII2X
'lB221

F-II10
P-II20

The transait line SOP should contain X'0126',.
Register X'15'. (bits 0.6-1.71.
BRROB ClBD

FEAt 0

T~e

incorrect SOP data is contained in

FBTIIl'!

QQ1!! !'Q!;AUQl! fA!illl!Q.. iAgng...
X765

OX12

B2E2
B2B2
B2K2
B2R2
B2J2

TF80X
'U81X
'lFIiU
'r'P321
USOX

F-570
F-580
F-590

The PCF/EPCF should be 9111 vith sequence bit 13.0 off.
transition' 60.

Refer to BSC 'lrans.it state

Register X'15' contains the incorrect PCP (bits 0.0-0.31. BPCP (bits 0.11-0.7), sequence
bit (bit 1.01.
BRROR CARD
!;QQE ~!lCA;XQl!

PEALD

FETI!"

~!2!l!2...

Elg!!Q~

'lype 3 Co.munication SQanner

IP~'

X3705HAA 7.0.183

(J
f),

~j'

1811 3705 COKIIUNICATIONS CONTROLLER
TUB 3 COlIlIUllICATIONS ~CAllN,.BR Il'ot ~YKl'TOII,
x765

Ox 13

B2B2
B21'2
131.2

TI'80X
TI'1I8X
TBIiOl

..:'!"~")

U

~N~~1C,

1'-550
1'-560

An 1.2 interrupt 11111' expEJcttld troll the transllit linu. \Iithor, tile intorrupt did not
occur (Register X'111' equal zero), or the interrupt vas from the wrong line (Register
X'111' not equal Begister X",').

X765

EaROR CARD

I'EALD

I'ETIIII

~Qa~

~Q~IIQ!

~AgE!Q&

E!gEBQ~

OX 111

E2B2
B2C2
B282
B3J2

Tl'81I
T1'60X
Tl'II2X
n22X

1'-410
1'-420

The transmit line SOl' sllould contain X'0120'.
Register X'15', (bits 0.6-1.7).
ERROR CABO

X765

FEAtO

£gal

~~AUQlt

iAlil:1!!h.

OX15

B2E2
B2B2
B2K2
B2R2
1!2ol2

Tl'aOI
T1'a1X
TP441
TP32X
T1'50X

ThO incorrect SOl' data is contained in

FETIII!
E!UliQ~

1'-570
1'-580
1'-590

The PCl'/EPC1' shouLd be 9/4 with sequence bit 13.0 off.
transition 60.

Befer to BSC Transmit state

Register X'1S' contains the incorrect PCl' (bits 0.0-0.3), EPCI' (bits 0.4-0.7), sequence
bit (bit 1.0).
PBALD

PET 1111

~a~

LQ~A~IQ!!

U2l

be 7/4 with sequence bit 13.0 on.

Befer to BSC ReceiYe state transition 531

Register x'15' contains the incorrect PCP (bits 0.0-0.,3). EPcr (bits 0.,.-0.1). se'iluence bit (bit
1.01·
EBBoa CARD

PEUD

UTIIII

£!!DI liDllW!!! UlUI!S!.. UlU!!!a.
X76C

OX1'

22B2
22112
2222
2282
22J2

TP8U
TPIIIIX
u80X
'fF321
'fPSOX

r-570
p-580
1'-590

The PCl'/EPCr should be 1/B with seguence bit 13.0 on.

Refer to BSC Receive state transition 63.

Begister X'15' contains the incorrect pcr (bits 0.0-0.3), BPcr (bits 0.4-0.7), se'iluence bit (bit
1.0).
ERROR CUD

l/

·7.1.28 13705811

T~pe

3 COB.unication Scanner lPT

o
o

o
o

IBK 3705 CO""UNICATIONS CONTROLLER
TIP8 3 COIIO.ICATIOR' SCAHNER 1FT SYftPTOft INDEX
X779

OX 211

o
o
o

E2E2
82p2
82B2
82K2
E2R2
82J2

Tr801
TP82X
TP81X
U/l1IX
TP321
U50X

D99-37 058-09

F-570
F-580
P-590

The PCF/EPCF should he 9/6 with seguence bit 13.0 on.

and 38.

Refer to BSC Trans_it state transition 18

Register 1'15' contains the incorrect PCF (bits 0.0-0.31. EPCF (bits 0./1-0.71. seguence bit (bit
1.01·
ERROR CARD

l'I!ALD

FETU

k2!1§ L.9£aUlU! UlilUl.9_ fAIi!.l!!L
1719

0125

o
o
o

E2H2
E2B2
E2E2
E2F2
11202

Tl'221
Tr81X
Tr801
Tl'1I81
TUIIX

F-1S0
F-210
F-240

The status posted in the trans.it line lCW was expected to be 1'0032'.
The status bits in error are in Register 1'15'4
Reg X't5'
Bits
0.0
0.1
0.2
0.3
0.11
0.5
0.6
0.7
1.0-1·7
ERROR CUD

Description

ICII
8its

Abort Detect
0.0
For_at Exception
14.1
Char OverlOnder run
0.2
Data Check
14.3
BSC bad PAD flag
1/1.11
EOII
0.5
Leading DLE Error
14.6
Length Check
14.7
15.0-7
ICII byte 15
PElLD

FETIIII

TF801
Tl'81X

F-570
F-580
F-600

k2!11 1&G!UQ!!' U!ill!!'Q_ U§!!!.Q_

o
o
o
o
o
o
o
o

1779

0126

82E2
82B2
E212
E2B2
E2J2

'fPllqx

TP321
tr50X

The PCF/EPCF should be 9/2 with seguence bit 13.0 off.
(forced state).

Refer to BSC Trans_it state transition

Register 1'15' contains the incorrect PCF (bits 0.0-0.31. EPCP (bits 0.11-0.71. sequence bit (bit
1.0) •
ERBOR CABD

PEUD

PETltft

k2!2§ I.Q!;:!U2!!. U!ill!!.!L UJill!!'Q_
1779

0127

l!2J2
l!2B2
E2K2
82B2

TP501
TF81X
' TP/l41
Tr32X

F-580
F-600

The PCF/EPCF should be 9/l with seguence bit 13.0 undefined.
transition 69.

R':lfer to BSC Transdt state

Register 1'15' contains the incorrect PCP (bits 0.0-0.31. EPCF (bits 0.11-0.71. sequence bit (bit
1.0) •

X779

ERBOR CABO

I.Q!;:!UQ!!'

PEAt 0

k2!1§

f!!ill!!.,Q_ niH!L

PET II II

0128

E3K2
l!3L2
E3Q2
ElD2

TE24X
TEIIOX
TE521

F-360

TB34X

NOTE •••• If the High Speed Scanner Feature (230K~1 is installed:
£382 {TE3511 is also a possible failing card~

Type 3 Co •• unicat1on Scanner 1FT

X370511U 7.1.29

IB" 3705 CO"~U"ICATIONS CONTROLLER
TYPE 3 CO~MONICATIONS SCANNBR 1FT SYMPTOM INDEX

P99-370S£-09

An BNQ should have been decoded during a cycle steal fetch operation.
The expected results are: ICi bit
valid) off.

1779

ERROR CABD

PEUD

!:!1I1§ J&!:U12!

'u'!alHL U!Ullt!L

OX29

TF80X
n01l
TF441
TF32X
USOX

E2E2
82B2
E2K2
82R2
82J2

6.~

(end character decoded) on and ICi bit 6.5 (cycle steal

FETft"

(,: ~ 'tl-"

F-S70
F-S80
F-S90

The PCF/EPCF should be 9/4 with sequence bit 13.0 off.

',~j

Refer to BSC Trans.it state transition 70.

Register X'1S' contains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0.4-0.7), sequence bit (bit
1.0).
ERROR CARD

UALD

FET!II

82B2
82Q2
82P2

TF81X
TFJ4X
TF82X

F-210

!

,

, .., .u........." "' ..... '.

0
0
0
0
0
0
0
0
0
0

,~ ,.'~''''

IBft 3105 COftftD.leATIOHs COH!RO~LEB
TYPE 3 COftftDN1C1TIOHS SCARRBR 1FT SYftPTOft INPEX
ERROR CARD

X11A

~Qi

~Q~AlIQI

fAgjlQ_ fag!!Q_

PEALD

rET!!

ox 23

B2E2
E2102
B3L2

UOOX
'rPIiOX
TEIIOI

P-560

An unexpected L2 interrupt occurred.
ERRoa CABO
1771

FEltD

PETIII!

UOOX
U821
TP811
Trll4X
TF32X
tr501

P-570

~!l!

l.Q9nQ! UgUJL Ug}IJL

ox 211

B2E2
E2P2
E282
E2K2
E2R2
B2J2

P99-3105E-09

ICI bit 0.4 sbould have been set on.

P-580
r-590

The PCF/BPCP should be 9/6 with sequence bit 13.0 off.
and 56.

Refer to BSC Transmit state transition 10

Register X'15' contains the incorrect pcr (bits 0.0-0.3), EPcr (bits 0.4-0.7), sequence bit (bit
'.0) •

X17A

ERROR CARD
~!li ItQWI21

FEAt 0
PETIIII
U§!l!Q_ fA.W!2-

0125

TF221
TP8l1
TPaOI
'fPflBI
,TPlIIX

0

!lbe status bits in error are in Register X'15'.

,

Reg X'15'
Bits

;

o
o
o
o
o

F-150
P-210
P-2110

The status posted in the transmit line ICW was expected to be X'00l2'.

'"

0
0
0

E2112
E2B2
B2E2
E2F2
8202

0.0
0.1
0.2
O.l
0.11

0.5
0.6
0.7
1.0-1.1
ERROR CARD

I77A

Description

ICW
Bits

Abort Detect
0.0
rormat Exception
111. 1
Char Over/Under run
0.2
Data' Cbeck
14. 1
8SC bad PAD flag
111. If
EOft
0.5
Leading OLE Error
111.6
Lengtb Check
llf.1
ICII bl'te 15
15.0-1
FElt 0

rETftll

~!l!

LQ~!nQ!

U!i!!Q_ U!i!l!2-

0126

E2E2
E282
E2K2
82R2
B2']2

TrOOX
TF81X
TF441
TF321
TP501

r-510
r-580
F-600

Tbe PCF/8PC1O should be 9/2 with sequ&nce bit 13.0 off.
(forced statel.

Refer to 8SC Trans.it state transition

Register 1'15' contains the incorrect pcr (bits 0.0-0.3), EPCF (bits 0.1f-0.1), sequence bit (bit
1. D).

ERROR CUD
I11A

FEUD

l'ET II II

U50X
TP!jU
TPIlIfX
'lF32X

F-580
1'-60Q

~!l!

l.Q9UQI fAg}!HL Ug!l2-

0121

82J2
82B2
1!2K2
B282

Tbe PCF/BPCF should be 9/3 witb sequence bit 13.0
transition 69.

Type 3 Co.munication Scanner 1FT

undefined~

Refer to BSC Transmit state

X3105HU 1.1.35

IQK 3705 CO""UNICATIQ"S CONTRQLLER
TYPE 3 COKKUNICATIONS SCANNER 1fT SYMfTOK

p99-H05E-09

INPE~

Reqister X'15' contains the incorrect l'C1' (bits O. 0- 0.3), EPCF (bi ts 0.4-0.7), sequence bit (bit
'.0) •
ERROll CARD
X11A

FEUD

l'ETH"

TB24X

f-360

~QI!§

I.2~AnQ.!I

.2A!illi!L UlllHiQ_

0128

B3K2
1l3L2
83Q2
l!302

TIl 4 0 I
TIl 52 X
TIl3U

NOTE •••• If the Hiqh Speed Scanner Feature (230KB) is installed:
1l3H2 (TE351) is also a possible failing card.
An ENQ should have been decoded durinq a cycle steal fetch operation.
The expected results are: ICW bit 6.4 (end character decoded) on and lCW bit 6.5 (cycle steal
valid) off.
ERROR CARD
177A

FEALD

1'ETH"

~a§

tQ~!1!Q.!I

fA!l!.!I2_ fA!l§.!I2-

OX29

E2E2
E2B2
l!2K2
E2112
l!2J2

TF80I
TF811
'1;1'44 X
TP321
TF501

F-570
1'-580
1'-590

The PCF/EPCF should be 9/4 with sequence bit 13.0 off.

Befer to esc Transmit state transition 70.

Register 1'15' contains the incorrect PCF (bits 0.0-0.3). EPC1' (bits 0.4-0.7). sequence bit (bit
'.0).
ERROR CARD
X17A

PEAt 0

FET!!M

~!Hl

tQ~AUQ.!i

l!A!l!.!iQ_ fAlill.!l2-

OX30

l!2B2
E2Q2
l!2P2

TF81lC
Tl'lU
TF82X

1'-210

ICW bit 5.4 (transparent mode) ShOUld have been set on.

I77A

ERROR CARD

FEALO

~I!§

t2~A!!Q.!I

~A!l!.!IQ_

fA!l!.!IQ_

FET""

OX31

E2N2
ElK2
l!2J?2
E3D2

TF221
TE2U
T1'82X
TE34X

1'-230

NOTE •••• If the High Speed Scanner Feature (230KB) is installed:
E3N2 (TE35I) is also a possible failing card.
lCW bit 6.5 (cycle steal valid) should have been set on.

I77A

ERROR CARD

PEALO

FETHH

~Qn

I.Q~AnQ.!i

~A!lll.!lQ_

~A!l!.!IQ_

OX33

l!2E2
B2B2
l!2l12
E2J2

TP80X
TF81X
TF42X
TF50X

1'-410
1'-420

A transmit· tag was not detected. Either lCW bit 3.2 (tag bit) did not turn on after being turned
off or i t did not turn off (SOF Shifting).
\~

ERROR CARD
X77A

PEALO

~I!§

tQ~A!!Q.!i

EAlill.!lQ_

OX34

E2E2
E2B2
E2K2
E2R2
E2J2

TFaOI
TF81I
TF441
T1'321[
TF50X

PETM!!
f~lillnQ_

F-570
1'-580
1'-590

The PCP/EPCP should be 9/4 with sequence bit 13.0 off.

7.1.36 X370511AA

Refer to esc Transmit state transition 60.

Type 3 communication Scanner 1FT

,/

"L"

_h....,o.L....._~~"

0

0
0
0
0
0
0
0
0
0

IBK 3705 COK"QRICA~IONS COH~ROLLIR
TtPI 3 COKKUHICA~IOHS SCAHNIB IF~ SYKP~OK INOIl

099-31051-09

Register 1'15' contains the incorrect PCP (bits 0.0-0.31, IPCP (bits 0.11-0.7), seguence bit (bit
1. a) •
BRROR CABO

FEUD

PETKII

TP22X
U81l
Tr801

F-150
F-210
F-2110

!:!l1!1 }.!!!:AUlU! UU!!!!_ lAill!!l1711

OX35

12112

12B2
1!21!2
1!2P2
1!2Q2

~PII8X

U341

~he

status

~he

status bits in error are in Register X'15'.

Beg X'15'
Bits
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1.0-1.1
ERROR CARD

s;g1!1 L!!!:!%12!
X77A

0136

0

DeSCription

ICY
Bits

Abo rt Oet ect
0.0
Ponat 1!xception
111.1
Char oyer/Under run
0.2
1/j.3
Datil Cbeck
BSC bad PlO flag
111.11
10K
0.5
Leading OLI 1!rror
111.6
Length Cbeck
111.7
ICI byte 15
15.0-7
F1!AtD

FE~IIII

~!U!!g_

i!U!!2-

U80X
Tr81I
UIIIII
Tl'32I
U50X

F-570
F-580
F-590

Befer to SSC Transsit state transition 60,

Register 1'15' contains the incorrect pcp (bits 0.0-0.3), IPCP (bits
1.0) •

e

e
e
e

in tbe transsit line ICY was expected to be X'OOIl8'.

The PCF/EPCP sbould be 9/6 witb seguence bit 13.0 on.
60, 67, 61, and 33.

'I

0
0

1!21!2
1!2B2
12K2
1!2R2
12.12

poste~

IRROB CARD

FIALD

FETIIII

OX 37

U80X
TP81X
U""X
U321
U501

F-570
F-580
F-590

0.1I~0.7),

sequence bit (bit

s;g1!1 }.!!SAII!l! iA§J!!!_ iAil!Q_
1771

1!212
12s2
12K2
12R2
1!2.12

Tbe PCP/IPCF should be 9/11 with sequence bit 11.0 off.

Refer to BSC Transsit state transition 311.

Register X'15' contains the incorrect PCP (bits 0.0-0.3), IPCP (bits 0.1I~0.71. seguence bit (bit
1.0).
177B

BSC Transsit - IP - IBCDIC

LCD=/I

routine sets up a transsit ICN and tran,sits a string of characters witbout using the cycle steal
secbaniss. ~he characters in the data streas are arranged to cause specific state transitions and
status bit postibg. The state transitions and status posting is verified for correct operation.
Receive functions are not used in this routine (transsit only). Cycle steal is not used. Diag 0=1
(scanner wrap) used for transsit line.

~his

ERROR CABO

PElLD

FETIlII

OX01

TE20X
TP62X
TF501
!E261

P-220
F-550

s;g1!1 J.2£!U2! Uil!!!_ Ulil.!UL

0

177B

e
e
e

Type 3 Cos.unication Scanner IPT

1!3F2
1!2D2
B2.12
B3R2

X3705HAA 7.1.37

:J:lllI 3105 COIIMUUCATlONS CON'fROLLER
TYPE 3 COMMUNICATIONS SCANNER 1FT SYMPTOM INDEX

P99-J705~··O~

A set mode interrupt fdiied on the transmit 11ne (address in Register X'll'l.

Display Register

X'15' to determina the cause of the error.

Beg X'15'
0001
0002
0003
ERROR CARD
XnB

Description
NO set mode L2 occurred.
Interrupt from wrong line - Reg X'14'
not equal to Reg X'll'.
Feedback check error.

I'ElLD

FETKII

Ql!!! J.Q£!I!21i

U!illliQ_ U!!J:li2_

0102

TI'80X
'1.'1'811

1'-570
1'-580
1'-600

E2E2
112B2
E2K2
E2R2
1!2J2

TF44X

TF321
'1.'1'501

1'hll l'CI" l~l'CI' .houU bu '1/2 with
2, 3, 4 lind 5.

IHHluOIICIl

bit. 1:1.0 ofr.

1I"!'I\: to IlX 'l'[nuuIIIH IIlntll tl BIluit1IJU 1,

Register X'lS' contains the incorrect PCI' (bits 0.0-0.3), EPCP (bits 0.4-0.7), sequence bit
(bi t 1.0).
ERROR CARD
X71B

I'EAtD

FETIIII

TI'80X
TF811
TF441
'1.'1'321
Tl'50X

1'-570
1'-580
1'-590

£Q!l!

L.Q£hUQli f!!i!lliQ_ f!!l]!lQ_

OX03

132E2
1!2B2
E2K2
E2R2
E2J2
The

PCF/E~CF

should be 9/4 with sequence bit 13.0 off.

Refer to esc Transmit state tcansition 72.

Register X';15' contains the 'incorrect PCP (bits 0.0-0 .• 3), EPCF (bits 0.4-0.7). sequence bit
(bit 1.0) •

X77B

ERROR CARD

FEALD

Ql!l~

!Q~!!lQli

fhgf;lifL fhli]!lL

OX04

E2M2

TF22X
'!'F8a

112B2
E2112

E2F2
E202
E2P2

ueox

FETIII1
1'-150
1'-210
1'-240

TF4aX
TF311X
TF82X

The status posted in the transmit line ICW was expected to

be

X'0060'.

The status bits in error are in Register X'15'.
Reg X'15'
Bits
0.0
0.1
0.2
0.3
0.4

0.5
0.6
0.7
1.0-1.7
ERROR CARD
X77B

Descript10n

ICW
Bits

Abort Det eet
0.0
Format Exception
14. 1
Char Over/Under run
0.2
Data Check
14.3
BSC bad paD flag
14.4
EOM
0.5
Leading DLE Error
14.6
Length Check
14.7
rCi byte 15
15.0-7
FEALD

FETMM

£Q!!~

LQ£!UQ!l

!!!gf;!iQ_ f!!lll!lQ_

OX05

E2E2
E2B2
E2K2
112R2
E2J2

'f1'80X
T1'81X
T1'4 11X

1'-570
1'-580

1'-590

'XI' 32 X
TF'iOX

The PCF/EPC1' should be 9/11 with sequence bit 13.0 off. Tke program forced statn 9/2, 13.0 off
prior to this test. Rafer to esc Transmit stAte transit10n 72.

7.1.38 X3705I1H

Type 3 COIDIDun1cation Scannel lrT

o
o
o
o
o
o
o
o
o

1811 3105 CO~KUNIC1~IONS CONTROLLER
TYPB 3 COKIIUHICATIOHS SCARHBR 1FT SY.PTO" INDEX

Register X'15' contains the incorrect PCP (bits 0.0-0.3), BPCP (bits O.Q-O.l), sequence bit
Ibit 1.0).
ERROB CABD
X77s

PEUD

PET""

~I!!

Joggn!!! UW5L UWll-

OX06

82112
1!282
82E2
82P2
B2Q2

TI"221
!P8n
Tr801
TF481
TFlU

P-150
P-210
P-2110

The status posted in the trans.it line ICW was expect.d to be X'0020'.
The status bits in error are in Register X'1S'.
Beg X'1S'
Bits
0.0
0.1
0.2
0.3
0.1l

0.5
0.6
0.1
1.0-1.7

o

ElllIOR CARD
£!!Il! I.2WI2!
InB

0101

82B2
B2L2
B2P2

Description

ICI
Bits

Abort Detect
0.0
Porlat Bxception
'4.1
Char Over/onder run
0.2
Data Check
111.3
BSC bad PlD flag
111. II
BOil
0.5
Leading DL8 Error
111.6
Length Check
14.1
ICI byte 15
15.0-1
PEALD

PET""

TP811
TPII61
TP821

P-230

U!!E!l5!_ !!Wl!ll-

The BCC field of the translit ICW should have been reset
EIlIlOR CABO
£!!I!! LQ!:AIIQ!

o
o
o
o
o
o

177B

o

xns

o

D99-l-705E-09

0108

82J2
B2B2
B2K2
B2B2

PEALD

FETKII

TP501
TP8U
Tr411X
TU21

F-580
P-600

~o

X'OOOO'.

fA!!!!!!- 1!!!!!Q_

The PCP/EPCF should be 9/3 with sequence bit 13.0 undefined. The prograa forced state 9/2, 13.0
off prior to this test. Refer to 8SC Translit state transition 69.
Register 1'15' contains the incorrect PCP (bits 0.0-0.3), BPCP (bits 0.11-0.1), sequence bit (bit
1. 0).

ERROR CAIID
177B

PEUD

PET II II

TP801
TF8U
TP441
TP321
TPSOI

F-570
P-S80
F-600

~I!!i

I.QruIQ! U!!!!l5!_ l!!!!!!!!-

0109

E2E2
E2B2
E2K2
82R2
B2J2

The PCF/EPCI" should be 9/2 with sequence bit 13.0 off.

Refer to BSC

~ransait

state transition 14.

Register 1'15' contains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0.4-0.1), sequence bit (bit
1. 0) •

ERBOR CARD

PEUD

PETIIII

£QI!! IoQSUIQ! E!!i!!!l_

!!~J!5L

0101

1'-150
P-210
P-2110

B2N2
8282
E2E2
B2P2
E2Q2
82K2

TF221
TP8U
Tr801
nllel
TFl4I
n411X

The status posted in the trans.it line lCW was expected to be X'oooc'.

Type 3 COI.unication Scanner 1FT

X3705HAA 7.1.39

IBN 3705 COHHUNlCA7 JUS CONTROLLER
trPB 3 COHftUNlCATIONS SCANNER 1FT SYHPTOft INDEX

D99-3705E-09

Tne status bits in error are in Register X'15'.
8egX'15'
Bits
0.0

O. 1
0.2
0.3
0.4
O.S
0.6
0.7
1.0-1.7

ERRoa CAOD

Ina

Description

Abort Detect
0.0
Format Fxception
14. 1
Char Over/Under run
O~ 2
Data Check
14.3
BSC bad PAD fld~
14.4
EOH
0.5
Leading OLE Error
14.6
Length cl1eck
14.7
lCIi byte 15
15.0-7

!;QU loQ£UIQIi

l'EAL.D

FETH!!

UID;~!L

U!iJl!2-

OXOB

TF50x
UBn
TF411X
TF32X

F-5BO
F-600

E2J2
E2B2
E2K2
E2R2

lCN
Bits

The PCP/EPCP should be 9/3 with sequence bit 13.0 undefined. The program forced state 9/2, 13.0
off prior to this test. Refer to esc Transmit state transition 69.
Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.11-0.7), seguence hit (bit
1. O)~

ERROR CARD
X718

!;QI!§ l.Q!;AUQIi

fA!i§liQ_ fA§lliQ_

PEUD

PETti"

OXOC

Treox
TPS1X
TFIIIIX
TF32X
TF50X

P-570
F-580
P-600

E2E2
E282
E2K2
E2R2
E2J2

The PCF/EPCF should be 9/2 with sequence bit 13.0 off.

Refer to BSC Trans_it state transition 74.

Register X'15' contains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0.4-0.7), seguence bit (bit
'.0) •

ERROR CARD
X77B

FEALD

PETIIM

TP22l[
TF81X
!P80l[
TF4aX
TF34X

F-150
1'-210
F-240

£Q!l§

l.Q£AIIQ!! UID;!!Q_ fMili!!2_

OXOD

E2M2
E2B2
E2E2
E2F2
E2Q2

The status posted in the transmit line lew was expected to be X'OOlC'.
The status bits in error are in Register X'15'.
Reg X'15'
Bits
0.0
0.1
0.2

0.3
0.4
0.5
0.6
0.7
1.0-1.7
ERROR CARD
I77a

Description

Abort Detect
0.0
Format Exception
14. 1
Char Over/Under run
0.2
Data Check
111. )
Bse bad PAD flag
111.4
EOII
0.5
Leading DLE Error
111.6
Length Check
14.7
lCW byte 15
15.0-7
PEALD

f'ETIII!

TPaox

F-570
1'-580
1'-600

£Q!l§

l.Q£!IlQ!l. ngUQ_ fMiJ;;!!Q_

OXOE

E2E2
E2B2
E2K2
E2R2
B2J2

7.1.40 X370511AA

lCW
Bits

nsa

TFIIIIX
TF32X
TF50X

Type 3 Communication Scanner 1FT

o
o
o

IB" 3105 CO"nUHICATtOHS CORTROLLEB
TYPE 3 COnnU"ICATtOftS SClNHEB IF! SYKPTOft lPDPI

The PCF/BPCF should be 9/2 vitb seguence bit 13.0 off. The prograa forced state 9/3, 13.0 off
prior to tbis test. Befer to BSC Translit state transition 7••

o

o
o

099-37 05E-09

Register X'15' contains the incorrect pcr (bits 0.0-0.3), EPcr (bits 0.4-0.7), seguence bit (bit
1.0).
ERROB CABD
Ins

PEUD

FET II II

~RI

lo!!gIl!H!

1A§J1I!!_ RAUl!!.

olor

B2H2
E2B2
E2E2
B2r2
B202

rr221
!PB1X
TrBOI
TPQ81
TPllll

o
o

r-150
F-210
'-240

The status posted in the traDs.it line ICI vas expected to be X'OOlE'.
The status bits in error are in Register 1'15'.
Beg X'15 1
Bits
0.0
0.1
0.2
0.3
0.11
0.5
0.6
0.7
1.0-1·1

o
o

BBBOB CARD
X77B

Description

ICII
Bits

Abort Detect
0.0
PorBat Exception
lq~ 1
Char Over/Under rup
0.2
i
Data Check
111.3
BSC bad PAD flag
111. II
Bon
0.5
Leading DLB Brror
111.6
Length l:heck
14 .• 7
ICI byte 15
15.0-7
FEALD

FETIIII

Tr801
TrBU

F-570
F-5BO
F-600

~RI

I,!lgn!!l1 i!liU9_ 'u!iJ!!!_

ox 10

E2B2
B2B2
E2lt2
E2B2
B2J2

TP4111

TU21
Tr501

The PCP/BPCF should be 9/2 with seguence bit 13.0 off. The progra. forced state 9/3, 13.0 off
prior to this test. Befer to BSC TraDssit state transition 7 4 . ·
•

c

o
o
o
o
o

Register 1'15' contains the incorrect PCF (bits 0.0-0.31, Ercr Cbits 0.4-0.71, seguence bit (bit
1. D) •

xnB

FEALD

FETIIII

E2H2
B2B2
B2B2
B2P2
B202

!P22X
TP811
UBOX

F-150
'-210
F-2110

OX11

ullex

!F3U

The status posted in the traDs.it line ICI was expected to be X'0011'.
The status bits in error are in Register X'15'.
Reg X'15'
Bits

Description

ICII
Bits

0,.0
Abort Detect
0.0
Farlat Bxception
111. 1
0.'
0.2
0.2
Char over/Onder rUD
14. 1
0.3
Data Check
,4.4
0.11
BSC bad PAD flag
0.5
Ball
0.5
0.6
Leading DLB Error
14.6
0.7
Length Check
111.7
15.0-7
1.0-,.7 ICII byte 15

o

o

ERROR CnD

£nal LSlkAIl!!J! f!!iJISl_ R&§l!l!!L

ERROR CABO
InB

FElLD

rET1I1!

Tr801
Tr811

r-570
F-580

~ag

L!llOAlI!lll UIi.l!!l!l_ E!liU!!,

0112

B2B2
B2B2

Type 3 COllunicatioD Scanner ;rr

X3705HU 7.1.111

tall 370S COHHUNICATIONS CONTROLLER
TYPE 3 COMMUNICATIONS SCANNER 1fT SY"PTOK INDEX

E2K2
E2R2
E2J2

TF441
U32I

,( t

l'-600

",j

USO~

The PCF/EPCP should be 9/2 with sequence bit 13.0 off. The program forced state 9/3, 13.0 off
prior to this test. Refer to BSC Transmit state transition 74.
Register 1'15' contains the incorrect PCP
1. 0) ~

177B

ERROR CARD
s;Q!!~
J.Q9UQ!!

PEUD
EA[il;!!,Q_

FETHH
Uln,!!Q_

0113

TP22I
TF81X
TFeOI
TF481
TP341
U82I

l'-150
F-210
l'-240

E2N2
E2B2
E2E2
E2l'2
E2Q2
B2P2

(~its

0.0-0.3), EPCF (bits 0.4-0.7), sequence bit (bit

.,

v

The status posted in the trans.it line lCW was expected to be l'009C'.
The status bits in error are in Register X '15'.
Beg X'15'
Bits
0.0
0.1
0.2
0.3
0.4
O.S
0.6
0.7
1.0-1·7
EBROB CABO

Description

lCIi
Bits

Abort Detect
0.0
Format Exc;eption
U.l
Char Over/Under run
0.2
Data Check
14.3
BSC bad PAD flag
14.4
EOII
0.5
Leading DLE Error
14.6
Length Check
14.1
lCIl byte 15
1S.0-7
FEUD

FETH!!

!<2.U IoQ!;AU21i fA1U;li!l_ Ulill!!!l_
I11B

OX 14

E2E2
B2B2
B2K2
l!2B2
E2J2

U801
Uel1
TF44r
TF32X
TPSOI

F-570
l'-SeO
1'-590

The PC1'/EPC1' should be 9/4 with sequence bit 13.0 on. The progrn forced state 9/4,13.0 off
piror to this test. Befer to BSC Transmit state transition 25 and 52.
Register X'lS' contains the incorrect PCl' (bits
1.0) •
ERROR CABO
LQCATIQ!!

FEUD
EAl!1;!!lL

FETHlI
EAlilll!lL

OX 11

USOX

1'-510
1'-560
1'-590

s;Q!!~

X71B

E2B2
E2B2
B2K2
B2R2
B2J2

na1X

TP44X
n32!
TF50X

0~0-0.3),

EPCF (bits 0.4-0.7), sequence bit (bit

The PCF/EPCF should be 9/5 with sequence bit 13.0 off. Befer to BSC Transmit state transition 14.
Looks tor: sta te 9/&1 vi th sequence bit off, state '41 i f RPQ EII4100 i natlllied.
Register 1'15' contains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0.4-0.11, sequence bit (bit
1. a).

7.1.42 X3705t1AA

Type 3 Communication Scanner 1FT

it
"
~.

~

o
o

o
o
o
o
o

IBM 3705 COMMUNICATIONS CONTROLLED

TYPB 3

COBBOHIC~fIONS SC~ ••••

ulloa CARD

~QI

¥77U

un
un
un
un

11202

PET""

.,,821

'Iun

",1111
"'11111
",41J1

,·,50

'-Z10

,-2411

'InfIX

THIS STOP SHOULD HOT OCCUR IF BPQ EBII100 IS INSTALLBD.
Tbe status posted in tbe transmit line ICI was expected to be 1'0006'.
Tbe status bits in error are in Register 1'15'.
Deg 1'15'
Bits
0.0
0.1
0.2
0.3
0.11
0.5
0.6
0.7
1.0-1.7

o
o

ERROR ClRD
177B

o

D99-37058-09

J,QIiUlQI UIlJlQ. 16l1J11g.

ox 10 12'2

o

o
o

nUD

IFf SIBPTOB INDEX

Description

ICI
Bits

Abort Detect
0.0
Format Exception
111.1
Char Over/Under run
0.2
Data Cbeck
111.3
BSC bad PAD flag
111./1
EOII
0.5
Leading DLE Brror
111.6
Lengtb Cbeck
111.7
15.0-7
ICII brte 15
PBUD

PETIIII

U801
'rl'81X
TP411X
U321
U501

P-570
P·580
P-590

~~E

J,Q£!I!Q!! U!iI!!Q_ n!i.!!!!!!_

0119

E2.82
12B2
E2K2
E2R2
B2J2

Tbe PCP/8PC~ should be 9/5 witb sequence bit 13.0 off. Tbe program forced state 9/11, 13.0 off
prior to this test. Refer to BSC Transmit state transition 15. Looks for state 9/11 with sequence
bit off, state 151 if RPQ EBlll00 installed.
Register X'15' contains tbe incorrect PCp (bits 0.0-0.3), EPCP (bits 0./1-0.7), sequence bit (bit
1.01·
ERROR CARD
X77B

PEUD

PBTIIII

U221
U81X
TP801
nll8X
TPl'll

P-150
P-210
p-2110

£2~.!l

I&£UIQ!! n!il!!Q. Ug.!!!!Q.

0111

82M2
B2B2
E212
E2P2
82Q2

o
o

The status posted in tbe transmit line ICI vas expected to be 1'0006'.
'J:be status bits in en-or are in Register 1'15'.
Beg X'15'
Bits
0.• 0
0.• 1
0.2
O.l
0.11
(l.5
0.6
0.7
1.0-1-7

o
o

ERROR CARD
XnB

Description

XCI
Bits

Abort Detect
0.0
FOtmat Exception
111.1
Char over/Under run
0.2
Data Check
111.3
BSC bad PAD flag
111.11
EOII
0.5
Leading DLE Error
111.6
Lengtb check
111.7
ICII byte 15
15.0-7
PEUD

PETIII!

n80X
TF81'X
nllu
TFl21
U50X

1'-570
1'-580
P·590

£Q~

J,Q£lnQ!! nU!!Q. U!il!!!Q.

OX lB

E2E:1
E2B2
E2K2
E282
B2J2

Type 3 co ••unication Scanner 1FT

X370SHAA 7.1.113

'U1·~.
l,'

IS" 3705 COM~UN1CATI0NS CONTROLLER
TYPE 3 COH~UNICATIONS S~ANNER 1FT SIMrTOM INDEX

',j

D9'J-j10SI~-09

The PCf/EPCr should be 9/4 with sequence bit 13.0 on. The program forced state 9/4, 13.0 off
prior to this test. Refer to esc Transmit state transition 25.
Register X'15' contains thu incorrect PCP (bits 0.0-0.3), EPcr (b1ts 0.4-0.1), sequence bit (bit
,. D) •

ERROR naD
X778

FEUD

FETMM

~l!~

l,Ql:;1.UQ!i

R~!i];liQ_

.f~§];liQ_

OX1C

E2E2
E262
E2K2
E2R2

TPSOX
TF811
TI'44X
TF32X
TF50X

.'-570
P-5S0
F-590

E2,J2

The PCP/EPCF should be 9/5 with sequence bit 13.0 off.

Ruter to SSC Transmit stdte transition 11.

Req1ster X'15' contains tbe 1ncorrect PCF (bits 0.0-0.3), EPCF (bits 0.4-0.1), seyuence bit (bIt
1. 0) •

X71B

ERROR CARD

PEUD

FETMM

l:;QQ~

LQl:;~!!Q!i

fMi.!lliQ_

f~gliQ_

OX 10

B2N2
E282
E2E2
12F2
E202

TFnX
Tl'81X
TFSOX
TF46X
TF34X

F-150
F- 21 a
F·-240

The stdtus posted in the transmit line ICW was expected to be X'OO14'.
The sta tus bits in error are in Register X'lS'.
Reg X' 1S'
aits
0.0
0.1

0.2
0.3
0.11
0.5
0.6
0.7
1.0-1.7

1718

Description

Bits

Allort Detect
Format Exception
Char Over/Under run
Dato. Check
SSC bad PAD flag
EOII

Leading OLE Error
Length Check
lCW byte 15

ERROR

CARD

FEALD

~l!!l

1Ql:;AUQ!i

fAQEliQ_

fAllE]Q_

OX1E

E2E2
E2B2

TF'80X
TF8U
TF44X
TF32lC
TP50X

}'-570
F-580
F-590

1l2K2

E2R2
E2J2

ICI!
0.0
14. 1

0.2
111.3

14.11
0.5
14.6
14.7
15.0-7

FET!!II

Tbe PCF/EFCI' should be 9/5 with sequence bit 13.0 otf. The program torced state 9/4, 13_0 oft
prior to this t~st. Refer to esc Transmit state transition 16.
Register X'15' contains the incorrect PCI' (bits 0.0-0.3), EPCF (bits 0.4-0. 1 ). sequence bit (bit
1.0) •

X776

eRROR

CARD

HALO

F'f:TMII

l:;Ql!!l

L.!2l:;~!1Q!i

ft&!llilL

EAQ.E!!Q_

ox 11'

E2N2
E2B2
E2E2

TI'22X
T1'61X

1'-150
}'- 21 0

TF80X

F'-240

!l2F2

TF48X
TP34X

E2Q2

The status posten 1n the transmit line lCW was expected to be X'0012'.
The status bits in error ate in Register X'15'.
Reg X'15'
Bits
0.0

7.1.44 X370511AA

Oesc~iption

Abort Detect

rCI!
Bits
0.0

Type 3 Communication Scanner 1FT

t
..ij;.

1
.;t

't

o
o
o
o
o
o
o
o
o
o

1811 3705 COIIIIUNICATIONS CONTROLLER
TTPB 3 CO"NQNICATIOHS SCANNER 1FT SY.PTON JUDEX

D99-37058-09

)

O. 1

0.2
0.3
0.11
0.5
0.6
0.7
1. 0-1.7
EIIROR CARD
X778

Format Exception
III. 1
Char over/under run
0.2
Data Check
8SC bad PAD flag
14. "
BOil
0.5
Leading DLB Brror
14.6
Lengtb Cbeck
111.7
ICI byte 15
15.0-7

'''.3

~U

J,QWIQli

FEUD
UIi!lequence bit
(bit 1.01.

X77U

ERROR CARD
£2 Ill:: !:Q£!U!l!l.

U!UI!!2_

t'ETH!!
E!flll!iiL

OX26

TF80X.

F-~70

E2E2

FEAtD

E2B2

US1X

82((2
8282
B2J2

Tl'1I1IX
TF32X
TF50X

F-580
F-600

The PCF/EPCF should be 9/2 with sequence bit 13.0 off. The program forced stat.t! 9/2. 13.0 off
prior to this test. Refer to BSC transmit state transition 75.
Register Z'15' contains the incorrect pcr (bits 0.0-0.31. EPCF (bits 0.4-0.7). snIJuence bit (bi t
1.0).

'Iype 3 COlnunication Scanner U'T

/

o

o
o
o

IB" 3705 COft"OHICATIOHS COITROLtBR
~YPB

3

CO""U"ICA~IONS

EIROB CABO
177B

fUl!l!lL fA§J!!L

0127

B2112
B2B2
B2B2
B2P2
E2Q2

'lF221
fr811
'lF801
TF4ex
'lF341

F-150
F-210
P-240

The status posted in the trans.it line ICI was expected to be 1'0098'_
The status bits in error are in Register 1'15'.
Reg 1'15'
Bits
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1.0-'.7
ERBOR ClBO
xnB

fl·

Description

ICI
Bits

Abort Detect
0.0
Por.at Bxception
14.1
Char over/Onder run
0.2
Data Check
14.3
BSC bad PiO flag
111.4
BOft
0.5
Leading OLE Brror
14.6
Length Check
14.7
ICI byte 15
15.0-7
PULO

FETIlII

91111

l!Q~nQ!!.

U§J!S!_ U!Ul!!L

0128

E2B2
B2B2
B2K2
1I2R2
B2J2

U80X
U81X
U4U
TF321
U50X

F-570
F-580
1'-590

The PCP/EPCF should be 9/7 with sequence bit 13.0 on. Progra. forced state 9/2. 13.0 off prior to
this test. aefer to BSC Trans.it state transition 78.

,c

Register 1'15' coptains the incorrect PCP (bits 0.0-0.31, EPCP (bits
1·°1·

I

I

o
o

FEU II

~!:AUg!

o

o

PEltO

~llII

o
o

o
o
o

SClNHBa IFT SY"PTOft INDIX

ERROR CABO
9l!Hl !&I;;WQIi
1778

Ox29

E2B2
E2C2
E282
BlJ2

PEAtD
fW!Q_

U.§J!!L

US 11

F-410

TF601
U421
'rB221

EIIROR CABO
9lU I.Q£AI!Q!

FElt 0
Ugjl!!Q_

UT!!I!

0121

U50l
TP81X
n4U
U321

F-580
P-600

E2J2
E282
E2K2
E2R2

sequence bit (bit

FETllft

The trans.it line SOP should contain l'OlPP'.
0.6-1.7).

X77B

0.~-0.7),

The incorrect SOP is in Begister X'15'. (bits

tMiUQ_

The PCP/EPCF should be 9/3 with sequence bit 13.0 underfined. The progra. forces state 9/2. 13.0
off prior to this test. Befer to BSC trans.it state transition 69.

o

Register X'15' contains the incorrect PCP (bits 0.0-0.3). EPCP (bits 0.4-0.7) and sequence bit
(bit 1.0) ••
ERROR CABO

PBAtD

fiT!!!!

0128

UBOI
U81X

F-570
F-580
F-590

I;;QU 1:ll£UIQ! Ugjl!!Q_ fA.§J!!L
xnB

o

B2B2
B2B2
B2K2
B2R2
B2J2

TFIIIIX

U321
U501

The PCP/EPCP should be 9/4 with sequence bit 13.0 off.

Type l Co •• unication Scanner IPT

Refer to BSC Trans.it state transitioD 16.

X3705HAA 1.1.47

11111 3705 COlIl'IUNlCATIONS CONTROLLER
TYPE 3 CO""UNICATIONS SC1NNBR 1FT SYHPTOII INDEX

D99·· 17 05E-09

o

Register X'15' contains the incorrect pcr (bits 0.0-0.3), EPC? (bits 0.4-0.7), sequenco bit (hit
1. a),.

X77B

EBBOR CARD
~U IoQCAUQ!

PEUD
fA!il-240

{;QD! lIQ£AUQ! U!iYQ_ iill!Q_

Inc

01116

B2112
B282
B2B2
B2P2
B2Q2

'lPaOI

TPlial
TP3111

The status posted in the transait line ICV was expected to be

l'O060'~

'the status bits in error are in Register 1'15'.
Reg 1'15'
Bits
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1.C)-1.7

u
o
o·

INDEX

Description

ICI
Bits

Abort Detect
0.0
ror.at Exception
111.1
Char Over/Under run
0.2
Data Check
14.3
14./1
BSC bad fAD flag
0.5
Ball
Leading DLB Brror
111.6
Length Check
1 S. 0-7
ICIl byte 15

'''.7

BRROR CARD

FEUD

PET II II

OX41

TraOI
ua1l
'!P4U

P-570
r-S80
P-S90

{;Q!l! lIQ{;!UQ! UiE!!Q_ U!i!!Q_

Inc

B2B2
R2B2
B2K2
B2R2
R2J2

'!P321
TPSOX

The PCr/EPCr should be 9/4 with sequence bit 13.0 off. The prograa forced state 9/3, 13.0 off
prior to this tes.t. Refer to BSC 'fransait state transition 70.
Register 1'15' contains the incorrect pcr (bits 0.0-0.31. EPcr (bits 0.4-0.71, sequence bit (bit
1. D) •

ERROR CARD

PBALD

I!BTftll

OX48

U8U
TP60X
TP421
''lE221

r-1I10

{;QD! !'Q!;AUQ! Uli1!Q_ Uli1!2Inc

o

R282
12C2
E282
13J2

The trans.it line SDP should contain 1'0102'.
X'15', (bits 0.6-1.7).
flRBOR CARD

Inc

PBALD

102'.611211 UliU2_ iAWIL

014C

12112
B282
R2E2
B2P2
82Q2

'lP8QI

incorrect SDP data is contained in Register

FUll!!

~U

Tl'221
'fP8U

~he

1>-150
P-:-21 0
'':'240

TPII~I

U3111

Type 3 Co •• unication Scanner IPT

13105BU 7.• 1.61

f----ir

",-J
IBK 3705 CO~"UNICATIONS CONTRoLLER
TYPE 3 COK!UHICATIONS SCANNER 1FT SYKPTOK INDEX

D99~37

05E-09

The status posted in the transmit line ICW was expected to be X'0040'.
The status bits in error
Reg X'15'
Bits
0.0

0.1

0.2
0.3
0.11

0.5
0.6
0.7
1.0-1·7
ERROR CARD
I77C

a~e

in Register 1'15'.

Description

ICII
Bits

Abort Detect
0.0
Foreat Exception
14.1
Char Over/Under run
0.2
Data Check
111.3
Bse bad PAD flaq
14.4
EOII
0.5
Leading OLE Error
111.6
Length Check
111.7
ICW byte 15
15,.0-7
FEAt 0

FETKII

£Q1H~

!'Q~!IlQ!!

U!l.!1!Q_ E!!HiJlQ_

OXIID

E2E2
E2B2
E2K2
E2R2
E2J2

TFSOX
'U81X
T1'44X
T1'32X
TFSOl

1'-570
1'-580
F-S90

The PCF/EPCF should be 9/5 with seguence bit 13.0 off.
and 80.

Refer to BSC Transmit state transition 67

Register X'1S' contains the incorrect PCI' (bits 0.0-0.3), EPCF (bits 0.4-0.7), sequence bit (bit
1.0) •
ERROR CARD

xnc

FEAtD

FETIIII

~QQI!

!'Q~!UQ!!

U!iIDiQ_ U!lli!!Q_

OlliE

E2B2
E2C2
E2B2
l!3J2

US1X
TF60l
TF42X
TE22X

1'-410

The transmit line SOl' should contain X'0185'.
X'15', (bits 0.6-1.7).
ERROB CARD
~U

xnc ox Ill'

PEAtD

FET!!!!

TF22X
US1X
T1'SOX
TF481
TF34X

1'-150
F-210
1'-240

The incorrect SDl' dati 1s contained in Register

!.Q5;AUQ!! fA!ili!!Q_ E!!l.!!!Q_
E2N2
E2B2
E2E2
E21'2
E202

The status posted in the transmit line ICW was expected to be X'4006'.
The status bits in error are in Register X'IS'.
Reg X'1S'
Bits
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.1
1.0-1.7
ERROR CARD

Description
Abort Detect
1'Otut Exception
char Over/Under run
Data Check
BSC bad PAD flag
EO~

Leading OLE Error
Length Check
ICM byte 15
PEALO

0.0
14.1
0.2
14.3
14.4
0.5
14.6
14.7
15.0-7

FETtllI

U!l.!!!Q_ I:allliliQ_

~!Hl

I.Q£UIQli

xnc

0150

SEE ERROR STOP APTER OX41

X770

BSC ASCII Transmit !!isc. Conditions

7.1.62 X370511U

ICW
Bits

Not EP

LCD=D

Type 3 Communication Scanner 1FT

o
o
o
o
o
o
o
o
o
o

IB" 3105 COMMUNICATIONS CONTROLLER
COM~UNICATIONS SCANNBR 1FT SynPTOll INDEX

D9 9- 37 05E-09

TYPE 3

This routine checks the following conditions: (1) ASCII lending SYN insertion, (2) ASCII STX
insertion, (3) I~B in data while in ASCII not - Transparent state and BCC insertion (4) ITB in data
while in ASCII Transparent state and (5) Time-out while in ASCII Transparent text. cycle steal is used
in this routine. Receive functions are not used (transmit only). Oiag 0=1 (scanner wrap) used for
translllit line.
ERROR CARD

xno

~J!E

!.Q~~I!Q!!

OXOl

113F2
E2D2
E2J2
E3R2

FEUD

FETlltI

fl>.!il!!.Q_ fA.!il!!Q_
. TE20X
Tf621
TF50l
n26X

1'-220
1'-550

A set mode interrupt failed on the transmit line (address in Register X'11').
X'15' to determine the cause of the error.
Reg X'15'
0001
0002
0003
ERROR CARD
£Q.J!J:! I.Q£AUQ!
xnD

OX02

1!2E2
E2B2
1!2K2
E2R2
E2J2

Description
No set mode L2 occurred.
Interrupt from wrong line - Reg X'14'
not egual to Reg X'11'.
Feedback cbeck error.
PEALO

PETIIII

U80X
TP81X
TF44X
Tl'32I
Tl'50I

1'-570
P-S80
1'-600

fA.!il!.Q_

fA.!ifHfQ_

The PCP/EPCF sbould be 9/2 with sequence bit 13.0 off.
2, 3, " and 5.
Register X'15' contains the incorrect PCP (bits 0.0-0.3)
1.0) •
ERROR CARD

o
o
o
o
o
o
o

o
o
e

X77D

PEUD

PETIIM

~J!E

!Q~llQ!f

HiH;!f!L .fA.!ili!fQ_

OX03

E2B2
E2C2
E2H;2
E3J2

TP8U
T1'60I
TP42X
TE22I

P-410

The transmit line sop should contain X'0116'.
X'15', (bits 0.6-1.71.
ERROR CARD
£QJ!E J,Q£AUQ.!!
X77D

OX04

E2E2
B2B2
E2K2
E2a2
E2J2

Display Register

FEALD

FETMI!

fA.!ili!!!L

fA2~l!Q_

'l:F90X
TP81X
Tl'411X
U32I
U50X

1'-570
P-580
1'-590

I

EPCP (bits 0.4-0.7), sequence bit (bit

The incorrect SOl' data is contained in Register

The PCF/EPCp s~ould beU4 wij:h. s~g\lence btlt "3.0 off.

,

Refer to BSC Transmit state transition 1,

Refer to B~ ,~ransmit state transition 45.

Register 1'15' 'contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4-0.7), sequence bit (bit
'.0) "

ERRoa CARD
1770

FEUD

PETIIII

~!Hl

!Q£WQ.!!

fl>.!i~!fQ_

RAiil!!2-

OIG5

B3D2
1!2E2
B2B2
E2C2
B2H2
E3J2

TE34I
TF80I

P-410

US1X

Tl'601
TF42X
TE22X

NOTE ...... If the High Speed Scanner Peature (230KB) is installed:
E392 (TE35X) is also a possible failing card.

Type 3 Communication Scanner 1PT

X3705HU 7.1.63

~B. 3705 COftKONIC1TIONs CONtRO~~EB
TiPB 3 COKftUH~CATIOBS SCANBBR IrT Si"PTa" INDEX

The transmit line SDr should contain 1'0102'.
X'15', (bits 0.6-1.71.
BRROR CARD
X77D

~!!l

loll~W!Hi

0106

E2112
112B2
112K2
112R2
B2J2

I'IiIlLD

P99- 31 05E-09

The incorrect SDF data is contained in Register

l'B'l'lIft

U!il!!ll_ iW!2_
TP80l
TP8U
Tfllqx
. Tf32X
U50X

P-570
P-580
P-590

The PCF/BPCr should be 9/5 with sequence bit 13.0 off.
and 21.
Register 1"5' contains the incorrect PCP (bits
1.0).

X77D

ERROR CUD

FEUD

~!!l

IcllSAU!H:I

fA!ill!l!L iW!I!L

OX07

1!2B2
B2C2
B2H2
B3J2

TF81X
Tf60X
Trll2X
n22X

1770

0~0-0.31,

BPCP (bits 0.4-0.7), sequence bit (bit

PETft"

P-410

The trans. it line SDP should contain X'011P'.
X'lS', (bits 0.6-1.7).
BRROR CARD

Refer to BSC Trans.it state transition 29

PEltO

rETK"

~!!I

lollS6Il!l!l

fAilUSl_ lAillD!L

OXOB

E2E2
B2B2
B2K2
1!2R2
112J2

TPBOX
TP81X
TP411X
TP321
U501

P-570
P-5BO
r-590

The incorrect SOP data is contained in Register

The PCP/EPCP should be 9/4 with seguence bit 13.0 off.

Refer to BSC Trans.it state transition 65.

Register 1'15' contains the incorrect PCP (bits 0.0-0.31. EPCF (bits 0.4-0.7), sequence bit (bit

1. 0) .•

ERROR CARD

1770

PEltO

PETKft

QQ!!I

loll~Q!I

i6§J!!l_

R~!l!Q_

OX 09

1!2B2
B2t2
E2P2

'I:1'B1I

r-410

Tfll61
TPB2X

The trans.it line SDP should contain X'012P'. The incorrect SOP data is contained in Register
X'lS' (bits 0.6-1.1). Register X'11' is the address of the lins under test.
Check input X'41' (ICW byte '11') for correct byte. If the byte in the ICW is correct, the BCC to
SDP shift vas not correct. Otherwise, the BCC accu.ulation is in error.
BRRO'S CUD

X77D

FEUD

l'BrllK

QQIII

JtSl~AU2D

U!iUSl_ i!U!I!L

OXOl

E2E2
E2B2
B2K2
B2R2
E2J2

TP80X
TPOU
TI'III1X
TP32X
.TPSOI

F-510
P-580
F-590
,~

/,

Refer to BSC Transmit state transition 25.

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.Q-0.71, sequence bit (bit
1.01·

7.1.6~

ERROR CARD

rEALD

~!!§

!'.Q~UIQ!:I

U!u!DQ_ f!U!:I!L

OIOB

E2B2
B2C2

TP60X

1370SHAA

\

\---j

The PCP/EPcr should be 9/11 with sequence bit 13.0 on.

X17D

,

FET"ft

U81X

Type 3 comaunication Scanner 1FT

o
o
o
o
o
o
o
o
o

'H ,.".,

o
o

82H2

B3J2

"~

____ "._, __ ....

~.

__ "_,,_..

~_,._

....... '_ ,•... "...... __ . . _....

D99-3105E-09

UII21
U221

The trans.it line sor should contain 1'0110'.
1'15', (bits 0 •.6-1.71.
ERROR cno

rEUD

rBTftII

B2B2
B2P2
E211:2
B2R2
B2J2

tr801
U81X
U411X
tr321
Tr50!

r-510
1,'-580
r-590

The incorrect sor data is contained in Register

£!lI!1 I.!l!;!U!l! IAli!!!!.. EAliJ!ll_
X71D

OXOC

The PCr/BPCr should be 9/11 with seguence bit 13.0 off.

Refer to .ssc fransmit state transition 59.

Register X'15' contains the incorrect pcr (bits 0.0-0.31. EPcr (bits 0.11-0.1), seguence bit (bit
,.0).

X71D

BRROB CARD
£!l!!l lo!l£AU!l!

U§!!!!.. U§!l!!!..

'EALD

FETftft

OXQD

U801
U81X

1'-510
r-580
'-590

B2B2
B2S2
112K2
B2B2
B2J2

Ullfil

tr321
U50!

The pcr/8PCr should be 9111 with sequence bit 13.0 on.

Refer to SSC Transmit state transition 6...

Register 1'15' contains the incorrect pcr (bits 0.0-0.3), 8Pcr (bits 0... -0.1), sequence bit (bit
l.O).
ERaOR CUD

I

o
o
o
o
o
o
o

______

lPft 3705 CONKQH1CAfl0.S CONTROLLER
tYPE 3 CQftftOHICltlOIS SClHHBB Irt SYftPfOft IIDBI

o
~;:

.~.
,~._~

X110

PEAL 0

rEU"

U8U
U601

'-1110

~Il§

L!l!OAUlll! U§!l!!l_ fAg!!!!..

OXOB

82P2
B2C2
112H2
B3J2

UIi2X

'U22X

The transsit line sor should contain X'0110'.
X'15', (bite 0.6-1.71.
BRBOR ClRD

rB1Lo

rET""

oxor

Tr801
U8l1

r-510
11'-580
r-590

The incorrect sor data is contained in Begister

£!lll§ L!l£AIlgl! fAliJI!l_ flli!!!!..
X11D

B2B2
B2B2
11211:2
B2R2
B2J2

UIiU

U32X
U501

The pcr/EPCr should be 9111 with eequence bit 13.0 off.

Refer to SSC Tranesit state transition 66.

Register X'15' contains the incorrect pcr (bits 0.0-0.31, BPcr (bits 0.11-0.1). seguence bit (bit
1-0).

8BROB CUD
X11D

rBALD

~1lJ

• !l!OAWl! 11§!!!l.

0110

B2P2
1282
B2C2
B282
B3J2

Tr82X
Tr811
TP601
U .. 21
U22!

rH""

11§!l!!!..
r-1I10

The transmit line sor should contain 1'0110'.
X"5', (bits 0.6-1.7).
ERBOR CABO
X17D

l'BUD

PET l1l'i

~I!l

I.Q!oAI!!ll! fAli!l!!l. fla!l!!!.

OXll

B2C2
l!2J2

U60X
Tr50X

The incorrect sor data is contained in Register

1'-580
1'-590

Type 3 Co.sunication Scanner 1FT

X3705RU 1.1.65

~·'
"U:1,.

:1 );
"'"
IBII 3705 COII~UNICATIONS CONTROLLER
TYPE 3 COIIKUNICATIONS SCANNER 1FT SYKPTOH INDEX
E2B2
, E2K2
E2R2

099-3105E-09

~.

US1X
TF411X
U321

',,- j,J

The PCF/EPCP should be 9/8 with sequence bit 13.0 undefined.
transition 59 and 71.

Refer to BSC Transmit state

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCF (bits 0.11-0.7)., sequence bit (bit
1·0) •
ERRoa CAOO
~!!E

X770

FEAt 0

FETft!'!

TpB1X
TP60X
TpII21
T1l221

1'-1110

l.Ql:-0\1

Register 1'15' contains the incorrect PCF (bits 0.0-0.31, EPCF (bits 0,.11-0.71, sequence bit (bit
'.0) •

ERROR CARD
1771'

FEAt 0

PETIII!

k2!lB

I.Q~!llQl!

Ugl!

!L

0131

B2B2
B2C2
B2H2
B3J2

TF8U
TF601
'lF1I21
tE221

f-II10

Ulil!Q_

The trans.it line SDF should contain 1'0130'.
1'15', (bits 0.6 thru 1.71.
BRROD ClBD
InF

I.Q~!UQ!

n§l!!!!L iA!il!2-

01,110

B2B2
B2B2
B2K2
B2R2
B2J2

TF801
TF81X
TFIIIII
TF321
TF501

F-570
F-580
F-590

The PCF/BPCF should be 9/5 with sequence bit 13.0 on. The progras forced state 9/2, 13.0 off
prior to this test. Refer to BSC Transait state transition 26.

o

~

'I

',.

I

:

4

•

BegistllIr 1'15' :contllins the incorllect PCF (bits 0.0-0.3), EPC!' (bit1l 10.1I-0.7), sequence bit (bit
1.0) •
ERROR CARD
1771'

FEALO

I.Q~!IIQ!!

f!liBBQ_

FETIIII

~Q!lB

aXIl'

B2B2
B2C2
B2H2
B3J2

U81X
T!'60X
TF421
tE22X

F-II10

.f!§l!l!Q_

The trans. it line SDF should contain
X' 15', (bits 0.6 thru 1.7).
EDROR CABO
1771'

FEALO

1Q£!IIQ! l!gl!Q_ E!gl!Q_

0142

E2E2
E2B2
B211:2
82R2
82J2

U801
TF81X
TFIIIII
TF321
U50X

X'0110'~

The incorrect SOF data is contained in Register

FETIII!

~QQB

o

o
o

FET II II

£2!l~

o
o
o

FElLD

The incorrect SOF data is contained in Register

F-570
F-580
F-590

The PCI'/EPCF should be 9/5 with sequence bit 13.0 off.

Refer to SSC Trans.it state transition 27.

Register X'15' contains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0.4-0.7), sequence bit (bit
1.0),.
ERROR CABO

£2QB

I.Q~!1!Q!

FEALD
~!liJBQ_

FET""

i!!ill!Q_

Type 3 Co.aunication Scanner 1FT

X3705uAA 7.,.73

15M 3705 COMMUNICATIONS CONTROLLER
TYPE 3 COKHUNICATI0NS SCANNSR 1fT SYMPTOM INDEX

099-31 05E-09
.(

}

.~ .P
X77P

OX III

22B2
B2C2
B282
l!3J2

TP61X
TF60X
'1'1'421
TE22X

1'-410

The transmit line SOl' should contain X'017C'.
X'15'. (bits 0.6 thru 1.7).

X77F

ERROR CARD

l.Q£,UIQU

FEALD

FETIIIl

£~H!~

.u~!iQ~

Rl!.fl£;UQ..

ox 50

2222
22B2
22K2
22R2
E2J2

TF60X
'1'1'811
'1'1'4111
'1'1'321
'1'1'501

1'-570
1'-580
f-590

The incorrect SDF data 1s contained in Register

The PC1'/EPC1' should be 9/5 with sequence bit 13.0 on. The program forced state 9/2. 13.0 off
prior to this test.. Refer to BSC transmit state transition 26.
Register X'lS' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4-0 .• 7), sequence bit (bit
1.0).
ERROR
X77Ti'

CARD

FEALO

~n

loQ£AUQ!i

fA~UQ_

n\l£;UQ_

0151

E2B2
B2C2
E282
1!3J2

T1'81X
T1'601
'1'1'421
Tl!22X

f-410

FEUI\

The transmit line SOl' should contain X'0110',
X' 15' , (bits 0.6 thru 1.7) •
1'EALD

I.Q£AUQli

fAflIHQ_

I'ET II II

!;QIUl
OX52

E2E2
l!2B2
l!2K2
E2R2
E2J2

TI'80X
'1'1'61X
'1'1'4 lilt
'1'I'32X
T1'50X

1'-570
1'-560
1'-590

ERROR CARD
X771'

The incorrect SOl' data is contained in Register

fAg]~Q_

The PCF/EPCF should be 9/5 with sequence bit 13.0 off.

Refer to BSC Transmit state transition 27.

Register X'15' contains the incorrect PCI' (bits 0.0-0.3). EPCF (bits 0.4-0.7), sequence bit (bit
1.0) .'
ERRoa CARD

£!.lIlI!
X771'

OX 53

PEAL 0

l.Q!;loUQU

fafl£;!iQ_ UQ.!H!Q_

FETII"

E2B2

TF81X
'1'1'60X
T1'42X
TJ!22X

F-410

1!2C2
82H2
E3J2

The transmit line SDF should contain X'0161'.
;' 15', (bits 0.6 thru ,.7).
ERROR CARD

FEALD

FETMM

OX60

TF80X
T1'81X
'1'F41U
TP32X
TF50X

1'-570
F-580
1'-590

The incorrect SDF data is contained in Register

!;Q.!2E 1Q!;!llQU floQIDlQ_ RloQ]!lQ_
X77P

E2E2
l!2B2
!l2K2
E2R2
1!2J2

The PCF/EPCF should be 9/5 with sequence bit 13.0 on. The program forced 'state 9/2, 13.0 off
prior to this test. Refer to BSC Transmit state ~ransition 26.
llegister X'15' contains the incorrect PC1' (bits 0.0-0.3), EPCF (bits 0.4-0.7), sequence bit (bit
1.0) •
,(.

.

7.1.74 X370511AA

Type 3 Communicati~n Scanner 1FT

'

-~----

o
o
o
o

IBK 3105 COKKUHICATIONS CONTROLLeR
TYPE 3 CO""UNIC1TIONS SCANNBR 1FT S!BPfOft IHDEI
PEAtD

pnKII

£2111

!&~!I!!!!!

U§!!!2_ UiJJl2-

0161

1!2B2
1!2C2
B282
B3J2

TP811
TP601
'lP421
TB221

P-410

ERBOR cnD

In,

o

o

ERROR CARD

Inl!

PElLD

PETIIII

U801
U8n

P-570
F-580
P-590

£2111

~2SAI!Q!!

iAiJIQ_

0162

1!21!2
1!2B2
1!2K2
1!2R2
1!2J2

'fP44X

o

o
o

D99-3105E-09

The transmit line 30P should contain 1'0110'.
X'15'. (hits 0.6 thrll 1.1).

o

TP321
U501

-- --_.- _ .._-,---,-, .. ---,

The incorrect SOP data is contained in Register

fAgl!!Q_

The PCI!/EPCI! should be 9/5 with seqllence bit 13.0 off.

Refer to BSC Transmit state transition 27.

Register 1'15' contains the incorrect IPCP (bits 0.0-0.3). EPCP (bits 0.4-0.7), seqllence bit (bit
1.0) •
ERROR CARD

xnl!

PEAt 0

UTIIII

U8l1

1'-410

~1l1

!&~AU!!,!!

.ugl.!!2_ ngl.!!!!_

0163

1!2B2
1!2C2
1!282
E3J2

Tl! 6
TP42

°1

Tl!22X

The transmit line SOl! should contain 1'016B'.
1'15', (bits 0.6 thru 1.7). I
BRROR cno
177F

o
o
e

nAtO

PETIIII

£2121

102~An!H!

'u!i1!!!2_ ngUQ_

0110

l!2l!2
l!2B2
E2K2
E2R2
E2J2

Tr80X
TrBlX
U44X
TP321
U501

F-570
P-580
P-590

The incorrect SOP data is contained in Register

The PCP/EPCP should be 9/5 with seqllence bit 13.0 off. The program forced state 9/2, 13.0 off
prior to this test. Refer to BSC Transmit state transition 53.
Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4-0.7). seqllence bit (bit
'.0) •
ERROR CABO

xnp

l'EAtO

PET!! II

~1l1

~2~AI!!!!!

fAgl.!!2_ ng1!!!!!_

OX71

E202
E2B2
B2C2
E2H2
E3J2
B2P2
B2P2

TF341
Tr8n
TP60X
fp42X
TB221
TP4BI
n82X

P-410

o

The transmit line SOP shollld contain X'01PP'.
X'15', (bits 0.6 thrll 1.~.
ERROR cno
X77F

nAtO

£21l!

PETit II

102~AnQ!!

U!i!'!!Q_ fill!!SL

0172

B2M2
B282
B2B2
E2l'2
B202
B21'2

fp22X
U8ll
TFBOI
TF481
TF34X
'l'FB21

1'-150
F-210
P-240

The statlls posted in the transmit line

Type 3 Communication Scanner 1FT

lew

The incorrect SOl' data is contained in Register

was expected to be 1'40PP'.

X3705HAA 7..1.75

1(-')'\-~'

IBft 3705 COnftUNIClTIOHS CONTROLLER
TYPE 3 COftftUNIClTION9 SCANHBM 1FT SYftPTOn INDEX

D99-370511-09

The status bits in error are in segiBter X'15'.
Reg X'15'
Bits
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1.0-1.7
ERBOB CABO
xnr

Description

ICII
Bits

Abort Detect
0.0
Porlat Exception
14. 1
char Over/under run
0.2
Data Check
14.3
BSC bad PAD flag
1/f./f
BOil
0.5
Leading OLE Error
'/f.6
,/f.7
Length Check
tCII byte 15
15.0-7
l'BAtO

FlITllh

frSOX
US11
Tpq/fX
TU21
TrSOX

F-570
F-580

~ll~

1I9S;UI,gli U!ill!ilL U1i.ll!lL

0X73

B2E2
B2B2
E2K2
E2R2
B2J2

"

F-5~0

The PCF/EPCr should be 9/5 lIith Bl!quence bit 13.0 off. The progru forced state 9/4, U,.O off
prior to this test. Refer to BSC Transmit state transition 31.
/

Register X'15' contains the incorrect PCF (bits 0.0-0.3). EPCP (bits 0./f-0.7). sequence bit (bit
,.0) '.

ERROIl CAIlO
xnr

l'BAtO

PETSI'!

TrS2X
frS1X
Tr60X
TP/f2X
TE22X

P-/fl0

~nl

I&S!!Igl! EAgJ!.9.. U1i!!g_

OX7"

E2P2
E2B2
E2C2
E2H2
E332

The transmit line SOP should contain 1'0120'.
X'15'. (bits 0.6-1.1).
ERIlOs cno
InF

l'BUO

FBTllft

TP22X
Tr81X
TrSOI
TF/fax
TF31fX

F-150
'-210
F-2QO

~lll

!'.9gn.9! UgJ!,g_ U1i!!!g_

0175

E2N2
E2B2
B2B2
B2p2
B202

The incorrect SOP data is contained in Register
-

./

"

/

The status posted in the transmit line ICII lias expected to be X'/f006'.
The status bits in error are in Register X'15'.
Reg X' 15'
Bits
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.1
1·0-1·7
X780

Description

ICII
Bits

Abort Detect
0.0
Pormat Bxception
14.1
Char over/Under run
0.2
1/f.3
Data Ch..ck
BSC bad PlD flag
14.4
EOII
0.5
Leading DLE Error
14.6
14.7
Length check
15.0-7
ICII byte 15

SSC Transmit - Initial Status

EBCOIC - Not EP

LCO=C

This routine sets up a transmit ICII with Initial status 1 and verifies that for each final status, the
correct beginning and ending control characters are inserted in the SDF. Neither cycle steal nor
receive functions are used. (Transmit only). oiag 0-1 (scanner IIrap) is used for transmit line.

7.1.76 X3105HAA

Type 3 Communication Scanner IPT

('

. ( j;

o
o
o

o

IBM 3105 COMMUNICATIONS CONTROLLER
TYP~ 3 cOHHUnlClTIoNS SCANNER 1fT SYIIPTOK INPEX
ERROR CARD

FEUD

FET!!!!

OXOl

TE20X
TF62X
TF50X

F-220
F-550

D99-:P05E-OII

l:;QQ)l 1Qilllilll fAfi!!!Q_ fP&l1!!'Q_
nBO

E3F2
E2D2
E2J2
83R2

rE26X

A set mode intercapt failed on the transmit line (address in Register X'11').
X'15' to determine tne cause of the error.

o
o

o

Reg X'15'
0001
0002
0003
ERROR CARD
I,Q CA lIQ!!.

£QQ~

1780

OXOB

o
o

E2E2
E2B2
E2K2
E2R2
E2J2

No set mode L2 occurred.
Interrupt from wrong line - Reg X'14'
not equal to Reg X' 11.,!.,
Feedijack cbeck error.
FEALD

FETII!!

TF80X
TF81X
TF44X
TF32X
TP50X

l?-510
F-580
F-590

fAfil1!!'Q_ f!l!UQ_

FEALD

FETII!!

TF80X
TF81X
TF601
TP42X
TE22X

1'-410

s;;gll~

loQ£U!Qli fAfiUQ_ fAgl1liQ_

OXOC

E2E2
E2B2
E2C2
E282
E3J2

The transmit line SDF should contdin 1'0102'.
1'15', (bits 0.6-1.7).
ERROR Ci:ARD
1780

FEALD

FETtI!!

TF80!
TF81X
Tf'4QX
TF32X
U50X

1'-510
F-580
F-590

s;;g!2~

1Q£A!!Qli fAQl1!!Q_ fAg!!!L

OXOD

E2E2
E2B2
E211:2
E2R2
E2J2

The incorrect SOP data is contained in Register

Tbe PCF/EPCF should be 9/5 with sequence bit 13.0 off.

Refer to BSC Trans.it state transition 32.

Register X'15' contains the incorrect PCl? (bits 0.0-0.3), EPCF (bits 0.4-0.71, sequence hit (bit
1.0) •
EBROR CARD
X780

FEUD

FETM!!

TF81X
TF601
TF421
TE221

1'-410

£Q!2~

1£!£An2!! fAfil1!!Q_ fA§l1!!Q_

OIOE

E2B2
E2C2
112H2
E3J2

Tue,transmit line SDF should contain 1'012D',.
X'15', (bits 0.6-1.7).
ERROR CARD

o
e

Refer to BSC Transmit state transition "

Register X'15' cnntains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0.4-0.1), sequence bit (bit
1.0) •

n80

o
o

Description

The PCF/EPCP should be 9/4 with sequence bit 13.0 off.
2, 3, 4, 5, and 45.

ERROR CARD

o
o
o

Display Register

1780

~Q!2~

LQl:;aIIQli

0101'

E2E2
E2B2

E2K2

FEU.D
fa~~!!Q_

The incorrect SOl' data is contained in Register

FETII"
fAg~!!Q_

F-570
F-5BO
F-590

Type 3 communication Scanner 1FT

X3705HJI.A 7.1.71

(J
I{~:

',",J"
IBK 3705 COKKU"ICATIOHS CONT~OLLEft
TYPE 3 COKKUKICATIORS SCANHEB IFT StKPTOK INDEI
E2R2
E2J2

D99-31 051':-09

II

'U32X
'USOI

The PCP/EPCP should be 9/4 with sequence bit 13.0 off. The ptogra. forced state 9/2, 13.0 oft
prior to this test. Refer to BSC Trans.it state transition 45.

'I

\',

\J

Register X'1S' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4-0.7), sequence bit (bit
,.0) •
ERRoa CARD
X780

PEAt 0

PETIIII,

~!l!

!~I2!!

f!§!!2.. U§mL

OX10

82B2
B2C2
E202
E3J2

'rPS1X

F-410

'U601

'U1I2X
U221

The transmit line SOP should contain 1'0102'.
1'15', (bits 0.6-1.71.
ERROR CARD
1780

FEALO

FET!H

~!Uj

!9£!ll9! Ui!!2.. U§!!!2..

Ox~l

E2E2
B2B2
E2K2
E2R2
E2J2

T'801
TF811
T'4I1X
TP321
TFSOX

The incorrect SO, data is contained in Register

F-510
'-SSO
F-S90

The PC'/EPCP should be 9/5 with sequence bit 13.0 off.

Refer to BSC Transsit state transition 21.

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4-0.1), sequence bit (bit
t. 0).

1780

ERBOR CABO

PEAt 0

~!l!

I.g~AUQ!

iAU1I2. lAlil!!2-

FEUII

OX 12

82B2
82C2
8202
B3J2

'U81 X
TF60X
TP42X
TE221

,-410

The transsit line SOP sbould contain l'011F'.
J'15', (bits 0.6-1.11.
ERROR CARD
17S0

PEAt 0

UTIIII

.l:Q!l!

1.9~AnQ!

EA!U!Q_ lA§!!Q.

OX13

E2E2
82B2
82K2
E282
82J2

Tr80X
'US1J:
TP44X

F·570
F-SSO
F-590

Tbe incorrect SOP data is contained in Register

'U321

TF501

The PCF/EPCF should be 9/4 with sequence bit 13.0 off.
and 34.
.

Refer to BSC Transmit state transition 33

Register X'lS' contains the incorrect PCF (bits 0.0-0.31. EPCF (bits 0.11-0.7). sequence bit (bit
,.0) •

ERROR CARD
x180

PEUO

FETIIH

US11
TF46X
TP82X

F-230

~!HI

!.!l£!IlQ! UlUlllQ. u'§l!l!!2-

OX 15

E2B2
B2L2
B2P2

The Bce field of the transsit line lew sbould have reset to zero.
ERROR CARD
x180

PEAtO

FEUII

US1X
TF60X

F-410

~!l!

loQ£!UQlI UlUlll2.. fill!!!2.

Ox 16

112B2
l!2C2

7.1.1S 13705HAA

( "":
,J
Type 3 Communication Scanner IFT

t )-,
\

I

.J?

:t't,
\, ,~'

~----------

o

----"--- - ----

o

o
o
o
o

,
IB" 3105 COftftON1CAt10NS COHtROttE.
tYPE 3 COftlUNIClT10HS SCAN MER If~ SYMPTOM I.DEI
E2H2
1!3J2

X780

FBALD

FETIIII

!<2l!§

~29l:lQ!

UgJ!!L EAjiE!lL

OX 17

1!21!2
B2B2
B2K2
B2R2
B2J2

'U8OX
TP81l
TPII"I
U321
TP501

P-570
F-580
F-590

o
o
o
o

TP"21
U221

the transmit line SDF should contain X'01C2'.
1'15', (bits 0.6-1.7).
BUOR CARD

The incorrect SDr data is contained in Register

the PCF/BPCP should be 9/5 with sequence bit 13.0 off.

Refer to BSC transmit state transition 32.

Register 1'15' contains the incorrect PCP (bits 0.0-0.31, BPC1 (bits
1.0) •
ERROD CARD

FEUD

FET II II

OX 18

U81X
TP601
nll21
U221

F-II10

0~"-0.7),

sequence bit (bit

k2!!E l&£WQl! UgJl!ll_ iAgJl!lL
1780

I!~B2

1!2C2
1!2H2
B3J2

The transmit line SDP should contain 1'0103'.
1'15', (bits 0.6-1.71.
ERROR CARD

PBALD

!<2!!B loQ£AllQJI flgJJlQ.
1780

o
o
o

D99-3705B-Q9

0120

B2C2
1!21!2
l!2B2
1!2K2
1!2B2
B2J2

TP601
U80X
U81X
UII"X
U32X
U501

The incorrect SDr data is contained in Register

FETIII!

EAgJ!lL
F-570
1-580
F-590

The PCP/BPCF should be 9/5 with sequence bit 13.0 off. the program forced state 9/11. 13.0 off
prior to this test. Refer to BSC trans.it state transition 21.
Register 1'15' contains the incorrect PCP (bits 0.0-0.3), !PCF (bits 0.4-0.7), sequence bit (bit
1.0) •
BRROR CARD

FEUD

FUIIII

0121

U80X
TP81X
nll"l
TF321
U501

F-570
F-580
1-590

!<21!.E J,Q&UIQ! U!iUll. EW!!L
1780

o
o

B2l!2
B2B2
l!2K2
l!2R2
l!2J2

the PCF/BPC1 should be 9/4 with sequence bit 13.0 off.
and 34.

Refer to BSC transmit state transition 33

Register X'15' contains the incorrect PCF (bits 0.0-0.3), BPCP (bits 0.4-0.7). sequence bit (bit
1.0) •
ERROD CARD

rEUD

FET!!II

0123

US1X
TP60X
UQ2X
TE221

F-II10

!<2!!.E !&9UQ.!t U!iE!Q. fAgJ!lL
1780

E2B2
E2C2
B282
B3J2

The transmit line SDF should contain X'01C2'.
1'15', (bi ts 0.6-1.71.

o

ERROR C1RD
£2l!§ loQ£AllQ!

FE1LD

Tbe incorrect SDP data is contained in Register

FET!!!

iAgJ!Q_ fA!iE!lL

Type 3 communication Scanner 1FT

X37058AA 1.1.79

1

1 '.
~-

18K

~705

TT~~

1780

COKKUHICATI06S

COMTROL~~R

3 COKKUQICATIOM5 SCAHREa Ifi
01211

E2E2
22B2
22K2
22R2
22J2
The

U801
U81 X
TPIII\X
TPl2X
TP50X
~P/EPCP sho~ld

SYK~TOft

p99-3705E-01l

INOEI

P-570
'-580
f-590

1

"\- _t'

be 9/5 with

seq~ence

bit 13.0 off.

Refer to BSC Transmit state transition 32.

Register X'15' contains the incorrect PCP (bits 0.0-0.31, EPCP (bits 0.4-0.71, seguence bit (bit
1-01·
ERROR CABO
lt9WIQ!

SQIl!l
1780

OX25

22B2
82C2
8282
8lJ2

PEAL 0

FETKK

TP811
TP60J
TPII2X
tE22X

P-410

fAgj!g. Ufi!f!2.

The transmit line SOP sho~ld contain 1'0126'.
lI' 15', (bits 0.6-1 .. 71.
ERIIOR CABO

1780

SQU

1&!~Q!

PBALO
U§lll!Q.

FETftII
fA§U!!..

OX26

E2E2
22B2
82K2
E2B2
B2J2

TPSOX
US11
UItU
TPJ21
TF50X

P-570
F-580
F-590

The incorrect SOP data is contained in Register

The PCP/EPCP sho~ld be 9/5 with seguence bit 13.0 off. The program torced state 9/4, 13.0 off
prior to this test. Refer to psc Transmit state transition 21.
Register X'15' contains the incorrect PCP (bits O.O-O.ll, EPCP (bits 0.• 11-0.71, seguence bit (bit
1.01.

X780

ERROR CABO
~I!E I&C.AU211

l'EAtO
U§ll.l!Sl.

l'ETKK
U§!l!!!..

OX28

USOX
U81 X
TP4l1X
TU2X
TP501

P-570
P-580

8282
82B2
E2K2
E2R2
82.12

P-~90

The PCP/EPCP should be 9/11 with sequence bit 13.0 off.
and 34.

Refer to BSC Transmit state transition 33

Register X'15' contains the incorrect PCP (bits 0,.0-0.31, EPCP (bits 0.4-0.71, seguence bit (bit
,.0) ..

EBBOD CARD

FEAt 0

PETKI!

S2IlE It,Q!OAWl! U!i!l!Q_ Rill!!!..
1780

0129

82B2
E2C2
E282
83J2

US1J
U601
TPII2X
tE22X

P-1I10

The transmit line SOP should contain X'01113'.
X'15', (bits 0.6-1.71.
ERROR CABO
1&gnQ!

PEUO
Ufilll!,Q.

PETIIK
RA§lii!!!..

OX2C

'U801
U81X
TP II III
TPl21
U50X

P-570
P-580
P-590

~I!E

1780

E282
82B2
E2K2
E2B2
E2J2

Tbe incorrect SOP data is contained in Register

Tbe PCP/EPCP sbould be 9/5' with seguence bit 13.0 off.

t

Befer to BSC Transmit state transition 32.

Register 1'15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits
1.0) •

0.~-0.71,

.'

sequence bit (bit

(
7.1.80 r 370S8AA

j

Type 3 COlllmunication Sea liner IPT

,?:.

--"

o
o

o
o
o

Ie~ 3705 COM~UNIC~TIOHS CONTROLLER
TYPE 3 COH~UNICATIONS SCANNER 1fT SYHPTOM INDEX

fET1I1I

!'.Q~AnQ'!!

!!A!J].!!Q_ fAllE!!Q_

OX2D

E2B2
82C2
l!2H2
E3J2

Tl'81X
TF60X
TFII2X
TE22X

f-410

ERROR CABO
X180

The transmit line _Ol' should contain X'0103'.
X'15', (bits 0.6-1.7).

o

o

l'EUD

£QIlE

ERROR CABO

PEUD

PETHI'!

OX30

U80X
TFan
TPII4X
TF32X
T1'501

1'-570
1'-580
1'-590

£Q!!] !'Q£AIlQ!! .fAllE'!!Q_
1780

E2E2
E2B2
E2K2
E2R2
E2J2

099-)105E-09

The incorrect Sop data is contained in Beqister

fAllE.!!~L

The PCF/EPCP should be 9/5 with sequence bit 13.0 off. The program forced state 9/11, 13.0 ott
prior to this test. Refer to , asc Transmit
state transition 21.
,

o

o

Register
1.0) •
ERROR CARD
X780

contains the incorrect PCP (bits 0.0-0.3), EFCF (bits 0.11-0.1),

PEALO

FETHI'!

~Q!lE

!'Q£AIlQ'!!

gA~E!!Q_

fA~E.!!Q_

OX31

E2E2
E2a2
E2K2
E2R2
B2J2

TF80X
TP8n
TF44X
tF32X
TF50X

1'-570
1'-560
1'-590

· : '.
G

The FCF/EPCF should be 9/4 with sequence bit 13.0 off.
and 34.

!

I,

o

x't5'

~equence

bit (bit

Refer to esc Trans.it state transition 33

Register X'15' contains the incorrect PCI' (bits 0.0-0.3), EPCF (bits 0.11-0 .• 71, sequence bH (bit
1·°1·
ERROR CARD

FEUD

FETH!!

ll2B2
ll2C2
E2H2
E3J2

TFa11
TF60X
TFII2X
TE22X

1'-1110

£QIlE !'Q£AlIQ!i Ufil99-3705~-09

CONTROI.I,ER

rfPE 3 COII"UNICAtIONS SCANNER 1FT S¥IIPTOII iNDEX
The transmit lin .. 501' should cOlltain X'0101'.
X' 15', (bits O. 6-1.7) •
ERROR CABO
X782

FEALO

1'ET!!1!

~l!ll

12S;,aII!H!

~A2]H9_

la§!HQ_

OXOO

E2E2
E2B2
E2K2
1I2R2
E2J2

TP80X
T1'B1X
nllllx
TF32X
T1'50X

F-570
1'-580
1'-590

The incorrect 51>1' data is contained in Ref)ister

The PCF/EPCF should be 9/5 with sequence bit 13.0 off.

Refer to BSC Transmit state transition 32.

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPC. (bits 0.4-0.7), sequence bit (bit
1.0) •
ERROR CARD
X782

FEUD

1'ETIIM

!;Q!Ul

LQ!;AIlQ!l !!A§!!!.Q_

fA§~!iQ_

OXOE

1I2B2
l!2C2
l!2H2
l!3J2

F-410

o

TFaU
TF60X
nll2X
TE22X

The transmit line SOl' should contain X'0120'.
X'15', (bits 0.6-1.7).

o

ERROR CARD
X782

FEAt 0

FETIII!

s;Qll~

1Q!;U!QJ:!

fA§lJute 9/2,
13.0 off prior to this test. Befer to SSC Transmit st~te transition 53.
Register X,,5' contains the incorrect PCP' (bits 0.0-0.3), EPCP' (bits 0.11-0.7), sequence bit (bit
1.0) •
ERROR

CARD

£QQ~

!:Q£!!!Q!! !!!Q1'

Ell 110 B CARD

SQIlE J.QSAIlQ!I
X78C

OX 12

E2E2
B2B2
E2K2
E2R2
E2J2

Tr801
US11
UIIQX

TP321
'fP501

F-570
.··580
F-590

The PC1'/EPCP sholll,\ be 1111 with seqllencli bH 13,0 <<;In.
Register 1'15' contains the incorrect
bit 1.0).
ERROR CARD
X"18c

SQJli J.Q£!I!Q!

£ali!!!Q_ fAl!ll!!fL

l'EALD

FET"I\

OX 11'

TE2U

1'-1180

E3K2
E2C2
E2E2
E21'2
E2R2

8e(01= to DSC Receive stato tranait.ion b!••

pcr (bits 0.0-0.3), EpC1' (bits O.Q·0.7), sequence bit

(with

TF60X
U80X

TF481
TF421

The data l.ecllhad and buff(;red does not equill the qatol expected.
the expec~ed data; byte 1 contains the rece~yed data.

Bel/lster 1'15' byte 0 contains

Register X'lb' contains the address of; tile I'lUllbel; of It'll/' te~t"d (byte 0) and the numLer of
bytes remaining to be tested Ib:(te 1). The contellt., of register X'll\' plus 2 is the address ot
the next byte in the expected data buff~r. ~be CODtents qf fegister X'16' plus II is the addres6
of the noxt byte in the received data buf~er.
X78C

OX27

X7HC
X78D

OX2A See error ~tap afteI OX1A.
BSC Receive' STICK' Chullctere; With Bad BCC - EBCDIC

See error stop ,fter OX17.
Ill'

LCD='I

n2Y!!~E JlE~R!f!!~~

This routine verifies that when a receive line detects a 'STICK' ch4r4cter, the scanner se~uences
through the correct stAte tranfj_itions and ,hilt 'ncorrect DCC cha~l<;tqr& c,lIse level 2 interrupts. TblS
routinQ uses DialJ 0-\ (scllllnn wrap) and the tune-it U.no USIIS D~a9 1-' (I'CFlIH'CF,,9/C). Cycle StliO 1 iu
used by both lines.
ERROR CARD
X780

l!EALD

FETIIII

~Jl1i

J.Q!99- 37 05E- 09

14.7
15.0-7

The PCP/EPCP should be 7/5 with sequence bit 13.0 on.

Refer to BSC Receive state transition 30.

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCF (bits 0.4-0.7), sequence bit (bit
1.0).

X790

ERROR CABO

FEALD

FETHI!

£Q!lE J.QCATIQ!

EA~!iQ_

f!2E!2-

OXOF

TFSOX
TP81X
Tl'41U
TF32X
Tl'SOI

F-570
F-5AO
F-590

E2E2
E2B2
E2K2
E2R2
E2J2

The PCF/EPCF should be 7/6 with sequence bit 13.0 off.

Befer to BSC Receive state transition 16.

Register 1'15' contains the incorrect PCF (bits 0.0-0.3), EPCl' (bits 0.4-0.7). sequence bit (bit
1.0,.

o

ERROR CARD
X790

TF22X
Tl'S1X
Tl'SOX
Tl'4SX
TF3111

P-210
F-240

OX 10

E2B2
B2B2
E2B2
E2F2
B2Q2

P~150

The status posted in the receive line lCW was expected to be X'OOOA'.
The status bits in error are in Register X' 15'.
Reg X'15'
Bits
0.0
O. 1
0.2
0.3
0.4
0.5
0.6
0.7
1.0-1.7

o

o

PET II I!

J,2£WQ! f!!iU2- U2lii!i!L

co
o
o
o
o

FEALD

~l!ll

X790

Description

0.0
Abort Detect
Forlllat Exception
14. 1
Char Over/Under run
0.2
Data Check
111.3
BSC bad PAD flag
14.4
0.5
EOII
Leading OLE Error
14.6
Length Check
14.7
ICW byte 15
15.0-7

ERROF CARD

PEAL 0

£Q1Hl 1QQUQJ!

fA~!!L

U2t;AlIQ'!! U!i!!Q_ UQ5;!!Q_

OX08

E2H2
E2B2
E2E2
E2P2
E2Q2

TF22X
TP81X
U80X
TP48X
T1.'34X

se~uence

F-150
F-210
P-240

The status posted in the receive line ICW vas expected to be I'OaOl'.
The status bl.ts in error are in Register X'15'.
Reg X'15'
Bl.ts
0.0
0.1
0.2
0.3
0.11
O.~

0.6
0.7
1.0-1.7

Description
Abo rt Det F2
E2Q2

FETIIM

.l!Afll1l!.2F-150
F-210
1'-240

'Ite status posted in the teceive line lCW was expected to be X'0066'.
The status bits in e nor are 1n Registet X' 15' •
Reg X'15'
Bits

Pescn,ptioll

Type 3 Communlcation Scanner 1FT

lCW
Bits

X310511AI; 1.1.117

IBM 3705 CO!fttNICAtIONS CONTROLLER
TYPE 3 COaftUHICATIONS SCANNEI 1fT StaPTO! IMDEX
0.0
O~

1

0.2
0.3
O./i
0.5
0.6
0.7
1.0-1.7
ERRoa CUD

099-37 05E- 09

Abort Detect
0.0
Poreat Exception
111-1
Char over/onder run
0.2
Data Check
n.3
BSC bad ~AD flag
1/i./I
EOII
0.5
Leading OLB Brror
14.6
Length Check
ICI byte lS
15.0-7

'''.7

FEAt 0

PETftft

£2!!§ lem;AIl2.!1 lAli!i.!l2- UWlL
1791

011E

B2E2
E2B2
B21':2
B2R2
:82J2

TrBOI
Tral1
TrIlU
Tr321
TrSOI

f-570
r"SBO
'-590

The PCP/EPC. should be 7/6 with sequence bit 13.0 off.
Refer to BSC aeceive state transition 36.

Prograa forced state 7/3 before this test.

Register 1'15' contains the incorrect PCP (bits 0.0-0.3). EPcr (bits 0.1I-0.7t. sequence bit (bit
,.0).

EBBOR CUD

PElLD

PETllft

l!2M2
:82B2
l!2E2
E2r2
B202

TPBOX
TrB11
TrBOI
'rPIIBX
TP3111

1'-150
r-210
P-240

£2!!1 I.2SOW2.!1 IAW9_ lAflU9_
X791

OIU

T'e status posted in the receive line ICW was expected to be 1'020E'.
The status bits in error are in Register X'15'.
Reg 1'15'
Bits
0.0
0.1
0.2
G.3
0.4
0.5
0.6
0.7
1.0-1.7
ERROB CABO

Description

ICII
Bits

Abort Detect
0.0
roreat Exception
14. 1
Char over/Under run
0.2
Data Check
14.3
BSC bad PAD flag
14.11
EOII
0.5
Leading OLE Error
14.6
Lengtb Cbeck
'''.7
lCIl byte 15
15.0-7
PElLD

fETftll

!
1793

£!l1lE

lt~~lnlH!

OX15

UN2

PETIII!
UUI!L

Tl'2~X

'-l~O

PE~LD

,,.210

U8U
Tl'8()X
UII8X
n3U

12132
E212
12P2
B2Q2

'''2110

The status posted in the receive line ICi vas expected to be 1'1400'.
The status bits in
Reg X'15'
Bits
0.0
0.1
0.2
0.3
0.11
0.5
0.6
0.7
1.0-1.7

o
o
o

e+~Or

are in Register X'15'.

DescriPtion

lell
tlHs

Abort Detect
0.0
Porililt Exception
14.1
Char Over/Under run
0·2
Data Check
111.3
BSC bad PAD flag
111.4
Ball
0.5
Leading DLE Error
14.6
Length check
14.7
15.0-7
lCIl byte 15

ERRoa CABD

PEALD

PETlltI

£!ll!§ J.2!OUIQ!i nUllL nli.!!.l!lL
X793

OX 16

o

C'.,"

TF80X
TrSU
Tr/fIlX
Tr32X
'lP501

P-570
'-580
,-590

Refer to BSC P.eoeive state transition 19.

Register 1'15' contains the incorrect PCP (bits 0.0-0.31, BPCP (bits 0.• 11-0.71, sequence bit (bit
,.0) •

ERROD CARD

PEALD

FETHI!

£!llnl It.9£!I!Q! fAlill!!2. U!iUQ.

i

"

E2112
12B2
12K2
1I2R2
E2J2

The PCP/1IPCP should be 7/4 with sequence bit 13.0 off.

"

i

UU/l.lL

1793

OX 11

l!2E2
l!21;12
l!2K2
E2R2
l!2J2

TF80X
TF81X

F-570
F-5~0

,·590

TPIIIIX

U32X
Tr50X

The PCP/EPCP should be 7/6 with sequence bit 13.0 off.

Defer to BSC Receive state transition 58.

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4·0,.7), sequence bit (bit
,.0) •

o

o
o

ERROR CABD

PEUD

PET II I!

QQl!ll 1Q£AI!Q! fAlill!Q

EAlill!Q

OX27

F.440

X793

E362

TES1X

lCIl bit 13.1 should have been set on.
ERROB CABD

X793

QQl!1il l.!1gllQ!!

PEAtD

FETIII!

fA~!!Q_

f!li!!!lL

OX 18

Tl'221
TF8U
"fP801
Tl'481
',fPlU

F-150
F-210
F-2/fO

!!2N2
B2B2
B2E2

E2'2
B2Q2

o

The status bits in error are in Register X'lS',

o

Reg 1'15'
Bits
0.0

Type 3

Co~munication

Description
Abort Detect

.

~canner

IF',f

lCIl
Bits
0.0

IBI 3105 COIIUHICATIOHS COHTROLLER
Tl~B 3 COKftUHICATIOIS SCAHRBa 1fT Sl.~TO. IIDBI
0.1
0.2
0.3
0.11
0.5
0.6
0.7

,.0-•. 7

ror_at Exceptioll
,II.,
Char o,er/Under rvu
0.2
Data Check
111. :I
BSC bad PAD flag
BOft
0.5
Leadin~ OLE 8rror
111.6
Lenqth Check
111.1
ICII byte 15
15.0-7

E880B CUD
sgD! IdlGAn2.1!
1793

011&

1199-3705E-09

82l!2
82B2
82K2
82R2
82J2

'".• "

PBUD

rnll

U801
U8U
Tl'''1IX
!P:l21
'frSOX

r-570
r-5eO
r-590

iW19_ lW19..

'fhe PCr/8Pcr should be 7/6 with sequence bit 13.0 off.
and 57.

Refer to BSC Recei,e state transition 10

Register X'15' contains the incorrect pcr (bits 0.0-0.31. BPCP (bits 0.1i-0.l1, sequence bit (bit

,. In·

The progra. forced state 7/4, 13.0 off prior to this challge.

1793

BBBoa CABD

.BALD

rlTRK

~RI

J,R~Ulg1

UW9

16iJ.1!9

OUA

UB2

TEB1X
,

,/

ICII bit 13.1 should have been set on.
BBBoa CUD
1793

rEALD

fBTIft

TP22X
.,,811
'fraOX
nllel
'fPlIIX

r-150
r-210
r-240

~RI

1I9£aU2! 16iIl9_ Uli.!!!!l_

OX 1B

B212
82B2
82B2
!2P2
8202

The status posted in the recei,e line ICII was expected to be

X'OC06~.

The status bits in error are in Register X'15'.
Beg X'15'
Bits

Description

ICII
Bits

0.0
Abort Det ect
0.0
roraat Exception
1Q01
0.1
Char over/Ullder run
0.2
0.2
Data Check
0.3
111.3
0.11
BSC bad PAD flag
14.11
0.5
801
0.5
111.6
Leading DL8 8rror
0.6
0.7
Length Check
111.7
15.0-7
1..0-1.7 ICII bfte 15
ERBOR C.UD

PElLD

PETRK

ox 1e

'f1'821
'fr80X
!pa1l
TPII4X
TP321
U50X

r-570
P-580
P-590

'~

--

'

SQQ! IoQ£AU2l!. iW!!2- fAiB!!2X793

B2P2
82E2
B2B2
821t2
B2R2
82J2

The PCP/EPcr should be 7/8 with sequence bit 13.0 on.

Refer to BSC Receive state transition 611.

Register X'15' contains the incorrect pcr (bits 0.0-0.3), BPcr (bits 0.11-0.7), sequellce bit (bit
1.0) .•
The progra. forced state 7/11 with sequence bit 13.0 off prior to this challge.

(.
7.1.1911 1C3705HU

Type 3 COlllUllication Scanner 1FT

t

o
o
o
o
o
o
o
o
o
o

XBft 3705 COKKUMIClTIOHS CONTBOLLBa
TtPB 3 COlftUN1C1T10BS·SC1H.BR 1FT SY.PTOI INDBX
BaaOR CARD
X793

FElL 0

D99-3705E-09

FBTII

s;QQB

L2!lAIlQ!!'

UliUQ_ fW!lL

OX 1D

B2B2
B2B2
!l2K2
!l2R2
B2J2

U80X
TP811
TPflU
TP32X
tr50X

r-510
r-580
r-590

The PCP/BPCP should be 7/e with sequence bit 13.0 on.
Register X'15' contains the incorrect pcr (bits
1.0) •

Refer to BSC BeceiYe state transition 63.

O.O-O.~).

BPcr (bits 0.4-0.7). sequence bit (bit

The program forced state 7/11 with sequence bit 13.0 on prior to this change.
BRROB CABD
I.ggUQ.!!

£2n!
X793

OX 1B

B2B2
B2B2
B2K2
B2B2
B2J2

PBALD
PBTftK
EAliIIHL fA!ili.!!2_
treox
tr81X
'rPliU

P-570
r-5eo
P-590

!P32X
tr50!

The PCP/BPCr should be 7/4 with sequence bit 13.0 on.

Befer to BSC BeceiYe state transition 65.

Regbter X'15' contains the incorrect pcr Ibits 0.• 0-0.3), EPcr (bits 0.4-0. 7) ~ sequence bit (bit
1.0).
ERROR CABD
X793

FEUD

FBTI'III

TB211X
tr60X
U80X
TP4eX
TPII2X

P-1I80

~DI

I.2S;UlS!1I UliliJU!_ UlilltlL

OX 1P

B3K2
B2C2
B2B2
B2r2
8282

Tbe data receiYed and buffered does not egual tbe data expected.
the expected data; byte 1 contains the recei,ed data.

o
o
o
o
o
o
o
o

Register X'15' byte 0 contains

Register X'16' contains the address of
the nusber of bytes tested (byte 0) and the nusber of bJtes resaining to bo tosted (byte 1). The
contents of register X'16' plus 2 is the address of the next byte in the expected data buffer.
The contents of register X'16' plus 4 is the address of the next byte in the receiYod data bufter.
1193

0127

See error stop alter OX1'.

X793

OX21

See error stop after OX1A.

X795

Pull storage cycle Steal Test

This Routine cycle steals fifty bytes of data into storage locations starting at a buffer in low storage
and adding X'II000' to tbe address on each pass until aaxiaua storaqe has been reached. This routine
depends upon the operation of the scannor in internal wrap eode. thus lost of the error stops can be
better analyzed yia routine 1195.
ERROB CARD
X795

FEUD

rETlI1I

!l2!!B

l&gfiQ!! Ui!!2lL iAi!!lL

0101

23r2
B2D2
E2J2
B3R2

TUOX
TP62X
U501
TE.26X

r-530
P-550

A set .ode intertupt failed on the receive lioe (address in Register 1'11'.
Display Reqister 1'15' to deter.ine the caose of the error.
Reg 1'15' Description
0001
0002

No set ~ode L2 occurred.
Interrupt fro. wrong line - Reg X'll1'

Type 3 Co ••uoicatioD Scanoer 1PT

lC3705HAA 7-.1.195

1795

0003

not equal to Reg X'll'.
Feedback check error.

ERROR

C~RD

PEUD

~QU

J.Q£!UQ'!! !!!!i!''!!Q .. l!A!i!l!!Q_

OX02

E3F2
B2D2
B2J2
E3B2

PEUlI

TE20X
TF62X
TF50X
n26X

1'-530
1'-550

A setmode interrupt failed on the transmit line (address in Register X'11').

Display Register X'lS' to determine the cause of the error.
Beg X'lS' Description
0001
0002
0003
ERROR CUD
09S

No setmode L2 occurred.
Interrupt from wrong line - Reg X'IQ'
Hot equal to Reg X'll'.
Feedback check error.
FETIIII

FEAtD

~!!~

J.Q£!IIQ!!

!!!!i~'!!Q ..

UQE!!Q_

OX03

R2B2
E2B2
E2K2
E2R2

TFBOX
TFB1X
TF411X
TF32X

1'-510
1'-580
F-S90

The PCP/EPCI' should be 9/4 with sequence bit 13.0 off.
2, 3, 4, Sand 45.

Refer to BSC Transmit state transition 1,

Begister X'lS' contains the incorrect PCP (Bits 0.0-0.3), EPCI' (bits 0.4-0.7), sequence bit (bit
1.0) •
ERROR
X795

C~RD

FEUD

FETIII!

TI'60X
TI'80X

F-S70
F-S80
F-590

~QU

J.Q9UQ'!! !!ID'!!Q.. l!AliE'!!Q_

OX04

E2C2
E2E2
E2B2
B2lt2
E2R2

nS1X

TF44X
TF32X

The PCF/EPCF should be 7/4 with sequence bit 13.0 off.
2, H, 25, and 26.

Refer to SSC Receive state transition I,

Register X'lS' contains the incorrect PCP (bits 0.0-0.3), EPCF (bits 0.4-0.7), sequence bit (bit
1.0) •
ERROR C"RD
X795

FEUD

FETIII!

~Q!!~

!:Q£AIIQ'!! l!ID'!!Q..

OX OS

E2E2
E2B2
E2K2
E2R2

TFBOX
TF8U
TF4qx
TF32X

The PCF/EPCf

fA!i~'!!Q_

F-S10
F-S80
F-590

s~ould

be 9/5 with sequence bit 13.0 off.

Refer to BSC Transmit state transition 32.

Regi$ter X'15' contains the incorrect PCF (bits 0.0-0.3), EPCF (bits 0.Q-0.7), sequence bit (bit
1.0) •

X795

ERROR

C~RD

FEALD

~!lg

r.Q~!I!Q'!!

U!ill'!!Q.. f!!!kO.!!2-

OX06

E2E2
E2F2
83L2

TFSOX
TFQS'X
TE40I

A L2 interrupt

FETII~

1'-560

VIIS

expected frow the receive line.

Refer to DSC Receive state transition 7S.

Either the interrupt did not occur (Register X'14' equal zero), or the interrupt vas from the
wrong line (Register X'14' not equal Register X'11').

7.1.196 X3105HU

T,pe 3 Communication Scanner 1FT

"'-__ 7'

o
o
o
o
o
o
o
o
o
O.. ·

~PM

41Q5

1Y~E ~

CQn"Uq~C~~lQ"~ OQ"TftO~~~ft

COKKUHICATIOlS

BRROR CABO
X795

5C~HHER t'~ SYKP~O.

rEUD

FET!!II

£Q~!l

I&llAUQl! U!lll!!5h. lUll!!!.!..

0107

E212
E2P2
!3~2

U801

'!:F481
TE401

p99-~1Q5E-09

INDEX

F-550
'-560

A t2 interrupt was expected from the transmit line.
Bitber the interrupt did not occur (Register X'14' equal zero), or the interrupt was from the
wrong line (Register X'14' not equal Register X',,').
ERRO .• CABO

!;QRl I.2llAnQ!l
X795

OX08

E3K2
E2C2
E2E2
E2F2
E2H2

fEAt 0
U!ul!9~

TE211X
Tl'60X
TFaOX

FETKII

U§:§!!Q_
F-1I20
F-1I80

TFIISX

TF42X

The data received and buffered does not equal the data expected.
Register X'15' byte 0 contains the expected data; byte 1 contains the received data.
Register X'16' contains the address of the number of bytes tested (byte 01 and the number of bytes
remaining to be tested (byte 1). The contents of register X'16' plus 4 is the address of the next
byte in the expected data bUffer. The contents of register X"6' plus a is the address of the
next byte in the received data buffer.
A failure to co.pare the data correctly can result if the cycle steal operation did not function
correctly. You should compare the results in the receive and send buffer.
If the receive buffer is clear, suspect the lCII cycle steal address byte X circuits.

~.,

·C

X797

SSC Transparency Receive - US1SClI

EP

Transmit LCO:4

Receive LCO:6

This routine checks for correct control character deletion with an LCD of 6. This routine uses Diag 0=1
(scanner wrap) and the transmit line uses Oiag 1=1 (PCF/EPCF:9/CI. cycle Steal is used by both lines.

'I.
.1.".'

ERROR CABO

.

1,!

o
c
o
o
o

o
o
o

X797

FEALO

FET""

'l'E20lf
TF62X
TF50X
TE26X

P-220
F-550

£Q!!~

I.Q!;AUQ!! f!!lll!!Q_ !,!Q!.!!.!L

OXOl

E3P2
E2D2
E2J2
E3R2

A set mode interrupt failed on the receive line (address in Register ]f'lf').
X'15' to determine the cause of the error.
Reg X'15'
0001
0002
0003

Display Register

Description
No set mode L2 occurred.
In·terrupt froll wrong line - Reg X'1Q'
not equal to Reg X.t,'.
Feedback check error.

ERROR CARD

FEALD

FET!!!!

0102

TE20X
TF62X
TP50X
TE261

F-220
F-550

£!!Rll LQ!;!U2!! f!!il22X

ERROR CARD
X7Bl

FEUD

0~6-1.7).

PET!II

~U

Io.QSOUIQ!i

UliIltQ

fAg)lt!!

OXOB

E2E2
12B2
B2\(2
B2R2
B2012

Tl'SOx
Tt>Slx
TPII4x
TP32x
Tt>50x

r-570
P-580
r-600

The PCP/BPCr should be 9/2 with sequence bit ll.0 off.

Refer to BSC Receive State transition 75.

Register X'15' contains the incorrect PCP (bits O.O-O.l), EPcr (bits 0.11-0.7), and sequence bit
(bit 1.0).
ERROR CARD
X7B3

FEUD

rETlI1!

!<2!!1 I.2!Sn
Tr60X
trll21
'fF221

F-IIIIO

o

'82B2
l!2C2
B282
112012

The transmit line SOP should contain 1'0137',.
The incorrect SOP data is contained in Register 1'15', (BITS 0.6-1.71.
ERROR CARD

x7B3

FEUD

PET II I!

£Q!!! . J,QgUQ!!

fill!!Q

illll!!Q

OXOP

TESn
TE221
TP60X
!P32X
TPII8X
TP311X

P-160
P-210
P-240

o

E2112
B3B2
E2C2
l!2B2
B2P2
B202

The status posted in the transmit line lCW vas expected to be X'0098'.
The status bits in error are in Register X'15'.
Beg X'15'
Bits
0.0
0.1
0.2
0.3
0.11
0.5
0.6
0.7
1.0-1.7

o

o

rETK!

U,!UltQ

The trans. it line sOP should contain X'012d'.
The incorrect SD' data is contained in Register X'lS', (BITS

o
o
o

12B2
E2C2
1282
l!2012

PEltO

099-37051-09

Description

Abort Detect
0.0
Format Exception
111.1
Char Over/Under run
0.2
Data Check
111.3
BSC bad PAD flag
111.11
BOil
0.5
Leading DLB Error
111.6
Length Check
14.7
ICII byte 15
15.0-7

ERROR CARD

PE,uD

E2E2
E2B2
E2K2

T1'80x
Tl'81x
'f1'44x
Tl'32x
TF50x

!<2I!l< l.Qg!.l!l1i UIi.t;liQ
X7B3

Ox 11

l!2R2

E2J2

ICII
Bits

FETIIII

fAgllltQ
P-570
F-580
P-600

The PCl'/BPCP should be 9/2 with sequence bit 13.0 off.

Refer to esc Receive State transition 62.

Register 1'15' contains the incorrect PCl' (bits 0.0-0.3), BPCl' (bits 0.11-0.7), and sequence bit
1.0).

(bit

Type 3 Communication Scanner 1FT

X3705HAA 1.1.221

len 310~ CORROHICATIONS CONTROLLER
TYPE 3 COftRONIC1TIONS SCANNER 1FT SYftPTOft I.oBI
IRROB CARD
X783

FEUD

FEun
iA!illl!!

U81X
TP60X
TP42X
n22X

F-440

~n

L2W!2!!' UiEl!2

OX13

1282
12C2
1282
12J2

099-31051:-09

The transmit line SDF should contain X'01c1'.
The incorrect SOF data is contained in Register X'15', (BITS 0.6-1.7l.
ERROR CARD
X7B3

PEUD

FETIII!

£2.!!1

J.Q!;A:HQl! U!iJ!Q

RA!i!!U!

OX15

12E2
12B2
E2K2
12R2
12J2

P-S70
p-580
P-600

U80x
TF811t
'rF44x
TP32x
'!PSOx

the PCP/EPCP should be 9/3 with

se~Qence

bit 13.0 off.

Befer to BSC Receive State transition 69.

Register X'15' contains the incorrect PCP (bits 0.0-0.3), BPCP (bits 0.4-0.7), an4
lbit 1.0).
EBBOR CARD
X783

FEiLD

~U

J.2SU!!!! U!iI!!2

OX 17

12B2
E2C2
B282
12J2

TP81X
TP60X
TF42X
TP22X

se~uence

bit

PE'f""

U§J.1!2
P-440

the translit line SOP should contain X'0110'.
'The incorrect SOP data is contained in Begister X'lS', (BITS 0.6-1.7).
ERROR CARD
X7B3

FEUD

£2ll!

J.QgllQ! Eill!2

OX19

1212
12B2
12K2
12R2
B2J2

nBOx
'frB1x
'fF4qx
TU2x
TF50x

FE'f1l1l

U!ill!!!
P-S70
r-580
P-600

The PCP/EPCP should be 9/4 with

se~uence

bit 13.0 off.

Befer to BSC Receive State transition 76.

Register X'15' contains the incorrect PCl (bits 0.0-0.3), EPCP (bits 0.q-0.7) , and sequence bit
Ibit 1.01.
EBROR CARD

!;!Ill! L29nQ!
17B3

OX21

E2E2
12B2
E2112
E2R2
E2J2

PEUD

FETRI!

iAiUQ

U!i!!!!!

TP80x
ue1x
TF44x
TF32x
TP50x

P-S70
F-5BO
'-600
"«-- -

The PCP/EPCP should be 9/4 with

se~uence

bit ,3.0 off.

Befer to BSC Beceive State transitioll 1Sa.

Register X'1S' contains the incorrect PCP (bits 0.0-0.3), EPCF

~its

(bit 1.01.

BRROR CABO
17B3

FEUD

se~nence

bit

UTilI!

!;Sly!

~Q£AI!Q!

f!2lBQ

iAi!!Q

OX23

B2B2
32C2
E2H2
E2J2

US1X

p-qQO

n60X
n42X
'l:P221 .

The transmit line SDP shonld contain X'012d'.
The incorrect SOP data is contained in Register X'15', (BITS

7.1.222 X3705HAA

0.4-0.7), and

0.6~1.7).

Type l CO.lnnication Scanner IPT

..",

o
o
o
o
o
o
o
o
o
o

D99-370SB-09
laBoa CAlID

X783

0127

!2B2
1282
12n
B2R2
B2.12

'fPBOz
UB1.
'f, .... z
'rP32z
USOz

PlTIIII

1!!l1lH9
p-S70
r-5BO
'-600

Refer to 8SC Receive State transitton 25.

Register X'15' coataius the incorrect PCP (bits 0.<1-0.3). BPCP (bi'ts 0.4-0.7), and sequence bit
Cbit 1.0t.·
BIROR ClID

nUD

mil li9SU1911 Uillt9
X7B3

0129

B282
B282
B2lt2
82R2
12J2

'Ira 01
'fP81x
!P'''I
'fP321

PlUII

lAliI!!!
P-S70
P-580
'-600

'fFSOz

The PC'/IPC. should be 91" with sequence btt 13.0 off.
Register
(bit hOI.
BRROB CARD
LQgn21

SQRI
x783

0131

B282
12e2
B2U2
82,.,2

xt

Refer to 8SC Receive State transitton 1_a.

l!i t contains the' 1ncoj:rect E'C' (Uts 0.0-0.31. !E'C' (bits 0.11-0.71, and sequence btt

PBAtD

PlTIIII

iWl9

iWl9

'fr81X
'fF60X
'fP.. 2X
U22X

.-",,0

The trans. it line SD. should contatn l'012d~.
The tncorrect SD. data ts contatned in Begtster X'15', (BITS 0.6-1.7).

U

X7BII

BE'Q Ift_,00 Transsit Test -- IE' 1I0de. BBCDIC

zg2tl!1 DJ!!lllillQl

If1

'!his routine tests .tate transitions changed for thts BE'Q ICI bit 13.5.

"

o
o

1.!!£!U9! i!!lI!9

The PCP/BPCP ShOlld be 9/_ wtth sequence btt 13.0 on.

"
Ii

o
o
o
o
o

nUD

~U

The data streas used tSI SOU ITS DLI ITS ITB DLI I'fB.
The state transitions tested are: 72 29 25 1111 (with ICW bit 13.5 onl
21 25 20 (wtth ICI bit 13.5 offl •
BBBOR CARD

PBUD

mJ!l liQSWQI iWIQ
X7811

OXOl

B3P2
B3R2
12J2
B2D2

'fBlOX
TB261
'fP50X
'fP621

PlUII

lA!iD!l
'-220
r-55Q

A Set 1I0de interrupt failed on the transsit line (Address in Begister X'11'1.
X'15' to detersine the cause of the error.

Display Begister

.

Beg X'15' Description
0<>01
0002

0003

No set sode L2 occurred.
Interrupt fro. wrong line - Beg X'14'
not equal Beg 1'15'.
Peed back Check error.

'Iype 3 Cossunication Scanner IF'!

X370SHAA 7.1.223

I8H 3705 COftnUH1CATIONS CONTROLLER
TYP! 3 COBBDH1CA'1'IONS SCANN~ft 1fT StKPTon 15011
EBBOB ClBO

X784

1'ElLO

099-31051-09

FETBB

QaQ!

LQ~I!Q!

f!§!!Q

fl§j!~

OX05

E2E2
l!2B2
E2K2
l!2ft2
l!2.:J2

T1'80x
Tl'81x
nll"x
'1'1'32x
T1'50x

'-570
1'-580
1'-600

The PC1'/EPC1' should be 9/2 with sequence bit 13.0 off.
',2,3,4,5.

Befer to BSC Receive State transitioQ

Register 1',5' contains the incotrect PCP (bits 0.0-0·.3), IPC1' (bits 0.11-0.71, and sequence bit
(bit ,.0).

E880a CABO

X784

sgQ!

PEAt 0

fA§!!Q

PETSII

LQ~!4!Q!

OX07

E2E2
E282
!2K2
l!2B2
l!2J2

TP80x
TP81x
Tnllx
TP32x
U50x

1'-570
1'-580
1'-600

Rlgj!Q

The PCP/EPCP should be 9/4 with sequence bit ,3.0 off.

Refer to BSC Receive State transition 72.

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPC1' (bits 0.4-0.71, and sequence bit
(bit ,.0).
ElIlIoa CARD
n811

UUO

UTilI!
Ulill.!i2

'1'1'811
'l'1'601
TPII21
TP221

p-II110

~12l

I.9S!UQ! EAiIliQ

OX09

E2B2
B2C2
B282
B2J2

The transmit line SOP should contain X'010,'.
The incorrect SOP data is contained in Register 1',5', (BITS 0.6-,.7).
EIIIIOR CAIIO

PEALO

OXOB

n80x

QaRlI L9SAIIQ! fl!iI!Q
lC7BII

B2E2
B2B2
E2K2
B2112
112'12

US, x

Tl'II"x
Tl'32x
TP501

FETIIII

R!g!1Q
P··570
1'-580
F-600

The PCP/BPCf sbould be 9/4 witb sequence bit 13.0 off.

Befer to BSC Receive State transition 29.

Register X'15' contains the incorrect PCP (bits 0.0-0.3). BPeP (bits 0.11-0.7), and sequence bit
(bit 1.01.
ERROR CARD

X784

PEALD

~Rl

1Q£!I!Q! fA§!!Q

OXOC

E382

TEen

PET"n

f!2!!Q
F-III10

ICW bit 13.' should have been set off.
BRROR CABO

X7all

FEUD

FETIIII

£QQlI LQ!cAUQ! UU!!Q

Ug1!2

OXOO

F-4110

E2B2
E2C2
E282
E2J2

US1X
U60f
U142X
TF221

The transmit line SDP should contain X.Ol'f·~
The incorrect SOP data is contained in Register X'15'.

7.1.224 X37058U

(BI~S

0.6-1.7).

~ype

3 comaunication Scanner 1FT

o
o
o

o
o

IBI 3705 COIBUIICA'tOHS COM'BOLLIB
TI'I 3 COBBUIICATIOIS SCAIIII 1FT SI'PTOI IMDII
IIROB CABO

X7BII

rB'fBB

m1!1 IdlWW UiJG

IUU9

OIOP

P-510
P-5BO
r-600

1212
12B2
12K2
1212
12.12

trBOx
'flBlx

"""x

'fl32x
tr50x

Tbe PCP/IPcr sboQld be 9/" witb sequence bit 13.0 on.
Register 1'15'
1.0).

~bit

o

o
o
o

PBALD

099-37051-09

17BII

IIROB CUD

PIlL 0

~l!!l

~W!!2

L9~U19!!

OX". 12B2
12C2
B282
!2.12

TrB1X
'fF60X
'fFII21
"22%

con~ains

Refer to BSC Receive State transition 25.

tbe incorrect PCP (bits 0.0-0.31. BPC' (bits 0.4-0.1), and sequence bit

rBTIIB
lUI!!!!
P-IIIIO

'fbe trans.it line SOP sbould contain X'0110'.
Tbe incorrect SDP data is contained in Register 1'15', (BITS
EBROR ClRD
&!!Il§ Idl£aU2l!
X7B4

0113

o

B2B2
B2B2
E2K2
E2R2
E2.:12
~he

PBlLD
2W!!!!
'fl!lOx
T!W1x

'fP"lIx
'fl32x
'fl50x

0.6-1~7).

PE'f1l1l

lMillUl
P-570
'-580
P-600

PCP/BPCP sbould be 9/11 witb sequence bit 13.0 off.

Refer to BSC Receive state

tr~nsition

"".

Register 1'15' contains the incorrect PCP (bits 0.0-0.3), BPCP (bits 0.11-0.71, and sequence bit
(bit 1.0).
BIROB CliO

mill r&gngl!
UBII

o
o
o
o
o

0115

12B2
12C2
11282
12J2

fEUD
2WI!!

PBTIIII
tUllE

TF811
'fF60X
'frIl2X
Tr2211

1'-",,0

The transsit line SOP should contain 1'011f'.
The incorrect SOP data is contained in Register 1'15', ,BITS 0.6-,.7).
PllLD

PET!!

£21!l

IRROB ClRD

I.2£aIl21

~W!!2

lAilE

0117

12B2
B2B2
B2K2
B282
B2.12

'fr80x
'fl81x
trllllx
'fl32x
tr50x

P-570
P-580
,-600

The PCP/BPCP should be 9/,,'with sequence bit 13.0 off.
Register 1'15' contains the incorrect PCP (bits
(bit 1.0).

Type 3 Cossunication Scanner IPT

Refer to BSC Receive State transition 21.

0.0~0.3),

BPCP (bits 0.11-0.7). and sequence bit

137058AA 7.1.225

,f

'\C '

ID" 3105 CO!ftUKICATIONS CONTROLLER
TtPI 3 CO""UKICATIO.S SCANHIR 1fT StIPTO! IMDEI

X1M

ERROR CARD

PULD

PETI!

£2~E

L2~1.1e!

2l§E!Q

iAiE!Q

0119

1212
12B2
1212
12R2
12J2

Tr80x
Tr81x
Tr411x
TP32x
TP50x

P-570
f-580
P-600

The PCP/BPCP should be 9/4 with sequence bit ll.0 off.

D99-31 051-09

Ie fer to BSC Receive State transition 25.

Register 1'15' contains the incorrect PCP (bits 0.0-0.31. IPCP (bits 0.4-0.1), and seguence bit
(bit 1.0).
IRROR CARD

X7B4

PlAtO

~U

12£An2! twl!2

0121

B2B2
E2B2
E212
12R2
E2J2

Tl'80x
Tr81x
TPllllx
'fPl2x
TP50x

PETIII!

21m2
P-510
P-580
,-600

The PCP/EFcr should be 9/4 with sequence bit 1l.0 off.

Refer to BSC Receive State transition 20.

Register X',5' contains the incorrect FCP (bits 0.0-0.3), EFCP (bits 0.4-0.7), and sequence bit
(bit 1.0).
E8801l CUD
17B4

PULD

PET I! I!

~QD!I

L2~Ul!Hf

UUI!2

U!iUQ

0123

B2B2
B2C2
B282
12J2

TP8n
TP601
Tr42X
TP221

P-440

The transsit line SDF should contain X'011f'.
The incorrect SDP data is contained in Register 1'15', (BITS 0.6-1.7).
X7B6

RFQ EOljl00 ReceiYe Test -- IF "ode

This routine tests the receive function changes for this RFQ.
The data streas used is: StN StN ITB STX ITB DLE ITB.
The state transitions tested are: 1 2 111 15 25A 26 10 19.
BRROR CARD
X1B6

PElLD

PETII!

£2~E

L2~1I!Q!

fW!2

!!!!iUQ

OX01

131'2
1382
12J2
B2D2

TElOX
U26I
TP50X
Tr62X

P-220
F-550

A Set !lode interrupt failed on the receive line (Address in Register Xll1').
X'1s' to deter.ine the cause of the error.

Display Register
1

Reg X'1s' Description
0001
0002
0003

Mo set sode L2 occurred.
Interrupt frOB wrong line - Beg X'111'
not egual Reg X'15'.
Peedback Check error.

(
7. 1. 226 X37050U

Type 3 Co.sunication Scanner 1FT

o
(J

181 3'05 COanO"ICATJOHS CONTROLLER
TYP! 3 cOlaUNICATIORS SCARNEa 1fT SY"~TOa INDEX

o

EaBOB CABO

X7B6

iAUIQ

OX02

tElOX
'U26X
TF50X
'U62X

P-220
F... S5q

Display Begister

Beg X'15' Description
0001
0002
0001

X7B6

Ho set 80de L2 occurred.
Interrupt tr08 wrong line not equal Beg X'15'.
Peedback check error.

EBBOB CABO

rEAL 0

FETIIII

SQQ!

~~illQI

UU!!'Q

EAiUQ

OX03

l!2E2
E2B2
E2K:;:
B2B2
E2J2

nBOll
TFB1l1
TFlllIlI
TF32l1
Tr50ll

P-570
F-580
f-600

Be~ X'1~'

The PCP/EPCP should be 5/1 with sequence bit 13.0 undefined.
transition 1.2,111.

I'tf!
'-JY

Befer to SSC Beceive State

Begister 1'15' contains the incorrect PCP (bits 0,.0-0.3), !PCP (bits 0.11-0.7), anlS sequencD bit
(bit '~Ol'

o

[

E3P2
E3R2
B2J2
B2D2

rETlII
U!il!!.!l

A Set aode interr ',Ipt failed on the transai t line (Address in Begister X" 1') •
X"15' to deter.ine the cause of the euor.

o

o
o
o

rEUD

k2R1 bQ£W.QJ!

X7B6

EBROB CABO

PEALD

FETIIII

~Q!

~Q~lI!QJI

flUJlQ

i!iE!2

OX 011

E3B2

TEB1X

ICi bit 13.3 should have been set on.

'

SQQ!

~9nQ!l

l'!AtD
fAiJalQ

FETIII!
nilH!Q

OX05

E2H2
B3B2
B2C2
E282
82P2
B202

TEB1X
TB22X
TF60X
TF32X
TFIIEI
TF311X

F-160
F-210
f-240

EBBOB CABO
lC1B6

••••

o

The status posted in the receive line ICW was expected to be I' 0000' '.
The status bits in error are in Register X'lS'.
Beg X'lS'
Bits

o
o
o

0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1.0-1.7

X7B6

Description

0.0
Abort Detect
111. ,
Porllat Exception
Cbar over/Under run
0.2 '
Data Check
'".3
BSC bad PAD flag
14. II
0.5
EOII
Leading OLE Error
14.6
Length Check
111.7
ICII byte 15
15.0-7

ERROB CABO
£QU I.Q~lnQ!l

fAi!!!.!:!

UilJlQ

0106

TEa1x

F-4'10

B3B2

ICW
Bits

FEALD

FEUI!

lCIl bit 13.3 should have been set off.

o
Type 3 Comllunication Scanner 1FT

X37058AA 7.1.227

1

."" ,

IBn 3'06 COK!UHXCATIOIS cOMTaOLLIR
TtPI 3 connuaICATIOIS SCAMSBB XFT St!PTO! INOBI
BRROR CABO
X1B6

nuo

~111

JJ!SAU2I IAUJUI

0108

12M2
!l82
12C2
12R2
1212
12Q2

'U8n
TE22X
'fF601
'fU2X
'fFUX
",3111

nTl!
IWIl!l
F-,60
F-210
1'-2110

The statuB posted in the

~eceive

line ICW vas elpected to be X'OOOO'.

The statuB bits in error are in legister 1"5'.
Beg X'1S'
BUs
0.0
0.1
0.2
0.3
0.11
0.5
0.6
0.1
'.0·1.1
BRBOB CARD

X7B6

Description

ICII

Uts

,/I.

Abort Detect
0.0
1
Fornt Blception
Cbar over/Under run
0.2
Data Cbeck
111.3
8SC bad PAD flag
1/1.11
BOft
0.5
Leading OLB B~ro~
111.6
J.angt h -Check
15.0-1
ICW bft8 15

'''.1

rllLO

rlT!K

gj~

JJ!l:AlliI EAiJllQ

11012

OX09

1212
12B2
B212
12R2
12.]2

F-S'O
1'-580
F-600

TraGI
'fFa,x
TPllfII

tl'321
Tr50z

The PCF/IPCP sbould be '/11 vitb seguence bit 13.0 off.

Befer to BSC Recei .. State transition 25a.

Register X'15' contains tbe incorrect pcr (bits 0.0-0.1), BPCr (bits 0.11-0.1), and seguence bit
(bU 1.0).
BRROR CABO
X186

l'BALD

~RI

LIll:Ul!2! UUIQ

OIOB

12N2
11B2
B2C2
12R2
B2F2
1202

'!I8U
fU2X
Tl'60X
!F32X
'fF1I8X

PlU!
IWl!!
r-160
F-210
F-2110

/-

/"

Tl'lllX

Tbe status posted in tbe receive line ICI vas expected to be X'1I020'.
Tbe statuB bits in error are in Register X'1S'.
Reg X',S'
BUs
0.0
0.1
0.2
0.3
0.11
0.5
0.6
0.1
1.0-1. ,

Description

ICN
BitB

Abort Detect
0.0
For.at Ixception
111.1
Char over/Under run
0.2
Data Cbeck
'11.3
BSC bad PAD flag
Ion
0.5
Leading Dtl Error
'11.6
Length Check
111.1
ICII bfte 1!:
,5.0-'

'"."

/

EBBOB CABO

PElLO

l:!lD! JJ!l:All!l! EA§!!Q
X1B6

OXOC

1382

FET!!

iAillQ

TE8U

ICII bit 13.3 should have been set off.

(
'.1.228 X3'058AA

-

.

o
o

o
o

o
o
o
o
o
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u
o
o
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18K l?05 COKftUNICAT~O"S CONTROLLER
TYPE 3 COKKO"IC~TIONS SCAN"!a 1FT SYMPTOK INDEX

X786

ERROB CABO

PEAL 0

PEUK

£Q1l1

l&~I12!!

fA!!llH!

fAlil!!Q

oxtO

B2B2
B2B2
821(2
B2B2
1I2J2

TP80x
TP8b
TPIlllx
'l'F32x
tp50x

P-570
p-580
P-600

The PCP/BPCP sho 14 be

2/~

with sequence bit 13.0 off.

D99-310!iT!-09

Befer to BSC,Receive State transition 26.

Register X'15' contains the incorrect PCp (bits 0.0-0.3), EPCP (bits 0.11-0.7). and sequence bit
(bit 1.0).
EBROB CARD
17B6

F1I1LD

PETIIK

£Q1l1 I.Q£!IlQ!! U!!l!!2

fill!!Q

OX12

p-/lIIO

1I3B2

TE81X

lCW bit 13.1 should have been set off.
BBROli ClBD

X766

FEAtD

PETKII

£QU I.Q£!Il!l!! fill'!!Q

fllil.!!l!

OX20

p-510
p-580
F-600

1I2l!2
1!2B2
1!21(1
1!2B2
1I2J2

Tr80x
U8,x
Ullllx
u32x
Tr50x

The PCP/lIpeF should be 1/11 with sequence bit 13.0 on.

Refer to BSC Receive state transition 10.

Begister X'15' contains the incorrect PCP (bits 0.0-0.31, EPCF (bits 0.4-0.7), and sequence bit
(bit 1.0).
EBROB CARD
lC766

PEALD

PETIlII

£Q!!l LQ£AIIQ! fA!!l!.Q

Ellil!!!!

OX30

F-570
p-580
p-600

82E2
!!2B2
1!2112
8282
B2J2

TP80x
'TP81x
TPlilix
'rP32x
U50x

The PCP/EPCP should be 1/11 with sequence bit 13.0 off.

lIefer to 6SC Receive State transition 19.

Begister 1'15' contains, the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.11-0.11. and sequence bit
(bit ,.0).
ERBOB CABO

P1I1LD

FETlSft

112112
B2C2
B2E2
82p2
11282

U211x
TF60x
naox
TF48x
TP/l2x

p-II80

£Q!!l I.Q9Il!l!! U!!J.!!.Q
X766

OX 110

Ulil!.Q

The data received and buffered does not equal the data expected.
expected data.

Begister 1,,5' contains the

Register X'13' contains the address of the receive buffer byte in error.
the received \t"t;a, 114'''X787

Begiste~

X'lij' contains

X.21 LINB SET TEST

This is a manual interYsntion routine and runs only if directly selected or the CE sense switch is set
to run manual intervention routines.
This rootine tests the 1.21 tine Sets uuique handling of Data Set Beady (OSR) and Clear to Send (CTS).
The teansmit and receive lines lust be wrapped (the teansmit line's Transmit ('1') and Control ICI leadb
connected to the receive line' s Receive (8) and Indicate (I) leads respectively) via an external
facility. Reter to FET"" page 1-330 for wrap test block information.

Type 3 Communication Scanner IPT

13705"1A 7.1.229

,-

,(

IBa 3705 CORRUHICATIOHS COHTBOtLER
TYPI 3 COlftUHICATIOHS SC1NNIa 1FT StftPTOI INOII

099-37051-09

lost of the tests are perforsed on the transsit line with the results being checked on the trlnssit
Ind/or receive line. This routine should be run twice on a half duple. pair, reversing the addresses
specified as the translit and receive lines the second tise.
The purpose of this routine is to verify control functions; no e.plicit testing is done on the data sent
through the wrap connection. Use routine 17A8 for data analysis and to further verify the line set and
external wrap connection.
Be fer to logic page 'A017 for the

~ulper

inforlation.

,
,.

l

The following lanual intervention stops OCCur.

At stop P055, enter the routine options as follows:
SIIlTCH
8 COl
I ! Z 2

I ! Z3

2/100 BPS JUlipers Ire in delay position
21100 BPS Juspers are in no delay position

I 8 Z /I 11800 BPS Juspers are in delay position
I 8 Z 5 11800 BPS Juspers are in no delay position
I 8

Z

6 9600 BPS
9600 BPS

I 8 Z 7

I 8 Z 8
I 8 Z 9

/18K
'18K

BPS
BPS

Jllllpers are in delay position
Jlllpe rs are in no del,y position
Juspers are in delay position
Juspers are in no dellY position

where • • 0 If the routine is not to be looped without respecifying the sanual input.
• 1 If tbe routine is to be' looped without respecifying the lanual input.
y • 0
• 8

z

If internal 2400 BPS clock is to be used.
HOTI: This option is only valid for 2'100 BPS.
If e.ternal clock is to be used.

=

0 If thv line set is configured for non-switched half duplex operation.
• 2 If the line set is configured for non-switched duplex operation.

At stop P056, enter the transsit line address.
SIIlTCH
COl

i.

B

o

XI X

III

is the transsit line address as defined in the P001 sanual intervention stop code.

At stop P057, enter the receive line address.
SIITCH
8 COl

o XI

I

IIX is the receive lins address as defined in the P001 sanual intervention stop code.

At stop P059, disconnect tbe e.ternal wrap facility. This stop code will be bypassed if the loop option
was specified in response to stop code P055. Press STABT to test the fail safe circuits.
Ixcept for the set sode pretest errors (1X03 and 110111, error stops are lost likely caused by failures
in the line set cards, if the other type 3 scanner routines bave run successfully. Befer to logic page
'1000 for line set card locations. Anyone of the tbree cards of the lipe set could be causing the
error. This routine sakes no attespt to isolate fai~ures any further.
11IROli CARD

QQDI
X7B1

~Q~!l1Q!

PIAL 0

PETRR

OX07
All 1's were not detected in the SOP of the receive line.
transsitting all marks atter initialization.•
1880R CARO
~2DI

I7B7

',,-

fAi!!Q_ fAiI!2_

J.9~AI12J1

nAtD

The transsit line should be

nUll

i6i1J1Q_ i6iJB2_

OX08
DSB on the transait side was not active. DSB should be active on the transsit side of a duplex
pair when all sarks are being received.
'OTE: This stop occurs only if duplex operation vas specified.
BBIIOIi

QQU!

CARO
~~AIlQ!

7.1.230137058AA

PlAtO

PlTIR

f!§!!2_ fA§!!2-

Type 3 Co.sunication Scanner 1FT

.'

o
o
o
o
o
o
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o
o
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C:

11" 3105 cOanUHICATIOHS COI'BoLLaa
TYPB 3 coseU.leATloHS SCAHHaa IPT SISPToe IHDII
I7B7

0109

DSlI on the recehe side' was not Ilcti,e.
are being recei'.~.

I7B7

IRROB CARD

PEALD

~RI

UWQ_ l w a

LQ~

DSB shoula be active on the r,cehe side when all .. rks

PETsa

0108

OSR becaae ~nactive on the receive line too soon after diagnostic lode vas set on tbe transmit
line. PSR should stay acti,e at least 12 bit tiles after diagnostic m~e on the translit line
forced C and T off; and therefore, the recei,e line" I and B off through the external wrap
facility.

1787

IRBOR CARD

PElLD

'='221 IIQ"n!!!

Uilll2.. !!lill!2..

PB'llla

OIOC
OSR vas still acti,e on the recei.e line 22 bit tiles after diagnostic mode vas sat on the
translit line. DSB should have becoae inactive 17 bit tiles after 1 and a vent to O's.
EBBOR CABO
~RI

1787

PEALD

PITaa

L!!S;W!U! fWllQ_ iAliU2..

0112

All aarks vere·not detected in the recei.e line's SOP, 10 bit tiaes after the set aode iaterrupt.
vhlch resulted froa resetting diagnostic aode and aettlng DrR on the trlnsait line.
ERROB CABO

mu

X7B7

PEAL 0

PETI'II'I

IoSQUQI EW!!2.. iWI!L

0113

The I lead is active on the receive line before RTS bas been'activated on the transmit ltae. The
1 lead should be connected to tbe C lead on the transait line tbrough the external wrap facilitJ.

'I

"

o
o
o
o
o
o
o
o

ERROB CABO
~!!§

I7B7

PEALD

FETI'II'I

LSS;!UQ! UiUQ_ UW2..

0115

CTS is active on the transait line before RTS has been activated.

I7B7

ERROB CABO

PElLO

PETI'lI!

~!!l

EA~l!_

n~!2..

LS£!UQ!

0118

The I lead did not becoae active on the receive line after BTS (CI vas active on the transeit
line. The I lead should be connected to the C lead through the external vrap facility.
EBBOB ClBD
~!!!

1787

!!!S;Atl!!!

PElLD
~A[l!Q_

FETI'I!

iAli!!2..

0119

CTS beca.e act i.e less thaa 21 bit tiaes _fter BTS was set in tbe line set (1 was detected on the
receive linel.
BOTB: This stop occurs only if delay vas specified.
ERROR ClBD
m!!! 1I2gUQ!
17B1

PBALD

FET""

Um2_ Ulill!2..

0120

CTS did not becoae active witbin one bit tile with not delay,
was set in tbe liae set (1 vas detected on the receive line).
ERROR CARD

PEALD

s;Q1!1 Io2!;Ul!U!

U!Ui!2_ Ulill!2..

3,

bit tiaes with delay after BTS

PET!e

Type l Coa.unicltion SClaner 1FT

1370581A 1.1.231

IS" 31 05 CO~IIUNICATIONS COHTflOLLBB
TYPE 3 CO~MUNICATIONS SCANNER 1FT SyaPTO~ 1~DEX
1I:7B7

D.,9-31 Q!l E-09

OX22
DSR became inactive on the translllit line while a continuous space was being received for 22' bit
times when I was active (CTS active on the transmit line).
nOTE: This stop occurs only if duplex operation was specified.

X1B1

ERROR CARD

FEALD

FETIIII

(;Q.I!!1O

U~!1O!!Q_

U!ilB!Q_

tQ.~U!Q.!!

OX 23
DSR becomes inactlve on the receive line while a continuous space was being rbceived for 22 bit
times when 1 was active (RTS active on the transmit line).

X7B7

ERROR

CARD

!C, ,(bit.
(bit 1.0).

X1B8

BRROB CARD

P!ALD

rBTftll

£QDJ

~S!Il2l!

fAil!!!

fAil!!!

0121

!3112

TB811

P-440

4."-0.7~.

and

~ueJl.ce

bit

ICI bit 13.1 should baye been set off.

o
o
o
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Type 3 Co •• unication Scanner 1FT

13705HAA 7.1.235

IBM )105 COM~ONICATIONS CONTROLLER
3 COMMUNlCATIONS SCANNEa tfT SYMPTOH INDEX

D9a. fAil-ISh

OX16

8U5

Tr890
~e

The pcr/IPc, should

7/C vith seguence

~it

13.0 on.

Befer to ALC receive state transition (2),

III) •

legister X'1S' contains the incorrect PCP (bits 0.0-0.3), IPCP

(~its

(bit 1. D).

X7BC

IBBOR CARD

PBALD

PITla

sg~1

~~!t12!

IAiI!2~

la!il1!2~

OX18

B2AS

'rP890

The PCP/IPCP should be S/O.

0.11-0.7) and seguence

~it

(

"'-

-

Befer to ALC receive state transition (71-

Register X'15' contains the incorrect pcp (bits 0.0-0.3), IPCP (bits 0.11-0.7).

X7BC

IRRoa CARD

PIlLD

PITaa

!CQRI

~2£1112!

!1§J1!~

!A§!!9£

0120

B2A5

TrB90

A L2 interrupt vas expected frol the receive line. lither the interrupt did not occur (Register
X""' egual zero), or the interrupt vas frol the vrong line (Register X'111' not egual to Register
X'H').
BlBOR CARD
nBC

!CQRJ

Iog'U12!

PlIAtD
U!ilU~

0122

82A5

Tr890

PlTIII

/

U9J12..

The status posted in the receive line ICI vas expected to be 1'01100'.
The status bits in error are in Begister 1'15'.
Reg 1'15'
8its

Description

0.0
0.1
0.2
0.3
0.11

lbort detect
Porlat exception
char over/under run
Data check
SSC and PAD flag

O~

5

1011

Leading DLI error
Length check
ICI ~yte 15

0.6
0.7
1.• 0-1. 7

X7BC

IBBOB CAaD

PIALD

PITall

~»I

19~!tlQI!

IAiIJ9~

la§l~

82A5

Tr890

OX23

ICI
Bits
0.0

1,..1

0.2

'".3
,11.11

0.5

1ft. 6

n.7
1~. 0-7

A L2 interrupt vas expected fro. the translit line. litber the interrupt did not occur (aegister
X"II' egual aero), or the interrupt vas frol the vron~ line (Register X'1/1' not egual to aegister
X'11'1·
IRROR CARO

!CQQ!
nBC

01211

PIALD

~Q£AIl21!

fl§!1!2£

8U5

'tr890

PIT""

IA§!.!!~

The data received and buffered does not egual the expected data.
the expected data; byte 1 contains the received data.

Begister 1'15' byte 0 contains

Register 1 '16' contains the address of; the Duaber of bytes tested (byte' D) and the nUliber of
bytes reaaining to be tested (byte 1). The contents of Begister 1'16' plus 2 is the address of
the next byte in the expected data buffer. The contents of aegister X'16' plus II is the address
of the next byte in the received data tuffer.
ERBoa CARD
~QI

PEUD

FET"K

Io2SAI1QI fliJ!Q& iAiJ12&

(;
7.1.258 13705HAA

Type 3 Co.aunication Scanner 1FT

o
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IBI 3705 ~o.ftUHlalTloHS COHT'OL~B'
TXPI 3 COIIOHIC1TIOHS SC1H •• a I'f SIIPrOI IHDIX
X7BC

OX 311

o

See error stop after error stop OXO,.

o
o

X7BD

This routiDe tests the ALC RPQ XftIT lines ability to set the Dew SyDC bit (ICI 16.0) in PCP=l and to
detect the loss of Data Carrier Detect (DCD) on the receiYe line.
XllT data • X' 80 7' 8. 90 lC aa Cl 09 IP PI 80 11 Al Al'
Data Carrier Detect (DCD) will be dropped following the X'PB' character and following the second X'll'
character.

o

o
o
o

U,\

arror stop OX34 ls out of sequence. It appears after error stop OX04 in the listing and in this
4ocument. Por clarity. it is listed in two places in this docusent so that the reader aay find the
error stop by looking at either place.

o
o
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o

o

BRaOB CARD

PB1LD

OXOl

Tr890

PSTII

£QiI 1Q£AtlQ! !&iJ!Q.. !!§!!QL
X7BD

B2&S

& set aode iDterrupt failed on the receiYe line (address in Register X'11').
X'15' to deterslDe the cause of the error.
Beg X'15'
0001
0002
0003
BRROR CAlID

':1

>,

lIRLIIE LII. COHfROL -- RPQ 858912

IlBD

Description
Ho set sode L2 occurred.
Interrupt fros the wronq line - Register "
• wrong line address.
Peed back check error.
PBALD

P!'rll

QQRI

~Q~2!

1!§!!2.. 1!i!!2&

OX02

B2A5

Tr890

& set sode interrupt failed on the transsit line (address in Register X'11').
X'15' to deteraine the canse of tbe error.
Beg X'lS'
0001
0002
0003
EIROR CABO

X1BD

Display Begister

Display Begister

Description
Ho set sode L2 occurred.
Interrupt fros the wrocg line - Begister 14
• wrong line address.
peedback check error.
lEAtD

lEUI

QQRI

L2~Qlf

n§!IQ.. !W!2a.

OX03

B2A5

TP890

The PCF/EPCP should be BIC.

Refer to ALC transsit state transition (11.

Register 1'15' contains the incorrect PCI' (bits 0.0-0.31. EPCP (bits 0.4-0.71.
ERROB CllID

X7BD

PBUD

P!'rllll

£QRI

~g!olliQ!

U§!!2.. 1!i!!!!2:.

OX04

BUS

US90

The Dew SYDC bit (ICW 16.01 was not set following aLC trans.it state transition (1) while in
PCP=l.

Type 3 CossunicatioD Scanner 1FT

137058A& 7.1.259

IBN 3705 CONnUHIC~TIOHS CONTROLLER
TYP! 3 COft!URICATIONS SCANREI 1fT ST!PTO! INDEX

17BD

IIRIlOI

C~ID

fl!UD

~n

~SCAU!l1l

1A!illia.. UJiUQ..

OX311

112B2
l!2C2
l!2H2
l!2J2

U81x
Tl'60x
Tr42x
Tr22x

D99-3705E-09

PET!!!
l'-II110

Checked to verify that the SDl' was X'1D5' as expected. However, the SDP was not equal to the
expected value. Register X'15' contains the actual value found in the SDP.

X78D

IIRROR CllD

L!lSC!Il!l1l

PEALD

PETII!

Q!l~~

~!JiEllQ..

l!JiE!~

OX05

8215

Tr890

The PCP/BPC' should be 7/C with sequence bit 13.0 off.

Refer to Ate receive state transition (1).

Register X'15' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4-0.71 and
(bit ,.0).

X7BD

ElHIOR CABD
£SIll! J:QWI!H!

1A!U111Q.. l!Jinll..

OX06

Tr890

D2A5

fl!ALD

~equence

bit

PBTIIB

The PCP/BPC' should be 7/C with sequence bit 13.0 off.

Refer to

A~C

receive state transition (3).

Register X'15' contains the incorrect PCl' (bits 0.0-0.3), EPCP (bits 0.11-0.7\ and sequence bit
(bit 1.0).
ERROR ClRD

X78D

'EALD

Q!lDI J:!l£All!l1l

~A!U1!Q..

OX01

Tr890

82A5

FETII!

f.!JiE1l9..

The PC'/BPCP should be 7/C with sequence bit 13.0 on.

Refer to ALC receive state transition (41.

Register X'1S' contains the incorrect PCP (bits 0.0-0.3), EPCP (bits 0.4-0.7) and sequence bit
(bit 1.0).
ERROB CARD

PEALD

OX08

Tr890

FETII!

lCQRl L9SCAl19! lA!U1!!l.. lAgE!!l..
X7BD

BUS

Receive tag not detected in SDP.

X7BD

ERROR CARD

LQ£!l1911

FBALD

QQQ~

f!!U1ll~

B215

Tr890

OX09

Register X'15' contains receiYe line address.

l'ETII!

1!JiE!9..

A L2 interrupt was expected from the receive line. Bither the interrupt did not occur (Register
X'14' equal zero). or the interrupt was frOB the wroDg line (Register X'111' not equal to Register
X'11').
Interrupt should have been generated by the loss of (DCD).
will be set back OD on the next bit se;vice cycle.

X1BD

ERROR CA8D

PBALD'

PBTII!

QgRE

~!l1211

gAGENQ~

1!JiE!~

OX11

B2A5

TP890

leceive state transiti'on (9).

DCD

The status posted in the receive line lCW was expected to be X'0400' (BOft and lost DCD).
Tbe status bits in error are in Register 1'15'.
Reg X'15'
Bits
0.0
0.1
0.2
0.3

1.1.260 X3705811

Description

ICW
Bits

lbort detect
Pormat exception
Char over/under run
Data check

0.. 0
14. 1
0.. 2
111.3

{
Type 3 CO.BnnicatioD Scanner 1FT

o
o
o

15K 3705 COftnOKlcATIORS COHTROLLEi
TtPE 3 COHHU8ICATIOHS SCANNER If~ SYKPTOK IHDEX

o
o

o

1.0-~.7

X7BO

PEALD

~Q£!I!Q!

f!g!!Q~

OX13

B2A5

Tre90

ERaoa CARD

PEALD

£QR! LQ£AI!Q! fA2!!QL
X1BD

OX14 B2A5

f!g!!2L
5/0~

Refer to AJ.C receive state transition (91.

PETH!
fl2!!~

TPB90

The Pcr/EPCP should be 7/C with seguence bit 13.0 off.

aefer to ALC receive state transition (21.

Register X'1S' contains the incorrect PCP (bits 0.0-0.31, EPCP (bits 0,.4 ... 0.1) and sequence bit
(bit 1.01.

X7BO

ERaOB CARD

PEALD

FETH"

£29! LQ£!I!Q!

f!2!!Q~

fAg!!Q~

Ox16

Tl'890

B2AS

Receive tag not detected in SOl'.

£2nl
X'IBO

OX 18

PEALD

PETaa

L2~Allgn

EAgl»~

fAil.Q~

BUS

!f890

Register X'lS' contains the receive line address.

L2 interrupt vas expected fr08 the receive line. Either the inte.rrupt did not occur (Re9ister
X' '4' egua 1 zero), or the interrupt, was fro. the wrong line (Begister X'14 'not equal tD Register
X'11'1·
A

.,

o
o

0.5
14.6
14.1
15.0-1

Register X'15' contains the incorrect PCP (bits 0.0-0.31, EPCP (bits 0.4-0.71.

ERROB CAaD

C.•

1II. II

PETHH

£2R!

The PCP/EPcr should be

o

o

EOH
Leading OLE error
Length check
ICII byte 15

ERROR CARD

o

o

asc and PAD flag

0.11
0,.5
0.6
0.7

Interrupt should have been generated by the loss of OCD.
be set back on on the next bit service cycle.
~BROR

CAaD

PEALO

Receive state transition (8).

DCD vill

PET!a

£29! 1.!l£U!Q! U2!!Q:. fill!2",
X7BO

OX20

B2~S

TPe90

The status posted in the receive ,line ICW was expected to be X'04BO' (EOK and lost DCDI.

o
o
o

The status,

bit~

Beg 1'15'
Bits

Description

0.0
0.1
0.2
0.3
0.• Ii
0.5
0.6
0.1
1.0-1.7

X7BD

in error are

ICII
Bits

Abort detect
0.0
Format ex.::eption
lli. 1
0.2
Char over/under run
Data check
14.3
BSC and PAD flag
14.4
EOII
0.5
Leading OLE error
14.6
Length check
111.1
ICW byte 15
15.0-7

ERRoa CARD

nALD

PETHI!

£2Jl:fl

~Q£AI!Q!

fAillQ..

f!§~!Q ..

B2AS

TrB90

OX22

~p,Re9isteri~"5~.

The PCP/EPCF should be 5/0.

Refer to ALC receive -state transition (81 •

Register X'lS' contains the incorrect PCF (bits 0.0-0.3 •• EPCF (bits 0.11-0.71.

Type 3 Co •• unication Scanner IPT

X370SHAA 7.,.261

IB~ 3705 CO~MUNICATIONS CONTROLLER
TYPS 3 COMMONICATIONS SCANNIR 1fT SYftPTOM INDIX

X7BD

ERROR CARD

FEALO

FETItIl

~!U~

~Q~lUQ!!

f12~!!2~

~1§~!!2L

OX23

B215

TP890

099- 37 O!H.- 09

A L2 interrupt was expected from the transmit line. Either the interrupt did not occur (Register
1'1~' equal zero), or the interrupt was from the wrong line (Register X'14' not equal to Register
1 '11') •

ERROS CARD

FEAt 0

FETftll

£Q.!2! J.52S1UQ!! U2!!!!l" fA,IlUQ:.
X1!lO

OX2~

Il2A5

TF890

The data received and buffered does not equal the expected data.
the expected data, byte 1 contains the received data.

Register X'15' byte 0 contains

Register X'16' contains tho address of; the number of bytes tested (by to 0) and the number of
bytes remaining to be tested (byte 1). The contents of register X'16' plus 2 is the address of
the next byte in the expected data buffer. The contents of Register X'16' plus ~ is the address
of the next byte in the received data buffer.
ERROR CARD

\..

FEAt 0

£Q.!l! !o52f:!I!Q'!! U§UQ."
X1BO

OX34
See error stop after OX04.

X7FO

SOLC Link Test.

This routine is a manual intervention routine and runs only if you set the CI sense switch to run manual
intervention routines or request a single routine to be run.
This routine will stop with manual intervention stop code F020 through F02C requesting entry of options
needed to run this routine.
This routine may be used for SDLC data link problem determination and repair verification when on-line
tests (under host system control) are not available.
When using this routine for problem determination external to the 3705, all normal internal functional
tests should run norsally without internal hardware errors. Any local interface problems, such as line
set drivers and terminators, should be tested using routine x7A8 or X7A9 with external local wrap
options because 171.8 and 17A9 provide more detailed information about local failures.
This SDLC link test is basically an ECHO test with the primary SOLC station sending a SOLC link test
comsand frame down the link. The prisary station expects to get the same test frale back if the remote
end of the link received the test frame without errors. Some SDLe terminals only respond with a
non-seguenced acknowledgement response rather than sending hack the link-test fram. it received.
Options are provided to run as a SDLC primary station or as a SDLC secondary station. The primary
station option initiates the link-test commands and expects to receive responses. The secondary SDLC
station responds to test-frames received; if the test frame was received without errors, the same test
frame is sent back as a response. If a test fra.e vas received without block check errors and had
either more data than could be buffered or did not have the poll bit on in the control field, the
secondary station responds with a test frame without optional data. I I I frames received with block
check errors or with abort detect conditions are counted as errors and no response is provided. All
frames received with a SOLC station address other than the SDLC station address selected in the F028
manual intervention stop code are counted as an unexpected or non-supported frame and no response is
provided. Ho response is provided for frames with anything but a link-test command field.
The structure of the link-test command enables thic test to also run a local external duplex modem wrap
if you select the primary station option and connect the transmit and receive lines together properly.
A remote wrap can be done if the remote end of the link can tie the transmit and receive duplex lines
together with proper loading etc. Because the remote end of the link must stQre the test frame and send
it back. the wrap option does not work on half-duplex lines.
This routine always stops on translit errors such as modem check, tiseout, or ovvrrun, but does not stop
on receive errors except for modem cheCk error unless an option is selected to stop on frames in error
.or stop on any frame.
Continuation (select !'OIICTIOH 5 and press STADT key) from the OX20, 0160 or 0161 stops, stops the
routine. clears all error counts and su.mary statistics and restarts the test from the transmit/receive
data portions. This allows continuing the test on a manual switched line connection without making a
new connection. The sale restart is used for the 0000 dynamic restart option or the 0000 restart option
at stop code P02C. Any lanual switched line connection will not be broken until you abort the routine
or use a restart option that goes through total hardware setup such as 0002 restart code.

7.1.262 X37D5HAA

Type 3 Communication Scanner 1fT

(

o
o

o
o

UII 3706 COI\IIUIlCA'UolIS CO.nOLLER
TUll COIIIIOIltCl'UOIiS SC&IIIIBB In SlIIl'TOIi UOBX
111'0
Pad

o

o
o

l'

C 4d

BC

BC

r ee

Pad • alternate data transition characters for clock correction and will be X'AA' if NRZI 104e is not
baing used or XIOO' if IIZI aode is ~eing used.

r = SOLC flag character coaposed of a zero bit followed by six one bits followed by another zero
bit (X '711').

o
o
o
o
o

o

Pa4

where-.

o

u
o

D99-310511-09

A

c

SOLC station address.

C • SOLC control field and will always be X'P3' i f a LIIIIt-TBST coasandl response is being sent or
X'91' if a cOlaand reject response is being sent.
dd • Optional tranSiit/receive data field when tbe LIHIt-TIIST coaaand is being used. Wben tbe
cOlland reject response is being sent, tbe first byte of tbis field is the cOI.and field of the
receiwed fraae that is being rejected, the second byte is set to zeros (it is defined as the
send and receive sequence counts) and tbe third byte is set to X'04' if aore data was received
tben could be buffered or to J'01' if the LIHJ-TBST cOlland was received without the poll bit
on.
Be •

block cbeck(CRC) characters. Two block check characters are always sent and their bit
configuration waries according to tbe SOLC station address, control field and optional data
fields.
'

ee

an ending translission of X'PP' to lake the line go to an idle state and to allow tile for bits
to be sent before dropping the' • request to selld' lead 011 trlllslit turnarounds.

~

"

,

All the data dedlleil above between 't~e! two tlag characters is dafined 'a. a PRlItB. All references in
, this doculent to ~tbe frale rafers to this portioll of each translitted or received segl8nt of data.
Note tbat if tbe above is baing sent/received in IIZI lode then tbe actual bit configuration on the
line will differ frol the ones shown above. llso, SDLC zero bit insertioD/deletion applies to all
cbaracters except tbe flags and ending, sequence defined under ee.
Test statistics and error count are available vhile the test is running and at the P02C test coapletion code.
In addition certain regist3rs are used for current status indicators and lay be displayed while tbe test is
running or at the P02c stop code. Following is the definitioQ of the status indicators:
171'0

legister X'1B' cOlltaills the current translit aDd receive line status.
Byte 0 of reg 1'1B' • last received frale type indicator and aay cODtain one of tbe following
indications:
X'OO' • Ii Ie out occured on last receive cOlpletion.
A good link test frue was received with no errors.
X'40! • A cOlland reject response was received as tbe last frale received at tbis prilary
station.
"20' • A nOIl-sequeDced acknovledgelent waa received as the last frale at tbis prilary station.
X'10' • A block check (CDC error) vas detected in tbe last received fraae.
X'08' • An invalid or non-supported frale was received as the last received frale. ~his lillk
test oDly supports tha link-test response, tbe non-sequenced ackllowledgelent response
alld tbe cOlaand reject reaponse if running as a prilary station. Tbe secondary statioll
option vill only accept a link-test cO.lalld but aar respoqd vitb a link-test response
or a cOlaand reject response. ~his indicator is also set if a partial frale was
received followed by an 'abort detect! sequence of seven or lore consecutive one bits.
X'Oll'

'A valid link-test frue vas received but it contained lore data than could be buffered.
If this is a secondary station, a cOlland reject response is sent for tbis frale. Tbe
laxilul lengt4 of the receive(and transait) data buffer is 102/f characters if this 3105
has lore tban 16K storage or 10 characters if 3105 bas only 16K of storage.

1'02'

IDvalid SOLC station address received or, for priaary station option with optional
transait data. the received data did not co.pare witb the SDLe station address or
optional transait data that v~s sent. ~he SOLC station address that ron provide in tbe
1'028 stop code is used to lake this coaparison. If the secondary station option vas
selected, tbis frale vill not be responded to.

X'01' • A hardware detected error such as lodes check or overrun has been detected. 10 response
is lade to any frales received witb tbis type of error.
Byte 1 of reg X'1B'. translit line status and otber intorlation bits. ftnltiple bits aay be on in this
byte as opposed to byte 0 vhich ne,er vill ha,e aore than one bit On. ~he bita within tbis
brte are defined as;

Type 3 cOlaunication Scanner 1FT

X3105B&& 1.,.263

18ft 3105 COftftONlCATlORS COHT~O~LIR
TYPE 3 COftftUHlCATIONS SCARH!R 1fT StftPTOft INDEX

D99-31 05£-09

1'80' .. 1 reply is pending to be sent to the last fraDe
1'40'

recei~ed

at this secondary station.

A cOD.and reject reply is now being sent or was the last fraDe transmitted from this
secondary station.

X'20' .. A link-test comllBnd(from prhary station) or response(from secondary station) was the
last fraae sent or is being sent at this time.
1'10'

= A 'transmit

K'O"

.. Recei,e line is busy if this bit is on.

initial' operation is being done or was last transait operation done. This
'transmit initial' is done to set 'request to send' and wait for 'clear to send' from
the aodea interface for the first transait operation of all prilary station options and
for secondary station options when 'reguest to send' should be on at all tiDes. See
aanual intervention stop code P020 for this option.
Trans.it line is busy if this bit is on.

X'02'

(

Bit not defined. Kay be used as added indicator at later time.

\.

1'01' .. Bit not defined. aay be used as added indicator at later tile.
I1PO

Register 1'11" contains the accu.ulated tr'ansa1t and receive line statllS indicators. The bits in
this register have the sa.e aeanings as the bits defined in register X'11' except once these bit
are set on they are not reset until the test is restarted. These bits serve as a su.mary of all
the transait and receive operations that have been done up to th •. time this register is displayed.

I1PO

Register 1'1D' is used to control the IOU display code that is put out to the panel display B
lights (if function select switch is in positions 4, 5 or 6). This register is cleared to zeros
at approxiaately two second intervals and in between this clearing to zeros it is used as an
accululator of all the bits defined in the register I'1E' bits.

I1PO

Register X'46' is used to control the lOXX display COde that is put out to the panel display 8
lights (if function select switch is in positions 4, 5 or 61. This register is cleared to zeros
at approxiaately two second intervals and in between this clearing to zeros it is used as an
accumulator of all the bits defined in the register X'1B' bits.

I1PO

Register 1'46' is the scanner
the receive line used in this
line interface conditions for
register contains the receive
of this register.
Bit

Rex

o

80

1
2

qO
20

3

,0

_

08

5
6

0'
02

display register. This frogram sets the display bit in the ICN for
test. Por half-duplex 1 nes this register gi~es you the current
both the transmit and receive operations. Por duplex lines this
line interface conditions. Pollowing is bit definition for byte 0

Beaning if bit is on.
'clear to send' is active. Should be on while in transmit lode and may be on
while in receive sode. Por duplex lines this bit probably will not be on since it
reflects the status of the receive half of the duplex pair.
'ring indicator' is active.
'data set ready' is active. Should be on for leased lines and should come
on after line is connected for switched lines.
'receive line signal detect'(carrier detect) is active. ShOUld be on while receiving
and lay be on while transsitting.
'receive data bit buffer' is a one bit, if the line interface receive data
buffer contains a lark(1).. Should vary as received data varies.
'diagnostic aode bit' is on. Should not be on in this test.
'bit service request bit' is on. Should be on once eac~ bit service.

1011 display codes. While the link-test is running, various display codes are displayed in
display 8 if you have the PUNCTION SBLBCT SNITCH in function position q, 5 or 6 (except l06P).
These display codes are displayed approximately once every other second with the display Blights
cleared to zero between each BOll display. These BOXX display codes are defined as:

X1PO

BOOO alternating with BOPl' • waiting for 'data set ready' to co.e on before doing
any transmit or recei~e operations. These codes vill be continously
displayed until 'data set ready' coses on ~ia completing a manual
switched connection or via connecting (or jumpering) the proper sode.
interface leads. On a leased line connection you will not see this
display code if 'data set ready' is always on(as expected).
B060

A good test frase was received within the last two seconds and no other error was detected (except a
possible ~i.eout).

1061

qotbing was received(timeouts) during the last two
B062

11063

= A block

f'

second~.

check error(CRC error) was detected in SODe frame during the last two seconds.

A non-supported or invalid frame was rllceived during the last two seconds.

1064 • aore data was received than could be buffered during the last two seconds.
8065 .. 1 co.mand reject response was received at this primary station during the last two seconds.

1.1.2611 Xl105HlA

Type 3 Communication Scanner IPT

(

o

o
o
o

lB" 3105 co.ftUNIcAtIONS CO.T.OLLSI
TIP! 3 COftftORIClfIOIS SCA.NBa IPT SYftPTOft IMPII

o

£068

o
o
o
o
o

D9:f- 31 05 B- 09

1066 • A non-sequenced acknowledgesent was receive4 at this prisarr station during the last two seconds.
£061 •

~ither

o( 3 Conditions say eKist: 1 - SDLC Station Address did not cos pare. 2 - Received data did not
cospare with transsitted data. 3 - Secondary Station received .ore data than could be buffered. In
all cases '1061' indicates that the data received does not cOlpare with data transsitted.

=~

hardware detected error such as lodes check or overrun has been detected during the last two seconds.

£06P • This code is displayed if you are using tbe dynalic cos.unications option (function select 1 and
switches B-1 set to DOIII ,nd bave entered a,DOII code tbat is not defined. Ho action is taken if this
c04e is displayed.
I
'.'
I ,
11FO

DOli dynasic c'olaunications codes. 'lhese dynasic coslQnications codes allow you to tersinate or
restart the link-test at various pOints within the test. you enter these codes while the progras
is running by setting the DISPLAY/PUBCfIOH SELICf SWlfCH to function position 1, setting the
selected code in switches B-a and then pressing the interrupt key on the control panel. These
dynalic cos.unication options are the sase as those defined in the p02c sanual intervention stop
code definition. fbey are repeated here in a su.aary for.. For sote details see the F02C stop
code definition.
DOOO· Restart link-test at transsit/receive data pointlno line resetsl.
DOOl • Restart routine fro. beginning including asking for options.
D002 =
D003

~estart

= Stop

link-test including bardware resets and enables.

routine at P02C stop code and display statistics.

D004 • Tersinate routine after hardware resets.
11FO

STATISTICS at link test'tersination.
Register l'lC' contains the address of a
is running and at the F02C and 0111 stop
table frol this register and display the
Pollowing is a list of what is available

u
o

statistics table in storage. At all tises while the test
codes you may get the storage address of the statistics
storage locations for the following half-word counters.
in these statistics:

BeK displacesent
within statistics
pointed to by
reg 1I1CI.
00 • Huaber of SDLC link-test fraaes transmitted successfully. fhis count
does not include cosaand reject respODses sent fros a secondary station.
02 • Husber of SDLe link-test frases received with no errors. If this is a
prisary station then the received SDLC station address and(if used) the
optional data sust cos pare in order to have one added to this count.
On a norsal F02C cospletion at a prisarj station this count should satch
the nusber of test frases transsitted count if no errors have been detected.
An eKception is when the secondary station responds with non-sequenced
acknowledgelents to test frases then this count ShODld be zero and the
received non-sequenced acknowledgelents count should latch t~e nusber of
test frales transsitted count.

o

04 - Busber of frases received with block check errors(CaC errors).

o

06 • Hu.ber of cOlund reject responses received at this secondary station.
08 • Rumber of non-sequenced acknowledgesents received at this secondary station.

o
o

01

= Husber

of !&ases received that were not included in other receive counts.
This count includes frases received with invalid SDLC station addresses,
non-supported cos.ands/responses, non-data cospares with optional trans.it
data and frases tersinated by an abort detection condition. Hate that sose
of these conditions say have caDsed a block check error and be inCluded in
the block check error count and not this count.

OC • If prisary station, then this field coatains nUlbar of test frases requested
to be sent in the r022 stop code. If this field is all zeros and a prilary
station option was selected tben test fraael will be sent contiaously (allowing
for receiving etc.1 without ever ter.iaating the test.
~a

• Husber of hardware errors detected, such as sodes check or overruns, on the

10

Busber of COl sand reject responses transsitted by this secondary station.

trans sit and receive operations.

17FO

Pollowing are the error stop codes that lay occur in this test. Rote that aDY error
stop codes beginning with 1 or 2 in display B byte 0 bits 0-3 are defined in another
section of this sysptos indeK. The display B codes starting with r are defined in the
aanual intervention section of this doculent.

Type 3 COlsunicatien Scanner 1FT

13105H11 1.1.265

(;
rf o.
\\J
ISft 3705 COa"U.ICA~IOMS CO.~BOLLIB
TY~B 3 COftftU.IC~'IO.S SCA.IBa IP~ SYHPTOft IIOEX
I7FO

0107

099-37051-09

Auto call failed to cOlplete. An autocall error was detected.
Begister 1"5' byte 0 contains an error indicator which is described
beloll.
Register X'15' byte 1 contains the sdf bits for autocall.
SDP bits for autocall are defined as; bit 0.0 = interrupt releaber,
bit 0.2 • call request, bit 0.3 • data line occupied, bit 0.4 •
present next digit, bit 0.5 - digit present, bit 0.6 • call originate
status, bit 0~1
abandon cal~ and retry.
IBBOB IIOICATOB.

=

(
If

~
./
i",

Irror in auto call connection. leg.I"S' byte 1 contains SOP bits in error. SOP bits
0-' on, 5-1 off. ~lso an error, if LCD not-S, pcr not-4 (reg. X'45' byte 0).
2

Irror in dialing.

2

Irror in dialing.

I

~

See error indicator 1 description.

4,5&6 -- If last digit dialed was not an ION digit, PND lay cOle on and cause a L2 interrupt
if the distant station does not ansller illediately. Tbe saee thing IIill occur with lOB,
as last digit, on sOle 011 I non-laB) and on lal auto-call units that do not have the
lOB feature strapped on. On S08e OBa auto-call units tbe BOI IIill cause the auto-call
unit to transfer control to the model/data set IIith DATA-SiT-BIAO! on il.ediately, even
though no distant station bal been connected and given an aDSller tone.

17FO

OX20

4

Brror indicating PII, CBa or OLO not on.

5

10 auto-call coapletion (tiaeout).

6

Abandon-call and retry cale on.

8eg. X'1S' byte 1 bits 1,2 & 3 should be on.

/

\
\

Beg. 1'15' byte 1 bit 6 (COSI sbould bne on.

Beg. 1'15' byte, bit 7 came on.

Transmit line operations. A translit line error has been detected. &eg X'13' contains the
accululated ICI bits 0-15 during this transmit operation. On each level 2 interrupt ICW bits 0-7
are stored together and saved for this error display. If register 1'15' bit 0.3 is on, the
transeit line has ti.ad out because 'clear to send' did not coae on or soae other transmit failure
such as loss of translit clock.
See the routine heading for lore registers and error statistics. Continuing froa this stop by
selecting FUNCTIOI 5 and pressing ST~BT restarts the test at the tIBns.it/receive portion without
doing a hardllare reset and enable. Boutines J7A8 or 17A9 aay be aore useful in isolating this
error.

I7FO

OX60

Beceive error cOlpletion. This error stop occurs if a lode. check was detected (ICI bit 3 on)
while in receive lode. This stop aay also occur if options to stop on any fraae of fraae in error
was selected. legister X'13' contains the ICI bits accululated during this receive operation by
08ing ICI bits 0-7 together and saving thel ~n each level 2 interrupt. The prograa does not stop
for receive tileouts; it sets up to transmit again if stop on any fraae or any frale in error
options IIere selected. Begister X'16' contains the address of the receive data During eacb level
2 interrupt service, ICI bits 0-7 are OBed with the previous bits and saved; these bits are
displayed in register 1'13'. buffer in storage and register 1'19' contains the address plus 1 of
the last received character.
See the routine heading for test run details, aore registers, and link test statistics.
continuing froa ~his stop by selecting PUNCTION 5 and pressing START restarts the test at the
translit/receive portion of the test without doing a hardllare reset and enable. Boutines 17A8 and
1719 aay be aore useful to locate this failure.

X7PO

OIH

Beceiving fraaes. This stop code occurred because an option to stop on the type of fra~e just
received was selected. Begister X'1B' defines the type of frase received as explained in in the
routine heading. Begister 1'16' contains the starting address of the receive buffer; register
1'19' contains the address one byte past the last character received. Register 1'14' contains the
accuaulated block check characters and should be I'F088'. If no errors occurred, register 1"3'
contains the last 2 characters' received and should be the actual received block check ICBC)
characters.
See the routine heading for test run details, test statistics, and aore registers. Continuing
froa this stop by selecting FUNCTION 5 and Pressing START restarts the test at the
transmit/receive portion without doing a hardware reset and enable but the statistics connters
will be Cleared.

I7F1 ICW Card Test 1
'~

!QYUl!lI U§£UfU2!
This manual intervention routine IIrites various data patterns in ICI bytes according to cards containing
the bytes.
To coapletely test for defective BOB 80dules, the -4.0 Vdc measured at any S06 pin on the £2 or £3 board
aust be varied to -3.6 Vdc and to -4.4 Vdc. Refer to lB! 122~ ~2!~1!~!!121! £21!t211!£ !i!l~
!99in!!IiDS 1h!2'I 1I1a!~n~ I!lB!l£ SY27-0107 Page 0-230/0-580.

(.
7.1.266 I3705HAA

Type 3 Co.sunication Scanner 1FT

1
)0

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IU 31 PS COIIIIOltICA'UOHS C6H'fII0J,.LER'

,

099-37051-09

'.UP! 3 COlIlIOIlICAflOIlS SCAII:IIIII lFt sYllnol! IIIDEI

o
o

DO HOT attempt to loop on error in this routine.
error prodllces extraneous indications.

This routine loops in such a aanner that looping on

All type 3 communication scanner IFTs sbollld have been run prior to rllnning this routine.
Approximate run the is 20 seconds.

o
o
o

STOP
~R]

X7F1

This stop occllrs at the beginning of tbe routine to allow adjllsting the -4.0 Volts dc measured at
any B06 pin on the E2 or E3 Board. Adjust the voltage to -3.6 and run the routine several times,
replace defective cards that cause errors. After running the routine with the voltage adjusted at
-3.6 Vdc, adjust the voltage to -4.4 Vdc and run the routine several more times. Beplace
defective cards that cause errors. Restore the voltage to -4.0 before returning the controller to
the customer.
The voltage is adjusted via the potentiometer on OXD-H2/0XD-At.
The routine will loop as long as ADDRESS/DATA Switcb 1 is set to any value other than O. Thus,
if you wish to loop the routine, set switch E to any value other than 0 for as long as you wish to
lOOp.

o
o
o

ERROR CAnD

x7Pl

PEAt 0

PET 1111

ADDITIONAL

QQ~!

tQ&A1lQJ iAlijUQ

fAli!!Q

UfQ!1UUQ!

OXOl

E3G2

F-320

Pass " 0000
ICW bytes 1 and 9

'U-210

Either a level 1 interrupt occllred or the data did not egual that expected.
Replace card E3G2.

U
"'·i.'

.•:••

~,

i

17Fl

o
o

Do not attempt to loop on error in this routine.

ERROR CARD

FEALD

FETIIII

ADDITIONAL

QQ~g

LQ~!I12U

1Alil!2

~!9!!2

l!IQ!1~!I!Q!

OX02

E3P2

'fE-200

F-320

Pass" 0100
ICW bytes 6 and 8

Either a level 1 interrupt occur.ed or the data did not equal that expected.

o

Replace card E3F2.
ERROB CARD

X7F 1

PEAt 0

£Q~!

1Q£ill2! Ulil!!!.Q

0103

E2T2

TP-200
TP-200

Do not attempt to loop on error in this routine.

FETIII!

ADDITIONAL

~Ali!!Q

!UQl!!!!!Q!!

F-280
F-350

Pass = 0200
ICW bytes 0 and 14

l!ither a level 1 interrupt occllred or ihe data did not eqllal that expected.
lIeplace card E2T2.

o
o

P060

X7F1

Do not attempt to loop on error in this routine.

ERROR CARD

PlALD

f!liE!Q

!UQUU!Q'!!

OX04

TF-300
TP-300

F-290
P-320

Pass = 0400
leW bytes 2 and 10

E2U2

FETIII!

ADDITIONAL

QQQ! LQ£ll!Q!! fA!i!!Q

Either a level 1 interrupt occllred or the data did not equal that expected.
Replace card E202.

Type 3 Communication Scanner 1FT

Do not attempt to loop on error in this routine.

13705HAA 7.1.267

IPM 31Q5 COaaUHICATIOHS COHfRott1a
3 COftftUnIClfIONS SCIH •• R IPf Slft~TO. IMDII

P99-37 051-09

~IPB

EaaOR CIRD

I7F1

PEILD

PETaR

£221

L2~lI!Q1

11iJ!2

!l9!!9

0105

E2G2

'IF-liOO
tr-IIOO

P-300
r-3110

(

IDDlfIO.IL
1!191~A%19.

Pass .. 0800
ICI bytes land 13

Either a level 1 interrupt occured or the data 4id not equal that expected.
aeplace card E2G2.
EaaOB CARD

X7F1

PEALD

Do not attespt to loop on error in this routine.

.2'11121 lAiJ!2

PETRR

ADDITIOHAL

~RI

llil12

1112IIA%l2!

0106

12S2

P-290
P-350

Pass • 1000
ICI byt.. 15 and 16

Tr-210
Tr-210

/

\.

Either a level 1 interrupt occured or the data did not equal that expected.
Replace card
EBBOB CIBD

X7F1

PEILD

12S2~

Do not attespt to loop on error in this routine.

FET!!

IDDITIONIL

~RI

!Q~AJ!QI

11§J!2

!liI!9

1!IQBJ1%121

0107

E2112

U-310
U-310
U-310

r-300
'-310
'-320

Pass· 2000
ICI bytes 5 and l'

Either a level 1 interrupt occured or the 4atl did not egull that expected.
Beplace card 12R2.

17P1

PEALD

Do not attespt to loop on error in this routine.

~R!

ERROB CABD
L2k!%lQJ

lAill2

1l§112

11lQIIA1lQI

OIOB. 12V2

Tr-Ii 10

F-300
'-300
F-3110

Pass· '1000
ICI bytes II and 12

U-II10
'rP-q 10

PET!!

ADDITIONAL

lither a level 1 interrupt occured or the dlta did not equil that expected •
• epllce card 82V2.

Do not attelpt to loop on error in tbie routine.

17F2 ICI ping Pong Card Test

This lanual intervention routine writes X'OO', I'OB', X'Fr', and X'p7' in ICI bytes according to cards
containing tbe bytes.
Ta cOlpletely test for defective HDB lodules, the -q.O Vdc seasured at any B06 pin on the E2 or Il board
lust be varied to -3.6 Vdc Ind to -11.11 Ydc.. Befer to UJ H~ !O!!IIllaJ.!<1112J11 S;WWlK. liil~
!ngiD~§[1ag %!§2£I IliD1!DI!!E-09

SYHPTO~

INDEX

o
ROUTINE DESCBIPTIOII
This routine ensures that the adapter being tested can be selected.

o

X901

ERROR CARD

FEUD

FET~M

£Q!Hl I.Q£A.I!Q!!

~!'~~!!Q:.

~!'~!!!!Q...

PAlOS

8-120

OXOI

E4P2

Attempt to select type 4 channel adapter under test failed.
X'67' executed following selection.

HOI

ERROR CARD

PEALD

FETM~

£QR!! LQ£!!!Q!!

~!~!!!!Q~

E!~!!!!Q ...

OX02

PAlOS

8-120

E4F2

Attempt to select type 4 channel adapter under test failed.
X'17' executed following selection.
X902

!l.!l~£!HI!Q!!

Ensures tllat the channel adapter can be disabled
EaROR CARD

FEAtD

FETIIII

P8103

H-120

£QRll IoQ£!'UQ!! fA.!l.!l!!Q ... Uii!!!!Q ..
X902

[

OXO 1

E4P2

Channel interface was not disabled.
X903

Clear Adapter with Diagnostic Reset
llQ!!U!!~ Jl.!l2£UU~Q!!

Ensures that Diagnostic Reset clears the Channel Adapter.

o

Register X'14' contains the results of the IN

Channel Adapter Disable Test

!!Q!!I!!!ll

o

Register X'14' contains the results of the IN

ERROR CARD

X903

FEALD

£QR!! LQQUQ!!

~A.iiEl!Q

OX02

PH107
PF103
PC105
PE 102

E4Q2
BIIK2
!!4N2
E4L2

FETII"

.. U!l!!!!Q..
H-120
8-050

ProgriUI does an output X'67' with bit 0,4 on.

ADDITIONAL
~!!lQ!!!!UIQ!!

any bits
bit 0.6
bits 0.1, 0.2, 0.7
bits 0.0, 0.3, 0.5

Register 1'60' did not clear.
EFROR CARD

o

X903

FEALD

ADDITIONAL

I.Q£A.IIQ!!

OX04

E4Q2
E4L2
E4T2
E4N2
34K2

- PH 107
PE103
PG102
PC104
PF104

~egister

X'62' did not clear.

ERROR CARD

X903

FET""

£Q!2~

~A.!i.!l!!Q ..

FEUD

UiiUQ..

~!EQ!!!!aUQ!!

H-120
8-070

any bits
bits 0.0-0.4, 1.0, 1.5-1.7
bits 0.6, 0.7
bits 0.5, 1.1, 1.3
bits 1.2, 1. II

FE Til I!

ADDITIONAL

£QR!! I.Q£A.UQ!!

f!~.!l!!QL

f!!i!!!!Q .. !!ifQ!!!!UQJ!

OX08

PU10?
PD10S
PG102

H-120
H-l00

E4Q2
E4112
E4T2

any bits
bits 0.0, 0.1, 0,4, 0.5
bits 0.6, 0.7

Register X'66 ' did not clear.

Type 4 CA

IF~

X370SJAA 8.1

1>99-370511-09

BRROR CARD
X903

PEUD

PETIIII

~!l§

L!HiU!QI! U!iJ!Hl...

U~Ug..

0109

8402
E41t2
BlIP 2

8-120
0-110

1'8107
l'P104
1'1108

ADDI'lIOIIU

llIlQU1U91!
anf bits
bi ts 1. 1-1.5
bits 1.6. 1.7

Register X'67' did not clear.
EIBOR CUD
X903

PEUD

PEUII

ADDITIOUL

~!ll

lo!!~AnQl!

U,iUQ.. Eli!!!!!.. llllQiUU9l!

OXOA

8402
E402
84B2

1'8107
PL102
PQ104

8-120
8-130

an~

bits
bit 0.0
bit 0.1

Register X'6C' did not clear.
X904

Bits 1.0-1.6 are chet;:ked.

Bits 0.0 and 0.' are checked.

Register 1'63' (SSAR) All Zeros Test

This routine verifies that all Zeros can be loaded into register X'63'.
BRROR CARD
X904

PEUD

PBTU

PD107
PB106
1'P102

8-080

~!lI

loQ£U!QI! U!iJI!Q ... U!iJl!Q..

0101

E4112
E4P2
B4112

Unable to set register 1'63' to X'OOOO'.
X905

Register X'63' (SSlR\ All Ones Test

This routine verifies that all bits can be set on in register 1'63'.

1905

8IBOR CARD

lo!l£AUQ!f

PEUD

£SIll!!

U~1a!.Q

OXOB

14112
841'2
114K2

1'Dl07
1'Bl06
",,02

PETIIII

... fA!iJ!fQ ...
11-080

Unable to set register X'63' to all ones.
X906

Register X'63' (SSAR) Alternate Bits Test

BQYI!!fE ]J3&B!fIIQI!
This routine verifies that alternate bits can be set on in register X'63' via a X'5555' bit
pattern followed bfaX'llAl' bit pattern.

X906

ERROR CARD

loQ£!UQI!

PEUD

~!l§

U~UQ

OIOC

84112
E41'2
14K2

..

1'D107
1'8106
1'P102

UTilI!
U~l!l!Q

..

8-080

Unable to set register X'63' to 1'5555'.
ERROR CUD

FEUD

OXOD

1'0107
PB106
1'P102

£Q!!§ L9£!I!QI! UiJI!Q ..
X906

E4~2

llllP2
E4K2

UTIIII
U~U!l..

8-080

Unable to set register X'63' to X'AlAA'.

8.2 X3705HA

Tfpe 4 Cl IPT

o

o

len 3705

X907

COKnUHICA~IONS CO.~ROLLBR

Register 1'63'

(SS~B)

D99-3705E-09

Increasing Bits Test

This rOlltine tests reqister 1'63' IIsing a pattllrn of 1ncreaentillg bits.
pattern on each interaction.
ERBOR CABO
QQR~

o

1907010E

PBALD

!he

rou~ine

loops adding a bit to the

PBT!n

L2£lIIQ! !lil!Q4 11il!Q4
114112
B4P2
BlUt2

PD107
PB106
Pll02

8-080

Unable to set register X'63' IIsing a 1ncreasing bits pattern.
1908

Register 1'63' (SSAR) Ploating Zeros

~est

Register x'63' is tested IIsing a floating zero pattern to ens lire that extraneous bits are not set on.
ERROR CARD

1908

FEALD

PETR"

£QRI L2£AII2!

!!i!!Q~

1!i!!2L

OlOP

PD107
PB106
PF102

8-080

BII!2
1I4P2
BIIK2

Unable to set register X'63' IIsing the floating zeros pattern,
X909

Register X'611' (Data Register 1 and 21 All Zeros Test

Register 1'611' is tested with an all zero bit pattern to ensllre that all bits can be set off.

U
'I
, iI

II

!

ERROR CARD

n09

PEALO

PET!!

£2UI L2£lZIQ!

llil!Q~

llil!g4

OIOA

P0107
PB106
PF102

8-090

8482
EIIP2
BIIK2

Unable to set register 1'611' to 1'0000'.
X901

o

Register 1'611' (Data eegister 1 and 2) All Ones Test

Register 1'611' is tested with an all bit
BRROR CARD

190A

FBALO

pa~tern

to ensure

tha~

all bits can be set on.

PE~n"

QQRI LQ£a!IQ!

2Ai!!Q~

lAil!QL

OXOB

E4K2
B4l'2

P0107
PB106

8-090

BIlK 2

P1'102

Unable to set regieter 1'64' to X'FFPf.
X90B

Register X'611' (Data Register 1 and 2) Alternate

Bit~

Test

IQY~l~= RI~!If~lQ!

Register 1'64' is tested with X'5555'
SRBOR CABO
£QU LQ£!I!Q!
X90B

OXOC

811112
E41'2
SIIK2

FEUD

by X'llll' tQ ensure that no interaction between bits occurs.

FUU

Ui1l!2 .. U!lUQ...
1'0107
1'Bl06
1'Pl02

8-090

Unable to set register

Type 4 Cl IPT

~ol~owed

X'6~'

to 1'5555'.

X3705JAA 8.3

IBft 3705 COftllOMICAfIOMS CONTROLLSR

BRROR C1RD
190B

PBALD

PBTR"

QQQI.

L2~A~lQ!

iail!Q~

iAilH~

OIOD

B4R2
BU2
1111112

PD101
PBl06
l'P 102

11-090

Dnable to set register X'611' to X'AAAAI.
X90C· Register 1'611' (Data Register 1 and 21 Ploating Zeros fest
!Qn~lHI RI~!lEZIQI

Register X'611' is checked with a floating zero bit pattern to verify that
BRROR CARD

QQQI LQSAUQ!
X90C

OXOB

Blift2
Blln
B41[2

PBALD

Ui1l9~

POlO?
PBl06
PP102

8-090

'.

usi~g

the

f~o.ting

Reg1ster 1'64' (Data Register 1 and 21 Increasing

B2nZlHI

bits are not set on.

re'rftll

iUU~

Unable to set reg1ster 1'611'
X90D

eztr.n~us

~its

zero pattern,
fest

RI~S!IE!IQ!

Register 1'611' is tested using a bit pattern with an increasing RUBber of bit.
BRROB CABD

1900

rBALD

rBTaB

QQQI

LQ~A~lQH

fAi!HQ~

EAilIQ~

olor

!l4H2
!U2
BIIK2

PD101
PBl06
Prl02

11-090

Dnable to set register 1'611' when using the increasing bits pattern.
X90B

Register X'65' (Data Register 3 and 41 All Zeros fest
Register X'65' is tested with an all zero bit pattern to ensure that all bits can be set off.
BRROR ClRD

X908

PB1LD

PBfRR

QQRJ LQS1ZIQI

fAi119~

fAil!2~

OXOl

PD10?
PB106
PP102

11-090

B4112
BlIP 2
l!4lt2

Unable to set register X'65' to X'OOOO'.
X90P

Register X'65' (Data Register 3 and III 111 lIits fest

!QY!lHI

RI~I!E!121

Register X'65' is tested with an all bit pattern to ensure that
can be set on.
kaROB CARD
X90r

!.ll~UIQJ

n!u:1!2~

UiUQ...

OX08

BIIR2

PD101
PB106
Prl02

8-090

811K2
llnable to

~et~. £eg1st'8r"

1'65'

\o.x'~rr"

Begister X'65' (Data Register 3 and III Alternate 8ita

lQYZlH=

bits

PlTIII!

~!!!!

l!~P2

1910

nUD

al~

~eSt

R!!~£!12IIQI

Register x'65' is tested witb X'5555' followed bf X'11AA' to ensure that no interaction between
bits occurs.

8.11 13705JAI'.

fYlIe " CA IFf

o
o
o

lea 3705

coaa~RIClTIO.S

BIIBOI CUD

1910

COIITtoLLII

liQQI

~U1911

UiUQ.. UIilI1Q ...

PULD

l'B'fll1I

oloe

B4112
S4P2
B4K2

PD107
P8106

11-090

D9 9-31 058-09

"'02

Dnable to s.t register I' 65' to 1'5555'.
IBBOB CARD

PIALD

PITlla

OlOD

liD 107
l'8106
PP,02

H-09Q

QgRI L9liA11911 2Ail19.. 2Ai119...
X910

111112
B4P2
BIIK2

"nable to set register X'65 to
1911

X'~~AA'.

Register X'65' (Data Register 3 and 4) Ploating Zero Test

Register X'65' is tested with a floating Zero bit pattern to ensure that e¥traneous bite
are not set on.
BRROR CARD
)(911

pB1LD

PBT""

~R!

LQ~AI19.

2AiII1Q.. 2Ail!Q ..

OXOB

114112
B4l12

lID107
PB106
PP102

8-090

nK2

Dnable to set register X'65' when using the floating zeros pattern.
X912

Register X'65' (Data Register 3 and
I2YIl!~

II)

Increaaing Bits Test

R!§£BlfllQ!

Register X'65' is tested using a bit pattern with an increasing nu.ber of bit. on.
BRRoa

C~RD

PIALD

FIT""

OlOP

B4112
I"P2
!lin

PD101
PB106
PFl02

11-090

QgRI L9£Al1911 2AiJIQ.. fAiJl2 ..
1912

Dnable to set register X'65' when using a growing bits pattern.

o

X913

Hse Status Register All Bits Test

This routine verifies that all bits in byte 1 of lIegister X'66' lasc Status RegisteJ:) can be Slat on.
IRROB CABO

PIALD

PIT""

OXOB

PG101

8-100

QgRI L9£A119! 2AiJIQ.. 2Ai119...
X913

BIIT2

Dnable to set .egister X'66' to X'eFOO' QSing output I'40ep' to J:egister X'66'.
X914

Hse Status Register Alternate Bits Test
i~gll!1 RI~~!lfllQ!

This J:outine verifies that no intera'ctilln occurs between bits in byte 'oae of J:egister X' 66'.
laROB C1BD
X914

FBALD

PBTaB

PG101

8-100

~RI

MQ£A1lQI IAiIIQ.. 2A§IIQ4

oxoe

B4T2

Unable to set register X'66' to X'''500' Using output of 1'0045' to J:egistlar X'66'.
BBBOR CUD

Type 4 CA IF'!!

PIALD

PITIIB

X3105JU 8.5

P99- 370SE-09

X914

OXOD

E4T2

PG10l

8-100

Unable to set register X'66' to X'8AOO' using output of 1'008A' to register
1166'.
X915

NSC status Begister Floating

~eros

Test

This routine verifies that extraneous bits are not set on in byte 1 of register X'66'.

X915

ERROR CABO

LQ!;;AUQ!!

PEUD

Fnlll!

~Il§

fA§!!!Q~

fA§!!Q~

OXOE

34T2

PG10 1

8-100

Unable to set register X'66' when using the Cloating zero pattern.
X916

NSC Status Begister Increasing Bits test

This routine tests register X'66' with bit patterns containing an increasing nu.ber of bits.
EBBOR CABO
X916

FEUD

!;;QQ~

LQ!;;AUQ¥ fA§!¥Q..

OXOF

~4T2

PG101

FE Til I!
U§ll1!Q~

8-100

Onable to set register X'66' using a increasing bits pattern.
X917

Dltl/Status Control Register All Ze.o Bits test

Register X'62' is tested with an all zero bit pattern to ensure that all bits can be set off.
IIRBOa

C~RD

PEUD

1 ETII I!

OXOA

E4L2
l!4T2
E4N2

PE103
PG102
PC104

8-060

!;;Q1l§ LQ!;;A!!Q! fl&!!!.Q .. U§E!!.Q ..
X917

Unable to set register
X918

X'

62' to ~', 0000' "

Outbound Transfer sequence Test

This routine verifies that Outbound Data transfer sequence can be set on in Register X'62'.
ERROR CARD

FEALD

FETIIII

OX10

PE103

11-060

!;;QUE LQ£A!!Q!!' fAQ!!!Q.. fA§!!Q ..
1918

E4L2

"nable to set register X'62' to 1'8000' using outbound transfer
sequence.

X919

Inbound Transfer Sequence Test
~QYII!!.E R~~£~If!IQ¥
T~is

routine verifies that Inboun4 Data Transfer Sequence 9an be set on in reqister X'62'.

ERROR

X919

C~RD

FEALD

FETHI!

!;;QUE LQ£AIIQH

fA2~HQL

fA§~~Q~

OX11

PE103

8-060

E4L2

Unable to set register X'62' to 1'4000' using the inbound transfer
sequence.

6.6 X3705JAA

Type" CA IFT

o
o
o

Ie~

o
o

3705 COKKUHICATIO.S CONTROLLBR

191J.

099-3705£-09

Status Transfer Sequence Test

This routine verifies that Status Transfer Sequence can be set on in register 1'62'.
IRROR ClBD
X911

PIlLD

LQ~l11Q!

IliEI9L

PIT!!

~QI

0112

IIIL2

PHl03

11-060

!liJ.9~

Unable to set register X'62' to x'2000' using BSC final status transfer
sequence.

o

X918

RSC Channel Bnd Transfer Sequence

BQYllBB DilkBllll9I
This routine verifies that RSC Channel Bnd Transfer sequence can be set on in
register X'62'.

X918

BRBOR ClRD

PB1LD

PETRK

~Q~

L2~1l!Q!

Il~119~

Il~!!Q~

0113

EIIL2

PHl03

11-060

e

Unable to set register X62 to X'1000' when using RSC channel end transfer
seqllence.
BRROR CUD
£Q.UI J.2~!nQl!
X918

[

OX1~

E4L2
I~T2

l'ElLD
ng.l!!!Q..

PBTU
UgUQ.:.

PB10)
PG101

Unable to set register X'66' to
to 1'1000' to set Channel Bnd.

,

X'080~'

when setting register X'62'

"

,"

'

X91C

NSC Pinal Status Transfer SequenCe Test

"

o
o

o

This routine verifies that RSC Pinal Status
1'62'.

X91C

ERROR CARD
£Q.U l:tQ~1l19!

PElLO

PBTU

U!iII!Q~

El!iIi!Q~

OX15

PB10l

11-060

EIIL2

~~ansfer

sequence can be set on in register

Unable to set register X'62' to X'0800 1 when register 1'62' is set to X'0800'
to issue RSC Pinal Status transf~r sequence.
ERROR CARD
X91C

PEAto

PET"K

PG10l
PE103

8-060

~Qnl

J.Q!iUIQ! fAiB!Q..

0116

SIIT2
EIIL2

o

El!i11!9~

Register X'66' is not all zeros when setting register 1'62'
to X'0800'.
X910

Program Requested Level ) Interrupt Test

RQY1!!! Y!3£!!il12!
This routine verifies that a level ) interrupt occurs when reguested by the program and
that the interrupt can be reset.

o

1910

~Qn~

ERROR CARD

l:tQ~lllQB

PEALD

PET""

OXOA

B4L2

PB103

11-060

2!!lJIQL

fA!iIl!Q~

Unable to set register X'62' to 1'0000' during

Pre~Test.

Berun rout!ne

1917.

Type II Cl IPT

X3105JAA 6.7

lEft 370$ COBftUHICATIOHS OOHTBOLLBI

BIIOB CARD

QQQI

~9S!!19!

PBALD

PBTBK

~!§JH9~

~!§J!9~

PG102

8-120

099-37058-<19

,{ 1

'-.J

c

Unable to issue a level 3 interrupt.
191B

Suppress Out Konitor with Level 3 Interrupt Test

This routine ,erifies that suppress Out "onitor can be set and will cause a level 3 interrupt
with the Suppress Out Ronitor bit on in register 1'62'.
BBROB ClRD

£Qql LQSAIl9!
191B

0101

EIIL2

PB1LD

PErRR

f!§E!Q~

fA§E!9~

PIIl03

8-060

Unable to set register 1'62' to 1'0000' during Pre-Test.
U17.

X91E

ERBOR CARD

PBlLD

PErKR

S~QI

~9SAI19!

lAi!!9~

EAi!19~

OX21

E~r2

PG102

8-120

Berun routine

Level 3 interrupt did not occur when issuing Suppress Out
Konitor.
X91P

Status service and Address Register Ad4ressitility rest

12g11!E

QE~Blfl19!

rllis routine ver1fi~S that'setting a:U·;b1ts
bet set off in regi$ters X'6~1, X'651 ~r X'66 ' •

dd.b

191P

BRROB CABO

PBALD

S9QI L9SAllQ!

fA§E!Q~

fA§EH9~

OXOA

PD107

8-080

EQK2

'j:egister X'63' does

191P

S9QI LQSAtl9!

PEALD

PErKK

fA§EIQ~

fA§EI9~

OX40

PA 101
PP101

8-080
8-090

84P2
84l'i2

b,its to

PETKK

Unable to set register X'63' to X'OOOO' during Pre-rest.
routine X90Q.
ERROB CARD

nct,1:t,c,~use

Rerun

Register x'64' is set in error when atteapting to set register X'63' to X'OOOO'.
BRBOR CARD

FEAtD

PETKII

E4P2
B4K2

PAl01
PP101

8-080
8-090

S921 I.QSAllQ!! U§E!!Q.. flinQ ...
X91P

0141

Register X165' is set in error When attelpting to set register X'63' to X'OOOO'.
ERROR CABO

191P

PEltO

£QQI

~QS!U91

U§E!!Q ..

0142

24F2
!!4K2

PAl01
PF10l

PETII"

U§I!!Q~

11-080
11-100

(

"-

llegister X'66' is set in error when attempting to set register X'63' to X'OOOO.
X920

Data Register 1 and 2 Addressibility Test

rhis routine verifies that setting all bits off in regieter X'64' does not cause bits to be
set off in registers X'63'. 1'65' or X'66'.

8.8 X370SJAA

Type 4 CA nr

(.

o
o
o
o

Ie"

3105 CGa"U.ICATloIS CO.TROLLER

IlRlOR ClItD

£9l!!
1920

OIOA

PEALD

PB'I'1t1!

PD107

8-090

D99-370liE-09

LQ{i!tIQIi UgllliQ.. IlgUQ...
1!4112

Unable to set register X'64' to 1'0000' during Pre-Test.
routine 19 09.
BRROR CABD
1920

PEALD

FUIIII

!?l10 1
Pll01

8-090
8-090

~l!1

LQ!;,&UQIi fAg.!!!!Q .. Ea!!lIlQ...

OU3

!l4P2
SlutZ
Register

X' 65'

Rerun

is set in orror when atteaptin9 to set register X'64' to 1'0000'.

ERBOR CABO

PEUD

FET!!I!

0144

Pll0l
PF101

8-090
8-100

!;Ql!1 LQS;UIQIi UIUiIiQ.. flinQ ..

o
o
o

co
o

o
o
o

X920

EII.2
EIIK2

Register X' 66' is set in error when attespting to set register X'64' to
ERRoa CUD

FElLD

rET1I1!

1l4F2
1l4K2

PAl01
Pll0l

8-080
8-090

l[l

0000' •

S;Ql!I LQS;UIQIl l!AUIlQ .. U!iJIlQ..
1920

OUS

Register 1'63' is set in error IIhen attespting to set register 1'64' to 1'0000'.
1921

Data Register 3 and 4 Addressibility Test
BQYIl!l~ l!1~£!liIIQ!

This routine verifies that setting all bits off in register 1'65' does not cause bits to
be set off in registers 1'63', 1'64' or 1'66'.
BRBoa C1RD

X921

S;Ql!1

PBALD

FIlTII"

LQ~IIQIi

il!!lIiQ.. ilglJQ..

OXOl

B4"2
E4P2

PD107
P8106

8-090

Onable to set rsgister X'65' to
EaROa CARD

FEUD

FETIIII

0146

Pl101
PP10l

8-090
8-100

I·~OOO-.

s;QRI! .QS;UIQl! UiUll .. fAgUQ ..
1921

E4P2
E4K2

Reg1ster 1'66' is set in error when atteaptlng to set register %'65' to 1'0000-.
ERROB CARD

FElLD

FUIIII

OX47

PAl0l
PP10l

H-080
8-090

S;Ql!I LQS;UIQI!. l!!!!I!!Q .. U!ln!l:.
X921

!l4P2
EIIK2

Register x'63' is set in error when atteapting to set register X'65 to X'OOOO'.
ERROR CABO

PEUD

FET!!II

EQP2
134K2

PA101
PF101

8-090

£Ql!1 LQ!;lUQ!! U!l.UQ... il!!l.l!Q...
X921

OX48

Register 1'6'1' is set in error when atte.pting to set register X'65 to 1'0000'.

X922

Status Service and Address Register

Type" CA IF!

'ddress1~11itJ

fest

X3705JAA 8.9

left 3705 COftnONICATloWS

COHTROL~ER

D99-3705B-09
'I' '

This routine verifies that settinq all bits on in register X'63' does not cause bit to be
set on in registers 1'60', X'62', 1'64', X'65' or X'66',

X922

BRROR CARD

l'BALD

FETHH

QQ~~

fAi!!Q4

fAg~!Q~

P0107
P8106

H-080

~Q~AIIQ!

OXOB

nnable to set register X'63' to X'PPl'F'.
PEUO

PETIII!

QQ!!l!

~Q~!UQ!

fAil!!!Q .. Ug!!Q..

OUC

EU2
241t2

PA101
PP101

0-080
8-090

ltRROR CARD
1922

\

~,

Register X'64' is set in error when attempting to set register x'63' to X'FFPF',

,

X922

ERROR CARD

PEAL'JI

PETIII!

QQ!!l!

~Q~AUQ!!

fA!il!I!Q~

Ui!.!!!!..

OX40

E4P2
Ell1t2

PAl0l
PF101

8-080
8-090

\,

'

Register 1'65' is set 10 error when attespting to set register X'63' to X'PFPP'.
EBROR CARD
1922

PEAtD

PETIII!

PA101
PF101

0-080
8-100

~QIll!

I.Q!;!UQ! Ui!!Q.. UgUQ ..

aXIlE

E41'2
241t2

Register X'66' 1& set in error when attempting to set register 1'63' to X'FPF1",
ERROR CARD
X922

FEALD

PE Til II

~Q!!l!

I.Q~AUQ!!

Ug!!!Q~

U!!l!!Q~

OXIIF

EIIF2
EIIlt2

PA10l
1'P101

8-080
8-050

Register 1'60' is set in error when
to X'FFFP'.
ERROR CARP

nAtO

QQIll! I.Q!;;AUQ!! fA!il!I!Q ..
1922

OX5,

841'2
B4K2

PAlOl
PFl01

attS8ptin~

to set register X'63'

PETIIII
Ug!!!!Q~

8-060
H-080

Register 1'62' is set in error when attespting to set register X'63' to X'PI'I'I".
1923

Data Register 1 and 2 Addressibility Test
!QY~!!!l! !!l!~£!lfIIQ!

This routine verifies that setting all bits on in register X'64' does not cause bits to be
set on in registers 1'60', X'62', 1 1 63', 1'65' or X'66',
ERROR CARD
t923

PBlLO

I'ETIIII

~Q!!l!

~Q~llQB

fAgl!!!Q4

fAg!!!Q~

OXOB

BIIII2
1I11P2

P0107
PB106

8-090

\.

Unable to set register X'64' to X'PPFF',

X923

ERROR CARD

PEALD

PBTIIII

~Q!!l!

~Q~!UQ!!

f!i!!!Q~

fA!il!'!!Q~

OX52

E4P2
B4K2

PAl01
1'Fl01

8-090

8.10 X3105JH

Type 4 CA IFT

(

o
o
o

Ie. 3105 CO••UIICATIO.S COITBOLLII

Be,1st el: X'65' is .et in enor wben

o

EBIIOB CAR'D

!;;QQI
1923

0153

FEUD

atte.p~1ng

to set reg1stel:

1'6~'

to X'FFrF'.

rETlII

J.2~n2J1

E!!ill!~

Eli!!!!;!.,

BIIF2

PA101
Prl01

8-090
8-100

ellK2

D99-l705E-09

Registel: X'66' is set in el:l:Or ,hen atte.pting to set register X'64' to X'FfPP'.

1923

BRROB CARD

PIALD

PITIIII

~DI

'9~A%lQ!

fA!illg~

fliJ!Q~

OX54

BIIP2

8-090
H-050

!IIU

Register 1'60' is set in erl:OI: wben atte.pting to set register X'611' to X'FPFF'.
BRROR CABO

!;;2DI
X923

0156

PBALD

FITIIII

L9~A%lQJI

Il§IIQ4 fAilB2L

14P2

P1101
PP101

8-060
8-090

BllII2

o

o

Register 1'62' is set in error wben atte'pting to set register X'6q' to X'PPPP'.
EBBOR C1RD

1923

PBALD

FETII

!;;QQI LQ!;;AtlQ!

E!§~l!QL

EAil!QL

0157

PA101
PP101

6-080
8-090

14P2
lIlIK2

Register 1'63' is set in error when

X924

atte.~ting

to set register X'64' to X'PFF,'.

Data Register 3 and _ Addressibility Test

This rontine verifies that setting all bits on in register 1'65' does not cause bits to
be set on in registers X'60', X'62', X'6~', 1'64' or 1166'.
BRROR CARD

o
o·

19211

PBUD

PBTU

~!Ui

IoQ~UIQI

E!!iUQL Uil!Q..

OIOB

B4112
34P2

PD107
PB106

6-090

Dnable to set register 1'65' to X'PFFF'.
ERBOR CARD
X924

PBALD

rET1l1!

PA 101
PF101

8-090
8-100

~1l1

IoQ£!UQ! Uill!QL Uill!!l..

0158

BIIF2
14112

Register 1'66' is set in error when

X924

BRBQR CARD

PBUD

rET1I1!

~QI!II

IoQ~U!Q!!

UU!!g~

:fAgll!!2.:.

B4P2

Pll0l
lIP101

B-050
B-090

0159

14K2

~tte.p~ing

to set register x'65' to X'PFPF'.

Register 1'60' is set in error when ijttempting to set register 1'65' to X'FFPF'.
BRROB CABO

PElLD

PETal!

PA101

8-060
H-090

£gill loQ£UIQ!! nWQ.. Uill!Q..
1924

015&

!!4F2

14K2

Type 4 Cl IU

P'10 1

13705JU 8.11

(J
099-37051-09

c

Be'Jister 1'62' is set in error when attelpting to set register 1'65' to X'FFFF',
ERBOR CARD

PEUD

PETIIII

£QIl! l.Q£AU!l1!. 2!!iJI!Q.. U!!ll!.!l...
U211

Oxsc

B4F2
BIIK2

PAtO,l
PltO';,.

-~

t

I

H~080

,

f

8-090

Register x' 63' is set in error when atteapting to set register 1'65' to X'Flll'.
BRROa CARD
1924

FEUD

FlTIII!

~!!!

~Q£!I!Q!!

fllinQ .. U!il!!Q..

0150

BIIF2
BIlK 2

PA10t
PFtOl

8-090

Register X'611' is set in error when atteapting to set register 1'65' to X'F1PF'.

1925

HSC Status Register lddressibility Test

This routine verifies that setting X'OOC1' into register X'66' does not cause any bits to be
set on in registers 1'60', X'62', X'63', X'64' or X'6s'.
BRROR CARD

£Q!!! LQ£ll!Q!!
1925

OXOB

EIIT2

FBlLD

lETlI1I

~lli!!!Q..

fAlil!Q ..

PG101

U-l00

Data fro. register X'66' was not
BRROR CARD
X925

lEALD

lET!!1I

~!!!

l.Q£AUQI!.

~alil!!Q...

fAli!I!Q ...

OXSE

BII12
BIIK2

PA10l
PllO 1

U-l00
8-050

''L/

x'croo'

when X'OOC1' was set into register X'66.

Register X'60' is set when attempting to
set register 1'66' to X'60Cl'.
ERROR CABO

FEUD

PETit I!

0160

l'J\ 101
P1I01

11-060
U-100

£QIl! IoQ£AUQI! 2!lil!l!.Q.. f!li!l!Q...
X925

SU2

BIIK2

!legister 1'62' is set when atteapting to set register X'66' to l'OOC1'.
ERROR CARD
X925

PEAt 0

PETIII!

PA 101
P1I01

U-l00
8-080

~!!!

LQ£AUQI!. fA!i!!!Q ... Uli!!!Q ...

OX61

B412
B4K2

Registe. X'63' is set in error when attelpting to set register 1'66' to X'OOC1'.
BRROR CABD

FEAt 0

FBTIIII

0162

PAl01
P1IOl

U-l00
U-090

£QU LQ!iAIIQI! U!UillQ .. UlilUlQ ..
1925

EII12
BIIK2

Register X'64' is set in e.ror when attempting to set register X'66' to X'OOC1'.

X925

ERROR CARD

FEAtD

~!!!

~Alil!!!.Q

OX63

LQ£aUQI!.

BIIF2
.B4112

PA101
PP 10 1

FETIIII

.. f!li!!!Q ...
8-090
8-100

Register X'65' is set in error linen atte.pting to set register X'66' to I'OOCP'.

8.12 X3705JAA

Type II CA Il'T

{.

o
o

o

IU 37 OS COIIIIUIIICA'rION S CONTilOLLER

192E

~

D99-

3105E-09

E.B. and C.S. IIODE RESEr via our X'62'

~YI!ti~ ]~~£B!fl!Q!
1.

2.

CS IIODE is established via an output of X'4000' to Reg X'6C'
An output of X'0100' is made to Beg X'62' to reset the mode.
An input from Reg X'6C' is lIade and verificatio·n is made.
The 1I0de bits (0 and 1 of byte 0) are zero.

e

3.

E. B. !lode is established via an output of X'SOOO' to
Reg X'6C'

4.

Step 2 is performed.

5.

The routine ends when it recognizes that the E. B.
mode has been tested.

6.

Error code 01 defines inability to reset C. S. !lode
Error code 02 defines inability to reset E. B. !lode

ERROR CARD

I;QllE !OQI;!'UQ!!

FEUD

UTili!

PL102
PL103

H-140
8-130

UgnQ .. nIlE!!!h

X922

OXO 1
OX02

X93Q

EBII Control Register - All Zeroes

E4H2
ll4J2

BQY!I!!~ 1l~~I;B!gIIQ!

[

After disabling and resetting the CA, bits 0.0, 0.1, 0.4, 0.5, 0.6 and 0.1 of the EBII Control Reg. are set via an
output X'6C'. An attempt to reset them via an OOT X'6C' is then made and the results checked. Two passes are
made. The first with Bit 0.1 reset and 0.0 set. The second pass is with bit 0.0 reset and bit 0.1 set •

'

:,'
, ,
' . •,.!,

.

ERROR CARD

,:

FEALD

FETIIM

£Qll~

!OQI;!.!IQ!!

f!.g~!!Q..

g!.Il~!!Q

OXOl
OX02

ll4H2
E4E2

PL102
PQ104

8-140
H-140

''I'

1930

o

Bit 0.0 - Extended Buffer lIode
Bit 0.1 - Cs lIode Bit

Error code OXO,l is for failure .ocqul;ring IIhen ,0. a was set.
0102 is for fa~lure IIhe'n 0.1 wa's '!let.
.,
,

Error coda

Following an output X'6C' with all bits off, an input X'6C' indicated that one or more of the tested bits
were not zero. Register X'15' indicates the bit(sl in input X'6C' that were not zero:
(The parenthesized
numbers refer to the failure information above)
(1) Bit o. a - Extended Bu ffer ~ode
(2) Bit 0.1 - CS lIode Bit
(3) Bit 0.4 - Syn ~onitor Control Latch
{4) Bit 0.5 - DLE Remember Latch
15) Bit 0.• 6 - USASCII "onHor Control Latch
16) Bit 0.7 - EBCDIC ~onitor Control latch

o
o

o
o

..

X932

EBM Control Register - All Ones
RQY1!!~ 1l~~~R!f!!Q~

After disabling and resetting the CA, bits 0.0, 0.4, 0.5, 0.6, and 0,.7 of the EBII and CS Control Register are all reset
via an output X'6C'. An attempt to set them via an OUT X'6C' is then made and the results checked. Two passes are
made. The first .lIi th 0.0 set and 0.1 reset. The second with O. a reset and O. 1 set.
ERROR CARD
£Q!!l! I.QQlIQ!!
1932

OXOl
OX02

E4H2
SQS2
EQn2
E4H2
E4H2
E4H2

FEUD

FETKM

ADDITIONAL

f!.Ill;!!Q .. f!.!iHQ ..

!HQR!!U!Q~

l?L 102

Bit
Bit
Bit
Bit
Bit
Bit

PQ10Q
PL10S
PL10 1
PL101
PL10l

8-140
H-1QO
8-140
H-1QO
8-140
8-140

0.0
0.1
0.4
0.5
0.6
0.7

-

Extended Buffer lIode
CS lIode Bit
Syn !lonitor Control Latch
DLE Remember La teh
OSASCII Monitor Control Latch
EBCDIC lIonitor Control Latch

Error code OXOl is for failure occurring when 0.0 lias set.
occurring when 0.1 was set.

Type Q CA 1FT

Error code OX02 is for failure

X3105JAA 8.13

t ' ',

\

1111 37Q5

aOUDnC~TIOHS

'

""

COnBOLUIl

Pollowing an output 1'6C' with byte 0, bits 0, 1, 4, 5, 6 and 7 on, an input I'6C' indicated
that one or aore of the tested bits vere not set. Register 1'15' indicates the bites)
in input 1'6C' that were not set:, (Th ......renthesized nuabers refer to the failure inforaation
above. )

.

" l'

(1)
12)
(3)
(4)

Bit
Bit
Bit
Bit
IS) Bit
16) Bit

X934

0.0
0.1
0.4
0.5
0.6
0.7

-

Buffer ftode
CS lIode Bit
Syn lIonitor Control Latch
OLE Remember Latch
US1SCII lIonitor Control Latch
EBCDIC ftonitor Control Latch

~xtended

EBft Address Register Reset

After disabling and resetting the CA, extended buffer
should reset the B811 address reg.

~B~

sode is set and an output 1'62' is executed •• This
(
\

ERBOR ClBO
1934

1'8110

1'8TIIII

PL102

8-140

~Ia

1I2S;U12!! UUlIQ.. !A§Jl!Q..

OX01

E482

'"
\,

After issuing an output X'62' with bit 0.0 on, an input X'6C' indicated EB sode had been
reset. Register X'14' contains the results of the input X'6C'.
BIlBOB CABD
193"

PEAt 0

!'BTIIII

PL103
PU03

8-130

~n

1&!!;!U2!! fAin2 .. f!§J1I.2 ..

OX02

E482
BQJ2

8-140

The input X'6C' issued to verify that the EBK address reg. has been reset indicated it had not. Sose value
other than 0 was in the "Transferred 8yte Count" bits. Beg X'15' ,indicates which cf these bits were not O.
Register X'14' contains the results of the input 1'6C'.
1935

EBft Address Register - Seguencing

After disabling and resetting the Cl, extended buffer
address register and to initiate a service cycle.

(E~

mOde is set and an output X'62' issued to reset the EB!

seguential output 1'6D' instructions are then issued to step the EBR address reg. A diagnostic reset (via output
X'67') is issued to reset service cycle, E8 aode is again set, and an 'input 1'6C' i~sued to obtain the transferred
byte count. The transferred byte count should provide the value in the E811 address register and should be egual
to twice the nusber of output 1'6C' instructions issued plus tvo.
During the first pass through this routine, one output X'6D' is executed. On each succeeding pass the nusber of
output X'60' instructions is increased by one until 16 output X'6D' instructions are executed.

1935

E8808 CABO

PEiLO

!02~!!

1I2~!U2!!

U§JlI.Q~

UWQ..

OXOl

E4H2
ElfJ2

PL102

8-140
8-130

PKl03

PETa"

After issuing an output X'62' with bit 0.0 on to initiate
an input I'6C' indicated either E8 sode had been reset or
8yte Count" bits. If bit 0.0 of register X'15' is on, B8
the B8ft address register was not reset. pre-Test Error.
BR80B CA8D
X935

PEALD

~.Q!;!II2!!

E!il!!Q..

PETR!

!02~!!

OX02

8482

PL102

8-140

a service cycle and to reset the E8ft address reg,
soae yalue otber than 0 was in the nTransferred
lode has been reset. If any other bits are in,
Berun routine 1'93Q'.

i!§I!!~

Following the diagnostic reset issued to reset service cycle, an attempt is made to set EB aode. Tbe input X'6C' which
followed indicated EB sode had not been set. Setting EB .ode was previously tested in routine 1'932'.
Berun that routine.
EBB08 ClBO

8.14

!02~!!

lI.Q~!l!Q!

1935

OXOII

X 370SJAl

FElLO

FETaft

i!i!!!!Q.. f!ill!Q ..
PL103

8-160

Type" CA In

{'

o
o
o
o

o

Ie!

3705 COnUIIlCA'l'IOHS CONTROLLER

D99-3705B-09

After ensuring that BB aode bas been set, the transferred byte count in the input X'6C' is checked to insure that the
BBI addrees register has stepped properly. ~he value in the input "6C' did pot cospare with the expected
value. Register "14' contains the results of the inplt 1'6C'.
Reg X'13' contains the expected value. ~his value is twice the nusber of output "6D' instructions issued
+2. (The address register wraps around at a ,alue of 32 so if 16 1'6D' instructions were issued, a value of
2 9ill be upseted.)
X936

BBI Local Store - All Zeroes

After disabling and resetting the CA, BB sode is set and 16 output X'6D' instructions are executed, turning on all
bits in the BB! local store array. ~hen, 16 sore OUT 1'6D's are executed to ensure that all bits in the array
have been set to zero.

o
o
o
o

BRROR CABD

~I!I

1936

OX01- B4.12
0110 BIIG2

1938

fIlUII

El§J!2L

PIt 1 02
PilOt

6-160
6-160

BRa Local Store - Interference Pattern Test

After disabling and resetting the CA, tbe EBa local store array is cleared to zero. Then, 16 output X'6D'
instructions are executed to set each balfword of the EB! array to selected bit patterns. Pollowing an input
X'6D' to prise the array in-buffer, 161M 1'6D's are executed to verify that each halfword was properly set.
Tbe first pass through tbe routine atteapts to set all bits in the array on. Next each balfword is set to
"AAlA', 1'5555', "7A7A', 1'8585', "C3C3', 1'3Clc', X'BPEP' and X'1010'. Each pattern is written in all array
locations and read back for veri~ication one patte~n at a tiae.

~I
I,i

BRDoa CAlID
~Ill

X938

IcQ~U19!

OX01- B4J2
0110 B4G2

PBUD

PB'l1I11

1'Kl02
Plll01

8-160
8-160

UiUQ.. U!!l!l!Q...

After clearing tbe BBa local store array, 16 output X'6D's were executed to set eacb halfword of tbe a~ray
to tbe specified bit pattern. An input "6D' tben priaed tbe array in-buffer, and 16 aore input 1'6D's were
executed to verify that each halfword bad been properly set. One of tbese input 1'60's indicated tbat a
halfword had not been set as expected.

o

o
o

PUL D
i!§!!Q~

After atteapting to set all bits on in the EBI Local Store array and then atteapting to reset thea, a
position of the array vas foun~ to be non-zero. The error code indicates which halfword (in hex) ,as found
to be non-zero, e.g., error code OXOl indicates the first halfword (bytes 0 and 1), error code OX02
indicates the second (bytes 2 and 31, etc., up to error code 0110 which indicates the sixteenth halfword
(bytes 30 and 31). Reg. X'l11' contains the results of the input 1'6D' which obtained the halfword in error.
All bits should have been off. (Continuing froa this error stop causes the reaaining positions of the array
to be verified.)
,

U'
o

J&ill12!

~be error code indicates wbich balfword (in bex) failed, e.g., OX11 indicates tbe first halfword (bytes 0
and 1), 0112 indicates tbe second (bytes 2 and 3), up to 0120 wbich indicates the sixteentb (bytes 30 and
31) halfword failed. aegister 1'1_' contains tbe results of the input 1'60' and register "15' indicates
wbicb bits were in error. (continuing froa this error stop will cause the reaaining positions of tbe array
to be cbecked and other data patterns to be used.)

X939 BBI Local Store - Variable Data

After disabling and resetting tbe CA, tbe BBII local store array is cleared to zero. 'lhen, 16 output X'6D'
instructions are executed to set eacb balfword of tbe EBII array to a /certain bit pattern. Pollowing an input
X'6D' to prise tbe array in-buffer~ 161M X'6D's are executed to ,erify tbat eacb balfword was properly set.
The first pass tbrough tbe routine sets all locations in the array to X'PPPE' and reads to verify. The zero is
then floated tbrough the pattern until X'7PPP' is reached. Eacb pattern is stored in all array'locations and read
to verify. Mext, growing ones patterns starting witb 1'0001' and ending witb I'PPPF' are stored. Eacb pattern is
written in all locations, read back, and verified.
ERBOB CARD
~DI

X939

Icg~!~!21

OX01- E4J2
OX10 E4G2

'lype 4 C1 IP'r

FEALD

PB'lla

PK102
Plll01

8-160
8-160

2A!!E!Q.. EA§IIQ...

X3705JU 8.15

IB" 3705

COBnUH1CA~10HS CORTBO~LEB

o

D99- 3705E- 09

After clearing the EBB local store array, 16 output 1'60's were'executed to set each halfword of the array
to the specified bit pattern. An input X'6D' then priaed the array in-buffer, and 16 more input X'60's were
executed to verify tha~ eacb halfword had been properly set. One of these input 1'60's indicated that a
halfword had not been set as expected.

o

The error code indicates which halfword (in hex) failed, e.g., OX11 indicates the first halfword (bytes 0
and 1), OX12 indicates tbe second (bytes 2 and 3), up to 0120 vhich indicates the sixteenth (bytes 30 and
31) balfword failed. Begister X'1.' contains the results of tbe input X'6D' and register X'15' indicates
which bits were in error. (Continuing fros this error stop vill cause the resaining positions of the array
to be checked and other data patterns to be used.)
1931

EBB Local Store - Addressing

BQYl1KJ

RJ§~llfI19K

Following a disable and reset of the CA, the EBft local store array is cleared and 16 consecutive OOT X'60's
executed. Each output X'60' places the nuaber of eacb byte to be set into that byte of the EBft Local Store array.
Thus, bytes 0 and 1 of the array should contain X'OO' and 1'01', bytes 2 and 3 should contain X'02' and ~'03',
etc. After all bytes have been set, an input X'60' prises the array in-buffer and each halfvord checked to ensure
that its bytes contain their respective nusbers.

X 931

ERROR C1BO

PE1LO

~~!

E!§!K9~

~9~!li9K

0101- B4J2
0110

PK103
PK102

UTili!
U§!K9~

I"'" ",

H-160

lfter storing each bytes nuaber into that byte of the EBK local store array, an input 1'60' was executed to
prise the array in-buffer. Sixteen consecutive 1'60's were executed to ensure each byte had its respective
nuaber in it. One of these input J'60's indicated that one of the bytes was incorrect.
The error code indicates which halfword (in Hexl of the EBB array contained the failing byte, e.g., OX01
indicates the first halfword (bytes 0 and 1l, OX02 indicates the second half word (bytes 2 and 3), up to OX10
which indicates the sixteenth halfword (bytes 30 and 31). Register 1'11' contains the expected contents of
the local store bytes, register X'14' contains the results of the input 1'60', and register 1'15' indicates
the bits in error. (Continuing fro a this error stop causes the reaaining local store bytes to be checked.)
193C

EBB Addressing - Reset via input I'6C'

Following a disable and reset of the CA, the EBB Local Store Array is cleared and 'n' (see belov) I'60's executed,
storing each bytes nuaber into the byte being set. An 19 1'6C' is then executed to reset the EBft address register
and then a x'prFr' stored via an output X'6D'. This l'rFFP' should end up being stored into bytes 2 and 3 of the
array, since an input,X'6C' vas used to reset the address reg.
Sixteen passes are aade through this routine, the first pass executes one X'60' instruction, the second executes
2, and so forth.

193C

ERROR CARD

PEUO

PEUft

~~!

~g~mgK

f!!ilK!h.

U!iI.lI!l~

OX01

B4J2
E482

PK102
PL103

8-150
8-140

After storing X'PFFF' into bytes 2 and 3 of the BBft array, an output X'62' is executed to reset the address
register (this reset function was previously tested in routine 1934), and an input X'60' obtains the first
halfword (bytes 0 and 1) of the array. This halfword should contain X'0001' but did not. Register X'14'
contains the results of the input X'60'. the byte located at the address in reg X'12' plus X'6~' indicates
the nUlber of bytes stored in the array before tbe input 1'6C' reset was executed.
\

X93C

ERROR CABO

PEUO

rBTU

~~B

~9~!U!lK

n!Ull!~

UgBK9~

OX02

B4J2
B482

PK102
PL103

8-150
H-1"0

1fter ensuring that the first two bytes of the array were not changed. another 1'60' obtains the second
halfvord of the array which should contain X'FPFF' stored following the input 1'6C' to reset the address
register. The data was incorrect. Reg X'14' contains the actual results of the input 1'60'. The byte
located at the address in register 1'12' plus X'6", indicates the nuaber of bytes stored in the array before
the input X'6C' reset was issued.
X930

EBft Address Register Beset and Prime via input X'6C'

This routine verifies that an input 1'6C' priaes the BBft Local Store lrray in-buffer with the first 2 bytes of the
array. after disabling and resetting the C1, the EBft local store array is cleared and X'0001' stored in bytes 0

8.16 X3705JAA

Type 4 CA IFT

.~

'~,

o
o
o
o

12. 3105

'U
·1

1~

o
o
o
o
o

o

CONTROLLBR

and 1 of the array.
been fetched.
ERROa ClRO
!;Q!!I Jdl9m!
X930

o
o
o
o
o

CO.~UHIC~TIO'S

OXOl

BIIB2

099-37058-09

An input X'6C' is executed followed by an input X'60' to verify that the first two bytes bave

PElLO
flliU2..

PET ••
EW!lIa.

PL102

H-130

The input X'6D' executed to verify that the first 2 bytes of the array bave been fetched, contained other
than the X'0001' stored in the first 2 bytes. Register X'111' contains the results of the input X'60'.
X93B

Ea. Address Register Reset via output 1'62' and output X'6C'

This routine verifies that the BBK address register is reset vi~ an output X'62' or output X'6C'. ~ftert disabling
and resetting the CA, the EBK local store array is cleared and 'n' (see below) 1'6D's executed, storing each bytes
number into the byte being set. An output 1'62' or X'6C' is then executed to reset the EBK address register and a
X'PFPP' stored via au output X'60'. This X'PPPF' should end up being stored into the first 2 bytes of the array.
Sixteen passes are aade through this routine using an output X'62' to reset the address reg and tben 16 aore using
an output X'6C'. Por each output instruction, tbe first pass does one output X'60', the second does 2 and so
forth.
BaROR CABO
&!lDl r,2S;AU2!!
193E

OX2"

BIIH2

PEUO
PBTU
U!UI12 .. lAilll!!L.
PL103

H-nO

Pollowing an output X'62'
was executed to reset the
did not contain I'PFPP'.
address in register X'12'
executed.

193E

EaROR ClBO
!;QU JdlS;m2l!

nuo
FETBII
21012... flU!!.!!..

OXC"

t'L103

E"82

to reset the address register lind storing X'PPPP' via an OUT X'6D', an input X'6C'
address register and an input X'60' to get the first 2 bytes of the array. they
Register X'1'" contains the results of tbe 1M X'60'. The byte located at tbe
plqs X'6'" indicates the nUlber of bytes stored before the output X'62' reset was

H-140

Pollowing an output 1'6C' to reset the address register and storing X'PPPP' via an output X'6D', an input
1'6C' was executed to reset tbe address register and an input 1'60' to get the first 2 bytes of tbe array.
~bey did not contain X'PPPP'.
Register X'1'" contains the results of tbe input 1'60'. Tbe byte locate4 at
tbe address in reg. X'12' plus 1'6_' indicates tbe nUBber of bytes stored before the output X'6O' reset was
executed.
X940

DA~A/S~ATOS

IRtBRROPTS

After disabling and resetting the CA, a test is .ade to ensure that eacb of the data/status level 3 interrupts can
be forced. A separate pass through tbe routine is aade for eacb type data/status transfer sequence. At any of
tbe error stops witbin this routine, register X",' indicates th~ type of data/status interrupt being tested.
Tbey are tested in tbe order listed, Priority Outbound ~ransfer sequence being tssted last:
Byte 0,
Bit" - ISC Pinal Status Transfer Byte 0,
Bit 3 - USC Channel End Transfer Byte 0, bit
2 - ESC Pinal Status transfer Byte 0, bit 1 - Inbound Data Transfer Byte 0, bit Q - outbound Data Transfer (If
byte 1, bit 5 is on, a Priority Outbound Data Transfer)

1940

ERROR CARD
s;2RI a,!!S;!I!Q!

f!i!lQ.. 1!iI12..

PEALD

PET!K

01:01

PII103

8-230

B"G2

After issuing an output X'62' to set the tested type of transfer sequence, an OUt X'67' with data of all
zero's is issued to force the selected type of interrupt. lfter unaasking level 3 interrupts, no interrupt
occurred. (Tbe output X'61' sbould have caused diagnostic bardware to force the selected type interrupt.)
Register X'11' indicates tbe type of transfer sequence being tested. (See routine description.)

X9~0

ERBOR CARD
&!llli Jo21OAH21!

!'BALD

01:02

PE103

B4L2

nu!

UiU9.. Uli!ll!L.
8-010

Pollowing tbe occurrence of the forced level 3 interrupt, an input X'62' indicated that tbe level 3 interrupt received
was not the datal$tatus level 3 expected. Register X'1Q' contains tbe results of the input 1'62'. Req.
X'1" indicates the type of transfer sequence being tested. (See tbe routine description.)

Type 4 CA IFT

13705JAA 8.17

18K 3705

CO"~UBICATIONS

CONTBOLLaa

D99-nO~Jl-09

,I(~
);

X942

Data/Status Interrupts Beset

After forcing each of the data/status level 3 interrupts, a check is aade to ensure that each can be reset Vla an
output 1'62'. A separate pass through the routine is aade for each type data/status transfer sequence. At any of
the error stops vithin this routine, reg. X"" indicates the typ~ of data/status interrupt boin9 tested. They
are tested in the order listed, Priority Outbound Transfer Sequence being teated last;
Byte 0, bit 4 - HSC Pinal status Transfer
Byte 0, bit 3 - NSC Channel Bnd Transfer
Byte 0, bit 2 - BSC Pinal Status Transfer
Byte 0, bit , - Inbound Data Transfer
Byte 0, bit 0 - Outbound Data Transfer IIf byte "
bit 5 is on, a Pr~ority Outbound Data
Tranafet)
ERaOR CARD
X~42

PBALD

PET""

QQ~~

.Q~bIIQ~

ib§EHQL Ib§IR2L

OXOl

E4G2

Pft 10 3

0-230

.)'
(1'

After issuing an output 1'62' to set the tested type of transfer s~uence, an OUT X'67' vith data of all
zeto's is issue4 to force the selected type of interrupt. After unmasking level 3 intertupts, no interrurt
occurred. (The output 1'67' shOUld bave caused diagnostic hardvare to force the selected type interrupt.)
Register x'11' indicates the type of transfer seguence being tested. ISee routine description.) Pre-Test
Brror. Berun routine X9QO.
EaROR CABD

QQQ§

.Q£Al1Q~

FElLD

PETR!

lA§I!2~

!AiIHQ~

PE103

8-010

Following the occurrence of the forced level 3 intertupt, an input X'62' indicated that the level 3
interrupt received vas not the data/status level 3 expected. Reg X'14' contains the results of the input
X'62'. Reg. X'11' indicates the type of transfer sequence being tested. (See the routine description.,
Pre-Test Error. Rerun routine X940,
BRROR
X942

OX03

CARD

PEALD

!'

\;QIlI LQ!;lU9Il Ufill!!Q.. U!!I.1l9..
1946

E4'l2

After having selected the first CA-4, it was disabled and a check .ade to ensure that no frogram Requested
Interrupt was pending. One was Reg X'14' contains the results of the input X'62' issued after the disable.
Pre-Test Error. Rerun routine 1903.
ERROR CARD

!;QDl

LQ~A!!QIl'

PBALD

FETIIII

RAglllQ.. 2A!!l!!.2...
PA108

Pollowing an output X'67' with bits 0.5 and 0.7 on to select CA '2, an input X'67' indicated that CA .2 was
not selected. Register 1'14' contains the results of the IN X'67'. 1'te-Test Error. aerun routine X901.
EIIROB CABO
X946

nUD

nnll

PG102

8-070

~QIlB

L!l!;UIQIl U!!l1l9.. fliDQ ...

OX04

E4T2

After having selected the second CA-4, it was disabled and a check made to ensure that no Program Requested
Interrupt w~s pending. One was. Register X'lQ' contains the results of the input X'62' issued after the
reset. Pre-Test Brror. Rerun routine X903.
ERROR CARD

X946

£gD! LQ£AI!QIl

PBALD

FET""

fA~!!Q~

RA~IRQ'"

OX05

1'11102

8-230

]!QG2

With CA .2 selected, an output X'67' with bits 0.3 and 1.1 on was issued to set Program Requested Interrupt
on the first CA without changing CA selection. Level 3 interrupts were unmasked and a check made to ensure
that a leyel 3 interrupt did occur but that CA .2 was still selected. If bit 0.0 of req. X'15' is on, no
level 3 interrupt occurred. If bit 0.0 1s off, a level 3 interrupt occurred and reg. X'lQ' contains the
results of an input X'77' issued when the interrupt occurred. Reg. X'1S' contains the bits in error:
Bit 0.0:

110 level 3 interrupt occurred.

(Ignore remaining error

bits.)
Bit 1.0:

Although a level 3 interrupt occurred, input X'77' did not
indicate type 4 channel adapter level 3 interrupt.

Bit 1.3:

A data/status level 3 interrupt was indicated. With Cl .2 still selected
and the interrupt condition set on CA ", no data/status interrupt should
be indicated.)

Bit 1.4:

An initial select interrupt was indicated.

Bit 1.6:

CA.2 was no longer selected.

ERROR CARD

FEALD

FBTKK

U102

8-230

\"

£Q1l! LQ£A!!QIl fA!!l!Q.. fA!!IRQ ...
While CA 12 is still selected, a check is made to ensure that an input 1'62' does not indicate a frogram
Bequested Interrupt. (The Program Requested Interrupt should bave been set on CA 'l). Reg. X'14' contains
the results of the input 1'62'.
ERROR CARD

X946

PEltD

f

UtilI!

!;QD!

LQ~UQ.I!

Rl!!lIlQ~

i!!!ll!2...

0107

B4G2

PII102

8-230

"
(,

8.20 X3705JH

Type 4 CA IPT

(
(
.{

"'.

o
o
IBII 3705 COIIIIUIIICU'IOIiS COIl'UOttBB

D99-3705B-09

()

Select CA .,. An output ('67' with bit 0.5 on is issued to select CA ., again. An input X'67' which
followed indicated CA It had not been selected. Register X'14' contains the results of the input X'61'.
not a pretest erro~, this function has previously been tested. fry rerunning routine 1901.

o
o

~hou9h

BBBOB C1RD

SQRI LQS!Il2¥
X946

0(08

,

X946

1947

o
o
o
e

8-230

10 level 3 interrupt occurred.

(Ignore relaining error bite.)

Bit 1·0:

IH X'17l di4 not indicate a Cl-II level 3.

Bit 1.31

A data/status interrupt was not indicated.

Bit ,. II:

an

Bit 1.6:

Cl 12 was still selected.

initial select interrupt was indicated.

PBALD

~n

lo!!£UIQl!. U§JI!!...

Or09

IIU2

PG,02

UTili
EWI~

8-010

Dual type II channel adapter I ••ediate Select Cl .2

Bnsure that with the third Cl selected, an output X'67' can be issued to the first Cl without changing the CA
selection. Prograe Requested Interrupt is used as tbe test vehicle. Tbis routine runs only on macbines with a
third type II channe~ adapter defined in the CDS.

,

Tbe oyerall operation of this routine is:

I

o
o

t'11102

,ollowing the data/status interrupt fro. CA ", an input X'62' did not indicate a Progra. Requested
Interrupt. Register X'14' contains the results of the input X'62'.

, '

o

E!§J!Q~

Bit 0.0,

BRBOR CARD

i
[

FBTal!

iliElQ~

After reselecting Cl ." interrupts are again unoasked, and a check oade to ensure that a data/status leyel
3 interrupt fro. CA ., now occurs. (Tbe Prograo Requested interrupt previously set has not been reset and
should still be pending.) If bit 0.0 of reg. ('15' is on, no level 3 interrupt occurred. If bit 0.0 is
off, an interrupt 4id occur an4 reg. X'14' contains the results of t~e input x'17' issqed following the
interrUpt. Register X'15' contains the error bits:

o
o
o
o
o

B4G2

'BltD

1.

After selecting and disabling the first
Prograll Requested Interrupt hoff.

2.

After selecting and disabling the third CA-II, ensure that Prograe
Requested Inteullpt is off.

3.

Cause a Prograe Requested Interrupt on the first
the third one selected.

4.

lllow interrupts and ensure an interrupt occurs but that input X'77'
indicates the third type 4 channel adapter is still selected and Prograe Requested
Interrupt bas not been set.

5.

Select the first type II cbannel adapter and verify that Prograe Reguested Interrupt bas
been set.

X947

ERROB CARD

PEALD

PETRa

~RI

'~£AIlQ.

f!§JIQ~

EA§J!~

0(01

E412

U10S

8-120

CA-~,

ensure tbat

Cl-~,

leaving

Pollowing an output X'67' vith bit 0.5 on to select CA ", an input X'67' indicated that CA ., was not
selected. Beg. X"II' contains tbe results of tbe input X'61'. pre-fest Error. Rerun routine 1901.
BRBOR ClRD

1947

PB1~Q

PBTaa

SQR§ LQ£!IlQ!

il§II!!~

l!§iJ~

0(02

PG102

8-070

B4T2

lfter having selected the first Cl-4, it was disabled and a check aade to ensure that no Prograa Reguested
Interrupt was pending. One vas Reg X'14' contains the results of the input ('62' issued after ~he disable.
Pre-Test Error. Rerun routine 1903.

Type 4 CA 1FT

(3705JAA 8.21

ERROR CARD

QQDl

19~A!lQ!

PEALD

PETIII!

Ul08

8-120

iAiiHQa. Uliill!a.

,ollowing an output 1'67' vith bits O.S and 0.6 on to select CA 13, an input 1'61' indicated that CA .3 was
not seleCted. Register X'1~' contains the results of the IN X'67'. Pre-Test Error. Rerun routine 1901.
ERROR CARD

X9117

QQDI

PEALD

PETIIII

1Q~A!IQ!

iAii!Qa. fAii!2a.

OX04

EII'f2

1'Gl02

B-070

After having selected the third Cl-II, it was disabled and a check aade to ensure that no 1'tograa aeguested
Interrupt was pending. One was. Register X'14' contains the results of the input 1'62' issued after the
reset. Pre-Test Error. Rerun routine X903.
ERROR CARD
X9~1

FBALD

PBTIIB

PII102

11-230

~Qni

12£111QI iAilHQa. iAilIQa.

OX05

E~G2

With CA .3 selected, an output X'67' with bits 0.3 and 1.1 on was issued to set Prograa Requested Interrupt
on the first CA without changing CA selection. Level 3 interrupts were unaasked and a check .ade to ensure
that a level 3 interrupt did occur but tbat CA .3 vas still selected. If bit 0.0 of reg. X'15' is on, ~o
level 3 interrupt occurred. If bit 0.0 is off, a level 3 interrupt occurred and reg. I"~' contains tbe
results of an input X'71' issued when the interrupt occurred. Beg. X'15' contains the bits in error;
Bit 0.0:

Ho level 3 interrupt occurred.
bits.)

Bit 1.0:

Although a level 3 interrupt occurred, input X'17' did not
indicate type 4 channel adapter level 3 interrupt.

Bit 1.3:

A data/status level 3 interrupt was indicated. With CA .3 still selected
and the interrupt condition set on Cl ." no data/status interrupt should
be indicated.)

Bit

1.~:

Bit 1.5:
EBROB CARD

QQD.§ 12£AUQI
X9~1

OX06

(Ignore remaining error

An initial select interrupt was indicated.
CA.3 was no longer selected.
PBALD
f!iI!Q~

PETlle

fA§I!lQ ..
0-230

B~G2

While CA .3 is still selected, a check is sa de to ensure that an input 1'62' does not indicate II Prograa
Requested Interrupt. (The Program Re~uested Interrupt should have been set on Cl '1). Reg. X'111' contains
tbe results of the input X'62'.
BBBOR CARD

PEUD

FETIlft

OX 07

PII102

8-230

£qDI LQ£AIIQ.!\ U2J!lQ.. fAill!2a.
X941

E4G2

'1.

.1

Select Cl
An output X'67' with bit 0.5 on is issued to select CA
again. An input 1'61' which
followed indicated CA ., had not been selected. Register X'l~' contains the results of the input X'67'.
Thougb not a pretest error, this function bas previously been tested. ~ry rerunning routine 1901.
ERROR CUD
1941

PEUD

FETIIB

m!!.!!

1Q£AUQ! RAi.!!IQ.. fAi.§lqa.

OX08

!4G2

PII102

8-230

After reselecting CA '1, interrupts are again unmasked, an4 a check aade to ensure that a data/status level
3 interrupt frol CA .1 now occurs. (1he Program Requested interrupt previously set has not been reset and
should still be pending.) If bit 0.0 of reg. 1'15' is on, no level 3 interrupt occurred. If bit 0.0 is
off, an interrupt did occur and reg. X'14' contains the results of the input 1'77' issued following the
interrupt. Register X'lS' contains the error bits:
Bit 0.0:

No level 3 interrupt occurred.
(Ignore relaining error bits.)

Bit 1.0:

1M

Bit 1.3:

A data/status interrupt was not indicated.

Bit 1.4;

An initial select interrupt was indicated.

8.22 X370SJAA

1'77' did Dot indicate a

CA-~

level 3.

Type 4 CA II'T

o
IBft 3105 COftaURICA,IOHS CO.TROLLBR

o

o
o
o
o
o
o

lit 1.5:

1941

099- 310SB- 09

CA.3 vas still selected.

BRBOR CABO

PBAtD

~.U

1&~21

iAW2.. !Ail!2&.

PBTI!

0109

114'2

PG102

11-070

Pollowing the data/status interrupt fro. CA ", an input X'62' did not indicate a Progra. Regutisted
Interrupt. Begist_r 1'14' contains the results of the input 1'62'.
X948

Dual type II channel adapter I ••ediate Select Cl .3

Bnsure that witb the fourth CA selected, an output X'67' can be issued to the first Cl without cbanging tbe CA
selection. Pr09ra. Dequested Interrupt is used as tbe test vebicle. Tbis routine runs only on •• cbines witb a
fourth type q channel adapter defined in tbe CDS.
The overall operation of this

ro~tins

,i8:

1.

After sel'ecting and disabling the first CA-II, ensure that
Progr •• Bequested Interrupt is off.

2.

After selecting and disabling tbe fourth cA-q, ensure that progr ••
Requested Interrupt is off.

3.

Cause a Progras Requested Interrupt on the first CA-II, leaving
tbe fourth one selected.

II.

lllow interrupts and ensure an interrupt occurs but that input 1'11 1
indicates tbe fourth type II channel adapter is still selected and Progra. Requested
Interrupt has not been set.

S.

Select the first type II cbannel adapter and verify that Pragra. Bequested Ibterrupt has
been set.
BRROR CABO

PIIALD

PET!K

OXOl

PA,08

8-120

QQRE 1Q£!IlQI f!2l!Q.. f!i!IQ ..
1948

Billa

Polloving an output 1'67' with bit 0.5 on to select CA ", an input X'67' indicated that CA ., was not
selected. Beg. X'14' contains the results of the input X'67'. Pre-fest Error. Rerun routine 1901.
BRROR C1RD
~~§

o
o
o
o

OX02

PBltD

PET.K

PG102

/1-070

1Q£1I1Q! fA§I!2.. fAg!!Q ..
E4T2

After having selected the first Cl-4, it vas disabled and a check .ade to ensure that no Program Requested
Interrupt vas pend in,. One vas Be~ X'14' contaics the res~~ts of the input 1'62' issued after tbe disable.
Pre-Test Error. Beran routine 1903.

xgqa

ERROR CARD

PBALD

PETRR

~R§

1QSA~12!

2!i~~Q&

f6g~!Q~

OX03

B4P2

~A1G8

H-t20

.ollowing an output X'67' vith bits 0.5, 0.6 and 0.7 on to select CA '2, an input X'67' indicated that Cl .4
was not selected. Register 1'14' contains the results of tbe II 1'67'. Pre-Test Error. Be run routine
%901.
ERROR ClRD

QQ~§

PBALD

'ET!K

PG102

8-070

L!lSAIIQIt U§I!ll.a. UgH!!..

After having sel~ted the fourth Cl-4, it was disabled and a check made to ensure that no Progra, Requested
Interrupt las pendin,. One .4~. ~gister X'14' contains the results of t~e input XI62' issued after the
reset. Pre-Test Error. Berun ~outine 1903.

X948

BRROR CARD

PBALD

PETR!

£SID!

LgSA~I!l!

fAil!2..

lA§l12~

OltOS

B4G2

1'11102

8-230

Type 4 CA IP'l'

1370SJU 8.23

P99- 3105E- 09

with CA .4 selected, an output X'61' witb bits 0.3 and 1.1 on was issued to set P~ogra. Requested Interrupt
on the first Cl without changiDg CA selection. Level 3 interrupts were un.asked and a check ,ade to ensure
that a level 3 interrupt did occur but that C~ .4 was still selected. If bit 0.0 of reg. X'lS' is on, no
level 3 interrupt occurred. If bit 0.0 is off, a level 3 interrupt occurred and reg. X'14' contains the
results of an input x'77' issued wben tbe inte~rupt occu~red. Reg. X'15' contains the ~its in error:
Bit 0.0:

No level 3 interrupt occurred.
bits. )

Bit

Although a level 3 interrupt occurred, input X'77' did not
indicate type 4 channel adapter level 3 interrupt.

,. Q:

Bit 1.3:

X948

(Ignore reaaining error

A data/status level 3 interrupt was indicated. With CA .4 still selected
and the interrupt condition set on CA ." no data/status interrupt should
be indicated.)

Bit 1.4:

An initial select interrupt was indicated.

Bit 1.6:

CA .4 was no longer selected.

ERROR CARD
£Q!H! .l.Q!;;UI2!

FEUD

UTIIII

EAiJ!Q~

RA~~!Q~

OX06

118102

H-230

B4G2

While CA '4 1s still selected, a check is made to ensure that an input X'62' does not indicate a Progral
Requested Interrupt. (The Program Requested Interrupt should have been set on CA "1. Reg. X'14' contains
the results of the input X'62'.
ERROR CARD
X948

FEALD

FETIIII

~~~

.l.Q!;;AtlQ!

EA§!!Q~

fA~~!Q~

0107

E402

PII102

8-230

Select CA ". An output X'67' with bit 0.5 on is issued to select CA ., again. An input X'67' which
followed indicated CA ., had not been selected. Register X'14' containS the results of the input 1'67'.
Though not a pretest error, this function has previousl¥ been tested. Try rerunning routine 1901.
ERROR CARD
1948

FEUD

FETIIII

£QI!~

.l.Q!;;AllQ!

E!~!QL

R!~!!QL

0108

EqG2

PII102

After reselecting CA ", interrupts are again unmasked, and a check aade to ensure that a data/status level
3 interrupt fro. Cl ., now occurs. (The Program Requested interrupt previously set has not been reset and
should still be pending.) If bit 0.0 of reg. X'lS' is on, no level 3 interrupt occurred. If bit 0.0 is
off, an interrupt did occur and reg. X'14' contains the results of the input X'17' lssued following the
lnterrupt. Register X' 15' contains the error bits:
Bit 0.0:

No level 3 interrupt occu~red.
(Ignore reaaining error bits.1

Bit 1.0:

IN X'77' did not indicate a Cl-4 level 3.

Bit 1.3:

A data/status interrupt was not indicated.

Bit 1.4:

An initial select interrupt was indicated.

Bits 1.5
ERROR CABO
QQ~~

.l.Q£AI!Q!

&

1.6:

CA .4 was still selected.

FEALD

fETlI1I

~A2~!QL

~!~~!Q~

PO 102

8-070

Following the data/status interrupt from CA ", an input 1'62' did not indicate a Program Requested
Interrupt. Register X'14' contains the results of the input X'62'. X949
Dual type
4 channel adapter Immediate Select C1 .4
BQQI!!~ Q~~£~IR!!Q!

Ensure that with the first CA
selection. Program Bequested
multiple CA-4's and only when
The overall operation of this

selected, an output X'67' can be issued to the second CA without changing the CA
Interrupt is used as the test vehicle. This routine is run only on aachines with
the second CA-4 is defined in the CDS.
routine is:

1.
After selecting and disabling the second CA-4,
Requested Interrupt is off.
2.

ensu~e

that

P~ograll

After selecting and disabling the first CA-4, ensure that Program
Requested Interrupt is off.

8.24 X3705JAA

Type 4 CA 1FT

o
t,"

o
o
o

o
o
o
o

31 ali COIIIIQMlCA'UOIlS

3.

Cause a Prograa
one selected.

ae~uested

1)99- 3705l!-09

tnterrupt on the second CA-4, leaving the first

Allow interrupts and ensure an interrupt occurs but that input X'll' indicates
the first type II channel adapter i, 'till .eleote4 an4 ,rQvrl, .evuested Interrupt has not
beea set.
5.

Select tbe second type 4 channel adapter and verify that Prograa
set.
1880a C181)
~!lI

1949

PULD

ae~uested

Interrupt has been

PIUK

LQSAUID! Elil!U!.. lAiU.2..

OXO 1 E4P2

1'1108

8-120

Polloving an output X'61' with bits 0.5 and 0.7 on to select C1 .2, an input X'67' indicated that Cl .2 vas
not selected. Register X'14' contains the results of th~ input X'67'. Pre-~est IIrror. Berun routine X901.
laROB CABD
~!!I

X949

OX02

PBALD

PIT!!

PG102

8-070

I&!£!UQ'!! l!iI.!lQ..
111'1:2

nwg..

After baving selected the second CA-4, it was disabled and a cbeck aade to ensure that no Prograa Bequested
Interrupt vas pending. One vas Beg. X'14' contains the results of tbe II X'62' issued after the disable.
Pre-Test Error. Berun routine X903.
E880R CARD
X9119

PllLO

PlUII

U108

11-120

~!ll

J,QSlIIQ.!! fl!il.!lQ.. 11§!.!I9..

OX03

UP2

Polloving an output X'67' vitb bit 0.5 on to select C1 ., an input X'67' indicated tbat C1 ., vas not
selected. Begister X'111' contains tbe resnlts of the input 1'67'. Pre-Test IIrror. Berun routine 1901.
ERBOR CABD

f1
Li

co.nonn

PllLD

PETIIII

s;5!U

I&!£AU2.!I f!i!.!!2..

1!§1~

OXOII

111'1:2

8-070

PG102

After having selected the first CA-II, it vas disabled and a check made to ensure that no Prograa Requested
Interrupt was pending. One vas Register X'14' contains the results of the input X'62' issued after t~e
reset. Pre-Test Irror. aerun roptine 1903.
-'I!1I1101l CUD

l'BAtD

FEUII_

SQIl§ IQ\;UI9l!

ilG~Q..

U§.!ll!2a.

1949

BIIG2

"11102

8-230

OX 05

litb CA ., selected, an output X'67' vith bits 0.3, 0.7 and 1.1 on vas issued to set Prograa Requested
Interrupt on the second CA vithout cbanging C1 selection. Level 3 interrupts were unmasked and a check made
to ensure that a level 3 interrupt did occur but that CA '1 vas still selected. If-bit 0.0 of register
X'15' is on, no level 3 interrupt occurred. If bit 0.0 is off, a level 3 interrupt occurred and register
X'14' contaius the results of an input %'77' issued when the interrupt occurred. Degister X'15' contains
the bits in error:
Bit 0.0: 10 level 3 interrupt occurred. (Ignore remaining
error bits.)

o

Bit 1.0: Although a level 3 interrupt occurred, input X'77' did not
indicate type 4 cbannel adapter level 3 interrupt.
Bit 1.3: A datalstatus level 3 interrupt vas indicated. (lith Cl "
still selected and the interrupt condition set on CA '2, no datal
status interrupt should be indicated.)

o

Bit

o

1.~:

An initial select interrUpt was indicated.

,Bit 1.6: CA ., was no longer selected.
EaROR CARD

PE1LD

PET""

SQ!l§ J,QS!IIQl! j!iI'!!Q.. l!!i!'!!Q..
X949

1949

OX06

E4G2

H-230
""'02
Rhile CA .1 is still selected, a check is aade to ensure that an input 1'62' does not indicate a Program
Requested Interrupt. (The Progra. Bequested Interrupt should have been set on C1 f2.) Register X'14'
contains the results of the input 1'62'.

ERaoa CABD

MQ£!11Q.!I

PIALD

~RI

~A§I!Q..

1!§.!ll!Q..

0107

l!4G2

PII102

8-230

Type 4 Cl tP'r

PETIIII

X3705JU' 8.25

:(J
lBlI 1705 COIIIIIIUCUIOU COIf'rROJ.UR

seiect Cl '2. an output X'67' lIith bits 0.5 anel 0.7 on is issuel to select Cl '2Igain. &II I I X'67' whicb
follolleel inelicateel Cl .2 bael not been selecteel. aegiste~ X".' contains tbe ~esults of the input X'67', tbough
not a p~et.st e~ror. tbis function bas previously been tested. T~J rerunning ~outine 1901.
ERROR CARD

.BALD

0108

1'11102

QQDI lQSlllQH ilil!2L
X949

B4G2

.ETIIII
i!iIKQ~

8-230

,,-",

CA '2, interrupts are unaaskeel, and a check aaele to ensure that a elata/status level 3
.2 now occurs. (Tbe Prog~al Requested Inter~upt p~eviouslf set baa not been reset aDel
shoulel atill be peneling.) If the interrUpt bit 0.0 of regi.ter XllS' i. on, no level 3 interrupt Occurreel.
If bit 0.0 is off, an inte~rupt 4iel occur anel register X'14' contains the results of tbe input x'71' 1.sueel
following the inte~~upt. Beg "15' contains the er~or bits:

"lj'

Bit 0.0:

Ko ievel 3 interrupt occurred.
error bits.)

'(so'

Bit 1.0:

IN X'77' did not indicate I type 4 cbannel lelapter level 3.

Bit '.3:

A data/status interrupt was not indicated.

~eselecting
inte~~upt froa CA

After

Bit '.4:

An initial select

Bit ,.6:

CA ., was still selected.

ERROR CnD

PElLD

OX09

PG102

inte~rupt

(Ignore relaining

.~

1;,

was indicated.

UTili!

£Q1l1 lQSWQ!! iA[!!QL iA[!!!QL
X949

UT2

8-070

.ollowing the data/status interrupt frol CA '2, an input 1'62' did not ineliclt. a Progrll Requ.sted
Interrupt. Register X'14' contains tbe results of tbe input X'62'.

Ensure that with the first CA
selection. Progral Requested
lultiple CA-4's and only when
The overall operation of this
1.

After selecting and disabling the third CA-4, ensure that Progral
Requested Interrupt is off.

2.

After selecting and disabling the first CA-4, ensure that l'rogra.
Requested Interrupt is off.

3.

Cause a Progral Requested Interrupt on
one selected.

4.

Allow interrupts and ensure In interrupt occurs but that input X'77' indicates
the first type 4 channel adapter is still selected and Prograe Requested Interrupt has not
been set.

5.

Select the third type 4 channel adapter and verify that l'rogra. Requesteel Interrupt has been
set.

ERROR CARD

£QIlE
X941

selected, an output 1'67' can be issued to the third CA lIithout changing the CA
Interrupt is useel as the test vehicle. This routine is run only on lachines witb
the thirel CA-4 is defined in the CDS.
routine is:

OXOl

.BALD

t~e

third CA-4, leaving the first

'BT!"

~SA~lQB

iA§JBQ&

iA~!!~

E4P2

PA108

0-120

'ollolling an output X'61' with bits 0.5 and 0.6 on to select Cl '3, an input 1'67' indicated that CA .3 was
not selected. Register 1'14' contains the results of the input 1'67'. Pre-Test Brror. Rerun routine 1901.
BRROR CARD

.BALD

'BT""

SQ~E

iA[!!Q~

iA2!HQ~

PG102

8-010

1Q£A!!Q!

/

\

After having selected the third CA-4, it was disabled and a check made to ensure that no Program Requested
Interrupt vas pending. One vas Reg. X"4' contaips the results of the IN X'62' issued after the disable.
Pre-Test Error. Rerun routine 1903.
BaROR CARD

.ElLD

'BT""

OX03

PA108

8-120

£Q1l1 LQS1IIQ! iliEB9L
X941

E4.2

8.26 X3705JAA

11§!B~

Type 4 CA IFT

.1

o
IBM 3705 COHftUMICA'l!IOIfS CON-,BOLLER

D99-3105E-09

Following an output X'67' with bit 0.5 on to select CA " an input X'67' indicated that CA 11 was not
selected. Register X'1~' contains the results of the input X'67'. Pre-Test Error. aerun routine 1901.
ERROR CARD

o

o
o
o
o
o
o

X94A

OX04

E4T2

~ ,
PG,~2

i.~!!Q..

11-070

After having selected the first CA-4, it vas disabled and a check .ade to ensure that no Prograa Requested
Interrupt was pel ling. One was Register 1'14' contains the results of the input X'62' issued after the
reset. Pre-Test ~rror. Rerun routine 1903.

X94A

ERROR CARD

PEALO

!9'-310511-119
type' Cbannel Adapter eztended botfer test 2

1959

B9!%lIJ

o

o
o
o
o
o

9J~£Bli~lgl

IDft lOCAL S!OBI _ DATA I.Tllrlll.C. TIS! .0ftBaR 2.
In this test 15 positions of the bqffer ate writteo into, aod the relaining position is read and ,.rified to be
uncbanged. Tbe position read and ,erified il Idvanced 00 consecutive pesses.
All type 1/ cbannel ad.. pter IFTs shoQ14 bave Ileen rlln prior to runn1ng tbis routine.
It an error is detected, the channel adapter card aqJ2 is asslIl.d bad.
Do not .ttelpt to loop on error.

This routine 18 not designed to loop on error.

To tborollghly test tbe extended boffer for defective HDB lodllles, tbe -1/.0 volts dc lust be varied to -3.6 end
'de. Refer to lID }lg~ £Q!agai~!~i9DI £9D11911!1 llllA Ingin!!1lng ~h!QIl'DI!n1iD!nS! AAn9I1~ 5121-0101 Page
0-230/D-580.

-Ii.'

Approxllate run ti.e i. 3 and 1/2 linutes.
STOP

£!IIUI
r001

1959

This stop occurs at the beginning of tbe routine to allow adjusting the -4.0 'olts dc .easured at aOJ B06
pin on tbe Bli board. Adjust the voltage to -3.6 and ron the routine several tiles. Replace cbannel adapter
card if error 1s detected. After running tbe routine with the voltage adjusted at -3.6 'dc, adjust the
voltage to
'de and rlln tbe routine 88'eral lore tiles. Replace channel adapter card 1f failure occurs.
Restore tbe ,oltage to -4.0 before returniDg the controller to the eustoler.

-Ii.'

TESTIBG

a~COftfta.DaTIOB:

1.

During tbe option step of routine selection,
.ake tbe ROUTIBa LOOP reguest VIa X'10' in tbe D and B switcbes.
2. at tbe lanual Intervention STOP, 'fOOl' II TBI 'B' LIGHTS;
a. Adjust tbe -4 ,olts as desired.
(BOTI: FAULT ur OCCOR IIITH OUT VUUMG '10L'UGa)
b. anter CC in the D and B switcbes.
3. Put tbe rUnction switch to runctioa 5 position, and press START.
'CC' in the D and B switches causes tbe routine to BY-PiSS
subsequent N.I. stops.
CbangiQg tbe D and B switcbes to anytbing otber tben 'CC'
will cause tbe nezt N.I. stop to occur.
BRROR CABD
£21!1 l.9!cWQ!!'
1959

0159

14J2

FEUD

FETNft

U§J!!'Q

f!§HQ

PIC102

B-130 tbrougb H-160

Tbis error is because date. cos pare did not result after an input z '6D'.

o
o
o

Reg x''''' bas data, the results of an input x'6D'.
Reg z'15' baa data bits in error. (PICnD OR DROPPED)
Reg 1'16' haa da t. ezpected.

Type" Ci IFT

X3105JAA p.41

o
o

D99-0 3'1051- 09
X951

!ype

~

Channel Adapter extended buffer teat 3

JQYIl!J

RI~lli11QI

IBB lOCAL STOBB DATA

'.~lal.CB

TIS! JOIBBB 3.

!his routine writes 1'0000' through x'rrrc' into consecutive positions of the extended buffer.
In this test 1 position of the buffer is written into, and the reeaining positions are read and verified to be
unchanged. The position "ritten is ad,anced all cOllsecutive passes.
'
111 type q cbannel adapter IF!s should have beell rUII prior to ruuning tbis routiue.

If an error is detected, the cbaanel adapter card IqJ2 is assueed bad.
Do not atte.pt to loop on error.

This routine il not Aaliglled to loop on error.

!o thoroughly test tbe extellded buffer for defective BOB 10dules, the -q.O Yolts dc eUst be varied to -3.6 alld
-4.4 Vdc. Refer to 111 ll~~ £2!19DigliiQDJ 'QD!I211!~ lillA laaiDliIiD9 tkl2I1 111i1JBl&2! .IDill~ SY27-0101 Page
D-230/D-580.
lpproximate run ti .. 1s

~

dnutes.
/

S~OP

£2nl
1951

r001

!ES~IHG

!his stop occurs at the begillning of the routine to allow adjusting the -4.0 Volts dc aeasured at any a06
pin on tbe E4 board. ldjust the voltage to -3.6 and run the routine several tiees. aeplace chanllel adapter
card if error is detected. lfter runnillg the routine with the voltage adjusted at -3.6 Vdc, adjust the
voltage to -~.4 Vdc and run the routine several sore tises. Beplace channel adapter card if failare occars.
Restore the voltage to -4.0 before retarnll1g the cOntroller to the custoser.

(

,

\.

/

RECO!ft!NDA!IOI:

1.

During the option .tep of'routine .. ljacU,on,' .'
uke the ROOUn Ldop request VIA X'10" in the D aild I s"itches.
At the Banual Intervention STOP, 'P001' II THE 'B' LIGH~S;
a. Adjust the -4 volts as desired.
b. Enter CC in the 0 and B svitches.
3. Pat the Function switch to Function 5 position, and press S~lRT.
'CC' in the 0 and E svitches causes the routine to BY-PASS
subseguent 11.1. stops.
Changing the D and B switches to anything othe~ then 'CC'
vill cause the next ft.I. stop to occur.
2.

1951

BRBOR C~BD
Q1IUi J.Q£lHQ!I

FBALD
EA§l!l!Q

PBTR!
fliUQ

015A

PK102

8-130 through 8-160

~h1s

error 1s because data cos pare did not result after an input x'6D'.

Reg x'14' bas 4ata, the results of aD input x'6D'.
Beg x'15' has data bits 1n error. (PICKED 08 DROPPBDI
Beg x'16' has data expected.

8.42

X 3705JAA

\

Type" C1 UT

(

I

0
0

lB, 3105 COKIO"IC1TIORS

C)

X958 Type _ Channel Adapter B%tended

p99-3705B-09

COVT~O~Lla

B~ffer

Test q

IUl.HlIll U&BUllQl!
BBB tOCAL STORI _ DATA INTERPBREHCI TIST IUMBSR

0
0
0
0
0
0

~.

PING POHG fESf NUBREI OHE:
Various data patterns are written and read in various positions of the extended buffer.
All ifpe 4 CbaDnel Adapter IFTs should have baen rUD prior to runDiDg tbis routiDe.
If an error is detected, tbe cbanDel adapter card 14J2 is assueed bad.

Do not atteapt to loop on error.

fhis routine ia Dot des1,ne4 to loop OD error.

To tborougbly teat the extended buffer for defective BDB 80dules, tbe -_.0 Volts dc eust be varied to -3.6 and
-4.4 Vdc. Refer to liD 112~ £2119ni~IIi9!! '2n~~ell!~ Ii!l~ Inginl!Iing thl911 IlinilDln~1 IlnBll. 5121-0101 Page
0-230/D-580.
Appro%ieate rUD tiaa 1s 1/2 second.
STOP
£Q!U!
1958

-

U

P001

TESTING RBCOftB!HDATIOR:
1.

During the option step of routine selection,
.ake the ROUfIIB LOOP request VIA t'10' iD the D and B switches.
2. At tbe Raaual Intervention STOP, 'r001' II THB '8' LiGHTS;
a. ldjust the -q volts as desired.
(HOTB: P1ULT "lY OCCUR 11TH OOT '&RYIIG VOLT1GIl
h. Bnter CC in the D and B switcbes.
3. Put the PunctioD switch to Punction 5 position, aad press START.
'CC' in the D and B switches causes the routine to B1-PASS
subsequent R.I. stops.
Changing tbe 0 and E switcbes to anything ot~er then 'CC'
will cause the next B.I. stop to occur.

',I

e

1958

0
0
0
0

Tbis stop occurs at tbe beginning of tbe routine to allow adjusting tbe -_.0 Volts de aeasured at anr 806
p1n on tbe B4 board. Adjust tbe voltage to -3.6 and rub tbe routine aeveral tiees. 8eplace channel adapter
card if error i, detected. After runDiag the routine with the voltage adjusted at -3.6 'dc, adjust the
,oltage to -4.4 'de and run tbe routine several eore tises. 8eplace cbannel adapter card if failure occurs.
Restore the voltage to -11.0 before returning tbe controller to the custouer.

BUOB CARD
~QQ§ LQ£!l1Q!

rEAL D
f!§E!Q

rBTIIB

015B'

PItl02

8-130 through 8-160

04J2

fl~E!Q

This error is because data compare did not result atter an input %'6DI.
Reg %'14' has data, tbe results of an input %'6D'.
Reg x'15' bas data bits in error. (PICKBD OR DROPPBD)
8eg 1'16' bas data e%pected.
1958

P1t102

OX01

8-130 througb H-160

This error stop resulted because of a level 1 interrupt.

e
e

e
e

e

Type 4 CA IFT

X3705JAA 8.113

o
IP" 3705

CO.NU.ICAT~QHS

o

CONTROLtlR

19SC Type 4 Channel Adapter Ixtended Buffer Test 5

IQYIIRB

~j~!lEII9!

IBN LOCAL STORI _ DATA I.TllfIRSHCI TSST NORa81 5.
PIIIG PONG !1ST NUlIBfl TIIO:,
•

!~

• "

<"

Various data pat~erl\s are written and t'ead in various positions of the extended buffer.
All Type 4 Channel Adapter IPTs should have

~een

run prior to running this routine.

If an error is detected, tbe channel adapter card 14J2 is assuled bad.
De not attelpt to loop on error.

THIS 10UTIHI is pot designed to loop on error.

To thoroughly test the extended buffer for defective HDB lodules, the -4.0 Volts de lUst be varied to -3.6 aad
-4.4 vdc. Refer to IRa ~12~ ~!lgnigl~i2nl ~2U1£gll!£ [i!la In~in!!£in~ th!2£I Iiin1!DlD2! 1lD!~& 5121-0101 Page
II- 2l0/D-S80.
.

Approlllate rUn tile is 1/2 second.
STOP
~Ql!l

X9SC

r001

This stop occuu at the beginning of tbe routine to allol1 adjuaUng the -11.0 'olts 4c ,8I8IIre4 at any a06
pin on tbe 14 board. Adjust the voltage to -3.6 and run the routine .everal tile.. lepllce channel adapter
card if error is detected. After running the routine lIith the voltage adjusted at -3.6 '4c, adjust tbe
901tage to -4.4 Vdc and run the routine several lore tias.. lep1ace channel Idapter card if fallurl OCCurs.
Bestore the 901tage to -4.0 before returning the controller to the custoser.

TESTIHG RICONRINDATION:
1.

During the option step of routine selection,
lake the ROUTINI LOOP reguest VIA 1'10' in the D and I switches.
At the Ranul1 Intervention STOP, 'r001' 1M THI 'B' LIGHTS;
a. Adjust the -4 volts as 4esired.
(IOT8: PAULt 8AI OCCUR 11TH OOT YARIIIG YOLTAGI)
b. Inter CC in the D and B switches.
l. Put the Punction switch to Punction 5 position, an4 press START.

2.

,/

'CC' in the D and 8 sllitches causes the routine to BI-PASS
subsequent ft.I. stops.
Changing the D an4 I switches to anything other theA 'CC'
lIi11 CIUSe the nelt B.I. atop to occur.
BRROB CARD
~I!§

X95C

OXSC

~Qk!IlQ!

E4J2

fEALD

PITKN

Plt102

H-130 through 6-160

Eli!!Q

Elg§IQ

This error is because data co.pare 4id not result after an input 1'60'.
Reg x'1Q' has 4ata, the results of an input 1'6D'.
Reg x'1S' has 4ata bits in error. (PICKED OR DROPPED)
Beg x'16' has data elpecte4.
X9SC

OXOl

E4J2

PK102

H-130 through 6-160

This error stop resulted because of a level 1 interrupt.

8.44 1370SJU

Type 4 CA IFT

o

o
1)99-37058-09

o
o
o

1911

• C8ARIEL

ADAP~EB

'he tollo"ing
1911

1101

a~e

cO.lon

CUD

UUD

BIIP2

P8103

8-120

e~~o~

codes that

occu~

in cOllon sub-routines.

rUBI !i!!lll

Channel Adapter interface was not disabled.

BRRoa CARD

191X

COBBOI EBBOB STOPS

lIBBOI

'ype

.BALD

sgDI LQliAIIQI

2AilIQ~

2AiJl2£

1102

l'A108

8-120

Bill 2

Rerun

~out1ne

1902.•

rIT!B

Atte.pt to select type _ channel adapter under test failed. Register 1'1Q' contains
Select bit should hate been opposite to wbat it was. aerun routine 1901.

o

o
o

~YP!

BRROR CARD

19X1

£QUI L!!liAlIQ!

PBALD

PBTBB

flil!Q~

!l§J!~

1103

P&10B

8-120

In2

Attempt to select type, cbannel adapte~ unde~ test failed. Register 1'1Q' contains
Select bit sbould ba,e been opposite to wbat it vas. aerun routine x901.
ERROa CABO

!iQUI L2!iA%lQl
X9H

FllLD

2AiJIQ~

~esults

of input 1'67'.

~esults

of input 1'77'.

rIT"!

lAilIQ~

1XOl
Unable to set
BBRoa ClaD

~egisters

PBALD

to 1'0000'.

Re~un

routines 190q througb 1925.

rl'"!

GGUJ LQ!ilZlQI llilBQ& lAilIQ£
X9U:

110B
Unable to set 1's in all used bit positions.
BBBOB CARD

rBlLD

aerun routines X90.

th~ougb

X925.

rBT!!

QQU Io!!!iA1I2! U§UQ.. lW!!!.&
X9XX

1X10
Pollowing an output inst~uction, an input instruction indicated reguested bits we~e not set ~eset. Registe~
1'16' contains tbe add~e •• of tbe outpat instruction. Reg. X'14' coDtains tbe results of tbe register X'15'
indicates tbe bits ia e~ror.
Tbe rerun routines are X90Q through 1925.

o

rB1LD

rBTB"

1X11

PL102

8-1'0

£QUI. IoQliAll!!l fAil!!!!.. U!iI!!h.
X9n

BU2

rollolling an output 1'6C' .,ith bit 0.. 0 oa, an input 1'6C' indicated B8 lode had not been set.
contains the results of the input 1'6C'.

o
o
e

BBBOR CABO

Beg I""

'be rerun routine is X932.
BBROB CABO

rBALD

rB'!!

1X21

PIl02
l'II101

8-160
8-1 60

QQUI IoQ!iAlIQ! fAilIQ.. lA§I!!!.&
X9U

1130

l!Q,J2
BQG2

After setting all positions o~ the Eft ~r~ay to zeros, an input X'6D' indicate~ one of the Positions did not
contain zeros. Begister 1'14' contains tbe results of the input 1'60'. The error code indicates the
failing halfword, i.e., 1X21 is the first, 1122, the second and so on.
The reran routine is 1936.
BRROR CARD

X911

£2nl

Lg!i~llQB

21i11Q~

.BILD

rET""

2XOO

BU2

l'r107

8-110

i!gJ~

Received an unexpected Level 1 interrupt witb no request bits on.
BRROR C1BD

rB1LD

rBt"!

£!!UB L!!£lIlQI EA§l!!!£ fA§JI!!L

Type 4 Cl In

X3105,JU 8.45

0,

,

,

1l9!1-n05B~09

X9XX

2x01

BIIL2

1'11103

8-230

Received an unexpected level 3 interrupt, bit 1.' in register 1'71 ' lias on.
BBBOB CARll

nUD

BqL2

1'B102

SQ!2E Io!l£AUQIl UlUll!!!:.
l[9XX

2102

nTU
UW~

0-060

Unable to reset the leyel 3 Initial Select interrupt.
BIIBOB CUD

PBALD

UTIIII

2103

1'B103

8-070

£SI!2!l Io9gU21! UlUll!!! .. U!i!Il!L..
X9XX

BIIL2

unexpected level 3 interrupt, bit 1.3 in register X'77' lias on. Neither the suppress Out lIonitor or the
Progral Request interrupt bits lIere on in register 1'61'. Register 1'62' should indicate the cause of
interrupt.
ERROR CARD
~!2!l

PElLD

PETIIII

IoQ£Al!21! fAill2&. RAi!!2&.
8-060
unable to reset the leyel 3 Data/Status interrupt.

ERROR CARD
X9XX

PElLD

FBTIIII

1'G102

11-070

~!2!l

IoQ£AllQI fAil!!Q.. fA§IISIa.

2X05

BIIT2

Unexpected Suppress Out Konitor leyel 3 interrupt, bit 0.6 on in register X'17 1 •
BRROB ClRD

X9XX

£QDl!

PBlLD

PETIIII

~£AUQI!

fAlUl!Q.. fA§I!Q ..

2106

!!1IT2

1'G102

8-070

Unable to reset tbe level 3 suppress Out 1I0nitor interrupt.
BRROR CARD

PBALD

FETIIII

2X07

1'6102

8-070

SQDJ Io!l£AlIQI RAiJIQ.. fAi!I!Q ..
X9XX

BIIT2

unexpected progra. Request leyel 3 interrupt.
EBROB CARD

PEALD

FBTIIII

2X08

1'6102

1I-070

SQ!2!l IoQ£!!lQI! RAiIIQ.. fAilllQ..
X9XX

BIIT2

Onable to reset the level 3 Progral Request interrupt.
ERROR CABD
X9XX

nUD

FETllII

~DI

LQ£!UQI! Uil!!!Q.. Ui!!!Q..

2X09

BIIL2
EIIT2

0-060

Unexpected level 3 interrupt fro. a type 1 cbannel adapter.
EBBOB CARD

nUD

There lias no request bits on in register 1'62'.

FETIIII

SQJ2I IoQ£AU2!! RAin!! .. RAinQ..
X9XX

2XOA
Unknown leyel 3 interrupt occurred, neither input x'17' or input X'7P' indicated the source of the
interrupt.

X9XX

EBROR CABD

PEALD

QQD~

fA~~!!!..

L!l£!llQ!

PETIIII

fA§!I!Q ..

2XOB
An unexpected type q channel adapter leyel 3 interrupt occurred.
input 1'17'.
ERROB CABO

PBALD

Beg X'09' contains the results of the

PETft!

SQ!21 Io!l£!U2!! UlUl!!!.. fAlUl!!SI..

8.116 X3705JU

Type II CA 1FT

4--~,

o
o
X9XX

o
o
o
o
o
o
o

2X 1X

l!l1ll2

1'1"01

~n ~nexpected

ERROR C1BD
XgIl

8-'00

level 1 interrupt occurred with the Local Store Check bit 1.3 in register X'61' on.

PE1LD

1'Ifl"

PP101

8-100

~21

IdI!:Angl nD!!!2-. U§J1lla.

2121

BIIK2

An unexpected level 1
ERROR CARD
X9IX

interr~pt

PEAtD

PEtlll

PP101

8-100

~21

IdIgngl! UUI9&. UgH9&.

2XU

I 11K 2

occurred vith the ceo

O~tb~ss

Check bit

,.2

in register 1'67' OD.

lD unexpected ievel 1 interrupt occurred with the In/Out Instruction lccept Check bit
on.
ERROR CABD

PEltD

l'BUI

EIIK2

t'1'101

8-100

'.1 in register 1'671

£221 I.9£Ulgl UgU!.l&. !!l!J!2..
X9Xl

2X8X

ln unexpected level 1 interrupt occurred vith the channel.
E880B C1BD

1'llLD

£221

~9!:An2l!

£!911!2&. fAill!2&.

21Pl'

IIIIK2

X9XI

1'Efll

'0'

8-100

lIL10S
lIL10'
lILl01
lIL101

H-HO
H-'1I0
H-1II0

P1'

Bus-in check bit ,.0 in register 1'67' on.

Unable to reset the unexpected level l interrupt.
IIIIH2
B'lH2
E4H2
IIIIH2

8-1110

Bit
Bit
Bit
Bit

0.11
0.5
0.6
0.1

-

5yn lonitor Control Latch
DLE Besesber Latch
D51SCII lonitor Control Latch
EBCDIC lonitor Control Latch

o
o
o
o
o
o
'rype

II

CA IPf

X3705JU 8.117

.

12M 3705 CO""OHIC1TIOHS CONTaOLLER

099 .. .l"I05E- 09

\

\.

8.48 X370SJAA

Type 4 CA Ili'T

/
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