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101·200

.......... j ......... j ...•..... j...................

..~~

......... j ......... j ......... j .........

-I-

1·100

Noto:

Pinx

marl\ed

with

•

have

4700hm

pullup

resistors

10

+

5v.

20pins:A

16pins:B

14pills:C

16pinb

REVEHSEDIII

typicalof

MK4116:

F

2

4116

I

22pins:

D

24

pins:

E

!

XEI~OX

i P

raj

ect

LC

SL

!

DO

Memory Control Board Layout

F·j

1 e

clOrnellllayoul.sil

Nolo:

Tho

shurl

vorticallines

indicate

lilllH'

cilptlcilor

locutions.

(143

Places)

!

Do.s.

inno

r

I r hac\<er

Clwnoos

from

Rev

E

10

nov

F:

1)

I\ddud

1110

SiOllill

Dibi.lbloh1

(PU

20,12)

101

letil

2)

liOIlIOVU(1

114Parilyi:rror'

Irolll

Iho

lerm

IIlilllorllls

Aborl'

(!Jale

ill

a15

now

'ree,

inverlur

al

o1a

movod).

Nolo:

Thill

Cllillll]O

<1010105

IC

a

15.

Chunuos

frOIll

lluvF

10

RovG:

1)

1l11.1

ti (p!J

1)

....

GonX,

nol

GenX'

(Ihib

was

wrono

In

.nllile,

ok

on

dwO'>

2)

h13.U

...

ClclSyn4,

h13.1"1

...

CrclSyn(j

(PI]. 3)

Clwnuuti

Irolll

HovG

10

novll:

1)

(POl

:i)

Clwnue

c

1.13

IrOIll

Hil/llClocl~

10

l:dUoClocl~a

2)

(pI113,15)

C1lilnuod

iU

'rom

57-1

10

S

175.

Ilolocaloel

i9's

lunclions

10

i 1

O.

Adeloel

MOUounds

as 11.05 elurinu

H.-Pipe

uperallon.

:.I)

(Pu

16)

Dulolo(1

S04

al

(1100.

Iloplcl(;ud

wilh

SOO

a15<.1,

and

added

MC151urlMC2'

ilb

Illpullo

MC1Aclivo.

4)

I\ddod

MC2PS1::l'

by

ruplilcinU

f:l

(574)

wilh

5175

(PO 1 U). MC1

PS

12'

is

usod

intilo,Hlol

(1510ro

12'

al

il1.1:l

(PU

20).

CIWIIUlJS 1

rom

novllio

nov'

(5/U/7£)

1)

(p!.!

20)

h3.U

was

MC211olliliSNEO,

is

now

MC2SIiHIXporl'

allor

PilbSinU

Ihrouuh

Iho

urou

al hUIJ

(used

as a

driver).

2)

f{OfldlllOd

tiiorlili

MC2TutiiSNEO

10

t.IC:llloldIlSNEO

(06sellliillly,

IIIUtie

Iwo

SiUrlillti

llilvo

buen

cUillubced

inlo

onll).

3)

I\ddlHllu61

poinls.

4)

I\dded

coml\lonls

on

Voe

bypass

and

-10V

6upply

chanl]o6

10

OOmornplalforrn6.sil

CIHlnoos

Iroln

Rev

I

10

nev

J

(0/12170·

C.

Thilcker)

1)

flonl1med

siunul

TP055

GaleALUParily,

and

connecled

ilia

E07U

(PO

10)

2)

Lalched

sionai

Slorl\ccellsType

in

S374

al

h41

(pg

15)

;1)

1l0lllovell

MC:.! X

10

rWord

an(1

MC

1 X Ie

rWord

Irom

a5.11

and

a5.1:'!.

Connec

lod

a5.11

and

a5.12

10

il5.13

(PO

16).

Nolo

Ihac

tiiUntll

MC1

XlorWord

is

no

lonuor

UIlIHI

on

Ihis

ct1rcl,

so

[006

is

Iroe.

"n

Hornovod

·"10V

supply

cornpononls

on

lJOmernplatlorllls.siI

CIHlnOOb

Irolll

Rov

J

10

rov

I(

(10/0/78·

C.

Thac\(er)

1)

Clwnued

h

7.12

Irom

MC1

WriloMern

10

MC1

WrileMem510w

(pgI3).

This

sionai

is

ueneraled

al

platform

il16

(\1U

12).

2) CIldll(Jtl(1

platform

a

1610

20pills

10

make

roolll

lor

MCI

WriloMomSlow

(PUI2).

3)

Added

capacilors

on

510MdprtA5'

and

510MapWrilu'

(platform

cB, \1aue

12)

.

•

1)

CIHlIl\Jud

aU.12

Irolll

MCITi.llik.310

MC1Nuxt.4

(Pu1B).

5)

Changod

i7.1

Irolll

PUb

10

noleroncod

(P015).

This

requires

Chilll\)inU PROM

i7

10

revision

E.

Chanuos

IrOIn

nev

K

10

rov

L

(11/1/7£)

-C.

TIHlcl(er)

1)

SiUrlill

clkOlilpUI,noU

ill

/lOW

clkOulputBeg'

by

removing

537

al

h6d

(now

Iree)

IHlge 1

J.

~)

IJ

10.1

(Pul

m w

Clb

Disablob

1

0,

is

now

GND.

Also

removed

Disable

\)

1

01

rom

SPLAT

i 1

(\1U

12).

Thero

iUO

no

prom

CIHII1UOS

in

Ihis

revision.

Clwnoes

Irom

nov

L

10

rov

M

(12/01"18

-C. TlHlc\<er)

1)

Clwnuod

platforrlls

c5

i.\lId

i1 •

removod

ci.lpacilor£i

and

chan!jod

villuos.

2)

Cllanuod

1110

1]0nOriliiOll

01

cll~Oulpulneg'

(PU

13).

Tllis

signal

is

now

one

cycle

wide,

ralhor

Ihan

boing

a

qlwli'ied

EdgeClock.

3)

lllo

inpullo

115U

(PU

13)

is

PruHovl\d',

nol

EIlHowl\d'.

Thit:.

bOilrd

requir~s

un

ALU

~Wi.lI(J

of

rev

M

for

propor

oporillion.

TllOro

aro

no

prom

changos

in

Ihis

revision.

Nolo:

nev

M =

Rev

Ga

Clwnguti

1«1111

rev

Ga

10

rov

Gil

(7/10/00·

CPT).

1)

Addt:H1 1

{j

FICA

PS

lor

M 1<411

(j

chips

(V[)[)

an(1

VEE)

2)

I\dctod

glilch6upprossion

capacilor

adjaconllo

11?

(on

MC1WrileMemSlow·

100pr).

3)

CI)MiNd

inlorloc\(

logic

on

page

10.

, Current PROM Revisions:

1I4,

03,

112,

b3,

b4,

c2,

c3,

(12,

d3,

e3

(MCI

Sequencer):

E

g3,"U1,

h1,

112,

i2

(MC2

Sequoncor):

D

i7

(Faull):

E

b 11

(Flypo,

Pipe):

0

114

(Single/Double

orrors)D

~

Memory Control Changes F oil e

Des

i 9 n e r

On

te

..:.;.:.......-_.I:

__________________

.J.

1

_c1_0_rn_e_fl_IC_I

.....

la_n_g;;;..e

....

s

....

'

._Si_I

__

..:,-l_"t_\a_c_I(_e_r_~~.......l~7_/.,.1

~~~9._!

Mem Ctrl_Jul1980 Ctrl Jul1980

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