'\:
NOTE TO USER
·FOR
SADIE VERSION 3.5
Document Number:
03-0244-05
Zilog, Inc.
October, 1984
Copyright 1981, 1983, 1984 Zilog, Inc.
All rights resecved.
OJ
1.1~
NTU
Zilog
NTU
INTRODUCTION
This document ~rovides an overview of the Stand-Alone Diagnostic
Interactive Executive
(SADIE)
3.5 release and the
supporting documentation.
SADIE is intended for use by qualified, service personnel
with adequate technical knowledge and training on the theory
of operation of the·System 8000 and major components.
2.1.
DOCUMENTATION
The documentation package for SADIE 3.5 consists of the following:
SADIE Note To User, Version 3.5 (03-0244-05)
SADIE Reference Manual (03-3264-02)
SADIE Refe~ence Manual 3.5 Update Package (U3-3264-A2)
SADIE Quick Reference Guide (03-3274-01)
~
The Update Package consists of changed
incorporated into the existing SADIE
describe the SADIE 3.5 release •
pages that,
when
Reference Manual,
.
3.1.
DESCRIPTION OF SOFTWARE RELEASE
SADIE 3.5 supports the High Perfocmance Central Processing
Unit (HPCPU) based systems and all earlier versions.
Refer to Apppendix A in the System 8000 SADIE Reference
Manual for a complete list oE the SADIE diagnostics.
4.1.
CHANGES FROM PREVIOUS RELEASE
Three tests have been added since SADIE 3.4 that
HPCPU board which are:
CIO'fST
HPCPU on-board CIa test
SCC'fs'r
HPCPU on-board SCC test
CACHETST.-- HPCPU on-board CACHE
Memo~y
check
the
test
The test sequence has been changed to follow a mo~e
logical
order of diagnostic groupings for the user's convenience.
SIOMODEM, SIOTEST, CENT.PRT, and DP.PRT tests can support up
to four 3SB boards.
1
Zilog
1
NTU
Zilog
NTU
When the CPU board type affects a test, the'program checks
for and announces the existence of an HPCPU boardo
SIOMODEM
and SIOTEST menus,
for example,
offer different choices
depending on the ty~e of CPU board in use.
5.1.,
SYSTEM REQUIREMENTS
SCCTST, CACHETST, and
installed.
CIOTEST
must
have
an
HPCPU
board
SCCTST and ICPTST3 require Zilog part number 59-0327 Revision B cable assembly.· Contact Zilog Field Service personnel for availability.
SIOMODEM, ICPTST2,
and ICPTST3 require the Zilog part
numb~r
59-0293 null modem cable assembly.
Contact Zilog
Field Service personnel for availability.
CPU board and SSB board jumper changes are necessary for
CENT.PRT and DP.PRT test execution.
Refer to CENT/DPoPRT in
the SADIE Reference Manual for these changes.
6.1.
INSTALLATION
The following subsections provide a SADIE
list and initialization instructions.
6.1.1.
materials
check~
Materials Checklist
Cartridge Tape, SADIE 3.5 Release, 14-0009-09
SADIE Note To User, Version 3.5, 03-0244-05
6.1.2.
Installation Instructions
To initialize SADIE, follow these steps:
1 ..
Ensure that the System Administrator has taken the system down and already backed up all files before
proceeding ..
2.
Insert the
drive.
3.
Press RESET.
cartridge
tape
Zilog
.2
~ ~ ~--
.. -.. -~
into
the
cartridge
tape
2
-~~--'-'-----------'-'-----------="==-='---------------~-
NTU
NTU
Zi10g
4.
Enter T.
This command executes System Power-Up
Diagnostics
(SPUD)
in the prom monitor on the (HP)CPU
board.
If no errors are observed, proceed to step 5,
otherwise investigate and correct the error condition
before proceeding.
5.
Enter Z T.
A command level menu is now displayed.
(Refer to the SADIE Reference Manual for further information and instructions.)
7.1.
KNOWN BUGS AND LIMITATIONS
CACHETST cannot be performed without an HPCPU jumper change.
Some early versions of the board do not contain the required
jumper selection, and CACHETST cannot be performed on such
boards, (PCB fabrication, revision 2 or older).
CENT.PRT and DP.PRT cannot detect the presence of an SSB
board in the system, and will appear to execute these tests
without err.ors even though no SSB board is installed for the
printer port under test.
When using SADIE "WDCFMT" or "WDCMON" to format disks with
WDC firmware Version 7.1, ignore the sector numbers in the
bad sector display.
Version 7.1 uses track sparing instead
of sector sparing,
therefore,
only the cylinder and head
numbers are relevant.
In FPPTST,
the program does not generate
numbers to check the instruction "Fremstep".
all
possible
MTCMON is not operational at this time.
2110g
3
NTU
Zilog
NTU
,-_..
'
A"
\)
\...- .. -
4
Zilog
4
DeN
Zilog
DeN
DOCUMENT CHANGE NOTICE
CHANGE INFORMATION
MANUAL TITLE
System 8000 SADIE Reference Manual
PUBLICATION NUMBER
03-3264-02
--~~~--------------
ISSUE DATE
7-84
OR 03-3264-01 with Update Packages tl3-3264-Al and U3-3264~B1
~
DCN NUMBER
. 1,ff"
DATE ISSUED
U3-3264-A2
9/4/84
This document Change Notice (DCN) contains instructions for
changes made to this manual subsequent to the latest revision. The affected manual title,
publication numberi and
document change notice number, are identified.
~
(~"
The DeN statement clearly defines the pages affected and, as
required, the purpose of the change. The type of change may
be specified as "add", "delete" or "replace". The attached
change pages will remain in effect for subsequent releases
unless specifically amended by another DeN or superseded by
a publication reprint.
Each change page is marked with the
issue date at the bottom of the page so that it can be
clearly identified as such after it is integrated into the
manual.
Retain the Revision Record behind the manual's cover page to
a record of changes.
mai~tain
DESCRIPTION OF CHANGES
The changes described herein reflect SADIE version 3.5.
Three new tests are added to support the HPCPU board, and
eleven old tests are to be replaced with changed testso
IQPTST4 will become a separate document and is replaced with
a single page of explanation. The title page, preface and
front matter of section 2 are replaced to support the new
documentation. The table of contents is amended to include
four append~ces, which are added for convenience.
INSTRUCTIONS
Refer to the revision record and insert and replace tests as
indicated.
'--
.., '
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Zilog
10/25/84
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DCN
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Title Page
Preface -
iii-iv
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1 Table of Con ten ts I
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ICENT/DP.PRT
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CIOTST after
CENT/DP. PRT
ICPTST3
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MDCCRC·
MDCFMT
MDCMEDIA
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MDCMON
MDCTEST
MMUTST
SCCTs'r after
MTCOM
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SIOMODEM
SIOTEST"
1 Appendices A-D
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after WDCTEST
+----------+---------+-------+------------+------------------+
Copyright 1984 by Zilog
All rights
r
Inc~
resecved~
Printed in the United States of America.
Address all comments concerning this pUblication to 2i10g or
use
the ~:nclosed reader comment card located in the back of
t his P Ll b lie a t ion "
2
Zilog
1(1/25/84
2
~
~. ___ "./)
SYSTEM 8000 SADIE REFERENCE MANUAL
SADIE Release 3.5
~\
10/25/84
SADIE
ii
Zilog
Zilog
SADIE
ii
SADIE
Zilog
SADI8
Preface
The System 8000 SADIE Reference Manual describes the organization,
o~eration,
and test
functions of the Stand-Alone
Diagnostic Interactive Executive
(SADIE)
diagnostic
tape
library.
NOTE
The manual is addressed to
field engineers and
service personnel and supercedes any SADIE documentation contained in the System 8000 Hardware
Reference Manuals.
The manual is organized in this manner:
Section 1
Introduction to SADIE Documentation
Section 2
SADIE Tests
Appendices A through D
Section 1 explains the purpose, organization, and operation
of the SADIE diagnostic tape, and the various command level
test functions and displays.
Section 2 is an alphabetical library of the SADIE diagnostic
tests.
Appendix A provides
SADIE tests.
an
alpha-numeric
cross
reference
of
Appendix B defines mWDC packet commands and tape
controller
. status bits for use with MDCMON and TCUMON tests, respectively.
AP pen d i x Cpr 0 vi des 1 a p sum In a rye 0 n ten t i n for m"a t ion foe dis k
controller tests.
Appendix D contains two SPUD ecroe lists.
The
first
list
applies
to systems using a CPU boaed other than the HPCPU.
The second list applies to systems using an HPCPU baaed with
Monit~r firmware, Version 10.0 and above.
iii
2i.10g
10/25/84
iii
SADIE
Zilog
SADIE
This manual and the celated manuals listed
technical documentation foe the System 8000.
below
Title
pcovide
Zilog Part Number
V Hacdware Reference Manual, Models 21/31, 21 Plus,
03-3237
31 Plus
Maintenance Manual, Models 22/32
03-3281
User Guidel Models 22/32
03-3286
Hardware Reference Manual, Models 11/11 Plus
03-3227
*
1'}.
~~.
v ZEUS Reference Manual
03-3255
/..... ZEUS utilities Manual
03-3250
V
ZEUS Languages/Programming Tools Manual
03-3249
v
ZEUS Administrator Manual
03-3246
UNlXTM A Quick Ref"erence Guide to Zi10g' s Enhanced
Unix System
03-3269
Zilog Components Data Book
00-2034
Hardware Reference Manual, Winchester Disk
Controller
03-3203
Hardware Reference Manual, Nine-Track Magnetic Tape
Controller
03-3262
~
~
Subsystem Operation and Maintenance Manual,
Nine-Track Tape
03-3253
Hardware Subsystem Manual, 5 1/4" "Drive
03-3289"
~Hardware
Reference Manual, Central processing unit
?
~)
\,
~
03-3200
::>
Hardware Subsystem Manual, High Performance Central
Processing unit (HPCPU)
03-0315
Hardware Reference Manual, Secondary Serial Board
03-3201
SADIE Quick Reference Card
03-3274
*
Scheduled for future celease
UNl~M
is a trademark of AT&T Bell Laboratories.
Zilog is licensed by AT&T Technologies, lnco
iv
Zi10g
10/25/84
iv
SADIE
Zi10g
SADIE
Table of Contents
SECTION 1
INTRODUCTION TO SADIE ...•
0
•••••
0
•••••••••••
1.1. Purpose of SADIE .............................. .
1.2. Organization and Principles of Operation ....... .
1.3. SADIE Tape Organization ............
1.4. SADIE Program Initialization .................. .
1.5. SADIE Diagnostic Functions ••.••.•
1.5.1 .. Console Interactions ••..•..••
1.5.2. START and RESET Interactions ...•.......••
1.6. Command Level Test Functions •.•.•..••.•..••...
1.6.1. Command Level T: Choose
and run a single TEST .............................
1.6.2. Command Level R: REPEAT previously
loaded single test •••..•.••.•.••..••.•..••••...
1.6.3. Command Level L:
Run current test LIST ............................
1.6.4. Command Level C:
CHOOSE and run a test list ••.••••••.
1.6.5. Command Level E:
EDIT test list •.•.•.•••
1.6.6. Command Level D:
DISPLAY error log .•.•••
1.6.7. Command Level A: Cumulative
error log-ALL tests in list ••••.••••.•.•••••••..
1.6.8. Command Level M: do tape MAINTENANCE ••• ~
1.6.9. Command Level Q: QUIT .•..••....•.••..•••
1.7. SADIE Test List and Control Statements .........
1.7.1. SADIE Test List ~ •.... o • • • • • • • • • • • • • • • • • • •
1.7.2. Control Statements ••.••••.•..••.•••.•••••
1.8. Using SADIE ••
0
0
..........
•••
0
0
..
••••••••
••••••
0
.....
0
~\
0
0
SECTION 2
•••••••••••
.................................
1-1
1-2
1-2
1-3
1-4
1-4
1-8
1-10
1-10
1-14
1-14
1-15
1-16
1-20
1-20
1-21
1-21
1-21
1-21
1-22
1-23
SADIE TESTS •••.•.•••••••••••.•..••••...•••.
2-1
2.1. Introduction •••••.••.••••••••••
2.2. SADIE Monitor Diagnostic Tests .•...•..••.••...
2.3. Test List .............................
2-1
2-1
2-4
0
•••••••••••••
0
v
1-1
Zilog
0
••••••••
v
SADIE
SADIE
Zilog
APPENDIX A
SADIE Test and Monitor Cross Reference •..
APPENDIX B
mWDC Packet Commands/Tape Controller
Status Bits
•••••
e
•••••
O.0
••
8
••••••
0
••••••
0
0
A-I
B-1
APPENDIX C
Lap Summary Contents •..•.•...••........•..
C-l
APPENDIX D
System Power Up Diagnostic Error Lists ••••
D-l
,
\
vi
Zilog
10/25/84
vi
I
Zi10g
SADIE
SADIE
SECTION 2
SADIE TESTS
201e
Introduction
This section describes the System 8000 tests that appear on
the SADIE test tape.
All tests listed can apply to all
Models of the system, with the following exceptions:
All tests prefixed by "MDC" apply only to systems with 5-1/4
inch disk drives. Tests beginning with "WDC" apply tosysterns with 8 inch disk drives and tests beginning with "SMD"
apply to systems with 14 inch disk driveso
CACHETST, CIOTST, and SCCTST are designed solely for systems
using an HPCPU board.
ICPTST4, for Exxon Office Systems use
only, is not documented here.
The test name prefix is associated with a sUb-system controller,
a printed circuit board, or board component. The
test name suffix defines test function.
For example:
MDCMON
MDCFMT
SCCTST
TCOM
SMDCRC
MTCOM
FPPMON
'"
2.2.
= mini-Winchester Disk Controller Monitor
=
mini-Winchester Disk Controller Formatting
= Serial Communications Controller Test
= Tape Command Exerciser
=
storage Module Device Read Error Check
= Mag-Tape Controller Command Exerciser
= Floating Point Processor Board Set Monitor
SADIE Monitor Diagnostic Tests
The SADIE monitor diagnostics are interactive tests designed
to allow the user full access and control of the subsystem
for System 8000 troubleshooting.
All SADIE tests with the
"-MON" suffix (i~eo, WDCMON, TCUMON) are similar in structure and user interface.
Some commands are shared by all
SADIE monitors, while others are unique to each monitor
type.
",.--'
2-1
Zi109
10/25/84
2-1
SADIE
SADIE
Z,i log
Most commands may be abbreviated to the first group of characters
that uniquely defines the command during user
interaction.
For example, "DISPLAY" may be shortened to
"DISP".
Some commands have special abbreviations for convenience, such as "RD" for "READ", in MDCMON and SMDMON.
Monitor commands are always entered in UPPER CASE.
Command parameters must be entered after the command and on
the same line, separated from the command and other parameters by one or more blanks o
Most commands have default parameters that are described
the individual monitor documentationo
in
Parameters are interpreted as decimal unless followed by
an
"H".
EXAMPLE:
a.
be
256 is interpreted as 256 decimals
l00H is interpreted as 100 hexadecimal, which is 256
decimal.
NOTE
The following examples use MDCMON commandsQ
A simple. command is defined as a command
zero or more parameters.
name
followed
by
EXAMPLE: Simple Commands
a.
EI
b.
SU 1
RD 1 0 5 200
WR 2 0 1 200
c.
d.
A complex command is one of the following:
ao
An optional repeat factor followed by a simple commande
bo
An optional repeat factor followed by
complex command.
CD
A parenthesized complex command followed by any
of parenthesized complex commands
a
parenthesized
number
0
2-2
Zi10g
10/25/84
2-2
SADIE
Zilog
SADIE
EXAMPLE: Complex Commands
a. 10 RD 1 0 5 200
b. (WR 2 0 1 200)(RD 1 0 1 200)
Co l0«WR 2 0 1 200)(RD 1 0 1 200) (CMP 2 0 1 0 l)(IBLK 1»
Example c first writes one sector beginning
200 from memory segment 2, offset 0.
at
Then one sector, beginning' at disk block 200, is
memory segment 1, offset 08
disk
read
block
into
The data stored in memory segment 2, offset 0 is then compared with the data read into memory segment I, offset 0.
The data from one segment only is compared.
Finally, the block number is incremented by 1.
. is repeated 10 timesD
The sequence
command line is a simple or complex command followed by
carriage return ..
A
a
Omitted parameters take on their previous values (or default
values if not set explicitly).
Example:
Command?
RD 1 0 5 200
Command?
RD
The first RD (read) command reads 5 sectors beginning at
disk block 200 into memory segment I, offset 0.
The second
RD command does the same thinge
Example:
WR 1 0 1 200
RD 2 0 1 200
CMP 1 0 2 0 1
l00«WR)(RD)(CMP»
The first three lines above write a sector from segment I,
read the same sector back into segment 2, then compare the
two copies..
The fourth line will repeat those three operations one hundred times, using the same parameters.
Some commands will check for boundary conditions and if the
bound is exceeded, will display a message to that effect and
otherwise ignore the command.
For example, if the current block number is 19999,
issuing
an "IBLK 1"
command for a
drive with only 20000 blocks
available (0-19999) will result in an error message.
2-3
Zilog
10/25/84
2-3
SADIE
Zilog
SADIE
CAUTION
Monitor diagnostics will not protect the user from
destroying. either data in memory (i.e., segment 0
SADIE or diagnostic code) or on a device (ice&1
a
disk with the ZEUS operating system on it). Generally, memory segment 0 should never be touched
by the user of a monitor diagnostic.
For details of command syntax specific to a particular monitor diagnostic, type the "HELP" command while the diagnostic
is invoked ..
2.3.
List of Diagnostics
The list below represents the order in which SADIE 3.5 tests
are documented in the following text o
Refer to Appendix A
for a numeric list of tests as they are presented on the
SADIE menu.
$
$
6)
$
6)
$
$
6)
$
$
$
$
$
('I)
6)
$
6)
6}
$
$$
$
6)
6)
@
$
$
6)
$
$TCOM
CACHETST (for HPCPU testing)
$TCUMON
CENT-DP.PRT
$TEX
CIOTST (for HPCPU testing)
$WDCCRC
ECCTEST
@WDCFMT
FPPMON
$WDCMEDIA
FPPTST
$WDCMON
FPPWHET
$WDCTEST
ICPTSTI
ICPTST2
ICPTST3
ICPTST4 (for Exxon Office Systems only)
MDCCRC
MDCFMT
MDCMEDIA
MDCMON
MDCTEST
MEMTEST
MMUTST
MTCMON (not operational at this time)
MTCOM
SCCTST (for HPCPU testing)
SIOMODEM
SIOTEST
SMDINTRO (For supplemental information only)
SflDCRC
SMDFMT
SMDMEDIA
sr1DMON
SMDTEST
2-4
Zi10g
10/31/84
CACHETST
1.10
Zilog
CACHETST
CACHETST
The text which follows provides an overview of CACHETST~ set
up and parameter entry information~ a general test sequence
flow chart~ and error message and lap summary descriptions.
CACHETST performs a thorough test of the HPCPU
memory.
board
cache
Up to five tests are selected during parameter entry,
and
execute in order of test number for each selected bank.
The
test sequence is repeated the number of times specified during SADIE #REPS entry, and ends with a lap summary.
Four parameter entry options allow:
Selection of cache bank to be tested
Cross checking between both cache banks
during tests 3 and 4
Creation of a test window
A
brief description of each test follows:
(1 )
Test 1 checks the eight high order bits of each tag
Test time:
register in the bank currently under testa
~ 5 seconds per bank
(2)
Test 2 tests individual tag register address lines from
the CPU side of the cache.
Test time: ~ 11.5 minutes
per bank
(3)
Test 3 checks individual tag register read/write updating from the Ziloq Bus Interface (ZBI) side of the
cache.
Test time: ~ 24 minutes per bank (without
cross-checking)
(4)
Test 4 checks updating function for
the selected tag
bank, referencing odd segments for data due to.even/odd
cache segment mapping described in Subsection 1.2.
Test time:
~
5 seconds per bank
(without crosschecking)
(5)
Test 5 checks cache memory, slot
(4
bytes)
by slate
Test 5 uses a 16K main memory block separate from the
other memory locations to access the slot under test.
This method checks the four tag register low order bits
that are inaccessible during tests 1 through 4.
Test
time: ~ 70 minutes per bank
1
Zilog
10/25/84
1
CACHETST
Zilog
CACHETST
The five tests will run in sequence unless parameters 3 and
4
(Subsection le3)
are set to create a shorter sequencee
If, for example:
Parameter 3
=
Parameter 4 = 3
2
Only tests two and three will be executed,
in that order.
To run one test only, enter the selected test number for
both parameter 3 and 4.
Test three and test five perform extensive register and
memory tests and therefore require allocation of a large
block of test time.
These tests could be entered on a
test
list (via parameters 3 and 4) and executed at the user's
convenience, without user interactionv
1.2.
Set Up
To ensure proper test execution, the HPCPU board must be
jumpered to map out even memory segments so that CACHETST
can separate the code and data spaces. Refer to the System
8000 Hardware Subsystem HPCPU Manual for additional information on cache memory mappingu
NOTE
The jumper selection described below does not
exist on some early versions of the HPCPU board.
DO NOT ATTEMPT TO EXECUTE THIS TEST IF JUMPER
SELECTIONS E13-E14 and E14-E15 ARE NOT PRESENT.
Execution of CACHETST on such boards will result
in error message displays. The required jumper
selection is found on HPCPU boards marked Revision
3 and above on the solder sideQ
Prior to running CACHETST, make the following jumper change:
Remove jumper
Install jumper
E13-E14
E14-E15
NOTE
For proper HPCPU performance, the jumper installed
at E14-E15 must be removed and restored to its
original E13-E14 position upon test completiono
2
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10/25/84
2
CACHETST
Zilog
CACHETST
If a parity memory board is in use, ensure that the fabrication part number is l0-0304-XX, regardless of core memory
size. The l0-02l7-XX parity memory board does not allow
cache circuitry to read a 32-bit data word, and cannot be
used wi th an HPCPU board that has cache enabled, ..
Parameter Entry
1.3.
This test uses standard SADIE parameter
described under "SADIE" in this manualo
entry
prompts
After CACHETST selection from the SADIE test list menu, the
program prompts for parameter entry and number of repetitions desired ..
Parameters allow the following test modifications:
Parameter
1
Purpose
Selects number of cache bank to be tested.
(0
= Bank 0
1 = Bank 1
2 = Both banks
Default: bank=2
2
Flag to cross check between both cache banks.
(0
= Disables cross checking
1 = Checks bank 1 for abnormal effects while
testing bank 0, and vice versa
Default: xcheck=l
3
Select starting test number.
Use with parameter 4 to create a test window.
Default:
4
*=
1
Select ending test number.
Use with parameter 3 to create a test window.
Default:
3
Start
End # = 5
Zilog
10/25/84
3
CACHETST
Zilog
CACHETs'r
\
1
\
1
"-----.-.-
1.4 •. Test Sequence
The test sequence flowcharted below assumes
tests are running.
that
all
Check for type of CPU board in use and
display an error message if other than HPCPU.
five
I
I
If an HPCPU board is present, display jumper
change instructionso
Check parameters; perform tests and cross
checks accordinglye
For Test One, Display:
Memory from segment 0 through
Now checking tag register for bank #
Perform "walking ones" test, toggling each
bit.
Disregard parameter 28
Report any errors to SADIE as hard errors;
display an error message; record for lap
summary.
For Test 2, Display:
Now checking tag address lines- for bank #
I
I
Check tag register address lines from cache
CPU side.
Expose any address lines stuck to
either 0 or 1 ..
I
A
4
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10/25/84
4
'-----~
'
CACHETST
Zilog
CACHETST
A
I
------------------------------------------------Report any errors to SADIE as hard errors,
display an error message, record for lap
summary.
------------------------------------------------------------------------------------------------- I
I For Test 3, Display:
I
I
Now checking individual tag read/write updating
for banki
I
I
Test each tag update function from ZBI side:
- Read target memory location to force tag update
- Check tag register for correct update value
- Check remaining tags for duplicate updates
that indicate bad data and/or address lines
- Check corresponding tag register in other bank
if specified by parameter 2
Report any errors to SADIE as hard errors~
display a bank selection fault error message~
record for lap summary_
I
I
For Test 4, Display:
Now checking tag bank updating for bank #
I
I
Read 16K blocks of selected bank memory to
force update of all tags.
I
I
I
Reference different odd segments to create
"walking ones" pattern through the seven high
order bits of the tag register.
I
I
I
I
B
5
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10/25/84
5
Zilog
CACHETST
.J
'-----
B
\
I
For Test 5, Display:
\ Now checking cache memory for bank I
Read test:
Perform walking ones test on each cache memory
slot, toggling each bit.
I
I
I
I
I
Check remaining slots in bank for duplicate
I
entries indicating bad data and/or address lines \
I
I
I
Write test:
Perform walking zeroes test on each cache memory
slot, toggling each bitD
I
I
I
I
Check corresponding main memory slot for write
I
\ through {or store through) cache memory functions. \
Display error messages; check parameter 1
If parameter 1 = 2 (test both banks):
Bank 0 test lap is complete;
Repeat all tests for Bank 1
Display Lap Summary
6
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10/25/84
6
Zilog
CACHETST
1050
CACHETST
Error Messages
This subsection lists error messages displayed when CACHETST
detects the referenced fault.
Variable values are shown
enclosed in < > symbols. Boldface text represents duplication of the actual display.
Error description abbreviations:
TB .....
Tag Bank
eBo .............. Cache Bank
# •••• o o o o e • • number
act ......... o • • actual value
expo .......... expected value
adr ••. o . o • • • • address of tag register or cache memory
err adr ••••.• error address
targt adr •••• target address
data ••..•
register contents
0.0
.....
o ....
CACHETST ERROR LIST
All CACHETST error messages begin with:
ERROR IN:
CACHETST
Possible error displays are listed below, followed by a brief
explanation of the source of each message.
Not an HPCPU board!!
CACHETST does not recognize the CPU board under test
HPCPU board, and aborts the test.
as
an
No main memory above segment 011
Indicates that CACHETST has detected no m~in memory above
segment zero. The test will abort following this message.
TB<#> bad compare: adr=<####>, exp=<##>, act=<##>
The tag register at the specified address contains the value
shown at 'act' rather than the expected value, 'exp.'
TB<#> dupl write:
targt adr=<####>, err adr=<####>, data=<##>
A tag register at 'err adr' was erroneously accessed during
check of tag register at 'targt adr.'
Probable Cause: Bad
tag address lines.
7
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10/25/84
7
CACHETST
TB<#>bad update:
Zilog
CACHETST
adr=<####>, exp=<##>, act=<##>
The tag register at "adr" was updated with the
rather than the expected value "exps"
"act"
value
TB<#> unexpd updt: targt adr=<####>, err adr=<####>, data=<##>
A tag register at "err adr" was erroneously updated instead
of or along with the target tag register at "targt adr."
The contents of the register at the erroneous address are
shown after "data". Probable Cause: Bad tag address linese
TB<#> wrong bank selected for updt:
adr=<####>, data=<##>
The wrong tag bank was updated.
Probable Cause:
parator circuitry which performs the selection.
CB<#> bad read:
Bank
com-
adr=<###I>, exp=<########>, act=<########>
The cache memory slot"at "adr" contains the value shown as
"act," which differs from the expected value, shown as
"exp." Probable Cause: The slot did not update correctly
during a read from main memory into the location.
CB<#> dupl rd:
targt adr=<####>,
Cache memory slot at
ing "targt adr" slot
contents of the slot
cache memory address
CB bad write:
err adr=<####>t data=<########>
"err adr" was erroneously accessed durcheck. The "data" value represents the
at "err adrQ"
Probable Cause:
Bad
lines.
adr=<####>, exp=, act=<########>
The cache memory slot at the address "adr" did not update
correctly during a write operation to that location. Consequently, the expected value "exp" and actual value,
"act,"
do not matcho
CB<#> bad wrt thru:
adr=t exp=<########>, act=<#I######>
The main memory location
which
corresponds
to
the
cache
memory
slot at the address "aden did not update or
incorrectly updated to the value,
"acte"
The contents
expected at that memory location are shown after "exp$"
8
Zi10g
10/25/84
8
)
'-..."
Zilog
CACH8TST
1.6.
CACHETST
Lap Summary
Upon completion of each test series, CACHETST displays the
lap number and error counts for each banko
Acronyms used to
display the cumulative error tally for each bank are defined
in the table belowD
Tag Banks
I?i'
CMP
RDUP
UNEXUP
DUPWRT
WRTUP
BKSEL
tag register compare error
tag update error during read
unexpected tag update
duplicate tag register write error
tag update error during write
bank selection error
Cache Banks
RD
DUPRD
WRT
WRTHRU
cache memory slot read error
duplicate slot read
cache memory write error
slot write through error
Note that an identical lap summary, with the addition
status line, is available via the SADIE 'PAUSE' menu e
of
a
Press the system START button to interrupt the test in progress and access the 'PAUSE' menu.
Select IE' from the menu
to view a detailed error log for the current test.
9
Zilog
10/25/84
9
... -.
..•
-~
CENT/DP.PRT
1.1.
CENT/DPoPRT
Zilog
CENT/DP.PRT
CENT/DPaPRT represents two printer tests:
CENTePRT (CENTRONICS printer interface test)
DP.PRT (DATA PRODUCTS printer interface test)
CENT.PRT and DPDPRT are interactive tests for the Centronics
and Data Products printer interface, respectively. The
printer port tests prompt the user to verify that the
printer is online.
If the printer is online, the tests send the printable character set to PIO Channel B,. the number of times entered during SADIE #REPS parameter entry. To stop the test, the user
presses any character on the console keyboardo
These tests do not check for the presence of SSB boards in
the system.
Therefore, if a printer test is initiated when
an SSB board is not mounted for the selected port, the test
appears to execute without errors.
PIO interrupts are disabled during these tests.
polled by the test.
1.2.
The PIO
is
Set Up
The printer tests require jumper changes relevant to the
port selected for test, and to the printer type.
The table
on page two of this test lists jumper settings for printer
ports on the standard CPU board and secondary serial boards
(SSB).
Note that there is no printer port on the HPCPU
board.
1.3
Parameter Entry
Port selection parameters will vary with the type of CPU
board in use.
The chart which follows defines parameter
entry choices.
For the HPCPU:
For the standard CPU:
Port:
Port:
1 = first SSB printer port
o = CPU board printer port
2
1
=
second SSB printer port
3 = third SSB printer port
4 = fourth SSB printer port
No default value
1
= first SSB printer port
2 = second SSB printer port
Default = 0
Zilog
10/25/84
1
:T
CENT/DP.PRT
Zilog
CENT/DP.PRT
Note:
A '0' port selection entry when an HPCPU
will result in an error message display.
is
in
use
Printer type parameters are the same for systems with either
CPU board in use:
Type: 0 = Centronics
1 = Data Products
Before running a test, ensure that the proper jumpers are in place:
\ PRINTER
PORT \ TYPE
I
I
CENTRONICS
HPCPU Board
I
I
no I/O port for
printer
DATA PRODUCTS
no I/O port for
printer
-------------------------------------------------------------------Ordinary
El7-El8 El3-El4
E16-E17 E14-E15
I
CPU Board
I
SSB 1
I
I
-------------------------------------------------------------------"I
I
E2-E3
E4-E5
E7-E8
E10-Ell
El3-El4
*
El-E2
E5-E6
E7-E8
*
E10-Ell
El3-El4
*
*
I
E2-E3
El0-Ell *
I
El-E2
E10-Ell *
I
E4-E5
El3-E14 *
I
E5-E6
El3-El4 *
I
E8-E9
1
E8-E9
1
--------~---------------------------------------------------~-------I
I
1
I
SSB 3
I
E2-E3
Ell-E12 *
I
EI-E2
Ell-E12 *
1
I
E4-E5
E13-E14 *
I
E5-E6
E13-E14 *
1
I
E7-E8
I
E7-E8
I
SSB 2
--------------------------------------------------------------------1
I
I
I
SSB 4
*
I
I
I
E2-E3
E4-E5
E8-E9
Ell-E12
E13-E14
*
*
I
I
I
E1-E2
E5-E6
E8-E9
Ell-El2
El3-E14
Applies to SSB board assembly revision level C and aboveo
1.4.
Error Messages
A "Printer Busy Too Long" message is displayed if the proper
connection does not exist between" the System 8000 and the
printer.
Ensure that the printer is online and that cable
connections are secure.
2
Zilog
10/25/84
2
*
*
I
I
I
CENT/DP.PRT
Zilog
CENT/DP .. PRT
:~
If a zero is entered as the port selection
board is in use, the program announces:
when
an
HPCPU
ILLEGAL printer port is entered
and presents a menu of allowed choices.
3
Zilog
10/25/84
3
CENT/DP.PRT
Zilog
CENT/DP.PRT
'"'---- -
4
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4
1.1.
CIOTST
Zilog
CIOTST
CIOTST
CIOTST is made up of
clock problems are
an HPCPU board is in
an HPCPU installed
message described in
two tests designed for use if HPCPU
suspected. The test will run only when
usea
Attempting to run CIOTST--wIthout
in the system will result in an error
error message paragraphs.
Test 1 checks HPCPU board Z8536 CIa data paths, and
checks counter/timer functionality.
Test
2
One test lap is complete in approximately three seconds.
CIOTST is entirely software controlled and requires no
cial cable or jumper changes.
1.2.
spe-
Parameter Entry
When CIOTST is selected from the SADIE test menu,
the program announces the test and promnts for #REPS an~ parameter
entry.
~,
Respond to the following prompt with the desired test
number,
or press the carriage return to accept the default
value:
Parameter 1 test num=
Enter value in decimal or to leave value the same
The only parameter entry required for this test chooses
which test will run.
Test 1 is the default test and will
run if Parameter 1 is not changed, or if an invalid test
number is entered.
1.3.
CIOTST Screens
Following test selectionl CIOTST displays:
This is CIOTST - Version
This is a pair of tests of the HPCPU onboard CIO.
The test is described, and after completion of a test lap,
the program summarizes:
:
lap:1
Total Errors Errors This Lap
On completion of the specified number of repetitions, CIOTST
adds to the display:
Exiting CIOTST. The test is finished
and the SADIE command level menu returns.
1
Zilog
10/25/84
1
CIOTST
1.4e
Zilog
CIOTST
Test One
Test 1 is a counter/timer
functions as follows:
register
write/read
test
which
I Check for type of CPU board in use and
I display an error message if a HPCPU is not installed.
write ones only to each read/write CIa counter/timer register. \
I Verify that each read/write register contains ones only.\
I Display error messages on reads containing any value
I other than ones and store errors for lap summary.
I Write zeroes only to each read/write CIa counter/
I
timer registero
I Verify that each read/write register contains
I zeroes only.
I Display error messages on reads containing any
I
I number other than zero and store errors for lap summary.l
I
I
lc4.1e
Repeat the test the number of times specified
by #REPS parameter entry~ display lap summary.
-.
I
I
Test One Error Messages
checks for presence of an HPCPU boardo
If it
finds none, the test is aborted and this message displayed:
CIaTST'~first
HOST PROCESSOR IS NOT AN HPCPU - TEST ABORTING
2
Zilog
10/25/84
2
-
---------------------
CIOTST
Zilog
CIOTST
When Test 1 is run, any error will result in this message at
the end of the lap:
REGISTER ERROR: REG IS SHOULD BE
This message means that the value shown as SHOULD BE was
written to the named register and, when read, returned the
value displayed after IS.
1.4.20
Test One Lap Summary
The lap summary, displayed at the end of each lap,
this information for Test 1:
REGISTER TEST:
provides
LAP: TOTAL ERRORS: <#cumulative errors>
ERRORS THIS LAP: <#errors>
If errors occurred during the test lap, the display
reads:
REG IS SHOULD BE
Refer to Paragraph 1.4.1 for interpretation of this error.
1.5.
Test Two
Test 2,
a
counter/timer interrupt test,
checks linked
counter/timers 1 and 2 for ability to count and interrupt.
The Z8536 is set to interrupt 16 msec from the beginning of
the count.
Failure to do so within 20 msec results in an
error message described in Paragraph 1.5.1.
1.501.
Test Two Error Messages
CIOTST first checks for presence of an HPCPU board.
If it
finds none, the test is aborted and this message displayed:
HOST PROCESSOR IS NOT AN HPCPU - TEST ABORTING
When Test 2 is running, the Z8536 timers on the HPCPU board
are linked and set to interrupt 16 msec from the beginning
of the count.
If the counters fail to interrupt within 20
msec, the console displays:
COUNTER/TIMER DID NOT INTERRUPT
3
Zilog
10/25/84
3
CIOTST
1.SQ2.
CIOTST
Zilog
Test Two Lap Summary
The lap summary for Test 2 provides the
tion:
COUNTER/TIMER TEST:
following
informa-
LAP: TOTAL ERRORS
ERRORS THIS LAP:
If an error occurred
includes the message:
during
the
lap,
the
lap
summary
COUNTER/TIMER DID NOT INTERRUPT
Refer to Paragraph 1~5.1 on Test 2
interpretation of this messagee
error. messages
for
an
~.
4
Zilog
10/25/84
4
Zilog
1.1.
ICPTST3
ICPTST3
ICPTST3, Phase III of ICP testing, is an interactive exercise monitor' for systems which include an Intelligent Communications Processor (ICP) board and an ICP I/O panel.
ICPTST3 is a menu driven, interactive program, and as such
requires no parameter entrieso It is not intended for use in
an automated, comprehensive "test list".
The test provides
a special detailed error log accessed from the SADIE "PAUSE"
mode menu, which identifies faulty integrated circuitso
ICPTST3 interacts with the user similarly to ICPTST2.
An
ICP board jumper change as well as special cable connections
are required to run the test, and are described under the
"set-up" subsection for each tests
ICPTST3 provides a choice of asynchronous or bisynchronous
loopback testse
Menu choice 'I' invokes the asynchronous
test and menu choice 'B' invokes the bisynchronous test.
A
"Q" selection returns the SADIE executive menu.
ICPTST3
menu choices are presented this way:
SELECT OPTION FOR SADIE TEST OF ICP:
"I" = INTERNAL LOOP TEST OF SCC CHANNELS
"B" = EXTERNAL LOOP TEST OF THE BISYNCHRONOUS MODEM PORT
"Q"
=
QUIT
NOTE
When the program references TTY ports 0-7, for
example, it does not refer to the I/O ports associated with the CPU or SSB boards which are
labeled TTY. The TTY ports referenced in ICPTST3
prompts are ICP I/O panel ports associated with
ICP board SCC channels.
1
Zilog
10/25/84
1
1.2.
ICPTST3
Zilog
ICPTST3
Internal Loopback Test
The internal loopback test runs an asynchronous local
back on see channels 0 throu~h 7 in the polled mode.
102.1.
loop-
Internal Loopback Test Set Up
Press I to invoke the test, and the program prompts the user
to remove all "TTY cables" and make these jumper connections
on the Iep board:
CONNECT
E12-E13 •• To set ICP ports 6 and 7 to asynchronous mode
E17-E18 \
\ •••••• Factory installed - check only
E20-E22
E23-E25
/
E24-E26 /
ENTER "R" WHEN READY
.~
Disconnect all Iep port cables for the Internal Loopback
Test, make the jumper change, and enter "R". FAILURE TO
REMOVE CABLES FROM THE Iep I/O PANEL WILL RESULT IN ERROR
MESSAGESo
1.2.2.
Internal Loopback Test Sequence
Each lap transfers
displays:
1024
characters
INTERNAL LOOPBACK TRANSMISSION TEST,
TRANSFERRED,
<# errors> ERRORS
1.3.
Bisynchronous
Loopb~ck
on
CHARS
Test
Command "B" entry invokes the Bisynchronous Loopback Testo
This test runs a 9600 baud bisynchronous loopback test
between the 6th and 7th ICP ports,
using the first five
ports as external clock sourceso
1.3.10
Bisynchronous Loopback Test Set Up
When the program prompts for jumper changes,
remove rcp
board jumper E12-E13 to set the rcp ports to the synchronous
mode, and verify that the factory installed jumpers are in
place as for the internal loopback testo
2
Zil09
10/25/84
2
ICPTST3
Zilog
ICPTST3
"The program then prompts
Interconnect ports 6 and 7, then connect clock to a
port (0-5) and enter its port number when readyo
To connect the I/O test cable (Zilog part number 59-0327):
Connect PI to the sixth port, and P2 to the seventh port.
Connect P3 to any other ICP I/O port selected as a clock
source.
Contact a Zilog Field Service Representative concerning cable availability.
Type in the selected clock port number as prompted.
1.3.2.
Bisynchronous Loopback Test Sequence
On each lap, 256 characters are transferred in
tions, followed by the prompt:
both
direc-
BISYNCHRONOUS TRANSMISSION TEST, <#characters> CHARS
TRANSFERRED EACH WAY, <#errors> ERRORS
1.4.
Error Messages
All error messages are preceded by an audible "beep" on the
console.
Hard errors reported on the console terminate the
test and return the ICPTST3 menu.
To view a simple error log at the end of the test, enter "Q"
from the ICPTST3 menu, or press the system START button for
the Pause menu, and then enter "D"
via the console.
For
information on the detailed error log, refer to paragraph
1.4.1.
DO NOT PRESS START TO INITIATE A PAUSE WHILE ICPTS~3
IS RUNNING.
Error messages are listed below in boldface type, with variable values shown as .
Error message interpretation followso
SCC TRANSMIT BUFFER EMPTY FLAG WAS NOT SET, ICP<#>, TTY
Bit 2 of Read register 0 was not set on the transmit
during the internal loopback transmission test.
3
Zilog
10/25/84
port
3
ICPTST3
Zilog
ICPTST3
SCC RECEIVE CHARACTER AVAILABLE FLAG WAS
TTY
NOT
SET,
ICP,
Bit 0 of Read register 0 was not set on the receive
during the internal loopback transmission test.
port
CTS NOT SEEN BY TTYd, ICP
Bit 5 of Read register 0 (CTS) did not go high when RTS in
transmit port was set high during the bisynchronous loopback
transmission test.
DCD NOT SEEN BY TTYd, ICP
Bit 3 of Read register 0 (DCD) of the receive port did not
go high when transmit port DTR was set high during the
bisynchronous loopback transmission test.
RECEIVE SYNCHRONIZATION NOT ACHIEVED BY TTY, ICP
The receive port failed to achieve
three 50 sync character tries.
synchronization
within
SLAVE MEMORY PARITY ERROR, STATUS=
A slave memory parity error caused a non-vectored interrupt
in the host.
STATUS is the hexadecimal value of offending
rcp status register.
SLAVE SOFTWARE NO LONGER RUNNING
The slave CPU has not responded to the· host within the
imumallowable time.
max-
SLAVE OUT OF SYNCHRONIZATION WITH HOST, ICP
A non-vectored interrupt occurred in the slave processor
with Bit 15 of the non-vectored interrupt flag equal to
zero.
INVALID OPTION RECEIVED BY ICP<#>
A non-vectored interrupt occurred in the slave processor
with an unexpected value in the non-vectored interrupt flag.
UNKNOWN MESSAGE FROM SLAVE
A non-vectored interrupt occurred in the host processor with
an unexpected value in the non-vectored interrupt flag.
4
Zilog
10/25/84
4
1.4.1.
ICPTST3
Zilog
IcP'rST3
Detailed Error Summary
An "E" PAUSE menu choice summons a detailed error log
display which provides chip-level rcp board fault isolation
when errors have occurred during rCPTST3.
To access the PAUSE menu, press the system START button at a
time when no test is in progress, and the program is waiting
for user input.
Enter "E" to view this detailed error log
test:
for
the
current
INTERNAL LOOPBACK TEST SUMMARY:
TEST
ICP
TTY
RESULT
I
PASS
I
FAIL
FAILING TEST PATH
or
U ••••• u
BISYNCHRONOUS LOOPBACK TEST SUMMARY:
Iep
TTY
TTY
RESULT
B
PASS
B
<,>
FAIL
TEST
FAILING TEST PATH
or
·0
U.",o •• U<'>
The program isolates problem rcs in this way:
The rcp board contains 145 chips, which, for fault isolation
purposes, form a 145 dimensional vector spaceo
This vector space contains test paths in which:
i-th component = 1
i-th component
=
0
if Ui is in the test data path
if Ui is not in the test data path
rCPTST3 stores rc designations in tables for each test path,
which enables boaed fault isolation to the chip level.
rcp
port selection{s) determine which path the test will take.
5
Zilog
10/25/84
5
ICPTST3
Zilog
)
\
The program displays "PASS" under "RESULTS" when the test is
successful, and "FAIL" when the test is unsuccessfulo
PASS
FAIL
=
the union of all successful test paths
= the union of all unsuccessful test paths
The set complement of PASS together with FAIL determine a
set of components in one or more failing paths. (The set
complement of PASS represents a set of ICs which are not in
a successful test path, such as those in untested paths.)
Test paths from the input connector PI to the CPU (U63)
are
assumed to PASS, and test path reporting is limited to those
paths between the CPU and connector P2.
1 5.
0
Lap Summary
The number of characters transferred
errors is displayed after each lap.
6
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and
the
number
of
6
Icp crST4
1.1
Zilog
ICPTST4
ICPTST4 is an EXXON OFFICE SYSTEM customer
such, is not documented in this manual.
option
and,
as
o
1
Zi10g
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1
\
)
"-~.
.
MDCCRC
2;ilog
MDCCRC
~\
1.ls
MDCCRC
MDCCRC is a nondestructive verification of the data on a
1/4" mini-Winchester disk.
1.2.
5-
MDCCRC Overview
MDCCRC reads every track on
parameter 1.
Parameter 1
(default: unit = 0)
the
=
disk unit
unit number
specified by
to be tested
Before the test begins, MDCCRC issues a software reset command to the mini-Winchester Disk Controller (mWDC).
If the
mWDC does not respond or fails to pass its self-test, a message is displayed and MDCCRC aborts the test. Otherwise,
MDCCRC issues an mWDC firmware identifier read command to
determine the firmware version.
Whenever a read error is .detected, an error message is
displayed and logged.
The message identifies the type of
error encountered, the start disk address and whether the
error was corrected (soft error)
or uncorrectable (hard
error) •
MDCCRC repeats the test the number
SADIE #REPS entry.
of
times
specified
The disk drive heads move to the innermost cylinder
end of the test.
1.3.
at
by
the
Initialization and Self Test Error Messages
MDCCRC displays one of the following error messages whenever
an mWDC initialization or self-test error occurs:
MDC NOT RESPONDING DURING INITl1
The test initiated a software reset to the host and
sent the segment and offset of a packet. The mini Winchester Disk Controller did not indicate self-test
start and thereby acknowledge receipt of the reset.
DMA OR RAM ERROR: PACKET NOT CLEAREDl1
The mWDC began self test, thereby acknowledging receipt
of reset from the host.
However, the packet was not
cleared by the mWDC, indicating that there is a
Direct
Memory Access or memory problem.
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1
MDCCRC
Zilog
MDCCRC
1
.~
MDe TIMED-OUT ON SELF-TEST!l
..
The mWDC must indicate completion of its self-test
within 1.5 minutes of its start. MDCCRC waited the
correct amount of time and the mWDC had not yet indicated end of self-test.
Moe SELF-TEST ERROR: PROM CRC1!
The mWDC failed its PROM
test.
checksum
test
during
self-
MDC SELF-TEST ERROR: RAM ERROR AT
The mWDC on-board RAM test failed during self-test. The
RAM offset where the error occurred is a hexadecimal
number.
MDC SELF-TEST ERROR: INVALID COMPLETION CODE:
The mWDC returned an unrecognizable self-test completion code (shown in hexadecimal) in the packet dispatch
word. The host interprets this as a
fatal self-test
error.
1.4.
1_.
Read Error Messages
\ ..
This heading lists possible read error
during the test as an error occurs.
1~4.1.
messages
displayed
Error Description Conventions
Conventions used to describe possible
are:
read
error
messages
Non-variable messages such as "DISK="
are
shown
as
displayedo
Variable information which further defines error
types is indicated within"<
>" symbols~
,
for example.
Disk unit and logical block
addresses,
data patterns,
cimal numbers
numbers are decimal numbers~
and buffer contents are hexade-
0
,-. _ _ C
2
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2
MDCCRC
Zilog
MDCCRC
/~.
Any of the messages listed below
:
may
appear
in
place
of
"wait Abort"
"Parity"
Wri te Faul til
Seek Not Complete"
Cylinder Not Found"
Drive Not Selected"
Block Not Found"
Invalid Command"
No Track 0 Found"
Drive Not Ready"
Bad Interrupt"
Bad Defect Map"
Illegal Cylinder"
Burst Error"
Read Abort"
Unknown"
.'{1
1.4020
fr"\
Error Descriptions
A brief description of the error message source follows each
error listed in the following text.
HARD ERR-- DISK= READ 17 SEes
The mWDC returned an uncorrectable error status in Command
Word 5 status field upon completion of a packet commando
Example Display:
HARD ERR--Burst Error DISK=0,200
This error message indicates
Error
(data error) occurred
0, block 200.
READ 17
SEes
an uncorrectable Burst
while read ing disk unit
SOFT ERR-- DISK= READ 17 SEes
The mWDC returned a correctable error code in the status
field of Command Word 5 upon completion of a read packet
command.
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3
MDCCRC
Zilog
MDCCRC
Example Display:
SOFT ERR--Burst Error
DISK=1,1333
This error message indicates a
Error
(data
error)
occurred
unit I, block 1333~
1.5a
READ 17 SEes
correctable Burst
while reading disk
Lap Summary
At the end of each lap, the program displays a lap summary
of cumulative statistics for all laps completed in the
current MDCCRC test run o
Appendix C provides details of lap
summary content ..
\
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4
)
.'
Zilog
MDCFMT
1.1.
MDCFMT
MDCFMT
MDCFMT is a DATA DESTRUCTIVE formatting of the entire mini
Winchester
Disko
This text first provides a general
description of the test, followed by parameter and error
message definitions.
lo2e
MDCFMT Overview
Before disk formatting begins, MDCFMT issues a software
reset command to the mini-Winchester Disk Controller (~WDC)o
If the mWDC does not respond or fails to pass its self-test,
an error message is displayed and MDCFMT aborts the test.
Otherwise, MDCFMT issues an mWDC firmware identifier read
command to determine the firmware versionQ
If the mWDC initialization sequence is successful and the
controller board switch settings are set to a drive type
that MDCFMT recognizes, no drive parameters need be entered.
If mWDC switch settings indicate that universal drive types
7 exists for the current disk unit, the program prompts for
entry of disk drive parameters for the number of heads and
physical cylinders, and the reduced-write current cylinder
numbero To obtain these parameters, refer to the hardware
reference manual appropriate for the system under testo
When the program is satisfied with the disk
displays:
parameters,
it
The following physical limitations will be used for unitl,
iblocks