SY27 0208 1_3705 80_MLM_R01_Jan1982 1 3705 80 MLM R01 Jan1982
User Manual: Pdf SY27-0208-1_3705-80_MLM_R01_Jan1982
Open the PDF directly: View PDF 
.
Page Count: 342
| Download | |
| Open PDF In Browser | View PDF |
·( ' t· (; (
(
f {
{
(
(
{
{' (' {
{
( (
{' (
-----
(' (
(
-=-=
=-==.=-::.
=-.=-::.
--=
-.
--.=-::.
= = --= =
==- =-=
- = = =
=
{'«
(
(
(
(' (
<' (
- .......
- - ----
- - -- ==----';' ==
=-
(
Maintenance Library
---~
=.
:'..=..
Communications Controller
Theory-Maintenance
Volume I
(D99-3705F-01 )
SY27-0208-1
f
PREFACE
Preface
This publication is directed to the Customer Engineer
assigned to maintain the IBM 3705-80 Communications
Controller. He is assumed to be trained on either a System/
360, System/370, 4300 Processor, or 3031, 3032, 3033, or
3081 Processor Complex and to have a teleprocessing
background.
This publication should be used to locate and replace failing
field replaceable units within the controller. Picturesare
combined with text to convey basic operational concepts.
No attempt is made to provide detailed theory information.
Each page contains one topic (although some topics may
require more than one page).
The CE should always begin at the "start" section of
Volume I when trying to locate a failure. This section
contains a flowchart that points to the correct part of
the manual for locating the failure.
The 3705-80 FETMM consists of three volumes which
are identified by two form numbers. The volumes may
be placed in separate binders for ease of use.
Second Edition (January 1982)
This edition has important changes. Information on the Type 4 Channel
Adapter has been added to the manual.
The drawings and specifications contained herein shall not be reproduced in
whole or in part without written permission.
Volume I (SY27-0208) contains comphrensive "how to
fix information." Information is provided on: (1) maintenance philosophy, (2) internal functional tests (lFTs),
(3) diagnostic control module (DCM), (4) power map
procedures, and (5) panel line test. The purpose of
Volume I is to help the CE test the 3705-80, locate failing
hardware components, and' repair and return the controller
to the user as quickly as possible. Divider tabs provide
quick access to the individual sections.
Volume II (SY27-0209, part 1 of 2) contains an abbreviation list, legend, the composite table of contents, introduction to the 3705-80, a description of ~he control panel
switches and lights and procedures for using them, diagnostic
aids, IPL, and the theory-maintenance sections on the central
control unit, and storage. A composite index of all three
volumes is at the back of each volume.
Volume III (SY27-0209, part 2 of 2) contains an abbreviation list, legend, a volume table of contents, and the
theory-maintenance sections on the type 1 channel
adapter, the type 2 communication scanner, the line
interface base, the line sets, the power system, and the
remote program loader (RPL). It also contains information on test tools and equipment, preventive maintenance, and physical locations. A composite index
of all volumes is at the back of each volume.
Prerequisite Publication
Introduction to the 3705-80 Communications
Controller, GA27-3304.
Related Publications
IBM 3705-80 Communications Controller
Principles of Operation, GC30-3074
IBM 3704 and 3705 Communications Controllers
Original Equipment Manufacturer's Information,
GA27-3053
IBM 3705 Parts Catalog, S131-007.7
IBM 3704-05 Program Reference
Handbook, GY30-3012
IBM 3705 Advance Communication
Functions for NCP, SY30-3029
System/360 Operating System Online Test Executive
Program, GC28-5086
DOS OL TEP SR L, GC24-5086
System/360 and System/370 I/O Interface Channel to
Control Unit Original Equipment Manufacturer's
Information, GA22-6974
Guide to Using the IBM 3705 Communications Controller
Control Panel, GA27-3087
Summary of Changes for SY27-0208-1
This revision contains:
•
•
•
new pages with type 4 CA information and existing pages with
integrated type 4 CA information.
minor updates to the PWR MAPs section.
other minor editorial changes and clarifications.
IBM has prepared this maintenance manual for the use of IBM customer engineers
in the installation, maintenance, and repair, of the specific machines indicated.
IBM makes no representations that it is suitable for any other purpose.
The information in this manual is sometimes change. Any changes will be
given in later editions or in Technical Newsletters. Ensure that you have the latest
edition and all Technical Newsletters before you use the manual.
It is possible that this material may contain reference to, or information
about, IBM products (machines and programs), programming, or services that
are not announced in your country. Such references or information must not
be construed to mean that IBM intends to announce such IBM products,
programming, or services in your country.
Manuals are not kept at the address that follows; make your request for IBM
manuals to your IBM representative or to the IBM branch office for your area.
If you have comments, write them on the form at the back of this manual. If the
form has been removed, send your comments to I BM Corporation, Information
Development, Department E02, PO Box 12195, Research Triangle Park, North
Carolina U.S.A. 27709. IBM may use or distribute any of the information you
supply in any way it believes appropriate without incurring any obligation
whatever. You may, of course, continue to use the information you supply.
©
Copyright International Business Machines Corporation 1981,1982
,
/
./
II
(
t
(
(- (
(
(
(
(
(
c (
('
Abbreviations
A
AA
ABAR
ABO
ac
ACO
ACF/NCP/
VS
ACR
ACU
adr
AEQ
AHR
ALD
ALU
AMP
APAR
AR
ARI
B
BAL
BALR
BAR
BB
BC
BCB
BCC
BCL
BCT
BO
BP
bps
BSC
BSM
BZL
CA
CACHKR
CACR
CADB
CAMR
CASNSR
CASTR
CB
CBAR
CCB
CCR
CCT
CCU
CD
CDS
CE
chan
char
CHR
And circuit or ampere
automatic answering
attachment buffer address register
adapter bus out (register)
alternating current
automatic call originate
Advanced Communications Function for
Network Control ProgramNirtual Storage
abandm call and retry
automatic calling unit
address
automatic equalizer
add halfword register (instruction)
automated logic diagram
arithmetic logic unit
amplifier
authorized program analysis report
add register (instruction)
add register immediate (instruction)
branch (instruction)
branch and link (instruction)
branch and link register (instruction)
buffer address register
branch on bit (instruction)
bit clock
bit control block
,
bit clock cont~ol
branch on C latch (instruction)
branch on count (instruction)
bus out
break point
bit per second
binary synchronous communication
bridge storage module
branch on Z latch (instruction)
channel adapter
channel adapter check register
channel adapter control register
channel adapter data buffer
channel adapter mode register
channel adapter sen~e register
channel adapter status register
circuit breaker
CSB buffer address register
character control block
compare character register (instruction)
coupler cut through (modem)
central control unit
carrier detect
configuration data set
Channel End (status)
channel
character
compare halfword register (instruction)
ck
clk
cm
CMDR
CMND
com
COS
CP
CPU
CR
CRC
CRI
CRO
CS
CSAR
CSB
CSCD
CSMC
ctrl
CTS
CUE
CW
CWAR
CWCNTR
DAA
DA
dB
DBAR
dc
DCE
DCM
DCR
DE
DET
diag
dist
DLO
DOS
DPR
DR
DCS
DSR
DT
DTE
DTR
EC
EB
ECP
EIA
enbl
EON
EPO
check
clock
centimeter
channel adapter command register
command
common
Call Originate Status
circuit protector
central processing unit
compare register (instruction)
cyclic redundancy check
compare register immediate (instruction)
Call Request
cycle steal
cycle steal address register
communication scanner base
clear to send, carrier detect
cycle steal message counter
control
Clear To Send
Control Unit End (status)
control word
control word address register
control word byte count register
data access arrangement
data modem ready
decibel
diagnostic buffer address register
direct current
data circuit-terminating equipment
diagnostic control monitor
data channel ready
Device End (status)
detector
diagnostic
distance
data line occupied
Disk Operating System
digit present
display register or
data ring (modem)
distant station connect (ACO only)
data set ready
data tip (modem)
data terminal equipment
data terminal ready
edge connector
extended buffer
emulation control program
Electronic Industries Association
enable
end of number (ACO only)
emergency power off
ESC
EXT
FCS
FET
FETOM
FF
FL
FRU
GB
gnd
grp
hex
Hlfwd
horz
HS
Hz
I
IAR
IC
ICS
ICT
lew
1FT
IN
INCWAR
Init
int
intf
I/O
IPL
IR
irpt
ISACR
L
LA
LAR
LCD
LCOR
LCR
LED
LGF
LH
LHOR
LHR
UB
lim
LOR
LOSC
LR
LRI
LS or Is
It
L1
emulation subchannel
external
final control sequence
field effect transistor modem card
Field Engineering Theory of Operation Manual
flip flop
flip latch
field replaceable unit
ground bus
ground
group
hexadecimal
halfword
horizQntal
heat sink
Hertz
instruction (cycle)
instruction address register
insert character (instruction)
initial control sequence
insert character and count (instruction)
interface control word
internal functional test
input (instruction)
inbound control word address register
initial
internal
interface
input/output
initial program load
interrupt remember
interrupt
initial selection address and command register
load (instruction)
load address (instruction)
lagging address register
line code definer
load character with offset register
(instruction)
load character register (instruction)
light emitting diode
leading graphics flag
load halfword (instruction)
load halfword with offset register (instruction)
load halfword register (instruction)
line interface base
limiter
load with offset register (instruction)
last oscillator sample condition
load register (instruction)
load register immediate (instruction)
local store
latch
level 1
L2
L3
L4
L5
mA
MemTB
modem
ms/divn
MST
mV
NB
N/C
NCP
NCR
NHR
N/O
NR
NRI
NRZI
ns
NSC
OBR
O/C
OCR
OE
OH
OHR
OLT
OLTEP
OLTUB
OLTSEP
op
op reg
OR
ORI
OS
OSC
OUT
OUTCWAR
OVRN
ON
P
PC
PCF
PCI
PDF
PEP
PG
pgm
PH
PND
PIN
POR
pos
level 2
level 3
level 4
level 5
milliampere
memory terminal board
modulator/demodulator
milliseconds per division
monolithic system technology
millivolt
Digit Signal
normally closed
network control program
and character register (instruction)
and halfword register (instruction)
normally open
and register (instruction)
and register immediate (instruction)
non-return-to-zero inverted
nanoseconds
native subchannel
outboard recorder
over current
or character register (instruction)
exclusive or
off hook (modem)
or halfword register (instruction)
on line test
on line test executive program
on line test library
on line test standalone executive program
operation
operation register
or register (instruction)
or register immediate (instruction)
Operating System
oscillator
output (instruction)
outbound control word address register
overrun
overvo Itage
parity
parity check
primary control field
program controlled interrupt
parallel data field
partitioned emulation programming
parity generation
program
polarity hold
Present Next Digit
part number
power on reset
position
ABBREVIATIONS
iii
ABBREVIATIONS
POSC
pot
pop
PPB
PUT
PWI
R
rcv
rd
rdy
RE
ref
reg
regen
req
RI
RLSO
RMS
ROS
RPL
RR
RS
RSA
RT
RTS
rly
SAR
SCF
SCR
SCRIO
SOF
SOLC
SOR
sec
sel
SEP
seq
SG
SH
SHR
SIG
SIO
SMS
SR
SRI
SRL
SIS
ST
STC
STCT
present oscillator sample condition
potentiometer
post processor modem card
prime power box
programmable unijunction transistor
power indicator
resistance or resistor
receive
read
ready
register and external register (instructions)
reference
register
regenerative
request
register immediate (instruction) or
ring indicator (modem)
receive line signal detector
root mean square
read -on Iy storage
remote program loader
register to register (instructions)
register to storage (instructions)
register and storage with addition
(instructions)
register branch or register and branch
(instructions)
Request To Send
relay
storage address register
secondary control field
silicon controlled rectifier or
subtract character register (instruction)
silicon controlled rectifier indicator driver
serial data field
synchronous data link control
storage data register
second
selection
separator (ACO only)
sequence
signal ground
switch hook (modem)
subtract halfword register (instruction)
signal
start I/O
standard modular system
subtract register (instruction)
subtract register immediate (instruction)
Systems Reference Library
start/stop
store (instruction)
store character (instruction)
store character and count (instruction)
STH
stk
svc
sw
SYN
sync
TAR
TB
TIC
tr
TRM
TSL
T2
T3
T4
UC
UE
V
V/divn
wd
wr
XCR
xfer
xfmr
XHR
xmt
XR
XRI
2W
4W
store halfword (instruction)
stacked
service
switch
synchronous idle
synchronization or synchronous
temporary address register
terminal board
Transfer In Channel
trigger
test register under mask (instruction)
Technical Service Letter
test 2
test 3
test 4
Unit Check (status)
Unit Exception (status)
volts
volts per division
word
write
exclusive-or character register (instruction)
transfer
transformer
exclusive-or halfword register (instruction)
transmit
exclusive-or register (instruction)
exclusive-or register immediate (instruction)
two-wire line connection (implies
half-duplex)
four-wire line connection (implies duplex,
but actual duplex depends on the line set
type and telephone company equipment).
-----.-.,
\
/
\
..
/
iv
c
(
(.' (,~
('~
(
(-' (
, ./
(,.~"
C
(
(:
(,' (:'
~'
('
('"
(:~
(:
(
(~:
(:
(\ ('
(~\
(-,
C
(~'
(-\ (~'
.. t'
(~ (~
Contents
3705-80 Maintenance Procedures . . . . .
CCU/CHECK/HARDSTOP/LOAD Light
3705-80 Checkout Procedure
ROS Test . . . . . . . . .
Panel Test . . . . . . . .
Channel Adapter 1 OLTs .
Initial Test (I NIT) . . . . .
Diagnostic Control Monitor (DCM)
Summary of DISPLAY/FUNCTION SELECT
switches and CE Sense Switches
Scope Sync Points . .
DCM Symptom Index . . . . . . .
Internal Function tests . . . . . . .
Error Indications and Symptom Index.
Manual Intervention Routines . . .
Panel Line Test (T3705L)
Channel Adapter Type 1 (Input 67)
Communication Scanner Type 2
(Input 40 and 43) . . . . . . . . .
Remote Program Loader (Input 68)
Emulator Error Log . . . . . . . . .
Error Recording . . . . . . . . . .
Register Save Area and Log Table.
Type 4 Channel Adapter . . . . . .
Error Recording . . . . . . . . .
Register Save Area and Log Table
NCP Direct Addressable Storage ..
Check Record Pool . . . . . . . . . .
NCP and PEP ABEND and EP Hardstop
Codes . . . . . . . . . . . . . . . . . .
M 0 R Record Formats . . . . . . . . . .
Host Processor Console Error Messages
Command Codes . .
Sense Information . . .
Line Failure Analysis . .
EC and MES Installation
CC Check Analysis Flowchart
EREP . . . . . . . . . . . . .
EREP-Unit Check Record ..
EREP-Permanent Line Error MDR
Permanent BSC/SS Line Error-MDR
Decoding . . . . . . . . . . . . . .
EREP-Station Statistics MDR . . . .
EREP Permanent SDLC Link Error MDR .
Permanent SDLC Line Error - MDR
Decoding START 108
EREP - Permanent SDLC Station
Error MDR START 111
EREP-Type 2 Communication
Scanner Error MDR . . . . .
EREP-MDR Summary . . . .
Internal Functional Test (1FT)
What 1FT Does . . . . . .
Requirements. . . . . . .
How IFTs are Structured.
1FT Execution . . . . . . .
Type 1 CA Loader Error Printouts
Messages . . . . . . . . . . . . .
How to Use the DISPLAY/FUNCTION
SELECT Switch . . . . . .
How to Request an 1FT .. .
How to Terminate an I FT or
OLTEP/OLTSEP . • . . .
1FT Manual Intervention Routines
START 005
START 010
START 020
START 020
START 020
START 020
START 020
START 020
START 022
START 023
START 023
START 023
START 023
START 023
START 023
START 030
START 030
START 030
START 040
START 040
START 040
START 041
START 041
START 041
START 045
START 045
START 051
START 053
START 060
START 061
START 062
START 070
START 080
START 090
START 100
START 101
START 102
START 103
START 106
START 107
START 112
START 113
1FT 002
1FT 002
1FT 002
1FT 002
1FT 002
1FT 002
1FT 004
1FT 006
1FT 008
1FT 008
1FT 008
1FT Symptom Index Mask Field
IFT010
and Register Usage .
Example of an I FT Run . . . . .
IFT010
Failure Indications . . . . . . .
IFT012
IFT012
How to Use the 1FT Symptom Index.
How to Find an 1FT Symptom Index
IFT012
Error Code . . . . . . . . . . . . . .
1FT Symptom Indexes
Z3705BAA CCU 1FT Symptom Index.
. CCU 050
Z3705BBACCU 1FT Symptom Index .
. CCU 070
Z3705 BCA CCU 1FT Symptom Index
. CCU 090
Notes for CCU I FT Symptom Indexes
CCU 110
Z3705CAA Storage 1FT Symptom Index. 1FT STG 200
Notes for Storage 1FT Symptom Index .. 1FT STG 230
Z3705DAA CA1 1FT Symptom Index.
. 1FT CA 300
Notes for CA 1 I FT Symptom Index.
. 1FT CA 360
Z3705JAA CA4 1FT Symptom Index.
. 1FT CA4 365
Z3705JBA CA4 1FT Symptom Index.
. 1FT CA4 374
Z3705GAA CSB 1FT Symptom Index.
. 1FT CSB 400
Z3705GBA CSB 1FT Symptom Index.
. 1FT CSB 450
Z3705GCA CSB 1FT Symptom Index.
. 1FT CSB 500
Z3705GDA CSB 1FT Symptom Index.
. 1FT CSB 550
Z3705GEA CSB 1FT Symptom Index.
. 1FT CSB 600
Notes for CSB 1FT Symptom Indexes
. 1FT CSB 700
Common Error Stops for 1FT
Symptom Indexes . . . .
. 1FT CSB 750
Manual Intervention Stops
for 1FT Symptom Index .
. IFTCSB 800
DCM 005
Diagnostic Control Monitor (DCM) .
DCM Execution . . . . . . . . . .
DCM 005
Type 1 CA Loader Error Printouts
DCM005
DCM 005
Messages . . • . . . . . . .
Description of DCM Functions. .
DCM 010
Routine Selection . . . . . . .
DCM 010
DCM 010
Manual Intervention Routines
DCM 010
Abort Control . . . . •
DCM 015
Control Panel Interface ..
Routine Execution. . . . .
DCM 015
Error Control Information .
DCM 015
Scope Synchronization . .
DCM 015
Continuing From an Error Stop or Manual
Intervention . . . . . . . . . . . . .
DCM 015
How to Use Panel Utilities . . . . . .
DCM 015
Refresh the Last DCM Display Code .
DCM 015
Continuous Display Without Test ..
DCM020
Continuous Display With Test . . ..
DCM020
Address Compare Display Without Test.
DCM020
DCM025
example . . . • . . . . . . . . . . . .
DCM030
Set or Display Repeat Count. . . . . . .
DCM030
Set. Reset. or Display CE Sense Switches
Sense Switch Description .
DCM030
Setting CE Sense Switches . . . . . .
DCM030
Stop Panel Utility. . . , . . . . . . . .
DCM030
Dynamic Communications to Routines
DCM035
DCM035
Display Storage or Register Contents .
How to Use the DISPLAY/FUNCTION SELECT
Switch . . . • . • . • . . . . . . . . •
DCM035
Setting Up a Scoping Loop. . .. . • .
DCM040
Determining Why the Program Display
Light is Not On • . . . . . . . . .
DCM040
DCM Symptom Index .. . • . . •
DCM 100
Z3705ACA OCM Symptom Index
INITIAL Test (lNIT)
.INIT010
.INIT010
What Init Does • • • • • . . . . . .
INIT Execution . • . . . . . . . . . • . . . . . INIT 010
Messages . . . . . . . . . . . . . . . . . . . . INIT010
Interpreting DISPLAY Lights During Loading
. INIT020
Communications Controller Loader Utility .
.INIT020
Remote Program Loader (RPL)
.INIT020
NormaiiNIT Run Indications
.INIT020
CE Options . . . . . . . .
.INIT030
Loop on Program Level . .
. INIT030
Loop on Error . . . . . . .
.INIT030
Display Routine Starting Address
.INIT030
Abort the Current Routine and
Continue Testing. . . . . . . . .
. I N IT 030
Failure Indications . . . . . . . . . .
. I NIT 030
HowtoUsethelNITSymptomlndex
.INIT030
DISPLAYA .. . . .
.INIT030
DISPLAY B . . . . . . . . . . . .
. INIT 030
I N IT Symptom Indexes . . . . . . .
. I N IT 100
Z3705ADA INIT Symptom Index.
. INIT 100
Z3705AEA INIT Symptom Index.
. INIT 106
Notes for INIT Symptom Indexes
. INIT 166
Remote Program Loader Diagnostic Maps RPL DIAG 010
IPL Procedure MAP 0001 . . . . . . . . RPL DIAG 010
Diagnostic Run Procedure MAP 0002 . RPL DIAG 030
CDS Writer Program Procedure
MAP 0003 . . . . . . . . . . . . . .. RPL DIAG 040
Program Zapper Procedure MAP 0004 . RPL DIAG 050
Remote IPL CDS Procedure MAP 0005 RPL DIAG 060
Remote Loader ROS Index MAP 0006 . RPL DIAG 070
Error Analysis Procedures MAP 0007 . RPL DIAG 090
LPG1 Symptom Index MAP 0008 . . . RPL DIAG 130
LPG1 Flowchart MAP 0009 . . . . . . . RPL DIAG 190
Load Program 2 (LPG2) Symptom Index and
Remote IPL CDS . . . • .
. RPL DIAG 200
Remote IPL CDS Format •
. RPL DIAG 200
Byte and Bit Definitions
for the Remote IPLCDS .
. RPL DIAG 210
Scanner and Line Pair 1 CDS.
. RPL DIAG 210
Scanner and Line Pair 2 CDS.
. RPL DIAG 210
Scanner and Line Pair 3 CDS.
. RPL DIAG 220
Line Pair 4 CDS
. RPL DIAG 220
Line Pair 6 CDS . . . . . . . .
. RPL DIAG 230
Line Pair 8 CDS . . . . . . . .
. RPL DIAG 230
Control Panel Display Techniques
. RPL DIAG 240
Error Reporting . . . . . . . . . .
. RPL DIAG 240
3705-80 Configuration Data Set Writer .. RPL DIAG 250
Error Handling . . . . . . . . • . . . . RPL DIAG 250
Error and Information Displays • . . . . RPL DIAG 255
3705-80 1FT Diskette Loader Description. RPL DIAG 300
Error Handling . . . . . . . . . . . . RPL DIAG 300
Error and Information Displays. ..
. RPL DIAG 310
Channel Adapter Online Test (CA OLT)
CA OLT 010
Wha'( CA OLT Does. . . . . . . . .
CA OLT010
Requirements . • . . . . . . . . . .
CA 0 LT 01 0
T3705AA. T3705AB. and T3705AC
Description . . . . . . . . . . . .
CA OLT 010
T3705AD and T3705AE Description
CA OLT 010
T3705AF and T3705AH Description
CA OLT 040
T3705AG and T3705AI Description
CA OLT 040
I FT Execution . . . . . . .
CA 0 LT 010
Messages . . . . . . . . .
CA OLT 010
CA OLT Error Information
CA OLT 020
Test Section Description .
CA OLT 020
Configuration Data Set (CDS) for the 3705-80 . CDS 010
Whatthe CDS Does • . . . . . . . . . . .. CDS 010
(
C
CDS Requirements for the 3705-80
· CDS 010
Prerequisite CDS Information .. .
· CDS 010
3705-80 Dummy CDS Card . . . . .
· CDS 020
Channel Data CDS Card (Card 1 of 4)
· CDS 030
Index and Data Card (2 of 4)
· CDS 040
Index and Data Card (3 of 4)
· CDS 040
Index and Data Card (4 of 4)
· CDS 040
Range Definition Cards . . .
· CDS 050
PWR MAP 020
Power Supply Maps . . . . . .
Power Problem Isolation MAP 2100
PWR MAP 020
Power-On Problems MAP 2130
PWR MAP 030
PWR MAP 060
-4V Under-Voltage MAP 2141 .
+SVDC Under-Voltage (Storage)
PWR MAP 080
MAP 2142 . . . . . . . . . . .
-5 Volt Under-Voltage (Storage)
MAP 2143 . . . . . . . . . . .
PWR MAP 090
PWR MAP 110
+6V Under-Voltage MAP 2144 .
PWR MAP 120
12V Under-Voltage MAP 2145
+12V Under-Voltage MAP 2146
PWR MAP 130
Over-Voltage MAP 2147 . . . .
PWR MAP 140
OC1 Indicator (-4VDC Over Current)
MAP 2148 . . . . . .
PWR MAP 150
Panel Line Test T3705L
PN LN TEST 005
What it Does . . . .
PN LN TEST 005
Requirements . . . .
PN LN TEST 005
Channel Adapter Load Procedure
PN LN TEST 005
RPL Diskette Load Procedure
PN LN TEST 005
Run Procedures . . . .
PN LN TEST 005
Test Function Chart 1 .
PN LN TEST 015
Test Function Chart 2 .
PN LN TEST 015
Test Function Chart 3 .
PN LN TEST 020
Test Function Chart 4 .
PN LN TEST 020
Test Function Chart 5 .
PN LN TEST 020
Definition of DISPLAY A and DISPLAY B
during Test. . . . . . . . . . .
PN LN TEST 025
Control Panel Display Output
PN LN TEST 025
Data Set Leads Display
PN LN TEST 025
LTS Description
PN LN TEST 025
Test Examples
PN LN TEST 030
Error Stops ..
PN LN TEST 045
Contents
V
This page intentionally left blank
,
·1
/
T
(/'
C/
(
(~,
.(/ (
(
f
"",>,
(/ (
C'
.
'/
(
(- (-
L
(/
(/ (
(
(
(
C'
"
-'
~----
(/ (
(
(~/
r-
(
(', (
,-
-- ,
C\
(
(
3705-80
MAINTENANCE
PROCEDURE
- .
,
STAAT
Problem Analysis
No
STAAT 020
ALD Vol. 41
APL DIAG.
STAAT 080
Preventive Maintenance
in LOCATIONS in Vol. 3
(E-Ol0)
Note: Priority of problem analysis is left
to right along this line.
Power
Failure
CCU
Check
Hard Stop
LOAD
Light
All Lines Fail
Multiple or
Single Line(s)
Fail
APL Failure
CPU Console
Error Msg.
EAEP
Other
Symptoms
Use Document for
Source of Symptom
to Analyze and
Proceed
PWA MAP
STAAT010
STAAT 070
APL DIAG.
STAAT 060
STAAT 100
STAAT 011
START
005
(
010
START
CCU/CHECK/HARDSTOP/LOAD LIGHT
From
START 005
INPUT X'74'
On Operators Panel:
1. Lamp Test
2. Record CCU status lights DISPLAY A and B
3. Record TAR & OP REGISTER DISPLAY A and B
Execute Input 74
Record LAR
INPUT X'7D'
Execute Input 70
Record Value
Check for any CCU checks
Reg/Function (E)
Byte X Check
Byte 0 Check
Byte 1 Check
Program Check in Level 1
SAR Check
SDR Check
OP Reg Check
INDATA Bus Check
INPUT X7E'
Execute Input 7E
Record Value
Check for any CCU Level 1
Interrupts
BYTE 1,
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
Cycle Counter Check
0
0
0
0
0= No CCU Checks; 1-CCU Check(s)
TYPE 2 Attach Base Clock Check
CCU Clock Check
INPUT X'79'
Execute Input 79
Record Value
Check for Program Level
Interrupted
CCU LEVEL 1 INTERRUPT REQUESTS
Gen Reg (R)
BYTE 0,
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT.7
Reg/Function (E)
0
0
0
0
0
0
0
0
INPUT X'76'
Execute Input 76
Record Value
Check for any Adapter Level 1
Interrupts
Gen Reg (R)
BYTE X,
BIT4
BIT5
BIT6
BIT7
BYTE 0,
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
CCU CHECK REGISTER
Gen Reg (R)
BYTE 0,
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BYTE 1,
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
Note: Prog Check
INPUT '77'
Reg/Function (E)
Type 4 CA L1
BYTE 1,
Type 2 Scan-1 L 1
0
0
0
Type 1 CA, or Selected
Type 4 CA 1-1
0
Remote Program Loader L 1 Request
BIT6
BIT7
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
0
0
0
0
0
0
BIT6
BIT7
0
0
Execute Input 77
Record Value
Check for and
Record Level
2 and 3
Interrupts
Reg/Function (E)
LAR BYTE X,
BIT 4}
BIT5
BIT6 }
BIT7
LAR BYTE 0,
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
with 2Q-bit EA only
with 18 or 2Q-bit EA
BYTE 1,BITO
LAR BYTE 1, BIT 0
BIT 1
BIT 1
BIT2
BIT2
BIT3
BIT3
BIT4
BIT4
BITS
BIT5
BIT6
BIT6
BIT7
BIT7
EA = Extended Addressing
UTILITY
Gen Reg (R)
BYTEO
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
Address Compare Interrupt L 1
Address Exception (note)
In/Out Check (note)
Protection Check (note)
Invalid Op Check (note)
0
IPL L1
0
ADAPTER LEVEL 1 INTERRUPT REQUESTS
Gen Reg (R)
BYTE 0,
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
LAGGING ADDRESS REGISTER (LAR)
Reg/Function (E)
o
o
o
o
o
BYTE 1, BITO
Program Level 2 Interrupted (note)
BIT 1
Prog Level 3 Interrupted (n,ote)
BIT 2
Prog Level 4 Interrupted (note)
BIT 3
Prog Level 5 Interrupted (note)
BIT 4
FET memory
o
BIT5
0
Prog Level 5 C Condition
BIT 6
Type 1 or 4 CA installed
Prog Level 5 Z Condition
BIT 7
IPL Escape Control
Note: This bit=O if not Level t or if entered immediately
after exiting Level·1.
ADAPTER LEVEL 2 or 3 INTERRUPT REQUESTS
(See Note 1)
Gen Reg (R)
BYTE 0,
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
Reg/Function fE)
BYTE 1, BITO
Type 4 CA L3
0
Type 2 Scan L2
BIT 1
Remote Program Loader L3 Request
0
BIT2
0
0
BIT3
Type 1 or Selected Type 4 CA Data/Status L3
0
BIT4
Type 1 CA-1 or Selected Type 4 CA L3
0
BIT5
Type 4 CA Selected
BIT6
0
BIT7
0
0
Note 1: Executing this instruction following an Output X'67
instruction in which all birs=O automatically selects the
Type 4 CA having highest L3 priority.
}
START 011
r
\,
';
/
-,
.:'
-"
'- ./
"
'"
,-----.,
"
\
./
\,
.J
,-,/
/,.~_r_..,\
"
"
r>'
\.
;
/
,/.",
./
/
-"
,t'~
(~
\.
./
"
./
\
,/
~
'.
"
r-'''!
('
/
'-.../
\,
r
./
',---
/.---..",
(
"I.
,
"
/
'--.,./
--_/
'--.j
'f
',-
t.
/
(
(/
(
(
(
(
(
(
From
START 010
(
(
(
(
(
(
(
(
(
(
(
(
From
START 005
Yes
Interrupt
No
Reference
1. Obtai n Host Console Msg.
if available (START 060)
2. Obtain EREP (START 100.)
3. Obtain other symptoms
Type 1/4 CA Level 1 Start 030
CS2 Level 1
Start 030
RPL Level 1
Start 030
Display ROS Direct Addressable Storage & Record
X'0702'
X'0704'
X'0706'
Input 76
Input 7D
Input 7E
Note: Intermittent errors may be found by running diagnostics
under bias. The -4 volts should be biased in increments of.1 volts
plus and minus, not to exceed 10% (3.6-4.4), while running all
diagnostics. If, by referring to the NCP check record pool (CRP),
or the EP error log, the error is with a specific adapter, the particular section for that adapter should be looped using the above
biasing procedure. A Digitec meter or equivalent should be used
for biasing the machine. ,Restore the -4 volts to its proper setting.
upon completion of testing.
Yes
Stored by ROS if a
CCU error has caused
an automatic reload
of the ROS program.
Have Customer Reload
3705 Control Program
and Restart
DispiayNCP Direct
Addressable Storage
and Check Record Pool
See START 045
Display EP Error Log
See START 040 (Type
1 CAl or START 041
(Type 4 CAl
Refer to Non IBM Control
Program Documentation
for Problem Determination
Analyze Data and
Take Appropriate
Repair Action
Yes
Press RESET
Press LOAD
Run Diagnostics
All Diagnostics
on RPL Diskette
Refer to
START 020
See
RPL DIAG. map 0001
Yes
Yes
ROS Test Failure
Indications:
PROGRAM STOP
HARDSTOP
LOAD TEST
Record CC Chk
Indicators and
DISPLAYBBytes
0.4-7
To START 090
1.0
Yes
> - - T o RPL Diag map 0007
' - - - - - - - - - T o ROS in Vol. 2 (2-0001
START
011
This page intentionally left blank
~
"
./
~
.,
,
./
""
j'
f"'"
,,~~
"-
"
/
~
3"
c'",\
./.--....
\
I
'-... /
./
\,
./
,r-~
/'~~
I
"',j
'
,/~'"
(\
'\
./
./
"/
,
,1"\,
,
j
(""",
"i
"'./
~I
,
.
. ./
0,
\'--.j
/'
'\
'" ./
~,
"'
.
./
(~
(
"Y '"
'\
'.
//
r"
",-,/
~,
'
/
"\
,-j
,r-,
~
,/",
'-.j
"'-j
f'
~
l~
(
t
(/ (
..
(
(
(
(
(
(
(
(
(
(
3705-80 CHECKOUT PROCEDURE
Initial Test (lNIT)
The 3705 is tested by:
Provides basic functional testing of some
registers and storage. Tests the instruction set
in each of the 5 program levels.
1. ROS Test: Started when LOAD key is
pressed.
2. Panel Test: Manual operations performed
by the Customer Engineer.
3. OLT Diagnostics: Started by the Customer
Engineer.
ROS Test
Initiated when the LOAD key is pressed (local
and RPL). Provides the following functions:
IPL Phase 1
IPL Phase 2
-
IPL Phase 3
-
General reset.
ROS code loads into
storage beginning at
location X'OOOO'.
Checks function and
instructions required to
complete the IPL.
Note: Remote IPL phase 3 also tests the diskette controller
data path.
At the 3705:
1. Switch the 3705 power on.
2. Set both the MODE SELECT and
DIAGNOSTIC CONTROL switches to the
PROCESS position.
3. Enable the appropriate channel interface.
4. To load the DCM, set the
DISPLAY /FUNCTION SELECT switch to the
STATUS position. For information on using
the other positions, see "How to Use the
DISPLAY /FUNCTION SELECT Switch" in
the DCM section.
5. Press the RESET pushbutton, then the
LOAD pushbutton.
6. DISPLAY B bits 0.2 and 0.3 should be on
indicating that ROS has reached IPL phase
3. The LOAD light is on; the following lights
are off: HARD STOP, TEST, WAIT, and
PROGRAM STOP.
Refer to the ROS section in Volume 2 for detailed
operating procedure.
If the above conditions are not present, refer to
the CE Panel Test in the CNTL PNL section and
the ROS Test in the ROS test section (Volume 2).
Panel Test
At the Host:
Tests, via the control panel, the basic control and
CCU data flow necessary to load ROS.
Start the OLTEP or OLTSEP in the host
processor. When OLTEP or OLTSEP causes a
console printer message of:
Refer to the CTRL PNL section in Volume 2 for
detailed operating procedure.
Note: 3705 must be available to run diagnostics. That is,
the customer cannot run the 3705 while the diagnostics are in
process.
Channel Adapter 1 or 4 OlTS 3705 AA-AI
rID 'ENTER DEV /TEST /OPT /'
you enter:
r ID,'xxx,yyy/3705A/nfe,ext=ABCD/'
where:
Tests the common channel adapter controls and
interface and performs a data wrap from the NSC
to the ESC.
XXX
=
the channel address of the 3705
(native subchannel address (NSC»
yyy
=
an emulation subchannel address
(ESC)
Run procedure:
At 3705
ABCD
=
four operating options provided by
the OLT and type 1 CA loaders. The
correct entries are Y (for YES) or N
(for NO). The options are defined as
follows:
At Host
- Enable channel interface
Press the RESET and LOAD
switches
- Start OLTEP or OLTSEP
EnterNSC,ESC/3705AA-AI/NFE/
Refer to the CA OLT section for detailed
operating procedure.
(
(,
( «
(-
(
(
(
C = Run type 1 CA loader
with error checking
o = Bypass hard stop on type 1 CA
loader error in 3705 and retry
For failure indicators and how to use the INIT
symptom index see INIT 30.
Refer to INIT section or the RPL OP section
(Volume 3) for detailed operating procedures.
Diagnostic Control Monitor - (DCM)
The DCM provides functions for requesting,
loading and controlling the internal functional
tests (lFTS)' displaying error information, and
setting up scope loops.
Load Procedure (3705-80 With Channel Adapter)
At the 3705:
1. Switch the 3705 power on.
2. Set both the MODE SELECT and
DIAGNOSTIC CONTROL switches to the
PROCESS position.
3. Enable the appropriate channel interface.
4. Set the DISPLAY/FUNCTION SELECT
switch to the STATUS position to load the
DCM. For information on using the other
positions, see "How to Use the
DISPLAY/FUNCTION SELECT Switch" in
the DCM section.
5. Press the RESET pushbutton, then the
LOAD pushbutton.
6. DISPLAY B bits 0.2 and 0.3 should be on
indicating that ROS has reached IPL phase
3. The LOAD light is on; the following lights
are off: HARD STOP, TEST, WAIT and
PROGRAM STOP.
If the above conditions are not present, refer to
the CE Panel Test in the CP section and the ROS
Test in the ROS Test section.
At the Host:
(-
,
(
/
{: (
r ID,'XXX/3705A/nfe,ext=ABCD/'
where:
XXX
= the channel address of the 3705
(native subchannel address (NSC»
ABCD
= four operating options provided by
the OLT and type 1 CA loaders. The
correct entries are Y (for YES) or N
(for NO). The options are defined a~
follows:
A = OLT bypass printing channel errors
B = Run Initial Test (lNIT)
C = Run type 1 CA loader with error
checking
o = Bypass hard stop on type 1 CA loader
error in 3705 and retry
For example, if you enter:
r ID,'007/3705A/EXT=NYNN/'
Test T3705A to address 007 with Initial
Test (lNIT) requested is invoked.
Load Procedure (3705-80 with RPL feature)
1. Place the Initial Test/1FT diskette in the
3705-80 reader.
2. Set the DISPLAY /FUNCTION SELECT
switch to the STORAGE ADDRESS positior
3. Set STORAGE ADDRESS/REGISTER DAT.t!
switches A-E to 00000.
4. Set the channel enable/disable switch to
disable.
.
5. Press RESET, LOAD then INTERRUPT.
6. Initial Test will load (it cannot be optioned
out) and step through the 5 program levels
(1-5) back to level 1 and then load the
Diagnostic Control Monitor (DCM).
7. DCM loaded - DISPLAY A = FFFF, DISPLA'I
B = FFFF. HARD STOP and PROGRAM
DISPLAY lights on.
Follow Initial Test run procedure (RPL Feature).
Start the OLTEP or OLTSEP in the host
processor. When OLTEP or OLTSEP causes a
console printer message of:
riD 'ENTER DEV /TEST /OPT /'
you enter:
A = OLT bypass printing
channel errors
B = Run Initial Test UNIT)
START
020
START
Summary of DISPLAY/FUNCTION
SELECT Switches and CE Sense Switches
DISPLAY/FUNCTION
SELECT Position
The OISPLAY /FUNCTION SELECT switch is
tested by the OCM when the INTERRUPT
pushbutton is pressed and every time the START
pushbutton is pressed after a stop code is
displayed. The following summarizes the
functions that can be selected (a dash indicates
that the switch is not used) :
ADDRESS/DATA
switches
ABC D E
YYYYY
STORAGE ADDRESS
REGISTER ADDRESS
FUNCTION 1
FUNCTION
Display location YYYYY
Display register RR
Refresh last DCM display
Stop panel utilities
Set up continuous display
without test
Set up continuous display with test
Set up address compare display
without test
Set up address compare display with test
Set repeat count to HH
Display repeat count
Set CE sense switches
Reset sense switches
Display CE sense switches
(S=0 for byte 0 of switches;
S=l for byte 1 of switches;
MM=selected bits to set or reset.)
Dynamic communications to routines
Display storage contents at
- R- R
o
1
2
- 5-
- 6
- 7
- 9
AS
- HH
S MM
MM
A S 0 0
FUNCTION 2
- DXXX
XXXXX
FUNCTION 3
- R- R-
FUNCTION 4
- P I RR
FUNCTION 5
- F 0 XX
V WX Y Z
FUNCTION 6
- F F F F F
022
XXXXX.
Display register contents of
register RR
Part 1 of request
Part 2 of request
P=Adapter Number
I=IFT Number
R=Routine Number
MMMM=CE sense switches
Terminate T3705A Loader at host.
Continue from the error stop
or manual intervention stop.
(If it is an error stop. VWXYZ
is not used. If it is a manual
intervention stop. VWXYZ is used
by the routine as specified in the
symptom index.)
Abort total request
Abort current routine
Panel utility display positions
DCM displays routine codes:
Stop codes are displayed when
the switch is set to one of the
FUNCTION positions (1 to 6).
- MMMM
FUNCTION 1.2.3
FUNCTION 4.5.6
CE Sense Switch
ADDRESS/DATA Switches
BCD E
Problem Definition Mode
Restart Routine on First Error
Loop on First Error
Bypass Error Stop
Cycle on Request
Include Manual Intervention Routines
Repeat Each Routine X Times
Halt Before Execution
Bypass New Error Stops
Wait Before Continuing
1
2
1
4
8
2
4
8
8
Note: To loop on an 1FT error requires combined CE Sense Switch settings. To restart routine on first error or to loop on firs
error, the bypass error stop sense switch must also be set.
'
Example: Set STORAGE ADDRESS/REGISTER DATA switch E to:
A - To restart routine on first error or
C - To loop routine on first error.
~
"---.j
/~
./
".
'\
,,_.j
r'
/'
",
'- ./
"---
\..
''\,
/
(..,r:~""'\
"
j
,/'"",\
~"\
,
./
'/="',
'"
;!
",-",
,
",j
/"'\
\
./
(\
\,
/
,, /
,~
\
--
/1
~
"
-'\
I
".
./
/
-
'\
,,---./
,
0
" ./
(
..~
'-../
(
'-.
/
.
./
"'-,
,~.
",-j
- '\,
"--~/
/
'.
(
\
'----'
-~---
(-' (/'
l,J
.... -/
(/
(''- (
(
(
Scope Sync Points
+ Sync Point 1
+
Sync Point 2
+ Address Compare
-
-
01A-B3M2Pl0 (ALD
page CU015) Beginning
of each routine on the
hardware setup block
when the DCM is in a
scoping loop.
01 A-B3M2P13 (ALD
page CU004)
01A-B3P2S09 (ALD
page CU004). Use to
sync on the test
function of a test
routine.
Storage address
compare to STORAGE
ADDRESS/REGISTER
DATA switches.
l
(
-"
(
--"-------"
("
~--.--
-----
(-, (
(
- -
(
----------
f~
(
- - - -
(-
---
--
-
-
«
(
(
{/ (
-------
(
(
7. To terminate testing, set X'FOXX in
STORAGE ADDRESS/REGISTER DATA
switches and press START.
Note: RPL Feature IFTs are on the RPL Diskette.
Error Indications and Symptom Index
1. PROGRAM DISPLAY, TEST and HARD
2.
STOP lights on.
Symptom index display format:
DISPLAY A
= PIRR
DISPLAY B = TSKK
Where:
P = Number (ID) of adapter being tested.
I
=Number (10) of active 1FT.
RR= Number (10) of active routine.
oeM Symptom Index
The DCM symptom index is located at the back of
the DCM section. Operator codes are identified
by either DISPLAY A = X"OOOO' or X'FFFF'.
See the DCM section for detailed information.
Internal Function Tests (lFTs)
IFTs are a set of diagnostic programs, under the
control of the DCM, that are designed to aid in
detecting 3705 hardware failures. The IFTs
available for the 3705-80 are:
CCU
Storage
Type 1 or 4 Channel Adapter
Type 2 Communication Scanner
Run Procedure (all routines of alliFTs on all
adapters)
1. DCM must be loaded in the 3705 and ready
2.
3.
4.
5.
6.
for part 1 of an 1FT request. DISPLAY A and
B = X'FFFF'. HARD STOP and PROGRAM
DISPLAY lights are on (see DCM load
procedure).
Host message: ENTER 1FT REQUEST AT
3705.
Set DISPLAY /FUNCTION SELECT switch to
FUNCTION 4.
Set STORAGE ADDRESS/REGISTER DATA
switches to X'OOOO' and press START.
DISPLA Y B should be X'8002' with the
HARD STOP and PROGRAM DISPLAY lights
on.
Press START again. All tests will run on all
adapters.
Host message: WAITING FOR 1FT
COMPLETION. Successful completion of
the IFTs is indicated as follows: DISPLAY A
=X'FFFF', DISPLAY B=X'80FO', HARD
STOP and PROGRAM DISPLAY lights on.
T
=Type of display code.
S = Scoping indicator and error counter.
3.
KK= Code reference to symptom index.
Symptom index for IFTs are in the back of
the 1FT section.
For failure indications and how to use he 1FT
symptom index, see 1FT 012.
Manual Intervention Routines
Manual intervention routines test single bit
storage errors, storage protect key, usage meter,
storage, and type 2 communication scanner. The
symptom index is at the back of the 1FT section
(1FT CSB 800).
See the 1FT section for detailed operating
procedures.
Panel line Test (T3705L)
This test is a standalone version of the NCP-4 line
test function and can be used when neither NCP
or EP is available to test the communication line
using the 3705-80 control panel.
The test requires a dedicated 3705. The
customer cannot run the 3705 while the
diagnostics are in progress.
The test can be loaded with the type 1 channel
adapter, the type 4 channel adapter, or the RPL
diskette.
CDS requirements:
RPL - No CDS is required.
CA 1 - Only channel data is required.
CA4 - Only channel data is required.
(See the CDS section.)
Run procedure:
See the PNL LN section for operating
procedures.
START
023
This page intentionally left blank
'\
"
'\...
)
./
\
:
".../
"
\
/
,
'~-'\,
r~
,I
'. . _ /
r--'"
;-'"
r~
\. ./
./
"\,----,/ I
f[---"
j
'"
./
r'\
",~
,~~
'- .. j
('''1
/'~
,t' '\
"
",--""/
'"j
./
0
'" j /
r
"J'
'\
;f'~
\.
\
'-
,
/'--.."
I
"j
\.J'
(
I
",
,,--
"
-~
CHANNEL ADAPTER TYPE 1 or 4 (INPUT 67)
Level 1 Interrupt Request
Execute Input 67
Record Value
Check for Any Errors:
The Input X'67' transfers the error condition register and the hardware address of the NSC channel interface address to the CCU.
I
/
Summary of Inbus bits during input X'67':
Card
fLoc.
Bit
REMOTE PROGRAM LOADER (INPUT 68)
COMMUNICATION SCANNER TYPE 2
(INPUT 40 AND 43)
Exec.ute Input 68
Record Value
Check for any Errors:
Execute Input 40
Record I nterface Address:
0.0 1 0.1 1 0.2 1 0.3 1 0.4 1 O.S 1 0.6 1 0.7 11.0 1 1.1 1 1.2 1 1 •3 1 1.4
I
I
I
I
...I
,
Logic
Page
Function
I
I
1 1.s 1 1 •6 1 1•7
General Register
I
I
I
I
I
I
J
~
I
Interface Address
I
I
0.0-0.7
0.0-0.7
A4P2
A4P2
RC104
RC017
NSC hardware address intf A
NCS hardware address intf B
1.0
1.1
1.2
A4Q2
A4K2
A4K2
RC707
RCS07
RCS07
Chan bus in error
Invalid I/O Op
CCU outbus check
1.3
1.4
l.S
A4K2
A4K2
A4K2
RCS07
RCS04
RCS04
Local store parity check
CAenabled
NSC address active
1.6
1.7
-
-
00 = Type 4 CA #1 selected
01 = Type 4 CA #2 selected
BYTE 1.0
1.1
1.2
1.3
1.4
1.S
Channel Bus In Check - Incorrect parity detected on
channel bus in. Hardware generates good parity and
causes L1 interrupt.
InlOut Instruction Accept Check - Indicates that
control program executed an input or output X'60'
through '66' instruction when CA1 was handling a data
or status transfer.
CCU Outbus Check - The CA hardware detected
incorrect parity on CCU outbus.
Local Store Check - The CA hardware detected incorrect parity on data bytes gated out of local storage.
The control program should place good parity in LS
by executing an output '63-6S' instruction.
Channel Interface Enabled - I ndicates either Inf A or
B is enabled.
NSC Address Active - Indicates that the NSC has
been selected and is active. Bit is reset when host
accepts final status.
I
...
,
~
Character Control Block Vector Address
(See B-330)
Execute Input 43
Record Value
Check for any Errors:
General
Register Check Register
(R)
Position
Cause of Check
Reference
C-020
C-120
0.0
LI B A BCC Check
Set to 1 if the scanner detects a LIB A BCC local store parity error during a bit
clock selection.
0.1
LI B B BCC Check
Same as above for LIB position B.
0.6
LI B Select Clock
Set to 1 if more than one LIB was selected, or more than one line was accessed on
the selected LIB, or no line was accessed on the selected LIB, or a line was accessed
on a LI B that was not selected.
0.7
ICW Input Reg Check
Set to 1 if the scanner detects a parity error (odd) in the ICW input register
(46 + 2P).
B-020
1.0
ICW Work Reg Check
Set to 1 if the scanner detects e parity error (odd) in the ICW work register
(46 + 2P).
B-02O
1.1
Priority Reg Avail Check
Set to 1 if the scanner detects a parity error (even) in the priority register available
lines (4 + PI.
B-02O
1.2
CCU Outbus Check
Set to 1 if the scanner detects a parity error (even) on the Outbus (16 + 2P).
B-02O,
B-170
1.3
Line Adr Bus Check
The line adr bus parity is used to predict the parity of the address as modified by
the scanner's upper scan limits. If this predicted parity does not compare with the
actual parity of the modified address, the scanner sets this bit to 1.
B-020
B-(180210)
I
I
INPUTX'68'
GenReg (R)
BYTE 0 BITO
BIT 1
BIT2
BIT3
BIT4
BITS
BIT6
BIT7
BYTE 1 BITO
BIT 1
BIT2
BIT3
BIT4
BITS
BIT6
BIT7
REMOTE PROGRAM LOADER LEVEL 1
STATUS
Reg/Function (E)
*
Outbus Parity Error
*
*
*
*
*
*
*
*
*
Write Command Issued When Write Not
Enabled
•
*
*
*
"
START
030
EMULATOR ERROR LOG
Error Recording
Recoverable and nonrecoverable errors are
recorded in 3705 storage. The Emulation
Program can log up to 15 halfword error
indications. The log entry identifies the type of
error (program check level 4, scanner check, etc.)
and the hardware unit affected. Entries are made
on a wrap-around basis with the most recent
events being retained and each entry beyond the
recording limit overlaying the oldest entry.
Register Save Area and Log Table
The level 1 interrupt handler uses two segments
of the fullword direct addressable area.
1. Fullwords from address X'07 AO' up to but
not including X'07DE' are used to store the
group 0 general registers.
2. Fullwordsfrom address X'07EO' up to but
not including x'oaoo' are used for the 16
halfword log table. This table contains the
various one or two halfword error
messages accumu~ated during processing.
One entry is made for hardware errors and
two entries are made for program errors.
Log Table Format: A halfword at address
X'07DE' contains the address ofthe last entry
made in the table. If there have been no entries
in the table, X'07DE' contains X'07DE'. After the
halfwords are all used, the logging process
wraps to the beginning of the table and overlays
the first entry or entries, beginning at X'07EO',
with the entry or entries for the next level 1
interrupt and so on.
Error Type: Program Check (IN X'7E')
2. The last four bits of the low-order byte
contain the interrupt level atwhich the error
occurred.
3. The four remaining bits contain an identifier.
For a program check the identifier is zero,
and for a channel adapter check it is one.
BitO
Bit 1
Bit 2
Bit3
Bit4
Bit 5
Bit6
Bit 7
The scanner checks have only two types of
information in the log message.
1. The cause of the check, which is located in
the 12 high-order bits.
2. The identifier, which is located in the four
low-order bits.
xx
xO
Bvte
2
I
BitO
Bit 1
Bit 2
Bit 3
Bit4
Bit5
Bit6
Bit 7
Bvte
3
lAR *
Address Compare
Address Exception
In/Out
Storage Protection
Invalid Op
Zero
Zero
Zero
level
level
level
level
2
3
4
5
ID B;'.O}
ID Bit = 0
ID Bit = 0
x1
lAR *
xx
x3
Not Used
Error Tvpe
Protection Check or
Address Exception
Check
Address of last instruction executed
before the one that caused
the check (see note)
-or-
Address of the instruction that
caused the check
ID Bit= 0
In/Out Check at
Level 2, 3, or 4
Address of the input or output
instruction that caused the
check
Bvte 0
Byte 1
In/Out Check at
Level 5
Channel Bus in Parity
I/O Instr. Exception
CCU OUtbU5 Parity
local Store Parity
Zero
Zero
Zero
Zero
level
level
level
Level
Address of last instruction executed
before the one that caused the
check (see note)
IPL (including CCU
check)
Address of last instruction executed
before IPL phase 1
Adapter Check
Unpredictable
2
3
4
5
IDID B;'
.O}
Bit=O
- Control Panel Operations -
ID Bit = 0
ID Bit = 1
Bytes 2 and 3 contain the contents of the lAR.
Program Check
Chann Adapt Chk.
Byte 0
Byte 1
lIBA
lIBB
Zero
Zero.
Zero
Zero
LIB Select
ICW IN Register
ICW Work Register
Priority Register
CCU Outbus Parity
line Address Bus
Type 2CS Chk.
BitO
Bit 1
Bit 2
Bit 3
Bit4
Bit 5
Bit6
Bit 7
* See lAR Contents
L--
Address of last instruction executed
before the one that caused the check
(see note)
.
.
0
Error Type: Type 2 Scanner (1) Check (IN X'43')
xx
Invalid op Code Check
Error Type: Channel Adapter Check (IN X'67')
Error log Format
Bvte
1
Bvte 1
LAR CONTENTS
Bytes 2 and 3 contain the contents of the lAR.
The recorded events may be inspected by using
the dump program or by displaying the entries on
the 3705 control panel. The dump must be made
prior to re-IPL, or the error log table and the
register save area are lost, and the information in
them is meaningless.
Bvte
0
Bvte 0
CONDITION
I.D. Bits
ihe two hardstop conditions (program check and
channel adapter check) have two entries in the
log table:
IDBit-O}
Bit = 0
ID
ID Bit = 1
ID Bit = 1
LOAD ADDRESS
COMPARE,
PROGRAM STOP or
INTERRUPT
Address of last instruction
executed before the one whose
address is set in switches A to E
(3705) (see note)
LOAD or STORE,
ADDRESS
COMPARE, PROGRAM
STOP
or INTERRUPT
Address of instruction
that was loaded from or
stored into the location set
in switches A toE (3705)
INSTRUCTION STEP
Address of last instruction executed
STOP Push Button
Address of lastlnstruction executed
Note: The last instruction may have been an Exit instruction
executing at a higher priority program level than the level
executing at the time the condition occurred. Therefore, LAR
contains the address of that Exit instruction.
3
ERROR LOG EXAMPLE:
OO7CO
007EO
00800
1. The log message. This entry contains the
exact cause for failure, the interrupt level
and an identifier.
2. The contents of the lagging address register
(LAR).
BS4oo022
40030023
00000000
00000000
404003ES
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
000007E6
00000000
00000000
Using the above listing of storage extracted from a 3705 storage dump, note that address X'07DE'contains X'07E6' which
means the last entry was made into address X'07ES'. This means that the oldest entry is located at X'07ES', but since that
location is all zeroes the table hasn't wrapped around yet, so the oldest entry is at location X'07EO'. In the first entry
(X'4003), the 1.0. field is B'0011' So this entry is for a type 2 scanner check. Byte 0, bit 1 being on indicates a LI B B
BCC check occurred. The second entry (X'0023') indicates a CCU OUTBUS parity Check occurred on the TYPE 2CS. The
third and last entry is a program cheCk entry and is therefore two halfwords long. This entry (X'404003ES') indicates an
address exception check occurred'in program level 3 and the contents of LAR was X'03ES'.
The Log Message: The halfword log message
may contain two or three segments of
information, depending on the type of error.
In the case of a program check or channel
adapter check, three segments are used.
1. The high-order byte contains the cause of
the Check.
/
r"\
/"' .. "---:.
/
'--. /'
;"
"
"'.
./
r-'
"
.-/
(~
,r-"j
\
"-.
./
/
r"'\
'-
./
;'
\"
'\
/,
./
\..
j
.,L
'"
...
./
"
(''/"''''-:'\
\
\..
...... _..
/
;"
'\
'-../
.~.
r<,
~
/'
.-
'
.
./
'.
./
'--.j
(
(
{
(/
(
(
(
(
(
(
(
c
(
(
(
(
(
(
(
TYPE 4 CHANNEL ADAPTER
Error Recording
The log Message:
The halfword log message.may contain
one, two, or three halfwords of information, depending on
the type of error.
The four low-order bits of the first halfword indicate the
type of error as follows:
Recoverable and nonrecoverable errors are recorded in
3705 storage. The emulation program can log up to 16
halfword error il'ldicators. The log entry identifies the
type of error (program check level 4, scanner check, etc.)
and the
hardware unit affected.
Entries are made on a
.
,
wrap-around basis with the most recent events being
retained and each entry beyond the recording limit overlaying the oldest entry.
1.
2.
3.
4.
Register Save Area and log Table
1. Level 1 CCU error, first halfword:
The level 1 interrupt handler uses two segments of the
direct addressable areas.
1. Fullword addresses X'07AO' up to but not including
X'07C4' are used to store the group 0 general registers.
2. The halfword at X'071C' contains the address of the
log table pointer (LOGPOINT), followed immediately
by the 16 halfword log table (LOGITEMs). These 17
halfwords are located in the CYEsVC module.
log Table Format:
LOGPOINT contains the address of
the last entry made in the table. If there have been no
entries in the table, LOGPOINT contains its own address.
After the 16 halfwords are all used, the logging process
wraps to the beginning of the table and overlays the first
entry or entries, beginning at LOG ITEMS, with the entry
or entries for the next level 1 interrupt and so on.
The recorded events may be inspected by using the
Dump program or by displaying the entries on the 3705
control panel. The Dump must be made prior to re-IPL,
or the error log table and the register save area are lost,
and the information in them is meaningless.
T
BYTE
BYTE
BYTE
0
1
2
x x
x 0
x x
x 1
x x
x 3
II BYTE
~
3
* LAR
* LAR
* LAR
NOTE 1
x x i x 7
ERROR TYPE
NOT USED
X'0'
X'1'
X'3'
X'7'
Byte 0 .
Bit 0
Bit 1
Bit 2
Bit3
Bit4
Bits 5-6
Bit 7
Byte 1
BitO
Bit 1
Bit 2
Bit3
Bits 4-7
LEVEL 1 TYPE 2 SCANNER
CHECK
LEVEL 3 ERROR
* SEE LAR CONTENTS
NOTE 1. - APPEARS ONLY IF AN OUTBUS CHK OCCURS.
1 CCU error
1 channel adapter check
1 scanner check
3 error
not used
address exception
IN/OUT check
protection check
invalid OP check
not used
ALC support error
Byte 0
Bit 0
Bit 1
Bit 2
Bit 3
Bit4
Bit 5
Bit6
Bit 7
Byte 1
BitO
Bit 1
Bit 2
Bit 3
Bits 4-7
LIB position A bit clock check
LI B position B bit clock check
not used
not used
not used
not used
LIB select check
ICW input register check
program
program
program
program
X'O'
level
level
level
level
2
3
4
5
interrupted
interrupted
interrupted
interrupted
ICW work register 1 check
priority register available check
CCU outbus check
line address bus check
X'3'
Level 1 type 2 scanner check, second halfword (appears
only if an outbus check occurs)
Byte 1
Bit 0
Bit 1
Bit 2
Bit 3
Bits 4-7
program
program
program
program
X'1'
level
level
level
level
2
3
4
5
interrupted
interrupted
interrupted
interrupted
Level 1 channel adapter check, second halfword:
Bytes 0 and 1: lagging address register
Invalid Op Code Check
Address of last instruction executed
before the one that caused the check
(see note)
Protection Check or
Address Exception
Check
Address of last instruction executed
before the one that caused
the check (see note)
InlOut Check at
Level 2, 3, or 4
Address of the input or output
instruction that caused the
check
InlOut Check at
Level 5
Address of last instruction executed
before the one that caused the
check (see note)
IPL (including CCU
check)
Address of last instruction executed
before IPL phase 1
Adapter Check
Unpredictable
- Control Panel Operations -
4. Level 3 initial select where INPUT X'60', byte 0 is
zero, first halfword: X'0047'
Level 3 interrupt for a channel adapter that is not
sysgened, first halfword: X'0147'
Note: When a hard stop occurs, all 18 bits of the LA R are saved
in storage at label SA VELAR in the CYENUC module.
2. Level 1 channel adapter check, first halfword:
channel bus-in check
IN/OUT instruction accept check
CCU out bus check
local store check
channel interface enabled
native subchannel address active
0 = # 1 type 4 channel adapter selected
1 = # 2 type 4 channel adapter selected
LAR CONTENTS
~r-
Bytes 0 and 1: lagging address register
Byte 0
BitO
Bit 1
Bit2
Bit3
Bit4
Bit 5
Bit 7
CONDITION
Address of the instruction that
caused the check
Bytes 0 and 1: lagging address register
Level 1 CCUerror, second halfword:
LEVEL 1 CCU ERROR
LEVEL 1 CHAN. ADAPT. CHECK
Level
Level
Level
Level
3. Level 1 type 2 scanner check, first halfword:
LOAD ADDRESS
COMPARE,
PROGRAM STOP or
INTERRUPT
Address of last instruction
executed before the one whose
address is set in switches A to E
(3705) (see note)
LOAD or STORE,
ADDRESS
COMPARE, PROGRAM
STOP
or INTERRUPT
Address of instruction
that was loaded from or
stored into the location set
in switches A to E (3705)
INSTRUCTION STEP
Address of last instruction executed
STOP Push Button
Address of last instruetion executed
Note: The last Instruction may have been an Exit instruction
executing at a higher priority program level than the level
executing at the time the condition occurred. Therefore, LAR
contains the address of that Exit instruction.
ERROR LOG EXAMPLE:
00700
07FOO
07F20
XXXXXXXX
00000000
00000000
XXXXXXXX
00000000
00000000
XXXXXXXX
00000000
00000000
XXXXXXXX
00007F16
00000000
00000000
40030023
00000000
404003ES
00000000
00000000
7FOEOOOO
00000000
Using the above listing of storage extracted from a 3705 storage dump, note that address X'071C' contains X'7FOE', which
is the address of the log table pointer. X'7FOE' contains X'7F16' which means the lasientry was made into address X'7F16'.
This means that the oldest entry is located at X'7F1S', but since that location is all zeroes, the table has not wrapped around
yet, so the oldest entry is at location X'7F10'. In the first entry (X'4003), the 1.0. field is B'0011' so this entry is for a type
2 scanner check. Byte 0, bit 1 being on indicates a LI B B BCC check occurred. The second entry (X'0023') indicates a CCU
OUTBUS parity check occurred on the TYPE 2CS. The th·ird and last entry is a prOgram check entry and is therefore two
halfwords long. This entry (X'404003ES') indicates an address exception check occurred in program level 3 and the contents
of LARwas X'03ES'.
START
041
START
NCP DIRECT ADDRESSABLE STORAGE
1. Assume the contents of X'07D8' is
X'00018384'.
2. X'18384' +6=X'1838A'.
3. Assume the contents of X'1838A'
is X'BBA8'.
4. Therefore the address of the CRP
is X'BBA8'.
Display and Record:
X'0760' = ABEND Code. Posted by Supervisor
for an error which causes an
ABEND. Refer to START 051 for
ABEND codes.
X'07BC' = lnput 74 (LAR). Stored if ABEND is
detected in level 1. (See START
CHECK RECORD POOL
Program: NCP
Size in bytes: Variable, (header = 10 bytes; each entry =
18-35 bytes).
Created by: NCP generation
Storage starting at X'BBA8' is:
BC1 ABCOO BBB2BBB2 80000400
040.)
Pointer to CRP: SYSCKRP field in HWE.
This is the CRP header. Bytes 2 and 3 of the CRP
header contain the address of the next level 1
unit to be serviced (BCOO in this example).
X'0688' = Input 79 (Byte 1). Stored if ABEND
is detected in level 1.
X'06BT = Communication Scanner #1 Mask
for LIB disable functions
OBCOO
Note: Mask = 'FF' if scanner is
disabled.
12010503 10058400 00000000 00000000
Function: Contains check records that have not yet been
processed. These records are generated by program level 1
and 3 error handling routines and are processed by a pro·
gram level 5 routine (CXDIERT) that prepares buffers for
transfer to the host as unsolicited MDR (miscellaneous data
recorder) records.
00000A8C
Header
Bytes 2 and 3 contain the ABEND code and is the
start of MDR data.
NCP CHECK RECORD POOL
Mode byte is X'1 0' and the error record byte is
X'84'. This indicates that a type 1 channel
adapter check occurred. Also note that the
ABEND/malfunction code X'0503' is stored. See
the chart that follows (from the 3704 and 3705
Program Reference Handbook), GY30-3012-5 for
the MDR record format for type 1 or type 4
channel adapter errors. Note that register X'6T
is stored at X'BC12' (actual record begins at
X'BC02' since each entry has a two byte header).
Therefore, register X'67' contained X'OA8C'. See
START 030 to find that the error was a channel
bus-in check.
The NCP builds some MDR's to be sent to the
host in an area in storage called the Check
Record Pool (CRP). When a channel adapter
failure or a NCP ABEND prevents transferring the
MDR to the host, the check information must be
, obtained from the entry in the CRP. The CRP can
contain three level 1 records and three level 3
records.
To locate CRP;
1.
2.
3.
Display fullword (xxxx xxxx) at X'07D8'
(pointer to HWE)
Add 6 to the fullword at X'07D8' (xxxx xxxx +
6 = yyyy yyyy)
Display the halfword (zzzz) at yyyy yyyy.
This is the CRP pointer.
Example:
2(2)
0(0)
CRPL1PTR
Pointer to next record unit to
be used by level 1.
CRPT1PTR
Pointer to the next level 1 unit
to be serviced by CXDIERT.
4(4)
6(6)
CRPL3PTR
Pointer to next record unit to
be used by level 3.
8(8)
CRPSTAT1*
Trigger control
byte.
CRPT3PTR
Pointer to the next level 3 unit
to be serviced by CXDIERT.
9(9)
CRPSTAT2
(Reserved)
Entry Format
0(0)
CRPCTL
CRP control bytes.
-------_. -------CRPLNG*
Length of the
MDR data.
Assume that NCP has abended with
an ABEND code of X'0503', a
non-recoverable channel adapter
check occurred. To find what the
error was, you must find the MDR.
First you must find the CRP.
CRPFLG*
CRP flag byte.
Start of MDR Data (CRPDATA)
2(2)
4(4)
CRPREC*
The recording
mode byte.
(For values
see table.)
5(5)
CRPID
MDR record ID
field. The
3705MDR
record is
always X'05'.
CRPABMAL
Abend malfunction code.
(Refer to Start 051 and
052)
6(6)
7(7)
CRPBERT*
CRPLCRT
Box error
Lost check
record type
record counter.
code.
8(8)
Up to 29 bytes of formatted information. Remainder of
MDR data. (Refer to Start 053:006)
*Indicates a byte expansion follows.
(
J
"\
.0
'"j
,,," '\
I
'.
"-1
~/
4
",
~
'
'"
;
I
("~.
\
)
,f~
',--)
r~
~)
r',.
"-~
r'~
~./
C
~,
"-j
(~
"--j
,_/
045
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(~'
(
"',-'
{, (
/
Byte Expansions
Offset/Field Name
S(S)
(Header)
CRPSTAT1
Bit Pattern/
Hex Value
Trigger of CXDI ERT is
required.
Trigger of CXDIERT is not
required.
Length of MDR data.
X'04'
X'12'
X'12'
X'12'
X'12'
X'12'
X'12'
X'12'
X'12'
Invalid record.
Type 1/4 channel adapter.
Type 1 scanner.
Type 2 scanner-1.
Type 2 scanner-2.
Type 2 scanner-3.
Type 2 scanner-4.
Invalid operation code.
Input/Output instruction
exception.
Type 3 scanner-1.
Type 3 scanner-2.
Type 3 scanner-3.
Type 3 scanner-4.
Unresolved program level 1
interrupt.
Unresolved program level 3
interrupt.
Type 2 channel adapter-1.
Type 2 channel adapter-2.
Permanent line errors.
Line statistics.
X'14'
X'14'
X'14'
X'14'
X'14'
X'14'
X'1S'
X'1S'
X'19' '
X'19'
1(1)
CRPFLG
4(4)
CRPREC
(MDR Data)
Contents
Trigger control byte.
X '00'
X'SO'
0(0)
CRPLNG
(Entry Format)
Offset/Field Name
Bit Pattern/
Hex Value
6(6)
CRPBERT
Contents
Box error record type code.
X'01'
X'02'
X'03'
X'04'
X'OS'
X'OS'
X'Og'
X'10'
X'11'
X'20'
X'21'
X '40'
X'41'
X'S4'
X'CO'
Unresolved program level 1
interrupt.
Type 2 channel adapter-2.
Unresolved program level 3
interrupt.
Type 2 channel adapter-1.
Type 2 scanner-4.
Invalid operation code.
Type 3 scanner-4.
Type 2 scanner-3.
Type 3 scanner-3.
Type 2 scanner-2.
Type 3 scanner-2.
Type 2 scanner-1.
Type 3 scanner-1.
Type 1/4 channel adapter.
Type 1 scanner.
CRP flag byte.
...
1 .•.
'
... .
.• 1 .
....
... 1
End of check record pool.
(Bits 1-5 reserved).
Record is being serviced by
CXDIERT.
Check record unit has been
used (filled) requires
service.
Recording mode.
X'OO'
X'01'
X'10'
X'10'
X'10'
X'11'
X'11'
X'11'
X'11'
X'11'
X'12'
X'12'
X'13'
X'13'
X'FF'
Permanent I ine errors.
Li ne statistics.
Type 1/4 channel adapter.
Type 2 channel adapter-1.
Type 2 channel adapter-3.
Type 1 scanner.
Type 2 scanner-1.
Type 2 scanner-2.
Type 2 scanner-3.
Type 2 scanner-4.
Invalid operation code.
Input/Output instruction
exception.
Unresolved program level 1
interrupt.
Unresolved program level 3
interrupt.
Invalid record.
START
046
START
NCP AND PEP ABEND AND EP HARDSTOP CODES
X'OO11 , A lavel 3 channel adapter Interrupt for a host Write or
Write Break occurred, and neither zaro count override nor
channel stop was indicated. One of these conditions
should ba present for evary host Write operation.
X'OO12' An initial selection sequance on a type 1/4 channel
adapter was undefined.
X'OO13' An outbound BTU had an invalid chain field.
X'OO14' A data/status sequence on a type 1/4 channel adapter
was undefined;
X'0015' An X 10 to the channel specified a BCU address outside
the buffer pool.
X'0016' An XPORT macro specified an invalid buffer address.
X'0017' An unrecoverable level 1 channel adapter check has
occured.
X'OO1S' Zero count override was detected on a host read
operation.
X'0019' An initial IN CW did not have the zero count override flag
set for channel I/O.
X'001A' The retry limit for an input or output instruction was
exceeded.
X'OO1 B' The program attempted to execute an invalid operation
code.
X'OO1 C' The program attempted to switch channel adapters via an
XIO macro when the logic is not generated into the NCP.
X'OO1D' The program attempted to use an X 10 macro for a busy
communication line.
X'001E' More than one XIO macro was outstanding for the seme
BCU.
X'001 F' An XIO macro to the channel specified an invalid BTU
text count.
X'0020' The INCWAR in a type 2/3 channel adapter was incorrect
(hardware error).
X'0021' The access method pad size is larger than the host buffar
unit size.
X'0022' Outbound data pointers incorrect program error.
X'0023' Invalid PIU address issued to channel.
X'OO24' Out CW execution failure, hardware error.
X'0025' Level 3 is not in initial selection of data status for type
1/4 channel adapter.
X'OO26' Attention delay PIU counter overflow or under flow.
X'0027' Attention presented bit is on but intermadiate quaue is
empty.
X'OO28' UIBLBBA is aqual to zaro. (Program error)
X'OO29' Channel interface is disebled while the NCP is active.
X'002A' During initialization a level 3 was not pending on the
channel adapter that is being loaded across.
X'002B' During initialization a level 3 is pending on a channel
adapter which is SYSGENd inactive.
X'002C' During initialization, a channel adapter which has been
SYSGENd inactive can not be interface disabled within a
reasonable time. Manual intervention may be required.
X'002D' Invalid CAB address.
X'OO2E' Channalinitialization error.
X'OO2F' Level 1 CCU I/O exception occurred. The address at
LAR 2 was not equal to the address in LAR.
The abend codes for NCP and PEP systems are defined in the
XSYSABNS mode.
When an error that causes an abend (abnormal termination) occurs,
the supervisor's abend processor (CXAABND) posts an abend code
in halfword direc1 addressable storaga location X'76G'. Locating
the abend code in the dump gives some insight into the reason for
the 'abnormal termination. The abend coda appears in Display A
on the panel if it is set to Function 6.
If the condition causing the abend is detected in level 1, the
contents of external register X'74' (LAR) are stored at location
X'7BC' and the contents of external register X'79' are stored at
location X'6AB'. These two registers indicate the address of the
failing instruction and the program level that was executing when
level 1 was entered.
The first byte of the abend code indicates which portion of the
NCP detected the error. The second byte indicates the specific
error that was detected.
Errors Detected by Hardware
X'OOOO' CCU check (automatic abend). A CCU hardware error
has caused an automatic reload of the ROS program.
ROS saves the following external registers in these halfword direct addressable storage locations.
XR'76' at X'0702'
* XR'7D' at X'0704'
XR'7E' at X'0706'
* Bits on in this register indicate the type of CCU hardware error. For more information, see IBM 3704 and
3705 CommunitNItions Controllers PrlnCl'p1e of Ope,.tion, GC30-3004.
Errors Detected by I/O Initiation Request, SVC Decoding or a
Level 1 Interrupt Handling Routina (Byte o· x'ocr)_
X'OO01' An Invalid SVC code was executed.
X'OOO2' A protection excaption occurred.
X'OOO3' An XIO macro to a communication line specified an
invalid aCB address.
X'OOO4' An XIO macro to the channel specified a BCU containing
invalid chain pointers.
X'OOO5' An XIO macro to the channal specified a BCU containing
too much text (more than can ever be transferred with a
single host read operetion).
X'OO06' An XIO macro to the channel specified a BCU enqueued
to a system queue.
X'OO07' An XIO macro to the channel was used while a tesk was
still waiting on the ECB in the first buffer of the BCU.
X'OOOS' An XIO macro to the channel specified a BCU in which at
least one buffer had too large a text count field in the
buffer prefix.
X'OO09' An addressing exception occurred.
X'OOOA' An input/output instruction exception occurred, and
retry was not possible.
X'OOOD' An instruction attempted to branch to storage location
X'OOOO'.
X'OOOE' A program check occurred in level 1.
X'OOOF' An XIO macro to the link specified an invalid address.
X'OO10' A level 3 channel adapter interrupt occurred while the
channel adapter was active, but the command register
(X'56') did not indicate a Read, Write, or Write Break
command (type 2 CA only).
~\
'\
"-
/
,/
.. "\
.~
',,_/
X'0037'
X'OO3S'
X'OO39'
X'OO3A'
X'OO3B'
X'OO3C'
X'003 0'
X'OO3E'
X'003 F ,
X'OO4O'
X'0041'
X'0042'
X'OO50'
X'OO51 ,
X'OO53'
\
/
",
/
'. /
(,r-""
I' '\
r-"
\
/
L1 CA ERP. Channel Adapter arror occurred during ERP.
L1 CA ERP. Unable to recover from CCU ou~u. check.
Unable to locate the failing Output X'6X' instruction.
L1 CA ERP. CCU outbus check did not occur on L2 or L3.
Initialization CCU interrupt raquest detected ..
L1 CCU ERP. L5 issued an in or out instruction.
Initialization. Adapter chack detected.
L1 CCU ERP. Unable to recover from inbus parity check.
Unable to locate retry point for Input X'6C'.
L1 CA ERP. Unable to recover from CCU outbus check.
Unable to locate retry point for Output X'6C'.
L1 ERP. L1 error rate threshold exceeded.
L1 CCU ERP. Program check. (EP only).
L1 ERP. Unable to determine interrupted level.
L3 interrupt from PEP and CA not system generated.
L1 ALC ERP. Unable to recover from Airlines Line
Control support L1 error. Unable to locate the failing
input X'7S' instruction.
L1 ALC ERP. Unable to recover from Airlines Line
Control support L1 error. Unable to locate the retry
point.
CXCAANS got control with abort pending off.
CXCAANS got control with SNP mask = O.
CA active with write, write break or read but channel
inoperative bit is on.
X'0121' A SETIME macro specified an ECB address outside the
buffer pool.
X'0122' A SETIME macro specified an Invalid aCB address.
X'0129' A CHAP macro specified an invalid aCB address.
X'012D' A task attempted a reantrent return when no save area
was currently allocated to the task.
X'0130' A POST macro specifiad an ECB whose status was already
"event complete" .
X'0131' A task attempted to change the dispatching priority of a
waiting aCB to APPNDG.
X'0132' COPYPIU - LEASE = YES invalid-new register value
too large.
X'0133' COPYPIU - LEASE =YES-old PIU is too long. (over
255 buffers).
X'0134' COPYPIU - LEASE =YES-new buffer chain is too long.
New chain is longer than the old.
Errors Detected by Queue Management (Byte 0 = X'Or)
X'0201 , An ENaUE macro specified an element that was already
enqueued.
X'0202' An INSERT macro specified an element that was already
enqueued.
X'0203' An EXTRACT macro specified the same address for the
aCB and the positional element.
X'0204' Unassigned.
X'0205' An INSERT macro specified an element at the end of a
queue.
X'0206' An INSERT macro specified the same address for the
element to be inserted and tha element after which it was
to be inserted.
X'0207' An INSERT macro specified the same address for the
element to be inserted and the aCB governing the queue.
X'02Q8' An ENaUEUE macro spec;llfled the same address for the
element to be enqueued and the acB governing the queue.
X'0209' A BHR attempted to use an ENQUE macro specifying an
active queue control block.
X'0210' An ENQUE macro specified an element outside the buffer
pool.
X'0211' An INSERT macro specified an element outside the
buffer pool (positional element).
X'0212' An INSERT macro specified an elemant outside tha
buffer pool (insertion alemant).
X'0213' An EXTRACT macro specified an element outside the
buffer pool (positional alementl.
X'0214' Unassigned.
X'0215' An ADVAN macro specified an element outside the
buffer pool (positional elemant).
X'0216' A DEaUE macro specified an invalid aCB address.
X'0217' An ENaUE macro specified an invalid aCB address.
X'021S' A POINT macro specified an invalid aCB address.
X'0219' An INSERT macro specified an invalid aCB address.
X'021A' An INSERT macro specified the active aCB.
X'021 B' An ENaUE macro attempted to enqueue the active acB.
X'021 C' Head/tail not both zero.
Errors Detected by Task Management (Byte 0 = X'01')
X'0102' A TRIGGER macro specified an invalid aCB.
X'0104' A reentrant CALL macro specified a non-reentrant subroutine, or a level 5 tesk issued a reentrant CALL macro
to code that is not a subroutlna.
X'0105' A level 6 task used a non-reentrent CALL macro when
either the calling tesk or the called subroutine was
reentrant.
X'0101' A BHR attempted to use a QPOST macro.
X'01OS' A SETIME macro specified an Interval greater than
43,200 seconds.
X'0109' A BHR attamptedto use tha apOST operand on a
SYSXIT macro.
X'010C' A task attempted to use a SYSXIT macro while save
area(s) were still allocated to its queue control block.
X'010D' A COPYPIU macro specified an RU count too high.
X'010E' A QPOST macro specified an Invalid aCB address.
X'010F' A TPPOST macro specified a BCU with an invalid resource 10.
X'0111' A TPPOST macro specified an invalid BCU address
(address low).
X'0112' A TPPOST macro specified an invelid BCU address
(address high).
X'0113' A COPYPI U macro specified an invalid old buffer addrass
(address low).
X'0114' A COPYBCU macro specified an invalid old buffer
address.
X'0115' A COPYPIU macro specified an invalid new buffer
address (address low).
X'0116' A COPYBCU macro specified an invalid new buffer
address (address high).
X'0117' A task attempted to use an EXECBHR macro when the
point 3 BHR queue was empty.
X'011S' A user BHR daqueued a BCU and failed to return it to
the queue (via an INSERT macro) prior to the execution
ofan IBM BHR.
X'0119' A BHR attempted to use an EXECBHR macro.
X'0120' A dynamic save area pool was Incorrectly structured.
EP Hardstop/PEP Abend Codes (Located in group 0 register 1)
X'0030' Scanner address axception (EP only).
X'0031, L1 scanner ERP. Scanner arror occurred during ERP.
X'0032' L1 scanner ERP. Unable to recover from CCU outbus
check. Unabla to locate tha failing Output X'4X' instruction.
X'OO33' L1 CA ERP. Unable to select the failing channal adapter.
X'0034' L1 CA ERP. I/O exception check. (EP only)
/ .. ~
''\
X'0036'
X'OO36'
/J
~
,/~
\,-~
."
/
,
/
;'
\
'--_./
r'-"'\
'-..../
051
Errors Detected by Buffer Management (Byte 0 = X'03')
X'0301' A CHAIN macro specified a buffer that was already
chained.
X'0302' A CHAIN macro spacified the same address for tha buffer
to be chained and the buffer to which it was to be
chained.
X'0303' Requast too large.
X'0304' A RELEASE macro spacified a BCU containing more
buffars than the system limit on buffers per BCU.
r~"i
j
/
\,
'\
r
/
/
"
\
'-../
'-..~
(
(/
{/ (
(
(
X'OO06' A RELEASE macro specified a BCU enqueued to a
system queue.
X'0307' The BCU specified in a RELEASE macro had a task still
waiting on its event control block.
X'030A' A.LEASE macro specified a buffer count too high.
X'030F' A RELEASE macro specified a buffer outside the buffer
pool (buffer address low).
X'0310' A CHAIN macro specified a positional buffer outside
the buffer pool.
X'0311' A CHAIN macro specified that a buffer outside the buffer
pool be chained.
X'03l2' An UNCHAIN macro specified a positional buffer outside
the buffer pool.
X'OO14' A SCAN macro specified a buffer outside the buffer pool
(positional buffer address).
X'03l5' A RE LEASE macro specified a buffer outside the buffer
pool (buffer address high).
X'OOl6' Initialization routines were unable to allocate buffers.
X'031S' A LEASE macro specified an ECB address outside the
buffer pool.
X'03l9' A LEASE macro specified a buffer count of O.
X'0320' The buffer pool size and the buffer availability count
were in conflict.
X'OO21 , Less than 20 buffers were formatted during initialization
of the NCP.
X'0322' A RELEASE macro specified a buffer already in the free
buffer pool.
Errors Detected by Supervisory Services (Byte 0 .. X'04'1
X'0401' A GETBYTE macro specified a BCU address outside the
buffer pool.
X'0403' A PUTBYTE macro specified a BCU address outside the
buffer pool.
X'04OS' A GETBYTE macro specified a BCU with an incorrect
text length.
X'0406' A PUTBYTE macro specified a BCU with an incorrect
test offset (in one or more of the buffer prefix fields), or
a PUTBYTE macro with the operand UPDATE = YES
specified a BCU with an incorrect text length.
X'0407' A GETIME macro specified invalid options.
Hardware Related and Miscellaneous Errors (Bytes X'05', X'07',
X'OS')
X'0501 , The retry limit for unresolved level t interrupts was
exceeded.
X'0502' The retry limit for unresolved level 3 channel adapter
interrupts was exceeded.
X'0503' A nonrecoverable channel adapter check occurred.
X'0504' A nonrecoverable communication scanner check
occurred.
X'0505' A type 2 channel adapter cycle steal protection exception
occurred.
X'OS06' A type 2 channel adapter cycle steal addressing exception
occurred.
X'OS07' The retry limit for recoverable channel adapter checks
was exceeded.
X'05OS' The retry limit for recoverable communication scanner
checks was exceeded.
X'050A' A channel adapter check could not be resolved.
X'050B' A communication scanner check could not be resolved.
X'050C' A program level 1 interrupt could not be resolved.
X'050D' A machine check or IPL request was not serviced by
hardware.
X'050E' A program level 3 interrupt could not be resolved.
(
(
(
(
(
(
(
X'050F' A program level 4 timer interrupt request expired and the
timer interval was not scheduled.
X'05l0' NCP generation conflict-the NCP was not configured
for the type of communication scanner installed.
X'0521, NCP generation conflict program level 1 was not configured for the type of channel adapter installed.
X'0522' NCP generation conflict-an interrupt occurred from an
inactive or undefined channel adapter. The channel
adapter, if installed, should have been switched offline
by the operetor at the 3705 and should have remained
disabled.
X'0523' Type 3 scanner addressing exception.
X'0524' Type 3 scanner storage protection exception.
X'0525' Loed module is too large. Code and/or blocks that must
reside below 64K are above 64K.
X'070l' ANS initiated by the remote NCP.
X'0702' ANS initiated at the remote controller'S panel.
X'0703' SIM received by the secondary NCP.
X'OSOO' The link used by load program 2 was not defined at NCP
generation.
Erron Detected in Level 5 (Byte 0 .. X'10, X'301
X'1001' A BCU with a Restart command contained an error in
the text length field.
X'1002' The line control block (LCB) contained an invalid
resource 10.
X'10Q3' The subtask sequence pointer in the LCB was not
initialized.
X'1004' The BTU contained an invalid command modifier.
X'1OO5' After BHR execution, the device input queue was
empty (point 1).
X'1OO6' After BHR execution, the line I/O queue was empty
(point 2).
X'1OO7' After BHR execution, the point 3 BHR queue was empty.
X'1OOS' A task associated with the point 3 BHR queue was dispatched.
X'10og' The backspace BHR was dispatched, but tJ:le queue was
empty.
X'100A' A data manipulation error occurred in the backspace
BHR.
X'100B' The date/time BHR was dispatched, but the queue was
empty.
X'1ooC' All 'skip' flags were set in the service order table (SOT).
X'100D' The number of dial digits passed from the host was not
equal to the BTU text length.
X'1ooE' No Reset command was found at the end of an operation
that was being reset.
X'100F' The device base (DVB) contained an invalid resource 10.
X'1010' An invalid system resource ID was specified in the BCU.
X'10tl' An invalid checkpoint data length was specified in the
BCU.
X'1012' The BH set pointer (DVIBHSET) in the DVB did not
match any entry in the system BH set table (BST).
X'10EE' 10BPOLL points outside SOT.
X'10FF' Pending sessions count is negative.
X'3000' A task was dispatched with an empty aCB.
X'3OO1' Invalid UIB status in PIU.
X'3OO2' Invalid XIO return code.
X'3003' Invalid XPORT return code.
X'3OO1' Module CXDESSA entered when Deactivate Line halt is
in progress.
X'3005' CXDCPSI unable to route PIU to SSCP.
X'3OOS' Reset Immediate XIO failed.
X'3007' Invalid PIU Format.
(
(
X'30OS'
X'30og'
X'300A'
X'300B'
X'3OQC'
X'300D'
X'3OOE'
X'3OOF'
X'30l0'
X'3011'
X'3012'
X'3013'
X'3014'
X'3015'
X'3016'
X'30l7'
X'301S'
(
(
Segmentation parameter N - zero.
Segmentation parameters conflict.
Run Terminator triggered with invalid status.
Invalid Network Address in LKB.
Invalid input passed to routine.
LCB contains no PIU.
CXDKFMR passed a request code to a routine which does
not handle that request code.
XIO Link failed on validated PIU.
XPORT failed on validated PIU.
XIO SETMODE failed.
Invalid UI B type field.
Invalid network address in CCU.
Remote NCP received SNRM from local NCP.
Remote NCP received DISC from local NCP.
Remote detected permanent error in path to local and
ANS is not in system.
Inbound flow in SSCP PU session of a type 1 PU.
Begin bracket PIU not on queue.
(
(
(
(-
X'3FOO' SNRM (set normal response mode) received while
monitoring one line and loed final not yet received.
LPG2 to IPLs to monitor all lines.
X'3F04' Timer expiration. User specified inactive interval
has expired.
X'3F05' Level 1 error.
X'3F10' SIM (set initialization mode) received during the
load or dump stete.
SDLCIBSC Path Function Abend Codes
X'3019" A DEaUE macro was issued by SPF CPM in and there
,was no error PIU on the APPL process aCB.
X'301A'An ADVAN macro was issued by SPF CPM in and there
was no error PIU on the APPL process aCB.
X'301 B' An EXPORT macro, issued by SPF CPM in, failed for
unknown reason.
X'301 C' An XPORT macro, issued by SPF CPM in, failed for an
unknown reason during FIo1 to FIDO conversion.
X'301 0' An XPORT macro, issued by SPF CPM in, failed for an
unknown reason during the export of a FIDl PIU.
X'301 E' An XPORT macro was issued by an IBM point 3 BHR
before the PI U was converted.
X'301 F' A DEaUE macro was issued by SPF CPM out and there
was no error PIU on the APPL process aCB.
X'3020' An XPORT macro, issued by the build error module
(CXDSERR), failed for an unknown reason.
X'3021' A POINT macro was issued by the build error module
(CXDSERR) and there was no PIU on the APPL process
aCB.
X'3025' Lines or links not quiesced count went negative.
X'302S' Auto network shutdown RVT scan error. (SNA)
X'3027' An undefined Contact Poll command was detected during
SNA auto network shutdown.
'X'3028' The remote NCP detected a condition on the active link
to the local NCP which requires backup link monitoring.
Although there are backup links to the local controller,
there is no backup monitor code.
Load Program 2 (LPG2) Error Codes (conditions causing an
unconditional hardstop).
X'30FO' No local/remote communication link defined as active in
the remote I LP configuration data set (CDS).
X'30F1' Type 1 Scanner failed to enable, hardware error on COS
definition error.
X'30F2' CDS invalid.
Load Program 2 (LPG2) Abend Codes (conditions causing a
conditional hardstopl.
X'3F01' No local/remote communication link active (enable failed
or transmittal failed).
X'3F02' DISC (disconnect) received while monitoring one line.
LPG2 to IPLs to monitor all CDS lines.
START
052
START
053
MDRRECORDFORMATS
The records for permanent line errors and line statistics are ~reated by the line error recorder routine (CXDILER).
Record Format for Permanent Line Errors
2(2)
0(0)
4(4)
5(5)
BTU Command
(BCHCMD)*
14(E)
12(C)
Temporary
Error Counter
(DVBSDRE)*
21(15)
2740 Graphic
Response Byte**
I/O-Counter
(DVBSDRT)*
24(18)
Device Type
(DVBTYPE)*
22(16)
Device Features
I
18(12)
lOB Initial
Error Extended
Status
(lOBEREST)*
lOB. Initial
Error Status
(lOBERST)*
(DVBFEAT1)*
11 (B)
lOB Immediate
Control Command
(lOBIMCTL)*
lOB Modifiers
(lOBCMODS)*
17 (11)
15(F)
lOB
Extended
Status
(lOBEXTST)*
lOB Status
(lOBSTAT)*
20(14)
lOB Command
(lOBCMAND)*
BTU Flags
(BCHSFLAG)*
Record
10 X'05'
9(9)
8(8)
6(6)
BTU Modifier
(BCHMOD)*
3(3)
Recording* **
Mode =X'OO'
Line Interface
Address
(DVBFEAT2)*
* Indicates the control block field from which this MDR record field is loaded. (See Note.).
**2740 graphic response byte is zeroed if not applicable.
***Applies to BSC/SS devices as well as lines.
Record Format for Station Statistics
2(2)
0(0)
3(3)
Record
10 = X'05'
Recording
Mode = X'01'
Line Interface
Address
4(4)
Hex Zeros
18(12)
I/O Counter
(DVBSDRT)*
20(14)
24(18)
22(16)
Temporary
Error Counter
(DVBSDREI*
Device
Type
(DVBTYPE)*
Device
Features
(reserved if SDLC)
~---------------------or SCB transmission
counter (SCBTCNT)
ifSDLC.
I-Format
----------or SCB station type
-------- --.-or SCB retry count
(SCBTRTCT)
if SDLC
I
(DVBFEAT1 )*
(SCBTYPE)
If SDLC
(DVBFEAT2)*
* Indicates the control block field from which the MDR record field is loaded. (See Note.)
Note: For field definitions refer to either IBM 3704-05
Program ReferenceHandbook, GY30-3012 or IBM 3705
Advance Communication Functions for NCP, SY30-3029.
"'"
\
/
1"
'\
0:
\,)
r)
,.,.."-.
"-.../
\.
)
1
(~
../
,,..---,,,,
.
I
'....
/
0
"
"-.>
r"\
f-""
\,..j
"-
/
,0\
)
\..
('\I
',- ./
,0
\.. j
/'''"'.
/~,I
j
,---Y
!
'\.../
f"
'\,
\'..j
0
,-,j
r~
j
,.......
'.
""
)
r·
\
"-../
r--'\
~''''\
"'--j
\..
./
r".
,
/
':--'.
....../
-------
(
t/
(
(/ {-' (
-
(-
(
(
(
(
(
(
(
(/ (
(
(
{
(
(
(
(
Record Format for Permanent SOLC Errors
*
6(6)
14(E)
LXB Final Error
Extended Status
(LXBEXTST)
12(C)
LXB Final Error Status *2*
(LX BSTAT)
LX BSTATC
LX BSTAT
20(14)
*
SCB Retry
Count
(SCBTRTCT)
2S(1C)
SCB Receive
Count
(SCBNR)
(Bits 4,5,6)
*
21 (15)
Received BLU
Command Field
(LXBRBLUC)
29(10)
*
7(7)
LXB Modifiers
(LXBCMOOS)
LXB Command
(LXBCMANO)
15(F)
LXB Initial Error Status *3 *
(LXBERST)
LXBHSTAT
(LXBERST
24(1S)
22(16)
*
sca Status
Reserved
Type
(SCBTYPE)
*
30(1E)
SCB Send
Count
(SCBNS)
(Bits 4,5,6)
CCB Control Flags and Line Type
(CCBCTL)
CCBRSPON
Control Flag
CCBTYPE
Line Type
11 (B)
LXB Immediate
Control Command
(LXBIMCTL)
9(9)
S(S)
Reserved
Output Control
Flag (SCBOCF)
SCB Service Seeking Command Flags
(SCBSSCF)
32(20)
***
Command Field
Received from
Secondary Station
SECCFR
Record 10
X'05'
Recording Mode
X'03' = Station Error
X'02' = Link Error
Line Interface Address
4(4)
3(3)
2(2)
0(0)
17(11 )
LXB Initial Error
Extended Status
(LXBEREST)
1S(12)
25(19)
**
Transmit BLU
Command Field
(CCBCFLO)
26(1A)
*
SCB Current
Outstanding Count
(SCBCOC)
33(211
***
N(R) and N(S)
Received from
Secondary Station
34(22)
***
Command Reject Reason
X'OS' = Invalid N(R)
X'04' = Frame too Long
X'02' = Data Received
in Sor NS
Format
X'01' = Invalid Command
*
SCB Transmission Counter
(SCBTCNT)
I·Format
27(1B)
*
SCP Pass
Count
(SCBPCNT)
*This field is present only if this record is for a station (for a link, field contains all zeros).
**This field stored only for duplex links.
***This field stored only if Command Reject was the cause of the MOR record being formatted.
*2 * Last error recognized.
*3*First error recognized.
Note: For field definitions refer to either IBM 3704..(J5
Program Reference Handbook, G Y30-3012 or IBM 3705
Advance Communication Functions for NCP, SY30-3029.
START
054
START
The records on this and the following pages are created by. level 1 error processing routines. They are prepared for transfer to the host by the error record transfer routine (CXDIERT).
I Record Format for Type 1 or Type 4 Channel Adapter Errors
4(4)
S(S)
5(5)
Lost Check
Record Count
(CRPLCRCT)
Error Record
Type X'84'
(Type 1 CAl
Record
10 =X'05'
Recording
Mode = X'10'
Abend/Malfunction
Code
Note: For field definitions refer to either IBM 3704.(J6
Progrem Reference Handbook, GY30..:J012 or IBM 3706
Advance Communication Functions for NCP, SY30..:J029.
3(3)
2(2)
0(0)
Hex Zeros
16(10)
External Register
X'S7'
Type 1 CA Controls
,
Record Formet for Type 2 Communication Scanner Errors
2(2)
0(0)
3(3)
4(4)
8(8)
S(S)
5(5)
External Register
X'74'
Lagging Address Register
External Register
X'43'
Check Register 1
Lost Check
Record Count
(CRPLCRCT)
Error Record
Type·
Record
ID =X'05'
Recording
Mode = X'11'
Abend/Malfunction
Code
16(10)
12(C)
External Register X'79'
Program Level
Interrupted'
Interrupted Program Level's
Instruction Address Register
(Register 0)
-Type 2 Scamler = X'40'
Record Format for:
• Invalid Instruction Operation Code Check. (Abend
• Address Exception (Abend - X'OO09')
Protection Check. (Abend X'0002')
Branch to zero by Level 5. (Abend X'OOOO')
=
•
•
4(4)
Recording
Mode = X'12'
Abend/Malfunction
Code
Record
10 X'05'
=
8(8)
External Register X'74'
Lagging Address Register
Halfword from Interrupted
Program Levels IAR·2 or zero
Lost Check
Record Count
(CRPLCRCT)
=
3(3)
2(2)
0(0)
S(S)
5(5)
Error Record
Type X'OS'
= X '00 1B')
16(10)
12(C)
External Register
X'79' Program Level
Interrupted
Interrupted Program Level's
Instruction Address Register
(Register 0)
Record Format for Input/Output Instruction Exceptions
3(3)
2(2)
0(0)
4(4)
S(S)
5(5)
Error Record
Type =X'20'
S(S)
External Register
X'74'
Lagging Address Register
Instruction on
which the Error
Occurred
Lost Check
Record Count
(CRPLCRCT)
1S(10)
12(C)
External Register X'79'
Program Level
Interrupted
Interrupted Program Level's
Instruction Address Register
(Register 0)
'")
'-,/
Record
10 = X'05'
Recording
Mode = X'12'
Abend/Malfunction
Code
,r<,,\
(
\
,
./
''--~
f"'~
"
"
./
/---~
,~
'- ./
\..j
.
r'---\
~
\
'-.
/
\
;r
I
"'-,"
-.,
,~/
0 ./
\
/::<.,.'~\
)
/~.
,.-/
r~'~
I
I
./
',J
0, ~
r- ".
0
/
;'
r~
',,-----/
/-"
\,
./
055
(/ (
(/
(
(
(-
(
(
(
f
(
_.,
'--'
(
(
(
Record Format for Unresolved Program Level 1 Interrupt Requests
0(0)
2(2)
Abend/Malfunctions
Code
4(4)
6(6)
5(5)
Error Record
Type = X'01'
Record
10 = X'OS'
S(S)
External Register X76'
Adapter Interrupt
Requests Group 1
Lost Check
Record Count
(CRPLCRCT)
3(3)
Recording_
Mode = X'13'
12(C)
External Register X'74'
Lagging Address Register
16(10)
Interrupted Program Level's
Instruction Address Register
(Re~ister 0)
1S(12)
External Register X'79'
Program Level
Interrupted
External Register X'7E'
CCU Interrupt
Requests Group 1
Record Format for Unresolved Program Level 3 Interrupt Requests
This record is created by the level 3 router (CXCCRTR)
2(2)
0(0)
Abend/Malfunction
Code
;
4(4)
6(6)
5(5)
Error Record
Type = X'03'
Lost Check
Record Count
(CRPLCRCT)
3(3)
Recording
Mode = X'13'
Record
10 = X'OS'
S(S)
External Register x'n'
Adapter Interrupt
Requests Group 2
18(12)
Hex Zeros
External Register X'7F'
CCU Interrupt
Requests Group 2
Note: For field definitions refer to either IBM 3705-80
Program Reference Handbook, GY30-3012 or IBM 3705
Advance Communication Function for NCP, SY30-3029.
START
056
This page intentionally left blank
(
(
(
(' c
(
(
(
(
(
(
c (
(
2. To determine the status, sense or other
error data associated with the error.
3. If a trend is present in multiple addresses.
HOST PROCESSOR CONSOLE ERROR
MESSAGES
Host Processor Console Error Messages may be
helpful in time stamping and determining the
cause of a suspected failure in the 3705.
The console error messages should be correlated
with EREP records and customer reports to
pinpoint failure times and causes.
Analyze the error message to determine:
1. 11 the address reported is on the suspected
3705.
Examples of error messages:
TCAM
IEAOOOI 56E,DCK,01 ,0600,OS0006000001 ,TCAM ,OS.35.30
11
Gee CD
VTAM
e
0
I EAOOOI 035,TOT,02,OE40,01 OO,OA**4040 DPPOODPP ,OS.00.13
HASP-JES2
02.4S.22
oeee.
Il
0
$HASP094 I/O ERROR ON LINE S
G
e
657,02.0EOO,0161,A661
08 CD e
where:
•
o
•
e
G
o
= Control Unit Address
= Error Description
= Command Code
= CSW Status
= Sense Byte
=Time
START
060
This page intentionally left blank
(
(
(
(
COMMAND CODES
(
c
(
(
(
(
«
(
NCP Channel Commands
NSC Commands
Command
Code
Command
Description
Command
Codes
Command
Description
X'01'
Write
00
Test 110
Hardware Presents the current status
of the NSC.
The Write command is initiated to the
NCP. Data in the CPU main storage is
transferred to the NCP.
X'02'
Read
The Read command is initiated at the
NCP. Data at controller storage is
transferred to CPU main storage.
X'03'
No-Op
This command is required as the last
CCW in a Read or Write CCW chain.
X'04'
Sense
The host initiates this command. One
byte of sense data is transferred to the
host.
X'09'
Write
Break
The Write Break command is identical
to the Write command except that it is
used to indicate that it is the last or
only Write command in a chain of
Write CCWs.
Write
Start 0
This is the first command expected in
Write Channel program after IPL of the
NCP. It is also expected after each successful Write Start 1 command.
03
05
I/O NO-OP
Write IPL
Immediate initial status of CE/DE is
presented by the hardware if the CA
is free of commands.
Hardware accepts the command,
returns status of '00' and causes a CA
L3 interrupt. Control program is
loaded into storage.
EP Command Codes
X'31'
S/360and
S/370
Command
00
01
02
03
12
05
13
17
1B
1F
10
04
15
06
41
09
OA
19
42
00
OE
2F
27
29
1E
23
Test I/O
Write
Read
I/O No-Op
Diagnostic Read
Diagnostic Write
Set Address Zero
Set Address One
Set Address Two
Set Address Three
Diagnostic Poll
Sense
Wrap
Prepare
Write Break
Poll
Inhibit
Poll SOH
Read Clear
Break
Search
Disable
Enable
Dial
Address Prepare
Set Mode
X'32'
Read
Start 0
This is the first command expected in
the Read Channel program after IPL of
the NCP. It is also expected after each
sL'ccessful Read Start 1 command.
X'51'
Write
Start 1
This is the second command expected
in the Write Channel program after IPL
of the NCP. It is also expected after
each successful Write Start 0 command.
X'52'
Read
Start 1
This is the second command expected
in the Read Channel program after IPL
of the NCP. It is also expected after
each successful Read Start 0 command.
X '93'
Reset
Restart
This command causes the NCP to reset
its switches to indicate that the last
Write Start and Read Start commands
were Write Start 1 and Read Start 1.
Notes:
1. Data transfer does not occur on Read Start and Write Start
commands.
2. See IBM 3705-80 Communications Contro/(er Principles of
Operation, GC30-3074, for a description of the operation of
the Test I/O X '00' and Write IPL X'05' channel commands.
(
(
(
(
(.
«
(
(
(
(
(
Sense Bit Definitions
Bit 0 - Command Reject. This bit indicated that the channel command presented to the channel adapter is
not a valid command for a particluar subchannel
address or not valid for the NSC address.
Bit 1 - Intervention Required. This bit indicated that programming errors were detected by either the CA,
the CCU, or the 3705 control program. CA hard·
ware sets this bit when the CA is executing a channel Read, Write, or Write Break command.
Bit 2 - Bus Out Check. This bit indicated a parity check
was detected on the I/O channel bus out during
the initial selection command byte transfer or
during host processor to 3705 data transfer.
Bit 3 - Equipment Check. This bit indicates that an internal hardware check or a parity check is detected
during a data transfer between the CCU and the
channel adapter.
Bit 4 - Data check.
Bit 5 - Not used.
Bit 6 - This bit indicated that the CCU is not initialized.
The host CPU is expected to respond to this bit
with a Write IPL command.
Bit 7 - Abort. This bit indicated that the 3705 control
program has terminated its channel operation in
and abnormal manner.
Note:
Refer to START 062-064 for the sense
bit definitions that are program
independent.
Sense Command Ending Status
Ending status can be presented to the channel in one of
three combinations:
1. CE, DE presented together - normal operation.
2. Split CE, DE, (that is, not together).
3. CE, DE, and UC, - occurs when interface disconnect is
received during a Sense command.
START
061
(
START
SENSE INFORMATION
The following tables summarize sense information that the
Emulation Program can present to the host processor. The
Emulation Program maintains this information for each line
in the CCBSENSE byte of the CCB.
All Start-8top
Tennina/s except
Command
CCBSENSE
DIAL
Bit 0 Command Reject
1 Intervention Required
2 Bus Out Parity Check
3 Equipment Check
4 Data Check
5 Overrun
6 Lost Data
7 Time-out Complete
For further details on sense information, see IBM
Table 1 lists sense information by bit for start-stop
terminals. Start-stop terminals are broken down into four
general classifications: 1) all start~stop terminals except,
2) 1030,3) TTY 33/35, and 4) TTY 83B2/B3 and
'WU115A. Table 2 lists sense information by bit for BSC
terminals, all of which are treated alike.
Command
The sense-byte bit designation are:
3705-80 Communications Controller Principles
of Operation, GC30-3074.
1030
TTY 8382/83 and
WU115A
TTY 33/35
Bit a-Command Reject
All Start-8top
Tennina/s except
1. Auto call unit
power off.
2. No auto call
unit attached.
SEARCH··
1. Line not enabled_
2. Space for over 1 character time.
N/A
2741 with break: Same as Write 1,2,3, & 4. Line not enabled: same as Write 1,2,3, & 4.
ENABLE
For non-switched lines, Data Set Ready does not rise after a one-second time-out.
Bit 2-Bus-Qut Parity Check
Any command
associated with this
transfer of data
Wrong bus-out parity when output data (from the channell is being presented.
Any valid or
invalid command
Wrong bus-out parity during initial selection.
Bit 3-Equipment Check
All commands
POLL
Command invalid for these terminals.
DIAL
No auto call feature
installed.
ADPREP
Commands invalid for all start-stop terminals.
NIA
BREAK·
Command invalid for these terminals.
BREAK
1. Auto call unit
power off.
2. No auto call
unit attached.
N/A
Command invalid for all start-stop terminals.
SEARCH
TTY 8382/83 and
WU115A
TTY 33/36
1030
062
1. An active command is being executed, and a new command is issued for that line.
2. A check condition that does not cause a hard stop 11/0 check, adapter check, or address exception)
is detected in the controller and is associated with a particular line or line group.
ENABLE
Command invalid
for this terminal.
No auto call feature
installed.
Command invalid for
this terminal.
DISABLE
A feedback check occurs.
DIAL
1. A call request fails to turn On or off.
2. An auto call or feedback check occurs.
SET MODE
Bit 4-Data Check
INVALID
COMMAND
Command invalid for all start-stop terminals.
WRAP
1. Line in transparent wait mode.
2. Previous WRAP still in progress.
3. Line is defined as wrap line.
All commands except
TIO, I/O, NO-OP and "
SENSE
WRITE
READ
INHIBIT
1. Panel test is active on the line.
2. MSLA line is currently being used by
anothersubchannel.
Bit 1-lntervention Required
WRITE*
1,:
2.
3.
4.
5.
PREPARE
READ**
1
POLL
Data set power off.
Data set ON HOOK.****
Data set not in data mode.
Line not enabled.
Break signal received (applicable for all start-stop devices
except 2848/2845).
Line not enabled.
VRCcheck.
1. Line not enabled.
2. Space for over 1 character
time.
1. Same as Write 1,2,3, & 4.
2 . Space for over 1 character time.
1. Same as Write 1,2,3, & 4
2. Space for over 1 character time.
WRAP
DIAGWRITE
Echo check.
1. VRCcheck.
2. LRCcheck.
3.
response to a
text message
4. Li ne at space at
stop-bit time.
1. VRC check.
2.
response to a
text message
3. Line at space
at stop-bit time.
1. VRCcheck.
2. Line at space at
stop-bit time.
3. Response received
is other than
or@
4. Echo check, if
telegraph feature
is installed.
1. VRCcheck.
2. Line space at
stop-bit time.
3. Response received
is other than
or@
N/A
VRCcheck
VRCcheck
N/A
N/A
®
®
®
INHIBIT**
POLL*
1. VRC check.
2. Echo checks, if
telegraph feature
is installed.
®
Line space at stop-bit time.
SEARCH
NIA
Line at space at bit time.
BREAK
N/A
Echo check.
N/A
Table 1. Sense Bit Information-Start-Stop Terminals (Part 1 of 3)
DIAG READ
Same as Read l' & 4
Same as Read 1 & 3
Same as Read
Table 1. ,Sense Bit Information-Stert-Stop Terminals (Part 2 of 3)
"'"
'-
/
~
)
'-
~"
-"',
"
.'"",
I
'-
/
'-.
./
./
'-
,/
(
./
j
./
,-./
'-./
'\
r
r
r
'-...
",.--",
'- ;J
!
,/
-----------
(,' (
(-: (/
Command
(-/ (
All Start-5top
Terminals except
(-
(
(
1030
(
(~
--"--------
(-- (-
(
------
..
(,-'- (
_-
-----
(/ (
-------
(
(
(
-----
(
(
(
(
(
f-
(_/
(-'-- (--
(--
(
(/
TTY 8382/83 and
WU115A
TTY 33/35
Bit 5-Qverrun
READ
INHIBIT
Set during a receive operation if data service for one buffer is not honored by the ICP before the
next buffer has been filled.
Bit 6-Lost Data
READ
INHIBIT
DIAG READ
1.
2.
3.
4.
Data service request is on when Read is issued.
Receiving bit is on when Halt I/O is issued.
Data service request is on when Halt I/O is issued.
Channel issues Stop during read service operations.
SEARCH
DIAL
PREPARE POLL
1. Receiving bit is on when
Halt I/O is issued.
2. Receiving bit is on when
search command is issued.
3. Data Service request is on
when Halt I/O is issued.
4. Channel issues Stop during
a read service operation.
N/A
The data set is OFF
HOOK*** Data Set
Ready or Present
Next Digit is on before
Call Request is set.
The data set is OFF
HOOK*** Data Set
Ready or Present
Next Digit is on before
Call Request is set.
N/A
Receiving bit is on when Halt I/O is issued.
N/A
N/A
Bit 7-Time-out
READ
1. No character is received within 3 seconds in
control mode (awaiting response to selection
or polling).
2. No character is received for 25.6 seconds
when in text mode.
A 25.6 second time
lapse occurs between
characters.
DIAL
Abandon Call and
Retry is returned from
an auto call unit.
Abandon Call and
Retry is returned from
an auto call unit.
PREPARE
N/A
1. First character is not
received within 2 seconds
when the Receiving bit
is off.
2. A 25.6 second time lapse
occurs between characters
when the Receiving bit
is on.
N/A
Open line (continuous space) for 25.6 seconds
SEARCH
Same as Read
N/A
POLL
No characters received within three seconds in
poll mode (awaiting response to polling)
DISABLE
On a switched network,
Data Set Ready does
not go off within 25.6
seconds after Disable
is issued.
N/A
N/A
On a switched network,
Data Set Ready does
not go off within 25.6
seconds after Disable
is issued.
INHIBIT
No response within three seconds for an initial character.
Any Transmit
except WRAP
Line does not become transmit operational within 25.5 seconds.
N/A
*Line does not become Transmit Operational within 25.5 seconds.
·*Line does not become Receive Operational within time-out period specified.
"'·OFF HOOK means that Data Set Ready is set before all dial digits are presented.
·"'*Communication line connection is broken on a dial line.
Table 1. Sense Bit Information-Start-8top Terminals (Part 3 of 3)
START
063
C
This page intentionally left blank
/~
" -'
"
)
(
'--
"''.
)
;C""}.,.
",-j
/<
"\
I
'--
/
.~~
/~
,Ii
I
'----_.J;/
",j
;"
\,.
(~"'c
\
/
'"
' ly
,/ "\,
,~
,-, )
,--j
'--
/
"'-
/
(
'"
/
- "-,
/'
r
\
'----,/
"-
'-
"-
(-
(
(:- (
Command
(
-
-------
-~-.--
(
(
(
(-
(
(
(
(
Binary Synchronous Lines
(
(
(
,
(
(
(-
(
Command
(
--------"
(,
--
---
-
(:
(
PREPARE
READ, SEARCH, or
POLL (receive
READ
SEARCH
Line in transparent wait mode, or no auto call feature installed.
BREAK
CLEAR
INHIBIT
DIAL
Command invalid for BSC.
DIAGWRITE
WRITE
1. Line in transparent wait mode.
READ
2. No station selection capabilities on this line.
3. Line disabled.
Any other command
Command invalid for BSC.
WRITE
Line disabled.
WRITE*
READ"*
SEARCH""
ADD PREP"*
1. Panel test is active on the line.
2. MSLA line is currently being used by another
subchannel.
1.
2.
3.
4.
SEARCH
The data set is OFF HOOK*** on the addressed line.
1. Search follows Poll, and Poll command receives no response within three seconds.
Character Sequences
DLE-STX, DLE-STX
SYN, SYN, NON-8YN (if not in transparent mode)
DLE-SYN, NON-DLE (if in transparent mode)
Data set not in data mode.
1. Auto call unit power off.
2. No auto call unit attached.
3. Data Line Occupied when Dial command is issued.
1. Read follows Poll, and Poll command receives no response within 3 seconds.
Characters
ENO, ACK, NAK, EOT, SOH, or STX.
Data set not attached to Emulation Program.
5. Set immediately upon fall of clear to send.
No Write is received within three seconds when in transparent wait mode.
mode or within 3 seconds while in text mode or transparent mode.
Dataset ON HOOK."**"
Bit 2 - Bus-Out Parity Check
Any valid or invalid
command
the CCB data buffers and PDF.
2. The Emulation Program is still receiving from a terminal when Halt I/O is issued to that line.
3. All buffered characters have not been sent to the host processor when Halt I/O is received for that line.
4. A channel stop is indicated by the channel before all characters have been transmitted to the host processor.
2. None of the following characters or character sequences is received within one second while in control
Data set power off.
PREPARE
DIAL
1. The command is issued to a line which has already received more characters than can be contained in
Character Sequences
DLE-STX, DLE-STX.
SYN, SYN, NON-SYN (if not in transparent mode)
DLE-SYN, NON-DLE (if in transparent mode)
Bit 1 - Intervention Required
POLL*
(/ (
Characters
ENO, ACK, NAK, EOT, SOH, or STX.
1. Line in transparent wait mode.
2. Previous WRAP still in progress.
3. Line is defined as wrap line.
All commands except
TIO, I/O, NO-OP
and SENSE
(
2. None of the following characters or character sequences is received within three seconds:
AD PREP
WRAP
(
Bit 7 - Timeout Complete
DIAG READ
SEARCH
(-~
Bit 6 - Lost Data
Line in transparent wait mode.
SET MODE
DIAL
(/ (-,
Data service is not honored by the Emulation Program before the next character is received. Set during a
receive operation if data service for one buffer is not honored by the ICP before the next buffer has been filled.
ENABLE
DISABLE
(-~-'
Bit 5 - Overrun
READ
Line in transparent wait mode or disabled
("
--
Binary Synchronous Lines
Bit 0 - Command REJECT
POLL
(
-
DIAL
The auto call unit returns ACR (Abandon Call and Retry).
DISABLE
The switched network data set does not go OFF HOOK*** within three seconds.
"Line does not become Transmit Operational within 25.5 seconds.
**Line does not become Receive Operational within three seconds.
""OFF HOOK means that Data Slit Ready is set before all dial digits are presented.
" .... Communication line connection is broken on a dial line.
Wrong bus-out parity during initial selection, data transfers, or status presentation.
Table 2. Sense Bit Information-BSC Terminals (Part 2 of 2)
Bit 3 - Equipment Check
All Commands
A scanner check occurs. Equipment check is presented on all affected lines.
ENABLE
DISABLE
A set mode operation (PCF set to X'1') did not complete because of an
oscillator failure.
DIAL
1. Call request fails to turn on or off.
2." An aut,o call or line interface transfer check occurs.
Bit 4 - Data Check
READ
1. CRC or LRC non-compare.
2. VRC error for USASCII code.
3. Incorrect control character sequence in transparent mode (DLE followed by other than
DLE, SYN, ETX, ETB, ENO, or ITB).
SEARCH'
AD PREP
POLL (rcv)
VRC error for USASel1 code.
Table 2. Sense Bit Information-BSC Terminals (Part 1 of 2)
START
064
START
LINE FAILURE ANALYSIS
From
START 005
Have Customer Print
Out EREP. Continue
with Problem Analysis
• Press Stop on 3705.
• Set Mode Switch to
Instruction Step.
'. Set Display/Function
Select Switch to TAR
and Op Register.
Ves
Ves
The 3705 may
be in an
instruction loop
~--------ToSTART010
To START 072
To START 071
Ves
Dynamically Display
Direct Addressable
Storage & Check
Record Pool
Refer to START 045
NCP
Dynamically Display
EP
EP Error Log.
~...;;;,;.--~ Refer to START 040
(Type 1 CAlor
START 041 (Type 4 CAl
No
~';';';'--Possible
Ref to Non IBM Control
Program Documentation
for Problem
Determ ination
Host Problem
Note 1: Verify:
1. Host CPU operational
2. Host Channel operational
3. Host Application
Program operational
Ves
~------ToSTART060
I
"
('
,070
(
(
(
«
(
(
(
(
(
(
(
(
(
«
(
(
(
(
(
(--
«
(
(
From
START
070
INPUT X'74'
Record Contents of
Display A and Blights
Gen Reg (R)
BYTE X,
BIT4
BIT5
BIT6
BIT7
BYTE 0,
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT 7
Execute Input 74
Record LAR
LAGGING ADDRESS REGISTER (LAR)
Reg/Function (E)
LAR BYTE X,
BIT 4 }
BIT5
BIT 6 }
BIT7
LAR BYTE 0,
BITO
BIT 1
BIT2
BIT 3
BIT4
BIT5
BIT6
BIT7
Yes
INPUT X'79'
CCU CHECK REGISTER
INPUT X'7D'
Execute Input 70
Record Value
Check for any CCU checks
Gen Reg (R)
BITO
BYTE 0,
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT 6
BIT7
Gen Reg (R)
BITO
BYTE 0,
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
Cycle Counter Check
0
0
0
0
0= No CCU Checks; 1-CCU Check!s)
TYPE 2 Attach Base Clock Check
CCU Clock Check
To
START 072
LAR BYTE 1, BIT 0
BYTE 1, BIT 0
BIT 1
BIT 1
BIT2
BIT2
BIT3
BIT 3
BIT4
BIT4
BIT5
BIT5
BIT6
BIT6
BIT 7
BIT7
EA = Extended Addressing
UTILITY
Reg /Function (E)
Program Level 2 Interrupted (note)
BYTE 1, BITO
0
Prog Level 3 Interrupted (note)
BIT 1
0
Prog Level 4 Interrupted (note)
BIT2
0
Prog Level 5 I nterrupted (note)
BIT 3
0
FET memory
BIT4
0
BIT5
o
0
BIT6
o
Prog Level 5 C Condition
IPL Escape Control
BIT7
Prog Level 5 Z Condition
Note: This bir-O if not Level 1 or if entered immediately
after exiting Level 1.
Reg/Function (E)
0
0
0
0
0
0
0
0
BITO
BIT 1
BIT2
BIT 3
BIT4
BIT5
BIT6
BIT 7
Note: Prog Check
BYTE 1,
Address Compare Interrupt L 1
Address Exception (note)
In/Out Check (note)
Protection Check (note)
Invalid Op Check (note)
0
IPL L1
0
ADAPTER LEVEL 1 INTERRUPT REQUESTS
INPUT X'76'
Execute Input 76
Record Value
Check for any Adapter Level 1
Interrupts
BYTE 1,
Gen Reg (R)
BIT 0
BYTE 0,
BIT 1
BIT2
BIT 3
BIT4
BIT5
BIT6
BIT7
with 18 or 20-bit EA
CCU LEVEL 1 INTERRUPT REQUESTS
INPUT X'7E'
Execute Input 7E
Record Value
Check for any CCU Level 1
Interrupts
Reg/Function (E)
Byte X Check
Byte 0 Check
Byte 1 Check
Program Check in Level 1
SAR Check
SDR Check
OP Reg Check
INDATA Bus Check
Execute Input 79
Record Value
Check for Program Level
Interrupted
with 20-bit EA only
Gen Reg (R)
BYTE 0,
BIT 0
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
Reg/Function (E)
Type 4 CA L1
Type 2 Scan-1 L1
BYTE 1,
0
0
0
Type 1 CA, or Selected
Type 4 CA L1
0
Remote Program Loader L 1 Request
BITO
BIT 1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
0
0
0
0
0
0
0
0
START
071
(
START
LINE FAILURE ANALYSIS (Cont.)
From
START 070
Reference
Interrupt
~
__________
~~
Ves
Type 1/4 CA Lavel 1 START 030
CS2 Lavel 1
START 030
RPL Lavel1
START 030
Stored By ROS If
a CCU Error Has
Caused an Automatic
Reload of the ROS
__________- J Program
DllPlev ROS Direct Addrell8ble Storage
X'0702' • Input 76
X'0704' • Input 70
X'0706' • Input 7E
Verify HOlt
Application Pgm
Utilizing tha Failing
Une(l) II Running
Multiple or Single
Une Failures
(Note 21
Ves
No
072
Dynamically Display
Direct Addrell8ble
Storage & Check
Record Pool.
Refer To Start 045.
Ves
Dynemically Display
EP Error Log.
">_E_P_-I Refer to START 040
NCP
Refer to NonI BM Control Program
Documentation for
Problem Datermlnation
(Type 1 CAlor
START 041 (Type 4
CAl
Holt Application
Program Problem
Note 2: Single line failures- probable 3706 hllTdwtlre CIIU8II8:
t. Line set card
2. 3705 to modem cable
Ves
Ves
Analyze Data
Console Error Msg.
Run Diagnostics
Refer to START 020
Have Customer
RELOAD 3705
Control Program
and Restart
Schedule 3705 for
Diagnostics or Repair
Action
All DiagnOltlcs are
on RPL DI.kette
Refer to:
RPL Dlag.
To START 060
START 100
Check Erep for
Error Message(s)
Analyze all Data
and Take Appropriate
Repair Action
Note 1: Intermittent errors may be found by running diagnostics under
billS. The -4 volts should be biased in Increments of. t volts plus and
min"" not to exceed to'JfJ (3.6-4.4), while running all diagnostics. If by
referring to the NCP check record pool (CRP) or the .EP error log, the
error is with e specific adapter, the particular section for that adapter
should be looped using the above biasing procedure. A Digitec meter or
equivalent should be used forbiasing the machine. Restore the -4 volts
to its proper setting upon completion of testing.
/,.~
"
_/
-.
(
~,
.'"
("''',
/
,,-,j
I
"
r
r"",
I
"-
;/
To START 100
"~
.. /
(~
.~
I
"
;/
'--/
\.....j
r""'
"
;/
.~
.~
,/
~
'
..
"'~ _/
"-.
;/
"-
I
«~
;/
(
'''-- ."
'\
/
!"..-~ .....
"----_/
.~)
.cJ/
/~
""j
j
(/
(
(
(
(
(
EC AND MES INSTALLATION
The installation of ECs and MESs must be
coordinated with the customer to minimize
impact on the network environment.
Use the steps that follow:
1. Read the instructions.
2. Inventory the EC/MES to ensure all parts
have been received.
3. Check early warning microfiche for:
A.B/M tips
B. Hardware tips
C. OLTs tips
4. Check prereqs and concurrents for:
5.
6.
7.
8.
9.
10.
(
(
(' (
(
(
(
(
(
(
(
('/
('
(j (
-'.,
(
(
A. Hardware configuration and EC levels
B. Diagnostic level
C. 3705 NCP or EP program PTFI APAR level
D. Operating system level
Review Ec/MES with customer.
Schedule time for installation.
Ensure CDS is proper and run all diagnostics
prior to installing EC/MES.
Install EC/MES.
Reconfigure CDS (if required) and run all
diagnostics to verify correct operation.
Have customer load his control program and
verify correct operation.
START
080
START
I CC CHECK ANALYSIS FLOWCHART ( See Note 3)
Program Stop
Hard Stop and
Wait Light On
Invalid Operation Codes
Display Op Reg. It
Contains Input or
Output Instruction
causing error, see
CTR L PN L section
in Vol. 2
Yes
Perform Lamp Test
Yes
Yes
Cycle Counter Error
ABCD or TO-3 Counter
Error CSB Clock Error.
See CCU Section in Vol. 2.
Byte 0
Note: Contents SAR 1
Cycle" 1, 12, or 13).
IAR for Level 1. Refer
to: Instruction
Decoding and
Operations Charts to
Further Define Error,
see CCU section in
Vol. 3.
Yes
No
Operation Register
To Define Failure, Note
Contents of SAR, and
Storage Key for that
Area
Yes
0
1 2
0
0
X X X 0
X X X 0
Byte 1
3 4 5 6
7
0
1 2
X X X
X X X
0
0
0
0 X X X 0 X X X
1 0 1 1 1 0 0 1
0
0
1 1 X 0 0 0 0
1 0 0 0 0 0 0
1 0
1 0
1 1 1 0 1 X
1 1 1 1 X X
0
0
1 0 0 0 0 0 0
1 0 0 0 0 0 0
1 0
1 0
1 1 1 X X X
1 1 1 X X X
0
0
1 0 0 0 0 0 1
1 0 0 0 0 1 X
1 0
1 0
1 1
1 1
1 X X X
1 X X X
0
0
1 1 0 0 0 X X
X X 1 X X X X
1 0
1 0
1
1
X X X
X X X
0
0
X X 0
X X 0
1 0 X X
X 1 X X
}
3705-1
1 0
1 0
1 1 1 X X X
1 1 1 X X X
0
0
1 X 0
1 X 0
X 1 X X
1 X X X
}
3705-11
1 1
1 1
3 4 5 6
X 0
1 0
0
0
7
0 0
1 0 0 0 0
X = Don't Care
Yes
Display Op Reg. It
contains Failing
Instruction. Check for
Invalid Op comparing
with Invalid Op Code
Chart. If Invalid,
Display TAR then use
that address minus 2
to do the Storage
Control Panel Test.
If Op Reg is valid,
suspect Instruction
Decode Failure on
Yes (See Note 1 )
The In/Out check,
address exception,
and Invalid Op latches
are reset if a re-IPL
was forced. The CC
check indicator is not
reset.
To 091
Storage Byte 0, SDR
Byte X or 0, or Data
Path Failed (See Note 2)
CDXXX.
Note 3: If errors occurred during a
power on sequence, verify that ROS
has loaded properly, using the ROS
listings in Vol. A42. If ROS has not
loaded, refer to 6-960 for IPL problem
determination.
Note 1: An SDR 0 + 1 error with the
'double bit error' diagnostic LED on
(refer to Volume 2, 7-220) indicates
a storage problem (refer to the Memory
MAPs in Volume 2,7-260).
SDR Byte 1, Data
Path, or Storage
Failed (See Note 2)
Note 2: Op Reg contains Op Code
being executed. Data to SDR can be
determined by the use of the Op Code,
the current I cycle (It, 12, or 13 Latch
Set), and the instRlction decode and
operation charts.
To 091
"
"
. /,1
"
"-
'I,
,/
,...
,.....''''\
/.
\
..../
- j"
,
."""
,/
/--.."
\
~/
r~
(~\
"'--;/
'-)
\
I
\
'-~
(~'.
"'-
/
' ...
,/
'A~)
(
\...j
'''-.._.y'
,/
('
...
,j
090
(
(/
(/
(
(
(
(
(
(
(
(
(
(
(
('
(-/
(~
CC CHECK ANALYSIS FLOWCHART (PART 2)
From 090
See Data Path Test
Procedures in CTRL
PN L section of Vol. 2.
Yes
Yes
No
No
Yes
SAR Byte 1 or
Data to SAR
(See Note 1)
Yes
SAR Byte 0 or
Data to SAR
(See Note 1)
Yes
From 090
Yes
No
Yes
Yes
Yes
Yes (See Note 2)
SAR Byte 1 or
Data to SAR
(See Note 1)
Note 1: Data to SAR can be determined by using the current
J cycle (/t, 12, or 13 latch set), JAR or TAR as applicable,
and instruction decode and operations charts. See CCU
section in Vol. 2.
No
Yes
Op Reg Byte 0
or Storage Failed
ALU, A Reg, or
B Reg Error; or
Error in Data to
them
Current I cycle (11,
12, or 13 Latch Set)
if more than one I
Cycle Instruction is
applicable
Data to ALU, A Reg, or
B Reg Source can be
determined by the use
of Instruction Decode
and Operations Charts
for the Op Code being
executed
These conditions
should not occur.
The possibilities that
caused them are:
1. Failure in the
Display Circuit to
indicate.
2. Error Circuit failure.
3. Electrical noise.
External Register
loaded by Input
Instruction with Bad
Parity in the indicated
. byte. Op Reg contains
Input Instruction
Suggestions: Verify
setting of Check Reg
(Byte X, 0, or 1 Error
Latch 'On' but not
indicated).
Try to get another
failure. It may give
a more specific
indication
Record information
suggested for type
of Error indicated
>-Y_e_s_ _.... Op Reg Byte 1
or Storage Failed
Diagnostics
Note 2: An 'OP Reg 0 + "chk with the 'double bit error'
diagnostic LED (see Volume 2, 7-220J indicates that a
store operation was attempted into a location with a
double bit error (refer to the Memory MAPs in Volume
2,7-260J.
Check this information
with the instruction
Decode and Operations
Charts lif applicable
to type of failure)
Place the Diagnostic
Control Switch in the
Bypass CC Check Stop
Position and Rerun
Emulation or
Network Control
Program
Place the Diagnostic
Control Switch in the
CC Check Hard Stop
Position and Rerun
START
091
c
This page intentionally left blank
/'
"-
,,
/
f
(
'>.
\
/'
'~'.""":>.,\
,
/'
(
,
j
j
-./
'-----//
~~~
'~'\
,
"'-J
,--~j
"
/
-
~
~/
I
'"
_. .--/
\..
i
./
,/
\~-
('
,/''''-'
,r-~,""
j/
i"",
J
/.
{/ (
(-
(:~
(
(
(
(
(
(
(
(
c
(
(
(
{
(
(
(
(
(~
f
EREP
The EREP on-line utility program performs three
basic functions for the 3705 controller:
1.
EREP prints detailed, time-stamped error
records of:
A. Channel errors (NCP and EP)
B. Unit check records (NCP and EP)
C. MOR records (NCP)
2. EREP summarizes the statistical data
generated by the subsystem.
3. EREP provides trend reporting to aid in
network maintenance.
The following pages in this section contain
sample records:
START
START
101
102
-
START
103-105
-
START
START
106
107
-
START
108-110
-
START
111
-
START
112
-
START
113-114
-
EREP should be analyzed:
1. At the time of a reported failure
2. When intermittent failures occur
3. When reviewing account data for network
management _
Procedures for obtaining EREP printouts vary by
account.
Refer to S370 FE EREP Reference Guide
(S229-3224) and Account Procedures to obtain
EREP data.
The EREP 3705 records should be correlated with
console error messages and customer reports to
pinpoint failure times and causes.
-
Unit check record
BSC/ SS Permanent Line
Error
BSC/SS Permanent Line
Error MOR decoding
Station Statistics
Permanent SOLC Link
Error
Permanent SOLC Line
Error MOR decoding
Permanent SOLC
Station Error
Type 2 Communication
Scanner Error
MOR Summary
Note: All record types are not shown.
Additional edited MOR records will contain data
similar to that shown in the examples.
For unedited EREP records or additional
information on MOR records not shown, see the
M DR record formats on page START 053.
START
100
This page intentionally left blank
'. -)
."',
"',
.~
\,
'..
/
/
... j
~.
/
/
,/
,J
(~
"--j
.
/"-.\
'
'"
.
/
'~
)
(!' ~,
/
\... ./
.
\..,
./
j
)
I"~
..
/
'--
.. "
(
(
'.
.r-,,\
~
"
'''--...../
",,-'- "
,~~
(
(
(
(
(
(
(
(
(
(
(
---RECORD· ENTRY TYPE - UNIT CHECK
SOURCE - OUTBOARD
HODEL- 145
SERIAL NO.
123456
OS/VS REL X
DAY YEAR
DATE- 103 XX
BYTE 0
06
CMND REJ
INTV REQD
BUS C CHK
EQUIP CHK
DATA CHK
OVERRUN
RECEIVING
TIME OUT
0
0
0
0
0
1
1
0
(
(
(-
{
(
K
CA
US CS CT
CSW FO 03EFF8 OE 00 0008
PRGM-CTLD TRPT
INCORRECT LENGTH
PROGRAM CHECK
PROTECTION CHECK
CHAN DATA CHECK
CHAN CTL CHECK
I/F CTL CHECK
CHAINING CHECK
STATISTICAL DATA
TEMPY READS
INTRVN REQD
EQUIP CHK
LOST DATA
NOT USED
NOT USED
NOT USED
NOT USED
0
0
0
0
0
0
0
0
000
000
000
000
000
000
000
000
•
STATISTICAL DATA
TEMPY WRITES
BUS OUT CHK
OVERRUN
TIME OUT
NOT USED
NOT USED
NOT USED
CHAN DATA CHK
The EREP unit check records should be
correlated with console error messages and
customer reports to pinpoint failure times and
causes.
1. Determine if the channel unit address. is
the NSC (native subchannel) or ESC
(emulation subchannel) address.
2. Determine the device type G (3705 or
emulated device)
3. Check the CCW for the command code.
(see page START 061) .
(~
(
e
4. Check the channel status
and/ or unit
status G for error indications.
5. Check the sense byte 0:
NSC
=
Use Type 1/4 CA sense bit
definition (see page START 061)
ESC
=
Determine terminal type
e
For Start/Stop (see page START
062)
For BSC (see page START 064)
48
Note 1: Statistical data
is accumulated in the access
method (program counters).
015
015
015
015
006
006
006
006
Ct
HEX DUMP OF RECORD
HEADER
30550800
0018
0038
(/ (
To analyze a unit check record:
CD
CHANNEL STATUS.
0
0
0
0
1
1
1
0
JOB IDENTITY ABCDEFGH
C1C2C3C4 C5C6C7C8
e
FL
C1
CA
004000 40 00 0088
ATTENTION
STATUS 140DIFIER
CONTROL UNIT EN'D
BUSY
CHANNEL END
DEVICE END
UNIT CHECK
UNIT EXCEPTION
SENSE BYTE DATA
HH MM SS.TH
TIME- 08 09 10 11
2703
000B8 "
0000008
IBM TERM I
1050
DEVICE TYPE
PRIMARY
CHANNEL UNIT ADDRESS
ALTERNATE CHANNEL UNIT ADDRESS
COMMUNICATION ADAPTER TYPE
TERMINAL TYPE
UNIT STATUS.
(
EREP UNIT CHECK RECORD
EREP - UNIT CHECK RECORD
FAILING CCW
(
01020304
00000003
00000000
0071103F
08091011
00123456
01300000
05060708
OF OF OF OF
09004000
OFOFOFOF
40000088
06060606
F003EFF8
06060606
DEB00008
06060606
00000103
01004013
START
101
102
START
EREP - PERMANENT LINE ERROR MDR
---RECORD ENTRY TYPE - 3705 MDR
SOURCE - OUTBOARD
VS 2 REL.
03
DAY YEAR
HH MM SS.TH
DATE- 027
78
TIME 04 54 14 58
Recording Mode '00'
DEVICE TYPE
3705
CHANNEL UNIT ADDRESS 001B
RESOURCE I.D.
8801
The EREP MDR records should be correlated with console
error messages and customer reports to pinpoint failure
times and causes.
1.
2.
3.
4.
Verify the resource 1.0. •
.
,
Verify the 3705 channel unit address
Verify the LIB address • .
Check the lOB command
e. .
1(1)
10BCMAND
XOO'
X'10'
X'12'
X'16'
X'17'
X'19'
X'25'
X'27'
X'2S'
X'2A'
X'S3'
X'SD'
X'SF'
X'94'
X'9B'
X'AC'
tt
lOB COMMAND
8D •
lOB MODIFIERS
0000
lOB IMMED CTL CMMND 00
INITIAL ERROR STATUS 00
FIRST BYTE
EXTENDED ERR STAT FLG 0
FORMAT EXCEPTION FLAG 0
SYNC CHECK FLAG
0
DATA CHECK FLAG
0
PH
ER
0
AS
RO
0
I/O command field.
No I/O occurred.
Write initial.
Write continue.
Write recover.
Write delay.
Write.
Read.
Read delay.
Read initial.
Read continue.
Disable.
Enable.
Dial.
Write EOT.
Write control.
Read status.
E
R
0
LENGTH CHECK FLAG
SIO COUNTER 0000
0
INITIAL ERR EXT STAT 00
OVERRUN/UNDERRUN FLAG
LINE QUIET TIMEOUT FG
LEADING DLE FORMAT CH
SUB BLOCK ERROR FLAG
UNUSED
UNUSED
UNUSED
UNUSED
lOB
lOB
lOB
lOB
INITIAL ERROR STATUS
INITIAL ERR EXT STAT
STATUS
EXTENDED STATUS
LAST ERROR STATUS
06
FIRST BYTE
EXTENDED ERR STAT FLG 0
FORMAT EXCEPTION FLAG 0
SYNC CHECK FLAG
0
DATA CHECK FLAG
0
PH
ER
0
AS
RO
1
E
R
1
LENGTH CHECK FLAG
0
0
0
0
0
0
0
0
0
LAST ERR EXT STAT
00
OVERRUN/UNDERRUN FLAG
LINE QUIET TIMEOUT FG
LEADING DLE FORMAT CH
SUB BLOCK ERROR FLAG
UNUSED
UNUSED
UNUSED
UNUSED
0
0
0
0
0
0
0
0
001BD3D3
00000000
00
058AOOOO
0078027F
04541458
01060009
01680588
C5C1E2F7
00000000
F1D28801
00000000
00AO0005_
00000000
8DOOOOOO
00
......................:- -- ___ -...
-- --
****************END OF SAMPLE REPORT**************
................ ......
--
............
5. Utilize MDR data. and MDR decoding flow chart
(ref. START 103) to define error.
Note: If no match is found, or if further byte/bit
definition is required, refer to "Data Area Layouts"
in the IBM 3704 and 3705 Program Reference
Handbook (GY30-3012).
0000
00
•
06F4
00
TEMPORARY ERROR COUNTER 00
2770
HEX DUMP OF RECORD
HEADER
91830800
0018
0038
060009
ct
BASIC TRANSMISSION UNIT
·BTU COMMAND 00
BTU MODIFIER 00
BTU FLAGS
0000
G.
SERIAL NO.
022 •
LLEAS71K
LIB ADDR.
TERMINAL NAME
To analyze an MDR record with a recording mode of '00'
MODEL- 0168
MDR
"'-.-.... ........
06F40000
00000000
- -- - -- - -- ---- --- --- -- -- -- --- -- -----.....--
...
Record Format for Permanent Line Errors
........
LINE Interface
Address
4(4)
5(5)
BTU Command
(BCHCMD)*
BTU Flags
(BCHSFLAG)*
14(E)
12(C)
lOB Status
(lOBSTAT)*
20(14)
Temporary
Error Counter
(DVBSDRC)*
S(S)
6(6)
BTU Modifier
(BCHMOD)*
21(16)
2740 Graphic
Response Byte*·
lOB Modifiers
(lOBCMODS)*
17(11)
lOB Initial
Error Statu.
(lOBERST)*
18(12)
I/O Counter
(DVBSDRT)*
lOB
Il')ltlal Error
Extended Status
(lOBEREST)*
24(1S)
Device Type
(DVBTYPE)*
22(16)
Device Features
(DVBFEAT1)
ID~
11 (B)
lOB Immediate
Control
Command
(lOBIMCTL)*
9(9)
16(F)
Record
X'05'
Recording ***
Mode- X'OO'
lOB Command
(lOBCMAND)*
lOB
Extanded Statu.
(lOBEXTST)*
3(3)
2(2)
0(0)
(DVBFEAT2)
* Indicates the control block field from which this MDR record field iii loaded. (See "Data Area Layout" section for field definitions.)
**2740 graphic response byte is zeroed if not applicable.
"-Applies to BSC/SS devices as well as lines.
/
"
./
"
"
.J
/'"
,
..
j
./
"
j
("\
~j
..
'.
,~
'\
j
' '1
,j
(
./
\..
./
\...../
_/J
./
~
r"',.
/~-"'-
.~./
..~
.j
/--"',
,
/"
"',
..-/
(/
(
(
(
(
Recording Mode 00 and 80
lOB initial error status
lOB initial ERR EXT status
lOB status
lOB extended status
Check lOB initial
error status second
byte bits 0-6
0000
00
0000
00
(
(
(
( -"
(
(
/'
(
Chart A
PERMANENT BSC/SS LINE ERROR-MDR DECODING
EREP Field
(
*IOB
Field
*Byte
Expansion
10BERST
10BEREST
10BSTAT
10BEXTST
10BSTAT
10BEXTST
10BSTAT
10BEXTST
IOBERST
Second
Byte
Bits 0-6
Error
Probable Cause
Error Description
00,20
40,60
Timeout
Communications/
Secondary Failure
Timeout -Some character(s)
have been received.
04,24
44,64
Cutoff
Communications/
Secondary Failure
Cutoff - Control length
field was too long.
06,26
46,66
Abort
Communications/
Secondary Failure
Abort-Reply to transmitted
data was an ENQ.
08,28
48,68
Text in
Control
Mode
Communications/
Secondary Failure
Text received in control
mode. (No SOH, STX, or
Circle D)
0A,2A
4A,6A
DLE
Control
End
Communications/
Secondary Failure
DLE Control End -Undefined
or DLE and character
sequence was received.
0C,2C
4C,6C
Wrong ACK
Secondary Failure
Wrong ACK -Received wrong
ACK_
0E,2E
4E,6E
Negative
Ack
Communications/
Secondary Failure
Negative ACK - Negative
ACK was received.
10,30
50,70
Received
Sub-Block
Secondary
Received Sub-Block End Received sub-block has
ended before the end of
the transmission block.
lE,3E
5E,7E
Wack
Secondary Failure
Wack - Received wack.
80
Timeout
Communications/
Secondary Failure
Timeout - nothing received.
82
Command
Reject
Program Failure
Command Reject - Command
could not be carried out
because of specification
error.
84
Buffer
Depleted
' Program Failure
88
DLE/EOT
*3705 program handbook
No
Check lOB initial
ERR EXT STAT
bits 0, 1, 2, 3
If no
match is
found, then:
No
Check lOB initial
errorstatus first
byte bit 4 - decode
using Chart 0
START 105
Decode Using
10BERST Charts:
A-START 103
B& C-START
104
Check lOB initial
error status first
byte bits 1, 2, 3, 7
Yes
Decode using
Chart E
START 105
Check lOB status
second byte
No
Decode using
10BERST Charts
A,B,C
START 103-104
Fai lure
Secondary Failure
Buffer Depleted - Level 2 and
3 buffer pools depleted.
DLE/EOT - Received
disconnect signal.
Use timeout error
'00' on Chart A
START 103
START
103
START
Chart B
Chart C
10BERST
Second
Byte
Bits 0-6
Error
Probable Cause
Error Description
8A
Data Not
Expected
Communicationsl
Secondary Failure
Data Not Expected - Data
was received when it was
not expected.
8c
Reset
Program Fa i 1ure
Reset - Immediate XIO
command has caused the
current command to end
prematurely.
90
Transmit
Sub-block
End
Program Failure
Transmit Sub-Block End Sub-block being sent has
ended before the end of
the transmission block.
EOT Sent
After
Wack
92
''h
'" .;J
104
Secondary Failure
EOT Sent After Wack - The
command ended when EOT was
sent, after the Wack
reply was received.
94
Break In
Text
Communicationsl
Secondary Failure
Break in Text - Break was
received whi Ie receiving
text.
96
Po 11 Stop
Secondary
Failure
Poll Stop-Dev. was po lIed
to the polling limit
and responded negatively.
9A
Break In
Transmit
Secondary Failure
Break in transmit - Break
was received while in the
p'rocess of transmitting.
(normal operation)
9C
Disconnected
Host Program
Fai lure
Disconnected - Command
issued to a line that is
disabled.
E0
User
Error
Program Failure
User Error - Normally
indicates an incorrect NCP
generation. (MTA)
E4
Scanner
Check
Hardware Failure
Scanner Failure-Indicates
Level 1 Communication
Scanner Check occurred.
E8
Adapter
Check
Hardware Failure
Adapter Check Communications line adapter
check occurs when level 2
interrupt not received.
( .... \
"'-
!
~\
.r
.J
"
'",
r~
'-.
jI
"-)
/~
..Y
""'/
I
~)
F""
J
!
/"""",,\
./
...... /
Error
Probable Cause
Error Description
EA
Adapter
Feedback
Check
Hardware Failure
Adapter Feedback Check Communication adpt. feedback check has occurred.
EC
Equipment
Check
Hardware Failure
Equipment Check - Operation
ended because of a 370X
hardware failure.
F0
Modem
Error
Modem Interface
Fai lure
Modem Error - DSR or CTS
drops during command
operation.
F2
Modem
Clock
Error
Modem Interface
Fai lure
Modem Clock Error - When
in transmit mode and the
first character cannot be
transmitted.
F4
DSR - On
Check
Modem Interface
Failure
DRS-On Check - For leased
1 i nes, indicates DSR did
not come up within 3
seconds after DTR.·
F8
DSC - Off
Check
Modem Interface
Fai lure
DSR-Off Check - Indicates
DSR did not drop within 3
seconds of DTR dropping.
FC
ACU Check
Modem Interface
Fai lure
ACU Check - No response
from ACU.
FE
Program
Fai lure
Program Failure
Program Failure - A negative
data length was computed.
10BERST
Second
Byte
Bits 0-6
(
~"'\
I
,~/
r>~
"'-j
(~.
",-,.../
('.
'-,
\,
./
'~~
c-~
r
J
,.-J
",-j
"
.0
"'-
!
)'
(
(
'.
(
"".
F~'
"'~/
0
!"'-......-..
\.J
f
(j (
(
(
(
(
(
(
(
(
(
(
(
(
Chart D
IOBEREST
Bit
Error
IOBERST
first Byte
Probable Cause
Error Description
0=1
Underrun
4=1
Program/Hardware
Fai lure
Overrun
4=0
Program/Hardware
Fai lure
Under run Character transmitted
more than once.
Overrun - Receive
character overlayed.
1=1
Line Quiet
Timeout
N/A
Communications
Fai lure
Line quiet Timeout - Data still
being received
after block ends.
2=1
DLE Format
Exception
N/A
Secondary
Failure
DLE Format Exception - Inval id
DLE line control
sequence.
3=1
Sub-Block
Error Flag
N/A
Communications/
Secondary
Fai lure
Sub-block Error
Flag - Error
recovery failed
to retry a
recoverable error.
Chart E
IOBERST
First
Byte
Error
Probable Cause
Error Description
3=1
Data
Check
Communications
Fai lure
Data Check - Block check
character error.
1=1
Format
Exception
Secondary Fai lure
Format Exception - bad line
control sequence.
2=1
Sync
Check
Communications
Fai lure
Sync Check-Stop bit error
(start/stop only).
7=1
Length
Check
Host Program
Length Check - Ending
character detected before
count exhausted. (Transmit)
START
105
START
EREP - STATION STATISTICS MDR
The EREP MOR Records should be correlated
with console error messages and customer
reports to pinpoint failure times and causes.
Recording Mode '01'
---RECORD ENTRY TYPE - 3705 MDR
SOURCE - OUTBOARD
VB 2 REL.
03
DAY YEAR
HH MM SS.TH
DATE- 033
78
TIME 19 01 28 77
DEVICE TYPE
3705
CHANNEL UNIT ADDRESS 013
RESOURCE 1. D.
AO 0 4 •
LIB ADDR.
TERMINAL NAME
E
R
•
lOB COMMAND
00
0000
IOB MODIFIERS
IOB IMMED CTL CMMND 00
SIO COUNTER 03C6
OVERRUNjUNDERRUN FLAG
LINE QUIET TIMEOUT FG
~EADING DLE FORMAT CH
SUB BLOCK ERROR FLAG
UNUSED
UNUSED
UNUSED
UNUSED
0
TEMPORARY ERROR COUNTER 00
2770
HEX DUMP OF RECORD
HEADER
91830800
0018
0038
INITIAL ERR EXT STAT 00
0
LENGTH CHECK FLAG
001BC4C5
00001007
SERIAL NO.
060009
To analyze an MOR record with a recording mode
of '01':
e.
1.
2.
3.
4.
0020 •
DE2
INITIAL ERROR STATUS 00
FIRST BYTE
EXTENDED ERR STAT FLG 0
FOID1AT EXCEPTION FLAG 0
SYNC CHECK FLAG
0
DATA CHECK FLAG
0
PH
ER
0
AS
RO
0
MODEL- 0168
•
BASIC TRANS~USSION UNIT
BTU COMMAND 00
BTU MODIFIER 00
BTU FLAGS
0000
106
lOB
lOB
lOB
lOB
INITIAL ERROR STATUS
INITIAL ERR EXT STAT
STATUS
EXTENDED STATUS
LAST ERROR STATUS
00
FIRST BYTE
EXTENDED ERR STAT FLG 0
FORMAT EXCEPTION FLAG 0
SYNC CHECK FLAG
0
DATA CHECK FLAG
0
PH
ER
0
AS
RO
0
E
R
0
LENGTH CHECK FLAG
0
0
0
0
0
0
0
0
0
0000
00
0000
00
Verify the resource 10
Verify the channel unit address G.
Verify the LIB address
Note that the command field. and status
fields. are 'zeroes'.
5. Review counter fields. for station
statistics .
•
LAST ERR EXT STAT
Note: If further byte/bit definition is required, refer to
"Data Area Layouts" in the IBM 3704 and 3705 Program
Reference Handbook, GY30-3012.
00
OVERRUNjUNPERRUN FLAG
LINE QUIET TIMEOUT FG
LEADING DLE FORMAT CH
SUB BLOCK ERROR FLAG
UNUSED
UNUSED
UNUSED
UNUSED
e.
0
0
0
0
0
0
0
0
Ct
00
058AOOOO
0078033F
19012877
01060009
01680588
F2404040
4C3C407E
4040A004
601DE8C3
00200105_
00000000
00000000
D6
................. ........ ~
- - - - ---.,.
................
****************END OF SAl1PLE REPORT**************
---
......
-----...
..................
.................
00000000
-- -------. -------
MDR
---
..... .....
...........
000003C6
-- -- -- --
-- -....
Record Format for Station Statistics
0(0)
Line Interface
Address
-- -- - --- -- 3(3)
2(2)
Recording
Mode = X'01'
Record
10 =X'05'
4(4)
Hex Zeros
18(12)
1/0 Counter
(DVBSDRTI*
22(16)
20(14)
Temporary
Error Counter
(DVBSDRE)*
Device Features
(reserved if SDLC)
r---~------------------
or SCB transmission
counter (SCBTCNT)
if SDLC.
I·Format
I----~-------
-----------or SCB retry count
.(SCBTRTCT) if SOLC
. '.'
24(18)
Device Type
(DVBTYPE)*
I
(DVBFEAT1)*
.
or SCBstation
type (SCBTYPE)
if SDLC
(DVBFEAT2)"
* Indicates the control block field from which the MDR record field is loaded. (See "Data Area Layouts" section for field definitions.)
'il.,
,.-'",
I
./
"-
/
r
:
'---
"'~,
r----,
J
/~
...
..-J
.J
"
/
'/~I
I
', __.J
/"';",
J
~,
,,---y
,r'~
r'~'
r
\"---J/
.\..... . /
r
!'I
.
0
\'.., . /
. -~
'r.
Y
/
(~
y!
r-"'\
I.
j
(
'--
'
.
/
(-~
\0...../
\ .. .J!
(~-....
"
./
r
'.
j
(
(
(/
/
(
(
(
{
(
EREP - PERMANENT SOLC LINK ERROR MOR
ENTRY TYPE - NCP MDR
SOURCE - OUTBOARD
VS 1 REL.
07
DAY YEAR
HH MH SS.TH
DATE- 144
80
TIME 07 58 06 64
--~RECORD
HODEL- 0168
SERIAL NO.
1.
2.
3.
4.
0
303C
NETWORK NAME AMBSDLC2
RECORD TYPE - PERMANENT SDLC LINK ERROR
(
(
X
LXB command:
X'OO'
X'S3'
X'SD'
X'SF'
X'30'
X'32'
No I/O occurred
Disable.
Enable
Dial
Run SDLC Link
Run Initial
LXBCMAND
LINK INFORllATION
CCB CONTROL FLG
CCB LINE TYPE
(
e.
e
0024
(
Verify the Resource 10 • .
verify the channel unit address O.
Verify the LIB address
Check the LXB cOll1mand • .
1(1)
SUSPECTED MODE11 INTERFACE ERROR
LIB ADDR
(
To analyze an MDR record with a recording mode
of '02':
060157
e
DEVICE TYPE
3705
CHANNEL UNIT ADDRESS 0021
RESOURCE I.D.
303C
(
The EREP MDR records should be correlated with
console error messages and customer reports to
pinpoint failure times and causes.
Recording Mode '02'
NETWORK ADDRESS
(
(
00
41
LXB COHMAND
LXB HODIFIERS
LXB UmED. CTL
FINAL ERR BIT DECODE
FINAL ERR EXT STAT
EXTENDED ERR STAT FLG 0
FORMAT EXCEPTION FLG 0
0
DATA CHECK
1
SDLC POLL FINAL BIT
0
OVERRUN!UNDERRUN FLAG
BLOCK OVERRUN
ABORT
nONITOR COUNT OVERFLO
G
30
0000
00
C~1D
0
0
0
0
LXB
LXB
LXB
LXB
FINAL ERROR STATUS
FINAL ERR EXT STATUS
INITIAL ERROR STATUS
INITIAL ERR EXT STATUS
12FO
00
0000
00
INITIAL ERR BIT DECODE
INITIAL ERR EXT STAT
EXTENDED ERR STAT FLG 0
FORMAT EXCEPTION FLG 0
0
DATA CHECK.
0
SDLC POLL FINAL BIT
0
OVERRUN!UNDERRUN FLAG
BLOCK OVERRUN
ABORT
MONITOR COUNT OVERFLO
5. Utilize MOR data G and MOR decoding flow
chart (see page START 10S) to define the
error.
0
0
0
0
Note: If no match is found. or if further byte/bit definition
is required, refer to "Data Area Layouts" in the IBM 3704
and 3705 Program Reference Handbook, GY30-3012.
HEX DUMP OF RECORD
HEADER
91470800
0018
0038
0058
0021C1D4
00000000
02C1C3C6
15000000
008C144F
07580664
C2E2C4D3
00000000
D5C3D7FO
C3F23C3C
00D10000
F10COOOO
00240205_
01000000
00000000
30000000
00000041"""::: :::. ::. CZP(]tj~oQ- _ 0Q.900000
00000000
00000000
ooollouojj- - ..Q.1l0001r0a- - 0 0 - _ _
01060157
01680588
--- --
Record Format for Permanent SDLe Errors
12FOOOOO
00000000
---- --
---
---.
line Interface Address
*
SCB Service Seeking Command Flags
(SCBSSCF)
14(E)
LXB Final Error
Extended Status
(LXBEXTST)
LXB Final Error Status *2 *
(LX BSTAT)
LX BSTAT
LXBSTATC
*
2S(1C)
SeB Receive
Count
(SCBNR)
(Bits 4,5,6)
*
21 (15)
Received B LU
Command Field
(LXBRBLUC)
29(1D)
SCB Send
Count
(SCBNS)
(Bits 4,5,6)
*
7(7)
Output Control
Flag (SCBOCF)
12(C)
20(14)
SeB Retry Count
(SCBTRTCT)
6(6)
S(S)
Reserved
*
30(1E)
CCB Control Flags and line Type
CCBCTL)
CCBRSPON
Control Flags
17(11 )
LXB Initial Error
Extended Status
(LXBEREST)
1S(12)
*
25(19)
**
Transmit BLU
Command Field
(CCBCFLD)
26(1A)
*
SCB Current
Outstanding Count
(SCBCOC)
32(20)
***
Command Field
Received From
Secondary Station.
SECCFR
33(21)
. ***
N(R) and N(S)
Received From
Secondary Station.
34(22)
***
Command Reject
Reason:
X'OS' = Invalid N(R).
X'04' = Frame too long.
X'02' = Data received in
S or NS format.
X'01' = Invalid command.
24(1S)
SCB Station Type
(SCBTYPE)
CCBTYPE
Line Type
-
Record ID
X'05'
11(B)
LXB Immediate
Control Cmd.
(LXBIMCTL)
LXB Modifiers
(LXBCMODS)
LXB Initial Error Status *3 *
(LXBERST)
LXBERST
LXBHSTAT
Reserved
Recording Mode
X'03' = Station Error
X'02' = link Error
9(9)
LXB Command
(LXBCMAND)
15(F)
22(16)
3(3)
2(2)
0(0)
4(4)
---- - - - - -----
*
SCB Transmission Counter
(SCBTCNT)
I· Format
27(1 B)
SCP Pass Count
(SCBPCNT)
*
*This field is p resent only if this record is for a station (for a link, field contains all zeros).
* *This field stared only for duplex links.
* * *This field stared only if Cominand~eject was the cause of the MDR record being formatted.
*2 * Last error rec ognized.
*3 *First error rec ognized.
START
107
START
PERMANENT SDLC LINE ERROR-MDR DECODING
Chart F
Recording Mode - 02, 03,82,83, A3, A7, AB
LXB final error status
LXB final ERR EXT status
LXB initial error status
LXB initial ERR EXT status
LXBHSTAT
Bits 0-6
*LXB Field
First Byte
Second Byte
EREP Field
Check LXB initial
error status second
byte bits 0-6
0000
00
0000
00.
LXBSTAT
LXBEXTST
LXBERST
LXBEREST
If no match
found then:
Check LXB initial
error status first
byte bits 1 , 3
No
Check LXB initial
error status first
byte bits 3, 4
decode using.
Chart I
Yes
Probable Cause
Error Description
00
Timeout
Communications/
Secondary Failure
Timeout - Received RR, RNH
or REJ.
0C
Partial or
Negative
Acknowledgement
Communications/
Secondary Failure
Partial or Negative Acknowledgement - Sequence number
did or did not change.
0E
SDLC REJ.
Received
Secondary Failure
SDLC REJ Received - Li ne Is
not duplex-format exception
1C
SDLC RR
Received
Secondary Failure
SDLC RR Received - Received
RR In NS phase - format
exception.
1E
SDLC XID
Received
Secondary Failure
SDLC XID Received -Received
XID In RR or RNR phase format exception.
20
Timeout
Communications/
Secondary Failure
Timeout - Received address
and control fields.
24
Buffer
Cutoff
Program Failure
Buffer Cutoff - Exceeded
buffer 1imlt.
2C
Partial or
Negative
Acknowledgement
Communications/
Secondary Failure
Partial or Negative Acknowle?ement - Sequence number
d d or did not change.
60
Timeout
Communications/
Secondary Failure
Timeout - Flag received.
62
SDLC Command
Reject
Received
Communications/
Failure
SDLC Command Reject Received displacement:
X'YY'=08 Invalid N(R}
04 Frame too lonn
02 Data in S or S
Format
01 Invalid command
LXBHSTAT
Decode using
LXBHSTAT
Charts F, G, H
Check LXB initial
ERR EXT STATUS
bits 0,4,6, 7
Error
LX BSTATC
*3705 program handbook
No
108
Decode using
Chart J
Check LXB final
error status
second byte
Decode using
LXBHSTAT
Charts F, G, H
No
Use timeout
error '00' on
Chart F
,
/,,\
/
r
"-
~C'~
"-
j
'- )
/'~'\,
"./
~
,/
"- j
(""'i
"'-~
()
('
'--
./
~.
\
'. /
')'
'-
./
1""1\.
r
\.... j/
\.
-:.,.,
/
(
"
/~D
',J
"~/
./
(
(
(
(
(
Chart G
LXBHSTAT
Bits 0-6
(
(
('
(
(
(
(
(
,•
(
/'
Chart H
Error
Probable Cause
Error Description
LXBHSTAT
Bits 0-6
Error
Probable Cause
Error Description
64
Buffer
Cutoff
Program Failure
Buffer Cutoff - Exceeded
buffer limit.
Received
SDLC SNRM
Secondary Failure
Received SDLC SNRM - Format
exception.
80
Timeout
Communications/
Secondary Failure
Timeout - Nothing received.
AC and
LXBERST
Byte 0.1
=1
Buffer pool
Depleted
Program Fai lure
Buffer Pool Depleted
-No more buffers availabl~.
B6 and
LXBERST
Byte 0.1
=1
Received
SDLC ROL
Secondary Failure
84
Received SOLC ROL - Format
exception. Can be caused by
system reset at the
secondary.
8C
Reset
Program Fai lure
Reset - End Run Command.
I nval id
Address
Secondary Failure
Invalid Address - received
from secondary.
BC and
LXBERST
Byte 0.1
=1
Received
SOLC NSA
Secondary Failure
8E
Received SDLC NSA in RR or
RNR Phase - format exception.
96
Poll Stop
Secondary Failure
Poll Stop- Device was
polled to the polling limit
and responded negatively.
E8
Adapter
Check
Hardware Failure
9C
Disabled
Host Program
Failure
~isabled -Command issued to
a line that is disabled.
Adapter Check - Communications line adapter check
occurs when level 2
interrupt not received.
EA
Hardware Failure
Timeout
Communications/
Secondary Failure
Timeout - Received flag.
Adapter
Feedback
Check
Adapter Feedback CheckCommunication adapter feedback check has occurred.
Received
Inval id
SOLC
Command
Secondary Failure
Received Inval id SOLC
Command - Format Exception
F0
Modem
Error
Modem Interface
Fai lure
Modem Error-DSR or CTS drops
during command operation.
F2
Modem Interface
Fai lure
Transmit Clock or CTS
failure
Inval id
N(R) Count
Program/Secondary
Fai lure
Inval id N(R) Count -Received
inval id (incongruous N(R)
in I or S format.
Transmit
Clock or
CTS Failure
F4
OSR - On
Check
Modem Interface
Failure
Li nk
Activity
Timeout
Primary
Communications
Failure
Link Activity Timeout - No
flags received (remote NCP
only).
DSR - On Check - For leased
lines indicates DSR does
not come up within 3 seconds
after OTR.
F8
Received
SDLC DISC
Secondary Fai lure
Received SOLC DISC - Format
exception.
DSR - Off
Check
Modem Interface
Failure
DSR - Off Check - DSR
fails to drop during a
disable operation.
FC
ACU Check
Modem Interface
Failure
ACU Check - Incorrect Auto
Call Interface sequence.
FE
Program
Failure
Program Failure
Program Failure - Negative
data length was computed.
A0
A2 and
LXBERST
Byte 0.1
=1
A4
A6
A8 and
LXBERST
Byte 0.1
=1
("
START
109
(
START
Chart I
LXBEREST
bit
Error
LXBERST
bit
Probable Cause
Error Description
0=1
Under run
4=1
Program/
Hardware Failure
Under run-Character
transmitted more
than once.
0=1
Overrun
4=0
3=0
Program/
Hardware Failure
Overrun - Received
character overlayed
0=1
Frame Check
Sequence
Error
4=0
3=1
Communications
Failure
Frame Check
Sequence Error (Data Check)
4=1
Block
Overrun
Program Failure
Block Overrun-Level
3 block processing
in progress when
another block available from level 2.
6=1
Abort
Received
Communications/
Secondary Failure
Abort Received Ei~ht consecutive
1 its received.
7=1
Monitor
Count
Overflow
Communications/
Secondary Failure
Monitor Count Overflpw - 64 temporary
I-format receive
errors have
occurred.
Chart J
LXBERST
Error
Probable Cause
Error Description
3=1
Frame Check
Sequence
Error
Communications
Failure
Frame Check Sequence Error(Data Check).
1=1
Format
Exception
Secondary Failure
Format Exception
SDLC format.
r
"
fC
\-.
)
""
r
. ,~)'"
/'''1
".-/
'-..
j
/~
'..j
..•.~
)
-
r",,\
"--.j
Inval id
r'\
'--.)
('\
<.J'
(--..
'-- /
r~
\,
j
r·~.
'. /
~
r~
'--)
(
'-..
"
.-/
('
.~
(
\
/
"'-./
0
,~~
110
l, (
('
(/
(
(
(
EREP - PERMANENT SOLe STATION ERROR MOR
Recording Mode '03'
The EREP MDR records should be correlated with console
error messages and customer reports to pinpoint failure
times and causes.
To analyze an MDR record with a recording mode of '03'
(
(
(
«
(
(
(
(
(
---RECORD ENTRY TYPE - 3705 MDR
SOURCE - OUTBOARD
VS 2 REL.
03
DAY YEAR
HH MM SS.TH
DATE- 031
78
TIME 13 06 13 92
(
MODEL- 0168
SERIAL NO.
NETWORK ADDRESS
9895
NETWORK NAME PUSW1E
LIB ADDR
002C •
5. Utilize MDR data. and MDR decoding flow chart
(ref. START 108) to define error.
Note: If no match is found, or if further byte/bit
definition is required, refer to "Data Area Layouts"
in the IBM 3704 and 3705 Program Reference
Handbook (GY30-3012).
00
21
LAST ERR BIT DECODE
LAST ERR EXT STAT
EXTENDED ERR STAT FLG
FORMAT EXCEPTION FLG
CHAR SYNC CHECK
DATA CHECK
SDLC POLL FINAL BIT
0
0
0
0
0
LXB COMMAND
LXB I40DIFIERS
LXB IMMED. CTL CND.
•
LXB LAST ERROR STATUS
LXB LAST ERR EXT STATUS
LXB FIRST ERROR STATUS
LXB FIRST ERR EXT STATUS
30
0000
00
FIRST ERR BIT DECODE
OVERRUN/UNDERRUN FLAG
BLOCK OVERRUN
ABORT
MONITOR COUNT OVERFLO
0
0
0
0
•
06FO
00
0000
00
FIRST ERR EXT STAT
EXTENDED ERR STAT FLG
FORMAT EXCEPTION FLG
CHAR SYNC CHECK
DATA CHECK
SDLC POLL FINAL BIT
0
0
0
0
0
OVERRUN/UNDERRUN FLAG
BLOCK OVERRUN
ABORT
MONITOR COUNT OVERFLO
0
0
0
0
LOCAL PRI STATION INFORMATION
SCB DEVICE TYPE
SCB LINK SCHEDULING FLGS
SCB OUTPUT CONTROL FLAGS
IMTD BLU CMD FLD
RCVD BLU CMD FLD
22
0001
81
00
00
01
01
000
007
000017
002
N (R)
N (S)
SCB
SCB
SCB
SCB
BLKS OUTSTANDING CNT
PASS COUNT
I-FORMAT TRANSMIT CNT
IMIT TEMP ERR COUNT
HEX DUMP OF RECORD
HEADER
91830800
0018
0038
011CD7E4
02000000
058A0040
0078031F
13061392
01060009
E2E6F1C5
22000007
40409895
22220021
oooooOb'C'--___ ~001l'00'0"
002CQ,30S - - - __
0~018100
****************END OF SAMPLE REPORT······.···.....
01680588
-
30000000
06FOOOOO
__ _
-o040~
-- _ __
L...._ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
-=
LXB command:
No 1/0 occurred.
Disable.
Enable.
Dial.
Run SOLe link.
Run Initial.
CCB TYPE CONNECTION FLG
CCB TYPE FLAGS
=
X'OO'
X'83'
X'SD'
X'SF'
X'30'
X'32'
(
RECORD TYPE - PERMANENT SDLC LINE ERROR
_
1 (1 )
LXBCMAND
.
(
(
DEVICE TYPE
3705 •
CHANNEL UNIT ADDRESS 011C
RESOURCE 1.D.
9895 •
~
Verify the resource 1.0. " .
Verify the channel unit address •
Verify the LIB address • .
Check the LXB command • .
(
060009
LINK INFORMATION
1.
2.
3.
4.
(-
(
(
......___
-
___
00000011
---
_=_=-_--_-----==-.::r - ______ _
--- -. -----
Record Format for Permanent SOL C Erron
-----
0(0)
2(2)
Une Interface Address
4(4)
*
SCB Service Seeking Command Flags
(SCBSSCF)
14(E)
LXB Final Error
Extended Status
(LXBEXTST)
LXB Final Error Status *2*
(LXBSTAT)
LXBSTAT
LX BSTATC
* 21 (15)
2S(1C)
SCB Receive
Count
(SCBNR)
(Bits 4,5,6)
*
*
7(7)
Output Control
Flag (SCBOCF)
12(C)
20(14)
SCB Retry Count
(SCBTRTCT)
6(6)
S(S)
Reserved
29(10)
SCB Send
Count
(SCBNS)
(Bits 4,5,6)
*
CCB Control Flags and Line Type
CCBCTL)
CCBRSPON
Control Flags
17(11 )
LXB Initial Error
Extended Status
(LXBEREST)
1S(12)
*
25(19)
**
Transmit BLU
Command Field
(CCBCFLD)
26(1A)
*
SCB Current
Outstanding Count
(SCBCOC)
32(20)
***
Command Field
Received From
Secondary Station
SECCFR
33(21)
***
N(R) and N(S)
Received From
Secondary Station
34(22)
***
*This field is present onl y if this record is for a
Command Reject
station (for a link, fiel d contains all zeros).
Reason:
**This field stored only f or duplex links.
X'OS' = Invalid N(R).
***This field stored only i f Command Reject was
X'04' = Frame too long.
the cause of the MDR record being formatted.
X'02' = Data received in
*2 * Last error recognized.
S or NS format.
*3*First error recognized.
X'01' = Invalid command.
24(18)
SCB Station Type
(SCBTYPE)
30(1 E)
CCBTYPE
Une Type
Record 10.
X'05'
11 (B)
LXB Immediate
Control Cmd.
(LXBIMCTL)
LXB Modifiers
(LXBCMODS)
LXB Initial Error Status *3*
(LXBERST)
LXBERST
LXBHSTAT
Reserved
3(3)
Recording Mode.
X'03' = Station Error
X'02' = Unk Error
9(9)
LXB Command
(LXBCMAND)
15(F)
22(16)
Received B LU
Command Field
(LXBRBLUC)
-- ------.- -
*
SCB Transmission Counter
(SCBTCNT)
I-Format
27(1B)
SCP Pass Count
(SCBPCNT)
*
START
111
START
The ERP MDR records should be correlated with
console error messages and customer reports to
pinpoint failure times and causes.
EREP - TYPE 2 COMMUNICATION SCANNER ERROR MDR
Recording Mode '11'
---RECORD ENTRY TYPE - 3705 MDR
VS 2 REL.
03
UODEL- 0168
SOURCE - OUTBOARD
DAY YEAR
DATE- 002
78
SERIAL NO.
To analyze any MDR record with a recording
mode of 11:
060009
e.
1. Verify the resource ID
2. Verify the channel address G.
3. Note that the record type. describes the
adapter failure.
4. Note that the fol!owing data G).is recorded:
• Input 74 - Lagging address register
• Input 79 - Program level interrupted
• Reg 0 - Interrupted level IAR
• Input 43- Check register 1
5. Verify which bit is set to indicate the error
condition G.
HH MM SS.TH
TIME 08 13 52 39
DEVICE TYPE
3705 C)
CHANNEL UNIT ADDRESS 001A
RESOURCE LD.
9000 "
TYPE 2 CRECORD TYPE - UNKNOWN - IFCETRN1
RECORD TYPE - COMMUNICATION SCANNER TYPE 2 CSB1
LAGGING ADDRESS REG 74
EXTERNAL REGISTER 79
OOOOllDE
0043
ABEND CODE 0000
INTERRUPTED LEVEL IAR
CD
COMMUNICATIONS SCANNER STATUS 43=
LIB POS 1 BIT CLOCK CHECK
0
0
LIB POS 2 BIT CLOCK CHECK
LIB POS 3 BIT CLOCK CHECK
0
0
LIB POS 4 BIT CLOCK CHECK
LIB POS 5 BIT CLOCK CHECK
0
0
LIB POS 6 BIT CLOCK CHECK
LIB SELECT CHECK
1
ICW IN REGISTER CHECK
0
ICW WORK REGISTER CHECK
0
PRIORITY REGISTER AVAILABLE CHECK 0
0
CCU OUTBUS CHECK
LINE ADBUS CHECK
0
UNUSED
0
UNUSED
0
Et
00001lE2
0200
Note: Refer to the 3705 Principles of Operation for detailed
error description.
•
HEX DUMP OF RECORD
HEADER
0018
91830800
058AOOOO
0060002F
08135239
001AD5C3
D7C14040
40409000
0000J.,.105_ _
................
01060009
01680588
40000200
OOOOllDE
......_--........
-- ------------ --- ........
................
MDR
00001lE2
Record Format for Type 2 Communication Scanner Errors
0(0)
- - - --------
------ ---
Abend/Malfunction
Code
4(4)
5(5)
Error Record
Type *
3(3)
2(2)
Recording
Mode = X'11'
Record
10 = X'05'
External Register X'79'
Program Level
Interrupted
Scanner 1 = X'40'
Scanner 2 = X'20'
Scanner 3 = X'10'
Scanner 4 = X'OS'
/'
/~\
'.
-- --- -
16(10)
*Type 2
Type 2
Type 2
Type 2
/
....
External Register
X'74'
Lagging Address Register
External Register
X'43'
Check Register 1
Interrupted Program Level's
Instruction Address Register
(Register 0)
,
-
-- - ---
S(S)
6(6)
Lost Check
Record Count
(CRPLCRCT)
12(C)
-,
00430000
)
\.
'\
"-....-,)
"- )
"'.-""
./'~
/
"'-../
I
'"
/
(~,
"--~/
;""""
j
.
r,\
)
'~../
,
/
I
(
(~
'-...j
'..-'
~
'J
<~
'-- ./
.
i
"-.~
"
r
!
(,"'-,
\"'--.//
112
(-~
(/
(
(
(
(
(
(
(
f
(
(
(
(
(
(
(
(,
(
(
(
c
( -'
,
'
EREP - MDR SUMMARY
PERM ERRORS
---SUMMARY OF ENTRY TYPE - 3705 MDR
DAY YEAR
DATE RANGE- 063
80 TO
DEVICE TYPE 3705
MODEL- 3031
SERIAL NO.
037961
DAY YEAR
063
80
TOTAL NUMBER OF RECORDS
CHANNEL UNIT ADDRESS 00001D
TERM NAME
RID
A025
B020
B021
B022
B023
B024
B025
BIOI
D003
D004
F854
F801
F80B
F819
F827
F835
F843
F84E
F84F
F8S0
002C
002C
002C
002C
002C
002C
002C
002C
002C
002C
#I/O OPS
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
TEMP
ERRORS
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
PERl1
ERRORS
--
HDvlR
000003
000002
000001
000001
000001
000001
000001
000005
000003
000003
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
TH OUT
00003
00002
00001
00001
00001
00001
00001
00005
00003
00003
DATA CK
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
RCV
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
lTV RQD
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
- - -
MISC
HOD EM/
INTFC
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
00000
HDWR
1.
TERM NAME
Terminal name as assigned in NCP Gen.
RID
Resource ID as assigned in NCP Gen.
LIB ADDR
# I/O OPS
TEMP ERRORS
For BSC/SS lines, a count of error retires. The count is taken from the DVBSDRE
field in the DVB (device base control block).
For SDLC stations, a count of error retries. The count is taken fromthe SCBTRTCT
field in the SCB (station control block.)
Scanner failure
Adapter check
Adapter feedback check
Equipment check
No data was received from a terminal when it was expected
No response from the ACU (auto-call unit)
DATACK
Block check character error (BSC); Frame check sequence error (SDLC)
(errors most likely associated with line problems)
RCV
Terminal answers with incorrect response, out of sequence response or
ends the operation permaturely (errors most likely associated with
terminal problems)
ITVRQD
Negative acknowledgement received from terminal in control phase.
MISC
1. - Program errors
2. User errors
3. "Should not occur" errors
4. Errors not categorized
MODEM/INTFC
Modem interface errors:
For SDLC stations, a count of I-frames transmitted (including retries). The count is
taken from the SCBTCNT field in the SCB (station control block).
For SDLC Links, the count is always set to zero.
1.
2.
3705 line interface address for this line ('0000' if this error is not associated with a
line).
For BSC/SS lines. A count of test blocks transmitted (including retries). The count
is taken from he DVBSDRT field in the DVB (device base control block).
3705 hardware failures:
A.
B.
C.
D.
TMOUT
Description
Received SDLC frame reject response
Received invalid SDLC command
Adapter check
Adapter feedback check
Modem error
Transmit clock or clear to send failure
Data set ready turn on or off check
Auto call check
Program failure.
Permanent Error Types:
ERR/MDR SUMMARY
Field
Errors which have exhausted their retry error count
Errors which NCP considers permanent and no error recovery is
attempted.
A.
B.
C.
D.
E.
F.
G.
H.
I.
0021
- PEAAANJNT" ERROR TYPES
LIB
ADDR
1.
2.
1.
2.
3.
4.
5.
DSR or CTS drops during command operation
Transmit clock failure
DSR fails to reach an up level within 3 seconds of DTR (leased line)
DSR fails to drop during a disable operation.
Incorrect auto-call interface sequence.
For SDLC links, the count is always set to zero.
START
113
This page intentionally left blank
,
~,
'\
(
;!
~
'---.;/
'-,
/
ir-~
/~
_r~
,/
. ./
''-....../
"
"
'-
/~
r-\
"./
'-...../!
('"'"
'-......./
'\
('"
"-_./
f'"
"
''-.._--_/
/
'-
'1j
"-
(
("'~
\
'-
./
,,-y
/
'\
/'
\
/
\,,-""-/
0
/,""
.(/ (
(
(
,
'
/
(/
(
(
«
INTERNAL FUNCTIONAL TEST
(1FT)
WHAT 1FT DOES
IFTs are a set of diagnostic programs that help
detect 3705 hardware failures. There are
separate IFTs for each of the following major
components of the 3705:
•
•
•
•
Central Control Unit (CCU)
Storage
Type 1 or Type 4 Channel Adapter
Type 2 Communication Scanner Base (CSB)
(
(
(
(
IFTs are loaded into 10K byte areas of storage. If
an 1FT is larger than 10K bytes, the 1FT is divided
into sequentially numbered self-contained
modules called sections. Each section contains
an 1FT preface. Subroutines and interrupt
handlers are duplicated in each section.
1FT Preface
The 1FT preface is located at the beginning of
each 1FT section and contains: (1) the 1FT
number, (2) the section number, (3) the address
of the preface for the first routine in the 1FT, and
(4) the addresses of the levell, 2, 3, and 4
interrupt handlers.
(
(
•
•
•
•
{
(
(
(
(
necessary to test the hardware. Test block
causes the hardware to execute the functions
being tested.
Analysis Block: The analysis block checks the
results of the test block and if an error was
detected, causes the DCM to display error
codes.
Test for More Parameters Block: The test for
more parameters block determines if
additional test iterations are to be taken.
Modify Block: The modify block modifies
pointers and addresses for any additional
iterations of the test.
End Block: The end block terminates the
routine and returns control to the DCM.
I FT Routine Preface
Note: The type 2 CSB 1FT also tests the Line Interface Base
(LIB) and Line S~ts.
1FT consists of the following sections:
Sect i on
CE Request and Description
(see note 1)
Z3705AAA
Z3705ACA
Z3705ADA
Z3705AEA
Z3705BAA
Z3705BBA
Z3705BCA
Z3705CAA
Z3705DAA
Z3705JAA
Z3705JBA
Z3705GBA
Z3705GCA
Z3705GDA
Z3705GEA
l1RR
P2RR
.P3Rk
P9RR
P9RR
Type 1 CA Load Module
(see note 2)
DCM
INIT, Section 1
INIT,$ection 2...
CCU 1FT, Section 1
CCU 1FT, Section 2
CCU 1FT, Section 3
Storage
Type 1 CA 1FT, Section
Type 4 CA 1FT, Section
Type 4 CA 1FT, Section 1
Type 2 CSB 1FT, Section 2
Type 2 CSB 1FT, Section 3
Type 2 CSB 1FT, Section 4
Type 2 CSB 1FT, Section 5
Note1: CE request is the information that you must enter
to run a particular 1FT. See "How to Request an 1FT" later in
this section.
Note 2: Type 1 CA Load Module is used for both the type 1
and type 4 CA.
REQUIREMENTS
You must have the proper configuration data set
(CDS) cataloged with the remainder of the
system (for additional information, see the CDS
section). Before 1FT routines can run properly,
the functional areas in the CCU hardware must be
operational. These functional areas are tested by
the ROS bootstrap program each time the LOAD
pushbutton is pressed.
HOW IFTS ARE STRUCTURED
An 1FT consists of a preface, one or more
routines, subroutines, a preface for each routine,
and interrupt handlers.
The routine preface is located at the beginning of
each routine and contains: (1) the routine
number, (2) flags that identify manual
intervention and problem definition routines (3)
the address of the abort subroutine, and (4) the
address of the preface for the next routine in the
section. For the last routine in a section, the next
routine address field is X'FFFE'. For the last
routine in an 1FT, the next routine address field is
X'FFFF'.
I FT Routines
1FT routines consist of blocks of code that
provide the various test functions. The basic
routine blocks are:
• Initialize Block: The initialize block is entered
on the first pass through the routine and it
initializes addresses, pointers, and other
parameters. The initialize block also performs
certain hardware operations such as adapter
reset. The initialize block can be modified to
alter the initial addresses, pointers, and
parameters for subsequent passes.
• Program Setup Block: The program setup
block prepares the other blocks of the routine
for execution by setting up or modifying
parameters and addresses.
• Hardware Setup Block: The hardware setup
block prepares the hardware fortesting by
setting registers and latches according to the
initial parameters.
• Pretest Block: The pretest block tests for
correct hardware setup. Error codes displayed
by this block indicate other routines should be
run to test the hardware setup conditions.
• Set Scope Sync 2 Block: The set scope sync 2
block causes a pulse to be emitted from scope
sync point 2 (01 A-B3M2P13, ALD page CU015)
at the beginning of each test function.
• Test Block: The test block completes the steps
1FT EXECUTION
3705 Setup Procedures
1. Switch the 3705 power on.
2. Set both the MODE SELECT and
DIAGNOSTIC CONTROL switches to the
PROCESS position.
3. Enable the appropriate channel interface.
4. To load the DCM, set the
DISPLAY IFUNCTION SELECT switch to the
STATUS position. For information on using
the other positions, see "How to Use the
DISPLAY IFUNCTION SELECT Switch" later
in this section .
5. Press the RESET pushbutton, then the
LOAD pushbutton'.
6. DISPLAY B bits 0.2 and 0.3 should be on
indicating that ROS has reached IPL phase
3. The LOAD light is on; the following lights
are off: HARDSTOP, TEST, WAIT, and
PROGRAM STOP.
If the above conditions are not present,
refer to the CE Panel Test in the CTRL PNL
section and the ROS Test in the ROS section
(both sections are in Volume 2).
Host Procedures
Start the OLTEP or OLTSEP in the host
processor. When OLTEP or OLTSEP causes a
console printer message of:
riD 'ENTER DEV ITEST /OPT I'
(
(
(
(
(
(
(
cc
ABCD = four operating options provided by the
OLT and type 1/4 CA loaders. The
correct entries are Y (for YES) or N (for
NO). The options are defined as
follows:
A = OLT bypass printing channel
errors
B = Run INIT
C = Run type 1 CA loader with error
checking
D = Bypass hard stop on type 1 CA
loader error in 3705 and retry
If your response to the DEV ITEST/OPT I
message does not include the ext= parameter,
the default value assumed is ext=nyyy (that is,
ext=NO,YES,YES,YES).
Delay of INIT Execution: Before INIT begins
executing, the 3705/host interface must be
disabled. The type 1 CA loader attempts to
disable the 3705 interface by issuing a diagnostic
DISABLE command when INIT is loaded. The
host 'clock out' line must drop before the 3705
can go offline. The host 'clock out' line will drop
when either the host processor STOP pushbutton
is pressed or when the host processor enters the
wait state.
Operating situations underOS or DOS can result
in maximum use of the processor that will delay
the host from entering the wait state. During this
delay, the OLT prints a message indicating that it
is waiting for the 3705 to disable its channel
interface. Also, at the 3705, an equivalent
message code is displayed in the control panel
lights.
TYPE 1 LOADER ERROR PRINTOUTS
Error printouts occur if the Type 1 CAloader
detects an error. The printout contains all the
perti l1 ent information about the type 114 CA error
that can be obtained by the type.1 CA loader.
The bypass printing channel errors oiJtion
inhibits the error printout. For a description of
the error printouts, refer to DOS OLTEP SRL
(GC24-5086), IBM System 1360 Operating System
On-line Test Executive Program (GC28-6650)' or
OLTSEP Operator's Guide (D99-SEPDT).
you enter:
r ID,'XXX/3705A/nfe,ext=ABCD/'
where:
XXX
= the channel and unit address of the
3705 (native attachment address).
Internal Functional Test Description
1FT 002
1FT 004
Internal Functional Test Description
MESSAGES
Message.s occur during operation of the type 1
CA loader that indicate: (1) the loader has
detected an error or (2) an action is needed to
load the diagnostic programs into 3705 storage.
The messages, message explanations, and .
responses areas follows:
THE STATUS OF THE 3705 CANNOT BE
DETERMINED. **WARNING** CONTINUATION
WILL CAUSE THE ENTIRE 3705 TO BECOME
UNAVAILABLE. ENTER 'c' TO CANCEL OR 'P'
TO PROCEED.
Explanation: The OLT cannot determine the
status (offline or stopped) of the 3705. If the
OLT is allowed to continue, the program in
3705 storage will be destroyed.
Response: Continue by entering a C or P, as
follows:
The difference between a 'P' and "R"
response is (1) P means to proceed,
regardless of the offline or online status of the
3705 address and (2) R means that the
operator has been taking addresses offline
and wants the program to verify that all units
are now available to the OLT.
WRT CMD TO WRITE DATA
WRT IPL CMD SENDING LOADER
Request an 1FT" in this section.
loaded, the program indicates that you can
make a request at the 3705. If the DCM has
not been loaded, the program starts over by
requesting you to press the LOAD pushbutton
on the 3705.
ALL 3705 ADDRESSES ARE NOT STOPPED OR
OFFLINE. **WARNING** CONTINUATION WILL
CAUSE THE ENTIRE 3705 TO BECOME
UNAVAILABLE. ENTER 'c' TO CANCEL OR 'P'
TO PROCEED, OR 'R' TO RETRY.
Explanation: The OLT has been notified by the
executive driver that all 3705 addresses are
not offline or stopped. If the OLT is allowed
to continue, the program in 3705 storage will
be destroyed.
Response: You have the opportunity to make
all addresses available to the OLTusing
standard system facilities. Continue by
entering a C, P,ar R, as follows:
Explanation: The program assumed the
or
PRESS LOAD ON 3705
Response: None.
type 1 CA loader is initially started or if loss of
co.ntrol occurs. It constitutes the beginning of
the type 1 CA loader and provides the
synchronization between the 3705 and the
host processor.
requested a function of the executive driver
which the driver is incapable of performing.
This may be because of an invalid parameter
or an error that occurred while the executive
driver was performing the request. XXXXXXX
is the name of the function being requested,
and YY is the code returned by the executive
program. The XXXXXXX field is filled by the
type 1 CA loader.
/
\ .. j
t'
",
'-. ./
/"~I
Explanation: The type 1 CA loader has loaded
INIT iii the 3705 and is waiting for the 3705 to
go offline. This message is repeated every 20
seconds until the 3705 channel interface is
disabled and the 3705 begins executing the
1FT.
other available information should ,be
submitted with an APAR (Authorized .Program
Analysis Report).
The following messages are printed on the
system output printer to describe failures and the
operation that was being attempted when an
error occurred:
,./
j
,
/~
I
.
../
."
'~y
Explanation: This message warns you that
errors occurred while loading the INIT or 1FT
modules. Each output operation to the 3705 is
attempted up to ten times if an error occurs
(unless the OLT option EL (N) has been
modified). If the operation being attempted is
performed before the error count is,
exhausted, the OLT considers the data
transfer successful and continues lo~ding the
INIT or 1FT modules.
AWAITING 3705 INTERFACE DISABLE
Response: This message is a diagnostic
programming aid. If it occurs~ a dump and
rC-~
ERP USED ON MOD Z3705XXX
3705. This message repe.ats every 30 seconds
until the LOAD pushbutton is pressed.
Response: Verify that the INIT or 1FT modules
are at the proper level.
Z3705XXX IN ERROR, ABORT LOAD
If this message occurs continuously, the 3705
is eIther unable to go offline after the INIT has
been loaded, or unable to get back online after
the INIT has completed execution. A
processor-bound system can cause this
problem.
Explanation: The retry count (normally 10) is
exhausted and the error is still occurring. The
type 1 CA loader assumes that loss of control
has occurred and restarts at the beginning.
Response: Refer to the message "ERP USED
ON MOD Z3705XXX".
Response: Pressing the STOP and then the
STARTpushbuttons on the processor console
drops the 'clock out' line long enough for the
3705 togo offline. Entering the wait state
accomplishes this also.
RD CMD FOR' 1FT REQ
(~
Response: None.
Response: Press the LOAD pushbutton on the
NOP CMD FOR 3706 LOAD BUTTON
r id/R' (for retry)
"
INIT or 1FT modules have been successfully
loaded in the 3705 without any errors being
detected. Z3705AAA is the type 1 CA loader,
Z3705ADA is the INIT section 1, and
Z3705AEA is the INIT section 2.
request; otherwise press LOAD.
BAD STATUS ON SIO
r id,'P' (for proceed)
'-_J
Explanation: These messages indicate that
response of 'c' and terminated the OLT.
FAILED TO INTRPT
or
, ./
3705 LOADED WITH 1FT Z3705AEA
Response: If DCM has been loaded, enter a
BAD CCSIO
r id,'C' (for cancel)
.'..~\
3705 LOADED WITH 1FT Z3705ADA
INVALID RESPONSE AFTER 5 REQUESTS
Explanation: The type 1 CA loader has
Any other response results in the program
repeating the last line of the above message.
After five invalid responses, the message
INVALID RESPONSE AFTER 5 REQUESTS is
printed.
r
3705 LOADED WITH IFTZ3705AAA
Explanation: If the DCM has already been
Any other response results in the program
repeating the last line of the above message.
After five invalid responses, the message
INVALID RESPONSE AFTER 5 REQUESTS is
printed.
BAD RC YY FROM XXXXXXX
rid/P' (for proceed)
"
Response: Enter an 1FT request. See "How to
WRT CMD SENDING CONTROL WORD
or
.~
request to load an 1FT module can be entered.
Explanation: This message occurs when the
r id/C' (for cancel)
"-
Explanation: This message indicates that a
WRT CMD FOR LAST BLOCK
WAITING FOR 1FT COMPLETION
Explanation: This message occurs every 20
seconds after an 1FT has been, loaded in the
3705. Most of the IFTs disable the 3705. The
type 1 CA loader is in a loop issuing NOP
ENTERIFT REQUEST AT 3705
/\
(~
\....j
f' ''0
,,-.j
(--"
~~
'"
r~
\.
/
J
'-r\
'-yJ
'"
I
I
j
'- /
"j
"'-J
j
./
---~
(
(
-----
(j (j
(/ ("
- - - -------
(
{
commands to the 3705. If it receives condition
code 03, the 3705 interface is not enabled, it
prints this message, and waits another 20
seconds. When the 3705 is enabled, the type
1 CA loader continues running.
-----
--
(-
(
(
(-
f
(
(: (
Explanation: The type 1 CA loader has
Response: None.
received an 1FT request (through a Read
command), for a module that is not in OlTLIB.
The type 1 CA loader returns to the Read
command to allow you to enter another
request at the 3705.
INVALID PLINK MOD
Response: Enter another request. However, if
Explanation: The type 1 CA loader has
detected an error in the requested module (an
address in the module was on an odd
boundary). The type 1 CA loader returns to
the Read command to allow you to enter
another request at the 3705.
Response: Enter another request.
MOD Z3705XXX NOT IN OlTLIB
(
c (
(
(
(/
(
(
(
(
(
(~
DISPLAY/FUNCTION
SELECT Switch
Position
STORAGE ADDRESS/
REGISTER DATA
Swi tches
ABC 0 E
FUNCTION
STORAGE ADDRESS
REGISTER ADDRESS
FUNCTION 1
YYYYY
- R- R
- 0 -
Display location YYYYY.
Display register RR.
Refresh the last DCM display.
Stop the panel utilities.
Set up continuous display without test.
Set up continuous display with test.
Set up address compare display without
test.
Set up address compare display with test.
Set repeat count to HH.
Display repeat count.
Set CE sense switches (S=0 for byte 0
of switches, S=l for byte 1 of switches,
and MM= selected bits to be set or reset.
Reset CE sense switches.
Display CE sense switches.
Dynamic communications to routines.
Display storage contents at XXXXX.
Display contents of registe~ RR.
Part 1 of 1FT request (see How to Request
an IFT" later in this section).
Part 2 of 1FT request (see "How to Request
an IFT" later in this section).
Terminate OLTEP or OLTSEP at the host
(see "How to Terminate an IFTII later in
this section).
Continue from the error stop or manual
intervention stop. If it is an error
stop, VWXYZ is not used. If it is a
manual intervention stop, VWXYZ is used
by the routine as specified in the 1FT
Symptom Index at the back of this
section.
Terminate the total request.
Terminate the current routine.
Panel utility display positions
DCM displays of routine codes. Stop codes
are displayed when the switch is set to
any of the FUNCTION positions.
-
,
-
5
6
7
9
-
the request was valid, the 1FT module name
must be added to the OlTEP/OlTSEP library
before the 1FT can be loaded.
HOW TO USE THE DISPLAY/FUNCTION
SELECT SWITCH (SEE FIGURE IFT-1)
With the DISPLAY/FUNCTION SELECT switch
set to any position except TAR & OP REGISTER
or STATUS, the following functions will be
performed when: (1) the INTERRUPT pushbutton
is pressed or (2) the START pushbutton is
pressed after a stop code is displayed:
(
1
2 -
-
- HH
S MM
- A S MM
- A S 0 0
FUNCTION 2
FUNCTION 3
FUNCTION 4
- 0 XXX
XXXXX
- R - R - P I R R
- MM MM
- F 0 XX
FUNCTION 5
v WX Y Z
FUNCTION 6
- F F F F
FUNCTION 1.2. or 63
FUNCTION 4.5. or
Note: - means that the switch is not used.
Figure IFT-1. How to Use the DISPLAY/FUNCTION SELECT Switch
Internal Functional Test Description
1FT 006
(
1FT 008
Internal Functional Test Description
optio,n as shown FigureIFT-3. (CEtest options
Qllrtbe qolJ1bmed). For exampfe,to;foop on the
fii'$tet'r.ortswi'tch E::!;: X'4')" you rnustal.sobyp~S8
err,o'r·stl>Pi(switch E:= X"S'}. To combine both
optiomJ,yau would set switch E to X'C'.
2. Set the DISPLAY I FU NCTIONSELECT
switch to FUNCTION 4.
3. Set the STORAGE ADDRESS/REGfSTER
DATA switches to select the desired
adapter, 1FT, and routine (see Figure IFT..:.2)."
The 1FT number is set in switch C, .and the
routine number is set in switches 0 andE.
If the appropriate switch issetto 0, then all·
adapters, IFTs, or routines will be run.
HOW TO REQUEST AN 1FT
An 1FT request is divided into two parts: part 1
selects an adapter, 1FT, and specific routines and
part 2 selects the CE sense switch options
desired. See the OCM section for the OCM stop
codes, description, and required intervention.
Before an 1FT request can be made:
1. OLTEPor OLTSEP must be running in the
host CPU.
2. The DCM must be loaded and ready for an
1FT request. Prior to the initial request,
DISPLAY A and DISPLAY B will each
contain X'FFFF'.
To run the CCU IFTs, set switches Band C
to 11. To run the storage IFTs, set switch C
to 2. To run the type 1 CA IFTs, set switch C
to 3. To run the communication scanner
IFTs, set switch C to 6. To run the type 4 CA
IFTs, set switch C to 9. (See CE Request in
"What 1FT Does" earlier in this section.)
To perform part 1 of an 1FT request:
1. Terminate active 1FT request before
entering a new request. See "How to
Terminate an 1FT or OLTEP/OLTSEP" later
in this section.
Adapter, 1FT, and routine
to be selected
STORAGE ADDRESS!
REGISTER DATA
Switches
BCD E
Run all rout ines of all IFTs on all
all adapters.
o0
Run all routines of one 1FT on all
adapters tested by this 1FT (I is
the 1FT number).
o 100
Run all routines of one 1FT on one
adapter (I is the 1FT number and P
is the adapter ID)
P 100
Run one routine of one 1FT on all
adapters tested by the 1FT (I is
1FT number and RR is the routine
number) .
o
Run one routine of one 1FT on one
adapter (p is the adapter I D, I Is
1FT number, and RR is the routine
number).
P I RR
CE ,Test ()ptlons
Probl.a11l defili.it Ion mode
Restart routine on first error
Loop 'on first error
Bypass error stop
Cycle on request
Include manual intervention routines
Cseethemanual routines that follow)
Repeat each routine X times
Halt before execution
Bypass new error stops
Wait before continuing
"
./
"
\-
'\,
/
/-
"-
'-- /
t"
1
2
8
HOW TO TERMINATE AN 1FT OR
OLTEP/OLTSEP
I R R
1. Setthe DISPLAY/FUNCTION SELECT
switch to FUNCTION 6,
2. Set STORAGE ADDRESS/REGISTER DATA
switches BCDE to X'FFFF'.
3. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
To terminate an 1FT routine, perform the
following steps:
1. Setthe DISPLAY/FUNCTION SELECT
switch to FUNCTION 6.
2. Set at least one of the STORAGE
ADDRESS/REGISTER DATA switches BCDE
to a value other than X'F'
To perform part 2 of an 1FT request:
1. Set the STORAGE ADDRESS/REGISTER
DATA switches to select the desired CE
"\
'"
/
,
'\
i
-_./
',,_./
P'
\.
"'/
4
8
4
8
1. Press the START pushbutton. The
PROGRAM DISPLAY light should come on.
If it does not, see "Determining Why the
PROGRAM DISPLAY Light Is Not On" in the
DCM section.
2. See the 1FT Symptom Index at the back of
this section for a description of the code in
DISPLAY B.
0 0
PROGRAM DISPLAY Light Is Not On" in the
DCM Section. See the 1FT Symptom Index
at the back of this section and perform the
corrective action that is indicated.
"
./
1
2
Figure IFT-3. CE Sense Switch Settings
Figure IFT-2. How to Select an Adapter, 1FT, and Routine
If the PROGRAM STOP and HARD STOP
lights do not come on, see "Why the
See the DCM section for a detailed
description of the CE sense switch settings.
STORAGE ADDRESS/
REG I STER DATA
Switch
BCD E
To terminate an entire 1FT request, perform the
following steps:
4. Press the START pushbutton. If the
PROGRAM STOP and HARD STOP lights
come on, DISPLAY A contains X'FFFF' and
DISPLAY B contains X'8002' the DCM is
ready for part 2 of the 1FT request.
If no options for a particular switch are
desired, set that switch to zero.
r-~,
,--)
~
.~ ~
,
............
j
/'
~'\
"-
r""'.
'- --_./
'\
''\.
\,--_7
,-_/1
(
/
"
--
/
'-- j
(~~
,~/
3.
If the program is running, press the
INTERRUPT pushbutton. If the HARD STOP
light is on, press the START pushbutton.
4. Press INTERRUPT.
To terminate an 1FT request and also OLTEP or
OLTSEP, perform the following' steps:
1. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 4.
2. Set STORAGE ADDRESS/REGISTER DATA
switches Band C to X'FO'. OLTEP or
OLTSEP at the host and the 1FT request will
be terminated.
1FT Manual Intervention Routines
CCU Manual Intervention 1FT
1156
Storage protect keys.
1190
Customer usage meter.
Storage Manual Intervention IFTs
1215
Storage worst card analysis routine.
This routine requires approximately 12
minutes to run.
\
\
-
(
(
l
(/
--._-------
_.
(/ (
------._-------
(
Type 2 CSB Manual Intervention IFTs
1694
PCF state X'F' disable
1698
Transmit test for PCF state X'B'
1699
Transmit test for PCF state X'C'
169C
Modem interface
16FO
SDLC link test
16F2
Wrap data test (BSC and SDLC)
16F4
X.21 line set test (world trade only)
16F5
High speed local attachment oscillator
speed test
1FT SYMPTOM INDEX MASK FIELD AND
REGISTER USAGE
The "mask" field specifies the bits being tested.
A "0" in the mask field indicates that a bit
position is not tested. If the 1FT symptom index
lists a "mask" field for registers 4, 5, and 6
(program level 4, hexadecimal X'14', X'15', and
X'16'), the following contents are standard for
the registers:
Register 4 (X'14') contains the "mask" bits
being tested.
Register 5 (X'15') contains the bits in register
X'14' that are in error.
'
Register 6 (X'16') contains the bit pattern
expected in register X'14'.
EXAMPLE OF AN 1FT RUN
Following is an example of running an IBM
3705-80 INIT and 1FT. This example assumes
that the channel adapter OLTs have previously
been run successfully (see the CAOLT section).
(
(
{
(
----
(
(
("
(
In this example, all routines (except manual
intervention and external wrap) of alilFTs are run
for all adapters. Information is provided on how
to run individual tests using different parameters
such as error loops and test loops. The example
also shows a starting point if an unexpected error
stop occur.
-
~
f
(
(
«-
~.~.
(--
(
(-.
(-"
(
{
(
(
(
(
(~
(-
~.
(
(
ENTER DEV/TEST/OPT
xxx/3705A/nfe,ext=nyyy/'
This response requests that IFTs be loaded across the channel to the
3705. The ext parameter shown requests (1) print channel errors. (2) run
I NIT, (3) run type 1 CA loader with error checking. and (4) bypass hard
stop on a type 1 CA loader error.
S T3705A
It is assumed that OLTEP or OLTSEP is running in
the host CPU and the CDS is correct for all
adapters. It is also assumed that the MODE
SELECT and DIAGNOSTIC CONTROL switches
are set to PROCESS, and the
DISPLAY /FUNCTION SELECT switch is set to
STATUS.
This example does not completely test the LlBs
and Line Sets. More in-depth testing can be
done using the manual intervention routines (see
"Manual Intervention Routines" earlier in this
section). Manual intervention routines can be
used to further test storage and the customer
usage meter.
To specifically check line sets, the external wrap
manual intervention routines can be used.
Interaction between the communication scanner,
L1Bs, and/or line sets can cause scanner error
stops that are caused by the line sets.
In this example, messages from the system are
shown in upper case and information that you
must enter is shown in lower case.
THE STATUS OFTHE 3705 CANNOT
BE DETERMINED ..... WARNING ....
CONTINUATION WILL CAUSE THE
ENTIRE 3706 TO BECOME
UNAVAILABLE. ENTER 'C' TO
CANCEL OR 'P' TO PROCEED.
This message mayor may not be
printed depending on the
operating system.
'p'
PRESS LOAD ON 3705
Press LOAD on the 3705. The I FTs will load across the channel after I N IT
runs.
3705 LOADED WITH 1FT Z3705AAA
Z3705AAA is the type 1 CA loader.
3705 LOADED WITH 1FT Z3705ADA
INIT section 1 is now running. See the INIT section of this manual if an
error occurs.
WAITING FOR 1FT COMPLETION
This message occurs every 20 seconds while the tests are running in the
3705. No action is required.
3705 LOADED WITH 1FT Z3705AEA
I N IT section 2 is now running. See the I N IT section of this manual if an
error occurs.
3705 LOADED WITH 1FT Z3705ACA
The DCM is now in control of the 3705.
ENTER 1FT REQUEST AT 3705
See "How to Request an 1FT" in this section. Set the FUNCTION/
DISPLAY SELECT switch to FUNCTION 4. DISPLAY A and DISPLAY B
should both be X'FFFF'. The HARD-STOP and PROGRAM DISPLAY
lamps should be on. Set the STORAGE ADDRESS/REGISTER DATA
switches to X'OOOO' and press START. DISPLAY B should be X'S002'.
The HARD-STOP and PROGRAM DISPLAY lamps should be on. Press
START. All tests will run on all adapters.
3705 LOADED WITH 1FT Z3705BAA
For a list of the 1FT sections, see "What 1FT Does" earlier in this section.
3705 LOADED WITH 1FT Z3705BBA
3706 LOADED WITH 1FT Z3705BCA
3706 LOADED. WITH 1FT Z3705CAA
After this point, the actual modules that are run depend on the hardware
CDS. The list in this example only shows the CCU and storage 1FT
sections. If an unexpected error stop occurs, see the 1FT Symptom Index
at the back of this section.
WAITING FOR 1FT COMPLETION
DISPLAY A = X'FFFF' and DISPLAY B =X'SOFO' indicates that the IFTs
have completed and no errors were detected. Terminate testing by setting
X'FOXX' in STORAGE ADDRESS/ REGISTER DATA switches BCDE
respectively. Then press START.
TT3705A
Figure IFT-4. Example of an 1FT Run
Internal Functional Test Description
1FT 010
C
IFT012
Interned Functlonal Test Description
FAILURE INDICATIONS
If an error is detected during execution of 1FT and
the following conditions are met, use the
information displayed in DISPLAY A and
DISPLAY B to find a code in the 1FT Symptom
Index.
1. The LOAD light is off. If the LOAD light is
on, see the error displays for the ROS, INIT,
or 1FT loader."-------"c-'"-~
2. 'II1~llt-must be on. If the TEST light
is off and the LOAD light is on, see the error
displays for the ROS, INIT, or 1FT loader. If
both the TEST light and the LOAD light are
off, see the error displays for ~he 1FT loader.
3. The DISPLAY /FUNCTION SELECT switch is
set to FUNCTION 4, 5, or 6. If it is not, see
"Refresh Last DCM Display Code" in the
DCM section.
4. The PROGRAM DISPLAY light is on. Ifthe
PROGRAM DISPLAY light is off, see
"Determining Why PROGRAM DISPLAY
Light Is Not On" in the DCM section.
5. After several 1FT routines have been: run
thCJtcaused errors, the pr~bable cause of
the error is the card inthe location with
highest number of error indications.
The list of suspected cards is not exhaustive
and it may not indicate the-exact failing card.
If after replacing a suspected card, the
failure persists, scoping the signals into and
out of the card may help you determine the
cause of the failure.
How to Find an 1FT Symptom Index Error
Code
If an 1FT error occurs, the data displayed in
DISPLAY A and DISPLAY B is in: the following
format:
DISPLAY A
DISPLAY B
Where:
=
P
How to Use the 1FT Symptom Index
If an 1FT error occurs, u'se the data displayed in
DISPLAY A and DISPLAY B to find a code in the
1FT Symptom Index which will show one or more
cards suspected of causing the failure.
A troubleshooting technique to use is:
P I RR
T S KK
=
=
RR
=
T
S
KK
=
=
=
The 10 of the adapter being tested when
the failure occurred
The 1FT number,being run when the
failure occurred
The routine number being run when
failure occurred
The type of display code
Scoping indicator and error counter
Code reference in symptom index
1. When an error occurs, record the suspected
failing card location (or locations).
2. Continue the 1FT with the next routine (using
FUNCTION 6).
3. If another error occurs, again record the
suspected failing card location (or
locations).
4. Repeat the previous step several more
times.
'\
J
/"-).
I
'.
./
t)
"'-'
-'"
)
<'
f,
'--.
·i
c'
~-
'j
.'
Each of the above characters represents a 4-bit
hexadecimal q,igit. Note also that byte X is not
used.
Use the following procedure to find a code in the
)fT symptom index:
'l
I
"-/
'~
Y
./~
,-j
~
"-
~;
0:
\..,/
r~
(",,,,,
"-. j
'-- ./
,f'''- '
'--,j
tf'~
\~
>-,
'
,I
~
-~
' __ P.i
-~
\J
,
).
,
'\I
,~)-"
0
~;/
1''''1
,j
r",
0
I'-~
~j
'',
J
()
.
/'~
"
,~
.
I
,-,J
~---
(
(
--
(/
----
(~
c:
(
(
(
(-
(
(
(-
(-.
.~"
/
(-, (
/
,(-
(
(
(
, ~~:
(
(
(/ (
A B C 0
1 1 1 1
E F
001
006
014
Is T equal to 8 (DISPLAY B first hex digit)7
Is T equal to 6 or 7 (DISPLAY B first hex digit)7
Y N
Y N
Information is being displayed. The display
indicates either errors or correct operation.
T
007
Is T equal to
(
PAGE 2 OF 2
PAGE 1 OF 2
002
(
o (DISPLAY B first hex digit)7
Is T equal to 9 or A (DISPLAY B first hex
digit) 7
Y N
E
E
Y N
1
6
CCU
CSB type 2
003
Is T equal to 1 or 2 (DISPLAY B first hex digit)7
008
015
Y N
Is T equal to B or 0 (DISPLAY B first hex
digit)7
A pretest error or an error common to the 1FT
routines has been detected: 1 indicates pretest, 2
indicates common error.
The I field (DISPLAY A second hex digit) indicates
the 1FT Symptom Index to use.
004
Y N
Is T equal to E (DISPLAY B first hex digit)7
009
Y N
Ensure that the DCM and 1FT loaded
properly and that the required conditions
described prior to this procedure were met.
005
Is T equal to F (DISPLAY B first hex
digit)7
T
1/2
1/2
1/2
1/2
1/2
010
Y N
See the section 'Dynamic Communication To
Routines' (DCM section). This display is from
that DCM panel utility.
2
3
6
9
CCU
Storage
CA type 1
CSB type 2
CA type 4
011
016
See 'Set, Reset, Display CE Sense Switches'
(DCM section). This display is from that OCM
panel utility.
The 1FT has detected an error and an error code is
displayed.
The I field (DISPLAY A second hex digit) indicates
'
"
the 1FT .
Symptom
Index to use.
I
f
012
See 'Set or Display Repeat Count' (DCM section).
This display is from that DCM panel utility.
013
A manual intervention stop code is being displayed.
T
F
F
1
6
CCU
CSB type 2
T
0
0
0
0
0
1
2
3
6
9
CCU
Storage
CA type 1
CSB type 2
CA type 4
017
See the DCM symptom index (DCM Section) for a
description of the disp.lay. DISPLAY A indicates which
adapter, which 1FT, and which routine is active.
DISPLAY A equal. to X'FFFF' indicates the OCM is
ready to accept a new request.
2 2 2 2
ABC 0 E F
Internal Functional Test Description
1FT 014
This page intentionally left blank
""
./
~
"
/
f
-
!
"\
'''"~
r
"\
/--"',
;--",
"-
./
"
./
\- ./
I
I
"
/
I
j
I
"-
L"
l
'... /
/"""\
"r'""".
I
/
/'~
\. j
'"
I
"J
"-
"/ r-"',
',,--/
/--
~
(
I
",
./
~
.
",
/
_____ 0 _ _ _ _ _ _ _ _ _ 0_ _ _ _ _ _ _ _
(.
(
,../
(-/ {/' (. (
0/
(
(
(
(
(
(
(
('
«
(
(
(
(
(
(
(
(
(
{
(
(
(
(.
f
(
(
(
3705·80 CCU 1FT SYMPTOM INDEX
Routine
Error
Code
Suspected Card
Location(s)
Program
Mask
1102
OX01
The interval timer L3 irpt should occur every 100 milliseconds.
This routine tests for an accuracy of ± 3 percent. Did L3 timer
irpt occur prior to 97 ms?
The timer L3 irpt occurred in less than 97 ms.
A·B3L2
A·B3US
DOFF
CP007
CC007
6·090
Reg X'1S' indicates percent of error. If reg X'1S'
equals X'0004', the error is 4 percent which means
the timer irpt occurred at 96 ms.
OX02
Did L3 timer irpt occur after 103 ms?
The timer L3 irpt occurred later than 103 ms.
A·B3L2
A·B3US
OOFF
CP007
CC007
6·090
Reg X'1S' indicates percent of error. X'OO04'
indicates 4 percent error. The irpt occurred at
104 ms.
OX03
Default test. If an irpt does not occur within 110 ms, this routine
will halt.
A timer L3 irpt did not occur within 110 ms.
A·B3L2
A·B3US
N/A
CP007
CC007
6·090
Standard DCM display does not apply.
1103
OX01
Memory size test. Input X'70' is compared with the BSM count
(contained in the Configuration Data Set (CDS) to verify that the
two agree.
Input X'70' and CDS BSM count did not compare.
A·B4E2 (If CDS
count is correct.)
N/A
CM002
4-070
6·770
Reg X'14' = CDS BSM count. Reg X'1S' = Input
X'70' converted to BSM count. Reg X'16' =
Input X'70'.
1104
OX01
Z bus parity checker. Bit 7 of bytes X,D, and 1 is complemented
to forced bad parity. The CCU ck reg is tested for expected data.
Routine makes 2S6 passes starting with data 00000 using an
update value of X'10101'.
The actual CCU ck reg data is in error. The Z parity checker
failed to detect bad parity. CCU ck reg is input X'7D'.
See Note S.
A·B3N2
A·B3G2
FFFF
CK003
COOOS
6·0S0
See Note 1.
OX02
Did the force error function produce the correct data?
The actual data produced by the force error function did I')ot
compare with the expected data.
A·B3S2
A-B3G2
3FFFF
CK001
COOOS
6·0S0
OX01
Z bus parity checker. Bit 6 of bytes X,D, and 1 is complemented
to force bad parity. The CCU ck reg is tested for expected data.
Routine makes 2S6 passes starting with data 00000 using an
update value of X'10101'.
The actual CCU ck reg data is in error.
See Note S.
A·B3N2
A·B3G2
FFFF
CK003
COOOS
6·0S0
OX02
Did the force error function produce the correct data?
The actual data produced by the force error function did not
compare with the expected data.
A·B3S2
A·B3G2
3FFFF
CK001
COOOS
6·0S0
OX01
Z bus parity checker. Bit S of bytes 0 and 1 is complemented
to force bad parity. The CCU ck reg is tested for expected data.
Routine makes 2S6 passes starting with data 00000 using an
update value of X'10101'.
The actual CCU ck reg data is in error.
See Note 5
A·B3N2
A·B3G2
3FFFF
CKOO3
COOOS
6·0S0
OX02
Did the force error function produce the correct data?
The actual,data produced by the force error function did not
compare with the expected data
A·B3S2
A·B3G2
3FFFF
CKOO1·2
COO05
OX01
Z bus parity checker. Bit 4 of bytes 0 and 1 is complemented
to force bad parity. The CCU ck reg is tested for expected data.
Routine makes 2S6 passes starting with data 00000 using an
update value of X'10101'.
The actual CCU ck reg data is in error.
See Note 5.
A·B3N2
A·B3G2
FFFF
CKOO3·7
COOOS
OX02
Did the force error function produce the correct data?
The actual data produced by the force error function did not
compare with the expected.
A·B3S2
A·B3G2
3FFFF
CKOO1
COOOS
6·0S0
OX01
Z bus parity checker. Bit 3 of bytes 0 anq 1 is complemented
to force bad parity. The CCU ck reg is tested for expected data.
Routine makes 2S6 passes starting with data 00000 using an
update value of X'10101'.
The actual CCU ck reg data is in error
See Note S.
A·B3N2
A·B3G2
FFFF
CKOO3
COOOS
6-OS0
OX02
Did the force error function produce the correct data?
The actual data produced by the force error function did not
compare with the expected data.
A·B3S2
A·B3G2
3FFFF
CK001
COOOS
1105
1106
1107
1108
Function Tested
Error Description
FEALD
Page
FETMM
Page
Comments
,
See Note 1.
See Note 1.
See Note 1.
See Note 1.
Z3705BAA CCU 1FT SYMPTOM INDEX
CCU 050
(
Z3705BAA CCU 1FT SYMPTOM.lNDEX
3705-80 CCU I FT SYMPTOM INDEX - Cont.
Suspected Card
Error
RouIine
c.-
1109
OX01
Z bus parity checker. Bit 2 of bytes 0 an 1 is complemented
to force bad parity. TheCCU ck reg is tested for expected data.
Routine makes 256 passes starting with data 0000 using an
update value of X'10101'.
OX02
Did the force error function produce the correct data?
110A
See note S.
A·B3N2
A·B3G2
FEAlD
Page
FFFF
OKOO3
caoos
The actual data produced by the force error function did not
compare with the expected data.
A·B3S2
A·B3G2
3FFFF
CKOO1
Ca005
FETMM
Page
Comments
6-0S0
See Note 1.
See Note 1.
The actual CCU ck reg data is in error.
See Note 5.
A·B3N2
A·B3G2
FFFF
CK003
Ca005
6·050
OX02
Did the force error function produce the correct data?
The actual data produced by the force error function did not
compare with the expected data.
A·B3S2
A·B3G2
3FFFF
CKOOl
Ca005
6·050
Z bus parity checker. Bit 0 of bytes 0 and 1 is complemented to
force bad parity.
OX01
The CCU ck reg is tested for expected data. Routine makes 256
passes starting with data 00000 using an update value of.
X'10101 '.
The actual CCU ck reg data is in error.
See Note 5.
A·B3N2
A·B3G2
FFFF
CKOO3
Ca005
6·050
OX02
Did the force error function produce the correct data?
The actual data produced by the force error function did not
compare with the expected data.
A·B352
A·B3G2
3FFFF
CKOOl
Ca005
6·050
See Note 1.
A reg parity checker. Output X'78' (force CCU checks) with
mask X'0020' is used to force bad parity.
OX01
The CCU reg is tested for the expected data. Routine makes 256
passes starting with data 00000 using an update value of
X'10101'.
The A reg parity checker failed to detect bad parity
See Note 5.
A·B3N2
A·B3G2
FFFF
CK003
caoos
6·920
OX02
Did the force error function produce the correct data?
The actual data produced by the force error function did not
compare with the expected data.
A·B3S2
A·B3G2
3FFFF
CKOOl
caoos
6·920
OX01
B reg parity checker. Output X'78' with mask X'0040' is used
to force bad parity. The CCU ck reg is tested for the expected
data.
The B reg parity checker failed to detect bad parity.
See Note 5.
A·B3N2
A-B3G2
FFFF
CKOO3
caoos
6·920
OX02
Did the force error function produce the correct data?
The actual data produced by the force error function did not
compare with the expected data.
A·B3S2
A·B3G2
3FFFF
CK001
caoos
6·920
The actual CCU ck reg data is in error.
See Note 6.
A·B3N2
A·B3S2
FFFF
CK001
CU013
CU013
6-920
See Note 1.
See Note 1.
SDR reg parity checker test. Output 'X78', (force CCU checks)
with mask X'0040' is used in conjunction with an output
instruction to force SDR errors. The output instruction that
forces the error is reg X'15' output to reg X'1A'. Routine makes
256 passes starting with data 00000 using an update value of
X'10101 '.
OX01
'-
The actual CCU ck reg data is in error.
Program
Mask
The CCU ckreg is tested for expected data. Routine makes 256
passes starting with data 00000 using an update value of
X'10101'.
110E
O
•
location(s)
OX01
110C
/e
Error Description
Z bus parity checker. Bit 1 of bytes 0 and 1 is complemented to
force bad parity.
110B
1100
Function Tested
CCU 052·
('
'\
/
The CCU ck reg is tested for the expected error bits.
I'-'~
\,,/
Reg X'16' will contain the test data that was used
to output to reg X'lA'.
( '\
(
',-
(
(
(
(
(
(
(
(
(
...
(
(
(
(
{
(
>~,
(-~
'
..
/
('\ (' (
..'
(
(' (
3705-80 CCU I FT SYMPTOM INDEX - Cont.
Routine
Error
Code
110F
1110
1113
1114
1115
Function Tes:aed
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
Indata parity checker test. OutputX'78' (Force CCU checks)
with mask X'0010' is used in conjunction with an input
instruction to force indata parity errors. Routine makes 256
passes starting with data 00000 using an update value of
X'10101'.
OX01
The CCU ok reg is tested for the expected error bits.
The actual CCU check reg data is in error.
A-B3S2
A-B3N2
FFFF
CK001
CU013
6-920
Reg X'16' will contain the test data that was in
reg X'1A' when the input from reg X'1A' was
executed.
OX01
SAR parity checker test. Output X'78' (force CCU checks) with
mask X'0040' is used to force bad parity. The CCU ck reg is
tested for the expected error bits.
The SAR parity checker failed to detect bad parity.
See Note 7.
A-B3N2
A-B4G2
A-B4H2
FFFF
CK003
OP993
6-920
See Note 1.
OX02
Did the force error function produce the correct data?
The actual data produced by the force error function did not
compare with the expected data.
A-B3S2
A-B3G2
A-B3H2
FFFF
CKOO1
OP993
OR993
6-920
OX01
L4 is interrupted by L3 via a PCI L3 irpt. Irpt req grp 2 (X'7F')
is tested for a PCI L3 bit.
The PCI L3 irpt failed to occur.
A-B3G2
A-B3M2
A-B3J2
FOFB
COOD5
COO01
CU015
CP002
CA003
6-920
6-860
OX02
Before forcing the L3 irpt, the L4 CZ latches are set to CZ = 10.
On return to L4 the CZ latches are tested to ensure that L3 did
not alter the preset L4 CZ latches.
The L4 CZ latches were altered by the PCI L3 irpt.
A-B3G2
0003
czxxx
6-090
OX01
L4 is interrupted by L3 via a PCI L3 irpt. Irpt req grp 2 (X'7F')
is tested for a PCI L4 bit.
The PCI L3 irpt failed to occur.
A-B3G2
A-B3M2
A-B3J2
FOFB
COO05
COO01
CU015
CP002
CA003
6-090
6-860
OX02
Before forcing the L3 irpt, the L4 CZ latches are set to CZ = 01.
On return to L4 the CZ latches are tested to ensure that L3 did
not alter the preset L4 XZ latches.
The L4 CZ latches were altered by the PCI L3 irpt.
A-B3G2
0003
CZXXX
6-090
OX01
L2 masking and unmasking functions are tested. L2 is masked
and then an attempt to force an L2 irpt, via diag L2 function,
is performed.
The L2 mask function failed to prevent an L2 irpt.
A-B3M2
FOFB
CPOD2
COO01
COO01
6-090
6-940
OX02
L2 is unmasked and an L2 irpt is forced via diag L2 function.
The L2 unmask function failed.
A-B3M2
FOFB
CP002
COO01
COO01
6-090
6-950
A-B3M2
FOFB
CP002
6-860
A-B3G2
0003
CZXXX
6-090
1116
OR993
See routine 1113.
L4 is interrupted by L2 via the diag L2 function.
OX01
Irpt req grp 2 (X'7F') is tested for a diag L2 bit.
The diag L2 irpt failed to occur.
OX02
Before forcing the L2 irpt, the L4 CZ latches are set to CZ =01.
On return to L4 the CZ latches are tested to ensure that the L2
irpt did not alter the preset L4 CZ latches.
The L4 CZ
= 10 latches were altered by the diag L2 irpt.
.,
Z3705BAA CCU 1FT SYMPTOM INDEX
CCU 054
3705·80 CCU 1FT SYMPTOM INDEX· Cont.
......
1117
1118
Enor
Code
Function Tested
Suspected Card
Location(s)
Error Description
Program
Mask
FEALD
Page
A·B3G2
FOFB
CP002
6·090
A·B3G2
0003
CZXXX
6·090
FETMM
Page
OX01
L4 is interrupted by L2 via the diag L2 function.
The diag L2 irpt failed to occur.
OX02
Before forcing the L2 irpt, the L4 CZ latches are set to CZ = 01.
On return to L4 the CZ latches are tested to ensure that the L2
irpt did not alter the preset L4 CZ latches.
TheL4 CZ
OX01
L4 is interrupted by a L1 irpt via a I/O check. The utility reg
X79' is tested to v~rify that L4 was interrupted.
The utility reg did not contain the prog L4 interrupted bit.
(L1 failed to irpt.)
,.
A·B3M2
OOFO
CP004
6·830
OX02
Irpt req grp 1 X7E' is tested for the I/O check L1 bit.
The I/O check L1 bit did not set. An L1 irpt did not occur.
N/A
FFFF
CU014
6·850
OX03
Before forcing the L1 irpt, the L4 CZ latches are set to CZ = 10.
On return to L4 the CZ latches are tested to ensure that the L 1
did not alter the preset L4 CZ latches.
The L4 CZ = 10 latches were altered by the L1 irpt.
A·B3G2
0003
CZXXX
6·090
A·B3L2
A·B3G2
OOFO
CU014
CP002
6·803
A·B3G2
0003
1119
= 10 latches were altered by the diag
L2 irpt.
CCU 056
Comments
Se~
routine 1116.
Bypass troubleshooting this error until error code
OX02 of this routine has run without an error.
L4 is interrupted by an L1 irpt via an I/O check.
OX01
The utility reg X'79' is tested to verify if L4 was interrupted.
L1 failed to irpt.
OX02
Irpt req grp 1 X'7E' is tested for the I/O check L1 bit.
The I/O check L1 bit did not set.
OX03
Before forcing the L1 irpt, the L4 CZ latches are set to CZ
111A
1118
Z3706BAA CCUIFT SYMPTOM INDEX
= 01.
FFFF
The L4 CZ = 01 latches were altered by the L1 irpt.
CZXXX
See routi ne 1118.
6·050
6·090
L3 is interrupted by a diag L2 function.
See routine 1113.
1X01
Since the OCM runs under L4, an L3 irpt Is forced via 'PCI L3
to allow this routine to test while in L3.
Pretest error.
OX01
An L2 Irpt is forced via diag L2. The irpt req grp 2 X'7E' is
tested to verify that diag L2 bit was set.
The diag L2 irpt failed to occur when running under L3.
FOFB
6·830
OX02
Before forcing the L2 irpt, the L3 CZ latches are set to CZ .. 10.
The L3 CZ = 10 latches were altered by the L2 irpt.
0003
6·090
1:X01
Since the OCM runs under L4, an L3 irpt is forced via PCI L3
to allow this routine to test while in L3.
Pretest error.
OX02
Before forcing the L2 irpt, the L3 CZ latches are set to CZ = 01.
The L3 CZ = 01 latches were altered by the L2 irpt.
111C
6·940
See routine 1116.
6·940
0003
6·830
L3 is interrupted by L1 via an I/O check L1.
See routine 1113.
1X01
Since the OCM runs under L4, and L3 irpt is forced via PCI L3
to allow this routine to test while in L3.
Pretest error.
OX01
The utility reg X'79' is tested to verify that L3 was interrupted.
The utility reg did not contain the prog L3 interrupted bit.
OX02
The L1 irpt is forced via I/O check L1.
The I/O check bit did not set. An L1 irpt did not occur
when running under L3.
OX03
Before forcing the L1 irpt, the L3 CZ latches are set to CZ = 10.
On return to L3 the CZ latches are tested to ensure that the L1
irpt did not alter the presetL3 CZ latches.
The L3 CZ = 10 latches were altered by the L1 irpt.
6·940
A·B3M2
6·830
Bypass troubleshooting this error until error code
OX02 of this routine has run without failure.
FFFF
6·050
See routine 1118.
0003
6·090
OOFO
CP004
,
/
/
c
I"~
'--~,/
'\
('
"
\"J
""'"'""I
'--
j
I
r-'~
''----, /
,
---,.."
""
r~
\
I
"'"
,/
"
,/
'----,/
"'---_/
\
'.'"
/
(
\
\",j
'-
"
"
/
"
,.tt!.• -"",
r
'
,----/'
r'~
/'
· ..
(.,' (
L
(/
L
(
(
(
(
(
(
-~----~---
(
(
(
('
f
(
C
(
~~"'-
(
(
(
(j
(
(
(
(-'
(' (.': (
C~
(
(
3705-80 CCU I FT SYMPTOM INDEX - Cont.
Error
Routine
Code
Func:tioll'l T ....
1110
1X01
Since the OCM runs under L4, an L3 irpt is forced via PCI L3
to allow this routine to test while in L3.
Pretest error.
OX01
The utility reg X'79' is tested to verify that L3 was
interrupted.
The utility reg did not contain the prog L3 interrupted bit.
OX02
The L1 irpt is forced via I/O check L1.
The I/O check bit did not set. An L1 irpt did not occur
when running under L3.
OX03
Before forcing the L 1 irpt, the L3 CZ latches are set to CZ = 01.
The L3 CZ
111E
Program
FEAlO
Mask
Page
FETMM
Page
A-B3M2
latches were altered by the L1 irpt.
OOFO
CP004
6-830
FFFF
6-050
0003
6-090
6-050
Since the OCM runs under L4, an L2 irpt is forced via diag L2
irpt. This will allow the routine to test while in L2.
Pretest error.
OX01
The utility reg X'79' is tested to verify that L2 was interrupted.
The utility reg did not contain the prog L2 interrupted bit.
OX02
The L1 irpt is forced via an I/O check L 1. Irpt req grp 1 X'7E'
is tested to verify.
The I/O check L1 bit did not set. An L 1 irpt did not occur
when running under L2.
OX03
Before forcing the L1 irpt, the L2 CZ latches are set to CZ = 10.
On return to L2, the CZ latches are tested to ensure that the L1
irpt did not alter the preset L2 CZ latches.
The L2 CZ
1X02
Since the OCM runs under L4, an L2 irpt is forced via diag L2
irpt. This will allow the routine to test while in L2.
Pretest error.
OX01
The utility reg X'79' is tested to verify that L2 was interrupted.
The utility reg did not contain the prog L2 interrupted bit.
OX02
The L1 irpt is forced via an I/O check L1. Irpt req grp
1 X'7E'is tested to verify.
The I/O check L1 bit did not set. An L1 irpt did not
occur when running under L2.
OX03
Before forcing the L1 irpt, the L2 CZ latches are set to CZ
On return to L2, the CZ latches are tested.
= 01.
The L3 CZ
A-B3M2
A-B3M2
latches were altered by the L 1 irpt.
OOFO
See routine 1116.
6-830
Bypass troubleshooting this error until error code
OX02 of this routine has,run without failure.
FFFF
6-850
See routine 1118.
0002
6-090
OOFO
FFFF
CP004
CP004
0003
6-090
See routine 1117.
6-830
See routine 1119.
6·860
See routine 1118.
-
6-090
This routine does an irpt display-chain from L4 to L3 to L2 to
L1 to L3 to L4. The CZ latches for L4, L3, and L2 are preset
to a known state before forcing the next irpt. Each is checked
on return to its level.
6-080
1X01
L4 is interrupted by L3 via PCI L3.
Pretest error.
1X02
L3 is interrupted by L2 via diag L2.
Oiag L2 irpt failed to occur.
N/A
6-090
0)(01
Before forcing the L3 irpt, the L4 CZ latches are set to CZ = 10.
On return to L4, the CZ latches are tested to ensure that the
L3, L2, and L1 irpt did not alter the preset L4 CZ latches.
The L4 CZ = 10 latches were altered by the L3, L2, and L1 irpt
daisy-chain.
0003
6-090
OX02
Before forcing the L2 irpt, the L3 CZ latches are set to CZ
On return to L3, the CZ latches are tested.
The L3 CZ = 10 latches were altered by the L2 and L1 irpt
daisy chain.
0003
6-090
OX03
Before forcing the L1 irpt, the L2 CZ latches are set to CZ = 10.
On return to L2, the CZ latches are tested.
The L2 CZ
0003
6-090
OX01
L4 masking and unmasking functions are tested. Since the OCM
runs under PCI L4, this routine resets PCI L4 and waits for an
L3 interval timer L3 irpt. L4 is then masked and tested. On the
next timer L3 irpt, L4 is unmasked and tested.
The L4 mask function failed to prevent a PCI L4 irpt from
occurring.
= 01.
Bypass troubleshooting this error until error code
OX02 of this routine has run without failure.
See routine 1118.
6-090
= 10 latches were altered by the L1 irpt.
= 01
Comments
6-940
1X02
1120
1121
= 01
Suspected Card
location(s)
L2 is interrupted by L1 via an I/O check L1.
I
111F
Error Description
See routines 1113-111 F.
6-090
= 10 latches were altered by the L1 irpt.
A-B3M2
A-B3L2
N/A
CPOO2
CP006
6-090
6-940
Z3705BAA CCU 1FT SYMPTOM INDEX
CCU 058
C
3705-80 CCU I FT SYMPTOM INDEX - Cont.
Routine
Error
Code
Z3705BAA CCU 1FT SYMPTOM INDI:X
Function Tested
Error Description
Suspected Card
Location(s)
Program
Ma*
FEALD
Page
FETMM
Page
1121
OX02
L4 is unmasked and a PCI L4 irpti~ set while in L5. An exit
from L3 is performed and L4 should itpt via PCI L4.
The L4 unmask function failed. A PCI L4 irpt did not occur.
A-B3M2
N/A
CP002
6-090
6-950
1122
OX01
L3 masking and unmasking functiohs are tested. L3 is masked;
an attempt is made to force an L3 irpt via a set PCI L3 irpt.
The L3 mask function failed to prevent a PCI L3 irpt from
occurring. If the L5 mask function is not active, false errors
may occur. If so, run routine 1124 to test the L5 mask function.
A-B3M2
N/A
CP002
6-940
6-950
6-940
OX02
L3 is unmasked, an attempt is made to force a L3 irpt via a set
PCI L3 irpt.
The L3 unmask function failed. A PCI L3 irpt did not occur.
A-B3M2
N/A
CP002
6-940
OX01
In order to reachL5, the PCI L4 irpt must be reset and an exit
from L4 is performed.
L5 failed to become active or L4 failed to exit (previously
tested).
A-B3M2
N/A
CPOO3
6-090
OX02
The exit from L5 should set svc L4 irpt. The irpt reg grp 2 X'7F'
will be tested to verify this.
The L5 exit failed to set svc L4 irpt bit.
A-B3M2
0001
CU015
6-860
OX03
The L4 svc L4 irpt will be reset to verify that it can be reset.
Svc L4 irpt failed to reset.
A-B3M2
0001
CU015
6-090
OX05
An L5 exit is performed.
L5 failed to exit.
N/A
FFFF
CU014
6-850
0010
CP004
6-830
1124
112A
Comments
This routine tests for an L4 service irpt (svc L4) when an exit
from L5 is performed.
1123
1125
CCU 060
6-750
This routine tests that L5 can be interrupted by L1.
OX01
L5 is interrupted by L1 via an I/O check. Irpt reg grp 1 X'7E' is
tested to verify that a L1 irpt did occur.
The I/O check L1 bit did not set. L1 irpt failed to occur.
OX02
The utility reg X'79' is tested for a prog L5 interrupted bit. The
L1 irpt should cause the utility reg to set the above bit.
The prog L5 interrupted bit failed to set.
OX03
Before forcing the L1 irpt, the L5 CZ latches are set to CZ = 01.
On return to L5, the CZ latches are tested.
The L5 CZ = 01 latches were altered by the L1 irpt.
OX04
On return to L4, the saved utility reg is tested to verify that the
L5 CZ condition bits are correct.
The CZ = 01 bits in the utility reg are in error.
OX05
Upon return to L4 and after the above tests have been run, the
utility reg is tested to verify that the exit from L2, L5, and the
L4 irpt did not affect the L5 CZ = 01 latch.
The CZ = 01 bits of the utility reg are in error. The L5 exit or svc
14 irpt affected the L5 CZ latch.
OX01
The masking and unmasking of L5 is tested. L5 is masked and
instruction execution is halted on L4 and an exit from L4 is
performed. This should allow L5 to become active if the masking
function failed.
The L5 masking function failed.
OX02
L5 is unmasked to allow L5 to become active.
The L5 unmask function failed.
OX01
Invalid input reg decode testing. An attempt is made to input to
an invalid reg. An I/O check L1 irpt should result. Invalid reg
values are in a table. Irpt req grp 1 X'7E' is tested for an I/O
check L1 bit.
The invalid input reg failed to set I/O check.
The LAR reg is tested to verify that the L1 irpt occurred at the
invalid test slot.
LAR reg failed to track or the L1 irpt occurred at the wrong adr.
OX02
A-B3M2
6,090
0003
A-B3M2
A-B3M2
0300
CP004
6-090
0300
CP004
6-090
N/A
CP002
6-940
6-950
6-950
N/A
A-B3L2
FFFF
CK007
CU014
COOD1
CD001
6-120
6-120
6-850
3FFFF
CSOO1
6~800
A-B3K2
A-B3H2
A-B3M2
Reg X'16' will contain the value of the input reg
that produced the error. Errors in this routine
could be external to the CCU. (CSBs~ CAs).
Byte 0 bit 0-3 and byte 1 bits 0-3 are the two hex
values that define the reg.
".
,
"- ./
1"-
. . ;/
('~
'0
'""
,:)
~'~
/~
\ ..... _/
." ./
.
r''l,
\.....j
~.~
/
(~
',-
/
,,~
0'--.j
f
,
I'
0
""
0
\.-y
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
Error
Routine
Code
112B
OX01
OX02
112E
112F
1130
1131
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
A-B3L2
FFFF
CK007
CU014
CQ007
COOOl
6-120
6-850
Comments
Invalid output reg decode testi,ng. An attempt is made to output
an invalid reg. An I/O check L1 irpt should result. Invalid reg
values are in a table. Irpt reg grp 1 X'7E' is tested for an I/O
check.
The invalid output reg failed to set I/O check.
The LAR is tested to verify that the L1 irpt occurred at the
invalid test slot.
LAR failed to track or the L1 irpt occurred at the wrong adr.
A-B3M2
3FFFF
CSOOl
6-800
CU014
6-050
6-850
Reg X'16' will contain the value of the op that
caused the error.
Reg X'16' will contain the value of the invalid op
that caused the error.
A-B3K2
A-B3H2
Reg X'16' will contain the value of the output reg
that produced the error. Byte 0 bits 0-3 and byte
1 bits 0-3 are the two hex values that define the
reg.
Invalid op (instruction) testing.
112C
1120
Function Tested
OX01
An attempt is made to execute a half-word of code that is invalid.
Invalid operations are in a table. Irpt req grp 1 X'7E' is tested for
a op check L1 bit.
The invalid op failed to set op check L1.
A-B3L2
FFFF
OX02
The LAR is tested to verify that the L1 irpt occurred at the
invalid test slot.
LAR failed to track or the L1 irpt occurred at the wrong adr.
A-B3M2
3FFFF
OX01
Invalid op (instruction) testing. An attempt is made to execute
a half-word of code that is invalid. The invalid ops are formed
from table data ORed with a varying data field. This routine
makes over 300 passes. Irpt reg grp 1 X'7E' is tested for a op
check L1 bit.
The invalid op failed to set op check L1.
A-B3L2
FFFF
CU014
6-050
6-850
OX02
The LAR is tested.
LAR failed to track or the L1 irpt occurred at the wrong adr.
A-B3M2
FFFF
CSOOl
6-800
OX01
Invalid op (instruction) testing. An attempt is made to execute
a halfword of code that is invalid. The invalid ops are formed
from data table data ORed with a varying data field. This routine
makes over 600 passes.
The invalid op failed to set up check L1.
A-B3L2
FFFF
CU014
6-050
6-850
Reg X'16' will contain the value of the invalid op
that caused the error.
OX02
The LAR is tested under routine 1120.
OX01
Invalid op (instruction) testing. An attempt is made to execute
a half-word of code that is invalid. The invalid ops are formed
from table data ORed with a varying data field. This routine
makes over 180 passes.
The invalid op failed to set op check L1.
A-B3L2
FFFF
CU014
6-050
6-850
Reg X'16' will contain the value of the invalid op
that caused the error.
OX02
The LAR is tested under routine 1120.
LAR failed to track or the L1 irpt occurred at the wrong adr.
A-B3M2
FFFF
CSOOl
6-800
OX01
Invalid op (instruction) testing. An attempt is made to execute
a half-word code that is invalid. The invalid ops are formed
from table data ORed with a varying data field. This routine
makes over 50 passes.
The invalid op failed to set op check L1.
A-B3L2
FFFF
CU014
6-050
6-850
OX02 i
The LAR is tested under routine 1120.
LAR failed to track or the L1 irpt occurred at the wrong adr.
A-B3M2
FFFF
CSOOl
6-800
1X03
Tests for an L1 program check when an invalid op is detected
while in L1. Since the OCM runs in L4, an invalid I/O check
will be used to force this routine to run in L1.
I/O check failed to force aLl irpt (pretest error).
OX01
Once L1 is active, an invalid op check is forced. Irpt req grp 1
X'7E' is tested for an invalid op check~
The invalid op failed to force an error when operating under L1.
A-B3H2
FFFF
COO04
OX02
The invalid op in L1 should set L1 prog check and CCU check.
CCU check reg X'70' is tested.
The L1 invalid op failed to set the expected check bits.
A-B3N2
FFFF
CK007
Reg X'16' will contain the value of the invalid op
that caused the error.
6-050
N/A
6-050
6-850
See routine 112C or 1120.
Z3706BAA CCU 1FT SYMPTOM INDEX
CCU 062
Z3705BAA CCU 1FT SYMPTOM,I~DEX
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
Routine
1132
&ror
Code
"',j
,~
\..
j
Error Description
Location(s)
Program
Mask
FEALD
Page
1X03
Te~ts
for an L1 program check when an invalid I/O check is
detected while in L1. Since the OCM runs i,n L4, an invalid
check will be used to force this routine to run in L1.
Initial I/O check failed to force andLl irpt (pretest error).
N/A
OX01
Once Llis active, an I/O check is forced. Irpt req grp 1 X'7E'
is tested for an I/O check.
The I/O check failed to force an error when operating under L1.
FFFF
CU014
OX02
The I/O check in L1 should set L1 prog check and CCU check.
CCU check reg X'70' is tested.
The L1 I/O check failed to set the expected check bits.
FFFF
CK007
1133
','.\
SUSpected Card
Function Tested
A-B3N2
CCU064
FETMM
Comments
Page
6-050
6-050
6-840
Address exception test. This routine attempts to load data from
the first invalid adr and expects an adr exception check to occur.
The adr under test is then increased in increments of 4K until the
maximum adr is reached.
,
OX01
Test for adr exception. Irpt req grp X'7E' is tested for adr exception check L1 bit.
Adr exception failed to occur.
OX02
LAR is tested to verify that it tracks and that the adr exception
occurred at the expected instruction.
LAR failed to track or adr exception check above failed to occur.
('')
'-....,y
r'lj
\j
'~
..... ~
,
'~
\'./
(~\
'..... j
"j
"'"
A-B4E2
A-B3F2
;-'\
\",./
,f-'
"
"
/'
('\
\"
_/
0040
CS002
CM003
FFFF
0
~
"
r"""h
~j
6-050
6·850
Register X'13' will contain the adr under test.
i
6·800
r'\
~
r
('
"
(/
(
(
(
(
(
(
(
(
(
(~
(
(
(
(
(
(
(
(
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
Routine
1134
Error
Code
OX01
1135
Function Tested
PCI L3 irpt reg unused bit testing. The data in reg X'11' is varied
from 0000 to FFFF to verify that the value of the data does not
matter. Instruction out reg X'11', PCI L3.
Suspected Card
Location(s)
Error Description
Program
Mask
PCI L3 irpt failed to occur (don't care bits do care).
FDF8
Data expected did not agree. Test instruction was between an
LHR and an OHR.
FFFF
FEALD
Page
FETMM
Page
.Comments
Reg X'16' will contain the value of reg X'11' when
the error occurred.
L4 instruction interaction test.
OX01
A given half-word instruction is inserted into an arithmetic
sequence at three different points to test for any interaction.
The test loop is repeated 48 times with different half-word
instructions.
Special Note:
6-220
Reg X'16' contains the half-word instruction that
caused the interaction.
The purpose of this test is to produce a random sequence of instructions to verify any interaction that may exist. The following code is listed to illustrate the technique used to detect interaction.
LA R2,X'8421,
LA R4,X'1248'
LHR R4,R4
** ----------- *
*TEST SLOT*
** ----------- *
OHR R2,R4
STH R2,SAVE1
LA R6,X'FFFF'
** ----------- *
*TEST SLOT*
XHR R2,R6
**
----------- *
*TEST SLOT*
**
----------- *
LA R5,X'9669'
NHR R2,R5
STH R2,SAVE2
R2=
R4=
R4=
1000
0001
0001
0100
0010
0010
0010
0100
0100
0001
1000
1000
The Instruction Under Test Is Stored In This Slot
R2= 1001 0110 0110 1001
Save R2 For Error Code OXOl Analysis
R6= 1111 1111 1111 1111
The Instruction Under Test Is Stored In This Slot
R2= 0110 1001 1001 0110
The Instruction Under Test Is Stored In This Slot
R5= 1001 0110 0110 1001
R2= 0000 0000 0000 0000
Save R2 For Error Code OX02 Analysis
Z3705BBACCU 1FT SYMPTOM INDEX
CCU 070
This page intentionally left blank
(
''-.
./
\-.
'~'.
/
,
~
/,4'~,
\. /
/~
'---~
,
.J
""',
'-. j
cc_"
!
"-.j
'--
j
\. --"/
__ /1
~j
'1
,-j
',---~
('-"
'\...j
("~,
~
(
-',
(
"
C"
''''\I
r'
/"",
I
"-.j
'\
j
----
(~
(
("
.---~.'
l
(j
(
f
(
t
---
(
~-
(
(
(
«
(
-~
(
«
(,
(
(
(
(
(j
(
(
('
(
{'
{
f' (
(
(
3705-80 CCU I FT SYMPTOM INDEX - Cant.
RoMine
Error
Code
1135
OX02
1136
The final sum of the arithmetic sequence is tested.
Error Description
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Data expected did not agree. The test instruction was between
an LA and an XHR.
FFFF
6-220
6-600
PCI L3 irpt failed (pretest error).
N/A
6-090
Diag L2 irpt failed (pretest error).
N/A
6-090
Invalid output reg failed to produce an L1 irpt (pretest error).
N/A
6-090
Comments
Same as OX01 above.
L3 instruction interaction test. This routine is the same as 1135
above except the test is run under program L3.
1X01
A PCI L3 irpt is used to force an L3 irpt.
OX01
Same as OX01 above under routine 1135.
OX02
Same as OX02 above under routine 1135.
1137
L2 instruction interaction test. This routine is the same as 1135
above except the test is run under program L2.
1X02
Diag L2 irpt is used to force an L2 irpt.
OX01
Same as OX01 above under routine 1135.
OX02
Same as OX02 above under routine 1135.
1138
1139
Suspected Card
Functiom Tested
L1 instruction interaction test. This routine is the same as 1135
above except the test is run under program L1.
1X03
An invalid output reg is used to force an L1 irpt.
OX01
Same as OX01 above under routine 1135.
OX02
Same as OX02 above under routine 1135.
OX01'
L5 instruction interaction test. This routine is the same as 1135
above except the test is run under program L5. Error is same as
OX01 above under routine 1135.
OX02
Same as OX02 above under routine 1135.
113C
6-090
.
Verify correct indication and operation of reg X7A'.
OX01
Input X7A' byte 0 bit 0 on (cycle utilization counter (CUC)
instruction).
CDS definition indicates CUC installed, but hardware indicator
bit is off.
A-B4T2
Verify that CDS definition in model/flag byte.
OX02
Input X'7A' byte 0 bit 0 is on (no CUC instruction).
CDS indicates CUC not installed, but hardware bit is on.
A-B4T2
Verify model/flag byte of CDS.
OX03
Cycle utilization counter value is not correct. Several passes are
made using different values.
A-B4T2
Reg X'14' contains actual CUC value. Reg X'15'
contains bits in error. Reg X'16' contains expected
CUC value.
113F
BSC CRC polynomial test. This routine will test the hardware
CRC circuitry to verify that the correct CRC character is
developed.
OX01
Using input reg X7B'.
The developed and expected CRC characters did not compare.
A-B3S2
FFFF
CR001-3
See comment below for Routine 1140.
Z3705BBA CCU 1FT SYMPTOM INDEX
CCU 072
(
3705·80 CCU I FT SYMPTOM INDEX· Cont.
Z3705BBA CCU 1FT SYMPTOM INDEX
Error
Routine
Code
Suspected Card
Program
Location(s)
Mask
FEALD
Page
The developed and expected CRC characters did not compare.
A·B3S2
FFFF
CR001·3
The developed and expected CRC characters did not compare.
A·B3C2
FFFF
F·UI!ICtion Testad
Error Description
FETMM
Page
CCU 074
Comments
,
1140
OX01
1142
1143
1144
'"
j
.
/'
This routine should run only when RPO 858655 is installed.
If the failing 3705·80 does not have RPO 858655 installed, check
the CDS data.
See comments for routine 1140.
/
ALC CS3 reg test. This routine should run only when RPO
858911 is installed. If RPO 858911 is not installed, check the
CDS data.
OX01
r~
Register X'13' will contain an adr pointer to the
data table. To determine the old CRC, data character, and expected new CRC display the following
storage adrs:
Reg X'13' adr =old CRC.
Reg X'13' adr plus 2 = data.
Reg X'13' adr plus 4 = new CRC.
Note: Reg X'13' above implies the adr is contained
in reg X'13'.
CRC Polynomial Testfor Airline Line Control (ALC) RPO
#858655
OX01
/'
8·Bit CRC polynomial test.
Test bits for rcv/xmt direction and all CCC bits in input and
output X'75'.
I/O regs X'75' do not compare.
R14 =data read from input reg X'75'.
R15 = bits in error.
R16 =data stored in output reg X'75'.
ALC xmt test. This routine should run only when RPO 858911
is installed. If RPQ 858911 is not installed, check the CDS data.
OX01
Tests ALC L1 hardware by altering one instruction in the data
processing sequence.
Altered instruction failed to produce an L1 irpt.
Input reg X'7E' byte 1, bit 7 should be on to
indicate ALC support L1 err.
OX02
Tests EOM remember part 1. Test if expected.
EOM remember was expected but was not detected. Bit tested
is byte 0, bit 1.
R14
R16
OX03
Tests EOM remember part 2. Test if detected.
EOM remember was detected but was not expected. Bit tested
is byte 0, bit 1.
R14 = actual data.
R16 = expected data.
OX04
Tests EOM expected.
EOM was expected but was not detected. Bit tested is byte 0,
bit 2.
R14 = actual data.
R16 = expected data.
OX05
Tests EOM detected.
EOM was detected but was not expected. Bit tested is byte 0,
bit 2.
R14 = actual data.
R16 = expected data.
OX06
Tests end character counter.
The actual end character counter does not compare with the
expected. Bits tested are byte 0, bits 5, 6, and 7.
R14 = actual data
R15 = bits in error.
R16 = expected data.
OX07
Tests CCC.
The actual CCC does not compare with the expected. Bits
tested are byte 1, bits 2, 3, 4, 5, 6, and 7.
R14 = actual data.
R15 =bits in error.
R16 = expected data.
OXOS
Tests first 2 bytes of buffer.
First 2 bytes of buffer are in error.
R13 = adr of buffer.
R14 =actual data from buffer.
R15 = bits in error.
R16 = expected data.
f
I,
\.
'"
(~
\ . . .-J
,[
",,\
''''-.~
("I
\
I
/
.... j
""
",-.,.,,\
\. j
( ...",
"\
./
\"j
'-...~
/
r'\
\ .. - j
r~
./
j
."'>.
~'1
I
'....../
;'l
'-..j
/':
'"
"...j
'1
'-..
~
r"",
.'...
/'
,c",\
j
(
= actual data.
=expected data.
."
~)
r""\
/
,,-----/
"-....
j
~---
til (
~'
---
C
------~~
c «
-------~--.
(
(
«
(
(
(
f.
(
(
(
(
(
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
"'-
Error
(
(
(-
Suspected Card
Location(s)
(-/
f
Program
Mask
(
FEALD
Page
(-
(--; (-
(~
. -'
FETMM
Page
("
(
--
(- (
Routine
Code
1144
OX09
Tests second 2 bytes of buffer.
Second 2 bytes of buffer are in error.
R13 = adr of buffer.
R14 = actual data from buffer.
R15 = bits in error.
R16 = expected data.
OXOA
Tests third 2 bytes of buffer.
Third 2 bytes of buffer are in error
OXOC
Tests ALC Ll request bit.
ALC L1 request bit not set. Bit tested is byte 1, bit 7 of input
reg X'7E'.
= adr of buffer.
= actual data from buffer.
= bits in error.
= expected data.
Reg X'03' = contents of input reg X'7E'.
OXOD
Tests for correct L1 irpt adr.
Actual irpt adr does not compare with expected irpt adr.
LAR should point to irpt adr but does not. Reg
X'04' = contents of LAR. Reg X'05' = bits in error.
Reg X'06' = expected irpt adr.
OXOE
Tests reset of ALC L1 request bit.
ALC L1 request bit did not reset. Bit tested is byte 1, bit 7.
Reg X'05'
Function Tested
1145
Error Description
Comments
R13
R14
R15
R16
= contents of input reg X'7E'.
ALC receive test. This routine should run only when RPQ 858911
is installed. If RPQ 858911 is not installed, check the CDS data.
OX01
Tests ALC L1 hardware by altering one instruction in the data
processing sequence.
Altered instruction failed to produce an L1 interrupt.
Input reg X'7E' byte 1, bit 7 should be on to indicate ALC support L1 error.
OX02
Tests EOM remember part 1. Test if expected.
EOM remember was expected but was not detected. Bit tested
is byte 0, bit 1.
R14 = actual data.
R 16 = expected data.
OX03
Tests EOM remember part 2. Test if detected.
EOM remember detected but not expected. Bit tested is byte 0,
bit 1.
R 14 = actual data.
R 16 = expected data.
OX04
Tests GA part 1. Test if expected.
GA expected but not detected. Bit tested is byte 0, bit 2.
OX05
Tests GA part 2. Test if detected.
GA detected but not expected. Bit tested is byte 0, bit 2.
OX06
Tests CCC remember expected.
CCC remember expected but not detected. Bit tested is byte 0,
bit 4.
OX07
Tests CCC remember detected.
CCC remember detected but not expected. Bit tested is byte 0,
bit 4.
OXOS
Tests end character counter.
The actual end character counter does not compare with the
expected data. Bits tested are byte 1, bits 5, 6, and 7.
= actual data.
= expected data.
R 14 = actual data.
R16 = expected data.
R14 = actual data.
R 16 = expected data.
R14 = actual data.
R 16 = expected data.
R14 = actual data.
R14
R16
R 15 = bits in error.
R16 =expected data.
Tests CCC.
The actual CCC does not compare with the expected data. Bits
tested are byte 1, bits 2, 3, 4, 5,6, and 7.
R 14 = actual data.
R15 = bits in error.
R 16 = expected data.
OXOA
Tests first 2 bytes of buffer.
First two bytes of buffer are in error.
R13 = adr of buffer.
R 14 =actual data from buffer.
R15 = bits in error.
R16 = expected data.
OXOS
Tests second 2 bytes of buffer.
Second 2 bytes of buffer are in error.
R13 = adr of buffer.
R14 = actual data from buffer.
R15 = bits in error.
R16 =expected data.
OX09
\
Z3705BBA CCU 1FT SYMPTOM INDEX
CCU 076
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
Z3705BBA CCU IFT,SYMPTOM INDEX
Function Tested
Suspected Card
Location(s)
Error Description
Program
Mask
FEALD
Page
FETMM
'age
Tests third 2 bytes of buffer.
Third two bytes of buffer are in error.
R13 = adr of buffer.
R14 = actual data from buffer.
R15 = bits in error.
R16 = expected data.
OXOD
Tests fourth 2 bytes of buffer.
Fourth 2 bytes of buffer are in error.
R13 = adr of buffer.
R14 =actual data from buffer.
R15 =bits in error.
R16 = expected data.
OXOE
Tests ALC L1 request bit.
ALC L1 request bit did not set. Bit tested is byte 1, bit 7 of
input reg X'7E'.
Reg X'03' = contents of input reg X'7E'.
OXOF
Tests for correct L1 irpt addr.
Actual irpt adr does not compare with expected irpt adr.
LAR should point to irp adr but does not.
Reg X'Q4' = contents of LAR.
Reg X'05' =bits in error.
Reg X'06' = expected data.
OX10
Tests reset of ALC L1 request bit.
ALC L1 request bit did not reset. Bit tested is byte 1, bit 7.
Reg X'05' = contents of input reg X'7E'.
1146
OX01
Storage protect test. Sets all storage keys to 000. The storage
keys are first set and then read and compared for the correct key
value. The setting and reading of keys is performed by a major
subroutine.
One of the storage block keys failed to set to 000.
A·B4D2
0007
CVXXX
6·040
See Note 2.
1147
OX01
Sets all storage keys to 001 .
One of the storage block keys failed to set to 001.
A-B4D2
0007
CVXXX
6-040
See Note 2.
See Note 3.
1148
OX01
Sets all storage keys to 010.
One of the storage block keys failed to set to 010.
A-B4D2
0007
CVXXX
6-040
See Note 2.
See Note 3.
1149
OX01
Sets all storage keys to 011.
One of the storage block keys failed to set to 011.
A-B4D2
0007
CVXXX
6·040
See Note 2.
See Note 3.
114A
OX01
Sets all storage keys to 100.
One of the storage block keys failed to set to 100.
A·B4D2
0007
CVXXX
6·040
See Note 2.
See Note 3.
114B
OX01
Sets all storage keys to 101.
One of the storage block keys failed to set to 101.
A-B4D2
0007
CVXXX
6-040
See Note 2.
See Note 3.
114C
OX01
Sets all storage keys to 110.
One of the storage block keys failed to set to 110.
A-B4D2
0007
CVXXX
6·040
See Note 2.
See Note 3.
1140
OX01
Sets all storage keys to 111.
One of the storage block keys failed to set to 111.
A·B4D2
0007
CVXXX
6-040
See Note 2.
See Note 3.
114E
OX01
Storage protect test. Set all protect keys to 000.
One of the protect keys failed to set to 000.
A-B4D2
0007
CVXXX
6-040
See Note 2.
See Note 4.
114F
OX01
Sets all protect keys to 001.
One of the protect keys failed to set to 001.
A-B4D2
0007
CVXXX
6·040
See Note 2.
See Note 4.
,
\
,
",
,
../
Comments
OXOC
1145
/'
CCU 078
/-lj
''-.,
./
C)
t' '\
,
\....)
I~
'"
/
i
l
,
.. /
~-~
1/~1
.~.
..-/,/
,--j
",- -,/
",---.
i
''\
,r'l
-j
\~
I
"'\
'"
./
r-'"\
",-,j
(~
'.
\......./
("1
,
I
./
/,,,,
""~
./'.
""
""i
'-.J
'" r"
'--J
,0
j
(\
\
J
./
,t'
\
"
-"
./
f
>-
!~">-
,.;-"'"
.~
',J
---~---------
(p, (
C
~
--
--_.-
C
(
(
(
(-
- - - -----
(
----_
---
(
(
(/
(-~'
(~
(
(' (
.. - -
_._._----
(
(
--
(
(
(/ (
(-
(-'~:
(
(\
. .;.!
<~
-~,,:-/
(~
(
(
("
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
Routine
E.rror
Code
1150
OX01
Sets all protect keys to 010.
One of the protect keys failed to set to 010.
1151
OX01
Sets all protect keys to 011.
1152
OX01
1153
Suspected Card
Location(s)
Program
Mask
FEALD
Page
Page
A-B402
0007
CVXXX
6-040
See Note 2.
See Note 4.
One of the protect keys failed to set to 011.
A-B402
0007
CVXXX
6-040
See Note 2.
See Note 4.
Sets all protect keys to 100.
One of the protect keys failed to set to 100.
A-B402
0007
CVXXX
6-040
See Note 2.
See Note 4.
OX01
Sets all protect keys to 101.
One of the protect keys failed to set to 101.
A-B402
0007
CVXXX
6-040
See Note 2.
See Note 4.
1154
OX01
Sets all protect keys to 110.
One of the protect keys failed to set to 110.
A-B402
0007
CVXXX
6-040
See Note 2.
See Note 4.
1155
OX01
Sets all protect keys to 111.
One of the protect keys failed to set to 111.
A-B402
0007
CVXXX
6-040
See Note 2.
See Note 4.
For looping on error, the OCM CE sense switch
should be set. If not, the routine will make only
one pass.
1156
EJTOf' Description
Funct.ion T eAa:t
FETMM
Comments
Special storage protect routine for problem definition mode.
This routine will run only if the problem definition mode and the manual intervention CE sense switches are set or if a single routine is
requested and the routine requested is 1156. If the POM CE sense switch is on, a manual intervention code will be displayed. You
should then enter the desired key data into switches B, C, 0, and E (see Note 2 for format of out set key data. Also note that byte 0,
bits 0-3 should be entered into switch B, etc.). The data entered will determine if a storage key or protect key is set and/or read.
This test runs under program L4.
Note: Ensure that the block under test (for setting storage key) does not prevent this routine or the OCM from executing instructions.
FXOF
Manual intervention code. You should enter the desired data
into switches B, C, 0, and E.
N/A
N/A
4-080
OX01
The key set is tested to verify that it agrees with the expected
data.
Key failed to set to the desired value.
0007
6-040
Z3705BBA CCU 1FT SYMPTOM INDEX
CCU 080
c
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
"
Z3705BCA CCU 1FT SYMPTOM INDEX
Function Tested
Suspected Card
Location(s)
Error Description
Program
Mask
FEALD
Page
FETMM
Page
Comments
Storage Protection Mechanism Testing at Program L5. Section 1.
The following seven routines test to verify that, if the protect key and storage key match, the user (L5 is the user) is allowed to access storage for instruction execution.
Since the protect keys for program levels 1,2,3, and 4 are fixed equal to 0, program L5 is set up for the appropriate protect key and the actual test section of each routine is tested at program L5.
1158
Test that when the storage key is equal to 001 and the protect
key (L5) is equal to 001, no storage protect errors occur when an
instruction execution is performed.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X11
1X21
Pretest error.
Pretest error.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X12
1X22
Pretest error.
Pretest error.
115A
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X13
1X23
Pretest error.
Pretest error.
./
I
~-')
'--....
)/
CVXXX
6-040
6-850
A protection check did not occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
When the storage key is equal to 100 and the protect key (L5) is
equal to 100, tests that no storage protect errors occur when an
instruction execution is performed.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X14
1X24
Pretest error.
Pretest error.
115C
''-.
FFFF
When the storage key is equal to011 and the protect key (L5)
is equal to 011, test that no storage protect errors occur when
an instruction execution is performed.
1158
"
A-B4D2
When the storage key is equal to 010 and the protect key (L5)
is equal to 010, tests that no storage protect errors occur when
an instruction execution is performed.
1159
L"
A protection check did occur.
Test that when the storage key is equal to 101 and the protect
key (L5) is equal to 101, no storage protect errors occur when
an instruction execution is performed.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur;
1X15
1X25
Pretest error.
Pretest error.
("'"
"--
(0
'-..y
(
.
'"
\
\,-~
,~
'-. ./
I
E)
,
"-~
,
,/~
'-...
~
10
\
J
'-../
,,~
"~
'........._-.;>/
,-~y
(,'-,.,
' '---,
'''--J
,/
,At-""
!
("'
''-----/
"-.,'/
(-'1
\.
,I
.j
('."'X,
"
("""",
\
"\
'",-./
'-.../
"'-/
'''-._j/
I
.-
,
,
)
,!'~
)
,'/
0', ..../
r'''\
f-~\
~~.,\
,-<'
CCU 090
(' (/
«
(
(
(
(
(
(
('
(
«
(,
(
(
(
3705-80 CCU I FT SYMPTOM INDEX - Cont.
Routine
&for
Code
1150
Function Tested
Suspected Card
Location(s)
Error Description
Program
Mask
FEALO
Page
FETMM
Page
Comments
When the storage key is equal to 110 and the protect key (L5)
is equal to 110, tests that no storage protect errors occur when
an instruction execution is performed.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X16
1X26
Pretest error.
Pretest error.
115E
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
When the storage key is equal to 111 and the protect key (L5)
is equal to 111, tests that no storage protect errors occur when
an instruction execution is performed.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X17
1X27
Pretest error.
Pretest error.
Storage Protection Mechanism Testing at Program L5. Section 2.
The following eight routines test to verify that, if protect key and storage key match or if the storage key is 111 (unprotected storage), the user (L5 is the user) is allowed to modify storage without
causing protection checks.
115F
When the storage key is equal to 001 and the protect key (L5)
is equal to 001, tests that no storage protect errors occur when
anattempt is made to modify storage.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X11
1X21
Pretest error.
Pretest error.
1160
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
'A-B4D2
FFFF
CVXXX
6-040
6-850
A-B4D2
FFFF
CVXXX
6-040
6-850
When the storage key is equal to 001 and the protect key (L5)
is equal to 010, tests that no storage protect errors occur when
an attempt is made to modify storage.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X12
1X22
Pretest error.
Pretest error.
1161
A protection check did occur.
/
When the storage key is equal to 011 and the protect key (L5) is
equal to 011, tests that no storage protect errors occur when an
attempt is made to modify storage.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X13
1X23
Pretest error.
Pretest error.
A protection check did occur.
(
Z3705BCA CCU 1FT SYMPTOM INDEX
CCU 092
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
1162
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X14
1X24
Pretest error.
Pretest error.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
1X15
1X25
Pretest error.
Pretest error.
OX01
Irpt req grp 1 X7E' is tested to verify that a protection check
did not occur.
1X16
1X26
Pretest error.
Pretest error.
1X17
1X27
1166
.. /
FETMM
Page
Comments
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
I
When the storage key is equal to 111 and the protect key (L5) is
equal to 111, tests that no storage protect errors occur when an
attempt is made to modify storage.
OX01
'--
FEALD
Page
Test that when the storage key is equal to 110 and the protect
key (L5) is equal to 110, no storage protect errors occur when
an att~mpt is made to modify storage.
1165
"./
Program
Mask
When the storage key is equal to 101 and the protect key (L5) is
equal to 101, tests that no storage protect errors occur when an
attempt is made to modify storage.
1164
'''!
Suspected Card
Location(s)
Error Description
Function Tes:ta:I
When the storage key is equal to 100 and the protect key (L5) is
equal to 100, tests that no storage protect errors occur when an
attempt is made to modify storage.
1163
;'
Z3705BCA CCU 1FT SYMPTOM INDEX
Irpt req grp 1 X'7E' is tested to verify that a protection check
did not occur.
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
Pretest error.
' Pretest error.
When the storage key is equal to 111 (unprotected storage) and
the protect key (L5) is some value other than 111 ((101 for this
test)), tests that no storage protect errors occur when an attempt
is made to modify storage.
OX01
Irpt req grp1 X'7E' is tested to verify that a protection check
did not occur.
1X15
1X17
1X25
Pretest error.
Pretest error.
Pretest error.
c
"
("')
\,-~
;"
''\
"- )
..
',-
~"
\., ,/
r"'\
.",
...
r
./
'-.
./
'-...j
\., ./
.
./
\
... ,,/
.~
~
,-
\,
/
,,:
"\
''.
I
'-
'-..../
\""j
"
j
"\
"-/
(""
'-..
./
;-'''''
(~
,/)
./
"
r
._\
(
'.
CCU 094
(
(
(
(
(
(
(
(/
(
(:
(/
(
(
(
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
Error
Routine
F-1IIIIICtion Tested
Code
Error Description
Suspected Card
Location (s)
Program
Mask
FEALD
FETMM
Page
Page
Comments
Storage Protection Mechanism Testing at Program L5. Section 3.
The following five routines test to verify that if the protect key and the storage key are not equal, the user (L5 is the user) is not allowed to execute an instruction. In addition, protection check should
be set.
116A
When the storage key is equal to 001 and the protect key (L5) is
equal to 110, tests that storage protection checks will occur when
an attempt is made to execute an instruction.
OXOl
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
lXl1
lX16
lX26
Pretest error.
Pretest error.
Pretest error.
116F
A protection check did not occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did not occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did not occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did not occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
When the storage key is equal to 110 and the protect key (L5) is
equal to 001, tests that storage protection checks will occur when
an attempt is made to execute an instruction.
OXOl
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
lXll
lX16
lX2l
Pretest error.
Pretest error.
Pretest error.
1170
When the storage key is equal to 000 and the protect key (L5) is
equal to 111, tests that storage protection checks will occur when
an attempt is made to execute an instruction.
OXOl
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
lXl0
lX17
lX27
Pretest error.
Pretest error.
Pretest error.
1171
When the storage key is equal to 111 and the protect key (L5) is
equal to 000, tests that storage protection checks will occur when
an attempt is made to execute an instruction.
OXOl
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
lXl0
lX17
lX20
Pretest error.
Pretest error.
Pretest error.
Z3705BCA CCU 1FT SYMPTOM INDEX
CCU 096
3706·80 CCU 1FT SYMPTOM INDEX· Cont.
Z3706BCA CCU 1FT SYMPTOM INDEX
~rror
Routine
1172
Suspected Card
LOCation(s)
Error Description
Function Tested
Code
Program
FEALD
Page
Mask
FETMM
Page
Comments
When the storage key is equal to110 and the protect key (L5) is
equal to 111, tests that storage protection checks will occur when
an attempt is made to modify storage.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
1X16
1X17
1X27
Pretest error.
Pretest error.
Pretest error.
A protection check did not occur.
FFFF
A·B4D2
CVXXX
6·040
6-850
Storage Protection Mechanism Testing at Program L5. Section 4.
The following six routines test to verify that, if the protect key and the storage key are not equal and if the protect key is not equal to zero, the user (L5) is not allowed to modify storage. In addition,
protection check should be set.
1173
Test that when the storage key is equal to 100 and the protect
key (L5) is equal to 110, storage protection checks will occur
when an attempt is made to modify storage.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
1X14
1X16
1X26
Pretest error.
Pretest error.
Pretest error.
1174
'., . /
. ''j
,,--. ..Y
A·B4D2
FFFF
CVXXX
6·040
6·850
A protection check did not occur.
A·B4D2
FFFF
CVXXX
6·040
6·850
A protection check did not occur.
A·B4D2
FFFF
CVXXX
6-040
6-850
When the storage key is equal to 001 and the protect key (L5) is
equal to 101, tests that storage protection checks will occur when
an attempt is made to modify storage.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
1X11
1X15
1X25
Pretest error.
Pretest error.
Pretest error.
1175
/'
:
A protection check did not occur.
When the storage key is equal to 000 and the protect key (L5) is
equal to 100, tests that storage protection checks will occur when
an attempt is made to modify storage.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
1X10
1X14
1X24
Pretest error.
Pretest error.
Pretest error.
.
"
.
(
I~
0
'. ./
\"
.~
I
.
./
-..
,~)
"~
(-"
1,,- ../
./
"-~
\..._./
"'i
\..j
~,
(
\...
I
,-,./
r
>.
(
"
',-'--"""
',,- /'
CCU 098
(/
{
(
(
(
(
(
(
(
(
(-
(
(
(
(/
(
(
(
(
(
« ( (
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
1177
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
When the storage key is equal to 011 and the protect key (L5) is
equal to 010, tests that storage protection checks will occur when
an attempt is made to modify storage.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
1X12
1X13
1X22
Pretest error.
Pretest error.
Pretest error.
1178
A protection check did not occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did not occur.
A-B4D2
FFFF
CVXXX
6-040
6-850
A protection check did not occur
A-B4D2
FFFF
CVXXX
6-040
1-040
When the storage key is equal to 101 and the protect key (L5) is
equal to 001, tests that storage protection checks will occur when
an attempt is made to modify storage.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
1X11
1X15
1X21
Pretest error.
Pretest error.
Pretest error.
1179
When the storage key is equal to 100 and the protect key (L51 is
equal to 111, tests that storage protection checks will occur when
an attempt is made to modify storage.
OX01
Irpt req grp 1 X'7E' is tested to verify that a protection check
did occur.
1X14
1X17
1X27
Pretest error.
Pretest error.
Pretest error.
,
Z3706BCA CCU 1FT SYMPTOM INDEX
CCU 100
3705-80 CCU I FT SYMPTOM INDEX - Cont.
~rror
Code
Routine
1190
CCU 102
Z3705BCA CCU 1FT SYMPTOM INDEX
Suspected Card
Location(s)
Error Description
Program
Mask
FEAlD
Page
The customer usage meter should run when an instruction is executed at program levels 1,2,4,5, and L3 if 8 ms has elapsed since the interval timer irpt occurred or if an instruction is executed at L3
and a non-interval timer irpt has occurred_
FETMM
Page
Comments
1-040
A series of instructions totaling 24 seconds will be executed on each level for a total run time of 2 ,minutes (0.034 run time on meter).
You will be requested to read and enter the meter at the start of the test and at the end. As a result, this routine will run only if the manual intervention CE sense switch is set.
e
Customer Usage Meter Test 1
Enter the meter reading as follows (see Figure 1190):
1_ When code FX01 is displayed in DISPLAY a, set the DISPLAY/FUNCTION SELECT switch to FUNCTION 5.
2. Ignoring the three leftmost meter positions, enter the remaining positions in STORAGE ADDRESS/REGISTER DATA switches B, C, D, and E. Note that the value entered in switch E represents
the marks on the rightmost meter wheel (thousands position). Always round the thousands position to the nearest even number (2,4,6,8,0).
3. Press the START pushbutton.
'
4. When code FX02 is displayed in DISPLAY a, enter the new meter reading in the STORAGE ADDRESS/REGISTER DATA switches B, C, D, and E as described in step 2.
5. Press the START pushbutton.
, - - Enter Value in switch B
+..----o
4
..
2
1
Enter value in switch 0
=
3
1 ~ I--- Enter value of the mark (2,4,6,8,0) in switch E
~--~
--~----~--~""-..-'
L
Ignore these positions
Enter value in switch C
For this example you would enter 1 3 1 0 in switches B, C, D. and E
Figure 1190. How to Read the Metarfor Test Routina 1190.
EX01
r
'-.
/
')
'---j
Display code to indicate that this routine is running (2 min.).
N/A
FX02
Manual intervention code. Enter the meter value observed in
step 4 above.
OX01
The first meter reading is updated by 0.034 and compared with
the second reading to verify that the run time is two minutes
(0.034 in terms of meter reading).
f -'"
"-
f'
r
"\
",-j
0
"-
j
/
r,\
'",j
N/A
N/A
1-040
N/A
(~
''\
/
A-B3 L2
A-B3 M2
The meter fail to run correctly or meter reading were not
consistent.
"j
,,-,j
"'--_/
/\
r~
'--
"~
/
'-
,---",j
'--
,,-j
FFFF
'\
'\
'-- /
CP006
CP007
"-
/
'-.... - /
1",\
'
\
j
Warning: If the meter reading entered under FX01
was between 9.966 and 9.999 inclusive a false
error will be reported. Rerun the test again.
1-040
;'
-..-/1
/
,
"
(
"
\,-,~
7~
'---/
(
(
(
(
(
(
(
(
(
(
(
«
(
(
(
(
(- (
3705-80 CCU 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
1191
Error Description
Function T es:bIaI
Suspected Card
Location(s)
Program
Mask
FEALD
Page
Customer usage meter test 2. If no other program levels are active
and an L3 interval timer irpt occurs, the customer usage meter
should not run until after 8 ms has elapsed. This routine will
mask off all execution except the interval timer and update a real
time type of count. The customer usage meter should not run
during this routine.
FETMM
Page
Comments
1-040
Run time is 1 minute.
FX01
Same as FX01 above.
EX02
Displays code to indicate this routine is running.
FX02
Same as FX02 above.
OX01
The first meter reading is saved and compared with the second.
Since the meter should not run, the two meter readings should
be equal.
The meter either ran or meter readings were not consistent.
N/A
N/A
N/A
A-B3 L2
A-B3 M2
FFFF
CP006
CP007
1-040
Pretest Error Codes
The following error codes define failures of functions previously tested by other routines. For each error code a cross reference will be given to point to the routine that originally tested the given function.
11XX
1X01
Forces an L3 irpt via an output X'7C' to set PCI L3.
L3 irpt failed to occur
N/A
6-940
Routine 1113 previously tested this function.
Request routine 1113 and verify that PCI L3 will
force an L3 irpt.
11XX
1X02
Forces an L2 irpt via an output to set diag L2 irpt.
L2 irpt failed to occur.
N/A
6~900
The DCM set the L2 mask before loading a given
I FT. As a result, L2 must be unmasked before
focusing an L2 irpt. Routine 1115 test both the
unmasking of L2 irpt and masking of L2 irpt via
an output to set diag L2.
11XX
1X03
Forces an irpt via an invalid output reg X'2F'.
L1 irpt failed to occur.
N/A
6-050
Routine 1118 previously tested this function.
Request routine 1118 and verify if an L1 irpt can
be forced via an I/O check.
11XX
1X10
Sets a given storage key to 000.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 1146 previously tested
this function. Run routine 1146 or 1156.
11XX
1X11
Sets a 'given storage key to 001.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 1147 previously tested
this function. Run routine 1147 or 1156.
11XX
1X12
Sets a given storage key to 010.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 1148 tested this function. Run routine 1148 or 1156.
11XX
1X13
Sets a given storage key to 011.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and'5. Routine 1149 previously tested
this function. Run routine 1149 or 1156.
11XX
1X14
Sets a given storage key to 100.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 114A previously tested
this function. Run routine 114A or 1156.
...
Z3705BCACCU 1FT SYMPTOM INDEX
CCU 104
3705-80 CCU I FT SYMPTOM INDEX - Cant.
Z3705BCA CCU 1FT SYMPTOM
. Suspected Card
. Location(s)
Routine
Error
Code
11XX
1X15
Sets a given storage key to 101.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 114B previously tested
this function: Run routine 114B or 1156.
11XX
1X16
Sets a given storage key to 110.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Aoutine 114C previously tested
..
this function. Run routine 114C or 1156.
Error Description
Function Tested
Program
Mask
FEALD
Page
FETMM
Page
'.
"
1X17
Sets a given storage key to 111.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 1140 previously tested
this function. Run routine 1140 or 1156.
11XX
1X20
Sets a given protect key to 000.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 114E tested this function. Run routine 114E or 1156~
11XX
1X21
Sets a given protect key to 001.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 114F previously tested
this function. Run routine 114F or 1156.
11XX
1X22
Sets a given protect key to 010.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 1150 previously tested
this function. Run routine 1150 or 1156.
11XX
1X23
Sets a given protect key to 011.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 1151 previously tested
this function. Runroutine 1151 or 1156.
11XX
1X24
Sets a given protect key to 100.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 1152 previously tested
this function. Run routine 1152 or 1156.
11XX
1X25
Sets a given protect key to 101.
Key failed to set.
N/A
6-040
6-880
See Notes 2 and 5. Routine 1153 previously tested
this function. Run routine 1153 or 1156.
11XX
1)(26
Sets a given protect key to 110.
Key failed to set.
N/A
6-040
See Notes 2 and 5. Routine 1154 previously tested
this function. Run routine 1154 or 1156.
11XX
1X27
Sets a given protect key to 111.
Key failed to set.
N/A
6-880
See Notes 2 and 5. Routine 1155 previously tested
this function. Run routine 1155 or 1156.
11XX
2X11
Subroutine to handle L1 irpts.
An L1 irpt bas occurred and tbere are no CCU bits on in either
X'70' CCU check reg or X'7E' irpt req grp 1. All L 1 irpts should
occur as a result of a CCU type error.
N/A
N/A
6-8.40
6-850
Reg X'05' has a dummy bits in error data X'9999'.
11 XX
2X12
Subroutine to handle L1 irpts.
An L1 irpt has occurred due to some bit in either irpt req grp 1
X'7E' and/or adapter irpt req grp 1 & 2 X'76' & X'77'. The
CCUIFT L1 subroutine resets all forced CCU irpt conditions and
determines that all bits cannot be reset.
N/A
N/A
6-810
6-820
6-860
Reg X'05' will contain bits that cannot be reset.
If any adapter 21 bits are on, they must be manually reset before pressing START to continue.
11XX
2X13
Subroutine to handle L1 irpts.
An L1 irpt has occurred due to a CCU L1 irpt. The CCUIFT
L1 subroutine attempts to reset the L1 interrupt conditions and
determines that all bits cannot be reset.
A-B3L2
A-B402
N/A
CP005
6-090
Reg X'05' will.contain the OR of the CCUck req
X'70' and irpt req grp 1 X'7E'.
11XX
2X14
Subroutine to handle L1 irpts.
N/A
N/A
CK006
6-090
Reg X'05' will contain the OH of theGGU ck req
X'70' and irpt req grp 1 X'7E',
,
./1
Comments
11XX
,
An L1 irpt has occurred and the routine under test did not
expect to force an L1 irpt. Theirpi occurred due to a CCU error.
....
1"
INDEXCCU106
r
".
"
1'''1
\,.J
(
"'-,
".
/
/
/-~"I
'"
./
,.
./
'. .. /
"
./
'------_/
- "-,
\,.j
{
~',
/
'.
I
/
"-
"
/
t
/"
'.
-,,~
-
."
,'/-''\,
'.
j
'"
'\
\,--"/
'.
N/A
.,
.
/
"\
/
'... . /
I
,
"\
.
/
"i
i~
(
~/
'"
/
;'
/'~
"'...... - .-
?~~
\~~
'''../
'.
{
(
..
(
(
(
(
(
(
(
(
(
(
(
(
«
(
(
(
(
c(
(
3705-80 CCU 1FT SYMPTOM INDEX - Cant.
Routine
Error
Code
11XX
2X15
Subroutine to handle L1 irpts.
An L1 irpt has occurred and the routine under test did not
expect to force an L1 irpt. There are not any CCU error bits on;
as a result, the irpt must be due to either a CA or CSB request.
N/A
N//\
N/A
11XX
2X21
Subroutine to handle L2 irpts.
Diag L2 irpt req bit failed to reset.
A-B3M2
N/A
CU014
11XX
2X22
Subroutine to handle L2 irpts.
An L2 irpt has occurred and the diag L2 bit is not on in the irpt
req grp 2 X'7F'. When running the CCUIFTs all L2 interrupts
should result from Diag L2 bit.
N/A
N/A
N/A
6-850
Reg X'05' will contain irpt req grp 2 X'7F'.
11 XX
2X23
Subroutine to handle L2 irpts.
An L2 irpt had occurred and either the type 1 CSB L2 and/or
type 2 CSB L2 bits are on in adapter req grp 2 X'77'. The
CCUI FT L2 subroutine has attempted to reset by resetting all
forced CCU error conditions.
N/A
N/A
CX003
6-820
Reg X'05' will contain adpt req grp 2 X'77'.
11 XX
2X24
Subroutine to handle L2 irpts.
An L2 irpt has occurred and the routine under test did not
expect to force an L2 irpt.
N/A
N/A
N/A
6-090
Reg X'05' has a dummy bits in error data X'9999'.
Display regs: X'77' adpt req grp 2 and X'7F' irpt
req grp 2 to determine the cause of the L2 irpt.
11XX
2X31
Subroutine to handle L3 irpts.
An L3 irpt has occurred via a PCI L3 irpt X'7C'. The level subroutine attempts to reset the PCI L3 irpt, but fails.
A-B3M2
N/A
CU015
6-940
11XX
2X32
Subroutine to handle L3 irpts.
An L3 irpt has occurred and neither the PCI L3, timer L3, nor
pushbutton L3 bits are on. All L3 interrupts that occur should
result from one of the above conditions.
N/A
N/A
11XX
2X33
Subroutine to handle L3 irpts.
An L3 irpt has occurred and either the Type I CAn L3 and/or
Type 2 CAn L3 bits are on in adapter req grp 2 X'77'. The
CCUIFT L3 subroutine has attempted to reset by resetting all
forced CCU errors conditions.
N/A
N/A
11XX
2X34
Subroutine to handle L3 irpts.
An L3 irpt has occurred and the routine under test did not
expect to force an L3 irpt. The timer L3 and pushbutton L3
interrupts are expected at all times.
N/A
11XX
2X41
Subroutine to handle L4 irpts.
A PCI L4 or svc L4 irpt has occurred. The L4 attempts to reset
either or both but determines that one or both cannot be reset.
11XX
2X42
Subroutine to handle L4 irpts.
11XX
2X43
Subroutine to handle L4 irpts.
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
6-090
6-810
6-820
6-860
i
Comments
Reg X'05' has a dummy bits in error data X'9999'.
Display the following regs to determine the cause
of the L1 irpt: X'7F' irpt req grp 2, X'76' adpt
req grp 1 and X'77' adpt req grp 2. If any adapter
bits are on, they must be manually reset before
pressing START to continue.
6-050
Reg X'OD' has a dummy bits in error data X'9999'.
Reg X'OE' contains adpt req grp 2 X'77'.
"
CP005
6-820
Reg X'05' will contain adpt req grp 2 X'77'. If any
adapter bits are on, they must be manually reset
before pressing START to continue.
N/A
N/A
6-090
Reg X'OD' has CCU irpt req grp X'7E' loaded. In
addition display reg X '77' adpt req grp 2 to determine if a CA L3 irpt req occurred.
A-B3M2
N/A
CU015
6-090
Reg X'15' contain the irpt req that cannot be reset.
Byte 0, bit 7 = PCI L4 and Byte 1, bit 7 = svc L4.
An L4 irpt has occurred and neither the PCI L4 or svc L4 bits
are on in X'7F'.
N/A
N/A
CU015
CP005
6-860
Reg X'15' has a dummy bits in error data X'9999'.
If any adapter bits are on, they must" be manually
reset before pressing START to continue.
An L4 irpt has occurred and the routine under test did not
expect to force an L4 irpt.
N/A
N/A
N/A
6-090
Reg X'15' has a dummy bits in error data X'OO01'.
Display req X'7F' CCU I RPT req grp 1. Byte 0,
bit 7 =PCI L4 and Byte 1, bit 7 = svc L4.
,
Z3705BCA CCU 1FT SYMPTOM INDEX
CCU 108
3705-80 CCU I FT SYMPTOM INDEX - Cont.
Error
Routine
Fu nctiom T es:lleel
Code
CCU 110
Z3705BCA CCU 1FT SYMPTOM INDEX
Error
Suspected Card
Location(s)
[)escript~
Program
Mask
FEALD
Page
FETMM
Page
Comments
NOTES FOR CCU 1FT SYMPTOM INDEX
Note 1: Since the error forcing circuitry has not been previously tested, bypass this error code until error code 0002 of the same routine has been run without failure.
Note 2: For all of the above storage protect testing routines, reg X'16' for error display has special meaning. Req X'16' will contain the data that was sent output to req X73' (set key). This will allow the block address to
be displayed as shown below. See routine 1156 for setting a loop on a given storage or protect key.
Output X'73'
Set Key
SAR
Byte
. Byte
a
Byte 0,
SKA
SKA
SKA
SKA
SKA
SKA
SKA
1
2
3
4
5
6
7
X
67 a
1
2
3
4
5
6
7
i
Byte
1
a
1 2 3 4 5 6 7 ~0-1~2-3~4~5-6~7
II ~kl!~llllllllill
GH
.. Use this chart to convert
block number into adr
range and vice versa.
*
*
*
*
a
Byte 1,
a --------------
Bit
(G)
Bit 1 -------------- (H)
Bit 2 -------------- (J)
Bit 3 -------------- (K)
Bit40rPKABitO--(L)
Bit 5 or PKA Bit 1-- (M)
Bit 6 or PKA Bit 2-- (N)
Exp: If no key adr bits are on, then
the block number in question is zero
and covers the adr range of 0-4097
bytes.
Select Key Adr 1=SKA O=PKA
Set Key
1=SET
Key - Bit a
Key - Bit 1
Key - Bit 2
Note 3: The first two storage block keys are not changed but are allowed to remain set to 000. This will allow direct addressable areas, the DCM control module, and the CCU 1FT irpt and subroutine areas to be addressed without
protection checks.
Note 4: Only three of the available settable protect keys are currently used.
Note 5: Use the following chart to determine the first suspected card or cards. The table should be keyed off of the failing bits in reg X'15' (bits in error).
Bit in Error
Reg X'15'
Failure
Function (Z·Bus)
Card
Logic Page
Byte 0, bit a
bit 1
bi12
Byte X
Byte a
Byte 1
ALU, AREG, BREG
ALU, AREG, BREG
ALU, AREG, BREG
A·B4J2
A·B4K2
A·B4N2
DF976
DG976
DK976
/'.- .. ""\
c'
./
"
(
'"
'\,
j
;:
"-
";,
i
./
/'~,
'---
I
r-\
'----/
r
-~\
,
j
,-,
,I
"
j
-',
'-
/
r""\
"
j
r""',
'-
~
I
-'~
".
./
/
'---,./'
/'
'---
./
'\
"-,.,./
'\,
'.
/
'---
"
/
F'\
'. /'
r""\
./
(
",
r
"
------j
,
r
"-
/
(
(
(
(
(
(
(
(
(
(
(
f
(
(
(
(
(
(
(
(
4--
(
(
(
c (
3705-80 CCU I FT SYMPTOM INDEX - Cont.
Routine
Error
Code
Function Tested
Error Descriptton
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
Note 6: Use the following chart to determine the first suspected card or cards. Key off the failing bits in reg X'15' (bits in error).
Bit in Error
Reg X'15'
Failure
Function
Card
Logic Page
Byte 0, bit 1
bit 2
Byte 0
Byte 1
SOR
SOR
A·B4G2
A·B4A2
OP993
OR993
Note 7: Use the following chart to determine the first suspected card or cards. Key off the failing bits in reg X'15' (bits in error).
Bits in Error
Reg X'15'
Failure
Function
Card
Byte 0, bit 0
bit 1
bit 2
Byte X
Byte 0
Byte 1
SAR
SAR
SAR
A·B402
A·B4D2
A·B4C2
Logic Page
CV001
CV001
OS001
Z3705BCA CCU 1FT SYMPTOM INDEX
CCU 112
This pa~e intentionally left blank
;'
"
/
'-.
'J
./
(
',-
"
'-. .
\
.../
(~
'., j
/~
'-
/
.~
r~
I
,--"
./
"-
I
./
'.
./
'\
,
'.
./
r'~
'.
./
/
(-\
'-. ../
1"'''.
)
./
'-
./
'.
'- ./
'.. , /
'-. .../
'"
(-.,
\
'\.
/
'
"-
./
!
//'''.
\
/
../
\
"-
j
f
'-.
'.
j
..
;/-._-...."
/"',.
-.
\.J
'-..j
/
- -..
(
l
l./
_---- -----
(
{-
-
-
(
--~.
(,
(
(
(
(
(
(
(~,
c-
..
(
(
...
(
(
(-.
(
/
--------------
<:.
(.
(
(
(,
(~-.
(,
r--
('
(
(
('
3705-80 STORAGE I FT SYMPTOM INDEX
ADAPTER CONSIDERATIONS
The entire storage array is considered as one adapter. Errors are detected and displayed by the DCM as established by DCM-IFT conventions.
FAI LURE ANALYSIS
Errors in storage control circuits can appear as array card errors when the diagnostics are run. If an array card error is indicated by diagnostics, the suggested procedure is to swap the indicated card with another one and
run the same diagnostics again. If the error indications remain the same, panel procedures should be used to test the control circuitry (FETMM, SY27-0209, page 7-260). Error indications are as follows unless noted otherwise in the storage symptom index:
Reg
Reg
Reg
Reg
X'13' = failing address
X'14' = actual data received
X'15' = failing data bits ON
X'16' = expected data
All routines except the worst case routine set bybass CCU check stop mode during the test to allow an error display instead of a hardstop. The worst case routine does not set bypass CCU check stop because parity errors
must be detected by a CCU check rather than data verification. Set the DIAGNOSTIC CONTROL switch to BYPASS CC CHECK STOP position for an error display of the data bits if desired.
NOTES
Referenced notes are in the back of the storage I FT symptom index.
Routine
Error
Code
X2XX
2X01
L1 irpt handler subroutine. Error 1 verifies that aLl irpt has
been caused by address exception condition in the address
exception routine.
Unexpected L1 irpt encountered. Address exception expected.
Other irpt bit(s) also on. Flag stored by the address exception
routine should equal input reg X'7E'. (lrpt Req)
Definition of unexpected bits:
1.0 - Address compare
1.2 - In/out check
1.3 - Protection check
1.4 - Invalid op
1.6 - IPL level 1 request
6-090
Reg X'04' = interrupt request bits from input
reg X'7E'. Bit 1.1 expected. Reg X'06' =
expected data.
X2XX
2X02
L1 irpt handler subroutine: Error 2
An L1 address exception did not occur at expected instruction
in address exception routine.
6-050
Reg X'04' = adr of inst following the one causing
the L1 interrupt. Reg X'06' = adr of inst following the one that should have caused interrupt.
X2XX
2X03
L1 irpt handler subroutine. Error 3 verifies that address exception condition can be reset.
Address exception bit failed to reset after the expected address
exception condition.
6-050
Reg X'7E' bit 0 was set by address exception
but could not be reset.
X210
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
Single bit error correction test. This routine tests the ability to
detect and correct a single bit or check bit error in storage. An
error is forced via the diagnostic register for each of the data bits
in both the on and off condition. The results are tested to verify
that the bit was corrected and there is not an existing error
already in storage. An error in this routine could be caused by
storage support circuitry. Refer to the STORAGE section in
Volume 2.
Z3706CAA STORAGE 1FT SYMPTOM INDEX
1FT STG 200
c
3705-80 STORAGE 1FT SYMPTOM INDEX -Cont.
Z3706CAA STORAGE 1FT SYMPTOM INDEX
Suspected Card
Location(s)
Error
Routine
Error Description
Function Tested
Code
Program
Mask
FEALD
Page
FETMM
Page
Failed to correct single bit error. Error was forced via the
diagnostic register.
7-220
OX02
Single bit error correction.
Failed to correct single bit error in complement pattern. Error
was forced via the diagnostic register.
7-220
'OX03
Data bit error. Errors already exist in storage.
Unable to verify single bit error correction due to error(s)
already existing in storage at several addresses.
7-220
OX04
Check bit error. Errors already exist in storage.
Unable to verify single bit error correction due to error(s)
already existing in storage at several addresses.
7-220
Failed to detect a double bit error. CCU check register X'7D'
should indicate SDR check.
7-220
R13 =data add ress
R14 = actual bits from CCU check reg X'7D'.
R15 = CCU check reg bits in error.
R16 =data stored.
Op reg check not indicated
7-220
R13 = test address.
R14 =data read from test address (should =
X'OOOO').
R15 = CCU check reg bits received (should
contain.op reg check).
1
I
X211
Double bit error detection. Problem may be ECC card or other
storage support logic.
X212
Bus out parity test. This routine forces bad parity on CCU bus
out via output reg X'78'. If a bus out check occurs, a double bit
error condition is indicated to the CCU when that address is read.
OX01
Bus out parity.
X213
Address exception test. This routine tests ability to generate an
address exception L1 interrupt or fold condition in which the
data is stored in address zero. Flags are set to indicate to the L1
interrupt that an address exception L1 Interrupt is expected.
The interrupt or fold should occur during an attempt to store
into an invalid address.
~,
'l
"./
R14
R15
Double bit error detection test. This routine tests the ability to
detect a double bit error and provide the correct error indications.
Double bit errors are forced via the diagnostic register.
OX01
'-.,'/
= actual data.
= bit in error.
R14 = actual data.
R15 = bit in error.
R14 = actual data.
R15 = bit in error.
R14 = actual data.
R15 = bit in error.
Single bit error correction.
I
,
Comments
OX01
X210
/
1FT STG 210
OX01
CDS, input X'70' compare.
Number of 32K increments derited from CDS and input
X'70'do not compare.
R14 =number of 32 increments taken from CDS
data, after one shift left and should compare with
input X'70'. Example: 256K in CDS =8800,
after one shift left = 1000. 256K in input req
X'70' = 1000. R15 = bits in error. R16 = input
X'70'.
OX02
Address exception or fold. For 256K the maximum address
+2 = address 0 or fold.
Failed to indicate address exception or fold. The address
should fold to zero.
R13 = maximum valid address determined from
input req X'70'.
R14 = Data read from address zero. Should be
zero due to fold condition.
,\.
.'"
()
'-..-
/"
1
'"
\...j
1"""'1
"
./
C)
f''\
\..
j
'\.
'--
/
0
'-...j
r-'-.'
'-....../
\
_/
\...J
'"
-
... /
(~
./
,
I~
\'-.~
/'
,r "'\.
r~
\... ./
''-...J/
:'1
~
(''\,
j
,.
(
"\,
,/
!
.r~',
<
j
1,/
./-~'''~'\
/
""\
J
(~
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(-' f
(
(
3705-80 STORAGE 1FT SYMPTOM INDEX - Cont.
Error
Routine
Functio,n T esI!ed
Code
X214
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
Double bit error pattern test. This routine stores, loads and tests
a pattern, its complement and its recomplement. Two patterns
are used to provide bit variation. No errors are forced via the
diagnostic register. If a double bit error occurs, a test is made to
determine which card the bits are on, in which case the card is
identified. If the bits in error are on both cards of a pair,
information is saved from worst card analysis (routine #15).
Pattern 1 = 5555/AAAA
Pattern 2 = 800117FFE
OX01
Double bit error.
Double bit errors have occurred and the errors have been
determined to be in a single array card as identified by reg
X'15' displacement value.
7·220
R13 = failing adr.
R15 =displacement into worst card table. (See
note 1.)
OX02
Double bit error. If routine 14 was run as single routine request
continue to termination and request routine 15. If problem
definition SSW was set at 1FT select, continue. If it was not, set
9101 in data switches, function 1, and continue.
Double bit errors have occurred, but cannot be isolated to a
single array card. Suggested procedure is to set DCM sense
switch for problem definition to cause routine #15 to be run, or
run the routine as a single routine. A flag is set to cause routine
#15 to test only the failing array cards.
7·220
R13 = failing adr at which the double bit error
occurred.
X215
Single bit error pattern test.
Note: This routine runs in problem definition mode. Either the
DCM sense switch should be set for problem definition or the
routine should be run as a single routine request.
This routine stores, loads, and tests a pattern, its complement
and its recomplement. Two patterns are used to provide bit
variation.
***Single Bit error Forced***
Pattern 1 = 5555/AAAA
Pattern 2 = 800117FFE
OX01
Worst card analysis.
The worst card has been determined.
7·220
R15 byte 1 = displacement into worst card table.
See Note 1.
If reg 15 = X' 10', worst card = position U2.
OX02
Worst card analysis - the worst card is the card with the greatest
number of single bit errors.
Double bit error detected in routine 14 has determined worst
card within the range of addresses where the double bit error
exists.
7·220
R15 byte 1 =displacement into worst card table.
See Note 1. If reg 15 = X' l 0', position U2.
EOXX
This code is displayed because routine 15 takes longer than 20
seconds to run. It indicates only that the routine is running and
is not in a loop.
Z3705CAA STORAGE 1FT SYMPTOM INDEX
1FT STG 220
This page intentionally left blank
(
(
(
(
(
(
(
(
(
«
(
(
(
(
(
(
(
(
(
(
(
3705-80 STORAGE 1FT SYMPTOM INDEX - Cont.
Error
Rout.ine
Functio,n Tested
Code
X216
Error Description
Suspected Card
Location(s)
Program.·
Mask
FEALD
Page
FETMM
Comments
Page
Address Failure Analysis. This Routine attempts to analyze a solid addressing failure by storing each address in its own location as data. Failures are saved for a composite error display I from which consistent
address bits can be analyzed. Failing pattern can be determined by combining bits consistently ON from error code OX01 and bits consistently OFF from error code OX02. Bit definitions are as follows:
BYTE
XX0000000011111111
670123456701234567
XX XXXX XXXXXXXXXXXX
r 1:Tcsx
SAR
L unl
Card Select off = T2, on = U2
OX01
Address failure analysis.
Addressing failure. Replace bits in address layout with a 1 for
each bit ON in reg X'15 /. Continue to error code OX02 to complete failing pattern.
7-220
R 15 = bits consistently ON in all failures.
OX02
Address failure analysis.
Addressing failure. Replace bits in address layout with a 0 for
each bit ON in reg X'15'. Bits remaining as X after error code
OX01 and OX02 were not consistent in the failures.
7-220
R15
Addressing failure. Compare expected and actual data to
determine address bits in error.
7-230
R13 = failing address.
R14 = actual data.
R 15 = bits in error.
R 16 = expected data.
X217
= bits consistently OFF in all failures.
Addressing capability. This routine checks addressing capability
by storing each location with its own address as data and testing
that the data was stored correctly.
0001
Addressing capability.
NOTE 1: ARRAY CARD IDENTIFICATION
R15
Displacement
Card
Location
Address Range
00 or 02
04 or 06
OB or OA
OC or OE
10 or 12
14 or 16
1B or 1A
1C or 1 E
T2
T2
T2
T2
U2
U2
U2
U2
00000-07FFE
OBOOO-OFFFE
10000-17FFE
1BOOO-1 FFFE
20000-27FFE
2BOOO-2FFFE
30000-37 F F E
3BooO-3F F F E
\
\
Z3705CAA STORAGE 1FT SYMPTOM INDEX
1FT STG 230
This page intentionally left blank
/"
'..
,,
-//
(
"
/'..
\,
./
(~
/",'~
".
./
'.
j
'... ./
j
"
"
/
' ..
./
"
/
~~
,~.
/
"~
'\
r
'\
\., ./
'..
./
(
I
\.... .
/
r '\i
~ ./
(
'..
_/
,
,.~
,/
)
./
\.
./
./
\....j
'.~'"
"
{' ~
t,
..
"------"~----
{
-------'
(
c
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
3705-80 TYPE 1 CA I FT SYMPTOM INDEX
3705-80 Type 1 Channel Adapter (CA) Symptom Index
The type 1 CA 1FT symptom index is a listing of error codes relating to failures occurring during the operation of the 1FT. All bits of the CA registers which have both input and output capability are tested with several
patterns, including all ones, zeros, every other bit, growing ones, and floating zeros patterns. Interaction between the registers is also checked. In addition to verification of register operation, the function of program
requested and suppress·out monitor level 3 interrupts are verified. Error codes are also given for unexpected and/or unknown level 1 (L 1) and level 3 (L3) interrupts and if the CA interface was not disabled.
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Routine
Error
Code
1301
OX01
Disable CA type 1 interface.
Channel interface was not disabled.
A4P2
0008
RC103
1302
OX02
CA diagnostic reset.
Did not clear reg X'60'.
A4L2
FFFF
RC402
8·130
OX04
CA diagnostic reset.
Did not clear reg X'62'.
A4L2
FFFF
RC403
8·130
OX08
CA diagnostic reset.
Did not clear reg X'66'.
A4T2
FFFF
RC601
8·130
OX09
CA diagnostic reset.
Did not clear reg X'67'.
A4K2
OOFF
RC505
8·130
1303
OXOA
Set reg X'63' to X'OOOO'.
Unable to set reg X'63' to X'OOOO'.
A4M2, A4P2
A4K2
FFFF
RC502
8·100
1304
OXOB
Set reg X'63 to X'FFFF'.
Unable to set reg X'63' to X'FFFF'.
A4M2,A4P2
A4K2
FFFF
RC502
8·100
1305
OXOC
Set reg X'63' to X'5555'.
Unable to set reg X'63' to X'5555'.
A4M2,A4P2
A4K2
FFFF
RC502
8·100
OXOD
Set reg X'63' to X'AAAA'.
Unable to set reg X'63' to X'AAAA'.
A4M2,A4P2
A4K2
FFFF
RC502
8·100
1306
OXOE
Set reg X'63' using floating zeros pattern.
Unable to set reg X'63' using floating zeros pattern.
A4M2,A4P2
A4K2
FFFF
RC502
8·100
1307
OXOF
Set reg X'63' using growing ones pattern.
Unable to set reg X'63' using growing ones pattern.
A4M2,A4P2
A4K2
FFFF
RC502
8·100
Function Tested
Error Description
I
1308
OXOA
Set reg X'64' to X'OOOO'.
Unable to set reg X'64' to X'OOOO'.
A4M2, A4P2
A4K2
FFFF
RC502
8·110
1309
OXOB
Set reg X'64' to X'FFFF'.
Unable to set reg X'64' to X'FFFF'.
A4M2, A4P2
A4K2
FFFF
RC502
8·110
130A
OXOC
Set reg X'64' to X'5555'.
Unable to set reg X'64' to X'5555'.
A4M2,A4P2
A4K2
FFFF
RC502
8·110
OXOD
Set reg X'64' to X'AAAA'.
Unable to set reg X'64' to X'AAAA'.
A4M2,A4P2
A4K2
FFFF
RC502
8·110
OXOE
Set reg X'64' using floating zeros pattern.
Unable to set reg X'64' using floating zeros pattern.
A4M2,A4P2
A4K2
FFFF
RC502
8·110
130B
Comments
Z3705DAACA1IFTSYMPTOM II\IDEX
1FT CA1 300
3705-80 TYPE 1 CA I FT SYMPTOM INDEX - Cont.
Z3706DAA CA11FT SYMPTOM INDEX
(
Error
'-
,/
Program
Location(s)
Mask
FEALO
Page
FETMM
Page
130C
OXOF
Set reg X'64' using growing ones pattern,
Unable to set reg X'64' using growing ones pattern,
A4M2,A4P2
A4K2
FFFF
RC502
8-110
1300
OXOA
Set reg X'65' to X'OOOO',
Unable to set reg X'65' to X'OOOO',
A4M2,A4P2
A4K2
FFFF
RC502
8-110
130E
OXOB
Set reg X'65' to X'FFFF',
Unable to set reg X'65' to X'FFFF',
A4M2,A4P2
A4K2
FFFF
RC502
8-110
130F
OXOC
Set reg X'65' to X'5555',
Unable to set reg X'65' to X'5555',
A4M2, A4P2
A4K2
FFFF
RC502
8-110
OXOD
Set reg X'65' to X'AAAA'.
Unable to set reg X'65' to X'AAAA'.
A4M2,A4P2
A4K2
FFFF
RC502
8-110
1310
OXOE
Set reg X'65' using floating zeros pattern.
Unable to set reg X'65' using floating zeros pattern.
A4M2,A4P2
A4K2
FFFF
RC502
8-110
1311
OXOF
Set reg X'65' using growing ones pattern.
Unable to set reg X'65' using growing ones pattern.
A4M2,A4P2
A4K2
FFFF
RC502
8-110
1312
OXOB
Set reg X'66' to X'CFOO' by output of X'40CF' to reg X'66'.
Unable to set reg X'66' to X'CFOO'.
A4T2
FFFF
RC601
8-120
1313
OXOC
Set reg X'66' to X'4500' by output of X'0045' to reg X'66'~
Unable to set reg X'66' to X'4500'.
A4T2
FFFF
RC601
8-120
OXOD
Set reg X'66' to X'8AOO' by output of X'008A' to reg X'66',
Unable to set reg X'66' to X'8AOO'.
A4T2
FFFF
RC601
8-120
1314
OXOE
Set reg X'66'using floating zeros pattern.
Unable to set reg X'66' using floating zeros pattern.
A4T2
CFOO
RC601
8-120
1315
OXOF
Set reg X'66' using growing zeros pattern.
Unable to set reg X'66' using gr,owing zeros pattern.
A4T2
CFOO
RC601
8-120
1316
OXOA
Set reg X'62' to X'OOOO'.
Unable to set reg X'62' to X'OOOO'.
A4L2
FFFF
RC403
8-080
1317
OX10
Set reg X'62' to X'8000' outbound transfer sequence.
Unable to set reg X'62' to X'8000'.
A4L2
FFFF
RC403
8-080
1318
OX 11
Set reg X'62' to X'4000' inbound transfer sequence.
Unable to set reg X'62' to X'4000'.
A4L2
FFFF
RC403
8-080
1319
OX12
Set reg X'62' to X'2000' ESC final status transfer sequence.
Unable to set reg X'62' to X'2000'.
A4L2
FFFF
RC403
8-080
131A
OX13
Set reg X'62' to X'1 000' NSC channel end transfer sequence.
Unable to set reg X'62' to X'1000'.
A4L2
FFFF
RC403
8-080
OX14
Set Channel End status when setting reg X'62' to X'1000'.
Unable to set reg X'66' to X'0800'.
A4L2
FFFF
RC601
8~080
OX15
Set reg X'52' to X'OBOO' NSC final status transfer sequence.
Unable to set reg X'62' to X'0800'.
A4L2
FFFF
RC403
8-080
OX16
No bits are set in reg X'66' when setting reg X'62' to X'OBOO'.
Reg X'66' not all zeros.
A4T2
FFFF
RC601
8-080
OXOA
Pretest. Set reg X'62' to X'OOOO'.
Unable to set reg X'62' to X'OOOO'.
A4L2
FFFF
RC403
131C
"-,
Suspected Card
Code
131B
/"
Function Tested
Routine
\
/
I
r
\
'--
'1,
()
(
"-
~\
\'"
-;./
Comments
I
'I
Reg X'55' set inconectly.
!"-~
IC~\
I
//
Error Description
1FT CA 1 310
',,-/
'"--,,,I
./
\.~
/
('
'\
\..
/
(
/,--.
'-.- I
,c-
,/"j
~I
',,-.
I.
"
I
(/
(
(
(
(
(-
(
(
(
(
(
(
(
(
(
c
(
3705-80 TYPE 1 CA 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
131C
OX20
Set L3 program requested irpt.
L3 irpt did not occur.
A4T2
0006
RC601
1310
OXOA
Pretest~
Unable to set reg X'62 to X'OOOO'.
A4L2
FFFF
RC403
OX21
Set suppress out monitor.
L3 irpt did not occur.
A4T2
OOOA
RC602
OXOA
Pretest. Set reg X'63' to X'OOOO'.
Unable to set reg X'63' to X'OOOO'.
A4M2
FFFF
RC403
OX40
When X'OOOO' is set in reg X'63' it does not set reg X'64'.
Reg X'64' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-100
8-110
OX41
When X'OOOO' is set in reg X'63' it does not set reg X'65'.
Reg X'65' set incorrectly.
A4D2,A4K2
FFFF
RC402
8-100
8-110
OX42
When X'OOOO' is set in reg X'63' it does not set reg X'66'.
Reg X'66' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-100
8-120
OXOA
Pretest. Set reg X'64' to X'OOOQ'.
Unable to set reg X'64' to X'OOOO'.
A4M2
FFFF
RC502
OX43
When X'OOOO' is set in reg X'64' it does not set reg X'65'.
Reg X'65' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-110
8-120
OX44
When X'OOOO' is set in reg X'64' it does not set reg X'66'.
Reg X'66' set incorrectly.
A4D2,A4K2
FFFF
RC601
8-110
8-120
OX45
When X'OOOO' is set in reg X'64' it does not set reg X'63'.
Reg X'63' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-100
8-110
OXOA
Pretest. Set reg X'65' to X'OOOO'.
Unable to set reg X'65' to X'OOOO'.
A4M2
FFFF
RC502
OX46
When X'OOOO' is set in reg X'65' it does not set reg X'66'.
Reg
set incorrectly.
A4D2,A4K2
FFFF
RC601
8-110
OX47
When X'OOOO' is set in reg X'65' it does not set reg X'63'.
Reg X'63' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-110
8-100
OX48
When X'OOOO' is set in reg X'65' it does not set reg X'64'.
Reg X'64' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-110
OXOB
Pretest. Set reg X'63' to X'FFFF'.
Unable to set reg X'63' to X'FFFF'.
A4M2
FFFF
RC502
OX4C
When X'FFFF' is set in reg X'63' it does not set reg X'64'.
Reg X'64' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-100
8-110
OX4D
When X'FFFF' is set in reg X'63' it does not set reg X'65'.
Reg X'65' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-100
8-110
OX4E
When X'FFFF' is set in reg X'63' it does not set reg X'66'.
Reg X'66' set incorrectly.
A4D2,A4K2
FFFF
RC601
8-100
8-120
131E
131F
1320
1321
Function Tested
Set reg X'62' to X'OOOO'.
Error Description
X'66~
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
8-080
Rerun routine 1303.
8-080
Rerun routine 1308.
Rerun routine 130D.
Rerun routine 1304.
Z3705DAA CA11FT SYMPTOM INDEX
1FT CA 1 320
3705-80 TYPE 1 CA I FT SYMPTOM INDEX - Cont.
Z3705DAA CA 1 I FT SYMPTOM INDEX
,..
Routine
Error
Code
1321
OX4F
When X'FFFF' is set ih reg X'63' it does not set reg X'60'.
Reg X'60' set incorrectly.
A4D2,A4K2
FFFF
RC402
8-100
8-120
OX51
When X'FFFF' is set in reg X'63' it does not set reg X'62'.
Reg X'62' set incorrectly.
A4D2,A4K2
FFFF
RC403
8-100
8-080
OXOB
Pretest. Set reg X'64 to X'FFFF'.
Unable to set reg X'64' to X'FFFF'.
A4M2
FFFF
RC502
OX52
When X'FFFF' is set in reg X'64' it does not set reg X'65'.
Reg X'65' set incorrectly.
A4D2,A4K2
FFFF
RC502
OX53
When X'FFFF' is set in reg X'64' it does not set reg X'66'.
Reg X'66' set incorrectly.
A4D2,A4K2
FFFF
RC601
8-110
8-120
OX54
When X'FFFF' is set in reg X'64' it does not set reg X'60'.
Reg X'60' set incorrectly.
A4D2,A4K2
FFFF
RC402
8-110
8-070
OX56
When X'FFFF' is set in reg X'64' it does not set reg X'62'.
Reg X'62' set incorrectly.
A4D2,A4K2
FFFF
RC403
8-080
8-110
OX57
When X'FFFF' is set in reg X'64' it does not set reg X'63'.
Reg X'63' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-100
8-110
OXOB
Pretest. Set reg X'65' to X'FFFF'.
Unable to set reg X'65' to X'FFFF'.
A4M2
FFFF
. RC502
OX58
When X'FFFF' is set in reg X'65' it does not set reg X'66'.
Reg X'66' set incorrectly.
A4D2,A4K2
FFFF
RC601
8-120
8-110
OX59
When X'FFFF' is set in reg X'65' it does not set reg X'60'.
Reg X'60' set incorrectly.
A4D2,A4K2
FFFF
RC402
8-070
8-110
OX5B
When X'FFFF' is set in reg X'65' it does not set reg X'62'.
Reg X'62' set incorrectly.
A4D2,A4K2
FFFF
RC403
8-080
8-110
OX5C
When X'FFFF' is set in reg X'65' it does not set reg X'63'.
Reg X'62' set incorrectly.
A4D2, A4K2
FFFF
RC502
8-100
8-110
Function Tested
Error Description
Suspected Card
location(s)
Program
FEAlD
FETMM
PIge
Page
1FT CA 1 330
Comments
0
1322
Rerun routine 1309.
,
1323
1324
I
8-110
Rerun routine 130E .
I
OX5D
When X'FFFF' is set in reg X'65' it does not set reg X'64'.
Reg X'64' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-110
OX5E
When X'OOCF' is set in reg X'66' it does not set reg X'60'.
Reg X'60' set incorrectly.
A4D2,A4K2
FFFF
RC402
8-120
8-070
OXOB.
Pretest. Output X'OOCF' to reg X'66'.
Input from reg X'66' not X'CFOO'.
A4T2
FFFF
RC601
OX60
When X'OOCF' is set in reg X'66' it does not set reg X'62'.
Reg X'62' set incorrectly.
A4D2,A4K2
FFFF
RC403
Rerun routine 1312.
8-120
8-080
.
'-,-.
,,;
'"
;'-'-
~~i
/
/
/
"
./
,r,,\
,-j
,
./
-
;<.~
/';<~
"
./
,
./
' .....,/
."-
I'
.......\
-"
./
,
./
l
(,
(\ (/
(
c
(
(
(
c
(
(
(
«
(
(
(
(
(-/
f: (
(
3705-80 TYPE 1 CA I FT SYMPTOM INDEX - Cont.
Routine
Error
Code
1324
OX61
When X'OOCF' is set in reg X'SS' it does not set reg X'S3'.
Reg X'S3' set incorrectly.
OX62
When X'OOCF' is set in reg X'SS' it does not set reg X'S4'.
OX63
13XX
Suspected Card
Location(s)
Program
Made
FEALD
Page
A4D2,A4K2
FFFF
RC502
8-120
8-120
Reg X'S4' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-120
8-110
When X'OOCF' is set in reg X'SS' it does not set reg X'S5'.
Reg X'S5' set incorrectly.
A4D2,A4K2
FFFF
RC502
8-120
8-110
1X01
Disable CA type 1 interface.
Channel interface was not disabled.
A4P2
0008
RC103
8-130
1XOA
Set regs to X'OOOO'.
Unable to set regs to X'OOOO'.
A4M2, A4P2
FFFF
RC501
8-100
8-110
1XOB
Set all used bit positions to ones.
Unable to set ones to all used bit positions.
A4M2,A4P2
FFFF
RC501
8-100
8-110
2XOO
Unexpected L1 irpt.
L1 irpt with no request bits on.
A4K2
XXXX
RC505
8-340
2X01
Unexpected L3 irpt.
Initial selection L3 irpt bit on in reg X'77' (bit 1.4).
A4L2
XXXX
RC402
2X02
Reset initial selection L3 irpt.
Failed to reset initial selection L3 irpt.
A4L2
XXXX
RC402
8-0BO
2X03
Unexpected L3 irpt.
Data/status L3 irpt bit on in reg X'77' (bit 1.3) without suppress
out monitor or program requested irpt bits on in reg X'S7'.
A4L2
XXXX
RC403
8-090
2X04
Reset data/status L3 irpt.
Failed to reset data/status L3 irpt.
A4L2
XXXX
RCS02
8-080
2X05
Unexpected suppress out L3 irpt.
Suppress out L3 irpt bit on in reg X'77' (bit O.S).
A4T2
XXXX
RCS02
2X06
Reset suppress out monitor L3 irpt.
Failed to reset suppress out monitor.
A4T2
XXXX
RCS02
8-080
2X07
Unexpected L3 irpt.
Unexpected program reg irpt.
A4T2
XXXX
RCS02
8-090
2X08
Reset program requested L3 irpt.
Failed to reset program requested L3 irpt.
A4T2
XXXX
RCS02
2X09
Unexpected L3 irpt from type 1 CA.
No request bits on in reg X'S2'.
A4L2,A4T2
XXXX
RC407
8-090
2X1X
Unexpected L1 irpt.
Local store check.
A4K2
XXXX
RC505
8-340
See Note 1.
2X2X
Unexpected L1 irpt.
CCU outbus check.
A4K2
XXXX
RC505
8-340
See Note 1.
8-340
See Note 1.
Function Tested
Error Description
FETMM
Page
I
Comments
Reg X'S2' should indicate cause irpt.
8-080
I
2X4X
Unexpected L1 irpt.
I/O inst accept check.
A4K2
XXXX
RC505
!
,
2X8X
Unexpected L1 irpt.
Channel bus-in check.
A4K2
XXXX
RC505
8-340
See Note 1.
2XFF
Reset unexpected L1 irpt.
Failed to reset L1 irpt.
A4K2
XXX X
RC505
8-130
See Note 1.
Z3705DAACA11FTSYMPTOM INDEX
1FT CA1 340
This page intentionally left blank
(
(
(
(
(
c
(
(
(
(
(
(
(
(
(.
(
(
3705-80 TYPE 1 CA I FT SYMPTOM INDEX - Cont.
Error
Routine. Code
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
NOTES:
Note 1: Combinations of more than one L 1 irpt cause will be indicated by Y in error code X'2XYX' and these causes can be separated into codes X'2X 1X' - X'2X8X'.
-
Z3705DAACA11FTSYMPTOM INDEX
1FT CA1 360
This page intentionally left blank
/
" \,
'-.
./
.'
....
'I/
/
(
'"
,/'''',
!
....
./
r-,\
'
.... ./
/~'\
'-...
./
.....
,/
....
..
\
./
.... '-_./'
\
,,'
/'
./
.....
.
("\
!' '\
/
/'
'-...
.../
/'
(-
(
(
(
(
(
(
(
(
(
('
(
(
(
(
(
(
c
(
{
(
(/
(
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX
The type 4 CA IFT symptom index is a listing of error codes relating to failures occurring during the operation of the IFT. All bits of the CA registers which have both input and output
capability are tested with several patterns, including all ones, zeros, every other bit, growing ones, and floating zeros patterns. Interaction between the registers is also checked. In addition to verification of register operation, the function of program requested and suppress-out monitor level 3 interrupts are verified. Error codes are also given for unexpected and/or
un k nown Ieve I 1 (L 1 ) an d Ieve I 3 (L3) .mterrupts an d'f
I t he CA'mter face was not d'Isa bl ed .
Routine
Error'
Code
X901
X902
Fumctio,n Tested
Error Descriptio,n
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Select type 4 CA.
OX01
Unable to select type 4 CA.
E4F2
PA108
H-120
Reg X'14' contains the results of an IN X'67'
instruction executed after the selection failed.
OX02
Unable to select type 4 CA.
E4F2
PA108
H-120
Reg X'14' contains the results of an IN X'77'
instruction executed after the selection failed.
Type 4 CA interface was not disabled.
E4P2
PB103
H-120
OX02
Did not clear reg X'60'.
E402
E4K2
E4N2
E4L2
PH107
PF103
PC105
PE102
H-120
H-050
Any bits.
Bit 0.6.
Bit 0.1,0.2,0.7.
Bit 0.1, 0.3, 0.5.
OX04
Did not clear reg X'62'.
E402
E4L2
E4T2
E4N2
E4K2
PH107
PE103
PG102
PC104
PF104
H-120
H-070
Any bits.
Bits 0.0-0.4, 1.0, 1.5-1.7.
Bits 0.6, 0.7.
Bits 0.5, 1.1, 1.3.
Bits 1.2, 1.4.
OX08
Did not clear reg X'66'.
E402
E4M2
E4T2
PH107
PD108
PG102
H-120
H-100
Any bits.
Bits 0.0, 0.1,0.4,0.5.
Bits 0.6, 0.7.
OX09
Did not clear reg X'67'.
E402
E4K2
E4F2
PH107
PF104
PA108
H-120
H-110
Any bits.
Bits 1.1-1.5.
Bits 1.6-1.7.
OXOA
Did not clear reg X'6C'.
E402
E4H2
E4E2
PH107
PL102
P0104
H-120
H-f30
Any bits.
Bit 0.0.
Bit 0.1.
OX01
X903
Disable type 4 CA interface.
Type 4 CA diagnostic reset.
X904
OXOA
Set reg X'63' (SSAR).to X'OOOO' (all zeros).
Unable to set reg X'63' to X'OOOO'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H-080
X905
OXOB
Set reg X'63' (SSAR) to X'FFFF' (all ones).
Unable to set reg X'63' to X'FFFF'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H-080
X906
OXOC
Set reg X'63' 1QX'5555'.
Unable to set reg X'63' to X'5555'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H-080
~
Comments
----Z3705JAA CA4 1FT SYMPTOM INDEX
1FT CA4365
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX· Cont.
Error
Rout,ne
Code
X906
(cont.)
OXOD
X907
OXOE
X908
Location(s)
Program
FEALD
FETMM
Mask
Page
Page
Unable to set reg X'63' to X'AAAA'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H·OSO
Set reg X'63' (SSAR) using growing ones pattern.
Unable to set reg X'63' using growing ones pattern.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H·OSO
OXOF
Set reg X'63' using floating zeros pattern.
Unable to set reg X'63' using floating zeros pattern.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H·OSO
X909
OXOA
Set reg X'64' (data reg 1 and 2) to X'OOOO' (all zeros).
Unable to set reg X'64' to X'OOOO'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H·09O
X90A
OXOB
Set reg X'64' to X'FFFF' (all ones).
Unable to set reg X'64' to X'FFFF'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H·09O
X90B
OXOC
Set reg X'64' to X'5555'.
Unable to set reg X'64' to X'5555'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H-09O
OXOD
Set reg X'64' to X'AAAA'.
Unable to set reg X'64' to X'AAAA'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H-09O
X90C
OXOE
Set reg X'64' using floating zeros pattern.
Unable to set reg X'64' using floating zeros pattern.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H-09O
X90D
OXOF
Set reg X'64' using growing ones pattern.
Unable to set reg
E4M2
E4P2
E4K2
PD107
PB106
PF102
H-09O
X90E
OXOA
Set reg X'65' to X'OOOO' (all zeros).
Unable to set reg X'65' to X'OOOO'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H-09O
X90F
OXOB
Set reg X'65' to X'FFFF'.
Unable to set reg X'65' to X'FFFF'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H-09O
/
/'
Suspected card
Error Descrilption
Function T8$t8d
Set reg X'63' to X'AAAA'.
/
'.
Z370&JAA CA41FT SYMPTOM INDEX
'-
/
'\
./
~~\
-...,'\
"\
r-"'I
"--
'-
j
"-
/
(
""-\
"
./
,
/
",
0
"-
X'6~'
using growing ones pattern.
('''.
./
/
-'\
"'- ./
"
......,
',-
'- ./
£'' ' '
'-.. ./
',,-
"',
/
!
Comments
(-"\
'-
./
.J'
(
",-
1FT CA4 366
;
c"
'''----_/
/-----.,....
\
/'
'- , , /J
"-
;-"-'"
/
----- - -
(~
(-
t, <-
.-
(
(
(
(
(~
(
(
(
-
----
~~~------
C (
(
(
(
(
f
('
(
(
(,
(
(
(~
(
..---,'
(:
(e, ("
". "~/
j
(
(
(~~,
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H·09O
Unable to set reg X'65' to X'AAAA'.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H·09O
Set reg X'65' using floating zeros pattern.
Unable to set reg X'65' using floatin,g zeros pattern.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H·09O
X910
OXOC
Set reg X'65' to X'5555'.
Unable to set reg X'65' to X'5555'.
OXOD
Set reg X'65' to X'AAAA'.
OXOE
Program
FETMM
Page
Function T estad
Code
X911
Suspected Card
Location(s)
FEALD
Page
Error
Routine
Error Description
Mask
X912
OXOF
Set reg X'65' using growing ones pattern.
Unable to set reg X'65' using growing ones pattern.
E4M2
E4P2
E4K2
PD107
PB106
PF102
H·09O
X913
OXOB
Set reg X'66' to X'CFOO' by output of X'40CF' to reg X'66'.
Unable to set reg X'66' to X'CFOO'.
E4T2
PG101
H·100
X914
OXOC
Set reg X'66' to X'4500' by output of X'0045' to reg X'66'.
Unable to set reg X'66' to X'4500'.
E4T2
PG101
H-100
OXOD
Set reg X'66' to X'SAOO' by output of X'OOSA' to reg X'66'.
Unable to set reg X'66' to X'SAOO'.
E4T2
PG101
H·100
X915
OXOE
Set reg X'66' using floating zeros pattern.
Unable to set reg X'66' using floating zeros pattern.
E4T2
PG101
H·100
X916
OXOF
Set reg X'66' using growing ones pattern.
Unable to set reg X'66' using growing ones pattern.
E4T2
PG101
H·100
X917
OXOA
Set reg X'62' to X'0000'.
Unable to set reg X'62' to X'OOOO'.
E4L2
E4T2
E4N2
PE103
PG102
PC104
H·060
X918
OX10
Set reg X'62' to X'SOOO' outbound transfer sequence.
Unable to set reg X'62' to X'SOOO'.
E4L2
PE103
H-060
X919
OX11
Set reg X'62' to X'4000' inbound transfer sequence.
Unable to set reg X'62' to X'4000'.
E4L2
PE103
H-060
X91A
OX12
Set reg X'62' to X'2000' ESC final status transfer sequence.
Unable to set reg X'62' to X'2000'.
E4L2
PE103
H·060
X91B
OX13
Set reg X'62' to X'1000', NCS channel end transfer sequence.
Unable to set reg X'62' to X'1000'.
E4L2
PE103
H·060
OX14
Set reg X'66' to X'0800', channel end status.
Unable to set reg X'66' to X'OSOO'.
E4L2
E4T2
PE103
PG101
H·060
OX15
Set reg X'62' to X'0800' NCS final status transfer sequence.
Unable to set reg X'62' to X'OSOO'.
E4L2
. PE103
H-060
OX16
No bits are set in reg X'66' when setting reg X'62' to X'0800'.
Reg X'66' not all zeros.
E4T2
E4L2
PG101
PE103
H·060
X91C
Comments
Z3705JAA CA41FT SYMPTOM INDEX
IFTCA4367
C
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cant.
.Routine
Error
Code
X91D
OXOA
Set Reg X'62' to X'OOOO'during pretest.
Unable to set reg X'62' to X'OOOO'.
OX20
Set L3 program-requested irpt.
OXOA
X91E
X91F
X920
X921
,
"
./
Z3705JAA CA4 1FT SYMPTOM INDEX
"
Program
Location(s)
Mask
FETM,M
Page
E4L2
PE103
H-060
Irpt did not occur.
E4T2
PG102
H-120
Set regX'62' to X'OOOO' during pretest.
Unable to set reg X'62' to X'OOOO'.
E4L2
PE103
H-060
OX21
Set suppress out monitor.
L3 irpt did not occur.
E4T2
PG102
H-120
OXOA
Status service and adr reg address test. Set all bits off in reg X'63' .
and verify that regs X'64', X'65', and X'66' are set correctly.
Unable to set reg X'63' to X'OOOO',
E4M2
PD107
H-OSO
OX40
Reg X'64' set incorrectly.
E4F2
E4K2
PA101
PF101
H-OSO
H-090
OX41
Reg X'65' set incorrectly.
E4F2
E4K2
PA101
PF101
H-OSO
H-090
OX42
Reg X'66' set incorrectly.
E4F2
E4K2
PA101
PF101
H-OSO
H-090
Unable to set reg X'64' to X'OOOO'.
E4M2
PD107
H-090
OX43
Reg X'65' set incorrectly.
E4F2
E4K2
PA101
PF101
H-090
H-090
OX44
Reg X'66' set incorrectly.
E4F2
E4K2
PA101
PF101
H-090
H-090
OX45
Reg X'63' set incorrectly.
E4F2
E4K2
PA101
PF101
H-OSO
H-090
Unable to set reg X'65' to X'OOOO'.
E4M2
E4P2
PD107
PB106
H-090
OX46
Reg X'66' set incorrectly.
E4F2
E4K2
PA101
PF101
H-090
H-l00
OX47
Reg X'63' set incorrectly.
E4F2
E4K2
PA101
PF101
H-OSO
H-090
OX48
Reg X'64' set incorrectly.
E4F2
E4K2
PAt01
PT101
H-090
OXOA
'.
Error Description
Data regs 1 and 2 address test. Set all bits off in reg X'64' and
verify that regs X'63', X'65' and X'66' are set correctly.
OXOA
-.
j
Suspected Ca,rd
FEALD
Page
Function Tested
Data regs 3 and 4 address test. Set all bits off in reg X'65' and
verify that regs X'63', and X'64' and X'66' are set correctly.
/
)
,-
0
)
~
'--
j
('>.,
(
j
,--~.J
/
./
\..,/
!'
'---.
.j
'--~/
,
'--
_.""
.
./
(
r~
'--.
\....../
(\
~/
IFTCA4368
Comments
Rerun routine X917.
Rerun routine X917.
Rerun routine X904.
Rerun routine X909.
;j
-\
r
-
~.
"--../
./
l
(
(/
(
(
(
(
(
(
(
('
(
(
(
(
(
(
(
(~
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Enor
Routine
Code
X922
OXOB
X923
X924
Function T esa.
Error Descri,ption
Suspected card
Location(s)
Program
Mask
FE,ALD
Page
FETMM
Page
Unable to set reg X'63' to X 'FFFF'.
E4M2
E4P2
PD107
PB106
H-OSO
OX4C
Reg X'64' set incorrectly.
E4F2
E4K2
PA101
PF101
H-OSO
H-09O
OX4D
Reg X'65' set incorrectly.
E4F2
E4K2
PA10l
PF101
H-OSO
H-09O
OX4E
Reg X'66' set incorrectly.
E4F2
E4K2
PA101
PF101
H-OSO
H-100
OX4F
Reg X'60' set incorrectly.
E4F2
E4K2
PA101
PF101
H-OSO
H-050
OX51
Reg X'62' set incorrectly.
E4F2
E4K2
PA101
PF101
H-060
H-OSO
Unable to set reg X'64' to X'FFFF'.
E4M2
E4P2
PD107
PB106
H-09O
OX52
Reg X'65' set incorrectly.
E4F2
E4K2
PA10l
PF101
H-09O
OX53
Reg X'66' set incorrectly.
E4F2
E4K2
PA10l
PF101
H-09O
H-100
OX54
Reg X'60' set incorrectly.
E4F2
E4K2
PA101
PF10l
H-09O
H-050
OX56
Reg X'62' set incorrectly.
E4F2
E4K2
PA101
PF101
H-060
H-09O
OX57
Reg X'63' set incorrectly.
E4F2
E4K2
PA101
PF101
H-OSO
H-09O
Unable to set reg X'65' to X'FFFF'.
E4M2
E4P2
' PD107
PB106
H-09O
OX58
Reg X'66' set incorrectly.
E4F2
E4K2
PA101
PF101
H-09O
H-100
OX59
Reg X'60' set incorrectly.
E4F2
E4K2
PA101
PF101
H-050
H-09O
OXOB
OXOB
Status service and adr reg address test. Set all bits on in reg X'63'
and verify that regs X'60', X'62', X'64', X'65' and X'66' are set
correctly.
Data regs 1 and 2 address test. Set all bits on in reg X'64' and
verify that regs X'60', X'62', X'63', X'65' and X'66' are set
correctly.
Data regs 3 and 4 address test. Set all bits on in reg X'65' and
verify that regs X'60', X'62', X'63', X'64', and X'66' are set
correctly.
Comments
Z3705JAA CA41FT SYMPTOM INDEX
1FT CA4369
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cant.
Z3705JAACA41FT SYMPTOM INOEX
Suspected Card
Location(s)
Error
Routine
X924
(cont.)
X925
~
\
""-
J
Code
Erro,r Description
Function Tested
Program
Mask
FEALD
Page
FETMM
Page
OX5B
Reg X'62' set incorrectly.
E4F2
E4K2
PA101
PF101
H-060
H-090
OX5C
Reg X'63' set incorrectly.
E4F2
E4K2
PA101
PF101
H-080
H-090
OX5D
Reg X'64' set incorrectly.
E4F2
E4K2
PA101
PF101
H-090
Reg X'66' set incorrectly.
E4T2
PG101
H-100
OX5E
Reg X'60' set incorrectly.
E4F2
E4K2
PA101
PF101
H-100
H-050
OX60
Reg X'62' set incorrectly.
E4F2
E4K2
PA101
PF101
H-060
H-100
OX61
Reg X'63' set incorrectly.
E4F2
E4K2
PA101
PF101
H-100
H-080
OX62
Reg X'64' set incorrectly.
E4F2
E4K2
PA101
PF101
H-100
H-090
OX63
Reg X'65' set incorrectly.
E4F2
E4K2
PA101
PF101
H-090
H-100
OXOB
r'
NSC status reg address test. Set reg X'66' to X'OOCF' and verify
that no bits are set on in regs X'60', X'62', X'63', X'64' and X'65'.
,c.~
c,
,--j
""-
"
/
"
/
"'\
I'~''''.
.~
'--
./
\.
/
\
/
""-
/
('
'-'\
\...
/
"
(-~.
\...
/c-
/ - --",
""-
/
-\
-",
_/
\.,,- _/
"'-
--\
'-
/
/
/
..
'-- /'
('-"
,
~
/
/
..
Comments
/'----"".,
./
/--
/
\.
./
.
.-
\ .. . /
1FT CA4 310
(
(
(
(
(
(
(
(
(
(
(
(
(
«
(
(
(
(
(
(
(
(
(
(
(
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Routine
Error·
Code
X92E
Function Tested
Error Description
Suspected Card
Lo·cati.an(s)
Program
FEALD
Mask
Page
FETMM
Page
Comments
Reset EB mode and CS mode with an OUT X'62':
1. CS mode is set with an output of X'4000' to reg X'6C'.
2. CS mode is reset with an output of X'0100' to reg X'62'.
3. An IN reg X'6C' is performed to verify that mode bits 0.0
and 0.1 are O.
4. EB mode is set with an output of X'8000' to reg X'6C'.
5. EB mode is reset with an output of X'0100' to reg X'62'.
6. An IN reg X'6C' is performed to verify that mode bits 0.0
and 0.1 are O.
OXOl
Unable to reset CS mode.
E4H2
PL 102
H-140
OX02
Unable to reset EB mode.
E4J2
PL103
H-130
Z3705JBA CA41FT SYMPTOM INDEX
1FT CA4 374
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Z3705JBA CA4 1FT SYMPTOM INDEX
Suspected Card
Location(s)
Error
Routine
Code
Error Description
Function Tested
X930
Program
FEALD
Page
Mask
FETMM
Page
EB mode control reg - all zeros. The CA4 is disabled and reset.
Certain EB mode control reg bits are set with an OUT X'6C',
reset with an OUT X'6C' and the results verified with an IN
X'6C'. Two passes of the routine are made. The bits tested
and the expected results are shown in the "Comments" column.
Comments
Reg X'15' contains the results of the IN X'6C'
instruction. The EB mode' control reg bits
tested and the expected results are:
Pass
OX01
Failure occurred on first pass.
E4H2
PL102
H-140
OX02
Failure occurred on second pass.
E4E2
PL104
H-140
X932
1FT CA4 375
EB mode control reg - all ones. The CA4 IS disabled and
reset. Certain EB mode control reg bits are reset with an OUT
X'6C', set with an OUT X'6C', and the results verified with an
IN X'6C'. Two passes of the routine are made. The bits
tested and the expected results are shown in the "Comments"
column.
Bit
-0.0
0.1
0.4
0.5
0.6
0.7
Description
-1
2
EB mode
CS mode
Syn monitor ctrl It
OLE remember It
ASCII monitor ctrl It
EBCDIC monitor ctrllt
1
0
0
0
0
0
0
1
0
0
0
0
Reg X'15' contains the results of the IN X'6C'
instruction. The EB mode control reg bits
tested and the expected results are:
OX01
E4H2
Failure occurred on first pass.
OX02
PL102
H-140
-Bit
Description
0.0
0.1
0.4
0.5
0.6
0.7
EB mode
CS mode
Syn monitor ctrl It
OLE remember It
ASCII monitor ctrl It\
EBCDIC monitor ctrl It
-Pass
1 2
-1 0
0
0
0
0
0
E4E2
E4H2
E4H2
E4H2
E4H2
PQ104
PL105
PL101
PL 101
PL10l
H-140
H-140
H-140
H-140
H-140
OX01
An IN X'6C' indicated EB mode was not reset.
E4H2
PL102
H-140
Reg X'14' contains the results of the IN X'6C'.
OX02
An IN X'6C' indicated the adr reg was not reset.
E4H2
E4J2
PL103
PK103
H-140
H-130
Reg X'14' contains the results of the IN X'6C'.
A value other than 0 was in the transferred byte
count.
X934
EB mode adr reg reset. After the CA4 is disabled and reset,
EB mode is set and an OUT X'62' is executed to reset the
EB mode adr reg.
Reg X'15' indicates which of the adr reg bits
were not O. Reg X'14' contains the results of
the IN X'6C'.
-,--
"\
j
"
"'\
)
1
0
0
0
0
Failure occurred on second pass.
(
\.
,
/
')
'- "/
'\
"- /
/
/~,
;
" ./
~
c'""""
'\
",J
"- .,./
/
\..
,
~
./
r-~
"
./
.~
,----j
r-"""
\
'-
j
.
(~
"-
"
"
./
'\
"-.J
'---- /J
/""',,
'-
/
(
\..
~
!
./
(
t.
(
(
(
«
(
(' (
(
(
(
(
(
(
(
(
(
(
(
\,
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
X935
Function Tested
Error Description
Suspected Card
Location(s)
Progl8'l11
Mask
FEALD
Page
FETMM
Page
C.'
'"
/
Comments
EB mode adr reg sequencing. After disabling and resetting the
CA4, EB mode is set and an OUT X'62' is issued to reset the EB
mode adr reg and to initiate a service cycle. Sequential OUT
X'60' instructions are issued to step the EB mode adr reg. A
diagnostic reset (OUT X'67') is issued to reset service cycle, EB
mode is again set, and an IN X'6C' is issued to obtain the
transferred byte count. The transferred byte count provides
the value in the EB mode adr reg and is equal to twice the number of output X'6C' instructions issued plus 2.
During the first pass, through this routine, one OUT X'60' is
executed. On each succeeding pass, the number of OUT X'60'
instructions is increased by 1 until on the 16th pass, 16 OUT
X'60' instructions are executed.
OX01
An IN X'6C' indicated either EB mode was reset or the transfer red byte count was not O.
E4H2
E4J2
PL102
PK103
H-140
H-130
If bit 0.0 of reg X'15' is on, EB mode was reset.
If any other bits are on, the EB mode adr reg
was not reset. Pretest error. Rerun routine
X934.
OX02
After a diagnostic reset to reset service cycle, EB mode could not
be set.
E4H2
PL102
H140
Setting EB mode was previously tested in
routine X932. Rerun routine X932.
OX04
Transferred byte count obtained with X'6C' instruction indicated
that EB adr reg did not step correctly.
E4H2
PL103
H-160
Reg X'14' contains the results of the IN X'6C'.
Reg X'13' contains the expected value. This
value is twice the number of OUT X'60'
instructions issued +2. (The adr reg wraps
around at a value of 32 so if 16 X'60' instructions were issued, a value of 2 will be expected.)
Reg X'14' contains the results of the IN X'60'
that obtained the halfword in error. All bits
should be off. (Continuing from the error stop
causes the remaining positions of the array to
be verified.}
X936
OX01OX10
EB mode local store all zero test. After disabling and resetting
the CA4, EB mode is set and 16 OUT X'60' instructions are
executed, turning on all bits in the EB mode local store array.
Then, X'60's are executed to turn off all the bits.
A position of the array was found to be nonzero. The error code
indicates (in hex) which halfword was found to be nonzero. For
example, error code OX01 indicates the first halfword (bytes 0
and 1), error code OX02 indicates the second (bytes 2 and 3), etc.,
up to error code OX10, which indicates the 16th halfword
(bytes 30 and 31).
E4J2
E4G2
PK102
PM101
H-160
H-160
X938
OX01OX10
EB mode local store interference test. After disabling and
re~etting the CA4, the EM mode local store array is set to O.
Then, 16 OUT X'60' instructions are executed to set each
halfword of the EM mode array to selected bit patterns.
Following an IN X'60' to prime the array in-buffer, 16 IN
X'60's are executed to verify that each halfword was properly
set. The first pass through the routine attempts to set all bits
in the array on. Next, each halfword is set to X'AAAA',
X'5555', X7A7A', X'8585', X'C3C3', X'3C3C', X'EFEF'
and X'1010'. Each pattern is written in all array locations and
read back for verification one pattern at a time.
An IN X'60' instruction indicated that a halfword was set as
expected. The error code indicates (in hex) which halfword failed.
For example, OX11 indicates the first halfword (bytes 0 and 1),
OX12 indicates the second (bytes 2 and 3), etc., up to OX20 which
indicates the 16th (bytes 30 and 31) halfword failed.
E4J2
E4G2
PK102
PM101
H-160
H-160
"
Reg X'14' contains the results of the IN X'60',
and reg X'15' indicates which bits were in error.
Continuing from this error stop causes the
remaining positions of the array to be checked
and other data patterns to be used.
,
Z3705JBA CA4 1FT SYMPTOM INDEX
1FT CA4 376
(
3706·80 TYPE 4 CA 1FT SYMPTOM INDEX· Cont.
Z3708JBA CA41FT SYMPTOM INDEX
Suspected card
Error
Routine
X939
X93A
Program
Mask
1FT CA4 377
FEALD
FETMM
Page
Page
Comments
E4J2
E4G2
PK102
PM101
H·160
H·1S0
Reg X'14' contains the results of the IN X'SD',
and reg X'16' Indicates which bits were in error.
Continuing from this error stop causes the
remaining positions of the array to be checked
and other-data patterns to be used, remaining'
positions of the array to be checked, and other
data patterns to be used.
One of the bytes stored in the local store array was incorrect. The
error code indicates (in hex) which halfword failed. For example,
OX11 indicates the first halfword (bytes 0 and 1), OX12 Indicates
the second (bytes 2 and 3), etc., up to OX20, which indicates the
16th (bytes 30 and 31) halfword failed.
E4J2
PK103
PK102
H·160
Reg X'11' contains the expected contents of
the local store bytes, reg X'14' contains the
results of"- the IN X'6D', and reg X'15' indicates
the bits in error. (Continuing from this error
stop causes the remaining local store bytes to
be checked.)
OX01
After storing X'FFFF' into bytes 2 and 3 of the EB mode local
store array, an OUT X'62' is executed to reset the adr reg (the
reset function was previously tested by routine X934) and an IN
X'6D' reads the first halfword (bytes 0 and 1) of the array. This
halfword should contain X'0001' but did not.
E4J2
E4H2
PK102
PL103
H·150
H·140
Reg X'14' contains the results of the IN X'6D'.
The byte located at the adr in reg X'12' plus
X'64' indicates the number of bytes stored in
the array before the IN X'6C' reset was
executed.
OX02
If the first two bytes of the array were not changed, another X'6D'
obtains the second halfword of the array, which should contain
X'FFFF' stored following the IN X'6C' to reset the adr register.
The data was incorrect.
E4J2
E4H2
PK102
PL103
H·150
H·140
Reg X'14' contains the actual results of the IN
X'6D'. The byte located at the adr in reg X'12'
plus X'64' indicates the number of bytes stored
in th!! array before the IN X'6C' reset was
issued.
Cod.
OX01·
OX10
OX01·
OX10
X93C
LOCIItior.I,(s~
Error Description
Function Tasted
EB mode local store variable data. After disabling and resetting
the CA, the EB mode local store array Is .et to O. Then, 16 OUT
X'SO' instructions are executed to set each halfword of the EB
mode array to a certain bit pattern. Following an IN X'6D'
to prime the array In·buffer, 16 IN X'6D's are executed to verify
that each halfword was properly set. The first pass through the
routine sets the array to X'FFFE' and verifies this. A zero is
then floated through the array until X'7FFF' is reached. Each
pattern is written in all locations, read back, and verified. Next,
growing ones patterns starting with X'0001' and ending with
X'FFFF' are stored. Each pattern is written in all locations, read
back, and verified.
EB mode addressing - reset with IN X'6C'. After disabling and
resetting the CA4, the EB mode local store array is set to zeros
and 16 consecutive OUT X'6D's executed. Each OUT X'6D' sets
the number of the local store array byte into that byte of the EB
mode local store array. Thus, bytes 0 and 1 of the array should
contain X'OO' and X'01', bytes 2 and 3 should contain X'02' and
X'03', etc. After all the bytes are set, an IN X'6D' primes the
array in·buffer and each halfword is read to determine that it is
set to its respective number.
An IN X'6D' Instruction Indicated that a halfword was not set as
expected.
The error code Indicates (in hex) which halfword failed. For
example, OX11 Indicates the first halfword (bytes 0 and 1),
OX12 indicates the second halfword (bytes 2 and 3), etc.,
up to OX20, which indicates the 16th (bytes 30 and 31) halfword
failed.
EB mode addressing - reset with IN X'6C'. After disabling and
resetting the CA4, the EB mode local store array is set to zeros
and 'n' (see below) OUT X'6D' instructions are executed to store
byte's number into the byte being set. An IN X'6C' is then
executed to reset the EB mode adr reg and a X'FFFF' stored with
OUT X'6D'. X'FFFF' should be stored into bytes 2 and 3 of the
array, since an IN X'6C' was used to reset the adr reg.
Sixteen passes are made through this routine, the first pass
executes one OUT X'6D' instruction, the second pass execute.
two OUT X'6D' instructions, etc.
/'
"\,
;)
~
"j
",
"\
"j
1"""
"-.
)
,/
/r'~
'-/
'"I
",-"j!
'- "/
('"
"-.-./
"'--j
/
,-/
\,
-
,
/
,,-~
("I
\---./
r
"'\
'"
/
~"
("--
/
(
(/
(
(
(
(
(
(
(
(
(
(
(
(/
(
(
(
(
(
(
(
~
(
,/
(:
(
( (
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cant.
Routine
Error
Code
X93D
OXOl
Function Tested
Error Description
SI rspected Card
PrOgl.'1
Location(s)
Mask
FEALD
Page
FETMM
Page
Comments
The IN X'SD' which was executed to verify that the first 2 bytes
of the array have been fetched, contained other than the X'OO01'
stored in the first 2 bytes.
E4H2
PL102
H·130
Reg X'14' contains the results of the IN X'SD'.
OX24
Following an OUT X'52' to reset the adr reg and an OUT X'SD'
to store X'FFFF', an IN X'6C' was executed to reset the adr reg
and an IN X'SD' to read the first 2 bytes of the array. The bytes
did not contain X'FFFF'.
E4H2
PL103
H·140
Reg X'14' contains the results of the IN X'5D'.
The byte located at the adr in reg X'12' plus
X'54' indicates the number of bytes stored
before the OUT X'52' reset was executed.
OXC4
After an OUT X'6C' instruction to reset the adr reg and an OUT
X'6D' instruction to store X'FFFF', an IN X'6C' was executed
to reset the adr reg and an IN X'6D' was executed to get the first
2 bytes of the array. They did not contain X'FFFF'.
E4H2
PL103
H·140
Reg X'14' contains the results of the IN X'5D'.
The byte located at the adr in reg X'12' plus
X'64' indicates the number of bytes stored
before the OUT X'SC' reset was executed.
X93E
EB mode adr reset and print with IN X'SC'. This routine veri·
fies that an IN X'SC' instruction primes the EB mode local store
array in·buffer with the first 2 bytes of the array. After disabling
and resetting the CA4, the EB mode local store array is cleared
and X'0001' is stored in bytes 0 and 1 of the array. An IN X'SC'
is executed followed by an IN X'SD' to verify that the first 2
bytes have been fetched.
EB mode adr reg reset with OUT X'S2' and OUT X'SC'. This
routine verifies that the EB mode adr reg is reset with an OUT
X'S2' or an OUT X'SC'. After disabling and resetting the CA4,
the EB mode local store array is cleared and 'n' (see below),
X'SD's executed, storing each bytes number into the byte being
set. An OUT X'62' or X'SC' is then executed to reset the EB
mode adr reg and a X'FFFF' is stored with an OUT X'5D' into
the first 2 bytes of the array.
Sixteen passes are made through this routine using an OUT
X'S2' to reset the adr reg and then 1S more using an OUT X'SC'.
For each output instruction, the first pass does one OUT X'SD'
instruction; the second pass does 2 OUT X'SD' instructions, etc.
X940
Data/status irpts. After disabling and resetting the CA4, a test
is made to ensure that each of the data/status L3 irpts can be
forced. A separate pass through the routine is made for each
type data/status transfer sequence. At any of the error stops
within this routine, reg X'11' indicates the type of data/status
irpt being tested. They are tested in the following order:
Bit
Bit
Bit
Bit
Bit
0.4:
0.3:
0.2:
0.1:
0.0:
NSC Final Status Indicator
NSC Channel End Transfer
ESC Final Status Transfer
Inbound Data Transfer
Outbound Data Transfer (If byte 1, bit 5 is on, a
Priority Outbound Data Transfer)
Z370IJBA CA4 1FT SYMPTOM INDEX
1FT CA4 378
3705-80 TYPE 4 CA I FT SYMPTOM INDEX· Cont.
Z3105JBA CA41FTSYMPTOM IND.EX
RouIIIiM
Error
Code
X940
OX01
After an OUT X'62' has been issued to set the tested type of
transfer sequence, an OUT X'6]' with data of all zeros is issued
to force the selected type of irpt. After unmasking L3 irpts, no
irpt occurred. (The OUT X'6], should have caused the diagnostic
hardware to force the selected type irpt.)
OX02
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
E4G2
PM103
H-230
Reg X'11' indicates the type of transfer
sequence being tested.
Following the forced L3 irpt, an IN X'62' indicated that the irpt
received was not the data/status L3 irpt expected.
E4L2
PE103
H-070
Reg X'14' contains the results of the IN X'62'.
Reg X'll' indicates the type of transfer
sequence being tested.
OX01
After issuing an OUT X'62' to set the tested type of transfer
sequence, an OUT X'6]' with data of all zeros is issued to force
the selected type of irpt. After unmasking L3 irpts, no irpt
occurred. (The OUT X'67' should have caused the diagnostic
hardware to force selected type irpt.)
E4G2
PM103
H-230
Reg X'll' indicates the types oftransfer
sequence being tested. Pretest Error. Rerun
routine X940.
OX02
Following the forced L3 irpt, an IN X'62' indicated that the L3
irpt received was not the data/status L3 irpt expected.
E4L2
PE103
H-070
Reg X'14' contains the results of the IN X'62'.
Reg X'11' indicates the type of transfer
sequence being tested. Pretest Error. Rerun
routine X940.
Error Description
Function Tested
(cont.)
X942
Program
Mask
Comments
Data/status irpts reset. After forcing each of the data/status L3
irpts, a check is made to ensure that each can be reset with an
OUT X'62'. A separate pass through the routine is made for each
type data/status transfer sequence. At any of the error stops
in this routine, reg X'll' indicates the type of data/status irpt
being tested. They are tested in the following order:
Bit 0.4:
Bit 0.3:
Bit 0.2:
Bit 0.1:
Bit 0.0:
NSC final status transfer
NSC channel end transfer
ESC final status transfer
Inbound data transfer
Outbound data transfer (If byte 1, bit 5 is on, a priority
outbound data transfer)
I
,
'\
/1
Ii=T,CA4 379
OX03
After forcing the tested type, data/status L3 irpt, an OUT X'62'
with byte 1, bit 6 on was issued to reset the data/status L3 irpt
request. L3 irpts were then unmasked and a check made to
ensure that no L3 irpt condition was still pending. A L3 irpt
did occur.
E4G2
PM103
H-230
Reg X'14' contains the results of the IN X'77'
issued when the irpt occurred. Continuing
from this error stop will cause an IN X'62' to
be issued and a check made to ensure none of
the transfer sequence bits are still set. (See
error code OX04.) If error OX04 does not
occur after continuing from this stop, none of
those bits were set. Reg X'll' indicates the
type of transfer sequence being tested.
OX04
After ensuring that no L3 irpt occurs after resetting.the tested
type transfer sequence, another check is made to ensure that
none of the sequence bits remain on. An IN X'62' indicated that
at least 1 bit remained on.
E4L2
PE103
H-070
Reg X'14' contains the results of the IN X'62'.
Reg X'11' indicates the type of transfer
sequenc;:e being tested,.
r
I
."
\,- -//
i"~
,--j
(
(-"
,~
\...
;/
"--
.J
0 ,
'.
./
/',\
\,,-_/
.~
r
/~
"-.
'-..•. /
\...
(~,
,/
"
-~
./
'..
/
"---_../
"'-j
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Error
Routine
Code
Error Description
Function Tested
Sc n;pected Card
Progr.~~
Location(s)
Mask
FEALD
Page
FETMM
Page
Comments
Force initial select irpt. This test ensures that an initial select L3
irpt can be forced with an OUT X'67'.
X944
OX01
After issuing an OUT X'67' with bit 0.0 on, another OUT X'67'
with no bits on was issued to force an initial select irpt. No L3
irpt occurred.
E4G2
PM103
H-120
OX02
Incorrect initial select irpt from the adapter under test was
received.
E4G2
E4L2
PM103
PE102
H-120
Reg X'14' contains the results of the IN-X'77'
issued when the irpt was received. RegX'15'
indicates the bits in error:
Bit 1.0: CA-4 L3 irpt bit not set
Bit 1.3: Selected type 4 channel adapter datal
status L3 set in error
Bit 1.4: Selected type 4 channel adapter L3
initial select not set
)(945
Reset forced initial select irpt. An initial select L3 irpt is
forced and a check was made to ensure that it can be reset.
OX01
After issuing an OUT X'67' with bit 0.0 on, another OUT X'67'
with no bits on is issued to force an initial select irpt. The irpt
did not occur.
E4G2
PM103
H-120
Pretest Error. Rerun Routine X944.
OX02
After the L3 irpt is received, a check is made to ensure that it
was an initial select irpt from the adapter under test.
E4G2
E4L2
PM103
PE102
H-120
Reg X'14' contains the results of the IN X'77'
issued when the irpt was received. Reg X'15'
indicates the bits in error:
Bit 1.0: CA-4 L3 irpt bit not set
Bit 1.3: Selected type 4 channel adapter datal
status L3 in error
Bit 1.4: Selected type 4 channel adapter L3
initial select not set.
Pretest Error. Rerun routine X944.
OX03
After having forced an initial select L3 irpt, an OUT X'62' with
bit 0.5 on is issued to reset the initial select irpt. After unmasking L3 irpts, another irpt occurred.
E4G2
E4L2
PM103
PE102
H-060
H-060
Reg X'14' contains the results of an IN X'77'
issued when the irpt occurred:
Bit 1.3: A datalstatus L3 irpt was present.
Bit 1.4: An initial select irpt was still present.
I
Z3705JBA CA4 1FT SYMPTOM INDEX
1FT CA4 380
I
I
,
I
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
X946
Z3705JBA CA4 I FT SYMPTOM INDEX
Suspected Card
Function Tested
Error Description
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
1FT CA4 381
Comments
Dual type 4 CA im med iate select CA4-1. This test ensures that
with the second CA4 selected an OUT X'67' can be issued to the
first CA4 without changing the CA4 selection. Programrequested irpt is used as the test vehicle. This routine will run only
on machines with a second CA4 defined in the CDS.
The overall operation of this routine is:
1. After selecting and disabl ing the first CA-4, ensures that
program-requested irpt is off.
2. After selecting and disabling the second CA-4, ensures that
program-requested irpt is off.
3. Causes a program-requested irpt on the first CA-4 and leaves the
second one selected.
4. Allows irpts and ensures that an irpt occurs but that IN X'77'
indicates the second CA4 is still selected and program-requested
irpt has not been set.
5. Selects the first CA4 and verifies that program-requested irpt
has been set.
OXOl
Following an OUT X'67' with bit 0.5 on to select CA4-1, an
IN X'67' indicated that CA4-1 was not selected.
E4F2
PA108
H-120
Reg X'14' contains the results of the IN X'67'.
Pretest error. Rerun routine 1901.
After selecting the first CA4, the first CA4 was disabled and a
check made to ensure that no program-requested irpt was
pending. However, an irpt was pending.
E4T2
PG102
H-070
Reg X'14' contains the results of the IN X'62'
issued after the reset. Pretest error. Rerun
routine 1903.
OX03
Following an OUT X'67' with bits 0.5 and 0.7 on to select CA4-2,
an IN X'67' indicated that CA-2 was not selected.
E4F2
PA108
H-120
Reg X'14' contains the results of the IN X'67'.
Pretest error. Rerun routine X901.
OX04
After having selected the second CA4, it was disabled and a check
made to ensure that no programmed-requested irpt was pending.
An irpt was pending.
E4T2
PG102
H-070
Reg X'14' contains the results of the IN X'62'.
issued after the reset. Pretest error. Rerun
routine X903.
OX02
/
"
(
(
(
(
(
(
(
(
(
(
«
(
(
(
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX· Cont.
Error
R.OlStine
X946
(cont.)
Code
OX05
Function Tested
Error Description
With CA4-2 selected, an OUT X'67' with bits 0.3 and 1.1 on was
issued to set program-requested irpt on the first CA4 without
changing CA4 selection. L3 irpts were unmasked and a check
made to ensure that a L3 irpt did occur but that CA4-2 was still
selected.
Suspected Card
Location(s)
E4G2
Program
Mask
FEALD
Page
FETMM
Page
PM102
H,230
Comments
If bit 0.0 of reg X'15' is on, no L3 irpt occurred.
If bit 0.0 is off, a L3 irpt occurred and reg
X'14' contains the results of an IN x'n' issued
when the irpt occurred. Reg X'15' contains the
bits in error:
Bit 1.0: Although a L3 irpt occurred, IN X'77'
did not indicate a CA4 L3 irpt.
Bit 1.3: A data/status L3irpt is indicated.
With CA4-2 still selected and the irpt
condition set on CA4-1, no data/status
irpt should be indicated.
Bit 1.4: An initial select irpt is indicated.
Bit 1.6: CA4-2 is no longer selected.
OX06
While CA4-2 is still selected, a check is made to ensure that an
IN X'62' does not indicate a program-requested irpt. (The
program-requested irpt should have been set on CA4-1.)
E4G2
PM102
H-230
Reg X'14' contains the results of the IN X'62'.
OX07
Select CA4-1. An OUT X'67' with bit 0.5 on is issued to select
CA4-1 again. An IN X'67' that followed indicated CA4-1 had
not been selected.
E4G2
PM102
H-230
Reg X'14' contains the results of the IN X'67'.
Though not a pretest error, this function has
previously been tested. Try rerunning routine
1901.
E4G2
PM102
H-230
After reselecting CA4-1, irpts are again unmasked
and a check made to ensure that a data/status
L3 irpt from CA4-1 now occurs. (The programrequested irpt previously set has not been reset
and should still be pending.)
OX08
If bit 0.0 or reg X'15 is on, no L3 irpt occurred.
If bit 0.0 is off, an irpt did occur and reg X'14'
contains the results of the IN x'n' issued following the irpt. Reg X'15' contains the error bits:
Bit 0.0: No L3 irpt occurred. (Ignore remaining error bits.)
Bit 1.0: IN x'n' did not indicate a CA4 L3 irpt.
Bit 1.3: A data/status irpt is not indicated.
Bit 1.4: An initial select irpt is indicated.
Bit 1.6: CA4-2 is still selected.
OX09
Following the data/status irpt from CA4-1, an IN X'62' did not
indicate a program-requested irpt.
E4T2
PG102
H-070
Reg X'14' contains the results of the IN X'62'.
Z3705JBA CA4 1FT SYMPTOM INDEX
1FT CA4382
(
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Z3705JBA CA4 1FT SYMPTOM INDEX
Error
Routine
Code
X949
Func:ta-a Tested
Suspected Card
Location(s)
Error Descript.ion
Program
Mask
FEALD
Page
FETMM
Page
1FT CA4 383
Comments
Dual CA4 immediate select. This test ensures that when the first
CA4 is selected, an OUT X'67' can be issued to the second CA4
without changing the CA4 selection. Program-requested irpt is
used as the test vehicle. This routine is run only on machines
with multiple CA4s and only if the second CA4 is d~fined in the
CDS.
The overall operation of this routine is:
1. After selecting and disabling the second CA4, it ensures that
program-requested irpt is off.
2. After selecting and disabling the first CA4, it ensures that
program"requested irpt is off.
3. It causes a program-requested irpt on the second CA4, leaving
the first CA4 selected.
4. It allows irpts and ensures an irpt occurs but that IN X'77'
indicates the first CA4 is still selected and program-requested
irpt has not been set.
5. It selects the secondCA4 and verifies that program-requested
irpt has been set.
OX01
Following an OUT X'67' with bits 0.5 and 0.7 on to select CA4-2,
an IN X'67' indicated that CA4-2 was not selected.
E4F2
PA108
H-120
Reg X'14' contains the results of the IN X'67'.
Pretest error. Return routine X901.
OX02
After selecting the second CA4, the second CA4 is disabled and a
check made to ensure that program-requested irpt is pending. An
irpt was pending.
E4T2
PG102
H-070
Reg X'14' contains the results of the IN X'62'
issued after the disable. Pretest error. Rerun
routine X903.
OX03
Following an OUT X'67' with bit 0.5 on to select CA4-1 an IN
X'67' indicated that CA4-1 was not selected.
E4F2
PA108
H-120
Reg X'14' contains the results of the IN X'67'.
Pretest error. Rerun routine X901.
OX04
After having selected the first CA4, the CA4 was disabled and a
check made to ensure that no programmed requested irpt was
pending. However, an irpt was pending.
E4T2
PG102
H-070
i
Reg C'14' contains the results of the IN X'62'
issued after the reset. Pretest error. Rerun
routine X903.
,
...
".
(""
"
./
f"
'-."./
/'
''''\
(
'-.j
"
./
'"'.
' .. ./
/'
,
('
"",
./
',-- . /
,/"'.
f
j
./
"
./
,r"",
,/'
,_/
\,,~ .)
I
,--,,~
r~
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
3705-80 TYPE 4 CA I FT SYMPTOM INDEX - Cont.
Error
Routine
X949
(cont.)
Code
OX05
Function Tested
Error Description
With CA4-1 selected, an OUT X'67' with bits 0.3, 0.7 and 1.1 on
was issued to set program-requested irpt on the second CA4 without changing the CA4 selection. L3 irpts were unmasked and a
check made to ensure that a L3 irpt did occur but that CA4-1 was
still selected.
Suspected Card
Location(s)
E4G2
Program
Mask
FEALD
Page
PM102
FETMM
Page
H-230
Comments
If bit 0.0 of reg X'15' is on, no L3 irpt occurred.
If bit 0.0 is off, a L3 irpt occurred and reg X'14'
contains the results of an IN X'77' issued when
the irpt occurred. Reg X'15' contains the bits
in error:
Bit 0.0: No L3 irpt occurred. (Ignore remaining error bits.)
Bit 1.0: Although a L3 irpt occurred, IN X'77'
did not indicate a CA4 L3 irpt.
Bit 1.3: A data/status L3 irpt is indicated.
(With CA4-1 sti II selected and the irpt
condition set on CA4-2, no data/status
irpt should be indicated.)
Bit 1.4: An initial select irpt is indicated.
Bit 1.6: CA4-1 is no longerselected.
OX06
While CA4-1 is still selected, a check is made to ensure that an IN
X'62' does not indicate a program-requested irpt. (The programrequested irpt should have been set on CA4-2.)
E4G2
PM102
H-230
Reg X'14' contains the results of the IN X'62'.
OX07
Select CA4-2. An OUT X'67' with bits 0.5 and 0.7 on is issued to
select CA4-2 again. An IN X'67' that followed indicated CA4-2
had not been selected.
E4G2
PM102
H-230
Reg X'14'contains the results of the IN X'67'.
Though not a pretest error, this function has
previously been tested. Try rerunning routine
X901.
After reselecting CA4-2, irpts are unmasked and a check made to
ensure that a data/status L3 irpt from CA4-2 now occurs. (The
program-requested irpt previously set has not been reset and
should still be pending.)
E4G2
PM102
H-230
If the irpt bit 0.0 of reg X'15' is on, no L3 irpt
occurred. If bit 0.0 is off, an irpt did occur and
reg X'14' contains the results of the IN X'77'
issued following the irpt. Reg X'15' contains
the error bits:
OX08
Bit 0.0: No L3 irpt occurred. (Ignore remaining error bits.)
Bit 1.0: IN X'77' did not indicate a CA4 L3.
Bit 1.3: A data/status irpt is not indicated.
Bit 1.4: An initial select irpt is indicated.
Bit 1.6: CA4-1 is still selected.
OX09
Following the data/status irpt from CA4-2, an IN X'62' did not
indicate a program-requested irpt.
E4T2
PG102
H-070
Reg X'14' contains the results of the IN X'62'.
Z3705JBA CA41FT SYMPTOM INDEX
1FT CA4 384
(
3705·80 TYPE 4 CA 1FT SYMPTOM INDEX· Cont.
Error
Code
Routine
X94C
and
X94E
Z3706JBA CA4 I FT SYMPTOM I NOE X
Suspected Ca,rd
Function Tested
Error Description
Program
Mask
Location(s)
FEALD
Page
FETMM
Page
Comments
Dual CA4 priority selection test 1 and test 2.
These routines verify that the automatic priority selection circuity selects the CA4 with the highest pending priority irpt. The routines make multiple passes; each pass forces one of nine possible irpt
conditions (shown following) for a CA4 until all possible combinations of irpt conditions and CA4 sequence have been tested.
Note that the only difference between the routines is the sequence in which the CA4s are selected. The tests performed and the resulting error codes, if any, are identical.
If interrupts of the same priority are forced, the routine ensures that the nonselected CA4 is selected when the automatic selection takes place.
These routines function as follows:
Set up both CA4s for the first priority sequence (priority outbound) shown following.
1. Select and disable CA4-1.
2. Set a test irpt condition.
3. Select and disable CA4-2.
4. Set a test irpt condition.
5. Issue an OUT X'67' to allow auto CA4 selection.
6. Allow irpts and verify that an irpt occurs and that CA4 selection has occurred.
7. Determine which CA4 interrupted and verify that the type of irpt received was the type of irpt forced.
8. Reset the irpt condition.
9. Repeat steps 5 thru 8 for the second irpt.
10. If difference priority irpts were forced, verify that the CA4 with the highest pending-priority irpt, interrupts prior to the other CA4.
11. If equal priority irpts are forced, verify that the next logical CA4 interrupts when expected.
12. Advance CA4 sequence <;Ind return to step 1.
On the first pass, the priority sequence is tested on both CA4s defined in the CDS. After each pass the first CA4 is advanced to the next sequence. When the first CA4 has been advanced and been
tested on the last sequence, it is reset to the first sequence and the second CA4 is advanced. In this manner, both CA4s are advanced through the nine sequences. On each pass, EOxx is displayed
in DISPLAY 8; where xx is the pass count reset at X'FF'. If the panel request is 0900, this routine is run one time for each CA4 defined in the CDS.
~
'-.
/
/.:'
, '\
r'~
;""~
\
'- /
'... / '
"'-...../
-'\
"
/
1""'-,
,' .. /
I
~"
"'--_/
./
' ....
/
\,
/
'... . ./
..~
.. ,~
,"
"'--../
'-_/
----/
.,
,c
'''\
'-.
./
r-"'I
j
'...
._-/
,
(
./
./
"
''.. ./
;,--,
1FT eA4 386
-
~~--.
(/ (
L' (/ (j (
(,
(
(.
(,
(,
(
---
(
- ---\
~-------
(~"
(
(-
f~
(
f
(.
--~----
(- (:
(
(
(
(-\
c--:' ('"
_/
(:
(-~
(
(
(',
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont .
. Error
Routl",
X94C
and
X94E
(cont.)
Cod.
Suspected Card
Location(l)
Error Ollcription
Function Tilted
Program
Mask
FEALD
Page
FETMM
Page
Comments
Irpt Priority Table
Type of
Irpt
Sequence
Priority
Byte 0
Priority outbound sequence
Outbound data transfer sequence
Initial selection sequence
Inbound data sequence
ESC status transfer sequence
NSC channel end status transfer sequence
NSC final status transfer sequence
Program requested irpt
Suppress out monitor irpt
X'05'
X'04'
X'03'
X'02'
X'01'
X'01'
X'01'
X'01'
X'01'
Byte 1
Output
Data
Bytes 2-3
Expected
Input Data
Bytes 4-5
X'00'
X'OO'
X'EO'
X'OO'
X'OO'
X'OO'
X'OO'
X'80'
X'90'
X'8004'
X'8000'
X'8000'
X'4000'
X'2000'
X'1000'
X'0800'
X'0040'
X'0080'
X'8000'
X'8000'
X'OOOO'
X'4000'
X'2000'
X'1000'
X'0800'
X'0400'
X'0200'
Flags
Flag Byte Format
Bit
Content
Definition
0
0
1
1
0
OUT X'62' used to set condition
OUT X'67' used to set condition
Check reg X'62'
Do not check reg X'62'
Data/Status irpt expected
Initial selection irpt expected
Last table entry
Not used.
2
3
4-7
1
0
1
1
.
Z370&JBA CA41FT SYMPTOM I~DEX
1FT CA4 386
C
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Z37O&JBACA4IFTSYMPTOMINDEX
Error
Routine
Code
X94C
Suspected Card
Location(s)
Error Description
Function Tested
Program
Mask
FEALD
Page
FETMM
Page
IFTCA4387
Comments
For routines X94C and X94E, reg X'12' contains the address of a save area in storage. The halfword at X'54' plus this address, is the address of a field describing the type of irpt forced on the
first CA4. The halfword at X'56' plus this address, is the address of a field describing the type of irpt forced on the second CA4. The format is:
and
X94E
(cont.)
Byte
0
1
2
Interrupt Priority
Flag
Data used with the OUT instruction
to set the interrupt.
.. -
5 = highest priority
1 = lowest priority
I
I
I
I
I
I
I
I
I
I
I
I
3
bits 1·7
not used
I ' ...
-- BitO
0= OUT X'62' was used to set irpt.
1 = OUT X'67' was used to set irpt.
f"- .....
,
"
.
0
.~
;
\-... )/
()
'\
I-~
".J
\---./
,r.-'
",j
,
"
!'-~
1
/
"
j
(~
V
~)
/~
~.
"--/
'-.. . /
r
r~
I
\-...
/
'\-...j
,r
'"
"
./
'--./
.~)
('\
0
r-~
./
(
(
(
(
(
«
(
(
c
(
(
(
(
(
c
(
(
(
(
(
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Routine
X94C
and
X94E
(cont.)
Error
Code
Function Tested
Error Description
Suspected Card
Location(s)
PrQgnlm
Mask
FEALD
FETMM
Page
Page
Comments
OXOl
Following an OUT X'67' with bit 0.5 on to select CA4-1, an IN
X'67' ind icated that CA4-1 was not selected.
E4F2
PA108
H-120
Reg X'14' contains the results of the IN X'67'.
Pretest error. Rerun routine X901.
OX02
Following an OUT X'67' with bits 0.5 and 0.7 on to select CA4-2,
an IN X'67' indicates that CA4-2 was not selected.
E4F2
PA108
H-120
Reg X'14' contains the results of the IN X'67'.
Pretest error. Rerun routine X901.
OX05
OX09
After setting a pending irpt condition on both CA4s, an OUT X'67'
of all zeros was issued to cause auto-CA selection to occur. After
unmasking level 3 irpts, no irpt occurred. (Refer to the routine
description to determine what type irpt was forced on each CA.)
E4L2
E4G2
PE102
PM103
H-070
H-120
OX05 is for the first irpt expected. OX09 is for
the second irpt expected.
OX06
OX10
Although an irpt occurred (see error code OX05), neither bit 1.3
nor 1.4 was on in IN X'77'. This indicates that auto-selection has
not taken place. (Refer to the routine description to determine
the type irpt forced on each adapter.)
E4G2
PM103
H-230
OX06 is for the first irpt expected. OX10 is for
the second irpt expected.
OX07
OXll
OX15
After verifying that the irpt received was the one expected, an
OUT X'62' with bits 0.5 and 0.6 is executed to reset the irpt
condition. An IN X'62' then indicated that a data/status transfer sequence was still set.
E4L2
PE108
H-070
Reg X'14' contains the results of the IN X'62'.
Bits 0.4 through 0.7 should not have been on.
The halfword located at X'5C' plus the adr in
reg X'12' contains the results of the IN X'77'
executed when the irpt was received. This can
be used to determine which adapter is selected.
OX08
OX12
OX16
After verifying that the OUT X'62' reset any data/status transfer
sequence bits (see error codes OX07, OX11, or OX15), an IN X'77'
is executed to verify that the received irpt condition has been
reset and that a type 4 channel adapter L3 irpt is still pending
from the other CA.
E4G2
PM103
H-230
Reg X'14' contains the results of the IN X'77'.
Either bit 1.3 or 1.4 was still on, indicating the
present irpt condition has not been reset, or bit
1.0 is no longer on indicating no other type 4
channel adapter L3 irpt is pending. Refer to
the routine description to determine the type
irpt forced on each CA. Reg X'14' contains
the results of the IN X '77'.
OX09
See error code OX05.
OX10
See error code OX06.
OXll
See error code OX07.
OX12
See error code OX08.
OX15
See error code OX07.
OX16
See error code OX08.
OX19
OX2l
The irpt occurring after auto-channel adapter selection was not
the type of irpt expected.
E4L2
E4G2
PE103
PM103
H-070
H-120
RegX'14' contains the results of the IN X'77'
executed at the time of the irpt. Reg X'15'
indicates the bits in error in reg X'14'.
Z3705JBA CA4 1FT SYMPTOM INOEX
1FT CA4 388
c
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Z3705JBA CA4 1FT SYMPTOM INDEX
SUlpected Card
Locltlon(a)
Error
Routln.
Cod.
Error Delcription
Function Telted
OX20
X94C
and
.OX22
OX24
X94E
(cont.) OX26
Program
Milk
FEALD
Plgt
FETMM
PlgI
1FT CA4 389
Comm.nta
If the irpt expected in codes OX19 and OX21 was a data/status
irpt, an IN X'62' verifies that the irpt was the expected type
data/status irpt.
E4L2
PE103
H-070
Reg X'14' contains the results of the IN X'62'.
Reg X'15' indicates the bits in error in reg
X'14'. The halfword located at X'5C' plus the
adr in reg X'12' contains the results of the IN
X'77' executed when the irpt occurred. This
can be used to determine the selected adapter.
OX01
Error indication on input of cycle-steal reg X'SE'.
E4E2
PP103
H-180
Bits expected to be set are 1.4, 1.5, 1.S, and
1.7. Results of input should be i., reg X'14'.
Bits in error should be in reg X'15'.
OX02
Error indication upon input of cycle-steal reg X'6F'.
E402
PP101
H-180
Results of the input are in Reg X'14'. All bits
are expected to be set. Bits in error should be
in reg X'15'.
X950
Cycle-steal reg X'6F' test. This routine ensures that bits 1.4, 1.5,
1.6, and 1.7 of reg X'SE' and all bits of ~eg X'SF' can be set to
ones. The value of X'OOO'F' is output to reg X'SE'. Reg X'SE' is
read to verify that it contains X'OOOF'.
The value of X'FFFF' is output to reg X'SF'. Reg X'SF' is read
to verify that it contains X'FFFF'.
X952
Cycle-steal adr and outbound data transfer test. This routine
tests for the proper functioning of the cycle-steal adr regs,
X'SE' and X'SF' and for the transfer of data from storage to
the data buffer reg X'SO'.
On successive passes, cycle-steal operation is executed in
diagnostic mode. Starting with a 2-byte cycle steal, each
cycle steal is incremented by 2 until 25S bytes are transferred
in the last pass.
On each pass, the cycle-steal operation is requested with an
output to reg X'SC'; the data out adr is output to reg X'SE'
and reg X'SF'. Outbound transfer is requested with OUT
X'S2' and the cycle-steal is initiated by outputs to reg X'67'.
Output X'S7' is executed on each pass, once for each byte in the
count in reg X'SC'.
The resulting cycle-steal adr in registers X'SE' and X'SF', when
in cycle-steal mode, is 2 bytes higher than when in normal cyclesteal mode. With this in mind, the cycle steal adr is checked on
each pass to be 2 bytes higher than normal, and the data in
register SO is compared with data that is 2 bytes beyond that
data normally expected:
:"-
../
"-
"\
'- ../
,r'~
"-
/
,/
.~.
/'
'-, ,J
~
.
,/
(
('-
"-
./
'-.,./
r"
..
..
/
'",
/'
\~
/
., ..../
.
~
'-.,./
/"'\
;"
"\
',,-,
'-
/
./
~
(
(
(
(
(
(
(
(
f'
(
(
(
(
(
(
(
(
(
(
(
3705-80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Routine
X952
(cont.)
Error
Code
Error Description
Function Tested
Suspected eerd
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
OX01
Cycle-steal adr error.
E4E2
E4D2
PP103
PP101
H-180
H-180
Value obtained from reg X'6F' is in reg X'14'.
Adr expected is in reg X'13'. Bits in error in
reg X'15'.
OX02
Cycle-steal data error.
E4J2
PK102
H-160
The value obtained from reg X'6D' is in
reg X'14'. The value expected from reg X'6D'
is in reg X'13'. The bits in error are in
reg X'15'.
OX01
Cycle-steal adr error.
E4E2
E402
PP103
PP101
H-180
H-180
Value obtained from reg X'SF' is in reg X'14'.
Adr expected is in reg X'13'. Bits in error are
in reg X'15'.
OX02
Cycle-steal data error.
E4J2
PK102
H-180
Value obtained from storage is in reg X'14'.
Value expected in storage is in reg X'13'. The
bits in error are in reg X'15'.
X954
Cycle-steal adr and inbound data transfer test. This routine
tests for the proper functioning of the cycle-steal adr reg X'6E'
and X'6F' and for the transfer of data from the buffer reg X'6D'
to storage.
On successive passes, cycle-steal operations are executed. The
byte count of each cycle steal is incremented by 2, from 2 to
256 bytes.
On each pass, the cycle steal operation is requested with an
output to reg X'SC'; the data in adr is output to reg X'SF' and
reg X'6E'. Inbound transfer is requested with IN X'62' and the
cycle steal is initiated by outputs to reg X'S7'.
Reg output X'S7' is executed the number of times equal to the
cycle steal count.
After each operation, the cycle-steal adr is verified to have
incremented by the same value of the cycle-steal count, and the
data in storage is verified to be that from the buffer reg X'SO'.
X956
Cycle-steal outbound odd-even count and adr test. This test
verifies proper performance of the cycle-steal operation,
whether count or storage adr is odd or even.
This test makes four passes. The first is an outbound transfer
of 3 bytes from an even adr.
On the second pass, the adr is made odd.
On the third pass, the count is made even, and on the fourth pass
the adr is made even.
Z3705JBA CA4 1FT SYMPTOM INDEX
1FT CA4 390
(
3705·80 TYPE 4 CA 1FT SYMPTOM INDEX· Cont.
Error
Code
Routine
X956
(cont.)
)
Z3705JBA CA4 1FT SYMPTOM INDEX
Error Description
Function Tested
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
1FT CA4 391
Comments
On each pass, cycle-steal registers X'6E'and X'6F' are verified to
be incremented as expected. The anticipated data from storage is
verified to be in reg X'6D'.
OX01
The cycle-steal adr from reg X'6F' in error on a 3-byte transfer.
E4D2
PP104
H-170
Reg X'14' contains the data from reg X'6F'.
Reg X'15' contains the bits of reg X'14' that
are in error.
OX02
The cycle-steal adr from reg X'6F' in error on a 4-byte transfer.
E4D2
PP104
H·170
Reg X'14' contains the data from reg X'6F'.
Reg X'15' contains the bits of register X'14'
that are in error.
OX03
Data error on outbound 3-byte cycle-steal transfer.
E4D2
PP104
H-170
Data expected is in reg X'14'. Bits in error are
in reg X'15'.
OX04
Data error on outbound 4-byte cycle-steal transfer.
E4D2
PP104
H-170
Data expected is in reg X'14'. Bits in error are
in reg X'15'.
CUC value is not correct after cycle-steal operation.
1AB4-T2
CNOO1
X957
Cycle utilization counter (CUC) test. This test verifies proper
incrementing of the CUC from cycle-steal cycles by the adapter
under test. CUC value represents a combination of cycle-steal
and instruction cycles. CUC operation of the CUC for 11, 12
and 13 cycles has been verified in the CUC diagnostic routines.
OX01
.
(
(~
,,--)
Reg X'14' = actual CUC value
Reg X'15' = bits in error
Reg X'16' = expected CUC value
(
(
(
(
(
(
(
('
(
(
(
(
(
(
(
(
(
(
3705·80 TYPE 4 CA 1FT SYMPTOM INDEX - Cont.
Error
Routan.
X958,
X959,
X95A,
X95B,
and
X95C
Code
F001
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
Extended buffer mode (EBM) local store data interference tests.
(Manual
intervention
stop,
The interference test routines:
see
• Write various data patterns into the local storage buffer.
step 2
on this
page.)
The interference test routines perform additional testing on the EBM local storage buffer. You should run all the other CA4 test routines before running the interference test routines.
•
Read the local storage buffer.
• Compare the read data with the expected data.
The information on this page is common to routines X958 through X95C. The information on the following page describes each routine specifically.
General Procedures for Running the EBM Interference Test Routines
When running the interference test routines, use the following procedure.
1. When requesting a routine, set the 'include manual intervention routine' CE sense switch. (Set X'10' in the STORAGE ADDRESS/REGISTER DATA switches D and E to cause the
routine to cycle). (For detailed information on how to run an 1FT, see "How to Request an 1FT" in the 1FT section.)
2. When the manual intervention stop occurs (DISPLAY B indicates X'F001 'I, adjust the -4 Vdc voltage to -3.6 volts. (Refer to page D·580 in Volume 3 of IBM 3705-80 Communications Controller
Theory Maintenance SY27·0209.)
If an error stop occurs before X'F001' is displayed, replace the CA4 card at E4J2 and rerun the interference test routines.
Note: Do not select the 'loop on first error' CE sense switch setting. The interference test routines are not designed to loop on an error.
3. Set STORAGE ADDRESS/REGISTER DATA switches D and E to X'CC'.
4. Set DISPLAY/FUNCTION SELECT switch to FUNCTION 5.
5. Press the START pushbutton. The routine will start running.
6. After the routine has run several times (see approximate run times for each routine on the following page), set the STORAGE ADDRESS/REGISTER DATA switches D and E to a value other than
X'CC'. (X'CC' causes the routine to bypass manual intervention stops. The routine will not stop until the current run is completed.)
7. Another X'F001' manual intervention stop will occur. Adjust the -4 Vdc voltage to -4.4 volts (see step 2).
8. Set STORAGE ADDRESS/REGISTER DATA switches D and E to X'CC'.
9. Set DISPLAY/FUNCTION SELECT switch to FUNCTION 5.
10. Press the START pushbutton. The routine will start running.
11. After the routine has run several times (see approximate run times for each routine on the following page) set the STORAGE ADDRESS/REGISTER DATA switches D and E to a value other than
X'CC'. (X'CC' causes the routine to bypass manual intervention stops. The routine will not stop until the current run is completed.)
12. Adjust the -4 Vdc to -4.0 (see step 2).
13. Repeat these steps for the next interference test routine or return the 3705-80 to the customer.
To end the current routine, set the DISPLAY/FUNCTION SELECT switch to FUNCTION 6, and set STORAGE ADDRESS/REGISTER DATA switches B·E to X'FFFF'. If the
machine is running, press the INTERRUPT push button. If the machine is stopped, press the START push button.
Z3705JBA CA4 1FT SYMPTOM INDEX
1FT CA4 392
3706·80 TYPE 4 CA 1FT SYMPTOM INDEX· Cont.
Routln.
Error
Cod.
X968
OX68
Z370&JBA CA4 1FT SYMPTOM INDEX
SUlpected Card
Locltlon(s)
Error Ollcrlption
Function Tllttd
EBM local storage buffer interference test 1. Routine X968:
(1) Writes into 1 position ofthe EBM local storage buffer,
(2) reads the local storage buffer, and (3) compares the data
read to the expected data.
Program
Malk
FEALD
PlgI
FETMM
Pig.
1FT CA4 393,
Comm.ntl
Data read did not agree with expected data.
E4J2
PK102
H·130
through
H·160
Reg X'14' contains the read data (obtained
with IN X'6D' instruction). Reg X'15' indio
cates the bits in error. Reg X'16' contains the
expected data.
Data read did not agree with expected data.
E4J2
PK102
H·130
through
H·160
Reg X'14' contains the read data (obtained
with IN X'6D' instruction). Reg X ' 15' indio
cates the bits in error. Reg X'16' contains the
expected data.
Data read did not agree with expected data.
E4J2
PK102
H·130
through
H·160
Reg X'14' contains the read data (obtained
with IN X'6D' instruction). Reg X ' 15' indio
cates the bits in error. Reg X'16' contains the
expected data.
An unexpected L1 Irpt occurred.
U4J2
PK102
H·130
through
H·160
Data read did not agree with expected data.
U4J2
PK102
H·130
through
H·160
An unexpected L1 irpt occurred.
E4J2
PK102
H·130
through
H·160
Data read did not agree with expected data.
E4J2
PK102
H·130
through
H·160
Routine X958 runs approximately 1/2 second.
X9!59
OX69
EBM local storage buffer interference test 2. Routine 959:
(1) Writes into 15 positions ofthe IBM local storage buffer,
(2) reads the local storage buffer, and (3) compares the data
read to the expected data.
Routine X959 runs approximately 1.5 minutes.
X96A
OX6A
EBM local storage buffer interference test 3. Routine X95A:
Writes X'OOOO' through X'FFFC' into consecutive positions
of the EBM local storage buffer. Positions 1 of the local
storage buffer is written into and the remaining positions are
read and compared to the expected data. The position written
into is advanced on each pass of the routine.
Routine X96A runs approximately 6 minutes.
X96B
OX01
EBM locelstorage buffer Interference test 4 (Ping Pong test 1).
Routine X96B: Writes various data patterns Into varioul
pOlltlons of the EBM local ItO raga buffer.
Routine X96B runs approximately 1/2 second.
OX6B
X96C
OX01
EBM local storage buffer interference test 5 (Ping Pong test 2).
Routine X95C: Writes various data patterns into various
positions of the EBM local storage buffer.
Reg X'14' contains the read data (obtained
with IN X'6D' instruction). Reg X'16' indio
cates the bits in error. Reg X'16' contains the
expected data.
Routine X95C runs approximately 1/2 second.
OX6C
£
'-
)
..... ~
\."
Y
/
',-
,
/
~
'-..j}
("I
'-. ../
()
~
i.
'.....
)
;
r--)
"-.
"
,r',\
"'-
;J
~
'- ../
0
\ .... j
('I
~
\....../1
r
\,. . /
/
,tf"~,
'-. j
!~~
~
r~
i',\
'"J
\,../
./"~
;
...
/"
r'i
\
... /
t~
I",.,)
~)
Reg X'14' contains the read data (obtained
with IN X'6D' instruction). Reg X'15' indio
cates the bits in error. Reg X'16' contains the
expected data.
r"
\J
J
,
,
0
0
('
"
._./
.--~-~~---
(/ {
l
(
(/
(
~
~
C (
(
(,
f
(
(
(
f
(
(
(
3705-80 TYPE 4 CA 1FT COMMON ERROR STOPS
Error
Routlnl, Code
X9XX
Funotion Teat..
"
"
(
(
(
SUlplcted Card,
Looetlon(a)
Error Olacrlption
(
(
(
(
(
Progrlm
fEALO
fETMM
Milk
Page
Page
(',
f~
<,
-\'
J
C (
Commentl
1X01
Disable CA 1.
CA 1 was not disabled.
E4P2
PB103
H-120
Rerun routine X902.
1X02
Select CA4.
CA4 was not selected.
E4F2
PA108
H-120
Reg X'14' contains results of an IN X'67'.
Rerun routine X901.
1X03
Select CA4.
CA4 was not selected.
E4F2
PA108
H-120
Reg X'14' contains results of an IN
Rerun routine X901.
1XOA
Set regs to X '0000'.
Unable to set regs to X'OOOO'.
Rerun routines X904 through X925.
1XOB
Set regs to X'FFFF'.
Unable to set regs to X'FFFF'.
Rerun routines X904 through X925.
1X10
Set various bit patterns in regs.
Unable to set bit patterns in regs.
Rerun routines X904 through X925.
1X11
Set EB mode with OUT X'SC' instruction (Bit 0.0
1X21
1X30
Set all positions of EB local storage array to O.
=1)
(' i(
x'n'.
Unable to set EB mode.
E4H2
PL102
H-140
Reg X'14' contains results of an IN X'SC'.
Rerun routine X932.
Unable to set one or more positions to O.
E4J2
E4G2
PK102
PK101
H·1S0
H·1S0
Reg X'14' contains the results of IN X'SD'.
The error code indicates the failing halfword
(1X21 is first halfword). Rerun routine X93S.
2XOO
Received unexpected L1 irpt with no request bits on.
E4K2
PF107
H·110
2X01
Received unexpected L3 Irpt.
E4L2
PM103
H·230
2X02
Unable to reset L3 irpt.
E4L2
PE102
H·OSO
2X03
Received unexpected L3 irpt.
E4L2
PE103
H·070
,,'
2X04
Unable to reset L3 data/status irpt.
E4L2
2X05
Unexpected 'suppress out monitor' L3 irpt.
E4T2
PG102
H-070
2X06
Unable to reset 'suppress out monitor' L3 irpt.
E4T2
PG102
H-070
2X07
Unexpected 'program request' L3 irpt.
E4T2
PG102
H-070
E4T2
PG102
H·070
2X08
2X09
Unexpected L3 irpt from CA 1.
2XOA
Unknown L3 irpt occurred.
2X1X
Unexpected L1 irpt occurred.
Bit 1.4 in reg X77' was on.
Bit 1.3 in reg X'77' was on. Neither 'suppress
out monitor' nor 'program request irpt' were on
in reg X'77'. Reg X'S2' indicates the cause of
the irpt.
H-OSO
E4L2
E4T2
H-OSO
Bit 0.6 in reg X'77' is on.
No request bits were on in reg X'62'.
Neither IN X'77' nor IN X'7F' indicated the
source of the irpt.
E4K2
PF101
H·100
Bit 1.3, 'local store check' was on in reg X 'S7'.
Z3706JBA CA4 1FT SYMPTOM IN,DEX
1FT CA4 394
3705·80 TYPE.4 CA 1FT COMMON ERROR STOPS· Cont.
Routine
X9XX
(cont.)
Error
Code
Z3705JBA CA4 1FT SYMPTOM INDEX
SUlpected Card
Location(s)
Error Description
Function Tested
Program·
Mask
FEALD
Page
F.ETMM
Page
1FT CA4 395
Comments
2X2X
Unexpected L1 irpt occurred.
E4K2
PF101
H-100
Bit 1.2, 'CCU outbus check' was on in
reg X'67'.
2X4X
Unexpected L 1 irpt occurred.
E4K2
PF101
H-100
Bit 1.1 'i/o instruction accept check' was on in
reg X'67'.
2X8X
Unexpected L 1 irpt occurred.
E4K2
PF101
H-100
Bit 1.0 'bus-in check' was on in reg X'67'.
2XFF
Unable to reset L 1 irpt.
E4K2
E4H2
E4H2
E4H2
E4H2
PF101
PL105
PL101
PL101
PL101
H-100
H-140
H-140
H-140
H-140
Bit 0.4 Syn monitor control It.
Bit 0.5 DLE remember It.
Bit 0.6 ASCII monitor control It.
Bit 0.7 EBCDIC monitor control It.
')
~
\
)
)
'"
/
"'--"'.
:
"
"
(~
",-)
/'''''
.~
'"
j
I
'-
)
"'-- ./
)
(
-.,j
"'-j
('''''
,,
j
;i~~
~
.'~
"-./
c~
.~
/". "'A\
.",
~)J
0,
I
"'~.
I
-""
\
"-
/
"'-. j
r)
"'--./
r\
;,",,\
.".J'
J'
l/
(
(
(
(
(
(
(
(
c c c
(
(
(
{
(
(
(
(
3705-80 esa I FT SYMPTOM INDEX
Routine
X602
Error
Code
XXXX
. Function Tested
Error Delcrlptlon
Suspected Card
Locltlon(l)
Program
Malk
FEALD
Plge
FETMM
Plge
CDS (configuration data set) checking rtn. This rtn checks that certain necessary control data within the CDS is valid. You should refer to the CDS section in this manual for a complete CDS
definition. The CDS is loaded into storage starting at X'OFOO' when the DCM (diagnostic control module) is loaded. Within the CDS is a control block for the type 2 communication scanner.
This control block defines the scanner type, scanner RPOs, scanner features, oscillator types, LI B types, and line set types. Some of this data is validated in this rtn. If you get errors in this rtn
and the configuration data is correct, it could be that the version/level ofthe diagnostics that you are running does not support that feature. While this rtn is running, you may get some DISPLAY B error codes starting with 1. These are pretest errors, which cannot be bypassed except by aborting this rtn. These pretest errors are defined in "Common Error Stops" following this
CSB symptom index. See "Common Error Stops" for details on these pretest error codes if they occur. A summary of the error codes is listed here:
DISPLAY 8
1X01
1X06
1X07
Meaning
Scanner is not configured as a type 2 scanner.
An invalid LIB type code found in CDS.
An invalid line set type code found in CDS.
OX01
Configuration data set (CDS)
Scanner not configured as a type 2 communication scanner. Reg
X'16' = storage adr of data block within the CDS for the adapter
(scanner number) under test.
Reg X'11' = line adr of scanner LI B line intf adr.
OX02
Configuration data set (CDS)
Oscillator 0 not installed according to CDS data. Reg X'16' = storage adr of data block within the CDS for the adapter (scanner number) under test. Reg X'11' = line adr as used to set ABAR.
This error will also occur if an invalid oscillator type
code was found in the CDS for oscillator 0 (1st
oscillator position).
OX03
Configuration data set (CDS)
Oscillator 0 not lowest speed according to CDS data. Reg X'16'
This error will also occur if an invalid oscillator code
is in the CDS for oscillators 1, 2, or 3 (2nd, 3rd,
or 4th oscillator positions).
= storage adr of data block within the CDS for the adapter (scanner
number) under test. Reg X'11' = line adr as used to set ABAR.
X603
Comments
OX04
Configuration data set (CDS)
No L1Bs configured according to CDS data. Reg X'16' = storage
adr of data block within the CDS for the adapter under test. Reg
X'11' = line adr.
OX05
Configuration data set (CDS)
No line sets installed according to CDS data. Reg X'16' = storage
adr of data block within the CDS for the adapter (scanner number)
under test.
OX01
Test all valid inputs and outputs for type 2 scanner.
Input or output caused I/O check. Display regX'14' has been
loaded with the actual failing input/output instruction. Reg X'16'
contains storage adr of instruction loaded into reg X'14'. Reg X'11'
= line adr.
A3D2
B3E2
Reg X'11' = line adr of scanner-L1 B-line intf adr.
TA921
CK001
B-120
B-210
OX02
Test all valid inputs and outputs for type 2 scanner.
Adapter L1 irpt occurred. Reg X'14' contains error bits stored in
L1 rtn from reg X'43'. Reg X'16' has adr of input/output instruction. Reg X'11' = line adr.
A3C2
TB131
9-500
8-460
L1 inputs are to the card at location A3C2.
X605
OX01
Attachment buffer adr reg. ABAR is reg X'40'
Unable to write or read valid adr to or fro,:" ABAR. Display reg
X'14' for failing adr input from ABAR. Reg X'11' is adr that was
output to ABAR.
B3E2
B3D2
CX001
CX009
B-030
All valid adr are written to and read from the ABAR
with output and input X'40'.
X607
OX01
'CSB disable' on - turned on by output X'43' with byte 0 bit 0
and byte 1 bit 6 on. Should clear PCF and display request bits
in ICW.
'CSB disable' failed to force primary control field (PCF) to O. Reg
X'11' = failing line adr.
A3F2
TA811
B-170
Check that 'CSB disable' holds the PCF to 0 and
resets ICW bit 38, Reg X'4T byte 0 bit 6. Also
checks that output X'43' with byte 0 bit 1 and
byte 1 bit 5 clears reg X'43'.
OX02
'CSB disable' on - turned on by output X'43' with byte 0 bit 0
and byte 1 bit 6 on. Should clear PCF and display request bits
in ICW.
'CSB disable' failed to force PCF to 0 when output X'45' is done to
set PCF = 7.
A3F2
TA811
B-190
Reg X'11' = line adr set in ABAR.
Z3705GAA eSB 1FT SYMPTOM INDEX.
1FT CSB 400
(
Z3705GAA CSB I F.T SYI\IIPTOI\IIINDEX
3705-80 CSB I FT SYMPTOM INDEX - Cont.
1FT CSB 402
Routine
Error
Code
X607
OX03
'CSB disable' on - turned on by output X'43' with byte 0 bit 0
and byte 1 bit 6 on. Should clear PCF and display request bits
iniCW.
Error reg bits remain on in reg X'43'. Display reg X'15' for error
bits.
A3C2
TB131
B-130
Reg X'11' = line adr set in ABAR.
OX04
'CSB disable' on - turned on by output X'43' with byte 0 bit 0
and byte 1 bit 6 on. Should clear PCF and display request bits
in ICW.
'CSB disable' did not reset display request ICW bit 38. RegX'11'
= line adr.
A3G2
TB061
B-140
ICW bit 38 (display bit) is input reg X'47' byte 0
bit6.
XXXX
ICW adr test. This test checks for interaction between ICWs by storing a different pattern in the SDF of each ICW that is used. It then checks each ICW to ensure that it contains the correct
pattern in its SDF. The pattern used in the SDF of each ICW is byte 0 bits 6-7 and byte 1 bits 0-7 of the line adr (as used to set ABAR) of that ICW. If the SDF portion of the ICW local storage
is bad, you should use rtn X61 D to help locate the problem.
OX01
Check that all ICWs (jntf control words) can be adr by the pgm.
~-ll:IU
cacn Il.VV IS aar, ana a alTTerem Olt pattern IS
stored in the SDF bits of each ICW. Then each
ICW is adr, and the SDF is checked to ensure
that the correct bits are on. for that ICW.
X60A
Function Tested
Suspected Card
Location(s)
Error Description
Incorrect bits in serial data field. Reg X'16' contains expected SDF.
Reg X'14' byte 0 bits 6-7 = actual SDF bits 0 and 1 (lCW bits 24
and 25); byte 0 bits 0-7 = actual SDF bits 2-9 (lCW bits 26-33).
Reg X'll' = line adr with invalid SDF.
Program
Mask
A3L2
A3J2
A3H2
.. FEALD·
Page
TA621
TA545
TA221
FETMM
Page
Comments
Note: The pgm does output X'46' to set up the
SDFs of all ICWs; then the rtn sets scope sync 2
before checking each ICW with input X'45' and
X'47'.
OX01
'CSB disable' off (scanner enabled)
Primary control field (PCF) did not remain at O. Reg X'11' contains
line adr, which should be in ABAR. ABAR is reg X'40'.
A3F2
TA811
B-170
'CSB disable' latch is turned off, and the PCF is
checked to see if it is O.
OX02
'CSB disable' off (scanner enabled)
PCF did not set or remain at state 7 with scanner enabled. Reg
X'4S' has PCF; reg X'll' has line adr.
A3F2
TA811
B-190
The 'CSB disable' bit being off allows the PCF to
be changed to 7. The display bit (lCW bit 38)
should still be off.
OX03
'CSB disable' off (scanner enabled)
Bits are on in the error reg after 'CSB disable' turned off. See
reg X'43'. Reg X'11' has line adr.
A3C2
TB131
B-130
No error bits are caused or expected.
OX04
'CSBdisable' off (scanner enabled)
Display bit on after 'CSB disable' off. Reg X'47' byte 0 bit 6
should not be on. Reg X'11' = line adr.
A3G2
TB061
B-140
X610
OX01
Unexpected L1 irpt-test 1
Unexpected L1 irpt occurred. Reg X'16' = scanner check reg
(saved from reg X'43' in the L1 irpt handler). Reg X'14' contains
adr input from ABAR when the L1 occurred. Reg X'11' = line
adr. Reg X'43' should be all O's at this time unless another L1
error condition has occurred.
A3C2
TB131
B-130
Scanner is reset by an output to set 'CSB disable'
latch. The pgm waits for any unexpected L1
irpt.
X611
OX01
Unexpected L1 irpt-test 2
Unexpected L1 irpt occurred. Reg X'16' = scanner check reg X'43'
(saved by the L1 irpt handled. Reg X'14' = line adr obtained from
ABAR when the L1 occurred.
A3C2
TB131
B·130
Reset scanners by setting 'CSB disable' latch on.
Enable scanner by turning the latch off. Pgm
waits for unexpected L1 or L2 irpt.
A3C2
TB131
B·130
When 'CSB disable' is on, pgm checks for
unexpected levelland L2 irpt.
X60C
Note: Reg X'43' should be all O's at this time unless another L1
error condition has occurred.
X613
OX01
Unexpected L1 irpt. Reg X'16' = scanner check reg X'43' (saved
by the L1 irpt handler). Reg X'14' = adr obtained from ABAR
when the L1 occurred.
Unexpected L2 irpt-test 1
Note: Reg X'43' should be all O's at this time unless another
error occurred.
I
'""I
)
'- ./
'.
j
".
J
,
''''
/
'-
./
,/
\
"
./
"
"./
'."./
\
'--./
--'>.,
"-... .. /
r
'.
,,,.,--
,
./
."~
/
',-./
~
"'\
"-.
/
"""',
'"
/
(
\
(
(
(-
(
«
(
(
(
(
(
(
(
(
(
(
(
(
3705-80 CSB tFT SYMPTOM INDEX - Cont.
Routine
Error
Code
X613
OX02
Unexpected L2 irpt-test 1
Unexpected L1 and L2 irpt. Reg same as error X613 OX01.
A3C2
A3L2
TB131
TA611
B-130
See X613 OX01 comments.
OX03
Unexpected L2 irpt-test 1
Unexpected L2 irpt. Reg X'14' contains adr obtained from ABAR
by an input X'40' when the L2 occurred.
A3L2
TA611
B-300
See X613 OX01 comments.
OX01
Unexpected L2 irpt-test 2
Unexpected L1 irpt. Reg X'16' = scanner check reg (saved from
reg X'43' in the L1 irpt handler). Reg X'14' = ABAR (obtained by
input X'40' when the L1 occurred). Reg X'43' was reset when the
L1 occurred and should now be all O's 'unless another L1 error is
pending.
A3C2
TB131
B-130
After 'CSB disable' is reset, the pgm checks for
unexpected L1 and L2 irpt. No action is initiated
in the scanner after it is enabled, and no L1 or L2
irpt should occur.
OX02
Unexpected L2 irpt-test 2
Unexpected L1 and L2 irpt. Reg Same as error X614 OX01.
A3C2
A3L2
TA131
TA611
B-130
See X614 OX01 comments.
OX03
Unexpected L2 irpt-test 2
Unexpected L2 irpt. Reg X'14' = ABAR when unexpected L2
occurred.
A3L2
TA611
B-300
See X614 OX01 comments.
OX01
Disable line intf base (LIB)
Primary control field (PCF) not set to 0 on disable. Reg X'11' = line
adr.
A3F2
TA811
B-170
Each LI B is disabled and checked to see that PCF is
forced to remain at O. The LIB is disabled if its
mask bit is set on by an output X'43'.
X614
X616
Function Tested
Suspected Card
Location(s)
Error Description
Program
Malk
FEALD
Page
FETMM
Page
Comments
Note: Only LlBs indicated as being installed by the
CDS are tested.
X617
X61B
OX02
Disable line intf base (LIB)
Disable LI B did not force PCF to O. Reg X'11' = line adr. An output X'45' was done to set PCF to 7. The PCF should have been
forced to 0 since the LIB is disabled.
A3F2
TA811
B-170
See X616 OX01 comments.
OX01
Enable line intf base (LIB)
Primary control field (PCF) not 0 after the LIB is enabled. Reg
X'11' = line adr.
A3F2
TA811
B-170
The pgm disabled each LIB.
OX02
Enable line intf base (LIB)
A3F2
TA811
B-170
See X617 OX01 comments.
i
Could not set PCF after enabling LIB. Reg X'11' = line adr. Output X'45' was done to set LCD = 0 and PCF = 7. PCF should remain
at 7.
OX01
Intf control word bits 6-15 test
ICW bits 6-15 not set to X'2AA'. Reg X'11'
OX02
Intf control word bits 6-15 test
OX03
Intf control word bits 6-15 test
ICW bits 6-15 not set to X'3FF'. Reg X'11'
OX04
Intf control word bits 6-15 test
= line adr.
,
A3P2
A3M2
TA131
TA741
B-180
Pgm sets ICW bits 6-15 to X'OOO', sets scope sync 2,
sets ICW bits 6-15 to X'2AA', and checks that they
= X'2AA'.
ICW bits 6-15 not set to X'155'. Reg X'11' = line adr.
A3P2
A3M2
TA131
TA741
B-180
Pgm sets ICW bits 6-15 to X'OOO', sets scope sync 2,
sets ICW bits 6-15 to X'155', and checks that they
= X'155'.
= line adr.
A3P2
A3M2
TA131
TA741
B-180
Pgrn sets ICW bits 6-15 to X'OOO', sets scope sync 2,
sets ICW bits 6-15 to X'3FF', and checks that they
= X'3FF'.
ICW bits 6·15 not set to X'OOO'. Reg X'11' = line adr.
A3P2
A3M2
TA131
TA741
B-180
Pgm sets ICW bits 6-15 to X'3FF', sets scope sync 2,
sets ICW bits 6-15 to X'OOO', and checks that they
= X'OOO'.
--'-
Z3705GAA
esa 1FT SYMPTOM INDEX
1FT CSB 404
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Error'
Routine. Code
X61C
X610
X61E
X61F
X625
X626
,
,
/
,
)
Z3705GAA CSB I FT SYMPTOM INDEX
Function Tilted
Suspected Card
Locatlon(l)
Error Ollcriptlon
Program
Malk
FEALD
Page
FETMM
Page
1FT CSB 406
Commentl
OX01
Intf control word bits 16-19 (LCD check)
ICW bits 16-19 not set to 'Jt:IA'. Reg X'11'
= line adr.
A3P2
TA111
B-190
Bit patterns X'A', '5', 'F', and '0' are set in and reac
from ICW bits 16-19 (LCD) in this test. ICW
bits 20-23 (PCF) are not tested and are always set t
a's in this test to prevent any scanner hardware
action that may occur if these bits are not O. For
this error stop (OX01), the pgm sets LCD to 0, sets
scope sync 2, sets LCD to A, and checks that
LCD = 'A'.
OX02
Intf control word bits 16-19 (LCD check)
ICW bits 16-19 not set to X'5'. Reg X'11' = line adr.
A3P2
TA111
B-190
Pgm sets LCD = 0, sets scope sync 2, sets LCD to
5, and checks that LCD = X'5'.
OX03
Intfcontrol word bits 16-19 (LCD check)
ICW bits 16-19 not set to X'F'. Reg X'11'
= line adr.
A3P2
TA111
B-190
Pgmsets LCD = 0, sets scope sync 2, sets LCD
and checks that LCD = X'F'.
OX04
Intf control word bits 16-19 (LCD check)
ICW bits 16-19 not set to X'O'. Reg X'11' = line adr.
A3P2
TA111
B-190
Pgm sets LCD to F, sets scope sync 2, sets LCD to
0, and checks that LCD = X'O'.
OX01
Intf control word bits 24-33; out = reg X'46'; in = reg X'45' and
X'47' (serial data field).
ICW bits 24-33 not set to X'2AA'. Reg X' 11' = line adr.
A3H2
TA221
B-200
Pgm sets SDF to X'OOO', sets scope sync 2, sets
SDF to X'2AA', and checks that SDF = X'2AA'.
OX02
Intf control word bits 24-33; out = reg X'46'; in
X'47' (serial data field).
= reg X'45' and
ICW bits 24-33 not set to X'155'. Reg X'11' = line adr.
A3H2
TA221
B-220
Pgm sets SDF to X'OOO', sets scope sync 2, sets
SDF to X'155', and checks that SDF = X'155'.
OX03
Intf control word bits 24-33; out = reg X'46'; in = reg X'45' and
X'47' (serial data field).
ICW bits 24-33 not set to X'3FF'. Reg X'11' = line adr.
A3H2
TA221
9-200
Pgm sets SDF to X'OOO', sets scope sync 2, sets
SDF to X'3FF', and checks that SDF = X'3FF'.
OX04
Intf control word bits 24-33; out = reg X'46'; in = reg X'45' and
X'47' (serial data field).
ICW bits 24-33 not set to X'OOO'. Reg X'11' = line adr.
A3H2
TA221
B-200
Pgm sets SDF to X'3FF', sets scope sync 2, sets
SDF to X'OOO', and checks that SDF = X'OOO'.
OX01
Display request bit (lCW bit 38); out = reg X'43'; in = reg X'47'
ICW bit 38 not turned on. Reg X'11'
A3G2
TB061
B-170
B-140
Set ICW bit 38 on and reset it by an output X'43'.
Bit is tested by an input from reg X'47'.
OX02
Display request bit (lCW bit 38); out = reg X'43'; in
ICW bit 38 not reset. Reg X'11' = line adr.
A3G2
TB061
B-170
See X61 E OX01 comments.
OX01
'CSB disable' resets display request bit (lCW bit 38)
ICW bit 38 not turnned on when scanner and LI B are enabled, Reg
X'11' = line adr under test.
A3G2
TB061
B-170
Pgm attempts to set ICW bit 38 and 'CSB disable'
to turn it off. Bit is set by output reg X'43' and
tested by input reg X'47'.
OX02
'CSB disable' resets display request bit (ICW bit 38)
A3G2
TB061
B-170
OX01
Primary control field (PCF) (NOP test) reg X'45'
PCF not set to X'O'. Reg X'11'
same as reg X'11'.
A3F2
TA811
The pgm sets the PCF =a and expects no scanner
action and no irpt during a 25-ms period for each
line adr. The scanner and LlBs are enabled during
this test.
OX02
Primary control field (NOP test) reg X'45'
PCF did not remain at X'O' during a 25-ms wait.
A3F2
TA811
See X625 OX01 comments.
OX03
Primary cont501 field (NOP test) reg X'45'
L2 irpt occurred with line set to NOP .. Reg X'14' = ABAR (obtained
by input X'40' when the unexpected L2occurred). Reg X'40'
should = reg X'14'. Reg X'11' is last line adr set in ABAR (output
X'40') just prior to output X'45' to set LCD and PCF = O. No L2
irpt are expected in this rtn.
A3L2
TA611
B-310
See X625 OX01 comments.
OX01
Upper scan limit X'OO'.
Did not get L2 irpt from line when ICW 41 was set on. RegX'11'
= line adr. Reg X'40' should = reg X'11'.
A3L2
TA621
B-300
Set ICW bit41 on.
;'
'-...
j
:
."',
"
j
= reg X'47'
. 'CSB disable' did not reset ICW bit 38. RegX'11' = line adr.
"\
"\
.....
./
'" .-J
/
\....
= line adr.
....
)
./
.
./
/ ."
'..... /
;:"".,
' ..../
f
'"
\
j
= line adr.
Reg X'40' should be
, ''\
\""j
""\
"'\.
'-..
/
'\
/
~
'-. ./
"
,
,
~._/
(
'- . /
/.?"--~
/'
F)
\....J'
= F,
(
\......../
",
t/ (
(~
(
(
(
(
(
(
(
(
(
(
(
(:
(
(
(
(
(
(
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
X626
OX02
Upper scan limit X'OO'.
X627
XXXX
Set mode and scanner test. This is the first rtn in the type 2 scanner internal functional tests that requires that the line sets and some LIB circuits be operational. There are many possibilities for
errors being detected in this rtn, but the most likely source of problems is in the line sets rcv strobe circuits or in the bit clock control card circuits in the LI B. See note 7 at the end of this CSB
symptom index for some aid in determining if failures are in only one line set, in the LIB, or in the scanner.
OX01
Set mode and scanner test
Function Tested
Error Description
L2 from wrong line adr. Reg X'11' = expected line adr. Reg
X'14' = line adr that caused the L2.
Suspected Card
Location(s)
A3L2
Program
Mask
FEALD
Page
TA611
FETMM
Page
B-300
Adr in each scanner is checked.
L2 irpt did not occur for set mode. Display reg X'45'. If byte 0
bits 0-3 (LCD) are on, a feedback check occurred. Check oscillator
o in the scanner. Check for bit svc or missing line set card for
the failing adr. The most likely source of failure is in the line set
card(s) for the failing line adr. Reg X'11' = line adr under test.
Reg X'40' should = reg X'11'. If no feedback check (LCD = F)
occurred, the LCD should be 7 if the line runs in start/stop mode;
the LCD should be 'C' if the line runs in BSC mode. If PCF = 1, the
set mode never completed for start/stop or BSC lines. If PCF = 0,
the set mode completed normally, but the L2 irpt expected did not
occur within 25-ms after it was issued. Reg X'77' byte 0 bit 1 will
be on if a L2 pending occurred after the 25-ms. The SDF contains
the bits used for set mode. The card called is only a starting point
to look for bit svc.
A3E2
TA331
B-310
All SIS and B-260 BSC line sets (some RPQ line
sets) are tested by a set-mode operation, which
checks some of the scanner, oscillator, LIB, line set
circuits. A likely source of error is the line set card
in the failing line adr. Display bit is set while line
adr is under test so that the display reg (reg X'46')
is valid for line adr under test. The PCF is checked
for 0 after a set mode. A set mode may cause a L2
irpt even if the oscillator is not working properly.
See note 7 at the end of this CSB symptom index
for aid in isolating the problem.
a
X628
Comments
OX02
Set mode and scanner test
L2 irpt from wrong adr. Check the line that caused the irpt for
faults. Reg X'11' = line adr under test. Reg X'40' should = reg
X/11'. Reg X'14' has line adr obtained from ABAR by input X /40'
when the L2 occurred.
A3L2
TA621
B-310
B-260
See X627 OX01 for details.
OX03
Set mode and scanner test
PCF field did not set to 0 on set mode. Reg X'11' and X'14' set up
same as X627 OX01 and X627 OX02.
A3F2
TA811
B-310
B-260
See X627 OX01 for details.
XXXX
Feedback check test. All installed line line sets are tested to ensure that a feedback check will occur if an invalid bit is used during set mode and that a feedback check does not occur if a valid bit
is used during a set mode. This rtn will most likely produce error stops if the CDS (configuration data set) defining the LIB and line set types is not set up properly for the hardware that is installed.
If the CDS is correct, the most likely source of the error is in the line set card(s) for the failing line adr. See note 7 at the end of this CSB symptom index for an aid to problem determination.
Each installed line set is tested in the following steps:
a.
b.
c.
d.
e.
f.
g.
Reset and then enable the scanner.
Set the display bit on in the line adr under test.
Set the SDF by an output X'46' with the bits in reg X'13'.
Set scope sync 2.
Set LCD = 0 and PCF = 1 to initiate the set-mode operatio~.
Unmask L2 irpt and wait until either a L2 occurs or 25-ms have elapsed.
Verify that the LCD was set to F by the scanner if a feedback check occurred due to an invalid bit being used in the SDF during the set mode, or verify that LCD was not set to F if a valid bit
was used during the set mode.
h. Repeat steps a through g until all set-mode bit positions have been tested.
Z3705GAA CSB 1FT SYMPTOM INDEX
1FT CSB 408
3705·80 CSB I FT SYMPTOM INDEX· Conti
Routine
X628
Error'
Code
Z3705GAA CSB 1FT SYMPTOM INDEX
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
1FT CSB 410
Comments
XXXX On all error stops in this rtn, the following regs are set up:
Reg X'11' = line adr of line under test (as used to set ABAR).
Reg X'13' = bit pattern being output to the SDF for this step of the test. The bit position that i$ a 1 is the bit being tested. Each bit of byte 1 is defined in more detail as:
Bit
lew bit
SDF bit
o
26
27
28
29
30
31
32
33
2
3
4
5
6
7
B
9
1
2
3·
4
5
6
7
X629
Normal use if this bit is a 1 during set mode
Not used.
Set diagnostic wrap mode.
Set data terminal ready.
Set sync bit clock (syn clock correction).
Set external clock selected.
Set data rate select (select high rate).
Set oscillator select bit 1.
Set oscillator select bit 2.
OX01
Check that an invalid bit in the SDF during a set mode operation
causes a feedback check.
Error if a feedback check did not occur setting the LCD to F. See
reg X'13' bit definitions in X628 XXXX for more information.
A3E2
TA341
8-260
A feedback check should have occurred since CDS
indicates a line set is installed without a latch for
the bit position under test in the SDF.
OX02
Check that a valid bit in the SDF during a set mode operation does
not cause a feedback check.
Error if a feedback check occurred setting LCD to F. See reg
X'13' bit definitions in X628 XXXX for failing bit.
A3E2
TA341
8-260
A feedback check should not occur since CDS
indicates. a line set is installed with a latch that
could be set on for this SDF bit position during
a set mode operation.
XXXX
Diag mode test. Each installed SIS or sync line adr is set into diag mode with a set-mode operation. Then a check is made to ensure that 'CTS' 'DSR', and 'diag mode' bits are on. Auto-call line
sets are not checked. Each adr is tested in the following sequence: (1) Reset and then enable the communication scanner. (2) Set display bit (ICW bit 38). (3) Set SDF bit on for diag mode and
set bit on for sync bit clock if line will run in sync mode only. (4) Set scope sync 2. (5) Set PCF = 1 and LCD = 7 for SIS lines or LCD = C for sync lines. (6) Wait for L2 irpt from the set mode
and check the results.
8-310
8-260
See X629 XXXX for more information.
The most likely source of hardware failures detected in this rtn are the line set card(s) for the line adr under test. See note 7 at the end of this symptom index T2CS-NoteS for aid in determining a
failing pattern.
OX01
Diag mode
L2 irpt did not occur. See X627 OXOl for reg. Card called is only
a starting point to look for bit svc.
A3E2
TA331
OX02
Diag mode
L2 irpt from wrong line adr. Check the line adr for faults.
A3L2
TA621
.B-310
8-260
X62D
OX03
Diag mode
PCF did not change to 0 on set-mode completion. See X627 OX03
for reg.
A3F2
TA811
8-310
8-260
See X629 XXXX for more information.
OX04
Diag mode
Proper latches did not set. Display reg X'46' byte 0 bits 0, 2, and 5
should be on. Reg X'14' contains input from reg X'46' at the time
failure was detected. Reg X'15' has a bit on for each bit position in
reg X'14' that is in error. Reg X'11' = line adr under test.
A3E2
TA331
8-150
Reg X'46'bit 3 (RLSD) is ignored in this test; it
may be on or off. Errors may be detected if an
incoming call on a switched line brings up 'ring
indicator' (reg X'46' bit 0.1),.
OX01
Svc req (lCW bit 1) and L2 irpt
L2 irpt did not occur for set mode. See OX27 OXOl for reg and
checks.
A3E2
TA331
8-130
8-260
Each installed SIS or 8SC line set into diagnostic
rcv mode and SDF bit 9 set on. A L2 irpt should
occur and 'svc req' bit (I CW bit 1) should turn on.
The reset of the 'svc req' bit is then checked.
OX02
Svc req (ICW bit 1) and L2 irpt
L2 irpt was from the wrong line adr. Check the line adr that causes
the irpt for faults. Reg X'll' = line adr under test. Reg X'40'
should = reg X'11'. Reg X'14' has line adr obtained from A8AR by
input X'40' when the L2 occurred .
A3L2
TA621
8-300
See comments in X62D OX01.
.
"',
)
/
~,
)
See X627 OX02 for reg. See X629 XXXX for
more information.
/"
,
,~
""-,/
:
-;,,\
\,
./
/~
'-
/
/'"'">
'--"""\
\
.'-..-~
'---
j
."
'-
/
!
.•
"
./
, -- ./
(
-".",
'--_/
"
/
------~--
t
(
l/'
(
(/ (
(
(
(
f
(
(
(\ ('
(
('
(/
(
f
(:'
(
(-
(
f
C (-
("
/
(~'
(~\
.;./
('
('
(
(' (
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Error'
Routine. Code
X62D
X62E
X632
X634
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
OX03
SDF bit 9 was turned on and should cause a character svc L2 irpt.
L2 .irpt did not occur. Check oscillator or scanner or missing line
set card for that line. Reg X'11' =line adr of line under test. Reg
X'40' should = reg X'11'.
A3E2
TA331
B-310
B-260
See comments in X62D OX01.
OX04
SDF bit 9 was turned on and should cause a char-svc L2 irpt.
L2 irpt occurred from wrong line adr. Reg X'14' =line adr that
caused the L2. Reg X'11' =line adr L2 was expected from.
A3E2
TA331
B-490
B-420
See comments in X62D OX01.
OX05
SDF bit 9 was turned on and should cause a char·svc L2 irpt with
ICW bit 1 on.
ICW bit 1 ('svc·request') is not on or ICW bits 0, 2, 3, 5, 6, or 7
are on. Reg X'44' byte 0 = ICW bits 0-7 in bits 0-7.
A3P2
TA121
B-140
ICW bit 4 is ignored in this test since it may be on
or off.
OX06
SDF bit 9 was turned on and should cause a char-svc L2 irpt.
Svc request did not reset (lCW bit 1). Reg X'44' byte 0 bit 1.
A3P2
TA121
B-180
OX01
Priority bits 1 and 2. Reg X'47'
Priority bit 2 failed to set. Reg X'11'
Reg X'40' should = reg X'11'.
A3G2
TB021
B-210
OX02
Priority bits 1 and 2. Reg X'47'
Priority bit 1 failed to set. Reg X'11' = line adr under test. Reg
X'40' should = reg X'11'.
A3G2
TB021
B-210
OX03
Priority bits 1 and 2. Reg X'47'
Priority bits 1 and 2 failed to set. Reg X'11'
A3G2
TB021
B-210
OX04
Priority bits 1 and 2. Reg X'47'
Priority bits 1 and 2 failed to turn off.
test.
A3G2
TB021
B-210
OX01
'Irpt req pending' bit (lCW 411. Reg X'47'
L2 'irpt req pending' bit did not set in ICW 41, or reg X'47'. Check
that 1st set mode caused the priority reg to be occupied. Reg
X'13' =line adr that should be in priority reg 3. Reg X'16' =line
adr that should have 'irpt req pending' bit on. Reg X'40' should
=reg X'16'.
A3L2
TA641
B-300
L2 irpt are masked off and a set mode puts a line
adr (lCW) in diag mode with priority select set to 3.
A 2nd line adr is put into diag mode; priority select
set to 3 by another set-mode operation. Then the
on state of the 'irpt pending' bit is tested in the 2nd
line. L2 irpt are unmasked and checked that they
occur in correct order.
OX02
'Irpt req pending' bit (JCW 41). Reg X'47'
No L2 irpt. Should haife had a L2 from line adr in reg X'13'.
Reg X'16' =line adr of the next expected L2 irpt.
A3L2
TA611
B-300
See X632 OX01.
OX03
'Irpt req pending' bit (lCW 41 I. Reg X'47'
1st L2 irpt occurred but not from the expected line. Reg X'13'
=line adr expected to irpt first. Reg X'14' =line adr that caused
the L2 irpt. Reg X'16' =line adr expected t~ irpt next.
A3L2
TA611
B-300
See X632 OX01.
OX04
'I rpt req pending' bit (I CW 41 ). Reg X'47'
No L2 irpt from 2nd line that had 'irpt pending' bit on. Reg X'13'
=line adr of line that should have irpt previously. Reg X'16' =line
adr expected to cause the L2 irpt.
A3L2
TA611
B-300
Check scanner, oscillator, and LI B clock if no L2
irpt occurred. See comments in X632 OX01.
OX05
Irpt req pending bit (ICW 41). Reg X'47'
2nd L2 irpt occurred but from wrong adr. Reg X'13' =line adr of
previous line that should have irpt on previous error check. Reg
X'14' =line adr of line causing L2 irpt. Reg X'16' =line adr
expected to cause L2 irpt.
A3L2
TA611
B-300
See X632 OX01.
OX01
Upper scan limit X'01' test (8 lines)
Did not get L2 irpt from one ofthe 1st 8 lines when ICW bit 41 was
set on. Reg X'11' =line adr L2 expected to L2 irpt. Reg X'40'
should = reg X'11'.
A3L2
TA621
B-220
Only 8 lines should irpt when ICW bit 41 is set on;
upper scan limits are set up to scan 8 line adr.
OX02
Upper scan limit X'01' test (8 lines)
L2 from wrong adr. Reg X'11' =line adr expected to L2 irpt.
Reg X'14' =line adr causing the L2 irpt.
A3L2
TA621
B-300
=line adr of line under test.
=line adr under test.
Reg X'11' =line adr under
0040
All combinations of the priority bits are checked to
ensure they can be set and reset.
Z3705GAACSB 1FT SYMPTOM INDEX
1FT CSB 412
3705-80 CSB 1FT SYMPTOM INDEX -Cont.
Error
Routine. Code
function Telted
SUlpected Card
Location(s)
Error Description
Progrlm
Milk
fEALD
Plge
fETMM
Page
1fT CSB 414
Comments
X634
OX03
Upper scan limit X'01' test (8 lines)
Got an unexpected L2 irpt when ICW bit 41 was set in one of the
ICWs beyond the 1st 8 lines. This irpt ICW should not have been
scanned to cause a L2 irpt even though its L2 'irpt pending' bit was
set. Reg X'11' = line adr in which the ICW bit 41 was set. Reg
X'14' is the line adr causing the L2 irpt. If reg X'11' = reg X'14',
the upper scan limit 01 is not working properly.
A3L2
TA621
8-220
If reg X'll' is not = reg X'14', the unexpected L2
may be caused by a scan problem not related to the
upper scan limit controls.
X635
OX01
Upper scan limit X'11' test (16 lines)
Did not get L2 irpt from one of the 1st 16 Iines when ICW bit 41
was set on. Reg X'11' = line adr expecting a L2 irpt.
A3L2
TA621
8-220
Only 16 line adr should irpt when ICW bit 41 set
on with scan limit set for 16 lines.
OX02
Upper scan limit X'11' test (16 lines)
L2 irpt from wrong adr. Reg X'11' = expected adr; reg X'14'
adr causing the L2 irpt.
A3L2
TA611
8-300
OX03
Upper scan limit X'11' test (16 lines)
Got an unexpected L2 irpt when ICW bit 41 was set in one of the
ICW's beyond the 1st 16. This line adr should not be scanned with
scan limit bits = 11, so a L2 should not occur. Reg X'll' = line adr
of ICW in which bit 41 was set. Reg X'14' = line adr causing the L2.
If reg X'll' = reg X'14', the upper scan limit 01 is not working
properly.
A3L2
TA621
8-220
If reg X'11' is not = reg X'14', the unexpected
L2 irpt may be caused by a scanner problem not
related to the upper scan limit controls.
OX01
Upper scan limit X'10' test (48 lines)
Did not get L2 from one of the 1st 48 lines when ICW bit 41 was
set. Reg X'll' = line adr expected to L2 irpt.
A3L2
TA621
8-220
Only 48 line adr should irpt when ICW bit 41 is
set on when upper scan limit is set for 48 lines.
OX02
Upper scan limit X'10' test (48 lines)
L2 from wrong adr. Reg X'11' = line adr expected to L2 irpt. Reg
X'14' = line adr on which the L2 irpt occurred.
A3L2
TA611
8-300
OX03
Upper scan limit X'10' test (48 lines)
Unexpected L2 irpt when ICW bit 41 was set in one of the ICWs
beyond the 1st 48 line adr. With scan limit 10 set, this line should
not be scanned, so no L2 should occur. Reg X'11' = line adr of
ICW in which ICW bit 41 was set on. Reg X'14' = line adr that
caused the L2. If reg X'll' = reg X'14', upper scan limit 01 is not
working properly.
A3L2
TA621
8-220
If reg X'11' is not = reg X'14', the unexpected
L2 irpt may be caused by a scanner problem not
related to the scan limit controls.
OX01
Irpt priority reg
L2 irpt did not occur after unmasking L2. Reg X'13' = line adr L2
expected from.
A3L2
TA611
8-300
The 1st 4 ICWs are set up with priority settings of
3,2,1, and 0 in that order. ICW bit 41 ('irpt
request pending') is set in the 1st four ICWs. L2 is
unmasked and the ICWs are checked to ensure they
irpt in proper order (1st, 2nd, 3rd, and 4th ICW).
OX02
Irpt priority reg
L2 irpt is not from the expected adr. Reg X'13' = line adr L2
expected from. Reg X'14' = line adr that caused L2.
A3L2
TA611
8-300
OX01
Substitution ctrl reg bit 1
Unexpected L2 irpt occurred. Reg X'14' = line adr of line causing
the L2 irpt. Reg X'll' = line adr that had ICW bit 41(L2 pending)
set. If regX'll' does not = reg X'14', there may be a Ll8 or scanner failure. If reg X'14' = reg X'll', substitution ctrl reg bit 1 is
not working; reg X'14' is the line adr that should not have been
scanned and, therefore, should not have caused a L2 irpt.
83E2
8302
CXOO1
CX009
8-220
X636
X63B
X63D
)
Z3705GAA CSB 1FT SYMPTOM INDEX
'I),
''---~'
("",
\.
/
0
0\.
'
,r-j
/
./
"-...
,0
,-j
/
("".
(
\
(""'\
f~
"'-./
\"
./
\,-/
,,-J
1 (
(~
(-
(/ (:
(
(
(
c-
(
(
(' ('
(
(
(
(
--~---
f
{'
-~~.---
(
(
(
(
(
(
(""
/'
(--':
'
~
('
,"
(
(-
f
(~
3705·80 CSB 1FT SYMPTOM INDEX - Cont.
Routlnl
Error'
Codl
Function TIlted
Error Deseription
Suspeeted Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
X63E
OX01
Substitution ctrl reg bit 2
Unexpected L2 irpt. Reg X'14' = line adr of line causing the L2.
Reg X'11' = line adr of line that had ICW bit 41 (L2 pending) set.
If reg X'11' does not = reg X'14' there may not be a LIB or scanner
failure. If reg X'14' = reg X'11', substitution ctrl reg bit 2 is not
working, reg X'14' is the line adr that should not have been scanned
and, therefore, should not have caused a L2 irpt.
B3E2
B3D2
CX001
CX009
B·220
Substitution ctrl reg bit 2 is set, and an attempt is
made to cause a L2 irpt on lines C and 0 of all L1Bs.
These adr should not be scanned.
X63F
OX01
Substitution ctrl reg bit 3
Unexpected L2 irpt. Reg X'14' = line adr causing the L2 irpt. Reg
X'11' = line adr that had ICW bit 41 (L2 pending) set on. If reg
X'11' does not = reg X'14', there may be a LI B or scanner failure.
If reg X'14' = reg X'11', the substitution ctrl reg bit 3 is not working
properly, and reg X'11' = the line adr that should not have been
scanner and should not have caused a L2 irpt.
B3E2
8302
CX001
CX009
B·220
Substitution ctrl reg bit 3 is set, and an attempt is
made to cause a L2 irpt on lines A and B of all LI Bs.
These adr should not be scanned with the scan
substitution ctrl bit 3 on.
X640
OX01
Substitution ctrl reg bit 4
Unexpected L2 irpt. Reg X'14' = line adr causing the L2 irpt. Reg
X'11' = line adr that had ICW bit 41 (L2 pending) set. If reg X'll'
does not = reg X'14', there may be a LIB or scanner failure. If reg
X'14' = reg X'11', the substitution ctrl reg bit 4 is not working, in
which case reg X'14' is the line adr that should not have been scanned
and, therefore, should not have caused a L2 irpt.
B3E2
B3D2
CS001
CX009
B·220
Substitution ctrl reg bit 4 is set, and an attempt is
made to cause a L2 irpt on lines 8 and 9 of all L1Bs.
These adr should not be scanned.
X645
XXXX
Diag xmt test for SIS line sets. All installed line adr that will run in SIS mode are tested, one at a time. The test goes through xmt initial (PCF = 8) to xmt data (PCF = 9) through xmt turn·around
(PCF = 9 to PCF = 7). The char xmt are a PAD char of X'FF' followed by two data characters of X'AA'. The SIS LCD of 7 (start bit, 8 data bits, 2 stop bits) is used in this test. You should refer
to notes 4 and 7 at the end of this CSB symptom index for aid in problem determination if this rtn detects any errors. Prior to setting xmt initial, the pgm does a set mode with the 'diagnostic
mode' bit on. If this set mode fails, you will get pretest error stop codes in DISPLAY B beginning with 1. These codes may be found in "Common Error Stops" following this CSB symptom
index. With 'diag mode' set properly, the scanner should force on the 'CTS' condition so that when xmt initial is set, the next bit time should result in PCF changing from 8 to 9 (xmt initial to
xmt data). The most likely source of hardware failure for this rtn is in the line set card(s) for the line adr that is under test.
OX01
Diag xmt test for SIS.
L2 irpt did not occur after xmt initial was set. Display reg X'45'
and check byte 0 bits 0·3 for feedback check (all bits on). LCD
should = 7; PCF should = 9. (PCF was set to 8 by pgm.) Reg X'11'
= line adr under test. See X645 XXXX for more info.
A3L2
TA611
B·310
B·260
The scanner hardware should change the PCF from
8 to 9 when it detects 'CTS'. CTS should be forced
on by the scanner if 'diagnostic mode' latch was set
on properly when the set mode was ~one. After
scanner changes PCF to 9, it should serialize and
xmt a bit every bit svc time and cause a char-svc L2
irpt when the PAD char has been sent.
OX02
Diag xmt test for SIS
L2 irpt was not from expected line adr. Reg X'14' = line adr that
caused the L2 irpt. Reg X'11' = line adr that L2 was expected from.
A3L2
TA611
B-300
Check scanner, oscillator, and LIB clock if no L2
irpt occurred or L2 was from the wrong line adr.
See X645 XXXX for more info;
OX03
Diag xmt test for SIS
Primary control field (PCF) did not change to X'9'. Reg X'11' = line
adr under test. See X645 XXXX for more info.
A3F2
TA811
B·080
Scanner shO'uld change PCF to 9 from 8 when it
detects 'CTS' which should be forced by the scanner
if diag mode set properly.
OX04
Diag xmt test for SIS
No L2 irpt after 2nd xmt char. Reg X'11' = line adr under test. If
LCD = F, a feedback check has occurred. LCD should = 7; PCF
should = 9.
A3L2
TA611
B·310
OX05
Diag xmt test for SIS
2nd L2 irpt from wrong line adr. See X645 OX02 for reg.
A3L2
TA611
B·300
See X645 XXXX for more info.
OX06
Diag xmt test for SIS
No L2 for xmt turnaround. Reg X'11' = line adr under test. Check
reg X'45' for LCD. If LCD = F, a feedback check occurred. LCD
should = 7; PCF should = 7 since PCF was set to '0' (xmt turn·
around) on the previous char-svc L2 irpt.
A3L2
TA611
B·310
B·080
See X645 XXXX for more info.
Z3705GAACSB 1FT SYMPTOM INDEX
1FT CSB 416
C
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
. Error
Routine. Code
X645
X64A
X64C
Z3705GAA CSB 1FT SYMPTOM INDEX
Function Tested
Suspected Card
Locetlon(s)
Error.Oescription
Program'
Mask
FEALD
Page
FETMM
Paga
1FT CSB 418
Comments
OX07
Diag xmt test for SIS
3rd L2 irpt from wrong line adr. See X645 OX02 for reg.
A3L2
TA611
B-310
See X645 XXXX for more info.
OX08
Diag xmt test for SIS
PCF did not change to X'7' (rcv mode) after turnaround or LCD
changed. Reg X'11' = line adr under test.
A3F2
TA811
B-080
Scanner should change PCF to 7 on normal turnaround completion. LCD should be 7.
SDF did not set to O.
A3H2
B-480
SDF should be changed to 0 by scanner hardware
on xmt turnaround. Reg X'15' byte 0 bits 6 and 7
contain SDF bits 0 and 1. Byte 1 contains SDF
bits 2-9.
'..
OX09
Diag xmt test for SIS
XXXX
Diag rcv mode bit svc and tag detection test. All line sets that will run inSIS or sync mode are tested. After the set mocle is .completed, a bit pattern of X'0301' for SIS line sets or X'0201' for sync
lirie sets is output toSDF by an output to reg X'46'. Then the PCF is set to 7 (rcv mode) with a LCD = 7 for SIS line sets or LCD = C for sync line sets. For SIS line sets, this should cause a charsvc L2 irpt on the first scan cycle after the next bit svc occurs in the line set. For a sync line set (due to LCD = C), the char-svc L2 irpt should occur after the second bit svc and should strobe a 1 bit
into PDF bit 0 from the 'test data' latch. In either case, the result should be a char of X'CO' in the PDF wh'3n the char-svc occurs.
OX01
Diag rcv mode bit deserializing and bit svc for all installed line adr in
rcv mode (PCF = 7).
PCF did not set to X'7' (rcv mode) or LCD has changed. Reg X'11'
= line adr of line set under test.
A3F2
TA811
B-190
Pgm did an output to reg X'45' to set LCD and
PCF. Then an input X'45' is done to check LCD
and PCF.
OX02
Diag rcv mode, bit deserializing, and bit svc for all lines in rcv mode.
L2 irpt did not occur. Check oscillator, scanner limits, or LIB clock.
Reg X'11' = line adr expected to cause L2 irpt.
A3L2
TA611
B-490
See X64A XXXX.
OX03
Diag rcv mode, bit deserializing, and bit svc for all lines in rev mode.
L2 irpt from wrong adr. Reg X'14' = line adr that caused L2 irpt.
Reg X'11' = line adr expected to cause L2 irpt.
A3L2
TA611
B-300
See X64A XXXX.
OX04
Diag rcv mode, bit deserializing, and bit svc for all lines in rcv mode.
Data byte in PDF (parallel data field) not expected data, or check
flag on in ICW bits 0-3. Reg X'11' =line adr. Reg X'14' =flags and
PDF input from reg X'44'. RegX'16' = expected bits that should
be on in reg X'14'.
A3E2
A3P2
TA311
TA131-
B-490
B-420
See X64A XXXX.
XXXX
Diag xmt test for sync lines. All installed line sets that will run in sync mode are tested from xmt initial (PCF = 8) through xmt data (PCF = 9) to xmt turnaround (PCF = 0 to PCF = 5). Char xmt
are two pad char of X'AA' and the char X'32'. Prior to setting xmt initial, the pgm does a set mode with the 'diag mode' and 'sync bit clock' bits both on. If this set mode fails, you will get pretest
error stop codes in DISPLAY B beginning with 1. These codes may be found in "Common Error Stops" following this CSB symptom index. With 'diag mode' set properly, the scanner should force
on the 'CTS' condition so that when xmt initial is set, the next bit time should result in PCF changing from 8 to 9 (xmt initial to xmt data).
OX01
Diag xmt test for BSC line sets.
L2 did not occur after xmt initial. LCD should = C. If LCD = F, a
feedback check occurred so line set or LIB is probably in error. If
LCD = C, check PCF. PCF was set to 8 but should have changed to
9 as the 1st char was xmt. If the char was not xmt, check for oscillatorlLl B clock error or scanner failure.
A3L2
TA611
B-310
B-260
See X64C XXXX and notes 4 and 7 at the end of
this CSB symptom index for checks to make to aid
problem determination. Reg X'11' = line lidr of
line set under test.
OX02
Diag xmt test for BSC
L2 from wrong line adr. Display reg X'14' for line adr that caused
the L2 irpt and reg X'11' for the line adr expected to cause the L2
irpt.
A3L2
TA611
B-300
See notes 4 and 7 at the end of this CSB symptom
index for problem determination aids.
OX03
Diag xmt test for BSC
PCF did not change to X'9' (xmt data). Reg X'11' = line adr. LCD
and PCF same as' X64C OX01.
A3F2
TA811
B-080
See X64C XXXX.
OX04
Diag xmt test for BSC
2nd L2 irpt did not occur. See X64C OX01 for LCD and PCF.
A3L2
TA611
B-310
B-260
See X64C XXXX.
OX05
Diag xmt test for BSC
2nd L2 irpt from wrong line adr. Check failing line adr for cause of
of error. See X64C XXXX.
A3L2
TA611
B-300
Reg X'14' = line adr that caused the L2 in error.
Reg X'11' = line adr expected to cause L2.
OX06
Diag xmt test for BSC
L2 irpt did not occur after setting PCF to X'D' for xmt turnaround.
Check if LCD = F (feedback check). PCF should. = 5, since on last
char svc, it was set to '0'. If PCF is not 5, then turnaround did not
work. Reg X'11' = line adr under test.
A3L2
TA611
B-080
See X64C XXXX. LCD should
have changed to 5;
TA221
\
.'-oj
'-..."/
"'l
'- .-
(
'~\
'-
./
"
'-_./
""-
"
/
t-'"
\. ./
,-
1"'-,
'-
./
"'"
~
'-/
"-- /
"- j
0,
'"1
/
(~
...
./
//.,..- - \
l'
...
-'-
"
/
.c~
'-..,
-~
j
= C.
/-"'j
\ .. j
PCF should
~
\'-.
/'"
.....
./
(
(
(
{
(
(
(
(
(
(
(
(
f
(
(
(
(
(
(
(
(
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Routine
X64C
X650
Error·
Code
Suspected Card
Location(s)
Error Description
Function Tested
Program
Mask
FEALD
Page
FETMM
Page
Comments
OX07
Diag xmt test for 8SC
3rd L2 irpt from wrong line adr. Check failing line adr for cause of
error. See X64C XXXX.
A3L2
TA611
8-300
Reg X'14' = line adr that caused the L2 in error.
Reg X'11' = line adr expected to cause L2.
OXOS
Diag xmt test for 8SC
PCF did not change to 5 on xmt turnaround, or LCD is not = C.
Reg X'11' = line adr under test.
A3F2
TA811
8-080
PCF should have changed to 5, and LCD should
have remained at C.
XXXX
Wrap data test for SIS line sets using LCD = 7. All lines that run is SIS mode (except telegraph line sets) are wrapped two at a time. The first installed SIS line is made the rcv line and the next
installed SIS line is made a xmt line. As each pair of lines completes its wrap, the lines are reset. The line that was the xmt line is now made the rcv line and the next installed SIS line is made the
xmt line. This is continued until the last installed SIS line has been used as a xmt line. The last installed SIS line is then made a rcv line and the first installed line is made the xmt line for the last
wrap performed in this rtn. Data sent on the xmt line will be the PAD character (X'FF') and the characters X'AA', X'01' and X'FE'. The test is run with LCD = 7 so the hardware should add a start
bit and two stop bits to the character being xmt. The rcv line should rcv the xmt characters except for the PAD character.
NOTES:
Note 1: See notes 4, 5 and 7 in section T2CS-NoteS for more information and for aid in problem determination and isolation.
Note 2: For all error stops in this rtn, the following reg are set up:
Reg
Reg
Reg
Reg
X'11' = xmt line adr (as used to set A8AR)
X'13' = rcv line adr (as used to set A8AR)
X'14' (for errors that indicate L2 irpt occurred from wrong adr) contains the line adr that caused the L2 irpt.
X'14' (for errors that indicate the rcv data is bad or ICW bits 0-7 are in error) contains lew bits 0-15 from the rcv line ICW obtained by executing input X'44'. ICW bits 8-15 (the PDF)
contain the rcv data. ICW bits 0-7 are check and control flags and are always expected to be set as follows:
ICW bit 0 = stop bit check; should be off.
ICW bit 1 = svc req; should be on.
ICW bit 2 = char overrun/underrun; should be off.
ICW bit 3 = modem check; should be off.
ICW bit 4 = rcv line signal detect; this bit is ignored in this test.
ICW bit 5 = reserved bit; this bit is ignored in this test.
ICW bit 6 = pgm flag; this bit is ignored in this test.
ICW bit 7 = pad flag; this bit is ignored in this test.
Reg X'16' (for errors that indicate the rcv data is bad) contains the expected ICW bits 0-15 that are being tested against the contents of reg X'14'.
The rcv line always has the display bit on in its ICW, so reg X'46' is valid for the rcv line under test. All lines are set to priority 3 and oscillator select O. The following error codes are listed in the
sequence in which the actual test is run.
OX01
First L2 irpt for xmt line adr (not counting the set mode)
No L2 irpt occurred. Reg X'11'
adr.
OX02
First L2 irpt for xmt line adr
OX03
OX04
= xmt line adr.
A3L2
TA611
8-310
8-260
Should have char-svc L2 irpt from the xmt line adr
after the PAD char was xmt. See notes 4, 5, and 7
at the end of this CS8 symptom index for checks
to make and aids in problem determination.
L2 irpt from wrong line adr. Reg X'11' = xmt line adr and the line
adr expected to cause the L2 irpt. Reg X'13' = rcv line adr. Reg
X'14' = line adr that caused the L2 irpt.
A3L2
TA611
8-300
See checks and comments in X650 XXXX.
Xmt line PCF changed to 9 as the PAD charof X'FF' is xmt.
Xmt line PCF did not change to 9, or LCD not = 7. Reg X'11' =xmt
line adr.
A3F2
TA811
8-080
See checks and comments in X650 XXXX. Character X'01' is output to the PDF of xmt line after this
error display. Previous PDF char of X'AA' should
now be in process of transmission from SDF.
Rcv line rcv char X'AA' (first rcv line. L2 irpt after set mode)
No L2 irpt occurred. Reg X'11' = xmt line adr. Reg X'13' = rcv line
adr and line adr expected to cause the L2 irpt.
A3L2
TA611
8-490
See checks and comments in X650 XXXX. This
should be the 2nd L2 irpt after pgm set scope
sync 2.
Reg X'13' = rcv line
Z3705GAA CSB I FTSYMPTOM INDEX
1FT CSB 420
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Routine
Error
Code
Z3705GAACSB 1FT SYMPTOM INDEX
Function Tilted
__ .
-
._-_ ..
--- -
.
Program
Mask
FEALD
Plge
FETMM
Plge
Comments
..
L2 irpt from wrong adr. Reg X'11' = xmt line adr. Reg X'13' = rev
line adr and the line expected to cause the L2 irpt. Reg X'14' = line
adr causing the L2.
......
X650
Suspected Card
Location(s)
Error Description
1FT CSB 422
A3L2
TA611
8·300
See checks and comments in the X650 XXXX.
Rcv line PCF not = 7, or LCD not = 7. Reg X'13' = rcv line adr.
A3F2
TA811
8·080
Rcv PCF was set to 7-(rcv mode) by the pgm and
should not have changed. See checks and comments
in X650 XXXX.
Rcv line rcv character X'AA'
Rcv data in rcv line PDF not X'AA', or ICW bits 0·3 in error.
A3E2
A3P2
TA311
TA131
8-490
See X650 XXXX for reg and checks.
OX08
Xmt of X'AA' completed
No L2 irpt occurred. Reg X'11'
a L2.
A3L2
TA611
8·310
8·260
Should have completed the transmission of X'AA'.
The X'01' that was in the PDF should have trans·
ferred to the SDF and be in the process of being
xmt. This is the 3rd L2 irpt after pgm set scope
sync 2. See checks and comments in X650 XXXX.
OX09
Xmt of X'AA' completed
L2 irpt from wrong adr. Reg X'11' = xmt line adr and the adr
expected to cause the L2. Reg X'13' = rcv line adr. Reg X'14'
= line adr that caused the L2.
A3L2
TA611
8·300
See checks and comments in X650 XXXX. After
this error display, the xmt line's PDF is set to
X'FE' for the next xmt char.
OXOA
Rcv char X'01'
No L2 irpt occurred. Reg. X'13'
char·svc L2 irpt.
A3L2
TA611
8-490
Should rcv char X'01' in PDF and char·svc L2 irpt.
This should be 4th L2 (2nd from rcv line adr) after
pgm set scope sync 2. See X650 XXXX for reg and
checks.
OXOB
Rcv char X'01'
L2 irpt from wrong adr. Reg X'11' = xmt line adr. Reg X'13' = rcv
line adr and the adr expected to cause L2 irpt. Reg X'14' = line adr
causing L2 irpt.
A3L2
TA611
8·300
See checks and comments in X650 XXXX.
OXOC
Rcv char X'01'
Data rcv not X'01', or ICW bits 0·3 in error.
A3E2
A3P2
TA311
TA131
8-490
See checks and comments in X650 XXXX.
OXOD
Xmt of X'01' completed
No L2 irpt occurred. Reg X'11'
the L2 char-svc irpt.
A3L2
TA611
8·310
8·260
Should have just completed transmission of char
X'01'. X'FE' should have been transferred from the
PDF to the SDF and be in the process of being xmt.
This is the 5th L2 (3rd from xmt line adr) after pgm
set scope sync 2. See checks and comments in
X650 XXXX.
OXOE
Xmt of X'01' completed
L2 irpt from wrong line adr. Reg X'11' = xmt line adr and adr
expected to cause the L2. Reg X'13' = rcv line adr. Reg X'14'
adr that caused the L2 irpt.
A3L2
TA611
8-300
See checks and comments in X650 XXXX. After
this error check is made, the xmt line's PCF is set
to X'D' to cause xmt turnaround.
OX05
Rcv line rcv character X'AA'
OX06
Rcv line rcv character X'AA'
OX07
= xmt'line adr expected to cause
= rcv line adr expected to cause a
= xmt line adr expected to cause
= line
OXOF
Rcv char X'FE'
No L2 irpt occurred.
A3L2
TA611
8-490
This is the 6th L2 (3rd from rcv line adr). Last L2
expected for rcv line. See checks and comments in
X650 XXXX.
OX10
Rcv char X'FE'
L2 irpt from wrong adr. Reg X'11' = xmt line adr. Reg X'13' = rcv
line adr and adr expected to cause L2 irpt. Reg X'14' = line adr
causing the L2 irpt.
A3L2
TA611
8·300
See checks and comments in X650 XXXX.
.
I
/
~
J
"'---_.""'1
;r
'"
0 y/
"-
I ,.~
",j
0
,0
r~
"-/
(,,:,
r",
',,- y
"-~
\... ..../
(''I
\.
j
"-
/
\,
j
(~
'~
....... /
\..../
.~
'- .
./
'1
',,/
/"
'",-.
\
j
(
r--"\
~
I
'"
'........ _---/
F
[~
.,
J
0
0
/
/
(
(:
(
(
(
(
(-
(
(
(
(
(
(
(
(~
(
{
l-
(
"
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Suspected Card
Location(s)
Program
Mask
Routln,
Error
Cod.
X650
OX11
Rcv char X'FE'
Rcv data not X'FE', or ICW bits 0-3 in error.
A3E2
A3P2
TA311
TA131
8-490
See comments in X650 XXXX.
OX12
Xmt of X'FE' completed and xmt turnaround.
No L2 irpt occurred. Reg X'11' = xmt line adr and adr expected
to cause L2.
A3L2
TA611
8-310
8-260
7th L2 (4th from rcv line adr) after pgm set scope
sync 2. Xmt turnaround (PCF = D) was set after
the previous L2 irpt for xmt line, so xmt line should
now be turned around to rcv mode (PCF = 7).
OX13
Xmt of X'FE' completed and xmt turnaround.
L2 irpt from wrong adr. Reg X'11' = xmt line adr and adr expected
to cause the L2. Reg X'13' = rcv line adr. Reg X'14' = line adr that
caused the L2 irpt.
A3L2
TA611
8-300
See checks and comments in X650 XXXX.
OX14
Xmt turnaround.
Xmt line PCF did not change to 7 on turnaround; or xmt SDF did
not set to 0, or LCD not = 7.
A3F2
A3H2
TA811
TA211
8-080
When xmt turnaround is completed, the SDF should
be X'OOO', PCF should be 7, and LCD should be 7.
See checks and comments in X650 XXXX.
Function Tested
Error Description
FEALD
Page
(~
FETMM
Page
Comments
Z3705GAA CSB 1FT SYMPTOM INDEX
1FT CSB 424
(
This page intentionally left blank
(
l/ (
(
(
(
(
(
(
(
«
(
(
(
(
{
(
(
c(
3705-80 csa 1FT SYMPTOM INDEX - Cont.
Routine
X652
Error
Code
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
XXXX Wrap data test SIS line sets with LCDs of 0,2,4,5, and 6. All installed SIS line adr, except telegraph, are wrapped two at a time. The first installed SIS line is made the rcv line, and the next
installed SIS line is made a xmt line. As each pair of lines completes its wrap, the lines are reset. The line that was the xmt line is made the rev line, and the next installed SIS line is made the new
xmt line. Then the test is run on this pair of lines. This is continued until the last installed SIS line has been used as a xmt line. At this time, the last installed SIS line is made a rcv line, and the
first installed line is made the xmt line; and the test is run. After the above is done with LCD = 0, the whole process is repeated for LCD
=2, for LCD" 4, for LCD =5, and then for LCD" 6.
Note: LCD = 7 is tested in rtn X650. This test is not run if the 1st installed oscillator exceeds 1200 bits per second.
Date to be xmt and rcv for each LCD should be:
LCD = 0; data = X'2A', X'01', lind X'3E'
LCD =2; data =X'OA', X'01', and X'1 E'
LCD" 4; data - X'2A', X'01', and X'7E'
LCD =5; data = X'2A', X'01', and X'7E'
LCD" 6; data = X'AA', X'01', and X'FE'
The hardware should add a start bit and one or two stop bits to the xmt char according to LCD type. A PAD char (X'FF') is always xmt before the data char are xmt. The rcv line should rcv the
xmt char except for the PAD char.
Note: For all error stops in this rtn, the following regs are set up:
Reg X'11'· xmt line adr (as used to set ABAR)
Reg X'13'· rcv line adr (as used to set ABAR)
Reg X'14' (for errors that Indicate L2 Irpt occurred from wrong adr) contains the line adr that caused the L2 irpt.
Reg X'14' (for errors that indicate the rcv data Is bad or ICW bits 0-7 are in error) contains ICW bits 0-16 from the rcv line ICW obtained by executing input X'44'. ICW bits 8-16 (the PDF)
contain the rcv data. ICW bits 0-7 are check and control flags and are always expected to be set as follows:
ICW bit O· stop bit check; should be off.
ICW bit 1 =svc req; should be on.
ICW bit 2 =char overrun/underrun; should be off.
ICW bit 3 = modem check; should be off.
ICW bit 4 = rcv line signal detector; this bit is ignored in this test.
ICW bit 5 = reserved bit; this bit is ignored in this test.
ICW bit 6 = pgm flag; this bit is ignored in this test.
ICW bit 7 = pad flag; this bit is ignored in this test.
Reg X'16' (for errors that indicate the rcv data is bad) contains the expected ICW bits 0-15 that are being tested against the contents of reg X'14'.
Reg X'16' (for errors that indicate LCD changed or PCF is bad) contains expected LCD and PCF in byte O.
The rcv line always has the display bit on in its ICW, so reg X'46' is valid for the rcv line under test. All lines are set to priority 3 and oscillator select O. Refer to notes 4,5, and 7 at the end of this
symptom index for aid in problem determination. The following error codes are listed in the sequence in which the actual test is run.
Z3706GBACSB 1FT SYMPTOM INDEX
1FT CSB 450
3705-80 CSB I FT SYMPTOM INDEX - Cont.
"./
Z3705GBA CSft 1FT SVMPTOM INDEX
Routine
Error
Code
X652
OX01
First L2 irpt for xmt line (not counting set mode)
No L2 irpt occurred. Reg X'11'
line adr.
OX02
First L2 irpt for xmt
OX03
""
!
"
/
Suspected Card
Location(s)
Program
Mask
1FT· CSB 452
FEALD
Page
FETMM
Page
A3L2
TA611
8-310
8-260
Should have char-svc L2 irpt after the PAD char was
xmt. Check LCD for feedback check. You may use
the continue function to determine if only this line
set, this Ll8, or all lines in the scanner are failing. If
all lines are failing, the first oscillator card or the
scanner cards are probably bad. If all lines in one Ll8
are failing, check the bit clock control card. If only 1
line or a pair of lines is failing, the problem is probably
the line set card(s) for the failing line adr.
L2 irpt from wrong adr. Reg X'll' = xmt line adr and the adr
expected to cause L2 irpt. Reg X'13' = rcv line adr. Reg X'14'
= line adr that caused the L2.
A3L2
TA611
8-300
See checks and comments under X652 OX01.
Xmt line PCF changed to 9 as the PAD char X'FF' is xmt
Xmt line PCF did not change to 9 or LCD changed. Reg X'11'
=xmt line adr.
A3F2
TA811
8-080
See checks and comments under X652 OX01. Set
X'01' in xmt PDF after this error display. Previous
PDF char of X'AA' should be in process of transmission from SDF now.
OX04
Rcv first char
No L2 irpt occurred. Reg X'13' = rcv line adr and line adr expected
to cause the L2. Reg X'11' = the xmt line adr.
A3L2
TA611
8-490
See checks and comments under X652 OX01. This
is the' 2nd L2 after pgm set scope sync 2.
OX05
Rcv first char
L2 irpt from wrong line adr. Reg X'13' = rcv line adr and the line
expected to cause L2 irpt. Reg X'll' = xmt line adr. Reg X'14'
= line adr that caused L2.
A3L2
TA611
8-300
See checks and comments under X652 OX01.
OX06
Rcv first char
Rcv line PCF not = 7 or LCD changed. Reg X'13'
A3F2
TA811
8-080
Rcv PCF set to 7 (rcv mode) during initial setup and
should have remained at 7. See X652 XXXX for reg
and checks.
OX07
Rcv first char
Rcv data in PDF not = expected rcv data, or ICW bits 0~3 inerror.
A3E2
A3P2
TA311
TA131
8-490
See X652 XXXX for reg. See comments under X652
OXOl for aid in determining the failing pattern.
OX08
Xmt of X'AA' completed
No L2 irpt occurred. Reg X'll'
L2' irpt.
A3L2
TA611
8-310
8-260
Should have just completed the transmission of X'AA'.
The X'01' that was in the PDF should have transferred
to the SDF and be in the process of being xmt. This
is the 3rd L2 irpt after pgm set scope sync 2. See
checks and comments under X652 OX01.
OX09
Xmt of X'AA' completed
L2 irpt from wrong adr. Reg X'll' = xmt line adr and the adr
expected to cause L2 irpt. Reg X'13' = rcv line adr. Reg X'14'
adr that caused the L2 irpt.
A3L2
TA611
8-300
See checks and comments under X652 OX01. After
this error display, the xmt lines PDF is set to X'FE'.
Error Description
Function Tested
= xmt line adr.
Reg X'13'
= rcv
= rcv line adr.
= xmt line adr expected to cause the
= line
Comments
OXOA
Rcv char X'Ol'
No L2 ir'pt occurred. Reg X'13' = rcv line adr expected to cause L2.
A3L2
TA611
8490
Should have rcv the char X'Ol' in the PDF and had a
char-svc L2 irpt. This should be the 4th L2 irpt (2nd
from the rcv line) pgm set scope sync 2. See checks
and comments under X652 OX01.
OXOB
Rcv char X'Ol'
L2 irpt from wrong adr. Reg X'11' = xnit line adr. Reg X'13' = rcv
line adr and the adr expected to cause L2 irpt. Reg X'14' = adr of
line causing L2 irpt.
A3L2
TA611
8-300
See checks and comments under X652 OX01.
OXOC
Rcv char X'01'
Data rcv not X'Ol', orlCW bits 0-3 in error.
A3E2
A3P2
TA311
TA131
8-490
See comments under X652 OX07.
/'
,
.0
'",y
r
\"
..""."\
/..,.c __.",
'-.
.J
"-
'
!
..
\...
/
('"'-
'\
r,,\
"
,
./
./
...
./
r
"
...
../
'....
/
\..
"
.~
" . .,,/
"'\
'-., ./
/" .. "\
\'...
./
"\
...
./
"
"
/
/'-"-",
Ir""-.,
I
I
\.../
j
~
,
..•~
"
.
./
".
/
r
"".-.,.\,
:'
./
(
(
(
(
(
(
(
('
(
(
(
«
f···
(
(
(
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
Error Description
Function Tested
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Plge
-.--
X652
X656
Comment.
_.
OXOD
Xmt of X'01' completed
No L2 irpt occurred. Reg X'11' = xmt line adr expected to cause the
L2 irpt.
A3L2
TA611
B·310
B·260
Should have just completed xmt char X'01'. Char
X'FE' should have transferred from the PDF to the
SDF and be in the process of being xmt. This is the
5th L2 (3rd from xmt line adr) after setting scope
sync 2. See checks and comments under X652 OX01.
OXOE
Xmt of X'01' completed
L2 irpt from wrong adr. Reg X'11' = xmt line adr the L2 was
expected from. Reg X'13' = rcv line adr. Reg X'14' = line adr that
caused L2 irpt.
A3L2
TA611
B·300
See checks and comments under X652 OX01. After
this error, the xmt PCF is set to '0' for turnaround.
OXOF
Rcv 3rd char
No L2 irpt occurred.
A3L2
TA611
B-490
This is the 6th L2 (3rd from rcv line adr) and last
L2 irpt for rcv line. See checks and comments
under X652 OX01.
OX10
Rcv 3rd char
L2 irpt from wrong adr. Reg X'1l' = xmt line adr. Reg X'13' = rcv
line adr and the line expected to cause L2 irpt. Reg X'14' = line adr
causing the L2 irpt.
A3L2
TA6ll
B·300
See checks and comments under X652 OX01.
OXll
Rcv 3rd char
Rcv data in PDF not = to expected data, or ICW bits 0·3 in error.
A3E2
A3P2
TA3ll
TA131
B-490
See comments under X652 OX07 for ICW bits.
OX12
Xmt of X'FE' completed and xmt turnaround.
No L2 irpt occurred. Reg X'11' = xmt line adr expected to cause the
L2 irpt.
A3L2
TA611
B·310
B·260
This is the 7th L2 (4th from the xmt line adr) after
pgm set scope sync 2. Xmt turnaround (PCF = D)
was set after previous L2 for xmt line, so xmt line
should now be turned around to rcv mode.
(PCF = 7).
OX13
Xmt of X'FE' completed and xmt turnaround.
L2 irpt from wrong adr. Reg X'11' = xmt line adr and the adr
expected to cause L2 irpt.Reg X'13' = rcv line adr. Reg X'14' = line
adr that caused the L2 irpt.
A3L2
TA611
B·300
See checks and comments under X652 OX01.
OX14
Xmt turnaround
Xmt line PCF did not change to 7 on turnaround; or xmt SOF did
not set to 0, or LCD is not = 7.
A3F2
A3H2
TA811
TA211
B·080
XXXX
When xmt turnaround is completed, the SDF should
LCD should = 7. See
comments in X652 OX01.
= 000, PCF should = 7, and
S'inc line sets wrap data test. All installed line adr that run in sync mode (!'!ven though they also run in SIS mode and have been already tested in rtn X650) are wrapped two at a time. The first
installed sync line adr is made the rcv line, and the next installed sync line adr is made the xmt line adr. The test is performed on this pair of lines. When the test is completed on this pair of lines,
the lines are reset; the line that was the xmt line is now made the rcv line, and the next installed sync line adr is made the new xmt line. This pair of lines is then wrapped. This stepping through the
lines is continued until the last installed sync line has been the xmt line. Then the first installed line is made the xmt line, and the last installed sync line is made the rcv line; this pair of lines is
wrapped. All the installed sync line sets are wrapped with LCD = C, and then the above procedure is repeated using LCD = D.
A set mode is executed for both the xmt and rcv line adr with ICW bit 27 (diag wrap mode) and ICW bit 29 (sync bit clock) on. Oscillator select bits are O's to select the first oscillator. The priority
bits are set to 3. The set mode is executed before the setting of scope sync 2 as each pair of lines is wrapped. The set mode must complete successfully for the wrap to function; any errors detected
during the set mode are pretest errors, and all start with error code 1 XXX. These error codes are located in "Common Error Stops" following this CSB symptom index. References to L2 irpt in the
following error code displays are the char·svc L2 irpt that o~cur after scope sync 2 is set; they do not include the L2 irpt that occurred for the set modes that occur before scope sync 2.
Z3705GBACSB 1FT SYMPTOM INDEX
1FT CSB 454
Z3705GBA CSB I FT SYMPTOM INDEX
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Routine
Error
Codl
X656
XXXX
SUlpected Card
Location (I)
Error Desorlption
Function Telted
ProgramF EA LD
Malk
Page
FETMM
Pagl
Comments
1FT CSB 456
NOTES:
Note 1: For all error stops in this rtn, the following regs are set up:
Reg X'11' = xmt line adr (as used to set ABAR)
Reg X'13' = rcv line adr (as used to set ABAR)
Reg X'14' (for errors that indicate L2 irpt occurred from wrong adr) contains the line adr,that caused the L2 irpt.
Reg X'14' (for errors that indicate the rcv data is bad or ICW bits 0-7 are in error) contains ICW bits 0-15 from the rcv line ICW obtained by executing input X'44'. ICW bits 8-15 (the PDF)
contain the rcv data. ICW bits 0-7 are check an,d control flags and are always expected to be set as follows:
ICW bit 0 =stop bit check; should be off.
ICW bit 1 = svcreq; should be on.
ICW bit 2 = char overrun/underrun; should be off.
ICW bit 3 = modem check; should be off.
ICW bit 4 = rcv line signal detector; this bit is ignored in this test.
ICW bit 5 = reserved bit; this bit is ignored in this test.
ICW bit 6 = pgm flag.; this bit is ignored in this test.
ICW bit 7 = pad flag; this bit is ignored in this test.
Reg X'16' (for errors that indicate the rcv data is bad) contains the expected ICW bits 0-15 that are being tested against the contents of reg X'14'.
Note 2: Checks to be made on all error stops:
A. Check LCD of failing line adr. If LCD = F, a feedback check has occurred. If the configuration data set (CDS) erroneously indicates a line set is installed that will run in sync mode, a
feedback check will occur.
B. You may use the continue function (except on pretest errors starting with 1) to continue from this error to (1) see if just this line adr is failing, (2) see ifalliine adr in this LI B are failing,
or (3) see if all sync lines are failing. You may get additional error stops on the same line pair being wrapped, so you may have to use the continue function mUltiple times. If only one
line set is failing or a pair of even/odd adr, the line set card is probably bad. If all adr fail in one LIB, the LIB's bit clock control card may be bad, or the terminators may be bad. If all
sync line adr fail, the scanner cards may be bad. If the line adr are the type that run in both sync and SIS mode and if they run successfully in rtn X652, then suspect LCD = Cor
LCD = 0 circuitry or the sync bit clock control line. Refer to the LIB section in Volume 3 (L1Bs and line sets) because card locations vary in location according to LIB types.
The xmt data char are shifted by one data bit position from the rcv data char to generate a predictable irpt sequence. See notes 4 and 6 at the end of this CSB symptom index for more info about
this shifting of xmt data char.
Xmt data - 55
Rcv data -
55
19
19
32
50
AD
7F
FE
80
00
00
01
(when using EBCDIC LCD of C)
(when using EBCDIC LCD of C)
Xmt data - 55
Rcv data -
55
DB
DB
16
50
AD
7F
FE
80
00
00
01
(when using ASCII LCD of D)
(when using ASCII LCD of D).
The rtn is run in the same sequence as that of the following error codes.
)'"
''')
'--
./
OX01
Xmt of 1st PAD completed
No L2 irpt occurred from xmt line adr.
A3L2
TA611
B-310
B-260
1st char-svc L2 irpt after scope sync 2. See X656
XXXX notes 1 and 2 for reg and checks.
OX02
Xmt of 1st PAD completed
L2 irpt not from xmt line adr.
A3L2
TA611
B-300
See X656 XXXX notes 1 and 2 for reg and checks.
OX03
Xmt PCF changes from 8 to 9.
Xmt PCF not = 9, or LCD changed.
A3F2
TA811
B-080
Xmt PCF was set to 8 by pgm during hardware
setup. The scanner hardware should have changed
the PCF to 9 and should now be in process of xmt
2nd pad char. The xmt PDF is set to the 1st SYN
char after this error display. See X656 XXXX
notes 1 and 2 for reg and checks.
OX04
Xmt of 2nd PAD completed
No L2 irpt occurred from xmt line adr.
A3L2
TA611
B-310
B-260
2nd L2 irpt after scope sync 2. See X656 XXXX
notes for reg and checks.
,-
',---
"
,,,-~
~
,--"~v
',---
\" j
!
;'"'\
'--- ./
'\
,
!
'-
/ ' "'
/"\
'---
,/
'-'--- /
',-- . . /
!'
,-,
r
./
"
/'
"
./
/"
'----,./
(\~ ~/
''\
',./
'\
/"'.,
/
/
,,/
if
'--
",/
('
/"'-'-'""-.\
f
(
\,
'---...-/
\,
' '"',
(
(
(
.,'
,
(
(
(
(
(
c
t
(
(
(
(
(
(
(~
(
(
f" ('
(
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Suspected card
Location(s)
Routine
Error
Code
X656
OX05
Xmt of 2nd PAD completed
L2 irpt not from xmt line adr.
A3L2
TA611
8-300
See X656 XXXX notes 1 and 2 for reg and checks.
After this error display, the xmt PDF is set with the
2nd SYN char.
OX06
Xmt of 1st SYN completed
No L2 irpt occurred from xmt line adr.
A3L2
TA611
8-310
8-260
3rd L2 irpt after scope sync 2. See notes 1 and 2 in
X656 XXXX for reg and checks.
OX07
Xmt of 1st SYN completed
L2 irpt not from xmt line adr.
A3L2
TA611
8-300
See X656 XXXX notes 1 and 2 for reg and checks.
After this error display, the xmt PDF is set to char
X'AO' to be xmt next. Should now be in process of
xmt 2nd SYN char.
OX08
Rcv 1st SYN
Rcv line PCF not = 7, or LCD changed.
A3F2
TA811
8-080
Rcv line PCF was set to 5. When the 1st SYN character is rcv and recognized, the hardware should set
the rcv PCF = 7.
Function Tested
Error Description
Program
Malk
FEALD
Page
FETMM
Page
Commentl
Note: This setting of PCF = 7 from PCF = 5 does
not cause a L2 irpt. See notes 1 and 2 in X656
XXXX for reg checks.
OX09
Rcv 2nd SYN
No L2 irpt occurred from rev line adr.
A3L2
TA611
8-310
8-420
4th L2 (1st from the rcv line adr) after scope
sync 2. See ;,otes 1 and 2 in X656 XXXX for reg
and checks.
OXOA
Rcv 2nd SYN
L2 irpt not from rcv line adr.
A3L2
TA611
8-300
See X656 XXXX notes 1 and 2 for reg and checks.
OXOB
Rcv 2nd SYN
Rcv data in PDF not a SYN char, or ICW bits 0-3 in error.
A3E2
A3P2
TA311
TA131
8-420
Rcv data in PDF should = X'32' SYN if LCD = C or
X'16' SYN char if LCD = D. See notes 1 and 2 in
X656 XXXX for reg, ICW bits 0-7, and checks to
make.
OXOC
Xmt of 2nd SYN completed
No L2 irpt occurred for xmt line adr.
A3L2
TA611
8-310
8-260
5th L2 (4th from the xmt line adr) after pgm set
scope sync 2. See notes 1 and 2 in X656 XXXX for
reg and checks.
OXOD
Xmt of 2nd SYN completed
L2 irpt not from xmt line adr.
A3L2
TA611
8-300
See X656 XXXX notes 1 and 2 for reg and checks.
After this error display, the xmt PDF is set to char
X'7F' as the next char to xmt. The char X'50'
should now be in the process of being xmt.
OXOE
Rcv char X'AO'
No L2 irpt occurred from the rcv line adr.
A3L2
TA611
8-310
8-420
6th L2 (2nd from the rcv line adr) after scope
sync 2. See notes 1 and 2 in X656 XXXX for reg
and checks.
OXOF
Rcv char X'AO'
L2 irpt not from rcv line adr.
A3L2
TA611
8-300
See X656 XXX X notes 1 and 2 for reg and checks.
OX10
Rcv char X'AO'
Rcv data in PDF not == X'AO', or ICW bits 0-3 in error.
A3E2
A3P2
TA311
TA131
8-420
See X656 XXXX notes 1 and 2 for reg, ICW
bits 0-7, and checks to make.
OXll
Xmt of X'50' completed
No L2 occurred for xmt line adr.
A3L2
TA611
7th L2 (5th from the xmt line adr). See notes 1 and
2 in X656 XXXX for reg and checks.
OX12
Xmt of X'50' completed
L2 not from xmt line adr.
A3L2
TA611
See X656 XXXX notes 1 and 2 for reg and checks.
After this error display, the xmt PDF is set to X'80'
as the next char to xmt. Should now be in process
of xmt the char X'7F'.
OX13
Rcv char X'FE'
No L2 irpt occurred for rcv line adr.
A3L2
TA611
8-310
8-420
,
8th L2 (3rd from the rcv line adr). See notes 1 and
2 in X656 XXXX for reg and checks to make.
Z3705GBA CSB I FT SYMPTOM INDEX
1FT CSB 458
3705-80 CSB I FT SYMPTOM INDEX - Cont.
~
'\
'-, /
Z3705GBA eSB IFTSVMPTOM INDEX
,Routine
Error
Code
Suspected Card
Location(s)
X666
OX14
Rev char X'FE'
L2 irpt not from rev line adr.
OX16
Rev char X'FE'
Rev data in PDF not = X'FE', or ICW bits 0-3 in error.
OX16
Xmt of X'7F' completed
OX 17
Error Description
Function Tested
Program
fEALD
FETMM
Mask
Pagl
Page
IFTCSB 460
Comment.
A3L2
TA611
8-300
See X656 XXXX notes 1 and 2 for reg and checks.
A3E2
A3P2
TA311
TA131
8420
See X656 XXXX notes 1 and 2 for reg, ICW
bits 0-7, and checks to make.
No L2 occurred for xmt line adr.
A3L2
TA611
9th L2 (6th from the xmt line adr). See notes 1 and
2 in X656 XXXX for reg and checks.
Xmt of X'7F' completed
L2 not from xmt line adr.
A3L2
TA611
See X656 XXXX notes 1 and 2 for reg and checks.
After this error display, the xmt PDF is set to X'OO'
as the next char to xmt. Should now be in the process of xmt X'80'.
OX18
Rcv char X'OO'
No L2 irpt occurred from rcv line adr.
A3L2
TA611
8-310
8420
10th L2 (4th from the rev line adr). See notes 1
and 2 in X656 XXXX for reg and checks to make.
OX19
Rcv char X'OO'
L2 irpt not from rcv line adr.
A3L2
TA611
8-300
See X656 XXXX notes 1 and 2 for reg and checks.
OX1A
Rcv char X'OO'
Rev data in PDF not = X'OO', or ICW bits 0-3 in error.
A3E2
A3P2
TA311
TA131
8420
See X656 XXXX notes 1 and 2 for reg, ICW
bits 0-7, and checks.
OX26
Xmt of X'80' completed
No L2 occurred from xmt line adr.
A3L2
TA611
12th L2 (7th from xmt). See notes 1 and 2 in
X656 XXXX for reg and checks.
OX26
Xmt of X'80' completed
L2 not from xmt line adr.
A3L2
TA611
See X656 XXXX notes 1 and 2 for reg and checks.
After this error display, the xmt PCF is set to X'D'
for xmt turnaround. Should now be in process of
xmt X'OO' as last char to xmt.
OX27
Rev char X'01'
No L2 occurred from rcv line adr.
A3L2
TA611
12th L2 (7th from rev). See notes 1 and 2 in X656
XXXX for reg and checks. Last L2 for rcv.
OX28
Rcv char X'01'
L2 not from rev line adr.
A3L2
TA611
See X656 XXXX notes 1 and 2 for reg and checks.
OX29
Rcv char X'01'
Rev data in PDF not = X'11', or ICW bits 0-3 in error.
A3E2
A3P2
TA311
TA131
See X656 XXXX notes 1 and 2 for reg, I CW
bits 0-7, and checks. After this error display, the
rcv PCF is set to 0, so no further L2 irpt should
occur from the rcv line adr.
OX2A
Xmt of X'OO' completed and xmt turnaround
No L2 occurred from xmt line adr.
A3L2
TA611
13th L2 (10th from xmt) and should be the last L2.
See notes 1 and 2 in X656 XXXX for reg and
checks. At this time, the xmt PCF should have
turned around to PCF = 5.
OX2B
Xmt of X'OO' completed and xmt turnaround
L2 not from xmt line adr.
A3L2
TA611
See X656 XXXX notes 1 and 2 for reg and checks.
PCF should be turned around to PCF = 5.
OX2C
Xmt turnaround
Xmt PCF did not turn around to PCF = 5, or LCD changed.
A3F2
TA811
After previous xmt L2 (see X656 OX26), xmt PCF
was set to X'D' to cause a turnaround. The hardware should have completed the transmission of
the char X'OO' and then setPCF = 5. See notes 1
and 2 in X656 XXXX for reg and checks.
1"'",-
,,.
\
'"
/
./
'\
'--
''-.
/"
,)
'"
j
'-- ./
'--,
.'
f',
,
'-
.
./
"'-- ~/
(
.
'\
",/
"-../
,;:"'\
"\
'-.
./
')
'-- /
"".
;',/
../
'-
,,
./
r
-........
/"'~
" ./
_./
("
(
l/
(
{
(
c
(
(
(
(
(
(
(
(
(.
(
(
(
....
(
(
(
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Suspeeted Card
Location(s)
Routine
Error
Code
X65A
XXXX DLC line sets wrap data test. All installed line sets that will run in DLC mode are wrapped two at a time. The first installed DLC line set is made the rcv line, and the next installed DLC line set is
Error Descriptien
Function TI.tad
Program
Mask
FEALD
Page
FETMM
Page
Comments
made the xmt line. The test is then performed on this pair of lines. When the test is completed on this pair of lines, the lines are reset; the line that was the xmt line is now made the rcv line, and the
next installed DLC line set is made the new xmt line. Then this pair of lines is wrapped. This stepping up through the lines is continued until the last installed DLC line has been made the xmt line.
The first installed line is then made the xmt line, and the last installed DLC line is made the rcv line; this pair of lines is wrapped.
A set mode is done on both the xmt and rcv lines with ICW bit 27 (diag wrap mode) and ICW bit 29 (sync bit clock) both on. Oscillator select bits are a so the first oscillator is selected. The priority
bits are set to 3. The set mode is done before the setting of scope sync 2 as each pair of lines is wrapped. The set mode must be completed successfully for the wrap to function; any errors detected
during set mode are pretest errors and start with error code lXXX. These error codes are in "Common Error Stops" following this CSB symptom index. References to L2 irpt in the following error
codes are the char-svc L2 irpt that occur after scope sync 2 is set; they do not include L2 irpt that occurred for set mode before scope sync 2.
NOTES:
Note 1: On all error stops in this rtn, the following reg are set up:
Reg X'11' = xmt line set adr (as used to set ABAR)
Reg X'13' = rcv line set adr (as used to set ABAR)
Reg X~14' (for errors that indicate no L2 occurred or L2 from wrong adr)
= line adr that caused the L2, or =0000 if no
L2 occurred.
Reg X'14' (for errors that indicate rcv data is bad or ICW bits 0-3 or 5 are in error) = what was obtained by an input X'44' from the rcv line ICW (bits 0-15). ICW bits 8-15 are the PDF and
should contain the rcv data. ICW bits 0-7 are error and control flags and are expected to be set as follows:
ICW bit a = stop bit check; should be off.
ICW bit 1 = svc req; should be on.
ICW bit 2 =char overrun; should be off except when misaligned flag char is detected.
ICW bit 3 = modem check; should be off.
ICW bit 4 = rcv line signal detect; this bit is ignored in this test.
ICW bit 5 = DLC flag detect/disable stuffer remember; on when a flag char is detected.
ICW bit 6 = pgm flag; this bit is ignored.
ICW bit 7 = PAD flag/disable stuffer bit; on only when a flag or pad char is set into the PDF for the xmt line adr. This bit is ignored on the rcv line adr.
Reg X'14' (for errors that indicate the LCD or PCF is bad) contains the LCD in byte a bits 0-3 and the PCF in byte a bits 4-7.
Reg X'16' (for errors that indicate rcv data is bad) contains the expected ICW bits 0-15 that are being tested against the contents of reg X'14', except bits 4,6, and 7 are ignored.
Note 2: Checks to be made on all error stops:
A. Check LCD of failing line set. If LCD = F, a feedback check has occurred. If the CDS indicates a line set that will run in sync mode is installed but this is not the case, a feedback check
will occur.
B. Use the continue function (except on pretest errors starting with 1) to continue from the error to see if just this line set is failing, if all line sets in this LIB are failing, or if all DLC lines
are failing. Multiple error stops on the same pair of wrapped lines may occur so the continue function may have to be used many times. If only one line set is failing or a pair of even/odd
adr, the line set card is probably bad. If all adr fail in one LIB, the LIB's bit clock control card or terminators may be bad. If all OLC line sets fail, the communication scanner cards may
be bad. If the line sets are the type that will run also in sync and SIS mode and if they run successfully in rtn X652 and X656, then suspect the LCD or DLC circuitry or sync bit clock
control.
Note 3: The xmt char are offset by 1 data bit to cause rcv data char to be offset by 1 data bit from,xmt char. See notes 4 and 6 following this CSB symptom index for more info.
Xmt data - AA
Rcv data -
2A
3F
flag
50
AO
7F
FE
00
00
All installed DLC line sets are tested in 8-bit mode (LCD
7F
idle
=9).
The rtn is run in the same sequence as that of the following error codes.
OXOl
Xmt of 1st PAD char (X'AA') completed
No L2, or L2 not from xmt line adr.
A3L2
TA611
1st L2 char-svc irpt after pgm set scope sync 2. See
X65A XXXX notes 1 and 2 for reg and checks.
OX02
Xmt of 1st PAD char (X'AA') completed
Xmt PCF not = 9, or LCD changed.
A3F2
TA811
Xmt PCF was set to 8 by pgm in hardware setup.
Communication scanner hardware should have
changed it to 9. Should not be in process of xmt
2nd PAD. The xmt PDF is set to an offsetflag char
after this error. See X65A XXXX notes.
Z3705GBA CSB I FT SYMPTOM INDEX
1FT CSB 462
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Z3705GBA eSB I FT SYMPTOM INDEX
Routine
Error
Code
X65A
OX03
Xmt of 2nd PAD char (X'2A') completed
No L2,or L2 not from xmt line adr.
A3L2
TA611
2nd L2after scope sync 2. See X65A XXXX for,
reg and checks. After this error display, the xmt
PDF is set with X'3F' flag char.
OX04
Rcv flag char X'7E'
No L2, or L2 not from xmt line adr.
A3L2
TA611
3rd L2 after scope sync 2. See X65A XXXX for reg
and checks.
OX05
Rcv flag char X'7E'
Rcv LCD not = 9, or PCF not = 6.
A3G2
TB021
Receiving a flag char should change PCF to 6.
OX06
Rcv flag char
ICW bits 0·3 or 5 are in error.
A3G2
TB021
ICW bit 5 should be on; bits 0·3 should be off. Reg
X'14' = ICW bits 0·15.
OX07
Xmt of flag char (X'3F') completed
No L2, or L2 not from xmtline adr.
A3L2
TA611
4th L2 after scope sync 2. See X65A XXXX for reg
and checks.
OX OS
Rcv data char 'AO'
No L2, or L2 not from rcv line adr.
A3L2
TA611
5th L2 after scope sync 2. See X65A XXXX for reg
and checks.
OX09
Rcv data char 'AO'
The rcv LCD was not = 9, or PCF not = 7.
A3F2
TA811
Reg X'14' contains LCD in bits 0-3 and PCF in
bits 4·7.
OXOA
Rcv data char 'AO'
The rcv data not = X'AO', or ICW bits 0-3 or 5 are in error.
A3E2
A3P2
TA311
TA121
ICW bit 1 should be on. ICW bits 0, 2, 3, and 5
should be off.
OXOB
Xmt of data char '50' completed
No L2, or L2 not from xmt line adr.
A3L2
TA611
6th L2 after scope sync 2. See X65A XXXX for reg
and checks.
OXOC
Rcv data char 'FE'
No L2, or L2 not from rcv line adr.
A3L2
TA611
7th L2 after scope sync 2. See X65A XXXX for reg
and checks.
OXOD
Rcv data char 'FE'
The rcv data not = X'FE', or ICW bits 0-3 or 5 are in error.
A3E2
A3P2
TA311
TA121
See X65A XXXX for regs_
OXOE
Xmt of data char '7F' completed
No L2, or L2 not from xmt line adr.
A3L2
TA611
8th L2. See X65A XXXX for reg and checks.
OXOF
Rev data char '00'
No L2, or L2 not from rev line adr.
A3L2
TA611
9th L2 after scope sync 2. See X65A XXXX for reg
and checks.
OX10
Rev data char X'OO'
The rev data not = X'OO', or ICW bits 0-3 or 5 are in error.
A3E2
A3P2
TA311
TA121
See X65A XXXX for regs.
OX 11
Rcv idle char
No L2, or L2 not from rcv line adr.
A3L2
TA611
10th L2 after scope sync 2.
OX12
Rcv idle char
The rev LCD not = 9, or PCF not = 7.
A3F2
TA811
Reg X'14' byte 0 = LCD in bits 0-3 and PCF in
bits 4-7.
OX13
Rev idle char
lew bits 0-3 or 5 are in error.
A3G2
TB011
ICW bit 0 should be on. ICW bits 1, 2, 3, and 5
should be off.
XXX~
OLC LCD a, A, 8 Test. The first two installed lines that will run in DLC mode will be wrapped and tested using the LCDs for 5, 6, and 7·bit char. The error stop checks to be made and the reg contents to check are as indicated in X65A XXXX.
X65B
Suspected Card
Looation(a)
Error Desorlptlon
Function Tested
Progrlm
Misk
1FT CSB 464
PEALD
PETMM
Page
Page
Comments
The xmt char are offset by 1 bit position to cause rev data char to be offset by 1 data bit position from the xmt char. See notes 4 and 6 following this symptom CSB index for more info.
=
2A
3F
flag
00
00
OF
1E
3F
1E
3F
flag
=
2A
3F
flag
00
00
1F
3E
3F
3E
3F
flag
=
2A
3F
flag
00
00
3F
7E
3F
7E
3F
flag
Xmt Data· 5 bit (LCD B): AA
Rcv Data· 5 bit (LCD" B):
Xmt Data - 6 bit (LCD A): AA
Rcv Data ·6 bit (LCD = A):
Xmt Data - 7 bit (LCD 8): AA
Rev Data - 7 bit (LCD = 8):
The rtn is run in the same sequence as that of the following error codes-first in 5-bit mode, then in 6-bit mode, and finally in 7·bit mode.
/
"
j
'~
,
I
I'
f'
'''\
"-
'---
./
r'-"\
'-
./
/'
/,""'"
~,
'--
/)
"
./
'--
,I
'---
./
'--_/
'---
.
r'-',
./
/
-----
,- '\,
~
/
"
./
'------./
~ ./
'---
./
'
. ""
./
'--
'\
( ''\
./
~j
,r">\
J
~j
;'
",
, ., -"
r
..
'/-",
,~-
I
~
./
'---./
-- "
(
(
l
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
f
(
(
(
(
3705-80 CSB I FT SYMPTOM INDEX - C~nt.
Routine
Error
Code
X65B
OX01
Xmt of 1st PAD char completed
No L2, or L2 not from xmt line adr.
A3L2
TA611
1st L2 char-svc irpt after setting scope sync 2. See
XS5A XXX X for reg and checks.
OX02
Xmt of 1st PAD char completed
The xmt PCF not = 9.
A3F2
TA811
Xmt PCF was set to 8 by pgm in hardware setup.
The communication scanner hardware should have
changed it to 9.
OX03
Xmt of 2nd PAD char completed
No L2, or L2 was not from xmt line adr.
A3L2
TA611
2nd L2 after scope sync 2. See X65A XXXX for
reg and checks.
OX04
Rcv flag char
No L2, or L2 not from rcv line adr.
A3L2
TAS11
3rd L2 after scope sync 2. See X65A XXXX for
reg and checks.
OX05
Rcv flag char
Rcv LCD not = 9, or PCF not = 6 for rcv line adr.
A3G2
A3P2
TA111
TA121
See X65A XXXX for reg and checks.
OX06
Rcv flag char
ICW bits 0-3 or 5 are in error.
A3G2
TB021
ICW bit 2 should be on (flag detect). ICW bits 0,
1,3, and 5 should be off.
OX07
Xmt of flag char completed
No L2, or L2 not from xmt line adr.
A3L2
TAS11
4th L2 after scope sync 2. See X65A XXXX for reg
and checks.
OX08
Rcv data char X'OO'
No L2, or L2 not from rcv line adr.
A3L2
TAS11
5th L2 after scope sync 2. See XS5A XXXX for reg
and checks.
OX09
Rcv data char X'OO'
The LCD changed, or the PCF is not = 7.
A3F2
TA811
See XS5A XXXX note 1 fC!r reg and checks. The
LCD was previously set for either 5, S, or 7-bit
mode. Reg X'1S' byte 0 contains expected LCD
and PCF.
OXOA
Rcv data char X'OO'
The rcv data is not = X'OO', or ICW bits 0-3 or 5 are in error.
A3E2
A3P2
TA311
TA121
ICW bit 1 should be on. ICW bits 0, 2, 3, and 5
should be off. See XS5A XXXX for reg and checks.
OXOB
Xmt data char X'OO' completely xmt
No L2, or L2 not from xmt line adr.
A3L2
TAS11
Sth L2 after scope sync 2. See X65A XXXX for reg
and checks. After this error display, the PDF is set
with data char X'3F', the 'disable stuffer' bit is set
on, the LCD is set to 9, and the PCF is set to D.
This should cause the xmt line to send constant
DLC idle char without causing any more L2 irpt.
OXOC
Rcv data char X'1 E', X'3E', or X'7E'
L2 irpt did not occur, or L2 not from the rcv line adr.
A3L2
TAS11
7th L2 after scope sync 2. See XS5A XXX X for
reg and checks.
OXOD
Rcv data char X'1 E', X'3E', or X'7E'
The rcv data char not as expected (X'1 F', X'3F', or X'7F'), or ICW
bits 0-3 or 5 are in error.
A3P2
A3N2
TA111
TA511
See XS5A XXX X note 1 for reg and checks. Reg
X'16' = the expected ICW bits 0 through 15. ICW
bit 1 should be on; bits 0, 2, 3, and 5 should be off.
OXOE
Rcv data char X'1 E', X'3E', or X'7E'
No L2, or L2 not from the rcv line adr.
A3L2
TA611
8th L2. This is the 2nd time this char is rcv. This
is actually a flag char, but due to char boundary
alignment on the 5, 6, or 7-bit chars, this is detected
as a data char.
OXOF
Rcv data char X'1 E', X'3E', or X'7E'
Rcv PCF not = 7, or the LCD changed.
A3F2
TA811
LCD and PCF should not have changed. See XS5A
XXXX for reg and checks.
OX10
Rcv data char X'1 E', X'3E', or X'7E'
The rcv data char not as expected (X'1 F', X'3F', or X'7F'), or ICW
bits 0-3 or 5 are in error.
A3P2
A3N2
TA111
TA511
lSee XS5A XXXX note 1 for reg and checks. Reg
X'1S' contains the expected ICW bits 0 through 15.
ICW bit 1 should be on; bits 0, 2, 3, and 5 should
be off.
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
Z3705GBA CSB I FT SYMPTOM INDEX
1FT CSB 466
(
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Z3705GBA CSB IJ='T SYMPTOM INDEX
Suspected Card
Location(s)
Error
Program
Mask
FEALD
Page
FETMM
Page
1FT CSB 468
Routln.
Cod.
X65B
OX11
Rcv flag char
L2 irpt did not occur, or L2 was not from the rcv line adr.
A3L2
TA611
9th L2 after scope sync 2. See X65A XXXX for
reg and checks.
OX12
Rcv flag char
The LCD not = 9, orPCF not = 6 for rcv line adr.
A3F2
TA811
See X65A XXXX for reg and checks.
OX13
Rcv flag char
ICW bits 0-3 or 5 are in error.
A3G2
TBOll
ICW bits 0, 1, and 3 should be off. ICW bits 2 and 5
(DLC flag detect) should be on. See X65A XXXX.
XXXX
DLC data wrap in NRZI mode. X65A XXXX is valid for this rtn except for note 3. All DLC lines in this rtn are tested in 8-bit mode.
X660
Error Description
Function Tested
Comments
Xmt data: AA
2A
3F
01
For clock correction.
For clock correction.
A shifted flag char sent with the 'disable stuffer' bit on.
After the low order bit (a 1 bit) is sent from this char, the xmt SDF is cleared to a's, and the NRZI bit is set in the xmt ICW by doing an output X'46' with data of X'8000'. The
'last line state' bit is also set on when the 1 bit is being xmt. From this point, all a bits are serialized out of the SDF; but due to the NRZI circuits, alternate data bits should
be xmt.
00 See comments under the 01 character.
00 See comments under the 01 character.
00 See comments under the 01 character.
Rcv data:
Flag recognized from the xmt X'3F' plus the extra 1 bit.
AA .Alternate data bits rcv. Note that the NRZI bit is not set on for the rcv line adr.
AA Alternate data bits rcv.
AA Alternate data bits rcv.
AA Alternate data bits rcv.
AA Alternate data bits rcv.
This rtn tests ability of communication scanner to xmt data in NRZI mode. The xmt and rcv char are offset to generate a predictable irpfsequence. See notes 4 and 6 following this CSB symptom
index for reason for this offset.
OX01
Xmt of 1st char completed
No L2 character svc irpt occurred or L2 was not from the xmt
line adr.
A3L2
TA611
First character svc L2 after pgm set scope sync 2.
See X65A XXXX for reg and other checks.
OX02
Xmt of 1st char completed
The xmt PCF not = 9 or LCD not = 9.
A3F2
TA811
The PCF was set to 8 by the pgm during setup and
should have been changed to 9 by CS.
OX03
Xmt of 2nd char completed
No L2 or L2 not from xmt line adr.
A3L2
TA611
2nd L2 char-svc irpt after pgm set scope sync 2. See
X65A XXX X for reg and checks.
OX04
Rcv flag char
No L2 or L2 not from rcv line adr.
A3L2
TA611
3rd L2 char-svc irpt after pgm set scope sync 2. See
X65A XXXX for reg and checks.
OX05
Rcv flag char
Rcv LCD not = 9 or PCF not = 6.
A3P2
A3F2
TAlll
TA811
Reg X'14' byte 0
OX06
Rcv flag char
ICW bits 0-3 or 5 are in error.
A3G2,
TBOll
ICW bits 2 (char overrun) and ICW bit 5 (flag detect)
should be on. Bits 0, 1, and 3 should be off.
OX07
Xmt of char X'3F' completed
No L2 irpt occurred, or L2 was not frol1l the xmt line adr.
A3L2
TA611
4th L2 char~svc irpt after pgm set scope sync 2. See
X65A XXXX for reg and checks.
OX08
Wait for xmt or rcv line adr to cause a L2 irpt
No L2 irpt occurred from either xmt or rcv line adr.
A3L2
TA611
OX09
Rcv data char X'AA'
L2 irpt not from rcv line adr.
A3L2
TA611
OXOA
Rcv data char X'AA'
Rcv LCD not = 9, or PCF not = 7.
A3P2
A3F2
TA111
TA811
OXOB
Rcv data char X'AA'
Rcv data not = X'AA', or ICW bits 0-3 or 5 are in error.
A3G2
A3N2
TB021
TA511
\
-
...~
'"
j
"'-
/
f
,
i~
,--y
/'
''\
",-.J
;'~,
(~
\.
,/
\~/
' ...../
".
,~
j
"
.
,,J
(
'",-../
'--
''\
j
"...
"1
./
'\\
".
./
=irpt Iineadr.
Reg X'14' byte 0 = LCD and PCF.
Reg X'14'
Reg X'14' byte 1 = PDF data; byte 0 = ICW bits 0-7.
ICW bit 1 should be on. ICW bits 0,2, 3, and 5
should be off.
("'\
j
= LCD and PCF.
(
"j
""
(
".,
r'~
"J
('l
'--.-/
'
.. ../
~------.
-
~-~
--.----~
L
(
l
.
~
(
(
(
(
(
(
(
(
(~'
('
(
(
(
(-
(-
f. (:
{-
(
.(-
C
f,~
(
('
(--~
'-.'
(
(
f'
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Routine
X660
X662
Error
Code
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
OXOC
Wait for xmt or rcv line adr to cause a L2 irpt.
No L2 irpt occurred from either xmt or rcv line adr.
A3L2
TA6ll
OXOD
Rcv data char X'AA'
The L2 irpt not from rcv line adr.
A3L2
TA6ll
OXOE
Rcv data char X'AA'
Rcv LCD not = 9, or PCF not = 7.
A3P2
A3F2
TAlll
TAB11
OXOF
Rcv data char X'AA'
Rcv data not = X'AA', or ICW bits 0-3 or 5 are in error.
A3G2
A3E2
A3P2
TB021
TA3ll
TA5ll
OX10
Wait for xmt or rcv line adr to cause a L2 irpt.
No L2 irpt occurred from either xmt or rcv line adr.
A3L2
TA6ll
OX11
Rcv data char X'AA'
L2 not from rcv line adr.
A3L2
TA6ll
Reg X'14' = irpt line adr.
OX12
Rcv data char X'AA'
Rcv LCD not = 9, or PCF not = 7.
A3P2
A3F2
TAlll
TABll
Reg X'14' byte 0
OX13
Rcv data char X'AA'
Rcv data not = X'AA', or ICW bits 0-3 or 5 are in error.
A3E2
A3P2
TA511
TA12l
Reg X'14' byte 1 = rcv data from PDF; byte 0
= ICW bits 0-7. ICW bit 1 should be on. ICW
bits 0, 2, 3, and 5 should be off.
OX14
Wait for xmt or rcv line adr to cause a L2 irpt.
No L2 irpt occurred from either the xmt or rev line adr.
A3L2
TA6ll
OX15
Rcv data char X'AA'
L2 not from rcv line adr.
A3L2
TA6ll
Reg X'14' = irpt line adr.
OX16
Rcv data char X'AA'-
Rcv LCD not = 9, or PCF not = 7.
A3P2
A3F2
TAlll
TABll
Reg X'14' byte 0
OX17
Rcv data char X'AA'
Rcv data not = X'AA', or ICW bits 0-3 or 5 are in error.
A3E2
A3P2
TA5ll
TA12l
Reg X'14' byte 1 = PDF data. ICW bit 1 should
be on. ICW bits 0, 2, 3, and 5 should not be on.
OX18
Wait for xmt or rcv line adr to cause L2 irpt.
No L2 irpt occurred from either the xmt or rcv line adr.
A3L2
TA6ll
See X660 XXXX for reg and checks to be made.
OX19
Rcv data char X'AA'
L2 not from rcv line adr.
A3L2
TA611
Reg X'14' = irpt line adr.
OX1A
Rcv data char X'AA'
Rcv data not = 9, or PCF not = 7.
A3P2
A3F2
TAll1
TAB11
Reg X'14' byte 0
OX1B
Rcv data char X'AA'
Rcv data not = X'AA', or ICW bits 0-3 or 5 are in error.
A3G2
A3N2
TB02l
TA5l1
Reg X'14' byte 1 = rcv data (from PDF). ICW bit 1
(svc-req) should be on. Bits 0, 2, 3, and 5 should
be off.
OX30
Xmt of data char X'OO' complete.
The xmt LCD not = 9, or PCF not = 9.
A3F2
TABll
Reg X'14' byte 0 = LCD and PCF. This error is in
a subrtn common to aI/ xmt irpt after initial xmt
of X'OO'.
XXXX
Sync monitor test - When in sync monitor state (LCD = 9, PCF = 4 or 5), the scanner is sampling for an EBCDIC SYN char, an ASCII SYN char, or a DLC flag char. This rtn tests to ensure
(1) that when an EBCDIC SYN char is detected in the rcv data stream, the scanner sets the LCD to X'C' and the PCF to X'7' and (2) that when an ASCII SYN char is detected in the rcv data steam,
the scanner sets the LCD to X'D' and the PCF to X'7'. The first installed line set pair that will run in DLC mode is wrapped. The set mode is done before setting the scope sync 2 as the pair of lines
is wrapped. Any errors detected during set mode are pretest errors and start with error code lXXX. These error codes are in "Common Error Stops" fol/owing this CSB symptom index.
= irpt line adr.
Reg X'14' byte 0 = LCD and PCF.
Reg X'14'
Reg X'14' byte 1 = PDF data; byte 0 = ICW bits 0-7.
ICW bit 1 should be on. ICW bits 0, 2, 3, and 5
should be off.
= LCD and PCF.
= LCD and PCF.
= LCD and PCF.
Z3705GBA CSB I FT SYMPTOM INDEX
1FT CSB 470
(
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
Z3705GBA CSB 1FT SYMPTOM INDEX
SUlpected Card
Locatlon(s)
Error Delcrlptlon
Function Telted
Program
Malk
FEALD
Page
FETMM
Page
1FT CSB 472
Comments
NOTES:
X662
Note 1: On all error stops in this rtn, the following reg are set up:
Reg X'11' = xmt line set adr
Reg X'13' = rcv line set adr
Reg X'14' (for errors that indicate rcv data is bad or ICW bits 0-3 or 5 are in error) = what was obtained by an input X'44' from the rcv line ICW bits 8-15 are the PDF and contain the rcv
data. ICW bits 0-7 are error and control flags and are defined as follows:
ICW bit 0 =stop bit check/DLC idle detect.
ICW bit 1 = svc req.
ICW bit 2 =char overrun.
ICW bit 3 = modem check.
ICW bit 4 = rcv line signal detect; this bit is ignored in this test.
ICW bit 5 = DLC flag detect/disable stuffer remember.
ICW bit 6 = pgm flag; this bit is ignored in this test.
ICW bit 7 = PAD flag/disable stuffer; this bit is ignored on the rcv data ICW bits 0-15 testing.
/
Reg X'14' (for errors that indicate the LCD or PCF is bad) = the LCD in byte 0 bits 0-3, and PCF in byte 0 bits 4-7.
The line is tested in 8-bit mode. The xmt char are offset from the rcv char. See notes 4 and.6 following this CSB symptom index for the reason for this offset.
Xmt data
Rcv data
AA
2A
19
19
32
OB
OB
16
OX01
Xmt of 1st char X'AA' completed
No L2 char-svc irpt occurred from xmt line, or L2 irpt occurred but
not from xmt line adr.
A3L2
TA611
1st L2 irpt after scope sync 2. Reg X'14' = 00 if no
L2 occurred; Reg X'14' = irpt adr in error. Reg
Reg X'11' = xmt line adr.
OX02
Xmt of 1st char X'AA' completed
Xmt PCF not = 9, or LCD not = 9.
A3F2
TA811
After xmt initial, the scanner should have changed
PCF to 9.
OX03
Xmt of 2nd char X'2A' completed
No L2 char-svc irpt occurred from xmt line, or L2 irpt occurred but
not from xmt line.
A3L2
TA611
2nd L2irpt after scope sync 2. See comments for
X6620X01.
OX04
Xmt of 1st EBCDIC SYN char X'19' completed
No L2 irpt, or L2 irpt not from xmt adr.
A3L2
TA611
3rd L2 irpt after scope sync 2. See comments for
X6620X01.
OX05
OX06
Xmt of 1st EBCDIC SYN char X'19' completed
Xmt PCF not = 9, or LCD not = 9.
A3F2
TA811
Reg X'14' byte 0 = actual xmt LCD and PCF.
Rcv EBCDIC SYN char X'32'
No L2 irpt from rcv line adr, or irpt occurred from wrong line adr.
A3L2
TA611
Reg X'14' = 0000 if no L2 occurred; else reg X'14'
Reg X'13' = rcv line
adr.
= line adr of ICW irpt in error.
~\
,
)
.~
"
/
I
OX07
Rcv EBCDIC SYN char X'32'
Rcv LCD not = C, or PCF not = 7.
A3F2
TA261
Reg X'14' byte 0 = LCD and PCF. The communication scanner hardware should change LCD to X'C'
when a EBCDIC SYN char is rcv.
OX08
Rcv EBCDIC SYN char X'32'
ICW bitS 0-3 are in error, or data rcv in PDF is not = to X'32'.
A3E2
A3P2
TA511
TA121
ICW bit 1 (svc-req) should be on; and ICW bits 0, 2,
and 3 should be off. See X662 XXXX note 1.
OX09
Xmt of 2nd EBCDIC SYN char X'19' completed
No L2 irpt occurred from xmt line, or irpt occurred from wrong
line adr.
A3L2
TA611
See comment for X662 OX01.
OXOA
Xmt of 1st ASCII SYN char X'OB' completed
No L2 irpt occurred from xmt line, or irpt occurred from wrong
line adr.
A3L2
TA611
See comment for X662 OX01.
OXOB
Xmt of 1st ASCIISYN char X'OB' completed.
Xmt LCD not = 9, or PCF not = 9.
A3F2
TAB11
Reg X'14' byte 0 contains actual LCD and PCF.
OXOC
Rcv ASCII SYN char X'16'
No L2 irpt occurred from rcv line, or irpt occurred from wrong
line adr.
A3L2
TA611
See comment for X662 OX06.
(
\.
."
'1
0
''\
".
I
/
.f"'\
I
\., j
.r"'l
~
'"j
"--~/
.~
\..
;/
,
./
,,_../
',,_/
(
......
'
\.
I
/
r'·
'-.
.~
'..
j
f""l
'--../
/~
(~
',,--./
')
~./
.~
r~
.J
.j
r"
'-...,-
/
/
("'~
.0
\:"-.JJ
C)
("\
'0
""/'
--------~--~-
(-/ (
l,'
(
(/ (
(
(
(
(:
(
(
(-
f"
(' (
f.
(
(
(
(
(-
{
(
{' (-
(:~' (
f.'
(
(
(
(
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
X662
OXOD
Rcv ASCII SYN char X'16'
Rcv LCD not = 0, or PCF not = 7.
A3F2
TA261
Reg X'14' byte 0 = LCD and PCF. The communication scanner hardware should change LCD to 0
when ASCII SYN char is rcv.
OXOE
Rev ASCII SYN char X'16'
Rcv line ICW bits 0-3 are in error, or the rcv data char in the PDF is
not = to X'16'.
A3N2
TA511
ICW bit 1 (svc-req) should be on. ICW bits 0, 2, and
3 should be off. See X662 XXXX note 1.
Function Tilted
Error Description
Suspected Card
Locatlon(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
Z3705GBA CSB 1FT SYMPTOM INDEX
1FT CSB 474
(.
This page intentionally left blank
/
\
,
~)
("
'--
0\,j)
(' ~
\ '...... __ / I
('-""""
'--.
I
./
'--
'---.
..
(:-"
'1
/
',--
./
"
./
\
./
r~
("
',,_/
j
\,.j
r'~
~
,;,~
'.
'-----./
,E'~
\ ./
"\
'--, .. j
'-._j
('\
\
"
r "'\
'---j
;"'-"
I
'..,J
----
---
(--' (
,
.-
l:'
(
(
(
(
{:
--~~--
(
(
(
(
(
c-'
--
(
(
«
(
(
(
... - -
(
{
(-
f
(
(
(,\ {-
(--"
(----
./
(
(
(
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Routine
Error
Code
X666
XXXX
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALO
Page
FETMM
Page
Comments
Stop bit' error test for all SIS lines. All SIS line adr are tested to see if a stop bit check can be detected. The lines are used in pairs with one line made the rcv line. Thi'j is the line that should detect
the stop bit check. The rcv line is tested with LCDs of 0,2,4,5,6, and 7. The xmt line always is set up with LCD = 7. A PAD char of X'03' is xmt, followed by the char X'02'. When the X'02' is
being xmt, the pgm loops, checking xmt SDF bits 8 and 9 for 00; then the xmt SDF is set to X'180'. This should cause the xmt line to send extra bits of 0 and cause the rcv line to get a stop bit
check. The sequence of operation in this rtn is:
a.
b.
c.
d.
e.
f.
g.
h.
i.
Reset scanner.
Enable scanner.
Set display bit in the rcv line's ICW.
Set rcv line adr in rcv mode.
Set mode on the xmt line adr.
Set xmt line SDF = X'03' (2 bit times of PAD).
Setxmt line PDF = X'02'.
Set xmt PCF = 8.
Set scope sync 2.
j. Wait for L2 irpt on xmt PAD char completed.
k. Wait for xmt SDF bits 8-9 = O.
I. Set xmt SDF = X'180'.
m. Wait for rcv line adr char-svc L2 irpt.
n. Check that 'stop bit check' bit is on in rcv line's ICW.
o. Reset the 'stop bit check' bit.
p. Check that the bit is reset.
The above sequence is done for LCDs 0, 2, 3,4,6, and 7 on the rcv line adr; then the next SIS line is set up, and the whole test is run again. All lines use priority 3 and oscillator select O.
NOTES:
Note 1: The following reg are set up for all errors displayed in this rtn:
Reg X'11' = xmt line adr
Reg X'13' = rcv line adr; the adr that should detect the stop bit errors
Reg X '16' = the LCD being tested on the rcv line (in byte 1, bits 0-3)
Note 2: On all error stops, the LCDs should be checked for LCD = F (feedback check). You can use the continue function (except for pretest errors during the set modes) to continue from the
error stop to see if (1) only one line set, the whole LI B, or all SIS line sets in the scanner are failing, and (2) if the failure is for one LCD setting or all LCD settings. If only one line or one pair of
lines is failing, suspect the line set card as being bad. If all lines on a LI B fail, check LI B cards and terminators. If all lines on a scanner fail or if only one LCD setting fails, suspect the scanner cards.
Refer to LIB card positions in the LIB section in Volume 3 (LiBs and line sets) because card locations vary according to LIB type. Other possible failures are that oscillator 0 is failing or oscillator
select is not working.
OX01
Xmt of PAD completed
No L2 irpt occurred.
A3L2
TA611
Reg X'11' = xmt line adr expected to cause L2 irpt.
See X666 XXXX notes 1 and 2 for other reg and
checks to be made.
OX02
Xmt of PAD completed
L2 irpt not from xmt line adr.
A3L2
TA611
Reg X'11' = xmt line adr expected to cause L2 irpt.
Reg X'14' = line adr that caused the L2 irpt. See
X666 XXXX notes 1 and 2 for other reg and checks
to be made.
Z3706GCACSB 1FT SYMPTOM INDEX
1FT CSB 500
(
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Routine
X666
X668
Error
Code
Z3705GCA CSB I FT SYMPTOM INDEX
Suspected Card
Looltlon(s)
Error Olloription
Function Tilted
Progrlm
Milk
FEALO
Pig.
FETMM
Page
I FTCSB 502
Comments
OX03
Shifting of xmt SDF
Xmt SDF bits 8 and 9 did not get O's shifted into them within
200 ms.
A3L2
TA611
B480
See X666 XXXX notes 1 and 2 for reg and checks.
If this failure occurs, suggest you run rtn X650 and
X652 to test diag wrap.
OX04
Rcv char
No L2 irpt occurred.
A3L2
TA611
B-310
B-260
Reg X'13' =rcv line adr expected to cause L2 irpt.
See X666 XXXX notes 1 and 2 for other reg and
checks.
OX05
Rcv char
L2 irpt not from rcv line adr.
A3L2
TA611
B-300
Reg X'13' =rcv line adr expected to cause the
L2 irpt. Reg X'14' = line adr that caused the L2
irpt. See X666 XXXX notes 1 and 2 for other reg
and checks.
OX06
'Stop bit check' bit on
Stop bit check (lCW bit 0) not on.
A3P2
TA121
B-140
Stop bit check should be on in the rcv line ICW.
See X666 XXX X notes 1 and 2 for reg and checks.
OX07
'Stop bit check' bit off
Stop bit check did not reset.
A3P2
TA121
B-180
Pgm attempted to reset the stop bit check, but it
did not reset. See X666 XXX X notes 1 and 2 for
reg and checks.
XXXX
Pad flag test for SIS lines. Check that while the PAD flag (lCW bit 7) is on and the xmt PDF = X'FF', no char are rcv. Then turn the PAD flag off and check that char can be rcv. A pair of lines are
used in each run of the test, with one line being the rcv line and the other the xmt line. All SIS lines are tested with LCD = 2, priority 3, and oscillator select O. A set mode is executed for both the
rcv and the xmt lines. The rcv line is set in rcv mode, the xmt SDF is set to X'FF', the xmt PDF is set to X'05', the xmt PCF is set to X'8', and scope sync 2 is set. The rest of the test runs in the
same sequence as that of the following error codes. As each test is finished, the next SIS line adr is used with the previous xmt line, and the test is run again. This continues until all installed SIS
lines in the scanner under test are run in both xmt and rcv modes.
NOTES:
Note 1: The following reg are set up for error displays:
Reg
Reg
Reg
Reg
Reg
X'11' = xmt line (ICW) adr as used to set ABAR.
X'13' = rcv line (leW) adr as used to set ABAR.
X'14' (for errors indicating L2 irpt is from wrong adr) = the line adr of the line that caused the L2 irpt.
X'14' (for unexpected rcv data in the PDF or for errors that indicate ICW bits 0-7 are in error) contains ICW bits 0-15 from the rcv line ICW obtained by an input X'44'.
X'16' = expected rcv lines lew bits 0-15 for rcv data PDF errors, or lew bits 0-7 error. The rcv ICW bits 8-15 are the PDF; byte 1 of both reg X'14' and reg X'16' should always be
equal on all rcv data tests. ICW bits 0-7 are normally expected to = X'4n' in reg X'14', where n = OaF ('svc req' ,bit on, 'rev line signal detect' bit ignored, all other bits off). For
telegraph LIBs, ICW bits 0-7 are not checked since an echo check may occur, setting modem check if no external current loop is present.
Note 2: For all error stops, the LCDs should be examined for a feedback check: LCD =X'F'. You can use the continue function (except for set mode pretest errors) to see if only this line adr, a
pair of line adr, all lines in a LIB, or all lines in the scanner are failing. If only one line or a pair of lines is failing, suspect the line set card. If all lines in a LIB are failing, suspect the LIB bit clock
control card or line terminators. If all lines in the scanner fail, suspect scanner cards or first oscillator card. See LIB card positions in the LIB section in Volume 3 (LIBs and line sets) because they
vary according to LIB type.
/'
'\
"-. j
'~
'-" ;-
OX01
First PAD char completely xmt
No L2 irpt occurred. L2 irpt expected from xmt line adr.
A3L2
TA611
B-310
B-260
See X668 XXXX notes 1 and 2 for reg and checks.
This should be 1st L2 irpt after scope sync 2.
OX02
1st PAD completely xmt
L2 irpt not from xmt line adr.
A3L2
TA611
B-300
See X668 XXX X notes 1 and 2 for reg and checks.
'After this error display, the xmt line's PAD flag is
turned on, and the PDF is set to X'FF'. X'05' is
being xmt.
OX03
Rcv 1st char of X'05'
No L2 irpt occurred. L2 irpt expected from rcv line adr.
A3L2
TA611
B-310
B420
See X668 XXX X notes 1 and 2 for reg and checks.
This should be the 2nd L2 irpt (1st from rcv line
adr) after scope sync 2.
OX04
Rcv 1st char of X'05'
L2 irpt not from rev line adr.
A3L2
TA611
B-3oo
See X668 XXX X notes 1 and 2 for reg and checks.
0
!"'l
\......../
('~
"'. ~
/'r'~
\.....j
f'
,E''''',
\....../
'.... ./
"
./
/
'.,j
\
'-.....-/
('~\
\
../
"~
('.~
./
'..
j
\.....j
/-~~,
\.../
,
'\
"..,/
tf'1;,
)
\..../
"
(
,1""",
"'_./
,1""'"
'..../
~)
~ ,:~
(
(
(
(
(
(
(
(
(
(
(
(
(
{
(
(
(
(
(
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Routine
Error
Code
X668
OX05
Rev 1st char of X'OS'
Rev data in PDF not = X'OS', or ICW bits 0-7 in error.
A3E2
A3P2
TA311
TA131
8-420
See X668 XXXX notes 1 and 2 for reg, ICW bits 0-7,
and checks.
OX06
Xmt of X'OS' completed
No L2 irpt occurred.
A3L2
TA611
8-310
8-260
See X668 XXXX notes 1 and 2 for reg and checks.
This should be 3rd L2 irpt, 2nd from xmt line adr.
OX07
Xmt of X'OS' completed
L2 irpt not from xmt line
A3L2
TA611
8-300
See X668 XXXX notes 1 and 2 for reg and checks.
After this error display, the xmt line's PAD flag
is turned on, and the PDF is set to X'FF'. Should
now be xmt the PAD char set up after X668
OX02. Rcv line should not be rcv any data bits.
OX08
Xmt of 2nd PAD char completed
No L2 irpt occurred.
A3L2
TA611
8-310
8-260
See X668 XXXX notes 1 and 2 for reg and checks.
This is the 4th L2 (3rd from xmt line adr).
OX09
Xmt of 2nd PAD char completed
L2 irpt not from xmt line adr.
A3L2
TA611
8-300
8-420
See X668 XXXX notes 1 and 2 for reg and checks.
If the L2 irpt was caused by the rcv line adr, suspect
that the rcv line was rcv data instead of the PAD
char that was supposed to be xmt. After this error
display, the pad flag is turned off, and the xmt PDF
is set to X'OE' as the next char to xmt. A PAD char
should now be in the process of xmt.
OXOA
PAD flag reset
PAD flag did not reset in xmt ICW.
A3E2
TA311
8-180
See X668 XXXX notes 1 and 2 for reg and checks.
OXOB
Xmt of 3rd PAD char completed
No L2 irpt occurred.
A3L2
TA611
8-310
8-260
See X668 XXXX notes 1 and 2 for reg and checks.
This should be the Sth L2 irpt (4th from xmt line
adr).
OXOC
Xmt of 3rd PAD char completed
L2 irpt from wrong adr. Expected a L2 from xmt line adr.
A3L2
TA611
8-300
See X668 XXX X notes 1 and 2 for reg and checks.
After this error display, the xmt PAD flag is turned
on, and the PDF is set to X'FF'. Should now be
xmt char X'OE'.
OXOF
Rcv char X'OE'
No L2 irpt occurred. Should have L2 irpt from rcv line adr.
A3L2
TA611
8-310
8-420
See X668 XXXX notes 1 and 2 for reg and checks.
This should be the 6th L2 irpt (the 2nd from rcv
line adr).
OX10
Rcv char X'OE'
L2 irpt not from rev line adr.
A3L2
TA611
8-300
See X668 XXXX notes 1 and 2 for reg and checks.
If the L2 irpt was caused by the xmt line adr, the
xmt line's ICW may have failed to recognize the
reset of the PAD flag after X668 OX09.
OX11
Rcv char X'OE'
Rev data in PDF not X'OE', or ICW bits 0-7 in error.
A3E2
A3P2
TA311
TA131
8-420
See X668 XXXX notes 1 and 2 for reg, ICW bits 0-7,
and checks.
X669
Error Description
Function Tilted
~dr.
Comments
XXXX Scanner priority test. This rtn tests that the prioriLY between mUltiple scanners is correct. If L2 irpt are pending from multiple scanners at the same time, the 1st scanner should have the highest
priority, the 2nd scanner the next priority, etc. In this test, the 1st ICW of each installed scanner is set up to have a L2 irpt pending by setting ICW bit 41. Then the pgm checks that the scanners
irpt in the correct sequence. The test is run using priority select 3 for all tested scanners. This test is not run if only one scanner is installed. If this test detects failures, you should make sure that
all previous test rtn have run on all scanners before you use this rtn to try to isolate the problem.
OX01
Scanner priority test
Did not get L2 irpt after all scanners were set to cause a L2 irpt.
A3L2
TA611
8-300
See X669 XXXX. Reg X'13' = line adr L2 is
expected from.
OX02
Scanner priority test. Scanner 1 has highest priority, scanner 2 next,
scanner 3 next, and scanner 4 the lowest priority.
L2 irpt occurred from wrong adr. Reg X'13' = line adr expected
to cause L2 irpt. Reg X'14' = line adr causing L2.
A3L2
TA611
8-300
See X669 XXXX.
Z3705GCACSB 1FT SYMPTOM INDEX
1FT CSB 504
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Routln.
Error
Cod.
X66E
XXXX
Z3705GCA CSB 1FT SYMPTOM INDEX
Suspected Card
Locatien(s)
Error Description
Function Tilted
Program
Mask
FEALO
FETMM
Pagl
Page
1FT CSB 506
Comments
Char overrun lind underrun test for SIS lines. Check that char overruns on the rci/line and char underruns on the xmt line can be detected and reset. All SIS lines are tested except for telegraph
lines, which cause an echo check if no external current source is connected to the line. The echo check sets a modem check that suppresses the setting of svc req. Overrun cannot be set when the
'svc req' bit is off. A pair of SIS lines are used in each run of the test, with one line made the rcv line and one the xmt line. As each test finishes, the next SIS line is made the xmt line, and the last
xmt line is made the rcv line. This continues until all SIS lines have been both a xmt and a rcv line in the scanner under test. All lines are tested with LCD = 2, priority = 3, and oscillator select = O.
A set mode is executed for the rcv line and then the xmt line. The rcv line is set in rcv mode. The xmt line's SDF is set to X'FF', PDF to X'OA', and PCF to X'8'. Scope sync 2 is set; then the rtn
runs in the same sequence as that of the following error display codes. The scanner is reset and then enabled, and the above test is run on the next line. This continues until all SIS lines except telegraph lines have been tested.
NOTES:
Note 1: The following reg are set up for error displays:
Reg
Reg
Reg
Reg
Reg
X'll':: xmt line (ICW) adr as used to set ABAR.
X'13' = rcv line (ICW) adr as used to set ABAR.
X'14' (for errors indicating L2 irpt from wrong adr) contains the adr of the line that caused the L2 irpt.
X'14' (for unexpected rcv data in the PDF or for errors that indicate ICW bits 0-7 are in error) contains ICW bits 0-15 from the rcv line ICW obtained by an input X'44'.
X'16' = expected rcv line's ICW bits 0-15 for rcv data, PDF errors, or ICW bits 0-7 error. The rev ICW bits 8-15 are the PDF. Byte 1 of both reg X'14' and reg X'16' should always be
equal on all rcv data tests. ICW bits 0-7 are expected to be = to X'4n' in reg X'14' ('svc req' on, where n = O·F, 'rcv line signal detect' ignored, all other bits off). The exception
to ICW bits 0·7 occurs when an overrun is created. The 'svc req' bit (ICW bit 1) should be off, and char overrun bit (ICW bit 2) should be on.
Note 2: For all error stops, the LCDs should be examined for a feedback check: LCD = X'F'. You can use the continue function (except for set mode pretest errors) to see if only this line adr, a
pair of line adr, all lines in a LIB, or all lines in the scanner are failing. If only one line or a pair of lines is failing, suspect the line set card. If all lines in a LIB are failing, suspect the LIB bit clock
control card or line terminators. If all lines in the scanner fail, suspect the scanner cards or first oscillator card. See LIB card positions in the LIB section in Volume 3 (L1Bs and line sets) because
they vary according to LIB type.
OX01
Completed xmt of PAD char
No L2 irpt occurred. Should have had a L2 irpt from the xmt line
adr.
A3L2
TA611
B-310
B-260
See X66E XXXX notes 1 and 2 for reg and checks.
This should be the 1st L2 irpt after pgm set scope
sync 2.
OX02
Completed xmt of PAD char
L2 irpt not from xmt line adr.
A3L2
TA611
B-300
See X66E XXXX notes 1 and 2 for reg and checks.
OX03
Completed xmt of PAD char
Xmt line PCF did not change to 9.
A3F2
TA811
B-080
See X66E XXX X notes 1 and 2 for reg and checks.
Pgm sets xmt PCF = 8 during hardware setup. Hardware should have changed the PCF to 9 as 1st char
is xmt. After this error display, the xmt PDF is set
to X'Ol' as the next char to be xmt. Should now be
in process of xmt char X'OA'.
OX04
Rcv char X'OA'
No L2 irpt occurred.
A3L2
TA611
B-490
See X66E XXX X notes 1 and 2 for reg and checks.
This should be the 2nd L2 irpt (1st from rcv line
adr).
OX05
Rcv char X'OA'
L2 irpt not from rcv line adr.
A3L2
TA611
B-300
See X66E XXXX notes 1 and 2 for reg and checks ..
OX06
Rcv char X'OA'
Rcv data in PDF not = X'OA', or ICW bits 0-7 in error.
A3E2
A3P2
TA311
TA131
B-490
SeeX66E XXXX notes 1 and 2 for reg and checks.
'Svc-req' bit is not reset after this error display, so
next rcv char should cause a char overrun.
OX07
Completed xmt of X'OA'
No L2 irpt occurred. Should have had a L2 irpt from xmt line adr.
A3L2
TA611
8-310
B-260
See X66E XXXX notes 1 and 2 for reg and checks.
This should be the 3rd L2 irpt (2nd from xmt line
adr).
"
..~
.J
'" )
0
",-j
'l
"-./
I'C~
"'-.,
./
\
'-
)
'-..
/
"
/
./
~
/'"
"
./
'-../
\....... /
t~~
\..
./
'.
j
'-J
\.. . /
~.
"\
~./
'"
\,./'
"'- . . /
/
\
./
'''1
/
-"".
"'- . /
\.. . /
('"
"''\
,,--/1
(~
\..J
-_.._-- -
t/
(
t
(
--
-----
-
(/
---.
t
(
(
f
(
(
(
(
('
(
f
(
(
f
(
__.--
(
(
«
(
('
('
(j (
(~:
(C.
(
(
(' (
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Error
Routine
X66E
Code
Function Tested
Ermr Descriptio,n
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
OX08
Completed xmt of X'OA'
L2 irpt not from xmt line adr.
A3L2
TA611
8-300
See X66E XXXX notes 1 and 2 for reg and checks.
After this error display, the xmt PDF is set to X'OE'
as the next char to be xmt. 'Svc-req' bit is not reset,
so the next xmt L2 irpt should set the char underrun bit. Should now be in the process of xmt the
char X'01 '.
OX09
Rcv char X'01' and get char overrun
No L2 irpt occurred. Should have a L2 irpt from rcv line adr.
A3L2
TA611
8-490
See X66E XXXX notes 1 and 2 for reg and checks.
This should be 4th L2 (2nd from rcv line adr).
Check reg X'44'; ICW bit 2 (char overrun bit)
should be on in rcv line, ICW bit 1 (svc req) should
be off, and PDF should contain X'01'. If you display reg X'40', store the rcv line adr and display
reg X'44' (lCW bits 0-15), the PDF should now
= X'OE', since the xmt line is still sending char
X'OE'. The rcv line should be rcv the .char and
setting overrun.
OXOA
Rcv char X'01' and get char overrun
L2 irpt not from rcv line adr.
A3L2
TA611
8-300
See comments on X66E OX09.
OXOB
Rcv char X'01' and get char overrun
Char overrun (I CW bit 2) not on, svc req (I CW bit 1) is on, or PDF
(lCW bits 8-15) not = X'01'.
A3P2
TA611
8-490
8-140
Rec ICW bit 2 should be on. See X66E OX09.
Reg X'14' = the rcv ICW bits 0-15 obtained by an
input X'44'.
oxoe
Reset of ICW bit 2
ICW bit 2 (char overrun) did not reset.
A3P2
TA611
8-180
See X66E XXXX notes 1 and 2 for reg and checks.
OXOD
Xmt of X'01' completed and xmt underrun
No L2 irpt occurred. Should have had a L2 irpt from xmt line adr.
A3L2
TA611
8-310
8-260
See X66E XXXX notes 1 and 2 for reg and checks.
This should be 5th L2 irpt (3rd from xmt line adr).
OXOE
Xmt of X'01' completed and xmt underrun
L2 irpt not from xmt line adr.
A3L2
TA611
8-300
See X66E XXXX notes 1 and 2 for reg and checks.
OXOF
Xmt underrun
Underrun (lCW bit 2) not on in xmt line's ICW (Should be on).
A3P2
TA121
8-310
B-140
See X66E XXXX notes 1 and 2 for reg and checks.
After X66E OXOB on last xmt char-svc L2, the
'svc req' bit was not reset, so when this xmt L2 irpt
occurred, the char underrun bit should have been
set on by hardware.
i
:
X672
Comments
OX10
Reset of xmt underrun
XXXX
Char overrun and underrun test for sync lines. All sync lines are checked to ensure that char overrun can be detected on rcv lines and char underrun can be detected on xmt lines. All lines are
tested with LCD = C, priority = 3, and oscillator select = O. Each pair of lines is set up by (1) setting the display bit in the rcv line, (2) executing set mode on the rcv line, (3) setting the rcv line
PCF = 5, (4) executing set mode on the xmt line, (5) setting xmt SDF and PDF to X'55', (6) setting xmt PCF = 8, and (7) setting scope sync 2. The rest of the test is run in the same sequence as
that of the error codes that follow. When the test is finished on a pair of lines, the scanner is disabled and then enabled. The next sync line adr is made the new xmt line, the last xmt line is made
the new rcv line, and the whole test is run again. This is continued until all sync lines have been tested both as xmt and rcv lines.
Underrun bit (lCW bit 2) did not reset in xmt line's ICW.
A3P2
TA121
8-1BO
Z3705GCACSB 1FT SYMPTOM INDEX
1FT eSB 508
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Routine
Error
Code
X672
XXXX
Z3705GCACSB 1FT SYMPTOM INDEX
Suspected Card
Error Description
Function Tested
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
1FT CSB 510
Comments
NOTES:
Note 1: The following reg are set up for error displays:
Reg
Reg
Reg
Reg
Reg
X'11' = xmt line (lCW) adr as used to set ABAR.
X'13' = rcv line (lCW) adr as used to set ABAR.
X'14' (for errors indicating L2 irpt from wrong adr) contains the adr of the line that caused the L2 irpt.
X'14' (for unexpected rcv data in the PDF or for errors that indicate that ICW bits 0-7 are in error) contains ICW bits 0-15 from the rcv line ICW obtained by aQ input X'44'.
X'16' = expected rcv line's ICW bits 0-15 for rcv data, PDF errors, or ICW bits 0-7 error. The rcv ICWbits 8-15 are the PDF. Byte 1 of both reg X'14' and reg X'16' should always be
equal on all rcv data tests. ICW bits 0-7 are expected to be: bit 1 (svc-req) on; bits 0, 2, 3, 5, 6, and 7 off; bit 4 ignored. The exception to ICW bits 0-7 being as above is when
an overrun is created. The 'svc req' bit (lCW bit 1) should be off, and char overrun bit (lCW bit 2) should be on.
Note 2: For all error stops, the LCDs should be examined for a feedback check: LCD = X'F'. You can use the continue function (except for set mode pretest errors) to see if only this line adr, a
pair of line adr, all lines in a LIB, or all lines in the scanner are failing. If only one line or a pair of lines is failing, suspect the line set card. If all lines in a LIB are failing, suspect the LIB bit clock
control card or line terp1inators. If all lines in the scanner fail, suspect the scanner cards or first oscillator card. See LIB card positions in the LIB section in Volume 3 (LiBs and line sets) because
they vary according to LIB type.
Note3: See note 6 following this CSB symptom index for the shifted SYN and data char.
OX01
Xmt 1st PAD (X'55') completed
No L2 irpt occurred.
A3L2
TA611
See X672 XXXX notes 1 and 2 for reg and checks.
1st L2 (from xmt) after scope sync 2.
OX02
Xmt 1st PAD (X'55') completed
L2 not from xmt line adr.
A3L2
TA611
See X672 XXXX for reg and checks.
OX03
Xmt PCF went to 9.
Xmt PCF did not go to 9.
A3F2
TA811
See X672 XXXX for reg and checks. Pgm set PCF
= 8 in hardware setup, and hardware should have
changed the PCF to 9. After this error display, the
xmt PDF is set to X'19' (shifted SYN char), and svc
req is reset.
OX04
Xmt 2nd PAD (X'55') completed
No L2 irpt occurred.
A3L2
TA611
See X672 XXXX for reg and checks. 2nd L2 (2nd
from xmt) after scope sync 2.
OX05
Xmt 2nd PAD (X'55') completed
L2 not from xmt line adr.
A3L2
TA611
See X672 XXXX notes 1 and 2 for reg and checks.
After this error display, the xmtPDF is set with the
2nd shifted SYN char (X'19'), and svc req is reset.
Should now be in process of xmt the 1st SYN char.
OX06
Xmt 1st SYN (X'19') completed
No L2 irpt occurred.
A3L2
TA611
See X672 XXXX for reg and checks. 3rd L2 (3rd
from xmt).
OX07
Xmt 1st SYN (X'19') completed
L2 not from xmt line adr.
A3L2
TA611
See X672 XXXX notes 1 and 2 for reg and checks.
After this error display, the xmt lines PDF is set to
character X'50' and svc request is reset. Should
now be in process of xmt the 2nd SYN char.
OX08
Rcv line detected 1st SYN
Rcv line's PCF not = 7.
A3F2
TA811
8-080
Thercv adr PCF was set to 5 by the pgm during
hardware setup, but the 1st SYN char should
have been rcv and detected by the hardware and
caused the PCF to be changed to 7.
Note: No L2 irpt should result from changing PCF
See X672 XXXX notes 1 and 2
for reg and checks.
= 5 to PCF = 7.
,
OX09
Rcv line rcv 2nd SYN
No L2 irpt occurred.
A3L2
TA611
B-310
B-420
See X672 XXXX for reg and checks. 4th L2 irpt
(1st from rcv).
OXOA
Rcv line rcv 2nd SYN
L2 irpt not from rcv line adr.
A3L2
TA611
B-300
See X672 XXXX for rE;!g and checks.
('--"
./
"-
,""'"
(
~"-
)
.Y
I'
,4
~
"-
'"
/
/-'\
"-
"'..,/
""
\
./
\"
,/
"-"
"
. ./i
"-.j
',,/
r",\
\_j
"
"\
"-
/
\
,---_/'
f""
'-
./
,/,\
(-''\
~
'".~
("'\
\,j\J
_/
t
(
(
(
(
{
c
C
I(
e
(
C
3705-80 CSB I FT SYMPTOM INDEX - Cont.
C
-
C
(
(
4:
(
c
c
(
«
(
«
(
Routine
Error
Code
X672
OXOB
Rcv line rcv 2nd SYN.
Rcv data in rcv line PDF not a SYN char (X'32'), or ICW bits 0-7 in
error.
A3E2
A3P2
TA311
TA131
8-240
See X672 XXXX notes 1 and 2 for reg, ICW bits 0-7,
and checks to make. 'Svc-req' bit is not set off in
the rcv line ICW, so the next rcv line L2 irpt should
indicate char overrun.
OXOC
Xmt of 2nd SYN completed
No L2 irpt occurred.
A3L2
TA611
8-310
8-260
See X672 XXXX for reg and checks. 5th L2 irpt
(4th from xmt).
OXOD
Xmt of 2nd SYN completed
L2 irpt not from xmt line adr.
A3L2
TA611
8-300
See X672 XXXX for reg and checks. After this
error display, the xmt line's PDF is set to X'OO'.
The 'svc req' bit is not reset. On the next L2 irpt
for the xmt line adr, a char underrun error should
be indicated. Should now be in the process of xmt
the char X'50'.
OXOE
Rcv char X'AO' and get char overrun.
No L2 irpt occurred.
A3L2
TA611
8-310
8-420
See X672 XXXX for reg and checks. Reg X'44'
contains the rcv line's ICW bits 0-15. ICW bits 8-15
are the PDF and should = X'AO'. ICW bit 2 (char
overrun) should be on since svc req (I CW bit 1) was
not reset on the last rcv line L2 irpt. ICW bit 1
(svc req) should be off, since hardware should turn
it off when it turns on ICW bit 2. This is the 6th
L2 irpt (2nd from rev).
OXOF
Rcv char X'AO' and get char overrun.
L2 irpt not from rcv line adr.
A3L2
TA611
8-300
See X672 XXXX notes 1 and 2 for reg and checks.
Reg X'44' contains the rcv line's ICW bits 0-15.
ICW bits 8-15 are the PDF and should = X'AO'.
ICW bit 2 (char overrun) should be on since svc req
(lCW bit 1) was not reset on the last rcv line L2 irpt.
ICW bit 1 (svc req) should be off, since hardware
should turn it off when it turns on ICW bit 2.
OX10
Rev char X'AO' and get char overrun.
Char overrun (lCW bit 2) is not on, svc req (lCW bit 1) is on, or
PDF not = X'AO' in rev line's ICW.
A3P2
TA121
8420
8-140
See comments under X672 OXOF.
OX11
Char overrun reset
Char overrun (lCW bit 2) did not reset.
A3P2
TA121
8-180
Pgm attempted to reset char overrun and then
checked to make sure it was off. See X672 XXXX
notes 1 and 2 for reg and checks.
OX12
Xmt of X'50' complete and char underrun
No L2 irpt occurred.
A3L2
TA611
See X672 XXXX notes 1 and 2 for reg and checks.
Should have xmt line's ICW bit 2 on (underrun),
since the 'svc req' bit was not reset on the last xmt
L2 irpt. 7th L2 (5th from xmt).
OX13
Xmt of X'50' completed and char underrun
L2 not from xmt line adr.
A3L2
TA611
See X672 XXXX notes 1 and 2 for reg and checks.
The xmt line's ICW should have the 'char underrun'
bit on (lCW bit 2), since the 'svc req' bit was not
reset on the last xmt L2 irpt.
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
Z3705GCACSB 1FT SYMPTOM INDEX
1FT CSB 512
(
3705-80 CSB 1FT SYMPTOM INDEX - Cort.
Z3705GCA CSB 1FT SYMPTOM INDEX
Routine
Error
Code
Function Tested
X672
OX14
Xmt of X'50' completed and char underrun
The 'char underrun' bit (lCW bit 2) is not on but should be.
A3P2
TA121
OX15
Reset underrun
The char underrun bit did not reset.
A3P2
TA121
XXXX
Force L1 check test. Checks that an output X'43' with byte 0 bit 0 and byte 1 bit 5 on forces the check bits on in the scanner check reg (input X'43'). Then checks that an output X'43' with
byte 0 bit 1 and byte 1 bit 5 on resets the check bits. The scanner is disabled ('CSB disable'-Iatch is set) and then enabled ('CSB disable' latch turned off). ABAR is set with an output X'40', scope
sync 2 is set, and an output X'43' is done with byte 0 bit 0 and byte 1 bit 5 on. The rest of the test is run in the same sequence as that of the following error codes.
OX01
Scanner check reg bits on
X675
Suspected Card
Location(s)
Error Description
Program
Mask
A3C2
All check bits not on.
FEALD
Page
TB131
FETMM
Page
1FT
csa 514
Comments
See X672 XXXX notes 1 and 2 for reg and checks.
The xmt line's ICW should have the 'char underrun'
bit on (lCW bit 1), since the 'svc req' bit was not
reset on the last xmt L2 irpt.
B-180
See X672 XXXX notes 1 and 2 for reg and checks.
The pgm attempted to reset the char underrun bit
in the xmt ICW and then checked and found the bit
was still on.
B-170
B·130
Reg X'14' = the scanner check reg bits obtained by
an input X'43'. Byte 0 bit 0-7 and byte 1 bits 0-3
should all be on.
Note: L1 adapter checks were masked off so the
normal L1 adapter check that should occur is
blocked at this time. Reg X'11' = line adr of scanner under test as used to set ABAR. After this error
display, ABAR is set again and another output
X'43' is executed with byte 0 bit 1 and byte 1 bit 5
on to reset the scanner check reg bits. '
X678
OX02
Scanner check reg. reset
All check bits not reset.
A3C2
TB131
B-140
B-130
All scanner check reg bits should be reset. Reg
X'14' contains the scanner check reg obtained by an
input X'43'. Reg X'11' = line adr of scanner under
test set in ABAR. After this error display, output
X'43' is executed again to set the scanner check reg
bits on. Then adapter L1 irpt are unmasked, and a
check is made that a L1 actually occurred.
OX03
Scanner check reg causes L1 irpt.
No L1 irpt occurred.
A3C2
TB131
B-130
A L1 irpt should have occurred for scanner under
test. Reg X'11' = line adr set in ABAR.
OX04
Scanner under test caused the L1 irpt.
The scanner under test was not the scanner that caused the L1 irpt.
A3C2
TB131
B-300
Reg X'14' = line adr causing the L1 irpt.
= line adr of scanner under test.
XXXX
Modem error bit test. This rtn tests that the modem error bit (lCW bit 3) is set according to the modem intf lines of data set ready (DSR) and/or clear to send (CTS). Only one error stop can occur
in this rtn, with reg X'15' indicating the failure. If reg X'15' =0001, the error is that the modem check bit did not come on with DSR off and a PCF of 5, 7, 8, 9, A, B, C, or D. If reg X'15' = 0002,
the error is that the modem error bit is not on with CTS off and a PCF of 9, A, B, or D. Reg X'13' contains the contents of the display reg obtained by an input X'46', with bit 0.0 being CTS and
0.2 = DSR.
B-140
Reg defined in X678 XXXX.
Reg
Reg
Reg
Reg
OX01
X'11' contains line (ICW) adr of line under test.
X'14' contains ICW bits 0-15, with bit 0.3 being the 'modem check' bit.
X'45' contains LCD and PCF, with bits 0.4 - 0.7 being PCF now in ICW.
X'16' bits 1.0 - 1.3 = LCD in use, and bits 1.4 - 1.7 == PCF that was used. PCF now in ICW may be different than PCF that was used, and this may be normaL Example: if PCF was set to D
with an LCD of C, then the PCF would change to 5.
.0;
'.
'"
A3P2
Modem error bit (lCW bit 3) is at wrong value.
Modem error bit
,/
~"
"j
'--...
..
"
/
'-
./
'.
,/
"
j
"-
._-/
I~
\.
./
/"-
/~
('~
,
./
TA131
"-j
\.j
"-
/'
'\,
'--
/
,
j
,/
"-
Reg X'11'
(/ (
l
(,
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
C / (/
(
3705-80 CSB I FT SYMPTOM INDEX - Cant.
Routilne
X67A
Error
Code
Error Description
Function Tested
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
XXXX Oscillator speed test. Each installed oscillator in the scanner under test is checked. The oscillator frequency is checked to ensure that there is no more than a plus or minus 0.25 percent variation
from its expected frequency. The first installed line in the scanner is used to run the test. The test:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
Resets and then enables the scanner.
Sets up the best possible upper scan limit for the line being used for the test.
Sets priority = 3.
Sets the 'display req' bit so reg X'46' will be valid for the line in use.
Executes set mode with oscillator select 0 to ensure the line operates. (Pretest errors are indicated if set mode fails.)
Sets scope sync 2.
Executes a set mode with oscillator select bits for the oscillator position under test.
Masks off L1, L2, and L3 irpt.
Sets PDF to X'55' and the SDF to X'1 D5'.
Sets PCF = 8 (xmt initial).
Loops until SDF bit 3 = 0 (the 1st 3 bit times are not included in the speed test because the 1st 3 bit times are unpredictable. Examples: the 1st bit svc is caused by the rev clock because xmt
state is not active yet. Also when xmt state is set, it may cause an extra strobe pulse if the oscillator is in a negative state at this time).
Reports an error if the SDF did not shift 3 times to set SDF bit 3 to 0 within 180 ms.
Sets SDF = X'54'.
Loops for 1 second plus enough time to round bits-per-second count to a whole number, counts the number of bits that occur while in the loop, saves the loop count when and if the number of
bits to be counted is actually counted, and alternately sets the SDF to X'54' and X'55' after each bit time to cause the 'test data' latch (xmt data) to have alternate bits for a possible troubleshooting aid.
Calculates, from the number of bits counted, the loop count and the tolerance to determine whether the oscillator is running at the correct frequency.
Reports an error if the detected frequency is not within tolerance.
The above is done for each of the 4 possible oscillators if the CDS entry for that oscillator position contains a valid oscillator type.
Notes: This rtn is dependent on the proper operation of the first installed line since the rtn is designed to test the oscillators rather than the line sets. Also the oscillator type fields in the configuration data set (CDS) must be right. If this rtn fails, the oscillator card for the oscillator under test could be bad, the oscillator select bits could be bad, or the gating controls for the oscillators could
be bad. Another possible failure is getting extra or missing strobe pulses not caused by the oscillator.
The following reg are set up for all rtn error displays except the set mode pretest errors beginning with 1:
Reg
Reg
Reg
Reg
Reg
X'11' =
X'14' =
X'15' =
X'15' =
X'16' =
line adr of line used in test (adr as used to set ABAR).
number of bits counted during the test.
relative oscillator position under test in byte 0 bits 0-7 with X'O' being 1st oscillator, 1 being 2nd oscilla"tor, 2 being 3rd oscillator, and 3 being the 4th oscillator.
oscillator type in byte 1 bits 0-7. This type is as obtained from the CDS.
number of bits per second expected to be counted (rounded off to a whole number).
OX01
Set mode with oscillator under test
No L2 irpt occurred.
A3L2
A3T2
A3T4
A3U2
A3U4
B3U5
TA611
TB411
TB412
TB413
TB414
CC007
C-020
C-160
See X67 A XXXX notes for reg and checks.
OX02
SDF shifting
SDF bit 3 did not set to 0 in the 180 ms wait time.
A3L2
A3T2
A3T4
A3U2
A3U4
B3U5
TA611
TB411
TB412
TB413
TB414
CC007
C-020
B-480
B-410
SDF bits 1,2, and 3 were set by an output X'46'
with X'01 D5'. The SDF should have been shifted
right, setting SDF bit 3 to a O. See X67A XXXX
notes for reg and checks.
Z3705GCA CSB 1FT SYMPTOM INDEX
1FT eSB 516
3105-80 CSB 1FT SYMPTOM INDEX - Cont.
Z3705GCA CSB 1FT SYMPTOM INDEX
Suspected Card
Location(s)
Error
(
.\
)
Error Description
Function Tested
Program
Mask
FEALD
Page
FETMM
Page
1FT eSB 518
Comments
Routine
Code
X67A
OX03
Oscillator frequency
Oscillator under test running too fast.
A3L2
A3T2
A3T4
A3U2
A3U4
B3U5
TA611
TB411
TB4l2
TB4l3
TB4l4
CC007
C-020
C-040
Reg X'14' contains the number of bits actually
counted. Reg X'16' contains the number of bits
expected to be counted. If reg X'14' = reg X'l6',
the oscillator is getting less than 1 bit time extra in
the 1 second run but is still too fast !.not within
0.25 percent of expected frequency). See X67A
XXXX notes for other reg and checks to be made.
OX04
Oscillator frequency
Oscillator under test running too slowly. Not enough bits counted
in 1 second.
A3L2
A3T2
A3T4
A3U2
A3U4
B3U5
TA6ll
TB411
TB412
TB4l3
TB4l4
CC007
C-020
C-040
Reg X'14' contains the number of bits actually
counted and is less than reg X'16', which contains
number of bits expected to be counted. See X67 A
XXXX notes for other reg and checks to make.
l
'"
('.
.. ;
....
.. '\
",-j
(
-~"
,r».,
I
\.
/
('""'"
,
'
'-./
\.
'"
/
"-
/
"
./
\,----/
./
/
"'-_/
.....~
~.. /
".,~
"
/
,
'''\j
''\
"
./
"'-
/
t''''
\. -
./
-----_._----
(
(
l
(
(/
_._-----
---- - - - -
(
(
(
(
(
(-
{
«
_.
(
(
,
(
(
(
c
(
(
(
(-
(
(-
(
(-~ (,
(' (e"
(
(-
(-' (
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Error
Routine
Code
X694
XXXX
Function Tested
Error Description
Suspected Card
Program
FEALD
Loca'tioo(s)
Mask
Page
FETMM
Page
Comments
PCF state F disable test. This rtn, which is a manual intervention rtn, will not be run unless you set the CE sense switch to run manual intervention rtn or unless you requested a single rtn to be run.
This rtn will stop with manual intervention codes of FO in DISPLAY B, asking you to enter the info required to run this rtn. These FO-codes may be found following this CSB symptom index. This
test rtn does a PCF = F switch line intf disable to the line(s) you entered. The rtn:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
Disables ('CSB disabled' latch turned on) and then enables the scanner under test.
Sets the display request bit in the line (lCW) under test.
Sets scope sync 2.
Sets the diag mode bit and, if the line is only sync, sets the sync clock bit in the SDF.
Sets PCF = 1 and LCD = 7 for SIS lines, or LCD = C for sync lines.
Waits for and validates that a L2 irpt occurred for the line under test.
Checks that the PCF went from 1 to O. (Set mode completed okay.)
Sets PCF = F.
Waits for and validates that a L2 irpt occurred for the line under test.
Checks that the PCF went to O.
Checks that the scanner display reg (X '46') byte 0 bits 0, 1, 2, 3, and 5 are all off which indicates the line intf has been reset.
Notes: This rtn indicates failures on any line intf that has modem intf lines, 'ring indicator', or 'rcv line signal detect' tied up to active levels. For some modems, data sets, and line set types, it is
normal for some of these intf lines to be tied up to an active (on) level. If you requested all lines to be run, this rtn will bypass LIB types 2, 3, and 4 since they always have some intf line active. If
the test indicates failures due to modem intf lines being on when they should not be, you could have a bad intf converter on the line set for the line that failed, or there could be a bad modem or
data set connected to the line. If none of the lines completed the PCF = F portion of the test, the scanner cards may be bad. It is assumed that the other internal test rtn have been run and that set
modes and internal data wraps work properly. If this is not true, there could be a bad oscillator, a bad line set, a bad LIB, or some scanner failure. The following reg are valid for all error displays in
this rtn:
Reg X'll' = line adr that is under test (as used to set ABAR)
Reg X'46' = the scanner display reg for the line under test.
OX01
Set mode
No L2 irpt occurred.
A3E2
TA331
8-310
8-260
This error should not occur if rtn X627 and X629
ran successfully. Suggest you run those rtn again.
Should have had a L2 irpt from the set mode, and
PCF should now = O. See X694 XXXX notes for
reg and more info.
OX02
Set mode
L2 irpt not from the line under test.
A3E2
TA331
8-300
This error should not occur if rtn X627 and X629
ran successfully. Suggest you run those rtn again.
Should have had a L2 irpt from the set mode, and
PCF should now = O. See X694 XXXX notes for
reg and more info. Reg X'14' = line adr that caused
the L2 irpt.
OX03
Set mode
PCF did not go to 0 after set mode.
A3E2
TA331
8-080
See comments in X6940X01. Reg X'14' byte 0
= LCD and PCF obtained by an input X'45' at the
time of failure.
OX04
PCF
No L2 irpt occurred after PCF was set to F.
A3F2
TA811
8-310
No L2 irpt will occur if some modem intf lines did
not reset. See X694 XXXX notes for reg and more
info.
OX05
PCF = F completed
L2 irpt from the line under test.
A3E2
TA331
8-300
This error may have nothing to do with the PCF = F
test, since no other line should cause a L2. See
X694 XXXX notes for reg and more info. Reg
X'14' contains the line adr that caused the L2 irpt.
= F completed
Z3705GCACSB 1FT SYMPTOM INDEX
1FT eSB 536
3705-80 csa I FT SYMPTOM INDEX - Cont.
Error
Routine
Code
X694
OX06
1FT eSB 538
Z3705GCA CSB I FT SYMPTOM INDEX
Functio,n Tested
Suspected Card
Location(s)
Error Description
FEALD
Mask
Page
A3F2
PCF did not change to O.
PCF = F completed
Program
FETMM
Page
B-080
B-260
TA811
Comnwtts
Hardware should have changed PCF to 0 from PCF
If 'DSR' and
'rev line signal detect' intf lines did not reset properly, PCF may still F. See X694 XXXX notes for
more info.
=F after the modem interface is reset.
=
OX07
Modern intf reset
A3E2
All modem imf lines that should be reset are not reset.
B-150
TA331
Reg X'14' = reg X'46' at the time of failure.
Note: Reg X'46' is loaded every scan cycle, so it
may not be = to reg X'14' at this time. Reg X'15'
has a bit on for each bit position that is bad in reg
X'14'. See X694 XXXX notes for more info.
X698
XXXX
Diag xmt test for PCF = B. This rtn, which is a manual intervention rtn, will not be run unless you set the CE sense switch to run manual intervention rtn or unless you request a single rtn to be run.
This rtn will stop with manual intervention codes of FO in DISPLAY B, asking you to enter the info required to run this rtn. These FO codes can be found following this CSB symptom index. This
rtn xmt a PAD char (X'FF') and 2 data char (X'AA'). The rtn sets PCF = B to xmt the second data char; then the scanner sets PCF = C and checks that the xmt line turned around. This is a manual
intervention rtn because PCF = C turnaround requires the 'CTS' modem intf line to drop; this does not occur on some modem intf that have this line tied up to an active (on) level. This rtn runs on
SIS lines only and uses LCD = 7.
Note: This rtn indicates a failure on any line intf that does not drop the 'CTS' modem intf line. If 'CTS' should not be on for this intf, you should suspect the line set card for the failing line. If all
lines fail, there may be a bad scanner card. Errors X698 OXOl through OX05 should not occur; if they do, you should run rtn X645 to try to find the failure. The following reg are set up for all
error displays:
Reg X'll' = line adr of line under test (as used to set ABAR).
Reg X'46' = scanner display reg, which is valid for the line under test.
Reg X'14' = line that caused the L2 irpt for errors in which the L2 irpt is not from the line under test.
",-~
"'.'
OXOl
Xmt of PAD completed
No L2 irpt occurred.
A3L2
TA611
B-310
B-260
OX02
Xmt of PAD completed
L2 irpt not from the line under test.
A3L2
TA611
B-300
TA811
B-080
OX03
Xmt of PAD completed
PCF did not go to 9.
A3F2
OX04
Xmt of 1st data (X'AA') completed
No L2 irpt occurred.
A3L2
TA611
B-310
B-260
OX05
Xmt of 1st data (X'AA') completed
L2 irpt not from the line under test.
A3L2
TA611
B-3oo
See the X698 XXXX note. After this error display,
the PCF is set to B.
OX06
Xmt of 2nd data (X'AA') completed
No L2 irpt occurred.
A3L2
TA611
B-080
8-310
B-260
If 'CTS' did not drop, this irpt will not occur. PCF
should have been changed to C if the last data char
was xmt okay. See the X698 XXXX note for more'
info.
OX07
Xmt of 2nd data (X'AA') completed
L2 irpt not from the line under test.
A3L2
TA611
8-300
OX08
PCF went to 7.
PCF did not set to 7 after xmt turn-around.
A3F2
TA811
B-080
PCF was changed to C by the hardware, and an
additional bit time should occur. If 'CTS' is off,
PCF should be changed to 7 by the scanner hardware. See the X698 XXXX note for more info.
OX09
SDF=O
SDF bits 0-7 did not = O.
A3H2
TA221
B480
Turnaround should leave SDF = O. See the X698
XXXX note for more info.
OXOA
SDF =0
SDF bits 8-9 did not'C O.
A3H2
TA22t
8480
Turnaround should leave SDF = O.See the X698
XXXX note for more info.
r~,
J
.
/
"
,J
01
"'-
)/
~
I
' . ./
,r")"
,--.j
1"1
,-j
/'1
'\
"'-/
" ,--",/
(~
''--./
"
(-~
,'.
./
..
'\
.~'~
,0
/:
'----/
'".,)
\... ./
",-j
,/
''']
,.
')
'-..../
(""'I
"-...j
f'1
'-- . .-/
PCF set to 8 by pgm for xmt initial. The scanner
hardware should have changed it to 9. See the
X698 XXXX note.
(
'"
" ,/
~",
(
'---/
("'\
0
(, .{
(
c
(
----------
(
(
c·
(
(
(
(
f'
(
'.
(
(
(' (
(-
(
(
-
(
(
---------
--
f
------
(
(-
(/
(-.
{"
f"
-
---
(-
(
(~
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Suspected Ca,rd
Error
Routine. Code
X699
XXXX
Function Tested
Error Descrilption
Location,(s)
Program
MasK
FEALD
Page
FETMM
Page
Comments
Diag xmt test for PCF = C. This rtn, which is a manual intervention rtn, wiH not be run unless you set the CE sense switch to run manual intervention rtn or unless you request a single rtn to be run.
This rtn will stop with manual intervention codes of FO in DISPLAY B, asking you to enter the info required to run this rtn. These FO codes can be found following this CSB symptom index. This
rtn xmt a PAD char (X'FF') and 2 data char (X'AA'). The rtn xmt the second data character, then sets PCF = C and checks that the xmt line turned around. This is a manual intervention rtn
because PCF = C turnaround requires the 'CTS' modem intf line to drop; this does not occur on some modem intf that have this line tied up to an active (on) level. This rtn runs on DLC lines only
and uses LCD = 9.
Note: This rtn indicates a failure on any line intf that does not drop the 'CTS' modem intf line. If 'CTS' should not be on for this intf, you should suspect the line set card for the failing line. If all
lines fail, there may be a bad scanner card. Errors X699 OXOl through OX05 should not occur; if they do, you should run rtn X645 to try to find the failure. The following reg are set up for all
error displays:
,
X69C
Reg X'11' = line adr of line under test (as used to set ABAR).
Reg X'46' = scanner display reg, which is valid for the line under test.
Reg X'14' = line that caused the L2 irpt for errors in which the L2 irpt is not from the line under test.
OXOl
Xmt of 1st data (X'AA') completed
No L2 irpt occurred.
A3L2
TA611
B·310
B-260
See the X699 XXXX note.
OX02
Xmt of 1st data (X'AA') completed
L2 irpt not from the line under test.
A3L2
TA611
B-300
See the X699 XXX X note.
OX03
Xmt of 1st data (X'AA') completed
PCF did not go to 9.
A3F2
TA811
B-080
PCF was set to 8 by pgm for xmt initial. The
scanner hardware should have changed it to 9. See
the X699 XXX X note.
OX04
Xmt of 2nd data (X'AA') completed
No L2 irpt occurred.
A3L2
TA6l1
B-310
B-260
See the X699 XXXX note.
OX05
Xmt of 2nd data (X'AA') completed
L2 irpt not from the line under test.
A3L2
TA611
B-300
See the X699 XXXX note. After this error display,
the PCF is set to B.
OX06
Xmt turn completed
No L2 irpt occurred.
A3L2
TA611
B-080
B-310
B-260
If 'CTS' did not drop, this irpt will not occur. PCF
should have changed to 5 if the last data char was
xmt okay. See the X699 XXXX note for more info.
OX07
Xmt turn completed
L2 irpt not from the line under test.
A3L2
TA611
B-300
See the X699 XXXX note.
OXOS
PCF went to 5.
PCF did not set to 5 after xmt turnaround.
A3F2
TA811
B-080
After PCF was set to C, an additional bit time
should occur. If CTS is off, PCF should be changed
to 5 by the scanner hardware. See the X699 XXXX
note for more info.
XXXX
Modem intf check. This rtn, which is a manual intervention rtn, will not run unless you set the CE sense switch to run manual intervention rtn or unless you request a single rtn to be run. This rtn
stops with manual intervention codes of FO in DISPLAY B, asking you to enter the info required to run this rtn. These FO codes can be found following this 'CSB' symptom index. This rtn checks
that the modem intf line's 'CTS' and 'rcv line signal detect' are not on and that the 'rev data bit buffer' is on. This test is run with 'RTS' off and 'diag wrap mode' off.
B-150
Reg X'14' byte 0 bit 0 is the 'CTS' bit, which
should be off; bit 3 is the 'rev line signal detect' bit,
which should be off; bit 4 is the 'rcv data bit buffer'
bit, which should be on.
Note: This rtn will indicate failures on all modem intf and/or line sets that have 'CTS' and 'rcv line signal detect' ties up to active (on) levels. For example, all LI B type 2 telegraph line sets should
have 'rev line signal detect' active all the time and should cause .failures. If failures occur and the intf line in error should not have lines tied to active levels, suspect a bad line set card or a modem
intf problem. The following reg are set up for error displays:
Reg
Reg
Reg
Reg
OXOl
X'11' = line adr (as used to set ABAR) of the line under test.
X'46' = the scanner display reg, which should be loaded by the scanner every scan cycle for the line under test.
X'14' = what was in the display reg X'46' at the time the failure was detected. Reg X'14' may not = reg X'46' if you display reg X'46', because reg X'46' may be changed on each scan cycle.
X'15' contains bits in error, with each bit position that is on representing the bit position in reg X'14' that is in error.
Modem intf
Intf lines not in expected condition.
Z3705GCA CSB I FT SYMPTOM INDEX
1FT CSB 540
t
--~~----------
-"'--
---~~~~--~~~~~-
J'-
~~
-------~~
This page intentionally left blank
r-
:)
0
,0
\..y
r
'"
0
'"
j
~'\
"'--'''\
"-_/
"-
,
-~
.I
"-
-"'\
('-"
/
\'------,/
( ' ',>-
'---./
I~
\..j
r--'-
("",\
--
./
-
\,,-
./
r~
,
/
,">--",
"-- -_./
/~~
~j
,["'l"-- ./
/-"')
,,_/
'\
\../
~-
/~
j
'---./
('
',-- /
(
"-
"-,
/
1"'--"
'---_/
",---",
i\..j
(\
',---../
(
(
(
(
(
(
(
(
(
(
(
c
(~
(
(~
(
3705-80 csa 1FT SYMPTOM INDEX - Cont.
Error
Function Tested
Routine. Code
X6FO
Error Description
Suspected Calrd
ProtI.i••
FEALD
FETMM
Location(s)
Mast
Pall
Page
Comments
XXXX SOLC link test. This rtn, which is a manual intervention rtn, will not be run unless you set the CE sense switch to run manual intervention rtn or unless you request a single rtn to be run.
This rtn will stop with manual intervention stop code F020 through F02C, asking you to enter options needed to run this rtn. These stop code definitions are listed in "Manual Intervention"
following this CSB symptom index.
This rtn may be used for SOLC data link problem determination and repair verification when on-line tests (under host system control) are not available.
This SOLC link test is basically an echo test, with the primary SOLC station sending an SOLC Link Test command frame down the link. The primary station expects to get the same test frame back
if the remote end of the link rcv the test frame without errors. Some SOLC terminals respond only with a nonsequenced acknowledgment response rather than sending back the link test frame it rev.
Options are provided to run as an SOLC primary station or as an SOLC secondary station. The primary station option initiates the Link Test commands and expects to rcv responses. The secondary
SOLC station responds to test frames rcv; if the test frame was rcv without errors, the same test frame is sent ~ack as a response. If a test frame was rcv without block check errors and had either
more data than could be buffered or did not have the poll bit on in the control field, the secondary station responds with a test frame without optional data. All frames rcv with block check errors
or with abort detect conditions are counted as errors, and no response is provided. All frames rcv with an SOLC station adr other than the SOLC station adr selected in the F028 manual intervention stop code are counted as an unexpected or nonsupported frame, and no response is provided. No response is provided for frames with anything but a Link Test command field.
The structure of the Link Test command enabl~s this test to also run a local external duplex modem wrap if you select the primary station option and connect the xmt and rcv lines together properly. A remote wrap can be done if the remote end of the link can tie the xmt and rcv duplex lines together with proper loading, etc. Because the remote end of the link must store the test frame
and send it back, the wrap option does not work on half-duplex lines.
This rtn always stops on xmt errors such as modem check, time-out, or overrun; but it does not stop on rcv errors except for modem check errors unless an option is selected to stop on frames in
error or stop on any frame.
Continuation (select FUNCTION 5 and press START pushbutton) from the X6FO OX20, OX60, or OX61 error codes stops the rtn, clears all error counts and summary statistics, and restarts the test
from the xmt/rcvdata portions. This allows continuing the test on a manual switched-line connection without making a new connection. The same restart is used for the 0000 dynamic restart
option or the 0000 restart option at manual intervention stop code F02C. Any manual switched-line connection will not be broken until you abort the rtn or use a restart option that goes through
total hardware setup such as the 0002 restart code.
The format of all transmissions from this SOLC link test are:
PAO
PAO
F
A
C
dd
FC
FC
F
ee
where:
PAO = alternate data xmt char for clock correction; will be X'AA' if N RZI mode is not being used or X'OO' if N RZI mode is being used.
= SOLC flag char composed of a 0 bit, followed by six 1 bits and another 0 bit (X'7E').
F
= SOLCstation adr.
A
= SOLC control field; will always be X'F3' if a Link Test command/response is being sent, or X'97' if a frame reject response is being sent.
C
dd
= optional xmt/rcv data field when the Link Test command is being used. When the frame reject response is being sent, the first byte of this field is the command field of the rev frame
that is being rejected; the second byte is set to O's (it is defined as the send and rcv sequence counts); and the third byte is set to X'04' if more data was rev than could be buffered, or to
X'01' if the Link Test command was rcv without the poll bit on.
FC = frame check sequence. Two frame check char are always sent. Their bit configuration varies according tot he SOLC station adr, control field, and optional data fields.
ee
= an ending transmission of X'FF' to make the lines go to an idle state and to allow time for bits to be sent before dropping the 'RTS' lead on xmt turnarounds.
All the data defined above between the two flag char is defined as a frame. All references in this document to th~e frame refer to this portion of each xmt or rcv segment of data. Note that if a
frame is being sent/rcv in NRZI mode, the actual bit configuration on the line will differ from that shown above. Also, SOLC 0 bit insertion/deletion applies to all char except the flags and
ending sequence defined under ee.
Z3705GDA CSB 1FT SYMPTOM INDEX
1FT CSB550
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Suspected Card
Error
Routine. Code
X6FO
Z3706GDA CSB 1FT SYMPTOM INDEX
Error Description
Function Tes:ted
FEALD
Page
Location(s)
FETMM
Page
1FT CSB 552
Comments
XXXX Test statistics and error count are available while the test is running and at the manual intervention F02C test completion code. In addition, certain reg are used for current status indicators and may
be displayed while the test is running or at the manual intervention F02C stop code. Following is the definition of the status indicators:
X'1E'reg contains the current xmt and rcv line status.
Byte 0 of reg X'1 E' = last rcv frame type indicator; may contain one of the following indications:
X'OO' Time-out occurred on last rcv completion.
X'80' A good link test frame was rcv with no errors.
X'40' A frame reject response was rcv as the last frame rcv at this primary station.
X'20' An unnumbered acknowledgment was rcv as the last frame at this primary station.
X'lO' A frame-check-sequence err'or was detected in the last rev frame.
X'08' An invalid or nonsupported frame was rcv as the last rcv frame. This link test only supports the link test response, the unnumbered acknowledgment response, and the frame reject
response, if running as a primary station. The secondary station option will accept only a Link Test command, but it may respond with a link test response or a frame reject response.
This type indicator is also set if a partial frame was rev followed by an 'abort detect' sequence of seven or more consecutive 1 bits.
X'04' A valid link test frame was rcv, but it contained more data than could be buffered. If this is a secondary station, a command reject response is sent for this frame. The maximum length of
the rcv (and xmt) data buffer is 1024 char if the 3705 has more than 16K storage, or 10 char if the 3705 has only 16K of storage.
X'02' Invalid SDLC station adr rcv or, for primary station option with optional xmt data, the rcv data did not compare with the SDLC station adr or optional xmt data that was sent. The SDLC
station adr that you provide in the manual intervention F028 stop code is used to make this comparison. If the secondary station option was selected, this frame will not be responded to.
X'01' A hardware-detected error such as .modem check or overrun has been detected. No response is made to any frames rcv with this type of error.
Byte 1 of reg X'1 E' = xmt line status and other info bits. Multiple bits may be on in this byte as opposed to byte 0, which never will
defined as:
hav~
more than 1 bit on. The bits within this byte are
X'SO' A reply is pending to be sent to the last frame rcv at this secondary station.
X'40' A command reject reply is now being sent or was the last frame xmt from this secondary station.
X'20' A Link Test command (from primary station) or response (from secondary station) was the last frame sent or is being sent at this time.
X'10' A xmt initial operation is being done or was the last xmt operation done. This xmt initial is done to set 'RTS' and to wait for 'CTS' from the modem intf for the first xmt operation of all
primary station options and for secondary station options when 'RTS' should be on at a" times. See manual intervention stop code F020 for this option.
X'OS' Xmt line is. busy if this bit is on.
X'04' Rev line is busy if this bit is on.
X'02' Bit not defined. May be used as added indicator at later time.
X'01' Bit not defined. May be used as added indicator at later time.
X'1 F' reg contains the accumulated xmt and rcv line status indicators. The bits in this reg have the same meaning as the bits defined for reg X'1 E' except once these bits are set on, they are not reset
until the test is restarted. These bits serve as a summary of a" the xmt and rcv operations that have been done up to the time this reg is displayed.
X'1D'reg is used to control the EO display code that is put out to the panel DISPLAY B lights (if DISPLAY/FUNCTION SELECT switch is in POSITION 4, 5, or 6). This reg is cleared to O's at
approximately 2-second intervals and, in between this clearing to O's, it is used as an accumulator of all the bits defined in the reg X'1 E' bits.
:) )
'-.
''-eee'
(' 0
ej
C) J
\......
,~
10
':)
....
'-
,
0
"-j
)
"".
'-.
.
)
(".'t;.
(~.
\.....j
\.~/
("~
\ e~/
(~
'- ./
,f.~,
'-J
0
1""1
"--./
'--./
d
I
~
\"j
f~
I.
)
"-.. ..
(~
..;J
0,
\, .....!
'\
',-
/"
f'
.,..".\
/'l\
,---y
(~,
.
I
~
(~
\.ej
t
(/ (
( ( ( (
(~
(
f
(
(
f/
(
(
(
(
(
(
(
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Suspected Card
Error
Routine
X6FO
Function Tested
Code
Error Descriptton
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
XXXX X'46' reg is the scanner display reg. Rtn X6FO sets the display bit in the ICW for the rcv line used in this test. For half-duplex lines, this reg gives you the current line intf conditions for both the
xmt and rcvoperations. For duplex lines, this reg contains the rcv line intf conditions. Following are bit definitions for byte 0 of this reg:
Bit
Hex
0
80
1
2
3
4"
5
6
40
20
10
08
04
02
Meaning if bit is on
'CTS' is active; should be on while in xmt mode and may be on while in rcv mode. For duplex lines, this bit probably will not be on because it reflects the status of the rev half of
the duplex pair.
'Ring indicator' is active.
'DSA' is active; should be on for nonswitched lines and should come on after line is connected for switched lines.
'Rcv line signal detect' (carrier detect) is active, should be on while rcv and may be on while xmt.
'Rcv data bit buffer' is a 1 bit; should vary as rcv data varies.
'Diag mode' bit is on; but it should not be on in this test.
'Bit svc req' bit is on; should be on once each bit svc.
EOnn display codes. While the link test is running, various display codes (except E06F) are displayed in DISPLAY B if you have the DISPLAY IFUNCTION SE LECT switch in function POSI-
TION 4, 5, or 6. These display codes are displayed approximately once every other second, with the DISPLAY B lights cleared to 0 between each EO display. These EO display codes are defined as:
EOOO (alternating with EOFF) Waiting for 'DSR' to come on before doing any xmt or rcv operations. These codes will be continuously displayed until 'DSR' comes on by completing a manual
switched connection or by connecting (or jumpering) the proper modem intf leads. On a nonswitched-Iine connection, you will not see this display code if 'DSR' is always on
(as expected).
E060
A good test frame was rcv within the last 2 seconds, and no other error was detected (except a possible time-out).
E061
Nothing was rcv (time-outs) during the last 2 seconds.
E062
A frame-check sequence error was detected in some frame during the last 2 seconds.
E063
A nonsupported or invalid frame was rcv during the last 2 seconds.
E064
More data was rcv than could be buffered during the last 2 seconds.
E065
A frame reject response was rcv at this primary station during the last 2 seconds.
E066
An unnumbered acknowledgment was rcv at this primary station during the last 2 seconds.
E067
Either of 3 conditions may exist:
1- SDLC station adr did not compare.
2- Rcv data did not compare with xmt data.
3- Secondary station rcv more data than could be buffered.
In all cases, display code E067 indicates that the data rcv does not compare with data xmt.
E068
A hardware-detected error such as modem check or overrun has been detected during the last 2 seconds.
E06F
This code is display.ed if you are using the dynamic communication option (FUNCTION 1 and switches B-E set to DOnn) and have entered a DOnn code that is not defined. No action is
taken if this-code is .displayed.
DOnn dynamic communication codes. These dynamic communication codes allow you to terminate or restart the link test at various points within the test. You enter these codes while the pgm is
running by setting the DISPLAY IFUNCTION SELECT switch -to FUNCTION 1, by setting the selected code in switches B-E, and then pressing the INTERRUPT key on the control panel. These
dynamic communication options are the same as those defined in the F02C manual intervention stop code definition. They are repeated here in a summary form. For more details, see the F02C
stop code definition.
DOOO
Restart link test at xmt/rcv data point (no line resets).
D001
Restart rtn from beginning, including asking for options.
D002
Restart link test, including hardware resets and enables.
D003
Stop rtn at F02C stop code and display statistics.
D004
Terminate rtn after hardware resets.
Z3706GDA CSB 1FT SYMPTOM .INDEX
1FT eSB 554
Z3705GDACSB 1FT SYMPTOM INDEX
Routine
X6 FO
Error
Code
Function Tested
Error Description
SI npected Calrd
Pr~ . .
FEALD
FETMM
Location(s)
Mask
Page
Page
1FT CSB 556
Comments
XXXX Statistics at link test termination.
X'TC'reg contains the adr of a statistics table in storage. At all times while the test is running and at the manual intervention F02C and X6FO OXnn stop codes, you can get the storage adr of the
statistics table from this reg and can display the storage locations for the following half-word counters. Following is a list of what is available in these statistics:
Hex displacement within statistics pointed to by reg X'TC'
00 Number of SDLC link test frames xmt successfully. This count does not include frame reject responses sent from a secondary station.
02 Number of SDLC link test frames rcv with no errors. If this is a primary station, the rcv SDLC station adr and, (if used), the optional data must compare in order to have 1 added to this count.
On a normal manual intervention F02C completion at a primary station, this count should match the number of test-frames-xmt count if no errors have been detected. An exception is when
the secondary station responds with unnumbered acknowledgments to test frames; then this count should be 0, and the rcv unnumbered-acknowledgments count should match the number of
test-frames-xl'nt count.
04 Number of frames rcv with frame-check-sequence errors.
06 Number of frame reject responses rcv at this secondary station.
08 Number of unnumber~d acknowledgments rcv at this secondary station.
OA Number of frames rcv that were not included in other rcv counts. This count includes frames rev with invalid SDLC station adr, nonsupported commands/responses, nondata compares with
optional xmt data and frames terminated by an abort detection condition. Note that some of these conditions may have caused a frame-check-sequence error and be included in the framecheck error count rather than in this count.
OC For a primary station, this field contains number of test frames requested to be sent manual intervention. If this field is all O's and a primary station option was selected, test frames will be sent
continuously, allowing for rcv, etc., without ever terminating the test.
OE Number of hardware errors detected, such as modem check or overruns, on the xmt and rcv operations.
10 Number of frame reject responses xmt by this secondary station.
Following are the error stop codes that may occur in this test. Note that any error stop codes beginning with 1 or 2 in DISPLAY B byte 0 bits 0-3 are defined in "Common Error Stops" following
this CSB symptom index. The DISPLAY B codes starting with F are defined in "Manual Intervention following this CSB symptom index.
OX07
Auto-call failed to complete
Reg X'15' byte 1 = SOF bits 0-7. SOF bit definitions for auto-call are:
An auto-call error has been detected. Reg. X'15' byte 0 contains an
error indicator number. Determine error indicator and see the following description:
Bit 0 = (lR) intrpt remember.
Bit 1 = (PWI) power indicator.
Bit 2 = (CRO) call request.
Bit 3 = (DLO) data line occupied.
Bit 4 = (PNO) present next digit.
Bit 5 = (OPR) digit present.
Bit a =(COS) call originate status.
Bit 7 =abandon call and retry.
Error Indicator
1 Error in auto-call connection. Reg. X'15' byte 1 contains SDF
bits in error. SDF bits 0-4 are on; 5-7 are off. Also it indicates
an error if LCD is not = 3 and PCF not = 4 (reg. X'45' byte 0).
2 Error in dialing. See error indicator l' description.
4,5,
and 6 If last digit dialed was not an EON digit, PND may come on
and cause a L2 irpt if the distant station does not answer
immediately. The same thing will occur with EON, as last
digit, on some OEM (non-I BM) and on IBM auto-call units
that do not have the EON feature strapped on. On some OEM
auto-call units, the EON will c;:ause the auto-call unit to transfer control to the modem/data set with 'DSR' on immediately,
even though no distant station has been connected and given
an answer tone.
4 Error indicating PWI, CRO or OLO not on. Reg X'15' byte 1
bits 1,2, and 3 should be on.
5 No auto-call completion (time-out). Reg X'15' byte 1 bit
(COS) should be on.
a
('
'-
)""
~
('
\. )
()
'--
It<'~
'", .-J
~
,,-y
i~
"._>;)
r C~)
.
"...
0
\..j
,_./
"-,
a
Abandon-call and retry came on. Reg X'15' byte 1 bit 7
came on.
"-.j
(~
I'e"
\
~./
J'
r"-, . /
0\c,j
/"-'"
'-...../
"'-\
\ ... /
I
0
.
.
"\
"-~
"-,/
I
r~
"-,./
(~
j
("
"
"
/
/~.
\.
'"-.~.
,
t, (
(
(
(
(
(
(
(
(
«
(
(.'
(
(
(
{
(
(
(-
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
....
Routine
Error
Code
X6FO
OX20
Xmt line operations
A xmt line error has been detected. Reg X'13' =accumulated ICW
bits 0-15 during this xmt operation. On each L2 irpt, ICW bits 0-7
are stored together and saved for this error display. If reg X'15'
byte 0 bit 3 (X'10') is on, the xmt line has timed out due to 'CTS'
not coming on or due to some other xmt failure such as loss of xmt
clock.
See X6FO XXXX for more reg and error states. If
continuing from this error stop by selecting FUNCTION 5 and pressing START, the test restarts at the
xmt/rcv portion without hardware reset and enable.
This error may be found more easily in rtn XeCE.
OX60
Rcv error completion
This error stop occurs.if a modem check has been detected (lCW bit 3
on) while in rcv mode. This stop also occurs if you select the options
to stop on any frame or any frame in error. Reg X'13' = ICW bits
accumulated during this rcv operation by storing ICW bits 0-7
together and saving them on each L2 irpt. Note that pgm does not
stop on rcv time-outs but sets up to xmt again if a primary station or
to rcv again if a secondary station. Reg X'16' =adr of rcv data buffer
in storage, and reg X'19' =adr + 1 of last rcv char. Note that reg
defined in X6FO XXXX provide more info.
See X6FO XXX X notes for test run details, reg, and
test statistics. To continue from this stop, select
FUNCTION 5 and press START. The test restarts
at the xmt/rcv portion of the test without hardware
resets and enables.
OX61
Rcv frames
This stop code occurred because you selected an option to stop on
the type of frame just rcv. Reg X'1 E' defines type of frame rcv and
is defined in X6FO XXXX. Reg X'16' = adr of start of rcv data
buffer. Reg X'19' =adr + 1 of last char rcv (less frame-check char).
Reg X'14' = accumulated frame-check char accumulated by this pgm
and should = X'FOB8' if no errors occurred. Reg X'13' = last 2 rcv
char (prior to flag char) and should be the actual rcv frame check
sequence.
See X6FO XXX X for reg and test statistics. Tocontinue, select FUNCTION 5 and press START. The
pgm restarts at the xmt/rcv data portion of the test
without hardware reset and enable operations but
the pgm clears the stat counters.
Function Tested
E.rror Descr'iption
Suspected Card
Location(s)
Program
FEALD
Page
FETMM
Page
Comments
Z3705GDA eSB 1FT SYMPTOM INDEX
1FT CSB558
(
This page intentionally left blank
o
\,
.•. ~
'
./
r\
r\
(
(
(
«
(
(
(
{
(
(
«
(
(
(
(
(
(
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Routine
X6F2
Error
Code
Function Tested
XXXX Wrap data test - BSC and SDLC. This is a manual intervention wrap rtn, which runs only if you set the CE sense switch to run manual intervention rtn or request a single rtn to be run.
At the first manual intervention stop F049 enter the desired options:
SWITCH
BCD E
o- - 1 - 2 - -
3 4
8
-
0
4
0
0
0
0
0
0
0
0
First oscillator
- Second oscillator
- Third oscillator
Fourth oscillator
- Data rate select
- External clock
0 No request
0 Auto-call request (for manual intervention stops F029, F02A, and F02B, see pages CSB 804 and CSB 806) *
1 Xmt without a rcv line (no wrap)
2 Xmt and rcv; swap lines and repeat
3 Xmt and rcv same pair
At manual intervention stop F050, enter a valid xmt line adr and wrap type operator (does not apply to auto-call requests).
BSC
SWITCHES
BCDE
SDLC
SWITCHES
BCDE
5 X X X
6 X X X
7 X X X
D X X X
E X X X
F X X X
Normal (DTR/not diag mode). An external wrap facility must be provided to wrap data with this option.
Line set wrap (diag mode/not DTR)
Modem wrap (diag mode/DTR) for modems that use the modem wrap signal
At manual intervention stop F052,enter a valid rcv line adr and wrap type operator in the same format as in stop F050.
* Auto-call operation only (data link will not be established).
Z3705GEA 1FT SYMPTOM INDEX
1FT CSB 600
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Z3705GEA CSB 1FT SYMPTOM INDEX
Routine
Error
Code
X6F2
OX01
A set mode was executed on the rcv line (adr in reg X'13').
Either the expected L2 did not occur or the wrong line irpt. Reg
X'14' contains the irpt line adr.
OX02
The LCO of the rcv line was checked for a feedback check.
A feedback check occurred in the set mode to the rcv line.
OX03
A set mode was executed on the xmt line (adr in reg X'll').
Either the expected L2 did not occur or the wrong line irpt. Reg
X'14' contains the irpt line adr.
OX04
The LCO of the xmt line was checked for a feedback check.
A feedback check occurred in the set mode to the xmt line.
OX06
The modem should cause 'CTS' to come up on the xmt line after
approximately 300ms.
The xmt line display reg did not contain the 'CTS' bit.
OX07
The modem should cause 'OSR' to come up on the xmt line.
The xmt line display reg did not contain the 'OSR' bit.
OX10
An irpt was expected from either the xmt or the rcv line. The test
is xmt and rcv (if rcv is selected).
No irpt received (rcv line, xmt line or unexpected).
OX13
The xmt and rcv should irpt for svc each char time.
The rcv line has not irpt after at least 20 xmt line irpt.
OX15
Checking input X'44' for correct flags set
Flags set in SCF during the rcv were not set properly. Reg X'15'
contains the adr of the flags and data rcv.
OX16
Checking data rcv against the data expected
The data rcv is not equal to that expected. Reg X'15' byte 1 is the
data rcv, byte 2 is the data rcv. Reg X'l7' points to the expected
byte; reg X'16' points to the rcv data; SCF flags in byte 1 are at
adr pointed to by reg X'16'.
OXD8
Auto-call failed to complete
An auto-call error has been detected. Reg. X;15' byte 0 contains an
error indicator number. Oetermine error indicator and see the following description:
Error Description
Function Tested
Suspected Card
PrQ9."
locattion,{s,)
Mask
FEALD
Page
FETMM
Page
Bit 0 = (lR) intrpt remember.
Bit 1 = (PWI) power indicator.
Bit 2 = (CRO) call request.
Bit 3 = (OLO) data line occupied.
Bit 4 = (PNO) present next digit;
Bit 5 = (OPR) digit present.
Bit 6 =(COS) call originate status.
Bit 7 =abandon call and retry.
2 Error in dialing. See error indicator 1 description.
3 Error indicating PWI, CRO or OLO not on. Reg. X'15' byte 1
bits 1,2, and 3 should be on.
)
'"
/
('\
\" /
r '\
I,
I
\....~j
~,
"
j
/"",\
"j
"
r"1
..
/
'" /
'""\
"
.
./
"-._-,,/
(
j
'--.-/
\
"',
../
1'"
('''~
..
~.-' ~~
''...
./
Comments
Reg X'15' byte 1 =SOF bits 0-7. SOF bit definitions for auto-call are:
1 Error in auto-call connection. Reg. X'15' byte 1 contains SOF
bits in error_ SOF bits 0-4 are on; 5-7 are off. Also it indicates
an error if LCO is not =3 and PCF not =4 (reg. X'45' byte 0).
,/~
esa 602
The reference data for this test is variable and is
not given.
Error Indicator
/
1FT
"
'"
f
"
/
",
''\
/
~
""
.. /
(''l.\
'"
/
('I
)
~"
'-,./
/",\
(
(
(
Routine
Error
Code
X6F4
XXXX
(
(
(
(
(
(
Function Tested
(
(
(
Error Description
(
(
(
Suspected Card
Location(s)
(
{
Program
Mask
(
FEALD
Page
(
FETMM
Page
(
«
Comments
X.21 line set test. This is a manual intervention rtn, which runs only if directly selected or the CE sense switch is set to run manual intervention rtn.
This rtn tests the X.21 line sets' unique handling of 'DSR' and 'CTS'. If the switch option is specified, the bit-pattern generator and state-generation circuits are also tested. The xmt and rcv lines
must be wrapped (transmit T and C signals connected to the receive R and I signals respectively) by an external facility. Refer to CTR LPN L Section in Volume 2 for wrap test block info.
Most of the tests are performed on the xmt line, with the results being checked on the xmt and/or rcv lines. This rtn should be run twice on a half-duplex pair, reversing the adr specified as the xmt
and rcv lines the second time.
Data is not explicitly wrapped by this rtn. Use rtn X6F2 for this purpose and to further verify the line set and external wrap connection.
Refer to logic page VA017 for the jumper information. The following manual intervention stops occur.
At manual intervention stop F055, enter the rtn options as follows:
Switch
BCD E
X Y Z 2
X Y Z 3
2400 bps
2400 bps
Jumpers are in delay position.
Jumpers are in no delay position.
X 8 Z 4
X 8 Z 5
4800 bps
4800 bps
Jumpers are in delay position.
Jumpers are in no delay position.
X 8 Z 6
X 8 Z 7
9600 bps
9600 bps
Jumpers are in delay position.
Jumpers are in no delay position.
X 8 Z 8
X 8 Z 9
48K bps
48K bps
Jumpers are in delay position.
Jumpers are in no delay position.
Z3705GEA CSB I FT SYMPTOM INDEX
1FT CSB 602.1
This page intentionally left blank
/
"'
'\
)
01
\~,
~j
,/" ' \
/"""':
"'-- ./
'"" , /
/~~-:-~1
',,-, j
"
-""\
"- ..-
,
~
"--/'
(~
\~
/
"-J
""
r"""·
\
./
('"'-.
,
/
(""'-"'"
\
"
./
:~
/~
,f"",,\
('
.,
.' "\
"'-/
"'
"-
....
./
\~
,,' /
/
,
/
f'\
j
(
"
'''},
/
/
...~-
!"
'"',
',,~/
/"
;<
(
",--,j
'
--,/
(
«
(
(
«
(
«
(
(
c
(
(
(
(
(
(
(
(
(
3705·80 CSB I FT SYMPTOM INDEX· Cont.
Error
Routine
X6F4
Suspected Card
location (5)
FIIIIIIICtiom T es:t!ed
Code
Program
Mask
FEAlD
Page
FETMM
Page
Comments
XXX X where x
= 0 If the rtn is not to be looped without respecifying the manual input.
x = 1 If the rtn is to be looped without respecifying the manual input.
y = 0 If internal 2400 bps clock is to be used.
Note: This option is valid only for 2400 bps.
y = 8 If external clock is to be used.
z = 0 If the line set is jumpered for nonswitched half-duplex operation.
z = 1 If the line set is jumpered for switched operation.
z = 2 If the line set is jurnpered for nonswitched full-duplex operation.
At stop F056, enter the xrnt line adr.
Switch
BCD E
o
X X X
XXX is the xmt line adr as defined in the F001 manual intervention stop code.
At stop F057, enter the rcv line adr.
Switch
BCD E
o
X X X
XXX is the rcv line adr as defined in the F001 manual intervention stop code.
At manual intervention stop F059, disconnect the external wrap facility. This stop code will be bypassed if the loop option was specified in response to manual intervention stop code F055.
Error stops in this rtn, except for the set mode pretest errors (1 X03 and 1 X041. are most likely caused by failures in the line set cards if the other type 2 scanner rtn have run successfully. Refer to
logic page VAOOO for line set card locations. Anyone of the three cards of the line set could be causing the error as no attempt is made by this rtn to isolate failures any further.
OX05
OTE controlled not ready state
12 bit times after the rcv line was initialized an alternating bit pattern
1 was not detected in the SOF.
Note: Error OX05 will occur only if switched and external clock options are specified.
OX07
OTE ready state
10 bit times after OTR was set on the xmt line, all 1's were not
detected in the SOF of the rcv line.
OX08
OSR active on the xmt side.
OSR on the xmt side was not active.
Note: Error OX08 will occur only if nonswitched duplex or switched option is specified.
OX09
OXOB
'OSR' active on the rcv side.
'OSA' on the rcv side was not active.
'OSA' on the rcv line stays active at least 12 bit times after diag
mode is set on the xmt line.
'OS A' became inactive on the rcv line too soon after 'diag mode' was
set on the xmt line.
OXOC
'OSA' on the rcv line becomes inactive 22 bit times after diag mode
is set on the xmt line.
'OSA' on the rcv line was still active 22 bit times after diag mode on
the xmt line should have forced 'ctrl' and 'xmt' and, therefore,
'indicate' and 'rcv' on the rcv side to O's.
OXOD
A bit pattern for a SDLC flag is generated on the rcv line after 'OSA'
becomes inactive.
A SOLC flag bit pattern was not detected in the SOF within 20 bit
times after 'OSR' became inactive.
Note: Error OXOO will occur only if the switched option was specified.
OXOE
A bit pattern for an ASCII SYN is generated on the rcv line after
'DSR' became inactive.
An ASCII SYN bit pattern was not detected in the SOF within at
least 20 bit times after the SOLC flag bit pattern was detected.
Note: Error OXOE will occur only if the switch option was specified.
OX12
All marks generated by the xmt line and rcv when diag mode is
reset and 'OTA' is set on the xmt line. Oata rate select is also set at
this time, but it should have no effect because 'RTS' is off.
All marks were not detected in the rcv line's SOF 10 bit times after
the set mode irpt from the xmt line.
Z3705GEA CSB I FT SYMPTOM INDEX
1FT CSB 604
(
3705-80 CSB 1FT SYMPTOM INDEX - Cont.
Z3705GEA CSB 1FT SYMPTOM INDEX
Routine
Error
Code
X6F4
OX13
'Indicate' is inactive on the rcv line when 'RTS' is inactive on the
xmt line.
'Indicate' is active on the line before 'RTS' has been activated on the
xmt line.
OX15
'CTS' is inactive on the xmt line when 'RTS' is inactive on the xmt
line.
'CTS' is active on the xmt line before 'RTS' has been activated on the
xmt line.
OX18
'Indicate' becomes active on the rcv line when 'CTS' is activated on
the xmt line.
'Indicate' did not become active on the rcv line after 'RTS' was activated on the xmt line.
OX19
'CTS'delay
'CTS' became active less than 21 bit times after 'RTS' was set in the
line set ('Indicate' detected on the rcv line).
Suspected Card
Function T es:ted
Error Descrilption
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
1Ft eSB 606
Comments
Note: Error OX19 will occur only if the delay option was specified.
OX20
:CTS' becomes active after 'RTS' is activated
'CTS' did not become active within one scan time with no delay,
31 bit times with delay after 'RTS' was set in the line set ('Indicate'
detected on the rcv side).
OX21
Call request state
All O's were not detected in the rcv line's SDF when 'RTS', data rate
select, and 'DTR' are on in the xmt line.
Note: Error OX21 will occur only if the switched option is specified.
OX22
I
'DSR' stays active on the xmt line when 'Indicate' is active and the
rcv data line is held at space for at least 20 bit times.
'DSA' became inactive on the xmt line while a continuous space was
being rcv when 'Indicate' was active ('RTS' active on the xmt line).
Note: Error OX22 will occur only if the nonswitched duplex or switc ed option is specified.
OX23
'DSA' stays active on the rcv line when 'Indicate' is active and the
rcv data line is held at space for at least 20 bit times.
'DSR' becomes inactive on the rcv line while a continuous space was
being rcv when 'Indicate' was active ('RTS' active on the xmt line).
OX25
'DSR'stays active on the xmt line at least 12 bit times after 'diag
mode' is set on the xmt line.
'DSR' became inactive on the xmt .Iine too soon after 'diag mode' was
set on the xmt line.
Note: Error OX25 will occur only if the nonswitched duplex or switc ed option is specified.
OX26
'DSR' becomes inactive on the xmt line 22 bit times after 'diag
mode' is set on the xmt line.
'DSR' on the xmt line was still active 22 bit times after 'diag mode'
on the xmt line should have forced C and T and, therefore,
I and R on the rcv side to O's.
Note: Error OX26 will occur only if the nonswitched duplex or switc ed option is specified.
OX27
'DSR' did not become inactive on the xmt line when the external
connection was unplugged.
'DSR' becomes inactive on the xmt line when the external connection is broken.
Note: Error OX27 will occur only if the nonswitched duplex or switc ed option is specified.
X6F5
OX28
'DSR' becomes inactive on the rcv line when the external connection is broken.
'DSR' did not become inactive on the rcv line when the external connection was unplugged.
XXXX
High-speed local attachment oscillator speed test. This manual intervention rtn checks the 14.4KHZ/57.6KHZ high-speed oscillator that is supplied for the High-Speed Local Attachment Line
features. The frequency to be checked must be jumpered on the LIB type 1 board in which the oscillator is installed. See the following switch entry specifications for the jumper info. The oscillator frequency is checked to ensure that there is not more than a plus or minus 0.1 percent variation from its expected frequency.
The oscillator frequency and the line that it is to be checked on are entered in the ADDRESS/DATA switches at manual intervention stop code F05S as follows:
Switch
BCDE
0 X X X
1 XXX
1404KHZ test on line XXX (jumper on pin side A2G4B07 to A2G4B05)
57.6KHZ test on line XXX (jumper on bin sideA2G4B07 to A2G4B09)
,
Where XXX is the line adr as defined in the F001 manual intervention stop code.
(' ..."\.
"-- /
"
/
/
,
/
_.---
l
(.
-~-------
(
---
(/ (
(
--.~
(
(
(
(-
(
---
«-
._-------
(
(--.
--------.-
(~\
(-/
(/ (
(-
(
--~
.---------
(
(
(~'
(
(
(
(-.
(~\
{'"
/
(~'
(
(
('~
/
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Routine
X6F5
Error
Code
Function Tested
Error Description
Suspected Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
XXXX The oscillator frequency is determined by the number of bits shifted in the SDF versus the number of times through a pgm loop. The SDF is set to X'01 FE', and a bit count and pgm loop count are
initialized. Each time through the loop, the loop count is decremented by 1, and the low order SDF bit is checked. When the low-order SDF bit is 1, the SDF is reinitialized to X'01FE', and the bit
count is decremented by 1. If the loop count is decremented to 0 before the bit count, the residual bit count is compared to 0.1 percent of its initial value. If the bit coiJnt is decremented to 0
before the pgm loop count, the residual pgm loop count is compared to 0.1 percent of its initial value.
This rtn indicates failures if:
1.
2.
3.
4.
The frequency selected in ADDRESS/DATA switch B does not agree with the frequency selected by the jumper on A2G4.
The oscillator card is defective.
'External oscillator select' bit in the line set fails to set.
Oscillator gating cont~ols are defective.
OX01
Set mode to set external clock
No L2 irpt occurred.
A3L2
A3T2
A3T4
A3U2
A3U4
TA611
TB411
TB412
TB413
TB414
C"()20
C-160
Reg X'11' contains the line adr the L2 irpt was
expected from.
OX02
SDF shifting
SDF bit 9 did not set to 1 in the approximate 180 ms wait time.
A3L2
A2G4
TA611
VA070
C-020
SDF bits 1, 2, 3, 4, and 5 were set by an output
X'46' with X'01 FO'. Regs X'14' and X'13' contain
the state of the ICW bits 2.0-5.7 at the end of the
wait time. Reg X'14' contains the SDF bits 0-7 in
byte 1. Reg X'13' contains SDF bits 8 and 9 in
0.0-0.1 and external clock bit in 1.7.
OX03
Oscillator frequency
Oscillator under test running too fast. The bit count decremented
to 0 before the pgm loop count was decremented below 0.1 percent
of its initial value.
A3L2
A2G4
TA611
VA070
C"()20
Reg X'14' contains the residual loop count. Reg
X'16' contains the initial loop count.
OX04
Oscillator frequency
Oscillator under test running too slowly. The pgm loop count
decremented to 0 before the bit count was decremented below
0.1 percent of its initial value.
A3L2
A2G4
TA611
VA070
C"()20
Reg X'14' contains the residual bit count. Reg
X'16' contains the initial bit count.
Z3705GEA CSB 1FT SYMPTOM INDEX
1FT CSB 608
(
--
-,
----------
-------~---
----------
\or -
---------
"
This page intentionally left blank
/
~.~
~ ...~
0\ .J 0"'--)
I'l)
j
'...j/
/1"«"1
',--)/
("'l
"-.j
0
I
"-../
_
./-~
',-,)
"".
"j
0
~j
('~
(>,
\ ...
\
./
./
0
.
.
\ . .. .J
t ..... \.j
c:
1"'-):.,
"'- j
J
,[~
.'-.../ .-
f~
"..._./
,~
"'-. .J
(
f"
\",j
r~
./
f"~
\j
~,
r-"
\.......
J
/:'
"
(~
, .,/ -
-----~------
{
(
----
(
-~-
{
..
-------
-----""-.-~--------
(/ (
(
(
«
(
(
(~
-
(
(~
(' (
(/ (
(
-
----_.'-
(
-
(
(
(~
(
(-
("--
(--: (
/
(:' (
./
(
(-
(-/ (
3705-80 CSB I FT SYMPTOM INDEX - Cont.
Error'
Routine. Code
Function Tested
Error Description
84 lSP8Cted Card
Location(s)
Program
Mask
FEALD
Page
FETMM
Page
Comments
NOTES:
The following notes, which are referred to in either the error code description or the error code comments, provide reg contents and other info for that error code.
Note 1: The expected char-svc L2 irpt either did not occur, or the char-svc L2 irpt was from the wrong line adr. The contents of the following reg indicate the type of error and the expected data:
Reg X'11' = line adr the char-svc L2 irpt was expected from. This line adr in in the format used to set ABAR.
Reg X'14' = either the line adr obtained from ABAR of the line that caused the char-svc L2 irpt; or, if reg X'14' = 0000, the expected char-svc L2 irpt did not occur.
Note 2: The expected xmt line char-svc L2 irpt either did not occur, or the char-svc L2 irpt was from the wrong line adr. The char-svc L2 irpt should be from the xmt line adr. The following reg
indicate the type of error and the expected data:
Reg X'11' = xmt line adr the char-svc L2 irpt was expected from. This line adr in in the format used to set ABAR.
Reg X'14' =either the line adr obtained from ABAR of the line that caused the char-svc L2 irpt; or, if reg X'14' =0000, the expected char-svc L2 irpt did not occur.
Reg X'13' =' rcv line adr. There should be no rcv line char-svc L2 irpt at this time. Error could be caused by a feedback check setting LCD to F on the xmt line, by the xmt or rcv line
selecting the wrong oscillator, by a clock correction failure in the BCC card of the LIB, or by some other line set, LIB, or scanner problem.
Note 3: The expected rcv iine char-svc L2 irpt either did not occur, or the char-svc L2 irpt was from the wrong line adr. The char-svc L2 irpt should be from the rev line adr. The following reg indicate the type of error and the expected data:
Reg X'13' = rcv line adr the char-svc L2 irpt was expected from. This line adr in in the format used to set ABAR.
Reg X'14' = either the line adr obtained frqm ABAR of the line that caused the char-svc L2 irpt; or, if reg X'14' = 0000, the expected char-svc L2 irpt did not occur.
Reg X'11' = xmt line adr. There should be no xmt line char-svc L2 irpt at this time. Error could be caused by a feedback check setting LCD to F on the rcv line, by the xmt or rev line
selecting the wrong oscillator, by a clock correction failure in the BCC card of the LIB, or by some other line set, LIB, or scanner problem.
Note 4: The 'test data' latch and its function in the diag wrap tests is a major tool in problem determination
for the type 2 communication scanner internal functional tests. Most of the rtn that
I
xmt and/or rcv data depend on the proper setting of the 'test data' latch in the communication scanner. The test data latch is set to a mark condition when an ICW is scanned and that ICW is for a
line adr that is in diag mode, has a bit svc pending, and any of the following conditions apply:
a. Xmt state and next bit to be xmt is a 1.
b. A set mode (PCF = 1) is being done.
c. Disable communication scanner (power on reset) is active.
In step a, the next bit to be xmt may be from SDF bit 9, PDF bit 7, or a 1 bit forced by some other conditions, such as xmt initial.
The 'test data' latch may be set to a space condition when an ICW is scanned and that ICW is for a line adr that is in diag, has a bit svc pending, is in xmt state, and the next bit to be xmt is a O. The
o bit to be xmt may be from SDF bit 9, PDF bit 7, a forced start bit, 0 bit insert, or 0 bit break signal.
Line adr in rcv mode strobe data into the rcv data bit buffer from the 'test data' latch if, when the ICW is scanned the line is in diag mo.de, a bit svc is pending, and 'DTR' is not on.
During diag mode transmissions, the transitions between mark and space in the 'test data' latch should follow the bitsvc requests caused by the xmt clock (oscillator). The ICW for the diag xmt line
must be scanned before the 'test data' latch can be set or reset, so there may be a delay of up to one full scan period before the 'test data' latch is set or reset after the bit svc request is made. The
period differences between the scan cycles and bit svc requests usually result in an average delay of one-half of a scan period between the bit svc and the setting or resetting of the 'test data' latch.
An unstable trace appears on the 'test data' latch during diag xmt operation caused by this delay. This unstable trace also occurs at the send data bit buffers during normal line xmt; unstable trace
does not occur on the actual xmt line because the bit to be xmt is not set into the xmt trigger until the next bit svc request time.
There is an average delay of one-half of a scan period between the time When the rcv line bit svc occurs and the rcv data bit is gated into the SDF or PDF of the rcv line's ICW.
The above two delays on the diag xmt and rcv operations normally account for less than one-half of a bit time. This delay usually will have no affect on a diag wrap operation except that the rcv
clock correction circuits will be forced into action to correct for the jitter on the 'test data' latch. With the higher speed oscillators, this delay, along with rcv clock correction, may add up to more
than half of a bit time. When this delay exceeds half of a bit time, the sequence of xmt and rcv line char-svc L2 irpt may be affected. This sequence of irpt is explained in more detail in notes 5
and 6.
Note 5: The rtn did a diag wrap data using SIS I,.CDs. The rcv line adr is expected to cause its char-svc L2 irpt with a char being rcv before the char is completely xmt on the xmt line adr. This
occurs only in diag mode when the 'test data' latch is in use (see note 4). During the manual intervention external data wrap test and during normal line operation, this does not occur because there
is an extra bit time delay between the send data bit buffer and the xmt trigger. The rcv irpt occurs before the xmt irpt because the rev line strobes the rcv data bit and requests its char-svc L2 irpt
near the middle of the first or only stop bit at the end of the rev data char. The xmt line does not request its char-svc L2 irpt until the end of the last or only stop bit at the end of the char being
NOTES FOR CSB 1FT SYMPTOM INDEX
1FT CSB 700
3705-80 CSB I FT SYMPTOM INDEX - Cont.
NOTES FOR CSB 1FT SYMPTOM INDEX
Suspected Card
Error
Routine
Code
, location(s)
Function Tested
Program
Mask
FEAlD
Page
FETl\t1tJ1
Page
1FT CSB 702
Comments
xmt. This does not apply to the xmt of a PAD char (all 1 bits with no start bit) ,since the rcv line, in SIS mode, should not cause a char-svc L2 irpt when rev pad char. If the line adr are irpt out of
sequence and if neither line has had a feedback check (LCD = F), there are many possibilities that can cause the error. Some of them are:
a.
b.
c.
d.
Oscillator select bits are not selecting the correct oscillator or blocking the other oscillators causing extra or missing strobes.
Start, stop, or tag bit recognition is not working.
LCD is not being recognized as a SIS type.
Rcv clock correction is working incorrectly.
See note 7 for aids in isolating problems to the communication scanner, LIB, or line sets. Another possible failure is that the oscillator is running much too fast or that an oscillator above 1200 is
installed but is configured as aslowe~ speed oscillator in the CDS. If the oscillator is much too fast (or too 'many strobes are occurring from some other source), the irpt can occur out of sequence
due to the 'test data' latch delays explained in note 4. This condition can be tested by running rtn X67A, which is the oscillator speed test. If the CDS indicates that the first installed oscillator
exceeds 1200 bps, some portions of a few rtn are bypassed due to the delay times explained in note 4.
Note 6: The rtn did adiag wrap data using sync LCDs. The rcv line adris expected to cause its char-svc L2 irpt with the char being rcv before the char is actually fully xmt. The rcv line should not
irpt until it detects a rcv data bit pattern that is recognized as a SYN char for the particular line control (LCD) in use. Therefore, the xmt line adr normally has several char-svc L2 irpt to xmt PAD
and SYN characters before the rcv line has any. The rtn shift the xmt line's data char by one or more bit positions to cause the rcv line to recognize the SYN char bit pattern one or more bit times
before the end of the xmt char. This is done to ensure that the sequence of irpt would be predictable so that the line sets could be tested for clock correction or selection errors. Without this xmt
char shifting, out-of-sequence irpt could occur on high-speed oscillators due to the 'test data' latch jitter explained in note 4 and the different type clock correction done in sync mode over SIS
mode. If the line adr are irpt out of sequence arid if neither line has had a feedback check (LCD = F), there are many possibilities that can cause the error. Some of them are:
a.
b.
c.
d.
Oscillator select bits are not selecting the correct oscillator or blocking the other oscillators, causing extra or missing strobe pulses.
Tag bit recognition is not working.
LCD is not recognized as a synchronous LCD.
Rcv clock correction is not working properly.
See note 7 for aids in isolating problems in the communication scanner, LIB or line sets. Another possibility is that the oscillator is running much too fast or some other failure is causing too many
strobe pulses. In this case, the irpt could occur out of sequence due to the 'test data' latch jitter and delays explained in note 4.
Note 7: This note is referred toby those rtn that run on more than one line adr (not necessarily at the same time) and allow you to use the continue function. This rtn allows using the continue
function after an error stop to help isolate a problem to the communication scanner, LIB, or I,ine sets. When an error stop occurs, record the line adr and other info about that error; then select
FUNCTION 5 and press the pushbutton to continue from that error stop. Other error stops for the same line adr will probably occur, but they should be ignored since they were probably caused
by the previous error or by over/under run. When the rtn has finished testing one line adr or a pair of line adr, it does a reset to the scanner and then starts the test on the next line or pair of line
adr. Because of this, the first error stop for each line adr should be recorded to develop a failure pattern to u~e to isolate the failure to one line adr, a pair of line adr, all the line adr in a LIB, or all
line adr in the scanner. If only one line adr or a pair of even-odd line adr fail, the problem is probably with the line set card for that position. If all line adr fail, the problem could be with LIB or
communication scanner adr failures or bad cable connections between the scanner and LIB. A bad bit clock contrQI card in the LIB could also cause all line adr in a LIB to cause failures that look
like line set failures.
'\
\
"
.7
'~
",y
0 0
)J
("~
\."Y
r')
",-y
rr-)
',,--
I
,~,
':
'
'~
("l
'---//
'~
"-'-_./
/
;r\-,
~,
j
'-,}
t'
~j
r"'" r'"
"'\,
\
j'
I
'I
'
"'-
---;/
i"'~,
r)
0
~
'-
,
/
("1
"'_/
~
'1
"--/
,~
,,-,j
r)
0
(-~
'~-j
("to
'",
./
r-""
:])
(''',
V
- -----" -------
(
(
(
{
--------
(/ (
(
------
-
(
(
(-
(
(
(
---
----
-,
f~-
(
«-
(' (
f
(
(
(
(
(-
(
(-
(
/'
(
/
(::
(.
-/
(
(
(
(~/
3705-80 CSB 1FT COMMON ERROR STOPS
Routine
X6XX
Error
Code
Functtoo Tested
Error Description
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Comments
Reg X'16' = storage adr of the scanner control block that is in
error within the CDS.
1X01
Configuration data set
CDS indicates it is not for the type 2 communication scanner or
that it has an invalid scanner number in its scanner type and number field.
1X03
Set mode
The L2 irpt that occurred during set mode was not from the
expected line adr. This is a pretest error so if you use the continue
function (FUNCTION 5). the set mode will be tried again.
1X04
Set mode
A feedback check occurred, setting the LCD field of the ICW to
X'F'. This is a pretest error so if you use the continue function
(FUNCTION 5), the set mode will be tried again.
1X05
Set mode
Missing the L2 irpt expected within .1 bit time after doing the set
mode. This is a pretest error so if you use the continue function
(FUNCTION 5), the set mode will be tried again.
1X06
Configuration data set
An invalid LIB type is defined for the scanner being tested.
Reg X'15' byte 0 = the invalid LIB type found in the CDS. Reg
X'11' =adr (as used to set ABAR) for the scanner/LI B/intf adr.
1X07
Configuration data set
An invalid line set type is defined for the line being tested. Refer
to the CDS section.
Reg X'15' byte 1 = the invalid line set type found in the CDS.
Reg X'11' = line adr being checked.
2X01
All functions not expecting or causing L1 irpt
Unexpected L1 irpt occurred with no CCU or adapter L1 error bits
on.
A3C2
TB131
6·082
2X02
2X03
All functions not expecting a L1 irpt or causing a L1 irpt
Unexpected L1 irpt occurred, indicating a type 2 scanner L1 error.
A3C2
TB131
B-130
All functions not expecting or causing a L1 irpt
L1 adapter (type 2 scanner) irpt occurred with no scanner error
reg X'43' bits on for the scanner causing this error.
A3C2
TB131
B-130
2X04
All functions allowing adapter L1 irpt
Cannot reset type 2 scanner adapter L1 irpt bits.
A3C2
TB131
B-130
Reg X'76' contains adapter irpt error bits.
2X05
2X21
2X33
2X44
All functions
An input/output check caused by a valid input or output inst.
A3C2
TB131
B-290
Reg X'74' contains adr of the valid input or output inst.
All functions not expecting L2 irpt but allowing L2 irpt to occur
Unexpected L2 irpt occurred.
A3L2
TA611
6-082
All functions
An unexpected L3 irpt occurred with no L3 irpt request bits on.
6-082
All functions
L4 unexpected reentrance. The DCM gives control to all rtn with
L4 PCI bit on (reg 7F byte 0 bit 7 on). This bit should never be
turned off and should never exit L4 except to L1, L2, and L3,
which are higher priority.
6-082
EOnn
Display info
This display is for info only. The nn after the EO is the LIB and
line adr now under test unless otherwise specified in the rtn write
up.
TA611
B-260
Reg X'14' = line adr (as used to set ABAR) of the ICW that irpt
in error. Reg X'11' = the line adr that the L2 was expected
from. If reg X'14' = 0000, no L2 occurred.
A3E2
TA341
B-260
Reg X'11' = line adr (as used to set ABAR) of the scanner/LiB/
line intf adr that the set mode is being done on at this time.
A3L2
TA611
B-310
Reg X'11' = line adr (as used to set ABAR) of the line set that
the set mode is being done on.
Reg X'76' contains adapter L1 irpt error bits.
This EOnn display is to let you know that the rtn is running.
I
COMMON ERROR STOPS
1FT CSB 750
----------
- ------- - - - -
This page intentionally left blank
/
"-,
',-y
I
r~
"-. ;J
()
()
f'~
\
"'_./
}
0)
"-.y'
,tf'<-~
,----)
!~
''------j
0"-.j
(-~
\--./
'"
r'"
\
I
./
/
r--- -""'-_/
0
\,-
--,/
--?"-~
-~ --~
/~.
',,_/
/ ' "I
"-_/
~-- ./
"-.j
r
(~
" --y
('
".
\
"----'
I~~,
!
"----j
/",\
(
(
(
(
(
(
(
(
(
(
('
(
(
c
(
(
(
(
(
(
3705-80 CSB I FT MANUAL INTERVENTION STOPS
Routine
F001
&ror
Code
Function Tested
Error Description
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Comments
Enter the line adr to be tested. Set switches B, C, D, and E to 0000 to test all adr, and set to FFFF to bypass all testing. Otherwise, enter the line adr as used to set ABAR. Refer to CS2 section in Volume 3
for a chart on all valid line adr. Some rtn will not accept the 0000 switch settings to test all installed line adr; and, in that case, you will get another manual stop code saying an invalid line adr was selected .
. To continue from manual intervention stops, set the required info into the STORAGE ADDRESS/REGISTER DATA switches B, C, D and E: set the DISPLAY/FUNCTION SELECT switch to function and
press the START pushbutton. Following is the format to use when entering the line adr:
Hex
Switch B
0
Switch C
0 for 1st scanner adr bits
Switch D
4 for
5 for
6 for
7 for
Switch E
0 for lines 0 or 8
2 for lines 1 or 9
4 for lines 2 or A
6 for lines 3 or B
8 for lines 4 or C
A for lines 5 or D
C for lines 6 or E
E for lines 7 or F
1st LIB, lines 0-7
1st LI B, lines 8-F
2nd LIB, lines 0-7
2nd LIB, lines 8-F
F002
Invalid scanner adr bits were entered in switch C. Re-enter the line adr as in stop code FOOl.
F003
The selected scanner is not installed or not configured properly in CDS. Reg X'16' contains the adr of the scanner block for the requested scanner. If reg X'16' = X'OOOO', the scanner is not configured. Reenter the request as in stop code FOOl.
F004
Invalid LIB adr selected. RIi-enter the request as in stop code FOOl. (Only 4 LlBs are allowed in the first scanner.)
F007
The selected line adr is not installed according to data in the CDS. This manual intervention rtn requires a line adapter to be installed to run tests. Re-enter the line adr as in stop code FOOl.
FOO~
The manual intervention rtn cannot run tests on the LIB or type of line adapter for the line adr selected. Re-enter the line adr as in stop code FOOl.
F020
Enter the link test line type and control options. Primary station option initiates link test; secondary station option responds only to link test command rcv from a remote primary station.
'RTS' = ON means that 'RTS' is to be left on at all times (even during rcv operations); 'RTS' is normally used for point-to-point 4-wire half-duplex and duplex nonswitched lines for both primary and secondary
stations. For multipoint primary stations, the 'RTS' = ON option is usually used for 4-wire half-duplex and duplex lines. Two-wire nonswitched lines, switched lines and multipoint secondary stations usually
use the 'RTS' = OFF option to drop 'RTS' while not in xmt mode.
The 'external clock', 'datCl rate select' = ON and 'oscillator select' options are dependent on the type of modem connected and the type of internal and/or external clocks installed. If you select the 'external
clock' option (with or without 'data rate select' = ON), the pgm will not use N RZI mode of transmission. If you select internal oscillators number 0, 1,2, or 3, the pgm uses NRZI mode. N RZI mode means (as
implemented in the 3705) that if a 0 bit is to be xmt, the xmt line trigger is complemented; if a 1 bit is to be sent, the state of the xmt line trigger is not changed. The combination of NRZI mode and SDLCObit-insertion operations always results in at least one data transition every six bit times so that modem or internal clocks can be kept in phase. NRZI mode is not used when external clock is selected from the
modem since it is then the modem's responsibility to provide clock correction and bit synchronization. This automatic selection of NRZI mode according to type of !!r.:: clocking is compatible with frame
check sequence 3705 NCP utilization.
The optional xmt data option can be used only with the primary station options to provide data char to be sent within the SDLC link test frames being xmt. This optional data is sent after the SDLC station
adr and control fields and before the frame check sequence. If the optional xmt data option is not selected as a primary station option, the minimum test frame of 4 char (SDLC station adr, SDLC link test control field and two frame check char) preceded and followed by flag char are xmt. Note that 16 alternate bit transmissions are xmt before the first flag char of a frame so that the rcv clock can be corrected.
To continue, setthe STORAGE ADDRESS/REGISTER DATA switches B, C, 0, and E to the required settings, set DISPLAY/FUNCTION SELECT switch to FUNCTION 5, and press the START pushbutton.
MANUAL INTERVENTION STOPS
1FT CSB
800
3705·80 CSB 1FT MANUAL INTERVENTION STOPS· Cont.
Routine
F020
Error
Code
MANUAL INTERVENTION STOPS
Function Tested
Suspected Card
Location(s)
Error Description
FEALD
Page
FETMM
Page
Comments
Following are switch B-E settings for entering line type and control options for F020 stop code:
Switch B .. line type options. Enter one of the following In switch 8:
0
Primary station, half-duplex 2-wire nonswltched line with 'RTS',. OFF option.
1
Secondary station, half-duplex 2-wlre nonswitched line with 'RTS' .. OFF option.
2
Primary station, half-duplex 4-wire nonswitched line with 'RTS' =ON option (normally point-to-point).
3
Secondary station, half-duplex 4-wire nonswitched line with 'RTS' = ON option (normally point-to-point).
4
Secondary st~tion, half-duplex 4-wire nonswitchedline with 'RTS' = OFF option (normally multipoint secondary).
5
Primary station, duplex ~-wire nonswitched line with 'RTS' = ON option.
Note: Requires duplex line set intf.
6
Secondary station, duplex 4-wire nonswitched line with 'RTS' = ON oPtion.
Note: Requires duplex line set intf.
7
Secondary station, duplex 4-wire nonswitched line with 'RTS' = OFF oPtion (normally multipoint secondary).
Note: Requires duplex line set intf.
8
Primary station, switched line with manual call, manual answer, or auto-answer with 'RTS' = OFF option.
Note: Half-duplex only for switched lines.
g
Secondary station, switched line with manual call, manual answer, or auto-answer with 'RTS' = OFF option.
Note: Half-duplex only for switched lines.
A
Primary station, switched line with auto-call.
Note: Half-duplex only for switched lines.
B
Secondary station, switched line with auto-call.
Note: Half-duplex only, for switched lines.
Switch C = clock control options. Enter one of the following in switch C:
0
Internal oscillator select 0 to use first internal oscillator
1
Internal oscillator select 1 to use second internal oscillator
2
Internal oscillator select 2 to use third internal oscillator
3
Internal oscillator select 3 to use fourth internal oscillator
4
Select external clock but do not select 'data rate select'
5
Select external clock and al,so set 'data rate select' to use the higher of the two external clocking rates
Switch 0 = NRZI control with external clock. Enter one of the following in switch 0:
0
External clock, non-NRZI, or internal clock NRZI
1
External clock NRZI
2
External clock, new sync, non-NRZI mode
Note: New sync is normally used with 4·wire multipoint nonswitched line modem equipment where the associated intf is designated as the master station (primary).
3
External clock, new sync, and NRZI mode. See the note under 2 above.
Switch E = xmt and rcv data options. Enter one of the following in switch E:
(
"\
'-. ../
,r-'\
"-
'.
0
No optional xmt data and not stopping on rcv frames.
1
Stop on any frame rcv with a bad frame check char.
2
Stop on any frame rcv other than a normal link test command or response.
3
Stop on any frame rcv (good or bad).
~
'-./
-'
''-.
/
/""l,
/'
,<"'--\
'-._./
1
,/0
'-.,/
r'~
"-
/
'\
'-
./
./
«-.
"",
./
;
'- . ./
/"--~"
('
,r'"
"-
./
"-
/
,
./
.,,.--,\
'.
./
/
"---)
"
./
'-.
'\
./
'\
\,"--/
"\
'- /'
~-'\
.
1
j
/"
\
,'.
1FT CSB 802
(
(
(
(
(
(
(
(
(
(
(
(
(
(
f
(
(
{
f
(
3705-80 CSB I FT MANUAL INTERVENTION STOPS - Cont.
"
Routine
F020
Error
Code
Function Tested
Suspected Card
Location(s)
Error Description
FEALD
Page
FETMM
Page
4
Optional xmt data is required and will be requested in the F024 and F025 stop codes, Th is option is restricted to primary stations, This option does not include any stops on rcv frames,
5
Optional xmt data is required and will be requested in the F024 and F025 stop codes, This option is restricted to primary stations, This option includes a 'stop on any frame rcv with a frame
check error' option,
6
Optional xmt data is required and will be requested in the F024 and F025 stop codes, Th is option is restricted to primary stations, This option includes the 'stop on any frame rcv other than a
normal test frame' option,
7
Optional xmt data is required and will be requested in the F024 and F025 stop codes, This option is restricted to primary stations, This option includes the 'stop on any frame rcv' option,
F02l
Invalid OPtion
F022
Enter number of test frames to be x,mt at this ~rimary station for the link test, Set switc~es B-E to number (in hex) of times you want the test frame xmt before the pgm terminates with the F02C completion
code, If you enter 0000, the test will not terminate unless you use the dynamic communication options or abort the test,
F024
Enter first optional xmt data char for the primary station Iink test option, Set switches D and E to the hex char to be xmt,
01'
Comments
invalid combination of options entered for the link test, Enter options again as defined in the F020 stop code,
If only one optional data char is to be xmt, set switches B or C to any nonzero value, If more than one optional ,xmt data char is to be sent, set switches Band C to 00,
F025
Enter next optional xmt data char to be sent from this primary station of the SDLC link test, Set switches D and E to the hex char that you want to use as the next data char to be xmt,
If this is the last optional xmt data char you want to send, set switches B or C to any nonzero value, If you want to enter more optional xmt data, set switches Band C to 00; the current data char in switches D
and E will be stored when you select FUNCTION 5 and press START. Then you will get this stop code again unless end of xmt buffer has been reached. You may enter up to 1022 char to be xmt with the F024
and F025 stop codes.
F026
Enter xmt line intf adr. Enter line adr in same format as defined in the FOOl manual intervention stop code,
If you have selected an option using duplex lines, enter the xmt line intf adr of the duplex line intf par.
Note: Duplex xmt line intf is always the first line intf adr of the even/odd line intf pair, with the even line intf adr being used as the xmt line and the odd line intf adr being used as the rcv line. Note also that
this line intf adr to be entered does not use the low·order bit of byte 1 to set/input ABAR so that line adr such as 0842 and 0846 are considered to be odd line intf adr, and line adr such as 0840 and 0848 are
even line intf adr.
The line intf adr you enter is used to get line set type and options according to what is found in the configuration data set (CDS). If you have selected a not·installed or invalid line adr, you will get stop code
F027 asking for the line intf adr again, If you have selected a duplex line option, the line set type must be a type that can run in duplex mode; the same applies for half·duplex, switched line, and internal/
external clock selection.
If you enter FF in switches Band C and continue, the pgm will go back to the F020 stop code to ask for initial options again.
F027
Xmt line intf adr entered in stop code F026 was invalid line set type for running with options selected. Enter xmt line intf adr again as defined in stop code F026. If you enter F F in switches Band C and then
continue, the pgm ~'Jill go back to the F020 stop code to ask for initial options again.
F028
Enter SDLC station adr in switches D and E. This is the SDLC station adr put into all test frames xmt on the line and the SDLC station adr that this station expects to rcv from the remote secondary station if
the primary station option was selected. If you have selected the secondary station option, this will be the SDLC station adr searched for in all incoming frames and the SDLC station adr put into the response
test frames or frame reject response sent back to the remote primary station.
If the secondary station rcv a frame that has a different SDLC station adr than the one you are entering, it will not respond to that frame but will count it in the statistics counters defined in the rtn X6FO write·up
in the "CSB Symptom Index."
After you continue from this code, the pgm will reset and enable the scanner and start the link test. See the appropriate rtn write·up in
running.
"csa Symptom Index" for display codes you will get while the test is
F029
Enter the line adr of the auto·call originate the line intf to be used in this test. See manual intervention stop code F001 for format to be used for entering the line adr.
Note: If the line adr entered is either invalid or not configured as an auto-call originated line, this stop code will be displayed again. Enter line adr again as defined for this stop code.
F02A
Enter the first digit to be dialed on the auto·call originate line. Set switch D to
a and switch
E to the next digit to be dialed. Press START.
MANUAL INTERVENTION STOPS
1FT CSB 804
3705-80 CSB 1FT MANUAL INTERVENTION STOPS - Cant.
&for
Function Tested
Code
F02B
MANUAL INTERVENTION STOPS
Suspected Card
Location (5)
Error Description
FEALD
FETMM
Page
Page
IFJ CSB 806
Comments
Enter the next digit to be dialed. Set switch 0 to 0 and switch E to the next digit to be dialed. Press START. Continue entering digits in this manner; after the last digit has been entered, set switches D andE to
FF andpress START.
The pgm will not reset, enable the scanner, and start the link test. Wait for normal connection or time-out (20 sec) to occur. If normal connection occurs, each dial digit will be displayed in DISPLAY B, byte 1,
as it is dialed.
F02C
Link test has terminated. If necessary, check statistics and reg indicators defined in the heading of the appropriate rtn in "CSB Symptom Index". Then enter a link test restart or termination option.
The following list of options are acceptable with switches Band C set to DO or 00 for this F02C stop code. The same options may be used with the DO settings when using the dynamic communications options
defined in the appropriate rtn write-up in "CSB Symptom Index". Following is a list of the restart/termination options:
Set switches 8
C, D, and E to
F030
For this restart/terminate option
0000
Restart the link test at point where it set up initial xmt and rcv operations without doing a scanner reset and enable operation. This option allows you to restart the test on a switched line
without making a new dialed connection, but this option may be used on any type of restart except a scanner or LIB failure. If you use this restart option, all the statistics counters will
be cleared (except the number of frames to xmtl. and run indicators will be reset to starting options.
0001
Restart rtn at stop code F020 asking for the link test options. This restart option will mask L2 irptand mess up xmt and rcv buffer pointers but will not modify any of the other link test
statistics; it will not reset the lines currently in use until after you have entered your new options. Therefore, this option may be used to terminate the current test but you will still be
able to look at test statistics or be able to respecify options.
0002
Restart the link test from hardware reset and enable in the scanner. This option will clear all run indicators and statistics as in option 0000; but, in addition, it will discohnect any
switched-line connection due to the scanner reset and enable. This restart option should be used if a scanner or LIB failure occurred or if you did any outputs from the control panel that
changed the current line conditions.
0003
Go to stop code F02C and wait for next selection of options. This stop code is used for dynamic communications (function select FUNCTION 1 and 0003 in switches B-E). If used at
F02C stop code, it will result in stop F02C again. This dynamic communications may be used to terminate the test before the xmt frame count is reached for the primary station or to
terminate the secondary station when nothing is being rcv ( indicated by E061 display code being displayed continuously).
0004
Terminate rtn after resetting scanner. This option should be used when you have finished testing with the link test. This will terminate the link test rtn and if you have not set the CE
sense switches to cycle on request or if you are not running multiple I FTs or adapters, the OCM will produce a DISPLAY Bstop code of 80nn asking for your next test request.
Enter xmt, rcv, wrap, or dial option.
Enter in switches B-E your selected option. Options are:
0001
0002
0003
0004
0005
0006
0007
0008
Xmt test on a nonswitched line or local attachment.
Rcv test on a nonswitched line or local attachment.
Wrap a pair of nonswitched or local lines.
Xmt test on a switched line using manual dialing and line connection.
Rcv test on a switched line using manual dialing and nne connection.
Wrap a pair of switched lines using manual and line connection.
Dial numbers on an auto-call originate line intf and then xmt on the attached switched line intf.
Wrap data on switched lines. This option will:
•
•
•
•
0009
OOOA
Dial numbers on an auto-call originate intf.
Answer the call on a switched line intf.
Go into rcv mode on the line intf that answered the call.
Xmt on the line intf attached to the auto-call originate line intf to the rcv line.
Dial numbers continuously on an auto-call originate line intf.
Dial numbers on an auto-call originate line intf; xmt an alternate all-D's and all-1's char pattern for 128 char; and then disconnect the line adr.
,
F03l
Enter the line adr of the auto-call originate line intf to be used in this test. See manual intervention stop code F001 for the format to be used for entering the line adr.
F032
The line adr entered is either invalid or not configured as an auto-call originate line. Enter the line adr again as defined in stop code manual intervention F031.
"~
\
'-.
/
I
t''''''',
\,
/
~
'-..J
)
,~
...
/
!
'" "'),
'-. .. ~
-"'''\
....
/
I~
"
,/
,/~
,
/
f
'''\
,/
,/
'"
.'-.. .. j
".
r..~
I
'....
\
.'"
"'-'\
,.
'-. /
\,,~~
"
f',,\
"
/
(
'\
"
/
....
'\,
/'
:- '''\
"
,/
r~
,/
,,,,"'\
f
\ ..... ,./
,- ''\
/.c.- ..
"'-.,
'-
r
\.....,../
I
'1."
(
(
(
(
(
(
(~
(
(
(
(
(
(
(
(
(
3705·80 CSB 1FT MANUAL INTERVENTION STOPS· Cont.
&for
Code
F033
Function Tested
Error Description
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Comments
Enter the first digit to be dialed on the auto-call originate line.
Set switch 0 to 0 and switch E to the digit to be dialed. The digit to be dialed may be 0 through 9 for dial digits, C for the end·of·numbers char, or 0 for the separator char. Because the end·of·numbers and
separator char are not supported by most IBM and non·IBM auto·call units in the U.S.A., they should be used with caution. At this time, reg X'13' points to a location in storage where you (as an option) may
store up to 32 bytes of dial digits; you can then set switches C and 0 to FF and press the START pushbutton to continue. If you select this option to store the dial digits, the first 4 bits of each byte should be
oand the last 4 bits should be the dial digit, and you should store a X'FF' char after the last digit to be dialed. If you make any errors in entering any dial digits, you will be asked to enter the first dial digit
again. If you used the end·of·numbers char, it must be the last digit entered.
F034
Enter the next digit to be dialed.
Set switch 0 to 0 and switch E to the digit to dial, or set switches 0 and E to FF if the last digit to dial was entered previously. See manual intervention stop code F033 for caution on dial digits and optional
use of reg X'13' storage adr, which you may still use as an option. After you have entered the dial digits, the digits will be validated; if any digit is invalid, you will be asked to enter the first dial digit again.
This manual intervention code may be repeated up to 31 times to get a total of 32 digits.
F035
Enter the xmt line adr to be used in this test. See manual intervention stop code F001 for format to use.
F036
The xmt line adr entered is invalid or not configured as a line that can run in xmt mode. Enter the xmt line adr again as defined in manual intervention stop code F035.
F037
The xmt line adr entered cannot be used with the switched line and/or auto-call originate test option you selected. Enter the xmt line adr again as defined in manual intervention stop code F035.
F038
Enter LCD and set mode bits for xmt line. Set switch B to the line control definer (LCD) wanted.
Set hex:
o
2
4
5
6
7
8
9
A
B
C
o
For S/S 9/6 line control which has one start bit, 6 data bits and 2 stop bits
For S/S 8/5 line control
For S/S 9/7 line control
For S/S 10/7 line control
For S/S 10/8 line control
For S/S 11/8 line control
For DLC 7·bit char line control
For 0 LC 8·bit char line control
For 0 LC 6-bit char line control
For DLC 5-bit char line control
For BSC EBCDIC line control
For BSC ASCII line control
Note: Do not use LCD = 0, 2, 5, or 7 when xmt and rcv (wrap) all O's is selected because an error may occur, indicating more char were rcv than were xmt. Do not use LCD
can detect a rcv break by the 'stop bit check' because you may get error stops, indicating ICW bits 0-3 are in error with the 'stop bit check' bit being on.
= 4 or 6 when xmt on a line set that
Set switch C to O.
Set switches 0 and E to the hexadecimal sum of the following bit definitions. The 8 bits obtained are used to set SDF bits 2-9 (lCW bits 26-33) during the set mode operation.
Switch D:
Hex
8
This bit is reserved and should be O.
4
Diagnostic mode latch is set if this bit is a 1. This bit should normally be a 0 to test normal modem operation. If this bit is a 1 and the set 'OTR' bit is a 1, the modem test lead will be activated in
IBM integrated modems. When the 'diagnostic mode' bit is set on, that CS hardware forces on a 'DSR' and may force 'CTS' indication according to the line status. This bit should be 0 for all autocall originate and switched line test options.
2
Set 'DTR' if this bit is a 1. This bit should normally be a 1 to test modems. If you select to do an internal xmt or wrap operation, this bit should be a 0, and the 'diagnostic m<¥le' bit should be a 1.
1
'Sync bit clock latch' is set if this bit is a 1. This bit should normally be a 0 for S/S line control and a 1 for sync and BSC line control. With some special features, this bit may control other than the
clocking method.
MANUAL INTERVENTION STOPS
1FT CSB 808
3705·80 CSB I FT MANUAL INTERVENTION STOPS· Cont.
Error
Function Tested
Code
F038
MANUAL INTERVENTION STOPS
Suspected Card
Location(s)
Error Description
FEALD
FETMM
Page
Page
1FT CSS81 0
Comments
Switch E:
Hex
!
8
'External clock' latch is set if this bit is a 1. If this bit is 0, an internal clock is used. For proper modem operation, some modems require that external clock be used. If you set this bit to 1 to select
external clock, you should set the two 'oscillator select' bits to O. If you set the 'diagnostic mode' bit to a 1, this bit should be a 0 except for the case where IBM integrated modems that provide
external clock are put in test mode by having both the 'diagnostic mode' and 'DTR' bits set to 1.
4
'Data rate select' latch is set on if this bit is a 1. On modems that provide operational speeds, this bit being on should select the higher of the two speeds. The 'data rate select' latch may be used for
other purposes on some line sets. An example is the EIA local line set type 1 F where it drives the local attachments 'rcv line signal detect' lead.
2 and 1
Oscillator select bits used to select one of 4 possible oscillators. These bits may be set to 00, 01,10, or 11 to select the 1st, 2nd, 3rd, or 4th oscillator position. The 1st oscillator is required to be the
lowest speed oscillator. You'should use caution in selecting the 2nd, 3rd, or 4th oscillator since that oscillator may not be installed or may exceed the maximum allowable operating speed of the line
set under test. The 'oscillator select' bits should be set to 00 if you have the 'external clock' bit set to 1.
F039
LCD entered for xmt line is invalid or the xmt line set type cannot run with the LCD type selected. Enter LCD and set mode bits again as in manual intervention stop code F038.
F03A
Enter the rcv line adr to be used in this test. See manual intervention stop code FOOl for format to be used for entering adr.
F03B
The rcv line adr entered is invalid or not configured as a line set type that can run in rcv mode. Enter the rcv line adr again as in manual intervention stop code F03A.
F03C
The rcv line adr entered cannot be used with the switched line and/or auto-call originate test option selected. Enter the rcv line adr again as in manual intervention stop code F03A. This error will also occur if a
wrap option was selected and the rcv line cannot run with the xmt line LCD or set mode options.
F03D
Enter LCD and set mode bits for rcv line. See manual intervention stop code F038 for format to enter LCD and set mode bits.
F03E
LCD entered for rcv line is invalid; the rcv line set type cannot run with the LCD type selected; or, for wrap options, the LCD selected is not the same as the xmt LCD. Enter the LCD and set mode bits for the rcv
line again. See manual intervention stop code F038 for format.
F040
Enter xmt data options and/or first data char to xmt. All data char are xmt as entered with bit 7 xmt first, then bit 6, then bit 5, etc. The char are xmt from the first entered to the last entered, and
then the same char pattern is repeated continuously until the test is terminated. If you select the option to xmt all marks (1 bits) or all spaces (0 bits), any data char entered are ignored.
Set switch B to the hexadecimal sum of the following options:
Hex
8
Xmt in NRZI mode if a DLC LCD is selected.
4
All 1 bits (marks) are xmt if this bit is a 1. For SIS the pad flag will be set on to suppress the start bit, and data char of all 1 bits will be xmt. For 0 LC, the 'disable stuffer' bit will be set on to suppress
the 0 bit insert function, and data char of al11 bits will be xmt. Note that this xmt-all-1's options is intended for modem equalization functions and cannot detect a failure such as an open xmt data
lead. You should wrap data using some char with both 0 and 1 bits for a better exercise of the modem or telecommunication line.
2
Xmt all O's. For SIS LCDs, two pad char of al11 bits are xmt and then the xmt line's PCF is set to 'A' to suppress stop bits, and all 0 bits are xmt. For other LCDs, all 0 bits are xmt without any SYN
or flag char.
1
Xmt all 1's in 0 LC mode without setting the 'disable stuffer' bit so O-bit insertion will operate. This option will work only if a DLC LCD is selected.
Set Switch C to the hexadecimal sum of the following options:
Hex
8
(j
Ignore ICW 0"3 if this bit is a 1. Otherwise, after every xmt, line char-svc ICW bits 0-3 are checked; and, if any of these bits are in error, an error code is displayed.
4
Reserved. Set to O.
2
Xmt DLC link test. This bit is ignored unless you selected a DLC LCD or the xmt-all-1 '5, the xint-all-O's or the xmt-DLC-aIl-1's options.
0
\
,0
j
~j
~
'..
j//
()
"'.. /
('\
'~-"I
"- j
",- .•J
r\
~
./
r"
'..-../
(,---.,.
,/
'...-./
('~
,.
/
j"''\.
",,-~. /
,-'-"".,."
"'-_/
(~\
.
'" . •J
';
("
r'~
"j
"
/
-'~,
r-"""
"j
.~''''''./
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(/
(
(
3705-80 CSB-I FT MANUAL INTERVENTION STOPS - Cant.
&for
Code
Routine
F040
Function Tested
Error Description
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Comments
Hex
1
Alternate data input option if this bit is a 1. If you set this bit to 0, set switches 0 and E to the 1st char to be xmt, select FUNCTION 5, and press the START pushbutton; you will get manual intervention stop code F041 asking for next data char to xmt. If you want to use the alternate data input option, do the following:
a. Get storage adr from reg X'13'
b. Store the count of the number of char to be xmt as the first char. The highest valid count is X'78' to xmt 120 char. The pgm will xmt this number of char, go back to the first char, and repeat the
same number of char continuously until the test is terminated.
c. Store up to 120 consecutive char after the count byte. The char to be xmt are put in the PDF in the same format in which you store them except that bit 0, bits 0 and 1, or bits 0,1, and 2 may be
cleared. If you selected LC04, 5, or 8, the char you store will all have the 0 bit set to 0 since these are all 7-bit char LCOs. If you selected LCD 0 or A, bits 0 and 1 will be set to 00. If you selected
LCD 2 or B, bits 0,1, and 2 will be set to 000.
d. Set switch B to O.
e. Set switch C to 1 or 9 (according to the ignore-ICW-bits 0-3 option) to indicate this alternate data input is being used.
f. Select FUNCTION 5 and press the START pushbutton.
Set switches 0 and E to the first char to be xmt unless you selected the alternate data input format or the xmt-all-1's or the xmt-all-O's option in that case, switches 0 and E are ignored.
F041
Enter next char to be xmt.
Set switches Band C to 00 and switches 0 and E to the next char to be xmt, or set switch B or C to any nonzero position if the last char has been entered previously. At this time, reg X'13' contains an adr
pointing to a storage location that contains a byte that has the number of char you have previously entered, followed by the char you have entered. You may (as an option) use the alternate data fnput steps~, b,
and c defined in manual intervention stop code F040. Then set switch B to C to a nonzero position, select FUNCTION 5, and press the START pushbutton.
F042
Enter rcv data options. If you are wrapping data, the rcv data char are compared with the xmt char selected unless you selected the rcv-aII-1's, rcv-all-O's, o LC-link-test, or ignore-rcv-irpt options. If you are doing
a rcv-only test and have not selected one of the above options, the rcv data char are ignored, but you may display the last data char rcv by displaying reg X'44' (byte 1) while the pgm is running. If you selected
a sync LCD (8,9, A, B, C, or D) and did not select one of the above options, there will be no indication of any data being rcv unless a valid synchronizing char for the LCD in use is rcv.
Note: When using a wrap option for either xmt all 1's, xmt all O's, OLC all 1's, or 0 LC link test, you should select the same rcv data option or error stops may occur.
Set switch B to the hexadecimal sum of the following options:
Hex
8
Rcv in NRZI mode if this bit is a 1 and if you selected a OLC LCD.
4
All 1 bits are expected to be rcv if this bit is a 1. If this bit is a 1 and all 1 bits are not rcv, an error will be reported. Note that this rcv-all-1's option, which is intended to be used for modem equalization, cannot detect a failure such as an 'open rcv data' lead or a 'rcv data' lead clamping problem. You should wrap some data char containing both 0 and 1 bits for a complete exercise of the modems
or telecommunication line.
2
All 0 bits are expected to be rcv. If this bit is a 1 and all 0 bits are not rcv, an error is reported.
1
Ignore all rcv char-svc irpt. If this bit is a 0 and you have selected one of the wrap options and all 1's and all O's options are 0, a check is made that char rcv are the same as char xmt.
Set switch C to the hexadecimal sum of the following options:
Hex
8
Ignore ICW bits 0-4 if this bit is a 1. If this bit is a 0 and the 'ignore all rcv char svc irpt' bit is a 0, ICW bits 0-4 are checked on every rcv char-svc irpt and an error is reported if they are in error.
4
Reserved. Set to O.
2
Rcv OLC link test. This bit is ignored unless you selected a OLC LCD or if selected the rcv all 1's or the rcv all O's options. If you select this option, rcv data errors are counted and displayed in the
OISPLA Y B indicator lights as an X'EOnn' code, where nn is the low-order byte of the rcv data error count. The total error count is always available in reg X'1 B'. Note that it is common to get one
or two errors when the rtn first starts rcv due to clock correction time and the 0 LC 1 bit counter circuit.
1
Reserved. Set to O.
Set switches 0 and E to 00.
F049
Enter options for rtn X6F2; see X6F2 XXX X in "CSB Symptom Index' for selections.
MANUAL INTERVENTION STOPS
1FT CSB812
3705-80 CSB 1FT MANUAL INTERVENTION STOPS - Cont.
Routine
Error
Code
MANUAL INTERVENTION STOPS
Function Tested
Suspected Card
Location(s)
Error Description
F050
Enter xmt line adr for rtn X6F2; see X6F2 XXX X in "eSB Symptom Index" for selections.
F052
Enter the rcv line adr for rtn X6F2; see X6F2 XXXX in "eSB Symptom Index" for selections.
F055
Enter options for rtn X6F4; see X6F4 XXXX in "eSB Symptom Index" for selections.
F056
Enter the xmt line adr for rtn X6F4; see manual intervention stop code F001 for format.
F057
Enter the rcv line adr for rtn X6F4; see stop code F001 for format.
F058
Enter the high-speed local attachment oscillator frequency and'line adr for rtn X6F5; see X6F5 XXXX in "eSB Symptom Index" for selections.
F059
Disconnect the e)(ternal wrap facility for rtn X6F4; see X6F4 XXXX in "eSB Symptom Index".
FEALD
Page
FETMM
Page
1FT CSB 814.
Comments
/
/
,r'",
"
)
,cf',\
,,--,
"
./
r~
"- )
/' ~
'~
"
.. ./
,
/
./
\"
..
~
,,--,,/
,--,
/'-"\
"' ",
/~
"-_/
(
\..,
'",/
"-
/
r- .....
I
./
,,/
("'..~
\.../
(
r~
.. ~
~
'"
(
{
(
Diagnostic Control Monitor (DCM)
(
(
(
(
(
(
(
console printer message of:
riD 'ENTER DEV/TEST/OPT/'
The diagnostic control monitor (DCM) provides
functions for:
•
•
•
•
•
•
•
•
Routine selection
Manual intervention routines
Abort control
Control panel interface
Routine execution
Error control information
Scope synchronization
Continuing from an error stop or a manual
intervention stop
REQUIREMENTS
You must have the proper configuration data set
(CDS) cataloged with the remainder of the
system (for additional information, see the CDS
section). Before 1FT routines can run properly,
the functional areas in the CCU hardware must be
operational. These functional areas are tested by
the ROS bootstrap program each time the LOAD
pushbutton is pressed.
DCM EXECUTION
3705 Setup Procedures
you enter:
r ID,'XXX/3705A/nfe,ext=ABCD/'
3.
4.
5.
6.
Set both the MODE SELECT and
DIAGNOSTIC CONTROL switches to the
PROCESS position.
Enable the appropriate channel interface.
Set the DISPLAY/FUNCTION SELECT
switch to the STATUS position to load the
DCM. For information on using the other
positions, see "How to Use the
DISPLAY /FUNCTION SELECT Switch" later
in this section.
Press the RESET pushbutton, then the
LOAD pushbutton.
DISPLAY B bits 0.2 and 0.3 should be on
indicating that ROS has reached IPL phase
3. The LOAD light is on; the following lights
are off: HARDSTOP, TEST, WAIT, and
PROGRAM STOP.
If the above conditions are not present, refer to
the CE Panel Test in the CP section and the ROS
Test in the ROS test section.
Host Procedures
Start the OLTEP or OLTSEP in the host
processor. When OLTEP or OLTSEP causes a
(
(
(
(
(
(
obtained by the type 1 CA loader. The bypass
printing channel errors option inhibits the error
printout. For a description of the error printouts,
refer to DOS OLTEP SRL, (GC24-5086), IBM
System/360 Operating System On-line Test
Executive Program, (GC28-6650), or OLTSEP
Operator's Guide, (D99-SEPDT).
MESSAGES
where:
xxx
= the channel and unit address of the
3705 (native attachment address).
ABCD
=
four operating options provided by the
OLT and type 1 CA loaders. The
correct entries are Y (for YES) or N (for
NO). The options are defined as
follows:
A = OLT bypass printing channel errors
B= Run INIT
C = Run type 1 CA loader with error checking
0= Bypass hard stop on type 1 CA loader error in
3705 and retry
If your response to the DEV /TEST / OPT /
message does not include the ext= parameter,
the default value assumed is ext=nyyy (that is,
ext=NO,YES,YES,YES).
1. Switch the 3705 power on.
2.
(
Delay of INIT Execution: Before INIT begins
executing, the 3705/host interface must be
disabled. The type 1 CA loader attempts to
disable the 3705 interface by issuing a diagnostic
DISABLE command when INIT is loaded. The
host 'clock out' .Iine must drop before the 3705
can go offline. The host 'clock out' line witt drop
when either the host processor STOP pushbutton
is pressed or when the host processor enters the
wait state.
Operating situations under OS or DOS can result
in maximum use of the processor that will delay
the host from entering the wait state. During this
delay, the OLT prints a message indicating that it
is waiting for the 3705 to disable its channel
interface. Also, at the 3705, an equivalent
message code is displayed in the control panel
lights.
TYPE 1 CA LOADER ERROR PRINTOUTS
Error printouts occur if the type 1 CA'oader
detects an error. The printout contains allthe
pertinent information about theenor that can be
Messages occur during operation of the type 1
CA loader that indicate: (1) the loader has
detected an error or (2) an action is needed to
load the diagnostic programs into 3705 storage.
The messages, message explanations, and
responses are as follows:
THE STATUS OF THE 3705 CANNOT BE
DETERMINED. **WARNING** CONTINUATION
WILL CAUSE THE ENTIRE 3705 TO BECOME
UNAVAILABLE. ENTER 'e' TO CANCEL OR 'P'
TO PROCEED.
Explanation: The OLT cannot determine the
status (offline or stopped) of the 3705. If the
OLT is allowed to continue, the program in
3705 storage will be destroyed.
Response: Continue by entering a Cor P, as
follows:
r id,'C' (for cancel)
or
r id,'P' (for proceed)
Any other response results in the program's
repeating the last line of the above message.
After five invalid responses, the message
INVALID RESPONSE AFTER 5 REQUESTS is
printed.
ALL 3705 ADDRESSES ARE NOT STOPPED OR
OFFLINE. **WARNING** CONTINUATION WILL
CAUSE THE ENTIRE 3705 TO BECOME
UNAVAILABLE. ENTER 'c' TO CANCEL OR 'P'
TO PROCEED, OR 'R' TO RETRY.
Explanation: The OLT has been notified by the
executive driver that all 3705 addresses are
not offline or stopped. If the OLT is allowed
to continue, the program in 3705 storage will
be destroyed.
Response: You have the opportunity to make
all addresses available to the OLTusing
standard system facilities. Continue by
entering a C, P, or R, as follows:
(
(
r id,'C' (for cancel)
or
r id,'P' (for proceed)
or
r id,'R' (for retry)
The difference between a P and an R response
is (1) P means to proceed, regardless of the
offline or online status of the 3705 address
and (2) R means that the operator has been
taking addresses offline and wants the
program to verify that all units are now
available to the OLT.
Any other response results in the program's
repeating the last line of the above message.
After five invalid responses, the message
INVALID RESPONSE AFTER 5 REQUESTS is
printed.
INVALID RESPONSE AFTER 5 REQUESTS
Explanation: The program assumed the
response of 'C' and terminated the OLT.
Response: None.
BAD RC YY FROM XXXXXXX
Explanation: The type 1 CA loader has
requested of the executive driver a function
that the driver is incapable of performing.
This may be because of an invalid parameter
or an error that has occurred while the
executive driver is performing the request.
XXXXXXX is the name of the function being
requested, and YY is the code returned by the
executive program. The XXXXXXX field is
filled by the type 1 CA loader.
Response: This message is a diagnostic
programming aid. If the message occurs, a
dump and other available information should
be submitted with an APAR (Authorized
Program Analysis Report).
The following messages are printed on the
system output printer to describe failures and the
operation that is being attempted when an error
occurs:
BADCCSIO
FAILED TO INTRPT
BAD STATUS ON SIO
Diagnostic Control Monitor
DCM005
DCM010
Diagnostic Control Monitor
NOP CMD FOR 3705 LOAD BUTTON
code 03, the 3705 interface is not enabled; it
prints this mew'sage and waits another 20
seconds. When the 3705i$ enabled, the type
1 CA loadet'cootinues executing.
ENTER 1FT REQUEST AT 3705
RD CMD FOR 1FT REQ
Explanation: This message indicates that a
request to load an 1FT module can be entered.
WRT CMD TO WRITE DATA
Explanation::The type 1CA loader has
detected an error in the requested modul'e.
(An ad~ress in the module is on an odd
boundary.}Thetype 1 CA loader returns to the
Read command to allow you to enter another
request at the 370S;
specified as a decimal number in the range
1-256. If X is not specified, the default value
assumed is 128. (See "Set or Display Repeat
Count" later in this section.)
• Continuously cycling the entire 1FT request,
either for one routine or for all the routines.
The CE sense switch, "cycle on request",
controls this option.
• Stopping before the execution of each routine
in order to prepare for the execution of the
routine. For example, this option allows you to
set up an address compare stop for a location
within the routine. Panel utilities can also be
used at this time. The CE sense switch, "halt
before execution", controls this option.
Response: Enter another request.
Manual Intervention Routines
WRT CMD FOR LAST BLOCK
INVAUD PUNK MOD
WRT CMD SENDING CONTROL WORD
3705 lOADED WITH 1FT Z3705AAA
3705 lOADED WITH 1FT Z3705ADA
3705 lOADED WITH 1FT Z3705AEA
Explanation: If the DCM has already been
loaded, the program indicates that you can
make a request at the 3705. If the DCM has
not been loaded, the program starts over by
requesting you to press the LOAD pushbutton
on the 3705.
Explanation: These messages indicate that
INIT or 1FT modules have been successfully
loaded in the 3705 without anyetrors being
detected. Z3705AAA is the type 1 CA load~r,
Z3705ADA is the INIT section 1, and
Z3705AEA is the INIT section 2.
Response: If DCM has been loaded, enter a
request; otherwise press LOAD.
MOD Z3705XXX NOT IN OlTUB
Response: None.
PRESS LOAD ON 3705
Response: Press the LOAD pushbutton on the
3705. This message repeats every 30 seconds
until the LOAD pushbutton is pressed.
AWAITING 3705 INTERFACE DISABLE
Explanation: The type 1 CA loader has loaded
INIT in the 3705 and is waiting for the 3705 to
go offline. This message is repeated every 20
seconds until the 3705 channel interface is
disabled and the 3705 begins executing the
1FT.
,r'~
''-...
)
"
", , /
"
DESCRIPTION OF DCM FUNCTIONS
Response: Verify that the INIT or 1FT modules
are at the proper level.
The routine, selection facility allows you to select:
• One routine of one 1FT for either one adapter
or all of the adapters tested by the 1FT.
• All of the routines of alliFTs for either one
adapter or all of the adapters tested by the 1FT.
• All of the routines of all the IFTs for all of the
adapters.
• Manual intervention routines. The CE sense
switch, "include manual intervention
routines", controls this option.
• Problem definition routines. The CE sense
switch, "problem definition mode", controls
this option.
• Repeating a routine up to 256 times before the
next routine is executed. The CE sense switch,
"repeat each routine X times", controls this
option. If this option is not selected, the
routines are executed one time sequentially. X
can be displayed and set from the panel and is
WAITING FOR 1FT COMPLETION
Explanation: This message occurs every 20
seconds after an 1FT has been loaded in the
3705. Most of the IFTs disable the 3705. The
type 1CA loader is in a loop issuing NOP
commands to the 3705. If it receives condition
"\
"
Routine Selection
Response: Refer to the message "ERP USED
ON MOD Z3705XXX".
\
'-... /
Response: Enter another request. However, if
the original request was valid, the 1FT module
name must be added to theOlTEP/OlTSEP
library before the 1FT can be loaded.
Explanation: The retry count (normally 10) is
exhausted, and the error is still occurring. The
type 1 CA loader assumes that loss of control
has occurred and restarts at the beginning.
Response: Pressing the STOP and then the
START pushbuttons on the processor console
drops the 'clock out' line long enough for the
3705 to go offline. Entering the wait state
accomplishes this also.
'"
Explanation: This message warns you that
errors have occurred while loading the INIT or
1FT modules. Each output operation to the
3705 is attempted up to 10 times if an error
occurs (unless the OLT option EL [N] has been
modified). If the operation being attempted is
performed before the error count is
exhausted, the OLT considers the data
transfer successful and continues loading the
INIT or 1FT modules.
Z3705XXX IN ERROR, ABORT LOAD
If this message occurs continuously, the 3705
is either unable to go offline after the INIT has
been loaded or unable to get back online after
the INIT has completed execution. A
processor-bound system can cause this
problem.
/~
Explanation:The type 1 CA loader has
received an 1FT request (through a Read
command) for a module that is not in OlTUB.
The type 1 CA loader returns to the Read
command to allow you to enter another
request at the 3705.
ERP USED ON MOD Z3705XXX
Explanation: This message occurs when the
type 1 CA loader is initially started or if loss of
control occurs. It constitutes the beginning of
the type 1 CA loader and provides the
synchronization between the 3705 and the
host processor.
/
Response: None.
Response: Enter an 1FT request; See "How to
Request an 1FT" in this section.
WRT IPL CMD SENDING LOADER
"-
/
"-
"
-- /
'\
-- /
r\,
'~
,/
'''-,
'"',,,./
,,c"',\
i'
',,-
-"/
./
"
j
"-/
/"'"
"j
/',,\
,
./
/
""\
"
/
,c '\
",
/
;c""'\,
"
/
You can include manual intervention routines in
an 1FT request by setting the CE sense switch
"include manual intervention routines" (see
"How to Perform an 1FT Request" in the 1FT
section).
After a manual intervention stop occurs:
• DISPLAY A will contain: (1) the adapter
number in byte 0, bits 0-3, (2) the 1FT number
in byte 0, bits 4-7, and (3) the routine number
in byte 1, bits 0-7.
• DISPLAY B will contain a manual intervention
stop code (X'FXXX') which you use to look up
an entry in the appropriate 1FT symptom index.
(X'F' in byte 0, bits 0-3 indicates a manual
intervention stop occurred.) The appropriate
1FT symptom index entry will tell you what
action to take. (XXX indicates the manual
intervention stop to reference.)
Abort Control
The abort control facility is used to abort or
terminate the current routine or the entire 1FT
request.
To abort a request or routine:
1. The PROGRAM DISPLAY light should be on
during this procedure; if it is not on, see
"Determining Why the PROGRAM DISPLAY
Light is Not On" later in this section. '
2. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 6.
3. Set STORAGE ADDRESS/REGISTER DATA
switches B, C, D, and E as follows:
a. To abort a routine: set anyone of the
switches to a value other than X'F'.
;r"
\,--
I
/'
"
/"-"
;<"""
"-~./
r ''1,
" y
t"'''-,
t
(
(
(
b. To abort a request: set all of the
switches to X'F'.
4. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
Control Panel Interface
The DCM uses the DISPLAY A and DISPLAY B
indicators on the control panel to display:
Adapter, 1FT, and routine numbers
1FT symptom index routine and error codes
1FT routine manual intervention codes
DCM operator codes
DCM error codes
Panel utility displays
Note: Unless byte X is specified in the symptom index for a
specific error, references to DISPLAYA and DISPLAY Bare
for bytes 0 and 1 only.
The DCM routines allow you to select the panel
utilities and to also enter manual intervention
data (for example, set, reset, or display the CE
sense switches).
• After an error stop or manual intervention
stop, DISPLAY A will display:
- the adapter number in byte 0, bits 0-3
- the 1FT number in byte 0, bits 4-7
- the routine number in byte 1, bits 0-7
• After a manual intervention stop, DISPLAY B
will display:
- X'F' in byte 0, bits 0-3, indicating that
manual intervention is required. Byte 1, bits
0-7 will indicate the manual intervention
stop that you should reference.
• After an error stop, DISPLAY B will display:
- Either X'O', X'1 " X'2', or X'3' in byte 0, bits
0-3 (0 indicates an error stop unique to one
routine, 1, 2, or 3 indicates an error stop
common to many routines)
- a loop count in byte 0, bits 4-7
- the error code in byte 1, bits 0-7
• For DCM operator or error codes:
- DISPLAY A will display either X'OOOO' or
X'FFFF'.
- DISPLAY B will display X'S' in byte 0, bits
0-3 and the error code in byte 1, bits 0-7.
Panel utility displays are variable depending upon
the control panel switch settings.
Routine Execution
The routines are executed sequentially, by
section. For example, if 1FT 6 has two sections
and tests two adapters, the sequence is:
(
(
Adapter 1,
Adapter 2,
Adapter 1,
Adapter 2,
(
1FT 6,
1FT 6,
1FT 6,
1FT 6,
«
(
Section
Section
Section
Section
(
(
(
(
The DCM stops and displays error codes for any
new failure while it is in a scoping loop.
However, the DCM allows you to bypass the
error stop when a new failure is detected while
the DCM is in a loop. The error code for the new
error is not displayed because it would interfere
with the original error code display. The CE
Sense switch, "bypass new error stops",
controls this option.
1
1
2
2
At the beginning of each routine, the DCM
displays the following information:
DISPLAY A Byte 0,
Bits 0-3 = Number of the adapter being
tested
Bits 4-7 = Number of the 1FT being
executed
DISPLAY A Byte 1,
Bits 0-7 = Number of the routine being
executed
DISPLAY B Byte 0,
Bits 0-4= 0
Bits 5-7 = Low order three bits of the
error counter
DISPLAY B Byte 1,
Bits 0-7 = Zeros
At the completion of a request, the display
indicates that the request was either completed
with no errors detected, completed with errors
detected, or aborted.
Error Control Information
The DCM stops and displays error codes for
detected errors. The error codes are listed in the
appropriate symptom index (DCM, 1FT, etc.)
Other error information, which may be available
in registers or storage locations, is also shown in
the appropriate symptom index.
The DCM allows you to bypass an error stop
when a failure is detected by setting the "bypass
error stop" CE sense switch. The error code is
displayed even if the stop is bypassed.
The DCM allows you to select a particular error·
on which to loop. Two loop options are
available: (1) the "loop on first error" option·
causes the smallest possible loop internal to the
routine and (2) the "restart routine on first error"
option restarts the current routine when the first
error occurs. The scoping loOp continue'S
whether or not the error occurs again•. The
sense switches, "loop Oil first error~' and "restart
routine on first error", control theseoptions~
ce
Failures detected in a pretest routine block
automatically cause looping in the pretest block.
This prevents execution of the routine without
the proper setup; therefore, the scope picture for
the test function of the routine is traced only
when the setup is proper.
The DCM increments an error counter when a
failure is detected. The counter range is from 0
to 127, with an overflow indicator. The
low-order three bits of this counter are shown in
the error count display in DISPLAY B. The
counter is reset to zero for each new request.
Scope Synchronization
The DCM controls scope sync pulses on three
test pins.
• Scope sync point 1 (01 A-B3M2Pl 0, ALD page
CU015): a pulse is emitted from sync point 1 at
(1) the beginning of each routine or (2) when
the hardware setup block is entered, ifthe
DCM is in a scoping loop.
• Scope sync point 2 (01 A-B3M2P13, ALD page
CU015): A pulse is emitted from sync point 2
at the beginning of the test function within a
test routine.
• Address compare scope sync point
(01A-B3P2S09, ALD page CU004): A pulse is
emitted from the address compare sync point
when an address used for a fetch or store
(controlled by the STORE COMPARE LOAD
switch) matches the address set in the
STORAGE ADDRESS/REGISTER DATA
switches. This pulse is used to sync on any
storage location in any 1FT routine or the DCM.
Set the address of an instruction used in the
routine (or function) in the STORAGE
ADDRESS/REGISTER DATA switches. When
the instruritionis executed, the address
compare sync pulse is emitted,
Test pins 1 a~d2can be used together to count
the number of test functions performed. Test
point lis used to trigger the scope using delayed
(
(
(
sweep. Each pulse emitted from test point 2 then
represents one test function.
For information on setting up a scoping loop, see
"Setting Up a Scoping Loop" in this section.
Continuing From an Error Stop or Manual
Intervention Stop
The continue function allows you continue a
routine from the point of an error stop or manual
intervention stop. It also allows you to enter
input data to the test routine (if required). Before
you can use this function, DISPLAY A and
DISPLAY B must indicate either a DCM stop
code, an error stop code, or a manual
intervention stop code.
1. The PROGRAM DISPLAY light should be on
during this procedure; if it is not on, see
"Determining Why the PROGRAM DISPLAY
Light is Not On" later in this section.
2. If the code in the displays is for manual
intervention (DISPLAY B byte O=X'FX'), set
the STORAGE ADDRESS/REGISTER DATA
switches as specified in the appropriate
symptom index for the 1FT being run.
3. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 5.
4. Press the START pushbutton.
5. DISPLAY B is set to zeros however, it may
not display the zeros long enough for you to
see them.
HOW TO USE PANEL UTILITIES
The panel utilities allow you to perform various
DCM utility functions such as setting or resetting
CE switches, displaying storage, and displaying
the contents of registers. You can use the panel
utilities only if the OCM is executing in the 3705.
The DCM overrides panel utility displays if a
routine that is being executed requires a display.
(for example displays required for manual
intervention routines and error stops override
panel utility displays).
The sections that follow describe the panel
utilities and how to run them.
Refresh the Last DCM Display Code
This panel utility restores DISPLAY A and
DISPLAY B to the last code displayed by the
DCM (excluding displays made by panel utilities).
Diagnostic Control Monitor
DCM015
Diagnostic Control Monitor
If another panel utility is active, this panel utility
cannot be executed. See "Stop Panel Utility"
lat~r in this section.
1.
2.
3.
4.
5.
7.
The PROGRAM DISPLAY light should be on
during this procedure; if it is not on, see
"Determining Why the PROGRAM DISPLAY
Light is Not On" later in this section.
Set the DISPLAY/FUNCTION switch to
FUNCTION 1.
Set STORAGE ADDRESS/REGISTER DATA
switch B to X~O'.
If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
DISPLAY A and DISPLAY B will contain the
codes last displayed by the DCM.
8.
9.
Continuous Display Without Test
10.
This panel utility displays the contents of a
specified storage location or register. The data
displayed is not tested for any special conditions.
The data display occurs at each timer interrupt
(approximately 10 times per second).
11.
The data display is bypassed if the DCM is
stopped for an error stop, manual intervention
stop, or DCMcode,or if the
DISPLAY /FUNCTION SELECT switch is not set to
FUNCTION 1,2, or 3.
',. )
(~
,
/1
<-
".
'"
"'.
./
If another panel utility is active, this panel utility
cannot be executed. See "Stop Panel Utility"
later in this section.
1. The PROGRAM DISPLAY light should be on
during this procedure; if it is not on, see
"Determining Why the PROGRAM DISPLAY
Light is Not On" later in this section.
2. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 1.
3. Set the STORAGE ADDRESS/REGISTER
DATA switch B to X'3'.
4. If the HARD STOP light is on, press the
START pushbutton otherWise press the
INTERRUPT pushbutton.
5. DISPLAY A should be X'OOOO' and DISPLAY
B should be X'8064'. For other values, see
the appropriate 1FT symptom index.
6. Enter the mask to be used to test the data in
STORAGE ADDRESS/REGISTER DATA
switches B,C,D, and E.
7. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
8. DISPLAY A should be X'OOOO' and DISPLAY
B should be '8065'. For other values, see
the appropriate 1FT symptom index.
9. Enter the expected data in the STORAGE
ADDRESS/REGISTER DATA switches
B,C,D, and E.
10. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
11. DISPLAY A should be X'OOOO' and DISPLAY
B should be X'8066'. For other values, see
the appropriate 1FT symptom index.
12. Select the type of display:
a. For a storage display, set the
DISPLAY/FUNCTION SELECT switch to
STORAGE ADDRESS.
b. For a register display, set the
DISPLAY /FUNCTION SELECT switch to
REGISTER ADDRESS.
13. Select the address or register to display:
a. For a storagec;iisplay, set the storage
address in STORAGE
ADDRESS/REGISTER DATA switches A,
B, C, D,andE.
Continuous Display With Test
1. The PROGRAM DISPLAY light should be on
during this procedure; if it is not on, see
"Determining Why the PROGRAM DISPLAY
Light is Not On" later in this section.
2. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 1.
3. Set the STORAGE ADDRESS/REGISTER
DATA switch B to X'2'.
4. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
5.DISPLAY A should be X'OOOO' and DISPLAY
B should be X'8066' •. For other values, see
the appropriate 1FT symptom index in the
I FT section.
6. Select the type of display:
a. For a storage display, set the
DISPLAY /FUNCTION SELECT switch to
STORAGE ADDRESS.
., c':'b,
The display is bypassed if the DCM is stopped
for an error stop, manual intervention stop, or
DCM code, or if the DISPLAY/FUNCTION
SELECT switch is not set to FUNCTION 1, 2, or 3.
This panel utility displays the contents of a
specified storage location or register. The data
displayed will be tested for special conditions
which you select. The data display occurs at
each timer interrupt (approximately 10 times per
second).
If another panel utility is active, this panel utility
cannot be executed. See "Stop Panel Utility"
later in this section.
'\,
b. For a register display, set the
DISPLAY/FUNCTION SELECT switch to
REGISTER AD"DRESS.
Select the address or register to display:
a. For a storage display, set the storage
address in STORAGE
ADDRESS/REGISTER DATA switches A,
B, C, 0, and E.
b. For a register display, set the register
number in STORAGE
ADDRESS/REGISTER DATA switches B
and D.
If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
DISPLAY A should be X'OOOO' and DISPLAY
B should be X'8068'. For other values, see
the appropriate 1FT symptom index.
If the HARD STOP light is on, set the
DISPLAY /FUNCTION SELECT switch to
FUNCTION 5 and press the START
pushbutton to continue. Otherwise, do as
requested for the original stop code.
Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 1,2, or 3. The data
will be displayed during each timer interrupt
until the utility is stopped (see "Stop Panel
Utility" later in this section).
The displayed data is tested with a mask and an
expected bit pattern. A single bitor any number
of the displayed data bits can be tested. For
each bit position that is to be tested, the
corresponding bit position in the mask is set to a
1. The mask is ANDed with the data and the
result is exclusive ORed with the expected data.
If the result is not zero, a hard stop occurs. (To
continue after such a hard stop, see "Continuing
from an Error Stop or Manual Intervention Stop"
earlier in this section.)
Although the display function can be bypassed
because of the DISPLAY/FUNCTION SELECT
switch position or a stop code display, the test
data function is performed as long as the utility is
active.
/,,\
-(~
'--
"
/
/
~
/-.~
"
./
'.
./
/
./
f~
,
./
(
'-
\.. j
~
(
\--./
./
r
-,
r~.
-'.
./
£~
[""",
"'J
',,-
./
iC"~
,
../
"',
('~
/
\., ./
\, ./
~--~
"-
/
DCM020
b. For a register display, set the register
number in STORAGE
ADDRESS/REGISTER DATA switches B
and D.
14. If the HARD STOP light is on, press the
START push button otherwise press the
INTERRUPT push button.
15. If the HARD STOP light is on, set the
DISPLAY /FUNCTION SELECT switch to
FUNCTION 5 and press the START
pushbutton to continue. Otherwise, do as
requested for the original stop code.
16. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 1, 2,or 3. The data
will be displayed during each timer interrupt
until the panel utility is stopped (see "Stop
Panel Utility" later in this section).
For example: Assume that you want to
continuously display the contents of storage
location X'1888' and you want to_ hard stop if
byte 0 bit 0 at storage location X'1888' is a 1.
1. For step 6 above, you would set X'8000'
(mask= 1000 0000 0000 0000) in STORAGE
ADDRESS/REGISTER DATA switches
B,C,D, and E. This is the mask; the 1 bit
indicates which position of the data that will
be tested for a 1 bit.
2. For step 9 above, you would set the bit
position that you want tested to zero. In
this example, set STORAGE
ADDRESS/REGISTER DATA switches
B,C,D, and E to X'OOOO' (000000000000
0000). (Note that setting switches B, C, 0,
and E to any value in which bit 0 of switch B
is a zero will work; for example X'7FFF'
(0111111111111111.)
3. For step 12 above, you would set the
DISPLAY /FUNCTION SELECT switch to
STORAGE ADDRESS.
4. For step 13 above, you would set the
STORAGE ADDRESS/REGISTER DATA
switches to X'1888' (the address of the
storage location).
Address Compare Display Without Test
This panel utility displays the contents of a
specified storage location or register address
when an address compare interrupt occurs. The
data displayed is not tested for any special
conditions. (Refer to "LOAD/STORE ADDRESS
COMPARE Switch" in the CTRL PNL section of
Volume 2.
(
(~
(
The display is bypassed if the DCM is stopped
for an error stop, manual intervention stop, DCM
code, or if the DISPLAY/FUNCTION SELECT
switch is not in FUNCTION 1, 2, or 3.
If another panel utility is active, this panel utility
cannot be executed. See "Stop Panel Utility"
later in this section.
1. The PROGRAM DISPLAY light should be on
during this procedure; if it is not on, see
"Determining Why the PROGRAM DISPLAY
Light is Not On" later in this section.
2. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 1.
3. Set the STORAGE ADDRESS/REGISTER
OAT A switch B to X' 4'.
4. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
5. DISPLAY A should be X'OOOO' and DISPLAY
B should be X'8066'. For other values, see
the appropriate 1FT symptom index in the
I FT section.
6. Select the type of display:
a. For a storage display, set the
DISPLAY /FUNCTION SELECT switch to
STORAGE ADDRESS.
b. For a register display, set the
DISPLAY /FUNCTION SELECT switch to
REGISTER ADDRESS.
7. Select the address or register to display:
a. For a storage display, set the storage
address in STORAGE
ADDRESS/REGISTER DATA switches A,
B, C, 0, and E.
b. For a register display, set the register
number in STORAGE
ADDRESS/REGISTER DATA switches B
and D.
8. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
9. DISPLAY A should be X'OOOO' and DISPLAY
B should be X'8068'. For other values, see
the appropriate 1FT symptom indexes in the
1FT section.
10. If the HARD STOP light is on, set the
DISPLAY /FUNCTION SELECT switch to
FUNCTION 5 and press the START
pushbutton to continue. Otherwise, do as
requested for the original stop code.
11. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 1,2, or 3. The data
will be displayed during each timer interrupt
(-
(
(
until the paner utility is stopped (see "Stop
Panel Utility" later in this section).
12. Set up for either a LOAD or a STORE
address compare operation (set the STORE
COMPARE LOAD switch to either STORE or
LOAD).
13. Set the STORAGE ADDRESS/REGISTER
DATA switches to the storage address
where the compare is to be made.
14. Set the MODE SELECT switch to ADDRESS
COMPARE INTERRUPT. When an address
compare interrupt occurs, the data stored at
that address or register will be displayed.
The display can be stopped and started with
the MODE SELECT switch.
Address Compare Display With Test
This panel utility displays the contents of a
specified storage location or register address
when an address compare interrupt occurs.
The data that is displayed is tested with· a "mask
and expected bit" pattern (a single bit ora·
number of bits of data may be tested). If the data
is not equal to the expected data, the DCM makesa hard stop. Set the DISPLAY/FUNCTION
SELECT switch to FUNCTION 5 and" press the
START pushbutton to continue.
The display is bypassed if the DCM is stopped
for either an error stop, manual intervention stop,
a DCM code, or if the DISPLAY/FUNCTION
SELECT switch is not set to FUNCTION 1,2, or 3.
If another panel utility is active, this panel utility
cannot be executed. See "Stop Panel Utility"
later in this section.
1. The PROGRAM DISPLAY light should be on
during this procedure; if it is not on, see
"Determining Why the PROGRAM DISPLAY
Light is Not On" later in this section.
2. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 1.
3. Set the STORAGE ADDRESS/REGISTER
DATA switch Bto X'5'.
4. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
5. DISPLAY A should be X'OOOO' and DISPLAY
B should be X'8064'. For other values, see
the appropriate 1FT symptom index.
6. Enter the mask to be used to test the data in
STORAGE ADDRESS/REGISTER DATA
switches B,C,D, and E.
(.'.
(/ (
(
(
(
(- (
7. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
8. DISPLAY A should be X'OOOO' and DISPLAY
B should be '8065'. For other values, see
the appropriate 1FT symptom index.
9. Enter the expected data in the STORAGE
ADDRESS/REGISTER DATA switches
B,C,D, and E.
10. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
11. DISPLAY A should be X'OOOO' and DISPLAY
B should be X'8066'. For other values, see
the appropriate 1FT symptom index.
12. Select the type of display:
a. For a storage display, set the
DISPLAY/FUNCTION SELECT switch to
STORAGE ADDRESS.
b. For a register display, set the
DISPLAY/FUNCTION SELECT switch to
REGISTER ADDRESS.
13. Select the address or register to display:
a. For a storage display, set the storage
address in STORAGE
ADDRESS/REGISTER DATA switches A,
B, C, 0, and E.
b. For a register display, set the register
number in STORAGE
ADDRESS/REGISTER DATA switches B
and D.
14. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
15. DISPLAY A should be X'OOOO' and DISPLAY
B should be X'8068'. For other values, see
the appropriate 1FT symptom indexes in the
1FT section.
16. If the HARD STOP light is on, set the
DISPLAY/FUNCTION SELECT switch to
FUNCTION 5 and press the START
pushbutton to continue; otherwise do as
requested for the original stop code.
17. Setthe DISPLAY/FUNCTION SELECT
switch to FUNCTION 1,2, or 3 to make the
display active during each timer interrupt
until the panel utility is stopped (see "Stop
Panel Utility" later in this section).
18. Set up for either a LOAD or a STORE
address compare operation (set the STORE
COMPARE LOAD switch to either STORE or
LOAD).
19. Set the STORAGE ADDRESS/REGISTER
DATA switches to the storage address
where the compare is to be made.
20. Set the MODE SELECT switch to ADDRESS
COMPARE INTERRUPT. When an address
compare interrupt occurs, the data stored at
that address or register will be displayed.
The display can be stopped and started with
the MODE SELECT switch.
For example: Assume that you want to display
the contents of register X'15' after the instruction
X'1924' has been executed and to make a hard
stop if bits 1.1 and 1.2 of register X'15' are zero.
1. For step 6 above, you would set X'0060'
(mask= 0000 0000 0110 OOOO) in STORAGE
ADDRESS/REGISTER DATA switches
B,C,D, and E. This is the mask; the 1 bit
indicates which position of the displayed
data that will be tested for a 1 bit
2. For step 9 above, you would set the bit
positions that you want tested to ones. In
this example, set STORAGE
ADDRESS/REGISTER DATA switches
B,C,D, and E to X'0060' (000000000110
0000·). (Note that setting switches B, C, 0,
and E to any value in which bits 1 and 2 of
switch C is a one will work; for example
X'FFFF' (1111 1111 1111 1111.))
3. For step 12 above, you would set the
DISPLAY/FUNCTION switch to REGISTER
ADDRESS.
4. For step 13 above, you would set the
STORAGE ADDRESS/REGISTER DATA
switches to X'1050' (register X'15').
5. Set up for either a LOAD or a STORE
address compare operation (set the STORE
COMPARE LOAD switch to either STORE or
LOAD).
6. Set the STORAGE ADDRESS/REGISTER
DATA switches to the storage address
where the compare is to be made.
7. Set the MODE SELECT switch to ADDRESS
COMPARE INTERRUPT. When an address
compare interrupt occurs, the data stored in
register X'15' will be displayed after the
instruction at address X'1924' has been
executed. The display can be stopped and
started with the MODE SELECT switch.
Note: If the address compare interrupt is used, either in the
3705 OCM utilities or while running the 3705 Initial
Test IFTs, unexpected errors may occur. Some of the
tests cause intentional parity errors and CCU checks
by means of an Output X'78' which affects the next
Diagnostic Control Monitor
DCM025
DCM030
Diagnostic Control Monitor
instruction cy.cle. Some of the tests are time
dependent and the extra time needed to handle the
address compare interrupt causes errors. The level 1
interrupt that occurs for the address interrupt maybe
reported as an error by some tests and may not cause
errors in other tests depending upon when the address
compare interrupt occurs.
display an error code and must be reset to exit
the routine.
ADDRESS/REGISTER DATA SWITCHES. The CE
sense switches can also be set when you
perform part 2 of an 1FT request (see "How to
Request an 1FT" in the 1FT section of this
volume).
Bypass Error Stop CE Sense Switch
This switch causes the DCM to not stop for an
error display unless it is a new error display.
This switch must be set with the restart routine
on first error and the loop on first error to cause
continuous looping. If this switch is not set with
the restart and loop switches, the DCM stops
with the error displayed each time the error is
detected. For intermittent errors, this switch can
be used to determine the relative time between
failures.
Sense Switch Description
Set or Display Repeat Count
This panel utility displays or changes the repeat
count. The repeat count determines the number
of times each routine is executed before
proceeding to the next routine when the CE sense
switch "repeat each routine X times" is set.
Repeat count is entered in hex in the range
X'OO-FF' (decimal 0-255). 00 is treated as 256.
If another panel utility is active, this panel utility
cannot be executed. See "Stop Panel Utility"
later in this section.
1. The PROGRAM DISPLAY light should be on
during this procedure; if it is not on, see
"Determining Why the PROGRAM DISPLAY
Light is Not On" later in this section.
2. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 1.
3. Set the STORAGE ADDRESS/REGISTER
DATA switches A, B, C, 0, and E to the
following· positions:
ABC D E
Set Count
Display Count
- 6 - HH
- 7
where:
HH is the repeat count in hex.
- means the switch can be set to any position.
1. If the HARD STOP light is on, press the
START pushbutton otherwise press the
INTERRUPT pushbutton.
2. DISPLAY A should be X'OOOO' and DISPLAY
B should be X'60HH' or X'70HH', where HH
is the value of the repeat count. For other
values, see the appropriate 1FT symptom
index.
3. To continue if the HARD STOPlight is on,
set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 5 and press the START
pushbutton.
Set, Reset, or Display CE Sense Switches
This panel utility al.lows you to set and resetthe
CE sense switches, which control execution of
the IFTs, using the STORAGE
Bypass New Error Stops CE Sense Switch
This CE sense switch causes the DCM to bypass
new error stops while looping on a selected error
code. If this switch is not set, the DCM stops for
new errors detected during the loop.
Where:
S
= 0 or 1 for the desired byte
MM = the bit position of the switches to be
set or reset. (if MM = 00, the selected
byte of the switches will be displayed,
but not changed.)
= set to 0 when multiple CE sense
X
switches are not used.
- means the switch can be set to any position.
Wait Before Continuing CE Sense Switch
This CE sense switch causes the DCM to wait
after the INTERRUPT or START pushbuttons are
pressed (with DISPLAY B containing X'806F').
The wait allows you to alter the STORAGE
ADDRESS/REGISTER DATA switches for
address compare or other uses. The DCM
continues from the wait when the
DISPLAY/FUNCTION SELECT switch is changed
to FUNCTION 5 and the START pushbutton is
pressed.
Cycle on Request CE Sense Switch
This CE sense switch causes the DCM to repeat
the requested 1FT routine or group of routines
until the switch is reset.
Include Manual Intervention Routines CE
Sense Switch
This switch causes the manual intervention
routines to be included in the requested 1FT.
Repeat Each Routine CE Sense Switch
This CE sense switch causes the DCM to repeat
each routine the number of times specified by a
repeat count. The requested routine will repeat
128 times unless you change the repeat count
"(see "Set or Display Repeat Count" earlier in this
section).
'
Problem Definition Mode CE Sense Switch
This CE sense switch causes a manual
intervention code to be displayed in DISPLAY B.
You must look in the appropriate 1FT symptom
index to determine what to do when the stop
occurs. This mode gives you control over
running long CCU storage protect 1FT routines.
Halt Before Execution of CE Sense Switch
This CE sense switch causes the DCM to halt
before executing each test routine.
Restart Routine on First Error CE Sense
Switch
This CE sense switch causes the DCM to restart
the current routine when the first error is
detected. Once this sense switch is set, the OCM
restarts the routine at thepoint.of the fir-sterror
detected even though the error may not occur on
subsequent restarts. This switch can be'set
when the routine is stopped to display em error
code and must be reset to exit;;theroutine.
Setting CE Sense Switches
Any of the switches can be set or reset
separately. The switches can be displayed, one
byte at a time.
If another panel utility is active, this panel utility
cannot be executed. See "Stop Panel Utility"
later in this section.
Loop on First Error CE Sense;,$witch
This CE switch causes the DCM;tolooptJ1e:
routine in which the firsterror'w8$'detected.>.Jhe
loop taken by this option.is:tn~;$rmtl~stpoS$it:iI'Ei
loop within the, routine.·Once:this ,CEsens,e'
switch is set" the oeM loops'therolltine<&t,the
point of the first error ~tect.d~.ven, tl)ougtnnii
error is not detectedonsubseq""nt Joops.,'J)ijs,
switchean be set whenthefObtme'j,s,:stoppec;t.to'
1. The PROGRAM DISPLAY light should be on
during this procedure; if it is not on, see
"Determining Why the PROGRAM DISPLAY
Lightis NotOn" later in this section.
2. Setthe DISPLAY/FUNCTION SELECT.
switch to FUNCTION 1.
3. Set the STORAGE ADDRESS/REGISTER
DATA !lwitclies.to the following positions:
,~
\, ~
STORAGE ADDRESS/REGISTER
DATA Switches
ABC D E
Set switches in byte S
- 9 S MM
Reset switches in byte S
- A S MM
j
('~
'
"'._./
~"
'''./
(-".
\. . . /
(~
\. ./
'''j
('/
'-
/"~
"-...J
(~
r1-1
'" j
"-. .. /
!
rr~
'''-../
(r~
~)
(~
"-.jI
r""
"-../
("-".
I~'
"'~. ./
0
'''-.j
r'l\
V
(~
----
(
(
(
(
(
(
(
(
(
c
(
(
(
(
(
(
(
(
(
(
- - -
-
----~--
--
(,
C
('
{
(
(
( (
3705-80 OCM SYMPTOM I NOEX - Cont.
Code
Display
B
Code
0000
8065
Enter the expected data in the STORAGE ADDRESS/REGISTER DATA switches
for testing the contents of the address to display, then press the START pushbutton if the HARD STOP light is on.
Press the INTERRUPT pushbutton if the program is running.
8066
Enter the address to display.
Set the DISPLAY/FUNCTION SELECT switch to:
Display
A
Oeser iption of the DlSf'LA Y Code
Manual Intervention Required
A
*
storage address to
display contents of
storage location.
register address to
display contents of
register.
Set the STORAGE ADDRESS/REGISTER DATA switches to:
ABCDE
B/D
= storage address
=register address
Press the START pushbutton if the HARD STOP light is on. Press the INTERRUPT pushbutton if the program is running.
8067
DISPLAY/FUNCTION SELECT switch not set to STORAGE ADDRESS or
REGISTER ADDRESS for code 8066.
Retry with initial utility request.
8068
Set up for display is complete.
If the HARD STOP light is on, select FUNCTION 5 (continue) and press the START pushbutton to continue. (If previous stop code was 8000 through 8007 select
FUNCTION 4 (request) and complete the request. If the program is running, this display code is for information only.
XXXX
806F
The DCM has halted due to CE sense switch "wait before continuing" being on.
This pause may be used to execute the utility functions or to change the STORAGE ADDRESS/REGISTER DATA switches for address compare use. Select FUNCTION 5
(continue) and press the START pushbutton to continue.
FFFF
80FO
Test request is finished and no errors were detected. The DCM is ready to accept
a new request.
See stop 8000 for procedure to enter request.
80F1
Test request is finished and errors were detected. The DCM is ready to accept a
new request.
See stop 8000 for procedure to enter request.
80F2
Test was aborted by the operator.
Ready to accept a new request. See stop 8000 for procedure to enter request.
XXXX
80FF
A program or hardware failure has caused a branch to storage location zero.
See interrupt entered indicator to determine interrupt level. DISPLAY A is the address of the instruction that caused the branch to location zero if L1 is not active. (The
address also is in register 5 of the active level.) Analyze the program registers, etc. to determine why the branch occurred. Reload the DCM to recover from this error.
FFFF
FFFF
DCM is loaded and ready for first 1FT request.
See FFFF 8000 for request procedure.
Both bits of byte X in DISPLAY B should be on.
DIAGNOSTIC CONTROL MONITOR SYMPTOM INDEX
DeM 130
1ldF--
-------
- - - - -
~
~-,-,-
~
This page intentionally left blank
/'
'\
, j
~" '--:",
'-~,
/
r-~,
\- )
'\)
'- /
(~
'---./
I?~-'\
("\
'---
'-~~j'
f'"",'---"/
(
t'
\.
'",./
0
~\
/
\,----/
i~
\...j
"-~
1"-",\
'---
j
\
/
)
,,/
\...
j
l/
(~
\j
r\,
,
/
,1'\
-----J
/.--'~\
(
(
(
(
c
(
INITIAL TEST (lNIT)
(
(
{
f'
(
INIT EXECUTION
(
'
.
..
(
(
(
(
(
(
(
the default value assumed is ext=nyyy (that is,
ext=NO,YES,YES,YES).
3705 Setup Procedures
1. Switch the 3705 power on.
WHAT INIT DOES
Initial Test (INIT) is loaded by the type 1 channel
.adapter (CA) loader (Z3705AAA) and is executed
before the control program (CP) or the diagnostic
control monitor (DCM) (Z3705ACA) is loaded.
INIT verifies that basic registers, storage areas,
storage functions, and the 3705-80 instruction
set operate correctly. INIT has two sections:
• Z3705ADA
- Tests the functions of some registers
- Tests basic storage functions
- Tests a limited amount of storage
• Z3705AEA
- Tests the instruction set in each of the five
program levels, starting at program level 1,
then program level 2, and so on through
program level 5. INIT then returns to
program level 1 before returning control to
the loader. Each instruction is tested for
proper: (1) instruction decode, (2) CZ latch
setting and resetting, and (3) ALU function.
,- Tests storage addressing by storing a
unique pattern at each storage location.
Storing begins at the end of INIT and
continues to the last storage location. INIT
then reads storage to see that none of the
storage locations have been modified after
being stored into.
This section of the manual describes loading and
running INIT using a host channel; if you are
using the remote program load (RPL) feature, see
the RPL DIAG section.
2.
3.
4.
5.
6.
Set both the MODE SELECT and
DIAGNOSTIC CONTROL switches to the
PROCESS position.
Enable the appropriate channel interface.
Set the DISPLAY /FUNCTION SELECT
switch to any position other than a
FUNCTION position to load the DCM at the
completion of INIT. For information on
using the FUNCTION positions, see "CE
Options" later in this section.
Press the RESET pushbutton and then the
LOAD pushbutton.
DISPLAY B bits 0.2 and 0.3 should be on,
indicating that ROS has reached IPL phase
3. The LOAD light is on; the following lights
are off: HARDSTOP, TEST, WAIT, and
PROGRAM STOP.
If the above conditions are not present, refer to
the "CE Panel Test" in the CTRL PNL section and
the "ROS Test" in the ROS section (Volume 2).
Running the Host Loader
Start the OLTEP or the OLTSEP program in the
host processor. When OLTEP or OLTSEP causes
a console printer message of:
riD 'ENTER DEV ITEST /OPT I'
you enter:
r ID,'XXX/3705A/nfe,ext=ABCD/'
where:
XXX =
The INIT symptom index, at the back of this
section, lists the functions tested by the INIT
routines. The symptom index also shows critical
register values, expected CZ latch settings, and
locations of suspected failing cards.
REQUIREMENTS
You must have the proper configuration data set
(CDS) cataloged with the remainder of the
'
system (for additional information, see the CDS
section). Before INIT routines can be executed
properly, the functional areas in the CCU
hardware must be operational. These functional
areas are tested by the ROS bootstrap program
each time the LOAD pushbutton is pressed.
Delay of INIT Execution: Before INIT begins
executing, the 3705/host interface must be
disabled. The type 1 CA loader attempts to
disable the 3705 interface by issuing a diagnostic
DISABLE command when INIT is loaded. The
host 'clock out' line must drop before the 3705
can go offline. The host 'clock out' line drops
when either the host processor STOP pushbutton
is pressed or when the host processor enters the
wait state.
Operating situations under OS or DOS can result
in maximum use of the processor that will delay
the host from entering the wait state. During this
delay, the OLT prints a message indicating that it
is waiting for the 3705 to disable its channel
interface. Also, at the 3705, an equivalent
message code is displayed in the control panel
lights. See "Interpreting Display Lights during
Loading" later in this section.
MESSAGES
Messages occur during operation of the type 1
CA loader that indicate: (1) the loader has
detected an error or (2) an action is needed to
load the diagnostic programs into 3705 storage.
The messages, message explanations, and
responses are as follows:
THE STATUS OF THE 3705 CANNOT BE
DETERMINED. **WARNING** CONTINUATION
WILL CAUSE THE ENTIRE 3705 TO BECOME
UNAVAILABLE. ENTER 'C' TO CANCEL OR 'P'
TO PROCEED.
the channel and unit address of the 3705
(native attachment address).
Explanation: The OLT cannot determine the
status (offline or stopped) of the 3705. If the
OLT is allowed to continue, the program in
3705 storage will be destroyed.
ABCD = four operating options provided by the
OLT and type 1 CA loaders. The correct
entries are Y (for YES) or N (for NO).
The options are defined as follows:
A = OLT bypass printing channel errors
B= Run INIT
C = Run type 1 CA loader with error
checking
D = Bypass hard stop on type 1 'CA
loader error tn 3705 and retry
If your response to the DEV /TEST /OPT/
message does not include the ext: parameter,
Response: Continue by entering a Cor P, as
follows:
r id,'C' (for cancel)
or
r id,'P' (for proceed)
Any other response results in the program's
repeating the last line of the above message.
After five invalid responses, the message
INVALID RESPONSE AFTER 5 REQUESTS is
printed.
(.\ (/
ALL 3705 ADDRESSES ARE NOT STOPPED OR
OFFLINE. **WARNING** CONTINUATION WILL
CAUSE THE ENTIRE 3705 TO BECOME
UNAVAILABLE. ENTER 'C' TO CANCEL OR 'P'
TO PROCEED, OR 'R' TO RETRY.
Explanation: The OLT has been notified by the
executive driver that all 3705 addresses are
not offline or stopped. If the OLT is allowed
to continue, the program in 3705 storage will
be destroyed.
Response: You have the opportunity to make
all addresses available to the OLTusing
standard system facilities. Continue by
entering a C, P, or R, as follows:
r id,'C' (for cancel)
or
r id,'P' (for proceed)
or
r id,'R' (for retry)
The difference between a P and an R response is
(1) P means to proceed, regardless of the offline
or online status of the 3705 address and (2) R
means that the operator has been taking
addresses offline and wants the program to
verify that aU units are now available to the OLT.
Any other response results in the program's
repeating the last line of the above message.
After five invalid responses, the message
INVALID RESPONSE AFTER 5 REQUESTS is
printed.
INVALID RESPONSE AFTER 5 REQUESTS
Explanation: The program assumed the
response of 'C' and terminated the OLT.
Response: None.
BAD RC YY FROM XXXXXXX
Explanation: The type 1 CA loader has
requested of the executive driver a function
that the driver is incapable of performing.
This may be because of an invalid parameter
or an error that has occurred while the
executive driver is performing the request.
XXXXXXXis the name of the function being
requested, and YY is the code returned by the
executive program. The XXXXXXX field is
filled by the type 1 CA loader.
Initial Test
INIT010
INIT 020
Initial Test
OOFF
disabled and the 3705 begins executing thd
1FT.
Response: This message is a diagnostic
programming aid. If the message occurs, a
dump and other available information should
be submitted with an APAR (Authorized
Program Analysis Report).
Response: Pressing the STOP and then the
START pushbuttons on the processor console
drops the 'clock out' line long enough for the
370S to go offline. Entering the wait state
accomplishes this also.
BAD CC SIO
FAILED TO INTRPT
BAD STATUS ON SIO
NOP CMD FOR 370S LOAD BUTTON
WRT CMD TO WRITE DATA
WRT CM 0 FOR LAST BLOCK
WRT CMD SENDING CONTROL WORD
Explanation: Ifthe DCM has already been
loaded, the program indicates that you can
make a request at the 370S. If the DCM has
not been loaded, the program starts over by
requesting you to press the LOAD pushbutton
on the.370S.
'--.
' .. , j
INTERPRETING DISPLAY LIGHTS
DURING LOADING
DISPLAY A shows the number of valid channel
commands (Read, Write, IPL, Write, Break, or
Sense) that has occurred during the loading of a
module. This count is dynamically updated each
time a device end (DE) is presented to end a
successful channel transfer. DISPLAY B shows
various errors or execution indications, as
follows:
Explanation: The retry count (normally 10) is
exhausted, and the error is still occurring. The
, type 1 CA loader assumes that loss of control
has occurred and restarts at the beginning.
Explanation: The type 1 CA loader has loaded
INIT in the 370S and is waiting for the 370S to
go offline. This message is repeated every 20
seconds until the 370S ch~nnel interface is
'\
Response: Enter another request. However, if
the original request was valid, the 1FT module
name must be added to the OLTEP/OLTSEP
library before the 1FT can be loaded.
Z370SXXX IN ERROR, ABORT LOAD
AWAITING 370S INTERFACE DISABLE
'-,
j
"\
-,
/
-,
./
~
'- j
;",
OOFE
,
'--_/
'-
./
"
I'
'-
"
,/"'--..,
.,-~
j
,-,,.//
I
'-
/
REMOTE PROGRAM LOADER (RPL)
To use the remote program loader:
1. The RPL feature must be installed.
2. A correctly written disk media must be
available.
Refer to the RPL DIAG section for IPL
procedures.
NORMAL INIT RUN INDICATIONS
During a normal control program load or DCM
load, the following indications signal correct
operation:
1. The ENTERED INTERRUPT LEVEL lights
switch sequentially from PROG LEVl (which
indicates program level 1) to no lights on
(which indicates program level S) as the
INIT routines are executed in that level.
PROG LEV1 is switched on again prior to
loading the control program or DCM.
Definition
DISPLAY B
Response: Refer to the message "ERP USED
ON MOD Z370SXXX".
/-\
1. The loader program must be initiated in the
host processor. Refer to the appropriate
NCP or Emulation Program (EP)
publications.
2. Switch the 370S power on.
3. Set both the MODE SELECT and
DIAGNOSTIC CONTROL switches in the
PROCESS position.
4. Enable the appropriate channel interface.
S. Set the DISPLAY/FUNCTION SELECT
switch to any position other than a
FUNCTION position. However, the STATUS
position is suggested.
6. Press the RESET pushbutton and then the
LOAD pushbutton.
Explanation: The type 1 CA loader has
received an 1FT request (through a Read
command) for a module that is not in OLTLIB.
The type 1 CA loader returns to the Read
command to allow you to enter another
request at the 370S.
Response: Verify that the INIT or 1FT modules
are at the proper level.
Response: Press the LOAD pushbutton on the
370S. This message repeats every 30 seconds
until the LOAD pushbutton is pressed.
This utility allows the customer to execute the
INIT routines prior to loading NCP or EP.
MOD Z370SXXX NOT IN OLTLIB
Explanation: This message warns you that
errors have occurred while loading the INIT or
1FT modules. Each output operation to the
3705 is attempted up to 10 times if an error
occurs (unless the OLT option EL [N] has been
modified). If the operation being attempted is
performed before the error count is
exhausted, the OLT considers the data
transfer successful and continues loading the
INIT or 1FT modules.
Explanation: This message occurs when the
type 1 CA loader is initially started or if loss of
control occurs. It constitutes the beginning of
the type 1 CA loader and provides the
synchronization between the 370S and the
host processor.
A hard stop at locationTAR=06D6 indicates that
the wrong loader is being used for the channel;
register X79', bit 1.6 must be on if a type 1 CA is
installed. (A CDS error can also cause this stop.)
A hard stop at location T AR=0668 indicates an
error has been detected during a type 1 CA
loader operation.
Response: Enter another request.
ERP USED ON MOD Z370SXXX
PRESS LOAD ON 370S
\
Explanation: The type 1 CA loader has
detected an error in the requested module.
(An address in the module is on an odd
boundary.) The type 1 CA loader returns to the
Read command to allow you to enter another
request at the 370S.
Response: None.
Response: If DCM has been loaded, enter a
request; otherwise press LOAD.
0000
COMMUNICATIONS CONTROLLER
LOADER UTI LlTY
INVALID PLINK MOD
Explanation: These messages indicate that
INIT or 1FT modules have been successfully
loaded in the 370S without any errors being
detected. Z370SAAA is the type 1 CA loader,
Z370SADA is the INIT section 1, and
Z370SAEA is the INIT section 2.
WRT IPL CMD SENDING LOADER
-""
Response: None.
370S LOADED WITH 1FT Z370SAAA
370S LOADED WITH 1FT Z370SADA
370S LOADED WITH 1FT Z370SAEA
RD CMD FOR 1FT REO
FFOO
Explanation: This message occurs every 20
seconds after an 1FT has been loaded in the
370S. Most of the IFTs disable the 370S. The
type 1 CA loader is in a loop issuing NOP
commands to the 370S. If it receives condition
code 03, the 370S interface is not enabled; it
prints this message and waits another 20
seconds. When the 3705 is enabled, the type
1 CA loader continues executing.
If this message occurs continuously, the 370S
is either unable to go offline after the INIT has
been loaded or unable to get back online after
the INIT has completed execution. A
processor-bound system can cause this
problem.
The following messages are printed on the
system output pri~ter to describe failures and the
operation that is being attempted when an error
occurs:
"./
WAITING FOR 1FT COMPLETION
Awaiting type 1 channel
interface disable
!"'"-.-"",
---
/'
'-.
~
/
Awaiting type 1 channel
interface enable
Awaiting type 1 channel level 3
interrupt
All other times
'
'-
/
r~
1
"-
/
(-",
j
(-"
'"
--~/
:-"
1"'-"
"-
~_/
/
~)
~."",
,,--,/
t"'-.
(
(
(/
(
2. These panel indicators are on during INIT:
PROGRAM DISPLAY
TEST
LOAD
CE OPTIONS
The following options are available for
troubleshooting failures.
Loop On Program Level
Loop on program level allows you to loop in INIT
under control of the DISPLAY/FUNCTION
SELECT switch.
DISPLAY IFUNCTION
SELECT Switch
Position
Loop Description
FUNCTION
FUNCTION
FUNCTION
FUNCTION
FUNCTION
FUNCTION
Any other
position
1
2
3
4
5
6
Loop on program level 1
Loop on program level 2
Loop on program level 3
Loop on program level 4
Loop on program level 5
Loop on all program levels
Run each test once, then
request the next program.
When the DISPLAY/FUNCTION SELECT switch
is set to any of the FUNCTION positions, the
routine number is displayed in DISPLAY B, byte
0; and the active program level is displayed in
byte 1, bits 4-7.
Note: Because the I N IT routines are executed very quickly,
the routine number displayed may not be visible.
(
(
(
(
section to determine the address of the
output X'70' instruction).
3. Press START.
The program takes the address entered in the
STORAGE ADDRESS/REGISTER DATA switches
and overlays that halfword with a NOP
instruction to prevent additional hard stops and
allow looping.
To exit from the loop, momentarily move the
DISPLAY /FUNCTION SELECT switch to a
position other than FUNCTION 5. The overlaid
output X'70' instruction is restored.
Display Routine Starting Address
This option allows you to display, in DISPLAY A,
the starting address of the routine in which the
error occurred.
When the program stops to display the second
error display data:
1. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 5.
2. Place the address of the output X'70'
instruction in the STORAGE
ADDRESS/REGISTER DATA switches.
3. Add X'0001' to the STORAGE
AD'DRESS/REGISTER DATA switch setting.
4. Press START.
This turns on a flag which causes the program to
stop again with the starting address displayed in
DISPLAY A.
DISPLAY A, bit 1.3 is on at this time to indicate
that this option is active.
Loop On Error
Loop on error allows you to loop in a routine
from the location where the error was detected
back to the start of the routine. If on ths next
pass through the routine the error does not
occur, the program loops from the end of the
routine back to the start. This method tests for
intermittent errors.
To loop on an error after the program stops so
that you can display the second error display
data:
1. Set the DISPLAY IFUNCTION SELECT
switch to FUNCTION 5.
2. Place the address of the output X'70'
instruction, which indicates the error, in the
STORAGE ADDRESS/REGISTER DATA
switches. (See "Failure Indications" in this
Once you have recorded the starting address,
you have two options: (1) press START to
execute the loop-on-error program again, or (2)
continue testing by setting the
DISPLAY IFUNCTION SELECT switch to a
position other than FUNCTION 5 and pressing
START.
Abort the Current Routine and Continue
Testing
If a program stop occurs and you do not want to
loop on error or display the routine starting
address, set the DISPLAY/FUNCTION SELECT
switch to any position except FUNCTION 5 and
press START. This aborts the current routine
and continues testing.
(
/
(
(
(
(
(
(
(
('
(
(
(
(
FAILURE INDICATIONS
DISPLAY A
If an error is detected during execution of INIT,
the WAIT, HARD STOP, and PROGRAM STOP
lights will be on. The error is one of two types:
Data displayed in DISPLAY A defines either the
error code and loop count or the routine starting
address. Ifthe PROGRAM STOP light is not on,
the data in DISPLAY A is the loop count. If the
PROGRAM STOP light is on and DISPLAY B byte
1, bit 3 is not on, the data in DISPLAY A is the
error code.
1. CCU CHECK: CCU checks are
hardware-detected errors that are seen in
DISPLAY A by setting the
DISPLAY /FUNCTION SELECT switch to the
STATUS position.
If a CCU check is detected, it can be the
result of the function being tested or it can
be a failure of the hardware doing the
testing. See the CCU Check Analysis
Flowchart in the Start section for
information and procedure concerning
failure.
2. PROGRAM STOP (no CCU check): INIT does
an output X'70' (hard stop) to report an
error.
If a program stop occurs, set the
DISPLAY /FUNCTION SELECT switch to any
position other than TAR & OP REGISTER or
STATUS. DISPLAY B will contain, in byte 0,
the current routine number and, in byte 1,
bits 4-7, the current program level.
Record: (1) the value of register 0 (RO) OAR)
for the current program level, (2) the setting
of the CZ latches, and (3) if appropriate, the
value of register 5 (R5) and lor register 7
(R7) (see Figure INIT-1 in "DISPLAY B").
To see if R5 or R7 is used, see the expected
results column in the INIT symptom index
for the current routine (DISPLAY B, byte 0).
Subtract 2 from the RO OAR) value to get the
address of the out stop instruction that
indicates the error. This address value is
needed for the loop-on-error option and
display-starting-address option.
Press START to display t'1e error codes in
DISPLAY A (see "How to Use the INIT
Symptom Index").
Select the desired CE option (FUNCTION
1-6).
Note: If an asynchronous program stop occurs (a level 1
interrupt from a section of the 3705-80 not presently being
tested), set the DISPLAY/FUNCTION SElECT switch to
STATUS and record DISPLAY B, bytes 0.4-7 and 1.0. See
the problem analysis chart in the START section.
How to Use the INIT Symptom Index
The DISPLAY/FUNCTION switch must be in a
FUNCTION position (1-6).
BYTE 0
Bits
BYTE 1
Bits
o
1 2 345 6 7
o
0
x x
0 0 0 0
o
1 234 5 6 7
o
0
x xxx x x
If DISPLAY A byte 0, bit 2 or 3 is on, the error
code is common to many routines and is listed in
the back of the INIT symptom index.
The majority of the INIT. routines are straight line
code (no looping or subroutines). As a result, by
taking the address of a given output X'70'
instruction and displaying the starting address of
that routine, you can use the
address-compare-interrupt capability to pinpoint
the failing instruction.
The symptom index supplies the critical data and
expected setting of the CZ latches.
DISPLAY B
Data displayed in DISPLAY B indicates (1) the
routine number, (2) the type of error data that is
displayed in DISPLAY A, and (3) the current
program level under test.
BYTE 1
Bits
BYTE 0
Bits
o
2 345 6 7
R R R R R R R R
Where:
RRRR RRRR
o
1 2 345 6 7
000 T N N N N
The routine number.
The type of data displayed
in DISPLAY A
0000 = The error code or loop count.
0001 = The starting address of the routine.
NNNN = The program level in which the error
occurred.
T
=
=
1000 = program level 1
0100 = program level 2
0010= program level 3
Initial Test
INIT 030
This page intentionally left blank
'\
./
/"'""
\
'--
\,
/
/'"'\
',,-
/
"
~
1
'-._/
r''''''
I
'-.
./
/'".
'--J
'-.
'\
'\
/
'.
/
.~
(~
.J
I
"
./
'-
./
/
"'.
r"
'
('-"'"
./
!.'"~\
\ ."/
/
',-.
j
\.
"'\
/
,P",\
"'
./
t'
'-.
'\
./
"r-,\
"'-
/
\_./
f
"\
.../
(
(
(
(
(
(
0001 = program level 4
0000 = program level 5
PROG
LEVEL
(lAR)
0100
0010
0001
2
3
4
0000
5
X'1S'
1000
(
(
(
(
(
(
{
{
(
(
(
(
(
(
(~
symptom index refers to a general register for a
program level without listing its hexadecimal
value, depending on the value of NNNN as
previously defined.
Because the majority of the INIT routines are
executed under all 5 program levels, the
NNNN
(
RO
R1
R2
R3
R4
R5
RS
R7
X'OO'
X'01'
X'02'
X'03'
X'04'
X'05'
X'OS'
X'07'
X'OO'
X'OS'
X'10'
X'01'
X'09'
X'11'
X'02'
X'OA'
X'12'
X'03'
X'OB'
X'04'
X'OC'
X'14'
X'05'
X'OO'
X'OS'
X'OE'
X'19'
X'1A'
X'15'
X'10'
X'1S'
X'1E'
X'07'
X'OF'
X'1T
X'1F'
X'13'
X'1B'
X'1C'
Figure INIT-1. Hexadecimal Values for Registers Based on Program Level
Initial Tast
INIT 040
(
This page intentionally left blank
/
'",
(
(
(
(
(
(
(
(
(
.~'
f
{
(
('
3705-80 INIT SYMPTOM INDEX
PROG LEV 'N'
Prior to Test
Ins:t. Execution
Expected and Actual
Results in PROG
LEV 'N' Req.
R2(0) = XX
R2(0) = 00
01
See Note 2.
R2(0) = XX
R2(1) = 00
01
See Note 2.
R2(0) = 00
R2(0) = FF
11
See Note 2.
R2(1) = 00
R2(.1) = FF
11
See Note 2.
a with X'55'.
R2(0) = FF
R2(0) = 55
11
See Note 2.
0006
LH R2, SAVE2 failed to load R2 byte 1 with X'55'.
R2(1) = FF
R2(1) = 55
11
See Note 2.
0007
LH R2, SAVE3 failed to load R2 byte
R2(0) = 55
R2(0) = AA
11
See Note 2.
R2(1) = 55
R2(1) = AA
11
See Note 2.
0009
a with X'AA'.
LH R2, SAVE3 failed to load R2 byte a with X'AA'.
Register X'04' Byte a failed to load the correct data.
R4(0) = Actual.
R5(0) = Expected.
11
See Note 2.
OOOA
Register X'04' Byte 1 failed to load the correct data.
R4(1) = Actual.
R5(0) = Expected.
11
See Note 2.
0008
Register X'06' Byte a failed to load the correct data.
R6(D) = Actual.
R5(0) = Expected.
11
See Note 2.
Register X'06' Byte 1 failed to load the correct data.
R6(1) = Actual.
R6(0) = Expected.
11
See Note 2.
R6= Maximum
address as calulated from
input X'70'.
Routine
Error
Code
0108
XXXX
Registers X'02', X'04', and X'06' are tested to verify data patterns FF, 00, AA,
and 55.
0001
XR R2, R2 fai.led to clear byte O.
0002
XR R2, R2 failed to clear byte 1.
0003
LH R2, SAVE failed to load R2 byte a with all ones.
0004
LH R2, SAVE failed to load R2 byte 1 with all ones.
0005
LH R2, SAVE2 failed to load R2 byte
Function Tested and EMIW Dactt......
0008
OOOC
,
I
0208
XXXX .'
Test to verify that input X'70' defines a valid maximum address. Test last valid
storage address (max. 64K). Storage size indicated in Reg X'70' is incorrect.
0308
XXXX
Error correction routine-Ability to correct single bit errors, detect double bit errors,
diagnostic reg reset.
0001
Error correction failed to reset data bit forced to 1 via diagnostic reg.
0002
Error correction failed to set data bit forced to
i
I
I
,
a via diagnostic reg.
I
I
0003
0708
R6 = Expected data.
R4 = Bits in error.
01
R6 = Expected data.
R3 = Bits in error.
01
R3 = Expected.
R6 = Actual.
0004
Diagnostic reg did not reset or test mode did not set. Reset of test mode should
reset the diagnostic reg.
R1 = Expected.
R3 = Actual.
01
XXXX
Addressing test-Address is stored as data and verified to be correct address.
0001
Data at address does not match address.
R1 = Expected.
R5 = Actual.
01
XXXX
Storagetest-Store zeros in background of ones.
0001
Background pattern was destroyed. Addressing problem suspected.
R1 = Test address.
R2 = Exp~ (backgnd.)
Ro = Bits in error;
Suspected Card
location (5)
FEALD
Page
FETMM
Page
Comments
If actual storage size is greater than 64K,
X'FFFE' will be used instead of actual
max. address.
Failed to detect double bit error.
I
0408
CZ
Latch
R.esults
Problem may be CDS, check CDS data defining
storage.
If this error occurs, bypass the running of INIT
and load the storage I FT.
.'
Z3705ADA INIT Symptom Index
INIT 100
(
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
Error
Code
i3705ADA INIT Symptom Index
Function Tested and Error Descriptiooa
Expected and,Actual
Results in PROG
LEV 'N' Req.
PROGLEV'N'
Prior to Test
Inst. Execution
CZ
Latch
Results
Suspected Card
Location(s}
FEALD
Page
FETMM
Page
I NIT 102
Comments
,
0002
Store and then load a test pattern.
R1 = Test address.
R4 = Expected.
R5 = Bits in error.
If this error occurs, bypass the running of INIT
and load the storage 1FT.
0003
Load test pattern again to test restore capability.
R1 = Test address.
R4 = Expected.
R3 = Bits in error.
If this error occurs, bypass the running of INIT
and load the storage I FT.
0004
Parity bit failed.
R1
= Test address.
If this error occurs, bypass the running of INIT
and load the storage IFT.
XXXX
Storage test-Store ones in background of zeros.
0001
Background pattern was destroyed. Addressing problem suspected.
0002
Store and then load a test pattern.
0003
Load test pattern again to test restore capability.
0908
XXXX
Program relocation-This routine is used to relocate test to address X'2000'. No
error stops should occur.
OA08
XXXX
Storage test 0-2K. Store zeros in background of ones.
0001
Background pattern was destroyed. Addressing problem suspected.
R1 = Test address.
R2 = Exp. (backgnd.)
R5 = Bits in error.
0002
Store and then load a test pattern.
R1 = Test address.
R4 = Expected.
R5 = Bits in error.
0003
Load test pattern again to test restore capability.
R 1 = Test address.
R4 = Expected.
R3 = Bits in error.
00011-
Parity bit failed.
R1
XXX X
Storage test 0-2K. Store ones in background of zeros.
0001
Background pattern was destroyed. Addressing problem suspected.
0708
0808
OB08
= Test address.
= Exp. (backgnd.)
= Bits in error.
R1 = Test a~dress.
R4 = Expected.
R5 = Bits in error.
R1 = Test address.
R4 = Expected.
R3 = Bits in error.
R1
R2
R5
= Test address.
= Exp. (backgnd.)
= Bits in error.
R1 = Test address.
R4 = Expected.
R5 = Bits in error.
R1 = Test address.
R4 = Expected.
R3 = Bits in error.
R1
R2
R5
I
0002
Store and then load a test pattern.
0003
Load test pattern again to test restore capability.
= Test address.
I
,
,
,/'--",
"
\
./
./
"
,
,
./
/'
'--.j
/""\,
\
j
'--. ./
"'\
r
"
'\
/
("
"
-'"
./
£
./
--------"----
(
c (
(
~-
C t
~
--~-------
(
(
(
(
(
(
(
(
(
(
(
~~~
(
(\
3705-80 INIT SYMPTOM INDEX - Cont.
Error
Routine
Code
XXXX
OC08
Function Tested and Error Description
PROG LEV 'N'
Prior to Test
Inst. Execution
Expected and Actual
Results in PROG
LEV 'N' Req.
CZ
Latch
Results
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Comments
Program relocation-All data relocated by Routine 0908 will be relocated back to
'OOOO-OFFE' and control will be passed to the C. E. Loop Option subroutine.
No error stops should occur.
I
",
•
Z3705ADA INIT Symptom Index
INIT 104
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
100N
Error
Code
Function Tested Md E...... Descriptiolll
'-,.-
.../
Resutts
FEALO
Page
FETMM,
Page
N/A
01
AB3H2
COOO2
6·640
Decode failure.
0002
Prior to issuing the branch, R1 was loaded with zeros to set the CZ latches. After
branching, the CZ latches are tested to verify that the branch did not alter the
CZ latches.
R1(1) = 00
R1(1)=00
01
AB3G2
CZxxx
6-640
CZ latch failure.
Same as 0001 above.
N/A
N/A
10
AB3H2
CD002
6·640
Decode failure.
AB3G2
CZxxx
6-640
CZ latch failure.
-
i Same as 0002 above except R1(1) is loaded with all ones to set the CZ latches to 10.
XXXX
LRI and BB pattern test.
0001
R1(1) is loaded with X'OS' using LRI, then R1(1) is XOR with X'OS'.
R1(1) = 05
R1(1)=OO
01
AB3H2
CD002
6-170
Decode failure.
0002
R1(1) is loaded with all ones and the CZ latches are tested.
R1(1) =00
R1(1)=FF
10
AB3G2
CZxxx
6-170
CZ latch failure.
0003
A series of BB instructions is performed on R1 (1). One of the eight BB failed
to branch.
R1(1) = FF
R1(1)=FF
10
AB3H2
CD002
6-660
Decode failure.
0004
BB instruction(s) altered the CZ latches.
R1(1) = FF
R1(1)=FF
10
AB~G2
CZxxx
6-660
CZ latch failure.
0005
R1 (0) is loaded with X'OO' and then the CZ latches are tested for 01.
R1(O) = XX
R1(O) =00
01
AB3H2
AB3G2
CD002
CZxxx
6-170
Decode failure.
CZ latch failure.
0006
A series of BB instructions is performed on R1 (0). One of the eight BB branched
on a zero or previous LRI failed.
R1(0) = 00
R1(O) = 00
01
AB3H2
CD002
6-660
6-170
Decode failure.
0007
BB instruction altered the CZ latches.
R1(O) .. 00
R1 (0) == 00
01
AB3G2
CZxxx
6-660
CZ latch failure.
0008
R1 (0) is loaded with X'FF' and then the CZ latches are tested for 10.
R1(O)
III
00
R1(O) == FF
10
AB3H2
CD002
6-170
Decode failure.
0009
A series of BB instructions is performed on R1 (0). One of the eight BB failed
to branch.
R1(O)
=FF
R1 (0)'" FF
10
AB3H2
CD002
6-660
Decode failure.
OOOA
BB instruction altered the CZ latches.
R1(0) - FF
R1(O) = FF
10
AB3G2
CZxxx
6-660
CZ latch failure.
OOOB
R1( 1) is loaded with all zeros and the CZ latches are tested for 01.
R1(1) == FF
R1(1) '" 00
01
AB3G2
CZxxx
6-170
CZ latch failure.
OOOC
A series of BB instructions is performed on R1 (1). One of the eight BB branched
on a zero or previous' LRI failed.
R1(1)
=00
R1(1) == 00
01
AB3H2
CD002
6-660
6-170
Decode failure.
0000
BB instruction altered the CZ latches.
R1(1) ==00
R1(1) =00
01
AB3G2
CZxxx
6-660
CZ latch failure.
XXXX
XRI instruction test.
0001
XRI or Z latch failed.
R1(1) = OC
R1(1) = 00
01
AB3H2
AB3J2
AB3G2
CDxxx
CA003
CZxxx
6-170
0002
XRI or C latch failed when R1 (1) is XOR with all ones.
R1(1) = 00
R1(1) = FF
10
AB3J2
AB3H2
AB3G2
CA003
CDxxx
CZxxx
6-170
ALU control failure.
Decode failure.
CZ latch failure.
0003
XRI above failed to produce the correct data. Testing is with BB instructions.
See Note 2.
6-170
6-660
See Note 2 for !>it failures.
0004
XRI failed to set Z latch.
0005
XRI above failed to produce correct data. Testing is with BB instructions.
0006
XRI or C Latch failed.
0007
XRI above failed to produce correct data. Testing is with BB instructions.
R1(1)=FF
R1(1) = FF
R1(O) = FF
~
\"-.
/
i
I~
~,
"
'--
''\
j
1'""1
'.,
/
,
"'-
j
/"'\
,"-_ ..../
r~
'-, /
~
\....../
/
(-'~1
\ j
r~'
,-,j
(
",-,/
R1(1)=00
01
See Note 2.
6-170
See Note 2 for bit failures.
R1(1)=00
01
See Note 2.
6-170
See Note 2 for bit failures.
R1(O) = FF
10
See Note 2.
6-170
See Note 2 for bit failures.
R1(0)=FF
10
See Note 2.
6-170
See Note 2 for bit failures.
r"~
.
/
,~
'~-j
0
(',\
("",
)
,""j
'--../
'.
/
~ j
(~
\..
("''t,\
~./
INIT 106
Comments
N/A
r'"
,,-"1
Suspected Card
Location(s)
Branch with a displacement of 2 failed to branch around error stop.
0004
/
CZ
Latch
0001
0003
120N
Expected and Actual
Results in PROG
LEV 'N' Req.
Branch instruction test.
I
110N
PROG LEV 'N'
Pr'ior to Test
Inst. Execution
XXXX
i
I
Z3705AEA INIT Symptom Index
(
"
f~
F~\
',-
\....Y
(''''
,j
(
(
(
(
(
(
(
(
(
«
«
(
(:
3705-80 INIT SYMPTOM INDEX - C~nt.
Routine
120N
130N
Error
Code
R1(1)=00
R1(1) = 00
01
See Note 2.
6-170
See Note 2.
R1(1) = 00
01
See Note 2.
6-170
See Note 2.
CZ
latch
Suspected Card
location(s)
Results
FEAlD
Page
FE'RtW
Page
Comments
XRI failed to set Z latch.
0009
Above XRI failed to produce correct data.
XXXX
ARI Instruction Test.
0001
ARI decode or CZ failure.
R1(1) = OE
R1(1)=00
10
AB3G2
AB3J2
CZ002
CA002
6-170
Decode failure.
AlU CTl failure.
0002
ARI or CZ latch failure adding zeros.
R1(0) = FF
R1(O) = FF
00
AB3G2
AB3J2
CZxxx
CA002
6-170
CZ latch failure.
0003
Above ARI modified high byte. Testing by XRI.
R1(0) = FF
R1(0)=00
01
See Note 2.
6-170
See Note 2 for bit failures.
0004
ARI or C latch failure adding zeros.
R1(1)=00
R1(1)=00
01
See Note 2.
6-170
0005
Above ARI modified low byte. Testing by XRI.
R1(1)=00
01
See Note 2.
6-176
0006
CZ latch failure adding all ones.
R1(1)=00
R1(1)=FF
00
See Note 2.
6-170
-
R1(1)=00
01
See Note 2.
6-170
R1(1) = FF
R1(1) = FE
10
See Note 2.
6-170
-
R1(1)=00
01
See Note 2.
6-170
0008
0009
i
ARI above, failed to produce correct result. Testing is with XRI instructions.
I ARI CZ latch failure adding all ones to all ones.
Above ARI failed to produce correct result. Testing is with XRI instructions.
xxx X
Data flow path:
0001
XRI or CZ latch failure.
0002
0003
0004
0005
,
Expected and Actual
Results in PROG
lEV 'N' Req.
0008
0007
150N
Function Tested ... Enor Description
PROG lEV 'N'
Prior to Test
I nst. Execution
-
I
I
XRI, BB, BCl and BZl instructions are
used to verify bit sensitivity.
byte 1, Zeros Pattern Sensitivity.
R1(1) =00
R1(1)=01
-
R1(1)=01
XRI failed to set Z latch.
R1(1)=01
R1(1)=00
XRI or CZ latch failure.
R1(1) = 00
R1 (1) = 02
-
Above XRI failed to produce correct result. Testing is with BB instructions.
I Above XRI failed to produce correct re"sult. Testing is with BB instructions.
10
10
i
See Note 2.
6-170
See Note 2.
6-170
6-660
See Note 2.
6-170
10
See Note 2.
6·170
R1(1) = 02
10
See Note 2.
6-170
6-660
See Note 2.
6-170
. See Note 2.
6-170
See Note 2.
6-170
01
0006
XRI failed to set Z latch.
R1(1) = 02
R1(1)=00
01
0007
XRI or CZ latch failure.
R1(1) = 00
R1(1)=04
10
;
,
-
R1(1) =04
10
XRI failed to set Z latch.
R1(1)=04
R1(1) = 00
01
See Note 2.
6-170
OOOA
XRI or CZ latch failure.
R1(1)=00
R1(1) = 08
10
See Note 2.
6-170
OOOB
Above XRI failed to produce correct results. Testing is with BB instructions.
-
R1(1) = 08
10
See Note 2.
6-170
OOOC
XRI failed to zet Z latch.
R1(1)=08
R1(1) = 00
01
See Note 2.
6-170
0000
XRI or CZ latch failure.
R1(1) = 00
R1(1)=10
10
See Note 2.
6-170
OOOE
Above XRI failed to produce correct result. Testing is with BB instructions.
-
R1(1)=10
10
See Note 2.
6-170
OOOF
XRI failed to set Z latch.
R1(1)=10
R1(1)=00
01
See Note 2.
6-170
0010
XRI or CZ latch failure.
R1(1) =00
R1 (1) = 20
10
See Note 2.
6-170
0011
Above XRI failed to produce correct result. Testing is with BB instructions.
-
R1(1) = 20
10
See Note 2.
6-170
0012
XRI failed to set Z latch.
R1(1) = 20
R1(1) =00
01
See Note 2.
6-170
0013
XRI or CZ latch failure.
R1(1) =00
R1(1) = 40
10
See Not\!l2.
6-170
0008
Above XRI failed to produce correct result. Testing is with BB instructions.
0009
Any failure in this routine, see Note 2.
Z3705AEA INIT Symptom Index
IN IT 108
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
150N
160N
Enor
See Note 2.
6-170
XRI failed to set Z latch.
R1(1)=40
R1(1)=00
01
See Note 2.
6-170
0016
XRI or ez latch failure.
R1(1) = 00
R1(1) = 80
10
See Note 2.
6-170
0017
Above XRI failed to produce correct result. Testing is with BB instructions.
-
R1(1) = 80
10
See Note 2.
6-170
0018
XRI failed to set Z latch.
R1(1)=80
R1(1)=00
01
See Note 2.
6-170
0019
XRI or ez latch failure.
-
R1(1)=00
R1(1) = AA
10
See Note 2.
6-170
-
R1(1) = AA
10
See Note 2.
6-170
R1(1) =00
01
See Note 2.
6-170
0015
Above XRI failed to produce
instructions.
001B
XRI failed to set Z latch.
XXXX
Data flow path: byte 1, Ones Pattern Sensitivity.
I
I
R1(1) = AA
XRI or ez latch failure.
XRI failed to SElt Z latch.
. XRI or ez latch failure.
R1(1)=00
R1(1)=FE
10
See Note 2.
6-170
-
R1(1)=FE
10
See Note 2.
6-170
R1(1) = FE
R1 (1) = 00
01
See Note 2.
6-170
R1(1)=00
R1(1) = FD
10
See Note 2.
6-170
-
R1(1)=FD
10
See Note 2.
6-170
XRI failed to zet Z latch.
R1(1) = FD
R1(1)=00
01
See Note 2.
6-170
0007
XRI or ez latch failure.
R1(1)=00
R1(1)=FB
10
See Note 2.
6-170
0008
Above XRI failed to produce correct result. Testing is with BB instructions.
-
R1(1)=FB
10
See Note 2.
6-170
0009
XRI failed to set Z latch.
R1(1) = FB
R1 (1) = 00
01
See Note 2.
6-170
XRI or ez latch failure.
R1(1) = 00
R1(1)=F7
10
See Note 2.
6-170
-
R1(1)=F7
10
See Note 2.
6-170
R1(1) = F7
R1(1)=00
01
See Note 2.
6-170
OOOB
I
OOOC
I
Above XRI failed to produce correct result. Testing is with BB instructions.
XRI failed to set Z latch.
byte 0, Ones pattern sensitivity.
XXX X
Data flow path:
0001
XRI or ez latch failure.
0005
0006
0007
0008
0009
OOOA
OOOB
~
\..)
R1(O) =EF
10
See Note 2.
6-170
-
R1(O) = EF
10
See Note 2.
6-170
XRI failed to set Z latch.
R1(O) = EF
R1(0) = 00
01
See Note 2.
6-170
XRI or ez latch failure.
R1(O) = 00
R1(O) = DF
10
See Note 2.
6-170
-
R1 (0)'; DF
10
See Note 2.
6-170
XRI failed to set Z latch.
R1(0) = DF
R1 (0) = 00
01
See Note 2.
6-170
XRI or ez latch failure.
R1(O) = 00
R1(O) = BF
10
See Note 2.
6-170
-
R1 (0) = BF
10
See Note 2.
6-170
XRI failed to set Z latch.
R1(O) = BF
R1(0) = 00
01
See Note 2.
6-170
XRI or ez latch failure.
R1(O) = 00
R1 (0) = 7F
10
See Note 2.
6-170
-
R1(0) = 7F
10
See Note 2.
6"170
Above XRI failed to produce correct result. Testing is with BB instructions.
Above XRI failed to produce correct result. Testing is with BBinstructions.
Above XRI failed to produce correct result. Testing is with BB instructions.
Above XRI failed to produce correct result. Testing is with BB instructions.
0'-.;/
!~~
'"_/
c-~
0
'"
./
'-.
Any failure in this routine, see Note 2.
XRI, BB, Bel and BZl instructions are
used to verify bit sensitivity.
R1(O) = 00
(1)
'--.j
Comments
XRI, BB, Bel and BZl instructions are
used to verify bit sensitivity.
0006
0004
'-.
i
Above XRI failed to produce correct result. Testing is with BB instructions.
0003
......_./
result. Testing is with Band BB
0005
0002
!
!
Above XRI failed to produce correct result. Testing is with BB instructions.
OOOA
/~'"
corre~t
001A
0004
I
FETMM
Page
FEAlD
Page
10
0003
'\
Suspected Card
location(s)
R1(1) = 40
Above XRI failed to produce correct result. Testing is with BB instructions.
0002
,
CZ
latch
Results
-
0014
0001
180N
Expected and Actual
Results in PROG
lEV 'N' Req.
PROG lEV 'N'
Prior to Test
I nst. Execution
Function T........ Enor Description
Code
INIT 110
Z3705AE~iNIT Symptom Index
/
0
'''-..../
(~
f'.~
'\..j
r'"
,
'"
I
./
r~
',,- . /
.
r·' .
.
~ ../
(.~
\....... j
0
" .../
\ '
.
0
''-.../
r~
!'~
\..... j
'..... . /
.'1
\~
./
.
()
rl.,
,3
rr~,
"'-~
Any failure in this routine, see Note 2.
[1\
0
t
'--./
"'-./
"....... jJ
C'
Y
./
(
(
(
{/
(
(
(
(
(
c-
(
(
(
(
(
(
(
(
f
f
(
( (
3705-80 INIT SYMPTOM INDEX - Cont.
......
'
E.rror
Cede
Function Tested and Error Description
180N
OOOC
XRI failed to set Z latch.
190N
XXXX
Data flow path:
I
i
I
R1(O) = 7F
Expected and Actual
Results in PROG
L,EV 'N' Req ..
R1(0) =00
CZ
Latch
Results
01
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Comments
6-170
See Note 2.
XRI, BB, BCl and BZL instructions are
used to verify bit sensitivity.
Byte 0, Zeros Pattern Sensitivity.
I
!
PROG LEV 'N'
Pri,or to Test
I nit. EDCIII1ion
R1(0) = 00
R1 (0) = 01
10
-
R1(0)=01
10
See Note 2.
6-170
XRI failed to set Z latch.
R1(O) = 01
R1 (0) = 00
01
See Note 2.
6-170
0004
XRI or CZ latch failure.
R1(O) = 00
R1 (0) = 02
10
See Note 2.
6-170
0005
Above XRI failed to produce correct result. Testing is with BB instructions,
-
R1(0) =02
10
See Note 2.
6-170
0006
XRI failed to set Z latch.
R1(O) = 02
R1(0) = 00
01
See Note 2.
6-170
0007
XRI or CZ latch failure.
R1(O) = 00
R1(0) = 04
10
See Note 2.
6-170
0008
Above XRI failed to produce correct result. Testing is with BB instructions.
-
R1(O) = 04
10
See Note 2.
6-170
0009
XRI failed to set Z latch.
R1(0) = 04
R1 (0) = 00
01
See Note 2.
6-170
OOOA
XRI or CZ latch failure.
R1(0) = 00
R1 (0) = 08
10
See Note 2.
6-170
OOOB
Above XRI failed to produce correct result. Testing is with BB instructions.
-
R1(0)=08
10
See Note 2.
6-170
OOOC
XRI failed to set Z latch.
R1(0) = 08
R1(O) = 00
01
See Note 2.
6-170
OOOD
XRI or CZ latch failure.
R1(O) = 00
R1(0) = 55
10
See Note 2.
6-170
OOOE
Above XRI failed to produce correct result. Testing is with BB instructions.
-
R1 (0) = 55
10
See Note 2.
6-170
OOOF
XRI failed to set Z latch.
R1(O) = 55
R1(0) = 00
01
See Note 2.
6-170
XXXX
ORI instruction test.
0001
ORI decode failure. Low byte containing 09 was ORI with 05. Result tested by XRI.
R1(1)=09
R1(1)=00
01
AB3H2
AB3J2
CD002
CA003
6-170
Decode failure.
AlU control failure.
0002
ORI or CZ latch failure.
R1(1)=00
R1(1)=FF
10
AB3G2
CZxxx
6-170
CZ latch failure.
0003
Above ORI failed to produce correct result. Testing is with XRI instructions.
R1(1)=FF
R1(1)=00
01
See Note 2.
6-170
See Note 2 for bit failures in this routine.
0004
ORI or CZ latch failure.
Rl(1) == 00
R1(1) = 00
01
See Note 2.
6-170
0005
Above ORI failed to produce correct result. Testing is with XRI instructions.
R1 (1) = 00
R1(1)=00
01
See Note 2.
6-170
0006
ORI or CZ latch failure.
R1(O) = FF
R1 (0) = FF
10
See Note 2.
6-170
0007
Above ORI failed to produce correct result. Testing is with XRI instructions.
R1(0) = FF
R1 (0) = 00
01
See Note 2.
6"170
0008
ORI or CZ latch failure FF was ORI with FF.
R1(O)=OO
R1(0) = FF
10
See Note 2.
6-170
0009
OR I above failed to produce. correct result. Testing is with XRI instructions.
R1(O) = FF
R1(0) =00
01
See Note 2.
6-170
XXXX
NRlinstruction test.
0001
NRI decode failure. 09 was NRI with 05. Result was tested with XRI instruction.
R1(1)=09
R1(1) = 05
R1(1)=01
01
AB3H2
AB3J2
CD002
CA002
6-170
R1(1)=00
Decode failure.
AlU control fairure.
CZxxx
6-170
CZ latch failure.
0001
XRI or CZ latch failure.
0002
Above XRI failed to produce correct result. Testing is with BB instructions.
0003
\
1BON
!
1CON
0002
NRI or CZ latch failure. 00 was NRI with 00.
R1(1)=00
Rl(1)=00
01
AB3G2
0003
Above NRI failed to produce correct result. Tested by XRI instruction.
R1(1)=00
R1(1)=OD
01
See Note 2.
6-170
0004
NRI or CZ latch failure. FF was NRI withFF.
R1(O) =FF
R1 (0)= FF
10
See Note 2.
6-170
73705AEA IN IT Symptom Index
INIT 112
3705-80 lNIT SYMPTOM INDEX - Cont.
Z370SAEA ,iNIT Symptom Index
FunctiC.n Tested and Error ~
Prior to Test
III\I!Slt.
1CON
1DON
I
1EON
!
EXJ*1;ed'and Actual
Results in PROG
LEV "N' R.eq..
PROG LEV "N'
.'
Exec:III'tion
'"
CZ
Latch
R8$ults
.......
,'.
'
Suspected card
.L()Cation(s)
FETMM
FEALO
Page
Comments
Page ,
0005
Above NRI failed to produce correct result. Tested by XRI instruction.
R1(O) = FF
Rl(O) =00
01
See Note 2.
6·110
0006
NRI or C21atch failure; FF was NRI with 00.
R1(l) = FF
R1(l) = 00
01
See Note 2.
6·110
0007
N RI above failed. to produce correct result.
R1(l) =00
Rl(l)=OO
01
See Note 2.
6·110
0008
NRI or CZ latch failure. FF was NRI with 00.
Rl(O)
=00
Rl(O)=OO
01
See Note 2.
6·110
0009
Above NRI fCliled to produce correct result. Tested by XRI instruction.
R1(O) =00
R1(O) = 00
01
See Note 2.
6·110
XXXX
TRM instruction test.
0001
TRM dec~de failure. Tested by XRI. TRM mask was 05.
Rl(l)= 00
01
AS3H2
AB3J2
CDxxx
CA002
6·110
R1(1) =09
Decode failure.
ALU control failure.
R1(1) = FF
10
AB3K2
AB3G2
CL003
CZxxx
6·170
LS control failure.
CZ latch failure.
R1(l) = 00
01
See Note 2.
6·110
See Note 2 for bit failure.
Rf(O)
= FF
01
See Note 2.
6·110
0002
TRM or CZ latch failure. TRM Mask was FF.
Rl(lj = FF
0003
Above TRM modified Rl low. Tested by XRI instruction.
R1(l)
0004
TRM or CZ latch failure. TRM Mask was 00.
= FF
RHO) = FF
0005
Above TRM modified Rl high. Tested by XRI instruction.
Rl(O) = FF
Rl(O)=OO
01
See Note 2.
6·110
0006
TRM or CZ latch failure. TRM Mask was FF.
R1(l) =00
R1(1)=00
01
See Note 2.
6·170
0007
Above TRM modified Rl low.
R1(l)=OO
R1(l)=OO
01
See Note 2.
6·110
XXXX
SRI instruction test.
0001
SRI Decode failure. SRI 05 from 09. Result tested by XRI instruction.
AB3H2
CD002
6·110
Decode failure.
CA003
CZxxx
6·110
ALU control failure.
CZ latch failure
R1(l) = 09
R1(1)=05
R1(l)=04
Rl (1 )'=00
01
AB3J2
AB3G2
0002
SRI or CZ latch failure. SRI 00 from FF.
R1(O) = FF
Rl(O) = FF
00
See Note 2.
6.110
0003
SRI above failed to produce correct result. Tested by XRI instruction.
R1(O) = FF
Rl(O) = 00
01
See Note 2.
6·110
0004
SRI or CZ latch failure. SRI Mask was 00.
R1(O) = 00
RHO) =00
01
See Note 2.
6·110
0005
Above SRI failed to produce correct result. Tested by XRI instruction.
Rl(O) = 00
Rl(O) = 00
01
See Note 2.
6·110
0006
SRI or CZ latch failure;
Rl(1) = FF
R1(1)= 00
01
See Note 2.
6·110
0007
Above SRI failed to produce correct result. Tested by XRI instruction.
R1(l)=OO
R1(l) = 00
01
See Note 2.
6·110
SRI or CZ latch failure. SRI Mask was t=F.
Rl(l)
= 00
Rl = FFOl
10
See Note 2.
6·110
0009
Above SRI failed to produce correct result. Tested by XRI instruction.
Rl =FFOl
Rl = 0000
01
See Note 2.
6·110
XXXX
CR I instruction test .. '
0001
CRI decode failure. CRIMask was 05. Tested by XRI instruction.
Rl(l) = 09
Rl (1)= 09
Rt(l)
= 00
01
AB3H2
AB3J2
AB3K2
CD002
CA003
CL003
6·110
Decode failure.
ALU control failure.
LS control failure.
0002
CRI or CZlatch faHure. CRI Mask was FF.
Rl(l)=FF
R1(l) = FF
01
AB3G2
CZxxx
6·110
CZ latch failure.
0003
Above CRI modified R110w. Tested by XRI instruction.
Rl(l)= FF
Rl(l)=OO
01
See Note 2.
0004
CRI or CZ latch failure. CRI Mask wasFF.
R1(l) =00
Rl(l)=OO
, 0008
INIT 114
'.
1FON
0005
0006."
",,,."
0007
A~oveC·Rlm.0d.ified Rllow. TestedbY XR'I instruction.
Rl(l)
, CR 19r C.Z latc.hfailure. CRI !VI.Clsk )/Vas FE~
Above CRI modified"Rlhigh. Tested ~v)(FninstruQ,tioi1.
.:
10
-<;
6·110
6·110
See Note 2.
\'"
"
;
, 6. .11 0
00
R1(l) =00
01
R1(1) = FF
R1(O) = FF
. 00
See Note 2.
. 6·110
Al(O)';" FF
·~R~.(9)=00
01
See Note 2.
, 6~110
;i;
: :,.: .'
d:
I· .•......
See N()te 2.
1
":
('
!
'..
/
./
.
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
3705-80 INIT SYMPTOM INDEX - Cont.
RoutiIIe
Em.r
CeaIIe
200N
XXXX
LCR instruction test.
0001
LCR decode failure. Tested by XRI instruction.
0002
0003
Function TIS'IIIIII and Error Description
Above LCR modified R3 low. Tested by XRI instruction.
LCR or CZ latch failure.
PROG LEV 'N'
Prior to Test
Inst. Execution
Expected and Actual
Results in PROG
LEV 'N' Req.
CZ
Latch
Results
R1(1)=09
R1(1) = 05
R3(1) = 05
R1(1)=00
01
R3(1)=05
R3(1) = FF
R3(1) = 00
01
R3(0) = XX
R3(1) = 01
R3(0) = 01
00
0004
LCR above failed to produce correct result. Tested by XRI instruction.
R3(0) = 01
R3(0) = 00
01
0005
LCR or CZ latch failure.
R3(1) = 02
R3(0) = 00
R3(0) = 02
00
0006
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(0) = 02
R3(0) = 00
01
0007
LCR or CZ latch failure.
R3(1) = 04
R3(0) = 00
R3(0) = 04
00
0008
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(O) = 04
R3(0) = 00
01
0009
LCRor CZ latch failure.
R3(1) = 08
R3(0) = 00
R3(0) = 08
00
OOOA
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(0) = 08
R3(0) = 00
01
0008
LCR or CZ latch failure.
R3(1) = 10
R3(0) = 00
R3(0) = 10
00
01
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
AB3H2
AB3J2
CD002
CAxxx
6·220
6·170
Decode failure.
ALU controls failure.
AB3G2
CZxxx
6·220
6·170
CZ latch failure.
See Note 2 for bit failures.
See Note 2.
6·220
See Note 2.
6·220
6·170
See Note 2.
6·220
See Note 2.
6·220
6·170
See Note 2.
6·220
See Note 2.
6·220
6·170
See Note 2.
6·220
See Note 2.
6·220
6·170
See Note 2.
6·220
See Note 2.
6·220
6·170
See Note 2.
6·220
See Note 2.
6·220
6·170
See. Note 2.
6·220
See Note 2.
6·220
6·170
I
OOOC
Above LCR failed to produce correct results. Tested by XRI instruction.
R3(O) = 10
R3(0) = 00
0000
LCR or CZ latch failure.
R3(1) = 20
R3(0) = 00
R3(0) = 20
,
00
OOOE
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(0) = 20
R3(0) = 00
01
OOOF
LCR or CZ latch failure.
R3(1) = 40
R3(0) = 00
R3(0) = 40
00
R3(0) =40
R3(0) = 00
01
0010
0011
Above LCR failed to produce correct result. Tested by XRI instruction.
LeR or CZ latch failure.
R3(1) = 80
R3(0) = 00
R3(O) = 80
00
0012
Above LCR failed,to produce correct result. Tested by XRI instruction.
R3(0) = 80
R3(0) = 00
01
0013
LCR orGZlatch failure.
R3(1)= 7F
R3(O) = 00
R3(0) = 7F
00
R3(0):;: 7F
R3(C: ,,00
01
See Note 2.
6·220
See Note 2.
6·220
6·170
See Note 2.
6·220
See Note 2.
6·220
6·170
.
0014
Above LCR failed to produce correct result. Tested by XRI instruction.
..
Comments
.
.
..
Z3705AEA INIT Symptom Index
INIT 116
3705-80 INIT SYMPTOM INDEX - Cont.
Rout....
Emili'
CollIe'
Z3705AEA INIT Symptom Index
FUIIIIdiom Tested and Error Dna:1I......
,
200N
0015
LCR or CZ latch failure.
PROG LEV 'N'
Prior to Test
I nst. Execution
Expected and Actual
Results in PROG
LEV 'N' Req.
R3(1)=BF
R3(0) = 00
R3(0) = BF
00
CZ
Latch
Results
0016
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(O) = BF
R3(O) = 00
01
0017
LCR or CZ latch failure.
R3(1) = OF
R3(O) = 00
R3(O) =OF
00
0018
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(O) =OF
R3(O) = 00
01
0019
LCR or CZ latch failure.
R3(1) == EF
R3(O) = 00
R3(O) = EF
00
001A
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(O) = EF
R3(O) = 00
01
001B
LCR or CZlatch failure.
R3(1) == F7
R3(O) = 00
R3(O) = F7
00
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(O) = F7
R3(O) = 00
LCR or CZ latch failure.
R3(1) =FB
R3(O) = 00
R3(O) = FB
00
001C
•
Suspected Card
Location(s)
01
FEALD
Page
See Note 2.
6-220
See Note 2.
6-220
6-170
See Note 2.
6-220
See Note 2.
6-220
6-170
See Note 2.
6-220
See Note 2.
6-220
6-170
See Note 2.
6-220
See Note 2.
6-220
6-170
See Note 2.
6-220
See Note 2.
6-220
6-170
See Note 2.
6-220
See Note 2.
6-220
6-170
See Note 2.
6-220
See Note 2.
6-220
6-170
See Note 2.
6-220
See Note 2.
6-220
6-170
See Note 2.
6-220
See Note 2.
6-220
6-170
See Note 2.
6-220
i
0010
,,
i
001E
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(O) = FB
R3(O) = 00
01
001F
LCR or CZ latch failure.
R3(1) = FO
R3(O) == 00
R3(O) = FO
00
I
i
I
,
0020
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(O):= FO
R3(O) = 00
01
0021
LCR or CZ latch failure.
R3(1)=FE
R3(O) = 00
R3(O) = FE
00
R3(O) = FE
R3(O) = 00
01
0022
Above LCR failed to,produce correct result. Tested by XRI instruction.
0023
LCR or CZ latch failure. 2 LCR instructions used. R3 high to R3 high sets
CZ = 00. R3 low to R3 high sets CZ = 11.
R3(1) = 00
R3(O) = FE
R3(O) = 00
11
0024
Above LCRs failed to produce correct result. Tested by XRI instruction.
R3(O) = 00
R3(O) = 00
01
0025
LCRor CZ latch failure.
R3(1)" FF
R3(O) = 00
R3(O) = FF
10
R3(O) = FF
R3(O) = 00,
01
R3(1) == AA
R3(O) =00
R3(O) = AA
10
R3(O) = AA
R3(0) = 00
01
R3(O)= 55
10
0026
0027
,
Above LCR failed to produce correct result. Tested by XRI instruction.
,
,
LCR or CZ latch failure.
0028
Above LCR fliiled to produce correct result. Tested by XRI instruction.
0029
LCR or CZ latch failure.
,
,
R3(1) ==55
, R3(O) = 00
,
FETMM
Page
See Note 2.
6-220
6-170
6-220
"
,
"
"I
"
(
(
.
/
'.
/
'.
/
.
/
,
/
"
/
.
Comments
"
"
See Note 2.
','
11\UT'118
"
--------~
(~
(
(
{
r:
---------
(
(
(
(
(,
(
(
---------
-
(/ ("
-----
t
(
-
~,
,
c
(
t.
---"-
(
(
(,
(
(
(
(
{~'
f
('/ (
(
(
(~~"
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
200N
E"...
Function Tested and Error Description
Cede
!
R3(0) = 00
Above LCR failed to produce correct result. Tested by XRI instruction.
R3(0) = 55
002B
LCR or CZ latch failure. Tested by XRI instruction.
R3(1) = FE
R1(1) = 00
lCR failure. Tested by XRI instruction.
002D
230N
Expected and Actual
Results in PROG
LEV 'N' Req.
002A
002C
220N
PROG LEV 'N'
Prior to Test
I nst. Execution
lCR failure. Tested by XRI instruction.
R3(0) = 00
R1(O) = FF
R3(0) = 00
R1(O) = FF
R1(1)=FE
R1(1) = 00
CZ
Latch
Results
01
Suspected Card
Location(s)
FEALD
Page
See Note 2.
6-220
6-170
See Note 2.
6-220
6-170
01
R1 (0) = 00
01
Comments
,
01
R1 (0) = 00
R1(O) = 00
FETMM
Page
See Note 2.
6-220
6-170
See Note 2.
6-220
6-170
XXXX
Branching test.
0001
BZl, pos. displacement - AlU failure.
11
AB3G2
CZxxx
6-640
CZ latch failure.
0002
B, neg. displacement-AlU failure.
11
AB3J2
CAxxx
6-640
AlU controls failure.
0003
BCl, neg. displacement - AlU failure.
11
See Note 2.
6-640
See Note 2 for bit failures.
0004
BZl, neg displacement.
11
See Note 2.
6-640
0005
BCl, BZl, B, BB failure.
11
See Note 2.
6-640
6-660
XXXX
ACR instruction test.
0001
ACR decode failure. Result OE is tested by XRI instruction.
0002
ACR or CZ latch failure.
R3(1) = 05
R1(1) = 09
R1(1)=OE
R1(1)=00
01
R3(1)=01
R1(O) = F7
R1(O) = F8
00
R1(0)=00
01
0003
Above ACR did not produce correct result. Tested by XRI instruction.
R1(O) = F8
0004
ACR or C latch failure. ACR R3 high with R3low, CZ = 00. ACR R1 low with
R3 high, CZ = 11.
R1(1)=81
R3 = 7F01
0005
R3 = 7F80
R3 = 0080
AB3H2
AB3J2
CDxxx
CAxxx
6-220
6-170
Decode failure.
AlU controls failure.
See Note 2 for bit failures.
AB3G2
CZxxx
6-220
CZ latch failure.
See Note 2.
6-220
6-170
See Note 2.
6-220
See Note 2.
6-220
11
Above ACR, Z latch failure.
Above ACR, failed to produce correct data in R3 low. Tested by XRI instruction.
R3(1) = 80
R3(1) = 00
01
See Note 2.
6-220
6-170
0007
Above ACR failed to produce correct data in R3 high. Tested by XRI instruction.
R3(0) = 00
R3(0) = 00
01
See Note 2.
6-220
6-170
0008
Above ACR modified contents of R1 (1). Tested by XRI instruction.
R1(1)=81
R1(1) =00
01
See Note 2.
6-220
6-170
0009
Above ACR modified contents of R1(O). Tested by XRI instruction.
R1(O) = FF
R1(0) = 00
01
See Note 2.
6-220
6-170
OOOA
ACR or CZ latch failure. ACR R1 high with R1 high.
R1(O) = FF
R1(0) = FE
10
See Note 2.
6-220
R1(0) = FE
R1(0) = 00
01
See Note 2.
6-220
6-170
0006
OOOB
I
Above ACR failed to produce correct result. Tested by XRI instruction.
Z3705AEA INIT Symptom Index
INIT 120
("
3705·80 INIT SYMPTOM INDEX· Cont.
......
230N
240N
Ener
CadIt
OOOC
Z3706AEA III,IIT Symptom Index
Function Tested and Error o.cription
ACR failed to produce correct result when ACR R1 low with R3 low. Tested
by XRI instruction.
XXXX
OCR instruction test.
0001
OCR decode failure. Tested by XRI instruction.
0002
PROG LEV 'N'
Prior to Test
I nst. Execution
Expected and Actual
Results in PROG
LEV 'N' Req.
R1(1) "'00
R3(1) - FF
R3(1) '" FF
R1(1)=00
R1 (1) = 00
R3(1) '" CC
R1(O) = 33
R1(O) = FF
10
R1(O) - FF
R1(0) ~ FF
01
0004
OCR or CZ latch failure.
R3(0) = 00
R1(1) = 00
R1(1)=00
01
R1(1) '" 00
R1(1)=00
R1(O) = FF
R1 (0) = FF
0006
OCR or CZ latch failure. Tested by CRI instruction.
AB3H2
AB3J2
CDxxx
CA003
6·220
6·170
Decode failure.
ALU controls failure.
See Note 2 for bit failures.
AB3G2
CZxxx
6·220
CZ latch failure.
See" Note 2.
6·220
6·170
See Note 2.
6·220
01
Sae Note 2.
6·220
6·170
01
See Note 2.
6·220
6·170
r
250N
XXXX
NCR instruction test.
0001
NCR decode failure. Tested by XRI instruction.
0002
260N
./
01
R3(0) = FF
R1(1)=FF
R1 (1) = FF
10
NCR above failed to produce correct result. Tested by CRI instruction.
R1(1)=FF
R1(1) = FF
01
0004
NCR or CZ latch failure.
R1(1)=FF
R1 (0) = 00
R1(0)=00
01
R1 (0) = 00
R1(0) =00
01
0005
Above NCR failed to produce correct result. Tested by CRI instruction.
XXXX
XCR instruction test.
0001
XCR instruction decode tested by XRI instruction.
R3(1) = 05
R1(1) = 09
XCR or CZ latch failure.
R1(1) =OC
R1 (1) = 00
01
R1(O) = FF
R1(1) = 00
R1(1)=FF
10
0003
Above XCR failed to produce correct result. Tested by CRI instruction.
R1(1)=FF
R1(1)"'FF
01
0004
XCR or CZ latch failure.
R1(1)=FF
R3(0) - FF
R3(0)" 00
01
R3(0) '" 00
R3(0) '" 00
01
0005
.' '\
NCR or CZ latch failure.
R1(1)=01
R1(1)=00
0003
0002
"-
R3(1) = 05
R1(1) = 09
0
'-.- j/
XCR above failed to produce correct result.
C)
.",--.",
",.j
r'
)
\.", ./
/"
',-.//
/~'\
"-
/'
i""-~
"
./
[~
.~.
I
~ ./
".j
.f'" .'"
I
'"
..•./
r~,
\ ./
(
'"
1''1
/
"
./
~-)
".
.
8
"'-
.
/~
'"
j
Comments
6·220
6·170
01
Above OCR failed to produce correct result. Tested by CRI instruction.
Above OCR failed to produce correct result. Tested by CR I instruction.
FETMM
Page
FEALD
p.
00
0003
0005
Suspected Card
Location(s)
See Note 2.
R3(1) = 05
R1(1)-00
OCR or CZ latch failure.
CZ
Latch
Resutts
AB3H2
AB3J2
CD002
CAxxx
6·220
6·170
Decode failure.
ALU controls failure.
See Note 2 for bit failures.
AB3G2
CZxxx
6·220
CZ latch failure.
See Note 2.
6·220
6·170
See Note 2.
6·220
See Note 2.
6·220
6·170
AB3H2
AB3J2
CD002
CA003
6·220
6·170
Decode failure.
ALU controls failure.
See Note 2 for bit failures.
AB3G2
CZxxx
6·220
CZ latch failure.
See Note 2.
6·220
6·170
See Note 2.
6·220
See Note 2.
6·220
/"-
"\
'"
/'
fl
\./
INIT 122
i4"~
0
~j
I
j
"'- . ./
..:)
(l1
~~
----
(
(
(
(
- - - - - - - ----
(-
--
(
------"-.~
(
(
«
(
(
(
(
(~'
f
(
(-
(
f
(
(
t
{
(
(--
(-
(--
(
--
(-' (
(
f
(~
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
270N
Emil
Code
XXXX
SCR instruction test.
0001
SCR decode failure. Tested by XRI instruction.
0002
:
280N
CZ
Latch
Results
R1(1) = 04
R1(1)=00
01
=01
10
R1(O) = FF
R3(D) = 00
R3(0)
Above SCR failed to produce correct result. Tested by XRI instruction.
R3(0) = 01
R3(0) = 00
0004
SCR or CZ latch failure.
R1(O) = FF
R3(0) = FF
R3(0) = 00
01
R3(0) = 00
FEALD
Page
FETMM
Page
AB3H2
AB3J2
CD002
CA003
6·220
6·170
Decode failure.
ALU controls failure.
AB3G2
CZxxx
6·220
CZ latch failure.
Comments
6·220
6·170
See Note 2.
6·220
01
See Note 2.
6·220
6·170
= 09
= 00
01
AB3H2
AB3J2
CD002
CA003
6·220
6·170
Decode failure.
ALU controls failure.
R3(1) = FF
R3(0) = 00
AB3G2
CZxxx
6·220
CZ latch failure.
R3(0) = 00
10
Above SCR failed to produce correct result. Tested by XRI instruction.
R3(0) = 00
XXXX
CCR instruction test.
R3(1) = 05
0001
CCR decode failure. Tested by XRI instruction.
R1(1)
CCR or CZ latch failure.
Suspected Card
Location(s)
See Note 2.
0005
= 09
R1 (1)
R1(1)
0003
Above CCR modified R3 high. Tested by XRI instruction.
R3(0) = 00
R3(0) = 00
01
0004
CCR or CZ latch failure.
R1(0) = FF
R3(1) = FF
R3(1)
= FF
01
R3(1)=00
= FF
See Note 2.
6·220
6·170
See Note 2.
6·220
01
See Note 2.
6·220
6·170
0005
Above CCR modified R3 low. Tested by XRI instruction.
R3(1)
0006
CCR or C latch failure.
R1(O) = 01
R3(0) = 02
10
See NotA 2.
6·220
6·170
0007
CCR or Z latch failure.
R1(O) = 01
R3(0) = 02
10
See Note 2.
6·220
6·170
XXXX
LCOR instruction test.
0001
LCOR decode failure. Tested by XRI instruction.
R3(1) = 05
R1 (1) 09
=
AB3H2
AB3J2
R1 (1) = 02
R1(1) = 00
01
CD002
CAxxx
6·220
6·170
LCOR or CZ latch failure. LCOR R3 high into R3 high.
R3(0) = FF
R3(0)
=7F
10
See Note 2.
6·220
0003
Above LCOR failed to produce correct result. Tested by XRI instruction.
R3(0) = 7F
R3(0) = 00
01
See Note 2.
6·220
6·170
0004
LCOR or CZ latch failure. LCOR R1 low into R1 low.
R1(1) = 00
R1(1) = 00
01
See Note 2.
6·220
0005
Above LCOR failed to produce correct result. Tested by CRI instruction.
R1(1)=00
R1(1)=00
01
See Note 2.
6·220
XXXX
LHR instruction test.
0001
LHR decode failure. Tested by XRI instruction.
R1(1)=05
R1(1)=00
01
AB3H2
AB3J2
0002
2AON
SCR or CZ latch failure.
R3(1) = 06
R1(1) = 09
Expected and Actual
Results in PROG
LEV 'N' Req.
0003
0002
290N
F-.:tion Tested and Error Description
PROG LEV 'N'
Prior to Test
Inst. Execution
R3(1)=05
R1(1) = 09
CD003
CA001
6·220
6·170
Decode failure.
ALU controls failure.
Decode failure.
ALU controls failure.
Z3705AEA INIT Symptom Index
INIT 124
(
Z3705AEA INIT Symptom Index
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
E.rror
Code
2BON
XXXX
SH R instruction test.
0001
SHR decode failure. Tested by XRI instruction.
0002
2EON
.
I
"
.J
'~
". f
Expected and Actual
Results in PROG
LEV 'N' Req.
CZ
Latch
Results
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
AB3H2
AB3H2
CDOO3
CAOO3
6-220
6-170
Decode failure.
ALU controls failure.
CZxxx
6-220
CZ latch.
R1(1)=04
R1(1) =00
01
R1 = 0100
R3= 0000
R3= FFOO
10
AB3G2
0003
Above SHR failed to produce correct result_ Tested by XRI instruction.
R3(0) = FF
R3(0) = 00
01
See Note 2.
6-220
6-170
0004
Above SHR failed to produce·correct result. Tested by XRI instruction;
R3(1) = 00
R3(1) = 00
01
See Note 2.
6-220
6-170
0005
SHR or CZ latch failure.
R3 = FFOO
R1 = FFOO
01
See Note 2.
6-220
R1 = 0000
R1 = 01FF
R3 = FFOO
See Note 2.
6-220
R3 = FD01
00
SHR or CZ latch failure.
0007
SHR above failed to produce correct result. Tested by XRI instruction.
R3(0) = FD
R3(0) = 00
01
See Note 2.
6-220
6-170
0008
SHR above failed to produce correct result. Tested by XRI instruction.
R3(1) = 01
R3(1) = 00
01
See Note 2.
6·220
6-170
XXXX
CH R instruction test.
0001
CHR decode failure. Tested'by XRI instruction.
XXXX
I'
i
I
2FON
R3(1) = 05
R1(1) = 09
SHR or CZ latch failure.
0006
2CON
PROG LEV 'N'
Prior to Test
Inst. ExecutiOn
Function Tested and Error Description
R3(1) = 05
R1(1) = 09
CD003
CAxxx
AB3H2
AB3J2
R1(1)=09
R1(1)=00
Comments
Decode failure.
ALU control failure.
6·220
6-170
01
Byte 0 and 1 data flow pattern sensitivity test. This routine loops 256 times.
The first test pattern is FFOO and each successive pass adds one to byte 1 and
subtracts one from byte 0 so that the last test pattern is OOFF.·
See Note 2 for bit failures.
i
0001
LHR instruction is used to move R3 data into R1. The CZ latches are tested for 10.
R3= NOTO
R1 = R3
10
See Note 2.
6-220
0002
LHR data transfer is tested by XORing data in R1 and R3 byte O. Byte 0 data
failed to transfer.
R1 = R3
R3(0) = 00
01
See Note 2.
6-220
R3(0) = Bits that failed.
0003
LHR data transfer is tested by XORing data in R1 and R3 byte 1. Byte 1 data
failed to transfer.
R1(1) = R3(1)
R3(1) = 00 ,
01
See Note 2.
6-220
R3(1) = Bits that failed.
0004
CHR instruction is tested by comparing R1 and R3.
R1 = R3
R1 = R3
R3 = Test Pattern
01
See Note 2.
6-220
XXXX
Byte 0 and 1 data flow pattern sensitivity test: 2 of 2.
0001
LHR instruction is used to move R1 data into R3. The CZ latches are tested for 01.
01
See Note 2.
6-220
R1 = 0000
R3 = FFFF
R3 = 0000
0002
CHR instruction is used to test data transfer.
R1 = 0000
R3 = 0000
R1 = 0000
R3 = 0000
01
See Note 2.
6-220
0003
CHR instruction is tested for correct CZ latches when data is unequal.
R1 = 0000
R5 =.FFFF
R1 = 0000
10
See Note 2.
6·220
0
"-
0
)
,-.. j!
(' "'1
0
\..../
\
\.,
;/
'...,/
r~
\, j
~
~
(~
\.
INIT 126'
r"
\ ____ / 1
0
\. /
("""
~~
\'-.,--~./
\.,
.J
;f~
\",j
.:J
',-
~
1''1
\..,j
\" .../
!
'J
'"
",-j
\
,f'"",
I,
'..,j
I
~~
...
~/
~:
_/
Note 1
n
',,/
,rl)
('"
<.J .
0
'.....,/'
\......Y
f
"
",y'
(~!
(
(.
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(. c
(
(
(
3705-80 INIT SYMPTOM INDEX - Cont.
RIuIIiM·
2FON
310N
E.rror
Code
I
I
i
i
330N
CZ
Latch
R-..tts
Suspected Card
Location (s)
FEALD
Page
FETMM
Page
Comments
The data in R3(1) is tested to verify error codes 0001 and 0002 above.
R3 = 0000
R3(1) = 00
01
See Note 2.
6·220
R3(1) = Bits in error.
0005
The data in R3(0) is tested to verify codes 0001 and 0002 above.
R3 = 0000
R3(0) = 00
01
See Note 2.
6·220
R3(0) = Bits in error.
XXXX
AH R instruction test.
AH R R1, R3. A basic AH R instruction is executed and the results are tested
by XORING.
R1(l) = 09
R3(1) = O~
Rl(l) =OE
Rl(l) = 00
01
AB3H2
AB3J2
CDxx
CAxxx
6·220
6·220
Rl (1) = Bits in error.
Decode.
ALU controls.
0002
R1 is added to R1. The CZ I atches are tested for 01.
Rl = 0000
Rl = 0000
01
AB3G2
CZxxx
6·220
CZ latches.
0003
AHR should have caused an overflow. The Z latch is tested.
R3 = FFOO
R5 = 0100
R3 = 0000
11
See Note 2.
6-22Q
Note 1.
0004
Same instruction as 0003. The C latch is tested.
R3 = 0000
11
See Note 2.
6-220
0005
CH R is used to verify the data in R3.
Rl = 0000
R3 = 0.000
Rl = 0000
R3 = 0000
01
See Note 2.
6·220
0006
AH R instruction is tested for CZ latches 00.
R3 = 0001
Rl = FFFE
See Note 2.
6·220
Rl
= FFFF
00
0007
The data in Rl is verified by using XRI. Byte 1 failed.
Rl = FFFF
R1(l) = 00
01
See Note 2.
6-220
6·170
Rl (1) = Bits in error.
0008
Same as 0007 except Byte 0 failed.
Rl = FFOO
Rl(O) = 00
01
See Note 2.
6·:l20
6-170
R1(0) = Bits in error.
XXXX
OH R instruction test.
0001
OHR Rl, R3. Rl data is tested by XRI. Instruction failed.
R1(l) = 09
R3(1) = 05
R1(l) = 00
Rl(l)=OO
01
AB3H2
AB3J2
CD003
CA003
6·220
6·170
Decode failure.
ALU controls failure.
See Note 2 for bit failures.
CZxxx
6·220
Note 1 CZ latches.
0002
OHR R5, R5. CZ latches are tested for 10.
R5 = 55AA
R5 = 55AA
10
AB3G2
0003
The data in R5 is verified by comparing R5 with Rl using CHR instruction.
Rl = 55AA
R3 = 55AA
same
same
01
See Note 2.
6·220
0004
OHR R5, R3. CZ latches are tested for 10.
R3 = AA55
R5 = 55AA
See Note 2.
10
6·220
6·170
Note 1.
R5 = FFFF
= FFFF
01
See Note 2.
6·220
6·170
Note 1.
01
See Note 2.
6·220
6·170
Note 1.
I
I
Expected and Actual
Results in PROG
LEV 'N' Req.
0004
001
320N
Function Tested and Error Desc:riplJioIII
PROG LEV 'N'
Prior to Test
Inst. Exeartion
= FFFF
0005
The data in R5 is verified by comparing using CRI. Byte 0 data failed.
R5
0006
Same as 0005 above except byte 1 data failed.
R5 = FFFF
R5 = FFFF
0007
OH R R 1, R1. CZ latches are tested fpr 01.
Rl = 0000
Rl
= 0000
01
See Note 2.
6·220
0008
Using CRI, the data in Rl is verified. Byte 0 data failed.
Rl = 0000
Rl = 0000
01
See Note 2.
6·220
0009
Using CRI, the data in Rl is verified. Byte 1 data failed.
Rl = 0000
Rl = 0000
01
See Note 2.
6·220
XXXX
NHR instruction test.
0001
NHR Rl, R3. Rl data is tested by XRI. Instruction failed.
0002
NHR Rl, R5. CZ latches are tested for 10.
Rl (1) = 09
R3(1) = 05
R1(l)=Ol
Rl = AA55
R5 = FFFF
R5
R1(l) = 00
01
= AA55
10
Rl
AB3H2
AB3J2
CD003
CA002
6·220
6·170
Decode failure.
ALU controls failure.
AB3G2
CZxxx
6·220
CZ latches.
Z3705AEA INIT Symptom Index
INIT 128
Z3705AEAINITSymptom Indllx
3705·80 INIT SYMPTOM INDEX· Cont.
PROG LEV"N'
. Prior to Test
lost. Execution
Exptcted and Actual
Results in PROG
LEV 'N' Req.
CZ
Latch
Results
RoiIIrII_
E.nor
Code
330N
0003
Using CRI, the data in R1 is verified. Byte 0 data failed.
Rl = AA!l5
01
See Note 2.
6-220
6-170
0004
Using CRI, the data in Rl is verified. Byte 1 data failed.
Rl = AA55
01
See Note 2.
6-220
0005
NH R R 1, R5. CZ latches are tested for01.
Rl = 0000
01
See Note 2.
6-220
0006
Using CRI, the data in Rl is verified. Byte 0 data failed.
R1 = 0000
01
See Note 2.
6-220
6-170
0007
Using CRI, the data in Rl is verified. Byte 1 data failed.
Rl = 0000
01
See.Note 2.
6-220
6-170
0008
NHR R3, R5. CZ latches are tested for 10.
R3 = 55AA
10
See Note 2.
6-220
6-170
0009
Using CRI,the data in R3 is verified. Byte 0 data failed.
R3= 55AA
01
See Note 2.
6-220
6-170
OOOA
Using CRI, the data in R3 is verified. Byte 1 data failed.
R3 = 55AA
01
See Note 2.
6-220
6-170
XXXX
XH R instruction test.
0001
XHR Rl, R3. Rl data is tested by XRI. Instruction failed.
340N
Function Tes:IIeGI and Error Description
Rl = AA55
R5= 55AA
R3 = FFFF
R5 = 55AA
R1(1)=09
R3(1)=05
R1(1) =00
Suspected Card.
Location (s)
FEALO
FETMM
Page
Page
AB3H2
AB3J2
CD003
CA003
6-220
6-170
CZxxx
6-220
R1 (1) = 00
01
Rl=AA55
10
AB3G2
0002
XH R R 1, R3. CZ latches are tested for 10.
0003
Using CRI, the data in R1 is verified. Byte 0 data failed.
R1 = AA55
01
See Note 2.
'6-220
6-170
0004
Using CRI,the data in Rl is verified. Byte 1 data failed.
R1 = AA55
01
See Note 2.
6-220
0005
XHR Rl, R5. CZ latches are tested for 10.
Rl = 55AA
10
See Note 2.
6-220
0006
Using CRI, the data in Rl is verified. Byte 0 data failed.
Rl = 55AA
01
See Note 2.
6-220
6-170
0007
Using CRI, the data in R1 is verified. Byte 1 data failed.
R1 = 55AA
01
See Note 2.
. 6-220
6-170
0008
XHR R 1, R1. CZ latches are tested for 01.
Rl = 0000
01
See Note 2.
6-220
0009
Using CRI, the data in Rl is verified. Byte 0 data failed.
Rl = 0000
01
See Note 2.
6-220
6-170
OOOA
Using CRI, the data in Rl is verified. Byte 1 data failed.
Rl = 0000
01
See Note 2.
6-220
6-170
0008
XH R ·R3, R3. CZ latches are tested for 01.
R3 = 0000
'01
See Note 2.
6-220
OOOC
Using CHR, the data in R3 is verified. Data fa,iled.
R3 = 0000
01
See Note 2.
6·220
XXXX
LHOR instruction test.
0001
LHOR Rl, R3. Rldata
Rl = 0000
R3 = AA55
Rl = AA55
R5 = FFFF
Rl = 55AA
R3 = AA55
"
INIT130
Comm.ts
Note 1.
Note 1.
Decode failure.
ALU controls failure.
' CZ latches.
,
350N
is~ested.by
Rl,= XX09
,
R3 =0005
'Rl=0002
XRI. I nstructi on fa iI ecl.
R1(l)
=02
CD003
.CAxxx
AB3H2
AB3J2
01
6-220
6-170
Decode failure.
ALU cOntrols fai·lure.
;
"
,
,
/
.'
'.
,r . . . .,
,.
'".
'-
'\
./
./
("
".
'
./
"
."'\
;
./
('
'- ...
/
'\
"'.
......
,
/'"
"
./
/' "'.
/!"
..,
'\
./
/'
C'.
/'
'\
(
~
j
,
-\
./
"-
/'
/
"
./
".
./
(,£-~
(,"",
)
'-.
/
/'
'- ,",/
"-
./
(
(
(
c
(
(
(
(
(
(
(
{
(
(
(
(
(
(
(
(
(
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
350N
360N
370N
:
,
380N
Emil
Function Tested and Error DeacII......
~
PROG LEV 'N'
Prior to Test
Inst. Ex.eartion
Expected and Actual
Results in PROG
LEV 'N' Req.
Rl = 0102
Rl = 0881
00
AB3G2
CZ
Latch
Results
Suspected Card
Location(s)
Page
FETMM
Page
CZxxx
6-220
FEALO
Comments
0002
LHO R R1, R1. The CZ latches are tested for 00.
0003
Using CRI, the data in Rl is verified. Byte 0 data failed.
Rl = 0081
01
See Note 2.
6-220
6-170
0004
Using CRI, the data in Rl is verified. Byte 1 data failed.
Rl = 0081
01
See Note 2.
6-220
6-170
0005
LHOR Rl, Rl. Tile CZ latches are tested for 10.
Rl = 0040
10
See Note 2.
6-220
0006
Same as 0003 above.
Rl = 0040
01
See Note 2.
6-220
0007
Same as 0004 above.
Rl = 0040
01
See Note 2.
6-220
0008
LHOR Rl, Rl. C latch failed to set.
Rl = 0000
11
See Note 2.
6-220
0009
Same instruction as 0008. Z latch failed to set.
Rl = 0000
11
See Note 2.
6-220
OOOA
R1 data is verified for all zeros. Data failed.
Rl = 0000
01
See Note 2.
6·220
XXXX
LOR instruction test.
0001
LOR Rl, R3. Rl data is tested by XRI. Instruction failed.
Rl = XX09
R3 = XX05
Rl = XX02
Rl(l)=OO
01
AB3H2
AB3J2
CD003
CAxxx
6-220
6-170
Decode failure.
ALU controls failure.
XXXX
AR instruction test.
0001
AR Rl, R3. Rl data is tested by XRI. Instruction failed.
Rl = XX09
R3= XX05
Rl = XXOE
Rl(l)=OO
01
AB3H2
AB3J2
CD003
CAxxx
6-220
6-170
Decode failure.
ALU controls failure.
XXXX
Byte X data flow pattern sensitivity test using the LOR and AR instructions.
6-220
See Note 2 for bit failure.
0001
LOR Rl, R1. C latch is tested for an active state.
0002
Same instruction. Z latch is tested for an active state.
0003
R1 is tested for all zeros. OH R R1, R1.
0004
AR Rl, Rl. CZ latches are tested for 00.
0005
Rl = 0081
Rl = 0001
'-
Rl = 00000
11
See Note 2.
6-220
Rl = 00000
11
See Note 2.
6-220
Rl = 00000
Rl = 00000
01
See Note 2.
6-220
Rl = OCOOO
Rl = 18000
00
See Note 2.
6-220
Rl byte 0 is tested to verify the data.
Rl (0) = 80
01
See Note 2.
6-220
0006
Rl byte 1 is tested to verify the data.
R1(l) =00
01
See Note 2.
6·220
0007
Rl byte X is tested to verify the data. Rl is shifted right one position to move
byte X bit 7 into Rl (0). CZ latches are tested for 00.
R3 = OCOOO
00
See Note 2.
6-220
0008
R3 byte 0 is tested to verify the data.
R3(0) = CO
01
See Note 2.
6-220
0009
R3 byte 1 is tested to verify the data.
R3(l)=00
01
See Note 2.
6-220
OOOA
AR R1, R1. CZ latches are tested for 00.
Rl = 30000
00
See Note 2.
6-220
0008
R1 byte 0 and byte 1 is tested to verify the data.
Rl = 30000
01
See Note 2.
6-220
OOOC
Rl is shifted into R3 and R3 is shifted once. This will move byte X data into
byte O. CZ latches are tested for 00.
Rl = 30000
R3 = OCOOO
00
See Note 2.
6-220
R3=OAAOO
R3 = 2A800
00
See Note 2.
6·220
R3 = 2A800
Rl = 15400
00
See Note 2.
6-220
RHO) = 54
01
See Note 2.
6-220
R1 = OAAOO
01
See Note 2.
6-220
0000
'AR R3, R3/AR R3, R3. CZ latches are tested for 00.
OOOE
LOR Rl, R3. CZ latches are tested for 00.
OOOF
R1 byte 0 is tested to verify the data.
0010
LOR R1, Rl. R1 byte 0 is tested to verify the data.
Rl = 00001
Rl = 18000
R3 = 00000
Rl = 18000
R1 = 15400
CZ latches
I
Z3705AEA INIT Symptom Index
INIT 132
Z3705AEA IN IT Symptom Index
3705-80 INIT SYMPTOM INDEX - Cont.
ReuI_
380N
i
3AON
3BON
3CON
E:nor
Code
FunctiOlll Tes:led and Error Description
0011
LOR Rl, Rl/LOR R1, R1. R1 byte 0 is tested to verify the data.
0012
Rl byte 1 is tested to verify the data.
XXXX
LA instruction test.
0001
Using the LA instruction, Rl is loaded with 00509. The XRI instruction is used
to verify the data in byte O. Instruction failed.
0002
LA R3, X'OOOOO'. LA altered the CZ latches.
.<'
"
,
'"
y
)
,.~
"-..j
Expected and Actual
Results in PROG
LEV 'N' Req.
Rl = OAAOO
Rl = 02A80
Rl(O) = 2A
01
See Note 2.
6-220
Rl(l) =80
01
See Note 2.
6-220
Rl = 00000
Hl =.00509
Rl = 00509
Rl = 00009
01
AB3H2
CDOOOl
6-660
Decode failure.
fl3 = XXXXX
R3
= 00000
10
AB3G2
CZxxx
6-660
CZ latches.
R3 = 00000
01
See Note 2.
6-660
Subroutine test correcfbyte X data.
Rl = 3FFFF
01
See Note 2.
6-660
Rl = 3FFFF
01
See Note 2.
6-660
Subroutine test correct byte X data.
I
CZ
Latch
Results
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Comments
0003
R3 is tested to verify the data.
0004
LA Rl, X'3FFFF'. LA altered the CZ latches.
0005
R1 is tested to verify the data.
0006
LA Rl, X'255AA'. R1 is tested to verify the data.
Rl = 3FFFF
Rl = 255AA
01
See Note 2.
6-660
Subroutine test correct byte X data.
0007
LA Rl, X'lAA55'. Rl is tested to verify the data.
Rl = 255AA
Rl = lAA55
01
See Note 2.
6-660
Subroutine test correct byte X data.
XXXX
Data flow path byte X, a and 1 data sensitivity test using the LA Instruction.
This routine loops forty times with the LA instruction being updated on each pass.
0001
LA Rl, test pattern. The data in Rl is tested to verify the LA instruction. The
actual test of data is CH R R1, R3 where R3 is loaded via test table.
XXXX
LR instruction test.
0001
LR Rl, R3. Rl data is tested by XRI. Instruction failed.
0002
LR Rl, R7. The CZ latches are tested for 01.
, 0003
3DON
PROG LEV 'N'
PriOf' to Test
Inst. Execution
Rl = 00000
See Note 2 for bit failures.
Rl = R3
01
See Note 2.
Rl(l) = 09
R3(1) = 05
R1(l) = 05
Rl(l) =00
01
AB3H2
Rl = 3FFFF
R7 = 00000
Rl = 00000
01
AB3G2
Rl = 00000
01
See Note 2.
6-220
Rl = 2AA55
10
See Note 2.
6-220
Note 1.
Rl = 2AA55
01
See Note 2.
6-220
Subroutine test correct byte X data.
Rl = 155AA
10
See Note 2.
6-220
Note 1.
Rl = 155AA
01
See Note 2.
6-220
Subroutine test correct byte X data.
The data in Rl is tested to verify the LR instruction.
6-660
6-220
Subroutine test. Correct byte X data.
CD003
6-220
Decode Failures. See Note 2 for bit failures.
CZxxx
6-220
Note 1. CZ latches.
0004
LR Rl, R7. The CZ latches are tested for 10.
0005
R1 is tested to verify the data.
0006
LR Rl, R7. The CZ latches are tested for 10.
0007
R1 is tested to verify the data.
XXXX
Local store register 3 and 5 byte X testing.
0001
R7 is loaded with 30000 via LA instruction. R7 is moved into R3 and the R3 data
is shifted right two positions to move byte X data into byte O. Using CRI, the
data in R3 byte a is tested.
R7 = 30000
R3 = 00000
R3 = OCOOO
01
See Note 2.
6-600
6-220
Note 1.
0002
Same as above except R7 is moved into R5.
R7 = 30000
R5 = 00000
R5 = OCOOO
01
See Note 2.
6-660
6-220
Note 1.
0003
Same as 0001 above except R7 is loaded with all zeros.
R7= 00000
R3 = OCOOO
R3 = 00000
01
See Note 2.
6-600
6-220
Note 1.
0 0
'\
/
()
,r~
"'- " /
C)
Rl = 00000
R7 = 2AA55
Rl = 2AA55
R7 = 155AA
i~~
INIT 134
f' '->.,.,
I,_/
0
\. ~
j
,/
0' ./
.
r'""l
'\...3
J
/.~
,
"
\....
"
.',
"'-. ./
~.'~
'.
j
/''l
'
,
\......./
r~
\....../
r~
..... ./
r'
\,./
\
~
r·
"- ./
r--C\
\
"-
J
rt'~
"-./
,,/~
J
(~
\.J
.~
----------
(
(
.-~
(
(
(-
(
(,
f
(
(
«
(
c
---------
-----
(-'
(
(
(
(
(
(
Expected and Actual
Results in PROG
LEV 'N' Req.
ez
(
(
(::
-
(
--"----
(
('"
r-\
(
("
(
,
('
('
C
3705-80 INIT SYMPTOM INDEX - Cont.
R........
300N
3EON
3FON
Enor
Cede
Function Tested and Error Description
PROG LEV 'N'
Prior to Test
Inst. Execution
Latch
Results
Suspected Card
Location(s)
FEALO
Page
FETMM
Page
Comments
0004
Same as 0003 above except R7 is moved into R5.
R7 = 00000
R5 = OCOOO
R5 = 00000
01
See Note 2.
6-660
6-220
Note 1.
0005
Same as 0001 above except R7 is loaded with 20000.
R7 = 20000
R3 = 00000
R3 = 08000
01
See Note 2.
6-660
6-220
See Note 1.
0006
Same as 0005 above except R7 is moved into R5.
R7 = 20000
R5 = 00000
R5 = 08000
01
See Note 2.
6-660
6-220
See Note 1.
0007
Same as 0001 above except R7 is loaded with 10000.
R7 = 10000
R3 = 08000
R3 = 04000
01
See Note 2.
6-660
6-220
See Note 1.
0008
Same as 0007 above except R7 is moved into R5.
R7 = 10000
R5 = 08000
R5 = 04000
01
See Note 2.
6-660
6-220
See Note 1.
XXXX
OR instruction test.
0001
OR R1, R3. R1 data is tested by XRI. Instruction failed.
R1 = XXX09
R3 = XXX05
R1 = XXXOD
R1(1)=00
01
AB3H2
AB3J2
CD003
CA003
6-220
Decode failure.
ALU controls failure.
See Note 2 for bit failures.
0002
OR R1, R3. The CZ latches are tested for 01.
R1 = 00000
R3 = 00000
R1 = 00000
01
AB3G2
CZxxx
6-220
CZ latches.
0003
The data in R1 is tested to verify byte a and 1.
Rl = 00000
01
See Note 2.
6-220
Subroutine test correct byte X data.
0004
OR Rl, R3. The CZ latches are tested for 10.
= 3FFFF
10
See Note 2.
6-220
0005
The data in R1 is tested to verify byte a and 1.
R1 = 3FFFF
01
See Note 2.
6-220
0006
OR Rl. R3. The CZ latches are tested for 10.
R1 = 3FFFF
10
See Note 2.
6-220
0007
The data in R1 is tested to verify byte a and 1.
R1 = 3FFFF
01
See Note 2.
6-220
0009
OR R1, R3. The CZ latches are tested for 10.
R1 = 30000
10
See Note 2.
6-220
OOOA
The data in R1 is tested to verify byte 0 and 1.
R1 = 30000
01
See Note 2.
6-220
0008
OR Rl, R3. The CZ latches are tested for 10.
R1 = OFFFF
10
See Note 2.
6-220
oooe
The data in R1 is tested to verify byte a and 1.
Rl = OFFFF
01
See Note 2.
6-220
Subroutine test correct byte X data.
XXXX
NR instruction test.
0001
NR R1, R3. R1 data is tested by XRI. Instruction failed.
R1 = XXX09
R3= XXX05
Rl = XXX01
Rl (1) = 00
01
AB3H2
AB3J2
6-220
Decode failure.
ALU controls failure.
0003
OR Rl. R3. The CZ latches are tested for 10.
R1 = 30000
R3 = 30000
R1 = 30000
10
See Note 2.
6-220
0004
The data in R1 is tested to verify byte 0 and 1.
R1 = 30000
01
See Note 2.
6-220
0005
N R R1. R3. The CZ latches are tested for 01.
R1 = 00000
01
See Note 2.
6-220
0006
The data in R1 is tested to verify byte 0 and 1.
= 00000
01
See Note 2.
6-220
R1 = 255AA
R3 = 1AA55
R1
R1 = 1FFFF
R3 = 2FFFF
Rl = 30000
R3 = 30000
R1 = OAA55
R3=055AA
Rl = 2AA55
R3 = 155AA
R1
CD003
CA002
Subroutine test correct byte X data.
Subroutine test correct byte X data.
Subroutine test correct byte X data.
Subroutine test correct byte X data.
Subroutine test correct byte X data.
-
Z3705AEA INIT Symptom Index
INIT 136
(
Z370BAEA INIT Symptom Index
3705·80 INIT SYMPTOM INDEX - Conti
Routine
3FON
400N
410N
420N
/
!
'-
"\
)
,')
..
,,-~),..
Error
Cede
0007
,
N R R 1, R3. The CZ latches are tested for 01.
0008
The data in R 1 is tested to verify byte 0 and 1.
0009
NR R1, R3. The CZ latches are tested for 10.
OOOA
The data in R1 is tested to verify byte 0 and 1.
XXXX
XR instruction test.
0001
XR R1, R3. R1 data is tested by XRI. Instruction failed.
0002
XR Rl, R3. The CZ latches are tested for 01.
Expected and Actual
Results in PROG
LEV'N'Req.
PROG LEV 'N'
Prior to Test
I Nt,. Execution
Function Tested and Error Description
CZ
Latch
Results
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Comments
=00000
01
See Note 2.
6·220
R1 = 00000
01
See Note 2.
6·220
R1 = OFFFF
10
See Note 2.
6·220
R1 = OFFFF
01
See Note 2.
6·220
Subroutine test correct byte X data.
R1 = XXX09
R3= XXX05
Rl = XXXOC
R1(1) =00
01
AB3H2
AB3J2
CD003
CA003
6·220
6·170
Decode failure.
ALU controls failure.
R1 = 3AA55
R3= 3AA55
Rl = 00000
01
AB3G2
CZxxx
R1 = 155AA
R3 = 2AA55
R1
R1 = OFFFF
R3 = OFFFF
Subroutine test correct byte X data.
6·220
CZlatches.
Rl = 00000
01
See Note 2.
6·220
R1 = 30000
10
See Note 2.
6·220
Rl = 30000
01
See Note 2.
6·220
Rl = 30000
10
See Note 2.
6·220
R1 = 30000
01
See Note 2.
6·220
Rl = OFFFF
10
Sae Note 2.
6·220
Rl = OFFFF
01
See Note 2.
6·220
Subroutine test correct byte X data.
Rl = 1FFFF
10
AB3H2
AB3J2
AB3G2
6·220
Decode failure.
ALU controls failure.
CZ latch.
R1 = 10000
01
See Note 2.
6·220
Subroutine test correct byte X data.
R1 = 00000
11
See Note 2.
6·220
Z latch failed.
R1 = 00000
11
See Note 2.
6·220
0006
The data in R 1 is tested to verify byte 0 and 1.
Rl
01
See Note 2.
6·220
0008
AR R 1, R3. The CZ latches failed.
R1
00
See Note 2.
6·220
0009
The data in Rl is tested to verify byte 0 and 1.
01
See Note 2.
6·220
Subroutine test correct byte X data.
XXX X
SR instruction test.
0001
0002
0003
The data in R1 is tested to verify byte 0 and 1.
0005
XR Rl, R3. The CZ latches failed.
0006
The data in Rl is tested to verify byte 0 and 1.
0008
XR R1, R3. The CZ latches failed.
0009
The data in R 1 is tested to verify byte 0 and 1.
OOOA
XR R1, R3. The CZ latches failed.
OOOB
The data in R 1 is tested to verify byte 0 and 1.
XXX X
AR instruction test.
0001
AR R1, R3. The CZ latches failed.
0003
The data in R 1 is tested to verify byte 0 and 1.
0004
AR R 1, R3. C latch failed.
0005
0
\. .J
Rl = 1AA55
R3= 2AA55
R1 = OAA55
R3=055AA
R1 = 2AA55
R3= 355AA
R1 = 155AA
R3= 2AA56
= 00000
= 3FFFE
= 30000
CD003
CA002
CZxxx
Subroutine test correct byte X data
Subroutine test correct byte X data.
Subroutine test correct byte X data.
Rl = 3FFFE
Rl
SR Rl, R3.R1 data is tested by XRI. Instruction failed.
Rl = 00009
R3 = 00005
Rl = 00004
Rl(l)=OO
01
AB3H2
AB3J2
CD003
CA003
6·220
Decode failure.
ALU controls failure.
SR R1, R3. CZfailed.
Rl = 155AA
R3= 2AA55
Rl = 2AB55
to
AB3G2
CZxxx
6·220
CZ latch.
/~~
\
Rl = 255AA
R3 = 155AA
Subroutine test correct byte X data.
'-...)
~,
"'-
_/
r"''''''
'-. )
,-,j
(
r,,\
'-.
j
'- -j/
'-
'-... .. /
'-..,
\.. _ /
0
~ )
\,
r-~
/
\..
,
..
//
r~,
I
\'--.../
.'L~
'-. j
/.
'-. . .
"\
('~
r~
./
\....,j
..
-../)
~
\..j
I
r'"
,
\.,y
("1
'
\,/
0,
,
/
rAf'~,
,
'''-.../
J
\
A""~
'
\c.y
INIT 138
(
(
(
c
(
(
(
(
(
('
(
(
(
(
(' (/
(-
(
(
3705-80 INIT SYMPTOM INDEX - Cont.
.......
420N
Enor
CGdt
Function Tested and Error Descriptiall
440N
450N
Expected and Actual
Results in PROG
LEV 'N' Req.
CZ
Latch
Results
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Com...ms
Subroutine test correct byte X dat.a.
0003
The data in R 1 is tested to verify byte 0 and 1.
R1 = 2AB55
R1 = 20000
01
See Note 2.
6-220
0004
SR R1, R3. CZ latches failed.
R1 = 3FFFF
R3 = 3FFFF
R1 = 00000
01
See Note 2.
6-220
0005
The data in R1 is tested to verify byte 0 and 1.
R1 = 00000
R1 = 00000
01
See Note 2.
6-220
0006
SR R1, R3. CZ latches fai/ed.
R1 = 055AA
R3 = 1AA55
R1 = 2AB55
10
See Note 2.
6-220
0007
The data in R1 is tested to verify byte 0 and 1.
R1 = 2AB55
R1 = 20000
01
See Note 2.
6-220
0008
SR R1, R3. CZ latches failed.
R1 = OAA55
R3= 055AA
R1 = 054AB
00
See Note 2.
6-220
0009
The data in R1 is tested to verify byte 0 and 1.
R1 = 054AB
R1 = 00000
01
See Note 2.
6-220
Subroutine test correct byte X data.
XXXX
CR instruction test.
0001
CR R1, R3. R1 data is tested by XRI. Instruction failed.
R1 = 00009
R3 = 00005
R1(1) =00
01
AB3H2
AB3J2
CD003
CAxxx
6-220
Decode failure;
ALU controls failure.
0002
CR R 1, R3. CZ latches failed.
R1 = 15555
R3=2AAAA
R1 = 15555
10
AB3G2
CZxxx
6-220
CZ latch.
0003
The data in R1 is tested to verify byte 0 and 1.
R1 = 15555
R1 = 10000
01
See Note 2.
6-220
Subroutine test correct byte X data.
0004
CR R1, R3. CZ latches failed.
R1 = 355AA
R3= 355AA
R1 = 355AA
01
See Note 2.
6-220
0005
The data in R 1 is tested to verify byte 0 and 1.
R1 = 355AA
R1 = 30000
01
See Note 2.
6-220
0007
CR R1, R3. The CZ latches failed.
R1 = 25555
00
See Note 2~
6-220
0008
The data in R 1 is tested to verify byte 0 and 1.
R1 = 20000
01
See Note 2.
6-220
OOOA
CR R1, R3. The CZ latches failed.
R1==OAAAA
10
See Note 2.
6-220
OOOB
The data in R 1 is tested to verify byte 0 and 1.
R1=OAAAA
R1 == 0000
01
See Note 2.
6-220
OOOC
CR R1, R3. CZ latches failed.
R1 == OAA55
R3==OAA55
R1 == OAA55
01
See Note 2.
6-220
0000
The data in R 1 is tested to verify byte 0 and 1.
R1 == OAA55
R1 = 0000
01
See Note 2.
6-220
Subroutine t~st correct byte X data.
XXXX
L instruction test.
0001
Load R1 with R7 as the base register. CZ failed or load instruction failed.
R1 == 25AA5
R7 == Base Register
R1 == 1A55A
10
6-390
See Note 1.
Decode failure.
ALU controls failure.
6-390
See Note 2 for bit failures.
6-390
CZ latch.
I
430N
PROG LEV 'N'
Prior to Test
I nit. Execution
0002
The data in R1 is tested to verify the L instruction.
0003
Load R1 with R7 as the base register. CZ failed.
0004
The data in R 1 is tested to verify the L instruction.
0005
Load R 1 and R7 as the base register.
0006
The data in R 1 is tested to verify the L instruction.
XXXX
LH instruction test.
0001
Load halfword R1 with R7 as the base register. CZ letches failed.
R1 = 25555
R1 == 1A55A
R1
= 3FFFF
R1 = 2A55A
AB3H2
AB3J2
CDxxx
CAxxx
R1 == 1A55A
01
See Note 2.
R1 == 25AA5
10
AB3G2
R1 = 25AA5
01
See Note 2.
6-390
R1 = 00000
01
See Note 2.
6-390
R1 = 00000
01
See Note 2.
6-390
R1 = 05AA5
10
AB3H2
AB3J2
CZxxx
CD003
CA001
6-290
Subroutine test correct byte X data.
Subroutine test correct byte X data.
Subroutine test correct byte X data.
Subroutine test correct byte X data.
I
Subroutine test correct byte X data.
Decode failure.
ALU controls failure.
Z3705AEA IN IT Symptom Index
INIT 140
(~
Z3705AEA INIT Symptom Index
3705-80 INIT SYMPTOM INDEX - Cont.
Routi..
E,,'OI'
PROG LEV 'N'
Prior to Test
II.-t. Execution
F~ Tested and Error ~
Code
Expected and Actual
Results in PROG
LEV 'N' Req.
CZ
Latch
Results
Suspe~ed
Card
Location(s)
FETMM
FEALD
Page
INIT 142
Comments
Page
I
~ON
460N
0002
The data in R 1 is tested to verify the LH instruction.
0003
LH R1 with R7 as the base register failed.
0004
The data inRl is tested to verify the LH.
0005
LH-Rl with R7 as the base register. CZ failed.
0006
The data in Rl is tested to verify the LH.
XXXX
STH instruction test. R7 is used as the base register.
0001
STH instruction modified the CZ latches.
0002
The data stored above is loaded via an L instruction and compared. STH failed.
0003
470N
480N
490N
4AON
i
Rl = 15AA5
\
R1 = 3FFFF
R1 = 05AA5
01
See Note 2.
6-290
R1 = OA55A
10
See Note 2.
6-290
Rl = OA55A
01
See Note 2.
6-290
Rl = 00000
01
See Note 2.
6-290
R1 = 00000
01
See Note 2.
6-290
See Note 2 for bit failures.
See Note 1.
Rl = OA55A
01
AB3H2
AB3J2
AB3G2
R3 = 3A55A
01
See Note 2.
6-360
Rl = 05AA5
10
See Note 2.
6-360
R1 = 35AA5
R3= 35AA5
Rl = 35AA5
R3= 35AA5
01
See Note 2.
6-360
6-390
Rl = 3A55A
R3 = 3A55A
STH instruction modified the CZ latches.
6-360
CD003
CAxxx
CZxxx
Decode failure.
ALU controls failure.
CZ latch.
0004
The data stored above is loaded via an L instruction and compared. STH failed.
XXXX
L using RO as Operand 1.
0001
Load RO with R3 as the base register. Failed to load RO.
N/A
N/A
01
AB3H2
AB3J2
CDxxx
CAxxx
6-390
Decode failure.
ALU control.
0002
Load instruction with RO as Operand 1 altered the CZ latches.
N/A
N/A
01
N/A
CZxxx
6-390
CZ latches.
XXXX
L instruction test from the fullword direct addressable area.
0001
Load Rl from direct addressable area. CZ failed or instruction failed.
R1 == 00000
Rl = 3FFFF
10
AB3H2
AB3J2
CDxxx
CAxxx
6-390
Decode failure.
ALU control.
0002
The data in Rl is tested to verify the load.
Rl = 3FFFF
01
See Note 2.
XXXX
LR (Load Register) using RO as operand one to ensure that the CZ latches are
not affected.
0001
LR RO, R5 when RO is specified as operand one, a branch should occur.
LR RO, R5 failed to branch to the address contained in R5.
N/A
N/A
01
AB3H2
AB3J2
CDxxx
0002
When RO is specified as operand one, the CZ latches should not be altered.
This error stop indicates that the CZ latches were altered.
N/A
N/A
01
AB3G2
CZxxx
XXXX
IC (insert character) Instruction Test.
AB3H2
AB3J2
CD003
CAxxx
0001
IC Rl (1), Test Area 1 CZ failed. R3 is the base register.
0002
The data in Rl is tested to verify the IC instruction.
0003
IC Rl (0), Test Area 2, Z Latch failed. R3 = base register.
0004
6-390
6-290
Rl = 30055
10
See Note 2.
6-290
R1 = 30055
01
See Note 2.
6-290
11
See Note 2.
6-290
Same as 0003 except C latch failed.
R1
=300FF
=300FF
11
See Note 2.
6-290
0005
The data in Rl is tested to verify the IC instruction.
Rl = 300FF
01
See Note 2.
6-290
0006
IC Rl (0), Test Area 3 CZ failed. RO = base register.
Rl = 301FE
00
See Note 2.
6-290
Rl = 300FF
R1
Rl
=3FFFF
R1
=3FEFE
Decode failure.
ALU controls failure. See Note 2 for
bit failure.
,
/
,
'\
)
~''l~.
',---,./
()
0
"'-'
f'
"'-j
r~
"- )
"
./
,"",
r
,,c',!
\'.'./
"~,
./
C)
r'\
"'--
./
,
./
" "\
' .... /
(~
j
\
./
C)
(
lJ
(
(
(
(
(
(
(
(
c
('
(
(
(
(
(
(
(' (
(
(
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
Error
Code
Function Tested and Error Desc:ripbiImft
PROG LEV 'N'
Prior to Test
1:Nt. E.xeartion
Expected and Actual
Results in PROG
LEV 'N' Req.
CZ
Latch
Results
Suspected Card
Location{sl
FEALD
Page
FETMM
Page
Comments
I
4AON
4BON
4CON
Rl =301FE
01
See Note 2.
6·290
Rl = OOOAA
10
See Note 2.
6·290
Rl = OOOAA
01
See Note 2.
6·290
Rl = 20055
R3 = Base + 1.
R2 = Value of Base.
01
AB3H2
AB3J2
Rl = 20055
01
See Note 2.
6480
R3 = Base + 1
R3 = Base + 1.
R2 = Base.
01
See Note 2.
6480
Rl = 155FF
Rl=lAAFF
R3 = Base + 2.
R2 = Base.
10
See Note 2.
6480
The data in Rl is tested to verify the ICT instruction.
Rl = lAAFF
01
See Note 2.
6480
0006
The address in R3 is tested to verify if the ICT updated the base.
R3 = Base + 2.
R2 = Base.
01
See Note 2.
6480
0007
ICT Rl (0), R3. CZ latches were altered by ICT instruction.
Rl = OFFOO
R3 = Base + 3.
R2 = Base.
10
See Note 2.
6480
0008
The data in Rl is tested.
Rl = OFFOO
01
See Note 2.
6480
0009
The address in R3 is tested.
R3 = Base + 3.
R2 = Base.
01
See Note 2.
6480
OOOA
ICT Rl (1), R3. CZ latches were altered by ICT Instruction.
Rl = 3FFOO
R3 = Base + 4.
R2 = Base.
01
See Note 2.
6480
OOOB
The data in Rl is tested.
Rl = 3FFOO
01
See Note 2.
6480
OOOC
The address in R3 is tested.
R3 = Base + 4.
R2 = Base.
01
See Note 2.
6480
XXXX
ST (store fullword) instruction testing.
0001
ST R 1, Test Area R3 is the base reg for this test. The CZ latches were altered
by the ST instruction.
Rl = lA55A
R3 = Base.
01
AB3H2
0002
The data stored above is loaded and tested.
Rl = R7
Rl = lA55A
01
0003
ST R1, test area. R3 is the base reg for this test. The CZ latches were altered
by the ST instruction.
Rl = 25AA5
R3 = Base.
10
N/A
0004
Same as 0002 above.
Rl = R7
Rl = 25AA5
01
See Note 2.
0005
ST Rl, direct addressable. RO is the base reg for this test. The CZ latches were
altered by the ST.
Rl = 3FFFF
01
N/A
0007
The data in Rl is tested to verify the IC instruction.
0008
IC R1(ll, Test Area 4 CZ failed. RO = base register.
0009
The data in Rl is tested to verify the IC instruction.
XXXX
ICT (insert character and count) Instruction Test. R3 is the base register for
this routine.
0001
ICT Rl (1), R3 CZ latches were altered by the ICT instruction.
0002
The data in Rl is tested to verify the ICT instruction.
0003
The address in R3 is tested to verify if the ICT updated the base.
0004
ICT Rl (0), R3. CZ latches were altered by ICT instruction.
0005
Rl = 00000
Rl = 200AA
R3 = Base
Rl = 00000
Rl = 3FFFF
R7 = 25AA5
R7 = lA55A
CDxxx
CAxxx
CD003
6·480
6430
Decode failure.
ALU controls failure.
See Note 2 for bit failures.
Decode failure.
See Note 2 for bit failures.
Note 1.
CZxxx
CZxxx
6·430
CZ latches.
6430
See Note 1.
6·430
CZ latches.
Z3705AEAINIT Symptom Index
INIT 144
(
Z3705AEA INITSymptom Index
3705-801NIT SYMPTOM INDEX - Cont.
.',
RouIi_
4CON
400N
4EON
I
I
4FON
Enor
Function Tested and Error Descriptian
Code
Expected and Actual
Results in PROG
LEV 'N' Req.
PROG LEV'N'
Prior to Test
Inn. E.xecution
R7
= 00000
0006
The data stored above is loaded and. tested.
0007
Same as 0005 except different data is used.
0008
Same as 0006.
XXXX
STH instruc1:ion-test.
0001
STH R1, direct addressable. RO is the base reg. for this test. The CZ latches were
altered by theSTH.
0002
The data stored above is read out via a L R3 instruction and compared.
0003
Same as 0001 except different data is used.
0004
Same as 0002 except different data is used.
XXXX
STC Instruction Test.
0001
STC Rl (01. test area. R3 is the base reg for this test. The CZ latches were altered
by the STC.
0002
The data stored above is read out and compared.
0003
STC Rl (1), test area. R3 is the base reg for this test. The CZ latches were altered
by the STC.
0004
The data stored above is read out and compared.
0005
STC R1 (1), direct addressable. RO is the base reg for this test. CZ latches were
altered.
0006
The data stored above is read out and compared.
0007
STC R1 (0), direct addressable. RO is the base reg for this test. CZ latches were
altered.
0008
The data stored above is. read out and compared.
XXXX
STCT (Store Character and Count) Instruction Test.
0001
STCT R1(0), R3. The CZ latches were altered by the STCT.
R3
0002
The data stored abovais read out and compared.
R7 =30055
0003
0004
= 3FFFF
R3 = 0000
R3 = FFFF
'
Suspected Card
Location (5)
..
.'
FETMM
Page
Comments.
01
See Note 2.
6430
10
See Note 2.
6430
Rl
Rl
01
See Note 2.
6430
See Note 1.
Rl
= FFFF
01
AB3H2
6-360
Decode failure.
Rl = R3
Rl = FFFF
01
See Note 2.
6-360
Rl = 0000
10
See Note 2.
6-360
Rl = R3
Rl = 0000
01
See Note 2.
6-360
= 3AAFF
01
AB3H2
Rl = R7
Rl = OFFAA
01
Rl = 3FF55
Rl
CD003
Decode failure.
See Note 2.
6-330
See Note 1.
01
See Note 2.
6-330
= R7
01
See Note 2.
6-330
Rl = 2AAFF
10
See Note 2.
6-330
Rl = R7
Rl = OFFFF
01
See Note 2.
6-330
Rl = 300AA
10
See Note 2.
6-330
= R7
01
See Note 2.
6-330
See Note 1.
Rl = OFFAA
R3 = Base + 1.
R2 = Value of base.
01
AB3H2
AB3J2
6-520
Decode failure.
ALU control failure.
Rl = R7
Rl = 3FF55
01
See 0001
Above.
6-520
See Note 1.
The address in R3 is tested to verify the count function.
R3 = Base + 1.
R2 = Base.
01
See 0001
Above.
6-52Q
STCT Rl (1), R3. The CZ latches were altered by the STCT.
Rl = 3FFOO
R3 = Base + 2.
R2 = Base •
10
See Note 2.
6-520
R7 = 300FF
R7 = 3AAFF
R7
Rl
= 30000
R7 = 30000
Rl
= Base
CDxxx
See Note 1.
6-330
..... .\.
CDxxx
CAxxx
·c·
"-
/
".
/
.
./
See Note 1.
See Note 1.
.
.
'.'
)
FEALO'
Page
= R7
= 3FFFF
= 00000
= R7
= 00000
Rl
Rl
Rl
R7
'" CZ
Latch
Results
tNIT 146
..
{
(
(
(
(
(
(
(
(
(
(
{
(
(
(
(
( (-
3705-80 INIT SYMPTOM INDEX - Cont.
Enor
Routi..
c.-
4FON
0005
The data stored above is read out and compared.
0006
The address in R3 is tested to verify the count function.
500N
510N
530N
540N
550N
560N
570N
XXXX
FIIIIIdion Tested and Error DescriptiOfl
I
i
PROG LEV 'N'
Prior to Test
Inst. Exec::llrl:ioon
Expected and Actual
Results in PROG
LEV 'N' Req.
R7 = 300FF
R1 = R7
•
R1 = OFFOO
01
See Note 2.
6-520
R3 = Base + 2.
R2 = Base.
01
See Note 2.
6-520
R1 = 15555
00
AB3H2
AB3J2
AB4R2
R1 = 15555
01
See 0001
Above.
6-220
R1=OAAAA
10
See Note 2.
6-220
R1=OAAAA
01
See Note 2.
6-220
R1 = 05555
00
See Note 2.
6-220
R1 = 05555
01
See Note 2.
6-220
R1 = 02AAA
10
See Note 2.
6-220
R1 = 02AAA
01
See Note 2.
6-220
R1 = 00000
11
AB3H2
AB3J2
AB4R2
R1 = 00000
01
See Note 2.
= 20000
10
AB4J2
DF009
6-170
AB4J2
DF009
6-170
AB4J2
DF009
6-220
CZ
Latch
Results
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Comments
See Note 1.
LOR instruction test for correct CZ latches. A previous routine tested the
instruction decode.
0001
LOR R 1, R1. The CZ latches failed.
0002
The data in R1 is tested to verify the LOR.
0003
LOR R1, R1. The CZ latches failed.
0004
The data in R1 is tested to verify the LOR.
0005
LOR R1, R1. CZ latches failed.
0006
The data in R1 is tested to verify the LOR.
0007
LOR R1, R1. CZ latches failed.
0008
The data in R1 is tested to verify the LOR.
XXXX
LOR instruction test for correct CZ latches, 2 of 2.
0001
LOR R1, R1. CZ latches failed.
0002
The data in R1 is tested to verify the LOR.
XXXX
ARI instruction test.
0001
Failure in byte X.
XXXX
SRI instruction test.
0001
Failure in byte X.
·xxxx
ACR instruction test.
0001
Failure in byte X.
XXXX
SCR instruction test.
0001
Failure in byte X.
XXXX
BAL and BALR instruction test.
0001
BAL failed to branch. Decode failure.
R1=2AAAA
R1 = 15555
R1=OAAAA
R1 = 05555
R1 = 00001
R1
= 1FFFF
R1
CDxxx
CAxxx
CF004
CDxxx
CAxxx
CF004
6-220
6-220
Decode failure.
ALU control failure.
Shift right failure.
Decode failure.
ALU control failure.
Shift right failure.
6-220
R1 = 00000
R1 = 3FFFF
10
R3(0) = 03
R1 = 2FEFF
R1 =301FF
10
R3(1) = 01
R1 =30000
R1 = 2FFFF
01
AB4J2
DFxxx
6-220
N/A
N/A
01
AB3H2
CD001
thru
CD004
6-570
Byte X.
Z3705AEA INIT Symptom Index
INIT 148
Z3706AEA INIT Symptom Index
3705-80 INIT SYMPTOM INDEX - Cont.
PROG LEV 'N'
Prior to Test
I nst. Execution
Expected and Actual
Results in PROG
LEV 'N' Req.
N/A
N/A
01
Above BAL failed to store correct value in R3.
R3 = IAR link.
N/A
6-570
0004
BALR failed to branch. Decode failure.
R3 = IAR link.
N/A
6-240
0005
Above BALR modified CZ latches.
N/A
N/A
0006
Above BALR failed to load Reg 1 with correct link address.
Rl = IAR link.
0007
An invalid register decode occurred.
Routine
Error
Code
570N
0002
Above BAL altered CZ latch. CZ was 01.
0003
Function Tested and Error Description
CZ
Latch
Results
Suspected Card
Location(s)
FETMM
Page
FEALD
Page
CZxxx
6-240
6-240
N/A
N/A
N/A
N/A
N/A
6-240
A wild branch occurred or a local store
register decode failure.
R3 = 30000
R3 = 3FFFF
01
AB3H2
CDOOl
thru
CD004
6-680
Count in low byte.
AB3J2
CAxxx
6-680
ALU control.
01
AB3G2
CZxxx
6-680
CZ latches.
6·680
Count in high byte.
R3 = 3FEFF
10
AB3J2
CAxxx
6·680
"
580N
5AON
Comments
6-570
AB3G2
AB3G2
XXXX
BCT instruction test.
0001
BCT did not branch. Decode failure.
0002
Above BCT did not decrement count.
R3 = 3FFFF
0003
BCT above modified the CZ latch.
R3 = 3FFFF
0004
BCT above failed to decrement count.
R3 = 3FFFF
R3 = 3FFFF
0005
BCT did not decrement properly.
0006
Above BCT failed to branch
R3 = 3FEFF
10
AB3H2
CDxxx
6·680
Decode.
0007
AbolJe BCT modified CZ latch.
R3 = 3FEFF
10
AB3G2
CZxxx
6-680
CZ latches.
R3 = 3FEFF
10
AB3J2
CAxxx
6-680
ALU
0008
Above BCT did not decrement.
0009
BCT modified CZ latch.
Rl = 30001
Rl = 30000
10
AB3G2
CZxxx
6-680
Count in low byte CZ latches.
OOOA
Above BCT failed to decrement count.
Rl = 30001
Rl = 30000
10
AB3J2
CAxxx
6-680
Count in low byte ALU.
OOOB
Above BCT decremented count to zero but branched.
Rl = 30000
N/A
AB3H2
CDxxx
6·680
Decode.
OOOC
BCT modified CZ latch.
R1 = 300FF
10
AB3G2
CZxxx
6·680
Count in high byte.
0000
Above BCT failed to decrement count.
R1 = 300FF
N/A
AB3J2
CAxxx
6·680
ALU.
OOOE
Above BCT branched when count was zero.
R1 = 300FF
N/A
AB3H2
CDxxx
6-680
Decode.
OOOF
Above BCT failed to decrement count.
Rl = 300FF
N/A
AB3J2
CAxxx
6·680
ALU.
XXXX
Register decode test for current level reg. group. The following tests will load one
of the current level 'N' general register with data. Then the other six registers are
'ORed' together to test for register decode errors. Each of the remaining six sho Id
have data = 00000.
0001
Register decode failure. Group regs = 00000 except Rl.
Same.
N/A
AB3K2
CLxxx
0002
LR Rl, Rl failed.
Rl = 00001
N/A
AB3K2
CLxxx
6·220
6-120
0003
Register decode failure. Group regs = 00000 except R 1.
Same.
N/A
AB3K2
CLxxx
6-220
6-120
0004
LRI R1(l) failed.
Rl = 30101
N/A
AB3K2
CLxxx
6-170
Rl = 301FF
Rl = 00001
Rl = 30101
INIT 150
Decode failure for all error codes in this
routine.
6~120
LCR R1(O), R1(l) failed.
0005
Rl = 30101
,
AB3K2
N/A
CLxxx
6-220
6~120
'-,
,
/
''\
'.,
./1
"",
0,
'\,
)
(
j
'..
\" j
(~,
",
r'\
'.
/
'.., ,/
:
.~
I
\,,/
''''\
",-",
r
"
,
,
/
"
/
,
,/
(-'.
'..,/
'..
'"
/
('
"
/
'"
/
,/
l
'.._/
r
(":
\.."
7",\
\" ,/
-'"
"
,
/
Jr'""
'\
\,./
'.,
'"""j
\~
,./
C)
/~
(
(
(
(
(/ (
(
(
(
(
(
(
(
(
{
(
(
,
(
3705-80 INIT SYMPTOM INDEX - Cont.
ROUIi..
5AON
5BON
Enor
Code
Funcboll Tested and Error Descripbolt
= 00000 except R2.
PROG LEV 'N'
Prior to Test
Inst.Execution
= 00002
Expected and Actual
Results in PROG
LEV 'N' Req.
0006
Register decode failure. Group regs
0007
LR R1, R2 failed.
0008
Register decode failure. Group regs
0009
LR R3, R3 failed.
OOOA
Register decode failure. Group regs
OOOB
LR1 R3(1) failed.
R3
OOOC
LCR R3(01. R1(1) failed.
R3
0000
Register decode failure. Group regs
OOOE
LR R1, R4 failed.
XXXX
Register decode test for current level reg group. See routine 470N above.
0001
Register decode failure. Group reg = 00000, except R5.
0002
LR R5, R5 failed.
0003
Register decode failure. Group regs
0004
LRI R5(1) failed.
R2
R3
= 00003
= 00000 except R4.
R3
R4
= 30303
= 00004
FETMM
Page
CLxxx
6-220
6-120
N/A
AB3K2
CLxxx
6-220
6-120
N/A
AB3K2
CLxxx
6-120
N/A
AB3K2
CLxxx
6-220
6-120
N/A
AB3K2
CLxxx
6-120
= 30303
AB3K2
CLxxx
6-120
6-120
= 30303
AB3K2
CLxxx
6-220
6-120
AB3K2
CLxxx
6-120
AB3K2
CLxxx
6-220
6-120
= R2
= 00002
= 00003
Same.
N/A
= R4
= 00004
R5
= 00005
Same.
R5
= 20505
= 00005
Same.
R5
= 20505
AB3K2
CLxxx
6-120
See Note 1.
AB3K2
CLxxx
6-220
6-120
See Note 1.
AB3K2
CLxxx
6-120
See Note 1.
AB3K2
CLxxx
6-170
6-120
See Note 1.
AB3K2
CLxxx
6-220
6-120
See Note 1.
AB3K2
CLxxx
6-120
AB3K2
AB3K2
CLxxx
CLxxx
6-220
6-120
AB3K2
CLxxx
6-120
AB3K2
CLxxx
6-220
6-120
AB3K2
CLxxx
6-120
See Note 1.
I
5CON
Comments
All error codes routine signify a decode
failure.
R5
= 00000, except R5.
FEALo
Page
AB3K2
Same.
R1
R4
Suspected Card
Location(s)
N/A
Same.
R3
= 00000 except R3.
Results
Same.
R1
R2
= 00000 except R3.
CZ
Latch
= 20505
0005
LCR R5(0), R5(1) failed.
0006
Register decode failure. Group regs
0007
LR R 1, R6 failed.
0008
Register decode failure group regs
0009
LR R7, R7 failed.
OOOA
Register decode failure. Group regs
OOOB
LRI R7(1) failed.
R7
= 00707
AB3K2
CLxxx
6-170
6-120
See Note 1.
OOOC
LCR R7(0), R7(1) failed.
R7
= 00707
AB3K2
CLxxx
6-220
6-120
See Note 1.
XXXX
Add and subtract pattern sensitivity test; this routine loops.
0001
BCT failed to branch or altered CZ latches.
N/A
N/A
00
AB3J2
CAxxx
6-680
ARI count in R1.
0002
BCT altered CZ latches.
N/A
N/A
00
AB3G2
CZxxx
6-680
CZ latches.
R5
= 00000, except R6.
R6
= 00006
Same.
R1
R6
= 00000, except R7.
R7
= 00007
Same.
R7
= 00000, except R7.
R7
= 00707
= R6
= 00006
= 00007
Same.
See Note 1.
BCT count in R3(1). SRI count in R7.
Z3705AEA. fNIT Symptom Index
INIT 152
Z3706AEA INITSvmptom Index
3705-80 INIT SYMPTOM INDEX - Cont.
E.JTOr
ROlIn.
5CON
Code
Expected and Actual
Results in PROG
LEV 'N' Req.
PROG LEV'N'
Prior to Test
I nst. Execution
Function Tested and Error Description
CZ
Latch
Results
Suspected Card
Location(s)
FEALD
Page
The ARI and BCT counts are not equal. ALU failure.
See Note 2.
6-170
6-680
0004
The ARI and SRI counts are not equal. ALU failure.
See Note 2.
6-170
6-680
0005
The C latch set after an SR I instruction when result was not less than zero.
00
AB3H2
AB3G2
0006
SRI failed to set C latch.
00
See Note 2.
6-170
0007
Z latch set on a non-zero SR I result.
00
See Note 2.
6-170
0008
Z latch failed to set on overflow ARI result.
11
See Note 2.
6-170
0009
C latch failed to set on overflow ARI result.
11
See Note 2.
6-170
OOOA
ARI and BCT counts not equal. ALU failure.
N/A
See Note 2.
6-170
6-680
OOOB
SRI failed to set C latch.
10
See Note 2.
6-170
OOOC
ARI did not set Byte X on overflow condition.
01
See Note 2.
6-170
XXXX
Input/output instruction decode test.
0001
Output instruction modified CZ latch.
0002
Input instruction modified CZ latch.
0003
Input or output X'79' decode failure.
0004
Output modified CZ latch.
0005
Input modified CZ latch.
0006
Input or output decode failure.
XXXX
Input test for CCU LAR reg.
0001
Input failure R1 = R3 the address previous to inputing LAR.
XXX X
I/O register decode test. Level 1 testing only. Each general register, starting with
Level 1 Reg 6 through Level 5 Reg 7, is tested. Testing is done by a subroutine.
5FON
I
CDxxx
CAxxx
\
FETMM
Page
0003
INIT 154
Comments
6-170
All input-output to Reg X '79'.
R7 = 30300
R3 = 00300
R7 = 00000
R1 = 00000
01
AB3H2
CDxx
6-730
01
AB3H2
CDxxx
6-170
N/A
AB3H2
CDxxx
6-120
10
AB3H2
CDxxx
6·730
10
AB3H2
CDxxx
6-710
N/A
AB3H2
CDxxx
6-710
6-730
AB3H2
AB3M2
CD003
CS001
6-800
AB3K2
CLxxx
6-120
Local store register selection failure. See
Note 2 for bit failures.
AB3K2
CLxxx
6-120
The failing register can be determined by
the data in R1. Bytes 0 and 1 bits 0-3 will
define the register in hex. For example,
0164 output to X'06' (Level 1 Reg 6)
11 F4 • output tIl X'1 F' (Level 5 Reg 7)
See Note 1. All failures in this ",utine are of
decode type.
\
\.
See Note 1.
\
600N
620N
0001
R1, test reg, IN R2, test reg.
. OUT
decode failure.
Either the "output" or "input" register
R1
=Output reg
R1= R2
R1 - Output reg data.
data.
N/A
=
630N
xxxx
I/O register pattern: sensitivity testing. Level 1 testing only. Each of the general
registers tested above in routine 620N is tested again with 28 different patterns.
0001
OUT R1, test reg, IN R4, test reg. The data in R2 and R4 failed to compare.
N/A
R1 - R4
R2 = Test pattern.
R3 Test reg data.
AB3K2
CLxxx
6-120
Local store register selection failure. See
Note 2 for bit failures.
AB3K2
CLxxx
6-120
R3 bytes 0 and 1 bits 0-3 defines the
register, in hex.
=
/
'~
\,
)
-,/
0..
\
/
j
"\
\..j
(....-~
\.
/
I
i/'~.
\..j
1'-"""
~
',,---
\.~ .-
"-/
;
"'-
......_/
\....J
'"
/
r''''o,
\..
/
',-
/
\.
;
./
/'1
\,..-J
,r"'l
(""~
\,,/
",-j
.4'-~
.,~
'\
./
'..
I
\.../
r-'--"
""
~)
~"',
,
'-./
r",\
(
(
(/
(
(
(
(
(
(
f
(
(
(
(
(
(
(
(
(
('
(
(/ (
..
'~.
(
(~
3705-80 INIT SYMPTOM INDEX - Cont.
Routi_
650N
660N
670N
690N
6AON
6CON
600N
Error
Cc*
Function Tested .... Error o.scription
PROG LEV'N'
Priar' to Test
1Md:. EMCVIIicn
Expected and Actual
R8S4.I11s in PROG
LEV 'N' Req...
CZ
Latch
Results
Suspected Card
Location(s)
FEALO
Page
FETMM
Page
Comments
Program level failure.
AB3M2
CPxxx
01
AB3M2
CPxxx
6-860
Rl .. Reg X'7F'.
Rl .. 8004
01
AB3M2
CPxxx
6·860
N/A
N/A
AB3M2
CPxxx
6·760
Program level failure.
N/A
N/A
N/A
AB3M2
CPxxx
6·760
See Note 3.
Levell exited to Level 3 instead of Level 2.
N/A
N/A
N/A
AB3M2
CPxxx
6·760
See Note 3.
0005
Levell exited to Level 4 instead of Level 2.
N/A
N/A
N/A
AB3M2
CPxxx
6·760
See Note 3.
0006
Levell exited to Level 6 instead of Level 2.
N/A
N/A
N/A
AB3M2
CPxxx
6·760
See Note 3.
XXXX
General register interaction testing. Once the basic routines have been run under
program Level 2, the general registers for Level 3 RO through Level 5 R7 are
tested to verify that the Level 2 programs did not alter the data previously stored
by routine 630N.
AB3K2
AB3M2
CLxxx
CPxxx
0001
Interaction between Level 2 and some other general register.
XXXX
I/O register decode testing. Level 2 testing only.
0001
OUT R1, test reg, IN R2, test reg. Register decode failed. Previously tested under
program Levell, must be level sensitive.
XXXX
Levell to Level 2 setup test. A subroutine is used to unmask Level, set Diag L2
interrupt and prepares to exit Levell.
0001
Interrupt requests group 1 has outstanding bits on. Reg X'7E'.
Rl
= Reg X'7E'.
0002
Diag L2 interrupt request interrupt bit is not on interrupt request group 2.
Reg X'7F'.
XXXX
General register setup. Exit Levell.
0001
Same test and error data as that listed in routine 620N.
0002
Exit instruction failed to exit Levell.
0003
The Level 1 exit did not exit to Level 2 but returned to Levell.
0004
N/A
R4 = Expected data.
R2 = Actual data.
Rl = Input reg data.
R1 = Output reg
data.
Rl = R2
R1 = Output reg data.
N/A
AB3K2
CLxxx
AB3K2
CLxxx
AB3K2
CLxxx
AB3M2
CPxxx
Register selection.
Program level failure.
6·120
The failing register can be determined by the
data in R1. Bytes 0 and 1 bits 0-3 will
define the register, in hex.
6·120
R1 bytes 0 and 1 bits 0·3 defines the
register, in hex. Register selection see
Note 2 for bit failures.
Register selection. See Note 2 for bit
failures.
R3 bytes 0 and 1 bit 0·3 defines the register
in hex.
XXXX
I/O register pattern sensitivity testing. Level 2 testing only.
0001
OUT R2, test reg, IN R4, test reg. Previously tested under program Levell, must be
level sensitive.
XXXX
Level 2 to Level 3 setup test. A subroutine is used to mask Level 2, unmask Level 3,
reset diag L:2 request interrupt, and prepares to exit Level 2.
0001
Diag L2 interrupt request bit failed to reset.
Rl
=Reg X'7F'.
N/A
AB3M2
CPxxx
6·070
0002
PCI L3 interrupt request bit failed to set. Reg X'7F'. Byte 1 Bit 6.
Rl = Reg X'7F'.
N/A
AB3M2
CPxxx
6·070
6·860
0003
PCI L3 interrupt request bit fialed to reset or other interrupt bits are on.
Reg X'7F'. Byte 1 Bit 6.
Rl = Reg X'7F'.
N/A
AB3M2
CPxxx
6·070
6-860
XXXX
General register setup. Exit Level 2.
0001
Same test and error data as listed above under routine 690N.
R2= R4
R2 = Test pattern.
R3 .. Test reg data.
N/A
.
Program level failure.
Reg X'7F' byte 0 bit 0 equals Diag L2
request.
Reg X'7F' byte 0 equals PCI L3 interrupt.
6·120
Z3706AEA, INIT Symptom Index
INIT 156
Z3705AEA INIT Symptom Index
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
600N
E,rror
Function Tested and Error Description
Code
0002
Exit instruction failed to exit L2.
PROG LEV'N'
Prior to Test
Inst.Execution
Expected and Actual
Results in PROG
LEV 'N' Req.
N/A
N/A
N/A
CZ
Latch
Results
\
6FON
700N
710N
730N
740N
"
'-
"')"
l~""
'-
,;J
FEALO
Page
FETMM
Page
AB3M2
AB3K2
CPxxx
CLxxx
6-070
6-750
Program level failure.
Register selection.
Suspected Card
Location(s)
INIT 158
Comments
0003
Level 2 exited to Level 1 instead of Level 3.
N/A
N/A
N/A
AB3M2
AB3K2
CPxxx
CLxxx
6-070
6-750
See Note 3.
0004
Level 2 exited to Level 2 instead of Level 3.
N/A
N/A
N/A
AB3M2
AB3K2
CPxxx
CLxxx
6-070
6-750
See Note 3.
0005
Level 2 exited to Level 4 instead of Level 3.
N/A
N/A
N/A
AB3M2
AB3K2
CPxxx
CLxxx
6-070
6-750
See Note 3.
0006
Level 2 exited to Level 5 instead of Level 3.
N/A
N/A
N/A
AB3M2
AB3K2
CPxxx
CLxxx
6-070
6-750
See Note 3.
XXX X
General register interaction test. Once the basic routines have been run under
program Level 3, the general registers for Level 4 Reg 0 through Level 1 Reg 7
are tested to verify that the Level 3 programs did not alter the data previously
stored by routine 6DON.
AB3K2
AB3M2
CLxxx
CPxxx
0001
Interaction between Level 3 and some other general register.
R4
R2
R1
AB3K2
AB3M2
CLxxx
CPxxx
XXXX
I/O register decode test. Level 3 testing only.
AB3K2
CLxxx
0001
OUT R1, test reg, IN R2, test reg. Register decode failed. Previously tested under
program Levels 1 & 2.
R1
R1
AB3K2
CLxxx
XXXX
I/O register pattern sensitivity test. Level 3 testing only.
AB3K2
CLxxx
Register selection. See Note 2 for bit
failure.
0001
OUT R2, test reg, IN R4, test reg. Previously tested under program Level 1 and 2
(must be Level sensitive).
AB3K2
CLxxx
R3 bytes 0 and 1 bits 0-3 define the register
in hex.
XXXX
Level 3 to Level 4 setup test. A subroutine is used to mask Level 3, unmask
Level 4, reset PCI L3 request, set PCI L4 request, and prepares to exit Level 3.
AB3M2
CPxxx
Program level failure.
0001
PCI L3interrupt request bit failed to reset. Reg X'7F' Byte 1 Bit 6.
R1 = Reg X'7F'
N/A
AB3M2
CPxxx
6-860
0002
PCI L4 interrupt request bit failed to set. Reg X'7F' Byte 0 Bit 7.
R1 = Reg X'7F'
N/A
AB3M2
CPxxx
6-860
0003
Outstanding bits on in Reg X'7F'.
R1 = 0000
01
AB3M2
CPxxx
8-870
XXXX
General register setup. Exit Level 3.
0001
Same test and error data as listed above under routine 700N.
0002
Exit instruction failed to exit L3.
0003
0004
("')
\" j
= R2
= Output
N/A
reg data.
R2 = R4
R2 = Test pattern.
R3 = Test reg data.
N/A
N/A
6-120
R 1 bytes 0 and 1 bits 0-3 defines register
in hex.
Register selection.
6-120
R 1 bytes 0 and 1 bits 0-3 defines the
register in hex.
6-120
N/A
N/A
AB3K2
AB3M2
CLxxx
CPxxx
6-070
6 7750
Register selection.
Program level failure.
Level, 3 exited to Level 1 instead of Level 4.
N/A
N/A
AB3K2
AB3M2
CLxxx
CPxxx
6-070
6-750
See Note 3.
Level 3 exited to Level 2 instead of Level 4.
N/A
N/A
AB3K2
AB3M2
CLxxx
CPxxx
6-070
6-750
See Note 3.
f~I
•
",-j/
= Expected data.
= Actual.
= Input reg data.
Register selection.
Program level failure.
~.
/
,.,.
y
i
,F"'"
I
"'-./
N/A
t<~
,1""'\
",-, /
'.
/
(-....
,/
'"
/
,,_//
-'\
(~
,/
/-----
"
/
('\
'-..
/
\'''-
~/
0
\,-j
E1
"j
c"\
\.
-
"'/
(-
"
"I
./
(~
\
"-.j
'
('\
\
'-..J
;-"
j
'"
/
./"'";
/
!
',,_/
(
(
(
(
(
(
(
(
(/
(-
(
(
(
(
(
(
('
('
(
3705-80 INIT SYMPTOM INDEX - Cont.
Enor
Calle
740N
760N
770N
780N
7AON
Function Tested and Error Descriptioolll
PROG LEV 'N'
Prior to Test
I nst. Executiolll
Expected and Actual
Results in PROG
LEV 'N' Req.
CZ
Latch
Results
Suspected Card
Location(s)
FEALD
Page
FETMM
Page
Comments
OOOS
Level 3 exited to Level 3 instead of Level 4.
N/A
N/A
AB3K2
AB3M2
CLxxx
CPxxx
6-070
6-7S0
See Note 3.
0006
Level 3 exited to Level 5 instead of Level 4.
N/A
N/A
AB3K2
AB3M2
CLxxx
CPxxx
6-070
6-7S0
See Note 3.
xxxx
I/O register interaction testing. Once the basic routines have been run under
program Level 4, the general registers for Level 5 Reg 0 through Level 3 Reg 7 are
tested to verify that the Level 4 programs did not alter the data previously stored
by routine 740N.
AB3K2
AB3M2
CLxxx
CPxxx
0001
Interaction between Level 4 and some other general register.
AB3K2
AB3M2
CLxxx
CPxxx
XXXX
I/O register decode testing Level 4 testing only.
AB3K2
CLxxx
0001
OUT R 1, test reg, IN R2, test reg. Register decode failed. Previously tested under
program Levels 1, 2 and 3.
AB3K2
CLxxx
xxxx
I/O register pattern sensitivity testing. Level 4 testing only.
AB3K2
CLxxx
Register selection. See Note 2 for bit
failures.
0001
OUT R2, test reg, IN R4, test reg. Previously tested under program Levels 1,2, and 3
AB3K2
CLxxx
R3 bytes 0 and 1 bits 0-3 defines the
register in hex. See Note 2.
xxxx
Memory addressing test runs only under program Level 4.
AB3K2
AB4E2
CLxxx
CMxxx
Register selection.
Address exception failure.
0001
Invalid fold occurred at address in R1. Fold occurs when maximum address of 64K
or 2S6K is incremented and wraps back to address zero, and is therefore valid only
if storage size = 64K or 2S6K.
R1 = Address of fold.
AB3K2
AB4E2
CLxxx
CMxxx
0002
Fold failed to occur. Address determined !-ty input X'70' did not cause fold to
address X'OOOO'. Fold should occur if 64K ..lr 2S6K.
R 1 = Address.
R3 = Max address per
X'70'.
AB3K2
AB4E2
CLxxx
CMxxx
0003
Storage size input, Reg X'70' appears to be in error. Address exception was set
prior to reaching the maximum address derived from data in Reg X'70'.
R1 = Address of error.
R3 = Max address derivE d
from X'70'.
N/A
AB3K2
AB4E2
CLxxx
CMxxx
6-770
6-00S
0004
Unexpected Level 1 request bits in Reg X'7E'.
R7
N/A
AB3K2
AB4E2
CLxxx
CMxxx
6-850
OOOS
Failed to set address exception.
R 1 = Address of error.
N/A
AB3K2
AB4E2
CLxxx
CMxxx
6-00S
0006
Levell interrupt but address exception bit is not on. Byte 1 Bit 1 Reg X'7E'.
R3
= X'7E'
N/A
AB3K2
AB4E2
CLxxx
CMxxx
6-8S0
0007
Address exception bit failed to reset. Output to Reg X'77'.
R3 = X'7E'
N/A
AB3K2
CLxxx
6-900
0008
Data failure. The data stored at each location is its own address value. As a result,
R3 equals both the expected data and the address that failed.
R3 = Expected.
RS = Actual.
01
AB3K2
AB4E2
CLxxx
CMxxx
7-020
7-030
0009
Address exception failed to set when attempting to load a halfword from an invalid
address.
R3 = Address of error.
01
AB3K2
AB4E2
CLxxx
CMxxx
6-OS0
R4 = Expected data.
R2 = Actual.
R 1 = Input reg data.
R1 = R2
R 1 = Output reg data.
R2 = R4
R2 = Test pattern.
R3 = Test.reg data.
= X'7E'
N/A
N/A
N/A
N/A
Register selection.
Program level failure. See Note 2 for bit
failures.
6-070
R 1 bytes 0 and 1 bits 0-3 define the
register in hex.
Register selection.
6-120
R 1 byte 0 bits o. Bits 0-3 defines the
register in hex.
Z3705AEA INIT Symptom Index
INIT 160
Z3705AEA INIT Symptom Index
3705-8,OINIT SYMPTOM INDEX -Carita
ROUIine
7AON
OOOA
Address exception error occurred while attempting to load a halfword from a valid
address.
R3 = Address.
OOOB
An address exception error occurred but failed to trap to Levell.
R5
XXXX
Level 4 to Level 5 setup test. A subroutine is used to mask Level 4, unmask
Level 5, reset PCI L4 request, and prepares to exit Level 4.
0001
Outstanding bits are on in either interrupt request Group 1 or 2 (X'76', X'77'),
excluding the timer L3 bit.
7BON
7CON
7FON
SOON
S10N
''\
'-....
)
Expected and Actual
Results in PROG
LEV 'N' Req.
PROG LEV "N'
Prior to Test
I nst. ElGICIIITIJion
Error
Code
/~'"
,
\. ;/
Function Tested and Error Description
Rl
CZ
Latch
Results
= Reg X'1E'
=the 'OR' of regs
Suspected Card
Location{s)
FEALD
Page
FETMM
Page
N/A
AB3K2
AB4E2
CLxxx
CMxxx
6-050
N/A
AB3K2
AB4E2
CLxxx
CMxxx
6-050
AB3M2
CPxxx
N/A
AB3M2
CPxxx
6-810
6-820
INIT 162
Comments
Program level failure.
X'7E' and X'7F'.
XXXX
General register setup exit Level 4.
0001
Same test and error data as listed above under routine 770N.
0002
Exit instruction failed to exit L4.
N/A
N/A
AB3M2
AB3K2
CPxxx
CLxxx
6-070
6-750
Program level.
Failure register selection.
0003
Level 4 exited to Level 1 instead of Level 5.
N/A
N/A
AB3M2
AB3K2
CPxxx
CLxxx
6-070
6-750
See Note 3.
0004
Level 4 exited to Level 2 instead of Level 5.
N/A
N/A
AB3M2
AB3K2
CPxxx
CLxxx
6-070
6-750
See Note 3.
0005
Level 4 exited to Level 3 instead of Level 5.
N/A
N/A
AB3M2
AB3K2
CPxxx
CLxxx
6-070
6-750
See Note 3 .
0006
Level 4 exited to Level 4 instead of Level 5.
N/A
N/A
AB3M2
AB3K2
CPxxx
CLxxx
6-070
6-750
See Note 3.
XXXX
Level 5 to Level 1 setup test. A subroutine is used to mask Level 5 and prepares
to retu rn to Levell.
AB3M2
CPxxx
0001
An "output" instruction is executed under program Level 5 in order to force a
Level 1 interrupt. The output failed to set I/O check Level 1 or mask Level 5 failed.
N/A
N/A
AB3M2
CPxxx
6-050
0002
The I/O check above trapped to Level 2 instead of Level 1.
N/A
N/A
AB3M2
CPxxx
6-070
0003
The I/O check above trapped to Level 3 instead of Level 1.
N/A
N/A
AB3M2
CPxxx
6-070
0004
The I/O check above trapped to Level 4 instead of Levell.
N/A
N/A
AB3M2
CPxxx
6-070
XXXX
I/O register interaction testing. Once the basic routines have been run under program
Levels 2, 3,4, and 5, the program makes an additional pass under program Level 1.
Then the general registers for Level 3 Reg 0 through Level 5 Reg 7 are tested for any
interaction.
AB3K2
CLxxx
Register selection. See Note 2 for bi,t
failures.
0001
Interaction did occur.
N/A
AB3K2
CLxxx
R 1 bytes 0 and 1 bits 0-3 define the register
in hex.
XXXX
Reset Level 1 in/out check L 1 test.
0001
Output to Reg X'77' with data X'0004' failed to reset check.
N/A
AB3G2
AB3L2
CQOO4
CU014
~,
"
,
I
./
0
\",j
1'''''1
J
\.. ./
R4 = Expected Data.
R2 = Actual.
R1 = I nput reg data.
/.r'",\
\.
./
)
\../
~,
--~
\., j
'-, ./
R1
,1''\
"
"
./
\,
r~
I
\. ./
\
/
(
"-"
./
,
"-.j
= X'7E'
(4f"',,\
'-. ...1
r",
"-.j
0
",~
""",
j
",j
'"
.,
Program level failure.
6-900
Output X'77' failure.
I/O check latch failure.
r''''
\ . ,_~./'
.
"-...- ../
'" ,...."".
'
"-.../
.
(
(
(
(
(
(
(
(
(
(
«
(
(
(
(
c
(
(
(
(
(
(
(
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
XXON
Error
Code
Function Tested and Error Oe.ci _ _
PROG LEV 'N'
PrMlr to Test
Imt. Execution
Expected and Actual
Results in PROG
LEV 'N' Req.
R 1 should equal R3.
R1 = Actual.
R3 = Expected.
N/A
N/A
N/A
R1 should equal R3.
01
AB4J2
DFxxx
6-220
'X' Byte failure.
01
AB3G2
AB3M2
CQ004
CPxxx
6-900
Output X'77' failure.
Program level failure.
CZ
Latch
Results
Suspected Card
Location(s)
FEALO
Page
FETMM
Page
Comments
1001
Routine continuity error. At the start of a given routine R1 is loaded with a value
equal to the given routine number, this value is then compared to a "current
routine number" which is read from a table. As a result, should a wild branch(s)
occur, this trap should catch it.
N/A
1002
Subroutine to test Byte X. Since the fullword instructions have not been tested
during the first two passes through this subroutine, the data in R1 is shifted right
two places and tlren tested using XOR halfword.
R1
R3
2001
Level 5 to Level 1 interrupt handler. Unable to reset Level 1 request bits. Output
to Reg X'77' with data X'COOC'.
R1
2002
Exit from Level 1 handler failed. Previously tested.
N/A
N/A
N/A
2003
While running under program Level 2, an unexpected Level 1 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2004
While running under program Level 2, an unexpected Level 2 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2005
While running under program Level 2, an unexpected Level 3 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2006
While running under program Level 2, an unexpected Level 4 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2008
While running under Level 3, an unexpected Level 1 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2009
While running under program Level 3, an unexpected Level 2 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
200A
While running under program Level 3, an unexpected Level 3 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
200B
While running under program Level 3, an unexpected Level 4 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2000
While running under program Level 4, an unexpected Level 1 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
200E
While running under program Level 4, an unexpected Level 2 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
200F
While running under program Level 4, an unexpected Level 3 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2010
While running under program Level 4, an unexpected Level 4 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2012
While running under program Level 5, an unexpected Level 2 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2013
While running under program Level 5, an unexpected Level 3 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2014
While running under program Level 5, an unexpected Level 4 interrupt occurred.
Second pass through Level 1 after running test under program Levels 2, 3, 4, and 5.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2015
Unexpected Level 1 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2016
Unexpected Level 2 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2017
Unexpected Level 3 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2018
Unexpected Level 4 interrupt occurred.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2019
Program Level 5 became the active program level while attempting to run under
either program Level 1,2,3, or 4. To determine which level should be active, look
at the data in display register B: Bits 1.4 through 1.7 define the program level under
test (see page 3-010).
N/A
N/A
N/A
N/A
6-070
See Note 3.
2020
While running under program Level 5, a Level 1 interrupt occurred and the I/O check
bit was not on.
N/A
N/A
N/A
N/A
6-070
See Note 3.
2021
Subroutine to handle timer Level 3 interrupts. An attempt to reset the timer
Bit (X'7F' 1.5) failed. Output X'77' with data X'0040' was used to attempt the
reset.
N/A
A-B3L2
CP007
= Actual.
= Expected.
N/A
R7
= Reg X'7E'
= EXT Reg X'7F'.
6-070
See Note 3.
Z3705AEA INIT Symptom Index
INIT 164
3705-80 INIT SYMPTOM INDEX - Cont.
Routine
Error
Code
Z3705AEA INIT Symptom Index
Function Tested and Error Desc:ripIJiaI
cz
Expected and Actual
Results in PROG
LEV 'N' Req.
PROG LEV 'N'
Prior to Test
Inst. Execution
Suspected Card
Location(s)
Latch
Results
FETMM
Page
FEALD
Page
INIT 166
Comments
NOTES:
Note 1. The error reporting subroutine uses registers R5 and R7. As a result, if you want to observe the data values expressed for a given error code, record the data in R5 and R7 at the initial out stop.
Note 2. Use the following chart to determine the suspected card or cards for all ALU or data sensitive errors. The card should be identified from the failing bits in the register as defined under "expected results".
Once a given instruction is tested for a basic ALU and CZ Latch setting, then any errors that follow are due to data sensitivity.
BITS IN ERROR
CARD
LOGIC PAGE
Byte X, Bits P, 6, 7
A-B4J2
DFXXX
A-B4K2
A-B4L2
A-B4M2
A-B4N2
A-B4P2
A-B4Q2
DGXXX
DHXXX
DJXXX
DKXXX
DLXXX
DMXXX
Byte 0,
Byte 0,
Byte 0,
Byte 1,
Byte 1,
Byte 1,
Note 3. This error cannot be looped using the INIT loop on error option.
/'
"'"
'~
'-
y
0
I"~
[0
/
'"
/
()
"
\..
!~
'-..j
,"""'~
'-.,j
0:,/
'"
:j
"
'...
i~
\"j
(~
"--.j
Bits
Bits
Bits
Bits
Bits
Bits
P, 0, 1
2, 3, 4
5, 6, 7
P, 0, 1
2,3,4
5,6,7
("'.,
0,
\.
.\..~
)
",
,E~,
,
"
j
(~
"
,,-j
C~
,j
(~
'-,
./
"
\"
<'"')
",j
(~
",-, )
,~
''',,/
('"'".
,
\..j
('~
\
'-..,j
r
'-.. /
,-(~
(
,:
,-,j
r,\
\.J
\.,--
/'
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
REMOTE PROGRAM LOADER
The 3705-80 includes either a remote program loader (RPL) alone or a remote program loader and either
a type 1 or a type 4 channel adapter (CA). The RPL consists of a ROS bootstrap program, an IBM
diskette storage device, and a diskette controller that together provide a remote IPL capability for the
3705-80.
The contents of the RPL diskette is shown in the following chart. Note that while using the RPL, the
ability to write on the diskette is disabled.
Track
Content
Description
o
Load Program 1
(1)
(2)
1-4
(3705-80)
Initial Test
Program that is transferred to main storage by the ROS boot-strap to control further
loading of programs.
Defines the local/ remote communication link for LPG2 (lPL configuration data set).
A CCU diagnostic exerciser.
5
(3705-80)
(Reserved)
6-7
Load Program 2
(LPG2)
8
1FT Loader/CDS
Writer
9
Diagnostic Control Monitor
10
Hardware Configuration Data
Internal Functional Tests (1FT)
11
Load Program 1
Duplicate of track O.
12-13
Load Program 2
Duplicate of tracks 6 and 7.
14-16
(Reserved)
17
Subroutine
(LPG1 Dump)
18
Reserved
19-76
1FT
Controls the local/remote
communication link for loading and dumping.
Defines the hardware
configuration for the
internal functional
tests.
Internal Functional Tests.
Remote Program Loader Diagnostic Procedures
RPL DIAG 001
Remote Program Loader Diagnostic Procedures
IPL 3706-80 (RPL Featurel
RPL DIAG 002
RPL Diagnostic Checkout and Remote IPL
ROS bootstrep loads.
Pheses 1 and 2 execute
(same as locall. ,
No or do not know
Indentify hardware
configuration using
procedure in CDS
section.
Yes
ROS bootstrap phase 3.
1. Tests diskette storage
drive and controller.
2. Loads LPG1.
Go to RPL diagnostic run
procedure MAP 0002.
Initial Test cannot be optioned
out. It must run successfully.
Yes
Go to CDS writer
program procedure
RPL MAP 0002
Symptom index for Initial Test,
DCM, and LFTs are located in
their respective 3705-80 sections
in this MIM volume.
Transfer high SK
of main storage to
tracks 15 and 16.
No
Yes
Load Initial Test from
diskette tracks 1-5 and
run to completion.
Load LPG2 from
tracks 6 and 7 to
high SK.
No or do not know
Yes
Read end
axecute IFTs.
See to RPL MAP 0007.
LPG2 controls dumping
to the host via the host
link.
Yes
Go to remote IPL
CDS prodedure
RPL MAP 0005.
Go to IPL
procedure
RPL MAP 0001.
Re·IPL for normel
operetlon.
Yes
LPG2 controls loading
the control program
from the host via the
host link.
Notes:
1. Diskette shipped with machine contains
the necessary CDS to run the IFTs.
2. Diskette shipped with machine must be
configured with remote IPL CDS at time
of installation.
3. ROS failure indicated by IPL PHASE 3.
PROGRAM STOP, HARD STOP, LOAD
and TEST light on. Certain failures cause
ROS to retry and may cause a 3 minute
delay in prasenting stop indications.
DCM loaded and ready
for 1FT select. See to
1FT section.
Notes:
1. Set the STORAGE ADDRESS/REGISTER
DATA switches to X'OBBBB'.
2. Sat the STORAGE ADDRESS/REGISTER
DATA switchel to X'ODDDD' and the
DISPLAY/FUNCTION SELECT switch to
STORAGE ADDRESS.
Yes
See Initial Test.
Symptom index
IN IT section.
, ...
/
''',)
r~
'- /
r"''J
I
\'-..,
,co
/'
,~;-
(-',
/-~
'-.
/
I
',-
(-~
'"j
r"
\..j
(-~
"-j
(cc"
\...J
0
\-..j
(""
',,-
/
/
"i
'--.j
r~\
~ )
r-'~
'-.....y
(~,
\..../
(',,\
(~
~.
0
,r\
(
( ~ (,
(
(/ (
(
(
(
(
(
(
(
("
(
IPL PROCEDURE
PAGE
(,
MAP 0001-1
(
(
(
(
C
1
(
(
(
(
(\ (
f
(' (-
(~
MAP 0001-2
J
IPL PROCEDURE
1 OF 3
(' - ('-
C~,:
PAGE 2 OF 3
ENTRY POINTS
EXIT POINTS
FROM
ENTER THIS MAP
EXIT THIS MAP
TO
MAP
NUMBER
ENTRY
POINT
PAGE
NUMBER
MAP
NUMBER
ENTRY
POINT
0002
0003
0003
0004
0005
A
A
A
A
A
PAGE
NUMBER
STEP
NUMBER
No entries in this table
3
1
2
3
1
STEP
NUMBER
031
004
020
030
003
007
DO YOU WISH TO RUN THE PANEL LINE TEST?
012
IS THE IPL PHASE 1, 2, OR 3 LIGHTS ACTIVE?
Y N
YN
008
DO YOU ANTICIPATE OR DESIRE A STORAGE
DUMP?
013
DOES DISPLAY A CONTAIN X'OCXX'7
Y N
YN
014
DOES DISPLAY A CONTAIN X'ECXX'7
009
(Entry Point B)
Y N
015
DOES DISPLAY A AND B CONTAIN X'FFFF7
1.Set ENABLE/DISABLE switch(s) to DISABLE.
2.Set the DISPLAY/FUNCTION SELECT switch to
REGISTER ADDRESS.
3.Press RESET.
4.Press LOAD.
001
(Entry Point A)
The remote IPL CDS and the hardware CDS must be
configured properly to use the diskette media successfully.
HAVE THE CONFIGURATION DATA SETS (CDS) BEEN
CONFIGURED PROPERLY?
Y N
016
DOES DISPLAY B CONTAIN X'8XXX'7
Y N
The normal run time for ROS, LPG1, Initial test, and
LPG2 is approximately 30 seconds. ROS tries to
recover from errors that may cause a 3-minute delay
before an error stop occurs.
Y N
002
DO YOU WISH TO UPDATE THE HARDWARE
CDS?
017
See Initial Test Symptom Index, INIT
Section.
If the DISPLAY B data does not compare
with any of the initial test routines, refer to
Volume 2 and check out the CE panel.
DOES DISPLAY A CONTAIN X'FCXX'?
YN
Y N
010
DOES DISPLAY A CONTAIN X'CCXX'?
003
To update Remote IPL CDS Go To Map 0005, Entry Point A.
018
See DCM Symptom Index, DCM Section.
Y N
019
The DCM is the active program. Go to the DCM
Section.
011
IS THE 3705 LOOPING?
004
Go To Map 0003, Entry Point A.
Y N
020
CDS Writer Program is the active program.
Go To Map 0003, Entry Point A.
005
ARE THE DIAGNOSTICS TO BE RUN?
Y N
021
DOES DISPLAY B CONTAIN X'80XX'?
006
DO YOU WISH TO UPDATE OR ZAP A PROGRAM?
Y N
YN
022
1FT Diskette Loader is the active program.
See the 1FT Diskette Loader Symptom Index, this
section.
MAP 0001-1
MAP 0001-2
Remate Program Loader Diagnostic Procedures
RPLDIAG 010
('
"i
Remote Program Loader Diagnostic Procedures
ABO
E F G H K L IPL PROCEDURE
222 2 2 2
1 1 2
RPLDIAG 020
MAP 0001-3
PAGE 3 OF 3
023
029
See the DCM Symptom Index, DCM Section.
Go to the panel line test procedure, PNL LN TEST
Section.
024
030
See ROS Symptom Index.
Go To Map 0004, Entry Point .!\.
025
031
Go to Load Program 2 (LPG2) Symptom Index,
this section.
Go To Map 0002, Entry Point A.
026
Load Program (LPG 1) is the Active Program.
Go to LPG1 Symptom Index, MAP 0008.
027
Load Program 2 is active. See LPG2 Symptom Index in
this section to determine meaning of display codes.
028
Set the STORAGE ADDRESS REGISTER DATA switches to
X'OBBBB'.
Go to Page 2, Step 009, Entry Point B.
MAP 0001-3
'-
)
/
:1
0'.
(\
./
~./
!'~
\",/
,:<
/~
',- . .J
(, > r",
r",
'",j
~)
I~,
.,-
..~/
/~
'- j
,
I
~l
"
'-"j
(''1
(-~
~j
\"../J
~;
'..,j
,/'"
"
~
i
'-"._..../
i
(')
./
(
(
(
(
DIAGNOSTIC RUN PROCEDURE
PAGE
1 OF
«
(
A
c
(
(
(
(
(
(
('
(
('
('
MAP 0002-1
1
001
Set ENABLE/DISABLE switch(s) to DISABLE.
005
Control has been passed to the DCM and it is ready for an
1FT request. See 1FT Section.
Set the DISPLAY/FUNCTION SELECT switch to the
STORAGE ADDRESS position.
Set the STORAGE ADDRESS/REGISTER DATA switches
to X'ODDDD'.
Press RESET. Press LOAD, and then press the panel
INTERRUPT pushbutton.
The IPL sequence should be active at this point. During
IPL Phase 3, ROS reads load program 1 from diskette and
passes control to LPG1. LPG1 determines the type of load
(NCP, with or without dump option, or diagnostics) being
requested via either the CE panel or IPL register X'6B'.
LPG 1 will attempt to read the appropriate program from
diskette and pass control to it. If errors occur, while
attempting to read either initial test or the 1FT diskette
loader from diskette or while the dump option is active,
LPG 1 defaults to a LPG2 load.
Normal run time for a ROS/LPG1 /Initial Test/1FT diskette
loader is approximately 30 seconds.
Note: Under abnormal conditions, such as no index pulses
or diskette media in the diskette drive, ROS attempts to
retry. This may cause a 3- minute delay before an error
stop occurs.
DISPLAY REGISTER A AND B X'FFFF'?
=
Y N
002
DISPLAY REGISTER B
Y N
=X'8XXX'?
003
See Initial test symptom index. If the DISPLAY B
data does not compare with any of the initial test
routines, refer to Volume 2 and check out the CE
Panel (CTRL PNL Section).
004
See DCM Symptom Index (DCM Section).
A
MAP 0002-1
Remote Program Loader Diagnostic Procedures
RPL DIAG 030
Remote Program Loader Diagnostic Procedures
A
CDS WRITER PROGRAM PROCEDURE
MAP 0003-1
B
CDS WRITER PROGRAM
1
PAGE
1 OF 2
APL DIAG 040
MAP 0003-2
PAGE 2 OF 2
001
(Entry Point A)
003
The CDS Writer is the active program.
DISPLAY REGISTER B = X'3001'?
Install the write enable jumper.
Y N
3705-80 - Pin 01A-B1G2S02 to ground.
007
Change the hardware CDS by altering storage as required.
Only those bytes that are affected need be changed.
Refer to CDS Section for definition.
The CDS are located at X'FOO' plus (+) the value of the
byte location that is specified on the individual CDS cards.
004
The first function of the CDS writer program is to test
the write capability of the remote loader adapter. A test
pattern is written onto track X'OF' and then read back to
verify the write. The code X'3001' in DISPLAY B
indicates that the write test was good. The CDS Writer
is waiting a command.
See CDS Writer Symptom Index (this section).
Set ENABLE/DISABLE switch(s) to DISABLE.
Set the DISPLAY/FUNCTION SELECT switch to the
REGISTER ADDRESS position.
Set the STORAGE ADDRESS/REGISTER DATA switches
to X'ODDDD'.
005
Set the DISPLAY/FUNCTION
FUNCTION 2.
1. Press RESET.
2. Press LOAD.
3. Press the panel INTERRUPT button.
SELECT
switch
It is possible to transfer the current hardware CDS from
one diskette to another by changing the diskette medias at
this point.
When ready to write the new CDS, set the STORAGE
ADDRESS/ REGISTER DATA switches to X'OEEEE'.
Press START~
DISPLAY REGISTER B = X'302F'?
to
Y N
Set the STORAGE ADDRESS/REGISTER DATA switches
to X'00002'.
The IPL sequence should be active at this point. During
IPL Phase 3, ROS will read load program 1 from diskette
and pass control to LPG 1. LPG l' s determines the type of
load (NCP, with or without dump option, or diagnostics)
being requested via either the CE panel or IPL register
X'6B'. LPG1 attempts to read the appropriate program
from diskette and pass control to it. If errors occur, while
attempting to read either initial test or the 1FT diskette
loader from diskette or while the dump option is active,
LPG1 will default to a LPG2 load.
008
See CDS Writer Symptom Index (this section).
Press START.
009
Indicates that the hardware CDS has been written on track
X'OA' without errors.
ANY MORE HARDWARE CDS TO BE CHANGED?
(Entry Point B)
The hardware CDS will be read into storage from track
X'OA'.
DISPLAY REGISTER B = X'3024'?
Y N
Normal run time for a ROS/LPG1 /initial test/1FT diskette
loader is approximately 30 seconds.
NOTE: Under abnormal conditions, such as no index
pulses or diskette media in the diskette drive, ROS will
attempt to retry. This may cause a 3-minute delay before
an error stop occurs.
Y N
010
Re!llove the writeenableiumper.
Re-1PL.
006
See CDS Writer Symptom Index (this section).
011
Press$TART.
GotoPage.1; Step 006; Entry PointB.
DISPLAY REGISTER A=X'ECXX'?
Y N
002
See CDS Writer Symptom Index (this section).
2
A
,.
"
./
B
~
'"
)
r-~,
"
/
,~
('\
'''-j
\,/
I"'"~1
•
".
/
r
\, ./
MAP 0003-2
('
r~,,\
".
j
'.
/
"
/
./
".
'- . /
/
r'~
I
'-...,./
(-'"
"
/
,
j
""\
'---
/
I'
'.
'''
./
\
/
'-
-",
(""
./
'.
)
'',
/
"
--
./
' ......-~/
(
(
(
(
(
(
PROGRAM ZAPPER PROCEDURE
PAGE
(
(
(
(
(
A
(
MAP 0004-1
c
(
003
The CDS Writer is the active program.
DISPLAY REGISTER B X'3001'?
Install the write enable jumper.
YN
=
3705-80 - Pin 01 A- B 1G2S02 to ground.
004
The first function of the CDS writer program is to test
the write capability of the remote loader adapter. A test
pattern is written onto track X'OF' and then read back to
verify the write. The code X'3001' in DISPLAY B
indicates that the write test was good. The CDS Writer
is waiting a command.
See CDS Writer Symptom Index (this section).
Set ENABLE/DISABLE switch(s) to DISABLE.
Set the DISPLAY/FUNCTION SELECT switch to the
REGISTER ADDRESS position.
Set the STORAGE ADDRESS/REGISTER DATA switches
to X'ODDDD'.
Normal run time for a ROS/lPG1 /Initial Test/1FT diskette
loader is approximately 30 seconds.
Note: Under abnormal conditions, such as no index pulses
or diskette media in the diskette drive, ROS will attempt to
retry. This may cause a 3-minute delay before an error
stop occurs.
(
(
(
(
(
MAP 0004-2
PAGE 2 OF 2
001
(Entry Point A)
The IPL sequence should be active at this point. During
IPL Phase 3, ROS will read load program 1 from diskette
and pass control to LPG 1. It is LPG l' s function to
determine the type of load (NCP, with or without dump
option, or diagnostics) being requested via either the CE
panel or IPL register X'6B'. LPG1 will attempt to read the
appropriate program from diskette and pass control to it.
If errors occur, while attempting to read either initial test or
the 1FT diskette loader from diskette or while the dump
option is active, LPG 1 will default to a LPG2 load.
(
PROGRAM ZAPPER PROCEDURE
B
1
1 OF 2
Press RESET. Press LOAD, and then press the panel
INTERRUPT button.
(
009
The given program has been read into storage. Apply the
program Zap (by altering storage) per given instructions.
When ready to write the given program back onto diskette,
set the STORAGE ADDRESS/REGISTER DATA switches
to X'OEEEE'.
Press START.
DISPLAY REGISTER B X'303F'?
=
Y N
010
See CDS Writer Symptom Index (this section).
011
005
Set the DISPLAY /FUNCTION SELECT switch to
FUNCTION 2.
Set the STORAGE ADDRESS/REGISTER DATA switches
to X'0003'.
Press START.
(Entry Point B)
DISPLAY REGISTER B = X'3031'?
Indicates that the given program has been written onto
diskette without errors.
ANY MORE PROGRAM ZAP'S TO BE APPLIED?
Y N
012
Remove the write enable jumper.
Re-lPL
013
Press START.
Go to Page 1, Step 005, Entry Point B.
Y N
006
See CDS Writer Symptom Index (this section).
007
The Program Zapper is active.
Enter
the
program
ID
into
the
STORAGE
ADDRESS/REGISTER DATA switches
Note: The program ID will be supplied with the Zap
instructions.
DISPLAY REGISTER A = X'ECXX'?
Y N
002
See CDS Writer Symptom Index (this section).
Set the DISPLAY/FUNCTION SELECT switch to position. 2.
Press START.
DISPLAY REGISTER B X'3034'?
YN
=
008
See CDS Writer Symptom Index (this section).
A
2
B
MAPOQ04,.1
MAP 0004-2
Remote Program Loader Diagnostic Procedures
RPl DIAG 050
Remote Program Loader Diagnostic Procedures
A
REMOTE IPl CDS PROCEDURE
PAGE
B
1
MAP 0005-1
1 OF 2
001
(Entry Point A)
003
The CDS Writer is the active program.
DISPLAY REGISTER B = X'3001'?
Install the write enable jumper.
Y N
3705-80 - Pin 01A-81G2S02 to ground.
Set the DISPLAY/FUNCTION SELECT switch to the
REGISTER ADDRESS position.
Set the STORAGE ADDRESS/REGISTER DATA switches
(keys) to X'ODDDD'.
009
The program LPG 1 has been read into storage.
See Table 2 of LPG2 Symptom Index and Remote IPL CDS
for definition and storage MAP of the 'Remote IPL CDS'
(this section). Remote IPL CDS information can be added
or changed by altering storage.
When ready to write the given program back onto diskette,
set the STORAGE ADDRESS/REGISTER DATA switches
to X'OEEEE'.
Press START.
DISPLAY REGISTER B = X'303F'?
Y N
010
See CDS Writer Symptom Index (this section).
005
Set the DISPLAY /FUNCTION SELECT switch to
FUNCTION 2.
Set the STORAGE ADDRESS/REGISTER DATA switches
to X'0003'.
Press START.
Press RESET. Press LOAD, and then press the panel
INTERRUPT button.
The IPL sequence should be active at this point. During
IPL Phase 3, ROS will read load program 1 from diskette
and pass control to LPG 1. LPG 1 determines the type of
load (NCP, with or without dump option, or diagnostics)
being requested via either the CE panel or IPL register
X'68'. LPGl attempts to read the appropriate program
from diskette and pass control to it. If errors occur, while
attempting to read either initial test or the 1FT diskette
loader from diskette or while the dump option· is active,
LPG1 will default to a LPG2 load.
MAP 0005-2
PAGE 2 OF 2
1
004
The first function of the CDS writer program is to test
the write capability of the remote loader adapter. A test
pattern is written onto track X'OF' and then read back to
verify the write. The code X'3001' in DISPLAY 8
indicates that the write test was good. The CDS Writer
is waiting a command.
See CDS Writer Symptom Index (this section).
Set ENABLE/DISABLE switch(s) to DISABLE.
REMOTE IPl CDS PROCEDURE
RPLDIAG 060'
011
Indicates that the given program has been written onto
diskette without errors.
ANY MORE PROGRAM ZAP'S TO BE APPLIED?
Y N
(Entry Point B)
012
Remove the write enable jumper.
DISPLAY REGISTER B = X'3031'?
Y N
Re~IPL.
013
Press START.
Go toPaga 1, Step 005, Entry Point B.
006
See CDS Writer Symptom Index (this section).
Normal run time for a ROS/LPGl /initial test/1FT diskette
loader is approximately 30 seconds.
Note: Under abnormal conditions, such as no index pulses
or diskette media in the disk. drive, ROS attempts to retry.
This may cause a 3-minute delay before an error stop
occurs.
007
The Program Zapper is active.
Set the STORAGE ADDRESS/REGISTER DATA switches
toX-00COl' .
Set the DISPLAY lFUNCTION SELECT switch to.position 2.
Press start.
DISPLAY REGISTER B X'3034'?
DISPLAY REGISTER A= X'ECXX'?
Y N
=
Y N
002
See CDS Writer Symptom Index (this section).
008
See CDS Writer Symptom Index in this .section..
2
8
A
!~
"
'\
/
~
/
"
0
"-
(1
"-- --/
r'\
t"~
~/
"-- j
MAPOOOS;.l
r '\
"~J
"
"
"
./
'-
.'
/
"
..
''\,
/
~.- .....
'- . /
'-..~
,
"
./
r-""
~/
MAP 0005-2
('
.'.
./
,
J
/
,,~
/
"-~
1'"'1
"---~
-
r~
"-- ./
..
'\
!
"'-.. ./
'--~
- - - - --_.
(
(
(
(
~
-------
(
(
(
F
REMOTE LOADER ROS INDEX
PAGE
(
(-
(
(
\
(
C
(:
-
(
{
K
1
MAP 0006-1
(
(
(~
(-
(
(
REMOTE LOADER ROS INDEX
(
'\
(\ (
-
,
(-
-',
(-\
H J
1 1
(-
('
(~,
.
/
MAP 0006-2
PAGE 2 OF 4
1 OF 4
001
(Entry Point A)
006
CONTINUOUS READ OF LOAD PROGRAM 1 FROM
TRACK ZERO?
(Step 012 continued)
into storage location X'036E'.
D. Store address X' 1000' into storage location X'0600'.
014
CONTINUOUS READ OF ANY TRACK EXCEPT X'06'
OR X'OC'.
Y N
C.E. aids
E.
Use the following to get to the correct procedure or
documentation:
DESCRI PTION?
Y N
002
SUPPORTING DOCUMENTATION?
Y N
007
CONTINUOUS READ OF LOAD PROGRAM 1 FROM
ALTERNATE TRACK?
Y N
008
CONTINUOUS READ OF ANY GIVEN TRACK,
EXCEPT X'06', X'09' OR X'OC'?
Store a branch instruction X' A809' into storage
location X'03F2'.
F. Store a NOP instruction X' A800'
locations X'03DA' and X'03FO'.
into
A. Refer to the ROS loader program listing. Set up for
a load address compare stop at location X'03EC'.
Press LOAD and wait for the address compare stop.
storage
G. Store the desired track number X'OOOO' - X'004C'
(with the above exceptions) into storage location
X'0616'.
B.
Store a branch instruction X' A809' into storage
location X'03F2'.
C.
Store a NOP instruction X' A800' into storage
locations X'03DA' and X'03FO'.
Y N
003
CONTROL PANEL SETUP?
009
DETERMINE THE VERSION
LEVEL
PROGRAMS ON ANY GIVEN TRACK?
Y N
004
ERROR HANDLING PROCEDURES?
Y N
Y N
005
LOOP ON
TEST?
REMOTE
OF
010
CONTINUOUS READ OF EITHER TRACK
X'06', X'09' OR TRACK X'OC'?
Y N
LOADER ADAPTER
Y N
011
There are no more CE Aids listed in this
MAP.
012
CONTINUOUS READ OF EITHER TRACK X'06'
ORX'OC'.
A. The above listed tracks contain programs
which would normally be loaded into storage
starting at location X'OOOO' and would
destroy the ROS code. In order to allow a
continuous read, the load point will be
modified to start at X'1 000' .
B. Refer to the ROS program listing. Set up
for a load address compare stop at location
X'03EC'. Press LOAD and wait for address
compare stop.
C. Store a load halfword instruction X'21 01'
(Step 012 continues)
44433
ABC 0 E F
H. Set up for a load address compare stop at location
X'03D6'. This will cause an address compare stop if
any
errors
occur.
--FOR
CONTINUOUS
LOOP--bypass this step.
I. Press START.
given track.
Program should continuously read
013
DETERMINE THE VERSION/LEVEL OF PROGRAMS ON
ANY GIVEN DISKETTE.
A. Refer to the ROS program listing. Set up for a load
address compare stop at location X'03EC'. Press LOAD
and wait for address compare stop.
B. Store the desired track number (X'OOOO' - X'004C')
into storage location X'0616'.
C. Store a branch instruction X'885B' into storage location
X'03B6'. This patch will terminate the read after the
track record block is read from diskette.
D. Set up for a load address compare stop at location
X'0368'. Press START. When address compare stop
occurs, display storage location X'066E'. It will contain
the version/level in EBCDIC. e.g., V /L=01 would equal
X'FOF1'. In addition the program ZAP count can be
determined by displaying the storage location X'0676'.
Note: If the given track did not have a valid V /L at creation
time, the V / L will equal X' FFF1' .
D. Store the desired track number X'OOOO' - X'004C'
(with the above exceptions) into storage location
X'0616'.
E. Set up for a load address compare stop at location
X'03D6'. This will cause an address compare stop if
any
errors
occur.
--FOR
CONTINUOUS
LOOP--bypass this step.
F. Press START.
given track.
Program should continuously read
015
(Entry Point BC)
CONTINUOUS READ OF LOAD PROGRAM 1 FROM
ALTERNATE TRACKS
A. Refer to the ROS program listing. If the ROS code is
not already loaded in storage, setup for a load address
compare stop at location X'01 DE' and press LOAD. If
ROS is already in storage, set the L 1 IAR to X'01 DE'.
B. Store a NOP instruction X' A800' into storage location
X'03F2'.
C. Store a clear REG instruction X' 11 C8' into storage
location X'03E8'. This will set the track seek number to
zero on alternate passes.
D.Store a branch instruction X' A813' into storage location
X'03F8'.
(Step 015 continues)
322 2
GHJ K
MAP 0006-2
MAP 0006-1
Remote Program Loader Diagnostic Procedures
RPL DIAG 070
(--
Remote P'rogram Loader Diagnostic Procedures
G
1
REMOTE LOADER ROS INDEX
oE
1 1
MAP 0006-3
ABC
REMOTE LOADER ROS INDEX
111
PAGE 3 OF 4
(Step 015 continued)
E. Set up for a load address compare stop at location
X'03D6'. This will cause an address compare stop if
any errors occur.
F. Press START. Program should continuously read
load program 1 from first track zero and then track 11.
Refer to the ROS flowchart on previous pages.
MAP 0006-4
PAGE 4 OF 4
(Step 018 continued)
4. The initial retry count is 18. If the total number
of retries of Band / or C exceeds 18, a hardstop
will be invoked via an output X'70'. Reg 4
(X'04') and reg 6 (X'06') are used to help trace
progress thru ROS.
017
LOOP ON REMOTE PROGRAM LOADER TEST.
A. Refer to the ROS loader program listing. If the ROS
code is already loaded in storage, setup for a load
address compare stop at location X'OOEC' and press
LOAD. If ROS is already in storage, set the L1 IAR to
X'OOEC'.
(Step 021 continued)
ARI
ST*
lR I
BB
BCl
BZl
OR I
THM
lH
STH
019
B
XR
IN*
A. Refer to the ROS program listing. If the ROS code is
not already loaded in storage, setup for a load address
compare stop at location X'01 DE' and press LOAD. If
ROS is already in storage, set the L1 IAR to X'01 DE'.
B.
Store a branch instruction (X' A809') into storage
location X'03F2'.
C. Store a NOP instruction (X' A800') into storage location
X'03DA'.
B. Store a (IN R4,IAR) instruction X'041C' into storage
location X'01 E2'.
Special Note: Assuming that all the adapter tests
run without error, the above patch will allow the
ROS code to move the head out to track 77 and then
loop back to run the adapter test again.
I * = used but not I
thoroughly
I
I
+I _______________
tested l ___ +I
X' 68, 69, 6A, 76, 79,
x' 68,
69, 6A, 77 1
and the level 1 local
Store Regs X' OO-071
SUPPORTING DOCUMENTATION
2. Data Path
D. Store a branch instruction X' A8ED'into storage
location X'01 FO'.
2. FLOW CHART - A general flowchart, showing the
logical flow of the ROS Remote Loader adapter testing
and read functions is in the beginning of the ALDs on
page GE860 (3705-80).
Setup for an address compare stop at location
X'03D6'. This will cause an address compare stop if
any errors occur.
3. SIMULATION RUN - A ROS simulation run is in the
ALD's on page GE860 (3705-80). The simulation run
is a listing, in instruction execution order, showing the
contents of the general registers used during the
instruction test portion of the ROS. This simulation
run may be used in conjunction with instruction step
procedures as a check for correct operation.
F. Press START.
Program should loop without
stopping, unless errors occur. If program stops, refer
to the ROS flowcharts on other pages.
018
F. PRESS START.
Program should continuously read
LOAD PROGRAM 1 from track zero. If the program
stops, refer to the ROS MAPS on other pages.
OUT*
020
1. PROGRAM LISTING -A listing of the ROS code is in
the ALD's beginning on page GE800 (3705-80).
D. Store a NOP instruction (X' A800') into storage location
X'03FO'.
Setup for a load address compare stop at ,location
X'03D6'. This will cause an address compare stop if any
errors occur. --FOR CONTINUOUS LOOP--bypass this
step.
During a normal IPL, the control panel MODE
SELECT switch and the DIAGNOSTIC CONTROL
switch must both be set to PROCESS.
C.
Store a clear register instruction X'66C8' into
storage location X'01 EE'.
E.
E.
1.
+-------------------+
7C, 70, 7E' and th~
Level 1 local store Reg
X' OO-071
CONTROL PANEL SETUP
016
CONTINUOUS READ OF LOAD PROGRAM 1 FROM
TRACK ZERO.
RPL DIAG 080
3. The SDLC CRC hardware assist register X'7C'.
4. Remote Loader adapter functions tested are:
A.
B.
C.
D.
E.
PDR register
Adapter reset
Diskette speed
Head access and motor protect
Head Engage/Disengage & Media Protection.
5. Read Data - The actual Read testing is accomplished
while reading LPG1 from Diskette.
ERROR HANDLING PROCEDURES
021
1. If an error is detected during the instruction testing or
the Remote Loader adapter initialization code, a hardstop
will be invoked via an output X'70'.
2. If an error is detected during the Remote Loader Adapter
test, a branch to 'Retry' will occur. If the retry count is
not exhausted, a branch to 'IGAR141' will invoke a retry.
DESCRIPTION
The ROS code is a 1024 byte program that is used to read
LPG1 from the Remote Loader Diskette. Before the ROS
program attempts to read LPG 1, it checks the functions
and instructions it needs to complete the read.
The functions tested are:
3. If an error is detected while attempting to read LPG1
from the diskette and the retry count is not exhausted,
the track assignment will be changed and a read retry
will occur.
(Step 018 continues)
1.
INSTRUCTIONS - Only the portion of the instruction
set needed to complete the read of LPG 1 from diskette is
tested. The instructions tested are:
(Step 021 continues)
MAP 0006-3
(
, /
,
i
I~
"/
0
MAP 0006-4
/"'''''
i
I
\/
(
(
(
(
(
(
(
(
(
MAP 0007-1
ERROR ANALYSIS PROCEDURES
PAGE
(
(
(.
(
(' (
('
ERROR ANALYSIS PROCEDURES
F
1
MAP 0007-2
PAGE 2 OF 6
1 OF 6
(Step 011 continued)
ENTRY POINTS
EXIT POINTS
FROM
ENTER THIS MAP
EXIT THIS MAP
TO
MAP
NUMBER
ENTRY
POINT
PAGE
NUMBER
MAP
NUMBER
ENTRY
POINT
0008
BA
PAGE
NUMBER
STEP
NUMBER
No entries in this table
3
STEP
NUMBER
012
006
TAR (SAR)
Y N
=X'00F6'?
ROS ADDRESS GENERATION TEST
Display main storage addresses.
X'OOOO' should contain X'7004'.
007
TAR (SAR) = X'0106'?
+-----------+---------+-----------+
Y N
008
TAR (SAR)
I IF LOCATIONI SUSPECT I SEE
lex) 0000 I SAR BIT I ALO
ICONTAINS'
, 3705-80
=X'0400'7
+-----------+---------+-----------+
Y N
001
(Entry Point A)
009
IPL PHASE 3 ACTIVE7
ROS ERROR ANALYSIS
The ROS code presents error indications by hardstopping
Observe the value of TAR (SAR)
via output X'70'.
displayed on the control panel and follow the indicated
procedures following:
TAR (SAR) X'0002'?
Y N
010
IPL Controls not working; refer to the ROS
section in MLM Volume 2.
=
Y N
002
TAR (SAR)
011
A ROS Program Load or Execution failure probably
occurred.
Refer to the following:
=X'0032'?
Y N
003
TAR (SAR)
ROS DATA TRANSFER TEST.
=X'0034'?
Display Main Storage Address
Y N
004
TAR (SAR)
1. Location X'0010'
All bits should be off in byte 0 in DISPLAY B.
Suspect any bit that is on in byte 0 as being
continuously on from storage. The bit can also
be on continuously from ROS.
=X'OOBE'?
Y N
005
TAR (SAR) = X'00E8'?
2. Location X'0032'
All bits should be off in byte 1 in DISPLAY B.
Suspect any bit that is on in byte 1 as being
continuously on from storage .. The bit can also
be on continuously frcm ROS.
Y N
, (X)
,
,
,
,
,
,
,
,
3. Location X'0056'
All bits should be on in DISPLAY B. Suspect
any bit that is not on as being continuously off
from storage.
The bit can also be off
continuously from ROS.
(Step 011 continues)
F6FF
98B8
810B
0082
0492
F1FF
1305
65C8
3587
'15
'14
'13
'12
'11
'10
, 9
, 8
, 7
ON
ON
ON
ON
ON
ON
ON
ON
ON
'MM206-207'
'MM206-207'
'MM206-207'
'MM206-207'
'MM206-207'
'MM206-207'
'MM206-207'
'MM206-207'
'MM206-207'
+-----------+---------+-----------+
These charts are valid only for intermittent errors. ROS
must load into storage correctly at least one time correctly
out of a number of LOAD pushbutton operations for these
charts to be valid. Otherwise use manual store and display
procedures.
Location X'03FE' should contain X'7004'.
+-----------+---------+-----------+
I IF LOCATION' SUSPECT' See
IX I 03FE I
'SAR BIT' ALO
'CONTAINS
I
, 3705-80
,
,
,
+-----------+---------+-----------+
,ex)
I
I
I
I
I
I
6 5 544 2
ABC 0 E F
I
I
,
I
I
A815
810B
8802
A807
014C
2795
A823
9704
8491
I 15 OFF
I 14 OFF
13 OFF
12 OFF
11 OFF
10 OFF
9 OFF
8 OFF
7 OFF
I
I
I
I
I
I
I
'MM206-207'
I MM206-207 I
MM206-207
MM206-207
MM206-207
MM206-207
MM206-207
MM206-207
MM206-207
I
I
I
I
I
I
I
I
I
I
I
I
I
I
+-----------+---------+-----------+
NOTE: Only SAR bits 7 through 15 are used to address low
(Step 011 continues)
MAP 0007-1
MAP 0007-2
Remote Program Loader Diagnostic Procedures
RPL DIAG 090
Remote Program Loader Diagnostic Procedures
GHJ
ERROR ANALYSIS PROCEDURES
MAP 0007-3
222
DE
1 1
PAGE 3 OF 6
ERROR ANALYSIS PROCEDURES
RPL DIAG 100
MAP 0007-4
PAGE 4 OF 6
(Step 011 continued)
storage.
015
An IPL sequence has been invoked, but the IPL bit 0.2
of input Reg X'79', is not ON.
If no discrepancy has been found in the ROS data
transfer test or the address generation test, verify
that the control panel is set up properly and retry
the IPL.
016
A branch on bit instruction or BZL instruction has failed.
012
Setup for a load address compare stop at the starting
address of the branch on bit test (X'00A4').
Remote Loader Adapter error, or diskette error or
diskette media error.
A possible error would be CCU oscillator running at
wrong speed. Verify input X'79' 0.5 for correct
oscillator.
Go To Map 0008, Entry Point BA.
Re-IPL
When the load address compare stop occurs, store a
branch instruction X' A81 B' into location X'OOBC'. This will
set up a scoping loop.
013
Reg X'06' used as a CE trace register, cannot be zeroed
out.
Using the ROS listing, simulation run, the instruction step
procedure and the following table, determine the failing
instruction (bit).
Determine why reg X'06' cannot be cleared.
+------------+------------+------------+------------+
I Register 1 contains the instruction and indicates I
To set up a scoping loop, refer to the ROS listing.
I
I
I
I
I
I
I
1. Set the Level 1 IAR to X'OOFC'.
2. Store a X'55C8'into location X'OOFC'. This will
clear reg X'05'.
3. Store a branch instruction X' A80B' into location
X'0104'.
4. Press START.
what is being tested. Bit 0.7 (ON) indicates
that byte 1 is being tested, and bit 0.7 (OFF)
indicates that byte 0 is being tested. Bits
0.2, 0.3, and 1.0 are a binary indication of
the bit that is being tested within the byte.
The bits are being tested for (solid) ON and OFF
conditions.
I
I
I
I
I
I
I
+------------+------------+------------+------------+
I
REGISTER 1
I BITS BEING TESTED
I
+------------+------------+------------+------------+
I BYTE 0
I BYTE 1
I BYTE 0
I BYTE 1
I
014
Reg X'02' which is used as a base register, cannot be set
to X'0600'.
101234567
101234567
101234567
101234567
I
I 1XXXXXXX
I OXXXXXXX
I 1XXXXXXX
I OXXXXXXX
I 1XXXXXXX
I OXXXXXXX
I 1XXXXXXX
I OXXXXXXX
I lXXXXXXX
I, OXXXXXXX
,01000000
00100000
00010000
00001000
00000100
00000010
00000001
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
10000000
01000000
00100000
I
+------------+------------+------------+------------+
I xxooxxxo
oxxxxxxx
10000000
Determine why reg X'02' cannot be set to X'0600'.
I
I
I
I
I
I
I
I
I
I
To set up a scoping loop, refer to the ROS listing.
xxooxxxo
XX01XXXO
XX01XXXO
XX10XXXO
XXlOXXXO
XXllXXXO
XXllXXXO
XXOOXXXl
XXOOXXXl
XX01XXXl
(Step 016 continues),
1. Set the L 1 IAR to X'OOEA' .
2. Store a X'55C8'into location X'OOEA'. This will clear
reg X'05'.
3. Store a branch instruction X' A80D' into location
X'OOF4'.
4. Press START.
MAP 0007-3
'~~
"
J
:/
.~
"'-
,
0
,~
\
"- /
(~
'- ~
"'"'\
',,-j
"-
/
MAP 0007-4
,r'
~~~-~-.~-
(
(
{~
(
---
(:
(~
(
«
(
(
(,
(' ('
.
(
(/
MAP 0007-5
ERROR ANALYSIS PROCEDURES
B C
1 1
(
{~,
(
(~
A
1
I
I
I
I
I
1XXXXXXX
OXXXXXXX
1XXXXXXX
OXXXXXXX
1XXXXXXX
00000000
00000000
00000000
00000000
00000000
MAP 0007-6
019
An invalid branch to zero has occurred. Refer to the
following to determine if ROS was loaded correctly.
ROS DATA TRANSFER TEST.
017
Output instruction X'70' hardstop failed.
Disregard the CCU check, Invalid OP lights. Determine
why output X'70' failed to stop the machine.
Display Main Storage Address
1. Location X'001 0'
All bits should be off in byte 0 in DISPLAY B. Suspect
any bit that is on in byte 0 as being continuously on
from storage. The bit can also be on continuously from
ROS.
018
An instruction failure or data flow failure.
Using the following table, use the load address compare
procedure to determine the failing routine.
If the same hardstop is encountered prior to reaching the
listed program stop, change the address of the next table
entry and re-IPL.
2. Location X'0032'
All bits should be off in byte 1 in DISPLAY B. Suspect
any bit that is on in byte 1 as being continuously on
from storage. The bit can also be on continuously from
ROS.
+------------+------------+------------+------------+
I STARTING
I BRANCH
I ADDRESS OF I I NST FOR
I LOOP I NG
I ROUT I NE
I
I
I
+------------+------------+------------+------------+
I (X) 00A4
ISTH,ST,LH,XRI (X) OOlC I (X) A848 I
+------------+------------+------------+------------+
I (X) OOlC
IXR, IN,OUT ,LHI (X) 0062 I (X) A82E I
+------------+------------+------------+------------+
I (X) 0062
I DATA FLOW I (X) 0034 I (X) A800 I
I
I
(, (
To loop the failing routine, set the MODE SELECT
switch to PROCESS, ensure that the above mentioned
branch instruction has been stored and then press
START.
To loop, set the MODE SELECT switch to PROCESS,
ensure that the above mentioned branch instruction
has been stored and then press START.
I SUSPECTED
I FA I LURE
I
(' (
(Step 018 continued)
step procedure, determine the exact failing instruction.
00010000
00001000
00000100
00000010
00000001
+------------+------------+------------+------------+
I SUGGESTED
I PGM STOP
I
(
PAGE 6 OF 6
(Step 016 continued)
XXO 1XXX 1
XX 1OXXX 1
XX 1OXXX 1
XXllXXXl
XX 11 XXX 1
(
ERROR ANALYSIS PROCEDURES
PAGE 5 OF 6
I
I
I
I
I
(
I OR I ,AR I ,TRM I
IBCL,BZL
I
I
I
1. Location X'0056'
All bits should be on in DISPLAY B. Suspect any bit
that is not on as being continuously off from storage.
The bit can also be off continuously from ROS.
Using the ROS listing and the Load Address Compare
procedure, stop at various points in the program to
determine what instruction is branching to zero.
I
I
+------------+------------+------------+------------+
I (X) 0034 I BRANCH
I (X) 002E I (X) A80l I
+------------+------------+------------+------------+
When the load address compare occurs, refer to the table
to determine the starting address of the failing routine.
Store a NOP instruction X' A800' into location X' 0030'
Refer to the table and store the appropriate branch
instruction into location X'0032'.
Using the ROS listing, simulation run and the instructior
(Step 018 continues)
MAP 0007-5
MAP 0007-6
Remote Program Loader Diagnostic Procedures
RPL DIAG 110
This page intentionally left blank
·1/'
"
A
\
/
C)
(1j
"-./
~.
~3/
r' . .
~
,,-j
\.,j
~
.~
f"'~
'- ./
"-
~
"
--j
.(''''' ,
(~"
\, /
\
r'"
I4~''''',
',,-
j
,,
,
/
/'')
r-'\
'_.J
"-
/
("\
."-.. ../
r~.
/
r-...
r'
"
/
(''\.
r--... ,
;--'').,
,
"j
I~"~
('"'\
'0
' -_/
(
(
(
c
(
(
(
(
f_
(
LPG1 SYMPTOM INDEX
PAGE
c
(
(
MAP 0008-1
(
'-
F
1
(--
f
(
f
M
LPG1 SYMPTOM INDEX
1 OF 11
(
(MAP 0008-2
PAGE 20F 11
ENTRY POINTS
EXIT POINTS
FROM
ENTER THIS MAP
MAP
NUMBER
ENTRY
POINT
PAGE
NUMBER
STEP
NUMBER
No entries in this table
006
DISPLAY REG B
EXIT THIS MAP
TO
PAGE
NUMBER
MAP
NUMBER
ENTRY
POINT
0006
BC
10
STEP
NUMBER
075
015
(Entry Point HH)
=X'COCE'?
+------------+--------------------+
I
SUSPECTED CARDS FOR THIS
I
Y N
007
DISPLAY REG B
Y N
I
=X'COFA'?
008
No other register display should occur.
Refer to MLM Volume 2 and verify the panel display
register.
RE-IPL
001
(Entry Point AI
LPG1 SYMPTOM INDEX
DISPLAY REG B X'C006'?
=
009
X'COFA' has occured. Track ID or CRC errors are
occurring while trying to read LPG2 from diskette. If the
retry is exhausted prior to obtaining a good load, LPG 1
will initiate an automatic re-IPL.
Y N
002
DISPLAY REG B
Y N
=X'C007'?
003
DISPLAY REG B
Y N
010
X'COCE' indicates that an adapter hardware type of error
has occured.
(Entry Point UU)
(Entry Point RR)
=X'C009'?
CHART ARE:
I
+------------+--------------------+
I 3705-80
I
FUNCT ION
I
+------------+--------------------+
I OlA-B1U2
I VFO/DATA SEPERATORSI
I ALD GE20X
I
I
I OlA-B1F2
I ALD GE30X
I
I LEVEL 3 STATUS,
I ACCESS DRIVE AND
I CLOCK
I
I
I
I OlA-B1E2
I ALD GE40X
I
I FILE SERDES, SYNC
I DECODE, & PDR
I REGISTER.
I
I
I
I ALD GE50X
I
I PULSE GATING, &
I TIMINGS.
I
I
+------------+--------------------+
+------------+--------------------+
+------------+--------------------+
I 01A-B1G2
I DISKETTE CONTROLS, I
+------------+--------------------+
Note: The errors on this chart are in the READ subroutine,
REG X'06' = X'0352'?
YN
004
DISPLAY REG B = X'C047'?
REG X'06' = X'0234'?
YN
Y N
005
DISPLAY REG B = X'C048'?
011
REG X'06'
Y N
Y N
016
REG X'06'
=X'0276'?
012
REG X'06'
Y N
=X'035E'?
Y N
017
REG X'06'
Y N
=X'037E'?
=X'0288'?
013
REG X'06'
018
Display storage location X'062E' (program flag).
DOES IT CONTAIN X'FOSS'?
=X'03B4'?
Y N
Y N
014
REG X'06'
Y N
1 1 1 1 1
1 1 1 1 1 2
ABC D E F
1 1 1 1 1
MAP 0008:"'1
1 1 0 0 0
GHJ KL M
=X'030C'?
019
IS THE CONTROL PANEL 'CC CHECK'
LIGHT ON?
Y N
9 888 3 3
N P QR S T
Remote Program Loader Diagnostic Procedures
MAP 0008-2
RPL DIAG130
Remote Program Loader Diagnostic Procedures
S T
2 2
z
LPG1 SYMPTOM INDEX
A A
MAP 0008-3
PAGE 3 OF 11
028
REG X'04'
Y N
020
This should not occur. Use the ROS listing to determine
the problem.
030
REG X'04'
+------------~------------------+
I
I
I
I
The Remote Loader adapter
Input/Output Register decodes
(X ' 68,69,6A ' ) are contained
on the following cards.
This error should occur only if CE. aid number 1 is
active. (continuous loop set up by CE)
Go to Page 2, Step 010, Entry Point RR.
+----------~--------------------+
3705-80
I
I
ALD GE10l
I
I
+-------------------------------+
I
01A-B1D2
I
033
REG X'06'
I
=X'OOOO'?
024
REG X'04'
Y N
=X'0108'?
Y N
035
REG X'07'
025
REG X'04'
Y N
=X'0142'?
026
REG X'04'
=X'01 CE'?
036
REG X'07'
=X'01 D4'?
I
I
I ALD GE303
I
I STATUS
I LATCHES
I
I
1. Set the L 1 IAR to X'01 CO' .
2. Store a branch instruction X' A811' into storage location
X'01CE'.
I
ALD GE505
+----------------+
Y N
=X'0164'?
I CONTROLS
3. Press START.
+----------------+
I SUSPECTED CARD I
+----------------+
I
3705-80
1
+----------------+
I
01A-B1G2
I
Y N
I ALD GE503
To set up a scoping loop, refer to the ROS listing:
040
Media protection failed to occur. The head is engaged and
ROS goes into a 10 sec. wait. However, media protect
should occur on the third revolution after the head is
engaged.
=
+------------+------------+
I
SUSPECTED CARDS
I
+------------+------------+
I 3705-80
I FUNCTION I
+------------+------------+
1 01A-B1G2
I DISKETTE
I
+------------+------------+
+---~------------+
034
Head engage, head disengage or media protect error.
REG X'07' X'01CA'?
YN
I
ALD GE302
041
Head engage latch failed to set.
+------------+------------+
I 01A-B1F2
I DIAGNOSTIC I
Go to Step 040, Entry Point SS.
Y N
+-------------------------------+
REG X'04' = X'OOOO'?
4. Press START.
+----------------+
I SUSPECTED CARD I
+----------------+
I
3705-80
I
+----------------+
I
01A-B1F2
I
77.
Store a (LRI R3H,X'6F') instruction X'826F' into
storage location X'02BC'. This will provide a 510-600
ms timeout loop in lieu of the standard 10 sec.
Use ROS listing to determine
Reg X'05' contains the adapter level status, input X'69'.
Media protect bit 1.0.
032
An error occurred while moving the head out to track
I
I
I
I
3.
039
An adapter L3 interrupt did occur, but the media protect
bit failed to set.
=X'01 E4'?
031
No other error should occur. Use the ROS listing
to determine the problem.
023
(Entry Point BA)
Input/output error.
=X'01 DC'?
038
Should not occur.
problem.
Y N
022
Use the ROS listing to determine the failing instruction.
(Step 040 continued)
X'01D4'.
Y N
Y N
Y N
PAGE 4 OF 11
I
029
REG X'04' = X'01cO'?
021
Use the ROS listing to determine if the trouble is a failing
. instruction or input/output error.
IS THE TROUBLE AN INPUT/OUTPUT ERROR?
MAP 0008-4
3
037
REG X'07'
=X'01AO'?
.
A
D
LPG1 SYMPTOM INDEX
EF
3 3
RPL DIAG 140
Y N
(Entry Point SS)
To set up a scoping loop, refer to the ROS listing:
027
REG X'04'
=X'017A'?
1. Set the L 1 IAR to X'01 CO' .
Y N
2. Store a branch instruction' X' A817' into storage location
(Step 040 continues)
88775
U V W X 'Y
~
~}J
~l~aaa
z
ABC DE F
/'~
r
/
)
MAP 0008-3
("",
\,
/
'--. /
MAP 000$-4
r"';
(;~
,,/
"'./
r~\
\
,
f''l\
''''_/
10
'",-
;/
lt~
"j
1",\
,,-J
r~
',,--/
o
«
(
(
AAA
ABC
333
I
(
{
(
«
(
LPG1 SYMPTOM INDEX
(
(
(
(
(
(
('
YA
(/
( ...
(
(
(-' (
('
f
"
(~
.,'
(-~'
(~
(
A
('/ (
MAP 0008-6
J
PAGE 6 OF 11
(Step 047 continued)
046
Motor protection failed to occur. The adapter is issued
a head move command. ROS waits for a motor protect
interrupt (input X'69' 1.0). A 10-second timeout will
occur if motor protect fails.
I
1. Set the L1 IAR to X'01 CO'.
2. Store a branch instruction X' A80C' into storage
location X'01 CA'.
I
3705-80
I
FUNCT ION
I
I
Store a branch instruction X' A81 F' into storage
location X'01 DC'.
I
01A-B1G2
ALD GE505
I
I
01A-B1G2
ALD GE501
048
REG X'07'
Y N
I 01A-B1F2
I ALD GE303
043
A subroutine error occurred while testing the head
controls and media protect circuitry.
Go to Page 2, Step 010, Entry Point RR.
I LEVEL 3
I
I STATUS REG I
I
I
TO SCOPE FOR MISSING PULSES:
1. For 3705-80, refer to ALD GE030. Scope (+) index.
=X'0190'?
+------------+------------+
050
REG X'07'
To set up a scoping loop, refer to the ROS listing:
Y N
2. Set the scope on a slow sweep range and display three
(+) index pulses. If the middle pulse is not a solid pulse,
refer to RPL Section of FETMM.
=X'019C'7
TO SCOPE FOR EXTRA INDEXES:
051
Should not occur.
determine problem.
2. Store a branch instruction X' A819' into storage
location X'01 BC'.
Y N
1. For 3705-80, refer to ALD GE502. Scope (+) index.
Use
ROS
listing
to
052
The allow interrupt on index latch failed to reset
output. X'68' with 1.0 on should reset the above
mentioned latch. Refer to the following chart.
3. Press START.
045
A subroutine error occurred while testing the access
controls.
Note: This is the first pass thru the following ROS
TAR(SAR) stops:
REG X'06' = X'0234'
REG X'06' = X'0276'
REG X'06' = X'0288'
REG X'06' = X'02B4'
Go to Page 2, Step 010, Entry Point RR.
DISKETTE
CONTROLS
=X'0188'?
049
REG X'07'
Y N
I
1. Set the L1 IAR to X'01 A6'.
=X'OOOO'?
I
I
+------------+------------+
4. Press START.
I
=
I
MOTOR
PROTECT
054
Diskette speed too slow or interrupt on index did not occur
on the next revolution.
(Entry Point B)
To verify the diskette speed for 3705-80 refer to ALD
GE502. Scope (+) index. It should occur every 166 MS
+5, -5 percent. If it does not. refer to RPL Section of
FETMM.
For scoping, refer to the following:
+------------+------------+
REG X'07' X'0182'7
+------------+------------+
I
I TIMINGS
Y N
I
SUSPECTED CARDS
I ALD GE402
+------------+------------+
+------------+------------+
047
Verify diskette speed. The expected diskette speed of
166.6 milliseconds per revolution is tested for a +10
percenUolerence. The test method used is to get in-sync
with the diskette index and time the elapse period to the
next index. Refer to the chart below for this next section
of the MAP. ,
I
I
+------------+------------+
SUSPECTED CARDS FOR
THIS CHART ARE
3705-80
I
FUNCTION
I
I
I
01A-B1F2
ALD GE302
I
I
I
I
STATUS &
INTERRUPT
CONTROLS
SUSPECTED CARDS FOR
THIS CHART ARE
I
I
01A-B1E2
I
(Step 047 continues)
BASIC
+------------+------------+
I
+------------+------------+
I
3705-80
I
FUNCTION
I
01A-B1F2
ALD GE302
STATUS &
I
INTERRUPT
I CONTROLS
I
I
I
SUSPECTED CARDS FOR
THIS CHART ARE
3705-80
I
FUNCTION
I
I
I
+------------+------------+
I
I
I
I
+------------+------------+
I
01A-B1F2
ALD GE302
STATUS &
INTERRUPT
I CONTROLS
I
I
I
I
I
+------------+------------+
I
053
Either the diskette speed is too fast or extra index
pulses are occurring.
Go to Step 054, Entry Point B.
I
I
I
+------------+------------+
I
If the (+) index pulse does not break up, replace the
suspect card. (see list below)
I
I
I
+------------+------------+
I
3.
+------------+------------+
I
+------------+------------+
I
2. Expand the scope sweep to provide a full screen index
pulse (2 to 3 ms). If the (+) index pulse breaks up, it will
generate extra index pulses. Refer to RPL OP section of
MLM Volume 3.
+------------+------------+
+------------+------------+
I
I
A
G
<:
{
LPG1 SYMPTOM INDEX
PAGE 5 OF 11
+------------+------------+
044
REG X'06'
(
MAP 0008-5
3 G
042
An unexpected interrupt occured when an output to
engage the head was issued.
Reg X'05' contains the adapter level 3 status (input
X'69'). Refer to ALD GE30X for 3705-80.
To set up a scoping loop, refer to the ROS listing:
3.
C-
(
I 01A-B1E2
I ALD GE402
I BASIC
I TIMINGS
I
I
+------------+------------+
I 01A-B1G2
I ALD GE501
I DISKETTE
I CONTROLS
I
I
+------------+------------+
I
7
MAP 0008-5
A A
HJ
MAP 0008-6
Remote Program Loader Diagnostic Procedures
RPL DIAG 150
Remote Progrem Loader Diagnostic Procedures
XA
3 ~
w
LPG1 SYMPTOM INDEX
UV A
MAPOOOS-7
3
3 3 K
PQR
22:2
LPG1 SYMPTOM INDEX
7
PAGE 7 OF 11
RPL DIAG 160
MAP 0008-8
PAGE 8 OF 11
(Step 056 continued)
(Step 058 continued)
2. Store a branch instruction X' A809' into storage
location X'0150'.
+--------------+
I 01A-B1F2
I
055
Failed to get an interrupt on index L3 status.
I ALD GE30X
I
1. Check for diskette media in reader.
+--------------+
2. Check cable between remote cable loader adapter
and the diskette.
Display registers X'68' and '69' via the control panel to
determine the 'HOT' status bits(s).
For scoping, refer to the following:
3. Press START.
This loop will start with the first test pattern and
continue to update the test pattern until an error
occurs. It will then branch back in a tight loop on
the failing pattern.
Refer to the following chart for scoping:
To set up a scoping loop, refer to the ROS listing:
To scope 3705-80, refer to ALD GE030. Scope the
signal (+) index. If it does not occur, refer to RPL OP
section of MLM Volume 3. If it does occur, refer to the
ROS listing:
059
The first suspected card failure is in the decode of
in/out X'6A'.
Go to Page 7, Step 058, Entry Point W.
1. Set the LliAR to X'0164'.
2. Store a branch instruction X' A80D' into storage
location X'016E'.
1. Set the L1 IAR to X' 17A' .
3.
2. Store a branch instruction X' A80B' into storage
location X' 182'.
060
CRC register test (input X'7C') error. The 8 bit DLC
hardware assist register is tested to verify correct CRC
calculation.
The suspected card is as follows:
Store a branch instruction X' A815' into storage
location X'0176'.
4. Press START.
062
A CRC CHECK OCCURED.
Replace the diskette media, re-IPL. If the same error
occurs, continue the following procedure.
Display storage location X'0654', (program flag).
DOES IT CONTAIN X'OOOO'?
Y N
063
The first 32 bytes of data (track header and its
CRC) was read without error.
Go to Step 066, Entry Point QQ.
064
The CRC error occured on the track header block.
Go to Step 066, Entry Point QQ.
065
CHARACTER SERVICE FAILED TO OCCUR.
Go to Step 066, Entry Point QQ.
3. Press START.
+---------------+
ISUSPECTED CARD I
+---------------+
3705-80
+---------------+
I 01A-B3S2
I
057
PDR register test (input/output X'6A') error. The remote
loader POR REG is tested to verify correct data transfer.
REG X'03' = X'0000'7
For 3705-80, refer to ALD GE030. Scope for the signal
*-int on index*. If it does not occur, replace the
diskette control card. If it does occur, continue to scope
to determine the failing card.
Y N
056
Remote loader adapter reset test, an output X'68' with 1, 5
& 1.6 on is issued to reset the adapter. The two status
registers (input X'6S' and '69') are tested for all zeros.
I ALD CROOl
058
(Entry Point VV)
Refer to the following chart:
This routine is the first code to issue an output X'68', and
the input X'69'. If the card in the following chart does not
correct the error, verify the previous decodes.
I
ALD GE40X
For scoping, use the following:
+--------------+
To set up a scoping loop, refer to the ROS listing:
To set up a scoping loop, refer to the ROS listing:
To set up a scoping loop, refer to the ROS listing:
1. Set the LliAR to X'Ol OS' .
1. For track 10 errors, refer to chart 1 below. Set up for
the 'continuous read of LPG 1 from the alternate tracks'.
Observe the diskette head movement. It should be
alternating between track a and 11. If not, change the
access drive and the diskette control cards. (refer to
chart 2 below). .If the same error reoccurs, refer to the
RPL OP Section of MLM Volume 3.
061
Error occurred while attempting to read LPG1
diskette.
Go to Page 2, Step 010, Entry Point UU.
1. Set the L1 IAR to X'0142'.
(Step 056 continues)
(Entry Point QQ)
3. Press START.
The suspected card is as follows:
+--------------+
I 3705-80
I
Refer to the following for scoping:
2. Store a branch instruction X' A815' into storage
location X'Oll A'.
I
+----------------+
ISUSPECTED CAROl
=
I
+---------------+
+----------------+
I SUSPECTED CARD I
+----------------+
I
3705-80
I
+----------------+
I
01A-B1E2
I
There is no assurance that the adapter had any outstanding
status prior to issuing the reset. As a result, status reset
errors may occur at other points in ROS.
086
TRACK 10 ERROR.
The track number read from the diskette did not match the
expected value.
Reg X'03' = actual track number read from the diskette
media. Reg X'05' bits in error.
Replace the diskette media and re-IPL. If the same error
re-occurs, continue with the following procedure.
(Step 058 continues)
from
2. For character service errors, refer to chart 3 below and
set up for continuous read of LPG1 from track O. Using
chart 2 at the right, and the RPL OP section of MLM
Volume 3 for appropriate timing charts, scope for failure.
(Step 066 continues)
8
A
K
/""l
'-
j
MAP 0008-8
(~"\
f~
......
"'./
./
('''''''
\..../
(
\
\,
/
./
'-..
/
\ , .. /
"\
,r~
!"~.
/'
\.... /
". ./
"J
r'~
.'-.... /
(
(
(
(
c,
(
(
(
(
(
N
2
LPG1 SYMPTOM INDEX
(
(
MAP 000S-9
PAGE 90F 11
(Step 066 continued)
(Step 066 continued)
***CHART 1***
CONTINUOUS READ OF LOAD PROGRAM 1 FROM
ALTERNATE TRACKS
A. Refer to the ROS program listing. If the ROS code is
not already loaded in storage, set up for a load aadress
compare stop at location X'01 DE' and press load. If
ROS is already in storage, set the L1 IAR to X'01 DE'.
S. Store a NOP instruction X' ASOO' into storage location
X'03F2'.
C. Store a clear reg instruction X'01' into storage location
X'03ES'. This will set the track seek number to zero on
alternate passes.
D. Store a branch instruction X' AS13' into storage location
X'03FS'.
E.
Set up for a load address compare stop at location
X'03D6'. This will cause an address compare stop if any
errors occur.
, 01A-B 1G2
, ALD GE50X
I
+------------+--------------------+
CONTINUOUS READ OF LOAD PROGRAM 1 FROM
,
CHART ARE
,
+------------+--------------------+
, 3705-80'
FUNCT ION
,
+------------+--------------------+
'01A-B1U2
, ALD GE20X
'VFO/DATA SEPERATORS'
,
,
+------------+--------------------+
'01A-B1F2
'LEVEL 3 STATUS,
,
, ALD GE30X
,
'ACCESS DRIVE AND
, CLOCK
,
,
'01A-B1E2
, ALD GE40X
'FILE SERDES, SYNC
'DECODE, & PDR
, REGISTER.
,
,
,
+------------+--------------------+
r
(
(
X'03D6'. This will cause an address compare stop if
any
errors
occur.
--FOR
CONTINUOUS
LOOP--bypass this step.
F. PRESS START. Program should continuously read
LOAD PROGRAM 1 from track zero. If the program
stops, refer to the ROS MAPS on other pages.
067
The initial character service failed to occur during an
attempt to read.
Replace the diskette media and re-IPL.
DOES THE SAME ERROR OCCUR?
Y N
068
(Entry Point TT)
IS THE DISKETTE PRESSURE PAD LOADING?
Y N
(
(
(
(
J KL
222
MAP 0008-10
076
An adapter L1 interrupt has occurred.
Use the
control panel to display reg X' 6S', the adapter level 1
status register. Determime the type of error.
070
Check the remote program loader adapter's
24VAC power supply and fuses.
IS IT OK?
Y N
071
Refer to PWR MAP section and trouble shoot
the power supply.
072
Refer to the RPL OP Section of MLM Volume 3
and trouble shoot the pressure pad movement.
+-----------+------------+
, 3705-80 , FUNCTION ,
+-----------+------------+
'01A-B1E2 I OUTBUS
, ALD GE403 I PARITY
,
,
+-----------+------------+
'01A-B1G2 , WRITE
,
I ALD GE501'
CONTROLS'
+-----------+------------+
'01A-B1F2 , LEVEL 1 ,
I ALD GE301 I STATUS REG ,
+-----------+------------+
077
073
For 3705-S0, refer to ALD GE502. Scope for '+ head
engage'. If signal is present, refer to the RPL OP
Section of MLM Volume 3, if signal '+ head engage'
is not present.
Replace the diskette control as
indicated below:
+-------------------------+
I SUSPECTED CARDS FOR
I
I
THIS CHART ARE
I
+------------+------------+
I 3705-80
I FUNCTION I
+------------+------------+
I 01A-B1G2
I DISKETTE
I
I ALD GE50X
,
I
I CONTROLS
,
IpULSE GATING'
I & TIMING
I
+------------+------------+
074
Go to Page 8, Step 066, Entry Point QQ.
Failed to get an interrupt on index (input X'69' Bit 0.0).
Go to Page 11, Step 080, Entry Point II.
078
Table of possible gray codes
(input X'69' bits 0,2,3,4 and 5)
+-------+----------+---------+
, IF'
IREVERSEI
'MOVE
,
CURRENT'
IF'
GRAY
I FORWARD I
COUNT , MOVE ,
, 1100
I 0110
I 0011
0110
0011
0110
+-------+----------+---------+
, 1001 I 1100
I 0110 ,
,
,
,
,
I
,
0011
0110
1100
,
,
,
+-------+----------+---------+
GRAY COUNTER ERROR OR ACCESS CONTROL ERROR.
Reg X'05' contains the bits-in-error(mask = X'3COO').
Reg X'03' contains the actual gray code (input X'69').
If 3705-S0, the suspected card is OlA-Bl F2 (ALD GE305).
075
Go To Map 0006, Entry Point
Be.
(Step 07S continues)
+------------+--------------------+
(Step 066 continues)
111
000
AAA
L MN
(
PAGE 10 OF 11
YN
C. Store a NOP instruction (X' ASOO') into storage
location X'03DA' .
E. Set up for a load address compare stop at location
(
LPG1 SYMPTOM INDEX
I
Store a branch instruction (X' AS09') into storage
location X'03F2'.
D. Store a NOP instruction (X' ASOO') into storage
location X'03FO' .
{
(
069
IS THE DISKETTE HEAD MOVING?
A. Refer to the ROS program listing. If the ROS code is
not already loaded in storage, set up for a load
address compare stop at location X'01 DE' and press
LOAD. If ROS is already in storage, set the L 1 IAR to
X'01DE'.
S.
(
AAA
L. M N
999
TRACK ZERO.
F. Press START. Program should continuously read load
program 1 from first track zero and then track 11. Refer
to the ROS flowchart on previous pages.
+------------+--------------------+
,
SUSPECTED CARDS FOR THIS
,
'D ISKETTE CONTROLS,
I PULSE GATING, &
I TIMINGS.
(
MAP 000S-10
MAPOOOS-9
Remote Program Loader Diagnostic Procedures
RPLDIAG 170
Remote Program Loader Diagnostic Procedures
GH
2 2
LPG1 SYMPTOM INDEX
ABC D E
MAP 0008-11
1 1 1 1 1
PAGE 11 OF 11
(Step 07B continued)
**NOTE:** To do a Manual Reset Test, use the
control panel to:
1. Output X'6B' with data X'0006'.
2. Input should equal X'3000'.
**SPECIAL NOTE:** There is NO positive feedback
from the motor. As a result, this test does not prove
that the head actually moved.
(Step OBO continued)
step.
F. PRESS START.
Program
should
continuously read LOAD PROGRAM 1
from track zero. If the program stops,
refer to the ROS MAPS on other pages.
081
079
An unexpected interrupt occurred during a head move
sequence. Reg X'05' contains the adapter level 3 status
(input X'69').
X'C04B' indicates that the 1FT DISK LOADER
cannot be read from diskette.
Go to Step 082, Entry Point GG.
Go to Step 080, Entry Point II.
082
X'C047' indicates that INITIAL TEST can not be
read from the diskette.
080
X'0234' failed to get an interrupt on index (INPUT X'69'
BIT 0.0).
(Entry Point II)
The suspected function failure is the STATUS AND
INTERRUPT CONTROLS and the BASIC TIMINGS.
If 3705-BO, the suspected cards are 01A-B1F2 (ALD
GE302) for a failure of the STATUS and INTERRUPT
CONTROLS and 01A-B1 E2 (ALD GE40X) if BASIC
TIMINGS.
CONTINUOUS READ OF LOAD PROGRAM 1 FROM Track
zero.
A. Refer to the ROS program listing. If the ROS code is
not already loaded in storage, set up for a load address
compare stop at location X'01 DE' and press LOAD. If
ROS is already in storage, set the L1 IAR to X'01 DE'.
(Entry Point GG)
Change the diskette media and RE-IPL.
083
Storage mechanism failure.
If 3705-BO, the suspected card is 01A-B4D2 (ALD
CVXXX).
084
Cold SAR bits(s) are causing addressing failures.
Reg X'05' contains the test address. Storag~ location
X'3FE' has been disturbed by the, address in Reg X'05'.
Note: To scope the loop,
set the DISPLAY/FUNCTION SELECT switch to
FUNCTION 3.
Press START.
085
B.
Store a branch instruction (X' AB09') into storage
location X'03F2'.
C. Store a NOP instruction (X' ABOO') into storage location
X'03DA'.
D. Store a NOP instruction (X' ABOO') into storage location
X'03FO'.
IPL register X'6B' failure.
Reg X'03' contains expected data and reg X'05' contains
the bit in error.
If 3705-80, the suspected card is 01A.,.B1 F2 (ALD GE305)
Note: To scope the loop,
set the DISPLAY/FUNCTION SELECT switch to
FUNCTION 3.
Press START.
E.
Set up for a load address compare stop at location
X'03D6'. This will cause an address compare stop if any
errors occur. --FOR CONTINUOUS LOOP--bypass this
(Step OBO continues)
MAP 0008-11
,/
"
;-~
./
''-- ./
\,--
./
./
"-/
i
""'/
F>\
J
"'--
!""">"
/'
"'-
"-.
./
!"~
'- ./
(-"
./
(-...,
~._/
/
',- ..
-
.•
'..,.
--~
r
,I,
(4' ~'"
RPL DtAG 180
(
(
(
(
{
c
(
(
D
LPG1 FLOWCHART
PAGE
(
(
(
(
(
{
(
c
(
f~
(Co
(
.- '.
r-
(
A B C
E F G H J K LPG1 FLOWCHART
MAP 0009-1
c- -
(~.
MAP 0009-2
1 1 1
111111
PAGE 2 OF 2
1 OF 2
001
(Entry Point A)
004
DID DIAGNOSTICS LOAD?
009
RETRY EXHAUSTED?
Y N
Y N
019
Reset 'IPL phase 3' Mode.
Pass control to initial test at location X'OBOO'.
Assuming no error stops, initial test will re-enter
LPG1 without manual intervention required.
Go to Page 1, Step 005, Entry Point AB.
LPG 1 FLOWCHART
LPG 1 is passed control at storage location X'OOBO'.
005
(Entry Point AB)
DID NCP/R REQUEST IPL?
Set DISPLAY A = X'CCTT' and DISPLAY B X'OOOO'.
Y N
Test for intermittent errors that may have occurred in ROS.
If any errors did occur, set the appropriate bit in the OBR
record.
010
Go to Page 1, Step 007, Entry Point WW.
020
Operator panel data switches = X'OBBBB'.
Go to Step 021, Entry Point YY.
011
Automatic RE-IPL
006
DID
OPERATOR/C.E.
DIAGNOSTICS LOAD?
REQUEST
A
012
Go to Step 013, Entry Point XX.
021
1FT re.g X'6B' bit 0.0 equals a logical one.
Y N
Complete the ORB record. Save the CE trace registers
X'04' and X'05' used in ROS.
Determine what type of load is to follow diagnostic or
LPG2.
8ased on the type of loa9 l'Ind storage size, set the
appropriate flags and initial te,s,t. Flag location X'0414'.
007
(Entry Point ZZ)
Restore the 32 bytes of LO general regs data or
BTU data back to X'07BO' - '079F' from the
temporary save area X'0040' - '005F'.
(Entry Point WW)
Perform a READ. Read LPG2 from track X'06'.
Test IPL reg '68'.
WAS READ SUCCESSFUL?
YN
Test for cold SAR bits/D.O, 1, 2, 3, and 4.
DID THE HOST REQUEST A STORAGE DUMP?
Y N
008
Perform a READ. Read LPG2 from track X'OC'.
013
(Entry Point XX)
Reset 'Test Mode' and 'IPL Phase 3' Mode.
Pass control to LPG2 at location L-BK where
L=Last Valid Machine address.
See LPG2 Symptom Index and Remote IPLCDS.
014
Operator panel data switches = X'ODDDD' and panel
level 3 interrupt active (input X'7F' bit 0.6).
Perform a READ.
diskette.
Read the '1FT Disk Loader' from
(Entry Po.int Y,V)
Perform a READ. Read the 'Dump Subroutine' from track
X'11'.
WAS READ SUCCESSFUL?
I~~2to
Step 024. En"> Po;nt AC.
023
Perform a DUMP. Save the upper BK of storage by writing
it into tracks X'OF' and X'1 0'.
DUMP OK?
Y N
WAS READ SUCCESSFUL?
002
DID THE
DUMP?
Y N
WAS READ SUCCESSFUL?
OPERATOR
REQUEST
A
STORAGE
Y N
015
Report an error via the panel and hard stop.
Y N
016
Pass control to the '1FT Disk Loader' at location
X'3C04'. Refer to the '1FT Disk Loader'.
003
Move the 32 bytes of LO general regs data or BTU
data from X'079F' to location X'OO4Q' - X'005F'.
Perform a READ. Read initial test from diskette.
024
(Entry Point AC)
Set flag to indicate that the DUMP data is BAD.
Go to Page 1, Step 007, Entry Point WW.
025
Fetch and save the storage protect keys for the upper BK.
Store at location X'01BO'.
Go to Page 1, Step 007, Entry Point WW.
017
IPL reg X'SB' byte 0, bits 0, 1 or 3 equals a logical one.
Go to Page 1, Step 007, El'try Point ZZ.
WAS READ SUCCESSFUL?
Y N
018
Report an error via the operator panel and hardstop.
222
ABC D
22222 2
E F GHJ K
MAP 0009-2
MAP 0009-1
Remote Program Loader Diagnostic Procedures
RPL DIAG 190
(
This page intentionally left blank
,.r~
'"
)
('\
\.
('-'"
"
./
!.<-~
,l-"'---"'\
"
./
'"
"
/
!'-~
;/',\
,
,
/
./
,
./
"
I
./
'.
/
"
./
\.
"
./
", /
~'")
'
"
/
~~
"
/
r'l
\'--_/
(
'\
"
./
"'\,
".
./
1- ' \
'-.'-/
..
!I'"
r--'"
"""
.
'-
(
'-...
' .. ./
'\
'--/
.'"
(
(
(
(
(
Load Program 2 (LPG2) Symptom
Index and Remote IPL CDS
LPG2 consists of an SOLC handler, an NCP
loader, and a dump handler. The SOLC handler
controls the SOLC trunk or trunks and is shared
by the other two routines. The NCP loader
controls the loading of the NCP-R from the host
to the remote. The dump handler controls the
transfer of storage and the contents of tracks
X'OF' and X'1 0' to the host.
When LPG2 is given control, a basic validity
check is performed on the "remote IPL CDS"
data. Based on the "remote IPL CDS" data, LPG2
monitors a given SDLC trunk or trunks for control
information from the host. The host retains
control over the type of request (for example
load or dump) and must inform the remote
(LPG2) of the action to be taken. The "dump
required" bit being ON only indicates that the
upper 8K of storage contents have been saved
when the IPL sequence was initiated. A
continuous re-IPL occurs if "data set ready" is
not active for any of the defined lines.
Remote LPG 2 (X3705NEA) supports the SDLC
test command and up to X'1 0' bytes of data.
(
(
(
(
(
Remote IPL CDS Format
In order to establish contact with the host, LPG2
must know which SDLC trunk or trunks to use
and the type of communication scanner installed
in the remote loader machine. Because this
information is subject to changes, a 64 byte area
is reserved in LPG1 and is defined as the "remote
IPL CDS" Refer to the following tables for bit
definition of the CDS field. See MAP 5 "remote
IPL CDS procedure" (in this section) for the
procedure to modify the CDS.
The host link may be assigned to any line pair,
but line pair 1 is recommended.
Obtain the following information from the host
site prior to writing the remote RPL CDS:
1. Upper scan limit
2. Scanner substitution control bits
3. Number of minutes wait time during dump
or load
4. SDLC host link poll character
5. NRZI trans"mission method
6. Host link leased or switched line
7. If switched line, manual or auto answer
8. Modem or internal clock
9. Data rate select if two speed modem
10. Oscillator select bits
(
(
(
(
«
(
Error Reporting
If LPG2 incurs an unrecoverable error, it posts an
error code in DISPLAY B and hard stops via an
output X70' instruction. The following list can
be used to help determine the error:
DISPLAY B
Description of Error
30FO
No active SDLC trunks
30F1
No scanner
30F2
CDS invalid
(". (
(
(
Abend
LPG2 encounters some conditions which cause
the LPG2 to re-IPL itself. After re-IPLing,
FUNCTION 1 of the DISPLAY/FUNCTION
SELECT switch will display the abend (re-IPL)
code if applicable. Re-IPL during an abend will
be prevented by FUNCTION 6 being set prior to
abend. DISPLAY B would then contain the abend
code.
LPG2
Codes Description of Condition
LPG2 hard stops with no error code posted if L 1
checks occur due to program error. STATUS
position of DISPLAY/FUNCTION SELECT switch
shows the reason. L 1 1 reg 1 (X'01 ') contains the
combined input X76' and X7E'. L4 IAR (IN
X'10') contains the saved L2 IAR. L3 IAR is
intact.
3F01
No trunks up - either enable failed or
transmit initial failed
3F02
SDRM received while monitoring one line
3F03
SNRM received while monitoring one line
3F04
Automatic re-IPL due to user specified
time interval expiration
3F05
L 1 CSB interrupt
3F06
Incorrect LPG2 active for 3705 MOD I
(should not get this message on 3705-80)
3Fl0
SIM received while loading or dumping
Remote Program Loader Diagnostic Procedures
RPL DIAG200
Remote Program Loader Diagnostic Procedures
Byte and Bit Definitions for the Remote IPL CDS
RPl DIAG 210
Scanner and Line Pair 2 CDS
Scanner and Line Pair 1 COS
STORAGE
LOCATION
STORAGE
LOCATION
Byte. Bit
Description
X'0040'
0.0-3
0.4-1.7
=0000
= Transmit leg address for line pair 1 (see Note 1)
X'0042'
0.0-3
0.4-1.7
X'0044'
0.3
0.7
1.0-7
= 1 (Communication scanner type 2)
= 1 (The IPL trunks are attached to scanner 1)
= SOLC address for line pair 1 (see Note 7)
0.0
=0
if line pair 1 does not require NRZI transmission method (see Note 5)
0.1
=0
=1
=0
=0
=1
=0
=1
=0
=
if line pair 1 is to be monitored (see Note 2)
if line pair 1 is inactive
(Reserved)
if line defined is leased
if line defined is switched (see Note 4)
if switched line is manual answer
if switched line uses 'ring indicator' auto answer mode
(Reserved)
Line definition for line pair (needed at set mode
time for output X'46') for type 2 scanner (see Note 6)
=0000
, = Receive leg address for line pair 1 (see Note 1)
I
Byte.Bit
Description
X'0048'
0.0-3
0.4-1.7
=0000
= Transmit leg address for line pair 2 (see Note 1)
X'004A'
0.0-3
0.4-1.7
=0000
= Receive leg address for line pair 2 (see Note 1)
X'004C'
0.6-.7
=
X'004E'
X'0046'
0.2
0.3
0.4
0.5
0.6-1.7
/'"
''---_/
,/~
\
j
,0
!~
\',.-J
r'\1
/'c~
"-.j
"--~/
!'-',\
~
'-,.
/'
\,
./
".
/
'-
"-.
:
/
!
'''\
'--.~
1.0-7
Upper scan limit (refer to CS2 section
in Volume 3)
= SOLC address for line pair 2 (see Note 7)
0.0
=0
if line pair 2 does not require NRZI transmission method (see Note 5)
0.1
=0
=1
=0
=0
=1
=0
=1
=0
=
if line pair 2 is to be monitored (see Note 2)
if line pair 2 is inactive
(Reserved)
if line defined is leased
if line defined is switched (see Note 4)
if switched line is manual answer
if switched line uses 'ring indicator' auto answer mode
(Reserved)
Line definition for line pair (needed at set mode
time for output X'46') for type 2 scanner (see Note 6)
0.2
0.3
0.4
0.5
0.6-1.7
(
"
'"
.. /
,...~''\
'~-_/
\,
/
\', ~
/""\;\
,,,/
r"",
'-.
/
!
\.
/
'\,
\',j
r'~
('\
/'
./
"
.
r-"'"",_/
/
',--
"
7""
-.
(
''\
(
(
(
(
(
(
(
(
(
(
(
(
Scanner and Line Pair 3 COS
STORAGE
LOCA TlON
(
(
(
(
(
(
(
(
(' (
Line Pair 4 CDS
Byte.Bit
Description
X'0050'
0.0-3
0.4-1.7
=0000
= Transmit leg address for line pair 3 (see Note 1)
X'0052'
0.0-3
0.4-1.7
X'0054'
0.0-3
STORAGE
LOCATION
Byte. Bit
Description
X'0058'
0.0-3
0.4-1.7
=0000
= Transmit leg address for line pair 4 (see Note 1)
=0000
= Receive leg address for line pair 3 (see Note 1)
X'005A'
0.0-3
0.4-1.7
=0000
= Receive leg address for line pair 4 (see Note 1)
X'005C'
1.0-7
= SOLC address for line pair 4 (see Note 7)
X'005E'
0.0
=0
if line pair 4 does not require NRZI transmission method (see Note 5)
0.1
1.0-7
Scanner substitution control 1 bits 1-4
respectively (refer to CS2 section
in Volume 3)
=
0000 for unlimited wait time during load or
dump process
=
number of minutes of inactivity (timeout) during
load or dump before an automatic re-IPL
occurs (see Note 4)
= SOLC address for line pair 3 (see Note 7)
0.0
=0
if line pair 3 does not require NRZI transmission method (see Note 5)
0.1
=0
=1
=0
=0
=1
=0
=1
=0
=
if line pair 3 is to be monitored (see Note 2)
if line pair 3 is inactive
(Reserved)
if line defined is leased
if line defined is switched (see Note 4)
if switched line is manual answer
if switched line uses 'ring indicator' auto answer mode
(Reserved)
Line definition for line pair (needed at set mode
time for output X'46') for type 2 scanner (see Note 6)
=0
=1
=0
=0
=1
=0
=1
=0
=
if line pair 4 is to be monitored (see Note 2)
if line pair 4 is inactive
(Reserved)
if line defined is leased
if line defined is switched (see Note 4)
if switched line is manual answer
if switched line uses 'ring indicator' auto answer mode
(Reserved)
Line definition for line pair (needed at set mode
time for output X'46') for type 2 scanner (see Note 6)
0.4-7
=
0.2
0.3
0.4
X'0056'
(
0.2
0.3
0.4
0.5
0.6-1.7
0.5
0.6-1.7
Line Pair 5 CDS
STORAGE
LOCA TlON
Byte. Bit
Description
X'0060'
0.0-3
0.4-1.7
=0000
= Transmit leg address for line pair5 (see Note 1)
X'0062'
0.0-3
0.4-1.7
=0000
= Receive leg address for line pair 5 (see Note 1)
X'0064'
1.0-7
= SOLC address for line pair 5 (see Note 7)
X'0066'
0.0
=0
if line pair 5 does not require NRZI transmission method (see Note 5)
0.1
=0
=1
=0
=0
=1
=0
=1
=0
=
if line pair 5 is to be monitored (see Note 2)
if line pair 5 is inactive
(Reserved)
if line defined is leased
if line defined is switched (see Note 4)
if switched line is manual answer
if switched line uses 'ring indicator' auto answer mode
(Reserved)
Line definition for line pair (needed at set mode
time for output X'46') for type 2 scanner (see Note 6)
0.2
0.3
0.4
0.5
0.6-1.7
Remote Program Loader Diagriostlc Procedures
RPLDIAG 220
RPLDIAG 230
Remote Program Loader Diagnostic Procedures
Line Pair 6 CDS
STORAGE
LOCATION
Line Pair 8 CDS
Byte. Bit
Description
STORAGE
LOCATION
X'0068'
0.0-3
0.4-1.7
=0000
= Transmit leg address for line pair 6 (see Note 1)
X'006A'
0.0-3
0.4-1.7
X'006C'
X'006E'
Byte. Bit
Description
X'0078'
0.0-3
0.4-1.7
=0000
= Transmit leg address for line pair 8 (see Note 1)
=0000
= Receive leg address for line pair 6 (see Note 1)
X'007A'
0.0-3
0.4-1.7
=0000
= Receive leg address for line pair 8 (see Note 1)
1.0-7
= SDLC address for line pair 6 (see Note 7)
X'007C'
1.0-7
= SOLC address for line pair 8 (see Note 7)
0.0
=0
if line pair 6 does not require NRZI transmission method (see Note 5)
X'007D'
0.0
=0
if line pair 8 does not require NRZI transmission method (see Note\5)
0.1
=0
=1
=0
=0
=1
=0
=1
=0
=
if line pair 6 is to be monitored (see Note 2)
if line pair 6 is inactive
(Reserved)
if line defined is leased
if line defined is switched (see Note 4)
if switched line is manual answer
if switched line uses 'ring indicator' auto answer mode
(Reserved)
Line definition for line pair (needed at set mode
time for output X'46') for type 2 scanner (see Note 6)
0.1
=0
=1
=0
=0
1
=0
=1
=0
if line pair 8 is to be monitored (see Note 2)
if line pair 8 is inactive
(Reserved)
if line defined is leased
if line defined is switched (see Note 4)
if switched line is manual answer
if switched line uses 'ring indicator' auto answer mode
(Reserved)
Line definition for line pair (needed at set mode
time for output X'46') for type 2 scanner (see Note 6)
0.2
0.3
0.4
0.5
0.6-1.7
0.2
0.3
0.5
0.6-1.7
Line Pair 7 CDS
Byte.Bit
Description
2.
3.
X'0070'
0.0-3
0.4-1.7
=0000
= Transmit leg address for line pair 7 (see Note 1)
X'OO72'
0.0-3
0.4-1.7
=0000
= Receive leg address for line pair 7 (see Note 1)
X'0074'
1.0-7
= SDLC address for line pair 7 (see Note 7)
X'0076'
0.0
=0
if line pair 7 does not require NRZI transmission method (see Note 5)
0.1
=0
=1
=0
=0
=1
=0
=1
=0
if line pair 7 is to be monitored (see Note 2)
if line pair 7 is inactive
(Reserved)
if line defined is leased
if line defined is switched (see Note 4)
if switched line is manual answer
if switched line uses 'ring indicator' auto answer mode
(Reserved)
Line definition for line pair (needed at set mode
time for output X'46') for type 2 scanner (see Note 6)
4.
0.2
0.3
0.4
0.5
0.6-1.7
=
5.
6.
7.
/"-..."
'.
/
'j
.. .
~
i
=
\
Notes:
1.
STORAGE
LOCATION
=
0.4
/'~
"
/
"
j
"'j
\.
./
\.
/
'-.
,
!
/
-"
'\
'-... j
I
",
('''',
"
/
f' -'"
I
\.. /
,r"""'
'-. ./
'",
, ../
Trunk address(es) - The transmit and receive leg addresses must be the "character control block" (CCB) for a type-2
scanner. Refer to LIB section in Volume 2. If the trunk is a half duplex line, the transmit and receive lines must contain
identical addresses.
If a given line pair is not usetj or defined, the appropriate bit must be set on to suppress using it.
When it is possible to load/dump over multiple line pairs, LPG210cks onto a line when an SOLC SIM command is received.
This time limit allows LPG2 to re-I PL itself if the trunk "goes down" during the load / dump process. The re-I PL will allow
LPG2 to scan all lines (SOLC trunks) again. Insert hex values X'" to X'F' for' to 15 minutes timeout.
Switched line support requires a type 2 scanner and the line must be half duplex. No check is made that scanner and mode
are correct. Unpredictable results may occur if defined incorrectly.
NRZI mode of operation is required if business machine clock is in use.
Set mode values.
Byte
Bit
Type 2 CSB
Output X'46'
0.6
0.7
1.0
1.1
1.2
o
o
o
1.4
t.3
Diagnostic wrap mode.
Data terminal ready.
Synchronous bit clock.
Modem provided clock.
1.5
Data rate select.
1.6
1.7
Oscillator select.
Oscillator select.
This bit should normally be O.
This bit should normally be 1.
This bit should normally be 1 with internal clock.
This bit should normally be 1 if modem clock
is to be used.
If 1 on modems with two speeds this will select
the highest of the two available speeds.
These two oscillator select bits, in combination,
are used to select internal oscillator (business
machine clock) to be used.
This is a software address (poll character) defined by the Host NCP with the ADDR operand on the
INNODE macro.
/~~
'-.
/
./
"
'-
"\
,./
r,
"'\
//
.
~-'>"
(~
,./
~_/'
'-
,/
,/
...
/
'-.,
"
I
\
'"
--~-
f
(
(
(
(
(
-
(
(
CONTROL PANEL DISPLAY TECHNIQUES
LPG2 uses the following method to display status
and to report on the progress of the load/ dump
portion of the IPL sequence of a remote 3705.
The display is controlled by the
DISPLAY /FUNCTION SELECT switch and it is
updated every 100 milliseconds. Console
switches are read only at the time the
INTERRUPT pushbutton is pressed.
Contents of the display registers are as follows
except when the DISPLAY/FUNCTION SELECT
switch is in either the STATUS or TAR & OP
REGISTER position.
Normal Display
Normal Display (when functions in 8, C, and D
(which follow) are not invoked):
DISPLAY REG A = FCss
DISPLAY REG 8 = last line with interrupt
where:
FC = remote loader program present
(LPG2)
ss = state of IPL sequence
80
= Monitor for IPL State
40
= Load State
20
= Dump State
10
= Entry Point Received
(for Load)
08
= PIU received, not yet
returned
04
= Reserved
02
= High 8K of storage from
33FD Disk in.
01
= Type 2 Scanner
Indicator
Storage Address
Storage address displays the storage contents at
the address defined by the
STORAGE/ ADDRESS/DATAn REGISTER
switches.
DISPLAY REG A = storage address
DISPLAY REG 8 =contents at that storage
address
Register Address
Register address displays the contents of general
program registers 00 through 1F and
external/hardware registers 40 through 7F.
(
(
(
(
«
(
(
STORAGE ADDRESS/DATA switches =xrxrx
DISPLAY REG A =OrOrO
DISPLAY REG 8 = register rr contents
Note: For the following displays, it is assumed you are
familiar with: 1) SOLC line control and 2) NCP 3.0.
FUNCTION 1: Displays reason for IPL, CDS
line(s) being scanned
DISPLAY REG A = REG '68'
first 4 8its, 8 bits of 0, 4 bits
for 1st, 2nd, 3rd, and/ or 4th
CDS line set being used
DISPLAY REG 8 = NCP Abend
Code if NCP invoked IPL,
LPG2abend code if LPG2
re-IPLed itself (see A8END
later in this section).
FUNCTION 2: ICW display. The interface
address or the line address is
specified by the C, D, and E
switches. Only lines defined in
the CDS can be displayed.
DISPLAY REG A = SCF,PDF
DISPLAY REG 8 = LCD/PCF,
data set leads
(
..
(
(
(
(
(
(
(-
(
(,
(
(
C-.
('- (
(-
("-
('/ ("
DISPLAY REG A= Receive
SDLC station address and
control field
DISPLAY REG 8 = Transmit
SDLC station address and
control field
FUNCTION 5: Display latest PIU received. Low
order switches (D and E) are used
for displacement into PIU
displayed. Zeros in 8 & C
switches indicate work/transmit
PIU. Non-zeros indicate receive
PIU.
DISPLAY REG A = X'OO' or
X'FF' followed by
displacement.
DISPLAY REG 8 = PIU contents
at that displacement.
FUNCTION 6: Displays zeros for 100 ms, then
resets to normal display. If LPG2
detects position 6 while abending,
it hard stops instead of re-IPLing.
Note: Zeros are displayed if invalid addresses are set in
switches.
FUNCTION 3: The current position in storage
pointer when load / dump in
progress and the last request
code received (from PIU) is
displayed along with the state of
the IPL sequence.
DISPLAY REG A = Last request
code received; state of IPL
sequence (see normal
display above)
DISPLAY REG 8 = Storage
Pointer
FUNCTION 4: Displays latest SDLe address and
control fields. The interface
address or the line address is
specified by the C, D, and E panel
switches (keys). Only those lines
defined in the "remote IPL CDS"
can be displayed.
Remote Program Loader Diagnostic Procedures
RPL DIAG240
This page intentionally left blank
{
(
(
(
(
(
(
(
(
(
(
(
(
(
(
f\
3705-80 Configuration Data Set
Writer
The configuration data set (CDS) writer verifies
the write circuitry of the Remote Loader Adapter,
allows the operator or CE to modify either the
'Remote IPL CDS' or the hardware CDS, and
allows the CE to apply program fixes to the
various programs.
ERROR HANDLING
The CDS writer uses the following displays for
communication with the operator or CEo
DISPLAY A
=
DISPLAY B
=
=
=
ECtt where EC defines the
CDS writer and tt defines
the track number that the
head is currently over or
tried to read.
30xx - for information
displays or software errors
COFx - indicates a
write/ read subroutine
error
COxx - indicates a
hardware error
The CDS writer does not use a retry procedure;
all errors are posted immediately.
Error and information displays are
shown on pages RPL 255 and 260.
Remote Program Loader Diagnostic Procedures
RPL DIAG250
..
.
' .
Remote Program Loader Diagnostic Procedures
DISPLAY
A
DISPLAY
ECtt
3001
Explanation
B
A
The CDS writer is awaiting a command to (1) modify the remote IPL
CDS, (2) modify the hardware CDS, or (3) modify a program on the disk
media.
Set the DISPLAY/FUNCTION SELECT switch to FUNCTION 2, set the
STORAGE ADDRESS/REGISTER DATA switches to X'0002' to modify
hardware CDS, or X'0003' to mOdify remote IPL CDS or to modify a
program (remote IPL CDS is contained in LPG1, Z3705MGA). Press the
START pushbutton.
ECtt
ECtt
ECtt
DISPLAY
DISPLAY
B
3005
3024
Explanation
ECtt
C021
Either no interrupt on index occurred or an unexpected interrupt
occurred. X'05' contains the L3 status obtained via input X'69', (bit O.O)
(see Note 1). Card location is 01 A-B 1G2. Refer to FEALD page G E50x.
ECtt
C022
An unexpected interrupt occurred during a head move sequence. X'05'
contains the L3 status obtained via an input X'69' (see Note 1).
ECtt
C023
Either an access control or a gray counter error occurred. X'05'
contains the bits in error masked by X'3COO'. X'03' contains the actual
gray code obtained via input X'69'.
The DISPLAY /FUNCTION SELECT switch was not in FUNCTION 2
position when the command was issued. Set the DISPLAY/FUNCTION
SELECT switch to FUNCTION 2 and press START.
3002
RPL DIAG 255
A table of possible gray code values is located in the IPL procedure
MAP (see Note 1). Card location is 01 A-B1 F2. Refer to FEALD Page
GE30x.
After modifying the CDS or program, the STORAGE
ADDRESS/REGISTER DATA switches should have been set to
X'EEEE'. Set the switches properly and press START.
ECtt
C024
An interrupt on index failed to occur within the alloted time. The time
alloted for a 3705-80 is 177.5 ms (see Note 1).
The hardware CDS is loaded into storage and ready for modification.
Refer to the hardware CDS description to configure the CDS properly.
ECtt
C026
An L 1 interrupt occurred from the remote adapter. X'05' contains the
L 1 status obtain"d via input X'68' (see Note 1). Card location is
01A-B1 E2. Rerer to FEALD page GE403.
ECtt
C03B
The head failed to engage .. X'05' contains the L3 status obtained via
input X'69' (see Note 1). Card location is 01 A-B1 G2. Refer to FEALD
page GE503.
ECtt
C081
The initial character service interrupt on a read operation failed to
occur. Change the disk media and re-IPL (see Note 1 and Note 2).
ECtt
C082
An access error occurred; the track 10 did not match the expected ID
(see Note 1 and Note 2).
ECtt
C083
A character service interrupt after the first one failed to occur on read
operation.
It is possible to transfer the CDS from one disk media to another by
bringing the media with the CDS to this point and changing disk media.
ECtt
3026
The track header has been modified. Press START to return to stop
code X'3001' or re-IPL.
ECtt
302F
The hardware CDS has been successfully written onto the disk. Press
START to return to stop code X'3001' if additional commands are
required.
ECtt
3031
The program is awaiting the ID of the program to be modified. Enter
the program 10.
ECtt
3032
The requested program could not be found on the disk media. Press
START to return to the stop code X'3031 '.
ECtt
3034
The requested program has been read into storage for modifying.
Apply the zap as per instructions.
ECtt
C084
A CRC error occurred on one of the track records. Change the disk
media and re-IPL (see Note 1 and Note 2).
When the zap is applied, set the STORAGE ADDRESS/REGISTER
DATA switches to X'EEEE' and press START.
ECtt
COF1
The head failed to engage during a write operation. Register X'05'
contains the level 3 status obtained via an input X'69' (see Note 1)
Priviledged areas of storage have been modified. Press START to
return to stop X'3031' for restart.
ECtt
COF2
An unexpected L3 interrupt occurred on a write operation. X'05'
containes the level 3 status obtained via input X'69'. Reg X'05' bits are
defined as: bit 1.0 (motor/media error), bit 1.4 (overflow), bit 0.0
(index), and bit 0.7 (character service) (see Note 1).
This is probably a remote adapter timing error (see Note 1 and Note 2).
ECtt
ECtt
3036
The requested program has been successfully written onto the disk
media. Press START to return to stop code X'3031'.
303F
o
,
I
'- ;/
\----_/
(
(
(
(
DISPLAY
DISPLAY
(
(
(
{
(
(
(
(
(
(
(
(
(
(
(
Explanation
A
B
ECtt
COF3
An overrun error occurred during a write operation. X'05' containes
the L3 status obtained via an input X'69' (see Note 1).
ECtt
COF4
A motor/media error occurred during a write operation. X'05' contains
the L3 status obtained via input X'69' (see Note 1).
ECtt
COF6
Head engage failed to set during a read operation that was to verify the
previous write operation. X'05' contains the level 3 status obtained via
input X'69' (see Note 3).
ECtt
COF7
An unexpected L3 interrupt occurred during a read operation that was
to verify the previous write operation. X'05' contains the L3 status
obtained via input X'69' (see Note 3).
ECtt
COF8
An overrun error occurred during a read operation that was to verify
the previous write operation. X'03' contains the L3 status obtained via
input X'69' (see Note 3).
ECtt
COFA
Write/Read error(s} occurred. It is assumed that cause of this read
error is that the write operation failed. Reg X'06' contains the number
of errors that occurred. Reg X'05' contains an address pointer to the
expected data for the first error. To determine the actual data read back
from disk, add X'1500' to the address pointer contained in Reg X'05',
Reg X'04' contains the starting address of the write buffer. The
difference between Reg X'04' and Reg X'05' will indicate at what point
of the track record the first error occurred (see Note 3). Refer to (1)
FEALD page GE30X, card location 01A-B1 F2, (2) FEALD page GE50X,
and (3) FEALD page G E20X.
Note 1: To set up a scoping loop, set the control panel FUNCTION SELECT SWITCH to FUNCTION 3. Press START. The
program will continue to loop as long as FUNCTION 3 is active. See Note 2 for an additional scoping procedure.
Note 2: Display storage location X'1302' to determine the track number on which the read failure is occurring. Using this track
number, refer to MAP 8 and the ROS program listing to set up a scoping loop.
Note 3: To set up a scoping loop, set the control panel FUNCTION switch to FUNCTION 4. Press START. The program will
continue to loop (write/verify) as long as FUNCTION 4 is active. All errors that refer to this Note are assumed to be caused by
failures in the write circuitry.
Remote Program Loader Diagnostic Procedures
RPL DIAG 260
This page intentionally left blank
(
(
(
(
3705-80 I FT Diskette Loader
Description
The 1FT Diskette Loader (Z3705NCA 3705-80)
resides on a 3.3FD diskette media with the
Internal Functional Tests (IFTs). The loader
provides an interface between the Diagnostic
Control Monitor (DCM) and the Remote Loader
Adapter.
Load Program 1 (LPGM1) controls loading ofthe
1FT Diskette Loader. The 1FT Diskette Loader is
loaded into the 3705 storage after Initial Test
(INIT) has been executed if a diagnostic load is
requested.
A diagnostic load is requested by setting the
DISPLAY /FUNCTION SELECT switch to the
STORAGE ADDRESS position, setting STORAGE
ADDRESS/REGISTER DATA switches 8 through
E to X'DDDD', and pressing LOAD and
INTERRUPT. The IFTs load from the diskette
media and execute exactly the same as if loaded
via the channel adapter. Loading the Panel Line
Test requires that STORAGE
ADDRESS/REGISTER DATA switches 8 through
E be set to X' AADD'.
The 1FT Diskette Loader executes in program
level 1 and is located in storage at addresses
X'3COO' - X'3FFF'. In addition to the 1FT Diskette
(
(
(
(
(
(
(
(
(
(
('
(
(
Loader, a linkage handler and program ID/track
number table (track allocation table) is loaded at
location X'11 00'. A control table is loaded at
X'1300'.
Error Handling
The 1FT Diskette Loader reports errors with the
following displays.
DISPLAY A = DCtt
where:
DC indicates the 1FT Loader and tt is the
current track 10
DISPLAY 8 = 30xx or COxx
where:
30xx indicates a program error stop code or
information display
COxx indicates a hardware error stop code
The 1FT Diskette Loader improves the availability
of a given 1FT with a retry procedure. The retry
count is set to 4 each time a track read begins. If
a X'COxx' error occurs, the loader resets the
Remote Loader Adapter and attempts to read the
diskette again. When the retry count is
exhausted, the loader posts an error code and
hard stops.
Error and information displays are shown
on the following page (RPL DIAG 310).
Remote Program Loader Diagnostic ProlC,'lJc~ures
RPl DIAG 300
This page intentionally left blank
(
(
DISPLAY
A
DISPLAY
B
DCtt
3031
DCtt
3032
(
(
(
«
(
(
(
(
Explanation
(
(
(
(
(
DCtt
C021
Either no interrupt on index or an unexpected interrupt occurred. Reg
X"05" contains the L3 status obtained via input X"69" (see Note 1). Card
location is 01 A-B 1G2. Refer to FEALD page GE50X.
An invalid program 10 was requested. Display register X"05" to
determine what program was requested. Refer to the table below to
determine the program 10.
DCtt
C022
An unexpected interrupt occurred during the head move sequence. Reg
X"05" contains the L3 status obtained via input X"69" (see Note 1).
DCtt
C023
Either an access error or a gray counter error occurred. Reg X"05"
contains the bits in error masked by X"3COO". Reg X"03" contains the
actual gray code obtained via X"69". A table of possible gray counter
codes is located in the IPL procedure MAPs (see Note 1). Card location is
01 A-B 1F2. Refer to FEALD page GE30X.
DCtt
C024
No interrupt on index signal occurred within the alloted time after a head
access sequence. The alloted time is 172.9 ms on a 3706-80 (see Note 1).
DCtt
C026
A level 1 interrupt occurred from the remote adapter. Reg X"05" contains
the L1 status obtained via input X"68" (see Note 1).
DCtt
C03B
The head engage bit failed to come on in register X"69". Reg X"05"
contains the L3 status obtained via input X"69" (see Note 1).
DCtt
C081
The initial character service interrupt failed to occur on a read operation.
Change the diskette media and re-I PL. Storage location X" 1302" contains
the track number of the failing track (see Note 1 and Note 2).
DCtt
C082
The track 10 read from the track did not match the expected track 10.
Storage location X"1302" contains the track number of the failing track
(see Note 1 and Note 2).
DCtt
C083
No character service interrupt occurred on a data byte after the first one.
This is a probable remote adapter timing error. Storage location X"1302"
contains the track number of the failing track (see Note 1 and Note 2).
DCtt
C084
A CRC error occurred on one of the track records. Change the diskette
media and re-IPL. Storage location X"1302" contains the track number of
the failing track (see Note 1 and Note 2).
C Translates
D Translates
E Translates
F Translates
G Translates
H Translates
I Translates
J Translates
K Translates
L Translates
MTranslates
N Translates
o Translates
P Translates
303F
,, r
The 1FT Diskette Loader could not find the DCMs 10 (X"0003") in the
diskette track table which starts at location X"1200". The diskette track
table may have been changed; change diskette media and re-IPl.
1B Translates
Translates to
to
DCtt
(
DISPLAY
B
Z3 70 5 n n A
3039
(
DISPLAY
A
The most likely cause for this error is an invalid adapter defined in the
hardware CDS. After verifying the CDS, press START to return to the
DCM; the DCM should post an additional error.
DCtt
(
to
to
to
to
to
to
to
to
to
to
to
to
to
to
IL-,
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
ATranslates
Translates
C Translates
D Translates
E Translates
F Translates
G Translates
H Translates
I Trans lates
J Translates
K Translates
L Translates
M Translates
N Translates
0 Translates
B
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
Explanation
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
The DCM requested test termination. Press START to restart the DCM or
re-IPL.
This is an information type stop to indicate that intermittent errors
occurred in either RDS and/or LPGM1.
Display storage location X"1330" to determine the number of errors that
occurred. The starting count was X"EFFF", byte 0 is the complement of 18
decimal. For each error, byte 0 will be one greater; X"F3FF" represents
five errors.
Storage locations X"063C" and X"063E" represent the CE trace reg
X"04" and X"06" respectively. These locations will be X"OOOO" if no
error occurred in RDS. Refer to the IPL procedure MAPs and use the trace
data to determine the type of error.
Note 1: To set up a scoping loop, set the control panel DISPLAY/FUNCTION SELECT SWITCH to FUNCTION 3. Press start.
The program will continue to loop as long as FUNCTION 3 is active. See Note 2 for an additional scoping procedure.
Note 2:
Display storage location X'1302' to determine the track number on which the read failure is oceuring. Using this traek
number, refer to MAP 8 (in this section) and the ROS program listing to set up a seoping loop.
If reg X"06" is not X"OOOO", the last error occurred in LPGM1. Refer to
the IPL procedure MAPs and use the trace data to determine the type of
error.
Storage location X"062F" will be X"OOOO" if intermittent track 10 errors
occurred, X"062F" will be X"FOB8" if intermittent CRC erroriS occurred.
Remote Progr~m L.oader Diagnostic Pr:ocadures
RPL DIAG 310
(
-~--~--
--
This page intentionally left blank
/
"
~
'"
.~.
/
i
r~
-~
"
/
/
r
"
j
~
rl
"_- /
\-
'"
C)
\,
/
/
I
i~
("--~
/""\
",--/1
\'-_/
"
J
."r-"",
_/
-, -- )
0
'---
(
/'
"
f'
"\
j
"
---
/
_./
-,
,/::._\
'-
-
r-"",
"
)
I
,
I
--",
(
(
(
(
(
(
(
(
(
(/ (
(
( --
(
••••
Channel Adapter Online Test (CA
OlT)
WHAT CA OLT DOES
CA OLT attempts to identify card faults that have
the following failure symptoms. All the cards
listed below are on gate 01 A, board position A4
or B1:
Failure Symptom
Card
Location
Command decode
2325
A4M2
Status
2325
2326
7602
A4M2
A4T2
A4L2
Sense
7601
A4P2
Residual byte count
7602
A4L2
Traps ESC address when 2325
ESC lines not enabled
2326
A4M2
A4T2
2342
6836
6836
6837
A4N2
A4Q2
A4S2
A4R2
AC05
AC06
**J2
**H2
Widespread errors
Interface A
Interface B
Extended buffer*
control circuits
data flow
Cycle Steal*
control circuits
data flow
CE25
CE24
* type 4 CA only
** A4 or B1
**E2
**02
Note: If the CUTEST questions receive a C
(cancel) response just before the test is run, all
test sections print out a diagnostic message
indicating the section did not run.
HOW CA OLT IS STRUCTURED
The CA OLT consists of the following test
sections:
T3705AA
T3705AB
T370SAC
T370SAD
T370SAE
T370SAF (type4 CA only)
T370SAG (type 4 CA only)
T3705AH (type 4 CA only)
T370SAI (type 4 CA only)
T3705AA, T3705AB, and T3705AC CA OLT
Description
Test sections T370SAA, T370SAB, and T370SAC
primarily test the common controls and interface.
The 370S-80 ROS bootstrap program responds to
the functions of these three sections.
T370SAB, routines 3 and 4, test Halt I/O (HIO)
and Test I/O (TIO) commands. These routines
do not check the results of the tests if the CDS
for the line being tested defines it as shared;
Online Test Standalone Executive Program
(OLTSEP) does not process the command
requested if the line is shared.
T3705AD and T3705AE CA OLT
Description
Test sections T370SAD and T370SAE issue I/O
commands to the NSC and ESC addresses.
Before T370SAD or T370SAE is started, a
responder program (U370SA), which responds to
their commands, is loaded into the 370S-80.
When the responder is successfully loaded in the
370S-80, the ROS bootstrap program turns
control over to the responder program. Failure to
load successfully results in an error printout
similar to that resulting from errors in normal test
functions.
T3705AF AND T3705AH DESCRIPTION
REQUIREMENTS
You must have the proper configuration data set
(CDS) cataloged with the remainder of the
system. (For additional information, see the CDS
section.) Note that T3705AE wraps the ESC
address and terminates if the ESC address is
missing in the test request message
(DEV /TEST /OPT) or in the native subchannel
(NSC) CDS.
T370SAF and T370SAH are 370S type 4 channel
adapter test sections and will not run on a type 1
channel adapter.
T3705AF and T370SAH use responder modules
U370S1 and U370SJ. U370S1 is loaded into the
370S with an IPL command. Chained to the IPL is
a write command to load U370SJ.
U370S1 loads U370SJ at X'800' in the 370S
storage and gives ending status to the I/O
operation that loaded them; then transfers
control to U370SJ. U370SJ sets various mode
states according to the routine being run.
T370SAF and T370SAH each consist of eight
routines. Each routine sends a 4 byte signal prior
to a test. The signal identifies the routine and
gives the responder a count with which to
regulate the read byte count.
At the end of this test the routine requests and
receives a count of the data written. An error
message results if the count is wrong.
Routine OS can be made to loop 2S6 times by
entering EXT = L in the options field of the test
request message to employ a longer wrap
operation. The extra looping increases the run
time for T370SAF or T370SAH from about 10-1S
seconds to about 3 1/2 minutes.
T3705AG AND T3705AI DESCRIPTION
T3705AG and T3705AI are 370S type 4 channel
adapter test sections and will not run on a type 1
channel adapter.
T3705AG and T3705AI use responder modules,
U37051 and U370SK. U370S1 is loaded into the
3705 with an IPL command. Chained to the IPL is
a write command to load U3705K.
1FT EXECUTION
3705 Setup Procedures
1. Switch the 3705 power on.
2. Set both the MODE SELECT and
DIAGNOSTIC CONTROL switches to the
PROCESS position.
3. Enable the appropriate channel interface.
4. To load the DCM, set the
DISPLAY /FUNCTION SELECT switch to the
STATUS position. For information on using
the other positions, see "How to Use the
DISPLAY/FUNCTION SELECT Switch" in
the DCM section.
5. Press the RESET pushbutton and then the
LOAD pushbutton.
6. DISPLAY B bits 0.2 and 0.3 should be on,
indicating that ROS has reached IPL phase
3. The LOAD light should be on; the
following lights should be off: HARD STOP,
TEST, WAIT, and PROGRAM STOP.
If the above conditions are not present, refer to
the CE panel test in the CTRL PNL section and the
ROS test in the ROS section (Volume 2).
Host Procedures
Start the OLTEP or OLTSEP in the host
processor. When OLTEP or OLTSEP causes a
console printer message of:
rID 'ENTER DEV /TEST /OPT /'
you enter:
U37051 loads U3705K at X'800' in the 3705
storage and gives ending status to the I/O
operation that loaded them; then transfers
control to U3705K. U3705K sets various mode
states according to the routine being run.
T3705AG and T3705AI each consist of four
routines. Each routine sends a 4 byte signal prior
to a test. The signal identifies the routine and
gives the responder a 3705 storage address
where the test message is to be written and read.
This section tests the type 4 channel adapter
cycle steal mode.
At the end of these tests the routine requests and
receives a count of the data written. An error
message results if count is wrong.
r ID,'xxx,yyy/3705AA-AE/NFEi'
where:
xxx
=
yyy
=
the channel address of the 3705 (native
subchannel address (NSC»
an emulation subchannel address (ESC)
The test request message for the CA OLT must
include the 3705 native subchannel address
followed by the emulation subchannel address.
T3705AA and T370SAE test the NSC and ESC
addresses. If only the NSC address is entered in
the device field of the test request message,
T3705AA bypasses that part of the test using the
second address (the last half of routines 1 and 2).
T3705AE looks for a second address in the test
request message and for an emulation line
definition in the NSC CDS. If either is missing, a
message (NO ESC ADDRESS DEFINED IN NSC
Channel Adapter Online Test
CAOLT010
Chanr,el Adapter Onlii,e Test
CDS OR TEST REQUEST} is printed out and the
test section is terminated.
Explanation: The OLT cannot determine the'
status (offUneotstopped) of the 3706; lfthe
OLT is all6wed'to continue, the program in
3705 storagewilf be destroyed.
For example, assume that you entered:
R 01,'005,020/3705AA-AE/NFEI'
Response: Continue by entering a Cor P,as
follows:
When an emulation line address is entered in the
device field of DEV/TEST/OPT!, DOS/OLTEP
prints a DVC NOT OP message for that address.
OLTEP performs a data protection function when
the emulation line address is not available.
Condition code 3 results and the printout occurs.
rid/C' (for cancel)
or
r id,'P' (for proceed)
Any other response results in the program's
repeating the last line of the above message.
After five invalid responses, the message
INVALID RESPONSE AFTER 5 REQUESTS is
printed.
Routine 2 of T3705AC requires manual
intervention. The option MI must be included in
the test request message for this routine to be
run.
ALL 3705 ADDRESSES ARE NOT STOPPED OR
OFFLINE. **WARNING** CONTINUATION WILL
CAUSE THE ENTIRE 3705 TO BECOME
UNAVAILABLE. ENTER'C' TO CANCEL OR 'P'
TO PROCEED, OR 'R' TO RETRY~
If any of these OLT sections are run by reading
them in from the card reader, U3705C must
follow the first section called for in the test
request message. Test sections T3705AD and
T3705AE also require the 3705 responder
program, U3705A, to follow each deck.
Explanation: The OLT has been notified by the
executive driver that all 3705 addresses are
not offline or stopped. If the OLTis allowed
to continue, the program in 3705 storage will
be destroyed.
On termination, T3705AD and T3705AE issue an
invalid channel Write I PL command (4 bytes of
zeros) to leave the 3705 in a ROS-Ioaded state.
Routines 3 and 4 of T3705AB test the Halt I! 0
and Test I/O commands. These routines are run
only under OLTSEP and are bypassed if the
executive program is not OLTSEP. If these
routines are requested and th.e executive is other
than OLTSEP, the start and terminate messages
appear but the routines are not run.
Response: You have the opportunity to make
all addresses available to the OLTusing
standard system facilities. Continue by
entering a C, P, or R, as follows:
r id,'C' (for cancel)
or
r id,'P' (for proceed)
or
r id,'R' (for retry)
MESSAGES
Messages occur during operation of the CA OLT
that indicate: (1) an error has been detected or (2)
an action is needed to either cancel, proceed, or
retry the requested CA OLT procedure. The
messages, message explanations, and responses
are as follows:
TheP response means to proceed regardless
of the o.ffline or online status of the 3705
address; the R response means that the
operator has been taking addresses offline
and wants the program to verify that all units
are now available to the OLT.
THE STATUS OF THE 3705 CANNOT BE
DETERMINED. **WARNING** CONTINUATION
WILL CAUSE THE ENTIRE 3705 TO BECOME
UNAVAILABLE. ENTER 'C' TO CANCEL OR 'P'
TO PROCEED.
Anyother response results in the program's
repeating the last line of the above message.
After five invalid responses, the message
INVALID RESPONSE AFTER 5 REQUESTS is
printed.
INVALID RESPONSE AFTER 5 REQUESTS
Ex.plaiJation:.The :pr,oQl'arnassumed the
re.sponse,ofCand termiriitedthe OLT.
<
CAOLTERFlO.R I'NFORMATION '.
When the CAOLTdetectsan error (bad CSW, CC,
sense" data~,. etc•.), all' error printout occurs at the
hostp,rocessGrPti'ntei\ All pertinent i·nformation
about the errorthatcan be obtained by the OtT
appears. in theprirltout;
If the error printout reports that no interrupt
occurred from the 3705, see "Responder Error
Displays" later in this section.
When an interface control check causes a
machine check, OLTSEP enters its WAIT state
with an error code displayed in the instruction
counter of the host processor. The wait state
error codes are defined in the OLTSEP
Operator,'s Guide, D99.,.SEPDT: Such a machine
check is catastrophic to OLTEP under OS or DOS.
Running SE.REP is the next logical step if sucha
failure occurs.
The. message ID number for the failing section of
the online test is printed in the first 3 digits of the
test description (second line) of the DPRINT
messag.e. The test section numbers and the
corresponding message ID numbers follow:
Test Section
Number
Message ID
Number
T3705AA
T3705AB
T3705AC
. T3705AD
T3705AE
T3705AF*
30-41
42-53
54-62
63-76
77-88
1-19
1-9 and 20-29
1-19
1-9 and 20-29
T3705AG~
T3706AH*
T3705AI*
*type 4CA only
:.r-,
"'"
,
-,'/
~I
\
" /
'-
A
\,,--y
('""1
(~
I"
"'-j
"
'"
~-~
(.
'",
For a description of the error printout format,
refer to DOS OLTEP SRL, GC24-5086;IBM
System !3600p~ratingSystem On-Line Test
Ex~cutive Program, <3028.,.6650; and OLTSEP
Operator'sGuide~ 099-SEPDT.
Responder Error Displays
The following is a ~escription of the responder
error codes: The DISPLAY/FUNCTION SELECT
/
/
'-
/
«\
("~\
',-/
"--
j
U37051 Responder Display .Codes
(DISPLAY B)
CODE
MEANING
C200
C202
C203
C204
C20A
Non CA L 1 (CCU, CSB, etc.)
CA2 selected for IPL, but L3 not set
CA 1 selected for IPL, but L3 not set
Unexpected CAL 1
Unknown L3 (not timer, PCI,. panel or
CAS)
Unknown CA L3 inter'rupt
Inbound transfer when not expected
Inbound transfer with count of zero
Unexpected command received
Normal display code
C20E
C210
C211
C212
C2FF
U370fiJ_ iind U3705KResponder Display Codes
. (DISPLAY B)
CODE
MEANING
C200
C202
C203
C204
C20A
Non channel adapter L 1 (CCU, CSB, etc.)
CA2 selected for IPL, but L3 not set
CA 1 selected for IPL i but L3 not set
Unexpected CA L1
Unknown L3 (Not timer, PCI, panel or
CAS)
Branch to zero detected
Unknown CA L3 interrupt
Inbound transfer when not expected
Inbound transfer with countofzero
Unexpected command received
Normal display code.
C20C
C20E
C210
C211
C212
C2FF
Test Section Description
Test Section T3705AA
<
r
switch must nClt be in either the STATUS or the
TAR & OP REGISTER positions. These.error
codes do not isolate errors but indicate that an
error has occurred. The program sets oneofthe
codes below inDISPLAY B and sets HARD STOP.
To continue, press the START pushbutton. If the
DISPLAY!FUNCTION SELECT switch is in
FUNCTION 5,the program will not stop on type 1
CA level 1 interrupts ..
!~\,
'", --j
;"---,,
"'_/
Routine 01: Checks No-op command.
(Issues a No-op command to the NSC address.)
01001 Expected results:'
Condition code
First CSW status
Expec,;te~ sense
01,
ocbo
00
:CAOLT020
(
(
(
(
('
(
(
(Issues a No-op command to the ESC address.)
01002 Expected results:
Condition code
03
(
(
(
(
(Issues the Write Break command to the NSC
address, which has not been initialized.)
02001 Expected results:
(Issues a Write IPL command with an invalid byte
count of 1 to the NSC address.)
Condition code
Ending status
Expected sense
Condition code
Ending status
Expected sense
00
OFOO
02
(Issues a Write IPL command with an invalid byte
count of 1 to the ESC address, which has not
been enabled.)
(
Routine 02: Checks Write Break command.
Routine 02: Checks Write IPL command.
02001 Expected results:
(
00
OEOO
02
Routine 03: Checks Halt I/O operation. This
routine runs under OLTSEP only.
(Issues a Halt I/O command.)
03001 Expected results:
Condition code
Initial status
Expected sense
03
Routine 03: Checks illegal commands.
(Issues all illegal commands to the NSC address
on consecutive passes.)
03001 Expected results:
01
0000
00
Condition code
Ending status
Expected sense
00
OEOO
82
Routine 04: Checks Write command.
(Issues the Write command to the NSC address,
which has not been initialized.)
04001 Expected results:
Condition code
Ending status
Expected sense
00
OEOO
02
Test Section T3705AB
Routine 04: Checks the resulting status of Test
I/O command. This routine runs under OLTSEP
only.
(Issues a Test I/O command.)
04001 Expected results:
Condition code
First CSW status
Expected sense
(Writes 18 bytes of data with the Write IPL
command.)
Condition code
First CSW status
Expected sense
OEOO
(
(
(
($ets attention equals YES, and issues a No-op
command.)
This is a manual intervention routine. The manual
interventionoptionmustbe specified in the
request for test, or this routine is bypassed. A
message to the operator requests 'PRESS THE
LOAD PUSHBUTTON ON THE 3705 CONTROL
PANEL'.
(
(
",
(' (
(
(~'
('
f'
(' ('
02002 Expected results:
Condition code
Initial status
Ending status
Expected sense
00
0800
0400
00
Routine 03: Checks 1-byte data wrap.
(Writes 1 byte of data.)
If the LOAD pushbutton is not pressed within 60
seconds after the operator message, a time-out
results. An error message presents the first
CSW status as shown below, but the ending or
second CSW status is zeros:
Condition code
First CSW status
Ending status
Expected sense
01
OCOO
0600
00
Test Section T3705AD
T3705AD requires the responder program
U3705A (see "T3705AD and T3705 AE CA OLT
Description" earlier in this section). All
commands in T3705AD are issued to the NSC
address.
Routine 01: Checks data transfer with the Write
command.
03001 Expected results:
Condition code
Initial status
Ending status
Expected sense
00
0800
0400
00
(Issues a Read command with a byte count of 4.
Data is compared to verify 1 byte read.)
03002 Expected results:
Condition code
Initial status
Ending status
Expected sense
00
0800
0400
00
Routine 04: Checks 3-byte wrap.
(Writes 3 bytes of data.)
04001 Expected results:
01001 Expected results:
Condition code
First CSW status
Second CSW status
Expected sense
00
0800
0400
00
Condition code
00
0800
Initial status
Ending status
0400
Expected sense
00
(Issues a Read command with a byte count of 4.
Data is compared to verify bytes read.)
04002 Expected results:
The ending status presented because of an
invalid Write IPL command is channel end, device
end, unit check, and unit exception. This status is
presented by ROS. The second 2 bytes of data
transferred do not contain a count of 18.
(Issues the Read command to the NSC address,
which has not been initialized.)
00
(
(Writes 4 bytes of data.)
Routine 01: Checks the transfer of data using
Write IPL command.
01001 Expected results:
Condition code
Ending status
Expected sense
00
0000
00
Test Section T3705AC
Routine 01: Checks Read command.
01001 Expected results:
(
02001 Expected results:
02002 Expected results:
Condition code
(
Routine 02: Checks data wrap with the Write
and Read commands.
(Writes and reads 4 bytes of data. Data read is
compared for accuracy.)
Condition code
Initial status
Ending status
Expected sense
00
0800
0400
00
02001 Expected results:
00
OFOO
02
Condition Code
Initial status
Ending status
Expected sense
00
0800
0400
00
Routine 02: Tests the ROS-generated
asynchronous status.
02
Channel Adapter Online Test
CA OlT030
.,'>
Channel Adapter Online Test
Routine 05: Checks data wrap with the Write
and Read commands using command chaining.
Routine 01: Checks that a No-op command
causes channel and device end.
01002
(Issues a Write command of 4 bytes chained to a
Read command of 4 bytes.)
(Issues a No-op command to the NSC address.)
Condition code
First CSW status
Second CSW status
Expected Sense
01002 Expected results:
05001 Expected results:
Condition code
Initial status
Ending status
Expected sense
00
0800
0400
00
Condition code
First CSW status
01
OCOO
(Issues a No-op command to the ESC address.)
01003 Expected results:
A failure in this routine and not in other routines
might be due to chaining failure; suspect card
2342 at A4N2.
Routine 06: Checks NSC status byte.
(Issues a Write Break command with a byte count
of 4.)
The status presented here is not a valid
presentation of status, but a test of the ability to
set status bits.
06001 Expected results:
Condition code
First status
Second status
Expected sense
00
CCOO
0000
00
Routine 07: Checks for status modifier, control
unit end, and busy.
(Issues a No-op command.)
The responder sets up to present the initial and
ending status as indicated below. As in the
previous routine, this is a test for the ability to
set status bits.
07001 Expected results:
Condition code
Initial status
Ending status
Residual Count
Expected sense
01
7000
8400
00
00
Test Section T3705AE
T3705AE requires the responder program
U3705A (see "see T3705AD and T3705AE CA
OLT Description" earlier in this section).
Condition code
First CSW status
01
OCOO
Routine 02: Checks data wrap with the Read
and Wrap commands.
(Issues a Read command to the NSC address [18
bytes]. Issues a Wrap command to the ESC
address [18 bytes].)
02001 Expected results (NSC address):
Con~Htion
code
First CSW status
Second CSW status
Expected sense
00
0800
0400
00
00
OOCO
0000
00
Routine 02: Checks 36 Byte Data Wrap in
Extended Buffer Mode
This routine writes a 36 byte message on the first
test address and reads the message back on the
second address. This wrap is made in extended
buffer mode. The first inbound data/status
interrupt occurs when the 32 byte buffer is filled.
The second data/status interrupt occurs with the
remaining 4 bytes written and the occurrence of
channel stop.
02002
Condition code
Initial status
Ending status
Expected sense
02002
Condition code
00
First CSW status
OCOO
Expected sense
00
CANCEL/ PROCEED messages for
each pass
Test Section T3706AF
Routine 01: Checks Normal Mode Wrap Test
This routine writes a 16 byte message on the first
test address and reads the message back on the
second address. The wrap is made in normal
mode (not extended buffer mode) and inbound
datal status interrupts occur each time a 4 byte
buffer is filled.
01002
Expected results from the
Write
Condition code
First CSW status
Second CSW status
Expected sense
00
0800
0400
00
Condition code
Initial status
Ending status
Expected sense
Expected results from the
Write
00
0800
0400
00
Expected results from the
Read
/
00
OCOO
0000
00
Condition code
Initial status
Ending status
Expected sense
The 34th character in the message is an ETB.
This causes the CA to present channel stop to the
responder. The write ends with a residual count
of 2. The read command receives only 34 bytes
and ends with a residual byte count of2. On the
second pass, the ETB is replaced with an ETX.
Expected results from the
Write
I
"-/
00
0800
0400
00
Expected results from the
Read
00
OCOO
0000
00
Routine 04: Checks Recognition of ETB and
ETX in ASCII Mode
This routine writes a 36 byte message on the first
test address and reads the message back on the
second address. This wrap is made in extended
buffer mode. The first inbound data/status
interrupt occurs when the 32 byte buffer is filled.
The second datal status interrupt occurs with the
remaining 4 bytes written and the occurrence of
channel stop.
The 34th character in the message is an ETB and
causes the CA to present channel stop to the
responder. The write command ends with a
residual count of 2. The read command receives
only 34 bytes and ends with a residual byte count
of 2. On a second pass, the ETB is replaces with
the ETX.
04002
Routine 03: Checks Recognition of ETB and
ETX in EBCDIC Mode
This routine writes a 36 byte message on the first
test address and reads the message back on the
second address. This wrap is made in extended
buffer mode. The first inbound datal status
interrupt occurs when the 32 byte buffer is filled.
The second data/status interrupt occurs with the
remaining 4 bytes written and the occurrence of
channel stop.
03002
Condition code
Initial status
Ending status
Expected status
03002
02001 Expected results (ESC address):
~
)
Expected results from the
Read
Condition code
Initial status
Ending status
Expected sense
04002
Condition code
Initial status
Ending status
Expected sen'se
Expected results from the
Write
00
0800
0400
00
Expected results from the
Read
00
OCOO
0000
00
Routine 05: Checks the Recognition of
DLE-STX
A 72 byte message with the DLE-STX character
sequence inserted after 36 Bytes is written. ETB
":CArOLT 040
(
(
(
(
(
and ETX characters are also inserted in the data
following the DLE-STX sequence. The DLE-STX
sequence causes the CA hardware to stop
monitoring for control characters. The ETB and
ETX characters should not cause an end to the
write. All data written is read back on the ESC
address.
This routine is performed first in EBCDIC mode,
and then in ASCII mode.
=
If EXT L is entered in the test request message,
this routine will loop 256 times.
05002
Condition code
Initial status
Ending status
Expected sense
05002
Condition code
Initial status
Ending status
Expected sense
Expected results from the
write
00
0800
0400
00
Expected results from the
Read
00
OCOO
0000
00
Routine 06: Checks OLE Remember
Two 36 byte messages are written on the native
sub-channel address. The OLE is the last
character of the first message. The STX is the
first character of the second message. The
responder, sees the OLE remember latch bit set
because of the OLE. When the second Write is
recognized the responder sets this bit in register
X'6C'. The arrival of the STX character then
causes the hardware to stop monitoring for
control characters. Subsequent control
characters, not being recognized by hardware,
should not cause the write to end.
(
(
(
(
06002
Condition code
Initial status
Ending status
Expected sense
06002
Condition code
First status
Second status
Expected sense
This routine is performed first in EBCDIC mode
then in ASCII mode.
(
Expected results from the
Write
00
0800
0400
00
Expected results from the
Read
00
OCOO
0000
00
Routine 07: Checks SYN Character Monitor
Test (Positive)
This routine writes a 16 byte message. The first
pass has 4 EBCDIC SYN characters as the first 4
characters. The hardware is set to EBCDIC
mode, disconnects from the channel, and
presents a level 3 interrupt to the responder. The
responder presents ending status to the write if it
sees the SYN Monitor bit set. On a second pass,
the SYN characters and mode are changed to
ASCII mode.
Because the write command is terminated after 4
bytes, a residual byte count of 12 results. The 4
bytes written are read and verified. The read
command is also a 16 byte read and ends with a
residual byte count of 12.
(
Condition code
Initial status
Ending status
Residual count
Expected sense
Condition code
First status
Second status
Residual count
Expected sense
Expected results from the
Read
00
OCOO
0000
OC
00
Routine 08: Checks SYN Character Monitor
Test (Negative)
This routine writes a 16 byte message. On the
first pass, the 3705 is placed in EBCDIC mode.
(
(
(
(
--
(-' (
(
02002
The channel adapter hardware should not
recognize a SYN character sequence. On the
second pass of the test, the mode and the SYN
characters are reversed. The results should be
the same.
Condition code
Initial status
Ending status
Expected sense
08002
00
0800
0400
00
00
Expected results from the
Read
Condition code
First status
Second status
Residual count
Expected sense
00
oeoo
0000
00
00
Routine 01: 250 Byte Wrap Test
This routine writes a 250 byte message on the
first test address and reads the message back on
the second address. The responder sets the
channel adapter to the cycle steal mode.
Expected results from the
Write
Condition code
First CSW status
Second CSW status
Expected sense
01002
00
0800
0400
00
Expected results from the
Read
CondffionCode
First CSW status
Second CSW status
Expected sense
00
OCOO
0000
00
Routine 02: Checks 255 Byte Data Wrap
This routine writes a 255 byte message on the
first test address and reads the message back on
the second address. The responder sets up the
channel adapter for cycle steal mode.
("~ ('
f
00
0800
0400
00
Expected results from the
Read
Expected results from the
Write
Condition code
Initial status
Ending status
Residual count
Expected sense
f'
Expected results from the
Write
02002
08002
Expected results from the
Write
00
0800
0400
OC
00
(
The first 4 bytes of the message are ASCII SYN
characters.
01002
07002
07002
A 72 byte read command is issued to the ESC
address. All 72 bytes written by the 2 write
commands are read back.
(
Condition code
Initial status
Ending status
Expected sense
00
OCOO
0000
00
Routine 03: Checks the 512 Byte Wrap Test
This routine writes a 520 byte message on the
first test address and reads the message back on
the second address. The responder sets the
channel adapter to cycle steal mode. The count
of 520 causes the channel adapter to require
servicing three times from the responder. The
first and second service is for 256 bytes each and
the third is for the remaining 8 bytes.
This test makes two passes. On the second
pass, the 3705 storage address where the test
message is written and read is changed from
X'1000' to X'1 001'.
03002
Expected results from the
Write
Condition code
Initial status
Ending status
Expected sense
03002
00
0800
0400
00
Expected results from the
Read
Condition code
Initial status
Ending status Expected sense
00
oeoo
0000
00
Routine 04: Checks the 520 Bytd Wrap Test
(to and from high storage)
This routine is similar to routine 03. The
differences are the responder receives and
transmits back the test message from high
storage, starting at address X'FFOO'. This test
Channel Adapter Online Test
CAOlT050
I
This routine makes three passes altering the test
message address in the 3705 from X'FFOO' to
X'1 FFOO' to X'2FFOO' respectively. If the 3705
storage is too small for these addresses, the
responder defaults to an acceptable address.
04002
02002
Expected results from the
Write
Condition code
Initial status
Ending status
Expected sense
04002
Routine 01: Checks Normal Mode Wrap Test
This routine writes a 16 byte message on the
NSC test address and reads the message back on
the same address. The wrap is made in normal
mode (not extended buffer mode) and inbound
datal status interrupts occur each time a four
byte buffer is filled.
CO'
080'0'
0'400'
03002
CO'
Expected results from the
Read
/-",
/'~
~
\.. j
'--
/
/~' "-,
/'
'-
/'~~\
~--",
i
'--
04002
If EXT = L is entered in the test request message,
this routine will loop 256 times.
05002
Expected results from the
Write
Condition code
Initial status
Ending status
Expected sense
00
0800
0400
00
04002
/
,
,
('
j
00
0800
0400
00
A 72 byte read command is issued to the NSC
address. All 72 bytes written by the 2 write
commands are read back.
This test is performed first in EBCDIC mode then
in ASCII mode.
06002
j
"-,
\ ,/
r "\
!
/
,
~\
/
,--.
,r".!
-/
'--. /
/
/
\.,,-/
Expected results from the
"Write
00'
0800
0400
00
Condition code
Initial status
Ending status
Expected sense
CO'
/
/
Expected results from the
Read
Routine 0&: Checks the Recognition of
DLE-STX·
The 72 byte message with the DLE-STX character
sequence inserted after 36 Bytes is written. ETB
and ETX.characters are also inserted in the data
following, the DLE...STXsequence. The DLE-STX
sequence causes channel adapter hardware to
discontinue monitoring for control characters.
00
0800
0'40'0-
00
0800
0400
00
Routine 06: Checks OLE Remember
Two 36 byte messages are written on the native
sub-channel address. The DLE is the last
characters of the first message. The STX is the
first character of the second message. The
responder, sees the DLE remember latch bit set
because of the DLE. When the second write is
recognized the responder sets this bit in register
X'6C'. The arrival of the STX character then
causes the hardware to discontinue monitoring
for control characters. Subsequent control
characters, not being recognized by hardware,
should not cause the write to end.
00
0800
0400
00
Condition code
Initial status
Ending status
Expected sense
Expected results from the
Read
Condition code
Initial status
Ending status
Expected sense
Expected results from the
Write
Condition code
Initial status
Ending status
Expected sense
Expected results from the
Write
Condition code
InitiaLstatus
Ending status
Expected sense
00'
0'800
040'0'
00
~\
00
0800
0400
00
The 34th character in the message is an ETB.
This causes the channel adapter to present
channel stop to the responder. The write ends
with a residual count of 2. The read command
receives only 34 bytes and ends with a residual
byte count of 2. On the second pass, the ETB is
replaced with an ETX.
Expected results from the
Write
Condition code
First CSW statu~
Second CSW status
Expected sense
The above is performed first in EBCDIC mode,
and then in ASCII mode.
The 34th character in the message is an ETB and
causes the channel adapter to present channel
stop to the responder. The write command ends
with a residual count of 2. The read command
receives only 34 bytes and ends with a residual
byte count of 2. On a second pass, the ETB is
replaced with an ETX.
Expected results from the
Read
Routine 03: Checks Recognition of ETB and
ETX in EBCDIC Mode
This routine writes a 36 byte message on the
NSC test address and reads the message back on
the same address. This wrap is made in
extended buffer mode. The first inbound
datal status interrupt occurs when the 32 byte
buffer is filled. The second data/status interrupt
occurs with the remaining 4 bytes written and the
occurrence of channel stop.
Test Section T3705AH
01002
00
0800
0400
00
Routine 04: Checks Recognition of ETB and
ETX in ASCII Mode
This routine writes a 36 byte message on the
NSC test address and reads the message back on
the same address. Thiswrap is made in
extended· buffer mode. The first inbound
datal status interrupt.occurs when the 32 byte
buffer is filled. The second datal status interrupt
occurs with the remaining 4 bytes written and the
occurrence of channel stop.
00
0800
0400
00
Condition code
Initial status
Ending status
Expected sense
00
OCOO
0000
00
Condition code
First CSW status
Second CSW status
Expected sense
The ETB and ETX characters should not cause an
end to the write. All data written is read back on
the same address.
05002
02002
Expected results from the
Read
01002
Expected results from the
Read
Condition code
Initial status
Ending status
Expected sense
Expected results from the
Write
Condition code
Initial status
Ending status
Expected sense
00
0800
0400
00
Condition code
Initial status
Ending status
Expected sense
03002
Routine 02: Checks 36 Byte Data Wrap in
Extended Buffer Mode
This routine writes a 36 byte message on the
NSC test address and reads the message back on
the same address. This wrap is made in
extended buffer mode. The first inbound
datal status interrupt o~curs when the 32 byte
buffer is filled. The second datalstatus interrupt
occurs with the remaining 4 bytes written and the
occurrence of channel stop.
verifies setting the byte X address bits in the
cycle steal address register X'6E'. Prior to this
test a 4 byte Write Break command sends the
routine identification to the responder. The first
2 bytes identify the routine and the second 2
bytes define the 3705 storage address of the test
message.
CA OLT060
Channel Adapter Online Test
I
'--_/
/ ...
I
,
'--
/'
"-
.
"
,/,\
I
.C
/
\.,j
i
\.
'"
(
(
(
(
06002
Condition code
First status
Second status
Expected sense
(-
(
(
(
Expected results from the
Read
00
0800
0400
00
Routine 07: Checks SYN Character Monitor
Test (Positive)
This routine writes a 16 byte message. The first
pass has 4 EBCDIC SYN characters as the first 4
characters. The hardware is set to EBCDIC
mode, disconnects from the channel, and
presents a level 3 interrupt to the responder. The
responder presents ending status to the write if it
sees the SYN Monitor bit set. On a second pass,
the SYN characters and mode are changed to
ASCII mode.
Because the write command is terminated after 4
bytes, a residual byte count of 12 results. The 4
bytes written are read and verified. The read
command is also a 16 byte read and ends with a
residual byte count of 12.
07002
Condition code
Initial status
Ending status
Residual count
Expected sense
07002
Expected results from the
Write
00
0800
0400
OC
00
Expected results from the
Read
«
(
00
0800
0400
OC
00
Routine 08: Checks SYN Character Monitor
Test (Negative)
This routine writes a 16 byte message. On the
first pass, the 3705 is placed in EBCDIC mode.
The first 4 bytes of the message are ASCII SYN
characters.
f
(
..
(
(
test, the mode and the SYN characters are
reversed. The results should be the same.
08002
Expected results from the
Write
Condition code
Initial status
Ending status
Residual count
Expected sense
08002
00
0800
0400
00
00
Expected results from the
Read
Condition code
First status
Second status
Residual count
Expected sense
00
0800
0400
00
00
Test Section T3705AI
Routine 01: 250 Byte Wrap Test
This routine writes a 250 byte message on the
NSC test address and reads the message back on
the same address. The responder sets the
channel adapter to the cycle steal mode.
01002
Expected results from the
Write
(/ (
(
(-
02002
Condition code
Initial status
Ending status
Expected sense
02002
Condition code
Initial status
Ending status
Expected sense
00
0800
0400
00
Expected results from the
Read
00
0800
0400
00
Routine 02: Checks 255 Byte Data Wrap
This routine writes a 255 byte message on the
NSC test address and reads the message back on
the same address. The responder sets up the
channel adapter for cycle steal mode.
(
(
Expected results from the
Write
00
0800
0400
00
Expected results from the
Read
00
0800
0400
00
This test makes two passes. On the second
pass, the 3705 storage address where the test
message is written and read is changed from
X'1000' to X'1001'.
Condition code
Initial status
Ending status
Expected sense
03002
Condition code
First CSW status
Second CSW status
Expected sense
(
Routine 03: Checks the 512 Byte Wrap Test
This routine writes a 520 byte message on the
first NSC address and reads the message back
on the same address. The responder sets the
channel adapter to cycle steal mode. The count
of 520 causes the channel adapter to require
servicing three times from the responder. The
first and second service is for 256 bytes each and
the third is for the remaining 8 bytes.
03002
Condition code
First CSW status
Second CSW status
Expected sense
01002
Condition code
First status
Second status
Residual count
Expected sense
f
(
Condition code
Initial status
Ending status
Expected sense
Expected results from the
Write
00
0800
0400
00
(
(
(/
(
Routine 04: Checks the 520 Byte Wrap Test
(to and from high storage)
This routine is similar to routine 03. The
differences are the responder receives and
transmits back the test message from high
storage, starting at address X'FFOO'. This test
verifies setting the byte X address bits in the
cycle steal address register X'6E'. Prior to this
test a four byte Write Break command sends the
routine identification to the responder. The first
2 bytes identify the routine and the second 2
bytes define the 3705 storage address of the test
message.
This routine makes three passes altering the test
message address in the 3705 from X'FFOO' to
X'1 FFOO' to X'2FFOO' respectively. If the 3705
storage is too small for these addresses, the
responder defaults to an acceptable address.
04002
Condition code
Initial status
Ending status
Expected sense
04002
Condition code
Initial status
Ending status
Expected sense
Expected results from the
Write
00
0800
0400
00
Expected results from the
Read
00
0800
0400
00
Expected results from the
Read
00
0800
0400
00
The CA hardware should not recognize a SYN
character sequence. On a second pass of the
Channel Adapter Online Test
CAOLT070
This page intentionally left blank
-,
(
'--
"
,/
E
"-
(-~
J
~"":
,
,/
'--
,~
'--
,/
('~
\,
('""
\,
"-
--"
\
i
/
(!"~
~,
'\",--"
,/
r/'~'
\",
j
h,
,
~~,
I
\,-,/
~/
,/
/r"",
''---
,/
r~,
;C'
,/
'--
'--
/'~,,\
-
'----)
/
..
'--
~'\
j
\~
"I
I
)-'
,,<"
',,-
,"
-.~~-
(
""
(
(
(
(
(~
(
(
(
(
(
('
(
"
(
(
(/. (
(/
_._-
<-
.~---
(
(
(
('
(
("- (""
("'
j
(:
(", ("-
-"
("
("
(-'
Configuration Data Set (CDS) for the 3705-80
WHAT THE CDS DOES
PREREQUISITE CDS INFORMATION
The CDS defines the 3705 hardware and is required by the diagnostic programs. The
CDS, which is punched on cards, must accurately describe the exact configuration of the
3705-80. This section describes the CDS punched card format for the 3705-80.
Fill out Figure CDS-2. This information will be required when punching CDS cards.
The 3705-80 definition is provided in the On-line-Test (OL T) CDS. The I FT loader
appends the CDS to the Diagnostic Control Monitor (DCM) when the DCM is loaded into
the 3705. The OeM refers to the CDS as required by the requested I FT. To determine
the storage location of CDS information in the 3705-80, add the CDS byte location
(shown in the card formats that follow) to X'FOO'.
CDS REQUIREMENTS FOR THE 3705·80
The number and type of CDS cards that must be punched for the 3705'80 depend on (1)
the hardware configuration of the 3705-80 and (2) whether a 3705 model other than
3705-80 is present on the host system. Figure CDS-1 shows the number and types of
CDS cards required for specific configurations. An explanation and description of each
CDS card type follows.
Host System 3705-80 Configuration
Dummy
CDS Card
Channel
Data Card
Index and
CDS Cards
Range
Definition
Cards
1. Check the 3705-80 features present.
RPL diskette feature (board 81)
Storage (board 82)
CCU (boards 83 and 84)
LI 8 position 8 (board A 1 )
Ll8 position A (board A2)
CS8 type 2 (board A3)
Type 1 CA (board A4)
Type 4 CA (board A4)
Tvpe 4 CA (board 81)
Two channel switch
*
*
---*
*
• =always present for 3705-80
2. Enter the appropriate addresses in hex.
Interface A
(CA#ll
Interface B
(CA#2)
Native subchannel (NSC) address
low emulation subchannel (ESC)
High emulation subchannel (ESC)
3. Enter the appropriate oscillator speeds.
3706-80 only with one CA and no
RPL diskette feature
1
1
3
See Note
3705-80 with one type 1 CA and
RPL
1
1
3
See Note
3705-80 with one type 4 CA and
RPL
1
1
3
See Note
3705-80 with two type 4 CAs
1
1
3
See Note
3705-80 only with RPL diskette
feature and no CA
N/A
N/A
N/A
N/A
80th a 3705-80 and a 3705 model
other than model 80
N/A
1
3
See Note
Osc
Osc
Osc
Osc
00
01
02
03
(01 AA3T2)
(01 AA3T4)
(01 AA3U2)
(01 AA3U4)
Note: The oscillator part numbers are shown on CS2 ALD pages TB411 through TB414.
4. Enter the appropriate line set types.
Note: See "Range Definition Cards" later in this section.
LI B Position A
LI B Position B
Line Interface
Address
Li ne Interface
Address
020-023
024-027
028-02B
02C-02F
030-033
034-037
038-03B
03 e-03F
Figure CDS-1. CDS Card Requirements for the 3705-80.
Figure CDS-2. Check List for 3705-80 Prerequiste CDS Information
CONFIGURATION DATASET
CDS 0',
C
This page intentionally left blank
/'
'\
,---_/
(~
\, ./
A
\.
)
!
0
0
<~
i"'~~
\,
/~,
0"'-./
,,r''1
J
,~
0
"'-.
!
./
"~
(~
./
("\
./
0
"')
r~
\
, ./
r
l
'..j
r~,
"-
,~
"'-~)
(-~
\,./
("""""'7\
, ,
"-/
r'"
"'.
!
\'--_/
"'-
"-
(
(
(
(
(
(
(
(
c.
c
(
(
(
c (
(
(
(
(
(
(
(
(
(
\
(-
'-
370~80DUMMYCDSCARD
A dummy CDS card is required for a 3705-80 unless either (1) a 3705 model other than
the 3705-80 is present or (2) the 3705-80 has the RPL diskette feature installed and a
type 1 CA or a type 4 CA is not installed.
The following format is used for the dummy CDS card.
Notes:
1. Columns not specified must be left blank.
2. The dummy CDS card information is not stored in the CDS.
3. The dummy CDS card is required for SOSPC to perform a sub-family selection using
the auto-edit function.
Column
Description
1
2
4
c;DS
10
Blank
17 18 19 2021 2223 2425
Unused
Subchannel
Unit Address
~
08
80
40
80
32
06
/
Blank
C
Eo. of 3705-80 D"mmV CDS
Co'"
3705-80 Unit or Type Code
Terminal Control Unit Class Code
3705-80 Feature Code
3705 Dummy Feature Code
....-------Any available (unused) subchannel unit address in hex (right justified).
For example: OOOOOOOA.
CONFIGURATION DATA SET
CDS
020
CDS 030
CONFIGURATION DATA SET
CHANNEL DATA CDS CARD (CARD 1 OF 4)
A channel data CDS card is required for a 3705-80 unless the RPL diskette feature is
installed and a type 1 or a type 4 CA is not installed.
The following format is used for the channel data CDS card:
Note: Columns not specified must be left blank.
------------------1B
Description
Native
Subchannel
Unit Address
,CDS
08
40
ESC
Unit
Adr
06
1D
rs_1
Optional:
Comments
or card ID
Symbolic name of
the NCP CDS
Address must be in
hex (right justifiedfor example, 000000F6).
The initial tests (lNIT),
IFTs, and CA OL Ts load
across this channel address.
'
L
The number of continuous
emulation line addresses in
hex. Each address used in
testing requires a 2701,02,
or 03 CDS entry. See "Range
Definitions" in this section.
3705·80 Model Code
1C
Any character except /
The symbolic NCP CDS name is assigned by the user at SYSGEN time. It
is punched in EBCDIC hex with a X'C3' (EBCDIC C) appended. This is
required by the OLTT. Unused positions in this field are filled with X'40'.
For example, assume that the symbolic name is "RTP". You would punch
the EBCDIC code for RTPC in hex in columns 52-59. You would punch
X'40' in columns 60-67 (D9E3D7C34Q404040).
The emulation subchannel (ESC) unit address, in hex, of the lowest 2701,02, or 03 emulation line
' - - - - address (determined by CA jumper options). See "Range Definitions" later in this section. If type 1/
type 4 CA is in NCP mode only, leave'columns 36-41 lliank.
20 if 3705-80 has a type 4 channel
adapter installed; otherwise 00.
Terminal Control Unit Class Code - -......
if 3705-80 has 2-channel switch installed; otherwise O.
4 if 3705-80 is shared with another system CPU; otherwise O.
3705-80 Unit or Type Code - - - - - - -
INDEX AND DATA CDS CARDS
In addition to the channel data card, three index and data cards are required for a
3705-80. The index identifies the 3705-80 hardware configuration and points to the data
bytes that contain a detailed descriPtion of the hardware.
The following format is u~ed for the index and data CDS cards. If an entry is not applicable, leave it blank or punch it with zeros. However, the assigned card columns must be
maintained.
/"")
,
,
./
'\
',,- ./
('~~,
I~,
\,,-~I
1"""I
"-
~
r"'"l
/
"-
"- ./
"- ./
/
"
/
/
0
"-,,j
("",
'-
\
0
'" )
('~
,I''"'l
"
"
/
/..~
f~
"-
"-
["'\
\
j
,--,~
/--'\
"-J
,rr'~
\,
*
(
~/
,
(
(
(
Index and Data Card (2 of 4)
(
(
(
(
(
(
(
(
(
(
(
(
{
(
(
(
(
(
(
1.27
Optional:
Comments
or card 10
(Columns not specified must be left blank)
2F
2E
Description
30
31
32
33
1223
1123
CCU Index
'--_ _ _ _ Any Character Except I
Storage Index , - -....
2924 for Second Type 4 CA Index
1322 for Type 1 CA Index } ___
&.-_ _Type 2 Communication Scanner Index
1922 for First Type 4 CA Index
Note 1: Codes for Oscillator
Speeds
Index and Data Card (3 of 4)
41
Description
42
43
44
FFFF
45
46
47
01
88
00
48
49
01
40
End of CDS Index
00
Code
50.0
110.0
134.5
200.0
300.00
600.00
1200.00
2400.00
03
00
OF
13
14
15
17
1B
'--_ _ Any Character Except I
Type 2 CSB - -....
First NSC Unit Address - Interface A
Frame Designation for First CA _ _ _-I
Optional:
Comments
or card 10
Speed
Reserved
---I
'--_ _ Speed of Oscillator Position 4 (OSC 03) (See Note 11
'--_ _ Speed of Oscillator Position 3 (OSC 02) (See Note 11
256K Storage (Standard Size for 37()5-I:lOI _ _.J
Reserved _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _....
----F'rarne Designation for Second CA4
......_ _ Speed of Oscillator Position 2 (OSC 01) (See Note 1 )
Speed of Oscillator Position 1 (OSC 00) (See Note 1)
Second NSC Unit Address - Interface A - - - - - - -....
Index and Data Card (4 of 4)
I
I
.1
~
LIB A Line Set Types
~ ~
LI B B Line Set Types
. - - - - - (See Note 2)
----~~-----(See Note 2)
----~
Description
Lines
0-1
13
LIB A Type X
13 for LIB B Type X or Blank
if LI B is Not Present
Lines
2-3
Lines
4-5
M8t-
*
LS1
LS1
M82
*
LS1
LS1
Lines
6-7
Lines
0-1
Lines
2-3
Lines
4-5
Lines
6-7
LSl
Line Set Type
LS1
M83
LS1
LS1
LS1
LS1
LS1
LS1
M84
*
LS1
LS1
LSS
LS8
LS8
,f
Optional:
Comments
or Card 10
Note 2: Codes for Line Set Types
."""""~
*Feeture Line Set (One LS2. L~3. LS4. LS5. LSS. or LS91
I
LS1
Code
Type 1 Half Duplex!
Type 1 Duplex
Type 2 Half Duplex
Type 2 Duplex
Type 3 Half Duplex
Type 3 Duplex
Type 4 ACU Interface
Type 5 High Speed Local Attach
Type 8 Medium Speed (9600 bps or Lessl
TVpe 9 High Speed (Greater Than 9600 bps)
CONFIGURATION DATASET
0808
0000
OFOF
0707
OEOE
0505
1010
3939
3A3A
CDS 040
This page intentionally left blank
~
"
,/
h;
/
r'~
(-~
'--- . /
""\I
/,,0'11>,
('-'""
,
\.~j
~
t,
:
/
.'-..
j
;-'\
i
I
\
/
"-1
'-,~/
r'"\
\..
/
f'"~
:
,,_/
r"\
r-",
r~
\.. j
.\..../
\
I
"
/
!,,----~,
('"--~
;'~
'\.. j
/
"--~
r~
I
',-- ../
\--
\..../
,("-"'"
'--- ./
/""~
r",,\,
',--,/
\
\"
..$
{
(
(
c
(
(
(
(
c:
(
(
...
«
(
(
(' (-
(
(- {
RANGE DEFINITION CARDS
Each emulation line address in the range defined by the channel data CDS card (columns
36-41) must be defined by an appropriate CDS entry or the message 'NO CDS ENTRY'
will print for each undefined address. To prevent these messages from printing for
unused lines (those lines not defined as an IBM 2701,2702, or 2703 by a CDS entry),
punch a dummy CDS entry for each unused address using the format that follows.
Notes:
1. Range definition dummy CDS cards are not required if either (1) the RPL diskette
feature is not installed on the 3705-80 or (2) the type 1 CA or type 4 CA is in NCP
mode only.
2. Card columns not specified must be left blank.
Column
Description
1 2
4
CDS
10
17
Unused ESC
Unit Adr
t
22
25
4001
The emulation sUbchannel (ESC)
unit address, In hex, of an undefined
emulation line addre... The eddress
range Is defined by the channel data
CDS card.
52
80
I
t
End of ranga definition card.
CONFIGURATION DATA SET
CDS 050
This page intentionallv left blank
r"""",
\...../
,j
F'·'",
'.
/
(/
\..
/
\.../
r-'\
\..j
(" '\
J
,
\..
'\
.
/~
,/ , - ,
'''--.
_/
\.
/
.~,~
/
I/··~~\
I
iI'
.'"
!t
I
«
(
i~
((
Ie
POWER-ON PROBLEMS
PAGE
(
A
(
MAP 2130-1
B
1
POWER-ON PROBLEMS
1 OF 5
FROM
ENTER THIS MAP
MAP
NUMBER
ENTRY
POINT
2100
A
PAGE
NUMBER
007
Is +5 Vdc Standby present at 01 O-A 1C1 P03? (YZ859)
Y N
STEP
NUMBER
D
MAP 2130-2
015
• Press POWER ON.
Ooes PPB-K2 pick (even if only momentarily)? (YZ822)
026
Is approximately 0 Vdc present at 01 D-A1C1 M09?
(-Pick PPB-K2, YZ855)
YN
Y N
008
·If more than 200mV ripple is present at
01 D-A 1C1 P03, replace the capacitor 01 D-C2.
Is approximately +12 Vdc present at 010-TB1-2?
(YZ824)
Y N
001
001
(Entry Point A)
NOTE: When servicing inside the 01 D gate, the indicator
panel should be placed in the maintenance position (see
D-520).
Is +24 Vdc present at 010-TB1-6? (YZ824)
016
Is PPB-K1 picked?
Y N
002
.If more than 2.4V ripple is present at 01D-TB1-6,
replace the capacitor PPB-C1.
Is +24 Vdc present at 010-TB1-8?
Y N
018
Is the EPO cable plugged in the appropriate
connector?
Y N
Y N
019
• Plug the EPO cable into the appropriate
connector.
010
.Check the PPB- T2 transfdrmer and cabling to
01 D-TB1.
Y N
003
• Use an ac meter to measure the PPB-T2 output
voltages.
Expected voltage from 24.2 to 33.3 Vac rms
between:
PPB-T2-TB5-1 and PPB-T2-TB5-6
PPB-T2-TB5-2 and PPB-T2-TB5-6
Are these voltages within the specified range?
020
• Temporarily jumper EPO-JX pins 1 to 2.
Ooes 01 O-RY2 pick?
011
.Check the diodes at OlD-TB1-2.
Y N
012
• Remove the cards at 01 D-A 1C1 and 01 D-A 1 E1.
Is +5 Vdc Standby present at 010-A1C1P03 now?
(YZ859)
Y N
021
• Remove the EPO-JX jumper.
Is +24 Vdc present at EPO-JX pin 1?
Y N
Y N
022
• Check the cabling from 01D-TB1-8 to
EPO-JX-1.
013
004
• Check PPB-CP2, PPB-CB2, PPB-CB1 and the
input voltage (YZ802 and YZ804).
005
• Check the diodes
PPB- T2-TB5- 2.
diode
at
PPB- T2- TB5-1
between
and
01 D-TB 1-6
• Replace the +5 V Standby regulator at 01 D-Q3
(YZ824) .
• Reinstall the cards at 01 D-A 1C1 and 01 D-A 1 E1.
024
• Remove the EPO-JX jumper.
• Check the EPO cable and associated CPU .
and
025
·Check the 01 D-RY2-3 points.
2
B
MAP 2130-1
028
Is 0 Vdc present at LOCAL/REMOTE switch
terminal 3 (N/C)?
Y N
r?~~.Ck
the LOCAL/REMOTE ,w;toh
030
Is at least +2.5 Vdc present at LOCAL/REMOTE
switch terminal 1 (N/O)?
Y N
I
031
.Check the LOCAL/REMOTE switch.
·Check the master sequence card at 01D-A1Cl
(YZ860).
·Check cabling from LOCAL/REMOTE switch
terminal 1 (N/O)to01D-A1C1J09 .
032
*A CPU or channel power on must be initiated to
provide a contact closure within the CPl). This
closure returns +24 Vdc to the EPO panel (EPO-J 1) .
Is +24 Vdc present at EPO-J1-6?
Y N
023
.Check the 01 D-RY2 coil.
014
*One of these two cards is shorting the +5 V standby
supply.
• Replace the defective card.
at
027
Is the LOCAL/REMOTE switch in the local position?
(YZ822)
Y N
017
Is 01 O-RY2 picked? (EPO relay)
009
• Use an ac meter to measure the PPB-T2 output
voltages.
Expected voltage from 11 to 27 Vac rms between: .
01D-TB1-1 and OlD-Gnd TB
01D-TB1-3 and OlD-Gnd TB
Are these voltages within the specified range?
Y N
A
(-
(
PAGE 2 OF 5
ENTRY POI NTS
006
• Replace the
OlD-TBl-8.
(
~
033
.Check the CPU cable and associated CPU.
034
• Replace the master sequence card at OlD - A 1C 1.
.Check cabling from EPO-Jl-6 to 01D-A1C1G12
(+Pick).
.Check cabling from LOCAL/REMOTE switch
terminal 3 (N IC) to 01 D-A 1C1 G09 (+RemoteOn).
D
MAP 2130-2
Povver Supply Maps
PWRMAP030
(
PWRMAP040
Power S":Ipp1y Maps
F
CE
POWER-ON PROBLEMS
2
GH
3 3
MAP 2130-3
2 2
POWER-ON PROBLEMS
044
035
Is 0 Vdc present at LOCAL/REMOTE switch terminal 1
(N/O)?
045
• Press POWER OFF.
• Place a jumper between pins 01 D-A 1C1 M07 and
01D-A1C1P08 (disables the 12 second time out, master
seq., YZ829).
.Place a jumper between pins 01 D-A1 E1G12 and
01 D-A 1 E1J08. (Disables the 12 second timeout, frame
seq., YZ827.)
• Press POWER ON.
Does PPB-K2 pick and remain picked?
036
·Check the LOCAL/REMOTE switch.
037
Is at least +2.5 Vdc present at LOCAL/REMOTE
terminal switch 3 (N/C)?
V N
038
.Check the LOCAL/REMOTE switch and cabling
(YZ822).
.Check the master sequence card at 01D-A1C1
(YZ860).
.Check cabling from LOCAL/REMOTE switch terminal
3 (N/C) to 01D-A1C1G09.
V N
Y N
V N
042
• Check the POWER ON switch and verify that +24 Vdc
is present at the switch.
• Check cabling from
POWER ON switch to
01 D-A1C1J02.
44
GH
\.
j
'-,
/
~.
.~
,/,,\
/,,°'''1
(
./
\,
"'-_.J
)
\, -,j
)'
(
'\
055
• Check the diodes at 01 D-TB 1-13.
• See Notes 1 and 6 .
056
• Replace the +5 V regulator at 01 D-02.
·Check 01 D-R4 .
• See Notes 1 and 6.
"
/l
'--..,
"
/
'"
r
'"
\, , - - /
\
1"'''''
"
+5.5
Vdc
present
059
• Replace the +5 V regulator at 01 D- Q 1 (YZ824).
• See Notes 1 and 6.
060
Are any of the LE Os on the 01 0 gate on?
061
Is at least +2.5 Vdc present at 01 D~TB1-7?
V N
062
• Replace the master sequence card at 01 D-A 1C1.
·Check the cabling from 01 D-A 1C1 U05 to
01D-TB1-7.
• See Notes 1 and 6.
063
Is 0 Vdc present at 01D-RY1-B? (YZ822)
064
• Replace the frame sequence card at 01 D-A1 El .
.Check cabling from 01 D-E1 B02 to 01 D-RY1-B.
·Check cabling from 01D-TB7 to 01D-A1E1B13
(YZ822) .
.See Notes 1 and 6 .
065
·Check the 01 D-RY1 coil (YZ822).
• See Notes 1 and 6.
MAP 2130-4
/
'"
./
at
Y N
057
Is 01D-RY1 picked? (VZ822)
V N
MAP 2130-3
~--"\
and
Y N
054
.Check the T3 transformer and the PPB-K2-2
points (YZ830).
• See Notes 1 and 6 .
049
.Check for a shorted POWER OFF switch.
.See Notes 1 and 6.
043
• Replace the master sequence card at 01 D-A 1C1.
·Check cabling from LOCAL/REMOTE switch (terminal 1
N/O) to 01D-A1C1J09 (+Local On).
r~
"'- ..)
V N
048
.Press POWER OFF.
.Check the -24 V standby supply at 01 D-C1 (-)
and replace the capacitor 01 D-C1 if more than
2.4V ripple is present (YZ824).
• Check the +24 V standby supply at PPB-C1(+)
and replace the capacitor PPB-C1 if more than
2.4V ripple is present.
• Replace the master sequence card at 01 D-A 1Cl.
• If the problem still exists, check 01 D-C3 instead.
• Check cabling from Power Off Switch to
01 D-A 1C1 G02 (+24V Pwr Off Sw, YZ822).
·See Notes 1 and 6.
041
·Check the 01D-RY2-1 points.
(
053
• Use an AC meter to measure the T3 output voltages
between 01D-TB1-12 and 01D-TB1-14.
Is approximately +30 Vac rms present between
01D-TB1-12 and 01D-TB1-14?
047
Is 24 Vdc present at Op Panel Power Off Switch,
Common? (VZ822)
Y N
058
Is between +4.5 Vdc
01 D-A1E1J03? (YZ827)
V N
046
Is 0 Vdc present at 010,TB1-1 O? (-Crash, VZ824)
040
Is +24 Vdc present at 01D-TB1-9? (VZ822)
("'-''''''
-,
V N
V N
V N
(
051
Is between +4.5 Vdc and +5.5 Vdc present at 01D-Q2-2?
(VZ824, VZ886, sheet 4 of 11)
052
.If more than 200mV ripple is present at 01 D~02-3,
replace the capacitor 01 D-C3.
Is approximately +30 Vdc present at 01D-TB1-13?
(VZ824)
039
• Meter 01 D-A 1C1 P02 while pressing the POWER ON
switch.
Is +24 Vdc present at 01 D-A1C1P02? (VZ854)
1"'"
050
• Replace the frame sequence card at 01 D-A 1 E1.
.If the problem still exists, replace the master sequence
card at 01D-A 1C1 instead.
.Check for ~ short at 01 D-TB1-10 and cabling .
• See Notes 1 and 6.
·Check the PPB-K2 coil and wiring (YZ822).
V N
'-.._/
MAP 2130-A
PAGE 4 OF 5
PAGE 3 OF 5
~:
K
r
r ''',
(' "0,
\,
j
"'-
r'')
'--
/
(
'-,
"",
,/
t '\
'---
./
(
(
(
(
(
(
POWER-ON PROBLEMS
(
('
(
(
(
(
(
(
(
(
(
(
f
MAP 2130-5
PAGE 5 OF 5
066
.Check the LEDs on the 01 D gate in the order listed
below and go to the appropriate MAP (refer to the
'Checking SCRs' on D-560):
LED Indicator
Any a/v
-4v ael
-4v U/V
+6v U/V
-12V U/V
+12V U/V
+5V U/V
-5V U/V
MAP
2147
2148
2141
2144
2145
2146
2142
2143
067
Is +24 Vdc present at 01 D-A1C1 P05?
complete new, YZ829)
(sequence
Y N
068
.Check the 01 D-RY1-1 points .
• See Notes 1 and 6.
069
Is approximately 0 Vdc present at Op Panel Power ON
Indicator 1-81 (YZ822)
Y N
070
• Replace the master sequence card at 01 D- A 1C1.
.Check cabling from 01 D-A 1C1 S03 to Power On
Indicator 1-8 .
• See Notes 1 and 6.
071
.Check the POWER ON light .
• See Notes 1 and 6.
**************'*******************************
Note 1: Rernove the jumper between pins 01 D-A 1C1 M07
and 01D-A1C1P08.
Note 6: Remove the jumper between pins 01D-A1E1G12
and 01D-A1E1J08.
MAP 2130-5
POVIIsr Supply Maps
PWR MAP 050
Power Supply Maps
C0
-4 V UNDER-VOLTAGE
EF
MAP 2141-1
-4 V UNDER-VOLTAGE
1 1
PAGE 1 OF 3
ABGH
PWRMAP060
MAP2141-2
1 1
PAGE 2 OF 3
001
(Entry Point A)
CAUTION
A shorted SCR can damage the phase control card
(01 D-A 1A 1), also a defective phase control card can
damage an SCR. Refer to the 'Checking SCRs' on D-5BO
to check for shortedSCRs.
• Press POWER OFF.
• Place a jumper between pins 01 D~A 1C1 M07 and
01 D-A 1C1 P08 (disables the 12-second timeout, master
seq., YZ829).
• Place a jumper between pins 01D-A1E1G12 and
01 D-A 1E1 J08 (disables the 12-second time out) if not
already present. (Frame sequence, YZ827)
• Press POWER ON.
Is 0 Vdc present at 01A-TB1-13? (-4 V sense, VZ836)
003
• Scope the -4 V SCRs at 01 F-HS1 (VZ886, sheet 5).
Are both SCRs firing? (Refer to 'Checking SCRs'
on 0-560.)
.
Y N
012
• Press POWER OFF.
• Measure the resistance of the pulse transformer
secondary call between the following pins:
01 D-A1A1GOB and 01 D-A1A1JOB
01D-A1A1G09 and 01D-A1A1J09
I. leu than 20 ohm. pr..ent? (VZ8I8)
018
• Press POWER OFF.
• Measure the resistance of the pulse transformer
secondary coil between the following pins:
01 D-A1A1G02 and 01 D-A1A1J02
01 D-A1A1G04 and 01 D-A1A1J04
I. Ie•• than 20 ohm. pre.ent? (YZ888)
V N
Y N
Y N
007
• Replace the phase control card at 01 0- A 1A 1.
(Refer to 'DC Voltage Measurement' on 0-680.)
.See Note 1 if applicable.
• See Note 6.
013
• Replace the phase control card at 01 D-A1A 1•
(Refer to 'DC Voltage Measurement' on 0-580.)
• See Note 1 if applicable•.
.See Note 6 .
008
• Check for AC at cathode of failing SCR(s).
.Check the failing SCR(s) and cabling from the phase
control card.
• See Note 1 if applicable.
.See Note 6.
014
.Check for AC at cathode of failing SCR(s) •
.Check the failing SeR(s) and cabling from the phase
control card.
.See Note 1 if applicable.
.See Note B.
009
• Scope the -4 V SCRs at 01 F- HS2 (VZ886, sheet 5).
Are both SCRs firing? (Refer to 'Checking SCR.' on
0-580.)
V N
016
• Scope the -4 V SCRs at-01 F-HS3 (VZ886, sheet 5).
Are both SCRs firing? (Refer to 'Checking SCRs' on
0-660.)
.
010
.Scope the gate pulses at 01 D-A 1A1B07. (VZ86B)
Are the gate pulse. pre.ent? (Refer to 'Checking
SCRs' on 0-680.)
018
• Scope the gate pulses at 01 D-A1A1 B11. (YZ86B)
Are the gate pul... pr•••nt? (Refer to 'Checking
SCRs' on 0-680.)
V N
YN
002
Is -4 Vdc present at 01A-TB1-13?
V N
008
• Press POWER OFF.
• Measure the resistance of the pulse transformer
secondary coils between the following pins:
01 D-A1A1 G11 and 01 D-A1A1J11
01D-A1A1G13 and 01D-A1A1J13
I. I••• than 20 ohm. pr••• nt? (YZ888)
004
.Scope the gate pulses at 01 D-A1A1 B09.
(YZ866)
Are the gate pulses present? (Refer to
'Checking SCRs' on 0-560.)
011
• Replace the phase control card at 01 0-A 1A 1.
(Refer to 'DC Voltage Measurement' on 0-580.)
• See Note 1 if applicable.
• See Note B.
005
• Replace the phase control card at 01 0-A 1A 1.
(Refer to 'DC Voltage Measurement' on
0-580.)
• See Note 1 if applicable.
.See Note 6.
020
.Check for AC at cathode of failing SCR(s) .
• Check the failing SCR(s) and cabling from the
phase control card .
• See Note 1 if applicable.
.See Note 6.
021
.Adjust the -4 V pot on the phase control card at
01 D-A 1A1 to increase the voltage (see 0-580) .
• Replace the phase control card if adjusting the pot
does not fix it. (Refer to 'DC Voltage Measurement'
on 0-580.)
• Check for open 01 F-L1, 01 F-L2 and 01 F-L3 chokes
(YZ886, sheet B).
.See Note 1 if applicable.
.See Note 6.
YN
V N
VN
019
• Replace the phase control card at 01D-A1A1.
(Refer to 'DC Voltage Measurement' on
0-580.)
• See Note 1 if applicable .
.See Note B.
017
.Replace the phase control card at 01D-A1A1.
(Refer to 'DC Voltage Measurement' on 0-580.)
• See Note 1 if applicable.
.See Note 6 .
022
• Replace the frame sequence card at 01 0- A 1E1.
.Check cabling from 01A-TB1-13 to 01D-A1E1M08
(YZ827) .
• See Note 1 if applicable .
.See Note 6.
023
Is -24 Vdc present at 010-C1(-terminal)? (-24 V bulk
supply, YZ824)
VN
2 2
2 2
ABC 0
/"
'. j
r
'-...
)\
/'
EF
("'''~
"
/
('1
\--//
r~~
/
/~
'....
GH
MAP 2141-1
./
/~
"- /
r~'\
~'"
\.
/
('~
(~
\
.'....~j
.'
./
..~,
\
'.,
('~\
'. /
('-~
',,-j
MAP 2141-2
r-'-",\
'" ..
/
r'~
;
I
"-
"- ./
~/
I
"'-''I
'-..j
(
(
J K
2 2
(
(
(
-4 V UNDER-VOLTAGE
(
(
«
(
(
(
(:
(
(
(
(
(
(
(
(/ (
c-
c
MAP 2141-3
PAGE 3 OF 3
024
.If more than 2.4V ripple is present, replace the
capacitor 01 0-C1 .
• Check the diode at PPB-T2-TB5-4.
025
Is at least +1.0 Vdc present at 01D-A1E2P047 (drive
signal for -4 V supply, YZ851 use CAUTION in probing
this point)
Y N
026
• Replace the frame sequence card at 01 O-A 1 E1 .
• If the problem still exists, replace the phase control
card at 010-A1A1 instead. (Refer to '~C Voltage
Measurement' on 0-580.)
.See Note 1 if applicable .
• See Note 6.
027
.Replace the phase control card at 010-A1A1. (Refer to
'~C Voltage Measurement' on 0-580.)
.If the problem still exists, check 01 F- L1, L2, L3 choke and
SCRs instead (YZ886, sheet 6) .
• See Note 1 if applicable .
• See Note 6.
*********************************************
Note 1: Remove the jumper between pins 01 D-A 1C1 M07
and 01 D-A 1C1 P08.
Note 6: Remove thEi jumper between pins 01 D-A 1 E1 G12
and 01 D-A 1E1J08.
MAP 2141-3
Power Supply Maps
PWR MAP 070
(
Power Supply Maps
+5 VDC UNDER-VOLTAGE (STORAGE)
PAGE
ABC 0
MAP 2142-1
+5 VDC UNDER-VOLTAGE
1 111
1 OF 2
EF
PWRMAP080
MAP 2142-2
PAGE 2 OF 2
ENTRY POINTS
EXIT POINTS
FROM
ENTER THIS MAP
EXIT THIS MAP
TO
MAP
NUMBER
ENTRY
POINT
PAGE
NUMBER
MAP
NUMBER
ENTRY
POINT
2146
A
PAGE
NUMBER
STEP
NUMBER
No entries in this table
STEP
NUMBER
003
008
.Adj +5VOC POT on -5/+5 regulator asm. (see
0-580).
• Replace -5/+5 regulator asm, if +5VOC
adjustment does not correct problem. (Refer to
'Checking SCRs' on 0-560.)
.See Note 1.
.See Note 6.
009
Go to Step 015, Entry Point B.
001
(Entry Point A)
• Press Power Off
• Place a jumper between pins 01 O-A 1Cl M07 and
01 D-A 1C1 P08 (disables the 12-second timeout, master
sequence, YZ829).
• Place a jumper between pins 01 O-A 1 E1 G12 and
01D-A1E1J08 (disables the 12-second timeout, frame
sequence,· YZ827).
• Press power on.
Is +12 Vdc present at 5V REG TB1-n (YZ836)
010
Is +5VDC present at 5V REG TB1-101
Y N
012
.Check cabling to 01 O-A 1 E1 M06.
• Replace the frame sequence .card at 01 O-A 1E1.
·See Note 1.
.See Note 6.
002
Is +12 Vdc present at 01A-TB1-2? (YZ836)
Y N
013
Is 6 AM P fuse 1 on -5/+5 regulator asm. blown?
003
Go To Map 2146, Entry Point A.
017
.To isolate 01A-B2 board, remove leads at 5V REG TBl-8
& 9 (YZ836).
• Replace -5/+5 regulator Asm. and adjust +5 VDC if
problem stili exists.
·See Note 1.
.See Note 3.
.See Note 6.
011
• Replace diode 1.
·See Note 1.
.See Note 6.
Y N
016
• To isolate the storage card which may be drawing
excessive current, replace cards at 01A-B2T2 & U2
one at a time while monitoring +5 VDC at
01 D-A1 E1M06.
.To isolate 01A-B2 board, remove leads at 5V REG
TBl-8 & 9 (YZ836).
.Replace -5/+5 regulator Asm. and adjust +5VOC if
problem still exists.
·See Note 1.
.See Note 3.
.See Note 6.
**************************
Note 1: Remove jumper between pins 01 D-A 1E1 G12 and
010-A1E1J08.
Nota 3: Reinstall the removed storage cards in their
original position.
Note 6: Remove jumper between pins 01 O-A 1Cl M07 and
01 O-A 1Cl P08 (if installed).
Y N
004
.Check cables from 01A-TBl-2 (YZ836)
014
• Replace -5/ +5 Regulator Asm. and adjust +5 Vdc .
• See Note 1.
.See Note 6.
005
Is 0 Vdc present at 5V REG TBl 8 & 9?
Y N
015
(Entry Point B)
• Press Power Off.
• Remove storage cards at 01A-B2T2 & U2.
• Replace 6 AM P F1 .
• Press Power On~
Does 6 AM P F1 blow again?
Y N
006
Is +5 Vdc present at 5V REG TB1 8 & 9?
Y N
007
156 AMP F1 on -5/+5 regulator asm. blown?
Y N
2 2 2 2
ABC D
!~
!
"
/'
;;",
(
,"
',- '/
E F
MAl' 2142-1
1"-'"
"
/
~,
".
pI
0
' "' _/
("~
'-,
/
(~'
"
\,
~
r".
'"'
,/
'"
('..~
('~,
',,-Y
'" ./'
MAP 2142-2
r"':
r~
\" J
1''''',
"-
.//
f/'~
I
\",j
(-
(
{
(
f
(
~
f'
-5 VOLT UNDER-VOLTAGE (STORAGE)
PAGE
(
(/
MAP 2143-1
(
(
(
f
(
(
(-
«
C
1 OF 2
(
(-
(-
f'
A B
1 1
-5 VOLT UNDER-VOLTAGE
C
1
('
(
f
f~
MAP 2143-2
PAGE 2 OF 2
ENTRY POINTS
EXIT POINTS
FROM
ENTER THIS MAP
EXIT THIS MAP
TO
MAP
NUMBER
ENTRY
POINT
PAGE
NUMBER
MAP
NUMBER
ENTRY
POINT
2145
A
PAGE
NUMBER
STEP
NUMBER
No entries in this table
STEP
NUMBER
003
007
(Entry Point A)
• Press power off.
• Remove storage cards at 01A-B2T2 & U2.
• Press Power on.
Is -5 Vdc present at 5V REG TB1-7?
012
• Check cabling from 5V REG TB 1-7 to 01 D- AlE 1M05.
• Replace frame sequence card at 01 D-A 1 E1.
·See Note 1.
.See Note 3 .
.See Note 6.
Y N
*******************************
008
Press power off.
• Disconnect, at 5V REG TBl-7 (YZ836), the two -5VDC
cables to the 01 AB2 board.
• Press power on.
Is -5 Vdc present at 5V REG TB1-7?
001
• Press power off.
• Place a jumper between pins 01 D-A 1C1 M07 and
01 D- A 1C 1P08 (disables the 12 second timeout, master
sequence, YZ829).
• Place a jumper between pins 01D-A1E1G12 and
01D-A1E1J08 (disables the 12 second timeout, frame
sequence, YZ817).
Press power on.
Is -12 Vdc present at 5V REG TBl-2? (YZ836)
013
Go to Step 007, Entry Point A .
Y N
009
.Replace -5/+5 regulator asm and adjust +5
(See D-580.)
.See Note 1.
.See Note 3 .
• See Note 6.
Y N
002
Is -12 Vdc present at 01A-TBl-3? (YZ836)
Note 1: Remove jumper between pins 01 D-A 1 El G12
and 01 D-A 1 E1J08.
Note 3: Reinstall the removed storage cards in their
original positions.
Note 6: Remove jumper between pins 01 D-A 1Cl M07
and 01D-A1C1P08 (if installed) .
verc.
010
• Short in -5VDC cables or 01A-B2 board.
·See Note 1.
.See Note 3.
.See Note 6.
Y N
003
Go To Map 2145, Entry Point A.
004
·Check cables from 01A-TB1-3 (YZ836).
011
• Isolate the storage card which may be drawing excessive
current by replacing cards one at a time while monitoring
-5VDC at 5V REG TBl-7.
.See Note 1.
.See Note 3 •
• See Note 6.
005
Is 0 Vdc present at 5V REG TBl-7?
Y N
006
Is -5 Vdc present at 5V REG TBl-7?
Y N
222
ABC
MAP 2143-2
MAP 2143-1
Power Supply Maps
PWRMAP090
(
r
This page intentionally left blank
8
r£~
\..
01./
\.
0
~!
I
\. ..
./
~
!
(..-"')
'''--Y
/'~
j
,r,
0
\.. /
,-j
r-~
)
(-'"
\, __.--/,,1
.
.r~
\.._j
(~
\.
j
r " ,·1
•
\,,/
~~
\._/
('I
,,-y
r"'~
'--./
/""'' '1
.J
r--'"
'"-
r~
\..,j
{~
~.J
tr~
(~I
"-/
r'\
\,
/
[\
\..j
It""~,\
.~
(
(
(
(
(
+6 V UNDER-VOLTAGE
PAGE
(
(
BCD E F
(
(
MAP 2144-1
AG
1 1
(
(
(
+6 V UNDER-VOLTAGE
A shorted SCR can damage the phase control card
(01D-A1A1), also a defective phase control card can
damage an SCR. Refer to 'Checking SCRs' on D-560 to
check for shorted SCRs.
Is 01 F-CPl tripped? (YZ886, sheet 3)
007
• Press power on.
.Check for AC at cathode of failing SCA.
·Check the failing SCR and cabling from the phase
control card.
.See Note 1.
• See Note 6 .
Y N
002
• Press POWER OFF.
• Place a jumper between pins 01 D-A 1C1 M07 and
01 D-A 1Cl P08 (disables the 12 second timeout, master
seq., YZ829).
.Place a jumper between pins 01D-A1E1G12 and
01D-A1E1J08 (disables the 12 second time out) if not
already present. (Frame seq. YZ827)
• Press POWER ON.
Is 0 Vdc present at 01A-TB1-12? (+6 V sense, YZ836)
008
.Adjust the +6 V pot on the phase control card at
01 D-A lA 1 to increase the voitage (see D-580).
• Replace the phase control card if adjusting the pot
does not fix it. (Refer to 'DC Voltage Measurement'
on D-580.)
.See Note 1.
·See Note 6.
Y N
005
• Press POWER OFF.
• Measure the resistance of the pulse
transformer secondary coils between the
following pins:
01D-A1A1G07 and 01D-A1A1J07
01D-A1A1G08 and 01D-A1A1J08
Is less than 20 ohms present? (YZ866)
Y N
014
• Determine which lead causes the circuit protector to
trip by powering up after replacing the laminar bus lugs
one at a time.
I
CAUTION
I
009
• Replace the frame sequence card at 01 D-A 1E1.
.Check cabling from O1A-TBl-12 to 01D-A1E1P02
(YZ827).
·See Note 1.
.See Note 6.
Y N
Y N
013
• Press POWER OFF.
• Disconnect the laminar bus lugs at 01 A- TB 1-5 and
01A-TBl-12 (YZ83m .
• Reset 01 F-CP1.
• Press POWER ON.
Does 01 F-CP1 trip again?
I
003
Is +6 Vdc present at 01A-TBl-12?
004
• Scope the +6 V SCRs at the base of 01 F-HS7
(YZ886, sheet 5)
Are both SCRs firing? (Refer to 'Checking
SCRs' on 0-560.)
012
• Replace the phase control card at 01 D-A 1A 1. (Refer
to 'DC Voltage Measurement' on D-580.)
.If the problem still exists, check 01 F-CP1, 01 F-L4
choke and SCRs instead (YZ886, sheet 5).
.Check circuit .
·See Note 1.
.See Note 6.
006
• Replace the phase control card at 01 D-A lA 1.
(Refer to 'DC Voltage Measurement' on
D-580.)
.See Note 1.
• See Note 6.
CAUTION
(
{
(
(
H
f
f'
MAP 2144-2
015
• Press POWER OFF .
• Reconnect the laminar bus lugs at 01 A- TB 1-5 and
01A-TBl-12.
• Replace capacitor, 01 F-C3 (YZ886, sheet 5).
WARNING: Circuit damage may occur if power is
applied with the capacitor disconnected.
• Reset 01 F-CP1.
• Press POWER ON .
Ooes 01 F-CP1 trip again?
Y N
016
• Return to normal operation .
017
.Check for a bad circuit protector. 01 F-CP1.
• See Notes 1 and 6.
*********************************************
Note 1: Remove the jumper between pins 01 D-A 1C1 M07
and 01 D-A 1C1 P08.
Note 6: Remove the jumper between pins 01 O-A 1 E1 G12
and 01D-A1E1J08.
.Isolate the short to a logic board by removing the
laminar bus jumpers to each board. Before removing
or reinstalling the laminar bus jumpers from/to a board,
power must be off until the jumpers are all off/on .
Otherwise, the current required by the board assembly
could exceed the capacity of the board pins and burn
them off.
• Isolate to a card by removing cards.
• See Notes 1 and 6.
010
Is at least +2.5 VOC present at 010-A1E1M04? (drive
signal for +6V supply, YZ827, use CAUTION in probing
this point)
YN
011
• Replace the frame sequence card at 01 D-A 1 El.
.If the problem still exists, replace the phase control
card at 01 D-A lA1 instead. (Refer to 'DC Voltage
Measurement' on D-580.)
.See Note 1.
·See Note 6.
Y N
ABC D E F
(
PAGE 2 OF 2
1 OF 2
001
(Entry Point A)
2
('
2
G
MAP 2144-1
H
MAP 2144-2
Power Supply Maps
PWR MAP 110
Povver Supply Maps
-12 V UNDER-VOLTAGE
PAGE
BCD E F
MAP 2145-2
PAGE 2 OF 2
A shorted SCR can damage the phase control card
(OlD-A1Al). also a defective phase control card can
damage an SCR. Refer to 'Checking SCRs' on 0-560 to
check for shorted SCRs.
Is 01 F-CP2 tripped? (YZ886, sheet 3)
007
• Press power on.
·Check for AC at cathode of failing SCR.
·Check the failing SCR and cabling from the phase
control card.
.See Note 1.
• See Note 6.
Y N
002
• Press POWER OFF.
• Place a jumper between pins 01 D-A 1Cl M07 and
01 D-A 1C1 P08 (disables the 12 second timeout master
seq., YZ829).
.Place a jumper between pins 01D-A1E1G12 and
01D-A1E1J08 (disables the 12 second time out) if not
already present. (Frame seq. YZ827)
• Press POWER ON.
Is 0 Vdc present at 01A-TBl-3? (-12 V sense, YZ836)
003
Is -12 Vdc present at 01A-TB1-3?
005
• Press POWER OFF.
• Measure the resistance of the pulse
transformer secondary coils between the
following pins:
01 D-A lA 1G03 and 01 D-A1A1J03
01D-A1A1G05 and 01D-A1A1J05
Is less than 20 ohms present? (YZ866)
014
• Determine which lead causes the circuit protector to
trip by powering up after replacing the laminar bus lugs
one at a time.
I
I
I
015
• Press POWER OFF.
.Reconnect the laminar bus lugs at 01A-TBl-3 and
01A-TBl-4.
• Replace capacitor, 01 F-C4. (YZ886. sheet 5)
WARNING: Circuit damage may occur if power IS
applied with the capacitor disconnected,
• Reset 01 F-CP2.
• Press POWER ON .
Does 01 F-CP2 trip again? (YZ886, sheet 6)
Y N
016
• Return to normal operation .
017
.Check for a bad circuit protector. 01 F-CP2,
.See Notes 1 and 6.
Y N
CAUTION
*********************************************
Note 1: Remove the jumper between pins 01 D-A 1C 1 M07
and 01 D-A 1C1 P08.
Note 6: Remove the jumper between pins 01D-A1E1G12
and 01D-A1E1J08.
.Isolate the short to a logic board by removing the
laminar bus jumpers to each board. Before removing
or reinstalling the laminar bus jumpers from/to a board,
power must be off until the jumpers are all off / on.
Otherwise, the current required by the board assembly
could exceed the capacity of the board pins and burn
them off.
.Isolate to a card by removing cards.
• See Notes 1 and 6.
009
YN
Y N
013
.Press POWER OFF.
• Disconnect the laminar bus lugs at 01 A- TB 1-3 and
01A-TBl-4 (YZ836).
• Reset 01 F-CP2.
.Press POWER ON.
Does 01 F-CP2 trip again?
008
.Adjust the -12 V pot on the phase control card at
01D-A1Al to increase the voltage (refer to
'Checking SCRs' on 0-560).
• Replace the phase control card if adjusting the pot
does not fix it. (Refer to 'DC Voltage Measurement'
on 0-580.)
.See Note 1.
.See Note 6.
Y N
004
.Scope the -12 V SCRs at the base of 01 F-HS5
(YZ886, sheet 5).
Are both SCRs firing? (Refer to 'Checking
SCRs' on 0-560.)
012
• Replace the phase control card at 01 D-A lA 1. (Refer
to 'DC Voltage Measurement' on 0-580.)
.If the problem still exists, check 01 F-CP2, 01 F-L5
choke and SCRs instead (YZ886, sheet 5).
.Check circuit.
·See Note 1.
.See Note 6.
006
• Replace the phase control card at 01D-A1Al.
(Refer to 'DC Voltage Measurement' on
D-580.)
·See Note 1.
·See Note 6.
CAUTION
• Replace the frame sequence card at 01 D-A 1El.
.Check cabling from 01A-TBl-3 to 01D-A1E1P07
(YZ827).
.See Note 1.
.See Note 6.
010
Is at least +2.5 Vdc present at 01D-A1E1M13? (Drive
signal for -12V supply, YZ827, use CAUTION in probing
this point.)
Y N
011
• Replace the frame sequence card at 01 D-A 1El.
·If the problem still exists, replace the phase control
card at 01 D-A lA 1 instead. (Refer to 'DC Voltage
Measurement' on 0-580.)
.See Note 1.
• See Note 6.
YN
ABC 0 E F
H
-12 V UNDER-VOLTAGE
1 1
1 OF 2'
001
(Entry Point A)
2
AG
MAP 2145-1
PWR MAP 120
2
G
'"
"'--_/'
(
"-
/
/ .......
'.,
/
(~
/
j
MAP
H
MAP 2145-1
.~
"
\,
/'
C~
,j
C)
r"~
,
~
(""I
\,j
('.
~
/
(-1\.
"-
,
/
'-- /'
(~
/'~
',-/
,,--)
f''''-
"
/
,A~
'~-_/
~145-2
(
(
(
(
+12 V UNDER-VOLTAGE
PAGE
(
(
BCD E F
(
(
{
MAP 2146-1
(
AGH
1 1 1
1 OF 2
(
(
(
('
+12 V UNDER-VOLTAGE
(
(
J K
(-'
(
MAP 2146-2
PAGE 2 OF 2
001
(Entry Point A)
006
• Replace the phase control card at 01 D-A 1A 1.
(Refer to 'DC Voltage Measurement' on
D-580.)
.See Note 1.
.See Note 6.
CAUTION
A shorted SCR can damage the phase control card
(01 D-A 1A 1), also a defective phase control card can
damage an SCR. Refer to 'Checking SCRs' on D-560 to
check for shorted SCRs.
Is 01 F-CP3 tripped? (YZ886, sheet 3)
Y N
003
Is +12 Vdc present at 01A-TB1-1?
009
Is +12VOC present at 01A-TB1-14? (+12 V sense)
Y N
Y N
004
• Scope the +12 V SCRs at the base of 01 F- HS6
(YZ886, sheet 5)
Are both SCRs firing? (Refer to 'Checking
SCRs' on 0-560.)
010
• Replace diode 1 between 01 A-TB 1-1 and 14.
.See Note 1.
.See Note 6.
011
• Replace the frame sequence card at 01 D-A 1 E1.
• Check cabling from 01A-TB1-1 to 01D-A1E1M03
(YZ827) .
.See Note 1.
.See Note 6.
005
• Press POWER OFF.
• Measure the resistance of the pulse
transformer secondary coils between the
following pins:
01D-A1A1G10 and 01D-A1A1J10
01D-A1A1G12 and 01D-A1A1J12
Is less than 20 ohms present? (YZ866)
012
Is approximately 40 Vac peak-to-peak (15 Vac rms)
present at cathode of SCR 57 (YZ886, sheet 5 of 11)
Y N
Y N
ABC D E F
2 2
GH
MAP 2146-1
018
• Determine which lead causes the circuit protector to
trip by powering up after replacing the laminar bus lugs
one at a time.
I
014
Is at least +2.5 Vdc present at 010-A1E1P117 (Drive
signal for +12 V supply, YZ827, use CAUTION in
probing this point.)
Y N
015
• Replace the frame sequence card at 01 D-A 1E1.
.If the problem still exists, replace the phase control
card at 01D-A1A1 instead. (Refer to 'DC Voltage
Measurement' on D-580.)
·See Note 1.
.See Note 6.
008
.Adjust the +12 V pot on the phase control card at
01 D-A 1A 1 to increase the voltage (see D-580).
• Replace the phase control card if adjusting the pot
does not fix it. (Refer to 'DC Voltage Measurement'
on D-580.)
.See Note 1.
.See Note 6.
Y N
Y N
013
.Check T3 and cabling to SCR 5.
·See Note 1.
·See Note 6.
007
• Press power on.
.Check for AC at cathode of failing SCR.
.Check the failing SCR and cabling from the phase
control card.
.See Note 1.
.See Note 6 .
002
• Press POWER OFF.
• Place a jumper between pins 01D-A1C1M07 and
01 D-A 1C1 P08 (disables the 12 second timeout, master
seq., YZ829).
.Place a jumper between pins 01D-A1E1G12 and
01D-A1E1J08 (disables the 12 second time out) if not
already present. (Frame seq. YZ827)
• Press POWER ON.
Is 0 Vdc present at 01A-TB1-17 (+12 Vdc output,
YZ836)
2
«. ' c
016
• Check diode 1 between 01A-TB1-1 and 14.
• Replace the phase control card at 01 D-A 1A 1. (Refer
to 'DC Voltage Measurement' on D-580.)
.If the problem still exists, check 01 F-CP3, 01 F-L6
choke and SCRs instead (YZ886, sheet 5).
·Check circuit.
.See Note 1.
·See Note 6.
017
• Press POWER OFF.
.Disconnect the laminar bus lugs at 01A-TB1-1 and
01A-TB1-2 (YZ836).
• Reset 01 F-CP3 .
• Press POWER ON .
Does 01 F-CP3 trip again?
Y N
I
CAUTION
I
.Isolate the short to a logic board by removing the
laminar bus jumpers to each board. Before removing
or reinstalling the laminar bus jumpers fro;n Ito a board.
power must be off until the jumpers are all off/on.
Otherwise, the current required by the board assembly
could exceed the capacity of the board pins and burn
them off.
.Isolate to a card by removing cards.
.See Notes 1 and 6.
019
• Press POWER OFF .
• Reconnect the laminar bus lugs at 01 A- TB 1 - 1 and
01A-TB1-2 .
• Replace capacitor, 01 F-C5 (YZ886, sheet 5),
WARNING: Circuit damage may occur if power is
applied with the capacitor disconnected.
• Reset 01 F-CP3.
• Press POWER ON.
Does 01 F-CP3 trip again 7
Y N
020
• Return to normal operation .
021
.Check for a bad circuit protector, 01 F-CP3 .
• See Notes 1 and 6 .
*********************************************
Note 1: Remove the jumper between pins 01 D-A 1Cl MOl
and 01D-A1C1P08.
Note 6: Remove the jumper between pillS 01 D- A 1E1G 12.
and 01D-A1 E1J08.
J
K
MAP 2146-2
Power Supply Maps
PWR MAP 130
PWR IVIAP 140
PowarSupply iVlaps
C0
OVER-VOLTAGE
PAGE
A B
MAP 2147-1
1 1
1 OF 2
MAP 2147-2
PAGE 2 OF 2
001
(Entry Point A)
• Press POWER OFF.
• Check the CBs for the failing power supply (YZ886, sheet
3 and 16).
Are any CBs tripped?
006
Is -5VDC or +5VDC over voltage light on?
014
The over-voltage condition has disappeared .
-Check the voltage distribution for an intermittent loss
of load (loose screws or connections) •
Y N
007
- Replace the phase control card at 01 D-AlA 1•
(Refer to 'DC Voltage Measurement' on D-580.)
- Press POWER ON.
Does the 3705 power on now?
.Y N
002
• Press POWER ON.
Does the 3705 power on now?
015
- Check the voltage distribution for an intermittent short.
- Check for faulty CBs.
Y N
Y N
008
The phase control card was not the faulty
component •
Are any over-voltage lights on at the 01 D gate?
003
• Adjust the pot(s) on the phase control card at
01 D-A 1A 1 to decrease the voltage on the supply(s)
with the over-voltage (Refer to 'Checking SCRs' on
D-560).
.Continue with MAPs if adjusting pot(s) does not fix
the problem.
• Replace the frame sequence card at 01 D-A 1 E1.
• Press POWER ON.
Does the 3705 power on now?
Y N
009
The over-voltage condition has disappeared.
-Check the LEDs on the 01 D gate in the order
listed below and go to the appropriate MAP:
(Refer to 'Checking SCRs' on D-560.)
LED Indicator
-4v OCl
-4v U/V
+6V U/V
-12V U/V
+12V U/V
+5V U/V
-5V U/V
Y N
004
The frame sequence card was not the faulty
component.
Are any over-voltage lights on at the 01 D gate?
Y N
005
The over-voltage condition has disappeared.
• Check the LEDs on the 01 D gate in the order
listed below and go to the appropriate MAP:
(Refer to 'Checking SCRs' on D-560.)
LED Indicator
-4V OCl
-4v U/V
+6V U/V
-12V U/V
+12V U/V
+5V U/V
-5V U/V
OVER-VOLTAGE
MAP
2148
2141
2144
2145
2146
2142
2143
010
- Check the voltage distribution for an intermittent
loss of load (loose screws or connections) .
011
The problem has been corrected by replacing the
phase control card.
MAP
2148
2141
2144
2145
2146
2142
2143
012
- Replace -5/+5 VDC regulator assembly.
013
The problem has been corrected by replacing the frame
sequence card.
2 2
ABC D
MAP 2147-2
MAP 2147-1
/~
('~
r '\
,,/
r""'\
j
c·
/~
(
".j
'--
'.
./
;.-",
"
/
("',
r",
'--j
,--j
'--.
\,
/'
"
/'
',-- --
/
('
"
\
'--_/
/~.
\,
j
r '"
,':---
'\
"
.-
I~-)
_._--
- - -
(
{
(
(
(
OC1 INDICATOR
(
(
(
A
(
(
(
(
(
MAP 2148-1
«
(
B
1
c
«
(
(
C
(-4VDC OVER CURRENT)
PAGE
PAGE 2 OF 2
001
(Entry Point A)
• Press POWER OFF.
• Place a jumper between pins 01 D-A 1C1 MOl and
01 D-A 1C1 P08 (disables the 12 second timeout, master
seq., YZ829).
• Place jumper between pins 01D-A1E1G12 and
01D-A1E1J08 (disables the 12 sec. Frame seq. T.O.) if
not already present.
• Disconnect the Laminar Bus lugs at O1A-TBl-6, land 8
(YZ836).
• Press POWER ON.
Does OC1 indicator turn on 7
003
• Press POWER OFF.
• Reconnect the Laminar Bus lugs at 01A-TBl-6, land 8
(YZ836).
• Disconnect the Laminar Bus lugs at 01A-TBl-9, 10, 11
and 13.
• Move yellow wire #60 from 01A-TBl-13 to 01A-W2-6
(temporary -4 volt sense connection).
.Press POWER ON.
Does OC1 indicator turn on 7
Y N
004
• Determine which lead causes the OCl indication on the
-4V supply by powering up after replacing the Laminar
Bus lugs one at a time.
Y N
002
• Determine which lead causes the OCl indication on the
-4V supply by powering up after replacing the Laminar
Bus lugs one at a time.
I
I
I
f
(
(
f' (
MAP 2148-2
005
• Replace Delta I card at 01 D- A 1 Fl .
• Replace frame sequence card at 01 D-A 1 E1.
·Check that wire 122 goes to 01D-F1G03 and wire 115
goes to 01 D- Fl G08.
• Reconnect the Laminar Bus lugs at 01 A-TB 1-9, 10, 11
and 13 (YZ836) .
·At completion of service procedure, move yellow wire
#60 back to 01 A-TB 1-13 from its temporary connection
at 01A-W2-6 .
.Remove jumper between pins 01D-A1E1G12 and
01D-A1E1J08.
.Remove jumper between pins 01D-A1C1MOl and
01 D-A 1C1 P08.
CAUTION
.Isolate the short to a logic board by removing the
Laminar Bus to each board.
Before removing or
reinstalling the Laminar Bus jumpers from/to a board,
power must be off until the jumpers are all off/on .
Otherwise, the current required by the board assembly
could exceed the capacity of the board pins and burn
them off.
.Isolate to a card by removing cards. Visually inspect
the card for damage.
.At completion of service procedure, move yellow wire
#60 back to 01A-TBl-13 from its temporary
connection at 01A-W2-6.
.Remove jumper between pins O1D-A1E1G12 and
01D-A1E1J08.
• Remove jumper between pins 01 D-A 1Cl MOl and
01 D-A 1C1 P08.
I
I CAUTION
I
• Isolate the short to a logic board by removing the
Before removing or
Laminar Bus to each board.
reinstalling the Laminar Bus jumpers from/to a board,
power must be off until the jumpers are all off/on.
Otherwise,. the current required by the board assembly
could exceed the capacity of the board pins and burn
them off.
• Isolate to a card by removing cards. Visually inspect
the card for damage.
• Remove jumper between pins 01 D-A 1El G12 and
01D-A1E1J08.
• Remove jumper between pins 01 D-A 1Cl Mal and
01 D-A 1C1 P08.
A
(
OC1 INDICATOR
(-4VDC OVER CURRENT)
1 OF 2
-
2
B
MAP 2148-1
MAP 2148-2
Pow-er Supply Maps
PWR MAP 150
This page intentionally left blank
/--'"
\
'-
./
1"'1
'",- ,!
.~
0
',,--
f
_/
'-
/
"-
r~
,-
J
(~
,
~.
I
"--
_/
~
-,
./
~'1
:c-~~
""--
;
./
(-""
("'h,
"
/
\
./
r~~
r'1
\.J
r-\
"- /
f~,
'""
(~
'--
"
/~-''\
"
/
/
('-\,
'. /
,
/~"
",
(
(
(
(
(
(
(
Panel Line Test T3705L
WHAT IT DOES
Panel line test T3705L is a stand-alone version of
the Network Control Program 4 (NCP4) line test
function. This test is similar to the Emulation
Program (EP) panel line test. This routine may be
used when neither NCP nor EP is available to test
the communication line using the IBM 3705
control panel. This test supports start-stop and
BSC lines attached to the type 2 communication
scanner. T3705L may be run using the 3705-80
RPL diskette or using OLTEP/OLTSEP and the
type 1 or type 4 channel adapter.
This test is capable of:
• Sending characters continuously
• Addressing a terminal and looking for a valid
response
• Polling a terminal and receiving data
• Originating an auto-call operation
• Handling an auto-answer operation
You have the responsibility for entering a line
address, entering the set mode data, building a
selection/polling control character scheme, and
building a data stream for the test.
REQUIREMENTS
This test requires a dedicated IBM 3705-80
Communications Controller.
Configuration Data Set (CDS) Requirements:
RPL-No CDS required
CA 1-0nly channel data required (see the
CDS section)
This test does not run under control of the
diagnostic control monitor (DCM). Valid
addresses must be entered for line testing.
(
(
(
CHANNEL ADAPTER LOAD PROCEDURE
1. Press RESET and then LOAD on the 3705.
2. Respond to the DEV /TEST /OPT request
message at the host processor console
with:
r 01,'NSC/T3705L/NFE,EXT=nnny/'
DISPLAY registers A and B should equal X'FFFF'
and the WAIT light should be on. Go to the run
procedures below.
RPL DISKETTE LOAD PROCEDURE
1. Set the DISPLAY/FUNCTION SELECT
switch to the STORAGE ADDRESS position.
Set the STORAGE ADDRESS/REGISTER
DATA switches to X'OAADD'.
2. Press RESET.
3. Press LOAD.
4. Press the panel INTERRUPT pushbutton.
Note: The IPL sequence should be active at this point.
During IPL phase 3, ROS reads load program 1 (LPG1) from
disk and passes control to LPG1. It is LPG1 s function to
determine the type of load being requested by way of the CE
panel. LPG1 attempts to read the appropriate program from
disk and to pass control to it. If errors occur while
attempting to read either initial test or the I FT loader from
disk, LPG1 defaults to a LPG2 load.
Normal run time for a ROS/LPG1 /initial test/1FT disk loader
is approximately 30 seconds. Because of error retries, there
may be a 3-minute delay before an error stop occurs.
5. Are the DISPLAY registers A and B equal to
X'FFFF'? If not, see the initial test symptom
index. If the DISPLAY B data does not
compare with any of the initial test routines,
refer to the CTRL PNL section in Volume 2
and check out the CE panel test.
The TEST light should come on when the test is
loaded and ready to be executed. Go to the run
procedures below.
(
c
(
(
(
('
f'
(' (
(
(
("
(
(
RUN PROCEDURES
1. Set the DISPLAY/FUNCTION SELECT
switch to FUNCTION 1 to enter the test
options.
2. Set STORAGE ADDRESS/REGISTER DATA
switch B to 1 and press the INTERRUPT
pushbutton. DISPLAY A should contain
X'OOF1'. Enter the line address to be tested
as Oyyy (where vvv represents the desired
line ABAR address), and press the START
pushbutton.
3. DISPLAY A should contain X'OOF2'. Enter
the set mode data, LCD, and PCF turn
character as follows, then press the START
pushbutton.
STORAGE ADDRESS/REGISTER DATA SWITCHES
B
C
0
E
L PCF
l_
SwitchD
,
0
1
2
g
7
8
9
A
B
C
0
E
F
Definition
SS 9/6
Reserved
SS 8/5
Auto-call
SS 917
SS 10/7
SS 10/8
SS 11/8
Reserved
Reserved
Reserved
Reserved
BSC EBCDIC
BSC ASC I I
Reserved
Feedback check
Table of LCDs: (type 2 communication scanner)
4. DISPLAY A should contain X'00F3'. Enter
the control and SYN characters as follows:
(turn character)
C = transmit turn RTS off
o = transmit turn RTS on
Switches
BCD E
LCD (see table)
- Set mode data (see table)
Switches
B C
0
0
0
0
0
0
1
2
4
,
0
1
2
8
0
0
0
Auto-call
Monitor RI
Duplex
Ha 1f -dup I ex
2
0
1
0
x
x
x
x
o 8 x x
o 0 x x
Description
Select oscillator 0
Select oscillator 1
Select oscillator 2
Select oscillator 3
Data rate select
External clock
Synchronous clock
Data terminal ready
Diagnostic
Table of Set Mode Data:
where xx represents a SYN character for
BSC operation. DISPLAY A and DISPLAY B
should display X'FFFF' if auto-call or duplex
has not been specified.
Press the START pushbutton.
5. Do this step only if auto-call or duplex is
specified in step 4. DISPLAY A should
contain X'OOF4'. Enter the auto-call line
address. Press the START pushbutton.
6. Do this ,step only if auto-call or duplex is
specified in step 4. DISPLAY A should
contain X'OOF5'. Enter the duplex receive
line address. Press the START pushbutton.
7. DISPLAY A and DISPLAY a should contain
X'FFFF'. Set the switches as follows:
Panel Line Test
PL LN Test 005
(
Panel Line Test
Switches
BCD E
Init line
2 x x x
where x represents unused data.
Press the INTERRUPT pushbutton.
8.
Set the switches as follows:
Switches
BCD E
4 0 x x
(Executes a set mode
operation with data
specified in step 3)
where x represents scan limit bits.
Press the INTERRUPT pushbutton.
9.
Enter the test functions desired according to
the following Test Functioncharts. If
DISPLAY A and DISPLAY B contain X'OOOO',
an invalid entry occurred.
~
)
/-...
I
'\
"-,J
o
,
)
r~ '
,
rf-),
I
'
~,
,
/
PL LN Test 010
f
(
(
(
{
(
(
(
(
(
TEST FUNCTION CHARTS
(
(
Functions
ADDRESS/DATA
Switches
Band C
ADDRESS/DATA
Switches D and E
Input Data Byte
Transmit initial
42
None
Places the PAD/SYN character into the
lines SDF and PDF and sets the PCF
state to X'8'. When the PCF state goes
to X'S', the PAD/SYN character is
transmitted repeatedly.
43
Test character
Reads the test character from
ADDRESS/DATA switches D and E and
places it in the lines PDF. The line must
be in transmit mode already (PCF state
X'9'). The test character is transmitted
once and the PAD/SYN character
repeatedly thereafter.
Transmit test
character and
repeat
44
Test character
Reads the test character from
ADDRESS/DATA switches D and
places it in the lines PCF. The line must
be in transmit mode already (PDF state
X'S'). The test character is transmitted
repeatedly.
Auto-answer
(buffer 0/1 if
reply)
46
(
('
('
Test character
OX digit
Functions
ADDRESS/
DATA
ADDRESS/DATA
Switches
Switches D and E
Band C
Input Data Byte
Dial digit
47
OX digit
Loads the dial digit from ADDRESS/DATA switch E
into a l6-position buffer. The last digit loaded must
be X'F'. X'F' indicates the end of the dial digits.
Dial operate
(buffer 0/1 if
reply)
48
YX digit
Transmits dial digits previously
loaded to the auto-call unit. If
switch position E is 0, the dial digits are transmitted to
the auto-call unit; if nonzero, the sequence ends after
the number of dial digits specified in E has been
transmitted. When the dial is completed, the line is
put in receive mode. If byte 1, bit 3 is 0 and a
received character compares with one of the compare
characters, the line is set to transmit mode and buffer
o is transmitted. If bit 3 is 1, buffer 1 is transmitted.
Data rate
49
FF=high rate
OO=low rate
Selects the high or low data rate
for a line previously defined in test.
Receive mode
4A
None
Places the line in receive mode and places the first
character received in the first position of the data
buffer. If more than 16 characters are received,
subsequent characters overlap into the last byte
position of the data buffer.
Change PCF turn
character
4B
Turn character
Changes the PCF turn character
to the value set in ADDRESS/DATA switch E. Switch
D should be set to O.
Display LTS
4C
Displacement
into LTS
Displays 2 half-words of the line
test control block (LTS) beginning at the displacement
specified in ADDRESS/DATA switches D and E. See
"LTS Description" later in this section for the the LTS
format.
Transmit buffer 0
or 1
4F
E - 0 (buffer 0)
E - 1 (buffer 1)
The line is set to transmit mode
(PCF state X'S'). When PCF state X'S' goes to PCF
state X'S', buffer 0 is transmitted if byte 1, bit 7 is O.
If bit 7 is 1, buffer 1 is transmitted. When the
corresponding transmit end compare character is
detected, the line is turned around to receive mode.
End test
50
Ox digit
If byte 1, bit 7 is 0, the test is ended, the line test
control block (L TS) is cleared, and the line is placed in
a no-op state (drops DTR and resets options selected
by set mode). If bit 7 is 1, the line remains enabled
(DTR active).
Descriptions
Descriptions
Transmit test
character and fill
45
(
TEST FUNCTION CHART 2
TEST FUNCTION CHART 1
Transmit test
character and turn
to receive
(
Reads the test character from
ADDRESS/DATA switches D and
E and places it in the lines PDF. The line
must be in transmit mode already (PCF
state X'9'). The test character is
transmitted; then the line is turned
around to the receive state. When the
line begins to receive characters, the
first 15 characters are stored in the LTS
data buffers beginning with the second
byte. The first byte contains the last
character transmitted (the test
character). If more than 15 characters
are received, subsequent characters are
overlapped into the last byte position of
the data buffer.
Performs set mode operation
with 'data terminal ready'
on. When someone dials in, a test is
made for start-stop or BSC operation.
For start-stop, PCF state X'7'(receive)
is set. For BSC, state X'5' (monitor for
phase) is set. When character phase is
detected, state X'7' (receive) is set. If
byte 1, bit 7 is 0 and the received
compare character compares with one of
the compare characters, the line is set to
transmit mode and buffer 0 is
transmitted. If bit 7 is 1, buffer 1 is
transmitted.
Note: Display the LTS to sea the data received. See "LTS Description" later in this section for the LTS format.
Panel Line Test
PL LN Test 015
Panel Line Test
TEST FUNCTION CHART 3
Functions
Load buffer 0
Load buffer 1
TEST FUNCTION CHART 4
ADDRESS/DATA
Switches
Band C
ADDRESS/DATA
Switches D and E
Input Data Byte
51
XX digit
52
XX digit
Descriptions
The character in switches D and E is stored in
a 40-character buffer. Leading PADs and
SYNs must be inserted for the type 3
communication scanner (T3CS) also, due to
the use of PCF state 'E' during the transmit
operation.
XX digit
The character in switches D and E
is stored as the first receive
compare character.
Load receive
compare
character 2
54
XX digit
Same as Load receive compare
character 1 except the character
is stored as the second receive compare
character.
Load receive
compare
character 3
55
XX digit
Same as Load receive compare
character 1 except the character
is stored as the third receive compare
character.
Load swap transmit56
buffer 0 compare
character
XX digit
The character in switches D and E
(XX) is stored as the swap
transmit buffer 0 compare character.
Load swap transmit57
buffer 1 compare
character
XX digit
Same as Load swap transmit
buffer 0 compare character
except the character is stored as the swap
transmit buffer 1 compare character.
Initialize
buffer 0 offset
XX digit
Sets in the LTS the displacement
(normally X'OO') into the appropriate buffer at
which the storing of data entered through the
panel is to begin. As the data is subsequently
entered, a count of the data characters is
accrued; this count is then used by the
transmit routine to determine when the line
should be placed into receive mode.
"'-)I
f~
"
J
o
ADDRESS/DATA
Switches D and E
Input Data Byte
59
XX digit
Same as function 58 except the
displacement is for buffer 1.
,BSC cyclic
5A
redundancy check
(CRC) accumulation
buffer 0/1
00
(for buffer 0)
01
(for buffer 1)
Accumulates the CRC characters
for BSC data (to be transmitted)
as it is entered into either
buffer 0 or buffer 1 .
Set receive mode
byte
Setting
dependent on
option selected
(see
Descriptions
column)
Allows the selection of certain
options by setting a control byte
in the LTS (line test control
block).
Bit 3 indicates that the option
of checking for 2 special characters (set by
subfunctions 53 and 54) in sequence in a
received data stream is to be used by the
panel line test function to determine when the
line being tested should be placed into
transmit mode.
Bit 6 of the control byte indicates that CRC
character accumulation is to be performed on
BSC data during receive operations.
Bit 7 gives the same indication for SDLC data.
Initialize buffer
1 offset
Same as Load buffer 0 except the character is
stored in buffer 1.
53
1"'"
, ' ,!,''j
ADDRESS/DATA
Switches
Band C
Functions
Load receive
compare
character 1
58
PL LN Test 020
(~
)
o
5C
Descriptions
o
(
(
(
f
(
(
(
DEFINITION OF DISPLAY A AND DISPLAY B DURING TEST
C' ('
(
(
(
(
(
(
(
(
(
(~
LTS Description (Hex is LTS displacement value)
Control Panel Display Output
Bits
DISPLAY A
ICW Bits
ICW Fields
0123
4567
0123 4567
00
LTSCTL: Control byte.
LTSPDSYN: PAD or SYN character
for this line.
o
o
xxxx
xxxx
xxxx
02
LTSSTMD: The system-generated
set mode SDF.
LTSLCD: The system-generated
LCD value.
04
LTSXLAD: The line address ofthe line
being tested.
06
LTSRLAD: Duplex receive line address.
08
LTSDIALL: Buffer for receive data characters or
auto-call dial digits.
o
o
o
o
o
o
o
Byte 0
0-7
SCF
xxxx
Byte 1
8-15
xxxx
PDF
xxxx
16-23
LCD PCF
xxxx
xxxx
OS Leads
Data Set Leads Display
BYTE 1
Bit
o
1
2
l5
6
7
FIELD DESCRIPTIONS
Byte X
6
7
o
DISPLAY B
ICW Bits
ICW Fields
HEX
Data Line
Clear to send
Ring indicator
Data set ready
Receive line signal
Receive data bit buffer
Diagnostic wrap mode
Bit service reguest
Zero (not used)
BYTE 1
Bit
*Auto-call
o
Abandon call and retry
Present next di~it
Data line occupied
Digit present
Call request
Call ori~inating status
Bit service request
Interrupt remember
1
2
~
5
6
7
* The LCD displays a X'3' (auto-dial) when the DS leads display dial line information.
OA
OC
OE
10
12
14
16
This is the receive buffer for a type 2 communication scanner
and the address of the receive buffer for a type 3 communication
scanner.
18
LTSNFCNT: Counter for non-X'FF' data characters when receiving.
1A
LTSNOCNT: Counter for non-X'QO' data characters when receiving.
1E
LTSDCNT: Counter for auto-call
dial digits and receive data
characters.
20
LTSACLN: Auto-call line address.
22
LTSXL2: Transmit level 2 pointer.
24
LTSRL2: Receive level 2 pointer.
26
LTSDATAP: Transmit buffer pointer.
28
LTSRCC1: Receive compare
character 1.
LTSRCC2: Receive compare
character 2.
2A
LTSRRC3: Receive compare
character 3.
LTSWAP1: Swap transmit
buffer 0 compare character.
2C
LTSWAP2: Swap transmit buffer 1
compare character.
LTSXENDO: Buffer 0 transmit
end compare character.
LTSTU RN: Transmit tu rn
LCD/PCF.
Panel Line Test
PLLN Test 025
{
Panel Line Test
TEST EXAMPLES
PL LN Test 030
Read from an IBM 2770 and Accumulate Cyclic Redundancy Check (CRC)
Write Data to IBM 2770 (BSC Lines)
ADDRESS/
DATA
Switches
BCDE
Step
Functions
ADDRESS/
DATA
Switches
BCDE
1
Initialize buffer 0
5800
Press INTERRUPT
Sets initial buffer 0 offset.
2
Initialize buffer 1
5900
Press INTERRUPT
Sets initial buffer 1 offset.
2
Initialize buffer 0
5800
Press INTERRUPT
Sets offset for buffer o.
3
Load buffer 0
51 x x*
Press INTERRUPT
Loads buffer 0 with address
sequence.
3
Load buffer 0
51 x x*
Press INTER RU PT
Loads buffer 0 with the
polling sequence.
Loads buffer 1 with address
sequence.
4
Set receive mode
5C02
Press INTERRUPT
5
6
7
Transmit initial
Transmit buffer 0
End test
4200
4 F 0 0**
5000
Press INTERRUPT
Press INTERRUPT
Press INTERRUPT
Sets receive mode byte to
BSC accumulation on receive.
Sets transmit state.
Transmits from buffer O.
4
Load buffer 1
52 x x**
Step
Action Required
Descriptions
Press INTERRUPT
Functions
Action Required
Enter data at
the terminal and
press the
REQUEST key.
1
5
Accumulate CRC
SAO 1
Press INTERRUPT
Accumulates and stores CRC
in buffer 1.
6
Set compare
character 1
5330
Press INTERRUPT
Sets receive compare
character 1.
7
Set swap character 1
5661
Press INTERRUPT
Sets first swap character.
8
Set swap character 2
5770
Press INTERRUPT
Sets second swap character.
9
Transmit initial
4200
Press INTERRUPT
Sets transmit state.
10
Transmit buffer 0
4 F 0 0***
Press INTERRUPT
Transmits from buffer O.
11
End test
5001
Press INTERRUPT
Ends the test.
Descriptions
* xx =X'FF', X'AA', X'32', X'32', X'FF', X'FF', X'AA', X'32', X'32', addr, addr, X'FO', X'2D', X'FF'
** If data is received properly and the CRC is correct, the line turns around, transmits buffer 0 again, and
goes into receive mode. The terminal times out.
* xx= X'FF', X'AA', X'32', X'32, X'37', X'FF', X'FF', X'AA', X'32', X'32', addr, X'2D', X'FF'.
** xx= X'FF', X'FF', X'AA', X'32', X'32', X'02', X'E3', X'C5', X'E2', X'E3', X'40', X'C2', X'D3', X'D6',
X'C3', X'D2', X'15', X'03'.
*** TEST BLOCK should print out repeatedly on the terminal until step 11 ends the test.
(',
"
,
\
.)
I
.'
./
/
!~I
..
<~
C)
(
(
(
l
(
(
(
(
{
(
(
(
(
(
(
(~
Read Data with a Two-Character Compare
Step
Functions
ADDRESS/
DATA
Switches
BCDE
Action Required
Descriptions
Sets buffer 0 offset.
2
Initialize buffer 0
5800
Enter ABCD1234
at the terminal
and press the
REQUEST key.
Press INTERRUPT
3
Load buffer 0
51 x x*
Press INTERRUPT
4
Set receive mode
5C10
Press INTERRUPT
5
Set first compare
character
53C4
Press INTERRUPT
Stores first receive
compare character.
6
54F1
Press INTERRUPT
7
a
Set second compare
character
Transmit initial
Transmit buffer 0
4200
4 F 0 0**
Press INTERRUPT
Press INTERRUPT
Stores second receive
compare character.
Sets transmit mode.
Transmits from buffer O.
9
Display LTS
4COa
4 C 1 2***
Press INTERRUPT
Displays received data.
10
End test
5000
Press INTERRUPT
Ends the test.
Loads buffer 0 with the po"
sequence.
Sets two-character compare
on receive.
* xx:;; X'AA', X'32', X'32', X'3T, X'FF', X'FF', X'AA', X'32', X'32', addr, addr, X'FO', X'2D' X'FF'.
** If the data is received properly, the line turns around, transmits buffer 0 again, and goes into receive
mode. The terminal times out.
*** The last received data character should be X'F1'.
Panel Line Test
PL LN Test 035
(
Panel Line Test
Address an IBM 1050 (S/STerminal) Using Buffers 0 and 1
Step
Functions
1
Initialize buffer 0
5800
Press INTERRUPT
Sets initial buffer 0 offset.
2
Initialize buffer 1
5900
Press INTERRUPT
Sets initial buffer 1 offset.
3
Load boffer 0
51 F F
Press INTERRUPT
Loads the PAD character
X'FF in buffer O.
4
Load buffer 0
51 F F
Press INTERRUPT
Loads the second PAD
character X'FF' in buffer O.
5
Load buffer 0
517C
Press INTERRUPT
Loads a circle C character
into buffer O.
6
Load buffer 0
51A3
Press INTERRUPT
Loads the terminal address
X' A3' into buffer O.
7
Load buffer
5120
Press INTERRUPT
Loads the component select
address X'20' into buffer O.
8
Load buffer 1
52FF
Press INTERRUPT
Loads the PAD character
X'FF into buffer 1.
9
Load buffer 1
5234
Press INTERRUPT
Loads the end-of-address
character X'34' into buffer 1.
10
Load buffer 1
52XX
Press INTERRUPT
Loads data character X'xx'
into buffer 1.
11
Load buffer 1
525E
Press INTERRUPT
Loads a circle B character
X'5E' into buffer 1.
12
Load buffer 1
52yy
Press INTERRUPT
Loads longitudinal
redundancy check (LRC)
character X'yy' into buffer 1.
If the same data character is
entered an even number of
times in step 10, the LRC is a
circle B, which can be entered
for X'yy'.
13
Load buffer 1
swap compare
character
5737
Press INTERRUPT
Loads the swap compare
character for buffer 1.
If the response from the
terminal is X'3T, after buffer
o is transmitted, the line is
turned around and buffer 1 is
transmitted.
("~
/
(1
r"'1
"'--j
"ji
f'
)
Transmit
4FOO
Press INTERRUPT
Transmits buffer O.
Notes:
ADDRESS/
DATA
Switches
BCDE
/~
,---_/
14
PL LN Test 040
1.
Action Required
Descriptions
(-'"
/
«~j
"-- _/
,r~
"---
J
r~I
:
,
"-
'
/
2.
,0
(
\
/
'-
-'
(-""
After step 11 is executed, buffer 0 is transmitted to the address of the IBM 1050 terminal. The line is set to
receive mode. If the terminal responds with a circle Y (X'3T), the line is set to transmit mode and buffer 1 is
transmitted.
ADDRESS/DATA switch A is always set to X'O'.
()
r'~
~:J
,<"",
"'",
_/
~
'
(-~
(
f'
"-~/
\...../'
"-
I
"--
~-)
r~
I
"'-
(
(
f
c
(.
(
(
(
(
(
(
(
(
(
(
(
f'
.(
(
Send to and Receive from a SIS Terminal (IBM 2741 or IBM 3767)
Step
Functions
ADDRESS/
DATA
Switches
BCDE
1
Initialize buffer 0
5800
Press INTERRUPT
Sets initial buffer 0 offset.
2
Load buffer 0
51 x x*
Press INTERRUPT
Loads data into buffer o.
3
Set compare
character 1
537C
Press INTERRUPT
Sets receive compare
character 1.
4
Transmit buffer 0
4FOO
Press INTERRUPT
Transmits buffer o.
Action Required
Descriptions
* xx =X'FF', X'AA', X'34', X'1 F', X'54', X'20', X'10', X'70', X'08', X'68', X'58', X'38', X'04', X'64', X'6D',
X'7C', X'FF'.
0123456789 should print out on the terminal and the terminal go into transmit mode. Key a message
into the IBM 2741 and send itto the IBM 3705. The IBM 3705 should send 0123456789. This
sequence can be repeated until the test is terminated.
ERROR STOPS
Error stops that may occur in the panel line test are indicated in DISPLAY A and DISPLAY B. See the
following list for a description of the stops and recovery actions required:
Description
DISPLAY A
DISPLAY B
80FC
80FC
An unexpected level 4 interrupt occurred; only PCI-Ievel
interrupts are expected. register X'15' contains the results
of an input X'7F' instruction executed when the interrupt
occurred. To recover from this stop, the program must be
reloaded.
80FE
80FE
An unexpected level 1 interrupt occurred. Register X'01'
contains the ORed results of an input X7E' and an input
X'76' instruction executed when the interrupt occurred. If
bits 0.1, 0.2, 0.3, or 0.4 are on, a communication scanner
level 1 interrupt occurred; pressing the START pushbutton
causes the program to attempt a scanner reset and to
restart. If none of these bits are on, another type of level 1
interrupt occurred, and the program must be reloaded.
80FF
xxxx
A program or hardware failure caused a branch to storage
location X'OOOOO'. DISPLAY B contains the address of the
instruction causing the branch. To recover, the program
must be reloaded.
Panel Line Test
PL LN Test 045
This page intentionally left blank
('~
r'1
"--/'
r"~
/
"
/
"
/
f
(
(
(
(
(
(
(
(
(
(
Index
A
abend codes START 051
abort
control DCM 010
current routine and continue I N IT 030
adapter level 1 interrupt request START 010
adapter level 2 or 3 interrupt
request START 010
address
compare display with test DCM 025
compare display without test DCM 020
display routine starting address I N IT 030
example 1050 terminal PN LN TEST 035
exception abend=X'0009' START 055
lagging register X'74' input
command START 010
array card id 1FT STG 230
B
bypass
error stop, CE sense switch DCM 030
new error stops, CE sense switch DCM 030
C
CAOLT
error information CA OLT 020
how to execute CA 0 LT 010
messages CA 0 LT 010
>requirements CA OLT 010
test descriptions CA OLT 020
what CA OLT does CA OLT 010
CC check analysis flowchart START 090
CCU level 1 interrupt request START 010
CCU manual intervention routines 1FT 008
CCU symptom index CCU 050
CE meter test CCU 102
CE options
abort current routine and continue I N IT 030
display routine starting address INIT 030
loop on error I N IT 030
loop on program level I N IT 030
CE sense switches
bypass error stop DCM 030
bypass new error stops DCM 030
cycle on request DCM 030
descriptions DCM 030
halt before execution DCM 030
include manual intervention routines DCM 030
loop on first error DCM 030
problem definition mode DCM 030
repeat each routine DCM 030
restart routine on first error DCM 030
setting DCM 030
summary START 022
wait before continuing DCM 030
channel adapter symptom index 1FT CA 1 300, 1FT CA4 365
channel adapter 1 OLTs START 020
channel data CDS card CDS 030
check list for CDS cards CDS 010
checkout procedure START 020
codes
EP START 061
line set types CDS 040
NCP channel START 061
NSC START 061
oscillator speeds CDS 040
communication scanner symptom index 1FT CSB 400
configuration data set (CDS)
channel data card CDS 030
dummy card CDS020
index and data cards CDS 030
prerequisite check list CDS 010
prerequisite information CDS 010
range definition cards CDS 040
requirement for 3705-80 CDS 010
what CDS does CDS 010
continuous display
with test DCM 020
without test DCM 020
control panel interface OCM 015
cycle on request, CE sense switch DCM 030
D
DCM messages DeM 005
description of DCM functions DCM 010
diagnostic control monitor (DCM)
abort control DCM 010
address compare display with test DCM 025
address compare display without t99t 020
continuous display with test DCM 020
continuous display without test DCM 020
control panel interface DCM 015
description of functions DCM 010
dynamic communication to routines DCM 035
error control information DCM 015
execution DCM 005
how to use DISPLAY/FUNCTION SELECT
switch DCM 035
manual intervention routines DCM 010
messages DCM 005
refresh last display code DCM 015
requirements DCM 005
routine execution DCM 015
scope synchronization DCM 015
sense switch description DCM 030
set, reset, or display CE sense switches DCM 030
set or display repeat count DCM 030
setting up a scoping loop DCM 040
stop panel utility DCM 030
symptom index DCM 100
using panel utilities DCM 015
why program display light is not on DCM 040
DISPLAY A description INIT 030
DISPLAY B description INIT 030
display routine starting address INIT 030
DISPLAY/FUNCTION SELECT switch
how to use DCM 035, 1FT 006
summary START 022
dummy CDS card CDS 020
dynamic communication to routines DCM 035
E
EC installation START 080
emulator error log START 040
EP
command codes START 061
hardstop codes START 051
EREP
MDR summary START 113
permanent SDLC station error START 111
type 2 CSB error MDR START 112
EREP START 100
error control information DCM 015
error log, emulator START 040
errors permanent
BSC/SS START103
line, MDR START 102
SDLC link, MDR START 106
examples
address 1050 terminal PN LN TEST 035
OCM address compare display
with test DCM 025
OCM continuous display with test DCM 020
emulator error log START 040
1FT run IFT010
read data two character
compare PN LN TEST 030
read from 2770 PN LN TEST 030
send/receive SIS terminal PN LN TEST 035
write data to 2770 PN LN TEST 025
execution of
DCM DCM 005
1FT 1FT 002,CA OLT 010
INIT INIT010
panel line test PL LN TEST 005
routine OCM 015
line failure analysis START 010
maintenance procedures START 005
formats
address exception START 055
branch to zero by level 5 START 055
invalid instruction operation code
check START 055
I/O instructions exceptions START 055
MDR START 053
permanent line errors START 053
permanent SDLC errors START 054
protection check START 055
station statistics START 053
type 1 channel adapter errors START 055
type 2 communication scanner errors START 055
unresolved level 1 interrupt
exceptions START 056
unresolved level 3 interrupt
exceptions START 056
H
halt before execution, CE sense switch DCM 030
hardstop codes, EP START 051
how to
execute CA OLT CA OLT 010
find 1FT symptom index error code 1FT 012
set CE sense switches DCM 030
use DISPLAY/FUNCTION SELECT switch 1FT 006,
DCM 035
use I FT symptom index 1FT 012
use I N IT symptom index I N IT 030
I
1FT
failure indications 1FT 008
how to request 1FT 008
how to terminate 1FT 008
manual intervention routines 1FT 008
1FT (internal functional tests) 1FT 002
I FT messages 1FT 004
index and data CDS cards CDS 030
I N IT (initial test)
CE options I N IT 030
communications controller loader
utility I N IT 020
execution INIT010
failure indications I N IT 030
how to use symptom index I N IT 030
interpreting display lights during
loading INIT 020
messages INIT 010
normal run indications INIT 020
remote program loader I N IT 020
requirements INIT 010
symptom index I N IT 106
what it does I N IT 010
initial test symptom index INIT 100
input commands
X'40' CSB 2 START 030
X'43' CSB 2 START 030
X'67' CAl interrupt request START 030
X'68' remote program loader START 030
X'7D' CCU check register START 010
X'7E' CCU level 1 interrupt requests START 010
X'74' lagging address register START 010
X'76' adapter level 1 interrupt
requests START010
X'77' adapter level 2 or 3 interrupt
request START 010
X'79' utility START 010
internal functional test 1FT 002
interrupt requests
adapter level 1 START 010
adapter level 2 or 3 START 010
CCU level 1 START 010
F
failure indications 1FT 012
flowcharts
CC check analysis START 090
CCU/CHECK/HARDSTOP/LOAD
lights START 010
L
line error
permanent, BSC/SS START 103
permanent, MDR START 102
line failure analysis START 070
line set type codes CDS 040
loop on
error I N IT 030
first error CE sense switch DCM 030
program level I N IT 030
M
maintenance procedure START 005
manual intervention routines, CE sense
switch DCM 030
manual intervention routines DCM 010, 1FT 008
MDR record formats START 053
M DR summary START 113
MES installation START 080
messages
meter test, CE CCU 102
CAOLT CAOLT010
DCM DCM 005
host processor console START 060
1FT 1FT 004
INIT INIT 010
N
NCP
abend codes START 051
channel commands START 061
check record pool START 045
command codes START 061
direct addressable storage START 045
notes for symptom indexes
CA1 1FT 1FT CAl 360
CCU special note CCU 070
CCU CCU 110
1FT STG 1FT STG 230
INIT INIT 166
o
OCl indicator PWR MAP 150
OLTEP, how to terminate 1FT 008
OLTSEP, how to terminate IFT008
oscillator speed codes CDS 040
P
panel line test (PN LN TEST)
channel adapter load PN LN TEST 005
error stops PN LN TEST 040
requirements PN LN TEST 005
RPL diskette load procedure PN LN TEST 005
run procedures PN LN TEST 005
test function charts PN LN TEST 01 0
what panel line test does PN LN TEST 005
panel test START 020
PEP abend codes START 051
permanent errors
BSC/SS START103
line, MDR START 102
SDLC link, MDR START 106
SDLC station error, MDR START 111
power on problems PWR MAP 030
power problem isolation PWR MAP 020
power supply maps
+12 V under voltage PWR MAP 130
+5 VDC under voltage (storage) PWR MAP 080
+6 V under voltage PWR MAP 110
OCl indicator PWR MAP 150
power on problems PWR MAP 030
problem isolation PWR MAP 020
-12 V under voltage PWR MAP 120
-4V under voltage PWR MAP 060
problem definition mode, CE sense switch DCM 030
program display light, why not on DCM 040
R
range definition CDS cards CDS 040
refresh last display code DCM 015
repeat each routine, CE sense switch DCM 030
requirements
CA OLT CA OLT 010
Index
X-1
Index
configuration data set COS 010
OCM OCM 005
INIT INIT010
restart routine on first error, CE sense
switch OCM 030
RDS test START 020
routine execution OCM 015
run procedures
OCM OCM 005
1FT 1FT 002, CA DLT 010
INIT INIT 010
panel line test PL LN TEST 005
routine OCM 015
S
scope
setting up loop OCM 040
sync points START 023, OCM 015
synchronization OCM 015
test pins OCM 015
sense
command ending status START 061
information START 062
sense bit definitions START 061
sense command ending status START 061
sense switch description OCM 030
service aids (see Volumes 2 and 3)
CI; indicator latch card 1-180
checking +6vdc, +12vdc, 12vdc, and 4vdc
SCRs 0-560
control panel procedures 1-120
control panel test of CCU data path 1-150
diskette controller diagnostic approach for
read failures F-490
indicator lights, charts and procedures 0-575
physical locations E-OOO
read/write circuit principles F-520
remote diskette drive power supply
maintenance procedure F-550
removal, adjustment, and replacement
procedures F-540
RDS test 2-000
scope points and jumpering capabilities 1-150
test blocks 1-190
tools and test equipment E-010
usage meter 0-590
set, reset, or display CE sense switches OCM 030
set or display repeat count OCM 030
setting up a scoping loop OCM 040
station statistics MOR EREP START 106
status, sense command ending START 061
stop panel utility OCM 030
.
storage array card id 1FT STG 230
storage manual intervention routines 1FT 008
storage symptom index 1FT STG 200
symptom index
CCU CCU 050
channel adapter 1FT CA 300
communication scanner 1FT CSB 400
diagnostic control monitor OCM 100
how to find I FT error code 1FT 012
initial test I N IT 100
mask field 1FT 010
register usage 1FT 010
storage 1FT STG 200
Z
Z3705AAA type 1 CA load module 1FT 002
Z3705ACA OCM OCM 100
Z3705AOA INIT section 1 INIT 100
Z3705AEA INIT section 2 INIT 106
Z3705BAA CCU 1FT section 1 CCU 050
Z3705BBA CCU I FT section 2 CCU 070
Z3705BCA CCU 1FT section 3 CCU 090
Z3705CAA storage 1FT STG 200
Z37050AA type 1 CA 1FT section 1 1FT CA1 300
Z3705GAA type 2 CSB 1FT section 11FT CSB 400
Z3705GBA type 2 CBS 1FT section 2 1FT CSB 450
Z3705GCA type 2 CSB 1FT section 3 1FT CSB 500
Z3705GOA type 2 CSB 1FT section 41FT CSB 550
Z3705GEA type 2 CSB IFTsection 5 1FT CSB 600
Z3705JAA type 4 CA 1FT section 1 1FT CA4 365
Z3705JBA type 4 CA 1FT section 21FT CA4 374
1
-12 V under voltage problem
+12 V under voltage problem
4
-4V under voltage problem
PWR MAP 120
PWR MAP 130
PWR MAP 060
5
+5 VOC under voltage (storage)
problem PWR MAP 080
6
+6 V under voltage problem
PWR MAP 110
T
type 2 CSB, manual intervention
routines 1FT 009
type 2 CSB error MOR EREP START 112
U
using panel utilities
OCM 015
W
wait before continuing, CE sense switch OCM 030
why program display light is not on OCM 040
...",
r"\
'.
/
j
'--
/
t
'\,
'~/
~
''\
r'\
',-- /
'-.
/
\
r
I
'.,
/
'..... /
f'\
/
'\
f \
I
'...../
.j
'.
/
'\,
X-2
This page intentionally left blank
" System
\
~intenance
3705-80 Communications Controller Theory-Maintenance Volume I
Library
Lc=J
.
'\
,:J System
,
-J
~
1
;i
,/
/,-------Cut Here - -
.J
'.
,of
tI
.1
'\
",
"
/
'"
.7
j
-------- ------- ---.--... -
-
~
-®
Printed in U.S.A.
SY27-0208-1
(
(
(
(
(
(
('
f
f'
3705·80 Communications Controller
Theory·Maintenance
Volume 1
(
READER'S
COMMENT
FORM
(
(
(
f
(
I
I
(
(
(
(
(
(
(
(
3705·80 Communications Controller
Theory·Maintenance
Volume 1
READER'S
COMMENT
FORM
Order No. SY27·0208·1
Order No. SY27·0208·1
This form may be used to communicate your views about this publication. They will be
sent to the author's department for whatever review and action, if any, is deemed
appropriate. Comments may be written in your own language, use of English is not
required.
IBM may use or distribute any of the information you supply in any way it believes
appropriate without incurring ahy obligation whatever. You may, of course, continue
to use the information you supply.
Note: Copies of IBM publications are not stocked at the location to which this form
is addressed. Please direct any requests for copies of publications, or for assistance in
using your IBM system, to your IBM representative or to the IBM branch office se",ing
your locality.
Possible topics for comment are:
This form may be used to communicate your views about this publication. They will be
sent to the author's department for whatever review and action, if any, is deemed
appropriate. Comments may be written in your own language, use of English is not
required.
IBM may use or distribute any of the information you supply in any way it believes
appropriate without incurring ally obligation whatever. You may, of course, continue
to use the information you supply.
Note: Copies of IBM publications are not stocked at the location to which this form
is addressed. Please direct any requests for copies of publications, or for assistance in
using your IBM system, to your IBM representative or to the IBM branch office serving
your locality.
Possible topics for comment are:
Carity
Accuracy
Completeness
Organization
Coding
Retrieval
Legibility
(
Carity
Accuracy
Completeness
Organization
Coding
Retrieval
Legibility
\
If you would lik" II reply, complete the following (Please Print):
If you would like II reply, compillte the following (Please Print):
Your Name _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Date _ _ _ _ __
________________________________
Your Name ____________________ Date _______
Company Name _____________________________________
~panyName
Department _______________________________________
Department ________________________________
Street Address _____________________________________
Street Address _______________________------------City _______________ 5tate ________ Zip Code _____
City ______________ State _________ Zip Code ______
Thank you for your cooperation. No postage stamp is necessary if mailed in the U.S.A. (Elsewhere, an IBM office
or representative will be happy to forward your comments.)
Thank you for your cooperation. No postage stamp is necessary if mailed in the U.S.A. (Elsewhere, an IBM office
or representative will be happy to forward your comments.)
t'
SY27 ·0208·'
SY27·0208·'
I
~
ADDITIONAL COMMENTS:
.
ADDITIONAL COMMENTS:
..
o
o
."
o
~
»
Ir-
•:i"
I
I
Please Do Not Staple
••••••.•.•• Fold and Tape, .•.....•••..••••.••..•••••••••••••••••••••••••••••• Fold and Tape
111111
Please Do Not Staple
················ ..1
• • • • • • • • • • • • • • • Fold and Tape, .••..•.••••••••••••••••••••••••••••••••••••••••.••• Fold and Tape
I
NO POSTAGE
NECESSARY
IF MAILED
IN THE
UNITED STATES
111111
..........,....... ·1
NO POSTAGE
NECESSARY
IF MAILED
INTHE
UNITED STATES
Co)
.....
o
I ~~
3
3
c::::
:l
~
...o·.
.,.:l
BUSINESS REPL V MAIL
BUSINESS REPL V MAIL
FIRST CLASS
FIRST CLASS
PERMIT NO. 40
ARMONK, N.Y.
PERMIT NO. 40
n
o
...Q.
:l
ARMONK, N.Y.
.,
(II
POSTAGE WILL BE PAID BY ADDRESSEE
POSTAGE WILL BE PAID BY ADDRESSEE
International Business Machines Corporation
Dept. E02
P.O. Box 12195
Research Triangle Park
North Carolina 27709
International Business Machines Corporation
Dept. E02
P.O. Box 12195
Research Triangle Park
North Carolina 27709
• • • • • • • • . • • • • Fold and Tape •••.••••••.••.••.•••••.•••••••••.•••••••••••••••.••• Fold and Tape, ••••••••.••••••.
••••••••••.•••• Fold and Tape ••••.•••••••••••.•••.••••••••••.••••.••••••••••••••• Fold and Tape, •••.•••.••••••••
.,-g
...
:i"
(II
I
Co
:l
C
c"
~
C/)
~
N
.....
-
6
-_
..... -- ------
----.-- -----'- -- _.-------..--...
-~-
-@
--
--.~
N
0
cp
-@
-.
- ----~--
~
-~--,
-
I
~)
rOll
"
",j
,,~-
~
('I
\,,--~
r)
~.
("~
r'o,)
\
"J
'~
I
'-~ j
!'~,
/
1'''
i0
(-~
'~--;/
(
""
'-,j
(""I
/)\
:
l'
I'~"',
'.
"-~ ./
~.'
I
(,.....~
I
I
'-,~
r~
'-~~
./
11\
I
0,
<
/
~
\
()
Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.3 Linearized : No XMP Toolkit : Adobe XMP Core 4.2.1-c041 52.342996, 2008/05/07-21:37:19 Create Date : 2018:10:07 16:33:38-08:00 Modify Date : 2018:10:07 17:12:16-07:00 Metadata Date : 2018:10:07 17:12:16-07:00 Producer : Adobe Acrobat 9.0 Paper Capture Plug-in Format : application/pdf Document ID : uuid:4db8092a-63a8-0b48-b888-c73266dde87e Instance ID : uuid:1fc1df28-6872-8b48-981e-13c95a388042 Page Layout : SinglePage Page Mode : UseNone Page Count : 342EXIF Metadata provided by EXIF.tools