SC16IS752; SC16IS762 Dual UART With I2C Bus/SPI Interface, 64 Bytes Of Transmit And Receive FIFOs, IrDA SIR Built In Support SC16IS752

2017-12-10

• 1. General description
• 2. Features and benefits
  • 2.1 General features
  • 2.2 I2C-bus features
  • 2.3 SPI features
• 3. Applications
• 4. Ordering information
• 5. Block diagram
• 6. Pinning information
  • 6.1 Pinning
  • 6.2 Pin description
• 7. Functional description
  • 7.1 Trigger levels
  • 7.2 Hardware flow control
    • 7.2.1 Auto-RTS
    • 7.2.2 Auto-CTS
  • 7.3 Software flow control
    • 7.3.1 Receive flow control
    • 7.3.2 Transmit flow control
  • 7.4 Hardware Reset, Power-On Reset (POR) and Software Reset
  • 7.5 Interrupts
    • 7.5.1 Interrupt mode operation
    • 7.5.2 Polled mode operation
  • 7.6 Sleep mode
  • 7.7 Break and time-out conditions
  • 7.8 Programmable baud rate generator
• 8. Register descriptions
  • 8.1 Receive Holding Register (RHR)
  • 8.2 Transmit Holding Register (THR)
  • 8.3 Interrupt Enable Register (IER)
  • 8.4 FIFO Control Register (FCR)
  • 8.5 Interrupt Identification Register (IIR)
  • 8.6 Line Control Register (LCR)
  • 8.7 Modem Control Register (MCR)
  • 8.8 Line Status Register (LSR)
  • 8.9 Modem Status Register (MSR)
  • 8.10 Scratchpad Register (SPR)
  • 8.11 Transmission Control Register (TCR)
  • 8.12 Trigger Level Register (TLR)
  • 8.13 Transmitter FIFO Level register (TXLVL)
  • 8.14 Receiver FIFO Level register (RXLVL)
  • 8.15 Programmable I/O pins Direction register (IODir)
  • 8.16 Programmable I/O pins State register (IOState)
  • 8.17 I/O Interrupt Enable register (IOIntEna)
  • 8.18 I/O Control register (IOControl)
  • 8.19 Extra Features Control Register (EFCR)
  • 8.20 Division registers (DLL, DLH)
  • 8.21 Enhanced Features Register (EFR)
• 9. RS-485 features
  • 9.1 Auto RS-485 RTS control
  • 9.2 RS-485 RTS output inversion
  • 9.3 Auto RS-485
    • 9.3.1 Normal multidrop mode
    • 9.3.2 Auto address detection
• 10. I2C-bus operation
  • 10.1 Data transfers
  • 10.2 Addressing and transfer formats
  • 10.3 Addressing
  • 10.4 Use of subaddresses
• 11. SPI operation
• 12. Limiting values
• 13. Static characteristics
• 14. Dynamic characteristics
• 15. Package outline
• 16. Handling information
• 17. Soldering of SMD packages
  • 17.1 Introduction to soldering
  • 17.2 Wave and reflow soldering
  • 17.3 Wave soldering
  • 17.4 Reflow soldering
• 18. Appendix
  • 18.1 Errata for Rev. E added 12 August 2011
    • 18.1.1 IrDA wake-up
    • 18.1.2 Clearing of RX FIFO overflow
    • 18.1.3 Interrupt priority encoder
    • 18.1.4 Time-out interrupt
• 19. Abbreviations
• 20. Revision history
• 21. Legal information
  • 21.1 Data sheet status
  • 21.2 Definitions
  • 21.3 Disclaimers
  • 21.4 Trademarks
• 22. Contact information
• 23. Contents