Professional Computer Technology A710820D Sub 1GHz RF Module User Manual

Professional Computer Technology Limited. Sub 1GHz RF Module

user manual

May., 2013, Version 0.3 Professional Computer Technology Limited. AIRFONIX 9月 16 日 9月 16 日 RF module Reference Manual
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 1 Federal Communication Commission Interference Statement This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures: - Reorient or relocate the receiving antenna. - Increase the separation between the equipment and receiver. - Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. - Consult the dealer or an experienced radio/TV technician for help. FCC Caution: To assure continued compliance, (example - use only shielded interface cables when connecting to computer or peripheral devices). Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. That be strictly restricted to integration into battery powered host devices. IMPORTANT NOTE: This module is intended for OEM integrator. The OEM integrator is still responsible for the FCC compliance requirement of the end product, which integrates this module. Any changes or modifications not expressly approved by the manufacturer could void the user's authority to operate this equipment. USERS MANUAL OF THE END PRODUCT: LABEL OF THE END PRODUCT: The final end product must be labeled in a visible area with the following " Contains TX FCC ID: PSH-A710820D ". If the size of the end product is larger than the palm of the hand, then the following FCC part 15.19 statement has to also be available on the label: This device complies with Part 15 of FCC rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference and (2) this device must accept any interference received, including interference that may cause undesired operation.
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 2 Overview PCT 433MHz -15dBm module is designed for low cost 433MHz ISM band wireless applications using AMICCOM A7108 FSK transceiver. This module features a fully programmable frequency synthesizer by SPI. The maximum data rate is 250kbps. Maximum output power is -15dBm. A7108 is a monolithic low-IF architecture CMOS FSK/GFSK TRX for wireless applications in the 433MHz ISM bands. In addition, this device is especially suitable for the 470MHz wireless AMR (Auto Meter Reading) in China. A7108 is one of AMICCOM’s high performance Sub 1GHz family chips. This device offers a low cost solution with advanced radio features such as high output power amplifier up to -15 dBm (433MHz band, excluding LPF and HPF) and low phase noise receiver (- 114 dBm @ 10Kbps, -110dBm @50Kbps). Therefore, A7108 is very suitable for long LOS (line-of-sight) applications without the need to add an external LNA or PA. The on-chip data rate divider supports programmable on-air data rates from 2K to 250Kbps to satisfy different system requirements. For a battery powered system, A7108 supports fast PLL settling time (35 us), XTAL settling time (500 us) and on-chip Regulator settling time (450 us) to reduce average power consumption. For packet handling, A7108 supports direct mode as well as FIFO mode. In the RX direct mode, GIO1 or GIO2 can be serially output the raw data from the digital demodulator. In the TX direct mode, MCU can serially feed the digital data to GIO1 or GIO2 which is connected to the modulator. In the other hand, a packet in FIFO mode, the preamble is self-generated and the physical packet ID is programmable up to 8 bytes. The built-in separated 64-bytes TX/RX FIFO is treated as payload for data buffering including CRC of error detection, FEC of error correction, data whitening for data encryption / decryption, and Manchester encoding. Additional device features such as on-chip regulator, low battery detect, carrier detect, preamble detect, frame sync in FIFO mode, AGC (Auto Gain Control), AFC (Auto Frequency compensation), Auto calibration (VCO and IF Filter), programmable IF Filter, multi Xtal sources, on-chip Xtal compensated capacitors, and RSSI for the clear channel assistance are used to simplify system development and cost. Overall, A7108 is a high performance and a highly integrated ISM bands TRX with low BOM cost. 1.Features: •Small size (19*18mm, 10 pins). • Frequency band: 433MHz. • FSK and GFSK modulation. • Supports 3-wire or 4-wire SPI. • Deep sleep current (0.2uA). • Low sleep current (2 uA). •TX Current consumption 433MHz: 30mA @ 10dBm, 70mA @ 17dBm. • On chip regulator, supports input voltage 3.3V .
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 3 • Programmable data rate from 2Kbps to 250Kbps. • Physical 64 bytes TX/RX FIFO buffers. • FIFO extension up to 256 bytes. • High RX sensitivity 433.92MHz. • -117dBm at 2Kbps on-air data rate. • -114dBm at 10Kbps on-air data rate. • -110dBm at 50Kbps on-air data rate. • -107dBm at 100Kbps on-air data rate. • -106dBm at 150Kbps on-air data rate. • -103dBm at 250Kbps on-air data rate. Typical Applications • Wireless ISM band data communication • Remote Control • RKE (Remote Keyless Entry) • Wireless Energy Management • Home Automation • AMR (Auto Meter Reading)
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 4 2.Pin Configurations Interface: Pin No. Symbol Function Description 1 VCC 3.3V power supply 2 GND Ground 3 CK0 Multi-function clock output 4 GIO2 Multi-function IO 2/SPI data output 5 GIO1 Multi-function IO 1/SPI data output 6 SDIO SPI Data I/O 7 SCK SPI Clock 8 SCS SPI Chip Selection 9 GND Ground 10 5V 5V power supply
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 5 3.Specification (Ta=25℃, VDD=3.3V, FXTAL =12.8MHz, FSK modulation with Matching circuit and low/high pass filter, On Chip Regulator = 1.8V, RFO is powered by VDD = 3.3V, unless otherwise noted.) Parameter Description Min. Typ. Max. Unit General Operating Temperature -40 85 °C Supply Voltage 3.0 3.3 3.6 V Current Consumption Deep Sleep Mode 0.2 uA Sleep Mode 2 uA Idle Mode(Xtal off) 0.25 mA Standby Mode(Xtal on) 1.5 mA Current Consumption 433MHz band PLL mode 8.5 mA RX mode (AGC Off) 13.5 mA RX mode (AGC On) 14.5 mA TX -15dBm (TBG=0, TDC=0, PAC=0) 16 mA mA mA mA mA mA mA mA mA
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 6 4.Control Register A7108 chip contains 28 x 16-bit control registers, and can read or write data via 3-wire or 4-wire SPI interface（SCS, SCK, SDIO, GIOx）. All control registers are listed below. Control Register Table
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 7 Control Register Description System clock (Address: 00h) SDR[6:0]: Data Rate Divider. GRS: Reference Clock Selection for the internal PLL CLK Generator. [0]: PLL CLK Gen. = FCGRF x 48, where FCGRF is from below GRC divider [1]: PLL CLK Gen. = FCGRF x 32 GRC[4:0]: Generation Reference Clock Divider. GRC [4:0] is the clock divider to generate a PFD clock for the internal CLK Generator. CSC[2:0]: System Clock Divider setting. CSC is the clock divider of FMSCK to generate the wanted data clock and IF calibration clock where FMSCK is either from Xtal itself (CGS = 0) or from the internal CLK Generator (CGS = 1). FCSCK shall be set appropriately, otherwise, IF Filter calibration will be failure. Please refer to chapter 12 for details. PLL I (Address: 01h) RXCC: Reserved for internal usage. Shall be [0]. RXCP[1:0]: Reserved for internal usage. Shall be [00]. MDIV: RF Divider Range setting.
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 8 [0]: Range of IP[7:0] is 32~67. [1]: Range of IP[7:0] is 68 ~ 255. RRC[3:0]: RF PLL Reference Counter. RRC [3:0] is the clock divider to generate a PFD clock for RF_PLL to lock the wanted LO frequency. IP[7:0]: LO frequency Integer Part setting. Pease refer to Chapter 13 for detail. PLL II (Address: 02h) FP[15:0]: LO Frequency Fractional Part setting. where RF f is the wanted RF frequency and n is the VCO divider. where ( [3: 0] 1) PFD f = f ¸ RRC + Xtal , is the comparison frequency of RF_PLL. Where n = 4 by setting MD = [10] for 433M band Note1: MD[1:0] is located at address 04h [Bit12, Bit8]. Note2: please refer to Chapter 13 for details. PLL III (Address: 03h) AFC: Auto Frequency Compensation selection. Recommend AFC = [1]. [0]: manual [1]: auto MC[14:0]: PLL Fractional Part Compensation value. [Write]：Manual setting to LO fractional part compensation value when AFC = [0].
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 9 [Read]：Frequency offset value when AFC = [1]. PLL IV (Address: 04h) ROSCS: RC Oscillator for WOR (Wake-On-RX) function. [0]: single mode [1]: differential mode RSIS: Reserved. RSIS shall be [0]. CKX2: Reserved. CKX2 shall be [0]. MD[1:0]: RF Band select, [Bit12, Bit8]. . [10]: RF in 433MHz Note: MD[1:0] is used for the wanted RF formula (02h) and the wanted Fdev (06h, page0). PDL[2:0]: PLL Settling Delay Time setting. VCS[1:0]: VCO Current setting. Recommend VCS = [01]. CPS: Charge Pump tri-state setting. Recommend CPS = [1]. [0]: Tri-state.[1]: Normal operation. CPC[1:0]: Charge Pump Current setting. Recommend CPC = [01]. [00]: 0.5mA. [01]: 1mA. [10]: 1.5mA. [11]: 2mA. SDPW: Pulse Width of sigma-delta modulator. SDPW shall be [1]. NSDO: Mash sigma delta order setting. Recommend NSDO = [0]. [0]: order 2. [1]: order 3. EDI: Dither Noise setting. Recommend EDI = [0]. [0]: Disable. [1]: Enable.
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 10 Crystal (Address: 05h) PGAS[3:0]: Page selector for the 06h register. CRCDNP: CRC Mode. Shall be [0] [0]: CRC-CCITT (X16+ X12+ X5+ 1). [1]: Reserved. CRCINV: CRC Inverted Select. [0]: disable. [1]: enable RTOE: Reserved. Shall be set to [0]. RTCI: Reserved. Shall be set to [0]. RTC[1:0]: Reserved. Shall be set to [00]. RTCE: Reserved. Shall be set to [0]. XCC: Crystal Current setting. Recommend XCC = [0]. [0]: Low current. [1]: High current. XCP[1:0]: Crystal Regulating Couple setting. Recommend XCP = [00]. CGS: Clock Generation Selection. [0]: disable, main clk, FMSCK , is from Xtal itself. [1]: enable, main clk, FMSCK, is from the internal CLK Generator. Please refer to chapter 12 for details. XS: Crystal Oscillator Selection. Recommend XS = [1]. [0]: disable, use external clock source from XI pin. [1]: enable, use Xtal from XI and XO pin. Pin Control (Address: 0Dh) RFT [2:0]: RF Analog Pin Configuration. Recommend RFT= [000].
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 11 PRS: Read frequency mode when AFC=1. Recommend PRS= [0]. [0]: no frequency compensation. [1]: frequency offset in AFC mode SCMDS: Strobe Command select. Recommend SCMDS= [1]. [0]: register control. [1]: strobe control. PCS1: PWR Setting. Shall be [1]. [0]: Reserved. [1]: PWR is controlled by register or strobe command. PCS: TRE and TRS pin control. Shall be [0]. [0]: TRE and TRS are controlled by register or strobe command. [1]: Reserved. IRQI: IRQ Pin Output invert. Shall be [0]. IRQ[1:0]: Reserved. Use GIOP instead. Shall be [00]. IRQE: Reserved. Use GIOP instead. Shall be [0]. CKOI: CKO pin output invert. Use 06h page 9 instead. Shall be [0]. CKO[1:0]: CKO Pin Output select. Use 06h page 9 CKOS instead. Shall be [00]. CKOE: CKO Pin Output enable. Use 06h page 9 instead. Shall be [0]. SCKI: 3-wire SPI - Clock Inverted. Recommend SCKI= [0]. [0]: Normal. [1]: Inverted Calibration (Address: 0Eh) MSCRC: CRC Filtering Enable. Recommend MSCRC = [1]. [0]: Disable.
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 12 [1]: Enable. For FIFO mode only, if MSCRC = 1, A7108 will ignore the coming packet once CRC error occurs. That means, this device will not exit RX mode but keep WTR signal high. Therefore, MCU will not be disturbed by this unsuccessful packet. VTL[2:0]: VT low threshold setting for VCO calibration. Recommend VTL = [100]. [000]: VTL=0.1V. [001]: VTL=0.2V. [010]: VTL=0.3V. [011]: VTL=0.4V. [100]: VTL=0.5V. [101]: VTL=0.6V. [110]: VTL=0.7V. [111]: VTL=0.8V. VTH[2:0]: VT high threshold setting for VCO calibration. Recommend VTH = [100]. [000]: VTH=Vdd-0.1V. [001]: VTH=Vdd-0.2V. [010]: VTH=Vdd-0.3V. [011]: VTH=Vdd-0.4V. [100]: VTH=Vdd-0.5V. [101]: VTH=Vdd-0.6V. [110]: VTH=Vdd-0.7V. [111]: VTH=Vdd-0.8V. MVBS: VCO band calibration select. Recommend MVBS = [0]. [0]: Auto. [1]: Manua MVB[2:0]: VCO bank manual setting. VCO frequency increases when MVB decreases. Recommend MVB = [000]. MIFS: IF Filter Calibration Select. Recommend MIFS = [0]. [0]: Auto. [1]: Manual. MIF[3:0]: IF filter Manual Setting. Recommend MIF = [0000]. FCD [4:0]: IF Filter Auto Calibration Deviation from Goal (read only). DVT[1:0]: VT output (Read Only). [00]: VT< VTL< VTH. [01]: VTL< VT< VTH. [10]: No used. [11]: VTL< VTH< VT. VBCF: VCO Band Auto Calibration Flag (Read Only). [0]: Pass. [1]: Fail. VB[2:0]: VCO Bank Auto Calibration Result (Read Only). FBCF: IF Filter Auto Calibration Flag (Read Only). [0]: Pass. [1]: Fail. FB[3:0]: IF Filter Auto Calibration Result (Read Only). Mode control (Address: 0Fh) DFCD: Data Filter by CD. The received packet is filtered if the input power level is below RTH (0Ah). [0]: Disable. [1]: Enable. VBS: VCO Band adjustment for 433MHz. [1]: For 433MHz band
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 13 SWT: Reserved. Recommend SWT = [0]. RSSC: RSSI Calibration. [0]: Disable. [1]: Enable. VCC: VCO Current Calibration. [0]: Disable. [1]: Enable. WORE: WOR or TWOR Enable. [0]: Disable. [1]: Enable. FMT: Reserved for internal usage only. Shall be set to [0]. FMS: Direct/FIFO mode select. [0]: Direct mode. [1]: FIFO mode. CER: Chip enable by register. [0]: chip turn-off. [1]: chip turn-on. PLLE: PLL enable by register. [0]: PLL off. [1]: PLL on. TRSR: TRX Mode select by register. [0]: RX mode. [1]: TX mode. When bit TRER=1, the chip will enter TX or RX mode by TRSR register. TRER: TRX mode enable by register. [0]: Reserved. [1]: By register control (CER and TRSR). In FIFO mode, this bit will be cleared after end of packet encountered. VBC: VCO Bank Calibration enable (Auto clear when done). [0]: Disable. [1]: Enable. FBC: IF Filter Bank Calibration enable (Auto clear when done). [0]: Disable . [1]: Enable. ADCM: ADC measurement (Auto clear when done). [0]: Disable. [1]: Enable. FECF: FEC flag. (FECF is read clear.) [0]: FEC pass. [1]: FEC error. CRCF: CRC flag. (CRCF is read clear.) [0]: CRC pass. [1]: CRC error.
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 14 5.SPI Format: The A7108 communicates with a host MCU via 3-wire SPI interface (SCS, SCK, SDIO) or 4-wire SPI (SDO from GIO1 or GIO2) with a max data rate 10Mbps. A SPI transition is a 24-bits sequence which consists of an 8-bits address and a 16-bits data word. The MCU should set SCS (SPI chip select) pin low in order to access A7108. Via the SPI interface, user can access the control registers and issue Strobe commands. The SPI data will be latched into the registers at the rising edge of SCK. When reading registers from the RF chip, after input the wanted register address, the bit data will be transferred from the falling edge of SCK. SPI Format Address Byte (8 bits): Bit A7: R/W bit [0]: Write. [1]: Read. Bit A6~A4: Command [00x]: read/write control register. [01x]: read/write ID code. [10x]: read/write FIFO register. [110]: reset TX/RX FIFO pointer. [111]: RF chip Reset (soft reset and all registers will be clean to initial value). Bit A3~A0: Address of control register
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 15 Strobe Command table: Data Words (16-bits) : On-chip registers in sequence of D15~D0.
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 16 6.State machine: A7108 has seven major operation modes from current consumption point of view as shown in Table 14.1. From accessing data point of view, if FMS=1 (0Fh), FIFO mode is enabled, otherwise, A7108 is in direct mode. Key Strobe Commands A7108 has below 7 operation modes in current consumption point of view. Those are, (1) Deep Sleep mode (2) Sleep mode (3) Idle mode (4) Standby mode (5) PLL mode (6) TX mode (7) RX mode After power on reset or software reset or deep sleep mode, user has to do calibration process because all control registers are in initial values. The calibration process of A7108 is very easy, user only needs to issue Strobe commands and enable calibration registers. If so, the calibrations are automatically completed by A7108’s internal state machine. Next Table shows a summary of key circuitry among those strobe commands. FIFO mode This mode is suitable for the requirements of general purpose applications and can be chosen by setting FMS = 1. After calibration, user can issue Strobe command to enter standby mode where write TX FIFO or read RX FIFO. From standby mode to packet data transmission, only one Strobe command is needed. Once transmission is done, A7108 is auto back to standby mode. Figure 14.1 and Figure 14.2 are TX and RX timing diagram respectively. Figure 14.3 illustrates state diagram of FIFO mode.
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 17 TX timing of FIFO Mode RX timing of FIFO Mode Direct mode This mode is suitable to let MCU to drive customized packet to A7108 directly by setting FMS = 0. In TX mode, MCU shall send customized packet in bit sequence (simply called raw TXD) to GIO1 or GIO2 pin. In RX mode, the receiving raw bit streams (simply called RXD) can be configured output to GIO1 or GIO2 pin. Be aware that a customized packet shall be preceded by a 32 bits preamble to let A7108 get a suitable DC estimation voltage. After calibration flow, for every state transition, user has to issue Strobe command to A7108 for fully control. This mode is also suitable for the requirement of versatile packet format. Figure 14.4 and Figure 14.5 are TX and RX timing diagram in direct mode respectively. Figure 14.3 illustrates state diagram of direct mode.
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 18 TX timing of Direct Mode RX timing of Direct Mode
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 19 7.Calibration: A7108 needs calibration process during initialization with 2 calibration items, they are IF CAL (IF Filter calibration) and VCO band CAL (VCO band calibration). 1. VCO Bank Calibration is to select best VCO frequency bank for the calibrated frequency. 2. IF Filter Bank Calibration is to calibrate IF filter bandwidth and center frequency. Please notice that VCO Current, Bank and Deviation should be calibrated in PLL mode by sequence. IF Filter Bank and RSSI could be calibrated in either standby or PLL mode. IF Calibration Process Under the Stand by state (XOSC is on), set bit MIFS=0(auto calibration) or bit MIFS=1(Manual calibration) to execute the IF calibration. When the mode control register bit FBC=1, the chip will enter CAL state, and starts the calibration process. If RF chip is not in the STB state when bit FBC is set to 1, RF chip will not start the calibration process until it enters the STB state. Once the calibration is completed, bit FBC will be cleared to 0 automatically, and RF chip will leave from CAL state and back to STB state. If the mode control register bit TRER=1, FBC=1 or VBC=1are set simultaneously, RF chip will enter the CAL state first, and after completion of IF filter calibration or VCO band calibration process, RF chip can then enter into TX/RX state. The maximum time required for A7108 RF chip to perform IF Calibration process is about 16 * 256 * (1 / system clock). VCO band Calibration Process Before the VCO band calibration, user should first set operating frequency in PLL I and PLL II registers, meanwhile, the range of VT (VTH[2:0], VTL[2:0]) and VCO also needs to be set properly. Under the Stand by state (XOSC is on), set bit MVBS=0(auto calibration) or bit MVBS=1(manual calibration) to execute the VCO band calibration. After setting the mode control register bit VBC=1, the chip will enter CAL state, and starts the calibration process. If RF chip is not in the STB state when bit VBC is set to 1, RF chip will not start the calibration process until it entering STB state. When the calibration is completed, bit VBC will be cleared to 0 automatically, and chip will leave from CAL state and back to STB state. If the mode control register bit TRER=1, FBC=1 or VBC=1are set simultaneously, RF chip will enter the CAL state first, and after completion of IF filter calibration or VCO band calibration process, RF chip can then enter into TX/RX state. The maximum time required for A7108 RF chip to perform IF Calibration process is about 16 * 256 * (1 / system clock). The maximum time required for A7108 RF chip to perform VCO band Calibration process is about 4 * PLL settling time.
PCT-A7108-20D RF module Reference Manual September., 2013, Version 0.7 Professional Computer Technology Limited. 20 8.Reflow Profile: 9.Note:

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