Telit Communications S p A GE863L Quad-Band GSM/GPRS module - Type: GE863 User Manual Telit GE863 QUAD PY Hardware User Guide

Telit Communications S.p.A. Quad-Band GSM/GPRS module - Type: GE863 Telit GE863 QUAD PY Hardware User Guide

Users Manual

Telit GE863-QUAD / GE863-PY
Hardware User guide
1vv0300715, Rev. ISSUE#0, - 21/02/06
Reproduction forbidden without Telit Communication written authorization – All Right reserved – Right of modification reserved page 1 of 71
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© Telit Communications S.p.A. 2004 - 2005
Telit GE863-QUAD / GE863-PY
Hardware User guide
1vv0300715, Rev. ISSUE#0, - 21/02/06
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Contents
1 OVERVIEW 5
2 HARDWARE COMMANDS 6
2.1 Turning ON the GE863-QUAD/PY 6
2.2 Turning OFF the GE863-QUAD/PY 8
2.2.1 Hardware shutdown 8
2.3 Hardware Unconditional Reboot 8
3 POWER SUPPLY 10
3.1 Power Supply Requirements 10
3.2 General Design Rules 11
3.2.1 Electrical design Guidelines 11
3.2.1.1 + 5V input Source Power Supply Design Guidelines 11
3.2.1.2 + 12V input Source Power Supply Design Guidelines 13
3.2.1.3 Battery Source Power Supply Design Guidelines 14
3.2.1.4 Battery Charge control Circuitry Design Guidelines 14
3.2.2 Thermal Design Guidelines 16
3.2.3 Power Supply PCB layout Guidelines 17
4 ANTENNA 18
4.1 GSM Antenna Requirements 18
4.2 GSM Antenna - PCB line Guidelines 19
4.3 GSM Antenna - installation Guidelines 20
5 SERIAL PORTS 20
5.1 MODEM SERIAL PORT 20
5.2 MODEM SERIAL PORT 2 (DEBUG) 22
5.3 RS232 level translation 23
5.4 5V UART level translation 25
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6 MICROPHONE 27
6.1 Microphone line Characteristic and requirements 27
6.2 General Design Rules 30
6.3 Microphone Biasing 30
6.3.1 Balanced Microphone biasing 31
6.3.2 Unbalanced Microphone biasing 33
6.4 Microphone buffering 34
6.4.1 Buffered Balanced Mic. 34
6.4.2 Buffered Unbalanced (Single Ended) Mic. 37
7 SPEAKER 40
7.1 Speaker lines characteristics and requirements 40
7.2 General Design rules 42
7.2.1 Noise Filtering 43
7.3 Handset earphone design 43
7.4 Hands Free earphone (low power) design 45
7.5 Car Kit speakerphone design 45
8 GENERAL PURPOSE I/O 47
8.1 Using a GPIO pad as INPUT 47
8.2 Using a GPIO pad as OUTPUT 47
8.3 Using the Alarm Output GPIO6 48
8.4 Using the Buzzer Output GPIO7 48
9 CAMERA 49
9.1 Transchip Camera 49
9.1.1 Camera interface connectors 49
9.1.2 EVB for Transchip camera support 52
9.1.3 Block Diagram for supported cameras 53
9.1.4 Schematic Diagrams for supported cameras 54
9.1.5 Example usage script for camera 55
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10 CONFORMITY ASSESSMENT ISSUES 57
11 SAFETY RECOMMANDATIONS 59
DOCUMENT CHANGE LOG 61
12 EVK 2 SCHEMATICS 62
13 EVB CAMERA SCHEMATICS 68
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Hardware User guide
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1 Overview
The aim of this document is the description of some hardware solutions useful for developing a
product with the Telit GE863-QUAD/PY module.
In this document all the basic functions of a mobile phone will be taken into account; for each
one of them a proper hardware solution will be suggested and eventually the wrong solutions and
common errors to be avoided will be evidenced. Obviously this document cannot embrace the
whole hardware solutions and products that may be designed. The wrong solutions to be avoided
shall be considered as mandatory, while the suggested hardware configurations shall not be
considered mandatory, instead the information given shall be used as a guide and a starting point
for properly developing your product with the Telit GE863-QUAD/PY module. For further
hardware details that may not be explained in this document refer to the Telit GE863-QUAD/PY
Product Description document where all the hardware information is reported.
NOTICE
The information presented in this document is believed to be accurate and reliable. However, no responsibility is
assumed by Telit Communication S.p.A. for its use, nor any infringement of patents or other rights of third parties
which may result from its use. No license is granted by implication or otherwise under any patent rights of Telit
Communication S.p.A. other than for circuitry embodied in Telit products. This document is subject to change
without notice.
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Hardware User guide
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2 Hardware Commands
2.1 Turning ON the GE863-QUAD/PY
To turn on the GE863-QUAD/PY the pad ON# must be tied low for at least 1 second and then
released.
The maximum current that can be drained from the ON# pad is 0,1 mA.
A simple circuit to do it is:
NOTE: don't use any pull up resistor on the ON# line, it is internally pulled up. Using pull up resistor
may bring to latch up problems on the GE863-QUAD/PY power regulator and improper power on/off
of the module. The line ON# must be connected only in open collector configuration.
NOTE: In this document all the lines that are inverted, hence have active low signals are labeled
with a name that ends with a "#" or with a bar over the name.
NOTE: The GE863-QUAD/PY turns fully on also by supplying power to the Charge pad (provided
there's a battery on the VBATT pads).
ON#
Power ON impulse
GND
R1
R2
Q1
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For example:
1- Let's assume you need to drive the ON# pad with a totem pole output of a +3/5 V
microcontroller (uP_OUT1):
2- Let's assume you need to drive the ON# pad directly with an ON/OFF button:
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2.2 Turning OFF the GE863-QUAD/PY
The turning off of the device can be done in two ways:
by software command (see GE863-QUAD/PY Software User Guide)
by hardware shutdown
When the device is shut down by software command or by hardware shutdown, it issues to the
network a detach request that informs the network that the device will not be reachable any
more.
2.2.1 Hardware shutdown
To turn OFF the GE863-QUAD/PY the pad ON# must be tied low for at least 1 second and then
released.
The same circuitry and timing for the power on shall be used.
The device shuts down after the release of the ON# pad.
TIP: To check if the device has powered off, the hardware line PWRCTL should be monitored. When
PWRCTL goes low, the device has powered off.
2.3 Hardware Unconditional Reboot
To unconditionally Reboot the GE863-QUAD/PY, the pad RESET# must be tied low for at least
200 milliseconds and then released.
The maximum current that can be drained from the ON# pad is 0,15 mA.
A simple circuit to do it is:
RESET#
Unconditional Reboot
impulse
GND
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NOTE: don't use any pull up resistor on the RESET# line nor any totem pole digital output. Using
pull up resistor may bring to latch up problems on the GE863-QUAD/PY power regulator and
improper functioning of the module. The line RESET# must be connected only in open collector
configuration.
TIP: The unconditional hardware reboot should be always implemented on the boards and software
should use it as an emergency exit procedure.
For example:
1- Let's assume you need to drive the RESET# pad with a totem pole output of a +3/5 V
microcontroller (uP_OUT2):
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3 Power Supply
The power supply circuitry and board layout are a very important part in the full product design
and they strongly reflect on the product overall performances, hence read carefully the
requirements and the guidelines that will follow for a proper design.
3.1 Power Supply Requirements
The GE863-QUAD/PY power requirements are:
Nominal Supply Voltage: 3.8 V
Max Supply Voltage: 4.2 V
Supply voltage range: 3.4 V - 4.2 V
Max Peak current consumption (impulsive): 1.9 A
Max Average current consumption during GPRS transmission (rms): 500 mA
Max Average current consumption during VOICE/CSD transmission (rms): 270 mA
Average current during Power Saving: 4 mA
Average current during idle (Power Saving disabled) 19 mA
The GSM system is made in a way that the RF transmission is not continuous, else it is packed
into bursts at a base frequency of about 216 Hz, the relative current peaks can be as high as about
2A. Therefore the power supply has to be designed in order to withstand with these current peaks
without big voltage drops; this means that both the electrical design and the board layout must be
designed for this current flow.
If the layout of the PCB is not well designed a strong noise floor is generated on the ground and
the supply; this will reflect on all the audio paths producing an audible annoying noise at 216 Hz;
if the voltage drop during the peak current absorption is too much, then the device may even
shutdown as a consequence of the supply voltage drop.
TIP: The electrical design for the Power supply should be made ensuring it will be capable of a peak
current output of at least 2 A.
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3.2 General Design Rules
The principal guidelines for the Power Supply Design embrace three different design steps:
- the electrical design
- the thermal design.
- the PCB layout.
3.2.1 Electrical design Guidelines
The electrical design of the power supply depends strongly from the power source where this
power is drained. We will distinguish them into three categories:
+5V input (typically PC internal regulator output)
+12V input (typically automotive)
Battery
3.2.1.1 + 5V input Source Power Supply Design Guidelines
The desired output for the power supply is 3.8V, hence there's not a big difference between
the input source and the desired output and a linear regulator can be used. A switching power
supply will not be suited because of the low drop out requirements.
When using a linear regulator, a proper heat sink shall be provided in order to dissipate the
power generated.
A Bypass low ESR capacitor of adequate capacity must be provided in order to cut the
current absorption peaks close to the GE863-QUAD/PY, a 100μF tantalum capacitor is
usually suited.
Make sure the low ESR capacitor on the power supply output (usually a tantalum one) is
rated at least 10V.
A protection diode should be inserted close to the power input, in order to save the GE863-
QUAD/PY from power polarity inversion.
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An example of linear regulator with 5V input is:
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3.2.1.2 + 12V input Source Power Supply Design Guidelines
The desired output for the power supply is 3.8V, hence due to the big difference between the
input source and the desired output, a linear regulator is not suited and shall not be used. A
switching power supply will be preferable because of its better efficiency especially with the
2A peak current load represented by the GE863-QUAD/PY.
When using a switching regulator, a 500kHz or more switching frequency regulator is
preferable because of its smaller inductor size and its faster transient response. This allows
the regulator to respond quickly to the current peaks absorption.
For car PB battery the input voltage can rise up to 15,8V and this should be kept in mind
when choosing components: all components in the power supply must withstand this voltage.
A Bypass low ESR capacitor of adequate capacity must be provided in order to cut the
current absorption peaks, a 100μF tantalum capacitor is usually suited.
Make sure the low ESR capacitor on the power supply output (usually a tantalum one) is
rated at least 10V.
For Car applications a spike protection diode should be inserted close to the power input, in
order to clean the supply from spikes.
A protection diode should be inserted close to the power input, in order to save the GE863-
QUAD/PY from power polarity inversion. This can be the same diode as for spike
protection.
An example of switching regulator with 12V input is:
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3.2.1.3 Battery Source Power Supply Design Guidelines
The desired nominal output for the power supply is 3.8V and the maximum voltage allowed
is 4.2V, hence a single 3.7V Li-Ion cell battery type is suited for supplying the power to the
Telit GE863-QUAD/PY module.
The three cells Ni/Cd or Ni/MH 3,6 V Nom. battery types or 4V PB types MUST NOT BE
USED DIRECTLY since their maximum voltage can rise over the absolute maximum
voltage for the GE863-QUAD/PY and damage it.
NOTE: DON'T USE any Ni-Cd, Ni-MH, and Pb battery types directly connected with GE863-QUAD/PY.
Their use can lead to overvoltage on the GE863-QUAD/PY and damage it. USE ONLY Li-Ion battery
types.
A Bypass low ESR capacitor of adequate capacity must be provided in order to cut the
current absorption peaks, a 100μF tantalum capacitor is usually suited.
Make sure the low ESR capacitor (usually a tantalum one) is rated at least 10V.
A protection diode should be inserted close to the power input, in order to save the GE863-
QUAD/PY from power polarity inversion. Otherwise the battery connector should be done in
a way to avoid polarity inversions when connecting the battery.
The battery capacity must be at least 500mAh in order to withstand the current peaks of 2A;
the suggested capacity is from 500mAh to 1000mAh.
3.2.1.4 Battery Charge control Circuitry Design Guidelines
The charging process for Li-Ion Batteries can be divided into 4 phases:
Qualification and trickle charging
Fast charge 1 - constant current
Final charge - constant voltage or pulsed charging
Maintenance charge
The qualification process consists in a battery voltage measure, indicating roughly its charge
status. If the battery is deeply discharged, that means its voltage is lower than the trickle
charging threshold, then the charge must start slowly possibly with a current limited pre-
charging process where the current is kept very low with respect to the fast charge value: the
trickle charging.
During the trickle charging the voltage across the battery terminals rises; when it reaches the fast
charge threshold level the charging process goes into fast charge phase.
During the fast charge phase the process proceeds with a current limited charging; this current
limit depends on the required time for the complete charge and from the battery pack capacity.
During this phase the voltage across the battery terminals still raises but at a lower rate.
Once the battery voltage reaches its maximum voltage then the process goes into its third state:
Final charging. The voltage measure to change the process status into final charge is very
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important. It must be ensured that the maximum battery voltage is never exceeded, otherwise the
battery may be damaged and even explode. Moreover for the constant voltage final chargers, the
constant voltage phase (final charge) must not start before the battery voltage has reached its
maximum value, otherwise the battery capacity will be highly reduced.
The final charge can be of two different types: constant voltage or pulsed. GE863-QUAD/PY
uses constant voltage.
The constant voltage charge proceeds with a fixed voltage regulator (very accurately set to the
maximum battery voltage) and hence the current will decrease while the battery is becoming
charged. When the charging current falls below a certain fraction of the fast charge current value,
then the battery is considered fully charged, the final charge stops and eventually starts the
maintenance.
The pulsed charge process has no voltage regulation, instead the charge continues with pulses.
Usually the pulse charge works in the following manner: the charge is stopped for some time,
let's say few hundreds of ms, then the battery voltage will be measured and when it drops below
its maximum value a fixed time length charging pulse is issued. As the battery approaches its full
charge the off time will become longer, hence the duty-cycle of the pulses will decrease. The
battery is considered fully charged when the pulse duty-cycle is less than a threshold value,
typically 10%, the pulse charge stops and eventually the maintenance starts.
The last phase is not properly a charging phase, since the battery at this point is fully charged and
the process may stop after the final charge. The maintenance charge provides an additional
charging process to compensate for the charge leak typical of a Li-Ion battery. It is done by
issuing pulses with a fixed time length, again few hundreds of ms, and a duty-cycle around 5%
or less.
This last phase is not implemented in the GE863-QUAD/PY internal charging algorithm, so that
the battery once charged is left discharging down to a certain threshold so that it is cycled from
full charge to slight discharge even if the battery charger is always inserted. This guarantees that
anyway the remaining charge in the battery is a good percentage and that the battery is not
damaged by keeping it always fully charged (Li-Ion rechargeable battery usually deteriorate
when kept fully charged).
Last but not least, in some applications it is highly desired that the charging process restarts
when the battery is discharged and its voltage drops below a certain threshold, GE863-
QUAD/PY internal charger does it.
As you can see, the charging process is not a trivial task to be done; moreover all these
operations should start only if battery temperature is inside a charging range, usually 5°C - 45°C.
The GE863-QUAD/PY measures the temperature of its internal component, in order to satisfy
this last requirement, it's not exactly the same as the battery temperature but in common
application the two temperature should not differ too much and the charging temperature range
should be guaranteed.
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NOTE: For all the threshold voltages, inside the GE863-QUAD/PY all threshold are fixed in order to
maximize Li-Ion battery performances and do not need to be changed.
NOTE: In this application the battery charger input current must be limited to less than 400mA. This
can be done by using a current limited wall adapter as the power source.
3.2.2 Thermal Design Guidelines
The thermal design for the power supply heat sink should be done with the following
specifications:
Average current consumption during transmission @PWR level max (rms): 500mA
Average current consumption during transmission @ PWR level min (rms): 100mA
Average current during Power Saving: 4mA
Average current during idle (Power Saving disabled) 19mA
Average GPS current during Power Saving: 1mA
Average GPS current during Tracking (Power Saving disabled) 60mA
NOTE: The average consumption during transmissions depends on the power level at which the
device is requested to transmit by the network. The average current consumption hence varies
significantly.
TIP: The thermal design for the Power supply should be made keeping an average consumption at
the max transmitting level during calls of 500mA rms plus 60mA rms for GPS in tracking mode.
Considering the very low current during idle, especially if Power Saving function is enabled, it is
possible to consider from the thermal point of view that the device absorbs current significantly
only during calls.
If we assume that the device stays into transmission for short periods of time (let's say few
minutes) and then remains for a quite long time in idle (let's say one hour), then the power supply
has always the time to cool down between the calls and the heat sink could be smaller than the
calculated one for 500mA maximum RMS current, or even could be the simple chip package (no
heat sink).
Moreover in the average network conditions the device is requested to transmit at a lower power
level than the maximum and hence the current consumption will be less than the 500mA, being
usually around 150mA.
For these reasons the thermal design is rarely a concern and the simple ground plane where the
power supply chip is placed can be enough to ensure a good thermal condition and avoid
overheating.
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For the heat generated by the GE863-QUAD/PY, you can consider it to be during transmission
1W max during CSD/VOICE calls and 2W max during class10 GPRS upload.
This generated heat will be mostly conducted to the ground plane under the GE863-QUAD/PY,
you must ensure that your application can dissipate it.
3.2.3 Power Supply PCB layout Guidelines
As seen on the electrical design guidelines the power supply shall have a low ESR capacitor on
the output to cut the current peaks and a protection diode on the input to protect the supply from
spikes and polarity inversion. The placement of these components is crucial for the correct
working of the circuitry. A misplaced component can be useless or can even decrease the power
supply performances.
The Bypass low ESR capacitor must be placed close to the Telit GE863-QUAD/PY power
input pads or in the case the power supply is a switching type it can be placed close to the
inductor to cut the ripple provided the PCB trace from the capacitor to the GE863-QUAD/PY
is wide enough to ensure a dropless connection even during the 2A current peaks.
The protection diode must be placed close to the input connector where the power source is
drained.
The PCB traces from the input connector to the power regulator IC must be wide enough to
ensure no voltage drops occur when the 2A current peaks are absorbed. Note that this is not
made in order to save power loss but especially to avoid the voltage drops on the power line
at the current peaks frequency of 216 Hz that will reflect on all the components connected to
that supply, introducing the noise floor at the burst base frequency. For this reason while a
voltage drop of 300-400 mV may be acceptable from the power loss point of view, the same
voltage drop may not be acceptable from the noise point of view. If your application doesn't
have audio interface but only uses the data feature of the Telit GE863-QUAD/PY, then this
noise is not so disturbing and power supply layout design can be more forgiving.
The PCB traces to the GE863-QUAD/PY and the Bypass capacitor must be wide enough to
ensure no significant voltage drops occur when the 2A current peaks are absorbed. This is for
the same reason as previous point. Try to keep this trace as short as possible.
The PCB traces connecting the Switching output to the inductor and the switching diode
must be kept as short as possible by placing the inductor and the diode very close to the
power switching IC (only for switching power supply). This is done in order to reduce the
radiated field (noise) at the switching frequency (100-500 kHz usually).
The use of a good common ground plane is suggested.
The placement of the power supply on the board should be done in such a way to guarantee
that the high current return paths in the ground plane are not overlapped to any noise
sensitive circuitry as the microphone amplifier/buffer or earphone amplifier.
The power supply input cables should be kept separate from noise sensitive lines such as
microphone/earphone cables.
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4 Antenna
The antenna connection and board layout design are the most important part in the full product
design and they strongly reflect on the product overall performances, hence read carefully and
follow the requirements and the guidelines for a proper design.
4.1 GSM Antenna Requirements
As suggested on the Product Description the antenna and antenna line on PCB for a Telit
GE863-QUAD/PY device shall fulfil the following requirements:
ANTENNA REQUIREMENTS
Frequency range Standard Dual Band GSM/DCS frequency
range or
Standard Quad Band GSM/DCS/PCS
frequency range if used for all four bands
Bandwidth 80 MHz in GSM & 170 MHz in DCS & 140
MHz PCS band
Gain Gain < 3dBi
Impedance 50 ohm
Input power > 2 W peak power
VSWR absolute
max
<= 10:1
VSWR
recommended
<= 2:1
When using the Telit GE863-QUAD/PY, since there's no antenna connector on the module, the
antenna must be connected to the GE863-QUAD/PY through the PCB with the antenna pad.
In the case that the antenna is not directly developed on the same PCB, hence directly connected
at the antenna pad of the GE863-QUAD/PY, then a PCB line is needed in order to connect with
it or with its connector.
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This line of transmission shall fulfil the following requirements:
ANTENNA LINE ON PCB REQUIREMENTS
Impedance 50 ohm
Max Attenuation 0,3 dB
No coupling with other signals allowed
Cold End (Ground Plane) of antenna shall be equipotential to
the GE863-QUAD/PY ground pins
Furthermore if the device is developed for the US market and/or Canada market, it shall comply
to the FCC and/or IC approval requirements:
This device is to be used only for mobile and fixed application. The antenna(s) used for this
transmitter must be installed to provide a separation distance of at least 20 cm from all persons
and must not be co-located or operating in conjunction with any other antenna or transmitter.
End-Users must be provided with transmitter operation conditions for satisfying RF exposure
compliance. OEM integrators must ensure that the end user has no manual instructions to
remove or install the GE863-QUAD/PY module. Antennas used for this OEM module must not
exceed 3dBi gain for mobile and fixed operating configurations.
4.2 GSM Antenna - PCB line Guidelines
Ensure that the antenna line impedance is 50 ohm;
Keep the antenna line on the PCB as short as possible, since the antenna line loss shall be
less than 0,3 dB;
Antenna line must have uniform characteristics, constant cross section, avoid meanders and
abrupt curves;
Keep, if possible, one layer of the PCB used only for the Ground plane;
Surround (on the sides, over and under) the antenna line on PCB with Ground, avoid having
other signal tracks facing directly the antenna line track;
The ground around the antenna line on PCB has to be strictly connected to the Ground Plane
by placing vias once per 2mm at least;
Place EM noisy devices as far as possible from GE863-QUAD/PY antenna line;
Keep the antenna line far away from the GE863-QUAD/PY power supply lines;
If you have EM noisy devices around the PCB hosting the GE863-QUAD/PY, such as fast
switching ICs, take care of the shielding of the antenna line by burying it inside the layers of
PCB and surround it with Ground planes, or shield it with a metal frame cover.
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If you don't have EM noisy devices around the PCB of GE863-QUAD/PY, by using a strip-
line on the superficial copper layer for the antenna line, the line attenuation will be lower
than a buried one;
4.3 GSM Antenna - installation Guidelines
Install the antenna in a place covered by the GSM signal.
The Antenna must be installed to provide a separation distance of at least 20 cm from all
persons and must not be co-located or operating in conjunction with any other antenna or
transmitter;
Antenna shall not be installed inside metal cases
Antenna shall be installed also according Antenna manufacturer instructions.
5 Serial Ports
The serial port on the Telit GE863-QUAD/PY is the core of the interface between the module
and OEM hardware.
2 serial ports are available on the module:
MODEM SERIAL PORT
MODEM SERIAL PORT 2 (DEBUG)
GPS SERIAL PORT A (SIRF BINARY)
GPS SERIAL PORT B (NMEA)
5.1 MODEM SERIAL PORT
Several configurations can be designed for the serial port on the OEM hardware, but the most
common are:
- RS232 PC com port
- microcontroller UART @ 2.8V - 3V (Universal Asynchronous Receive Transmit)
- microcontroller UART@ 5V or other voltages different from 2.8V
Depending from the type of serial port on the OEM hardware a level translator circuit may be
needed to make the system work. The only configuration that doesn't need a level translation is
the 2.8V UART.
The serial port on the GE863-QUAD/PY is a +2.8V UART with all the 7 RS232 signals. It
differs from the PC-RS232 in the signal polarity (RS232 is reversed) and levels. The levels for
the GE863-QUAD/PY UART are the CMOS levels:
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Absolute Maximum Ratings -Not Functional
Parameter Min Max
Input level on any
digital pad when on
-0.3V +3.75V
Input voltage on
analog pads when on
-0.3V +3.0 V
Operating Range - Interface levels (2.8V CMOS)
Level Min Max
Input high level VIH 2.1V 3.3V
Input low level VIL 0V 0.5V
Output high level VOH 2.2V 3.0V
Output low level VOL 0V 0.35V
The signals of the GE863-QUAD/PY serial port are:
RS232
Pin
Number
Signal GE863-
QUAD/PY
Pad Number
Name Usage
1 DCD -
dcd_uart
42 Data Carrier Detect Output from the GE863-QUAD/PY that
indicates the carrier presence
2 RXD -
tx_uart
38 Transmit line *see Note Output transmit line of GE863-QUAD/PY
UART
3 TXD -
rx_uart
37 Receive line *see Note Input receive of the GE863-QUAD/PY
UART
4 DTR -
dtr_uart
39 Data Terminal Ready Input to the GE863-QUAD/PY that
controls the DTE READY condition
5 GND 8-17-28-36-
45-48-50-56
Ground ground
6 DSR -
dsr_uart
43 Data Set Ready Output from the GE863-QUAD/PY that
indicates the module is ready
7 RTS -
rts_uart
40 Request to Send Input to the GE863-QUAD/PY that
controls the Hardware flow control
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8 CTS -
cts_uart
41 Clear to Send Output from the GE863-QUAD/PY that
controls the Hardware flow control
9 RI -
ri_uart
44 Ring Indicator Output from the GE863-QUAD/PY that
indicates the incoming call condition
NOTE: According to V.24, RX/TX signal names are referred to the application side, therefore on the
GE863-QUAD/PY side these signal are on the opposite direction: TXD on the application side will be
connected to the receive line (here named TXD/ rx_uart ) of the GE863-QUAD/PY serial port and
viceversa for RX.
TIP: For a minimum implementation, only the TXD and RXD lines can be connected, the other lines
can be left open provided a software flow control is implemented.
The signals in the UART connector on the EVK are:
DCD RXD
TXD DTR
GND DSR
RTS CTS
RI GND
5.2 MODEM SERIAL PORT 2 (DEBUG)
It is available on the following pins:
PIN # NAME DESCRIPTION TYPE
25 TX_TRACE TX Data CMOS 2.8V
26 RX_TRACE RX Data CMOS 2.8V
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5.3 RS232 level translation
In order to interface the Telit GE863-QUAD/PY with a PC com port or a RS232 (EIA/TIA-232)
application a level translator is required. This level translator must
- invert the electrical signal in both directions
- change the level from 0/3V to +15/-15V
Actually, the RS232 UART 16450, 16550, 16650 & 16750 chipsets accept signals with lower
levels on the RS232 side (EIA/TIA-562) , allowing for a lower voltage-multiplying ratio on the
level translator. Note that the negative signal voltage must be less than 0V and hence some sort
of level translation is always required.
The simplest way to translate the levels and invert the signal is by using a single chip level
translator. There are a multitude of them, differing in the number of driver and receiver and in
the levels (be sure to get a true RS232 level translator not a RS485 or other standards).
By convention the driver is the level translator from the 0-3V UART level to the RS232 level,
while the receiver is the translator from RS232 level to 0-3V UART.
In order to translate the whole set of control lines of the UART you will need:
- 5 driver
- 3 receiver
NOTE: The digital input lines working at 2.8VCMOS have an absolute maximum input voltage of
3,75V; therefore the level translator IC shall not be powered by the +3.8V supply of the module.
Instead it shall be powered from a +2.8V / +3.0V (dedicated) power supply.
This is because in this way the level translator IC outputs on the module side (i.e. GE863-QUAD/PY
inputs) will work at +3.8V interface levels, stressing the module inputs at its maximum input
voltage.
This can be acceptable for evaluation purposes, but not on production devices.
NOTE: In order to be able to do in circuit reprogramming of the GE863-QUAD/PY firmware, the
serial port on the Telit GE863-QUAD/PY shall be available for translation into RS232 and either it's
controlling device shall be placed into tristate, disconnected or as a gateway for the serial data
when module reprogramming occurs.
Only RXD, TXD, GND and the On/off module turn on pad are required to the reprogramming of the
module, the other lines are unused.
All applicator shall include in their design such a way of reprogramming the GE863-QUAD/PY.
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An example of level translation circuitry of this kind is:
The RS232 serial port lines are usually connected to a DB9 connector with the following layout:
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5.4 5V UART level translation
If the OEM application uses a microcontroller with a serial port (UART) that works at a voltage
different from 2.8 - 3V, then a circuitry has to be provided to adapt the different levels of the two
set of signals. As for the RS232 translation there are a multitude of single chip translators, but
since the translation requires very few components, then also a discrete design can be suited. For
example a possible inexpensive translator circuit for a 5V driver can be:
and for a 5V receiver:
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NOTE: The UART input line TXD (rx_uart) of the GE863-QUAD/PY is NOT internally pulled up with a
resistor, so there may be the need to place an external 47K pull-up resistor, either the DTR
(dtr_uart) and RTS (rts_uart) input lines are not pulled up internally, so an external pull-up resistor
of 47K may be required.
A power source of the internal interface voltage corresponding to the 2.8VCMOS high level is
available at the VAUX pad, whose absolute maximum output current is 50mA.
If VAUX is also used to supply a Camera no additional devices could be connected.
Pull-up resistors can be connected to the VAUX pad provided that the pulled-up lines are
GE863-QUAD/PY input lines connected to open collector outputs in order to avoid latch-up
problems on the GE863-QUAD/PY.
Care must be taken to avoid latch-up on the GE863-QUAD/PY and the use of this output line to
power electronic devices shall be considered with care, especially for devices that generate
spikes and noise such as level translators, digital ICs or microcontroller, failure in any of these
condition can severely compromise the GE863-QUAD/PY functionality.
NOTE: The input lines working at 2.8VCMOS can be pulled-up with 47K resistors that can be
connected directly to the VAUX line.
NO disturbing devices should be powered with the VAUX line; otherwise the module functionality
may be compromised.
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6 Microphone
The microphone circuitry is the more noise sensitive and its design and layout must be done with
particular care.
6.1 Microphone line Characteristic and requirements
The Telit GE863-QUAD/PY provides two audio paths for the microphone and the earpiece: the
internal and the external audio paths. Only one of the two paths can be active at a time and it is
selectable by hardware line AXE or by AT command. The audio characteristics of the two paths
are slightly different and this should be kept in mind when designing. The internal audio path
should be used for handset function, while the external audio path is suited for hands free
function (car kit).
Both microphone paths from the Telit GE863-QUAD/PY are balanced and the OEM circuitry
should be designed balanced to reduce the common mode noise typically generated on the
ground plane, however for particular OEM application needs also an unbalanced circuitry can be
used.
The microphone input lines characteristics are:
internal microphone path
line coupling: AC ( 100nF cond.)
line type: balanced
differential input resistance: 25k
line nominal sensitivity: 50 mVrms
max input voltage: 360 mVrms
microphone nominal sensitivity/analog gain suggested: -45 dBVrms/Pa / +24dB
echo canceller type: handset
external microphone path
line coupling: AC ( 100nF cond.)
line type: balanced
differential input resistance: 25k
line nominal sensitivity: 3 mVrms
max input voltage: 22 mVrms
microphone nominal sensitivity/analog gain suggested: -45 dBVrms/Pa / +10dB
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echo canceller type: car kit hands free
TIP: Due to the difference in the echo canceller type, the internal audio path is suited for handset
applications while the external audio path is suited for car kit hands free. The headset applications
should be made by using the external audio path but DISABLING the echo canceller by software AT
command. If the echo canceller is left active with the headset, then some echo might be introduced
by the echo cancel algorithm.
The nominal sensitivity of the line indicates the voltage level on the GE863-QUAD/PY pads that
should be present during "normal spoken" conditions: for a handset a voice signal coming from
the mouth of the talker at 7 cm of distance from the microphone, producing an acoustic pressure
of -4,7 dBPa (@ 1 kHz) on the microphone membrane.
For example:
With the internal mic. having the suggested nominal sensitivity -45dBVrms/Pa
at the "normal spoken" conditions: -4.7dB Pa on the microphone membrane.
At that acoustic pressure the voltage output from the microphone is:
Voltage Output (dB) = ( -45) + (-4.7) = -49.7 dBVrms
corresponding to:
Voltage Output = 10 ( -49.7 / 20 ) = 3.3* 10 -3 Vrms
by having the microphone gain set to +24 dB (corresponding to 15.8 times) the signal in the
nominal conditions on the input mic. pads of the GE863-QUAD/PY will be:
Voltage @ GE863-QUAD/PY_mic = 3.3 * 10 -3 * 15.8 = 51 mVrms
During the spoken conditions the signal varies according to the volume of the voice of the talker,
usually a rough thumb rule for the dynamic range may be considered:
* +20dB (10 times) at maximum voice level (talker screaming)
* -50 dB (1/300 times) at minimum voice level (talker whispering).
For the handsfree/car kit microphone the voice attenuation due to the distance between the
microphone and the talker must be taken into account when designing the microphone amplifier.
For a car cabin usually the distance between the talker and the mic. is about 50cm; in these
conditions the attenuation can be considered as a thumb rule around 20dB.
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Another thing to consider, especially for cabin car use, is the fact that the external mic. will pick
up also ambient noise; to overcome this problem it is preferable to set the gain of the microphone
10dB lower with respect to the calculated value for a nominal sensitivity. The corresponding
reduction in signal level will be compensated by an increased voice volume of the talker which
will speak louder because of the ambient noise.
For the headset we shall distinguish two different types: the headsets having the microphone
sustained close to the mouth and the headsets having the microphone on the earpiece cable.
The same considerations for the additional voice attenuation due to the distance from the
microphone and the noise pick up can be made for the headset having the microphone on the
earpiece cable, while the other kind of headset shall be threaten as an handset.
For example:
With the external mic. having the suggested nominal sensitivity -45dBVrms/Pa
at the "normal spoken" conditions: -4.7dB Pa at 7 cm from the mouth of the talker and with a
further attenuation of 20dB due to the distance from the microphone (about 50 cm).
At that acoustic pressure the voltage output from the microphone is:
Voltage Output (dB) = ( -45) + (-4.7) - 20 = -69.7 dBVrms
corresponding to:
Voltage Output = 10 ( -69.7 / 20 ) = 3.3* 10 -4 Vrms
by having the microphone gain set to +10 dB (corresponding to 3 times) the signal in the
nominal conditions on the input external mic. pads of the GE863-QUAD/PY will be:
Voltage @ GE863-QUAD/PY__extmic = 3.3 * 10 -4 * 3 = 1 mVrms
Hence in these conditions the signal level on the input pads of the external mic. of the GE863-
QUAD/PY is 10 dB (3 times) lower than the nominal, as suggested.
The microphones usually need a biasing network that provides the necessary DC current to the
mic., this will be explained further on.
In the EVK2 all the microphone input jacks have the hot wire connected to the central pole.
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6.2 General Design Rules
There are several configurations for the audio path, but the most effective difference is between
balanced and unbalanced microphone.
It is highly recommended to keep the whole microphone path balanced even if this means having
2 wires connecting the microphone instead of one needed (plus ground) in the unbalanced case.
The balanced circuitry is more suited because of its good common mode noise rejection,
reducing the 216 Hz burst noise produced during the GSM transmissions.
Where possible use balanced microphone circuitry
Keep the microphone traces on the PCB and wires as short as possible.
If your application requires an unbalanced microphone, then keep the lines on the PCB
balanced and "unbalance" the path close to the microphone wire connector if possible.
For the microphone biasing voltage use a dedicated voltage regulator and a capacitor
multiply circuit.
Make sure that the microphone traces in the PCB don't cross or run parallel to noisy traces
(especially the power line)
If possible put all around to the microphone lines a ground trace connected to the ground
plane by several vias. This is done in order to simulate a shielded trace on the PCB.
The biasing circuit and eventually the buffer can be designed in the same manner for the
internal and external microphones.
6.3 Microphone Biasing
The electret microphones usually need a biasing voltage to work properly. Refer to your
microphone provider for the characteristics required.
NOTE: The microphones have a hot wire were the positive biasing must be connected, usually it is
indicated by a + sign or a red point. If the polarity of the bias is reversed, then the microphone will
not work properly. For this reason be sure to respect the mic. biasing polarity.
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6.3.1 Balanced Microphone biasing
The balanced microphone bias voltage should be obtained from a dedicated voltage regulator, in
order to eliminate the noise present on the power lines. This regulator can be the same for all the
audio paths. The microphone should be supplied from a capacitor multiply circuit.
For example a circuit for the balanced microphone biasing can be:
NOTE: In the balanced application the resistors R2 and R3 must have the same value to keep the
circuit balanced.
NOTE: The cable to the microphone should not be shielded, instead a twisted pair cable shall be
used.
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NOTE: The microphone sensitivity changes with the value of R2 and R3. Usually the microphones
are characterized with 2k biasing resistance, so try to keep the sum of R2 and R3 around 2k.
Refer to your microphone manufacturer for the mic. characteristics.
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6.3.2 Unbalanced Microphone biasing
The unbalanced microphone biasing voltage should be obtained from a dedicated voltage
regulator, in order to eliminate the noise present on the power lines. This regulator can be the
same for all the audio paths. The microphone should be supplied from a capacitor multiply
circuit.
For example a circuit for the unbalanced microphone biasing can be:
NOTE: In the unbalanced application the capacitor C3 shall be > 200nF otherwise the frequency
response will be cut at low band frequencies (down to 300Hz). This capacitor can be placed close to
the MIC- pad (EXT_MIC- or INT_MIC- depending on the audio path chosen) or if possible it should
be placed close to the shielded cable connector. If the ground return path is well designed, then it
is possible to eliminate the C3 capacitor, provided the buffer is close to the mic. input.
NOTE: The cable to the microphone should be shielded.
NOTE: The microphone sensitivity changes with the value of R2. Usually the microphones are
characterized with 2k biasing resistance, so try to keep the value of R2 around 2k. For mic.
characteristics refer to the manufacturer.
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6.4 Microphone buffering
As seen previously, a microphone shall be connected to the input pads of the GE863-QUAD/PY
through a buffer amplifier that boosts the signal level to the required value.
Again the buffered microphone circuitry can be balanced or unbalanced. Where possible it is
always preferable a balanced mic. solution. The buffering circuit shall be placed close to the
microphone or close to the microphone wire connector.
6.4.1 Buffered Balanced Mic.
A sample circuit can be:
This circuit has a gain of 15 times (+24 dB), and is therefore suited for the internal mic. input,
having a microphone with a sensitivity close to the suggested one (-45 dBVrms/Pa), if the used
microphone has a different sensitivity, or if the buffer is connected to the external mic. input,
then a gain adjustment shall be done by changing resistors R604-R605 and R606-R607 and as a
consequence the capacitors C636 and C637 to maintain the bandwidth 150-8000 (-3dB).
The buffer gain is given by the formula:
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607
606
605
604
R
R
R
R
Gain ==
The C636 and C637 capacitors are placed in order to cut off the gain at higher frequencies than
the transmitted GSM band, the cutoff frequency (-3dB) should be 8 kHz in order to have -1dB at
4kHz.
The cutoff frequency is given by the formula:
636*606*2
1
637*604*2
1
.CRCR
freq
ππ
== [Hz]
For example:
- Let's assume you have a microphone with these characteristics:
- sensitivity -45 dBVrms/Pa
and you want to use it in the internal mic. audio path.
With the mic. having nominal sensitivity -45dBVrms/Pa at the "normal spoken" conditions: -
4.7dB Pa at 7 cm from the mouth of the talker.
At that acoustic pressure the voltage output from the microphone is:
Mic Voltage Output (dB) = ( -45) + (-4.7) = -49.7 dBVrms
corresponding to:
Mic_Voltage_Output = 10 ( -49.7 / 20 ) = 3.3* 10 -3 Vrms
in order to have a signal of 50 mVrms on the GE863-QUAD/PY internal mic. inputs then the
buffer must have a gain of:
Voltage @ GE863-QUAD/PY_intmic/ Mic_Voltage_Output = (50 * 10 -3 )/( 3.3 * 10 -3 ) = 15
Hence in these conditions the signal level on the input pads of the internal mic. of the GE863-
QUAD/PY is 24 dB (15 times) higher than the microphone output and therefore the buffer has to
gain 24 dB.
The corresponding values for the resistors on the buffer could be ( if we keep the input resistance
10k )
R604 = R606 = gain* R603= gain* R605 = 15* 10 = 150 k
The commercial values of 150k & 10k are then chosen.
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As a consequence the values of the capacitors C636 and C637 shall be:
C636=C637= 1/ (2π*8000*R606)= 132 *10 -12 F
A commercial value of 100pF is then chosen.
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6.4.2 Buffered Unbalanced (Single Ended) Mic.
A sample schematic for a buffered unbalanced (single ended) microphone can be:
The schematic does not include the required mic. biasing circuitry. For the biasing the same
circuit as seen before can be used; to be noticed that the capacitor C3 on the unbalanced biasing
circuit is not anymore needed if this Buffered design is used.
Two different configurations are used, one inverting and the other not inverting, hence an
additional +6dB (2 times) gain is achieved by doubling the mic. signal path.
The gain of the not inverting buffer is given by the formula:
720
719
1R
R
Gain +=
and hence it cannot be less than 1. In the example shown the gain of the not inverting buffer is
1,5 (4dB).
While the gain of the inverting buffer is given by the formula:
708
711
R
R
Gain =
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As shown in the balanced buffered mic. the gain adjustments can be done by changing R719 -
R720 and R708 - R711 and as a consequence the capacitors C726 and C727.
The bandwidth (-3dB) is given by the approximated formula (considering C725 >> C726) :
727*711*2
1
726*719*2
1
.CRCR
freq
ππ
== [Hz]
The buffer bandwidth at -3dB shall be 8kHz.
Note that the biasing of the operational amplifier is given for the inverting amplifier by the series
divider R714-R715. The 100nF capacitor C719 is needed to filter the noise that could be coupled
to that divider. For the not inverting operational the biasing is given by a different divider R715-
R717 with the capacitor C720 and through a series resistor R718 of 470K.
For example:
- Let's assume you have a microphone with these characteristics:
- sensitivity -45 dBVrms/Pa
and you want to use it in the external mic. audio path.
With the mic. having nominal sensitivity -45dBVrms/Pa at the "normal spoken" conditions: -
4.7dB Pa but at 50 cm from the mouth of the talker an additional 20 dB loss shall be considered.
At that acoustic pressure the voltage output from the microphone is:
Mic Voltage Output (dB) = ( -45) + (-4.7) -20 = -69.7 dBVrms
corresponding to:
Mic_Voltage_Output = 10 ( -69.7 / 20 ) = 3.3* 10 -4 Vrms
in order to have a signal of 1 mVrms (10 dB lower than the nominal input for the GE863-
QUAD/PY external mic. path) on the GE863-QUAD/PY internal mic. inputs then the buffer must
have a gain of:
Voltage @ GE863-QUAD/PY_intmic/ Mic_Voltage_Output = (1 * 10 -3 )/( 3.3 * 10 -4 ) = 3
Hence in these conditions the signal level on the input pads of the internal mic. of the GE863-
QUAD/PY is 10 dB (3 times) higher than the microphone output and therefore the buffer has to
gain 10 dB.
To calculate the resistor values it must be kept in mind that balancing the line will double the
signal and hence already add +6 dB, therefore the buffer must gain only 1.5 times.
The corresponding values for the resistors on the buffer could be ( if we keep the input resistance
10k )
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R711 = gain* R708= 1.5* 10 = 15 k
R719 = (gain -1) * R720 = (1.5 -1) * 10 = 5 k
The commercial values of 15k & 5.6k are then chosen.
As a consequence the values of the capacitors C726 and C727 shall be:
C726= 1/ (2π*8000*R719)= 3.5 *10 -9 F
C727= 1/ (2π*8000*R711)= 1,2 *10 -9 F
The commercial values of 3.3nF and 1nF are then chosen.
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7 Speaker
7.1 Speaker lines characteristics and requirements
The Telit GE863-QUAD/PY provides two audio paths for both the microphone and the earpiece:
the internal and the external audio paths. Only one of the two paths can be active at a time and it
is selectable by hardware line AXE or by AT command. The audio characteristics of the two
paths are slightly different and this should be kept in mind when designing your application. The
internal audio path should be used for handset function, while the external audio path is suited
for hands free function (car kit).
Both speaker outputs from the Telit GE863-QUAD/PY are bridged type and the OEM circuitry
shall be designed bridged to reduce the common mode noise typically generated on the ground
plane and to get the maximum power output from the device; however for particular OEM
application needs also a single ended circuitry can be designed.
The GE863-QUAD/PY speaker output lines characteristics are:
internal speaker path ( EAR_MT+ , EAR_MT- )
line coupling: DC
line type: bridged
speaker impedance (operating conditions): 16 ± 5% @ 1kHz
minimum load impedance: 15
signal bandwidth: 150 - 8000 Hz @ -3 dB
maximum differential output: 850 mVrms
rated output power: 10 mW
maximum power output: 30 mW
volume level steps (SW): - 2 dB
number of volume steps(SW): 10
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external speaker path ( EAR_HF+ , EAR_HF- )
line coupling: DC
line type: bridged
speaker impedance (operating conditions): 16 ± 15% @ 1kHz
minimum load impedance: 15
signal bandwidth: 150 - 8000 Hz @ -3 dB
maximum differential output: 425 mVrms
rated output power: 2.5 mW
maximum power output: 7.5 mW
volume level steps (SW): - 2 dB
number of volume steps (SW): 10
The EVK2 v.1.2 audio output characteristics are:
internal/external ear single ended
line coupling: AC
line type: single ended referred to GND
speaker impedance (operating conditions): 8
minimum load impedance: 8
signal bandwidth: 150 - 8000 Hz @ -3 dB
maximum output: 800 mVrms
maximum power output: 80 mW @ 8
THD+N 1% @ 80mW
internal/external ear bridged
line coupling: DC
line type: bridged not referred to GND
speaker impedance (operating conditions): 8
minimum load impedance: 8
signal bandwidth: 150 - 8000 Hz @ -3 dB
maximum output: 1.6 Vrms
maximum power output: 320 mW @ 8
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THD+N 1% @ 330mW
high power external ear
line coupling: DC
line type: bridged not referred to GND
speaker impedance (operating conditions): 4
minimum load impedance: 4
signal bandwidth: 150 - 8000 Hz @ -3 dB
maximum power output: 6 W
THD+N 10% @ 6 W
7.2 General Design rules
There are several configurations for the audio output path, but the various design requirements
can be grouped into three different categories:
handset earphone (low power, typically a handset)
hands free earphone (low power, typically a headset)
car kit speakerphone (high power, typically a speaker)
The three groups have different power requirements, usually the first two applications need only
few mW of power, which can be directly drained from the GE863-QUAD/PY pads, provided a
suited speaker is used. This direct connect design is the cheaper and simpler solution and will be
suited for the most of the earphone design requirements. There's no need to decouple the output
ear lines if a suited earpiece is connected. For the last group, the speakerphone, a power
amplifier is required to raise the output power up to 5-10W required in a car cabin application.
All the designs shall comply with the following guidelines:
Where possible use a bridged earphone circuitry, to achieve the maximum power output from
the device.
Keep the earphone traces on the PCB and wires as short as possible.
If your application requires a single ended earpiece and you want a direct connection, then
leave one of the two output lines open and use only the other referred to ground. Remember
that in this case the power output is 4 times lower than the bridged circuit and may not be
enough to ensure a good voice volume.
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Make sure that the earphone traces in the PCB don't cross or run parallel to noisy traces
(especially the power line)
The cable to the speaker shall be a twisted pair with both the lines floating for the bridged
output type, shielded with the shield to ground for the single ended output type.
7.2.1 Noise Filtering
The I/O of the PCB should have a noise filter close to the connector, to filter the high frequency
GSM noise. The filter can be a Π of 2 capacitor and a inductance, with the one capacitor of 39pF
- 0603 case , and the other capacitor of 1nF - 0603; the inductance shall have a value of 39μH .
7.3 Handset earphone design
As seen previously, a 16 speaker can be directly connected to the output pads EAR_MT+ and
EAR_MT- of the GE863-QUAD/PY.
This solution is often the more cost effective, reducing the components count to a minimum.
There are several limitations to the use of this solution: speaker direct connect imposes the
speaker characteristics to be almost exactly the suggested ones, otherwise the power output may
be reduced (if speaker impedance is bigger than 16) or the GE863-QUAD/PY ear port may be
damaged (if speaker impedance is less than 15).
The other limitation of the speaker direct connection is the power output capability of the
GE863-QUAD/PY which is limited and for some particular applications may not be enough.
For these reasons, when the power output of the GE863-QUAD/PY is not enough or if the
speaker characteristics are different from the suggested, then it is preferable to use an amplifier
to increase the power and current output capabilities.
Again the output from the GE863-QUAD/PY is bridged and both lines should be used, where
possible, as inputs to the power amplifier. This ensures a higher common mode rejection ratio,
reducing the GSM current busts noise on the speaker output.
In this case the EAR_MT lines from the GE863-QUAD/PY should be AC coupled with a
capacitor of 100nF.
It is always desirable to have a mute control on the amplifier, in order to turn it off while the
device is not sending signal to the output, in this manner the amplifier background noise which
may be audible during idle conditions is cut off.
A principle schematic may be:
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The resulting gain and high pass cut can be obtained with the formula:
2
3
R
R
Gain =
4*3*2
1
.CR
freq
π
= [Hz]
And an example of internal Ear amplifier is:
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Some amplifier require a low impedance load at high frequency in order to avoid auto
oscillation, this can be made with a capacitor (100nF) in series with a resistor (15).
When designing your application, remember to provide an adequate bypass capacitor to the
amplifier and place it close to the power input pin of the IC, keeping the traces as short as
possible.
7.4 Hands Free earphone (low power) design
The same design considerations made for the handset are valid for the hands free earphone, the
only difference is that the external ear audio output level from the GE863-QUAD/PY is 6dB
lower than the internal one, so the gain of the amplifier must be 6dB higher to provide the same
audio level.
7.5 Car Kit speakerphone design
For the car kit speaker phone function the power output requirement is usually at least 4W,
therefore an amplifier is needed to boost the GE863-QUAD/PY output.
The design of the amplifier shall comply with the following guidelines:
The input to the amplifier MUST be taken from the external audio path (EAR_HF+,
EAR_HF-) of the GE863-QUAD/PY, because of its echo canceller parameters suited to a
car cabin use.
The amplifier shall have a gain of 30-40 times ( 29-32 dB) to provide the desired output
power of 5-10W with the signal from the GE863-QUAD/PY external audio output lines
(EAR_HF).
If the amplifier has a fixed gain then it can be adjusted to the desired value by reducing the
input signal with a resistor divider network.
The amplifier shall have a mute control to be used while not in conversation. This results in
two benefits: eliminating the background noise when not in conversation and saving power.
The power to the amplifier should be decoupled as much as possible from the GE863-
QUAD/PY power supply, by either keeping separate wires and placing bypass capacitors of
adequate value close to the amplifier power input pads.
The biasing voltage of the amplifier shall be stabilised with a low ESR (e.g. a tantalum)
capacitor of adequate value.
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NOTE: The GE863-QUAD/PY audio path connected to the car kit hands free amplifier MUST be the
external one (EAR_HF), otherwise the echo cancellation will not be done due to the difference in the
echo canceller characteristics of the GE863-QUAD/PY internal audio path from the external audio
path.
An example of car kit amplifier schematic can be:
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8 General Purpose I/O
The general purpose I/O pads can be configured to act in three different ways:
- input
- output
- alternate function (internally controlled)
Input pads can only be read and report the digital value (high or low) present on the pad at the
read time; output pads can only be written or queried and set the value of the pad output; an
alternate function pad is internally controlled by the GE863-QUAD/PY firmware and acts
depending on the function implemented.
Not all GPIO pads support all these three modes:
- GPIO5 supports all three modes and can be input, output, RFTX monitor output (Alternate
function)
- GPIO6 supports all three modes and can be input, output, alarm output (Alternate function)
- GPIO7 supports all three modes and can be input, output, buzzer output (Alternate function)
All GPIO pads are 2.8V CMOS signals and their interface levels are the same specified in the
paragraph 4 .
8.1 Using a GPIO pad as INPUT
The GPIO pads, when used as inputs, can be connected to a digital output of another device and
report its status, provided this device has interface levels compatible with the 2.8V CMOS levels
of the GPIO.
If the digital output of the device to be connected with the GPIO input pad has interface levels
different from the 2.8V CMOS, then it can be connected to GPIO1 or can be buffered with an
open collector transistor, provided a 47K pull-up resistor is connected as seen in the paragraph
5.4 5V UART level translation.
8.2 Using a GPIO pad as OUTPUT
The GPIO pads, when used as outputs, can drive 2.8V CMOS digital devices or compatible
hardware. When set as outputs, the pads have a push-pull output and therefore the pull-up
resistor may be omitted.
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8.3 Using the Alarm Output GPIO6
The GPIO6 pad, when configured as Alarm Output, is controlled by the GE863-QUAD/PY
module and will rise when the alarm starts and fall after the issue of a dedicated AT command.
This output can be used to power up the GE863-QUAD/PY controlling microcontroller or
application at the alarm time, giving you the possibility to program a timely system wake-up to
achieve some periodic actions and completely turn off either the application and the GE863-
QUAD/PY during sleep periods, drammatically reducing the sleep comsumption to few μA.
In battery powered devices this feature will greatly improve the autonomy of the device.
8.4 Using the Buzzer Output GPIO7
The GPIO7 pad, when configured as Buzzer Output, is controlled by the GE863-QUAD/PY
module and will drive with appropriate square waves a Buzzer driver.
This permits to your application to easily implement Buzzer feature with ringing tones or melody
played at the call incoming, tone playing on SMS incoming or simply playing a tone or melody
when needed by your application.
A sample interface scheme is included below to give you an idea of how to interface a Buzzer to
the GPIO7:
NOTE: To correctly drive a buzzer a driver must be provided, its characteristics depend on the
Buzzer and for them refer to your buzzer vendor.
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9 Camera
9.1 Transchip Camera
The GE863-QUAD/PY provides a direct support for Transchip digital cameras with the
following characteristics:
9.1.1 Camera interface connectors
The ballout of the module and a 24 pins ZIF connector for the CMOS camera provide the
interface connection between GE863-QUAD/PY and Transchip camera.
GE863-QUAD/PY signal TC5747MF24L
Pin Signal I/O Notes Pin Signal I/O
55 GPIO3 O I2C bus serial clock 1 SCLK I
8-17… GND Ground 2 AGND I
31 VAUX O Power Supply 3 AVDD28* I
5 GPIO9 O Camera Reset 4 RESET_N I
7 MON1_CAM O Clock 5 CLK_IN** I
8-17… GND Ground 6 DGND I
n.c n.c. 7 DOUT_0 I/O
n.c n.c. 8 DOUT_1 I/O
n.c n.c. 9 DOUT_2 I/O
n.c n.c. 10 DOUT_3 I/O
n.c n.c. 11 DOUT_4 I/O
n.c n.c. 12 DOUT_5 I/O
n.c n.c. 13 DOUT_6 I/O
n.c n.c. 14 DOUT_7 I/O
n.c n.c. 15 DOUT_8 I/O
Type: TRANSCHIP TC5747
Technology: CMOS COLOR camera
Max picture size: VGA 480x640 pixels landscape
Output format: JPEG
Sensitivity: 4 Lux
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n.c n.c. 16 VCLKOUT O
n.c n.c. 17 VALIDH O
n.c n.c. 18 VALIDV O
31 VAUX O Power Supply 19 DVDD28 I
32 GPIO4 I/O I2C bus serial data 20 SDIN I/O
8-17.. GND Ground 21 PS1 I
6 GPIO8 O Camera power type selector 22 PS2 I
8-17… GND Ground 23 SHIELD -
Flash Enable 24 LED_CTRL O
* Filter the AVDD28.
** Use a Buffer between module clk out, MON1_CAM and camera clk in, CLK_IN.
*** Non-connected.
Fig 1. Camera Physical Detail & Connector
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Fig 2. Camera Socket Connector
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9.1.2 EVB for Transchip camera support
In order to interface the Telit GE863-QUAD/PY with a CMOS camera, Telit has developed an
evaluation board. The EVK allows the connector of all Telit modules through 2 connectors of 40
pins each.
The I2CBUS DUAL CAMERA board is plugged in the 2 connectors of 30 pins each on the
module board.
MODULE
BOARD
MAIN
BOARD
CAMERA
BOARD
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9.1.3 Block Diagram for supported cameras
The numbers on the left side of the Camera’s connectors refers to Module Connector’s pin
number.
DVDD is VAUX1 power supply from GE863-QUAD/PY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND
AVDD
CAM_CLK
GND
DVDD
IICSDA_CAM
GND
GND
PD[1]
PD[0]
PD[6]
CAM_CLK
DVDD AVDD
GND
CAMERA TRANSCHIP
MON1_CAM
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9.1.4 Schematic Diagrams for supported cameras
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9.1.5 Example usage script for camera
Camera setting: (shown here are the defaults ones)
>AT#CAMSEL=0 (camera selection: 0-auto, 1-agilent, 2-transchip)
OK
>AT#CMODE=0 (camera mode: 0-day, 1-night)
OK
>AT#CAMQUA=0 (camera quality: 0-low, 1-medieum, 2-high)
OK
>AT#CAMRES=0 (camera resolution: 0-VGA, 1-QVGA, 2-QQVGA)
OK
>AT#CAMCOL=0* (camera color: 0-color, 1-grayscale)
OK
>AT#CAMZOOM=0 (camera zoom: 0-x1, 1-x2, 2-x4)
OK
>AT#CAMTXT=0* (camera timestamp: 0-no, 1-time only, 2-data only, 3-time&data)
OK
Taking an reading a photo:
>AT#CAMEN=1 (camera ON)
OK
>AT#TPHOTO (take photo)
OK
>AT+OBJL? (see photo dimension)
#OBJL: Snapshot,38900 (where 38900 is the file dimension in bytes of the photo taken)
OK
>AT#RPHOTO (download the photo)
…data….. (where …data… Correspond to the photo data in binary)
OK
>AT#TPHOTO
OK
>AT#RPHOTO Repeating photo capture and download n times
…data…..
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OK
>AT#CAMEN=O (camera OFF)
*only Transchip camera
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10 Conformity Assessment Issues
The GE863-QUAD/PY module is assessed to be conform to the R&TTE Directive as stand-
alone products, so If the module is installed in conformance with Dai Telecom installation
instructions require no further evaluation under Article 3.2 of the R&TTE Directive and do not
require further involvement of a R&TTE Directive Notified Body for the final product.
In all other cases, or if the manufacturer of the final product is in doubt then the equipment
integrating the radio module must be assessed against Article 3.2 of the R&TTE Directive.
In all cases assessment of the final product must be made against the Essential requirements of
the R&TTE Directive Articles 3.1(a) and (b), safety and EMC respectively, and any relevant
Article 3.3 requirements.
The GE863-QUAD/PY module is conform with the following European Union Directives:
R&TTE Directive 1999/5/EC (Radio Equipment & Telecommunications Terminal
Equipments)
Low Voltage Directive 73/23/EEC and product safety
Directive 89/336/EEC for conformity for EMC
In order to satisfy the essential requisite of the R&TTE 99/5/EC directive, the GE863-
QUAD/PY module is compliant with the following standards:
GSM (Radio Spectrum). Standard: EN 301 511 and 3GPP 51.010-1
EMC (Electromagnetic Compatibility). Standards: EN 301 489-1 and EN 301 489-7
LVD (Low Voltage Directive) Standards: EN 60 950
In this document and the Hardware User Guide, Software User Guide all the information you
may need for developing a product meeting the R&TTE Directive is included.
The GE863-QUAD/PY module is conform with the following US Directives:
Use of RF Spectrum. Standards: FCC 47 Part 24 (GSM 1900)
EMC (Electromagnetic Compatibility). Standards: FCC47 Part 15
To meet the FCC's RF exposure rules and regulations:
- The system antenna(s) used for this transmitter must be installed to provide a separation
distance of at least 20 cm from all the persons and must not be co-located or operating in
conjunction with any other antenna or transmitter.
- The system antenna(s) used for this module must not exceed 3 dBi for mobile and fixed or
mobile operating configurations.
- Users and installers must be provided with antenna installation instructions and transmitter
operating conditions for satisfying RF exposure compliance.
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Manufacturers of mobile, fixed or portable devices incorporating this module are advised to
clarify any regulatory questions and to have their complete product tested and approved for
FCC compliance.
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11 SAFETY RECOMMANDATIONS
READ CAREFULLY
Be sure the use of this product is allowed in the country and in the environment required. The
use of this product may be dangerous and has to be avoided in the following areas:
Where it can interfere with other electronic devices in environments such as hospitals,
airports, aircrafts, etc
Where there is risk of explosion such as gasoline stations, oil refineries, etc
It is responsibility of the user to enforce the country regulation and the specific environment
regulation.
Do not disassemble the product; any mark of tampering will compromise the warranty validity.
We recommend following the instructions of the hardware user guides for a correct wiring of the
product. The product has to be supplied with a stabilized voltage source and the wiring has to be
conforming to the security and fire prevention regulations.
The product has to be handled with care, avoiding any contact with the pins because electrostatic
discharges may damage the product itself. Same cautions have to be taken for the SIM, checking
carefully the instruction for its use. Do not insert or remove the SIM when the product is in
power saving mode.
The system integrator is responsible of the functioning of the final product; therefore, care has to
be taken to the external components of the module, as well as of any project or installation issue,
because the risk of disturbing the GSM network or external devices or having impact on the
security. Should there be any doubt, please refer to the technical documentation and the
regulations in force.
Every module has to be equipped with a proper antenna with specific characteristics. The
antenna has to be installed with care in order to avoid any interference with other electronic
devices and has to guarantee a minimum distance from the body (20 cm). In case of this
requirement cannot be satisfied, the system integrator has to assess the final product against the
SAR regulation.
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The European Community provides some Directives for the electronic equipments introduced on
the market. All the relevant information’s are available on the European Community website:
http://europa.eu.int/comm/enterprise/rtte/dir99-5.htm
The text of the Directive 99/05 regarding telecommunication equipments is available, while the
applicable Directives (Low Voltage and EMC) are available at:
http://europa.eu.int/comm/enterprise/electr_equipment/index_en.htm
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Document Change Log
Revision Date Changes
ISSUE #0 21/02/06 First release
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12 EVK 2 SCHEMATICS
FORBIDDENVIETATE
ALL RIGHTS RESERVED
RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE
TUTTI I DIRITTI RISERVATI
PROJECT
A3
DESCRIPTION
DRAWING CODE
FORM
MODIFY
OF SHEETS
DATE
SHEET N.
VERIFIED
PROJECT
DRAWN
PATH /home/users/area
Mod. 067 rev.1 11/02 ANNOTATION
FILE NAME
B
C
D
E
A
42 9810713 1165
1215061-03F
PL104
2
1
3
GND
1206
4.7
5%
R113
GND
GND
1206
4.7
5%
R110
0603
680
5%
R108
TR1
TR2
47K
47K
47K
2K2
WTs
BCR48PN
SOT-363
Q104
4
1
6
3
5
2
GND
GND
1984617PT1.5_2-3.5-H
PL101
2
1
OT103
G36
STPS3L60U
SMB
D102
ON_OFF*
2:5E;2:9B
RESET*
2:4E;2:9C
GND
GND
50V
0603
10nF
X7R
C103
STPS140Z
SOD123
D103
GND
16V
0402
10nF
X7R
C108
0402
8.2K
5%
R106
GND
1984617PT1.5_2-3.5-H
PL103
2
1
GND
GND
6.3V
CONT-E
330uF
C106
GND
0402
2.2K
5%
R107
GND 50V
16X16.5 NR
470uF
C104
0603
1.0K
1%
R115
CHARGE
2:9B
0603
5.6K
5%
R109
0402
47K
5%
R117
GND
1215061-03F
PL105
2
1
3
6.3V
CONT-E
330uF
C107
TP101
0603
680
5%
R105
RAPC712X
RAPC
SO101
1
2
3
1206
4.7
5%
R111
STPS140Z
SOD123
D105
0603
0
0
R101
+3.7V
.
IRL5602SPBF
TO-263AB
Q103
2
D
3
S
1
G
50V
0603
10nF
X7R
C102
0603
0
0
R104
GND
LDO_ON_OFF*
3:6C;3:7B;4:6E;5:2B;5:2D;5:8C
STPS340U
SMB
U34
D104
1206
4.7
5%
R112
0603
0
0
R103
TP102
+3.7V
3Fs
BC857B
SOT-23
Q102
2
3
1
OT102
0603
2.0K
1%
R114
1984617PT1.5_2-3.5-H
PL107
2
1
GND
GND
+3.7V
0603
0
0
R102
GND
0402
47K
5%
R116
OT101
50V
0603
10nF
X7R
C101
50V
0603
4.7nF
X7R
C105
0402
0
0
noMount=YES
R118
GND
+3.7V
47K
10K
WNs
BCR185W
SOT-323
Q105
2
3
1
LY-M676-Q2S1-26
M676
YELLOW
DL101
1984617PT1.5_2-3.5-H
PL102
2
1
SLF12575
L101
1Fs
BC847BW
SOT-323
Q101
2
3
1
LM2596S-ADJ-NOPB
U101
1+VIN
4
FBACK
2
VOUT
5ON/OFF
TAB
6
GND
3
GND
G36
STPS3L60U
SMB
D101
GND
9019915102410
PL106
2
1
EVK 2
0276
080705
1 30276SE11139A
cs1139a.cir
5
Furlan M.
POWER REGULATOR / BATTERY CHARGE
BATTERY CHARGER INPUT
+
-
6 Vcc
3,7V(Li-Ion) Nominal
BATTERY LI-ION
+
-
max voltage 4,2V (Li-Ion)
polarity is respected!
! WARNING!!!!
When using battery care must be
taken to ensure that the right
CURRENT UNLIMITED
power input is respected!
! WARNING!!!!
Care must be taken to ensure
that the right polarity in the
DO NOT Supply power when the
Battery is not connected
suggested capacity: 1000mAh
power input is respected!
Care must be taken to ensure
that the right polarity in the
+
MIN 5V
MAX 40V
INPUT -
WARNING!!!!
!
080705
POWER
JACK
3.8V
IN
+
-
1-2 : 5-40V IN
2-3 : 3.8V IN
Nonis R.
Serdi M.
FUSE 1206
080705
1-2 : Regulator
2-3 : Battery
CHARGER ON
FORBIDDENVIETATE
ALL RIGHTS RESERVED
RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE
TUTTI I DIRITTI RISERVATI
PROJECT
A3
DESCRIPTION
DRAWING CODE
FORM
MODIFY
OF SHEETS
DATE
SHEET N.
VERIFIED
PROJECT
DRAWN
PATH /home/users/area
Mod. 067 rev.1 11/02 ANNOTATION
FILE NAME
B
C
D
E
A
42 9810713 1165
MIC_HF-
4:11B
50V
0402
33pF
COG
C203
+3.7V
GND
4731955140400
PL202
3
2
1
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
0402
0
0
R205
C106/CTS
3:3C
GND
IIC_SDA_HW
5:5D
C104/RXD
3:3C
C109/DCD
3:3C
SSC0_MRST
5:11B
0402
0
0
R203
C103/TXD
3:3C
TX_TRACE
3:3C
GND
ON_OFF*
1:9A;5E
SSC0_MTSR
5:11B
GND
MIC_HF+
4:11B
0402
0
0
R206
RX_TRACE
3:3C
GND
C125/RING
3:3C
TP201
TP206
C107/DSR
3:3C
0603
330
5%
R201
TP204
SIM_CARD
FMS006Z-2001-0
SO201
1
C1
6C7
5C6
3
C3
2
C2
78
4C5
EAR_HF+
4:11B
TP205
GND
4731955140400
PL201
3
2
1
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
GND
RESET*
1:9B;4E
+3.7V
EAR_MT-
4:9B
ON_OFF*
1:9A;9B
0402
0
0
R204
GND
50V
0402
33pF
COG
C202
EAR_HF-
4:11B
IIC_SCL_HW
5:5D
STAT_LED
9C
STAT_LED
3E
AXE
4:11B
0402
0
0
R202
RESET*
1:9B;9C
SSC0_CLK
5:11B
50V
0402
33pF
COG
C201
SKHHAL
SW201
31
2
4
LY-M676-Q2S1-26
M676
YELLOW
DL201
TP203
MIC_MT+
4:9B
C105/RTS
3:3C
GND
TP202
SKHHAL
SW202
3
1
24
GND
MIC_MT-
4:9B
50V
0402
33pF
COG
C204
EAR_MT+
4:9B
CHARGE
1:8A
C108/DTR
3:3C
50276
EVK 2
080705
Furlan M.
30276SE11139A
cs1139a.cir
2
INTERFACE CONNECTORS
SIMIO
SIMIN
SIMCLK
SIMVCC
SIMRST
YELLOW - STAT LED
RESET BUTTON
080705
Nonis R.
Serdi M.
VBATT
GND
SIMRST
GND
GND
SIMCLK
GND
GND
SIMIN
CHARGE
SIMVCC
STAT_LED
SUPPLY
ON_OFF*
VBATT
2 x 5
GND
GND
GND
VBATT
SIM
GND
GND
CHARGE
GND
RESET*
2 x 5
SIMIO
GND
GND
2 x 5
GND
GND
VBATT
C106/CTS
DATA
GND
GND
MIC_HF-
EAR_HF+
GND
C107/DSR
GND
C108/DTR
GND
AXE
GND
GND
GND
GND
C103/TXD
MIC_MT+
C105/RTS
TRACE
GND
MIC_HF+
EAR_MT-
EAR_MT+
GND
GND
C104/RXD
RX_TRACE
GND
2 x 5
C109/DCD
TX_TRACE
AUDIO
EAR_HF-
C125/RING
2 x 5
MIC_MT-
080705
ON BUTTON
IIC_SDA_HW
IIC_SCL_HW
SSC0_CLK
SSC0_MTSR
SSC0_MRST
IIC
SSC
FORBIDDENVIETATE
ALL RIGHTS RESERVED
RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE
TUTTI I DIRITTI RISERVATI
PROJECT
A3
DESCRIPTION
DRAWING CODE
FORM
MODIFY
OF SHEETS
DATE
SHEET N.
VERIFIED
PROJECT
DRAWN
PATH /home/users/area
Mod. 067 rev.1 11/02 ANNOTATION
FILE NAME
B
C
D
E
A
42 9810713 1165
1215061-10F
PL302
3
2
1
4
5
6
7
8
9
10
0402
47K
5%
R301
25V
0402
15nF
X7R
C303
RTS_USB
5:5E
RI_USB
5:5E
+3.7V
GND
10V
0603
220nF
X7R
C312
6.3V
0603
2.2uF
X5R
C302
10V
0603
220nF
X7R
C316
10V
0603
220nF
X7R
C308
0402
47K
5%
R306
10V
CONT-A
10uF
C304
GND
RX_PROG_USB
5:5D
C125/RING
2:3C
CTS_USB
5:5E C106/CTS
2:3C
LDO_ON_OFF*
1:11B;6C;4:6E;5:2B;5:2D;5:8C
TP301
DTR_USB
5:5E
0402
47K
5%
R304
TX_TRACE_USB
5:11C
GND
+3.7V
MAX3237CAI+
SSOP-28
U303
24 T1IN
23 T2IN
22 T3IN 7
T3OUT
6
T2OUT
5
T1OUT
4
V-
11
R3IN
17 T5IN
19 T4IN
26
VCC
14
SHDN*
25 C1-
2
GND
28 C1+
20 R2OUT
10
T4OUT
21 R1OUT
9
R2IN
1C2+
12
T5OUT
3C2-
13
EN*
8
R1IN
15 MBAUD
27
V+
16 R1OUTB
18 R3OUT
1215061-10F
PL303
3
2
1
4
5
6
7
8
9
10
CD81V1SSAAC
SO301
3L
2L
1L
4L
5L
6L
7L
8L
9L
1U
2U
3U
4U
5U
6U
7U
8U
9U
LDO_ON_OFF*
1:11B;7B;4:6E;5:2B;5:2D;5:8C
JP304
GND
10V
0603
220nF
X7R
C311
10V
0603
220nF
X7R
C315
GND
GND
TX_PROG_USB
5:5D
10V
0603
220nF
X7R
C309
0402
47K
5%
R303
C103/TXD
2:3C
C107/DSR
2:3C
10V
0603
220nF
X7R
C310
DCD_USB
5:5E
GND
C104/RXD
2:3B
1215061-10F
PL301
3
2
1
4
5
6
7
8
9
10
6.3V
0603
2.2uF
X5R
C313
RX_TRACE_USB
5:11C
10V
CONT-A
10uF
C306
GND
C108/DTR
2:3C
L20A
LP2982AIM5X-3_0-NOPB
MA05A
U301
1V_IN
3ON-OFF* 4
BYPASS
5
V_OUT
2GND
0402
47K
5%
R305
10V
0603
220nF
X7R
C307
JP303
6.3V
0603
2.2uF
X5R
C314
MAX3237CAI+
SSOP-28
U304
24 T1IN
23 T2IN
22 T3IN 7
T3OUT
6
T2OUT
5
T1OUT
4
V-
11
R3IN
17 T5IN
19 T4IN
26
VCC
14
SHDN*
25 C1-
2
GND
28 C1+
20 R2OUT
10
T4OUT
21 R1OUT
9
R2IN
1C2+
12
T5OUT
3C2-
13
EN*
8
R1IN
15 MBAUD
27
V+
16 R1OUTB
18 R3OUT
JP301 GND
TP302
DSR_USB
5:5E
0402
47K
5%
R302
GND
25V
0402
15nF
X7R
C305
GND
RX_TRACE
2:3B
C109/DCD
2:3B
JP302
TX_TRACE
2:3B
GND
C105/RTS
2:3C
6.3V
0603
2.2uF
X5R
C301
L20A
LP2982AIM5X-3_0-NOPB
MA05A
U302
1V_IN
3ON-OFF* 4
BYPASS
5
V_OUT
2GND
30276SE11139A
35
080705
Serdi M.
UART
0276
cs1139a.cir
Furlan M.
080705
EVK 2
RTS
DCD
CTS
TXD
PROG
RXD
ASC1
DSR
ASC0
DTR
GND
RI
TRACE
USB/RS232 Switch
HW FLOW CONTROL
ASC0
(PROG)
ASC1
(TRACE)
USB RS232
Nonis R. 080705
FORBIDDENVIETATE
ALL RIGHTS RESERVED
RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE
TUTTI I DIRITTI RISERVATI
PROJECT
A3
DESCRIPTION
DRAWING CODE
FORM
MODIFY
OF SHEETS
DATE
SHEET N.
VERIFIED
PROJECT
DRAWN
PATH /home/users/area
Mod. 067 rev.1 11/02 ANNOTATION
FILE NAME
B
C
D
E
A
42 9810713 1165
GND
GND
TP402
MIC_MT-
2:3D
LM4862MX-NOPB
U401
6VDD
2
BYPASS
3
IN+
8VC2
1
SHUTDOWN
7GND
4
IN-
5VC1
BLM21
2250
L401
EAR_MT-
2:3C
GND
25V
0402
15nF
X7R
C418
0603
0
0
R411
noMount=YES
0603
100K
5%
R404
GND GND
10V
0402
100nF
Y5V
C411
0603
0
0
R408
noMount=YES
0603
15
5%
R402
GND
GND
0402
22K
5%
R405
JP401
6.3V
0603
1uF
X5R
C414
GND
EAR_HF-
2:3C
AXE
2:3C
10V
CONT-A
10uF
C417
6.3V
0603
2.2uF
X5R
C409
MIC_HF-
2:3D
TP401
16V
0603
100nF
Y5V
C408
MIC_MT+
2:3D
GND
10V
CONT-D
100uF
C413
0603
1M
5%
R407
0402
2.2K
5%
R403
0603
0
0
R410
noMount=YES
GND
GND
GND
16V
0603
100nF
Y5V
C404
GND
GND
0603
0
0
R412
noMount=YES
GND
TP404
10V
0402
100nF
Y5V
C410
EAR_MT+
2:3C
TP403
JP402
0603
15
5%
R401
16V
0402
10pF
COG
C405
+3.7V
50V
0402
22pF
COG
C406
MIC_HF+
2:3D
16V
0603
100nF
Y5V
C403
BLM21
2250
L402
1215061-05F
PL404
3
2
1
4
5
0603
100K
5%
R406
GND
EAR_HF+
2:3C
GND
6.3V
0603
2.2uF
X5R
C419
L20A
LP2982AIM5X-3_0-NOPB
MA05A
U402
1
V_IN
3
ON-OFF*
4BYPASS
5V_OUT
2
GND
LDO_ON_OFF*
1:11B;3:6C;3:7B;5:2B;5:2D;5:8C
PJ25605-T2
PJ25605-T2
SO401
3
4
2
15
+3.7V
1215061-05F
PL402
3
2
1
4
5
1Fs
BC847BW
SOT-323
Q401
2
3
1
50V
0402
22pF
COG
C401
16V
0603
100nF
Y5V
C416
1215061-05F
PL403
3
2
1
4
5
16V
0402
1nF
X7R
C402
16V
0402
1nF
X7R
C407
50V
0603
10pF
COG
C412
9019915102410
PL401
2
1
0603
0
0
R409
noMount=YES
JP403
GND
16V
0603
100nF
Y5V
C415
Serdi M.
AUDIO
4
080705
0276
Furlan M.
5 30276SE11139A
EVK 2
cs1139a.cir
080705
EARPIECE
OPTIONAL POWER AMPLIFIER
AUDIO Switch
Nonis R. 080705
FORBIDDENVIETATE
ALL RIGHTS RESERVED
RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE
TUTTI I DIRITTI RISERVATI
PROJECT
A3
DESCRIPTION
DRAWING CODE
FORM
MODIFY
OF SHEETS
DATE
SHEET N.
VERIFIED
PROJECT
DRAWN
PATH /home/users/area
Mod. 067 rev.1 11/02 ANNOTATION
FILE NAME
B
C
D
E
A
42 9810713 1165
GND
50V
0402
27pF
COG
C505
0402
1.5K
5%
R531
TP533
+5V_USB
0402
1.5K
5%
R513
0402
15K
5%
R520
10V
0402
100nF
X5R
C506
0402
100K
5%
R505
GND
10V
CONT-A
10uF
C510
TP526
GND
3.0V_USB
GND
0402
27
5%
R503
+5V_USB
50V
0402
47pF
COG
C520
0402
470
5%
R511
TX_TRACE_USB
3:2C
RTS_USB
3:2C
0402
27
5%
R528
+5V_USB
TX_PROG_USB
3:2C
10V
0402
100nF
X5R
C509
GND
0402
18K
5%
R535
noMount=YES
10V
0402
100nF
X5R
C502
SSC0_MTSR
2:4B
0402
15K
5%
R509
XTIN_FT2232
3D;5A
25V
0402
15nF
X7R
C514
0402
1.5K
5%
R516
TP515
GND
GND
TP530
GND
GND
93LC56B_I-SNG
U507
8
VCC
3DI
4DO
6
NC_6
2CLK
5
VSS
1CS
7
NC_7
16V
0402
47nF
X7R
C521
93LC56B_I-SNG
U501
8
VCC
3DI
4DO
6
NC_6
2CLK
5
VSS
1CS
7
NC_7
TP529
GND
0402
18K
5%
R537
noMount=YES
10V
0402
100nF
X5R
C512
RI_USB
3:2C
0402
27
5%
R507
LDO_ON_OFF*
1:11B;3:6C;3:7B;4:6E;2B;8C
GND
JP504
0402
18K
5%
R506
10V
CONT-A
10uF
C513
LDO_ON_OFF*
1:11B;3:6C;3:7B;4:6E;2D;8C
GND
GND
USBE-004
SO501
3
2
1
4
10V
0402
100nF
X5R
C501
GND
0402
15K
5%
R519
TEXTUSB2036VFRG4
S-PQFP-G32
U502
1DP0
2DM0
3VCC_3
4RESET
5EECLK
6EEDATA/GANGED
7GND_7
8BUSPWR
9PWRON1
10 OVRCUR1
11 DM1
12 DP1
13 PWRON2
14 OVRCUR2
15 DM2
16 DP2
17
PWRON3
18
OVRCUR3
19
DM3
20
DP3
21
OCPROT/PWRSW
22
NPINT0
23
NPINT1
24
NP3
25
VCC_25
26
EXTMEM
27
DP0PUR
28
GND_28
29
XTAL2
30
XTAL1/CLK48
31
MODE
32
SUSPND
3.3V_HUB
NX1255GB
CP12A
6.000MHz
X501
3
2
1
4
50V
0402
27pF
COG
C508
+5V_USB
TP516
GND
6.3V
0603
2.2uF
X5R
C516
16V
0402
47nF
X7R
C507
JP506
+5V_USB
GND
GND
0402
4.7K
5%
R525
3.3V_HUB
3.0V_USB
0402
27
5%
R529
GND
GND
GND
+5V_USB
GND
TP532
0402
15K
5%
R522
0402
0
0
R517
DTR_USB
3:2C
10V
0402
100nF
X5R
C519
0402
1.5K
5%
R510
TP535
TP528
GND
GND
0402
18K
5%
R538
JP511
GND
0402
470
5%
R527
IIC_SDA_HW
2:4B
GND
+5V_USB
JP502
6.3V
0603
2.2uF
X5R
C515
GND
0402
18K
5%
R524
TP502
RX_PROG_USB
3:2C
10V
0402
100nF
X5R
C503
74AHC1GU04DCKRG4
U504
5
VCC
3
GND
3.3V_HUB
0402
15K
5%
R523
GND
TP527
GND
IIC_SCL_HW
2:4B
+5V_USB
FT2232L
LQFP48
U509
63V3OUT
8USBDM
7USBDP
5RSTOUT
4RESET
43 XTIN
44 XTOUT
48 EECS
1EESK
2EEDATA
47 TEST
45 AGND
9GND_9
18 GND_18
25 GND_25
34 GND_34
41
PWREN
26
SI/WUB
27
BCBUS3
28
BCBUS2
29
BCBUS1
30
BCBUS0
32
BDBUS7
33
BDBUS6
35
BDBUS5
36
BDBUS4
37
BDBUS3
38
BDBUS2
39
BDBUS1
40
BDBUS0
10
SI/WUA
11
ACBUS3
12
ACBUS2
13
ACBUS1
15
ACBUS0
16
ADBUS7
17
ADBUS6
19
ADBUS5
20
ADBUS4
21
ADBUS3
22
ADBUS2
23
ADBUS1
24
ADBUS0
31
VCCIOB
14
VCCIOA
42
VCC_42
3
VCC_3
46
AVCC
TP531
0402
18K
5%
R526
+5V_USB
+5V_USB
DSR_USB
3:2C
0402
18K
5%
R501
TP505
GND
DCD_USB
3:2C
+5V_USB
0402
0
0
R515
noMount=YES
GND
TP534
XTIN_FT2232
3D;9C
GND
XTIN_FT2232
5A;9C
0402
18K
5%
R536
3.3V_HUB
CTS_USB
3:2C
JP501
L05A
LP2981AIM5X-3_0-NOPB
MA05A
U505
1
VIN
3
ON/OFF*
4NC
5OUT
2
GND
JP503
GND
LDO_ON_OFF*
1:11B;3:6C;3:7B;4:6E;2B;2D
0402
4.7K
5%
R502
0402
0
0
noMount=YES
R512
GND
FT2232L
LQFP48
U503
63V3OUT
8USBDM
7USBDP
5RSTOUT
4RESET
43 XTIN
44 XTOUT
48 EECS
1EESK
2EEDATA
47 TEST
45 AGND
9GND_9
18 GND_18
25 GND_25
34 GND_34
41
PWREN
26
SI/WUB
27
BCBUS3
28
BCBUS2
29
BCBUS1
30
BCBUS0
32
BDBUS7
33
BDBUS6
35
BDBUS5
36
BDBUS4
37
BDBUS3
38
BDBUS2
39
BDBUS1
40
BDBUS0
10
SI/WUA
11
ACBUS3
12
ACBUS2
13
ACBUS1
15
ACBUS0
16
ADBUS7
17
ADBUS6
19
ADBUS5
20
ADBUS4
21
ADBUS3
22
ADBUS2
23
ADBUS1
24
ADBUS0
31
VCCIOB
14
VCCIOA
42
VCC_42
3
VCC_3
46
AVCC
9019915102410
noMount=YES
PL502
2
1
50V
0402
47pF
COG
C504
0402
15K
5%
R514
0402
15K
5%
R521
GND
L19A
LP2982AIM5X-3_3
MA05A
U506
1
V_IN
3
ON-OFF*
4BYPASS
5V_OUT
2
GND
10V
CONT-A
10uF
C518
GND
GND
+5V_USB
GND
RX_TRACE_USB
3:2C
+5V_USB
GND
0402
27
5%
R508
+5V_USB
GND
SSC0_CLK
2:4B
+5V_USB
SSC0_MRST
2:4B
0402
27
5%
R504
.
74AHC1GU04DCKRG4
U504
4
2
10V
0402
100nF
X5R
C517
3.3V_HUB
USB0 <-> PROG. + I2C
USB
connector
USB1 <-> TRACE + SSC
USB <-> PROG,TRACE,I2C,SSC
USB HUB
cs1139a EVK 2
55
0276 30276SE11139A
Furlan M.
Serdi M.
Nonis R.
080705
080705
080705
Telit GE863-QUAD / GE863-PY
Hardware User guide
1vv0300715, Rev. ISSUE#0, - 21/02/06
Reproduction forbidden without Telit Communication written authorization – All Right reserved – Right of modification reserved page 68 of 71
13 EVB CAMERA SCHEMATICS
0402
47K
5%
noMount=YES
R111
L18A
LP2982AIM5X–2_8–NOPB
MA05A
U102
1
V_IN
3
ON–OFF
4BYPASS
5V_OUT
2
GND
IICSCL/AGILENT
6B
CAM_SCL/IIC_SCL
9B
CAM_M_CLK
10D;5A
CAM_M_CLK
5A;5C
CAM_SDA/IIC_SDA
5D;6B
TP101
TP106
GND
VAUX1
TP105
GND
0402
1K
5%
R104
GND
TP108
VAUX1
TP110
0402
0
0
noMount=YES
R113
GND
GND
GND
JP116
25V
0402
15nF
X7R
noMount=YES
C106
JP120
JP109
10V
CONT–A
10uF
C104
FORBIDDENVIETATE
ALL RIGHTS RESERVED
RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE
TUTTI I DIRITTI RISERVATI
PROJECT
A3
DESCRIPTION
DRAWING CODE
FORM
MODIFY
OF SHEETS
DATE
SHEET N.
VERIFIED
PROJECT
DRAWN
PATH /home/users/area
Mod. 067 rev.1 11/02 ANNOTATION
FILE NAME
B
C
D
E
A
42 98 10
71 3 1165
0402
47K
5%
noMount=YES
R110
VCC_MAIN_CAM
6.3V
0603
2.2uF
X5R
C109
CAM_DRDY/AGILENT
6B
PD[5]
5A
4773540103470
SO107
2
1
3
PD[1]
5A
JP106
JP107
GND
GND
GND
TP109
0402
0
0
R115
0402
0
0
R112
PD[0]
5A
PD[2]
5A
0402
0
0
R106
10V
0402
100nF
Y5V
C112
6B
CAM_PWR_ON/AGILENT
VCC_MAIN_CAM
SN74LVC1G08DCKR
U101
5
VCC
3
GND
TGPIO_08/CAM_ON
9B
PD[4]
5A
JP114
0402
0
0
R105
CAM_SYNC/AGILENT
5A
MON1/CAM_CLK
10D
PD[3]
5A
PD[6]
5A
VCC_MAIN_CAM
CAM_SDA/IIC_SDA
6B;9B
4773540103470
SO109
2
1
3
TP102
25V
0402
15nF
X7R
C105
25V
0402
15nF
X7R
noMount=YES
C111
TGPIO_08/CAM_ON
5D
0402
0
0
R109
noMount=YES
52437–2472
SO105
3
2
1
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
CAM_SCL/IIC_SCL
5C
TP111
4773540103470
SO106
2
1
3
TP107
TGPIO_09/CAM_RST
5C
OT101
JP105
JP117
4779723130417
SO102
3
2
1
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
0402
0
0
R114
SN74LVC1G08DCKR
CE
U101
2
4
1
0402
0
0
R116
0402
0
0
R108
4779723130417
SO101
3
2
1
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
TP104
6.3V
0603
2.2uF
X5R
C110
50V
0402
33pF
COG
C107
GND
PD[7]
5B
CAM_PWR_ON/AGILENT
6B
6.3V
0603
2.2uF
X5R
C108
GND
JP108
TGPIO_09/CAM_RST
9B
0402
0
0
R107
0402
100K5%
R103
GND
GND
JP112
TP112
TP103
JP121
4773540102470
noMount=YES
SO104
2
1
JP110
GND
4773540103470
SO108
2
1
3
MON1/CAM_CLK
9B
10276
Furlan M. 060905
1 30276SE11170
Pasqualini N.
cs1170.cir I2CBUS DUAL CAMERA
060905
SCLK
RESET_N
DVDD28
Shield
SDIN
PS1
VALIDH
AVDD28
VCLKOUT
LED_CTRL
TransChip TC5747MF24L (24pin)
VALIDV
PS2
AGND
DGND
CLK_IN
INTERFACE CONNECTORS
TC5747MF24L
DOUT1
DOUT3
DOUT2
DOUT0
DOUT6
DOUT4
DOUT5
DOUT7
DOUT8
GM862
TRIZIUM
– 1 –
MODIFY
DATE
PATH
FILE NAME
Mod. 048 Rev.0 6/99
Project by
Verif. by
DESCRIPTION
FORM
I2CBUS DUAL CAMERA
cs1170
Drawn by: Pasqualini Natascia
A3
Project
0276
SHEET N.
1
OF SHEETS
2
DRAWING CODE
CS1170.SM
06/09/2005
ANNOTATION
Silkscreen side A
TUTTI I DIRITTI RISERVATI
RIPRODUZIONE E DIVULGAZIONE
VIETATE
ALL RIGHTS RESERVED
REPRODUCTION AND DISCLOSURE
FORBIDDEN
FILE GERBER
cs1170
/Archivio_PCB/cs1170
MODIFY
DATE
PATH
FILE NAME
Mod. 048 Rev.0 6/99
Project by
Verif. by
DESCRIPTION
FORM
I2CBUS DUAL CAMERA
cs1170
Drawn by: Pasqualini Natascia
A3
Project
0276
SHEET N.
2
OF SHEETS
2
DRAWING CODE
CS1170.SM
06/09/2005
ANNOTATION
Silkscreen side B
TUTTI I DIRITTI RISERVATI
RIPRODUZIONE E DIVULGAZIONE
VIETATE
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