UTStarcom MSG2000 Multi-Service Gateway User Manual

UTStarcom Inc. Multi-Service Gateway Users Manual

Users Manual

FlexPacket ATCA PP50 Packet Processor
User Manual
CC06786-11B
Continuous Computing, the Continuous Computing logo, Create | Deploy | Converge, Flex21,
FlexChassis, FlexCompute, FlexCore, FlexDSP, FlexPacket, FlexStore, FlexSwitch, Network Service-
Ready Platform, Quick!Start, TAPA, Trillium, Trillium+plus, Trillium Digital Systems, Trillium On Board,
TAPA, and the Trillium logo are trademarks or registered trademarks of Continuous Computing
Corporation. Other names and brands may be claimed as the property of others.
This document is confidential and proprietary to Continuous Computing Corporation. No part of this
document may be reproduced, stored, or transmitted in any form by any means without the prior written
permission of Continuous Computing Corporation.
Information furnished herein by Continuous Computing Corporation, is believed to be accurate and
reliable. However, Continuous Computing Corporation assumes no liability for errors that may appear in
this document, or for liability otherwise arising from the application or use of any such information or for
any infringement of patents or other intellectual property rights owned by third parties, which may result
from such application or use. The products, their specifications, and the information appearing in this
document are subject to change without notice.
The information contained in this document is provided “as is” without any express representations on
warranties. In addition, Continuous Computing Corporation disclaims all statutory or implied
representations and warranties, including, without limitations, any warranty of merchantability, fitness for a
particular purpose, or non-infringement of third-party intellectual property rights.
To the extent this document contains information related to software products you have not licensed from
Continuous Computing Corporation, you may only apply or use such information to evaluate the future
licensing of those products from Continuous Computing Corporation. You should determine whether or not
the information contained herein relates to products licensed by you from Continuous Computing
Corporation prior to any application or use.
Contributors: Continuous Computing Development Team, Naveen D’cruz, Kevin MacDowell.
Printed in U.S.A.
Copyright 2011 by Continuous Computing Corporation. All rights reserved.
Preliminary
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two
conditions: (1) this device may not cause harmful interference, and (2) this device must accept
any interference received, including interference that may cause undesired operation.
The user manual or instruction manual for an intentional or unintentional radiator shall caution
the user that changes or modifications not expressly approved by the party responsible for
compliance could void the user's authority to operate the equipment. In cases where the manual is
provided only in a form other than paper, such as on a computer disk or over the Internet, the
information required by this section may be included in the manual in that alternative form,
provided the user can reasonably be expected to have the capability to access information in that
form.
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital
device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference in a residential installation. This equipment generates,
uses and can radiate radio frequency energy and, if not installed and used in accordance with the
instructions, may cause harmful interference to radio communications. However, there is no
guarantee that interference will not occur in a particular installation. If this equipment does cause
harmful interference to radio or television reception, which can be determined by turning the
equipment off and on, the user is encouraged to try to correct the interference by one or more of
the following measures:
-- Reorient or relocate the receiving antenna.
-- Increase the separation between the equipment and receiver.
-- Connect the equipment into an outlet on a circuit different from that to which the receiver is
connected.
-- Consult the dealer or an experienced radio/TV technician for help.
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Contents
1 Introduction 19
1.1 Part Numbers and Options.......................................................................... 20
1.1.1 Part Numbers ................................................................................ 20
1.1.2 Basic Configurations ..................................................................... 21
1.1.3 RTM ............................................................................................... 21
1.1.4 Accessories ................................................................................... 21
1.2 Glossary ...................................................................................................... 22
1.3 Additional Documentation ........................................................................... 25
2 Technical Overview 27
2.1 Main Features ............................................................................................. 28
2.1.1 RMI Processor Subsystem ............................................................ 28
2.1.2 Ethernet Switch Module ................................................................ 28
2.1.3 RTM Interface ................................................................................ 28
2.2 Hardware Overview..................................................................................... 29
2.2.1 Front Panel Ports .......................................................................... 29
2.2.2 Backplane Interface ....................................................................... 29
2.2.3 Connectors .................................................................................... 30
2.2.3.1 Internal Connectors ....................................................... 30
2.2.3.2 External Connectors ..................................................... 30
2.2.3.3 ATCA Connectors ......................................................... 30
2.2.4 Graphical Overview ....................................................................... 31
2.2.5 RMI Processor CPU Subsystem ................................................... 33
2.2.5.1 PSRAM (Flight Recorder Memory) ............................... 34
2.2.6 Fabric and Base Switch Modules .................................................. 36
2.2.7 Optional TCAM Mezzanine ........................................................... 38
2.2.8 RTM interface ................................................................................ 38
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2.2.9 Management Subsystem ............................................................... 40
2.2.10 Front Panel .................................................................................... 40
2.2.10.1 LEDs ............................................................................. 40
2.2.10.2 Handle Switch ............................................................... 42
2.2.10.3 Management Port ......................................................... 42
2.2.10.4 Console Port ................................................................. 42
2.2.10.5 10GBASE-X Port .......................................................... 42
2.2.11 Jumpers ......................................................................................... 43
2.2.11.1 Default Jumper Settings ............................................... 43
2.2.11.2 Force Power On Jumper: J116 ..................................... 44
2.2.11.3 Console Mux Bypass Jumpers: J112, J113 .................. 45
2.2.11.4 Spare Serial Config Jumper: J111 ................................ 45
2.2.11.5 Alt Boot Bank Select Jumpers: J117, J118 ................... 45
2.2.11.6 Reserved Jumpers ........................................................ 46
2.2.12 Power Design ................................................................................ 46
2.2.13 Mean Time Between Failures ........................................................ 46
2.3 Component Integration Overview................................................................ 47
2.3.1 Firmware ....................................................................................... 47
2.3.2 IPMI ............................................................................................... 48
2.3.3 IPMC ............................................................................................. 48
2.3.4 IPMC and XLR Software Domains ................................................ 49
2.3.5 XLR Watchdog Timers .................................................................. 49
2.3.6 XLR Software ................................................................................ 49
2.3.7 XLR and IPMC Messaging ............................................................ 51
2.3.8 Power Domains ............................................................................. 53
2.4 Specifications .............................................................................................. 55
2.4.1 CPU / Memory ............................................................................... 55
2.4.2 Input/Output ................................................................................... 55
2.4.3 Expansion Options ........................................................................ 55
2.4.4 Software ........................................................................................ 55
2.4.5 Mechanical & Environmental Compliance ..................................... 55
2.4.6 Fuses ............................................................................................. 56
2.4.7 Certifications .................................................................................. 56
2.4.7.1 Planned Certifications ................................................... 56
2.4.8 Power Consumption ...................................................................... 56
3 Board Installation 57
3.1 Precautions ................................................................................................. 58
3.1.1 Environmental Requirements ........................................................ 58
3.1.2 Heat Dissipation and Dust Prevention ........................................... 58
3.1.3 Electrostatic Prevention ................................................................. 58
3.1.4 Other Precautions ......................................................................... 59
3.2 Unpacking the PP50 ................................................................................... 60
3.2.1 Compact Flash .............................................................................. 60
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3.2.2 Board Identification ........................................................................ 61
3.2.2.1 Serial Number ............................................................... 61
3.2.2.2 MAC Address ................................................................ 62
3.2.2.3 Part Number ................................................................. 63
3.2.2.4 MAC Address Location ................................................. 63
3.2.2.5 IPMI Manufacturing Info ................................................ 63
3.3 Installing PP50s into the Chassis................................................................ 64
3.3.1 Where to Install the PP50 .............................................................. 64
3.3.2 Board Insertion .............................................................................. 65
3.3.3 Air Blocker Modules in Vacant Slots ............................................. 69
4 Board Access, Bootup, and Shutdown 71
4.1 Serial Console Access ................................................................................ 72
4.1.1 Connect to the Serial Console ....................................................... 72
4.1.2 How to Switch Between Serial Consoles (IPMC, XLRs) ............... 73
4.2 IPMC Telnet Access.................................................................................... 75
4.2.1 Setting eth0 IP Address Manually ................................................. 75
4.2.2 Setting eth0.4094 IP Address Manually ........................................ 75
4.2.3 Setting the DNS Manually ............................................................. 76
4.3 Console Access for Development ............................................................... 77
4.3.1 Development Adapter (Hydra) Cable ............................................ 77
4.4 Board Shutdown.......................................................................................... 79
4.4.1 Using the IPMI Command to Shutdown ........................................ 79
4.4.2 Using the Handle Latch to Shutdown ............................................ 79
4.5 Board Reset ................................................................................................ 80
4.5.1 IPMI Cold Reset Command ........................................................... 80
4.5.2 IPMC (CNode) Reboot .................................................................. 80
5 Using the XLR SDK 81
5.1 Installing RMI Source Code & Development Tools ..................................... 82
5.2 Installing Continuous Computing Software ................................................. 83
5.3 Build the Linux Kernel ................................................................................. 84
5.3.1 Apply Kernel Patches to the RMI SDK Kernel Source .................. 84
5.3.1.1 Example of Using the Patch ......................................... 84
5.3.2 Build the Patched Linux Kernel ..................................................... 84
5.4 Cross Compiling Linux Applications using the RMI SDK Crosscompiler .... 86
6 Booting the XLRs 87
6.1 XLR Boot Methods ...................................................................................... 88
6.1.1 Network Boot ................................................................................. 88
6.1.1.1 Boot Server setup ......................................................... 88
6.1.1.2 PP50 Setup ................................................................... 88
6.1.1.3 Network Boot Example ................................................. 89
6.1.2 XLR Bootloader Commands .......................................................... 90
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6.1.3 Compact Flash Boot ...................................................................... 91
6.1.3.1 Formatting Compact Flash ........................................... 92
6.1.3.2 Booting from Compact Flash ........................................ 92
6.2 Automating XLR boot .................................................................................. 94
6.2.1 Continuous Computing Multiboot .................................................. 94
6.2.1.1 Key Values (KV) ........................................................... 94
6.2.1.2 KV Variable Syntax ....................................................... 95
6.2.1.3 Access to Multiple Boot Method ................................... 96
6.2.1.4 Boot Method Syntax ..................................................... 96
6.2.1.5 Specifying Boot file ....................................................... 97
6.2.1.6 Specifying Boot command ............................................ 97
6.2.1.7 Specifying Boot Arguments .......................................... 98
6.2.1.8 Watchdog Feature ........................................................ 98
6.2.1.9 Initializing Multiboot ...................................................... 99
6.2.1.10 Multiboot Example ...................................................... 101
6.2.2 Autobooting Using Environment Variables .................................. 101
6.3 XLR Utility ................................................................................................. 102
6.3.1 Installing Linux Utilities ................................................................ 102
6.3.1.1 RMI Linux .................................................................... 102
6.3.1.2 WR Linux .................................................................... 102
6.3.2 XLR Commands Available From the BootLoader ....................... 103
6.3.2.1 kv ................................................................................ 103
6.3.2.2 showboot .................................................................... 104
6.3.2.3 rollboot ........................................................................ 104
6.3.3 XLR Commands Available From Linux ....................................... 104
6.3.3.1 NTP client ................................................................... 104
6.3.3.2 kv ................................................................................ 104
6.3.3.3 showboot .................................................................... 104
6.3.3.4 rollboot ........................................................................ 105
6.3.3.5 ipmi_setwd .................................................................. 105
6.3.3.6 fswcmd ........................................................................ 105
6.3.3.7 upgrade ....................................................................... 106
6.3.3.8 bswcmd ....................................................................... 106
6.3.3.9 getcpuid ...................................................................... 106
6.3.3.10 net_config ................................................................... 107
6.3.3.11 ipmi_setwd .................................................................. 107
6.3.3.12 ux_diag ....................................................................... 108
7 Intelligent Platform Management Controller 109
7.1 FRU Support ............................................................................................. 110
7.1.1 FRU State .................................................................................... 110
7.1.2 FRU Hot swap Sensors ............................................................... 111
7.1.3 FRU Data .................................................................................... 111
7.1.3.1 Example of FRU Data using Pigeon Point ShMc ........ 111
7.2 Sensors ..................................................................................................... 114
7.3 Link Descriptors ........................................................................................ 118
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7.3.1 PP50 with 10G Fabric Link Descriptors (shelf manager) ............ 120
7.3.2 PP50 with 4*1G Fabric Link Descriptors (shelf manager) ........... 120
7.4 Key Value (KV) Database ......................................................................... 122
7.4.1 KV Keys ....................................................................................... 122
7.4.2 To List All Key Value Entries ....................................................... 132
7.5 IPMI and PICMG Commands.................................................................... 134
7.5.1 IPMI Device Global Commands .................................................. 135
7.5.2 BMC Watchdog Timer Commands .............................................. 135
7.5.3 Chassis Device Commands ........................................................ 135
7.5.4 Event Commands ........................................................................ 136
7.5.5 Sensor Device Commands .......................................................... 136
7.5.6 FRU Device Commands .............................................................. 138
7.5.7 SDR Device Commands ............................................................. 138
7.5.8 SEL Device Commands .............................................................. 138
7.5.9 ATCA (PICMG 3.0) Commands .................................................. 139
7.5.9.1 FRU Control Command .............................................. 140
7.5.10 OEM API Commands .................................................................. 141
7.5.10.1 Get Payload CPU-Reset ............................................. 141
7.5.10.2 Set Payload CPU-Reset ............................................. 143
7.5.10.3 Get Payload Active Flash Bank .................................. 143
7.5.10.4 Set Payload Active Flash Bank ................................... 144
7.5.10.5 Get Self Payload ID .................................................... 145
7.5.10.6 Get Payload ID for Watchdog Commands .................. 146
7.5.10.7 Set Payload ID for Watchdog Commands .................. 148
7.5.10.8 Get IPMC Key N ......................................................... 149
7.5.10.9 Get IPMC Key-Value .................................................. 150
7.5.10.10 Set IPMC Key-Value ................................................... 151
7.5.10.11 Get IPMC Key-Value Extended .................................. 153
7.5.10.12 Set IPMC Key-Value Extended ................................... 154
7.5.10.13 Sensor Thresholds and Hysteresis Overview ............. 155
7.5.11 IPMI Command Completion Codes ............................................. 158
7.6 Error Logging ............................................................................................ 160
7.7 Behavior of IPMI Resets ........................................................................... 161
7.7.1 IPMI Cold Reset .......................................................................... 161
7.7.2 IPMI Watchdog Reset ................................................................. 161
7.7.2.1 Linux Application Level ............................................... 161
7.7.2.2 Hardware Level ........................................................... 161
7.7.3 IPMI Firmware Upgrade Reset .................................................... 162
7.8 IPMC Command Line Interface................................................................. 163
7.8.1 bmc_watchdog ............................................................................ 164
7.8.2 commit ......................................................................................... 164
7.8.3 debuglevel ................................................................................... 165
7.8.4 getactivebank .............................................................................. 165
7.8.5 getresetstatus .............................................................................. 166
7.8.6 help .............................................................................................. 166
7.8.7 kv ................................................................................................. 167
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7.8.8 listdev .......................................................................................... 168
7.8.9 listfwdev ....................................................................................... 168
7.8.10 listpay .......................................................................................... 168
7.8.11 localaddress ................................................................................ 169
7.8.12 quit ............................................................................................... 169
7.8.13 resetdev ....................................................................................... 169
7.8.14 restore ......................................................................................... 169
7.8.15 sel ................................................................................................ 170
7.8.16 sendcmd ...................................................................................... 170
7.8.17 setactivebank .............................................................................. 171
7.8.18 setresetstatus .............................................................................. 171
7.8.19 version ......................................................................................... 171
8 Network Configuration 173
8.1 Fabric Switch Models ................................................................................ 175
8.2 Fabric Switch Management....................................................................... 176
8.2.1 Managing the Fabric Switch with fswcmd ................................... 176
8.2.1.1 autopause ................................................................... 177
8.2.1.2 reload .......................................................................... 177
8.2.1.3 show stats ................................................................... 178
8.2.1.4 clear ............................................................................ 178
8.2.1.5 route ............................................................................ 178
8.2.1.6 set port ........................................................................ 178
8.2.1.7 enable/disable port ..................................................... 179
8.2.1.8 enable/disable port e-keying ....................................... 179
8.2.1.9 enable/disable ingress vlan ........................................ 180
8.2.1.10 enable/disable accept untagged port .......................... 180
8.2.1.11 set port default ............................................................ 180
8.2.1.12 add vlan ...................................................................... 180
8.2.1.13 del vlan ....................................................................... 181
8.2.1.14 show ........................................................................... 181
8.2.1.15 SFP Commands ......................................................... 181
8.2.1.16 show Commands ........................................................ 181
8.2.1.17 cfgreg .......................................................................... 182
8.2.1.18 dump ........................................................................... 182
8.2.1.19 show version ............................................................... 182
8.2.1.20 dump ........................................................................... 182
8.2.1.21 enable | disable mac-learning ..................................... 182
8.2.1.22 enable | disable flooding broadcast ............................ 182
8.2.1.23 high and low watermark range .................................... 183
8.2.1.24 enable | disable protocol-traps .................................... 183
8.2.1.25 show link ..................................................................... 183
8.2.1.26 MAC aging .................................................................. 184
8.2.2 fswcmd Start Up File ................................................................... 184
8.2.3 FIBM Mode .................................................................................. 185
8.2.3.1 Enabling FIBM Mode .................................................. 186
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8.3 Base Switch Management and Port Connectivity ..................................... 187
8.3.1 Default Behavior .......................................................................... 187
8.3.1.1 Broadcom Management Tag (BMT) ........................... 188
8.3.1.2 Register Initialization in u-boot .................................... 189
8.3.2 Configurable Behavior ................................................................. 191
8.3.3 Alternate bswitch Behavior .......................................................... 194
8.3.4 Configuration ............................................................................... 194
8.3.4.1 num_of_fakes: .......................................................... 194
8.3.4.2 vlan_method .............................................................. 194
8.3.5 Design Overview ......................................................................... 195
8.3.5.1 VLAN mode ............................................................... 196
8.3.5.2 BMT Mode ................................................................. 196
8.3.6 Key Value Database Syntax ........................................................ 197
8.3.7 Examples ..................................................................................... 197
8.3.7.1 VLAN method ............................................................ 197
8.3.7.2 Mask Method ............................................................ 198
8.3.8 Front Mode .................................................................................. 198
8.3.9 RTM Mode ................................................................................... 198
8.4 Ethernet Ports on the RTM ....................................................................... 199
8.5 Fabric and Base Switch Management....................................................... 199
8.6 CNode Base Switch (bswcmd) Command ................................................ 200
8.6.1 Binding bswcmd to the CNODE's IP ........................................... 200
8.6.2 bswcmd Usage Examples ........................................................... 200
8.6.2.1 Common bswcmd Commands .................................... 200
8.6.3 Fabric Switch ............................................................................... 202
8.7 Configuring XLR Network Interfaces using KV.......................................... 203
8.7.1 Configuring XLR Network Interfaces Example ............................ 204
9 Using Wind River Linux on the PP50 205
9.1 Overview ................................................................................................... 206
9.1.1 CCPU/WindRiver Release Compatibility ..................................... 206
9.1.2 Installation Requirements ............................................................ 207
9.1.2.1 For WindRiver PNE LE 2.0 ......................................... 207
9.2 Installing the Template and Patch............................................................. 208
9.2.1 Installation Steps for WindRiver PNE 2.0 .................................... 208
9.3 Building the Kernel and NFS..................................................................... 209
9.3.1 Installing the Boot Kernel and NFS ............................................. 217
9.3.2 Booting the Target Blade ............................................................. 217
9.4 Memory Map Setup................................................................................... 218
9.5 Linux Setup ............................................................................................... 218
9.6 Linux Command Line Options................................................................... 219
9.6.1 linux_cpu_mask=<cpu_mask> .................................................... 219
9.6.2 kseg0_start=<address> ............................................................... 219
9.6.3 kseg0_size=<size> ...................................................................... 219
9.6.4 kumem=<size@addr> ................................................................. 220
9.6.4.1 Examples of Using kumen .......................................... 220
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9.6.5 kuseg_start_hi=<hi_address> ..................................................... 221
9.6.6 kuseg_start_lo=<lo_address> ..................................................... 221
9.6.7 kuseg_size_hi=<hi_size> ............................................................ 221
9.6.8 kuseg_size_lo=<lo_size> ............................................................ 221
9.6.9 app_sh_mem_sz=<hex_size> .................................................... 222
9.6.10 shared_core ................................................................................ 222
9.7 Linux Loader Applications ......................................................................... 223
9.7.1 userapp ....................................................................................... 223
9.7.1.1 load ............................................................................. 223
9.7.1.2 stop ............................................................................. 224
9.7.1.3 status .......................................................................... 224
9.7.1.4 showmem ................................................................... 224
9.7.1.5 shmem ........................................................................ 225
9.8 Building an RMIOS application ................................................................. 226
9.8.1 Building KSEG0 applications ....................................................... 226
9.8.2 Stop and Re-load support ........................................................... 226
10 Rear Transition Modules 227
10.1 Standard RTM........................................................................................... 228
10.1.1 Standard RTM Features .............................................................. 228
10.1.2 Specifications and Features ........................................................ 228
10.1.2.1 General ....................................................................... 228
10.1.2.2 Mechanical .................................................................. 228
10.1.2.3 Power .......................................................................... 229
10.1.2.4 Management .............................................................. 229
10.2 COP50 RTM.............................................................................................. 230
10.2.1 COP50 Features ......................................................................... 230
10.2.2 Important COP50 Terms Definitions ........................................... 231
10.2.3 COP50 RTM Overview ................................................................ 232
10.2.3.1 Bypass protection ....................................................... 234
10.2.4 COP50 Specifications and Features ........................................... 234
10.2.4.1 General ....................................................................... 234
10.2.4.2 Mechanical .................................................................. 234
10.2.4.3 Power .......................................................................... 234
10.2.4.4 Management .............................................................. 235
10.2.4.5 Bypass protection ...................................................... 236
10.2.4.6 IPMC Firmware .......................................................... 236
10.2.5 Installation and Usage ................................................................. 236
10.2.5.1 Initial Installation ......................................................... 236
10.2.5.2 PP50 IPMC Bootup and the COP50 ........................... 237
10.2.5.3 RTM Insertion ............................................................. 238
10.2.5.4 Upgrading the COP50 RTM CPLD ............................. 238
10.2.5.5 RTM Removal ............................................................. 239
10.2.5.6 Auto-Arm versus Managed Re-Arming ....................... 239
10.2.5.7 Software Specifications .............................................. 239
10.2.5.8 COP50 Usage Example .............................................. 243
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11 Firmware Upgrades 245
11.1 CPLD Upgrade.......................................................................................... 245
11.1.1 CPLD Upgrade Examples ........................................................... 246
11.2 XLR bootloader Upgrade .......................................................................... 247
11.2.1 Get Image File ............................................................................. 247
11.2.1.1 Upgrade Boot Flash Via Network ............................... 247
11.2.1.2 Get Bootloader Image File from TFTP Server ............ 247
11.2.2 Loading Image Files .................................................................... 247
11.2.2.1 Ping-Pong Upgrade Method ....................................... 248
11.2.2.2 Factory Golden Upgrade Method ............................... 249
11.3 Upgrading the PP50 IPMC........................................................................ 252
11.3.1 Upgrading Versions 2.3.x or Later to a Higher Version ............... 252
11.3.2 Upgrading Versions 2.2.x or Earlier to a Higher Version ............. 253
11.3.3 Showing, Switching, and Rebooting Boot Banks ........................ 255
11.4 Linux Bootloader Upgrade Tool ................................................................ 257
11.4.1 In WR Linux ................................................................................. 257
11.4.2 In RMI Linux ................................................................................ 258
11.5 XLR Fabric Switch Configuration Utility, Installation ................................. 259
12 Diagnostics and Troubleshooting 261
12.1 Overview ................................................................................................... 261
12.2 Running Diagnostic Tests from Raw CLI .................................................. 262
12.2.1 IPMC Raw CLI Diagnostic Commands ....................................... 262
12.2.2 XLR Raw CLI Diagnostic Commands ......................................... 263
12.3 Running Diagnostic Tests using KV Settings............................................ 265
12.3.1 Running IPMC Diagnostic tests with KV settings ........................ 266
12.3.1.1 IPMC U-boot command for short/long POST tests ..... 266
12.3.1.2 IPMC Linux utility for POST/BIST tests ...................... 267
12.3.2 Running XLR Diagnostic Tests with KV settings ......................... 269
12.3.2.1 XLR Commands for Short/Long POST tests .............. 269
12.3.2.2 XLR RMI Linux Utility for POST/BIST Tests ............... 271
12.4 Indicating XLR’s POST/BIST Status Using LEDs ..................................... 275
12.5 Determining Board Build ........................................................................... 276
13 Product Repair and Returns 277
13.1 Customer Support ..................................................................................... 277
13.2 Warranty.................................................................................................... 277
13.2.1 RMA Procedure ........................................................................... 278
13.2.2 Non-Warranty Repairs ................................................................. 278
13.2.3 Shipping ...................................................................................... 278
13.2.4 Expedite Option for Repairs ........................................................ 278
14 Revision History 279
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Figures
Figure 2-1 PP50 Overview Photo .................................................................................... 27
Figure 2-2 Front Panel ..................................................................................................... 29
Figure 2-3 Overall Hardware Block Diagram. .................................................................. 31
Figure 2-4 Base and Fabric Connection Diagram. ........................................................... 32
Figure 2-5 RMI Processor CPU Subsystem .................................................................... 33
Figure 2-6 Switch Module ................................................................................................ 36
Figure 2-7 RTM interface in Chassis ............................................................................... 38
Figure 2-8 RTM Panel ...................................................................................................... 39
Figure 2-9 Front Panel LEDs ........................................................................................... 40
Figure 2-10 IPMC Overview ............................................................................................. 48
Figure 2-11 XLR Software Overview ............................................................................... 49
Figure 2-12 XLR and IPMC Messaging ........................................................................... 51
Figure 2-13 XLR and IPMC Boot Messaging ................................................................... 51
Figure 2-14 XLR and IPMC Telnet Messaging ................................................................ 52
Figure 2-15 XLR and IPMC IPMI Messaging ................................................................... 52
Figure 2-16 Virtual Switches ............................................................................................ 53
Figure 2-17 Power Domains, Startup ............................................................................... 54
Figure 3-1 ESD Wrist Strap ............................................................................................. 59
Figure 3-2 PP50 Unpacking ............................................................................................. 60
Figure 3-3 Serial Number Location .................................................................................. 61
Figure 3-4 Part Number Location ..................................................................................... 63
Figure 3-5 MAC Address Location ................................................................................... 63
Figure 3-6 5U Chassis Slots ............................................................................................ 64
Figure 3-7 12U Chassis Slots .......................................................................................... 64
Figure 3-8 Latch Handle .................................................................................................. 65
Figure 3-9 Opening the Latch Handle, Lever Release ..................................................... 66
Figure 3-10 Opened Latch Handle ................................................................................... 66
Figure 3-11 Installation - Locator Pins ............................................................................. 67
Figure 3-12 Installation - Board Insertion ......................................................................... 68
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Figure 3-13 PP50 Installation - Board Insertion, Latch Closure ....................................... 69
Figure 4-1 Serial Console Cable ...................................................................................... 72
Figure 4-2 Connecting Computer to the Serial Console .................................................. 72
Figure 4-3 Hydra Cable for Multiple Simultaneous Connection ....................................... 77
Figure 4-4 Hydra Cable Jumpers (J111 and J113) .......................................................... 78
Figure 7-1 Get Payload Active Flash Bank Response Data .......................................... 144
Figure 7-2 Set Payload Active Flash Bank Request Data ............................................. 145
Figure 7-3 Set Payload Active Flash Bank Response Data .......................................... 145
Figure 8-1 Networking Components Diagram ............................................................... 174
Figure 8-2 Fulcrum In Band Management (FIBM) ......................................................... 185
Figure 8-3 PP50 Channel A and B Networks ................................................................ 188
Figure 8-4 Selective-mask bswitch Ingress Masks ........................................................ 190
Figure 8-5 BMT Mode eth0 egress ................................................................................ 191
Figure 8-6 BMT Mode eth1 egress ................................................................................ 192
Figure 8-7 BMT Mode eth1 ingress ............................................................................... 192
Figure 8-8 VLAN Mode eth0 egress .............................................................................. 193
Figure 8-9 VLAN Mode eth1 egress .............................................................................. 193
Figure 8-10 sysctl tree ................................................................................................... 195
Figure 9-1 WindRiver PNE LE 2.0 Files for CCPU Release 1.3 .................................... 207
Figure 9-2 Create a New Project ................................................................................... 209
Figure 9-3 Input the Name ............................................................................................. 210
Figure 9-4 Select Board ................................................................................................. 211
Figure 9-5 Static Analysis .............................................................................................. 212
Figure 9-6 Project Name ................................................................................................ 212
Figure 9-7 Linux Kernel Configuration ........................................................................... 213
Figure 9-8 Package Configuration ................................................................................. 214
Figure 9-9 Build WindRiver Linux Kernel ....................................................................... 215
Figure 9-10 Build WindRiver Linux NFS ........................................................................ 216
Figure 10-1 Standard RTM ............................................................................................ 228
Figure 10-2 COP50 RTM ............................................................................................... 230
Figure 10-3 COP50 Front View ..................................................................................... 232
Figure 10-4 RTM-COP50 Block Diagram ...................................................................... 233
Figure 10-5 cop50d daemon’s Internal State Model ...................................................... 240
Figure 11-1 Ping-Pong Upgrade Flow Diagram ............................................................. 249
Figure 11-2 Factory Golden Upgrade Flow Diagram ..................................................... 251
Figure 12-1 Diagnostic Tests Tree ................................................................................ 261
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Tables
Table 1-1 PP50 and Accessory Part Numbers ........................................................ 20
Table 1-2 Terms Used in this Document.................................................................. 22
Table 2-1 RMI XLR Family Configurations............................................................... 33
Table 2-2 Ethernet Switch Operating Modes ........................................................... 37
Table 2-3 Ethernet Switch Port Usage..................................................................... 37
Table 2-4 LED Description....................................................................................... 41
Table 2-5 PP50 Jumper Information ........................................................................ 43
Table 2-6 Console Debug Bypass ........................................................................... 45
Table 2-7 Debug Mode – Triple MUX Modes........................................................... 45
Table 2-8 Reserved Jumpers................................................................................... 46
Table 2-9 PP50 Major Firmware Categories............................................................ 47
Table 2-10 Fuse Specification.................................................................................... 56
Table 3-1 MAC Address Ports ................................................................................. 62
Table 6-1 Network Boot Options.............................................................................. 89
Table 7-1 PP50 Sensor List ................................................................................... 114
Table 7-2 Factory default settings of thresholds and hysteresis............................ 116
Table 7-3 Link Records on PP50 with 10G Fabric ................................................ 118
Table 7-4 Table 7-2: Link Records on PP50 with 4*1G Fabric ............................. 118
Table 7-5 Key Value Database .............................................................................. 122
Table 7-6 IPMI Device Global Commands............................................................. 135
Table 7-7 BMC Watchdog Timer Commands ........................................................ 135
Table 7-8 Chassis Device Commands................................................................... 135
Table 7-9 Event Commands .................................................................................. 136
Table 7-10 Sensor Device Commands .................................................................... 136
Table 7-11 FRU Device Commands ........................................................................ 138
Table 7-12 SDR Device Commands........................................................................ 138
Table 7-13 SEL Device Commands......................................................................... 138
Table 7-14 AdvancedTCA Commands .................................................................... 139
Table 7-15 OEM Request and Response CodeBytes.............................................. 141
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Table 7-16 Get Payload CPU-Reset Request Data................................................. 141
Table 7-17 Get Payload CPU-Reset Response Data .............................................. 142
Table 7-18 Set Payload CPU-Reset Request Data. ................................................ 143
Table 7-19 Set Payload CPU-Reset Response Data .............................................. 143
Table 7-20 Get Payload Active Flash Bank Request Data ...................................... 144
Table 7-21 Get Self Payload ID Request Data ........................................................ 146
Table 7-22 Get Self Payload ID Response Data ..................................................... 146
Table 7-23 Get Payload ID for Watchdog Commands Request Data...................... 147
Table 7-24 Get Payload ID for Watchdog Commands Response Data................... 147
Table 7-25 Set Payload ID for Watchdog Commands Request Data...................... 148
Table 7-26 Set Payload ID for Watchdog Commands Response Data ................... 148
Table 7-27 Get IPMC Key N Request Data ............................................................. 149
Table 7-28 Get IPMC Key N Response Data .......................................................... 149
Table 7-29 Get IPMC Key-Value Request Data ...................................................... 150
Table 7-30 Get IPMC Key-Value Response Data.................................................... 150
Table 7-31 Set IPMC Key-Value Request Data....................................................... 151
Table 7-32 Set IPMC Key-Value Response Data .................................................... 152
Table 7-33 Get IPMC Key-Value Extended Request Data ...................................... 153
Table 7-34 Get IPMC Key-Value Extended Response Data ................................... 153
Table 7-35 Set IPMC Key-Value Extended Request Data....................................... 154
Table 7-36 Set IPMC Key-Value Extended Response Data.................................... 155
Table 7-37 Command: 50h Sub-command: 23h Request data ............................ 156
Table 7-38 Command: 50h Sub-command: 23h Response data............................. 156
Table 7-39 Command: 50h Sub-command: 24h Request data ............................... 157
Table 7-40 Command: 50h Sub-command: 24h Response data............................. 157
Table 7-41 Command: 50h Sub-command: 25h Request data ............................... 157
Table 7-1 IPMI Command Completion Codes ....................................................... 158
Table 7-42 Command: 50h Sub-command: 25h Response data............................. 158
Table 8-1 Virtual Broadcast Domains .................................................................... 187
Table 8-2 VLAN assignment to ingress packets.................................................... 189
Table 8-3 Selective-mask bswitch Ingress Masks ................................................. 189
Table 8-4 cnswmode Values.................................................................................. 194
Table 8-5 BMT mode Flood Ports.......................................................................... 196
Table 8-6 BMT mode Flood Ports.......................................................................... 196
Table 8-7 XLR Ethernet ports and their corresponding key values ....................... 203
Table 9-1 CCPU/WindRiver Release Compatibility ............................................... 206
Table 9-2 Boot Target Blade Network Configuration ............................................. 217
Table 12-1 IPMC Raw CLI Diagnostic (Hardware) Tests ........................................ 262
Table 12-2 XLR Raw CLI Diagnostic (Hardware) Tests .......................................... 264
Table 12-3 POST/BIST KV Keys ............................................................................. 265
Table 12-4 xx_bootmode Settings (xx: cn, s0, s1)................................................... 265
Table 12-5 Diagnostic types and test mask string assignment................................ 266
Table 12-6 kv_diag Usage and Options................................................................... 269
Table 12-7 XLR Diagnostic Tests ............................................................................ 272
Table 12-8 Determining Board Build by Revision Number ...................................... 276
Table 14-1 User Manual Revision History ............................................................... 279
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Preliminary
1Introduction
This manual provides instructions for installing and using Continuous Computing’s
FlexPacket PP50 (PP50) high-performance packet processing blade.
The PP50 provides deep-packet inspection capabilities that support advanced con-
tent-aware routing and security functions required by multi-service IP networks.
The blade is for next-generation infrastructure applications, including IPTV, radio
network controllers (RNC), security gateways, session border controllers, WiMAX
base station aggregation, and wireless xGSNs.
The PP50 includes one or two discrete multi-core MIPS64 packet processors. Each
processor provides 8 multi-threaded cores and contains a built-in security coproces-
sor capable of handling up to 10Gbps of bulk encryption/decryption (20Gbps per
blade).
Each processor with up to 8Gb of memory (16Gb per blade), as well as access to a
TCAM and content-based processors via mezzanines. TCAM is especially important
for very high performance IPv6 routing platforms. For a list of orderable configura-
tions, accessories and their part numbers please see Section1.1.4, "Accessories" for
more information.
The PP50 interconnects the processors, I/O, and backplane fabrics using a non-
blocking 10 Gigabit Ethernet (10GbE) switch. Each XLR processor has two 10GbE
ports to the switch, providing full duplex 10GbE capabilities. External I/O is sup-
ported over a dual redundant 10GbE backplane fabric (PICMG 3.1.9). Direct
connection to 10GbE and 1GbE ports on the front or rear supports specific cabling
requirements.
When used with Continuous Computing's FlexTCA systems and software, the PP50
provides the fastest path from application development to deployment revenue.
From IPTV to Wireless Core Networks, the PP50 can deploy a wide range of high
performance, scalable telecom applications.
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1.1 Part Numbers and Options
1.1.1 Part Numbers
Part numbers below are the standard Continuous Computing part numbers. Cus-
tomer-specific configurations may be assigned a unique part number.
Table 1-1: PP50 and Accessory Part Numbers
Description Part #
PP50 Boards
PP50, baseboard, dual 1GHz XLR732, four 1-GB 667 MHz memory 0-11126
PP50, baseboard, dual 1GHz XLR732, four 2-GB 667MHz memory 0-11127
Adapter Cable for Development
DB9 to micro-DB9 adapter cable used for development (6 feet). See
Section4.1, "Serial Console Access" for details.
5-02138
PP50 Rear Transition Module
RTM, Ten 1GbE and two 10GbE (SFP/SFP+ cages only, excludes
modules). Only compatible with PP50
0-11024
SFP/SFP+ Modules (for both FM40 and PP50)
Optical 10GbE 850nm SFP+ SR transceiver with “Limiting” receiver
output signal.
5-02491
Optical 1GbE/2GbE, SFP-SX, 850nm, 550m reach, Ethernet/FC 5-02515
Copper SFP, 1000Base-T 5-02673
1.25/1.0625Gbps SFP 1310nm Fp Transceiver, Hot Pluggable 5-02714
10G SFP+ 1310nm Limiting, Hot Pluggable 5-02784
PP50 TCAM Mezzanines
PP50, 36 Mbit TCAM mezzanine 0-11760
PP50, 72 Mbit TCAM mezzanine 0-11761
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1.1.2 Basic Configurations
The PP50 is shipped in the following configurations.
•2G per XLR
4G per XLR
8G per XLR
All use 667MHz DRAM.
1.1.3 RTM
One RTM works for all configurations. It supports two 10GbE and ten 1GbE ports.
It does not include SFP or SFP+ modules as standard.
1.1.4 Accessories
An optional TCAM mezzanine may be factory installed. Two sizes are offered:
•36Mbit
•72Mbit
SFP or SFP+ modules can be ordered as required and they will be pre-integrated
Special serial cables (hydra cables) used for development are also available as a sep-
arate line item. See Section4.3.1, "Development Adapter (Hydra) Cable" for more
information about the cables.
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1.2 Glossary
The following table lists definitions for acronyms used in this document.
Table 1-2: Terms Used in this Document
Term Definition
SHMC A software package for acting as a Shelf Manager
10GbE Ten Gigabit Ethernet
1GbE One Gigabit Ethernet
BSWITCH Base Switch
CNODE The PPC 405+FPGA+FLASH+switch with whatever software
packages are running on it
CPLD Complex Programmable Logic Device
DDR2 Double Data Rate 2 (memory interface)
DHCP Dynamic Host Configuration Protocol
DIMM Dual In-Line Memory Module
FIFO First In First Out
FSWITCH Fabric Switch
I2C, IIC or I2CInter-IC Bus
IMS IP Multimedia Subsystem
IPMB Intelligent Platform Management Bus
IPMC Intelligent Platform Management Controller
IPMI Intelligent Platform Management Interface
JTAG Joint Test Action Group
NSE Network Search Engine
NFS Network File System
QDR Quad Data Rate
RAM Random Access Memory
RMCP Remote Management Control Protocol
ROM Read Only Memory
RTM Rear Transition Module
SCL I2C Bus Serial Clock
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TCA Telecommunications Computing Architecture
TCAM Ternary Content Addressable Memory
TFTP Trivial File Transfer Protocol
UART Universal Asynchronous Receiver Transmitter
VFAT Linux file system that is compatible with Windows FAT
XLR RMI’s multi-core CPU
Table 1-2: Terms Used in this Document
Term Definition
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Notations
This table displays the notations used in this document:
Command line input and output, and code is indicated by Courier New type and a
blue background as shown below.
Also note this document uses PDF page numbering compared to traditional number
schemes.
Notation Explanation Examples
Arial Titles 1.1 Title
Book Antiqua Body text This is body text.
Bold Highlights information Loose coupling, tight coupling,
upper layer interface
Italics Document names,
emphasis
FlexPacket ATCA PP50 Packet
Processor
This must be installed.
PP50-1 $ iobus
IOBus Devices:
BaseAddr Size(KB) ChipSel Device
=============================================================================
0xbc000000 16384 0 cfiflash_0
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1.3 Additional Documentation
This manual assumes you are familiar with the following documentation from RMI.
RMI SDK Software Developer's Guide (referred to as “the RMI SDK Guide” in
this document)
XLR Processor Family Programming Reference Manual
TCAM User Manual (PN CC07478)
This document does not cover topics discussed in the above documents unless the
information is different for the PP50 platform.
You may also find it necessary to reference the MIPS 64 Architecture manuals, avail-
able for download from www.mips.org.
Finally, this manual assumes basic familiarity with setting up DHCP, TFTP, and
NFS servers, building Linux kernels, installing RPMs and tarballs, and using cross-
compile tool chains.
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Preliminary
2Technical Overview
This chapter describes PP50 main features and gives an overview of the hardware
and software.
Figure 2-1: PP50 Overview Photo
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2.1 Main Features
The PP50’s major subsystems are described in this section.
2.1.1 RMI Processor Subsystem
The RMI processor subsystem includes dual RMI XLR7xx BGA1605 CPU sites; a
PP50 can support any CPU in any of those families with the proper assembly
changes. See Section2.2.5, "RMI Processor CPU Subsystem" for processor subsys-
tem details.
The RMI XLR processors support up to eight MIPS 64 bit RISC cores, each having 4
individual execution threads for a total of 32 execution threads.
See Table 2-1 "RMI XLR Family Configurations" for a reduced feature parts as list
for this processor family.
The PP50 supports reduced configurations based on these parts, but the default con-
figuration is two XLR732s fully populated devices.
2.1.2 Ethernet Switch Module
FM2112/FM3112 (Fulcrum Microelectronics) Ethernet switch module, described in
detail in Section2.2.6, "Fabric and Base Switch Modules". The onboard fabric
Ethernet and base Ethernet switches facilitate connectivity. The fabric switch is a
layer 2 device that provides 10GbE connectivity for the CPUs as well as multiple
1GbE data paths. The base switch facilitates communication between the two XLR
CPUs, IPMC controller and two base interfaces.
2.1.3 RTM Interface
The PP50 supports a rear transition module (RTM) that includes a protected power
supply, a management interface to the IPMC, ten 1GbE interfaces and two 10GbE
interfaces.
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2.2 Hardware Overview
2.2.1 Front Panel Ports
10GE.1: SFP+ port (IEEE 802.3 10GBASE-X)
10GE.2: SFP+ port (IEEE 802.3 10GBASE-X)
CPU.1: RJ45 Connector to XLR 0
CPU.2: RJ45 Connector to XLR 1
See Section2.2.10.1, "LEDs"for a description the LED indicators.
Figure 2-2: Front Panel
2.2.2 Backplane Interface
The PP50 is designed as a node board in an ATCA system. Its backplane interface is
compatible with the PICMG3.0 R2.0 specification.
OOS
IS
ATTN
H/S
LNK and ACT
LEDs Ports
10G 1
10G 2
CPU1
CPU2
CONSOLE
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2.2.3 Connectors
2.2.3.1 Internal Connectors
J15 - XLR CPU 2 Memory Channel AB Mini-DIMM Connector
J17 - XLR CPU 2 Memory Channel CD Mini-DIMM Connector
J18 - XLR CPU 1 Memory Channel AB Mini-DIMM Connector
J21 - XLR CPU 1 Memory Channel CD Mini-DIMM Connector
J52 - XLR CPU 2 CF card connector
J53 - XLR CPU 1 CF card connector
J54 - Extended JTAG connector from JTAG CPLD
J56 - JTAG connector for JTAG CPLD
J100 - Internal Mezzanine card connector
J101 - Internal Mezzanine card connector
J102 - JTAG connector for XLR CPU 1
J103 - JTAG connector for XLR CPU 2
J110 - JTAG connector for IPMC
2.2.3.2 External Connectors
J11 - Micro-DB9 Console Port
J104 - RJ45 Connector for XLR Module 1 (XLR0)
J105 - RJ45 Connector for XLR Module 2 (XLR1)
J109 - Two 10G SFP plus Ports connector
2.2.3.3 ATCA Connectors
P10 - ATCA Zone 1 Power Connector
J20 / J23 - ATCA Zone 2 connectors
J26 / J27 - ATCA Zone 3 connectors to RTM
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2.2.4 Graphical Overview
The following diagram provides a graphical overview the PP50’s hardware. The
zoom tool in your viewer may be used to magnify sections of interest.
Figure 2-3: Overall Hardware Block Diagram.
CF Flash
PSRAM
XLR732
)
DDRII DIMM
Four
GE MAC
Two 72bit
DRAM
interface
Two
10GE MAC
Local BUS
PCI- X BUS
Boot
Flash
SRAM /
LA-1
HT BUS
CF Flash
PSRAM
XLR732
DDRII DIMM
Four
GE MAC
Two 72bit
DRAM
interface L ocal BUS
Boot
Flash
SRAM /
LA-1
Two
10GE MAC
FM 2112
Core Switch
P1
P2
P24
Host Interface
P9
P4
P6
P3
P8
P5
P7 P13
P11
P15
P21
P19
P23
P22
P20
P18
P17
P10
P16
P14
P12
RGMII
TCAM or QDRII
Mezzanine
HT Co- processor
Mezzanine
LA-1
LA-1
HT 8bit
PM8380
MUX
SPF+
Module
PM8380
MUX
XUAI
XUAI
MUX
or Resistor
RESISTOR
XUAI or
1000 BASE- X
XUAI or
1000 BASE-X
1000BASE-X
1000BASE-X
SPF+
Module
SFI
SFI
XUAI
XUAI
RTM
2x10GE
10 x 1GE
Fabric
10GE
(or 4 x GE)
10GE
(or 4 x GE)
Channel 2
Channel1
BCM5389
Base Switch
P
P
P
P
P
P
P
P
VSC7280
Dual
XGMII-XAUI PHY
XGMII
VSC728 0
Dual
XGMII-XAUI PHY
XGMII
XUAI
XUAI
XUAI
XUAI
XUAI
XUAI
Base
Channel 1
Channel 2
BCM5482
1000 BASE-T
RJ45
RJ45
1000 BASE-T
1000 BASE-T
1000 BASE-X
1000 BASE-X
MII
I2C MDIO
I2C
MDIO
From IPMC
From IPMC
BCM5482
Dual PHY
BCM5482
Dual PHY
RGMII
BCM5482
Dual PHY
BCM5482
Dual PHY
AEL2005
BCM8706
16bit bus
405EZ
IPMC
Managed
by IPMC
IPMB A
IPMB B
FPGA
CRAM
FW2112
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The diagram below shows connections between the PP50’s Base and Fabric
components.
Figure 2-4: Base and Fabric Connection Diagram.
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2.2.5 RMI Processor CPU Subsystem
Figure 2-5: RMI Processor CPU Subsystem
The PP50 uses two XLR7xx CPU sites. They are identical, except that the XLR at site
1 can access the co-processor mezzanine through the bus. The features of the CPU
subsystems are described below and shown in Figure 2-5 "RMI Processor CPU
Subsystem".
RMI XLR7xx BGA1605 CPU sites; the PP50 can support any CPU in any of
those families with the proper assembly changes. They include the following
XLR Family of CPUs:
Two 244 pin DDR2 Mini-DIMM sockets supporting standard 1.8V DDR2 Mini-
DIMMs
- One DIMM on memory channel A/B
- One DIMM on memory channel C/D
- Up to 800MHz DDR2 data rates
-Up to 4GB for each DIMM
Table 2-1: RMI XLR Family Configurations
Part x32
XLR7xx 8 Cores, 32threads four 1GbE; two 10GbE
C ompact
Flash
CORE5
THREAD 17
THREAD 18
THREAD 19
THREAD 20
ICache
DCache
CORE6
THREAD 21
THREAD 22
THREAD 23
THREAD 24
ICache
DCache
CORE7
THREAD 25
THREAD 26
THREAD 27
THREAD 28
ICache
DCache
CORE8
THREAD 29
THREAD 30
THREAD 31
THREAD 32
ICache
DCache
To TCAM
Mezzanine DDR2 DIMMDDR2 DIMM
RGMII A
RGMII B
RGMII C
RGMII D
GE MAC
GE MAC
GE MAC
GE MAC
SRAM /
LA-1 MEM AB MEM CD
10 GE
MAC
10 GE
MAC
XGMII A XGMII B
Local
BUS
PCI-X
BUS
UART 1
UART 2
HT BUS
Boot
Flash
Console Serial Port
Command Serial Port
CPU sub- system
To Co- Processor
Mezzanine
VSC7280
Dual XGMII- XAUI
XAUI A XAUI B
I2C
CORE1
THREAD 1
THREAD 2
THREAD 3
THREAD 4
ICache
DCache
CORE2
THREAD 5
THREAD 6
THREAD 7
THREAD 8
ICache
DCache
CORE3
THREAD 9
THREAD 10
THREAD 11
THREAD 12
ICache
DCache
CORE4
THREAD 13
THREAD 14
THREAD 15
THREAD 16
ICache
DCache
RAZA XLR
8bit
8bit
PSRAM
10/ 100/
1000 base-T
1000BASE-X
1000BASE-X
1000BASE-X
To Front
Panel
To the other
CPU module
To Base
Switch
To Core Switch To Core Switch
To Base
Switch
C ontrol
CPLD
(XLR1 Only)
BCM5482
Dual PHY
BCM5482
Dual PHY
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•LA-1 Interface
- Connected to a mezzanine for TCAM add on options
Four RGMII Gigabit Ethernet interfaces
- One interface is routed to the front panel as the management port
- Two interfaces are routed to the base switch
- One interface to the other XLR through serial interface
Two XGMII 10 Gigabit Ethernet interfaces routed to the Fabric Ethernet switch
Local Bus / Peripheral Interface
- 8/16/32 bit devices, 66MHz
- Two 32M bytes FLASH for boot firmware
- CompactFLASH socket for additional storage
-Two 8MB PSRAM
- Control Complex Programmable Logic Devices (CPLD)
•Two UART Ports
- Port 1 connected to CNODE for FlexConsole
- Port 2 connected to CNODE as a command channel
Two I2C Ports
- Port 1 connected to two Mini-DIMM sockets for SPD
- Port 2 connected to a serial EEPROM
2.2.5.1 PSRAM (Flight Recorder Memory)
Each XLR subsystem on the PP50 includes PSRAM (pseudo-static DRAM). I is
sometimes called flight recorder memory because it is unique in that it is not cleared
or initialized during board resets/reboots, so it can be used to preserve critical state
or logs across such events.
After a power cycle, the contents of the PSRAM are undefined. It is recommended
that a checksum, CRC, or some other data integrity check be used on the data in the
PSRAM to ensure that random powerup contents are not interpreted as valid data.
Typical uses for the PSRAM are to store routing tables, call routing information,
transaction checkpoints, or log files. Having these tables available in memory can
enable much faster application startup after a board reset or watchdog timeout.
Because the PSRAM is separate from main memory, neither the bootloader nor the
Linux kernel will disturb its contents. Note, that the bootloader PSRAM diagnostic
copies the contents to a safe area before testing the PSRAM, then copies the data
back in.
To access the PSRAM from RMIOS, you can simply configure a pointer to point to
the PSRAM base address and access it directly.
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To access the PSRAM from user level in Linux, use the mmap system call as shown
in the following code segment.
1. The start physical address and size of PSRAM on per XLR
Note, for PSRAM, the start address is 0x19000000, the size is 16384KB.
2. Call system API "mmap" to transform physical address to virtual address. For
example:
3. Then you can access PSRAM as same as accessing system memory.
PP50-1 $ iobus
IOBus Devices:
BaseAddr Size(KB) ChipSel Device
=============================================================================
0xbc000000 16384 0 cfiflash_0
0xb8000000 16384 3 cfiflash_1
0x19000000 16384 4 psram
0x1d000000 8192 6 pcmcia
0x1d840000 64 1 cpld
volatile u16 *psram_mmap(u32 addr, u32 size)
{
int fd=-1;
volatile u16 *mAddr=NULL;
if (0 > (fd = open("/dev/mem", O_RDWR|O_SYNC)))
{
if(debug)
{
printf("Open /dev/mem error!\n");
}
return NULL;
}
if (MAP_FAILED == (mAddr = mmap(NULL, size, PROT_READ|PROT_WRITE, MAP_SHARED,
fd, addr)))
{
if(debug)
{
printf("mmap /dev/mem error!\n");
}
close(fd);
return NULL;
}
close(fd);
return mAddr;
}
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Preliminary
2.2.6 Fabric and Base Switch Modules
Figure 2-6: Switch Module
The Ethernet data path is facilitated by a Fulcrum FM2112/FM3112 base and fabric
Ethernet switches. The FM2112/FM3112 contains eight 10GbE (4-lane) interfaces
and sixteen 1GbE (1-lane) interfaces. Any of the interfaces can be operated at two
speeds from two clocks, and the 4-lane ports can be operated as a single lane. The
clock input assignments for the Ethernet chip are:
REFCLK_A (1-4) is 312.5MHz for 10GbE operation
REFCLK_B (1-4) is 125MHz for 1GbE operation
FM2112
Core Switch
P1
P2
P24
Host Interface
P9
P4
P6
P3 P8
P5 P7
P13
P11 P15
P21 P19
P23
P22
P20
P18
P17
P10
P16
P14
P12
To IPMC
PM8380
MUX
XAUI
To RTM PM8380
MUX
XAUI
To RTM
To RAZA 1
To RAZA 1
To RAZA 2
To RAZA 2
XAUI XAUI XAUI
PHY PHY
SPF+
Module SPF+
Module
SFI SFI
XAUI or
1000BASE-X XAUI or
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
1000BASE-X
10 x 1 GE to RTM
MUX
MUX
10GE
(or 4 x 1GE)
10GE
(or 4 x 1GE)
To Fabric
Channel 2
To Fabri
Channel
1
XAUI
XAUI
XAUI
A
UI
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Possible operating modes for the switch are listed in Table 2-2 "Ethernet Switch
Operating Modes".
The fabric interface to the AdvancedTCA backplane can be configured for 10GbE or
four 1GbE operation. In 10GbE operation, Ports 7 and 5 are wired to all 4 ports in
channels 1 and 2. In four 1GbE operation, Ports 7 and 5 are put in 1GbE mode and
make up port [a] of the fabric interface. Switch ports [15 19 13] make up ports [b c d]
for channel 1, and likewise switch ports [21 11 9] make up ports [b c d] for Fabric
channel 2. The current allocation of the Fabric Ethernet ports are listed inTable 2-3
"Ethernet Switch Port Usage".
Table 2-2: Ethernet Switch Operating Modes
Port Lanes Speed Mode
1 – 8 4 3.125GHz 10GbE
1 – 8 1 3.125GHz 2.5GbE
1 – 8 1 1.25GHz 1GbE
9 – 24 1 1.25GHz 1GbE
Table 2-3: Ethernet Switch Port Usage
Internal Switch
Port Number-
ing
Port
Number-
ing
Port Label-
ing Speed Description
1 10GbE RAZA1
2FP-XG1/
RTM-XG1
10GbE Through a mux to RTM #1 or
Front panel #1
3 10GbE RAZA1 10G-B
4FP-XG2/
RTM-XG2
10GbE Through a mux to RTM #2 or
Front panel #2
5 10GbE Fabric Chan 2
6 10GbE RAZA2 10G-A
7 10GbE Fabric Chan 1
8 10GbE RAZA2 10G-B
9 1GbE Fabric Chan 2 Port D
10 17 RTM #3 1GbE 1GbE port
11 1GbE Fabric Chan 2 Port C
12 18 RTM #4 1GbE 1GbE port
13 1GbE Fabric Chan 1 Port D
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Preliminary
2.2.7 Optional TCAM Mezzanine
The TCAM mezzanine is an optional factory-installed add-on board. For more infor-
mation about the TCAM, see the TCAM User Manual (CC07478).
2.2.8 RTM interface
The RTM is supplied with the PP50's primary 12V. The power budget for the RTM is
2.5A (30W) to support the requirement that the RTM slot support power dissipation
of up to 25W.
The 12V is supplied through a hot swap controller that limits the current and shuts
down the output upon a voltage or current fault. The controller is managed by the
CNODE.
14 19 RTM #5 1GbE 1GbE port
15 1GbE Fabric Chan 1 Port B
16 21 RTM #7 1GbE 1GbE port
17 15 RTM #1 1GbE 1GbE port
Figure 2-7: RTM interface in Chassis
Table 2-3: Ethernet Switch Port Usage
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RTM interfaces provide ten 1GbE ports and two 10GbE ports, supporting the RTM
options of ten SFP 1GbE ports or two 10GbE SFP+ ports. The switch configures the
1GbE ports to RTM in 1000 Base-X mode. These ports are isolated from the RTM
with capacitors.
Figure 2-8: RTM Panel
The CNODE controls activation of the RTM interface. The interface is designed such
that the RTM can be replaced in a running system without damage to the RTM or
the front board.
The PP50 RTM supports hot swap implementation where the RTM is reported as a
separate FRU, and deactivated without deactivating the front board. Only the ser-
vices using the RTM are deactivated. Consult the AdvancedTCA Specification for a
description of the hot swap sensor.
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Preliminary
2.2.9 Management Subsystem
The management subsystem in an AdvancedTCA blade is a mandatory feature,
required to always be on and supporting the system Intelligent Platform Manage-
ment Buses (IPMB). The CNODE, implemented with a PPC405EZ Microcontroller,
is required to support specific IPMI commands mandated by the AdvancedTCA
Specification. Also as required by specification, the CNODE controls the state of the
board (power and reset) and certain operator controls. The CNODE is required to
report, in FRU records, the connectivity of the board and other requirements, such
as its power needs.
Continuous Computing CNODE subsystems also provide additional core function-
ality for the blade. They provide a console MUX so a single RS-232 port on the front
can be used to access all internal devices, as well as additional sensors for better
operation of the board.
2.2.10 Front Panel
2.2.10.1 LEDs
As shown in Figure 2-9 "Front Panel LEDs", the front panel provides three working
status indicator LEDs which are defined in accordance with ATCA standards as Out
of Service (OOS), In Service (IS), and Attention (ATTN).
Figure 2-9: Front Panel LEDs
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Once the board is inserted in a slot and the primary 12V is powered on, a blue hot
swap indicator LED (HS) lights and then turns off when the board is completely
inserted.
Except for the blue LED, none of the remaining three LEDs are controlled by the
CNODE. Rather they are controlled by shelf manager and/or system management
applications by sending the IPMI command Set FRU Led State.
The front panel provides two working status indicator LEDs to each SFP+ port and
each 1GbE management port. One LED indicates link status (LINK) and the other
indicates active status (ACT).
LED functions are summarized below in Table 2-4 "LED Description".
Table 2-4: LED Description
LED Color Description
OOS Red Out Of Service LED. This LED is turned
ON when PP50 is powered ON and turned
OFF, when the FRU enters an M1 state.
After that this LED is supposed to be
controlled by Shelf Manager and/or
system management applications by
sending the IPMI command Set FRU Led
State.
IS Green In Service LED. This LED is turned ON
when PP50 is powered ON and then
turned OFF when FRU enters M1 state.
After that this LED is supposed to be
controlled by Shelf Manager and/or
system management application by
sending IPMI command Set FRU Led
State.
ATTN Yellow An alarm LED controlled by the onboard
shelf manager (if present). This LED is
turned ON when PP50 is powered ON and
then turned OFF when FRU enters M1
state. After that this LED is supposed to be
controlled by Shelf Manager and/or
system management application by
sending IPMI command Set FRU Led
State.
HS Blue HotSwap LED is controlled by IPMC as
per ATCA specification. LED illuminates
when it is safe to remove the board.
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2.2.10.2 Handle Switch
The front panel provides a handle switch to indicate whether the handle has been
pressed. Whenever the press action stops, the handle switch generates a reset indi-
cate to the CNODE.
2.2.10.3 Management Port
Each XLR processor has a RJ45 management port on the front panel.
2.2.10.4 Console Port
PP50 provides a console port to the front panel using a Micro-DB9.
2.2.10.5 10GBASE-X Port
PP50 provides two SFP+ ports at the front panel that comply with IEEE 802.3
10GBASE-X.
10GE1 LINK Green 10GE1 port link indicator, illuminates
when well linked.
10GE1 ACT Green 10GE1 port active indicator, illuminates
when activated
10GE2 LINK Green 10GE2 port link indicator, illuminates
when well linked.
10GE2 ACT Green 10GE2 port active indicator, illuminates
when activated
XLR0 GMAC0
LINK
Green XLR0 gmac0 port link indicator,
illuminates when well linked
XLR0 GMAC0
ACT
Green XLR0 gmac0 port active indicator,
illuminates when activated
XLR1 GMAC0
LINK
Green XLR1 gmac0 port link indicator,
illuminates when well linked
XLR1 GMAC0
ACT
Green XLR1 gmac0 port active indicator,
illuminates when activated
Table 2-4: LED Description
LED Color Description
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2.2.11 Jumpers
2.2.11.1 Default Jumper Settings
By default no jumpers are installed on the PP50.
Table 2-5: PP50 Jumper Information
Jumper Function Default Settings
J28 XLR CPU 2 EEPROM
Write Enable
Not Installed Installed: XLR EEPROM
is write enabled
Not Installed: EEPROM
is write protected
J29 XLR CPU 1 EEPROM
Write Enable
Not Installed
J111 Serial Mode Control 0
(S0)
Not Installed Use the settings for
J111, J112, and J113 below
to configure the serial
mode.
“ 0” means installed,
“1” means not installed
The digits represent
S0, S1, and S2
respectively:
•1 1 1
Default, IPMC UART's
signals goes to front-
panel console pins
0 1 0
Multiplex IPMC UART,
XLR0/XLR1 'console'
ports on front panel
•0 0 1
Multiplex IPMC UART,
XLR0/XLR1 'command'
ports on front panel
•OTHERS: reserved
J112 Serial Mode Control
1(S1)
Not Installed
J113 Serial Mode Control 2
(S2)
Not Installed
J115 Force to reset payload
domain parts
Not Installed Installed: Reset payload
Not Installed: Normal
Operation
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2.2.11.2 Force Power On Jumper: J116
By default this jumper is open and the power is controlled by the CNODE. The pri-
mary 12V power turns on as soon as A_OK or B_OK is true indicating that one of
the 48V feeds is in range.
When the jumper is installed, the secondary power turns on as soon as the primary
12V is in range. This is regardless of the state of any CNODE control. Also, the sec-
ondary fault latch-off feature is disabled so the board will remain powered even if
one of the supplies is not in range. This feature should be used carefully.
J116 Force Payload Power
On
Not Installed Installed: Force blade
power on [ignores IPMC]
Not Installed: Normal
operation - IPMC
controls power on/off
J117 Select XLR0 Boot
Flash Bank
Not Installed Installed: XLR0 boot
from the first bank
Not Installed: XLR0 boot
from the second bank
J118 Select XLR1 Boot
Flash Bank
Not Installed Installed: XLR1 boot
from the first bank
Not Installed: XLR1 boot
from the second bank
J119 Force to reset
CNODE module
Not Installed Installed: Reset CNODE
module parts
Not Installed: Normal
Operation
Table 2-5: PP50 Jumper Information
Jumper Function Default Settings
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2.2.11.3 Console Mux Bypass Jumpers: J112, J113
The following jumpers allow reconfiguration of the front panel console, redirecting
it to one of the CPU ports. This allows console access before the IPMC console MUX
code is available. See Section2.2.11, "Jumpers" for further details.
In triple output mode, two of the payload data leads are multiplexed onto the
modem control pins.
During any of the debug modes, the other UARTs remain connected normally. In
modes 1-4 (single UART bypassed), the modem control signals are driven to active
states. The inputs are ignored.
2.2.11.4 Spare Serial Config Jumper: J111
Since only three serial configurations are needed on this board, J111 is reserved for
future use.
2.2.11.5 Alt Boot Bank Select Jumpers: J117, J118
By default this jumper is open and _BANK_SEL and _SEL(2) for XLR0 and XLR1 are
controlled from the CNODE.
Table 2-6: Console Debug Bypass
S1 (J112) S0 (J113) Front Panel Function
Open Open UART 1 Normal Operation
Open Inst MUX1 Triple Output 1
Inst Open MUX2 Triple Output 2
Inst Inst Does not work Reserved
Table 2-7: Debug Mode – Triple MUX Modes
FP Connector Pin MUX 1 Mode MUX 2 Mode
TxD PPC405 UART1 TxD PPC405 UART1 TxD
RxD PPC405 UART1 RxD PPC405 UART1 RxD
RTS XLR0 Console TxD XLR0 Command TxD
CTS XLR0 Console RxD XLR0 Command RxD
DTR XLR1 Console TxD XLR1 Command TxD
DSR XLR1 Console RxD XLR1 Command RxD
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When installed, BOOT_BANK_SEL or BOOT_BANK_SEL2 are forced HIGH to
select the second bank. The initial state of these lines is LOW until modified by the
CNODE. This allows the second bank to be tested.
2.2.11.6 Reserved Jumpers
2.2.12 Power Design
The PP50 Blade supports ATCA standard dual -48V power inputs. The input power
monitor is set to shut off if any of the following conditions are met or exceeded:
Input current meets or exceeds 5 Amps
Input voltage is less than -38V
Input voltage is greater than -75V
In addition to the -48V input monitoring, a hold-up circuit is provided to give 5ms
of hold-up voltage on the input to system power supplies if the input power is shut
off.
2.2.13 Mean Time Between Failures
The mean time between failure (MTBF) rate for the PP50 front board is 116,347
hours and 1,081,629 hours for the RTM.
Table 2-8: Reserved Jumpers
Jumper Function Default
J30 Reserved for Factory Test Not Installed
J31 Reserved for Factory Test Not Installed
J32 Reserved for Factory Test Not Installed
J33 Reserved for Factory TesT Not Installed
J34 Reserved for Factory Test Not Installed
J35 Reserved for Factory Test Not Installed
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2.3 Component Integration Overview
Depending on the configuration, software for the PP50 may include a variety of
firmware, utilities, development environments, libraries, demonstration apps, and
diagnostics. While customized software applications and protocol stacks can run on
the PP50, they are not part of the core product and are not covered in this document.
2.3.1 Firmware
The PP50 firmware falls into the following categories.
Table 2-9: PP50 Major Firmware Categories
Component Description
IPMI/IPMC
Firmware
Firmware run by the IPMC
XLR
bootloader
The bootloader for the XLR packet processors, with
customizations and extensions by Continuous Computing for
better manageability.
XLR
diagnostics
Extensions to the XLR_Diagnostics to support hardware bring up
and verification.
XLR linux
image
A bootable filesystem based on the one provided by RMI, but
with copies of Continuous Computing demos, diagnostics, and
utilities included.
XLR MIPS
development
environment
The gcc, gdb, libtools, and other utilities for building software
applications that run on the XLR. These tools are generally
available both in x86-hosted cross versions and native on the
XLR linux image.
PP50 Host
Tools
Any tools or utilities intended to run on another host for
configuring or managing the PP50. This includes image
downloaders, etc.
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2.3.2 IPMI
The PP50 uses the industry standard IPMI (Intelligent Peripheral Management
Interface) for communication as mandated by the IPMI standard versions 1.5 and
2.0.
For a list of optional and mandatory IPMI commands supported by the PP50, see
Chapter7, "Intelligent Platform Management Controller" for details.
Per IPMI standards, the PP50 IPMC (Intelligent Peripheral Management Controller)
controls the blade and communicates through the Intelligent Peripheral Manage-
ment Bus (IPMB). The IPMB consists of dual independent buses that connect to all
the system boards, including the shelf manager, through the chassis midplane.
Also connected to the IPMC is the FRU inventory eeprom. That eeprom stores the
PP50’s serial number, part number, manufacture date, MAC address and other criti-
cal identifying information.
When a PP50 is plugged in, the shelf manager can be queried to ensure the correct
blade has been inserted and may be safely powered up. Shutdown is also coordi-
nated between the CNODE and shelf manager when a PP50 is ejected from the
chassis.
2.3.3 IPMC
The IPMC is responsible for important functions, such as turning power on and off
and monitoring the power levels. Specifically, it coordinates with redundant shelf
managers to check if all the power converters are working correctly, voltages are
within their proper thresholds, and temperatures are within safe ranges.
Figure 2-10 diagrams the IPMC topology. At the base of the IPMC is the universal
bootloader (uboot). A Linux kernel runs on top of that. Above the kernel is the
IPMC and base and fabric software management. For the most part, these compo-
nents require no input or customization.
.
Figure 2-10: IPMC Overview
IPMC Base SW
Management
Fabric SW
Management
Linux Kernel
uboot
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2.3.4 IPMC and XLR Software Domains
Each PP50 has two XLR processors and an IPMC, each with its own software
domain. Continuous Computing provides the proprietary code for the IPMCs. Gen-
erally speaking, Continuous Computing customers will have no need to change the
IPMC code.
2.3.5 XLR Watchdog Timers
There are two watchdog timers in the IPMC to monitor each XLR's booting process.
Users can enable the watchdog timers by setting the associated KV values
s0_bootwd and s1_bootwd.
The key value s0_bootwd and s1_bootwd save the XLR boot time (units in seconds).
When the XLR0 OS cannot boot up in the KV s0_bootwd time, the IPMC will reset
XLR0 and log its reset cause and reset time in the KV __s0_rstcause and
__s0_rsttime.
XLR1 also follows the same procedure except that it uses s1_bootwd, __s1_rstcause,
and __s1_rsttime. The KV 'sobootwd' and 's1bootwd' are created by default.
The watchdog timer is particularly useful when using the multiboot, see Sec-
tion6.2.1, "Continuous Computing Multiboot" for details.
2.3.6 XLR Software
The PP50 maximizes the XLR’s two 10GbE network interfaces and processing
power (8 cores, 4 threads each, 32 virtual processors).
Figure 2-11: XLR Software Overview
Linux RMIOS
XLR BootLoader
Package Filename: PP50-xlr-boot-V X.Y.Z.B
Based on RMI bootloader modified for the PP50
RMI
SDK
WRPNE
RMI
Linux 1-N 8-N
Control Data Fastpath
Linux Kernel
CCPU modified
Bootloader
PP50 Specific
Shared
Memory
Interface
Linux Apps
Linux Loader
userapp
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Referring to Figure 2-11, note that the XLR Bootloader’s package uses the naming
convention pp50-xlr-boot-vx.y.z.bin. The package is based on the RMI bootloader,
but has been modified to run on the PP50. Standard unmodified RMI bootloaders
will not run on PP50s. Requests for enhancements to the bootloader should be made
to Continuous Computing. They will be included in qualified releases.
The RMI SDK in this context should only be used as reference code for building
PP50 applications. Unmodified RMI SDK code cannot be directly used in PP50
applications.
A common option is to run, on top of the XLR bootloader, Linux on 1-N cores of the
XLRs and the RMIOS on the other 8-N cores. Operating systems typically are run on
a per core basis. Running them on a per thread basis is possible but not
recommended.
Typically, Linux threads are used to run control software such as call management,
bandwidth allocation and load balancing. RMIOS threads are used to take packets
in and send them out (fastpath, 10 Gb interface). A shared memory interface allows
the Linux threads to communicate with the RMIOS threads. The RMIOS comes from
the RMI SDK with little modification.
The Linux loader application runs on top of the Linux OS. It primarily runs the user-
app command. The userapp command loads and unloads RMIOS programs from
within Linux. Linux running on core one can tell the userapp command to load
RMIOS on the other seven cores and to start.
Note: The Linux OS, bootloader RMIOS, and Linux loader application
being run on a PP50 must all come from the same version of the
SDK.
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2.3.7 XLR and IPMC Messaging
The IPMC communicates with each XLR (sometimes referred to as payload)
through two serial ports. One port is the console channel, the other is the payload
channel.
Figure 2-12: XLR and IPMC Messaging
When the XLRs boot, they send information such as the boot loader prompts and
kernel bootloader strings to the IPMC through the console channel.
Figure 2-13: XLR and IPMC Boot Messaging
Users access the XLRs from this console channel. They telnet through the network to
the IPMC and request connection to XLR0 or XLR1.
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Figure 2-14: XLR and IPMC Telnet Messaging
The payload channel is an IPMI messaging channel. The payload sends IPMI mes-
sages in a serialized format to the IPMC. The IPMC then responds to those
messages. For example, when the XLR wants to strobe its watchdog, it sends a
strobe watchdog message over the payload channel that resets the watchdog timer.
Figure 2-15: XLR and IPMC IPMI Messaging
The PP50’s IPMC also handles several other functions. In this document, the IPMC
plus these other functions are referred to collectively as the CNODE.
An important function of the CNODE is its internal base switching. Because the
ATCA standard only allows two base ports per blade (one to each of the switches in
a chassis), normally only one XLR could have access to the switches at a time. To
overcome this limitation and be consistent with High Availability (HA) principles,
an internal base switch was created on the PP50. This base switch is partitioned to
look like it has two base switches. Each XLR gets a virtual base; consequently, each
XLR has access to both base ports and switches using different GMACs.
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Figure 2-16: Virtual Switches
The CNODE also handles base switch configuration and management. All base
switch connectivity for the PP50 is handled through this switch.
A fabric switch on the PP50 helps avoid a similar constraint on the fabric plane. The
midplane has two 10Gb interfaces. Connecting one interface to each payload would
not allow redundancy for HA. Like the base switch mentioned above, the fabric
switch is partitioned into two virtual switches. Each of those midplane ports goes to
one half of the fabric switch and each of the XLRs has connections to the fabric
switch. Either XLR can get to either half of the fabric switch, and thus can get to
either one of the fabric ports on the midplane.
Both the fabric and base ports connect to hub one and two via the midplane to
access the chassis switches.
2.3.8 Power Domains
The PP50 has two power domains, management and payload. The management
domain powers components of the PP50 that manage the board. The payload
domain powers components associated with the payload. When a board is plugged
in, the management domain is powered up first to ready the blade for operation.
Once the PP50 is ready for full operation, the payload domain is powered up.
The CNODE is on the management power domain. As soon as a PP50 is plugged in,
the management domain is powered up and functioning. The base switch comes up,
then CNODE comes up and starts the IPMC, which queries the shelf manager
whether to start the PP50’s payload power domain. If it gets an OK, the CNODE
starts up the payload domain.
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It is important to note that the fabric switch manager is part of the payload power
domain. Therefore, the fabric switch and XLRs only start after the CNODE signals
the fabric switch manager to power on.
The CNODE signals the fabric switch manager to power on through a daemon,
which runs a script that configures the fabric switch when the payload domain is
activated. The daemon also monitors the fabric switch for proper functioning. For
example, if a link is disconnected and reconnected, the switch responds appropri-
ately and the link continues to work uninterrupted.
Figure 2-17: Power Domains, Startup
The fabric switch may also be custom configured to do things such as change traffic
flow, handle VLANs, and direct certain packets to specific boards or payloads. A
detailed description of fabric switch configuration is provided later in this
document.
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2.4 Specifications
2.4.1 CPU / Memory
1 or 2 RMI XLR732 processors
1GHz multi-core MIPS64, 8 multi-threaded cores (32 virtual cores)
2MB of 8-way set associative L2 cache
2GB, 4GB, or 8GB DDR2 memory per processor
2.4.2 Input/Output
Dual redundant 1GbE base interface
10GbE & 1GbE fabric interfaces (PICMG 3.1.9 - 10GbE and PICMG 3.1.3 - 1GbE)
2 x 10GbE on front panel
RJ45 1GbE front panel management port
2.4.3 Expansion Options
36Mbit or 72Mbit TCAM mezzanine using Netlogic NL71024
Optional 1Gb or 2Gb CompactFlash per processor
OEM Rear Transition Module(s)
- 2 x 10GbE (SFP+)
- 10 x 1GbE (SFP)
2.4.4 Software
Wind River Linux PNE
RMI Operating System (Native C-based OS for fast path)
Network and routing protocols including fast path and slow path functions
- Includes IPv4/6 forwarding, IPSEC, Tunneling, GRE, etc.
2.4.5 Mechanical & Environmental Compliance
Standard 8U single-slot (6 HP) front board and RTM
Operating environment:
- Temperature: 0C to +55C
- Humidity: 5%-80% (non-condensing)
- Vibration: 20Hz-2KHz random multi-axis, 0.5G RMS
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• Storage/transportation environment:
- Temperature: -40C to +85C
- Humidity: 5%-95% (non-condensing)
- Vibration: 20Hz-2KHz random multi-axis, 6G RMS
Assembly components meet UL 94-V0 flammability rating.
2.4.6 Fuses
2.4.7 Certifications
UL 60950-1 Safety of Information Technology Equipment , UL File# E204665.
2.4.7.1 Planned Certifications
IEC/EN 60950-1 Safety of Information Technology Equipment.
FCC Part 15, Subpart B, Class A.
•CE Mark - Meets EMC directive 89/336/EEC.
Designed for Telcordia NEBS GR-63-CORE and GR-1089-CORE Level 3.
RoHS 6 / 6 Compliant.
2.4.8 Power Consumption
When the PP50 is installed with no test software running, the power consumption is
126 watts. Actual power consumption may vary depending on specific application.
Contact your sales rep for detailed power consumption reports.
Table 2-10: Fuse Specification
Location Continuous
Computing
PN
Fuse Character-
istics
FUSE Nomi-
nal Melting
I2t A2 Sec Manufacturer PN
F1, F2 3-01304 Surface Mount
Fuse, 12A, 65V
47.59 Littelfuse
Incorporated
(448012)
F3, F4 3-01302 Surface Mount
Fuse, 15A, 65V
96.10 Littelfuse
Incorporated
(448015)
F5, F6 3-01303 Surface Mount
Fuse, 1A, 125V
0.441 Littelfuse
Incorporated
(448001)
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3Board Installation
This chapter describes the precautions to take when planning an installation, the
conditions which must be met and how to physically install a PP50 into your chassis
in the following sections.
Section3.1, "Precautions"
Section3.2, "Unpacking the PP50"
Section3.3, "Installing PP50s into the Chassis"
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3.1 Precautions
3.1.1 Environmental Requirements
Requirements for the indoor working environment of the equipment:
Temperature: 0oC - 55oC
Relative humidity: 10% - 90% (non-condensing)
Air pressure: 70 kPa - 105 kPa (70 kPa is equal to the air pressure at the altitude
of 3000 m)
3.1.2 Heat Dissipation and Dust Prevention
Always place the board in a clean environment with good ventilation.
The installation site should be far away from radiator or heat sources, and free
of conductive dust, corrosive gases and explosives.
Do not operate your system in dusty environments. This will clog the filters
and lower the cooling efficiency.
3.1.3 Electrostatic Prevention
Static electricity can harm delicate components. To prevent static damage, discharge
static electricity from your body before you touch any components. You can do so
by wearing an antistatic wrist strap.
Caution: Always maintain an ESD-safe environment during the installation,
many components can be destroyed by ESD.
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Remember to wear an antistatic wrist strap during equipment installation and
debugging.
Figure 3-1: ESD Wrist Strap
You can also take the following steps to prevent damage from electrostatic
discharge:
When unpacking a static-sensitive component from its shipping carton, do not
remove the component from the antistatic packing material until you are ready
to install the component. Just before unwrapping the antistatic packaging, be
sure to use a grounding strap to discharge static electricity from your body.
When transporting a sensitive component, first place it in an antistatic container
or packaging.
Handle all sensitive components in a static-safe area. If possible, use antistatic
floor pads and workbench pads.
3.1.4 Other Precautions
Do not block the heat-dissipating vents of the equipment.
Position the equipment in a stable location to avoid strong vibration.
Prevent the equipment from hitting or rubbing other equipment to avoid
surface damage.
Keep your system away from radiators and heat sources.
Do not block air intake or air exhaust vents.
Be sure nothing rests on cables and that the cables are not located where they
may be stepped on or tripped over.
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3.2 Unpacking the PP50
The following photo shows generic PP50 packaging. Your packaging may vary
depending on such variables as specific options chosen and country of delievery.
Figure 3-2: PP50 Unpacking
When unpacking inspect for the following:
Check the number of items against the dispatch list.
If anything is damaged or missing, immediately follow the procedures in
Appendix13, "Product Repair and Returns" or contact our After-Sales Service
Center.
3.2.1 Compact Flash
Do not remove the compact flash cards. They protect the connector pins from dam-
age. If the board is handled without the flash modules, the pins can bend, short, and
the interface can be permanently damaged. Flash cards may be replaced with a dif-
ferent card but not leave the socket empty.
Note: Only personnel experienced with installing telecommunication
equipment should unpack and install these boards.
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3.2.2 Board Identification
3.2.2.1 Serial Number
PP50s may be identified by the board serial number as shown below.
Figure 3-3: Serial Number Location
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3.2.2.2 MAC Address
Each PP50 board is has 16 MAC addresses. All have a 00:02:bb:50 prefix. The lowest-
numbered address is the BASE address and always ends in '0' (hex). Each network
port on the PP50 board is a fixed offset from the BASE address as described below.
Table 3-1: MAC Address Ports
Chip Address eth Port Example
XLR0 BASE+0 eth0 gmac0 00:02:BB:50:2A:80
BASE+1 eth1 gmac1 00:02:BB:50:2A:81
BASE+2 eth2 gmac2 00:02:BB:50:2A:82
BASE+3 eth3 gmac3 00:02:BB:50:2A:83
BASE+4 eth4 10G xgmac0 00:02:BB:50:2A:84
BASE+5 eth5 10G xgmac1 00:02:BB:50:2A:85
IPMC BASE+6 eth0 Base Network 1 00:02:BB:50:2A:86
eth0.4094 Base Network 1 (Alias) 00:02:BB:50:2A:86
BASE+7 Reserved Base Network 2
XLR1 BASE+8 eth0 gmac0 00:02:BB:50:2A:88
BASE+9 eth1 gmac1 00:02:BB:50:2A:89
BASE+A eth2 gmac2 00:02:BB:50:2A:8A
BASE+B eth3 gmac3 00:02:BB:50:2A:8B
BASE+C eth4 10G xgmac0 00:02:BB:50:2A:8C
BASE+D eth5 10G xgmac1 00:02:BB:50:2A:8D
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3.2.2.3 Part Number
The PP50s part number may be found in the location shown below.
3.2.2.4 MAC Address Location
The PP50s MAC address may be found in the location shown below.
3.2.2.5 IPMI Manufacturing Info
The IPMI GetDeviceInfo command specifies each device return a manufacturer and
product ID field. The manufacturer field is three bytes and contains Continuous
Computing’s IANA OUI (7994) in a binary representation (0x001F3A, represented
little-endian in the actual IPMI response as 0x3A, 0x1F, 0x00).
IPMI Manufacturer ID: 0x001F3A (7994)
IPMI Product ID: 0xBB50
Figure 3-4: Part Number Location
Figure 3-5: MAC Address Location
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3.3 Installing PP50s into the Chassis
3.3.1 Where to Install the PP50
The PP50 board can be installed in the node slot of any ATCA compatible chassis. In
Continuous Computing’s 5U and 12U chassis, the PP50 should be installed in the
slots shown in the following figures. For chassis details, please refer to their respec-
tive user manuals.
Figure 3-6: 5U Chassis Slots
Figure 3-7: 12U Chassis Slots
Caution: Air blockers must be installed into all vacant slots to ensure
proper air flow and cooling for the blades, Operation without air
blockers in all empty slots voids the warranty.
Node Slot
Hub Slot
Node Slot
Node Slot
Node Slot
Hub Slot
Slot 1
Slot 2
Slot 3
Slot 4
Slot 5
Slot 6
Node Slot
Node Slot
Node Slot
Node Slot
Hub Slot
Node Slot
Node Slot
Hub Slot
Node Slot
Node Slot
Node Slot
Node Slot
Node Slot
Node Slot
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3.3.2 Board Insertion
1. If present, remove black end caps.
2. Disengage the latch handles as follows.
a. Place the board on an ESD-safe work surface.
Figure 3-8: Latch Handle
b. Grip both the handles with your thumbs and index fingers.
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c. To disengage the locking mechanisms, firmly squeeze the lever portions of
both handles simultaneously, pressing them toward their respective
locator pins. At the same time, pivot the handles out away from the board
as shown below.
Figure 3-9: Opening the Latch Handle, Lever Release
d. Release the handles once they have cleared the slot/catch, and continue to
pivot the handles outward until they are at a 90 degree angle from their
original positions as shown in Figure 3-10.
Figure 3-10: Opened Latch Handle
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3. Carefully begin inserting the board into the desired slot within the chassis.
- Grip the board anywhere on its faceplate during this process, except the
handles.
- Line up the locator pins at both ends of the board to the locator pinhole/
guide on the chassis.
Figure 3-11: Installation - Locator Pins
Caution: Be careful when installing the boards into the chassis. The board
handles can be shaved off when they are inserted through the cutout.
Components can be destroyed because of improper insertion
technique. Do not use force.
Caution: Take care not to bend the connector pins as you remove and install the
board.
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4. Once the locator pins are aligned with the pin holes/guides, slowly press the
board further in.
- Position hands/thumbs as shown to ensure the locator pins remain in
alignment with their holes/guides.
- Do not hold the handles during this insertion process; allow them to move
freely.
- Stop this insertion process once the handles are roughly 45 degrees from
the front of the faceplate.
Figure 3-12: Installation - Board Insertion
Note: Although only the top handle is shown in the illustrations, both
handles must be at a 45 degree angle.
45 C
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5. Engage the handles.
- Squeeze both the top and bottom handles simultaneously, and hold. Then,
loosely and carefully insert the tip of each handle’s catch into the slot. Be
careful not to hit the slot edges to avoid damage to the handle.
- Once you are certain the alignment is correct, while still squeezing the
handles, engage the latches fully. Ensure that the handles are fully engaged
by pressing them in firmly.
Figure 3-13: PP50 Installation - Board Insertion, Latch Closure
- The blue HS (Hot Swap) LED on the face-plate (near lower handle) should
illuminate, and then blink. After a few moments, it should turn off. If this
doesn’t happen, back the handle out slightly then re-engage.
6. Tighten the front panel thumb bolts with a screw driver to secure it to the
chassis. Failure to do so may result in improper board behavior.
3.3.3 Air Blocker Modules in Vacant Slots
Air blockers must be installed into all vacant slots to ensure proper air flow and
cooling for the blade, Operation without air blockers in all empty slots voids the
warranty.
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4Board Access, Bootup, and Shutdown
This chapter describes how to access, boot up, shutdown, and reset the PP50 in the
following sections.
Section4.1, "Serial Console Access"
Section4.2, "IPMC Telnet Access"
Section4.3, "Console Access for Development"
Section4.4, "Board Shutdown"
Section4.5, "Board Reset"
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4.1 Serial Console Access
4.1.1 Connect to the Serial Console
1. Construct or purchase (PN 5-02138, 72 inches) a serial the cable like the one
shown below.
The cable has a 9-pin Micro-D receptacle on one side and a standard DB-9 plug
on the other. Note a null modem cable (DB-9 receptacle on both ends) might
also be required to interface to your workstation, terminal server, laptop or USB
serial port.
Figure 4-1: Serial Console Cable
2. Connect the serial cable from a computer to the PP50’s front panel serial port.
Figure 4-2: Connecting Computer to the Serial Console
3. Run a terminal emulator program on the laptop.
USB-to-Serial Converter
Null
Modem
Micro
DB9
Serial
Connector
USB
Connector
Serial
Connector
Serial cable with Micro-DB9 connector
PP50
PC
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4. Use the following connection settings:
- 115200 baud rate
-No parity
-8 bits
-1 stop bit
- no flow control
5. Boot the PP50. By default the console is the IPMC running Linux.
6. See the next section to toggle between the IPMC and XLRs.
4.1.2 How to Switch Between Serial Consoles (IPMC, XLRs)
Use the following sequences to switch the front panel console port between CPUs:
On the front panel console, use the following sequences to connect to the XLR's
serial console via the IPMC:
In the IPMC, use command "cu" to switch the console to XLR0
In IPMC Linux, use command "cu" to switch the console to XLR1
To disconnect from the XLR serial console, press “~”, and “.”.
Note: During bootup, if the board receives any keystroke signals from the serial
port, boot up will be halted. Incorrect connection settings can cause false
signals so it is critical the parameters above are set correctly.
cu -l /dev/ttyS2a
cu -l /dev/ttyS2b
cu -l /dev/ttyS2c
cu -s 38400 -l /dev/ttyS3 (secondary XLR0 console when running in dual mode Linux/
RMIOS)
cu -l /dev/ttyS4a
cu -l /dev/ttyS4b
cu -l /dev/ttyS4c
cu -s 38400 -l /dev/ttyS5 (secondary XLR1 console when running in dual mode Linux/
RMIOS)
Note: If you connect to the IPMC's console port by telnet or Windows
Hyperterm, the telnet escape character is Ctrl-].
If you use a shell or program that uses “~” as its escape character
(such as SSH or another CU session), then you must type two “~”s
for each “~” that actually needs to get to the IPMC.
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Note: If the hydra mode enable serial mode jumpers are installed, the XLR
console cannot be toggled. To avoid this, please make sure all jumpers on
the board are removed. See Section2.2.11, "Jumpers" for details.
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4.2 IPMC Telnet Access
The IPMC has two network interfaces. One is “eth0” for base channel A and the
other is “eth0.4094” for base channel B. By default eth0's IP address and gateway IP
address are obtained from the DHCP server. Use the ifconfig (interface configura-
tion) to obtain details.
Please see Chapter7, "Intelligent Platform Management Controller" configure eth0
and eth0.4094 via the key-value database.
4.2.1 Setting eth0 IP Address Manually
To manually set eth0's IP Address, please see the example below.
4.2.2 Setting eth0.4094 IP Address Manually
By default, eth0.4094 has no IP address. To configure its IP Address:
root@cnode-pp50:~ ifconfig
eth0 Link encap:Ethernet HWaddr 10:02:BB:50:43:44
inet addr:10.4.1.43 Bcast:10.4.255.255 Mask:255.255.0.0
UP BROADCAST RUNNING MULTICAST MTU:1400 Metric:1
RX packets:2024 errors:0 dropped:0 overruns:0 frame:0
TX packets:2 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:154769 (151.1 KiB) TX bytes:1200 (1.1 KiB)
eth0.4094 Link encap:Ethernet HWaddr 10:02:BB:50:43:44
UP BROADCAST RUNNING MULTICAST MTU:1400 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:0
RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)
lo Link encap:Local Loopback
inet addr:127.0.0.1 Mask:255.0.0.0
UP LOOPBACK RUNNING MTU:16436 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:0
RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)
root@cnode-pp50:~ ifconfig eth0 10.4.1.43 netmask 255.255.0.0
root@cnode-pp50:~ route add default gw 10.4.0.254
root@cnode-pp50:~ ifconfig eth0.4094 192.168.0.2 netmask 255.255.255.0
root@cnode-pp50:~ route add default gw 192.168.0.254
Note: If one interface gets an IP address via DHCP, the other address is
assigned a static IP address/netmask/gateway, then there are two
default routes. When this happens the DHCP route has higher
priority.
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4.2.3 Setting the DNS Manually
Use vi or similar editor to manually edit the DNS configuration file shown below.
root@cnode-pp50:~ vi /etc/resolv.conf
Note: If eth0 or eth0.4094 uses DHCP protocol, it does not update the DNS
configuration. If "dnsdomain" is set to “dhcp” or null, it does not
update the DNS configuration. If “dnsdomain” is set to “disable”, it
will remove the DNS configure file (/etc/resolv.conf). If
“dnsdomain” is valid, but “dns_ns1” and “dns_ns2” are invalid, it
does not update the DNS configuration.
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4.3 Console Access for Development
4.3.1 Development Adapter (Hydra) Cable
To facilitate software development and debugging Continuous Computing created
a special cable which allows simultaneous console access to both XLR CPUs and the
IPMC. It is sometimes referred to as a “hydra” adapter cable and may be special
ordered from Continuous Computing(part number 0-11010). This section describes
how to use it.
This adapter cable performs the null modem function, so a null modem cable is not
used with this cable. However, users may need a straight-through serial extension
cable, with a standard DB-9 plug on one side and a DB-9 receptacle on the other,
depending on their development system configuration.
Figure 4-3: Hydra Cable for Multiple Simultaneous Connection
Note: The PP50s debug-mode jumpers must be installed (J111 and J113) to
use this cable. See Section2.2.11, "Jumpers" for details.
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To Connect the hydra cable:
1. Power down and remove the board if necessary and install jumpers J111 and
J112. See Section2.2.11, "Jumpers" for details.
2. Connect micro db9 to the PP50 console port.
3. Connect hydra cable to end of db9.
4. Connect one end of the hydra cable marked IPMC to either laptop or linux
machine.
5. Open serial console using hyperterminal. Set the baud rate settings as follows:
- 115200 baud rate
-No parity
-8 bits
-1 stop bit
Figure 4-4: Hydra Cable Jumpers (J111 and J113)
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4.4 Board Shutdown
PP50s can be shutdown issuing an IPMI command to deactivate the board or by
opening the front panel handle latch.
During the deactivation of the board, each of the managed FRUs on the board gets
deactivated. You can also deactivate each individual FRU by issuing deactivation
command from the Shelf Manager. For example, on Pigeon Point ShMC this com-
mand is “clia deactivate <ipmb address of board> <fru_id>”. If you deactivate the
master FRU then IPMC also deactivates all of its slave FRUs. On PP50, the Front
board FRU (id 0) is the master FRU.
During a FRU’s deactivation, all the payloads belonging to that FRU are shutdown
gracefully. Please refer to the description of KV key “shutdown_wait” in the Sec-
tion7.4.1, "KV Keys" for the configuration related to graceful payload shutdown
during FRU deactivation.
4.4.1 Using the IPMI Command to Shutdown
You can issue deactivation commands from your chassis’ shelf manager. For exam-
ple, on the Pigeon Point ShMC this command is "clia deactivate board <N>”, where
N is the logical slot number of the board. On deactivating board from shelf man-
ager, the HS (hotswap) blue led will start blinking and then become solid blue after
a while. When it is solid blue you may remove the board.
4.4.2 Using the Handle Latch to Shutdown
Leaving the board in its slot, open the board’s front handle latch out of locked posi-
tion. The blue HS (hot swap) LED will start blinking indicating the board is shutting
down. When the blue LED turns solid blue then board is shutdown and can then be
removed from the chassis slot.
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4.5 Board Reset
The board reset command resets all devices on the board. To reset the complete
board you can issue the IPMI Cold Reset command or reboot the CNode.
4.5.1 IPMI Cold Reset Command
In the handling of IPMI Cold Reset command (NetFn: App (0x06), Command Code:
0x02), IPMC resets complete board. On Pigeon Point ShMC, you can issue “clia
sendcmd <ipmb slave addr of board> 0x06 0x02” to send IPMI Cold Reset com-
mand to the board.
4.5.2 IPMC (CNode) Reboot
Login into the CNode and run the “reboot” command, the board will boot from
either bank 0 or bank 1.
Usually, the board boots from bank 0 or 1. If is a disturbance on the serial console
cable during the power event and reboot, the board will boot from golden bank as a
precautionary measure. The golden bank is a special bank used only for disaster
recovery. It cannot boot into the kernel.
Note: During the board reset via IPMI Cold Reset or rebooting CNode,
payloads are not shutdown gracefully. So before performing IPMI
Cold reset or rebooting CNode, user must deactivate board so that
graceful shutdown of payload takes place.
Note: If a “d” is entered in the serial console during bootup it will boot
from the golden bank image. Because it cannot the kernel a “magic
number” error message number will be output.
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5Using the XLR SDK
To support PP50 software development you will need a build environment, which is
generally a machine running RedHat Linux with the cross-compile tool chain
installed. You will also need a machine acting as the network boot server, which can
be the same machine or an additional one.This process is described in the following
sections.
Section5.1, "Installing RMI Source Code & Development Tools"
Section5.2, "Installing Continuous Computing Software"
Section5.3, "Build the Linux Kernel"
Section5.4, "Cross Compiling Linux Applications using the RMI SDK
Crosscompiler"
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5.1 Installing RMI Source Code & Development Tools
To install the RMI source code and development tools, obtain the RPMs by down-
loading them from Continuous Computing’s support site. Contact your field
support engineer for the specific area and passwords. SDK version 1.6 is supported
currently.
All examples in this manual assume you install the RPMS in their default location
(/opt/rmi/x.x for the vx.x SDK). In addition, some Continuous Computing make-
files rely on a symbolic link from /devel/rmi to /opt/rmi.
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5.2 Installing Continuous Computing Software
The Continuous Computing PP50 support package can be downloaded from Con-
tinuous Computing’s support page.
http://www.ccpu.com
The package contains the following components:
A binary XLR bootloader with enhanced and necessary functionality for the
PP50’s flexible network connectivity.
A pre-built Linux kernel based on RMI's kernel, with Continuous Computing
patches applied.
A patch file that must be applied to RMI's SDK kernel source and build.
A patch file that must be applied to RMI's SDK RMI OS
An application for doing basic management of the PP50's onboard 10G switch.
Binary and source code for a demonstration program that lets the two XLR
processors on the PP50 send 10GB traffic to each other.
Please refer to RMI’s XLR Programmer's Reference for information on application
development and compiling XLR applications.
http://www.netlogicmicro.com
Go to the RMI Developer Support page and create an account to download the
document.
Note: Continuous Computing's bootloader and patches must be used for
proper operation.
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5.3 Build the Linux Kernel
5.3.1 Apply Kernel Patches to the RMI SDK Kernel Source
1. Download the patch from Continuous’ support page at www.ccpu.com.
2. Copy src to your working directory
3. Apply the current patch file
4. Make whatever other changes you want to your working kernel tree or kernel
configuration.
5. Test them thoroughly.
5.3.1.1 Example of Using the Patch
The example below is for reference only.
5.3.2 Build the Patched Linux Kernel
Install the XLR kernel source RPM from Continuous Computing
6. Copy /opt/rmi/x.x/linux/src to a working directory (where x.x is the
version).
7. Apply the Continuous Computing patch file to your RMI Linux kernel source.
8. Set your path with the appropriate cross-compile tool chain. If you wish to
change settings in the configuration, run "make menuconfig."
cp -a /devel/rmi/1.x/linux/src /src-working
cd .../src-working
patch -p1 < pp50-linux-patch-vx.y.zr00.txt
cp -a /opt/rmi/1.x/linux/src src-1.c
cd src-1.x
patch -p1 < /raza/xlr/linux/patch-1.x/pp50-linux-patch.txt
patching file .config
patching file arch/mips/rmi/ptr/setup.c
patching file drivers/net/phoenix_mac.c
patching file drivers/net/phoenix_user_mac.c patching file include/asm-mips/rmi/
sim.h export PATH=/opt/rmi/1.x/mipscross/crosstool/gcc-3.4.3-glibc-2.3.6/
mipsisa32-xlr-linux/bin:$PATH
make menuconfig
### Make sure the options look as expected, then exit and say "yes" to using the
new configuration.
make vmlinux mipsisa32-xlr-linux-strip -o vmlinux-dbgXX vmlinux
### Kernel with debug symbols is now in vmlinux.
### Stripped kernel for netbooting or CompactFlash is now in vmlinux-dbgXX
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9. Run "make vmlinux". This will produce a kernel with full debugging
information.
For booting through the network or CompactFlash, you will need to strip the kernel
using the cross-tool strip utility. For example, use the following script to build the
kernel:
exportPATH=$PATH:/opt/rmi/x.x/mipscross/crosstool/gcc-3.4.3-\
glibc-2.3.6/mipsisa32-xlr-linux/bin
make vmlinux
echo "Stripped kernel is named vmlinux-dbgXX"
mipsisa32-xlr-linux-strip -o vmlinux-dbgXX vmlinux
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5.4 Cross Compiling Linux Applications using the RMI SDK
Crosscompiler
Please refer to section 1.1, Tool Chains of the RMI SDK Manual for details on various
cross compiler options available for RMI Linux. In short, if you want to cross com-
pile a linux application on your development server, add the following line in the
makefile.
CC=/opt/rmi/1.4/mipscross/crosstool/gcc-3.4.3-glibc-2.3.6/mipsisa32-xlr-linux/
bin/mipsisa32-xlr-linux-gcc
It points to gcc cross compiler (example here is for SDK 1.4)
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6Booting the XLRs
XLRs are booted with either Linux or an RMIOS application. Consequently, booting
procedures depend upon whether the RMIOS application or Linux is used. This
chapter summarizes those boot up methods as well as Continuous Computing’s
extension which adds flexibility and automation of to the booting procedure.
If booted with Linux, the root file system can be either in a ramdisk or a NFS server.
This chapter focuses on the boot methods (NFS or compact flash) and how to auto-
mate bootup.
This chapter only summarizes XLR boot steps. For more details please see the RMI’s
SDK documentation available from Continuous Computing or RMI on request.
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6.1 XLR Boot Methods
In PP50s, each of the XLR is booted independently. Essentially, XLR can be booted
via network or compact flash.
6.1.1 Network Boot
This section describes network boot methods.
6.1.1.1 Boot Server setup
Network boot involves setting up servers that will hold the software needed to boot
XLR.
Note that all the servers can be on same or different machine in network.
6.1.1.2 PP50 Setup
In order to access software (kernel, RMIOS application, file system) during boot pro-
cedure the XLR should connect to boot server(s).
Servers Reason
TFTP Needed to ftp either RMIOS application or Linux kernel.
NFS Needed from file system if Linux is booted. If Linux is run
entirely out of ramdisk, this will not be needed.
DHCP If auto configuration of IP address, mask or gateway is
desired.
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Either the PP50 front panel 1GbE, or base network 1GbE can be used for this
purpose.
6.1.1.3 Network Boot Example
To boot from a network port, use the “ifconfig” and “tftpc” bootloader commands.
An example of booting from the network on front panel 1GbE (gmac0) is shown
below. The example illustrates down loading Linux kernel and booting XLR.
Similar commands can be used to boot and run Linux kernels or RMIOS applica-
tions. Please see the RMI SDK guide for more details.
Table 6-1: Network Boot Options
Network Boot Type Recommended Appli-
cation XLR GMAC #
Front Panel 1GbE
port of XLR.
Initial lab
experimentation. Used in
deployment if boot
network needs to be
separate from the ATCA
base and fabric networks
for some reason.
GMAC0.
PP50 front panel 1GbE port for
XLR should be connected to the
network with boot server.
Network Boot from
1GbE ATCA base
network one or two.
Lab experimentation and
deployment.
GMAC2 (base channel A) and
GMAC3 (base channel B). a
a. Install a functioning ATCA switch into hub slot in your ATCA chassis. If GMAC2 is used,
switch should be present in slot that has access to base channel A. Similarly for GMAC3,
switch should have access to base channel B. Switch should be configured and connected
to the network with boot server.
Note: Ignore the initial “tftpc stall” message.
PP50-1 $ ifconfig -i gmac0 -a 172.17.69.5 -n 255.255.0.0 -g 172.17.0.254
ipaddr: 172.17.69.5
netmask: 255.255.0.0
gateway: 172.17.0.254
PP50-1 $ Starting Network interface "gmac0"
PP50-1 $ tftpc -s 172.16.0.168 -f pp50/vmlinux-pp50
Server IP : 172.16.0.168
File : pp50/vmlinux-pp50
PP50-1 $ tftpc stall, check network setup
Bytes downloaded: 9651512
tftpc: download done. size = 9651512 @ address 0x8c2ad9d0
PP50-1 $ elfload
PP50-1 $ userapp hda=noprobe
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6.1.2 XLR Bootloader Commands
Below is a summary of XLR bootloader commands for reference. It is RMI SDK 1.5.5
based.
PP50-1 $ help
-------------------
Available Commands:
-------------------
arp - display current arp table
autoboot - execute autoboot sequence
bk_update - erase & program the backup bootloader
boardrev - print board version number
boot_erase - erase 2MB boot section of selected flash
boot_mode_get - get boot mode
boot_update - erase & program the bootloader
bunzip2 - run bunzip2 on 'bootfile'
checksum - MD5 checksum calculator
clearenv - reset env. variables to default values
cpld_write - configure the register of cpld
cplddump - print cpld reg.values
cpldrev - print board cpld version
cpldump - print cpld reg.values
cpuinfo - prints COP-0, (I/D)-Cache and CPU# info
cpustatus - print summary of active CPUs
diag - do some diagnoses
dinfo - info on detected storage devs/controllers
dload - load file from disk into mem
dls - run 'ls' on selected storage device
elfload - validate elf file and load into mem
enable_debug - currently enables GMAC debug
env - display current env. variables
flerase - erase all or part of onboard flash chip(s)
flinfo - display onboard flash chip(s) details
flprog - program all or part of onboard flash chip(s)
fsinfo - display JFFS2-partition info
gmac_cfg - configure the gmac interface
gmac_dump_phy_regs - list GMAC PHY registers
gmac_phy_write_reg - program selected GMAC PHY registers
gphy - read & write the register of gphy
h - alias for 'help'
help - display this help menu
hist - display previous commands (max. 64)
ifconfig - bringup selected eth interface
iobus - print iodevice-subsytem mappings
kuseg_mem - display available KUSEG mem
kuseg_meminfo - available KUSEG Regions
kv - set key value
listpost - list post items
ls - display 'bootfile' info
memrd - read physical address space
memwr - write to physical address
multiboot - boot from multi device
nmiconf - configure loaded image from the NMI-mapped area
nmiload - load image to NMI mapped area
ping - ping through active eth interface
post_err - list post error codes
print_physmap - display board's phys. memory map
printenv - display current env. variables
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6.1.3 Compact Flash Boot
Each XLR in a PP50 has access to a dedicated Compact Flash (CF). Booting from a
Compact Flash eliminates the need for boot servers. To boot from a CF you must
format it and then store the necessary files (Linux kernel, RMIOS application, file
system etc) needed to boot the XLR.
If you are running Linux, you may include your application on the ramdisk if it is
small, otherwise you can put it in a live file system on the CompactFlash card or use
an NFS root.
The CompactFlash card can range from very small (16MB) to hold just an RMIOS
application image, up to very large (2GB and greater) containing redundant live
Linux file systems.
psb_info - display contents of global 'psb_info' struct
reboot - reboot the board
reg - read & write the register
regrd - display Reg. Values from IOBASE
regwr - change IOBASE Reg. Values
rollboot - switch flash bank and reboot
run - load elf file, call command 'userapp'
saveenv - save env. variables into non-volatile mem
savenv - save env. variables into non-volatile mem
setenv - assign value to env. variable
showboot - show flash bank
stop_vcpu - stop running selected vCPU
tftpc - start tftp client
tlbinfo - identify current, print all 16 TLB info
userapp - launch kseg0 application on XLR0
userapp_mask_cpus - set active-cpu bitmask
userapp_noreset - do not reset msgring0/gmac0 for 'userapp'
userapp_os - launch kuseg application(s)
version - print bootloader version info
xgm - read & write the xgm interface
xgphy - read & write the register of xphy
xlr_reserve_mem - reserve a block of physical memory
PP50-1 $
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6.1.3.1 Formatting Compact Flash
A CF card may use either FAT or EXT2 file system. This section provides one exam-
ple of formatting CF from linux in XLR.
1. Boot Linux in XLR.
2. Zero out the CF to ensure its integrity.
3. Format the CF and mount it.
4. The relevant files can be copied to CF.
6.1.3.2 Booting from Compact Flash
RMI SDK provide details of the boot command used to boot Linux or RMIOS from
Compact Flash. This section summaries the instructions to boot Linux from Com-
pact Flash (CF) card.
1. Copy the Linux kernel file (for example, vmlinux-p2-dbg03) to the CF card.
Root file system, if needed, should also be copied in CF.
2. Insert the CF card into pp50 p2 board and bootup.
3. Get disk and partition information.
According to above, the disk name is pcmcia_1, the partition the number is 1.
ifconfig -i gmac2 -a 192.168.200.200 -g 192.168.70.1 -n 255.255.0.0
tftpc -s 192.168.70.20 -f pp50-linux-kernel-vX.X.Xb00
elfload
userapp ip=192.168.200.200:192.168.70.20:192.168.70.1:255.255.0.0::eth2:off
console=ttyS0,38400
dd if=/dev/zero of=/dev/hda bs=512 count=1
fdisk /dev/hda
<fdisk is interactive so these are entered sequentially>
n, p, 1, enter, enter, p, w
mkfs /dev/hda1
mkdir /cf
mount /dev/hda1 /cf
PP50-0 $ dinfo print
List of IDE disks found:
Disk: pcmcia_1 Controller: pcmcia
=======================================
Model: LEXAR ATA FLASH
Firmware: V1.00 Serial#: 11014182459999090004
Capacity: 983.8 MB = 0.9 GB (2014992 x 512)
Partition Table.
-----------------
1 63 2014929 b
PP50-0 $
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4. List CF card operation commands
5. List the CF card files
6. Load file vmlinux-p2-dbg03 to memory.
If the CF is formatted to FAT run:
If the CF is formatted to ext run:
7. Load the elf file
8. Boot RMI Linux
PP50-1 $ dls
Filesystem Commands
dload <disk> <partition> <file> [bytes] - Load the specified number of [bytes]
from <disk> <partition> <file> to memory.
If [bytes] is omitted, then the value of bytes will be the size of file or 15MB,
whichever is less.
dls <disk> <partition> [directory] - list the files from <disk> <partition> [dir]
PP50-1 $
PP50-1 $ dls pcmcia_1 1
Listing / directory.
0 thisiscompactflash
3139 testcmd.txt
9684280 vmlinux-p2-dbg03
3910938 vmlinux-wr05
4 file(s), 0 dir(s)
PP50-1 $
PP50-1 $ dload pcmcia_1 1 vmlinux-p2-dbg03
PP50-1 $ dload pcmcia_1 1 /vmlinux-p2-dbg03
PP50-1 $ elfload
PP50-1 $userapp hda=noprobe hdb=noprobe
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6.2 Automating XLR boot
Booting the XLR, either from a network or compact flash, requires users to execute a
set of commands from XLR bootloader prompt. This section describes the two meth-
ods of automating execution of those commands: Section6.2.1, "Continuous
Computing Multiboot" and Section6.2.2, "Autobooting Using Environment
Variables".
Following are two methods to automate the execution of boot commands. Continu-
ous Computing multiboot is a more comprehensive feature that ties XLR boot to the
overall management of PP50 board in a chassis.
6.2.1 Continuous Computing Multiboot
Continuous Computing’s Multiboot provides several useful features for booting
XLRs:
Allows specification of multiple boot methods (network with or without
DHCP, compact flash) and their relative preferences.
Allows control of the XLR boot sequence though IPMI. This is important
because it no longer requires access to the XLR bootloader to modify the boot
sequence.
Provides a mechanism to recover from failed boot attempts.
6.2.1.1 Key Values (KV)
Key values are environment variables set in the IPMC to be accessed by the XLR
bootloader. The Multiboot feature is implement by the user setting up the KV vari-
ables needed for XLR boot in IPMC. Every time bootloader starts, it will read
relevant variables and perform required functionality. Following are the list of KV
variable needed for multiboot, following section will detail syntax and semantics for
each on the set.
KV Variable Note
sX_bootXdevX Specific the boot device. Examples include network with
dhcp, network without dhcp, compact flash.
sX_bootXfileX bootfile name. Examples are Linux kernel, rmios
application.
sX_bootXcmd Command to boot image. Examples are “elfload” and
“userapp” to boot Linux image or rmios application.
sX_bootXargsX Arguments to boot command, if any. Example are
“hda=noprobe” for Linux boot.
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6.2.1.2 KV Variable Syntax
The complete name of KV variable in above table is derived by replacing the “X”
with appropriate values as defined here.
CPU name
There are separate KV variable for XLR0 and XLR1. The XLR0 variables start with
s0_* and XLR1 variables with s1_*
Boot method
As explained in next section, users can specify maximum of 4 boot methods to be
used in sequence (if last one failed) to bring up XLR. The second “X” in KV name
represents the boot method. For example, in XLR0 the set of variable that control
first boot method are s0_boot0devX, s0_boot0fileX, s0_boot0cmd, s0_boot0argsX.
Size Limitation
Each of KV variable is a string. The maximum size of string is limited to 32 charac-
ters. Last “X” in the KV variable name is used add more KV variable to represent a
string > 32 characters. Please note that sX_bootXcmd does not have this extension
feature, all boot commands must fit into 32 characters.
Example
To set XLR0’s first boot method to be “network with static IP” use the command:
PP50-0 $ kv s0_boot0dev0 “gmac0:10.4.69.10:255.255.0.0:”
PP50-0 $ kv s0_boot0dev1 “10.4.0.254;end”
For the boot device variable, there can be a maximum of 2 extensions. This means
that the range of last X is {0 . . 1}.
Similarly for boot file variable, there can be 4 extensions and for the boot arguments
variable there can be 8 extensions.
All characters in KV variables are case sensitive.
Note: The end of string is indicated by the flag string “;end”.
Note: Even if the string is less than 32 characters, user should still use
s0_boot0dev0 variable and add “;end” in the end.\
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6.2.1.3 Access to Multiple Boot Method
The multiboot method allows users to specify multiple boot methods to be tried in a
given sequence. For example, the user can set “network with dhcp” as the first
option to boot XLR, “network with static IP” as second option in case DHCP server
is down and so on. The bootloader will start with first method, if it fails to bring up
the board it will try the next method and so on. The user can specify up to four such
boot methods.
The bootloader decides a boot method has failed based on the watchdog mechanism
explained in Section6.2.1.8, "Watchdog Feature". If the watchdog timer expires, it
will use the next boot method in sequence.
6.2.1.4 Boot Method Syntax
Following table lists the syntax of KV variable sX_bootXdevX that specifies the boot
method.
Since colon(':') is used in the syntax of string, it can't be used in directory or file
name.
For example, network boot using gmac2 and DHCP for second boot method in
XLR1.
Syntax Boot Source Note
gmacN:IP[:mask][:gat
eway]
(static IP) Select the boot GMAC port and specify
the static host IP address to be used.
gmacN:dhcp_only (dynamic IP) Host IP address is requested from
DHCP server.
gmacN:dhcp_tftp (dynamic IP) Host IP address, gateway, TFTP server
and boot file name are requested from
DHCP server.
Note that in this case user does not
have to specify sX_bootXfileX variable.
cflash:partition (CF card boot) CF card as boot device, the partition
field is the partition number.
PP50-1 $ kv s1_boot1dev0 “gmac2:dhcp_only;end”
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Following are other examples strings for static IP allocation.
gmacN:IP;end (no mask, no gateway)
gmacN:IP:mask;end (with mask, no gateway)
gmacN:IP: :gw;end (no mask, with gateway, note: one space must be added
between “IP” and “gw”)
gmacN:IP:mask:gw;end (with mask, with gateway)
6.2.1.5 Specifying Boot file
Next KV variable after boot method is path/name of the boot file. In case of network
boot method, the path of file is prefixed with IP address of the boot server that holds
the boot file and runs TFTP server. The boot files usually are Linux kernel image or
RMIOS application image.
6.2.1.5.0.1 Syntax of Boot File
The following table lists the syntax of KV variable sX_bootXfileX that specifies the
boot file.
Following example shows setting up pp50/images/pp50-linux-kernel-v2.2.3b01 file
as boot file in XLR0, boot method 1 using network boot.
Setting up pp50/images/pp50-linux-kernel-v2.2.3b01 file as boot file in XLR0, boot
method 4 using compact flash.
6.2.1.6 Specifying Boot command
Next KV variable after boot file is the boot command string. Please refer to RMI SDK
for syntax and semantics of boot command. Essentially boot command string con-
sists of XLR bootloader commands to load and boot the XLR.
6.2.1.6.0.2 Syntax of Boot command
The KV variable used for boot command is sX_bootXcmd.
Syntax Boot Method Note
<tftp server>:<file> network IP of TFTP server and boot file name in
the server.
<file> compact flash boot file name in compact flash.
PP50-0 $ kv s0_boot0file0 "10.4.69.69:pp50/images/"
PP50-0 $ kv s0_boot0file1 "pp50-linux-kernel-v2.2.3b01;end"
PP50-0 $ kv s0_boot3file0 "pp50/images/"
PP50-0 $ kv s0_boot3file1 "pp50-linux-kernel-v2.2.3b01;end"
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Boot command to boot a Linux or RMIOS KUSEG image.
Notice the absence of last “X” in KV variable and the absence of “;end” string in the
end. One key should be enough for the bootcmd argument in any kind of logical
boot device. Multiple boot commands can be combined with semicolon (";") as list
separator.
6.2.1.7 Specifying Boot Arguments
Next KV variable after boot command is the boot command arguments. Please refer
to RMI SDK for syntax and semantics of boot command arguments.
6.2.1.7.1 Boot Argument Syntax
The following example sets the KV boot argument variables as shown in the table
below it:
"hda=noprobe hdb=noprobe root=/dev/nfs nfsroot=10.3.8.23:/rmi/1.4/nfsroot
ip=10.4.69.11:10.3.8.23:10.4.0.254:255.255.0.0::eth2:off console=ttyS0,38400"
6.2.1.8 Watchdog Feature
Users can specify four four methods of booting: regular boot, boot file, boot com-
mand, and boot args in a sequence as part of Continuous Computing’s multiboot.
XLR bootloader will start with last tried boot sequence and, if it fails to boot XLR, it
will continue with next method in sequence.
The decision as to when a boot sequence is considered to have “failed” to bring up
the XLR is based on the watchdog timer. The following are important points to con-
sider regarding the watchdog timer.
At the start of each boot sequence, XLR bootloader will tell the IPMC to start
watchdog timer. The value of watchdog timer is controlled by KV variable
sX_bootwd.
If the timer times out, IPMC will consider boot sequence as failure as will
reboot XLR. Once the reboot is finished the XLR will continue with next boot
method in sequence.
PP50-0 $ kv s0_boot0cmd "elfload;userapp"
PP50-0 $ kv s0_boot0args0 "hda=noprobe hdb=noprobe "
PP50-0 $ kv s0_boot0args1 "root=/dev/nfs nfsroot="
PP50-0 $ kv s0_boot0args2 "10.3.8.23:/rmi/1.4/nfsroot "
PP50-0 $ kv s0_boot0args3 "ip=10.4.69.11:10.3.8.23:"
PP50-0 $ kv s0_boot0args4 "10.4.0.254:255.255.0.0::eth2:"
PP50-0 $ kv s0_boot0args5 "off console=ttyS0,38400;end"
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If the boot method is successful, it is the responsibility of booted entity to stop
the watchdog timer in IPMC. Failure to do so will result in IPMC rebooting
XLR. Currently, if XLR is booted to Linux, user can add a utility called
“ipmi_setwd” as part of their root file system. Calling this utility, preferably
from init scripts, will reset the watchdog timer in IPMC. Currently, there is no
such utility available for RMIOS application.
The watchdog feature can be disabled by setting value of sX_bootwd to 0. In
this case user have to manually reboot XLR to continue with next boot
sequence.
It is important to set the right value for watchdog timer. The value should ideally be
largest of the time it take to boot XLR for each sequence. Given that booting Linux
takes most time, the timer value can be set based of Linux boot time. Typically it
takes about 60 seconds to boot the RMI Linux or WindRiver Linux kernel on PP50,
so 70 is a good value to start with.
Example of setting watchdog timer.
To find which payload stage's watchdog timer expired run the following command:
6.2.1.8.2 Stopping Watchdog Timer in Linux
As noted above after a successful boot, the watchdog timer must be stopped. Linux
provides the “ipmi_setwd” utility which can perform this operation (present in Util-
ities directory in release).
For booting RMI linux kernel from its own RAM FS
The binary of RMI Linux kernel with version later than "v2.2.3b00" has included
this utility as part of ramdisk.
For kernel version less that "v2.2.3b00" user has to rebuild kernel and add this
utility as part of initramfs.
For booting linux from nfsroot you need to add “ipmi_setwd” in /usr/bin of the
nfsroot and set it as executable using the "chmod a+x ipmi_setwd" command.
You must also add following line in the nfsroot script file /etc/inittab,
6.2.1.9 Initializing Multiboot
Multiboot is initialized by setting kv entries as described below.
6.2.1.9.3 Setting the s[0_1]_multiboot Key Value
Specify the way of XLR multiboot/autoboot through setting the s[0|1]_multiboot
KV key.
PP50-0 $ kv s0_bootwd "70"
cat /var/log/messages | grep expired
0:12345:once:/usr/bin/ipmi_setwd 0
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KV key s[0|1]_multiboot =
1 - Try to boot from KV key boot0dev (similar to "multiboot -s 0")
2 - Try to boot from KV key boot1dev (similar to "multiboot -s 1")
3 - Try to boot from KV key boot2dev (similar to "multiboot -s 2")
4 - Try to boot from KV key boot3dev (similar to "multiboot -s 3")
5 - Try to boot from KV keys boot0dev through boot3dev (similar to "multiboot -s
a")
10 - Try to boot using the XLR's environment variables - bootcmd0 through
bootcmd9
20 - Do not auto boot, force to bootloader prompt regardless of environment vari-
ables and Key-Value settings
Unsupported value - Display this usage information and force to bootloader prompt
6.2.1.9.3.1 Setting the s[0|1]_bootdelay Key Value
Specify the waiting time before starting multiboot/autoboot through setting the KV
key s[0|1]_bootdelay.
s[0|1]_bootdelay = 0 - boot with no waiting
< 0 - do not boot and force to bootloader prompt
> 0 - start to boot after the set time (seconds)
Note: If KV key s[0|1]_multiboot is not set or deleted, XLR will auto boot
using the environment variables (bootdelay, bootcmd0 through
bootcmd9), which is as same as chapter 6.2.2 said.
Note: If the kv key s[0|1]_bootdelay is not set or deleted, it will be
handled as if the default value '-1' was set and will force the
bootloader prompt.
Note: If the kv key s[0|1]_bootdelay is set to a wrong value by mistake, it
will boot with no waiting.
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6.2.1.10 Multiboot Example
The following examples show three boot sequences for XLR0.
Initialize multiboot feature
Sequence 1: Multiboot using GMAC0 and static IP
Sequence 2: Multiboot using GMAC0 and DHCP and TFTP option
Sequence 3: Multiboot Using GMAC0 and DHCP for IP address
6.2.2 Autobooting Using Environment Variables
User can also use RMI “bootcmd” environment variables to specify a sequence of
commands to be executed by bootloader. Note that this method of automating XLR
boot sequence is not as comprehensive as Continuous Computing autoboot feature.
It requires users access to XLR bootloader and does not provide flexibility to try
multiple boot methods in sequence. Please refer to RMI SDK for more details on this
feature.
kv s0_bootmode "normal"
kv s0_bootwd 70
kv s0_multiboot 5
kv s0_bootdelay 3
kv s0_boot0dev0 "gmac0:10.4.2.2:255.255.0.0;end"
kv s0_boot0file0 "10.4.3.69:pp50-linux-kernel"
kv s0_boot0file1 "-v2.2.3b00/"
kv s0_boot0file2 "pp50-linux-kernel-v2.2.3b00"
kv s0_boot0file3 ";end"
kv s0_boot0cmd "elfload;userapp"
kv s0_boot1dev0 "gmac0:dhcp_tftp;end"
kv s0_boot1cmd "elfload;userapp"
kv s0_boot2dev0 "gmac0:dhcp_only;end"
kv s0_boot2file0 "10.4.3.69:pp50-linux-kernel"
kv s0_boot2file1 "-v2.2.3b00/"
kv s0_boot2file2 "pp50-linux-kernel-v2.2.3b00"
kv s0_boot2file3 ";end"
kv s0_boot2cmd "elfload;userapp"
PP50-0 $ reboot
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6.3 XLR Utility
Continuous Computing has added a set of commands to simplify Linux booting
and management procedures. Some are available from the bootloader before Linux
runs: Section6.3.2, "XLR Commands Available From the BootLoader", others are
available after Linux runs; Section6.3.3, "XLR Commands Available From Linux".
6.3.1 Installing Linux Utilities
These utilities are in the release package’s in “Utilities” directory. They are already
part of ramfs, but if nfsroot is used the following steps must be performed to get
these utilities in nfsroot.
6.3.1.1 RMI Linux
1. Get the NFS package from RMI SDK and unpack it.
2. Copy the files to the NFS root.
3. Utilities directory to bin directory in nfsroot.
4. Create link for net_config
6.3.1.2 WR Linux
The script and relative utilities have been integrated into the BSP for Wind River
PNE Linux, but for additional changes, please refer to the Section9.3, "Building the
Kernel and NFS" for more information.
root # mkdir Utilities
root # tar -xzvf pp50-xlr-utils-vx.x.xr00.tgz -C Utilities
root # cp Utilites/kv <NFS dir>/bin/
root # cp Utilites/getcpuid <NFS dir>/bin/
root # cp Utilities/net_config <NFS dir>/etc/rc.d/init.d/
root# cd <NFS dir>/etc/rc.d/rc2.d/
root# ln –s ../init.d/net_config S31net_config
root# cd <NFS dir>/etc/rc.d/rc3.d/
root# ln –s ../init.d/net_config S31net_config
root# cd <NFS dir>/etc/rc.d/rc4.d/
root# ln –s ../init.d/net_config S31net_config
root# cd <NFS dir>/etc/rc.d/rc5.d/
root# ln –s ../init.d/net_config S31net_config
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6.3.2 XLR Commands Available From the BootLoader
The commands in this section are included in the XLR and IPMC firmware and are
used to boot the XLR.
6.3.2.1 kv
Sets a key value in the database. See Section7.4, "Key Value (KV) Database" for
details.
Detail Description
Synopsis kv [key [value]]
Options -k prints entries in shell-compatible syntax.
-V display version of kv utility.
-h display command usage.
-d delete a key from database.
Examples xlr prompt] kv
ipmc_version = "pp50-ipmc-v2.4.3r00"
datetime = "2009-04-29 23:20:42"
epochtime = "1241047243"
xlr0base = "00:02:BB:50:32:90"
xlr1base = "00:02:BB:50:32:98"
pyld0_compat = "8.2"
pyld1_compat = "8.2"
hwaddr = "43"
f1_presence = "1"
f2_presence = "0"
__pwr_regs = "ff00000000000000"
__f0_poh = "770"
__s0_rstcause = "cold_reset"
__s0_rsttime = "2009-04-29 23:07:31"
__s1_rstcause = "cold_reset"
[xlr prompt] kv -V
kv version 1.1
[xlr prompt] kv hello there
[xlr prompt] kv hello
hello = "there"
[xlr prompt] kv -d hello
[xlr prompt] kv hello
Key 'hello' not found
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6.3.2.2 showboot
Shows the bank where the bootloader booted from (xlr active flash bank id).
6.3.2.3 rollboot
Switches to the other flash bank and boots.
6.3.3 XLR Commands Available From Linux
The following commands are available after the XLR has booted WR/RMI Linux.
6.3.3.1 NTP client
The Network Time Protocol (NTP) daemon synchronizes RMI Linux time with NTP
servers. Please refer to README file in NTP directory of Utilities package for more
on installation.
6.3.3.2 kv
See Section6.3.2.1, "kv" for details.
6.3.3.3 showboot
See Section6.3.2.2, "showboot" for details.
Detail Description
Synopsis showboot
Options no options
Examples [xlr prompt] showboot
System was booted from bank 0.
The active bank version is: v2.5.0r00
Detail Description
Synopsis rollboot
Options none
Example [xlr prompt] rollboot
System was booted from bank 0.
The active bank version is: v2.5.0r00
Rollboot to bank 1...
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6.3.3.4 rollboot
See Section6.3.2.3, "rollboot" for details.
6.3.3.5 ipmi_setwd
IPMI Set WatchDog timer, reboots the XLR based on the time specified; supports
XLR multiboot feature. For details about its usage also see Section6.2.1.8, "Watch-
dog Feature".
6.3.3.6 fswcmd
Fabric Switch Command, provides fabric switch operation from the XLR side. See
Section8.2.1, "Managing the Fabric Switch with fswcmd" for details.
6.3.3.6.1 fswcmd.cfg Configuration File
A small configuration file named fswcmd.cfg included in the release package pro-
vides the address for the IPMC to ensure it can be accessed; for example, if the
accessible IPMC interface IP address is 10.4.1.10, the following line should be in the
fswcmd.cfg
This config file indicates where the fabric switch daemon 'fswd' is. This file is
required only when the fswcmd is executed on the XLR (RMI Linux or WindRiver
Linux).
Note this is not be confused with the fswitchCfg.def file and its associated kv key
fswitchCfg. See Section8.2, "Fabric Switch Management" and Section8.2.2, "fswcmd
Start Up File" for more details.
Detail Description
Synopsis ipmi_setwd [-hv][seconds]
Options -h help
-v display version
seconds(decimal) = 0 stops the watchdog timer
seconds(decimal) > 0 starts the watchdog timer
Examples [xlr prompt] ipmi_setwd 22
ip_address 10.4.1.10
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6.3.3.7 upgrade
For upgrading the xlr flash bank
6.3.3.8 bswcmd
The bswcmd command provides base switch operation and information. See Sec-
tion8.6, "CNode Base Switch (bswcmd) Command" for more information about this
command.
6.3.3.9 getcpuid
Returns the XLR CPU ID of the XLR you are currently using.
Detail Description
Synopsis upgrade <-a | -s> [options]
Options ? Display this usage
-V Display version of this program
-a Use active flash for operation
-s Use backup flash for operation
-b <backup file> Backup flash info to a file
-p <program file> Program file to flash
-v <program file> Verify flash info with a file
Examples To backup:
[xlr prompt] ./upgrade -a -b bootloader.bck
To program:
[xlr prompt] ./upgrade -s -p bootloader.bin
To verify:
[xlr prompt] ./upgrade -s -v bootloader.bin
Detail Description
Synopsis getcpuid
Options None
Examples [root@localhost xlr-utils]$ ./getcpuid
xlr cpu id is: 0
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6.3.3.10 net_config
Configures the network interface using the KV keys in the database. It replaces
setkv.
6.3.3.11 ipmi_setwd
Sets watchdog for supporting the XLR multiboot feature.
Usage: ipmi_setwd [-hv][seconds]
where:
-h help
-v display version
seconds(decimal) = 0 stops the watchdog timer
seconds(decimal) > 0 starts the watchdog timer
Detail Description
Synopsis net_config {start|stop|restart|reload|status}
Options {start|stop|restart|reload|status}
Examples [xlr prompt] ./net_config stop
[xlr prompt] ./net_config restart
[xlr prompt] ./net_config reload
[xlr prompt] ./net_config start
Auto configure network from kv database... [ OK ]
[xlr prompt] ./net_config status
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6.3.3.12 ux_diag
Diagnostic management utility based on kv schema.
Usage:
[Linux Prompt]$ ./ux_diag -h
usage: ux_diag [-u|--update] [cn|s0|s1]
usage: ux_diag [-l|--list] [cn|s0|s1]
usage: ux_diag [-d|--dump] [cn|s0|s1]
usage: ux_diag [-n|--no] [cn|s0|s1]
usage: ux_diag [-h]
-u update diagnosis configuration using /etc/diag/XX_diag.cfg
-l list all available test items and test states configuration
-d dump the test result and create /var/log/XX_diag.dump
-n list current diagnosis test error number and err string
-h for help
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Preliminary
7Intelligent Platform Management
Controller
This chapter describes the Intelligent Platform Management Controller (IPMC) on
the PP50. The PP50 implements IPMC module on a Linux based system using a
PPC405EZ processor. This processor is referred to as the CNode. Apart from the
IPMC module, the CNode also runs various other modules to control the base and
fabric switches on a PP50. This chapter concentrates on the IPMC module.
The IPMC module is a single threaded, user level daemon process (ipmcd) running
on the CNode. This daemon process is started using one of the startup scripts on
Linux.
Following are the main functions of the IPMC module:
Provides an interface to Shelf Manager over IPMB channel for the management
of the blade as per PICMG 3.0 Revision 2.0 AdvancedTCA Base Specification
and IPMI v1.5 specification.
Provides an interface to the payload CPUs over the SIPL channel.
Provides an interface to the System Manager using RMCP over base interface
ethernet.
Provides an interface to switch management applications for E-Keying.
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7.1 FRU Support
The PP50 IPMC provides two managed FRUs:
Front Board (FRU # 0)
•RTM (FRU # 1)
There is also one unmanaged FRU, the TCAM (FRU # 2).
The front board FRU acts as the master FRU, meaning other FRUs cannot be made
active unless front board FRU is active. Similarly, if the front board FRU is deacti-
vated then other slave FRUs are automatically deactivated.
Managed FRUs are visible to the shelf manger (and system manager) for all the
management purposes including its activation and deactivation. Unmanaged FRUs
are activated and deactivated by the front board FRU itself during the master FRU’s
activation and deactivation.
Optionally, the IPMC also provides the flexibility to create one managed FRU for
each of the XLRs using the KV key "xlrfru". Please refer to Table 7-5 "Key Value
Database" for description of KV key "xlrfru". By default, IPMC does not create a
managed FRU for XLRs and rather each of the XLRs are payloads of Front Board
FRU only. When a managed FRU for each of the XLRs are created, the IPMC creates
the following additional FRUs:
FRU # 3 for PP50-P2 XLR0
FRU # 4 for PP50-P2 XLR1
Even though, the IPMC creates a managed FRU for each XLR, the XLRs are not
actual field replaceable unit and so having a managed FRU for them is purely for
management purposes only. For the same reason, the IPMC does not create and
maintain any separate FRU data for XLR FRUs and so "Read FRU Data" commands
for XLR FRU returns FRU data of Front Board FRU only and "Write FRU Data" com-
mand is not applicable for XLR FRUs.
7.1.1 FRU State
PICMG 3.0 defines a standard FRU state machine to allow controlled introduction
and removal of hardware to and from a running system. All the managed FRUs on
the PP50 follow the state machine defined by PICMG specifications. Managed FRUs
require a management activation from shelf (and/or system) management; they do
not become active without an interaction with shelf (and/or system) management
application.
Note: When installing and removing RTMs, ensure they are securely
attached to the chassis by tightening the thumb bolts. Failure to do
so may result in improper board behavior.
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Managed FRU’s state machine is affected by events from shelf (and/or system)
management, ejector latches, hardware presence detection, and other timers or
behaviors internal to the IPMC.
7.1.2 FRU Hot swap Sensors
For each managed FRU, the PP50 provides a FRU Hotswap Sensor as defined by the
ATCA specification to indicate FRU state (M0-M7). Hotswap sensor can be enabled
to provide notification via sensor events any time the hot swap state of that FRU
changes.
For unmanaged FRU (TCAM), PP50 provides a Presence Sensor which can be que-
ried to detect presence of the FRU.
See Section7.2, "Sensors" for details on all the sensor supported by the PP50.
7.1.3 FRU Data
FRU inventory data is usually accessed through the shelf manager, or remotely
using HPI (Hardware Platform Interface).
The PP50 allows frudata read and write for both managed and unmanaged FRUs.
Below is an example of obtaining FRU data on a 5U chassis with a Pigeon Point-
ShMC. It is an example only, your method of access and data will vary based on
your shelf management and system management interface.
7.1.3.1 Example of FRU Data using Pigeon Point ShMc
In this example, the PP50 board is seated in slot 3 (IPMB address of 0x86) on Schroff
5U chassis. The command to read FRU data of front board is:
where:
86 is the IPMB address of the PP50 board and will vary depending on which
slot the board occupies.
Note: There is no guaranteed association between sensor numbers and
FRU numbers. Therefore users are advised not to put specific sensor
numbers into their management applications. Instead, the
management application should rely on sensor event messages
which include the FRU number as a data field, or it can read and
search the sensor data records using the sensor name to look up the
sensor number at run time if needed.
fruinfo 86 0
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0 is the logical FRU number for the PP50 Front board FRU.
Command to read FRU data for PP50 RTM FRU is:
where:
86 is the IPMB address of the PP50 board and will vary depending on which
slot the board occupies
1 is the logical FRU number for the PP50 RTM FRU
CLI> fruinfo 86 0
86: FRU # 0, FRU Info
Common Header: Format Version = 1
Internal Use Area:
Version = 1
Board Info Area:
Version = 1
Language Code = 25
Mfg Date/Time = Aug 8 02:44:00 2007 (6101444 minutes since 1996)
Board Manufacturer = Continuous Computing Corp.
Board Product Name = FlexPacket ATCA-PP50
Board Serial Number = 00:02:bb:50:02:00
Board Part Number = 0-XXXXX-NN
FRU Programmer File ID =
Product Info Area:
Version = 1
Language Code = 25
Manufacturer Name = Continuous Computing Corp.
Product Name = FlexPacket ATCA-PP50
Product Part / Model# = PP50 0-9XXXX
Product Version = X00 P2
Product Serial Number = CT7-00578
Asset Tag =
FRU Programmer File ID =
Multi Record Area:
PICMG Board Point-to-Point Connectivity Record (ID=0x14)
Version = 0
CLI>
fruinfo 86 1
CLI> fruinfo 86 1
86: FRU # 1, FRU Info
Common Header: Format Version = 1
Internal Use Area:
Version = 1
Board Info Area:
Version = 1
Language Code = 25
Mfg Date/Time = Aug 8 02:44:00 2007 (6101444 minutes since 1996)
Board Manufacturer = Continuous Computing Corp.
Board Product Name = FlexPacket ATCA-PP50 RTM
Board Serial Number = CZ8-11539
Board Part Number = 0-11024-E06
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The command to read FRU data for PP50 TCAM FRU is:
where:
86 is the IPMB address of the PP50 board and will vary depending on which
slot the board occupies
2 is the logical FRU number for the PP50 TCAM FRU (unmanaged FRU)
FRU Programmer File ID =
Product Info Area:
Version = 1
Language Code = 25
Manufacturer Name = Continuous Computing Corp.
Product Name = FlexPacket ATCA-PP50 RTM
Product Part / Model# = PP50 0-9XXXX
Product Version = X00 P2
Product Serial Number = CZ8-11539
Asset Tag =
FRU Programmer File ID =
CLI>
fruinfo 86 2
CLI> fruinfo 86 2
86: FRU # 2, FRU Info
Common Header: Format Version = 1
Internal Use Area:
Version = 1
Board Info Area:
Version = 1
Language Code = 25
Mfg Date/Time = Aug 8 02:44:00 2007 (6101444 minutes since 1996)
Board Manufacturer = Continuous Computing Corp.
Board Product Name = FlexPacket ATCA-PP50 TCAM
Board Serial Number = CZ8-19683
Board Part Number = 0-11761-E03
FRU Programmer File ID =
Product Info Area:
Version = 1
Language Code = 25
Manufacturer Name = Continuous Computing Corp.
Product Name = FlexPacket ATCA-PP50 TCAM
Product Part / Model# = PP50 0-9XXXX
Product Version = X00 P2
Product Serial Number = CZ8-19683
Asset Tag =
FRU Programmer File ID =
CLI>
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7.2 Sensors
This section describes the PP50’s sensors. The following table lists all the sensors
available on PP50. Please refer to IPMI specification for details on sensor type, sen-
sor class and sensor event/reading type codes.
Table 7-1: PP50 Sensor List
Sensor Name Sensor
Type Sensor
Class Event/Read-
ing Type Code Sensor Descrip-
tion
Front Hotswap Hot Swap Discrete Sensor Specific
(0x6f)
FRU Hot Swap
Sensor
RTM Hotswap Hot Swap Discrete Sensor Specific
(0x6f)
'FRU Hot Swap
Sensor'
IPMB Physical IPMB Link Discrete Sensor Specific
(0x6f)
Physical IPMB-0
Sensors
-48V A * Voltage Threshold Generic (0x01) -48V A feed
voltage.
-48V B * Voltage Threshold Generic (0x01) -48V B feed voltage.
Holdup Cap * Voltage Threshold Generic (0x01) Hold-up Capacitor
Voltage (relative to
-48v_out)
-48V Current * Current Threshold Generic (0x01) -48v_out current.
None of the
thresholds of this
sensor are settable.
Pwr Module
Temp *
Temperature Threshold Generic (0x01) Power Module
Temperature
CNODE
Ambient
Temperature Threshold Generic (0x01) board ambient
temperature
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XLR0 FW
Progress
System
Firmware
Progress
Discrete OEM (0x70) XLR0 system
firmware Progress.
Event reading type
code of OEM (0x70)
allows user
application running
on XLR0 to set
sensor reading and
events by issuing
IPMI command
“Set Sensor
Reading and Event
Status”. User
application can set
sensor reading
value in the range
0x80 - 0xff.
XLR0 Ambient Temperature Threshold Generic (0x01) XLR0 ambient
temperature
XLR0 Core Temperature Threshold Generic (0x01) XLR0 core
temperature
XLR0 Watchdog Watchdog 2 Discrete Sensor Specific
(0x6f)
XLR0 watchdog
XLR1 FW
Progress
System
Firmware
Progress
Discrete OEM (0x70) XLR1 system
firmware Progress.
Event reading type
code of OEM (0x70)
allows user
application running
on XLR1 to set
sensor reading and
events by issuing
IPMI command
“Set Sensor
Reading and Event
Status”.
User application
can set sensor
reading value in the
range 0x80 - 0xff.
XLR1 Ambient Temperature Threshold Generic (0x01) XLR1 ambient
temperature
Table 7-1: PP50 Sensor List
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* Sensors related to power module are only present on PP50 boards with PCBA ver-
sion E08 or higher where power module unit is fully functional.
Following table lists the factory default values of thresholds and hysteresis settings
of threshold sensors along with their conversion formula and accuracy settings.
XLR1 Core Temperature Threshold Generic (0x01) XLR1 core
temperature
XLR1 Watchdog Watchdog 2 Discrete Sensor Specific
(0x6f)
XLR1 watchdog
FM2112/
FM3112
Ambient
Temperature Threshold Generic (0x01) Fabric-Ethernet-
switch ambient
temperature
FM2112/
FM3112 Core
Temperature Threshold Generic (0x01) Fabric-Ethernet-
switch core
temperature
TCAM Presence Entity
Presence
Discrete Generic (0x08) TCAM mezzanine
card installed
TCAM Chip0 Temperature Threshold Generic (0x01) TCAM Chip 0
temperature. Only
present when the
TCAM is installed.
TCAM
Chip1_FPGA
Temperature Threshold Generic (0x01) TCAM
Chip1_FPGA
temperature. Only
present when the
TCAM is installed.
Table 7-2: Factory default settings of thresholds and hysteresis
Sensor Conver-
sion UCR UMJ UMN LCR LMJ LMN Hyst Accuracy
Percent
+-
CNode
Ambient
- 0x55 0x50 0x4B - - - 2 2 98
FM2112
Ambient
- 0x55 0x50 0x4B - - - 2 2 98
FM2112
Core
y=1x-15 0x64
*
0x5F 0x5A - - - 2 2 97
Table 7-1: PP50 Sensor List
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* Thresholds not user settable
Boards either have FM2112 or FM3112 switches, not both.
Abbreviations used in the above table are described below.
UCR: Upper Critical (IPMI non-recoverable)
UMJ: Upper Major (IPMI critical)
UMN: Upper Minor (IPMI non-critical)
LCR: Lower Critical (IPMI non-recoverable)
LMJ: Lower Major (IPMI critical)
LMN: Lower Minor (IPMI non-critical)
FM3112
Ambient
- 0x55 0x50 0x4B - - - 2 2 98
FM3112
Core
y=1x-3 0x6
C*
0x67 0x62 - - - 2 2 97
XLR0
Ambient
- 0x55 0x50 0x4B - - - 2 2 98
XLR0
Core
-0x5F
*
0x50 0x4B - - - 2 2 97
XLR1
Ambient
- 0x55 0x50 0x4B - - - 2 2 98
XLR1
Core
-0x5F
*
0x50 0x4B - - - 2 2 97
Holdup
Cap
y=(0.398
)x
0xF3 0xEE 0xE9 0x76 0x7D 0x85 2 2 98
Pwr
Module
Temp
y=(1.961
)x-50
0x5B 0x59 0x51 - - - 2 2 98
-48V A y=(0.325
)x
- 0xD4 0xCB - 0x7B 0x84 2 2 98
-48V B y=(0.325
)x
- 0xD4 0xCB - 0x7B 0x84 2 2 98
Table 7-2: Factory default settings of thresholds and hysteresis
Sensor Conver-
sion UCR UMJ UMN LCR LMJ LMN Hyst Accuracy
Percent
+-
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7.3 Link Descriptors
There are two fabric configurations for the PP50:
•10G Fabric
•4*1G Fabric
Following table lists the link descriptors used for the 10G fabric and 4*1G Fabric.
Table 7-3: LinkRecordsonPP50with10GFabric
# Description Link
Grouping
ID [31:24]
Link Type
Exten-
sion
[23:20]
Link Type
[19:12]
Port
Flags
[11:8]
Interface
[7:6] Channel
[5:0]
1BaseInterface
Channel 1
0000b 0000b 00000001b 0001b 00b 000001b
2BaseInterface
Channel2
0000b 0000b 00000001b 0001b 00b 000010b
3FabricInterface
Channel1
10G mode
0000b 0001b 00000010b 1111b 01b 000001b
4FabricInterface
Channel1
1G mode
0000b 0000b 00000010b 0001b 01b 000001b
5 FabricInterface
Channel2
10G mode
0000b 0001b 00000010b 1111b 01b 000010b
6FabricInterface
Channel2
1G mode
0000b 0000b 00000010b 0001b 01b 000010b
Table 7-4: Table72:LinkRecordsonPP50with4*1GFabric
# Description Link
Grouping
ID [31:24]
Link Type
Exten-
sion
[23:20]
Link Type
[10:12]
Port
Flags
[11:8]
Interface
[7:6] Channel
[5:0]
1BaseInterface
Channel 1
0000b 0000b 00000001b 0001b 00b 000001b
2BaseInterface
Channel2
0000b 0000b 00000001b 0001b 00b 000010b
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3FabricInterface
Channel1
1G mode
(port0)
0000b 0000b 00000010b 0001b 01b 000001b
4FabricInterface
Channel1
1G mode
(port1)
0000b 0000b 00000010b 0010b 01b 000001b
5 FabricInterface
Channel1
1G mode
(port2)
0000b 0000b 00000010b 0100b 01b 000001b
6FabricInterface
Channel1
1G mode
(port3)
0000b 0000b 00000010b 1000b 01b 000001b
7FabricInterface
Channel2
1G mode
(port0)
0000b 0000b 00000010b 0001b 01b 000010b
8FabricInterface
Channel2
1G mode
(port1)
0000b 0000b 00000010b 0010b 01b 000010b
9 FabricInterface
Channel2
1G mode
(port2)
0000b 0000b 00000010b 0100b 01b 000010b
10 FabricInterface
Channel2
1G mode
(port3)
0000b 0000b 00000010b 1000b 01b 000010b
Table 7-4: Table72:LinkRecordsonPP50with4*1GFabric
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7.3.1 PP50with10GFabricLinkDescriptors(shelfmanager)
BelowisanexampleoflinkdescriptorsonPP50with10GFabricasreportedbyaPigeon
Pointshelfmanager.
7.3.2 PP50with4*1GFabricLinkDescriptors(shelfmanager)
BelowisanexampleoflinkdescriptorsonPP50with4*1GFabricreportedbyaPigeon
Pointshelfmanager.
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x01 PICMG 3.0 Base 10/100/1000 Base-T
Link Type Extension = 0x0 10/100/1000BASE-T Link (four-pair)
Link Designator = 0x101 Channel1/BaseInterface/Ports0
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x01 PICMG 3.0 Base 10/100/1000 Base-T
Link Type Extension = 0x0 10/100/1000BASE-T Link (four-pair)
Link Designator = 0x102 Channel2/BaseInterface/Ports0
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x1
Link Designator = 0xF41 Channel1/FabricInterface/Ports0123
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x1
Link Designator = 0xF42 Channel2/FabricInterface/Ports0123
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x0
Link Designator = 0x141 Channel1/FabricInterface/Ports0
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x0
Link Designator = 0x142 Channel2/FabricInterface/Ports0
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x01 PICMG 3.0 Base 10/100/1000 Base-T
Link Type Extension = 0x0 10/100/1000BASE-T Link (four-pair)
Link Designator = 0x101 Channel1/BaseInterface/Ports0
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x01 PICMG 3.0 Base 10/100/1000 Base-T
Link Type Extension = 0x0 10/100/1000BASE-T Link (four-pair)
Link Designator = 0x102 Channel2/BaseInterface/Ports0
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x0
Link Designator = 0x141 Channel1/FabricInterface/Ports0
Link Descriptor:
Link Grouping ID = 0x00
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Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x0
Link Designator = 0x142 Channel2/FabricInterface/Ports0
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x0
Link Designator = 0x241 Channel1/FabricInterface/Ports1
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x0
Link Designator = 0x242 Channel2/FabricInterface/Ports1
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x0
Link Designator = 0x441 Channel1/FabricInterface/Ports2
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x0
Link Designator = 0x442 Channel2/FabricInterface/Ports2
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x0
Link Designator = 0x841 Channel1/FabricInterface/Ports3
Link Descriptor:
Link Grouping ID = 0x00
Link Type = 0x02 PICMG 3.1 Ethernet Fabric
Link Type Extension = 0x0
Link Designator = 0x842 Channel2/FabricInterface/Ports3
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Preliminary
7.4 Key Value (KV) Database
The CNode implements a specialized Key-Value database in a serial EEPROM to
store OEM parameters for configuration and control purposes. Keys can be up to 14
bytes long and the values can be up to 32 bytes long. There are several ways to man-
age these keys:
By running command “kv” from ipmc-cli. See the description of “kv” in
Section7.8, "IPMC Command Line Interface" for details.
By using IPMI OEM commands; see Section7.5.10, "OEM API Commands" for
details.
By running utility “kv” from payloads. See Section6.3.2.1, "kv" for usage
syntax.
By running utility “cnodekv” from CNode Linux prompt. Option “-h” lists the
usage information of this utility. Any modification done by using cnodekv
takes into effect only after the next restart of ipmcd daemon (and/or next
restart of CNode).
7.4.1 KV Keys
This section details the KV key’s name, type, and description.
Note that some keys listed as "Read Only" in this chapter are truly read-only and
cannot be written to due to IPMC protection. Other "Read Only" keys can be over-
written with the kv command, but if that is done, the product may not function
properly.
Note: "Read Only" keys should not be changed; changing them may
cause the product to malfunction. "Read Only" here means that
they should not be changed.
Table 7-5: Key Value Database
Key Name Type Description
cn_fibm_enable Read/Write Enables FIBM Mode. See Section8.2.3, "FIBM Mode"
for details.
ipmc_version Read Only Provides version of IPMC firmware running on
CNode. Example: pp50-ipmc-v2.4.1r00
datetime Read Only Provides current date and time in the format YYYY-
MM-DD HH:MM:SS. Example: 2009-04-17 21:10:55
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epochtime Read Only Provides epoch time as a number of seconds elapsed
since midnight Coordinated Universal Time (UTC) of
January 1, 1970, not counting leap seconds. Example:
1240002700
s0_mac_base /
xlr0base
Read Only Provides base mac address for XLR0.
Note: xlr0base will be deprecated in future releases.
s1_mac_base /
xlr1base
Read Only Provides base mac address for XLR1.
Note: xlr0base will be deprecated in future releases.
f0_brd_compat Read Only Compatibility key for FRU # 0 (Front Board), used for
internal purposes.
f1_brd_compat Read Only Compatibility key for FRU # 1 (RTM), used for
internal purposes.
f2_brd_compat Read Only Compatibility key for FRU # 2 ( TCAM), used for
internal purposes.
hwaddr Read Only Provides hardware address (in hexadecimal format)
assigned to the board in the chassis. Each slot in ATCA
chassis is assigned an unique hardware address.
Example: 44
f1_presence Read Only Presence of Fru # 1 (i.e. RTM). Possible values are:
0: Fru is not present
1: Fru is present
f2_presence Read Only Presence of Fru # 2 (i.e. TCAM). Possible values are:
0: Fru is not present
1: Fru is present
tcam_fpga_vers Read Only TCAM FPGA version number.
__pwr_regs Read Only FPGA Power registers values. These are mainly used
for diagnostic and debugging purposes.
__f0_poh Read Only Power On hours for Fru # 0 (Front board). This is a life
time counter and indicates total number of hours Fru #
0 has been in active (M4) state.
Table 7-5: Key Value Database
Key Name Type Description
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__s0_rstcause Read Only Cause of last reset of payload 0 (XLR0). Possible values
are:
watchdog: reset because of expiry of BMC
Watchdog timer.
cold_reset: reset because of PICMG command
"FRU Control (option cold reset)".
warm_reset: reset because of PICMG command
"FRU Control (option warm reset)".
grace_reboot: reset because of PICMG command
"FRU Control (option graceful reboot)".
diag_interrupt: reset because of PICMG command
"FRU Control (option diagnostic interrupt)".
grace_shutdown: reset because of deactivation of
the FRU to which this payload belongs.
unknown: payload reset because of other
unknown reasons.
Note: Currently the PP50 only supports the
cold_reset and graceful reboot FRU Control
commands so reset causes related to other FRU
Control commands are not used as of now.
__s0_rsttime Read Only Date and time of last reset of payload 0 (XLR0). This
value is printed in the format YYYY-MM-DD
HH:MM:SS
_s0_state Read Only Payload 0 (XLR0) state. Possible values are:
INIT: This is the initial state for payload 0.
OSRUNNING: When the payload 0 OS is running
and is capable of supporting graceful shutdown/
reboot.
SHUTDOWN: Payload 0 is processing graceful
shutdown, and when the shutdown is completed,
IPMC will set the value to INIT.
Table 7-5: Key Value Database
Key Name Type Description
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__s1_rstcause Read Only Cause of last reset of payload 1 (XLR1). Possible values
are:
pwrcycle: reset because of power cycle of the
payload and/or board
watchdog: reset because of expiry of BMC
Watchdog timer.
cold_reset: reset because of PICMG command
"FRU Control (option cold reset)".
warm_reset: reset because of PICMG command
"FRU Control (option warm reset)".
grace_reboot: reset because of PICMG command
"FRU Control (option graceful reboot)".
diag_interrupt: reset because of PICMG command
"FRU Control (option diagnostic interrupt)".
grace_shutdown: reset because of deactivation of
the FRU to which this payload belongs.
unknown: payload reset because of other
unknown reasons.
Note: Currently the PP50 only supports the
cold_reset and graceful reboot FRU Control
commands so reset causes related to other FRU
Control commands are not used as of now.
__s1_rsttime Read Only Date and time of last reset of payload 1 (XLR1). This
value is printed in the format YYYY-MM-DD
HH:MM:SS
_s1_state Read Only Payload 1 (XLR1) state. Possible values are:
INIT: This is the initial state for payload 1.
OSRUNNING: When the payload 1 OS is running
and is capable of supporting graceful shutdown/
reboot.
SHUTDOWN: Payload 1 is processing graceful
shutdown, and when the shutdown is completed,
IPMC will set the value to INIT.
Table 7-5: Key Value Database
Key Name Type Description
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shutdown_wait Read/Write This key is used for the graceful shutdown of payloads
during the deactivation of the FRU. Value of this key is
the maximum duration (in seconds) which IPMC
waits for the payloads to shutdown gracefully and
send shutdown complete event to IPMC on payload's
Firmware Progress sensor. If this key does not exist
then the default duration for the graceful shutdown of
payloads is 120 seconds.
If shutdown_wait is 0, then IPMC immediately
turns off power to all the payloads and transition
the FRU to M1 state.
If shutdown_wait is < 0, then IPMC waits
indefinitely for each of the payloads of the FRU to
complete their shutdown. IPMC shall transition
the FRU to M1 state only when it has received
shutdown complete event from all the payloads of
that FRU on their Firmware Progress Sensors.
If shutdown_wait is > 0, then IPMC transitions the
FRU state to M1 when either it has received
shutdown complete event from all the payloads of
that FRU on their Firmware Progress Sensors, Or
when shutdown_wait seconds have elapsed.
cn_hw_watchdog Read/Write Sets the hardware watchdog interval, in seconds.
Disabled by default.
Default value is 180 seconds.
If set to less than 180 seconds (too short for
successful boot up) it will be reset to 180 and
messages indicating it was reset will be stored in
the var log.
If the key is missing or value is zero, the watchdog
will be disabled.
Table 7-5: Key Value Database
Key Name Type Description
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__cn_rstcause Read Only Cause of last CNode reset. Possible values are:
watchdog: reset because of expiry of IPMI
Watchdog timer.
cold_reset: reset because of IPMI Cold Reset
command.
unknown: reset because of other unknown
reasons.
Note: This key will show valid value only when
CNode is reset due to failure of CNode
Software Watchdog and/or CNode getting
reset because of IPMI Cold Reset command
from Shelf Manager/System Manager. In all
the other cases (including running “reboot” on
CNode and normal power cycle), this key will
have invalid value.
__cn_rsttime Read Only Date and time of last CNode reset. This value is
printed in the format YYYY-MM-DD HH:MM:SS
Note: This key will show valid value only when
CNode is reset due to failure of CNode
Software Watchdog and/or CNode getting
reset because of IPMI Cold Reset command
from Shelf Manager/System Manager. In all
the other cases (including running “reboot” on
CNode and normal power cycle), this key will
have invalid value.
ethaddr Read Only Base ethernet address of CNode.
ipmc_vers0 Read Only Version of IPMC firmware in CNode flash bank # 0.
Example: pp50-ipmc-v2.4.0r00
ipmc_vers1 Read Only Version of IPMC firmware in CNode flash bank # 1.
Example: pp50-ipmc-v2.4.1r00
ipmc_act_bank Read Only Active bank id (0 or 1) of CNode flash. This indicates
ipmc firmware stored in this active bank is running
currently on CNode.
s0_vers2 Read Only version of CPLD for payload 0 (XLR0). Example: v0x08
s1_vers2 Read Only CPLD version for Payload 1 (XLR1). Example: v0x08
led_vers Read Only Version of LED CPLD. For example v0x04
Table 7-5: Key Value Database
Key Name Type Description
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s0_act_bank Read Only This key was deprecated in release PP50 V1.2 Update
1. It was replaced with the two new keys sX_cur_bank
(X: 0 or 1) and sX_next_bank (X: 0 or 1). It displays the
active bank id (0 or 1) for payload 0 (XLR0).
s1_act_bank Read Only This key was deprecated in release PP50 V1.2 Update
1. It was replaced with two the new keys sX_cur_bank
(X: 0 or 1) and sX_next_bank (X: 0 or 1). It displays the
active bank id (0 or 1) for payload 1 (XLR1).
sX_cur_bank
(X: 0 or 1)
Read Only Current payload boot flash bank being used,
value is 0 or 1.
sX_next_bank
(X: 0 or 1)
Read/Write Payload boot flash bank to be used next (after payload
is rebooted), value is 0 or 1.
fswitchCfg Read /
Write
This key lists the path for fswitch configuration file.
This key is to be set by user. Default value of this key is
"/etc/fswitchCfg.def"
cnbsa_proto Read /
Write
Protocol for eth0 interface (Base channel A) on CNode.
Possible values are: "static" or "dhcp".
ipaddr Read /
Write
IP address assigned to eth0 interface (Base channel A)
of CNode.
netmask Read /
Write
Netmask for eth0 interface (Base channel A) of CNode.
cnbsb_proto Read /
Write
Protocol for eth0.4094 interface (Base channel B) on
CNode. Possible values are: "static" or "dhcp".
netmask_b Read /
Write
Netmask for eth0.4094 interface (Base channel B) of
CNode.
ipaddr_b Read /
Write
IP address assigned to eth0.4094 interface (Base
channel B) of CNode.
serverip Read /
Write
Server IP address
gatewayip Read /
Write
Gateway IP address
dnsdomain Read /
Write
Flag indicating whether DNS configuration is enabled
or disabled. This flag should be set only when
interface protocol is set to "static". Possible values are:
"enable" or "disable".
Table 7-5: Key Value Database
Key Name Type Description
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dns_ns1 Read /
Write
IP address of DNS server 1. This is used only when
interface protocol is set to "static" and the key
dnsdomain is set to "enable".
dns_ns2 Read /
Write
IP address of DNS server 2. This is used only when
interface protocol is set to "static" and the key
dnsdomain is set to "enable".
sysid Read /
Write
This is an optional key and can be useful in multi-shelf
system. This key is used in building dhcp client
identifier for CNode's DHCP discover message. Client
id has the format of [$sysid]-[$shelfid]-$hwaddr-cn-
bsa for eth0 interface and [$sysid]-[$shelfid]-$hwaddr-
cn-bsb for eth0.4094 interface. This key can be assigned
any integer value.
shelfid Read /
Write
This is an optional key and can be useful in multi-shelf
system. This key is used in building dhcp client
identifier for CNode's DHCP discover message. Client
id has the format of [$sysid]-[$shelfid]-$hwaddr-cn-
bsa for eth0 interface and [$sysid]-[$shelfid]-$hwaddr-
cn-bsb for eth0.4094 interface. This key can be assigned
any integer value.
ntpserver Read /
Write
Address of NTP server. If this key is set then ntpclient
on CNode adjusts time using the specified server.
CCPU has reserved following ntp servers and user can
set this key to point to any of these server addresses:
"0.ccpu.pool.ntp.org", "1.ccpu.pool.ntp.org",
"2.ccpu.pool.ntp.org", "3.ccpu.pool.ntp.org".
sel_overwrite Read /
Write
This is an optional key to enable SEL overwriting.
Possible values are: 0 or 1. CNode has a 4K bytes of
EEPROM for on-board SEL (System Event Logging).
IPMC module only writes critical events in SEL,
though all the events are sent to Shelf Manager (if
enabled). By default (if this key is not configured, Or if
this key is configured and set to 0), IPMC would not
overwrite SEL EEPROM once it is full and rather
would rely on Shelf Manager (and/or System
Management application) to clear on-board SEL. If this
key is set to 1, then IPMC shall rotate SEL logs (as a
circular buffer) once it is full.
Table 7-5: Key Value Database
Key Name Type Description
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auto_compat Read /
Write
This is an optional key and is needed to fix the
compatibility issue of a non-front board managed FRU
(example: RTM) with front board fru. Each non-front
board managed fru is assigned a compatibility key
(fru_compat) which is programmed into its
manufacturing database. During board activation,
CNode ipmc matches non-front board fru's
compatibility key with corresponding key in front
board fru's manufacturing database and it activates
this non-front board fru only when those two keys are
matching, otherwise it prints an error of compatibility
mismatch and leaves that non-front board fru in M0
state. Compatibility matching can also fail when non-
front board fru's manufacturing database is empty
and/or it does not contain fru_compat key. Possible
values of this auto_compat key are:
0: Auto compatibility is turned OFF. This is same as
auto_compat key not configured. In this case, CNode
IPMC shall activate non-front board fru only when
compatibility test passes.
1: Auto compatibility is turned ON forever. In this
case, CNode IPMC overwrites and corrects
fru_compat key in non-front board fru's
manufacturing database and also in front board fru's
manufacturing database, if required. With this value
of auto_compat key, CNode IPMC does this auto
correction each time before a non-front board fru is
activated.
2: Auto compatibility is turned ON for once and then it
is turned OFF. CNode IPMC shall correct
compatibility keys for once and then it will turn off
auto compatibility feature.
Table 7-5: Key Value Database
Key Name Type Description
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Note: Note: Compatibility matching of a non-front
board fru (e.g. RTM) with front board fru is
required and necessary to protect hardware
from getting damaged. So auto compatibility
should be used carefully and only in scenarios
where non-front board fru's manufacturing
database does not have fru_compat key in it.
Auto compatibility feature should never be
enabled to match and fix compatibility in all
other genuine scenarios where non-front board
is not matching with front board fru because of
different values of their compatibility keys.
Note: If the RTM manufacturer’s fru data has a kv
brd_compat key, the auto_compat
configuration will have no affect on the RTM
fru_compat value.
cnnumofveths Read/Write Virtual emac function, see Section8.3.2, "Configurable
Behavior" for details. If cnnumofveths is non-existent
or set to zero, the driver will initialize the
num_of_fakes variable to 0 and default behavior is
preserved.
xlrfru Read/Write This is an optional key and is needed to create one
managed FRU for each of the XLRs. By default IPMC
does not create a managed FRUs for XLRs and rather
each of the XLRs are payloads of the front board FRU
only. Possible values of this key are:
0: no managed FRU for XLR and the feature is
disabled; same as not having the key at all.
1: create one managed FRU for each XLR.
_s0_fruid Read Only This key identifies the FRU to which payload 0 (XLR0)
belongs to.”
_s1_fruid Read Only This key identifies the FRU to which payload 1 (XLR1)
belongs to.”
Table 7-5: Key Value Database
Key Name Type Description
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7.4.2 To List All Key Value Entries
Usage: cnodekv
Typical Output (your output may be different):
_s0_fwprogid Read Only This key identifies the Firmware Progress Sensor for
the payload 0 (XLR0). Payload requires the sensor id
to send events and status to IPMC using “Set Sensor
Reading and Event Status” command on its Firmware
Progress Sensor.
_s1_fwprogid Read Only This key identifies the Firmware Progress Sensor for
the payload 1 (XLR1). Payload requires the sensor id
to send events and status to IPMC using “Set Sensor
Reading and Event Status” command on its Firmware
Progress Sensor.
s[0|1]_multiboot Read/Write See Section6.2.1.9, "Initializing Multiboot" for details.
s[0|1]_bootdelay Read/Write See Section6.2.1.9.3, "Setting the s[0_1]_multiboot Key
Value" for details.
cn_wd_report Read Only Watchdog report key. For internal use only.
root@cnode-pp50:~ cnodekv
ipmc_version = pp50-ipmc-v2.4.0r00
datetime = 2009-02-21 00:40:14
epochtime = 1235176814
xlr0base = 00:02:bb:50:02:00
xlr1base = 00:02:bb:50:02:08
hwaddr = 45
f1_presence = 1
f2_presence = 1
__pwr_regs = ff00000000000000
__f0_poh = 713
__s0_rstcause = pwrcycle
__s0_rsttime = 2009-02-20 23:16:40
__s1_rstcause = pwrcycle
__s1_rsttime = 2009-02-20 23:16:40
__cn_rstcause = cold_reset
__cn_rsttime = 2009-02-12 19:02:36
fswitchCfg = /etc/fswitchCfg.def
route10g = faceplate
ethaddr = 00:02:bb:50:02:06
ntpserver = 0.ccpu.pool.ntp.org
sel_overwrite = 0
s0_act_bank = 0
s1_act_bank = 0
Table 7-5: Key Value Database
Key Name Type Description
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s0_vers2 = v0x08
s1_vers2 = v0x08
led_vers = v0x04
cnbsb_proto = dhcp
ipmc_vers1 = pp50-ipmc-v2.3.3b06
ipmc_act_bank = 0
ipmc_vers0 = pp50-ipmc-v2.4.0r00
cnbsa_proto = dhcp
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7.5 IPMI and PICMG Commands
This section lists all those commands which are currently supported on PP50.
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7.5.1 IPMI Device Global Commands
7.5.2 BMC Watchdog Timer Commands
7.5.3 Chassis Device Commands
Table 7-6: IPMI Device Global Commands
Command NetFn CMD
Get Device Id App (06h) 01h
Broadcast “Get Device
ID”
App (06h) 01h
Cold Reset App (06h) 02h
Note: In the handling of IPMI Cold Reset all the devices on the board are
reset.
Table 7-7: BMC Watchdog Timer Commands
Command NetFn CMD
Reset Watchdog Timer App (06h) 22h
Set Watchdog Timer App (06h) 24h
Get Watchdog Timer App (06h) 25h
Table 7-8: Chassis Device Commands
Command NetFn CMD
Get POH Counter Chassis (00h) 0Fh
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7.5.4 Event Commands
7.5.5 Sensor Device Commands
Table 7-9: Event Commands
Command NetFn CMD
Set Event Receiver S/E (04h) 00h
Get Event Receiver S/E (04h) 01h
Platform Event (a.k.a. “Event
Message”)
S/E (04h) 02h
Note: The Set Event Receiver command is only honored to change event
receiver address, if this command is received on an IPMB channel.
However, Get Event Receiver command is honored even from non-
ipmb channels and returns correct address of event receiver.
Table 7-10: Sensor Device Commands
Command NetFn CMD
Get Device SDR Info S/E (04h) 20h
Get Device SDR S/E (04h) 21h
Reserve Device SDR Repository S/E (04h) 22h
Get Sensor Reading Factor S/E (04h) 23h
Set Sensor Hysteresis S/E (04h) 24h
Get Sensor Hysteresis S/E (04h) 25h
Set Sensor Threshold S/E (04h) 26h
Get Sensor Threshold S/E (04h) 27h
Set Sensor Event Enable S/E (04h) 28h
Get Sensor Event Enable S/E (04h) 29h
Re-arm Sensor Events S/E (04h) 2Ah
Get Sensor Event Status S/E (04h) 2Bh
Get Sensor Reading S/E (04h) 2Dh
Set Sensor Reading And Event
Status*
S/E (04h) 30h
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* This command is only supported for these two Firmware Progress Sensors: XLR0
FW Progress and XLR1 FW Progress. Customer application can use sensor reading
value in the range 0x80 - 0xFF in Set Sensor Reading command to FW Progress
Sensors.
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7.5.6 FRU Device Commands
7.5.7 SDR Device Commands
7.5.8 SEL Device Commands
The CNode has 4K bytes of EEPROM for System Event Logging (SEL). IPMC mod-
ule only writes critical events in SEL, though all the events are sent to Shelf Manager
(if enabled). Currently IPMC logs only these types of events into onboard SEL:
Table 7-11: FRU Device Commands
Command NetFn CMD
Get FRU Inventory Area Info Storage (0Ah) 10h
Read FRU Data Storage (0Ah) 11
Write FRU Data Storage (0Ah) 12
Table 7-12: SDR Device Commands
Command NetFn CMD
Get SDR Repository Info Storage (0Ah) 20h
Reserve SDR Repository Storage (0Ah) 22h
Get SDR Storage (0Ah) 23h
Exit SDR Repository Update
Mode
Storage (0Ah) 2Bh
Table 7-13: SEL Device Commands
Command NetFn CMD
Get SEL Info Storage (0Ah) 40h
Get SEL Entry Storage (0Ah) 43h
Add SEL Entry Storage (0Ah) 44h
Clear SEL Storage (0Ah) 47h
Get SEL Time Storage (0Ah) 48h
Set SEL Time Storage (0Ah) 49h
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When upper non-recoverable threshold is crossed for a threshold based sensor.
Expiration of the BMC watchdog timer, provided don’t log flag is not set in the
previous “Set Watchdog Timer” command.
By default, IPMC modules does not overwrite SEL EEPROM once it is full and
rather it relies on Shelf Manager (and/or System Management application) to clear
on-board SEL. However, optionally, IPMC module does provide a mechanism to
rotate SEL logs, if desired. Key-Value database entry “sel_overwrite” requires to be
set to 1 to enable this optional SEL overwrite feature. Default value of this key
“sel_overwrite” is set to 0.
7.5.9 ATCA (PICMG 3.0) Commands
Please refer to the list below for ATCA commands.
Table 7-14: AdvancedTCA Commands
Command NetFn CMD
Get PICMG Properties PICMG (2Ch) 00h
Get Address Info PICMG (2Ch) 01h
FRU Control, see Section7.5.9.1, "FRU
Control Command" for details.
PICMG (2Ch) 04h
Get FRU LED Properties PICMG (2Ch) 05h
Get LED Color Capabilities PICMG (2Ch) 06h
Set FRU LED State PICMG (2Ch) 07h
Get FRU LED State PICMG (2Ch) 08h
Set IPMB State PICMG (2Ch) 09h
Set FRU Activation Policy PICMG (2Ch) 0Ah
Get FRU Activation Policy PICMG (2Ch) 0Bh
Set FRU Activation PICMG (2Ch) 0Ch
Get Device Locator Record ID PICMG (2Ch) 0Dh
Set Port State PICMG (2Ch) 0Eh
Get Port State PICMG (2Ch) 0Fh
Computer Power Properties PICMG (2Ch) 10h
Set Power Level PICMG (2Ch) 11h
Get Power Level PICMG (2Ch) 12h
FRU Control Capabilities PICMG (2Ch) 1Eh
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7.5.9.1 FRU Control Command
The “FRU Control” command provides base level control over the FRU’s Payload.
Through this command, the Payload can be reset, rebooted, or have its diagnostics
initiated. PICMG defines following four options for this command –
Cold Reset – This is a mandatory option. This option causes a hardware reset of
the payload, similar to a power on reset. No graceful shutdown of payload OS
occurs prior to this reset so user should issue this command keeping on mind
the impact of this reset.
Warm Reset – This is an optional option and is not supported as of now.
Graceful Reboot – This causes graceful shutdown and reboot of payload OS.
Please see Section7.5.9.1.1, "Configuration for Graceful Reboot of Payload" for
further details.
Issue Diagnostic Interrupt – This is an optional option and is not supported as
of now.
Since some parts of the “FRU Control” command are optional, the “FRU Control
Capabilities” command provides a way to query which specific options a FRU sup-
ports in the “FRU Control” command.
7.5.9.1.1 Configuration for Graceful Reboot of Payload
At present, graceful shutdown/reboot is only supported on Wind River Linux 2.0
BSP. A daemon named ipmcd (referred to as IPMCD_P) is on each payload (XLR) to
handle these requests from the IPMC. When IPMCD_P receives the hotswap events
for deactivation or graceful reboot from IPMC it executes the graceful shutdown or
graceful reboot.
Configuration File
IPMCD_P uses the IPMI watchdog command for graceful reboot timeout operation
and provides an interface to call customer scripts. The configuration file:
/etc/ipmcd/ipmcd.conf
uses IPMCD_P to configure the timeout and script location as follows.
“REBOOT_TIMEOUT” is timeout seconds for graceful reboot, the default is 120
seconds.
Note: Set FRU LED State command for the Lamp Test function is not
supported for individual LEDs. Therefore, to use the Lamp Test
function, you need to issue the Set FRU LED State command to
address all the LEDs at once by filling the LED ID byte as 0xff.
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“SCRIPT_PATH” is the path and name of the customer script. The script must
only return “0” or “1”. The “0” indicates the payload can support graceful
reboot now and will set a watchdog timer to the IPMC before it executes the
reboot. The “1” indicates the payload cannot support graceful reboot in its
present state. The default script is /etc/ipmcd/prepare_boot and just returns 0.
7.5.10 OEM API Commands
This section describes all the OEM commands supported by PP50. These OEM com-
mands can be issued either in IPMI message format or in SIPL message format (from
Payload).
In IPMI message format, NetFn Request code byte for all these OEM commands is
0x2e and the Response code byte is 0x2f.
In SIPL message format, NetFn Request code byte is 0xB8 and Response code byte is
0xB9. Please see example of OEM IPMI command syntax at the end of Sec-
tion7.5.10.1, "Get Payload CPU-Reset".
For each of the OEM commands request data and response data format is listed
below.
7.5.10.1 Get Payload CPU-Reset
Command: 50h
Sub-command: 0Ch.
Table 7-15: OEM Request and Response CodeBytes
NetFn Request Response
IPMI 0x2e 0x2f
SIPL 0xB8 0xB9
Table 7-16: Get Payload CPU-Reset Request Data
Byte Value Description
1st byte 3Ah IANA low byte
2nd byte 1Fh IANA mid byte
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Example using Pigeon Point ShMC:
Pigeon Point ShMc CLI allows sending arbitrary IPMI command using the com-
mand sendcmd. Using this command, PP50 can be queried to get the payload CPU-
Reset status of XLR0
Example using ipmitool:
Ipmitool is a freeware which can be used to send arbitrary IPMI command from a
host server.
Where 172.17.50.100 is the IP address of the Shelf Manager which bridges ipmitool’s
RMCP message to IPMB message towards PP50 blade at IPMB address 0x86.
3rd byte 00h IANA high byte
4th byte 0Ch Continuous Computing OEM
subcommand code
5th byte -- 00h Payload CPU #1 (XLR0)
01h Payload CPU #2 (XLR1)
Table 7-17: Get Payload CPU-Reset Response Data
Byte Value Description
1st byte 00h Completion code
2nd byte 3Ah IANA low byte
3rd byte 1Fh IANA mid byte
4th byte 00h IANA high byte
5th byte 0Ch Continuous Computing OEM
subcommand code
6th byte -- 00h Deasserted
01h Asserted
CLI> sendcmd 0x86 0x2e 0x50 0x3a 0x1f 0x00 0x0c 0x00
Completion code: 0x0 (0)
Response data: 3A 1F 00 0C 00
$ ipmitool -I lan -H 172.17.50.100 -t 0x86 -L user -P ““ raw 0x2e 0x50 0x3a 0x1f
0x00 0x0c 0x00 3a 1f 00 0c 00
Table 7-16: Get Payload CPU-Reset Request Data
Byte Value Description
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7.5.10.2 Set Payload CPU-Reset
Command: 50h
Sub-command: 0Dh.
7.5.10.3 Get Payload Active Flash Bank
Command: 50h
Table 7-18: Set Payload CPU-Reset Request Data.
Byte Value Description
1st byte 3Ah IANA low byte
2nd byte 1Fh IANA mid byte
3rd byte 00h IANA high byte
4th byte 0Dh Continuous Computing OEM
subcommand code
5th byte -- 00h Payload CPU #1 (XLR0)
01h Payload CPU #2 (XLR1)
6th byte -- 00h Deasserted
01h Asserted
02h Pulse (assert, then deassert)
Table 7-19: Set Payload CPU-Reset Response Data
Byte Value Description
1st byte 00h Completion code
2nd byte 3Ah IANA low byte
3rd byte 1Fh IANA mid byte
4th byte 00h IANA high byte
5th byte 0Dh Continuous Computing OEM
subcommand code
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Sub-command: 0Eh.
7.5.10.4 Set Payload Active Flash Bank
Command: 50h
Sub-command: 0Fh.
Table 7-20: Get Payload Active Flash Bank Request Data
Byte Value Description
1st byte 3Ah IANA low byte
2nd byte 1Fh IANA mid byte
3rd byte 00h IANA high byte
4th byte 0Eh Continuous Computing OEM
subcommand code
5th byte -- 00h Payload CPU #1 *XLR0)
01h Payload CPU #2 (XLR1)
Figure 7-1: Get Payload Active Flash Bank Response Data
Byte Value Description
1st byte 00h Completion code
2nd byte 3Ah IANA low byte
3rd byte 1Fh IANA mid byte
4th byte 00h IANA high byte
5th byte 0Eh Continuous Computing OEM
subcommand code
6th byte -- 00h Payload CPU #1 (XLR0)
01h Payload CPU #2 (XLR1)
7th byte -- 00h Bank 0
01h Bank 1
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To ensure that the flash memory isn't corrupted, the Set Payload Active Flash Bank
command will cause the IPMC to always assert CPU reset state (if it's not already
asserted), switch the flash bank, and then de-assert CPU reset.
7.5.10.5 Get Self Payload ID
This command may be used by payload to find out its payload ID. This command
cannot be sent on a non-payload channel and will generate error on non-payload
channel.
Command: 50h
Figure 7-2: Set Payload Active Flash Bank Request Data
Byte Value Description
1st byte 3Ah IANA low byte
2nd byte 1Fh IANA mid byte
3rd byte 00h IANA high byte
4th byte 0Fh Continuous Computing OEM
subcommand code
5th byte -- 00h Payload CPU #1 (XLR0)
01h Payload CPU #2 (XLR1)
6th byte -- 00h Bank 0
01h Bank 1
Figure 7-3: Set Payload Active Flash Bank Response Data
Byte Value Description
1st byte 00h Completion code
2nd byte 3Ah IANA low byte
3rd byte 1Fh IANA mid byte
4th byte 00h IANA high byte
5th byte 0Fh Continuous Computing OEM
subcommand code
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Sub-command: 20h
7.5.10.6 Get Payload ID for Watchdog Commands
Issue this command on non-payload channels. Per IPMI specification, the BMC
watchdog timer commands can be issued from the management interface (non-pay-
load channel) and this OEM command can be used prior to using the watchdog
commands to determine the current value of the payload ID.
All the subsequent watchdog timer commands on non-pay channels will be acted
on the payload identified by the ID returned by this command. On system startup
the default value of this payload ID is 0. The syntax of this command is given in the
table below.
Table 7-21: Get Self Payload ID Request Data
Byte Value Description
1st byte 0x3a IANA low byte
2nd byte 0x1f IANA mid byte
3rd byte 0x00 IANA high byte
4th byte 0x20 Continuous Computing OEM subcommand code
Table 7-22: Get Self Payload ID Response Data
Byte Value Description
1st byte -- Completion code
•0x00: Success
0xC1: Invalid command on non-payload
channel
0xC7: Invalid data len
0zCB: No sensor for this payload
2nd byte 0x3a IANA low byte
3rd byte 0x1f IANA mid byte
4th byte 0x00 IANA high byte
5th byte 0x20 Continuous Computing OEM subcommand code
5th byte -- Payload id:
0 for XLR0
1 for XLR1
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Command: 50h
Sub-command: 21h
Table 7-23: Get Payload ID for Watchdog Commands Request Data
Byte Value Description
1st byte 0x3a IANA low byte
2nd byte 0x1f IANA mid byte
3rd byte 0x00 IANA high byte
4th byte 0x21 Continuous Computing OEM subcommand code
Table 7-24: Get Payload ID for Watchdog Commands Response Data
Byte Value Description
1st byte -- Completion code:
•0x00: Success
0xC7: Invalid data len
0xCB: No payload sensors found
2nd byte 0x3a IANA low byte
3rd byte 0x1f IANA mid byte
4th byte 0x00 IANA high byte
5th byte 0x21 Continuous Computing OEM subcommand code
5th byte -- Payload id:
0 for XLR0
1 for XLR1
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7.5.10.7 Set Payload ID for Watchdog Commands
Issue this command on non-payload channels to set the payload ID for subsequent
watchdog commands from the non-payload channels. The syntax of this command
is given in the table below.
Command: 50h
Sub-Command: 22h
Table 7-25: Set Payload ID for Watchdog Commands Request Data
Byte Value Description
1st byte 0x3a IANA low byte
2nd byte 0x1f IANA mid byte
3rd byte 0x00 IANA high byte
4th byte 0x22 Continuous Computing OEM subcommand code
5th byte -- Payload id:
0 for XLR0
1 for XLR1
Table 7-26: Set Payload ID for Watchdog Commands Response Data
Byte Value Description
1st byte -- Completion code:
•0x00: Success
0xC7: Invalid data len
0xCB: No payload sensors found
0xCC: Invalid payload id, no sensor for this
payload id
2nd byte 0x3a IANA low byte
3rd byte 0x1f IANA mid byte
4th byte 0x00 IANA high byte
5th byte 0x22 Continuous Computing OEM subcommand code
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7.5.10.8 Get IPMC Key N
Command: 50h
Sub-command: 10h.
Table 7-27: Get IPMC Key N Request Data
Byte Value Description
1st byte 3Ah IANA low-byte
2nd byte 1Fh IANA mid-byte
3rd byte 00h IANA high-byte
4th byte 10h Continuous Computing OEM Subcommand Code
5th byte - index of “key” to retrieve
Table 7-28: Get IPMC Key N Response Data
Byte Value Description
1st byte -- Completion Code:
0x00: Success.
0xC7: Total number of data bytes is incorrect.
2nd byte 3Ah IANA low-byte
3rd byte 1Fh IANA mid-byte
4th byte 00h IANA high-byte
5th byte 10h Continuous Computing OEM Subcommand Code
6th byte n length of the “key”
0 = invalid key index was specified in the request
1 to 14 = number of bytes of “value” that follow
[7:6+n] - “key” bytes, 1 to 14 bytes
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7.5.10.9 Get IPMC Key-Value
Command: 50h
Sub-command: 11h.
Table 7-29: Get IPMC Key-Value Request Data
Byte Value Description
1st byte 3Ah IANA low-byte
2nd byte 1Fh IANA mid-byte
3rd byte 00h IANA high-byte
4th byte 11h Continuous Computing OEM Subcommand Code
5th byte m 1 to 14 = number of bytes of “key” that follow
6th byte n 1 to 16 = number of bytes of “value” to retrieve
7th byte o 0 to 31 = offset of “value” to retrieve
[8:7+m] - “key” bytes, 1 to 14 bytes long
Table 7-30: Get IPMC Key-Value Response Data
Byte Value Description
1st byte -- Completion Code:
0x00: Success.
0xC7: Total number of data bytes is incorrect.
0xC9: Either key size is incorrect, key-value len is
incorrect, or key value offset is incorrect.
2nd byte 3Ah IANA low-byte
3rd byte 1Fh IANA mid-byte
4th byte 00h IANA high-byte
5th byte 11h Continuous Computing OEM Subcommand Code
6th byte m 1 to 32 = total size of the “value”
7th byte o 0 = invalid “key” or offset was specified in the request
1 to 16 = number of bytes of “value” that follow
[8:7+n] - “value” bytes, 1 to 16 bytes
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7.5.10.10 Set IPMC Key-Value
Command: 50h
Sub-command: 12h.
Table 7-31: Set IPMC Key-Value Request Data
Byte Value Description
1st byte 3Ah IANA low-byte
2nd byte 1Fh IANA mid-byte
3rd byte 00h IANA high-byte
4th byte 12h Continuous Computing OEM Subcommand
Code
5th byte m 1 to 14 = number of bytes of “key”
6th byte n number of “value” bytes that follow
0 = delete the key/value entry
1 to 8 = number of “value” bytes
7th byte - total size of the “value”
0 = delete the key/value entry
1 to 32 = total length of the “value”
8th byte - 0 to 31 = offset of the “value” to set
[9:8+m] - “key” bytes, where m = 1 to 14
[9+m:8+m+n] - “value” bytes, where n = 1 to 8
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Notes:
1. The key/value variables are persistent across firmware updates
2. If the length of the “value” is 0, then the key/value entry is removed
3. When sending this OEM command on an IPMB channel, make sure that total
number of data bytes is 25 or less so as to fit into one IPMI message. IPMI
message size on an IPMB channel is 32 bytes which includes 7 bytes of IPMI
message header.
Table 7-32: Set IPMC Key-Value Response Data
Byte Value Description
1st byte -- Completion Code:
•0x00: Success.
0xC7: Total number of data bytes is incorrect.
0xC9: either key size is incorrect, Or key-value
len is incorrect, Or total value len of key is
incorrect, Or key value offset is incorrect.
0xCC: Request to delete / update an RO kv
key, i.e. data field “key” is invalid.
0xFF: Deletion of a key failed because of error
in writing eeprom or some other internal error.
0xCB: Deletion request of a key which does not
exist.
0xC4: key update/create is failed because of
failure in eeprom write and/or eeprom space.
2nd byte 3Ah IANA low-byte
3rd byte 1Fh IANA mid-byte
4th byte 00h IANA high-byte
5th byte 12h Continuous Computing OEM Subcommand Code
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7.5.10.11 Get IPMC Key-Value Extended
This is an extended version of “Get IPMC Key-Value” command. This command is
only applicable on a non-IPMB channel (for example, payload channel or Direct
RMCP to CNode). This command allows user to request complete key value length
of 32 bytes in one single Get Key value request message.
Command: 50h
Sub-command: 13h .
Table 7-33: Get IPMC Key-Value Extended Request Data
Byte Value Description
1st byte 3Ah IANA low-byte
2nd byte 1Fh IANA mid-byte
3rd byte 00h IANA high-byte
4th byte 13h Continuous Computing OEM Sub-command Code
5th byte m 1 to 14 = number of bytes of “key” that follow
6th byte n 1 to 32 = number of bytes of “value” to retrieve
7th byte o 0 to 31 = offset of “value” to retrieve
[8:7+m] - “key” bytes, 1 to 14 bytes long
Table 7-34: Get IPMC Key-Value Extended Response Data
Byte Value Description
1st byte -- Completion code:
0xC7: Total number of data bytes is incorrect.0x00:
Success
0xC1: Request on IPMB channel. This command is
only applicable on non-IPMB channel
0xC7: Total number of data bytes in incorrect
0xC9: Either key size if incorrect, key-value len is
incorrect, or key value offset is incorrect.
2nd byte 3Ah IANA low-byte
3rd byte 1Fh IANA mid-byte
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