NCV48920 www.onsemi.com 2 Figure 2. Simplified Block Diagram V out Enable V in EN Charge Pump Power Switches Charge Pump Drivers and Logic C C− V CP V ref Monitor
Charge Pump Buck/Boost Converter, LDO Regulator, Very Low Quiescent Current, 600 mA/300 mA NCV48920 The NCV48920 is 600 mA buck and 300 mA boost charge pump regulator with integrated Very Low Quiescent Current LDO regulator for automotive applications. The NCV48920 requires very low number of external components. The Enable function can be used to disable the chip and hence to reduce quiescent current down to 1 mA. The NCV48920 contains protection functions such as current limit, thermal shutdown and reverse bias current protection. Features · Output Voltage: 5 V · Output Current: 600 mA Buck and 300 mA Boost Mode · Buck Mode Input Voltage Operation: down to 11.8 V · Boost Mode Input Voltage Operation: from 3 V · Enable Function (1 mA max quiescent current when disabled) · Microprocessor Compatible Control Functions: Reset Output Enable Input · NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q100 Grade 1 Qualified and PPAP Capable · Protection Features: Current Limitation Thermal Shutdown Reverse Bias Output Current · This is a Pb-Free Device Typical Applications (for safety applications refer to Figure 37) · Stop-Start Applications · Body Electronics · Instruments and Clusters · Infotainment · LED Supply CFLY www.onsemi.com MARKING DIAGRAMS 14 V489 14 TSSOP-14 EPAD CASE 948AW 20xz ALYWG 1 G 1 x = Output Voltage Option: 5 - 5 V z = Reset Delay Time Options: = 0 - 0 ms, 1 - 2 ms, 2 - 4 ms, = 3 - 8 ms, 4 - 16 ms, 5 - 32 ms, = 6 - 64 ms, 7 - 128 ms A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 16 of this data sheet. VBAT C+ C- Vout Vin Vout VDD C in VCP Cout CCP NCV48920 Microprocessor RO I/O OFF ON EN GND Figure 1. Application Schematic © Semiconductor Components Industries, LLC, 2018 1 July, 2020 - Rev. 1 Publication Order Number: NCV48920/D NCV48920 C+ C- VCP Vin Vin VCP Vref Iout_mon Charge Pump Power Switches Charge Pump Vref Drivers and Logic LDO with Overcurrent and Overtemperature Protections and Reset Circuitry Vout RRO RO Iout_mon Monitor EN Enable Vref Vref GND Figure 2. Simplified Block Diagram 1 VCP NC C+ NC C- NC Vin EPAD Vout RO NC NC EN NC GND TSSOP-14 EPAD Figure 3. Pin Connections (Top View) PIN FUNCTION DESCRIPTION Pin No. Pin Name Description 1 VCP Charge Pump Output Voltage (Input Voltage of LDO). 2 NC Not Connected. 3 C+ Flying Capacitor Positive Connection. 4 NC Not Connected. 5 C- Flying Capacitor Negative Connection. 6 NC Not Connected 7 Vin Charge Pump Input Voltage. 8 GND Power Supply Ground. 9 NC Not Connected. 10 EN Enable Input; low level disables the IC. 11 NC Not Connected. 12 NC Not Connected. 13 RO Reset Output. 30 kW internal Pull-up resistor connected between RO and Vout. RO goes Low when Vout is out of regulation. See ELECTRICAL CHARCTERISTICS table for delay time specifications. 14 EPAD Vout EPAD Regulated Output Voltage of LDO. Connect to ground potential or leave unconnected. www.onsemi.com 2 NCV48920 MAXIMUM RATINGS Rating Symbol Min Max Unit Charge Pump Input Voltage DC (Note 1) Charge Pump Input Voltage, Enable Input Voltage (Note 2) Load Dump Suppressed Vin -0.3 Us* - 40 V 45 V Charge Pump Output Voltage VCP -0.3 25 V Positive Flying Capacitor Voltage VC+ -0.3 25 V Negative Flying Capacitor Voltage VC- -0.3 40 V Regulated Output Voltage Vout -0.3 16 V Enable Input Voltage VEN -0.3 40 V Reset Output Voltage VRO -0.3 16 V Maximum Junction Temperature TJ(max) - 150 °C Storage Temperature TSTG -55 150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 2. Load Dump Test B (with centralized load dump suppression) according to ISO16750-2 standard. Guaranteed by design. Not tested in production. Passed Class A according to ISO16750-1. ESD CAPABILITY (Note 3) Rating Symbol Min Max Unit ESD Capability, Human Body Model ESDHBM -2 2 kV ESD Capability, Charged Device ESDCDM -1 1 kV 3. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC-Q100-002 (JS-001-2017) Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes smaller than 2 x 2 mm due to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current waveform characteristic defined in JEDEC JS-002-2018 LEAD SOLDERING TEMPERATURE AND MSL (Note 4) Rating Symbol Value Unit Moisture Sensitivity Level MSL 1 - 4. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. THERMAL CHARACTERISTICS Rating Symbol Value Unit Thermal Characteristics, TSSOP-14 EPAD Thermal Resistance, Junction-to-Air (Note 5) Thermal Reference, Junction-to-Lead (pin 3-5 or 10-12) (Note 5) Thermal Resistance, Junction-to-Air (Note 6) Thermal Reference, Junction-to-Lead (pin 3-5 or 10-12) (Note 6) RJA RJL RJA RJL °C/W 59 21.0 35 16.0 5. Values based on 1s0p board with copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. Single layer according to JEDEC51.3. 6. Values based on 1s2p board with copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. 4 layers according to JEDEC51.7. RECOMMENDED OPERATING RANGES Rating Symbol Min Max Unit Charge Pump Input Voltage for Buck Mode Vin 11.8 40 V Charge Pump Input Voltage for Boost Mode Vin 3 6.3 V Charge Pump Output Voltage (Input Voltage of LDO) VCP 3.5 15 V Junction Temperature TJ -40 150 °C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 3 NCV48920 ELECTRICAL CHARACTERISTICS Vin = 13.5 V, VEN = 3 V, ICP = 0 mA, CFLY = 10 mF, CCP = 10 mF. Min and Max values are valid for temperature range -40°C TJ 150°C unless noted otherwise and are guaranteed by test, design or statistical correlation. Typical values are referenced to TJ = 25°C. (Note 7) Parameter Test Conditions Symbol Min Typ Max Unit CHARGER PUMP OUTPUT Undervoltage Lockout Vin rising Vin falling Vin_UVLO 2.6 2.2 Charge Pump Operating Range Buck Mode VCP decreasing (buck mode OFF threshold) Vbuck 5.1 Vin increasing (buck mode ON threshold) 11.8 Charge Pump Operating Current Threshold Iout decreasing, Iout_cp_OFF 5 for Buck Mode ICP = 0 mA (no load connected to VCP pin) Charge Pump Operating Range Boost Mode VCP decreasing (boost mode ON threshold) Vboost 5.1 Vin increasing (boost mode OFF threshold) 5.9 Charge Pump Voltage Drop (Vin VCP) Vin = 7 V, Iout = 300 mA VDO_CP - Charge Pump Output Voltage Limit Vin = 32 V to 40 V Iout = 0.1 mA V to 600 mA VCP_LIM 13 Charge Pump Output Current Limit VCP = 0 V (shorted to GND) ICP_LIM 800 Charge Pump Output Impedance Vin = 3 V, Iout = 150 mA Rout_CP - Switching Frequency Vin = 3 V fSW 400 REGULATOR OUTPUT 2.8 3.0 V 2.4 2.6 5.3 5.5 V 12.2 12.6 15 25 mA 5.3 5.5 V 6.1 6.3 250 700 mV 14 15 V - 1800 mA 3.2 - W 450 500 kHz Output Voltage (Accuracy%) TJ = -40°C to 150°C Vin = 13.5 V, Iout = 0.1 mA to 600 mA Output Voltage (Accuracy%) TJ = 25°C Vin = 12.2 V, Iout = 500 mA Output Voltage (Accuracy%) TJ = -40°C to 150°C Vin = 8 V, Iout = 0.1 mA to 600 mA Output Voltage (Accuracy%) TJ = 25°C Vin = 3 V, Iout = 300 mA Output Voltage (Accuracy%) TJ = -40°C to 150°C Vin = 3 V, Iout = 150 mA Dropout Voltage (Note 8) Iout = 300 mA QUIESCENT CURRENT AND DISABLE CURRENT Vout 4.9 5.0 5.1 V (-2%) (+2%) Vout 4.8 5.0 5.1 V (-4%) (+2%) Vout 4.9 5.0 5.1 V (-2%) (+2%) Vout 4.8 5.0 5.1 V (-4%) (+2%) Vout 4.8 5.0 5.1 V (-4%) (+2%) VDO - 150 300 mV Disable Current Quiescent Current CURRENT LIMIT PROTECTION VEN = 0 V, TJ < 85°C Iout = 0.1 mA, TJ = 25°C Iout = 0.1 mA, TJ < 85°C IDIS - - 1.5 mA Iq - 45 50 mA - - 55 Current Limit Short Circuit Current Limit ENABLE Vin = 0 V, VCP = 10 V, Vout = 0.96 x Vout_nom ILIM Vin = 0 V, VCP = 10 V, Vout = 0 V ISC 650 - 1600 mA - 1000 - mA Enable Input Threshold Voltage Logic Low Logic High Vth(EN) - - 0.8 V 2.5 - - Enable Input Current RESET OUTPUT Logic High VEN = 5 V Logic Low VEN = 0 V, TJ < 85°C IEN_ON - 3 5 mA IEN_OFF - 0.5 1 Reset Output Thresholds High Vout decreasing Low Vout increasing Reset Output Low Voltage Integrated Reset Output Pull Up Resistor IRO < 200 mA, Vout > 1 V Reset Delay Time (Note 9) Min Available Time Max Available Time Vth(RO) VROL RRO tRD 90 90.5 - 15 - 102.4 92.5 - 0.15 30 0 128 95 97 0.25 50 - 153.6 % of Vout V k ms www.onsemi.com 4 NCV48920 ELECTRICAL CHARACTERISTICS Vin = 13.5 V, VEN = 3 V, ICP = 0 mA, CFLY = 10 mF, CCP = 10 mF. Min and Max values are valid for temperature range -40°C TJ 150°C unless noted otherwise and are guaranteed by test, design or statistical correlation. Typical values are referenced to TJ = 25°C. (Note 7) Parameter Test Conditions Symbol Min Typ Max Unit RESET OUTPUT Reset Reaction Time THERMAL SHUTDOWN tRR 16 25 38 ms Thermal Shutdown Temperature (Note 10) TSD 150 175 195 °C Thermal Shutdown Hysteresis (Note 10) TSH - 10 - °C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 7. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA TJ. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible 8. Measured when output voltage falls 100 mV below the regulated voltage at VCP = 13.5 V. 9. Reset Delay Times can be chosen from list: 0, 2, 4, 8, 16, 32, 64, 128 ms (Reset Delay Time 0 ms represents Power Good function) and these delay times are factory preset. 10. Values based on design and/or characterization. www.onsemi.com 5 Iq, QUIESCENT CURRENT (mA) Vout, OUTPUT VOLTAGE (V) NCV48920 TYPICAL CHARACTERISTICS 80 70 60 50 40 30 20 10 Vin = 13.5 V Iout = 100 mA 0 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 4. Quiescent Current vs. Junction Temperature 5.10 5.05 Vin = 12.2 V Vin = 13.5 V 5.00 Vout, OUTPUT VOLTAGE (V) 5.10 5.08 5.06 5.04 5.02 5.00 4.98 4.96 4.94 4.92 4.90 -40 -20 0 Vin = 13.5 V Iout = 100 mA 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 5. Output Voltage vs. Junction Temperature 6 Vin decrease at Power Down (from 14 V) 5 4 Vin increasing at Power Up (from 0 V) Vout, OUTPUT VOLTAGE (V) 4.95 4.90 Vin = 3.0 V 4.85 TJ = 25°C 4.80 0 100 200 300 400 500 600 Iout, OUTPUT CURRENT (mA) Figure 6. Output Voltage vs. Output Current 3 2 1 TJ = 25°C Iout = 150 mA 0 0 2 4 6 8 10 12 14 Vin, INPUT VOLTAGE (V) Figure 7. Output Voltage vs. Input Voltage 500 450 TJ = 125°C 400 350 300 TJ = 25°C 250 200 150 TJ = -40°C 100 50 0 0 100 200 300 400 500 600 Iout, OUTPUT CURRENT (mA) Figure 8. Dropout Voltage vs. Output Current VDO, DROPOUT VOLTAGE (mV) 300 250 200 150 100 50 Iout = 300 mA 0 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 9. Dropout Voltage vs. Junction Temperature VDO, DROPOUT VOLTAGE (mV) www.onsemi.com 6 ILIM, OUTPUT CURRENT LIMIT (mA) ESR (W) NCV48920 TYPICAL CHARACTERISTICS 1200 1000 800 600 TJ = 25°C TJ = -40°C TJ = 125°C 400 200 0 0 Vout = 0 V 2 4 6 8 10 12 14 16 Vin, INPUT VOLTAGE (V) Figure 10. Output Current Limit vs. Input Voltage ILIM, OUTPUT CURRENT LIMIT (mA) 1200 1150 1100 1050 1000 950 900 850 800 -40 -20 0 20 40 Vout = 0 V 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 11. Output Current Limit vs. Junction Temperature 100 100 Unstable Region 10 10 ESR (W) 1 Stable Region 1 Stable Region 0.1 0.01 0 Vin = 11 V Cout = 4.7 mF - 100 mF 100 200 300 400 500 600 Iout, OUTPUT CURRENT (mA) Figure 12. Output Stability with Output Capacitor ESR 60 5.4 5.275 V 50 40 30 23 V 20 10 7 V 0 -1 0 1 2 5.2 4.900 V Vout 5 CCP = CFLY = Cout = 10 mF 4.8 TJ = 25°C Iout = 5 mA 4.6 trise/fall = 1 ms 4.4 Vin 4.2 3456789 TIME (ms) Figure 14. Line Transient Vout, OU,TPUT VOLTAGE (V) Iout, OUTPUT CURRENT (mA) 0.1 0.01 0 Vin = 16 V - 40 V CCP = 10 mF - 100 mF 100 200 300 400 500 600 Iout, OUTPUT CURRENT (mA) Figure 13. Charge Pump Output Stability with Charge Pump Output Capacitor ESR 1400 1200 1000 800 600 400 4.950 V 600 mA 5.175 V 5.4 5.2 Vout 5 4.8 CCP = CFLY = Cout = 10 mF TJ = 25°C 4.6 Vin = 13.5 V trise/fall = 1 ms 4.4 200 5 mA 0 -0.2 0 0.2 0.4 0.6 0.8 1 4.2 Iout 4 1.2 1.4 1.6 1.8 TIME (ms) Figure 15. Load Transient Vout, OUTPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) www.onsemi.com 7 Vout, OUTPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) VCP, CHARGE PUMP OUTPUT VOLTAGE (V) IEN, ENABLE CURRENT (mA) NCV48920 TYPICAL CHARACTERISTICS Vout, OUTPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) VCP, CHARGE PUMP OUTPUT VOLTAGE (V) 14 20 12 VCP 18 10 16 8 14 6 Vin 12 4 10 2 8 0 Vout 6 -2 4 -4 TJ = 25°C, Iout = 5 mA CCP = CFLY = Cout = 10 mF 2 -6 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 TIME (s) Figure 16. Start Up and Shut Down with Input Voltage 10 9 TJ = 125°C 8 TJ = 25°C 7 6 5 TJ = -40°C 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 VEN, ENABLE VOLTAGE (V) Figure 18. Enable Current vs. Enable Voltage (low range) 10 9 Vin = 13.5 V 8 7 6 5 4 3 2 1 0 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 20. Disable Current vs. Junction Temperature Vth(RO), OUTPUT VOLTAGE RESET THRESHOLD (V) IEN, ENABLE CURRENT (mA) 14 20 12 18 10 VCP 16 8 14 6 Vin 12 4 10 2 8 0 Vout 6 -2 4 -4 TJ = 25°C, Iout = 300 mA CCP = CFLY = Cout = 10 mF 2 -6 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 TIME(s) Figure 17. Start Up and Shut Down with Input Voltage 45 TJ = 125°C 40 35 TJ = 25°C 30 25 TJ = -40°C 20 15 10 5 0 0 5 10 15 20 25 30 35 40 VEN, ENABLE VOLTAGE (V) Figure 19. Enable Current vs. Enable Voltage (high range) 4.9 4.85 Vin = 13.5 V 4.8 4.75 Vout increasing 4.7 4.65 Vout decreasing 4.6 4.55 4.5 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 21. Output Voltage Reset Threshold vs. Junction Temperature IDIS, DISABLE CURRENT (mA) www.onsemi.com 8 VUVLO, UNDERVOLTAGE LOCKOUT THRESHOLD (V) Vbuck, CHARGE PUMP OPERATING THRESHOLD (V) NCV48920 TYPICAL CHARACTERISTICS 3 2.9 VUVLO_Upper 2.8 2.7 2.6 2.5 VUVLO_Lower 2.4 2.3 2.2 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 22. Undervoltage Lockout vs. Junction Temperature 14 Vbuck_ON (Vin) Iout = 5 mA 12 10 8 6 Vbuck_OFF (VCP) 4 2 0 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 24. Charge Pump Operating Threshold vs. Junction Temperature (Buck Mode) 6 5 4 3 2 1 Vin = 3 V Iout = 150 mA 0 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 26. Charge Pump Output Impedance vs. Junction Temperature (Boost Mode) Rout_CP, CHARGE PUMP OUTPUT IMPEDANCE (W) Iout_cp_OFF, CHARGE PUMP OPERATING CURRENT THRESHOLD (mA) Vboost, CHARGE PUMP OPERATING THRESHOLD (V) 6.3 Iout = 100 mA 6.1 Vboost_OFF (Vin) 5.9 5.7 5.5 Vboost_ON (VCP) 5.3 5.1 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 23. Charge Pump Operating Threshold vs. Junction Temperature (Boost Mode) 25 23 Vin = 13.5 V 21 19 17 15 13 11 9 7 5 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 25. Charge Pump Operating Threshold vs. Junction Temperature (Buck Mode) 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -40 -20 0 Vin = 14 V Iout = 300 mA 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 27. Charge Pump Output Impedance vs. Junction Temperature (Buck Mode) Rout_CP, CHARGE PUMP OUTPUT IMPEDANCE (W) www.onsemi.com 9 fSW, SWITCHING FREQUENCY (kHz) NCV48920 TYPICAL CHARACTERISTICS 500 490 480 470 460 450 440 430 420 410 400 -40 -20 0 Vin = 3 V 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 28. Switching Frequency vs. Junction Temperature h, EFFICIENCY (%) 100 90 80 70 Iout = 300 mA 60 50 40 Iout = 150 mA 30 20 TJ = 25°C Cin = 4.7 mF 10 CCP = CFLY = Cout = 10 mF 0 0 2 4 6 8 10 12 14 16 Vin, INPUT VOLTAGE (V) 18 20 Figure 29. Efficiency vs. Input Voltage Vout, OUTPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) VCP, CHARGE PUMP OUTPUT VOLTAGE (V) 14 20 12 18 VCP 10 16 8 14 6 12 4 Vin 10 2 8 0 Vout 6 -2 -4 TJ = 25°C, Iout = 100 mA, Cin = 4.7 mF CCP = CFLY = Cout = 10 mF -6 -0.2 0 0.2 0.4 0.6 0.8 1 1.2 TIME (s) 4 2 0 1.4 1.6 1.8 Figure 30. Starting Profile Transient 14 20 12 VCP 18 10 16 8 14 6 Vin 12 4 10 2 8 0 Vout 6 -2 -4 -6 TJ = 25°C, Iout = 300 mA, Cin = 4.7 mF CCP = CFLY = Cout = 10 mF -0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 TIME (s) 4 2 0 1.6 1.8 Figure 31. Starting Profile Transient Vout, OUTPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) VCP, CHARGE PUMP OUTPUT VOLTAGE (V) www.onsemi.com 10 Vin Vbuck(Vin) Vboost(Vin) Vin_UVLO rise Vin_UVLO fall VCP VCP_LIM Vbuck(Vcp) Vboost(Vcp) Vout Vout V +V th(RO) hys(RO) Vth(RO) VRO VROH VROL NCV48920 I I I I out < out_cp_OFF out > out_cp_OFF LDO mode t Boost mode OFF LDO mode Buck mode LDO mode LDO Buck mode mode LDO mode Boost mode Boost mode Figure 32. Charge Pump Function Short term overcurrent < tRR Long term overcurrent > tRR tRD tRR tRD Figure 33. Reset Function and Timing Diagram t t t tRR t www.onsemi.com 11 NCV48920 DEFINITIONS General All measurements are performed using short pulse low duty cycle techniques to maintain junction temperature as close as possible to ambient temperature. Output Voltage The output voltage parameter is defined for specific temperature, input voltage and output current values or specified over Line, Load and Temperature ranges. Charge Pump Output Voltage The charge pump output voltage level depends on the operating mode and is internally limited. The protected output can be used to supply other application with a limited supply range with respect to the total charge pump output current. Line Regulation The change in output voltage for a change in input voltage measured for specific output current over operating ambient temperature range. Load Regulation The change in output voltage for a change in output current measured for specific input voltage over operating ambient temperature range. Dropout Voltage The charge pump output to regulated output differential at which the regulator output no longer maintains regulation against further reductions in charge pump output voltage. It is measured when the output drops 100 mV below its nominal value. The junction temperature, load current, and minimum input supply requirements affect the dropout level. the output load current. If Enable pin is set to LOW the regulator reduces its internal bias and shuts off the output, this term is called the disable current (IDIS). Current Limit Current Limit is value of output current by which output voltage drops below 96% of its nominal value. PSRR Power Supply Rejection Ratio is defined as ratio of output voltage and input voltage ripple. It is measured in decibels (dB). Line Transient Response Typical output voltage overshoot and undershoot response when the input voltage is excited with a given slope. Load Transient Response Typical output voltage overshoot and undershoot response when the output current is excited with a given slope between low-load and high-load conditions. Thermal Protection Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 175°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. Maximum Package Power Dissipation The power dissipation level is maximum allowed power dissipation for particular package or power dissipation at which the junction temperature reaches its maximum operating value, whichever is lower. Quiescent and Disable Currents Quiescent Current (Iq) is the difference between the input current (measured through the charge pump input pin) and www.onsemi.com 12 NCV48920 APPLICATIONS INFORMATION Circuit Description The NCV48920 is an integrated low dropout regulator with integrated battery voltage charge pump buck/boost converter that provides a regulated voltage. The output current capability is 600 mA in buck mode and 300 mA in boost mode. Device is enabled with an input to the enable pin. The regulator voltage is provided by a PMOS pass transistor controlled by an error amplifier with a bandgap reference, which gives it the lowest possible dropout voltage. The quiescent current is controlled to prevent oversaturation when the input voltage is low or when the output is overloaded. Thermal shutdown occurs above 150°C to protect the IC during overloads and extreme ambient temperatures. Charge pump The NCV48920 can operate in the three following modes: Buck, LDO and Boost Mode. In the basic view actual operation mode depends on input voltage level, charge pump output voltage level and output current value. The exact behavior are described in the section Charge Pump Operation Mode Selection. Charge pump output voltage is internally limited to 15 V maximally. It is a protected output which can be used as an onboard voltage supply. Example is on Figure 34. Regulator The error amplifier compares the reference voltage to a sample of the output voltage (Vout) and drives the gate of a PMOS series pass transistor via a buffer. The reference is a bandgap design to give it a temperature-stable output. Saturation control of the PMOS is a function of the load current and input voltage. Oversaturation of the output C FLY power device is prevented, and quiescent current in the ground pin is minimized. Current limit and voltage monitors complement the regulator design to give safe operating signals to the processor and control circuits. Regulator Stability Considerations The input capacitor (Cin) is necessary to stabilize the input impedance to avoid voltage line influences. The charge pump output capacitor (CCP) reduces the voltage ripple at the charge pump output pin and serves as a voltage reservoir during switching between operation modes. The output capacitor (Cout) helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25°C to -40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturer's data sheet usually provides this information. The value for the output capacitor 10 mF (Cout), shown in Figure 1 should work for most applications; see also Figure 12 for output stability at various load and Output Capacitor ESR conditions. Stable region of ESR in Figure 12 shows ESR values at which the regulated output voltage does not have any permanent oscillations at any dynamic changes of output load current. Marginal ESR is the value at which the output voltage waving is fully damped during four periods after the load change and no oscillation is further observable. ESR characteristics were measured with ceramic capacitors and additional series resistors to emulate ESR. Low duty cycle pulse load current technique has been used to maintain junction temperature close to ambient temperature. V BAT C in C+ Vin C- Vout NCV48920 VCP GND Cout V in Vout CCP NCV4264-2C 5 V rail (e.g. MCU IO Supply) 3.3 V rail (e.g. MCU IO Supply) Cout GND Figure 34. Onboard Dual Voltage Supply www.onsemi.com 13 NCV48920 List of recommended output capacitors: GCM31CR71E475MA55 (4.7 mF, 25 V, X7R, 1206) GCM31CC71E106MA03 (10 mF, 25 V, X7S, 1206) KCM55WC71E107MH13 (100 mF, 25 V, X7S, 2220) CGA5L1X7R1E475M (4.7 mF, 25 V, X7R, 1206) CGA5L1X7R1E106M (10 mF, 25 V, X7R, 1206) CKG57NX7S1C107M (100 mF, 16 V, X7S, 2220) Charge Pump Capacitor Selection Low ESR capacitors are necessary to minimize power losses. Especially in case of operation in buck or boost mode at a high load current. The exact value of CFLY and CCP is not strictly given. A 10 mF CFLY is an optimum to yield maximum performance of the charge pump. Charge pump output impedance (Rout_CP) is given by Equation 1. Rout_CP ^ 2 RSW ) fSW 1 CFLY ) 4 (eq. 1) ESRCFLY ) ESRCCP Charge pump output voltage ripple is determined by the value of CCP and the load current (Iout). The CCP is charged and discharged at a current roughly equal to the load current. Vripple_CP + 2 Iout fSW CCP (eq. 2) This equation doesn't including the impact of non-overlap time and CCP capacitor ESR. Since the output is not being driven during the non-overlap time, this time should be included in the ripple calculation. The CCP capacitor discharge time is approximately 60% of a switching period Vripple_CP + Iout fSW 0.6 CCP ) 2 ESRCCP (eq. 3) For example, with a 450 kHz switching frequency, a 10 mF CCP capacitor with an ESR of 0.25 W and a 100 mA load the ripple voltage is 65 mV peak to peak. Charge Pump Operation Mode Selection The NCV48920 can operate in three different modes, which are LDO mode (simple LDO regulator), Boost mode (Step-Up regulator) and Buck mode (Step-Down regulator). The automated selection of the operation mode depends on the actual voltage level at the input supply pin, charge pump output pin and the actual output current level. Detailed operation mode selection is shown in Figure 35. Device OFF Vin < Vin_ULVO or VEN < Vth(EN) Vin > Vin_ULVO and VEN > Vth(EN) Vin < Vin_ULVO or VEN < Vth(EN) (VCP < Vbuck(Vcp) and Vin < Vbuck(Vin)) or Iout < Iout_cp_OFF PASS after ULVO Vin > Vboost(Vin) Vin > Vboost(Vin) Buck mode LDO mode Boost mode Vin > Vbuck(Vin) and Iout > Iout_cp_OFF VCP < Vboost(Vcp) and Vin < Vboost(Vin) Figure 35. Flowchart for Operation Mode Selection The NCV48920 starts always in LDO mode and stays in LDO mode until Buck or Boost mode is not activated. The conditions for switching from LDO mode to Buck mode are as follows: Vin > Vbuck(Vin) AND Iout > Iout_cp_OFF The conditions for switching from Buck mode to LDO mode are as follows: (Vin < Vbuck(Vin) AND VCP < Vbuck(Vcp)) OR Iout < Iout_cp_OFF The conditions for switching from LDO mode to Boost mode are as follows: (VCP < Vboost(Vcp) AND Vin < Vboost(Vin)) AND in the past Vin > Vboost(Vin) The condition for switching from Boost mode to LDO mode is as follow: Vin > Vboost(Vin) Enable Input The enable pin is used to turn the regulator on or off. By holding the pin below 0.8 V, the output of the regulator will be turned off. When the voltage on the enable pin is greater than 2.5 V, the output of the regulator will be enabled to power its output to the regulated output voltage. The enable pin may be connected directly to the input pin to give constant enable to the output regulator. www.onsemi.com 14 NCV48920 Thermal Considerations As power in the NCV48920 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. When the NCV48920 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power applications. The maximum dissipation the NCV48920 can handle is given by: PD(MAX) + TJ(MAX) ) TA RqJA (eq. 4) Since TJ is not recommended to exceed 150°C, then the NCV48920 soldered on 645 mm2, 1 oz copper area, FR4 can dissipate up to 2.1 W and up to 3.5 W for 3 layers PCB (all layers are 1 oz) when the ambient temperature (TA) is 25°C. See Figure 36 for RqJA versus PCB area. RqJA, THERMAL RESISTANCE (°C/W) 200 180 160 140 120 100 80 60 40 20 0 0 1 oz, 1s0p 2 oz, 1s0p 1 oz, 1s2p 2 oz, 1s2p 100 200 300 400 500 600 700 800 900 COPPER HEAT SPREADER AREA (mm2) Figure 36. Thermal Resistance vs. PCB Copper Area (TSSOP-14 EP) Power dissipated is given by three main parts. The first is dependent on the charge pump buck or boost mode activation. The second part including the power dissipated on LDO and the last represent current consumption. CP active (boost mode): PD_CP1 + 2 Vin * VCP Iout (eq. 5) CP active (buck mode): PD_CP2 + 0.5 Vin * VCP Iout (eq. 6) CP inactive: PD_CP3 + Vin * VCP Iout (eq. 7) PD_LDO + VCP * Vout Iout (eq. 8) PD_Iq + Vin Iq@Iout (eq. 9) The power dissipated by the NCV48920 can be calculated from the following equations depend on the operation mode: PD1 + PD_CP1 ) PD_LDO ) PD_Iq (eq. 10) PD2 + PD_CP2 ) PD_LDO ) PD_Iq (eq. 11) PD3 + PD_CP3 ) PD_LDO ) PD_Iq (eq. 12) Power dissipated by the NCV48920 can be also calculated from the equivalent resistance of the charge pump. In this case, the following equations can used. CP active (boost mode): PD_CP_Req1 + Rout_CP(boost) Iout 2 (eq. 13) PD_CPreg1 + 2 Vin * Rout_CP(boost) Iout * VCP (eq. 14) Iout CP active (buck mode): PD_CP_Req2 + Rout_CP(buck) Iout 2 (eq. 15) PD_CPreg2 + 0.5 Vin * Rout_CP(buck) Iout * VCP (eq. 16) Iout CP inactive: PD_CP3 + 0 PD_CPreg3 + Vin * VCP Iout (eq. 17) (eq. 18) PD_LDO + VCP * Vout Iout (eq. 19) PD4 + PD_CP_Req1 ) PD_CPreg1 ) PD_LDO (eq. 20) PD5 + PD_CP_Req2 ) PD_CPreg2 ) PD_LDO (eq. 21) PD6 + PD_CP_Req3 ) PD_CPreg3 ) PD_LDO (eq. 22) Hints Vin and GND printed circuit board traces should be as wide as possible. When the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. Place external components, especially the output capacitor, as close as possible to the device and make traces as short as possible. Place filter components as near as possible to the device to increase EMC performance. Input Capacitor Cin is required if regulator is located far from power supply filter. If extremely fast input voltage transients are expected with slew rate in excess of 4 V/ms then appropriate input filter must be used. The filter can be composed of several capacitors in parallel. The NCV48920 is not developed in compliance with ISO26262 standard. If application is safety critical then the application example diagram shown in Figure 37 can be used. www.onsemi.com 15 VBAT NCV48920 CFLY C+ C- Cin Vin Vout VCP CCP NCV48920 Vout Cout VCC RESET Voltage Supervisor (e.g. NCV30X, NCV809) GND OFF ON EN RO GND VDD I/O Microprocessor I/O Figure 37. Application Diagram ORDERING INFORMATION Device Output Voltage Reset Delay Time Marking Package Shipping NCV48920PA50R2G 5.0 V 0 ms Line 1: V489 Line 2: 2050 TSSOP-14 EP (Pb-Free) 2500 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. For information about another Output Voltage, Reset Delay Time, Packages options contact factory. Reset Delay Time can be chosen from following list of values: 0, 2, 4, 8, 16, 32, 64 and 128 ms. www.onsemi.com 16 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS 14 1 SCALE 1:1 TSSOP-14 EP CASE 948AW ISSUE C DATE 09 OCT 2012 NOTE 6 B E1 NOTE 5 PIN 1 REFERENCE e NOTE 6 A 0.05 C 0.10 C 14X 14 8 E b c1 ÇÇÉÉbÇÇÉÉ1 ÇÇ NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.07 mm MAX. AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADI- c SECTION B-B US OF THE FOOT. MINIMUM SPACE BETWEEN PROTRUSION AND ADJACENT LEAD IS 0.07. NOTE 8 4. DIMENSION D DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, 1 7 0.20 C B A PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 mm PER SIDE. DIMENSION D IS DETERMINED AT 2X 14 TIPS DATUM H. TOP VIEW 5. DIMENSION E1 DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR D NOTE 4 A2 A DETAIL A PROTRUSIONS SHALL NOT EXCEED 0.25 mm PER SIDE. DIMENSION E1 IS DETERMINED AT DATUM H. 6. DATUMS A AND B ARE DETERMINED AT DATUM H. B M 7. A1 IS DEFINED AS THE VERTICAL DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT ON THE PACKAGE BODY. 14X b 0.10 C B S A S C SPELAATNIENGc NOTE 3 B END VIEW 8. SECTION B-B TO BE DETERMINED AT 0.10 TO 0.25 mm FROM THE LEAD TIP. MILLIMETERS DIM MIN MAX SIDE VIEW A ---- 1.20 A1 0.05 0.15 A2 0.80 1.05 D2 b 0.19 0.30 H b1 0.19 0.25 L2 c 0.09 0.20 c1 0.09 0.16 D 4.90 5.10 D2 3.09 3.62 E2 A1 NOTE 7 L C GAUGE PLANE E 6.40 BSC E1 4.30 4.50 E2 2.69 3.22 e 0.65 BSC DETAIL A L 0.45 0.75 L2 0.25 BSC BOTTOM VIEW M 0 _ 8_ RECOMMENDED SOLDERING FOOTPRINT* GENERIC MARKING DIAGRAM* 3.40 14X 1.15 14 XXXX XXXX ALYWG G 1 3.06 6.70 1 0.65 PITCH 14X 0.42 DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. XXXX = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb-Free indicator, "G" or microdot " G", may or may not be present. DOCUMENT NUMBER: 98AON66474E DESCRIPTION: TSSOP-14 EP, 5.0X4.4 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped "CONTROLLED COPY" in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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