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** cQRVUSS\'STEMS

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WHERE: YOUR LOCAL CORVUS

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VOLUME 11 , NO. 7

JULY 1981

Digi!g~PeR!!fgn

Publication Number: USPS 407-010

22 Shortened Algorithm
A shortened OFT algorithm achieves real time processing. This article describes both SOFT theory and its realization.

26 Microprogrammable Processor
The flag status bit storage concept fulfills microprogrammable processor needs.

34 GCR Increases

This article discusses data groups, AuxCRC or

auxiliary cyclic redundancy character, ECC, resync

bursts and other components that make up a CRC

data block.

40 DEC Product Directory

A listing of DEC computer products- prepared for

.---;...

Digital Design by Digital Equipment Corporation.

54 DEC Compatible Products Continue Upward Growth
The rapid growth of the DEC compatible market makes it all the more important that the OEM protects himself by carefully investigating.
62 Bit-Slice Design
Interfacing up to four 80- to 300-MB disks to a Unibus backplane at low cost.
74 SIGGRAPH '81 Blends Art With Science
A showcase for the latest graphics razzle-dazzle, this eighth annual conference is an educational forum.
77 Cyclic Code Redundancy
Here is an efficient and effective means of accomplishing error detection using CRC.

6 Letters

88 COMPATDesign

8 Speakout

· PDP-11 Cross-Compiler Remedies "Brute-Force" µ.P

Do Prices Count?

1O Technology Trends

Software Development · Compatible Multifunction
Controllers Deliver

· Users Graduate to

Backplane Breathing Room

Superminis · Software Trends Spark

96 Innovative Design

Competition · Minis Continue To Gain On
Mainframes · Printers: Key To Computer
Growth

· Glare Screen Provides Cure For Terminal Eyestrain
· Printer Produces Color Graphics
· Smart Storage Tube

· Low-Cost Graphics Systems

Terminal Displays Two Colors

Aid OEM Designers

Symbolizing the growing trend toward DEC

· CAD Package Improves Engineering Productivity

100 New Products

computer products in the minicomputer, microcomputer and ancillary processor and

· Computer Graphics Will

109 Designers Notebook

peripheral fields, this cover captures the essence of this issue, which includes an

Improve Sagging

Use "TouchGraphics" Panels

extensive DEC-prepared directory of DEC

Managerial Productivity

As On-Off Switch, Adjustable

products, specs and prices.

15 Remote Terminals

Vernier And X-Y Controller

Photo courtesy of DigItal Equipment Corp.

112 Advertisers' Index

Controlled circulation paid at Long Prairie, MN 56347

Postmaster, send Form 3579 to Digital Design, 1050 Commonwealth Ave., Boston, MA 02215

JULY 1981 DigitatDeslgn 3

Unibus·repeater
forPDPll
series systems.
Do you need to add peripherals or additional cable lengths to an overloaded bus? Do you have unknown system crashes such as caused by a type 4 trap - delayed response from a slave sync? Is your current repeater too slow for your current system?
If these questions are relevant, then Datafusion Corporation has a device that can answer your needs, the OSBll-A Bus Repeater. It is a functional equivalent of DEC's'~ DBll-A, and is designed to drive at least 19 bus loads and 50 foot of bus cables.
Ultra Fast: 80 nanoseconds MSYNC to return SSYNC maximum (40 nsec one way). This is due, primarily, to the specially designed patented integrated circuit employed by the OSBU-A.
Reliable: Only 34 operational circuit components. Tested in environments from 0° to 70°C with virtually no degradation of signal quality.
Easy to Install: Remove a M920 Jumper and replace it with a OSBll-A. No extra system unit is needed; no wires or plugs to connect (or disconnect); no lost time in reconfiguration.
Available: Off-the-shelf. And, it's fully supported and warranted. Cost: About 253 below DEC.* Quantity discounts are available. Other PDP11 products available are a Busrouter (a Unibus"' Switch) to reconnect multiple peripherals to one or more PDPll cpu's, a Unibus'~ Cable Tester, and an Associative File Processor for high speed text search - a hardware approach.
I i i We also have some ideas for the application of our products which
might not have occurred to you.If you can't get the performance that you would like from your PDPll system, maybe we can help. Please telephone our Marketing Manager at (213) 887-9523 or write to Datafusion Corporation, 5115 Douglas Fir Road, Calabasas, California 91302.
*TR A DEMA RK OF D IGITA L EQU I PMENT CO RPORAT ION
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4 Digital Design JULY 1981

,...-+

Group Publisher: Main Office Harold G. Buchbinder (617) 232-5470

Editorial Director: Western Office George King (714) 789-6688

Editor: Main Office Paul Snigier (617) 232-5470

Managing Editor Book Review Editor West Coast Editor

Harry Shershow ~
. William Belt
Peter Lichtgarn

Assistant Editor

Bob Hirshon ~

Editorial Assistant Contributing Editor Art Director Assistant Art Director

Martha Hawkins Zachary Shpall Richard D. Sarno
Josh Randall

..... "
. ..

Staff Artists Jacky Brill, Stephen Fisher Laurie A. Guptill, Donni Richman

.....

Production Manager

Erik W. Slickman

Production

Noel J. Boulanger

Jon Buchbinder, Florence L. Daniels

Marketing Services Manager

C. King

Circulation

Hiro Irie

Sarah Binder, Regina Harrington

Liz Mahon-Laidlaw, Jennifer Wood

Composition

David Beckerman

Lorraine Cooley, M. Yva Doricent

Judy Lungelow, Deborah O'Connell

Don Spencer

General Administration

Joan Carey

Lisa Finichel , Mal Rankin

Heather Ryan, Esther Shershow

SUBSCRIPTION POLICY
DIGITAL DESIGN is circulated only to qualified research , development and design engineers in all branches of industry, government institutions and universities. To obtain a complimentary subscription , request (on company letterhead) a qualification card from Circulation Director. For change of address, attach old address label from recent issue to new company letterhead or note. Send th is plus request for new qualification card to :
Circulation Department DIGITAL DESIGN
1050 Commonwealth Ave. Boston, MA 02215
Subscription rates : non-qualified subscribers (US and Canada) - $35/ yr.; non-qualified foreign surface mail - $45 ; air mail - $70.
DIGITAL DESIGN solicits editorial material and articles from engineers and scientists. Contributors should submit duplicate manuscripts typed with two spaces between lines. All illustrations should be clear; components on all schematics and line drawings should be labeled . The editors assume no responsibility for the safety or return of any unsolicited manuscripts.
WBPA . . Published monthly by Benwill Publishing
Corporation, a Morgan-Grampian Company, Harold G. Buchbinder, Chief Executive Officer; George Palken, President; Domenic A. Mucchetti , Treasurer; Executive, Editorial and Subscription Offices, 1050 Common wealth Ave., Boston , MA 02215. Telephone: (617) 232-5470.
Morgan-Grampian also publishes American
City & County · Circuits Manufacturing · ...
Contractor · Design Engineering · Electronics Test · Industrial Distribution · Industrial Product Bulletin· Mart· Municipal Index

2 NEW WAYS TO PROTECT
YOUR INVESTMENT
from PLESSEY, Your Full Service Memory Bank
·

Increase system speed . End single-bit errors. Plessey's two new dynamic MOS memories increase your system throughput. And maintain data integrity.

COMPLETE YO UR VAX* MEMOR Y. Up to

HIGH YI ELD PDP-11/44* MEMORY . Uses 64K

4 Mbytes for maximum return on investment. Plessey's

RAM technology to achieve 512 Kbytes on a single hexwide

S780 provides 256 Kbytes of MOS memory on a single

board, the SI IE/2. One bus load to the Unibus* - either

hexwide board . Hardware and software compatibility

PDP-11/34 or 11/44 . Integral ECC/ELR logic with LED

with VAX-I I ; 8-bit ECC for data integrity. I MM EDIATE indicators. A VAILABLE NOW.

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MEMORIES YOU CAN BANK ON
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Plessey Peripheral Systems is your full service memory bank for all your memory needs - LSI-I I* , PDP-8 , PDP-I I , VAX , and DG NOVAt . Plessey built its reputation on performance. Billions of bits strong and growing stronger. Backed by years of experience. Put your money in the bank . The Plessey Memory Bank. For memories you can trust .

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Peripheral 1691 Browning Avenue Irvine, CA 92714 (714) 557-9811

Systems

TOLL FREE: 800-854-3581 800-422-4217 (in California)

*Trademark of Digital Equipment Corporation.

tTrademark of Data General Corporation

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JULY 1981 Dlgltal Design 5

Letters ~

AAES

Dear Editor:

I am writing to inform you of a very

significant event that occurred at the ·

conclusion of my talk on May 19, 1981

before IEEE's Philadelphia section.

· My talk, " Engineering Societies and
Leaky Umbrellas" was about the new ·

organization, the American Associa- "'

tion of Engineering Societies, that you

described in your May Speakout. IEEE "'"

forced members to support AAES . In

my talk, I tried to point out how AAES

benefits only college professors and -

corporate executives.

At the conclusion of my talk, a very

significant vote was taken : by an over-

.. whelming margin, 16 to l, the Phila-
delphia section voted that "IEEE

should not be affiliated with the American Association of Engineering 1:...

Societies." There were 9 abstentions

and many others simply did not vote. I

am informed that the turnout was slight-

ly above average for a meeting of the

Philadelphia section . Thus, this repre-

sents the first known break in the ranks

of IEEE as regards participation in

AAES.

Irw in Feerst f Committee of Concerned EEs
Box 19 Massapequa Park, NY 11762

programmable gain amplifier
Dear Editor:
Many adjustment problems of the programmable gain amplifier described in a Designers ' Notebook (December 1980) would be eliminated if the designer had used a non-inverting amplifier configuration rather than the inverting configuration used.
Prof. S . Ben-Yaakov (It: Electronic Engr.
. .. Ben-Gurion University Beer-Sheva, Israel

Your letters are welcome. Send to: Editor
Digital Design 1050 Commonwealth Ave . Boston, MA 022 15

Family pride.

Now there's an advanced technology family of single board (2048 bytes) data buffer makes "data-late" errors a thing

controllers for DEC* computers from Western Peripherals-the of the past.The advanced technology "micro-engine" allows

number one name in controllers.

a complete track to be written on a single drive revolution.

The TC-131 (for PDP-lls*) is the first TM-11 emulating A measurable performance advantage for your PDP-11.

controller to combine PE and NRZ on one standard hex board. It lets you mix 9-track,

All three controllers are software compatible. All have self test. All are backed by

PE, NRZ or dual density tape units in any

one of the best factory service organizations

combination up to 125 ips. A 64 byte data

in the business. And all can be delivered

buffer allows installation at any point on the

in 30 days.

unibus without consideration of NPR priority.

For more information, call or write

The TC-151 single board NRZI tape

today:Western Peripherals Division,

controller interfaces any industry-standard

Wespercorp, 14321 Myford Road, Tustin,

drive to the LSI-11~ Add a dual width Phase

CA 92680, U.S.A. (714) 730-6250.

Encode Board for the same performance as

TWX: 910 595-1775. CABLE: WESPER

the TC-131.

The DC-231 accommodates up to four SMD disc drives of 40 to 600 mb each with RM02 emulation. Its four sector

Number 1 in controllers for DEC and Data General computers.

Do Prices Count?

Paul Snigier, Editor

Do you consider price an important factor when specifying a service

or product? From the lack of pricing information on some new product releases that we ' ve received, you 'd get the distinct impression that prices don ' t matter to these firms, their agencies and their PR departments. Unfortunately, our readers see it in a different light: if a firm doesn ' t bother to give a price, it has something to hide - namely a price that 's too steep. If written in this (or any other) computer publication, such items draw less response. Certain high-interest

items draw more than those in highly-competitive product areas .

Different magazines and tabloids have come up with different figures ,

but all agree that reader response to these " priceless wonders" is down significantly. We agree that it's a serious disservice to new

product editors, to readers and to the company introducing these products . If a new product is priced high, then the press release should begin with the product' s "claim to

fame. " Yes, a high price will tum off some readers. But it is far better to qualify readers and eliminate

those uninterested engineers at the start and not force them to request material. They will not specify the

product anyway, and it is a disservice to the firm and a waste of its money to send out material to

such readers . Other reasons for priceless product releases include the great variety of certain product lines . This

applies to semiconductor families released at the same time, to cables, to power supplies and a few other

items. In such cases , we suggest that it's better to include a price range or the price of a typical or anticipated best-selling member of the family rather than on price.
This type of reasoning, using the priceless new product as a come-on , has been with the trade press as far back as anyone remembers; it has constituted roughly 15% of all new product releases . Today , however, a new type of priceless product release is arriving with growing frequency ; it is due to inflation and rapid product changes. Activity is so brisk that prices decline rapidly to meet competitors ' price threats. All of this has created a hectic, chaotic and rapidly-changing price situation. It' s not surprising that more manufacturers are leaving off prices on their new product releases; they reason that

it's safer for them to be on the cautious side. This creates problems for everyone. The new product

editors must phone the firms. Too often the individual authorized to provide the information isn ' t in; too frequently he may not return the call; or, if he does, cannot reach the editor. At times the new product

editor may get an argument. This consumes time, and still does not get us the correct pricing information. Many times editors don't bother on many publications; and we notice that this trend

is growing.

It's the privilege of any agency, PR department or firm not to include pricing on a new product

release. We feel it's also the right of every new product editor to take this factor into consideration when

he makes the decision to publish - or not publish - that particular product. We would like your views on the matter of priceless new product releases. Do you feel that we should

not publish new product releases that Jack prices? Or, should we merely consider it as a negative factor

in the overall judgment? If so, how would you want to see it weighted? Let us know .

8 Digital Design JULY 1981

· Completely softwarecompatible with DEC® memory diagnostics

· $9,000/MB in single quantity

· One unit load

· Doubles capacity of host PDP®-11/44 to 2.0MB

·Low power

· Low battery.back-up current drains

· ECC standard

The D R-144S is a nother industry first fr om Dataram. T his LOMB semiconductor ADD-IN quadruples

that I.OM B power requ irements are dramatically reduced compared to the approach of using four separate 256KB

r- - - -- - - - - - - - - - - - - - - - - - - - , D I'd lik e to learn more a bout PDP-1 1/ 44 co m pat ible memory.

the size of 16K RAM- based ADD-INs

modules. Also, the DR-144S current

available from either Digital

drains are much lower in the battery

D Also tell me about ot her DEC-compatib le products.

Equipment Corporation (DEC) or

backup mode.

D P lease send information .

ADD-IN memory suppliers.

The DR-144S is available wit h only the

D Please have a sa lesma n co nt act me .

Unlike other manufacturers, Dataram's A DD-IN memory for the PDP-11 / 44 uses a double word organization with ECC (32 data + 7 ECC) making it completely software compatible with D EC's memory diagnostics. A Mother Board and two Array Boards are joined together by pluggable pins (as shown below) to provide the l.OMB

Mother Board and in versions including one or two array boards. The DR-144S Mother Board provides a capacity of 256KB. The DR-144S Mother Board with one array board is 5 I2K B; with two array boards, the DR-144S capacity can be either 768KB or LOMB.
The D R-144S is an exciting product,

Title _ _ _ _ __,- ho ne _ _ _ __ Company _ _ _ _ _ _ _ _ _ __
Address - - - - - - - - - - City _ _ _ _ _ _ _ _ _ _ _ __

DR-144S system. The Mother Board is the only board of

but we're not resting on our laurels. You can be assured that when 64K RAMs are more cost effective than

State _ _ _ _ __Lip _ _ _ _ __ L-- - --------------- - -----~

the D R-144S assembly which interfaces to the host PDP-11 / 44.This means

the 16K RAMs,theDR- 144Swillbeable to accommodate them . Think of it - a

DEC and PDP are registered trademarks of Digital Equipme nt Corporation.

that there is only one unit load and

4.0MB PDP-11 / 44 AD D-IN!

Side view of Dataram 's 1.0MB DR -1445
Circle 11 on Reader Inquiry Card

laMiR-~I Pri nceto n Road Cranbu ry, New J ersey 08512 Tel: 609-799-007 1 T WX: 510-685-2542
JULY 1981 Digital Design 9

-Technology Trends-

Users Graduate to Superminis

High-performance superminicomputers have become "hot" items, with more than a dozen suppliers struggling to keep pace with "scorching" user demand . IRD of Norwalk, CT, in a report, attributes supermini popularity to an increased user sophistication and .. irresistible " price-performance characteristics . Shipments of 32-bit superminis this year should reach $300 million, with 60% increase to $480 million predicted for 1982 .
applications support growing
Although traditionally superminis have been sold as "barebones" hardware, tailored and programmed by users or systems houses for particular applications, vendors are tending to provide more sophisticated programming tools and special-purpose l/0 equipment for such applications as aerospace simulators, oil drilling analysis, process control and business transactionprocessing, according to the report . Will the current phenomenal growth in this market last forever? No. Soon , indepth support of particular applications niches will become the deciding force in market leadership .
major challenge from HP -not IBM
With almost 40% of the current market (in terms of the value of equipment installed), DEC is the leader in 32-bit superrninis , with its VAXes. Runnersup are Perkin Elmer(22%), SEL/Gould ( 17 %) and Prime (16%). IRD predicts an "important" new supermini, from H-P, which may be announced soon. The machine will be comparable in power to mid-range VAX equipment and configured as a desk-top . A headon competitive machine from IBM is unlikely ; an IBM supermini product would damage IBM's 32-bit commercial offerings in the 4331 and 434n series, with which superminis compete in some applications .
DGC readies "Fountainhead" for introduction
Data General, which introduced its MB/8000 series of superminis last

Typified by; SYSTEMS (SEU
Modcomp ;'
P·E ;(i
/1

Typified by : Pri me Wa ng H I SI
Ll.

Commercial Segment

DDP Office

'\ II'V"V"V'V"

D
Typified by : DEC H-P DG Harris

Medium-Tech Segment Computer-Aided Des Graphics Apps. Industrial Controls
High·Tech Segment Data Acquis Lab R&D Physical Science Apps .

Figure 1. Supenninicomputer Market Segmentation and Primary Positioning of Leading Suppliers

1 ·Strong 2 - Me; derate 3 - Weak

32-Bit Superminis

Apollo

BTI

DGC

DEC

Honeywell (HISI)

Perkin-Elmer

1 ·

Prime

Systems

Wang

Other ·Word- Length High Performance Super minis

Harris H·P Mod comp Tandem

3 1 2

2 2 3 1

Figure 2. Comparative Market Strengths of Superminicompter Manufacturers in 1981

year, is readying a new supermini for introduction to the market later in 1981 or in 1982, as reported earlier ("Minicomputers ··, December 1980 pp . 26-28. P. Snigier) . The "Fountainhead Proc-

essor" is a key element in DGC' s growth strategy . Linked with this product is the possible acquisition of one or more specialized systems vendors to provide DGC with "instant" applica-

10 Digital Design JULY 1981

tions expertise. DGC's abortive at- those hardware manufacturers with facturers have not moved to develop

tempt to acquire Megatek. a computer very strong in-house software devel- software in-house, but have aFquired

graphics system manufacturer. is an opment can afford incompatible, software from suppliers outside the

example of a potential "short-cut" to proprietary operating systems. Soft- manufacturers' environment.

obtaining computer-graphics software ware, and good documentation of that

The fast-changing technology of µ,C

capability for DGC's supermini series. software, will control the sales of industry requires distribution across as

no competition from Japan? Unlikely.

microcomputers. Hardware manufacturers that ignore this fact will not do well .

large a base of systems as possible. There is an escalating rush among software houses to generate .. Lathe"

Micro and minicomputer suppliers

Most of the best software available type software converters. which allow

brace themselves for a "tremendous" today is from third-party software quick transfer and translation from one

influx of new products from Japan. But houses, and this trend will continue. machine to another, within and without

is there an immediate prospect of With few exceptions, hardware manu- a similar operating system and µ.,P .

severe Japanese competition in the

supermini segment') No. But why? The

Japanese and European computer sup-

pliers overlooked the potential of this Minis Continue To Gain On Mainframes
market sector, in their eagerness to ship

large numbers of small business computers and traditional EDP systems. Meanwhile, most U.S. vendors of superminis are "doing rather well" in overseas markets.

The sophisticated end user has become the rule, not the exception. This, in turn, has fueled demand for greater user control and encouraging the trend towards DP decentralization. Even

within the minicomputer industry,

Software Trends

effects of changing user needs can be seen. Conventional minis will continue to be well-suited for automation control and advanced communications

1982 micromini

Spark Competition

work, as well as laboratory analysis and "number crunching ... On the other

Competition is intensifying among hand, microminis, sometimes called

companies vying for control of vital microcomputers, are becoming in-

software areas. The strengths of dif- creasingly attractive as an alternative to

ferent software companies will estab- conventional minis. These small, one-

lish their predominance in their respec- board systems are particularly cost

tive market focuses over the next five effective for tasks such as control of

years, relative to operating systems, machine tools where data handling

languages utilities and specific market applications. Contention among

requirements are modest. Minis with more powerful proces-

1978 micromini

several companies is the battle for sors are evolving in the other direction

,.. .

dominance of 16-bit operating systems. Digital Research ·s CP/M operating

to become "superminis ... While the prices of these computers are substan-

system achieved the status of de facto tially higher than those of conventional

standard for 8-bit µ,C s. However. m101s, the greatly increased data

efforts to control operating systems at handling capab ility and ease of pro-

the 16-bit level as well are encountering gramming will make superminis the Share of minicomputer shipments by type

formidable competition from UNIX fastest

growing

minicomputer 1978 and 1982, in pie-chart form, are by

and UNIX-like operating systems category.

factory value of U.S. shipments.

produced by companies such as Micro-

Soft Inc.. Bell Labs. Onyx. Cro-

memco and others . Standards of 16-bit

operating systems will be determined Printers: Key To Computer Growth
within the next two years, according to

Creative Strategies International of San What the computer world needs is a market. which will increase in the

Jose, CA, in a new report.

low-cost printer to solve the current 1980-1985 window by over 23 % a

As software houses solidify into major marketing forces for hardware,

dilemma of peripheral cost exceeding many basic computers. While lower

year. from today's $1.2 billion. rising to $3 billion.

their allegiances to certain computers mini and µ.,C prices have made com-

Printers now range from thumbnail-

and/or operating systems will largely puters accessible to broader business sized calculator-based printers to the

determine the success of those com- and personal applications. the periph- largest and most refined thermal and

puters. Trends in the µ.,C industry are eral costs. particularly printers . inhibit impact printers at all market levels.

toward standardization more than in their full development.

,.. any other aspect of the data processing

The 20-. 40-. and 80-column print- markets are changing

industry. Especially at the operating ers. such as offered by Alphacom. and The 20-. 40-. and 80-column alpha-

system level, incompatibilities will others. will grow rapidly in the low-end numeric and graphics printers are

severely hinder developments. Only small business and personal computing attractive to business and p·rofessional

JULY 1981 Digital Design 11

ensured its ability to deliver through an support are keys to the printer field of

Technology Trends

exclusive North American distribution the 1980s. Traditional companies agreement with Olivetti and manufac- specialize in limited-capability

turing agreement with Rockwell , machines or market niches , makjng

end users, because hard copy of data, which invested over $2 million in their products less flexible for the

graphs, charts and tables are increas- production facilities for Alphacom's broader requirements of the OEM

ingly becoming a standard require- Sprinter Series .

concerned with end users' immediate

ment. Now, hobby , educational and

Quality , volume and engineering applications .

home computer users also have a fea-

sible printer option. Professional and

business users, lacking alternatives ,

Low-Cost Graphic use printers costing $1000 to $3000 for
all hard copy, including rough draft.

The cost limits their number to one per Systems Aid OEivi Designers

business computer. With the low cost

of newer 80-column printing systems, In a major expansion of CAD/CAM dual processor architecture

more than one printer can be connected product lines , firms are introducing Key to the power of the workstations is

to a shared-logic type system in an low-cost graphics workstations and a dual processor architecture with two

office environment.

software packages configured for use 8086s sharing the command and graph-

Presently, shared logic system byOEMs.

ics processing load, with the proces-

throughput is slowed considerably

Avera of Scotts Valley , CA, has sor's arbitrating through a multitasking

because one printer is shared by every such a system. Its four workstations are OS . One processor interprets com-

terminal. Now, however, one printer built around a dual processor architec- mands; the other supports graphics.

can be cost-effectively attached to each ture based on Intel 's 16-bit 8086 micro- The main processor has 128 KB of

display keyboard-based terminal, and processor and an OS with 200,000 lines RAM ; the graphics processor, another

users operating each terminal can of Pascal code. The four workstation 64-KB RAM plus a 64-KB bit map.

generate printouts for editing, proof- configurations include the GSllOO, Main storage RAM has parity check-

reading and approval. After correction, including 2 diskette drives , 192-KB ing , but the bit map does not. Memory

final documents are generated on a parity memory , dual processors, two (combined) can be expanded to a total

central printer.

RS-232C ports , keyboard and control of 1 MB .

Currently in the printing systems electronics , B/W display and control market, companies such as Centronics, electronics, data tablet and control , 64- graphics input and software

Printronix, Diablo, Qume and Data KB bit map, supplies and enclosures. A 564-by-832 pixel CRT display is

Products Corp. and others offer units GSl 120 is like GSI 100 with one disk- oriented vertically, with a 9"-by- 12"

ranging from $900 to $5 ,000. The most ette drive and one 10-MB Winchester viewing area and 24 on-screen func-

expensive 80-column printing system drive . TheGS1200islikeGS1100, but tions that respond to cursor control.

Alphacom offers is priced at $595 per with a 13" color display . GS1220 is like The graphics area contains 51 2-by-512

unit with print speed four times that of GS 1200 with one diskette drive and one pixels. The display unit also features a

more expensive units.

10-MB Winchester drive.

two-digit LED display for indicating

Personal computer prices continue

their drop , with the basic CPU price at

$500 to $1500. The big fly-in-the-

ointment is printer prices: many users

cannot pay for a printer that costs two to

four times the CPU! Big markets

remain dormant. But, now the newer

20- , 40- , and 80-column printers, rang-

ing from $175 to $595 , provide many

users hard copy capability at more-

affordable prices.

but, can they deliver?

The printer boom continues. Inexpen-

sive, fast and reliable models are the

fuel behind sales. Can suppliers deliver?

Key to this growth is suppliers meeting

volume demands inherent in an ex-

panding, price-competitive market.

Will traditional, computer-oriented

companies geared to lower-volume manufacturing requirements keep pace

with demand and price changes? Not

unless they change.

Some firms are well-positioned to take advantage of this growing market. For example, Alphacom of San Jose

An Avera wori(station user need not to know how to type or draw. This work station is configured so that users simply point a stylus at the proper command on the screen or draw a simple symbol on the drawing pad input.

12 Digital Design JULY 1981

self-diagnostic codes and speaker to acknowledge a command input.
Software, designed for ease ofuse, is organized into five command groups: control, editing, manipulation, status and viewing - an organization that eliminates the need to display all commands simultaneously . Once a command category is selected, commands within that group are displayed. The user strings together functions and demands syntax of a given command. Using the data tablet, he draws symbols representing commands.

sors, a data tablet, PT25 charcter-mode terminal and graphic controller.
Cost? Don 't expect to buy one for your home computer Jab. A typical entry-level Prime/Medusa system costs $235K and includes one Prime 250 CPU, 768-MB memory, one 96-MB disk drive and two workstations with B&W terminals . Licensed software includes 3-D Medusa, Primos, Fortran , Midas and CPL. Medusa software can be licensed separately at $30K and $60K for the 2- and 3-D models , respectively .

Computer Graphics Will hnprove Sagging Managerial Productivity
Reams of printouts which computers have made available to today's managers are largely unabsorbable . We're at a point of diminishing returns in the benefits WP and DP can bring to the decision-making process. Computer graphics are emerging from

recursive data structure
Via the Pascal-based OS (common to ~ all systems), a flexible recursive data
structure is utilized. A recursive structure allows users to associate any graphics or text components in the data structure with other components to an arbitrary level of complexity by nesting. It forms hard associations; for example, a line can be associated with a symbol so that if the line is later moved, the symbol cannot be inadvertently left behind . Via an intermediate data structure for external communications, these systems are amenable to design partitioning and uploading to larger computers, including IBM mainframes.
._. ,

PDP·ll·&V.AX 'l'users ...
ComDesiglis TC·3 Concentrates Multiple Terminals and Printers
on a Single Telephone Line Cost-Effectively for the
PDP·ll and VAX.

CAD Package Improves Engineering
Productivity
. Advanced CAD software package Medusa provides complete 2-D and 3D design, drafting and documentation . Based on Prime Computer's generalpurpose 32-bit computer systems , Medusa enables designers to customize their own design system, a capability unavailable with turnkey or software-
.. only offerings . The system is packaged with its own + integrated workstation, available with
color or B&W terminals. Workstations are configured for easy access to con-
.., trol elements and provide a high 1000-
Jine resolution display to enhance operation and increase performance.
The 2-D entry-level model is used for layouts , schematics and detailing tasks in mechanical , electrical, structural and electronic applications . The advanced 3-D model is for designing a complex 3-D object and then producing an engineering drawing. The workstation has a 19" display, joystick for easy manipulation and control of cur-

·CONCENTRATION Many terminals-one line

· COSTSAVINGST0400/o Totally eliminates DZlls and cables

· PROVEN RELIABILITY TC-3s are in use world-wide

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Data checked with all errors eliminated automatically

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Modern loop-back, unit self-tests, and terminal diagnostics

Put a TC-3 onYour UBIBUS®and Get aDZll with Stat Muxing tool

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For further information and the sales office for your area
Call toll·free(800)138·8938 or in Calif. (805) 964-9852
ComDeslgn, Inc
ComDesign 751 South Kellogg Avenue Goleta, California 93117
'Registered Trademarks of DEC

Circle 13 on Reader Inquiry Card JULY 1981 Digital Design 13

DESIGN
YOUR
OWN PRINTER
Circle 14 on Reader Inquiry Card
If a standard RS-232 printer won't work .
CALL US!
Circle 28 on Reader Inquiry Card
AND OEM MONITORS
Circle 44 on Reader Inquiry Card
DATA-ED
18 Bridge St. Salem, N.H. 03079 (603) 893-2047 TWX 710-366-0502 (UDOENG SEML)

Technology Trends
scientific and engineering applications to combat this problem. A single glance can reveal in seconds subtle trends and relationships that can take hours to decipher from a table of numbers.
In a special OARS report, entitled "Graphics in the Office," IDC of Framingham, MA, forecasts a sharp rise in the overall use of computer graphics, averaging 35% growth per year through 1984. In dollars, this represents an increase in revenues from just over $1 billion in 1979, to over $4.5 billion in 1984. It certainly is no revelation that graphics - pie charts, bar graphics, etc. - are easier to comprehend than a table of numbers. Executives used graphics for presentation and analysis for years. What is new is the concept of generating graphics interactively without involving graphic arts to bring immediate answers to management's questions. An example of what can be done is the use of "what if'' gaming techniques, which allow the manipulation of variables such as price, return on investment, etc.
CAD/CAM systems are the dominant force in the graphics market. While CAD/CAM systems are much more sophisticated and more expensive than business systems, it is actually the business applications market which will show the fastest growth: shipments of some $1 billion are forecast by IDC for 1984. CAD/CAM systems may dominate the overall market dollarwise, but in terms of sheer numbers, the business graphics market will far surpass it in units shipped. In fact, business applications will soon rival CAD/CAM applications as the major driving force. Most of the technology is in place; all that is needed is to refine and tailor it to the specific needs of business.
Display devices accounted for a little over half of all graphics expenditures. Hard copy devices accounted for just over a third, while the remainder of the expenditures weRt for such other equipment as business/personal computers and photographic output devices.
Things will change rapidly, however, on the computer graphics scene over the next five years. Much of this change will be due to a sharp rise in the number of personal computers used for graphics. Additionallly, as the technology improves, the price of low-cost, hard copy will begin to fall. These devices - dot matrix printers/plotters, color cameras, and ink jet printers, etc.

- will grow in numbers, though dol-

larwise shipments of these devices will

drop to 22% of the total business

graphics market by 1984. Furthermore,

IDC is predicting that business/

personal computers will account for

20% of the graphics market (by dollar

value) in 1984. Display devices will dip

slightly - to under half of total ex-

penditures at that point, while photo-

graphic equipment will rise to ap-

proximately 8% of the market.

Display devices use three primary

technologies: the direct view storage

tube (DVST) , raster refresh tubes, and

random scan tubes. Each of these tech-

nologies has its own cost/performance
· trade offs . IDC views raster tubes
(which operate much like a TV set) as

the technology of choice for business

purposes mainly due to high-quality

color, good resolution, selective

erasure, and the ability to display

photographic images. The big draw-

. back to raster scans right now is cost.
The images of raster scan must be

refreshed many times a second, and this

requires the definition and storage in

memory of every pixel (picture ele-

ment), whether part of the imageornot.

Obviously, the memory and processing

cost in this method are prohibitive, but

as memory costs continue to drop it will

become less of a factor.

The other methods of display men-

tioned also have their pros and cons.

Direct view storage tubes, for example,

don't need to be refreshed 30-60 times a

second, and they offer high resolution

at low cost. However, selective erasure

is not possible in a DVST, and low light

output is another factor to be con-

sidered. Random scan tubes offer '"'

selective erasure and higher resolution

than raster refresh tubes, but only

limited color. ·These displays have been

employed mainly by the engineering/

-.. scientific community where resolution
is very important and color less so.

Of the 180,000 shipments of display

devices forecast in 1984 by IDC, 75%

will be raster scan tubes . Additionally,

approximately 90% of these will be

color tubes, as compared to 63% for

raster tubes shipped in 1979. Users will drive the graphics display market

...

toward increasing use of color graphics

for business applications.

With color displays soon to dominate

the market, the demand for color hard
. copy will also increase dramatically .
Color displays and color hard copy .(

devices will grow hand in hand. If

inexpensive, convenient hard copy

output devices are slow in coming, we

can expect this to have a dampening

14 DigitalDesign JULY1981

effect on the color display market. By the same token, if color hard copy output becomes available quickly, ,then the color display market will be boosted .
What's in store for users regarding output devices? Quite a few things , including : · color cameras - useful for the preparation of slides, transparen-

c1es, and color microfilm, · photo-

compos1t1on devices

offering

superior resolution previously avail-

able only to graphics designers, and

· dot matrix printer/plotters - simple

adaptations of alphanumeric matrix

printers, which can not only produce

shades of gray, but by striking over can

also produce color.

- Remote Terminals-

mARWAY
PRODUCTS
'NC :M
the DEC alternative that even
non-DEC users are flocking to

JAPAN: Matsushita is planning to ick . It will concentrate on the applica-

bring CAD into the Japanese home. tion of electronic technology and the

The principle is that a lady customer, material sciences with particular em-

shopping for dresses is filmed by video phasis on alternate energy

camera. The video film, together with sources . .. ITALY: The Italian Olivetti

size statistics, is stored by company. group is acquiring control of the Swiss

Whenever the shopper wants to buy a company, Hermes Precisa, manufac-

dress, she telephones the company, her turer of office equipment ... WEST

film is recalled from data and displayed GERMANY: Production of West Ger-

on TV. Dresses are then superimposed many's electronics industry rose 4.9%

on image as though she were trying to $44.5 billion in 1980. This increase

them on. Hopefully, she will select one occurred despite the recession . (1979,

that looks good on her ...BARBADOS: however, was a much better

A $9 million plant (with more than 100 year.) ... HAWAii: The Fourth

employees) for manufacturing resistors Annual Pacific Telecommunications

has opened on this Caribbean island. Conference takes place Jan. 18-20,

Backer is TRW of the US. The range of 1982, at the Ilikai Hotel, Honolulu.

resistors is designed for a variety of (Never too early to plan for such

· electronic systems from basic tele- events.) Papers and exhibits invited. phone equipment to sophisticated space Contact Richard J. Barber, (Director),

research ... LONDON: Scientific 1110 University Ave., Suite 303 ,

Calculations has opened a London Honolulu, HI 96826 ...SINGAPORE:

office. The company produces printed A conference and exhibition for the

circuit designs and applications . .. quality control/quality assurance field

SOMALIA: This country has become in Southeast Asia has been scheduled

the 106th member of INTELSAT for June 17-19, 1982 m

(International Telecommunications Singapore ... HONG KONG: A new

Satellite Organization.) INTELSAT firm has been launched to manufacture

operates the global satellite system that magnetic recording heads . The com-

provides 2/3 of the world 's international pany is SAE Magnetics (H.K .) Ltd., a

telecommunications

services . .. division of Stanford Applied Engineer-

FRANCE: British and French tele- ing Corp. of Santa Clara, CA - · .

communications officials have agreed SCOTLAND: The worst recession in

to adopt a new technical standard. for Great Britain since the 1930's has

Viewdata by the mid-1980's. This will served as a stark contrast to the con-

end the rivalry between Britain's tinuing growth and prosperity of the

. ...

Prestel and the French Antiope. A working method with Germany is also being developed. Japan has been wait-

energy and electronics industries in Scotland. Scotland has been the home of several American firms for about

ing for such an agreement and should half a century and has been attracting

be among the first to produce new high-technology manufacturers for

standard Viewdata terminals . View- decades. The 1970s, however, has seen

data transmits such things as telephone a strong burst of growth in the high

directories service (500,000 directory technology areas, spurred by govern-

terminals for France alone); electronic ment financial incentives, a growing

mail; stock market; news; information; pool of skilled labor, research and de-

etc ... .IRELAND: A high technology velopment resources, and experienced

research center is being set up in Limer- executives wilJing to start new ventures.

Whether you have a need for three phase or single phase AC power control. Marwa y Products has a high quality. low cost unit available to satisfy you. In fact our DEC interchangeable units are so economical that we are attra cting a large follow· 1nq of non-DEC OEM's . system integrators. and quantity end users.
Marway's three phase power controllers are mechanically and electrically interchangeable with the DEC/VAX model 869 and feature:
· Model MPD 416 for 240/416 VAC ({1 45 amps
· Model MPD 208 for 120/208 VAC 0 90 amps
· 18 AC recepticles - 6 unswitched: 12 switched
· High level control bus · High performance EMI line filter · Pricing : MPD 416-$1375 .oo · :
MPD 208-$1650 .00 " · Availability : 30 days ARO

. . -.. - -- -- ·ooo. · ·

~- U1J

'"':!.'\\I""~

· ·

Marway's MPD 115 and MPD 230 AC power con· trollers are mechanically and electrically inter· changeable with the DEC model 861·s and feature:
· Control of 115 or 230 VAC a1 up to 30 amps
· Twelve AC receplicles-4 unswitched: 8 switc hed
· High performance EMI line filter · Pri cing: $325" (MPD 115) · Availability: off the shelf Additional Marway models that are available to meet your needs are : Th e MPD 110. the lowest cost rack mountable unit . priced al $149.00. and the MPD 117. the floor or wall mountable unit for use in the o ffice or personal computer en· vironments. priced at only $89 .oo·

For more information. please call or write:

mARWAY

· s1nale un11 Quan111v

PRODUCTS 'NC.
2421 S Bl'rh Stree1 Santa Ana . Ca 92707 1714) 549·0623

Circle 15 on Reader Inquiry Card

JULY 1981 Digital Design 15

Factory
s~stem

""J ANALYSIS
· SHEETS
24 PLANNING SHEETS
21 MANAGEMENT SHEETS

·
Based on the experience of hundreds of Japanese factories diagnosed and advised by the author during his ten years as a factory management and production control consultant. It is used by more than 4,000 factories in Japan today.
With instructions on how to use them. All reproducible for in-plant use. Bound looseleaf in slipcover.
Price: $80. Pre-Publication Price: $60. Prepaid (Until August 1, 1981) -..

CONTENTS

Chapter 1 ANALYSIS
Analysis Manual

Analysis Master Sheet

Processing Cost Analysis Chart (1)

Productivity Analysis Chart

Analysis of Processing Cost for ..._

Selling Price Based on a Set Rate

and Selling Price Based on

Performance

Calculation of Overhead by

,....

Category

Profit and Loss Analysis by Customer and by Product

Profit and Loss Analysis by Division -

Analysis of Personnel Expenses and Labor Cost Distribution Rate (I

Analysis of Conditions Necessary .,..for Improvement of Labor Productivity

Quality Control Check Sheet (1)

Quality Control Check Sheet (2)

Punctual Delivery Check Sheet

Operation Rate Survey Work Sampling Statistics Sheet

Operation Rate Survey Work Sampling Sheet (1)

Operation Rate Survey Work Sampling Sheet (2)

Plant and Equipment Check Sheet
<C.

16 Dlgltal Design JULY 1981

,.
Management 1n J a n a n By Tatsukichi Yanagawa
----------------------------------

Equipment Related Operation

Cost Reduction Check Sheet

Manufacturing, Inspection

x-R Control Chart Data Sheet (2)

Rate Analysis (1) .

(Production Quantity and Pitch

Equipment Control Chart

x-R Control Chart

! Productivity of Plant and

Time)

Major Purchases Control Chart

P Control Chart Data Sheet

Equipment Analysis

Equipment Planning Check Sheet Monthly Order Chart

Control Chart

· P Q Analysis Sheet (1)

ABC Analysis Sheet (1)

Process Control System

Frequency Distribution Record

P Q Analysis Sheet (2) ~ Balance Sheet, Profit and Loss
Statement, Manufacturing Cost

ABC Analysis Sheet (2) Materials Order Planning Sheet Standing Parts Planning List

,.__ _ Evaluation List

Control Standards Check Sheet

x-R Control Chart Data Sheet (1)

Statement

Standards for Deciding Whether to

~ Business Operation Survey Analysis Indicators
Chapter 2 PLANNING
Planning Manual

Stock or Not Economical Lot Calculation Table Order Timing Calculation Table Unit Price Estimate Calculation Table

''IEF/naicmltloCisntetoedrreisys-tae.;.c~Ci1..-.-1ihn.a-en;a.;- 8.;C;- ;IJ-J- ceonp-ty

-SJ-'ste-m-s
Oes).

-· - - ·n Jaoan

,
I

Planning Master Sheet Total Production Planning

Calculation Procedure for Unit Price Estimate

- Support Chart

Chapter 3 MANAGEMENT

~ Control System Planning Chart

Calculation of Available Capacity

Management Manual

II Name I I Company

- - - - - -·

I I I I

r (Labor Hours) Capacity Survey by Product
lo. Master Sheet for Establishing Work Time
~ Labor Hours for Bolt Tightening ~ Calculation Table for Machining

Management Master Sheet Master Sheet by Order (1) Master Sheet by Order (2) Production Performance Graph Calculation of Profit and Loss Per Month by Division

I
II Address
I City

I I I I

Labor Hours ~ ~ Simple MTM Data
Conveyor Line, Line Balance

Selling Price Change Report
I Report of Change in Order Price or
I AfA/L liO· Source of Order

Check "1Ust accomp anyorder

I I

Calculation Chart

General Report

· BenwilJ p .

Strategy for Making Profit and
I ~ Reducing Loss I I Pitch Diagram

Management of Lent Drawings Equipment Control Chart

.__ __

a Mo" Ublishing C
1oso8an-Grampian orPorauon
Boston ~~moonweafth~~Pany

I ~~~~~~~~~~~~~~~~~~~~~~~--....;;:...,i---

2 2 15

. . . . . ._ . . . _ _ .~~~~~~~~~~~~~~~~~~~~--~~~~~~~~~~~~~~~___;;o-=-
---... -----

·
a-

JULY 1981 Digital Design 17

Total DEC Compatlblllty with th Compll-LE

And much more . . .

The Compll-LE, which is equivalent to the

DEC BAI 1-LfTM, is a general purpose

PDP-UTM expansion mounting chassis.

The 120V ac input power unit supplies 32

amps of output power at +SVdc with regulators to support either MOS or core

expansion memory.

The chassis can be equipped optionally
with up to two Comp-cK or one
COlnp-DK {DEC ODii-CK and 0011-PK
equivalent backplanes) units, enabling
the Compll-LE to support a wide varlet¥ Of PDP-II systems.

--
. . . For a lot less
For more information call or write:

2326 Walsh Avenue Santa Clara, CA 95051 (408) 988-8600

· ..c
"'DEC BNH.E Is a trademark of Digital Equipment Corp.

18 Digital Design JULY 1981

Circle 50 on Reader Inquiry Card

unibus* The Solution to Your DEC*
fintegration Problems =~Sigma Products
Q Bus*

SIGMA's chassis can be the beginning of DEC based systems . or can provide expansion for Unibus or Q bus devices.

E ANOTHER

SIGMA INFORM ATI ON FIRST !

Sigma chassis provide low-cost, flexible configurations for your DEC systems The complete line of 5.25"

Sigma is in the business of serving D EC users. Chassis are optionally available with CP U's, memories, controllers, interfaces, etc., depending on client needs.

and 10.5" chassis provide mounting space and power for Unibus and LS 1-11 series systems, as we\ I as aImost any combination of floppy/Winchester/tape cartridge drives. Most chassis include an 8-row quad backplane and front operator control panel. Some are available

Sigma personnel are experienced in design and development of DEC-related products and have a comprehensive background in system compatibility . This expertise is available to develop chassis with user-configured front panels, power supplies, backplanes and drive enclosures.

in either tabletop or rackmount versions with styles that are easy on your eyes and prices that are easy on your total system cost. ·

~$iq1na
~ lnl0r1natton

$9§"1e1n·

(714) 974-0166

+ DEC compatibility
+ Easy access to installed modules
+ Well-planned cable egress + Tabletop and rack mount versions + Heavy duty, reliable power supplies + Custom mounting of user specified
peripherals

_ Send me information. _Have your representati ve call me.
Name
TCiotlmep-any-----------------------------~-
Address - - - - - - - - - - - - - - - City, State _ _ _ _ _ _ _ _ _ _ _ _ _ __ Zip Code _ _ _ _ _Telephone(_ _ _ _ _ __

Trademark of Digital Equipment Corporation

Sigma Sales 6505C Serrano A ve. A naheim, CA 92807

Circle 34 on Reader Inquiry Card

JULY 198 1 Digital Design 21

- - -CIRCUITS- - - - ..
Shortened Algorithm

~I?_eeds DFT comll_utation

A shortened Discrete Fourier Transform (OFT) or SOFT algorithm was developed to achieve real time processing. Use is made of new fast components such as video AlD converter, multiplier/accumulator, RAM and PROM. A OFT

by Dan Cohen and A vidgor Margalit
A numbe r of me thods for the realization of a d ig ital real time ORT processor has been published in recent years. In the past. contemporary techno logy lim itations on the speed of d ig ital components. espec ially mu ltipliers. prevented the

processor based on the shortened algorithm can reali zati on of a sati sfactory processor. The int roduction of

calculate power spectrum of 32 samples in about new compone nts. such as the monolith ic multiplier/ '·+

300 µs, giving a maximum sampling rate of 100
KHz.

acc um ulator fam ily and video 30 ns- 6 to I0 bit ADCs helped so lve so me majo r problems. We describe a new method whic h. wi th the a id of new components. permi ts reali zation

of a sati sfactory real time DFT processor.

SOFT is fourfold faster

T his s ho rte ned algo rithm fo r OFT (SDFT) calculation

me thod fi ll s in the gap between a comp licated fast FFT

process ing and a simple-but-relative ly-slow direct DFT

com putatio n. Use of shortened DFT gives a fou r times faster

processor in com parison wi th a d irec t DFT assuming the

Dan Cohen and Avidgor Margalit are from Haifa . Israel.

PROM ADDRESS ING

Timing & Control
x,
Analog Switch

To all unit s
6-bit ADC

MUX

512 x 8
PROM sin2N11 mn cos2N11 mn
2X
x 256 4
RAM 2 x
x 32 x X 1
32 x 0

ADD SUB

RAM A d d r essing

MUX
8XB MUL ACC
'2 x 8
REG

·
...
~
....

PS(m)

;;

""" ""

Figure 1: Shortened OFT serial processor (N.=32) 22 Digital Design JULY 198 1

same techniques of realization. Such a processor for 32

points was designed and built by the authors, fulfilling the expectations of a fast, low power, low volume and low price

0 XI (0) XI (1)

unit A 5-W, one-board processor computes a 32-point OFT

in less than 300 µ,s (JOO KHz sampling rate), for less than

$500 (qty. 100).

15 XI (15)

XI (16)+XI (0) XI (17)+XI (1)
X1
XI (31 )+XI (15)

direct OFT The OFT is defined as

S (m) = (1/N) ~ ~;-01 Xn exp [(-27Tj/N) (m n)]

(1)

where "exp" signifies a base e (or natural) exponential; m,n

= 0, I , 2 ... N - I; x n samples are taken at Lit intervals; xn are

real or complex sample values; and N is the total number of

samples in an integration .

Direct OFT is calculated by solving Eq. 1 for each m

separately. This is the simplest way to realize the processor,

,..

hence the name "direct." Despite it's simplicity, the introduction of such a processor does cause difficulties in fast

real-time systems.

·'

The shortened OFT method eliminates these difficulties by

reducing the number of complex multiplications (N2/4) by a

factor of 4.

shortened OFT or SOFT
As is well known, an FFf processor implies Nlog2N multiplications, while direct OFT processing requires N2 multiplications (N is the processing block length). This number of multiplications can be reduced by partial realization of the FFT algorithm (theoretically it could be done until the complete FFf algorithm is achieved), according to the following equations:
m
exp(-j27Tm /N) (N/2 +r)]=(-1) exp(-j27Tmr/N) (2)

S (m) = (1/N) ~ ~;g- 1 { [Xr exp (-j27Tmr/N) +

X(r+N /2)] exp[(-j27T/N) m(r+N/2)]}

(3)

Substituting Eq. 2 into the second expression on the rightmost side of Eq. 3 we obtain:

16 0 0
31 ¢
32 XQ (0) XQ (1)
47 xa (15) 48 0
0

~ u

I .0

..i.:.:.

Q)
.<.:
~

Xa dx_.
x

XI (16)-XI (0)
X1 XI (31 )-XI (15) xa (16)+xa (O)
Xa XQ (31)+SQ (15) xa (16)-xa (O)
Xa

63 0

64 WI (16)+WI (0) WI (17)+WI (1)

XQ (31 )-XQ (15)
~--

No change

79 WI (31 )+WI (15) 80 WI (16)-WI (0)
WI (17)-WI (1)
WI

95 WI (31)-WI (15)

96 WQ (16)+WQ (0)

"'aQ:)

d
Wa !:

111 WQ(31 )+WQ(15)

112 WQ (16)-WQ (0)

No change

S(m) = (1/N) ~ ~;g - 1 exp [(-jtTmr / N)

...

[xr + (-1)mX(r + N/2)]

(4)

Eq 4 shows a reduction of the number of multiplications in the frequency domain. That means N2/2 multiplications instead of N2 in the direct OFT. On the other hand this algorithm adds N additions/subtractions in the time domain , which results in addition of I bit to the input dynamic range.
An additional reduction of the computing time for real
signals is achieved by using:

- - 127 WQ(31 )-WQ(15)

E--

-----:;:::;

128

Vacant

255 0 - 15 samples

No change

:::?:::

Vacant

16 to 31 samples

Ii .

S(N-m)=S*(m)

(5) Figure 2: RAM organization (N=32)

This indicates that the whole procedure is reduced to computation of the spectrum S(m) for m = N/2, and then

realization of shortened OFT

·
,..

computation of its conjugate S*(m). Thus, N2/2 multiplications for computation of S(m) and N/2 additions for computation of S*(m) will complete the procedure. When

Realization of a direct OFT filter depends on desired specifications: sampling rate, block length, power dissipation, volume, price etc . The most convenient realization, the serial

quadrature channels are used, each channel should be method, utilizes a multiplier/accumulator and satisfies most

computed separately.

typical system requirements - except for the case of very

In summary, the shortened OFT algorithm will produce high-sampling-rate systems. It is possible to overcome this

the spectrum after the following computations:

shortcoming by paralleling two serial processors for a single

N2/4 multiplications,

channel or four serial processors for quadrature channels.

N complex additions in the time domain and N/2 real

Fig 1 describes a serial realization of the shortened OFT

additions in the frequency domain.

method . Quadrature video signals X 1and XQ are sampled by

JULY 1981 Digital Design 23

an analog switch and converted by a single ultra-high-speed A/D converter, resulting into two binary words represented in fractional 2s complement notation. The classical A/D conversion of quadrature channels has been achieved by two paraHel assemblies each containing S/H, A/D, and a register m senes. Although the shortened method saves two S/H, one A/D and two registers , it requires a faster A/D and analog switch in order to reduce the inaccuracy due to delay between samples from the two channels. Fortunately, new components make possible the realization of this method. For our purpose we chose the 4066 bilateral switch and TDC JO 141 A/D converter (6 bit , 30 nsec) .
Assuming N = 32, the first 16 converted samples of each block are stored in a 8 bit word-length RAM (I and Q channel s separately) . Starting with the 17th sample, their binary equivalents are not stored directly but are transformed into new expressions according to Eq. 4. For example, X( 16)
transforms into X(l6) + X(O) and X(l6) - X(O) , or X(31) into X(3 I) + X( 15) and X(31) - X(l5).
This transformation adds one bit to the original word length, so the RAM has to be enlarged accordingly. Therefore two 931422 TTL-Ts RAM were chosen (75-nsec access time , 250-mw power dissipation) . Fig 2 describes RAM organization during the two phases, between the Ist and the 16th and between the 17th and the 32nd samples .
The procedure mentioned above occurs at the sampling rate and spends only a small portion of the time interval between two samples . For example , with sampling rate of IO KHz , the duration of A/D conversion , read memory , add or subtract , and write memory for quadrature channels is about 400 nsec , or only 0.4% of the sampling cycle. The remaining 99.6% of the time is exploited for OFT processing of the preceeding block of samples (W and W Qin Fig 2) .
The processing unit is based on an 8 x 8 multiplier/ accumulator TDC 10081 (it could be 12 x 12 or 16 x 16 according to specific demands). This component performs multiplications, accumulations, squaring, and additions (A
+ B = A x I + 8 x I; A - 8 = A x I + 8 x (- I)) according
to the algorithm described in a following section , .. shortened OFT algorithm," resulting in a power spectrum for each m (A . I I) . Word length considerations are presented in a following section , .. word length considerations, .. indicating the specific bits that are ignored as noise, others that are compared with a calculated margin leve l and finally those that are detected directly by a limiter.

shortened OFT algorithm

Spectral line S(m) normalized to l/N is: S(m) = L ~;~ - 1 ~exp(-j2rrmr /N) [Xr + (-1)m X(r + N/2)] }

if Yr = Xr + (-1)m X (r + N/2)

then quadrature channels are expressed as :

Yr = Y1r + jYQr

Combining Eq Al with A3 and substituting the Euler expressions for the exponent we obtain:

S(m) = L ~;~ - l Ytr cos(2mr/ N) + 2: ~j~ - 1

YQrSi.n(2rrmr/ N)+

N/2r= O

Yorcos(2rrmr/ N)-

"...', rN=/O2 - 1 y Ir si.n (2rrmr / N) )

if :

a = °"' N / 2 - 1 .._ r = O

Ytr cos (2rrmr/ N)

L N/2- 1 r=O

Ytr sin (2rrmr/ N)

N/2- 1 r= O

YQr cos (2rrmr/N)

d = L N / 2 - 1 YQr sin (2rrmr / N)

r=O

The real expression will be: g = a + d

The imaginary one will be; h = c - b

AIO

The final result for the power spectrum will be:

PS(m) = g2 + h 2

All

word length consideration
The following explanation will be accompanied by a numerical example based on: number of OFT points per block (32) . input dynamic range of quantized video signals (6 bits). noise level of white Gaussian noise (Lxn = O); <Tn = I LSB and coefficient accuracy (form = 32) (5 bits).
According to the SOFT algorithm, quantized input signals are processed to obtain new 7-bit-long expressions . The resu lt is a 12-bit word . Accumulator of 32 multiplications adds to the result 5 bits at the most. In order to avoid truncation, a 17 bit word is needed . Assuming the noise leve l of 1 LSB is accumulated according to NO .slaw, at the end of the process the noise level will reach the 9th bit out of the 17th result.
Calculations of g , h (see the previous section), the ir squares and the PS(m), are performed while ignoring 8 LSB (which are considered noise) . Thus, if the processing unit is based on an 8 x 8 multiplier acumulator, only bits 9 to 16 are considered for obtaining PS(m) . The I MSB indicates immediately existance of a signal for the proper m.

calculation time

Calculation time of 32 points OFT processor based on the

shortened algorithm is based .on the following data: Q

(quadrature) = 2, TSW (switch on) = 200 ns, TAD (A/ D

conversion) = 30 ns, TWR (write RAM)= 75 ns. TRR (read

RAM) = 75 ns , TLS (LS-TTL operation) = 30 ns , TAP

(read PROM) = 125 ns and TMA (multiply/accumulate) =

125 ns .

Duration of sampling, A/D conversion , additions and

writing in RAM on 32 quadrature input signals : (N/2)(TSW
+ Q (TAD + TWR)) + (N/2)(TSW + Q (TAD + TRR + TLS + TWR)) = 16 .5 µ,s. Multiplication/accumulation time of a complete block: 4[(N/2)2(TAP + TMA) + TLS) = 256

µ,s . PS(m) calculation time of32 spectral lines: (2N/2)(2 x 2
x (TLS + TMA) + TLS + TMA) = 24 .8 µ,s. Total calcula-

tion time is approximately 300 µ,s; and maximum sampling

rate, 100 KHz.

I:)

references
(I) C.M . Radar, "Discrete Fourier Transforms", Proc. IEEE, June 1968.
(2) S. Winograd, "On Computing the OFT" , Proc . nat . Acad. Sci., USA, Vol. 73 , Apr. 1976.
(3) S. Winograd, "A new Method for computing OFT" . Proc. IEEE Int. Conj. Acoust ., Speech, Signal Proc ., 1977.
(4) H.J. Nussbaumer, P. Quandale, "Fast Computation of OFT Using Polynomial Transforms", IEEE Trans-on Acoust., Speech , Signal Proc., Vol. Asst 27 , Apr. 1979.

i"
"
'.+
·

24 Digital Design Ju LY 198 1

Barney Stevenson

just spent two

years programming

and de-bugging

a process control

system in

assembly code.

Now Barney thinks

he deserves some

congratulations

for his efforts.

Sorry Barney,

Barney Stevenson

but would run

development time by a factor able for just about any mini or

thought he deserved a pat

too slowly and of lO over assembly language. micro processor.

on the bock. As project

take up too

He also didn't know

For Barney? Still no

manager at Smart

much memory. about FORTH, Inc.

cigar. But for you, FORTH

Widgets, Inc., he had

Assembly code

They're the people who

offers a software tool that in

taken on the biggest real-

would take

invented this remarkable tool, speed, compactness and

time process control

longer to pro-

evolved it, and for 10 years

extensibility, simply has no

headache of his life. And

gram and de-

have seen it used in thousands

match.

after24 months he'd finally'---------' " - - - - ' bug, but was

succeeded in programming

the only answer for real-time

of applications ... from running an observatory to sorting

So call us at (213) 372-8493. Or write FORTH , Inc., 2309

and de-bugging Smart's

applications .

baggage, from video games

Pacific Coast Highway,

newest product.

Wrong.

to industrial robotics. Virtu-

Hermosa Beach, California

We think Barney missed

Real wrong .

ally every real-time applica-

90254. We' ll rush you the

the boot.

Barney didn't know

tion imaginable.

latest on polyFORTH,TM and

Barney figured the

about FORTH: a language

The latest evolution of

tell you where you can see it

choice was simple. High level that runs nearly as fast as

FORTH is called polyFORTH:T"' in action.

languages like Pascal and ForIran could program quickly,

assembly, is just as compact (if not more so), yet can cut

An incredible program-
FORTH, Inc. ming environment avail-

Circle 75 on Reader Inquiry Card

...the real-time saver:

Microprogrammable Processor
single-bit storage conceP-t
T he single bit storage concept is adaptable and may be varied to meet systems requirements. Expanding bit storage is an efficient method, and permits a doubling of total data bits stored for
each added bit of microcode. The ease of enable control circuitry modification, which changes the division between latches assignable to status bits only, (or to either status or flag bits,) permits rationalization of system requirements and design implementation.

by Alan W. Bentley
This design illustrates the principle of simultaneous and rapid processing. On a given microcode instruction, one flag status bit may be modified while several other bits may be referenced by different sectors of the microcode which are performing independent functions. Finally, latches differ from edgetriggered-storage devices as the latch-enable activates input gates, permintting track of D input during enable time.
At enable completion, the latch stores the last internally propagated input. Therefore, because the latch is enab led during the second half of the clock period, the latch input stabilization time is maximized to permit proper status storage. Specific instructions, however, may have long execution times.
Although instruction driven microprocessors fulfill the majority of processing applications, the high capability portion of the performance spectrum is dominated by microprogrammable processors. This follows from their architec tural differences. An instruction driven microprocessor is a serial device with a fixed arc hitecture and a given repertoire of instructions. Its performance is limited by the necessity of seq uentially executing those instructions. Its operating modes are relatively inflexible and it is difficult to adapt either the instruction set or the architecture to increase performance. Conversely, the microprograrnmable organization is more flexible . It is packaged as vertical slices
Alan W . Bentley is from Cubic Corp, ofthe Defense Systems Div. in San Diego, CA .

through a register array. arithmetic and logic unit. instruction decoding and execution logic and connecting paths.
Interconnecting slices establishes bit widths of the data word and processing unit. To support and control the processing unit. additional hardware is added and microcode instruction control is implemented. Processor performance is improved by increasing the number of tasks that may be performed simultaneously. This is achieved by expanding the support hardware and the microcode, obtaining a finer division of tasks and an increased capability to manipulate control and enable lines. Thus, the increased performance of a microprogrammable processor system is due to its organization which permits a number of tasks to be performed simultaneously.
single bit storage concept
In microprogrammable processor design, microcode controlled storage for status and flag bits must be provided. An approach has been developed that uses both microcode and hardware efficiently , and is adaptable , so it may fulfill varying system requirements. An 8-bit multiplexer (LS 151 ) and an 8-bit addressable latch (LS259) perform the data selection and storage functions , controlled by 4 bits of microcode. The lower three bits of microcode (2° - 22) address both the multiplexer and the latch , the upper code bit, 2 3, is used as a multiplexer strobe and when true. drives its output false. Also, the .upper two code bits, 2 2 and 23. when both true, suppress the latch enable. This divides the microcode word into three sectors; 0 16 through 7 16 stores the
(text continued on page 33)

26 Digital Design JULY 1981

MF-211
10112'' Enclosure for LSI 11/23 System with builtin RX02 equivalent floppy disk system. Available with or without processor and memory.
FD-311
AX02 equivalent dual floppy system, single or double sided. Includes bootstrap loader, self-tester, formatter and diagnostic diskette.

HD-11/T
20.8 Megabyte Winchester disk software equivalent to 4 AL01 units. Optional cartridge tape backup.
514'' enclosure with 8 quad slot backplane. Front panel console with switches for Enable/Halt, Boot/lnit and Line Time Clock.

Complete software compatibility
at a savings!

With CADS, you can configure your own DEC system and be assured of complete software compatibility. Each of the above systems is provided with slides for rack mounting or can be used in desk top applications. All DEC LSI 11 based modules and associated software packages are available through CADS, if desired.
Attractive Packaging Careful attention is given the CADS repertoire of enclosures in assuring you an attractive yet comfortable blending of product in the DEC environment.

Significant Savings Flexibility of procurement plus attractive OEM schedules allows you to optimize dollar savings in configuring your CADS system. Use the time tested technique. Compare.
Warranty and Maintenance A 90 day warranty is offered with your CADS system. In the event of malfunction, by use of provided diagnostic routines, the defective submodule is normally found within '!linutes. After verification with the CADS Maintenance Department, a replacement for your defective module will be promptly forwarded .

Call or write for a comprehensive literature package and prices.

Charles River Data Systems, Inc. 4 Tech Circle, Natick, MA 01760 Tel. (617) 655-1800 TWX (710) 386-0523 Circle 19 on Reader Inquiry Card

Uuge Aulgnment
FlagO Flag 1 . Flag2 Status A Status B StatusC StatusD Status E

llultlpluer Input
DO D1 D2 D3 D4 05 D6 07

Connection
vcc vcc vcc
Parameter A Parameters ParameterC Parameter D ParameterE

Oulput Ultch
Oo 01 02 03 04 Os Os 01

NOTES 1. Microcode S16 illegal - use unconditionally resets 0 3, status a latch 2 . Microcodes C16 - F160 surpass latch Enable input

...Microcode
Flllg
~

8tatu8 Stonlge
3 4 5 6 7

Table 1: Microcode and Input aulgnment for typical 8 bit storage application.

Usage Aulgnment

llultlpluer

Input

Col·iecllon

Output Laich

...Microcode
Flllg

FlagO Flag 1 Flag2 Flag3 Flag4 Flag5 Status A StatusB StatusC StatusD Status E Status F StatusG StatusH Status I StatusJ

vcc

1 2

0 1 2

vcc

Parameter A

Parameters

ParameterC

ParameterO

Parameter E

Parameter F

ParameterG

Parameter H

Parameter I

ParameterJ

NOTE 1. Microcode 168 + 178 illegal, use unconditionally resets if its 6 and 7 respectively
2. Microcodes 308 - 378 supress latch Enable input

......
10 11 12 13 14 15

8t8tua 8lOrege
6 7 20 21 22 23 24 25 26 27

Table 2: Microcode and Input aulgnmenta for a 16 bit application with 6 status bits, that are handled by one multiplexer. For flag bits 0 through 7, the 2" bit Is the octal latch D Input, requiring that the ftag bit set and reset microcode be reversed from those In Table 2.

Microcode

Eneble Equ.uona

u..

Alll1..U

008 - 178 208 ·- 378 408 -578 608 - 778

Clock · 2· · 24
Clock· 2· · 2·
Clock· 2· · 2·
Clock · 2' · 24 Clock · 2' · 2· · 8 · · 2" · 22

Flag Only Flag or Status Flag Only Flag or Status Flag Only Flag or Status Status Only
Status or Flag

Set 108 - 178, Reset 008 - 078 Multiplexer Input 008 - 078, Low Input 108 - 178
Set 308 - 378, Reset 208 - 278 Multiplexer Input 20 - 278 , Low Input 308 - 378
Set508 - 578, Reset408 -478 Multiplexer Input 408 - 478 , Low Input 508 - 578
Multiplexer Input 608 - 678 Enable Supressed 708 - 778
0 0 - 0 3 Status of Flag Use 0 4 - 0 7 Status Use Only
Enable Supressed 748 - 778

NOTES: 1. Three latches may be assigned flag only or flag or status use, corresponding multiplexer only requires in later case .

2. If flag only, the latch 0 input is microcode 2" bit, if flag or status the same input is multiplexer Y output.

3. One latch normally assigned status.use only, alternate enable equation and configuration shown if assigned to status or flag use

Tab~a 3: Expansion to 32 bits of storage. For each octal latch, shown Is its enable equation and Its microcode assignment. 28 Digital Design Ju LY 198 1

Who makes NTDS interlaces ~· rorPDP-11, VA : and LSl-11? ~. Rockwell, Rockwell

and Rockwell.

It's true. Rockwell International NTDS interfaces provide the communications link between the three DEC computers and USN standard tactical computers, or NTDS peripherals with FAST, SLOW or ANEW input/output channels.
This interface equipment performs all NTDS transfers including input, output, external function and external interrupt.
And it allows PDP-11, VAX and LSl-11 to respond as a
. peripheral to the NTDS computer, or to perform as acomputer to
NTDS peripherals, or to communicate via intercomputer channel. In addition, software drivers are available at no cost. Details? Call or write John Burlingame, NTDS Marketing,
Autonetics Marine Systems Division, Rockwell International, 3370 Miraloma Ave., Anaheim, CA 92803. (714) 632-4995.

9~11I'~ .~

Rockwell International

Circle 20 on Reader Inquiry Card

...where science gets down to business

MICR OCODE 2 ' THROUGH 2°

A -C

A-C

Y t-~~~~~~~~~~~~~~~~~~~~~~--I D

I 1 LS1 51 1

LS2 59
2·

Strobe

Clock

CLR

BIT 0 BIT 7

A -C

2·

: LS151

Strobe

GND

A-C Oo

BIT 8

· +-

LS 259

0 7 BIT 15

CLR

POR

.....

"\
Figure 1: Sixteen bit storage with 8 or fewer status bits. Parameter selection performed by single multiplexer.

INSTANT REAL-TIME CONTROL

·Built-in CRT terminal circ uitry · 24-hour clock· Serial and parallel data 110 ports· Cassette interlace · EPROM programmer·96 single-wire 110 lines ·B o n-boa rd relays · Up to 64 analog inputs and 32 analo g outputs with optional interlace modules.

Dynabyte's BASIC CONTROLLER is a versatile measurement and control computer that can:
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30 Digital Design JULY 198 1

Circle 21 on Reader Inquiry Card

The IPS 7800VAX* 11 Series
" .

The IPS 7811PDP* 11 Series

The IPS 5000Raytheon 500 Series

. . \wYeI're 1. n the mass stor-
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G,,..-, tape subsystems represents state of the art technology and total reliability. Because there 's more to mass storage than capacity-it's got to work. If you're a Dec, Perkin-Elmer or Raytheon user. we've got news for you. /PS has the highest performance

tape subsystems around. With features like: Telex, STC or Pertee drives; Dual-Density (1600/ 6250 BPI) or TriDensity (800/ 1600/ 6250 BPI) capabilities; tape speeds up to 125 ips; storage capacity up to 180 megabytes per reel; a 32k Byte FiFo buffer; and Data Chaining for reading and writing gapless tapes. We also offer complete, integrated subsystems or individual control units.
For performance and reliability; /PS works.

The IPS 3200Perkin-Elmer 3200 Series
IPS 6567 Rookin St., Houston, Texas 77074 Phone (7 13) 776-0071: wire IPS-HO U TELEX 792413 Regional offices located in Ca. and M ass.

*Registered Trademark of Digital Equipment Corporation.

Circle 41 on Reader Inquiry Card

I~ . ,, .., La"h 10.
Reset Latch 00 8 - 07· 2'
2· Clock

A-C Do

I LS151

Strobe

Microcode 22 Through 2°

2·

Clock

0 0 Bit 0

D LS259

· ·

G o , Bit 7
CLR

Pc5R

A-C

on Bit 8

G
LS259

D o,
CLR

Bit 15

P5R

Figure 2: Sixteen bit storage handling more than 8 status bits. Two multiplexers are needed to provide adequate parameter selection.

LSl-11 SYSTEMS FROM ANDROMEDA

Any size you want.

No matter what your LSl-11 system needs are, Andromeda can satisfy them .
For example, the 11 / M1 system shown on the right weighs only 14 pounds yet contains 102kb of mini disk storage

(expandable to 389kb), 64kb of RAM, space for up to 16kb of EPROM ,4 serial ports, and the LSl-11 / 2 CPU. All of this for less than $4000. While the 11 / M1 will run the RT-11 operating system , it is best suited for dedicated applications where its small size but large processing power are needed .
Near the other end of the scale is the 11 / H23-DDF system shown at the left. The mobile enclosure includes the LSl -11/23 processor, 256kb main memory, 1Omb of storage on the daub le density RK-05 cartridge disk and 1.2mb on the double aensity floppy disks . This system also has 4 serial ports and 7 empty dual width slots for additional interfaces . The $22,500 price includes the video terminal shown, a 150 CPS matrix printer, and the RT-11 operating system. ·
These are just two examples of the many LSl-11 based systems available from Andromeda . And the standard systems are just starting points; we will provide any combination of pack-

age, processor , memory, interfaces, and peripherals to meet your requirements. In addition to general purpose systems, we also have turnkey packages for word processing, time-sharing , data acquisition , and graphics.
We also provide individual boards, software and accessories to support LSl -11 systems .
LSl-11 , RT-11 , and RK--05 are trad emarks of the Digital Equipment Corp.
ANOnOMEO~
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Phone: 213/709-7600 TWX: (910) 494-1248
Prices are domestic U .S.A . onlv.

32 DigitalDesign JULY1981

Circle 23 on Reader Inquiry Card

(text continuedfrom page 26)

logic level of the addressed multiplexer input in the corres-

ponding latch, 8 16throughB 16 cause the multiplexer output to be false, resetting latches 0 through 3 respectively, and

C 16 through F 16 suppresses the latch ENABLE command, leaving the latched outputs unchanged.

During systems operation, there are two categories of

single bit information that must be stored for later use, they

are the status and flag bits. Status bits are associated with

specific parameters and store their values when pro-

grammed. Examples of such parameters are: sign bit , carry

out bit and the result of a register equal zero test. Conversely,

flag bits are not associated with specific parameters, rather

they may be programmed set or reset, and system require-

ments determine their definition. Therefore , to store a status

bit only one microcode is required, the parameter is routed

from the corresponding multiplexer input and the coded latch

stores the digital value . Flag bits require both a setting and

resetting microcode, which are formed by code pairs

differing by the 2 3 bit. If the 2 3 bit is false, the multiplexer

input, tied to Ycc. sets the addressed latch. If it is true, the

multiplexer strobe input causes the multiplexer output to be

false, resetting the latch. Thus, if the multiplexer D 1 input is

tied to Ycc. microcoding 116setsQ 1and 916resetsQ1 ·
When assigning microcodes and multiplexer inputs , codes

C l6 through F l6 suppress the latch ENABLE command.

Codes 4 16 through 7 16 control latches Q4 through Q1 respectively and must be assigned as status bits. Codes 0 l6

through 3 16 paired with 8 16 through B l6 control Qo through Q3 and may be assigned as either status or flag bits . Table 1 shows a typical application, that requires 3 flag and 5 status

bits. Shown for each bit is its assignment , multiplexer input,

controlling microcode and latch output. Typically , the

required number of status bits exceeds the number of flag

bits . The division of 4 status bits and 4 bits assignable to

either the status or flag category is satisfactory. If not , by expanding the input gate of the ENABLE circuitry to include

the 2 1 microcode bit, the microcodes that inhibit ENABLE

are reduced to E 16 andF 16 . The latches assigned to status bit only are reduced to Q 6 & Q 7. The remaining 6 latches may be assigned to either the status or flag category.

storage expansion

...

The flexibility of this approach allows expansion, if additional bit storage is required. Generally , each bit added

to the microcode doubles the capability of storing status or

flag bits, and to implement this capability, multiplexers and

octal latches are added in equal numbers. However, if a latch

is used to store flag bits only, its corresponding multiplexer is

not required, for with proper address assignments, a micro-

code bit can supply the D input to the flag latches.

For expansion to 16 bits of storage with more than 8 status

bits required, the hardware configuration is shown in Figure

1 with the input connections and coding shown for a typical

assignment in Table 2. If 8 or fewer status bits are required,

the reduced hardware configuration of Figure 2 may be used.

Three variations of the ENABLE equation are shown; with

the enable inhibit gate progressively expanded, to reduce

both the microcode combinations that are inhibited and the

number of latches committed to status bit use only . Thus , the

implemented latches are divided between the two categories

by adjusting the ENABLE equation.

Controlling four octal latches with a 6 bit microcode illus-

trates the principle of expansion. Table 3 shows each latch ·s

specific design information, and alternate configurations that

permit design optimization.

I:>

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Circle 24 on Reader Inquiry Card

Circle 25 on Reader Inquiry Card JULY 1981 Digital Design 33

GCR Increases
data recording rates and reliability_

G·roup-coded recording (GCR) of data onto by Mike Newton magnetic tape has been around for a number

of years. IBM first announced it in 1973. Even Non-return to zero (NRZI) recording, the earliest method.

though GCR increased data recording rates and

writes 800 bits of information per inch of tape . Magnetically , NRZI relies on a flux change in the oxide coating of the tape

reliability, most manufacturers originally stayed out of the GCR race. They felt that improved tape

to indicate a· t ' bit of information, while the absence of a flux
change signifies a ·o·. Because NRZI requires one flux

rate and reliability would prove unnecessary, change for one bit of information, the format provides 100%

because other storage media (such as disk) might push tape aside. They were wrong: the GCR tape market, $3.5 billion four years ago, should reach three times that in 1981-82. Today, over 70% of

recording efficiency. Unfortunately, mechanical skew considerations limit NRZI density to the 800 bpi range , and the format cannot correct errors.
Phase encoding (PE) , which uses a self-clocking approach , was next developed to overcome the deficiencies

large computer systems installed in the U.S. utilize GCR-equipped tape subsystems.
Why this dramatic growth? The reason: tape remains the least expensive medium for data storage - approximately one-tenth the cost of disk. It is the only legal electronic means of archiv-

of NRZI. Like NRZI, PE records nine tracks on the tape .
However, it records the· 1· and ·o· bits via a flux change -
the difference between the two bits depends on direction of flux change. PE suffers from the drawback ofneeding at least one flux change per bit. Two like bits in succession require a second flux change at the boundary between the cell bits . This flux allows write current to return to a state from which

ing data, and is the most interchangeable medium.

it can write a flux change in the same direction as flux change

Designing faster tape drives did not appear to
be a solution for improving tape-subsystem per-
formance, because electromechanical limitations make speeds above 250 ips impractical. The alternative (putting more data on the same amount

of the preceding bit of information. Thus, PE can require as many as two flux changes per bit of information that give it a recording efficiency of 50%.
At least one flux change occurs per bit cell in PE. The technique benefits from the fact that each of the nine tracks can have its own clocked detection circuit. This circuit will

of tape by increasing fluz density) seemed more practical. However, increased density called for improved methods for detecting and correcting

have a variable-frequency c lock running in a phase-locked loop with data on the track. With a clocking circuit monitoring each track, added hardware can sense flux

errors in the data .

Mike Newton is from Storage Technology Corp.
'..

Bit Stream in a Track -

1 - - - - -....- - NRZI

(800 B/IN . 800 FC/IN .) - M

+ M . . _ -. .

(1,600 B/ IN., 3,200 FC/IN .)

-M

GCR

(6,250 B/IN., 9, 042 FC/IN .)
- Mt-----+---

Figure 1: Flux change patterns shows that NRZI recording uses a flux change for a logic 1 and no flux change for a O; PE recording uses a

flux change for 1s and Os; GCR, like PE, uses a flux change for the binary numbers, the data Is coded before recording.

34 Digital Design JULY 1981

P4 or P42 AS NEEDED

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. ..

BEEHIVE INTERNATIONAL
"A proven competitive manufacturer of smart terminals "

Circle 26 on Reader Inquiry Card

JULY 198 1 Digital Design 35

..g, ,, 35dB

'; !B

-~ J:

z 0
~ '

,a.",,:'

20dB

Cl)

0 .__ _ _ _ _ _ _ _...._ . _...._ . -

3,000 6,000 9,000 12,000

Flux Density (FC/IN)·

#9 . The translator receives data bits four at a time, and converts the four #I bits into a five-bit code character, the four #2 bits into a five-bit code character, and so on down through the four #9 bits . The resulting nine five-bit characters are .then recorded onto tape. Thus, each eight-byte data group is recorded as a ten-byte storage group. For retrieval. the process is reversed. The four-to-five translation scheme was devised to provide a five-bit storage subgroup that, for each four-bit data subgroup, contains no more than two consecutive ' O' bits and no more than one 'O' bit on either end. This scheme insures that no recorded track will ever contain more than two consecutive bit cells without a flux transition .

error detection and correction

Figure 2: Slgnal-kH1olse ratio at the reed head depends upon the closeness of the flux change on the tape. GCR, which operates at a flux density of 9000 flux changes/Inch (fc/ln.), provides an S/N
above the minimum needed for reliable Information.

PE error-correction system provides single-track error correction. The more extensive GCR approach utilizes a system of cyclic codes recorded with the data . GCR uses the same hardware as PE - amplitude sensing (noting the

change amplitude and position within each bit cell. Detection fluctuations in flux-change amplitude) and phase error

of either of these two conditions occurring outside normal (checking the exactness of the flux location within the bit

paramaters indicates erroneous data within a specific track . cell) - to give the system its multiple-bit error-correction

Byte-by-byte parity checking can further pinpoint the ability.

incorrect bit or bits within that track and correct errors on the

The error-checking and correcting (ECC) byte of in forma-

fly . However, in any given data record, only single-track tion (attached to the data subgroup in the buffer prior to

error correction is possible via these safeguards .

encoding is generated by a polynomial as described in ANSI

Since the independent clock of each of the nine tracks spec x 3 .54). This polynomial is based on the 56 bits of

virtually frees PE from skewing problems experienced with information that make up the data group. Thus, a direct

NRZI , it allows PE recording at 1600-bpi density . It is mathematical relationship exists between construction of the

possible to use PE at higher densities, but the increased ECC byte and all data from which it is generated. When the

frequency of flux changes begins to cause an unacceptable data is read back, control hardware reworks the polynomial

signal-to-noise ratio . Also , dual-track error correction - not generation and checks the resulting error-correction byte

provided for by PE- becomes important at higher densities. against the ECC byte originally written. If a discrepancy

occurs, it can be used to calculate exact position of the

whatisGCR?

erroneous bit or bits within the data group . Although this

Very simply, GCR is a recording format that takes advantage technique can correct only single-bit errors, amplitude

of the efficiency of NRZI while implementing the clocking sens ing and phase error checking can correct multiple-bit

procedures of PE. Aided by a sophisticated approach to error errors.

correction, GCR has resulted in a 6250-bpi recording

density , plus a dual-track error detection and correction capability. The 6250 density was selected, because 6250 bpi processed at 200 ips equals 1.25 Mbytes/sec ., which is a data rate compatible with many of today 's high-performance computer channels.

4-Bit Data Value
0000 0001

5-Bit

Recording Value

...

11001 11011

how does it work?

0010

10010

,...

0011

10011

Like its predecessors , GCR records on nine tracks.

0100

11101

.,.._

Basically, it uses the NRZI convention: a flux change represents a ' I ' bit of information , while the absence of a flux change indicates a ' O' bit. However, it requires a modification . Originally , a NRZI recorder utilized no clocking

0101 0110 0111 1000

TRANSLATES TO

10101 10110 10111 11010

.,
..

system, and it could write a string of 'O' bits , represented by a

1001

series of bit cells with no flux change. Incorporating a clock-

1010

ing system into the GCR approach eliminated this capability ,

1011

since periodic flux transitions are necessary to ensure the synchronization of the clocks on the nine tracks . Essentially ,

1100 1101 1110

GCR can write no more than two 'O' bits consecutively .

1111

This is where the term " group-coded " comes in . Before

01001

01010 01011

."'.

11110

01101 01110

01111

the GCR system records the information , it collects the data

in an eight-byte buffer. The tape controller adds seven data bytes and an eighth byte for error checking and correcting information . This function produces an eight-byte data group. Although the information comes in broadside (byteserial) from the CPU , it is coded bit-serially in subgroups of four bytes.
For clarity , let's number the bits in each byte, # 1 through

Figure 3: Group coding starts with the data entering the controller from the CPU In byt&-serlal order. The data bytes are stacked In the controller buffer. An error-correcting code (ECC) byte Is gei1e1.tect by, and added to, every 7 data bytes to make an 8-byte data group. The tnnslator converts the data Into storage code. This process Is blt-serlel In which each 4-blt data subgroup Is
assigned a 5-blt storage code. See Figure 4 for · more detailed
explanation.

36 Digital Design JULY 1981

..
· /

t
·

Scanner sense.

You may think it 's a simple task to build your own laser scanner. After all, the technology is direct and the components are readily available. But, when you consider system performance versus cost, you 'll come to realize that people .. . people with scanner sense are necessary for success.
We at Tropel , who have manufactured scanning

systems for every conceivable application from non-impact printing to COM, command a capability and expertise that insures you a high performance system at a cost lower than you can do yourself.
For more information and scanner sense, contact: Tropel Division , Coherent, Inc., 1000 Fairport Park, Fairport, N.Y. 14450, 716 377-3200.

~ ~ COl-4EREnT

TROPEL DIVISION

Circle 27 on Reader Inquiry Card

CPU Channel

Data Group
·

Data Subgroups

5 6

ECC

xx x

1 /0 1/0 2

xx x

1/0 3 1/0 4

xx x

1/0 5 1/0 6 1/0 7

xx x

1/0 8

..,

1/0 9

4-5

l
~
\
t
J
L
[

Translator Circuit
.. .. ..... .. 0 : 0 F., 1 0 0 1 0 I', 1

1 1:·
·' 0 .
...0 · 1
0 1

0 1 0 0

,·1 1

0....

0 1

1 fo. 0

x ~: x ·~ x

. x

-;.
......

x .i x x

x. x
-';
x .. x

x .: x x x "· x

o: 1 0 0 ',1 x: x x x ·:x

. ~

· 1
J!

1 1

1 0

·.d., ,-K
1 ·· :x

x x x x

x ')?,·
x x.

1 2

'\ 3

J 4
\ 5 6

"'.;:,(.
uro
i=
~
..r.o.

] 7

( 8

.
i
....

1 0

1 1 0 1

1 0

\ 9

Storage Subgroups

Storage Group

Figure 4: The four-to-five GCR translation scheme Insures that, when data la recorded on the tape, no more than two successive zeros

appear on any track. This scheme makes synchronization of the read head more reliable.

Two additional error check characters, incorporated into each storage record, supplement the OCR error detection and correction systems. A polynomial, defined by ANSI specs. generates the AuxCRC (auxiliary cyclic redundancy character) . A different polynomial, based on all the data , plus the pad bytes (inserted after the residual customer data bytes to fill out the last storage group) and the AuxCRC itself

generates . The AuxCRC and the CRC are generated in a manner similar to the ECC , and provide a final check to insure the integrity of the data after it is read . These characters do not locate or correct errors , but simply indicate
' that an error or errors exist. Whenever that happens, the
computer is automatically alerted to switch to retry procedures .

GCR Block Specification
.

Control Subgroups Data Subgroups

Figure 5: GCR group consists of preamble (A), resync burst (B), end mark (C), poatamble (0), storage groups (E), and residual and GCR

groups. (F).

38 Dlgltal Design JULY 1981

resynchronization
Amplitude sensing, used with GCR to allow multiple-bit, double-track error correction, works the same way with GCR as it does with PE recording . When an erroneous bit is sensed, the dead-track register causes faulty track shut down. This action could create a real problem in GCR. since long data blocks are desirable to optimize the advantages of GCR's increased density and to avoid devoting too much tape space to interblock gaps . It is obviously unsatisfactory for one or perhaps two tracks to shut down for the duration of a record of that length . Consequently, the GCR format provides an opportunity to reset the dead-track register. It also resynchronizes the read detection circuits during recording by writing a resync burst in all tracks after every 158 data groups. provided that at least one more data group remains to be written. The resync burst consists of a Mark I subgroup, ten · 1'-bit bytes, and a Mark 2 subgroup. The burst is unique and automatically triggers resynchronization of the nine read detection circuits. Because error probability relates directly to record length , and since resynchronization occurs after every I , 106 data bytes , the inclusion of this precaution reduces the probability of an uncorrectable error in an 8000-byte data block by a factor of almost seven.
the GCR data block
So far, we've discussed data groups. AuxCRCs, CRCs and resync bursts . Next we will discuss the other components that make up a GCR data block and their assembly on tape.
The Preamble. Just as PE does, the GCR record begins with a block of information designed to alert the amplitude sensors of the beginning of a block, and to sy nchronize the read-detection clock for each tape track. The preamble consists of a term subgroup and a secondary subgroup . These subgroups announce the beginning of a data block, followed by 14 subgroups made up entirely of· 1· bits which allow the read-detection circuits to synchronize. A Mark I subgroup ends the preamble.
Storage Groups. Groups of coded data are then written on the tape. Each group consists of 10 bytes . When decoded, the I0 storage bytes are reconverted back into seven bytes of data and the ECC byte .
Resync Burst. After each 158 storage groups (data), a written resy nch burst resets the dead-tracking circuits and brings the read-detection circuits back into sync .
End Mark. When the system has finished writing all the storage groups (data), it writes End Mark on all tracks.
Residual Group. Each group contains (prior to coding) eight bytes of information (7 data+ ECC) . Therefore, if after the system has coded and written all data groups, fewer than seven bytes of customer data remain , they are written into the residual group. The system then fills the group up with pad bytes of zeros, plus an AuxCRC byte and an ECC byte .
CRC Data Group. Next, the system writes a CRC group containing the CRC bytes and the residual count byte. The count byte describes the number of actual data bytes vs. pad ti bytes in the preceding residual group. Five or 6 CRC bytes (all identical) plus an ECC byte make up the CRC group prior to conversion by coding into a 10-byte storage group.
The Postamble. A mirror image of the preamble , the postamble which finishes the record contains a Mark 2 subgroup (the reverse of a Mark I) , 14 subgroups made up entirely of · 1· bits , a secondary character and a term character.
We've seen how GCR provides nearly error-free storage of information at low cost. Keep these fundamentals in mind
when selecting tape storage subsystems. t:>

IEEE S-100 64K dynamic RAM board supports Cromemco-type bank port/bank byte bank select; 16K block addressing (can be bank independent); configurable as 16, 32, or 48K board without removing devices. Supports OMA, and includes fail-safe refresh circuitry (processor transparent for Z80A or 8080 CPUs).4116 RAMs; no wait states at 4MHz.
Part of the CCS industrial quality S-100 product line. Call or write for a free catalog.
California Computer Systems
250 Caribbean Drive Sunnyvale, California 94086 {408) 734-5811 Telex 171959 CCS SUVL
Circle 29 on Reader Inquiry Card
JULY 1981 Digital Design 39

DECProdu ts Directory

current listing .includes
lllodels, s12ecs, and 12rices
T his directory ofproducts from Digital Equipment Corporation lists products that include: microcomputers, minicomputers, super minicomputers, mainframes and peripherals. Peripherals include storage peripherals such as disks and tape storage. It also includes terminals, printers, and card readers.
The prices listed are only representative and may not represent the highest or lowest prices available. In general, prices for processors tend to represent smallest configurations with minimum memory.
Where a system price only is available, this is noted with "(sys)." For
peripherals, generally the controller is not included in the price. These prices represent typical United States prices and may vary in other countries. Unless otherwise noted, all prices are representative single-unit prices.
Next month's issue will complement this issue by providing a computer compatible directory. This month's DEC directory and next month's computer compatible directory are the first of their kind. Make sure to save them, they will be valuable for future reference in the upcoming year.

Processors

microcom~uters

LSl-11/2. Entry-level microcom-

puter. Wordlength - 16 bits. Maxi-

mum memory 64 KB. Uses MOS

memory. Uses LSl-11 bus. Floating-

point instruction set available as

option. Software compatible with PDP-

11 line.

$1,050.

LSl-11 /23. Top-of-the-line micro-

computer. Wordlength - 16 bits .

Maximum memory 256 KB. Uses

MOS memory . Uses LSI-1 I bus. Float-

ing-point instruction set available as

option.

$3,000.

PDP-11 /23. Packaged version of

LSl-11/23 Wordlength - 16 bits.

Maximum memory 256 KB . Uses
. . MOS memory. Uses LSl-11 bus.
Floating-point instruction set available

as option.

, $7,600.

40 Digital Design JULY 1981

irector
.

minicomputers

PDP-11 /24. Entry-level minicom-

puter. Wordlength - 16 bits. Maxi-

mum memory I MB . Uses parity MOS

memory. Uses UNIBUS. Floating-

point instruction avai lable as

option .

$11,000.

PDP-11/34. Midrange minicom-

puter. Wordlength - 16 bits. Maxi-

mum memory 256 KB . Uses panty

MOS memory. Uses UNIBUS . 2 KB

cache memory available as option.

Floating-point processor avai lable as

option .

$12,800.

PDP-11/44. Midrange minicomputer. Wordlength - 16 bits . Maximum memory I MB . Uses ECC MOS memory. Uses UNIBUS . 8 KB cache memory standard. Floating-point processor available as option. $28,300.

PDP-11170. Top-of-the-line minicomputer. Wordlength - 16 bits . Maximum memory 4 MB . Uses ECC MOS memory. Uses UNIBUS. 2 KB cache memory standard . Floating-point processor available as option .
$84,500.

PDP-8/A Low- to midrange minicomputer with traditional architecture . Wordlength - 12 bits. Maximum memory 128 K words . Uses MOS or core memory. Uses OMNIBUS. Floating-point processor avai lable as option.
$4,500.

super-
minicomll_uters

VAX-11/750. Entry-level super-

minicomputer. Wordlength - 32

bits. Maximum memory 2 MB. Uses

ECC MOS memory. Can employ

UNIBUS and MASSBUS . 4 KB cache

memory standard.

$89,900 (sys).

VAX-111780.

Top-of-the-line

superminicomputer. Wordlength

- 32 bits. Maximum memory 8 MB

(except for multiport configurations

where an additional 4 MB can be used).

Can emp loy UNIBUS and MASSBUS .

Floating-point processor is available as

option.

$128,000.

mainframes

DECsystem-1090 Mainframe. Wordlength - 36 bits. Maximum memory 18 MB . Uses core memory. 2-Kword cache memory standard.
$639,800.

DECsystem-1091 Mainframe. Wordlength - 36 bits. Maximum memory 13.5 MB . Uses MOS memory. 2 K word cache memory standard .
$476,000.

DECSYSTEM-2020 Entry-level

mainframe. Wordlength - 36 bits.

Maximum memory 2.3 MB . Uses

MOS memory. 512-word cache mem-

ory standard .

$168,500.

DECSYSTEM-2040 Mainframe. Wordlength - 36 bits . Maximum memory 9 MB. Uses MOS memory.
$357,100.

DECSYSTEM-2060 Mainframe. Wordlength - 36 bits. Maximum memory 9 MB. Uses MOS memory . 2-K word cache memory standard.
$431,000.

Storage
Peri~herals

disks

RX01 Front-loading Diskette. Capacity per drive: 0.25 Mb. Drives per controller: 2 . Average access time: 180 ms (seek) 8.3 ms (latency). Peak transfer rate 62 Kb/sec . Uses floppy technology. Processors supported: PDP-8/A, DECstation, LSI-11/2, LSI11/23, PDP- 11/03, PDP-11/23 , PDP11/24, PDP- I l/34A, PDP-l l/44, PDP-11/70, VAX-11/780. $3,600.

RX02 Front-loading Diskette. .,. Capacity per drive: 0.5 Mb . Drives per controller: 2 . Average access time: 180 ms (seek) 8 .3 ms (latency) . Peak transfer rate 62 Kb/sec . Uses floppy technology. Processors supported: PDP-8A, DECstation, LSl-11/2 , LSI - ,.. 11/23, PDP-11/03, PDP-11/23 , PDP11/24, PDP- l l/34A , PDP-11/44, PDP11/70, VAX- 11/750, VAX- 11/780.
$4,150.
RL01 Top-loading cartridge. A Capacity per drive: 5.2 Mb . Drives per .., controller: 4 . Average access time: 55 ms (seek) 12.5 ms (latency). Peak · transfer rate 512 Kb/sec . Uses 3330 ~ technology. Processors supported: PDP-8/A, LSI-11/2, LSl-11/23 , PDP- ~
11/03, PDP-11/23, PDP-11/24, PDP- ..- ...
.

b .,

!-#

-4

-I

42 Digital Design JULY 1981

COMPATIBLE COMPUTER PRODUCTS EXPOSITION San Franclacan Hotel · San Francisco, CA · September 16 and 17, 1981

· Pre- Register for the First

National Exposition Dedicated

. Exclusively to the Expcmding World

of Compatible Computer Products

~-------------F'll J. OUT_

~~II

THE REGISTRATION FORM

ON THE REVERSE SIDE

AND MAIL THIS PAGE IN A

COMPANY ENVEl.OPE

Save

TO_

time and

the $5

: : ~·entrm1ce ~

REGISTRAR
COMPAT.'81 COMPATIBLE COMPUTER PRODUCTS EXPOSITION

. :
, )
... I

lee.

Digi!gt~Q!!~gn

1901 S. Bascom Avenue

~1
I

Suite 1005

I I

Campbell, CA 95008

.--.M· !4T'8, 1 ~·

~fr.==:iiiii~~~~~~~~~~;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;=::;;;;;;;;;;;;;;;;;;;;:::i:: ·

lt:t:t:t:t:t:t:

THE FIRST NATIONAL EXPOSITION DEDICATED EXCLUSIVELY TO

1: ...

C a THE EXPANDING WORLD OF

COMPATIBLE COMPUTER PRODUCTS EXPOSITION

COMPATIBLE COMPUTER PRODUCTS I

~ SEPTEMBER 16 & 17, 1981 SAN FRANCISCAN HOTEL (Across the street from WESCONJ SAN FRANCISCO,.-'C;;..;.A...;..__.I

Pre-register now. Advance registration by mail is more convenient for you and saves time and money. Avoid long waiting lines . Since I

I seminars are limited in size, they are available on a first-come, first served basis. Badge will be waiting for you at the registration desk.

MORE .. .with advance registration your entrance to the exhibits only will be FREE!

I w.

.. Please read carefully. Fill in form completely . Use envelope if enclosing remittances. Deadline for returning pre-registration August l, 1 1981 . Later registration must be done at Registration Desk at the Exposition.
I_.

I. For "hich of the CPU's listed below do you plan to purchase computer compatible products and/or services?

I I ...

0 Data General 0 Digital Equipment Corp.

0 Hewlett-Packard 0 lBM

0 Intel 0 Motorola

0 Perkin Elmer 0 Other _ _ _ _ _ _ _ _ __

II. For the CPU's you have checked, what types of plug compatible products do you specify or purchase?

A. Computers/Controllers
0 Programmable Controllers 0 Single Board Computers/Chips
B. Data Terminals
0 Alphanumeric Display Terminals 0 Graphic Terminals 0 Programmable/Intelligent Terminals
C.Memory
0 Add-in and Add-on Memory Sytems 0 Bubble Memory Systems 0 Semiconductor Memory
(RAM/ROM , etc .)
D. Mass Storage/Drives
0 Disk Pack/Removable Cartridge 0 Fixed Disk/Large 0 Floppy Disk 0 Magnetic Tape

O Tape Cassette/Cartridge 0 Winchester Drives
E. Printers/Plotters
0 CRT Display Copiers/Printers 0 Line Printers 0 Plotters 0 Serial Printers 0 Teleprinters
F. Input/Output Units
0 COM Equipment 0 Digitizer/Light Pens 0 Facsimile Equipment 0 Magnetic Card Equipment 0 Optical Input Units 0 Voice Response Equipment 0 Other, please explain

G. Controllers/Interfaces
0 Communications Interfaces/Adapters 0 Data Acquisition and Control Modules/
Subsystems
0 Intelligent Interface Modules/
Subsystems
0 Peripheral Controllers/Formatters
H. Communications
0 Communications Multiplexers 0 Concentrators/Message
Switching Systems
0 Data Transmission Equipment 0 Modems/Data Links
J. Software/Finnware
0 Applications 0 Communications 0 Development Aids for Microcomputers/Minis 0 Languages 0 Operating Systems

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I I I I I I I I I I I I I I I I I I I I 0 SEMINAR 1-3-CSF Terminals and Printers

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I II I II II II I I II II IIII

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Seminars are subject to changes, substitutions or cancellations without prior notice.

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before August I. 1981.

Registration will be refunded if cancellation is received prior to August 15 , 1981 Minors cannot be accommodated .

II "
1·
I .. II ..
I ~ I.... Io
I~
I~
I~
1~
I :!!
I u; I~
I~
I t I I ... I.. I I" I ..
,II ....
.. ..-
I I I · I ,..
Ir ..
I..
, I
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,~
I I I

DEC Products Di rnctorv

l l/34A, PDP-11/44, PDP-11/70,

VAX-11/780 .

$4,700.

dual-access option . Processors supported: VAX-11/750, VAX-11/780.
$19,000.

_ _tape star~

RL02 Top-loading cartridge. Capacity per drive: 10.4 Mb. Drives per controller: 4. Average access time: 55 ms (seek) 12.5 ms (latency) . Peak transfer rate 512 Kb/sec . Uses 3330 technology . Processors supported: PDP-8/A, LSl- 11/2, LSl-11/23, PDP11/03 , PDP-11/23, PDP-11/24, PDPl l/34A, PDP-11/44, PDP-11/70, YAX-11/750, YAX-11/780. $5,600.
RK07 Free-standing top-loading cartridge. Capacity per drive: 28 Mb.

RPO&. Free-standing disk pack.

Capacity per drive: 176 Mb. Drives per

controller: 8. Average access time: 30

ms (seek) 8.3 ms (latency). Peak trans-

fer rate: 806 Kb/sec. Uses 3330-11

technology. Has dual-access option .

Processors supported: PDP- l l/34A ,

PDP-11/44, PDP-11/70, VAX-11/780,

DECSYSTEM-20, DECsystem-1090

and -1091.

$34,000.

RM05 Free-standing disk pack.

TU58 Drive for preformatted 1/4-

inch tape cartridge. Capacity of tape

unit: .25 Mb. Drives per controller: 2.

Tracks: 2. Recording density: 800 bits/

in . R/W speed 30 in/sec . Peak transfer

rate: 38,400 baud . Rewind speed: 60

in/sec. Can be rack-mounted, in table-

top chassis, or as build-in component.

Processors supported: LSl-11/2,

LSI-11/23, PDP-11/03, PDP-11/23,

PDP- l l/34A, PDP-11/44, PDP-11/70,

YAX-11/750.

$750.

Ori ves per controller: 8. Average ac- Capacity per drive: 256 Mb. Drives per

cess time: 36.5 ms (seek) 12.5 ms (la- controller: 8. Average access time: 30 TS 11 Drive for 1/2-inch tape in

...

tency) . Peak transfer rate 538 Kb/sec . Uses 3330-11 technology . Has dual ac-

ms (seek) 8.3 (latency). Peak transfer rate: 1200 Kb/sec. Uses 3330-11+

reels up to 10.5". Capacity of tape unit: 31 Mb. Drives per controller: 1.

cess option. Processors supported: technology. Has dual-access option. Tracks: 9. Recording density: 1600

PDP~ 11/24, PDP- l l/34A, PDP-11/44, Processors supported: PDP-11/70, bits/in . R/ W speed: 45 in/sec. Peak

PDP-11/70, VAX-11/750, VAX- YAX-11/780 .

$34,000 transfer rate: 72 Kb/sec. Rewind speed:

11/780.

$12,000.

150 in/sec. Buffering: tension arm.

RP07. Free-standing fixed medi- Tape threading: manual. Rack-

RM02 Free-standing disk pack. um. Capacity per drive: 512 Mb. mount or free-standing unit. Processors

Capacity per drive: 67 Mb . Drives per Ori ves per controller: 8. Average ac- supported: PDP-11/24, PDP- l l/34A,

controller: 8. Average access time: 30 cess time: 23 ms (seek) 8.3 (latency). PDP-11/44, PDP-11/70, VAX-11/750,

ms (seek) 12.5 (latency). Peak transfer Peak transfer rate: 1300 Kb/sec (under YAX-11/780.

$13,800.

rate: 1200 Kb/sec . Uses 3330-11+ technology. Has dual-access option .

TOPS-10 or TOPS-20); 2160 Kb/sec with interleaved vectoring. Uses 3370

TE16 Drive for 1/2-lnch tape In

Processors supported: PDP-11/24, technology. Has dual-access option. reels up to 10.5". Capacity of tape

PDP-l l/34A, PDP-11/44 . $19,300. Processors supported: VAX-11/780, unit: 31 Mb. Drives per controller: 8.

DEC-SYSTEM-2040, -2050, and Tracks: 9. Recording density: 800 or

RM03 Free-standing disk pack. -2080, DECsystem-1090 and -1091. 1600 bits/in. Read/write speed: 45 in/

Capacity per drive: 67 Mb. Drives per

$38,000. sec. Peak transfer rate: 72 Kb/sec.

controller: 8. Average access time : 30 ms (seek) 8.3 (latency). Peak transfer rate: 1200 Kb/sec . Uses 3330-11+ technology. Has dual-access option . Processors supported: PDP-11/70,

RP20. Free-standing fixed medl· um. Capacity per drive: 929 Mb (967 Mb under TOPS-10 and TOPS-20) . Ori ves per controller: 8. Average ac-

Rewind speed: 150 in/sec. Buffering: vacuum. Tape threading: manual. Free-standing unit. Processors supported: PDP- l l/34A, PDP-11/44, PDP-11/70, VAX-11/780. $15,000.

YAX-11/750, VAX-11/780, DEC-

S YSTEM-20.

$20,300.

RM80 Free-standing fixed medium. Capacity per drive: 124 Mb. Drives per controller: 8. Average access time: 25 ms (seek) 8.3 ms (latency) . Peak transfer rate: 1200 Kb/sec . Uses 3350 technology . Has

cess time: 25 ms (seek) 8.3 (latency) . Peak transfer rate: 1200 Kb/sec . Uses 3370 technology. Has dual-access option . Processors supported: DECSYSTEM-2040, ·-2050, and -2080, DECsystem-1090 and-1091. $49,000.

TU77 Drive for 1/2-lnch tape In reels up to 10.5". Capacity of tape unit 31 Mb. Drives per controller: 4 . Tracks: 9. Recording density: 800 or 1600 bits/in. R/W speed:' 125 in/sec . Peak transfer rate: 200 Kb/sec. Rewind speed : 440 in/sec. Buffering: vacuum. Tape threading: automatic. Free-stand-

JULY 1981 Dlglt.11?,e&lgn 45

DEC Products Directory

mg unit. Processors supported: baud . Paper type: roll. Buffer capacity: Maximum pnntmg speed: 300 baud.

-+- .

PDP-11/44, PDP-11 /70, VAX-1 1/750, 160 characters. Fonns handling stand- Paper type: pin feed. Buffer capacity:

V AX-11/780,

DECSYSTEM-20, ard. Extended Logic (XL) option 160 characters . Fonns handling stand-

DECsystem-1090 and -1091. $23,100. available.

$1,600. ard. Extended logic (XL) option

available.

$1,750.

TU78 Drive for 1/2-inch tape in LA34-RA Receive-only hardcopy

reels up to 10.5". Capacity of tape terminal. Uses dot-matrix (9 x 7) for LA120-AA Hardcopy terminal.

unit 145 Mb. Drives per controller: 4 . alphanumeric characters. Character Uses dot matrix (7 x 7) . Character set:

Tracks: 9. Recording density: 1600 or set: 96 ASCII. Also has graphics-out- 96 ASCII. Bidirectional printing. Max-

6250 bits/in. R/W speed: 125 in/sec. put printing from raster-screen video imum printing speed: 1200 baud.

Peak transfer rate: 781 Kb/sec . Rewind terminal. Maximum printing speed: Buffer capacity: 4 K character max .

speed: 440 in/sec. Buffering: vacuum. 300 baud . Paper type: pin-feed .

$2,750.

Tape threading: automatic. Free-stand-

$1,550.

ing unit. Processors supported: VAX-

LA120-RA Receive-only hard-

11/780.

$25,500. LA34-VA Receive-only hardcopy copy terminal. Uses dot matrix (7 x

terminal. Uses dot-matrix (9 x 7) for 7) . Character set: 96 ASCII. Bidirec-

TU72 Drive for 1/2-inch tape in alphanumeric characters. Character tional printing. Maximum printing

reels up to 10.5". Capacity of tape set: 96 ASCII. Also has graphics-out- speed 1200 baud . Buffer capacity I K

unit 145 Mb. Drives per controller: 8. put printing from raster-screen video character.

$2,700.

Tracks: 9. Recording density: 1600 or terminal. Maximum printing speed:

6250 bits/in. R/W speed: 125 in/sec . 300 baud . Paper type: roll feed. VT100 Video terminal. Character

Peak transfer rate: 781 Kb/sec . Rewind

$1,650. set: 96 ASCII. Maximum communica-

speed: 500 in/sec. Buffering : vacuum.

tion rate: 19,200 baud. User-selectable

Tape threading: automatic. Free-stand- LA34-WA Receive-only hardcopy functions such as reverse video, choice

ing. Processors supported: DEC- terminal. Uses dot-matrix (9 x 7) for of 80- and 132-column lines, jump or

SYSTEM-20. DECsystem-1090 and alp hanumeric characters. Character smooth bidirectional scro lling, double-

- 1091 .

$35,300. set: 96 ASCII. Also has graphics-out- width or -s ize characters, and split

put printing from raster-screen video screen scrolling. Video in and video

terminal. Maximum printing speed: out. Movable keyboard.

$2,150.

300 baud. OEM version sold without

Terminals and Printers

paper option.

$1 ,700.

LA38-GA Hardcopy terminal. Uses dot x matrix (9 x 7) . Character set: 96 ASCII. Has auxiliary numeric keypad.

VT1 OOT Video terminal with emission shielding. Character set: 96 ASCII. Maximum communication rate : 19,200 baud . User-selectable functions such as reverse video, choice

Maximum printing speed: 300 baud. of 80- and 132-column lines, jump or

Paper type : pin feed. Buffer capacity : smooth bidirectional scrolling, double-

terminals

160 characters.

$1,750.

LA38-HA Hardcopy terminal. Uses

width or -size characters, and split

screen scrolling. Video in and video

o ut. Movable keyboard.

$7,100.

LA34-DA Hardcopy terminal. Uses

dot-matrix (9 x 7). Character set: 96

ASCII. Maximum printing speed: 300

baud. Paper type: roll. Buffer capacity:

128 ch;iracters.

$1 ,450.

dot-matrix (9 x 7) . Character set: 96 ASCII. Has auxiliary numeric keypad. Maximum printing speed : 300 baud. Paper type: pin feed. Buffer capacity: 160 characters . Has pedestal stand.

VT103 Video terminal with provisions for addition of LSl-11 /2 or LSl-11123. Character set: 96 ASCII. Maximum communication rate : 19,200

..
..,

$1,850. baud. User-selectable functions such as

LA34-AA Hardcopy terminal. Uses dot-matrix (9 x 7). Character set: 96 ASCII. Maximum printing speed: 300

LA38-AA Hardcopy terminal. Uses dot-matrix (9 x 7). Character set: 96 ASCII. Has auxi li ary numeric keypad .

reverse video, choice of 80- and 132column lines, jump or smooth bidirectional scrolling, double-width or -size characters, and split screen scrolling.

~6 Dig ital Design Ju LY 1981

TI leadership.
In 64K DRAM technology. In Memory Systems.

Whatever bus you're using - VAXt, about a quarter of a board of TTL circuitry.

Custom capability

PDP-lit, LSI-lit, or even Multibust - TI

All TI boards are 100% tested. 100% If you need custom memory systems in pro-

can supply add-in memory system boards burned-in. All in Tl's modern, high-capacity duction quantities, be sure and talk to TI.

with dynamic RAMs from our own high- Houston facility. Delivery normally ranges We'll custom design boards for specific ap-

performance 64K series.

from stock to four weeks.

When you specify Tl's high-density, low-

power boards, you save rack space. So you

Low cost

plications wit h the same meticulous attention to cosUperformance effectiveness that our standard boards offer.

have more room for 110 - or whatever else Representative pricing· for TI memory So for the latest DRAM technology,

you need. And, the low-power consumption boards is as follows: $1600 for TMMl0000-04 highest packing densities, lowest power con-

of TI 64K DRAMs, compared to the old- (192KB); $3800 for TMM20000-02 (256KB); sumptions, all at competitive prices, re-

fashioned 16Ks, ·cuts temperature levels and $9000 for TMM30000-0l (lMB); $1845 for member memory systems from Texas

increases reliability. The reduction in mem- TMM40010-07 (64KB).

Instruments.

ory package count by as much as four boosts reliability even more.

TI MEMORY BOARDS - CURRENT AVAILABILITY

Th find out more about TI boards call your local TI field sales office

System reliability will be higher, too. Thanks to error correction/detection available on many TI memory boards. Using our own bipolar EDAC chip helps cut component count and system temperature, as well as improving basic system re-

System TI Series

BYTES/BOARD 64K 128K 192K 256K 512K 768K 1M

LSl-11t TMM100001

x x x

PDP-11t TMM200002

x x x x

VAXt TMM30000

x xx

x x Multibusi TMM400102

x x

or authorized distributor. For

details, call (713) 778-6549, or write

tIoncTourxpaos rIantsetdr,umIennts te-~

grated Memory Systems, P.O. Box 1443,

MIS 6404, Houston,

liability. The EDAC chip replaces ' Parity optional 2 EDAC standard

Texas 77001.

tTrademar1< Digttal Equipment Corp,

TEXAS INSTRUMENTS

t·rura.dse.mSairn1g<leI-nutenlitCporircpe.. subject to change without notice.

INCORPORATED

Circle 3 on Reader Inquiry Card

DEC Products Director

Video in and video out. Movable key- VT173 Video terminal for typeset- joystick for cursor positioning . Image

board.

$3,200. ting computer systems. Uses LSI- memory to 5 12 x 526 x 4 noninter-

11/2 . Special typesetting keyboard laced . Image range: 16 colors or 16

VT105 Scientific/laboratory vid- ( 105 keys in reporter version; 123 keys shades of gray .

$6,480.

eo terminal. Character set: 96 ASCII. in classified-advertisement vers ion).

Limited graphics capabilities (charts Has 32-Kb internal memory. Maxi- VSV11 Engineering video ter-

and histograms). Maximum com muni- mum comm unication rate: 19,200 minal for LSl-11 and PDP-11 /03,

cation rate: 19,200 baud. User-se- baud . User-se lectab le functions such as PDP-11/23. Raster-scan unit avail-

lectable functions such as reverse multiple text creation and editi ng areas. ab le wit h either monochrome or full

video, choice of 80- and 132-column Movable keyboard.

$5, 195. color presentation. Character set: 96

Iines, jump or smooth bidirectional

ASC II . Has joystick for cursor posi -

scro lling, double-width or -size VS11 Engineering video terminal tioning. Image memory to 512 x 526

characters, and split screen scrolling. for PDP-11 and VAX-11 comput- x 4 noninterlaced . Image range: 16

Video in and video out . Movable key- ers. Raster-scan unit avai lable with co lors or 16 shades of gray. $5,730.

board.

$3,100. either monochrome or fu ll co lor pre-

se ntation. Character set: 96 ASC II. Has VK100 Keyboard subsystem. µP-

based unit for connection to video dis-

play (monitor). Has graphics, alpha-

numerics. Can be used with color or monochrome monitors. Has 8 color~ or

8 levels of gray in picture presenta-

tions. Has graphics output port for use

with LA34-V A tenninal. Has internal

(ROM-based) BASIC. Has interface

for use with (user supplied) graphics

tablet.

$4,200.

High·Speed
M N\ Storage System

Offers superior performance, throughput and reliability!
Compatible with: ·D.E.C. ·Data General ·Westinghouse

The non-rotating MaxiRam is a solid-state disc replacement storage system that operates at the speed of main memory. It is ideal for the following: ... if your processor is disc 1/0 bound. ... if your CPU spends too much time in the 'wait' state. ...if your present disc gives you reliability headaches.
Write or call to find out how your memory performance and reliability can be dramatically improved. Units available in both core and semiconductor.

I ~ Imperial Technology, Inc.

I I

831 S. Douglas Street · El Segundo,

___., California 90245 · Telephone: (213) 679-9501

Circle 63 on Reader Inquiry Card

48 Digital Design JULY 1981

AT·· Tenth Semi-Annual

lljf

SEMlrlAA/EXl11BIT
Automated Testing for Electronics Manufacturing
PASADENA CENTER, PASADENA, CA
JANUARY 18-21 , 1982
,_
TECHNICAL SEMINAR AND EQUIPMENT EXHIBIT
Technical papers and workshops focus on practical testing problems Three-Day Exhibit provides a comprehensive display of test and measurement equipment.
For further information : call (617) 232-5470 or write Registrar, ATE Seminar/Exhibit, 1050 Commonwealth Ave. Boston, MA 02215
Produced by Electronics Test and co-sponsored by Circuits Manufacturing, Digital Design and Design Engineering Magazines.

Don·t Get Lost in the Maze.

BRAEGEN can help you find your way. We offer you:
DEC COMPATIBILITY AND MORE... Now you have a choice of six fully software/hard-
ware compatible disk subsystems that provide higher storage capacities (up to 256 Megabytes per drive), higher throughput (1 .209 Megabytes/sec transfer rate), and several features not available on some other systems ie: automatic disk format; automatic bootstrap; data checksum, automatic selftest, and more.
OUR OWN NATIONWIDE SERVICE... Now you can count on fast, local service by more
than 275 factory-trained technicians in more than 55 service centers across the country (more locations are planned). Each center is staffed by Braegen personnel who are thoroughly familiar with your peripheral.
A QUALITY PRODUCT AT A DEFINITE PRICE ADVANTAGE...
Compare our product Hne to that of DEC . You'll soon discover that feature-for-feature and value-forvalue, BRAEGEN is your best cost/performance choice. And we come through for you with FAST

DELIVERY and a unique 1 year warranty.
A UNIQUE TRADE-IN POLICY·.. We offer you an alternative to expensive growth.
Our unique trade-in policy allows you to upgrade your system at a fraction of the usual cost. We'll give you fair market value for your DEC disk drive as a credit toward reducing the overall cost of your system expansion.
LET BRAEGEN BE YOUR SINGLE SOURCE FOR ALL DEC-COMPATIBLE PERIPHERALS...
Only BRAEGEN can offer you a full line of Disk Subsystems, Magnetic Tape Subsystems, Add-in RAM Memory boards, VT-100 Emulating Display Terminals, and Line Printers to help you get the most out of your DEC system. And all of our
products come complete with pre-installation site survey, installation, training, and documentation.
Let us help you through the maze...and show you true cost/performance in Disk Storage. Call your local BRAEGEN Sa/es Office listed below.

gBRl1EGEn

CENTRAL REGIONAL OFFICE: (312) 692-2250 Overland Park, KS (913) 262·5053 I Southfield, Ml (313) 569-3269 1 Bloomington, MN (612) 831·5007 1 Cleveland, OH (21 6) 362- 1555 EASTERN REGIONAL OFFICE: (617) 890-4890 North Cross, GA (404) 449-0846 I Union , New Jersey (201) 687-7150 I New York, NY (212) 682-7451 I Bala Cynwyd, PA (215) 667- 1740 I McLean, VA (703) 442-8508 WESTERN REGIONAL OFFICE: (408) 496-8578 Anaheim, CA (714) 632· 7232 I Los Angeles, CA (213) 644·2292 I San Francisco . CA 14151 495·89 73 I Denver. CO 1303) 340· 1062 I Bellevue, WA (206) 74 7·9321
Circle 32 on Reader Inquiry Card

VISACOM/23

GRAPHIC/IMAGE SYSTEM.

SUPER CAPABILITIES,

SUPER FAST, SUPER PRICE.

DeAnza's VISACOM/23 now offers you features and

image process-

capabilities previously only found in large-scale

ing more easily

systems. Features like proven and superior image

and much faster.

and graphic display software, advanced computing

It allows you to do more work in less time.

capabilities and proven operating systems software.

VISACOM/23 has a full 512K byte memory for

All at a very reasonable price.

dedicated computer operation or image display as

The VISACOM/23 and the DeAnza Library of

well as 128K bytes of dedicated memory outside of

Image Processing Software (LIPS) allows you to

the image memory, four independent graphic

perform work you only thought possible on the

overlay channels, alphanumeric character

large, expensive systems.

generators, color and monochrome transformation

Graphic and display efforts like convolutions, rotations, classification, amplifications, addition,

units and cursor overlays. If your graphic and imaging application calls

subtraction, image and graphic zoom and scroll as well as much more.

for a system that provides quality, flexibility and added capabilities all in an economical package,

And, the VISACOM/23 incorporates the powerful

find out more about the VISACOM/23 today.

LSl-11/23 computer so you perform graphic and

Call or write:

Del\nza Systems Incorporated

Corporate Headquarters: 118 Charcot Avenue· San Jose, California 95131 · (408) 263-7155 ·TWX (910) 338-7656 Regional Offices: 100 First Avenue N.E. , Suite 114F, Cedar Rapids, IA 52401, (319) 354-1366, TWX (910) 525-1306 · 3918 Prosperity Avenue, Suite 204, Fairfax, VA 22031 , (703) 698·0600, TWX (710) 833-0369 · SOOK Middle Country Road, Middle Island, NY 11953, (516) 736-3440 · 4401 Atlantic Avenue, #28, Long Beach , CA 90807, (213) 422-4445.
GIVE YOURSELF A BETTER IMAGE

Circle 71 on Reader Inquiry Card

DEC Products Directory

LP20-D Impact line printer. Output LP100-H Impact line printer. Out-

_ _ _ll_rinters speed: 660 lpm. Character set: 96. put speed: 660 lpm. Character set: 96.

Paper feed: pin feed . For DECSYS- Paper feed : pin feed . For DECSYS-

LP11-AA Band printer. Output TEM-20 computer systems . $37,900. TEM-20 computer systems . $45,400.

speed: 285 lpm. Character set: 64.

Paper feed: pin feed . Uses horizontal-

font printing . For computers with

UNIBUS.

$8,350.

LP100-B Impact line printer. Output speed: 1200 lpm . Character set: 64 or 96 . Paper feed : pin feed . For DECsystem- IO computer systems .

LP20-C Impact line printer. Output speed: 900 lpm . Character set: 64 . Paper feed : pin feed . For DECSYSTEM-20 computer systems . $36,500.

LP11-BA Band printer. Output

$63,100.

speed: 285 or 204 lines per minute .

Character set: 64 or 96. Paper feed ; pin

feed . uses horizontal-font printing . For

computers with UNIBUS .

$8,950 .

LPV11·AA Band printer. Output

speed : 285 lpm . Character set: 64.

Paper feed ; pin feed . Uses horizontal-

font printing. For computers with LSI-

11 bus.

$8,350.

LPV11·BA Band printer. Output

speed: 285 or 204 lpm. Character set:

64 or 96. Paper feed ; pin feed. Uses

horizontal-font printing. For computers

with LSI- I I bus .

$8,950.

Add SMDs To Your PDPs

LP11-C Impact line printer. Output

speed: 900 lpm. Character set: 64.

Paper feed; pin feed. For UNIBUS

PDP- I ls .

$27,800.

LP11·0 Impact line printer. Output

speed: 660 lpm. Character set: 96.

Paper feed : pin feed . For UNIBUS

PDP-I ls.

$29,700.

Get The Disk Storage You Need ...
· Single board controllers featuring Xylogic's exclusive PERIPHERAL PROCESSOR technology
· Complete subsystems with your choice of drives from all major vendors
· 1·00% DEC emulation

LP11·V Impact line printer. Output

speed: 300 lines per minute. Character

set: 64 . paper feed; pin feed. For LSI-

11 bus PDP- I ls .

$16,400.

LP11-W Impact line printer. Output

speed: 240 lpm . Character set: 96.

if) Paper feed : pin feed. For LSI- I I bus

PDP-I ls

$19,500.

LP11·Y Impact line printer. Output

speed : 600 lpm. Character set: 64 .

Paper feed: pin feed . For UNIBUS

PDP- lls .

$20,200.

LP11 ·Z Impact line printer. Output

speed : 436 lpm . Character set: 96 .

Paper feed : pin feed . For UNIBUS

PDP- I ls.

$21,900.

LP20-B Impact line printer. Output speed: 240 lpm. Character set: 96 . Paper feed : pin feed . For DECSYSTEM-20 computer systems . $18,700.

· Aggressive OEM discounts · Significant savings compared
to DEC disk subsystem prices
... When You Need It
For PDQ response to your SMD requirements call Xylogics today. In Mass call (617) 272-8140.
U.S. Headquarters: 42 Third Avenue, Burlington, MA 01803 Tel: (61 7) 272-8140 (TWX 710-332-0262) European Headquarters: 46-48 High Street, Slough, Berks SL1 1ES U.K. Tel : (0753) 78921 , Telex 847978

Circle 33 on Reader Inquiry Card
JULY 198 1 Digital Design 51

DEC Products Directory

LP-100-F Impact line printer. Output speed: 900 lpm. Character set: 64. Paper feed: pin feed. For DECSYSTEM-20 computer systems. $44,300.
LP200-B Band printer. Choice of font styles and character sets (64 or96). Paper feed: pin feed. For DECSYSTEM-20 computer systems. $54,600.
LXY11 Impact printer/plotter. Output speed: 300 lpm. for text, 170 lpm for plotting. Character set: 96 . Plot density: 60 dots/in horizontal, 72 dots/ in vertical . Optional PROM character

sets (OCR, Multi-FONT, and large block letters) . For UNIBUS PDP-I l s.
$12,600.
LQP Letter-quality printer for word processors. Daisy-wheel impact printing . Paper feed: pin feed . Used with WS 78 and WP200 systems.
$4,495.
Card Readers

CR11 Punched card reader. Card

type: 80-column. Reading speed: 300

cards/min . For PDP- I I.

$8,250.

CD20-A Punched card reader.

Card type: 80-column. Reading speed:

300 cards/min. For DECSYSTEM-20

computer systems .

$7,920.

CD20-C Punched card reader.

Card type: 80-column. Reading speed:

1200 cards/min. For DECSYSTEM-20

computer systems.

$27,960.

~
Moving? ~

1. For FASTEST service attach old

mailing label in space below.
.,4;

Circle 35 on Reader Inquiry Card 52 Digital Design JULY 1981

3. Mail to : C1rculat1on Manager
Digital Design 1050 Commonwealth Ave . Boston, MA 0221 5

COMMUNICATIONS PRODUCTS
ABLE DH/DM'"
(16-LINE COMBINATION DHll & DMll REPLACEMENT)
INSTALLS IN: UNIBUS systems .. . 1 hex SPC slot. DATA RATES: 14 standard rates plus 19.2K baud and a user programmable rate. PROCESSING ADVANTAGES: Word transfer (in lieu of byte DMA) cuts bus time in half OPERATING MODES: Full duplex with modem control. IMPLEMENTATION ADVANTAGES: On-board self-test/display. One bus load.
QUADRASYNC/B '"
(4-LINE DL!l REPLACEMENT/ EIA)
INSTALLS IN: All PDP-11's; 4-lines per SPC slot at one unit load to Unibus. DATA RATES : 7 independently selectable baud rates for each of 4 channels (150-9600). ELECTRICAL: EIA standard RS232C (Modem control not supported). VECTOR/ AD· ORESS SELECTION: Vector and address values to be set on boundaries of 008 or 408.16 continuous word address for Vector or Address.
QUADRASYNC/C'"
(4-LINE DL!l REPLACEMENT/ CL)
INSTALLS IN: All PDP-ll 's; 4-lines per SPC slot at one unit load to Unibus. DATA RATES: 7 independently selectable baud rates for each of 4 channels (150-9600). ELECTRICAL: 20MA current loop (Send : Recei ve). VECTOR/ ADDRESS SELECTION: Vector and address values to be set on boundaries of 008 or 408. 16 continuous word address for Vector or Address.
Q U A D R A S Y N C / E '"
(4-LINE DLll-E REPLACEMENT)
INSTALLS IN: All PDP-ll's; 4-lines per SPC slot at one unit load to Unibus. DATA RATES: 7 independently- selectable baud· rates for each of 4 channels (150-9600). ELECTRICAL: EIA standard RS232Cwith modem control. VECTOR/ ADDRESS SELECTION: 16 continuous word address for Vector or Address- starting values selected on any boundary.
Q U A D R A C A L L '"
(4-LINE DNI I REPLACEMENT)
INSTALLS IN: All PDP-11's; 4-lines per SPC slot at one unit load to Unibus. PERFORMANCE: Interfaces up to 4 Bell 801 ACU 's with Unibus enabling any PDP-11 to dial any DDD network number to establish data link. INPUT/ OUTPUT: 5-input signals from ACU are handled by EIA RS232 receivers. 6-output signals are transmitted using EIA RS232 drivers. VECTOR/ ADDRESS SELECTION: Allows selection of device address and vector by use of pencil switches.
ABLE DV/ 16
(16-LINE DV11 REPLACEMENT)
INSTALLS IN: All PDP-11 's; in less than one half the space of DVll . DATA RATES: 16-line throughput of up to 30,000 char/ sec (19.2K baud full duplex for each line) total. PROCESSING ADVANTAGE: Word transfers (in lieu of byte DMA) permit user to operate within one half the DV11 bandwidth for data transfers. OPERATING ADVANTAGE: User may mix sync and async lines in combinations of 4 or 8 lines with modem control and full system software compatibility with all DVll performance features.
ABLE DZ/ 16
(16-LINE DZll-E REPLACEMENT)
INSTALLS IN: All PDP-ll's in any standard hexwidth SPC slot; takes half the space at half the bus loading imposed by the DZll-E. DATA RATES: All 15 otandard DZll baud rates(S0-9600). IMPLEMENTATION ADVANTAGES: On-board pencil switches allow address and vector selection flexibility with-
~~:~bl~e;:. ~';.';,~uchf~:;!i .Data format is program-

MEMORY PRODUCTS
SCAT/ 45'"
(ADD-IN FASTBUS MEMORY)
INSTALLS IN: PDP-11 / 45, -11 / 50 and -ll/55. EXPANDS IN: 32K word increments/ board. One-half of the available Fastbus space will accept full 124K word complement. ADDRESSES ON: An y 4096 word boundary across entire 124K word range. User has full memory complement at 330 nsec cycle-time memory instead of 32K word limitation imposed by the computer manufacturer.
CACHE/ 45'"
(CACHE BUFFER MEMORY)
INSTALLS IN: PDP-11 / 45, -11 / 50 and -11 / 55. CAPACITY: 2048 brte (lK word). ENHANCEMENT FACTOR: Run time reductions to 50% (100% speed improvement) are achievable. CACHE PARITY: AutomaticallL goes off-line in event of any data error. RANGE SE ECTION: User may optimize hit ratio by upper/lower limit switch settings. SPECIAL FEATURE: Cache/ 45 can be enabled via software or console switches.
CACHE/ 434'"
(4K WORD CACHE MEMORY)
INSTALLS IN : PDP-11 / 34 and -ll / 34A without using any additional backplane space! CAPACITY: 8192 brte (4K word). ENHANCEMENT FACTOR: Run time reductions to 40% (70% speed improvement) are achievable. CACHE PARITY: Automatically goes off-line in event of any data or address error. RANGE SELECTION: User may optimize hit ratio by upper/lower limit switch settings. Cache action monitor indicates hit rate.
CACHE/ 440'"
(4K WORD CACHE MEMORY)
INSTALLS IN: PDP-ll/ 35 and-11/ 40 without using any additional backplane space! CAPACITY: 8192 byte (4K word). ENHANCEMENT FACTOR: Run time reductions to 40% (70% speed improvement) are achievable. CACHE PARITY: Automatically goes off-line in event of any data or address error. RANGE SELECTION: User may optimize hit ratio by upper/ lower limit switch settings. Cache action monitor indicates hit rate.
EMULOADER'"
(ODT/BOOTSTRAP LOADER REPLACEMENT)
INSTALLS IN: PDP-11/ 05, -11/ 10, -11 / 35, -11/40, -11/45, -ll/50 and -11/55. MECHANICAL: Dual width card replaces standard Unibus termination; requires no additional backplane space. OPERATING ADVANTAGE: Provides fixed console emulator (ODT) and bootstrap loaders for DL11 , PC11, RF!l, RK06, RK 11, RP04/ 05/ 06, RPll, RS03/ 04, RX11, TC11, TM11 and TU16. SPECIAL FEATURE: Performs memory diagnostic each time a boot operation is done from ODT.

GENERAL PURPOSE PRODUCTS
QNIVERTER'"
( Q-BUS TO UNIBUS CONVERTER OR UNIBUS TO Q-BUS CONVERTER)
INSTALLS IN: LSI-11, LSI-11 / 23, PDP-11 / 03 and PDP-11/23 via quad-width card. APPLICATIONS: Allows Unibus-compatible controllers and memories to be used with LSI computer systems, or LSI-based peripherals to be used with PDP-11 computer systems. FEATURES: Supports features of LSl-11 / 23 including the full 128K address capability.
R E B U S '"
(BUS REPEATER - DB11 REPLACEMENT)
INSTALLS IN : All PDP-ll's· without using any additional backplane space. MECHANICAL: One dual-width card plugs into the same pair of connectors as the Unibus extension cable which is then plugged into the REBUS connectors. COMPATIBILITY : Allows for 18 additional bus loads and 50 foot bus extension. Requires no software changes. Bus cycle time unaffected fo r devices on CPU side of REBUS - increased by 250 nsec max. for de vices on outboard side.
DUALI/O'"
(GENERAL INTERFACE-DR11-C REPLACEMENT)
INSTALLS IN : All PDP-ll's; in any SPC slot via quad-width card. APPLICATION: Dual 110 is equivalent to two (2) DRll-C's and provides the logic for program-controlled parallel transfer of 16-bit data between two (2) external user devices and a Unibus system. OPERATING ADVANTAGE: Provides user the hardware/ software equal to a dual DR11-C in DnITT~~M·sthe space and one-half the bus loading of
INTERLINK/UNI
(DRll-B AND 1h DAll-B REPLACEMENT)
INSTALLS IN: All PDP-11's in any SPC slot via hexwidth card. APPLICATIONS: Provides full DRll-B (DMA INTERFACE) and one side of DAll-B (UNl8 US LINK) capability on a single card. OPERATING ADVANTAGES: Requires only one hex-width card in each computer to effect link vs. full four-slot system unit per computer. Exhibits one bus load. Directly software transparent as a DR11-B replacement or when expanded to DAll-B equivalency.
BUSLINK/UNI, LSI OR U TO Q
(CPU TO CPU LINK : UNIBUS TO UNIBUS. UNIBUS TO Q-BUS OR Q-BUS TO Q-BUS)
INSTALLS IN: All PDP-11's and/ or LSI-11 's via pairs of hex-width, hex/quad-width, or quad-width cards and suprlied cables. APPLICATION: Provides full DAll-B (Unibus or Q-bus link) compatibility on single cards. BUSLINK operates at DA11-B transfer rates over distances of up to 50 feet. OPERATING ADVANTAGE: Requires only one card per CPU to effect link at minimal bus loading vs. full system unit per computer.

DEC Compatible Products Continue Upward Growth

also, how not to get caught in your own traQ

T he early days of DEC compatibility saw financially shaky companies often offering products that later proved to be unreliable. From that unpromising beginning has emerged a generally healthy, dynamic industry, most of whose offerings begin with unqualified reliability. But there are still some pitfalls in this comparatively new supply source. This article will hopefully guide you safely past those consumer traps. Best tip: know your supplier!

by Paul Snigier

In investigating , insist on answers ; your job and your firm

are on the line - not theirs . Check the reputation of the firms

DEC compatible products continue their inroads, taking you investigate by calling several. But, with myriad firms

more market share, and improving from previous days of and new startups dotting this field , it's impossible to evaluate

poor boards and poorer service. DEC compatibility has reputations, much less keep track of them. While compiling

gained respectability . Unlike the earlier days of DEC com- our August Computer Compatible (COMPAT) Directory

patibility , which was set off by the introduction of the PDP- issue-which will be distributed atourCOMPAT show next

11 , respectability has come to the field. Many of the manu- month - we discovered firms not listed anywhere else by

facturers of DEC compatible products are relatively long- any other source of information . To check on them . you

term survivors in this field . They have survived the shakeout

might start by using next month ·s directory issue . Ask col-

.t.

and lean years, and have grown into well-staffed , well- leagues within your department and company. While visiting

fielded outfits that can design, manufacture and support their shows , make contacts and ask them . Phone contacts for

DEC compatible products for years to come. Others , fre- recommendations and what bad or good experiences they "ve

quently cottage shop outfits started by college students and had . If they work in a non-competing field. they may be glad

others, lacked the staying power or motivation to adequately to talk. hoping you ' ll reciprocate sometime . Find out what

service their products. More than one product was made with your competitors prefer - and what firms they avoid .

substandard parts , assembled in a cellar, with solder bridges

Get customer references from the firm. Contact them and

and !Cs inserted backwards. These products were foisted off determine their level of sophistication and breadth of experi-

onto unsuspecting OEMs. If the boards or products didn't ence. Each contact may provide you with two or three addi-

work - which all too often became frequent enough to create tional leads, giving you a good idea of how that firm conducts

monumental design and production headaches - then the its business from the customer's viewpoint. This may not be

only thing that was more aggravating was the promised field what the firm tells you .

service from the DEC compatible manufacturer which

You have the right to ask for proof that the firm has staying

wasn't all that had been promised. Times have changed.

power and commitment to that product line . Obtain a written

Large semiconductor makers, such as National Semicon- financial report . Get bank references. Interpret growth pat-

ductor , which provided some material used in this article, terns . That is , interpret them in terms of what's going on with

and others like Mostek and TI, are actively pursuing this other firms in that same sector of the DEC compatible mar-

market. Obviously , they have a decided edge over other ket. If many have gone belly-up in the past three years that

add-in/add-on memory makers when volume is the driving marketed this product and committed their main marketing

force. We wish to thank System Industries, Imperial Tech- effort to this product line , then it's very likely that this firm

nology, and other manufacturers for providing us with tech- will more likely than not also end up on credit-hold with

nical material and answering our questions.

suppliers and be unable to correct the problems . Or. a firm

vendor selection

may grow too rapidly, with sales skyrocketing, and wind up in receivership with cash flow problems. Slowed deliveries

If the product you're specifying is something you can service (and the related worsening field support) will hurt your firm· s

and is simple enough , or commonly-used and easily service- reputation.

able by other field techs, then vendor selection may assume

You should check training; your people must be trained on

less significance than if the products are more complex or less the product you'll buy . Is it at the end user's site? At yours?

well-known .

Or at the maker's site? It 's a good idea to have some inde-

pendence in having your own service capability in case

Paul Snigier is the Editor ofDigital Design magazine .

something happens to your supplier's field service. It' s also a

plus in selling your customers. and makes a good advertising

54 Digital Design JULY 1981

and sales pitch. See if you can negotiate manufacturing rights of the documentation. And they know it. So , documentation

to the product that you purchase . It's just one more safety net gets the short end of the stick. Make sure you ' re not the

in case the manufacturer goes under or decides to get out of victim. Demand quality documentation.

this product line, or put it on the back burner.

Your own documentation to the end user will also be

documentation: key to quality

written in part from the documentation you receive. In the case of military systems. a market that is targeted to grow in

lt Poor firms provide poor documentation; good firms. usually the eighties. poor documentation can prove your undoing.

good to excellent documentation. Insufficient information With more functionally illiterate students coming from pub-

about, say, a controller, could mean the difference between a 1ic schools and entering the military, and with the exodus of

disaster and a maintainable product. If the product is un- skilled and technically-trained men from the military to

sophisticated, then a basic instruction list. theory of opera- industry. the armed forces must train an increasing number of

tion and schematics might be satisfactory . Perhaps it leaves recruits rapidly . Unfortunately. the quality of the recruits. in

something to be desired. but it's something you and your terms of their reading comprehension. is declining. With

designers and field techs can live with. Such a documentation increasing classroom size and lack of meaningful punish-

is "'adequate," although annoying and tedious to interpret.

ment. and school discipline problems at epidemic propor-

For more sophisticated equipment , documentation tions. there is no chance of any real improvement in reading

becomes critical. Check the manuals and documentation to comprehension within the e ighties. The alternative, aside

maintain, field repair and even build your own one day . Does from simpler and less sophisticated military systems. is the

the manufacturer provide on-going support for his docu- generation of simpler documentation and training materials

mentation, providing decent retrofits and upgrades?

from OEMs . Tedious documentation will only make it harder

Failure to provide adequate documentation at this stage in for you to write decent documentation for military systems.

the development of the DE<;: compatible marketplace is inex- Demand good documentation. If the firm has mediocre

cusable; it is an indication of the lack of concern that this documentation . even if you don·t specify that product. let

manufacturer feels towards his customers . It may be a sign of them know how you feel. A few complaints to their president

things that are waiting in store for you if you deal with him. will get some changes.

Poor documentation is rarely a sign of incompetence: it's usually due to lack of concern or a tight-fisted company that's

DEC-compatible makers cite plusses

overlooking its EEs. When a design project is behind, guess Add-in memory from non-DEC sources offers the following

what gets put off until later? Finally, at the end of the design advantages: (I) Products cost thousands of dollars less than

cycle, there is a sudden rush to put together some documenta- non DEC. yet offer many additional features. (2) 97% of the

tion - anything - just to meet the commitment. Program- time. you get delivery within. say. 20. days. DEC guarantees

mers, and to a greater degree, designers, are judged primarily delivery within 6-9 months. (3) Products offer extras. An

on the code they generate and the circuits they design and add-in memory may give you an ON/OFF switch that DEC

package - not mainly on the quality of documentation. doesn ' t. In such a case. on-site reconfiguration/trouble

Project leaders are usually not judged primarily on the quality

(continued on page 58)

Vendor Selection Crtterla
· Financial stability · product commitment · field service · training · manufacturers' rights · reputation · other
Product considerations
· cost · delivery · extras · warranty · reliability · installation costs · field service · flexibility · other
Sources
· DEC Directory (this issue) · COMPAT Directory (next month) · colleagues' experiences · customer references · examine vendor list · trade press articles · market reports · visits to vendors · examine vendors' records

Vendor And Product Selection Criteria

c rlt lcal

Important

completed?

date

0 0 0 0 0 0 0 0 0

moderate
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0

unimportant
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0

Figure 1: Develop an evaluation sheet and use one per product. The above evaluation criteria worksheet is only an example; yours will include more criteria tailored to your specific applications.

JULY 1981 Digital Design 55

YOU ARE CORD/ALLY INVITED TO

COMPATIBLE COMPUTER PRODUCTS EXPOSITION
SEPTEMBER 16 & 171 1981 SAN FRANCISCAN H011

COMPAT '81 r:,~s conceived
· Enhance Computer Capabilities
· Provide Computers with Greater Flexibility
· Assure Availability ofPeripherals, Accessories and Software for ALL Branches ofthe Computer Industry

· . .

THE COMPATIBLE COMPUTER EQUIPMENT MANUFACTURERS (CEiis), MEMBERS OF
A SPECIALIZED INDUSTRY, WILL SHOW AND TELL ALL ABOUT THEIR
PRODUCTS AND SERVICES

LISTEN To authoritati~e speakers give you information on how CEMs (Compatible
Equipment Manufacturers) help OEMs, systems
integrators, tum-key houses and large volume sophisticated
end users SOLVE COMPUTER APPLICATION PROBLEMS

CIRCLE NO. 69 FOR YOUR EAR ( Y CIRCLE NO. 99 FOR YO~ 1

ANOTHER EXPOSITION ORGANIZED BY:
The Benwill Conference Group who also bring you the ATE Seminar/Exhibit, PC '81 - the International Printed Circuits Conference
and the Electronics Test and Measurement Conference

THE FIRST NATIONAL EXPOSITION DEDICATED EXCLUSIVELY TO THE EXPANDING WORLD OF COMPATIBLE COMPUTER PRODUCTS
a (Across the street from WESCON) SAN FRANCISCO,--C-A------

A MARKETING FORUM forCEMs
T: his exposition is dedicated to the proposition that the unprecedented growth and expansion in the use of computers for all kinds of applications will continue at an exponential rate . No one company can solve everyone' s applications problems; no one company can supply everyone's needs for complete systems, add-ons, peripherals and software . Building around the central processing unit, the OEMs, the systems integrators, the turn-key houses and the sophisticated large volume end users will continue to use compatible computer equipment to devise special systems to solve applications problems with greater versatility and flexibility.

.,
BIRD ATTENDEE'S REGISTRATION FORM
:; HIBITOR'S APPLICATION FORM

IF Y o u ARE a buyer.and speci~er of plug-m electrorncs and appropriate software, you have a need to know about currently available products you can design into your systems as well as future trends in the
state-of-the-art THIS EXPOSITION
GIVES IT TO YOU·

PRODUCED BY:
.:;v-:=;:=====:=::;::::::::=====
Dig1tgtR:!.~lgn
co-sponsored by Circuits Manufacturing,
Design Engineering and Electronics Test magazines.

design considerations

more storage per spindle than RPOX and RMOX drives. (4) Requires hardware or software changes? Better that it

· Reliability: MTBF, MTTR · Compatibility with industry std. form, fit and function

doesn't. (5) Multiple CPU option that allows accessibility to database for up to, say , four different DEC minis . (6) Dual-

· Serviceability

channel drive capability that permits greater throughput ,

· Ability to meet industry std. environmental specs

redundant system configurations . (7) Easy expansion via hardware modularity and software transparency . These

business considerations
· Financial stability · Who is the supplier's parent company?

aren't the only criteria, by a Jong shot, and they may not suit your needs, but they're guidelines .
flexibility counts

· Price/performance

ls the system built around an emulating controller? It can

· Production capacity

offer maximum flexibility in database storage systems. As

· Vendor source availability for components, especially heads
· Design approval, warranty, spares, brand recognition
· Customer support · Capability and committment for future development

storage needs grow , you then add on drives. Add one controller and a single SBI interface (emulator) to the VAX- LL / 780 , for example , and link up to , say , eight 675-megabyte drives in a daisychain configuration , as one DEC-compatible maker puts it, thus providing up to 4 ,800 megabytes of on-line storage . This avoids software or hardware changes to the present system. As you configure the system , select from

different disk dri.ves . Different firms select different drives,

Figure 2: Selecting DEC-COmpatible products will involve a number of criteria, shown above, that fall into the design or business category.

which will vary, because of their in-house reliability . The systems expand flexibility options with configurations. Besides daisychaining drives , you configure them radially. Or, if you need more than one CPU to share the same

(continued from page 55)

database , you use the controller's multiple CPU option to

shooting is enhanced via an on-line/off-line switch to allow increase throughput by interfacing several DEC CPUs -

you to easily remove the card from the system without say , VAX 11/780's, PDP-l 1/34's or PDP-l l/70 's - in any

physically extracting it from the memory backplane. Where combination.

battery backup is employed, memory retains data while online or off-line. (4) More makers now give you a good

reliability improves security

warranty deal, unlike the past fly-by-night boards made from Maximize security and integrity of the database by using

questionable parts. Sometimes they worked; if not, too bad. multiple CPU and dual-channel drives in environments

Service was a bear. Times have changed; DEC compatibility where downtime is intolerable.

has gained respectability. (5) Check MTBFs, MTTRs and

As an example, one manufacturer uses a configuration that

(

how the data was obtained. If all components are precondi- transforms a single-CPU/controller system to a dual , redun-

tioned to A+ status, and if, say, over 98% of all boards are dant configuration consisting of two controllers and up to

entirely free from defects, consider yourself lucky . Few four drives. Two, three or four CPUs can interface with the

approach this reliability. (6) Consider low installation cost. Lower installation cost means it's easy to install and easier to

two controllers, all sharing a common database. The quadruple connections and complete redundancies assure con-

maintain. (7) Is it backed by a big semi or other giant? If it's tinuous on-line operation, increased throughput, and maxi-

an industry leader in the design and testing of systems, fine; mum system performance, without changing applications

but sometimes you'll pay extra for this.

software or degrading response time.

To illustrate the above points, let's use the following

Other cases can be investigated, but specifying reliability

cases.

boils down to a few selection criteria.

disk storage for large minis
A " Compat" maker's disk storage can bring out the best in

What about overall dependability of system hardware? ls the system field-proven in thousands of installations? Do they span a broad range of applications? And do one or more

·-

your DEC minicomputers, whether they be VAX-11/780, resemble your own? Are these systems ones that have ren-

PDP-11/70 or any of the Unibus machines. When your dered years of reliable trouble-free service to hundreds of

system can't afford downtime - for example, during elec- customers? Caveat emptor. Investigate.

tronic funds transfer - it can secure database on-line, expand performance and allow for myriad configuration op-

is system support a mirage

tions necessary in such time-critical applications as printing,

Do they back up the system's reliability with reliable service

graphics, and transaction processing. It can substantially and support during factory system integration, at time of

increase storage capacity with superior price/performance , installation and afterwards on an ongoing contract basis

while reliability insures a low ownership cost. The basic tailored to your needs? Go to the plant for an on-site visit.

emulation capability would let you configure it as an RPOX Talk to their service people. Are they specially trained,

or RMOX disk system; you free yourself from the CPU topnotch engineers and managers? Or front men who merely

manufacturer's system constraints, and achieve 100% soft- hold your hand until a competent tech is available? Do they

ware transparency with existing disk drives.

work out of a worldwide network of service centers offering

Manufacturers' system features include the following , or total repair capability and fast turnaround?

are features you should look for: (1) Field-proven reliability,

Continuing requirements of maintaining data storage sys-

serviced with many installations, spanning years of field tems count. Is there fast , effective service? If you're located

experience. Beware of novices. (2) Individually-tailored service plans insuring low cost of ownership. (3) Provides

within a 50-mile radius of a large metropolitan area, do you get a 4-hour response service? Is it 24 hours a day , 7 days/

58 DigitalDesign JULY198 1

If Thomas Edison
had used a Monochip~ think ho-w far he could have gone...
If Thomas Edison had used a Monochip!" his electric pen might have been a color copy machine. His lightbulb might have been a laser. And his phonograph might have been a stereo system. Why? Because with Monochip, IC turnaround time could have kept pace with the speed of his imagination and the limitations of his budget.
Monochip is the semi-custom IC. That means its circuit components-the first five layers - are already in place when you start designing. All you do is tell us how to connect them to make the circuit your application requires. Working from your layout, we etch the sixth layer and deliver prototypes in only 6 to 8 weeks for $6,000 or less. Once you've approved them, we'll make production runs of 1,000 to 600,000 parts. It's that easy. Monochip Design Kits are only $26 to $69 each, and include everything needed to develop your own custom linear, CMOS, NMOS, CML or bipolar IC.
There's no telling what Edison might have designed if he could have used a Monochip. Now, just imagine how far you can go. Call or write for more information. Interdesign, 1265 Reamwood Avenue, Sunnyvale, CA 94086. (408) 734-8666.
Interdesign is a Ferranti Company.
Circle 7 on Reader Inquiry Card

week? Or do you need a faster, on-site contract? This is solid state memory can feature a built-in controller which

appropriate where several systems are centrally located. attaches to the Unibus on, say, DEC's PDP-11 series. Let's

How many service plans, which can be customized to meet look at one example. The memory would respond through

your specific needs, do exist? Or is response time less crit- the controller in the same manner as RJS03 and RJS04

ical? Then, an 8- , 12-, 16- and 24-hour service "window" fixed-head disks . It should be faster and more reliable than

(on a normal workday basis) is better.

disk storage (otherwise, why specify it?). As for modular

flexibility , the memory storage is packaged in pluggable

peripheral controller

modulesof524Kbytes(262 , 144wordsby 18bits). Each 19"

To waste chassis space on peripheral controllers that only interface a single device type to UNIBUS is a one-to-one

chassis accepts up to eight modules. The chassis would accept a pluggable controller unit and a

approach, driving Unibus system costs up and reliability pluggable power supply module. Modules would be inter-

down . A hex-wide peripheral controller that simultaneously connected by means of a printed wire backplane; a rack-

handles several RM02/RM03 80 MB disk drives, several mount chassis would offer built-in forced-air cooling, thus

TU IO'h'' tape drives and 8-MB of semiconductor disk from making it self-contained.

just a single slot offers big plusses.

As for chassis storage expansion, a second chassis. con-

Such a one-board approach , which will grow in popular- taining eight storage modules, could be interconnected so

ity, enables one board to do the work of three or more-with no degradation - thus saving in other ways. Immediate

that 8 .388 megabytes are available through one controller. Parity would be generated and checked for all data transfers;

savings come from elimination of two comparably-priced errors would be flagged. What about the pluggable feature of

controller boards. Down the line, upgrade flexibility permits storage modules? Field expansion is easier, obviously, since

expanding configuration less expensively: you don't (neces- maintenance is simplified by modular construction.

sarily) need to buy additional boards or larger chassis .

This storage system would offer total transparency to all

This cuts spares inventory costs in the factory . It increases operating software and diagnostics (because of a built-in

system reliability because of fewer ICs. 'such cost-benefits controller). Each unit would feature two Unibus port inter-

mean rebalancing system operational costs, bringing price of faces: the first , for control and data; the second, for data only,

1/0 processing back in line costs of instruction processing with data transmission switched between ports under

and memory. fixed-head disk replacement

program control.

Are hardware or software changes required in the com-

puter system to utilize the performance and reliability which

You will look for maximum throughput, reliability and the product offers? If so, investigate. If users may incorpo-

transparency when examining alternatives or replacements rate software patches for even greater performance, it's a

for fixed-head disks used with DEC computers. A reliable, decided plus .

60 Digital Design JULY 1981

Circle 37 on Reader Inquiry Card

With LSI 11/PDP 11 Software

when you plug a DILOG con-

Compatible DiscfTape Con-

troller into your DEC CPU it's

trollers Offering Single

ready-to-run because it's fully

Board Low Power µP Based

operating system software

Design and Low Cost ...

compatible.

Plus Many Other Good Reasons!

These high performance

The reasons start with DI LOG'S (Distributed Logic

data storage interface products also feature· minimum

Carp's.) full time engineering and design staff. Not

bus/space requirements· up to 60% less power· 10 to

outside suppliers. That means when you contact DILOG

50% lower cost · automatic self-test ... and numerous

for product selection or after sale service, you'll get "first

other features for easy system integration.

hand'' assistance ... along with years of experience

Consult the DI LOG/disc-tape compatibility table for

manufacturing "'P based controllers that interface with

your needs. Then ask for detailed data on existing, or

DEC11 CPUs.

The intelligent products you'll discuss all utilize

future products from DILOG ... #1 in single board DEC 11 compatible disc/tape controllers.

common proprietary architecture and DILOG automated

Distributed Logic Corp., 12800-G Garden Grove Blvd.,

design techniques-products with exceptional reliability

Garden Grove, CA 92643, Phone: (714) 534-8950 ·

and cost efficiency ... mostly available from stock. And

TELEX: 681 399 DILOG GGVE

;.,

DISC/TAPE DRIVE MANUFACTURER COMPATIBILITY CHART

MAGNETIC TAPE

DISC

1h" REEL·TO·REEL STD. Ii STREAMER

231515440/RK05 CARTRIDGE CLASS

CMD CARTRIDGE MODULE

SMDSTORAGE WINCHESTER

MODULE

51/· ",a· OR 14"

1/·"TAPE

FLOPPY

CARTRIDGE DISC DRIVE

AMPEX CIPHER CONTROL DATA DIGl-DATA KENNEDY MICRODATA PERTEC TANDBERG DATA(IDD WANGCO TDX

AMPEX
CAELUS CENTURY DATA CONTROL DATA
DEC DIABLO IOMEC MICRODATA PERT EC WANGCO WESTERN DYNEX ORI

AMPEX CONTROL DATA

AMPEX CENTURY DATA CONTROL DATA BALL COMPUTER MITSUBISHI

BASF CONTROL DATA FUJITSU KENNEDY MEMOREX PRIAM SHUGART SEAGATE QUANTUM IMI

DEi KENNEDY PE REX QUANTEX

BASF DECITEK MICROPOLIS PERTEC RE MEX SHUGART

CAPACITIES .25 TO 300 MB

DISTRIBUTED
~Bnmm111111111~1~1;

"Trademark Digital Equipment Corp.

Circle 38 on Reader Inquiry Card

Bit Slice Design

F inal bit-slice emulation provides important user benefits. The most basic is reduction in

by Hildon Gold and Robert Deisher

IC chip count that allows a card reduction from 24

For the past several years now . the µ.P has displaced functions formerly performed by hard-wired logic . The se new

to one. This size shrinkage uses less mainframe or designs are yielding circuit functions of lower cost, smaller

expansion chassis backplane space, less power size, lower power consumption, increased reliability and

and lowers system and operating costs. It inher- easier maintainability. Such was the case with our own

ently increases system reliability and lowers maintenance costs. The second major benefit is technological, allowing potentially higher data throughput than the original, improved OMA

design team. We were able to develop a single-board controller capable of interfacing multiple, 80-megabyte storage module drives with DEC PDP I ls .
An alternative to the RJM02 mass storage system , the Storm-02 Controller provides interfacing for four drives .

operation, increased data buffering, and ability to Each drive offers 80- to 300-megabyte unformatted storage

modify firmware executed by the µ.P to meet custom user needs. Interfacing up to four 80- to
300-MB disks to a standard Unibus backplane at
low cost, Storm-02 is software and disk media

for the PDP-11/04 through the PDP- 11/60 Computer Systems. The Storm-02 was designed to emulate DECs RJM02. including the RM-02 disk drive and RH-11 adapter. Unlike the DEC system that required up to 24 cards plus an expansion chassis to provide an interface for mass storage drives.

compatible with the RJM02 subsystem.

the new design accomplished the same functions on a single

board (Figure 2). What's more , when a Storm-02 and com-

panion mass storage modules are selected instead of the DEC

System, cost savings are considerable. For the first 80-

Hi/don Gold is Senior Hardware Engineer and Robert Deisher is International Marketing Manager (Europe and Mid East)for AED, 440 PotreroAve ., Sunnyvale, CA 94086 .

Host PDP-11
CPU

A
I
RH -11 Mass Bus
To Unibus Adaptor

I- - - -
Mass Bus Drive Data
Control Adaptor

J - - - -
B
I
SMD drive interface CDC 9762

LRM02

80 M. Bytes (67.42 M. Bytes formatted)

Figure 1: DEC implementation of the interface containing an RH-11 and RM02 interface to an 80 megabyte disk. Lines A, Band C show the major division points.
62 Digital Design JULY 198 1

Figure 2: Single-board controller interfaces multiple, 80-Mbytes storage module drives with DEC PDP-11 s. JULY 1981 Digital Design 63

megabytes (67 megabytes formatted), the cost of the con-

figured storage system is 35% below the cost of the equivalent DEC system. Savings upon expansion to three addi-

the original system
A DEC CPU interface to a single drive is illustrated in Figure

tional 80-megabyte drives, for a total of 269 megabytes 1. The System consists as shown, of an RH-11 Massbus-to-

formatted, is considerably more.

Unibus adapter and an RM-02 subsystem. The latter contains

Configured as a single Hex card, Storm-02 plugs directly the Massbus-to-SMD interface and the SMD drive interface

into a standard SPC slot and, in combination with the drive, (CDC 9762 unit) with the drive and media.

emulates DEC's RJM02 providing both software an'd media

RH-11 contains the OMS (Direct Memory Access) con-

compatibility. The new Controller fully emulates DEC's troller and the programmed input/output function. It also

RM02 disk system and is Unibus-compatible. It is also soft- provides the hardware interface between the CPU bus (Uni-

ware-transparent to PDP-11 operating systems. What's bus) and an intermediate bus known as the Massbus. Other

more, Storm-02 provides media interchangeability with the features include interrupt support, ability to perform a ' write

RM02 since disk pack formatting is the same.

check' of the data from the CPU memory and the peripheral ,

In designing Storm-02, we wanted to meet the capabilities elastic buffering of data for the OMA transfer and special

of high data-transfer-rate, mass-storage drives while avoid- control and status registers. The elastic buffer in the original

ing interference with other OMA hardware communications system allows for limited buffering up to 66 words (about one

activities on the Unibus. When a DEC-based mass storage quarter of a sector). This hardware is contained on a com-

system is employed, data throughput is limited. Disk drives plement of 6 to 7 Hex cards as illustrated in Figure 3a.

are limited to those with rotational speeds of 2400 rpm. In Normally the cards are housed in the CPU mainframe, or in a

such cases data transfer suffers since it is limited to a rate of separate expansion chassis.

800 kilobytes-per-second.

Each RM-02 requires a 6- to 8-card Massbus-to-SMD

However, Storm-02 is capable of handling data inter- interface adapter. As shown in Fig. 3a, a set of such cards is

change with drives running at 3600 rpm and, accordingly, a contained in each disk subsystem. The balance of the RM-02

transfer rate of 1.2 megabytes per second. In doing so, the subsystem contains the disk hardware, the power supply,

Controller allows utilization of mass storage drives having a drive and the media.

higher data transfer rate without adversely impacting other

The actual system configuration selected for hardware

Unibus OMA activity.

implementation is shown in Figure 4. Storm-02 supports up

Another benefit is the ability to modify system firmware to to four 300-megabyte SMD drives. It allows for storage

meet the needs of other applications. This benefit will be capacity of 80- to 300-megabytes by merely selecting or

obtained through a new product (soon to be released) allow- adding the drives and interconnection cables. This complete

ing for any mix of 80 megabyte or 300 megabyte drives from system configuration is contained in the single hex card

one to four, with a single card. Other varied and specialized (Figure 2). It replaces all cards (Figure 3a) ranging from 12

applications are possible by altering the card firmware.

to 24, depending on the number of SMDs employed .

Figure 3: The orignal DEC System requires 12 to 36 Cards (as shown in a) to support up to four SO-megabyte drives. AED's STORM-02 Controller supports the same number of drives with a single card as shown in (b).
64 Digital Design JULy 1981

achieving transparency
To accomplish user transparency, the Storm-02 card had to function as in the original system. It was necessary for the hardware to electrically interface the Unibus. Also, the firmware had to cause the card to respond identically to the software commands of the RH-11/RM02 subsystem . Furthermore, the media and its pack formatting had to be the same as the original. Only then cou ld the computer systems user proceed as if an RJM02 disk system were actually installed on the Unibus .
The software commands to which the card must respond include recognizing the positioning, data transfer, and housekeeping commands listed in Table I. The Controller also had to provide the twenty-two, 16-bit Command/Status registers, the OMA buffering and the generation of the CRC (Cyclic Redundant Code) and ECC characters that are added to the sector header and data records, respectively . There had to be provisions to verify the CRC and ECC during a read and to generate the ECC syndrome. Finally, additional hardware was necessry to handle the SMD interface for one to four

Table I: 16 Software commands that are recognized by the emulated card (identical to the RJM02 commands).

RH- 11

PDP-11

Unibus

Drive

Host

Controller

CPU

Massbus

Interface

Adaptor

Drive Control ler Interface

Drive Controller Interface
..

Figure 4: A DEC four drive configuration showing the Unibus interfaced to four disks. This configuration was selected by AED for

emulation on a single HEX card, the STORM 02.

66 Digital Design JULY 1981

a ac...

Ever thing forL 1-11 data ac uisition andcon ml.

· mVLevel AI DConversion · Temperature Measurements · High Level, High Speed AID Conversion · TTL Level Digital 1/0 · Discrete, High Voltage, AC/DC Interfaces · Pulse Counters And Pulse 'frains Out · Optically Isolated Discrete 1/0 · Contact Closure Sensing . · Discrete High Current Outputs · Programmable Clock · Serial Interfaces · PDP-11 Unibus To LSI-11 Bus 'franslator · Specially Designed Enclosures · Screw Termination Panels · Rack Mount System Cabinets · CPUs/Memories · Floppy/ Tape Peripherals · CRT Terminals
· · Real Time Operating Systems · FORTRAN, BASIC, Process Language
ADAC offers the widest selection of function cards and complete systems for LSI-11. Both analog and digital.
Call, write or circle the number below and we'll send you a complete packet of information, including ADAC's new Model Configuring Guide and Price List.

CORPORATION
70 Tower Office Park· Woburn, MA 01801 (617) 935-6668

..........
...\....'\..

Circle 40 on Reader Inquiry Card

JULY 1981 Digital Design 67

Microsequencer and
Bit-Slice ALU

"Daisy Chain" /Cable

Host Interface

16-Bit Parallel Data Paths

SMD

Read/ Write

Interface

Cables

Data Error Detect-

Data Path ing

Correct; Header

And Elastic

Error Detect

Storage

Read/Write Serial Paths

Figure 5: A system block diagram of the Bit-Slice emulation of the AED design.

drives. These consist of a commmon daisy-chained, paralleldrive control cable as well as the individual R/W cables. The R/W cables convey the serial read and write data along with the read, write and servo clocks and a few miscellaneous parallel control signals required for the interface.
If these criteria could be realized, the system would provide a product that is transparent to the user at both software and hardware levels.
Storm-02 emulates the interface between the DEC PDP-l l Unibus and the disk subsystem peripheral. All appropriate system software commands, test diagnostics and magnetic disk media are interchangeable with the original. The new design also allowed for a higher data transfer rate and optimizes the total system throughput from disk and other peripherals on the bus.
This optimization was accomplished by adding more buf, fering and additional intelligence to allow for temporary data storage within the controller card. Consequently, other peripherals can stop the long disk transfer process, then resume the data transfer when the other peripheral has completed its data transfer. All of this is accomplished in real time without loss of data that would ordinarily have occurred in the original DEC system.
the implementation
Identified in the block diagram in Figure 5 are five subsystems implemented in the single Storm-02 Hex board controller. This subsystem includes Host Interface to the Unibus: a Microsequencer and Bit Slice ALU operated as a sequential machine; SMD Drive Interface: Disk Data-Pathing and Elastic Storage ; and Data Error Detection and Correction Circuits .
The µP controls the operation of all blocks . It runs at a 200-ns microcycle rate enabling eight instructions to be executed with each 16-bit word that is transferred to or from the SMD. The µP memory is 2048 words deep, each word 56-bits wide. This memory is called the "Control Store ." The processor ALU is 16 bits wide (size of the standard data

word which it must process) . The Bit-Slice Elements chosen

for the system are the 2900 bipolar series that include the

2901 Bit Slice ALU and 2910 microprogram sequencer chip.

The µP operates in classical '"pipeline" fashion. That is,

the control word for the next operation is brought out of

memory while the function fetched from the last operation is

acted upon by the µP . In addition, the very wide word

enables sequencer, ALU, and Source and Destination

Addresses to be acted upon in parallel. This results in an
... unusually high controller throughput speed compared to a

conventional 8- or 16-Bit machine which is otherwise

impeded by vertical architecture and sequential operations.

This 56-bit word is shown in Figure 6. The l l-bit address

enters the control store from the 2910 sequencer. The several

fields of the word are the microsequencer instruction field

(I 0 bits), the ALU instruction field ( 18 bits), the immediate

data field ( 16 bits) and the miscellaneous control field ( 12

bits) . During each micro-instruction cycle, the entire word is

available for use in the control sequences and as commands

that are sent to each of the other five blocks. The actual

functions performed by the µP are command sequencing

(execution), decision-making and bookkeeping . These res-

ponsibilities can be summarized as follows : software com-

mand interpretation, sequencing SMD ' s (select drive , posi-

tion heads, etc.), comparison of disk sector with the desired

one, switching and routing of data in the data pathing block ,

data comparison for write verify, overall system timing,

communications of status to host Interface, and error

handling and recovery .

the interfaces
The Host Interface (Figure S) provides communications between Host CPU and Disk Controller and also implements Unibus Protocol. It contains the 22 Command/Status registers. The Host PDP- l l has full priority over these registers. The Host Interface provides the user programmable 1/0 addressing, interrupt priority and interrupt vector as provided

68 Digital Design JULY 1981

STATE-OF-THE-ART INFORMATION

Each Proceedings offers original technical papers by testing technology experts involved in manage-

ment, manufacture and application of automated testing for electronics manufacturing. Plus. the

Proceedings from January 1978, June 1979, January 1980 and June 1980 include testing article

reprints from either Circuits Manufacturing or Electronics Test magazines. The January 1980

Proceedings also includes technical papers from the Test Instruments Conference.

oBurn-in

oLSI Testing

.. oHardware
oEconomics of ATE

oSoftware for ATE oBare Board Testing

olnnovative Techniques

oATE Management

oln-circuit vs. Edge Card ATE

oAnalog and Digital ATE

"'I

VOLUMES PRICE/VOLUME

January 1978 June 1978 June 1979 January 1980 June 1980 January 1981 June 1981
* Special discount

$15* $15* $15* $15* $15* $35* $55

Payment or purchase order must accompany order. Please add $2.50/volume for postage and handling (domestic book rate) .

Add $5.50/volume for air mail orders to Mexico and Canada, and $15.00/volume for air mail orders to all other countries.

Mass. residents add 5% sales tax. Make checks payable (in US dollars only) to ATE Proceedings.

To place an order or to request more information, return the coupon below to ATE Proceedings, c/o Benwill Publishing Corp., 1050 Commonwealth Avenue, Boston, MA 02215, USA. (617) 232-5470.
- - - - - - - - - - - ·A~~ aJ!l4©<t~~l])a~©~ - - - - - - - - - -DD- · 7/81

Name _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Title _ _ _ _ _ _ _ _ _ _ _ _ _ __

Company

Phone - -- - - - - - - - - - - - -

Address _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __

City _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ State _ _ _ _ _ _ _ _ _ Z i p - - - - - - - - - - -

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0 January 1981 0June1981

JULY 1981 Dlgltal Design 69

1 l

Next Instruction Address

Status Bus
Status Select and Micro Sequencer Instruction
Micro Sequencer Instruction
Field
L
I 1'

2910

I 7

Micro

Sequencer

A, '

I I

ALU Instruction

Field

I
I
I I

Immediate Data Field

I I I
I

56 Bits Wide

--L '/

2901 16BitALU
Array

v
/

Misc. Control
Field

2048 Word Microprogram "Control Store" Memory & "Pipeline"

I
1

J
~~

Data Bus,
Source _,,, and

~
Destinatio n

Codes

Select

External

Status

1 v
~

,I .
·
~

Figure 6: The 56 Bit word used for the State Sequential Bit-Slice Machine and how it ties Into the system. The firmware contains up to 2048 such words that are executed in pipeline fashion.

EYECOM II the IMAGE PROCESSING PERIPHERAL

Add this image processing peripheral to your present PDP-11* or LSl-11* to measure variations in image brightness, separate image features, enhance edges and contrast, measure areas of interest, do real time image integration, and real time image differencing.
A basic software package is provided to apply the . EyeCom System to your particular problem.
FEATURES: · Real Time Digitizing, 640x480x8-blts ·Add, Subtract and Convolution of Images
at video frame rates ·Joystick Cursor, 640x480 Resolution ·Graphic & Alphanumeric Overlay ·Color & Gray Scale Mapping Tables · Termlnal or Rack Mount Configuration
Call or write for complete information:

EyeCom II Picture Digitizer & Display System

·Trademarks of Digital Equipment Corporation The Image Processing Company

70 Digital Design Ju LY 1981

Circle 42 on Reader Inquiry Card

In
Data Flow
Out

Unibus R Port
Registers

Control

e.c..
8
Bus Control State Sequent ia I
Machine

Status

768-word RAM
"Firmware" Controlled
FIFO
Microprocessor Controlling Element

Serializer/ Deserial-
izer and 16 Word FIFO Buffer

/l>c

Figure 7: The "elastic" data buffering in the system. This buffering accommodates the asynchronism between the disk and the UnibusR.

in the original DEC system. It also arbitrates OMA requests on the BUS , servicing the interrupts and generates the Unibus protocol.
Like the main µ,P the HOST Interface consists of a state sequential machine built around 4-bit binary counters with a 16-bit control word and a 100-ns cycle time. There are 256 words in its separate control memory and its operation is " pipelined" as with the main µ,P instruction bus .
The SMD Drive Interface communicates with the standard

Storage Module Drives. These drives are equipped with NRZ-to-MFM and NRZ-data protocol conversion . Although the original system supported a disk drive with a 2400 RPM spindle speed, our design supports spindle speeds up to 3600 RPM . This permits data transfer rates of up to l .212 MB/sec when necessary (16 bits per l .648 ms) . All parallel and serial data passes through this block via the SMD individual read/ write cables . This block also contains I/0 latches and differential line receivers and transmitter implemented in

IEEE 488 ~ DEC
On the highway, speed limits are necessary. But in the world of data processing, faster is better.
That's why National Ins trumen ts will introduce the GPI B l IV-2 Q -Bus Interface to link with IEEE stan d ard 488 instrumentation bus. Since it uses DMA the speed far exceeds o ur e xisting high perform a nce non -DMA GPIBIIV-1.

Software greases the wheels.

N·mioNAL Soft w are support? NI has u tili ty and

you wan t to be- in a hurry.

driver program s available as MA CRO ~r. so urce fi les You can assemble th em as

ft A

~~~~~~N . BA S IC, or MA CRO sub-

INSTRUMENTS

NI a lso mak es tw o vers10ns of IEEE 488 interfaces for the PDP-11 For the kind

~ )l

Th e fa ster th e b etter National In strum e nts

of trans fernng horsepower we offer. you'd expect a high -octane price . But

8900 Shoal Creek Blvd Austi n , TX 78758

we think you'll be p leasan tly surprised.

512 1454-3526 or 1-800 153 1- 5066

Circle 43 on Reader Inquiry Card

JULY 1981 Digital Design 71

Data-MATE

,"Made for Each Other"

< \
I.·,

The DECwriter IV LA 34/38 Printers and
The Data-MATE®

#10189 Printer Stand

If you have a DECwriter IV,

LA34 or LA38 Printer - or are

contemplating buying one -

you need a Data-MATE®

#10189 Printer Stand. They

were " made for each other" .

Consider these benefits:

· Better operator comfort and efficiency. · Delivered assembled, ready for use - no wasted assembly time. · Storage space for 15" paper supply carton - does not
obstruct leg room. · Bolts directly to stand for maximum stability and theft security. · Options to assist operator - copy holder, rear paper catcher basket,
and side work holder baskets. · Welded steel construction, black texture paint finish, attractive wood
grain pedestal insert.
· 26" HX20"WX 18"0.

Data-MATE #10189 Printer Stands for the DECwriter IV LA34 or LA38 Printers are competitively priced and available from stock for immediate delivery.
Call or write for detailed infonnation.
CAU. TOU. FREE 800-258-1768
lft Data-MATE® a product of THE MAINE MANUFACTURING COMPANY P.O. Box 408, 46 Bridge Street Nashua, New Hampshire 03061

Circle 45 on Reader Inquiry Card

------· l

__.._ --. Order A full range of

~ ·V

LSl-11andPDP-11

systems and add-ons are available direct from Compumart,

when you need them. We stock all the best hardware and

software available from DEC and other solid manufacturers,

from floppies to 300Mb systems, single user to time sharing

R e a d y To GO. software. Call or write for our DEC systems catalog.
Can't wait? . . . call today.

617-491-2700I 800-343-5504
Telex 921401

(~'-~,dCOMPUMART

Cambridge Digital Division 65 Bent Street Box 568 Dept. 7400 Cambridge, MA 02139

Circle 46 on Reader Inquiry Card
72 Digital Design JULY 1981

SS I/ MS I.
The Data Pathing and Elastic Storage (Figure 5) contains circuitry that performs appropriate serial-to-parallel and parallel-to-serial conversion during data transfer to and from the SMD interface. It also provides 768 words (3 sectors) of data buffering between controller and disk. This allows the temporary storage required for the asynchronism that exists between the Host CPU's memory , other peripherals, and the SMD . The Serializer and Deserializer with a 16-word hardware FIFO are all implemented in LSI. The 768-word buffer is a firmware-controlled data FIFO using RAM array organized as 1K x 16 bits.
Figure 7 illustrates the "elastic" buffering of data to and from the disk . Data transfers bidirectionally through the Serializer/Deserializer FIFO, entering and leaving the 768 ( 1K) work RAM that operates under the control of the µ.P. At the appropriate time for the Unibus, it is strobed on or read from the Unibus through the port registers. The actual sequence is an effective asynchronous "bucket brigade" of data from disk to 16-word FIFO , to the RAM buffer, to the Bit-sequencer, and finally to the Unibus port on a read. The reverse data flow occurs on a· disk write. This approach allows the µ.P to accommodate asynchronism within the system.
The Data and Header Error Detection and Data Correction Block (Figure 5) contains the circuitry to provide these functions. It has two basic sections. The first contains the Header CRC generation and checking function s and is implemented with a single LSI device. The second performs the ECC generation and checking and is implemented with MSI logic elements.

self-test capability

It was possible to add automatic and continuous built-in-test

to a large portion of the circuitry in the emulator card . The

emulated system supports all pertinent DEC test diagnostics

as well as performing those of its own . A thorough self-test is

performed just after power-up with some continuous self-

testing being performed in normal card operation. The results are displayed by on-board LEDs. This can dramatically

decrease system down time to locate a failed card . Thus, it

enhances the already decreased troubleshooting require-

ments provided by the reduction in system cards from 12 or

more to just one .

Once a failed card is returned for field repair, the bad

component still must be located. This is not easily accom-

pli shed with end-to-end tests. By altering the µ.P 's "Control

Store·· in the form of its firmware, special tests can be

generated that thoroughly test the system and locate failed

parts . The first approach was to generate a special set of

Control Store firmware to work in conjunction with the host

CPU. This ROM set is placed into the system in place of

normal firmware .

During the design phase, it was recognized that a more

powerful approach to testing would be of significant ad-

vantage in the system. In this case, the ability to replace the

µ.P Control Firmware with an external RAM was added to the

system. Now, the normal firmware would be replaced by

these RAM-stored microcode diagnostic sequences that are loaded from the outboard CPU's o~n mass storage medium

(floppy , cartridge, magnetic tape, etc.) . This approach was

called ··writable Control Store ... With such a special

fixture, far more complex testing can be done on a failed card

to locate problem components. This feature is valuable to

volume OEM houses that choose to purchase such a system

to establi sh their own field repair depot.

[!)

SIGGRAPH '81 Blends Art With Science
dallas hosts eighth annual conference

Following the computer industry's rapid growth, SIGGRAPH '81 will have ten times the attendance that SIGGRAPH '74 had. And
with reports painting a bright picture for computer graphics in the
future, SIGGRAPH members are confident the growth trend will continue.

By Bob Hirshon

Computer match-making may not be the most highly regarded use of advanced digital electronics. But some of the resulting couples, as well as their progeny, have gone on to attai n considerable note. The SIGGRAPH conference, held this year in Dallas, celebrates one unlikely couple, sc ience and art, and especially their illustrious offspring, computer graphics. Representatives from both the scientific and artistic families will participate in the

celebration, featuring exhibits of stateof-the-art hardware , introductory graphics courses, and advanced tech nical sessions.
"The exhibits, which we started in the ·75 conference, went from five exhibitors, that were given space, to 124 this year, covering 40,000 square feet of exhibit space,.. says Tony Lucido, committee co-chairman. This year· s vendors will be demonstrating turnkey applications (CAD/CAM,

l:artography, image processing), OEM products, film and paper hard copy devices, interactive vector and raster displays, graphical input devices, software support packages and timesharing services.
Unlike most computer shows, SIGGRAPH"s primary aim is to educate, not sell. In fact, the original show consisted only of seminars there were no vendors at all. Today, even with exhibitors playing a large role in SIGGRAPH , education is the show's first responsibility . "We ' re predominantly an educational and technical group - not to the exclusion of the practitioner, but really in support of the practitioner, .. says Lucido. "We don't have any intentions to discard that - we intend to make sure it remains strong.
"Some of the vendors in the past, ..
... . adds Doug Green , SIGGRAPH 's other
co-chairman , " have made the statement that they'd sure like to get as many potential paying customers as possible - but, on the other hand , we have to look to the future of the enterprise also , and make sure that the students of today are the buyers of five years from now. ··
During the first two days of the con-

.
This computer-generated art represents just a few of computer graphics' many applications. Top, left to right : Virus protein coat, Nelson Max, Lawrence .Livermore ~ational Lab; Fractal curves, Loren C. Carpenter, Boeing; 3-D bar chart, P. Preuss and A. Vinberg, ISSCO. B~ttom, left t~ right: Atlantic Ocean Bathymetry, Larry McCleary, Naval Ocean System Center, San Diego; Steel cylinder bending over rail, Bruce Enc Brown, Lawrence Livermore National Lab; Mathematical function summation, M. Prueitt. 74 Digital Design JULY 1981

ference, there will be 18 one- and two- roof this year; as a result, once people more affordable to a larger number of

day tutorials and seminars. Tutorials get to the convention center, they won't folks. Three or four years ago, the

are introductory courses in such topics have to go out into the heat. ..

number of attendees who actually

as ··How to Design User-Computer

SIGGRAPH committee members owned systems was fairly modest,

Interfaces .. and .. Introduction to Raster expect about 8000 people to brave the because of the high cost. The cost fac-

Graphics.·· Seminars will be somewhat Dallas summer and attend the con- tor is the driving factor behind the

more in-depth, and will include sub- ference this year. That's up about 20% tremendous growth we've had . "

jects such as .. Introduction to Com- from last year. What's behind this rapid

This rapid growth has brought it's

puter-Aided Design .. and ··Graphical growth? ..Graphics is one of those share of problems, says Lucido, but

CAD Systems for YSLI ...

things that has previously been very nothing the committee can't handle.

Thirty-five technical programs will expensive, .. explains Green, ··but with .. It's grown fast enough so there have

be presented during the final three the cost of memory ·and the cost of been growth pains,·· Lucido sums up,

show-days. Each will last from one to computer display systems coming ··but I think it's all been for the benefit

two hours and most will be presented down so rapidly, it's bec;oming much of graphics . ..

i:.>

sequentially, allowing attendees to

participate in most of the 35 . Eight

topic areas in computer graphics will be

covered: Theory and Algorithms,

Graphics Hardware. Interaction Tech-

niques, Graphics Software and Lan-

guages , CAD/CAM, Applications,

Animation, and Raster Graphics. ··we

received in the neighborhood of 150

papers this year, .. says Green . ··They

were reviewed by a team of reviewers

and then the senior reviewers got to-

gether and the 35 best were chosen to

actually be presented at the meeting ...

Traditionally, evening film and

videotape extravaganzas highlight

SIGGRAPH. and this year will be no

exception. Great pains have been taken

to provide the best audiovisual equip-

ment in ideal projection environments.

Master of Ceremonies for the first of

three evening shows will be Tony

Lucido. of Jntercomp Resource Devel-

opment and Engineering, presenting an

introduction to computer graphics.

On the following night, Pat Cole, of

Lucasfilm, will deliver a show devoted

to science and technology ... Material

.,.....

wi II be picked for how interesting the content is, for variety of techniques

using computer graphics, for variety of

sciences represented and for aesthetic

appeal , .. explains Cole. ..The film shows are just purely visual treats,·· she

adds ...The content will be such that

people will be able to learn something Bright, .bold bar graphs by Burroughs. Easy to read up close or from across the

from it, but it's there mainly for the

room. Analog displays with digital accuracy; t/2%, 1% and 3 degree increment

people to go and enjoy visually ...

models available. Being bought by the thousands for applications from process

Thursday night is art and entertainment night, presented by Tom Defanti, of the University of Illinois. As an added feature. the A/V equipment in the theater will be available during lunch hours for attendees· informal showings .
Because of the climatic conditions of Dallas in August, SIGGRAPH plan-

control to automotive to instrumentation. Ready now for fast delivery. Get the full story. Call or write for the name of your nearest
representative. Burroughs OEM Marketing, Burroughs Place, Detroit, MI
48232. (313) 972-8031. East Coast: {201) 757-5000. Central U.S.: {612) 932-3800. West Coast: (714) 835-7335. In Europe, Langwood House, High Street, Rickmansworth, Hertfordshire, England. Telephone Rickmansworth (09237) 70545.

ners put much effort into insuring that

attendees keep their cool. ··we·re putting on extra busses, and making sure

Burroughs

they're all air-conditioned.·· says

Green . .. And everything is under one

Circle 48 on Reader Inquiry Card

JULY 1981 Digital Design 75

Don't connect remote
terminals to your
Unibus*-based computer

UNTIL YOU'VE READ ABOUT DCA'S SYSTEM 205 UNIBUS-INTERFACE STATISTICAL MULTIPLEXOR.

A DZ11 emulator and stat mux in one.
That's what DCA's System 205 gives you. In fact, a single DCA 205 acts as a host-end multiplexor for PDP-11, VAX or 2020 computers while eliminating up to 16 DZ11 modules!
Supports up to 128 remote terminals.
With a 205 and another DCA statistical multiplexor at the remote end, you can support up to 128 remote asynchronous terminals. Any DZ 11's already in use for remote-site service can be transferred to local service.

DEC
HOST

An easily-affordable point-to-point
datacomm network.

the lowest cost communications possible from Unibus-based DEC computers.

20? Reliable, proven performance.

Like our other s~atistica_I multiplexors, the

is a

field-proven, reliable system. In 1974, DCA intro-

duced statistical multiplexing - we've been the

technological leader ever since!

Unparalleled growth potential.
For networks that are bound to grow, DCA is the clear-cut choice. Because complete system compatibility lets you start with a 205 today, and grow into a larger, more powerful network tomorrow. And DCA users enjoy the lowest-cost network growth in the industry!

Requires just a single Unibus slot.
That's right, the 205 only uses one Unibus hex slot,
freeing up from three to fifteen additional slots. Costly and unsightly cables are eliminated, too.

Superb response time.
The 205 is, in effect, a DZ11 and statistical multiplexor in one integrated unit. So the character delay that normally occurs between a DZ11 and a multiplexor is eliminated. Result: Your terminal users will
enjoy a crisper echo.

Statistical multiplexing.
Our 205 gives you all the benefits of DCA's statistical multiplexing, including full ARQ error control that maintains data integrity, network transparency, reduced CPU overhead - and more.

Multipoint multiplexing.
This isn't a promise, it's a fact: DCA's customers have been multidropping several remote terminal locations to a single telephone line since 1979. And multipoint multiplexing with the 205 lets you enjoy

DEC
HOST

Multipoint multiplexing lowers costs dramatically.

Digital Communications Associates, Inc.
303 Research Drive, Suite 225 Norcross, GA 30092

HOST CPU

DEC
HOST

Any terminal user can access any host in the network.

Excellent cost efficiency.

There is no better value for DEC users - the 205 will

dramatically reduce your datacomm costs while

providing high throughput and reliable operation.

Interested? Send in the coupon or call DCA at

404/448-1400 today.

r - - - - - - - - - - - - - - - - 1 I 0 Send me more information on DCA's System 205.

I 0 Please have a sales representative call.

'~~

I Tille

I Company II Address

I I I

I City

State

Zip

I Telephone

L _ _ _ (Nea) _ _ _ <Num~r) _ _ _(Ex~J

· Unibus, DEC, DZl 1, PDP·l 1, VAX and 2020 are trademarks of Digital Equipment Corp.

76 DlgltalDeslgn JULY1981

Circle 49 on Reader Inquiry Card

. · .
,..
. .

Cyclic Code Redundancy
"desi!Qlers' guide" I?_rotects data

N one of the methods described here will detect all possible errors that could occur in a data

transfer system. The effectiveness of a code is a

measure of how low the probability is that an error

could get through the code system undetected.

Cyclic Redundancy Code or GAG-based sys-

tems have different effectiveness factors depend-

ent on randomness of data transferred and on the

actual generator polynomial used. Storage

systems impose their own characteristics in

determining randomness of errors, and thus which

method of error detection to employ.

CRC-16 is most common in data communica-

tions and in disk applications because it is espe-

cially effective where errors are more likely to

occur in bursts. Where errors are more likely to be

single-bit, or two-bit errors, LAC may prove equal-

ly effective. Checksums are used to protect

assembler object code integrity in development

software, since it is virtually independent of the

storage media, and also since it is relatively easy

to generate and check.

. The four-bit CRC algorithm described offers a

good trade-off between execution speed and

.. memory usage for applications that include data

communications controllers mini-floppy disk con-

trollers, tape controllers and many more. The

approach outlined can be used to advantage in

any computer that facilitates table look-up.

By Rich Lee
T hi s article describes an effic ie nt and effecti ve means of accomp li shing the task of e rror detection using Cyclic Redundancy Codes, (CRC). T he principles desc ribed are generall y applicabl e .
CRC background
Codes are usually described in mathematics as closed sets of values that comprise all the a llowed number sequences in the code. In data communicatio ns, transmitted numbers are essenti a ll y random data patterns which are not re lated to any predete rmined code set. T he seq uence of data, then, is forced into comp li ance with the code set by adding to it at the tra nsmitte r. T hus, a string of orig inal data wo uld become the o ri g inal strin g concatenated with a string of ex tra numbt:-rs th at make the total string one of allowed code set values.
At the rece iver, incomi ng data is checked to see if it is o ne of the a ll owed code set values . T he ass umpti on is made that if an e rror occ urred in transm iss ion, like lihood of the result also be ing a valid set member is very low. If the rece ived data string is fo und to be of the all owed code set, it is ass umed that no errors have occurred and that the data is valid .
Several po ints have emecged from the above discuss ion . ( I) T here is a need to have a scheme of determining what prec ise ex tra string to appe nd to the origina l data stream , to make the concatenation of trans mitted data a valid memberof the code set. (2) There must be a consistent way of ex trac ting the ori g in al data from the code value at thJ! receive r, to de li ve r the actual data to the location where it is ultimately used . (3 ) For the code sche me to be effective, the set must contain allowed val ues suffic iently different from one another that ex pected errors will not be able to alter one allowed va lue such that it becomes a di ffe rent allowed value of the code set.
A system fo r coding anct detecting errors in common use in Data Commu nications and in systems usi ng seri al data storage dev ices is called C RC. The code set is made up of all strings o f bi nary data that are evenl y di visible by what is refe rred to as a ··ge nerator po lynomial" · - a spec iall y selected number that resu lts in a code set of values differe nt enough from one another to ac hieve a certain low probab il ity
Richard H . Lee is Strategic Marketing and Application Engineer fo r the Microcomponent Product Division , Mostek Corp . 1215 West Crosley Road. Carrollton. TX 75006

Ju LY 198 1 Digital Design 77

-"-"

Send SAC

d ...ddd

!<.-
rrd .. .ddd
-,

SELB

D ivide By P

Divide-By-P

remainder

Y t--
B

remainder

Data Store

All Zeros

...

Detector

Figure 1: Error detection system.

Feedback Polynomial POD P01 P02 P03 P04 P05 P06 P07 P08 P09 P10 P11 P12 P13 P14 P15

:r: ~F ~~ ~ ~ ~ ENFB~

,L.)::

I F I F I F I F I F IF

,L.~
+ F IF IF

,L ,L
+-F + F I F I F

~ DO I- DO1- 00 I- DO D O DO I- D 0 I- D 0 DO DO 1- 00 DO DO DO I- DO t- D 0 t--t'""L

4-2 ~z ~z ~z r=:-z ~z ~z ~z ~z ~ .!µ'. ~# ~z

41 .!µ'.

·r->-

..,. R eset
+5

INPUT ~ IF =

DO =

Shift R egi ster Cell Detail

_l _l

.__All Zeros

llf

CLK - - --i OFF A

Q l
z

SEL B
......, A

y 1-B

Output

' ....

Figure 2: Register implementation. 78 Digital Design JULY 1981

other to achieve a certain low proba-

.. bility of an undetected error. To determine what to append to the string of

original data, a division is made of the

original string as it is being transmitted.

When the last data is past, the remain-

der from the division is the required

string to add since the string including

the remainder will be evenly divisible

by the generator polynomial. Since the

generator polynomial is of a known

length. the remainder added to the original string is of a fixed length .

At the receiver, the incoming string

is divided by the generator polynomial,

and if the incoming string does not

divide evenly- that is if the remainder

after division is not zero - then an

error is assumed to have occurred . If

the remainder is zero. then the data is

assumed to be error free, and the data

delivered to the ultimate destination is

the incoming data with the fixed length

remainder field removed . F igu re 1

illustrates the stages of this coding

met hod.

In binary CRC schemes. the gener-

ator polynomial is designated as a sum

of terms of .. X" raised to the power of

the bit the term represents. For ex-

ample, the CRC-16 generator polyno-

mial is actually the binary number. I

1000 0000 0000 0 JO I. whi le it is

customary to represent it with the following expression: x 16 +x 15+x2+x0 .

FLAGGS: MSKCRC: CACU: CRCL: POLYU : POLYL: GPO:
CRCSHF:
CRC1 :

EQU EQU EQU EQU EQU EQU EQU

4 1 6 5 H'AO' H'01 ' 0

;FLAG REGISTER ;MASK FOR CRC FLAG POSITION ;UPPER CRC BYTE ;LOWER CRC BYTE ;POLYNOMIAL < 0-7> ;POLYNOMIAL < 8-15> ;TEMPORARY DATA STORAGE

CRC ONE-BIT SHIFT ALGORITHM DATA IN GPO

K,P

;SAVE RETURN ADDRESS

.NOT.MSKCRC ;RESET CRC FLAG

FLAGS

FLAGS.A

A,GPO

;PICK UP DATA

CRCL

;XOR WITH LOWER CRC BIT

;ONLY USE LOWEST BIT

CRC1

;BRANCH AROUND FLAG SET

IFO

LR 01 LR EQU

A, FLAGS MSKCRC FLAGS.A $

;SET CRC FLAG

A,CRCL

;SHIFT LOWER CRC BYTE

CRCL,A

LIS

;PROPAGATE UPPER BYTE LSB

TO LOWER BYTE MSB

CRCU

CRC2

;BRANCH IF THE BIT IS 0

shift register implementation

A,CRL

;ELSE SET CRCL MSB

H'SO

The division process is simpler in

CRCL,A

mod ulo-two arithmetic than it is in decimal arithmetic. Implementation of

C' RC2 :

LR SR

a divider for a 17-bit polynomial can be

done using a 16-bit shift register with

A,CRCU 1 CRCU ,A

;SHIFT UPPER BYTE

an exclusive-OR feedback gate for each term of the polynomial. except the most significant bit. (bit 16). The exclusiveOR gate that corresponds to bit 16 of

MSKCRC

;TEST CRC FLAG FOR XOR OF

POLY

FLAGS

CRC3

;BRANCH IF FLAG NOT SET

· the polynomial is the one with one input connected to the rightmost shift register bit and the other input connected to the

POLYL

;XOR LOWER PART

CRCU

CRCU ,A

incoming data stream. Input. The out-

CRC3:

put of this gate is used to tum the

;RETURN POINT

feedback on and off to the rest of the

shift register. Figure 2 shows the

classical shift register circuit used to perform the division for the case of the

Figure 3: CRC Shift Software Implementat io n

C RC-16 polynomial. To generate the the polynomial.

indicated ci rcu itry cou ld be eliminated.

remainder for transmission . the shift

The box in Figu re 2 labeled FEED- This examp le is inte nded to be general

serial data is shifted in at the point gate array. The output signals PXX CRC polynomial. simply by enabling

.. marked Input. When the end of the data refer to the X terms in the polynomial. the appropriate PXX outputs. The shift

is reached. the final contents of the shift CRC-16 would have the outputs. POO. register cells are shown in detail in the register are appended to the serial data P02 and P 15 enabled such that when the insert at the bottom of the figure . The

stream by lowering the feedback enable input went high. those outputs would inverter inside the detail is used when

input labelled ENFB. The stream thus go high but the other outputs would not testing the contents of the shift register

generated is a member of the CRC- 16 go high . In applications not requiring for zero at the end of the receive

code set. since it is evenly divisible by more than one polynomial. much of the operation.

JULY 1981 Digital Design 79

T he se lector in the lower right hand portion of Figure 2 is

CRCMI YelueMlrSMI Clock

used to se lect the data on the signal labelled INPUT to be forwarded to the OUTPUT line, while the shift register is

accum ulating the C RC. The shift register contents are se-

0000

lected at the same time as the feedback enable is removed

1010

0000

000 1

when it is desired to concatenate the CRC value to the data

0 1

1 0

111 1 011 1

0000 1000

0000 0000

000 1 0000

stream . The rightmost bit in the shift register is the first to be

1
0

1 1

1001 11 10

1100 1110

0000 0000

0001 0001

shifted o ut.

The shift register can also be implemented with a software

ll.

1101

0111

0000

000 1

algorithm. Assemb ly language is used to define the algo- ~

0110

1011

1000

0000

rithm (Figure 3). Like the hardware implementation , the

0
1

0 1

0011 1011

0101 1010

1100 1110

0000 000 1

software algorithm also accommodates any polynomial.

{

0 101

1101

0111

0000

By altering the value in the equation for POLYU and

0010

1110

1011

1000

POL YL, any CRC generator polynomial can be facilitated. It

0 0
1

0 0 1

0001 0000 1010

01 11 1011 010 1

0101 1010 1101

1100 1110 0110

is necessary to call the subroutine for each bit of data. As this

routine may take up to 11 1 µ,s to execute with a 4-MHz

1111

0010

1110

1010

clock, the software implementation is often only useful for

0 111

1001

0111

0101

slower data transmission rates. The calling program is re-

sponsible for initializing the values of CRCU and CRCL ,

ahlft........, ...,.from this point lacurrent

com.nta)

shifting each bit of data, and making the call to CRCSHF for each data bit. W hen the end of data is reached. the calling

program places the C RC bytes into the data stream, CRCL

first, followed by C RCU .

0011

1100

101 1

1010

The table of Figure 4 shows the values taken on by the

0001

1110

010 1

1101

shift register in the single bit shift approach in response to the

1
0

0 0

0000 0000

1111 0111

0010 1001

1110 0111

input stream in the left col umn. The feedback gating, gener-

1 1

0 0

0000 0000

00 11 0001

1100 1110

1011 010 1

ated by the exclusive-OR of input data with the rightmost bit of the register, is shown in the next column. Notice its value

0000

111 1

00 10

in the lower half. Each line of the table shows the register

0000

0111

1001

contents after the clocking takes place. These values are the

1
0

0 0

0000 0000

0011 0001

1100 1110

same whether the hardware or the software implementation is .;lo

0000

1111

used.

0000

011 1

0000

0011

classical implementations

1 1

0 0

0000 0000

0001 0000

The hardware implementation of the single shift logic is

0000

usually fast enough for most app lications. There are compo-

nents made with se lectab le polynomials integrated into a

single chip. The main drawbacks to hardware implementa-

ti on are inherent cost, and single-sourcing of most single chip

Figure 4: CRC shift table

hardware . The drawbacks to software emulation center

After First Shift

···-·-··- -· ·-·

F(O) F(O) .XOA

C(15) C(14) C(13)

C(12) C(11) C(10) C(09)

C(OB) C(07) C(06) C(OS)

F(O) .XOR.

C(04) C(03) C(02) C(01 )

After Second Shift

F(1) F(O) F(1).XOR. F(O) .XOR.
F(1) .XOR.

C(1 5) C( 14)
C (13) C(12) C(11) C(10)
C (09) C(08) C(07) C(06)
C(OS) C(04) C(03) C(02)

Figure 5: Four Bit CRC-16 Shift Table 80 Digital Design Ju LY 198 1

After Third Shift

F(2) F(1 ) F(O) .XOR. F(1 ). XOR. F(O).XOR.
F(2).XOR.

F(2) C(15)
C(14) C(13) C(12) C(11)
C(10) C(09) C(08) C(07)
C(06) C(OS) C(04) C(03)

After Fourth Shift

..i

F(3)

F(2)

F( 1). XOA.

F(3)

F(O) .XOA .

F(2)

F( 1).XOA. C(15)

F(O). XOR. C(14)

C (13) C (12)

...

C(11) C(10) C (09)

-
, "'

C (OB)

C (07) C (06)

F(3).XOR.

C(05) C (04)

T(3) T(2) T(1) T(O) E(15) E(14) E(13) E(12) E(11) E(10) E(09) E(08) E(07) E(08) E(05) E(CM) E(03) E(02) E(01) E(OO)

0000 0000000000000000

00011 1001100000000 0 1

1 0

0 0 11 0 00 10 100000 000 00

0 10 01 111000000000001

0 10 10 011110000000000

0 1100010100000000000

0 111 1 11001000000000 1

100 010 100000000000 01 100 10 110110000000000 10 1 00 1111000000 00000 10 1 1 10 110 1000 00 000 0 1 1 10 00 10 10000000000 00 1 10 1100111000000000 1 1 110 1000 1000000000 0 1 1 11 10 100010000000000

Figure 6: Four Bit CRC-16 Look-up Tabl.e

INPUT-7-4..~.. -----
, ,

XOR

ENF B

OE A

16 x 4

ROM A

4V
I
,.--
"J

'"-D

Ot--

4-B IT RE G

r-- >

CLK

~
OE A
16 x 4
ROM B
4V
~
~
] XOR
4-BIT REG r-- >

......
OE A
16 x 4
ROM C

OE A
16 x 4
ROM D

4V
~ , l J XOR

4V
~ ,
l ] XOR

....._o 01--
4-BIT REG
,---- >

..__ D

QI--

4-BIT REG

....-- >

Figure 7. Four-bit shift CRC hardware implementation.

Ju LY 198 1 Digital Design 8 1

:::e
I
la-:

g 0

ti:

:C
(/)

:::::> :::::> :::::> :::::> ::> 00000 WW WWW

05 0
~'(C!l)..
ou.z-
(.)~
a:<
(.)Q

v
II
a:(!)
(.)
a:
(.)
u. 0
~
a:
~
ti:
~ ·- ·-

:.:.:.eJ.a..:J..::.:J:?..a.J:

a: a: a:
...J (/) ...J

5 (.) (....)J

<
..i

<- v a(.:)

:::::> (.)
a:
~

ua::a::Cl)-....18::::ea::::::ea:: 0....1C/JXZC/Jct:...J...J...J...J

a: a: a:
...J (/) ...J

Figure 8: CRC 4-Bit Shift Software Implementation
around the large cost in time needed to execute the shift algorithm. The hardware implementation uses exclusive-OR gates and other simple components available for many years. The software implementation actually does a ··blind emulation·· of the hardware. Some micros. for example. manipulate data in a much more sophisticated way than doing simple cxclusive-ORs and shifting a bit at a time. There is actually very little gained by restricting the software CRC accumulation function to one bit at a time. A possible reason for restricting the treatment to one bit at a time might be to maintain very strict emulation of the hardware.
Looking back for a moment at the hardware shift implementation of Figure 2, a few key functions are evident. The least significant accumulated amount is exclusive-ORed with the incoming data to produce a gating function that activates the feedback paths. The result of the gating function from above activates a feedback pattern that depends strictly on the

generator polynomial. The activated legs to the shift register are exclusive-ORed with the previous stage of the shift register and accumulated.
The single featu re about the single bit implementation that makes it attractive also makes it deceptively simple. The exclusive-OR of two single bits can only result in either a ··one·· or a ··zero... Thus. the polynomial is either gated into the register or is not. This fact is not true of hex numbers. for example. Two hex numbers exclusive-ORed together can form any of 16 different values. Bytes exclusive-ORed fom1 a set of256 different values .
four-bit CRC method
In deriving a multi-bit method for CRC calculating. it should be sufficient to compare the new method with the old and show that the differences are in implementation only and do not alter the function. This is true. since shifting several bits

82 Digital Design JULY 19~ I

1~he many tables and algorithm offered here are an approach that can be used to advantage in any computer that facilitates the table look-up.

e~nex n x en~ a:

~~~~~~~~ ~~~~~~~~
wwwwwwww wwwwwwww
00000000 00000000
.. ..u.a<.D;

sequentially in the single-bit method produces the same CRC accumulation, whether or not there is an awareness of intermediate values.

theoretical discussion

This discussion derives the Boolean expression for the CRC

sh ift register conten ts following four clocks. The notation

employed used bit positions within parentheses. The table of

Figure 5 illustrates the four shifts in the case of the CRC- 16

polynomial. To make the table readable, the following sub-

stitutions are made. Let:

F(O) = C(O). XOR. 1(0)

F( 1) = C( 1). XOR. I( 1). XOR. F(OJ

F(2) = C(2). XOR. 1(2). XOR. F( I ) ) F(3J = C(3J, XOR, 1(3), XOR, F(2)

Where: (( i) = the value of CRC register bit i at the start: I( i)

= the value of input string bit i.

Examine the fourth column of values in the table. The following points emerge. Cells used to contai n C( 12 ) through C( 15 ) now contain a value determined by an operation on 1(0) through 1(3) and C(O) through C(3) . The lower three groups of four ce ll s contain values made up of the previous contents of cells four shifts upstream from them and of the function of C(0)-C(3) or 1(0)-1(3). The functions F(C, I) can be expanded to show that no terms other than C(0)-C(3) or 1(0)-1(3) occur, meaning that the function is entirely made up of those terms, and so it may be implemented w ith a single exc lusive-OR of 1(0)- 1( 3) with C(0)-C(3) followed by a table look-up.
Each group of four cells of the CRC register i~ entirely dependent on the four cells upstream and the feedback function. It can be seen that continuation of the shifting would not alter the conclusions drawn, as the original values of the register would propagate toward the rightmost position without losing their respective positions in sequence. The F terms would eventually take the places of the C terms . The property of the F function that makes it a detem1inistic result of the input and the rightmost shift register contents hinges on the number of bits and the number of shifts used. The number of shifts - whether one, two, four, eight, or everi 16 - must equal the number of bits of the register that go into calculating the function, F. This is in tuitively correct. since the number of shifts equals the number of input bits, which must be the same as the number of bits of the register in order to have a meaningful exclusive-OR.
Looking into what makes up the F functions, a basis for the table look-up scheme begins to appear. F(O) is the exclusiveOR of the terms 1(0) and C(O) . If l(i).XOR.C(i) is replaced by the term T(i), the following simplifications can be made: F(O) = T(O) F(l) = T(l).XOR.T(O) F(2) = T(2).XOR.T( l).XOR.T(O) F(3) = T(3).XOR.T(2).XOR.T(l).X0R.T(0)
F( l ).XOR.F(3) = T(3) .XOR.T(2)
F(0).XOR.F(2) = T(2). XOR. T(l)
The T functions are what result from exclusive-ORing the input with the rightmost CRC shi ft register contents. If a four bit wide exclusive-OR is taken, the bit-by-bit result can be expressed this way: C(3),C(2),C(IJ,C(0) . XOR. 1(3),1(2), I( I ),1(0) = T(3),T(2),T( I ),T(O).
A tabl e is then generated using T values as the index into the table. The contents of the table are the F functions that must be exclusive-ORed with CRC register contents (Figure 5). The table need only contain seven-bit entries. corresponding to the seven bits in Figure 5 that require other than a straight shift. Furthermore, the index made up of the vector T(3),T(2),T( IJ,T(O) defines the depth of the table to be 16 words. In order to preserve generality and accommodate all polynomials, the table should be 16 words by 16 bits. The bits of the CRC register that do not require modification would result in the table value be ing zero.
Figure 6 shows the table contents for the C RC - 16 polynomial. The individual bits were generated using exc lusiveORs over the index. as suggested by the simplified equations for the F terms from the preceeding paragraph.
The T va lues in the figure represent the index into the table. The E values are the entries, which are exclusiveORed with their respective bits in the CRC shift register as presented in Figure 5. The exclusive-OR is done after the shift.
practical implementation
The four-b it shift algorithm for CRC calcu lation can be implemented in hardware or in software. Figure 7 shows the

Ju LY 1981 Digital Design 83

..
T(3) T(2) T(1) T(O) E(15) E(14) E(13) E(12) E(11) E(10) E(09) E(08) E(07) E(06) E(OS) E(04) E(03) E(02) E(01) E(OO)

0 0 0 0 0 0

0 0 0 0 0 0 0 0

1 0

1 0 0 0

0 0 0

1 0

0 0

1 0

0 0 0

0 0

1 0 0

0 0 0

1 0

0 0 0

0 0

1 0

0 0

1 0

0 0 0

0 0

Q 0

1 0

11 0 0

0 0 0

1 0

0 0 0

0 0

Figure 9: Four Bit LRC-16 Look-Up Table

CRCU:

EQU

CRCL:

EQU

GPO:

EQU

;UPPER CRC BYTE ;LOWER CRC BYTE

;TEMPORARY DATA STORAGE

CRC EIGHT-BIT SHIFT ALGORITHM

DATA IN GPO CRC TABLE IS STORED LOWER BYTE BEFORE UPPER BYTE TO
MAKE THIS IMPLEMENTATION FASTER

·
..

CRC8BT:

K,P

;SAVE RETURN ADDRESS

.,...

DCI

T8CR16

;SET DATA COUNTER TO BASE

.,j

OF TABLE

A.GPO

;FORM INDEX INTO TABLE

CRCL

;XOR DATA AND LOW BYTE

OFCRC

MXOR

;UPPER HALF OFTABLE

IF MINUS

~·

;FORM INDEX TO 2-BYTE TABLE

MSHL

;2ND QUADRANT OFTABLE

IF MINUS

ADC
LR
XM LR LM LR PK

;ELSE 1ST QUADRANT OF TABLE

A,CRCU

;XOR UPPER CRC WITH LOWER

BYTE

CRCL,A

;' SHIFFTRROIMGHTTAB8 LE

;GET UPPER BYTE FROM TABLE

CRCU,A

;REPLACES UPPER CRC BYTE

;THIS LEG TAKES 33.5 CYCLES

Ji.

Tche four bit
CRC algorithm

M' SOR:

1 MSXL

;FORM INDEX TO 2-BYTE TABLE :FOURTH QUADRANT OFTABLE

.. 4

IF MINUS

described in this article offers a good trade off

ADC LI

H'40'

;ELSE THIRD QUADRANT ;OFFSET TO THIRD QUADRANT

.....
..

between execution speed and memory usage for applications that include
data communications

ADC

ADC SECTION REPEATED

THE

INTEREST'

SPEED

A,CRCU

;XOR UPPER CRC WITH LOWER

., ....

.BYTE FROM TABLE

CRCL,A

:SHIFT RIGHT 8

controllers, mini-floppy disk controllers,

;GET UPPER BYTE FROM

TABLE

CRCU ,A

;REPLACES UPPER CRC BYTE

tape controllers and manl'.: more.

;THIS LEG TAKES 41.5 CYCLES

Figure 10: CRC 8-Bit Shift Software Implementation

84 Digital Design JULY 1981

hardware implementation, while Figure 8 shows the software approach. The hardware implementation is shown mainly for reference and would not offer a great improvement in cost effectiveness over the single-bit shift approach.
The boxes in Figure 7 marked XOR are 7486's, or equivalent. The ROMs and 4-bit registers are best implemented with 32 x 8 PROMs and 8-bit D-flip-flops, such as 74288s and 74273s . For CRC-16, ROM A and ROM B contain the ponion of the table of Figure 6 designated E( 15) through E(08) , while ROM C and ROM D are programmed with E(07) through E(OO). Each shift of the clock accomplishes what four clock shifts did in the implementation in Figure 2.
This implementation talces eight ICs , not counting those required for testing for all zeros. An advantage gained by this approach is that readily available parts are used throughout , and cycling at a 5-MHz clock rate would yield an equivalent data rate of 20 Mbits/sec .
The software implementation is a straightforward emulation of the hardware implementation of Figure 7. The table is the same as that in Figure 6 for CRC-16 . A different generator polynomial would require a different table. but the rest of the routine would be the same.
The software implementation is listed in Figure 8. The routine, including the CRC-16 table, talces up 84 bytes of memory . CRC4BT is called once for each byte of data and executes in 150 µ.,sin a K3870 with a 4 MHz crystal. This is six times as fast as the single bit shift routine listed in Figure 3, which occupies 42 bytes of memory . The speed improvement realized using the four-bit method permits µ,Cs to play an even more important role in data communications applications, where data rates up to 9600 Baud can be readily protected with CRC.
Let's consider some of the variations and alternatives for data protection .
eight-bit shift algorithm
We covered the grouping of the basic CRC shift algorithm into four bits at a time . It is also poss ible to gain additional speed at the expense of memory usage by extending the approach to eight bits . The hardware would use two eight-bit exclusive-OR gates, two eight-bit registers. and a 256Xl6 ROM .
Figure 10 lists the software routine for implementing the eight bit approach. The 256X 16 table is built by first continuing the symbolic shift procedure , outlined in Figure S, until the eighth shift. This produces the following list after eighth shift.
F(7) F(6) F(5) . XOR.F(7) F(4).XOR . F(6)
F(3) .XOR .F(5) F(2) .XOR .F(4) F( l).XOR .F(3) F(O) .XOR .F(2)
F(l) . XOR.C(l5) F(O) .XOR .C( 14)
C( 13) C( 12)
C(l l) C(lO) C(09) F(7).XOR.C(08)

Then, as before , the next step is to build the generator expressions for the F functions in terms of the T functions as follows:
F(O) = T(O) where T(i) = l(i).XOR.C(i)
F(l) = T(l) .XOR .T(O) F(6) =
T(6).XOR .T(5) .XOR.T(4).XOR .T(3) .XOR.T(2).XOR . T(l).XOR.T(O)
F(7) = T(7) .XOR .T(6).XOR.T(5) .XOR .T(4).XOR.T(3) .XOR. T(2).XOR.T(l).XOR.T(0) and
F(5) .XOR .F(7) = T(7).XOR.T(6) F(4).XOR.F(6) = T(6) .XOR.T(5) F(3) .XOR.F(5) = T(5).XOR.T(4) F(2) .XOR.F(4) = T(4) .XOR.T(3) F(l) .XOR.F(3) = T(3).XOR .T(2)
F(O) .XOR.F(2) = T(2).XOR.T(l)

The table is generated by computing parity over the address, as indicated in the above expressions. letting each T term refer to the corresponding table address bit. (assuming the table base address to be zero). The C terms without coefficients in the list are assumed to have zero entries in the table , and so the corresponding column in the table would be filled with zeros.
The eight-bit routine shown in Figure 10 executes in an average of about 82 µ.,s/byte , or about 45% faster than the four-bit method. Memory usage for the eight bit routine plus one look-up table is 568 bytes .

LRC
LRC , Longitudinal Redundancy Code, is a special case of CRC where the particular polynomial chosen results in the same CRC code as would be obtained by doing a 16-bit wide exclusive-OR once every 16 bits. If the data stream were represented as a succession of 16-bit words , the LRC code added to the end of the stream would equal the first word exclusive-ORed with the second, exclusive-ORed with the third , and so on. When the check is made at the receiver, the result is zero if no errors occurred, since the exclusive-OR of anything with itself is zero.
LRC is also often done on an eight-bit word length, since software implementation is a little bit simpler than with sixteen bits. LRC , a form of CRC, can be handled by the CRC implementations discussed in this article. The polynomial for LRC-16 is X(l6)+ l ; and that for LRC-8 is X(8)+ l . A table for LRC-16 in the four-bit implementation of section 2 could be constructed in the same way as the table for CRC-16 was done . The result is in Figure 9.

checksum

The checksum - an accumulation of the remainder of

modulo 256 addition of a string of data organized in bytes -

is a method of error detection in widespread use throughout

the µ.,C industry since it is easily-generated and is very

effective in detecting errors. Often, in the case of data which

is coded into ASCII characters that represent the data in

hexadecimal form, the checksum is talcen over the values of

the hex numbers rather than over the actual bit patterns

themselves.

Typically. the initial value of the eight-bit checksum is

minus one . This is so that when zero occurs often in the data ,

the effectiveness of the code is not diminished. Thus , when

the checksum has been talcen over received data, the final

value is minus one - not zero.

JULY 1981 Digital Design 85

Electronics Test & Measurement Conference

October 5 - 8, 1981

Hyatt Regency Chicago · Chicago, IL

The Only Midwest Conference

and Exhibition Devoted Exclusively to

Test Instrument and ATE Technology

Leaders in the ATE and test industry will focus on the technology and

management involved with the application and use of INSTRUMENTS and

ATE in testing COMPONENTS, SYSTEMS and SUBASSEMBLIES.

----------------------------------------------------------------------------------~ ~

A four-day technical program of specialized courses, workshops and invited papers will address the following problem areas:

EFFECTIVE MANAGEMENT OF TEST RESOURCES
Paul J. Giordano, Chief Executive Officer Giordano Associates, Inc.
FUNCTIONAL BURN-IN TESTING: TRADE OFFS AND SOLUTIONS

ATE: HOW TO SELECT IT -APPLY IT MANAGE IT
Arnold Greenspan, President AMG Associates
Ralph P. Anderson, Product Une Manager, . GenRad, Inc.

Bob Scholl, Engineering Manager Eaton-Pacific Reliability Jerry.Koran, Special Projects Manager Eaton-Pacific Reliability
EVALUATING ATE TO ACHIEVE COST EFFECTIVE TESTING
Al Cota, Department Chief Circuit Pack Testing, Western Electric Co.
COMPONENT FUNCTIONAL TESTING
John J. Theodore, Senior Research Engineer,
Lockheed Missile and Space
UNDERSTANDING AND EFFECTIVELY USING TODAY'S NEW BREED OF TEST INSTRUMENTS
Stan Kubota, Vice President Interface Technology

INTRODUCTION TO DIGITAL TESTING
Lutz P. Henckels, Ph.D., President HHS, Inc.
Rene Haas, Executive Vice-President, HHS, Inc.
Andrew Herman, Director of Testing Engineering Institute, HHS, Inc.

ADVANCEDATETECHNOLOGYAND MANAGEMENT

Philip C. Jackson, President

Giordano Associates

Paul J. Giordano, Chief Executive Officer,

Giordano Associates, Inc.

ATE SOFTWARE TUTORIAL- DEFINITIONS, STRATEGIES, LANGUAGES, APPLICATIONS
Damon C. Hart, President, Lexico Enterprises, Inc.
Roger L. Williams, General Manager, Allocations Support Division, Lexico Enterprises, Inc .

86 Digital Design JULY 198 1

.., The Exhibit is devoted fexc1usive1v to manual and automated ·test ~and measurement · equipment and services

~ TEST AND MEASUREMENT INSTRUMENTS
~ Hand Held Instruments - from DVM 's to Logic Probes ·Microprocessor Troubleshooting and Development Tools · Automatic Measuring Instruments - meters, generators,
"' analyzers, scopes, counters· Field , Depot and Maintenance Testers· Instrument Controllers· Calibration Instruments

· ATE EQUIPMENT/SERVICES/SOFTWARE
Handlers· IC Testers· VLSI Testers· Memory Testers . ·Microprocessor Testers· System Testers· In-Circuit
Testers · Bare Board Testers · PCB Assembly Testers · · Burn-In/Temperature Cycling Systems · Cable/Wiring/ ... Harness Testers· Compilers/Translators· Test Services
· Software Packages · Interfaces

List of Exhibitors as of May 29, 1981

ACOC ELECTRONICS A.D.DATA ADDISON DIV. OF MUIRHEAD - AEROTRONIC ASSOCIATES AMERICAN ELECTRODATA ANALOG DEVICES ~ AUTOMATIC SYSTEMS
DEVELOPERS ATE SYSTEMS AUTEKSYSTEMS ; B&K PRECISION/DYNASCAN CARLTON INDUSTRIES ¥>- CHATSWORTH DATA CLARKE-HESS "' COMPIC COMPUTER CONSOLES/RLG COMPUTER AUTOMATION ~ CONTREL DA YMARC .,. DIT-MCO INTERNATIONAL DRANETZ ENGINEERING ....,i LABORATORIES DYTEC/CENTRAL ~ EAGLE TEST SYSTEMS ~ ELECTRO-MECHANICAL
SYSTEMS ELECTRO SCIENTIFIC
INDUSTRIES ~ ELECTRONIC SYSTEMS and
PROGRAMMING ~ EVERETT/ CHARLES TEST
EQUIPMENT ,. FAIRCHILD TEST SYSTEMS
GROUP '" FLUKE AUTOMATED
,. SYSTEMS FTS SYSTEMS GENRAD GLOBAL SPECIALTIES HAMEG

HUNTRON INSTRUMENTS INSTRUMENTATION
ENGINEERING INTERFACE TECHNOLOGY INTERSTATE ELECTRONICS KEITHLEY INSTRUMENTS LOGICAL SOLUTIONS LUTHER & MAELZER MARTIN MARIETTA
AEROSPACE MICRO COMPONENT
TECHNOLOGY MICRO CONTROL NORLAND OSTBY & BARTON PIER ELECTRONICS PLANTRONICS/ZEHNTEL POINTMASTER PRACTICAL TECHNOLOGY PRAGMATIC DESIGNS PYLON Q CORP.
RACAL-DANA ROD-L ELECTRONICS
SENSITEK SIEMENS SINCLAIR ELECTRONICS SOLARTRON INSTR. GROUP SYSTRON-DONNER T&B/CABLESCAN TEST ENGINEERING
SOLUTIONS TEST SYSTEMS THERMONICS TRACE INSTRUMENTS UTI VERSATILE INTEGRATED
MODULES VIRGINIA PANEL ZIA TECH

Produced by Electronics Test and co-sponsored by Circuits Manufacturing, Digital Design, and Design Engineering Magazines.
For more information contact
Dona Atwood , Electronics Test & Measurement Conference, 1050 Commonwealth Ave. , Boston , MA 02215 (617) 232-5470.
r--------------------DD 7/81 Electronics Test & Measurement Conference lllh1im1lll1uill
Please send me more information on the Electronics Test & Measurement Conference at the Hyatt Regency Chicago, Chicago, IL, October 5 - 8, 1981 .
_ _ _ Attending _ _ _ Exhibiting
Name ________________
Title _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ _
Company _______________
Address/ Mailstop - - - - - - - - - - - City _ _ _ _ _ _ _ _ State _ _ _ Zip _ _
Phone ________________
Return coupon to: Registrar, Electronics Test & Measurement Conference, 1050 Commonwealth Ave ., Boston , MA 022 15 (617) 232-5470.

JULY 1981 Digital Design 87

- -COMPAT Design- -

PDP-11 Cross-Compiler Remedies ''Brute-Force'' µP Software Development

Now you can harness the power of your sentences and punctuation) and hostile to your program." as Kole puts
DEC minicomputer for Intel 8086 µ.P semantic errors (sentences that don't it. ·· tf you attempt to do anything in that

software development. PasPort is a make sense). creating error messages to program in any way fishy or illegal.

cross-compiler developed by Inter- indicate where in the program the errors you·d sure like to know about it. and

metrics. Inc. that eliminates the need are . In addition. it lets the developer that's the whole point of running it on

for .. brute-force'" software develop- know if there are any variables he the host." he explains ...Traditionally.

ment. Rather than muscling out pro- hasn't used. or if a variable hasn ' t been this was done on the MOS . but ifs very

grams with multiple Microprocessor given a value . If the program checks difficult. whi le you're running on the

Development Systems (MDSs). out. the compiler then .converts it to actual hardware. to get a lot of checking

Pas Port allows you to develop software intermediate language. which is an going on.

on any .PDP- I I minicomputer systems object representation for a virtual

In addition to automatic dynamic

· running under UNIX or RSX- I IM machine ; thi s intermediate form is checking. other run-time diagnostic

operati ng systems.

similar. but more compact. then the features are available as options . A

According to Ron Kole. manager of standard P-code . PasPort compi lation .. profiler'" records which source lines

Intermetrics' Software Products Divi- rates commonly reach 2000 to 3000 executed and how many times they

sion. most developers have access to lines per minute.

were executed. so the developer knows

corporate mainframes or laboratory
minis . By using them for software host run-time support

which program paths have .been tested . Also produced is an estimate of how

development. relying on an MOS only The next step is to run the program on much execution time each source

for final testing and integration. com- the PDP- I I ·· in an environment that is statement required. revealing which

panies can save the price of several

MDSs- quite a savings. considering

MDSs cost from $15K to $25K each.

Program Development

PasPort uses Pascal language conforming to the International Standards

and Initial Testing (Host Minicomputer)

Organization (ISO) proposal. It supports comprehensive diagnostic capa-

I I Pascal

bi Iities. via an interpretive language .

Source

allowing the user to test app lication

software on the host before sending it

on to the MOS. This allows use of the

many tools inherent in PDP- I I sys-

tems. including file management .

source control systems. archives. large

disks and high-speed printers . In addi-

tion . running PasPort on a multi -user

host allows sharing of files and

procedures; separately compi led

routines can then interact via parameter passing or through global data areas.

Integration and Final Testing

PasPort consists of three segments:

(Target MOS)

Compilation. Host Run-T ime Support.

and Target Run-Time Support.

compilation
Compilation is essentially an errorc hec king process. The idea is to take the original Pascal algorithm created by the developer and translate it into a lower level. so that it can run on the PDP- I I . First. the compilation process checks for syntactic errors (i llegal

Program Development and Testing (MOS)
1----llool Asse mbl e ~---9"'i & Link

88 Digital Design JULY 1981

parts of the program are most timeconsuming.
An option for UNIX system owners allows users to generate PDP- I I instructions from the Pascal progam; a complete run-time library for this option is provided.
target run-time support
"We certainly don't claim that you can do all your debugging on a PDP- I I," says Kole. "Once you finish the host debugging phase, you still have to prove that the program works on the 8086. "
PasPort provides two paths for moving the program from the host to the MOS. One is to send the intermediate language, with minor translation, to the MOS where there's a PasPort interpreter that will execute it on the 8086. This provides streamlined, efficient execution , without error-checking. The

other path consists of translating the intermediate language on the host into real 8086 instruction. Most users prefer this direct code because it is more time efficient, and it allows them to see the code directly. However, the slower, interpretive, intermediate code is more compact, and is suitable for non-time critical applications.
Intermetrics aims PasPort at a wide range of companies with expanding software development teams . "The target audience," explains Kole, " is really industrial companies that are finding that µ,Ps are the right thing for them in a product; this includes anywhere from 50- 100 person companies that are building a new gadget to large companies that make a product of some kind which they are putting out with more capabilities."
Will software developers, accustomed to the control they have with an

MOS , accept the PasPort system? " Some software developers," answers Kole , "consider themselves craftsmen and artists and they will never want to give up twiddling those bits . But what they should realize is that PasPort actually allows them to become more creative, because they are freed from the detailed level of every instruction on the machine to really turn their attention toward solving a problem."
PasPort 8086 costs $15K, and comes with a user's manual and the ISO Pascal draft standard reference manual. PasPorts available for other microprocessors (tentatively, Motorola's 68000 and Zilog's Z8000) will be available in the future.
by Bob Hirshon
Intermetrics, Inc, 733 Concord Ave, Cambridge, MA 02138. Circle 199.

,. Compatible Multifunction Controllers
Deliver Backplane Breathing Room

The design freedom one extra card slot provides system designers can be priceless, often saving considerable design time, hardware expense (expansion chassis and bus repeaters), and aspirin . One indication of how valuable that space is will be provided by the sales figures for multifunction controller boards introduced by Spectra Logic and National Semiconductor.
Spectra Logic's Spectra 20 and Spectra 21 handle removable pack or
Winchester SMD disk drives and start/ stop or streaming half-inch tape drives simultaneously, all on one board. Both models attach up to four SMD disk drives and up to eight formatted tape drives without modifying the operating system software . Spectra 20 is for Data General Nova and Eclipse users , and has been available since May; Spectra 21 is geared to DEC PDP-11 users, and should be available this month.
National Semiconductor's Hexacon controls three peripheral subsystems: disk, tape and a fixed-head-disk emulator they've introduced, called NURAM. Aggregate device transfer rate exceeds 2 MB/sec for up to four CDC 9762-type 67-MB disk drives, up
, to four Cipher Microstreamer tape drives (start/stop or streaming) and up to 8 MB of NURAM auxiliary memory . Hexacon works on any DEC UNIBUS system and is compatible

Multifunction controller boards, manufactured by National Semiconductor and Spectra Logic (above) handle multiple peripheral subsystems, but use up only one card slot.

with DEC operating systems. Production shipments are slated for September; NURAM production shipment should begin in October.
Each company uses a different design approach for its controller and, not surprisingly, each believes its approach is the only approach. One major difference between the two boards is

that Spectra Logic uses two µ,Ps, with a larger total chip count, and National Semiconductor uses one. As Jim Anderson, National Semiconductor staff engineer, puts it: "They (Spectra Logic) have a separate microengine for the tape unit. Tape units typically spend 20 to 22 hours a day not being used. That portion of their logic is wasted

JULY 1981 Digital Design 89

The Only
PIBER OPTICS
Show in the World
POC 81 WEST
SczptfZm~r 1-l 1981 Hyatt RfZgfZncy San Pranci1co
· EXHIBITS and live demonstrations from 80 international manufacturers of fiber optics components and systems $20.
· TECHNICAL PROGRAM devoted to "Fiber Optics: The Global Viewpoint". Sessions include local networks, data links, connectors, long wavelength fibers, telephone installations and military applications.
e SHORT COURSES Advanced Fiber Optics - $395 Syst ems Design - $395 Fiber Optics Market s - $250
Contact : Ellen M. Bond, Director Expositions & Publications INFO RMATION GATEKEE PERS, INC. 167 Corey Road, Brookline, MA 02146 USA Tel: 617-739-2022 TWX: 710-331-6484 Telex : 95163 INTERTRADE BSN

during those periods of the day. We wanted to be able to use

that same expense more efficiently, and we believe we got a

better plan for being able to take the logic we invested in arrd

spread it across three peripherals ."

Spectra Logic, however, believes that the one µ.P ap-

proach has its drawbacks : " It 's the opinion of our engi-

neers," says Steve Roberts, Spectra Logic Executive Vice

· President, " that they (National Semiconductor) really had to
cut so many corners that there 's no way they can do all those

functions with just one µ.P ."

" We do it successfully," counters Bill LeDuc, National

Semiconductor Product Marketing Manager , "so what he

(Roberts) thinks really isn ' t too material. " LeDuc did add,

" We were a little bit concerned as far as handling all three

functions -whether or not we could get down the UNIBUS ~.

as rapidly as we hoped - and it far, far exceeded our

expectations."

" We may be in for a surprise," says Roberts , "but our

engineers believe that with four levels of interrupts going into

one µP, there 's absolutely no way that that can keep the disk,

the tape , the UNIBUS and that NURAM thing all going at

one time without jeopardizing and sacrificing a tremendous

amount of performance. "

" If you take their approach, that's true ," answers LeDuc,

" but we think it's the other way around: we think they're

going to have a helluva time making theirs work with some

high speed peripherals . This is my own impression, but the

two microengine approach can lend itself to some arbitration

problems between the two microengines - which one is

going to have access to the UNIBUS - and when you start

making that coordination betwen the two microengines -

which one's going to transfer-somebody 's clock has got to

slow down."

"I don ' t think there 's any point that can be made there;"

states Roberts, "we ' re shipping the Data General one, so

there 's no question but that it works and that it streams and

does everything else."

On paper , Spectra Logic has the edge in transfer rate and

also supports eight tape drives to National Semiconductor' s

four. In addition , Spectra Logic makes both Data General

and DEC models. However, National Semiconductor has the

advantage of being able to handle their high-speed bulk

NU RAM memory , and also has a larger buffer than Spectra

Logic 's . But the real test for the two controllers will be in the

field, where reliability and maintenance of recorded specs

will tell the story. And that's the test by which both compa-

nies say they ' re eager to be judged.

by Bob Hirshon

National Semiconductor Corp, 2900 Semiconductor Dr.,

Santa Clara , CA 9505 I.

Circle 201

Spectra Logic Corp, 2316 Walsh Ave, Santa Clara , CA

9505 I.

Circle 202

COMPAT Design is a new Digital Design department featuring the latest in computer compatible technol ogy. Each month, COMPAT Design brings you the nuts and bolts of new hardware and software products, and the views of the engineers who designed them.

90 Digital Design JULY 1981

·
I

Manufacturers of Electronic Components, Systems, Subsystems and Test Instruments
AN UNPARALLELED OPPORTUNITY TO SELL
YOUR PRODUCTS IN·THE FAR EAST
ANNOUNCING ...
1111
ll DATA.~bTELE
COMMUNICATIONS
20-23 January 1982 Harumi Exhibition Center - New Hall Tokyo Japan
The telecommunications market in Japan is huge, conservatively estimated at $47.7 billion over a ten-year period . With bilateral government agreement for competi-
tive bidding in Japan now a reality, the way has been opened for international manufacturers to supply a large part of Japan's estimated US $3.4 billion initial need for communications equipment and technology.
This exposition is designed to provide sales opportunities in this newly-opened market for
suppliers in the United States, Europe, the United Kingdom , Southeast Asia and elsewhere . . . as well as to establ ish a convenient forum for Japanese manufacturers who already serve the market. The exhibition will be augmented by a comprehensive technical program.
JuLY 198 1 Digital Design 91

SAVE
TIME
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MONEY

R s x -11 WITH

Dig ital MCoLamnmguaanged

"Fantastic Help for Users" "Human " "Great Help Files" "Easy to Install & Use"

FREE 30 DAY TRIAL

~ NOV~ AT IV E~

:-c

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AUBEL SOFTWARE 1 Soldiers Field Park 605 Boston, MA 02163 (6 17) 876-7993

Circle 53 on Reader Inquiry Card

UNIBUS *
ST.ATUS REVE.ALED

- - - What's Coming Up--- -

august '81 editorial emphasis....

COMPATrM'81 Show Issue

And Product Directory

This special computer compatible COMPAT issue next month will contain

an industry fi rst - the first directory that lists plug-compatible computer products from manufacturers offering compatible products for DEC,

Data General , Hewlett-Packard, Perkin-Elmer, IBM, Intel, Motorola and

other minicomputer and microcomputer makers. This directory will be

saved and referred to for the next 12 months by OEM system designers and integrators whenever they need to compare or specify computer

. ..

compatible products. No other compatible computer source or directory

in existence lists such information. COMPAT is the industry's first show

exclusively devoted to computer compatible products.

Graphic and Alphanumeric Display Terminals
A product showcase will spotlight current graphics and alphanumeric display terminal technology and list terminals of interest to system designers and OEM integrators and builders.

Computer System Power Supplies
This article will present criteria for selecting a power supply that is best suited for a particular application. This power supply report will cover various aspects of recent power supply technology and product choices that include linears and switches, build vs. buy criteria, and related design problems.

· tATEST BUS TRANSACTION STORED, OR TRANSPARENT VIEWING.
·BUILT-IN tATCHES · INDIVIDUAL LEDS · BUILT-INEXTENDER \\1TH
SOCKET · LED PROTECTOR PtATE
PACIFIC DIGITAL SYSTEMS
878 Hollenbeck Avenue Sunnyvale,Ca 94087 (408) 732- 0656
* Trademark of DEC
Circle 54 on Reader Inquiry Card 92 Digital Design JULY 1981

MA, ME, NH, RI & VT: Jeffrey C. Hoopes, National Sales Manager. Jackson Parker. Regio nal Sales Manager, (617) 232-5470, 1050 Commonwealth Ave .. Boston. MA

022 15

NO. CA, OR & WA: Neal W. Mann ing, Western Sales Manager. Deanna D' Zamba . Vernon D. Swan , Jr., (408) 371-9620 , Suite 1005, 190 1 S. Bascom , Campbell. CA 95008

SOUTHERN CA: Carol Stagg, Regiona l Sales Manager, Linda Horwitz. Lloyd C linkenbeard, (213) 981-3300, S uite 12 15, 159 10 Ve nt ura Blvd., Enc ino. CA 9 1436

NYC, L.I. & CT: Jack Flynn, (203) 673-0300, The Fly nn Group. P.O. Box.675. Avon,
CT0600 1

MID-ATLANTIC STATES: Warren Smith, (201 ) 221-0184, The Flynn Group, P.O . Box. 754, Bernardsv ille, NJ 07924

SOUTHEASTERN STATES: E. Haro ld Mitche ll . (404) 634-7070, The Flynn Gro up, P.O. Box. 136 11 , Atlan ta, GA 30324

OHIO VALLEY: Doug Horst, (313) 476-3757 , The Flynn Group. 27333 Bramwell. Farmington Hills, M l 480 18

MID-WESTERN STATES: Dav id Kingwill, Ed Krukowski, (312) 774-9660, The Flynn Group, 5526 N. Elsto n Ave., Chicago, IL 60630

SOUTHWESTERN STATES: Jerry Ambroze, (713) 780-3326, The Flynn Group. 2 168 Augus ta, Ho uston , TX 77057

JAPAN: K . Yanagihara, (03) 350-0272, 10- 10 Shinjuku 3-chome, Shinjuku. Tokyo, 160, Cable Address: Yanacour, Tokyo

ATE
· SEMlrtAA/EXl11BIT
Automated Testing for Electronics Manufacturing

JUNE 14-17, 1982, JOHN B. HYNES VETERANS AUDITORIUM, BOSTON, MA

We invite technical papers on these subjects for presentation in General Sessions and Workshops

Field Testing

Analog Board Test

Bare-Board Testing

Analog Diagnostics

Loaded Board Functional

Bubble Memory Testing

and In-Circuit Testing

Burn-In/Temperature Cycling

LSI Board Test

Logic Analysis Techniques

LSI Component Test

Waveform Analysis

Digital Diagnostics

Electro-Optic Testing

Microprocessor Bus

Test Requirements Analysis

Fault Isolation

Interfacing Devices

Simulation

Automatic Test Generation

Systems Support Management

ATE Management

ATE Acquisition

Testability

Economics of Loaded

Board Testing

ATE System Calibration

Using IEEE Bus Instruments

Signature Analysis

Abstract Deadline : September 15, 1981

,.,_

r-------------Abstract Submission Form-------------,

Please attach this form with your abstract or paper idea.

I DD 7/81

Name

Title

Company

Address

City

,. ,

Phone No. (

Paper Subject

State

· Zip

ext.

I I

Please complete one: Abstract attached

Abstract to come by

Send abstracts (200 - 500 words) and short biographies by September 15, 1981 to Mary Habosian, ATE I

Seminar/Exhibit, c/o Benwill Publishing Corp., 1050 Commonwealth Ave., Boston, MA 02215. Or call :

L(6-17-)23-2--54-70-. --------------------------------.I

Produced by Electronics Test and cosponsored by Circuits Manufacturing, Digital Design and Design Engineering magazines.

JULY 198 1 Digital Design 95

- - Innovative Design- -

Glare Screen Provides Cure For Terminal Eyestrain

Every occupation has its hazard, from writer's cramp to tennis elbow - not to mention the newly-diagnosed ··space Invaders wrist'' (reported in a recent issue of the New England Journal of Medicine) . For video display terminal (VDT) operators, eyestrain is the ailment, and several display phenomena (flicker. radiation. and glare among them) currently receive blame for the problem.
Undoubtedly. surface glare is one major contributer to visual fatigue . Various light sources reflect on the surface of the VDT. distracting the eye of the VDT operator. Eyestrain results because the reflection appears. to the observer. to be at whatever distance from the operator the original object occurs. For examp le . the reflection of a window located ten feet from a VDT screen which is. in tum. located 14 inches from the operator will appear. to the operator. to be over ten feet away. As a result, the operator's eye, when distracted by the reflection, must refocus from 14 inches to ten feet. Constantly refocusing between these disparate points throughout an eight hour day creates eye fatigue.
Polaroid. which has had some experience dealing with glare. recently announced a circular polarizing filter that ··absorbs harsh reflections and glare
while improving contrast to mak~ the
VDT screen easier to read ... according to Dr. Stewart Bennett. General Manager of Polaroid's Polarizer Division.
The filter traps not only reflections of light sources from around the room. but also ambient room light: e liminating this light results in a higher contrast image.
Inescapably. the CP-70 also filters some light produced by the VDT . According to Bennett. ··the observer sees about half the light coming from the screen.·· However. he ' s quick to add. ··if the brightness control on the VDT is turned up a bit. the letters are as bright as they are without the filter. although this is usually unnecessary

because of the improved contrast." Polaroid claims their filter is superior
to conventional frosted or tinted glare fi hers because these methods reduce image clarity and don't completely eliminate glare . Model CP-70 filters come in a variety of sizes and fit on existing terminals via adhesive Velcro

fasteners. Unit quantity prices range from $68 to $125 .
by Bob Hirshon
Polaroid Corp, Polarizer Div, Upland Rd, Norwood , MA 02062.
Circle 197.

Light Unpolarized
No Light

Polarized

Reflecting

Linear

Surface

n \J --~sI \

Polarized Right Circular
Incident

oOocr - I

s
\/

~Reflected

w I

Polarized

Left Circular

Polarized

Linear

Unfiltered light carries electromagnetic fields along with it. lying in a plane perpendicular to the light beam's path . Linear polarization filters selectively transmit light polarized along a single line of that perpendicular plane . Polaroid's glare reduction method incorporated a linear polarization filter on the outside. laminated to a retarder plate on the inside. Together. these two filters eliminate glare via a fivestep process . First. light from the offending light source passes through the linear polarizer. Second. the linearly polarized light passes through a retarder filter. the ax is of which is oriented at a 45° angle to the linear polarizer. The effect of this retarder is to slow one polarization vector and transmit the perpendicular vector unhindered. there-

by putting a spin on the light beam, either clockwise or counter-clockwise. When this circularly polarized light hits the VDT screen. it bounces off. spinning away in the reverse direction (clockwise becomes counterclockwise and vice-versa) . Passing back out through the retarder again. the light beam gets another 45° twist, essentially recreating the linearly polarized light beam that came through to begin with - except now. since the beam has been reoriented by a total of 90°. it is perpendicular to the axis it had when it first entered . As a result. the linear polarizer filter that first allowed the light beam in won't let it escape. since the beam no longer lies along the filter's axis. Consequently. almost no light that enters from the outside reflects back out again .

·
·
..
,...
.~·
. -
..
..

96 Digital Design J LY 1981

Printer Produces Color Graphics

Growth of color displays for small

business systems has long been ham-

. pered by lack of inexpensive color hard copy. While this is merely one limiting

factor in an otherwise booming area,

it's an annoying weak link for designers

of low cost business systems.

This fall, Integral Data Systems will introduce industry ' s first answer to the

problem: the Model 570 color printer.

The Model 570 looks, sounds, feels

and basically is just like a Model 560

Paper Tiger printer. But a newly-

designed multicolor ribbon system and

software package enable the 570 to

print in eight colors , producing busi-

ness graphics with surprisingly high

color saturation and quality.

Like color printers from IBM,

Ramtek and Trilog, Model 570 works

by hammering conventional impact

print wires against cyan , magenta, yel-

low or black ribbons. As with the IBM

system, the colors are arranged in par-

allel , horizontal strips , which the print

head accesses by shifting up and down.

Like Trilog and Ramtek models , the

570 can mix primary colors to create

additional colors (green, violet, orange

and brown) . And like Ramtek and IBM

units , Model 570 makes one pass over

each line for each color that the line

requires . But unlike any of the above-

mentioned printers , the 570 will sell for

under $3K , less than a third the price of

other impact color printers.

Thanks to the overlapping dots pro-

duced by IDS 's staggered nine-wire

print head, Model 570's image quality

equals or exceeds that of the other color

printers . Although resolution is only

84 x 84 dots per inch, dot overlap

eliminates most of the inter-dot white

space , resulting in denser, higher-

quality colors.

What you don ' t get with the 570 is

high throughput. As a printer, it sails

along at a respectable 150 cps. But

multi-colors require multi-passes, and

this can slow things down considerably.

Plot speed is application-dependent:

the more colors per line, the slower the

570 travels . Also, graphics that are

more complex on the right side of the

paper require more time than graphics

that are detailed on the left, since the

former requires the print head to travel

the entire length of the line more times .

Because plot speed is so application

dependent, throughput benchmarks are

Carriage Mounted Shift Actuator

Figure 1: Model 570's mechanical shift automatically accesses each ribbon color.

difficult to calculate. To give some idea, however, the business chart (Figure 2) requires about three minutes.
Making the 570 compatible to the many color graphic terminals currently in use was the most difficult design difficulty for IDS engineers to overcome, according to Peter Eisenhauer, IDS Marketing Manager. " The biggest problem we ran into was not so much the implementation of the mechanism," explains Eisenhauer, " but marrying the software with the design and trying to come up with a control scheme for

shifting from color to color that was reasonably compatible to the types of color operating systems that are out in the fie ld . "
Since it ' s impossible to develop a software driver compatible with every graphic display on the market, IDS had to select only the more popular offerings . They're developing some software in-house; the rest, they're farming out. ·'One of the key things in the color · marketplace," says Eisenhauer, ''will be to identify the key hardware to be involved with . Then we ' re going to

Figure 2: IDS 570 desktop (or rocktop) printer provides color graphics, as well as correspondence quality printing.

73 75 n 79

JULY 1981 Digital Design 97

Innovative Design
find the people that are using it , and go to them and say, 'here's a color printer we ' II be shipping in the fall. It will be very price competitive in relationship to your color system and, if you want to , it's yours - go develop a software driver for it.' "
.. In one fashion or another," Eisenhauer concludes, "we will assure that all the key marketplaces have a driver

that operates with their system." As a printer, the 570 produces corres-
pondence quality print in a 24 x 9 matrix cell and features six software selectable character sizes , mono or proportional character spacing, programmable horizontal and vertical tabbing , six or eight lines/inch spacing and automatic text justification. Model 570 's print mechanism uses ballistic print heads and is bidirectional , logic
seeking. "Model 570 will be a system-
oriented design," says Eisenhauer.

.... OEMs designing small business systems will be the primary potential market . According to a recent report by International Data Corporation of Framingham , MA (see Tech Trends, p. 13) the business graphics market will top$ l billion by 1984. The report , titled "Graphics in the Office," predicts that most of these systems will be color and, furthermore , that the lack or ready availability of color hard copy will be a major factor in either hindering or propelling that trend. IDS' s autumn introduction of the Model 570 will be industry's first step towards assuring the latter course.
by Bob Hirshon

Integral Data Systems, Inc , Milford,

NH 03055 .

Circle 200.

VTIOO GRAPHICS
IN 4.4 MINUTES!
From Selanar Of Course!

SIMPLYADD A CARD

Adding the Graphics 100 PC card to

your existing VJ'lOO or VTI03 gives you

the most versatile CRT terminal on

the market today. No other component

or CRT cbanges are required.

. ._ __

OR BUY OUR GRAPHICS TERMINAL
The Selanar GTIOO combines the DEC VTIOO and the Graphics 100 into a verycompetitively priced terminal, designed to fit your application.
NEED TEKTRONIX4010 OUTPUr?
OurGTIOO has all the capabilities of the vnoo plus
our new Thktronix 4010 emulation mode. Create excel· lent graphics displays with packages like PLOT 10, DISSPLA lit TELAGRAJ'. or any other package with 4010outputmodc.
BOWABOlJT SOFTWARE? SClanar supplies · Calcomp type Fortran subroutinesfor:RT·ll. RSX, VMS. · Light pen support software · Hardcopy support software.
CALLUS! Let us show you how to get the most from your
computer terminals.

(408) 727-2811

aJaOPBJUIR~a&: ISICOllPIJ'l'lta AJtclandstrassc5 D80120ttobrunn TMefon (089)60607 1·72 'Jtlex5216290
Circle 51 on Reader Inquiry Card 98 Digital Design JULY 1981

"
Smart Storage

Tube Terminal

Displays Two Colors

Two of the more imposing drawbacks of Direct View Storage Tube (DVST) displays have traditionally been lack of operator interactivity and lack of colors . Despite DYST's extremely high resolution , these liabilities have limited the displays' penetration in many markets . With the introduction of the new 4114 intelligent graphics terminal. however. Tektronix has made dramatic progress in overcoming the first of these problems. And . thanks to
... the 41 14·s two-color option. DYSTs
have finally flown the monochromatic pigeonhole .
On-board microprocessing power enables the 4114 to manipulate data
.. locally. without depending on the host
computer. RAM capacity that is expandable to SOOK bytes further reduces host dependence .
As a result , users can store a group of MOYE and ORAW commands - defining commonly used symbols. codes. background graphics. etc. and then recall them to the screen as they ' re needed. without tying up the CPU. These picture segments can be drawn simply by specifying a segment identifier and a screen location .
In addition. 3000 short vectors of flicker-free refresh capability enables rl the 41 14 to translate . rotate and scale picture segments locally. without erasure or repaint. This twodimensional transform capability defines picture segments - potentially

quite complex ones - as display cur- ture area from the stored area.

up to 19.2K baud. Options include

sers , which are manipulated with the

A two-phosphor mix allows the 4114 single and dual flexible disks, up to

4114 's thumbwheel cursor control.

to achieve two colors. These two phos- 512K bytes additional RAM , graphic

Another feature made possible by the phors get excited at different potentials. tablets , a bus extender, and a three-port

4114's refresh memory is a user- " You can excite the reddish phosphor, " peripheral interface. Model 4114 sells

definable dialog area. This enables says Kondrat, " by not giving it enough for $17 ,500, or $19,500 with color en-

operators to specify a screen area ex- potential , so it gets just excited enough hanced refresh, in unit quantities (OEM

pressly for scrollable text, so that ter- to emit the red . But if you want to store discounts available) .

minal/host interactions don't overlap it, you jack it up a little more in voltage,

with graphics workspace.

and that stores it on the screen ."

by Bob Hirshoo

Problems of slow repaint were over-

Other key features of the 4114 in-

come in the 4114, thanks to the large clude resolution of 4096 x 4096 ad- Tektronix, Inc, PO Box 500,

,. local RAM . Extremely complex graph- dressable points (4096 x 3072 display- Beaverton, Oregon 97077.

...

ics of up to 26,000 short vectors can be able) and data communications rates of erased and redrawn in under 0.5 sec.

Circle 198.

The new interactivity capabilities of the 4114 don ' t arise from any new technological breakthroughs , according to Mike Kondrat, display terminal Marketing Manager, but simply from increased memory and processing capacity . In fact , before introduction of the 4114, some of the less intelligent terminals were somewhat enhanced by OEMs who built in their own limited refresh memory .
As memory and processing costs come down further, user-interactivity ofDVSTs will increase even more. But for now , according to Kondrat, being limited to 3000-vector interactivity isn't much of a limitation at all. " There are very few applications where users want selectible erase across the whole screen . So , from the applications aspect, the selective erase problem has been solved."
Unique to the 4114 is a two-color screen that Tektronix refers to as Option 31. Terminals equipped with this option display stored information in conventional green , but display refresh information in orange. For highdensity applications , this enables users to distinguish the user-interactive pie-

DEC
Com~atible
Sealed Terminal ....
The terminal that defies damp, dirty environments
· Nonventilated (no fans , no filters)

· Fully Gasketed

· NEMA 12 rated structural foam enclosure

· Sealed Membrane Keyboard

· VT 52 or Hazeltine 1420 compatible

Perfect for: · Plant floor information center · Operator Workstation · Shipping and Receiving
xyconl

THE HARDHAT COMPUTER PEOPLE
P 0 Box 984 An n Arbor. Ml 48106 3 13-429-497 1

Circle 52 on Reader Inquiry Card JULy 1981 Digital Design 99

fucludes DEC and Other Computer Compatible Products

EPROM MODULE Adds BK Memory To LSl-11 The CCS-1220 EPROM Module provides LSI-11 's with BK words of EPROM type memory using 8 Intel 2716 compatible EPROMS. A R/W switch sets the card in program mode,
and disable programming when set in Read-Only mode. It allows programming of any me,mory location, individually , sequentially, or randomly under software control. Programming software consists of writing to the desired location, and timing out for SO msec. $475 with user's manual describing board operation and programming consid erations. Control Logic Inc, Nine Tech Circle, Natick, MA 01760.
Circle 126
COMPUTER SYSTEMS
Compatible Alternatives To DEC Systems Marketplace
The 34 MAGNUM provides enhanced PDP-I I /34 class performance while the 44 MAGNUM is an economic alternative to the PDP-I I /44. Standard system configuration consists of a CPU with floating point and memory management, serial console interface, extended memory addressing to 4MB, dual TUS8 cartridge tape units including interface, programmable line time clock, bootstrap loader, 8kB cache memory , microcoded ODT and maintenance console. The 34 MAGNUM comes with 256kB of memory, the 44 MAGNUM with SI 2kB as standard .

Other Unibus compatible controllers are optional. They are supported by RSTS/E , RSX-1 IM and RTI 1 operating systems. $21,000 for the 34 MAGNUM, $27 ,000 for the 44 MAGNUM, 60 days ARO. Able Computer, 1751 Langley Ave, Irvine, CA 92714.
Circle 129
STATIC 64K RAM
Uses New 100 nsec Chip
The SCP- I I0, a 64kB IEEE S-100 memory card, uses the 100 nsec Intel 2167 l 6K static chip. The chip allows memory management functions of offset and protection to be performed with the 8 MHz. 8086 CPU without a wait state. The card performs both 8bit and I 6-bit transfers, switching automatically. The chips are used in a power down mode to minimize cur-

rent. $1295, OEM qty . discounts available. Seattle Computer Products, 1114 Industry Dr, Seattle, WA 98188.
Circle 130

DEC-COMPATIBLE VIDEO TERMINAL

Emulates The VT100 With Advanced Video Option

Model 3100 is designed for users who

don't need the powerful editing capa-

bilities of Cobar's 3132 terminal.

Standard features include printer port,

non-glare screen, 4 video attributes, set

up prompt legends , 19 ,200-baud

operation and screen save. $IS 9S,

OEM and qty discounts available.

Cobar Inc, 1181 North Fountain Way,

Anaheim, CA 92806.

Circle 132

PACKAGED VOICE TERMINAL
Features Expanded Vocabulary
This fully-integrated voice data input terminal doubles the standard vocabulary from 64 words to 128 words. Model 5300 combines the Model 5000 speech recognition circuit board with

the Lear Siegler ADM-5 terminal. The

two units are assembled, integrated

and fully tested by Heuristics. The final

product is a stand-alone, integrated

voice input terminal, supplied with a

noise-cancelling headset microphone.

The terminal can accept either key-

board or voice input, or both simultaneously. $3925. Heuristics Inc, 1285

...

Hamm erwood Ave, Sunnyvale , CA

94086.

Circle127

LSl-11 DISK CONTROLLER

Interfaces Two Shugart, Memorex or Fujitsu Disk Drives

This low cost, single quad size disk controller interfaces DEC LSI-11 , 11 /2

or 11 /23 microcomputers with two

each Shugart SA4000, Fujitsu 2301 or

" 2302, and Memorex IOI or 102 along
with other hard disk drives having a

Shugart SA4000 type interface. Model

DQ401 µP-ba sed controller, is compat-

ible with RT-11 and RSX- I I software.

Features include data buffer, automatic media flaw compensation , data

error checking, on-board bootstrap

and extended memory addressi ng to

256 kB. $I 580. Dilog, 12800-G

Garden Grove Blvd, Garden Grove , CA

92643.

Circle 146

DUAL TRACE OSCILLOSCOPE
Inexpensive Scope For Floppies
The Scopex l 4D-l 0 has a full I0 X 8 cm display on a flat face tube backed by IC circuitry with switched mode power supplies. Features include 10

MHz plus bandwidth at a Y sensitivity of 2mV/cm on both channels, full X-Y facility, Add and Invert capability,
wide range time base with push button selection of trigger modes. Measuring accuracy is 3% on both X and Y axes. Trace locate and probe compensation are included. $699. lntratec, Div. of British Aerospace, Dulles Int'! Airport, Box 17414, Washington, DC 20041.
Circle 152

1()() Digital Design JULy 19.81

µP -BASED CONTROLLER/DRIVER For Use With 3, 4 o r 5 Phase Stepping Moto rs
· Suitable for OEM applications in automation, robotics and research and development, the MCU-3 provides all the required power supplies to drive a
.
,.

stepping motor, control bus buffering

and optical isolation for field connec-

tions. Up to 16 MCU-3 's can be paral-

leled on the system control bus, which

is directly compatible with most of the

8-bit µP's-. Three groups of instructions

- initialize, command and read status

- provide the flexibility for a wide

range of motion control applications.

The MCU-3 is $394. Also available is

the MDB-6B high speed , high power

stepping motor driver for use with 4

phase stepping motors . It is suitable

for OEM applications in multi-axis

motion controllers. $245. Advanced

Control Systems Corp, 213 Centre St,

Quincy, MA 02169.

Circle 131

TERMINAL SWITCHERS
Manual or Remote Control
This family is fully compatib le with WANG, H/P, IBM and DEC equipment. The GBNC-S8 can switch one terminal between 3 or more CPU's or

modems. A 3 position switch allows selection of which CPU or modem will be connected to the terminal. The GBNC-S8RC, with remote control, connects 3 terminals to one common CPU port. Each terminal has a small co ntrol box which requests a connection to the CPU. Only one terminal is connected while the other two wait until the CPU port becomes available. The GBNC-S8 is $139; the GBNCS8 RC is $298. OEM discounts available. Giltronix Inc, 450 San Antonio Ave, Palo Alto, CA 94306. Circle 141
CONVERSION PACKAGE
For POP-1 1 to VA X -11 Assembl y Language Con version
CONPAX runs on both PDP-11 and VAX-11 computers and produces

VAX-1 1 assembler source code in less time and with fewer errors than manual conversion. Editing procedures and a post-processor allow the user to select the desired conversion and eliminate unwanted alternatives. It automatically hand les details such as supplying octal radix indicators, translating ASCII literals to VAX-11 format, and substituting standard VAX11 register names . The conversion process is controlled by tables which can be used to fine tune the conversion for particular programming environments and to produce special conversions (including multi-line) of PDP-11 opcodes, macros, or operands. An initial $1500 fee includes consultation, training and conversion of 500 lines . Additio nal conversion is $.50/line. Permanent license is $5000 . PSI , (Penni ngton Systems Inc), 65 S. Main St, Pennington, NJ 08534.
Circle 138
WINCHESTER STORAGE MODULE
EXORbus Compatible Series
Each configuration of the 9670 series is a complete storage system with one or more drives, an intelligent control-
---

!er and a power subsystem. Normal configuration includes an 8 11 Winchester disk drive and an 8 11 do uble sided floppy. Variations can include any combina tion of Winchester and 8 11 floppy disk drives to a max of 4
drives. The storage module controller responds to 10 high level commands
and features full sector buffering and
burst error correction. The system also
supports Enhanced Programmed Data
Transfer. The l OMB Winchester/IMB floppy configuration is $5295 . Crea-
t ive Micro Systems, 1 1642-8 Knott St, Garden Grove, CA 92641 . Circle 180

COLOR GRAPHICS TERMINAL

Fo r VT100 Users

The ColorScan 10 has a built-in line

ruling set and 8 colors for both fore-

ground and background information.

Includes a non-glare I 2" screen in

either an 80- or 132-column by

24-Iine format and a detachable type-

writer-style keyboard with separate

numeric pad. Feat ures split screen,

regiona l scro lling, smooth scrolling and

double high/wide characters. $3,795 ,

OEM discounts available. Datamedia

Corp, 740 1 Central Highway, Penn-

sauken, NJ 08109.

Circle 151

llM

SERIES/1 CONTROLLER FOR IBM 3203-5 LINE-PRINTER
The Computerm Line Printer Controller for the IBM 1403, 3211 and 3203-5 line printe rs provides complete line printer su pport with no changes required in the Series/1 system software. The controller is transpare nt to the host and operates in Cycle Steal and Direct Program Control (DPC) modes. It is completely compatible with the host computer drivers and operating systems throug h emulation of the Series/1 4973 Printer.
The price of this interface is $2,995.00. OEMand quantity discounts available, 90 days ARO. Computerm Corporation, 1670 Golden Mile Highway, Monroeville, PA 15146. (412)325-1344.

Circle 56 on Reader Inquiry Card
--~.;.:

1cu5·c-

-aoEu.a·Ecn--

ecs;
-...II

c=u .

.
-<n
s.......

==.-:a::s .ecun.
~a.

·it-=U0
aI :

Circle 74 on Reader Inquiry Card JULY 198 1 Digital Design 101

Business is
good all over
America!
* and it's always good
business to stay at
MOWARDJONnson'S
motor lodges
·CONVENIENTLY LOCATED ·FRIENDLY SERVICE ·OVERSIZE BEDS ·AIR CONDITIONING ·COLOR TV ·SWIMMING POOL · 24 - HOUR RESTAURANT Over 60,000 Rooms and 900 Restaur ants
Coast-to-Coast
\('~hen bu: n::1
takes you to j
CALIFORNIA
Howard Johnson cities:
Southern · Anahei m · Ba ld win Park · Bars tow · Claremo nt-Po mona· Co lton · L.A. Airport (C ulver Ci ty) · Nort h Ho llywood · Rive rsi de · San Bernardino · San Diego · Thousan d Oaks · Mo nrovia Northern · Mill Va lley · Sa nta Clara ·San Jose · San Lu is Obis po · Santa Maria · Redw ood City · Du blin · Sac ramento · Sa n Francisco (Fishe rman's Wharf)
MOWARD
JoNnson·s
motor lodges
For toll-free reservations call. (800 ) 654-2000
102 Digital Design JULY 1981

INTERACTIVE TERMINAL
Supported by SD RC Graphics System
The Series II features a high contrast vector display with 2048 X 2048 addressability and built-in firmware for fast, dynamic interaction. Used with SDRC SUPERTAB, it simplifies finite element pre-processing because menus and segmented pictures stored in the terminal improve response time. Using a light pen or data tablet , the Series II supports direct interaction with the geometric model and finite element mesh. SDRC OUTPUT DJSPLAY, the supplemen ta! post-pro cessing software, enables designers to visualize analytical results with accurate line drawings or contour plots. Local processing and picture storage permits observation of animated behavior under static and dynamic loads. Series II Graphics Terminal is $15,750. lml ac, 150 A St , Needham Heights, MA 02194.
Circle 128
DEVELOPMENT SYSTEM
Pro vides Fu/18-Bit Suppo rt
This series of upgradable, entry level development system packages provide complete 8-bit chip hardware and software development capability, upward compatibility with 2302 slave emulation systems and hard-disk-based cluster networks. They support the 8080, 8085 , Z80, 6800 and 6802

processors and include CRT, key-

board , selected CPU, 64K of static

RAM, in-circuit emulator and logic

analyzer in one compact console; plus

a I MB dual-drive, double-density disk

and programmers for 2704/2708 and

27 16/2532 /2732 EPROMs . Each sys-

tem offers a full complement of hard-

ware and software features. $1 7,950 .

GenRad , Development Systems Div,

5730 Buckingham Pkwy, Culver City,

CA 90230.

Circle 148

PLOTTING WORK STATION
Offer s Remote Graphics Manipulation and Plo tting
The 444 supports remote job entry, electrostatic plotting/printing and graphics manipulation capability scaling, rotation, mirroring, window-

ing. It accepts unsorted vectors in the Versatec Random Format (VRF) as well as sorted vector, compressed raster, raster and print data formats. Emulating HASP multileave remote workstations, the system provides IBM software and system protocol compatibility without modification of the

...

operating system. Components include

µP with 64 kB of memory, CRT dis-

play, 24 MB disk, and a bipolar algo-

rithmic processor (BAP) to perform

vector sorting and raster generation.

The system will support any two Ver-

satec printer/plotters in any mix of

paper widths . It can generate up to 15

different font styles and create dif-

ferent line styles and widths. The 444

Remote Plotting Work Station is

$35,000, 90 days ARO. Versatec, a

Xerox Co, 2805 Bowers Ave , Santa

Clara , CA 95051.

Circle 192

COMMUNICATION PROCESSOR
M icro computer System for Datacomm Applications
Designed for data communications requirements using both async and sync communications protocols, the OrangeBox can be used to implement a broad range of terminal and communications co ntrollers , concentrators, and front end devices, using software developed by the user. It is packaged as a standalone unit or in a 1911 rack mount configuration with 2 to 18 communication interfaces. Low-cost integral modems are available for operation at 2400, 4800 and 9600 bps. It has a Z80-A microcomputer and associated SIO integrated circuits for implementation of communications firmware using EPROMs. The standard Micro30

.
·
OrangeBox with 6 RS-232C 1/0 inter- ..,, faces is $1500, qty and O EM discounts available. Micom Systems Inc, 9551 Irondale, Chatsworth, CA 91311. .4
Circle 185

OFFICE /BUSIN ESS MICROCOMP UTER

Self-Contained, Typewriter-Size System

This stand-alone system contains the

µP as well as all other essential com-

ponents in a single console. The type-

writer keyboard has 100 key stations,

a numeric pad and 32 function keys.

The Microlite 11 also has a 24-line by

80-character plasma display and

houses two 5-1/4" floppy disk drives that can store up to 350,000 char-

acters per disk. An optional dot matrix

printer can also be housed in the con-

sole. Other options include floppy disk

drives with a 500 kB, 8" capacity. Up

to 4 drives can be supported. Rigid

disk drives with 27 /54/208MB remov-

able or 24/40MB Winchester fixed

characters to 4096 characters. Foreign

or special character sets may be used.

The Infoscribe l 000 is $1795, under.

$1000 in OEM qty. lnfoscribe Inc,

2720 S. Croddy Way, Santa Ana, CA

92704.

Circle 182

TAPE SYSTEMS INTERFACE
Group 3000 Tape S ystems Shared Between HP CPUs
With the SMASH (Shared Mass Archive Storage Host) interface, high performance 6250 tape technology can be shared over a network of CPUs, pro-

viding the advantages of higher recor-

ding density, increased throughput,

and access to a larger, expandable,

data base. The unit is contained within

the cabinet of the Group 3000 tape

controller. Switching selection for

network CPUs is operator-activated

between 2, 3 or 4 HP CPUs. Group

3000 operates at a speed of 125 ips,

records at triple density 800/1600/

6250 bpi or dual density 1600/6250

bpi. The SMASH unit is from $14,000

to $28.000. Oualex Technology Inc,

6925 Canby Ave, Building 109, Rese-

da, CA 91335.

Circle190

media are available for high speed and

larger capacity needs. Letter-quality

printing is provided by a separate

daisywheel printer, and a 300 !pm line

printer provides high volume printing.

01 Corp, 125 Ricefield Lane, Haup-

pauge, NY 11787 .

C ircle189

SERIAL MAT R IX PRINTER
No Duty Cycle Limitations
This unit has a 180 cps print speed and up to 136 column output. It can produce data processing as well as correspondence quality characters. In graphics mode it has a resolution of 70

dots/in. on both the vertical and hori-

zontal axes. The printer stores a stan-

dard ASCII 96-character set together

with an alternate character set in ROM,

and a third character set may be down-

loaded from the host CPU. Other fea-

· tures include bidirectional printing with logic seeking, vertical and hori-

zontal tabbing, up to 6 copies, adjust-

able form-feed tractors to handle pa-

per

widths

from

1.5

16 11 ,

options

I 0, 12 and 16.5 cpi may be selected at

either 6 or 8 lpi, and double-wide and

double-density printing. The input

buffer can be expanded from l 024

OUT FRONT
As a distributed graphics processing system
Compare our new VG 33000 graphics system with any other a nd yo u'll s ee why we're out front with features no one e lse ca n offer. At a price that's comparable. In fact, there's a lot more to ourVG 33000 than meets the eye. There's our distributed graphics library that moves the processing load off the host computer. There's o ur remote capability, with a synchronous serial line interface, that lets you locate work stations up to a mile away while communicating at rates up to a megabit. You get true 30 with the VG 33000. There are industry standard network protocols, local picture editing, off-line diagnostics, and a geometric shape generator. The VG 33000 has the fastest 30 clip/zoom rate available. All features you won't find on any other system . Plus, the VG 33000 can operate as a stand-alone system without host computer involvement to save you valuable computer time.
Our VG 33000 is so far out front in state-of-the-art technology, it has no competition. Find out today how you can be out front. Call or wri te:
Vector General, Inc. More than meets the eye. 21300 Oxnard Street, Woodland Hills, CA 91367
(213) 346-3410 TWX: 910-494-2764
Circle 58 on Reader Inquiry Card See Us At Siggraph/ 81 , Booth #707
JULY 198 1 Digital Design 103

Our new, slower, cheaper array processor.

Our new MSP-3X is only

about half as fast as our

MSP-3. But at $4950 its price

is also less than half that of

any other array processor on

the market.

"Slower;' of course, is

relative: MSP-3X lets your

PDP-11 computer perform

arithmetic and signal analyses

20 to 50 times faster than it

can alone. A 1024-point real

Fast Fourier Transform in

14.3 milliseconds, for example.

That's plenty of speed for

MSP-31 anay processor

most analyses of vibration , sonar, communications, radar, medical

image, and dozens of other kinds of data.

And you needn't sacrifice convenience, either. Operation is

simple and reliable, based on straightforward execution of an ex-

tensive library of functions, accessed through Fortran calls. And

MSP-3X's two hex boards simply plug into your PDP-11.
D · f All in all, MSP-3X is a most (
OmpU er 851gn intelligent trade-off. Write us
& Applications, Inc. ror detailed specifications.

377 Elliot Street Newton, MA 02164 (617) 964-4320

Circle 59 on Reader Inquiry Card

Is your system
constipated? 1

LOGIC ANALYSIS SYSTEM
For Standard 19" Rack Mounting The rack mounting package allows up to 96 channels of logic analysis for
..
··
ATE and other system test applica- ,...
tions. Five configurations are possible which arise from the package's ability to accept one or two PI-600 series modules so that the user can specify the analysis configuration best suited for his system test application. A keyboard, CRT, and the associated electronics are not required. The analysis system is designed to be incorporated into an IEEE-488 set-up and acts as a LISTENER/TALKER on the bus. The Pl-600 rack mounting package is from $6,750 to $14,900. Paratronics Inc, 2140 Bering Dr, San Jose, CA 95131.
Circle 188
PRINTER CONTROLLERS
Give DG Computers Up To 1500 LPM r Capability
These controllers, for the Nova and Eclipse, accommodate BDS band printers with speeds of 300, 600 , 900 and 1500 lpm. Speed selection is through on-board switches. Both are completely bus and software compatible with the minicomputer. Model

For quick relief, try our Formula 80
(8 Milliseconds access time) The Alpha Data Model 80 discs are used by our customers to relieve system slow down due to the swapping of softw--arein and out of mam memory by theirCPU . The Model 80 comes in 1, 2, 4, & 8 megabyte models that can be daisy chained up to eight units per chain .
For further information, call or write :
alpha data
20750 MARILLA STREET, CHATSWORTH, CALIFORNIA 91311
(213) 882-6500
Circle 60 on Reader Inquiry Card
104 DigitalDesign JULY1981

DPC 40-DS employs an 8-bit parallel data-transfer bus which handles a full

ASCII 96-character set along with ver-

tical format paper-movement instruc-

tions. Model DPC 50-DS has a 16-bit parallel input from the ·computer with

an 8-bit parallel output bus to the

computer for handshake signals. It

has a 256-bit RAM, permitting the

computer to set and clear horizo ntal

tabs in any of 132 positions. Both

controllers buffer two data words with

transfer rates to 1OOkB/sec. With con-

troller, printers range from $325 0 to
·· $34 ,400. BOS Corp, 1120 Crane St,

Menlo Park, CA 94025 .

Circle 134

DISK CONTROLLERS
Drive Winchester Market Faster
These two controllers bring Winchester capabilities to the marketplace with less development time and cost to design custom drive controllers. Containing 56 devices, the WD I 000 controller board features all necessary buffers, a 5 Mbits/sec transfer rate, and control for up to 4 drives and 8R/W heads .The WD 11 OO 's 5 MSI chips (address mark detector, CRC generator/checker , MFM generator, serial/ parallel converter , and parallel/serial converter) take the place of 75 chips to provide an ST500/ SA 1000 interface. Available in a plastic 20-pin dual-in-line package or a 20-pin ceramic DIP. In quantity 250, the WDlOOO board is $395, and
·

pedestal bases and components for terminal stands

The EST Company offers a complete li ne of pedestal bases and components for stationary o r movable stands for term inals
or printers. We offer seven styles of 4-leg pedestal bases in sizes from 19"
to 34" spreads, and three styles of 5-leg pedestal bases in sizes ranging from 22" to 28" spreads.
Our line of uprights and top plates can match your needs for
those stands.
Let us quote your custom casting needs or work with yo u on your stand un it design.

EST

EST COMPANY, BOX 25H, GRAFTON , WI 53024 (414) 377-3270 A DIVISION OF LEGGETT & PLATT, INC.

Circle 61 on Reader Inquiry Card

the WDl 100 chip set is $48 . Western Digital Corp, 3128 Red Hill Ave, Newport Beach , CA 92663 . Circle 143

MICRO-BASED COMPUTER SYSTEM

Persona l Computer fo r Pro fessionals

The PC-8000 desktop computer

houses processor, memory and flexible

disk subsystem in a compact keyboard/

display unit, available with mono-

chrome or 8 color graphics. It supports

multiple operating systems, program-

ming languages and application pack-

ages, along with a wide variety of pe-

ripheral devices. Uses include data and

word processing by professionals and

managers in small businesses, and in

large corporations as a remote termi-

nal and as a standalone desktop sup-

port system. Hardware configuration

consists of a Z-80 compatible µ P with

up to 64 k B RAM plus optional 32 k B RO M. The 12 11 CRT permits selection

of variable screen widths, variable-size

U&L case characters, 3 types of viewing - static paging, scrolling and split-

screen - graphics, selection of an al-

ternate character set, blinking, inverse

video and an operator prompt line.

From $1600. NEC Information Sys-

tems Inc, 5 Militia Dr, Lexington , MA

02173 .

Circle186

Circle 62 on Reader Inquiry Card

JULY 198 1 Digital Design 105

SINGLE BOARD COMPUTERS
16-Bit Multibus Compatible
Each of the products conforms to the Multibus standards, including multimaster capability, and are compatible with both 8- and 16-bit peripheral boards. The FT-86C and FT-86M are designed arCX1nd Intel's 8086. The FT-86C /FP and FT-86M/FP incorporate Intel's 8087 Numeric Data Pro cessor. The FT-68M is designed around Motorola's MC68000. Using the 8086/8087 combination , focus is on 6 OEM and System House application segments: Business Data Processing, Process Control, Numeric Control, Robotics, Graphics, and Data Acquisition. The FT-86M and FT68M are designed for users needing to both support and protect large memory requirements. The FT-86M directly addresses 1MB and supports mapping addresses of ,. 8MB. The Motorola 68000 based FT-68M directly addresses 15MB. The GATEWAY SERIES products, including the

8087 NDP, range from $1,250 to $2,950. Forward

Technology Inc, 1440 Koll Circle, Suite 105 , San Jose, CA

95112.

Circle 163

DC SERVO MOTORS BROCHURE

For Computer Peripheral and WP Equipment

The Snapper series, permanent-magnet servo motors offer a

range of 10 off-the-shelf motor lengths, 2 motor diameters

and 8 standard winding options to provide the designer

with broad mechanical and performance flexibility. Features

include fast accelerations, low clogging, long brush life and

rugged construction. The brochure includes a Motor Char-

acteristics chart, notes on communication, conversion

tables, diagrams and a list of options. EG&G Torque Sys-

tems, 36 Arlington St , Watertown , MA 02172. Circle 161 ..,

COMPUTER SYSTEMS

Expanded DecSystem 10/20 Compatible Product Line

Models F4 and F5 are based on generalized, user-micro-

programmable processors which can emulate the Dec-

System 10/20 family. They can execute the same instruc-

Our 10-year history of creative systems design and fast delivery has built a strong and trusted name in the international marketplace. We' ll win you over too. Dial this hotline:
(408) 738-3368

tion set as any of the PDP-10 models and are capable of

running the TENEX, TOPS-10, TOPS-20 or other PDP-I 0

operating systems. Also offered is the language C and the

Unix operating system supported by a microcoded archi-

tecture . They are equipped with a display based diagnos-

tic µP for remote hardware and software maintenance.

With these new additions, the F series covers a performance

range from very small (personal) configurations to the

IDS international data services. inc. 1020 Stewart Drive, Sunnyvale, CA 94086 TWX 172-189

fastest PDP-10 compatible machine available. The FS is

from $50-$80,000, the F4 is $200,000. Foonly, 160 S.

Whisman Rd , Mountain View, CA 94041.

Circle 162

Circle 31 on Reader Inquiry Card

106 Digital Design JULY 1981

DESKTOP BUSINESS COMPUTER
Includes Integral 5MB Winchester Disk
System 1500 expands the use of low-cost desktop computers to business applications previously reserved for higher-priced minicomputers. Several applications may be on-line concurrently without changing floppies. An inte-

EXATRON'S RS·232C STRINGY/FLOPPY MASS STORAGE SYSTEM.

grated 700 kB double-sided , double-density flexible disk

drive is used as backup to the Winchester for program and data transfer via removable flexible diskettes. Eight flexible

diskettes can back up the full Winchester capacity. The high

speed Winchester disk transfers data at a speed of 5 Mbits/

sec. The disk can be configured to appear as one continuous

disk with a capacity of 5 .2 MB or as two separate 2.SMB

disks. An automatic error correction feature allows the disk

controller to automatically correct up to 11 bits per physic-

al sector. The system includes a solid state keyboard with a 60-key typing array and a 13-key adding machine cluster,

up to 64 kB RAM, a 12" CRT formatted in 24 lines of 80 characters, an 8 bit Z80 processor and interfaces for com-

munications and printer output. A complete set of account-

ing and word processing applications software packages are available. $9995. Digilog Business Systems Inc, Babylon

Rd , Horsham, PA 19044.

Circle 156

THREEPHASEACPOWERCONTROLLER
VAX Compatible
The MPD-416 is electrically and mechanically interchangeable with the DEC 869 AC power controller and is lower in cost. It distributes 3 phase power in computer, industrial control and electronic test systems. The controller is rated at 240/416 VAC @ 45A (I SA per phase) with 6 unswitched and 12 remotely switchable outlets. Standard features include a high performance EMI filter , transient supressors,

magnetic circuit breakers, local-off-remote switch, delayed

output for multi-controller sequencing, remote disable,

emergency shut down. The MPD-416 is $1300 . OEM and

qty. discounts available . Marway Products Inc, 2421 S.

Birch St , Santa Ana, CA 92707.

Circle 170

Mini-disk speed, capacity and reliability for only $349.50.

· Standard RS-232C communications link · Built-in operating system · Two file management structures: ASCII and binary · Three baud rates available: 300, 1200 and 9600 · Busy/ready handshaking supported

Call our HOTLINE . .. ( 800)-538-8559 In California, Call (408)-737-7111

Gexatron
Exatron, Inc.
181 Commercial Street Sunnyvale, California 94086 (408)-737-7111

Circle 64 on Reader Inquiry Card

HIGH

RESOLUTION

CRTs
P.S.
Switching Power Supplles open frame, outputs +SV/4A-SV/O.SA+12V/1A
av Input 11 AC 60 cycle -
others on request

Screen sizes from 5 to 14 in. Color plus P4, P31 and P39 phosphors. Extremely bright and sharp image due to 25 MHz video bandwidth and 1200 line resolution.
TTL logic levels for video input. and power requirements are 11 OV AC 60 cycle or 220V AC 50 or 60 cycle; please specify. High performance and low
prices. Call and try usl

I. II, !!!!~~!lcorp.

Mountain View, California 94041 Tel: (415) 962-9265 Tix: 171947 HANDWELL MNlV

Circle 65 on Reader Inquiry Card

JULY 1981 Digital Design 107

Classifieds

DEC and DATA GENERAL

5pe:c1AL.sE

um:1ct1A

BRAND-NEW

RK05-FAA

NCE PRICE
ONLY $2,495

DEC LIST $6,300
Quantity Prices Available
CALL CAROL AT EXTENSION 222

LE><-11 WORD PROCESSING FOR THE VAX,
PDP.11, AND LSl·11
Immediate availability for all DEC operating systems: RT-11. RSX-11M, RSTS, VTv1Salso TSX-PLUS. LEX-11 is easy to use and has complete word and list processing, full screen editing, single keystroke functions. user definable menus, forms, calculator and data base management facilities plus much more. LEX-11 is a proven system with installations world wide.
Local distributors wanted. excellent OEM discounts.
EEC Systems
315 Goodman 's Hill Road Sudbury, MA 01776 (617) 443-6376 (617) 443-6805
ENGINEERS/All Disciplines
New Plant Openings in SE- Fee Paid Send Resume or Call Anytime
BEALL ASSOCIATES of HIGH POINT Ray Schmitt PO Box 5225 High Point NC 27262 919/ 887-3193

SESSION PLAYBACK SOFTWARE
DEC VT100 Compatible
This package runs against session documenting log files produced by the program DOC. The combination of DOC to create a log file of a complete session. together with IMAGE. allows replay of the session back to the screen for subsequent reference and training. The dynamic application run example may be played back one frame at a time for inspection. Also. an accurate mapping may be put out as a printed document. The IM AGE package is S295, may be used with any number of VT I OOs connected to the system. Clyde Digital Systems, Box 348. Bedford. MA 01730. Circle 149
COLOR GRAPHIC CRT TERMINAL
Wide Variety of Features
The display has 1,920 alphanumeric characters in a 24 line by 80 column format with 720 X 288 graphic resolution. In add it ion to the full ASCII character set. each unit has I .280 user defined programmable symbols on a si ngle plane. The keyboard is detached and has 87 keys. There are 8 keys for editing and special functions plus 24 programmable function keys. The user can view two pages of d,ata by horizontal or vertical scro lling. Split screen is standard with up to 4 independently addressable and scrollable screens. The

direct access by location into area data

bases. One of the features of this

architecture is the ability to use the

aggregates to store general representa-

tions of the information content of

their constituent data points. For users

of graphic display systems this means

that wide area displays showing gen-

eral features and small area displays

showing great detail can be obtained

with equal ease from a common data

structure. High speed processing of

masses of pixels is also possible. It

supports simultaneous usage by multi-

ple users and features rapid access

rates. The IMS uses the VAX I I /780

as the host processor and may be inter-

faced to Megatek or any of several

others. As a turn-key system with the host comp uter, all software, peripherals

and graphic display , the IMS is

$400,000. Interactive Systems Corp,

5500 S. Sycamore, Littleton , CO

80120.

Circle 167

NTR COMMUN !CATIONS

PROTOCOL

'6 I

For DG Minicomputers

This data communications software allows the NOVA and ECLIPSE to

connect to UNIVAC mainframes using

the NTR remote job entry protocol. It

supports all standard features of the

protocol. including multiple 1/0

streams. a console. full duplex opera-

tion. space compression, and extensive

remote operator control over output

peripherals. It interfaces with RTOS.

ROOS and AOS. Any peripheral sup-

ported by the operating system may

be used for input or output. and each

I/ 0 strea m is treated independ en tly

and can be assigned to different peri-

pherals. Initial CPU license is 52750,

discounts for multiple sites or OEM.

Gamma Technology Inc, 2452 Embar-

cadero Way, Palo Alto, CA 94303.

Circle 135

MVl-7 is $3500 , qty. discounts avail-

able. Colorgraphic Communications

Corp, 2379 J ohn Glenn Dr, Atlanta,

(;A 30341.

Circle 181

INTERACTIVE MAPPING SYSTEM
New Technology in Mapping Systems
Many of the problems of the commonly used arc-node based mapping systems have been solved by this new hierarchically structured data base technique. It uses a tree structure of hexagon-line aggregates to provide

PDP-11 WP SOFTWARE

For RSX.11M, -11M-Plus Operating Systems

Under RSX-I IM , it runs on PDP-I I / :'.J's through 1 l/70's and can be tai-

lored to the size of the system . It

allows running extensive word proces-

sing tasks concurrently with data proc-

essing. Features include an expanded

dictionary of 30,000 words supplied,

and 3.'i,000 available for customized

applications. WORD-I I is a multi-

· user, menu-driven system allowing the
interactive creation, editing and print-

ing of documents. Written entirely in ...
MACRO-I I . A single CPU license for

WORD-I I on RSX-I IM is S7500 in-

cluding installation, training and sup-

port. Data Processing Design , 181 W.

Orangethorpe, Suite F, Placentia , CA

92670.

Circle 147

108 Digital Design JULY 1981

Use "TouchGraphic" Panels As On-Off Switch, Adjustable Vernier And X-Y Controller

Since the TouchGraphic panel proces- mine how rapidly the finger moves tion. the operator gets a predetermined

ses and outputs information digitally, across the panel by counting the pulses movement with a certain number of

you can interface it to a computer bus, and speed from point A to point B. taps on the panel. Then. by tapping the

enabling users to convert serial data Then. by tapping the panel. the system panel a different number of times. the

outputs to parallel data. In Figure I, can be reconfigured to permit the user operator gets another level of move-

buffer RAMs store data, freeing the to change from gross to fine move- ment. Thus. with single-hand opera-

computer for other tasks . Then, once ments. Finger movements across the tion. users change the resolution of the

RAMs are filled with X-Y data, it entire four inches of the TouchGraphic cursor movement. In this application.

quickly retrieves data when necessary panel may result in only four or five the presence detection switch and coun-

or upon request, thus providing opti- data input movements . In this way. ters not only detect finger presence but

mum utilization of the computer in very accurate and fine movements can also reformat the pulse count control.

applications like laser drilling , be made even if the finger is very shaky

Let's look at some general applica-

numeric-controlled systems, computer- on the panel.

tions. construction and advantages in

controlled medical instrumentation, etc.

Figure 3 shows how the designer can greater deta il. The TouchGraphic unit

Since each system and application is also use the presence switch detection replaces trackballs. joysticks. light

different. TouchGraphic provides flex- circuitry in TouchGraphic to provide an pens. twin knobs. pushbutton cursors

ibility in applying the X-Y data to the adjustable vernier. In this application. and other controlling devices . It pro-

system . In computer-controlled sys- TouchGraphic provides direct counts vides smooth. accurate. real-time X-Y tems. you need accurate timing data to of one on one. Or. it can provide 1/2. \4. control . In applications that involve

determine the relationship of the vari- 1/s .. . .on the X or Y axis. In this applica- computer graphics. freehand graphics.

ous signals. In this application.

TouchGraphic ·s panel frame sync

output provides this timing signal.

Figure 2 shows how the Touch-

Graphic panel can provide X-Y data

and serve as an on-off switch in appli-

cations such as laser beam drilling or E

beam systems. In the X-Y mode. the

operator draws the finger across the

panel to create the desired pattern or to

position the cursor. By tapping the

panel. he triggers the system to fire or

automatically change programs. TouchGraphic provides extra pulses
automatically. so the system can be programmed to detect number of panel

Timing Control Address Counter

Contro l Bus

taps or pul ses sent to indicate the

Int Bdg

changes which must be made. For example. in the laser drilling
application. it is easy to multiplex the X- Y to position laser number one. Then. by tapping the panel -say twice

Frame Syn Presence

Control Logic

OMA

- you can move on to position the second laser and so on. Or. the tapped input can be processed to move the system into a different mode of operation.

Seria l In

Shift

y Buffer RAM

This permits the operator to c hange from gross cursor movements to very fine cu rsor movements simply by tapping the .. light table . ··

Yup Ydow n

Decode &
Mux Logic

Up Down

Using the system· s clock. the

designer sets up the system to deter-

JL ' l.Y 198 1 Digital Design 109

Designers' Notebook

FINGER

MOVING LEFT

NOT

MOVING RIGHT

1. X oount output shown for left· right finger motion; Y count outputs similar for up-down

: nJL n XL~ ~

MOVING
~ ~-------------------

finger motion. Arbitrary terms

left-right, are for reference only .
2. Since a valid output pulse may
only occur when frame sync is

Q)
z0 xRi-h -t --------ILJLJl

high, there will be a minimum

of about 675 µs between one

output pulse and the next.

Since there are 15 sensors/

inch, internal logic and timing limits the maximum finger

velocity which may be sensed

at approximately 60" /sec.

3 . Presence output and frame sync output are both inter nally pulled up to V+, and should be connected to a high impedance input (CMOS 4045 or 4050) .

4. When a finger touches any-

where on the TouchGraphic

surface, there will be a low-

going pulse on the presence

output. Activated from a min-

imum of 45 µs for one sensor

to a maximum of "'630 µs for

14 sensors activated . If the

length of the TouchGraphic

surface covered is greater than

1", 15 or more sensors will be activated d isabling all count

2nd,,,,,,,, , 14th

output pulses (XL, XR, Yu ,

Y ol, until the number of
~ensors activated drops to 14
less.

__.

Note 4

,._7 µs

5. All count outputs (XL, XR,

YU· Y 0 ) are open collector and must be pulled up externally to user's log ic level (4 .7 kilohms to +5V suggested, VH

Y -C o u n t Pulse
Note 6
0

cannot exceed +15V).

_., 12µs ..___

6 . All x and Y count output

pulses will be "' 5µs wide, w ith Y up or down pulses going true "' 7µs after the leading edge of frame sync, and X left or right pulses going true "' 12 µs after the leading edge.

X -C o u n t Pulse
Note 6
0

n.______~,_______n_

_.1 1._ 5µs Typ

110 Digital Design JULY 1981

' ~ ~ I

XL XR
Yu Yo
Presence
Frame Sync

1
1
T

Motion Counter

__f

Reset

Logic
J

Presence Counter

One Shot

Timing Control

Toggle

Pus h
.._0 n
Pus h Off

Counter + Logic

drawing. tracing , digitizing and tracking, it is a far superior and more economical input device . It provides even greater capabilities and flexibility in many applications where previously only a simple positioner was justified. For example. it provides capabilities found individually in a trackball. joystick and light pen . It is a solid-state 2-D positioning and tracking device that produces X-Y positioning signals. as we said. when the finger is moved across its surface . It has no moving parts to break down or wear out. since moving a fingertip across the surface as though rolling an imaginary ball or small thumbwheel permits sensors embedded under the MicroProximity sensing surface to detect the presence. motion and direction of motion. For many applications it provides coarse and fine control of the X-Y movement. It can be wiped up to 60 ips for rapid slewing to a distant position or wiped one step at a time even in high resolution systems .
As the finger moves. proprietary sensing circuitry produces X-right. Xleft. Y-up and Y-down output signals on four lines. A fifth output line provides a .. presence.. signal. indicating fingertip presence on the surface even when stationary. The positioner digital output is TTL- and CMOS-compatible. so it interfaces to computers. µ.Ps or digital counters. The surface is compact and virtually indestructible . The

entire control mechanism is 4" x 4" x 1h". It is rugged and chemical resistant.
how does it work?
It is a YSL hybrid system operating on the proprietary high-speed MicroProximity .. capacitive" sensing principle . As the fingertip touches and glides across the sensing surface. capacitive coupling causes sequential activation of one or more of 3600 sensors on two axes simu ltaneously . This information is internally processed to produce an output pulse train. which then provides information on the number of incremental steps and the moving finger's direction.
It is constructed as a block-like multi-laminate of an insulated touch

surface. sensor array. circuit carrier board. mounting bezel and back panel. The sensor array and circuit board are connected inside the block . On the circuit board. active elements are wirebonded chips.
After fin al test. layers are permanently laminated and sealed to form a se lf-contained device. It handles high-G forces. wide temperature and climatic ranges. and abuse. Lifespan is several decades .
by the Engineering Staff
Engineering Staff. TASA , Inc.. 2346 Walsh Ave .. Santa Clara, CA 95051.

Finger Presence

YL t-----t XRt-----t 1/ 2, 1/4 ...

Pr ese nce Switch

Counter . - - - Selector

JULY 198 1 Digital Design 111

Fast, low cost printer.
This DC-4004A discharge printer prints 48 columns at 144 cps. Printing alphanumerics in 5 x 7 matrix format on 4.72" paper, its MTBF is 144 million characters. Just 2.6" H x 6.7" W x 5.9" D, it's only $127 in 100 quantity . Other printers with interface electronics available.
Call or write HYCOM , 16841 Armstrong Ave ., Irvine, CA 92714 - (714) 557-5252
H~com
Circle 66 on Reader Inquiry Card

Filling Up Fast
Space is filling up fast for our August '81 Computer Compatible Directory. See Sales Listing on page 92 if you haven't placed your ad yet.
Zendex designs and manufactures a complete line of MULTIBUS compatible boards and MOS compatible systems . · SBC CPU 8085A-2, 8088 · RAM 128K Dynamic · FDC ISIS-11 Compatible, RMX Compatible ·PROM Programmer2716, 2732,2732A · Disk Systems · Chassis ZX-660, ZX-655 · SBX-Modules Analog, IEEE.Digital · MOS Systems CP/M , ISIS-11 Compatible Zendex 6680 Sierra Lane, Dublin , CA 94566 (415) 829-1284
Circle 67 on Reader Inquiry Card

MODEL MAP-20S THERMAL PRINTER

.,.,.r

World's smallest complete 20 column alphanumeric panel mount printer. Has RS232C and 20 mA loop interface. is microprocessor controlled. has internal self test program and includes all drive circuits and AC power supply .
Weighs 4 .2 lbs and occupies 14. 8 sq. inches of panel space.
Price $725.00 each and in stock.

Write for color brochure to:

Memodyne Corporation 220 Re servoir Street
Needham Heights. MA 02194 (617) 444-7000

Circle 68 on Reader Inquiry Card

Input-Output
Have you got something to say and no place to say it?
Write us. your comments and suggestions are always welcome.

Able Computer .... . . . ......... . . ..... 53 Data-MATE ...... . . . . . . ............. 72 International Data Services .......... . . 106

ADAC ... .. ........... .. . .. .. . .....~ Data & Telecommunication Japan '82 ..... 91 Kennedy . . . . . . . . . . . . . . . . .. .. . . .. ..C-2

Advanced Electronics Design . . ...·.... .4 1 Dataram ... .......... . . . .. .. . . .......9

Alpha Data .............. .. .. .. ..... 104 Andromeda Systems .... . .. . .. .. . . . .. .. 32

DeAnza ..... .. .... . . ........... .....50 Dig i-Power ........ . . . . .. . .. . . .......65

Marway Products ........... . ... . ..... 15 Memodyne ... . .......... .. . ....... . 112

ATE January ' 82 . ..... ... .. . ..... .. . .48 Digital Communications Assoc ...... . . . .76 National Instruments

.. . .. . . .. .. .. 71

ATE June '82, Call for Papers .. . . .. . ....95 Distributed Logic (Dilog) .. . .. .......... 6 1 North Atl antic Industries .. . ............. 6

ATE Proceedings . . . . ...... . .. .. ......69
Beehive International . . .. . . . . . .... ... .. 35 Braegen .... . .. . ...... .. . . ......... .49

Dolch Logic Instruments .. . . . . . .......C-4 Dynabyte, Industrial
Control Products Div...... . . .. ......30

Pacific Digital Systems ........ . Plessey Periphera l Systems . .. . . .

. . . . 92 .. 5

Burroughs OEM Marketing . ... .. . ...... 75 Eaton . . . . . . . . . . . . . . . . . . . . . . . . . . .60 Rockwell International, Autonetics Div . . ..29

California Computer Systems .. .. .......39 Electronics Test &

Andrew Rubel & Associates . .

. . .92

Charles River Data Systems .. . .. . .. .... .27

Measurement Conference '81 . . . .86.87 Scherer's Mini Computer Mart

.... 33

Clary . . ........ . . . ........ .. .......52 Clifton Prec ision Div.,

Electro Design . . . . . . . . . . . .

. .. IOI

EST Div. , Leggett & Platt . . . ... ... .. . . 105

Selanar .. . ... . Sigma Sales . . . . . ....... .

.... 98 . ...21

,,.

Litton Industries . . . . .

. . .. .... 105 Exatron . . . . . . . . . . . . . . . . . .

. .. 107 Spatial Data Systems

. .. 70

Comdes ign . . . . . . . . . . . . . . . . . . . ..... 13 Factory Management Systems . . . . . 16. 17 Texas Instruments

Compal '8 1 Pre-registration Form .... .43,44 FOC "8 1 . . . . . . . . .

. ...90

(Semiconductor Group)

... .47

Compat "81 . . . . . . . . . .

. ..... 56,57 Forth . . . . . . . . . . . . . .. . . .. . .......25 Trope! Div ., Coherent

.. . .37

Compumart ... . . . .... . .... . ... . ...... 72

Compumation . . . . .

. .... 18

Com puterrn .. ......... . . . . .. .. ...... IOI

Grinne ll Systems . ..... . . . . . ... . . .... ..2 G.R . Electronics ..... .. ...... . . .. .. . . .33

Vector General .. . ........ . . . WESPERCORP Div.,

.103

Computer Design & Applications ....... 104 Handwe ll . . . . . . . . . . . . . . . . . . . . . . . 107

Western Periphera ls . . . . . . .

. ..7

Comtal. Sub. of 3M ..... .. . .. ......... 73 Controlled Power ........ .. .. . . ...... C-3 Corvus Systems . . . . . . . . . . . . . . . . ..... I

Data Electron ic Devices (Data Ed). Datafusion . . . . . . . . . . . . . . . . .

. .. 14 . ..4

Howard Johnson 's . . . . . . . . . . . . . . ... 102 Hycom ..... .. . .. ..... . . .... . ...... 112
Imperial Techno logy . . ......... . .... ..48 Information Products System .. . .. . ... . ..3 1 lnterdesign . . . ...... . . . . . ..... .. .... .59

Xycom . . . . . . . . . . . . . . . . . . .

. .99

Xylogics ..... .. .... . ..... ... . .. ... . .51

Zendex ........... . . . . . . .. . . . . ..... 112

112 Digital Design JULY 1981

Acrobat 11.0.13 Paper Capture Plug-in