198007 COIVIPUTER
.JULY18BO
DESIGN THE MAGAZINE OF
-. '
COMPUTER-BASED SYSTEMS
ARITHMETIC PROCESSOR CHIPS ENHANCE MICROPROCESSOR PERFORMANCE DATA DRIVEN SYSTEM FOR HIGH SPEED PARALLEL COMPUTING PART 2: HARDWARE DESIGN BIT MAP ARCHITECTURE REALIZES RASTER DISPLAY POTENTIAL
10 g
0 g 8
0
Introducing the Whizzard 7200 family of serial and parallel interactive graphics systems.
Included are two new highperformance color raster Whizzards so fast they can modify complex engineering displays at a remarkably high frame rate - speed that rivals the powerful refresh vector output Megatek is known for.
Choose from over 4,000 colors; 16 can be displayed at any given time.
We've doubled the size of our graphics microcode. New segment header formats. New command structures. New smart interrupts.
The result: More graphics power using less host computing power. Peripheral device electronics do most
of the work.You get faster updates. Better human response. More efficient memory usage and data transfers.
Teamed with RS-232C serial interfaces, Whizzard graphics power now moves squarely into the world of timesharing and distributed processing .
You can configure the Whizzard 7200 family to fit virtually any application simply by changing output circuits. Serial or parallel vector calligraphic. Serial or parallel raster. Or both simultaneously from one electronic chassis! All are driven by one common graphics software package Megatek's new WAND 7200.
You can add many " intelligent" microprocessor-controlled peripheral devices to boost system capability
All work independently
to free both the host computer and graphic processor for jobs t hey do best.
It's like taking distributed processing one more step .
Continuous real-time pan, zoom, 3-D hardware transformations, and other display capabilities are done in the terminal , not in the computer.
No wonder Megatek is fa st becoming the technological leader in high-quality, high-performance ref resh graphic systems.
For deta ils, call or write Megatek Corporation, 3931 Sorrento Valley Blvd., San Diego, CA 92121 . (714l 455-5590.
MEGATEK/WHIZZ.U D
COMPUTER GRAPHICS SYSTEMS
Data supplied by Control Data Corp See us at SIGGRAPH '80 in Seattle, July 15-17 1980, booths 440 and 540 CIRCLE 1 ON IN9UI RY CARD
Management Information Display
Ultrasonic heart sector scan
High-resolution display with alphanumerics
Get the professional color display that has
BASIC/FORTRAN simplicity
LOW-PRICED, TOO
Here's a color display that has everything: professional-level resolution, enormous color range, easy software, NTSC conformance, and low price.
Basically, this new Cromemco Model SDI* is a two-board interface that plugs into any Cromemco computer.
The SDI then maps computer display memory content onto a convenient color monitor to give high-quality, highresolution displays (756 H x 482 V pixels).
When we say the SDI results in a high-
quality professional display, we mean you can't get higher resolution than this system offers in an NTSC-conforming
display. The resolution surpasses that of a color
TV picture.
BASIC/FORTRAN programming
Besides its high resolution and low price, the new SDI lets you control with optional Cromemco software packages that use simple BASIC- and FORTRANlike commands.
Pick any of 16 colors (from a 4096-color palette) with instructions like DEFCLR (c, R, G, B). Or obtain a circle of specified size, location, and color with XCIRC (x, y, r, c).
·u.s. Pat. No. 4121283
Model SDI High-Resolution Color Graphics Interface
HIGH RESOLUTION
The SOi's high resolution gives a professional-quality display that strictly meets NTSC requirements. You get 756 pixels on every visible line of the NTSC standard display of 482 image lines. Vertical line spacing is 1 pixel.
To achieve the high-quality display, a separate output signal is produced for each of the three component colors (red, green, blue). This yields a sharper image than is possible using an NTSC-composite video signal and color TV set. Full image quality is readily realized with our highquality RGB Monitor or any conventional red/green/blue monitor common in TV work.
Model SDI plugs into Z·2H 11-megabyte hard disk computer or any Cromemco
computer
DISPLAY MEMORY
Along with the SDI we also offer an
optional fast and novel two-port memory
that gives independent high-speed access to the computer memory. The two-port memory stores one full display, permitting fast computer operation even during display.
CONTACT YOUR REP NOW
The Model SDI has been used in scientific work, engineering, business, TV, color graphics, and other areas. It's a good example of how Cromemco keeps computers in the field up to date, since it turns any Cromemco computer into an up-to-date color display computer.
The SDI has still more features that you should be informed about. So contact your Cromemco representative now and see all that the SDI will do for you.
C3 Cromemeo Incorporated 280 BERNARDO AVE., MOUNTAIN VIEW, CA 94040 · (415) 984-7400 Tomorrow's computers today
2
CIRCLE 3 ON IN'f'UlRY CARD
COMPUTER
DESIGN THE MAGAZINE OF COMPUTER-BASED SYSTEMS
VOLUME 19, NUMBER 7
JULY 1980
DEPARTMENTS
FEATURES
6 LETTERS TO THE EDITOR
10 CALENDAR
14 COMMUNICATION CHANNEL
This second and final part of the discussion of broadband coaxial local area networks discusses hardware available for Implementing these ver· satlle data links. Where multimode local area net· works are to be configured , broadband cable techniques deserve investigation
50 TECHNOLOGY REVIEW
Capable of running both 16· and 32-blt programs, superminicomputer offers 4.3G bytes of virtual memory and addresses user data spaces of 512M bytes each
66 DIGITAL CONTROL AND AUTOMATION SYSTEMS
A concentration of papers at IECI '80 related experiences In microcomputer control and monitor· Ing of energy production and distribution
134 MICRO DATA STACK/COMPUTERS, ELEMENTS, AND SYSTEMS
Unconditional Input/output technique provides least complicated arrangement for control of data transfer between a microcomputer and an 1/0 device
· 154 AROUND THE IC LOOP
Improved speed/power performance and In· creased function complexity of advanced Schottky TIL devices result from oxide sidewall isolation and ion implanted junction technologies
174 PRODUCTS
202 . LITERATURE
207 ADVERTISERS' INDEX
Reader Service Cards pages 209-212
Number of copies printed this issue-83,000.
ARITHMETIC PROCESSOR CHIPS ENHANCE MICROPROCESSOR SYSTEM PERFORMANCE 85 by B. K. Gupta Various techniques for interfacing different types of single-chip arithmetic processors to microcomputers involve cost, speed, and performance tradeoffs for increased throughput in scientific and engineering applications
DATA DRIVEN SYSTEM FOR HIGH SPEED PARALLEL COMPUTINGPART 2: HARDWARE DESIGN 97 by John Gurd and Ian Watson Conclusion of 2-part article builds on the data driven model of computation already developed to show how a prototype system based on this model exploits the potential of 2-dimensional data flowgraphs, combining parallel hardware with a mechanism for achieving the corresponding degree of parallelism in software
BIT MAP ARCHITECTURE REALIZES RASTER DISPLAY POTENTIAL 111 by Robert J. Gray Bit map architectures enhance the photographic quality, cinematic capability, and color spectrum of refreshed raster graphic displays, presenting designers with an opportunity and a challenge
BALANCING RAM ACCESS TIME AND CLOCK RATE MAXIMIZES MICROPROCESSOR THROUGHPUT 118 by Stan Groves Careful attention to the relationship between access time and clock rate guarantees optimal throughput in a microprocessor system by tuning system parameters to make best use of the memories and supporting logic
WBPA
Clrculation audited by Business Publications Audit
Copyright 1980, Computer Design Publishing Corp. (USPS 127-340)
3
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ttt~'~0-
-- · ...
~
1:
\!
The · shopper's answer
for DEC LSI
1c/o0mca·rdibs.le?J~~~~~ I~~ opticallycoupled pulse-input
channels
1604/POC 2-4 pulse output channels
When it comes to 1/0 functional cards for DEC LSl-11 microcomputers, ADAC has the biggest selection available.
1616CCI 16 discrete inputs, contact closure detect
1616/MIC 16 discrete inputs with priority encoder 1616/010 16 parallel outputs, optically isolated
ANALOG 1/0 1012 16 channels, high level inputs, 12 bit 1012EX 32-64 channel high level inputs,
mux expander 1014 16 channels, high level inputs, 14 bit 1023 16 channels, high level inpJJts, 12 bit,
LSl-11/23 interrupt compatible 1023EX 32-64 channel high level inputs,
1616/011
1620TTL
1616HCO 1632HCO 1632TTL 1664TTL
16 parallel inputs, optically isolated, can cause interrupt 16 latched inputs and outputs for DMA operation 16 discrete outputs, high current drive 32 discrete outputs, high current drive 32TIL1/0 lines 64m1/0 lines
LSl-11/23 interrupt compatible
BUS INTERFACE
1030 16-64 channels, high level inputs, 1620DMA Direct memory access controller
12 bit, 2 DACs
1900
Unibus to LSI-II translator
1112RL 8-16 differential low level and
1950
Bus repeater
thermocouple inputs, 12 bit
1900CT Cable terminator card
1112RX 8-16 differential low level a·nd thermocouple inputs, mux expander
1113 8, 16 differential low level and
Whatever your DEC system-Unibus, Qbus or Omnibus, write or call for full details on
thermocouple inputs, 12 bit,
the industry's widest line of compatible cards
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and complete system enclosures.
1113EX 8-16 differential low level and
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1412DA 1-4 DIA channels, voltage or current
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CLOCK CARDS 1601 GPT Programmable crystal clock/timer
SERIAL 1/0 CARDS 1750 Asynchronous line interface with
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CORPORATION
70 Tower Office Park· Woburn, MA 01801 (617) 935-6668
4
CIRCLE 4 ON INQUIRY CARD
STAFF
Publisher and Editorial Director Robert Brotherston Associate Publisher Anthony Saltalamacchia
Editor John A. Camuso Managing Editor Sydney F. Shapiro Technical Editor Shawn Spilman
Senior Editor Peg Killmon West Coast Editor Michael Chester Los Angeles, Calif. (213) 824-5438
Associate Editors James W . Hughes Gene Smarte
Copy Editors Winifred L. Gay Sue Paxman
Editorial Assistant Jun Smith
Editorial Advisory Board Brian W. Pollard Ralph J. Preiss
Rex Rice Production Manager
Linda M. Wright Production Assistant
Lou Ann Sawyer Advertising Coordinator
Maureen Sebastian Art Director James Flora Technical Art
Concepts Unlimited Circulation Manager
Alma Brotherston Marketing Manager Geoffrey Knight, Jr. Research Associate
Sidney Davis Controller
David C. Ciommo
Editorial & Executive Offices 11 Goldsmith St
Littleton, MA 01460 Tel. (617) 486-8944
(617) 646-7872
Editorial manuscripts should be addressed to Editor, Computer Design, 11 Goldsmith St., Littleton, MA 01460. For details on the preparation and submission of manuscripts, request a copy of the "Computer Design Author's Guide."
~ABP
Member American Business Press, Inc .
Computer Design® is published monthly . Copyright 1 980 by Computer Design Publishing Corporation. Controlled circulation postage paid at Tulsa, OK. No material may be reprint ed without permission. Postmaster: CHANGE OF ADDRESS - FORM 3579 to be sent to Computer Design, Circulation Dept ., P.O. Bo x A , Winchester, MA 01890. Subscription rate is $30 .00 in U.S.A ., Canada and Mexic o, and $50 .00 elsewhere . Microfilm copies of Computer Design are available and may be purchased from University Microfilms, a Xerox Company, 300 N . Zeeb Rd ., Ann Arbor , Ml 48106 .
® Computer Design is a registered trademark of Computer Design Publishing Corporation .
COMPUTER DESIGN/JULY 1980
IDCREDIBLE I EIGHT LSl·H UAD SLDTS ADD TWO T 5Bs In 7·· PWS FROM lOADIDG
- ·--
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Another industry first from Dataram: simple snap-off front panel. And when
The 804 chassis that lets you add
you use DEC's LSl-11 / 23 along with
TU58 capability to your LSI-I I®
Dataram's 256KB single-board
configuration without buying two DEC® bR-l 13S in the 804 chassis, there's
chassis (the 5W PDP ®-11 / 03 and 5W still a lot of 5.0VDC power remaining
TU58 subsystem). Now, with a single - 20 amps - to configure the rest of
7" 804 chassis, you can accomplish the your system.
same thing, saving space and money at the same time.
There's also a lot of innovative thinking in our 804 chassis - practical
The 804 saves time and trouble, too,
engineering that makes the LSI- I I Bus
with its unique front-loading feature
available on the A and B, and C and
that gives you fast , easy access to the D connectors; an Operator's Console
eight-quad-slot backplane through a
Unit that doesn't take up a valuable
backboard slot; and a trough that provides space for routing cables to the rear of the 804 chassis.
If you don't need TU58 capability, our 803 chassis provides these same features (less the TU 58s) in a 5Y4" alternative.
In addition to the 803 and 804 chassis, Dataram also provides LSl-11 / 2 and LS l-11 / 23 microcomputers; memory; cartridge disk, tape, and SMD controllers; and a wide range of accessories. Give us a call.
I TU58 I A
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DEC, LSI-I I, and PDP are registered trademarks of Digital Equipment Corporation.
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CONSOLE
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CATARAM
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Princeton Road Cranbury, New Jersey 08512 Tel: 609-799-0071 TWX: 5 I0-685-2542
CIRCLE 5 ON INQUIRY CARD
5
LETTERS TD THE EDITOR
To the Editor:
I just received the April 1980 issue of Computer Design at work today and find the article entitled "Interfacing Fundamentals: Conditional 1/0 Using a Semaphore," pp 166-167, by Peter R. Rony, to be in need of several comments and corrections.
First, the statement in the last sentence of the second paragraph is inconsistent with the prior discussion and Fig 1 and is incorrect. Indeed, if the operation were as described by the sentence, the system would have two infinite loops! The sentence should interchange the "sensed high" and "sensed low" conditions: "For example, as long as the semaphore is sensed low [high] by the source, no new data can be provided to the buffer; while the semaphore is sensed high [low] by the acceptor, this acceptor cannot acquire new data from the buffer."
Second, the sequence of operations for an input device given in the third paragraph and Fig 2 is certain to cause problems. In step 2, the semaphore is set high, indicating that data are available; then in step 3, the data are transferred to the buffer. The data are thus indicated as being available prior to their actual availability. Steps 2 and 3 should be interchanged. In an attempt to circumvent the problems, step 5 includes a time delay, but leaves this delay unspecified. The changed sequence of operations could be implemented in hardware by clocking the data buffer from STB X rather than
STB X.
Third, the discussion of Fig 3 and the figure itself are only obfuscated by the unnecessary inclusion of the complementary output of the semaphore; the article could be improved by its omission. Also, the setting of the semaphore to indicate data availability should be delayed slightly, relative to the transfer of the data · to the buffer, to allow for settling time of the buffer and deskew of the parallel word.
Last, the concept of setting and clearing a flipflop to control the transfer of data to a peripheral device is well known. For example, the basic concept of the subject of this article is discussed in Bartee, Lebow, and Reed, Theory and Design of Digital Machines, New York: McGraw-Hill, 1962, pp 220-222.
Robert H. French District Heights, Md
The Author Replies:
Robert H. French is correct when he suggests exchanging "low" and "high" in the last sentence of the second paragraph in order to make the text consistent with Figs 1, 2, and 3. The sequence of events shown in Fig 2-and thus the sequence of events in paragraph 2 and the flowchart in Fig I-were based upon the strobed input mode for the 8155/8156 and 8255 integrated circuits, as provided on pp 9-75 and 11-62, respectively, of the 1979 Intel Component Data Catalog. The strobed input timing could be implemented in the alternative manner suggested by French.
The sequence of events shown in Fig 3 was based upon the strobed output mode for the 8155/8156 and 8255 integrated circuits. For the DATA ACCEPTED state, the semaphore output from the 8155/8156 is a logic 1, whereas from the 8255 it is a logic 0. The two pin functions are listed as BF and OBF, respectively. Thus, the addition of the complementary output serves a useful purpose.
No claim of originality for the use of a flipflop to synchronize data transfers was made in the column. A systematic discussion of the differences between semaphores and flags, and between un-
conditional and conditional IIO, is appropriate in a column on interfacing fundamentals.
Peter R. Rony Virginia Polytechnic Institute Blacksburg, Va
To the Editor:
Your articles and ads on CRT terminals show that much more effort goes into the design of the electronic part of the keyboard than the keyboard itself. All of the designs that I have seen do not take the user into consideration. For instance, the carriage return is th e second most used key after the space bar and should therefore be a large target; yet it is usually small and placed next to "disaster" keys. A suggested target would be two keys high and two keys wide. This would eliminate the error message (ie, TER-
M IN AL ERROR , REENTER INP UT) .
Another problem is that "critical" keys are next to each other, causing the computer to "go bananas" whenever two keys are hit together. The solution is simple: put noncritical keys next to critical keys.
It seems to me that keyboard designers could do some " HUMAN" engineering to improve their product.
Urban Ludwig Goddard Space Flight Center Greenbelt, Md
Letters to the Editor should be addressed:
Editor, Computer Design 11 Goldsmith St
Littleton, MA 01460
6
COMPUTER DESIGN/J ULY 1980
8-11,01
TM.......
~·?,Q'
~
Q
0·3,CK
L..l.:.±...J
di~~
viathe~MdJ
...lHliile mdustry standards DUMIPIJXJ~ tion brings you a
tA-SCXh A:. logic analyzer matched
like sequences m beth Workirig&nd re~~ Introduce the glitches plaguing your systertt to their
fixer. You'll enjoy efficient system debugging at a price well
c:oet and caPabilitv to the needs of microprocessor
below what you'd expect to pay. For more information
system designers. The l..A-5000 is ideal for data domain and timing
analysis with clock rates from 12.5 MHz with 16 recording
channels, to 50 MHz with 4 channels. Three display
modes give you: data domain information in binary, octal
ct · on the LA-5000, or any ofGould's
full line oflogic analyzers, write:
~~
Gould Instrument Division,
Santa Clara Operations, 4600 Old Ironsides Drive,
~~I' ~tff~
or hexadecimal; timing diagrams; even a graphic plot
Santa Clara, CA 95050.
;f~;;;~ ofsuccessive word values. Three full screen interactive menus-Acquisition, Format, and Special Function - make set-up fast and simple. There are also partial menus of frequently needed
'-~\ ,~.
~
parameters as part of the display modes.
Convenience features? The LA-5000 features two
CIRCLE 6 ON INCj)UIRY CARD
S6800 S68AOO S68BOO S68HOO S6801 * S6801E* S6802
S6803* 56805 S6808
S6809 S6809E*
1.0 MHz MPU l.S MHz MPU 2.0 MHz MPU 2.5 MHz MPU
Single Chip MCU with Clock Single Chip MCU with External Clock MPU with on-board Oock and RAM
Single Chip MCU without RAM and/or ROM Low Cost Single Chip MCU MPU with on-board Clock Enhanced MPV/on-board Clock Enhanced MPV/External Clock Input
PERIPJIERAI.S
S1602/S8868 UART
S2350
USRT
S6821 } S68A21 S68B21 S68H21
Periiiheral Interface Adapter {PIA) High Speed PIA
S56688A4040 }
S68B40 S68045 S68047 568488
Programmable Ttmer Module {PIM)
CRT Controller Video Display Generator {\IDG) IEEE 488 Bus Adapter
S6850 } S68A50 S68B50
ACIA
56852 } S68A52 S68B52
Synchronous Serial Data Adapter
SS6688A5454 } S68B54 56894
Advanced Data Link Controller Data Encryption Unit
MEMORIES
128 x 8 Static RAM
16K Static ROM 32K Static ROM 4KEPROM 64K Static ROM 16K ROM with on-board 1/0 and Tuner
*Consult factory for availability
AMI
CALENDAR
SEMINARS
CONFERENCES
AUG 12-15-1980 Joint Automatic Control Conf, Sheraton-Palace Hotel, Son Francisco, Calif. INFORMATION: David Hullender, Dept of Mechanical Engineering, U of Texas at Arlington, Arlington , TX 76019. Tel: 817/273-2561
AUG 18-21-Nat'I Conf on Artificial In· telligence, Stanford U, Stanford, Calif. INFORMATION : American Assoc for Artificial Intelligence, Stanford U, PO Box 3036, Stanford, CA 94305
AUG 19-NECOM Show (New England Computer Show). Marriott Hotel, Newton, Moss. INFORMATION: Norm De Nardi, Norm De Nardi Enterprises, 95 Main St, Los Altos, CA 94022. Tel: 415/941-8440
AUG 26-29-1980 lnternat'I Conf on Parallel Processing, Boyne Highlands Convention Ctr, near Harbor Springs, Mich. INFORMATION: Koy Garringer, Dept of Computer Science, Wright State U, Dayton , OH 45435 . Tel: 513/873-2491
SEPT 3-12-1980 lnternot'I Machine Tool Show , McCormick Place, Chicago, 111 . INFORMATION: Notional Machine Tool Builders' Assoc, 7901 Westpark Dr , Mclean , VA 22102 . Tel: 703/893-2900
SEPT 16-18-FOC '80 (lnternat'I Fiber Optics and Communications Exposition), Hyatt Regency Embarcadero, Son Francisco, Calif. INFORMATION: Michael A . O'Bryant, Information Gatekeepers, Inc, 167 Corey Rd, Suite 111, Brookline, MA 02146. Tel: 617/739-2022
SEPT 16-18-WESCON, Anaheim Conven tion Ctr, Anaheim, Calif. INFORMATION: Dole Litherland, Electronic Conventions. Inc , 999 N Sepulveda Blvd, El Segundo, CA 90245. Tel: 213/772-2965
SEPT 22-25-Software INFO (National Software Package Conf and Exposition), Hyatt Regency, Chicago, 111. INFORMATION : Professional Exposition Management Co, Suite 545, 222 W Adams St, Chicago, IL 60606. Tel: 312/263-3131
SEPT 23-25-COMPCON Fall '80, Capital Hilton, Washington, DC. INFORMATION: Harry Hoyman, COMPCON 80 Fall, PO Box 639, Silver Spring, MD 20901. Tel: 301 1439-7007
10
OCT 1-3-Fault Tolerant Computing Systems, Kyoto, Japan. INFORMATION: Prof John Meyer, Dept Elec and Computer Engineering, U of Michigan, Ann Arbor, Ml 48109. Tel : 313/763-0037
OCT 1-3-lnternat'I Conf on Circuits and Computers for Large Scale Systems, The Rye Town Hilton Inn, Port Chester, NY. INFORMATION: Dr NB Guy Robbot, 32 Tor Rd, Wappingers Falls, NY 12590. Tel: 914/897-8126
OCT 6-9 AND OCT 14-17-8th World Computer Congress, Tokyo, Japan, and Melbourne, Australia . INFORMATION: AFIPS, 1815 N Lynn St, Suite 800, Arlington, VA 22209. Tel: 703/243-4100
OCT 8-9-Connector Symposium, Benjamin Franklin Hotel, Philadelphia, Po . INFORMATION: Jim Pletcher, Electronic Connector Study Group, Inc, PO Box 167, Fort Washington, PA 19034. Tel: 717/780-8857
OCT 13-15-Symposium on the Foundations of Computer Science, Sheraton Inn, Syracuse, NY. INFORMATION: Prof Ronald V. Book, Dept of Moth and Comp Science, U of California, Santa Barbaro, CA 93106. Tel: 805/961-2778, 2171
OCT 14-16-Mini/ Micro Computer Cont and Exposition, Civic Auditorium, Son Francisco, Calif. INFORMATION: Robert D. Rankin, Mini/Micro Conference and Exposition, 32302 Camino Capistrano, Suite 202, Son Juan Capistrano, CA 92675. Tel: 714/661-3301
OCT 27-30-ICCC '80 (lnternat'I Conf on Computer Communication), Peachtree Plaza Hotel , Atlanta, Go. INFORMATION: ICCC '80 Executive Committee, PO Box 280, Basking Ridge , NJ 07920. Tel: 201 /22 1-8800
OCT 28-30-lnterface West, Los Angeles Convention Ctr, Los Angeles, Calif. INFORMATION: Peter B. Young, The Interface Group, 160 Speen St, Framingham , MA 01701. Tel: 6l 7/879-4502
NOV 6-12-Electronica '80, Munich Fairgrounds, Munich, West Germany. INFORMATION: Franc D. Manzolillo, Rm 6015, U.S . DeptofCommerce, Washington, DC 20230 . Tel: 202/377-2991
AUG 3-5-Realtime Software for Micro/Minicomputer Systems AND AUG 6-8-Microcomputer Architecture Interfaces, Testing, Reliability, and System Design, Hyatt Regency O'Hare, Chicago, Ill. INFORMATION: National Engineering Consortium, Inc, 1211 W 22nd St, Oak Brook, IL 60521 . Tel: 312/325-5700
AUG 4-6 AND SEPT 16-18-Charge· Coupled Devices, Copley Plaza Hotel, Boston, Mass, and Sheraton Palace Hotel , San Francisco , Calif. INFORMATION: Leonard H. Klein, Palisades Institute, 201 Varick St, 9th Floor, New York, NY 10014 . Tel: 212/620-3377
AUG 14, 19, and 21; SEPT 9, 11, and 16; AND OCT 14-lnformation Resource Management, various U.S . cities. INFORMATION : Market Information Office, Intel Commercial Systems Di v, 12675 Research Blvd , PO Box 9968, Austin , TX 78766. Tel: 512/258-5171
SEPT 18-19-Distributed Processing and Multiprocessing: Components and Applications; SEPT 29-30-Data Communications; AND SEPT 29-30-Micro· processors: Hardware, Software, and Applications, Worcester Polytechnic In stitute, Worcester, Mass, Worcester Polytechnic Institute, Worcester , Mass, and Sheraton Tora, Framingham, Moss . INFORMATION: Ginny Bozorian, Office of Continuing Professional Education, Worcester Polytechnic Institute, Worcester, MA 01609 . Tel: 617/753-1411, X517
I I SHORT COURSES
SEPT 3-5-Logic and Microprocessor System Design, The University of Liverpool Computer Laboratory, Liverpool, England. INFORMATION: The Secretary, Computer Laboratory, PO Box 147, Liverpool U, Liverpool L69 3BX, England
NOTICE
The Electronic Business Communications Conference and Exhibition previously scheduled for Sept 3-5 hos been postponed until 1981. For details, contact John Sodolski, Electronic Industries Association, 2001 Eye St, NW, Washington, DC 20006. Tel: 2021457-4934
COMPUTER DESIGN/JULY 1980
THEDSD440. TOTAL DEC®RX02 COMPATIBILITY,
AND MORE.
The DSD 440 is the only alternative to the DEC RX02 that's 100% software, hardware and media compatible with LSl-11, PDP®-11 and PDP-8 computers , including those with extended memory. It can be configured as an RX02 for DEC double density or IBM 3740 single density recording , or as an RX01 for backward operating system compatibility.
MORE
A 512-byte hardware bootstrap is built into all PDP-11 and LSl-11 interfaces. It loads system software automatically from either single or double density diskettes. Extensive self-testing is DIP-switch selectable with the "Hyperdiagnostics" that run without being connected to a computer. The low profile 5%-inch DSD 440 features write protection and diskette formatting.
FASTER
The optimized DSD 440 microcode increases system throughput when using the RT-11 foreground/background monitor. In particular, the DSD 440 with an LSl-11 runs fill and empty buffer operations 20% faster than an RX02.
FOR LESS
The DSD 440 is the RX02 compatible flexible disk system that combines high performance and advanced f~a tures with fast delivery. .. at a lower price. For further information , call or write Data Systems Design today. A data sheet and price list will be forwarded to you immediately.
® Trademark o f Digital Equipment Corporation
EASTERN REGION SALES Data Systems Design , Inc.
51 Morgan Drive, Norwood , MA 02026 Tel : (617) 769-7620 TWX: 710-336-0120
WESTERN REGION SALES Data Systems Design, Inc.
2560 Mission College Blvd ., Suite 108 Santa Clara, CA 95051 Tel: (408) 727-3163
CORPORATE HEADQUARTERS: Data Systems Design , 3130 Coronado Drive, Santa Clara, CA 95051 Tel : (408) 727-9353 TWX: 910-338-0249
CIRCLE 8 ON INQUIRY CARD
AMONOLITHIC 4·DIGIT
THAT
.
.
R. EPLA. CES
UP
THE ICM 7217/27
Direct drive for up to 1" LED's
DIGITS
COMMON-ANODE LED DISPLAY
30pF ~~~i~~LHz
Rs < ?Sn
1 EQUAL TO LOGIC GENERATING
ZERO
SIGNALS FOR CONTROL OF
EXTERNAL EQUIPMENT
1 CARRY ZERO
EQUAL
v+
7BCD
~ 1/ 0
V + "EL'"A"P"S""E"D, , . . . . - - - - O
V COUNTDOWN
SW2 - - o - - - - UP / DOWN
O
LOAD REG.
V + LOAD SET PT. V- DISPLAY OFF
....-------1... LOAD CTR.
SCAN RESET
PRESET V+
v RESET
sw4 -1sws - L
PRECISION ELAPSED TIMER OR COUNTDOWN TIMER
ANOTHER FIRST FROM INTERSIL The ICM 7217/27 is the first family of 4-digit up/down counters that will directly drive large multiplexed LED displays. Common-anode or common-cathode. The common-anode devices typically drive 200 mA per digit, 40 mA per segment peak, for bright displays. Or for lower power and display cost, go common-cathode and use a calculator-type display. Either way, no external drivers or resistors are needed.
FEATURES · On-chip direct drive to multiplexed
7-segment LED displays. ·Four-digit presettable up/down counter. · Presettable register continuously compared to
the counter. ·BCD input/output port, carry/borrow, zero,
and equal outputs drive TTL directly. · Leading Zero Blanking and Display Blank
control.provided.
UP/DOWN COUNTER TO 20TTL PACKAGES
· Low power standby mode -300 µA typical with display off.
· Cascadable: 8, 12 or more digits in blocks of four.
·Counting speed: Guaranteed 0 to 2 MHz, typically 5 MHz.
·Single TTL-compatible 5V ± 10% supply.
TIME OR UNITS The ICM 7217/27 offers a decade count to 9999 or timing count of 5959. Time events. Count events or frequency. Set limits on the time or count. Cascade for more digits. Count can be continuously displayed, or display may be frozen while continuing to count. And, a Schmitt trigger on the count input allows accurate counting-even in noisy environments.
µ,P BASED OR HARDWIRED The ICM 7217's are designed for hardwired, user-programmable applications, using thumbwheel switches for loading data and simple SPDT switches for chip control. The ICM 7227's are designed to interface to micro· processors where data input, output and chip control are directed by the processor.
TRUE VERSATILITY We think the ICM 7217/27 will become the industry standard in applications such as: machine tool controllers, tachometers, hourmeters, limit set timers, speedometers, instrumentation, film projectors, µ,P controlled man/machine interfaces -in short, virtually anywhere versatile programmable up/down counting or timing must be displayed.
LEADERSHIP IN CMOS The ICM 7217/27 is the latest in Intersil's series of MAXCMOS'" LSI devices incorporating direct drive for panel meter size LED displays. And, they offer levels of versatility and integration which can dramatically cut
system costs. For example, the ICM 7217CIPI is only $6.10 in lots of 100.
THE TIME IS NOW.
For full information on the most versatile
up/down counter/display drivers on the
market, call your nearest Intersil Sales Office,
Franchised Distributor, or return the coupon
below.
MAX C MOS '"" 1s a trademark of Im ersil In c.
INTERSIL SALES OFFICES:
CALIFORNIA: Sunnyvale (408 ) 744-0618, Long Beach (213) 436-9261 ·COLORADO: Aurora (303) 750-7004 ·FLORIDA: Hollywood (305) 920-2442 ·ILLINOIS: Hinsdale (312) 986-5303 ·MASSACHUSETTS: Lexington (617) 861-6220 ·MINNESOTA : Minneapolis (612 ) 925-1844 · NEW JERSEY: Englewood Cliffs (2 01) 567-5585 ·OHIO: Miamisburg (513 ) 866-7328 ·TEXAS: Dallas (214) 387-0539 ·CANADA : Brampton, Ontario (416) 457-1014
INTERSIL FRANCHISED DISTRIBUTORS:
Advent (IND, IA) · Alliance · Anthem · Arrow · Bell Industries · Cardinal · CESCO · Component Specialties · Components Plus · Diplomat (FLA, MD, NJ, UT) · Harvey (upstate NY) · Kierulff · LCOMP · Panda · Parrott · R.A.E. Ind. Elect. Ltd. · RESCO/ Raleigh · Schweber · Summitt · Western Microtechnology Sales · Wyle · Zentronics Ltd.
r------~-------------------------
D
Analog Products-Low Power 10710 No. Tantau Ave., Cupertino, CA 95014 Tel: (408 ) 996-5000 TWX: 910-338-0171 (800) 538-7930 (outside California)
I'm counting on you. _ _ Send me complete information on the
ICM 7217/27 up/down counter/timer __ Send me your Mark Twain poster
Company _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ Address _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _. City - - - - - - - - - State_ _ __
COMMUNICATION CHANNEL
BROADBAND COAXIAL LOCAL AREA NETWORKSPART 2: HARDWARE
Mark A. Dineson
Sytek, Inc, Northwest Engineering Laboratory
13333 NE Bellevue-Redmond Rd, Bellevue, WA 98005
Broadband media concepts are implemented primarily with off the shelf CATV hardware. Low cost signal splitters and taps achieve branching of cables, and commercial repeaters (line amplifiers) ensure adequate signal levels throughout the system. Mean time between failures for these devices has been established at 400k hours or better in large installations. Fully redundant repeaters are also available, and status monitoring equipment for these units has recently been introduced. All equipment is mass produced and highly reliable, thanks to the CATV industry.
Ease of maintenance is an attribute of the cable used in broadband coaxial networks. Should a cable be snapped, crushed, or otherwise seriously damaged, the entire service can be restored by the addition of one splice connector. In inany cases, repair time is less than an hour, depending on the available technical control facilities.
In general, broadband network topology is not impacted heavily by the services provided in a single cable system. Conventional star, tree, and multiple hub topologies may be implemented, and the complexity of a broadband system topology can range from the very simple to the tremendously convoluted. However, the system can very often be im-
14
plemented using only one cable. Unless specifically prohibited by analog gateway devices, all signals in a frequency division multiplex (FDM) system appear at each and every outlet. The simplest "gateway" device may be an analog filter, designed to channel portions of the spectrum to specific network areas.
Broadband-· designs encourage creativity and allow it to be realized to the greatest extent. Modems are available in many types and performance ranges for broadband systems. Basic units operate with RS-232 interfaces up to 9600 bits/s asynchronously, and may occupy from 100 to 400 kHz of spectrum. Synchronous modems are available in data rate ranges to 19.2k, 56k, and 512k bits/s.
Modems in the megabit range are available by special arrangement; their specifications depend on considerations of class of service, interface, and bandwidth. All units exhibit low error rates, ranging from IO- 8 to IO- 11 , depending on the type and size of the network.
Packet communications units (PCUs) are currently nearing commercial availability. They are the intelligent modems required to support broadcast-type packet networks with backbone rates to 3M bits/s/channel. With reference to the
COMPUTER DESIGN/JULY 1980
Is xour data scrambled?
We can flx it sun11:x-side uru
A t Oynatech we know how to prepare network software and operating procedures. The result is
f i management systems. Our management and sunny-side up data - just as you like it.
control architecture unscrambles your hardware,
Our basic ingredients are:
· Switching and patching interface management and real time monitoring
· Oyna-Test@ simulation, diagnostic and data recording equipment
·Network management and control systems design · Remote control and channel access systems · Hardware and line substitution
Give us a call for the recipe.
~~~~~
Telephone: 703-569-9000 7644 Dynatech Court Springfield, VA 22153
Diagnostic instruments available for rent or lease from United States Instrument Rentals, Inc. Available on GSA Schedule
A DYNATECH COMPANY
@oyna-Test is a trademark of Dynatech Data Systems.
CIRCLE 10 ON INCj)UIRY CARD
15
Commitment. It's one of those over-used words in danger of l()sing all meaning. Not so for system houses and computer system manufacturers . To yrn~, commitment is the differ~nce between a supplier who leaves you in the lurch. And one who doesn't. At Century Data, we understand that our success depends entirely on your success. And that broken shipment promises can mean a lot more to you than delayed drives. Clearly we're in this together. You'll see that attitude reflected in everything we do. Take our products. No one offers a broader selection of rotating disk drives. Our Trident has earned a reputation as the industry's most reliable removablepack drive, in capacities from 25 to 600 MB. Marksman is making a hit as the Winchester with built-in intelligence. It gets you to market quickly, without time wasted on controller development. It's available now - hard-tooled - in 10, 20 and 40 MB capacities, with or without built-in controller. Hunter is gaining attention as the superior splitpack cartridge drive, combining 16 MB removable and up to 80 MB fixed. And the same reliability and maintainability proven in thousands of Tridents. We've made the commitment to pump new life into Diablo cartridge drives.We couldn't be more delighted with Xerox's assignment to us of Diablo drive marketing.You can count on us as an eager, dependable source of supply. The future looks even brighter as we listen to you. And the results are starting to show. The need for lower costs per megabyte led to development of this 600 MB Trident. Priorities have been made out of your need for more self-diagnostics and built-in intelligence. An intelligent Hunter is on the way. And more capacity for the Marksman. Unlike few other disk drive manufacturers, we are able to draw on the resources of Xerox research to keep us - and you - on the leading edge of storage technologies as they develop. Customers come to us for our products, then come back because we perform. With service. Support. Dependable delivery. And extra effort. What it comes down to is this: Commitment may be just a word.We expect you to judge us on our actions. Then see if you can find a better word to describe our approach to this business. Call or write Century Data Systems, A Xerox Company, 1270 North Kraemer Blvd., Anaheim, CA 92806. (714) 632-7500.
~ Century Data Sy~!~
C IRCLE 11 ON IN9UIRY CARD
service types listed in the Table "Broadband Data Devices," the characteristics of rf modems may be further analyzed.
Fixed Frequency Modems
These are the oldest and most prevalent types currently available. They are normally crystal controlled, and are ' characterized by rate/bandwidth figure, data rate, interface, and operation. Generally, these modems have an almost linear cost/bandwidth curve based on efficiency. A synchronous modem capable of 19.2k bits/sand occupying 100 kHz of spectrum space may cost only $700. At this same data rate, one occupying 15 kHz of spectrum may be priced at $3000. Modulation method and filters account for the cost difference.
Fixed frequency modems are crystal controlled for several reasons. Phase modulation techniques usually used to encode data require low phase noise with high stability in the local oscillator in order to achieve low bit error rates. Because of the simplicity of crystal control, the cost of these modems is generally low, and the crystal approach is prevalent for this type of modem. Furthermore, the broadband medium requires the modem to maintain its relative frequency position. Any appreciable frequency drift in a modem would cause degradation in an adjoining channel.
Crystal controlled modems are characterized by several production difficulties. These include individual adjustment requirements, and the need to stock literally hundreds of different crystals. They also require readily available repair facilities in order to reduce the need for stocking spare modems of many different frequencies.
The modulation technique generally used in crystal controlled modems allows rather simple modulation at rates up
to several megabits per second. Reception of the biphase or quadriphase modulated signals contributes most to the modem cost. Interfaces currently available for these modems include RS-232-C for asynchronous and synchronous units to 48k bits/s, CCITT V.35 for synchronous modems from 56k to 1.SM bits/s, and special interfaces for the higher rates.
Synchronous modems will operate in multipoint environments, allowing the system to support polled bisynchronous applications. They are also capable of switched carrier operation. In the case of high speed units, most provide either polled or contention operation, and easily accommodate packets and file shipping.
Frequency Agile Modems
These are synthesized carrier types, and use modulation techniques compatible with synthesis. Their speed and application determine the number of carrier channels such modems provide. At low and medium speeds, up to 56k bits/s, these units may offer as many as 240 channels. Switches or computer control accomplish channel selection.
Agile modems offer two primary advantages over their fixed frequency counterparts. First, there is a minimal requirement for sparing; only a few units will achieve full sparing capacity. Second, allowing intelligent equipment to assign links by frequency opens up a whole new area of networking capability.
Interfaces available for agile modems include RS-232-C, V.35, and TTL (direct logic). Synchronous links are accommodated by internal clock only, and computer control of channels is parallel TTL-compatible. Since agile modems are a bit more expensive than fixed frequency types, their use demands a more critical analysis of system requirements, especially in the light of cost effectiveness.
(continued on page 22)
Broadband Data Devlcee
Device Modem, rt Modem, rt Modem, rt Modem, rt
Modem, rt Modem, rt
PCU
PCU
Prima!l'. Aeencation Point to point Multipoint Multipoint Point to point, Multipoint Point to point Multipoint Point to point, Virtual circuit
Point to point
Mode Asynchronous Synchronous Synchronous Synchronous
Asynchronous Synchronous Synchronous,
Burst, Contention Synchronous,
Burst, Contention
Frequency Fixed Fixed Fixed Fixed
Agile Agile Fixed
Agile
Data Rate, Bits/s 110-19.2k 300-19.2k 56k-512k 512k-6M
100-9600 300-56k 307k-1M 1200 at user Interface To 9.6k at user Interface
Interface EIA, Bell EIA, Bell TTL,EIA, Bell TTL,EIA, Bell
EIA EIA, CCITT EIA, Parallel
EIA
Protocol n/a n/a n/a n/a
n/a n/a HDLC variant CSMAICD Custom
Ae can be eeen, current modem· and PCU devlcee allow terminal devlcee, minicomputers, microcomputers, and hoets to utilize the broadband medium to accommodate the data ratee and aervlcee they require. Standard lnterfacH are offered In many units, as well as special bandwidth/data densities
needed for lncreaeed cable capacity. There are devices avalleble to suit moat data requirements In broadband applications. New products will Increase to an even greeter extent the capabllltlea offered by thle medium
18
COMPUTER DESIGN/JULY 1980
1111111111111111111111111111111111111
Introducing
VANGUARD I.
Simple. Reliable. Economical.
To create better back up storage for the office systems of tomorrow, we rethought the role of the cartridge disk drive.
We wanted a totally new cartridge drive that would satisfy systems requirements for backup store and audit trails.
That would meet the needs for working and archival storage in small business systems .
That would offer the compactness needed for desk-mounted peripherals.
That would provide a high speed single storage system at a price that would give systems designers something to think about.
The result was the cartridge drive for the systems of the 80's-VANGUARD I.
We built VANGUARD I 24 inches deep for in-desk or rack mounting. We gave it a capacity of up to 20 megabytes and a standard cartridge disk interface for industrywide compatibility.
To make VANGUARD I easy to maintain and service, we built it in simple modules. That makes maintenance a matter of·minutes instead of hours. (VANGUARD I can be broken down into subassemblies in less than seven minutes, reassembled quickly with minimum tools.)
And to reduce the need for maintenance we gave it an air moving system designed for maximum cleanliness and minimum temperature rise in the media chamber.
VANGUARD I is everything we think a cartridge disk drive should be. Simple. Reliable. Fast. Universally compatible.
Call or write today for a preview look. And let us know what you think about our rethinking . Perkin-Elmer, Memory Products Division, 7301 Orangewood Avenue , Garden Grove, CA 92641 . Call toll free 800-631-2154. In California, call (714) 891-3711.
CIRCLE 12 ON INQUIRY CARD
P ERKIN- ELMER
American eagle-The eagle narrow-
ly defeated the turkey as America's
national symbol. Although fa~ to
t ccaarnrnyotoflfiftchmilodrreentahn~d Qla~(9Jeligehst
pounds. Com r. 1f~> ederal pro-
tection di '
ntil 1952, after the
spe
eatened by egg collec-
tors, ers and sterilization by DDT.
Slide Rule-An analog calculator
.fri based on the logarithm. Develo! in
1630 and perfected by a
my
officer in 1850. Usi!d:~"·) ivide,
~r calculate squar
.~quare roots,
trig ii!un afte
cti~~~~ofuatlhlyediniseaxpppeenasrievde
elec ·c calculator.
Whale-Huge mammals which re-
versed evolutionary trend by returning
to the sea 60 million years ago . Once
proliferating in all the oceans of the
world, whales were reducei!to000
animals before controwSls
ed .
Valued for their oil,~
e first
hunted in the 1~~
y Basques
standing A 1'1.:!\llfe. Today they are
cau~·~essed entirely at sea by
hug1f!Oe1ing factory ships.
lgnltron-A type of mer~rec
tifier with only one a~o(l)1
ped in
early 1950s. Ar~~~ each cycle
by an ignK_~pnrito a pool of mer-
cur¥l-f~P~de). Frequently broke do~~gher voltages.
Leyden Jar-A crude capacitor de-
veloped at the University of Leyden in
1742. Although important in th~~vel opment of electronic theo~~~den Jar is considered cu~~"dnd inefficient by mQJit~faitiaards. Currently us~"""~liboratory demonstra~1'1\.91:'raced by the modern cap9..,~n all its forms.
American buffalo (blson)-Related
to the domestic cow. Males often top six
feet at the shoulder and weigh ~000
pounds. Once a primary s~°\>od
into~41" and hides for the Amer'
, they
·
were white
hmuannte. d~t1l~l~o
ion by the million buf-
falo i~..a\,)cmry 250 in 1900. Today
20· ·~Jrve in parks.
The lo\V-density bipolar PROM \Viii never becotne an endangered species.
Low-density bipolar PROM-First developed by MMI in 1971. Proliferated in a variety of commercial and military digital applications'. Small species currently includet:i 25,6-bit, 1Kand2K sizes, closely related to the denser 4K ~nd 8Kbit variety. 16K and even greater density types are now in evolution . The lowdensity bipolar PROM, rumored to be endangered ifl 1979, will continue to flourish at MM I.
MMI is committed to producing bipolar PROMs from 256 bits up, in volume, as long as you need them.
You may have heard rumors you'll be forced to specify only 4K-or-denser bipolar PROMs, because low-density PROMs won't be available much longer.
Don't believe it.
MMI makes PROMs from 256 to 8K bits now, and we'll continue to make them in the future .That's a commitment that means something, coming from the company that ships more bipolar PROMs than anyone else in the world.
Our PROM product line is alive and well.
MMI's leadership in bipolar technology is clear. We introduced the IK bipolar PROM in 1971, and the world's first 2K, 4K and 8K bipolar PROMs shortly thereafter. Now we have a 16K bipolar PROM in development. But even though we will continue to develop denser and faster versions, we'll never lose sight of the low-density PROM . In fact, watch for MMl's announcement of a new family of faster IK
and 2K PROMs to complement our current line. These new PROMs will have access times ranging from 45 ns to 60 ns and a power consumption range of 65 mA to 130 mA.
Find out why our commitment to bipolar is important to you. Discover how the PROM and other bipolar products are flourishing at MMI. Ask your nearest MMI rep or distributor for our new, comprehensive LSI Data Book.You'll find the answers to your detailed questions about MMI's bipolar memory and logic.
Monolithic Memories, Inc. 1165 E. Arques Ave., Sunnyvale, California 94086.
ltllonolithia ~~n
ltllemories UlJn.U
CIRCLE 13 ON IN9UIRY CARD
21
UPSTREAM BANDWIDTH
(MHz) 110~
SPARE CAPACITY
DOWNSTREAM
BANDWIDTH (MHz)
----:J,: 166.15
59.75
} 1M-BIT/s PCU NETWORK
116
53.75
}1M-BITIS PCU NETWORK
110
47.75
104
} SPARE
41.75
} 4 SYNCHRONOUS
198
FULL·DUPHX FILE SHIPPING
CHANNELS AT 511k BITS/s
35.75
191
} 18 ASYNCHRONOUS FULL-DUPLEX DATA
MIRROR IMAGE
19.75
CHANNELS AT 9.6k BITS/s
TRANSIATION
186
120 SYNCHRONOUS FULL-DUPLEX DATA CHANNELS AT 56k BITS/s
5.75 TO TRANSIATOR
161 FROM TRANSIATOR
Basic channel allocation. Properly designed broadband system offers tremendous traffic capacity. Using selected products and technologies, large terminal distribution systems may be accommodated, as well as host and subsystem·links. "Stacking" of channels by bandwidth occupancy resembles microwave and satellite practice, in that maximum use is made of available m'edia bandwidth, where poss·ible, by frequency divisi<?n multiplexing
Packet Communication Units
PCUs are actually intelligent interfaces to a packet backbone channel. They receive data from a user or host device in · synchronous or asynchronous mode, format them into packets, and broadcast the data at a high rate onto the coaxial backbone. Distributed control of the shared backbone medium permits support of thousands of bursty terminal subscribers.
The PCU is a fixed frequency intelligent device. It accepts and buffers characters from a standard interface, and
creates a packet of information. When the receiver side of the modem senses the backbone channel carrier "low," it broadcasts the buffered packet onto this line. The formatted packet contains addressing and error control information in addition to the packet data. When the appropriate destination address is detected at the receiving PCU, the packet is shifted into memory. The reverse process is then performed on the packet data and the information is supplied to the receiving party.
PCUs may be supplied with protocol translators that allow the high speed bus to service many different user terminal types on the same channel.
Agile Packet Networking
Agile PCUs are useful where the basic network load is too high to be handled by a single packet channel. This may become a problem when bursty subscribers are replaced or augmented by smart terminals or minicomputers, or when response times become critical. These demands bring substantially more data traffic onto the backbone and may slow system response to the users. Agile PCUs provide dedicated channel allocation by activity. That is, when a subscriber wishes to request a file transfer, a screen of graphics, or something similar, he is switched to a secondary set of file transport channels, thereby offloading the shared packet network base.
Connectivity in this type of system is assigned by channel allocation, not by the medium. Unless the designer has taken specific steps to limit access, all of the signals submitted to a broadband network appear at all taps in the network. This allows subscribers to move locations and designers tci add functions virtually at will.
Summary
To generate the topology of a broadband system, showing only the basic tree or star hybrid of its form, is a straightforward project. A complex system, however, must be broken down into layers, each corresponding to a particular service, bandwidth, data rate, and control mechanism. To be realistic, connectivity for a broadband system may be just as complex as that of its conventional counterparts. Thf' "Basic Channel Allocation" chart shows slots assigned in the channel space of a single broadband cable.
As may be seen, the capacity of one cable is immense. The capability to provide links for terminal, processor, computer to computer, and distributed processing applications on this transmission medium is virtually unmatched.
The combination of capacity and capability offered by broadband coaxial cable local area networks provides network architects and designers a medium of great power, flexibility, and growth potential. lt represents the closest analogy to the "wired city" concept yet available, and should be considered as one of the top contenders for multimode local area networks.
Currently, the equipment necessary to configure broadband local area networks is available to the designer in basic form. FDM agile modems, PCUs, hierarchical network components, and network monitoring systems are on the verge of introduction as high volume commercial products. The designer or manager interested in implementing the growth of a network in a cost effective mann~r may be well served by fully investigating the benefits of broadband.
22
COMPUTER DESIGN/JULY 1980
Step up your output with the new one-
atep AMP PACE connector. It not only
'8duoes production time, but helps avoid
reJecl8 in the process.
Fully preaaaembled, it's simply pressed
fnto ltre board.
The heart of the connector is the
ACTION PIN contact. The firstcompliant
pin to make suocessful solderless
connections-without time-wasting and
cceuy hole damage.
Complementing this concept, AMP J;NlQineers have applied our extensive l)lating technology by using selective 90.ktstriping in the connector's critical
contact area-and tin-lead plating on the posts.
What's more, our unique beam design aocommodates and compensates for
any daughter board warp and stress. SO you're assured of long-term
~nee.
You can have this preaesembled card
8dQe connector in .100" x.200" centerlines, and a range of po8itions.
See your AMP
repraaantative forthe new
preais1mbled card edge
connector that saves across htbolrd.
,a.
.:;
The spring sections of the ACTION PIN contact compress in oppasite directions for a gas-tight connection, every time.
The right touch
With selective gold plating engineered for the '80s, AMP PACE connectors ensure superior electrical contact at minimum cost.
$aves
money
The solder-free contact fits into the board each time without rupturing the plated-through hole. Also, any pin can be replaced several times withoutaffecting electrical or mechanical performance. Connectors come with pre-fitted spacer which keeps each contact in line.
And )40U just
PRESS it into service
The AMP PACE connector's preassembly makes a onestep installation passiblewith application equipment designed to provide even pressure across each contact.
Some facts worth knowing about AMP PACE connectors:
Contact Rating: 3 Amp. Contact Resistance: Spring contact to test board-8 milliohms
Total circuit resistance-9 milliohms Operating Temperature: -55°C to +85°C. Voltage Rating (Sea Level): .100" centerline spacing-1000 VAC Insulation Resistance: 5,000 Megohms. Durability: 100 cycles . Salt Spray: MIL-STD-1344, Method 1001 . Thermal Shock: MIL-STD-1344, Method 1003. Physical Shock: MIL-STD-1344, Method 2004. Humidity: MIL-STD-1344, Method 1002, Type II. Vibration: MIL-STD-1344, Method 2005. Where to telephone: Call AMP PACE
Connector Information Desk at (717) 780-S400. Where to write: AMP lncorparated Harrisburg, PA 17105
AMP, AM P PACE llld ACTION PIN are trademarks of AMP lncorporaled.
AMP
CIRCLE 14 ON INQUIRY CARD
25
Another major milestone in MOS memory technology from Texas Instruments ...
26
Tl's 64Kdynamic RAM is ready fordelivery. Now.
TI has paced the industry through generation after generation of semiconductor innovation, pioneering a lion's share of the major milestones in technology and production <;apability.
The new TMS4164 from Texas Instruments represents the fourth generation of dynamic RAM computer memories, and continues to fulfill the bright promise of innovative MOS technology.
TMS4164. Advanced architecture. Superior performance. High speed. High reliability. Low power. And ready for delivery.
Ready with 4 times the capacity of 16K RAMs in the same size package.
Ready with 65,536 bits of random access memory - and that's more than many board-level computers.
Ready with 256 cycle, 4 ms refresh architecture - the optimum organization evolving from all previous industry-standard dynamic RAMs.
Performance has been dramatically enhanced. Speed's up. Power's down. And design innovation makes this the smallest 64K chip (35K mil·) available anywhere. From anyone.
Improvements in density, relia-
bility, system cost and ease of use are some of the features, functions and benefits system designers will appreciate. Here's more: · 64K bits in a standard, 300-mil,
16-pin package saves valuable board space and reduces system size · Single 5-volt operation lowers power supply cost and system cooling requirements and improves reliability
TMS4164 256 CYCLE REFRESH ARCHITECTURE
en
z
en
z
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0 <.>
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0 <.>
.""."',",",''; 3: .a0.:.
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· JEDEC-approved pinout with NIC on pin one assures standardizatio n and guaranteed availability
· High speed: 150-ns access and 280-ns cycle times (min.)
· TTL compatible I/O and clocks
· Lowest power dissipation availa-
ble: 125 mW typical
· 256 cycle architecture means
lower current peaks and reduced
system noise
· State-of-the"art SMOS (Scaled
MOS) processing
Tl's new TMS4164 is perfectly
suited for use in mainframe com-
puters and large minicomputers. It
also finds ideal application in micro-
processor-based systems where
smaller size, lower cost and impro-
ved performance are important
considerations.
TMS4164. The deliverable, prac-
tical, usable 64K dynamic RAM.
Compare our 256 cycle refresh ar-
chitecture . . . then compare our
performance.
TMS4164. 'fruly another major
milestone in MOS memory technol-
ogy. 'fruly another example of the
total commitment Texas Instru-
ments is making to leadership MOS
memory products.
For more information about the
deliverable 64K RAM, call your
nearest TI field sales
office, or write to Texas Instruments Incorporated, P.O. Box 1443, M/S 6965, Houston, Texas 77001.
Fifty Years Innoovfati.on
~
© 1980 Texas Instruments Inco rporated
TEXAS INSTRUMENTS
INCORPORATED
CIRCLE 15 ON INCj)UIRY CARD
850078
I [CoMMUNICATION CHANNEL
Intelligent Information Display System Emulates IBM Terminals
PTS-2000 display stations. Intelligent terminals are provided wit ti typewriter or data entry keyboards with 75 or 87 keys, cursor select, separated function keys, and accessible display control knobs. Control unit can operate as standalone device, or as base for display terminal as shown above (right)
er with external clocking is supplied, with a second offered as an option. Extensive diagnostics are included.
The PTS-2000 series irripact printer is a 120-char/s, bidirectional, 7 x 9 dot matrix ou,tput device.. It will accept 4 to 17.3" (10.2 to 43.9-cm) wide continuous sprocketed paper and can accommodate up to 6-part car.hon interleaved forms. Printing format is up to 132 cols, 10 char/in (3.9 char/cm), with 6 or 8 lines/in (2.4 or 3.1 lines/cm) vertical spacing, switch selectable. Character set is full 64-char EBCDIC_
A typical PTS-2000 configuration of four display terminals, one controller, and one printer is priced at $22,170, or $529/mo including maintenance on a 2-yr lease basis.
Later this year, according to company spokespersons, the system will add BSC and SNA emulation of large clusters (1- to 32-station), 3274 protocols, a 3440-char display screen, and an increase in data rate to 9600 bits/s.
Circle 51 7 on Inquiry Card
Said to be the foundation of the company's information processing product line for the 80s, the PTS-2000 information display system has been introduced by Raytheon Data Systems Co, 1415 Boston-Providence Tpk, Norwood, MA 02062. It is the first of a family of devices designed to operate under IBM systems network architecture (SNA)_ The PTS-2000 is a small cluster system that emulates IBM 3276 communications protocol. Display terminals, controller, and printer comprise a typical system.
The microprocessor based alphanumeric display terminal is a plug to plug compatible replacement for the IBM 3276 display system_ Terminals can be located up to 5000' (1500 m) from a control unit via RG-62/U coaxial cable_ Display screen is 15" (31.5 cm) diagonal, with selectable displays of 80-char by 12, 24, or 32 lines of 10 x 14 dot matrix characters. An extra displayable line of protected data carries system/terminal status and operator prompting messages. Display terminals and keyboards have built-in microprocessors to distribute the processing load internally. 16k bytes of RAM and 8k bytes of ROM are contained
in each terminal, enabling the display unit to offload certain software functions formerly performed by the controller.
Keyboards can be furnished in either typewriter or data entry arrangements, with 75 or 87 keys in an assortment of character sets. The keyboard is attached to the display unit by an 8' (2-4-m) cable_ Each display and keyboard has self-test diagnostics resident in ROM, allowing all functions to be tested as standalone devices or as part of an entire system. A test mode of operation is also provided to display the interaction between control unit and host; in this mode the display unit actually functions as a communications test set.
The _controller can accommodate any combination of eight display terminals and printers_ It uses 3276 emulation software operating under BSC protocol, with up to 7200-bit/s data transmission to and from the host_ The unit contains a 72k-byte mini-floppy diskette drive and up to two 32k-byte memory modules_ Formatted data storage in the mini-floppy serves as the program load device and software distribution medium. One modem adapt-
Network System Combines Processing and Control Functions
The portable 4200 network system can function as a statistical multiplexer, allocating transmission time on a dynamic demand basis to optimize line utilization. A single voiceband link operating up to 19.2k bitsls, or two separate 9600-bit/s links, can serve as many as 60 terminal circuits, for up to 90% savings in telephone line costs, according to Halcyon Data Systems, 2121 Zanker Rd, San Jose, CA 95131. X.25 Level 2 protocol, which inch.ides ARQ error correction, is used. As a network control center, the system can remotely control network configutation, and also provide performance statistics and network diagnostics.
The unit handles a mix of synchronous and asynchronous lines, with a wide range of protocols and codes. No modifications are required to terminal software or line speeds, providing flexibility of application into
28
COMPUTER DESIGN/JULY 1980
The UniversalTM Intelligent Controller and
the SLittle Plugs
e u
eous,
multi-device storage control. DML's UniversalTM Intelligent Controller makes it possible.
· S-100 Bus, with CP/ M* support
*CP/ M isatradem arkofDigitalResearch
· Plug adaptable device support · Contr9l of up to 8 storage devices: 4 fixed
disks, 4 floppy or tape cartridge drives · IEEE DMA or port transfer
DATA MANAGEMENT LABS
CIRCLE 16 ON IN(j)UIRY CARD
29
I I COMMUNICATION CHANNEL
LINK SPEED UP TO 9600 BITS/s
Multilink configuration. With links in simultaneous operation, each can transmit at up to 9600 bits/s with dynamic load sharing. Alternatively, either link can operate at 19.2k bits/s while other is on standby
almost any network. Full or half duplex asynchronous lines, operating up to 4800 bits/s, may carry codes of 5, 6, 7, or 8 bits/char, such as ASCII, Baudot, and BCD. Protocols for synchronous lines with speeds to 9600 bits/s include BSC, CDC 200UT, and UNIVAC; codes include EBCDIC, ASCII, and two userdefined codes.
Up to 60 lines can be connected to the processor, with as many as 16 of these operating synchronously. Asynchronous lines can operate unrestrictedly to 4800 bits/s, and synchronous lines to 9600 bits/s. A choice
of EIA RS-232-C/CCITT V.24 and current loop interface adapter plugs is provided. The EIA plugs permit interfacing of asynchronous and synchronous lines in all terminal and modem combinations. 20, 40, or 60 mA current loop adapters for asynchronous lines handle all combinations of active and passive terminals and receivers. Additional features of the 4200 system include autobaud (from 110 to 1200 bits/s), data compression, echoplex, line priority assignment, and flow control.
Circle 51 8 on Inquiry Card
Enhancements Added to Electronic Mail System
Software and hardware packages as entry and intermediate levels of its MAILWAY electronic mail system have been introduced by Wang Laboratories, Inc, One Industrial Ave, Lowell, MA 01851. The system, originally announced in 1979, is a software package allowing initiation of document distribution from a Wang system workstation to a number of recipients regardless of their location.
Level 1 software is aimed at the first time, small user. Level 1 allows communication from workstation to work-
station on the company's word processing, OIS, or mixed systems via dial-up telephone lines at data rates to 4800 bits/s. Use of the mail system does not affect the conventional method of creating, editing, or printing of documents. Level 1 is also applicable to larger established users who intend a more deliberate move toward implementation of an electronic mail system.
Level 2 software incorporates the s.imultaneously introduced MAILWAY distribution controller (MDCSO) hardware which provides central management of electronic mail functions for those not requiring data processing
capabilities. MDCSO is not user programmable. It includes intermediate storage for store and forward mail processing, 1/0 peripherals for administrative control and reporting, and communications equipment for automatic collection and delivery between distribution points.
In Level 2, senders create documents to be mailed in conven· tional word processing modes. Mail is addressed using any MAILWAY mode. When security and priority codes are applied, MDCSO collects, sorts, and secures the mail before automatic delivery to specified sites . An automatic acknowledgment of receipt can be sent to the initial sender if required.
Level 2 includes an enhanced delivery services option which adds multizone ability, a zone being one MDCSO and its subordinate distribution points; multiport capability, which allows several communication lines to be run concurrently; and priority arrangements for immediate as well as scheduled distribution.
Word processing interface, another Level 2 option, eliminates the need for an additional system dedicated to word processing by providing both word processing software and electronic mail support to workstations locally connected to the MDCSO.
Level 3 software, which includes all Level 2 features as standard, allows a Wang VS computer to function as a distribution center for users who need both electronic mail and distributed data processing capabilities. A data processing interface (DP!) enables the VS to interactively send and receive mail. DP! also allows application programs to send mail. Both data processing and word processing information can be sent through the MAILWAY system, as the application is transparent to transmitted data and text.
Other functions available in both Levels 2 and 3 include Traffic Analysis and Mail Log, for single keystroke check of system performance and system integrity, respectively. Mailbox function allows users to look into the system for their mail, revise documents to be returned to the sender, reroute documents, and t.o send documents for printing or for storage on large capacity discs.
Circle 519 on Inquiry Card
30
COMPUTER DESIGN/JULY 1980
Tosellthebest terminal, buy thebestkeyboard.
The keyboard is one ofthe most critical components in your computer system. Which is why the first thing to consider when you buy a keyboard is reliability.
That alone is probably good enough reason to specify a Hall effect solid state keyboard from MICRO SWITCH. It's the most reliable keyboard you can buy. From tl_le beginning, it will help you and your customers save money on repairs.
As a result ofdesign innovations, the Hall effect keyboard is competitively priced against lower-performance, less reliable keyboards. Innovations like the microcomputer that gave you the first "intelligent" keyboard, the three terminal keyswitch module and single-sided printed circuit boards.
In addition, there's our ~lue Engineering Program. With specialists who work with you early in the design of your product, to give you the best, most effective keyboard for terminals used m high throughput applications like word processing, batch data entry, and photocomposition. And only our keyboards are backed by a dedicated field engineering organization, and an experienced application engineering team. To make sure you have the most cost effective keyboard for the job. That's really what buying a keyboard should be about. And why it pays to buy a Hall effect keyboard from MICRO SWITCH, the most reliable keyboard you can buy. For details, write MICRO SWITCH, Freeport, Illinois 61032. Or call 815-235-6600. In Germany, write Honeywell GMBH, Kaiserleistrasse 55, 6050 Offenbach/Main West Germany.
MICRO SWITCH
a Honeywell Division
CIRCLE 17 FOR DATA
31
This is 3M's DC-600 HC Data Cartridge for disk back-up. It's just 4" x 6" x 1/2''. Yet it holds a full 67 megabytes of formatted user information (144 megabytes unformatted). And most surprisingly, it only costs about thirty dollars.
The marvel that makes it work is our HCD-75 Data Cartridge Drive. At 4.6" x 7" x 8.6" (19" deep with controller/formatter module) it's the smallest full-capability back-up system available today. And its storage capacity makes it the most economical, too.
You see, the HCD-75 drive unit eliminates the need for costly multitrack heads. Instead, it uses a new tape head which features automatic positioning to any of the tape's sixteen tracks. The result is a storage capacity much larger than ever before possible with data cartridges. Which also makes it suitable for other mass storage applications.
Extensive use of microprocessors in the HCD-75 make it the world's first truly intelligent cartridge drive system. Other than initial commands, all tape drive functions are controlled locally. So the host computer system can remain free for other functions. What's more, the HCD-75 features sophisticated error detection and correction capabilities. And to insure system
performance, self-test diagnostic routines run continuously. Even when
the system is not in use. Will wonders never cease? For more information,
check the listing on the next page for the representative nearest you.
Orwrite: Data Products Division/3M, Bldg. 223-5E/3M Center; St. Paul, MN 55144.
THE DISK BACK-UP SYSTEM THATS SUDDENLY W\Y OUT FRONT.
32
CIRCLE 18 ON INQUIRY CARD
3M
I I COMMUNICATION CHANNEL
3M M1A PRODUCTS REPRESENTATIVES
Data Products/3M 3M Center, 223-5E St. Paul, MN 55144 612/733-8892
WEST Hefte Industries, Inc. Los Gatos, CA 408/264-8319 CTI Data Systems, Inc. Long Beach, CA 213/426-7375 P.A. R. Associates Denver, CO 303/355-2363 PSI Systems, Inc. Albuquerque, NM 505/881-5000
MIDWEST OASIS Sales Corporation Elk Grove Village, IL 312/640-1850 carter, McConnic & Pierce, Inc. Farmington, MI 313/477-7700 The Cunningham Co. Houston, TX 713/461-4197
EAST J.J. Wild of New England, Inc. Needham, MA 617/444-2366 Wild & Rutkowski, Inc. Jericho, Long Island, NY 516/935-6600 COi.ANS-CO., Inc. Orlando, FL 305/4 23-7615
3IVI
System Supervises Online Data Network Operations
Microprocessor based multiple access switching system MASS+ R detects and diagnoses network failures and equip· ment malfunctions and provides for restoration of online service from remote locations. It will access analog or digital communication lines in a data network for monitoring, testing, and reconfiguring network components. These functions can be performed from as many as eight widely separated operator controllable sta·
operator pos1t10n, the system allows either manual or software programmed centralized control for rapid access to monitor and test one or a group of lines on an individual or simultaneous basis. A single command restores failed service of one, a group, or all frontend ports by switching to a backup unit. Preventive maintenance and accommodation of changing tasks can be effected by preprogrammed switching of frontend ports. Remote patching and substitution of spare modems can be performed with no local degradation of signals.
MOOE MS
OATA LINK TESTER
AUDIT TRA IL PRINTER
ALARMS STATUS FEEDBACK SYSTEM COMMANDS
. .
(UP TO 8 TERMINALS)
(LOCAL)
(REMOTE)
System configuration. All system functions are operational from up to eight independent control stations. Up to eight digital and eight analog system buses allow simultaneous monitoring/ testing of multiple data circuits
tions. The system was recently intro· duced by T-Bar Inc, Data Communica· tions Switching Div, 141 Danbury Rd, Wilton, CT 06897. System architecture has the capacity to accommodate up to 512 digital and/or 512 analog lines, for a total of 1024-line capability of either type.
A standard ASCII CRT terminal at each operator station displays, in real time, all commands, line and patch status requests, and alarms for loss of carrier detect. MASS+ software pro· vides for both action and information commands using abbreviated English, as well as prompting to mm1m1ze operator training. From a single
Among the system options are provi-
sion for manual patching; a disc-stored
data base for preprogrammed instruc-
tions for multiple frontend sparing or
for random and/or sequence line
transfer; a hard copy audit trail printer
for recording all transactions; and in-
ter active test capability using
diagnostic test equipment such as the
company's EXPLORERR family.
A 64-line MASS+ system is housed in
a standard 19" (48.3 cm) computer
grade cabinet 70" (l 78 cm) tall. Price
ranges from $250 to $600/line, depen·
ding on selected options; delivery, 90
to 120 days.
Circle 520 on Inquiry Card
(continued on page 36)
33
You're only as smart . as~rnext ·
floppy Clisk controller.
34
COMPUTER DESIGN/JULY 1980
Your new design is a work of genius. Why ruin it with a dumb floppy disk controller? Or one with half a brain? Get a Supercomponent.
Announcing the Am95/6110. The world's smartest floppy disk controller.
The Am95/ 6120 has its very own 8085A. That's the most powerful CPU on any floppy disk controller board. It'll take a real load off your system's CPU.
And the Am95/ 6120 has more than brains. It has brawn too. It can handle up to four 8-in. or 5%-in. floppy disks. It can do double density, as well as single. One side or two.
No other floppy disk controller in the industry even comes close. Except one.
Meet the Am95/6110.
It has the same brain as the Am95/ 6120. But a little less brawn.
It drives up to four 8-in. floppy disks. Single density only. Single or double sided.
Both Supercomponents offer you 20-bit address space, an Am9517 DMA, automatic check on startup, and automatic system boot. Both work like a charm with 8-bit and 16-bit systems.
This isa job for Supercomponcnts!
The Am95/ 6120 and Am95/ 6110 are the newest members of our Supercomponent family.
Supercomponents are LSI-intensive boards built to save the serious designer a whole lot of time and money. They are changing the makeor-buy rules. Here's why:
Supercomponents are absolutely state of the art. They are designed in like components and they think like VLSI. All are plug-in ready. All are iSBC80 compatible and have a Multibus? And, of course, we have a complete family of CPU boards, peripherals, enclosures, power supplies, card cages, and software.
If you're thinking about buying a floppy disk controller, call Advanced Micro Devices and get the floppy disk controller that thinks. Get a Supercomponent.
' iSBC and Multibus are trademarks of Intel Corp.
Advanced Micro Devices ~
901 Thompson Place. Sunnyvale. CA 94086, (408) 732-2400
CIRCLE 19 ON IN9UIRY CARD
35
' I I COMMUNICATION CHANNEL
Joint Development Produces Fiber Optic Interface System
Standardized components for a fibe r optic system called the HDC interface together form an economical data link suited for short distance (to 30 m), medium speed (to 30M bits/s) applications. The components are the result of a joint development by three companies. Semiconductor light sources and detectors are from Honeywell Inc, Spectronics Div, 830 E Arapaho Rd, Richardson, TX 75080; Pifax plastic core cables used in the link are from Du Pont Co, Wilmington, DE 19896; and standard electrical connector hardware adapted for fiber optic cable termination is by ITT Cannon Electric Div, 666 E Dyer Rd, Santa Ana, CA 92702.
Components for the link-emitters, receivers, connectors, cables, and prefabricated harnesses-may be purchased separately from the respective companies for customer assembly. The assembled HOC interface data link will be available from ITT Cannon.
Low cost repackaged versions of the Sweet SpotTM LED emitters, and three photodetectors from Spectronics are compatible with the HOC interface. SE 4352 LED uses a glass bead lens on top
SE 4352 With:
SD4323 SD 4478 SD 4324
P-140 Distance ·
5m 15 m 10 m
PIR-140 Distance·
15 m 30 m 30 m
Data Rate· (Megabit sis)
1.0 30.0
0.1
· Distances and data rates shown are maximum values
of the chip to collimate emitted IR light into a 300-µ.m diameter spot of high radiance optical energy. This allows coupling of from 750 to 1000 µ.W optical power into the fiber.
Three optical receivers are available : SD 4323 for de to lM bits/s; high sensitivity SD 4478 PIN for speeds to 30M bits/s; and a Schmitt detector SD 4324 that includes onchip signal conditioning for TTL/CMOS compatibility from de to lOOk bits/s. The emitters and receivers were designed to interface with Du Pont Pifax P-140 Type B and PIR-140 Type B cables. Packages couple efficiently with ITT Cannon connectors.
Pifax P-140 and PIR-140 cables were designed to fit the 50-mil (l.27-mm) spacing of the Cannon standard microminiature connectors. The cables' high numerical aperture {NA) provides high coupling efficiency to the 300 µ.m light spot from the emitters. The chart shows distances achievable by the two cable types used in conjunction with the SE 4352 LED and the three
detector types. Maximum attenuation of the P-140 cable at 650 nm is 385 dB/km; that of the PIR-140 is 320 dB/km at 690 nm. The flexible cables can withstand 25 kg tensile force in installation and use and can be subjected to the same tight bend environments as wire.
A fiber to diode connector by ITT Cannon links emitters/receivers to the fiber cable, and also can terminate the cable with the company's series MOM miniature connectors. The all-metal diode connector positions and maintains the terminated fiber end in alignment with the cap of the T0-18 diode package. The ability to also terminate the fiber into the MOM series environmental connectors provides both electrical and fiber optic compatibility within a single harness/connector combination for board to board or cabinet to cabinet OEM applications.
Spectronics: Circle 521 on Inquiry Card
Du Pont: Circle 522 on Inquiry Card
ITT Cannon: Circle 523 on Inquiry Card
(continued on page 40)
GLASS BEAO LED CHIP CLEAR LENS CAP
(a)
Cross section of Sweet Spot LED. Fi ber can be butted directly against device window. Standard LED requires pigtail connection, resulting in greater losses
~~"""l""te='~:~""":~ :J
OETECTOR PAIR
DIODE CONNECTORS
(b)
Typical link confi gu ration. Two-channel (du plex) link incorporates two emitters, two detectors , fiber cable, fou r diode connectors, and two miniature connectors
36
COMPUTER DESIGN/JULY 1980
----- - - ---------------
Announcing the HP 1000
Separate1/0processorslet the
Our new HP 1000 L-Series is designed to give you outstanding processing performanceeven in the most demanding applications.
The reason is our innovative distributed intelligence architecture. Each I/O interface has its own processor-made with our exclusive SOS LSI process- and its own direct memory channel. Which means each interface can control and monitor data transfers-without interrupting the central processor.
So the CPU can concentrate on its main job of computation.
And you get faster response, higher throughput and superior system performance.
But what's really surprising about the LSeries is that you get all this performance at prices
that start as low as $1968 for our starter set.t Or $15,510 for a complete disc-based system.tt
Nobody makes processors
likewedo.
The key to the HP-1000 L-Series' impressive new architecture is our own Silicon-On-Sapphire technology. SOS lets us make CPU and I/0 chips with extremely high circuit density, low power consumption, high processing speeds and high reliability-at a very low cost.
It's this combination of high performance and low cost that make the lrSeries appropriate for the whole range of OEM and industrial appli-
L-Series Computer. CPUconcentrate on computation.·
cations - including data management, process control and instrumentation.
And to insure you can get the exact configuration you need for your specific application, the L-Series is available in a wide choice of board, box and system packages.
The HP 1000 L-Series is a fully compatible member of our high performance HP 1000 family. Which means you can move up to a larger computer-all the way to our powerful F-Series-as your application grows.
It also means you can use any HP 1000 computer- and its sophisticated program development tools-to design programs for the lrSeries.
The reliability is
built in.
Like all HP computers, the HP 1000 L-Series is designed to give you outstanding reliability. Reliability that's significantly enhanced by our SOS technology - processor boards have fewer active parts, so
From
$1968
fewer things can go wrong. In addition, the L-Series has its own self-test programs and diagnostics.
And, of course, the L-Series is backed by our full range of support and documentation services - including our worldwide service network.
For more information or a hands-on demonstration of our high performance, low cost L-Series, contact your nearest HP sales office listed in the White Pages or write to: Roger Ueltzen, Dept. 1273, 11000 Wolfe Road, Cupertino, CA 95014.
tStarterSet: CPU. 64KB memory, one 110 board.
tt Disc-Based System: HP's new
12MB Winchester disc drive and 2621 display console.
(US. OEM prices in quantities
of 100)
F//O'I HEWLETT
Ii:~ PACKARD
C IRCLE 20 ON INQUIRY CARD
22002HPDS30
39
I I COMMUNICATION CHANNEL
Three Companies Develop Local Network Specifications
Specifications for a local area data communications network are being developed in a major joint effort by three companies. The network consists of a coaxial cable and communications transceivers that will link different kinds of computers, peripherals, data terminals, and other office equipment located in a building, or in a complex of closely grouped buildings. Each device connected to the cable will have a control element that will allow it to communicate on the cable through its transceiver.
Basic network design is represented in Ethernet (announced in Dec 1979) and is being provided by Xerox Corp, 701 S Aviation Blvd, El Segundo, CA 90245. Experimental Ethernet networks have been used over a period of five years in several company sites. System design in the areas of communications transceivers and micro-, mini-, and mainframe computer networks is by Digital Equipment Corp, 146 Main St, Maynard, MA 01754; the partitioning of complex communications functions into microcomputer systems and VLSI components is being carried on by Intel Corp, 3065 Bowers Ave, Santa Clara, CA 95051.
The network (Computer Design, Mar 1980, p 42) is a passive com· munications medium that simply accepts transmissions from computers, distributed peripherals, and other information processing devices attached to it (Fig 1). Failure of any one of the network elements does not affect the others. The 50-0 terminated coaxial cable is made up of one or more segments, each of which can be up to 500 m in length, and a communications transceiver for each device attached. Each device has a control element for its own transceiver. Multiple cable segments may be interconnected in configurations (yet to be deter-
TERMINATOR
COAX CABLE SEGMENT (I ELECTRICAL SEGMEND -------~
TAP TRANSCEIVER
HOST STATION
COAX CABLE SECTION
-MALE COAX CONNECTOR
_ j FEMALE CABLE
FEMALE-FEMALE ADAPTER (BARREL)
CONNECTOR
HOST
~~~~~:~~ __J ~sT_AT_10N__,
TERMINATOR
Fig 1 Transmission system components. Coax cable insulation and shielding must be appropriate to installation environment. Transceiver to coaxial cable connection is via
cable "tap" (to be determined), with up to 128 transceivers per cable segment. Each transceiver monitors cable before transmission to be sure it is clear, and during transmis·
sion to detect interference. If interference is detected, packet is retransmitted when cable is 6),ear
PACKET
PREAMBLE DEST SOURCE TYPE DATA ADDR ADDR FIELD FIELD
32
48 48 16
8n
CRC
PREAMBLE DEST SOURCE TYPE DATA CRC
ADOR AOOR FIELD FIELD
32
32
48 48
16
8n
32
- j r- MINIMUM PACKET SPACING (48 BIT TIMES)
Fig 2 Packet format. 32-bit cyclic redundancy check (CRC) protects destina· lion, source, type, and information fields . Minimum packet spacing provides time for receivers to reset
40
mined), provided that no two hosts are separated by more than 2500 m. Manchester channel encoding is to be used, and channel data rate is lOM bits/s.
Information is transmitted in packets, which contain the data to be sent, the destination address, and the source address. Packet format is shown in Fig 2. The preamble enables bit synchronization and marks packet boundary. Destination address is a 48-bit field with 247 physical addresses, one broadcast, and 247 -1 multicast group addresses. The source address is in the same format as the destination address. The 48-bit address field permits flexible assignment of addresses,
(continued on page 44)
COMPUTER DESIGN/JULY 1980
.......
Up to four 18Mb Winchester-
type hard disk drives
.......
Display terminal
.......
Letter-quality or dot matrix printer
~
Horizon 1/0 flexibility allows expansion to meet your needs
Unsurpassed Performance and Capacity!
North Star now gives you hard disk capacity and processing performance never before possible at such a low price! Horizon is a proven, reliable, affordable computer system with unique hardware and software. Now the Horizon's capabilities are expanded to meet your growing system requirements. In addition to hard disk performance, the Horizon has 1/0 versatility and an optional hardware floating point board for high-performance number crunching . The North Star large disk is a Century Data Marksman, a Winchester-type drive that holds 18 million bytes of formatted data. The North Star controller interfaces the drive(s) to the Horizon and takes full advantage
of the high-performance characteristics of the drive. Our hard disk operating system implements a powerful file system as well as backup and recovery on floppy diskette.
Software Is The Key!
The Horizon's success to date has been built on the quality of its system software (BASIC, DOS, PASCAL) and the very broad range and availability of application software. This reputation continues with our new hard disk system. Existing software is upward compatible for use with the hard disk system. And, with the dramatic increase in on-lin.e st?rage and sp~ed, there will be a continually expanding library of readily available application software. For further information, contact the OEM sales department at North Star Computers, Inc.
North Star OEM Prices
NorthSlai f
North Star Computers, Inc . 1440 Fourth Street Berkeley, CA 94 71 O (415) 527-6950 TWX/Telex 910-366-7001
HORIZON-HD-18
Horizon computer with 64K
RAM, 2 quad capacity mini
drives and one HDS-18 hard
disk drive
$5880 ·
·in OEM quantities
CIRCLE 21 ON INQUIRY CARD
HDS-18 Additional 18Mb hard disk drive for expansion of Horizon HD-18, or your present Horizon
$3150.
41
Ideals tell you to design for performance.
.
STC's product plan
Balancing your 1/0 performance objectives
against your company's cost oQjectives can be a vexing challenge. STC is ready to help you
resolve the dilemma with the most com-
prehensive offering of tape subsystem
products and capabilities ever offered to the OEM. lq>rOYing Performance
The 1900 Tape Family provides a choice
of 9 basic subsystem configurations. So you
can pick the precise combination of speeds. densities and features to complement your
processor and your customers' applications.
The chart on the right will help you start
Controlling Factory Costs
sizing up the appropriate model.
If your company markets a line of systems
In demanding processing environments
to meet a variety of customer require-
GCR (6250 bpi) is the obvious choice. For
ments, the STC 1900 can simplify your engi-
exanple. a GCR tape drive can handle a 100 neering and cut your costs.
Mbyte disk dump/restore with a single reel
The 1935 Formatter/Control Unit will
in as little as 4 minutes. (Compared to 4 reels handle up to four 1950 and 1920 Series
and 20 minutes for PE.) On long sequential Drives. intermixed in any combination of
files. a 125 ips GCR drive will actually
speeds and densities. That means a single
outperform most disk drives. Best of all.
hardware interface and a single set of oper-
GCR performance comes with a significant ating system drivers and utilities can accom-
bonus in read/write reliability.
modate all the configurations in your
NRZI (800 bpi) and PE (1600 bpi) give
marketing mix.
your customers the ability More good news. The seven 1950 Series
to process archival data Drives models have a 90% plus parts
and to exchange infor-
commonalit;y. The same is true of 1920 Series
mation with systems
Drives. So training is simplified and spare
lacking GCR capability. parts headaches are a thing-
STC's 195.3 lets you
of-the-past
handle all three of these
popular formats in a
pl}l(lUliUJf single drive/sing!~ for~ -
matter configuration.
~
/114~
Sfctt'tl11Ftlf
!'!f~
---~d "
~~ ""-~ ~
~--
~
~~ '
~
~
Practicality says design to cost.
gives you both.
And for the ultimate in flexibility, 1900 subsyst.ems provide a convenient growth path. With a few simple card changes, your field engineers can convert speeds and densities, on-site, in a matter of minutes.
Containing Service Costs To as.sure fast effective field service, STC provides you with the most comprehensive diagnostics in the industry. The 1900 Diagnostic Software features more than 180 routines including functional, relia-
bility and artificial stress testing. Field ex-
perience has shown the package will deliver 95% fault detection and 70% isolation to one of three cards.
Your field engineers can run these routines on-line via the customer's processor or offline via STC's 3910 Diagnostic processor. In addition to its powerful local capability, the 3910 offers remote communications, so an FE can call on factory expertise for difficult problems.
Support for Succ:es.s When you specify STC 1900 Subsyst.ems you have the resources of the world's largest tape system manufacturer behind you. Depending on your needs you can draw on STC's engineering, marketing, or training departments for expert implementation assistance.
For details on how STC can help you meet your cost. performance and profit objectives. contact your local STC representative. Offices are located in major OEM
centers around the world. Or write Storage Technology Corp..
P.O. Box 6, 2270 S. 88th Street. Louisville, CO 80027. Phone (303) 673-5151.
500 18 2000 31 8000 38 Max 40
27 62 28 42 94 47 70 156
52 156 46 78 235 77 130 390
71 249 57 107 379 96 178 624
80
120 470 100 200 780
CIRCLE 22 ON IN(j)UIRY CARD
STORAGE TECHNOLOGY CORPORATION
Fulfilling the promise of technology.
I I COMMUNICATION CHANNEL
operation of equipment of different manufacture on the same network, and prevents address duplication.
A 16-bit field designates types of protocol; its format is to be determined, as is that of the data field. End of packet is indicated by loss of carrier within one bit time after the last data transition. Runt packet filtering is provided to reject packets whose data field is less than a certain number of bytes, as yet to be determined. Total packet length must be greater than the round trip time through the network. Packets shorter than this are assumed to be the result of a collision. Link management is by contention arbitration with carrier sense and collision detection. The network will provide Datagram service.
The cooperative efforts of the three companies has resulted in the general operational objectives .for the network outlin ed above. Full specifications are expecte d to be published during the third quarter, 1980. One objective of the joint project is to provide communications compatibility among a wide range of computers, peripherals, information systems, and office products, and to encourage implementation of the specifications by other organizations, especially standards groups expressing interest in adopting them. Xerox, holder of basic Ethernet pate~ts, has said it will license interested companies, including those who wish to manufacture compatible systems or components.
Serial Data Analyzer Monitors or Simulates Digital Network Elements
Menu-driven analyzer model 1640B incorporates features to further simplify functional analysis of data network sys tems using serial interfaces. Retrofi t field kits are available to update HP 1640A units (Computer Design, June 1978, p 22) to I 640Bs. The analyzer is from Hewlett-Packard Co, 1507 Page Mill Rd , Palo Alto, CA 94304.
Patch panel matrix adapts analyzer to variety of system interfaces. HP-18 interface is option for automated operation under control of computer controller
The simulation operation now has two branching modes that allow a usergenerated message to be repeatedly transmitted until a reply is received. One of two remaining messages is sent contingent on the "reply on" parameters specified.
A memory bit shift lets the operator check transmitted or received data bit by bit, or locate clock slips and unknown sync patterns. Any displayed character can be simultaneously
Communication Expander Added to TM990 Family
Communication expander TM990/307 has been added to its family of microcomputer modules by Texas Instruments Inc, PO Box 1443, Houston, TX 77001. Bus compatible with the TM990 product group, the device can communicate via' RS-232-C interfaces with up to four synchronous or asynchronous terminals or moderns. Parallel interfacing to an autodialer such as the Bell 801 ACU is also possible.
Individual channels are selected by means of communications register unit (CRU) addresses. A loopback mode permits self testing with a demonstration software package. Baud rates are software programmable, and each of the four channels has switch-selectable in-
decoded in binary, octal, hexadecimal, and the displayed code. Clock accuracy has been improved to ±0.01 %.
In passive mode, the instrument is a nonintrusive monitor on the serial RS232-CN.24 lines in a digital network with five trigger modes: 8-char sequence, control line, error pattern, time interval, or external event. In the active mode, the 1640B can be configured to perform as a major unit of the data communication network: CPU, terminal, or, with the RS-232-C connection, a modem.
Operating speeds are to 19.2k bits/s (half duplex only) synchronous, or up to 9600 bits/s asynchronous, in full or half duplex across 2- or 4-wire links. Standard codes are hexadecimal, ASCII, and EBCDIC, with others available as options. The memory records 2048 chars; a separate 1024-char buffer holds user-generated messages for simulation.
All accessories but the 10291A menu P/ROM are compatible with either 1640A or 1640B models. 10291A menu P/ROM is used with 1640A, and menu P/ROM 10291B is available for the 1640B. The analyzer is priced at S5800 (U.S.); delivery is four weeks.
Circle 524 on Inquiry Card
terrupt levels. One of the four channels
also provides an RS-422 interface.
The expander is applied where there
is a need to transmit or receive serial
data between a CPU module and multi-
ple peripheral devices.
Other members of the TM990 series
of 16-bit microcomputer modules in-
clude complete CPUs with onboard
memory and 110 interface, memory and
110 expansion, data entry and display, software development, ac and de 110,
A-D and D-A interface, bubble memory,
floppy disc controller, speech syn-
thesis, industrial communications, and
a wide variety of accessories.
The expander module is designed
for operation from 0 to 70 °C. PC
board dimensions are 11 x 7.5" (5.9 x 4
cm). Single unit price is $650, with im-
mediate delivery from the company or
its authorized distributed.
D
Circle 52 5 on Inquiry Card
44
COMPUTER DESIGN/JULY 1980
SCOUT'"has a red.light. It
does not mean what you think. The red light says one of SCOUT's boards does not feel well. Will this make you sad because your minicomputer can't play anymore? Will the expensive repairman take a long t ime to get it fixed? No no, silly. Since
SCOUT's ISOLITETM
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Zip
ComputerAutomation
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I
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------------------------ SCOUT and ISOLITE are registered trademarks of Computer Automation Inc.
CIRCLE 23 ON INQUIRY CARD
TECHNOLOGY REVIEW
32-Bit Superminicomputer Runs Both 16- and 32-Bit Code
The 32-bit ECLIPSER MV/8000 is a compact superminicomputer based on VLSI technology that bridges the gap between 16- and 32-bit word programs to offer orderly transition from 16- to 32-bit computer systems. Announced by Data General Corp, Rt 9, Westboro, MA 01581 in response to increased ap· plication demands from users requiring performance and data handling power, the system features virtual address space of 4.3G bytes and user address spaces of up to 512M bytes each, built-in diagnostic processor, and hardware supported 8-ring security and protection mechanism.
Programmed array logic and VLSI technology reduce components allowing the the CPU to be implemented on five boards. The system consists of four major subsystems: CPU, memory, system control processor, and IIO system. The three separate processors supporting these subsystems-central processor, system control processor, and 110 processor-allow management of intelligence as close to the source as possible. This increases performance and minimizes data movement and system overhead. A series of high speed buses maximize processor throughput. These with the system's combination of instruction and system caches provide a memory system throughput rate of 36.4M bytes/s with 110 to memory and CPU to memory transfer rates of 18.2M bytes/s.
The CPU's 4-stage implementation allows instructions to be fetched, decoded, and executed simultaneously. A lk-byte instruction cache in the CPU uses a lookahead lookback technique to increase speed. A RAM based microsequencer contains the memories that form the control store for microcode. Built around bit slices, the 32-bit ALU performs complex operations in a minimum of cycles. One section of the ALU operates on the exponents found in floating point numbers and the other works with floating point mantissas, fixed point quantities, and addresses.
Reliability and efficiency of the system's memory are enhanced by incorporation of an error detection and correction mechanism called "sniffing." This technique consists of the bank controller reading one double word from each RAM row as it is refreshed or recharged. (The bank controller is the interface between system cache and memory modules.) The double word goes through a complete error d~tection and correction check and is returned to the memory module. Because the operation is performed on a different double word during each refresh, the entire contents of memory are checked and corrected if necessary every 4 s.
Memory modules are available in increments of 256k bytes up to 2M bytes maximum, and are organized as 64k double words of 4 bytes each. Seven additional bits stored with each double word provide error checking and correction facilities; 4-way interleaving offers maximum performance. Data transfer between memory modules and system cache at a 36.4M-byte/s rate is possible because of overlapping of memory operations.
The l6k-byte system cache acts as a high speed buffer between memory modules and the rest of the system, reducing the time needed by both CPU and IIO system to access memory.
(continued on page 48b)
ADD
MAIN
RD
MEMORY
WO
BMC BUS ---+-~ 110 BUS
SYSTEM CONSOLE
l 1M·BYTE DISKETTE
INPUT / OUTPUT PROCESSOR
DCU/200
ARITHMETIC LOGIC UNIT
MICRO· SEQUENCER
31 LA
MBC/ l · MICRONOVA BOARD COMPUTER SBUS ·DIAG NOSTIC SCAN BUS BMC · BURST MULTIPLEXER CHANNEL ADD · MAIN MEMORY ADDRESS BUS WO ·WRITE DATA BUS RD · READ DATA BUS CA · CACHE ADDRESS BUS LA - LOGICAL ADDRESS BUS IPA 110 PORT ADDRESS BUS IPM 110 PORT MEMORY! DATA BUS CPA ·CPU PORT ADDRESS BUS CPM ·CPU PORT MEMORY / DATA BUS
Data General's 32-bit Eclipse MV/8000 computer system supplies 512M characters of user program address space and main memory bandwidth of 36.4M characters/s . Machine uses a microprogrammed processing unit, block oriented memory system with 16k-byte cache, and independent 1/0 system, and provides integrated microcomputer based diagnostic capability for comprehensive system control and error diagnosis
48
COMP UTER DESIGN /JULY 1980
TECHNOLOGY REVIEW
Interface between system cache and main memory transfers data at a rate of 16 bytes in 550 ns for write and 16 bytes in 440 ns for read operations.
A hardware accelerator for the memory paging system, the address translation unit maintains a table of up to 256 address translations and access privileges for recently referenced pages. The unit also generates modified and referenced bits. Modified bits signal when a page in main memory must be written back to disc because it has been modified; referenced bits indicate that the page was referenced and are used by the operating system to perform page replacement algorithms.
Made up of a high speed burst multiplexer channel, data channel, and 110 processor, the 110 system is under the control of the 110 channel board. All data transferred within this system move to or from system cache; they need not pass through or interfere with the processor. Transferring blocks of data at up to 16.16M bytes/s the BMC is a direct communications path between main memory and high speed peripherals. The data channel handles transfers between CPU and medium speed devices operating at rates up to 2.27M bytes/s. An independent processor with ECLIPSE instruction set and 64k bytes of local memory, the !OP processes and buffers data from low speed units. Acting as a frontend processor for the system, it offloads the CPU and receives terminal output from the CPU.
Designed in conjunction with the computer, the concurrently announced Advanced Operation System/Virtual Storage (AOSNS) takes advantage of hardware architecture to manage system resources for 128 users accessing up to 512M bytes of logical address space. The software also supports simultaneous execution of 16- and 32-bit programs and can run 16-bit programs developed under AOS without modifications and with increased speed. Support software for use under AOSNS includes three 32-bit languages that conform to ANSI standards: FORTRAN 77, PL/I, and BASIC. In addition, the operating system offers a 32-bit SWATTM Native Language Debugger.
The intelligent multiprogramming system controls concurrent timesharing, batch, and online operations for both 16- and 32-bit processes. Working dynamically with hardware, the system operates on a demand paging basis using pages of 2k bytes. It uses a cache based hardware address translation unit to accelerate the translation of logical addresses into virtual addresses.
Segmentation of virtual memory into. eight processing regions provides the hardware for an 8-ring software security mechanism. The structure permits the operating system to reside in the user's address space while protecting it from user encroachment.
Compilers include a common code generator and optimizer to select the most efficient code sequence. Common language modules are used, further increasing system reliability and maintainability.
Representative prices for the systems range from $153,150 to $504,700. On the low end the system consists of CPU with 512k-bytes memory, battery backup, system console, 8-line asynchronous modem interface, 96M-byte disc, and 800/1600-bit/ in magnetic tape. The high end system has 2M-bytes memory, and adds three 16-line asynchronous terminal interfaces, 64 CRT displays, four 277M-byte discs, magnetic tape unit, and 900-line/min printer. Deliveries are scheduled for October.
Circle 420 on Inquiry Card
Information Processing Systems Support Multiple Hosts, Multiple Protocols
Initially available in two models, the 9200 family of microprocessor based information processing systems allows for advanced networking capabilities and modular addition of functions. Both local and remote communications in either SNA/SDLC or BSC networks are supported by the units from Harris Corp, Data Communications Div, 16001 Dallas Pkwy, Dallas, TX 75240,
to enable users to change protocols with minimum effort.
Ability of the system to support concurrent communications with muJtiple hosts will provide a major advantage that will enable users to combine operations under one interactive system for efficient utilization of communications lines and equipment. A user with host processors in two separate cities operating in BSC or SNA will be able to communicate with the 9200, which will handle communications with each host concurrently.
Local attachment to IBM host systems is achieved via byte, block, or selector channel in 3272 or SNA mode. Remote connection uses either BSC or SDLC protocol. Speeds up to 9600 bits/s are supported by 9200 processors.
When operating in BSC protocols the 9200 will communicate over duplex or half-duplex facilities in ASCII or EBCDIC. When in the SNA/SDLC environment, the unit will be capable of local channel attachment or remote communications in half-duplex, flipflop send/receive modes.
The basic 9210 will support up to 32 devices per system with local attachment at channel speed, and remote communications up to 9600 bits/s. When upgraded to the 9220 model, this system will also support more than one host concurrently.
Systems are tailored to individual requirements by insertion of diskettes containing parameter definitions. This allows users to specify printer authorization, screen configuration, and number of devices, and to reconfigure the system by entering new system parameters.
Among the system peripherals are a 15" (38-cm) nonglare CRT; keyboard configurations including 75- and 87-key data entry typewriter, and keypunch styles; and printers that include both dot matrix bidirectional and band printers. Other options include a photopen light sensor and magnetic slot reader.
A basic 9200 system includes processor, six display stations, and one 130-char/s bidirectional printer. Purchase price is $23,306.
Circle 421 on Inquiry Card
(continued on page 48j)
48h
COMPUTER DESIGN /JULY 1980
This popular\Audiotronlct4ata - - one of
our 48 atand&cd models.-We ,_
llOUlancls
of them to giants in the~
perfect
for your requirements. If not, talk to about your
specifications. We're dadlcatld to lnnov8llve
product design, quaffty production
Ind
complete customer satlsfactk>n. WhlteWr you
need, we have the experienQe
to
design it, or improve It. Contai:t~ 11M1111~
Model DC·948 features:
· modular construction
· 5" cathode ray tube (12.7 cm)
· solid state
· DC operatlon-12V de lnpull
· choice of signal Inputs: TTL (standard)
Composite video (plug-In module)
· standard 15,750 KHz horizontll
frequency
· 650 lines resolutlon
48d
· COMPUTER DESIGN/JULY 1980
· ·
Introducing the Intel®2732A EPROM. Now you can design 16-bit microcomputer systems without delays.
Now get all the performance you're paying for from your microprocessor designs with Intel's new 2732A EPROM. For 16-bit microprocessor systems, 2732A EPROMs deliver both the high speed (250ns) and high density (32K) solution. No other 32K EPROM on the market comes close.
No speed limit
Other EPROMs require one, two, even three wait states to work with today's high speed microprocessors. Not Intel's 2732A EPROM. It's fast enough to keep up with any of them.
So now, at last, you can utilize the full potential of your microprocessor. In fact, when you use 2732As, you're designing a system that can run 25% faster.
And with a 32K bit density, you're not losing valuable board space to memory chips.
The HMOS*-E generation
By designing with the 2732A today, you're actually designing with the standard of tomorrow. The 2732A is a product of Intel's proven, reliable fourth generation EPROM technology, HMOS-E, and the first to come in a family of dense, high speed EPROMs.
HMOS-E technology means that we'll be able to incorporate
high performance features, like increased density, into future EPROMs, without affecting their speed or power characteristics. The 2732A is your first step towards a degree of flexibility in memory design never before available.
JEDEC approved pinout
You can start designing for tomorrow now because the 2732.P\.s pinout conforms to the approved JEDEC committee standard for byte-wide memories from 16K bits to 256K bits. So you can upgrade from a 2732A without changing your design or board layout. And you won't have to sacrifice features like 2-line control-a must in high-speed memories for avoiding bus contention problems.
Proven Intel reliability
Like all our EPROMs, your 2732As are put through rigid quality control tests to insure they'll retain their programs and programmability for years to come.
And like all Intel products, the 2732A is backed with our traditional field support and technical documentation. Which means, if needed, you always have a source for technical information and design help to speed development along.
So whether you're designing a system around one of the new 16-bit microprocessors, like our 8086, designing in a high performance 8-bit processor, or upgrad-
ing an existing design, don't wait. For a cost effective, reliable, and total EPROM solution, with a no-compromise growth path, your best choice is the 2732A.
2732A
64K
Pin Configuration Pin Configuration
v,,.
A,,
Vee
A,
A,
A,
A,
A,,
A,
OEN..
A,,
CE
Vee
PGM
N.C.
A,
A,
A,,
6E
A,,
CE
O, O,
O,
o.
O,
The 24-pin 2732A pinout conforms to the 28-pin JEDEC committee approved design for byte-wide memories. By using 28-pin sockets, there's no need for delays in upgrading to the 64K, 128K, or 256K EPROMS of the future .
Why add any unnecessary delays? To order now, or for more information-contact your local Intel distributor or sales office. Or, write
Intel Corporation, Literature Department, 3065 Bowers Avenue, Santa Clara, California 95051. Or call (408) 987-8080.
* HMOS is a pacenced lncel process.
inter delivers
solutions.
Europe: Intel International. Brussels, Belgium. Japan: Intel Japan,Tokyo. United States and Canadian distributors: Alliance, Almac/Stroum, Arrow Electronics, Avnet Electronics, Component Specialties, Hamilton/Avnet. Hamilton/Electro Sales, Harvey, Industrial Components, Pioneer, L.A.Varah, Wyle Distribution Group, Zentronics,
CIRCLE 124 ON IN9UIRY CARD
48e
TECHNOLOGY REVIEW
Turnkey System Offers Alternative to Automated Drafting System
Design Graphix is a turnkey interactive compute~ graphics and design processing alternative to automated drafting systems. Developed by Engineering Systems Consultants, Inc, PO Box 80318, Baton Rouge, LA 70898, the basic system consists of 64k-byte CPU, dual-drive, doubledensity floppy disc system, 11" graphics CRT, and 3-dimensional drafting software system.
Operating on any Digital Equipment Corp PDP-11 series computer system under RT·l l or RSX·llM, the graphics system encompasses seven distinct functions; geometrics, text en· try, utilities, modifications, editing, text editing, and a structured process facility. A dedicated processor (LSI·ll /03, -11/23, or PDP-11 /34) and !OM-byte disc form part of each workstation, permitting one station to go down without affecting the rest of the system. Tektronix or compatible CRTs are used for maximum reliability, and plotters from Tektronix or Calcomp can be shared by multiple stations. The unit provides a 4-channel serial line interface and onboard 1200-baud communications modem.
System software supplies a disc management subsystem to handle the disc data base, anticipate read requests and overlap 110, and maintain directory and unused area table. The intelligent display processor bypasses nondisplayed data, improving display times an average of 10 to 1 over comparable units. Calculator function and full logic programming language are provided by the optional structured programming facility which features high speed and minimum memory requirements. Networked design of the software allows stations to communicate to transfer files to/from the host processor, or with large mainframes on a timesharing basis.
Features of the graphic system allow users to create line work and geometrics; insert text and figures; and rotate, scale, and translate. Multiple
layers and pen selects and comprehensive display handling functions are supported, as are database search and geometric construction and local and remote plotting.
Capacity to perform both engineering and design computations is accomplished by design system software. This system accepts existing programs and can communicate with timesharing services. Among the available pro· grams are coordinate geometry, earthwork, slope stability, contour mapping, and network synthesis and analysis. Other programs supply capability to perform project scheduling, resource distribution, population and traffic density and analysis, storm run-off analysis, and flood plain study and analysis. The system is able to make use of all graphics system capabilities.
Circle 430 on Inquiry Card
Disc Controller Firmware Emulates RK611 /RK06 Subsystems
SCOl/C and SC 11/C disc controllers permit LSI-11 and PDP·ll users to emulate DEC's RK61 l/RK06 disc subsystems. Intended to support the growing demand for cartridge module drives, the model C from Emulex Corp, 2001 E Deere Ave, Santa Ana, CA 92705 allows the combination of fixed and removable logical units to be selected for maximum capacity.
Controllers duplicate the architectural features of the equivalent DEC subsystem to provide complete transparency with software written for the RK06, including diagnostics and operating system software. Because the controller are implemented through a firmware adaptation of the basic SCOl and SCll hardware, updates can be effected by simple changing a P/ROM set.
Separate disc drive registers, rotational position sensing, extensive error reporting with 32-bit error detection and 11-bit error burst correction, as well as dual-port drive operations are features of the units. An internal self-
test on powerup with LED display of error conditions are provided; the controller can execute a subsystem diagnostic when it is initiated by the operator, with resulting errors displayed on the LEDs.
A 3-sector (1536-byte) disc I/O buffer eliminates data late errors even when operating at low bus priorities. Successive multiple adjacent sector transfers across tracks in the same cylinder are handled without a disc rotation or requiring a sector interlace scheme.
The units provide either 2- or 4-word transfer per bus grant to give adequate data throughput without adding excessive bus latency or locking out interrupt requests from other devices. Transfers consume less than 2.4 µ.s/pair of words transferred. A programmable bus OMA bandwidth control permits windowing of controller bus transfers to guarantee periodic access for low priority devices.
Circle 431 on Inquiry Card
Automated PC Board Tester Speeds Production Testing
Model 4400, designed for high speed handling and testing of bare or loaded boards, moves PC boards from the feed conveyor through the test cycle on a rotary indexed multistation table. To meet individual test requirements, Electro-Mechanical Laboratories, Inc, 2 Oakwood Ave, Norwalk, CT 06850 offers a variety of system options and the choice of supplied computrized testing or an interface/adapter to the customer's computer/tester.
Among the design options are facilities to accomplish bare board, stuffed board, continuity, high voltage leakage, functional, and incoming pass/fail testing. Accommodation of board sizes up to 12 x 12" is standard; other sizes require a special request. Production speeds can range up to 50 boards/min or 24k boards in an 8-h shift, depending on test time and other factors.
Circle 432 on Inquiry Card
(continued on page 50)
48f
COMPUTER DESIGN/JULY 1980
Dear System Manager:
Is your success just a matter of time?
(Real Time, That Is)
It is not access time or record transfer time alone that is importan t. It is the complete read and write cycle t ime that is essential. Design your system with Librascope's RD - 433 MASS MEMORY like this :
.. .
aircraft, helicopters, rugged terrain vehicles, or transportable shelters.
The RD-433 is an off-the-shelf, self- contained, high speed head-per-track, fully militarized disc memory subsystem - qualified for the worst of environments, where non-volatility and reliability are paramount. Librascope Mass Memories are:
~ompatible with computers AN / UYK-7,
AN/AYK-14, AN/UYK-15, AN/UYK-19, AN / UYK-20, AN/UYK-27, and Univac 1616.
*urrently employed in the U.S. Navy's TACINTEL, BOR-24, and TRIDENT I R2 programs - and in the U.S. Coast Guard's new WMEC-270 Cutter Program.
SO INCLUDE THE RD-433 IN YOUR SYSTEM BRAINSTORMING ... whether you are working with surface ships, submarines, fixed - w ing
The complete read or write cycle time -for the RD-433 averages 20 milliseconds. This is twice as fast as the best of moving arm files, fixed head discs, and disc packs. Bubble memories don't even come close to these speeds and may never catch up. The RD-433 and Librascope's other head-per-track militarized Mass Memories are winners wherever high speed is crucial to limited CPU memory capacity.
For more information, write or call:
Librascope Division, The Singer Company Department AA, 833 Sonora Ave. Glendale, California 91201 Telephone : (213) 244-6541, X1891
ILibrascopeJ
a division of The SINGER Company
CIRCLE 125 ON INQUIRY CARD
Technological leadership.
Cut equipment cost down to size with our 65 W,
multi-output, mini switcher.
Now you have a full-featured, switching power supply with all the quality and reliability of bigger, more expensive units without all the cost ... Motorola's 50 W to 65 W, OFS65, open-frame switcher family for terminal, display, MPU and other low-power system applications.
Less parts, more MTBF.
Cooler and more efficient than equivalent linears, parts count is about 20% less than similar switcher types-also a key cost-reducing element. No fans are required for cooling the design which boasts about 2 W output per cubic inch. Efficiency for the triple-output unit is approximately 65%.
Full protection for selfand system.
Small and lightweight (about 20 oz.). the OFS series is fully self-protected from abuse at output terminals. Shorts and opens can't damage it with high, low or in-between input voltages. Overload simply causes periodic recycling with normalcy restored when overload is gone.
And if your system's going to crash due to power line failure, it sends a warning signal to the MPU to unload volatile memory with output voltage remaining within regulation for 32 ms after loss of nominal line voltage. That's about twice as long a spec as some others offer.
, Of course, it provides EM! filter on input. soft start and reverse polarity protection.
Standard, 24-hour burn-in is included with reliability ensured through computer-aided, worst-case analysis and individual testing of every IC and discrete device.
Excellent line regulation of ±0.15% is provided on all outputs: load regulation is 1% on all positive outputs and 6% on the negative outputs.
Best of all, OFS published prices are down where they should be: $130, 100-249, with very competitive quantity pricing.
Customs, too.
Other sizes and performance ratings are G available for individual needs.
And you have Motorola's reputation for quality, integrity and conservative design in ._,.r;;;;;:a...;;;.;......-..li.,;,I every one of these new
Innovative systems through silicon.
® MOTOROLA INC.
48h
CIRCLE 127 ON INQUIRY CARD
COMPUTER DESIGN/JULY 1980
Nosey, nosey, nosey.
We nosed around and found just what you need to cut months off your floppy subsystem development time.
Exceptional features, a single pre,developed package and easy integration. That's what you get for starters.
Our Pertee®3812 Microperi, pheral®bundle gives you more. A full megabyte of microcomputer formatted storage. Two floppy disk drives. A proven power supply. And a built,in controller with single,, double, and dual, density capacity that handles up to four
drives. Use our 5,100 bus, Intel
MultibusTM, Motorola ExorcisorTM or other available interfaces.
It operates under CP/M®and
supports Microsoft's FORTRAN, COBOL and BASIC.
Satisfy your other curiosities ... call (213) 996,1333 (Western Region); (603) 883,2100 (Northern Region); or (305) 784,5220 (Southern
Region). Or write for our new
full,line peripherals brochure. Pertee Computer Corporation, Peripherals Division, 21111 Erwin Street, Woodland Hills, California 91367.
You can't beat the sweet smell of success.
CP/ M is a registered trademark of Digital Research, Inc .
PEAi PH EARLS
© 1980 Pertee Computer Corporation
CIRCLE 25 ON IN9UIRY CARD
TECHNOLOGY REVIEW
Multipurpose Computer System pesigned For Versatility
ME29 high performance, multipurpose medium powered computer systems use a microprogrammed processor operating at speeds greater than 3M instructions/s. Data throughput of the machine is claimed to be five times greater than that of its predecessor, the 2904/50. ICL Computers Canada Ltd, I Trippett Rd, Downsview, Toronto, Ontario M3H 2VI, Canada, states that the machine competes with IBM Systems/34, /38, and 4331 with prices 10 to I5% lower.
Heart of the system is a microprogrammed processor that operates at speeds above 3M instructions/s. The machines offer main memory capacities of 256k to IM bytes. Disc storage builds from 35M bytes to a total of I6G bytes. Multipurpose workstations in the system serve as transaction processing terminal, interactive terminal, operator console, or direct data entry terminals.
Central processor in the ME29 has two separate memories-the main memory and a high performance microcoded control memory. Main memory uses I6k-bit chips to form I28k-byte modules having an access time of 4 bytes/750 ns. The model 35 permits main memory to expand from 256k to IM bytes; the model 45 expands from 384k to IM bytes.
Either 64k or I28k bytes of control store are available for system microcode. This store cycles at I55-ns nominal with a prefetch mechanism enabling most operations to occur in 93 ns. Additional hardware in the model 45 yields almost double the processing power of the model 35.
Five disc storage modules are available to meet storage requirements from 35M to 16G bytes. Modules include 35M-byte fixed disc drives, removable 60M-byte drives, I20M-byte fixed disc drives, combination I20M-byte fixed/60M-byte removable disc systems, and 500M-byte fixed disc system. One or two flexible disc drives within the CPU cabinet provide for convenient data and software input. Each has capacity for IM bytes. Other attachable peripherals include magnetic
CARD READER
LINE PRINTER
DISKEnE
HARD COPY PRINTER
VISUAL OISPlAY UNITS
COMMUNICATIONS HOST COM PUTER
LINKS
VIEWOATA UNITS
VIEWDATA CONTROLLERS
WORKSTATIONS (MA~ 14)
ME29145 PROCESSOR
128k-BYTES MICROCODE CONTROL STORE
384k lo IM BYTES MAIN MEMORY
OUTPUT PERIPHERALS
INPUT PERIPHERALS
DISC STORAGE UNITS
ME29 model 45 from ICL Computers Canada offers versatile communications facilities through simple user interface. Processor instructions are implemented via microprogram residing in control store .. Separate from main memory, this store operates at 155 ns nominal; main memory cycle time is 750 ns
tape transports, line printers, matrix printers, and paper tape and card equipment. Workstations comprise a 2000-char screen with comprehensive keyboard. Up to 24 workstations connect locally to the computer; up to I2 of these may be used for direct data entry. Any of the 24 may be used for transaction processing, opera tor console, program development work, or use of HELP or DIALOG systems.
Asynchronous and synchronous multiple line communications couplers (AMLCC and SMLCC) may coexist on the system. Each AMLCC provides connection for eight local devices which can be workstations or matrix printers. SMLCCs provide connectivity for up to eight local or remote communications lines.
More than 200 visual display units, hardcopy printers, and floppy discs linked to model 7500 terminal pro-
cessors can be controlled by one computer. Connection between terminal processor and host is by telephone lines and SMLCC.
TME (Transaction Machine Environment) operating system for use on the system adds a leaf addressing mode to the executive and object .modes of the EXEC 35 sys tern used on 2903/4 · and DME/2 systems. This mode incorporates many virtual memory function s by writing system program activities on a number of leaves and bringing the appropriate one into main memory when needed. Using this mode new system functions may be introduced without disturbing the operating system base.
Both Data Management System and Data Di.ctionary Systems are implemented to administer data bases. Languages include COBOL, FORTRAN, RPG II, BASIC, and ALGOL.
Circle 429 on Inquiry Card
50
COMPUTER DESIGN/JULY I 980
~:3)I[§ill
Keyboard Send-Receive Data Turminal
Dual 5x 7 dot matrix printhead
with last character
EIA RS-232-C or DC-current
printed visibility
loop interface
120-cps optimized bidirectional thermal printing
Full ASCII keyboard with 128-character set
1000-character receive buffer (optional 2000 - - -
character)
Self-test diagnostics - - - capability
Full or half duplex / operation
Operator selectable data transmission rates of 110 BPS to 9600 BPS
Ideal for commercial applications, Tl's Silent 700 *Model 783 KSR Data Terminal can master your workload with high-quality, efficient thermal printing. Offering a variety of user-oriented standard features and options, the virtually silent 783 KSR takes less work space while it maximizes printing throughput. That's why the versatile 783 KSR was designed to handle your most demanding
printing tasks. TI is dedicated to producing
quality, innovative products like the 783 KSR Data Terminal. Tl's hundreds of thousands of data terminals shipped worldwide are backed by the technology and reliability that come from 50 years of experience, and are supported by our worldwide organization of factory-trained sales and service representatives.
For more information on the
783 KSR, contact the TI sales of-
fice nearest you or write Texas
Instruments Incorporated, P.O.
Box 1444, M/S 7784, Houston,
Texas·77001, or phone (713)
937-2016. In Europe, write Texas
Instruments
Fifty Years
Incorporated,
1nnc5'Sation
M/S 74, B. P. 5, ~ 0
Villeneuve-Loubet, u1
06270, France. .
·1fademark of Texas Instruments tService Mark of Texas Instruments Copyright © 1980, Texas Instruments Incorporated
CIRCLE 129 ON IN9UIRY CARD
51
GenRad/Futuredata delivers Intel, Zilog, Motorola, Rockwell, R!
WE SUPPORT MORE CHIPS
When it comes to developing development systems that support more microprocessors, no one can touch us. Our universal development system doesn't box you in with a single chip or chip family. Our system sets you free to design with any or all of the most popular processors.
In your smart-product race through the'BO's, switching development systems will be the pits. With·our system that won't be necessary.
WE ADD NEW CHIP SUPPORT FASTER
Thanks to our unique slave emulation system we can add new chips to your system in a matter of weeks. Remember, we don't make the chips - just the development system. And we don't have to redesign our system for each new chip - we just add another slave emulator. And, that's all you pay for. So, we're faster and more economical, too.
WE SET THE PACE FOR EMULATION
Ours is the only system capable of delivering transparent, non-stop, full-speed emulation
52
REGISTER OFFSET DISPLAY WIND OW
to 10 MHz. And it's the only system capable of emulating many different processors simultaneously.
li'ailsparent, non-stop, fullspeed emulation takes all the guesswork out of choosing the right microprocessor for your application. It allows you to evaluate each chip thoroughly, accurately and objectively.
The ability to emulate several different chips simultaneously paves the way to development of smart products using more than one processor.
TYPICAL 8086 SNAPSHOT
The 2302 Slave Emul ator allows you to view your program in single-step, snapshot or logic ana lyzer modes . This view can be formatted to match your requirements even fo r the most complex memory segmenta ti on, interrup tdriven or multi-processor environments.
WE KEEP YOU IN THE FAST LANE
Our system has been designed to make hardware and software development fast, efficient and productive. With our high-speed CRT, highlevel language programming and powerful software, things happen fast - sometimes instantaneously. Now available with highly block structured PASCAL compilers, our system can cut your programming time by 50% or more.
2300 Series multi-station networks share disk and printer with up to eight stations. Each station is universal and may be ordered with the software and/or hardware capabilities required. ·
WE DELIVER THE MOST COST-EFFECTIVE SOLUTION
Lower initial cost, universality and expandability make our system a prudent, long-term investment. Any of our systems can be upgraded to network status. By sharing costly and under-utilized resources (disks, printers, emulators, analyzers and even software) you can stop paying your designers to stand in line. Networking can lower your cost-per-station by 20% or more.
WE'RE HERE TO STAY
There is no finish in the smartproduct race. To stay ahead you're going to need flexible, productive, expandable development systems and a supplier with staying power capable of giving you in-depth, after-sale service and support. Ask for .a demonstration of the 2300 Series Advanced Development System. Sales and service offices in major cities.
Gen Rad
future@@~@
GenRad!Futuredata 5730 Buckingham Parkway Culver City, CA 90230 (213) 641-7200. 1WX: 910-328-7202.
GenRad/Futuredata universal development systems expanding your ·world of microprocessor-based design.
CIRCLE 27 ON IN9UIRY CARD
Three very good reasons why you should give TI four hours of your time.
Tl's newAdvanced Bipolar Logic seminars start Monday, August 11.
On Monday, August. 11, TI is kicking off a new series of seminars that will examine the role of bipolar logic design. A series of seminars that will provide an in-depth look at performance, power and reliability improvements with AS/ALS - for better systems solutions.
It's a different kind of seminar. Learning-intensive. For system designers who need to know what the future holds for Advanced Schottky, Advanced LowPower Schottky and Low-Power Schottky.
The agenda will fill you in
on the specific topics to be discussed, and we'll focus on information you can use right away. (Along with samples, data sheets and handouts that you can take away.)
Information that could give you the competitive edge today for leading state-of-the-art products tomorrow.
We know you'll be anxious to get started applying what you learn. But stay for lunch. It's free.. And besides, that's when we'll be giving away a TI 59 - an extraordinary card programmable calculator with
plug-in Solid State Software* and
magnetic card storage - it's the
pride of every engineering
professional.
For complete information and
to guarantee yourself a seat (sorry,
only preregistered attendees are
eligible to win the calculator) call
your local TI field sales office or
authorized distributor at least one
week prior to the semi-
nar in your area.
Fifty Years
The dates, locations, names of contacts and phone numbers are listed on the right.
Innc°Jation
~
'Trademark Texas lnslruments lncorporaled
TEXAS INSTRUMENTS
© 1980 Texas Instruments Incorporated
INCORPORATED
84618
Agenda
·Tl's Schottky Families for the '80s ... characteristics, applications and compatibility: · Low-Power Schottky ·High-performance Schottky · Second Generation Families: · Advanced Schottky ·Advanced Low-Power Schottky
· New product previews · Quality/reliability improvements · High-density packaging innovations:
·Chip carrier packages ·New 24-pin DIPs
Dates, Locations, Contacts
Date
Location
Contact
August 11 Boston (Waltham)
Jack Edick
August 13 New York (Melville)
Chuck Messmer
August 15 New Jersey (Clark)
Terry Manton
August 18 Philadelphia (Ft WashinJiton) Ken O'Connor
August 20 Washington (Arlington, A) Jim Myers
August 22 Florida (Ft Lauderdale) Hank Keuhler
August 25 Minneapolis (Edina)
Roger Scott
August 27 Chicago (Arlington Heights) Dave Nesbitt
Phone
617 890-7400 516 454-6616 . 201 574-9800 215 643-6450 703 553-2200 305 973-8502 612 830-1600 312 640-3000
Date
Location
Contact
August 29 Dallas
Jim Roundtree
Sept 8 Denver
Ken Mudge
Sept 10 Seattle (Bellevu~
Dave Burkhart
Sept 12 San Francisco ( unnyvale) Tom Addie
Sept 15 Phoenix
Bill Tanner
Sept 16 Los Angeles (El Segundo) Jim Davi
Sept 17 OranBe County (Costa Mesa) Joe Favela
Sept. 19 San iego
John Lucas
Phone
214 995-6531 303 695-2800 206 881-3080 408 732-1840 602 249-1313 213 973-2571 714 540-7311 714 278-9600
TI Distributors
ALABAMA: Huntsville , Hall-Mark (205) 837-8700 .
ARIZONA: Phoenix, Kierulff Electronics (602) 243-4101 ; R.V. Weatherford (602) 272-7144; Tempe , Marshall Industries (602) 968-6181 .
CALIFORNIA: Anaheim , R.V. Weatherford (714) 634-9600; C1noga Park , Marshall Industries (213) 999-5001 ; Chatsworth, JACO (213) 998-2200; Costa Mesa, Tl Supply (714) 979-5391 ; El Monte, Marshall Industries (213) 6860141 ; El Segundo , Tl Supply (213) 973-2571 ; Glendale , R.V. Weatherford (213) 849-3451 ; Goleta, RPS (805) 964-6823; lrvlne, Marshall Industries (714) 556-6400; Los Angeles, Kierulff Electronics (213) 725-0:l25; RPS (213) 748-1271 ; Mountain View, Time Electronics (415) 965-aooO; Palo Alto, Kierulff Electronics (415) 968-6292; Pomona , R.V. Weatherford (714) 623-1261 ; San Diego, Arrow Electronics (714) 5654800; Kierulff Electronics (714) 278-2112; Marshall Industries (714) 278-6350; R.V. Weatherford (714) 278-7400; Santa Bar· bua, R.V. Weatherford (805) 465-8551 ; Sunnyvale , Arrow Electronics (408) 739-3011; Marshall Industries (408) 732· 1100; Tl Supply (408) 732-5555; United Components (408) 737-7474; Torrance, Time Electronics (213) 320-0880; Tustin, Kierulff Electronics (714) 731-5711 .
COLORADO: Denver, Arrow Electronics \303) 758-2100, DiplomaUOenver, (303) 427-5544; Kierulff Eectronics (303) 3716500; Englewood, R.V. Weatherford (303) 770-9762 .
CONNECTICUT: Hamden, Arrow Electronics (203) 248-3801 ; Tl Supply (203) 281-4669; Orange, Milgray/Connecticut (203) 795--0714; Wallingford , Wilshire Electronics (203) 265-3822 . FLORIDA: Clearwater, ·oi plomaVSouthland (813) 443-4514 ; Ft. Lauderdale, Arrow Electronics (305) 776-7790; DiplomaV Ft. Lauderdale (305) 971-7160; Hall-Mark/Miami (305) 971 9280; Orlando, Hall-Mark/Orlando (305) 855-4020; Palm Bay, Arrow Electronics (305) 725-1480; OiplomaVFlorida (305) 7254520; St. Petersburg, Kierulff Electronics (813) 576-1966; Winter Parle, Milgray Electronics (305) 647-5747 . GEORGIA: Doraville, Arrow Electronics (404) 449-8252 ; Normiss, Wilshire Electronics (404) 923-5750 . ILLINOIS: Arlington Heights, Tl Supply (312) 640-2964; Bensonvllle, Hall-Mark/Chicago (312) 860-3800: Elk Grove VII· lage, Kierulff Electronics \3f2) 640-0200; Chicago, Newar1< Electronics (312) 638-441 ; Schaumburg , Arrow Electronics (312) 893-9420. INDIANA: Ft. Wayne, Ft. Wayne Electronics (219) 423-3422; tndlanapolls, Graham Electronics (317) 634-8202.
IDWA: Cedar Rapids, Deeco (319) 365-7551.
KANSAS: Lenexa , Component Specialties (913) 492-3555 ; Shawnee Mission, Hall-Mark/Kansas City (913) 888-4747 ; Wichita , LCOMP Inc. (316) 265-8501.
MARYLAND: Baltimore, Arrow Electronics (202) 737-1700, (301) 247-5200 ; Hall-Mark/Baltimore (301) 796-9300; Colum· bla , DiplomaVMaryland (301) 995-1226; Rockville, Milgray/ Washington (301) 468-6400.
MASSACHUSETTS: Biiierica, Kierulff Electronics (617) 6678331; Burlington, Wilshire Electronics (617) 272-8200; Waltham, Tl Supply (617) 890-0510; Woburn, Arrow Electronics (617) 935-8080; fime Electronics (617) 9.35-8080.
MICHIGAN: Ann Arbor, Arrow Electronics (313) 971-8220; Oak ~ark, Newark Electronics (313) 967-0600; Grand Rapids, Newark Electronics (616) 241-6681.
MINNESOTA: Edina, Arrow Electronics (612) 830-1800; Ply· mouth , Marshall Industrials (612) 559-2211 .
MISSOURI: Earth City, Hall-Mark/St. Louis (314) 291-5350; Kansas City, Component Specialties (913) 492-3555; LCOMP Inc.-Kansas City (816) 221-2400; St Louis, LCOMP Inc.-St. Louis (314) 291-6200.
NEW HAMPSHIRE: Manchester, Arrow Electronics (603) 6686968 .
NEW JERSEY: CAMDEN, General Rad io Supply (609) 9648560; Chtiny Hiii, Milgray/Delaware Valley (609) 424-1300; Clarie, Tl Supply (201/ 382-6400; Clifton, Wilshire Electronics (201) 340-1900; Fair! eld , Kierulff Electronics (201) 575-6750; Moorestown, Arrow Electronics (609) 235-1900; Saddlebrook, Arrow Electronics (201) 797-5800.
NEW MEXICO: Albuqueniue , Arrow Electronics (505) 2434566; International Electronics (505) 262-2011 : United Components (505) 345-9981.
NEW YORK : Endwell, Wilshire Electronics (607) 754-1570; Farmingdale, Arrow Electronics (516) 694-6800; Freeport, Milgray Electronics (516) 546-6000, N.J. (800) 645-3986; Hauppauge, Arrow Electronics (516) 231-1000; JACO (516) 273-5500; Liverpool , Arrow/Syracuse (31 5) 652-1000 ; Melville, Diplomat (516) 454-6334; New Yorll, Wilshire Electronics (212) 682-8707; Rochester, Arrow/Rochester (716) 275-0300; Rochester Radio Supply (716) 454-7800; Wilshire Electronics (716) 235-7620 .
NORTH CAROLINA: Raleigh, Hall-Mark (919) 832-4465; Win· ston-Salem, Arrow Electronics (919) 725-8711 .
OHIO: Cleveland, Tl Supply (21~ 464-6100; Columbus, HallMark/Ohio (614) 846-1882; lla on, ESCO Electronics (513) 226-1133; Marshall Industries (! 13) 236-8088; Kettering, Arrow Electronics (513) 253-9175; Reading, Arrow Electronics (513) 761-5432; Solon, Arrow Electronics (216) 248-3990.
OKLAHOMA: Tulsa, Component Specialties \918) 664-2820; Hall -Mark/Tulsa (918) 835-8458; Tl Supply (9 8) 149-9543.
OREGON: Beaverton, Almac/Stroum Electronics (503) 6419070; Miiwaukie, United Components (503) 653-5940 .
PENNSYLVANIA: Huntington Valley, Hall-Mark/Philadelphia (215) 355-7300; Pittsburgh, Arrow Electronics (412) 3514000 .
TEXAS: Austin, Component Specialties (512) 837-8922; HallMark/Austin (512) 837-2814; Dallas, Component Specialties (214) 357-6511; Hall-Mark/Dallas (214) 234-7400; International Electronics (214) 233-9323; fl Supply (214) 238-6821 ; El Paso, International Electronics (915) 778-9761 ; Houston, Comfonent Specialties (713) 771-7237; Hall-Mark/Houston (713 781-6100; Harrison Equipment (713) 652-4700; Tl Supply ( 13) 776-6511 .
UTAH: Salt Lake City, Oiplomat/Altaland (801) 486-4134; Kierulff Electronics (801) 973-6913.
WASHINGTON: Redmond , United Components (206) 8851985; Seattle, Almae/Stroum Electronics 1·206) 763-2300, Kierulff Electronics (206) 575-4420; Tukw la , Arrow Electronics (206) 575-0907. WISCONSIN: Oak Creek, Arrow Electronics (414) 764-6600; Hall-Mark/M ilwaukee (414) 761 -3000; Waukesha , Kierulff Electronics (414) 784-8160.
CANADA: Calgary, Cam Gard Supply (403) 287-0520; Downsview, CESCO Electronics (416) 661-0220; Edmonton , Cam Gard Supply (403) 426-1805; Halifax, Cam Gard Supply (902) 454-8581; Kamloops, Cam Gard Supply (604) 372-3338; Moncion, Cam Gard Supply (506) 855-2200; Montreal , CESCO Electronics (514) 735-5511; Future Electronics (514) 731-7441; Ottawa, CESCO Electronics (613) 729-5118; Future Electronics (613) 820-8313; Quebec Clty, CESCO Electronics (418) 687-4231; Regina, Cam Gard Supply (306) 525-1317; Saskatoon, Cam Gard Supply (306) 652-6424; Toronto , Future Electronics (416) 663-5563; Vancouver, Cam Gard Supply (604) 291-1441; Future Electronics (604) 438-5545; Winnipeg, Cam Gard Supply (204) 786-8481 .
55
TECHNOLOGY REVIEW
.Desktop Computer System Displays Graphics In 491 3 Colors
Integrating graphics computation and color display in a desktop unit, HP series 9800 system 45C offers the power to solve complicated computational, design, and data acquisition and control problems. Hewlett-Packard Co, 1507 Page Mill Rd, Palo Alto, CA 94304, has packed built-in color graphics CRT display, light pen, operating system, read/write memory, enhanced BASIC language, keyboard, mass storage system, and thermal line printer in an interactive unit that is easy to use, and can handle problems that range from Fast Fourier Transforms to multiple linear regressions and project management.
Graphics computation power of the system stems from the combination of graphics language, high performance processor, and large user memory. Since the operating system as well as standard display, graphics, and control functions are contained in 152k bytes of ROM, 187k bytes of RAM are available to user programs and data. Memory expands up to 449k bytes.
The system provides 70 graphics statements which relieve the user of many programming tasks such as generation of geometric figures. Geometric figures such as circles, rectangles, regular polygons, and objects represented in matrices are drawn on the CRT through simple commands. An additional file parameter quickly adds color fill to any drawn figure.
System CRT uses a shadow mask tube incorporating a screen covered with triads of dots with red, green, and blue emissions. Each phosphor type is activated by an electron beam from a corresponding electron gun. A metal shadow mask guides beams so that, for example, only beams from the green gun hit green phosphors. This provides the eight basic colors. The remainder of the 4913 displayable colors are produced using a technique called dithering. In this process the 560 x 455 graphics raster CRT is divided into 4 x 4 arrays each containing 16 pixels (picture elements) which can be turned on or off. The variou~ combinations of
pixels being turned on or off in three different memory planes produces color shades on the CRT.
A built-in system ROM provides the programming tools necessary for powerful color graphics processing. The CRT offers high quality resolution, crisp color, and high speed vector writing. A light pen provides a fast easy way to pick, move, and construct objects directly on the screen. The pen permits selection of a single pixel; a second order, predictive algorithm located in firmware moves the cursor in the direction and speed of light pen motion.
Capable of displaying 4913 colors, Hewlett-Packard's System 45C constitutes a complete workstation. CRT display, light pen, operating system, read/write memory, BASIC language, mass storage system, and line printer in· tegrated into unit furnish capc.oility for solving complex graphics computational problems and displaying 3-dimensional representations of solutions
When hardcopy of the display is needed, a command input through the keyboard results in transfer of the image to the built-in thermal printer. This printer outputs at 480 lines/min, duplicating color images in shades of gray. Tape drives built into the mainframe provide storage for 217k bytes of data or programs.
In a standard configuration, the computer system includes color CRT and color graphics firmware, interac· tive light pen, 187k bytes of user read/ write memory, two 217k-byte cartridge tape drives, and internal 80-col, 480-line/min thermal printer. The system uses enhanced BASIC language; an optional assembly language pro·
gramming ROM is available for special control, 1/0, and speed enhancement. An entry level configuration providing 56k bytes RAM and one tape drive is priced at $31,500. The standard system sells for $39,500.
Circle 422 on Inquiry Card
Multipurpose Computer Provides Realtime Time-Critical Capabilities
The Cyber 170 model 740 computer, a multipurpose system from Control
Data Corp, Box 0, Minneapolis, MN
55440, provides realtime/time-critical network, scientific, commercial, and data management capabilities. The system is field upgradable to a Model 750 or 760. It is compatible with software and peripherals used with previous systems.
The CPU of the 740 consists of nine arithmetic functional units, each specialized for particular instruction types (Boolean, shift, normalize, in· teger add, floating add, multiply, divide, population count, and increment), which increases efficiency as compared to a unified CPU. The CPU uses subnanosecond ECL !Cs for high reliability, compact physical packaging, and low power requirements. An address instruction stack provides fast retrieval of previously executed ms tructions. Com pu ta ti on can be floating or fixed point, single-, or double-precision.
Central memory of the system is built with 4k static MOS chips that provide 400-ns memory access time. Memory size ranges from l.31M to 2.62M characters. Central memory is organized into eight logically independent, phased bands of 60-bit words that permit data to be either ten 6-bit characters or a floating point number with 48-bit coefficient and an 11-bit exponent. The phasing places successive addresses in different banks, permitting operation at much higher rates than the basic cycle time. Max data transfer rate is 10 char/50 ns.
The system can be configured to include one or two peripheral processor
56
COMPUTER DESIGN /JULY 1980
POWER·ONE D.C. POWER SUPPLIES
Now available for small systems applications
Power-One, the leader in quality open-frame power supplies, now offers a complete line of single , dual , and triple output models for small computer systems. Also available are special purpose models for Floppy Disk and Microcomputer applications.
Below are just a'few popular examples of the over 90 " off the shelf" models now available from stock.
SINGLE OUTPUT & LOGIC POWER SUPPLIES
· 56 "off the shelf" models
· 2V to 250V, 0.1A to 40A · ± .05% regulation · 115/230 VAC input
FLOPPY-DISK SERIES · 8 "off the shelf" models · Powers most popular drives · Single/dual drive applications · 2-year warranty
DUAL OUTPUT MODELS · 15 "off the shelf" models · ± 5V to± 24V, 0.25A to6A · l.C. regulated
· Full rated to + 50°C
TRIPLE OUTPUT MODELS
· 10 "off the shelf" models
· 5V plus ± 9V to ± 15V outputs
· Models from 16W to 150W
· Industry standard size
.. ·. SV@ 3A, w/OVP ~ n· ~
j .. "
.
·
·
I
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t rc_·
. . ., .
SV@ 12A, w/OVP
. ·1o. . ..........
· ~ "S . . . . . .
. _,_;_;_~~I
·
·. · L ····
HB5-3/0VP $24.95 single qty.
S12VV@@01.7.A1A, w/1/.O7AVPP/K f/.~~ 1··
HD5-12/0VP $79.95 single qty.
SV@ 1A, w/OVP -SV@ O.SA, w/OVP
. ., 24V@ 1.SA/1.7A PK
.. . . " . . .
. O· ~ : O 0
T,~ ~I~- · ~
CP340 For one 5.25'' Media Drive $44.95 single qty.
12V/15V@ 0.25A Nt:~
-~
CP205 For one 8.0' ' Media Drive $69.95 single qty .
SV@ 2A, w/OVP 9-15V@O.SA
HAD12-.25/ HAD15-.25 $32.95 single qty.
SV @ 2A, w/OVP ± 9Vto ± 1SV@ 0.4A
HTAA-16W $49.95 single qty .
HAA512 $44.95 single qty.
SV@ 3A, w/OVP
. . .. ± 12V@ 1Aor
± 1SV@ 0.8A
,,
. · i) "'
f- ~ :- ' - . ·-
HBAA-40W $69.95 single qty .
SK5-40/0VP Switching Model $250.00 single qty.
SV@ 2.SA, w/OVP - SV @ O.SA, w/OVP 24V @ 3A/3.4A PK
.·o·\..r.·!. ......,_;:
. · -- 1--=
- · " 0-"·. 0.
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. - .. ·· ~ .. -
CP206 For two 8.0'' Media Drives $91.95 single qty.
± 12V@ 1.7A or ± 15V@ 1.SA
HBB15-1.5 $49.95 single qty.
SV@ &A, w/OVP
± 12V@ 1.7A or
± 1SV@ 1.SA
'.c.'i- . .
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HCBB-75W $91 .95 single qty.
NEW 79' CATALOG!
Get Your FREE Copy Now!
Phone us direct or circle the reader service number below .
D.C. POWER SUPPLIES
Power One Drive · Camarillo, CA 93010 · (805) 484-2806 ·TWX 910-336-1297
CIRCLE 29 ON INQUIRY CARD
57
TECHNOLOGY REVIEW
subsystems. The basic subsystem consists of 10 peripheral processors and 12 data channels. The optional second subsystem can be selected to expand to 14, 17, or 20 processors with an additional 12 data channels. Each peripheral processor is a functionally independent computer comprised of 8k 6-bit char of MOS memory and an arithmetic section that supports a full repertoire of arithmetic and 110 instructions.
The system is supported by NOS (network operating system), a multimode operating system. Languages include COMPASS assembler language, FOR-
TRAN, COBOL, ALGOL, APL, SORT/MERGE,
BASIC, GPSS, SJMSCRIPT, and APT. The 170 is available for customer
benchmarking. Prices range from $1,492,500 for l.31M-char main memory, 10 peripheral processing units, and 12 1/0 channels to $1,836,210 for 2.62M-char main memory, 20 peripheral processors, and 24 l/O channels.
Circle 423 on Inquiry Card
CAD System Raises Design and Drafting Productivity
The Si:gmagraphics IITM computer assisted design (CAD) system from Sigma Design West, Ltd, 13693 E Iliff Ave, Aurora, CO 80014, should raise design and drafting productivity by at least 200%. The drafting system is built around a Z80-A microprocessor with l 76k-byte RAM. The basic system also includes 716k-byte minidiskette storage, a 36 x 48" (91 x 122-cm) digitizing tablet with 4-button cursor, a graphic CRT, a 36" (91-cm) drum plotter with 3 ink or ballpoint pens, and a 6-lines x 40-char plasma display for showing prompts, error messages, and other alphanumeric data.
SIGMAC is the operator command language. Its question and answer format guides users by requesting needed information, processing input, and clearly displaying progress every step along the way. The language contains
TAPE PUNCH $1315
50 chi s - 50-60 hz - 5, 6, 8 Level Roll & Fanfold Payout
Options RS-232C Interface* Take-up Reel/Bins - TTS Tape
TAPE READER $670
1,000 chis - 50-400 hz - 8 Level
Options RS-232C Interface* Unwinder/ Rewinder - Fanfold Bins 5, 7, 8 Level , TTS Tape
*ONE INTERFACE serves both Punch and Reader, $250
CHALCO ENGINEERING CORPORATION 15126 So. Broadway Gardena, California 90248
Since 1951
213-321-0121 TWX 91 0-346-7026
58
CIRCLE 30 ON INQUIRY CARD
all standard graphics functions plus calculator functions, provisions for user interaction, looping, and decision making capabilities.
With this drafting system, all plans can be computerized, common functions stored, and plans printed with increased speed and accuracy. Input is from a keyboard, from crosshairs on a CRT screen, or from the cursor on the digitizing table. Any combination of layers can be superimposed during design or output. The system can display and plot 3-dimensional output from 2-dimensional input.
Circle 424 on Inquiry Card
32-Bit Word Minicomputer Executes Multitasks Simultaneously
Designed for realtime, scientific, multita~king applications, the Systems 3217780 can execute multitasks simultaneously, yet is totally transparent to the user. In a multitasking environment, the 32-bit word processor from Systems Engineering Laboratories, Inc, 6901 W Sunrise Blvd, Ft Lauderdale, FL 33313, can provide up to 80% more performance than the 32/77.
The minicomputer is available in one packaged and three nuclei configurations. The basic nucleus configuration includes the central processing unit (CPU), intern.al processing unit (!UP), lM bytes of memory, and realtime option module. The second nucleus configuration adds two high speed floating point units, one each for the CPU and IPU. The third nucleus configuration also provides two scientific accelerators, one each for the CPU and IPU.
The packaged system is based on the third and largest nucleus. It includes a disc processor with SOM-byte disc, tape processor with 45 in (114 cm)/s, 1600/6250-bit/in (630/2460/cm) tape drive, teleprinter, line printer, card reader controller, CRT terminal, and MPX operating system. All components are packaged in two cabinets.
All configurations are available with either lM or 2M bytes of memory. Prices range from $84,000 for the basic nucleus to $145,000 for the packaged system with 2M bytes of memory.
Circle 425 on Inquiry Card
COMPUTER DESIGN /JULY 1980
TECHNOLOGY ~EVIEW
Two Proc es s or s Fill
Cost Performance
Gaps in Family
Completing the cost/performance range of the CLASSIC family, Models 7820 and 7840 are low and mid-range systems that use the MAX IV operating system. Introduced by Modular Computer Systems, Inc, 1650 W McNab Rd, Fort Lauderdale, FL 33~10, the 7820 is suitable for standalone or satellite use in data acquisition and control or monitoring applications; the 7840 meets needs of realtime measurement and control, communication, and information processing applications.
Model 7820 includes 128k bytes of error correcting MOS memory ; an upgraded version, the 7821 has capacity for 256k bytes. Both consist of 4-slot card file housing a single CPU/1/0 processor module and the single-board 2-way interleaved MOS memory circuit card. Remaining slots within the file permit customizing or expansion of the basic system.
A context register file containing 16 general purpose register banks, each with 15 registers, enables context switching among several tasks without having to save and restore register content. This feature, in combination with four address mapping files, expanded instruction set, direct memory processing I/O channels, and fast interrupt response, reduces system overhead to a minimum.
A mid-range processor, with 256k bytes of programmable -error correcting MOS memory, the 7840 is designed for realtime environments. Architecture of the unit processes formats that range from 1 to 64 bits in length.
An 1/0 connector panel used for peripheral interface accommodates remote file interface and extends the local 1/0 bus. The programmer's maintenance panel allows users to enter and display memory locations, and general or internal CPU registers. It can also be used to initiate console interrupts, master clear, file, run/halt, as well as additional maintenance functions.
The system uses the compatible MODCOMP II, MODCOMP IV, and CLASSIC instruction set, and can be used with
(continued on. page 62)
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CIRCLE 31 ON INQUIRY CARD
59
Doing micro system development?
Use.the complete hardware/softvvare integration station thats in tune with todays economy:
In today's inflationary economy; tools for developing micro systems not only need to be more sophisticated than ever before-they also need to be more cost effective. Get both with Millennium's pragmatic products.
Our new MicroSystem Emulator (µ,SE), with built-in real-time trace, supports designs based on the Z80A, 6800, 8080A, 8085A, 6802, 8041A, 8048, 8049, 8035, 8039, 8748, 8741A and 8021 with more on the way. It's the only way to add Distributed ICE to your existing micro system development capabilities.
What's Distributed ICE?
Distributed ICE solves some common microsystem design problems. It provides multi-user capabilities so that in-circuit emulation can be performed concurrently by a number of users while your development system is being used for software development. And it permits emulation of multiple microprocessors. With Distributed ICE, Millennium µ,SEs can turn your PDP-11, Nova or other minicomputer, or dedicated Intel, Motorola or Zilog software development system into a multi-user development network. Your engineers and development system become more productive.
PRINTER
CRT
MASS MEMORY
µ.SE
Here's how you do it.
You develop applications programs on your host system using cross-assemblers (which we also supply) and then download them into the µ,SE using standard hex over an RS232C serial link at rates up to 9600 baud. Our µ,SE becomes an intelligent terminal providing the distributed in-circuit emulation you need for rapid, efficient hardware/software
And you'll find that hardware/
software integration of micro sys tern designs is faster using our function-oriented keyboard with simple commands such as MEMORY. RUN/DISPLAY, PROM/MEM, I/O, BREAK, REGISTER, RUN and STEP to make complex jobs e asie r. (Time saved translates directly into
dollars saved. That's our bottomline orientation at work.)
integration. There is virtually no Real-time trace : fast ,
limit to the number of engineers one accurate debugging.
development system can support, because each low-cost µ,SE uses the host computer (or development
Today's micros are fast, and you need an in-circuit emulator that
system) only for downloading.
ICE'"' is a trademark of Intel Corporation.
60
COMPUTER DESIGN/JULY 1980
And our Micro-
System Analyzer
(µ.SA) is th e first test
system at any price (our
price is only $5350) to
In tune with
combine in-circuit emulation,
today's realities.
signature analysis and timedomain analysis in a single, port-
meets the challenge.
The µ. SE lets you do accurate debugging
beca use you do it in real time. No artificial wait states. Emulates at the highest clock rates specifi~d by the micro supplier. True real-hme emulation.
We want to help you save money and get increased capability. By using our µ.SE's for Distributed
ICE, you not only extend the capa-
able package. We'll be glad to supply complete data on either system. Or both . Just ask.
bility and usefulness of your present And that's the bottom line.
development system or minicomputer, you will also be able to get your new design out the door ahead of the competition. And in budget.
Economy. Performance.Universality. That's the bottom line in today's economy.
Advanced emulation control tools The µ.SE costs only $5000*, and
To get yourself started on the right
are part of the package. You ~ave emulation modules start at $1375. development track, call or write
dual breakpoints and dual triggers,
Millennium Systems today and ask
both using 35-bit comparators.
We help design and test
about the µS E. Besides telling you
And the µ. SE's real-time trace
micro systems, too.
all about Distributed IC.E, we'll
records 128 cycles 35 bits wide for faster debugging . A wide range of trace qualifiers, pass counts and delay counts expa nds your debugging capabilities.
Economically.
Our MicroSystem Designer (µ.SD) is a low-cost (under $2000) desk-top design and evaluation tool that's helpful in breadboarding, debugging and training. Support~ m~ny
include-FREE-a reprint of Millennium's "Designer's Guide to Testing and Troubleshooting µP- based Products". Our addr~ss: 19050 Pruneridge Ave., Cupertino , CA 95014. Telephone: (408) 996-9109.
of the important 8- and 16-b1t micros.
Were Millennium The bottom line in micro support
Millennium is a subsidiary of American Microsystems, Inc.
Circle 32 fo r Literature Ci rc le 130 for De mo nstra ti on
· A ll prices quoted a re single.uni t, U.S. prices only.
61
TECHNOLOGY REVIEW
MAX II, III, and IV realtime multiprogramming operating systems and MAXNET extensions for distributed network applications. Special hardware instruc.tions are oriented toward fast FORTRAN execution for users writing realtime tasks in FORTRAN.
Two I28k-byte memory modules are combined on a single board to form a full 256k bytes of 2-way interleaved memory/card. Memory can be expanded to IM bytes of local memory; the shared multiport option permits expansion to 2M bytes.
Two logical memory access paths allow concurrent CPU and 110 access capability, resulting in high 110 throughput without interrupting CPU process execution. Memory access overhead is reduced by allowing the 1/0 processor to execute a previously called instruction or conduct a DMI transfer while the CPU is accessing memory.
Virtual addressing in the system provides ability to address memories longer than I28k bytes, handle multiple dynamic tasks, address fragmented memory in a contiguous manner, and handle dynamic memory allocation.
Configured with . I28k-bytes memory, control panel, and hardware floating point, the 7820 sells for SI9,400. A 7840 with 256k-bytes memory, control panel, and 8-slot enclosure is $27,800. Shipments are scheduled for fourth quarter I980.
Circle 426 on Inquiry Card
Replacing the original series which required three power supplies, CM-90 dynamic memory modules are built using 2118 I6k-bit HMOS RAMs. Modules to be built using 64k HMOS RAMs will plug directly into CM-90 sockets allowing users to quadruple storage capacity with no system modifications. Also under development are 5-V replacements for 400- and 300-ns dynamic memory modules.
Operating at a 250-ns cycle time and storing up to 64k bytes, CM-92 static memory modules require 50% less power than previously available 100and I40-ns modules. Built using 2141 4k-bit HMOS static RAMs, the modules operate on a single 5-V supply.
Circle 427 on Inquiry Card
Small Business Computers Provide Users with Price/Performance Options
Enhancements to 2200 series computers present a range of options to entry level users. SVP and LVP small business computers, PCS-III, 2280 disc multiplexer, and IDEAS business application software were included in the announcement made by Wang Laboratories, Inc, One Industrial Ave, Lowell, MA OI851.
A single-user system, the SVP, programmable in BASIC-II, is offered with a 32k-byte processor, 2236 terminal, and double-density diskette. The system expands to 64k bytes and can support a I20-char/s printer, a second diskette, or 2M- or 4M-byte Winchester drives.
The high performance LVP supports up to four concurrent users. Features include a 2M-, 4M-, or BM-byte fixed disc storage system. Fast backup is supplied by dual-sided double-density diskettes which are format compatible with IBM 3741 diskettes and store IM-byte each. User memory is available in 32k-, 64k-, .or I28k-byte modules. 60k of machine memory removes most overhead from user memory.
Forming the low end of the series the PCS-III small business computer replaces the PCS-II. Use of doubledensity diskettes provides I40k-bytes capacity/drive with considerably improved data access speeds. This unit supports BASIC language programming.
IDEAS (Inquiry Data Entry Access System) software consists of system utilities that enable development of packages for data entry, inquiry, file management, and report generation applications. The software is designed to run on the entire series and to require minimal programming skills.
Circle 428 on Inquiry Card
Memory System Enhanced With Static and Dynamic 5 -V RAM Modules
High speed dynamic .and static memory modules added to the Series 90 Memory System family require only 5-V power supplies and can be directly upgraded with higher density modules such as 64k dynamic RAMs. Static memory modules operate at 250 ns. BXPTM bus architecture, designed into the systems by Intel Corp, Memory Systems Operation, 3065 Bowers Ave, Santa Clara, CA 9505I, allows choice of word lengths from I8 to 88 bits, and permits static and dynamic modules to be mixed in a single system.
Advanced technology of the multiterminal 2200 LVP computer system from Wang Laboratories allows faster computing and larger storage capacity within compact, expandable system. System uses 1M-byte dual-sided, double-density diskette and 2M-, 4M-, or BM-byte fixed disc . User' memory expands from 32k to 128k bytes
62
COMPUTER DESIGN/JULY I 980
BEEHIVE1S
terminal family
is designed for OEM planning
MODULAR CONSTRUCTION
Madel DM1A
EXPANDED CONVERSATIONAL
14 Key Numeric Pad . Line Draw ing .
21 Video Attributes. 128 ASCII Character Set
Madel DM20
EDITING
Full Editing Featu res. Buffer Transmission Modes.
Logical Attib utes. Protected Fields. 16 Function Keys
Madel DM30
ADDITIONA·L MEMORY
All features of the DM20, Multiple Page Capability,
ParaIle l Printer Port. Scrolling
Call for applications assistance and delivery
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"A proven competitive manufacturer of smart te rminals"
CIRCLE 122 ON INQUIRY CARD
63
TECHNOLOGY REVIEW
Business Computer Systems Expand to Use up To 32 Peripheral Devices
Control Center 2 is modular in design to permit incremental expansion from a basic system to one using more than 32 peripheral devices. Within the system, Infotecs, One Perimeter Rd, Manchester, NH 03103, has provided a decentralized system architecture for improved performance.
A basic system, cons1stmg of CRTfkeyboard terminal, 150-charfs impact printer, dual-drive floppy disc, two processor boards, and power supply housed in a control cabinet, runs a variety of software packages. Multiple dedicated CPUs (DPUs) are used to concurrently control operation of various system elements. As devices are at-
tached to the system, additional DPUs are added to control them. This eliminates the CPU slowdown usually · encountered as traffic load increases.
Five different option boards plug into the 32 slots avaiJable. Each board functions as a controller for a device and includes its own microprocessor with 32k bytes of memory. A CRT and printer controller, floppy disc controller, multiprinter controller, and general purpose controller for communications and other devices comprise the options.
The floppy disc drive uses two single-sided, double-density diskettes with capacity for storing IM-char each. Provision is made in the control cabinet for a second drive which raises capacity to 4M char total. Further storage is available with cartridge disc
units having 34M, 68M, or 102M char capacity. Up to eight of these units can be added to the system.
System CRTfkeyboard terminal has a separate 97-key keyboard layout with standard typewriter features and numeric keypad. CRT has 12" (30-cm) viewing area displaying 1920 char in 24 lines. In addition to the 150-charfs printer, a 340-charfs dot matrix model, a 3()()..line/ min band printer, and a 55-charfs letter quality machine are available.
Systems can be configured with as much as 800M char of online storage. Up to 16 CRT terminals can be used. The number of printers can expand to 24 including 8 system printers plus 16 printers associated with CRT terminals. Communication occurs through an RS-232 interface.
Circle 433 on Inquiry Card
SOFTWARE
Multiuser COBOL System Operates on DS990 Business Computers
COS990, a multiuser COBOL system for Texas Instruments 05990 model I and 2 business computer systems, features a flexible job description language and is source compatible with Tl's DXIO COBOL The package, developed by Ryan-McFarland Inc, 2111 N Mays, Round Rock, TX 78664, makes 30k bytes available to user programs in a 64k-byte computer. Directories, path names, and file types are logically equivalent with those of the DXIO operating system.
A flexible job description language makes provision for parameter passing, conditional execution, batch
streams, and access control of over 64k levels. Compiler, cross-compiler, and conversion utilities operate on the DXIO.
Circle 434 on Inquiry Card
Packages Extend Word/Data Processing System Capabilities
Operating system packages, introduced by Alpha Professional Systems, 9465 Wilshire Blvd, Los Angeles, CA 90212, extend the capability of the company's Alpha System 7 wordfdata processing systems. The Pegasus operating system features data communication, word processing file merge,
simultaneous printout of multiple queued documents, and financial computation.
Transfer of wordfdata processing files and correspondence at 300 to 2400 baud is facilitated by the communications package, allowing online conversation between workstations. Simultaneous printout permits documents up to 220k characters long to be queued to the printer. The system's file merge package allows a name and address file or other file to be merged with other word processing files. The financial program incorporates 23 separate functions including loan amortization, sinking funds, commercial paper, yields, depreciation, and future values. D
Circle 435 on Inquiry Card
64
COMPUTER DESIGN/JULY 1980
The 12-inch diagonal screen
can be swiveled and tilted to cut interference from overhead lighting. It displays a maximum ofl,920 character13 in24 lines. And there's a detachable contrast-
enhancingfilter.
THE ASCII TERMINAL FROM IBM. QUALITY YOU CAN SEE FOR YOURSELF
WITH OUR NEW 15-DAY TRIAL.
USE WITH AN IBM OR NON-IBM COMPU'f"ER
Our 3101, a versatile ASCII terminal, can be attached to most business computer systems - IBM or non-IBM - or used to access many remote computing and time-sharing services.
Whether your applications are budgeting, engineering, financial planning, interactive problem solving, or even simple data entry and retrieval , there's a place in your business for the 3101. Prices start at just $1,295 for the character transmission models.
If you're now using a hard-copy terminal to pe1form computer-based inquiries or calculations, the 3101 can display your information faster on a highresolution video screen. And if you're currently using a display, compare it to the 3101. We're so convinced of its high quality that we're offering a 15-day trial so you can see for yourself. Delivery of the 3101 can be as soon as 45 days.
When the 3101 an;ves, you simply connect three modular elements - the display, the logic element and the key-
board - plug it in, position the setup switches and put it into operation. It takes just a few minutes. The 3101 weighs 38 pounds so you can move it easily.
You can couple our 3102 printer to the 3101. You'll have the double convenience of displaying all your information, while capturing a hard copy of the data being displayed. The 3102 printer is lightweight and p11ced at just $1,295.
SELECTED SPECIFICATIONS AND PRICES
There are two 3101 configurations: character transmission and block transmission. Character transmission lets you use it like a teletypewriter. Block transmission provides sophisticated editing capabilities, such as insert/delete and full cursor control, along with field functions like blinking, high intensity and protected fields. Both models can generate all 128 ASCII codes.
The prices for the display terminal start at $1,295 for the character transmission model, and $1,495 for the block model. Volume procurements are avail-
CIRCLE 33 ON IN9UIRY CARD
able. P1;ces and current schedules subject to change.
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IBM Data Processing Division
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DIGITAL CONTROL AND AUTOMATION SYSTEMS
Energy Production Monitoring and Control Stressed at Annual Instrumentation Conference
As might be expected under present energy crisis conditions, a large number of papers presented at IECI '80 in Philadelphia were concerned with monitoring, controlling, and distributing energy. Several speakers at this 6th Annual Conference of the IEEE's Industrial Electronics and Control Instrumentation Society discussed solar power systems, while others covered hydroelectric generation, heating/ventilation/air conditioning equipment, and system simulation. For a review of other IECI '80 papers, see Computer Design, June 1980, pp 70-83.
Hydroelectric Control
Results of a study conducted by the New England River Basin Commission have backed up a control system project involving hydroelectric power. That study pointed out that almost 10% of the total regional electric power requirements could be provided through use of existing but mostly abandoned dam sites. Generation capacities from
66
these dams could be added to the overall power net for use in peak periods.
The feasibility of microprocessor control of small scale hydroelectric generation facilities was studied at the Massachusetts Institute of Technology and a system configured.1 Bases for the system included automatic operation of the facilities and elimination of expensive mechanical regulators. Some basic requirements were that the system would be able to decide when to function (thus saving its generation potential for peak load periods); that once a start decision is made, the system would be able to effect a gradual increase from standstill to synchronous speed; and that once connected to the power distribution network, the reactive power would be kept positive and a target real-toreactive power ratio would be maintained. In addition, the system would, of necessity, be able to monitor the facilities to enable shutdown if malfunctions occurred.
Fig 1 shows how signals corresponding to generator voltage, bus voltage, real power, reactive power, generator
COMPUTER DESIGN/JULY 1980
BUS VOLTAGE REAL POWER REACTIVE POWER
HEAD LEVEL PHASE ANGLE SYSTEM SWITCH
INPUT BUFFER ANO
FILTER
ANALOG SWITCH
BUILT-IN
DEBUGGING
AOC
SUPPORT
ANO DISPLAY
PROGRAMMABLE INTERRUPT CONTROLLER
PROGRAMMABLE TIMER
8080A MICROPROCESSOR
SYSTEM
EXCITATION CONTROL
Fig 1 Hydroelectric generation facility control system .' Analog input signals from generator are multiplexed under control of microprocessor, then converted to digital format for processing. Microprocessor output signals, converted to analog, are used to control generator and darn site functions
speed, phase angle, and head level are normalized and passed through an analog multiplexer operating under control of the microprocessor. Selected signals are further sampled and digitized by the interface circuitry before being input to the microcomputer. Analog signals are output through DAC s and appropriately scaled for control of the flood gates and the field excitation. A digital signal controls the distribution system connection breaker.
Special purpose timing hardware and the basic 8080A system handle a variety of timing and counting functions, thereby maintaining the system's flexibility while freeing
the processor for performance of more time-critical activities. An interrupt controller monitors changes or failure conditions that require immediate attention. Priority level of the interrupt can be adjusted by the software to accommodate varying expectations as the system goes through different phases of operation.
Results of initial tests using a generator facility simulator indicate success in eliminating the need for a mechanical governor, providing the plant output remains very small in comparison with bus power. In addition, nearly all the problems encountered during the testing were remedied easily.
HVAC Control
Energy management, in a 7-building facility, has been implemented to control separate heating, ventilation, and air conditioning for each buildi~g.2 A central microcomputer, located in the boiler room of one of the seven buildings, acts as the master for remote microcomputers in the equipment room of each building (Fig 2). Equipment being controlled includes high powered fans, various dampers to control air flow through the building, and chilled-water valves to control cooling levels in the summer and reheat coils in the winter.
Central hardware (Fig 3) is based on an Intel SBC 80/20 single-board computer, comprised of an BOBOA microprocessor, 4k bytes of RAM, sockets for Bk bytes of ROM, an 8-level interrupt controller, RS-232 channel for a printer, timers, and 48 parallel 1/0 lines. An expander board increases system program capacity by an additional 32k bytes, and SBC 534 4-channel communication boards provide
KEYBOARD, STATUS INDICATION. ALARM
~]
llOG 203
Fig 2 HVAC energy management system.2 Central microcomputer communicates with remote microcomputer controllers in buildings up to 4000 ft away to control heating, ventilation, and air conditioning in each of seven buildings
4 REQUIRED
70
=Dl'MSIOll
Fig 3 HVAC system central microcomputer hardware. 2 SBC 80/20 single-board computer interfaces with operator via printer and remote processors through dedicated serial communication link. It also executes energy control algorithms and system scheduling functions, and generates status logs and environmental reports
COMPUTER DESIGN/JULY 1980
COMMUNICATION LINK
,___ _ _.,J'.___.. DIF6~~~~~1AL
__SERIAL
INTERFACE
...__
....i. . - - ---<....-r - -
DIF~~Rp~TIAL
8748 SINGLE-CHIP
MICRO. COMPUTER
DATA ANALOG TO DIGITAL CONVERTER
DATA CONTROL
STATUS INPUT INPUT SELECT
SAMPLE/ HOLD
STATUS INPUT MUX
CONTROL OUTPUTS
OUTPUT BUFFER
t - - - - - - _ _ , " " I WATCHDOG
TR IGGER
TIMER
Ac
INPUT
DC
OPTICAL INPUT
INPUT
ISOLATION MODULES
AC
L_J-- - - -.... LOAD
DC f-0::-::P::cTICA"'L-O-::,-::UT=-Pu=-T- · LOAD ISOLATION MODULES
Fig 4 HVAC remote controller. 2 8748 single-chip microcomputer in each building accepts commands from central microcomputer to regulate environmental conditions in that building
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72
CIRCLE 38 ON INQUIRY CARD
needed system channel capacity. Keyboard encoder, differential line drivers and receivers for the 4000-ft (1220-m) long link, communications realtime clock, power-fail detection circuits, and battery charger are on a separate interface board. During the design sequence, NMOS RAM on the computer board was replaced with CMOS devices.
Functions of the central microcomputer include communication through a dedicated multichannel serial communication link with the remote processor units that gather status information from their respective buildings, plus dissemination of appropriate control information to ·the remote processors. Interface with the operator is via a printer and a dedicated-function keyboard.
The remote processors (Fig 4) are Intel 8748 single-chip microcomputers containing lk bytes of EPROM, 64 bytes of RAM, a timer/counter, and 27 1/0 lines, all onchip. One type of command from the central microcomputer causes the remote processor to gather data, both analog and digital, and send them to the central unit. A second type of command consists of analog and digital control data for the appropriate outputs.
Each remote processor controls a 24-channel analog data acquisition subsystem, with 16 channels dedicated to inputs from temperature sensors that respond to temperature changes at a rate of 1 mA/°K. The remaining 8 channels are used for inputs from humidity transducers.
Although this prototype computerized energy manage· ment system is now in operation, and there is no doubt that substantial savings will result, insufficient operating time has been built up to provide an accurate assessment. In the meantime, work is progressing to add computer control to other buildings.
COMPUTER DESIGN/JULY 1980
ADDRESS/ DATA/ CDNTRDL BUS
2-MHz CLOCK
8085A 8-BIT MICROPROCESSOR
4k' 8 PROGRAM EPROM
VOLTAGES. CURRENTS. BAIT TEMP_ AND POTS
MICROPROCESSOR FAULT DETECTION
CIRCUIT
ALARM SYSTEM
RS-131-C INTERFACE
Fig 5 Photovoltaic power system controller. 3 As many as 33,600 photovoltaic cells are online except when overvoltage conditions require some cells to be temporarily shed
from behind a cloud, array strings are shed to prevent overvoltage. When solar output drops to less than the load requires, the battery supplements load demand until solar power returns.
The system controller is an Intel 8085A microprocessor (Fig 5) with a 1-MHz internal clock frequency. Program memory storage is maintained in Intel 8755A and 2716 2k x 8 EPROMs. An 8156 256 x 8 RAM and two 5101 256 x 4 RAMs provide read/write storage. Analog voltages and currents are input through an Analog Devices · RTI-1220 16-channel multiplexed 12-bit ADC that is interfaced to the bus as a memory mapped 1/0 device.
1/0 ports in the 8755A and 8156, plus four 8255A programmable peripheral interfaces, provide all the digital 1/0 ports. A 6-bit binary output controls the array shedding switches. This output is decoded into n out of 50 "shed" signals at the switches. A group of six individual bits controls the six additional load switches. An 8-bit output applied to a DAC ·sends an analog control voltage to program the output voltage of the backup power supply.
Highest priority in the software interrupt routines is the control program (Fig 6). This routine measures analog voltages and currents of interest and compares them to alarm limits.
Except for three days during an inverter failure and three days for system modifications, this system has remained in operation. All design obj ectives have been met throughout a variety of weather conditions.
(continued on page 74)
cast chassis
efoui-......,0 , 01
design ,
·
Solar Power Generation Control
A microprocessor based controller for a photovoltaic power system designed by the Massachusetts Institute of Technology Lincoln Laboratory will provide more than 80% of the energy used annually by radio station WBNO in Bryan, Ohio.3 The 15-kW peak power system, with predictable and constant de load, went into operation on August 29, 1979.
Four major power components-array, battery, backup power supply, and load-are in the system. The array, which covers 0.33 acre (0.1 hectare), is configured as 100 4 x 8-ft (1.2 x 2.4-m) racks containing 33,600 photovoltaic cells. A 40-kWh lead-acid battery contains 60 cells connected in series to provide a nominal 120-V output. The ac to de backup power supply has an output voltage range of 100 to 160 V at 40 A maximum. The am transmitter, plus studio equipment and production rooms, make up the load.
When the sun is shining and solar output is large, the array supplies all the current to the load. Excess current is used to charge the battery. If any rapid changes occur in bus voltage, as happens when the sun suddenly emerges
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CIRCLE 39 ON INQUIRY CARD
73
JO-Hz INTERRUPT
SEND MANUAL CONTROLS TO OUTPUT
SHED A STRING SHED XSTRINGS
RETU RN
YES
A second solar energy system involves a 2-axis tracking controller for a concentrating collector:' In this system a controller based on a 6502 microprocessor commands a 70-kWh collector designed for high performance, low cost operation. When the sun is out, the system produces 250 to 650 °F (50 to 170 °C) steam. The solar collector is a Fresnel reflector made up of 108 identical curved columns that each hold eight 1-ft (0.3-m) square, second-surfaced, flat, glass mirrors.
Address and data buses connect the microprocessor to interface chips. Main input device is a 16-channel multiplexing 8-bit ADC. Light sensors, shadow bands, and temperature sensors provide analog signals that are connected directly to the ADC. Potentiometers on the collector provide A-D inputs for the collector's azimuth and elevation positions.
Temporary information is stored in RAM and the control program firmware is stored in EPROM. The control program uses 24 bytes of RAM, but larger blocks of RAM can be used for data acquisition and operation and maintenance information storage. The control program is modular and uses less than 750 bytes of EPROM.
In a third system, this one developed in Italy, Z80 and 6800 microprocessors serve as controllers for solar energy plants.5 The Z80 based controller uses three 128-byte RAMs for data storage and three lk-byte EPROMs for program storage. The 6800 based controller functions with two 128-byte RAMs for the data and two lk-byte P/ROMs for the program. Both configurations resulted in economic systems.
References
All of the following items are from the /EC/ 'BO Conference Proceedings.
1. D. V. Le and S. I. Ross, "A Microprocessor Based Low Head Hydroelectric Generation Facility Control System," pp 193· 197
2. A. Abramovich, "Microcomputer System Design for Remote Process Control," pp 247-251
3. C. H. Much and P. J. Rothenheber, "Microprocessor-Based
Control of the Photovoltaic Solar Power System for an AM Radio Station," pp 210-216 4. D. N. Borton and W. E. Rogers, "A Microcomputer Based 2-Axis Tracking Controller for a Concentrating Solar Collec· tor," pp 252-256 . 5. P. Cerami et al, "Experiences in Using Microprocessors for Solar Circuit Control," pp 257-263
RETURN
Fig 6 Photovoltaic power system control program.' Analog voltages and currents are compared to alarm parameters to determine condition of the system
74
Copies of the !EC! '80 Proceedings, Applications of Mini and Microcomputers, containing the text of most regular session ·papers presented, are available from the IEEE Service Center, 445 Hoes Lane, Piscataway, NJ 08854. (Catalog #80CHI55-1.) The price is $25/copy.
IECI '81, again covering applications of mini and microcomputers, will be held in San Francisco from November 9 through 13. Tutorial and special evening panel sessions will be included.
For details on IECI '81, circle 440 on inquiry card. For a copy of the Call for Papers, circle 441.
COMPUTER DESIGN/JULY 1980
Batt Simplifies
Winchester... the Centennial Series.
The new Ball Centennial Series is designed for the OEM
who wants more Winchester disk drive for the money. A
more reliable drive with lower parts count. A simplified
head/disk assembly. The precision of a true linear motor
actuator.
Two 14-inch drives in capaci ti es of 90 and 158 megabytes
lead off the series. But that's only the beginning. These drives
have been designed to accept upgrades that will
double those capacities.
-
Computer
~ Products
~ Division
Keep your entry- level
investment low, then increase capacities as needed to meet growing storage requi rements.
And Ball can give you a complete disk storage subsystem. Controllers. Winchester and SMD-type drives. Integrated packages, designed and tested as a system to ge t yo u online quickly and efficiently.
Circle our readers' service number for a free brochure.
Batt.Where quality has been a
Computer Products Division 860 East Arques Avenue Sunnyvale, California 94086 (408) 733 -6700
tradition for 100 years.
CIRCLE 40 ON IN(j)UIRY CARD
75
.oquestions the~
mayaskyou abou
Are bubbles supported by reputable companies?
Bubble technology is out of the lab and into the marketplace. Eight major semiconductor companies have committed to bubble production by 1981 and six of them are shipping products now.
Rockwell International is the only bubble producer to have.arranged two second source suppliers.
Are bubble memories competitive with other memories?
Bubble memories fill the price/access-time gap between RAMs and some electromechanical memory media. Based on cost-ofownership, bubble memory . pricing is attractive in many applications today.
Within two years, bubble memory costs are expected to be less than 15 millicents per bit in production quantities.
What industries have started using bubbles?
Bubble memories have already been designed into industrial controls, terminals, business data systems, instrumentation, telecommunications systems and computers.
Rockwell International has shipped its bubble memory products to175 companies in these market segments.
l?ofE ·neer~ bubble memories.
What bubble products are available now?
Another company has a 92K bit device in production, and Rockwell International is in production of a 256K bit device . Two other companies are now sampling their 256K bit devices. Three companies have announced megabit devices.
Rockwell devices are also available on memory board systems.
What kinds of applications are best suited for bubbles?
Applications where modularity in 32K byte increments up to BM bytes is required; where electronic equipment must withstand unclean conditions; where size or packaging flexibility is important; where memories must operate for long periods without maintenance; where non volatile, solid state data storage is mandatory.
How about support circuits for bubble memories?
Most bubble memory manufacturers have committed to the production availability of LSI support circuits by the end of 1980. Rockwell International will have all support circuits and they will be alternate sourced. They will interface with the major microprocessor buses.
To learn more, ask Rockwell. Rockwell Internatiopal, Bubble Memory Products, Electronic Devices Div., P.O. Box 3669, RC-55 Anaheim, CA 92803. (714) 632-3729.
CIRCLE 41 ON IN9UIRY CARD
Rockwell International
...where science gets dow n to business
CC & AS BRIEFS
Add-In Boards Increase Minicomputer Industrial Control Capabilities
Among the enhancements introduced by Computer Automation, Inc, 2181 Dupont Dr, Irvine, CA 92713, for its Naked MiniR 4 minicomputers are a pair of 64-bit TTL 1/0 interface modules and four single-board function boards specifically intended for the ScoutTM 4/04 version. The latter provide mass storage capabilities, analog output, digital parallel 1/0, and battery backup with watchdog timer.
Both of the interface modules allow a variety of 1/0 data formats to be monitored by the computer, including four 16-bit words or -up to 64 discrete stimuli such as switch closures. Byte or word data formats are supported with each module. Onboard terminating resistors are provided to eliminate the need for a terminator board. The half-card modules can handle positive and negative true input or output. Latched or transparent inputs can be interfaced to the processor.
The input module featu.res switch-selectable interrupt addresses. Eight external strobe lines work in conjunction with eight acknowledge signal lines to provide a handshake interface. Data then can be transferred in response to an ex-
ternal event using interrupts or through periodic status
scanning.
Of the Scout boards, one, a 512k-byte flexible disc sub-
system, consists of a dual-drive, single-sided flopp y sup-
ported by a single-function controller board that operates
under the realtime executive. It is format compatible with
all NM4 family computers for transportability of application
programs and data files.
A 32-bit bidirectional 1/0 board uses interrupt driven pro-
grammed IIO, which enables division of the 32 bits into 8-bit
groups. Data can be transferred in and out in any combina-
tions totaling four groups. The third board, a 4-channel
DAC, offers output voltage ranges of ±2.5, ±5, 0 to 5, ± 10,
and 0 to 10 V, all switch selectable for each channel.
The battery backup board provides temporary power to
memory ranging from 3 min for 128k bytes to 4.5 min for
32k bytes of dynamic RAM. A watchdog timer provides a
signal to an external alarm when the CPU fails to activate
the battery backup within a predetermined time frame
ranging from 1 to 30 s.
Circle 442 on Inquiry Card
Manual Data Input Unit Expands Machine Tool CNC Capabilities
Capability for an operator to program a milling machine for automatic 3-axis contouring is provided by a manual data input unit introduced by Bendix Corp, Industrial Controls Div, 12843 Greenfield Rd, Detroit, MI 48227. The computer numerical control features conversationa.l programming between the operator and the control via a 9" (23-cm) CRT display that shows both what to do and what occurs when the program is entered into the control through the keyboard. Once a program is set up and the part machined as verification, the program is stored for future use.
Part program storage is inclu.ded for approximately 480 events, and programs can be loaded to or from teleprinter, magnetic tape cassette, or RS-232-C interface. Program data are similar to EIA format. Full editing is standard.
Operator aids include double-size position readout data, reverse video of active data, fault display, and messages. Optional polar coordinates can be substituted for standard cartesian coordinates.
Circle 443 on Inquiry Card
78
Handheld Terminal Communicates With Central Computer
A system based on infrared light, mobile entry stations, and stationary data collectors allows personnel to input data via hand calculator size portable terminals for transmission to a central unit. Infrared light, which is not susceptible to electromagnetic interference and therefore performs well in a large assembly line atmosphere, carries data to and from terminal and collector.
The battery powered terminals, introduced by Siemens AG, Postfach 103, D-8000 Munich 1, Federal Republic of Germany, are not marketed in the U.S. but are available elsewhere. Data communications is carried out by transmitting and receiving diodes. In the data collectors, signal converters and line drivers move the data signals via a modem to the next interface. Transmission speed in both directions is between 2400 and 4800 baud.
COMPUTER DESIGN/JULY 1980
Vincent van Du111b.
The Dumb Terminal® video display terminal has done it again.
For around $2000, you can have all the alphanumeric capabilities of the renowned ADM-3A Dumb Terminal, plus the full vector drawing and point plotting capabilities of a sophisticated graphics terminal. All in one neat package. That's less than half the cost of other comparably equipped graphics terminals.
The ADM-3A with Retro-GraphicsTM gives you complete flexibility to develop bar charts, pie diagrams, histograms, even function plots. What's more, it's completely Tektronix® Plot 10TM software-compatible
The package consists of an ADM-3A Dumb Terminal plus a single plug-in card engineered to fit neatly inside the ADM-3A without soldering, special tools, or a service call.
Retro-Graphics is a product of Digital Engineering, Inc., and is sold separately
or installed in the ADM-3A by local Lear Siegler distributors. Contact the distributors listed below, any Lear Siegler sales office or Digital Engineering, Inc., 1775-C Tribute Road, Sacramento, CA 95815, 916/920-5600.
The Retro-Graphics-equipped Dumb Terminal. What does it mean to you?
Draw your own conclusions.
DUMB TERMINAL. SMART BUY.
~
LEAR SIEGLER, INC. DATA PRODUCTS DIVISION
Lear Siegler, Inc/Data Products Division, 714 N. Brookhurst Street, Anaheim, CA 92803 800/854-3805. In California 714/774-1010. TWX: 910-591-1157. Telex: 65-5444. Regional Sales Offices · San
Francisco 408/263-0506 · Los Angeles
213/454-9941 · Chicago 312/279-5250 · Houston 713/780-2585 · Philadelphia
215/245-1520 · New York 212/594-6762 · Boston617/423-1510 · Washington, D.C. 301/459-1826 · England (04867) 80666.
DISTRIBUTORS: · Oakland, CA, Advanced Technology (415) 452-1401 · Oakland, CA, Consolidated DataTerminals (415) 638-1222 · San Diego, CA, Data Systems Marketing (714) 560-9222 ·Orange County, CA, MQI (714) 751-2005 · Los Angeles, CA, David Jamison Carlyle Corp. (213) 277-4562 · Richardson, TX, Data Applications (214) 931-1100 · Hazelwood, M0, Dytec/ South (314) 731-5400 · Chicago, IL, Information Systems (312) 256-5892 · Arlington Heights, IL, Dytec/Central (312) 394-3380 · St Paul, MN, Dytec/ North (612) 645-5816 · Orlando, FL, Gentry Associates (305) 859-7450 · Cleveland, OH, WC. Koepf Associates (216) 247-5129 · Falls Church, VA, Marva Data Services (703) 893-1544 · Gaithersburg, MD, Leaseametric (301) 948-9700 '. Cherry Hill, NJ, Data Store (609) 779-0200 · Stamford, CT, National Computer Communications (203) 325-3831 · Bedford, MA, Continental Resources (617) 275-0850.
Dumb Terminal~ 15 a registered trademark of Lear Siegler. Inc. Retro-GraplucsTM 1s a trademark of 01g1tal Engmeenng, Inc. Tektronix°' and Plot 10TM are trademarks of Tektronix, Inc
CIRCLE 42 ON INQUIRY CARD
CC & AS BRIEFS
Floppy Disc Drive Retrofit Expands NC Machine Tool Memory
Whether acting as a standalone unit or as the final node of a computer system network, the FLOPPYMEM extends both editing and communications capabilities of machine tool systems. In addition to bypassing the tape readers and expanding the memory capacity to , 156k char of parts program (equivalent to 0.25 mi or nearly 0.5 km of tape), the floppy unit eliminates reliability problems such as dirt and wear and speeds up operations.
Alden Computer Systems Corp, PO Box 985, Framingham, MA 01701, retrofits the floppy disc drive and microcomputer to any NC or CNC machine tool on a turnkey basis. The unit can be controlled from the control console as was the tape reader. Field applications indicate increases in cutting speed by three to five times.
Circle 444 on Inquiry Card
Graphic Display Package Increases Programmable Controller Capabilities
Adding a GRPHPK display package and an intelligent color
graphic CRT terminal provides the EPTAKR programmable
controller with features normally found on larger computer
based process control systems. Included in the features are
direct digital control of
<
master and slave loops and
alarms, process and alarm
displays, dynamic and his-
torical trending, and pro-
cess and alarm logging.
Control loop trim param-
eters can now also be defin-
ed by the user.
With this package, introduced by Eagle Signal Industrial
Systems, 736 Federal St, Davenport, IA 52803, a user can
design the process display, define control requirements, and
operate the process. The programmable controller com-
municates with the CRT through standard system interface
modules; the operator interfaces to the system through the
terminal's keyboard.
An autotracking feature provides bumpless transfer be-
tween manual and automatic control. Autotransfer to
backup automatically forces a backup station to assume
control of a loop if a failure occurs in the system.
Circle 445 on Inquiry Card
·Stattlnr)....... ~....
· Malmum fllflclency · hlflh a SR at H VOita. · Varistor ring and hlflh tlfM/lty brutll malerla/.
· 7 bar armature for smooth operation.
·Available with AC tach, gearheads and AMP 110 terminals
For complete
C a u o n technical information:
Canon U.S.A.. Inc. Electronic Components Division 10 Nevada Drive, ·
Lake Success. l.1 .. N.Y. 11042 Tel. (516) 488-6700 Telex 96-1222
Cable - Canon USA LAKS
80
CIRCLE 43 ON INQUIRY CARD
Speech Synthesis Technology is Applied To Automotive Diagnostic System
A prototype automotive diagnostics warning system shown
at the 1980 Society of Automotive Engineers Congress and
Exposition converts inputs from a microcontroller into audi-
ble warning messages. This application of speech synthesis
technology was demonstrated by National Semiconductor
Corp, 2900 Semiconductor Dr, Santa Clara, CA 95051, and
is based on that company's recently announced speech pro-
cessor chip plus a memory device containing the words or
phrases to be spoken. In this technique, a recorded word or
phrase is digitized with A-D conversion, the code is com-
pressed by a factor of 100 and stored in ROM, and that word
or phrase is played back through the speech processor chip.
The information stored in memory is actually that of
recorded speech, and therefore the vocabulary can incor-
porate virtually _any word or phrase including male and
female voices or a foreign language. However, because re-
quirements differ, all speech synthesis applications using
this device are dedicated, custom products.
Speech quality is said to be comparable to that of a high
fidelity magnetic tape recording and is related to the
number of bits of memory used to store the speech. By
decreasing memory size the quality of the speech is reduced
so it can be tailored to the specific application and the
amount of memory desired. Approximately 1200 bits are
needed to store an average length English word. A female
voice or a foreign language requires approximately 40 to
50% more memory.
D
COMPUTER DESIGN/JULY 1980
Why 3 out of4 major OElVIs
can't keep our
memories offtheirmimis.
DataTrak 5 TMand
DataTrak S~M Our
unforgettable ,....
memories.
.
More and more major ' OEMs are turning to DataTrak 5 and DataTrak 8 floppy disk drives for better
efficiency and reliability in their systems. DataTrak 8 is our double-sided ,
double-density 8" disk drive. It outperforms competitive floppies by offering considerably less media and head wear. In independent evaluation , DataTrak 8 is setting
industry standards for tap test performanceand reliability. It also
delivers improved data reliability with the fewest data read and track seek errors of any floppy
on the market. DataTrak 5 is Oume's new
5X" double-sided,double-density floppy disk drive. It offers the same outstanding features as DataTrak 8 in a smaller package, at a lower price.
Both uh its are in mass production and are available now.They're field-proven , too. By thousands of users. And if DataTrak
works for three out of four of the majors, don't you think you ought to look into ittoo?
To ensure your satisfaction,we'd like to lend you an evaluation unit. So you can put it to your tests before you order any additional units. Just fill in the appropriate information
below,and we'll make arrangements to send you your DataTrak 5 or DataTrak 8 immediately. To arrange shipping , call (800) 227-1617,
ext. 172; in California (800) 772-3545, ext. 172.
r----------------------------------, Try itbefore youbuy it.
Company _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ Address _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ City _ _ _ _ _ _ _ _ _ _ State _ _ _ _ Zip _ __
Li m ited to qualified OEMs through July 31, 1980.
MemoryProducts Division
L----------23-50-Q-um-e -Dri-ve-, S-an-Jo-se-, C-A-951-3-1 ---------~
CIRCLE 44 ON INQUIRY CARD
Digital Equipment Corporation has sold more 16-0it microcomputers than any other company in the business.
Overl00,000 of them. And the reason is simple. We give you more to work with. More hardware, more software, and more true systems capability. So you can develop your products faster, and offer your customers the right balance of cost and performance every time. What's more, Digital's micros are software-compatible. Not just with each other, but with our entire PDP-U minicomputer family as well. So you'll never run out of ways to expand your business. Just look at what we offer:
Digital's microcom}?-uter family.
You can choose from eight different configurations of our LSI-U72 and -U/23 micros, in both boards and boxes. With high-performance features like generalpurpose registers. Double-precision floating point processor. Up to 256.Kb memory addressing. And fhe full instruction set of the PDP-U family.
You also get the best form factor in the industry, because our micro boards measure just 5.2" x 8.9".
More OJ?-tions on the industrystandard bus.
Once you have the micro you want, your possibilities are wide open.
You can choose from dozens of micro products: 9 different memory boards, U I/O modules, 9 communications options, even kits for designing your own custom interfacing.
There are also 8 different peripherals, including the TU 58 micro tape cartridge subsystem.
And the whole family runs on Digital's industry-standard LSI-U Bus, the most widely copied bus structure
in micros.
The only high-:Rerformance hardware with software to match.
Digital's micro software is literally . years anead of the competition.
There's RSX-UM, the multitasking real-time operating system that sets performance standards for superminis. RSX-US, a streamlined run-time version of -UM. And RT-U for smaller singletask applications.
You also get development tools like an optimized FORTRAN IV-PLUS com-
piler and BASIC-PLUS-2. Even a ROMmable FORTRAN for RT-U.
And Digital's development systems let you breal< your complex applications into manageable pieces, so several programmers can work on the same application at once.
That can save you plenty of development time.
The total apJ?-roach to micros.
Behind all Digital's micro products is a support commitment that's unmatched in ilie industry.
We have 13,000 support people worldwide. Technical consultation and training. And a wide range of support agreements- from do-it-yourself service using our special kits, to full support jncluding coverage for your customers.
It's the total approach to micros, only from Digital.
For more information, contact Digital Equipment Corporation, MR2-2/ M65, One Iron Way, Marlboro, MA 01752. Or call toll-free 800-225-9220. (In MA, HI, AK, and Canada, call 617-467-7000.) In Europe: 12 av. des Morgines, 1213 Petit-Laney/Geneva. In Canada: Digital Equipment of Canada, Ltd. Or contact your local Hamilton/Avnet distributor.
It took the minicomputer company
to make micros this easy.
c1RcLE 45 ON IN9UIRY CARD
Expand with the MSC 8009
MULTIBUSTMco mpatible. Designed around the Z80TM CPU, the fully MULTIBUS compatible MSC 8009 is a complete microcomputer, offering OEM designers a number of significant benefits:
One board takes the place of four. In many SBC 80 based systems, the MSC 8009 can reduce the number of boards from four or more to only one. This hardware reduction helps lower system costs while increasing capability, throughput, and reliability.
Floppy disk interface. An on-board, single chip 1793TM floppy disk controller provides a soft-sector format that can be made IBM compatible. With proper options, up to eight 4 or 8 inch single or double density drives can be controlled.
CP/ M TMcom p atibility. Software support for the MSC 8009 includes the CP/M and
Monolit~ic f~1tem1 cap
Extending the limits of infbrmation.
CP/M-2 operating system which uses IBMcompatible flexible disks for backup storage. It provides users with program construction, storage, and editing, along with assembly and checkout facilities .
Extensive memory capacity. The dualported memory can be configured with up to 32K bytes of dynamic RAM . The EPROM section is compatible with standard IK, 2K, and 4K byte devices to a maximum of !6K bytes.
For additional information on the MSC 8009 and our other 41 Monolithic Systems Corp. products, please contact us at 14 lnverness Drive East, Englewood, Colorado 80112. (303) 770-7400. Telex: 45-4498.
MULTIBUS is a trademark of Intel Corp. I793 is a trademark of Western Digital Corp. Z80 is a trademark of Ziloq, Inc. CP/M is a trademark of Digital Research, Inc.
With on-board floppy disk controller
II I
I
MSC Regional Sales Offices : Eastern Re gion I IO 1-89 State Road, Princeton, NI 08540, (609) 921 -2240, Central R egion 14 Inverness DMve East, Englewood, CO 80112, (303) 770-7400, Weste rn R egion 49 South Baldwin, Suite D, Sierra Madre, CA 91024, (213) 351.fJ717.
84
C IRCLE 46 ON IN9UIRY CARD
ARITHMETIC PROCESSOR CHIPS · ENHANCE MICROPROCESSOR SYSTEM PERFORMANCE
Specific interfacing details for two very different devices show how single-chip arithmetic processors can enhance system performance by relieving virtually any microcomputer of complex mathematical calculations, reducing software requirements, and affording the potential for parallel execution of concurrent tasks
B. K. Gupta
Bhabha Atomic Research Centre, Computer Section
Trombay, Bombay 85, India
General purpose microcomputers require extensive supporting software to perform the complex arithmetic operations required by the many scientific. and engineering applications involving process control, data reduction, laboratory instrumentation, and other highly computational tasks. It is worthwhile, then, to consider the use of specialized arithmetic processors as microcomputer extensions to relieve microcomputers of the burden of arithmetic computation. Commercially available calculator chips, the socalled, number cruncher chips, and arithmetic processing unit chips lend themselves to such applications. In addition, a number of manufacturers offer hardware multiply/ divide chips and general purpose microcomputer cards preprogrammed to perform arithmetic functions.
Selection of a particular arithmetic processor chip (APC) involves careful evaluation of cost, speed, precision, number
representation, power consumption, ease of interfacing in the different microcomputer configurations required by the application, and the variety of different functions provided. Although the requirements are determined by the particular application, the basics usually include addition, subtraction, multiplication, division, exponentiation, and square root extraction, all in a choice of fixed point or floating point number representations. Trigonometric, exponential, and logarithmic functions offer a further convenience and often help to reduce program size.
Calculator chip input/output (1/0) systems, consisting of a keypad for entry of instructions or operands and a multiplexed display for visual output, are designed for operator convenience and do not allow for easy installation in a microcomputer based system. In addition to the circuitry for conversion between metal oxide semiconductor (MOS)
85
signal level and transistor-transistor logic (ri:L) signal level, interfacing a calculator chip to a microcomputer involves simulation of keyboard functions for operand or instruction entry and tapping off the result of a computation at the display input terminals, with the number format conversion . performed either by hardware or software. For these reasons, adapting a calculator chip to aid a microcomputer in performing arithmetic operations involves significantly more hardware and software development and much higher overhead than either alternative approach to be discussed.
Interfacing Techniques
Methods for using an APC in a particular configuration are dependent on the application and are dictated by the level of performance required. In program development systems, where the sequence of instructicns to be executed by the APC is not known in advance and execution speed is relatively unimportant, the APC can be configured to communicate with the microcomputer in 1/0 mode as shown within the broken lines in Fig 1. Using this configuration, the microcomputer will handle instruction and data transfers to and from the APC as shown by the typical flowchart of Fig 2. The microcomputer polls the APC ready status until the APC completes execution of an instruction and becomes ready to accept the next instruction; then it removes the result of the previous operation and supplies the next instruction with operands. Alternately, APC ready status can be connected to interrupt microcomputer execution, freeing the microcomputer to perform parallel tasks during APC operation. Either approach results in a simple, low cost hardware system that, however, incurs considerable overhead while routing instructions and data to and from the APC.
Known sequences of operations characterize dedicated systems that usually execute programs stored in read only memory (ROM). The 110 mode of APC connection, with its obvious advantages of simplicity and low cost, will suffice for dedicated systems if functions to be performed by the system as a whole are primarily sequential in nature. For example, in an automated x-ray diffraction application, peak search and processing involve crystal positioning using a
high speed stepper motor, data acquisition, partial processing of data, and selective data retention. The system repeats this sequence of operations continuously until a peak has been fully identified, then it operates on the retained data in a more or less offline fashion. Because system functions are sequential for the most part, and little opportunity for parallel execution exists, the 1/0 mode of APC operation can be used with good results.
A more complex, alternative interfacing technique attaches the APC to the microcomputer in a multiprocessor or master-slave configuration shown outside the broken lines in Fig 1. This approach requires a separate sequencer/controller to transfer instructions and data between the microcomputer and the APC, along with bus arbitration logic in the microcomputer interface. It is best suited to those dedicated systems that do not perform wholly sequential operations, systems in which a definite potential for concurrent parallel execution exists. For example, in a laboratory instrument data acquisition and control system, overlapping computation of the next position setting with concurrent acquisition of data from the current position might improve system performance. Here, the APC computes the next position and processes the data read at the current position while the microcomputer drives the positioning mechanism and handles the actual data acquisition functions. Virtually any numeric control system can benefit from this division of labor into a position computation task and a parallel position control task, with data processing computation allocated among the parallel processors. Simplicity and low cost are sacrificed to achieve enhanced system performance.
In multiprocessor mode, the microcomputer must transfer data into APC subsystem local memory, initialize a program resident in APC local ROM (by writing the starting address to a prescribed location and activating the APC run mode), and then begin concurrent execution of the parallel task. As in 110 mode, APC program termination can be signaled by a microcomputer interrupt or by means of the APC ready status flag. Multiprocessor mode affords ample opportunity for the APC to participate in data acquisition and processing functions normally performed only by the microcomputer; however, this capability assumes that the APC has built-in features required by the application.
SEQUENCERCONTROLLER
BUSARBITRATION
LOGIC
APC
INSTRUCTION ROM/ RAM
OPERA NO RAM
Fig 1 Basic APC interface block diagram. Microcomputer transfers instructions and data to APC in 1/0 mode (broken lines). External sequencer/control Ier performs function in multiprocessor mode, using bus arbitration logic to transfer microcomputer bus data to APC local bus. Simplicity of 1/0 mode interface constrasts with high performance offered by multiprocessor mode potential for concurrent, parallel execution in master-slave environment
86
COMPUTER DESIGN/JULY 1980
INITIALIZE
NO
FETCH OPERAND
00 OTHER
PROC( ~ ING
Fig 2 APC access in 1/0 mode. Microcomputer transfers instructions arid data directly to arithmetic processor, in 1/0 mode, then retrieves results and status once operation has been performed . More complex multiprocessor mode of operation frees microprocessor from polling arithmetic processor status during two wait loops shown
ADDRESS STROBE
DELAYED ADDRESS STROBE
\ .C~IP SELECT FOR NCU DR APU
==x Sl (ADVANCE READ/WRITESTATUS)
~ 10/ M (CYCLE IS INPUT/OUTPUT)
\
EXTENDED READ/ WRITE STROBES
' -- - - - - - - - -
-'
,---
/
I \READY INPUT TO CPU/ PAUSE OUTPUT OF APU
(OAS) DIGIT ADDRESS STROBE OF NCU
LJ
- - - - - - - - CPU lliwwRiTESTROBE - - - -\
/
\_ - - - - --'
- - - - - - - PAUSE OUTPUT Or APU- - - - - -\
:- - - - - - -
\.... _ _ _J
( a)
5 v
CHIP SELECT
Et) "l<>---+-d ci.K
""'p=Aus=£~-----EX1CLU-S-_IV_,E,. NOR
; K 7476 ( b)
. TO READY
Fig 3 Timing diagram. In (a}, both APU anc;l · NCU must generate ready input to microprocess.or sliorUy affer address strobe is issued. ,For NCU, digit address strobe (DAS) clears ready so processor can complete.its cycle. If APU uses extended read/write strobes, PAUSE can serve as ready input ; otherwise, in (.b), Q output of J-K flipflop in toggling mode goes low at chip select falling edge and high on rising edge of PAUSE
Ar~hitectural Differences
APCs under consideration have markedly different architectures. Accordingly, specific interface hardware varies with chip characteristics, and software must be designed with attention both to the differing data formats and to the selected mode of data transfer between the external hardware and the APC. One candidate, National Semicon-
ductor' s number crunching unit (NCU) chip, .is a bit .parallel,
digit serial device that operates on signed, binary coded decimal (BCD) numbers in either fixed or floating point format. Its instruction se t includes 1/0 and conditional branch operations and, because it is capable of sequ e nci~g through a series of stored program instructions, it can be used in standalone systems. On the other hand, the MM571°09 pin
87
RESET
NJ TO A15
AOOllESS BUS
M-~~~~--...-~~~-+~~~~~~...-~~t--~~-+----<t--~~~~~~~~~~~
BOii
8224 8238
RAM AOORESS
DECODER
RESET
SEQUENCER ROM
cs
CLOCK
IOW
SVREQ
9511
OOi
~
I
a
8
81lS9S
MICROCOMPUTER DATA BUS
Fig 4 APU interface combining 1/0 mode and multiprocessor mode. Either APU sequencer/controller or microcomputer can access operand memory, depending on value of HLDA. Five buffers isolate buses on APU side from buses on microcomputer side. Simple arbitration logic gives microcomputer access to buses on APU side if HLDA shows that se· quencer/controller is not using them. Three RC combinations add synchronization delay. RESET clears hold flipflop, and HLDA goes to zero, as sequencer/controller begins execution. Halt instruction writes APU status to RAM and returns control of buses to microprocessor
functions are not at all compatible with microcomputer bus signals, requiring extra hardware for the microcomputer interface, even apart from the circuitry for MOS-TTL and TTLMOS signal level conversion.
Another related pair of contenders, Advanced Micro Devices's Am9511 and Am9512, are byte oriented devices with microcomputer bus compatible pin functions. Both operate on binary data: Am9512 allows 64-bit arithmetic operations for use in high precision applications but offers only the add, subtract, multiply, and divide functions; Am951 l arithmetic processing unit (APU, a particular type of APC) uses 16-bit fixed point numbers and 32-bit numbers in either fixed or floating point format, and performs 2's complement arithmetic operations. It connects directly to existing microcomputers, appearing to the microcomputer as two 110 ports. An 8-bit bidirectional bus handles data transfer to and from the APU, which can attach directly to
88
the microcomputer data bus with the write pulse controlling operand and instruction input and the read pulse controlling output of both results and APU status. One bit determines whether 1/0 transfer of commands and data or transfer of results and status will occur.
For the APU, a low output at END signals completion of instruction execution, which can be acknowledged by an EACK input. A low at chip select (CS) provides access to the APU. The APU returns multipurpose output PAUSE in response to an external demand for APU access; any attempt to read from or write into the APU while it is busy or while the APU conditions its internal circuits to an external request drives PAUSE low. As information transfer is not allowed while PAUSE is low, it must be deferred until the rising edge of PAUSE. Instruction execution times range from 8 µ,s for a 16-bit fixed point and to about 6 ms for exponentiation using a 2-MHz clock.
COMPUTER DESIGN/JULY 1980
APU Interface Details
Most microcomputers have a ready status line used to synchronize slow memory and 1/0 devices. PAUSE can be connected to this input; however, a particular problem with connecting PAUSE to the microcomputer ready input arises because READY is generated only after the microcomputer read/write input goes low, whereas processors such as the 8080 or 8085 sample the ready input before issuing read/write strobes [Fig 3(a)]. One solution generates extended read/ write strobes, as shown at address latch enable {ALE) time in Fig 3(a), from the status bits supplied by the processor at the' beginning of the cycle, allowing the APU to generate
PAUSE earlier for the microcomputer to sample earlier. Another approach generates the microcomputer ready input at CS time and clears READY on the rising edge of PAUSE.
As shown in Fig 3(b), this is achieved easily by using a 112 x
7476 flipflop in toggling mode and supplying as its clock input the "exclusive NOR" of PAUSE with CS.
A 16-byte, last in, first out (LIFO) stack within the APU is available for storage of operands and results. The LIFO holds eight 16-bit values or four 32-bit values. An 8-bit, nonprogrammable status register can be accessed at any time, whether the APU is busy or idle; its most significant bit indicates whether or not the APU is busy. When the APU is idle, the remaining seven status bits flag a variety of error conditions. All of the 8-bit APU instructions use seven bits to
= RESET (HOLD 0. HLOA = 0)
WRITE
COMMAND INTO APU
DO OTHER PROCESSING
(b)
= APUIC =(I'll
STATUS APU S!MUS
READ APU STATUS
Fig 5 APU sequencer/controller operation. In (a), microprocessor based sequencer/controller determines whether it or APU must execute each instruction . It implements 110 and conditional branch capabilities not available in APU instruction set, and also main· tains APU instruction counter in H and L.registers internal to 8080 microprocessor. In (b), microcomputer prepares operand memory and program starting address, if required, before pulling HOLD low
(a)
89
determine tpe operation and data format, returning the eighth bit on ~he service requ~st line (S\!REQ) output upon completion of the operation. Use of SVREQ is optional; hence, the most significant bit of an APU instruction can be used to determine whether an instruction should be routed to the APU or e-icecuted directly by the' sequencer/controller. This allo-ws the sequencer/contro1ler to irppleinent 110 and branch instructions when using the APU in ·stored program
execution mode. An APU combined interface allowing both 1/0 mod~ opera-
tion and ·the master-slave mode of operation in !l multiprocessor configuration, ' depending on the level of the hold
acknowledge (HLDA) line, is shown in Fig 4. The sequencer/
controller is based on the 8!)80 ~icroprocessor with associated 8224 clock generator, ~238 system controller, and program ROM. The 8228 system controller cannot be used because it does not generate the 'extended write strobes required for PAUSE to serve as a READY input to the 8080. Although separate 'read and write strobes for memory and 110 devices appear, these may be shared if memory mapped 110 is used . five 81LS95S 3-state octal buffers isolate AfU side address, data, and control bus~s from corresponding microcomputer side buses. Simple·bus arbitration logic gives the microcomputer access to APU side buses, if the se· quencer/controller is not using them, when HLDA is high.
RESET clears the hold flipflop (lh x 7474); HLDA goes to zero, disabling microcomputer access to APU side buses; and the sequencer/controller enters its execution state. Fig 5 gives details of the s·equencer/controller operation implemented by the 8080 program shown in the table. Writing a 1 into the hold flipflop generates a hold request that the sequencer/controller acknowledges by raising HLDA and floating its buses. Since HLDA slightly precedes the actual floating of 8080 buses, a resistor-capacitor (RC) combination at the HLDA output delays enabling of microcomputer access to the APU and operand memory.
HLDA high also enables PAUSE onto the microcomputer READY input so that the microcomputer can supply data and request instruction execution. The bidirectional data bus offers additional control for read/write functions performed by the microcomputer on the APU, the operand memory, and the hold flipflop . RC combinations at the ORed outputs, MEMW with IOW and MEMR with IOR, delay enabling the proper direction of information flow slightly to conform with data hold times for the memory and the microcomputer.
SVREQ is not used, leaving the most significant bit of the command word available to define input, output, branch, and halt instructions implemented by the sequencer/controller (Fig 6). 1/0 and branch instructions are 3-byte commands whose first byte defines the operation and whose remaining bytes determine the data starting address in op erand memory, for 1/0 instructions, or the branch address. Because the APU operates on either 16-bit data or 32-bit data, 110 instructions transfer a minimum of two bytes, and the least significant three bits of the instruction code determine the number of 2-byte units to be transferred. Conditional branch instructions can test any of the APU status bits and distinguish various conditions. The halt instruction transfers APU status into prescribed memory locations before returning control of the buses to the microcomputer. This allows the microcomputer to make decisions on the basis of APU status.
_.I L.__ _ _ _L_ow_AOO_R_Es_s _ _ _ _ 2·o BYTE
I L - - - - - - - - HIGH ADORESS - - - - - ' ]RO BYTE
CONOITIONAL . - . -- - -- --, UNOONOITIONAL . _- - -- - - ,
BRANCH ----~---,
~---- TEST FOR "O" OR " ! "
AOORESS OF STAJUS REGISTER BIT TO BE TESTEO
l~ ADDRESS
HIS' AOORESS
X Isl BYTE
I2ND BYTE
I]RO BYTE
Fig 6 Sequencer/controller instruction format. 110 in-
structions transfer 2 to 16 bytes at a time in units of 2 bytes. Conditional branc~ ihi;tructions test value of any APU status flag. Bytes 2 and 3 addr~ss data area,
for 1/0 instruction, or next operation when condition is true, for condition~! branch instrui;tions
To execute programs residing in APU program memory, the microcomputer first verifies that HLDA is high. It then prepares APU operand memory, writes "the program starting address into two operand memory lqcations, and writes a 0 to the hold flipflop. The sequencer/controller immediately begins execution, and the flowchart in Fig 4 shows the remainder of the operation. The Table "8080 Based APU Sequencer/Controller Listing," is an assembly language program listing for the 8080 based sequencer/controller. It maintains the instruction counter used during APU program execution in Hand L registers internal to the 8086 microprocessor. A halt instruction terminates sequencer/controller execution, making results available to the microcomputer in · operand memory. Thus, in 1/0 mode, the microprocessor is always able to transfer instructions and data to the APU provided only that HLDA is high.
NCU Interface Details
The NCU differs from scientific calculator chips mainly in its flexible 110 capability, programmable mantissa digit count, user programmable flags (Fl and F2) for driving external circuits, error flag, and simple handshaking arrangement implemented by RDY and HOLD signals for entry of operands or instructions and for instruction execution. Operands can
90
COMPUTER DESIGN/JULY 1980
START: NEXINS: APU INS:
BAICH: HALT:
GETST1: BRIO:
10:
INPUT:
OUTPUT:
BRANCH: EXCHAN: CONDIT:
TZERO:
LSHIFT: GETST:
BZERO:
MVI OUT NOP LHLD MOV MOV INX RLC JC MOV OUT JMP RLC
JC SHLD IN ANA JM STA JMP MOV INX MOV INX RLC JC MOV MOV ANI INR RLC MOV MOV RLC
JC LDAX OUT INX OCR JNZ JMP IN STAX INX OCR JNZ JMP RLC JC XCHG JMP MOV ANI
JZ MVI MOV MOV ANI MOV INR MVI RLC OCR JNZ MOV IN ANA JM ANA JZ MVI XRA JZ JMP
8080 Based APU sequencer/controller Listing
01 HOLD
APUIC A,M B,A H CY BAICH A,B INST NEXINS
BRIO IC INST A GETST1 STATUS START E,M H D,M H
BRANCH C,A A,B 07 A
HOLD= 1 HLDA = 1 Wait for HOLD to go low Read APUIC into H and L registers, (L) =(IC), (H) =(IC+ 1) (A) = instruction (B) = instruction Increment APUIC CY (CARRY) = 7th bit of instruction BRANCH, 1/0, or HALT (A) = instructions Instructions to APU Go to fetch next instruction CY = 6th bit of instruction BRANCH or 110 instruction? Store APUIC (A) = APU status register
APU status Valid? Store APU status at STATUS
(E) = 2nd byte of instruction Increment APUIC (D) = 3rd byte of instruction Increment APUIC CY = 5th bit of instruction Is it BRANCH?
(A) = Number of additional byte pairs to be transferred
B,A A,C
OUTPUT D DATA D B INPUT NEXINS DATA D D B OUTPUT NEXINS
CONDIT
NEXINS A,B 08 TZERO FF C,A A,B 07 B,A B 80
B LSHIFT B,A INST A GETST B BZERO FF
c
EXCHAN NEXINS
(B) = Number of bytes to be transferred
CY = 4th bit of instruction OUTPUT (A) = Next byte of data Data to APU top of stack Increment data address
Data transfer over? Go to fetch next instruction (A) = APU top of stack Store Data Increment data address
Data transfer over? Go to fetch next instruction CY = 4th bit of instruction Is it conditional? (H,L) (D,E) Go to fetch next instruction (A) = instruction 1st byte
Test will be conducted for O or 1
(C) = Test status (A) = Instruction (A) = Address of status register bit (B) = Address of status register bit
B register's bit corresponding to the status register bit to be tested = 1, rest all are zeros
(A) = APU status register
APU status Valid? Separate the bit to be tested
Jump condition satisfied? If not, go to fetch next instruction
91
be entered by means of a sequence of instructions, as for a calculator chip, or by means of a sequence of BCD digits using the multidigit input instruction. A multiplexing signal, instruction select (ISEL), allows entry of either 6-bit instructions or 4-bit BCD data via pins II through 16 on the chip.
Four registers {X, Y, Z, and T) hold operands and temporary results; a memory register (M) can hold constants, or temporary results that might serve as loop counters directing program branches. Data always enter the X register, and the multidigit output instruction always supplies the X register content, digit by digit, at pins DOI to D04, accompanied by corresponding digit addresses at DAI to DA4 and a write pulse. The 12-digit internal registers hold two digits of exponent, a digit containing mantissa and exponent sign bits, a digit giving the decimal point position, and up to eight digits of mantissa.
1/0 instructions operate in either floating or fixed point format. Either mode sequentially transfers the sign digit, the decimal point position digit, and the requested number of mantissa digits. Fixed point transfers also supply the two exponent digits; the exponent sign is available in the sign digit. A reset establishes floating point operation with an 8-digit mantissa by default. A "toggle mode" instruction selects alternative modes of operation. 1/0 and branch instructions are 2-byte commands whose second byte is used externally as the eight high order bits of the data memory address, in the case of 110 instructions, or as the high order branch address for branch instructions.
The ready line (RDY) goes high to indicate that the NCU is ready to accept instructions, and low to read and execute an instruction if HOLD is low. Instruction time is lengthened, when necessary, to wait for HOLD to go low. 1/0 instructions
CPU READ STORE
07 06
05
04 CPU
DATA BUS
03
01
DI DO
CPU WRITE STROBE
ERROR
1111
Rli RESET
004
003 Ml
002
Oo\2
DAI
DOI
Mll57109
.m
msm
tS CT:J
14
13 12 II
i x 74C901
CPU ADDRESS STORE
i x 7414
~ r x74!4
' x 7431
Fig 7 NCU interface in 1/0 mode. Two buffers achieve MOS-TTL compatibility. Instructions and data are latched, and 3-state octal buffers read output from D01 to D04. After latchin~ instruction, microcomputer
releases HOLD to rise on the falling edge of ADY. Since data 1/0 occurs after DAS" pulse, ready is generated at
address strobe time and cleared by DAS. Dummy read senses DAS, and data are valid 15 µ.s later
92
COMPUTER DESIGN/JULY 1980
NO
00 OTHER PROCESSING
READ NEXT DIGIT
Fig 8 Data transfer between microprocessor and NCU. Multiprocessor mode interface for NCU requires modified sequencer/ controller program that implements this series of operations, along with Fig 7 hardware in place of APU in Fig, 4. 1/0 and branch instructions need not be implemented by NCU sequencer/controller, as was required for APU, because they appear in NCU instruc-
tion set
have the particular disadvantage that sequential transfer of digits occurs at a set, uncontrolled rate.
The NCU connected to a microcomputer in single instruction execution mode is shown in Fig 7. Data and instructions flow between the NCU and the microcomputer as shown in Fig 8. Since the NCU supply voltage differential is 7.9 to 9.5 V, a 9-V supply is used. The 7417 buffers convert
TTL inputs to the 9-V level, and 74C902 buffers convert all MOS outputs from the NCU to TTL signal level. Outputs DOI to 004, ERROR, and RDY are connected to the microcomputer data bus by an 81LS95 octal, 3-state buffer. When RDY is high, the microcomputer writes an instruction into the 74LSI 74 6-bit latch by way of the data bus and pulls HOLD low to request NCU instruction execution.
93
For 110 instructions, the microprocessor prepares to accept serial digits in the current number format. Input instructions latch digit data into the 74LS174 at digit address strobe (DAS) time. Output instructions leave digit data on pins DOI to 004 about 15 µ.s after DAS appears. In practice, a dummy read serves to sense DAS, and the actual digit is available after a slight delay. As shown in Fig 3, the digit write or dummy read address ORed with CPU Address Strobe raises microprocessor HOLD, thereby lengthening the digit write or dummy read cycle until DAS appears.
When the condition specified in a conditional branch instruction exists and a branch must be made, the BR pulse issued by the NCU sets a branch latch. The microprocessor reads the branch latch when ROY goes high and performs a branch when this latch is found to be set. The branch latch is cleared at instruction latching time.
In multiprocessor or master-slave mode, the NCU interface can be implemented in much the same way as for the APU described earlier. Hardware shown in Fig 7 replaces the APU shown in Fig 4, in this instance, while the sequencer/ controller assembly language program from the Table "8080 Based APU Sequencer/Controller Listing," requires suitable modification to implement the flowchart of Fig 8 to direct the flow of operands and instructions between the NCU and external hardware. 1/0, branch, and halt instructions need not be implemented by the sequencer/controller, for a master-slave NCU interface, because they are provided in the NCU instruction set.
Summary
Calculator chips, number crunching units, and single-chip arithmetic processing units enhance microcomputer performance in scientific and engineering applications by relieving the microcomputer of the burden of arithmetic operations. Both the calculator chips and the NCU are inexpensive, low power devices offering relatively slow instruction execution speed. However, apart from the need to achieve MOS and TTL signal level compatibility, interfacing calculator chips as microcomputer peripherals involves simulation of keyboard (input) and display (output) functions in hardware and software. The disadvantage posed by entering operands as a sequence of mixed instructions and data is reflected in further software overhead. The NCU, on the other hand, incorporates some of the best features of a general purpose microcomputer such as 110 instructions, conditional branch instructions, programmable output flags, and the ability to sense external conditions. These allow straightforward use of this component in standalone systems or in a multiprocessor configuration as a microcomputer extension.
An arithmetic processing unit chip is tailor-made for use as a microcomputer peripheral as it offers nearly 200 times the speed of the NCU. But, it does so at nearly twenty times the cost. The APU, on the other hand, performs only arithmetic functions and lacks I/O or decision making capabilities, thus requiring an external sequencer/controller for use in a multiprocessor configuration.
In view of the available alternatives, use of calculator chips as microcomputer extensions is of academic interest or, at best, should be confined to applications that require very sophisticated mathematical or statistical function
94
capability. For most applications, particularly those that use binary coded decimal format, the low cost and the wide range of microcomputer features offered by the NCU make it the optimum choice. In some cases, where execution speed is critical, the high speed and simple interfacing capability of the APU make it a better choice. Either type of arithmetic processor chip outperforms arithmetic routines implemented in software, eliminates the investment in development and maintenance that such software requires, and can be used with virtually any type of microcomputer.
Acknowledgements
The author wishes to acknowledge the guidance of Dr. P. K. Patwardhan, Head of Computer Section, BARC, and the help offered by colleagues, particularly Shri P. Ram Mohan, Scientific Officer, Computer Section, BARC, in preparing this article.
Bibliography
"Algorithm Details for the Am951 l Arithmetic Processing Unit," Advanced Micro Devices, Inc, Sunnyvale, CA 94086
"Am951 l Arithmetic Processor," Advanced Micro Devices, Inc, Sunnyvale, CA 94086
"8080 Microcomputer Systems User's Manual," Intel Corp, 3065 Bowers Ave, Santa Clara, CA 95051
Soo Nam Kim, "Number Cruncher (MM57109) Interface to Microprocessor," National Semiconductor Application Note 186, National Semiconductor Corp, 2900 Semiconductor Dr, Santa Clara, CA 95051, July 1977
"MM57109 MOS/LSI Number-Oriented Microprocessor," National Semiconductor Corp, 2900 Semiconductor Dr, Santa Clara, CA 95051, Mar 1977
W. W. Moyer, "Interfacing Calculator Chips as Microcomputer Preprocessors," Computer Design, May 1978, pp 187-191
A. J. Weissberger and T. Toal, "Tough Mathematical Tasks are
Child's Play for Number Cruncher," Electronics, Feb 17, 1977, pp 102-107
B. K. Gupta is Scientific Officer in the Computer Section of the Bhabha Atomic Research Centre in Bombay, India. While there he has been involved in system design, and hardware and software development for data acquisition systems and the microcomputer based automation of the Neutron Spectrometer and X-ray diffractrometer. He holds a BSc in Electrical Engineering from Regional Engineering College, Kurukshetra, India.
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DATA DRIVEN SYSTEM FOR HIGH SPEED PARALLEL COMP.UTINGPART 2: HARDWARE DESIGN
Prototype design for a data driven computer uses highly parallel hardware to speed up computation and implements a 2-dimensional flowgraph model of computing that departs markedly from traditional approaches to realize increased parallel activity in software
John Gurd and Ian Watson
University of Manchester
Manchester, England
A prototype data driven parallel computer being built at
the University of Manchester, Manchester, England, im-
plements a comprehensive model of computing based
on data flowgraphs. Using the model created in Part 1, Part 2 determines the requirements for a system to ex-
ecute the labeled flowgraph model. These lead to a cir-
cular pipelined architecture in which packages of information representing tokens, arcs, and nodes can circulate.
Investigation of parallelism in hardware as a means of speeding up computations discussed in Part 1 identified the pipeline and the parallel array as two basic hardware structures. A key factor in using such hardware is the ability to express parallel activity in software. Since conventional programming languages, based on the classical von Neumann concepts of sequential memory access using a program counter, are not suited to expressing parallel activity, a data driven model of computing was developed to clarify the dependency relations between data and to expose the potential for parallel activity in 2-dimensional flowgraphs. Computers based on this computational model have proven to be highly concurrent, but quite different in structure from traditional computers.
Studying one particular data driven computer* that implements the model previously developed, Part 2 details the design of individual pipeline stages and estimates system performance. Future developments in high level software and very high performance systems are also considered.
It is apparent from the rules for executing flowgraphs that a data driven computer must be capable of performing the following activities: transferring a token from the tail to the head of the arc on which it lies; grouping together tokens of the same color lying at the heads of arcs that point to a common node, and arranging for the node to fire when all of its inputs are available; and executing operations on input data,' erasing the input tokens, and producing output tokens ~t the tails of the appropriate arcs. These actions must be performed continuously until no tokens remain in the graph. Furthermore, to present data as input and to receive results from the computation, there must be a means of inserting tokens into the system and extracting them from the system.
Data Driven Architecture
The structure in Fig 1 reflects these needs. It comprises five units connected together in a ring. The major traffic around
·The system described is a small prototype machine based on an outline design proposed at Manchester, England, in 1978.1 It is currently being constructed by the authors with funding from the Distributed Computing Systems Programme of the Science Research Council of Great Britain· and is expected to be operational in mid-1981.
97
INPUT----TOKEN PACKAGE
TOKEN PACKAGE
SWITCH
1 - - ---TO.K-E_N_ _ _ _ OUTPUT PACKAGE
TOKEN PACKAGE
TOKEN QUEUE
TOKEN PACKAGE
PROCESSING UNIT
NOOE
EXECUTABLE
STORE
GROUP
PACKAGE " - - - - - ' PACKAGE
MATCHING UNIT
Fig 1 Data driven computer structure. Five major functional blocks communicate in clockwise direction around ring. Token package is main unit of information comprised of data value, label, and destination node pointer. Matching unit groups tokens. When sufficient tokens arrive to fire node, appropriate group package finds destination node description in node store. Executable package containing operator, all operands, label, and pojnter(s) to further destination node(s) is sent to processing unit for execution. Switch handles external 1/0. Token queue saves excess tokens
the ring is in token packages representing the machine equivalent of labeled tokens lying on flowgraph arcs. Token packages are either sent to the ring as external input or else formed during a computation at the output of the process- · ing unit. They pass around the ring in a clockwise direction, first encountering the switch, which serves to merge the two sources of tokens and to direct output from the system, and then the token queue, which holds the large numbers of tok~ns that highly parallel programs can generate. The third unit, called the matching unit, groups together tokens with the same label traveling to the same node.
When sufficient matching tokens are present, the node can be fired and all tokens can be sent to the next unit in a group package. Otherwise, each incoming token must be placed in the matching store to await the arrival of further corresponding tokens. Fired groups of tokens find the operation to be performed on them in the node store. For convenience, they are also given the addresses of the nodes to which output should be sent when execution is completed. The node store thus constructs complete executable packages consisting of an operator, operands, common label, and one or more destinations for the resultant values. These packages are sent to the processing unit where the required operation is executed, eventually producing new tokens that start a repeat journey around the ring.
Notational Influences
It is important to reiterate the influence of the labeled flowgraph notation in formulating this structure. Each token carries not only its value, but also a label and a destination, including the place of entry to the node (eg, the left- or right-hand side of an addition operator). This requires each word of token queue memory and matching memory to be
much longer than a conventional memory word containing only. a data value.
Moreover, the matching operation r~quires an associative memory ·for saving unmatchable input tokens. The common name used for !lSSociation is the label and the destination (except for points of entry, which should of course differ). To conform to the required f!owgraph behavior, the matching unit must perform two kjnds of access to the associative memory after searching for items wi~h the same name as the incoming token. If the search succeeds, and all matching tokens are present, matched token entries are extracted from tqe associative memory and sent to the node memory. If the search fails, or one or more required tokens are missing, the incoming token is inserted into the associative memory.
Finally, the process ing unit instruction set must include data branch, token relabeling, and token delabeling operations, apart from the usual arithmetic functions . The instruction set naturally excludes conventional control branch or jump instructions and memory to memory instru ctions.
Parallelism
The ring structure of Fig 1 is a natural candidate for pipeline construction as described in Part 1. Individual units interact only by sending token packages around the ring; hence, the individual switching, queuing, matching, node access, and processing operations implemented by the five functional units can be overlapped and eve n allowed to overtake one another. The only critical area of the system is the matching unit, where the associative m e ~ory must be searched serially. The speed at which tokens can be matched at the associative memory effectively determines the pipeline delay period. Elsewhere, functional units can be pipelined or paralleled as convenient to match this time period. In the prototype system under construction, it has proved necessary to place several processing elements in a parallel array within the processing unit. All other units are composed solely of pipeline stages operating serially at the required rate.
Logical System Design
Two major features of a pipeline ·are its delay period and its synchronization type. Use of transistor-transistor logic technology determines the 200-ns delay period chosen for the prototype f ,tern. Both the modest technology and relatively slow speed are deliberate since the prototype serves only to test out ideas for data driven computing and is not intended as a very high speed production computer.
The choice between a synchronous or an asynchronous pipeline involves a compromise. Synchronous systems are attractive in situations where all operations take similar times to complete, and whenever arbitration between competing tasks is needed. However, the .problems of distributing a common-phase clock in a physically large synchronous system mean that asynchronous communication is often preferred.
In the compromise design, local clocks are used within each major functional unit of Fig 1, with synchronous internal arbitration, either pipelining or paralleling, as appropriate. An asynchronous, unidirectional communication
98
COMPUTER DESIGN/JULY 1980
UNIT A
5 v
5 v
100 n
UNIT B
RIBBON
CABLE BETWEEN
UNITS A AND B
B.FREE (;I P.ACCEPTED)
LE OE
OUTAPUT ,.__ _ _ _ _ _ _ _ _ _.... o, 01~----./ · · · - - - - - - - - - ' - - - - - - - - < o; B B Qi ~--/INPUT
DATA
outPuT
TRANSMIITED
BUFFER
DATA
INPUT
DATA
BUFFER
PACKAGES USED ARE 74 SERIES TTL. AS FOLLOWS:
4 1/ p NANO LINE DRIVERS 1 ii p AND GATES EDGE TRIGGERED J.K fllPFLOPS BUFFER REGISTERS
74SI40 74S08 74SI 11 74LS373
Fig 2 lnterunit pipeline communication circuit. Each unit has its own local clock to synchronize internal events. Asynchronous transfer between units is synchronized to appropriate clock at each end by this circuit. Handshake between D.SEND and D.ACCEPT helps transmit data from output buffer of one unit to input buffer of next unit. Circuits are initialized by RESET, which is passed around pipeline from host system
link between each pair of functional units provides buffering and resynchronization at the input and output of each unit. Fig 2 shows logical circuits for controlling the input and o.utput interfaces. An asynchronous handshake arrangement achieves data transfer by using the D.SEND and D.ACCEPT signals. A pair of edge-triggered J·K flipflops synchronizes the handshake to the appropriate clock at each end. While use of two flipflops slows the transfer slightly, it allows resolution of uncertainty when handshake signals change at the same instant as the synchronizing clock. This situation has long been recognized as a major trouble source in systems using asynchronous communication.3
Sender and receiver clock signals derive from unrelated 40-MHz sources, except in the matching and processing units, which use 25- and 10-MHz clocks, respectively. Delays through logic at either end of the circuit, together with the need for four delays through the linking cable, imply that communication over distances of up to 10 ft (3 m) is possible within the 200-ns pipeline delay period: .
Data Formats
For various reasons such as board size, connector density, expected costs (especially for memory), and anticipated system usage, token packages were designed to have a basic word length of 96 bits. Because all communication in the system takes place via the pipeline, one bit must be used to distinguish between system messages (eg, load a value into the node memory) and computational messages (eg, an actual token). In the case of token packages, the remaining 95 bits are allocated among a 37-bit value field, a 36-bit label field, and a 22-bit destination field . The method of labeling tokens and controlling data flow through program graphs brings about these unusual field sizes. The largest data value recognized is a 32-bit floating point value, and integers are 24 bits long. It can be seen from these figures that the storage requirements for data driven execution with labeling exceed conventional storage requirements by a factor of three or more.
99
Pragmatic arguments restrict the maximum number of tokens that can be associated or matched up in the matching unit to two. This is not a severe theoretical limitation, since it is possible to simulate any multiple-input node with a primitive graph containing only 1- and 2-input nodes. It is a useful, practical restriction because it permits completion of the matching operation within the required 200-ns time limit. However, it reduces the execution efficiency of some functions.
Similar reasoning limits the maximum number of data value copies that any primitive node can make to two. Once again, this is not a theoretical problem, since a tree of primitive, 2-output copy nodes can produce a multiple set of copies. However, again, efficiency may be affected.
Taken together, these decisions fix the sizes 0£ group packages and executable packages at 133 and 167 bits, respectively. A group package is simply a token package with an extra 37-bit value field. An executable package consists of two 37-bit value fields, two 22-bit destination fields, one 36-bit label field, and a 12-bit operator field. The remaining bit is used to mark system messages.
The node memory has a 35-bit word length, of which 3 bits are used to check the validity of different types of access, and the remaining 32 bits hold information about a node. One or two words may represent a node in the node memory. The first word always defines the operation to be performed at the node and a destination node to which the result token should be sent. The optional second word may define either a second destination node for the result (eg, copy operation) or a literal value to be used as one of the operands at the node . Literals can appear only when the matching unit has not been used to pick up a matching token. They are useful when performing single-input functions that are of 2-input form but with one input constant (eg, increment value, which is equivalent to adding the value to a constant).
Input/Output and Host System
The prototype system is capable only of data driven computation. Because it cannot control peripheral devices directly, a conventional host system handles file storage and input/output (1/0). Two asynchronous interface links attach the host to the data driven ring (Fig 3). The host machine is a DEC LSJ.11 with a range of standard peripheral devices, including a telephone link to external mainframes. Although it is not the ideal system for its position because of its relatively small word length and slow speed, it is adequate as long as 1/0 traffic remains light. The LSI-I I drives the data driven ring through a 16-bit parallel interface and a 16- to 96-bit word expander. It receives output from the ring via the 96- to 16-bit word compressor and the same parallel interface.
An unusual pipeline unit, the switch must arbitrate between two separate sources of input: the host system and the processing unit. The synchronized nature of the two input buffers simplifies this task. Whenever two packages arrive simultaneously, the switch gives priority to the package coming from the processing unit. To avoid unreasonable delays in processing unit output, the switch operates within a 100-ns period. Output packages are recognized at the switch input and routed to the host exit output buffer. All other packages are sent to the ring output buffer.
100
Token Queue
Implemented as a first in, first out circular buffer for token packages, token queue (Fig 4) memory is 16k words by 96 bits plus parity, built of 70-ns static random access memory. Total memory access time is 100 ns, and the controller uses this high speed by interleaving read and write cycles to consume input and generate output at the required 200-ns intervals. If the memory buffer is full when a read cycle is ready to start, the controller performs a dummy read cycle instead; it then checks for input and, if input is present, performs a write cycle. No attempt is made to change the pattern of 100-ns alternating read and write cycles. To keep this strategy from causing uneven periods between token packages further down the pipeline, an additional, synchronous, output buffer stage is inserted in the pipeline in this unit.
MTU
FDU
VDU PRT
r------
1 ,---1 I
II I
I
1II 1IL - - -
L ___ _
- - -- - --:i
-----, I I I I I I I I I I I I I I I
I I ___ _ .JI II _____ _J
r-----
1 r---1 I
I I
)Al FROM PU
----------"v'-. TO TQ
DOUBLE oomo LINES REPRESENT ASYNCHRONOUS COMMUNICATIONS LINKS
MTU = MAGNETIC TAPE UNIT
S = 16-BIT TO 96-BIT DEMULTIPLEXER
MTC = MAGNETIC TAPE CON TROLLER
A = 1-WAY SYNCHRONOUS ARBITRATOR
FDU = FLOPPY DISC UNIT
= fDC FLOPPY DISC CONTROLLER = VDU CO NTROL TERMI NAL = PRT 30-CHAR/ s OECWRITER = MOM JOO-BAUD MODEM = SIO 4-CHANNEL SERIAL INTERFACE
LSI = LSl-1111 + 18· k WORO MEMORY PIO = 16-BIT PARALLEL INTE RFACE
= M 96-BIT to 16-BIT MULTIPLEXER
0 = 1-WAY DISTRIBUTOR
= SHIB SWI TCH TO HOST INPUT BUFFER = HSOB HOST TO SWITCH OUTPUT BUFFER = HSIB HOST TO SWI TCH INPUT BUFFER = RSIB RI NGTO SWITCH INPUT BUFFER = SROB SWITCH TO RING OUTPUT BUFFER
SRHB = SWITCH TO HOST OUTPUT BUFFER PU = PROCESSI NGUNIT
= TQ TOKEN QUEUE
Fig 3 Host system interface. LSl-11 frontend computer drives ring via switch module. Multiplexer and demultiplexer convert between 16-bit host word and 96-bit token package lengths. Host then mimics any other pipeline unit with asynchronous 1/0 communication links. Switch arbitrates between competing inputs internally and synchronously, avoiding the problem of asynchronous arbitration
COMPUTER DESIGN/JULY 1980
TOKEN QUEUE
L.---
FROM SW
AODR R/ W
DATA IN
TS
DATA OUT
DOUBLE DOTIEDLINES REPRESENT ASYNCHRONOUSCOMMUNICATI ONS LINKS
SINGLE DOTIED LINES REPRESENT CONTROL SIGNALS
= TS ! 6k x 96-BIT WORD TOKEN STORE
A = ADDRESS ARBITRATOR
= RWC = ALTERNATINGREAD-WRITE CONTROLLER
SWC STOREWRITE CONTROLLER
SRC = STORE READ CONTROLLER
= ·STIB = SWITCH TO TOKEN QUEUE SMOOTHINGBUFFER
TQSB TOKEN QUEUE SMOOTHING BUFFER
!MOB = TOKEN QUEUE TO MATCHINGUNIT OUTPUT BUFFER SW = SWI TCH MU = MATCHING UNIT
:11
0I I
TO MU
Fig 4 Token queue. Highly parallel programs may generate large numbers of tokens, many of which must be held temporarily. Basis of unit is 16k-word circular queue with 100-ns access time. Alternate attempts to read and write the store are made at head and tail of queue, respectively. Empty store, or absence of input, postpones read or write cycle for 200 ns. Extra synchronous buffer stage smooths irregular output
Matching Unit
Token matching unit operation is the most critical part of the system. The matching store is relatively large (16k token packages plus parity) and must be accessed associatively on 54 bits of the label and destination fields. Present costs preclude using a true content-addressable memory of this size; therefore, a hardware hashing technique simulates the associative memory by implementi;ig a parallel hashing scheme that searches several hash tables for a matching entry simultaneously, as shown in Fig 5.4· s. 6
A separate pipeline stage precedes the main section of the matching unit. Here, an 11-bit hash key is generated from the label and destination fields of the incoming token package. The token package and the hash key are transferred to the matching memory's input buffer. At this point, examining a bit of the destination field determines whether matching is appropriate for this token package. Single tokens, for which matching is not appropriate, pass directly to the output buffer.
A hash table search locates the partner for other tokens. In this case, the hash key is used as an address to read the eight banks of the hash table in parallel. The label and destination fields of all eight accessed locations are compared with the corresponding sections of the input token
package. Successful matches then cause the matching entry to be deleted from the hash table, and the matched token pair, together with its label and destination, is forwarded to the output buffer.
Unsuccessful matches normally cause the incoming token package to be placed at a free position within one of the parallel memory banks still addressed by the hash key. Occasionally, this will not be possible because all words addressed by the key already contain nonmatching token packages. In this last case, the system departs from conventional techniques. Instead of generating a new hash key and starting all over again, the controller routes the unmatched token package to an overflow unit where it can be processed at leisure.'· 5 One advantage of the data driven notation is that subsequent token packages can be handled out of turn, providing that their hash keys are disjoint, without affecting computation results.
The overflow unit complicates the operation just described. For example, after an unsuccessful match, a token cannot be placed in a free location if an overflow has occurred for its hash key; instead, the nonmatching token package must be referred to the overflow unit. Also, there must be a return path from the overflow unit to the system. This is located at the input to the matching store itself, and provides potential competition for normal ring traffic.
101
r-----------
1 ,-----------
1I. I I I I I I
! L_
L __
OVERFLOW ---------------,
UNIT
--------------, I
MATCHING STORE
I I I I
II I
I
I I
I I I I ...J I
___J
TO NS
HASH KEY. MATCH NAME. SEARCH I DATA DELETE! OUT WRI TE
PHT
oomo DOUBLE
LINES REPRESENT ASYNCHRONOUS COMMUNICATIONS LINKS
= HKG HASH KEY GENERATOR = MSC MATCHING STORE CONTROLLER = PHI 8 x 1k x 96·BIT WORO PARALLEL HASH TABLE
= A = 1·WAY SYNCHRONOUS ARBITRATOR
0 1·WAY OISTRIBUTOR
TMIB = TOKEN QUEUE TO MATCHING UNIT INPUT BUFFER
= HMOB HASH UNIT TO MATCHING STORE OUTPUT BUFFER = HMIB HASH UNIT TO MATCHING STORE INPUT BUFFER = VMIB OVERFLOW TO MATCHING STORE INPUT BUFFER
MVOB = MATCHING STORE TO OVERFLOW OUTPUT BUFFER
= MNOB = MATCHING STORE TO NOOE STORE OUTPUT BUFFER IQ TOKEN QUEUE
NS = NODE STORE
Fig 5 Matching unit. Critical system area contains two pipeline stages and parallel overflow unit. Main matching store consists of parallel hash table. Preceding pipeline stage generates hash key. Access to store may be successful or unsuccessful; successfully matched tokens are extracted from store and sent to node store via output buffer. Unmatched token~ are usually written to spare table location. If hash line overflows, token is referred to separate overflow unit. Provided that hash keys differ, matching unit handles further tokens even before overflow outcome is known . Output occurs once every 300 ns on average
Simulation studies indicate that matching unit throughput remains largely unaffected until the hash table is about three-quarters full. 6 This compares favorably with other hashing schemes.
Viewed overall, the store and release mechanisms in the matching unit alter the nature of the pipeline between input and output. Output is less frequent than input but involves greater amounts of information. Simulation predicts that token packages arriving at 200-ns intervals will produce group packages every 300 ns on the average. This figure, however, depends critically on the form of programs. The basic hash table access time is 160 ns, and the three possible access types, neglecting overflow, take 40 ns for bypass, 240 ns for a successful match, and 320 ns for an unsuccessful
102
match attempt. Given roughly even numbers of each access type, as would be expected, this yields the average figure cited. However, a long sequence of unsuccessful match operations results in inefficient use of later pipeline stages.
Node Store
Two pipeline stages implement the node store (Fig 6). The first stage accesses a segment table containing 64 entries addressed by the six most significant bits of the incoming destination field. Each segment table entry points to the base of a segment of main node storage and holds an indication of the segment length. The second stage of the node store unit accesses the required node using 12 bits of the
COMPUTER DESIGN /JULY 1980
destination field as an offset from the segment base. Accesses beyond the end of a segment flag an error. Node en· tries may be one or two words long; 2-word entries are accessed in sequence.
Depending on the kind of node entry discovered, the node store constructs an executable package for output to the processing unit. These packages are consumed at an average rate of one every 300 ns, the same rate at which input arrives at the node store. The 16-word main node store has an access time of less than 200 ns so that it can handle programs in which up to half of the nodes require 2-word entries.
Processing Unit
Prototype computer system design dictates that all design decisions offer maximum flexibility. In particular, it is pru· dent to anticipate instruction set changes. This requires development of a microprogrammable processing unit. Because flexible microprogramming is relatively time con· suming, it proved necessary to use a 'parallel array of prqcessing elements within tqe processing unit to maintain the required throughput by processing one executable package every 300 ns. Fig 7 shows the basic structure of the processing unit.
The first pipeline stage executes certain high speed (200-ns) operations that cannot be performed within the parallel array. These operations control generation of activity names in the system and allow for gathering performance statistics. The main processing area comprises the parallel array of processing elements with appropriate input and output buffers. Each element is built around a 24-bit arithmetic unit constructed from 4-bit AMD2900 series bit slice microprocessors. A microprogram controller with a writable microcode store controls the main processing area to achieve the required, flexible instruction set.
Processing elements have a 200-ns microcycle time, and instruction execution periods that vary from 5 to upwards of 50 microcycles. The average expected execution time for a processing element is 4.5 µ,s per operation. Hence, the number of elements reguired to maintain the throughput at
one executable token package every 300 ns is 4.5/0.3 = 15.
More elements would lea~e a high percentage of elements idle because the. pipeline could not provide input quickly enough to keep them busy; fewer would lead to a general slowing down of the system because the processing array could not cope with input as fast as the pipeline supplies it.
Token package execution results in the production of zero, one, or two result token packages. The expected com· bination of these different behaviors is such that the ~verage consumption of executable packages once every 300 ns will lead to an average production of result token packages once every 200 ns.
The processing unit is synchronized with a relatively slow (10-MHz) clock to simplify the problems of distributing packages to and collecting packages from the pr'ocessing elements. Each distribution or arbitration cycle is selected in advance and then executed in synchrony with the clock.
System Performance
The most important feature of the pipeline just described is that all stages are independent from buffer to buffer. Each stage relies only on its input and its internal storage. This means that the system performance is determined by the overall amount of work provided, in the form of token packages, together with the a~erage timing characteristics of the pipeline.
Average delay times associated with various pipeline stages yield a maximum processing rate of one executable package every 300 ns. Using the approximation that one
DOUBLE oomo LINES REPRESENT ASYNCHRONOUSCOMMUNICATIONS LINKS
STC = SEGMENT TABLE CONTROLLER ST = SEGMENT TABLE NAG = NODE ADDRESS GENERATOR NSC = NODE STORE CONTROLLER NOS = NODE DESCRIPTION STORE MNIB = MATCHINGUNIT TO NOOE STOREINPUT BUFFER NSIB = NODE STORE INTERMEDIATE BUFFER NPOB = NODE STORETO PROCESSING UN IT OUTPUT BUFFER MU = MATCHINGUNIT PU = PROCESSINGUNIT
Fig 6 Node store. Two separate pipeline stages comprise node store. First stage accesses segment descriptor from 64-entry segment table and forms read address of required destination node. Second stage accesses node from one or two words in main node store. Resulting executable package is sent to processing unit via output buffer
103
NODE EXECUTOR
TO SW
0
! I
I L
L
DOUBLE DOTIED LINES REPRESENT ASYNCHRONOUS COMMUNICATIONS LINKS
= SIE SPECIAL INSTRUCTION EXECUTOR
GCS = GLOBAL CONTROL STORE D = 15-WAY SYNCHRONOUS DISTRIBUTOR A = IS.WAY SYNCHRONOUS ARBITRATOR PE = PROCESSING ELEMENT
= NIE NORMAL INSTRUCTION EXECUTOR
= WMS WORKSPACE AND MICROPROGRAM STORE
NPIB = NODE STORE TO PROCESSING UN IT INPUT BUFFER PPOB = PREPROCESSOR TO PROCESSOR OUTPUT BUFFER PPIB = PREPROCESSOR TO PROCESSOR INPUT BUFFER
= PEIB = PROCESSING ELEMENT INPUT BUFFER
PEOB PROCESSING ELEMENT OUTPUT BUFFER
PSOB = PROCESSING UNIT TO SWITCH OUTPUT BUFFER NS = NODE STORE
= SW SWITCH
Fig 7 Processing unit. Parallel array of 15 bit-sliced , microprogrammable processing elements achieves main processing capability. Distribution and arbitration are performed synchronously. On average, unit consumes executable package once every 300 ns and produces tokens at 200-ns intervals. Preprocessing stage performs system and monitoring tasks that cannot be distributed to individual processors because they are not strictly functional operations
executable package is equivalent to a conventional machine instruction in a comparable processor with a 32-bit word length and floating point operations, this gives a throughput of roughly 3.3M instructions/s. In terms of useful floating point operations, this has been found equivalent to about l.lM floating point operations/s for one machinecoded example. . It must be stressed, however, that these are maximum rates that rely on uniform program behavior at various stages of the pipeline. Three secondary factors will cause performance degradation from the optimum. First of these is a long sequence of unmatchable tokens arriving at the matching unit. High performance relies on an equal mix of 1- and 2-input nodes in the program and a smooth distribution of matching store accesses resulting from these nodes. Secondly, the node store should receive no more than half of its total requests for double-length entries. These are typically used for instructions with literal constant operands and for copy operations; they occur quite frequently in practice. Finally, the processing unit requires an even mix of different kinds of executable packages to maintain the
104
average execution period. A long sequence of lengthy instructions (eg, floating point division) will lower the throughput.
The exact effect of these factors has not ye t been determined, but it is expected to be relatively small when compared with the primary problem of providing enough work to keep the whole pipeline occupied. Give n an ave rage, wellbehaved program, it can be seen from the d iagrams that there are a total of 16 pipeline stages plus 15 processing elements to keep occupied· if maximum throughput is to be achi eved. Thus, the program should provid e at least a 31-fold degree of parallelism. The measurement of parallelism in programs is an open problem that has received a great deal of recent attention. 7· 8
Future Developments
Although the Manchester University research group is engrossed in practical details of machine implementa tion-at th e moment, there has been ample opportunity to an ticipate
CO MPUTER DESIGN/JULY 1980
future challenges when the system is completed in 1981. Two interesting areas of study have emerged. One is the development of richly expressive, and yet efficiently translatable, high level languages for programming data driven systems. The second is realization of an extensible computer whose power may be increased without theoretical limit simply by adding more and giore, hardware modules.
High Level Languages
It is no longer practical to design computer systems without regard for the programs they are intended to run, and most programs currently in use are written in a high level language. Consequently, many machines, including data driven machines, are designed around specific programming languages, and others, such as the one described here, are developed in close conjunction with a programming discipline.9 · 10· 11
For general purpose systems, there is a broader requirement to run a variety of different languages, and it is interesting to see how versatile the data driven system can be in implementing these. Programming languages can be classified into three groups for this purpose.
The first group comprises those languages developed around data flowgraphs, usually for high speed parallel computing. These are expression oriented, or singleassignment languages with parallel semantics based on a data driven view of program execution. Of course, they are therefore a natural high level vehicle for data driven computers, as Part 1 of this article demonstrated in discussing the ease of translation into graphical machine code.
More of a challenge is presented by the second group of · high level languages. It consists of the traditional, von Neumann languages with their semantics based on variables in fixed storage locations and sequential execution of program statements. Sequential flowgraphs for such programs can be generated by a straightforward, if somewhat tedious, translation. 12 However, the challenge is to unwind the sequential execution completely so that as much work as possible may be performed in parallel. This requires the use of sophisticated loop unraveling techniques together with software flow analysis. 13· 14
Languages whose semantics are purely mathematical and not based on any particular view of program execution comprise the third group. These are founded mainly on the theory of mathematical functions (the lambda calculus) with the important exception of the language LUCID, which is based on an algebra of histories. 15 Because these languages are not machine oriented, they are difficult to implement efficiently on conventional computers. The principal problem is that of minimizing the amount of computation performed. Although the problem is also present for data driven implementations, there is some indication that the parallelism available to be exploited in data driven systems ailows rapid execution of functional programs.
At present, high level software for data driven systems is at an early experimental stage. Pilot compilers for all three groups of high level languages have been written, but there is no clear indication of an optimal language among the candidates. On the other hand, most researchers agree that languages based on the von Neumann model are not appropriate for specification of highly parallel algorithms.
Extensible Hardware
Data driven notation was developed as a means for expressing highly parallel computational activity. However, the architecture described here is limited in the amount of parallelism it can exploit by the need for sequential token matching within a serial pipeline. Since the prototype system has proven to have just . over 30-fold hardware parallelism, problems with muc)l greater amounts of parallelism will run relatively slowly. Two possible improvements to the prototype architecture may allow much higher rates of computation.
The first improvement would not alter the basic pipeline structure at all, but would instead increase throughput by making the primitive machine operations much more substantial than the simple arithmetic operators suggested in Part 1. Each executable token package could then represent a niuch larger fraction of the whole computation, and the fixed rate of package execution would increase the overall processing rate. While this might require a larger complement of more complex processing elements, the biggest difficulty lies in deciding which powerful primitive operations should be included in the instruction set.
A = ARBITRATOR D = DISTRIBUTOR
TQ = TOKEN QUEUE
Mu = MATCHI NG UNIT
NS = NODE STORE PU = PROCESSI NG UNIT
Fig 8 Parallel array of data driven rings. Very high processing rates might be achieved by connecting large numbers of pipelined rings in this kind of stq.1cture. Unidirectional, pipelined exchange switch is modularly extens ible and of relatively simple form as compared to crossbar switch, for example. In very large systems, major problem is to distribute workload evenly among data driven rings
105
The second improvement involves changing the system struct1;1re so that several serial pipelines can operate simultaneously in a parallel array. The nature of the matching operation is such that tokens with similar colors and destinations could be isolated in separate pipelines as long as the output from any processing unit can reach the input to a!ly matching unit. The unidirectional nature of the pipeline makes this feasible with relatively low cost in time and hardware. complexity. The resulting system has a number of pipelined ring structures connectJ!d in layers tb a greatly extended switch unit, as shown in Fig 8. The . time delay through the switch increases logarithmically with the number of riiigs.
Consequences .of this multilayered structure are far reaching. It ~~ems capable of indefinite expansion, providing continually increasing computing power for problems with sufficient parallelisrti to keep the hardware busy. Of course, there are many practical difficulties that are largely concerned with the problems of distributing work evenly between layers of the system.
Conclusions
Starting with the observation that the speed of computation for some problems needs to be much higher than is presently achievable, and that the best hope for achieving the required speed is through the use of parallel hardware, a novel parallel computer architecture with some interesting properties has been developed. The architecture is based on a data driven, graphical model of computation that views program structure and execution in two dimensions rather than one. A prototype system that uses low key technology and yet is capable of executing about 3M instructiorts/s is currently under construction.
Several other systems are at comparable stages of dev~lop ment.. In particular, researchers at the University of Utali and Toulouse already have operational systems, and a group at MIT is about to start construction of a machine.9 · 16· 17 This article did not attempt to compare these systems with the on~ described because they are not based on the same type of data driven model. An outline system design based on a similar model has been developed at Irvine, but because details of the system are not yet. known, again no comparison was attempted. 10
It is expected that some alteration in programming techniques will be needed to use this kind of system efficiently. However, the changes may be of a kind that already are being introduced for reasons of reliability, portability, and maintainability of software. If the anticipated increase in throughput can be achieved in multilayered data driven structures, it is likely that the required changes will present a minor obstacle to development of such a system.
References
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Computers; Dec 1972, pp 1293-1310
14. L. Lamport, "The Parallel ExecutiOn of DO-L~ops," Com-
m~nications of the ACM, Feb 1974, pp B3-93
15. E. A. Ashcroft and W. W. Wadge, ''.Lucid, a Nonprocedural
Language with Iteration," Communications of the ACM, July
1977, pp 519-526
16. A. L. Davis, "A Data Flow Evaluation System Based on the
Concept of Recursive Locality," AF/PS Conference Pro-
ceedings, NCC, June 1979, pp 1079-1086
17. J.B. Dennis and D. P. Misunas, "A Preliminary Architecture
for a Basic Data Flow Processor," Proceedings of the Second
Annual Symposium on Computer Architecture, IEEE, Jan
1975, pp 126-132
Acknowledgments
We would like to acknowledge the assistance of all the members of the Data Flow Research Group at Manchester, whose many ideas have contributed continually to the development of the data driven computer. Chris Kirkham also was kind enough to read and comment upon the draft manuscript. In addition, the financial support of the Distributed Computing Systems Programme of the Science Research Council of Great Britain is gratefully acknowledged.
106
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COMPUTER DESIGN/JULY 1980
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BIT MAP ARCHITECTURE REALIZES RASTER DISPLAY POTENTIAL
Low cost random access memories and microprocessor based control circuits accelerate the trend toward raster scan display systems that use bit map architectures to provide dynamic, interactive control over each picture element on the screen
Robert J. Gray
Genisco Computers A Division of Genisco Technology Corporation
35 Cadillac Ave, Costa Mesa, CA 92626
Graphics and image processing systems constitute one of
the fastest growing segments of the computer industry. Pro-
jections of current trends indicate that display system sales
will double within the next three years to more than $600
million per year (Fig 1). Refreshed raster systems, most of
which will be equipped with color monitors, could represent
half of this total. These figures exclude the expanding per-
sonal computer market, which will most likely continue to
use the familiar raster scan television receiver both as an
alphanumeric display device and as a graphics monitor.
The rapid growth in display systems of all types confirms
the adage that a picture is worth lk words, especially when
large volumes of data must be presented in aform easily in-
terpreted by the growing numbers of nontechnical
operators. 1
·
.
Refreshed raster displays offer a combination of potential
advantages over their major competitors, the storage tube
and the refreshed vector calligraphic or stroke writing
system. Their photographic quality is equally adaptable to
line graphics for computer aided design, solid tones for
charting statistical data, and continuous tone imagery for applications ranging from medical instrumentation to satellite reconnaissance. Their cinematic capability provides the observer with a sense of continuous animation and, equally important, an almost instantaneous response to interactive commands. They offer a full spectrum of synthetic shades generated by the computer for such applications as process control and business graphics displays, and of real hues and saturations for manipulating images generated by a television camera or a spot scanner. In addition, mass production techniques developed for commercial television receivers make the inherent advantages of refreshed raster technology economically feasible in graphics and in image processing applications.
Historically, the photographic and cinematic potential of the raster scan led to its use in commercial televisi'on and to the subsequent development of a practical color raster monitor. Unlike calligraphic displays that stroke lines between randomly addressed points on the cathode ray tube (CRT) screen, a refreshed raster scan addresses, typically 30
111
310
300
110
100 ANNUAL SALES
(M$)
110
100
to be described and requires the highest processing speed. At the same time, bit map architecture is the only design approach that delivers all potential benefits of the refreshed raster technique, and to the extent that bit map systems fulfill this promise, bit map advantages equate to those of raster technology.
Resolution
Photographic quality depends on resolution, the number of addressable locations on the CRT screen. With each increase in resolution there is a corresponding increase in the fineness of detail, straightness of lines, and continuity of graduated color or intensity changes. A hypothetical grid of horizontal and vertical lines on the screen surface establishes resolution. The increased resolution of raster
10
78
79
80
81
81
83
YEAR
Fig 1 Projections of current trends. Display system sales could double within three years, reaching nearly $600 million. R&freshed raster systems could reflect half this total. Storage tube and stroke writer sales also will grow, but probably at a slower rate
or 60 times/s, every individual picture element (pixel) on the entire screen during each refresh cycle. Every pixel has the potential, therefore, of being defined and redefined in real time provided only that the system can.deliver the required information to the monitor within the time limits imposed by the raster refresh cycle.
This refresh is most effectively achieved by storing the information in a display memory that will duplicate the data presented on the CRT screen. The techniques used to store and process the display data become, therefore, critical factors in determining the e~tent to which a system takes ad. vantage of the potential of raster scan techniques.
The potential for higher photographic quality is enhanced by requiring that a maximum number of pixels be coded in memory and defined on the screen. The ability to produce colors, or multiple shades of gray, increases the amount of information required for each pixel. The possibilities for cinematic animation and fast response require processing an expanding volume of data at the highest possible rate. In a sense, then, each inherent advantage of raster technology presents graphics system designers with opportunities as well as challenges.
Bit map architectures represent the ultimate in design challenges because of the need for a separate binary code for each pixel on the screen. The use of these architectures is the most memory intensive of all the mapping alternatives
112
~PHAGRAPHI~
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-
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-
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0 0 0 0 0 0 0 0 0
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DI SPIAY SC RE EN
Fig 2 Alphagraphic mapping. Used to display lines and other simple graphic elements, character mapping scheme reduces display memory requirements about tenfold but also limits ability to control each individual pixel
COMPUTER DESIGN/JULY 1980
displays was prompted, in large part, by the expansion of raster systems into new application areas and into established stroke writer domains, such as computer aided design and aircraft flight simulation. A typical, medium resolution raster display has a resolution of 512 by 512 lines. A higher performance system may increase the resolution to 1024 lines in one or both dimensions.
By contrast, stroke writers have hypothetical grids ranging up to 4096 lines or more; however, the stroke writer grid is truly hypothetical. Straight lines, for example, are defined in stroke writer system memory by their endpoint coordinates which correspond, in theory, to exact locations on the screen. By the addition of another bit to the coordinate data, the stroke writer resolution is doubled. The increase in resolution may be invisible to the eye, when viewed on a stroke writer screen and may become apparent only after the creation of a full resolution hard copy.
The raster grid, however, is only partly hypothetical. A raster scan produces physical horizontal lines on the CRT screen, and the distinguishable vertical alignment of pixels along each horizontal line determines the vertical grid. Doubling raster resolution requires the monitor to trace twice as many raster lines within the same refresh time. Video signal amplifiers must have four times their previous bandwidth, when raster resolution doubles, and convergence controls for color monitors must be not only faster, but far more precise to maintain color registration.
These high performance raster display monitors are presently available. Reduced spacing between shadow mask holes can now be used to help preserve the increased resolution of a color raster display system. For the system designer, however, the major task has been to meet the expanded memory and processing requirements that accompany each increase in resolution, without compromising the pixel by pixel, photographic potential of the raster technique. It has taken innovative microprocessor control concepts and inventive memory architectures based on new, lower cost, random access memory (RAM) to achieve this goal.
Display Mapping Techniques
Raster display memory and transfer rate requirements expand geometrically with .increased resolution. A 512 by 512 raster system must store definition data for a minimum of 262,144 pixels. A 1024 by 1024 raster display has 1,048,576 pixel locations. Up to 24 bits can be specified; yet with only 8 bits of information for each pixel, there is an increase from about lM bits of stored data to more than 8M bits, all of which must be accessed within one refresh cycle.
In terms of transmitting data to the monitor, a higher resolution system with 8 bits/pixel would require a processing and transfer rate of about 500M bits/s. But equally important new information would have to be read into the memory at very high rates to maintain any sense of cinematic animation or realtime response. The temptation, of course, is to compress the memory with alternative mapping techniques. One method, for example, is character mapping, an extension of the use of alphagraphic characters to create lines and other simple designs on alphanumeric terminal displays (Fig 2). The IBM 3279 color graphics terminal typifies this approach, allowing definition of up to six sets of alphagraphic characters with 190 different pi.xel arrangements in each character set. However, the 1140 patterns represent only an insignificant fraction of the 280 possible combinations of pixels within the 8 by 10 character matrix. There is a corresponding loss, therefore, in the ability to address and quickly modify an individual, randomly selected pixel from the hundreds of thousands on the monitor screen.2
Line mapping, another memory compression technique, achieves still greater versatility (Fig 3). Compared to the bit map approach, run length encoding can achieve a 30:1 reduction in memory requirements. However, this holds true only when the graphics are relatively simple. As the level of detail increases, the quantity of coded information escalates. Continuous tone images with changing values for successive pixels would consume far too much memory to display on a line-map raster system. This leaves bit map
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' QUANTITY OF CO DED DATA INCREASES RAPIDLY WITH LEVEL OF DETAIL. CONSUMING FAR TOO MUCH
MEMORYFORUSE WITHCONTINUOUS TONE IMAGES
Fig 3 Line mapping. Run length encoding reduces display memory requirements up to thirtyfold-and also speeds display memory loading-but only for relatively simple graphics with few pixel transitions per line. Quantity of coded data increases rapidly with level of detail, consuming far too much memory for use with continuous tone images .
113
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DISPLAY SCREEN
Fig 4 Bitmap display mapping. Simplest approach assigns one bit of display memory to each pixel on screen . In practice, bytes or words pass through shift register to supply serial data as video generator input. Display memory addresses correspond to pixel locations on screen
memories as the only storage method that gives the application program and the operator comple te control over each pixel.
Multiple Memory Planes
The simp lest bit map display memory would assign a single bit to each pixel displayed on the screen . There would also be a one to one corresponde nce between the memory addresses and the display coord inates (Fig 4). In practice, memory bits are accessed in 8-bi t bytes or 16-bit words, transferred to a shift register, and only then applied, as serial data, to the video signal generator. A binary 1 typically generates a full intensity spo t of light at the corresponding pixel location on a monochrome monitor screen, while a binary 0 effectively turns off the CRT electron beam, producing a dark pixel on the screen.
With only a single bit per pixel, the memory would not begin to tap the color and gray scale potential of a bit map raster graphics system. It could emulate, of course, a lower performance stroke writer, at a considerable cost saving to the user. However, expansion to multiple-bit codes for each pixel location would offer advantages beyond those afforded by any other type of display system.
The technique used to create multiple-bit codes without reducing memory access speed simultaneously stores information on multiple memory planes, each representing a complete map of the display screen. Multiple planes add a Z
dimension to the display memory, in addition to the X and
Y dimensions implied by the pixel address. On the screen, the Z dimension appears as intensity or color.
How two or more monotone memory planes can be used to encode data for display on a monochrome monitor is illustrated in Fig 5. By app lying parallel bits to a digital to analog converter (DAC) at the video input, black, white, and tones of gray are reproduced on the screen. For example, with eight memory planes each pixel can be coded for any of 256 different monochrome shades, far beyond the ability of the human eye to discern boundary lines between gray tone transitions.
Three- or Z-dimensional cod ing also makes it easy to add color to the graphics presentation using a 3-gun color televi-
114
DISPLAY MEMORY PLANE S
VIDEO _ - . r - 1
SIGNAL ~
Fig 5 Multiple planes add third dimension. Applying parallel bits to DAC at video input produces black, wh ite, and tones of gray on monochrome display screen. Pixel address implies X and Y coordinates. Z dimension appears as intensity or color. With eight memory planes, each pixel can assume any of 256 different shades
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Fig 6 Multiple planes add color. Using only three memory planes, one for each primary color, every pixel can assume any of eight contrasting hues. Substituting white electron beam for blue beam eliminates convergence problem when conventional primary colors merge to form white characters, still affording black and white with various combination and saturations of red and green
COMPUTER DESIGN/JULY 1980
sion monitor. With only three memory planes, separate onoff bits can control the red, green, and blue electron beams to produce the eight colors, including black and white, listed in Fig 6. When displayed information includes a high proportion of white alphanumeric symbols, a 3-gun monitor with red, green, and white phosphors eliminates convergence problems encountered when the conventional primary colors merge to form white alphanumeric characters. In this case, the eight colors are white, black, and various combinations and saturations of red and green.
Yet the 8-color palette is only the starting point for bit map raster displays. DACs driven by multiple memory planes for the primary colors can produce dozens or hundreds of different hues and saturations. Alternately, a smaller number of memory planes might supply addresses in a lookup table that correspond, in turn, to multiple-bit color codes for the display monitor. Fig 7 illustrates how an 8-plane memory can address up to 256 different colors selected from a potential range of 4096 hues and saturations. The host computer program can alter the lookup table entries dynamically, and the table can be expanded with more bits per address and more bits per pixel, to generate a wider range of colors than the eye can distinguish.3
Postprocessing
Multiple display memory planes combine with lookup tables and other programmable function generators to provide bit map raster systems with powerful postprocessing capabil-
1tles that add a cinematic quality to the display without changing the content of display memory . An earlier article described the use of 8 by 8 function memory tables to perform spatial filtering, edge enhancement, contrast control, and other image processing operations at a full, frame by frame rate. Selector switch control logic permits global variations, affecting the entire image, or local imaging functions in chosen locations on the monitor screen.
Similar postprocessing increases the usefulness of information generated by a computer aided tomography (CAT) scanning system. Here, body tissue densities are calculated to a very high precision (eg, 12-bit values) and stored in a multiple-plane bit map memory . Addressing the planes selectively in conjunction with a lookup table provides color coded or step contrast displays of one or more density levels. A physician can direct the system to display only those density values characteristics of bones, soft tissues, blood vessels, blood clots, or any combination of these struc· tu res.
Completely different images can be stored, if desired, on the bi t map planes and displayed in any combination on the screen. A typical application of this technique would be found in the design of multilayer IC masks. With a pattern for each IC mask stored in a separate bit map plane, the designer can view individual masks, superimpose transparent or opaque layers, and toggle from one set of patterns to another for quick comparisons.
A variety of transformations can also be implemented in hardware as part of the postprocessing. Displays can be scaled up or down in size by duplicating or skipping pixel
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VIDEO GAllNG LA ICHLS
115
values and raster lines, or a mirror image can be created, simply by changing the addressing sequence. In addition, scrolling can be achieved by starting the raster scan at different address locations within the bit map memory. When panning, new material can be scrolled into view by expanding the memory and using a virtual addressing scheme to ·select a movable display window. Information for several different displays can share space in memory to support split screen effects or brief animation sequences. The display can roam, in effect, to any point in the virtual display memory, or even to different areas on different planes.
A similar extension to the bit map memory can serve as a freeze frame buffer when the source of imaging data is a television camera or a spot scanner. Additionally, a doublesize memory could act as a buffer between the display generation circuits and the monitor. One half of the memory would be used to drive the monitor while the other half is being loaded with new data. To the operator, the switch to a new display would appear to be instantaneous; no partially assembled images or graphic elements would be visible.
A variety of other hardware processing functions can be added to increase the versatility and throughput of a raster display system. Fig 8 illustrates the effects achieved by a hardware fill circuit that automatically changes the display
color at boundary lines stored in the display memory. In-
dividual boundary lines can be altered in a fraction of the time required to change all of the pixels within the bounded area, increasin·g the rate at which animated sequences can be generated and presented.
Advanced Architectures
The hardware fill technique represents a continuing effort to increase the cinematic quality of bit map raster display systems. The earliest systems were hardwired devices that generated pixel code arrays from a relatively limited variety of display coordinate elements. Adding a microprocessor in.creased both the speed of display generation and its versatility. However, the straight through architecture was re-
tained, and as the number of pixels in the display increased, the microprocessor cycle time became a limiting factor, especially when functions such as generation of circles and arcs were performed by software.4
More advanced systems now use a variety of hardware function generators and a multiple-bus architecture. There are, typically, a separate processor and memory buses linking the display memory planes, hardware generators, peripheral interfaces, and display controllers. The memory bus allows data transfer between memory modules and helps support such functions as splitting the screen, scrolling, and the combining of memory segments into a single display, all completely independent of the processor.5
A third type of architecture, particularly applicable to image processing, incorporates a feedback loop from the display output to the memory planes so that iterative calculations can be accomplished and displayed at realtime rates. Scale-ups or scale-downs can be zoomed and, with just a few iterations, small convolution kernels can become expanded kernels that other architectures could not practically process within the same time frame.
Offloading The Host
A display system dedicated to image processing can he relatively self-contained. Generally the digitized output of a television camera or a spot scanner creates source data that can be loaded directly into the bit map memory planes for processing by the display system software. By contrast, computer generated graphics and images usually reflect the end product of a series of transformations. A variety of modeling operations process source data to define a set of display objects in a 2- or 3-dimensional world. The display elements are then subjected to viewing operations that equate to the functions of a theoretical camera (Fig 9). Portions of objects outside the field of view can be clipped, for example, and 3-dimensional perspectives can be projected onto a 2-dimensional plane. The result is a device coordinate data base, ready to be processed by the display system software. Nearly all of the preceding calculations have been performed, in most cases, by the system's host computer.6
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INTERIOR PIXELS RESTORED TO BACKGROUND COLOR AS OUTLINE IS REWRITIEN
Fig 8 Hardware fill generator animates display. Used in combination with a lookup table, fill generator changes color of subsequent pixels whenever it detects a boundary line while reading display memory. This fills in the bounded shape. Rewriting only pixels on boundary changes bounded shape to animate display of successive frames
116
COMPUTER DESIGN/JULY 1980
WORLD SPACE
IFa-.7I1I
I
I)
L--~'-'
DEVICE COORDINATE SPACE
D
FRONTAL VIEW ON MONITOR SCREEN
OBLIQUE VIEW ON MONITOR SCREEN
References
1. Industry forecasts compiled by the editorial staff of The Anderson Report, Simi Valley, CA
2. "Introduction to Raster Graphics," Sixth Annual Conference on Computer Graphics and Interactive Techniques, (ACM/Siggraph, New York, NY)
3. Programm ing Reference Manual, Genisco Digital Display Systems, Genisco Computers, Santa Ana, CA
4. "Advances in Display Technology," Proceedings of the Society of Photo-Optical Instrumentation Engin eers, Vol 199, August 1979
5. "Semiconductor Advances Boost Digital Image Processing System Performance," Harry C. Andrews, Computer Design, September 1979
6. Status Report of the Graphic Standards Planning Committee, Computer Graphics, Vol 13, No. 3 (ACM/Siggraph, New York, NY), August 1979
Bibliography
W. M. Newman, R. F. Spraill, Principles ofInteractive Computer Graphics, 2nd ed, McGraw-H ill Book Co, New York, NY, 1979
R. D. Parslow, R. W. Prowse, R. E. Green, Computer Graphics, Plenum Publishing Corp, New York, NY, 1975
B. S. Walker, J. R. Gurd, E. A. Drowneck, Interactiv e Computer Graphics,
Crane, Russak and Co., New York, NY, 1975
Fig 9 Viewing operations. Three-dimensional data can be viewed from any arbitrary vantage point to simulate function of a theoretical camera. Twodimensional systems generally limit viewing operations to locating a window on the coordinate plane
This scenario is now shifting, particularly in the case of bit map raster systems. The trend is toward multiple processor systems with separate microprocessors to handle the host interface, memory management, and display generation functions. With processing power to spare, the graphics system software is taking over an increasing number of functions from the host computer, relieving it of the heavy computatio,nal burden imposed by a graphics application. Additionally, graphics system software modules have been expanded to include a variety of interactive and application directed transformations of device coordinate data, such as the scaling, translation, and rotation of individual display elements. The next step, already in progress, involves the transfer of 2- and 3-dimensional viewing operations. Also, a number of application oriented graphics software packages incorporate modeling aids, such as the generation of bar graphs for business reports and trend displays for process control applications.
A continuation of these evolutionary developments will lead to the day when bit map systems that take maximum advantage of the benefits offered by the raster scan display technique will be true standalone units, direct replacements for the host computers they now serve.
Co-founder and Vice President of Genisco Computers, since its inception Jn 1975, Robert J. Gray designed the initial version of the Genisco Graphics Display. For 22 years prior to 1975, he was an officer in the U.S. Navy, serving as a meteorologist and a computer specialist. As such he was highly instrumental in the automation of the Naval Weather Service System.
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117
TECH NOTE
Balancing RAM Access Time and Clock Rate Maximizes Microprocessor Throughput
Tuning timing relationships of high performance memories and fast buffer logic in microprocessor systems increases performance by eliminating unnecessary wait cycles
Stan Groves
Motorola Integrated Circuits Division
3501 Ed Bluestein Ave, Austin, TX 78721
Throughput and execution rate are of paramount importance in some systems. These systems require the most suitable microprocessor, running at the maximum usable clock rate, and thi:: fastest available memories. More often, system cost also determines some, if not most, of the component parts used to build a system. Components are selected as the best compromise between performance and price. Howevi::r, in quasi-sy nchronous systems, timing effects can interact so that it is not obvious just which of the various memory access times offers best performance, or whether the
system will benefit from use of high performance memories.
Although the MC68000 has an asyn-. chronous data and address bus, in the sense that it can wait interminably for a response showing availability of requested data, the microprocessor illustrates a quasi-synchronous machine in the classical sense: internal operations are asserted and external signals are sensed at specific clock times. Owing to the internal synchronous nature of this microprocessor, all bus access times are in increments of one full clock period. It senses all input data and control lines when the clock is in
its high state and captures data or control line states when the clock goes low.
For example, as shown in the read cycle timing diagram of Fig l, data acknowledge (DTACK) is asserted low prior to the falling edge of the fourth clock state (54). As long as DTACK is asserted a full setup time period prior to the falling edge of any clock signal, such as 54, DTACK will be sensed during that clock period. If DTACK is asserted low less than the required setup time prior to the falling edge of 54, a wait cycle of one full clock period, which equals two states, would be added. When DTACK is sensed low at the end
118
COMPUTER DESIGN /JULY 1980
so Sl S2 S3 S4 S5 S6 S7 so SI S2 S3 S4 S5 S6 S7 SS S9 so SI S2 S3 S4
CLK
H
H
H
H
AS
UllS
i:DS
RiW
DTACK
D8-D I5
00-Dl
fCD-2 ==>------<
H
H
S5 S6 S7 so
>>-
>-
14--- - - - - - - - READ -----------+4---------WRITE ---------~---------- SLOW READ------------~
Fig 1 Read/write cycle timing diagram. As long as DTACK is asserted one setup time period prior to falling clock edge S4, it will be sensed during that clock period . Otherwise, as shown on right side of diagram, wait cycles will be added until DTACK is sensed
of a clock period, the state of the data bus is captured on the falling edge of the next full clock period (S6 in this instance) and only then applied to the microprocessor. As shown on the right side of Fig 1, wait cycles or wait states are added after S4 until DTACK has been low for the full setup time prior to the falling edge of the clock signal.
Any system that uses even a small portion of the MC68000 addressing capability needs signal buffers. The delay through these buffers, the delay through the logic to generate row address select (RAS) for the random access memories (RAMs), the output delay of the address lines and address strobe (AS) signals, and the data port input
setup time must be considered overhead to the specified memory access time. Table 1 shows this additional overhead by listing RAM access times, typical values for the time delay through Schottky (S) and low power Schottky (LS) buffers, the critical path that generates RAS from AS, and MC68000 data setup delay with AS delay.
Specified
RAM Acceea
Time· (na)
120
Operating Frequencies (MHz)
Max, Nominal, no waits no waits
16 12 10
8 7 7 6 5 4 4 a.58
PU.JITSU
-m11·
The flnt word In relleblllty. The last word In performance.
CIRCLE 53 ON INQUIRY CARD
TABLE 2
microprocessor clock frequency, and
Operation with LS Buffers and 200 ns RAMs
the number of wait cycles incurred. In Fig 3, average execution time per
Clock
instruction (in microseconds) of the
Action
Clock Time Frequency
Cycles (ns)
(MHz)
Performance
read data, write data sequence appears on the left vertical axis. Lines sloping
Instruction sequence (Ideal) 17
2125
8
100%
down and to the left reflect nominal
If wait on each read (actual) 20
2500
8
85%
microprocessor clock frequen cies.
If reduced clock frequency
17
2429
7
If only 1h wait cycle on
each read
18.5 2313
8
87% 92%
Curves sloping down and to the right are labeled along the right axis according to memory access time (in nano-
seconds) and buffer logic type. These
curves include both the bus buffer
overhead and the microprocessor
overhead from Table 1. For each com-
bination of logic type, memory access
MC68000 delay times are from the latest 20-cycle instruction sequence period of time, clock frequency, and number of
data sheet showing 4-, 6-, and 8-MHz about 2500 ns .
wait cycles, Fig 3 gives the correspond-
parameters with projected 10-MHz
The last line of Table 2 describes ing average instruction execution
parameters. When worst-case numbers operation if it were possible to add on- time .
are used, the resulting bus latency ly one half of a cycle for each wait
The numbers in Table 2 were de-
period permits operation at the state. Using the previous example of a rived from Fig 3 and illustrate its use.
nominal clock rate shown in the table, 2-instruction sequence requiring 17 For the typical delay parameters in
provided that no wait states of one full cycles, the sequence now extends to Table 1, the 8.0-MHz clock line crosses
clock period each are to be incurred.
only 18.5 cycles, instead of 20 cycles, the zero wait cycle between its in-
Instruction cycle times from the when 200-ns RAM and LS buffers are tersection with the con tour for
MC68000 data sheet assume a nominal used in an 8-MHz system.
Schottky-buffered 200-ns RAM and its
read cycle time of 4 clock periods, with
Although the MC68000 extends bus intersection with the contour for
21/2 periods allocated for bus latency, cycles only in increments of one full 200-ns LS-buffered RAM, showing that
and a nominal write cycle time of 5 clock period, the circuit shown in Fig 2 Schottky-buffered RAM would incur no
clock periods, with 31;2 periods can be used to stretch S4 by unit wait cycles and execute the two in-
allocated for bus latency. When periods of the oscillator input to structions in 2.12-µs total time, or
writing, ample time is available to use flipflop A. This circuit will not stretch 1.06-µs average time on the graph . Us-
the less expensive LS buffers and logic. S2, because data strobes are not pro- ing 200-ns RAM with LS buffers incurs a
However, again referring to Table 1, to vided until S3 of a write cycle. Fig 3 single wait cycle for each access. Th e
avoid incurring wait cycles in a typical clarifies the full impact of this ap- two instructions would execute in
system with 200-ns RAM and LS buffers, proach by showing the combined in- 2.5-µs total time for an average execu-
a clock frequency must be selected for teraction between memory access time tion time of 1.25 µs each. However, if
which the required 348-ns latency with associated buffer logic type, the clock stretching circuit of Fig 2
period represents 21;2 clock periods
(about 7.18 MHz), or else Schottky
logic must be used.
In a simple 2-instruction sequence-'
read data followed by write data-
there are four bus accesses of which
only one is a write access. This reflects
a nominal time period of 17 clock
AS
cycles, or 2125 ns at 8 MHz. Table 2
FROM MC68000 { _
B
shows the effect of changing the clock
DTACK
Q
period and incurring wait cycles for a
particular case, assuming 200-ns RAM in an 8-MHz system, where cost or
,.._.-----+-"" 10 MC68000
CLOCK INPUT
other considerations require use of LS
74LS74
buffers. If a system uses 200-ns RAM
with LS buffers at 8 MHz, reducing the clock frequency to 7 MHz would improve performance. This occurs because, when using these components at 8 MHz, full clock periods are added
Fig 2 Clock stretching circuit. Although MC68000 adds only full cycles as wait states, this circuit extends 54 by unit periods of flipflop A oscillator input, allowing half cycle wait state and thereby gaining one half of a cycle
as wait cycles. Consequently, in the
Table 2 example, 250-ns RAM with
Schottky buffers could be used instead
of the 200-ns RAM to achieve the same
122
COMPUTER DESIGN/JULY 1980
Signefics' EC1: Fast logic. Fast.
Pick from over 80 ECL parts -
and watch our .quick delivery.
When high speed is essential to your system, ECL may be the answer. Signetics has more than 80 answers in its ECL line.
Gates, interfaces, flip-flops, counters/ registers, memories and complex ECL. Total product breadth. See us for nearly every standard lOK device. And for several that are totally unique - and may be perfect for your application.
We don't think highspeed logic should mean low-speed delivery. You'll be pleasantly surprised how quickly we can deliver. Many parts are right off the shelf.
Responsive delivery doesn't mean you sacrifice quality. We test every lOK ECL partcerdip or plastic- to Signetics ' Upgraded Product Reliability program, SUPR IIA. Free.
For only a small extra charge we '11 test each device to SUPR II, Level B. That's an accelerated burn-in method derived from tough military specs under MIL-STD-883A.
Quality. Product breadth. Availability. That 's what you should look for in an ECL supplier. You 'll get alJ of these from Signetics. Plus commitment.
While we're expanding our lOK line, we 're ready to go with the even faster lOOK series. Get it in sample lots today. With production quantities very soon.
Communications. Peripherals. Instrumentation. Signetics' ECL is the logical choice. Write today for your free copy of our lOK/lOOK ECL short-form catalog.
Or contact your nearby Signetics sales office or distributor. Signetics Corp. 811 East A rques Aue., P.O. Box 409, Sunnyvale, CA
94086 (408) 739- 7700.
!i(gDltiC!i
a subsidiary of U.S. Philips Corporation
Multiple Technologies from 8 Divisions: Analog, Bipolar Memory, Bipolar LSI, MOS Memory, MOS Microprocessor, Logic, Military, Automotive!Telecom
To: Signetics Ptiblication Se!"iees, 811 East Arques Avenue, · P. 0 . Box 409, Sunnyvale, CA 94086 .
0 I'd like more information about the logical choice in lOK/lOOK ECL.
My application is 0 Mainframe CPUs 0 Instrumentation 0 Minicomp,uters 0 Peripherals 0 Other _ __
Name
TI~
Company
Division _ __
Address._ _ _ _ _ __:___ __ MS _ _ __
City_ _ _ _ _ _ _ _ _ State _ _ Zip _ __
co 780 0 My need is urgent! Please have an ECL specialist contact me
todayat (__)
ext. _ __
THE OLD
STANDBY
THAT WON'T
STAND STILL.
.r.-1'.. · ,·
.-
/ '
i ~
In the beginning, there was the Cannon®Original D connector with solder pot contacts in a two-piece insulator. But as technology leapt forward, so did we. With our BURGUND, ROYAL-D and long line of designs that answered new needs and became industry standards.
Now our latest technology can be seen in our Mas/TerTMD pin-andsocket connectors designed for mass-terminating flat cable or individual wires. Our Mas/Ter D contact design provides 25% more wire-tocontact surface area to give you increased reliability and conductivity And for added flexibility, they are intermateable and intermountable with our entire D Subminiature line.
tf you're not content to let technology pass by, look into the Cannon D Subminiature and Mas/Ter D connector evolution. You'll find a huge selection of low-cost connectors and accessories available right now through our worldwide distributor network. For immediate information refer to our pages in EEM. For literature, the name of your local Cannon distributor or other information contact Rectangular Division Marketing Manager. ITT Cannon Electric, a Division of International Telephone and Telegraph Corporation, 666 E. Dyer Road, Santa Ana, California 92702. Telephone : (714) 557-4700. TWX: 910-595-1131. TELEX: 65-5358.
CANNON ITT
You can always connect w ith Cannon.
CIRCLE SS ON IN(j)UIRY CARD
""
~·--
-
--- -- -- --- - ~
() (I (, (I! I (If) () ! ) ( l ()CI l)
< > ( 1' 1 ( ·
< > (I I l <)I l I I I)
23
~ 16-t-7"-----t--'~-+--,,.......c--'-
450L S
~
~ 1 5+-- -:X:--+- ----;;,.<'--t-"""'::7"'"------1r--:
400LS
~' 1 4-t-""'._-----;;,.L--f--"-<;:-;?""'-t-----,,.."'-1f--;::,,.,.~~
I ~
350LS
13 +---;;......,.,------,,..,C:--f-~~---I'----.
gw . 11 -f"..;o---7"''---+--:~--'""""=:------1-""---=-I 300LS
:;;
0 7 150S .
06
0 5-'-------'----~------'-==--' JOOS
0
Jc
1 WAIT CYCLES
1 5
11 0 3400
3 0
18 5 3 083
3 5
20 0 1 867
4 0
11 5 2 687
4 5 CLOCK CYCLES FOR BUS LATENCY
23 0 CLOCK CYCLES PER 1-INSTRUCTION SEQUENCY 1 555 FACTOR·
·rACTOR _ CLOCKS PER 1 INSTRUCTIONS - 2 ' CLOCKS PER BUS CYCLE
~~:~~~~ ~~~~UCTION EXECUTION TIME
--
CLOCK
PERIOO
,
CLOCKS
PER
1
INSTRUCTION ~
1
WHERECLOCK PERIOO = CLOCKPE~~~o~~[E~c~us CYCl E
Fig 3 Composite performance chart. Intersecting contours give average instruction execution time for each combination of logic type, memory access time, clock frequency, and number of wait cycles. This diagram reflects specific logic delays of Table 1. For other delay parameters, product of factor on bottom line with total delay (memory access, buffer logic, and microprocessor) gives ordinate of contour sloping downward to the right
buffered 150-ns RAM is recommended here. Schottky-buffered 200-ns RAM may be used with the clock stretching circuit of Fig 2 with the resulting average execution time of 941 ns offering nearly 92 % of the performance obtained from the faster RAM. Similarly, 250-ns LS-buffered RAM can be used, incurring full wait cycles and an average execution time of lOl 7 ns, to achieve 85% of the performance offered by the 150-ns RAM.
Different circuit configurations result in different delay times reflected by the Table l data used to plot those contours in Fig 3 that slope downward to the right. Factors listed at the bottom of Fig 3 can be used to plot a composite performance chart for any set of delay times. Suppose, for example, the MC68000 system includes a memory management unit. Addi.ng the memory management unit delay to the Table l timing values increases the bus latency period. For each combination of access time and logic type, the corresponding new bus latency period multiplied by each of the factors listed in Fig 3 identifies a new crossing on each of the Fig 3 axes.
In any system whose addressable memory even begins to approach the full capacity of the MC68000, the cost of memory far exceeds the cost of the microprocesssor. Therefore, it is the microprocessor and its clock that should be tuned to the memories in use. The cost versus performance tradeoffs discussed here, with the composite performance chart of Fig 3 and the clock stretching circuit of Fig 2, determine which combination of logic type and memory access time offers best performance and allow adjustment of timing parameters to optimize performance of the components used .
were used, only half a wait cycle would be incurred for 1.16-µs average execution time.
As another example of the use of Fig 3, comparing a system with 250-ns l.S. buffered memory operating at 6 MHz (1.42-µs average instruction execution time) with a system using 300-ns LSbuffered memories operating at 6.41 MHz (1.44-µ s average instruction time) shows that both systems offer nearly equal performance-about the same
126
level of performance offered by 300-ns memories operating at 7.0 MHz (1.43µs instruction time). Consider a data communications controller with a proposed clock frequency of 9.8304 MHz (2 10 X 9600 baud), which would require use of the IO-MHz MC68000. The clock cycle period is approximately I02 ns. If no wait states are incurred, the average simple instruction executes in 865 ns and the bus latency period is 254 ns. From Fig 3, Schottky-
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COMPUTER DESIGN/JULY l 980
·
INTRODUCING ECLIPSE® MY/8000, the fast new processor that
gives you high throughput, high performance, and unmatched
reliability, and the most compatible 32-bit computer system in the
industry.
You need a 32-bit system that thin ks fast. MV/8000's 36.4 MB/sec.
memory bandwidth is two-to four-times faster than its nearest
competitor. And it features a unique three-level 110 system using
independent processors that drive high-speed busses and as many
. as 128 terminals.
Need hot architecture? MV/8000 gives yqu one of the industry's
most advanced virtual memory management techniques, plus 4 gigabytes of logical address
space, 6.6 gigabytes of on-line storage, and user programs as large as s12 megabytes-that's
16 times larger than the competition's.
Your MV/8000 also has unmatched reliability and maintainability. It comes with its own inde-
pendent microNOVATM-based System Control Processor that continuously monitors a diag-
nostic bus, and identifies hardware faults right down to the field-replaceable unit. Plus, you
get enhanced maintainability with a totally alterable control store-the first ever on a 32-bit
mini-mainframe.
How about system security? MV/8000 gives you an 8-ring security system that divides the address space into eight imbedded protection areas, each with a unique priv~lege level. That
secures system resources and user' s privileged routines.
You need a 32-bit computer that speaks your language. MV/8000 speaks just about al I
of them, based on its new, ultra-sophisticated AOSNS operating system that's compatible
with our time-tested AOS (Advanced Operating System). AOSNS has optimized micro-code
for high-level languages like ANSI FORTRAN 77, ANSI BASIC, and ANSI PL/I. What's more, AOSNS
can run COBOL, DG/L, DG/DBMS, TPMS, INFOS II, AZ-TEXTTM word processing, RCX70 (3270) and
RJ E(2780/3780).
/
Compatibility? Forget about emulation, mode bits or rewrites. Along with its new 32-bit
@ applications, MV/8000 executes all existing AOS-based ECLIPSE programs. You don't have to
change programs, peripherals, interfacing, documentation, or people.
//
////
MV/8000, new from Data General. From now on we hold al I the cards in 32-bit
//
systems. Bet on it. And :-vin.
~ -,,:/\)~~\)
Data General Corporation, Westboro, MA01580, (617) 366-8911. ECLIPSE
is a registered trademark and microNOVA & AZ-TEXTare trademarks of
Data General.c Data General Corporation, 1980.
~~/~.~<'0 \e~·
~ '/'/~'/e.,~~.s~'<<'e'o\~· ./i'
' / / ~o~~e~.c,e
/ ' /"\~CJ0~~.~,~<~'~oe'\',<'0
/~ '//-,.1'.../~."o..<·v'>~_/'~,~0e.~.c~:;e,e·~'~<'o\' ~· Qe~
~
/' /
_. -
o~
c ~~~e'\.~e
C.P~R~<'?'-'I-~0\e(>~''"<:\
//
CIRCLE 57 ON IN9UIRY CARD
//
//
PERSONALITY PROMS AND FACTORY ASSISTANCE MAKE USER-REPROGRAMMING A SNAR
At Lear Siegler, you don't have to decide among dozens of smart terminals, each slightly different, but none quite right for you.
We have just two smart termirnils. But they can handle a range of tasks equal to four, five, or even six models from other manufacturers.
After all, we want to make your life simpler, not more complicated.
THE ADM -31 & ADM-42
WILL LET YOU CHANGE
THEIR MINDS.
When we designed the ADM-31 and ADM-42, we realized that no matter what capabilities we offered, somebody would always want something different. So we did the next best thing
We gave each a truly flexible personality by putting the instruction sets inside their PROMs. So, unlike the hardware, the firmware is capable of easy OEM reprogramming.
We even have a special Application Engineering Staff to answer any questions you may have about reprogramming, interfacing or special applications
Feeling your life getting simpler yet?
ALL THE TERMINALS YOU'LL
EVER NEED.
Even if you decide not to reprogram their PROMs, our two terminals come with all the standard smart terminal features. And then some.
Features like full editing capabilities. Formatting. Reduced intensity for identification of protected fields. Blinking, blanking, and reverse video. High resolution monitors. Even limited line drawing capabilities.
What's more, both the ADM-31 and ADM-42 come equipped with a microprocessor and function keys making them even more reliable and easy to use.
THE CHOICE IS SIMPLE.
You can choose your new smart terminal one of two ways. Start sifting through dozens of data sheets, talking to dozens of salesmen, and looking at dozens of expensive, slightly different terminals.
Or look at two smart terminals from Lear Siegler-the ADM-31 and ADM-42. Complete with userreprogrammable personality, function keys, and an eager and willing Applications Engineering Staff to help you with any reprogramming problems.
The choice seems pretty easy to us. But if you want more information, call or write to us at Lear Siegler, Inc./Data Products Division, 714 North Brookhurst Street, Anaheim, California 92803, (800) 854-3805. We'll be happy to tell you all about the ADM-31 and ADM-42. And show you how you can make your terminals behave.
CIRCLE 28 ON IN(j)UIRY CARD
'·11~11 LEAR SIEGLER, INC. DATA PRODUCTS DIVISION
Lear Siegler, Inc./Data Products Division, 714 N. Brookhurst Street, Anaheim, CA 92803, (800) 854-3805. In California (714) 774-1010.TWX:910,591-1157. Telex: 65-5444. Regional Sales Offices San Francisco (408) 263-0506. Los Angeles (213) 454-9941. Chicago (312) 279-5250. Houston (713) 780-2585. Philadelphia (215) 245-1520. New York (212) 594-6762 . Boston (617) 423-1510 . Washington, D.C . (301) 459-1826 . England (04867) 80666 .
Big power
1· na small package.
.'Ihe308
Data Analyzec From Tektronix.
Tiie new 308 Data Analyzer packs an impressive array oflogic analysis capabilities inside its trim, 8 pound (3.6 kg) frame. For instance, it operates in the serial and signature modes as well as parallel state and timing. And samples both synchronously and asynchronously up to 20 MHz. With a variable voltage threshold that covers all logic families in addition to TIL.
'IWo separate memories, acquisition and reference, allow automatic data comparisons. If there's no data difference, the sampling p rocess is repeated until a discrepancy appears. And the acquisition memory can be automatically searched for any given word.
Word recognition can be up to 25 bits and includes an external output to trigger other instruments. And the trigger itselfcan be delayed up to 65,535 clock pulses past the trigger point. The 308 features a latch mode (5 ns), a memory "window" to let · you closely examine portions ofthe memory and state tables which are displayed in binary, hex and octal.
The 308 Data Analyzer, from Tektronix. Performance? Uniquely versatile. Size? Conveniently compact. Price? Exceptionally reasonable.
Ifyou're interested, contact your local Tektronix field office, or write us at:
U.S.A. Tektromx, Inc. P.O. Box 1700 Beaverton, O R 97075 Pho ne : 503/644-016 1 Telex: 910-467-8708 Cab le: TEKTRON IX
Africa, Europe MlddleEast Tektronix lnt'I , Inc. Eu ropean Marketing <;en ter
Postbox 827 1180 AV Amstelveen The Netherlands Telex: 18312
Asia, Australia, Canada, Ce ntral f>'
South Amerlca,Japan Tektronix, lnc. America's/ Paci fi c
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Cable: TEKTRONIX
COMMITTED TO EXCEUENCE
For immediate action dial our toll-free automatic answering service 1-800-547-1512
Copyrigh t © 1979, Tektronix, Inc. All righ ts reserved. 844
Technological leadership
The world's broadest+5
is available in vol11me
The industry's most complete single +5 V supply dynamic RAM family
Density
64K 64K
32K 32K
Device
MCM6664 MCM6665
MCM6632 MCM6633
Self/Auto
.,,Refresh
.,,
.,,
Power Supply
+5 V. ±10%
+5V, ±10%
+5V, ±10%
Access times (ns)
150. 200
150,200
120, 150, 200
132
V dynamic RAM family today, from Motorola.
V CC Supply Current-Max Actlvei'Standby mA*
50/ 5
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$124.00 113.00
62.00 56.65
For the first time, a complete family of singlesupply +5 V dynamic RAMs from 16K through 64K is available in production quantities. You can get th em now, from Motorola.
The dynamic RAM family leaders are the 64Ks. These "memories of the future" are available today from Motorola, and from authorized Motorola distributors.
The single-supply 16K RAMs also are available now in production quantities from the factory and distributors. Completing this family of totally upward-compatible 16-pin RAMs are the +5 V 32Ks, for intermediate memory system densities between 16K and 64K They're also available now direct from the factory.
The entire family uses industry-standard pinouts and has the high speed and low power you expect from our HMOS technology. Systems designed with our 16K RAM can double or quadruple their memory capacity as demand warrants by simply plugging in our 32K or 64K family members.
The pin that refreshes
Motorola's +5 V 64K RAM was the first in volume production. Now, two versions are available. The original MCM6664 has the leadership Pin 1 selfrefresh and auto-refresh functions. The MCM6665, without Pin 1 refresh, is now also in volume production.
Our 16K and 32K single-supply dynamic RAMs are designed with and without Pin 1 refresh, too. The 32K MCM6632 (with Pin 1 refresh) and MCM6633 (without) are both in production, as is the 16K MCM4517 (without). The 16K with Pin 1 refresh, MCM45 l 6, will be available later this year.
Not only is Motorola first with the broad line of fully-pin-compatible 16K - 64K +5 V dynamic RAMs, but first with 16K- 64K +5 V families of fully pin-compatible 24-pin ROMs and EPROMs as well. Look to Motorola leadership in MOS Memories for designing
Innovative systems
through silicon.
® MOTOROLA INC.
CIRCLE 54 ON IN9U I RY CARD
133
MICRO DATA STACK
COMPUTERS, ELEMENTS, ANO SYSTEMS
INTERFACING FUNDAMENTALS: UNCONDITIONAL 1/0
Peter R. Rony
Virginia Polytechnic Institute and State University
Blacksburg, Va 24061
In the three preceding columns, microcomputer input/output techniques have been discussed in which either a flag or a semaphore has synchronized data transfer between the microcomputer and the input/output device . Such techniques are referred to as conditional input/output, since the data are transferred only when the flag or semaphore reaches a certain condition, either a high or low state. To complete th e comparison of input/output techniques, the simplest one, unconditional input/output, will be discussed . In this technique, data can be transferred at any time, without conditions.
Figs l and 2 provide flowcharts and timing diagrams, respectively, for unconditional in.put of data to a microcomputer. A comparison of the flowcharts with those given in Refs 1 and 2 indicates that no dotted lines are present in Fig l; there is no communication or synchronization between the input device (source) and the microcomputer (acceptor). The input device is assumed always to be available. The microcomputer, through the use of a software loop or a realtime clock, determines how often the data transfer occurs. In Fig 2, the data to be input may need to be stable for a significant period of time, such as milliseconds or seconds. The rate at which it can change is determined by the nature
134
SOURCE BEGIN
ACCEPTOR BEGIN
ENO
Fig 1 Flowcharts for source and acceptor. Unconditional input. No communication or synchronization occurs between input device (source) and microcomputer (acceptor)
COMPUTER DF. SI GN/JlJLY J980
Can your perlpheral
handle this? ·.
14 LMG switchers give you reliable protection and responsive clellve~
Gould's family of LMG open frame switching power supplies provides the most reliable, cost effective protection against AC power variances you can buy.
Designed for computer peripherals and microcomputers, LMG switchers offer excellent regulation and handle wide input voltage swings. Each switcher has 20mS of hold-up at full load and brownout protection down to 20% below nominal input.
The LMG line ranges from the single output 75 watt model to the 150watt four output version. The chart on the right lists output combinations for the full LMG family.
The Gould name isn't the only assurance of quality and reliability-every LMG switcher is backed by a full year guarantee. And if you have found the availability of open frame switchers to be a problem, call Gould. There's a good chance we have what you want in stock right now.
POWER MODEL
75watts
LMGS-15 LMG 15-5 LMGT 75/12 LMGT75/15 LMGQ 75/12 LMGQ75/15
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LMGS-20 LMGT150/12 LMGT 150/15 LMGT 150/24 LMGQ 150/12 LMGQ 150/15 LMGQ 150/24/12
OUTPUT-RATINGS (V-1 l MAIN AUX1 AUX2 AUX3
5-15 15-5 5-15 12-1 12-1 5-15 15-1 15-1 5-15 12-1 12-1 5-1 5-15 15-1 15-1 5-1
5-20 5-20 5-20 5-20 5-20 5-20 5-20
12-3 15-2.4 24-1 .5 12-3 15-2.4 12-1
12-3 15-2.4 5-1 12-3 5-1 15-2.4 5-1 12-1 ' 24-1.7
For complete specifications and a copy of our short order catalog, circle the reader service number printed below. Or call us on our toll free line: 80D-423-4848. Gould Inc., Electronic Power Supply Division, P.O. Box 6050. El Monte, CA 91731.
·) GOULD
An Electrlca/IElectronlcs Company
CIRCLE 58 ON INQUIRY CA.RD
--:x DATATD
v---,--
BE INPUT _ _ _ _ _ _ _ _ _ _ _ _ _ _/\_
~ DATA BUS - - - - - - - -
- - --
rwx --------~~
ACCEPTED
~---
INPUT DATA------------~ ~----
Fig 2 Timing diagrams for unconditional input. Because there is no synchronization between source and acceptor, data may be required to remain stable for a significant period of time
SOURCE BEGIN
ACCEPTOR BEGIN
BE~J:p~~ ~~-:-=.-=--=- ~-----=
~ DATA BUS-- - - - - - -
- - - --
WRX --------~~,------
ACCEPTED OUTPUT DATA _ __ _ _ __ _ _ _ __,,~-----
Fig 4 Timing diagrams for unconditional output. Microcomputer software loop or realtime clock determine when data transfer occurs between source and acceptor
END
Fig 3 Flowcharts for source and acceptor. Unconditional output. Just as in unconditional input, data from the output device are assumed to be always available
of the input device, the repetition rate associated with the input and processing of new data, and whether every new data point needs to be input and processed.
Figs 3 and 4 are the analogous flowcharts and timing diagrams, respectively, for unconditional output of data from a microcomputer. Again, a comparison of these flowcharts with those given in Refs 1 and 3 indicates that no dotted lines are present in Fig 3; consequently, there is no communication or synchronization between the microcomputer (source) and the output device (acceptor). The output device is assumed always to be available, just as is the input device in Fig 1. The microcomputer determines how often the data transfer occurs.
In unconditional input/output (110), !he peripheral can be said to be dumb in that it does not influence the timing of the data transfer in any way. The microcomputer does not need or request confirmation that the 1/0 device is operating. When the 110 device operates continuously and
relatively slowly, unconditional 110 techniques are acceptable. When the peripheral operates at sporadic time intervals, the use of a flag is more appropriate since it frees the microcomputer to direct its attention to other tasks.
The Table summarizes the behavior of the flipflop, whether flag or semaphore, for three different 110 techniques: conditional 110 with semaphore, conditional 110 with flag, and unconditional 110. The distinction between the techniques is the presence or absence of the flipflop, and whether both source and acceptor test it.
References
1. P. R. Rony, "Interfacing Fundamentals: Conditional 1/0 Using a Semaphore," Computer Design, Apr 1980, pp 166-167
2. P. R. Rony, " Interfacing Fundamentals: Conditional Input Using a Flag,"Computer Design, May 1980, p 208
3. P. R. Rony, " Interfacing Fundamentals: Conditional Output Using a Flag," Computer Design, June 1980, p 132
137
MICRO CATA STACK
COMPUTE R S , E LEMENTS , ANO SYST E M S
Single-Chip HMOS Microcomputers Execute Programs 1 6 Times Larger Than Those of Predecessor
REFER ENCE
64k-BYTE BUS EXP AN SION CO NTROL
COUNTERS
-----------,
I
118-BYTE DATA MEMORY
I
I
I
I
PROGRAMM ABLE SERIAL PORT
· FULL-DUPLEX UART
· SYNCHRONOUS SHIFTER
I
I
_J
INTERRUPTS
CONT ROL
PARALLEL PORTS ADDRESS / DATA BUS.
AND 1'0 PINS
SERIAL IN SE RIAL OU!
Intel's 8051 family single-chip 8-bit microcomputer architecture. Program memory capabilities differentiate between 8031, 8051, and 8751 . 8051 is intended for use in realtime applications such as instrumentation, industrial control, and intelligent computer peripherals
Three high performance single-chip
microcomputers, fabricated with
n-channel HMOS technology, meet the
power and cost effectiveness re-
quirements of applications needing up
to 64k bytes of program memory
and/or up to 64k bytes of data storage.
Each has more than lOOk bytes of
memory address space, a serial com-
munications port, and several onchip
peripherals.
·
Program memory is the only differ-
entiating feature of the three devices
introduced by Intel Corp, 3065 Bowers
Ave, Santa Clara, CA 95051. The 8051
has 4k bytes of mask programmable
ROM and the 8751 has 4k bytes of
EPROM, while the 8031 has no onchip
memory and is intended for applica-
tions where external program memory is provided.
The 8051, the key product in the family, executes programs up to 16 times larger than the largest possible with its 8048 predecessor. Although classified as an 8-bit processor, the 8051 can operate on 16-bit words, 4-bit nibbles, and ·1-bit data.
Internal memory, arithmetic logic unit, and external data bus are designed to operate using 8-bit words; however, the word length flexibility permits a variety of data formats and independent control of individual output lines.
Since the arithmetic registers, pointers, 110 ports, interrupt system registers, timers, and serial port are
memory mapped within the 128 bytes of the 8051 's special function registers {SFRs), most operands may access these functions as routine locations in data memory. The remaining 256 bytes of internal data memory are data RAM, which contains four 8-register banks, 128 addressable bits, and a stack depth limited only by the amount of RAM available.
Because of its ability to function as a Boolean processor and a byte processor, the 8051 can perform better the tasks required of a controller. The Boolean processor, considered as an independent bit processor in that it has its own instructions, accumulator, bit addressable RAM, and 110, permits direct addressing of 128 bits within both the internal data RAM and SFR space, and performs conditional branch, logic, and transfer operations directly on Boolean variables. Logic equations may be converted directly into software by the Boolean processor. Control of the onchip peripherals in controller applications is provided for through the use of special bit-manipulation instructions.
The 32 110 Jines available on the 8051 may be addressed as individual bits or as 4 parallel 8-bit ports. To expand program and/or data memory with external chips, low order addresses are sent out through one 8-bit port, and high order addresses are sent out through another port. The low order address port also acts as the interface between peripheral devices or external memory and the 8051. A serial communications port located on the 8051 permits 31,250-baud asynchronous data transmission and lM-bit/s synchronous capability.
8051 interrupts occur through an assigned priority level interrupt scheme consisting of three internal and two external sources. Each interrupt source can be independently enabled and disabled.
Two 16-bit counters can be programmed independently to operate in 3 modes: an 8-bit timer with 8-bit prescaler or counter, a 16-bit time interval/event counter, or an 8-bit timeinterval/event counter with automatic reload upon overflow. Frequency
138
COMPUTER DESIGN/JULY 1980
ID
Intel's new 8272 controller fordouble density floppy disks lets you command shorter design times.
Why have second thoughts
compares the data, no additional
Easy microprocessor
about designing a double density
software is necessary.
compatibility.
floppy disk drive into your system, when Intel's 8272 is available now. With a powerful command set, microprocessor compatibility, Intel's HMOS* technology and the ability to reduce CPU overhead, our controller for IBM compatible single or double density floppy disks is the logical choice for system designers.
Now, you don't have to spend months building and programming an entire board of interface logic to control one, two, three or four double
Faster data access.
Intel delivers the new 8272
Our new 8272 controller does more than drive µp to fo ur floppy disks simultaneously. It handles parallel seek on up to four disks for faster data access.
With multi-sector and multi-track transfer capabilities, the CPU is freed from time-consuming I/O commands. Our new double density floppy disk controller removes the limitations of reading
double density floppy disk controller into the 5-volt world. That makes our controller an easy, compatible interface with Intel's family of microprocessors like our 8086, 8088 and 8085.
As part of the Intel peripheral family, the new 8272 complements our other dedicated LSI performers . For example, you can team our 8272 with an 8237 OMA controller for the most bus-efficient solution
density floppy disk drives. Just
to double density floppy disk con-
incorporate Intel's new 8272
trol. And like our other family
controller into your design
members, the 8272 offers systems
to save time and space. Ou
designers highly reliable per-
double density floppy disk
formance . . . plus the support of
controller does more than
field personnel and complete
reduce your parts count 50
documentation.
to 1. It gives you enough flexibility to shorten your design cycle. And Intel's 8272 offers you the freedom of designing in the 5-volt world.
Intel's new 8272, here today. Now, you don't have to think
twice about designing a double density floppy disk controller into your system. With Intel's
Freedom for the CP U.
8272, you won't have to settle
Our new 8272 double density
for fewer features or a long
floppy and mini-floppy disk control-
design cycle, either. Why wait.
ler is the right solution for systems
Already second sourced, our
designers. It saves time, reduces
8272 is on your distributor's
power dissipation and slices the high
shelves today.
cost of burdening an 8-bit or a 16-bit
For more detailed infor-
CPU with floppy disk control functions.
mation, contact your local Intel
A powerful instruction set built into
sales office or write: Intel Corpora-
Intel's new 8272 controller will reduce
tion, 3065 Bowers Avenue, Santa
your programming efforts up to 50%.
Clara, CA 95051.
Less code is required, so you spend
less time and use less memory.
Intel's 8272 solution also tackles or writing only the number of char-
the problem of CPU overhead and software intervention. Our double density floppy disk controller has the capability of scanning a single sector or an entire track's worth
i~ ·delivers acters a physical sector allows. The
8272 automatically transfers data
across the disk's consecutive sectors . ..
and, as a result, the CPU isn't forced to wait until the next sector is
solutions.
of data fields . Data on the floppy disk gets compared byte-by-byte with data in your system memory. And, since a single command locates and
positioned. With Intel's new 8272, you not only free the CPU, you get the assurance of higher system pe rformance .
Europe : Intel International, Brussels, Belgium. Japan : Intel Japan,Tokyo. United States and Canadian distributors : Alliance, Almac/Stroum , Arrow Electronics, Avnet Electronics, Component Specialties, Hamilton/Avnet , Hamilton/Electro Sales, Harvey, Industrial Components, Pioneer, L.A. varah, Wyle Distribution Group, Zentronics .
CIRCLE 59 ON IN9UIRY CARD
139
MICRO DATA STACK
COMPUTERS, EL.EMENTS , ANO SYSTEMS
capabilities of the counters are 0 to 0.5 MHz from external inputs and 0.1 to 1.0 MHz when programmed for internal oscillator input.
An absolute assembler, the ASM-51, can be loaded into an IntellecTM development system to permit the user to write mnemonic assembly level programs and to have these automatically converted to machine level code. CONV-51, a conversion program, converts assembly level 8048 source code into an 8051 equivalent. A realtime simulation module, the ICE-51, operating at 12 MHz, is available to assist in development debugging of hardware and software for any of the 8051 family chips.
Multiply, divide, subtract with borrow, and compare instructions are new to the 8051 family. An unsigned 8-bit by 8-bit multiply or divide can be executed in 4 µ,s; most instructions execute in 1 µ,s.
Supporting the expanded capabilities of the 8051 family, 8048 single-chip microcomputers being produced with HMOS technology offer advantages over the previous NMOS technology versions. The 8-MHz 8048H and 11-MHz 8048-1 provide increases in performance of 33 and 80%, respectively. Power consumption is reduced from 675 mW to 400 mW, and all existing 8048 hardware and software are directly compatible with the HMOS chips.
Circle 46 5 on Inquiry Card
Desktop Computer System Features Software Flexibility
The Z80 based System 10, a product of Gnat Computers, Inc, 7895 Convoy Ct, Bldg 6, San Diego, CA 92111, utilizes a screen editor, assembler, and CP/M version 2 disc operating system along with optional supporting software, including BASIC, FORTRAN, Pascal, and COBOL. Also included are 65k bytes of RAM, 700k bytes of dual-density, double-sided disc storage, a hard disc interface, DMA and interrupt controllers, and 3 serial 1/0 channels, 2 RS-232 and l IRS-449.
Directed toward small business data processing, word processing, office automation, and mainframe computer intelligent terminal applications, the system may be optionally configured with a 951119512 arithmetic processor and an IEEE-448 bus interface. Video display is provided by a 12" (30-cm) CRT arranged in an 80 x 25 format with 8 x 12 dot matrix characters. A Selectric style keyboard includes an accounting keypad and 10 programmable function keys. All keys utilize capacitive action. The CRT is controlled by a separate microprocessor on the video board, which also handles keyboard data and graphics capabilities.
A power sense read/write protect circuit allows diskettes to remain in the drives during power application and removal and the high speed, hard disc interface provides for up to 80M bytes
System 10 desktop computer system includes monitor, diagnostics, and CP/M disc operating system. Optional software for word processing, accounts receivable/payable, payroll and cost accounting, and general ledger is available in BASIC, FORTRAN, COBOL, Pascal, C, and PU1
of external storage. SDLC, HDLC, and BISYNC protocol capabilities, along with software-selectable baud rates for printer and modem interfacing provide for a variety of extended communication applications. The switching power supply is rfi filtered and enclosed in the system's 21 x 21 x 13" (53 x 53 x 33-cm) cabinet.
Circle 466 on Inquiry Card
Mass Storage System Uses Hard/Floppy Disc Combination
Up to 2900 separate files may be created using the GenRad/Futuredata (5730 Buckingham Pky, Culver City, CA 90230) 2303 mass storage system.
Composed of a microprocessor controlled 35M-byte Winchester type hard disc and a lM-byte single-sided, double-density floppy, the system provides 512 hard disc and 128 floppy disc byte sectors.
Designed for use with the 2300/2301 universal development systems and fully compatible with all existing systems, the mass storage system also has available a hard disc expansion unit which increases storage capacity to 70M bytes. Other floppy disc units may be driven by either of the controllers in the combination unit or expansion unit.
Circle 467 on Inquiry Card
Single-Station System Provides Local Network Capability Option
Designed as 3 standalone entry-level systems, the 4-MHz, Z80A based, 64k-byte MCZ-2 series combines multitasking software and hardware advancements to provide expandability toward a local network capability option for multistation and multiprocessing functions. Packaging, memory, and system options denote differences between models.
Concurrent processing breaks down applications into modular tasks to be executed simultaneously. A special program allows users to supply their own operating system for specialized applications. Concurrent processing allows users to solve multiuser problems through Z-Net, an expandable networking system. Z-Net users can share peripherals and data liase while utilizing dedicated CPUs.
Each system produced by Zilog, 10340 Bubb Rd, Cupertino, CA 95014, supports up to 5 asynchronous lines. Interface programs for devices with RS-232, 20-mA protocols may reside in the system. The MCZ-2 series incorporates multiterminal COBOL to facilitate MCZ-1 disc file and applications program transferral. Additional languages available for the singleterminal mode are BASIC and PLZ.
Circle 468 on Inquiry Card
140
COMPUTER DESIGN/JULY 1980
Push-n-pull tractors, adjustable tear bar and 1-to-9 part forms handling: all in one printer.
Finally, real-time forms access plus continuous forms output in one printer. Perfect for such applications as airline ticketing, invoicing, order preparation and more. And another example of the expanding TermiNet 200 printer family's application versatility.
No-waste, flexible forms control
One reason: an adjustable tear bar that lets you use standard forms with different header lengths . For precise alignment, no paper waste and clean paper tear. Every time.
More reasons: servo-driven tractors that allow infinite manual adjustment in both forward and reverse. A non-volatile electronic VFU that makes forms set-up easy and permits storage of up to 8 vertical formats . A downline loading option enabling you to load formats directly from your data source. Plus straight-through paper path and push-n-pull tractors that give you perfect first-to-last-copy registration . As well as smoother paper handling for all types of forms, including single-part paper.
More features add up to more application versatility
With TermiNet 200 printers, you can also get a 9 x 9 printhead for exceptionally legible underlining and lowercase descenders . Two complete 96character switchable print fonts for ASCII/ APL use or your own special needs . A choice of Magnetic Tape or Edit Buffer Accessory. Plus a 100% duty cycle capability, excellent print quality at speeds up to 200 cps and low cost of ownership. All of which help make TermiNet 200 teleprinters and line printers the industry workhorses .
Immediate delivery instead of piecemeal allocation
Why wait months for other printers when TermiNet 200 printers are available now? When you need them . Mail the coupon today and find out how the expanding TermiNet 200 printer family can meet your range of application needs and generate real cost savings .
Quality that will make a lasting impression
Great rip-offs:
Justonewa~
TermiNet®200 printers give you no-waste forms access
Mail today to:
· J. Walsh , I General Electric Company,
I TermiNet 794-49 Waynesboro , VA 22980. Telephone: (703) 949-1474 .
I o Send me more information about the
expanding TermiNet 200 printer family.
o Have asales representative contact me. o I'm also interested in aTermiNet 200
printer demonstration.
GENERAL . ELECTR IC
Name-----------Trtle _ _ _ _ _ _ _ _ _ _ _ _ __
CIRC LE 60 ON IN9UIRY CARD
Company - - - - - - - - - - - - City _ _ _ _ _ _ State_ _ _ _ Zip._ __
Telephone - - - - - - - - - - - - - - -
MICRO DATA STACK
COMPUTERS, ELEMENTS, AN O SYSTE M S
Emulator Subsystem Supports Hardware and Software Development
Operating in single or multiple incircuit emulator environments, the
RTE8/8800 in circuit emulator subsystem consists of control processor, communications, and debug boards, and also a realtime trace module. Modules for emulation of the 9080A/8080A, 8085, 8048, and Z80 families are added by the user. The subsystem can also be configured as a subsystem with the SYS29 bit-slice microprocessor development system. Basic emulator command set
Manufactured parts with gr11t productivity from two companies . . .
Where demanding production . of precision metal parts Is the need ...
:t·
We have the answer
When it comes to meeting tough requirements of close tolerance parts from most exotic steels, tungsten carbide, ceramic and sapphire, we can supply the answer for you.
We have helped get more than one new product idea off the drawing board and into production with practical and effective solutions in producing quality parts for the computer industry ... parts that you can be assured of to be right the first time.
We offer complete engineering and quality control services where our standards of excellence are rigid and our production departments are among the leaders in the field, while assisting our customers in keeping costs down.
At HPG we stock a full range of grinding equipment including ID & OD grinders, honing, surface grinding, electrical discharge machining, Blanchard and double disk grinding, etc., maintained to insure perfection at all times. At Tri-Axis Machining, a division of HPG, we are equipped with the latest N/C, milling and lathe centers to meet your requirements for close tolerance parts in the computer field.
Whether you have a new product or are improving an existing one, the time to call us is now. Just send a print of what you have in mind or call 714/440-0303 and ask for a customer service representative, he will have an answer for you.
I ~(~)]{J£\
~!r.!'d~.;=::'s., inc.
1130 Pioneer Way,
~~;r El Cajon, CA 92020
A division of High Precision Grinding and Mfg., Inc.
and CRT format are fixed, and only instruction set and internal CPU register for the emulated microprocessors vary. Included are 8k bytes of user mappable, 150-ns access time RAM and an RS-232-C interface to the SYS8/8 development system.
The emulator can sequentially integrate target system hardware with software by mapping SYS8/8 resources into the target system; system debugging can occur in small steps. Fulldu plex, asynchronous, serial RS-232-C interface between the host development system and the emulator occurs at a user selectable rate of up to 9600 baud. The user can employ the emulator's Bk-byte RAM in place of the target system's RAM, P/ROM, or ROM. Because the emulation subsystem from Advanced Micro Computers, 3340 Scott Blvd, Santa Clara, CA 95051, has its own separate control microprocessor and ROM, it is capable of independent operation once emulation is initiated under the emulation control program. This operation continues until a specified event or condition occurs. Emulation commands include 23 instructions.
Emulators can be combined with several microprocessors to perform . realtime, multiprecision emulation in which the emulators operate simultaneously and independently. External trigger output jacks and internal trace leads permit interaction between subsystems. Independent operation is provided for by a single host command which stores all pertinent data in a specified file and relinquishes control to the emulator system. The host system can then operate on other tasks.
While the emulator subsystem executes a user program in realtime, the trace module 'tores the last 128 steps of selected bus operations such as executed instructions, program counter, data and status lines, or external data bits. When a specified breakpoint condition occurs and emulation stops, the data collected in trace memory provides a detailed history of bus activity.
To define a value or trace an event, up to eight external TTL threshold probes may be used. A general purpose hardware counter (up to 64k) can measure elapsed time, specific events, or other system parameters before realtime tracing begins and/or stops.
Circle 469 on Inquiry Card
142
CIRCLE 61 ON INQUIRY CARD
COMPUTER DESIGN /JULY 1980
If you've taken a shine to Shugart, you're in luck.
Specifying Shugart means you're also specifying Remex. We're your alternate source for fast, volume delivery.
Remex single and dual-headed drives, single or double density, are physically and electrically compatible to Shugart SA850R/851R units. So you can switch over to Remex without re-design.
Our drives are also available packaged two drives to a Remex subsystem, in the head/density combination you specify and with their own de power supply. The subsystem includes rack-mountable guide rails. Just slide it into your system, plug it in and go. Even your operating manuals
remain unchanged. What's more, Remex has solved
the dual-head media wear problem for good with a new, improved head and carriage assembly.
So remember this: If the Shugart fits, Remex fits, too.
Call today for more .details or to get your order rolling. Ex-Cell-O Corporation, Remex Division, 1733 East Alton Street, Irvine, CA 92713. (714) 957-0039 TWX: 910-595-1715
Ex-Cell-O Corporation
REMEX DIVISION
CIRCLE 62 ON INQUIRY CARD
MICRO CATA STACK
COMPUTERS, ELE M E N TS, A NO S Y STE M S
70 °C Nonvolatile Storage Increases Applications Of Bubble Memory Device
Along with the extremely high storage density available through bubble memory technology, nonvolatility is the chief advantage of this technique. Available from Intel Magnetics, 3000 Oakmead Village Dr, Santa Clara, CA 95051, the 7110·1 1M-bit bubble memory device extends the upper nonv.olatile storage capability from 50 to 70 °C. System reliability increases are due primarily to a design enhancement which extends the tempe.rature i:ange of the module's storage and bootstrap loops. The bootstrap loop is used as both an address index and a map of good and bad storage locations. A lower amplitude current pulse require· ment for writing has also been implemented.
Support components, which include the 7220 bubble m'emory controller, the 7442 formatter and sense amplifier, the 7230 current pulse generator, and 7250 coil predriver are LSI fabricated and provide accessing of the device and control of its magnetic operation. Error correction is built into the family of bubble memory components which provide four 256k subsections per device.
Circle 4 70 on Inquiry Card
Analog Input System Requires No Additional Interface Components
Contained in an 80-pin quad-inline package, the MP32BG/CG module includes a 12-bit CMOS A-D converter, instrumenta}ion amplifier, input multiplexer for 16 single-ended or 8 differential signals, an address decoder, and control logic. The device interfaces directly with 8080A, 8048, Z80, and SC/MP microprocessors to provide a hybrid analog input ( ± 10-V) system. A minimum of external logic is required for interface with other systems, and memory mapping allows simple programming for data acquisition.
144
Available from Burr-Brown, PO Box 11400, Tucson, AZ 85734, the module's instrumentation amplifier gain can be selected from 1 to 5·4 dB and is programmed with an external resistor, permitting ± 10-mV input ranges. Control logic halts or interrupts the CPU while the conversion takes place and signals when data can be read. Nonlinearity of the device is ±0.0125%.
Use of a successive approximation device offers 40-µs max conversion time and 3-state outputs. A 15-µs max internal time delay between channel selection and start of conversion permits settling, and this delay is sufficient when operated at unity gain. Additional delay selection is external resistor selectable. 4096 memory locations, each with its own address, may be communicated with using 12 address lines.
Circle 4 71 on Inquiry Card
8-Bit D-A Converter Provides Direct Microprocessor lnterfac~
Available in four grades and two package types, the monolithic AD558 features direct microprocessor interface capability. The device utilizes standard chip select and chip enable control signals. Input latches may be made transparent for direct ·access. Temperature stability over specified ranges holds without user trims.
Requiring 5 to 15 Vdc, the device has pin-selectable output ranges of 0 to 2.55 V in 10-mV steps and 0 to 10 V in 40-mV steps. Internal circuitry pro· vides minimum settling time. A product of Analog Devices, Rt 1, Industrial Park, PO Box 280, Norwood, MA 02062, the device includes bandgap reference, microprocessor interface, output amplifier, and 8-bit D-A converter.
Grades J and K specifications in·
elude 0 to 70 °C operating range and 16-pin plastic or hermetically sealed packages. Grades S and T specify - 55 to 125 °C operating range and hermetic packaging only, and can meet MIL-STD-883, class B, specifications. Accuracy over specified temper-
ature is ± lh LSB max for J and S
grades and ± lJi LSB max for grades K and T.
Circle 4 72 on Inquiry Card
Diskette Controller Boards Support up to 4M Bytes of Online Storage
Up to 4M bytes of storage for SBC.SO MULTIBUSTM systems may be interfaced by the ZX-204 diskette controller board. Introduced by Zendex Corp, 6398 Dougherty Rd, Dublin, CA 94566, the board will interface up to four, doublesided, double-density, standard sized drives. Maximum transfer rate is 500k-bits/s.
Composed of an integrated floppy disc controller, DMA controller, data separators, Multibus arbitration logic, and standard, mini-floppy, and Multibus interface circuits, the diskette controller uses IBM formats for soft sectored operation. Additional sector sizes may be utilized through the use of programmable specifications. Write data are precompensated by 125 ns early, late, or zero.
High speed disc to memory comparison scan is included in the 15 controller commands. The 8219 bus ar· bitration chip places the ZX-204 in equal standing with other SBC.SO bus masters in competing for Multibus control. The DMA provides memory to. memory block move capabilities, and 110 channel commands and data transfers.
Circle 4 7 3 on Inquiry Card
Bubble Memory Board Provides 69k Bytes Of Nonvolatile Storage
Model 990-040 bubble memory board utilizes 6 TIB0203 bubble storage devices (92k bits each) to provide 69k bytes of storage capability. Compatible with the TI 990/4, 99015, 990110, and 990/12 CRU bus, the board features an access time of 7.5 ms to first byte and 20-W worst-case power consumption.
Available from Digital Interface Systems, Inc, PO Box 1446, Benton Harbor, MI 49022, the half-slot boards plug directly into the computer chassis and may be combined to multiply storage capabilities. The board contains provision for connection to an external load switch. Single-quantity price is $1950.
Circle 474 on Inquiry Card
COMPUTER DESIGN/JULY 1980
Teach it to talk back. The SLC-1 Time Machine replies instantly to requests from your computer. It automatically tells it the date and time, enters log-in codes, gives any responses you specify. No changes are required in your operating system. Simply install it in the RS-232 or 20mA current loop serial link that connects your computer and terminal.
No more operator response errors. No more delays. Now you can automatically re-boot your system after power failure.
Whether you use your computer for business, research, or process control, the Time Machine will save you money. In fact, the first time it prevents a human error, it will more than pay for itself.
The Time Machine doesn't interfere
with your computer's operation. It steps in and responds only when it sees the key phrases you have specified. And because it's battery-supported, it never misses a beat or a bit.
The Time Machine comes with a built-in bonus: it is also an independent microprocessor system. Its 1,000 bytes of RAM (expandable to 12K) lets you use it in the off-line mode to free your computer for other tasks. Applications support is available, including a growing 6502 machine language software library.
The single quantity price is only $640. Ten-digit display option, $190. For more information or literature on the SLC-1
Time Machine, contact Digital Pathways, Inc., 1260 L' Avenida, Mountain View, California 94043, or phone (415) 969-7600.
GET INTO THE TIME MACHINE.
DIGITAL PATHWAYS
CI RCLE 63 O N IN QUIRY CARD
145
MICRO CATA STACK
COMPUTERS, ELEMENTS, ANO SYSTEMS
Enhanced Capabilities Expand Small Business Microcomputer Series
Consisting of a Z80A and LSI supporting circuitry contained on a single board, Ai Electronics Corp, 2-28-16 Shimomaruko, Ohta-Ku, Tokyo 146 Japan, has added capabilities to its model ABC-20 system, producing four ·additional models: ABC-21, -24, -25, and -26. Each is a general purpose, business-directed system capable of operating with a variety of software and conversion schemes to support single- to double-density conversions and file exchange programs.
Distinguishing features between models are disc size, 5.25" (13-cm} or 8" (20-cm), CRT size, _9" (23-cm) or 12" (30-cm), and memory capacity, 640k
Al Electronics' ABC series of microcomputer systems feature 2-piece modular design, with disc and CRT size options. Keyboard includes function and screen control keys as well as numerics keypad
bytes through 2.3M bytes. Disc systems are double-sided, doubledensity format and CRT display is 80 x 24. Optional are the lOM-byte Winchester disc and disc/cartridge units, memory extension unit, and lOM-, 20M-, and 40M-byte cartridge disc
comp>ao
microsystems
6500 USERS
unit, a printer/lightpen adapter, and a paper tape reader adapter.
Arranged in a keyboard unit and a CRT/disc assembly, the system features separate RAM display refresh and two serial 1/0 ports.
Circle 4 7 5 on Inquiry Card
TMS9900 Microprocessor Board Addresses up To 64k Bytes
Utilizing the 16-bit TMS9900 microprocessor, the CPU-200 module includes the microprocessor's bit-serial CRU feature for 1/0 capabilities. Programmable serial 1/0 port baud rate, variable character and stop-bit length, and an interval timer are included
Using a 56-line proprietary bus, the 16-bit CPU-200 board can address up to 64k bytes and provide 1/0 capabilities. Up to 4096 inputs and outputs may be addressed individually. The board includes 16 vectored interrupts, 8-line bit programmable port, and interval timer, and is software compatible with TI990 mini and microcomputers. TIBUG MONITOR and POWER BASIC are offered in P/ROM.
Included on the TMS9900 microprocessor based board from Erni and Co, 3316 Commercial Ave, Northbrook, IL 60062, is a serial port which can be configured as either an RS-232 or current loop. The port may be programmed for 75- to 38.4k-baud operation, 5-to 8-bit character length, and 1, Ph, or 2 stop _bits.
The instruction set includ es 16 arithmetic with multiply and divide, 20 program control, 14 data control, 6 logical, 4 shift, 5 bit serial 1/0, and 6 external control instructions. Typical execution times with a 3-MHz clock rate are 2 µ.s for BRANCH and 31 µ.s for DIVIDE. The 4 x 9" (10 x 23-cm) board requires 5 Vdc at 0.5 A, 15 Vdc at 90 mA, and -15 Vdc at 30 mA, and is priced at $560.
Circle 4 7 6 on Inquiry Card
146
CIRCLE 64 ON INQUIRY CARD
COMPUTER DESIGN/JULY 1980
MDB makes the only foundation module for Multibus* and it requires just one card slot.
Imagine what else we can do!
If you've never been excited about a foundation module before, now's the time. MDB offers the industry's first module for use with Intel 16 and 8 bit single board computers . It gives low cost Multibus-to-peripheral interface with complete address and interrupt logic, standard Intel board spacing and room for up to 38 sockets or IC devices of any size on the wire wrap portion of the board. Because all wire wrap pins and components are on the same side of the board, the module requires only one card slot. And it takes any configuration DI P package and provides three 50-pin edge connector positions. In addition, MDB makes a pure wire wrap general purpose module in a single slot configuration which has space for 60 IC positions . This is the kind of flexibility a logic designer dreams about.
If you're not an Intel user, you can still get MDB design flexibility-in single slot bus foundation and wire wrap modules for PDP**-11, LSI**-11, Data General and Perkin-Elmer computers and wire wrap boards for IBM Series/ 1. Even the dedicated portions of these modules are application adaptable in that they allow a change of functionality by the use of wire wrap pins.
What else can MDB do for you? Look at our line printer controllers. We offer more than 100 computer/printer combinations. If you need communications modules, interprocessor links, multiplexors and PROM boards, we've got them all with the built-in quality MDB is famous for.
MDB interface products are warranteed for a full year; most can be delivered in 30 days or less, and you can buy them under GSA contract #GS-OOC01960. What can we do for you?
-Trademark Jntd Corp. ..Trademark Digital Equipmem Corp.
Circle 65 for Intel, 66 for LSI, 67 for PDP, 68 for DG, 69 for PE, 70 for IBM.
r:l[)B 1995 N. Batavia Street Orange, California 92665 714-998-6900 SYSTEMS INC. TWX : 910-593-1339
147
MICRO CATA STACK
C OMPUTE R S , E LEME NTS , ANO SYSTEM S
Modular Construction Enhances Microcomputer System 's Flexibility
Consisting of a ZSOA based ZBC-80 s.ingle-board computer, 48k bytes of RAM and sockets for Bk bytes of. ROM or EPROM, a 2k-byte monitor, dual 8" (20-cm) double-density floppy disc drives, and interfaces for video ter-
minal, line printer, and additional peripherals, the MACS-IO System is MULTIBUSTM compatible. The system and software packages in Pascal, COBOL, BASIC, and FORTRAN are available from Matrox Electronic Systems, Ltd, 5800 Andover Ave, Montreal, Quebec H4T 1H4, Canada.
Modular hardware, which includes the ZBC-80, FFD-1 floppy disc controller/
RAM card, CCB-7 7-slot card cage/backplane with power supply, and DF-28 floppy disc drive, is available separately, along with a 128k-byte RAM card and alphanumeric and graphic video display controllers. Up to 3 card cages can be stacked to provide 19 free card slots for system expansion. Singlequantity price is $5990.
Circle 4 7 7 on Inquiry Card
Dual Serial Interface Board Facilitates RS-232/STD BUS Communication
Capable of full-duplex operation in synchronous and asynchronous modes at switch-selectable baud rates of 50 to 19.2k, the SB8420 interfaces two in-
dependent RS-232-C, 20-mA communication channels to STD BUS systems. Modem control signals for each channel are also provided.
The board is 1/0 mapped, and includes an interrupt mask register and an interrupt output connector. A socket and control logic are ·also provided for a 256-byte PIROM which can
be enabled at system reset to overlay system RAM. This allows RAM based systems to be initialized, and can be used to bootstrap programs from mass storage devices. A produ ct of Micro/Sys, Inc, 1353 Foothill Blvd, La Canada, CA 91011, the board is priced at $325 in quantities of 1 to 9.
Circle 4 7 8 on Inquiry Card
Compact General Purpose Computer Includes Dual Microfloppy Discs
Capable of acting as an intelligent terminal controller as well as a general purpose desktop unit, the RD·llC includes a dual double-headed, doubledensity microfloppy subsystem which provides 700k bytes of storage, up to 256k bytes of RAM, 4 serial interface ports, and switching power supply housed in a 12.5 x 8.5 x 16.75" (32 x 22
x 42-cm) enclosure. Standard interfaces included are IEEE-488, asynchronous and synchronous serial, general purpose parallel, and DMA.
Peripherals for the system from RDA, Inc, 5012 Herzel Place, Beltsville, MD 20705, include Winchester disc, magnetic and paper tape, punched card, and printers, as well as A-D and D-A plug-in modules.
Compatible with Digital's RT-I I Foreground/Background, the system is
based on th e LSl-11 /2 or -11 123 central processors, and supports a macro assembler, FORTRAN IV, multiu ser BASIC, APL, FOCAL, FORTH, and Pascal. Synchronous remote job entry software includes IBM 2780, Univac 1004, and User 200 emulators. Terminal software includes asynchronous TTY emulation for ASCII compatible interface. File transfers in ASCII or binary format are provided for.
Circle 4 7 9 on Inquiry Card
Microcomputer System Uses Cartridge Backup For Data Security
Intended for business, research and development, and systems development, the ZBOA based S/iOOO microcomputer system, utilizing the S-100 bus structure, is composed of 64k bytes of
RAM, 8" (20-cm) hard disc, tape cartridge data backup, optional peripherals, and expansion capability to 16-bit processors. Provided by Computer Service Systems Network (CSSN), 120 Boylston St, Fourth Floor, Boston, MA 02166, are operating systems in CP/M, 2.0, and CSSN PDOS, a literal superset of CP/M, 1.4. Software compatible with the operating systems in-
eludes BASIC, COBOL, FORTRAN, C, and
Pascal.
Capable of handling four drives, the
controller interfaces with the 24M-byte
disc via SMD logic. Data stored on disc
are protected by a front panel access-
ible cartridge drive. The backu.p
system's file oriented software can
store, file by file, up to 13.4M bytes per
cartridge.
Circle 480 on Inquiry Card
148
COMPUTER DESJ~N /JUL Y 1980
Inside this generalpurpose memory istheright:mix:foranymatch.
The right mix.
With the MK8600 add-on memory system, you can get up to 6 megabytes capacity in a compact 12 1/4 inch chassis. Configure it 768K x 72, 2304Kx 16 or any other way you want to complement your existing system. It's that versatile.
For any match.
But the real beauty of the MK8600 is how easy it is to interface. The I/O is simple and direct because only
minimal control signals are required for any data transfer. This lets you quickly integrate the MK8600 into your system.
Before you specify your next add-on memory system, make sure it has the capacity and interface flexibility to meet your requirements. To be sure, make it the MK8600 add-on memory from
Mostek, 1215 West Crosby Road, Carrollton, Texas 75006; (214) 323-6000. In Europe, contact Mostek Brussels 660.69.24.
Six megabyte density in a compact 12 1/4 inch chassis with field-proven applications as diverse as semiconductor fixed head disk replacement, video memory system, prototype main memory, high speed data acquisition, and digital telephone switch buffer.
MK8000 card forms the base of the system. Features capacity options of 16384 to 131072 words up to 24 bits in length on a 15.4 x U .75 inch P.C . card. Complete timing control and addressing logic self-contained on each board. ·other features include customer-specified timing options, inverting or non-inverting data, and byte control.
On the MK8600, Address, DI and DO may be bussed, but are separated on backplane for more flexibility. Available options include extender card, ECC card (application dependent), diagnostic card, and general purpose card for customer I/ O. For even greater flexibility, up to 4-way interleaving within a single chassis is also available.
All RAM memory is the industry standard Mostek MK4116 16K dynamic RAM with typical system speed at 250ns access and 450ns cycle time, with faster speeds available for applications requiring high throughput.
© 1980 Mos1ek Corporation
lllOSTEK · ·MKSOOO. MK8600 and M K411 6 ar e trad emarks of Mostek Corporation.
CIRCLE 71 ON INCj)UIRY CARD
149
MICRO DATA STACK
COMPUTERS, ELEMENTS , ANO SYSTEMS
SOFTWARE
Component Software Permits Modular Capabilities Increases
Software designers can incrementally add software for applications with the TMS9900 16-bit microprocessors and TM9900 microcomputer modules. This software bus is analogous to the hardware designer's bus system for expansion capabilities. The component soft-
0
ware series complements the micr0processor Pascal system by reducing the number of software statements required; the microprocessor Pascal system, also b.y Texas Instruments, Inc, PO Box 1443, M/S6404, Houston, TX 77001, provides an optimal method for writing the remaining statements.
Available for use on the company's floppy or hard disc microprocessor development systems are realtime ex- · ecutive and file manager software. The realtime executive serves as the software keystone by providing the interface for all subsequent component software products and block-structured assembly language Pascal applications. System initialization, concurrent process synchronization, interprocess communication, interrupt linkage, memory management, and priority scheduling are contained in a 6k-byte nucleus of software routines which performs the necessary executive functions ·for a realtime multitasking application program. For the designer who wants to customize the component software modules, a source code is provided.
The file manager supports the TM9901303 floppy disc controller on several levels of capability and can interface the realtime executive on several levels depending on the 110 generality and the designer's applica-
This Ticket Printer Has The Guts To Stand Alone
Inside its free standing case, our PK-970 alphanumeric printer teams an advanced microprocessor-based controller and power supply, our long life dot matrix print head, and stepper motor that controls ticket advance, 6 lines to the inch or .110, and positioning until the message is complete . The result: a versatile standalone workhorse that can print both analog and digital data on the same card for special applications from lab to weigh station to manufacturing process control.
Print standard or enhanced characters on single-sheet cards or multi-part tickets, with or without ribbon mechanism. Program it for 30, 37 or 49 character Iine lengths and character density of 10, 12.4 or 16.5 characters/inch. And count on that integral controller to accept parallel, or serial data to meet your system's needs. For details write or call today.
PRACTICAL
P A AUTOMATION, INC. 1-T-ra_p_Fa_1_1s_R_o_a_d.__s_h_e_1t_o_n._c_o_n_n_._0_64_8_4/__T_e:l-(_2_0_3)_9_2_9_-s_3_8_1
tion. Functions of the file manager can be increased to include install formatted volume, open/close/read/ write files, provide sequential access to files, and rewind/forward and backspace to files. By linking 2k bytes of code to the realtime executive, the user can read and write a floppy disc.
Circle 481 on Inquiry Card
Software Packages Operate Independently Or as Flexible System
Intended for use either alone or in conjunction with others, four application software packages-word processing, mail-list management, list-oriented information management, and general ledger and financial reporting-are a product of North Siar Computers, Inc, 1440 Fourth St, Berkeley, CA 94710. Designed for use on the company's HORIZON microcomputer, all packages require 64k of RAM, a minimum of 2 floppy disc drives, and are available for double-density and quad-capacity vers10ns.
NorthWord, the word processor, incorporates onscreen text editing, simultaneous document printing, and formatting to specific criteria, including page numbering, titling, underlining, and spacing, and is the package upon which the others are built. An onscreen menu is available to the operator.
When combined with the mail-list management package, personalized bulk correspondence may be produced. When used in conjunction with the general ledger/financial reporting package, the production of customized financial statements and reports may occur.
MailManager is a mail-list management package which maintains correct order during entry, correct, and delete functions. Up to 10 data items for each name in the list may be used for sorting and selecting, including sorting by zip code. lnfoManager accepts up to 50 categories of information for each record and has the ability to select and sort before printing. GeneralLedger maintains accounts based on input such as checks, deposits, and journal entries.
Circle 482 on Inquiry Card
150
CIRCLE 72 ON INQUIRY CARD
COMPUTER DESIGN/JULY 1980
GTE BYTE· J/ZED RAMs
AFEW B'ff£S ........ ........OH..........·. AFEW TllOIJSAND
3539 ./25, ~8/T8'1TES
I fa,1/oO'g/1l:J~·PIN
./ACCESS TIME:
I
¥00. soo. 'sons
'AVAll.ABll.lrY. .. NOW.I
'.:
;
88/1//8'l/l
.;'I-PIN
(/toa',fA.upfirr'ffiLwerf'ru'
,./102'1 8·8/T BYTES
I./ACCESS TIME: .200. 300. 900ns
t./ ANNOUNCED ,;Jf'ld SOURCE
ALL DEVICES FEATtJRI: I.tAVAllABILITY. .. NOW!
~COMMON IIOBfJS .,-S/NGlE ~ SV SUPPl Y
~tow_ > WERDtVICIAVAltABLE ~M/l·&T0·8B3... >'4 $
l:;r:z;:;;;.~:-;-::··-mJ~·11·-···-1. ·1Mc;~.;..;.~1~'"'·l.-."z..,.,.=I.C51·~·ill·E!E·· ~..._,__.
GTE Has Byte-Sized Memory to Match Your Needs
A Few Bytes ...
If your system needs just a few bytes of memory, take a good hard look at our 3539. For small memory designs, it's ideal. It's organized as 256 B-bit bytes .. . a 204B bit Static RAM packaged in a standard 22-pin DIP . You have a choice of access times ... and what's more, it's available in a low power configuration, or you can select a military version that meets MIL-STD-BB3 requirements. The timeproven, highly reliable 3539 is a natural upgrade for small memory applications using 2111 's and 2112's . .. and you'll like the byte oriented 1/ 0 structure.
or a Few Thousand
On the other hand, if you need a larger memory, consider our BK family. GTE offers the most complete line of BK Static RAMs in the industry. They all provide .____ _ _ _ ___. 1024 B-bit bytes, with a common
1/ 0 bus for ease of design. You have a choice of access times as low as 200 naneseconds. For those special applications, our low power units may be the answer ... or perhaps an BK military device that meets MIL-STD-B83 requirements ... and, all are immediately available. GTE BK Static RAMs offer the design engineer many advantages .. . including higher performance, lower system cost, significant power savings .' ' and the convenience of an B-bit bus 1/ 0 structure . And furthermore, GTE's BK'>S are the only Static RAMs with an announced second source. So ... if. you need a few bytes, or a few thousand, GTE Microcircuits is the company with the experience, the history, and the product variety to match your memory needs.
Call Toll Free
800-528-6050
B e-Sized
Static RAMs
(?ii~
Microcircuits
Call Toll Free for the name of your local distributor and a copy of our new Short Form catalog.
2000 West 14th Street Tempe, Arizona 85281 (602) 968-4431 TWX: 910-951 -1383
CIRCLE 73 ON IN9UIRY CARD
MICRO OATA STACK
COMPUTERS, ELEMENTS, ANO SYSTEMS
Artificial Intelligence Computer Architecture Computer Graphics Database Systems Design Distributed Processor Communication
Architecture Microprocessor Technology & Applications PASCAL, Introductory & Advanced Simulation Methods Software Engineering
Software Management for Small Computers
Whatever you need to know, you now have access to these and over 400 other courses in 26 disciplines from 21 universities . It doesn 't matter where you work , or where a course is given-it can be delivered to you anywhere in the world!
AMCEE Videotape Courses
These courses are made available on conve· nient videocasettes by AM GEE, a non-profit association of the nation 's leading engineer· ing universities . Courses include both gradu· ate level and continuing education short courses , as well as symposia , seminars , and conferences .
What do they cost?
AMCEE videotape courses are priced from $50 to $75 per hour-no matter how many participate. The more participants enrolled , the more cost-effective a course becomes.
How do you get started?
Send for AMCEE 's new 1980/1981 Cata-
log. You'll find a complete description of every
course being offered by AMCEE's member
universities , plus prices and ordering
information.
Write to AMCEE , Dept. C, Georgia Institute
of Technology, Atlanta, GA 30332 .
Or call (404) 894-3362 .
D I AAsMsoCcE1E,it1on for
I
Mec1r,i ti.iset1
Iii Iii Iii ECdounct1,ifn1u011n1q for
Engineers Im
AUBURN UNIVERSITY CASE WESTERN RESERVE UNIVERSITY COLORADO STATE UNIVERSITY GEORGIA INSTITUTE OF TECHNOLOGY ILLINOIS INSTITUTE OF TECHNOLOGY MASSACHUSETIS INSTITUTE OF TECHNOLOGY
NORTH CAROLINA STATE UNIVERSITY POLYTECHNIC INSTITUTE OF NEW YORK PUROUE UNIVERSITY SOUTHERN METHODIST UNIVERSITY STANFORD UNIVERSITY UNIVERSITY OF CALIFORNIA, DAVIS UNIVERSITY OF IDAHO UNIVERSITY OF ILLINOIS AT URBANA{;HAMPAIGN
UNIVERSITY OF KENTUCKY UNIVERSITY OF MARYLAND UNIVERSITY OF MASSACHUSETIS UNIVERSITY OF MICHIGAN UNIVERSITY OF MINNESOTA UNIVERSITY OF SOUTH CAROLINA UNIVERSITY OF SOUTHERN CALIFORNIA
CIRCLE 74 ON INQUIRY CARD
SOFTWARE
Pascal Language Support
Simplifies zao
Equipment Programming
Known as the Pascal/8002 Z80 processor support package, a software product, designed for use with the Tektronix 8002 microprocessor development system, permits the developers of Z80 based equipment to realize the advantages of accommodation of structured programming techniques, standardization of features, and portability between machines derived through use of the Pascal language. In addition to programming process simplification, the development system provides powerful debugging capabilities.
Barriers to Pascal programming of microprocessors, such as programs being confined to specific ROM locations, variables being stored in known RAM locations, and specific 1/0 devices being required, are dealt with such that the users can configure Pascal programs to conform to their machinedependent requirements. To support end-product execution, a multimode interpreter library is included.
Requiring less than half the storage space of equivalent assembly language code for the Z80, Pascal routines are
stored in the form of P-codes, an optimized instruction set. Overall memory requirements are reduced since temporary variables are stored in RAM only while valid; thus, the same space may be utilized by different variables during execution.
The processor support package together with a universal program development package are used to assemble the necessary machine language routines required by the program. Integration into the final product occurs by linking the machine language and Pascal routines, locating these in the desired memory locations, and transferring to the Tektronix disc operating system.
Support modules available are real (floating point) numbers, transcendental functions, and operations on sets. Interpreter requirements vary from about 3k bytes to 7k bytes and together they support all features of the UCSD Pascal except external file handling operations. Available from Pascal Development Co, 10381 S De Anza Blvd, Suite 205, Cupertino, CA 95014, the user may select only those modules needed by his program application.
Circle 483 on Inquiry Card
Improved Pascal/M TM Compiler Extends System's Capabilities
Release two of Pascal/M includes userinitiated capabilities increases along with improved debugging tools . The system now supports long integers, full random 110 and Boolean output. Extensions for assembly language externals, ADA syntax random 1/0, runtime recovery, and forty additional built-in procedures are included, as well as support for the full Pascal language.
Implemented using a pseudo-
machine code called portable Pascal
code (P-code), Pascal/M's instructions
optimize instruction execution and
code space of Pascal programs: P-code
is executed through an interpreter
which translates the generated code in-
to target machine code.
Release two, available from Sorcim,
2273 Calle De Luna, Santa Clara, CA
95035, is designed to run on any stan-
dard 1.4 or 2.2 version of CP/M or on
Cromemco COOS based system using
Z80 or 8080/8085. It requires one floppy
disc and 56k bytes of memory.
D
Circle 484 on Inquiry Card
COMPUTER DESIGN/JULY 1980
ENGLAND KNOWS TOSHIBA DELIVERS
14 MILLION 16K DYNAMIC RAMs AYEAR.
In England it's no secret that Toshiba delivers. More than a million 4116-type 16K Dynamic RAMs every month. In all three speeds: 150, 200
and 250 nanoseconds. And with all that volume, our actual customer rejection is less than 1/ioof 13! Much less. That's documented quality.
Toshiba quality. They know all about it in England. All around the world, in fact. You can find out, too.Just give us a call:i'
TOS HIBA AMERICA, INC.
People around the world have fond memories of us.
·Ask for our Memory and Microprocessor Product Guide while you're a t it. We'll be happy to send you a copy. Toshiba America, Inc. , 2151 Michelson Drive, Suite 190, Irvine, CA 92715 (714) 955-1155
CIRCLE 75 ON INQUIRY CARD
AROUND THE IC LOOP
TWO SCHOTTKY TTL FAMILIES
Robert A. Stehlin
Texas Instruments Incorporated
PO Box 225012, Dallas, TX 75265
An computers, whatever their size, utilize basic logic func-
tions such as OR, AND, NOT, NOR, and NANO. For many years,
transistor-transistor logic (TTL) has been the primary form
of logic circuit used to perform these functions. Fig 1 shows
the configuration of a basic TTL NANO gate in which a single
multi-emitter transistor (Tl) performs the logic. The signal is
then coupled to transistor T2 and its load resistor.
TTL has displaced earlier logic circuits such as resistor-
transistor logic (RTL), in which logic was performed by input
resistors, and diode-transisto: logic (DTL), in which logic was
performed by input diodes. This displacement is based on
su .'>erior performance, the TTL provides faster speed, lower
power, and higher fanout capability. It is adaptable to vir-
tually all forms of IC logic and provides the lowest pico-
joule-dollar product of any logic type.
'
Schottky TTL is a derivative of TTL, designed to increase
TTL speed in order to approach the speed of emitter-coupled
logic (ECL). This logic is fully compatible with other
members of the TTL family and equally as easy to use.
The configuration for Schottky TTL is basically the same
as standard TTL except that Schottky barrier-diode clamped
transistors are included in the circuit. Fig 2 shows a tran-
sistor clamped with a Schottky barrier-diode (SBD). The
154
---11
Fig 1 Basic transistor-transistor logic (TTL) circuit. T1 is multi-emitter TTL transistor
COMPUTER DESIGN/JULY 1980
That's all it takes for a demonstration of this versatile, affordable 13" desktop - one that can answer practically all of your systems management needs .
The 3621 is ideally suited for distributed processing. Standing alone or used on-line with another system , it can provide up-to-the-minute data on everything from inventory to personnel. In 8 dynamic colors that speed comprehension and increase user efficiency.
The system includes 32K RAM for user workspace, and a built-in micro-disk drive that uses specially formatted Sot-Disks"' with 51 .2K bytes of storage per side. Optional separate disk drives can add up to 26M bytes of memory. Also available is an X-bus interface for any number of peripherals.
A BASIC interpreter and FORTRAN compiler, both standard , give a choice of two powerful languages. As an option , users may specify special graphic characters of their design.
lntecolor's 3621 is made for maximum flexibility-from its unique file handling capabilities to the deluxe built-in keyboard with color and numeric clusters.
See for yourself how it can address complex applications and improve your operation. Contact your ISC sales rep today, and put color to work for you .Color Communicates Better
Unretouched pholo of screen.
·u.s. domesttc price.
ISC SALES REPRESENTATIVES : Al : 2051883-8660. AZ : 602/994-5400, AR : (TX) 214/661-9633, CA : Alhambra 21 31281 -2280. Goteta 805 964-8751 , Irvine 714/557-4460, Los Angeles 213/476-1241 , Los Altos 4151948-4563 . San Diego 7141292·8525. CO : 303/355·2363 . CT: 203/624-7800. DE : (PA) 2151542-9876. DC : (VA) 7031569· 1502. Fl: Ft . Lauderdale 3051776-4800 . Melbourne 305/723-0766 . Orlando
305/425-5505, Tallahassee 9041878·6642. GA : Atlanta 404/455-1035, HI : 808/524-8633, IO: (UT) 8011292·8145. ll: (No.) 3121564-5440. (So MO) 8161765-3337. IN: (IL) 3121564-5440. IA: (Seel! County Only) 3121564-5440. (MO) 8161765-3337, KS : (M0) 8161765-3337. KY: 6061273-3771 , LA : 5041626-9701 . ME: (MA) 6171729-5770. MD: (VA) 7031569-1502 . MA : 617/729-5770, Ml: Brighton 313/227-7067.
G.and Rapids 6161393-9839 . MN: 6121645-5816. MS: (Al) 205/883-8660, MO: 8161765-3337, MT: (C0) 303/355-2363. NB: (MO) 8161765-3337, NH: (MA) 617/ 729-5770, NJ: (No.) 2011224-6911 . (So) 215/542-9876. NV: (AZ) 602/994-5400, NM: 505/292-1212 , NY: Metro/Ll(NJ) 201/224·6911 , N. Syracuse 315/699-2651 , Faorporl 7161223-4490, Utica 315/732-180 1. NC: 919/682-2383. ND: (MN)
6121645-5816, OH : Cleveland 2161398-0506. Dayton 513/435-7684 . OK : (TX) 214/661-9633 . OR : 503/644-5900, PA : (E) 2161542-9876, (W) 4121922-5110 , RI : (MA) 617/729-5770 , SC : 803/798-8070, SD: (MN) 6121645-5816 . TN : 615/482-5761 . TX : Aushn 512/454·3579 . Dallas 214/661-9633 , El Paso Area (Las Cruces. NM) 5051524-9693 , Houston Only 7131681-0200. UT: 8011292-8145. VT: (MA) 6171729-5770 .
VA : 703/569-1502. WA : 206/455-9180, WV: (PA) 412/922-5110. WI : (IL) 3121564-5440 . W Y: (CO) 303/355·2363 .
~~~?~1~f~ ~~:n~i~g,1~~~¥.fi~~~~~r~~09;:2~~;~GJg~~-~~:t3.1~~;~e~~~3~-g;O-~~~ .RsKP~1t~~!~;;10~:~~~~~- ~3~~~~~:~:0~a~~~g~~-~~:S~~~t5.·~~~i~·A~Ro~ ~cu~~c~1~1?;; 057-546-55 , UNITED KINGDOM : Bournemouth 0201671181 , WEST GERMANY: Kobtenz 01149-3102516. AUSTRALIA & NEW ZEALAN D: Auckland 876-570. Canberra 58-1811 , Cherms1de 59-6436, Christchurch 796-210, Melbourne 03-543-2077. Sydner, 02-808-1444 , Welhngton 644-585, CANADA : Dorval 514/636-9774 , Ottawa 613/224- 1391 , Toronto 416/787-1208 , Vancouver 604/684-8625, CENTRAL
AND SOUTH A~~3~1;:i~~~1:t:=1~~~;)~~~iri2:i~: ~~x6r~'e~~~~(~%5.::i4~~i-~~:3~:g~~?Jo~~~~~s~~~~~~~:.i~~~~;;~$d~ · JAPAN: (Tokyo)
KUWAIT: Kuwait 438-180/112. LEBANON: Beirut 221731 /260110, SAUDI ARABIA : Jeddah 27790 . Riyadh 25083-39732 For sales and service 1n other countries con tact tSC headquarters 1n Norcross. GA ., U.S A
Intelligent systems corp.®
lntecolor Drive ll 225 Technology Park/Atlanta l l Norcross, Georgia 30092 I I Telephone 404/449-5961 I I TWX 810-766-1581
CIRCLE 76 ON INQUIRY CARD
155
Fig 2 Schottky barrier diodeclamped transistor. Diode between base and collector has forward voltage lower than that for collector-base junction. This prevents saturation, increasing switching speed
100 50
54/ 74L 30 SPEED (ns) 10
1 I
~ 54174S .54174AS
10 POWER (mW)
20
100
Fig 3 TTL logic families speed/power graph. Right hand curve traces higher speed families, includ ing 54/74 (standard TTL), 54/74S (Schottky TTL), and 54/74AS (advanced Schottky TTL). Left hand curve shows comparable history ·of low power families, with most recent advanced low power Schottky (ALS) offering 4- pJ speed/power product
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CIRCLE 77 ON INQUIRY CARD
diode is located between the transistor's base and collector to prevent the transistor from saturating. The diode's forward voltage, Vr , which is lower than the voltage required to forward bias the collector-base diode of a silicon transistor, prevents saturation. The SBD diverts current from the base of the transistor into the collector, reducing the basecollector voltage. Because the Schottky barrier diode is extremely fast and the transistor does not saturate, switching speed is increased and propagation delays are reduced.
Advanced Schottky Families
Recently, Texas Instruments added two new Schottky TTL logic families to its line of bipolar 54174 series TTL functions (Fig 3). The Advanced Schottky {AS) family is in the high speed portion of the spectrum. This series provides a complete family of functions two times faster than any Schottky TTL function previously available. Full gate delay for AS SSJ functions is typically 1.5 ns and gate power dissipation, 20 mW. The speed/power product is, therefore, approximately 30 pJ. Internal gate delay for AS MSI functions is 1 ns (typ), and gate power dissipation is 12 mW (typ).
This new family is primarily for systems designs in which maximum possible speed is the primary factor. Available in 20- and 24-pin DIPs, the devices will encompass the MSI arithmetic operators and the supporting gate and flipflop functions required to implement high speed CPUs, controllers, and processors.
The second family, Advanced Low Power Schottky (ALS), is in the low power, high speed portion of the bipolar TTL performance spectrum. This series provides a complete family of TTL functions, which (when compared with the
COMPUTER DESIGN/JULY 1980
earlier series from this manufacturer) presents a power dissipation 50% less than low power Schottky ITL (LS~ and a speed two times faster than low power Schottky or the standard ITL series. Full gate delay is typically 4 ns and gate power dissipation is typically 1 mW for a speed/power product of 4 pJ.
This family is used for a broad range of applications in which low power is primary but speed is also critical. Because of the power demands, these devices will ease many design problems in microprocessor based systems and will significantly improve overall system performance. ALS functions can replace identical functions in the standard and low power ITL families, with improvements in both power and speed. It can also replace some LS and Schottky functions where speed/power tradeoffs can be made.
Fan-out capability, which eases system design and improves performar:ce, is another advantage of the ALS family. Functions are capable of driving 10 loads (54ALS or 54LS) or 20 loads (74ALS or 74LS). Input voltage level V1L (max) is 0.8 V, providing good noise immunity.
This series will consist initially of 75 device types currently in the LS series, including gates, dual D and J-K flipflops, and MSI functions. Having the same drive as the LS series, these !Cs will provide immediate plug-in to existing logic systems.
Summary
The advanced Schottky TTL families described here are fully compatible with earlier TTL and Schottky TTL series, in both military and commercial temperature ranges. Improved speed/power performance, increased function complexity, and other advantages of these two advanced logic families are primarily the result of two technological factors. Oxide sidewall isolation significantly reduces parasitic capacitance and capacitance between · active components. Ion implantion permits shallower junctions. With less capacitance and shallower junctions, speed is increased.
Many MS! functions will be offered in 300-mil wide, 24-pin ceramic and plastic D!Ps, allowing a designer to approximately double the functional densities while reducing board space by 30%. This increased density, coupled with an increasing breadth of product selection, will provide significant improvements in efficiency and reliability.
Designers using TTL circuitry have always been faced with constraints in the correlated values of speed and power consumption. These two advanced Sch·ottky families have been positioned at opposite ends of the bipolar speed/power spectrum to offer a choice of design options.
WHEN AIR QUALITY COUNTS, GET A QUALITY AIR ANALYSIS SYSTEM.
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Get The Right Analyzer For The Right Job.
ROYCO builds air analysis systems to span the needs of manufacturers and users of air filters , computer memory and electronic systems, pharmaceuticals and other high-technology products where the right answers to a broad spectrum of aerosol physics
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For example:
1 Our reliable and rugged Model 225 multi-channel, high concentration analyzer detects, sizes and counts particles from 0.3 micrometre in size at concentrations up to 100,000,000 per cubic foot of sampled air!
2 Our industry standard Model 245 multi-channel, high sample flow analyzer detects, sizes and counts particles from 0.5 micrometre in size at concentrations up to 300,000 per cubic foot of sampled air at a flow rate of 1 cubic foot per minute!
LAC 226 Laser-Based , 16 Channel Analyzer
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MPS 1601161
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158
CIRCLE 79 ON INQUIRY CARD
3 Our high-sensitivity, high concentration laser-based, 16· channel LAC 226 particle analyzer detects, sizes and counts particles from 0.1 micrometre in size at concentrations up to 50,000,000 per cubic foot at a count rate of 9.9 kHz per channel.
And , there's also a full family of useexpanding accessory equipment such as our Model 160/161 MPS multi-point air sample scanner. For a no-obligation demonstration of our air analysis systems by one of our technical representatives just call 415/325-7811. We 're ready.
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141 Jefferson Drive Menlo Park, CA . 94025
ac1FIC SCIEnTtFIC
Pacific Scientific, Inc. Allmend Center CH-4460 Gelterkinden/Basel Switzerland.
Pacific Scientific, Inc. 8 Cambridge Road Brighton , Sussex BN3-IDF England.
COMPUTER DESIGN/JULY 1980
Get a handle on the future.
Tie Ic on ' s If you've been waiting for the future to bring
the most sophisticated terminal in portable
Patent Pending
the world using Standard ANPA bureau protocol, conventional or time sharing, transmit
A m b a s s a d o r form, wait no more. It's here. Telcon's
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The Telcon Ambassador is so rugged, you can treat it like an ordinary piece of lug-
lierrn·inal Memory up to 128K. Bubble Memory up to
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TELECOMMUNICATION SYSTEMS ANO EQUIPMENT
mru®s~
INDUSTRIES, INC
1401 N.W. 69th St.· Ft. Lauderdale, FL 33309 · C305J 971-2250 ·TWX 510-956-9412
Pllll I lpl h1: P.O. Box 253· Morrisville, PA 19067· C215l 547-1092 1..aMet1: 76 Shoe Lane· Suite 307 ·London, England EC4A3J8 · 01 -353--6621 C - · : Esquina Oe Madrices-Centro · Edificio Lilue #82 ·Caracas, Venezuela· Telephone C5&2l 81-95-74
DteCl'lllul:ml Illy: Amfax Communications, Inc. · Suite 203 · 49 Pleasant St. · S. Weymouth, MA 02190 · C617l 337-3415 Canfax Communicat10ns. Inc. ·Suite 6 · 8180 Devonshire· Mt. Royal. Que. H4P 2K3 · C514l 737-8696
CIRCLE 80 ON INQUIRY CARD
" 1980 Telcon Industries. Inc.
AROUNC THE IC LOOP
Single LSI Chip Operates as Universal Analog Controller
Said to be the industry's first monolithic LSI universal analog controller, a chip from Signetics Corp, 811 E Arques Ave, Sunnyvale, CA 94086, is aimed at industrial applications where closed loop control of machine speed and acceleration is required. These would include conveyer systems, web infeed for plastic film or paper, wire reel take-up, programmable acceleration, deceleration and speed control of single or multiple ac and de motors, and similar process control installations. Electronic equipment applications would include such uses as magnetic tape transport control and rigid and floppy disc controllers.
The NE5522N includes a frequency to voltage converter, an internal
reference oscillator, a D-A converter, an IIL encoder-decoder, and 256-bit F-V de level data storage.
This device offers programmable operation modes which can be selected by analog input command. Available modes include on, positive ramp and hold, compare to set memory, memory erase, set memory, and off. No external analog to digital converter is required.
In performance of the closed loop control function, an ac tachometer frequency representing a machine speed is fed into the controller. There, after being processed by the onchip F-V converter, it is compared with an internal reference voltage. An error signal is then generated which governs the corrective response of the output. The
output function consists of three buffered open collector transistor ports which provide gating and on-off commands to peripheral circuitry, An analog error output is also available for interface with linear control systems.
The 256-bit memory makes it possible to modify the sequencing mode during normal operatiof!, while retaining previously set information. Programmable command delay allows response time of command inputs to be adjusted in order to eliminate effects of switch bounce and unwanted noise.
System gain, frequency, sensitivity, and ramp rate are all adjustable, with the o~chip memory and the DAC able
COMMAND MOOE CONTROL MEMORY
F-V
F-V
F-V
F-V
B & C CONTROL VOLTAGE VOLTAGE
IN
CAP
FILTER
OUT
VOLTAGE CURRENT SET OUTPUT
8
IO
11
15
14
osc 5
CLOCK OSCIUATOR
COMMAND DHAY
CONTROLLED DELAY
COMMAND INPUT
COMMAND DECODER
ERROR AMP
19. GNO
~ GNO 24
7 ~ BIAS SffilNG RESISTOR L....J~
OUTPUT 3 DISABLE
12
THRESHOLD OET£CTOR
VOlTAGE REF
Vee 13 0 - - - - 0
23
22
OUTPUT 3 OUTPUT 2
21 OUTPUT I
19
AMP OUT OEAOBANO
OUTPUT
20
18
+IN -IN
16 VERROR
Universal analog controller, NE5522N, from Signetics is implemented in LSI. Chip is used for industrial applica· tions involving closed loop control of machine speed and acceleration
160
COMPUTER DESIGN/JULY 1980
e e
Everyday
brings about a new computer or new use for keyboards. Naturally, Jhe larger the demand, the larger the number of companies trying to meet that demand. Choosing the right supplier for your keyboard needs can be a hit or miss proposition. Unless you choose Fujitsu.
Our rellablllty Is known and trusted throughout the world, because Fujitsu doesn't depend on what someone else thinks Is good enough. We manufacture every part of our keyswltches and keyboards. From key tops to contacts to the keyboard system. That makes for tight quality control every step of the way. And that
makes for a more rellable keyboard.
Fujitsu rellablllty also comes from experience. Fujitsu computers are In use worldwide. We know
our keyboards will work for you because they work for us. Auto-
mated production Insures a stan-
dardized product. Fujitsu Insures
that Ifs dependable.
As far as service, Fujitsu considers It a point of pride, as well as good business, to cater to your company's needs before, during
and after the sale. We custom , build to flt your design needs for layout, keying, coding and slant. Our
warehouse Is stocked to supply your company with samples. Large orders come di-
rectly from the factory. And Fujitsu can match any source's lead time for processing and
shipping. Fujitsu keyswltches
and keyboards are available In mechanical, reed, hall effect and capacltant modes. Our flat, lowproflle keyboards give valuable tactile and audio response to
touch that most membrane type keyboards don't.
Considering everything we have to offer, Fujitsu could just be the key to your keyboard needs. Quallty, rellablllty and service are part of our product.
For more Information on our superior components, call or write us.
11111111111111111111111111111111111111111111111111111111111111111
FUJITSU
11111111111111111111111111111111111111111111111111111111111111111
FUJITSU AMERICA, INC.
Component Sales Division 910 sherwood Drive-23,Lake Bluff, IL 60044 (312) 295-2610, Telex : 206196, TWX 910-651-2259
CIRCLE 81 ON INQUIRY CARD
AROUNO THE IC: LOOP
to operate at up to 100 kHz to accommodate rapid command input sequencing. Chip size is 130 x 170 mil, with packaging provided in a 24-pin DIP.
A typical operation sequence might be to bring a motor up to speed using the program accel mode. This would
be accomplished by setting pin 3 (command input) to approx 0.55 V cc· A ramp function determined by R20·Cl I (pins 14, 15) then automatically programs the error system to drive up at a fixed rate. Once the desired speed is reached, a voltage of 0. 75 V cc is
momentarily impressed on the command input and the motor speed will then be controlled to stay at that level previously programmed in memory. Note that a voltage level of l. l Vcc must be applied momentarily to the command input (pin 3) upon initial turn on in order to enable the device.
The nominal supply voltage is 8.2 V
with a range of 7.4 to 9 V allowed. Current drain is nominally 20 mA for an 8.2-V supply. Temperature is limited to a range of 0 to 70 °C in operation and - 65 to 150 °C in storage.
Circle 501 on Inquiry Card
Philips Laboratories are known throughout the world for their high technology research in the electronics and electrical engineering fields. With the forward view of contributing to the advancement of scientific knowledge in these areas, we offer an extensive range of challenging projects to our engineers and scientists. Our exceptional research
environment supports innovative thought with the freedom and recogni-
tion it requires.
At present we have a position available in our Compqter Systems Research Department for a talented individual with several years experience in
the relevant areas.
The position entails research in the computer aided analysis of digital
LSI/VLSI circuits with the view toward definition, development and validation of macromodels at the gate, register and
functional block levels for simulation purposes. Enhancements to the existing
hybrid and timing simulators for the bipolar, MOS, l2L and Schottkey tech-
nologies.
Candidates will have familiarity with the logic and circuit simulation concepts, and have hands-on experience in
using a digital logic simulator. Knowledge of concepts of timing and hybrid simulation of IC LSI circuits is a definite plus. Applicants with MS/PhD in Electronics and Computer Science
will be given preference.
Located on a 100 acre site in Briarcliff Manor, NY, 30 miles from NYC, the Laboratories offer views of
the Hudson and a proximity to numerous state parks and extensive mountain areas to the north for outdoor
recreational activities.
We offer a competitive salary and excellent benefits package including a relocation allowance. If you are in-
terested in joining our select team of research and development professionals,
please send resume including salary history in complete confidence to Direc-
tor of Personnel, Philips Laboratories, 345 Scarborough Rd, Briarcliff Manor,
New York 10510. An Equal Opportunity Employer M/F
Philips
Laboratories
162
CIRCLE 82 O N I NQU IRY CARD
Bus Transceivers Implemented in CMOS
Designed for high speed asynchronous 2-way communication between data buses, a pair of octal bus transceivers from Mite! Semiconductor, PO Box 13089, Kanata, Ottawa, Ontario K2K lX3, Canada, are implemented using a proprietary low power, high speed CMOS process. Each device contains two sets of octal buffers connected in parallel, ~nd incorporates dir ection control logic. The MD74C2 45A is specified for operation over a temperature range from -40 to 85 °C, the MD54C245A from -55 to 125 °C. Packaged in 20-pin DIPs, the devices are pin-for-pin compatible with 74LS245 and 54LS245 transceivers.
While offering the fast propagation speeds and functional features of their low power Schottky, pin-for-pin counterparts, they possess noise immunity and negligible CMOS power dissipation. The devices are full y functional over an extended voltage supply
range of 3 to 6.5 V. Three-state out-
puts permit driving of multiple TTL lo.ads, while the inputs have th e advantage of CMOS high impedance.
Typical parameters include a power consumption of 50 µ.W, port-to-port speed of 15 ns, enable-disable tim es of
> 24 ns, and output rise-fall tim es 15
ns. Absolute maximum ratings require
that supply voltage, Vcc· stay between
-0.5 and 7.0 V, and that input voltages stay between -0.3 V and V cc
+ 0.3 v.
Circle 502 on Inquiry Card
COMPUTER DESIGN /JULY 1980
AROUNC THE IC LOOP
Processor Chip Synthesizes Speech From ROM Data
A speech processor chip (SPC) from National Semiconductor Corp: 2900 Semiconductor Dr, Santa Clara, CA 95051, can access up to 128k bits of speech data, stored in read only memory. The storage of spoken sequences is offered on a cµstom basis by the manufacturer. As many as 256 separate addressable expressions are digitized and compressed from high quality reel to reel tapes provided by the customer. Stored with the speech data are the frequency and amplitude data required for speech output.
The final product delivered to the customer is a kit that includes the processor chip and one or more ROMs containing the digitized words or phrases. When these elements are combined with an external filter, amplifier, and speaker (as in the figure), the result is a speech synthesis system which generates high quality speech, including the natural inflection and emphasis of the original speech. The basic 128k-bits of .accessible speech data can be expanded with minimum external logic. An interrupt is generated at the end of each speech sequence, so that several sets of words or phrases can be cascaded to form different speech expressions.
This is a .completely independent system, not requiring a processor controller. It is designed to be easily interfaced to most popular microprocessors. Other characteristics include communication with either static or clocked dynamic ROMs, TTL compatability, MICROBUSTM compatability, onchip switch debounce for interfacing to manual switches, and the use of either a crystal-controlled or externally driven oscillator. The system provides the ability to store silence durations for timing sequences. Uses for the system are found in applications such as telecommunications, clocks, language translators, and annunciators. Since the system is not constrained by the kind of microprocessor used, it is generally adaptable to a wide variety of applications. The bus interface is simple enough to be han-
-----
l
Vss ADR
l -14
ADDRE SS
BUS
SW l -8 RDATA l -8 DATA BUS
INTR SPC ROMrN CHIP ENABLE'
Vss vet
SPEECH CE ROM
I I
I
I
CM S
cs DSC DSC
I I
- - - ' SPEECH IN
OUT
I
- - -----
DIGITALKER KIT
l.5k n
' DNLY REQUIRED FDR CLOCKED DYNAMIC ROM S
FILTER AND AM PU Fl ER
SPEAKER
Speech synthesis system from National Semiconductor uses speech processor chip (SPC) and ROM to generate up to 256 addressable expressions. External filter, amplifier, and speaker are added for complete system, DigitalkerTM, able to synthesize men's, women's, and children's voices
died by low cost microcontrollers, such as those in this manufacturer's COPsTM family.
Absolute maximum ratings for the n-channel MOS speech processor chip
limit VDD - Vss and also voltage at any pin to 12 V or less. The allowable temperature range is 0 to 70 °C in operation and - 65 to 150 °C in storage.
Tone Encoder Chip Offers Oscillator Mute, Single Contact Keyboard
A CMOS chip from lntersil, Inc, 10710 N Tantau Ave, Cupertino, CA 95014, functions as a 2-of-8 sinewave tone encoder for use in telephone dialing systems. The ICM7206C TouchtoneTM encoder combines the oscillator mute and single contact keyboard features of two earlier chips in this encoder family.
This circuit contains a high frequency oscillator, two separate programmable dividers, a D-A converter, and a high level bipolar output driver. The
reference frequency is generated from a fully integrated oscillator requiring only a 3.58-MHz color TV crystal. This frequency is divided by 8 and is then gated into two divide-by-N counters (possible division ratios 1 through 128) which provide the correct division ratios for the upper and lower band of frequencies. The outputs from these counters are further divided by 8 to provide the time sequencing for a 4 voltage level synthesis of each sinewave. Both sinewaves are added and buffered to a high current output driver, with provisions made for up to two external capacitors for low pass filtering, if desired. Output distortion
164
COMPUTER DESIGN/JULY 1980
- - - - - - - - -- -
AROUNO THE IC LOOP
osc
osc
OSCIUATOR
LOW BAND +N
v. <>---;J<}--o v-
6.4 v
OUTPUT
CONTROL LOGIC
HIGH BAND +N
4 XCOLUMNS...___........
DISABLE
lntersil 's ICM7206C touch tone encoder. Onchip elements include oscillator, programmable dividers, DAC, and output driver
is only 2 to 3% with simple filtering, decreasing in value with ascending harmonic frequencies.
The oscillator mute capability, a characteristic which this chip shares with the earlier ICM7206B, means that the oscillator will be on only during the time that a row is enabled (a key depressed). An n-channel open drain
v- FET with its source tied to provides
the disable output. The single contact keyboard feature is found in the earlier ICM7206, and, like that chip, this one can use a 3 x 4 or 4 x 4 keyboard.
Output drive level of the tone pairs will be approximately -3 dBV into a 900-0 termination. Skew between the
high and low groups is typically 2.5 dB without low pass filtering. The device will operate with supply voltages as low as 3 V, and dissipates less than 5.5 mW at 5.5 V.
This chip can generate either single or dual tones, suitable for use with telephones, for keyboard entry of numerical data, and similar applica· tions. Oscillator startup time is only 5 ms, and a multiple key lockout is pro· vided. The device is available from stock in either 16-pin plastic DIPs or in die form.
TMTouchtone is the registered trademark of AT&T.
Circle 503 on Inquiry Card
sample based on previous ones. LPC is a technique of analyzing and syn· thesizing human speech by determin· ing from original speech a description of a time varying digital filter modeling the vocal tract. This filter is excited by either periodic or random in· puts. An onchip 8-bit digital to analog converter transforms digital informa· tion processed through the filter into synthetic speech.
Periodic inputs to the filter are used to reproduce voiced sounds which have a definite pitch such as vowel sounds, or voiced fricatives such as Z, B, or D. A random input models unvoiced
sounds such as S, F, T, and SH. The
speech synthesis chip uses two separate models to generate the voiced and unvoiced excitation.
Codes for 12 synthesis parameters (10 filter coefficients, pitch and energy) serve as inputs to the synthesizer chip. These codes may be stored in ROM and, once decoded by Qlli:hip circuitry, represent the time varying description of the LP.C synthesis model.
The onchip filter is an advanced design single-stage filter which implements a 10-stage lattice with an integrated array multiplier, an adder coupled to the multiplier output, and various delay circuits coupled to the adder output. With this computational sequencing capability and a fast continuous data transfer rate, the multiplier can accept 2 inputs every 5 µ.s . Twenty multiply and accumulate operations are needed to generate each speech sample, and the circuit can generate up to lOk speech samples per second.
Circle 504 on Inquiry Card
Speech Chip Set Includes 1 28k ROM And Synthesizer Chip
Texas In struments Inc, PO Box 1443, Houston TX 77001, has announced a series of speech-processing computer chips (TMS5000) and a series of compatible storage devices (TMS6000). Initial products being offered are the TMS5100
Isolation Amps Feature Low Cost
single-chip synthesizer and the TMS6100 PMOS 128k read only memory. A chip set, including synthesizer and ROM, provides 100 words (100 s) of syn· thetic speech.
Speech encoding on the speech syn· thesis IC is achieved through pitch excited Linear Predictive Coding (LPC), utilizing a linear equation to formulate a mathematical model of the human vocal tract and predicting a speech
Two isolation amplifiers announced by Analog Devices (Rte 1 Industrial Park, Norwood , MA 02062) pr ov id e ± 1500-Vdc continuou s isolatio n , 100-dB common mode rejection (min, at 60 Hz), single-supply operation from 8 to 15.5 V, and nonlinearity of ±0.1 % typ. Priced from $49 in quan· tities of 1 to 9, and $30 in lOOs, the devices also provide ± 13-V power, iso· lated to ± 1500 V, for floating fro nt· end signal conditioning circuitry. No
166
COMPUTER DESI GN/JULY 1980
b_DEN 2-C
It's fast. Simple. Reliable. Accurate. In fact, it's the ultimate interface for your data terminal and communications equipment
employing serial binary data exchange.
.Belden's new 25.conductor molded cable assemblies are designed and built to meet EIA standard RS-232-C and types A through M standard interfaces.
BLIES
These are cables you can count on. Belden's rugged 8459 cable (UL style number 2576} is used in these assemblies. This cable also passes the FR-1 vertical flame test and is
the preferred cable for critical interfaces. And positive pin-to-pin mating using subminiature "D" type plug connectors means no mix-up.
Complete cable assemblies are now in stock in four standard lengths of up to 70' {21m}. Bulk
cable is available in put-ups of up to 1000'.
Custom designed assemblies are also available on special request. Belden
Corporation, Electronic Division, P.O. Box 1980, Richmond, IN 47374;
319-983-5200. Out West contact our Regional Sales Office in Irvine, CA
714-833-7700.
NOWIN STOCK
© 1979 Bel den Corporation
BELDEN@
' Coming thTough...
0 with new ideas for moving electrical energy
8-15-9A
CIRCLE 85 ON IN9UIRY CARD
AROUNO THE IC LOOP
100 kn GAIN = I + I kn + R, (kn ) (I VIVTO JOO VIV)
HI OUTPUT
LOW OUTPUT
100 kHz
-J osc INPUT O (292A ONLY)
Isolation amplifiers 290A and 292A from Analog Devices. Carrier isolation technique is used to transfer both signal and power between amplifier's guarded input stage and rest of circuitry
POWER COM
external de-de converter is required as in optically coupled designs. The devices are available from stock.
Model 290A has a self-contained oscillator and is intended for singlechannel applications. The 292A is designed for multichannel applications. A single external synchronizing oscillator can drive up to 16 of the multichannel devices or a virtually limitless number of these can be configured using multiple oscillators. The user can supply the external oscillator circuit or specify model 281 oscillator module, which includes a voltage regulator for operation over a wide single supply voltage range of 8 to 28 V.
These devices offer complete galvanic isolation and protection against damage from transients and fault voltages in data acquisition systems, computer interface systems, and ·high CMV instrumentation. Other applications include process control, measurement and control systems, and (generally) the measurement of offground signals, especially in noisy environments.
Additional features include a gain range of 1 to 100 VIV which is set with
a si ngle external resistor, high reliability with a calculated MTBF exceeding 400k hours, low offset voltage drift of 10µ.V/°C, referred to input at a gain of 100 VIV, and small size of 1.5 x 1.5 x 0.62" (38 x 38 x 16 mm). Input noise is 1 µ.V pk-pk (10-Hz bandwidth, G = 100 VIV), nonlinearity is ±0.l % at 10-V pk-pk output, and 1/0 dynamic range is 20 V pk-pk. The operating temperature range for rated perfor-
mance is - 25 to + 85 °C.
Circle 505 on Inquiry Card
Industry-Standard RAMs Announced by Two Sources
Two companies that produce static random access memories have announced additions to their lines with industry standard 2114 RAMs. One of these is GTE Microcircuits, 2000 W 14th St, Tempe, AZ 85281. The other is OKI Semiconductor, 1333 Lawrence Expy, Suite 401, Santa Clara, CA 95051. In common with 2114 RAMs in
general, all of the new memories are organized as 1k x 4, operate off single 5-V supplies, and provide fully static operation without clock or refresh. They provide directly TTL compatible 110, a common 1/0 bus, 3-state outputs, and packaging in an 18-pin DIP.
High Reliability RAMS
GTE's announcement describes the high reliability M2114·3MA, which has a 300-ns access and cycle time, and which (although not screened to MIL· STD-883) operates over a temperature range from - 55 to 125 °C. The company has been producing another high reliability version of the 2114 since September 1978. Designated the M2114-UMA, that device has an access and cycle time of 450 ns. Both RAMs use a power supply current, Ice> of 100 mA (max). These memories are intended for use in applications where operational integrity is essential. They are especially recommended for any space, military, or commercial aircraft application where replacement is difficult and reliability is imperative.
Circle 506 on Inquiry Card
168
COMPUTER DESIGN/JULY 1980
Computer Sciences
Corporation
"Digital Thought Transference"
There appears to be no· practical limit to CSC growth in advanced communication systems, or to the numbers of engineers we seek who understand digital circuit switching from a system.viewpoint·.· who can generate requirements from customer ~n puts... who can conceptualize the systems..· who can peg them to the realities of size, trade-offs, and, in many cases, to turnkey deliverables.
Today, at the Systems Division of CSC, you'll find some of the world's biggest and most sophisticated
communication systems under development, including military and non-military systems. As im-
pressive as they may be, communication systems are only part of the picture of opportunity y~u·n find here. Engineering and engineering-related assignments and tasks including those listed below represent immediate and exciting opportunities:
Spread Spectrum Communications Digital Communications Systems Data Networks & Protocols System Control Real-Time Systems Hardware/Software Interface Management & Planning Software Verification & Validation
Message Switching Satellite Communications Transmission & Communications Processing Interoperability Systems Testing Hardware Requirement Analysis Systems Acquisition Training: Plans & Evaluation
For a prompt response, mail your resume in full confidence to the Director of Professional Staffing, MC/218-GO
CBC
The only limitations are the ones you bring ~th you.
An Equal Opportunity Employer M/F/ H
SYSTEMS DIVISION
6565 Arlington Boulevard Falls Church, VA 22046
CIRCLE 86 ON IN(j)UIRY CARD
169
AROUNO THE IC LOOP
Low power versions have also been announced in both the 300- and 450-ns configurations. Designated the N2114-3MA and N2114-UMA, these low power devices typically dissipate only
375 mW, with max Ice of 75 mA, and are screened to the requirements of MIL-STD-883.
Fast Access Times
The three memories announced by OKI provide max power dissipation of 370 mW. They are the 2114L-2 (200-ns max access time), 2114L-3 (300-ns max access
mx PERPHERALS
Division of GAW Control Corp.
150 New York Avenue , Halesite, NY 11743 (516) 423-3232
CIRCLE 87 ON INQUIRY CARD
time), and 2114L (450-ns max access time). Direc tly interchangeable with all standard 2114L parts, these RAMs are available for immediate delivery beginning at $5.45 (for the 450-ns part) in 100 plus quantities.
Circle 507 on Inquiry Card
BiMOS Op Amps Combine MOS, Bipolar Advantages
A series of operational amplifiers from RCA Electro-Optics and Devices, Rt e
202, Somerville, NJ 08876, features
gate-protected MOS/FET (PMOS) input transistors for high input impedance (10 12 0 typ) and a wide common-mode input voltage range, and bipolar and MOS output transistors for a wide output voltage swing and high output current capability. The CA080 is an extern a ll y phase compensated single amplifier; the CA081 is an internally compensated single amplifier; and the CA082 and CA083 are internally phase compensated dual amplifiers. All but the -082 have provisions for external offset nulling.
Combining the advantages of MOS and bipolar transistors on the same monolithic chip, these op amps are said to be improved equivalents of the industry standard TL080 BiFET series. Applications include inverters, high-Q notch filters, IC preamps, unity gain absolute value amplifiers, sample and hold amplifiers, and active filters.
Typical parameters include an input bias current of 15 pA, input offset current of 5 pA, slew rate of 13 V/µs, unity-gain bandwidth of 5 MHz, and equivale nt input noise voltage of 40 nV/v'iiz: Input offset voltage has a typ value between 2 and 5 mV, depending on model variations within each of the four principal types.
The devices are supplied in a variety of package options, including the 8-lead plastic DIP (Mini-DIP), the 14-lead DIP, the 8-lead T0-5 style, the 8-lead T0-5 style with dual-inlin e formed leads (DIL-CAN), and in chip form. Operating temperature range is either 0 to 70 °C or -55 to 125 °C, depending on model. Absolute maximum ratings limit de supply voltage to ± 18 V, differential input voltage to ± 16 V, input voltage to ± 15 V, and input current to 1 mA.
Circle 508 on Inquiry Card
COMPUTER DESIGN/JULY 1980
Meet the IMPs. A pair of stylish 3 1/2 inch high impact printers that will look great on any desk.
Styled for desk top use, these sleek units stand just 3V2 inches high, yet the unique fan-cooled printing system can knock out 80, 96 or 132 columns of crisp hardcopy with continuous throughput of one line per second .
A winning pair. IMP-1 , with friction feed, can make multi-copies on plain 8V2 inch wide paper, or on teletype
rolls. In addition, IMP-2 h~s tractor feed and full forms control , with tractors adjustable from 1inch to 9V2 inches.
Interfaces abound. All !MPs have Centronics parallel
and RS232C/20mA serial inputs as standard equipment. But if you need something different, then we make interfaces for just about any system-high speed serial, Apple , Pet, TRS-80, IEEE 488 ...
Versatile, too. 96 ASCII character set is standard . And
.you can select 6 character sizes, even graphics, under software control. Options include 2K buffering and special character sets.
Servic.e - a big difference. No other printer
manufacturer offers Axiom's combination of low cost and nation-wide service and distribution - in the USA and eighteen overseas countries.
Pssst - the pric.e!!! It's low. $695 for IMP-1 . $795 for
IMP-2. And that's the single unit price .
Better phone , write or mail the bingo card today!
AXIOM AXIOM CORPORATION
5932 San Fernando Road, Glendale, CA 91202 Tel: (213) 245-9244 ·TWX: 910-497-2283
CIRCLE 88 ON IN9UIRY CARD
171
AROUNO THE IC LOOP
Two-Chip Codec Set Includes Filters
AUTO ZERO 1------0 Al_ FILHR
TEST MOOE
STROBE 0 - - - - - 1. . (8 kHz)
Fl~~: o----~
r-;;o-u:;T;;P;;U:;T;--1.....+--l---0 SHIFT CLOCK
BUFFER '-------L!!_!RE~G l~ST.E:!R!...J'-H--o PCM OUT
Voo 0-----.-
Vss 0-----.ANAi~ 0-----.-
8 kHz OUT (PROBE PAO)
- - - - - - - - - - - - -----+-+---O OUT CONTROL
,---,..-1-J_--o ASIG IN
.... L~::.::...._r - - o B SIG IN
0IGriT~ 0-----.-
POWER DOWN
LOW PASS FILHR
Voorn o . - - - - t WSIN XIX
COR RECTION
~---~ AI B SELECT (AIB OUl)
,- -, - - - - - - - - - - - - - - - -
I
I
128 kHz
=<f STROBE <>----+!
PHASE LOCKED LOO P
~---i---0 SHIFT CLOCK PCM IN
IN VoorL
POWER DOWN 8 kHz
+ ':' ....__,(P_R-'-OB~E_PA_O')--_ _ _ _ _ _ __ _ _E_NA_B_LE~
I I
,- -- - - ----- - - --I
Voo c r - -
Vss c r - DIGri~~ e r - ANA~~ e r - -
L.----~.r--------------<1--<>Boor A/ B SELECT
' - - -- -- - - - - - - - - - - O (A/ B IN)
' - - - - -- - - - - - - - - - - - - - < > POLARITY (GND OR V5s)
CMOS companding encoder (S3501 , upper diagram) and decoder (S3502, lower diagram) from AMI constitute 2-chip codec set with onchip filters. Set meets or exceeds AT&T 03 and CCITI G.711 and G.733 specifications
A 2-chip CMOS codec se t is partitioned into the 53501 encoder on one chip and the 53502 decoder on the other, ea ch incorporating onchip filters. These circuits, from American Microsystems,
Inc, 3800 Homestead Rd, Santa Clara, CA 95051 , form a companding set designed to implement a per channel voice frequency coding conversion fo r PCM channel banks and PABX systems
requirin g a µ-255 law tran sfe r charac teristic.
Eac h chip contains two sections, a band-limiting filter and an ADC or DAC that conforms to µ-2 55 requirements.
172
COMPUTER DESIGN/JULY 1980
AROUNO THE IC LOOP
Transmission and reception rates of 8-bit data words containing analog information can be arbitrary up to 32Mbits/s, with analog sampling at a nominal 8-kHz rate.
To reduce the pin count of their packages and facilitate machine insertion of the devices into PC boards, both ch ips generate all internal timing signals in a phase lock loop which uses the externally supplied 8-kHz strobe signal. This feature also simplifies an OEM's PC board design.
The 18-pin encoder chip includes a band-pass filter with D3 filter chara cteristics, an ADC that implements the µ-255 law, control logic for CCJS and D3 signaling, an autozero loop which effectively nulls long term offsets in a system, and an uncommitted op amp for gain trimming and antialiasing. This device needs only one reference voltage and two noncritical power supplies ( ± 5 Vde, typ).
A sixth-order low pass elliptical filter followed by a third-order Chebyshev high pass filter constitute the band limiting filter . Loss below 65 Hz is at least 25 dB, which minimizes power and frequency induced noise . The ADC uses charge redistribution techniques to perform conversion, through a binary ratioed capacitor array and a linear resistor string.
Included in the 16-pin decoder chip are a DAC, a low pass filter with sin XIX correction, CCIS and D3 control logic, an uncommitted low impedance op amp for direct drive of a 600-0 load and optional TTL or relay drive from the AIB signaling output. Its reference voltage and power supply requirements are identical with those of the encoder chip.
Both chips feature automatic power down in the absence of the 8-kHz strobe. If their phase lock loops sense an unlocked condition, the chips are forced into the power down mode automatically, to minimize power dissipation. Standby power dissipation is 15 mW per chip , vs typical operating power dissipation of 70 mW for the encoder and 55 mW for the decoder . D
Circle 509 on Inquiry Card
Windjammer® blowers provide multi-function
working air
40 80 120 160 200 240 280 320 360
AIR FLOW - CFM
One air system for pressure, vacuum or both
Windjammer high-performance blowers supply vacuum and/or pressure for a wide variety of jobs. Typical applications include tape transports, card sorting, vacuum hold down, air sampling and cooling .
These blowers are designed specifica41y for environments where high noise levels would be objectionable and
feature carefully balanced components. They can be supplied for belt drive or complete with motor.
Lamb Electric engineers can work with you to develop a Windjammer system tailored to your requirements. And, we can schedule quantity deliveries to meet your production requirements. Contact AMETEK, Lamb Electric Division, 627 Lake Street, Kent, Ohio 44240. (216) 673-3451.
.AMETEK LAMB ELECTRIC DIVISION
CIRCLE 89 ON INCj)U I RY CARD
173
PRODUCTS
High Performance Minicomputer Houses CPU and Magnetic Peripherals in Single Cabinet
The Harris 80 minicomputer system is made up of a 24-bit word length CPU with l 92k bytes of error correcting memory, an SOM-byte Winchester disc drive, and a low profile magnetic tape unit-all in one cabinet. As many as 8 disc drives and 4 magnetic tape drives, on one controller for each group, and up to 32 interactive terminals can be included in an expanded system. Both the company's existing software and the VULCAN operating system can be used. An operator console CRT provides a communication link between operating system and operator.
Operating Features
Bus transfer rate for the CPU is up to ' 19M bytes/s with 48 data lines plus 18 address lines. Address bits allow access to all of main memory by any subsystem using the bus.
Real memory expands from l 92k to 768k bytes, and a hardware supported virtual memory system provides over 6M bytes of space, with both hardware and software memory protection. Each program page in memory is protected against access or inadvertent destruction by another concurrently executing program; and pages containing instructions aI\d constants, as opposed to variable data, are hardware write protected, even within the same program.
Virtual memory in this system does not require reorganizing or compacting since a program does not have to occupy contiguous memory pages. Any physical page not occupied by the operating system can hold any logic.al page.
Each module of main memory contains its own timing and control logic and reads or writes 48 data bits plus error correcting bits in one 400-ns memory cycle. Access time is 290 ns. The 48-bit system bus data path provides high speed, direct memory access (DMA) input/output (110) between each memory module a.nd universal block channels (UBCs).
Up to 24 logical 1/0 channels interface the central system bus to device controllers. The UBC is a block mode DMA channel for peripheral controllers. In scan mode, a UBC supports two concurrent 110 operations; in scanlock mode, it operates as a single DMA channel. In addition, the UBC functions as a programmed 1/0 channel transferring data under CPU/program control between a CPU register and the channel. A 48-bit data buffer is contained for each logical channel.
An optional scientific arithmetic unit provides concurrent floating point arithmetic operations independent of the CPU. Double-precision (48-bit) floating point uses an 8-bit signed ex-
ponent and 39-bit signed mantissa, resulting in over 11 decimal digits of precision.
Software
VULCAN, a priority structured, demand paged, multiprogramming operating system, concurrently supports multistream batch processing, interactive timesharing, data base management, remote job entry, and realtime operations. This operating system works with paging hardware to monitor and direct memory allocations.
Support is 9rovided for nine languages, five programs, a programmable interactive command language, five remote job entry and two remote batch terminal packages, and a data base management system with an information retrieval system. The languages supported are an extended BASIC language processor, FORTRAN IV compiler, FORTRAN 77 compiler, extended 1974 ANSI COBOL compiler, APL interpreter, RPG II compiler, macro assembler, SNOBOL 4 interpreter, and FORGO (load-and-go FORTRAN). Support programs consist of a sort/merge package, VULCAN indexed sequential package, system accounting, cross reference, and VULCAN symbolic debugger. (continued on page 176)
174
COMPUTER DESIGN/JULY 1980
High-Speed Static RAMs . ..
2147s with lower power consumption. Available in volume. Now.· From Tuxas Instruments.
Now your reliable second-source for industry-standard 2147s is even better.
Because Tl's 2147s consume less power than before. About 27% less.
And they're fast. We've got a 55-ns TMS2147-5. The TMS2147-7 and the even lower standby power TMS21L47-7 clock in at 70 ns.
High speed. Low power. Good availability. An unbeatable combination. For all your buffer/cache, process control, visual display and a wide range of other
high-speed memory applications. For mainframes and minis and micros.
For optimum cost/performance effectiveness, Tl's 2147s are manufactured using improved state-of-the-art SMOS (scaled MOS) N-channel technology.
Each device in the TMS2147 series is
Device
TMS2147-5 TMS2147-7 TMS21L47-7
Max Access (ns)
55 70 70
Max Power (mW) Active Standby
715
165
632
110
632
55
offered in a high-density, 300-mil, 18-
pin DIP. Pinout is industry standard 4K
x 1 static RAM.
Improved 2147s from Texas Instru-
ments. Available in production quanti-
ties. Now. Call your nearest TI field
sales office or authorized
distributor_
For more information, write to Texas Instruments Incorporated, P.O. Box 1443; MIS 6965,
Fifty Years Innoovfation ·
~
Houston, Texas 77001.
TEXAS INSTRUMENTS
© 1980 Texas Instruments Incorporated
INCO R PO RATE D
CIRCLE 90 ON INQUIRY CARD
85137
175
Use MegallnkTMfor
1 Megabit/sec OMA transfer between as many as 255 DEC and Intel processors on local networks up to 32,000 feet long.
· Q bus, Unibus, and Multibus compatible units plug directly into DEC and Intel backplanes.*
· Multidrop operation of different processors on single coaxial cable for distributed networks.
· Integral 1 Megabit/sec FSK modem is immune to baseband noise.
· Software compatible drivers available. · SDLC protocol implemented in hardware.
Call Garry Stephens today at (203) 544·9371, or write now for specifications of Megalink OMA Interface Units.
computrol
15 Ethan Allen Highway Ridgefield, CT 06877 (203) 544-9371
·oEC, Q bus, end Unibus are trademarks of the Dig/tel Equipment Corporation. Intel end Multibus ere trademarks of the Intel Corporation.
176
CIRCLE 91 ON INQUIRY CARD
Technical Specifications
Data transfer rate for the disc subsystem is 1.2M bits/s. Access times are 55 ms max, 30 ms avg, 7 ms min; latency times are 16.7 ms max, 8.3 ms avg. The automatic loading magnetic tape subsystem uses a 7 to 10.5" (17.8 to 26.7-cm) reel, features a phase encoded (IBM and ANSI compatible) recording mode, and has a 9-track, 1600 char/in (630/cm) data density. Tape velocity is 25 in (63.5 cm)/s in read/write mode, 100 in (254 cm)/s rewind .
Electrical requirements for a singlecabinet configuration of CPU, memory, and channels are 230 or 208 Vac ± 10%, single-phase, 4-wire (std) or 220/240 Vac, single-phase, 3-wire (op· tional); 60 ± 3 Hz (std) or 50 ± 3 Hz (optional), and 12 A rms at 230 V (max). Temperature ranges for CPU, memory, and channels are 50 to 113 °F (10 to 45 °C) operating at 20 to 80% relative humidity non-condensing and 32 to 122 °F (0 to 50 °C) storage at 20 to 90% RH. Forced air cooling is provided by internal fans on each chassis. Altitude limitations are -1000 to 6000 ft ( - 300 to 1830 m) operating and -1000 to 15,000 ft (- 300 to 4570 m) storage. However, limitations on currently used disc and magnetic tape subsystems cause effective temperature ranges to be 50 to 95 °F (10 to 35 0 C) operating and 40 to 122 °F (4.4 to 50 °C) storage and . the operating altitude range to be sea level to 6000 ft (1830 m).
Price and Delivery
An entry level Harris 80 minicomputer consisting of CPU, l 92k bytes of main memory, SOM-byte Winchester disc subsystem, single magnetic tape subsystem, and cabinet plus a separate terminal is priced at $74,950. OEM discounts are available on this and expanded configurations. Deliveries will begin in November of this year. Harris Corp, Computer Systems Div, 2101 W Cypress Creek Rd, Ft Lauderdale, FL 33309. Tel: 305/974-1700.
For additional information circle 199 on inquiry card.
COMPUTER DESIGN/JULY 1980
llllAllllTY: 28.000 hr. Mllf. ICOllOMY: .035 cents per bil.
When it comes to speed , reliabil ity and low cost , systems users
in 25 countries in every continent of the world depend on the
VRC 4016 head-per-track memory.
It features a fail-safe actuation system that eliminates the poten-
tial of media damage and data loss. It's compact and lightweight.
All electronics , drive components and head retraction system
are mounted outside the drum , making service simple and
eliminating risk of contamination .
Applications are endless. Telecom ·arid message switching ,
process control of all kinds, geophysical exploration, power gen-
eration , news editing , typesetting . Wherever low cost-per-bit, fast
access and high data storage capac ity are required.
For proven reliability, worldwide support, field service and
predictable high quality, you can rely on VRC .
Write or call for complete details
on the Model 4016 head-per-track memory ... asimple, rugged , com-
VerrnontR.esearch
CORPORATION
pact unit to improve the reliability of your system.
Precision Park North Springfield , Vermont 05150 Tel. (802) 886-2256 , TWX: 710-363-6533 FAX (802) 886-2682
CIRCLE 92 ON INQUIRY CARD
CAPACITY ... 37. 9 million bits BIT RATE ... . 4.33 MHz ACC ESS TIME 8.5 m/sec. DI MENSIONS Heig ht - 12%'' (31 .2 cm.)
Width - 17W' (44 .5 cm .) Depth-22" (55 .9 cm .) MEAN TIME TO REPA IR . . Less than 1 hr.
177
PRODUCTS
Bubble Memory Cassette System Eliminates Paper Tapes and Cards
·Dot Matrix Printer/Plotter Produces 4 Colors in Single Pass
Microprocessor controlled model 4100 uses separate cartridge ribbons and printheads for each primary color plus black to produce full ·color or black and white hardcopy graphics on plain paper. The device switches quickly between graphics and
alphanumeric modes, operating at three times the speed of comparable units. Separate magenta, cyan, yellow, and black ribbons and separate printheads allow readable black text to be obtained without changing rib· bons and avoids ribbon contamination and resulting color muddiness.
Controlled by a ZSO microprocessor, the unit prints in a subtractive process, light colors first from a raster refresh graphics system. Maximum resolution is currently 60 dots/linear inch, horizontal or vertical. Plotting speed in full color graphics mode averages 3 pages/min for 11" (2S-cm) forms. Characters are printed in a 5 x 7 dot matrix at 60 lines/min. The unit operates in continuous motion to avoid the effect of rapid acceleration and deceleration. Self-diagnostic routines incorporated in the microprocessor facilitate maintenance. ..ise of microprocessor control, de motors, and stepper drive paper advance reduce parts count and simplify maintenance. Life cycle of ribbons is extended because of reduced contamination. Ramtek Corp, 2211 Lawson Lane, Santa Clara, CA 95050.
Circle 200 on Inquiry Card
Portable, detachable bubble memories that operate in the same way as a tape cassett~ works with a tape recorder, the FBM31CA and 43CA have total capacities of 74,032 and 273, 745 bits and provide access times of 740 ms max and 6 ms average, respectively. Cassettes connect to an S-bit microcomputer through a cassette holder and a card incorporating a monitor program. Absence of moving parts eliminates need for . preventive maintenance.
The system consists of a bubble memory cassette that allows the device to be loaded and unloaded quickly, a cassette holder unit, and a controller that interfaces to the host system . Up to eight cassette holder units can be controlled with one interface unit. The holder incorporates linear circuit, coil driver, function driver, sense amplifier, write inhibi· tion devices, and busy check circuit. S-bit parallel data can be processed (OMA possible) TTL compatible with the interface.
Cassettes have a transfer rate of 100k bits/s and operating power consumption of 500 and 700 mW for 31CA and 43CA, respectively. Packaged in a 24-pin housing, dimensions are 60 x 45 x 20 mm, and weight is 50 g. Power requirements for the U001 holder are 5 V, 0.4 A; 12 V, 0.25 A; 17 V, 0.1 A; and -5 V, 0.1 A. Control card 30SC1A requires 5 V, 1.5 A; 12 V, 0.25 A; and -12 V, 0.1 A. Fujitsu America, Inc, 910 Sherwood Dr-23, Lake Bluff, IL 60044.
Circle 201 on Inquiry Card
Rigid 8" Disc Drive Combines Fixed and Removable Storage
The model 9455 Lark Module Drive offers an alternative solution to problems of memory backup confronting users of fixed S" (20-cm) disc drives. Combining fixed and removable storage modules, it provides SM-bytes capacity on a fixed disc and another SM bytes on a removable disc cartridge. The selfcontained sealed 9120S cartridge is top loading for stable alignment of media to drive, but front loads for easy use. The unit's 9.67-MHz transfer rate makes it interface and format compatible with the 14" (35.5-cm) SMD family. It can be combined with storage module, minimodule, or cartridge module drives on a common controller.
178
Micromodule drive and power and 1/0 modules are the unit's two major assemblies. Included in the drive are disc assembly, spindle motor, linear voice coil actuator, operator control panel, and basic electronics assembly. The PIO contains power supply system and interface electronics to the controller. The data recovery circuitry operates with fixed sector formats in 64· or 32-sector configurations.
The unit's low mass flying read/write heads attach to a precisely controlled linear head positioner. Servo information is factory written on each data surface for carriage positioning , index and sector pulse generation, and phase-locked oscillator reference clock.
An SM-byte removable single-disc cartridge, the 9120S consists of an oxide coated disc clamped to a hub and encased in a plastic housing. Both surfaces are used for data and servo positioning and index/timing. The cartridge is enclosed in a plastic housing with head access door which is opened by the door actuator arm when the cartridge is inserted and closes automatically on removal. Track density is 237/in (93/cm) and there are 202 primary data tracks/surface. Control Data Corp, PO Box 0, Minneapolis, MN 55440.
Circle 202 on Inquiry Card
COMPUTER DESIGN/JULY 1980
' ·
HP Introduces the World's First Digital Bar CodeWand.
Anyone now using a keyboard or push buttons for data entry could benefit from using bar codes.
Depending on the number of characters being entered, bar code scanning has been shown to be from two to four times
faster than key entry.
HPs new HEDS-3000 Digital Bar Code Wand can scan black-and-white bar codes and convert the codes to
microprocessor-recognizable digital output. Fully specified and guaranteed, the Wand contains a push-to-read switch which
conserves power. It is well suited to portable systems as well as those with line power. The Wand is housed in a
rugged, stylized, molded plastic case with attached cord and connector. Of even further interest to OEMs,
the HEDS-3000 can be manufactured in custom colors with desired logos.
In quantities 1-99, the Wand is priced at $99. 5O* each.
For mo(e ·information or immediate off-the-shelf delivery,
contact your nearest HP Components franchised distributor. In the U.S. contact Hall-Mark, Hamilton/Avent, Pioneer
Standard, Schweber, Wilshire or the Wyle Distribution Group (Liberty/ Elmar). In Canada, call Hamilton/Avnet or Zentronics, Ltd.
F//-pw HEWLETT
a:~ PACKARD
01906
·u. S. Domestic Price Only
CIRCLE 93 ON I NQUIRY CARD
179
computer stands
You can count on Est for stationary or movable computer
o_
stands that are as
sturdy and functional
as they are hand-
some. Your
choice of style '-......;:===~~~~;:;,~
and anchor plate.
Let us design a base
to your specifications.
PRODUCTS
Thermal Graphic Printer Uses Thick Film Linear Dot Array Technology
Write or phone for literature
EST COMPANY, BOX 250, GRAFTON , WI. 53024 (414) 377-3270 A DIVISION OF LEGGETT & PLATT. INC.
CIRCLE 94 ON INQUIRY CARO
HERMETIC DIGITAL
· Hermetic, metal 14-pin DIP (.870"L x .498"W x .250"D)
· 50ns-250ns Delays (ten 10% taps) · :!: 5% Total Delay Accuracy · 4ns Rise Time · Schottky Buffered 1/0 · Thick Film Hybrid · Pin for Pin Compatible with other
leading manufacturer
Ideal for dynamic RAM timing in Commercial and Military equipment the HY5010 is the newest product from the delay-line experts. Call today for more information.
hYmt~kms (!!~1~~~:~991 incorporated LOS GATOS, CA 95030
180
CIRCLE 95 ON INQUIRY CARD
Equipped with a fully programmable graphics interface, Microplot 44 allows print and plot capabilities to be intermixed without burdening the microprocessor based system with unnecessary software overhead. Available in either desktop or panel mounted versions, the unit accepts analytical and computational data in digital form, prints both grid and scale, and plots data. The 44-col unit will also annotate data with alphanumerics and print text in either X or Y orientation. The printer/plotter incorporates a fixed head design using thick film linear dot array technology, which provides high print clarity with no moving parts and offers high abrasion resistance and quiet operation .
Microprocessor based electronics supply the unit with its fully programmable parallel graphics interface. The bit parallel/byte serial interface is organized for compatibility with other microprocessor based systems. Data are loaded into memory one dot or character line at a time. The 3-part data buffer-256-byte plot data, 44-byte X-axis, and 22-byte Y-axis-allows simultaneous X and Y printing , plotting , and annotating. Since each of the plot buffer's 256 bytes corresponds to a single dot location on the printhead array, each dot can be randomly accessed. This provides ability to slew to any dot position via a single data byte transfer, eliminating the need to sequentially load data as it increases in magnitude and to load blank data bytes for spacing.
The unit also operates in line segment plotting mode, whereby the operator specifies horizontal vectors by their endpoints and the unit plots data between points. Character printing modes include double height and double density, one-half height, and X- or Y-axis orientation . Backspace capability allows intermixing of character printing and plotting on same line. All mode selections can be manual or programmable.
Providing a 256-dot linear array across a 109-mm plotting width, the unit uses 127-mm wide thermal printing paper. It operates on 115-Vac, 50/60 Hz and requires 25 W idle, 80 W max, or 25 to 50 W typ. Dimensions are 99 x 180 x 231 mm for the panel mount version: 109 x 251 x 292 mm for the desktop unit. Gulton Industries, Inc, Measurement & Control Systems Div, East Greenwich, RI 02818
Circle 203 on Inquiry Card
COMPUTER DESIGN/JULY 1980
PRODUCTS
COMPUTER-TYPEWRITER ·INTERFACE
Designed to generate hard copy directly from a computer through any electric typewriter with powered carriage return, the 1/0 Pak consists of an array of coils positioned in the same pattern as the typewriter's keyboard. Unit fits directly over the keyboard, and coils are wired into electrical decoding matrix. Interfaces and software are avai Iable for TRS-80 level 1 and 2 and Apple level 2; a 6-bit parallel interface allows operation with other computers. Rochester Data, Inc, 3100 Monroe Ave, Rochester, NY 14618.
Circle 204 on Inquiry Card
POWER SUPPLIES FOR DATA COMMUNICATIONS EQUIPMENT Power supplies with outputs of 5 Vdc at 0.30 A and ± 12 Vdc at 0.13 A, or 5 Vdc at 0.60 A and ± 12 Vdc at 0.20 A, are available for either 117- or 220-Vac input. Intended for microprocessor based data communications applications, the external design eliminates heat buildup, interference, and space requirements experienced with integral devices. Line/load regulation is ± 5%, with < 10-mV rms ripple . Ault, Inc, 1600H Freeway Blvd, Minneapolis, MN 55430.
Circle i05 on Inquiry Card
95·W SWITCHING POWER SUPPLY Outputs from the 95-W EPS95 switcher are 5 Vdc at 12 A, - 5 Vdc at 0.5 A, and either ± 12 Vdc at 1.5 A or ± 15 Vdc at 1.2 A. The supply is available in either open or enclosed frame models. Included are 90 to 125/180 to 250-Vac dual input ranges, current limiting with automatic recovery after removal of short circuit, and power fail circuitry. Efficiency of the unit is greater than 70%. Elpac Power Systems, 3131 S Standard Ave, Santa Ana, CA 92705.
Circle 206 on Inquiry Card
DUAL FLOPPY DISC SYSTEM
Consisting of MM-SBC-80F controller, cables, two 8" (20-cm) disc drives, and power supplies, reconfigured Megabox can provide up to 2M bytes of storage. The Multibus compatible controller can handle up to 4 Shugart 800/850 type 8" (20-cm) floppy drives in both single- and double-density modes. The system runs ISIS II, CP/M, MP/M, Pascal, or OASIS operating systems. Micromation, Inc, 1620 Montgomery St, San Francisco, CA 94111 .
Circle 207 on Inquiry Card
DOT MATRIX IMPACT PRINTERS
Available in kit or assembled form, the 88-col, tractor feed dot matrix printer is microprocessor controlled and programmable with 32 system level commands. Included are 96 ASCII characters (u/lc), 9 software selectable print sizes, 5 x 7 through 10 x 14 fonts, serial and parallel interfaces, selectable 110- to 9600-baud rate, and adjustable tractor width for paper size selection. Coosol, Inc, 1585-200 Adams Ave, Costa Mesa, CA 92626.
Circle 208 on Inquiry Card
MULTIPLE-WALL HEAT SHRINKABLE TUBING lnsultiteR MW tubing combines heat shrinkable protection with encapsulation to keep out moisture, oils, and corrosive environments. The multiple-wall tubing is a combinat_ion of a radiation cross-linked polyolefin outer wall with an inner wall that melts at temperatures
over.135 ·c, shrinking the outer wall and
compressing the inner wall, simultaneously insulating and encapsulating. It is manufactured in 8 std diameters from 0.125 to 1" (3.175 to 25.4 mm). Electro· nized Chemicals Co, Div of High Voltage Engineering Corp, S Bedford St, Burlington, MA 01803.
Circle 209 on Inquiry Card
ALTERNATIVE TIME BASE DISPLAY OSCILLOSCOPE The 100-MHz/5 mV, dual-trace, PM3262 oscilloscope offers an improved CRT that produces a sharper display coupled with higher writing speeds. Alternate time base display facility shows main and delayed time base displays together over the entire screen width. A third channel allows for simultaneous viewing of trigger signals. The 21 .1-lb (9.6-kg) scope measures 12.5 x 6.1 x 16.2" (316 x 154 x 410 mm). Power consumption is 45 W. Philips Test & Measuring In· struments, Inc, 85 McKee Dr, Mahwah, NJ 07430.
Circle 210 on Inquiry Card
SHORT-HAUL DATA SET
Designed for asynchronous data transmission at 0 to 9600 bits/s, model 1050 provides high speed data exchange in either half- or full-duplex systems . Transmission through twisted pair cable at distances of up to 28 mi (45 km) is possible, depending on data rate and wire gauge used. Available diagnostic capabilities allow local and remote tests of data sets as well as communications links. Anderson Jacobson, Inc, 521 Charcot Ave, San Jose, CA 95131.
Circle 211 on Inquiry Card
PCM SYSTEM TEST GENERATOR PCG-1 digital signal generator produces accurate and repeatable DSX-1 compatible PCM signals. Functions tested in clude insertion loss or gain, level tracking, and signal distortion and frequency response. A pseudorandom noise option simulates noise in a 350- to 550-Hz band . Std digital signal or encoded sinewave test tones (50 to 3600 Hz) are provided. W & G Instruments, Inc, 119 Naylon Ave, Livingston, NJ 07039.
Circle 21 2 on Inquiry Card
182
COMPUTER DESIGN/JULY 1980
R24.1be first 2400 bps
modular modem.
Rockwell's compact MOS-LSI modem gives new physical design freedom.
Rockwell's R24 Modem is the most compact 2400 bps MOS-LSI modem available today. Its small size and modularity give designers a whole new form factor flexibility. Requiring only 25 square inches of system area, the R24 is ideal for terminals and communications equipment.
The R24 provides functional flexibility also. Of its 3 modules,
one is the transmitter, two the receiver. Terminal designers can offer transmit-only or receiveonly options. And, the R24 is Bell 201 B/ C and CCITI V.26 and V.26 bis compatible.
With its major functions in LSI circuits, the R24 is solid-state reliable and economical. It can be configured for operation on either leased lines or the general switched network. And, each low-
profile module can be plugged into standard connectors or wave soldered onto system PC boards.
A new generation of modems from the company that's delivered more high-speed modems than anyone in the world. That's Rockwell Micropower!
For more information, contact Modem Marketing, Electronic Devices Division, Rockwell International, P.O. Box 3669, RC 55, Anaheim, California 92803. (714) 632-5535_.
Rockwell International
...where science gets down to business
CIRCLE 97 ON INQUIRY CARD
183
PRODUCTS
VIDEO DISPLAY EDITING TERMINAL
ILLUMINATOR PRODUCT LINE ARRAY CAMERA
CONTROLLER
Unlike film cameras, an Image ls focused on an array of photodlodes which are
precisely aligned on a single chip located inside the camera. This photodlode array converts light energy Into corresponding
electronic signals. The lntelllgent con· tro/ler uses these signals to collect production Information, process data, make process decisions, and talk to computers
and control equipment.
Reticon Image Sensing Systems can be configured for practically any production application requiring non-contact inspection, measurement, detection,· counting, sorting or monitoring. Choose the system components you need from a broad range of line scan or matrix cameras, lenses, illuminators, power supplies and intelligent controllers. There are even Interface Units that connect cameras to SBC-80 Computer Systems. And you can modify or expand your system to meet changing requirements.
Reticon's experience and technical services can help you define an imaging system that's right for your requirements. Write or phone for our applications brochure that describes our systems approach.
Model 1250 Super Owl offers a choice of 2 detachable keyboards, and/or a light pen. Both configuration details and 12 (shlftable to 24) function keys are programmable. Information is stored in a nonvolatile EAROM. 25th status line allows 2-way communications with the host without interfering with the current transaction. Std printer port is RS-232·C compatible at a baud rate independent of the main communication lines. Perkin· Elmer Corp, Terminals Div, 360 Rte 206 S, Flanders, NJ 07836.
Circle 21 3 on Inquiry Card
COMPUTER CONTROLLED CARD EMBOSSING SYSTEM
The Cardwriter Ill is comprised of a Farrington CRT terminal and an embosser/ controller. Format and message are variable with each card ; outer perimeter of the embossing can be 0.25" (0.318 cm) from card edges. Card throughput is 60/h based on 3 lines of ANSI format at 1.25 char/s. The unit will accept CR50, CR70, or CR80 size cards. Std 64-char drum in· eludes 10 OCR 7B numerals, 26 alpha plus 11 repeated char, 10 numerics, and 7 punctuation marks. Dymo Business Systems, Inc, Randolph Industrial Pk, Randolph, MA 02368.
Circle 214 on Inquiry Card
~"~EGc.G RE'flCOl'I
345 Potrero Avenue Sunnyvale, CA 94086 (408) 738-4266 TWX 910-339-9343 Boston (617) 745-7400, Chicago (312) 640-7713, Tokyo,Japan 03-343-4411 ,Bracknell,England (0344)53618
9600-BIT/s OEM MODEM
Packaged on <100 in' (650 cm') PCB space, unit allows full duplex communication over 4-wire 3002 circuit and is CCITI V.29 compatible. Fallback to 7200 or 4800 bits/s is provided . Carrier freq is 1700 Hz ( ± 0.01 %), with line irn·
pedance of 600 o. Device is transformer
coupled, with transient protection. Digital interface conforms to RS-232· C/CCITI V.24. LSI circuits handle digital operations involved in data cornrnunica· tlons. Modern control resides entirely in software. Universal Data Systems, 5000 Bradford Dr, Huntsville, AL 35805.
Circle 21 5 on Inquiry Card
184
CIRCLE 98 ON INQUIRY CARD
COMPUTER DESIGN/JULY 1980
-------- ---- - - --- -------
Graybill 12 &16 Button I PRooucTs
Keyboard
VOICE RESPONSE VOLTMETER
Pads
The dual microprocessor based talking voltmeter automatically announces voltage readings via an internal 3" (7.6-cm) speaker every 7 s or on command of the operator. A slave processor selects needed speech elements from ROM while the main processor handles system timing and signal processing. Powered by rechargeable NiCad battery pack, the 2.5-Ib (1.1-kg) 2.5 x 10 x 9" (6.4 x 25 x 23-cm) voltmeter has options including a liquid crystal display and foreign languages. Franklin Institute Research Laboratory, Inc, The Benjamin Franklin Pkwy, Philadelphia, PA 19103.
Circle 21 6 on Inquiry Card
Choice of circuitry.
· XY Matrix · single pole/common bus · 2 out of7 (or 8) coded output Readily interfaced with logic circuitry.
Outstanding performance characteristics.
Positive tactile and audible feedback, low profile , patented snap-action dome contact. and 3 million operation per button contact system life-rating.
SINGLE-BOARD, 8-CHANNEL 12-BIT DAC
, Mounted on a DEC std quad-height board, the DT1716 features 8 independent channels of 12-bit D-A conversion, each of which operates solely under PDP-11 program control and includes an individual, 16-bit data input register organized to appear as 8 consecutive read/write locations in the 1/0 address page. Resolution is 12-bit, with 0.02% nonlinearity and ± V2 LSB differential linearity. Converters are monotonic over
·c the O to 70 operating range. Data
Translation Inc, 4 Strathmore Rd , Natick, MA 01760.
Standard product features.
'l2 inch or ¥<! inch button centers . Total button travel of only .015 inch.·Standard post or flange mounting ; top or sub mounting. Molded of tough ABS plastic ; buttons with black on white molded-in legends standard, other options available, including clear snap-on caps for user legending :
Send for complete specifications, truth table, and information about our full line ofKeyboard products .
Circle 21 7 on Inquiry Card
100-W SWITCHING POWER SUPPLIES
SF series power supplies consist of 5 models, each providing 100 W of regulated de output power. Available voltage/current configurations are 5 Vdc at 20 A, 12 Vdc at 8.4 A, 15 Vdc at 6.7 A, 24 Vdc at 4.2 A, and 28 Vdc at 3.6 A.
Totally enclosed packaging, 115/230-Vac input capability with 20% tolerance, ± 0.05% line and load regulation , and holdup time ratings of 20 ms min, are std features. Power-One, Inc, Power One Dr, Camarillo, CA 93010.
Circle 21 8 on Inquiry Card
SONIC DIGITIZER Model GP-6-50 enables users to perform axis rotation and slope calculations and to digitize in polar as well as cartesian coordinates, and allows extension into transcendental operation. Incorporating microprocessor capability, the unit also provides origin offset, incremental mode, area and line length calculation , and alphanumeric ASCII menu capability with variable scaling selection. Unit is housed in a chassis that adapts to rack mounting or tabletop installation. Science Accessories Corp, 970 Kings Hwy W, Southport, CT 06490.
Circle 21 9 on Inquiry Card
AUTOMATIC SWITCHOVER POWER SYSTEM
Designed to operate in conjunction with the company's 1-, 2-, and 3-output de-de converters and a 24-V battery, LS1000 series UPS and battery charger system automatically switches from ac line to battery backup during power failures. Output regulation remains tral')sient free during switching to battery or back to normal supply. Transition time from line to backup is 1 µ.s. Input is 115/230 Vac, 47-440 Hz. Unregulated output is 36 Vdc at 3 A. Converter Concepts, Inc, 435 S Main St, Pardeeville, WI 53954.
Circle 2 20 on Inquiry Card
80/300/675M·BYTE DISC STORAGE SYSTEMS 3100 series storage systems employ a microprocessor based single-board controller to emulate Data General's Zebra series 6057/6060/6061 disc systems . Up to 4 CDC storage module drives, 80/300/675M bytes each, may be daisy chained for a total capacity of up to 2700M bytes. Dual CPU capability option is provided for configuring redundant systems. The controller mounts within the minicomputer using one 110 slot. System Industries, 525 Oakmead Pkwy , Sunnyvale, CA 94086.
Circle 2 21 on Inquiry Card
186 CIRCLE 100 ON INQUIRY CARD
COMPUTER DESIGN/JULY 1980
CIRCLE 101 ON IN9UIRY CARD
187
PRODUCTS
TIL-IEEE STD BUS COUPLER
DIGITAL DATA RECORDER FOR IEEE-488 STD BUS
GPIB-3000 digital cartridge subsystem provides data storage in compliance with ANSl/ECMA/ISO standards. Data are recorded serially at 1600 bits/in (629/cm) in a 4-track format. Up to 34.5M
bits (4.3M bytes) of unformatted data storage may be contained on a DC 300 XL tape cartridge. The microprocessor based controller is designed to interface a TDC-3000 recorder to other IEEE-488 devices. Innovative Data Technology, 4060 Morena Blvd, San Diego, CA 92117.
Circle 222 on Inquiry Card
The 2488A interfaces instruments by translating their bit-parallel or serial codes, signals, or data into the bus serial, byte parallel format. In operation, the coupler provides all necessary functions to interconnect the instrument with a bus controller and/or other instruments. It can operate as a listener, a talker, or both. Passive cabling interconnects the instrument to the coupler. Ballantine Laboratories, Inc, PO Box 97, Boonton, NJ 07005.
Circle 223 on Inquiry Card
STATISTICAL MULTIPLEXER
-
DCX815 family uses statistical multiplexing for compact, error free transmission of up to 8 asynchronous channels over a single composite link. The unit provides an unrestricted intermix of input speeds from 50 to 9.6k baud asynchronous for any 5-, 6-, 7-, or 8-bit Baudot, ASCII, or IBM code. Only active channels are assigned time slots. Error checking routing protects the link between multiplexers from transmission errors. Rixon Inc, 2120 Industrial Pkwy, Silver Spring, MD 20904.
Circle 2 24 on Inquiry Card
3·FORMAT TAPE CASSETIE DATALOGGER
188
CIRCLE 1 02 ON INQUIRY CARD
--- - ------- -------------
MiniloggerTM DL-42 records data in ASCII format, with elapsed time in days, hours, minutes, and seconds measured by the unit's crystal controlled, internal digital clock to a tested accuracy of better than 0.01 % . Recorded data may be formatted as BCD, full alphanumeric, or binary. The tape drive is capable of recording up to 100k ASCII char. An RS-232 option outputs data to a terminal or printer. A D Data Systems, Inc, 200 Commerce Dr, Rochester, NY 14623.
Circle 225 on Inquiry Card
COMPUTER DESIGN/JULY 1980
PRODUCTS
MONOCHROME CRT DISPLAYS DT12-LF and DT12-ZF are 12" (30.5-cm) monochrome displays for OEMs of industrial computer related equipment. Thes"e "Z power" displays provide low voltage de required for the terminal logic circuits from the display horizontal deflection circuit. DT12-LZ has a fluxnulled 120/240-V line transformer to
minimize CRT flux interaction. Scan derived terminal supply voltage is essentially constant from 98- to 134-Vac input. DT12-ZF has 120-Vac input, with its power supply driven by line operated regulator and horizontal circuits. Zenith Radio Corp, 1000 Milwaukee Ave, Glenview, IL 60025.
Circle 226 on Inquiry Card
PUSHBUTTON SWITCHES FOR ROCKER SWITCH MOUNTS
Raymond's magnetic tape loader improves system readiness
... for digital program loading in severe
military environments - 54°C to + 95°C
Military system designers cannot gamble that
program memory will always be·available when
needed . Whatever form that memory takes -
core , bubble or semiconductor- designers
insist on the most reliable military back-up
memory available - magnetic tape. And for
more than a decade, Raymond tape memories
and program loaders have been the choice of
these professionals , as demonstrated on over
60 military systems .
Raymond's Model 6420 MTL is
specifically designed for data entry and
program load applications , and features the
smallest, lightest sealed cartridge available
Model 6420 MTL
today. Proven military environment performance, outstanding reliability and cost
effectiveness are just some of the reasons that Raymond continues as the
leader in high quality magnetic tape memories . For more information on the
6420 , or on how you can give your system the readiness edge , contact
Raymond Engineering Inc. , Military Recorder Division , 217 Smith St.,
Middletown , CT 06457 (203) 632-1000.
190
CIRCLE 104 ON INQUIRY CARD
These pushbutton switches are interchangeable with rocker switches and fit standard mounting holes for the latter. Current ratings are up to 20 A either ac or ac/dc. Illuminated red, green, or amber models are available with 110-Vac neon, and 14- or 28-Vdc incandescent bulbs. Non-illuminated types are white, red, or black. Features of the 1- and 2-pole switches include interlocking pushbutton actuators, with solder lug, spade, and screw termination. Eaton Corp, Commercial Controls Div, 4201 N 27th St, Milwaukee, WI 53216.
Circle 227 on Inquiry Card
300-BIT/s FULL-DUPLEX DIRECT CONNECT MODEM CARD All circuitry for the VS300P is contained on a 5 x 6.35" (12.7 x 16.12-cm) board and provides for switched-network, 300-bit/s ful I-duplex operation . Registered for direct-connect, the modem is fully compatible with Bell 103/113. Terminal interface is B-series CMOS input compatible, with output circuits capable of driving 2 TTL loads. The modem plugs directly into telephone company data and voice jacks. Racal-Vadic, Inc, 222 Caspian Dr, Sunnyvale, CA 94086.
Circle 228 on Inquiry Card
DATA TRANSMISSION TEST SET
Portable DTS-102/TDM analyzes modem performance, measures turnaround time, and pinpoints cause of faulty RS232/V.24 communication system operation. It provides 7 selectable output patterns and is programmable to generate start/stop characters containing pseudorandom , alternate, mark, or space data. Useful in synchronous , asynchronous, or start/stop character oriented systems such as TDMs, it measures bit or block error rate and displays turnaround time .measured in milliseconds. Navtel Ltd, 8481 Keele St, Concord, Ontario L4K 181, Canada.
Circle 229 on Inquiry Card
COMPUTER DESIGN/JULY 1980
TDC 3000 Digital Cartridge Recorder
Synchronous Tape Transport
Tape Formatter
A lot of people are, these days. And our Synchronous Tape Transports, Digital Cartridge Recorders, and Formatters are three big reasons. The fact is, every day more people are coming back to IDT tape drive systems. It's a matter of record.
CIRCLE 105 ON INQUIRY CARD
INNCN\TIVE DATA TECHNOLOGY
WE'VE GOT IT ALL ON TAPE.
4060 Morena Blvd. San Diego, CA 92117 (714) 270-3990
191
PRODUCTS
TAPE/TICKET IMPACT PRINTERS
Tape printer models offer choice of 6· or 12-col formats with mechanical unit, and optional BCD interface electronics. Ticket prl nters offer 5· or 11 ·col formats with or without BCD interface alee· tronics. Std open frame units are sup· plied with taps for 12-Vdc, 117-Vac, or 220-Vac power inputs; laboratory mod· els are wired for 117 Vac. Std ticket provides 3 copies with 2 carbon overleafs:
top copy is pressure sensitive paper, second copy is std bond, and third is a TAB card. Smith & Wesson, 2100 Roosevelt Ave, Springfield, MA 01101.
Circle 230 on Inquiry Card
CARTRIDGE TAPE BACKUP SUBSYSTEM
Sometimes you need a de-
pendable workhorse that will do the job efficiently, reliably, day after day. Like the compact drum printers from C. Itoh. Our Model 102 18-column digital, for example, weighs in at only 3.3 lbs., but it's more dependable than many units costing far more. Or our Model EP-101: it's at home in a lot of applications, but, like all our drum printers, it doesn't take much power-only 17 VDC. Or our most
Drum versatile unit, the Model AN-lOIF
· ti alphanumeric, the perfect OEM printer for anything from com-
puter output to label printer to
r m ers data logger. And more. Every one is solid, dependable, and right for any application where a minimum of downtime is a prime requirement; each features two-color printing, a compact design suitable for bench top or rack panel mounting, and one more dependable
· thing: the C. Itoh brand.
~ C. ltoh Electronics, Inc.
C. Itoh means excellence in printers.
5301 Beethoven Street, Los Angeles, CA 90066 Call: (213) 390-7778 ·Telex: WU 65-2451 East Coast 666 Third Avenue, New York, NY 10017 Call: (212) 682-0420 ·Telex: WU U-5059
C. Itoh Electronics is part of the C. Itoh & Co., Ltd. world-wide trading organization.
192
CIRCLE 1 06 ON INQUIRY CARD
The DMN-1 cartridge tape subsystem features a 14M·bit storage capacity with a 0.9M·bit/min recording rate. Incorporating dual 6400-bit/in (2520/cm) 0.30 in (0.76 cm)/s data funnel tape drives, the 8085 based subsystem operates at a 20k-char/s OMA transfer rate. The unit requires only 5.25" (13.34-cm) of vertical mounting space, using a single con· !roller slot. Alloy Engineering Co, Inc, 85 Speen St, Framingham, MA 01701.
Circle 260 on Inquiry Card
6·BIT EVALUATION BOARD The TDC1014PCB board contains all the necessary components to perform a 6-bit A·D conversion in 33 ns and accepts and digitizes a 1-V pk-pk signal from a 75·0 source at rates from de to 30M samples/s. Measuring 4.5 x 5.5" (11.43 x 13.97-cm), the board Includes its own 44-pln edge connector. A 2·bit input code permits output coding In true or inverted binary or 2's complement formats. TRW LSI Products, 2525 E El Segundo Blvd, El Segundo, CA 90245.
Circle 231 on Inquiry Card
96M·BYTE HARD DISC SUBSYSTEM
Providing 32M· to 96M-byte storage for the company's series 8000 or 5000 microcomputer systems, the model 16 hard disc subsystem utilizes a fixed· removable disc drive. Included are a 16M-byte SMD technology cartridge for backup and a 16M·, 48M·, or SOM-byte fixed media employing Winchester 3340 technology. Also included is a model 490 hard disc controller that fully buffers one sector of data to and from the disc. In· dustrlal Micro Systems, 628 Eckhoff St, Orange, CA 92668.
Circle 232 on Inquiry Card
COMPUTER DESIGN/JULY 1980
UV ERASER FOR EPROMs
Devices requiring 15 W·s/cm' erasure dosages such as 2708, 2716, 2732, 2758, 3728, and 8518 are erased in approx 20 min by the model 117A; devices erasable with lower dosage require correspond· ingly shorter times. An indicating scale shows time and dosage. Unit is In a leakproof housing, and an interlock turns off the UV source when the EPROM compartment is opened. Up to 5 EPROMs may be erased simultaneously. Power requirement is 110 to 125 Vac, 50/60 Hz, 30 W. Prometrlcs, Inc, 5345 N Kedzie Ave, Chicago, IL 60625.
WIREFRAME 15" DISPLAY MONITOR
NDC-15 display monitor has 35-MHz video bandwidth, uniform focus characteristics, and horizontal frequency capabilities from 15,750 to 20 kHz. P4 phosphor is std, with P31 and P39 op· tional. The wireframe unit is electronical· ly and mechanically compatible with Motorola and Bal I Brothers monitors. Retrace times are >6 µ.S (horizontal) and >300 µ.s (vertical). TSO Dlsplay Products, Inc, 35 Orville Dr, Bohemia, NY 11716
Circle 264 on Inquiry Card
Circle 261 on l~quiry Card
AC LINE PROTECTORS
OLP 5, 10, and 15 are a combination ac
line conditioner and UPS. The -5, a
600-V·A inverter system coupled with an
integral storage battery/charger system
is capable of 120-V, 5-A, 60-Hz output for
6 min (60 min for the -5A). The units
operate on 50/60-Hz input power at 120
Vac ± 25% (230 Vac optional). Output
power is 60 Hz ac (50 Hz optional)
±0.01%, at 120 Vac ±5%, with<5%
total harmonic distortion. Ambient
operating range Is O to 45 ·c. Dlsplex,
Inc, 21 Brewster St, Glen Cove, NY
11542.
Circle 262 on Inquiry Card
CARD/BADGE READER WITH RS·232·C TERMINAL
Self-contained series HT-100 terminal Is designed for industrial applications in factory data collection systems, warehousing, and assembly floors. The terminals include power supplies and RS-232-C interface; flagging of operator errors make them virtually fool-proof. Data are asynchronously transmitted at rates of 150, 300, 600, 1200, 2400, 4800, or 9600 baud . Taurus Corp, Academy Hall, Lambertville, NJ 08530.
Circle 263 on Inquiry Card
SECS 80 is a ruggedized version of Intel's ISBC* single-board computer. Even uses the same development system software. Meets MIL·E-5400, 4158, 16400, making it perfect for military, avionics, and tough Industrial environments. SECS 80 comes with a multitude of support modules: RAM, ROM, EPROM, dig Ital tape recorder and controller, 1553 interface, A·D converter, digital 1/0, high-speed arithmetic unit, and more. You can buy a complete system or configure your own with Individual modules. Either way, th is versatile microcomputer system will save you valuable time and development costs. Phone or write for complete details today.
·Trademark of Intel Corporation
EmmsEsco
Severe Environment Systems Company
A Subsidiary of Electronic Memories & Magnetics Corporation
20830 Plummer Street· P.O. Box 888 ·Chatsworth, Callfornla 91311 Telephone: (213) 998-9090 ·Telex: 89·1404
CIRCLE 120 ON INQUIRY CARD
193
PRODUCTS
32k·BYTE STATIC SEMICONDUCTOR MEMORY FOR PDP·8 PDP-8/A compatible, VM832 contains 32k 12-bit words on a single board and fits a hex-wide expander cabinet. When operated with the KT8A memory management option, onboard DIP switches allow each 4k memory field to be individually assigned to any field of 0 to 31 . Access time is 280 ns and cycle time is 1.2 µs (KK8-E CPU) or 1.5 µS (KK8A). Power requirements are 5 Vdc at 4.2 A. Computer Extension Systems, Inc, 17511 El Camino Real , Houston, TX 77058.
Circle 233 on Inquiry Card
THERMAL CUTOFF DEVICE
Flat design of the M&TP thermal cutoff is particularly suited to 1-time protection of transformer or fractional-horsepower motor coils from catastrophic overheating. Inserted into or laid flat on or under coils during manufacture, the device opens the electrical circuit and shuts off the current when excessive temps
develop. Both leads emanate from one end, lending it to wave soldering and automated assembly in PCBs. Current carrying capacity is 5 A max at 120 Vac. 3M, Industrial Electrical Products Div, PO Box 33600, St Paul, MN 55133.
Circle 234 on Inquiry Card
POLLING CONCENTRATOR
Five polling ports, each capable of handling up to 26 video terminals are a feature of the smart polling concentrator. Its learning capability allows it to seek out only those terminals responding to the poll chain and subsequently poll only terminals that have answered. Each port is firmware programmed for baud rates to 9.6k and bit structure. A 6k memory (expandable to 12k) is provided for each polling port. Communication Devices Inc, 290 Huyler St, South Hackensack, NJ 07606.
Circle 235 on Inquiry Card
3·W OPEN FRAME SWITCHER
Efficiencies of the ES-D series open frame switching power supplies vary from 70 to 84% with 0.2% line and load regulation. Ripple and noise are <50 mV pk-pk. Regulation, modulation, and protective circuits are onchip, giving parts reduction of 20% and a MTBF of >50k hours. Power output is continuous rated
to 70 ·c, full rated at 50 ·c. Outputs are
5 Vat 6 A, 12 Vat 3 A, 15 Vat 2.4 A, 24 V at 1.5 A, 28 Vat 1.3 A, and 36 Vat 1.0 A, adjustable ± 10%. Power/Mate Corp, 514 South River St, Hackensack, NJ 07601 .
Circle 236 on Inquiry Card
ENCRYPTION/DECRYPTION OPTION FOR PASCAL COMPUTER
A hardware enhancement for the ACl goTM Pascal computer system incorporates a WD2001 data encryption device. Using the algorithm specified in the Federal Information Data Encryption Standard (NBS #46), data are encrypted/ decrypted at a transfer rate of 163k bytes/s. Work memory manipulation allows secure data transfer to ports or disc storage. Associated Computer In· dustries, 17751H Sky Park E, Irvine, CA 92714.
Circle 237 on Inquiry Card
We'll help you get a head (and stay ahead!)
Fast, low cost printer.
This DC-4004A discharge printer prints 48 colum ns at 144 cps. Printing alphanumerics in 5 x 7 matrix format on 4.72 " paper, its MTBF is 144 million characters. Just 2.6" H x 6.7" W x 5.9" D, it's only $127 in 100 quantity . Other printers with interface electronics available.
Call or write HYCOM, 16841 Armstrong Ave .. Irvine, CA 92714 - (714) 557-5252
H!=jCOm
194
CIRCLE 107 ON INQUIRY CARD
3Q1-
4-track/4-channel cassette head .. Precision Mount, (Azimuth "' 6')
WP-1D2
4-track/2-channel Extended low-frequency response head for .250" tape
3D7-
2-track/2-channel cassette head, Universal Industrial mount, Exceptionally versatile.
Three typical Vikron magnetic heads that come equipped with total service . That simply means we're not done helping you until you're done needing help.
We deliver much
more than quality
magnetic heads!
Call or write for complete and free information.
@ VI~!!ON
P.O. Box 737, 520 Blanding Woods Rd. S., St. Croix Falls, WI 54024
CIRCLE 119 ON INQUIRY CARD
An SSR in a DIP package? Certainly. All have logic compatible inputs. Some feature zero voltage switching for AC applications. Some are rated to switch 1.5 amps at 250 VRMS. Others are rated to 400 ma DC. Did you expect anything less from the people who introduced hybrid microcircuits to SSR design?
But you probably have other questions about this little relay and how to use it. So go ahead. There are no dumb questions .
D How can an SSR switch
both AC and DC?
D How will SerenDIP~
solve my low power AC switching needs?
D Are speed, long life , and
bounce-free operation the only SerenDIP advantages?
D How can I get prototype
quantities quickly?
Sorry. You missed my question. Here it is. - - - - - - - - - - - - - - - - - -
Name Company
State
Title Phone
..,~ TELEDYNE RELAYS
Ask us anything.There are no dumb questions.
Mail to: TELEDYNE RELAYS 12525 Daphne Ave., Hawthorne, Califo rnia 90250, (213)777-0077
CIRCLE 108 ON I NQUI RY CA RD
PRODUCTS
COLOR GRAPHICS SYSTEM
PRINTING SYSTEMS FOR HP-3000 MINICOMPUTERS Add -on systems give users of HP-3000 series I, II, and Ill minicomputers the choice of 300- to 1800-line/min printers. The HPC30 controller is form, fit, and function compatible with HP's controller and is totally transparent to the operating system. It functions under programmed 110 or with OMA. Only one mainframe card position is required . Complete system consists of controller/interface card, 1 of 7 band or drum line printers, and all necessary cabling . Using std HP peripheral ad dress numbers and interrupt priorities, it receives data and commands directly from the computer's 110 peripheral bus while print operations are controlled either from the CPU or multiplex channel bus. Transmission to printer is via a parallel bus with a max 1800-line/min rate. BOS Computer Corp, 1120 Crane St, Menlo Park, CA 94025.
Circle 240 on Inquiry Card
INDUSTRY COMPATIBLE SPEECH RECOGNITION UNIT
High performance graphics subsystems for all POP-11 computers and the VAX-11/780, full color raster scan VSV11 and VS11 models use 2901 bit-slice architecture to produce dynamic color displays. VSV11/VS11 models are designed for LSl-11 bus microcomputers and POP-11 Unibus computers, respectively, and are supported by RSX-11M, -11S, and VAX/VMS operating systems . Each is available with a 19" (48-cm) full color display terminal, VRV02, or a monochrome VT100 terminal. A joystick provides cursor control. A OMA device composed of image processor, sync generator, and image memory, the subsystem interfaces directly with the LSl-11 bus and with the Unibus through a converter. Image memory is a video frame buffer with 512 x 512 x 2 bits of resolution and intensity in the basic configuration . Digital Equipment Corp, Maynard, MA 01754.
Circle 238 on Inquiry Card
DATA ACQUISITION/CONTROL INTERFACE OPTIONS FOR DESKTOP COMPUTER
An HP-IB interface module and ROMs for 110, plotter/printer control, and matrix math can be easily added to the HP-85 by plugging them into ports in the computer. The 110 ROM enriches the computer's BASIC language with straightforward 110 commands that configure, control, pass data to and from and check status of devices in the 110 system. The HP-IB module, when used with the 110 ROM, enables as many as 14 instruments to be controlled by each interface card and achieves data transfer rates up to 25k bytes/s. Plotter/printer ROM allows addition of HP2631 B serial impact printer and HP7225A graphics plotter to the computer. Matrix math ROM provides statements for working with 1- and 2-dimensional arrays as large as 60 x 60. Hewlett-Packard Co, 1501 Page Mill Rd , Palo Alto, CA 94304.
Circle 242 on Inquiry Card
196
· Making speech input capability available with virtually every
computer terminal, the model 7000 will interface with all RS232-C terminals to provide advantages of hands-off operation . Key to the unit is a spectrum analyzer that uses digital filtering and pattern matching techniques to analyze audio input. Output is automatically transferred to the computer in standard ASCII format. The unit can be trained to recognize up to 64 words or phrases, each up to 3 s in length, and is compatible with all common programming languages, such as FORTRAN , COBOL, Pascal , and BASIC. It can be trained or retrained as often as necessary, and automatically rejects utterances significantly different from the vocabulary set. Heuristics, 1285 Hammerwood Ave , Sunnyvale, CA 94086.
Circle 241 on Inquiry Card
400-W SWITCHING POWER SUPPLIES
EPS1901 F, 2F, and 3F series supplies feature a built-in electromagnetic interference (emi) filter designed to limit emi in accordance with the requirements of VOE 0871/6.78, curve A specs . The front panel of the cabinet has a front-mounted terminal block to allow addition · ··~~~~--- of the emi filter without increasing case dimensions. EPS1901 , 2, and 3 do not have the filter feature . Other features of the high efficiency (80%) units are soft-start circuitry to eliminate voltage overshoot and limit in-rush current, overcurrent protection , overvoltage protection, overvoltage protection with automatic reset , and remote turn-on and turn-off. All cabinets measure 8 x 5 x 11 " (20 x 12.7 x 27.9 cm). Motorola Subsystem Products, PO Box 20923, Phoenix, AZ 85036.
Circle 239 on Inquiry Card
CO MPUTER DES IGN /JULY 1980
PRODUCTS
COLOR GRAPHIC TERMINAL SYSTEM
A color process information system with 512 x 512 individually
addressable pixels at a 60-cycle (nonflicker) refresh rate, model
2000 offers a basic high performance terminal with field
expandable building blocks that cover a selection of options.
The multiprocessor architec-
ture of the unit provides high
speed macrographics, bar
graph generation, complex
polygon fills, programmable
patterned vectors, and other
options. Simple high level
ASCII commands are used for
programming. Special func-
tion keys and memory ex-
pandable to 64k add to this
capability . The high resolu-
tion monitor incorporated in
the terminal provides automatic degaussing and a high con-
trast filter. Industrial Data Terminals Corp, 1550 W Henderson
Rd, Columbus, OH 43220.
Circle 243 on Inquiry Card
13.9M-BYTE 8" HARD DISC DRIVES
Incorporating a Winchester type
head which provides a recording
density of 7300 bits/in (2874/cm)
with MFM recording techniques
on an 8" disc, DK801 -1 and -2
drives have .unformatted capac-
ities of 6.9M and 13.9M bytes,
respectively. When functioning
in a 44-sector format, capacities
are 5.2M bytes for the -1 and
10.4M bytes for the -2. Both have
track capacities of 1.3k bits with
corresponding sector capacities of 256 bytes. Data transfer
rates are 889k bytes/s with NRZ as the data transfer form . Avg
access time is 70 ms with a max of 150 and a min of 30 ms. Avg
latency is stated as 8.4 ms. Power requirements are listed as 24
V ± 10% at 6 A start and 5 A rotating, 5 V ± 5% at 3 A, and - 5
A or -12 V ± 5% at 0.9A. Hitachi America, Ltd, 100 California
St, San Francisco, CA 94111.
Circle 244 on Inquiry Card
HIGH SPEED PROGRAMMABLE GAIN INSTRUMENTATION AMPLIFIER
Amplifier gain of 1, 2, 4, or 8 can be selected by applying logic signals to the two gain control inputs on the HY-6110, allowing digital control of gain in microprocessor based data acquisition systems. Gain accuracy is 0.05% and linearity is 0.005% at each gain setting (accuracy can be adjusted to 0.01 % if required). In addition, this gain will settle to 0.01 % of the final gain value in 5 µ.S when programming gain of the amp. Device has a slew rate of 10 V/µ.s and 10 µ.S settling time for an output
voltage transistior:i from + 10 V to - 10 V. Common mode rejec-
tion is 85 dB min. Initial offset voltage is <1 mV and typ input offset voltage drift is 10 µ.V/°C. Differential input resistance is
10'° fl and input bias current is 100 pA at 25 ·c. Hytek
· Microsystems, Inc, 16780 Lark Ave, Los Gatos, CA 95030.
Circle 246 on Inquiry Card
LSl-11 COMPATIBLE FLOPPY DISC CONTROLLER
F02CTR floppy disc controller card provides DEC RX02 emulation on a single dual-width PC board that plugs directly into an LSl-11 backplane. For use with either single- or double-sided drives, the card can identify a drive as either 1- or 2-headed and thereby establish the correct stepping rate and other control signals and can automatically recognize single- or doubledensity (RX01 or RX02) formats. Density is determined by means of a guessing algorithm rather than through an encoded sector byte. The card fully emulates RX02 with the LSl-11, -11/2, or -11/23 microcomputer and runs RX02 diagnostics as well as onboard self-test diagnostics. It also has a built-in bootstrap and uses DEC provided hardware. Advanced Electronics Design, Inc, 440 Potero Ave, Sunnyvale, CA 94086.
Circle 24 7 on Inquiry Card
91.9M-BYTE INTELLIGENT DISC DRIVES
9-WIRE IMPACT MATRIX PRINTHEADS
Model 1000 has a max print wire frequency of 1250 Hz, typ life of 300M char, and a range of voltages and pulse · widths. Model 5000 is electrically and mechanically compatible with Lear-Siegler impact matrix printers, and is interchangeable in the field as well as in production, while model 6000 is compatible with Diablo impact matrix printers as well as with Universal Microprinters printheads. Providing up to 250 char/s with a 9 x 7 font, the units accommodate 6-part forms. Char height is 0.130" (3.302-mm) overall . Power consumption is 4 W/print wire at 1250 Hz continuous. Avg power requirements are 6.6 W for avg text at 250 char/s . DH Associates, 754 N Pastoria Ave, Sunnyvale, CA 94086.
Circle 245 on Inquiry Card
Plug compatible with the company's Intelligent Marksman, the Intelligent Hunter achieves system capacities up to 90M bytes in a fixed/removable media drive. General purpose 1/0 interface provides a simple TIL byte-parallel connection . The drive package operates on about 85% less power and occupies less space than is required by comparable disc drives operating ~ith separate controllers. Models IH-32, -64, and -96 provide 30.5M, 61.2M , and 91 .9M bytes of formatted data storage, respectively , in a 10.5 " (26.7-cm) high , rackmounted or tabletop device. Microdiagnostics allow detailed error-fault location. Single function command structure, automatic sector interleaving set by switch or command , OMA transfer, single sector transfer, and alternate track assignment are features . Cen· tury Data Systems, 1270 N Kraemer Blvd , Anaheim , CA 92806.
Circle 248 on Inquiry Card
198
COMPUTER DESIGN/J ULY 1980
PRIAM's high-performance, low-cost Winchester disc drives speed up throughput and expand data storage from 20 megabytes to 154 megabytes. And a single controller can be used to operate 14-inch-disc drives with capacities of 33, 66, ,or 154 megabytes or floppy-disc-size drives holding 20 and 34 megabytes. So it's easy to move up in capacity, or reduce package size, without changing important system elements or performance.
High Performance and Capacity at Low Cost
Fast, linear voice coil positioning gives you high system throughput, without traditional high cost. Track-to-track positioning time is less than 10 milliseconds for all models, and average positioning takes just 50 milliseconds. PRIAM's use of IBM 3350-level Winchester disc technology gives you high capacity at amazingly low cost.
Easy Interfacing
PRlAM's low-cost serial data interface is the same for both 8-inch and 14-inch drives, and all PRIAM drives include data separation. To make interfacing easier than ever, PRIAM's optional Parallel Data Interface provides functions that permit interfacing directly to the l/O bus at the byte level. It controls up to four drives, and provides serialization and deserialization of data, disc formatting, sector buffer, polled or interrupt operation, defect mapping, overlapped commands, implied seek, selectable sector sizes, and resident microdiagnostics. A simp le interface to the CPU is all that's needed, eliminating tedious and expensive controller development.
SMD Interface
Simple, efficient design makes both types of PRIAM drives reliable and economical. Brush less DC motors eliminate belts, pulleys and mechanical brakes. They also save you money and let any PRlAM drive operate anywhere in the world.
If you have an SMD controller in your system, you can move quickly to Winchester technology performance, reliability and economy by using PRIAM's optional interface. It matches up conveniently with existing Storage Module interfaces and it is available with all of the following
Compact Sizes, Light Weight
PRIAM mode ls.
Small size and light weight make PRIAM drives a cinch to fit into your systems. The space-saving DISKOS 3350, 6650, and 15450 weigh a mere 33 pounds. The DISKOS 2050 and 3450 have exactly floppy-disc-drive dimensions and weigh only 20 pounds. Compact, light steel rod frames permit easy flow of ai r in the system, improving system reliability. In the 14-inch drives, the optional power supply can be fully enclosed within the disc drive assembly.
THE PRIAM LINEUP
Model/Disc Size
Capacity Transfer Rate
Size
DISKOS 3350 ( L4") DISKOS 6650 (l4") DISKOS 15450 (l4") DISKOS 2050 ( 8") DISKOS 3450 ( 8")
33 Mbytes 66 Mbytes 154 Mbytes 20 Mbytes 34 Mbytes
1.03 Mbytes/Sec 7" x 17" x 20" I .03 Mbytes/Sec 7" x 17" x 20'' l. 03 Mbytes/Sec 7" x 17" x 20"
1.03 Mbytes/Sec 4.62" x 8.55" x 14.25" 1.03 Mbytes/Sec 4.62" x 8.55" x 14.25"
High Reliability
Take a closer look at future database requirements. Then get comp lete details about PRIAM Winchester disc drives by writing or calling:
PRIAM's proprietary head-disc assemb ly air system assures long-term reliability by maintaining positive pressure at the spind le-bearing sea ls. Data reliability is guaranteed by fully servoed head pos itioning; dedicated servo tracks eliminate the positioning errors to which othe r low-cost drives are vulnerable. Microprocessor control reduces component count and cost and improves reli ability and flexibility.
IPRilAM
Ask for "Who's Selling Rifles to the Indians?", PRIAM's FREE Winchester Technology Primer.
3096 Orchard Drive San Jose , CA 95134 Telephone (408) 946-4600 TWX 910-338-0293
CIRCLE 110 ON INCj)UIRY CARD
199
PRODUCTS
PROGRAMMABLE OSCILLOSCOPE CALIBRATION GENERATOR
SMART COMPUTER TERMINALS
Executive 80 terminals suit requirements of smaller modular computer systems as well as those of large host computers with highly distributed terminal networks. Model 20 is a buf· fered video display terminal with extensive video highlight and formatting features; model 30 is a high performance editing terminal with expanded function key capability, additional transmission modes, paging, and data validation. Std features include video highlighting, line drawing, status line, programmable function keys, and a horizontal split screen display. An enhanced video option selectively displays characters at nor· mal font size, twice normal height and width, or in 132-col for· mat on a 15" (38-cm) monitor. Hazeltine Corp, Computer Ter· mlnal Equipment, Greenlawn, NY 11740.
Circle 250 on Inquiry Card
A microprocessor based calibration generator that is fully pro-
grammable, CG 551AP can be used as part of a computerized
system for the calibration and verification of oscilloscope
parameters including vertical gain, horizontal timing and gain,
vertical bandwidth/pulse characteristics, probe accuracy and
compensation, current probe accuracy, and calibrator output
accuracy. The unit is designed to form an integral part of a
system using the GPIB, a controller for program development
and execution, and hardcopy or line printers . The entire calibra-
tion process is governed by preprogrammed software. Er·
ror/devlation data are returned to the controller, where they are
compared to preprogrammed reference values and out of
tolerance values are flagged . Tektronix, Inc, PO Box 500,
Beaverton , OR 97077.
Circle 249 on Inquiry Card .
HIGH SPEED, HIGH QUALITY DOT MATRIX GRAPHICS PRINTER
Paper TigerTM model 460 uses precision dot placement and ad· vanced paper handling techniques to provide correspondence quality text and high resolution graphics at speeds of 160 char/s. To achieve this, the unit uses a dot matrix character for· matlon technique that overlaps dots both horizontally and vertically. The 9-wire ballistic printhead has staggered needle rows to create the vertically overlapping dots and is driven bidirectionally under microprocessor control by a stepper motor drive mechanism with true logic seeking lookahead capability and high speed slew. Printing control functions in· elude proportional spacing, enhanced text printing , and std print densities of 10·, 12·, or 16.7-char/in (3.9, 4.7, or 6.5/cm). In· tegral Data Systems, Inc, 14 Tech Circle, Natick, MA 01760.
Circle 2 51 on Inquiry Card
All otherMagTapeControllersfor
PDP-11/VAX-11 just became
'. .!-yti.e·sterday's technology. .~ ·~.
Because Avh;;s first again with another major step in minicomputer
; ~·
peripheral technology...the industry's first dual-density single-board
mag tape controller for PDP·l rand YAX-11· users.
Aviv is the company that introduced the first mag tape controller for LSl-1 l's:.. as well as the first GCR mag tape systems for PDP-11/VAX-l 1 and Nova/ECLIPSE.'· Now, Aviv does it again with the new TFC.822 ... the industry's first dual density, mag tape controller on a single hex board for PDP-11/VAX·l l unibus computers.
We didn't take out features...we added them and still designed a smaller and more efficient controller. Features include: bit/slice technology; large FIFO data buffer; burst mode transfer; optional read/write of gapless tape and more.
If you're a DEC user, Aviv's dual density, single board mag tape controller will enhance your total system. TFC-822 delivery is 30 days A.R.0. Write or call Aviv for further information.
200
CIRCLE 111 ON INQUIRY CARD
6 Cummings Park
Woburn, Massachusetts 01801 (617) 933-1165
· 111 Digital Equipment Corporation · · ® Data General Corporation
COMPUTER DESIGN/JULY 1980
· '
\llSUAL100 Digital VT 100®
These two terminals not only look alike-they act alike. But ours is a little better.
The new VISUAL 100 is 100% compatible with the DEC VT 100,® right down to the spacing of the keys and the roll of the keyboard. Neither your operator nor your software will know the difference. Except your operator will appreciate the superior human engineering features of the VISUAL 100 like the non-glare screen,
adjustable viewing angle and low slung keyboard.
Further, the Advanced Video package and current loop interface that are optional with the DEC® terminal are standard with the VIS!JAL 100. And we've added an optional Buffered Printer Interface with independent baud rate, independent parity and printer busy via XON XOFF protocol or control line.
Although we think the VISUAL
100 is a little better than the VT 100®, we priced it a little lower. Plus it's from the Company that's delivered thousands of terminals emulating DEC, Hazeltine, Lear Siegler and ADDS. Call or write us today.
See for yourself
Visual Technology Incorporated
Railroad Avenue, Dundee Park, Andover, MA 01810 Telephone (617) 475-8056
CIRCLE 112 ON IN9UIRY CARD
PRODUCTS
5.25 AND 8" FLOPPY DISC DRIVES
POWER LINE CONDITIONER
StabilineR computer regulators offer complete power line conditioning in an easy to install package, providing a 120-Vrms ±3% output over an input voltage range of 95 to 130 V and correc· ting most changes in voltage within 1.5 cycles . 60-dB common mode noise rejec· lion helps prevent noise related prob· lems such as computer errors and loss of information. Wiring requires only sim· pie plug-in connections to load and power source. The Superior Electric Co, Bristol, CT 06010.
ULTRAVIOLET EPROM ERASER
QUV-T8 lamp erases most industry stan· dard UV EPROMs such as 2708, 3716 , 2532, and can erase up to 20 devices at a time. Erase time at 1" (2.54-cm) distance from light source is approx 25 min . UV lamp has estimated life of 7700 h. Unit requires 105 to 130 Vac at 0.08 to 0.1 A. Package size is 25.4 x 7.62 x 11.43 cm. Logical Devices, Inc, 1525 NE 26th St, Ft Lauderdale, FL 33305.
For the Mini·Flexi 5.25" (13.34-cm) drive, single-sided capacity is 875k bits, while double-densi ty, double-sided capacity is 3.5M bits. Data transfer occurs at 125k and 250k bits/s, respectively. The 8" (20-cm) drive provides 3.2M· and 12.8M·bit capacity, with data transfer rates of 250k and 500k bits/s. Access time to adjacent track is 3 ms. Hardware features improve disc handling and loading/unloading safety features. C. ltoh Electronics, Inc, 5301 Beethoven St, Los Angeles; CA 90066.
Circle 252 on Inquiry Card
LOCAL DISPLAY CONTROLLER FOR DISTRIBUTED SYSTEMS
Model 320 local display controller, compatib.le with IBM 3274 models 1A, 1B, and 1D, supports the company's SOFT· PRINTTM unit capabilities in a local en· vironment by attaching to the IBM byte mux, selector, or block multiplexer chan· nel. Intelligent hardware reduces in· convenience of device address shortage. The controller incorporates a 140-ns bipolar microprocessor for maximum channel transfer rates and imbedded diagnostics. Lee Data Corp, 5700 Green Circle Dr, Minnetonka, MN 55343.
Circle 2 56 on Inquiry Card
INSULATION DISPLACEMENT CONNECTOR
PCB7 series PC board connectors use an insulation displacement technique for securing the wires in the connector without stripping, crimping, or tighten· ing screws. Connectors are available in versions for 14, 16 to 18, and 20 to 22 AWG, and come in std lengths from 6 to 26 circuits with 0.200" (0.508-cm) contact spacing . They will handle loads up to 10 A at 300 V. Contacts are phosphor bronze with tin plating; gold over nickel is optional. Control Products Div, Amerace Corp, 2330 Vauxhall Rd, Union, NJ 07083.
Circle 2 54 on Inquiry Card
Circle 2 5 5 on Inquiry Card
0.5M·BYTE VAX-11/780 COMPATIBLE MEMORY CARD 512k bytes of storage can be contained on a single hex-wide NS780 card, which provides 225-ns access time and 425-ns cycle time. Included is an online/offline switch that allows the card to be elec· trically removed from the system. All RAMs are socketed and a burned-in spare RAM is included on the card . The card is fully compatible with all VAX-11/780 hardware, software, and peripherals. National Semiconductor Corp, 2900 Semiconductor Dr, Santa Clara, CA 95051 .
BACKPLANE ASSEMBLIES WITH PRESS FITTED CONNECTORS Contact-SertTM backplane assemblies are made by press fitting contacts into 2-sided or multilayer PC boards with plated through holes. Std plating is a 0.1 " (2.54-mm) stripe of gold, 30-µin (0.76-µm) thick over 50-µin (1.27-µm) of nickel on the contact area and a gold flash of 5 µin (0.12 µm) (3 µin or 0.076 µm min) of gold over 50 µin (1.27 µm) of nickel on the rest of the contact body and tail. Military spec plating of 50 µin (1.27 µm) of gold over nickel is available. Hybricon Corp, 410 Great Rd, Littleton, MA 01460.
Circle 253 on Inquiry Card
Circle 2 5 7 on Inquiry Card
INFRARED EMITTERS AND DETECTORS TIL38 and 39 IR emitting diodes produce 12 mW of output power at 100 mA. Beam emission angles at half-intensity points are 60 and 20°, respectively. TIL40 diodes are intended for low cost applica· lions. TIL100 and 413 photodiodes are spectrally matched with the TIL38 and 39 and have receiving angles of 150 and 60°, respectively. Darlington phototran· sistors TIL411 and 412 are spectrally and mechanically matched with the TIL40. Texas Instruments, Inc, PO Box 225012, M/S 308, Dallas, TX 75265.
Circle 2 58 on Inquiry Card
SERVOMOTOR ENCODERS
Matched integral units feature a high quality encoder, available from 200 to 10k counts/turn , mated to high performance Tamagawa servomotor. Motors are available from 10 to 350 W in either iron core rotor or basket wound iron less configurations. Applications include phase lock servo loops, line printers, X-Y plotters, and other equipment requiring high reliability and precise positioning accuracy. BEi Electronics, Inc, 1101 McAlmont St, Little Rock, AR 72203.
Circle 2 59 on Inquiry Card
202
COMPUTER DESIGN /JULY 1980
OUR AUTOMATIC SAVINGS PLAN.
Plugging in our line of interface-compatible terminals con outomoticol/y reduce your terminal budget-by as much as 50% . And nowadays, that's like money in the bank.
General Terminal Corporation offers models that ore teletype-compatible as well as terminals that ore interfocecompotible with DEC, Burroughs and NCR computers. And GTC offers models that emulate other moior terminals, too. All for less.
And because GTC is the only moior terminal manufacturer with production facilities on both U.S. coasts, we con
deliver what you wont, where you wont, when you wont.
More for less, outomoticolly. That's what happens when you push the right button.
For more information on GTC products and services, coll toll-free today. In California: 800-432-7006. Anywhere else in the Un ited States: 800-854-6781 . Ask for Georgia Sand. Or write Georgia Sand at General Terminal Corporation, 14831 Fronk/in Avenue, Tustin, CA 92680. Telex:910-595-2428. We have offices throughout the world. In Canada,
contact Lonpor Ltd., 85 Torbay Rood, Markham ,
Ontario L3R. Phone: 416-495-9123 .
CIRCLE 113 ON INQUIRY CARD
fGlcj
The right button to push:·
Genera/ Terminal Corporation
LITERATURE
Magnetic Shields
Manual/catalog provides design and selection guidelines plus case histories and calculation assists, and discusses shielding effectiveness and Helmholtz coil testing. Ad-Vance Magnetics , Inc , Rochester, Ind.
Circle 300 on Inquiry Card
Data Cables and Connectors
Included in catalog are cables and connectors for interconnection of CPUs of major manufactur ers with peripherals, low capacitance and bulk cables, specs, and description of continuity tester. Craig Data Cable Co, Westport, Conn.
Circle 301 on Inquiry Card
Bipolar LSI De.vices
Data in generic form, cross references, selection guides, and data sheets are contained in guide to P/ROMs, ROMs, character generators, FIFO, PALTM, arithmetic elements, and interface. Monolithic Memories , Palo Alto, Calif.
Circle 305 on Inquiry Card
IBM-Compatible Processors
Two brochures on the AS/3000, one on the AS/5000, and three on the AS/7000 family discuss performance and operating characteristics, depict alternate configurations, and provide specs. National Ad· vanced Systems, Palo Alto, Calif.
Circle 306 on Inquiry Card
Fiber Optic Data Links
Besides detailing fiber optic advantages, brochure illustrates and describes ScotchflexR Fiber Optic Data Link Systems and provides specs and dimensions. 3M, St Paul, Minn.
Circle 31 2 on Inquiry Card
Linear ICs and LSI Circuits
Catalog lists DAC, ADC, precision voltage references, analog multiplexers and switches, op amps, and future products, specifying electrical characteristics and devices they replace. Micro Power Systems, Inc, Santa Clara, Calif.
Circle 3 13 on Inquiry Card
Solid State ac Power Conversion Devices
Catalog features specs and block diagrams for ac line conditioners and power sources, frequency converters, high isolation transformers, inverters, and uninterruptible power systems. Elgar Corp, San Diego, Calif.
Circle 302 on Inquiry Card
Miniature Data Acquisition Modules
Pamphlet lists features and suppli es descriptions, mechanical dimensions, specs, block and connection diagrams, and control pin functions of 8-, 16-, and 32-channel modules. Datel·lntersil, Inc, Mansfield, Mass.
Circle 303 on Inquiry Card
Power Supplies
Catalog outlines specs on switch-mode, series pass, unregulated, and de-de converters, and introduces the "UGLY" family in its corporate capability section. Elpac Power Systems, Santa Ana, Calif.
Circle 304 on Inquiry Card
Linear and Data Acquisition ICs
Specs, performance curves, and circuit diagrams for !Cs are included in 464-p data book that has sections on analog applications, chip information, and quality and reliability programs. Available for $2.95 (prepaid) from Harris Semiconductor, PO Box 883, Melbourne; FL 32901.
Test and Measuring Instruments
Photos, specs, and selection chart are presented in catalog describing oscilloscopes, logic analyzers, high resolution reciprocal frequency counters, counter/timers, and pulse generators. Philips Test & Measuring In· struments , Inc, Mahwah, NJ.
Circle 307 on Inquiry Card
RFl/EMI Suppression Filters
Handbook features technical data, mechanical dimensions, approvals for each type of filter, and FCC compliances for power line, medical equipment, fused, and reinforced insulation filters. Power Dynamics, South Orange, NJ.
·Circle 308 on Inquiry Card
Pascal Newsletter
Standards, programming techniques, "Programmer's Page" dealing with matters of style, and articles of general interest to Pascal users are included in publication. Rational Data Systems, New York, NY.
Circle 309 on Inquiry Card
Network Communications Systems
Brochure discusses, with charts of capabilities, hardware, and software, the five network processing systems, and gives examples of user needs served by each. Raytheon Data Systems, Mansfield, Mass.
Circle 31 0 on Inquiry Card
DIP Sockets, Headers, Jumpers Catalog supplies features, specs, photos, and dimensional drawings of strip and pinline sockets and headers, elevator and edge card sockets, and programming devices. Aries Electronics, Inc, Frenchtown, NJ.
Circle 31 5 on Inquiry Card
SM-Byte Floppy Disc Drive Brochure describes 3M-byte disc m dual drive with built-in advanced microprocessor controller, and lists applications, features, and advantages. Burroughs OEM Marketing, Detroit, Mich .
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Data Modems Overview of operating capabilities plus chart categorized by speed, model, compatibility, certification, data rate, modulation techniques, transmission mode, and interfaces are presented in catalog. Codex Corp, Mansfield, Mass.
Circle 31 7 on Inquiry Card
Wire and Cable Information on conductor material and coatings, insulation, circuit identification, braiding, shielding, cabling, jacketing and technical data section are found in guide that is available for $10 (prepaid) in U.S. and Canada, $15 elsewhere, from Brand· Rex Co, Wire & Cable Engineering Guide, WC-78, PO Box 498, Willimantic, CT 06226
204
COMPUTER DESIGN/JULY 1980
Now, OEMs can take the High Road or the Low Road with our Direct-
Connect Modem Cards, small enough to mount inside Data Terminals.
As the auld Scottish tune suggests, Racal-Vadic now makes it easy for OEMs to take the high road (1200 bps) or the low road (300 bps), with low cost direct-connect "Modems-on-a-Card;' small enough to mount inside CRT displays, teleprinters, POS devices, and other terminals and systems.
cable that plugs right into a Telco voice or data jack. Built-in 20 pin ribbon connector easily interfaces the VA1200P to your terminal. Price is right, too. Just $200 in quantities of 100.
The Low Road: 300 bps
it a cinch to install. And the price would put a smile on the face of the thriftiest Scotsman. Just $200 in lots of 100.
Both Roads: The TI Story
Two of Texas Instruments new Silent 700* data terminals include Triple Modems custom made by Racal-Vadic. Although small enough to fit into Tl's portable 17 pound terminal, this remarkable modem combines a Racal-Vadic VA3400, a Bell 212A, and a Bell 103. Imagine, a full originate/answer directconnect modem with both 1200 bps full duplex and 300 bps full duplex in such a tiny package. And it can even be acoustically coupled.
We did it for TI, and we can do it for you. Phone or write today.
Racal-Vadic
222 Caspian Drive , Sunnyvale, CA 94086 Tel : (408) 744-0810 ·TWX : 910-339-9297
*Trademark of Texas Instruments
CIRCLE 128 ON INQUIRY CARD
EAST· NORTHEAST·
CENTRAL· WEST· SOUTHWEST·
(301) 459-7430 (617) 245 -8790
(312) 296-8018 (408) 744 -1727 (817) 277-2246
£1JlJ&!Jr:J
The Electronics Group
DIRECTORY OF INDONESIAN IMPORTERS & EXPORTERS 1980 81
A MUST IF YOU WISH TO EXPOR T TOOR BUY FROMINDONESIA!
e ENGLISH EDITION e COMPREH ENSIVE e APPROXIMATELY
20,000 LISTINGS ,
e CLASSIFIED IN
ALP HA BETICAL ORDER
Price: S$300.00 (or US$150.00) includi ng registered air-mail parcel postage .
World-W ide Import-Export Promotion Centre, 5654, 5th Floor, Woh Hup Complex, Beach Road, Singapore, 0719. Republic of Singapore. Tels: 2943069, 2927550
ORDER FORM
Please send me / us ONE copy of " Directory of Indonesian lniporters & Exporters 1980·81 ". Enclosed is a bank drafl for SS300.00(or US$150.00),
NAME : ADDRESS:
Date :
... . Signature :
CIRCLE 1 14 ON INQUIRY CARD
THE SOLID STATE MEMORY
MARKET IN WEST EUROPE
The West European solid state memory market will undergo phenomenal growth over the next decade, as consumption moves from an estimated $210 million or 2.9 billion bits in 1978, to $494 million or 17.7 billion bits in 1982, and finally in 1990, to over $1 .4 billion or 457 billion bits. The United States industry, and to a lesser extent the Japanese, have the greatest impact and influence on the W. European industry. Device prices are determined in the U.S. Ten of the top 12 solid state memory suppliers are American. Ten of the 13 major semiconductor process and product innovations over the last nine years have come from the United States. With rapid advances in semiconductor technology from discrete devices to integrated circuits, European manufacturers have been too slow to take advantage of exploiting the new technologies. While U.S. suppliers were enjoying the advantages of a healthy national economy, vertical integration and heavy spending on research and development, Europe's economic situation was questionable, companies were sadly lacking the vertical integration, and spending on research and development was too small to be of any significance. There is .strong evidence now, however, that changes are coming, albeit slowly.
Frost & Sullivan has completed a 667-page, two-volume analysis and forecast of the W. European solid state memory market. The report, which covers 13 principal W. European countries, is believed to be the mbst comprehensive work of its kind on this market.
Price: $1 ,650. Send your check or we will bill you. For free descriptive literatvre, plus a detailed Table of Contents, contact:
FROST & SULLIVAN 106 Fulton Street New York, New York 10038 (212) 233-1080
J ADVERTISERS' INDEX
ADAC Corp ... ... ............. .... ............................................ ..... -4 Adaptive Science Corporatian ...........·.· .. ......·........·. ............. 208 Advanced Electronics Design , lnc................................ ......... 197 Advanced Micro Devices.. ....... ................................... .....34 , 35 Advant Corporation ............... .. .................... .... ......... ..........69 AMCEE ..... .. .. ......... ... ........................................ . ....... ....... 152 American Microsystems , Inc....... ............. ... ........... ............ ..8, 9
Ametek , Inc , Lomb Electric Div.......................... ... ..................... ............ 173
AMP , lnc............................................................ .....23, 24, 25 Ann A rbors Terminals , Inc....... ... ............................. ...........208
Aud iotr onics , Video Display Div .·........·................ .... .................. .............48c
Aviv Corporation ... ... .... ....................................................200 Ax iom Corporation ..... .............. ... ............. . ....... ..... ........ .... 171
Ball Computer Products Div .. ..............·........·.........................75 Beehive International. .... ...... .. .. .. .........................................63
Belden Corp ., Electronic Div ........ ........... . .......................... .. ............. ..... 167
Berqu ist .. ......................... .... .... ............ ....... .... ....... ......... 207
Canon USA, Inc ., Electronic Components Div.... ......................·........·................80
Centronics Data Computer Corp............... .. ............. ... .......... 185
Century Data Systems , a Xerox Co .. ...... .... .. .... .................. ........ . ..................... 16, 17
Cha\co Engineering Corporation ............. ............. ...... ........ ....58 Charles River Data Systems, lnc .. ...........................................96 Columbia Data Products , Inc....... ..................... .... ........ .........68 Compos Microsystems ..... ..... ...·........·........·........................ 146
Compu ter Automation , Inc., Naked Mini Div ........................ ............... .. ....... ..... ..... .......45
Computer Sciences Corp., Systems Div .......... .. ...... .. ... .................. ......................... .'.169
Computrol ............. ... ... . ...................................... ........... . .. 176
Cortron , a div of Illinois Tool Works lnc. .......................... .................... 107
Cromemco Inc................. ... ..... .......................... ........... ....... 2
Data General Corp ............................ .... ...................... 128, 129 Data Management Labs .. ................................... ............... ...29 Data ram Corp ......... .. ... .. ...... , ........... ........................ ...........5 Data Systems Design , Inc..................................................... 11 Datum Inc......................... ....... .............. .. .. ....... ............ ...48a Digi -Data Co rporation .... .......... ............ ...... ............ ..... ....... 181 Dig ital Equipment Corp.... ... ............................................82 , 83 Dig ital Pathways , Inc.................... ............................ ......... 145 Dynatech Data Systems ...... ... ... ................ ............................ 15
EG&G Reticon ..... ............. ...... ............................. .............. 184 EMM Sesco , Severe Environment Systems Co .
A Subsidiary of Electronic Memories & Magnetics Corp..... .. ......... ... 193 EST Company ........ .. ........... ................................ ... .......... .180
Ex-Cell -O Corp , Remex Div ... ..... . ... ,........ ....................... . ...... ................... 143
Frost and Sullivan ................................... ... ........... .............206 Fuj i tsu America, Inc..................... ... ................ .. ................. 121
Component Soles Div ........................... .. ... .. ....................... 161
Gates Energy Products , Inc .. ...................... . ......................... 165
GAW Control Corp"., TDX Peripherals Div ,...... .. ............................................. ..... 170
General Electric Company Terminet Div ...... .... .... . ...... ..... ........................... ...... . ....... 141
General Term inal Corp ...... .... ................................ ....... .. ... .203 GenRad/ Futuredata .... ................... .......... ......................52, 53 Gould , Inc .,
Electronic Power Supply Div ............................................135, 136 Instruments Div ...... ............................ ........ ............ ........7, 71 G rayh ill Inc .... ... ............... ... ... ............................... ... , ....... 186 GTE M icrocircuits ... ............. ... ....................... . ......... .......... 151
Hewlett Packa rd Co.............................................37, 38, 39, 179
Hiac/ Royco,
·
Instruments Div ,. ........................ .. ..... .... ........................... 158
High Precision Grinding & Mfg., lnc ................................ ...... .142
Houston Instrument,
Graphics Div. of Bausch & Lomb.... ..... .. ............... ............Cover 111
Hycom ... .... .............. .. ·... ...... ............................. .. ............ 194
Hytek M icrosystems Inc . .... ................................................. 180
206
COMPUTER DESIGN /JULY 1980
IBM, Doto Processi ng Div ... ...... ........ ... ..... ...... ....·..... . ... ...... .. :...65 Innovative Data Technology ....... ..... ............ .... ........ .... ........ 191 Intel Corp...... ..... ... ........ .. ..... .............................·48d , 48e, 139 Intelligent Systems Corp. ........ ...... ........ .............................. 155 lntersil. ..... ............. .. . .... ...... .... .... .. ..................... .... ....... 12, 13 lntertec Data Systems .... ......... ...... ............... ...... .. ........... .. . 163 C. ltoh Electronics, Inc.... ..... ... .. .... ... ... ...... ...................... ... .192 ITT Cannon Electric ,
a Div. of In ternational Telephone & Telegraph Corp ..... . .......... 124 , 125
Kennedy Co., Subsidiary, Magnetics & Electronics Inc ·...... .............. ...... ......... .. .. 1
Lear Siegler, Inc. Doto Products Div ... ................... .. ..... ............ ............. ..79, 130
MbB Systems, Inc... ......... . .... ...... ..·............. ..... ........ .. ........ 147 Megatek Corp .... .. .·....... ......... .... .. ........... .................... Cover II Michigan Plastic Products,
A JSJ Corp . Co ........... ............ ....... ........................ .·..........72 MicraSwitch ,
a Honeywell Div... . .... ... .... ..................... .. ..........·...... ....... ..31 Millenium Systems. ·... ...... ..... ...... ...... .............. .... ...........60, 61 Monolithic Memories , Inc... .. .......... .. .................. .. ·...... ....20, 21 Monolithic Systems Corp .. ... ........ .. . .......... ... ..... ....·...............84 Mostek Corporation ..... .. ......... .. .... . ......... ........ .......... .. ..... ..149 Motorola lnc.........·. ...... ........... ................. .... ...... .48h, 132, 133 Motorola Semiconductor Prods Inc.... .... .......... .......... .. ...........95
Nichicon (America) Corporation ... .. .. .... ...... .......................... 110 North Star Computers , Inc ............. . ......... .... .. .......·.. . ........ .. ..41
Optical Information Systems....... .. .. . ... .. .. .. .................. ......... 119 Optical Coating Laboratories ... .... . .. ................ ........ ..... .. .......59 Opto 22......... ..... .·........... .. ....... ... ..... .. .... ..... .. ...·...............67
Perkin-Elmer, Memory Products Div .. .. ... ........... ...... ............ ......... ..... ......... 19
Pertee Computer Corp., Peripherals Div ......... .................. .... .............. .. ...................49
Philips Laboratories .. .... ............. ... ·.... ..... ........... .... ..... ....... 162 Power-One Inc......·..... ..... ... ................... ............·.. .... .. ..... ..57 Practical Automation , lnc........ ......... .. ..... .................. .. ........ 150 Priam , Inc .... .......... .... ........... ....... .......... .. ........ ... .... ......... 199
Qantex , Div. of North Atlantic Industries... ..... . ..... .... ................... ........ 127
Qume, Memory Products Div ....... ... .. .. .................... .........·.... ... ...... ..81
Racal-Vadic .................... ... ... ......... ....................· ...... ....... 205 Ramtek .....·.. ... .....·............. ....... .. .......... .... ........· ......Cover IV Raymond Engineering lnc...............·.. .... .................. ... ....... .. 190 Robbins & Myers, Inc.,
Electric Motor Div .........................·... ....... ............ .. ... ...... ... 189 Rockwell International,
Bubble Memory Prods, Electronic Devices Div .... ...... ..........76, 77, 183
Shugart Associates . ...................... .... ... ........................ 108, 109 Signetics Corp.,
o Subsidiary of U.S. Philips Corp .. .. ...·........ ......... ... .. ... ......... .. 123 The Singer Co. ,
Li broscope Div .. ..... ...... ................ .. ............ .. .. ... . ... .. .. . ......48g Storage Technology Corp ................. ..... .. ... ...........·.. .... ... .42, 43 Systems Engineering Laboratories, Inc .. ............... .... . ............ .. 157
Teac Corporation of America , Industrial Products Div .......... .. .. .....·............. .. ... .........·... . .... 188
Tektron ix , lnc .... ......... ....... .......... .... ... .............................. 131 Te Icon Industries , Inc .. ........ ....... ........ .. .............................. 159 Teledyne Relays ................ ... .. ......·.. .... ............ ....... .... .. ..... 195 Telex Computer Prods, lnc. ...... ............ ..................... ..... .. ... 187 TEXAS INSTRUMENTS INC. .. ...........·........ ..... 26, 27 , 51 , 54, 55 , 175 3M Company,
Doto Products Div .... .. ......... ............. .. ·............ .. ....... ... ...32, 33 Toshiba America , lnc ............. ..... ... ... ............... ............. .....153 Trilog ...... ... ... ... ..... ............. ·.... ........... ........ ..... .. ........ ...... 156 Triple I lnc .. ................ ... ... .. ..... ................... .......................73
Vermont Research Corp... ....... ...... ... ................ ...... ............. 177 Vikron .............. .................... ... ....... .. ........ ..... ................. 194 Visual Technology lnc...... ....... ..... .. ................. ...... ..... ...... .. 201
World -Wide Import-Export Promotion Ctr ........ ............ ....... .... 206
Zilog, an Affiliate of EXXON Enterprises lnc. ....... ..... ........ ........ ......46, 47
"SIL-PADS 400"
fl\nnnn~n THE SUPERB
U~U!J\!/\!/ HEAT-SINK
INSULATORS
... can be bought with ADHESIVE BACKING
Overcome heat-sin k problems with " SIL-PADS 400 ": thin , toug h, lami nated layers of silicone rubbe r and fiberg lass. Th ermally conductive and electrically insu lating . Cut-through, tearing , and breaking problems are gone . El iminates grease and mica or plastic film .
Adhesive backing gives excellent contact for IC 's, DIP 's; to heat ra ils or PC boards . Attaches to vertical parts whe re you need 3 hand s. Extensively used with solid state relays, transistors, and bridge rectifi ers.
Scores of standard configuration s are available and shown in literature. Custom parts are also produce d to your design . Thicknesses to suit various applications.
Since 1973, Bergquist has solved heat-sink problems with " SILPAD S". TEST 'EMI
FREE SAMPLES, TECHNICAL DATA,
and LITERATURE!
BEAEiQUl5T
5300 Edina Industrial Blvd . Minn eapolis . MN 55435 Phone (612) 835-2322 TW X 910-576-2423
CIRC LE 1 26 ON INQUIRY CARD
207
GOOD CRT'S COME IN SMALL PACKAGES
Who says a CRT terminal has to be big and bulky to do a good job? At Ann Arbor Terminals,
we offer a full 15-inch screen and de-
tached keyboard as standard on all our desktop terminals . And the case is only
14" wide by 15 " high by 13.6" deep. We're known throughout the industry for our high quality and reliability. On top of this , we prob-
ably have the widest range of available options in the field. Display formats from 256 to 4800 characters . Foreign language character sets . Special command sets. Custom keyboards . Editing, protected fields and block transmit. And if your application doesn't lend itself to a desktop terminal, we offerdisplay controllers (especially good in industrial environments) for use with freestanding monitors. Or buy our terminal without the case and mount it in your own console. So when the CRT is the focal point ofyoursystem , why settle for a large case and small screen? You can have excellent readability "".ithout taking up a lot of room. And get the features you need . Call us for more information at Ann Arbor Terminals, Inc. , 6175 Jackson Road , Ann Arbor, Michigan 48103 . Tel : (313)663-8000. TWX: 810-223-6033.
CC SALES OFFICES
NEW ENGLAND AND UPSTATE NEW YORK
CALDWELL ENTERPRISES, INC. Lindsay H. Caldwell 129 Cedar Hill Rd. East Dennis, MA 02641 (617) 385-2533
LONG ISLAND AND MIDDLE ATLANTl.C STATES
CALDWELL ENTERPRISES, INC. Richard V. Busch 6 Douglass Dr., R.D. #4 Princeton, N.J. 08540 (201) 329-2424
CIRCLE 11 5 ON INQUIRY CARD
SOUTHEASTERN STATES
COLLINSON & CO., INC. Newton B. Collinson, III Anthony C. Marmon 4419 Cowan Rd., Suite 302 Tucker, GA 30084 (404) 939-8391 (800) 241-9461
MIDWESTERN STATES
Berry Conner, Jr. 88 West Schiller St. Suite 2208 Chicago, IL 60610 (312) 266-0008
WESTERN STATES AND TEXAS
BUCKLEY/BORIS ASSOC., INC. Terry Buckley Tom Boris John Sabo 22136 Clarendon St. Woodland Hills, CA 91367 (213) 999-5721 (714) 957-2552
208
CIRCLE 116 ON INQUIRY CARD
COMPUTER DESIGN/JULY 1980
Intelligent Graphics from the smart one
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RECORDS GRAPHICSFROM AN ANALOG ANDa'··oR
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PRINTS COLIJl'f N DATA
The intelligent one is ideal for microprocessor con·
" '
trolled instrument systems such as -chromatographs,
spectrophotometers, densitometers and polargraphs.
Th e TISPP is a new generation of recorder desig ned to meet your more sophisticated recording needs. IEEE an d RS -232-C compatible, under microprocessor control , the TIS PP records from either an analog or digital source, functioning as eit her a strip ch art recorder or a digital plotter. And it annotates the data, printing either duri ng or after curve data input. Thermal plotting speed compensation provides uniform trace quality while plotting up to 75 cm (30 in) per second . Print speed 25 characters per second , full scale analog sensitivity from 10MV to 5V full scale , 12 bit binary full scale digital , chart speeds from one second per cm to 62 minutes per cm .
Th e TI SPP is the Intelligent one that will satisfy most of your recorder/printer requirements.
For complete information and descriptive literature contact Houston Instrument, One Houston Square, Austin , Texas 78753 . (512) 837-2820. For rush literature requests o utside Texas call toll free 1-800-531-5205. In Europe contact Houston Instrument , Rochesterlaan 6, 8240 Gistel , Belgium . Phone 059/27-74-45. Telex Bausch 81399 .
houston instrument
GRA PHICS DIVISION OF
BAUSCH & LOMB @
See us a t SIGGRAPH '80 in booth 312 Circle number 117 for literature
Circle number 1 18 to have a Representative call.
HoYI can a graphics display system save softv#are development time?
By giving you everything you need to start applications programming .
The Ramtek 9400 puts you in the picture fast. We've already solved your graphics problems in the 9400 so you can get your application on line without waiting for-or spending money on-needless systems software development.
The 9400 puts you in total control. Monitor the situation in real time. Reduce an extremely large or complex picture for a quick look or enlarge portions of it for a closer one without distorting line thickness, texture or character size. At the same time, the 9400 automatically displays the appropriate detail so the picture is always clearly understood.
Need to interact with the picture? Our exclusive entity detection feature lets you identify objects that are pointed out on the screen.Whether a single line or a complex object, let the 9400 find and identify them to the host computer.
Need high resolution or fast response? The 9400 offers a wide range of resolutions up to 1280 X 1024 picture elements in full color. System throughput of over 16,000 vectors per second permits multi-channel operation without sacrificing response time. The bright TV-like picture makes it easy to use in normal room lighting.
For more information on the 9400 and Ramtek monitors and accessories, write: Ramtek, 2211 Lawson Lane, Santa Clara, CA 95050. Or call your nearest Ramtek office.
How much can graphics do? To find out more about the power of full color interactive graphics, request the booklet "Sophisticated Graphics for Control Systems'.' It's Issue Number 3 of Ramtek's "USE OUR EXPERIENCE" Series.
A*a.ntck
: : SoplMaited Systems.
Ramtek
Our Experience Shows.
REGIONAL OFFICES: Santa Clara, CA (408) 988-2211 , Newport Beach , CA (714) 979-5351, Seattle ,WA (206) 838-5196, Albuquerque, NM (505) 884-3557, Dallas,TX (214) 422-2200, Maitland , FL(305)645-0780, Huntsville, AL(205) 837-7000, Chicago, IL(312) 956-8265, Cleveland . OH (216) 464-4053,Washington , DC (301) 656-0350, Metropolitan NY (201) 238-2090, Boston , MA (617) 862-77'20,The Netherlands 312968 5837.
CIRCLE 121 ON IN9UIRY CARD
Acrobat 11.0.13 Paper Capture Plug-in