Renesas RA4W1グループユーザーズマニュアル ハードウェア編
File info: application/pdf · 1551 pages · 16.25MB
Renesas RA4W1グループユーザーズマニュアル ハードウェア編
RA RA4W1, Segment LCD & capacitive touch Controller, Arm Cortex-M4 core, 14bit ADC, USB Full-Speed, Low-power, Security and safety features, Bluetooth5.0
Extracted Text
User's Manual
Renesas RA4W1
32
32-bit MCU Renesas Advanced (RA) Family Renesas RA4 - Efficiency Series
www.renesas.com
Rev.1.00 2020.08
1.
2.
3.
4.
5. OA AV Harsh environment
6.
7. Harsh environment
8. RoHS
9.
10.
11.
12.
1.
2. 1
(Rev.4.0-1 2017.11)
1. CMOS CMOS CMOS
2. LSI
3.
4. CMOS LSI LSI
5.
6. CMOS VILMax. VIHMin.VILMax. VIH Min.
7.
8.
1.
CPU MCU
2.
MCU MCU
3.
MCU
TU
MCU
MCU
4.
011b 1Fh
1234
2 3 2 011b 16 31 16 1Fh C/C++ 0x 16 10 10
5.
ICU.NMICR.NMIMD ICU.NMICR NMICR.NMIMD NFCLKSEL[1:0]
ICUNMICR NMIMD
ICUNMICR
NMICRNMIMD
NFCLKSEL[1:0] NMI (NMICR) 2
6.
b B k
K
Bit
Byte MCU
1000 = 103 k 1024210 1000103
1024 = 210 1000103 1024210
7.
NC Hi-Z
NC MCU
8.
X.X.X NMI NMICR
ICU.NMICR 4000 6100h
(1)
b7
b6
b5
b4
b3
b2
b1
b0
(2)
NFLTE N
--
NFCLKSEL[1:0]
--
--
-- NMIMD
0
0
0
0
0
0
0
0
(3)
(6)
(4)
(5)
R/W
b0
NMIMD
NMI
0
R/W
1
b3-b1 --
00
R/W
b5-b4
NFCLKSEL[1:0]
NMI
b5 b4
0 0PCLKB 0 1PCLKB/8 1 0PCLKB/32 1 1PCLKB/64
R/W
b6
--
00
R/W
b7
NFLTEN
NMI
0
R/W
1
(1)
ICU.NMICR 4000 6100h ICU NMI NMICR 4000 6100h
(2) 32 b31 b0 16
b15 b0 8 b7 b0
(3)
2 0 0 1 1 x
(4) --
(5)
(6) R/W R/W R/W R/(W) R W
9.
AES
AHB
AHB-AP
APB
ARC
ATB
BCD
BSDL
DES
DSA
ECC
ETB
ETM
FLL
FPU
GSM
HMI
IrDA
LSB
MSB
NVIC
PC
PFS
PLL
POR
PWM
RSA
SHA
S/H
SP
SWD
SW-DP
TRNG
UART
Advanced Encryption Standard Advanced High-performance Bus AHB Access PortAHB Advanced Peripheral Bus Alleged RCAlleged RC Advanced Trace Bus Binary Coded Decimal2 10 Boundary Scan Description Language Data Encryption Standard Digital Signature Algorithm Error Correction Code Embedded Trace Buffer Embedded Trace Macrocell Frequency Locked Loop Floating Point Unit Global System for Mobile communications 2 (2G) Human Machine Interface Infrared Data Association Least Significant Bit Most Significant Bit Nested Vector Interrupt Controller Program Counter Port Function Select Phase Locked Loop Power-on Reset Pulse Width Modulation Rivest Shamir AdlemanRivest/Shamir/Adleman Secure Hash Algorithm Sample and Hold Stack Pointer Serial Wire Debug Serial Wire-Debug Port True Random Number Generator Universal Asynchronous Receiver/Transmitter
10.
Arm� Cortex� Arm Limited CoreSightTM Arm Limited CoreMark� Embedded Microprocessor Benchmark Consortium
Magic PacketTM Advanced Micro DevicesInc. SuperFlash� Silicon Storage TechnologyInc. Bluetooth� Bluetooth SIG, Inc.
.......................................................................................................................................................... 47
1. ................................................................................................................................................ 48
1.1
........................................................................................................................... 48
1.2
........................................................................................................................... 54
1.3
...................................................................................................................................... 55
1.4
........................................................................................................................... 56
1.5
.............................................................................................................................. 57
1.6
........................................................................................................................... 60
1.7
.............................................................................................................................. 61
2. CPU ............................................................................................................................................... 64
2.1
...................................................................................................................................... 64
2.1.1
CPU ............................................................................................................................. 64
2.1.2
...................................................................................................................... 64
2.1.3
................................................................................................................... 65
2.2
MCU ....................................................................................................... 66
2.3
..................................................................................................... 67
2.4
JTAG/SWD ................................................................................................ 67
2.5
.................................................................................................................... 67
2.5.1
.................................................................................................... 67
2.5.2
................................................................................................. 68
2.5.2.1
................................................................................................ 68
2.5.2.2
.............................................................................................................. 68
2.6
................................................................................................................ 69
2.6.1
............................................................................................................... 69
2.6.2
Cortex-M4 .................................................................... 69
2.6.3
CoreSight ROM ............................................................................................ 70
2.6.3.1
ROM ..................................................................................................... 70
2.6.3.2
CoreSight .................................................................... 70
2.6.4
DBGREG .................................................................................................. 71
2.6.4.1
DBGSTR......................................................... 71
2.6.4.2
DBGSTOPCR............................... 72
2.6.4.3
TRACECTR................................................. 73
2.6.4.4
DBGREG CoreSight ................................................... 73
2.6.5
OCDREG .................................................................................................. 74
2.6.5.1
ID IAUTH0 3.............................................................. 74
2.6.5.2
MCU MCUSTAT............................................................. 75
2.6.5.3
MCU MCUCTRL........................................................ 76
2.6.5.4
OCDREG CoreSight ................................................... 76
2.7
CoreSight ATB ..................................................................................................... 77
2.8
& ............................................................................... 77
2.9
SysTick ...................................................................................................... 77
2.10 CoreSight ............................................................................. 78
2.11 OCD ....................................................................................................... 78
2.11.1 DBGEN ........................................................................................................................ 78
2.11.2 ID .................................................................................................. 78
2.11.3 OCD ......................................................................... 79 2.11.3.1 .......................................................................... 79
2.11.3.2 OCD ............................................ 79
2.11.3.3 OSIS ID ........................................................ 79
2.11.3.4 JTAG/SWD ............................................................................... 79
2.12 .............................................................................................................................. 81
3. ..................................................................................................................................... 82
3.1
...................................................................................................................................... 82
3.2
................................................................................................................ 82
3.2.1
................................................................................................. 82
3.2.2
SCI ........................................................................................................ 82
3.2.3
USB ....................................................................................................... 82
3.3
.................................................................................................................... 83
3.3.1
....................................................................... 83
4. ................................................................................................................................. 84
4.1
...................................................................................................................................... 84
5. MMF............................................................................................................. 85
5.1
...................................................................................................................................... 85
5.2
.................................................................................................................... 86
5.2.1
MemMirror MMSFR................................................................... 86
5.2.2
MemMirror MMEN................................................................. 87
5.3
.............................................................................................................................. 88
5.3.1
................................................................................................. 88
5.3.2
.......................................................................................................................... 92
6. ......................................................................................................................................... 93
6.1
...................................................................................................................................... 93
6.2
.................................................................................................................... 97
6.2.1
0RSTSR0............................................................... 97
6.2.2
1RSTSR1............................................................... 99
6.2.3
2RSTSR2............................................................. 101
6.3
............................................................................................................................ 102
6.3.1
RES ..................................................................................................... 102
6.3.2
.................................................................................................. 103
6.3.3
...................................................................................................... 104
6.3.4
......................................................................... 105
6.3.5 6.3.6 6.3.7 6.3.8
................................................................................ 105 ............................................................................................... 105 ....................................................... 106 ........................................................................................... 107
7. ................................................................................................................. 108
7.1
.................................................................................................................................... 108
7.2
.................................................................................................................. 109
7.2.1
0OFS0.................................................................. 109
7.2.2
1OFS1.................................................................. 113
7.2.3
MPU ........................................................................................................... 114
7.2.4
AWSC....................................... 115
7.2.5
AWS............................................................... 116
7.2.6
OCD ID OSIS............................................. 118
7.3
..................................................................................... 119
7.3.1
........................................................... 119
7.3.2
..................................... 119
7.4
.............................................................................................................. 119
7.4.1
........ 119
8. LVD....................................................................................................................... 120
8.1
.................................................................................................................................... 120
8.2
.................................................................................................................. 122
8.2.1
1 1LVD1CR1......................................... 122
8.2.2
1 LVD1SR.................................................. 122
8.2.3
LVCMPCR............................................... 123
8.2.4
LVDLVLR............................................................... 123
8.2.5
1 0LVD1CR0......................................... 124
8.3
VCC ..................................................................................................... 125
8.3.1
Vdet0 ........................................................................................................... 125
8.3.2
Vdet1 ........................................................................................................... 125
8.4
0 .......................................................................................................... 126
8.5
1 1 ...................................................................... 127
8.6
................................................................................................... 129
8.6.1
..................................................................... 129
9. ........................................................................................................................ 130
9.1
.................................................................................................................................... 130
9.2
.................................................................................................................. 135
9.2.1
SCKDIVCR................................... 135
9.2.2
SCKSCR................................... 137
9.2.3
PLL 2PLLCCR2................................................ 138
9.2.4
PLL PLLCR...................................................................... 139
9.2.5
MEMWAIT................................ 140
9.2.6
MOSCCR..................................... 143
9.2.7
SOSCCR......................................... 144
9.2.8
LOCOCR............................... 145
9.2.9
HOCOCR.............................. 146
9.2.10 MOCOCR.............................. 147
9.2.11 OSCSF......................................................................... 148
9.2.12 OSTDCR.................................................... 150
9.2.13 OSTDSR........................................................ 151
9.2.14 MOSCWTCR................. 152
9.2.15 HOCOWTCR.......... 153
9.2.16 MOMCR............................ 154
9.2.17 SOMCR................................. 154
9.2.18 LCD SLCDSCKCR............... 155
9.2.19 CKOCR................................................... 156
9.2.20 LOCO LOCOUTCR............................. 157
9.2.21 MOCO MOCOUTCR........................... 158
9.2.22 HOCO HOCOUTCR............................ 159
9.2.23 TRCKCR............................................. 159
9.2.24 USB USBCKCR................................................. 160
9.3
....................................................................................................... 161
9.3.1
....................................................................................... 161
9.3.2
.................................................................................... 161
9.3.3
......................................................................... 161
9.4
.......................................................................................................... 162
9.4.1
32.768kHz ..................................................................... 162
9.5
Bluetooth .......................................................................................... 163
9.5.1
............................................................................................... 163
9.5.2
Bluetooth ............................................................ 163
9.6
.............................................................................................................. 164
9.6.1
.................................................................................... 164
9.6.2
............................................................................................... 166
9.7
PLL ............................................................................................................................ 166
9.8
..................................................................................................................... 167
9.8.1
ICLK........................................................................................ 168
9.8.2
PCLKAPCLKBPCLKCPCLKD........................... 169
9.8.3
FCLK.......................................................... 169
9.8.4
USB UCLK............................................................................................. 169
9.8.5
CAN CANMCLK..................................................................................... 169
9.8.6
CAC CACCLK........................................................................................ 170
9.8.7
RTC RTCSCLKRTCLCLK.......................................................... 170
9.8.8
IWDT IWDTCLK............................................................................. 170
9.8.9
AGT AGTSCLKAGTLCLK.......................................................... 170
9.8.10 SysTick SYSTICCLK........................................................... 170
9.8.11 LCDC LCDSRCCLK................................................. 170
9.8.12 CLKOUT............................................................ 171
9.8.13 JTAG JTAGTCK.................................................................................... 171
9.8.14 BLE ......................................................................................................... 171
9.9
.............................................................................................................. 172
9.9.1
......................................................................... 172
9.9.2
........................................................................................... 172
9.9.3
.................................................................................... 172
9.9.4
............................................................................. 172
10. CAC......................................................................................... 173 10.1 .................................................................................................................................... 173 10.2 .................................................................................................................. 175 10.2.1 CAC 0CACR0.................................................................. 175 10.2.2 CAC 1CACR1.................................................................. 176 10.2.3 CAC 2CACR2.................................................................. 177 10.2.4 CAC CAICR....................................................... 178 10.2.5 CAC CASTR........................................................................ 179 10.2.6 CAC CAULVR...................................................................... 180 10.2.7 CAC CALLVR....................................................................... 180 10.2.8 CAC CACNTBR........................................................ 180 10.3 ............................................................................................................................ 181 10.3.1 .................................................................................................. 181 10.3.2 CACREF .................................................................... 182 10.4 ..................................................................................................................... 182 10.5 .............................................................................................................. 182 10.5.1 ................................................................................ 182
11. ........................................................................................................................ 183 11.1 .................................................................................................................................... 183 11.2 .................................................................................................................. 188 11.2.1 SBYCR........................................................... 188 11.2.2 AMSTPCRA.................................... 189 11.2.3 BMSTPCRB.................................... 190 11.2.4 CMSTPCRC................................... 192 11.2.5 DMSTPCRD................................... 193 11.2.6 OPCCR.............................................................. 194 11.2.7 SOPCCR.................................................... 195 11.2.8 SNZCR.............................................................. 196 11.2.9 SNZEDCR.................................................. 197 11.2.10 SNZREQCR............................................... 199
11.2.11 FLSTOP.................................................. 201
11.2.12 PSMCR............................................ 202
11.2.13 OCD SYOCDCR......................... 202
11.3 ...................................................................... 203
11.4 ................................................................................................... 203
11.5 .................................................................................................................. 203
11.5.1 ................................................................................ 203
11.5.2 .................................................................................................................... 206
11.6 .................................................................................................................. 209
11.6.1 ........................................................................................... 209
11.6.2 ............................................................................................... 209
11.7 ........................................................................................ 211
11.7.1 .................................................................. 211
11.7.2 ..................................................................... 212
11.7.3 .................................................................. 213
11.8 .................................................................................................................. 214
11.8.1 ........................................................................................... 214
11.8.2 ............................................................................................... 215
11.8.3 .................................................................. 216
11.8.4 ........................................................................................... 218
11.9 .............................................................................................................. 221
11.9.1 ...................................................................................................... 221
11.9.2 I/O ....................................................................................................... 223
11.9.3 DMAC DTC ............................................................... 223
11.9.4 ...................................................................................................... 223
11.9.5 ....................................................................................... 223
11.9.6 WFI .............................................................................................. 223
11.9.7
DMAC DTC WDT/IWDT ................................................................ 223
11.9.8 .................................................................. 224
11.9.9 RXD0 ..................................... 224
11.9.10 SCI0 ...................................................................... 224
11.9.11 A/D .............................................................. 224
11.9.12 CTSU ..................................................................... 224
11.9.13 ELC .................................................................... 225
11.9.14 ADC140 .............................................................. 225
11.9.15 ........................................................... 225
12. .......................................................................................................... 226 12.1 .................................................................................................................................... 226 12.1.1 ....................................................................................... 226 12.1.2 ............................................................................................... 226
12.1.3 VBATT ............................................................................................. 226 12.1.4 VBATT_R ............................................................................................... 226 12.1.5 ............................................................................................... 227 12.1.6 VBATT ................................................................ 227 12.1.7 ........................................................................................... 227 12.2 .................................................................................................................. 229 12.2.1 VBATT 1VBTCR1............................................................ 229 12.2.2 VBATT 2VBTCR2............................................................ 230 12.2.3 VBATT VBTSR..................................................................... 231 12.2.4 VBATT VBTCMPCR................................... 232 12.2.5 VBATT VBTLVDICR................. 232 12.2.6 VBATT VBTBKRn(n = 0 511) ..................................... 233 12.2.7 VBATT VBTWCTLR................................ 233 12.2.8 VBATT I/O 0 VBTWCH0OTSR........... 234 12.2.9 VBATT VBTICTLR.................................................... 234 12.2.10 VBATT VBTOCTLR................................................... 235 12.2.11 VBATT VBTWTER.................... 236 12.2.12 VBATT VBTWEGR.......................... 236 12.2.13 VBATT VBTWFR............................. 237 12.2.14 BKRACR........................ 238 12.3 ............................................................................................................................ 239 12.3.1 ....................................................................................... 239 12.3.2 VBATT .................................................................... 241 12.3.3 VBATT .................................................................................. 241 12.3.4 VBATT .................................................................... 242 12.3.5 VBATT .................................................. 243 12.4 .............................................................................................................. 245
13. ................................................................................................... 246 13.1 .................................................................................................................................... 246 13.2 .................................................................................................................. 247 13.2.1 PRCR................................................................................... 247
14. ICU....................................................................................... 248 14.1 .................................................................................................................................... 248 14.2 .................................................................................................................. 250 14.2.1 IRQ iIRQCRii = 0 4, 6, 7, 9, 11, 14, 15.................. 250 14.2.2 NMISR.......................................... 252 14.2.3 NMIER.......................................... 255 14.2.4 NMICLR............................. 257 14.2.5 NMI NMICR................................................ 259 14.2.6 ICU nIELSRn........................................................ 260 14.2.7 DMAC nDELSRn.................................................. 262
14.2.8 SYS SELSR0........................................................ 263 14.2.9 WUPEN........................................ 264 14.3 .................................................................................................................. 266 14.3.1 ........................................................................................... 266 14.3.2 ............................................................................................................. 268 14.4 ..................................................................................................................... 273 14.4.1 ......................................................................................................... 273 14.4.2 ............................................................................................... 275
14.4.2.1 CPU ............................................................................................ 275 14.4.2.2 DTC ....................................................................................................... 275 14.4.2.3 DMAC .................................................................................................... 276
14.4.3 ...................................................................................................... 276 14.4.4 ...................................................................................................... 277 14.5 ............................................................................................ 278 14.6 ............................................................................................ 279 14.6.1 ....................................................................................... 279 14.6.2 .............................................................. 279 14.6.3 ....................................................................................... 279 14.7 WFI ............................................ 280 14.8 ............................................................................................................................ 280
15. .............................................................................................................................................. 281 15.1 .................................................................................................................................... 281 15.2 ......................................................................................................................... 283 15.2.1 ................................................................................................................. 283 15.2.2 ........................................................................................... 283 15.2.3 .................................................................................................................... 284 15.2.4 ......................................................................... 284 15.3 .................................................................................................................. 285 15.3.1 BUSMCNT<master>...................................... 285 15.3.2 BUSSCNT<slave>...................................... 286 15.3.3 BUSnERRADD(n = 1 4) .................................. 287 15.3.4 BUSnERRSTAT(n = 1 4) ............................. 288 15.4 .............................................................................................................. 289 15.4.1 ....................................................................................... 289 15.4.2 ........................................................................................... 289 15.4.3 ....................................................... 290 15.4.4 ............................................................................................................. 291 15.5 .......................................................................... 291 15.6 ............................................................................................................................ 291
16. MPU..................................................................................... 292 16.1 .................................................................................................................................... 292
16.2 CPU ........................................................................................... 293 16.2.1 ......................................................................................................... 295
16.2.2 ....................................................... 295
16.2.3 ......................................................................................................... 296
16.2.3.1 MSP MSPMPUSA.................................................................................................. 296
16.2.3.2 MSP MSPMPUEA.................................................................................................. 296
16.2.3.3 PSP PSPMPUSA................................................................................................... 297
16.2.3.4 PSP PSPMPUEA................................................................................................... 297
16.2.3.5 MSPMPUOAD, PSPMPUOAD...................................................................... 298
16.2.3.6 MSPMPUCTL, PSPMPUCTL........................................................................ 299
16.2.3.7 MSPMPUPT, PSPMPUPT.............. 300
16.3 Arm MPU ........................................................................................................................... 301
16.4 MPU ................................................................................................................ 302 16.4.1 ......................................................................................................... 304 16.4.1.1 A n MMPUSAn(n = 0 15) ............ 304
16.4.1.2 A n MMPUEAn(n = 0 15) ............ 304
16.4.1.3
A n MMPUACAn (n = 0 15) ...................................................................................................... 305
16.4.1.4 MPU MMPUCTLA................................. 307
16.4.1.5 A MMPUPTA........................................................... 308
16.4.2 .................................................................................................................... 309 16.4.2.1 ...................................................................................... 309
16.4.2.2 ................................................................................................. 311
16.4.2.3 ............................................................................ 311
16.5 MPU ............................................................................................................ 312 16.5.1 ......................................................................................................... 313 16.5.1.1 3 SMPUMBIU......................... 313
16.5.1.2 9 SMPUFBIU....................... 314
16.5.1.3 4 SMPUSRAM0...................... 315
16.5.1.4 1 SMPUP0BIU.................... 316
16.5.1.5 3 SMPUP2BIU.................... 317
16.5.1.6 7 SMPUP6BIU.................... 318
16.5.1.7 MPU SMPUCTL........................................ 319
16.5.2 .................................................................................................................... 320 16.5.2.1 ...................................................................................... 320
16.5.2.2 ................................................................................................. 320
16.5.2.3 ............................................................................ 320
16.6 MPU ............................................................................................................ 321 16.6.1 ................................................................ 322 16.6.1.1 MPU SECMPUPCSnn = 0, 1............................................................................. 322 16.6.1.2 MPU SECMPUPCEnn = 0, 1............................................................................. 323 16.6.1.3 MPU 0 SECMPUS0................... 323 16.6.1.4 MPU 0 SECMPUE0................... 324 16.6.1.5 MPU 1 SECMPUS1................... 324 16.6.1.6 MPU 1 SECMPUE1................... 325 16.6.1.7 MPU 2 SECMPUS2................... 325 16.6.1.8 MPU 2 SECMPUE2................... 326 16.6.1.9 MPU 3 SECMPUS3................... 326 16.6.1.10 MPU 3 SECMPUE3................... 327 16.6.1.11 MPU SECMPUAC............... 328
16.6.2 ............................................................................................... 329 16.6.3 ....................................................................................... 330 16.7 ............................................................................................................................ 330
17. DMA DMAC...................................................................................................... 331 17.1 .................................................................................................................................... 331 17.2 .................................................................................................................. 333 17.2.1 DMA DMSAR................................................................ 333 17.2.2 DMA DMDAR............................................................... 333 17.2.3 DMA DMCRA................................................................... 334 17.2.4 DMA DMCRB..................................................... 335 17.2.5 DMA DMTMD...................................................................... 336 17.2.6 DMA DMINT..................................................................... 337 17.2.7 DMA DMAMD............................................................... 339 17.2.8 DMA DMOFR....................................................................... 342 17.2.9 DMA DMCNT................................................................ 342 17.2.10 DMA DMREQ............................................................ 343 17.2.11 DMA DMSTS....................................................................... 344 17.2.12 DMACA DMAST........................................................... 345 17.3 ............................................................................................................................ 346 17.3.1 ................................................................................................................. 346 17.3.2 ............................................................................................... 350 17.3.3 .................................................................. 352 17.3.4 .................................................................................................................... 356 17.3.5 ......................................................................................................... 357 17.3.6 DMAC .............................................................................................. 358 17.3.7 DMAC ............................................................................................................ 359 17.3.8 DMA ........................................................................................................ 360
17.3.9 DMA ............................................................................................. 360 17.3.10 ...................................................................................................... 361 17.4 DMA ................................................................................................................ 362 17.4.1 .................................................................. 362 17.4.2 ........................................................... 362 17.4.3 ..................................... 362 17.4.4 DMA ........................................................................... 363 17.5 ............................................................................................................................ 364 17.6 .................................................................................................................. 366 17.7 .................................................................................................................. 366 17.8 .............................................................................................................. 367 17.8.1 DMA ................................................................ 367 17.8.2 DMA .............................................................................. 367 17.8.3 DMAC
ICU.DELSRn ............................................................................................. 367 17.8.4 DMA ...................................................................................... 367
18. DTC.................................................................................. 368 18.1 .................................................................................................................................... 368 18.2 .................................................................................................................. 370 18.2.1 DTC AMRA................................................................................ 370 18.2.2 DTC BMRB................................................................................ 371 18.2.3 DTC SAR.................................................................................... 372 18.2.4 DTC DAR.................................................................................... 372 18.2.5 DTC ACRA...................................................................... 373 18.2.6 DTC BCRB...................................................................... 374 18.2.7 DTC DTCCR.................................................................... 374 18.2.8 DTC DTCVBR.................................................................. 375 18.2.9 DTC DTCST................................................................. 375 18.2.10 DTC DTCSTS...................................................................... 376 18.3 ............................................................................................................................ 377 18.3.1 DTC ................................................................... 377 18.4 ............................................................................................................................ 379 18.4.1 ................................................................................ 381 18.4.2 ..................................................................... 382 18.4.3 .................................................................................................. 382 18.4.4 .................................................................................................. 383 18.4.5 .................................................................................................. 384 18.4.6 ............................................................................................................. 386 18.4.7 ......................................................................................................... 387 18.4.8 DTC ................................................................................................. 389 18.4.9 DTC ................................................................................... 389 18.5 DTC ................................................................................................................ 390
18.6 DTC .................................................................................................................... 391 18.6.1 ............................................................................................................. 391 18.6.2 ............................................................................................................. 392 18.6.3 = 0 ......................................................................... 394
18.7 ..................................................................................................................... 396 18.8 .................................................................................................................. 396 18.9 ............................................................................................ 396 18.10 ................................................................................................... 397 18.11 .............................................................................................................. 397
18.11.1 ........................................................................................... 397
19. ELC.......................................................................................... 398 19.1 .................................................................................................................................... 398 19.2 .................................................................................................................. 399 19.2.1 ELCR...................................................... 399 19.2.2 nELSEGRn(n = 0, 1) ....... 400 19.2.3 nELSRn(n = 0 9, 12, 14 18) ....................... 401 19.3 ............................................................................................................................ 406 19.3.1 ..................................................................... 406 19.3.2 ...................................................................................................... 406 19.3.3 ............................................................................. 406 19.4 .............................................................................................................. 407 19.4.1 DMAC DTC ............................... 407 19.4.2 ............................................................................................... 407 19.4.3 ................................................................................ 407 19.4.4 ELC ............................................................................................................ 407
20. I/O .................................................................................................................................... 408 20.1 .................................................................................................................................... 408 20.2 .................................................................................................................. 410 20.2.1 1PCNTR1/PODR/PDR......................................... 410
20.2.2 2PCNTR2/EIDR/PIDR.......................................... 411
20.2.3 3PCNTR3/PORR/POSR...................................... 412
20.2.4 4PCNTR4/EORR/EOSR...................................... 413
20.2.5
mn PmnPFS/PmnPFS_HA/PmnPFS_BY (m = 0 5, 9; n = 00 15) ...................................................................................... 414
20.2.6 PWPR.................................................................... 416
20.3 ............................................................................................................................ 417 20.3.1 ...................................................................................................... 417
20.3.2 ......................................................................................................... 417
20.3.3 ELC ....................................................................................... 418 20.3.3.1 ELC ELC_PORT1, 2, 3, 4 ................................. 418
20.3.3.2 ELC ............................................. 419
20.4 .............................................................................................................. 420
20.5 .............................................................................................................. 421
20.5.1 .................................................................................................. 421
20.5.2 ................................................................................ 421
20.5.3 PODR ........................................................... 421
20.5.4 ......................................................................... 421
20.5.5 ............................................................................................... 422
20.5.6 USB_DP USB_DM .............................................................. 422
20.5.7
USBFS/GPIO P914 P915 ................................................................................................................................... 422
20.6 ................................................................................................... 423
21. KINT........................................................................................................... 429 21.1 .................................................................................................................................... 429 21.2 .................................................................................................................. 431 21.2.1 KRCTL........................................................ 431 21.2.2 KRF....................................................................... 431 21.2.3 KRM...................................................................... 432 21.3 ............................................................................................................................ 433 21.3.1 KRMD = 0............................................... 433 21.3.2 KRMD = 1........................................ 434 21.4 .............................................................................................................. 436
22. GPT POEG....................................................................... 437 22.1 .................................................................................................................................... 437 22.2 .................................................................................................................. 439 22.2.1 POEG n POEGGn(n = A, B) .......................................... 439 22.3 .......................................................................................................... 440 22.3.1 .................................................................................... 440 22.3.1.1 .............................................................................................. 440
22.3.2 GPT .......................................................................................... 441 22.3.3 ............................................................................. 441 22.3.4 .................................................................................... 441 22.3.5 .................................................................................................. 441 22.4 ..................................................................................................................... 442 22.5 GPT ........................................................................................... 442 22.6 .............................................................................................................. 443 22.6.1 .................................................................. 443 22.6.2 GPT ................................................................................................. 443
23. PWM GPT............................................................................................................ 444 23.1 .................................................................................................................................... 444 23.2 .................................................................................................................. 448 23.2.1 PWM GTWP.................................................. 449 23.2.2 PWM GTSTR.................................. 449 23.2.3 PWM GTSTP.................................. 450
23.2.4 PWM GTCLR...................................... 450 23.2.5 PWM GTSSR......................................... 451 23.2.6 PWM GTPSR......................................... 454 23.2.7 PWM GTCSR............................................ 457 23.2.8 PWM GTUPSR............................ 460 23.2.9 PWM GTDNSR........................... 463 23.2.10 PWM AGTICASR............ 466 23.2.11 PWM BGTICBSR............ 469 23.2.12 PWM GTCR.................................................. 472 23.2.13 PWM GTUDDTYC............ 474 23.2.14 PWM I/O GTIOR........................................... 476 23.2.15 PWM GTINTAD...................................... 480 23.2.16 PWM GTST....................................................... 481 23.2.17 PWM GTBER..................................... 486 23.2.18 PWM GTCNT...................................................................... 488 23.2.19 PWM nGTCCRn(n = A F) ............ 488 23.2.20 PWM GTPR.......................................................... 489 23.2.21 PWM GTPBR......................................... 489 23.2.22 PWM GTDTCR........................ 490 23.2.23 PWM UGTDVU......................................... 491 23.2.24 OPSCR................................................... 492 23.3 ............................................................................................................................ 495 23.3.1 .................................................................................................................... 495
23.3.1.1 ..................................................................................................... 495 23.3.1.2 ................................................................. 500 23.3.1.3 ............................................................................... 504 23.3.2 ............................................................................................................. 506 23.3.2.1 GTPR ........................................................................ 506 23.3.2.2 GTCCRAGTCCRB ................................................ 509 23.3.3 PWM ................................................................................................ 515 23.3.3.1 PWM ................................................................................... 515 23.3.3.2 ............................................................. 517 23.3.3.3 PWM 1 32 ....................................................... 520 23.3.3.4 PWM 2 32 ............................................... 522 23.3.3.5 PWM 3 64 ....................................................... 524 23.3.4 ....................................................................................... 527 23.3.5 ....................................................................................... 532 23.3.6 0% 100% ............................................ 533 23.3.7 ............ 535 23.3.7.1 ............................................................................... 535 23.3.7.2 ............................................................................... 537
23.3.7.3 ................................................................................... 541 23.3.8 .................................................................................................................... 544
23.3.8.1 ............................................................................ 544 23.3.8.2 ............................................................................ 546 23.3.9 PWM ....................................................................................................... 548 23.3.10 ............................................................................................................. 554 23.3.11 GPT_OPS................................................................................... 564 23.3.11.1 ................................................................. 567 23.3.11.2 .............................................................................................. 567 23.3.11.3 ................................................................................................. 568 23.3.11.4 ..................................................................................................... 569 23.3.11.5 ........................................................... 570 23.3.11.6 ELC ...................................................... 570 23.3.11.7 GPT_OPS ................................................................. 571 23.4 ..................................................................................................................... 572 23.4.1 ............................................................................................................. 572 23.4.2 DMAC/DTC .................................................................................................... 575 23.5 ELC ...................................................................................................... 576 23.5.1 ELC ....................................................................................... 576 23.5.2 ELC ................................................................................... 576 23.6 .......................................................................................................... 577 23.7 ............................................................................................................................ 578 23.7.1 ........................................................................................... 578 23.7.2 .................................................................................................. 578 23.7.3 GTIOC ............................................................................... 579 23.8 ....................................................................................................... 580 23.8.1 ............................................................................................... 580 23.8.2 ............................................................................. 580 23.9 .............................................................................................................. 581 23.9.1 ................................................................................ 581 23.9.2 GTCCRn n = A F............................ 581 23.9.3 GTCNT ..................................................................................... 582 23.9.4 GTCNT ................................................................... 582 23.9.5 ........................................................................................... 583
24. AGT........................................................................................................... 584 24.1 .................................................................................................................................... 584 24.2 .................................................................................................................. 586 24.2.1 AGT AGT................................................................................. 586 24.2.2 AGT A AGTCMA.......................................................... 586 24.2.3 AGT B AGTCMB.......................................................... 587 24.2.4 AGT AGTCR.................................................................... 588
24.2.5 AGT 1AGTMR1.......................................................................... 590 24.2.6 AGT 2AGTMR2.......................................................................... 591 24.2.7 AGT I/O AGTIOC............................................................. 592 24.2.8 AGT AGTISR............................................................ 593 24.2.9 AGT AGTCMSR............................................. 593 24.2.10 AGT AGTIOSEL...................................................................... 594 24.3 ............................................................................................................................ 595 24.3.1 ................................................... 595 24.3.2 A/B ............................. 597 24.3.3 ............................................................................................................. 598 24.3.4 ...................................................................................................... 599 24.3.5 ........................................................................................... 600 24.3.6 .................................................................................................. 602 24.3.7 ............................................................................................... 603 24.3.8 .................................................................................................. 604 24.3.9 .................................................................................................. 606 24.3.10 ...................................................................................................... 607 24.3.11 ............................................................................................................. 607 24.3.12 ELC ....................................................................................... 607 24.4 .............................................................................................................. 608 24.4.1 ......................................................................... 608 24.4.2 ................................................................................ 609 24.4.3 ............................................................................................................. 609 24.4.4 ...................................................................................................... 609 24.4.5 ......................................... 609 24.4.6 TSTOP ................................................. 609 24.4.7 AGT0 ................................. 610 24.4.8 I/O ............................................................................................ 610 24.4.9 PCLKBPCLKB/8 PCLKB/2 ....... 610 24.4.10 AGTLCLK AGTSCLK ...................... 610 24.4.11 ............................................................................. 610
25. RTC.................................................................................................... 611 25.1 .................................................................................................................................... 611 25.2 .................................................................................................................. 613 25.2.1 64Hz R64CNT....................................................................................... 613 25.2.2 RSECCNT 0BCNT0................................... 614 25.2.3 RMINCNT 1BCNT1.................................... 615 25.2.4 RHRCNT 2BCNT2...................................... 616 25.2.5 RWKCNT 3BCNT3.................................. 617 25.2.6 RDAYCNT.......................................................................................... 618 25.2.7 RMONCNT......................................................................................... 618
25.2.8 RYRCNT............................................................................................ 619
25.2.9 RSECAR 0 BCNT0AR.............................................................................................................. 620
25.2.10 RMINAR 1 BCNT1AR.............................................................................................................. 621
25.2.11 RHRAR 2 BCNT2AR.............................................................................................................. 622
25.2.12 RWKAR 3 BCNT3AR.............................................................................................................. 624
25.2.13 RDAYAR 0 BCNT0AER............................................................................................ 625
25.2.14 RMONAR 1 BCNT1AER............................................................................................ 626
25.2.15 RYRAR 2 BCNT2AER............................................................................................ 627
25.2.16 RYRAREN 3 BCNT3AER.......................................................................... 628
25.2.17 RTC 1RCR1.................................................................... 629
25.2.18 RTC 2RCR2.................................................................... 630
25.2.19 RTC 4RCR4.................................................................... 633
25.2.20 RFRH/RFRL................................................................................ 634
25.2.21 RADJ................................................................................ 635
25.2.22 0RTCCR0............................................... 636
25.2.23 0RSECCP0 BCNT0 0 BCNT0CP0............................................................................................................ 638
25.2.24 0RMINCP0 BCNT1 0 BCNT1CP0............................................................................................................ 639
25.2.25 0RHRCP0 BCNT2 0 BCNT2CP0............................................................................................................ 640
25.2.26 0RDAYCP0 BCNT3 0 BCNT3CP0............................................................................................................ 641
25.2.27 0RMONCP0.................................................................... 642
25.3 ............................................................................................................................ 643 25.3.1 ..................................................................... 643
25.3.2 .............................................................. 644
25.3.3 ................................................................................................................. 645
25.3.4 30 ................................................................................................................... 646
25.3.5 64Hz .............................................................................. 647
25.3.6 ............................................................................................................. 648
25.3.7 ....................................................................................... 649
25.3.8 ...................................................................................................... 650 25.3.8.1 ............................................................................................................ 650
25.3.8.2 ................................................................................... 651
25.3.8.3 ...................................................................................... 651
25.3.8.4 ................................................................................................. 651
25.3.8.5 ................................................................................................. 652 25.4 ..................................................................................................................... 653 25.5 ................................................................................................... 654
25.5.1 ......................................................................... 654 25.6 .............................................................................................................. 655
25.6.1 ........................................................... 655 25.6.2 .................................................................................... 656 25.6.3 RTCOUT1Hz/64Hz ......................................................... 656 25.6.4 ............................................ 656 25.6.5 ........................................................... 657 25.6.6 ................................................................................ 657 25.6.7 ............................................ 658 25.6.8 ............................................................................. 658
26. WDT................................................................................................... 659 26.1 .................................................................................................................................... 659 26.2 .................................................................................................................. 661 26.2.1 WDT WDTRR................................................................... 661 26.2.2 WDT WDTCR................................................................... 662 26.2.3 WDT WDTSR...................................................................... 665 26.2.4 WDT WDTRCR.................................................. 666 26.2.5 WDT WDTCSTPR...................................... 666 26.2.6 0OFS0.................................................................. 666 26.3 ............................................................................................................................ 667 26.3.1 ............................................................................. 667 26.3.1.1 ................................................................................... 667 26.3.1.2 ...................................................................................... 669 26.3.2 WDTCRWDTRCR WDTCSTPR .................. 671 26.3.3 ...................................................................................................... 672 26.3.4 ............................................................................................................. 673 26.3.5 ............................................................................................................. 673 26.3.6 .................................................................................... 673 26.3.7 0OFS0 WDT .................. 674 26.4 ELC ...................................................................................................... 674 26.5 .............................................................................................................. 674 26.5.1 ICU nIELSRn ........................................... 674
27. IWDT........................................................................................... 675 27.1 .................................................................................................................................... 675 27.2 .................................................................................................................. 677 27.2.1 IWDT IWDTRR................................................................. 677 27.2.2 IWDT IWDTSR.................................................................... 678 27.2.3 0OFS0.................................................................. 679
27.3 ............................................................................................................................ 682 27.3.1 ............................................................................................... 682 27.3.2 ...................................................................................................... 684 27.3.3 ...................................................................................................... 685 27.3.4 ............................................................................................................. 685 27.3.5 ............................................................................................................. 686 27.3.6 .................................................................................... 686
27.4 ELC ...................................................................................................... 686 27.5 .............................................................................................................. 687
27.5.1 ...................................................................................................... 687 27.5.2 ............................................................................................... 687
28. USB2.0 USBFS............................................................................... 688
28.1 .................................................................................................................................... 688
28.2 .................................................................................................................. 690
28.2.1 SYSCFG........................ 690
28.2.2 0SYSSTS0....................... 692
28.2.3 0DVSTCTR0...................................... 693
28.2.4
CFIFO CFIFO/CFIFOL D0FIFO D0FIFO/D0FIFOL D1FIFO D1FIFO/D1FIFOL.......................................................... 696
28.2.5
CFIFO CFIFOSEL D0FIFO D0FIFOSEL D1FIFO D1FIFOSEL........................................................... 698
28.2.6
CFIFO CFIFOCTR D0FIFO D0FIFOCTR D1FIFO D1FIFOCTR............................................ 702
28.2.7 0INTENB0............................................................ 704
28.2.8 1INTENB1............................................................ 705
28.2.9 BRDY BRDYENB.................................................. 706
28.2.10 NRDY NRDYENB.................................................. 707
28.2.11 BEMP BEMPENB.................................................. 708
28.2.12 SOF SOFCFG............................................ 709
28.2.13 0INTSTS0............................................................. 710
28.2.14 1INTSTS1............................................................. 713
28.2.15 BRDY BRDYSTS.................................................. 716
28.2.16 NRDY NRDYSTS.................................................. 717
28.2.17 BEMP BEMPSTS.................................................. 718
28.2.18 FRMNUM...................................................................... 719
28.2.19 USB USBREQ.......................................................... 720
28.2.20 USB USBVAL........................................................ 721
28.2.21 USB USBINDX............................................... 722
28.2.22 USB USBLENG..................................................... 723
28.2.23 DCP DCPCFG................................................... 724
28.2.24 DCP DCPMAXP............................................. 725 28.2.25 DCP DCPCTR.................................................................. 726 28.2.26 PIPESEL............................................................ 729 28.2.27 PIPECFG................................................ 730 28.2.28 PIPEMAXP.......................................... 732 28.2.29 PIPEPERI....................................................... 733 28.2.30 n PIPEnCTR(n = 1 9) ..................................... 734 28.2.31 n PIPEnTRE
(n = 1 5) ................................................................................................................. 741 28.2.32 n PIPEnTRN(n = 1 5) ................ 742 28.2.33 n DEVADDn(n = 0 5) ..... 743 28.2.34 USB USBMC.................................................. 744 28.2.35 BC 0USBBCCTRL0......................................................... 745 28.3 ............................................................................................................................ 747 28.3.1 ............................................................................................................. 747
28.3.1.1 USBFS ............................................................... 747 28.3.1.2 ................................................................................... 747 28.3.1.3 USB ...................................................................... 747 28.3.1.4 USB ..................................................................................... 748
28.3.2 .................................................................................................................... 753 28.3.3 ......................................................................................................... 755
28.3.3.1 BRDY ................................................................................................. 755 28.3.3.2 NRDY ................................................................................................. 758 28.3.3.3 BEMP ................................................................................................. 761 28.3.3.4 .................... 762 28.3.3.5 ..... 763 28.3.3.6 ............................................................................... 765 28.3.3.7 VBUS ................................................................................................. 765 28.3.3.8 .......................................................................................... 765 28.3.3.9 OVRCR .............................................................................................. 765 28.3.3.10 BCHG ................................................................................................. 765 28.3.3.11 DTCH ................................................................................................. 765 28.3.3.12 SACK ................................................................................................. 765 28.3.3.13 SIGN .................................................................................................. 765 28.3.3.14 ATTCH ............................................................................................... 766 28.3.3.15 EOFERR ............................................................................................ 766 28.3.3.16 .................................................................... 766
28.3.4 .................................................................................................. 767 28.3.4.1 .................................................. 768 28.3.4.2 ........................................................................................................ 768 28.3.4.3 .......................................................................................... 768
28.3.4.4 28.3.4.5 28.3.4.6 28.3.4.7 28.3.4.8 28.3.4.9 28.3.4.10 28.3.4.11
................................................................................... 769 1 5...................................... 769 PID ............................................................................................................ 769 PID ........................................................................... 771 PID = NAK ......................................................................................... 771 ................................................................................................. 771 OUT-NAK ............................................................................................... 771 Null .......................................................................................... 772
28.3.5 FIFO ................................................................................................ 773 28.3.6 FIFO ................................................................................................ 774 28.3.7 FIFO .................................................................................................... 775 28.3.8 DMA D0FIFO/D1FIFO ....................................................................... 776 28.3.9 DCP ........................................................................... 777
28.3.9.1 ........................................... 777 28.3.9.2 ........................................ 778
28.3.10 1 5...................................................................................... 779
28.3.11 6 9........................................................................... 780 28.3.11.1 ............................................................................................................ 780
28.3.12 1 2........................................................................ 781 28.3.12.1 .................................................................... 781 28.3.12.2 DATA-PID .......................................................................................................... 782 28.3.12.3 ...................................................................................... 783
28.3.13 SOF ............................................................................................................ 788 28.3.14 .................................................................................................. 789
28.3.14.1 ............................................................................... 789 28.3.14.2 .............................................................................................. 789 28.3.14.3 USB .................................................................................................... 789
28.3.15 ................................................................................ 790 28.3.15.1 ............................................................. 790 28.3.15.2 .................................................................... 792
28.4 .............................................................................................................. 795 28.4.1 ................................................................................ 795 28.4.2 ..... 795 28.4.3 ..................................... 795
29. SCI.................................................................. 796 29.1 .................................................................................................................................... 796 29.2 .................................................................................................................. 800 29.2.1 RSR..................................................................................... 800 29.2.2 RDR..................................................................................... 800 29.2.3 9 RDRHL.................................................................. 800
29.2.4 FIFO H, L, HLFRDRH, FRDRL, FRDRHL.......................... 801
29.2.5 TDR..................................................................................... 802
29.2.6 9 TDRHL.................................................................. 803
29.2.7 FIFO H, L, HLFTDRH, FTDRL, FTDRHL........................... 804
29.2.8 TSR...................................................................................... 805
29.2.9
SMR (SCMR.SMIF = 0) ...................................................................................................... 805
29.2.10 SMR_SMCI (SCMR.SMIF = 1) ...................................................................................................... 807
29.2.11 SCR(SCMR.SMIF = 0) ......................................................................................... 809
29.2.12 SCR_SMCI(SCMR.SMIF = 1) .............................................................................. 811
29.2.13 FIFO SSR(SCMR.SMIF = 0 FCR.FM = 0) ......................................... 813
29.2.14 FIFO SSR_FIFO(SCMR.SMIF = 0 FCR.FM = 1) .............................. 816
29.2.15 SSR_SMCI(SCMR.SMIF = 1) .............................................................................. 819
29.2.16 SCMR................................................................ 822
29.2.17 BRR.................................................................................. 824
29.2.18 MDDR..................................................... 833
29.2.19 SEMR.................................................................... 835
29.2.20 29.2.21 29.2.22 29.2.23 29.2.24
SNFR..................................................................... 837 I2C 1SIMR1................................................................................ 838 I2C 2SIMR2................................................................................ 839 I2C 3SIMR3................................................................................ 840 I2C SISR.............................................................................. 842
29.2.25 SPI SPMR................................................................................... 843
29.2.26 FIFO FCR......................................................................... 845
29.2.27 FIFO FDR................................................................................ 846
29.2.28 LSR........................................................................... 847
29.2.29 CDR................................................................... 848
29.2.30 DCCR........................................... 849
29.2.31 SPTR............................................................................ 851
29.3 ................................................................................................... 852 29.3.1 ....................................................................................... 853
29.3.2 ............... 855
29.3.3 .................................................................................................................... 856
29.3.4 6 .................................................................. 856
29.3.5 CTSRTS ........................................................................................................ 857
29.3.6 .............................................................. 858
29.3.7 SCI ........................................................................... 861
29.3.8 ............................................................ 863 29.3.9 ............................................................ 869 29.4 ................................................................................................ 876 29.4.1 ..................................................................... 878 29.4.2 ..................................................................... 881 29.5 ............................................................................................ 886 29.5.1 .................................................................................................................... 886 29.5.2 CTSRTS ........................................................................................................ 887 29.5.3 SCI .................................................................... 888 29.5.4 ..................................................... 890 29.5.5 ..................................................... 896 29.5.6 ................................... 901 29.6 ................................................................... 905 29.6.1 ........................................................................................................................ 905 29.6.2 .............................................. 905 29.6.3 .................................................................................................. 907 29.6.4 ............................................ 908 29.6.5 SCI ............................................................................................................. 909 29.6.6 .......................................... 911 29.6.7 .......................................... 914 29.6.8 ...................................................................................................... 916 29.7 IIC ........................................................................................................ 917 29.7.1 .................................................................. 919 29.7.2 ......................................................................................................... 920 29.7.3 SDA ............................................................................................................ 921 29.7.4 SCI IIC ............................................................................... 922 29.7.5 IIC ............................................................................ 923 29.7.6 IIC ............................................................................ 925 29.8 SPI ...................................................................................................... 927 29.8.1 ....................................................... 928 29.8.2 SS ........................................................................................ 928 29.8.3 SS .................................................................................... 928 29.8.4 ................................................................................ 929 29.8.5 SCI SPI .............................................................................. 929 29.8.6 SPI ............................................................ 929 29.9 ................................................................................. 930 29.10 ..................................................................................................................... 931 29.10.1 SCIn_TXI SCIn_RXI FIFO ................ 931 29.10.2 SCIn_TXI SCIn_RXI FIFO ..................... 931 29.10.3 SPI
.................................................................................................................... 931 29.10.4 ......................................... 933
29.10.5 IIC ............................................................................. 934 29.11 .......................................................................................................... 935 29.12 SCI0_DCUF................................................................... 936 29.13 .................................................................................................................. 937 29.14 .............................................................................................................. 938
29.14.1 ................................................................................ 938 29.14.2 SCI ................................................................................... 938 29.14.3 ................................................................................ 943 29.14.4 .................................................................................... 943 29.14.5 SPI ...... 943 29.14.6
SPI ....................................................................................................... 944 29.14.7 DMAC DTC ...................................................................... 945 29.14.8 .................................................................................... 945 29.14.9 SPI ............... 945 29.14.10 SPI ............................................................................ 946
30. I2C IIC.................................................................................................... 947 30.1 .................................................................................................................................... 947 30.2 .................................................................................................................. 950 30.2.1 I2C 1ICCR1.............................................................. 950 30.2.2 I2C 2ICCR2.............................................................. 953 30.2.3 I2C 1ICMR1......................................................................... 957 30.2.4 I2C 2ICMR2......................................................................... 958 30.2.5 I2C 3ICMR3......................................................................... 960 30.2.6 I2C ICFER........................................... 962 30.2.7 I2C ICSER.................................................. 964 30.2.8 I2C ICIER....................................................... 966 30.2.9 I2C 1ICSR1.................................................................. 967 30.2.10 I2C 2ICSR2.................................................................. 970 30.2.11 I2C ICWUR.............................................. 974 30.2.12 I2C 2ICWUR2......................................... 975 30.2.13 LySARLy(y = 0 2) ............................................... 976 30.2.14 UySARUy(y = 0 2) ............................................. 977 30.2.15 I2C Low ICBRL......................................................... 978 30.2.16 I2C High ICBRH....................................................... 979 30.2.17 I2C ICDRT..................................................................... 981 30.2.18 I2C ICDRR.................................................................... 981 30.2.19 I2C ICDRS........................................................................... 981 30.3 ............................................................................................................................ 982 30.3.1 ........................................................................................... 982 30.3.2 .................................................................................................................... 983
30.3.3 ......................................................................................................... 984 30.3.4 ......................................................................................................... 988 30.3.5 ...................................................................................................... 993 30.3.6 ...................................................................................................... 996 30.4 SCL .................................................................................................................... 998 30.5 SDA ............................................................................................................. 999 30.6 .......................................................................................... 1000 30.7 ..................................................................................................... 1001 30.7.1 .............................................................................. 1001 30.7.2 ....................................................................... 1003 30.7.3 ID ................................................................................ 1003 30.7.4 ......................................................................................... 1005 30.8 ........................................................................................................ 1006 30.8.1 1 ........................................................................... 1007 30.8.2 2 ........................................................................... 1011 30.8.3 EEP .......... 1014 30.8.4 WFI .......................................................................... 1017 30.9 SCL Low ........................................................................................ 1018 30.9.1 .................................................................................. 1018 30.9.2 NACK ......................................................................................... 1019 30.9.3 .............................................................................. 1020 30.10 ............................................................................... 1022 30.10.1 MALE ................................. 1022 30.10.2 NACK NALE ................... 1024 30.10.3 SALE .............................. 1025 30.11
.......................................................................................................................... 1026 30.11.1 ........................................................................... 1026 30.11.2 ....................................................................... 1026 30.11.3 ........................................................................... 1029 30.12 ............................................................................................................ 1030 30.12.1 ............................................................................................. 1030 30.12.2 SCL ..................................................................................... 1032 30.12.3 IIC ................................................................................... 1033 30.13 SMBus ..................................................................................................................... 1034 30.13.1 SMBus ....................................................................................... 1034 30.13.2 PEC................................................................................ 1035 30.13.3 SMBus Notify ARP Master .............................. 1035 30.14 ................................................................................................................... 1036 30.14.1 IICn_TXI IICn_RXI ................................ 1036 30.15 .................................................................... 1037 30.16 ................................................................................................. 1038
30.16.1 ....................................................................... 1038 30.17 ............................................................................................................ 1038
30.17.1 .............................................................................. 1038 30.17.2 ..................................................................................... 1038
31. CANController Area Network ............................................................................ 1039
31.1 .................................................................................................................................. 1039
31.2 ................................................................................................................ 1042
31.2.1 CTLR.............................................................................. 1042
31.2.2 BCR...................................................... 1046
31.2.3 kMKRk(k = 0 7) .................................................................. 1048
31.2.4 FIFO ID 01FIDCR0, FIDCR1........................................... 1049
31.2.5 MKIVLR............................................................................. 1050
31.2.6
jMBj_IDMBj_DLMBj_DmMBj_TS (j = 0 31; m = 0 7) ........................................................................................... 1051
31.2.7 MIER.......................................... 1055
31.2.8 FIFO MIER_FIFO.......................................................................................................... 1056
31.2.9 MCTL_TXj(j = 0 31) ..................... 1057
31.2.10 MCTL_RXj(j = 0 31) .................... 1060
31.2.11 FIFO RFCR............................................................ 1062
31.2.12 FIFO RFPCR........................................... 1064
31.2.13 FIFO TFCR............................................................ 1065
31.2.14 FIFO TFPCR............................................ 1066
31.2.15 STR.................................................................................... 1067
31.2.16 MSMR................................................... 1069
31.2.17 MSSR............................................ 1070
31.2.18 CSSR........................................................... 1071
31.2.19 AFSR............................................. 1072
31.2.20 EIER......................................................... 1073
31.2.21 EIFR............................................................. 1075
31.2.22 RECR.................................................................. 1077
31.2.23 TECR................................................................... 1077
31.2.24 ECSR...................................................................... 1078
31.2.25 TSR............................................................................ 1079
31.2.26 TCR..................................................................... 1080
31.3 ....................................................................................................................... 1082
31.3.1 CAN ............................................................................................... 1083
31.3.2 CAN halt ...................................................................................................... 1084
31.3.3 CAN ............................................................................................... 1085
31.3.4 CAN .................................................. 1085
31.3.5 CAN ......................................................... 1086
31.4 ................................................................................................. 1087
31.4.1 ....................................................................................................... 1087 31.4.2 ................................................................................................ 1087 31.4.3 .................................................................................................... 1088 31.5 ........................................................................ 1089 31.6 .................................................................... 1091 31.7 ....................................................................................................................... 1094 31.7.1 ......................................................................................................................... 1095 31.7.2 ......................................................................................................................... 1097 31.8 .......................................................................................................................... 1098 31.9 ............................................................................................................ 1099 31.9.1 .............................................................................. 1099 31.9.2 ................................................................................................ 1099
32. SPI........................................................................... 1100 32.1 .................................................................................................................................. 1100 32.2 ................................................................................................................ 1104 32.2.1 SPI SPCR...................................................................... 1104 32.2.2 SPI SSLP................................................................ 1105 32.2.3 SPI SPPCR............................................................. 1106 32.2.4 SPI SPSR.......................................................................... 1107 32.2.5 SPI SPDR/SPDR_HA............................................................... 1110 32.2.6 SPI SPSCR.................................................. 1114 32.2.7 SPI SPSSR...................................................... 1115 32.2.8 SPI SPBR....................................................................... 1116 32.2.9 SPI SPDCR......................................................... 1117 32.2.10 SPI SPCKD.................................................................... 1119 32.2.11 SPI SSLND............................................... 1120 32.2.12 SPI SPND................................................................... 1121 32.2.13 SPI 2SPCR2.................................................................. 1122 32.2.14 SPI SPCMDmSPI0 m = 0 7 SPI1 m = 0) .................................................................................................. 1123 32.3 .......................................................................................................................... 1126 32.3.1 SPI ........................................................................................................ 1126 32.3.2 SPI ........................................................................................................ 1127 32.3.3 SPI ................................................................................................. 1128 32.3.3.1 MCU .................................. 1128 32.3.3.2 MCU .............................. 1129 32.3.3.3 MCU ...................................... 1130 32.3.3.4 MCU .................................. 1131 32.3.3.5 MCU ......................................... 1132 32.3.3.6 MCU ....................... 1133 32.3.3.7 MCU .................... 1133
32.3.4 ................................................................................................ 1134 32.3.4.1 SPCR2.SPPE = 0........................................... 1136
32.3.4.2 SPCR2.SPPE = 1...................................................... 1140
32.3.5 .................................................................................................... 1144 32.3.5.1 CPHA = 0 ................................................................................. 1144
32.3.5.2 CPHA = 1 ................................................................................. 1145
32.3.6 .................................................................................................... 1146 32.3.6.1 SPCR.TXMD = 0............................................. 1146
32.3.6.2 SPCR.TXMD = 1.................................................................. 1147
32.3.7 .......................................... 1148
32.3.8 ............................................................................................................... 1150 32.3.8.1 ........................................................................................ 1151
32.3.8.2 ............................................................................................... 1153
32.3.8.3 .................................................................................... 1154
32.3.8.4 ........................................................................................ 1154
32.3.9 SPI ........................................................................................................... 1155 32.3.9.1 SPE .................................................................. 1155
32.3.9.2 ...................................................................... 1155
32.3.10 SPI ................................................................................................................... 1156 32.3.10.1 ............................................................................................ 1156
32.3.10.2 ........................................................................................ 1167
32.3.11 ................................................................................................ 1171 32.3.11.1 ............................................................................................ 1171
32.3.11.2 ........................................................................................ 1177
32.3.12 ................................................................................................ 1179
32.3.13 .............................................................................. 1180
32.3.14 ........................................................................................................... 1181
32.4 ........................................................................................................ 1182 32.4.1 .............................................................................. 1182
32.4.2 ................................................................... 1182
32.4.3 ... 1182
32.4.4 SPI ...................................................................................... 1183
32.4.5 ............................................................................................. 1183
32.5 ............................................................................................................ 1184 32.5.1 .............................................................................. 1184
32.5.2 .................................................................................. 1184
32.5.3 ......................................................................................... 1184
32.5.4
............................................................................................................... 1184
32.5.5 SPRF SPTEF ............................................................. 1184
33. CRC .................................................................................................... 1185 33.1 .................................................................................................................................. 1185 33.2 ................................................................................................................ 1186 33.2.1 CRC 0CRCCR0............................................................. 1186 33.2.2 CRC 1CRCCR1............................................................. 1187 33.2.3 CRC CRCDIR/CRCDIR_BY.............................................. 1187 33.2.4 CRC CRCDOR/CRCDOR_HA/CRCDOR_BY................... 1188 33.2.5 CRCSAR................................................................. 1189 33.3 .......................................................................................................................... 1190 33.3.1 .................................................................................................................. 1190 33.3.2 CRC ......................................................................................................... 1194 33.4 ............................................................................................................ 1195 33.4.1 .............................................................................. 1195 33.4.2 .................................................................................................... 1195
34. 14 A/D ADC14........................................................................................ 1196
34.1 .................................................................................................................................. 1196
34.2 ................................................................................................................ 1200
34.2.1
A/D yADDRyA/D 2 ADDBLDR A/D 2 AADDBLDRAA/D 2 B ADDBLDRBA/D ADTSDR A/D ADOCDR...................................................... 1200
34.2.2 A/D ADRD.................................................................. 1204
34.2.3 A/D ADCSR.................................................................... 1206
34.2.4 A/D A0ADANSA0.......................................................... 1210
34.2.5 A/D A1ADANSA1.......................................................... 1211
34.2.6 A/D B0ADANSB0.......................................................... 1212
34.2.7 A/D B1ADANSB1.......................................................... 1213
34.2.8 A/D 0ADADS0.................................. 1214
34.2.9 A/D 1ADADS1.................................. 1215
34.2.10 A/D ADADC.............................................. 1217
34.2.11 A/D ADCER............................................................ 1218
34.2.12 A/D ADSTRGR.................................................... 1220
34.2.13 A/D ADEXICR........................................... 1222
34.2.14 A/D nADSSTRn n = 00, 04 06, 09, 10, L, T, O.......................................................................... 1224
34.2.15 A/D ADDISCR.................................................. 1225
34.2.16 A/D ADGSPCR.......................... 1226
34.2.17 A/D ADCMPCR........................................ 1227
34.2.18 A/D A 0ADCMPANSR0......... 1229
34.2.19 A/D A 1ADCMPANSR1......... 1230
34.2.20 A/D A ADCMPANSER........... 1230
34.2.21 A/D A 0ADCMPLR0.............. 1231
34.2.22 A/D A 1ADCMPLR1.............. 1233
34.2.23 A/D A ADCMPLER.. 1234
34.2.24
A/D A ADCMPDR0 A/D A ADCMPDR1 A/D B ADWINLLB A/D B ADWINULB.............. 1235
34.2.25 A/D A 0ADCMPSR0... 1237
34.2.26 A/D A 1ADCMPSR1... 1238
34.2.27 A/D A ADCMPSER......................................................................................................... 1239
34.2.28 A/D B ADCMPBNSR............. 1240
34.2.29 A/D B ADCMPBSR.................... 1242
34.2.30 A/D A/B ADWINMON..... 1243
34.2.31 A/D ADHVREFCNT................ 1244
34.3 .......................................................................................................................... 1245 34.3.1 ................................................................................................ 1245
34.3.2 ......................................................................................... 1246 34.3.2.1 .......................................................................................................... 1246
34.3.2.2 ................................................................................. 1247
34.3.2.3 A/D ................................. 1248
34.3.2.4 A/D ................................................... 1249
34.3.2.5 ........................................................... 1250
34.3.3 ................................................................................................ 1251 34.3.3.1 .......................................................................................................... 1251
34.3.3.2 ................................................................................. 1252
34.3.4 ......................................................................................... 1253 34.3.4.1 .......................................................................................................... 1253
34.3.4.2 A/D ................................................... 1254
34.3.4.3 A ................................................................................ 1255
34.3.5 A B....................................................... 1265 34.3.5.1 ................................................................................................... 1265
34.3.5.2 .......................................................................... 1267
34.3.5.3 ................................................................................. 1269
34.3.6 .......................................... 1269
34.3.7 A/D ..................................................... 1272
34.3.8 A/D .................................................................................. 1272
34.3.9 ............................................................................................. 1273
34.3.10 A/D ...................................................................... 1274
34.3.11 A/D ...................................... 1275
34.4 DTC/DMAC ............................................................................ 1276 34.4.1 ........................................................................................................... 1276
34.5 ........................................................................................................ 1277
34.5.1 ELC ............................................................................................ 1277 34.5.2 ELC ADC14 ............................................................ 1277 34.6 ................................................................................................................ 1277 34.7 A/D .............................................. 1278 34.8 ............................................................................................................ 1279 34.8.1 ....................................................................... 1279 34.8.2 A/D ...................................................................................... 1280 34.8.3 A/D ......................................................... 1281 34.8.4 ................................................................... 1281 34.8.5 .............................................................................. 1281 34.8.6 ............................................................ 1281 34.8.7 ......................................................... 1281 34.8.8 ADHSC ................................................................................... 1281 34.8.9 ....................................... 1282 34.8.10 .................................................................................. 1282 34.8.11 .............................................................................. 1282 34.8.12 14 A/D ............................. 1283 34.8.13 ADC14OPAMPACMPLP ................................................................... 1283 34.8.14 ................................... 1283
35. 12 D/A DAC12........................................................................................ 1284 35.1 .................................................................................................................................. 1284 35.2 ................................................................................................................ 1285 35.2.1 D/A 0DADR0............................................................................ 1285 35.2.2 D/A DACR...................................................................... 1285 35.2.3 DADR0 DADPR...................................................... 1286 35.2.4 D/A A/D DAADSCR.................................. 1286 35.2.5 D/A VREF DAVREFCR.................................................. 1287 35.3 .......................................................................................................................... 1288 35.3.1 D/A A/D .............................................................................. 1289 35.3.2 ....................................... 1291 35.4 ...................................................................................... 1292 35.5 ............................................................................ 1292 35.6 ............................................................................................................ 1293 35.6.1 .............................................................................. 1293 35.6.2 DAC12 .......................................................... 1293 35.6.3 DAC12 ............................................... 1293 35.6.4 D/A A/D ................................................. 1293
36. TSN.................................................................................................................... 1294 36.1 .................................................................................................................................. 1294 36.2 ................................................................................................................ 1295 36.2.1 HTSCDRH...................................................... 1295
36.2.2 LTSCDRL....................................................... 1295 36.3 ..................................................................................................... 1296
36.3.1 ........................................................................................................... 1296 36.3.2 ............................................................................................. 1297
37. OPAMP............................................................................................................... 1298 37.1 .................................................................................................................................. 1298 37.2 ................................................................................................................ 1299 37.2.1 AMPMC............................................. 1299 37.2.2 AMPTRM................................ 1300 37.2.3 AMPTRS................................................... 1300 37.2.4 AMPC........................................................... 1301 37.2.5 AMPMON................................................................ 1302 37.3 .......................................................................................................................... 1303 37.3.1 .................................................................................................................. 1303 37.3.2 ................................................................................................ 1304 37.4 .............................................................................................. 1308 37.5 ............................................................................................................ 1309 37.6 A/D ......................................................................................... 1310 37.7 ............................................................................................................ 1310
38. ACMPLP......................................................................... 1311 38.1 .................................................................................................................................. 1311 38.2 ................................................................................................................ 1314 38.2.1 ACMPLP COMPMDR........................................................ 1314 38.2.2 ACMPLP COMPFIR........................................ 1315 38.2.3 ACMPLP COMPOCR............................................. 1316 38.2.4 COMPSEL0..................................................... 1316 38.2.5 COMPSEL1.............................................. 1317 38.3 .......................................................................................................................... 1318 38.4 ................................................................................................................ 1321 38.5 ACMPLP ........................................................................................................... 1322 38.6 ELC ........................................................................................................... 1322 38.7 ELC ................................................................................. 1322 38.8 ..................................................................................................... 1322 38.9 ............................................................................................................ 1322 38.9.1 .............................................................................. 1322 38.9.2 A/D ......................................................................................... 1322
39. 8 D/A DAC8............................................................................................ 1323 39.1 .................................................................................................................................. 1323 39.2 ................................................................................................................ 1324 39.2.1 D/A nDACSnn = 0, 1................................................... 1324 39.2.2 D/A DAM................................................................. 1324
39.3 .......................................................................................................................... 1325 39.4 ............................................................................................................ 1325
39.4.1 ......................................................................................... 1325 39.4.2 8 D/A ............................... 1325 39.4.3 8 D/A .................... 1325 39.4.4 D/A ........................................................................... 1325
40. CTSU....................................................................... 1326 40.1 .................................................................................................................................. 1326 40.2 ................................................................................................................ 1329 40.2.1 CTSU 0CTSUCR0......................................................... 1329 40.2.2 CTSU 1CTSUCR1......................................................... 1331 40.2.3 CTSU CTSUSDPRS........................................... 1332 40.2.4 CTSU CTSUSST........................... 1333 40.2.5 CTSU 0CTSUMCH0...................................................... 1334 40.2.6 CTSU 1CTSUMCH1...................................................... 1335 40.2.7 CTSU 0CTSUCHAC0................... 1335 40.2.8 CTSU 1CTSUCHAC1................... 1336 40.2.9 CTSU 2CTSUCHAC2................... 1336 40.2.10 CTSU 3CTSUCHAC3................... 1337 40.2.11 CTSU 4CTSUCHAC4................... 1337 40.2.12 CTSU 0CTSUCHTRC0........................ 1338 40.2.13 CTSU 1CTSUCHTRC1........................ 1338 40.2.14 CTSU 2CTSUCHTRC2........................ 1339 40.2.15 CTSU 3CTSUCHTRC3........................ 1339 40.2.16 CTSU 4CTSUCHTRC4........................ 1340 40.2.17 CTSU CTSUDCLKC............................. 1340 40.2.18 CTSU CTSUST.................................................................. 1341 40.2.19 CTSU CTSUSSC..... 1343 40.2.20 CTSU 0CTSUSO0................................................. 1344 40.2.21 CTSU 1CTSUSO1................................................. 1345 40.2.22 CTSU CTSUSC........................................................................ 1346 40.2.23 CTSU CTSURC............................................................. 1347 40.2.24 CTSU CTSUERRS................................................. 1348 40.3 .......................................................................................................................... 1349 40.3.1 ........................................................................................................... 1349 40.3.2 ............................................................................................................... 1351 40.3.2.1 ............................................................................................... 1352 40.3.2.2 ........................................................................................ 1353 40.3.2.3 ........................................................ 1354 40.3.2.4 ........................................................... 1356 40.3.2.5 ............................................................... 1358
40.3.3 .................................................................................. 1361 40.3.3.1 ...................................................................... 1361 40.3.3.2 .......................................................................................................... 1362
40.4 ............................................................................................................ 1364 40.4.1 CTSUSC CTSURC .................................. 1364 40.4.2 ........................................................................... 1364 40.4.3 ......................................................................................... 1364 40.4.4 ............................................................................................. 1364 40.4.5 TSCAP ............................................................................................................ 1365 40.4.6 CTSUCR0.CTSUSTRT = 1 ...................................... 1365
41. DOC............................................................................................................ 1366 41.1 .................................................................................................................................. 1366 41.2 ................................................................................................................ 1367 41.2.1 DOC DOCR.................................................................... 1367 41.2.2 DOC DODIR........................................................... 1368 41.2.3 DOC DODSR..................................................................... 1368 41.3 .......................................................................................................................... 1369 41.3.1 .................................................................................................... 1369 41.3.2 .................................................................................................... 1370 41.3.3 .................................................................................................... 1371 41.4 ELC .................................... 1371 41.5 ............................................................................................................ 1371 41.5.1 .............................................................................. 1371
42. SRAM ......................................................................................................................................... 1372 42.1 .................................................................................................................................. 1372 42.2 ................................................................................................................ 1373 42.2.1 SRAM PARIOAD...................................... 1373 42.2.2 SRAM SRAMPRCR........................................................... 1373 42.2.3 ECC ECCMODE.......................................... 1374 42.2.4 ECC 2 ECC2STS......................................... 1374 42.2.5 ECC 1 ECC1STSEN...................... 1375 42.2.6 ECC 1 ECC1STS......................................... 1375 42.2.7 ECC ECCPRCR................................................................ 1376 42.2.8 ECC 2ECCPRCR2............................................................ 1376 42.2.9 ECC ECCETST................................................... 1377 42.2.10 SRAM ECC ECCOAD............................................. 1377 42.3 .......................................................................................................................... 1378 42.3.1 .................................................................................................... 1378 42.3.2 ECC ................................................................................................................. 1378 42.3.3 ECC ...................................................................................................... 1379 42.3.4 ECC .................................................................................... 1380
42.3.5 .................................................................................................... 1381 42.3.6 SRAM ................................................................................................... 1382 42.3.7 .................................................................................................... 1383 42.4 ............................................................................................................ 1383 42.4.1 SRAM .............................................................................. 1383 42.4.2 SRAM ........................................................................................ 1383
43. ...................................................................................................................... 1384 43.1 .................................................................................................................................. 1384 43.2 ....................................................................................................................... 1386 43.3 ..................................................................................................... 1387 43.3.1 ......................................................................................................................... 1387 43.3.2 ....................................................................................................... 1388 43.3.2.1 FCACHEE............................. 1388 43.3.2.2 FCACHEIV..................... 1388 43.3.2.3 DFLCTL..................................... 1389
43.4 .......................................................................................................................... 1390 43.4.1 ................................................................ 1390
43.5 ............................................................................... 1391 43.5.1 ID ........................................................................................ 1391
43.6 .......................................................................................................................... 1393 43.6.1 ............................................................................................. 1395 43.6.2 ......................................................................................... 1395 43.6.3 ............................................................ 1396
43.7 ........................................................................................................ 1397 43.8 ................................................................................................................ 1397 43.9 ........................................................................................................ 1397 43.10 ...................................................................................... 1397
43.10.1 SCI .................................................................................................... 1397 43.10.2 USB ................................................................................................... 1398 43.11 ............................................................................... 1399 43.11.1 ......................................................................................... 1399 43.11.2 ................................................................................................ 1399 43.12 ..................................................................................................... 1400 43.12.1 ......................................................................................................................... 1400 43.12.2 ........................................................................... 1400 43.13 .......................................................................................... 1401 43.13.1 ....................................................................... 1401 43.13.2 ....................................................................... 1401 43.14 ............................................................................................................ 1401 43.14.1 ......................................................................................... 1401 43.14.2 ................................................................ 1401 43.14.3 .................................................................................. 1401
43.14.4 43.14.5 43.14.6 43.14.7 43.14.8 43.14.9
....................................................................... 1401 ............................ 1401 ....................................... 1402 Low-speed ........................................................ 1402 ....................................................................... 1402 ................................................................... 1402
44. LCD SLCDC................................................................................. 1403 44.1 .................................................................................................................................. 1403 44.2 ................................................................................................................ 1405 44.2.1 LCD 0LCDM0........................................................................... 1405 44.2.2 LCD 1LCDM1........................................................................... 1406 44.2.3 LCD 0LCDC0.................................................. 1407 44.3 LCD ................................................................................................ 1408 44.4 LCD ..................................................................................... 1409 44.4.1 A B ..................................................... 1409 44.4.2 A B .................. 1410 44.5 LCD .............................................................................. 1411 44.6 ................................................................................................................... 1412 44.7 LCD VL1VL2VL4 ...................................................................... 1413 44.7.1 .................................................................................................... 1413 44.8 .......................................................................................... 1415 44.9 ....................................................................................................................... 1420 44.9.1 4 ........................................................................................................ 1420
45. SCE5................................................................................................ 1424 45.1 .................................................................................................................................. 1424 45.2 .......................................................................................................................... 1426 45.2.1 ........................................................................................................... 1426 45.2.2 ........................................................................................................... 1427 45.3 ............................................................................................................ 1427 45.3.1 .............................................................................. 1427 45.3.2 .............................................................................. 1427
46. Bluetooth Low Energy (BLE) ...................................................................................................... 1428 46.1 .................................................................................................................................. 1428 46.2 .......................................................................................................................... 1431 46.2.1 ............................................................................................................... 1431 46.3 .......................................................................................................................... 1432 46.4.1 RF .......................................................................................... 1433 46.4.2 .................................................................................................................. 1434 46.4.3 ......................................................................................... 1434
47. ............................................................................................................... 1435 47.1 .................................................................................................................................. 1435
47.2 .......................................................................................................................... 1435
48. ................................................................................................................................. 1436
48.1 ................................................................................................................... 1437
48.2 DC ........................................................................................................................... 1439
48.2.1 Tj/Ta ............................................................................................................. 1439
48.2.2 48.2.3
I/O VIH, VIL .............................................................................................................. 1439 I/O IOH, IOL ............................................................................................................... 1441
48.2.4 48.2.5
I/O VOHVOL ................................................................................. 1443 ........................................................................... 1445
48.2.6 ........................................................................... 1447
48.2.7 P409 ................................................................ 1449
48.2.8 IIC ........................................................................................... 1450
48.2.9 ..................................................................................... 1451
48.2.10 VCC ............................................ 1460
48.3 AC ............................................................................................................................ 1461
48.3.1 ...................................................................................................................... 1461
48.3.2 ................................................................................................ 1464
48.3.3 ................................................................................................ 1467
48.3.4 ................................................................................................ 1468
48.3.5 NMI/IRQ ........................................................................................ 1471
48.3.6 I/O POEGGPTAGTKINTADC14 ................ 1472
48.3.7 CAC ...................................................................................................... 1473
48.3.8 SCI ........................................................................................................ 1474
48.3.9 SPI ........................................................................................................ 1479
48.3.10 IIC ......................................................................................................... 1484
48.3.11 CLKOUT ............................................................................................... 1486
48.4 USB ......................................................................................................................... 1487
48.4.1 USBFS .................................................................................................. 1487
48.5 ADC14 ..................................................................................................................... 1489
48.6 DAC12 ..................................................................................................................... 1497
48.7 TSN ......................................................................................................................... 1499
48.8 OSC .......................................................................................................... 1499
48.9 POR/LVD ................................................................................................................. 1500
48.10 VBATT ..................................................................................................................... 1504
48.11 CTSU ....................................................................................................................... 1507
48.12 LCD ................................................................................. 1507
48.12.1 ........................................................................................................... 1507
48.13 ............................................................................................................ 1508
48.14 OPAMP .................................................................................................................... 1509
48.15 ..................................................................................................... 1510
48.15.1 .................................................................................. 1510
48.15.2 .................................................................................. 1512
48.16 JTAG............................................................. 1513 48.16.1 SWD........................................................................... 1515
48.17 BLE .......................................................................................................................... 1517 48.17.1 .................................................................................................................. 1517 48.17.2 2Mbps.................................................................................................. 1517 48.17.3 1Mbps.................................................................................................. 1518 48.17.4 500kbps............................................................................................... 1518 48.17.5 125kbps............................................................................................... 1519
1.
...................................................................................... 1520
2.
....................................................................................................................... 1522
3. 3.1 3.2 3.3
I/O ..................................................................................................................... 1524 .............................................................................................. 1524 ............................................................................................................ 1526 ................................................................................................................ 1528
.............................................................................................................................................. 1548
RA4W1
48MHz Arm� Cortex�-M4512KB 96KB SRAM LCD Bluetooth Low EnergyUSB2.0 14 A/D 12 D/A
FPU Arm Cortex-M4
Armv7E-M DSP 48MHz 4GB Arm Arm MPU8 ITMDWTFPBTPIUETB CoreSightTM JTAG-DP SW-DP
512KB 8KB 100000
96KB SRAM FCACHE
MMF 128 ID
Bluetooth Low Energy1 - Bluetooth5.0RFLink Layer
- LE 1M PHYLE 2M PHYLE Coded PHY125kbps,
500kbpsLE Advertising Extensions - Bluetooth AES-CCM128 USB2.0 USBFS - - USB 1.2 SCI� 4 - UART - IIC - SPI SPI� 2 I2C IIC� 2 CAN
14 A/D ADC14 12 D/A DAC12 8 D/A DAC8� 2ACMPLP ACMPLP� 2 OPAMP� 1 TSN
32 PWM GPT32� 4 16 PWM GPT16� 3 AGT� 2 WDT
ECC SRAM SRAM
ADC CAC CRC DOC GPT POEG IWDT GPIO
RTC ELC DMA DMAC� 4 DTC KINT LVD
AES128/256 GHASH TRNG
HMI LCD SLCDC - 9 � 4 CTSU
MOSC 1 20MHzVCC = 2.4 3.6V 1 8MHzVCC = 1.8 2.4V SOSC32.768kHz HOCO 24, 32, 48, 64MHzVCC = 2.4 3.6V 24, 32, 48MHzVCC = 1.8 3.6V MOCO8MHz LOCO32.768kHz IWDT 15kHz HOCO/MOCO/LOCO
35 - 3 CMOS - 32 CMOS - 4 5V - 1 20mA
VCC: 1.8 3.6V
Ta = -40 +85 - 56 QFN7mm � 7mm0.4mm
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 47 of 1551
RA4W1
1.
1.
MCU Arm� 32 MCU
MCU 48MHz Arm Cortex�-M4
512KB 96KB SRAM Bluetooth Low Energy (BLE) LCD SLCDC CTSU USB2.0 USBFS 14 A/D ADC14 12 D/A DAC12
1.1
1.1
Arm
Arm Cortex-M4
48MHz Arm Cortex-M4
- r0p1-01rel0 - Armv7E-M - ANSI/IEEE 754-2008 Arm Arm MPU - Armv7 - 8 SysTick - SYSTICCLKLOCO ICLK
1.2
MMF
SRAM
512KB 43.
8KB 43.
MCU 7.
MMF 23 MMF 5.MMF
ECCSRAM ECC SRAM042.SRAM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 48 of 1551
RA4W1
1.
1.3
(1/2)
2
SCI/USB 3.
14 RES
VBATT
0 1 SRAM SRAM ECC MPU MPU
6.
LVD
LVDVCC 8.LVD
MOSC SOSC HOCO MOCO LOCO PLL IWDT Bluetooth Bluetooth
9.
CAC CAC
10.CAC
ICU
ICUNVIC/DTC DMAC NMI 14. ICU
KINT
KRM 21. KINT
11.
RTCSOSCLOCO VBATT_RVCC VBATT VCC VCC VBATT VBATT VCC12.
13.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 49 of 1551
RA4W1
1.
1.3
(2/2)
MPU WDT
IWDT
4MPUCPU 16.MPU
WDT 14 WDT MCU 26. WDT
IWDT 14 IWDT MCU MCU IWDT 27.IWDT
1.4
ELC ELC CPU 19.
ELC
1.5
DTC
DMA DMAC
DTC 18.DTC
4 DMADMACCPU DMA DMAC 17.DMA DMAC
1.6
PWM GPT
GPT POEG
AGT
RTC
PWM GPT4 32 3 16 PWM DC PWM GPT 23. PWM GPT
PWM GPTGPT POEG22.GPT POEG
AGT 16 16 AGT 24.AGT
RTC 2 RTC2000 2099 100 RTC 25.RTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 50 of 1551
RA4W1
1.
1.7
SCI
I2C IIC SPI CANController Area Network
USB2.0 USBFS
Bluetooth low energy (BLE)
SCI 5 UART ACIA 8 IIC SPI ISO/IEC 7816-3 SCI0 SCI1 FIFO 29.SCI
2 I2CIICNXP I2CInterIntegrated Circuit Bus 30.I2C IIC
2SPI 32. SPI
CANController Area Network
CAN ISO 11898-1CAN 2.0A/CAN 2.0B FIFO 32 11 29 31.CANController Area Network
USB2.0 USBFS 2.0 USB 2.0 10 1 9 MCU1.228.USB2.0 USBFS
Bluetooth 5.0 Low Energy RF 1Mbps, 2Mbps, 500kbps, 125kbps LE Advertising Extensions RF DC-DC +4dBm
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 51 of 1551
RA4W1
1.
1.8
14 A/DADC14
14 A/D 8 A/D 12 14 34.14 A/DADC14
12 D/ADAC12 12 D/A DAC1235.12 D/A DAC12
8 D/A DAC8 ACMPLP
8 D/A DAC8DAC8 ACMPLP 39.8 D/A DAC8
TSN
ADC14 36.TSN
ACMPLP
ACMPLP
CMPREFii = 0, 18 D/A MCU Vref ACMPLP
38. ACMPLP
OPAMP
OPAMP 2 1 37. OPAMP
1.9
LCD SLCDC
CTSU
SLCDC A B LCD LCD 44. LCD SLCDC
CTSU 40. CTSU
1.10
CRC
DOC
CRCCRC LSB MSB CRC CRC CRC 33. CRC
DOC16 41.DOC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 52 of 1551
RA4W1
1.11
5 SCE5
- AES
- TRNG - GHASH
1.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 53 of 1551
RA4W1
1.
1.2
1.1 MCU
512KB
8KB
96KB SRAM
DMA
DTC DMAC � 4
CSC
MPU
Arm Cortex-M4
DSP
FPU
MPU
NVIC I/F
GPT32 � 4 GPT16 � 3
AGT � 2 RTC
WDT/IWDT
SCI � 4
BLE
IIC � 2 SPI � 2
CAN � 1
USB BC1.2 USBFS
POR/LVD
MOSC/SOSC (H/M/L) OCO
PLL
CAC
ICU KINT
CTSU
SLCDC
ELC
SCE5
CRC
DOC
14 A/D
12 D/A
8 D/A
OPAMP � 1 ACMPLP � 2
1.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 54 of 1551
RA4W1
1.
1.3
1.2 1.12
R 7 F A 4 W 1 A D 2 C N G #AA 0
#AASn #AC
NGQFN 56pins
Quality ID
2-4085 D512KB Feature set ASecurity W1Wireless Communication 1 4100MHz RA
1.2
1.12
R7FA4W1AD2CNG
R7FA4W1AD2CNG#AA0
SRAM
512KB
8KB
96KB
-40 +85
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 55 of 1551
RA4W1
1.4
1.13
SRAM
DMA
HMI
ECC CPU
ICU KINT ELC DTC DMAC GPT32 GPT16 AGT RTC WDT/IWDT SCI IIC SPI CAN USBFS BLE ADC14 DAC12 DAC8 ACMPLP OPAMP TSN SLCDC CTSU CRC DOC
1.
R7FA4W1AD2CNG 56
QFN 512KB
8KB 96KB 80KB 16KB 48MHz 512
8
4 4 3 2 6 2 2 1 Bluetooth5.0 RFLink Layer 8 1 2 2 1 4com � 9seg 11 SCE5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 56 of 1551
RA4W1
1.5
1.
CAC
KINT
GPT
AGT
VCC
VCL
VSS VBATT XTAL EXTAL XCIN XCOUT CLKOUT_RF XTAL1_RF XTAL2_RF CLKOUT MD
RES
CACREF NMI IRQ0IRQ4, IRQ6, IRQ7, IRQ9, IRQ11, IRQ14, IRQ15 KR00 KR07
TMS TDI TCK TDO SWDIO SWCLK SWO VBATWIO0
GTETRGA, GTETRGB GTIO0A GTIO5A, GTIO8A, GTIO0B GTIO5B, GTIO8B GTIU GTIV GTIW GTOUUP GTOULO GTOVUP GTOVLO GTOWUP GTOWLO AGTEE0, AGTEE1 AGTIO0, AGTIO1 AGTO0, AGTO1 AGTOB0
0.1F VSS
VSS
0V
EXTAL
XCOUT XCIN
4MHz2MHz1MHz Bluetooth
Bluetooth 32MHz
Low MCU
VBATT VBATT
PWM
U V W BLDC 3 PWMU BLDC 3 PWMU BLDC 3 PWMV BLDC 3 PWMV BLDC 3 PWMW BLDC 3 PWMW
B
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 57 of 1551
RA4W1
1.
RTC SCI
IIC SPI
CAN USBFS
ADC14 DAC12
RTCOUT RTCIC0, RTCIC2 SCK0,SCK1,SCK4, SCK9 RXD0, RXD1, RXD4, RXD9 TXD0, TXD1, TXD4, TXD9 CTS0_RTS0, CTS1_RTS1, CTS4_RTS4, CTS9_RTS9 SCL0, SCL1, SCL4, SCL9 SDA0, SDA1, SDA4, SDA9 SCK0, SCK1, SCK4, SCK9 MISO0, MISO1, MISO4, MISO9 MOSI0, MOSI1, MOSI4, MOSI9 SS0, SS1,SS4,SS9 SCL0 SCL1 SDA0 SDA1 RSPCKA, RSPCKB MOSIA, MOSIB MISOA, MISOB SSLA0, SSLB0 SSLA1, SSLA2, SSLA3, SSLB1, SSLB3 CRX0 CTX0 VSS_USB VCC_USB_LDO
VCC_USB USB_DP
USB_DM
USB_VBUS
USB_VBUSEN USB_OVRCURA, USB_OVRCURB AVCC0 AVSS0 VREFH0 VREFL0 AN004 AN006, AN009, AN010, AN017, AN019, AN020 ADTRG0 DA0 VCOUT
1Hz/64Hz
Low
I2C IIC
I2C IIC
SPI
SPI
SPI
SPI Low
USB VCC_USB USB USB D+USBD+ USB D-USBD- USB USBVBUS VBUS VBUS5V
A/D
A/D Low D/A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 58 of 1551
RA4W1
ACMPLP OPAMP CTSU I/O
SLCDC
Bluetooth low energy
CMPREF0, CMPREF1 CMPIN0, CMPIN1 AMP2+ AMP2AMP2O TS00, TS01, TS03, TS10, TS12, TS13, TS18, TS28, TS30, TS31, TS34 TSCAP P004, P010, P011, P014, P015
P100 P111 P200
P201, P204P206, P212, P213 P214, P215 P300 P402, P404, P407, P409, P414 P501 P914, P915 VL1, VL2, VL4
COM0 COM3 SEG6, SEG9, SEG11, SEG12, SEG20, SEG23, SEG49, SEG52, SEG53 ANT
DCLOUT DCLIN_A DCLIN_D VCC_RF AVCC_RF VSS_RF
--
LCD LCD LCD
RFRF 50
RF RF RF RF RF RF
1.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 59 of 1551
RA4W1
1.6
1.3
1.
42 VCC_RF 41 DCLOUT 40 P004 39 AVCC_RF 38 P010/VREFH0 37 P011/VREFL0 36 AVSS0 35 AVCC0 34 XTAL1_RF 33 XTAL2_RF 32 P014 31 P015 30 ANT 29 P501
DCLIN_D 43 P402 44
DCLIN_A 45 P404 46
VBATT 47 VCL 48
P215/XCIN 49 P214/XCOUT 50
VSS 51 P213/XTAL 52 P212/EXTAL 53
VCC 54 P414/CLKOUT_RF 55
P409 56
R7FA4W1AD2CNG
28 VSS_RF 27 P100 26 P101 25 P102 24 P103 23 P104 22 P105 21 P106 20 P107 19 VSS 18 VCC 17 P111 16 P110/TDI
15 P109/TDO/SWO
P407 1 VSS_USB 2 P915/USB_DM 3 P914/USB_DP 4 VCC_USB 5 VCC_USB_LDO 6
P206 7 P205 8 P204 9 RES 10 P201/MD 11 P200 12 P300/TCK/SWCLK 13 P108/TMS/SWDIO 14
1.3
56-pin QFN
. VSS_RF exposed die pad 2.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 60 of 1551
RA4W1
1.7
1.
HMI
QFN56 CACVBATT I/O AGT GPT_OPS, POEG GPT RTC USBFS, CAN SCI IIC SPI RF ADC14 DAC12, OPAMP ACMPLP SLCDC CTSU
1
2
VSS_USB
P407
AGTIO0
RTCOUT USB_VBUS CTS4_RT SDA0 S4/SS4
SSLB3
ADTRG0
SEG11 TS3
3
P915
4
P914
5
VCC_USB
6
VCC_USB
_LDO
7
IRQ0
P206
GTIU
8
CLKOUT IRQ1
P205
AGTO1 GTIV
GTIOC4A
9
CACREF
P204
AGTO1 GTIW
GTIOC4B
10
RES
11
MD
P201
12
NMI
P200
13
TCK/
SWCLK
14
TMS/
SWDIO
15
TDO/SWO/
CLKOUT
P300 P108 P109
GTOUUP GTIOC0A GTOULO GTIOC0B GTOVUP GTIOC1A
16
TDI
IRQ3
P110
GTOVLO GTIOC1B
17
IRQ4
P111
GTIOC3A
18
VCC
19
VSS
20
KR07
P107
GTIOC8A
21
KR06
P106
GTIOC8B
22
KR05/
P105
GTETRGA GTIOC1A
IRQ0
23
KR04/
P104
GTETRGB GTIOC1B
IRQ1
24
KR03
P103
GTOWUP GTIOC2A
25
KR02
P102
AGTO0 GTOWLO GTIOC2B
26
KR01/
P101
AGTEE0 GTETRGB GTIOC5A
IRQ1
27
KR00/
P100
AGTIO0 GTETRGA GTIOC5B
IRQ2
28
29
IRQ11 P501
AGTOB0 GTIV
GTIOC2B
30
R01UH0883JJ0100 Rev.1.00 2020.08.31
USB_DM USB_DP
USB_VBUS RXD4/
EN
MISO4/
SCL4
SDA1
USB_OVRC TXD4/
URA
MOSI4/
SDA4/
CTS9_RT
S9/SS9
SCL1
USB_OVRC SCK4/
URB
SCK9
SCL0
SSLB1 SSLB0
RSPCKB
CTX0 CRX0
CTS9_RT S9/SS9
SCK1/ TXD9/ MOSI9/ SDA9
RXD9/ MISO9/ SCL9
SCK9
SSLB1 SSLB0 MOSIB
MISOB RSPCKB
CTX0 CRX0
RXD0/ MISO0/ SCL0
CTS0_RT S0/SS0
SCK0
TXD0/ MOSI0/ SDA0/ CTS1_RT S1/SS1
RXD0/ MISO0/ SCL0/ SCK1
SDA1 SCL1
USB_OVRC URA
SSLA3 SSLA2 SSLA1
SSLA0 RSPCKA MOSIA
AN019
AN020/ ADTRG0
MISOA
VSS_RF AN017
ANT
SEG12 TS1 SEG20 TSCAP SEG23 TS0
SEG52 TS10 VCOUT SEG53
TS12
COM3 COM2 COM1 TS34 COM0 TS13 CMPREF1 VL4 CMPIN1 CMPREF0 VL2 CMPIN0 VL1
CMPIN1 SEG49
Page 61 of 1551
RA4W1
1.
HMI
QFN56 CACVBATT I/O AGT GPT_OPS, POEG GPT RTC USBFS, CAN SCI IIC SPI RF ADC14 DAC12, OPAMP ACMPLP SLCDC CTSU
31
IRQ7
P015
32
P014
AN010 AN009 DA0
TS28
33
XTAL2_RF
34
35
AVCC0
XTAL1_RF
36
AVSS0
37
VREFL0 IRQ15 P011
38
VREFH0 IRQ14 P010
39
40
IRQ3
P004
41
42
43
AN006 AMP2+ AN005 AMP2AVCC_RF AN004 AMP2O DCLOUT VCC_RF DCLIN_D
TS31 TS30
44
VBATWIO0 IRQ4
P402
AGTIO0/
AGTIO1
45
RTCIC0 CRX0
RXD1/ MISO1/ SCL1
DCLIN_A
SEG6
TS18
46
P404
GTIOC3B RTCIC2
47
VBATT
48
VCL
49
XCIN
P215
50
XCOUT
P214
51
VSS
52
XTAL
IRQ2
P213
GTETRGA GTIOC0A
53
EXTAL IRQ3
P212
AGTEE1 GTETRGB GTIOC0B
54
VCC
55
IRQ9
P414
GTIOC0B
R01UH0883JJ0100 Rev.1.00 2020.08.31
TXD1/ MOSI1/ SDA1
RXD1/ MISO1/ SCL1
SSLA1
CLKOUT_ RF
Page 62 of 1551
RA4W1
1.
HMI
QFN56 CACVBATT I/O AGT GPT_OPS, POEG GPT RTC USBFS, CAN SCI IIC SPI RF ADC14 DAC12, OPAMP ACMPLP SLCDC CTSU
56
IRQ6
P409
GTOWUP GTIOC5A
VSS_RF exposed die pad 2.
USB_EXIC EN
SEG9
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 63 of 1551
RA4W1
2. CPU
MCU Arm� Cortex�-M4
2.1
2.1.1
CPU
Arm Cortex-M4
r0p1-01rel0
Armv7E-M
ANSI/IEEE 754-2008
MPU
Armv7
8
SysTick
SYSTICCLKLOCO ICLK
1. 2.
2. CPU
2.1.2
Arm CoreSightTM ETMTM-M4
r0p1-00rel0
Arm ETM 3.5
CoreSight ITM
& DWT
4
& FPB
6
2
CoreSight TSG
ETM ITM
CPU
DBGREG
CoreSight DAP
JTAG JTAG-DP
SW-DP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 64 of 1551
RA4W1
Cortex-M4 TPIU SWO
CoreSight ETB CoreSight ETB 1KB
1. 2.
2.1.3
MCU
CPU 48MHz
SWO 12.5MHz
Joint Test Action GroupJTAG 12.5MHz
SWD 12.5MHz
2.1 Cortex-M4 CPU
2. CPU
OCD (JTAG/SWD)
Cortex�-M4 Integration
SWJ-DP DAP IC
Cortex-M4
Cortex-M4 (DPU)
APB-AP OCDREG
MPU
AHB-AP
NVIC DWT ITM FPB
AHB2APB
OCD
TS Gen
ETM
DBGREG
ETB M4-TPIU
ROM
2.1
Cortex-M4 CPU
(SWO)
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 65 of 1551
RA4W1
2. CPU
2.2 MCU
2.1 MCU 2.
2.1
MPU
FPB
DWT
ITM
ETM
AHB-AP
HTM TPIU
WIC 1 FPU ETB
SysTick
8
SWJ-DP
32
4 16
11. SCB.SCR.SLEEPDEEP
MCU 15.
SYST_CALIB = 4000 0147h
[31] = 0
[30] = 1
TERMS
[29:24] = 00h
[23:0] = 000147h TERM: (32768 � 10ms) - 1 / 32.768kHz
= 326.6610
= 327 = 000147h
SYSRESETREQ CPU
AUXFAULT
1.
WICICU CPU 14.ICU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 66 of 1551
RA4W1
2. CPU
2.3
SWO 2.2 MCU
2.2
TDO/SWO
1
JTAG TDO
2.4 JTAG/SWD
2.3 JTAG/SWD
2.3
TCK/SWCLK TMS/SWDIO TDI TDO/SWO
JTAG/SWD
P/N Pos. Neg. Pos. Neg.
1 1 1 1
JTAG SWD JTAG TMSSWD JTAG TDI JTAG TDO
2.5
2.5.1
OCD 2.4 2 CPU
2.4
CPU
OCD
--
JTAG/SWD
OCD
.
OCD SWJ-DP CDBGPWRUPREQ OCD
DBGSTR.CDBGPWRUPREQ
.
ARMv7-M CPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 67 of 1551
RA4W1
2. CPU
2.5.2
CPU
2.5.2.1
CoreSight CPU
AHB-AP OCDCoreSight OCD OCD MCUCTRL DBIRQ 2.6.5.3MCU MCUCTRL
2.5.2.2
OCD CPU DBGSTOPCR
2.5
OCD
RES
OCD
OCD RUN
0 1 SRAM SRAM ECC MPU
1
DBGSTOPCR 2
1
DBGSTOPCR 2
DBGSTOPCR 3
DBGSTOPCR 3
DBGSTOPCR 3
DBGSTOPCR 3
MPU
. 1. 2. 3.
OCD CPU OCD RUN CPU OCD IWDT WDT IWDT WDT DBGSTOPCR DBGSTOPCR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 68 of 1551
RA4W1
2. CPU
2.6
2.6.1
MCU 2 CoreSight AP
AHB-APCPU CPU
APB-APOCD OCD
2.2 AP
JTAG/SWD SWJ-DP
0 AHB-AP
DAP IC
1
APB-AP
CPU
DBGREG
OCD OCDREG
2.2
JTAG/SWD
DBGREG OCDREG 2 DBGREG OCD CPU MCU OCDREG OCD OCD CPU OCD
2.6.2
Cortex-M4
Cortex-M4 PPB CPU OCD PPB MCU Cortex-M4 2.6 MCU
2.6
Cortex-M4
ITM DWT FPB SCS TPIU ETM ATB
E000 0000h E000 1000h E000 2000h E000 E000h E004 0000h E004 1000h E004 2000h
E000 0FFFh E000 1FFFh E000 2FFFh E000 EFFFh E004 0FFFh E004 1FFFh E004 2FFFh
ETB
E004 3000h
E004 4000h
E004 3FFFh E004 4FFFh
ROM
E00F F000h
E00F FFFFh
2. 2. 2. 2. 2. 5. 2.7 4. 6. 2.10 4. 2.6.3 7.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 69 of 1551
RA4W1
2. CPU
2.6.3
CoreSight ROM
MCU 1 CoreSight ROM Arm
2.6.3.1
ROM
2.7 CoreSight ROM ROM OCD ROM 7.
2.7
# 0 1 2 3 4 5 6 7 8 9
CoreSight ROM
R/W
E00F F000h
32
R
E00F F004h
32
R
E00F F008h
32
R
E00F F00Ch
32
R
E00F F010h
32
R
E00F F014h
32
R
E00F F018h
32
R
E00F F01Ch
32
R
E00F F020h
32
R
E00F F024h
32
R
FFF0_F003h FFF0_2003h FFF0_3003h FFF0_1003h FFF4_1003h FFF4_2003h FFF4_3003h FFF4_4003h FFF4_5003h 0000_0000h
SCS DWT FPB ITM TPIU ETM
ETB TSG
2.6.3.2
CoreSight
CoreSightROM Arm CoreSight CoreSight 2.8 7.
2.8
CoreSight ROM CoreSight
DEVTYPE PID4 PID5 PID6
E00F FFCCh E00F FFD0h E00F FFD4h E00F FFD8h
R/W
32
R
32
R
32
R
32
R
PID7 PID0 PID1 PID2 PID3
E00F FFDCh
32
R
E00F FFE0h
32
R
E00F FFE4h
32
R
E00F FFE8h
32
R
E00F FFECh
32
R
CID0 CID1 CID2 CID3
E00F FFF0h
32
R
E00F FFF4h
32
R
E00F FFF8h
32
R
E00F FFFCh
32
R
0000_0001h 0000_0004h 0000_0000h 0000_0000h 0000_0000h 0000_0013h 0000_0030h 0000_000Ah 0000_0000h 0000_000Dh 0000_0010h 0000_0005h 0000_00B1h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 70 of 1551
RA4W1
2. CPU
2.6.4
DBGREG
DBGREG CoreSight 2.9 CoreSight DBGREG
2.9
CoreSight DBGREG
DBGSTR DBGSTOPCR
TRACECTR
DAP 0 0
0
4001 B000h 4001 B010h
4001 B020h
32 32
R/W R R/W
32
R/W
2.6.4.1
DBGSTR
DBG.DBGSTR 4001 B000h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
CDBGPW CDBGPW RUPACK RUPREQ
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b27-b0 b28
b29
b31-b30
-- CDBGPWRUPREQ
CDBGPWRUPACK
--
R/W
0
R
0OCD R 1OCD
0 R 1
0
R
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 71 of 1551
RA4W1
2. CPU
2.6.4.2
DBGSTOPCR
DBG.DBGSTOPCR 4001 B010h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
DBGSTOP DBGSTOP _RECCR _RPER
--
--
--
--
--
--
DBGSTOP_LVD [1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
DBGSTO DBGSTO P_WDT P_IWDT
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
R/W
b0
DBGSTOP_IWDT
IWDT 0IWDT
R/W
1IWDT CPU OCD
WDT
b1
DBGSTOP_WDT
WDT 0WDT
R/W
1WDTCPU OCD
WDT
b15-b2 --
00
R/W
b16
DBGSTOP_LVD[1:0] LVD0 0LVD0
R/W
1LVD0
b17
LVD1 0LVD1
R/W
1LVD1
b23-b18 --
00
R/W
b24
DBGSTOP_RPER
SRAM 0SRAM
R/W
1SRAM
b25
DBGSTOP_RECCR SRAM ECC 0SRAM ECC
R/W
1SRAM ECC
b31-b26 --
00
R/W
DBGSTOPCROCD OCD 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 72 of 1551
RA4W1
2. CPU
2.6.4.3
TRACECTR
DBG.TRACECTR 4001 B020h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
ENETB FULL
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b30-b0 b31
-- ENETBFULL
ETB
R/W
0 0 R/W
0ETB CPU
R/W
1ETB CPU
2.6.4.4
DBGREG CoreSight
DBGREG Arm CoreSight CoreSight 2.10 7.
2.10
DBGREG CoreSight
PID4 PID5 PID6 PID7
4001 BFD0h 4001 BFD4h 4001 BFD8h 4001 BFDCh
R/W
32
R
32
R
32
R
32
R
PID0 PID1 PID2 PID3 CID0
4001 BFE0h
32
R
4001 BFE4h
32
R
4001 BFE8h
32
R
4001 BFECh
32
R
4001 BFF0h
32
R
CID1 CID2 CID3
4001 BFF4h
32
R
4001 BFF8h
32
R
4001 BFFCh
32
R
0000_0004h 0000_0000h 0000_0000h 0000_0000h 0000_0005h 0000_0030h 0000_001Ah 0000_0000h 0000_000Dh 0000_00F0h 0000_0005h 0000_00B1h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 73 of 1551
RA4W1
2. CPU
2.6.5
OCDREG
OCDREG OCDCoreSight 2.11 CoreSight OCDREG
2.11
OCDREG
ID 0 ID 1 ID 2 ID 3 MCU MCU
IAUTH0 IAUTH1 IAUTH2 IAUTH3 MCUSTAT MCUCTRL
DAP 1 1 1 1 1 1
8000 0000h 8000 0100h 8000 0200h 8000 0300h 8000 0400h 8000 0410h
32 32 32 32 32 32
R/W W W W W R R/W
.
OCDREG OCD
2.6.5.1
ID IAUTH0 3
128 4 IAUTH0 IAUTH3
32 1 OSIS ID JTAG/SWD 2.11.2 ID
IAUTH0 8000 0000h
b31
b0
IAUTH0:AID 31-0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
IAUTH1 8000 0100h
b31
b0
IAUTH1:AID 63-32
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
IAUTH2 8000 0200h
b31
b0
IAUTH2:AID 95-64
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
IAUTH3 8000 0300h
b31
b0
IAUTH3:AID 127-96
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 74 of 1551
RA4W1
2. CPU
2.6.5.2
MCU MCUSTAT
MCUSTAT 8000 0400h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
CPUST CPUSL OPCLK EEP
AUTH
0
0
0
0
0
0
0
0
0
0
0
0
0
1/0 1/0
1 1
0
b0
AUTH
b1
CPUSLEEP
b2
CPUSTOPCLK
-- --
b31-b3
--
1. MCU
R/W
0
R
1
0CPU
R
1CPU
0CPU MCU R
1CPU MCU
0
R
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 75 of 1551
RA4W1
2. CPU
2.6.5.3
MCU MCUCTRL
MCUCTRL 8000 0410h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- DBIRQ --
--
--
--
--
--
--
EDBGR Q
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
EDBGRQ
b7-b1 b8
-- DBIRQ
b31-b9
--
R/W
1CPU R/W
0 1 EDBGRQ 0 CPU EDBCRQ
00
R/W
1MCU R/W
0 1 DBIRQ 0
00
R/W
.
DBIRQ EDBGRQ
2.6.5.4
OCDREG CoreSight
OCDREG Arm CoreSight CoreSight 2.12 7.
2.12
DBGREG CoreSight
PID4 PID5 PID6 PID7 PID0 PID1 PID2 PID3 CID0 CID1 CID2 CID3
8000 0FD0h 8000 0FD4h 8000 0FD8h 8000 0FDCh 8000 0FE0h 8000 0FE4h 8000 0FE8h 8000 0FECh 8000 0FF0h 8000 0FF4h 8000 0FF8h 8000 0FFCh
32 32 32 32 32 32 32 32 32 32 32 32
R/W
0000_0004h 0000_0000h 0000_0000h 0000_0000h 0000_0004h 0000_0030h 0000_000Ah 0000_0000h 0000_000Dh 0000_00F0h 0000_0005h 0000_00B1h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 76 of 1551
RA4W1
2. CPU
2.7 CoreSight ATB
MCU 1 CoreSight ATB 2 ATB 1 ATB ETM ITM ETB 2.3 MCU CoreSight ATB
ITM
ATB
ATB
ETM
ATB
ETB
TPIU
2.3
CoreSight ATB
2.13 ATB
2.13
#0 #1
ATB
ATB
ITM ETM
ATB 4.
2.8 &
MCU & FP_COMPn REPLACE [31:30] 0 FP_REMAP 28 1 [28] 1 [28] 1 1.
2.9 SysTick
SysTick 24 CPU ICLK SysTick SYSTICCLK 9. 1. 1
1.
1. IMPLEMENTATION DEFINED SYSTICCLKLOCO ICLK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 77 of 1551
RA4W1
2. CPU
2.10 CoreSight
CoreSight CPU ITM ETM 64 48 LSB 2 4.
2.11 OCD
JTAG/SWD MCU 2.4
PC
MCU
OCD
JTAG/SWD
SWJ-DP
AHB-AP
CPU
CPU
APB-AP OCDREG
ID
IAUTH
ID
2.4
MCU ID OCDREG 128 IAUTH 128 ID 2 CPU OCD
2.11.1 DBGEN
OCD OCD SYOCDCR DBGEN OCD DBGEN 11.
2.11.2 ID
ID ID ID 0 3 128 JTAG/SWD ID OCD ID OSIS ID 1FFFFFFFF_FFFFFFFF_FFFFFFFF_FFFFFFFFh7.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 78 of 1551
RA4W1
2. CPU
2.11.3 OCD
2.11.3.1
OCD JTAG/SWD MCU MCU OCD MCU
2.11.3.2 OCD
MCU OCD MCU AHB-AP SWJ-DPAPB-AP OCDREG OCD 2.14
2.14
OCD
AHB-AP APB-AP OCDREG
OCDREG MCUCTRL.DBIRQ MCU OCDREG MCUCTRL.EDBGRQ OCD CPU CPU MCU
2.11.3.3 OSIS ID
OSIS ID OCD RES SYSRESETREQ 1 MCU ID
2.11.3.4 JTAG/SWD
OCD JTAG/SWD OCD ID OSIS OSIS 44s
(1) OSIS MSB 0 [127] = 0
ID OCD
(2) OSIS 1
OCD OCD AHB-AP
1. JTAG SWD OCD MCU
2. DAP SWJ-DP OCD SWJDP CDBGPWRUPREQ
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 79 of 1551
RA4W1
2. CPU
CSDBGPWRUPACK
3. AHB-AP AHB-AP DAP 0
4. AHB-AP CPU
(3) OSIS[127:126] 10b
OCD OCD OCDREG IAUTH 0 3 AHB-AP
1. JTAG SWD OCD MCU
2. DAP SWJ-DP OCD SWJDP CDBGPWRUPREQ CSDBGPWRUPACK
3. OCDREG APB-AP APB-AP DAP 1
4. APB-AP OCDREG IAUTH 0 3 128 ID
5. 128 ID OSIS AHB-AP AHB MCUSTAT AUTH AHB-AP DbgStatus
DbgStatus 1 128 ID OSIS AHB
DbgStatus 0 128 ID OSIS AHB
6. AHB-AP AHB-AP DAP 0
7. AHB-AP CPU
(4) OSIS[127:126] 11b
OCD OCD OCDREG IAUTH 0 3 ID ALeRASEOSIS[127:126] = 10b
IATUH 0 3 ASCII ALeRASE 43.
ALeRASE
1. JTAG SWD OCD MCU
2. DAP SWJ-DP OCD SWJDP CDBGPWRUPREQ CSDBGPWRUPACK
3. OCDREG APB-AP APB-AP DAP 1
4. APB-AP OCDREG IAUTH 0 3 128 ID
5. 128 ID ASCII ALeRASE414C_6552_4153_45FF_FFFF_FFFF_FFFF_FFFFh MCU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 80 of 1551
RA4W1
2.12
1. ARM�v7-M Architecture Reference Manual (ARM DDI 0403D) 2. ARM� Cortex�-M4 Processor Technical Reference Manual (ARM DDI 0439D) 3. ARM�Cortex�-M4 Devices Generic User Guide (ARM DUI 0553A) 4. ARM� CoreSightTM SoC-400 Technical Reference Manual (ARM DDI 0480F) 5. ARM� CoreSightTM ETM-M4 Technical Reference Manual (ARM DDI 0440C) 6. ARM� CoreSightTM Trace Memory Controller Technical Reference Manual (ARM DDI 0461B) 7. ARM� CoreSightTM Architecture Specification (ARM IHI 0029D)
2. CPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 81 of 1551
RA4W1
3.
3.
3.1
3.1 3.2
3.1
1 0
MD
SCI/USB
3.2
3.2.1
MD High
3.2.2
SCI
MCU SCI SCI MCU 43.MD Low
3.2.3
USB
MCU USB USB MCU 43.
MD Low USB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 82 of 1551
RA4W1
3.3
3.3.1
MD 3.1
3.
MD = 1RES POR
RES
MD = 0
POR
RES
RES POR
SCI USB
3.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 83 of 1551
RA4W1
4.
4.
4.1
MCU 4GB 0000 0000h FFFF FFFFh 4.1
FFFF FFFFh E000 0000h
Cortex�-M4
2
1.
2. 3.
407F B1A0h
407F B19Ch 407F 0000h 407E 0000h
2
2 I/O
4010 2000h 4010 0000h 4000 0000h
2
I/O
2
2001 8000h
2000 0000h 0280 0000h 0200 0000h 0101 0034h 0101 0008h
SRAM1
2
2
2
0008 0000h 0000 0000h
13
SRAM 7.
4.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 84 of 1551
RA4W1
5. MMF
5. MMF
5.1
MCU MMFMMF 23 MMF
5.1 MMF
5.1
MMF
8MB0200 0000h 027F FFFFh 128
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 85 of 1551
RA4W1
5. MMF
5.2
5.2.1
MemMirror MMSFR
MMF.MMSFR 4000 1000h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
KEY[7:0]
--
MEMMIRADDR[15:9]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
MEMMIRADDR[8:0]
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b6-b0 b22-b7 b23 b31-b24
-- MEMMIRADDR[15:0] -- KEY[7:0]
MMSFR
R/W
00
R/W
0000h FFFFh (8MB)
R/W
00
R/W
MEMMIRADDR R/W
MEMMIRADDR[15:0]
[22:7] 0200 0000h 32 DBh KEY[7:0]
KEY[7:0] MMSFR
MEMMIRADDR[15:0] KEY 0 MEMMIRADDR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 86 of 1551
RA4W1
5. MMF
5.2.2
MemMirror MMEN
MMF.MMEN 4000 1004h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
KEY[7:0]
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
EN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
EN
b23-b1 b31-b24
-- KEY[7:0]
MMEN
R/W
0
R/W
1
0 0
R/W
EN
R/W
EN
EN MemMirror 32 DBh KEY[7:0]
KEY[7:0] MMEN
EN KEY[7:0] 0 EN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 87 of 1551
RA4W1
5. MMF
5.3
5.3.1
0200 0000h 027F FFFFh MMEN.EN = 1 CPU 0000 0000h 0200 0000h 5.1 MMSFR.MEMMIRADDR 0200 0000h 5.2 5.3 5.4 5.5
b31
b24 b23
0 0 0 0 0 0 1 0 0
MemMirror SFR -- -- -- -- -- -- -- -- --
0 0 0 0 0 0 0 0 0
027F FFFFh
b16 b15
b8 b7
b0
[0200 0000h027F FFFFh]
0
MEMMIRADDR[15:0]
0000000
[22:0] + MEMMIRADDR[22:0]
0
MEMMIRADDR - 1 0042 237Fh
027F FFFFh - MEMMIRADDR + 1 027F FFFFh - MEMMIRADDR
8M
MemMirror SFR = 0042 2380h 0200 1000h = 0042 3380h 023E 8123h = 0000 A4A3h
0000 0000h 007F FFFFh
+ MemMir SFR
5.1
0200 0000h
MEMMIRADDR 0042 2380h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 88 of 1551
RA4W1
5. MMF
CPU
32
MemMirror SFR
Hex 0 0 4 2 2 3 8 0
128
32
1 32
32
1. 5.4
5.2
-don't care
bin 0 0 0 0 0 0 1 0 0 - - - - - - - - - - - - - - - - - - - - - - -
0200 0000h027F FFFFh
9 9
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 89 of 1551
RA4W1
5. MMF
5.3 ARM� MPU CPU MPU
5.3
CPU ARM MPU
CPU
MPU
MMEN.EN = 1
No
Yes
(0200 0000h027F FFFFh)
[31:23] =
No
000000100b
MEMMIRADDR
Yes
[6:0] = [6:0] [22:7] = [22:7] +
MMSFR.MEMMIRADDR[15:0] [31:23] = 000000000b
[31:0] = [31:0]
5.4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 90 of 1551
RA4W1
5. MMF
MMSFR.MEMMIRADDR[15:0]
MMEN.EN = 1
5.5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 91 of 1551
RA4W1
5. MMF
5.3.2
MMSFR.MEMMIRADDR MMEN.EN 1 0200 0000h
5.6
027F FFFFh
0201 0000h
0200 0000h
003F FFFFh
Ver3 0012 0000h
Ver2 0011 0000h
Ver1 0010 0000h
0001 0000h
0000 0000h
MMSFR
-
5.6
Ver.1 MMSFR DB10 0000h Ver.2 MMSFR DB11 0000h Ver.3 MMSFR DB12 0000h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 92 of 1551
RA4W1
6.
6.1
MCU 14 RES VBATT 0 1 SRAM SRAM ECC MPU MPU 6.1
6.
6.1
RES VBATT 0 1 SRAM SRAM ECC MPU MPU
RES Low VCC VPOR1 VCC VDETBATT1
VCC Vdet01 VCC Vdet11 SRAM SRAM ECC MPU MPU
Arm� AIRCR.SYSRESETREQ
1.
VPORVdet0Vdet1 VDETBATT8.LVD48.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 93 of 1551
RA4W1
6.
6.2 6.3
6.2
RSTSR0.PORF
0 RSTSR0.LVD0RF
RSTSR1.IWDTRF
RSTSR1.WDTRF
1 RSTSR0.LVD1RF
RSTSR1.SWRF
SRAM RSTSR1.RPERF
SRAM ECC RSTSR1.REERF
MPU RSTSR1.BUSSRF
MPU RSTSR1.BUSMRF
RSTSR1.SPERF
RSTSR2.CWSF
RES
�
�
0
� �
�
� � �
� � �
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
RSTSR0.PORF
0 RSTSR0.LVD0RF
RSTSR1.IWDTRF
RSTSR1.WDTRF
1 RSTSR0.LVD1RF
RSTSR1.SWRF
SRAM RSTSR1.RPERF
SRAM ECC RSTSR1.REERF
MPU RSTSR1.BUSSRF
MPU RSTSR1.BUSMRF
RSTSR1.SPERF
RSTSR2.CWSF
SRAM
� � �
�
� � �
�
�
�
�
�
SRAM ECC �
�
�
MPU
�
�
�
MPU
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
� � �
�
� � �
�
�
�
�
�
0 � 1. VBATT_POR 12.
1
� � �
�
� � �
�
�
�
�
�
� � �
�
� � �
�
�
�
�
�
VBATT_ POR 1
� � �
�
� � �
�
�
�
�
�
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 94 of 1551
RA4W1
6.
6.3
WDTRR, WDTCR, WDTSR, WDTRCR, WDTCSTPR
1 LVD1CR0, LVCMPCR.LVD1E, LVDLVLR.LVD1LVL
LVD1CR1/LVD1SR
SOSC
SOSCCR
SOMCR
LOCO
LOCOCR
LOCOUTCR
MOSC
MOMCR
2
AGT
MPU
XCIN/XCOUT
XCIN/XCOUT
VBTCR1
VBTCR2, VBTSR, VBTCMPCR, VBTLVDICR, VBTWCTLR, VBTWCH0OTSR, VBTICTLR, VBTOCTLR, VBTWTER, VBTWEGR, VBTWFR
VBTBKRnn = 0511
CPU
RES
� � � � � � � � �
�
� � � � � � �
0
� � � � � � � �
�
�
� � � � � � � � �
�
� � � � � � � � �
�
1
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
WDTRR, WDTCR, WDTSR, WDTRCR, WDTCSTPR
1 LVD1CR0, LVCMPCR.LVD1E, LVDLVLR.LVD1LVL
LVD1CR1/LVD1SR
SOSC
SOSCCR
SOMCR
LOCO
LOCOCR
LOCOUTCR
MOSC
MOMCR
2
AGT
MPU
XCIN/XCOUT
XCIN/XCOUT
VBTCR1
VBTCR2, VBTSR, VBTCMPCR, VBTLVDICR, VBTWCTLR, VBTWCH0OTSR, VBTICTLR, VBTOCTLR, VBTWTER, VBTWEGR, VBTWFR
VBTBKRnn = 0511
CPU
SRAM
�
� � � � �
� �
� � �
SRAM ECC
�
� � � � �
� �
� � �
MPU
MPU
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
�
� � � � �
� � �
� � �
�
�
�
�
�
VBATT_ POR 3
�
�
� 1
� � � � � �
� �
�
1. 9. 2. RTC
25.RTC 3. VBATT_POR 12.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 95 of 1551
RA4W1
6.
RTC SOSC LOCO RTC AGT 6.4 6.5 SOSC LOCO
6.4 SOSC
SOSC
XCIN/XCOUT
VBATT_POR
6.5 LOCO
LOCO
VBATT_POR
LOCOUTCR LOCOUTCR
� 15%
6.6
6.6
RES
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 96 of 1551
RA4W1
6.2
6.2.1
0RSTSR0
SYSTEM.RSTSR0 4001 E410h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
LVD1R LVD0R
F
F
PORF
0
0
0
0
x
x1 x1 x 1
x
6.
b0
PORF
b1
LVD0RF
0
b2
LVD1RF
1
b3
--
b7-b4
--
0 1
0 0 1 0
0 1 1 1
0
00
R/W R(/W)
2
R(/W)
2
R(/W)
2
R/W R/W
1. 2.
0 1 0
PORF 1 0 6.2 1 0
LVD0RF 0 VCC Vdet0 1 0 0 6.2 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 97 of 1551
RA4W1
LVD1RF 1 VCC Vdet1 1 1 0 6.2 1 0
6.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 98 of 1551
RA4W1
6.
6.2.2
1RSTSR1
SYSTEM.RSTSR1 4001 E0C0h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
SPERF
BUSM RF
BUSSR F
REERF
RPERF
--
--
--
--
--
SWRF
WDTR IWDTR
F
F
0
0
0
x 1 x 1 x1 x1 x 1 0
0
0
0
0
x 1 x 1 x 1
x
b0 b1 b2 b7-b3 b8 b9 b10 b11 b12 b15-b13
IWDTRF WDTRF SWRF -- RPERF REERF BUSSRF BUSMRF SPERF --
SRAM SRAM ECC MPU MPU SP
R/W
0 1
R(/W)
2
0 1
R(/W)
2
0 1
R(/W)
2
00 R/W
0SRAM 1SRAM
R(/W)
2
0SRAM ECC 1SRAM ECC
R(/W)
2
0MPU 1MPU
R(/W)
2
0MPU 1MPU
R(/W)
2
0SP 1SP
R(/W)
2
00 R/W
1. 2.
0 1 0
IWDTRF 1 0 6.2 1 0
WDTRF 1 0 6.2 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 99 of 1551
RA4W1
SWRF 1 0 6.2 1 0
RPERF SRAM SRAM 1 SRAM 0 6.2 1 0
REERF SRAM ECC SRAM ECC
1 SRAM ECC 0 6.2 1 0 BUSSRF MPU MPU 1 MPU 0 6.2 1 0 BUSMRF MPU MPU 1 MPU 0 6.2 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
6. Page 100 of 1551
RA4W1
SPERF SP 1 0 6.2 1 0
6.
6.2.3
2RSTSR2
SYSTEM.RSTSR2 4001 E411h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- CWSF
0
0
0
0
0
0
0
x 1
x
b0
b7-b1
CWSF
--
0 1
0 0
1. 2.
1
R/W R(/W)
2
R/W
RSTSR2
CWSF CWSF
RES 1 1 0
0 6.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 101 of 1551
RA4W1
6.
6.3
6.3.1
RES
RES RES Low MCU MCU RES Low
RES Low High RES tRESWT CPU
48.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 102 of 1551
RA4W1
6.
6.3.2
POR
RES High VCC VPOR CPU MCU RSTSR0.PORF 1 PORF RES
0 1OFS1 0 LVDAS 0 0 VCC Vdet0 RSTSR0.LVD0RF 1 0 0 OFS1.LVDAS 0
VCC Vdet0 0 tLVD0CPU Vdet0 1OFS1 VDSEL1[2:0]
6.1 0
Vdet01 VCCmin.
VPOR
VCC
3
RES
0
0
POR Low
LVD0 Low
0 Low
Low
OFS1.LVDAS
tLVD02
tLVD02
RSTSR0.PORF RSTSR0.LVD0RF
RES
. 1.
2. 3.
48. Vdet0 0 VPOR VCCmin MCU tLVD0 0 VCC POR
6.1
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 103 of 1551
RA4W1
6.
6.3.3
0 1OFS1 0 LVDAS 0 0 VCC Vdet0 RSTSR0.LVD0RF 1 0 0 OFS1.LVDAS 0 VCC Vdet0 0 tLVD0CPU
1 0LVD1CR0 1 RIE 1 1 RI 1 VCC Vdet1 RSTSR0.LVD1RF 1 1
1 LVD1CR0 1 RNLVD1CR0.RN 0 VCC Vdet1 Vdet1
LVD1 tLVD1CPU LVD1CR0.RN 1 VCC Vdet1 LVD1 tLVD1CPU
Vdet1 LVDLVLR
6.2 1 1 8. LVD
Vdet11
VCC
RES
LVCMPCR.LVD1E i Low LVD1CR0.RN = 0 RSTSR0.LVD1RF
LVD1CR0.RN = 1 RSTSR0.LVD1RF
LVD1
tLVD12
RES
tLVD12
RES
. 1.
2.
48. Vdet1 1 tLVD1 1
6.2
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 104 of 1551
RA4W1
6.
6.3.4
IWDT IWDT 0OFS0
IWDT tRESW2 CPU
27.IWDT
6.3.5
WDTWDT WDTRCR 0OFS0WDT
WDT
tRESW2CPU
26.WDT
6.3.6
Arm AIRCR SYSRESETREQ SYSRESETREQ 1 tRESW2 CPU
SYSRESETREQ ARM� Cortex�-M4 Technical Reference Manual
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 105 of 1551
RA4W1
6.
6.3.7
RSTSR2.CWSF
CWSF 0 0 1 1 0 0
6.3
VPOR
VCC RES
PORLow RSTSR2.CWSF
RESLow 0
1
6.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 106 of 1551
RA4W1
6.
6.3.8
RSTSR0 RSTSR1 6.4 1 0
RSTSR1 00h
No
RSTSR0.LVD1RF = 1
Yes
RSTSR0. No LVD0RF = 1
Yes
RSTSR0. No
PORF = 1
Yes
1.
RSTSR1RSTSR0 1
0
RES
RSTSR1 RSTSR0.LVD1RF 1
6.4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 107 of 1551
RA4W1
7.
7.
7.1
MCU 2 7.1
7.1
1 0101 0018h0101 0033h 0101 0010h0101 0013h 0101 0008h0101 000Bh
OCDID (OSIS)
(AWS)
(AWSC)
0000 0408h0000 043Bh
SECMPUxxx
0000 0404h0000 0407h 0000 0400h0000 0403h
1 (OFS1)
0 (OFS0)
1.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 108 of 1551
RA4W1
7.
7.2
7.2.1
0OFS0
OFS0 0000 0400h
b31 b30 b29
--
WDTST PCTL
--
b28 b27 b26 b25 b24 b23 b22 b21
WDTR STIRQ
WDTRPSS[1:0]
WDTRPES[1:0]
WDTCKS[3:0]
1
b20 b19 b18 b17 b16
WDTTOPS[1:0]
WDTST RT
--
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
--
IWDTS TPCTL
--
IWDTR STIRQS
IWDTRPSS[1:0]
IWDTRPES[1:0]
IWDTCKS[3:0]
1
b4
b3
b2
b1
b0
IWDTTOPS[1:0]
IWDTS TRT
--
b0 b1
-- IWDTSTRT
b3-b2
IWDTTOPS[1:0]
b7-b4
IWDTCKS[3:0]
b9-b8
IWDTRPES[1:0]
b11-b10 IWDTRPSS[1:0]
b12
IWDTRSTIRQS
b13
--
b14
IWDTSTPCTL
b16-b15 --
b17
WDTSTRT
IWDT IWDT
IWDT
IWDT
IWDT
IWDT IWDT WDT
R/W
R
0IWDT
R
1IWDT
b3 b2
R
0 0128 007Fh
0 1512 01FFh
1 01024 03FFh
1 12048 07FFh
b7
b4
R
0 0 0 0 1
0 0 1 0 16
0 0 1 1 32
0 1 0 0 64
1 1 1 1 128
0 1 0 1 256
b9 b8
R
0 075%
0 150%
1 025%
1 10%
b11 b10
R
0 025%
0 150%
1 075%
1 1100%
0 R
1
R
1
0
R
1
R
1
0WDT
R
1WDT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 109 of 1551
RA4W1
7.
b19-b18 WDTTOPS[1:0]
b23-b20 WDTCKS[3:0]
b25-b24 WDTRPES[1:0]
b27-b26 WDTRPSS[1:0]
b28
WDTRSTIRQS
b29
--
b30
WDTSTPCTL
b31
--
WDT
WDT
WDT
WDT
WDT WDT
R/W
b19 b18
R
0 01024 03FFh
0 14096 0FFFh
1 08192 1FFFh
1 116384 3FFFh
b23
b20
R
0 0 0 1 PCLKB/4
0 1 0 0 PCLKB/64
1 1 1 1 PCLKB/128
0 1 1 0 PCLKB/512
0 1 1 1 PCLKB/2048
1 0 0 0 PCLKB/8192
b25 b24
R
0 075%
0 150%
1 025%
1 10%
b27 b26
R
0 025%
0 150%
1 075%
1 1100%
WDT
R
0
1
R
1
0
R
1
R
1
1. FFFF_FFFFh
IWDTSTRT IWDT
IWDT
IWDTTOPS[1:0] IWDT
IWDTCKS[3:0] 1 12851210242048 IWDT IWDTCKS[3:0] IWDTTOPS[1:0]
27.IWDT
IWDTCKS[3:0] IWDT
IWDT 1/11/161/321/641/1281/256 IWDTTOPS[1:0] IWDT 128 524288 IWDT
27.IWDT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 110 of 1551
RA4W1
7.
IWDTRPES[1:0] IWDT
0%25%50%75%
IWDTRPSS[1:0] IWDTRPES[1:0] IWDTTOPS[1:0]
27.IWDT
IWDTRPSS[1:0] IWDT
25%50%75%100% 100% 0%
27.IWDT
IWDTRSTIRQS IWDT
27.IWDT
IWDTSTPCTL IWDT
27.IWDT
WDTSTRT WDT
WDT WDT WDT OFS0
WDTTOPS[1:0] WDT
WDTCKS[3:0] 1 10244096819216384 PCLKB WDTCKS[3:0] WDTTOPS[1:0]
26.WDT
WDTCKS[3:0] WDT
PCLKB 1/41/641/1281/5121/20481/8192 WDTTOPS[1:0] WDT 4096 134217728 PCLKB
26.WDT
WDTRPES[1:0] WDT
0%25%50%75%
WDTRPSS[1:0] WDTRPES[1:0] WDTTOPS[1:0]
26.WDT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 111 of 1551
RA4W1
7.
WDTRPSS[1:0] WDT 25%50%75%100%
100% 0%
26.WDT
WDTRSTIRQS WDT
26.WDT
WDTSTPCTL WDT
26.WDT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 112 of 1551
RA4W1
7.
7.2.2
1OFS1
OFS1 0000 0404h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
1
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
HOCOFRQ1[2:0]
--
--
--
HOCO EN
--
--
VDSEL1[2:0]
LVDAS --
--
1
b1-b0
--
b2
LVDAS
b5-b3
VDSEL1[2:0]
0 0
b7-b6 b8 b11-b9 b14-b12
--
HOCOEN
HOCO
--
HOCOFRQ1[2:0] HOCO 1
b31-b15 --
R/W
R
1
0 0
R
1 0
b5
b3
R
0 0 0
0 0 12.82V
0 1 02.51V
0 1 11.90V
R
1
0HOCO
R
1HOCO
R
1
b14 b12
R
0 0 024MHz
0 1 032MHz
1 0 048MHz
1 0 164MHz
R
1
1. FFFF_FFFFh
LVDAS 0 0
VDSEL1[2:0] 0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 113 of 1551
RA4W1
7.
HOCOEN HOCO HOCO 0
CPU HOCO
. HOCOEN 0 HOCO SCKSCR.CKSEL[2:0] HOCO HOCO OFS1.HOCOFRQ1
Low-voltage HOCOCR.HCSTP 0
HOCOFRQ1[2:0] HOCO 1 HOCO 243248 64MHz
7.2.3
MPU
7.1 MPU 16. MPU
MPU MPU MCU 16. MPU
7.1
MPU
MPU 0
SECMPUPCS0 0000 0408h 4 SRAM
MPU 0
SECMPUPCE0 0000 040Ch 4 SRAM
MPU 1
SECMPUPCS1 0000 0410h 4 SRAM
MPU 1
SECMPUPCE1 0000 0414h 4 SRAM
MPU 0
SECMPUS0
0000 0418h 4
MPU 0
SECMPUE0
0000 041Ch 4
MPU 1
SECMPUS1 SRAM
0000 0420h 4
MPU 1
SECMPUE1 SRAM
0000 0424h 4
MPU 2
SECMPUS2
0000 0428h 4
MPU 2
SECMPUE2
0000 042Ch 4
MPU 3
SECMPUS3
0000 0430h 4
MPU 3
SECMPUE3
0000 0434h 4
MPU SECMPUAC
0000 0438h 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 114 of 1551
RA4W1
7.
7.2.4
AWSC
AWSC 0101 0008h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
-- FSPR --
--
--
--
-- BTFLG --
--
--
--
--
--
--
--
b7-b0 b8
b13-b9 b14
b31-b15
R/W
--
1 R
BTFLG
R
08KB 0000 0000h0000 1FFFh 8KB
0000 2000h 0000 3FFFh
18KB 0000 0000h0000 1FFFh 8KB
0000 2000h 0000 3FFFh
--
1 R
FSPR
R
BTFLG 0
1 0FAWE[11:0]FAWS[11:0]
BTFLG
1FAWE[11:0]FAWS[11:0]
BTFLG
--
1 R
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 115 of 1551
RA4W1
7.
7.2.5
AWS
AWS 0101 0010h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
FAWE[11:0] 1
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
FAWS[11:0] 1
b11-b0
FAWS[11:0]
1
b15-b12 b27-b16
-- FAWE[11:0]
1
b31-b28 --
R/W
R
[21:10]
1 R
R
[21:10]
1 R
1. FAWE[0] FAWS[0] 0
FSPR
FAWS[11:0] FAWE[11:0] FAWS[11:0] FAWE[11:0]
FAWE[11:0] = FAWS[11:0]P/E
FAWE[11:0] FAWS[11:0]P/E FAWS[11:0] FAWE[11:0] 1
FAWE[11:0] FAWS[11:0]P/E
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 116 of 1551
RA4W1
7.
7.2
...
7 FAWE[11:0] = 007h
6
5 4 FAWS[11:0] = 004h 3
2
1
0
P/E
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 117 of 1551
RA4W1
7.
7.2.6
OCD ID OSIS
OSIS OCD ID ID OCD MCU OCD ID ID OCD OCD OSIS 32
OSIS 0101 0018h, OSIS 0101 0020h, OSIS 0101 0028h, OSIS 0101 0030h b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
OCD ID ID
ID 127 126 ID ID 7.2
7.2
ID
ID
SCI/USB
FFh, ..., FFh FFh
127 = 1
JTAG/SWD
126 = 1 16
1 FFh
127 = 1 126 = 0
127 = 0
ID ID
ID = ID = ID ID ASCII ALeRASE 414C_6552_4153_45FF_FFFF_FFFF_FFFF_F FFFh FSPR0
ID ID ID
ID ID
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 118 of 1551
RA4W1
7.
7.3
7.3.1
7.1
.
7.3.2
7.3.1
(1)
43.
(2) OCD
MCU 2 7.3.1
S MCU
GUI 7.3.1
7.4
7.4.1
1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 119 of 1551
RA4W1
8. LVD
8. LVD
8.1
LVDVCC LVD 2 01 VCC LVD VCC
01 LVD
8.1 LVD 8.1 01 8.2 1
8.1 VCC
LVD
0 Vdet0 Vdet0 OFS1.VDSEL1[2:0] 3
0 Vdet0 VCC VCC Vdet0 CPU
1 Vdet1
Vdet1 LVDLVLR.LVD1LVL[4:0] 10
LVD1SR.MON Vdet1
LVD1SR.DET Vdet1 1
Vdet1 VCC CPU VCC Vdet1 Vdet1 VCC
1
Vdet1 VCC VCC Vdet1
Vdet1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 120 of 1551
RA4W1
8. LVD
VCC
OFS1.LVDAS
Vdet0
OFS1.VDSEL1[2:0]
+ -
Vdet0
Vdet1
LVCMPCR.LVD1E LVD1CR0.CMPE
+ - Vdet1
LVDLVLR.LVD1LVL[4:0]
. 7.
8.1
01
0 1
1
1
VCC
LVCMPCR.LVD1E LVD1CR0.CMPE
+
-
Vdet1
LVDLVLR.LVD1LVL[4:0]
LVCMPCR.LVD1E0 1High
1
LVD1SR.DET 00
LVD1SR.MON
b1 LVD1CR0.RIE LVD1CR0.RI
LVD1CR0.RN = 0
LVD1CR0. RN = 1 LVD1SR. DET
LVD1CR1.IDTSEL[1:0]
LVD1CR1.IRQSEL
8.2
1
1 Low
1 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 121 of 1551
RA4W1
8.2
8.2.1
1 1LVD1CR1
SYSTEM.LVD1CR1 4001 E0E0h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
IRQSE L
IDTSEL[1:0]
0
0
0
0
0
0
0
1
8. LVD
R/W
b1-b0
IDTSEL[1:0]
1
b1 b0
0 0VCC Vdet1 0 1VCC Vdet1 1 0 1 1
R/W
b2
IRQSEL
1
0
1 1
R/W
b7-b3
--
0 0
R/W
. 1.
PRCR.PRC3 1 ICU NMIER.LVD1EN
8.2.2
1 LVD1SR
SYSTEM.LVD1SR 4001 E0E1h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
-- MON DET
0
1
0
b0
DET
1
b1
MON
1
b7-b2
--
0 1Vdet1 0VCC Vdet1 1VCC Vdet1 MON 0 0
R/W R(/W)
1
R
R/W
. 1.
PRCR.PRC3 1 0 0 2
DET 1
DET LVCMPCR.LVD1E 1 1 LVD1CR0.CMPE 1 1
DET 0 LVD1CR0.RIE 0 LVD1CR0.RIE 0 1PCLKB 2
MON 1
MON LVCMPCR.LVD1E 1 1 LVD1CR0.CMPE 1 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 122 of 1551
RA4W1
8.2.3
LVCMPCR
SYSTEM.LVCMPCR 4001 E417h
b7
b6
b5
b4
b3
b2
b1
b0
--
-- LVD1E --
--
--
--
--
0
0
0
0
0
0
0
0
8. LVD
b4-b0 b5
-- LVD1E
1
b7-b6
--
R/W
00
R/W
0 1
R/W
1 1
00
R/W
.
PRCR.PRC3 1
LVD1E 1
1 LVD1SR.MON LVD1E 1 LVD1E 0 1 td(E-A) 1
8.2.4
LVDLVLR
SYSTEM.LVDLVLR 4001 E418h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
LVD1LVL[4:0]
0
0
0
0
0
1
1
1
b4-b0
LVD1LVL[4:0]
1
b7-b5
--
b4
b0
0 0 1 0 0 3.10V (Vdet1_4)
0 0 1 0 1 3.00V (Vdet1_5)
0 0 1 1 0 2.90V (Vdet1_6)
0 0 1 1 1 2.79V (Vdet1_7)
0 1 0 0 0 2.68V (Vdet1_8)
0 1 0 0 1 2.58V (Vdet1_9)
0 1 0 1 0 2.48V (Vdet1_A)
0 1 0 1 1 2.20V (Vdet1_B)
0 1 1 0 0 1.96V (Vdet1_C)
0 1 1 0 1 1.86V (Vdet1_D)
0 0
R/W R/W
R/W
.
PRCR.PRC3 1
LVDLVLR LVCMPCR.LVD1E 0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 123 of 1551
RA4W1
8.2.5
1 0LVD1CR0
SYSTEM.LVD1CR0 4001 E41Ah
b7
b6
b5
b4
b3
b2
b1
b0
RN
RI
--
--
-- CMPE --
RIE
1
0
0
0
x
0
0
0
x
8. LVD
R/W
b0
RIE
1 0
R/W
1
b1
--
0 0
R/W
b2
CMPE
1 0 1
R/W
1 1
b3
--
1
R/W
b5-b4 --
0 0
R/W
b6
RI
b7
RN
1 1
0Vdet1 1 1Vdet1 1
0VCC Vdet1 tLVD1 1LVD1 tLVD1
R/W R/W
.
PRCR.PRC3 1
RIE 1
1 1 1 1
RN 1
RN 1LVD1 MOCOCR.MCSTP 0MOCO RN 0VCC Vdet1 RN 1LVD1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 124 of 1551
RA4W1
8.3 VCC
8.3.1
Vdet0
0
8. LVD
8.3.2
Vdet1
8.2 Vdet1 LVD1SR.MON 1
8.2
Vdet1
1
1 1 LVDLVLRLVCMPCR.LVD1E = 0 1
2 LVDLVLR.LVD1LVL[4:0]
3 LVCMPCR.LVD1E = 1 1
4 td(E-A)LVD LVD 5 LVD1CR0.CMPE = 1 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 125 of 1551
RA4W1
8. LVD
8.4 0
0 OFS1.LVDAS 0 0 OFS1.LVDAS 0 8.3 0
Vdet01 VPOR1
3
VCC
RES
POR Low
LVD0 Low
0 Low
Low
RSTSR0.PORF
0
OFS1.LVDAS
tPOR2
tLVD02
RES
RSTSR0.LVD0RF
. 1. 2. 3.
48. VPOR Vdet0 0 tPOR tLVD0 0 VCC POR
8.3
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 126 of 1551
RA4W1
8. LVD
8.5 1 1
1
8.3 1 8.4 1 8.4 1 1 6. 6.2
1 1
(1)
VCC Vdet1 1 LVD1CR0.RN = 0
8.3
1 1
1
1
1 1 ELC
1
1 LVDLVLR LVCMPCR.LVD1E = 0 1
2 LVDLVLR.LVD1LVL[3:0]
3 LVCMPCR.LVD1E = 1 1
4 td(E-A)LVD LVD 1
5 LVD1CR0.RI = 0 1 LVD1CR0.RI = 1 1
LVD1CR0.RN
6 LVD1CR1.IDTSEL[1:0] --
LVD1CR1.IRQSEL
7 LVD1SR.DET = 0
8 LVD1CR0.RIE = 1 12
9 LVD1CR0.CMPE = 1 1
1. 2.
4 5 8 td(E-A) 48. ELC 8
8.4
1 1
1
1 1 ELC1 1 LVD1CR0.CMPE = 0 1 2 LVD1CR0.RIE = 0 11 3 LVCMPCR.LVD1E = 0 1
1. ELC 2
1 1
1 1
1 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 127 of 1551
RA4W1 8.4 1
8. LVD
Vdet1
VCC
VCC (VCCmin)1
LVD1SR.MON
LVD1CR1.IDTSEL1:0 10b
LVD1SR.DET 1
LVD1CR1.IDTSEL1:0 00b
LVD1SR.DET 1
LVD1CR1.IDTSEL1:0 01b
LVD1SR.DET 1
0
1. 0VCC VCCmin
8.4
1
0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 128 of 1551
RA4W1
8. LVD
8.6
LVD ELC
(1) Vdet1
1 1 Vdet1 LVD
LVD LVD ELC LVD LVD LVD ELC LVD
8.6.1
LVD 1 LVD1CR0.RIE CPU
ELC
1 ELC
Vdet1 ELC Vdet1 Vdet1 ELC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 129 of 1551
RA4W1
9.
9.
9.1
MCU 9.1 9.2 9.1
9.1
MOSC
SOSC
1MHz 20MHz 3.6V 1MHz 8MHz 2.4V
20MHz
EXTALXTAL
32.768kHz
PLL
XCINXCOUT PLL
HOCO
MOCO
LOCO
IWDT IWDTLOCO
JTAGTCK
SWDSWCLK
Bluetooth
Bluetooth BLELOCO
XTAL1_RFXTAL2_RF
MOSC 4MHz 12.5MHz 8 31 1 24 24MHz 64MHz2 24MHz 32MHz4 24/32/48/64MHz 8MHz 32.768kHz 15kHz 12.5MHz 12.5MHz 32MHz
32.768kHz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 130 of 1551
RA4W1
9.
9.2
ICLK
MOSC/SOSC/HOCO/MOCO/ LOCO/PLL
A PCLKA
MOSC/SOSC/HOCO/MOCO/ LOCO/PLL
B PCLKB
MOSC/SOSC/HOCO/MOCO/ LOCO/PLL
C PCLKC
MOSC/SOSC/HOCO/MOCO/ LOCO/PLL
D PCLKD
MOSC/SOSC/HOCO/MOCO/ LOCO/PLL
FCLK
MOSC/SOSC/HOCO/MOCO/ LOCO/PLL
USB UCLK
HOCO 1/PLL
CAN CANMCLK
MOSC
LCD LCDSRCCLK
MOSC/SOSC/HOCO/MOCO/ LOCO
AGT AGTSCLK/AGTLCLK
SOSC/LOCO
CAC CACMCLK
MOSC
CACCACSCLK SOSC
CAC LOCO CACLCLK
LOCO
CAC MOCO CACMOCLK
MOCO
CAC HOCO CACHCLK
HOCO
CAC IWDTLOCO CACILCLK
IWDTLOCO
RTC RTCSCLK/ RTCLCLK
SOSC/LOCO
IWDT IWDTCLK
IWDTLOCO
SysTick SYSTICCLK
LOCO
JTAG JTAGTCK
TCK
CLKOUT
MOSC/SOSC/LOCO/MOCO/ HOCO
SWCLK
TRCLK
Bluetooth BLECK
Bluetooth BLELOCO
SWCLK
MOSC/SOSC/HOCO/MOCO/ LOCO/PLL Bluetooth
Bluetooth
CPU, DTC, DMAC, Flash, SRAM
SPI, SCI, SCE5, CRC, GPT DAC12, IIC, DOC, CAC, CAN, AGT, POEG, CTSU ADC14
GPT
USBFS CAN SLCDC
AGT
CAC
CAC CAC
CAC
CAC
CAC
RTC
IWDT SysTick
JTAG CLKOUT
OCD
CPU-OCD
BLE
BLE
48MHz 1, 2, 4, 8, 16, 32, 64 48MHz 1, 2, 4, 8, 16, 32, 64 32MHz 1, 2, 4, 8, 16, 32, 64 64MHz 1, 2, 4, 8, 16, 32, 64 64MHz 1, 2, 4, 8, 16, 32, 64 1MHz 32MHzP/E 32MHz 1, 2, 4, 8, 16, 32, 64 48MHz 1MHz 20MHz 64MHz
32.768kHz
20MHz
32.768kHz 32.768kHz
8MHz
24/32/48/64MHz
15kHz
32.768kHz
15kHz 32.768kHz
12.5MHz 16MHz 1, 2, 4, 8, 16, 32, 64, 128 12.5MHz
48MHz 1, 2, 4 32MHz
32.768kHz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 131 of 1551
RA4W1
9.
.
. 1.
ICLK PCLKA PCLKBPCLKD PCLKA PCLKBICLK FCLK N 64 ICLK:FCLK = N:1ICLK:PCLKA = N:1ICLK:PCLKB = N:1 ICLK:PCLKC = N:1 1:NICLK:PCLKD = N:1 1:N PCLKB:PCLKC = 1:11:21:42:14:1 8:1 P/E FCLK 1MHz USBFS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 132 of 1551
RA4W1
XTAL EXTAL
XCIN XCOUT
PLLMUL[4:0] PLLCR2
PLODIV[1:0] PLLCR2
PLL
CKSEL[2:0] SCKSCR
1/1 1/2 1/4 1/8 1/16 1/32 1/64
9.
SCKDIVCR FCK[2:0] Flash FCLK Flash
SCKDIVCR ICK[2:0]
ICLK CPU, DMAC, FLASH, SRAM
PCKA[2:0]
SCKDIVCR
PCKB[2:0] PCKC[2:0]
PCKD[2:0]
SeSleelcetcotror
PCLKA PCLKB PCLKCADC14 PCLKDGPT
24/32/48/64MHz
8MHz
32.768kHz
CKOSEL[2:0] CKOCR
IWDT 15kHz
IWDT
TCK/ SWCLK
XTAL1_RF XTAL2_RF
Bluetooth
Bluetooth
Bluetooth
Bluetooth
9.1
CKODIV[2:0] CKOCR
1/1 1/2 1/4 1/8 1/16 1/32 1/64 1/128
Bluetooth
1/8 1/16 1/32
TRCKCR TRCK[3:0] TRCLK Cortex-M4
SLCDSCKCR LCDSCKSEL[2:0] LCDLCDSRCCLK LCDC
USBCKCR
SysTickSYSTICCLK AGTAGTSCLK AGTAGTLCLK USBCLKSEL
USBUCLK USB
CLKOUT CLKOUT
CANCANMCLK
CAN
IWDT LOCOIWDTCLK
IWDT
(CACILCLK)
(CACLCLK)
CAC
(CACMOCLK) (CACHCLK)
CAC
(CACSCLK)
(CACMCLK)
RTCRTCLCLK RTCRTCSCLK JTAGJTAGTCK TAP SWCLK TAP
BluetoothBLECLK BLE
CLKOUT_RF
BluetoothBLELOCO BLE
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 133 of 1551
RA4W1 9.3
9.
9.3
XTAL EXTAL XCIN XCOUT TCK/SWCLK CLKOUT XTAL1_RF XTAL2_RF CLKOUT_RF
EXTAL 9.3.2 32.768kHz
JTAG CLKOUT/BUZZER 32MHz
Bluetooth
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 134 of 1551
RA4W1
9.
9.2
9.2.1
SCKDIVCR
SYSTEM.SCKDIVCR 4001 E020h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
FCK[2:0]
--
ICK[2:0]
--
--
--
--
--
--
--
--
0
1
0
0
0
1
0
0
0
0
0
0
0
1
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
PCKA[2:0]
--
PCKB[2:0]
--
PCKC[2:0]
--
PCKD[2:0]
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
b2-b0
PCKD[2:0]
D PCLKD 3
b3 b6-b4
-- PCKC[2:0]
C PCLKC 3
b7 b10-b8
-- PCKB[2:0]
B PCLKB 2
b11 b14-b12
-- PCKA[2:0]
A PCLKA 2
b15
--
b18-b16
--
b23-b19
--
R/W
b2
b0
0 0 01
0 0 12
0 1 04
0 1 18
1 0 016
1 0 132
1 1 064
R/W
0 0 R/W
b6
b4
0 0 01
0 0 12
0 1 04
0 1 18
1 0 016
1 0 132
1 1 064
R/W
0 0 R/W
b10 b8
0 0 01 0 0 12 0 1 04 0 1 18 1 0 016 1 0 132 1 1 064
R/W
0 0 R/W
b14 b12
0 0 01 0 0 12 0 1 04 0 1 18 1 0 016 1 0 132 1 1 064
R/W
0 0 R/W
PCKB[2:0]
R/W
0 0 R/W
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 135 of 1551
RA4W1
9.
R/W
b26-b24
ICK[2:0]
ICLK
1 2 3 4
b26 b24
0 0 01 0 0 12 0 1 04 0 1 18 1 0 016 1 0 132 1 1 064
R/W
b27
--
0 0 R/W
b30-b28
FCK[2:0]
FCLK
1
b30 b28
0 0 01 0 0 12 0 1 04 0 1 18 1 0 016 1 0 132 1 1 064
R/W
b31
--
0 0 R/W
1. 2. 3. 4.
ICLKFCLK ICLK:FCLK = N:1N ICLK FCLK ICLKPCLKAPCLKB ICLK:PCLKA = N:1ICLK:PCLKB = N:1N ICLK PCLKA ICLK PCLKB ICLKPCLKCPCLKD ICLK:PCLKC = N:1 1:NICLK:PCLKD = N:1 1:NN SCKSCR.CKSEL[2:0] 32MHz MEMWAIT.MEMWAIT = 0 ICLK 1
SCKDIVCR ICLKPCLKAPCLKB PCLKCPCLKDFCLK PCKD[2:0] DPCLKD
DPCLKD PCKC[2:0] CPCLKC
CPCLKC PCKB[2:0] BPCLKB
BPCLKB PCKA[2:0] APCLKA
APCLKA ICK[2:0] ICLK
CPUDMAC DTC FCK[2:0] FCLK
FCLK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 136 of 1551
RA4W1
9.
9.2.2
SCKSCR
SYSTEM.SCKSCR 4001 E026h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
CKSEL[2:0]
0
0
1
b2-b0
CKSEL[2:0]
1
b7-b3
--
R/W
b2
b0
0 0 0HOCO
R/W
0 0 1MOCO
0 1 0LOCO
0 1 1MOSC
1 0 0SOSC
1 0 1PLL
0 0
R/W
1.
SCKDIVCR.ICK[2:0] 1 MEMWAIT.MEMWAIT = 0 32MHz 32MHz
SCKSCR CKSEL[2:0]
CKSEL[2:0] ICLK PCLKAPCLKBPCLKC PCLKD FCLK 1 LOCO MOCO HOCO MOSC SOSC PLL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 137 of 1551
RA4W1
9.2.3
PLL 2PLLCCR2
SYSTEM.PLLCCR2 4001 E02Bh
b7
b6
b5
b4
b3
b2
b1
b0
PLODIV[1:0]
--
PLLMUL[4:0]
0
0
0
0
0
1
1
1
9.
b4-b0
PLLMUL[4:0]
PLL 1
b5 b7-b6
-- PLODIV[1:0]
PLL 1
R/W
b4
b0
0 0 1 1 1 � 8
R/W
0 1 0 0 0 � 9
0 1 0 0 1 � 10 :
1 1 1 0 1 � 30
1 1 1 1 0 � 31
00
R/W
b7 b6
0 0 0 12 1 04
R/W
1. PLLMUL[4:0] PLODIV[1:0] PLL 9.1
PLLCCR2 PLL PLLCR.PLLSTP 0PLL PLLCCR2
PLLMUL[4:0] PLL PLL
PLODIV[1:0] PLL PLL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 138 of 1551
RA4W1
9.2.4
PLL PLLCR
SYSTEM.PLLCR 4001 E02Ah
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
PLLST P
0
0
0
0
0
0
0
1
9.
b0
PLLSTP
b7-b1
--
PLL
0PLL 1 1PLL
0 0
R/W R/W
R/W
1.
PLL VCC 2.4V VCC 2.4VHigh-speed Middle-speed
PLLCR PLL
PLLSTP PLL PLL PLLSTP 0 OSCSF.PLLSF 1 PLL
PLL PLL
PLL PLL OSCSF.PLLSF 0
PLL PLL OSCSF.PLLSF 1
PLL PLL MCU OSCSF.PLLSF 1 WFI
PLL OSCSF.PLLSF 0 WFI
PLLSTP 1 SCKSCR.CKSEL[2:0] = 101b = PLL
PLLSTP 0 OSCSF.MOSCSF 1
PLLSTP = 1PLL 4s
PLLMUL[4:0] PLL 1s
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 139 of 1551
RA4W1
9.
9.2.5
MEMWAIT
SYSTEM.MEMWAIT 4001 E031h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
MEMW AIT
0
0
0
0
0
0
0
0
R/W
b0
MEMWAIT
0
R/W
1
b7-b1
--
0 0
R/W
.
SCKDIVCR.ICK 1 SCKSCR.CKSEL[2:0] 32MHz
ICLK 32MHzMEMWAIT 0
Flash
MEMWAIT
Flash Flash 0 MEMWAIT = 0
MEMWAIT ICLK ICLK MEMWAIT
ICLK 32MHz ICLK 32MHzICLK 32MHz ICLK 32MHz High-speed OPCCR.OPCM[1:0] = 00bMEMWAIT 1 High-speed MEMWAIT 1 MEMWAIT = 0 ICLK 32MHz
ICLK 32MHz ICLK 32MHz 32MHz ICLK 32MHz MEMWAIT = 1 ICLK 32MHz ICLK 32MHz MEMWAIT 0 High-speed MEMWAIT 1 ICLK 32MHz High-speed OPCCR.OPCM[1:0] = 00b MEMWAIT 0
9.4
MEMWAIT
MCU High-speed
MEMWAIT 0 1
High-speed �
ICLK 32MHz
ICLK 32MHz �
�
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 140 of 1551
RA4W1 9.2 ICLK 32MHz
9.
ICLK32MHz, MEMWAIT = 0, FCACHEEN = 0
No
= High-speed
Yes
MEMWAIT1
ICLK32MHz
FCACHEIV1
High-speed
FCACHEIV = 0 ?
No
Yes
FCACHEEN1
9.2
ICLK 32MHz
9.3 ICLK 32MHz ICLK 32MHz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 141 of 1551
RA4W1
9.
ICLK32MHz, MEMWAIT = 1, FCACHEEN = 1, High-speed
FCACHEEN0
ICLK32MHz
MEMWAIT0
9.3
No
High-speed
Yes
ICLK 32MHz ICLK 32MHz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 142 of 1551
RA4W1
9.2.6
MOSCCR
SYSTEM.MOSCCR 4001 E032h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- MOSTP
0
0
0
0
0
0
0
1
9.
R/W
b0
MOSTP
0 1
1
R/W
b7-b1
--
0 0
R/W
1. MOSTP 0 MOMCR
MOSCCR
MOSTP
MOSTP MOSTP
MOSTP 0 MOMCRMOSCWTCR MOSCCR.MOSTP OSCSF.MOSCSF 1
OSCSF.MOSCSF 0
OSCSF.MOSCSF 1
MCU OSCSF.MOSCSF 1 WFI
OSCSF.MOSCSF 0 WFI
MOSTP 1 SCKSCR.CKSEL[2:0] = 011b = MOSC
SCKSCR.CKSEL[2:0] = 101b = PLL
PLLCR.PLLSTP = 0PLL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 143 of 1551
RA4W1
9.2.7
SOSCCR
SYSTEM.SOSCCR 4001 E480h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- SOSTP
0
0
0
0
0
0
0
1
9.
b0
SOSTP
b7-b1
--
0 1 2 1
0 0
R/W R/W
R/W
1. 2.
SOSTP 0 SOMCR VBATT SOSC VBTCR1.BPWSWSTP VBTCR1.BPWSWSTP 12.
SOSCCR
SOSTP
SOSTP RTC SOSTP
SOSTP 0 SOMCRSOSTP 0 tSUBOSCOWTSOSTP SOSTP
SOSC 5
WFI
SOSC 3 WFI
SOSTP 1
SCKSCR.CKSEL[2:0] = 100b = SOSC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 144 of 1551
RA4W1
9.
9.2.8
LOCOCR
SYSTEM.LOCOCR 4001 E490h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- LCSTP
0
0
0
0
0
0
0
0
b0
LCSTP
LOCO
b7-b1
--
0LOCO 1 1LOCO
0 0
R/W R/W
R/W
1.
VBATT LOCO VBTCR1.BPWSWSTP VBTCR1.BPWSWSTP 12.
LOCOCR LOCO
LCSTP LOCO LOCO LCSTP LOCO LOCO tLOCOWT
LOCO LOCO LOCO
LOCO LOCO 5
LOCO LOCO
LOCO MCU LOCO WFI
LOCO LOCO 3 WFI
LOSTP 1 SCKSCR.CKSEL[2:0] = 010b = LOCO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 145 of 1551
RA4W1
9.
9.2.9
HOCOCR
SYSTEM.HOCOCR 4001 E036h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- HCSTP
0
0
0
0
0
0
0
0/1
1
b0
HCSTP
HOCO
b7-b1
--
0HOCO 23 1HOCO
0 0
R/W R/W
R/W
. . 1. 2. 3.
HOCOCR.HCSTP = 0 OSCSF.HOCOSF = 0HOCO OPCCR.OPCM[1:0] OPCCR.OPCMTSF = 1SOPCCR.SOPCMTSF = 1 FLSTOP.CFLSTOPF = 1 HCSTP OFS1.HOCOEN 0 HCSTP 0 OFS1.HOCOEN 1 HCSTP 1 HOCO 48MHz HOCO VCC 1.8V VCC 1.8V HOCO 64MHz HOCO VCC 2.4V VCC 2.4V HOCO HCSTP = 0OFS1.HOCOFRQ1 Low-voltage HOCOCR.HCSTP 0
HOCOCR HOCO
HCSTP HOCO
HOCO HOCO HOCOWTCR
HCSTP HOCO OSCSF.HOCOSF 1 OFS1.HOCOEN 0 OSCSF.HOCOSF 1 HOCO HOCO
HOCO OSCSF.HOCOSF 0
HOCO HOCO OSCSF.HOCOSF 1
HOCO HCSTP HOCO OSCSF.HOCOSF 1 WFI
HOCO OSCSF.HOCOSF 0 WFI
HCSTP 1
SCKSCR.CKSEL[2:0] = 000b = HOCO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 146 of 1551
RA4W1
9.
9.2.10 MOCOCR
SYSTEM.MOCOCR 4001 E038h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- MCSTP
0
0
0
0
0
0
0
0
b0
MCSTP
MOCO
b7-b1
--
R/W
0MOCO
R/W
1MOCO
0 0
R/W
MOCOCR MOCO
MCSTP MOCO
MOCO
MCSTP 0 MOCO tMOCOWTMOCO MCSTP 0 MCSTP 1
MOCO MOCO 5
MOCO MOCO
MOCO MOCO WFI
MOCO MOCO 3 WFI
MCSTP 1 SCKSCR.CKSEL[2:0] = 001b = MOCO
OSTDCR.OSTDE MCSTP 1MOCO
MOCO MOCOCR.MCSTP MOCO MCSTP MOCO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 147 of 1551
RA4W1
9.2.11 OSCSF
SYSTEM.OSCSF 4001 E03Ch
b7 -- 0
b6
b5
b4
b3
b2
--
PLLSF
--
MOSC SF
--
0
0
0
0
0
b1
b0
--
HOCO SF
0
0/1
1
9.
R/W
b0
HOCOSF HOCO 0HOCO
R
1HOCO
b2-b1 --
0
R
b3
MOSCSF 0MOSTP = 1
R
2
1
b4
--
0
R
b5
PLLSF
PLL
0PLL
R
1PLL
b7-b6 --
0
R
1. 2.
OFS1.HOCOEN OFS1.HOCOEN 1 HOCOSF 0 OFS1.HOCOEN 0 HOCOSF 0 HOCO HOCOSF 1
1
OSCSF
HOCOSF HOCO HOCO OFS1.HOCOEN 0 OSCSF.HOCOSF 1
HOCO 1 HOCO HOCOCR.HCSTP 0 HOCOWTCR.HSTS[2:0]
MCU
0 HOCOCR.HCSTP 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 148 of 1551
RA4W1
9.
MOSCSF
1 MOSCCR.MOSTP 0 MOSCWTCR.MSTS[3:0]
MCU
0 MOSCCR.MOSTP 1
PLLSF PLL PLL 1 PLL PLLCR.PLLSTP 0 370 MCU PLL PLLSTP 0 PLL PLL
0 PLL PLLCR.PLLSTP 1 PLL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 149 of 1551
RA4W1
9.2.12 OSTDCR
SYSTEM.OSTDCR 4001 E040h
b7
b6
b5
b4
b3
b2
b1
b0
OSTDE --
--
--
--
--
--
OSTDI E
0
0
0
0
0
0
0
0
9.
b0
OSTDIE
b6-b1 b7
-- OSTDE
R/W
0POEG
R/W
1POEG
0 0
R/W
0
R/W
1
OSTDCR
OSTDIE
POEG
OSTDSR.OSTDF OSTDIE 0 OSTDF 0 OSTDIE 1 PCLKB 2 I/O PCLKB 2
OSTDE
1MOCO MOCOCR.MCSTP 0 MOCO MOCO MOCOCR.MCSTP 1 MOCO
OSTDSR.OSTDF 1 OSTDE 0
OSTDE 0 OSTDE 0 WFI
Low-speed ICLKFCLKPCLKAPCLKBPCLKC PCLKD 1 2 4 8
Low-voltage ICLKFCLKPCLKAPCLKBPCLKC PCLKD 1 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 150 of 1551
RA4W1
9.2.13 OSTDSR
SYSTEM.OSTDSR 4001 E041h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- OSTDF
0
0
0
0
0
0
0
0
9.
b0
OSTDF
b7-b1
--
1. 0
0 1
00
R/W R(/W)
1
R/W
OSTDSR
OSTDF
1 OSTDF 0 OSTDF 1 0 0
OSTDF 0 0 ICLK 3 OSTDF 0 OSTDF 0 1
OSTDSR.OSTDF 0
SCKSCR.CKSEL[2:0] = 011b = MOSC
PLL OSTDF 0
1
OSTDCR.OSTDE 1
0
SCKSCR.CKSEL[2:0] 011b MOSC 101b PLL 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 151 of 1551
RA4W1
9.
9.2.14 MOSCWTCR
SYSTEM.MOSCWTCR 4001 E0A2h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
MSTS[3:0]
0
0
0
0
0
1
0
1
b3-b0
b7-b4
MSTS[3:0]
--
R/W
b3
b0
0 0 0 0 = 20.25s
R/W
0 0 0 1 = 1024 128s
0 0 1 0 = 2048 256s
0 0 1 1 = 4096 512s
0 1 0 0 = 8192 1024s
0 1 0 1 = 16384 2048s
0 1 1 0 = 32768 4096s
0 1 1 1 = 65536 8192s
1 0 0 0 = 131072 16384s
1 0 0 1 = 262144 32768s
"MOCO = 8MHz 0.125s"
00
R/W
MSTS[3:0]
0000b
MSTS[3:0] MOCO MOCO MOCOCR.MCSTP MCU OSCSF.MOSCSF 1
MOSCWTCR MOSCCR.MOSTP 1 OSCSF.MOSCSF 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 152 of 1551
RA4W1
9.
9.2.15 HOCOWTCR
SYSTEM.HOCOWTCR 4001 E0A5h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
HSTS[2:0]
1
0
1
b2-b0 HSTS[2:0]
b7-b3 --
HOCO
R/W
b2
b0
1 0 1
R/W
= 24529.13s
HOCO 24MHz 32MHz
= 28735.875s
HOCO 48MHz
= 67984.88s
1 1 0
= 54167.63s HOCO 64MHz
"MOCO = 8MHz 0.125s"
00
R/W
HOCOWTCR HOCOCR.HCSTP 1 OSCSF.HOCOSF 1 HOCOWTCR HOCOWTCR
HSTS[2:0] HOCO
MCU HOCOWTCR MCU MCU OSCSF.HOCOSF 1
MOCOCR.MCSTP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 153 of 1551
RA4W1
9.
9.2.16 MOMCR
SYSTEM.MOMCR 4001 E413h
b7
b6
b5
b4
b3
b2
b1
b0
-- MOSEL --
--
MODR V1
--
--
--
0
0
0
0
0
0
0
0
R/W
b2-b0 --
0 0
R/W
b3
MODRV1
1 010MHz 20MHz
R/W
11MHz 10MHz
b5-b4 --
0 0
R/W
b6
MOSEL
0
R/W
1
b7
--
0 0
R/W
.
EXTAL/XTAL
.
MOSTP 1MOSC
MODRV1 1
MOSEL
9.2.17 SOMCR
SYSTEM.SOMCR 4001 E481h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
--
SODRV[1:0]
0
0
0
R/W
b1-b0
SODRV[1:0]
b1 b0
R/W
0 0
0 11
1 02
1 13
b7-b2 --
00 R/W
SOSCCR.SOSTP 1SOSC
SODRV[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 154 of 1551
RA4W1
9.
9.2.18 LCD SLCDSCKCR
SYSTEM.SLCDSCKCR 4001 E050h
b7
b6
b5
b4
b3
LCDSC KEN
--
--
--
--
0
0
0
0
0
b2
b1
b0
LCDSCKSEL[2:0]
0
0
0
R/W
b2-b0
LCDSCKSEL[2:0] LCD
b2
b0
R/W
LCDSRCCLK
0 0 0LOCO
0 0 1SOSC
0 1 0MOSC
1 0 0HOCO
b6-b3
--
00
R/W
b7
LCDSCKEN
LCD 0LCD
R/W
1LCD
LCDSCKEN LCDSCKSEL[2:0]
LCDSCKSEL[2:0] LCD LCDSRCCLK
LOCOSOSCMOSC HOCO LCD LCD LCDSCKEN 0
1. LCDSCKEN 0LCD
2. LCD 3 ICLK 2 3. LCDSCKSEL[2:0]
4. LCDSCKSEL[2:0]
LCDSCKEN LCD
LCD LCD
1 LCDSCLKSEL[2:0] LCD
1.
2. LCDSCKSEL[2:0] 2
3. WFI
0 LCDSCKSEL[2:0]
1. 0LCD 2. LCDSCKSEL[2:0] 2
3. LCDSCKSEL[2:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 155 of 1551
RA4W1
9.2.19 CKOCR
SYSTEM.CKOCR 4001 E03Eh
b7
b6
b5
b4
b3
CKOEN
CKODIV[2:0]
--
0
0
0
0
0
b2
b1
b0
CKOSEL[2:0]
0
0
0
9.
R/W
b2-b0
CKOSEL[2:0]
b2
b0
R/W
0 0 0HOCO
0 0 1MOCO
0 1 0LOCO
0 1 1MOSC
1 0 0SOSC
b3
--
0 0
R/W
b6-b4
CKODIV[2:0]
b6
b4
0 0 01
R/W
0 0 12
0 1 04
0 1 18
1 0 016
1 0 132
1 1 064
1 1 1128
b7
CKOEN
0
R/W
1
CKOSEL[2:0] HOCOMOCOLOCOMOSC SOSC CLKOUT
CLKOUT CKOEN 0
CKODIV[2:0]
CKOEN 0 CLKOUT CLKOUT 48.
CKOEN
CLKOUT
1 0 Low CKOSEL[3:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 156 of 1551
RA4W1
9.
9.2.20 LOCO LOCOUTCR
SYSTEM.LOCOUTCR 4001 E492h
b7
b6
b5
b4
b3
b2
b1
b0
LOCOUTRM[7:0]
0
0
0
0
0
0
0
0
R/W
b7-b0
LOCOUTRM[7:0] LOCO
b7
b0
R/W
1 0 0 0 0 0 0 0-128
1 0 0 0 0 0 0 1-127
1 0 0 0 0 0 1 0-126 :
1 1 1 1 1 1 1 1-1
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1+1 :
0 1 1 1 1 1 0 1+125
0 1 1 1 1 1 1 0+126
0 1 1 1 1 1 1 1+127
LOCO
LOCO LOCOUTCR MCU
LOCOUTCR MCU LOCO LOCOUTCR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 157 of 1551
RA4W1
9.
9.2.21 MOCO MOCOUTCR
SYSTEM.MOCOUTCR 4001 E061h
b7
b6
b5
b4
b3
b2
b1
b0
MOCOUTRM[7:0]
0
0
0
0
0
0
0
0
R/W
b7-b0
MOCOUTRM[7:0] MOCO
b7
b0
R/W
1 0 0 0 0 0 0 0-128
1 0 0 0 0 0 0 1-127
1 0 0 0 0 0 1 0-126 :
1 1 1 1 1 1 1 1-1
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1+1 :
0 1 1 1 1 1 0 1+125
0 1 1 1 1 1 1 0+126
0 1 1 1 1 1 1 1+127
MOCO
MOCO MOCOUTCR MCU MOCOUTCR MCU MOCO MOCOUTCR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 158 of 1551
RA4W1
9.
9.2.22 HOCO HOCOUTCR
SYSTEM.HOCOUTCR 4001 E062h
b7
b6
b5
b4
b3
b2
b1
b0
HOCOUTRM[7:0]
0
0
0
0
0
0
0
0
R/W
b7-b0
HOCOUTRM[7:0] HOCO
b7
b0
R/W
1 0 0 0 0 0 0 0-128
1 0 0 0 0 0 0 1-127
1 0 0 0 0 0 1 0-126 :
1 1 1 1 1 1 1 1-1
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1+1 :
0 1 1 1 1 1 0 1+125
0 1 1 1 1 1 1 0+126
0 1 1 1 1 1 1 1+127
HOCO
HOCO HOCOUTCR MCU HOCOUTCR MCU USBCKCR.USBCLKSEL 1 00h HOCOUTCR
9.2.23 TRCKCR
SYSTEM.TRCKCR 4001 E03Fh
b7
b6
b5
b4
b3
b2
b1
b0
TRCKE N
--
--
--
TRCK[3:0]
0
0
0
0
0
0
0
1
b3-b0
TRCK[3:0]
b6-b4 b7
-- TRCKEN
R/W
b3
b0
0 0 0 0 1
0 0 0 1 2
0 0 1 0 4
R/W
0 0 R/W
0
R/W
1
.
VBATT_POR
TRCLK TRCKEN 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 159 of 1551
RA4W1
9.2.24 USB USBCKCR
SYSTEM.USBCKCR 4001 E0D0h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
USBCL KSEL
0
0
0
0
0
0
0
0
9.
b0
USBCLKSEL
b7-b1
--
USB
R/W
0PLL
R/W
1HOCO
00
R/W
USBCLKSEL USB
USBCLKSEL USB UCLK
USBCKCR SYSCFG.SCKE 0
USBCKCR.USBCLKSEL USBFS 1 USBCKSR.USBCLKSEL 0
USBCKCR.USBCLKSEL 1 HOCO HOCOUTCR.HOCOUTRM[7:0] 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 160 of 1551
RA4W1
9.
9.3
9.3.1
9.4
Rd Rf EXTAL XTAL Rf
9.1
CL1 EXTAL
Rf XTAL
Rd
CL2
9.4
9.3.2
9.5 MOMCR.MOSEL 1 XTAL
EXTAL XTAL
Hi-Z
9.5
9.3.3
MOSCCR.MOSTP 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 161 of 1551
RA4W1
9.
9.4
9.4.1
32.768kHz
9.6 32.768kHz
Rd Rf XCIN XCOUT Rf 9.1
C1 XCIN
Rf XCOUT
Rd C2
9.6
32.768kHz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 162 of 1551
RA4W1
9.
9.5 Bluetooth
Bluetooth 32MHz
9.5.1
9.7
Rd Rf XTAL1_RFXTAL2_RF Rf
Bluetooth CL1CL2 Bluetooth Bluetooth R01AN4887
Bluetooth
XTAL1_RF CL1
XTAL2_RF CL2
Rf Rd
9.7
32MHz
9.5.2
Bluetooth
Bluetooth Bluetooth BLE RF Bluetooth CLKOUT_RF RF Bluetooth Bluetooth Bluetooth
CLKOUT_RF EXTAL Bluetooth 9.8 Bluetooth
9.8
XTAL1_RF 32MHz
XTAL2_RF
Bluetooth
Bluetooth
1/8 1/16 1/32
EXTAL P414/CLKOUT_RF
Bluetooth
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 163 of 1551
RA4W1
9.
9.6
9.6.1
SCKSCR.CKSEL[2:0] = 011b = MOSC MOCO
SCKSCR.CKSEL[2:0] = 101b = PLLPLL
SCKSCR.CKSEL[2:0]
PWM GPT
0 1 48.
MOCO PLL PLL OSTDSR.OSTDF
OSTDF
SCKSCR.CKSEL[2:0] = 011b = MOSC OSTDF 0 1 MOCO OSTDF 1 0 MOSC
SCKSCR.CKSEL[2:0] = 101b = PLL OSTDF 0 1 PLL OSTDF 1 0 PLL
PLL CKSEL[2:0] PLL OSTDF 0 OSTDF 1 CKSEL[2:0] PLL
OSTDCR.OSTDE 1
MOCO MOSC
CLKOUT MOSC PLL
MOCO MOSC PLL PLL ICLKMOCO SCKDIVCR.ICK[2:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 164 of 1551
RA4W1
9.
CKSEL[2:0] = 011b
MOSCPLL
SCKSCR.CKSEL[2:0] = 001b MOCO
OSTDCR.OSTDIE = 0
OSTDSR.OSTDF = 1
OSTDSR.OSTDF = 0
Yes
OSTDSR.OSTDF = 0
No
Yes
?
SCKSCR.CKSEL[2:0] = 011b
No
.
9.9
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 165 of 1551
RA4W1
9.
9.6.2
OSTDSR.OSTDF 1 OSTDCR.OSTDIE 1MOSC_STOP GPT POEG POEG POEG Group n POEGGrn.OSTPF 1 n = A, B
POEGGn.OSTPF PCLKB 10 OSTDSR.OSTDF OSTDCR.OSTDIE 0 OSTDCR.OSTDIE 1 PCLKB 2 I/O PCLKB
14.ICU
9.7 PLL
PLL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 166 of 1551
RA4W1
9.
9.8
HOCO MOCO LOCO PLL IWDT JTAG
CPUDMACDTC SRAM -- ICLK -- PCLKAPCLKBPCLKC PCLKD -- FCLK USBFS -- UCLK CAN -- CANMCLK CAC -- CACCLK RTC LOCO -- RTCLCLK RTC -- RTCSCLK IWDT -- IWDTCLK AGT LOCO -- AGTLCLK AGT -- AGTSCLK SysTick -- SYSTICCLK SLCDC -- LCDSRCCLK -- CLKOUT JTAG -- JTAGTCK BLE -- Bluetooth (BLECLK) Bluetooth
BLELOCO 9.8.1ICLK 9.8.13JTAG JTAGTCK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 167 of 1551
RA4W1
9.
9.8.1
ICLK
ICLKCPUDMACDTC SRAM
ICLK SCKDIVCR.ICK[2:0] SCKSCR.CKSEL[2:0] PLLCCR2.PLLMUL[4:0] PLLCCR2. PLODIV[1:0] OFS1.HOCOFRQ1[2:0]
ICLK ICLK 9.10 9.11
HOCO MOCO LOCO
PLL
SCKSCR.CKSEL[2:0]
1/1 1/2 1/4 1/8 1/16 1/32 1/64
SCKDIVCR.ICK[2:0] (ICLK)
SCKDIVCR.PCKx[2:0] (PCLKx)
9.10
SCKCR.CKSEL[2:0]
A
B
ta
ICLK
(SCKDIVCR.ICK[2:0] = 000b)
A
B
PCLKB
(SCKDIVCR.PCKB[2:0] = 001b)
9.11
R01UH0883JJ0100 Rev.1.00 2020.08.31
tb
ta ICLK2A3 tb B3.5 A B
Page 168 of 1551
RA4W1
9.
9.8.2
PCLKAPCLKBPCLKCPCLKD
PCLKAPCLKBPCLKC PCLKD
SCKDIVCR.PCKA[2:0] SCKDIVCR.PCKB[2:0] SCKDIVCR.PCKC[2:0] SCKDIVCR.PCKD[2:0]
SCKSCR.CKSEL[2:0]
PLLCCR2.PLLMUL[4:0] PLLCCR2.PLODIV[1:0]
OFS1.HOCOFRQ1[2:0]
9.10 9.11
9.8.3
FCLK
FCLK FCLK
FCLK
SCKDIVCR.FCK[2:0]
SCKSCR.CKSEL[2:0]
PLLCCR2.PLLMUL[4:0] PLLCCR2.PLODIV[1:0]
OFS1.HOCOFRQ1[2:0]
9.8.4
USB UCLK
USB UCLKUSBFS USBFS 48MHz USBFS UCLK 48MHz
UCLK
SCKSCR.CKSEL[2:0]
PLLCCR2.PLLMUL[4:0] PLLCCR2.PLODIV[1:0]
OFS1.HOCOFRQ1[2:0]
9.8.5
CAN CANMCLK
CAN CANMCLKCAN CANMCLK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 169 of 1551
RA4W1
9.8.6
CAC CACCLK
CAC CACCLKCAC CACCLK
IWDT
9.
9.8.7
RTC RTCSCLKRTCLCLK
RTC RTCSCLK RTCLCLKRTC RTCSCLK RTCLCLK LOCO
9.8.8
IWDT IWDTCLK
IWDT IWDTCLKIWDT IWDTCLK IWDT
9.8.9
AGT AGTSCLKAGTLCLK
AGT AGTSCLK AGTLCLKAGT AGTSCLK AGTLCLK LOCO
9.8.10 SysTick SYSTICCLK
SysTick SYSTICCLKSYSTICCLK SYSTICCLK LOCO
9.8.11 LCDC LCDSRCCLK
LCDC LCDSRCCLKSLCDC LCDSRCCLK SLCDSCKCR.LCDSCKSEL[2:0] SLCDSCKCR.LCDSCKEN 1 LCDSRCCLK SLCDSCKCR.LCDSCKSEL[2:0] SLCDSCKCR.LCDSCKEN 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 170 of 1551
RA4W1
9.
9.8.12 CLKOUT
CLKOUT CLKOUT CKOCR.CKOEN 1 CLKOUT CLKOUT CKOCR.CKODIV[2:0] CKOCR.CKOSEL[2:0] CKOCR.CKOEN 0 CLKOUT CKOCR.CKODIV[2:0] CKOCR.CKOSEL[2:0]
PLLCCR2.PLLMUL[4:0] PLLCCR2.PLODIV[1:0]
OFS1.HOCOFRQ1[2:0]
9.8.13 JTAG JTAGTCK
JTAG JTAGTCKJTAG JTAGTCK JTAG TCK
9.8.14 BLE
Bluetooth BLECLK Bluetooth BLKLOCO BLE Bluetooth
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 171 of 1551
RA4W1
9.
9.9
9.9.1
ICLKPCLKA PCLKD FCLKSCKDIVCR
AC tcyc 48.
9.2
PCLKA PCLKB SCI
ICLKPCLKA PCLKD FCLK 9.2
9.9.2
9.6
9.9.3
XTAL/EXTAL 9.12
CL2
A
B
MCU
XTAL
EXTAL CL1
9.12
Bluetooth
9.9.4
EXTAL XTAL P212 P213 MOSCCR.MOSTP 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 172 of 1551
RA4W1
10. CAC
10. CAC
10.1
CAC
10.1 CAC 10.1 10.2
10.1
CAC
HOCO MOCO LOCO IWDTCLK BPCLKB
CACREF HOCO MOCO LOCO IWDTCLK BPCLKB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 173 of 1551
RA4W1
10. CAC
CACREF
CACREFE
RSCS[2:0]
DFS[1:0]
DFS[1:0]
RCDS[1:0] 1/32 1/128 1/1024 1/8192
EDGES[1:0]
RPS
HOCO MOCO LOCO IWDTCLK B
(PCLKB)
FMCS[2:0]
TCSS[1:0]
CFME
1/4
1/8
16
1/32
CACNTBR
CFMECACR0 CACREFE, FMCS[2:0], TCSS[1:0], EDGES[1:0]CACR1 RPS, RSCS[2:0], RCDS[1:0], DFS[1:0]CACR2 CAICRCAC CASTRCAC CAULVR CAC CALLVRCAC CACNTBRCAC
CAULVR CALLVR
CAICR CASTR
10.1
CAC
10.2
CAC
CACREF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 174 of 1551
RA4W1
10.2 10.2.1 CAC 0CACR0
CAC.CACR0 4004 4600h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- CFME
0
0
0
0
0
0
0
0
10. CAC
b0
CFME
b7-b1
--
R/W
0
R/W
1
00 R/W
CFME
CFME
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 175 of 1551
RA4W1
10.2.2 CAC 1CACR1
CAC.CACR1 4004 4601h
b7
b6
EDGES[1:0]
0
0
b5
b4
TCSS[1:0]
0
0
b3
b2
b1
FMCS[2:0]
0
0
0
b0 CACRE
FE 0
10. CAC
b0
CACREFE
CACREF
b3-b1
FMCS[2:0]
b5-b4
TCSS[1:0]
b7-b6
EDGES[1:0]
0 1
b3
b1
0 0 0
0 0 1
0 1 0HOCO
0 1 1MOCO
1 0 0LOCO
1 0 1PCLKB
1 1 0IWDTCLK
1 1 1
b5 b4
0 0 0 14 1 08 1 132
b7 b6
0 0 0 1 1 0 1 1
R/W R/W R/W
R/W R/W
.
CACR1 CACR0.CFME 0
CACREFE CACREF CACREF
FMCS[2:0]
TCSS[1:0]
EDGES[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 176 of 1551
RA4W1
10.2.3 CAC 2CACR2
CAC.CACR2 4004 4602h
b7
b6
DFS[1:0]
0
0
b5
b4
RCDS[1:0]
0
0
b3
b2
b1
RSCS[2:0]
0
0
0
b0 RPS
0
10. CAC
b0
RPS
b3-b1
RSCS[2:0]
b5-b4
RCDS[1:0]
b7-b6
DFS[1:0]
0CACREF 1
b3
b1
0 0 0
0 0 1
0 1 0HOCO
0 1 1MOCO
1 0 0LOCO
1 0 1PCLKB
1 1 0IWDTCLK
1 1 1
b5 b4
0 032 0 1128 1 01024 1 18192
b7 b6
0 0 0 1
1 0
4 1 1
16
R/W R/W R/W
R/W R/W
.
CACR2 CACR0.CFME 0
RPS CACREF
RSCS[2:0]
RCDS[1:0]
RPS = 1RPS = 0CACREF
DFS[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 177 of 1551
RA4W1
10. CAC
10.2.4 CAC CAICR
CAC.CAICR 4004 4603h
b7
b6
b5
b4
b3
b2
b1
b0
--
OVFFC MENDF FERRF
L
CL
CL
--
OVFIE
MENDI E
FERRI E
0
0
0
0
0
0
0
0
b0
FERRIE
b1
MENDIE
b2
OVFIE
b3
--
b4
FERRFCL
b5
MENDFCL
b6
OVFFCL
b7
--
R/W
0
R/W
1
0
R/W
1
0
R/W
1
0 0
R/W
FERRF
1 FERRF R/W 0
MENDF
1 MENDF R/W 0
OVFF
1 OVFF R/W 0
0 0
R/W
FERRIE
MENDIE
OVFIE
FERRFCL FERRF
1 FERRF
MENDFCL MENDF 1 MENDF
OVFFCL OVFF 1 OVFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 178 of 1551
RA4W1
10.2.5 CAC CASTR
CAC.CASTR 4004 4604h
b7
b6
b5
b4
--
--
--
--
0
0
0
0
b3
b2
b1
b0
-- OVFF MENDF FERRF
0
0
0
0
10. CAC
b0
FERRF
b1
MENDF
b2
OVFF
b7-b3
--
R/W
0
R
1
0
R
1
0
R
1
0
R
FERRF 1 CAULVR CALLVR
0 FERRFCL 1
MENDF
1 0 MENDFCL 1
OVFF
1 0 OVFFCL 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 179 of 1551
RA4W1
10. CAC
10.2.6 CAC CAULVR
CAC.CAULVR 4004 4606h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAULVR 16 CACR0.CFME 0
CACREF CACNTBR
10.2.7 CAC CALLVR
CAC.CALLVR 4004 4608h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CALLVR 16
CACR0.CFME 0
CACREF CACNTBR
10.2.8 CAC CACNTBR
CAC.CACNTBR 4004 460Ah
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CACNTBR 16
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 180 of 1551
RA4W1
10. CAC
10.3
10.3.1
CAC CACREF 10.2 CAC
CACREF
1 0
CACR0.CFME 1 0
FFFFh
CAULVR
CFME 1
CFME1 1
CFME 0
CFME 0
CALLVR
0000h CACNTBR
0000h
CASTR.FERRF 1 0
CASTR.MENDF 1 0
(1)
(2)
CACREF CACR1CACREFE = 1, EDGES[1:0] = 00b CAULVR = AAAAh, CALLVR = 5555h
CACR1CACREFE = 0, EDGES[1:0] = 00b CAULVR = AAAAh, CALLVR = 5555h
7FFFh
BFFFh CAICR.FERRFCL 1
3FFFh
CAICR.FERRFCL 1
CAICR.MENDFCL 1
CAICR.MENDFCL 1
CAICR.MENDFCL 1
(3)
(4)
(5)
(6)
10.2
CAC
1. CACR0.CFME 1 CACR1 CACR2 CACR0.CFME 1
2. CACR1.EDGES[1:0] 10.2 CACR1.EDGES[1:0] = 00b
3. CACNTBR CAULVR CALLVR CACNTBR CAULVR CACNTBR CALLVR CASTR.MENDF 1 CAICR.MENDIE 1
4. CACNTBR CAULVR CALLVR CACNTBR CAULVR CASTR.FERRF 1 CAICR.FERRIE 1 CASTR MENDF 1 CAICR.MENDIE 1
5. CACNTBR CAULVR CALLVR CACNTBR CALLVR CASTR.FERRF 1 CAICR.FERRIE 1 CASTR MENDF 1 CAICR.MENDIE 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 181 of 1551
RA4W1
10. CAC
6. CACR0.CFME 1 CACNTBR CAULVR CALLVR CACR0.CFME 0
10.3.2 CACREF
CACREF CACREF 3 3
CACREF CACNTBR 1
= 1 / 1
10.4
CAC 3
1 10.3 CAC
10.3
CAC
CAICR.FERRIE
CAICR.MENDIE
CAICR.OVFIE
CASTR.FERRF CASTR.MENDF
CASTR.OVFF
CACNTBR CAULVRCALLVR CACNTBR CAULVR CACNTBR CALLVR
CACREF
CACR0.CFME 1 1
10.5
10.5.1
CMSTPCRCCAC CAC 11.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 182 of 1551
RA4W1
11.
11.
11.1
MCU
11.1 11.2 CPU MCU DMACDTC SRAM
11.1
ICLKPCLKAPCLKBPCLKCPCLKD FCLK 1
5 High-speed Middle-speed Low-speed Low-voltage Subosc-speed
1. 9.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 183 of 1551
RA4W1
11.
11.2
SBYCR.SSBY = 0 WFI
IWDT PLL
4
CPU SRAMECC SRAM
DMA DMAC
DTC USB2.0 USBFS WDT IWDT
4 4
RTC
AGTn: n = 0, 1
14 A/D ADC14 12 D/ADAC12 CTSU LCD SLCDC
DOC
SCI0
SCIn: n = 1, 4, 9
I2C IIC0
I2C IIC1
ELC ACMPLP0 ACMPLP1 OPAMP
NMIIRQnn = 0 4, 6, 7, 9, 11, 14, 15
KINT
LVD
I/O
SBYCR.SSBY = 1 WFI
1
SNZCR.SNZE = 1
11.3
11.3
2
4
4 2
3
5
5
4
4
6
6
7
11 10
9 9
8 9 9
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 184 of 1551
RA4W1
11.
.
1.
2. 3. 4.
5. 6.
7. 8. 9. 10. 11.
0 PCLK
1 SCI0 MOSCCR.MOSTP PLLCR.PLLSTP 1 CKOCR.CKOSEL[2:0] 010bLOCO 100bSOSC
IWDT IWDT IWDT 0 IWDT OFS0.IWDTSTPCTLWDT IWDT 0OFS0 IWDT WDTSTPCTL
USBFS AGT0.AGTMR1.TCK[2:0] 100bLOCO 110bSOSCAGT0 AGT1.AGTMR1.TCK[2:0] 100bLOCO110bSOSC 101AGT0 AGT1 SLCDSCKCR.LCDSCKSEL[2:0] 000bLOCO 001bSOSC SLCDSCKCR.LCDSCKSEL[2:0] 000b 001b 11.9.13 ELC VCOUT ACMPLP VCOUT 38.ACMPLP SCI0 14 A/D ADCMPCR.CMPAE ADCMPCR.CMPBE 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 185 of 1551
RA4W1
11.
11.3
NMI VBATT LVD IWDT USBFS RTC
KINT AGT1
ACMPLP IIC0 ADC140
SCI0
DTC DOC CTSU
VBATT_LVD PORT_IRQnn = 0 15 LVD_LVD1 IWDT_NMIUNDF USBFS_USBR RTC_ALM RTC_PRD KEY_INTKR AGT1_AGTI AGT1_AGTCMAI AGT1_AGTCMBI ACMP_LP0 IIC0_WUI ADC140_WCMPM ADC140_WCMPUM SCI0_AM SCI0_RXI_OR_ERI DTC_COMPLETE DOC_DOPCI CTSU_CTSUFN
3
SELSR0 13 SELSR0 13 SELSR0 12 SELSR0 12 SELSR0 13 SELSR0 1 SELSR0 1
1.
2. 3.
SELSR0 14.ICUSELSR0 WFI
SCI0_AM SCI0_RXI_OR_ERI SNZEDCR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 186 of 1551
RA4W1
11.
RES = High2
WFI1
3
11.3 WFI1
11.3
SBYCR.SSBY = 0
SNZCR.SNZE = 1
11.6
SBYCR.SSBY = 1
11.8
1.
WFI MCU
2.
MOCO
3.
11.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 187 of 1551
RA4W1
11.
11.2 11.2.1 SBYCR
SYSTEM.SBYCR 4001 E00Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SSBY OPE --
--
--
--
--
--
--
--
--
--
--
--
--
--
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b13-b0 --
0 0
R/W
b14
OPE
0 R/W
1
b15
SSBY
0
R/W
1
OPE
CS0 CS3 RDWR0 WR1WRBC0BC1 ALE
SSBY
WFI
SSBY 1 WFI SSBY 1 SSBY 0
OSTDCR.OSTDE 1 SSBY SSBY 1 WFI
FENTRYR.FENTRY0 1 FENTRYR.FENTRYD 1 SSBY SSBY 1 WFI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 188 of 1551
RA4W1
11.
11.2.2 AMSTPCRA
SYSTEM.MSTPCRA 4001 E01Ch
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
MSTPA 22
--
--
--
--
--
--
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
MSTPA 6
--
--
--
--
--
MSTPA 0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
0
R/W
b0
MSTPA0
SRAM01 SRAM0
R/W
0
1
b5-b1 --
11 R/W
b6
MSTPA6
ECCSRAM ECCSRAM
R/W
1
0
1
b21-b7 --
11 R/W
b22
MSTPA22
DMA DMAC/DTC
R/W
0
2
1
b31-b23 --
11 R/W
1. 2.
MSTPA0 MSTPA6 MSTPA22 0 1 DMAC DTC MSTPA22
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 189 of 1551
RA4W1
11.
11.2.3 BMSTPCRB
MSTP.MSTPCRB 4004 7000h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
MSTPB MSTPB
31
30
--
MSTPB MSTPB
28
27
--
--
--
--
MSTPB 22
--
--
MSTPB MSTPB
19
18
--
--
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
MSTPB 11
--
MSTPB MSTPB
9
8
--
--
--
--
--
MSTPB 2
--
--
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W
b1-b0
--
11 R/W
b2
MSTPB2
CAN0
R/W
1
0
1
b7-b3
--
11 R/W
b8
MSTPB8
I2C 1 IIC1
R/W
0
1
b9
MSTPB9
I2C 0 IIC0
R/W
0
1
b10
--
11 R/W
b11
MSTPB11
2.0 USBFS
R/W
0
2
1
b17-b12 --
11 R/W
b18
MSTPB18
SPI1
R/W
1
0
1
b19
MSTPB19
SPI0
R/W
0
0
1
b21-b20 --
11 R/W
b22
MSTPB22
SCI9
R/W
9 0
1
b26-b23 --
11 R/W
b27
MSTPB27
SCI4
R/W
4 0
1
b28
MSTPB28
BLE BLESCI
R/W
0
3
1
b29
--
11 R/W
b30
MSTPB30
SCI1
R/W
1 0
1
b31
MSTPB31
SCI0
R/W
0 0
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 190 of 1551
RA4W1
11.
1.
2. 3.
MSTPB2 CAN CANMCLK 2 WFI MSTPB11 USB UCLK 2 WFI Bluetooth
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 191 of 1551
RA4W1
11.
11.2.4 CMSTPCRC
MSTP.MSTPCRC 4004 7004h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
MSTPC 31
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
MSTPC MSTPC
14
13
--
--
--
--
--
--
--
--
MSTPC MSTPC
4
3
--
MSTPC MSTPC
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W
b0
MSTPC0
CAC
1
0
1
R/W
b1
MSTPC1
CRC
R/W
0
1
b2
--
1 1 R/W
b3
MSTPC3
CTSU
R/W
0
1
b4
MSTPC4
LCD SLCDC
R/W
0
1
b12-b5
--
1 1 R/W
b13
MSTPC13 DOC
R/W
0
1
b14
MSTPC14 ELC
R/W
0
1
b30-b15 --
1 1 R/W
b31
MSTPC31 SCE5 2
SCE5
0
1
R/W
1. 2.
MSTPC0
2 WFI MCU SCE5 MSTPC31 0 11.9.15
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 192 of 1551
RA4W1
11.
11.2.5 DMSTPCRD
MSTP.MSTPCRD 4004 7008h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
MSTPD 31
--
MSTPD 29
--
--
--
--
--
--
--
--
MSTPD MSTPD
20
19
--
--
MSTPD 16
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
MSTPD 14
--
--
--
--
--
--
--
MSTPD MSTPD
6
5
--
MSTPD MSTPD
3
2
--
--
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
b1-b0 b2
-- MSTPD2
b3
MSTPD3
b4
--
b5
MSTPD5
b6
MSTPD6
b13-b7 b14
-- MSTPD14
b15
--
b16
MSTPD16
b18-b17 b19
-- MSTPD19
b20
MSTPD20
b28-b21 b29
-- MSTPD29
b30
--
b31
MSTPD31
R/W
1 1 R/W
1 AGT1
R/W
1
0
1
0 AGT0
R/W
2
0
1
1 1 R/W
PWM323 320 GPT323GPT320
R/W
0
1
PWM169 164 GPT168, GPT165, GPT164
R/W
0
1
1 1 R/W
GPT POEG
R/W
0
1
1 1 R/W
14 A/D
ADC140
R/W
0
1
1 1 R/W
8 D/A
DAC8
R/W
3
0
1
12 D/A
DAC12
R/W
0
1
1 1 R/W
ACMPLP
R/W
0
1
1 1 R/W
OPAMP
R/W
0
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 193 of 1551
RA4W1
11.
1. 2. 3.
LOCO MSTPD2 1 AGT1 LOCO AGT1 1 LOCO MSTPD3 1 AGT0 LOCO AGT0 1 8 D/A MSTPD19 = 0ACMPLP MSTPD29 0
11.2.6 OPCCR
SYSTEM.OPCCR 4001 E0A0h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
OPCM TSF
--
--
OPCM[1:0]
0
0
0
0
0
0
1
0
R/W
b1-b0
OPCM[1:0]
b1 b0
R/W
0 0High-speed
0 1Middle-speed
1 0Low-voltage 1
1 1Low-speed
b3-b2
--
0 0
R/W
b4
OPCMTSF
0
R
1
b7-b5
--
0 0
R/W
1. HOCOCR.HCSTP 0
OPCCR OPCCR
11.5
OPCM[1:0]
11.4 OPCM[1:0] SOPCM
HOCOCR.HCSTP OSCSF.HOCOSF 0 HOCO OPCCR.OPCM[1:0]
OPCMTSF
OPCM[1:0] 1 0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 194 of 1551
RA4W1
11.2.7 SOPCCR
SYSTEM.SOPCCR 4001 E0AAh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
SOPC MTSF
--
--
--
SOPC M
0
0
0
0
0
0
0
0
11.
R/W
b0
SOPCM
0Subosc-speed
R/W
1Subosc-speed
b3-b1
--
0 0 R/W
b4
SOPCMTSF 0
R
1
b7-b5
--
0 0 R/W
SOPCCR Subosc-speed Subosc-speed LOCO
CACHEE.FCACHEEN 0 43.
11.5
SOPCM
1 Subosc-speed Subosc-speed 0 Subosc-speed OPCCR.OPCM[1:0]
11.4 OPCM[1:0] SOPCM
SOPCMTSF
Subosc-speed Subosc-speed SOPCM 1 0 0
11.4
11.4
High-speed Middle-speed Low-voltage Low-speed Subosc-speed
OPCM[1:0] 00b 01b 10b 11b xxb
SOPCM 0 0 0 0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 195 of 1551
RA4W1
11.2.8 SNZCR
SYSTEM.SNZCR 4001 E092h
b7
b6
b5
b4
b3
b2
b1
b0
SNZE --
--
--
--
--
SNZDT RXDRE CEN QEN
0
0
0
0
0
0
0
0
11.
b0
RXDREQEN
RXD0
b1
SNZDTCEN DTC
b6-b2 b7
-- SNZE
R/W
0RXD0 R/W
1RXD0
DTC
R/W
0DTC
1DTC
0 0
R/W
0
R/W
1
RXDREQEN RXD0
RXD0 SCI0 RXD0 1 RXD0 MCU
SNZDTCEN DTC
DTC SRAM DTC SRAM 1 1 IELSRnICU nDTC
SNZE
1 1 11.6 MCU SNZE 11.8
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 196 of 1551
RA4W1
11.2.9 SNZEDCR
SYSTEM.SNZEDCR 4001 E094h
b7
b6
SCI0U MTED
--
0
0
b5
b4
b3
b2
b1
b0
--
AD0UM AD0MA DTCNZ DTCZR AGTUN TED TED RED ED FED
0
0
0
0
0
0
11.
b0 b1 b2 b3 b4 b6-b5 b7
AGTUNFED DTCZRED DTCNZRED AD0MATED AD0UMTED -- SCI0UMTED
AGT1
DTC
DTC ADC140
ADC140
SCI0
R/W
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
00 R/W
0
R/W
1
11.8 1 SNZEDCR 1
11.3 SNZEDCR
AGTUNFED AGT1
AGT1 24.AGT
DTCZRED DTC
DTC DTC CRA CRB 0 18. DTC
DTCNZRED DTC
DTC DTC CRA CRB 0 18. DTC
AD0MATED ADC140
ADC140 34.14 A/D ADC14
AD0UMTED ADC140
ADC140 34.14 A/D ADC14
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 197 of 1551
RA4W1
11.
SCI0UMTED SCI0
SCI0 29.SCI SCI0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 198 of 1551
RA4W1
11.
11.2.10 SNZREQCR
SYSTEM.SNZREQCR 4001 E098h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
SNZRE SNZRE SNZRE QEN30 QEN29 QEN28
--
--
SNZRE SNZRE SNZRE QEN25 QEN24 QEN23
--
--
--
--
--
SNZRE QEN17
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13
SNZRE SNZRE QEN15 QEN14
--
0
0
0
b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
SNZRE QEN11
--
SNZRE QEN9
--
SNZRE SNZRE QEN7 QEN6
--
SNZRE SNZRE SNZRE SNZRE SNZRE QEN4 QEN3 QEN2 QEN1 QEN0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
SNZREQEN0
0
b1
SNZREQEN1
1
b2
SNZREQEN2
2
b3
SNZREQEN3
3
b4
SNZREQEN4
4
b5
--
b6
SNZREQEN6
6
b7
SNZREQEN7
7
b8
--
b9
SNZREQEN9
9
b10
--
b11
SNZREQEN11
11
b13-b12 b14
-- SNZREQEN14
14
b15
SNZREQEN15
15
b16
--
b17
SNZREQEN17
17
R01UH0883JJ0100 Rev.1.00 2020.08.31
R/W
IRQ0
R/W
0
1
IRQ1
R/W
0
1
IRQ2
R/W
0
1
IRQ3
R/W
0
1
IRQ4
R/W
0
1
0 0
R/W
IRQ6
R/W
0
1
IRQ7
R/W
0
1
0 0
R/W
IRQ9
R/W
0
1
0 0
R/W
IRQ11
R/W
0
1
0 0
R/W
IRQ14
R/W
0
1
IRQ15
R/W
0
1
0 0
R/W
R/W
0
1
Page 199 of 1551
RA4W1
11.
b22-b18 b23
-- SNZREQEN23
23
b24
SNZREQEN24
24
b25
SNZREQEN25
25
b27-b26 b28
-- SNZREQEN28
28
b29
SNZREQEN29
29
b30
SNZREQEN30
30
b31
--
R/W
0 0
R/W
ACMPLP
R/W
0
1
RTC
R/W
0
1
RTC
R/W
0
1
0 0
R/W
AGT1
R/W
0
1
AGT1 A
R/W
0
1
AGT1 B
R/W
0
1
0 0
R/W
SNZREQCR WUPEN 14.ICU SNZREQCR 1 MCU WUPEN SNZREQCR 11.8 14.ICU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 200 of 1551
RA4W1
11.2.11 FLSTOP
SYSTEM.FLSTOP 4001 E09Eh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
FLSTP F
--
--
--
FLSTO P
0
0
0
0
0
0
0
0
11.
R/W
b0
FLSTOP
ON/OFF 0 R/W
1
b3-b1
--
0 0
R/W
b4
FLSTPF
0
R
1
b7-b5
--
0 0
R/W
FLSTOP ON/OFF
FLSTOP SRAM FLSTOP 1 SRAM Low-voltage 0
. FLSTOP 1 0 FLSTPF 0 OSCSF.HOCOSF 1
. HOCOCR.HCSTP OSCSF.HOCOSF 0HOCO
FLSTOP.FLSTOP
FLSTPF
0 FLSTPF 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 201 of 1551
RA4W1
11.2.12 PSMCR
SYSTEM.PSMCR 4001 E09Fh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
PSMC[1:0]
0
0
0
0
0
0
0
0
11.
b1-b0
PSMC[1:0]
b7-b2
--
R/W
b1 b0
R/W
0 0SRAM ON
0 148KB SRAM
2000 0000h 2000 BFFFhON
1 0
1 1
0 0
R/W
PSMC[1:0]
SRAM 01b 48KB SRAMWFI PSMC
11.2.13 OCD SYOCDCR
SYSTEM.SYOCDCR 4001 E40Eh
b7
b6
b5
b4
b3
b2
b1
b0
DBGEN --
--
--
--
--
--
--
0
0
0
0
0
0
0
0
b6-b0 b7
-- DBGEN
R/W
0 0
R/W
0
R/W
1
1
DBGEN 1
1 1 0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 202 of 1551
RA4W1
11.
11.3
SCKDIVCR.FCK[2:0]ICK[2:0]PCKA[2:0]PCKB[2:0]PCKC[2:0]PCKD[2:0] CPUDMACDTC SRAM ICK[2:0]
PCKA[2:0]PCKB[2:0]PCKC[2:0] PCKD[2:0]
FCK[2:0]
9.
11.4
MSTPCRA MSTPCRD MSTPmi m = A Di = 31 0 1 CPU MSTPmi 0
DMACDTC SRAM MSTPmi 1 MSTPmi 1
11.5
11.5.1
11.5
High-speed Middle-speed Low-voltage Low-speed Subosc-speed
PLL 1
IWDT
1. PLL VCC 2.4 3.6V
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 203 of 1551
RA4W1
11.
(1)
1High-speed Low-speed
High-speed 1. High-speed FCACHEE.FCACHEEN
2. Low-speed 3. Low-speed 4. Low-speed 5. OPCCR.OPCMTSF 0 6. OPCCR.OPCM 11bLow-speed 7. OPCCR.OPCMTSF 0 8. Low-speed
a. FCACHEIV.FCACHEIV b. FCACHEIV.FCACHEIV 0 c. FCACHEE.FCACHEEN Low-speed
2High-speed Subosc-speed
High-speed 1. High-speed FCACHEE.FCACHEEN
2. HOCOMOCO PLL
3. 4. SOPCCR.SOPCMTSF 0 5. SOPCCR.SOPCM 1Subosc-speed 6. SOPCCR.SOPCMTSF 0 7. Subosc-speed
a. FCACHEIV.FCACHEIV b. FCACHEIV.FCACHEIV 0 c. FCACHEE.FCACHEEN Subosc-speed
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 204 of 1551
RA4W1
11.
(2)
1Subosc-speed High-speed
Subosc-speed 1. Subosc-speed FCACHEE.FCACHEEN
2. SOPCCR.SOPCMTSF 0 3. SOPCCR.SOPCM 0High-speed 4. SOPCCR.SOPCMTSF 0 5. High-speed 6. High-speed 7. High-speed
a. FCACHEIV.FCACHEIV b. FCACHEIV.FCACHEIV 0 c. FCACHEE.FCACHEEN High-speed
2Low-speed High-speed
Low-speed 1. Low-speed FCACHEE.FCACHEEN
2. OPCCR.OPCMTSF 0 3. OPCCR.OPCM 00bHigh-speed 4. OPCCR.OPCMTSF 0 5. High-speed 6. High-speed 7. High-speed
a. FCACHEIV.FCACHEIV b. FCACHEIV.FCACHEIV 0 c. FCACHEE.FCACHEEN High-speed
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 205 of 1551
RA4W1
11.
11.5.2
High-speed
ICLK 48MHzFCLK 32MHz 2.4 3.6V ICLK FCLK 2.4V 2.7V 16MHz
1 48MHz 2.7 3.6V
2.4V PLL
11.2 High-speed
VCC [V] 3.6
2.7 2.4
1.8 1.6
P/E
VCC [V] 3.6
2.7 2.4
1.8 1.6
0.032768
1
4
8
12
16
1.
FCLK 32MHz
48 ICLK, FCLK [MHz]
0.032768
11.2
High-speed
P/E
1
4
8
12
16
48 ICLK, FCLK [MHz]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 206 of 1551
RA4W1
11.
Middle-speed
High-speed
ICLK FCLK 12MHz 1.8 3.6V ICLK FCLK 1.8V 2.4V 8MHz
1 12MHz 1.8 3.6V 1.8V 2.4V 8MHz
2.4V PLL
11.3 Middle-speed
VCC [V]
3.6
VCC [V]
3.6
2.7
P/E
2.7
2.4
2.4
1.8
1.8
1.6
1.6
0.032768
11.3
1
4
8
12
16
48 ICLK, FCLK [MHz]
0.032768
Middle-speed
P/E
1
4
8
12
16
48 ICLK, FCLK [MHz]
Low-voltage
PLL
ICLK FCLK 4MHz 1.8 3.6V
1 4MHz 1.8 3.6V PLL
11.4 Low-voltage
VCC [V]
3.6
VCC [V]
3.6
2.7
P/E
2.7
2.4
2.4
1.8
1.8
1.6
1.6
0.032768
11.4
1
4
8
12
16
48 ICLK, FCLK [MHz]
0.032768
Low-voltage
P/E
1
4
8
12
16
48 ICLK, FCLK [MHz]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 207 of 1551
RA4W1
11.
Low-speed
ICLK FCLK 1MHz 1.8 3.6V
P/E PLL
11.5 Low-speed
VCC [V]
3.6
VCC [V]
3.6
2.7
P/E
2.7
2.4
2.4
1.8
1.8
1.6
1.6
0.032768
11.5
1
4
8
12
16
48 ICLK, FCLK [MHz]
0.032768
Low-speed
P/E
1
4
8
12
16
48 ICLK, FCLK [MHz]
Subosc-speed
ICLK FCLK 37.6832kHz 1.8 3.6V
P/E
11.6 Subosc-speed
VCC [V]
3.6
VCC [V]
3.6
2.7
P/E
2.4
1.8 1.6
2.7
2.4
P/E
1.8 1.6
0.02708.05322087.063876832
1
4
8
12
16
48 ICLK, FCLK [MHz]
0.02708.05322087.063876832
1
4
8
12
16
11.6
Subosc-speed
48 ICLK, FCLK [MHz]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 208 of 1551
RA4W1
11.
11.6
11.6.1
SBYCR.SSBY 0 WFI MCU CPU CPU CPU WFI IELSRn 14. ICU
IWDT OFS0.IWDTSTPCTL 1 IWDT MCU IWDT IWDT OFS0.IWDTSTPCTL 0 IWDT MCU IWDT
WDT OFS0.WDTSTPCTL 1 WDT MCU WDT WDT WDTCSTPR.SLCSTP 1 WDT MCU WDT
WDT OFS0.WDTSTPCTL 0 WDT MCU WDT WDT WDTCSTPR.SLCSTP 0 WDT MCU WDT
11.6.2
RES
SRAM
SRAM ECC
MPU
MPU
IWDT WDT
1. MCU
2. RES RES Low MCU 48. RES Low RES High CPU
3. IWDT IWDT MCU IWDT
OFS0.IWDTSTRT = 0 OFS0.IWDTSTPCTL = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 209 of 1551
RA4W1
11.
4. WDT WDT MCU WDT
OFS0.WDTSTRT = 0 OFS0.WDTSTPCTL = 1
OFS0.WDTSTRT = 1 WDTCSTPR.SLCSTP = 1
5. MCU
. 14.ICU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 210 of 1551
RA4W1
11.
11.7
11.7.1
SBYCR.SSBY 1 WFI MCU CPUCPU SRAM I/O 11.2 11.3 14.2.9 WUPEN WFI IELSRn 14.ICU
DTC DMAST.DMST DTCST.DTCST 0 WFI DTC DTCST.DTCST 1 WFI
IWDT OFS0.IWDTSTPCTL 1 IWDT MCU IWDT IWDT OFS0.IWDTSTPCTL 0 IWDT MCU IWDT
MCU WDT
OSTDCR.OSTDE = 1 OSTDCR.OSTDE = 0WFI OSTDCR.OSTDE = 1 WFI SBYCR.SSBY = 1 MCU WFI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 211 of 1551
RA4W1
11.
11.7.2
11.3
RES
IWDT
MCU 14.2.9 WUPEN
1. 11.3 MCU
2. RES RES Low MCU 48.RES Low RES High CPU
3. MCU
4. MCU
5. IWDT IWDT MCU IWDT
OFS0.IWDTSTRT = 0 OFS0.IWDTSTPCTL = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 212 of 1551
RA4W1
11.
11.7.3
IRQn IRQn 11.7
ICU IRQCRi.IRQMD[1:0] 01b IRQn IRQCRi.IRQMD[1:0] 10b SBYCR.SSBY 1 WFI IRQn
ICU 14. ICU 11.7 48.
ICLK
IRQn
IRQMD[1:0]
01b
10b
SBYCR.SSBY
11.7
IRQ IRQMD[1:0] = 10b SBYCR.SSBY = 1
WFI
IRQ
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 213 of 1551
RA4W1
11.
11.8
11.8.1
11.8 MCU CPU 11.2 DTC SNZCR.SNZDTCEN
PAD (RXD0)
ICU WUPEN.bn
1
0
n = 015, 17, 2325, 2830
SNZCR.b7
SNZREQCR.bn
SNZCR.b0
+
ELC SYSTEM_SNZREQ
ELSRx
SCI0 rxd
11.8
11.6
SNZREQCR SNZREQENn SNZCR RXDREQEN
11.6
PORT_IRQnn = 0 4, 6, 7, 9, 11, 14, 15 KEY_INTKR ACMP_LP0 RTC_ALM RTC_PRD AGT1_AGTI AGT1_AGTCMAI AGT1_AGTCMBI RXD0
SNZREQCR SNZREQCR SNZREQCR SNZREQCR SNZREQCR SNZREQCR SNZREQCR SNZREQCR SNZCR
SNZREQENnn = 015 SNZREQEN17 SNZREQEN23 SNZREQEN24 SNZREQEN25 SNZREQEN28 SNZREQEN29 SNZREQEN30 RXDREQEN 1
1. RXDREQEN 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 214 of 1551
RA4W1
11.
11.8.2
11.3 MCU SELSR0 NVIC IELSRnn = 0 31SELSR0 IELSRn 14. ICU
WFI
3 1 2
4
High Low
Low
1. 2. 3. SNZCR.SNZE = 1 4. SNZCR.SNZE = 0
11.9
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 215 of 1551
RA4W1
11.
11.8.3
11.7 MCU
11.8 CTSU SCI0ADC140 DTC MCU AGT1 SCI0
11.10 SNZEDCR
11.7
AGT1 AGT1_AGTI DTC DTC_COMPLETE DTC DTC_TRANSFER ADC140 A/B ADC140_WCMPM ADC140 A/B ADC140_WCMPUM SCI0 SCI0_DCUF
SNZEDCR
b0
SNZEDCR
b1
SNZEDCR
b2
SNZEDCR
b3
SNZEDCR
b4
SNZEDCR
b7
11.8
DTC ADC140 CTSU SCI0
AGT1
AGT1
MCU MCU
MCU
MCU
.
DTC ADC140CTSU SCI MCU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 216 of 1551
RA4W1
11.
WFI
Low
2 1
1. 2. SNZCR.SNZE = 1
11.10
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 217 of 1551
RA4W1
11.8.4
11.11 ELC
MSTPCRC.MSTPC14 = 0 ELSRx.ELS = 01Dh ELCR.ELCON = 1
SELSR0.SELS = 0xxh IELSRy.DTCE = 0
IELSRy.IELS = 017h
SNZEDCR.bm = 1
WUPEN.bn = 0 SNZREQCR.bn = 1
SNZCR.b7 = 1 (SNZE = 1)
ELC
ELC SYSTEM_SNZREQ ELC
14.4
m
n n
WFI
?
No
Yes
SYSTEM_SNZREQ ELC
SELS
?
SELS
11.11
ELC
R01UH0883JJ0100 Rev.1.00 2020.08.31
11. Page 218 of 1551
RA4W1
11.
MCU CPU SCI0 11.9 11.10 SCI0 SCI0
High-speed
Middle-speed
Low-speed
Low-voltage Subosc-speed
11.9 11.10 SCI0 SCI0 BGDM 0 ABCS 0 ABCSE 0 29.SCI
High-speed Middle-speed Low-speed
11.9
HOCO: � 1.0% (Ta = -20 +85 )
ICLK, PCLKA, PCLKB, PCLKC, PCLKD, FCLK, TRCLK
24MHz
HOCO
32MHz
48MHz
1
9600 1
--
--
2
9600 2
9600 4
4800
4
9600 3
9600 5
4800
8
4800
4800
4800
16
4800
4800
4800
32
2400
2400
2400
64
2400
2400
2400
bps
64MHz -- -- 2400 2400 2400 2400 2400
1. 2. 3. 4. 5.
9600bps SCI0.SMR.CKS[1:0] = 00bSCI0.SEMR.BRME = 1SCI0.BRR = 3DhSCI0.MDDR = CEh
9600bps SCI0.SMR.CKS[1:0] = 00bSCI0.SEMR.BRME = 1SCI0.BRR = 1EhSCI0.MDDR = CEh
9600bps SCI0.SMR.CKS[1:0] = 00bSCI0.SEMR.BRME = 1SCI0.BRR = 0DhSCI0.MDDR = BAh
9600bps SCI0.SMR.CKS[1:0] = 00bSCI0.SEMR.BRME = 1SCI0.BRR = 32hSCI0.MDDR = FEh
9600bps SCI0.SMR.CKS[1:0] = 00bSCI0.SEMR.BRME = 1SCI0.BRR = 18hSCI0.MDDR = F9h
High-speed Middle-speed Low-speed
11.10
HOCO: � 2.0% (Ta = -40 -20 )
ICLK, PCLKA, PCLKB, PCLKC, PCLKD, FCLK, TRCLK
1
24MHz 2400
HOCO
32MHz --
48MHz --
2
2400
2400
2400
4
2400
2400
2400
8
2400
2400
2400
16
2400
2400
2400
32
1200
1200
1200
64
1200
1200
1200
bps
64MHz -- -- 1200 1200 1200 1200 1200
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 219 of 1551
RA4W1
11.
11.12 SCI0
MSTPCRB.MSTPB31 = 0 SCI0
SCKSCR.CKSEL = 0h MOCOCR.MCSTP = 1 MOSCCR.MOSTP =1
PLLCR.PLLSTP = 1 MSTPCRC.MSTPC0 = 1
RXD0 = 1
SELSR0.SELS = 0B1h IELSRy.DTCE = 0
IELSRy.IELS = 017h
SNZEDCR.b7 = 1 (SCI0UMTED = 1)
MSTPCRD.MSTPD2 = 0 AGT1
SNZEDCR.b0 = 1 (AGTUNFED = 1)
SNZCR.b0 = 1 (RXDREQEN) = 1
SNZCR.b7 = 1 (SNZE = 1)
SCI0
SCI0
UART
HOCO
MOCO PLL
CAC
SCI0_RXI_OR_ERI
SCI0 RXD0 AGT1
AGT1
RXD0 AGT1
RXD0
WFI
?
No
Yes
AGT1 SCI0
?
Yes
SELS ?
No
AGT1
SELS
11.12
SCI0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 220 of 1551
RA4W1
11.
11.9
11.9.1
(1)
SYSTEM
OPCCR.OPCMTSF = 1 SOPCCR.SOPCMTSF = 1 WFI FENTRYR.FENTRY0 = 1 FENTRYR.FENTRYD = 1 P/E P/E
FLSTOP.FLSTPF = 1
(2)
11.11 11.12 9.
11.11
1
SCKSCR. CKSEL[2:0],
CKOCR. CKOSEL[2:0]
Highspeed, Middlespeed
000b (HOCO) 001b (MOCO) 010b (LOCO) 011b (MOSC) 100b (SOSC) 101b (PLL)
1
Lowspeed, Lowvoltage
000b (HOCO) 001b (MOCO) 010b (LOCO) 011b (MOSC) 100b (SOSC)
Subosc 010b (LOCO) -speed 100b (SOSC)
SCKDIVCR. FCK[2:0],
SCKDIVCR. ICK[2:0]
000b (1/1) 001b (1/2) 010b (1/4) 011b (1/8) 100b (1/16) 101b (1/32) 110b (1/64)
000b (1/1)
SLCDSCKCR. LCDSCKSEL[2:0] 000b (LOCO) 001b (SOSC) 010b (MOSC) 100b (HOCO)
000b (LOCO) 001b (SOSC)
PLLCR. PLLSTP
0 1
HOCOCR. HCSTP
0 1
1 1 1
MOCOCR. MCSTP
0 1
1
LOCOCR. LCSTP
0 1
0 1
MOSCCR. MOSTP
0 1
1
SOSCCR. SOSTP
0 1
0 1
1. SCKSCR.CKSEL[2:0]
11.12
2
PLL IWDT
SOPCCR.SOPCM
OPCCR.OPCM[1:0]
0
00b01b
0
00b, 01b, 10b, 11b
0, 1
00b, 01b, 10b, 11b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 221 of 1551
RA4W1
11.
(3)
SCKSCR, OPCCR SOPCCR.SOPCM = 1Subosc-speed
(4) DTC DMAC
MSTPCRA
(5)
SNZCR, SNZEDCR, SNZREQCR
(6) FLSTOP.FLSTOP 1
SOPCCR.SOPCM = 0OPCCR.OPCM[1:0] = 00bHigh-speed SOPCCR.SOPCM = 0OPCCR.OPCM[1:0] = 01bMiddle-speed SOPCCR.SOPCM = 0OPCCR.OPCM[1:0] = 11bLow-speed SOPCCR.SOPCM = 1Subosc-speed
(7) MEMWAIT.MEMWAIT 1
SOPCCR.SOPCM = 0OPCCR.OPCM[1:0] = 01Middle-speed SOPCCR.SOPCM = 0OPCCR.OPCM[1:0] = 10Low-voltage SOPCCR.SOPCM = 0OPCCR.OPCM[1:0] = 11Low-speed SOPCCR.SOPCM = 1Subosc-speed
(8) PRCR.PRC1 0
SBYCR, SNZCR, SNZEDCR, SNZREQCR, FLSTOP, PSMCR, OPCCR, SOPCCR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 222 of 1551
RA4W1
11.
11.9.2 I/O
I/O High
11.9.3 DMAC DTC
MSTPCRA.MSTPA22 1 DMAC DMAST.DMST DTC DTCST.DTCST 0 17.DMA DMAC18. DTC
11.9.4
CPU DMACDTC
11.9.5
MCU WFE MCU SLEEPDEEP Cortex�-M4 SLEEPDEEP
11.9.6 WFI
WFI I/O CS I/O CS WFI CS WFI MSTPCRB I/O
11.9.7 DMAC DTC WDT/IWDT
WDT IWDT DMAC DTC WDT IWDT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 223 of 1551
RA4W1
11.
11.9.8
MCU
11.9.9 RXD0
SNZCR.RXDREQEN 1 RXD0 MCU RXD0 RXD0 MCU RXD0 SCI0_ERI SCI0_RXI MCU SCI0 AGT1 SCI AGT1 AGT1 SCI0
11.9.10 SCI0
SCI0 AGT1
SCI0 HOCO MOCO PLL
RXD0 High SCI MSTPCRC.MSTPC0 1
11.9.11 A/D
ELC A/D ADTRG0
11.9.12 CTSU
ELC CTSU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 224 of 1551
RA4W1
11.
11.9.13 ELC
ELC ELSRnSYSTEM_SNZREQ
SYSTEM_SNZREQ
DTC DTC_DTCEND
ADC140 A/B ADC140_WCMPM
ADC140 A/B ADC140_WCMPUM
DOC_DOPCI
11.9.14 ADC140
ADC140 DTC ADC140 ADC140 DTC
11.9.15
MCU MCU Lowspeed 600A 11.13
11.13
PRCR.PRC1 = 1
MSTPCRC.MSTPC31 = 0
PCLKB3 dummy = PORT1.PODR.BYTE; while (dummy != PORT1.PODR.BYTE) { }
MSTPCRC.MSTPC31 = 1
PRCR.PRC1 = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 225 of 1551
RA4W1
12.
12.
12.1
MCU VCC VBATT RTCSOSCLOCO VBATT_R VBATT
VCC VCC VBATT VBATT VCC VBATT 12.1
12.1
VBATT
VBATWIO0
VBATT VBATT
12.1.1
VBATT VBATT_R VBATT
12.1.2
VCC VCC VBATT VBATT VCC VBTCR1.BPWSWSTP VBTCR1.BPWSWSTP 1
12.1.3 VBATT
VBATT VBATT VBATT
12.1.4 VBATT_R
VBATT_R VBATT_R VBATT_R VBATT_POR VBATT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 226 of 1551
RA4W1
12.
12.1.5
512 1 VBATT VCC VBATT
12.1.6 VBATT
VBATT VBATT VBATT_R RTC VBATWIO0
. ICU VCC 12.3.5VBATT
12.1.7
RTC RTCIC0 RTCIC0 25.RTCRTCIC0 12.2 VBTICTLR
. VBATT VCC . VBTCR1.BPWSWSTP 1 RTCSOSC
LOCO 48.VBTCR1.BPWSWSTP VBATT_POR tVBATPOR VBATT VBTCR1.BPWSWSTP 1 12.2.1VBATT 1VBTCR1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 227 of 1551
RA4W1 12.1
12.
VCC VBATT
+ -
VDETBATT
VBATT_R
P402/VBATWIO0/RTCIC0
+ -
VDETBATLVD
+ -
VVBATPOR
VBATT
VCH0OEN
VCH0INEN
VBATT
VBATT
VBATT_POR
(VBATT_LVD)
LOCO
XCIN XCOUT
RTC
RTC_PRD
VBATT
RTC_ALM
12.1
VCC VBATT XCIN XCOUT VBATWIO0 RTCIC0
SOSC SOSC VBATT RTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 228 of 1551
RA4W1
12.2 12.2.1 VBATT 1VBTCR1
SYSTEM.VBTCR1 4001 E41Fh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
BPWS WSTP
0
0
0
0
0
0
0
0
12.
b0
BPWSWSTP
b7-b1
--
R/W
0
R/W
1
0 0
R/W
BPWSWSTP
BPWSWSTP VCC VCC VBATT VCC 1
. VBATSR.VBTRVLD . VBATT VBTCR1.BPWSWSTP 1
VBTCR1.BPWSWSTP 12.2 VBATT VBTCR1.BPWSWSTP
VBTCR1.BPWSWSTP = 1
No VBTSR.VBTRVLD = 1?
Yes
12.2
VBTCR1.BPWSWSTP
. 12.2 VBTSR.VBTRVLD 1 VBATT_POR tVBATPOR48. VBTSR.VBTRVLD 0
9. LOCOCRLOCOUTCRSOSCCR SOMCR VBTCR1 VBTSR.VBTRVLD 25.RTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 229 of 1551
RA4W1
12.2.2 VBATT 2VBTCR2
SYSTEM.VBTCR2 4001 E4B0h
b7
b6
b5
b4
b3
b2
b1
b0
VBTLVDLVL[1:0] --
VBTLV DEN
--
--
--
--
0
0
0
0
0
0
0
0
12.
b3-b0 b4
-- VBTLVDEN
VBATT
b5 b7-b6
-- VBTLVDLVL[1:0]
VBATT
R/W
0 0 R/W
0VBATT
R/W
1VBATT
0 0 R/W
b7 b6
0 0 0 1 1 02.3V 1 12.1V
R/W
VBTCR2 VBATT VBTCR2 VBATT_POR
VBTLVDEN VBATT VBATT
VBTLVDLVL[1:0] VBATT VBATT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 230 of 1551
RA4W1
12.2.3 VBATT VBTSR
SYSTEM.VBTSR 4001 E4B1h
b7
b6
b5
b4
b3
--
--
--
VBTRV LD
--
0
0
0 05 0
b2
b1
b0
--
VBTBL VBTRD
DF
F
0
02 11
12.
b0
VBTRDF VBATT_R
b1
b3-b2 b4
VBTBLDF VBATT
4
--
VBTRVLD VBATT_R
b7-b5
--
0VBATT_R 1VBATT_R
0VBATT 1VBATT
0 0
0VBATT_R 1VBATT_R
0 0
R/W R/(W)
3
R/(W)
3
R/W R
R/W
1. 2. 3. 4.
5.
VBATT_POR VBATT_POR 1 0 VBTLVDEN 1 VBTLVDEN 0 0
VBATT_R
VBTRDF VBATT_R VBATT_RVCC VBATT
1 VBATT_R 0 1 0
VBTBLDF VBATT VBATT
1 VBATT 0 1 0
VBTRVLD VBATT_R VBATT VBATT_R
VBTRVLD 1 9. LOCOCRLOCOUTCRSOSCCR SOMCR VBTCR1 VBTSR.VBTRVLD 25.RTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 231 of 1551
RA4W1
12.
12.2.4 VBATT VBTCMPCR
SYSTEM.VBTCMPCR 4001 E4B2h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
VBTCM PE
0
0
0
0
0
0
0
0
R/W
b0
VBTCMPE VBATT 0VBATT
R/W
1VBATT
b7-b1
--
0 0
R/W
VBTCMPE VBATT VBATT VBATT_POR
12.2.5 VBATT VBTLVDICR
SYSTEM.VBTLVDICR 4001 E4B4h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
--
VBTLV VBTLV DISEL DIE
0
0
0
b0
VBTLVDIE
VBATT
b1
VBTLVDISEL
b7-b2
--
R/W
0VBATT
R/W
1VBATT
0
R/W
1
0 0 R/W
VBTLVDICR VBATT_POR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 232 of 1551
RA4W1
12.
12.2.6 VBATT VBTBKRn(n = 0 511)
SYSTEM.VBTBKR0 4001 E500h SYSTEM.VBTBKR511 4001 E6FFh
b7
b6
b5
b4
b3
b2
b1
b0
VBTBKR[7:0]
x
x
x
x
x
x
x
x
x
VBTBKRn 8 VBATT VBATT
.
VBATT VCC V_BKBATT
48.
12.2.7 VBATT VBTWCTLR
SYSTEM.VBTWCTLR 4001 E4B6h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- VWEN
0
0
0
0
0
0
0
0
b0
VWEN
VBATT
b7-b1
--
R/W
0
R/W
1
0 0
R/W
VBTWCTLR VBATT VBTWCTLR VBATT_POR
VWEN VBATT
VBATT VWEN 0 VBTOCTLR.VCH0OEN 1 VBATWIO0 Low VWEN 1 VBATWIO0 VBTOCTLR.VOUT0LSEL
VWEN 1 VWEN 0
VBTWCH0OTSR
VBTICTLR
VBTOCTLR
VBTWTER
VBTWEGR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 233 of 1551
RA4W1
12.
12.2.8 VBATT I/O 0 VBTWCH0OTSR
SYSTEM.VBTWCH0OTSR 4001 E4B8h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
CH0VR CH0VR TCATE TCTE
--
--
--
0
0
0
0
0
0
0
0
R/W
b2-b0 --
0 0 R/W
b3
CH0VRTCTE VBATWIO0RTC
0RTC VBATT R/W 0
1RTC VBATT 0
b4
CH0VRTCATE VBATWIO0RTC 0RTC VBATT R/W
0
1RTC VBATT
0
b7-b5 --
0 0 R/W
VBTWCH0OTSR VBATT 0
1 VBTWFR VBATWIO0 VBTOCTLR VOUT0LSEL
VBTWCH0OTSR VBATT_POR
12.2.9 VBATT VBTICTLR
SYSTEM.VBTICTLR 4001 E4BBh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
VCH0I NEN
0
0
0
0
0
0
0
0
b0
VCH0INEN
b7-b1
--
VBATT0
R/W
0VBATWIO0RTCIC0
R/W
1VBATWIO0RTCIC0
00 R/W
VBTICTLR VBATT VBTICTLR VBATT_POR
VCH0INEN VBATT 0
VBATT VBATT RTCRTCIC0VBTICTLR 25.RTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 234 of 1551
RA4W1
12.2.10 VBATT VBTOCTLR
SYSTEM.VBTOCTLR 4001 E4BCh
b7
b6
b5
b4
b3
b2
--
--
--
--
VOUT0 LSEL
--
0
0
0
0
0
0
b1
b0
--
VCH0O EN
0
0
12.
R/W
b0
VCH0OEN VBATT0 0VBATWIO0
1VBATWIO0 1
R/W
b2-b1
--
0 0
R/W
b3
VOUT0LSEL VBATT0 0VBATT L
R/W
1VBATT H
b7-b4
--
0 0
R/W
VBTOCTLR VBATT VBATWIO0 VBTOCTLR VBATT_POR
VCH0OEN VBATT 0
VBATT
1. VCH0OEN 1 P402PFS.PMR 0
VOUT0LSEL VBATT 0
VBATT 0 VOUT0LSEL 0 VBATWIO0 VBATT Low VBATT High VOUT0LSEL 1 VBATWIO0 VBATT High VBATT Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 235 of 1551
RA4W1
12.
12.2.11 VBATT VBTWTER
SYSTEM.VBTWTER 4001 E4BDh
b7
b6
b5
b4
b3
b2
--
--
--
VRTCA VRTCI
E
E
--
0
0
0
0
0
0
b1
b0
-- VCH0E
0
0
b0
VCH0E
VBATWIO0
b2-b1 b3
-- VRTCIE
RTC
b4
VRTCAE RTC
b7-b5 --
R/W
0VBATWIO0 VBATT
R/W
1VBATWIO0 VBATT
0 0
R/W
0RTC VBATT
R/W
1RTC VBATT
0RTC VBATT R/W 1RTC VBATT
0 0
R/W
VBTWTER VBATT VBTWTER VBATT_POR
12.2.12 VBATT VBTWEGR
SYSTEM.VBTWEGR 4001 E4BEh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
VCH0E G
0
0
0
0
0
0
0
0
R/W
b0
VCH0EG VBATWIO0 0
R/W
1
b7-b1
--
0 0
R/W
VBTWEGR VBATT VBTWEGR VBATT_POR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 236 of 1551
RA4W1
12.
12.2.13 VBATT VBTWFR
SYSTEM.VBTWFR 4001 E4BFh
b7
b6
b5
b4
b3
b2
--
--
--
VRTCA VRTCI
F
F
--
0
0
0
0
0
0
b1
b0
-- VCH0F
0
0
b0
b2-b1 b3
b4
b7-b5
VCH0F
-- VRTCIF
VRTCAF
--
VBATWIO0
VBATT RTC
VBATT RTC
0VBATWIO0
1VBATWIO0
0 0
R/W R/(W)
1
R/(W)
1
0RTC
1RTC
0RTC
1RTC
0 0
R/(W)
1
R/(W)
1
R/W
1. 1 0
VBTWFR VBATT VWEN VBTWCTLR VBTWFR VWEN 1 PCLKB 5 VBTWFR VWEN 0 PCLKB 5
VBTWEGR 1 VBTWFR VBATT_POR
VCH0F VBATT 0 VBATWIO0 1 VBTWEGR VBATWIO0
0 1 0
VRTCIF VBATT RTC RTC 1 RTC
0 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 237 of 1551
RA4W1
VRTCAF VBATT RTC RTC 1 RTC 0 1 0
12.
12.2.14 BKRACR
SYSTEM.BKRACR 4001 E0C6h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
BKRACS[2:0]
1
1
0
R/W
b2-b0
BKRACS[2:0]
b2
b0
0 0 0
SOSC LOCO
R/W
1 1 0
SOSCLOCO
b7-b3
--
0 0
R/W
BKRACR 110b 000b 64 VBATT_POR
SOSC LOCO SOSC LOCO 1. SCKSCR.CKSEL[2:0] 2. BKRACR.BKRACS[2:0] 000b
SOSC LOCO SOSC LOCO 1. BKRACR.BKRACS[2:0] 110b 2. SCKSCR.CKSEL[2:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 238 of 1551
RA4W1
12.
12.3
12.3.1
VCC VBATT RTCLOCO VCC VBATT VCC VDETBATT VCC RTC VBATT VBATT VBTBLDF
0 VBATT RTC VBATWIO0 RTC
VBATT RTC
XCINXCOUT
VBATWIO0 RTCIC0 LOCO
VBATT
VBATT
12.2 VBATT
12.2
VBATT (1/2)
VCC
VBATT
VCC
SOSCCR.SOSTP VBATT
IWDT PLL CPU
LOCOCR.LCSTP VBATT
SRAMECC SRAM
VBATT
RTC
AGTnn = 0, 1
LVD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 239 of 1551
RA4W1
12.
12.2 I/O
VBATT (2/2)
RTCIC0
VBATWIO0
VBATT
.
12.3
VCC
VCC VDETBATT1
VBATT
VBATT
VCC LVD0
LVD0
VCC VBATT
VCC VBATT
VCC
. 1.
48. VDETBATT VCC VBATT
12.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 240 of 1551
RA4W1
12.
12.3.2 VBATT
VCC VCC VBATT VBATT VCC VBTCR1.BPWSWSTP
BPWSWSTP VCC VCC VBATT VCC 1
. 0 OFS1.LVDAS 0 0 VDETBATT OFS1.VDSEL1[2:0] 001b 010b
. VBTSR.VBTRVLD
12.3.3 VBATT
VBTSR.VBTBLDF VBATT
VBATT
1. 0 8.LVD
2. VBTCR1.BPWSWSTP 1
3. VBTSR.VBTRVLD 1 VBTCR2.VBTLVDENVBTLVDICR.VBTLVDIE VBTCMPCR.VBTCMPE 0
4. VBTCR2.VBTLVDLVL[1:0] VBATT
5. VBTLVDICR.VBTLVDISEL
6. VBTCR2.VBTLVDEN 1 VBATT
7. 48.VBATT td_vbat VBATT VBTCMPCR.VBTCMPE 1
8. VBTSR.VBTBLDF 0 VBATT VBTLVDICR.VBTLVDIE 1
9. VBTCR1.BPWSWSTP 0 12.3.2 VBATT
VBATT 12.4 VBATT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 241 of 1551
RA4W1
12.
VBATT VDETVBTLVD1
VBTLVDIE
VBTCMPE
VBTLVDEN
VBTBLDF (VBATT_LVD)
1
td_vbat
1. VDETVBTLVD VBTCR2.VBTLVDLVL[1:0] VBATT
12.4
VBATT
VBATT
1. VBTSR.VBTRVLD 1
2. VBTLVDICR.VBTLVDIE 0
3. VBTCMPCR.VBTCMPE 0 VBATT
4. VBTCR2.VBTLVDEN 0 VBATT
5. VBTCR2.VBTLVDENVBTCMPCR.VBTCMPE VBTLVDICR.VBTLVDIE VBATT
12.3.4 VBATT
VBATT VBTBKRnn = 0 511
1. VBTCR1.BPWSWSTP 1
2. VBTSR.VBTRVLD 1
3. VBTBKRnn = 0 511 8 4. VBTCR1.BPWSWSTP 0 12.3.2
VBATT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 242 of 1551
RA4W1
12.
12.3.5 VBATT
VBATT VBATT_R RTC VBATWIO0
. ICU
VBATT 0 LVD0 MCU
1. VBTCR1.BPWSWSTP 1
2. VBTSR.VBTRVLD 1 VBTSR.VBTRDF 0
3. VBTWFR VBATT 12.5 VBTWFR.VRTCIF 1
4. VBTWFR 0 VBATWIO0 12.5 VBATWIO0 High Low
5. I/O IC 0 1
6. VBATT VBTCR1.BPWSWSTP 0 I/O IC 0 1 VBTWCTLR.VWEN 0 VBATT VBTWTER
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 243 of 1551
RA4W1
12.
VCC
Vdet01 VDETBATT2
VVBATTH4
VLVH5
VBATT VVBATPOR3
P402/VBATWIO0 VCC
I/O
RTC RTC_PRD
VBTWFR.VRTCIF
Low
1. 2. 3. 4. 5. 6. 7.
tdet6 tLVD07
Vdet0 OFS1.VDSEL1[2:0] LVD0 VDETBATT VVBATPOR VBATT VBAT_POR VVBATTH VLVH LVD0 tdet LVD0 tLVD0 LVD0
12.5
VBATT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 244 of 1551
RA4W1
12.
12.4
1. VBATT VBATT VCC
2. VBATT RTC VBTSR
3.
4. VBATT RTC RTC VBATT
5. VBATT VBATT_R VBATT
6. VCC I/O VBATT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 245 of 1551
RA4W1
13.
13.
13.1
PRCR
13.1 PRCR
13.1
PRCR
PRCR
PRC0
SCKDIVCR, SCKSCR, PLLCR, PLLCCR2, BCKCR, MEMWAIT, MOSCCR, HOCOCR, MOCOCR, CKOCR,
TRCKCR, OSTDCR, OSTDSR, SLCDSCKCR, EBCKOCR, MOCOUTCR, HOCOUTCR, MOSCWTCR, MOMCR,
SOSCCR, SOMCR, LOCOCR, LOCOUTCR, HOCOWTCR, USBCKCR
PRC1
SBYCR, SNZCR, SNZEDCR, SNZREQCR, FLSTOP, PSMCR, OPCCR, SOPCCR, SYOCDCR
VBTCR1, VBTCR2, VBTSR, VBTCMPCR, VBTLVDICR, VBTWCTLR, VBTWCH0OTSR, VBTICTLR,
VBTOCTLR, VBTWTER, VBTWEGR, VBTWFR, VBTBKRn (n = 0511), BKRACR
PRC3
LVD LVD1CR1, LVD1SR, LVCMPCR, LVDLVLR, LVD1CR0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 246 of 1551
RA4W1
13.
13.2 13.2.1 PRCR
SYSTEM.PRCR 4001 E3FEh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
PRKEY[7:0]
--
--
--
-- PRC3 -- PRC1 PRC0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
PRC0
0
b1
PRC1
1
b2
--
b3
PRC3
3
b7-b4 b15-b8
--
PRKEY[7:0] PRC
0 1
0 1
00
LVD 0 1
00
PRCRPRCR 8A5h8 16
R/W R/W
R/W
R/W R/W
R/W W
1
1. 00h
PRCn nn = 0, 1, 3
13.1 PRCn 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 247 of 1551
RA4W1
14. ICU
14. ICU
14.1
ICUNVICDTC DMAC ICU 14.1 ICU 14.1 ICU 14.2
14.1
ICU
DTC DMAC
209
Low 4 1
11IRQ0IRQ4, IRQ6, IRQ7, IRQ9, IRQ11, IRQ14, IRQ15
DTC DMAC 1
2
NVIC NMI
3
32
NMI
WDT
3
IWDT 3
1 3
1 LVD_LVD1
VBATT RPEST RECCST BUSSST BUSMST SPEST
VBATT SRAM SRAM ECC MPU MPU CPU
WUPEN
SELSR0 WUPEN
14.2.8SYS SELSR0 14.2.9 WUPEN
1. 2. 3.
4.
DTC DMAC 14.4 1 NMIER 1 LVD1CR1.IRQSEL 1 VBATT VBTLVDICR.VBTLVDISEL 1 Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 248 of 1551
RA4W1
14. ICU
CPU MPU
MPU SRAM ECC
SRAM IWDT WDT
1 VBATT
NMI
IRQ0 IRQ15
DMAC DTC
NFCL NFLT NMI KSEL EN MD
FCLK FLT IRQ SEL EN MD
NMI SR
NMI
NMI
CLR
ER
WUPEN
DTCE
SELSR0
SELSR0
NVIC
CPU
IELSRn
IR
[31:0]
CPU
DTC
DTC DTC
DTC
DELSRn
DMAC[3:0]
DMAC
DMAC DMAC
DMAC
NMISR NMIER NMICLR NMIMD NMI NMICR.NMIMD NFCLKSEL NMI
NMICR.NFCLKSEL NFLTEN NMI NMICR.NFLTEN IRQMD IRQi
IRQCRi.IRQMD (i = 0 4, 6, 7, 9, 11, 14, 15)
FCLKSEL IRQi
IRQCRi.FCLKSEL (i = 0 4, 6, 7, 9, 11, 14, 15)
FLTEN IRQi
IRQCRi.FLTEN (i = 0 4, 6, 7, 9, 11, 14, 15)
SELSR0 SYS 0
WUPEN
IELSRn ICU n = 0 31
IR
IELSRn.IR
DTCE
DTC IELSRn.DTCE
DELSRn DMAC n = 0 3
14.1
ICU
14.2
ICU
NMI IRQ0IRQ4, IRQ6, IRQ7, IRQ9, IRQ11, IRQ14, IRQ15
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 249 of 1551
RA4W1
14. ICU
14.2
Arm� NVIC ARM� Cortex�-M4 Processor Technical Reference Manual (ARM DDI 0439D)
14.2.1 IRQ iIRQCRii = 0 4, 6, 7, 9, 11, 14, 15
ICU.IRQCR0 4000 6000h, ICU.IRQCR1 4000 6001h, ICU.IRQCR2 4000 6002h, ICU.IRQCR3 4000 6003h, ICU.IRQCR4 4000 6004h, ICU.IRQCR6 4000 6006h, ICU.IRQCR7 4000 6007h, ICU.IRQCR9 4000 6009h, ICU.IRQCR11 4000 600Bh, ICU.IRQCR14 4000 600Eh, ICU.IRQCR15 4000 600Fh
b7
b6
b5
b4
b3
b2
b1
b0
FLTEN -- FCLKSEL[1:0] --
--
IRQMD[1:0]
0
0
0
0
0
0
0
0
b1-b0
IRQMD[1:0]
b3-b2 b5-b4
-- FCLKSEL[1:0]
b6
--
b7
FLTEN
R/W
IRQi
b1 b0
0 0
R/W
0 1
1 0
1 1Low
0 0 R/W
IRQi b5 b4
R/W
0 0PCLKB
0 1PCLKB/8
1 0PCLKB/32
1 1PCLKB/64
0 0 R/W
IRQi
0
R/W
1
IRQCRi
CPU DTC IRQCRi IELSRn n = 0 31 IELSRn 0000h
DMAC IRQCRi DELSRnn = 0 3 DELSRn.DELS[7:0] 00h
IRQCRi WUPEN.IRQWUPENn n = 0 4, 6, 7, 9, 11, 14, 15 WUPEN.IRQWUPENn 0
IRQMD[1:0] IRQi
IRQi 14.4.4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 250 of 1551
RA4W1
14. ICU
FCLKSEL[1:0] IRQi
IRQi
PCLKB
PCLKB/88 1
PCLKB/3232 1
PCLKB/6464 1
14.4.3
FLTEN IRQi
IRQi IRQCRi.FLTEN 1 IRQCRi.FLTEN 0 IRQi IRQCRi.FCLKSEL[1:0] 3 14.4.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 251 of 1551
RA4W1
14. ICU
14.2.2 NMISR
ICU.NMISR 4000 6140h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
SPEST
BUSMS BUSSS
T
T
RECCS T
RPEST
NMIST
OSTST
--
VBATT ST
--
LVD1S T
WDTST
IWDTS T
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
IWDTST IWDT
0
R
1
b1
WDTST WDT
0
R
1
b2
LVD1ST 1
0
R
1
b3
--
0
R
b4
VBATTST VBATT
0
R
1
b5
--
0
R
b6
OSTST 0
R
1
b7
NMIST
NMI
0NMI
R
1NMI
b8
RPEST SRAM 0
R
1
b9
RECCST SRAM ECC 0
R
1
b10
BUSSST MPU 0
R
1
b11
BUSMST MPU 0
R
1
b12
SPEST CPU 0
R
1
b15-b13 --
0
R
NMISR NMISR NMIER 0 NMI
IWDTST IWDT
IWDT NMICLR.IWDTCLR
1
IWDT
0
NMICLR.IWDTCLR 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 252 of 1551
RA4W1
14. ICU
WDTST WDT WDT
NMICLR.WDTCLR 1 WDT 0 NMICLR.WDTCLR 1
LVD1ST 1 1 NMICLR.LVD1CLR
1 1 0 NMICLR.LVD1CLR 1
VBATTST VBATT VBATT NMICLR.VBATTCLR
1 VBATT 0 NMICLR.VBATTCLR 1
OSTST NMICLR.OSTCLR
1 0 NMICLR.OSTCLR 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 253 of 1551
RA4W1
14. ICU
NMIST NMI NMI NMICLR.NMICLR
1 NMICR.NMIMD NMI 0 NMICLR.NMICLR 1
RPEST SRAM SRAM 1 SRAM
0 NMICLR.RPECLR 1
RECCST SRAM ECC SRAM ECC
1 SRAM ECC 0 NMICLR.RECCCLR 1
BUSSST MPU
1 0 NMICLR.BUSSCLR 1
BUSMST MPU 1 0 NMICLR.BUSMCLR 1
SPEST CPU CPU 1 CPU 0 NMICLR.SPECLR 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 254 of 1551
RA4W1
14. ICU
14.2.3 NMIER
ICU.NMIER 4000 6120h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
SPEEN
BUSME N
BUSSE N
RECCE N
RPEEN
NMIEN
OSTEN
--
VBATT EN
--
LVD1E WDTE IWDTE
N
N
N
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
IWDTEN
IWDT
0 1
b1
WDTEN
WDT 0
1
b2
LVD1EN 1
0 1
b3
b4
VBATTEN VBATT
0 0
0 1
b5
b6
OSTEN
0 0
0 1
b7
NMIEN
NMI
0 1
b8
RPEEN
SRAM
0
1
b9
RECCEN SRAM ECC
0
1
b10
BUSSEN MPU 0
1
b11
BUSMEN MPU
0
1
b12
SPEEN
CPU 0
1
b15-b13
0 0
1. 2.
1 1 0 1
R/W
R/(W)
1 2
R/(W)
1 2
R/(W)
1 2
R/W
R/(W)
1 2
R/W
R/(W)
1 2
R/(W)
1
R/(W)
1 2
R/(W)
1 2
R/(W)
1 2
R/(W)
1 2
R/(W)
1 2
R/W
IWDTEN IWDT NMI IWDT
WDTEN WDT NMI WDT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 255 of 1551
RA4W1
14. ICU
LVD1EN 1 NMI 1
VBATTEN VBATT NMI VBATT
OSTEN NMI
NMIEN NMI NMI NMI
RPEEN SRAM NMI SRAM
RECCEN SRAM ECC NMI SRAM ECC
BUSSEN MPU NMI
BUSMEN MPU NMI
SPEEN CPU NMI CPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 256 of 1551
RA4W1
14. ICU
14.2.4 NMICLR
ICU.NMICLR 4000 6130h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
SPECL BUSM BUSSC RECCC RPECL NMICL OSTCL
R
CLR LR
LR
R
R
R
--
VBATT CLR
--
LVD1C WDTCL IWDTC
LR
R
LR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b15-b13
IWDTCLR WDTCLR LVD1CLR -- VBATTCLR -- OSTCLR NMICLR RPECLR RECCCLR BUSSCLR BUSMCLR SPECLR --
IWDT WDT LVD1
VBATT
OST NMI SRAM SRAM ECC
CPU
0 1NMISR.IWDTST
0 1NMISR.WDTST
0 1NMISR.LVD1ST
0 0
0 1NMISR.VBATTST
0 0
0 1NMISR.OSTST
0 1NMISR.NMIST
0 1NMISR.RPEST
0 1NMISR.RECCST
0 1NMISR.BUSSST
0 1NMISR.BUSMST
0 1NMISR.SPEST
0 0
1. 1
R/W
R/(W)
1
R/(W)
1
R/(W)
1
R/W
R/(W)
1
R/W
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/W
IWDTCLR IWDT 1 NMISR.IWDTST 0
WDTCLR WDT 1 NMISR.WDTST 0
LVD1CLR LVD1 1 NMISR.LVD1ST 0
VBATTCLR VBATT 1 NMISR.VBATTST 0
OSTCLR OST 1 NMISR.OSTST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 257 of 1551
RA4W1
14. ICU
NMICLR NMI 1 NMISR.NMIST 0
RPECLR SRAM 1 NMISR.RPEST 0
RECCCLR SRAM ECC 1 NMISR.RECCST 0
BUSSCLR 1 NMISR.BUSSST 0
BUSMCLR 1 NMISR.BUSMSST 0
SPECLR CPU 1 NMISR.SPEST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 258 of 1551
RA4W1
14. ICU
14.2.5 NMI NMICR
ICU.NMICR 4000 6100h
b7
b6
b5
b4
b3
b2
b1
b0
NFLTE N
--
NFCLKSEL[1:0]
--
--
-- NMIMD
0
0
0
0
0
0
0
0
R/W
b0
NMIMD
NMI
0
R/W
1
b3-b1
--
0 0 R/W
b5-b4
NFCLKSEL[1:0] NMI b5 b4
R/W
0 0PCLKB
0 1PCLKB/8
1 0PCLKB/32
1 1PCLKB/64
b6
--
0 0 R/W
b7
NFLTEN
NMI
0
R/W
1
NMICR NMI NMIER.NMIEN 1
NMIMD NMI NMI
NFCLKSEL[1:0] NMI NMI PCLKB
PCLKB/88 1
PCLKB/3232 1
PCLKB/6464 1
14.4.3
NFLTEN NMI NMI NFLTEN 1
NFLTEN 0 NMI NMIFLTC.NFCLKSEL[1:0] 3 14.4.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 259 of 1551
RA4W1
14. ICU
14.2.6 ICU nIELSRn
ICU.IELSR0 4000 6300h, ICU.IELSR1 4000 6304h, ICU.IELSR2 4000 6308h, ICU.IELSR3 4000 630Ch...... ......ICU.IELSR28 4000 6370h, ICU.IELSR29 4000 6374h, ICU.IELSR30 4000 6378h, ICU.IELSR31 4000 637Ch
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
-- DTCE --
--
--
--
--
--
--
IR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
IELS[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b7-b0
b15-b8 b16 b23-b17 b24 b31-b25
IELS[7:0]
-- IR -- DTCE --
ICU
DTC
b7
b0
00000000
NVIC DTC
00000001 11011001
14.4
0 0
0 1
0 0
0DTC 1DTC
0 0
R/W R/W
R/W R/(W)
1
R/W R/W
R/W
. .
1.
Bluetooth IELSR31 IELSR31 IR 1
IELSRn NVIC IRQ 14.4 IELSRnn = 0 31NVIC IRQ 0 31
IELS[7:0] ICU NVIC/DTC
IR IELS[7:0] 1 IRQi 0 0 DTCE 0 IR 0 IR
1. 2. 1 2 3. 0 IR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 260 of 1551
RA4W1
14. ICU
DTCE DTC DTCE 1 DTC 1 1 0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 261 of 1551
RA4W1
14. ICU
14.2.7 DMAC nDELSRn
ICU.DELSR0 4000 6280h, ICU.DELSR1 DELSR1, ICU.DELSR2 4000 6288h, ICU.DELSR3 4000 628Ch
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
IR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
DELS[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b7-b0
b15-b8 b16 b31-b17
DELS[7:0] DMAC
--
IR
DMAC
--
b7
b0
00000000
DMAC
DMA
0000000111011001
14.4
0 0
0 1
0 0
R/W R/W
R/W R/W
1
R/W
. 1.
IR 1
DELS[7:0] DMAC DMAC
IR DMAC DMA DELS[7:0]
1 IRQi DMA 1
0 0 DMA DMA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 262 of 1551
RA4W1
14. ICU
14.2.8 SYS SELSR0
ICU.SELSR0 4000 6200h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
SELS[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b7-b0
SELS[7:0]
SYS
b15-b8
--
R/W
b7
b0
00000000
R/W
0000000111011001
14.4
0 0
R/W
SELSR0 CPU 14.4 SELSR0 14.4 ICU_SNZCANCEL017h IELSRn.IELS 017h SELSR0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 263 of 1551
RA4W1
14. ICU
14.2.9 WUPEN
ICU.WUPEN 4000 61A0h
b31 b30 b29 b28 b27
IIC0WU AGT1CB AGT1CA AGT1UD USBFS PEN WUPEN WUPEN WUPEN WUPEN
0
0
0
0
0
b26 b25 b24 b23 b22
--
RTCPRD RTCALM ACMPLP WUPEN WUPEN 0WUPEN
--
0
0
0
0
0
b15 b14 b13 b12 b11 b10
0
0
0
0
0
0
b9
b8
b7
b6
IRQWUPEN[15:0]
0
0
0
0
b21 b20 b19 b18 b17 b16
--
VBATTW UPEN
--
LVD1WU KEYWU IWDTW PEN PEN UPEN
0
0
0
0
0
0
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
R/W
b15-b0 IRQWUPEN[15:0] IRQ 0IRQ
R/W
1IRQ
b16
IWDTWUPEN
IWDT 0IWDT R/W
1IWDT
b17
KEYWUPEN
0
R/W
1
b18
LVD1WUPEN
LVD1 0LVD1 R/W
1LVD1
b19
--
0 0
R/W
b20
VBATTWUPEN
VBATT 0VBATT
R/W
1VBATT
b22-b21 --
0 0
R/W
b23
ACMPLP0WUPEN ACMPLP0
0ACMPLP0
R/W
1ACMPLP0
b24
RTCALMWUPEN RTC 0RTC
R/W
1RTC
b25
RTCPRDWUPEN RTC 0RTC
R/W
1RTC
b26
--
0 0
R/W
b27
USBFSWUPEN
USBFS 0USBFS R/W
1USBFS
b28
AGT1UDWUPEN AGT1 0AGT1
R/W
1AGT1
b29
AGT1CAWUPEN AGT1 A 0AGT1A
R/W
1AGT1 A
b30
AGT1CBWUPEN AGT1 B 0AGT1B
R/W
1AGT1 B
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 264 of 1551
RA4W1
14. ICU
b31
IIC0WUPEN
R/W
IIC0 0IIC0 R/W
1IIC0
CPU
IRQWUPEN[15:0] IRQ IRQn 0 4, 6, 7, 9, 11, 14,
15 IWDTWUPEN IWDT
IWDT KEYWUPEN
LVD1WUPEN LVD1
LVD1 VBATTWUPEN VBATT
VBATT ACMPLP0WUPEN ACMPLP0
ACMPLP0 RTCALMWUPEN RTC
RTC RTCPRDWUPEN RTC
RTC USBFSWUPEN USBFS
USBFS AGT1UDWUPEN AGT1
AGT1 AGT1CAWUPEN AGT1 A
AGT1 A AGT1CBWUPEN AGT1 B
AGT1 B IIC0WUPEN IIC0
IIC0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 265 of 1551
RA4W1
14. ICU
14.3
ICU Arm NVIC ARM� Cortex�-M4 Processor Technical Reference Manual (ARM DDI 0439D) NVIC
14.3.1
14.3 NVIC
14.3
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
(1/2)
IRQ -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
000h 004h 008h 00Ch 010h 014h 018h 01Ch 020h 024h 028h 02Ch 030h 034h 038h
Arm Arm Arm Arm Arm Arm Arm Arm Arm Arm Arm Arm Arm Arm Arm
15
--
03Ch
16
0
040h
17
1
044h
18
2
048h
19
3
04Ch
20
4
050h
21
5
054h
22
6
058h
23
7
05Ch
24
8
060h
25
9
064h
26
10
068h
27
11
06Ch
28
12
070h
29
13
074h
30
14
078h
31
15
07Ch
32
16
080h
33
17
084h
34
18
088h
35
19
08Ch
Arm ICU.IELSR0 ICU.IELSR1 ICU.IELSR2 ICU.IELSR3 ICU.IELSR4 ICU.IELSR5 ICU.IELSR6 ICU.IELSR7 ICU.IELSR8 ICU.IELSR9 ICU.IELSR10 ICU.IELSR11 ICU.IELSR12 ICU.IELSR13 ICU.IELSR14 ICU.IELSR15 ICU.IELSR16 ICU.IELSR17 ICU.IELSR18 ICU.IELSR19
R01UH0883JJ0100 Rev.1.00 2020.08.31
NMI MemManage SVCall PendableSrvReq SysTick ICU.IELSR0 ICU.IELSR1 ICU.IELSR2 ICU.IELSR3 ICU.IELSR4 ICU.IELSR5 ICU.IELSR6 ICU.IELSR7 ICU.IELSR8 ICU.IELSR9 ICU.IELSR10 ICU.IELSR11 ICU.IELSR12 ICU.IELSR13 ICU.IELSR14 ICU.IELSR15 ICU.IELSR16 ICU.IELSR17 ICU.IELSR18 ICU.IELSR19
Page 266 of 1551
RA4W1
14.3
36 37 38 39 40 41 42 43 44 45 46 47
(2/2)
IRQ 20
090h
21
094h
22
098h
23
09Ch
24
0A0h
25
0A4h
26
0A8h
27
0ACh
28
0B0h
29
0B4h
30
0B8h
31
0BCh
ICU.IELSR20 ICU.IELSR21 ICU.IELSR22 ICU.IELSR23 ICU.IELSR24 ICU.IELSR25 ICU.IELSR26 ICU.IELSR27 ICU.IELSR28 ICU.IELSR29 ICU.IELSR30 ICU.IELSR31
14. ICU
ICU.IELSR20 ICU.IELSR21 ICU.IELSR22 ICU.IELSR23 ICU.IELSR24 ICU.IELSR25 ICU.IELSR26 ICU.IELSR27 ICU.IELSR28 ICU.IELSR29 ICU.IELSR30 ICU.IELSR31
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 267 of 1551
RA4W1
14. ICU
14.3.2
14.4
NVIC DTC DMAC
NMI CPU IELSRn DTCIELSRn DMAC DELSRn SELSR0
14.4
(1/5)
001h 002h 003h 004h 005h 007h 008h 009h 00Ah 00Ch 00Fh 010h 011h 012h 013h 014h 015h 017h 018h 019h 01Bh 01Ch 01Dh 01Eh 01Fh 020h
BLE
DMAC0 DMAC1 DMAC2 DMAC3 DTC ICU FCU LVD VBATT MOSC AGT0
PORT_IRQ0 PORT_IRQ1 PORT_IRQ2 PORT_IRQ3 PORT_IRQ4 PORT_IRQ6 PORT_IRQ7 BLEIRQ 5 PORT_IRQ9 PORT_IRQ11 PORT_IRQ14 PORT_IRQ15 DMAC0_INT DMAC1_INT DMAC2_INT DMAC3_INT DTC_COMPLETE ICU_SNZCANCEL FCU_FRDYI LVD_LVD1 VBATT_LVD MOSC_STOP SYSTEM_SNZREQ AGT0_AGTI AGT0_AGTCMAI AGT0_AGTCMBI
IELSRn
NVIC DTC
DELSRn DMAC
4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 268 of 1551
RA4W1
14.4
(2/5)
021h 022h 023h 024h 025h 026h 027h 028h 029h 02Ah 02Bh 02Ch 02Dh 02Eh 02Fh 030h 031h 032h 033h 034h 035h 036h 037h 038h 039h 03Ah 03Bh 03Ch 03Dh 046h 047h 048h 049h 04Ah 04Bh 04Ch 04Dh 04Eh 04Fh 050h 051h 052h
AGT1 IWDT WDT RTC ADC140
ACMPLP USBFS
IIC0
IIC1
CTSU KINT DOC CAC CAN0
AGT1_AGTI AGT1_AGTCMAI AGT1_AGTCMBI IWDT_NMIUNDF WDT_NMIUNDF RTC_ALM RTC_PRD RTC_CUP ADC140_ADI ADC140_GBADI ADC140_CMPAI ADC140_CMPBI ADC140_WCMPM ADC140_WCMPUM ACMP_LP0 ACMP_LP1 USBFS_D0FIFO USBFS_D1FIFO USBFS_USBI USBFS_USBR IIC0_RXI IIC0_TXI IIC0_TEI IIC0_EEI IIC0_WUI IIC1_RXI IIC1_TXI IIC1_TEI IIC1_EEI CTSU_CTSUWR CTSU_CTSURD CTSU_CTSUFN KEY_INTKR DOC_DOPCI CAC_FERRI CAC_MENDI CAC_OVFI CAN0_ERS CAN0_RXF CAN0_TXF CAN0_RXM CAN0_TXM
14. ICU
IELSRn
NVIC DTC
DELSRn DMAC
4
4
4 1 4
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 269 of 1551
RA4W1
14.4
(3/5)
053h 054h 055h 056h 057h 058h 059h 05Ah 05Bh 05Ch 05Dh 05Eh 05Fh 060h 061h 062h 063h 064h 065h 066h 067h 068h 069h 06Ah 06Bh 06Ch 06Dh 06Eh 06Fh 070h 071h 072h 073h 074h 075h 076h 077h 078h 079h 07Ah
I/O ELC POEG GPT320
GPT321
GPT322
GPT323
IOPORT_GROUP1 IOPORT_GROUP2 IOPORT_GROUP3 IOPORT_GROUP4 ELC_SWEVT0 ELC_SWEVT1 POEG_GROUP0 POEG_GROUP1 GPT0_CCMPA GPT0_CCMPB GPT0_CMPC GPT0_CMPD GPT0_CMPE GPT0_CMPF GPT0_OVF GPT0_UDF GPT1_CCMPA GPT1_CCMPB GPT1_CMPC GPT1_CMPD GPT1_CMPE GPT1_CMPF GPT1_OVF GPT1_UDF GPT2_CCMPA GPT2_CCMPB GPT2_CMPC GPT2_CMPD GPT2_CMPE GPT2_CMPF GPT2_OVF GPT2_UDF GPT3_CCMPA GPT3_CCMPB GPT3_CMPC GPT3_CMPD GPT3_CMPE GPT3_CMPF GPT3_OVF GPT3_UDF
14. ICU
IELSRn
NVIC DTC
2
2
2
2
3
3
DELSRn DMAC 2 2 2 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 270 of 1551
RA4W1
14.4
(4/5)
07Bh 07Ch 07Dh 07Eh 07Fh 080h 081h 082h 083h 084h 085h 086h 087h 088h 089h 08Ah 09Bh 09Ch 09Dh 09Eh 09Fh 0A0h 0A1h 0A2h 0ABh 0ACh 0ADh 0AEh 0AFh 0B0h 0B1h 0B2h 0B3h 0B4h 0B5h 0B6h 0C1h 0C2h 0C3h 0C4h 0C5h
GPT164
GPT165
GPT168
GPT SCI0 SCI1 SCI4
GPT4_CCMPA GPT4_CCMPB GPT4_CMPC GPT4_CMPD GPT4_CMPE GPT4_CMPF GPT4_OVF GPT4_UDF GPT5_CCMPA GPT5_CCMPB GPT5_CMPC GPT5_CMPD GPT5_CMPE GPT5_CMPF GPT5_OVF GPT5_UDF GPT8_CCMPA GPT8_CCMPB GPT8_CMPC GPT8_CMPD GPT8_CMPE GPT8_CMPF GPT8_OVF GPT8_UDF GPT_UVWEDGE SCI0_RXI SCI0_TXI SCI0_TEI SCI0_ERI SCI0_AM SCI0_RXI_OR_ERI SCI1_RXI SCI1_TXI SCI1_TEI SCI1_ERI SCI1_AM SCI4_RXI SCI4_TXI SCI4_TEI SCI4_ERI SCI4_AM
14. ICU
IELSRn
NVIC DTC
DELSRn DMAC
4 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 271 of 1551
RA4W1
14. ICU
14.4
(5/5)
IELSRn NVIC DTC
DELSRn DMAC
0C6h
SCI9
SCI9_RXI
0C7h
SCI9_TXI
0C8h
SCI9_TEI
0C9h
SCI9_ERI
0CAh
SCI9_AM
0CBh SPI0
SPI0_SPRI
0CCh
SPI0_SPTI
0CDh
SPI0_SPII
0CEh
SPI0_SPEI
0CFh
SPI0_SPTEND
0D0h
SPI1
SPI1_SPRI
0D1h
SPI1_SPTI
0D2h
SPI1_SPII
0D3h
SPI1_SPEI
0D4h
SPI1_SPTEND
1. 2. 3. 4. 5.
KRCTL.KRMD = 1
DTC SELSR0 Bluetooth BLEIRQ
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 272 of 1551
RA4W1
14. ICU
14.4
ICU
CPU DTC DMAC
14.4.1
Low IRQi IRQCRi IRQMD[1:0] 14.3.2 CPU NVIC
ICU
IELSRn
IR
CPUNVIC
14.2
ICU CPU: NVIC
IELSRn.IR NVIC
IELSRn.IR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 273 of 1551
RA4W1
14. ICU
1 2 IELSRn.IELS 3
1 2 IELSRn.IELS IELSRn.IELS[7:0] = 000hIELSRn.IR
3
1 2 IELSRn.IELS 3 4 5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 274 of 1551
RA4W1
14. ICU
14.4.2
CPUDTC DMAC 14.4 . 14.4
1 IELSRn CPU DTC IELSRn 1 DELSRn DMAC DELSRn . IELSRn DELSRn
DMAC DTC IRQi IRQCRi IRQMD[1:0]
14.4.2.1 CPU
IELSRn.DTCE = 0 IELSRn NVIC IELSRn.IELS IELSRn.DTCE 0
14.4.2.2 DTC
IELSRn.DTCE = 1 IELSRn DTC DTC 1. IELSRn.IELS IELSRn.DTCE 1 2. DTC DTCST.DTCST 1
DTC 14.5
14.5
DTC 3
DTC
DISEL
1
1
0
0
= 0
0
1
DTC CPU
DTC CPU DTC
= 0
DTC CPU
IR 2 CPU
CPU
DTC DTC
CPU
DTC
IELSRn.DTCE CPU DTC
IELSRn.DTCE CPU
1. 2. 3.
DTC.MRB.DISEL DTC IELSRn.IR 1 DTC DTC DISEL CPU IESRn.IR 18.DTC 18.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 275 of 1551
RA4W1
14. ICU
14.4.2.3 DMAC
IELSRn.DTCE = 0 IELSRn NVIC DMAC 1. DELSRn.DELS[7:0] 2. IELSRn.IELS IELSRn.DTCE 1 3. DMAC DMACm.DMTMD.DCTG[1:0] 01b
4. DMAC DMAC DMACm.DMCNT.DTE 1 5. DMAC DMAST.DMST 1
ICU
No.1720 011h014h
IELSRn
IR IR IR
IR IR
DELSRn DMAC
CPU
N V I C
DMAC
DMAC DMAC
DMAC
14.3
DMAC
DMAC
14.4.3
IRQii = 0 4, 6, 7, 9, 11, 14, 15 NMI PCLKB 3
IRQi
1 IRQCRi.FCLKSEL[1:0] i = 0 4, 6, 7, 9, 11, 14, 15 PCLKB PCLKB/8PCLKB/32 PCLKB/64
2 IRQCRi.FLTEN i = 0 4, 6, 7, 9, 11, 14, 15 1
NMI
1 NMICR.NFCLKSEL[1:0] PCLKBPCLKB/8PCLKB/32 PCLKB/64
2 NMICR.NFLTEN 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 276 of 1551
RA4W1 14.4
14. ICU
IRQCRi.FLTEN1
IRQi1
3
IRQi_d1 F/F
IRQCRi.IRQMD[1:0] = 11bLow
1. i = 0 4, 6, 7, 9, 11, 14, 15
3
14.4
IRQCRi.FLTEN NMICR.NFLTEN ICU
14.4.4
1. IRQCRi.FLTEN i = 0 4, 6, 7, 9, 11, 14, 15 0 2. I/O 3. IRQCRi IRQMD[1:0] FCLKSEL[1:0] FLTEN 4. IRQ
IRQ CPU IELSRn.IELS[7:0] IELSRn.DTCE 0
IRQ DTC IELSRn.IELS[7:0] IELSRn.DTCE 1
IRQ DMAC DELSRn.DELS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 277 of 1551
RA4W1
14. ICU
14.5
NMI
WDT
IWDT
1
VBATT
SRAM
SRAM ECC
MPU
MPU
CPU
CPU DTC DMAC NMISRNMI NMISR 0
NMI 1 3 1. NMICR.NFLTEN 0 2. NMICR NMIMD NFCLKSEL[1:0] NFLTEN 3. NMICLR.NMICLR 1 NMISR.NMIST 0 4. NMIER 1
NMIER 1 NMIER NMIEN NMI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 278 of 1551
RA4W1
14. ICU
14.6
14.411. 14.6.1 14.6.3
14.6.1
1. CPU 2. NVIC
NMIER
14.6.2
ICU WUPEN 14.2.9 WUPEN
1. NMIER
WUPEN
2. CPU 3. NVIC
IRQ
14.6.3
ICU
1.
a. SELSR0.SEL IELSRn.IELS 017hICU_SNZCANCEL
b. IELSRn.IELS 2. CPU 3. NVIC
. ICU IELSRn CPU DELSRn DMAC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 279 of 1551
RA4W1
14. ICU
14.7 WFI
WFI NMISR 0
14.8
ARM� Cortex�-M4 Processor Technical Reference Manual (ARM DDI 0439D)
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 280 of 1551
RA4W1
15.
15.
15.1
15.1 15.1 15.2
15.1
ICode CPU
DCode CPU
CPU
DMA
1 3 4 1 3
4 5
1.
7 9
P/E =
CPU CPU CPU DMAC/DTC
DMA SRAM0
CAC, ELC, I/O, POEG, RTC, WDT, IWDT, IIC, CAN, ADC14,
DAC12, DOC SCI, SPI, CRC, GPT KINT, AGT, USBFS, OPAMP, ACMPLP, DAC8, SLCDC, CTSU
IP P/E1
Icode Dcode
CM4
DMAC/ DTC
DMA
15.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
SRAM0
Page 281 of 1551
RA4W1
15.2
0000 0000h01FF FFFFh 2000 0000h2001 7FFFh 4000 0000h4001 FFFFh 4004 0000h4005 FFFFh 4006 0000h4007 FFFFh 4008 0000h4009 FFFFh 400C 0000h400D FFFFh 4010 0000h407F FFFFh
13 4 1 3 4 5 7 9
1. P/E =
15.
SRAM0 I/O
IP P/E 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 282 of 1551
RA4W1
15.
15.2
15.2.1
CPU ICode DCode ICode DCode ICode CPU
DCode CPU
SRAM0CPU
CPU DMA DMA SRAM0
DMAC DTC DMAC DTC DMA
DMAC0 DMAC1 DMAC2 DMAC3 DTC DTC DMAC DTC DTC
15.2.2
Cortex�-M4 ICode DCode ICode DCode ICode DCode 3 SRAM0 DMA 15.1
ICode DCode 3 ICode DCode 15.3.2 BUSSCNT<slave>
DMA 15.3.2 BUSSCNT<slave>
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 283 of 1551
RA4W1
15.
15.2.3
CPU SRAM DMAC
15.2 CPU SRAM CPU SRAM DMAC/DTC DMA
CPU CPU DMAC
SRAM
SRAM
SRAM SRAM SRAM SRAM
SRAM
SRAM
15.2
15.2.4
Cortex�-M4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 284 of 1551
RA4W1
15.
15.3 15.3.1 BUSMCNT<master>
BUS.BUSMCNTM4I 4000 4000h, BUS.BUSMCNTM4D 4000 4004h, BUS.BUSMCNTSYS 4000 4008h, BUS.BUSMCNTDMA 4000 400Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
IERES --
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b14-b0 b15
-- IERES
R/W
0 0 R/W
0
R/W
1
.
0
IERES AHB-Lite 15.3
15.3
ICode CPU DCode CPU CPU DMA 1 3 4 1, 3, 4, 5, 7
9
BUSMCNTM4I BUSMCNTM4D BUSMCNTSYS BUSMCNTDMA -- -- -- --
--
-- -- -- -- BUSSCNTFLI BUSSCNTMBIU BUSSCNTRAM0 BUSSCNTPnB [n = 0, 2, 3, 4, 6] BUSSCNTFBU
BUS1ERRADD BUS2ERRADD BUS3ERRADD BUS4ERRADD -- -- -- --
--
BUS1ERRSTAT BUS2ERRSTAT BUS3ERRSTAT BUS4ERRSTAT -- -- -- --
--
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 285 of 1551
RA4W1
15.
15.3.2 BUSSCNT<slave>
BUS.BUSSCNTFLI 4000 4100h, BUS.BUSSCNTMBIU 4000 4108h, BUS.BUSSCNTRAM0 4000 410Ch, BUS.BUSSCNTP0B 4000 4114h, BUS.BUSSCNTP2B 4000 4118h, BUS.BUSSCNTP3B 4000 411Ch, BUS.BUSSCNTP4B 4000 4120h, BUS.BUSSCNTP6B 4000 4128h, BUS.BUSSCNTFBU 4000 4130h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
-- ARBMET[1:0] --
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b3-b0 b5-b4
-- ARBMET[1:0]
b15-b6
--
R/W
0 0
R/W
R/W
b5 b4
0 0
0 1
1 0
1 1
0 0
R/W
.
0
ARBMET[1:0]
15.4 15.5
15.3
15.4
ARBMET = 00b
BUSSCNTFLI
1
BUSSCNTRAM0 BUSSCNTPnB [n = 0, 2, 3, 4, 6] BUSSCNTFBU
4 1, 3, 4, 5, 7 9
3 DCode CPU ICode CPU DMA CPU DMA CPU DMA CPU
15.5
ARBMET = 01b
BUSSCNTFLI
1
BUSSCNTRAM0 BUSSCNTPnB [n = 0, 2, 3, 4, 6] BUSSCNTFBU
4 1, 3, 4, 5, 7 9
"" 3 DCode CPU ICode CPU DMA CPU DMA CPU DMA CPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 286 of 1551
RA4W1
15.
15.3.3 BUSnERRADD(n = 1 4)
BUS.BUS1ERRADD 4000 4800h, BUS.BUS2ERRADD 4000 4810h, BUS.BUS3ERRADD 4000 4820h, BUS.BUS4ERRADD 4000 4830h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
BERAD[31:16]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
BERAD[15:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b31-b0
BERAD[31:0]
R/W
R
.
MPU 6.16.
MPU
15.3
BERAD[31:0]
BUSnERRSTAT.ERRSTAT 15.4 BUSnERRADDn.BERAD[31:0] n = 1 4BUSnERRSTAT.ERRSTAT n = 1 4 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 287 of 1551
RA4W1
15.3.4 BUSnERRSTAT(n = 1 4)
BUS.BUS1ERRSTAT 4000 4804h, BUS.BUS2ERRSTAT 4000 4814h, BUS.BUS3ERRSTAT 4000 4824h, BUS.BUS4ERRSTAT 4000 4834h
b7
b6
b5
b4
b3
b2
b1
b0
ERRST AT
--
--
--
--
--
--
ACCST AT
0
0
0
0
0
0
0
0
15.
R/W
b0
ACCSTAT
R
1
0
b6-b1
--
0
R
b7
ERRSTAT
0
R
1
.
MPU 6.16.
MPU
15.3
ACCSTAT
BUSnERRSTAT.ERRSTAT 15.4
BUSnERRSTAT.ERRSTAT n = 1 4 1
ERRSTAT
BUSnERRSTAT.ERRSTAT n = 1 4 1
4
MPU
MPU
MPU MPU OAD MPU BUSnERRSTAT.ERRSTATn = 1 4 1
MPU MPU OAD MPU BUSnERRSTAT.ERRSTATn = 1 4 1
15.416. MPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 288 of 1551
RA4W1
15.
15.4
AHB-Lite IP
15.4.1
4
MPU
MPU
15.6 MPU MPU 16.MPU
15.4.2
IP BUSnERRADD BUSnERRSTAT 15.3.3 15.3.4
. DMAC DTC DMAC DTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 289 of 1551
RA4W1
15.
15.4.3
15.6
15.6
0000 0000h01FF FFFFh
0200 0000h027F FFFFh 0280 0000h1FFF FFFFh 2000 0000h2001 7FFFh 2001 8000h3FFF FFFFh 4000 0000h4001 FFFFh 4002 0000h4003 FFFFh 4004 0000h4005 FFFFh 4006 0000h4007 FFFFh 4008 0000h4009 FFFFh 400A 0000h400B FFFFh 400C 0000h400D FFFFh 400E 0000h400F FFFFh 4010 0000h407F FFFFh 4080 0000h5FFF FFFFh 6000 0000h67FF FFFFh 6800 0000h7FFF FFFFh 8000 0000h97FF FFFFh 9800 0000hDFFF FFFFh E000 0000hFFFF FFFFh
1 3 4 1 3 4 5 7 9 Cortex-M4
CPUICode DCode
--
1
E -- E -- E -- -- -- -- -- E -- E -- E -- E --
DMA --
E E -- E -- E -- -- -- -- -- E -- E -- E -- E E
E
"--"
.
MMF0200 0000h 027F FFFFh
MMF = CPU +
MMF MMF CPU
0200 0000h MMF
CPU 0200 0000h
1. 2.
MMF MMF CPU 0200 0000h MMF CPU 0200 0000h
0280 0000h 1FFF FFFFh 0000 0000h 01FF FFFFh 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 290 of 1551
RA4W1
15.
15.4.4
AHB-Lite IP
15.5
CPU Arm� MPU 1. 2.
15.6
1. ARM� v7-M Architecture Reference Manual (ARM DDI 0403D) 2. ARM� Cortex�-M4 Devices Generic User Guide (ARM DUI 0553A) 3. ARM� AMBA3 AHB-Lite Protocol v1.0 Specification (ARM IHI 0033A)
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 291 of 1551
RA4W1
16. MPU
16. MPU
16.1
MCU 4 MPUCPU 16.1 MPU 16.2 MPU
16.1
MPU
Arm� Cortex�-M4 CPU
CPU
Arm MPU
MPU
MPU MPU
Arm CPUCPU
MPU
2 MSP PSP
CPU 8 MPU
CPU MPUA16
2PC 4SRAM2
16.2
MPU
MPU
CPU Arm MPU
MPU
MPU MPU
Don't care
0
Cortex-M4
Arm MPU 16.7 MPU 15. 15.3.3BUSnERRADD(n = 1 4) 15.3.4BUSnERRSTAT(n = 1 4)
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 292 of 1551
RA4W1
16. MPU
16.2 CPU
CPU Arm CPU MSPPSP 2 2 CPU CPU CPU MSPMPUCTLPSPMPUCTL 1
16.3 CPU 16.1 CPU 16.2
16.3
CPU
SRAM
2 MSP PSP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 293 of 1551
RA4W1
16. MPU
CPU
R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 (SP) R14 (LR) R15 (PC) xPSR
PSP MSP
CPU
OAD
OAD
16.1
CPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 294 of 1551
RA4W1
16. MPU
(MSP) PSP
MSPMPUSAMSPMPUEA PSPMPUSAPSPMPUEA
MSPMPUCTLPSPMPUCTL MSPMPUOADPSPMPUOAD
MSPMPUPTPSPMPUPT
16.2
16.2.1
CPU MSPMPUPT PSPMPUPT PROTECT
16.2.2
CPU OAD
ICU.NMISR.SPEST 14. ICU SYSTEM.RSTSR1.SPERF 6.ICU.NMISR.SPEST CPU MSPMPUCTL PSPMPUCTL ERROR
ICU.NMICLR.SPECLR 1 MSPMPUCTL PSPMPUCTL ERROR 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 295 of 1551
RA4W1
16. MPU
16.2.3
. MPU
16.2.3.1 MSP MSPMPUSA
SPMON.MSPMPUSA 4000 0D08h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
MSPMPUSA[31:16]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
MSPMPUSA[15:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
x
b31-b0 MSPMPUSA[31:0]
R/W
R/W
2 0
2000 0000h200F FFFCh
MSPMPUSA MSPMPUEA SRAM CPU 2000 0000h 200F FFFFh SRAM 4.1
16.2.3.2 MSP MSPMPUEA
SPMON.MSPMPUEA 4000 0D0Ch
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
MSPMPUEA[31:16]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
MSPMPUEA[15:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
1
1
x
b31-b0 MSPMPUEA[31:0]
R/W
R/W
2 1
2000 0003h200F FFFFh
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 296 of 1551
RA4W1
16. MPU
16.2.3.3 PSP PSPMPUSA
SPMON.PSPMPUSA 4000 0D18h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
PSPMPUSA[31:16]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
PSPMPUSA[15:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
x
b31-b0 PSPMPUSA[31:0]
R/W
R/W
2 0
2000 0000h200F FFFCh
PSPMPUSA PSPMPUEA SRAM CPU 2000 0000h 200F FFFFh SRAM 4.1
16.2.3.4 PSP PSPMPUEA
SPMON.PSPMPUEA 4000 0D1Ch
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
PSPMPUEA[31:16]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
PSPMPUEA[15:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
1
1
x
b31-b0 PSPMPUEA[31:0]
R/W
R/W
2 1
2000 0003h200F FFFFh
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 297 of 1551
RA4W1
16. MPU
16.2.3.5
MSPMPUOAD, PSPMPUOAD
SPMON.MSPMPUOAD 4000 0D00h, SPMON.PSPMPUOAD 4000 0D10h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
KEY[7:0]
--
--
--
--
--
--
-- OAD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
OAD
b7-b1 b15-b8
-- KEY[7:0]
0 1 0 0 OAD
R/W R/W
R/W R/(W
1
1.
OAD
CPU OAD OAD KEY[7:0] A5h
KEY[7:0]
OAD OAD KEY[7:0] A5h A5h KEY[7:0] OAD KEY[7:0] 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 298 of 1551
RA4W1
16. MPU
16.2.3.6
MSPMPUCTL, PSPMPUCTL
SPMON.MSPMPUCTL 4000 0D04h, SPMON.PSPMPUCTL 4000 0D14h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
ERRO R
--
--
--
--
--
--
--
ENABL E
0
0
0
0
0
0
0
0/1
0
0
0
0
0
0
0
0
1
R/W
b0
ENABLE
0
R/W
1
b7-b1 --
0 0
R/W
b8
ERROR
0
R/W
1
b15-b9 --
0 0
R/W
1.
ENABLE
MSPMPUCTL.ENABLE 1 MSPMPUSA MSPMPUEA MSPMPUOAD PSPMPUCTL.ENABLE 1 PSPMPUSA PSPMPUEA PSPMPUOAD
ERROR ERROR
1 0 0 MPU MPU
. ERROR 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 299 of 1551
RA4W1
16. MPU
16.2.3.7 MSPMPUPT, PSPMPUPT
SPMON.MSPMPUPT 4000 0D06h, SPMON.PSPMPUPT 4000 0D16h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
KEY[7:0]
--
--
--
--
--
--
--
PROTE CT
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
PROTECT
b7-b1 b15-b8
-- KEY[7:0]
0 1
0 0
PROTECT
R/W R/W
R/W R/(W
1
1.
PROTECT
MSPMPUPT.PROTECT
MSPMPUCTL MSPMPUSA MSPMPUEA
PSPMPUPT.PROTECT
PSPMPUCTL PSPMPUSA PSPMPUEA
PROTECT KEY[7:0] A5h
KEY[7:0] PROTECT A5h KEY[7:0]
PROTECT KEY[7:0] 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 300 of 1551
RA4W1
16. MPU
16.3 Arm MPU
Arm MPU 8
7 = 0 =
Arm MPU MemManage 16.7 2.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 301 of 1551
RA4W1
16. MPU
16.4 MPU
MPU 0000 0000h FFFF FFFFh 16 MPU MPU 15. 15.3.3 15.3.4
16.4 MPU 16.3
16.4
MPU
MPU ADMA 0000 0000hFFFF FFFFh MPU A16
CPU I D
DMAC/DTC
MPUA DMA
MPU
16.3
SRAM0
MPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 302 of 1551
RA4W1
16. MPU
16.4 MPU A
0 1 2
15 A A
A
OAD
16.4
MPU A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 303 of 1551
RA4W1
16. MPU
16.4.1
. MPU
16.4.1.1 A n MMPUSAn(n = 0 15)
MMPU.MMPUSA0 4000 0204h, MMPU.MMPUSA1 4000 0214h, MMPU.MMPUSA2 4000 0224h, MMPU.MMPUSA3 4000 0234h, MMPU.MMPUSA4 4000 0244h, MMPU.MMPUSA5 4000 0254h, MMPU.MMPUSA6 4000 0264h, MMPU.MMPUSA7 4000 0274h, MMPU.MMPUSA8 4000 0284h, MMPU.MMPUSA9 4000 0294h, MMPU.MMPUSA10 4000 02A4h, MMPU.MMPUSA11 4000 02B4h, MMPU.MMPUSA12 4000 02C4h, MMPU.MMPUSA13 4000 02D4h, MMPU.MMPUSA14 4000 02E4h, MMPU.MMPUSA15 4000 02F4h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
MMPUSA[31:16]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
MMPUSA[15:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
x
b31-b0
MMPUSA[31:0]
R/W
2 R/W 0
16.4.1.2 A n MMPUEAn(n = 0 15)
MMPU.MMPUEA0 4000 0208h, MMPU.MMPUEA1 4000 0218h, MMPU.MMPUEA2 4000 0228h, MMPU.MMPUEA3 4000 0238h, MMPU.MMPUEA4 4000 0248h, MMPU.MMPUEA5 4000 0258h, MMPU.MMPUEA6 4000 0268h, MMPU.MMPUEA7 4000 0278h, MMPU.MMPUEA8 4000 0288h, MMPU.MMPUEA9 4000 0298h, MMPU.MMPUEA10 4000 02A8h, MMPU.MMPUEA11 4000 02B8h, MMPU.MMPUEA12 4000 02C8h, MMPU.MMPUEA13 4000 02D8h, MMPU.MMPUEA14 4000 02E8h, MMPU.MMPUEA15 4000 02F8h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
MMPUEA[31:16]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
MMPUEA[15:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
1
1
x
b31-b0
MMPUEA[31:0]
R/W
2 R/W 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 304 of 1551
RA4W1
16. MPU
16.4.1.3
A n MMPUACAn (n = 0 15)
MMPU.MMPUACA0 4000 0200h, MMPU.MMPUACA1 4000 0210h, MMPU.MMPUACA2 4000 0220h, MMPU.MMPUACA3 4000 0230h, MMPU.MMPUACA4 4000 0240h, MMPU.MMPUACA5 4000 0250h, MMPU.MMPUACA6 4000 0260h, MMPU.MMPUACA7 4000 0270h,
MMPU.MMPUACA8 4000 0280h, MMPU.MMPUACA9 4000 0290h, MMPU.MMPUACA10 4000 02A0h, MMPU.MMPUACA11 4000 02B0h, MMPU.MMPUACA12 4000 02C0h, MMPU.MMPUACA13 4000 02D0h, MMPU.MMPUACA14 4000 02E0h, MMPU.MMPUACA15 4000 02F0h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
WP
RP
ENABL E
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
ENABLE
b1
RP
b2
WP
b15-b3
--
R/W
0An
R/W
1An
0
R/W
1
0
R/W
1
0 0
R/W
ENABLE RP WP A n
ENABLE
A n ENABLE 1 MMPUSAn MMPUEAn RP WP ENABLE 0 A n
RP
A n ENABLE 1 RP
WP
A n ENABLE 1 WP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 305 of 1551
RA4W1
16. MPU
16.5
MMPUACAn. ENABLE
MMPUACAn. RP
MMPUACAn. WP
0
--
--
1
0
0
0
1
1
0
1
1
n = 0 15
--
A n
16.6
MMPUCTLA. ENABLE
1
1
A 0
Don't care
1
Don't care
1
A 1 Don't care
Don't care
A 2 15 Don't care Don't care
A
MPU MMPUCTLA.ENABLE = 1 1 n MMPUCTLA.ENABLE = 1 n
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 306 of 1551
RA4W1
16. MPU
16.4.1.4 MPU MMPUCTLA
MMPU.MMPUCTLA 4000 0000h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
KEY[7:0]
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
b2
b1
b0
--
OAD
ENABL E
0
0
0
b0
ENABLE
b1
OAD
b7-b2 b15-b8
--
KEY[7:0]
1.
0 A 1 A
0 1
0 0
OADENABLE
R/W R/W
R/W
R/W R/(W
1
ENABLE
A MPU 1 MMPUACAn 0 MMPUACAn ENABLE KEY[7:0] A5h
OAD
MPU OAD KEY[7:0] A5h
KEY[7:0]
ENABLE OAD ENABLE OAD KEY[7:0] A5h A5h KEY[7:0] ENABLE OAD KEY[7:0] 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 307 of 1551
RA4W1
16. MPU
16.4.1.5 A MMPUPTA
MMPU.MMPUPTA 4000 0102h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
KEY[7:0]
--
--
--
--
--
--
--
PROTE CT
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
PROTECT
b7-b1 b15-b8
--
KEY[7:0]
0 MPU A 1 MPU A
00
PROTECT
R/W R/W
R/W R/(W
1
1.
PROTECT
MMPUPTA.PROTECT MPU A MMPUPTA.PROTECT
MMPUSAn
MMPUEAn
MMPUACAn
MMPUCTLA
PROTECT KEY[7:0] A5h
KEY[7:0]
PROTECT PROTECT KEY[7:0] A5h A5h KEY[7:0] PROTECT KEY[7:0] 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 308 of 1551
RA4W1
16. MPU
16.4.2
16.4.2.1
MPU MPU
MPU 16 2
MPU A MPU MMPUCTLA.ENABLE 1 MPU
16.5 MPU
MMPUCTLA. ENABLE = 0
MMPUCTLA. ENABLE = 1
MMPUACAn. ENABLE
0
1 2
MMPUCTLA.
ENABLE 3
16.5
MPU
16.6 MPU
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 309 of 1551
RA4W1
16. MPU
0 1
2
3
16.6
MPU
16.7 CPU
16.7
MMPUCTLA.OAD MMPUCTLA.ENABLE
MMPUSAn MMPUEAn
MMPUACAn
MMPUPTA.PROTECT
MMPUACAn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 310 of 1551
RA4W1
16. MPU
16.8 CPU
MMPUPTA.PROTECT
MMPUSAn MMPUEAn
MMPUACAn
MMPUPTA.PROTECT
16.8
16.4.2.2
MPU MMPUPTA PROTECT
16.4.2.3
MPU OAD ICU.NMISR.BUSMST 14.ICU SYSTEM.RSTSR1.BUSMRF 6.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 311 of 1551
RA4W1
16. MPU
16.5 MPU
MPU SRAM
2 CPU MPU A MPU 2 MPU I/O 15. 15.3.3 15.3.4
16.7 MPU 16.9
16.7
MPU
MPUADMA
3 4SRAM0 1 3CAC, ELC, I/O , POEG, RTC, WDT, IWDT, IIC, CAN, ADC14, DAC12, DOC 4SCI, SPI, CRC 5KINT, AGT, USBFS, DAC8, OPAMP, ACMPLP, CTSU 7 IPSCE5 9P/E
MPU
I
CPU D
DMAC/DTC
MPU
MPU
MPU
MPU
MPU
16.9
MPU
SRAM0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 312 of 1551
RA4W1
16. MPU
16.5.1
. MPU
16.5.1.1 3 SMPUMBIU
SMPU.SMPUMBIU 4000 0C10h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
WPGR RPGRP
PA
A
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b1-b0 --
0 0
R/W
b2
RPGRPA
A 0A R/W
1 A
b3
WPGRPA A 0A R/W
1 A
b15-b4 --
0 0
R/W
RPGRPA A 3 A
WPGRPA A 3 A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 313 of 1551
RA4W1
16. MPU
16.5.1.2 9 SMPUFBIU
SMPU.SMPUFBIU 4000 0C14h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
WPGR PA
RPGRP A
WPCP U
RPCPU
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
RPCPU
CPU
0CPU
R/W
1CPU
b1
WPCPU
CPU
0CPU
R/W
1CPU
b2
RPGRPA
A 0A R/W
1 A
b3
WPGRPA
A 0A R/W
1 A
b15-b4 --
0 0
R/W
RPCPU CPU 9 CPU
WPCPU CPU 9 CPU
RPGRPA A 9 A
WPGRPA A
9 A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 314 of 1551
RA4W1
16. MPU
16.5.1.3 4 SMPUSRAM0
SMPU.SMPUSRAM0 4000 0C18h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
WPGR PA
RPGRP A
WPCP U
RPCPU
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
RPCPU
CPU
0CPU
R/W
1CPU
b1
WPCPU
CPU
0CPU
R/W
1CPU
b2
RPGRPA
A 0A R/W
1 A
b3
WPGRPA
A 0A R/W
1 A
b15-b4 --
0 0
R/W
RPCPU CPU 4 CPU
WPCPU CPU 4 CPU
RPGRPA A 4 A
WPGRPA A
4 A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 315 of 1551
RA4W1
16. MPU
16.5.1.4 1 SMPUP0BIU
SMPU.SMPUP0BIU 4000 0C20h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
WPGR PA
RPGRP A
WPCP U
RPCPU
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
RPCPU
CPU
0CPU
R/W
1CPU
b1
WPCPU
CPU
0CPU
R/W
1CPU
b2
RPGRPA
A 0A R/W
1 A
b3
WPGRPA
A 0A R/W
1 A
b15-b4 --
0 0
R/W
RPCPU CPU 1 CPU
WPCPU CPU 1 CPU
RPGRPA A 1 A
WPGRPA A
1 A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 316 of 1551
RA4W1
16. MPU
16.5.1.5 3 SMPUP2BIU
SMPU.SMPUP2BIU 4000 0C24h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
WPGR PA
RPGRP A
WPCP U
RPCPU
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
RPCPU
CPU
0CPU
R/W
1CPU
b1
WPCPU
CPU
0CPU
R/W
1CPU
b2
RPGRPA
A 0A R/W
1 A
b3
WPGRPA
A 0A R/W
1 A
b15-b4 --
0 0
R/W
RPCPU CPU 345 CPU
WPCPU CPU 345 CPU
RPGRPA A
345 A
WPGRPA A
345 A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 317 of 1551
RA4W1
16. MPU
16.5.1.6 7 SMPUP6BIU
SMPU.SMPUP6BIU 4000 0C28h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
WPGR PA
RPGRP A
WPCP U
RPCPU
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
RPCPU
CPU
0CPU
R/W
1CPU
b1
WPCPU
CPU
0CPU
R/W
1CPU
b2
RPGRPA
A 0A R/W
1 A
b3
WPGRPA
A 0A R/W
1 A
b15-b4 --
0 0
R/W
RPCPU CPU 7 CPU
WPCPU CPU 7 CPU
RPGRPA A 7 A
WPGRPA A
7 A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 318 of 1551
RA4W1
16. MPU
16.5.1.7 MPU SMPUCTL
SMPU.SMPUCTL 4000 0C00h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
KEY[7:0]
--
--
--
--
--
--
PROTE CT
OAD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
OAD
b1
PROTECT
b7-b2 b15-b8
-- KEY[7:0]
R/W
0
R/W
1
0
R/W
1
0 0
R/W
OADPROTECT R/(W
1
1.
OAD
MPU OAD KEY[7:0] A5h
PROTECT
SMPUCTL.PROTECT
SMPUMBIU
SMPUFBIU
SMPUSRAM0
SMPUP0BIU
SMPUP2BIU
SMPUP6BIU
PROTECT KEY[7:0] A5h
KEY[7:0]
OAD PROTECT OAD PROTECT KEY[7:0] A5h A5h KEY[7:0] OAD PROTECT KEY[7:0] 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 319 of 1551
RA4W1
16. MPU
16.5.2
16.5.2.1
MPU MPU
MPU SMPUMBIU, SMPUFBIU, SMPUSRAM0, SMPUP0BIU, SMPUP2BIU, SMPUP6BIUWPCPU WPGRPA RPCPU RPGRPA 1
16.5.2.2
MPU SMPUCTL PROTECT
16.5.2.3
MPU OAD
ICU.NMISR.BUSSST 14. ICU SYSTEM.RSTSR1.BUSSRF 6.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 320 of 1551
RA4W1
16. MPU
16.6 MPU
MCU 4 MPU SRAM 2
16.8 MPU 16.10 MPU
16.8
MPU
SRAM2
0000 0000h00FF FFFFh 1FF0 0000h200F FFFFhSRAM 400C 0000h400D FFFFh 4010 0000h407F FFFFh
= 2 = 4
16.10
PC0 PC1
CPU A
D
0 1
1 2 3
A
0 1 2 3
CPU
CPU
A
MPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 321 of 1551
RA4W1
16. MPU
16.6.1
MPU
16.6.1.1 MPU SECMPUPCSnn = 0, 1
SECMPUPCS0 0000 0408h, SECMPUPCS1 0000 0410h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 SECMPUPCS[31:16]
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SECMPUPCS[15:0]
b31-b0 SECMPUPCS[31:0]
R/W
R
2 0
0000 0000h00FF FFFCh
1FF0 0000h200F FFFCh
2
0
SECMPUPCSn SECMPUPCEn 0000 0000h 00FF FFFFh SRAM 1FF0 0000h 200FFFFFh SECMPUPCSn SECMPUPCEn SECMPUSm SECMPUEm m = 0 3 0200 0000h 027F FFFFh MMF
12
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 322 of 1551
RA4W1
16. MPU
16.6.1.2 MPU SECMPUPCEnn = 0, 1
SECMPUPCE0 0000 040Ch, SECMPUPCE1 0000 0414h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 SECMPUPCE[31:16]
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SECMPUPCE[15:0]
b31-b0 SECMPUPCE[31:0]
R/W
R
2 1
0000 0003h 00FF FFFFh
1FF0 0003h200F FFFFh
2
1
16.6.1.3 MPU 0 SECMPUS0
SECMPUS0 0000 0418h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
SECMPUS0[23:16]
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SECMPUS0[15:0]
b23-b0 SECMPUS0[23:0]
b31-b24 --
R/W
R
2 0
0000 0000h 00FF FFFCh
2
0
0
R
0
SECMPUS0 SECMPUE0 0000 0000h 00FF FFFFhSECMPUS0 SECMPUE0 SECMPUPCSn SECMPUPCEn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 323 of 1551
RA4W1
16. MPU
16.6.1.4 MPU 0 SECMPUE0
SECMPUE0 0000 041Ch
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
SECMPUE0[23:16]
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SECMPUE0[15:0]
b23-b0 SECMPUE0[23:0]
b31-b24 --
R/W
R
2 1
0000 0003h 00FF FFFFh
2
1
0
R
0
16.6.1.5 MPU 1 SECMPUS1
SECMPUS1 0000 0420h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 SECMPUS1[31:16]
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SECMPUS1[15:0]
0
0
b31-b0 SECMPUS1[31:0]
R/W
R
2 0
1FF0 0000h 200F FFFCh
2
0 [31:20]1FFh
200h
SECMPUS1 SECMPUE1 SRAM 1FF0 0000h 200F FFFFhSECMPUS1 SECMPUE1 SECMPUPCSn SECMPUPCEn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 324 of 1551
RA4W1
16. MPU
16.6.1.6 MPU 1 SECMPUE1
SECMPUE1 0000 0424h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 SECMPUE1[31:16]
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SECMPUE1[15:0]
1
1
b31-b0
SECMPUE1[31:0]
R/W
R
2 1
1FF0 0003h200F FFFFh
2
1 [31:20] 1FFh
200h
16.6.1.7 MPU 2 SECMPUS2
SECMPUS2 0000 0428h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
SECMPUS2[22:16]
0
1
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SECMPUS2[15:0]
0
0
b22-b0 SECMPUS2[22:0]
b31-b23 --
R/W
R
2 0400C 0000h
400D FFFCh 4010 0000h407F FFFCh
2
0
0100 0000 0b
R
0100 0000 0b
SECMPUS2 SECMPUE2 400C 0000 400D FFFFh 4010 0000 407F FFFFhSECMPUS2 SECMPUE2 SECMPUPCSn SECMPUPCEn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 325 of 1551
RA4W1
16. MPU
16.6.1.8 MPU 2 SECMPUE2
SECMPUE2 0000 042Ch
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
SECMPUE2[22:16]
0
1
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SECMPUE2[15:0]
1
1
b22-b0 SECMPUE2[22:0]
b31-b23 --
R/W
R
2 1
400C 0003h400D FFFFh 4010 0003h 407F FFFFh
2 1
0100 0000 0b R 0100 0000 0b
16.6.1.9 MPU 3 SECMPUS3
SECMPUS3 0000 0430h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
SECMPUS3[22:16]
0
1
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SECMPUS3[15:0]
0
0
b22-b0 SECMPUS3[22:0]
b31-b23 --
R/W
R
2 0
400C 0000h 400D FFFCh 4010 0000h407F FFFCh
20
0100 0000 0b R 0100 0000 0b
SECMPUS3 SECMPUE3 400C 0000h 400D FFFFh 4010 0000h 407F FFFFhSECMPUS3 SECMPUE3 SECMPUPCSn SECMPUPCEn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 326 of 1551
RA4W1
16. MPU
16.6.1.10 MPU 3 SECMPUE3
SECMPUE3 0000 0434h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
SECMPUE3[22:16]
0
1
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SECMPUE3[15:0]
1
1
b22-b0 SECMPUE3[22:0]
b31-b23 --
R/W
R
21 400C 0003h
400D FFFFh4010 0003h407F FFFFh
2
1
0100 0000 0b R 0100 0000 0b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 327 of 1551
RA4W1
16. MPU
16.6.1.11 MPU SECMPUAC
SECMPUAC 0000 0438h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
DISPC DISPC
1
0
--
--
--
-- DIS3 DIS2 DIS1 DIS0
1
1
1
1
1
1
1
1
1
1
b0
DIS0
b1
DIS1
b2
DIS2
b3
DIS3
b7-b4 --
b8
DISPC0
b9
DISPC1
b15-b10 --
0 1 2 3
PC 0 PC 1
R/W
0 MPU0
R
1 MPU0
0 MPU1
R
1 MPU1
0 MPU2
R
1 MPU2
0 MPU3
R
1 MPU3
1
R
[7:4]
1
0 MPUPC 0
R
1 MPUPC 0
0 MPUPC 1
R
1 MPUPC 1
1
R
[15:10]
1
.
MPU
.
MPU 16.6.2
DIS0 0
MPU 0 MPU 0 SECMPUS0 SECMPUE0
DIS1 1
MPU 1 MPU 1 SECMPUS1 SECMPUE1 SRAM
DIS2 2
MPU 2 MPU 2 SECMPUS2 SECMPUE2
DIS3 3
MPU 3 MPU 3 SECMPUS3 SECMPUE3
DISPC0 PC 0
MPU PC 0 MPU PC 0 SECMPUPCS0 SECMPUPCE0 SRAM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 328 of 1551
RA4W1
16. MPU
DISPC1 PC 1
MPU PC 1 MPU PC 1 SECMPUPCS1 SECMPUPCE1 SRAM
16.6.2
MPU SRAM2
MPU MPU SECMPUAC DISPC0 DISPC1 0 MPU SECMPUAC DIS0DIS1DIS2 DIS3 0 MPU MPU SECMPUAC DISPC0DISPC1DIS0DIS1DIS2 DIS3 1 MPU SECMPUAC
MPU
CPU DMACDTC
. SECMPUPCS0 SECMPUPCE0 SRAM SECMPUPCS1 SECMPUPCE1 SRAM
SECMPUS0 SECMPUE0
SECMPUS1 SECMPUE1 SRAM SECMPUS2 SECMPUE2 SECMPUS3 SECMPUE3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 329 of 1551
RA4W1
SRAM
16. MPU
MPU
3
2
1 PC1
0 PC0
PC 0 SRAM PC 1 PC 0 PC 1 0 1 2 3 PC 0 PC 1
16.11
MPU
16.6.3
MPU MPU
16.7
1. ARM� v7-M Architecture Reference Manual (ARM DDI 0403D) 2. ARM� Cortex�-M4 Processor Technical Reference Manual (ARM DDI 0439D) 3. ARM� Cortex�-M4 Devices Generic User Guide (ARM DUI 0553A)
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 330 of 1551
RA4W1
17. DMA DMAC
17. DMA DMAC
17.1
MCU 4 DMA DMACCPU DMA DMAC 17.1 DMAC 17.1
17.1
DMAC
4DMACmm = 03
4G0000 0000h FFFF FFFFh
64M1024 � 65536
DMA
1
012 30
1
816 32
1 1024
1DMA 1
1DMA 1
1024
1DMA 1 1024
2 128M
DMACm_INT
DMACm_INT
1. DMAC 14.ICU 14.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 331 of 1397
RA4W1
17. DMA DMAC
DMAC
DMA 4
DMA
DMAC 4
DMAC DMAC
(CH0CH3) DMSAR DMDAR DMCRA DMCRB DMOFR DMTMD DMAMD DMSTS DMCNT
DMAST
ELC
ICU (DMACm_INT)
4
m = 03
ELC (DMACm_INT)
4
m = 03
DMAC
DMAC
DMAC
17.1
DMA
SRAM0
DMAC
1
DMA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 332 of 1397
RA4W1
17. DMA DMAC
17.2 17.2.1 DMA DMSAR
DMAC0.DMSAR 4000 5000h, DMAC1.DMSAR 4000 5040h, DMAC2.DMSAR 4000 5080h, DMAC3.DMSAR 4000 50C0h b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b31-b0
R/W
0000 0000hFFFF FFFFh4G
R/W
DMSAR DMAC DMAST.DMST = 0 DMA DMCNT.DTE = 0
. DMTMD SZ
17.2.2 DMA DMDAR
DMAC0.DMDAR 4000 5004h, DMAC1.DMDAR 4000 5044h, DMAC2.DMDAR 4000 5084h, DMAC3.DMDAR 4000 50C4h b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b31-b0
R/W
0000 0000hFFFF FFFFh4G
R/W
DMDAR DMAC DMAST.DMST = 0 DMA DMCNT.DTE = 0
. DMTMD SZ
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 333 of 1397
RA4W1
17. DMA DMAC
17.2.3 DMA DMCRA
DMAC0.DMCRA 4000 5008h, DMAC1.DMCRA 4000 5048h, DMAC2.DMCRA 4000 5088h, DMAC3.DMCRA 4000 50C8h
DMCRAH b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DMCRAL
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DMCRAH
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DMCRAL
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
DMCRAL
R/W
DMCRAH
R/W
.
DMCRAH DMCRAL
(1) DMACm.DMTMD.MD[1:0] = 00b
DMCRAL 16 0001h 1 FFFFh 65535 1 - 1 0000h
DMCRAH DMCRAH 0000h
(2) DMACm.DMTMD.MD[1:0] = 01b
DMCRAH DMCRAL 10 001h 1 3FFh 1023 000h 1024 DMCRAH DMCRAL 000h 3FFh1 1024
DMCRAL[15:10] 0 DMCRAL 1 - 1000h DMCRAH DMCRAL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 334 of 1397
RA4W1
17. DMA DMAC
(3) DMACm.DMTMD.MD[1:0] = 10b
DMCRAH DMCRAL 10 001h 13FFh 1023000h 1024 DMCRAH DMCRAL 000h 3FFh
DMCRAL[15:10] 0 DMCRAL 1 - 1000h DMCRAH DMCRAL
17.2.4 DMA DMCRB
DMAC0.DMCRB 4000 500Ch, DMAC1.DMCRB 4000 504Ch, DMAC2.DMCRB 4000 508Ch, DMAC3.DMCRB 4000 50CCh
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b15-b0
0001hFFFFh1 65535
R/W
0000h65536
DMCRB 0001h 1 FFFFh 65535 0000h 65536
1 - 1 1 - 1 DMCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 335 of 1397
RA4W1
17. DMA DMAC
17.2.5 DMA DMTMD
DMAC0.DMTMD 4000 5010h, DMAC1.DMTMD 4000 5050h, DMAC2.DMTMD 4000 5090h, DMAC3.DMTMD 4000 50D0h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
MD[1:0]
DTS[1:0]
--
--
SZ[1:0]
--
--
--
--
--
--
DCTG[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b1-b0
b7-b2 b9-b8
b11-b10 b13-b12
b15-b14
R/W
DCTG[1:0]
b1 b0
0 0 0 11 1 0 1 1
R/W
--
00
R/W
SZ[1:0]
b9 b8
0 08 0 116 1 032 1 1
R/W
--
00
R/W
DTS[1:0]
b13 b12
0 0
R/W
0 1
1 0
1 1
MD[1:0]
b15 b14
0 0 0 1 1 0 1 1
R/W
1.
DMAC ICU.DELSRn DMAC 14. ICU 14.4
DTS[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 336 of 1397
RA4W1
17. DMA DMAC
17.2.6 DMA DMINT
DMAC0.DMINT 4000 5013h, DMAC1.DMINT 4000 5053h, DMAC2.DMINT 4000 5093h, DMAC3.DMINT 4000 50D3h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
-- DTIE ESIE RPTIE SARIE DARIE
0
0
0
0
0
0
0
0
R/W
b0
DARIE 0
R/W
1
b1
SARIE 0
R/W
1
b2
RPTIE
0
R/W
1
b3
ESIE
0
R/W
1
b4
DTIE
0
R/W
1
b7-b5 --
00
R/W
DARIE
1 DMCNT.DTE 0 DMSTS.ESIF 1
1 DMACm.DMCNT.DTE 1
SARIE
1 DMCNT.DTE 0 DMSTS.ESIF 1
1 DMACm.DMCNT.DTE 1
RPTIE
1 1 DMCNT.DTE 0 DMSTS.ESIF 1 DMTMD.DTS[1:0] 10b
1 1 DMCNT.DTE 0 DMSTS.ESIF 1 DMTMD.DTS[1:0] 10b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 337 of 1397
RA4W1
17. DMA DMAC
ESIE
DMA 1 DMSTS.ESIF 1 DMSTS.ESIF 0
DTIE
1 DMSTS.DTIF 1 DMSTS.DTIF 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 338 of 1397
RA4W1
17. DMA DMAC
17.2.7 DMA DMAMD
DMAC0.DMAMD 4000 5014h, DMAC1.DMAMD 4000 5054h, DMAC2.DMAMD 4000 5094h, DMAC3.DMAMD 4000 50D4h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SM[1:0]
--
SARA[4:0]
DM[1:0]
--
DARA[4:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b4-b0
DARA[4:0] R/W 17.2
b5
--
0 0
R/W
b7-b6 DM[1:0]
b7 b6
0 0
R/W
0 1
1 0
1 1
b12-b8 SARA[4:0] R/W 17.2
b13
--
0 0
R/W
b15-b14 SM[1:0]
b15 b14
0 0 0 1 1 0 1 1
R/W
DARA[4:0]
2 128M 2
DMACm.DMTMD.DTS[1:0] = 00b DARA[4:0] 00000b
DMINT.DARIE 1 17.2
DM[1:0]
DMTMD.SZ[1:0] 00b01b 10b 12 4
DMTMD.SZ[1:0] 00b01b 10b 12 4
DMACm.DMOFR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 339 of 1397
RA4W1
17. DMA DMAC
SARA[4:0]
2 128M 2
DMACm.DMTMD.DTS[1:0] = 01b SARA[4:0] 00000b
DMINT.SARIE 1 17.2
SM[1:0]
DMTMD.SZ[1:0] 00b01b 10b 12 4
DMTMD.SZ[1:0] 00b01b 10b 12 4
DMACm.DMOFR
17.2
SARA[4:0] DARA[4:0] (1/2)
00000b 00001b 00010b 00011b 00100b 00101b 00110b 00111b 01000b 01001b 01010b 01011b 01100b 01101b 01110b 01111b 10000b 10001b 10010b 10011b 10100b 10101b 10110b
SARA[4:0] DARA[4:0]
1 2 2 4 3 8 4 16 5 32 6 64 7 128 8 256 9 512 10 1K 11 2K 12 4K 13 8K 14 16K 15 32K 16 64K 17 128K 18 256K 19 512K 20 1M 21 2M 22 4M
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 340 of 1397
RA4W1
17. DMA DMAC
17.2
SARA[4:0] DARA[4:0] (2/2)
SARA[4:0] DARA[4:0] 10111b 11000b 11001b 11010b 11011b 11100b 11111b
23 8M 24 16M 25 32M 26 64M 27 128M
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 341 of 1397
RA4W1
17. DMA DMAC
17.2.8 DMA DMOFR
DMAC0.DMOFR 4000 5018h, DMAC1.DMOFR 4000 5058h, DMAC2.DMOFR 4000 5098h, DMAC3.DMOFR 4000 50D8h b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b31-b0
0000 0000h 00FF FFFFh0 (16M - 1) R/W FF00 0000h FFFF FFFFh-16M -1
DMAC DMA [31:25] [24] [31:25] DMOFR
17.2.9 DMA DMCNT
DMAC0.DMCNT 4000 501Ch, DMAC1.DMCNT 4000 505Ch, DMAC2.DMCNT 4000 509Ch, DMAC3.DMCNT 4000 50DCh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- DTE
0
0
0
0
0
0
0
0
R/W
b0
DTE
DMA
0
R/W
1
b7-b1
--
0 0
R/W
DTE DMA DMA DMA DMAST.DMST 1DMAC
DTE 1 DMA 1 1
0 0
DMA DMA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 342 of 1397
RA4W1
17. DMA DMAC
17.2.10 DMA DMREQ
DMAC0.DMREQ 4000 501Dh, DMAC1.DMREQ 4000 505Dh, DMAC2.DMREQ 4000 509Dh, DMAC3.DMREQ 4000 50DDh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
-- CLRS --
--
--
SWRE Q
0
0
0
0
0
0
0
0
R/W
b0
SWREQ DMA
0DMA
R/W
1DMA
b3-b1 --
00
R/W
b4
CLRS
DMA 0 DMA SWREQ R/W
1 DMA SWREQ
b7-b5 --
00
R/W
SWREQ DMA
1 DMA DMA CLRS 0 SWREQ 0 CLRS 1 SWREQ DMA
. DMTMD.DCTG[1:0] 00bDMA DMA DMTMD.DCTG[1:0] 00b
CLRS 0 DMA SWREQ 0 SWREQ 1
1
1
0
CLRS 0 DMA SWREQ DMA DMA
0
CLRS DMA
SWREQ 1 DMA SWREQ 0 CLRS CLRS 0 DMA SWREQ 0 CLRS 1 SWREQ 0 DMA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 343 of 1397
RA4W1
17. DMA DMAC
17.2.11 DMA DMSTS
DMAC0.DMSTS 4000 501Eh, DMAC1.DMSTS 4000 505Eh, DMAC2.DMSTS 4000 509Eh, DMAC3.DMSTS 4000 50DEh
b7
b6
b5
b4
b3
b2
b1
b0
ACT --
-- DTIF --
--
-- ESIF
0
0
0
0
0
0
0
0
b0
ESIF
b3-b1 b4
-- DTIF
b6-b5 b7
-- ACT
DMA
0 1
0
0 1
0
0DMAC 1DMAC
1. 0
R/W R/W
1
R/W R/W
1
R/W R
ESIF
1 DMINT.RPTIE 1 1
DMINT.RPTIE 1 1
DMINT.SARIE 1 DMAMD.SARA[4:0] 00000b
DMINT.DARIE 1 DMAMD.DARA[4:0] 00000b
0 0 DMCNT.DTE 1
DTIF
1 DMCRAL 0
DMCRB 0
DMCRB 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 344 of 1397
RA4W1
0 0 DMCNT.DTE 1 ACT DMA DMAC 1 DMAC 0 1
17. DMA DMAC
17.2.12 DMACA DMAST
DMA.DMAST 4000 5200h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- DMST
0
0
0
0
0
0
0
0
R/W
b0
DMST
DMAC
0
R/W
1
b7-b1 --
00
R/W
DMST DMAC
1 DMAC 1DMAC DMACm.DMCNT.DTE 1DMA
DMA DMST 0 1 DMA DMA DMST 1
1
1
0
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 345 of 1397
RA4W1
17. DMA DMAC
17.3
17.3.1
(1)
1 1 DMACm.DMCRAL 65535 DMACm.DMCRAL 0000h DMACm.DMCRB
17.3
17.3
DMACm.DMSAR DMACm.DMDAR DMACm.DMCRAL DMACm.DMCRAH DMACm.DMCRB
-- --
1 1
17.2
DMSAR
1 2 3 4 5 6
1 2 3 4 5 6
DMDAR
17.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 346 of 1397
RA4W1
17. DMA DMAC
(2)
1 1
DMACm.DMCRA 1K DMACm.DMCRB 64K 64M 1K � 64K
DMACm.DMSAR DMACm.DMDAR DMA DMA DMACm.DMCNT.DTE 1
17.4 17.3
17.4
DMACm.DMSAR
DMACm.DMDAR
DMACm.DMCRAH DMACm.DMCRAL DMACm.DMCRB
1
DMACm.DMCRAL 1
DMACm.DMCRAL 1
DMACm.DMTMD.DTS[1:0] = 00b
DMACm.DMTMD.DTS[1:0] = 01b DMACm.DMSAR DMACm.DMTMD.DTS[1:0] = 10b
DMACm.DMTMD.DTS[1:0] = 00b DMACm.DMDAR
DMACm.DMTMD.DTS[1:0] = 01b
DMACm.DMTMD.DTS[1:0] = 10b
1
DMACm.DMCRAH
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 347 of 1397
RA4W1
17. DMA DMAC
DMSAR
1 2 3 4
17.3
1 2 3 4 1 2 3 4
DMDAR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 348 of 1397
RA4W1
17. DMA DMAC
(3)
1 1
DMACm.DMCRA 1K DMACm.DMCRB 64K 64M 1K � 64K
DMACm.DMSAR DMACm.DMDAR1 1 DMA DMA DMACm.DMCNT.DTE 1
17.5 17.4
17.5
DMACm.DMSAR
DMACm.DMDAR
DMACm.DMCRAH DMACm.DMCRAL DMACm.DMCRB
1 1
DMACm.DMTMD.DTS[1:0] = 00b
DMACm.DMTMD.DTS[1:0] = 01b DMACm.DMSAR
DMACm.DMTMD.DTS[1:0] = 10b
DMACm.DMTMD.DTS[1:0] = 00b DMACm.DMDAR
DMACm.DMTMD.DTS[1:0] = 01b
DMACm.DMTMD.DTS[1:0] = 10b
DMACm.DMCRAH
1
DMSAR
1 N
DMDAR
17.4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 349 of 1397
RA4W1
17. DMA DMAC
17.3.2
DMAC DMA DMSAR DMA DMDAR DMACm.DMAMD.SARA[4:0]
DMACm.DMAMD.DARA[4:0]
DMA DMACm.DMINT.SARIE 1 DMACm.DMSTS.ESIF 1 DMACm.DMCNT.DTE 0 DMA DMACm.DMINT.ESIE 1 DMACm.DMINT.DARIE 1 DMA DMACm.DMCNT.DTE 1
17.5
DMACm.DMSAR38 DMACm.DMAMD.SARA[4:0] = 00011b8DMACm.DMTMD.SZ[1:0] = 00b
00013FFEh 00013FFFh 00014000h 00014001h 00014002h 00014003h 00014004h 00014005h 00014006h 00014007h 00014008h 00014009h
DMSAR
00014000h 00014001h 00014002h 00014003h 00014004h 00014005h 00014006h 00014007h
17.5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 350 of 1397
RA4W1
17. DMA DMAC
2 1
17.6
DMACm.DMSAR38 DMACm.DMAMD.SARA[4:0] = 00011b5 DMACm.DMCRA = 00050005h 8DMACm.DMTMD.SZ[1:0] = 00b
00013FFEh 00013FFFh 00014000h 00014001h 00014002h 00014003h 00014004h 00014005h 00014006h 00014007h 00014008h 00014009h
DMSAR
00014000h 00014001h 00014002h 00014003h 00014004h 00014005h 00014006h 00014007h
1
00014000h 00014001h 00014002h 00014003h 00014004h
2
00014000h 00014001h
00014005h 00014006h 00014007h
17.6
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 351 of 1397
RA4W1
17. DMA DMAC
17.3.3
DMAC 1 DMA DMACm.DMOFR DMACm.DMOFR 2
17.6
17.6
DMACm.DMAMD.SM[1:0] DMACm.DMAMD.DM[1:0]
00b
01b
10b
11b
DMACm.DMTMD.SZ[1:0]
SZ[1:0] = 00b
SZ[1:0] = 01b
+ DMACm.DMOFR1
+ 1
+ 2
- 1
- 2
SZ[1:0] = 10b
+ 4 - 4
1.
DMA 2 2 = + 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 352 of 1397
RA4W1
17. DMA DMAC
(1)
17.7
1
A1
2
A2 = A1 +
1 2 3 4 5
B1 B2 = B1 + 4
B3 = B2 + 4 B4 = B3 + 4 B5 = B4 + 4
3
A3 = A2 +
4 5
A4 = A3 +
A5 = A4 +
32
17.7
17.7
32
2
(2) XY
17.8 XY
DMAC0.DMAMD --
DMAC0.DMAMD --
DMAC0.DMTMD -- 32
DMAC0.DMTMD --
DMAC0.DMTMD --
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 353 of 1397
RA4W1
DMAC0.DMOFR -- 10h DMAC0.DMCRA -- 4h DMAC0.DMINT --
17. DMA DMAC
1 2 3 4
5 6 7 8
9 10 11 12
13 14 15 16
1 2 3 4
1 5 9 13
2 6 10 14
3 7 11 15
4 8 12 16
1
2
CPU
3
1
1
1
1
5 9 13
5 9 13
5 9 13
CPU
2 3 4
1
2
2
2
5
6
10
14
6 10 14
6 10 14
6 7 8
2
3
3
3
9
7
11
15
7 11 15
7 11 15
10 11 12
3
4
4
4
13
8 12 16
8 12 16
8 12 16
14 15 16
4
17.8
+ XY
" 4"
" 1"
DMAC0.DMSAR -- DMA " 5" " 1" 4
DMAC0.DMCNT -- DTE 1
DMA DMA XY
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 354 of 1397
RA4W1 17.9 XY
17. DMA DMAC
DMAC0.DMCNT.DTE1
= 0? Yes
No
No = 0?
Yes
+ 4 32
DMAC
17.9
+ XY
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 355 of 1397
RA4W1
17. DMA DMAC
17.3.4
DMAC DMACm.DMTMD.DCTG[1:0]
(1) DMAC
DMA
1. DMACm.DMTMD.DCTG[1:0] 00b
2. DMACm.DMCNT.DTE 1DMA
3. DMAST.DMST 1DMAC
4. DMACm.DMREQ.SWREQ 1DMA
DMACm.DMREQ.CLRS 0 DMAC DMA DMACm.DMREQ.SWREQ 0
DMACm.DMREQ.CLRS 1 DMAC DMACm.DMREQ.SWREQ 0 DMA
(2) DMAC
DMAC ICU.DELSRn.DELS[7:0] n = 0 3
DMAC
1. DMACm.DMTMD.DCTG[1:0] 01b
2. DMACm.DMCNT.DTE 1DMA
3. ICU.DELSRn.DSEL DMAC
4. DMAST.DMST 1DMAC DMAC 14.ICU
14.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 356 of 1397
RA4W1
17.3.5
17. DMA DMAC
DMAC
DMAC
RW
RW
17.10
DMAC 1 DMA
DMAC
DMAC
17.11
DMAC 2 = 4 DMA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 357 of 1397
RA4W1
17. DMA DMAC
17.3.6 DMAC
17.7 1 DMAC
17.7
DMAC
1
Cr + 1 Cr + 1 P � Cr
Cw Cw P � Cw
. 1.
P = DMCRAH Cr = Cw = 2 1
Cr Cw 42.SRAM43. 15.
+ 1ICLK 1 17.3.5
DMAC DMAC DMAC 17.7 DMAC DMAC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 358 of 1397
RA4W1
17.3.7 DMAC
17.12
17. DMA DMAC
DMA
DMA
DMACm
DMACmIRQ DMACm (ICU.DELSRn.DELS[7:0])000h
DMACm
DMACm.DMCNT.DTE0
DMACm
DMA
DMA
DMA
NVIC ICUDMACm DMACm (ICU.DELSRn)
DMACm
ICU IRQ
DMACm
ICUIRQ
DMACm.DMAMD.DM[1:0] DMACm.DMAMD.SM[1:0] DMACm.DMAMD.DARA[4:0] DMACm.DMAMD.SARA[4:0]
DMACm.DMTMD.DCTG[1:0] DMACm.DMTMD.SZ[1:0] DMACm.DMTMD.DTS[1:0] DMACm.DMTMD.MD[1:0]
DMACm.DMSAR DMACm.DMDAR DMACm.DMCRA
DMACm.DMCRB
DMACm.DMOFR
DMA DMACm.DMINT.DTIE1
DMACm
DMA
DMACm.DMINT.RPTIE DMACm.DMINT.SARIE DMACm.DMINT.DARIE DMACm.DMINT.ESIE1
DMA
DMACm.DMCNT.DTE1
DMACm
DMAST.DMST1
DMAC1
DMAC
DMA
DMACm
DMA
DMACmIRQ
mDMAC (m = 03)
DMA DMACm.DMREQ.SWREQ1DMA
1. DMAST.DMST
17.12
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 359 of 1397
RA4W1
17. DMA DMAC
17.3.8 DMA
m DMA DMACm.DMCNT.DTE 1DMA DMAST.DMST 1DMAC DMAC DTC DMA DMA DMA DMACm.DMSTS.ACT 1DMAC
17.3.9 DMA
DMAC DMA DMACm.DMSARDMACm.DMDARDMACm.DMCRA DMACm.DMCRBDMACm.DMCNT DMACm.DMSTS 17.3 17.5
(1) DMA DMACm.DMSAR
1 DMSAR
(2) DMA DMACm.DMDAR
1 DMDAR
(3) DMA DMACm.DMCRA
1
(4) DMA DMACm.DMCRB
1
(5) DMA DMACm.DMCNT.DTE
DMACm.DMCNT.DTE DMA DMAC 0
DMAC
DMA
DMA
DMACm.DMCNT.DTE 1 DMACm.DMCNT DTE 0
(6) DMA DMACm.DMSTS.ACT
DMACm.DMSTS.ACT DMACm DMAC 1 1 0 DMA DMACm.DMCNT.DTE 0 DMA DMA 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 360 of 1397
RA4W1
17. DMA DMAC
(7) DMACm.DMSTS.DTIF
DMA DMACm.DMSTS.DTIF 1 DMACm.DMINT.DTIE 1 1 DMA DMACm.DMSTS.ACT 0 DMA DMACm.DMCNT.DTE 1 0
(8) DMACm.DMSTS.ESIF
DMACm.DMSTS.ESIF 1 DMACm.DMINT.ESIE 1 1 DMA DMACm.DMSTS.ACT 0 DMA DMACm.DMCNT.DTE 1 0
DMAC CPU DTC 14.ICU
17.3.10
DMAC DMA DMA
0 1 2 3 0
DMA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 361 of 1397
RA4W1
17. DMA DMAC
17.4 DMA
DMA DMA DMACm.DMCNT.DTE DMACm.DMSTS.ACT 1 0
17.4.1
(1) DMACm.DMTMD.MD[1:0] = 00b
DMACm.DMCRAL 1 0 DMA DMACm.DMCNT.DTE 0 DMACm.DMSTS.DTIF 1 DMACm.DMINT.DTIE 1 CPU DTC
(2) DMACm.DMTMD.MD[1:0] = 01b
DMACm.DMCRB 1 0 DMA DMACm.DMCNT.DTE 0 DMACm.DMSTS.DTIF 1 DMACm.DMINT.DTIE 1 CPU DTC
(3) DMACm.DMTMD.MD[1:0] = 10b
DMACm.DMCRB 1 0 DMA DMACm.DMCNT.DTE 0 DMACm.DMSTS.DTIF 1 DMACm.DMINT.DTIE 1 CPU DTC
DMAC CPU DTC 14.ICU
17.4.2
DMACm.DMINT.RPTIE 1 1 DMACm.DMCNT.DTE 0 DMACm.DMSTS.ESIF 1 DMACm.DMINT.ESIE 1 CPU DTC DMACm.DMCNT.DTE 1
1
DMAC CPU DTC 14.ICU
17.4.3
DMACm.DMINT.SARIE DMACm.DMINT.DARIE 1 DMA DMACm.DMCNT.DTE 0 DMACm.DMSTS.ESIF 1 DMACm.DMINT.ESIE 1 CPU DTC
1
DMAC CPU DTC 14.ICU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 362 of 1397
RA4W1
17. DMA DMAC
17.4.4 DMA
DMA DMA DMA DMA DMAC ICU DELSRn.DELS[7:0] 0 DMA
DMA DMA DMA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 363 of 1397
RA4W1
17. DMA DMAC
17.5
DMAC 1 CPU DTC DMACm_INT
17.8 17.13 DMAC0 DMAC3DMAC DMA 17.14
17.8
-- DMACm.DMINT.RPTIE DMACm.DMINT.SARIE
DMACm.DMINT.DARIE
DMACm.DMSTS.DTIF DMACm.DMSTS.ESIF
DMACm.DMINT.DTIE DMACm.DMINT.ESIE
RPTIE
SARIE
DARIE
DTIE DTIF
1
ESIE ESIF
1
DMACm
DMACmDMACm m = 03
17.13
DMAC0 DMAC3
DMA
DMA
DMA
(1) DMA
DMACm.DMSTS.DTIF 0 DMACm.DMSTS.ESIF 0 DMACm DMA DMACm.DMCNT.DTE 1DMA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 364 of 1397
RA4W1
17. DMA DMAC
(2) DMA
DMACm.DMCNT.DTE 1 DMACm.DMSTS.ESIF 0 DMA
DMAC DMAC
?
DMACm.DMCNT.DTE1
DMACm.DMSTS.ESIF
DMACm.DMSTS.ESIFDTIF 0
?
DMACm.DMCNT.DTE1
17.14
DMA DMA
DMAC DMA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 365 of 1397
RA4W1
17. DMA DMAC
17.6
DMAC 1 1 DMACm_INT19. ELC
17.7
DMAST.DMST 0DMAC
(1)
MSTPCRA.MSTPA22 1 DMAC MSTPCRA.MSTPA22 1 DMA DMA MSTPCRA.MSTPA22 1 DMAC MSTPCRA.MSTPA22 0 DMAC
(2)
11.7.1
WFI DMA DMA
(3)
WFI 11.9.6WFI
DMA DMAST.DMST 1 DMAC CPU 14.4.2 CPU WFI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 366 of 1397
RA4W1
17. DMA DMAC
17.8
17.8.1 DMA
DMACm.DMSTS.ACT 1DMAC DMACm.DMCNT.DTE 1DMA
DMSAR DMDAR DMCRA DMCRB DMTMD DMINT DMAMD DMOFR
17.8.2 DMA
DMA 4.
17.8.3 DMAC ICU.DELSRn
DMAC ICU.DELSRnDMA DMACm.DMCNT.DTE 0DMA ICU.DELSRn DTC ICU.IELSRn.DTCE 1 ICU.IELSRn.DTCE ICU.DELSRn 14.ICU
17.8.4 DMA
DMA DMAC ICU.DELSRn.DELS[7:0] 0 DMA 17.3.7DMAC ICU.DELSRn.DELS[7:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 367 of 1397
RA4W1
18. DTC
18. DTC
18.1
MCU DTC 18.1 DTC 18.1
18.1
DTC
CPU
1 1
1 1 256256 � 32 1024
1 1 256 � 32 = 1024
ICU DTC 1 0
0000 0000hFFFF FFFFh 4G
11 8 116 132 11 256
DTCCPU 1 CPU CPU
1 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 368 of 1551
RA4W1
18. DTC
DMAC
DTC
CPU NVIC
DMAC
MRA MRB CRA CRB SAR DAR
DTC
DTC_
DTCEND
DTC
DTCCR DTCVBR DTCST DTCSTS
DTC
ELC 1
DMA
DMA
FCU
SRAM0
MRA MRB CRA CRB SAR DAR
DTC A DTC B DTC A DTC B DTC DTC
DTCCR DTCVBR DTCST DTCSTS
DTC DTC DTC DTC
18.1
DTC
DTC NVICCPU 14.ICU 14.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 369 of 1551
RA4W1
18. DTC
18.2
MRAMRBSARDARCRACRB DTC CPU DTC SRAM DTC SRAM DTC SRAM
18.2.1 DTC AMRA
CPU18.3.1
b7
b6
b5
b4
b3
b2
b1
b0
MD[1:0]
SZ[1:0]
SM[1:0]
--
--
x
x
x
x
x
x
x
x
x
R/W
b1-b0 --
0 --
b3-b2
SM[1:0] b3 b2
--
0 0SAR
SAR
0 1SAR
SAR
1 0SAR
SZ[1:0] = 00b + 1
SZ[1:0] = 01b + 2
SZ[1:0] = 10b + 4
1 1SAR
SZ[1:0] = 00b - 1
SZ[1:0] = 01b - 2
SZ[1:0] = 10b - 4
b5-b4 SZ[1:0] DTC
b5 b4
--
0 08
0 116
1 032
1 1
b7-b6 MD[1:0] DTC
b7 b6
--
0 0
0 1
1 0
1 1
MRA CPU CPU SRAM n + 03hDTC MRA MRA MRA 18.3.1 DTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 370 of 1551
RA4W1
18.2.2 DTC BMRB
CPU18.3.1
b7
b6
b5
b4
b3
b2
b1
b0
CHNE CHNS DISEL DTS
DM[1:0]
--
--
x
x
x
x
x
x
x
x
x
18. DTC
R/W
b1-b0 --
0
--
b3-b2 DM[1:0] b3 b2
--
0 0DAR
DAR
0 1DAR
DAR
1 0DAR
MRA.SZ[1:0] = 00b + 1
SZ[1:0] = 01b + 2
SZ[1:0] = 10b + 4
1 1DAR
MRA.SZ[1:0] = 00b - 1
SZ[1:0] = 01b - 2
SZ[1:0] = 10b - 4
b4
DTS
DTC
0
--
1
b5
DISEL
DTC
0CPU -- 1DTC CPU
b6
CHNS
DTC
0
--
11 0 1 CRAH
b7
CHNE
DTC
0
--
1
MRB CPU CPU SRAM n + 02hDTC MRB MRB MRB 18.3.1 DTC
DTS DTC
CHNS DTC
CHNE 0 CHNS 18.3
CPU
CHNE DTC
CHNS 18.4.6
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 371 of 1551
RA4W1
18. DTC
18.2.3 DTC SAR
CPU18.3.1 b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
SAR SAR CPU CPU SRAM n + 04h DTC SAR SAR 18.3.1 DTC
. DTC MRA.SZ[1:0] = 01b [0] 0 MRA.SZ[1:0] = 10b [1] [0] 0
18.2.4 DTC DAR
CPU18.3.1 b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
DAR CPU CPU SRAM n + 08hDTC DAR DAR 18.3.1 DTC
. DTC MRA.SZ[1:0] = 01b [0] 0 MRA.SZ[1:0] = 10b [1] [0] 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 372 of 1551
RA4W1
18. DTC
18.2.5 DTC ACRA
CPU18.3.1
CRA
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CRAH
CRAL
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
R/W
CRAL
A
--
CRAH
A
--
.
.
CRAH CRAL
CRA CPU CPU SRAM n + 0EhDTC CRA CRA 18.3.1 DTC
(1) MRA.MD[1:0] = 00b
CRA 16 0001h 1 FFFFh 65535 0000h 65536 CRA 1 - 1
(2) MRA.MD[1:0] = 01b
CRAH CRAL 8 01h 1 FFh 255 00h 256 CRAL 1 - 100h CRAH CRAL
(3) MRA.MD[1:0] = 10b
CRAH CRAL 8 01h 1 FFh 255 00h 256 CRAL 1 - 1 00h CRAH CRAL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 373 of 1551
RA4W1
18. DTC
18.2.6 DTC BCRB
CPU18.3.1
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CRB 0001h 1 FFFFh 65535 0000h 65536 CRB 1 - 1 CRB
CRB CPU CPU SRAM n + 0ChDTC CRB CRB 18.3.1 DTC
18.2.7 DTC DTCCR
DTC.DTCCR 4000 5400h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
-- RRS --
--
--
--
0
0
0
0
1
0
0
0
R/W
b2-b0
--
0 0
R/W
b3
--
1 1
R/W
b4
RRS
DTC 0
R/W
1
b7-b5
--
0 0
R/W
RRS DTC
DTC RRS 1 DTC RRS
CRA 0 CRB 0 RRS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 374 of 1551
RA4W1
18. DTC
18.2.8 DTC DTCVBR
DTC.DTCVBR 4000 5404h b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b31-b0
DTC
R/W
DTC 10 0 R/W
DTCVBR DTC 0000 0000h FFFF FFFFh4G 1K
18.2.9 DTC DTCST
DTC.DTCST 4000 540Ch
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- DTCST
0
0
0
0
0
0
0
0
b0
DTCST DTC
b7-b1
--
R/W
0DTC
R/W
1DTC
00
R/W
DTCST DTC
DTC DTCST 1 DTCST 0 0
DTCST 0
18.1011.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 375 of 1551
RA4W1
18. DTC
18.2.10 DTC DTCSTS
DTC.DTCSTS 4000 540Eh
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
ACT --
--
--
--
--
--
--
VECN[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b7-b0
VECN[7:0]
b14-b8 b15
-- ACT
R/W
DTC DTC
R
DTCACT 1
0
R
DTC
0DTC
R
1DTC
VECN[7:0] DTC DTC ACT 1DTC
VECN[7:0] ACT 0DTC VECN[7:0]
ACT DTC DTC 1 DTC
0 DTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 376 of 1551
RA4W1
18. DTC
18.3
DTC ICU.IELSRn.DTCE 1 DTC ICU.IELSRn nn = 0 31 14.ICU 14.4 n DTC ICU.IELSRn.IELS[7:0]n = 0 31 19.2.2 nELSEGRn(n = 0, 1)
DTC DTC DMAC DTC DTC DTCST.DTCST 0 DTC DTCST.DTCST 1
1 DTC
ICU.IELSRn.DTCE 0 CPU
MRB.DISEL 1 CPU
ICU.IELSRn.IR 0
18.3.1 DTC
DTC
10 0 DTC DTCVBRDTC SRAM SRAM n n + 4n
DTC 18.2 SRAM 18.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 377 of 1551
RA4W1
18. DTC
DTCVBR � 4 DTC
+ 4
+ 4(n-1)
DTC
1
2
: : : n
4
1
2 : : :
n 4
18.2
DTC
3
2
MRA MRB
1
0
0
SAR
DAR
CRA
CRB
MRA
MRB
0
SAR
DAR
CRA
CRB
4
1 416
2 416
18.3
SRAM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 378 of 1551
RA4W1
18. DTC
18.4
DTC DTC SRAM DTC DTC DTC DTC DTC DTC SRAM
3
DTC SAR DAR
DTC 18.2
18.2
DTC
1
1 81 16 132
1 81 16
1
132
CRAH
2
1 256 1 256 2 512
1 256 4 1024
124
124
124
1 65536
1 256 3
1 65536
1. 2. 3.
MRB.CHNE 1 1
DTC 18.4 18.3 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 379 of 1551
RA4W1
18. DTC
RRS = 1
RRS = 0 DTC
Yes CHNE = 1
No
MD[1:0] = 01b Yes No
Yes CHNS = 0
No
Yes = 11
No
Yes = 11
No
Yes DISEL = 1
No
ICU.IELSRn.IR
ICU.IELSRn.DTCE
CPU
CPU
1.
18.4
DTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 380 of 1551
RA4W1
18. DTC
18.3
CHNE 0 0 0 1
CHNS -- -- -- 0
1
DISEL
1 2
0
1 0
0
1 0
1
--
--
--
1
1
0
1 *
1
1
--
1 *
1
1
1
1 *
CHNE -- -- -- 0 0 0 -- 0 0 0 --
2 3
CHNS DISEL
12
--
--
--
--
--
--
--
--
--
--
0
1 0
--
0
1 0
--
1
--
--
--
--
--
0
1 0
--
0
1 0
--
1
--
--
--
--
DTC 1 1 CPU
2 2 CPU
1 2 2 CPU
1 CPU
1. 2. 3.
CRA CRAL CRB
1 0 1 CRAH 1 * 2 2 CHNE 1
18.4.1
DTCCR.RRS DTC DTC DTC DTCCR.RRS 1 DTC CRA 0 CRB 0 DTCCR.RRS 18.12
DTC DTCCR.RRS 0 DTC DTCCR.RRS 1 DTCCR.RRS 0 DTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 381 of 1551
RA4W1
18. DTC
18.4.2
MRA.SM[1:0] MRB.DM[1:0] 18.4 CRA CRB MRA MRB
18.4
MRA.SM[1:0]
b3
b2
0
0
0
0
MRB.DM[1:0]
b3
b2
0
0
0
1
SAR
0
1
0
0
0
1
0
1
0
0
1
0
0
0
1
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
1
0
0
1
1
0
1
1
0
1
0
1
0
1
1
1
1
1
0
1
1
1
1
DAR
18.4.3
1 1 8 1 16 1 32 1 65536 CPU
18.5 18.5
18.5
SAR DAR CRA CRB
A B
1 1 CRA - 1
1.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 382 of 1551
RA4W1
18. DTC
SAR
1 2 3 4 5 6
6 1
1 2 3 4 5 6
DAR
18.5
MRA.SM[1:0] = 10b, MRB.DM[1:0] = 10b, CRA = 0006h
18.4.4
1 1 8 1 16 1 32 MRB.DTS 1 256
CRAL 00h CRAL CRAH 00h MRB.DISEL 0 CPU CPU
18.6 18.6
18.6
SAR
DAR
CRAH CRAL CRB
A B
CRAL 1
CRAL 1
1
MRB.DTS = 0 1
MRB.DTS = 1 SAR
1
MRB.DTS = 0 DAR
MRB.DTS = 1 1
CRAH
CRAH
CRAL - 1
CRAH
1.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 383 of 1551
RA4W1
18. DTC
SAR
1 2 3 4
8 1
1 2 3 4 1 2 3 4
DAR
18.6
MRA.SM[1:0] = 10b, MRB.DM[1:0] = 10b, CRAH = 04h
18.4.5
1 1 MRB.DTS 1 256 1 256 2 512 1 256 4 1024 1 CRAL MRB.DTS 1 SAR DTS 0 DAR
1 65536 CPU
18.7 18.7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 384 of 1551
RA4W1
18. DTC
18.7
SAR
DAR
CRAH CRAL CRB
1.
MRB.DTS = 0 1 MRB.DTS = 1 SAR
MRB.DTS = 0 DAR MRB.DTS = 1 1
CRAH
CRAH
CRB - 1
SAR
1 n
DAR
18.7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 385 of 1551
RA4W1
18. DTC
18.4.6
MRB.CHNE 1 1 MRB.CHNE 1 MRB.CHNS 0 CPU MRB.DISEL = 1 CPU DTC CPU ICU.IELSRn.IR
SARDARCRACRBMRA MRB 18.8
DTC
DTC
SRAM
CHNE = 1
CHNE = 0
1 1 2
2
18.8
MRB.CHNE MRB.CHNS 1
18.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 386 of 1551
RA4W1
18. DTC
18.4.7
18.9 18.12
ICU.IELSRn.IR
DTC DTC
RW
18.9
DTC 1
ICU.IELSRn.IR
DTC
DTC
18.10
DTC 2 = 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 387 of 1551
RA4W1
18. DTC
ICU.IELSRn.IR
DTC
DTC
RW
RW
18.11
DTC 3
ICU.IELSRn.IR
(1)
(2)
DTC
DTC
RW
RR W
. 12RRS = 1 2
18.12
SRAM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 388 of 1551
RA4W1
18. DTC
18.4.8 DTC
DTC 1 18.8 18.4.7
18.8
DTC
Cv + 1
0 1
5
4 � Ci + 1 01
3 � Ci + 1 2 � Ci + 1 Ci4
2
3
Cr + 1
Cw + 1
2
Cr + 1
Cw + 1
P � Cr
P � Cw
1. 2. 3. 4. 5.
SAR DAR SAR DAR SAR DAR 2 1
0 1
P CRAH CRAL Cv Ci Cr Cw + 1 2 ICLK CvCiCrCw 42. SRAM43.15.
DTC DTC DTC DTC DTC
18.4.9 DTC
DTC 15.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 389 of 1551
RA4W1
18. DTC
18.5 DTC
DTC DTC DTCVBR 18.13 DTC
ICU.IELSRn.IELS[7:0] 0 NVIC
DTCCR.RRS0
[1] [1] DTCCR.RRS 0 DTC
MRA, MRB, SAR, DAR, CRA, CRB
[2]
[2] MRA, MRB, SAR, DAR, CRA, CRB 18.2
18.3.1DTC
DTC
[3]
[3] DTC DTC 18.3.1
DTC
DTCCR.RRS1
ICU.IELSRn.DTCE1 ICU.IELSRn.IELS
NVIC
[4] DTCCR.RRS 1
[4]
DTC 2
RRS
1 DTC
[5] [5] ICU.IELSRn.DTCE 1 DTC ICU.IELSRn.IELS NVIC 14.4
[6] 1
[6]
DTC
DTC DTCST.DTCST1
[7] DTC DTCST.DTCST 1
[7]
. DTCST.DTCST
18.13
DTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 390 of 1551
RA4W1
18. DTC
18.6 DTC
18.6.1
DTC SCI 128
(1)
MRA MRA.SM[1:0] = 00b MRA.MD[1:0] = 00bMRA.SZ[1:0] = 00bMRB MRB.DM[1:0] = 10b1 1 MRB.CHNE = 0MRB.DISEL = 0MRB.DTS SAR SCI RDR DAR SRAM CRA 128 0080hCRB
(2) DTC
RXI DTC
(3) ICU DTC
ICU.IELSRn.DTCE 1 SCI ICU.IELSRn.IELS NVIC DTCST.DTCST 1
(4) SCI
SCI SCR.RIE 1 RXI SCI CPU
(5) DTC
SCI 1 RXI DTC DTC SCI RDR SRAM DAR CRA
(6)
128 CRA 0 CPU RXI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 391 of 1551
RA4W1
18. DTC
18.6.2
DTC PWM GPT PWM GPT PWM
GPTm.GTCCRC m = 320 323, 164, 165, 168 2 GPTm.GTCCRE 3 GPTm.GTPBR 3 MRB.CHNE = 0
DTC GPT320.GTPR
(1) 1
GPT320.GTCCRC
1. MRA MRA.SM[1:0] = 10b
2. MRA.MD[1:0] = 00bMRA.SZ[1:0] = 10b
3. MRB MRB.DM[1:0] = 00b MRB.CHNE = 1MRB.CHNS = 0
4. SAR
5. DAR GPT320.GTCCRC
6. CRAH CRAL CRB
(2) 2
GPT320.GTCCRE
1. MRA MRA.SM[1:0] = 10b
2. MRA.MD[1:0] = 00bMRA.SZ[1:0] = 10b
3. MRB MRB.DM[1:0] = 00b MRB.CHNE = 1MRB.CHNS = 0
4. SAR
5. DAR GPT320.GTCCRE
6. CRAH CRAL CRB
(3) 3
GPT320.GTPBR
1. MRA MRA.SM[1:0] = 10b
2. MRA.MD[1:0] = 00bMRA.SZ[1:0] = 10b
3. MRB MRB.DM[1:0] = 00b1 1 MRB.CHNE = 0MRB.DISEL = 0MRB.DTS
4. SAR
5. DAR GPT320.GTPBR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 392 of 1551
RA4W1
18. DTC
6. CRA CRB
(4)
GPT320.GTPBR GPT320.GTCCRC GPT320.GTCCRE
(5) DTC
DTC GPT320.GTCCRC GPT320.GTCCRE
(6) ICU DTC
1. GPT320 ICU.IELSRn.DTCE 2. ICU.IELSRn.IELS[7:0] 9761hGPT320 3. DTCST.DTCST 1
(7) GPT
1. GTCCRA GTCCRB GPT320.GTIOR
2. GPT320.GTCCRA GPT320.GTCCRB PWM GPT320.GTCCRC GPT320.GTCCRE PWM
3. GPT320.GTPR PWM GPT320.GTPBR PWM
4. PmnPFS.PDR 1 PmnPFS.PSEL[4:0] 00011b
(8) GPT
GPT320.GTSTR.CSTRT 1 GPT320.GTCNT
(9) DTC
GPT320.GTPR GPT320 PWM GPT320.GTCCRC GPT320.GTCCRE PWM GPT320.GTPBR
(10)
GPT CRA 0 CPU GPT320
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 393 of 1551
RA4W1
18. DTC
18.6.3 = 0
2 1 0 1 2 256
128K 0000h = 0 18.14
1. 1
a. =
b. CRA = 0000h65536
c. MRB.CHNE = 1
d. MRB.CHNS = 1 0
e. MRB.DISEL = 0CPU
2. 1 65536 8 20 0000h 21 FFFFh 21h 20h
3. 2
f. 1
g. 1 DAR8
h. MRB.CHNE = 0
i. MRB.DISEL = 0CPU
j. 20 0000h 21 FFFFh = 2
4. 1 1 65536 1 0 2 1 8 21h 16 1 0000h
5. 1 1 65536 1 1 0 2 1 8 20h 16 1 0000h
6. 4 5 2 CPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 394 of 1551
RA4W1
18. DTC
1
2
= 0
DAR8
18.14
= 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 395 of 1551
RA4W1
18. DTC
18.7
DTC MRB.DISEL 1 DTC CPU CPU NVIC ICU.IELSRn.IELS[7:0] 14. ICU
DTC CPU NVIC
18.8
1 DTC
18.9
DTC SYSTEM.SNZEDCR.DTCZRED SYSTEM.SNZEDCR.DTCNZRED 1 11.8.3
SYSTEM.SNZEDCR.DTCZRED DTC CRA CRB 0
SYSTEM.SNZEDCR.DTCNZRED DTC CRA CRB 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 396 of 1551
RA4W1
18. DTC
18.10
DTCST.DTCST 0 SYSTEM.SNZCR.SNZDTCEN 1 DTC 11.
(1)
MSTPCRA.MSTPA22 1 DTC MSTPCRA.MSTPA22 1 DTC DTC MSTPCRA.MSTPA22 1 DTC
MSTPCRA.MSTPA22 0 DTC
(2)
11.7.1
WFI DTC DTC
MCU 11.8.1 DTC SYSTEM.SNZCR.SNZDTCEN DTC DTCST.DTCST 1 DTC SYSTEM.SNZEDCR.DTCZRED SYSTEM.SNZEDCR.DTCNZRED 1 11.8.3 ICU DTC
(3)
WFI 11.
DTC DTCST.DTCST 1
DTC CPU 14.4.2 CPU WFI DTC DTC
18.11
18.11.1
4n 4n 2 00b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 397 of 1551
RA4W1
19. ELC
19. ELC
19.1
ELC CPU
19.1 ELC 19.1
19.1
ELC
135ELC DTC
ELC
PORT_IRQn (n = 04, 6, 7, 9, 11, 14, 15)
DMAC
DTC
LVD
SYSTEM_SNZREQ MOSC_STOP
1, 2, 3, 4
ELSEGR0, 1
ELCR
ELSRn
ELSEGR0, 1
ELCR
ELSRn
n
19.1
ELC n = 0 91214 18
DTC
GPT ADC14 DAC12 1, 2, 3, 4 CTSU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 398 of 1551
RA4W1
19. ELC
19.2 19.2.1 ELCR
ELC.ELCR 4004 1000h
b7
b6
b5
b4
b3
b2
b1
b0
ELCON --
--
--
--
--
--
--
0
0
0
0
0
0
0
0
b6-b0 b7
-- ELCON
R/W
0 0
R/W
0ELC
R/W
1ELC
ELCR ELC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 399 of 1551
RA4W1
19. ELC
19.2.2 nELSEGRn(n = 0, 1)
ELC.ELSEGR0 4004 1002h, ELC.ELSEGR1 4004 1004h
b7
b6
b5
b4
b3
b2
b1
b0
WI
WE
--
--
--
--
-- SEG
1
0
0
0
0
0
0
0
R/W
b0
SEG
0
W
1
b5-b1
--
0 0
R/W
b6
WE
SEG
0SEG
R/W
1SEG
b7
WI
ELSEGR 0ELSEGR
W
1ELSEGR
SEG
WE 1 1 0 1 WE 1
DTC
WE SEG WE 1 SEG WI 0
1 WI 0 1
0 WI 0 0
WI ELSEGR
WI 0 ELSEGR 1 WI 0 WE SEG
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 400 of 1551
RA4W1
19. ELC
19.2.3 nELSRn(n = 0 9, 12, 14 18)
ELC.ELSR0 4004 1010h, ELC.ELSR1 4004 1014h, ELC.ELSR2 4004 1018h, ELC.ELSR3 4004 101Ch, ELC.ELSR4 4004 1020h,
ELC.ELSR5 4004 1024h, ELC.ELSR6 4004 1028h, ELC.ELSR7 4004 102Ch, ELC.ELSR8 4004 1030h, ELC.ELSR9 4004 1034h, ELC.ELSR12 4004 1040h, ELC.ELSR14 4004 1048h, ELC.ELSR15 4004 104Ch, ELC.ELSR16 4004 1050h, ELC.ELSR17 4004 1054h, ELC.ELSR18 4004 1058h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
ELS[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b7-b0
ELS[7:0]
b15-b8
--
R/W
b7
b0
00000000
R/W
00000001 11010100
0 0
R/W
ELSRn ELSRn 19.2 ELSRn 19.3
19.2
ELSR0 ELSR1 ELSR2 ELSR3 ELSR4 ELSR5 ELSR6 ELSR7 ELSR8 ELSR9 ELSR12 ELSR14 ELSR15 ELSR16 ELSR17 ELSR18
ELSRn
GPT (A) GPT (B) GPT (C) GPT (D) GPT (E) GPT (F) GPT (G) GPT (H) ADC14A ADC14B DAC12 PORT 1 PORT 2 PORT 3 PORT 4 CTSU
ELC_GPTA ELC_GPTB ELC_GPTC ELC_GPTD ELC_GPTE ELC_GPTF ELC_GPTG ELC_GPTH ELC_AD00 ELC_AD01 ELC_DA0 ELC_PORT1 ELC_PORT2 ELC_PORT3 ELC_PORT4 ELC_CTSU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 401 of 1551
RA4W1
19. ELC
19.3
ELSRn.ELS (1/4)
001h 002h 003h 004h 005h 007h 008h 00Ah 00Ch 00Fh 010h 011h 012h 013h 014h 016h 019h 01Ch 01Dh 01Eh 01Fh 020h 021h 022h 023h 024h 025h 027h 029h 02Dh 02Eh 02Fh 030h 035h 036h 037h 038h 03Ah 03Bh 03Ch 03Dh 04Ah
DMAC0 DMAC1 DMAC2 DMAC3 DTC LVD MOSC AGT0
AGT1
IWDT WDT RTC ADC140
ACMPLP IIC0
IIC1
DOC
PORT_IRQ0 1 PORT_IRQ1 1 PORT_IRQ2 1 PORT_IRQ3 1 PORT_IRQ4 1 PORT_IRQ6 1 PORT_IRQ7 1 PORT_IRQ9 1 PORT_IRQ11 1 PORT_IRQ14 1 PORT_IRQ15 1 DMAC0_INT DMAC1_INT DMAC2_INT DMAC3_INT DTC_DTCEND 3 LVD_LVD1 MOSC_STOP SYSTEM_SNZREQ 2 3 AGT0_AGTI AGT0_AGTCMAI AGT0_AGTCMBI AGT1_AGTI AGT1_AGTCMAI AGT1_AGTCMBI IWDT_NMIUNDF WDT_NMIUNDF RTC_PRD ADC140_ADI ADC140_WCMPM 3 ADC140_WCMPUM 3 ACMP_LP0 ACMP_LP1 IIC0_RXI IIC0_TXI IIC0_TEI IIC0_EEI IIC1_RXI IIC1_TXI IIC1_TEI IIC1_EEI DOC_DOPCI 3
0 1 2 3 4 6 7 9 11 14 15 DMAC 0 DMAC 1 DMAC 2 DMAC 3 DTC 1 AGT A B AGT A B IWDT WDT A/D 0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 402 of 1551
RA4W1
19. ELC
19.3
ELSRn.ELS (2/4)
053h 054h 055h 056h 057h 058h 05Bh 05Ch 05Dh 05Eh 05Fh 060h 061h 062h 063h 064h 065h 066h 067h 068h 069h 06Ah 06Bh 06Ch 06Dh 06Eh 06Fh 070h 071h 072h 073h 074h 075h 076h 077h 078h 079h 07Ah
I/O ELC GPT320
GPT321
GPT322
GPT323
IOPORT_GROUP1 IOPORT_GROUP2 IOPORT_GROUP3 IOPORT_GROUP4 ELC_SWEVT0 ELC_SWEVT1 GPT0_CCMPA GPT0_CCMPB GPT0_CMPC GPT0_CMPD GPT0_CMPE GPT0_CMPF GPT0_OVF GPT0_UDF GPT1_CCMPA GPT1_CCMPB GPT1_CMPC GPT1_CMPD GPT1_CMPE GPT1_CMPF GPT1_OVF GPT1_UDF GPT2_CCMPA GPT2_CCMPB GPT2_CMPC GPT2_CMPD GPT2_CMPE GPT2_CMPF GPT2_OVF GPT2_UDF GPT3_CCMPA GPT3_CCMPB GPT3_CMPC GPT3_CMPD GPT3_CMPE GPT3_CMPF GPT3_OVF GPT3_UDF
1 2 3 4 0 1 A B C D E F A B C D E F A B C D E F A B C D E F
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 403 of 1551
RA4W1
19. ELC
19.3
ELSRn.ELS (3/4)
07Bh 07Ch 07Dh 07Eh 07Fh 080h 081h 082h 083h 084h 085h 086h 087h 088h 089h 08Ah 09Bh 09Ch 09Dh 09Eh 09Fh 0A0h 0A1h 0A2h 0ABh 0ACh 0ADh 0AEh 0AFh 0B0h 0B2h 0B3h 0B4h 0B5h 0B6h 0C1h 0C2h 0C3h 0C4h 0C5h 0C6h 0C7h 0C8h 0C9h 0CAh
GPT164
GPT165
GPT168
GPT SCI0 SCI1 SCI4 SCI9
GPT4_CCMPA GPT4_CCMPB GPT4_CMPC GPT4_CMPD GPT4_CMPE GPT4_CMPF GPT4_OVF GPT4_UDF GPT5_CCMPA GPT5_CCMPB GPT5_CMPC GPT5_CMPD GPT5_CMPE GPT5_CMPF GPT5_OVF GPT5_UDF GPT8_CCMPA GPT8_CCMPB GPT8_CMPC GPT8_CMPD GPT8_CMPE GPT8_CMPF GPT8_OVF GPT8_UDF GPT_UVWEDGE SCI0_RXI 4 SCI0_TXI 4 SCI0_TEI SCI0_ERI 4 SCI0_AM SCI1_RXI 4 SCI1_TXI 4 SCI1_TEI SCI1_ERI 4 SCI1_AM SCI4_RXI 4 SCI4_TXI 4 SCI4_TEI SCI4_ERI 4 SCI4_AM SCI9_RXI 4 SCI9_TXI 4 SCI9_TEI SCI9_ERI 4 SCI9_AM
A B C D E F
A B C D E F
A B C D E F
UVW
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 404 of 1551
RA4W1
19. ELC
19.3
ELSRn.ELS (4/4)
0CBh 0CCh 0CDh 0CEh 0CFh 0D0h 0D1h 0D2h 0D3h 0D4h
SPI0
SPI1
SPI0_SPRI SPI0_SPTI SPI0_SPII SPI0_SPEI SPI0_SPTEND SPI1_SPRI SPI1_SPTI SPI1_SPII SPI1_SPEI SPI1_SPTEND
1. 2.
3. 4.
ELSR89 ELSR14 ELSR18
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 405 of 1551
RA4W1
19. ELC
19.3
19.3.1
19.3.2
ELSRn 19.4
19.4
GPT
ADC14 DAC12 I/O
CTSU DTC
A/D
D/A
EORREOSR EIDR ELC
PORT 1 PORT 2 PORT 3 PORT 4
DTC
19.3.3
1.
2. ELSRn
3. ELCR.ELCON 1
4. 2
5. ELSRn.ELS[7:0] 00000000b ELCR.ELCON 0
RTC RTC ELC ELC RTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 406 of 1551
RA4W1
19. ELC
19.4
19.4.1 DMAC DTC
DMAC DTC DMAC DTC DMAC DTC
19.4.2
ELC 19.3 11.
19.4.3
CMSTPCRCELC ELC ELC ELCON 0 11.
19.4.4 ELC
19.2 A ELC B A B ELC ELC 19.5 ELC
A B 0 A B ELC A B
A
= clock_A
B
ELC
= clock_B
19.2
ELC
19.5
ELC
clock_A = clock_B clock_A clock_B
R01UH0883JJ0100 Rev.1.00 2020.08.31
clock_A = clock_B clock_A = clock_B clock_A clock_B clock_A clock_B
ELC 0 1 2 B 1 2 A 1 2
Page 407 of 1551
RA4W1
20. I/O
20. I/O
20.1
I/O ELC I/O 20.1 I/O I/O 20.1 I/O 20.2 I/O
ELC
ELC
or
PCR
PDR DSCR, NCODR
EOSR POSR
PORR EORR
PODR
1 0
1 0
PSEL PMR
EIDR PIDR ISEL ASEL
EOF, EOR
20.1
I/O
.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 408 of 1551
RA4W1
20. I/O
20.1
I/O
0 1 2 3 4 5 9
P004, P010, P011, P014, P015
56
P100 P111
P200, P201, P204 P206, P212 P215 P300
P402, P404, P407, P409, P414
P501
P914, P915
5
12 9 1 5 1 2
35
20.2
0 1 2
3 4
5 9
I/O
P004, P010, P011, P014, P015 P100 P111 P200, P214, P215 P201, P204 P205, P206 P212, P213 P300 P402, P407 P404, P409, P414 P501 P914, P915
--
--
--
--
--
-- -- --
5V -- -- -- -- -- -- -- -- --
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 409 of 1551
RA4W1
20. I/O
20.2 20.2.1 1PCNTR1/PODR/PDR
PORT0.PCNTR1 4004 0000h, PORT1.PCNTR1 4004 0020h, PORT2.PCNTR1 4004 0040h, PORT3.PCNTR1 4004 0060h, PORT4.PCNTR1 4004 0080h, PORT5.PCNTR1 4004 00A0h, PORT9.PCNTR1 4004 0120h
PORT0.PODR 4004 0000h, PORT1.PODR 4004 0020h, PORT2.PODR 4004 0040h, PORT3.PODR 4004 0060h, PORT4.PODR 4004 0080h, PORT5.PODR 4004 00A0h, PORT9.PODR 4004 0120h,
PORT0.PDR 4004 0002h, PORT1.PDR 4004 0022h, PORT2.PDR 4004 0042h, PORT3.PDR 4004 0062h, PORT4.PDR 4004 0082h, PORT5.PDR 4004 00A2h, PORT9.PDR 4004 0122h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
PODR PODR PODR PODR PODR PODR PODR PODR PODR PODR PODR PODR PODR PODR PODR PODR
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
PDR15 PDR14 PDR13 PDR12 PDR11 PDR10 PDR09 PDR08 PDR07 PDR06 PDR05 PDR04 PDR03 PDR02 PDR01 PDR00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b15-b0
PDRn
Pmn
0
R/W
1
b31-b16 PODRn
Pmn
0Low
R/W
1High
m = 0 5, 9 n = 00 15
1PCNTR1/PODR/PDR32 16
PCNTR1 32 PODRn PCNTR1 [31:16] PDRnPCNTR1 [15:0] 16
PDRn m PORTm.PCNTR1.PDRn 1 0 0 P200P214P215 PORT2.PCNTR1.PDR00 PORT2.PCNTR1.PDR14 PORT2.PCNTR1.PDR15 PORTm.PCNTR1 PDRn PFS.PmnPFS PDR
PODRn m 0 P200P214P215 PORT2.PCNTR1.PODR00PORT2.PCNTR1.PODR14 PORT2.PCNTR1.PODR15 0 0 PORTm.PCNTR1 PODRn PFS.PmnPFS PODR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 410 of 1551
RA4W1
20. I/O
20.2.2 2PCNTR2/EIDR/PIDR
PORT0.PCNTR2 4004 0004h, PORT1.PCNTR2 4004 0024h, PORT2.PCNTR2 4004 0044h, PORT3.PCNTR2 4004 0064h, PORT4.PCNTR2 4004 0084h, PORT5.PCNTR2 4004 00A4h, PORT9.PCNTR2 4004 0124h
PORT1.EIDR 4004 0024h, PORT2.EIDR 4004 0044h, PORT3.EIDR 4004 0064h, PORT4.EIDR 4004 0084h,
PORT0.PIDR 4004 0006h, PORT1.PIDR 4004 0026h, PORT2.PIDR 4004 0046h, PORT3.PIDR 4004 0066h, PORT4.PIDR 4004 0086h, PORT5.PIDR 4004 00A6h, PORT9.PIDR 4004 0126h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
EIDR15 EIDR14 EIDR13 EIDR12 EIDR11 EIDR10 EIDR09 EIDR08 EIDR07 EIDR06 EIDR05 EIDR04 EIDR03 EIDR02 EIDR01 EIDR00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
PIDR15 PIDR14 PIDR13 PIDR12 PIDR11 PIDR10 PIDR09 PIDR08 PIDR07 PIDR06 PIDR05 PIDR04 PIDR03 PIDR02 PIDR01 PIDR00
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
R/W
b15-b0
PIDRn
Pmn
0Low
R
1High
b31-b16 EIDRn
1
ELC_PORTx
R
0Low
1High
m = 0 5, 9 n = 00 15 x = 14 1. 1 4
2PCNTR2/EIDR/PIDR32 16 Pmn
PCNTR2 Pmn 32 EIDRnPCNTR2 [31:16] PIDRnPCNTR2 [15:0] 16
PIDRn PmnPFS.PMR PmnPFS.PDR PORTm.PCNTR2 PIDRn PFS.PmnPFS PIDR
PIDRn
MOSC
SOSC
CS CSC
ASEL = 1
CTSU
LCD SLCDC
USB2.0 USBFS
EIDRn ELC_PORTx PmnPFS.PMR PmnPFS.PDR 0 EIDRn PmnPFS.ASEL 1 EIDRn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 411 of 1551
RA4W1
20. I/O
20.2.3 3PCNTR3/PORR/POSR
PORT0.PCNTR3 4004 0008h, PORT1.PCNTR3 4004 0028h, PORT2.PCNTR3 4004 0048h, PORT3.PCNTR3 4004 0068h, PORT4.PCNTR3 4004 0088h, PORT5.PCNTR3 4004 00A8h, PORT9.PCNTR3 4004 0128h
PORT0.PORR 4004 0008h, PORT1.PORR 4004 0028h, PORT2.PORR 4004 0048h, PORT3.PORR 4004 0068h, PORT4.PORR 4004 0088h, PORT5.PORR 4004 00A8h, PORT9.PORR 4004 0128h,
PORT0.POSR 4004 000Ah, PORT1.POSR 4004 002Ah, PORT2.POSR 4004 004Ah, PORT3.POSR 4004 006Ah, PORT4.POSR 4004 008Ah, PORT5.POSR 4004 00AAh, PORT9.POSR 4004 012Ah
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
PORR PORR PORR PORR PORR PORR PORR PORR PORR PORR PORR PORR PORR PORR PORR PORR
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
POSR POSR POSR POSR POSR POSR POSR POSR POSR POSR POSR POSR POSR POSR POSR POSR
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b15-b0
POSRn
Pmn
0
W
1High
b31-b16 PORRn
Pmn
0
W
1Low
m = 0 5, 9
n = 00 15
.
EORRn EOSRn PODRnPORRn POSRn
.
PORRn POSRn
3PCNTR3/PORR/POSR32 16
PCNTR3 32
PORRPCNTR3 [31:16] POSRPCNTR3 [15:0] 16
POSR PODR P100 PORT1.PCNTR3.POSR00 = 1 PORT1.PCNTR1.PODR00 1 0 P200P214P215 PORT2.PCNTR3.POSR00PORT2.PCNTR3.POSR14PORT2.PCNTR3.POSR15
PORR PODR P100 PORT1.PCNTR3.PORR00 = 1 PORT1.PCNTR1.PODR00 0 0 P200P214P215 PORT2.PCNTR3.PORR00PORT2.PCNTR3.PORR14PORT2.PCNTR3.PORR15
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 412 of 1551
RA4W1
20. I/O
20.2.4 4PCNTR4/EORR/EOSR
PORT1.PCNTR4 4004 002Ch, PORT2.PCNTR4 4004 004Ch, PORT3.PCNTR4 4004 006Ch, PORT4.PCNTR4 4004 008Ch PORT1.EORR 4004 002Ch, PORT2.EORR 4004 004Ch, PORT3.EORR 4004 006Ch, PORT4.EORR 4004 008Ch, PORT1.EOSR 4004 002Eh, PORT2.EOSR 4004 004Eh, PORT3.EOSR 4004 006Eh, PORT4.EOSR 4004 008Eh
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
EORR EORR EORR EORR EORR EORR EORR EORR EORR EORR EORR EORR EORR EORR EORR EORR
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
EOSR EOSR EOSR EOSR EOSR EOSR EOSR EOSR EOSR EOSR EOSR EOSR EOSR EOSR EOSR EOSR
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b15-b0
EOSRn
Pmn
ELC_PORTx
R/W
0
1High
b31-b16 EORRn
Pmn
ELC_PORTx
R/W
0
1Low
m = 14
n = 00 15
x = 14
.
EORRn EOSRn PODRnPORRn POSRn
.
EORRn EOSRn
4 32 16 ELC
PCNTR4 ELC 32
EORRPCNTR4 [31:16] EOSRPCNTR4 [15:0] 16
EOSR ELC_PORTx PODR P100 ELC_PORTx PORT1.PCNTR4.EOSR00 1 PORT1.PCNTR1.PODR00 1 0 P200P214P215 PORT2.PCNTR4.EOSR00PORT2.PCNTR4.EOSR14 PORT2.PCNTR4.EOSR15
EORR ELC_PORTx PODR P100 ELC_PORTx PORT1.PCNTR4.EORR00 1 PORT1.PCNTR1.PODR00 0 0 P200P214P215 PORT2.PCNTR4.EORR00 PORT2.PCNTR4.EORR14PORT2.PCNTR4.EORR15
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 413 of 1551
RA4W1
20. I/O
20.2.5
mn PmnPFS/PmnPFS_HA/PmnPFS_BY(m = 0 5, 9; n = 00 15)
PFS.P004PFS 4004 0810h, PFS.P010PFS 4004 0828h, PFS.P011PFS 4004 082Ch, PFS.P014PFS 4004 0838h, PFS.P015PFS 4004 083Ch, PFS.P100PFS 4004 0840h PFS.P111PFS 4004 086Ch, PFS.P200PFS 4004 0880h, PFS.P201PFS 4004 0884h, PFS.P204PFS 4004 0890h PFS.P206PFS 4004 0898h, PFS.P212PFS 4004 08B0h PFS.P215PFS 4004 08BCh, PFS.P300PFS 4004 08C0h, PFS.P402PFS 4004 0908h, PFS.P404PFS 4004 0910h, PFS.P407PFS 4004 091Ch, PFS.P409PFS 4004 0924h, PFS.P414PFS 4004 0938h, PFS.P501PFS 4004 0944h, PFS.P914PFS 4004 0A78h, PFS.P915PFS 4004 0A7Ch,
PFS.P004PFS_HA 4004 0812h, PFS.P010PFS_HA 4004 082Ah, PFS.P011PFS_HA 4004 082Eh, PFS.P014PFS_HA 4004 083Ah, PFS.P015PFS_HA 4004 083Eh, PFS.P100PFS_HA 4004 0842h PFS.P111PFS_HA 4004 086Eh, PFS.P200PFS_HA 4004 0882h, PFS.P201PFS_HA 4004 0886h, PFS.P204PFS_HA 4004 0892h PFS.P206PFS_HA 4004 089Ah, PFS.P212PFS_HA 4004 08B2h PFS.P215PFS_HA 4004 08BEh, PFS.P300PFS_HA 4004 08C2h, PFS.P402PFS_HA 4004 090Ah, PFS.P404PFS_HA 4004 0912h, PFS.P407PFS_HA 4004 091Eh, PFS.P409PFS_HA 4004 0926h, PFS.P414PFS_HA 4004 093Ah, PFS.P501PFS_HA 4004 0946h, PFS.P914PFS_HA 4004 0A7Ah, PFS.P915PFS_HA 4004 0A7Eh,
PFS.P004PFS_BY 4004 0813h, PFS.P004PFS_BY 4004 082Bh, PFS.P004PFS_BY 4004 082Fh, PFS.P004PFS_BY 4004 083Bh, PFS.P015PFS_BY 4004 083Fh, PFS.P100PFS_BY 4004 0843h PFS.P004PFS_BY 4004 086Fh, PFS.P200PFS_BY 4004 0883h, PFS.P201PFS_BY 4004 0887h, PFS.P204PFS_BY 4004 0893h PFS.P206PFS_BY 4004 089Bh, PFS.P212PFS_BY 4004 08B3h PFS.P215PFS_BY 4004 08BFh, PFS.P300PFS_BY 4004 08C3h, PFS.P402PFS_BY 4004 090Bh, PFS.P404PFS_BY 4004 0913h, PFS.P407PFS_BY 4004 091Fh, PFS.P409PFS_BY 4004 0927h, PFS.P414PFS_BY 4004 093Bh, PFS.P501PFS_BY 4004 0947h, PFS.P914PFS_BY 4004 0A7Bh, PFS.P915PFS_BY 4004 0A7Fh
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
PSEL[4:0]
--
--
--
--
--
--
-- PMR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 02
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
ASEL ISEL EOF EOR -- DSCR --
--
--
NCOD R
--
PCR
--
PDR PIDR PODR
0
0
0
0
0 02 0
0
0
0
0 02 0
0
x
0
x
R/W
b0
PODR
0Low
R/W
1High
b1
PIDR
0Low
R
1High
b2
PDR
0
R/W
1
b3
--
00 R/W
b4
PCR
0
R/W
1
b5
--
00 R/W
b6
NCODR
N
0CMOS
R/W
1NMOS
b9-b7
--
00 R/W
b10
DSCR
0
R/W
1
b11
--
00 R/W
b13-b12 EOF/EOR
b13 b12
1
0 0Don't care
0 1
R/W
1 0
1 1
b14
ISEL
IRQ
0IRQn
R/W
1IRQn
b15
ASEL
0
R/W
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 414 of 1551
RA4W1
20. I/O
R/W
b16
PMR
0
R/W
1
b23-b17 --
00 R/W
b28-b24 PSEL[4:0]
R/W
b31-b29 --
00 R/W
1. 2.
1 4 P108P109P110P201P300P914P915 0000_0000h P108 0001_0010hP109 0001_0000hP110 0001_0010hP201 0000_0010hP300 0001_0010hP914 0001_0000hP915 0001_0000h mn PmnPFS
mn PmnPFS/PmnPFS_HA/PmnPFS_BY32 16 8 PmnPFS mn 32 PmnPFS_HAPmnPFS [15:0] 16 PmnPFS_BY [7:0] 8
PDR PIDR PODR PCNTR PCNTR
PCR PORTm.PCR 1 PCR 0 0
NCODR 0 0
DSCR 0 0
EOF/EOR EOR/EOF 01b10b 11b GPIO ELC 0 0
ISEL IRQ IRQn 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 415 of 1551
RA4W1
20. I/O
ASEL
1. PmnPFS.PMR
2. PmnPFS.PCR
3. PmnPFS.PDR PmnPFS PWPR
IRQn ISEL ASEL
PMR 0 0
PSEL[4:0]
20.6
20.2.6 PWPR
PMISC.PWPR 4004 0D03h
b7
b6
b5
b4
b3
b2
b1
b0
B0WI PFSWE --
--
--
--
--
--
1
0
0
0
0
0
0
0
R/W
b5-b0
--
0 0
R/W
b6
PFSWE PmnPFS
0PmnPFS
R/W
1PmnPFS
b7
B0WI
PFSWE
0PFSWE
R/W
1PFSWE
PFSWE PmnPFS PFSWE 1 PmnPFS B0WI
0 PFSWE 1
B0WI PFSWE B0WI 0 PFSWE
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 416 of 1551
RA4W1
20. I/O
20.3
20.3.1
P108P109P110P300P914P915 16 PCNTRnn = 1 4 20.2
PDRn PODRn PIDRn EIDRnELC_PORT1, 2, 3, 4 POSRn PORRn EOSRnELC_PORT1, 2, 3, 4 EORRnELC_PORT1, 2, 3, 4
20.3.2
PmnPFSPODRPIDRPDR PmnPFS PCR MOS NCODR N DSCR EOR EOF ISELIRQ IRQ ASEL PMR PSEL
20.2.5 mn PmnPFS/PmnPFS_HA/PmnPFS_BY(m = 0 5, 9; n = 00 15)
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 417 of 1551
RA4W1
20. I/O
20.3.3 ELC
MCU 1 4
20.3.3.1 ELC ELC_PORT1, 2, 3, 4
MCU ELC ELC_PORT1, 2, 3, 4 2
(1) EIDR
GPI PmnPFS PDR = 0 PMR = 0ELC ELC_PORT1, 2, 3, 4 EIDR
GPO PDR = 1PMR = 1 EIDR 0
ELC
ELC_PORT 1, 2, 3, 4
EIDR en
PAD
20.2
(2) EOSR/EORR PODR
ELC_PORT1, 2, 3, 4 EOSR/EORR PODR
EOSR 1 ELC_PORT1, 2, 3, 4 PODR 1 EOSR = 0 PODR
EORR 1 ELC_PORT1, 2, 3, 4 PODR 0 EORR = 0 PODR
EOSR ELC
EORR
20.3
ELC_PORT1, 2, 3, 4
PODR en
PAD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 418 of 1551
RA4W1
20. I/O
20.3.3.2 ELC
ELC PmnPFS.EOR/EOF 20.2.5 mn PmnPFS/PmnPFS_HA/PmnPFS_BY(m = 0 5, 9; n = 00 15) EOR/EOF
1 P100 P111 12 OR ELC 2 4
EOR
ELC
EOF
20.4
IOPORT_ GROUP 1, 2, 3, 4
PAD
PAD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 419 of 1551
RA4W1
20.4
20.3
20. I/O
20.3
P201/MD RES USB_DP, USB_DM
P200/NMI P212/EXTAL
P213/XTAL
P215/XCIN
P214/XCOUT
P004, P010, P011, P014, P015 P1x P9x P200, P201, P212 P215
VCC
P914PFS.PMRP915PFS.PMR 1 P914PFS.PMRP915PFS.PMR 0 1 9
VCC
MOSCCR.MOSTP 1 P212 P212 1 9
MOSCCR.MOSTP 1 P213 P213 1 9 EXTAL
SOSCCR.SOSTP 1P215 P215 1 9
SOSCCR.SOSTP 1P214 P214 1 9
PCNTR1.PDRn = 0 AVCC0 AVSS0 1
PCNTR1.PDRn = 0 VCC VSS 12 PCNTR1.PDRn = 113
1. 2. 3.
PmnPFS.PMR PmnPFS.ISEL PmnPFS.PCR PmnPFS.ASEL 0
P108P110 P300 PmnPFS.PCR = 1 VCC P109 PCNTR1.PDRn = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 420 of 1551
RA4W1
20. I/O
20.5 20.5.1
1. PWPR.B0WI PWPR.PFSWE 2. PWPR.PFSWE 1 PmnPFS 3. PMR 4. PmnPFS.PSEL[4:0] 5. PMR 1 6. PWPR.PFSWE PmnPFS 7. PWPR.B0WI 1 PWPR.PFSWE
20.5.2
1 4 1. ELSRx.ELS[7:0] 00000000b 19.
ELC 2. PmnPFS.EOF/EOR
3. 100ns
4. ELSRx.ELS[8:0]
20.5.3 PODR
1. ELC_PORT1, 2, 3, 4 PCNTR4.EORR 1 0 2. PCNTR4.EOSR 1 ELC ELC_PORT1, 2, 3, 4 1 3. PCNTR3.PORR 1 0 4. PCNTR3.POSR 1 1 5. PCNTR1.PODR 0 1 6. PmnPFS.PODR 0 1
PODR 1. 3. 1.
20.5.4
PMRPDR 0 mn ASEL 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 421 of 1551
RA4W1
20. I/O
20.5.5
P402 I/O VBTCR1.BPWSWSTP 1 VBTCR1.BPWSWSTP 0
VBTCR1.BPWSWSTP 12.2
P402 RTC RTCIC0 VBTICTLR VBTICTLR 0
. VBTICTLR 12.
20.5.6 USB_DP USB_DM
USB_DP P914 USB_DM P915 USB_DP P914 PFS.P914PFS.PMR USB_DM P915 PFS.P915PFS.PMR 20.4 PFS.P914PFS.PMR PFS.P915PFS.PMR
20.4
USBPORT
PMR
P914PFS.PMR
P915PFS.PMR
0
0
0
1
1
0
1
1
P914/USB_DP
P915/USB_DM
P914
P915
P914
P915
P914
P915
USB_DP
USB_DM
. P914/USB_DP P915/USB_DM GPIO P914 P915USB
. P914/USB_DP P915/USB_DM USB USB_DP USB_DMP914
P915 GPIO . P914/USB_DP P915/USB_DM GPIO USB
1
20.5.7 USBFS/GPIO P914 P915
P914 P915 GPIO USBFS
GPIO SYSCFG.DMRPUSYSCFG.DPRPU SYSCFG.DRPD USBFS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 422 of 1551
RA4W1
20. I/O
20.6
PmnPFS 2
20.5
0
PSEL[4:0]
00000b
Hi-Z/JTAG/SWD
01100b
CTSU
ASEL
P004 Hi-Z
-- AN004/ AMP2O
ISEL PCR DSCR
IRQ3
P010
TS30 AN005/ VREFH0/ AMP2IRQ14
P011
TS31 AN006/ VREFL0/ AMP2+ IRQ15
P014
-- AN009/ DA0
--
P015
TS28 AN010
IRQ7
20.6
11
PSEL[4:0]
00000b
Hi-Z/JTAG/SWD
00001b
AGT
00010b
GPT
00011b
GPT
00100b
SCI
00101b
SCI
P100 Hi-Z
AGTIO0 GTETRGA GTIOC5B RXD0/ MISO0/ SCL0 SCK1
00110b 00111b 01000b 01001b
01010b 01100b 01101b 10000h ASEL
SPI
IIC
KINT
CLKOUT/ ACMPLP/ RTC
CAC/ADC14
CTSU
SLCDC
CAN
ISEL NCODR PCR DSCR
MISOA SCL1 KR00
VL1 CMPIN0
IRQ2
P101
P102
AGTEE0 GTETRGB GTIOC5A TXD0/ MOSI0/ SDA0 CTS1_RTS1/ SS1
MOSIA SDA1 KR01
AGTO0 GTOWLO GTIOC2B SCK0
TXD2/ MOSI2/ SDA2 RSPCKA KR02
VL2 CMPREF0
IRQ1
ADTRG0 CRX0 AN020/ CMPIN1
P103
P104
GTOWUP GTIOC2A CTS0_RTS0/ SS0
GTETRGB
GTIOC1B
RXD0/ MISO0/ SCL0
SSLA0 KR03
SSLA1 KR04
VL4 CTX0 AN019/ CMPREF1
TS13 COM0
IRQ1
--
P105
GTETRGA GTIOC1A
SSLA2 KR05
TS34 COM1
IRQ0
P106
GTIOC8B
SSLA3 KR06
COM2
P107
GTIOC8A
KR07
COM3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 423 of 1551
RA4W1
20.7
12
PSEL[4:0]
00000b
Hi-Z/JTAG/SWD
00001b
AGT
00010b
GPT
00011b
GPT
00100b
SCI
00101b
SCI
00110b 00111b 01000b 01001b
01010b 01100b 01101b 10000b ASEL ISEL NCODR PCR DSCR
SPI
IIC
KINT
CLKOUT/ ACMPLP/ RTC
CAC/ADC14
CTSU
SLCDC
CAN
P108 TMS/ SWDIO GTOULO GTIOC0B
CTS9_RTS9/ SS9
SSLB0
P109
P110
TDO/
TDI
TRACESWO
GTOVUP
GTOVLO
GTIOC1A
GTIOC1B
SCK1
CTS2_RTS2/ SS2
TXD9/ MOSI9/ SDA9
RXD9/ MISO9/ SCL9
MOSIB
MISOB
CLKOUT
VCOUT
TS10 SEG52 CTX0
SEG53 CRX0 IRQ3
P111 Hi-Z
GTIOC3A SCK2
SCK9
RSPCKB
TS12 IRQ4
--
20. I/O
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 424 of 1551
RA4W1
20.8
21
PSEL[4:0]
00000b
Hi-Z/JTAG/SWD
00001b
AGT
00010b
GPT
00011b
GPT
00100b
SCI
P200 Hi-Z
00101b
SCI
00110b 00111b 01001b
01010b 01100b 01101b 10011b
SPI
IIC
CLKOUT/
ACMPLP/
RTC
CAC/ADC14
CTSU
SLCDC
USBFS
ISEL
NMI
NCODR
PCR
DSCR
P201
P204
P205
P206
AGTIO1 GTIW GTIOC4B SCK4
SCK9
RSPCKB SCL0
AGTO1
GTIV
GTIOC4A
TXD4/ MOSI4/ SDA4
CTS9_RTS9/ SS9
SSLB0
SCL1
CLKOUT
GTIU RXD4/ MISO4/ SCL4
SSLB1 SDA1
CACREF
TS00
TSCAP
TS01
SEG23
SEG20
SEG12
USB_OVRCUR USB_OVRCUR USB_VBUSEN
B
A
IRQ1
IRQ0
--
20.9
22
PSEL[4:0]
00000b
Hi-Z/JTAG/SWD
00001b
AGT
00010b
GPT
00011b
GPT
00100b
SCI
00101b
SCI
00110b 00111b 01001b
01010b 01100b 01101b 10011b ISEL NCODR PCR DSCR
SPI
IIC
CLKOUT/ ACMPLP/ RTC
CAC/ADC14
CTSU
SLCDC
USBFS
P212 Hi-Z
AGTEE1 GTETRGB GTIOC0B RXD1/ MISO1/ SCL1
IRQ3
P213
P214
GTETRGA
GTIOC0A
TXD1/
MOSI1/
SDA1
IRQ2
P215
--
R01UH0883JJ0100 Rev.1.00 2020.08.31
20. I/O Page 425 of 1551
RA4W1
20. I/O
20.10
3
PSEL[4:0]
00000b
Hi-Z/JTAG/SWD
00001b
AGT
00010b
GPT
00011b
GPT
00110b
SPI
ISEL
NCODR
PCR
DSCR
P300 TCK/ SWCLK GTOUUP GTIOC0A SSLB1
--
20.11
41
PSEL[4:0]
00000b
Hi-Z/JTAG/SWD
00001b
AGT
00010b 00011b 00100b
GPT GPT SCI
P402 Hi-Z
P404
AGTIO02/ AGTIO1 2
GTIOC3B
00101b
SCI
00110b 00111b 01001b
01010b 01100b 01101b 10000b 10011b Don't care ISEL NCODR PCR DSCR
SPI
IIC
CLKOUT/ ACMPLP/ RTC
CAC/ADC14
CTSU
SLCDC
CAN
USBFS
RXD1/
MISO1/
SCL1
TS18
SEG06
CRX0
RTCIC01
IRQ4
P407
AGTIO0
CTS4_RTS4/ SS4
SSLB3 SDA0 RTCOUT
ADTRG0 TS03 SEG11 USB_VBUS
--
1. PmnPFS.PDR PmnPFS.PMR 0
2.
PmnPFS.PSEL[4:0] AGTIOSEL.SEL[1:0] 24.2.10AGT AGTIOSEL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 426 of 1551
RA4W1
20. I/O
20.12
42
PSEL[4:0]
00000b
Hi-Z/JTAG/SWD
00001b
AGT
00010b
GPT
00011b
GPT
00100b
SCI
00101b
SCI
00110b
SPI
00111b
IIC
01001b
CLKOUT/ ACMPLP/ RTC
01010b
CAC/ADC14
01100b
CTSU
01101b
SLCDC
10000b
CAN
10011b
USBFS
Don't care
ISEL
NCODR
PCR
DSCR
P409
P414
Hi-Z
GTOWUP GTIOC5A
GTIOC0B SSLA1
SEG09 IRQ6
IRQ9
--
.
PmnPFS.PDR PmnPFS.PMR
0
.
PmnPFS.PSEL[4:0] AGTIOSEL.SEL[1:0]
24.2.10AGT AGTIOSEL
20.13
5
PSEL[4:0]
00000b
Hi-Z/JTAG/SWD
00001b
AGT
00010b
GPT
00011b
GPT
01101b
SLCDC
10011b
USBFS
ASEL
ISEL NCODR PCR DSCR
P501 Hi-Z
AGTOB0 GTIV GTIOC2B SEG49 USB_OVRCURA AN017/ CMPIN1 IRQ11
--
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 427 of 1551
RA4W1
20.14
9
PSEL[4:0]
00000b
Hi-Z/JTAG/SWD
00001b
AGT
00100b
SCI
01011b
BUS
Don't care
NCODR
PCR
DSCR
P914
P915
Hi-Z
(USB_DP)
(USB_DM)
--
20. I/O
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 428 of 1551
RA4W1
21. KINT
21. KINT
21.1
KEY_INTKRKRM KR00 KR07 21.1 21.2 21.1
21.1
KRM0 KRM1 KRM2 KRM3 KRM4 KRM5 KRM6 KRM7
1 KR00 1 KR01 1 KR02 1 KR03 1 KR04 1 KR05 1 KR06 1 KR07
21.2
KINT
KR00 KR07
KRCTL KRM KRF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 429 of 1551
RA4W1
21. KINT
KR00 KR01 KR02 KR03 KR04 KR05 KR06 KR07
0 1
KREG
KRM0
0 1
KREG
KRM1
0 1
KREG
KRM2
0 1
KREG
KRM3
0 1
KREG
KRM4
0 1
KREG
KRM5
0 1
KREG
KRM6
0 1
KREG
KRM7
KRMD
KRMD
KRMD
KRMD
KRMD
KRMD
KRMD
KRMD
0 KRF0 1
0 KRF1 1
0 KRF2 1
0 KRF3 1
0 KRF4 1
0 KRF5 1
0 KRF6 1
0 KRF7 1
KEY_INTKR KEY_INTKR
21.1
21.1 OR AND KEY_INTKR AND KEY_INTKRKRFnKRMD = 1KEY_INTKR KRFn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 430 of 1551
RA4W1
21.2 21.2.1 KRCTL
KINT.KRCTL 4008 0000h
b7
b6
b5
b4
b3
b2
b1
b0
KRMD --
--
--
--
--
-- KREG
0
0
0
0
0
0
0
0
21. KINT
R/W
b0
KREG
KR00 KR07 0
R/W
1
b6-b1
--
0 0
R/W
b7
KRMD
0
R/W
KRF0 KRF7
1
KRCTL KRF0 KRF7
21.2.2 KRF
KINT.KRF 4008 0004h
b7
b6
b5
b4
b3
b2
b1
b0
KRF7 KRF6 KRF5 KRF4 KRF3 KRF2 KRF1 KRF0
0
0
0
0
0
0
0
0
R/W
b7-b0
KRFn
n
0
R/W
1
n = 07
.
KRMD = 0 KRFn 1
KRFn 1 KRFn
KRFn 0 1 1
KRF KRF0 KRF7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 431 of 1551
RA4W1
21.2.3 KRM
KINT.KRM 4008 0008h
b7
b6
b5
b4
b3
b2
b1
b0
KRM7 KRM6 KRM5 KRM4 KRM3 KRM2 KRM1 KRM0
0
0
0
0
0
0
0
0
21. KINT
R/W
b7-b0
KRMn
n
0
R/W
1
n = 07
.
20.
I/O
PmnPFS.PSEL 20.I/O
Low KREG = 0 High KREG = 1
KRM
KRM
KRM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 432 of 1551
RA4W1
21. KINT
21.3
21.3.1 KRMD = 0
KR00 KR07 KREG KEY_INTKR KEY_INTKR
KEY_INTKR KR00 KR07
KRn
KEY_INTKR . n = 0007
KRMD = 0KREG = 0
21.2
1 KEY_INTKR
21.3 Low KREG 0 KEY_INTKR KEY_INTKR 21.3 [1]
KR00
KR01 KEY_INTKR
[1]
KRMD = 0KREG = 0
21.3
KEY_INTKR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 433 of 1551
RA4W1
21. KINT
21.3.2 KRMD = 1
KR00 KR07 KREG KEY_INTKR KEY_INTKRKRFKRMD 1 KRF KEY_INTKR
21.4 KREG 0 1 1 KRFn
(a) KR00KRF0 KR00 KRF0
KEY_INTKR
(b) KR00KRF0
KR00 KRF0
KEY_INTKR
KRMD = 1KREG = 0
21.4
KEY_INTKR
21.5 KR00 KREG = 0 KR01 KR05 KRF0 KRF1 KRF0 1 PCLKB 21.5 [1] KR05 KRF5 KRF1 [2] KRF1 1 PCLKB [3]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 434 of 1551
RA4W1
21. KINT
KR00 KR01 KR05 KRF0 KRF1 KRF5
KEY_INTKR
[2]
[1]
[3]
21.5
KRMD = 1KREG = 0
KEY_INTKR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 435 of 1551
RA4W1
21. KINT
21.4
KEY_INTKR KRMD 0
KEY_INTKR KRMD 1
KINT KRFn
KRM KRM KRFn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 436 of 1551
RA4W1
22. GPT POEG
22. GPT POEG
PWM GPT POEG 1
GTETRGn n = A, B GPT
GTETRGn n = A, BGPT
22.1
22.1 POEG 22.1 22.2
22.1
POEG
GPT
GPT
GTETRGn High GPT GTIOCAGTIOCB GPT POEG POEG GTIOCAGTIOCB GPT GPT
GPT GTETRGn GPT
GTETRGnPCLKB/1PCLKB/8PCLKB/32 PCLKB/128 3
GTETRGn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 437 of 1551
RA4W1
22. GPT POEG
POEGA
GPT 0
GTINTAD.GRPABH, GTINTAD.GRPABL
IOCE A 0 B 8
1 8
IOCF S R
OSC
OSTPE
OSTPF S R
SSF
GTETRGA GTETRGB
INV
NFCS[1:0]
NFEN
PIDE ST
PIDF
B
POEG_GROUP0 ICU POEG_GROUP1
GPT OPS OPSCR. GRP[1:0], OPSCR. GODF
1 8 1 8
GTINTAD. GRP[1:0], GTIOR. OADF[1:0], GTIOR. OBDF[1:0]
1 8 1 8
0 1 8
GTOUUP GTOULO GTOVUP GTOVLO GTOWUP GTOWLO
GTIOC0A GTIOC0B
GTIOC1A GTIOC1B
GTIOC8A GTIOC8B
22.1
POEG
22.2
POEG
GTETRGA GTETRGB
GPTGPT A GPTGPT B
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 438 of 1551
RA4W1
22. GPT POEG
22.2 22.2.1 POEG n POEGGn(n = A, B)
POEG.POEGGA 4004 2000h, POEG.POEGGB 4004 2100h
b31 b30 b29 b28 b27 b26 b25 b24
NFCS[1:0] NFEN INV
--
--
--
--
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
b9
b8
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
ST
0
0
0
0
0
0
0
0
b7
b6
b5
b4
b3
b2
b1
b0
-- OSTPE IOCE PIDE SSF OSTPF IOCF PIDF
0
0
0
0
0
0
0
0
b0 b1 b2 b3 b4 b5 b6 b15-b7 b16 b27-b17 b28 b29 b31-b30
PIDF
IOCF
GPT
OSTPF
SSF
PIDE
IOCE
GPT
OSTPE
--
ST
GTETRGn
--
INV
GTETRGn
NFEN
NFCS[1:0]
0GTETRGn 1GTETRGn
0GPT 1GPT
0 1
0 1
0GTETRGn 1GTETRGn
0GPT 1GPT
0 1
0 0
0GTETRGn 0 1GTETRGn 1
0 0
0GTETRGn 1GTETRGn
0 1
b1 b0
0 0GTETRGnPCLKB/1 3
0 1GTETRGnPCLKB/8 3
1 0GTETRGnPCLKB/32 3
1 1GTETRGn PCLKB/128 3
R/W R(/W)
1
R(/W)
1
R(/W)
1
R/W
R/W
2
R/W
2
R/W
2
R/W R
R/W R/W
R/W
R/W
1. 2.
0 1
POEGGA POEGGD GPT GPT POEGGn POEGGA POEGGD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 439 of 1551
RA4W1
22. GPT POEG
22.3
GTIOCxAGTIOCxB BLDC 3 PWM
GTETRGn POEGGn.PIDE 1 POEGGn.PIDF 1
GPT POEGGn.IOCE 1 GTINTAD.GRPABH GTINTAD.GRPABL GPT GTINTAD.GRP[1:0] OPSCR.GRP[1:0] POEGGn.IOCF 1
POEGGn.OSTPE 1 POEGGn.OSTPF 1
SSF POEGGn.SSF 1 PWM GPT GTIOCxA GTIOCxB GPT GTINTAD.GRP[1:0] GTIOR.OADF[1:0] GTIOR.OBDF[1:0] BLDC 3 PWM GPT_OPS OPSCR.GRP[1:0] OPSCR.GODF
22.3.1
POEGGn.PIDEPOEGGn.NFCS[1:0]POEGGn.NFEN POEGGn.INV GTETRGn GPT
22.3.1.1
22.2 High POEGGn.INV High POEGGn.NFCS[1:0] POEGGn.NFEN 3 High GPT Low High GTETRGn
PCLKB
1, 8, 32, 128
GTETRGn
GTIOCA GTIOCB (PCLKD)
High [1]
[2]
[3]
Low [1]
[0]
[1]
. GPT Low POEGGn.INV
GTETRGn
22.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 440 of 1551
RA4W1
22. GPT POEG
22.3.2 GPT
23. PWM GPT
22.3.3
POEGGn.OSTPE 1 GPT
22.3.4
GPT POEGGn.SSF
22.3.5
GPT
POEGGn.PIDF
POEGGn.IOCF
POEGGn.OSTPF
POEGGn.SSF
GTETRGn POEGGn.ST 0 POEGGn.PIDF 0
GPT GTST.OABHF GTST.OABLF 0 POEGGn.IOCF 0
OSTDSR.OSTDF 0 POEGGn.OSTPF 0
22.3 GPT
GPT320.GTCNT GPT320.GTPR
GPT320.GTCCRA
PIDF, IOCF OSTPF, SSF
GTIOC0A GTIOC0B
22.3
GPT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 441 of 1551
RA4W1
22. GPT POEG
22.4
POEG GPT 22.3
22.3
POEG A POEG_GROUP0
POEG B POEG_GROUP1
POEGGA.IOCF POEGGA.PIDF POEGGB.IOCF POEGGB.PIDF
GPT GTETRGA GPT GTETRGB
22.5 GPT
POEG GPT GTETRGn
POEGG.INV POEGGn.NFCS[1:0] POEGGn.NFEN 3 22.3.1 POEGGn.ST 22.4 GPT
PCLKB
8, 16, 128
GTETRGn
POEGGn.ST GTETRGn
[1] [1] [2] [1] [1] [2] [3] [4] [1] [2] [3] [1]
. GPT POEGGn.INV
22.4
GPT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 442 of 1551
RA4W1
22. GPT POEG
22.6
22.6.1
POEG POEG
22.6.2 GPT
POEG PmnPFS.PMR PmnPFS.PSEL GPT POEG
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 443 of 1551
RA4W1
23. PWM GPT
23. PWM GPT
23.1
PWM GPT4 32 GPT323 16 GPT16PWM
DC PWM GPT
23.1 GPT 23.2 GPT 23.1 23.2 GPT 23.3
23.1
GPT
32 � 4 16 � 3 2 2 2
4 PWM PWM 8 ELC 4 DC PWM A F UVW
ELC UVW PCLKA PCLKD PCLKA : PCLKD = 1 : NN = 1/2/4/8/16/32/64
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 444 of 1551
RA4W1
23. PWM GPT
23.2
GPT
PCLKD PCLKD/4 PCLKD/16 PCLKD/64 PCLKD/256 PCLKD/1024
GPT32, GPT16
GTCCR
GTCCRA GTCCRB
GTCCRC GTCCRD GTCCRE GTCCRF
GTPR
GTPBR
GTIOCA GTIOCB
1
GTETRGA GTETRGB
GTPR ELC GTETRGnn = A, B
Low
High
PWM
DTC
DC
8 GTCCRAGPTn_CCMPA GTCCRBGPTn_CCMPB GTCCRCGPTn_CMPC GTCCRDGPTn_CMPD GTCCREGPTn_CMPE GTCCRF GPTn_CMPF GTCNT GTPR GPTn_OVF GTCNT GPTn_UDF . n = 0 5, 8
ELC
1.
GTRETRGn POEG GPT GPT MSTPD14 POEG
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 445 of 1551
RA4W1
23. PWM GPT
PCLKD PCLKD/4 PCLKD/16 PCLKD/64 PCLKD/256 PCLKD/1024
GTPBR GTPR
GTWP GTICASR GTDTCR GTSTR GTICBSR GTDVU GTSTP GTCR GTCLR GTUDDTYC GTSSR GTIOR GTPSR GTINTAD GTCSR GTST GTUPSR GTBER GTDNSR
GPT320
GPT0_CCMPA GPT0_CCMPB GPT0_CMPC GPT0_CMPD GPT0_CMPE GPT0_CMPF GPT0_OVF GPT0_UDF
GPT321 GPT322 GPT323 GPT164 GPT165 GPT168
GTETRGA GTETRGB
GTCNT
GTCCRA GTCCRB GTCCRC GTCCRD GTCCRE GTCCRF
GTIOCA
GTIOCB
ELC ELC_GPTA ELC_GPTB ELC_GPTC ELC_GPTD ELC_GPTE ELC_GPTF ELC_GPTG ELC_GPTH
GPT_OPS
GPT320.GTIOCA
DC 3PWM
OPSCR
GTIU/GTIV/GTIW
GTOUUP/GTOULO GTOVUP/GTOVLO GTOWUP/GTOWLO
UVWICU/ELC
GTWP
PWM
GTSTR
PWM
GTSTP
PWM
GTCLR
PWM
GTSSR
PWM
GTPSR
PWM
GTCSR
PWM
GTUPSR PWM
GTDNSR PWM
GTICASR PWMA
GTICBSR PWMB
GTCR
PWM
GTUDDTYC PWM
GTIOR
PWM I/O
GTINTAD PWM
GTST
PWM
GTBER
PWM
GTCNT GTCCRA GTCCRB GTCCRC GTCCRD GTCCRE GTCCRF GTPR GTPBR GTDTCR GTDVU OPSCR
PWM PWMA PWMB PWMC PWMD PWME PWMF PWM PWM PWM PWMU
23.1
GPT
23.2 GPT
CH8 CH5 CH4 CH3 CH2 CH1 CH0
GPT168 GPT165 GPT164 GPT323 GPT322 GPT321 GPT320
GPT16
GPT32
23.2
GPT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 446 of 1551
RA4W1
23. PWM GPT
23.3
GPT320
GPT
GTETRGA GTETRGB GTIOC0A
GTIOC0B
GPT321
GTIOC1A
GTIOC1B
GPT322
GTIOC2A
GTIOC2B
GPT323
GTIOC3A
GTIOC3B
GPT164
GTIOC4A
GTIOC4B
GPT165
GTIOC5A
GTIOC5B
GPT168
GTIOC8A
GTIOC8B
GPT_OPS
GTIU GTIV GTIW GTOUUP GTOULO GTOVUP GTOVLO GTOWUP GTOWLO
A
B
GTCCRA PWM
GTCCRB PWM
GTCCRA PWM
GTCCRB PWM
GTCCRA PWM
GTCCRB PWM
GTCCRA PWM
GTCCRB PWM
GTCCRA PWM
GTCCRB PWM
GTCCRA PWM
GTCCRB PWM
GTCCRA PWM
GTCCRB PWM
U
V
W
BLDC 3 PWMU
BLDC 3 PWMU
BLDC 3 PWMV
BLDC 3 PWMV
BLDC 3 PWMW
BLDC 3 PWMW
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 447 of 1551
RA4W1
23.2
23.4 GPT
23. PWM GPT
23.4
GPT
GPT32m
1
GPT16m
2
PWM PWM PWM PWM PWM PWM PWM PWM PWM PWM A PWM B PWM PWM PWM I/O PWM PWM PWM PWM PWM A
GTWP GTSTR GTSTP GTCLR GTSSR GTPSR GTCSR GTUPSR GTDNSR GTICASR GTICBSR GTCR GTUDDTYC GTIOR GTINTAD GTST GTBER GTCNT GTCCRA
PWM B
GTCCRB
PWM C
GTCCRC
PWM E
GTCCRE
PWM D
GTCCRD
PWM F
GTCCRF
PWM
GTPR
PWM
GTPBR
PWM PWM U
GTDTCR GTDVU
GPT_OPS
OPSCR
0000_0000h 0000_0000h FFFF_FFFFh 0000_0000h 0000_0000h 0000_0000h 0000_0000h 0000_0000h 0000_0000h 0000_0000h 0000_0000h 0000_0000h 0000_0001h 0000_0000h 0000_0000h 0000_8000h 0000_0000h 0000_0000h FFFF_FFFFh
3
FFFF_FFFFh
3
FFFF_FFFFh
3
FFFF_FFFFh
3
FFFF_FFFFh
3
FFFF_FFFFh
3
FFFF_FFFFh
3
FFFF_FFFFh
3
0000_0000h FFFF_FFFFh
3
0000_0000h
4007 8000h + 0100h � m 4007 8004h + 0100h � m 4007 8008h + 0100h � m 4007 800Ch + 0100h � m 4007 8010h + 0100h � m 4007 8014h + 0100h � m 4007 8018h + 0100h � m 4007 801Ch + 0100h � m 4007 8020h + 0100h � m 4007 8024h + 0100h � m 4007 8028h + 0100h � m 4007 802Ch + 0100h � m 4007 8030h + 0100h � m 4007 8034h + 0100h � m 4007 8038h + 0100h � m 4007 803Ch + 0100h � m 4007 8040h + 0100h � m 4007 8048h + 0100h � m 4007 804Ch + 0100h � m
4007 8050h + 0100h � m
4007 8054h + 0100h � m
4007 8058h + 0100h � m
4007 805Ch + 0100h � m
4007 8060h + 0100h � m
4007 8064h + 0100h � m
4007 8068h + 0100h � m
4007 8088h + 0100h � m 4007 808Ch + 0100h � m
4007 8FF0h
1. 2. 3.
GPT32m (m = 0 3) GPT16m (m = 4, 5, 8) GPT16m 0000FFFFh
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
32
32
32
32
32
32
32
32 32
32
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 448 of 1551
RA4W1
23. PWM GPT
23.2.1 PWM GTWP
GPT32m.GTWP 4007 8000h + 0100h � m (m = 0 3), GPT16m.GTWP 4007 8000h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
PRKEY[7:0]
--
--
--
--
--
--
--
WP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
WP
b7-b1 b15-b8
-- PRKEY[7:0]
b31-b16 --
GTWP
R/W
0
R/W
1
0 0
R/W
A5hWP R/W 0
0 0
R/W
GTWP
GTSSR, GTPSR, GTCSR, GTUPSR, GTDNSR, GTICASR, GTICBSR, GTCR, GTUDDTYC, GTIOR, GTINTAD, GTST, GTBER, GTCNT, GTCCRA, GTCCRB, GTCCRC, GTCCRD, GTCCRE, GTCCRF, GTPR, GTPBR, GTDTCR, GTDVU
23.2.2 PWM GTSTR
GPT32m.GTSTR 4007 8004h + 0100h � m (m = 0 3), GPT16m.GTSTR 4007 8004h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
--
--
--
--
--
--
0
0
0
0
0
0
b9
b8
b7
--
CSTRT 8
--
0
0
0
b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
0
0
0
0
0
0
0
b6
b5
b4
b3
b2
b1
b0
--
CSTRT CSTRT CSTRT CSTRT CSTRT CSTRT
5
4
3
2
1
0
0
0
0
0
0
0
0
GTSTR nn = 0 5, 8 GTCNT
GTSTR GTSTR 1 GTSTR GTCNT 0 GTCNT GTSTR GTSTR 23.2
CSTRT[8:0] n GTCNT n = 0 5, 8
n GTCNT GPTm.GTSSR.CSTRTn 1 GTSTR.CSTRTn n = 0 5, 8m = 320 323164, 165, 168
GTCR.CST 0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 449 of 1551
RA4W1
23. PWM GPT
23.2.3 PWM GTSTP
GPT32m.GTSTP 4007 8008h + 0100h � m (m = 0 3), GPT16m.GTSTP 4007 8008h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23
--
--
--
--
--
--
--
--
--
1
1
1
1
1
1
1
1
1
b15 b14 b13 b12 b11 b10
--
--
--
--
--
--
1
1
1
1
1
1
b9
b8
b7
--
CSTOP 8
--
1
1
1
b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
1
1
1
1
1
1
1
b6
b5
b4
b3
b2
b1
b0
--
CSTOP CSTOP CSTOP CSTOP CSTOP CSTOP
5
4
3
2
1
0
1
1
1
1
1
1
1
GTSTP nn = 0 5, 8 GTCNT
GTSTP GTSTP 1 GTSTP GTCNT 0 GTCNT GTSTP
GTSTP 23.2
CSTOP[8:0] n GTCNT n = 0 5, 8
n GTCNT GPT32m.GTPSR.CSTOPn 1 GTSTP.CSTOPn n = 0 5, 8m = 320 323, 164, 165, 168 GTCR.CST 0 1
23.2.4 PWM GTCLR
GPT32m.GTCLR 4007 800Ch + 0100h � m (m = 0 3), GPT16m.GTCLR 4007 800Ch + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10
--
--
--
--
--
--
0
0
0
0
0
0
b9
b8
b7
-- CCLR8 --
0
0
0
b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
0
0
0
0
0
0
0
b6
b5
b4
b3
b2
b1
b0
-- CCLR5 CCLR4 CCLR3 CCLR2 CCLR1 CCLR0
0
0
0
0
0
0
0
GTCLR nn = 0 5, 8 GTCNT
GTCLR GTCLR 1 GTCLR GTCNT 0 GTCNT GTCLR 23.2
CCLR[8:0] n GTCNT n = 0 5, 8
1 n GTCNT 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 450 of 1551
RA4W1
23. PWM GPT
23.2.5 PWM GTSSR
GPT32m.GTSSR 4007 8010h + 0100h � m (m = 0 3), GPT16m.GTSSR 4007 8010h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
CSTRT --
--
--
--
--
--
--
SSELC SSELC SSELC SSELC SSELC SSELC SSELC SSELC
H
G
F
E
D
C
B
A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
SSCBF SSCBF SSCBR SSCBR SSCAF SSCAF SSCAR SSCAR
AH
AL
AH
AL
BH
BL
BH
BL
--
--
--
--
SSGTR SSGTR SSGTR SSGTR GBF GBR GAF GAR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
SSGTRGAR GTETRGA 0GTETRGA
R/W
1GTETRGA
b1
SSGTRGAF
GTETRGA 0GTETRGA
R/W
1GTETRGA
b2
SSGTRGBR GTETRGB 0GTETRGB
R/W
1GTETRGB
b3
SSGTRGBF
GTETRGB 0GTETRGB
R/W
1GTETRGB
b7-b4
--
0 0
R/W
b8
SSCARBL
GTIOCB Low GTIOCA 0GTIOCB 0GTIOCA
R/W
1GTIOCB 0GTIOCA
b9
SSCARBH
GTIOCB High GTIOCA 0GTIOCB 1GTIOCA
R/W
1GTIOCB 1GTIOCA
b10
SSCAFBL
GTIOCB Low GTIOCA 0GTIOCB 0GTIOCA
R/W
1GTIOCB 0GTIOCA
b11
SSCAFBH
GTIOCB High GTIOCA 0GTIOCB 1GTIOCA
R/W
1GTIOCB 1GTIOCA
b12
SSCBRAL
GTIOCA Low GTIOCB 0GTIOCA 0GTIOCB
R/W
1GTIOCA 0GTIOCB
b13
SSCBRAH
GTIOCA High GTIOCB 0GTIOCA 1GTIOCB
R/W
1GTIOCA 1GTIOCB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 451 of 1551
RA4W1
23. PWM GPT
R/W
b14
SSCBFAL
GTIOCA Low GTIOCB 0GTIOCA 0GTIOCB
R/W
1GTIOCA 0GTIOCB
b15
SSCBFAH
GTIOCA High GTIOCB 0GTIOCA 1GTIOCB
R/W
1GTIOCA 1GTIOCB
b16
SSELCA
ELC_GPTA 0ELC_GPTA
R/W
1ELC_GPTA
b17
SSELCB
ELC_GPTB 0ELC_GPTB
R/W
1ELC_GPTB
b18
SSELCC
ELC_GPTC 0ELC_GPTC
R/W
1ELC_GPTC
b19
SSELCD
ELC_GPTD 0ELC_GPTD
R/W
1ELC_GPTD
b20
SSELCE
ELC_GPTE 0ELC_GPTE
R/W
1ELC_GPTE
b21
SSELCF
ELC_GPTF 0ELC_GPTF
R/W
1ELC_GPTF
b22
SSELCG
ELC_GPTG 0ELC_GPTG R/W
1ELC_GPTG
b23
SSELCH
ELC_GPTH 0ELC_GPTH
R/W
1ELC_GPTH
b30-b24 --
0 0
R/W
b31
CSTRT
0GTSTR
R/W
1GTSTR
GTSSR GTCNT SSGTRGAR GTETRGA
GTETRGA GTCNT SSGTRGAF GTETRGA
GTETRGA GTCNT SSGTRGBR GTETRGB
GTETRGB GTCNT SSGTRGBF GTETRGB
GTETRGB GTCNT SSCARBL GTIOCB Low GTIOCA
GTIOCB 0 GTIOCA GTCNT
SSCARBH GTIOCB High GTIOCA GTIOCB 1 GTIOCA GTCNT
SSCAFBL GTIOCB Low GTIOCA GTIOCB 0 GTIOCA GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 452 of 1551
RA4W1
23. PWM GPT
SSCAFBH GTIOCB High GTIOCA GTIOCB 1 GTIOCA GTCNT
SSCBRAL GTIOCA Low GTIOCB GTIOCA 0 GTIOCB GTCNT
SSCBRAH GTIOCA High GTIOCB GTIOCA 1 GTIOCB GTCNT
SSCBFAL GTIOCA Low GTIOCB GTIOCA 0 GTIOCB GTCNT
SSCBFAH GTIOCA High GTIOCB GTIOCA 1 GTIOCB GTCNT
SSELCm ELC_GPTm m = A H ELC_GPTm GTCNT
CSTRT GTSTR GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 453 of 1551
RA4W1
23. PWM GPT
23.2.6 PWM GTPSR
GPT32m.GTPSR 4007 8014h + 0100h � m (m = 0 3), GPT16m.GTPSR 4007 8014h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
CSTOP --
--
--
--
--
--
--
PSELC PSELC PSELC PSELC PSELC PSELC PSELC PSELC
H
G
F
E
D
C
B
A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
PSCBF PSCBF PSCBR PSCBR PSCAF PSCAF PSCAR PSCAR
AH
AL
AH
AL
BH
BL
BH
BL
--
--
--
--
PSGTR PSGTR PSGTR PSGTR GBF GBR GAF GAR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
PSGTRGAR GTETRGA 0GTETRGA
R/W
1GTETRGA
b1
PSGTRGAF GTETRGA 0GTETRGA
R/W
1GTETRGA
b2
PSGTRGBR GTETRGB 0GTETRGB
R/W
1GTETRGB
b3
PSGTRGBF GTETRGB 0GTETRGB
R/W
1GTETRGB
b7-b4 --
00
R/W
b8
PSCARBL
GTIOCB Low GTIOCA 0GTIOCB 0GTIOCA
R/W
1GTIOCB 0GTIOCA
b9
PSCARBH
GTIOCB High GTIOCA 0GTIOCB 1GTIOCA
R/W
1GTIOCB 1GTIOCA
b10
PSCAFBL
GTIOCB Low GTIOCA 0GTIOCB 0GTIOCA
R/W
1GTIOCB 0GTIOCA
b11
PSCAFBH
GTIOCB High GTIOCA 0GTIOCB 1GTIOCA
R/W
1GTIOCB 1GTIOCA
b12
PSCBRAL
GTIOCA Low GTIOCB 0GTIOCA 0GTIOCB
R/W
1GTIOCA 0GTIOCB
b13
PSCBRAH
GTIOCA High GTIOCB 0GTIOCA 1GTIOCB
R/W
1GTIOCA 1GTIOCB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 454 of 1551
RA4W1
23. PWM GPT
b14
PSCBFAL
b15
PSCBFAH
b16
PSELCA
b17
PSELCB
b18
PSELCC
b19
PSELCD
b20
PSELCE
b21
PSELCF
b22
PSELCG
b23
PSELCH
b30-b24 --
b31
CSTOP
R/W
GTIOCA Low GTIOCB 0GTIOCA 0GTIOCB
R/W
1GTIOCA 0GTIOCB
GTIOCA High GTIOCB 0GTIOCA 1GTIOCB
R/W
1GTIOCA 1GTIOCB
ELC_GPTA 0ELC_GPTA R/W
1ELC_GPTA
ELC_GPTB 0ELC_GPTB R/W
1ELC_GPTB
ELC_GPTC 0ELC_GPTC R/W
1ELC_GPTC
ELC_GPTD 0ELC_GPTD R/W
1ELC_GPTD
ELC_GPTE 0ELC_GPTE R/W
1ELC_GPTE
ELC_GPTF 0ELC_GPTF R/W
1ELC_GPTF
ELC_GPTG 0ELC_GPTG R/W
1ELC_GPTG
ELC_GPTH 0ELC_GPTH R/W
1ELC_GPTH
00
R/W
0GTSTP
R/W
1GTSTP
GTPSR GTCNT PSGTRGAR GTETRGA
GTETRGA GTCNT PSGTRGAF GTETRGA
GTETRGA GTCNT PSGTRGBR GTETRGB
GTETRGB GTCNT PSGTRGBF GTETRGB
GTETRGB GTCNT PSCARBL GTIOCB Low GTIOCA
GTIOCB 0 GTIOCA GTCNT
PSCARBH GTIOCB High GTIOCA GTIOCB 1 GTIOCA GTCNT
PSCAFBL GTIOCB Low GTIOCA GTIOCB 0 GTIOCA GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 455 of 1551
RA4W1
23. PWM GPT
PSCAFBH GTIOCB High GTIOCA GTIOCB 1 GTIOCA GTCNT
PSCBRAL GTIOCA Low GTIOCB GTIOCA 0 GTIOCB GTCNT
PSCBRAH GTIOCA High GTIOCB GTIOCA 1 GTIOCB GTCNT
PSCBFAL GTIOCA Low GTIOCB GTIOCA 0 GTIOCB GTCNT
PSCBFAH GTIOCA High GTIOCB GTIOCA 1 GTIOCB GTCNT
PSELCm ELC_GPTm m = A H ELC_GPTm GTCNT
CSTOP GTSTP GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 456 of 1551
RA4W1
23. PWM GPT
23.2.7 PWM GTCSR
GPT32m.GTCSR 4007 8018h + 0100h � m (m = 0 3), GPT16m.GTCSR 4007 8018h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
CCLR --
--
--
--
--
--
--
CSELC CSELC CSELC CSELC CSELC CSELC CSELC CSELC
H
G
F
E
D
C
B
A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
CSCBF CSCBF CSCBR CSCBR CSCAF CSCAF CSCAR CSCAR
AH
AL
AH
AL
BH
BL
BH
BL
--
--
--
--
CSGTR CSGTR CSGTR CSGTR GBF GBR GAF GAR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
CSGTRGAR GTETRGA 0GTETRGA R/W
1GTETRGA
b1
CSGTRGAF GTETRGA 0GTETRGA R/W
1GTETRGA
b2
CSGTRGBR GTETRGB 0GTETRGB R/W
1GTETRGB
b3
CSGTRGBF GTETRGB 0GTETRGB R/W
1GTETRGB
b7-b4 --
0 0
R/W
b8
CSCARBL
GTIOCB Low GTIOCA 0GTIOCB0 GTIOCA R/W
1GTIOCB0 GTIOCA
b9
CSCARBH GTIOCB High GTIOCA 0GTIOCB1 GTIOCA R/W
1GTIOCB1 GTIOCA
b10
CSCAFBL
GTIOCB Low GTIOCA 0GTIOCB0 GTIOCA R/W
1GTIOCB0 GTIOCA
b11
CSCAFBH GTIOCB High GTIOCA 0GTIOCB1 GTIOCA R/W
1GTIOCB1 GTIOCA
b12
CSCBRAL
GTIOCA Low GTIOCB 0GTIOCA0 GTIOCB R/W
1GTIOCA0 GTIOCB
b13
CSCBRAH GTIOCA High GTIOCB 0GTIOCA1 GTIOCB R/W
1GTIOCA1 GTIOCB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 457 of 1551
RA4W1
23. PWM GPT
b14
CSCBFAL
b15
CSCBFAH
b16
CSELCA
b17
CSELCB
b18
CSELCC
b19
CSELCD
b20
CSELCE
b21
CSELCF
b22
CSELCG
b23
CSELCH
b30-b24 --
b31
CCLR
R/W
GTIOCA Low GTIOCB 0GTIOCA0 GTIOCB R/W
1GTIOCA0 GTIOCB
GTIOCA High GTIOCB 0GTIOCA1 GTIOCB R/W
1GTIOCA1 GTIOCB
ELC_GPTA 0ELC_GPTA R/W
1ELC_GPTA
ELC_GPTB
0ELC_GPTB R/W 1ELC_GPTB
ELC_GPTC
0ELC_GPTC R/W 1ELC_GPTC
ELC_GPTD
0ELC_GPTD R/W 1ELC_GPTD
ELC_GPTE
0ELC_GPTE R/W 1ELC_GPTE
ELC_GPTF 0ELC_GPTF R/W
1ELC_GPTF
ELC_GPTG
0ELC_GPTG R/W 1ELC_GPTG
ELC_GPTH
0ELC_GPTH R/W 1ELC_GPTH
0 0
R/W
0GTCLR
R/W
1GTCLR
GTCSR GTCNT CSGTRGAR GTETRGA
GTETRGA GTCNT CSGTRGAF GTETRGA
GTETRGA GTCNT CSGTRGBR GTETRGB
GTETRGB GTCNT CSGTRGBF GTETRGB
GTETRGB GTCNT CSCARBL GTIOCB Low GTIOCA
GTIOCB 0 GTIOCA GTCNT
CSCARBH GTIOCB High GTIOCA GTIOCB 1 GTIOCA GTCNT
CSCAFBL GTIOCB Low GTIOCA GTIOCB 0 GTIOCA GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 458 of 1551
RA4W1
23. PWM GPT
CSCAFBH GTIOCB High GTIOCA GTIOCB 1 GTIOCA GTCNT
CSCBRAL GTIOCA Low GTIOCB GTIOCA 0 GTIOCB GTCNT
CSCBRAH GTIOCA High GTIOCB GTIOCA 1 GTIOCB GTCNT
CSCBFAL GTIOCA Low GTIOCB GTIOCA 0 GTIOCB GTCNT
CSCBFAH GTIOCA High GTIOCB GTIOCA 1 GTIOCB GTCNT
CSELCm ELC_GPTm m = A H ELC_GPTm GTCNT
CCLR GTCLR GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 459 of 1551
RA4W1
23. PWM GPT
23.2.8 PWM GTUPSR
GPT32m.GTUPSR 4007 801Ch + 0100h � m (m = 0 3), GPT16m.GTUPSR 4007 801Ch + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
USELC USELC USELC USELC USELC USELC USELC USELC
H
G
F
E
D
C
B
A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
USCBF USCBF USCBR USCBR USCAF USCAF USCAR USCAR
AH
AL
AH
AL
BH
BL
BH
BL
--
--
--
--
USGTR USGTR USGTR USGTR GBF GBR GAF GAR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
USGTRGAR GTETRGA 0GTETRGA
R/W
1GTETRGA
b1
USGTRGAF GTETRGA 0GTETRGA
R/W
1GTETRGA
b2
USGTRGBR GTETRGB 0GTETRGB
R/W
1GTETRGB
b3
USGTRGBF GTETRGB 0GTETRGB
R/W
1GTETRGB
b7-b4 --
0 0
R/W
b8
USCARBL GTIOCB Low GTIOCA 0GTIOCB 0GTIOCA R/W
1GTIOCB 0GTIOCA
b9
USCARBH GTIOCB High GTIOCA 0GTIOCB 1GTIOCA R/W
1GTIOCB 1GTIOCA
b10
USCAFBL GTIOCB Low GTIOCA 0GTIOCB 0GTIOCA R/W
1GTIOCB 0GTIOCA
b11
USCAFBH GTIOCB High GTIOCA 0GTIOCB 1GTIOCA R/W
1GTIOCB 1GTIOCA
b12
USCBRAL GTIOCA Low GTIOCB 0GTIOCA 0GTIOCB R/W
1GTIOCA 0GTIOCB
b13
USCBRAH GTIOCA High GTIOCB 0GTIOCA 1GTIOCB R/W
1GTIOCA 1GTIOCB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 460 of 1551
RA4W1
23. PWM GPT
b14
USCBFAL
b15
USCBFAH
b16
USELCA
b17
USELCB
b18
USELCC
b19
USELCD
b20
USELCE
b21
USELCF
b22
USELCG
b23
USELCH
b31-b24 --
R/W
GTIOCA Low GTIOCB 0GTIOCA 0GTIOCB R/W
1GTIOCA 0GTIOCB
GTIOCA High GTIOCB 0GTIOCA 1GTIOCB R/W
1GTIOCA 1GTIOCB
ELC_GPTA 0ELC_GPTA R/W
1ELC_GPTA
ELC_GPTB 0ELC_GPTB R/W
1ELC_GPTB
ELC_GPTC 0ELC_GPTC R/W
1ELC_GPTC
ELC_GPTD 0ELC_GPTD R/W
1ELC_GPTD
ELC_GPTE 0ELC_GPTE R/W
1ELC_GPTE
ELC_GPTF 0ELC_GPTF R/W
1ELC_GPTF
ELC_GPTG 0ELC_GPTG R/W
1ELC_GPTG
ELC_GPTH 0ELC_GPTH R/W
1ELC_GPTH
0 0
R/W
GTUPSR GTCNT GTUPSR 1 1 GTCNT GTCR.TPCS
USGTRGAR GTETRGA GTETRGA GTCNT
USGTRGAF GTETRGA GTETRGA GTCNT
USGTRGBR GTETRGB GTETRGB GTCNT
USGTRGBF GTETRGB GTETRGB GTCNT
USCARBL GTIOCB Low GTIOCA GTIOCB 0 GTIOCA GTCNT
USCARBH GTIOCB High GTIOCA GTIOCB 1 GTIOCA GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 461 of 1551
RA4W1
23. PWM GPT
USCAFBL GTIOCB Low GTIOCA GTIOCB 0 GTIOCA GTCNT
USCAFBH GTIOCB High GTIOCA GTIOCB 1 GTIOCA GTCNT
USCBRAL GTIOCA Low GTIOCB GTIOCA 0 GTIOCB GTCNT
USCBRAH GTIOCA High GTIOCB GTIOCA 1 GTIOCB GTCNT
USCBFAL GTIOCA Low GTIOCB GTIOCA 0 GTIOCB GTCNT
USCBFAH GTIOCA High GTIOCB GTIOCA 1 GTIOCB GTCNT
USELCm ELC_GPTm m = A H ELC_GPTm GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 462 of 1551
RA4W1
23. PWM GPT
23.2.9 PWM GTDNSR
GPT32m.GTDNSR 4007 8020h + 0100h � m (m = 0 3), GPT16m.GTDNSR 4007 8020h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
DSELC DSELC DSELC DSELC DSELC DSELC DSELC DSELC
H
G
F
E
D
C
B
A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
DSCBF DSCBF DSCBR DSCBR DSCAF DSCAF DSCAR DSCAR
AH
AL
AH
AL
BH
BL
BH
BL
--
--
--
--
DSGTR DSGTR DSGTR DSGTR GBF GBR GAF GAR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
DSGTRGAR GTETRGA 0GTETRGA R/W
1GTETRGA
b1
DSGTRGAF GTETRGA 0GTETRGA R/W
1GTETRGA
b2
DSGTRGBR GTETRGB 0GTETRGB R/W
1GTETRGB
b3
DSGTRGBF GTETRGB 0GTETRGB R/W
1GTETRGB
b7-b4 --
0 0
R/W
b8
DSCARBL GTIOCB LowGTIOCA 0GTIOCB 0GTIOCA
R/W
1GTIOCB 0GTIOCA
b9
DSCARBH GTIOCB High GTIOCA 0GTIOCB 1GTIOCA
R/W
1GTIOCB 1GTIOCA
b10
DSCAFBL GTIOCB LowGTIOCA 0GTIOCB 0GTIOCA
R/W
1GTIOCB 0GTIOCA
b11
DSCAFBH GTIOCB High GTIOCA 0GTIOCB 1GTIOCA
R/W
1GTIOCB 1GTIOCA
b12
DSCBRAL GTIOCA LowGTIOCB 0GTIOCA 0GTIOCB
R/W
1GTIOCA 0GTIOCB
b13
DSCBRAH GTIOCA High GTIOCB 0GTIOCA 1GTIOCB
R/W
1GTIOCA 1GTIOCB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 463 of 1551
RA4W1
23. PWM GPT
b14
DSCBFAL
b15
DSCBFAH
b16
DSELCA
b17
DSELCB
b18
DSELCC
b19
DSELCD
b20
DSELCE
b21
DSELCF
b22
DSELCG
b23
DSELCH
b31-b24 --
R/W
GTIOCA LowGTIOCB 0GTIOCA 0GTIOCB
R/W
1GTIOCA 0GTIOCB
GTIOCA High GTIOCB 0GTIOCA 1GTIOCB
R/W
1GTIOCA 1GTIOCB
ELC_GPTA
0ELC_GPTA R/W
1ELC_GPTA
ELC_GPTB
0ELC_GPTB R/W
1ELC_GPTB
ELC_GPTC
0ELC_GPTC R/W
1ELC_GPTC
ELC_GPTD
0ELC_GPTD R/W
1ELC_GPTD
ELC_GPTE
0ELC_GPTE R/W
1ELC_GPTE
ELC_GPTF
0ELC_GPTF R/W
1ELC_GPTF
ELC_GPTG
0ELC_GPTG R/W
1ELC_GPTG
ELC_GPTH
0ELC_GPTH R/W
1ELC_GPTH
0 0
R/W
GTDNSR GTCNT GTDNSR 1 1 GTCNT GTCR.TPCS GTCNT
DSGTRGAR GTETRGA GTETRGA GTCNT
DSGTRGAF GTETRGA GTETRGA GTCNT
DSGTRGBR GTETRGB GTETRGB GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 464 of 1551
RA4W1
23. PWM GPT
DSGTRGBF GTETRGB GTETRGB GTCNT
DSCARBL GTIOCB Low GTIOCA GTIOCB 0 GTIOCA GTCNT
DSCARBH GTIOCB High GTIOCA GTIOCB 1 GTIOCA GTCNT
DSCAFBL GTIOCB Low GTIOCA GTIOCB 0 GTIOCA GTCNT
DSCAFBH GTIOCB High GTIOCA GTIOCB 1 GTIOCA GTCNT
DSCBRAL GTIOCA Low GTIOCB GTIOCA 0 GTIOCB GTCNT
DSCBRAH GTIOCA High GTIOCB GTIOCA 1 GTIOCB GTCNT
DSCBFAL GTIOCA Low GTIOCB GTIOCA 0 GTIOCB GTCNT
DSCBFAH GTIOCA High GTIOCB GTIOCA 1 GTIOCB GTCNT
DSELCm ELC_GPTm m = A H ELC_GPTm GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 465 of 1551
RA4W1
23. PWM GPT
23.2.10 PWM AGTICASR
GPT32m.GTICASR 4007 8024h + 0100h � m (m = 0 3), GPT16m.GTICASR 4007 8024h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
ASELC ASELC ASELC ASELC ASELC ASELC ASELC ASELC
H
G
F
E
D
C
B
A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
ASCBF ASCBF ASCBR ASCBR ASCAF ASCAF ASCAR ASCAR
AH
AL
AH
AL
BH
BL
BH
BL
--
--
--
--
ASGTR ASGTR ASGTR ASGTR GBF GBR GAF GAR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
ASGTRGAR GTETRGA 0GTETRGA GTCCRA R/W
GTCCRA
1GTETRGA GTCCRA
b1
ASGTRGAF GTETRGA 0GTETRGA GTCCRA R/W
GTCCRA
1GTETRGA GTCCRA
b2
ASGTRGBR GTETRGB 0GTETRGB GTCCRA R/W
GTCCRA
1GTETRGB GTCCRA
b3
ASGTRGBF GTETRGB 0GTETRGB GTCCRA R/W
GTCCRA
1GTETRGB GTCCRA
b7-b4 --
0 0
R/W
b8
ASCARBL
GTIOCB Low GTIOCA 0GTIOCB 0GTIOCA R/W
GTCCRA
GTCCRA
1GTIOCB 0GTIOCA
GTCCRA
b9
ASCARBH
GTIOCB HighGTIOCA 0GTIOCB 1GTIOCA R/W
GTCCRA
GTCCRA
1GTIOCB 1GTIOCA
GTCCRA
b10
ASCAFBL
GTIOCB Low GTIOCA 0GTIOCB 0GTIOCA R/W
GTCCRA
GTCCRA
1GTIOCB 0GTIOCA
GTCCRA
b11
ASCAFBH
GTIOCB HighGTIOCA 0GTIOCB 1GTIOCA R/W
GTCCRA
GTCCRA
1GTIOCB 1GTIOCA
GTCCRA
b12
ASCBRAL
GTIOCA Low GTIOCB 0GTIOCA 0GTIOCB R/W
GTCCRA
GTCCRA
1GTIOCA 0GTIOCB
GTCCRA
b13
ASCBRAH
GTIOCA HighGTIOCB 0GTIOCA 1GTIOCB R/W
GTCCRA
GTCCRA
1GTIOCA 1GTIOCB
GTCCRA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 466 of 1551
RA4W1
23. PWM GPT
b14
ASCBFAL
b15
ASCBFAH
b16
ASELCA
b17
ASELCB
b18
ASELCC
b19
ASELCD
b20
ASELCE
b21
ASELCF
b22
ASELCG
b23
ASELCH
b31-b24 --
R/W
GTIOCA Low GTIOCB 0GTIOCA 0GTIOCB R/W
GTCCRA
GTCCRA
1GTIOCA 0GTIOCB
GTCCRA
GTIOCA HighGTIOCB 0GTIOCA 1GTIOCB R/W
GTCCRA
GTCCRA
1GTIOCA 1GTIOCB
GTCCRA
ELC_GPTA GTCCRA 0ELC_GPTA GTCCRA
R/W
1ELC_GPTA GTCCRA
ELC_GPTB GTCCRA 0ELC_GPTB GTCCRA
R/W
1ELC_GPTB GTCCRA
ELC_GPTC GTCCRA 0ELC_GPTC GTCCRA
R/W
1ELC_GPTC GTCCRA
ELC_GPTD GTCCRA 0ELC_GPTD GTCCRA
R/W
1ELC_GPTD GTCCRA
ELC_GPTE GTCCRA 0ELC_GPTE GTCCRA
R/W
1ELC_GPTE GTCCRA
ELC_GPTFGTCCRA 0ELC_GPTF GTCCRA
R/W
1ELC_GPTF GTCCRA
ELC_GPTG GTCCRA 0ELC_GPTG GTCCRA
R/W
1ELC_GPTG GTCCRA
ELC_GPTH GTCCRA 0ELC_GPTH GTCCRA
R/W
1ELC_GPTH GTCCRA
0 0
R/W
GTICASR GTCCRA ASGTRGAR GTETRGA GTCCRA
GTETRGA GTCCRA ASGTRGAF GTETRGA GTCCRA
GTETRGA GTCCRA ASGTRGBR GTETRGB GTCCRA
GTETRGB GTCCRA ASGTRGBF GTETRGB GTCCRA
GTETRGB GTCCRA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 467 of 1551
RA4W1
23. PWM GPT
ASCARBL GTIOCB Low GTIOCA GTCCRA
GTIOCB 0 GTIOCA GTCCRA
ASCARBH GTIOCB High GTIOCA GTCCRA
GTIOCB 1 GTIOCA GTCCRA
ASCAFBL GTIOCB Low GTIOCA GTCCRA
GTIOCB 0 GTIOCA GTCCRA
ASCAFBH GTIOCB High GTIOCA GTCCRA
GTIOCB 1 GTIOCA GTCCRA
ASCBRAL GTIOCA Low GTIOCB GTCCRA
GTIOCA 0 GTIOCB GTCCRA
ASCBRAH GTIOCA High GTIOCB GTCCRA
GTIOCA 1 GTIOCB GTCCRA
ASCBFAL GTIOCA Low GTIOCB GTCCRA
GTIOCA 0 GTIOCB GTCCRA
ASCBFAH GTIOCA High GTIOCB GTCCRA
GTIOCA 1 GTIOCB GTCCRA
ASELCm ELC_GPTm GTCCRA m = A H ELC_GPTm GTCCRA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 468 of 1551
RA4W1
23. PWM GPT
23.2.11 PWM BGTICBSR
GPT32m.GTICBSR 4007 8028h + 0100h � m (m = 0 3), GPT16m.GTICBSR 4007 8028h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
BSELC BSELC BSELC BSELC BSELC BSELC BSELC BSELC
H
G
F
E
D
C
B
A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
BSCBF BSCBF BSCBR BSCBR BSCAF BSCAF BSCAR BSCAR
AH
AL
AH
AL
BH
BL
BH
BL
--
--
--
--
BSGTR BSGTR BSGTR BSGTR GBF GBR GAF GAR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
BSGTRGAR GTETRGA 0GTETRGA GTCCRB R/W
GTCCRB
1GTETRGA GTCCRB
b1
BSGTRGAF GTETRGA 0GTETRGA GTCCRB R/W
GTCCRB
1GTETRGA GTCCRB
b2
BSGTRGBR GTETRGB 0GTETRGB GTCCRB R/W
GTCCRB
1GTETRGB GTCCRB
b3
BSGTRGBF GTETRGB 0GTETRGB GTCCRB R/W
GTCCRB
1GTETRGB GTCCRB
b7-b4 --
0 0
R/W
b8
BSCARBL
GTIOCB Low GTIOCA 0GTIOCB 0GTIOCA
R/W
GTCCRB
GTCCRB
1GTIOCB 0GTIOCA
GTCCRB
b9
BSCARBH
GTIOCB High GTIOCA 0GTIOCB 1GTIOCA
R/W
GTCCRB
GTCCRB
1GTIOCB 1GTIOCA
GTCCRB
b10
BSCAFBL
GTIOCB Low GTIOCA 0GTIOCB 0GTIOCA
R/W
GTCCRB
GTCCRB
1GTIOCB 0GTIOCA
GTCCRB
b11
BSCAFBH
GTIOCB High GTIOCA 0GTIOCB 1GTIOCA
R/W
GTCCRB
GTCCRB
1GTIOCB 1GTIOCA
GTCCRB
b12
BSCBRAL
GTIOCA Low GTIOCB 0GTIOCA 0GTIOCB
R/W
GTCCRB
GTCCRB
1GTIOCA 0GTIOCB
GTCCRB
b13
BSCBRAH
GTIOCA High GTIOCB 0GTIOCA 1GTIOCB
R/W
GTCCRB
GTCCRB
1GTIOCA 1GTIOCB
GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 469 of 1551
RA4W1
23. PWM GPT
R/W
b14
BSCBFAL
GTIOCA Low GTIOCB 0GTIOCA 0GTIOCB
R/W
GTCCRB
GTCCRB
1GTIOCA 0GTIOCB
GTCCRB
b15
BSCBFAH
GTIOCA High GTIOCB 0GTIOCA 1GTIOCB
R/W
GTCCRB
GTCCRB
1GTIOCA 1GTIOCB
GTCCRB
b16
BSELCA
ELC_GPTA GTCCRB 0ELC_GPTA GTCCRB
R/W
1ELC_GPTA GTCCRB
b17
BSELCB
ELC_GPTB GTCCRB 0ELC_GPTB GTCCRB
R/W
1ELC_GPTB GTCCRB
b18
BSELCC
ELC_GPTCGTCCRB 0ELC_GPTC GTCCRB
R/W
1ELC_GPTC GTCCRB
b19
BSELCD
ELC_GPTDGTCCRB 0ELC_GPTD GTCCRB
R/W
1ELC_GPTD GTCCRB
b20
BSELCE
ELC_GPTE GTCCRB 0ELC_GPTE GTCCRB
R/W
1ELC_GPTE GTCCRB
b21
BSELCF
ELC_GPTFGTCCRB 0ELC_GPTF GTCCRB
R/W
1ELC_GPTF GTCCRB
b22
BSELCG
ELC_GPTG GTCCRB 0ELC_GPTG GTCCRB
R/W
1ELC_GPTG GTCCRB
b23
BSELCH
ELC_GPTHGTCCRB 0ELC_GPTH GTCCRB
R/W
1ELC_GPTH GTCCRB
b31-b24 --
0 0
R/W
GTICBSR GTCCRB BSGTRGAR GTETRGA GTCCRB
GTETRGA GTCCRB BSGTRGAF GTETRGA GTCCRB
GTETRGA GTCCRB BSGTRGBR GTETRGB GTCCRB
GTETRGB GTCCRB BSGTRGBF GTETRGB GTCCRB
GTETRGB GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 470 of 1551
RA4W1
23. PWM GPT
BSCARBL GTIOCB Low GTIOCA GTCCRB
GTIOCB 0 GTIOCA GTCCRB
BSCARBH GTIOCB High GTIOCA GTCCRB
GTIOCB 1 GTIOCA GTCCRB
BSCAFBL GTIOCB Low GTIOCA GTCCRB
GTIOCB 0 GTIOCA GTCCRB
BSCAFBH GTIOCB High GTIOCA GTCCRB
GTIOCB 1 GTIOCA GTCCRB
BSCBRAL GTIOCA Low GTIOCB GTCCRB
GTIOCA 0 GTIOCB GTCCRB
BSCBRAH GTIOCA High GTIOCB GTCCRB
GTIOCA 1 GTIOCB GTCCRB
BSCBFAL GTIOCA Low GTIOCB GTCCRB
GTIOCA 0 GTIOCB GTCCRB
BSCBFAH GTIOCA High GTIOCB GTCCRB
GTIOCA 1 GTIOCB GTCCRB
BSELCm ELC_GPTm GTCCRB m = A H ELC_GPTm GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 471 of 1551
RA4W1
23. PWM GPT
23.2.12 PWM GTCR
GPT32m.GTCR 4007 802Ch + 0100h � m (m = 0 3), GPT16m.GTCR 4007 802Ch + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
TPCS[2:0]
--
--
--
--
--
MD[2:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
-- CST
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
CST
0
R/W
1
b15-b1 --
0 0
R/W
b18-b16 MD[2:0]
b18 b16
0 0 0PWM
R/W
0 0 1
0 1 0 0 1 1
1 0 0PWM 132
1 0 1PWM 232
1 1 0PWM 364
1 1 1
b23-b19 --
0 0
R/W
b26-b24 TPCS[2:0]
b26 b24 0 0 0PCLKD/1
R/W
0 0 1PCLKD/4
0 1 0PCLKD/16
0 1 1PCLKD/64
1 0 0PCLKD/256
1 0 1PCLKD/1024
b31-b27 --
0 0
R/W
GTCR GTCNT
CST GTCNT 1 GTSSR.CSTRT 1 GTSTR 1 ELC GTSSR GTIOCA/GTIOCB/ GTETRGn
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 472 of 1551
RA4W1
23. PWM GPT
0 GTSSR.CSTOP 1 GTSTP 1
ELC GTSSR GTIOCA/GTIOCB/ GTETRGn
0
MD[2:0] GPT MD[2:0] GTCNT
TPCS[2:0] GTCNT
TPCS[2:0] GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 473 of 1551
RA4W1
23. PWM GPT
23.2.13 PWM GTUDDTYC
GPT32m.GTUDDTYC 4007 8030h + 0100h � m (m = 0 3), GPT16m.GTUDDTYC 4007 8030h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
OBDTY OBDTY
R
F
OBDTY[1:0]
--
--
--
--
OADTY OADTY
R
F
OADTY[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
-- UDF UD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
b0
UD
b1
UDF
b15-b2 b17-b16
-- OADTY[1:0]
b18
OADTYF
b19
OADTYR
b23-b20 b25-b24
-- OBDTY[1:0]
b26
OBDTYF
b27
OBDTYR
b31-b28 -- x: Don't care
R/W
0GTCNT
R/W
1GTCNT
0
R/W
1
00
R/W
GTIOCA b17 b16 0 xGTIOCA
R/W
1 0GTIOCA 0%
1 1GTIOCA 100%
GTIOCA 0
R/W
1
0%/100% 00%/100%0%/100% R/W
GTIOCA
GTIOA[3:2]
10%/100%
GTIOA[3:2]
00
R/W
GTIOCB b25 b24 0 xGTIOCB
R/W
1 0GTIOCB 0%
1 1GTIOCB 100%
GTIOCB 0
R/W
1
0%/100% 00%/100%0%/100% R/W
GTIOCB
GTIOB[3:2]
10%/100%
GTIOB[3:2]
00
R/W
GTUDDTYC GTCNT GTIOCA/GTIOCB
UD 0 GTCNT GTPR UD 1 GTCNT 0
UDF 0 UD 1 0 GTCNT GTPR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 474 of 1551
RA4W1
23. PWM GPT
UDF 0 UD 0 1 GTCNT 0
UDF 1 UD
UD UDF 0 UD
UDF 1 UD
UD
GTCNT
UDF
GTCNT UD 0 1 0
OADTY/OBDTY GTCNT = GTPR OADTY/OBDTY GTCNT = 0
OADTYF/OBDTYF 0 OADTY/OBDTY 1 GTCNT = GTPR GTCNT = 0OADTYF/ OBDTYF 1 OADTY/OBDTY 0
OADTY/OBDTY
OADTYF/OBDTYF 0 OADTY/OBDTY 1 OADTYF/OBDTYF 1 OADTY/OBDTY 0
OmDTY[1:0] GTIOCm m = AB
GTIOCm 0%100%
OmDTYF GTIOCm m = AB
OmDTY 0 1 0
OmDTYR 0%/100% GTIOCm m = AB
0%/100% GTIOCm GTIOR GTIOm[3:2] 00b GTIOR.GTIOm[3:2] 11b
0%/100% GPT32 OmDTYR 1 GTIOCm GTIOR.GTIOm[3:2]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 475 of 1551
RA4W1
23. PWM GPT
23.2.14 PWM I/O GTIOR
GPT32m.GTIOR 4007 8034h + 0100h � m (m = 0 3), GPT16m.GTIOR 4007 8034h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
NFCSB[1:0] NFBEN --
--
OBDF[1:0]
OBE
OBHLD
OBDFL T
--
GTIOB[4:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
NFCSA[1:0] NFAEN --
--
OADF[1:0]
OAE
OAHLD
OADFL T
--
GTIOA[4:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b4-b0 b5 b6
GTIOA[4:0] -- OADFLT
b7
OAHLD
b8 b10-b9
OAE OADF[1:0]
b12-b11 b13
-- NFAEN
b15-b14 NFCSA[1:0]
b20-b16 b21 b22
GTIOB[4:0] -- OBDFLT
b23
OBHLD
b24
OBE
b26-b25 OBDF[1:0]
b28-b27 b29
-- NFBEN
R/W
GTIOCA
23.5
R/W
00
R/W
GTIOCA 0 GTIOCA Low
R/W
1 GTIOCA High
0 GTIOCA R/W
GTIOCA
1 GTIOCA
GTIOCA
0
R/W
1
GTIOCA
b10 b9
0 0
R/W
0 1 GTIOCA Hi-Z
1 0 GTIOCA 0
1 1 GTIOCA 1
00
R/W
A
0GTIOCA
R/W
1GTIOCA
A
b15 b14
0 0PCLKD/1 0 1PCLKD/4 1 0PCLKD/16 1 1PCLKD/64
R/W
GTIOCB
23.5
R/W
00
R/W
GTIOCB 0 GTIOCB Low
R/W
1 GTIOCB High
0 GTIOCB R/W
GTIOCB
1 GTIOCB
GTIOCB
0
R/W
1
GTIOCB
b26 b25
0 0
R/W
0 1 GTIOCB Hi-Z
1 0 GTIOCB 0
1 1 GTIOCB 1
00
R/W
B
0GTIOCB
R/W
1GTIOCB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 476 of 1551
RA4W1
23. PWM GPT
R/W
b31-b30 NFCSB[1:0]
B
b31 b30
0 0PCLKD/1 0 1PCLKD/4 1 0PCLKD/16 1 1PCLKD/64
R/W
GTIOR GTIOCA GTIOCB
GTIOA[4:0] GTIOCA GTIOCA 23.5
OADFLT GTIOCA GTIOCA Low High
OAHLD GTIOCA GTIOCA
OAHLD 0 GTIOA[4:0] b4 OADFLT OADFLT OAHLD 1
OAE GTIOCA GTIOCA GTCCRA GTICASR
1 1 OAE GTIOCA
OADF[1:0] GTIOCA GTIOCA
NFAEN A GTIOCA
GTIOR
NFCSA[1:0] A GTIOCA
2
GTIOB[4:0] GTIOCB GTIOCB 23.5
OBDFLT GTIOCB GTIOCB High Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 477 of 1551
RA4W1
23. PWM GPT
OBHLD GTIOCB GTIOCB
OBHLD 0 GTIOB[4:0] b4
OBDFLT
OBDFLT
OBHLD 1
OBE GTIOCB GTIOCB GTCCRB GTICBSR
1 1 OBE GTIOCB
OBDF[1:0] GTIOCB GTIOCB
NFBEN B GTIOCB
GTIOR
NFCSB[1:0] B GTIOCB
2
23.5
GTIOA[4:0] GTIOB[4:0] (1/2)
GTIOA/GTIOB[4:0] b4 b3 b2 b1 b0 00000 00001 00010 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111
b4 Low
b3-b2 1 2 3
b1-b0 2
GTCCRA/GTCCRB
GTCCRA/GTCCRB Low
GTCCRA/GTCCRB High
GTCCRA/GTCCRB
Low GTCCRA/GTCCRB
GTCCRA/GTCCRB Low
GTCCRA/GTCCRB High
GTCCRA/GTCCRB
High GTCCRA/GTCCRB
GTCCRA/GTCCRB Low
GTCCRA/GTCCRB High
GTCCRA/GTCCRB
GTCCRA/GTCCRB
GTCCRA/GTCCRB Low
GTCCRA/GTCCRB High
GTCCRA/GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 478 of 1551
RA4W1
23. PWM GPT
23.5
GTIOA[4:0] GTIOB[4:0] (2/2)
GTIOA/GTIOB[4:0]
b4 b3 b2 b1 b0
b4
b3-b2 1 2 3
b1-b0 2
1 0 0 0 0 High
GTCCRA/GTCCRB
10001
GTCCRA/GTCCRB Low
10010
GTCCRA/GTCCRB High
10011
GTCCRA/GTCCRB
10100
Low GTCCRA/GTCCRB
10101
GTCCRA/GTCCRB Low
10110
GTCCRA/GTCCRB High
10111
GTCCRA/GTCCRB
11000
High GTCCRA/GTCCRB
11001
GTCCRA/GTCCRB Low
11010
GTCCRA/GTCCRB High
11011
GTCCRA/GTCCRB
11100
GTCCRA/GTCCRB
11101
GTCCRA/GTCCRB Low
11110
GTCCRA/GTCCRB High
11111
GTCCRA/GTCCRB
1.
2. 3.
GTCNT GTPR 0 GTCNT 0 GTPR GTCNT GTCNT 0 1 GTCCRA/GTCCRB PWM b3-b2 b1-b0 GTUPSR GTDNSR 1 1 b3-b2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 479 of 1551
RA4W1
23. PWM GPT
23.2.15 PWM GTINTAD
GPT32m.GTINTAD 4007 8038h + 0100h � m (m = 0 3), GPT16m.GTINTAD 4007 8038h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
GRPAB GRPAB
L
H
--
--
--
GRP[1:0]
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b23-b0
--
00 R/W
b25-b24 GRP[1:0]
b25 b24
0 0A 0 1B 1 x
R/W
b28-b26 --
00 R/W
b29
GRPABH
High 0High
R/W
1 High
b30
GRPABL
Low
0 Low
R/W
1 Low
b31
--
00
R/W
GTINTAD
GRP[1:0] GTIOCA GTIOCB GRPABH High GRPABL Low
POEG GRP[1:0] GTST.ODF GRP[1:0] GRP[1:0]
GTIOR.OAE GTIOR.OBE 0
GRPABH High GTIOCA GTIOCB 1
GRPABL Low GTIOCA GTIOCB 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 480 of 1551
RA4W1
23. PWM GPT
23.2.16 PWM GTST
GPT32m.GTST 4007 803Ch + 0100h � m (m = 0 3), GPT16m.GTST 4007 803Ch + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
-- OABLF OABHF --
--
--
-- ODF --
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
TUCF --
--
--
--
--
--
1
0
0
0
0
0
0
b8
b7
b6
b5
b4
b3
b2
b1
b0
-- TCFPU TCFPO TCFF TCFE TCFD TCFC TCFB TCFA
0
0
0
0
0
0
0
0
0
b0
b1
b2 b3 b4 b5 b6 b7 b14-b8 b15 b23-b16 b24 b28-b25 b29 b30 b31
TCFA
TCFB
TCFC TCFD TCFE TCFF TCFPO TCFPU -- TUCF -- ODF -- OABHF OABLF --
A
B
C D E F
High
Low
0GTCCRA
1GTCCRA
0GTCCRB
1GTCCRB
0GTCCRC 1GTCCRC
0GTCCRD 1GTCCRD
0GTCCRE 1GTCCRE
0GTCCRF 1GTCCRF
0 1
0 1
0 0
0GTCNT 1GTCNT
0 0
0 1
0 0
0GTIOCA GTIOCB 1 1GTIOCA GTIOCB 1
0GTIOCA GTIOCB 0 1GTIOCA GTIOCB 0
0 0
1. 0 1
R/W R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/W R
R/W R
R/W R
R
R/W
GTST GPT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 481 of 1551
RA4W1
23. PWM GPT
TCFA A GTCCRA 1 GTCCRA GTCNT = GTCCRA GTCCRA GTCNT GTCCRA
0 0
TCFB B GTCCRB 1 GTCCRB GTCNT = GTCCRB GTCCRB GTCNT GTCCRB
0 0
TCFC C GTCCRC 1 GTCNT = GTCCRC
0 0
GTCR.MD[2:0] = 001b GTCR.MD[2:0] = 110b PWM 3 GTBER.CCRA[1:0] = 01b10b11bGTCCRC
TCFD D GTCCRD 1 GTCNT = GTCCRD 0 0
GTCR.MD[2:0] = 001b GTCR.MD[2:0] = 110b PWM 3 GTBER.CCRA[1:0] = 10b11bGTCCRD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 482 of 1551
RA4W1
23. PWM GPT
TCFE E GTCCRE 1 GTCNT = GTCCRE
0 0
GTCR.MD[2:0] = 001b GTCR.MD[2:0] = 110b PWM 3 GTBER.CCRB[1:0] = 01b10b11bGTCCRE
TCFF F GTCCRF 1 GTCNT = GTCCRF 0 0
GTCR.MD[2:0] = 001b GTCR.MD[2:0] = 110b PWM 3 GTBER.CCRB[1:0] = 10b11bGTCCRF
TCFPO 1 GTCNT GTPR 0 GTCNT GTPR GTPR - 1 GTCNT GTPR 0
0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 483 of 1551
RA4W1
23. PWM GPT
TCFPU
1 GTCNT 0 GTPR
GTCNT 0 1 GTCNT 0
GTPR
0 0
TUCF GTCNT
1 0
ODF GRP[1:0]
OABHF High GTIOCA GTIOCB 1 GTIOCA GTIOCB 0 0
0 OABHF GTINTAD.GRPABH = 1OABHF
POEG 1 OAE OBE 1 GTIOCA GTIOCB 1
0 OAE OBE 1 GTIOCA GTIOCB
OAE OBE 1 GTIOCA GTIOCB 0 OAE OBE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 484 of 1551
RA4W1
23. PWM GPT
OABLF Low
GTIOCA GTIOCB 0
GTIOCA GTIOCB 1 0 0 OABLF GTINTAD.GRPABL = 1OABLF POEG
1
OAE OBE 1 GTIOCA GTIOCB 0
0
OAE OBE 1 GTIOCA GTIOCB
OAE OBE 1 GTIOCA GTIOCB 1
OAE OBE 0
OABHF/OABLF PWM GPT OABHF/OABLF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 485 of 1551
RA4W1
23. PWM GPT
23.2.17 PWM GTBER
GPT32m.GTBER 4007 8040h + 0100h � m (m = 0 3), GPT16m.GTBER 4007 8040h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24
--
--
--
--
--
--
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
b23 b22 b21 b20
--
CCRS WT
0
0
PR[1:0]
0
0
b7
b6
b5
b4
--
--
--
--
0
0
0
0
b19 b18
CCRB[1:0]
0
0
b17 b16
CCRA[1:0]
0
0
b3
b2
b1
b0
--
-- BD[1] BD[0]
0
0
0
0
R/W
b0
BD[0]
GTCCR
0
R/W
b1
BD[1]
GTPR
1
R/W
b15-b2 --
00
R/W
b17-b16 CCRA[1:0] GTCCRA
b17 b16
0 0
R/W
0 1GTCCRA
GTCCRC
1 xGTCCRA
GTCCRC GTCCRD
b19-b18 CCRB[1:0] GTCCRB
b19 b18
0 0
R/W
0 1GTCCRB
GTCCRE
1 xGTCCRB
GTCCRE GTCCRF
b21-b20 PR[1:0]
GTPR
b21 b20
0 0 0 1GTPBR
GTPR 1 x
R/W
b22
CCRSWT GTCCRAGTCCRB 1 GTCCRA GTCCRB
R/W
1
0 0
b31-b23 --
00
R/W
GTBER GTCNT
BD[0] GTCCR
GTCCRAGTCCRCGTCCRD GTCCRBGTCCRE GTCCRF
GTDTCR.TDE 1 BD[0] 0 GTCCRB GTCCRB
BD[1] GTPR GTPR GTPBR
CCRA[1:0] GTCCRA
GTCCRAGTCCRC GTCCRD GTCR GTCR 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 486 of 1551
RA4W1
23. PWM GPT
CCRB[1:0] GTCCRB
GTCCRBGTCCRE GTCCRF GTCR GTCR 1
PR[1:0] GTPR
GTPR GTPBR
CCRSWT GTCCRAGTCCRB
CCRSWT 1 GTCCRA GTCCRB 1 0 0
1.
PWM 3 64
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 487 of 1551
RA4W1
23. PWM GPT
23.2.18 PWM GTCNT
GPT32m.GTCNT 4007 8048h + 0100h � m (m = 0 3), GPT16m.GTCNT 4007 8048h + 0100h � m (m = 4, 5, 8) b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
GTCNT GPT32mm = 0 3 32 GPT16mm = 4, 5, 8GTCNT 16 GTCNT 32 8 16
GPT16mm = 4, 5, 832 16 0000h
GTCNT 0 GTCNT GTPR
23.2.19 PWM nGTCCRn(n = A F)
GPT32m.GTCCRA 4007 804Ch + 0100h � m (m = 0 3), GPT16m.GTCCRA 4007 804Ch + 0100h � m (m = 4, 5, 8), GPT32m.GTCCRB 4007 8050h + 0100h � m (m = 0 3), GPT16m.GTCCRB 4007 8050h + 0100h � m (m = 4, 5, 8), GPT32m.GTCCRC 4007 8054h + 0100h � m (m = 0 3), GPT16m.GTCCRC 4007 8054h + 0100h � m (m = 4, 5, 8), GPT32m.GTCCRD 4007 805Ch + 0100h � m (m = 0 3), GPT16m.GTCCRD 4007 805Ch + 0100h � m (m = 4, 5, 8), GPT32m.GTCCRE 4007 8058h + 0100h � m (m = 0 3), GPT16m.GTCCRE 4007 8058h + 0100h � m (m = 4, 5, 8), GPT32m.GTCCRF 4007 8060h + 0100h � m (m = 0 3), GPT16m.GTCCRF 4007 8060h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1. GPT16mm = 4, 5, 8 16 0000h
GTCCRn GTCCRn GTCNT 16 32 GTCCRn 16 32 16 0000h
GTCCRA GTCCRB GTCCRC GTCCRE GTCCRA GTCCRB
GTCCRD GTCCRF GTCCRC GTCCRE GTCCRA GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 488 of 1551
RA4W1
23. PWM GPT
23.2.20 PWM GTPR
GPT32m.GTPR 4007 8064h + 0100h � m (m = 0 3), GPT16m.GTPR 4007 8064h + 0100h � m (m = 4, 5, 8) b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1. GPT16mm = 4, 5, 8 16 0000h
GTPR GTCNT GTPR GTCNT 16 32 GTPR 16 32 16 0000h
GTPR + 1 GTPR � 2
23.2.21 PWM GTPBR
GPT32m.GTPBR 4007 8068h + 0100h � m (m = 0 3), GPT16m.GTPBR 4007 8068h + 0100h � m (m = 4, 5, 8) b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1. GPT16mm = 4, 5, 8 16 0000h
GTPBR GTPR GTPBR GTCNT 16 32 GTPBR 16 32 16 0000h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 489 of 1551
RA4W1
23. PWM GPT
23.2.22 PWM GTDTCR
GPT32m.GTDTCR 4007 8088h + 0100h � m (m = 0 3), GPT16m.GTDTCR 4007 8088h + 0100h � m (m = 4, 5, 8)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
-- TDE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
TDE
b31-b1 --
R/W
0GTDVU GTCCRB
R/W
1GTDVU
GTCCRB
00
R/W
GTDTCR GPT GTDVU
TDE
GTDVU GTDVU GTCCRA GTDVU GTCCRB TDE PWM
GTCCRB GTCCRB GTCCRB
GTPR - 1 1 0
GTPR 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 490 of 1551
RA4W1
23. PWM GPT
23.2.23 PWM UGTDVU
GPT32m.GTDVU 4007 808Ch + 0100h � m (m = 0 3), GPT16m.GTDVU 4007 808Ch + 0100h � m (m = 4, 5, 8) b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1. GPT16mm = 4, 5, 8 16 0000h
GTDVU PWM GTDVU GTCNT16 32 GTDVU 16 32 16 0000h
GTCCRB GTDVU GTCCRB 0
GPT GTDVU GTDVU GTCR CST GPT GTDVU 32 8 16
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 491 of 1551
RA4W1
23. PWM GPT
23.2.24 OPSCR
GPT_OPS.OPSCR 4007 8FF0h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
NFCS[1:0] NFEN --
-- GODF GRP[1:0]
--
-- ALIGN --
INV
N
P
FB
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
EN
--
W
V
U
--
WF
VF
UF
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0 b1 b2 b3 b4 b5 b6 b7 b8
b15-b9 b16
b17
b18
b19
b20 b21
b23-b22 b25-b24
b26
b28-b27 b29
b31-b30
UF VF WF -- U V W -- EN
-- FB
P
N
INV
-- ALIGN
-- GRP[1:0]
GODF
-- NFEN
NFCS[1:0]
U V W
P N
R/W
OPSCR.FB
R/W
1 R/W
R/W
00
R/W
R
OPSCR.FB = 0PCLKD R
OPSCR.FB = 1UF/VF/WF
R
00
R/W
0"Hi-Z" 1 1
R/W
00
R/W
R/W 0 1OPSCR.UF/VF/WF
0
R/W
1PWMGPT320 PWM
0
R/W
1PWMGPT320 PWM
0 High
R/W
1 Low
00
R/W
0 PCLKD
R/W
1 PWM
00
R/W
b25 b24
0 0 A 0 1 B 1 x
R/W
0 1 OPSCR.EN 1
R/W
00
R/W
0
R/W
1
b31 b30
0 0PCLKD/1 0 1PCLKD/4 1 0PCLKD/16 1 1PCLKD/64
R/W
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 492 of 1551
RA4W1
23. PWM GPT
1.
OPSCR.GODF = 1 OPSCR.GRP[1:0] High OPSCR.EN 0
OPSCR DC
UFVFWF OPSCR.FB 0
UF/VF/WF U/V/W
UVW OPSCR.FB 0 PCLKD OPSCR.FB 1
OPSCR.UOPSCR.VOPSCR.W OPSCR.UFOPSCR.VFOPSCR.WF
EN
OPSCR.EN 1 OPSCR.EN = 0 OPSCR.FBOPSCR.UF/VF/WF OPSCR.P/NOPSCR.INVOPSCR.ALIGNOPSCR.RVOPSCR.GRP[1:0]OPSCR.GODFOPSCR.NFEN OPSCR.NFCS[1:0] EN 1 OPSCR.GODF = 1 OPSCR.GRP[1:0] High OPSCR.EN 0
FB OPSCR.UFVFWF
P P GPT320 PWM PWM GTOUUP GTOVUP
GTOWUP
N N GPT320 PWM PWM GTOULO GTOVLO
GTOWLO
INV High Low
ALIGN PCLKD PWM OPSCR.FB OPSCR.ALIGN = 0 PCLKD
. PWM OPSCR.P/N = 1PCLKD PWM
. OPSCR.ALIGN = 1 PWM
GRP[1:0] A, B
GODF OPSCR.GODF = 1 OPSCR.GRP[1:0] High OPSCR.EN
0 OPSCR.GODF = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 493 of 1551
RA4W1
23. PWM GPT
NFEN OPSCR.NFEN = 0
. OPSCR.EN 0
NFCS[1:0] OPSCR.NFEN = 1
1. NFCS[1:0] 2. 2 3. OPSCR.EN 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 494 of 1551
RA4W1
23. PWM GPT
23.3
23.3.1
32 GTPR GTCNT GTCCRA GTCCRB GTIOCA GTIOCB GTCCRA GTCCRB GTCCRC GTCCRD GTCCRA GTCCRE GTCCRF GTCCRB
23.3.1.1
(1)
GTCR.CST 1 GTCR.CST
GTCR
GTSSR.CSTRT 1 GTSTR GPT 1
GTPSR.CSTOP 1 GTSTP GPT 1
GTSSR
GTPSR
(2)
GTCNT GTUPSR GTDNSR 00000000h GTCR.CST 1 GTCNT GTPR 0 GTST.TCFPO 1 GTCNT 00000000h
23.3
GTCNT GPT320.GTPR
23.3
0000_0000h GTCR.CST GTST.TCFPO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 495 of 1551
RA4W1 23.4
23. PWM GPT
GTCR.MD[2:0] 23.3 000b PWM
GTUDDTYC 23.3 GTUDDTYC[1:0] 11b GTUDDTYC[1:0] 01b
GTCR.TPCS[2:0]
GTPR
GTCNT 23.3 0000_0000h
GTCR.CST 1
23.4
(3)
GTCNT GTUPSR GTDNSR 00000000h GTUDDTYC.UD GTCNT 0 GTPR GTST.TCFPU 1 GTCNT GTPR
23.5
GTCNT GTCNT
GTPR
0000_0000h GTCR.CST GTST.TCFPU
23.5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 496 of 1551
RA4W1
23. PWM GPT
23.6
GTCR.MD[2:0] 23.5 000b PWM
GTUDDTYC 23.5 GTUDDTYC[1:0] 10b
GTUDDTYC[1:0] 00b
GTCR.TPCS[2:0]
GTPR
GTCNT 23.5 GTPR
GTCR.CST 1
23.6
(4)
GTCNT GTUPSR
GTUPSR GTCR.TPCS[2:0] GTUDDTYC.UD GTCNT
GTCR.CST 1 GTCR.CST 1 GTCR.TPCS[2:0] 1 GTCR.TPCS[2:0] PCLKD1 GTCR.TPCS[2:0] 000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 497 of 1551
RA4W1
23. PWM GPT
GTETRGA 23.7
PCLKD GTETRGA
GTCNT
N
N + 1
23.7
23.8
GTUPSR
GTPR
GTCNT
GTCR.CST 1
23.8
(5)
GTCNT GTDNSR
GTDNSR GTCR.TPCS[2:0] GTUDDTYC.UD GTCNT
GTCR.CST 1 GTCR.CST 1 GTCR.TPCS[2:0] 1 GTCR.TPCS[2:0] PCLKD1 GTCR.TPCS[2:0] 000b
GTETRGA 23.9
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 498 of 1551
RA4W1
23. PWM GPT
PCLKD GTETRGA
GTCNT
N + 1
N
23.9
23.10
GTDNSR
GTPR
GTCNT
GTCR.CST 1
23.10
(6)
GTCNT 0
GTCSR.CCLR 1 GTCLR GPT 1
GTCSR
GTCNT GTCNT GTCR.CST = 1GTCR.CST = 0GTCLR 1
GTCR.MD[2:0] GTST.TUCF = 0 GTCLR 1 GTCNT GTPR GTCLR 1 GTCNT 0
GTUPSR GTDNSR 1 1 GTCLR PCLKD GTCR.TPCS[2:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 499 of 1551
RA4W1
23. PWM GPT
23.3.1.2
GTCNT GTCCRA GTCCRB GPT GTIOCA GTIOCB Low High GTPR " " GTIOCA GTIOCB Low High
" "
GTCNT GTPR 0
GTCNT 0 GTPR
GTCNT
GTCNT 0 1
(1) Low High
GTCCRA GTCCRB Low High 23.11
GPT320.GTCNT GPT320.GTCCRA GTIOC0A High GPT320.GTCCRB GTIOC0B Low
GPT320.GTCNT
GPT320.GTPR GPT320.GTCCRA GPT320.GTCCRB
0000_0000h
GTIOC0A
GTIOC0B
[] GPT320.GTIOR.GTIOA[4:0]LowHigh GPT320.GTIOR.GTIOB[4:0]HighLow
23.11
Low High
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 500 of 1551
RA4W1 Low High 23.12
23. PWM GPT
23.12
GTCR.MD[2:0] 23.11000bPWM
GTUDDTYC 23.11GTUDDTYC[1:0] 11b GTUDDTYC[1:0]01b
GTCR.TPCS[2:0]
GTPR
GTCNT
GTIOC GTIOR.GTIOA[4:0], GTIOB[4:0]GTIOC 23.11GTIOA[4:0] = 00010bGTIOB[4:0] = 10001b
GTIOC GTIOR.OAE, OBEGTIOC
GTCCRA, GTCCRB
GTCR.CST 1
Low High
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 501 of 1551
RA4W1
23. PWM GPT
(2)
GTCCRA GTCCRB 23.13 23.14 23.13 GPT320.GTCNT GPT320.GTCCRA GPT320.GTCCRB GTIOC0A GTIOC0B
23.14 GPT320.GTCNT GPT320.GTCCRA GTIOC0A GTIOC0B
GPT320.GTCNT
GPT320.GTPR GPT320.GTCCRB GPT320.GTCCRA
0000_0000h
GTIOC0A
GTIOC0B
GPT320.GTIOR.GTIOA[4:0] High GPT320.GTIOR.GTIOB[4:0] Low
23.13
1
GPT320.GTCNT
GPT320.GTPR GPT320.GTCCRA
0000_0000h
GTIOC0A
GTIOC0B
GPT320.GTIOR.GTIOA[4:0]High GPT320.GTIOR.GTIOB[4:0]Low
23.14
2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 502 of 1551
RA4W1 23.15
23. PWM GPT
23.15
GTCR.MD[2:0] 23.13 23.14 000bPWM
GTUDDTYC 23.13 23.14 GTUDDTYC[1:0]11b GTUDDTYC[1:0] 01b
GTCR.TPCS[2:0]
GTPR
GTCNT
GTIOC GTIOR.GTIOA[4:0], GTIOB[4:0] GTIOC 23.13 GTIOR.GTIOA[4:0] = 10011b,GTIOR.GTIOB[4:0] = 00011b 23.14 GTIOR.GTIOA[4:0] = 10011b, GTIOR.GTIOB[4:0] = 01100b
GTIOC GTIOR.OAE, OBEGTIOC
GTCCRA, GTCCRB
GTCR.CST 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 503 of 1551
RA4W1
23. PWM GPT
23.3.1.3
GTICASR GTICBSR GTCCRA GTCCRB GTCNT
23.16
GPT320.GTCNT GTIOC0A GTICCRA GTIOC0B GTICCRB
GPT320.GTCNT
GPT320.GTPR E400h C154h 9682h
1100h 0000_0000h
GTIOC0A
GTIOC0B
GPT320.GTCCRA
1100h
E400h
GPT320.GTCCRB
C154h
GTICASR GTICBSR
23.16
9682h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 504 of 1551
RA4W1
23. PWM GPT
23.17
23.17
GTCR.MD[2:0] 23.16000bPWM
GTUDDTYC 23.16GTUDDTYC[1:0] 11b GTUDDTYC[1:0]01b
GTCR.TPCS[2:0]
GTPR
GTCNT
GTICASR, GTICBSR 23.16GTICASR = 0000_0F00h, GTICBSR = 0000_3000h
GTCR.CST 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 505 of 1551
RA4W1
23. PWM GPT
23.3.2
GTBER GTPR GTPBR GTCCRA GTCCRC GTCCRD GTCCRB GTCCRE GTCCRF
23.3.2.1 GTPR
GTPBR GTPR
GTCSR[23:0] GTCSR.CCLR 1GTCLR[n] 1n = GTPR 23.18 23.20 GTPR 23.21
GTCNT
cccc bbbb aaaa
0000_0000h
GTPBR GTPR
bbbb
cccc
aaaa
bbbb
cccc
23.18
GTPR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 506 of 1551
RA4W1
23. PWM GPT
GTCNT
cccc bbbb aaaa
0000_0000h GTPBR
GTPR
aaaa
bbbb
aaaa
cccc
bbbb
cccc
23.19
GTPR
GTCNT
cccc bbbb aaaa
0000_0000h GTPBR aaaa
GTPR
bbbb
aaaa
cccc
bbbb
23.20
GTPR
cccc
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 507 of 1551
RA4W1
23. PWM GPT
23.21
GTCR.MD[2:0] 23.18 23.19000bPWM 23.20100bPWM 1
GTUDDTYC 23.18GTUDDTYC[1:0] 11b GTUDDTYC[1:0]01b 23.19 GTUDDTYC[1:0]10b GTUDDTYC[1:0] 00b
GTCR.TPCS[2:0]
GTPR
GTCNT
GTBER.PR[1:0] 23.18 23.19 23.20PR[1:0] = 01b
1 GTPBR
GTCR.CST 1
1 GTPBR
GTPR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 508 of 1551
RA4W1
23. PWM GPT
23.3.2.2 GTCCRAGTCCRB
GTCCRC GTCCRA GTCCRD GTCCRC GTCCRA GTCCRE GTCCRB GTCCRF GTCCRE GTCCRB
GTCCRA GTCCRB GTBER.CCRA[1:0] GTBER.CCRB[1:0] 10b 11b GTBER.CCRA[1:0] GTBER.CCRB[1:0] 01b GTCCRA GTCCRB GTBER.CCRA[1:0] GTBER.CCRB[1:0] 00b
(1) GTCCRA GTCCRB
PWM 1 PWM 2
23.3.2.1GTPR
GTBER.CCRSWT 1 GTCCRA GTCCRB PWM 3 GTCCRD A GTCCRF B
GTCCRA GTCCRB 23.22 23.24 GTCCRA GTCCRB 23.25
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 509 of 1551
RA4W1
23. PWM GPT
GPT320.GCNT
GPT320.GTPR cccc bbbb aaaa
0000_0000h
GPT320.GTCCRC GPT320.GTCCRA
bbbb aaaa
cccc
bbbb
GTIOC0A
cccc
23.22
GTCCRAGTCCRB GTCCRA High Low
GPT320.GTCNT
GPT320.GTPR cccc bbbb aaaa
0000_0000h
GPT320.GTCCRD
cccc
GPT320.GTCCRC
bbbb
GPT320.GTCCRA GTIOC0A
aaaa
cccc
bbbb
cccc
23.23
GTCCRAGTCCRB GTCCRA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 510 of 1551
RA4W1
23. PWM GPT
GPT320.GTCNT
GPT320.GTPR dddd cccc bbbb aaaa
0000_0000h
GPT320.GTCCRF GPT320.GTCCRE GPT320.GTCCRB
cccc aaaa
bbbb
cccc
aaaa
dddd
bbbb
cccc
dddd
bbbb
dddd
GTIOC0B
23.24
GTCCRAGTCCRB GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 511 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0] 23.22 000bPWM 23.23 100b PWM 1 23.24 101b PWM 2
GTUDDTYC 23.22 GTUDDTYC[1:0] 11b GTUDDTYC[1:0] 01b
GTCR.TPCS[2:0]
GTPR
GTCNT
GTIOC GTIOR.GTIOA[4:0], GTIOB[4:0] GTIOC 23.22 GTIOA[4:0] = 00110b 23.23 GTIOA[4:0] = 00011b 23.24 GTIOB[4:0] = 00011b)
GTIOC GTIOR.OAE, OBEGTIOC
GTBER.CCRA[1:0], CCRB[1:0] 23.22 CCRA[1:0] = 01b 23.23 CCRA[1:0] = 1xb 23.24 CCRB[1:0] = 1xb
GTIOCA GTCCRA GTIOCB GTCCRB
1 GTIOCA GTCCRC GTIOCB GTCCRE 2 1 GTIOCA GTCCRD GTIOCB GTCCRF
GTCR.CST 1
1 GTIOCA GTCCRC GTIOCB GTCCRE 2 1 GTIOCA GTCCRD GTIOCB GTCCRF
23.25
GTCCRAGTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 512 of 1551
RA4W1
23. PWM GPT
(2) GTCCRA GTCCRB
GTCNT GTCCRA GTCCRB GTCCRA GTCCRB
GTCCRA GTCCRB 23.26 23.27 GTCCRA GTCCRB 23.28
GPT320.GTCNT
GPT320.GTPR cccc bbbb aaaa
0000_0000h
GTIOC0A
GPT320.GTCCRA GPT320.GTCCRC
aaaa
bbbb
aaaa
cccc bbbb
23.26
GTCCRAGTCCRB GTIOC0A GTIOC0A GTCNT
GPT320.GTCNT
GPT320.GTPR cccc bbbb aaaa
0000_0000h
GTIOC0B GPT320.GTCCRB GPT320.GTCCRE GPT320.GTCCRF
aaaa
bbbb
aaaa
cccc bbbb
aaaa
23.27
GTCCRAGTCCRB GTIOC0B GTIOC0B GTCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 513 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0]GTCSR 23.26GTCR.MD[2:0] = 000bPWMGTCSR = 0000_0F00h 23.27GTCR.MD[2:0] = 000bPWMGTCSR = 0000_F000h
GTUDDTYC 23.26GTUDDTYC[1:0] 11b GTUDDTYC[1:0]01b
GTCR.TPCS[2:0]
GTPR
GTCNT
GTICASR GTICBSR 23.26GTICASR = 0000_0F00h 23.27GTICBSR = 0000_F000h
GTBER.CCRA, CCRB 23.26GTBER.CCRA[1:0] = 01b 23.27 GTBER.CCRB[1:0] = 1xb
GTCR.CST 1
23.28
GTCCRAGTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 514 of 1551
RA4W1
23. PWM GPT
23.3.3 PWM
GPT GTCNT GTCCRA GTCCRB GTIOCA GTIOCB PWM GTDTCR GTDVU GTCCRB
23.3.3.1 PWM
PWM GTPR GTCNT GTCCRA GTCCRB GTIOCA GTIOCB PWM GTIOR Low High
23.29 PWM 23.30 PWM
GPT320.GTCNT
GPT320.GTPR ffff
eeee dddd cccc bbbb aaaa
0000_0000h
GPT320.GTCCRC GPT320.GTCCRA
cccc aaaa
eeee
cccc
eeee
GPT320.GTCCRE GPT320.GTCCRB
dddd bbbb
ffff
dddd
ffff
GTIOC0A
GTIOC0B
23.29
PWM GTCCRA/GTCCRB High Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 515 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0] 23.29 000bPWM
GTUDDTYC 23.29 GTUDDTYC[1:0] 11b GTUDDTYC[1:0] 01b
GTCR.TPCS[2:0]
GTPR
GTCNT
GTIOC GTIOR.GTIOA[4:0], GTIOB[4:0] GTIOC 23.29 GTIOR.GTIOA[4:0] = 00110b, GTIOR.GTIOB[4:0] = 00110b
GTIOC GTIOR.OAE, OBE GTIOC
GTBER.CCRA[1:0], CCRB[1:0] 23.29 GTBER.CCRA[1:0] = 01b, GTBER.CCRB[1:0] = 01b
GTIOCA GTCCRA GTIOCB GTCCRB
1 GTIOCA GTCCRCGTIOCB GTCCRE 2 GTIOCAGTCCRD GTIOCB GTCCRF
GTCR.CST 1
1 GTIOCA GTCCRCGTIOCB GTCCRE 2 GTIOCAGTCCRD GTIOCB GTCCRF
23.30
PWM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 516 of 1551
RA4W1
23. PWM GPT
23.3.3.2
GTPR GTCNT GTCCRA GTCCRB GTIOCA GTIOCB PWM
GTCCRC GTCCRA
GTCCRE GTCCRB
GTCCRD A
GTCCRF B
GTCCRA A GTCCRA
GTCCRB B GTCCRB
GTIOR Low High GTBER.CCRSWT 1 GTCCRD A GTCCRF B GTDTCR GTDVU GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 517 of 1551
RA4W1
23. PWM GPT
23.31 23.32
GPT320.GTCNT
GPT320.GTPR hhhh gggg ffff eeee dddd cccc bbbb aaaa
0000_0000h
GPT320.GTCCRD
A
GPT320.GTCCRC
GPT320.GTCCRA bbbb
eeee gggg
eeee
dddd
gggg
dddd
eeee
GPT320.GTCCRF
ffff
B
hhhh
GPT320.GTCCRE GPT320.GTCCRB aaaa
cccc
hhhh
GTIOC0A
ffff
cccc
ffff
GTIOC0B
23.31
GTIOC0A = Low GTIOC0B = High GTCCRA/GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 518 of 1551
RA4W1
23. PWM GPT
23.32
GTCR.MD[2:0] 23.31 001b
GTUDDTYC 23.31 GTUDDTYC[1:0] 11b GTUDDTYC[1:0] 01b
GTCR.TPCS[2:0]
GTPR
GTCNT
GTIOC GTIOR.GTIOA[4:0], GTIOB[4:0] GTIOC 23.31 GTIOR.GTIOA[4:0] = 00011b, GTIOR.GTIOB[4:0] = 10011b
GTIOC GTIOR.OAE, OBEGTIOC.
GTIOCA GTCCRC GTCCRDGTIOCB GTCCRE GTCCRF
GTBER.CCRSWT 1 GTBER.CCRSWT 1
1 GTIOCA GTCCRC GTCCRD GTIOCB GTCCRE GTCCRF
GTCR.CST 1
1 GTIOCA GTCCRC GTCCRD GTIOCB GTCCRE GTCCRF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 519 of 1551
RA4W1
23. PWM GPT
23.3.3.3 PWM 1 32
PWM 1 GTPR GTCNT GTCCRA GTCCRB GTIOCA GTIOCB PWM GTIOR Low High
GTDTCR GTDVU GTCCRB
23.33 PWM 1 23.34 PWM 1
GPT320.GTCNT
GPT320.GTPR ffff
eeee dddd cccc bbbb aaaa
0000_0000h
GPT320.GTCCRC
dddd
GPT320.GTCCRA
bbbb
GPT320.GTCCRE
cccc
GPT320.GTCCRB
aaaa
ffff
dddd
eeee
cccc
ffff
eeee
GTIOC0A
GTIOC0B
23.33
PWM 1 GTIOC0A = Low GTIOC0B = High GTCCRA/GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 520 of 1551
RA4W1
23. PWM GPT
23.34
GTCR.MD[2:0] 23.33 100b PWM 1
GTCR.TPCS[2:0]
GTPR
GTCNT
GTIOC GTIOR.GTIOA[4:0], GTIOB[4:0] GTIOC 23.33 GTIOR.GTIOA[4:0] = 00011b, GTIOR.GTIOB[4:0] = 10011b
GTIOC GTIOR.OAE, OBEGTIOC
GTBER.CCRA, GTBER.CCRB 23.33 GTBER.CCRA = 01b, GTBER.CCRB = 01b
GTIOCA GTCCRA GTIOCB GTCCRB
1 GTIOCA GTCCRC GTIOCB GTCCRE 2 GTIOCA GTCCRDGTIOCB GTCCRF
GTCR.CST 1
1 GTIOCA GTCCRC GTIOCB GTCCRE 2 GTIOCA GTCCRDGTIOCB GTCCRF
PWM 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 521 of 1551
RA4W1
23. PWM GPT
23.3.3.4 PWM 2 32
PWM 1 PWM 2 GTPR GTCNT GTCCRA GTCCRB GTIOCA GTIOCB PWM GTIOR Low High GTDTCR GTDVU GTCCRB
23.35 PWM 2 23.36 PWM 2
GPT320.GTCNT
GPT320.GTPR hhhh gggg ffff eeee dddd cccc bbbb aaaa
0000_0000h
GPT320.GTCCRC GPT320.GTCCRA
ffff bbbb
dddd
ffff
hhhh
dddd
hhhh
GPT320.GTCCRE GPT320.GTCCRB
eeee aaaa
cccc
eeee
gggg
cccc
gggg
GTIOC0A
GTIOC0B
23.35
PWM 2 GTIOC0A = Low GTIOC0B = High GTCCRA/GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 522 of 1551
RA4W1
23. PWM GPT
23.36
GTCR.MD[2:0] 23.35 101b PWM 2
GTCR.TPCS[2:0]
GTPR
GTCNT
GTIOC GTIOR.GTIOA[4:0], GTIOB[4:0] GTIOC 23.35 GTIOR.GTIOA[4:0] = 00011b, GTIOR.GTIOB[4:0] = 10011b
GTIOC GTIOR.OAE, OBEGTIOC
GTBER.CCRA[1:0], CCRB[1:0] 23.35 GTBER.CCRA[1:0] = 01b, GTBER.CCRB[1:0] = 01b
GTIOCA GTCCRA GTIOCB GTCCRB
GTIOCA GTCCRC GTIOCB GTCCRE 1 GTIOCA GTCCRDGTIOCB GTCCRF
GTCR.CST 1
GTIOCA GTCCRC GTIOCB GTCCRE 1 GTIOCA GTCCRDGTIOCB GTCCRF
PWM 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 523 of 1551
RA4W1
23. PWM GPT
23.3.3.5 PWM 3 64
PWM 3 GTPR GTCNT GTCCRA GTCCRB GTIOCA GTIOCB PWM PWM 3
GTCCRC GTCCRA
GTCCRE GTCCRB
GTCCRD A
GTCCRF B
A GTCCRA
B GTCCRB
GTIOR Low High GTDTCR GTDVU GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 524 of 1551
RA4W1
23. PWM GPT
23.37 PWM 3 23.38 PWM 3
GPT320.GTCNT
GPT320.GTPR hhhh gggg ffff eeee dddd cccc bbbb aaaa
0000_0000h
GPT320.GTCCRD
A
GPT320.GTCCRC
GPT320.GTCCRA
bbbb
GPT320.GTCCRF
B
GPT320.GTCCRE
GPT320.GTCCRB
aaaa
hhhh ffff
hhhh
dddd
ffff
dddd
gggg eeee
gggg
cccc
eeee
cccc
hhhh
gggg
GTIOC0A GTIOC0B
23.37
PWM 3 GTIOC0A = Low GTIOC0B = High GTCCRA/GTCCRB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 525 of 1551
RA4W1
23. PWM GPT
23.38
GTCR.MD[2:0] 23.37 110b PWM 3
GTCR.TPCS[2:0]
GTPR
GTCNT
GTIOC GTIOR.GTIOA[4:0], GTIOB[4:0] GTIOC 23.37 GTIOR.GTIOA[4:0] = 00011b, GTIOR.GTIOB[4:0] = 10011b
GTIOC GTIOR.OAE, OBEGTIOC
GTIOCA GTCCRC GTCCRDGTIOCB GTCCRE GTCCRF
GTBER.CCRSWT 1
1 GTIOCA GTCCRC GTCCRD GTIOCB GTCCRE GTCCRF
GTCR.CST 1
1 GTIOCA GTCCRC GTCCRD GTIOCB GTCCRE GTCCRF
PWM 3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 526 of 1551
RA4W1
23. PWM GPT
23.3.4
GTDTCR GTCCRA GTDVU GTCCRB PWM
GTCCRB GTCCRB GTCCRB
23.39 23.42 23.43 23.44
GPT320.GTCNT GPT320.GTPR GPT320.GTCCRA
0000_0000h
GPT320.GTCCRA
GPT320.GTCCRB
GTIOC0A
GTIOC0B
GTCCRA - GTDVU GTCCRA + GTDVU
GTCCRA - GTDVU
GTCCRA + GTDVU
GTDVU
GTDVU
GTDVU
GTDVU
23.39
High
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 527 of 1551
RA4W1
23. PWM GPT
GPT320.GTCNT GPT320.GTPR
GPT320.GTCCRA
0000_0000h
GPT320.GTCCRA
GPT320.GTCCRB
GTIOC0A
GTIOC0B
GTCCRA + GTDVU GTCCRA - GTDVU
GTCCRA + GTDVU
GTDVU
GTDVU
GTDVU
GTCCRA - GTDVU GTDVU
23.40
High
GPT320.GTCNT GPT320.GTPR
GPT320.GTCCRA
0000_0000h
GPT320.GTCCRA
GPT320.GTCCRB
GTIOC0A
GTIOC0B
GTCCRA - GTDVU
GTDVU
GTDVU
GTCCRA - GTDVU
GTDVU
GTDVU
23.41
PWM 1 High
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 528 of 1551
RA4W1
23. PWM GPT
GPT320.GTCNT GPT320.GTPR
GPT320.GTCCRA
0000_0000h
GPT320.GTCCRA GPT320.GTCCRB
GTIOC0A
GTIOC0B
GTCCRA - GTDVU GTCCRA - GTDVU GTCCRA - GTDVU GTCCRA - GTDVU
GTDVU
GTDVU
GTDVU
GTDVU
23.42
PWM 2 3 High
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 529 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0] 23.39 23.40 001b 23.42 110b PWM 3
GTUDDTYC 23.39 GTUDDTYC[1:0] 11b GTUDDTYC[1:0] 01b 23.40 GTUDDTYC[1:0] 10b GTUDDTYC[1:0] 00b
GTCR.TPCS[2:0]
GTPR
GTCNT
GTIOC GTIOR.GTIOA[4:0], GTIOB[4:0] GTIOC 23.39 23.41 23.42 GTIOR.GTIOA[4:0] = 00011b, GTIOR.GTIOB[4:0] = 10011b
GTIOC GTIOR.OAE, OBEGTIOC
GTIOCA GTCCRC GTCCRD
GTBER.CCRSWT 1 GTCCRA
1 GTIOCA GTCCRC GTCCRD
GTDTCR.TDE 1
GTDVU
GTCR.CST 1
1 GTIOCA GTCCRC GTCCRD
23.43
PWM 3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 530 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0] 23.41 100b PWM 1 23.42 101b PWM 2
GTCR.TPCS[2:0]
GTPR
GTCNT
GTIOC GTIOR.GTIOA[4:0], GTIOB[4:0] GTIOC 23.41 23.42 GTIOA[4:0] = 00011b, GTIOB[4:0] = 10011b
GTIOC GTIOR.OAE, OBEGTIOC
GTBER.CCRA
GTCCRA GTIOCA
1 PWM 1 PWM 2 GTIOCA GTCCRC 2 PWM 1 1 PWM 2 GTIOCA GTCCRD
GTDTCR.TDE "1"
GTDVU
GTCR.CST 1
1 PWM 1 PWM 2 GTIOCA GTCCRC
23.44
PWM 1 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 531 of 1551
RA4W1
23. PWM GPT
23.3.5
GTUDDTYC.UD GTCNT
GTUDDTYC.UD
GTUDDTYC.UDF 0 GTUDDTYC.UD GTUDDTYC.UDF 1 GTUDDTYC.UD
GTUDDTYC.UD GTUDDTYC.UDF 0 GTUDDTYC.UD GTUDDTYC.UDF 1 GTUDDTYC.UD
GTPR GTPR
23.45
GTCNT
bbbb aaaa
0000_0000h
GTUDDTYC.UD
GTST.TUCF
GTPBR
bbbb
aaaa
GTPR aaaa
bbbb
aaaa
bbbb
bbbb
23.45
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 532 of 1551
RA4W1
23. PWM GPT
23.3.6 0% 100%
GTUDDTYC.OADTY GTUDDTYC.OBDTY GTIOCA GTIOCB 0% 100%
GTUDDTYC.OADTY GTUDDTYC.OBDTY GTUDDTYC.OADTYF GTUDDTYC.OBDTYF 0 GTUDDTYC.OADTY GTUDDTYC.OBDTY GTUDDTYC.OADTYF GTUDDTYC.OBDTYF 1 GTUDDTYC.OADTY GTUDDTYC.OBDTY
GTUDDTYC.OADTY GTUDDTYC.OBDTY
GTUDDTYC.OADTYF GTUDDTYC.OBDTYF 0 GTUDDTYC.OADTY GTUDDTYC.OBDTY GTUDDTYC.OADTYF GTUDDTYC.OBDTYF 1 GTUDDTYC.OADTY GTUDDTYC.OBDTY
0% 100% GPT
0% 100% GTIOCA GTIOR.GTIOA[3:2] GTUDDTYC.OADTYR GTIOCB GTIOR.GTIOB[3:2] GTUDDTYC.OBDTYR
GTIOR.GTIOA[3:2] GTIOR.GTIOB[3:2] 01b Low GTIOR.GTIOA[3:2] GTIOR.GTIOB[3:2] 10b High
GTIOR.GTIOm[3:2] 00b 11b GTUDDTYC.OADTYR GTIOCA/GTIOCB 23.6
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 533 of 1551
RA4W1
23. PWM GPT
23.6
0% 100%m = A, B
GTIOR.GTIOm[3:2]
0% 100%
GTUDDTYC.OmDTYR 0%
0
1
00
0
1
0
0
0
1
01
--
Low
0
0
10
--
High
1
1
11
0
1
1
1
1
0
GTUDDTYC.OmDTYR 100%
0
1
1
0
1
1
0
0
1
1
0
1
0
0
23.46 0%100%
GPT320.GTCNT GPT320.GTPR
bbbb
aaaa
0000_0000h
GTUDDTYC.OADTY
00b
10b
GTIOC0A
11b
00b
GTIOC0B
0%
100%
GPT320.GTIOR.GTIOA[4:0] 00011b Low GPT320.GTUDDTYC.OADTYR 0 0%100%0%100% GTIOA[3:2] GPT320.GTIOR.GTIOB[4:0] 00011b Low GPT320.GTUDDTYC.OBDTYR 1 0%100% GTIOB[3:2]
23.46
0%100%
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 534 of 1551
RA4W1
23. PWM GPT
23.3.7
GTCNT
ELC GTIOCA/GTIOCB
23.3.7.1
GTSSR GTCNT
23.47 23.48
GTCNT
ELC_GPTA
GTPR
0000_0000h ELC_GPTA
23.47
ELC_GPTA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 535 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0] 23.47 000bPWM
GTUDDTYC 23.47 GTUDDTYC[1:0]11b GTUDDTYC[1:0] 01b
GTCR.TPCS[2:0]
GTPR
GTCNT 23.47 0000_0000h
GTSSR 23.47 GTSSR.SSELCA = 1
GTSSR 23.47 ELC_GPTA
23.48
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 536 of 1551
RA4W1
23. PWM GPT
23.3.7.2
GTPSR GTCNT
23.49 23.50 ELC
23.49
GTCNT
ELC
ELC
GTPR
0000_0000h
ELC_GPTA ELC_GPTB
ELC_GPTA ELC_GPTB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 537 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0] 23.49 000bPWM
GTUDDTYC 23.49 GTUDDTYC[1:0]11b GTUDDTYC[1:0] 01b
GTCR.TPCS[2:0]
GTPR
GTCNT 23.49 0000_0000h
GTSSR
23.49 GTSSR.SSELCB = 1
GTPSR 23.49GTPSR.PSELCA = 1
GTSSR GTPSR
23.49 ELC_GPTAELC_GPTB
23.50
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 538 of 1551
RA4W1
23. PWM GPT
23.51 23.52 GTETRGA High
GTETRGA
GTCNT
GTETRGA
GTETRGA
GTPR
0000_0000h
GTETRGA
23.51
GTETRGA GTETRGA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 539 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0] 23.51 000bPWM
GTUDDTYC 23.51 GTUDDTYC[1:0]11b GTUDDTYC[1:0] 01b
GTCR.TPCS[2:0]
GTPR
GTCNT 23.51 0000_0000h
GTSSR
23.51 GTSSR.SSGTRGAR = 1
GTPSR
23.51 GTPSR.PSGTRGAF = 1
GTSSR GTPSR
23.51 GTETRGA
23.52
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 540 of 1551
RA4W1
23. PWM GPT
23.3.7.3
GTCSR GTCNT GTCNT GPTn_OVF/ GPTn_UDFn = 0 5, 8
23.53 23.54 GTCNT 23.55 GTCNT ELC_GPTA ELC_GPTB
GTCNT
ELC 0000_0000h
ELC
GTCLR 1
ELC
ELC_GPTA
ELC_GPTB
23.53
ELC_GPTA ELC_GPTB
GTCNT ELC
ELC
ELC
GTPR
0000_0000h ELC_GPTA
GTCLR 1
ELC_GPTB
23.54
ELC_GPTA ELC_GPTB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 541 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0] 23.53 23.54 000b PWM
GTUDDTYC 23.53 GTUDDTYC[1:0]11b GTUDDTYC[1:0] 01b 23.54 GTUDDTYC[1:0] 10bGTUDDTYC[1:0] 00b
GTCR.TPCS[2:0]
GTPR
GTCNT 23.53 0000_0000h 23.54 GTPR
GTSSR 23.53 23.54 GTSSR.SSELCA = 1
GTPSR 23.53 23.54 GTPSR.PSELCB = 1
GTCSR 23.53 23.54 GTCSR.CSELCB = 1
GTSSR , GTPSR, GTCSR 23.53 23.54 ELC_GPTAELC_GPTB
23.55
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 542 of 1551
RA4W1
23. PWM GPT
GPTn_OVF/GPTn_UDFn = 0 5, 8
23.56 GPTn_OVFn = 0 5, 8
GTCNT GTPR
GTCLR 1
0000_0000h
GPTn_OVF (n = 0 5, 8)
GPTn_OVF (n = 0 5, 8)
23.56
GPTn_OVFn = 0 5, 8
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 543 of 1551
RA4W1
23. PWM GPT
23.3.8
23.3.8.1
GTCNT GTSTR GTSTP GTCLR 1
GTCNT GTSTR 1
23.57 23.58
GPT320.GTCNT GPT320.GTPR
0000_0000h GPT321.GTCNT
GPT321.GTPR
0000_0000h GPT322.GTCNT
GPT322.GTPR
0000_0000h GPT323.GTCNT
GPT323.GTPR
0000_0000h
GTSTR 0000_000Fh
0/1/2/3
GTSTP GTCLR
0000_000Fh 0/1/2/3
GTSTR 0000_000Fh
0/1/2/3
23.57
GTPR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 544 of 1551
RA4W1
23. PWM GPT
GPT320.GTCNT
GPT320.GTPR
cccc bbbb aaaa
0000_0000h
GPT321.GTCNT
GPT321.GTPR
cccc bbbb aaaa
0000_0000h
GPT322.GTCNT
GPT322.GTPR cccc bbbb aaaa
0000_0000h
GPT323.GTCNT
GPT323.GTPR cccc bbbb aaaa
0000_0000h
GTSTR0000_000Fh 0/1/2/3
23.58
GTPR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 545 of 1551
RA4W1
23. PWM GPT
23.3.8.2
GTCNT ELC 23.59 23.60
GPT320.GTCNT GPT320.GTPR
0000_0000h GPT321.GTCNT GPT321.GTPR
0000_0000h
GPT322.GTCNT GPT322.GTPR
0000_0000h GPT323.GTCNT GPT323.GTPR
0000_0000h
ELC_GPTA ELC_GPTB
ELC 0/1/2/3
ELC 0/1/2/3
ELC 0/1/2/3
23.59
GTPR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 546 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0] 23.59 000bPWM
GTUDDTYC 23.59 GTUDDTYC[1:0]11b GTUDDTYC[1:0] 01b
GTCR.TPCS[2:0]
GTPR
GTCNT 23.59 0000_0000h
GTSSR 23.59GTSSR.SSELCA = 1
GTPSR 23.59GTPSR.PSELCB = 1
GTCSR 23.59GTCSR.CSELCB = 1
GTSSR GTPSRGTCSR
23.59 ELC_GPTAELC_GPTB
23.60
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 547 of 1551
RA4W1
23. PWM GPT
23.3.9 PWM
(1) PWM
GPT 10 20 PWM
23.61 4 PWM 8 PWM GTIOCA Low GTCCRA High Low GTIOCB Low GTCCRB High Low
GPT320.GTCNT GPT320.GTPR
GPT320.GTCCRB GPT320.GTCCRA
GPT321.GTCNT GPT321.GTPR GPT321.GTCCRB GPT321.GTCCRA
GPT322.GTCNT GPT322.GTPR GPT322.GTCCRB GPT322.GTCCRA
GPT323.GTCNT GPT323.GTPR GPT323.GTCCRB GPT323.GTCCRA
GTIOC0A GTIOC0B GTIOC1A GTIOC1B GTIOC2A GTIOC2B GTIOC3A GTIOC3B
23.61
PWM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 548 of 1551
RA4W1
23. PWM GPT
(2) 3 PWM
23.62 3 PWM 3 PWM GTIOCA Low GTCCRA High Low GTIOCB High GTCCRB Low High
GPT320.GTCNT
GPT320.GTPR GPT320.GTCCRA = GPT320.GTCCRB
GPT321.GTCNT GPT321.GTPR GPT321.GTCCRA = GPT321.GTCCRB
GPT322.GTCNT GPT322.GTPR
GPT322.GTCCRA = GPT322.GTCCRB
GTIOC0A GTIOC0B
GTIOC1A GTIOC1B
GTIOC2B GTIOC2A
23.62
3 PWM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 549 of 1551
RA4W1
23. PWM GPT
(3) 3 PWM
23.63 3 3 PWM GTIOCA Low GTCCRA GTIOCB High GTCCRB
GPT320.GTCNT
GPT320.GTPR GPT320.GTCCRD GPT320.GTCCRC
GPT321.GTCNT GPT321.GTPR GPT321.GTCCRD GPT321.GTCCRC
GPT322.GTCNT GPT322.GTPR GPT322.GTCCRD
GPT322.GTCCRC
GTIOC0A GTIOC0B
GPT320.GTDVU GPT320.GTDVU
GTIOC1A GTIOC1B
GTIOC2A GTIOC2B
GPT321.GTDVU GPT322.GTDVU
GPT321.GTDVU GPT322.GTDVU
23.63
3 PWM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 550 of 1551
RA4W1
23. PWM GPT
(4) 3 PWM
23.64 3 PWM 1 3 PWM GTIOCA Low GTCCRA GTIOCB High GTCCRB
GPT320.GTCNT
GPT320.GTPR GPT320.GTCCRA GPT320.GTCCRB
GPT321.GTCNT GPT321.GTPR
GPT321.GTCCRA GPT321.GTCCRB
GPT322.GTCNT GPT322.GTPR
GPT322.GTCCRA GPT322.GTCCRB
GTIOC0A GTIOC0B GTIOC1A GTIOC1B GTIOC2A GTIOC2B
23.64
3 PWM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 551 of 1551
RA4W1
23. PWM GPT
(5) 3 PWM
23.65 3 PWM 1 3 PWM GTIOCA Low GTCCRA GTIOCB High GTCCRB
GPT320.GTCNT
GPT320.GTPR GPT320.GTCCRA
GPT321.GTCNT GPT321.GTPR GPT321.GTCCRA
GPT322.GTCNT GPT322.GTPR
GPT322.GTCCRA
GTIOC0A GTIOC0B GTIOC1A GTIOC1B GTIOC2A GTIOC2B
GPT320.GTDVU
GPT320.GTDVU
GPT321.GTDVU GPT322.GTDVU
GPT321.GTDVU GPT322.GTDVU
23.65
3 PWM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 552 of 1551
RA4W1
23. PWM GPT
(6) 3 PWM
23.66 3 PWM 3 3 PWM GTIOCA Low GTCCRA GTIOCB High GTCCRB
GPT320.GTCNT
GPT320.GTPR GPT320.GTCCRC GPT320.GTCCRD
GPT321.GTCNT GPT321.GTPR GPT321.GTCCRC GPT321.GTCCRD
GPT322.GTCNT GPT322.GTPR
GPT322.GTCCRC GPT322.GTCCRD
GTIOC0A GTIOC0B GTIOC1A
GTIOC1B GTIOC2A GTIOC2B
GPT320.GTDVU
GPT320.GTDVU
GPT321.GTDVU GPT322.GTDVU
GPT321.GTDVU GPT322.GTDVU
23.66
3 PWM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 553 of 1551
RA4W1
23. PWM GPT
23.3.10
GTIOCA GTIOCB GTCNT GTUPSR GTDNSR GTIOCA GTIOCB 23.3.1.1
23.67 23.76 1 5 23.7 23.16 GTUPSR GTDNSR
GTIOCA GTIOCB GTCNT
23.67
1
23.7
1
GTIOCA High Low
GTIOCB
Low
High
High Low
High
Low
GTUPSR = 00006900h GTDNSR = 00009600h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 554 of 1551
RA4W1
GTIOCA
GTIOCB GTCNT
23. PWM GPT
23.68
2 A
23.8
2 A
GTIOCA High
GTIOCB
Don't care
Low
Low
High
High
Don't care
Low
High
Low
GTUPSR = 00000800h GTDNSR = 00000400h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 555 of 1551
RA4W1
23. PWM GPT
GTIOCA GTIOCB
GTCNT
23.69
2 B
23.9
2 B
GTIOCA High
GTIOCB
Don't care
Low
Low High
Don't care
High
Low
High Low
Don't care
GTUPSR = 00000200h GTDNSR = 00000100h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 556 of 1551
RA4W1
GTIOCA GTIOCB
GTCNT
23. PWM GPT
23.70
2 C
23.10
2 C
GTIOCA High
GTIOCB
Don't care
Low
High
Low High
Don't care
Low
High Low
GTUPSR = 00000A00h GTDNSR = 00000500h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 557 of 1551
RA4W1
GTIOCA
GTIOCB GTCNT
23. PWM GPT
23.71
3 A
23.11
3 A
GTIOCA High
GTIOCB
Don't care
Low
Low
High Low
High
Don't care
High
Low
GTUPSR = 00000800h GTDNSR = 00008000h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 558 of 1551
RA4W1
GTIOCA
GTIOCB GTCNT
23. PWM GPT
23.72
3 B
23.12
3 B
GTIOCA High Low
GTIOCB
Don't care
Low
High
High
Low
High Low
Don't care
GTUPSR = 00000200h GTDNSR = 00002000h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 559 of 1551
RA4W1
GTIOCA
GTIOCB GTCNT
23. PWM GPT
23.73
3 C
23.13
3 C
GTIOCA High Low
GTIOCB
Don't care
Low
High Low
High
Don't care
High Low
Don't care
GTUPSR = 00000A00h GTDNSR = 0000A000h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 560 of 1551
RA4W1
GTIOCA
GTIOCB GTCNT
23. PWM GPT
23.74
4
23.14
4
GTIOCA High Low
GTIOCB
Low
Don't care
High
High Low
High
Don't care
Low
GTUPSR = 00006000h GTDNSR = 00009000h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 561 of 1551
RA4W1
23. PWM GPT
GTIOCA
GTIOCB GTCNT
23.75
5 A
23.15
5 A
GTIOCA High
GTIOCB
Don't care
Low
High
Low High
Don't care
Low
High
Low
GTUPSR = 00000C00h GTDNSR = 00000000h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 562 of 1551
RA4W1
23. PWM GPT
GTIOCA
GTIOCB GTCNT
23.76
5 B
23.16
5 B
GTIOCA High
GTIOCB
Don't care
Low
Low
Don't care
High
High Low
Don't care
High
Low
GTUPSR = 0000C000h GTDNSR = 00000000h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 563 of 1551
RA4W1
23. PWM GPT
23.3.11 GPT_OPS
GPT_OPS OPSCR DC
GPT_OPS 6 U V W PWM OPSCR.UFVFWF GPT320.GTIOCA PWM
23.77 GPT_OPS
GTIU GTIV GTIW
(1) UF/VF/WF
OPSCR. UF/VF/WF
PCLKD
PWM
U V W
U/V/W
OPS (gtu_sync)
(gtv_sync)
(gtw_sync)
(2)
6
OPS (gtuup_en, gtulo_en)
(gtvup_en, gtvlo_en)
(gtwup_en, gtwlo_en)
GPT320.GTIOCA PWM
(PCLKA) GPT (PCLKD)
23.77
GPT_OPS
(5)
PCLKD
GPT_UVWEDGE
PCLKD
(3)
DC GTOUUP, GTOULO, GTOVUP, GTOVLO, GTOWUP, GTOWLO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 564 of 1551
RA4W1
23. PWM GPT
23.78 GPT_OPS 6 23.78 GPT_UVWEDGE ELC
U GTIU
V GTIV
W GTIW
U GTOUUP
U GTOULO
V GTOVUP
V GTOVLO
W GTOWUP
W GTOWLO
ELC GPT_UVWEDGE
1@ PCLKD
.
OPSCR.ALIGN = 0, OPSCR.EN = 1, OPSCR.P = 0, OPSCR.N = 0, OPSCR.INV = 0
23.78
6
23.79 GPT_OPS 6 PWM
GPT320 PWM
U GTIU
V GTIV
W GTIW
U GTOUUP
U GTOULO
V GTOVUP
V GTOVLO
W GTOWUP
W GTOWLO
ELC GPT_UVWEDGE
1@ PCLKD
.
OPSCR.ALIGN = 1, OPSCR.EN = 1, OPSCR.P = 1, OPSCR.N = 1, OPSCR.INV = 0
23.79
6 PWM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 565 of 1551
RA4W1 23.80 6 PWM
GPT320 PWM
U GTIU
V GTIV
W GTIW
OPSCR.EN
OPSCR.GRP
OPSCR.GODF
POEGOPS
U GTOUUP
U GTOULO
V GTOVUP
V GTOVLO
W GTOWUP
W GTOWLO
ELC GPT_UVWEDGE
00bA 1@ PCLKD
.
OPSCR.P = 1, OPSCR.N = 1, OPSCR.INV = 0
23.80
23. PWM GPT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 566 of 1551
RA4W1
23. PWM GPT
23.3.11.1
23.77 GPT_OPS 1 OPSCR.FB
OPSCR.FB = 0 GPT PCLKD OPSCR.ALIGN = 1 PWMGPT320.GTIOCA PWM
OPSCR.FB = 1 OPSCR.ALIGN = 1 PWM GPT320.GTIOCA PWMOPSCR.UFVFWF
OPSCR.ALIGN = 0 OPSCR.FB = 0 1 GPT_OPS PCLKD U/V/W PWM PWM
23.17 OPSCR
23.17
OPSCR
FB
ALIGN
U/V/W
GPT_OPS
0
1
PWM
PCLKD +
U gtu_sync
0
PCLKD
PCLKD +
V gtv_sync W gtw_sync
1
1
PWM
OPSCR.UFVFWF
0
= OPSCR.UF/VF/WF = PCLKD
23.3.11.2
OPSCR.UVW OPSCR.FB PCLKD
OPSCR.FB = 0 GPT PCLKD OPSCR.UVW OPSCR.FB = 1 OPSCR.UVW OPSCR.UFVFWF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 567 of 1551
RA4W1
23. PWM GPT
23.3.11.3
23.77 GPT_OPS 2OPSCR.FB 6 6 GPT_OPS
23.18
23.18
U/V/W GPT_OPS
6 [U/V/WUp/Lo] GPT_OPS
U (gtu_sync) 1
V (gtv_sync) 0
W (gtw_sync) 1
U Up (gtuup_en) 1
U Lo (gtulo_en) 0
V Up (gtvup_en) 0
V Lo (gtvlo_en) 1
W Up (gtwup_en) 0
W Lo (gtwlo_en) 0
1
0
0
1
0
0
0
0
1
1
1
0
0
0
1
0
0
1
0
1
0
0
1
1
0
0
0
0
1
1
0
1
0
0
1
0
0
0
1
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 568 of 1551
RA4W1
23. PWM GPT
23.3.11.4
23.77 GPT_OPS 3OPSCR
OPSCR.EN 6 OPSCR.P OPSCR.N PWM
OPSCR.INV 23.19 23.20 OPSCR
23.19
P
OPSCR.EN 0
OPSCR.P x
1
0
1
0
1
1
1
1
OPSCR.INV x 0
1
0
1
= Up
GTOUUP GTOVUP GTOWUP
0
Hi-Z
GPT_OPS 0
(gtuup_en) (gtvup_en) (gtwup_en)
( gtuup_en) ( gtvup_en) ( gtwup_en)
PWM (PWM & gtuup_en) (PWM & gtvup_en) (PWM & gtwup_en)
PWM
PWM ((PWM & gtuup_en)) ((PWM & gtvup_en)) ((PWM & gtwup_en))
PWM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 569 of 1551
RA4W1
23. PWM GPT
23.20
N
OPSCR.EN 0
OPSCR.N x
1
0
1
0
1
1
1
1
OPSCR.INV x 0
1
0
1
= Lo
GTOULO GTOVLO GTOWLO
0
Hi-Z
GPT_OPS 0
(gtulo_en) (gtvlo_en) (gtwlo_en)
( gtulo_en) ( gtvlo_en) ( gtwlo_en)
PWM (PWM & gtulo_en) (PWM & gtvlo_en) (PWM & gtwlo_en)
PWM
PWM ((PWM & gtulo_en)) ((PWM & gtvlo_en)) ((PWM & gtwlo_en))
PWM
23.3.11.5
OPSCR.GODF = 1 OPSCR.GRP[1:0] High GPT_OPS Hi-Z PCLKD OPSCR.EN 0 OPSCR.EN 1
OPSCR.EN 0 PCLKD 3 POEG PCLKD 4 23.80
23.3.11.6 ELC
23.77 GPT_OPS 5 ELC
PCLKD U V W OR U V W High
OPSCR.FB = 0 PCLKD OR OPSCR.FB = 1 OPSCR.UFVFWF PCLKD OR
ELC 23.78 23.80
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 570 of 1551
RA4W1
23.3.11.7 GPT_OPS
23. PWM GPT
GPT0 GPT320.GTIOCA PWM 23.3.3PWM
GPT320 GPT320 PWM
GPT_OPS OPSCR.UF, VF, WF
GPT_OPS OPSCR.NFCS[1:0] OPSCR.NFEN 1
GPT_OPS OPSCR.FB OPSCR.ALIGN
GPT_OPS OPSCR.P, N PWM OPSCR.INV
GPT_OPS OPSCR.GRP[1:0] OPSCR.GODF ON/OFF
GPT_OPS OPSCR.EN1 GPT_OPS DC6
23.81
GPT_OPS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 571 of 1551
RA4W1
23. PWM GPT
23.4
23.4.1
GPT GTCCR
GTCNT GTPR
GTST 1 GTST 0 23.21 GPT
23.21
(1/2)
0
1
2
3
GPT0_CCMPA GPT0_CCMPB GPT0_CMPC GPT0_CMPD GPT0_CMPE GPT0_CMPF GPT0_OVF GPT0_UDF GPT1_CCMPA GPT1_CCMPB GPT1_CMPC GPT1_CMPD GPT1_CMPE GPT1_CMPF GPT1_OVF GPT1_UDF GPT2_CCMPA GPT2_CCMPB GPT2_CMPC GPT2_CMPD GPT2_CMPE GPT2_CMPF GPT2_OVF GPT2_UDF GPT3_CCMPA GPT3_CCMPB GPT3_CMPC GPT3_CMPD GPT3_CMPE GPT3_CMPF GPT3_OVF GPT3_UDF
GPT320.GTCCRA
TCFA
GPT320.GTCCRB
TCFB
GPT320.GTCCRC
TCFC
GPT320.GTCCRD
TCFD
GPT320.GTCCRE
TCFE
GPT320.GTCCRF
TCFF
GPT320.GTCNT GPT320.GTPR TCFPO
GPT320.GTCNT
TCFPU
GPT321.GTCCRA
TCFA
GPT321.GTCCRB
TCFB
GPT321.GTCCRC
TCFC
GPT321.GTCCRD
TCFD
GPT321.GTCCRE
TCFE
GPT321.GTCCRF
TCFF
GPT321.GTCNT GPT321.GTPR TCFPO
GPT321.GTCNT
TCFPU
GPT322.GTCCRA
TCFA
GPT322.GTCCRB
TCFB
GPT322.GTCCRC
TCFC
GPT322.GTCCRD
TCFD
GPT322.GTCCRE
TCFE
GPT322.GTCCRF
TCFF
GPT322.GTCNT GPT322.GTPR TCFPO
GPT322.GTCNT
TCFPU
GPT323.GTCCRA
TCFA
GPT323.GTCCRB
TCFB
GPT323.GTCCRC
TCFC
GPT323.GTCCRD
TCFD
GPT323.GTCCRE
TCFE
GPT323.GTCCRF
TCFF
GPT323.GTCNT GPT323.GTPR TCFPO
GPT323.GTCNT
TCFPU
DMAC/DTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 572 of 1551
RA4W1
23. PWM GPT
23.21
(2/2)
4
5
8
GPT4_CCMPA GPT4_CCMPB GPT4_CMPC GPT4_CMPD GPT4_CMPE GPT4_CMPF GPT4_OVF GPT4_UDF GPT5_CCMPA GPT5_CCMPB GPT5_CMPC GPT5_CMPD GPT5_CMPE GPT5_CMPF GPT5_OVF GPT5_UDF GPT8_CCMPA GPT8_CCMPB GPT8_CMPC GPT8_CMPD GPT8_CMPE GPT8_CMPF GPT8_OVF GPT8_UDF
GPT164.GTCCRA
TCFA
GPT164.GTCCRB
TCFB
GPT164.GTCCRC
TCFC
GPT164.GTCCRD
TCFD
GPT164.GTCCRE
TCFE
GPT164.GTCCRF
TCFF
GPT164.GTCNT GPT164.GTPR TCFPO
GPT164.GTCNT
TCFPU
GPT165.GTCCRA
TCFA
GPT165.GTCCRB
TCFB
GPT165.GTCCRC
TCFC
GPT165.GTCCRD
TCFD
GPT165.GTCCRE
TCFE
GPT165.GTCCRF
TCFF
GPT165.GTCNT GPT165.GTPR TCFPO
GPT165.GTCNT
TCFPU
GPT168.GTCCRA
TCFA
GPT168.GTCCRB
TCFB
GPT168.GTCCRC
TCFC
GPT168.GTCCRD
TCFD
GPT168.GTCCRE
TCFE
GPT168.GTCCRF
TCFF
GPT168.GTCNT GPT168.GTPR TCFPO
GPT168.GTCNT
TCFPU
DMAC/DTC
(1) GPTn_CCMPA n = 0 5, 8
GTCCRA GTCNT GTCCRA
GTCCRA GTCNT GTCCRA
(2) GPTn_CCMPB n = 0 5, 8
GTCCRB GTCNT GTCCRB
GTCCRB GTCNT GTCCRB
(3) GPTn_CMPC n = 0 5, 8
GTCCRC GTCNT GTCCRC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 573 of 1551
RA4W1
23. PWM GPT
GTCR.MD[2:0] = 001b GTCR.MD[2:0] = 110b PWM 3 GTBER.CCRA[1:0] = 01b10b11bGTCCRC
(4) GPTn_CMPD n = 0 5, 8
GTCCRD GTCNT GTCCRD
GTCR.MD[2:0] = 001b GTCR.MD[2:0] = 110b PWM 3 GTBER.CCRA[1:0] = 10b11bGTCCRD
(5) GPTn_CMPE n = 0 5, 8
GTCCRE GTCNT GTCCRE
GTCR.MD[2:0] = 001b GTCR.MD[2:0] = 110b PWM 3 GTBER.CCRB[1:0] = 01b10b11bGTCCRE
(6) GPTn_CMPF n = 0 5, 8
GTCCRF GTCNT GTCCRF
GTCR.MD[2:0] = 001b GTCR.MD[2:0] = 110b PWM 3 GTBER.CCRB[1:0] = 10b11bGTCCRF
(7) GPTn_OVF n = 0 5, 8
GTCNT GTPR 0
GTCNT GTPR GTPR - 1
GTCNT GTPR
0
(8) GPTn_UDF n = 0 5, 8
GTCNT 0 GTPR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 574 of 1551
RA4W1
23. PWM GPT
GTCNT 0 1
GTCNT 0 GTPR
23.22
GPTn_UDF GPTn_OVF GPTn_CMPF GPTn_CMPE GPTn_CMPD GPTn_CMPC GPTn_CCMPB GPTn_CCMPA
GTST[7] (TCFPU) GTST[6] (TCFPO) GTST[5] (TCFF) GTST[4] (TCFE) GTST[3] (TCFD) GTST[2] (TCFC) GTST[1] (TCFB) GTST[0] (TCFA)
.
n = 0 5, 8
23.4.2 DMAC/DTC
DMAC DTC 14. ICU17.DMA DMAC18. DTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 575 of 1551
RA4W1
23. PWM GPT
23.5 ELC
23.5.1 ELC
GPT ELC
GPT ELC A GPTn_CCMPA B GPTn_CCMPB C GPTn_CMPC D GPTn_CMPD E GPTn_CMPE F GPTn_CMPF GPTn_OVF GPTn_UDF . n = 0 5, 8
23.5.2 ELC
GPT ELC 8 23.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 576 of 1551
RA4W1
23. PWM GPT
23.6
GPT 3
23.82
3
23.82
� 3 + PCLKD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 577 of 1551
RA4W1
23. PWM GPT
23.7
23.7.1
GTWP.WP
GTSSR, GTPSR, GTCSR, GTUPSR, GTDNSR, GTICASR, GTICBSR, GTCR, GTUDDTYC, GTIOR, GTINTAD, GTST, GTBER, GTCNT, GTCCRA, GTCCRB, GTCCRC, GTCCRD, GTCCRE, GTCCRF, GTPR, GTPBR, GTDTCR, GTDVU
23.7.2
GTBER.BD GTBER.BD 1 0
23.83
GPT320.GTCNT GPT320.GTPR
0000_0000h
GPT320.GTCCRF GPT320.GTCCRE GPT320.GTCCRB
bbbb aaaa
bbbb
aaaa
cccc
cccc
bbbb
dddd
eeee
eeee cccc
GTBER.BD[0]
GPT320.GTCCRF
1
GPT320.GTCCRF
1
GPT320.GTCCRF
0
GTBER.BD[0] = 1
GPT320.GTCCRF
0
GPT320.GTCCRF
1
GPT320.GTCCRF
0
GPT320.GTCCRF
1
GPT320.GTCCRF
0
23.83
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 578 of 1551
RA4W1
23. PWM GPT
23.7.3 GTIOC
POEG GTIOC
GTIOCA GTIOCB GPT GTINAD.GRPABH GTINTAD.GRPABL POEG POEG OR GPT
POEG 4 1 GTIOCA GTIOCB GTINTAD.GRP[1:0] GTST.ODF GTIOCA GTIOR.OADF[1:0] GTIOCB GTIOR.OBDF[1:0]
POEG PCLKD 3 POEG PCLKD 4
GTIOR.OADF[1:0] 00bGTIOCA GTIOR.OBDF[1:0] 00b GTIOCB
23.84 GTIOC
GPT320.GTCNT
GPT320.GTPR cccc bbbb aaaa
0000_0000h
GPT320.GTCCRC GPT320.GTCCRA
bbbb aaaa
cccc
bbbb
cccc
GTIOC0A
23.84
GTIOC Low
GTIOC 1 GTCCRA High Low Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 579 of 1551
RA4W1
23. PWM GPT
23.8
23.8.1
GPT PmnPFS GTIOR.OAE GTIOR.OBE GPT
GPT320.GTCNT
GPT320.GTPR
GPT320.GTCCRA GPT320.GTCCRB
0000_0000h
GTIOC0A
Hi-Z
Hi-Z GTIOC0B
GTIOR.OAE,
OBE
GPT
[] GTIOR.GTIOA[4:0]Low GTIOR.GTIOB[4:0]High
23.85
23.8.2
GPT 4
GTIOR OAHLD OBHLD 1
GTIOR OAHLD OBHLD 0 GTIOR OADFLT OBDFLT
I/O PDRPODRPmnPFS GTIOR OAE OBE 0 PmnPFS.PMR 0
POEG
GTDTCR.TDE 0 GPT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 580 of 1551
RA4W1
23. PWM GPT
23.9
23.9.1
GPT GPT 11.
23.9.2 GTCCRn n = A F
(1) PWM
GTCCRA GTDVU GTCCRA 0 GTCCRA GTPR
(2) PWM
GTCCRA 0 GTCCRA GTPR GTCCRA = 0 GTCCRA = GTPR GTCCRA = 0 GTCCRA = GTPR GTCCRA GTPR
GTCCRB 0 GTCCRB GTPR GTCCRB = 0 GTCCRB = GTPR GTCCRB = 0 GTCCRB = GTPR GTCCRB GTPR
(3)
GTCCRC GTCCRD
GTCCRC GTCCRDGTCCRC GTDVUGTCCRD (GTPR - GTDVU)
GTCCRC GTCCRDGTCCRC (GTPR - GTDVU)GTCCRD GTDVU
(4)
GTCCRC GTCCRD 2
0 GTCCRC GTCCRD GTPR
GTPR GTCCRC GTCCRD 0
GTCCRE GTCCRF 2
0 GTCCRE GTCCRF GTPR
GTPR GTCCRE GTCCRF 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 581 of 1551
RA4W1
23. PWM GPT
(5) PWM
GTCCRA 0 GTCCRA GTPR GTCCRA = 0 GTCCRA = GTPR GTCCRA = 0 GTCCRA = GTPR GTCCRA GTPR
GTCCRB 0 GTCCRB GTPR GTCCRB = 0 GTCCRB = GTPR GTCCRB = 0 GTCCRB = GTPR GTCCRB GTPR
23.9.3 GTCNT
GTCNT 0 GTCNT GTPR
23.9.4 GTCNT
GTCR.CST GTCNT GTCR.TPCS[2:0] GTCR.CST GTCR.TPCS[2:0] GTCNT GTCNT GTCR.CST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 582 of 1551
RA4W1
23. PWM GPT
23.9.5
(1) GTCNT
23.23 GTCNT
23.23
GTCNT
GTCNT CPUGTCNT/GTCLR GTCSR GTUPSR/GTDNSR
GTCNT GTCNT CPU
(2) GTCR.CST
GTSSR/GTPSR CPU GTCR/GTSTR/GTSTP CPU
GTSSR GTPSR GTCR.CST GTCR.CST CPU
(3) GTCCRm m = A F
GTCCRm GTCCRm CPU
GTCCRm CPU
(4) GTPR
GTPR GTPR GTPR CPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 583 of 1551
RA4W1
24. AGT
24. AGT
24.1
AGT 16
16 AGT
24.1 AGT 24.1 24.2
24.1
AGT
2
PCLKBPCLKB/2PCLKB/8AGTLCLK/dAGTSCLK/d AGT01 d = 1248163264128
AGTIOn AGTIOn
A AGT AGTCMA A3
B AGTAGTCMB B
AGT1_AGTIAGT1_AGTCMAIAGT1_AGTCMBI
A B
1. 2. 3.
AGT0 AGT1 AGT0 PCLKB A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 584 of 1551
RA4W1
24. AGT
TCK[2:0]
AGTLCLK
TCK[2:0] = 100b
CKS[2:0]
AGTLOCO
AGTSCLK
= 110b
1, 2, 4, 8, 16 32, 64, 128
AGT
AGTLCLKAGTSCLK
PCLKB = 000b PCLKB/8 = 001b
PCLKB/2 = 011b = 100b 110b
AGT02 = 101b
TIOGT[1:0] = 00b
AGTEEn = 01b 1
TIPF[1:0]
SEL[1:0]
P402/AGTIOn = 10b = 00b
AGTIOn
TEDGPL TEDGSEL
TMOD[2:0] = 001b
AGTOn
TOE
TCMEA TCMEB = 1
16
AGT
AGT AGT
TCMEA TCMEB = 0
16
AGTCMA
16
AGTCMB
TCM TCM TUN TED AF BF DF GF
B
TMOD[2:0] = 010b
TSTART
= 010b
TCMEA
16 AGT
TCMEB
TMOD[2:0] = 011b100b
TEDGSEL = 1 TEDGSEL = 0
Q CK
Q
CLR
AGTMR1AGTMR2 TSTOP1
A
AGTOB0
TOEB
TSTART, TSTOP, TUNDF, TCMAF, TCMBF TEDGSEL, TOE, TIPF[1:0], TIOGT[1:0] TMOD[2:0], TEDGPL, TCK[2:0] CKS[2:0] TCMEA, TCMEB, TOEB, TOPOLB SEL[1:0]
TOPOLB = 1 TOPOLB = 0
AGTCR AGTIOC AGTMR1 AGTMR2 AGTCMSR AGTIOSEL
Q CK
Q
CLR
AGTMR1AGTMR2 TSTOP1
1. 2.
AGTISR EEPS AGT0 AGT1 AGT0
24.1
AGT
24.2
AGT
AGTEEn AGTIOn 1 AGTOn AGTOB0
1
AGT AGT AGT AGT B
. 1.
n0, 1 AGTIO1 P402 AGTIO1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 585 of 1551
RA4W1
24. AGT
24.2 24.2.1 AGT AGT
AGT0.AGT 4008 4000h, AGT1.AGT 4008 4100h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
b15-b0
16 12 0000h FFFFh
R/W R/W
1. 2.
AGTCR TSTOP 1 16 FFFFh AGTMR1 TCK[2:0] 001bPCLKB/8 011bPCLKB/2AGT 0000h ICUDTC ELC AGTOn AGTIOn
AGT 0000h TCK[2:0] ICUDTC ELC
AGTOn AGT 0001h AGT
AGT 16
AGTCR TSTART AGTCMSR TCMEA/TCMEB 24.3.1 AGT 16
24.2.2 AGT A AGTCMA
AGT0.AGTCMA 4008 4002h, AGT1.AGTCMA 4008 4102h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W
b15-b0
16 A1 0000hFFFFh
R/W
1. A AGTCMA FFFFh
AGTCMA AGT A AGTCR TSTART 24.3.2 A/B AGTCMA 16
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 586 of 1551
RA4W1
24. AGT
24.2.3 AGT B AGTCMB
AGT0.AGTCMB 4008 4004h, AGT1.AGTCMB 4008 4104h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W
b15-b0
16 B1 0000hFFFFh
R/W
1. B AGTCMB FFFFh
AGTCMB AGT B AGTCR TSTART 24.3.2 A/B AGTCMB 16
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 587 of 1551
RA4W1
24.2.4 AGT AGTCR
AGT0.AGTCR 4008 4008h, AGT1.AGTCR 4008 4108h
b7
b6
b5
b4
b3
b2
b1
b0
TCMBF TCMAF TUNDF TEDGF
--
TSTOP
TCSTF
TSTAR T
0
0
0
0
0
0
0
0
24. AGT
b0
TSTART
AGT 2
b1
TCSTF
AGT 2
b2
TSTOP
AGT 1
b3
--
b4
TEDGF
b5
TUNDF
b6
TCMAF
A
b7
TCMBF
B
0 1
0 1
0 1
0 0
0 1
0 1
0 1
0 1
R/W R/W
R
W
R/W R/(W)
3
R/(W)
3
R/(W)
3
R/(W)
3
1.
2. 3.
TSTOP 1TSTART TCSTF 0 TSTART TCSTF 24.4.1 0
TSTART AGT TSTART 1 0
1 TCSTF 1 TSTART 0 TCSTF 0 24.4.1
TCSTF AGT 1 TSTART 1 TCSTF 1
0 TSTART 0 TCSTF 0
TSTOP 1
TSTOP AGT 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 588 of 1551
RA4W1
24. AGT
TEDGF 1 AGTIOn AGTIOn 0 0
TUNDF 1 0 0
TCMAF A 1 AGT AGTCMA 0 0
TCMBF B 1 AGT AGTCMB 0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 589 of 1551
RA4W1
24.2.5 AGT 1AGTMR1
AGT0.AGTMR1 4008 4009h, AGT1.AGTMR1 4008 4109h
b7 -- 0
b6
b5
b4
TCK[2:0]
0
0
0
b3 TEDGP
L 0
b2
b1
b0
TMOD[2:0]
0
0
0
24. AGT
b2-b0
TMOD[2:0]
3
b3 b6-b4
TEDGPL TCK[2:0]
4
125
b7
--
R/W
b2
b0
0 0 0
R/W
0 0 1
0 1 0
0 1 1
1 0 0
0
R/W
1
b6
b4
0 0 0PCLKB
R/W
0 0 1PCLKB/8
0 1 1PCLKB/2
1 0 0AGTMR2 CKS[2:0] AGTLCLK
1 0 1AGT0 6
1 1 0AGTMR2 CKS[2:0] AGTSCLK
0 0
R/W
.
1. 2. 3. 4. 5. 6.
AGTMR1 AGT AGTOnAGTIOn AGTOB0 n = 0, 1 24.2.7AGT I/O AGTIOC
TCK[2:0] AGTIOn
AGTCR TSTART TCSTF 0 AGTCR TSTART TCSTF 0
TEDGPL AGT AGTLCLK AGTSCLK AGT0 AGT1 AGT0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 590 of 1551
RA4W1
24.2.6 AGT 2AGTMR2
AGT0.AGTMR2 4008 400Ah, AGT1.AGTMR2 4008 410Ah
b7
b6
b5
b4
b3
b2
b1
b0
LPM --
--
--
--
CKS[2:0]
0
0
0
0
0
0
0
0
24. AGT
b2-b0
b6-b3 b7
CKS[2:0]
-- LPM
AGTLCLK/AGTSCLK
1 2 3
b2
b0
0 0 01/1
0 0 11/2
0 1 01/4
0 1 11/8
1 0 01/16
1 0 11/32
1 1 01/64
1 1 11/128
00
0 1
R/W R/W
R/W R/W
1.
2. 3.
CKS[2:0] AGTCR TSTART TCSTF 0CKS[2:0] AGTLCLK AGTSCLK CKS[2:0] CKS[2:0] 000b AGTMR1 TCK[2:0] CKS[2:0] 000b AGTMR1 TCK[2:0] 1
LPM
AGT 1 1
AGT/AGTCMA/AGTCMB/AGTCR
1 0 AGT 2 2
AGTAGTCMAAGTCMB AGTCR 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 591 of 1551
RA4W1
24.2.7 AGT I/O AGTIOC
AGT0.AGTIOC 4008 400Ch, AGT1.AGTIOC 4008 410Ch
b7
b6
TIOGT[1:0]
0
0
b5
b4
TIPF[1:0]
0
0
b3
b2
b1
b0
--
TOE
--
TEDGS EL
0
0
0
0
24. AGT
b0
TEDGSEL
I/O
b1 b2
b3 b5-b4
-- TOE
-- TIPF[1:0]
AGTOn
3
b7-b6
TIOGT[1:0]
12
R/W
24.3 24.4 R/W TEDGSEL AGTOn AGTIOn AGTOn AGTIOn AGTMR1 AGTCR TSTOP1 AGTOn AGTIOn
0 0
R/W
0AGTOn
R/W
1AGTOn
0 0
R/W
b5 b4
0 0
R/W
0 1PCLKB
1 0PCLKB/8
1 1PCLKB/32
AGTIOn
AGTIOn 3
b7 b6
0 0
R/W
0 1AGTEEn
1. 2. 3.
AGTEEn AGTISR EEPS TIOGT[1:0]
24.3
AGTIOn
0High High 1Low Low
0 1
0Low 1High
0 1
24.4
AGTOn
0Low Low 1High High
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 592 of 1551
RA4W1
24.2.8 AGT AGTISR
AGT0.AGTISR 4008 400Dh, AGT1.AGTISR 4008 410Dh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
-- EEPS --
--
0
0
0
0
0
0
0
0
24. AGT
R/W
b1-b0
--
0 0
R/W
b2
EEPS
AGTEEn
0Low
R/W
1High
b7-b3
--
0 0
R/W
24.2.9 AGT AGTCMSR
AGT0.AGTCMSR 4008 400Eh, AGT1.AGTCMSR 4008 410Eh
b7
b6
b5
b4
b3
b2
b1
b0
--
TOPOL B
TOEB
TCMEB
--
--
-- TCMEA
0
0
0
0
0
0
0
0
b0
b3-b1 b4
b5
b6
b7
TCMEA
-- TCMEB
TOEB
TOPOLB
--
A
12
B
12
AGTOBn 123
AGTOBn 123
0 A 1 A
0 0
0 B 1 B
0AGTOBn 1AGTOBn
0AGTOBn Low 1AGTOBn High
0 0
R/W R/W
R/W R/W
R/W
R/W
R/W
1.
2. 3.
AGTCMSR AGTCMSR AGTCR TSTART TCSTF 0 1 AGT1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 593 of 1551
RA4W1
24.2.10 AGT AGTIOSEL
AGT0.AGTIOSEL 4008 400Fh, AGT1.AGTIOSEL 4008 410Fh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
-- TIES --
--
SEL[1:0]
0
0
0
0
0
0
0
0
24. AGT
b1-b0
SEL[1:0]
b3-b2 b4
b7-b5
-- TIES
--
AGTIOn 1
AGTIOn
R/W
b1 b0
0 0AGTIOn
R/W
0 1
1 0P402/AGTIOn
P402/AGTIOn
1 1
0 0
R/W
0
R/W
1
0 0
R/W
1. 20.I/O
AGTIOSEL AGTIOn AGTIOn AGTIOSEL 8
SEL[1:0] AGTIOn AGTIOn
TIES AGTIOn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 594 of 1551
RA4W1
24. AGT
24.3
24.3.1
AGTCR TSTART AGTCMSR TCMEA TCMEB TSTART 0 TSTART 1 TCMEA TCMEB 0 A/B TSTART 1 TCMEA TCMEB 1 A/B
TSTART TCMEA TCMEB 24.2 24.3
AGTCRTSTART1
AGT5678h
AGT1234h
AGTCR.TSTART
AGTCMSR.TCMEB
AGTCMSR.TCMEA
AGT
FFFFh
5678h
1234h
FFFFh
5678h
1234h
AGT
FFFFh
5678h
5677h 5676h 5675h 5674h 5673h 5672h 5671h 5670h 566Fh 1234h 1233h 1232h 1231h 1230h
24.2
TSTART TCMEA TCMEB A B
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 595 of 1551
RA4W1
24. AGT
AGTCRTSTART1
AGT5678h
AGT1234h
AGTCR.TSTART
AGTCMSR.TCMEB
AGTCMSR.TCMEA
AGT
FFFFh
5678h
1234h
FFFFh
5678h
1234h
AGT
FFFFh
5678h
5677h 5676h 5675h 5674h 5673h 5672h 5671h 5670h 566Fh ����� ����� 0002h 0001h 0000h 1234h1233h 1232h1231h
24.3
TSTART TCMEA TCMEB A B
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 596 of 1551
RA4W1
24. AGT
24.3.2 A/B
A/B AGTCR TSTART TSTART 0 A/B TSTART 1
TSTART A 24.4 B A
AGTCRTSTART1
AGTCMA1234h
AGTCMA2345h
AGTCR.TSTART
AGT
AGTCMA
FFFFh
A
A
A
A
A
FFFFh
A
FFFFh
5678h
5677h 5676h 5675h 5674h 5673h 5672h 5671h 5670h 566Fh 566Eh ... 0000h 5678h 5677h
1234h
2345h
1234h 1234h
2345h 2345h
24.4
A TSTART
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 597 of 1551
RA4W1
24. AGT
24.3.3
AGT AGTMR1 TCK[2:0] 1 0000h
24.5
24.5
0300h
1010h
AGT 02FAh 02F9h 02F8h 02F7h 1010h 100Fh 100Eh ����� ����� 0000h 1010h 100Fh 100Eh 100Dh 100Ch 100Bh
AGTCR.TUNDF
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 598 of 1551
RA4W1
24. AGT
24.3.4
AGTMR1 TCK[2:0] AGTIOn AGTOn
1 0000h AGTIOn AGTOn AGTOn AGTIOC TOE AGTIOC TEDGSEL
24.6
AGTCR TSTART1
AGT 0002h
AGT 0004h
AGTCR.TSTART
AGT
FFFFh
0002h
0004h
FFFFh
0002h
0004h
AGT
FFFFh
AGTIOC.TEDGSEL
0002h
0001h 0000h 0002h 0001h 0000h 0002h 0001h 0000h 0002h 0001h 0004h 0003h 0002h 0001h 0000h 0004h 0003h
0
AGTOn AGTIOn
AGTCR.TUNDF
0
24.6
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 599 of 1551
RA4W1
24. AGT
24.3.5
AGTIOn AGTIOC TIOGT[1:0] AGTISR AGTIOC TIPF[1:0] AGTIOn AGTOn
24.7
AGTMR1.TMOD[2:0] AGTIOC
010b
00h
AGTCR.TSTART AGTIOn
AGT AGTCR.TUNDF
FFFFh
FFFEh FFFDh
0000h FFFFh
FFFEh
0
24.7
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 600 of 1551
RA4W1
24. AGT
AGTIOC TIOGT[1:0] 01b 24.8
AGTMR1 TMOD[2:0] = 010b AGTIOC TIOGT[1:0] = 01b TIPF[1:0] = 00b TEDGSEL = 1 AGTISR EEPS = 1High
AGTCR.TSTART
AGTIOn
AGTEEn
2
1
AGT
FFFFh
FFFEh FFFDh
FFFCh
FFFBh FFFAh FFF9h FFF8h
1.
2 AGTEEn
1
2.
2
2AGTCR.TSTOP 1
24.8
2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 601 of 1551
RA4W1
24. AGT
24.3.6
AGTIOn
AGTIOC TEDGSEL AGTIOn AGTMR1 TCK[2:0] AGTIOn AGTCR TEDGF 1 AGTCR TUNDF 1
24.9
HighAGTIOC.TEDGSEL = 1
FFFFh n
n = AGT
hex
0000h
AGTCR.TSTART
AGTIOn
1
AGTCR.TEDGF AGTCR.TUNDF
0
24.9
0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 602 of 1551
RA4W1
24. AGT
24.3.7
AGTIOn AGTMR1 TCK[2:0] AGTIOC TEDGSEL AGTIOn AGTCR TEDGF 1 AGT 24.4.5 AGTCR TUNDF 1
24.10
2 Low High
AGTCR.TSTART
AGT
0300h
02FFh 02FEh 0300h 02FFh 02FEh02FDh02FCh02FBh 02FAh 02F9h 02F8h 02F7h 0300h 02FFh ���� ���� 0001h 0000h 0300h 02FFh 02FEh
0300h
02FFh
02FEh
02FBh 02FAh 02F9h 02F8h
02F7h
���� ���� 0001h 0000h 0300h 02FFh
1
2
02FEh
2 02F7h
AGTCR.TEDGF
3
3
AGTCR.TUNDF
04 05
AGT 0300h AGTIOC TEDGSEL 0 1
1.
AGT TEDGF 1
AGT
2.
AGT
3.
AGTCR TEDGF 1
4.
08 AGTCR TEDGF 0
5.
08 AGTCR TUNDF 0
24.10
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 603 of 1551
RA4W1
24. AGT
24.3.8
AGTCMA AGTCMB AGT AGTCMSR TCMEA TCMEB 1 A/B AGTMR1 TCK[2:0] AGT AGTCMA AGTCMB AGTCR TCMAF/TCMBF 1
24.3.1 AGTOB0 AGTCMSR TOPOLB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 604 of 1551
RA4W1 24.11
n = AGT m = A p = B
FFFFh
n
m
24. AGT
16
p
0000h
AGTCR.TSTART
1
AGTCR.TCMAF
A
0
0
AGTOB0
AGTCR.TCMBF
B
0
0
AGTOn
AGTCR.TUNDF
0
0
24.11
TOPOLB = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 605 of 1551
RA4W1
24. AGT
24.3.9
AGTOnAGTIOn AGTOB0 24.5 24.7
24.5
AGTOn
1
0
AGTIOC
TOE
TEDGSEL 1
0
0 1
AGTOn
24.6
AGTIO0
0 1 1 0 0 1
AGTIOC TEDGSEL
AGTIOn
24.7
AGTOB0
AGTCMSR
TOEB
TOPOLB
1
1
0
0
0 1
1
1
0
0
0 1
1
1
0
0
0 1
0
0
AGTOB0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 606 of 1551
RA4W1
24. AGT
24.3.10
AGT TSTART = 1 TCSTF = 1
24.8 24.9
24.8
AGT0
AGTMR1 TCK[2:0]
100b 110b 100b 110b -- 100b 110b 100b 110b
CPU
AGTLCLK AGTSCLK --
AGTLCLK AGTSCLK --
AGTIOn
--
AGTLCLK AGTSCLK --
AGTLCLK AGTSCLK --
24.9
AGT1
AGTMR1 TCK[2:0]
100b110b 101b 1
100b110b 101b 1
--
100b110b 101b 1
100b110b 101b 1
AGTLCLKAGTSCLK AGT0 AGTLCLKAGTSCLK AGT0 AGTIOn
AGTLCLKAGTSCLK AGT0 AGTLCLKAGTSCLK AGT0
CPU
A/B
A/B
A/B
. 1.
AGT1 AGT0 24.8
24.3.11
AGT 24.10 3
24.10
AGT
AGTn_AGTI
AGTn_AGTCMAI AGTn_AGTCMBI
AGTIOn AGTIOn
AGT AGTCMA
AGT AGTCMB
.
n = 0, 1
DMAC/DTC
24.3.12 ELC
AGT ELC AGT A B19. ELC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 607 of 1551
RA4W1
24. AGT
24.4
24.4.1
24.1 AGT0 TCK[2:0] = 101b
AGTCR TSTART 1 3 AGTCR TCSTF 0 TCSTF 1TCSTF AGT 1
TSTART 0 3 TCSTF 1 TCSTF 0 TCSTF 0 TCSTF AGT 1
TSTART 0 1 14. ICU
1.
AGT AGTAGTCMAAGTCMBAGTCRAGTMR1AGTMR2AGTIOCAGTISR AGTCMSR
24.1 AGT0 TCK[2:0] = 101b
AGTCR TSTART 1PCLKB 2 AGTCR TCSTF 0TCSTF 1TCSTF AGT 1
TSTART 0PCLKB 2 TCSTF 1 TCSTF 0 TCSTF 0 TCSTF AGT 1
TSTART 0 1 14. ICU
1.
AGT AGTAGTCMAAGTCMBAGTCRAGTMR1AGTMR2AGTIOCAGTISR AGTCMSR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 608 of 1551
RA4W1
24. AGT
24.4.2
AGTCR TSTART TCSTF 1AGT 3
24.4.3
AGT AGTMR1AGTMR2AGTIOCAGTISRAGTCMSR AGTIOCTSTART TCSTF 0
AGT TEDGFTUNDFTCMAF TCMBF 0
TEDGF
TUNDF
TCMAF
TCMBF
24.4.4
TIPF[1:0] AGTIOC TEDGSEL 5
24.4.5
= AGT -
= -
= AGT - + 1
24.4.6 TSTOP
AGTCR TSTOP 1 I/O
AGT AGTCMA AGTCMB AGTCR AGTMR1 AGTMR2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 609 of 1551
RA4W1
24. AGT
24.4.7 AGT0
AGT AGT
(1)
1. AGT0 AGT1 2. AGT1 3. AGT0
(2)
1. AGT0 2. AGT1 3. AGT1 AGT1.AGTMR1.TCK[2:0] 000b
24.4.8 I/O
AGT I/O 6.
24.4.9 PCLKBPCLKB/8 PCLKB/2
AGT AGT
24.4.10 AGTLCLK AGTSCLK
MSTPCRD MSTPD2 AGT1 1 MSTPCRD MSTPD3 AGT0 1 MSTPD2 MSTPD3 0 AGT1 AGT0 AGT
24.4.11
SCKCR.CKSEL[2:0] 4 AGTIOn AGTEEn 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 610 of 1551
RA4W1
25. RTC
25. RTC
25.1
RTC 2 RTC 2000 2099 100 RTC
LOCO RTC 128Hz 12 32 1/128
. VBATT VBTCR1.BPWSWSTP 1 RTC 12. 12.2 VBTCR1.BPWSWSTP
25.1 RTC 25.1 RTC 25.2 RTC
25.1
RTC
1 XCINLOCO
BCD 12 24 30 3000301
32
1Hz2Hz4Hz8Hz16Hz32Hz64Hz
1Hz/64Hz
RTC_ALM
32 RTC_PRD 2 11/21/4 1/8 1/16 1/321/64 1/128 1/256
RTC_CUP
� 64Hz � 64HzR64CNT
32
RTC_PRD
1. PCLKB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 611 of 1551
RA4W1
25. RTC
XCIN XCOUT
(RTC)
RCR2
32.768kHz
XCIN 128Hz
RADJ
RCR4
LOCO
LOCO 128Hz
RFRH/ RFRL
1Hz/64Hz
128Hz
R64CNT
RSECCNT/ BCNT0
RHRCNT/ BCNT2
RMINCNT/ BCNT1
RDAYCNT
RWKCNT/ BCNT3
RMONCNT RYRCNT
RTCIC0
RSECAR/ RMINAR/ BCNT0AR BCNT1AR RHRAR/ RWKAR/ BCNT2AR BCNT3AR RDAYAR/ RMONAR/ BCNT0AER BCNT1AER
RYRAR RYRAREN/ BCNT2AER BCNT3AER
RCR1
RSECCP0/ BCNT0CP0
RHRCP0/ BCNT2CP0
RMONCP0
RMINCP0/ BCNT1CP0
RDAYCP0/ BCNT3CP0
RTCCR0
RTCOUT
RTC_ALM RTC_PRD RTC_CUP (RTC_PRD)
R64CNT
64Hz
RSECCNT/BCNT0 0
RMINCNT/BCNT1 1
RHRCNT/BCNT2 2
RWKCNT/BCNT3 3
RDAYCNT
RMONCNT
RYRCNT
RCR1
RTC 1
RCR2
RTC 2
RCR4
RTC 4
RADJ
RFRH/RFRL
RSECAR/BCNT0AR 0
RMINAR/BCNT1AR 1
RHRAR/BCNT2AR 2
RWKAR/BCNT3AR 3
RDAYAR/BCNT0AER
0
RMONAR/BCNT1AER
1
RYRAR/BCNT2AER
2
RYRAREN/BCNT3AER
3
RTCCR0
0
RSECCP0/BCNT0CP0 0/BCNT0 0
RMINCP0/BCNT1CP0 0/BCNT1 0
RHRCP0/BCNT2CP0 0/BCNT2 0
RDAYCP0/BCNT3CP0 0/BCNT3 0
RMONCP0
0
25.1
RTC
25.2
RTC
XCIN XCOUT RTCOUT RTCIC0
32.768kHz
1Hz/64Hz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 612 of 1551
RA4W1
25. RTC
25.2
RTC 25.6.5
RTC x RCR2.START 1 RTC 64Hz
. 25.6.4
25.2.1 64Hz R64CNT
RTC.R64CNT 4004 4000h
b7 -- 0
b6
b5
b4
b3
b2
b1
b0
F1HZ F2HZ F4HZ F8HZ F16HZ F32HZ F64HZ
x
x
x
x
x
x
x
x
R/W
b0
F64HZ
64Hz
1Hz 64Hz
R
b1
F32HZ
32Hz
R
b2
F16HZ
16Hz
R
b3
F8HZ
8Hz
R
b4
F4HZ
4Hz
R
b5
F2HZ
2Hz
R
b6
F1HZ
1Hz
R
b7
--
0
R
R64CNT 64Hz R64CNT128Hz
RTC 30 00h 25.3.564Hz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 613 of 1551
RA4W1
25. RTC
25.2.2 RSECCNT 0BCNT0
(1)
RTC.RSECCNT 4004 4002h
b7
b6
b5
b4
b3
b2
b1
b0
--
SEC10[2:0]
SEC1[3:0]
x
x
x
x
x
x
x
x
x
b3-b0
SEC1[3:0]
b6-b4 b7
SEC10[2:0] --
1
10
R/W
1 0 9 R/W + 1
0 560
R/W
0
R/W
RSECCNT BCD 64Hz 1
10 00 59 RTC RCR2.START
25.3.564Hz
(2)
RTC.BCNT0 4004 4002h
b7
b6
b5
b4
b3
b2
b1
b0
BCNT[7:0]
x
x
x
x
x
x
x
x
x
BCNT0 32 b7 b0 32 64Hz 1 RCR2.START 25.3.564Hz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 614 of 1551
RA4W1
25. RTC
25.2.3 RMINCNT 1BCNT1
(1)
RTC.RMINCNT 4004 4004h
b7
b6
b5
b4
b3
b2
b1
b0
--
MIN10[2:0]
MIN1[3:0]
x
x
x
x
x
x
x
x
x
b3-b0
MIN1[3:0]
b6-b4 b7
MIN10[2:0] --
1
10
R/W
1 0 9 R/W + 1
0 560
R/W
0
R/W
RMINCNT BCD 1
10 BCD 00 59 RTC RCR2.START 25.3.564Hz
(2)
RTC.BCNT1 4004 4004h
b7
b6
b5
b4
b3
b2
b1
b0
BCNT[15:8]
x
x
x
x
x
x
x
x
x
BCNT1 32 b15 b8 32 64Hz 1 RCR2.START 25.3.564Hz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 615 of 1551
RA4W1
25. RTC
25.2.4 RHRCNT 2BCNT2
(1)
RTC.RHRCNT 4004 4006h
b7
b6
b5
b4
b3
b2
b1
b0
--
PM
HR10[1:0]
HR1[3:0]
x
x
x
x
x
x
x
x
x
b3-b0
HR1[3:0]
b5-b4 b6
HR10[1:0] PM
1
10 PM
b7
--
R/W
1 1 0 9 R/W + 1
102 R/W
AM/PM
R/W
0
1
0
R/W
RHRCNT BCD 1 RCR2.HR24
RCR2.HR24 0 00 11BCD
RCR2.HR24 1 00 23BCD
RTC RCR2.STARTPM RCR2.HR24 0 PM 25.3.564Hz
(2)
RTC.BCNT2 4004 4006h
b7
b6
b5
b4
b3
b2
b1
b0
BCNT[23:16]
x
x
x
x
x
x
x
x
x
BCNT2 32 b23 b16 32 64Hz 1 RCR2.START 25.3.564Hz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 616 of 1551
RA4W1
25. RTC
25.2.5 RWKCNT 3BCNT3
(1)
RTC.RWKCNT 4004 4008h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
DAYW[2:0]
x
x
x
x
x
x
x
x
x
R/W
b2-b0
DAYW[2:0]
b2
b0
0 0 0
R/W
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
b7-b3
--
0
R/W
RWKCNT 1 0 6 RTC RCR2.START 25.3.564Hz
(2)
RTC.BCNT3 4004 4008h
b7
b6
b5
b4
b3
b2
b1
b0
BCNT[31:24]
x
x
x
x
x
x
x
x
x
BCNT3 32 b31 b24 64Hz 1 RCR2.START25.3.5 64Hz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 617 of 1551
RA4W1
25.2.6 RDAYCNT
RTC.RDAYCNT 4004 400Ah
b7
b6
b5
b4
b3
b2
b1
b0
--
-- DATE10[1:0]
DATE1[3:0]
0
0
x
x
x
x
x
x
x
25. RTC
b3-b0
DATE1[3:0]
b5-b4 b7-b6
DATE10[1:0] --
1
10
R/W
1 109 R/W + 1
103 R/W
0 0
R/W
RDAYCNT BCD 1 RYRCNT 400100 4
10 BCD 01 31 RTC
RCR2.START 25.3.564Hz
25.2.7 RMONCNT
RTC.RMONCNT 4004 400Ch
b7
b6
b5
b4
b3
b2
b1
b0
--
--
-- MON10
MON1[3:0]
0
0
0
x
x
x
x
x
x
b3-b0
MON1[3:0]
b4 b7-b5
MON10 --
1
10
R/W
1 109 R/W + 1
101 R/W
0 0
R/W
RMONCNT BCD 1
10 BCD 01 12 RTC RCR2.START 25.3.564Hz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 618 of 1551
RA4W1
25. RTC
25.2.8 RYRCNT
RTC.RYRCNT 4004 400Eh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
YR10[3:0]
YR1[3:0]
0
0
0
0
0
0
0
0
x
x
x
x
x
x
x
x
x
b3-b0
YR1[3:0]
b7-b4
YR10[3:0]
b15-b8
--
1 10
R/W
1 109 R/W + 1
109 R/W + 1
0 0
R/W
RYRCNT BCD 1
10 BCD 00 99 RTC RCR2.START 25.3.564Hz
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 619 of 1551
RA4W1
25. RTC
25.2.9 RSECAR 0 BCNT0AR
(1)
RTC.RSECAR 4004 4010h
b7
b6
b5
b4
b3
b2
b1
b0
ENB
SEC10[2:0]
SEC1[3:0]
x
x
x
x
x
x
x
x
x
R/W
b3-b0
SEC1[3:0]
1
R/W
b6-b4
SEC10[2:0] 10
R/W
b7
ENB
ENB
0RSECCNT
R/W
1RSECCNT
RSECAR BCD RSECCNT ENB 1 RSECAR RSECCNT ENB 1
RSECAR
RMINAR
RHRAR
RWKAR
RDAYAR
RMONAR
RYRAREN
RTC_ALM IR 1 RSECAR 10 BCD 00 59 RTC RTC 00h
(2)
RTC.BCNT0AR 4004 4010h
b7
b6
b5
b4
b3
b2
b1
b0
BCNTAR[7:0]
x
x
x
x
x
x
x
x
x
BCNT0AR 32 b7 b0 RTC 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 620 of 1551
RA4W1
25. RTC
25.2.10 RMINAR 1 BCNT1AR
(1)
RTC.RMINAR 4004 4012h
b7
b6
b5
b4
b3
b2
b1
b0
ENB
MIN10[2:0]
MIN1[3:0]
x
x
x
x
x
x
x
x
x
R/W
b3-b0
MIN1[3:0]
1
R/W
b6-b4
MIN10[2:0] 10
R/W
b7
ENB
ENB
0RMINCNT
R/W
1RMINCNT
RMINAR BCD RMINCNT ENB 1 RMINAR RMINCNT ENB 1
RSECAR
RMINAR
RHRAR
RWKAR
RDAYAR
RMONAR
RYRAREN
RTC_ALM IR 1 RMINAR 10 BCD 00 59 RTC RTC 00h
(2)
RTC.BCNT1AR 4004 4012h
b7
b6
b5
b4
b3
b2
b1
b0
BCNTAR[15:8]
x
x
x
x
x
x
x
x
x
BCNT1AR 32 b15 b8 RTC 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 621 of 1551
RA4W1
25. RTC
25.2.11 RHRAR 2 BCNT2AR
(1)
RTC.RHRAR 4004 4014h
b7
b6
b5
b4
b3
b2
b1
b0
ENB PM
HR10[1:0]
HR1[3:0]
x
x
x
x
x
x
x
x
x
R/W
b3-b0
HR1[3:0]
1
R/W
b5-b4
HR10[1:0]
10
R/W
b6
PM
PM
R/W
0
1
b7
ENB
ENB
0RHRCNT
R/W
1RHRCNT
RHRAR BCD RHRCNT ENB 1 RHRAR RHRCNT ENB 1
RSECAR
RMINAR
RHRAR
RWKAR
RDAYAR
RMONAR
RYRAREN
RTC_ALM IR 1 RCR2.HR24
RCR2.HR24 0 00 11BCD
RCR2.HR24 1 00 23BCD
RTC RCR2.HR24 0 PM RCR2.HR24 1 PM RTC 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 622 of 1551
RA4W1
25. RTC
(2)
RTC.BCNT2AR 4004 4014h
b7
b6
b5
b4
b3
b2
b1
b0
BCNTAR[23:16]
x
x
x
x
x
x
x
x
x
BCNT2AR 32 b23 b16 RTC 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 623 of 1551
RA4W1
25. RTC
25.2.12 RWKAR 3 BCNT3AR
(1)
RTC.RWKAR 4004 4016h
b7
b6
b5
b4
b3
b2
b1
b0
ENB --
--
--
--
DAYW[2:0]
x
x
x
x
x
x
x
x
x
R/W
b2-b0
DAYW[2:0]
b2
b0
0 0 0
R/W
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
b6-b3
--
0
R/W
b7
ENB
ENB
0 RWKCNT
R/W
1 RWKCNT
RWKAR RWKCNTENB 1 RWKAR RWKCNT ENB 1
RSECAR
RMINAR
RHRAR
RWKAR
RDAYAR
RMONAR
RYRAREN
RTC_ALM IR 1 RWKAR 10 BCD 0 6 RTC RTC 00h
(2)
RTC.BCNT3AR 4004 4016h
b7
b6
b5
b4
b3
b2
b1
b0
BCNTAR[31:24]
x
x
x
x
x
x
x
x
x
BCNT3AR 32 b31 b24 RTC 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 624 of 1551
RA4W1
25. RTC
25.2.13 RDAYAR 0 BCNT0AER
(1)
RTC.RDAYAR 4004 4018h
b7
b6
b5
b4
b3
b2
b1
b0
ENB -- DATE10[1:0]
DATE1[3:0]
x
x
x
x
x
x
x
x
x
R/W
b3-b0
DATE1[3:0] 1
R/W
b5-b4
DATE10[1:0] 10
R/W
b6
--
0
R/W
b7
ENB
ENB
0RDAYCNT
R/W
1RDAYCNT
RDAYAR BCD RDAYCNT ENB 1 RDAYAR RDAYCNT ENB 1
RSECAR
RMINAR
RHRAR
RWKAR
RDAYAR
RMONAR
RYRAREN
RTC_ALM IR 1 RDAYAR 10 BCD 01 31 RTC RTC 00h
(2)
RTC.BCNT0AER 4004 4018h
b7
b6
b5
b4
b3
b2
b1
b0
ENB[7:0]
x
x
x
x
x
x
x
x
x
BCNT0AER 32 b7 b0 ENB[31:0] 1 BCNT[31:0]BCNTAR[31:0] RTC_ALM IR 1 RTC 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 625 of 1551
RA4W1
25. RTC
25.2.14 RMONAR 1 BCNT1AER
(1)
RTC.RMONAR 4004 401Ah
b7
b6
b5
b4
b3
b2
b1
b0
ENB --
-- MON10
MON1[3:0]
x
x
x
x
x
x
x
x
x
R/W
b3-b0
MON1[3:0] 1
R/W
b4
MON10
10
R/W
b6-b5
--
0
R/W
b7
ENB
ENB
0RMONCNT
R/W
1RMONCNT
RMONAR BCD RMONCNT ENB 1 RMONAR RMONCNT ENB 1
RSECAR
RMINAR
RHRAR
RWKAR
RDAYAR
RMONAR
RYRAREN
RTC_ALM IR 1 RMONAR 10 BCD 01 12 RTC RTC 00h
(2)
RTC.BCNT1AER 4004 401Ah
b7
b6
b5
b4
b3
b2
b1
b0
ENB[15:8]
x
x
x
x
x
x
x
x
x
BCNT1AER 32 b15 b8 ENB[31:0] 1 BCNT[31:0]BCNTAR[31:0] RTC_ALM IR 1 RTC 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 626 of 1551
RA4W1
25. RTC
25.2.15 RYRAR 2 BCNT2AER
(1)
RTC.RYRAR 4004 401Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
YR10[3:0]
YR1[3:0]
0
0
0
0
0
0
0
0
x
x
x
x
x
x
x
x
x
R/W
b3-b0
YR1[3:0]
1
R/W
b7-b4
YR10[3:0]
10
R/W
b15-b8 --
00
R/W
RYRAR BCD RYRCNT RYRAR 10 BCD 00 99 RTC RTC 0000h
(2)
RTC.BCNT2AER 4004 401Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
ENB[23:16]
0
0
0
0
0
0
0
0
x
x
x
x
x
x
x
x
x
BCNT2AER 32 b23 b16 ENB[31:0] 1 BCNT[31:0]BCNTAR[31:0] RTC_ALM IR 1 RTC 0000h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 627 of 1551
RA4W1
25. RTC
25.2.16 RYRAREN 3 BCNT3AER
(1)
RTC.RYRAREN 4004 401Eh
b7
b6
b5
b4
b3
b2
b1
b0
ENB --
--
--
--
--
--
--
x
x
x
x
x
x
x
x
x
R/W
b6-b0
--
0
R/W
b7
ENB
ENB
0 RYRCNT
R/W
1 RYRCNT
RYRAREN ENB 1 RYRAR RYRCNT ENB 1
RSECAR RMINAR RHRAR RWKAR RDAYAR RMONAR RYRAREN
RTC_ALM IR 1 RTC 00h
(2)
RTC.BCNT3AER 4004 401Eh
b7
b6
b5
b4
b3
b2
b1
b0
ENB[31:24]
x
x
x
x
x
x
x
x
x
BCNT3AER 32 b31 b24 ENB[31:0] 1 BCNT[31:0]BCNTAR[31:0] RTC_ALM IR 1 RTC 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 628 of 1551
RA4W1
25.2.17 RTC 1RCR1
RTC.RCR1 4004 4022h
b7 x
b6
b5
PES[3:0]
x
x
b4
b3
b2
b1
b0
RTCOS PIE CIE AIE
x
0
x
0
x
x
25. RTC
R/W
b0
AIE
0
R/W
1
b1
CIE
0
R/W
1
b2
PIE
0
R/W
1
b3
RTCOS RTCOUT
0RTCOUT 1Hz
R/W
1RTCOUT 64Hz
b7-b4
PES[3:0]
b7
b4
0 1 1 0 1/2561
R/W
0 1 1 1 1/128
1 0 0 0 1/64
1 0 0 1 1/32
1 0 1 0 1/16
1 0 1 1 1/8
1 1 0 0 1/4
1 1 0 1 1/2
1 1 1 0 1
1 1 1 1 2
1.
PES[3:0] = 0110b LOCO RCR4.RCKSEL = 1 1/128
RCR1 AIEPIE PES[3:0] RCR1
AIE
CIE RSECCNT/BCNT0 64Hz 64Hz
R64CNT
PIE
RTCOS RTCOUT RTCOUT RTCOS RCR2.START = 0
RTCOUT RCR2.RTCOE = 0RTCOUT RCR2.RTCOE I/O 20.5.1
PES[3:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 629 of 1551
RA4W1
25.2.18 RTC 2RCR2
(1)
RTC.RCR2 4004 4024h
b7
b6
b5
b4
b3
b2
b1
b0
CNTM D
HR24
AADJP AADJE RTCOE ADJ30 RESET START
x
x
x
x
0
0
0
x
x
25. RTC
b0
START
b1
RESET
RTC
b2
ADJ30
30
b3
RTCOE
RTCOUT
b4
AADJE
3
b5
AADJP
3
b6
HR24
b7
CNTMD
R/W
0
R/W
1
R/W
00
1 RTC
1
0 RTC
1RTC
R/W
00
130
030
130
0RTCOUT
R/W
1RTCOUT
0
R/W
1
01
R/W
RADJ.ADJ[5:0]
110
RADJ.ADJ[5:0]
0RTC12
R/W
1RTC24
0
R/W
1
1.
2. 3.
R64CNT, RSECAR/BCNT0AR, RMINAR/BCNT1AR, RHRAR/BCNT2AR, RWKAR/BCNT3AR, RDAYAR/BCNT0AER, RMONAR/BCNT1AER, RYRAR/BCNT2AER, RYRAREN/BCNT3AER, RADJ, RTCCR0, RSECCP0/BCNT0CP0, RMINCP0 BCNT1CP0, RHRCP0/BCNT2CP0, RDAYCP0/BCNT3CP0, RMONCP0, RCR2.ADJ30, RCR2.AADJE, RCR2.AADJP LOCO
RCR2 RTCOUT 30 RTC
START
START START
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 630 of 1551
RA4W1
25. RTC
RESET RTC RTC RESET 1
RESET 0 0
ADJ30 30 30 ADJ30 1 RSECCNT 30 00 30
1 30 ADJ30 1 30
ADJ30 0 ADJ30 1 0 30 R64CNT ADJ30 RTC 0
RTCOE RTCOUT RTCOUT 1Hz/64Hz RTCOE START
START 0 RTCOE RTCOUT RTCOE
AADJE
AADJE RADJ.PMADJ[1:0] 00b
AADJE RTC 0
AADJP
AADJP RADJ.PMADJ[1:0] 00b
AADJP RTC 0
HR24 RTC 12 24 HR24 START
START 0 HR24
CNTMD RTC RTC
RTC
25.3.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 631 of 1551
RA4W1
(2)
RTC.RCR2 4004 4024h
b7
b6
b5
b4
b3
b2
b1
b0
CNTM D
-- AADJP AADJE RTCOE -- RESET START
x
x
x
x
0
0
0
x
x
25. RTC
b0
START
b1
RESET
RTC
b2
--
b3
RTCOE
RTCOUT
b4
AADJE
3
b5
AADJP
3
b6
--
b7
CNTMD
R/W
03264Hz R/W
132 64Hz
R/W
00
1 RTC 1
0 RTC 1RTC
0 0
R/W
0RTCOUT
R/W
1RTCOUT
0
R/W
1
032
R/W
RADJ.ADJ[5:0]
18
RADJ.ADJ[5:0]
0
R/W
0
R/W
1
1.
2. 3.
R64CNT, RSECAR/BCNT0AR, RMINAR/BCNT1AR, RHRAR/BCNT2AR, RWKAR/BCNT3AR, RDAYAR/BCNT0AER, RMONAR/BCNT1AER, RYRAR/BCNT2AER, RYRAREN/BCNT3AER, RTCCR0, RSECCP0/BCNT0CP0, RMINCP0 BCNT1CP0, RHRCP0/BCNT2CP0, RDAYCP0/BCNT3CP0, RMONCP0, RCR2.ADJ30, RCR2.AADJE, RCR2.AADJP LOCO
START
START START
RESET RTC RTC RESET 1
RESET 0 RESET 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 632 of 1551
RA4W1
25. RTC
RTCOE RTCOUT RTCOUT 1Hz/64Hz RTCOE START
START 0 RTCOE RTCOUT
AADJE
AADJE RADJ.PMADJ[1:0] 00b AADJE RTC 0
AADJP
32 8 AADJP RADJ.PMADJ[1:0] 00b AADJP RTC 0
CNTMD RTC RTC
RTC
25.3.1
25.2.19 RTC 4RCR4
RTC.RCR4 4004 4028h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
RCKSE L
0
0
0
0
0
0
0
x
x
R/W
b0
RCKSEL
0
R/W
1LOCO
b7-b1
--
0 0
R/W
RCR4
RCKSEL 0 RCKSEL 1 LOCO
RCKSEL LOCO RTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 633 of 1551
RA4W1
25. RTC
25.2.20 RFRH/RFRL
RTC.RFRH 4004 402Ah
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
-- RFC16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
x
x
b0 b15-b1
RFC16 --
R/W
RFRL0 R/W
0 0
R/W
RTC.RFRL 4004 402Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
RFC[15:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15-b0 RFC[15:0]
R/W
LOCO00FFh
R/W
RFRL LOCO
RTC 128Hz LOCO LOCO 128Hz RFC[15:0] LOCO 128Hz RFC[15:0] RFRH 0000h
0007h 01FFh RTC RCR2.START LOCO LOCO
RFC[15:0] = LOCO � 128 - 1
LOCO 32.768kHz RFRL 00FFh
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 634 of 1551
RA4W1
25.2.21 RADJ
RTC.RADJ 4004 402Eh
b7
b6
b5
b4
b3
b2
b1
b0
PMADJ[1:0]
ADJ[5:0]
x
x
x
x
x
x
x
x
x
25. RTC
R/W
b5-b0
ADJ[5:0]
R/W
b7-b6
PMADJ[1:0]
b7 b6
0 0
R/W
0 1
1 0
1 1
RCR2.AADJE 0 RADJ RCR2.AADJE
1 RCR2.AADJP
320 320
RADJ RADJ RTC 00h LOCO
ADJ[5:0]
PMADJ[1:0]
ADJ[5:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 635 of 1551
RA4W1
25. RTC
25.2.22 0RTCCR0
RTC.RTCCR0 4004 4040h
b7
b6
TCEN --
x
x
b5
b4
TCNF[1:0]
x
x
x
b3
b2
b1
b0
-- TCST TCCT[1:0]
x
x
x
x
R/W
b1-b0 TCCT[1:0]
b1 b0
R/W
0 0
0 1
1 0
1 1
b2
TCST
0 1 1
R/W
b3
--
0 0
R/W
b5-b4 TCNF[1:0]
b5 b4
R/W
0 0OFF
0 1
1 0ON
1 1ON32
b6
--
0 0
R/W
b7
TCEN
0RTCIC0 R/W
1RTCIC0
1. 1 0 0
RTCCR0 RTCCR0 RTCIC0
RTCCR0 RTCCR0 TCST RTC 00h RTCIC0 VBTICTLR.VCH0IEN 1 12.
TCCT[1:0]
RTCIC0 TCCT[1:0] VBTICTLR.VCH0IEN 1
TCST
RTCIC0TCST 0 TCST 1
RCR2.START 0 TCST 0 TCST 0 TCST 0 0
TCST TCCT[1:0] 00b TCST 0 TCST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 636 of 1551
RA4W1
25. RTC
TCNF[1:0]
RTCIC0RTCIC0
ON 1 32 3
TCNF[1:0] TCCT[1:0] 00b TCNF[1:0] 3 TCCT[1:0] TCNF[1:0] VBTICTLR.VCH0IEN 1
TCEN
RTCIC0 RTCTC0 VBTICTLR TCEN 0 TCCT[1:0] 00b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 637 of 1551
RA4W1
25. RTC
25.2.23 0RSECCP0 BCNT0 0 BCNT0CP0
(1)
RTC.RSECCP0 4004 4052h
b7
b6
b5
b4
b3
b2
b1
b0
--
SEC10[2:0]
SEC1[3:0]
x
x
x
x
x
x
x
x
x
R/W
b3-b0
SEC1[3:0]
1
R
b6-b4
SEC10[2:0] 10
R
b7
--
RTC 0
R
RSECCP0 RSECCNT
RTCIC0 RSECCP0 RTC 00h RTCCR0.TCCT[1:0]
(2)
RTC.BCNT0CP0 4004 4052h
b7
b6
b5
b4
b3
b2
b1
b0
BCNTCP0[7:0]
x
x
x
x
x
x
x
x
x
BCNT0CPy BCNT0 RTCIC0 BCNT0CP0 RTC 00h RTCCR0.TCCT[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 638 of 1551
RA4W1
25. RTC
25.2.24 0RMINCP0 BCNT1 0 BCNT1CP0
(1)
RTC.RMINCP0 4004 4054h
b7
b6
b5
b4
b3
b2
b1
b0
--
MIN10[2:0]
MIN1[3:0]
x
x
x
x
x
x
x
x
x
R/W
b3-b0
MIN1[3:0]
1
R
b6-b4
MIN10[2:0] 10
R
b7
--
RTC 0
R
RMINCP0 RMINCNT
RTCIC0 RMINCP0
RTC 00h RTCCR0.TCCT[1:0]
(2)
RTC.BCNT1CP0 4004 4054h
b7
b6
b5
b4
b3
b2
b1
b0
BCNTCP0[15:8]
x
x
x
x
x
x
x
x
x
BCNT1CP0 BCNT1
RTCIC0 BCNT1CP0
RTC 00h RTCCR0.TCCT[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 639 of 1551
RA4W1
25. RTC
25.2.25 0RHRCP0 BCNT2 0 BCNT2CP0
(1)
RTC.RHRCP0 4004 4056h
b7
b6
b5
b4
b3
b2
b1
b0
--
PM
HR10[1:0]
HR1[3:0]
x
x
x
x
x
x
x
x
x
R/W
b3-b0
HR1[3:0]
1
R
b5-b4
HR10[1:0]
10
R
b6
PM
PM
0
R
1
b7
--
RTC 0
R
RHRCP0 RHRCNT
RTCIC0 RHRCP0 RCR2.HR24 012 PM
RTC 00h RTCCR0.TCCT[1:0]
(2)
RTC.BCNT2CP0 4004 4056h
b7
b6
b5
b4
b3
b2
b1
b0
BCNTCP0[23:16]
x
x
x
x
x
x
x
x
x
BCNT2CP0 BCNT2
RTCIC0 BCNT2CP0
RTC 00h RTCCR0.TCCT[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 640 of 1551
RA4W1
25. RTC
25.2.26 0RDAYCP0 BCNT3 0 BCNT3CP0
(1)
RTC.RDAYCP0 4004 405Ah
b7
b6
b5
b4
b3
b2
b1
b0
--
-- DATE10[1:0]
DATE1[3:0]
x
x
x
x
x
x
x
x
x
R/W
b3-b0
DATE1[3:0] 1
R
b5-b4
DATE10[1:0] 10
R
b7-b6
--
RTC 0
R
RDAYCP0 RDAYCNT
RTCIC0 RDAYCP0
RTC 00h RTCCR0.TCCT[1:0]
(2)
RTC.BCNT3CP0 4004 405Ah
b7
b6
b5
b4
b3
b2
b1
b0
BCNTCP0[31:24]
x
x
x
x
x
x
x
x
x
BCNT3CP0 BCNT3
RTCTC0 BCNT3CP0
RTC 00h RTCCR0.TCCT[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 641 of 1551
RA4W1
25.2.27 0RMONCP0
(1)
RTC.RMONCP0 4004 405Ch
b7
b6
b5
b4
b3
b2
b1
b0
--
--
-- MON10
MON1[3:0]
x
x
x
x
x
x
x
x
x
25. RTC
R/W
b3-b0
MON1[3:0] 1
R
b4
MON10
10
R
b7-b5
--
0
R
RMONCP0 RMONCNT
RTCIC0 RMONCP0
RTC 00h RTCCR0.TCCT[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 642 of 1551
RA4W1
25. RTC
25.3
25.3.1
25.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 643 of 1551
RA4W1
25.3.2
25.3
25. RTC
RCR4.RCKSEL
6
RCR4.RCKSEL 6
START0
No START = 0
RCR2.START0
Yes
RCKSEL = 0
No (LOCO)
Yes
RCR2.CNTMD1
RTC RCR2.RESET1
No RESET = 0 Yes
RCR2.RESET0
1.
START 0 RCR2.CNTMD
25.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 644 of 1551
RA4W1
25.3.3
25.4
25. RTC
START0
RCR2.START0
No START = 0
Yes RTC
RCR2.START0 RCR2.RESET11
No RESET = 0
Yes
30
RCR2.RESET0
RCKSEL = 0
No (LOCO)
Yes
START1
RCR2.START1
1.
No START = 1
RCR2.START1
Yes
RTC
25.4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 645 of 1551
RA4W1
25.3.4 30
25.5 30
25. RTC
RCR2.ADJ301
No
ADJ30 = 0
Yes
25.5
30
RCR2.START130 RCR2.ADJ301 RCR2.ADJ300
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 646 of 1551
RA4W1
25.3.5 64Hz
25.6 64Hz
25. RTC
(a) NVIC RTC
0
Yes = 1? No
(b) 0
NVIC RTC
RTC_CUP 1
RCR1.CIE1
IELSRn.IR0RTC_CUP 1
RTC_CUP 1
IELSRn.IR0RTC_CUP 1 RTC_CUP 1
RCR1.CIE1
0
IELSRn.IR0RTC_CUP 1
Yes ?
No RTC 1.
RCR1.CIE01
25.6
64Hz 25.6 a ba
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 647 of 1551
RA4W1
25.3.6
25.7
25. RTC
NVIC
RTC
RTC_ALM 1
RCR1.AIE1
0 NVIC
200�s
IELSRn.IR0 RTC_ALM 1
RTC_ALM 1
RTC_ALM 1
25.7
1
ENB 1 ENB 0
32 ENB 1
ENB 0
IELSRn.IR RTC_ALM 1 RTC_ALM
RTC_ALM 1
RTC_ALM IELSRn.IR 0 0 RTC_ALM
RTC_ALM 1
MCU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 648 of 1551
RA4W1
25. RTC
25.3.7
25.8
RCR1.AIE1
NVIC
RTC_ALM 0
RTC
RCR1.AIE0
25.8
No
AIE = 0
Yes
0
RCR1.AIE0
IELSRn.IR0RCR1.AIE0 RTC_ALM 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 649 of 1551
RA4W1
25. RTC
25.3.8
32768 1 2
RCR2.AADJE
25.3.8.1
RCR2.AADJE 1 RCR2.AADJE RADJ
(1) 1 32.769kHz
(a)
32.769kHz 32769 1 RTC 32768 1 1 1 60 1 60
RCR2.CNTMD = 0 RCR2.AADJP = 01
RADJ.PMADJ[1:0] = 10b
RADJ.ADJ[5:0] = 603Ch
(2) 2 32.766kHz
(a)
32.766kHz 32766 1 RTC 32768 1 2 10 20 10 20
RCR2.CNTMD = 0 RCR2.AADJP = 110
RADJ.PMADJ[1:0] = 01b
RADJ.ADJ[5:0] = 2014h
(3) 3 32.764kHz
(a)
32.764kHz 32764 1 RTC 32768 1 1 4 8 32 8 32
RCR2.CNTMD = 1
RCR2.AADJP = 18
RADJ.PMADJ[1:0] = 01b
RADJ.ADJ[5:0] = 3220h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 650 of 1551
RA4W1
25. RTC
25.3.8.2
RCR2.AADJE 0 RADJ RADJ
(1) 1 32.769kHz
(a)
32.769kHz 32769 1 RTC 32768 1 1 1 1 1 1
(b)
RADJ.PMADJ[1:0] = 10b
RADJ.ADJ[5:0] = 101h 1 1 RADJ
25.3.8.3
RADJ.PMADJ[1:0] 00b RCR2.AADJE
1. RADJ.PMADJ[1:0] 00b 2. RCR2.AADJE 1 3. RCR2.AADJP 4. RADJ.PMADJ[1:0] RADJ.ADJ[5:0]
1. RADJ.PMADJ[1:0] 00b 2. RCR2.AADJE 0 3. RADJ.PMADJ[1:0] RADJ.ADJ[5:0]
RADJ
25.3.8.4
RADJ.PMADJ[1:0] 00b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 651 of 1551
RA4W1
25. RTC
25.3.8.5
RTC 3 0
RTC 3 TCST 1
ON/OFF VBTICTLR.VCH0IEN 1 RTCIC0 OFF 25.9 ON 25.10
RTCIC0
TCST
AAAA 0
25.9
OFF
BBBB AAAA
TCST = 1
RTCIC0
TCST
(1)
(2) (1)
(2) (1)
2
(2) (3)
3
AAAA 0
BBBB BBBB
25.10
ON
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 652 of 1551
RA4W1
25. RTC
25.4
RTC 25.3 3
25.3
RTC
RTC_ALM RTC_PRD RTC_CUP
(1) RTC_ALM
25.3.6
1 IELSRn.IR RTC_ALM 0 1 1
IELSRn.IR RTC_ALM
1
1. 14.ICU
25.11
RTC_ALM
(2) RTC_PRD
2 1 1/2 1/4 1/8 1/16 1/32 1/64 1/128 1/256 RCR1.PES[3:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 653 of 1551
RA4W1
25. RTC
(3) RTC_CUP
0 64Hz R64CNT
64Hz R64CNT
1Hz
64Hz
0
R64CNT64Hz
64Hz
CPU
IELSRn.IRRTC_CUP
R64CNT
R64CNT
64HzR64CNT
25.12
RTC_CUP
25.5
RTC ELCRTC_PRD
RCR1.PES[3:0] 2 1 1/2 1/4 1/8 1/16 1/32 1/64 1/128 1/256
. RTC RTC ELC ELC RTC
25.5.1
RTC CPU
ELC
. ELC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 654 of 1551
RA4W1
25. RTC
25.6
25.6.1
RCR2.START = 1
RSECCNT/BCNT0 RMINCNT/BCNT1 RHRCNT/BCNT2 RDAYCNT RWKCNT/BCNT3 RMONCNT RYRCNT RCR1.RTCOS RCR2.RTCOE RCR2.HR24 RFRL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 655 of 1551
RA4W1
25. RTC
25.6.2
25.13 RCR1.PES[3:0] R64CNT RSECCNT/BCNT0 RCR1.PES[3:0]
RTC
RCR2 30
RCR1.PES[3:0] RCR1.PIE1
1
1.
2
25.13
25.6.3 RTCOUT1Hz/64Hz
RCR2 RTC 30 RTCOUT1Hz/64Hz RTCOUT1Hz/64Hz
25.6.4
RTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 656 of 1551
RA4W1
25. RTC
25.6.5
25.3.564Hz
RCR2.AADJEAADJP HR24 RCR4 4
RCR1.CIE RCR1.RTCOS RCR2.RTCOE
RCR2.START = 1 1/128
6 RTC
25.6.6
RCR2.START 0 25.3.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 657 of 1551
RA4W1
25. RTC
25.6.7
RTC
25.14
RCR4.RCKSEL 0 SOSCCR.SOSTP 1
SOSCCR.SOSTP 9.
RCR4.RCKSEL
6
RCR4.RCKSEL 6
START0
No START = 0 Yes
RCR2.START0 RCR2.CNTMD1
RTC RCR2.RESET1
No RESET = 0 Yes
RCR2.RESET0 RCR1.AIE, CIE, PIE0
1. START 0
25.14
25.6.8
SCKCR.CKSEL[2:0] 4 RTC RTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 658 of 1551
RA4W1
26. WDT
26. WDT
26.1
WDT 14 WDT MCU 26.1 WDT 26.1
26.1
WDT
PCLKB 4 64 128 512 2048 8192 14
WDTRR
WDTSR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 659 of 1551
RA4W1
PCLKB
PCLKB/4 PCLKB/64 PCLKB/128 PCLKB/512 PCLKB/2048 PCLKB/8192
0 (OFS0)
WDT
26.1
WDT
WDTCSTPR WDTRCR WDTSR WDTCR WDTRR
26. WDT
WDT_NMIUNDF WDT
14
WDTRR WDT WDTCR WDT WDTSR WDT WDTRCR WDT WDTCSTPR WDT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 660 of 1551
RA4W1
26.2 26.2.1 WDT WDTRR
WDT.WDTRR 4004 4200h
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
26. WDT
R/W
b7-b0
00h FFh
R/W
WDTRR WDT
WDTRR 00h FFh WDT
0 WDT OFS0.WDTTOPS[1:0] WDT WDTCR.TOPS[1:0]
00h 00h 00h FFh 26.3.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 661 of 1551
RA4W1
26. WDT
26.2.2 WDT WDTCR
WDT.WDTCR 4004 4202h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
RPSS[1:0]
--
--
RPES[1:0]
CKS[3:0]
--
--
TOPS[1:0]
0
0
1
1
0
0
1
1
1
1
1
1
0
0
1
1
R/W
b1-b0
TOPS[1:0]
b1 b0
0 0102403FFh
R/W
0 140960FFFh
1 081921FFFh
1 1163843FFFh
b3-b2
--
0
R/W
b7-b4
CKS[3:0]
b7
b4
0 0 0 1 PCLKB/4
R/W
0 1 0 0 PCLKB/64
1 1 1 1 PCLKB/128
0 1 1 0 PCLKB/512
0 1 1 1 PCLKB/2048
1 0 0 0 PCLKB/8192
b9-b8
RPES[1:0]
b9 b8
0 075%
R/W
0 150%
1 025%
1 10%
b11-b10 --
0
R/W
b13-b12 RPSS[1:0]
b13 b12
0 025%
R/W
0 150%
1 075%
1 1100%
b15-b14 --
0
R/W
WDTCR 26.3.2WDTCR WDTRCR WDTCSTPR
WDTCR 0 OFS0WDTCR OFS0
26.3.7 0OFS0 WDT
TOPS[1:0]
CKS[3:0] 1 1024 4096 8192 16384
PCLKB CKS[3:0] TOPS[1:0]
26.2 CKS[3:0] TOPS[1:0] PCLKB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 662 of 1551
RA4W1
26. WDT
26.2
CKS[3:0] b7 b6 b5 b4
TOPS[1:0]
b1
b0
0
0
0
1
0
0
0
1
1
0
1
1
0
1
0
0
0
0
0
1
1
0
1
1
1
1
1
1
0
0
0
1
1
0
1
1
0
1
1
0
0
0
0
1
1
0
1
1
0
1
1
1
0
0
0
1
1
0
1
1
1
0
0
0
0
0
0
1
1
0
1
1
PCLKB/4 PCLKB/64 PCLKB/128 PCLKB/512 PCLKB/2048 PCLKB/8192
1024 4096 8192 16384 1024 4096 8192 16384 1024 4096 8192 16384 1024 4096 8192 16384 1024 4096 8192 16384 1024 4096 8192 16384
PCLKB
4096 16384 32768 65536 65536 262144 524288 1048576 131072 524288 1048576 2097152 524288 2097152 4194304 8388608 2097152 8388608 16777216 33554432 8388608 33554432 67108864 134217728
CKS[3:0]
PCLKB 4 64 128 512 2048 8192 TOPS[1:0] WDT PCLKB 4096 134217728
RPES[1:0]
75%50%25%0%
RPSS[1:0]
100%75%50%25% 0%
26.3 TOPS[1:0] 26.2 RPSS[1:0] RPES[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 663 of 1551
RA4W1
26. WDT
26.3
TOPS[1:0]
0
0
1024
03FFh
0
1
4096
0FFFh
1
0
8192
1FFFh
1
1
16384
3FFFh
100% 03FFh 0FFFh 1FFFh 3FFFh
75%
50%
02FFh
01FFh
0BFFh
07FFh
17FFh
0FFFh
2FFFh
1FFFh
25% 00FFh 03FFh 07FFh 0FFFh
RPSS[1:0]
b13
b12
1
1
1
0
0
1
0
0
RPES[1:0]
b9
b8
1
1
1
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
0
0
1
0
0
% %
0 25 100 50 75 0 25 75 50 75 0 25 50 50 75 0 25 25 50 75
100%
75%
50%
25%
0%
. 0%
26.2
RPSS[1:0] RPES[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 664 of 1551
RA4W1
26. WDT
26.2.3 WDT WDTSR
WDT.WDTSR 4004 4204h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
REFEF UNDFF
CNTVAL[13:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b13-b0 b14
CNTVAL[13:0] UNDFF
b15
REFEF
0 1
0 1
R/W
R
R(/W)
1
R(/W)
1
1. 0
CNTVAL[13:0]
1
UNDFF
1 0 0 1
UNDFF (N + 1) PCLKB (N + 1) PCLKB N WDTCR.CKS[3:0]
WDTCR.CKS[3:0] = 0001b N = 4
WDTCR.CKS[3:0] = 0100b N = 64
WDTCR.CKS[3:0] = 1111b N = 128
WDTCR.CKS[3:0] = 0110b N = 512
WDTCR.CKS[3:0] = 0111b N = 2048
WDTCR.CKS[3:0] = 1000b N = 8192
REFEF
1 0 0 1
REFEF (N + 1) PCLKB (N + 1) PCLKB N WDTCR.CKS[3:0]
WDTCR.CKS[3:0] = 0001b N = 4 WDTCR.CKS[3:0] = 0100b N = 64 WDTCR.CKS[3:0] = 1111b N = 128 WDTCR.CKS[3:0] = 0110b N = 512 WDTCR.CKS[3:0] = 0111b N = 2048 WDTCR.CKS[3:0] = 1000b N = 8192
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 665 of 1551
RA4W1
26. WDT
26.2.4 WDT WDTRCR
WDT.WDTRCR 4004 4206h
b7
b6
b5
b4
b3
b2
b1
b0
RSTIR QS
--
--
--
--
--
--
--
1
0
0
0
0
0
0
0
b6-b0 b7
-- RSTIRQS
R/W
0
R/W
0 R/W
1
WDTRCR 26.3.2WDTCR WDTRCR WDTCSTPR
WDTRCR 0OFS0OFS0 WDTCR 26.3.7 0OFS0 WDT
26.2.5 WDT WDTCSTPR
WDT.WDTCSTPR 4004 4208h
b7
b6
b5
b4
b3
b2
b1
b0
SLCST P
--
--
--
--
--
--
--
1
0
0
0
0
0
0
0
R/W
b6-b0
--
0
R/W
b7
SLCSTP
0
R/W
1
WDTCSTPR WDT WDTCSTPR 26.3.2WDTCR WDTRCR WDTCSTPR
WDTCSTPR 0OFS0OFS0 WDTCSTPR 26.3.7 0OFS0 WDT
SLCSTP
26.2.6 0OFS0
OFS0 26.3.7 0OFS0 WDT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 666 of 1551
RA4W1
26. WDT
26.3
26.3.1
WDT 2
0 OFS0
OFS0 WDT OFS0.WDTSTRT
WDT WDTCRWDT WDTRCR WDT WDTCSTPR OFS0
OFS0 WDT WDTCRWDT WDTRCR WDT WDTCSTPR
26.3.1.1
WDT OFS0.WDTSTRT 1 WDT WDTCRWDT WDTRCR WDT WDTCSTPR
WDTCSTPR
WDTCR
WDTRCR
WDTCSTPR
WDTCR.TOPS[1:0]
WDT WDT WDT_NMIUNDF WDT WDTRCR.RSTIRQS WDT NMIER.WDTEN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 667 of 1551
RA4W1
26.3 OFS0.WDTSTRT = 1 WDTRCR.RSTIRQS = 1 75%WDTCR.RPSS[1:0] = 10b 25%WDTCR.RPES[1:0] = 10b
26. WDT
100% 75%
50%
25% 0%
RES
(WDTCR)
(1)
1 2
H
High
L
H
High
L
H
High
L
(WDT_NMIUNDF) L High
WDT H High L
(2)
(1)
(2)
(1)
(2)
(1)
(1)
1. 26.3.2WDTCRWDTRCR WDTCSTPR
26.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 668 of 1551
RA4W1
26. WDT
26.3.1.2
0OFS0 WDT OFS0.WDTSTRT 0 WDT WDTCRWDT WDTRCR WDT WDTCSTPR OFS0
0OFS0 WDT
WDT OFS0.WDTTOPS[1:0]
WDT
WDT WDT_NMIUNDF
1
WDT OFS0.WDTRSTIRQSWDT
NMIER.WDTEN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 669 of 1551
RA4W1
26. WDT
26.4 OFS0.WDTSTRT = 0 OFS0.WDTRSTIRQS = 0 75%WDTCR.RPSS[1:0] = 10b 25%WDTCR.RPES[1:0] = 10b
100% 75%
50%
25% 0%
RES
H
High
L
H High L
H
High L
(WDT_NMIUNDF) High
H L
WDT High L
26.4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 670 of 1551
RA4W1
26. WDT
26.3.2 WDTCRWDTRCR WDTCSTPR
WDT WDTCRWDT WDTRCR WDT WDTCSTPR
WDTCRWDTRCR WDTCSTPR WDT 1 WDTCRWDTRCR WDTCSTPR WDT
26.5 WDTCR
RES
PCLKB
WDTCR
WDTCR
WDTCR
xxxxh
00F3h
3300h
33F3h
00F3h
WDTCR
26.5
WDTCR
00F3h
33F3h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 671 of 1551
RA4W1
26. WDT
26.3.3
WDT WDTRR 00h FFh 00h FFh WDTRR 00h FFh
WDTRR 00h FFh WDTRR WDTRR
FFh 00h
00h FFh
00hn - 1 00hn FFh
00h WDTRR FFh
23h00h FFh
00h 54hFFh
00h AAh00h FFh FFh
WDT WDTRR FFh 4 4 WDTRR FFh
26.6 PCLKB/64 WDT
PCLKB
WDTRR
WDTRR
WDTRR
00h 54h FFh 00h
(n + 1)h
00h FFh
FFh
00h FFh
(n)h
(n)h
(n - 1)h (n - 1)h 0FFFh
26.6
WDT WDTCR.CKS[3:0] = 0100bWDTCR.TOPS[1:0] = 01b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 672 of 1551
RA4W1
26. WDT
26.3.4
WDTRCR.RSTIRQS 1 0OFS0 WDT OFS0.WDTRSTIRQS 1 1
0
26.3.5
WDTRCR.RSTIRQS 0 0OFS0 WDT OFS0.WDTRSTIRQS 0 WDT_NMIUNDF 14.ICU
26.4
WDT
WDT_NMIUNDF
DTC
26.3.6
WDT WDT WDTSR.CNTVAL[13:0]
26.7 PCLKB/64 WDT
PCLKB
(n + 1)h
WDTSR.CNTVAL [13:0] (n + 1)h
WDTSR.CNTVAL [13:0]
WDTSR.CNTVAL [13:0]
xxxxh
(n)h (n)h
(n + 1)h
(n - 1)h
(n - 1)h
(n - 1)h
(n - 1)h
(n)h
(n)h
26.7
WDT WDTCR.CKS[3:0] = 0100bWDTCR.TOPS[1:0] = 01b
R01UH0883JJ0100 Rev.1.00 2020.08.31
0FFFh 0FFFh 0FFFh
Page 673 of 1551
RA4W1
26. WDT
26.3.7 0OFS0 WDT
26.5 0OFS0
OFS0 WDT 0 OFS07.2.1 0OFS0
26.5
0OFS0 WDT
OFS0
WDT
OFS0.WDTSTRT = 0
OFS0.WDTSTRT = 1
OFS0.WDTTOPS[1:0]
WDTCR.TOPS[1:0]
OFS0.WDTCKS[3:0]
WDTCR.CKS[3:0]
OFS0.WDTRPSS[1:0]
WDTCR.RPSS[1:0]
OFS0.WDTRPES[1:0]
WDTCR.RPES[1:0]
OFS0.WDTRSTIRQS
WDTRCR.RSTIRQS
OFS0.WDTSTPCTL
WDTCSTPR.SLCSTP
26.4 ELC
ELC WDT
WDTRCR.RSTIRQS WDTSR.REFEF (WDTSR.UNDFF) 1 19.ELC
26.5
26.5.1 ICU nIELSRn
WDT OFS0.WDTRSTIRQS = 0 WDTRCR.RSTIRQS = 0 ELSRm.ELS[7:0] = 25hICU n IELSRn.IELS[7:0] 25h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 674 of 1551
RA4W1
27. IWDT
27. IWDT
27.1
IWDT 14 IWDT MCU MCU IWDT
IWDT WDT
IWDT IWDTCLKPCLKB
IWDT
OFS0.IWDTSTPCTL
27.1 IWDT 27.1
27.1
IWDT
1
IWDT IWDTCLK
1 16 32 64 128 256
14
IWDTSR
OFS0.IWDTCKS[3:0] OFS0.IWDTTOPS[1:0] OFS0.IWDTRPSS[1:0] OFS0.IWDTRPES[1:0] OFS0.IWDTRSTIRQS
OFS0.IWDTSTPCTL
1.
PCLKB 4 �
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 675 of 1551
RA4W1
27. IWDT
IWDT IWDT IWDTCLK PCLKB 14 IWDTCLK
IWDTCLK
IWDTCLK IWDTCLK/16 IWDTCLK/32 IWDTCLK/64 IWDTCLK/128 IWDTCLK/256
IWDT
IWDT_NMIUNDF IWDT
14
0 (OFS0)
27.1
IWDT
IWDTSR IWDTRR
IWDTRRIWDT IWDTSRIWDT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 676 of 1551
RA4W1
27.2 27.2.1 IWDT IWDTRR
IWDT.IWDTRR 4004 4400h
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
27. IWDT
R/W
b7-b0
00h FFh
R/W
IWDTRR IWDT IWDTRR 00h FFh IWDT 0OFS0 IWDT OFS0.IWDTTOPS[1:0]
00h 00h 00h FFh 27.3.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 677 of 1551
RA4W1
27. IWDT
27.2.2 IWDT IWDTSR
IWDT.IWDTSR 4004 4404h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
REFEF UNDFF
CNTVAL[13:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b13-b0 b14
CNTVAL[13:0] UNDFF
b15
REFEF
0 1
0 1
1. 0
R/W
R
R/(W
1
R/(W
1
CNTVAL[13:0]
1
UNDFF
1 0 0 1
UNDFF (N + 2) IWDTCLK 2 PCLKB (N + 2) IWDTCLK N IWDTCKS[3:0]
IWDTCKS[3:0] = 0000b N=1 IWDTCKS[3:0]=0010b N= 16 IWDTCKS[3:0] = 0011b N = 32 IWDTCKS[3:0] = 0100b N = 64 IWDTCKS[3:0] = 1111b N = 128 IWDTCKS[3:0] = 0101b N = 256
REFEF
1 0 0 1
REFEF (N + 2) IWDTCLK 2 PCLKB (N + 2) IWDTCLK N IWDTCKS[3:0]
IWDTCKS[3:0] = 0000b N = 1 IWDTCKS[3:0] = 0010b N = 16 IWDTCKS[3:0] = 0011b N = 32 IWDTCKS[3:0] = 0100b N = 64 IWDTCKS[3:0] = 1111b N = 128 IWDTCKS[3:0] = 0101b N = 256
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 678 of 1551
RA4W1
27. IWDT
27.2.3 0OFS0
0OFS07.2.1 0 OFS0
IWDTTOPS[1:0] IWDT
IWDTCKS[3:0] 1 128 512 1024 2048
IWDTCLK IWDTCKS[3:0] IWDTTOPS[1:0]
27.2 IWDTCKS[3:0] IWDTTOPS[1:0] IWDTCLK
27.2
IWDTCKS[3:0] b7 b6 b5 b4 0 0 0 0
IWDTTOPS[1:0]
b1 b0
0
0
IWDTCLK/1
0
1
1
0
1
1
0 0 1 0
0
0
IWDTCLK/16
0
1
1
0
1
1
0 0 1 1
0
0
IWDTCLK/32
0
1
1
0
1
1
0 1 0 0
0
0
IWDTCLK/64
0
1
1
0
1
1
1 1 1 1
0
0
IWDTCLK/128
0
1
1
0
1
1
0 1 0 1
0
0
IWDTCLK/256
0
1
1
0
1
1
128 512 1024 2048 128 512 1024 2048 128 512 1024 2048 128 512 1024 2048 128 512 1024 2048 128 512 1024 2048
IWDTCLK
128 512 1024 2048 2048 8192 16384 32768 4096 16384 32768 65536 8192 32768 65536 131072 16384 65536 131072 262144 32768 131072 262144 524288
IWDTCKS[3:0] IWDT
IWDT IWDTCLK 1 16 32 64 128 256 IWDTTOPS[1:0] IWDT IWDTCLK 128 524288
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 679 of 1551
RA4W1
27. IWDT
IWDTRPES[1:0] IWDT
75%50%25%0%
IWDTRPSS[1:0] IWDT
100%75%50%25% 0%
IWDTRPSS[1:0]WDTRPES[1:0]IWDTTOPS[1:0] 27.3 27.2
27.3
IWDTTOPS[1:0]
b1
b0
0
0
128
007Fh
100%
75%
50%
25%
007Fh
005Fh
003Fh
001Fh
0
1
512
01FFh
01FFh
017Fh
00FFh
007Fh
1
0
1024
03FFh
03FFh
02FFh
01FFh
00FFh
1
1
2048
07FFh
07FFh
05FFh
03FFh
01FFh
IWDTRPSS[1:0]
b13
b12
1
1
1
0
0
1
0
0
IWDTRPES[1:0]
b9
b8
1
1
1
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
0
0
1
0
0
(%)
(%)
0
25 100
50
75
0
25 75
50
75
0
25 50
50
75
0
25 25
50
75
100%
75%
50%
25%
0%
. 0%
27.2
IWDTRPSS[1:0] IWDTRPES[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 680 of 1551
RA4W1
27. IWDT
IWDTRSTIRQS IWDT 1
0
IWDTSTPCTL IWDT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 681 of 1551
RA4W1
27. IWDT
27.3
27.3.1
0 IWDT OFS0.IWDTSTRT 0 IWDT
0OFS0 IWDT
IWDT OFS0.IWDTTOPS[1:0]
IWDT IWDT IWDT_NMIUNDF
1 IWDT OFS0.IWDTRSTIRQS IWDT NMIER.IWDTEN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 682 of 1551
RA4W1
27. IWDT
27.3 OFS0.IWDTSTRT = 0 OFS0.IWDTRSTIRQS = 0 75%OFS0.IWDTRPSS[1:0] = 10b 25%OFS0.IWDTRPES[1:0] = 10b
100% 75%
50%
25% 0%
RES
H
High
L
H
High
L
H
High L
(IWDT_NMIUNDF)
H
High L
IWDT High L
27.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 683 of 1551
RA4W1
27. IWDT
27.3.2
IWDT IWDTRR 00h FFh 00h FFh IWDT IWDTRR 00h FFh
00h1 00h2 FFh 00h FFh 00hn - 1 00hn FFh 00h 00h 00h FFh IWDTRR 00h FFh IWDTRR IWDTRR
00h FFh
00hn - 1 00hn FFh
00h IWDTRR FFh
23h00h FFh
00h 54hFFh
00h AAh00h FFh FFh
IWDTRR 00h IWDTRR FFh
IWDTRR FFh 4 1 IWDT IWDTCLK IWDT OFS0.IWDTCKS[3:0] 4 IWDTRR FFh IWDTSR.CNTVAL[13:0]
1FFFh IWDTSR.CNTVAL[13:0] 1FFFh 2002h IWDTRR 00h 1FFFh IWDTRR FFh
1FFFh IWDTRR 00h FFh IWDTSR.CNTVAL[13:0] 2003h1FFFh 4
0000h IWDTRR 00h FFh IWDTSR.CNTVAL[13:0] 0003h 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 684 of 1551
RA4W1
27. IWDT
27.4 PCLKB IWDTCLK IWDTCLK IWDT
PCLKB
IWDT IWDTCLK
IWDTRR
IWDTRR
IWDTRR
00h 54h FFh 00h
00h FFh
FFh
00h FFh
IWDTCLK
(n + 2)h
(n + 1)h
(n)h
(n - 1)h
(n - 2)h
(n - 3)h
3FFFh
27.4
IWDT OFS0.IWDTCKS[3:0] = 0000bOFS0.IWDTTOPS[1:0] = 11b
27.3.3
IWDTSR.REFEFIWDTSR.UNDFFIWDT IWDT IWDTSR.REFEF UNDFF 0 1
IWDT 0 3 IWDTCLK 2 PCLKB
27.3.4
0OFS0 IWDT OFS0.IWDTRSTIRQS 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 685 of 1551
RA4W1
27. IWDT
27.3.5
0OFS0 IWDT OFS0.IWDTRSTIRQS 0
IWDT_NMIUNDF 14.ICU
27.4
IWDT
IWDT_NMIUNDF
DTC
27.3.6
IWDT IWDT IWDTCLK IWDT PCLKBIWDT IWDTSR.CNTVAL[13:0] IWDTSR.CNTVAL[13:0]
PCLKB 4 1
27.5 PCLKB IWDTCLK IWDTCLK IWDT
PCLKB
IWDT IWDTCLK
(n + 1)h
IWDTSR.CNTVAL [13:0]
IWDTSR.CNTVAL [13:0]
IWDTSR.CNTVAL [13:0]
(n + 1)h xxxxh
IWDTCLK
(n)h
(n - 1)h
(n - 2)h
(n - 3)h
3FFFh
3FFEh
(n)h
(n - 1)h
(n - 2)h
(n - 3)h
3FFFh
(n + 1)h
(n)h
(n - 2)h
3FFFh
27.5
IWDT OFS0.IWDTCKS[3:0] = 0000bOFS0.IWDTTOPS[1:0] = 11b
27.4 ELC
ELCIWDT
OFS0.WDTRSTIRQS IWDTSR.REFEFIWDTSR.UNDFF 1 19. ELC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 686 of 1551
RA4W1
27. IWDT
27.5
27.5.1
PCLKB IWDTCLK
27.5.2
PCLKB 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 687 of 1551
RA4W1
28. USB2.0 USBFS
28. USB2.0 USBFS
28.1
MCU Universal Serial BusUSB2.0 USB2.0 USBFS USB2.0 USB2.0 USBFS USB USB2.0
USBFS FIFO 10 1 9
MCU 1.2
28.1 USBFS 28.1 28.2
28.1
USBFS
USB UDC USB2.0
1.2
12Mbps1.5Mbps SOF
12Mbps1.5Mbps SET_ADDRESS SOF
USB FIFO 10 1 9
064 1, 264
256 3 564 6 964
BRDYBFRE DnFIFOn = 0, 1 FIFO
DCLRM PID NAKSHTNAK USB_DP/USB_DM USBHOCO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 688 of 1551
RA4W1 28.1 USBFS
28. USB2.0 USBFS
USB_DP USB_DM
BC
LINK
USB
USB
FIFO
USB
USB48MHz
USB
1SRAM 16
FIFO
PCLKB
USB48MHz PCLKB
28.1
USBFS
28.2 USBFS
28.2
USBFS
USBFS
USB_DP
USB_DM
USB_VBUS
USB_VBUSEN USB_OVRCURA USB_OVRCURB VCC_USB VCC_USB_LDO
VSS_USB
USB D+ USB D+
USB D- USB D-
USB USB VBUSUSBFS VBUS 1
IC VBUS5V
USBFS
USB
USB VCC_USB
USB
1. P407 5V
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 689 of 1551
RA4W1
28. USB2.0 USBFS
28.2 28.2.1 SYSCFG
USBFS.SYSCFG 4009 0000h
b15 b14 b13 b12
--
--
--
--
0
0
0
0
b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
--
SCKE
--
CNEN
--
DCFM
DRPD
DPRPU
DMRP U
--
0
0
0
0
0
0
0
0
0
0
b1
b0
-- USBE
0
0
R/W
b0
USBE
USBFS
0
R/W
1
b2-b1
--
0 0
R/W
b3
DMRPU D- 1
0
R/W
1
b4
DPRPU D+ 1
0
R/W
1
b5
DRPD
D+/D-
0
R/W
1
b6
DCFM
0
R/W
1
b7
--
0 0
R/W
b8
CNEN
CNEN 0
R/W
1
b9
--
0 0
R/W
b10
SCKE
USB 2
0USBFS
R/W
1USBFS
b15-b11
--
0 0
R/W
1. 2.
DMRPU DPRPU SCKE 1 SCKE 1
USBE USBFS
USBFS
USBE 1 0 28.3 SCKE 1 DRPD 1 SYSSTS0.LNST[1:0] USB USBE 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 690 of 1551
RA4W1
28. USB2.0 USBFS
28.3
SYSCFG.USBE 0
SYSSTS0 DVSTCTR0 INTSTS0 USBREQ
USBVAL USBINDX USBLENG DVSTCTR0 FRMNUM
LNST[1:0] RHST[2:0] DVSQ[2:0]
BREQUEST[7:0] BMREQUESTTYPE[7:0] WVALUE[15:0] WINDEX[15:0] WLENTUH[15:0] RHST[2:0] FRNM[10:0]
--
--
DMRPU D- D- DMRPU 1 USBFS D-
USB DMRPU 1 0 USB
0
DPRPU D+ D+ DPRPU 1 USBFS D+
USB DPRPU 1 0 USB
0
DRPD D+/D- D+/D- 1 0
DCFM USBFS DMRPU DPRPU DRPD 0
CNEN CNEN CNEN 1 D+/D-
LNST CNEN USBFS
SCKE USB USB 48MHz 0 SYSCFG USB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 691 of 1551
RA4W1
28. USB2.0 USBFS
28.2.2 0SYSSTS0
USBFS.SYSSTS0 4009 0004h
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
OVCMON[1:0] --
--
--
--
--
--
-- HTACT --
--
--
--
LNST[1:0]
01 01 0
0
0
0
0
0
0
0
0
0
0
x
0
0
x
R/W
b1-b0
LNST[1:0]
USB USB 28.4
R
b2
--
R
b5-b3
--
0
R
b6
HTACT
USB 0
R
1
b13-b7
--
0
R
b15-b14 OVCMON[1:0] USB_OVRCURA/
OVCMON[1] USB_OVRCURA
R
USB_OVRCURB
OVCMON[0] USB_OVRCURB
1. USB_OVRCURA/USB_OVRCURB
LNST[1:0] USB USB D+ D- 28.4 LNST[1:0] SYSCFG.DPRPU
= 1SYSCFG.DRPD = 1
HTACT USB
USBFS HTACT 0 DVSTCTR0.UACT 0 USBFS Suspended SCKE 0 HTACT 0
OVCMON[1:0] USB_OVRCURA/USB_OVRCURB
IC
28.4
00b 01b 10b 11b
USBD+D-
LNST[1:0]
SE0
J-State
K-State
SE1
SE0 K-State J-State SE1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 692 of 1551
RA4W1
28. USB2.0 USBFS
28.2.3 0DVSTCTR0
USBFS.DVSTCTR0 4009 0008h
b15 b14 b13 b12 b11
--
--
--
--
--
0
0
0
0
0
b10 b9
b8
b7
b6
b5
b4
b3
--
VBUSE N
WKUP
RWUP E
USBRS T
RESU ME
UACT
--
0
0
0
0
0
0
0
0
b2
b1
b0
RHST[2:0]
0
0
0
R/W
b2-b0
RHST[2:0] USB
R
b2
b0
0 0 0
1 x xUSB
0 0 1
0 1 0
b3
--
b4
UACT
b5
RESUME
b6
USBRST
b7
RWUPE
b8
WKUP
b9
VBUSEN
b15-b10 -- x: Don't care
USB USB USB_VBUSEN
b2
b0
0 0 0
0 0 1USB
0 1 0USB
00
R/W
0SOF
R/W
1SOF
0
R/W
1
0USB
R/W
1USB
0
R/W
1
0
R/W
1
0 USB_VBUSEN Low
R/W
1 USB_VBUSEN High
00
R/W
RHST[2:0] USB
USB
USBRST 1 RHST[2:0] 100b USBRST 0 USBFS SE0 RHST[2:0]
USBFS USB DPRPU 1 RHST[2:0] 010b DMRPU 1 RHST[2:0] 001b DVST
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 693 of 1551
RA4W1
28. USB2.0 USBFS
UACT USB
UACT 1 UACT USB SOF USB UACT 1 1 USBFS SOF UACT 0 USB SOF
0 USB SOF
USB UACT 0
UACT 1 DTCH
UACT 1 EOFERR
USB USBRST 0 Suspended RESUME 0 UACT 1
0
RESUME
1 USBFS USB K-State RWUPE 1 USB Suspended USBFS 1
RESUME 1 RESUME 0 USBFS K-State RESUME 1 USB2.0 Suspended RESUME 1 RESUME 0 UACT 1
0
USBRST USB
USB USBRST 1 USBFS USB SE0 USB USBFS USBRST 1 USBRST 1 SE0 USBRST 1 USB USB2.0
UACT = 1RESUME = 1 1 UACT RESUME 0 USBFS USB USB USBRST 0 UACT 1
0
RWUPE
1 USBFS 2.5s K-State K-State
0 USBFS USB K-StateRWUPE 1 Suspended SYSCFG.SCKE 1
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 694 of 1551
RA4W1
28. USB2.0 USBFS
WKUP
USB
USBFS WKUP 1 USBFS 10ms K-State 0 USB2.0 5ms USB USB Suspended 1 2ms K-State
1 Suspended INTSTS0.DVSQ[2:0] = 1xxb USB 1 Suspended SYSCFG.SCKE 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 695 of 1551
RA4W1
28. USB2.0 USBFS
28.2.4
CFIFO CFIFO/CFIFOL D0FIFO D0FIFO/D0FIFOL D1FIFO D1FIFO/D1FIFOL
1MBW 1
USBFS.CFIFO 4009 0014h, USBFS.D0FIFO 4009 0018h, USBFS.D1FIFO 4009 001Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
FIFOPORT[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2MBW 0
USBFS.CFIFOL 4009 0014h, USBFS.D0FIFOL 4009 0018h, USBFS.D1FIFOL 4009 001Ch
b7
b6
b5
b4
b3
b2
b1
b0
FIFOPORT[7:0]
0
0
0
0
0
0
0
0
b15-b0
FIFOPORT[15:0]
1
FIFO
R/W
FIFO R/W FIFO
1.
MBW CFIFOSEL.MBWD0FIFOSEL.MBWD1FIFOSEL.MBW BIGEND CFIFOSEL.BIGENDD0FIFOSEL.BIGENDD1FIFOSEL.BIGEND 28.5 28.6
3 FIFO CFIFO D0FIFO D1FIFO FIFO FIFO FIFO
CFIFOD0FIFO D1FIFO FIFO CFIFOSELD0FIFOSEL
D1FIFOSEL CFIFOCTRD0FIFOCTR D1FIFOCTR FIFO DCP FIFO CFIFO DMA DTC FIFO D0FIFO D1FIFO D0FIFO D1FIFO CPU DMA DTC FIFO
CURPIPE[3:0] 1 FIFO FIFO FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 696 of 1551
RA4W1
28. USB2.0 USBFS
FIFO CPU SIESerial Interface Engine 2 SIE CPU FIFO
FIFOPORT[15:0] FIFO
FIFOPORT[15:0] USBFS FIFO FIFO FIFO CFIFOCTRD0FIFOCTR D1FIFOCTR FRDY 1
FIFO CFIFOSELD0FIFOSEL D1FIFOSEL MBW BIGEND 28.5 28.6
28.5
16
CFIFOSEL.BIGEND D0FIFOSEL.BIGEND D1FIFOSEL.BIGEND
0
1
N + 1 N + 0
15 8
7 0 N + 0 N + 1
28.6
8
CFIFOSEL.BIGEND D0FIFOSEL.BIGEND D1FIFOSEL.BIGEND
0
1
15 8 1 1
1.
7 0 N + 0 N + 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 697 of 1551
RA4W1
28. USB2.0 USBFS
28.2.5
CFIFO CFIFOSEL D0FIFO D0FIFOSEL D1FIFO D1FIFOSEL
CFIFOSEL
USBFS.CFIFOSEL 4009 0020h
b15 b14 b13 b12 b11 b10 b9
b8
b7
RCNT REW --
--
--
MBW
--
BIGEN D
--
0
0
0
0
0
0
0
0
0
b6
b5
b4
-- ISEL --
0
0
0
b3
b2
b1
b0
CURPIPE[3:0]
0
0
0
0
b3-b0 CURPIPE[3:0] CFIFO
b4
--
b5
ISEL
b7-b6 b8
-- BIGEND
b9
--
b10
MBW
b13-b11 --
b14
REW
b15
RCNT
DCP CFIFO CFIFO
CFIFO
1. 0
b3
b0
0 0 0 0DCP
0 0 0 1 1
0 0 1 0 2
0 0 1 1 3
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6
0 1 1 1 7
1 0 0 0 8
1 0 0 1 9
0 0
0 1
0 0
0 1
0 0
08 116
0 0
0 1
0CFIFO DTLN[8:0] CFIFOCTR.DTLN[8:0] D0FIFOCTR.DTLN[8:0]D1FIFOCTR.DTLN[8:0]
1 DTLN[8:0] 1CFIFO DTLN[8:0]
R/W R/W
R/W R/W R/W R/W R/W R/W R/W R/W
1
R/W
CFIFOSELD0FIFOSEL D1FIFOSEL CURPIPE[3:0] D0FIFOSEL D1FIFOSEL CURPIPE[3:0] 0000b
DMA DTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 698 of 1551
RA4W1
28. USB2.0 USBFS
CURPIPE[3:0] CFIFO
CFIFO
CFIFOSELD0FIFOSEL D1FIFOSEL CURPIPE[3:0]
FIFO CURPIPE[3:0] CURPIPE[3:0]
ISEL DCP CFIFO
DCP ISEL ISEL ISEL CURPIPE[3:0]
MBW CFIFO
CFIFO
CURPIPE[3:0] MBW FIFO FIFO MBW
8 16
16
REW
FIFO 1 FIFO FIFO
CURPIPE[3:0] 1 REW 1 FRDY 1
FIFO BCLR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 699 of 1551
RA4W1
28. USB2.0 USBFS
D0FIFOSELD1FIFOSEL
USBFS.D0FIFOSEL 4009 0028h, USBFS.D1FIFOSEL 4009 002Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
RCNT REW DCLRM DREQE --
MBW
--
BIGEN D
--
--
--
--
CURPIPE[3:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b3-b0
b7-b4 b8 b9 b10 b11 b12 b13 b14 b15
CURPIPE[3:0]
-- BIGEND -- MBW -- DREQE DCLRM REW RCNT
FIFO
FIFO FIFO DMA/DTC
b3
b0
0 0 0 0
0 0 0 11
0 0 1 02
0 0 1 13
0 1 0 04
0 1 0 15
0 1 1 06
0 1 1 17
1 0 0 08
1 0 0 19
0 0
0 1
0 0
08 116
0 0
0DMA/DTC 1DMA/DTC
0 1
0 1
0DnFIFO DTLN[8:0] CFIFOCTR.DTLN[8:0] D0FIFOCTR.DTLN[8:0]D1FIFOCTR.DTLN[8:0]
1
DTLN 1DnFIFO DTLN[8:0]
n = 0, 1
R/W R/W
R/W R/W R/W R/W R/W R/W R/W
R/W
1
R/W
1. 0
CFIFOSELD0FIFOSELD1FIFOSEL CURPIPE[3:0] D0FIFOSEL D1FIFOSEL CURPIPE[3:0] 0000b DMA DTC
CURPIPE[3:0] FIFO
D0FIFO D1FIFO CFIFOSELD0FIFOSEL D1FIFOSEL CURPIPE[3:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 700 of 1551
RA4W1
28. USB2.0 USBFS
FIFO CURPIPE[3:0] CURPIPE[3:0]
MBW FIFO
D0FIFO D1FIFO
FIFO FIFO MBW CURPIPE[3:0] MBW
FIFO 8 16
16
DREQE DMA/DTC
DREQE DMA DTC DMA DTC CURPIPE[3:0] 1 CURPIPE[3:0] 0
DCLRM
FIFO
1 FIFO Zero-Length PIPECFG.BFRE 1 USBFS FIFO BCLR 1
SOFCFG.BRDYM 1 USBFS DCLRM 0
REW
FIFO 1 FIFO FIFO
CURPIPE[3:0] 1 1 FRDY 1
FIFO BCLR
RCNT
CFIFOCTR.DTLN PIPECFG.BFRE 1 DnFIFO RCNT 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 701 of 1551
RA4W1
28. USB2.0 USBFS
28.2.6
CFIFO CFIFOCTR D0FIFO D0FIFOCTR D1FIFO D1FIFOCTR
USBFS.CFIFOCTR 4009 0022h, USBFS.D0FIFOCTR 4009 002Ah, USBFS.D1FIFOCTR 4009 002Eh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
BVAL BCLR FRDY --
--
--
--
DTLN[8:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b8-b0
b12-b9 b13 b14 b15
DTLN[8:0]
-- FRDY BCLR BVAL
FIFO CPU
RCNT DTLN[8:0]
00
0FIFO 1FIFO
0 1CPU FIFO
0 1
R/W R
R/W R
R/W
1
R/W
1. 0
CFIFOCTRD0FIFOCTR D1FIFOCTR CFIFOD0FIFO D1FIFO
DTLN[8:0]
FIFO DTLN[8:0] DnFIFOSEL.RCNT n = 0, 1
RCNT = 0 CPU DMAC/DTC FIFO 1 USBFS DTLN[8:0] PIPECFG.BFRE 1 BCLR 1 USB
RCNT = 1 FIFO USBFS DTLN[8:0] MBW 0 - 1 MBW 1 - 2 1 FIFO USBFS DTLN[8:0] 0 FIFO 1 1 FIFO USBFS 1 1 DTLN[8:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 702 of 1551
RA4W1
28. USB2.0 USBFS
FRDY FIFO
CPU DMAC/DTC FIFO
USBFS FRDY 1 FIFO
FIFO Zero-Length
PIPECFG.BFRE 1
BCLR 1 FIFO
BCLR CPU
CPU FIFO BCLR 1
FIFO FIFO USBFS
DCP CPU SIE BCLR 1 USBFS FIFO SIE FIFO DCPCTR.PID[1:0] 00bNAK BCLR 1
BVAL BCLR 1 USBFS Zero-Length
DCP BCLR 1 FIFO FRDY USBFS 1
BVAL
CURPIPE[3:0] CPU FIFO BVAL 1
1
1
Zero-Length FIFO 1
USBFS CPU FIFO SIE
USBFS BVAL 1 FIFO CPU SIE
BVAL 1 FRDY USBFS 1 BVAL 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 703 of 1551
RA4W1
28. USB2.0 USBFS
28.2.7 0INTENB0
USBFS.INTENB0 4009 0030h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
VBSE RSME SOFE DVSE CTRE BEMPE NRDYE BRDYE --
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b7-b0 b8 b9 b10 b11 b12 b13 b14 b15
R/W
--
00 R/W
BRDYE
0
R/W
1
NRDYE
0
R/W
1
BEMPE
0
R/W
1
CTRE
0
R/W
1
1
DVSE
1
0
R/W
1
SOFE
0
R/W
1
RSME
1
0
R/W
1
VBSE
VBUS
0
R/W
1
1.
RSMEDVSE CTRE 1 1
INTSTS0 1 INTENB0 1 USBFS USBFS
INTENB0 INTSTS0 1
INTSTS0 1 INTENB0 0 1 USBFS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 704 of 1551
RA4W1
28. USB2.0 USBFS
28.2.8 1INTENB1
USBFS.INTENB1 4009 0032h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
OVRC RE
BCHGE
--
DTCHE
ATTCH E
--
--
--
--
EOFER RE
SIGNE
SACKE
--
--
--
PDDET INTE0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
PDDETINTE0 PDDETINT0
0
R/W
1
b3-b1 --
00 R/W
b4
SACKE
SETUP 0
R/W
1
b5
SIGNE
SETUP 0
R/W
1
b6
EOFERRE
EOF
0
R/W
1
b10-b7 --
00 R/W
b11
ATTCHE
0
R/W
1
b12
DTCHE
0
R/W
1
b13
--
00 R/W
b14
BCHGE
USB
0
R/W
1
b15
OVRCRE
0
R/W
1
.
INTENB1 1 1
INTENB1 SETUP
INTSTS1 1 INTENB1 1 USBFS USBFS
INTENB1 INTSTS1 1
INTSTS1 1 INTENB1 0 1 USBFS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 705 of 1551
RA4W1
28. USB2.0 USBFS
28.2.9 BRDY BRDYENB
USBFS.BRDYENB 4009 0036h
b15 b14 b13 b12 b11
--
--
--
--
--
0
0
0
0
0
b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
PIPE9B PIPE8B PIPE7B PIPE6B PIPE5B PIPE4B PIPE3B PIPE2B PIPE1B PIPE0B RDYE RDYE RDYE RDYE RDYE RDYE RDYE RDYE RDYE RDYE
0
0
0
0
0
0
0
0
0
0
0
b0
PIPE0BRDYE 0 BRDY
b1
PIPE1BRDYE 1 BRDY
b2
PIPE2BRDYE 2 BRDY
b3
PIPE3BRDYE 3 BRDY
b4
PIPE4BRDYE 4 BRDY
b5
PIPE5BRDYE 5 BRDY
b6
PIPE6BRDYE 6 BRDY
b7
PIPE7BRDYE 7 BRDY
b8
PIPE8BRDYE 8 BRDY
b9
PIPE9BRDYE 9 BRDY
b15-b10 --
R/W
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
00 R/W
BRDYENB BRDY INTSTS0.BRDY 1
BRDYSTS 1 BRDYENB PIPEnBRDYE n = 0 9 1 INTSTS0.BRDY 1 INTENB0 BRDYE 1 USBFS BRDY
PIPEnBRDY 1 1 BRDYENB 0 1 USBFS BRDY
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 706 of 1551
RA4W1
28. USB2.0 USBFS
28.2.10 NRDY NRDYENB
USBFS.NRDYENB 4009 0038h
b15 b14 b13 b12 b11
--
--
--
--
--
0
0
0
0
0
b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
PIPE9N PIPE8N PIPE7N PIPE6N PIPE5N PIPE4N PIPE3N PIPE2N PIPE1N PIPE0N RDYE RDYE RDYE RDYE RDYE RDYE RDYE RDYE RDYE RDYE
0
0
0
0
0
0
0
0
0
0
0
b0
PIPE0NRDYE
0 NRDY
b1
PIPE1NRDYE 1 NRDY
b2
PIPE2NRDYE 2 NRDY
b3
PIPE3NRDYE 3 NRDY
b4
PIPE4NRDYE 4 NRDY
b5
PIPE5NRDYE 5 NRDY
b6
PIPE6NRDYE 6 NRDY
b7
PIPE7NRDYE 7 NRDY
b8
PIPE8NRDYE 8 NRDY
b9
PIPE9NRDYE 9 NRDY
b15-b10 --
R/W
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
00 R/W
NRDYENB NRDY INTSTS0.NRDY 1
NRDYSTS 1 NRDYENB PIPEnNRDYE n = 0 9 1 INTSTS0.NRDY 1 INTENB0 NRDYE 1 USBFS NRDY
PIPEnNRDY 1 1 NRDYENB 0 1 USBFS NRDY
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 707 of 1551
RA4W1
28. USB2.0 USBFS
28.2.11 BEMP BEMPENB
USBFS.BEMPENB 4009 003Ah
b15 b14 b13 b12 b11
--
--
--
--
--
0
0
0
0
0
b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
PIPE9B PIPE8B PIPE7B PIPE6B PIPE5B PIPE4B PIPE3B PIPE2B PIPE1B PIPE0B EMPE EMPE EMPE EMPE EMPE EMPE EMPE EMPE EMPE EMPE
0
0
0
0
0
0
0
0
0
0
0
b0
PIPE0BEMPE
0 BEMP
b1
PIPE1BEMPE 1 BEMP
b2
PIPE2BEMPE 2 BEMP
b3
PIPE3BEMPE 3 BEMP
b4
PIPE4BEMPE 4 BEMP
b5
PIPE5BEMPE 5 BEMP
b6
PIPE6BEMPE 6 BEMP
b7
PIPE7BEMPE 7 BEMP
b8
PIPE8BEMPE 8 BEMP
b9
PIPE9BEMPE 9 BEMP
b15-b10 --
R/W
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
0
R/W
1
00 R/W
BEMPENB BEMP INTSTS0.BEMP 1
BEMPSTS 1 BEMPENB PIPEnBEMPE n = 0 9 1 INTSTS0.BEMP 1 INTENB0 BEMPE 1 USBFS BEMP
PIPEnBEMP 1 1 BEMPENB 0 1 USBFS BEMP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 708 of 1551
RA4W1
28. USB2.0 USBFS
28.2.12 SOF SOFCFG
USBFS.SOFCFG 4009 003Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
TRNEN SEL
--
BRDY M
--
EDGES TS
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b3-b0 b4
b5 b6
b7 b8
b15-b9
R/W
--
0 0
R/W
EDGESTS 1 R
1
--
0 0
R/W
BRDYM
BRDY 0BRDY
R/W
1FIFO
USBFS BRDY
--
0 0
R/W
TRNENSEL 0
R/W
1
1
--
0 0
R/W
1. USBFS 0
EDGESTS 1 USBFS
0
BRDYM BRDY BRDY
TRNENSEL USB 1 USBFS
1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 709 of 1551
RA4W1
28. USB2.0 USBFS
28.2.13 0INTSTS0
USBFS.INTSTS0 4009 0040h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
VBINT RESM SOFR DVST CTRT BEMP NRDY BRDY VBSTS
DVSQ[2:0]
VALID
0
0
0
0/1
1
0
0
0
0
0 2
0 3
0 3
0/1
3
0
b2
b1
b0
CTSQ[2:0]
0
0
0
b2-b0 CTSQ[2:0]
b3
VALID
USB
b6-b4 DVSQ[2:0]
b7
VBSTS
VBUS
b8
BRDY
b9
NRDY
b10 BEMP
b11
CTRT
b12 DVST
b13 SOFR
b14 RESM
b15 VBINT
5
5
5 6
VBUS
6
b2
b0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
0Setup 1Setup
b6
b4
0 0 0Powered
0 0 1Default
0 1 0Address
0 1 1Configured
1 x xSuspended
0USB_VBUS Low 1USB_VBUS High
0BRDY 1BRDY
0NRDY 1NRDY
0BEMP 1BEMP
0 1
0 1
0SOF 1SOF
0 1
0VBUS 1VBUS
R/W R
R/W
4
R
R R R R R/W
4
R/W
4
R/W
4
R/W
4
R/W
4
x: Don't care
1. MCU 0USB 1
2. USB_VBUS High 1Low 0
3. MCU 000bUSB 001b
4. VBINTRESMSOFRDVSTCTRT VALID 0
1 0 0
5.
RESMDVST CTRT
0
6. USBFS VBINT RESM SCKE = 0
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 710 of 1551
RA4W1
28. USB2.0 USBFS
CTSQ[2:0]
CTSQ[2:0]
VALID USB
VALID
DVSQ[2:0]
USB DVSQ[2:0]
BRDY
BRDY
BRDY BRDYENB.PIPEnBRDYE = 1 1 USBFS BRDY PIPEnBRDY = 1n = 0 9BRDY 1
PIPEnBRDY 28.3.3.1BRDY
1 PIPEnBRDYE PIPEnBRDY 0 USBFS BRDY 0 BRDY 0 BRDY 0
NRDY
1 PIPEnNRDYE n = 0 9 PIPENRDY 1 PIPEnNRDY n = 0 9 1 NRDY 1 USBFS NRDY USBFS NRDY 1
PIPEnNRDY 28.3.3.2NRDY
1 PIPEnNRDYE PIPEnNRDY 0 USBFS NRDY 0 NRDY 0 NRDY 0
BEMP
BEMP
BEMP BEMPENB.PIPEnBEMPE = 1 1 USBFS BEMP PIPEnBEMP = 1n = 0 9BEMP 1
PIPEnBEMP 28.3.3.3BEMP
1 PIPEnBEMPE PIPEnBEMP 0 USBFS BEMP 0 BEMP 0 BEMP
CTRT
USBFS CTSQ[2:0] CTRT 1 USBFS CTRT
CTRT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 711 of 1551
RA4W1
28. USB2.0 USBFS
DVST
USBFS DVSQ[2:0] DVST 1 USBFS DVST
DVST
SOFR
DVSTCTR0.UACT 1 USBFS SOFR 1 SOFR 1ms
USBFS SOFR 1 SOFR 1ms
USB SOF USBFS SOFR
RESM
USBFS Suspended DVSQ[2:0] = 1xxb USB_DP RESM 1 RESM
VBINT VBUS
USBFS USB_VBUS High Low Low High VBINT 1 USBFS USB_VBUS VBSTS VBUS VBSTS 3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 712 of 1551
RA4W1
28. USB2.0 USBFS
28.2.14 1INTSTS1
USBFS.INTSTS1 4009 0042h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
OVRC R
BCHG
--
DTCH ATTCH --
--
--
--
EOFER R
SIGN
SACK
--
--
--
PDDET INT0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
PDDETINT0
b3-b1 b4
-- SACK
b5
SIGN
b6
EOFERR
b10-b7 b11
-- ATTCH
b12
DTCH
b13
--
b14
BCHG
b15
OVRCR
PDDET0
0PDDET0 1PDDET0
0 0
SETUP 0SACK
1SACK
SETUP 0SIGN
1SIGN
EOF
0EOFERR 1EOFERR
0 0
ATTCH
0ATTCH 1ATTCH
USB 0DTCH 1DTCH
0 0
USB 2 0BCHG 1BCHG
0OVRCR
2
1OVRCR
R/W
R/W
1
R/W
R/W
1
R/W
1
R/W
1
R/W
R/W
1
R/W
1
R/W
R/W
1
R/W
1
1. 2.
INTSTS1 0 0 1
USBFS OVRCR BCHG SYSCFG.SCKE = 0 1 SYSCFG.SCKE = 1SYSCFG.SCKE = 0
INTSTS1 INTSTS1
PDDETINT0 PDDET0
USBFS USB PHY VDPDET High Low Low High 1 USBFS VDPDET PDDETSTS0 PDDETINT PDDETSTS0 3
SACK SETUP
SETUP
USBFS SETUP ACK USBFS SACK 1 1 USBFS
SACK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 713 of 1551
RA4W1
28. USB2.0 USBFS
SIGN SETUP SETUP USBFS SETUP ACK 3
USBFS SIGN 1 1 USBFS
3 SETUP USBFS SIGN
USBFS
ACK
ACK NAKNYET STALL
SIGN
EOFERR EOF EOFERR USBFS USB2.0 EOF2
EOFERR 1 1 USBFS
EOFERR USBFS
EOFERR DVSTCTR0.UACT 0
EOFERR
USB
EOFERR
ATTCH ATTCH USB USBFS J-State K-State 2.5s
ATTCH 1 1 USBFS
USBFS ATTCH K-StateSE0 SE1 J-State J-State 2.5s
J-StateSE0 SE1 K-State K-State 2.5s
ATTCH
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 714 of 1551
RA4W1
28. USB2.0 USBFS
DTCH USB
USB
USBFS USB DTCH 1 1 USBFS
USBFS USB2.0
DTCH USBFS
DTCH DVSTCTR0.UACT 0
DTCH
USB ATTCH
DTCH
BCHG USB
USB
USB USBFS BCHG 1 J-StateK-State SE0 J-StateKState SE0 1 USBFS
USBFS USB LNST[1:0] BCHG 3 LNST[1:0]
USB
BCHG
OVRCR
USB_OVRCURA USB_OVRCURB
USB_OVRCURA USB_OVRCURB High Low Low HighUSBFS OVRCR 1 1 USBFS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 715 of 1551
RA4W1
28. USB2.0 USBFS
28.2.15 BRDY BRDYSTS
USBFS.BRDYSTS 4009 0046h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
PIPE9B PIPE8B PIPE7B PIPE6B PIPE5B PIPE4B PIPE3B PIPE2B PIPE1B PIPE0B RDY RDY RDY RDY RDY RDY RDY RDY RDY RDY
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b15-b10
PIPE0BRDY PIPE1BRDY PIPE2BRDY PIPE3BRDY PIPE4BRDY PIPE5BRDY PIPE6BRDY PIPE7BRDY PIPE8BRDY PIPE9BRDY --
R/W
0 BRDY2 0 1
R/W
1
1 BRDY2 0 1
R/W
1
2 BRDY2 0 1
R/W
1
3 BRDY2 0 1
R/W
1
4 BRDY2 0 1
R/W
1
5 BRDY2 0 1
R/W
1
6 BRDY2 0 1
R/W
1
7 BRDY2 0 1
R/W
1
8 BRDY2 0 1
R/W
1
9 BRDY2 0 1
R/W
1
00 R/W
1. 2.
SOFCFG.BRDYM 0 BRDYSTS 0 1 SOFCFG.BRDYM 0 BRDY FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 716 of 1551
RA4W1
28. USB2.0 USBFS
28.2.16 NRDY NRDYSTS
USBFS.NRDYSTS 4009 0048h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
PIPE9N PIPE8N PIPE7N PIPE6N PIPE5N PIPE4N PIPE3N PIPE2N PIPE1N PIPE0N RDY RDY RDY RDY RDY RDY RDY RDY RDY RDY
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
PIPE0NRDY
b1
PIPE1NRDY
b2
PIPE2NRDY
b3
PIPE3NRDY
b4
PIPE4NRDY
b5
PIPE5NRDY
b6
PIPE6NRDY
b7
PIPE7NRDY
b8
PIPE8NRDY
b9
PIPE9NRDY
b15-b10 --
0 NRDY 1 NRDY 2 NRDY 3 NRDY 4 NRDY 5 NRDY 6 NRDY 7 NRDY 8 NRDY 9 NRDY
0 1
0 1
0 1
0 1
0 1
0 1
0 1
0 1
0 1
0 1
0 0
R/W
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1.
NRDYSTS 0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 717 of 1551
RA4W1
28. USB2.0 USBFS
28.2.17 BEMP BEMPSTS
USBFS.BEMPSTS 4009 004Ah
b15 b14 b13 b12 b11
--
--
--
--
--
0
0
0
0
0
b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
PIPE9B PIPE8B PIPE7B PIPE6B PIPE5B PIPE4B PIPE3B PIPE2B PIPE1B PIPE0B EMP EMP EMP EMP EMP EMP EMP EMP EMP EMP
0
0
0
0
0
0
0
0
0
0
0
b0
PIPE0BEMP
b1
PIPE1BEMP
b2
PIPE2BEMP
b3
PIPE3BEMP
b4
PIPE4BEMP
b5
PIPE5BEMP
b6
PIPE6BEMP
b7
PIPE7BEMP
b8
PIPE8BEMP
b9
PIPE9BEMP
b15-b10 --
0 BEMP 1 BEMP 2 BEMP 3 BEMP 4 BEMP 5 BEMP 6 BEMP 7 BEMP 8 BEMP 9 BEMP
0 1
0 1
0 1
0 1
0 1
0 1
0 1
0 1
0 1
0 1
0 0
R/W
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1.
BEMPSTS 0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 718 of 1551
RA4W1
28. USB2.0 USBFS
28.2.18 FRMNUM
USBFS.FRMNUM 4009 004Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
OVRN CRCE --
--
--
FRNM[10:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b10-b0 b13-b11 b14
FRNM[10:0] -- CRCE
b15
OVRN
0 0
0 1
0 1
R/W
R
R/W
R/W
1
R/W
1
1. 0 1
FRNM[10:0]
FRNM[10:0] 1ms SOF SOF FRNM[10:0] USBFS
CRCE
CRC CRCE 1 CRC USBFS NRDY
CRCE 0 FRMNUM 1
OVRN
OVRN 1 OVRN 0 FRMNUM 1
OVRN 1
FIFO OUT
FIFO IN
OVRN 1
FIFO IN
FIFO OUT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 719 of 1551
RA4W1
28. USB2.0 USBFS
28.2.19 USB USBREQ
USBFS.USBREQ 4009 0054h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
BREQUEST[7:0]
BMREQUESTTYPE[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b7-b0
BMREQUESTTYPE[7:0]
b15-b8 BREQUEST[7:0]
USB bmRequestType
USB bRequest
R/W
R/W
1
R/W
1
1.
USBREQ
USBREQ bRequest bmRequestType bRequest bmRequestType
USBREQ USB
BMREQUESTTYPE[7:0]
USB bmRequestType
SETUP USB DCPCTR.SUREQ 1
SETUP USB
BREQUEST[7:0]
USB bRequest
SETUP USB DCPCTR.SUREQ 1
SETUP USB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 720 of 1551
RA4W1
28. USB2.0 USBFS
28.2.20 USB USBVAL
USBFS.USBVAL 4009 0056h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
WVALUE[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15-b0 WVALUE[15:0]
USBwValue
R/W
R/W
1
1.
USBVAL wValue wValue
USBVAL USB
WVALUE[15:0]
USB wValue
SETUP USB wValue DCPCTR.SUREQ 1
SETUP USB wValue
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 721 of 1551
RA4W1
28. USB2.0 USBFS
28.2.21 USB USBINDX
USBFS.USBINDX 4009 0058h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
WINDEX[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15-b0 WINDEX[15:0]
USB wIndex
R/W
R/W
1
1.
USBINDX
USBINDX wIndex wIndex
USBINDX USB
WINDEX[15:0]
USB
SETUP USB wIndex DCPCTR.SUREQ 1
SETUP USB wIndex
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 722 of 1551
RA4W1
28. USB2.0 USBFS
28.2.22 USB USBLENG
USBFS.USBLENG 4009 005Ah
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
WLENTUH[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15-b0
WLENTUH[15:0]
USBwLength
R/W
R/W
1
1.
USBLENG
wLength wLength
USBLENG USB
WLENTUH[15:0]
USB wLength
SETUP USB wLength DCPCTR.SUREQ 1
SETUP USB wLength
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 723 of 1551
RA4W1
28. USB2.0 USBFS
28.2.23 DCP DCPCFG
USBFS.DCPCFG 4009 005Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
SHTNA K
--
--
DIR
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b3-b0
--
0 0
R/W
b4
DIR
1
0 1
R/W
b6-b5
--
0 0
R/W
b7
SHTNAK
1 0
R/W
1
b15-b8
--
0 0
R/W
1.
PID = NAK DCPCTR.PBUSY 0 DCP DCPCTR.PID[1:0] BUF NAK USBFS PID[1:0] NAK PBUSY
DIR
DIR 0
SHTNAK
PID NAK
SHTNAK 1 USBFS DCP DCPCTR.PID[1:0] NAK USBFS
Zero-Length
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 724 of 1551
RA4W1
28. USB2.0 USBFS
28.2.24 DCP DCPMAXP
USBFS.DCPMAXP 4009 005Eh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
DEVSEL[3:0]
--
--
--
--
--
MXPS[6:0]
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
b6-b0
MXPS[6:0]
1
b11-b7 b15-b12
--
DEVSEL[3:0] 2
R/W
DCP R/W
b6
b0
0 0 0 1 0 0 08
0 0 1 0 0 0 016
0 0 1 1 0 0 024 0 1 0 0 0 0 032
0 1 0 1 0 0 040
0 1 1 0 0 0 048 0 1 1 1 0 0 056
1 0 0 0 0 0 064
1 0 0 1 0 0 072 1 0 1 0 0 0 080 1 0 1 1 0 0 088
1 1 0 0 0 0 096 1 1 0 1 0 0 0104 1 1 1 0 0 0 0112
1 1 1 1 0 0 0120
0 0
R/W
b15
b12
0 0 0 0 0000
R/W
0 0 0 1 0001
0 0 1 0 0010
0 0 1 1 0011
0 1 0 0 0100
0 1 0 1 0101
1. 2.
MXPS[6:0] PID = NAK DCPCTR.PBUSY 0 DCP DCPCTR.PID[1:0] BUF NAK USBFS PID[1:0] NAK PBUSY MXPS[6:0] CURPIPE[3:0] DCP BCLR 1 DEVSEL[3:0] PID = NAK DCPCTR.SUREQ 0 DCPCTR.PBUSY 0 DCP DCPCTR.PID[1:0] BUF NAK USBFS PID[1:0] NAK PBUSY
MXPS[6:0]
DCP 40h64 USB2.0 MXPS[6:0] 0 FIFO PID = BUF
DEVSEL[3:0]
DEVADDnn = 0 5 DEVSEL[3:0] 0010b DEVADD2
0000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 725 of 1551
RA4W1
28. USB2.0 USBFS
28.2.25 DCP DCPCTR
USBFS.DCPCTR 4009 0060h
b15 b14 b13
BSTS SUREQ --
0
0
0
b12 b11 b10
--
SUREQ CLR
--
0
0
0
b9
b8
b7
b6
b5
b4
--
SQCLR
SQSET
SQMO N
PBUSY
--
0
0
0
1
0
0
b3
b2
b1
b0
-- CCPL
PID[1:0]
0
0
0
0
b1-b0
b2 b4-b3 b5 b6 b7
b8
b10-b9 b11
b13-b12 b14
b15
PID[1:0]
PID
CCPL -- PBUSY SQMON SQSET
SQCLR
2
2
--
SUREQCLR SUREQ
-- SUREQ
SETUP
BSTS
R/W
b1 b0
0 0NAK 0 1BUF 1 0STALL 1 1STALL
R/W
0
R/W
1
00
R/W
0DCP
R
1DCP
0DATA0
R
1DATA1
DCP 00 1 DATA1
R/W
1
DCP 00 1 DATA0 0
R/W
1
00
R/W
SUREQ R/W 00 1SUREQ 0 0
00
R/W
R/W
00
1Setup
0
R
1
1. 2.
0 PID = NAK SQSET SQCLR 1 PBUSY 0 DCP PID[1:0] BUF NAK USBFS PID[1:0] NAK PBUSY
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 726 of 1551
RA4W1
28. USB2.0 USBFS
PID[1:0] PID
USBFS
PID[1:0] NAK BUF
a. DVSTCTR0.UACT 1PID = NAK FIFO
b. PID[1:0] 01bBUF USBFS OUT
a. DVSTCTR0.UACT 1PID = NAK FIFO
PID[1:0] 01bBUF USBFS IN
USBFS PID[1:0]
PID[1:0] BUF01bUSBFS MaxPacketSize PID[1:0] STALL11b
CRC 3 USBFS PID[1:0] NAK00b
STALL USBFS PID[1:0] STALL11b
USBFS PID[1:0]
Setup USBFS PID[1:0] NAK00bUSBFS INTSTS0.VALID 1 VALID 0 PID[1:0]
PID[1:0] BUF01bUSBFS MaxPacketSize PID[1:0] STALL11b
USBFS PID[1:0] STALL1xb
USBFS USBFS PID[1:0] NAK
USBFS SET_ADDRESS PID[1:0]
PID[1:0] USB
CCPL
CCPL 1 PID[1:0] BUF CCPL 1 USBFS
USBFS USB OUT ACK USBFS USB IN Zero-Length SET_ADDRESS CCPL USBFS
Setup USBFS CCPL 1 0 INTSTS0.VALID 1 CCPL 1 CCPL USB
CCPL 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 727 of 1551
RA4W1
28. USB2.0 USBFS
PBUSY
USBFS PID[1:0] BUF NAK DCP USBFS USBFS PBUSY 0 1 1 PBUSY 1 0
PID NAK PBUSY
28.3.4.1
SQMON
DCP
USBFS SQMON DATA-PID USBFS
Setup USBFS SQMON 1 DATA1
USBFS IN OUT
SQSET
DCP DATA1
SQCLR SQSET 1
SQCLR
DCP DATA0 0
SQCLR SQSET 1
SUREQCLR SUREQ
SUREQCLR 1 SUREQ 0 0
SETUP SUREQ 1 SUREQCLR 1 SETUP USBFS SUREQ 0
SUREQCLR SUREQ DVSTCTR0.UACT 0 UACT 0
0
SUREQ SETUP
SUREQ 1 USBFS Setup SETUP USBFS SACK SIGN SUREQ 0 SUREQCLR 1 USBFS SUREQ 0
SUREQ 1 DCPMAXP.DEVSEL[3:0] USBREQ USBVAL USBINDX USBLENG SETUP USB DCP PID[1:0] NAK SUREQ 1 SETUP SUREQ = 1 DCPMAXP.DEVSEL[3:0] USBREQ USBVAL USBINDX USBLENG SETUP SUREQ 1 0
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 728 of 1551
RA4W1
28. USB2.0 USBFS
BSTS DCP FIFO
CFIFOSEL.ISEL ISEL = 0
ISEL = 1
28.2.26 PIPESEL
USBFS.PIPESEL 4009 0064h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
PIPESEL[3:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b3-b0
PIPESEL[3:0]
b15-b4 --
R/W
b3
b0
0 0 0 0
0 0 0 11
R/W
0 0 1 02
0 0 1 13
0 1 0 04 0 1 0 15
0 1 1 06
0 1 1 17 1 0 0 08
1 0 0 19
00
R/W
1 9 PIPESELPIPECFGPIPEMAXPPIPEPERIPIPEnCTRPIPEnTRE PIPEnTRN n = 0 9
PIPESEL PIPECFGPIPEMAXP PIPEPERI PIPEnCTRPIPEnTRE PIPEnTRN PIPESEL
PIPESEL[3:0]
PIPECFGPIPEMAXP PIPEPERI PIPESEL[3:0] PIPECFGPIPEMAXP PIPEPERI
PIPESEL[3:0] = 0000b PIPECFGPIPEMAXP PIPEPERI 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 729 of 1551
RA4W1
28. USB2.0 USBFS
28.2.27 PIPECFG
USBFS.PIPECFG 4009 0068h
b15 b14 b13 b12
TYPE[1:0]
--
--
0
0
0
0
b11 b10 b9
-- BFRE DBLB
0
0
0
b8
b7
b6
--
SHTNA K
--
0
0
0
b5
b4
b3
b2
b1
b0
--
DIR
EPNUM[3:0]
0
0
0
0
0
0
b3-b0
EPNUM[3:0] 1
b4
DIR
2 3
b6-b5 b7
-- SHTNAK
1
b8
--
b9
DBLB
2 3
b10
BFRE
BRDY 2 3
b13-b11 b15-b14
-- TYPE[1:0]
1
R/W
R/W
0000b
0
R/W
1
0 0 R/W
0
R/W
1
0 0 R/W
0
R/W
1
0BRDY
R/W
1BRDY
0 0 R/W
1 2
b15 b14
0 0 0 1 1 0 1 1
R/W
3 5
b15 b14
0 0 0 1 1 0 1 1
1. 2. 3.
6 9
b15 b14
0 0 0 1 1 0 1 1
TYPE[1:0]SHTNAK EPNUM[3:0] PID NAK PIPEnCTR.PBUSY 0 PIPEnCTR.PID[1:0] 01b BUF 00bNAKUSBFS PID[1:0] 00NAK PBUSY BFREDBLB DIR PID NAK CURPIPE[3:0] PIPEnCTR.PBUSY 0 PIPEnCTR.PID[1:0] 01bBUF 00bNAKUSBFS PID[1:0] 00NAK PBUSY USB BFREDBLB DIR 2 PIPEnCTR.ACLRM 1 0 FIFO
PIPECFG 1 9 FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 730 of 1551
RA4W1
28. USB2.0 USBFS
EPNUM[3:0]
0000b
DIR EPNUM[3:0] EPNUM[3:0] 0000b
DIR
DIR 0 USBFS DIR 1 USBFS
SHTNAK
PIPEnCTR.PID[1:0] 00bNAK 1 5
1 USBFS PIPEnCTR.PID[1:0] 00bNAKUSBFS
Zero-Length
DBLB
FIFO 1 5
BFRE BRDY
USBFS CPU BRDY
BFRE 1 USBFS BRDY
BRDY BCLR 1 BCLR 1 FIFO
BFRE 1 USBFS BRDY 28.3.3.1BRDY
TYPE[1:0]
PIPESEL.PIPESEL[3:0] PID BUF USB TYPE[1:0] 00b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 731 of 1551
RA4W1
28. USB2.0 USBFS
28.2.28 PIPEMAXP
USBFS.PIPEMAXP 4009 006Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
DEVSEL[3:0]
--
--
--
MXPS[8:0]
0
0
0
0
0
0
0
0
0
0/1
1
0
0
0
0
0
0
b8-b0
MXPS[8:0]
2
b11-b9 b15-b12
--
DEVSEL[3:0] 3
R/W
1, 2
R/W
1 001h 256100h
3 5
8 008h16010h
32 020h64040h
[8:7] [2:0]
6 9
1 001h 64040h
[8:7]
00
R/W
b3
b0
0 0 0 00000
R/W
0 0 0 10001
0 0 1 00010
0 0 1 10011
0 1 0 00100
0 1 0 10101
1. 2.
3.
MXPS[8:0] PIPESEL.PIPESEL[3:0] 000h 040h
MXPS[8:0] PID NAK CURPIPE[3:0] PIPEnCTR.PBUSY 0 PIPEnCTR.PID[1:0] 01bBUF 00bNAKUSBFS PID[1:0] 00NAK PBUSY DEVSEL[3:0] PID NAK PIPEnCTR.PBUSY 0 PIPEnCTR.PID[1:0] 01bBUF 00bNAK USBFS PID[1:0] 00NAK PBUSY
PIPEMAXP 1 9
MXPS[8:0]
USB2.0 MXPS[8:0] = 0 FIFO PID BUF
DEVSEL[3:0]
USB DEVADDnn = 0 5 DEVSEL[3:0] 0010b DEVADD2
0000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 732 of 1551
RA4W1
28. USB2.0 USBFS
28.2.29 PIPEPERI
USBFS.PIPEPERI 4009 006Eh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
-- IFIS --
--
--
--
--
--
--
--
--
IITV[2:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b2-b0
b11-b3 b12
b15-b13
IITV[2:0] 1
--
IFIS
IN
--
R/W
R/W 2 n
0 0 R/W
0
R/W
1
0 0 R/W
1.
IITV[2:0] PID NAK PBUSY 0 PID[1:0] 01bBUF 00bNAKUSBFS PID[1:0] 00NAK PBUSY
PIPEPERI IN 1 9
IITV[2:0]
IITV[2:0] USB IITV[2:0] PIPEnCTR.PID[1:0] 00bNAKPIPEnCTR.ACLRM 1
3 5 IITV[2:0] 3 5 IITV[2:0] 000b
IFIS IN
PIPESEL.PIPESEL[3:0] IN
IN IITV[2:0] USBFS USB IN USBFS FIFO
PIPECFG.DBLB = 1USBFS 1
USBFS IN SOF FIFO SOF SOF FIFO
0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 733 of 1551
RA4W1
28. USB2.0 USBFS
28.2.30 n PIPEnCTR(n = 1 9)
PIPEnCTR (n = 1 5)
USBFS.PIPE1CTR 4009 0070h, USBFS.PIPE2CTR 4009 0072h, USBFS.PIPE3CTR 4009 0074h, USBFS.PIPE4CTR 4009 0076h, USBFS.PIPE5CTR 4009 0078h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
BSTS
INBUF M
--
--
--
ATREP M
ACLRM SQCLR
SQSET
SQMO N
PBUSY
--
--
--
PID[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b1-b0
b4-b2 b5 b6 b7
b8
b9 b10 b13-b11 b14 b15
PID[1:0]
-- PBUSY SQMON SQSET
SQCLR
ACLRM ATREPM -- INBUFM BSTS
PID
b1 b0
0 0NAK 0 1BUF 1 0STALL 1 1STALL
00
0 n 1 n
0DATA0 1DATA1
2
n 00 1 DATA1 0
2
n 00 1 DATA0 0
3
0 1
2
0 1
00
0FIFO 1FIFO
0CPU 1CPU
R/W R/W
R/W R R
R/W
1
R/W
1
R/W R/W R/W
R R
1. 2.
3.
0 ATREPM SQCLR SQSET 1 PID NAK PBUSY 0 PID[1:0] 01b BUF 00bNAKUSBFS PID[1:0] 00NAK PBUSY ACLRM PID NAK CURPIPE[3:0] PBUSY 0 PID[1:0] 01bBUF 00bNAKUSBFS PID[1:0] 00NAK PBUSY
PIPEnCTR PIPESEL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 734 of 1551
RA4W1
28. USB2.0 USBFS
PID[1:0] PID
PID[1:0] NAK USBFS PID[1:0] BUF PID[1:0] USBFS 28.7 28.8
USBFS PID[1:0] BUF NAK USBFS NAK PBUSY 1 USBFS PID[1:0] NAK PBUSY
USBFS PIPEnCTR.PID[1:0]
PIPECFG.SHTNAK 1 USBFS PID NAK
USBFS PID STALL11b
USB USBFS PID NAK
CRC 3 USBFS PID NAK
STALL USBFS PID STALL11b
PID[1:0]
NAK00b STALL 10b
BUF01b STALL 11b
STALL11b NAK 10b 00b
STALL BUF NAK BUF
28.7
PID[1:0] USBFS
PID[1:0]
DIR
USBFS
00bNAK 01bBUF
DVSTCTR0.UACT 1 FIFO DVSTCTR0.UACT 0 FIFO
FIFO
10bSTALL 11b STALL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 735 of 1551
RA4W1
28. USB2.0 USBFS
28.8
PID[1:0] USBFS
PID[1:0]
DIR
USBFS
00bNAK
USB NAK
USB
01bBUF
DIR = 0
DIR = 0
USB OUT FIFO ACK
USB OUT FIFO ACK
DIR = 1
USB FIFO NAK
DIR = 0
DIR = 1
USB OUT FIFO
USB FIFO Zero-Length
10bSTALL 11b STALL
USB STALL USB
PBUSY
USBFS USBFS PBUSY 0 1 1 PBUSY 1 0
PID NAK PBUSY 28.3.4.1
SQMON
USBFS SQMON DATA-PID USBFS SQMON
SQSET
SQSET 1 USBFS DATA1 USBFS SQSET 0
SQCLR
SQCLR 1 USBFS DATA0 USBFS SQCLR 0
ACLRM
FIFO ACLRM 1 0
28.9 ACLRM 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 736 of 1551
RA4W1
28. USB2.0 USBFS
28.9
1
2
3 4 5
ACLRM = 1 USBFS
ACLRM
FIFO 2 FIFO
PIPECFG.BFRE FIFO
PIPECFG.BFRE PIPECFG.DBLB
ATREPM
ATREPM 1 ATREPM 1 USB USBFS
IN PIPECFG.TYPE[1:0] = 01b PIPECFG.DIR = 1
a. ATREPM = 1 PID = BUF IN USBFS Zero-Length
b. USB ACKUSBFS DATA-PID 1 IN Zero-Length ACK USBFSBRDY BEMP
OUT PIPECFG.TYPE[1:0] = 01b PIPECFG.DIR = 0
ATREPM = 1 PID = BUF OUT USBFS NAK NRDY USB FIFO ATREPM 1 USB FIFO 0
ATREPM 0
INBUFM
FIFO
PIPECFG.DIR = 1CPU DMAC/DTC FIFO 1 USBFS 1
FIFO USBFS USBFS 0 PIPECFG.DBLB = 1CPU DMAC/DTC FIFO 1 USBFS FIFO 2 USBFS INBUFM 0
PIPECFG.DIR = 0INBUFM BSTS
BSTS
FIFO
BSTS 28.10 PIPECFG.DIR PIPECFG.BFRE DnFIFOSEL.DCLRM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 737 of 1551
RA4W1
28. USB2.0 USBFS
28.10
BSTS
DIR 0
1
BFRE 0 1
0 1
DCLRM 0
1 0
1
0
1 0 1
BSTS
FIFO 1 0
FIFO 1 BCLR 1 0
FIFO 1 0
FIFO 1 0
PIPEnCTR (n = 6 9)
USBFS.PIPE6CTR 4009 007Ah, USBFS.PIPE7CTR 4009 007Ch, USBFS.PIPE8CTR 4009 007Eh, USBFS.PIPE9CTR 4009 0080h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
BSTS --
--
--
--
--
ACLRM SQCLR
SQSET
SQMO N
PBUSY
--
--
--
PID[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b1-b0
b4-b2 b5 b6 b7
b8
b9 b14-b10 b15
PID[1:0]
-- PBUSY SQMON SQSET
SQCLR
ACLRM -- BSTS
PID
b1 b0
0 0NAK 0 1BUF 1 0STALL 1 1STALL
0 0
0 n 1 n
0DATA0 1DATA1
2
n 00 1 DATA1 0
2
n 00 1 DATA0 0
23 0 1
0 0
0 1
R/W R/W
R/W R R
R/W
1
R/W
1
R/W R/W
R
1. 2.
0 1 SQCLR SQSET 1 PID NAK PBUSY 0 PID[1:0] 01bBUF 00bNAK USBFS PID[1:0] 00NAK PBUSY
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 738 of 1551
RA4W1
28. USB2.0 USBFS
3.
ACLRM PID NAK CURPIPE[3:0] PIPEnCTR.PBUSY 0 PIPEnCTR.PID[1:0] 01bBUF 00bNAKUSBFS PID[1:0] 00NAK PBUSY
PID[1:0] PID
PID[1:0] NAK USB PID[1:0] BUF PID[1:0] USBFS 28.7 28.7
USB PID[1:0] BUF NAK USB NAK PBUSY 1 USBFS PID[1:0] NAK PBUSY
USBFS PIPEnCTR.PID[1:0] USBFS PID
STALL11b
USB USBFS PID NAK
CRC3USBFSPID NAK
STALL USBFS PID STALL11b
PID[1:0] NAK00b STALL 10b
BUF01b STALL 11b
STALL11b NAK 10b 00b
STALL BUF 00bNAK 01bBUF
PBUSY
USBFS USBFS PBUSY 0 1 1 PBUSY 1 0
PID NAK PBUSY
SQMON
USBFS SQMON DATA-PID USBFS SQMON
SQSET SQSET 1 USBFS
DATA1 USBFS SQSET 0
SQCLR SQCLR 1 USBFS
DATA0 USBFS SQCLR 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 739 of 1551
RA4W1
28. USB2.0 USBFS
ACLRM
FIFO ACLRM 1 0
28.11 ACLRM 1 0
28.11
ACLRM = 1 USBFS
1 2
3 4
ACLRM FIFO PIPECFG.BFRE
PIPECFG.BFRE
BSTS
FIFO
BSTS 28.10 PIPECFG.DIR PIPECFG.BFRE DnFIFOSEL.DCLRM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 740 of 1551
RA4W1
28. USB2.0 USBFS
28.2.31 n PIPEnTRE(n = 1 5)
USBFS.PIPE1TRE 4009 0090h, USBFS.PIPE2TRE 4009 0094h, USBFS.PIPE3TRE 4009 0098h, USBFS.PIPE4TRE 4009 009Ch, USBFS.PIPE5TRE 4009 00A0h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
-- TRENB TRCLR --
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b7-b0
--
0 0
R/W
b8
TRCLR 00
R/W
1
b9
TRENB
0
R/W
1
b15-b10 --
0 0
R/W
.
PIPEnTRE PID NAK
PIPEnCTR.PBUSY 0 PIPEnCTR.PID[1:0] BUF
NAK USBFS PID[1:0] NAK PBUSY
TRCLR
TRCLR 1 USBFS TRCLR 0
TRENB
PIPEnTRN.TRNCNT[15:0] TRENB 1 USBFS TRNCNT[15:0]
PIPECFG.SHTNAK 1 TRNCNT[15:0] USBFS PIPEnCTR.PID[1:0] NAK
PIPECFG.BFRE 1 TRNCNT[15:0] USBFS BRDY
TRENB 0
0 TRNCNT[15:0] 1 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 741 of 1551
RA4W1
28. USB2.0 USBFS
28.2.32 n PIPEnTRN(n = 1 5)
USBFS.PIPE1TRN 4009 0092h, USBFS.PIPE2TRN 4009 0096h, USBFS.PIPE3TRN 4009 009Ah, USBFS.PIPE4TRN 4009 009Eh, USBFS.PIPE5TRN 4009 00A2h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
TRNCNT[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15-b0 TRNCNT[15:0]
R/W
R/W
PIPEnTRE.TRENB 0
PIPEnTRE.TRENB 1
PIPEnTRN USB
TRNCNT[15:0] USBFS TRNCNT[15:0] 1
PIPEnTRE.TRENB = 1 TRNCNT[15:0] + 1 PIPEMAXP.MXPS[8:0]
USBFS TRNCNT[15:0] 0
PIPEnTRE.TRENB = 1 TRNCNT[15:0] = + 1 PIPEMAXP.MXPS[8:0]
PIPEnTRE.TRENB = 1 USBFS
PIPEnTRE.TRENB = 1
PIPEnTRE.TRCLR 1
TRNCNT[15:0] 0 TRNCNT[15:0] 0
TRNCNT[15:0] PIPEnTRE.TRENB 0 PIPEnTRE.TRENB 1 TRCLR 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 742 of 1551
RA4W1
28. USB2.0 USBFS
28.2.33 n DEVADDn(n = 0 5)
USBFS.DEVADD0 4009 00D0h, USBFS.DEVADD1 4009 00D2h, USBFS.DEVADD2 4009 00D4h, USBFS.DEVADD3 4009 00D6h, USBFS.DEVADD4 4009 00D8h, USBFS.DEVADD5 4009 00DAh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
-- USBSPD[1:0] --
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b5-b0 b7-b6
-- USBSPD[1:0]
b15-b8 --
R/W
0 0
R/W
b7 b6
0 0 DEVADDn
R/W
0 1
1 0
1 1
0 0
R/W
DEVADDn 0 9
DEVADDn DEVADDn
DEVADDn DEVSEL[3:0]
PID[1:0] BUF DCP DCPCTR.SUREQ 1
0
USBSPD[1:0]
USB
USBFS USBSPD[1:0] 00b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 743 of 1551
RA4W1
28. USB2.0 USBFS
28.2.34 USB USBMC
USBFS.USBMC 4009 00CCh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
VDDUS BE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
b0
VDDUSBE
b1
--
b15-b2
--
USB ON/OFF
R/W
0USB OFF
R/W
1USB ON
1 1 R/W
0 0 R/W
VDDUSBE USB ON/OFF
USB 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 744 of 1551
RA4W1
28. USB2.0 USBFS
28.2.35 BC 0USBBCCTRL0
USBFS.USBBCCTRL0 4009 00B0h
b15 b14 b13 b12 b11
--
--
--
--
--
0
0
0
0
0
b10 b9
b8
b7
b6
--
PDDET CHGDE BATCH STS0 TSTS0 GE0
--
0
0
0
0
0
b5
b4
b3
b2
b1
b0
VDMS IDPSIN VDPSR IDMSIN IDPSR RPDM RCE0 KE0 CE0 KE0 CE0 E0
0
0
0
0
0
0
R/W
b0
RPDME0
D-
0 OFF
R/W
1 ON
b1
IDPSRCE0
D+ IDPSRC
0
R/W
110A
b2
IDMSINKE0 D- 0.6V 0OFF
R/W
&
1ON & ON
b3
VDPSRCE0 D+ VDPSRC0.6V 0
R/W
10.6V
b4
IDPSINKE0
D+ 0.6V 0OFF
R/W
&
1ON & ON
b5
VDMSRCE0 D- VDMSRC0.6V 0
R/W
10.6V
b6
--
0 0 R/W
b7
BATCHGE0
BC 0
R/W
1
b8
CHGDETSTS0 D- 0.6V
0
R
1
1
b9
PDDETSTS0 D+ 0.6V
0
R
2
1
b15-b10 --
0 0 R/W
1. 2.
IDMSINKE0 = 1 IDPSINKE0 = 1
RPDME0 D-
RPDME0 1 D-
IDPSRCE0 D+ IDPSRC
IDPSRCE0 1 D+
IDMSINKE0 D- 0.6V &
IDMSINKE0 1 USBFS D- VDMSRC0.6V D+ VDPSRC0.6V D-
VDPSRCE0 D+ VDPSRC0.6V
VDPSRCE0 1 D+ VDPSRC0.6V
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 745 of 1551
RA4W1
28. USB2.0 USBFS
IDPSINKE0 D+ 0.6V &
IDPSINKE0 1 USBFS D VDMSRC0.6V D+DCP USBFS D+ VDPSRC0.6V
VDMSRCE0 D- VDMSRC0.6V
VDMSRCE0 1 D- VDMSRC0.6V D- VDMSRC0.6V
CHGDETSTS0 D- 0.6V
D- VDMSRC0.6V D+ VDPSRC0.6V D- USBFS CHGDETSTS0 1
PDDETSTS0 D+ 0.6V
D- VDMSRC0.6V D+DCP USBFS PDDETSTS0 1
D+ VDPSRC0.6V USBFS 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 746 of 1551
RA4W1
28. USB2.0 USBFS
28.3
28.3.1
USBFS
28.3.1.1 USBFS
SYSCFG.SCKE = 1 SYSCFG.USBE 1 USBFS USBFS
28.3.1.2
USBFS 2
SYSCFG.DCFM DCFM D+ SYSCFG.DPRPU = 0 D+/D- SYSCFG.DRPD = 0
28.3.1.3 USB
USBFS D+/D- SYSCFG.DPRPU SYSCFG.DMRPUSYSCFG.DRPD
USB SYSCFG.DPRPU 1 D+ SYSCFG.DMRPU 1 D-
PC SYSCFG.DPRPU 0 SYSCFG.DMRPU 0 USBFS USB USB
SYSCFG.DRPD 1 D+/D-
28.12
USB
SYSCFG
DRPD
DPRPU
DMRPU
0
0
0
0
1
0
0
0
1
1
0
0
D --
D+ --
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 747 of 1551
RA4W1
28. USB2.0 USBFS
28.3.1.4 USB
1 USB MCU MCU USB-PHY
28.2 USB
USBFS D+ D+ D- SYSCFG.DPRPU SYSCFG.DRPD USB SYSCFG.DPRPU 0 USB USBFS USB
28.2 USB
MCU
USB
ZDRV
RPU
ZDRV
USB_VBUS1
1M
0.1�F
100
2
RPU USB_DP USB_DM
ZDRV RPU
VBUS
D+ D-
1. USB_VBUS 5V 2. VBUS1.0 10F
28.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 748 of 1551
RA4W1 28.3 USB
28. USB2.0 USBFS
MCU
USB_VBUSEN USB_OVRCURA
OTG USB
IC
1
VBUS
USB
ZDRV ZDRV
USB_DP USB_DM
RPD
RPD
ZDRV RPD
1
120�F
USB A VBUS D+ D-
1. Rev 1.2IC VBUS 1.5A
28.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 749 of 1551
RA4W1
28. USB2.0 USBFS
28.4 USB
MCU
USB
3.3V
USB B
3.3V
2
VBUS
USB_VBUS1
RPU
RPU
ZDRV
USB_DP
D+
USB_DM
D-
ZDRV
ZDRV RPU
1. USB_VBUS 5V 2. VBUS 1.0 10F
28.4
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 750 of 1551
RA4W1
28. USB2.0 USBFS
28.5 2 USB
MCU
USB_VBUS1
USB B VBUS
USB
RPU
RPU
ZDRV
USB_DP
D+
USB_DM
D-
ZDRV
ZDRV RPU
1. USB_VBUS 5V 2. VBUS 1.0 10F
28.5
2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 751 of 1551
RA4W1
28. USB2.0 USBFS
28.6 1.2 USB
MCU
SCL0 SDA0
BC 1.2 IC
SCL0
SDA0
USB_VBUS3
USB
ZDRV
RPU
ZDRV
RPU
10k
2
VBUS
14
100
0.1�F
USB B
USB_DP USB_DM
VBUS
D+ D-
ZDRV RPU
1. Rev 1.2 VBUS 1.5A
2. VBUS 500ms 3. USB_VBUS 5V 4. VBUS 1.0 10F
28.6
1.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 752 of 1551
RA4W1
28. USB2.0 USBFS
28.3.2
28.13 USBFS ICU USBFS USBFS 14. ICU
28.13
1 VBINT RESM SOFR DVST
CTRT
BEMP NRDY
BRDY OVRCR BCHG DTCH ATTCH EOFERR
(1/2)
VBUS
EOF
USB_VBUSLow High High Low INTSTS0.
VBSTS
1
Suspended USB J-State K-State J-State SE0
--
SOF SOF
--
USB Suspended SET_ADDRESS SET_CONFIGURATION
INTSTS0. DVSQ[2:0]
INTSTS0. CTSQ[2:0]
FIFO
BEMPSTS. PIPEnBEMP
STALL
3 3
PID[1:0] 01bBUFIN OUT
NAK CRC
NRDYSTS. PIPEnNRDY
BRDYSTS.
PIPEnBRDY
USB_OVRCURA USB_OVRCURBLow High High Low
INTSTS1. OVRCR
USB
SYSSTS0. LNST[1:0]
DVSTCTR0. RHST[2:0]
J-State K-State USB 2.5�s
--
EOF
--
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 753 of 1551
RA4W1
28. USB2.0 USBFS
28.13
(2/2)
1
SACK
SETUP
SETUPACK
--
SIGN
SETUP
SETUP ACK
--
3
PDDEINT0
INTSTS1.PD DETINT0
1.
28.7 USBFS
USBFS_USBR USBFS_USBI
D0FIFO D1FIFO
INTENB0 VBSE RSME SOFE DVSE CTRE BEMPE NRDYE BRDYE
INTSTS0 VBINT RESM SOFR DVST CTRT BEMP NRDY BRDY
OVRCRE BCHGE DTCHE ATTCHE EOFERRE SIGNE SACKE PDDETINTE0 INTENB1
OVRCR BCHG DTCH ATTCH EOFERR SIGN SACK PDDETINT0 INTSTS1
D0FIFOSEL DREQE
D1FIFOSEL DREQE
DMA/DTC 0
DMA/DTC 1
28.7
USBFS
R01UH0883JJ0100 Rev.1.00 2020.08.31
USB Set_Address Set_Configuration
BEMP
b9
b1 b0
b9
NRDY
b9
b1 b0
BEMP b1
b0
b9
BRDY
b9
b1 b0
NRDY b1
b0
b9
BRDY b1 b0
Page 754 of 1551
RA4W1
28. USB2.0 USBFS
28.14 USBFS
28.14
USBFS
D0FIFO D1FIFO USBFS_USBI
DTC
DMA 0
DMA 1
VBUS EOF SETUPSETUP
USBFS_USBR VBUS
DMAC
--
28.3.3
28.3.3.1 BRDY
BRDY USBFS BRDYSTS 1 BRDYENB 1 INTENB0.BRDYE 1 USBFS BRDY
BRDY SOFCFG.BRDYM PIPECFG.BFRE
(1) SOFCFG.BRDYM = 0 PIPECFG.BFRE = 0
BRDY FIFO USBFS BRDY BRDYSTS.PIPEnBRDY 1
(a)
DIR 0 1
CPU FIFO BSTS 0
FIFO FIFO
FIFO FIFO
PIPEnCTR.ACLRM 1 FIFO
DCP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 755 of 1551
RA4W1
28. USB2.0 USBFS
(b)
CPU FIFO BSTS 0 FIFO DATAPID
FIFO FIFO FIFO FIFO
BRDY PIPEnBRDY PIPEnBRDY 0 0 PIPEBRDY 1
BRDY FIFO
(2) SOFCFG.BRDYM = 0 PIPECFG.BFRE = 1
1 USBFS BRDY BRDYSTS 1
USBFS 1
Zero-Length
n PIPEnTRNPIPEnTRN.TRNCNT[15:0]
USBFS 1
FIFO Zero-Length FIFO FRDY 1DTLN[8:0] 0 USBFS 1 BCLR 1 USBFS BRDY
PIPEnBRDY BRDYSTS.PIPEnBRDY 0 0 PIPEnBRDY 1
1 PIPECFG.BFRE PIPECFG.BFRE PIPEnCTR.ACLRM FIFO
(3) SOFCFG.BRDYM = 1 PIPECFG.BFRE = 0
BRDYSTS.PIPEnBRDY BSTS BRDY PIPEnBRDYFIFO USB 1 0
(a)
BRDY FIFO 1 0 DCP BRDY
(b)
BRDY FIFO 1 0
FIFO Zero-Length BCLR 1 1 BRDY PIPEnBRDY 0
SOFCFG.BRDYM 1 PIPECFG.BFRE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 756 of 1551
RA4W1
28. USB2.0 USBFS
28.8 BRDY
1Zero-LengthBFRE = 0
USB
1
ACK Handshake
FIFO
BRDY
BRDYSTS.PIPEnBRDY
2BFRE = 1
USB
FIFO
BRDY
BRDYSTS.PIPEnBRDY
FIFO2 BRDY
ACK Handshake 1
3
USB
FIFO
BRDY
BRDYSTS.PIPEnBRDY
FIFO 2
3 BRDY
1
ACK Handshake
FIFO BRDY
1. ACK Handshake 2. FIFO
CPU FIFO 1 3.
12 (1) Zero-Length (2)
28.8
BRDY
INTSTS0.BRDY 28.15 SOFCFG.BRDYM
28.15
BRDY
BRDYM 0 1
BRDY BRDYSTS 0 USBFS BRDY 0 BSTS 0 USBFS BRDY 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 757 of 1551
RA4W1
28. USB2.0 USBFS
28.3.3.2 NRDY
PID BUF NRDY USBFS NRDYSTS.PIPEnNRDY 1 NRDYENB 1 USBFS INTSTS0.NRDY 1 USBFS
USBFS NRDY
SETUP NRDY SETUP SACK SIGN
NRDY
(1)
(a)
USBFS NRDY
FIFO OUT USBFS OUT Zero-Length NRDYSTS.PIPEnNRDY FRMNUM.OVRN 1
SETUP 2 3
USBFS PIPEnNRDY 1 PID[1:0] NAK
SETUP STALL USBFS PIPEnNRDY 1 PID[1:0] STALL11b
(b)
IN FIFO USBFS IN PIPEnNRDY OVRN 1 IN USBFS FRMNUM.CRCE 1
2 3
USBFS IN DATA
USBFS PIPEnNRDY 1 PID[1:0] NAK
IN DATA USBFS PIPEnNRDY 1 PID[1:0]
CRC USBFS PIPEnNRDY CRCE 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 758 of 1551
RA4W1
28. USB2.0 USBFS
STALL USBFS PIPEnNRDY 1 PID[1:0] STALL
(2)
(a)
FIFO IN USBFS IN NRDY NRDYSTS.PIPEnNRDY 1 USBFS Zero-Length FRMNUM.OVRN 1
(b)
OUT FIFO USBFS OUT NRDY PIPEnNRDY 1 OVRN 1 USBFS OUT NAK NRDY PIPEnNRDY 1 DATA-PID NRDY DATA NRDY
USBFS SOF NRDY PIPEnNRDY 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 759 of 1551
RA4W1
28. USB2.0 USBFS
28.9 NRDY
1
USB
IN
NAK Handshake
FIFO
NRDY
NRDYSTS.PIPEnNRDY3
NRDY
2OUT
USB
OUT
FIFO
NRDY
NRDYSTS.PIPEnNRDY3
CRCE2
1
NAK Handshake
1
3PING
NRDY
USB
PING
NAK Handshake
FIFO
NRDY
NRDYSTS.PIPEnNRDY3
NRDY
1. Hankdshake 2. Pipe CRCEOVRN 3. PIPEnNRDY PIPEnPID[1:0] 01b 1 BUF )
28.9
NRDY
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 760 of 1551
RA4W1
28. USB2.0 USBFS
28.3.3.3 BEMP
PID BUF BEMP USBFS BEMPSTS.PIPEnBEMP 1 BEMPENB 1 USBFS INTSTS0.BEMP 1 USBFS USBFS BEMP
(1)
Zero-Length FIFO DCP BRDY BEMP BEMP
FIFO CPU DMAC/DTC CPU FIFO
PIPEnCTR.ACLRM BCLR 1
IN Zero-Length
(2)
USBFS BEMP BEMPSTS.PIPEnBEMP 1 PID[1:0] STALL11bUSBFS STALL
BEMP
CRC
SETUP
BEMPSTS.PIPEnBEMP 0
BEMPSTS.PIPEnBEMP 1
28.10 BEMP
1 USB
IN
1
ACK Handshake
FIFO
BEMP
BEMPSTS.PIPEnBEMP
BEMP
2 USB
OUT
BEMP BEMPSTS.PIPEnBEMP
STALL Handshake
BEMP
1. Hankdshake
28.10
BEMP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 761 of 1551
RA4W1
28. USB2.0 USBFS
28.3.3.4
28.11 USBFS USBFS Suspended INTENB0 INTSTS0.DVSQ[2:0]
Default USB
USBFS
Powered DVSQ = 000b
DVST = 1
Suspended
DVSQ = 100b
USB DVST = 1
RESM = 1
USB DVST = 1
Default DVSQ = 001b
DVST = 1
Suspended
DVSQ = 101b
RESM = 1
SetAddress Address = 0
DVST = 1
SetAddressAddress0Address0 DVST = 1
DVST = 1
Address DVSQ = 010b)
Suspended
DVSQ = 110b
SetConfiguration ConfigurationValue = 0
DVST = 1
RESM = 1
SetConfigurationConfigurationValue = 0 DVST = 1
Configured DVSQ = 011b
DVST = 1
Suspended
DVSQ = 111b
RESM = 1
. DVST 1 RESM 1
28.11
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 762 of 1551
RA4W1
28. USB2.0 USBFS
28.3.3.5
28.12 USBFS USBFS INTENB0 INTSTS0.CTSQ[2:0]
DCPCTR.PID[1:0] 1xbSTALL
(1)
IN OUT
IN
DATAPID = DATA0
(2)
OUT ACK IN
DATAPID = DATA0
OUT
(3)
OUT
USB wLength Zero-Length ACK
CTRT INTSTS0.CTRT = 1CTRT 0 CTSQ[2:0] = 110b CTSQ[2:0] = 110b USB CTRT USBFS USBFS CTRT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 763 of 1551
RA4W1
28. USB2.0 USBFS
CTSQ = 000b
CTSQ = 110b
5
ACK
CTSQ = 001b
1
ACK
CTSQ = 011b
1
ACK
OUT
CTSQ = 010b
2
ACK
IN
CTSQ = 100b
3
ACK
CTSQ = 000b
4
4
CTSQ = 101b
1
ACK
. CTRT (1) (2) (3) (4) (5)
28.12
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 764 of 1551
RA4W1
28. USB2.0 USBFS
28.3.3.6
SOFR USBFS SOF SOFR
28.3.3.7 VBUS
USB_VBUS VBUS USB_VBUS INTSTS0.VBSTS VBUS USB_VBUS VBUS
28.3.3.8
Suspended USB J-State K-State J-State SE0 Suspended
BCHG USB
28.3.3.9 OVRCR
USB_OVRCURA USB_OVRCURB OVRCR USB_OVRCURA USB_OVRCURB SYSSTS0.OVCMON[1:0] IC OVRCR
28.3.3.10 BCHG
USB BCHG BCHG BCHG
28.3.3.11 DTCH
USB DTCH USBFS USB2.0
ATTCH USBFS
DTCH DVSTCTR0.UACT 0
DTCH
28.3.3.12 SACK
Setup ACK SACK SACK SETUP
28.3.3.13 SIGN
Setup ACK 3 SIGN SIGN ACK ACK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 765 of 1551
RA4W1
28. USB2.0 USBFS
28.3.3.14 ATTCH
USB J-State K-State 2.5s ATTCH ATTCH
K-StateSE0 SE1 J-State J-State 2.5s
J-StateSE0 SE1 K-State K-State 2.5s
28.3.3.15 EOFERR
USB2.0 EOF2 USBFS EOFERR
USBFS
EOFERR DVSTCTR0.UACT 0
EOFERR
28.3.3.16
USB-PHY PDDET High Low Low High USBFS 3 PDDETSTS0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 766 of 1551
RA4W1
28. USB2.0 USBFS
28.3.4
28.16 USBFS USB USBFS 10
28.16
DCPCFG PIPECFG
TYPE BFRE DBLB DIR EPNUM
BRDY
SHTNAK
DCPMAXP PIPEMAXP
PIPEPERI
DEVSEL MXPS IFIS
IITV
DCPCTR PIPEnCTR
PIPEnTRE PIPEnTRN
BSTS INBUFM SUREQ SUREQCLR ATREPM ACLRM SQCLR SQSET SQMON PBUSY PID TRENB TRCLR
TRNCNT
IN SETUP SUREQ PID
1 9 1 5 1 5 IN OUT 1 9 0000b 1 2 3 5
USB2.0 1 2 3 9 1 2 3 5 6 9 DCP ISEL 1 5 DCP DCP 1 5 1 9
28.3.4.6 PID 1 5 1 5
1 5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 767 of 1551
RA4W1
28. USB2.0 USBFS
28.3.4.1
USB PID = NAK
USB PID = BUF
DCPCFG DCPMAXP
DCPCTR SQCLR SQSET
PIPECFG PIPEMAXP PIPEPERI
PIPEnCTR ATREPMACLRMSQCLR SQSET
PIPEnTRE PIPEnTRN
USB PID = BUF 1. 2. PID[1:0] NAK 3. PBUSY 0 4.
CFIFOSELD0FIFOSEL D1FIFOSEL CURPIPE[3:0]
CURPIPE[3:0] DCPCFG DCPMAXP
PIPECFG PIPEMAXP PIPEPERI
CURPIPE[3:0] DCP BCLR
28.3.4.2
PIPECFG.TYPE[1:0] DCP
1 2
3 5
6 9
28.3.4.3
PIPECFG.EPNUM[3:0] DCP 0 1 15
DCP 0
1 91 15 PIPECFG.DIR EPNUM[3:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 768 of 1551
RA4W1
28. USB2.0 USBFS
28.3.4.4
DCPMAXP.MXPS[6:0] PIPEMAXP.MXPS[8:0] DCP 1 5 USB2.0 6 9 64 PID = BUF
DCP81632 64
1 5 81632 64
1 2 1 256
6 91 64
28.3.4.5 1 5
USBFS PIPEnTRN PIPECFG.SHTNAK 1 PIPEnCTR.PID[1:0] NAK PIPEnTRE.TRCLR PIPEnTRN PIPEnTRE.TRENB
TRENB = 0
TRENB = 1
TRCLR PID = BUF
28.3.4.6 PID
DCPCTR PIPEnCTR PID[1:0] PID PID USBFS
(1) PID
PID NAK
BUF FIFO
OUT FIFO OUT
IN FIFO IN
STALL
. DCP SETUP DCPCTR.SUREQ
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 769 of 1551
RA4W1
28. USB2.0 USBFS
(2) PID
PID NAK NAK BUF FIFO STALL STALL
. SETUP PID[1:0] ACK USB
(3) (4) USBFS PID[1:0]
(3) PID
NAK PID = NAK NRDY 28.3.3.2NRDY PIPECFG.SHTNAK 1 SHTNAK 1
BUF USBFS STALL PID = STALL
STALL
(4) PID
NAK PID = NAK NAK SETUP DCP PIPECFG.SHTNAK 1
BUF USBFS BUF STALL PID = STALL STALL
DCP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 770 of 1551
RA4W1
28. USB2.0 USBFS
28.3.4.7 PID
USBFS PID PID DCPCTR PIPEnCTR SQMON ACK ACK DCPCTR SQCLR PIPEnCTR SQSET PID
USBFS DATA1 PID = DATA1
ClearFeature PID
28.3.4.8 PID = NAK
USBFS PID = NAKUSBFS PIPECFG.SHTNAK 1
FIFO PID = BUF
PID = NAK
28.3.4.9
1 5PIPEnCTR.ATREPM 1 OUT PIPECFG.DIR = 0 OUT-NAK IN DIR = 1 Null
28.3.4.10 OUT-NAK
OUT PIPEnCTR.ATREPM 1 OUT NAK NRDY OUT-NAK PID[1:0] = 00bNAK OUT-NAK PID[1:0] = 01bBUF OUT-NAK OUT ACK
OUT-NAK NAK OUT-NAK BUFOUT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 771 of 1551
RA4W1
28. USB2.0 USBFS
28.3.4.11 Null
IN PIPEnCTR.ATREPM 1 Zero-Length
Null PID = NAK Null PID = BUFNull Null PIPEnCTR.INBUFM 0 INBUFM 1 PIPEnCTR.ACLRM Null FIFO
Null PID = NAK Zero-Length 10sNull FIFO PID = BUF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 772 of 1551
RA4W1
28. USB2.0 USBFS
28.3.5 FIFO
USBFS FIFO FIFO CPU USBFSSIE 2
(1)
28.17 28.18 USBFS FIFO DCPCTR.BSTS PIPEnCTR.INBUFM FIFO PIPECFG.DIR CFIFOSEL.ISEL DCP
INBUFM 0 5
BSTS CPU FIFO INBUFM SIE FIFO CPU DMAC/DTC FIFO BEMP INBUFM
28.17
BSTS
ISEL DIR
BSTS
0
0
FIFO
0
1
Zero-Length
FIFOZero-Length
1
0
FIFO
1
1
CPU
28.18
INBUFM
DIR
INBUFM
0
1
0
1
1
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 773 of 1551
RA4W1
28. USB2.0 USBFS
28.3.6 FIFO
28.19 FIFO FIFO BCLR DnFIFOSEL.DCLRM PIPEnCTR.ACLRM
1 5 PIPECFG.DBLB
28.19
FIFO
CPU FIFO
CFIFOCTR DnFIFOCTR
BCLR
1
FIFO
DnFIFOSEL
PIPEnCTR
DCLRM
1 0
ACLRM
1 0
(1)
PIPEnCTR.ACLRM 1 USBFS ACK FIFO
ACLRM 1 0 FIFO ACLRM 1 0 100ns
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 774 of 1551
RA4W1
28. USB2.0 USBFS
28.3.7 FIFO
28.20 FIFO BVAL ZeroLength BCLR BVAL
ZeroLength DTLN[8:0] = 0BCLR DTLN[8:0]
28.20
FIFO
CFIFOSEL, DnFIFOSEL n = 0, 1
CFIFOCTR, DnFIFOCTR n = 0, 1
RCNT REW DCLRM DREQE MBW BIGEND ISEL CURPIPE BVAL BCLR DTLN
DTLN[8:0]
FIFO DnFIFO
DMA/DTC DnFIFO FIFO
FIFO FIFO DCP
FIFO
CPU FIFO
(1) FIFO
28.21 FIFO CURPIPE[3:0] CURPIPE[3:0] USBFS FRDY 1
MBW FIFO PIPECFG.DIR DCP ISEL
28.21
FIFO
DCP
1 9
CPU CPU
DMA/DTC
CFIFO CFIFO D0FIFO/D1FIFO D0FIFO/D1FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 775 of 1551
RA4W1
28. USB2.0 USBFS
(2) REW
REW
REW 1 CURPIPE[3:0] FIFO REW 0
FIFO FRDY 1
28.3.8 DMA D0FIFO/D1FIFO
(1) DMA
1 9 DMAC FIFO DMA DMA
DnFIFOSEL.MBW FIFO DnFIFOSEL.CURPIPE[3:0] DMA DMA
(2) DnFIFO D0FIFO/D1FIFO
DnFIFOSEL.DCLRM 1 FIFO USBFS FIFO
28.22 FIFO PIPECFG.BFRE DnFIFOSEL.DCLRM DMA
DnFIFO FIFO
28.22
FIFO
Zero-Length
DCLRM = 0
DCLRM = 1
BFRE = 0
BFRE = 1
BFRE = 0
BFRE = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 776 of 1551
RA4W1
28. USB2.0 USBFS
28.3.9 DCP
DCP DCP FIFO 64 FIFO CFIFO
28.3.9.1
(1)
USQREQUSBVALUSBINDX USBLENG SETUP USB Setup DCPCTR.SUREQ 1 SETUP SUREQ 0 SUREQ 1 USB
DCPMAXP.DEVSEL[3:0] 0 DEVADD0.USBSPD[1:0] SETUP
Address USB DEVSEL[3:0] USB DEVADDn SETUP PIPEMAXP.DEVSEL[3:0] = 0010b DEVADD2 PIPEMAXP.DEVSEL[3:0] = 0101b DEVADD5
SETUP INTSTS1 SIGN SACK SETUP
SETUP DATA0 USB DCPCTR.SQMON
(2)
DCP FIFO
DCP FIFO CFIFOSEL.ISEL DCPCFG.DIR
1 PID DATA1 DCPCTR.SQSET PID DATA1 PID BUF BRDY BEMP
Zero-Length
(3)
Zero-Length DCP FIFO
DCPCTR.SQSET PID DATA1
Zero-Length BRDY CFIFOCTR.DTLN[8:0] BCLR FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 777 of 1551
RA4W1
28. USB2.0 USBFS
28.3.9.2
(1)
USBFS USBFS Setup ACK USBFS
Setup USBFS
INTSTS0.VALID 1
DCPCTR.PID[1:0] NAK
DCPCTR.CCPL 0
Setup USBFS USB USBREQ USBVAL USBINDX USBLENG
VALID 0 VALID 1 PID = BUF
VALID USBFS USB
USBFS USB bmRequestType 8 wLengthUSBFS USBFS 28.12
(2)
USB DCP DCP FIFO CFIFOSEL.ISEL
DCP FIFO BRDY BEMP
(3)
DCPCTR.PID[1:0] BUF DCPCTR.CCPL 1
USBFS
USBFS USB Zero-Length ACK
USBFS Zero-Length USB ACK
(4)
USBFS SET_ADDRESS SET_ADDRESS
bmRequestType 00h wIndex 00h wLength 00h wValue 7Fh INTSTS0.DVSQ[2:0] 011bConfigured
SET_ADDRESS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 778 of 1551
RA4W1
28. USB2.0 USBFS
28.3.10 1 5
FIFO USBFS
BRDY PIPECFG.BFRE 28.3.3.1 (2)SOFCFG.BRDYM = 0 PIPECFG.BFRE = 1
PIPEnTRE.TRENB PIPEnTRE.TRCLR PIPEnTRN.TRNCNT[15:0] 28.3.4.5 1 5
PID = NAK PIPECFG.SHTNAK 28.3.4.8 PID = NAK
PIPEnCTR.ATREPM 28.3.4.9
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 779 of 1551
RA4W1
28. USB2.0 USBFS
28.3.11 6 9
USBFS
28.3.11.1
PIPEPERI.IITV[2:0]
(1) USBFS
USBFS
IITV[2:0]
PIPEnCTR.ACLRM FIFO IITV[2:0] PIPEnCTR.ACLRM 0 IITV[2:0]
USB USB Suspended
IITV[2:0] DVSTCTR0.UACT 1 USB USB Suspended
(2)
USBFS
PID NAK STALL
INFIFO
OUTFIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 780 of 1551
RA4W1
28. USB2.0 USBFS
28.3.12 1 2
USBFS PIPEPERI.IITV[2:0] IN IDLY IN PIPEPERI.IFIS
28.3.12.1
USBFS 28.23 28.24 USBFS
(a) PID
PID
(b) CRC
CRC
(c)
(d)
INFIFO OUTFIFO INFIFO OUTFIFO
(e)
IN IN OUT OUT
28.23
1 2 3
4
PID
CRC
NRDY FRMNUM.OVRN 1 IN Zero-Length OUT
NRDY
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 781 of 1551
RA4W1
28. USB2.0 USBFS
28.24
1 2
3
PID CRC
NRDY FRMNUM.CRCE 1
BEMP PID[1:0] STALL
28.3.12.2 DATA-PID
USBFS PID
(1) IN
DATA0 PID DATA1 DATA2 mDATA
(2) OUT
DATA0 PID DATA1 PID DATA2 mDATA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 782 of 1551
RA4W1
28. USB2.0 USBFS
28.3.12.3
PIPEPERI.IITV[2:0] 28.25 USBFS
28.25
IN
OUT
IN IN
OUT OUT
SOF SOF SOF 2IITV
(1)
USBFS
PIPEPERI.IITV[2:0]
ACLRM FIFO IITV[2:0]
PID = BUF IN SOF
PID = BUF OUT SOF
PID[1:0] NAK STALL USBFS
USB USBFS IITV[2:0] SOF SOF
(2)
USBFS PIPEPERI.IITV[2:0] USBFS 2IITV 1
USBFS PID[1:0] BUF
SOF SOF SOF OUT DATA SOF OUT DATA
USB
PID
NAK
BUF
BUF
BUF
28.13
IITV = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 783 of 1551
RA4W1
28. USB2.0 USBFS
SOF SOF SOF OUT DATA SOF SOF OUT DATA SOF SOF OUT DATA
USB
PID
NAK
BUF
BUF
BUF
BUF
BUF
BUF
28.14
IITV = 1
USB NRDY USB
(a) IN
USBFS IN NRDY
CPU DMAC/DTC FIFO FIFO USBFS IN USBFS FRMNUM.OVRN 1 NRDY
(b) OUT
CPU DMAC/DTC FIFO FIFO OUT USBFS OVRN 1 NRDY Zero-Length
USBFS IITV[2:0]
PIPEnCTR.ACLRM 1
(3)
(a) OUT
PIPEPERI.IITV[2:0] USBFS NRDY
CRC FIFO USBFS USBFS NRDY
NRDY SOF SOF SOF IITV 0 USBFS SOF NRDY
PID[1:0] NAK USBFS SOF NRDY
IITV[2:0]
IITV[2:0] = 0 PID[1:0] 01bBUF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 784 of 1551
RA4W1
28. USB2.0 USBFS
SOF SOF SOF OUT DATA SOF OUT DATA
USB
PID
NAK
NAK
BUF
BUF
28.15
IITV = 0
IITV 0 PID[1:0] BUF
SOF SOF SOF OUT DATA SOF SOF OUT DATA SOF SOF OUT DATA
USB
PID
NAK
BUF
BUF
BUF
BUF
BUF
BUF
28.16
IITV 0
(b) IN
PIPEPERI.IFIS 1 IFIS 0 PIPEPERI.IITV[2:0] USBFS
IFIS 1 FIFO IITV[2:0] IN USBFS FIFO
IN CRC IN USBFS FIFO
FIFO SOF SOF SOF FIFO
OUT IITV[2:0]
USBFS IITV[2:0] 000b
PIPEnCTR.ACLRM 1
USBFS USB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 785 of 1551
RA4W1
28. USB2.0 USBFS
(4)
USBFS FIFO SOF
IN FIFO 1
IN FIFO FIFO Zero-Length
28.17 IITV = 0
(1) 1IN
SOF
SOF
A B
SOF
SOF
(2) 2IN1
A
IN Zerolength
SOF IN
Zerolength
IN A
B
(3) 3IN2
SOF
SOF
IN
IN
Zerolength
A
SOF
A
IN B
B
SOF
(4) IN
SOF
SOF
SOF
IN
IN
IN
Zerolength
A
Zerolength
A
IN B
B
SOF
28.17
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 786 of 1551
RA4W1
28. USB2.0 USBFS
(5)
USBFS IN SOF USBFS IN
FIFO SOF FIFO
PIPEPERI.IITV[2:0]
IITV = 0
IITV 0
28.18 USBFS Zero-Length
SOF
SOF
SOF
SOF
A
B
28.18
28.19 5
IN OUT NRDY FRMNUM.OVRN NRDY NRDY
FIFO
IN
Zero-Length
OUT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 787 of 1551
RA4W1
28. USB2.0 USBFS
SOF (1) (2) (3) (4) 1 (5) 2 (6)
1
1
1
IITV = 1
1 1
1 1
28.19
IITV = 1
28.3.13 SOF
SOF 1ms USBFS SOF SOF SYSCFG.USBE SYSCFG.SCKE 1 SOF
MCU USB Suspended SOF SOF SOF 48MHz 1ms 2 SOF Suspended USB USBFS SOF SOF SOF SOFR
SOF FRMNUM.FRNM[10:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 788 of 1551
RA4W1
28. USB2.0 USBFS
28.3.14
28.3.14.1
DVSTCTR0.UACT 1 USBFS 28.26
28.26
Setup
DIR -- 1
IN OUT
IN OUT
IN OUT
PID -- 1
BUF BUF BUF BUF BUF BUF
IITV0
-- 1
-- 1
2 3
SUREQ
1 -- 1 -- 1 -- 1 -- 1 -- 1 -- 1
1.
2. 3.
Zero-Length
28.3.14.2
USBFS USBFS SOF
1. 1 2 6 7 8 9
2. SETUP DCP SETUP
3. DCP 1 2 3 4 5 ACK NAK 3.
28.3.14.3 USB
DVSTCTR0.UACT 1 SOF UACT 0 SOF Suspended UACT 1 0 SOF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 789 of 1551
RA4W1
28. USB2.0 USBFS
28.3.15
D+
28.3.15.1
USBFS
1. D+/D-
2. 40ms D-
3.
4. 40ms D+
1 VBINT VBSTS VBUS
1. 300 900ms USBBCCTRL0 VDPSRCE0 IDMSINKE0
2. IDPSRCE0
3. D+ High Low LNST IDPSRCE0 0 VDPSRCE0 IDMSINKE0 1
2 VDPSRCE0 IDMSINKE0 40ms CHGDETSTS0 2
3 2 CHGDETSTS0 VDPSRCE0 IDMSINKE0 VDMSRCE0 IDPSINKE0
4 VDMSRCE0 IDPSINKE0 40ms PDDETSTS0
28.20
1. 2.
D+/D- 2 1 D+ 7 13A D+ Logic High D+/D- Logic Low 1 VBUS 300 900ms
D- 0.25 0.4V 0.8 2.0V
USB CHGDETSTS0 D- 0.25 0.4V LNST D- 0.8 2.0V
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 790 of 1551
RA4W1
28. USB2.0 USBFS
VBUS
BATCHGE0 CNEN
300ms?
No Yes
RPDME0 IDPSRCE0 LNST[1:0]
D+Low ?
Yes
RPDME0 IDPSRCE0
No
VDPSRCE0, IDMSINKE0
40ms?
No Yes
CHGDETSTS0
CHGDETSTS0 = 1? Yes
DCP or CDP
No SDP
VDPSRCE0, IDMSINKE0
VDPSRCE0, IDMSINKE0
40ms?
No Yes
PDDETSTS0
PDDETSTS0 = 1? Yes
DCP
No CDP
28.20
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 791 of 1551
RA4W1
28. USB2.0 USBFS
28.3.15.2
USBFS
1. VBUS
2.
3. High D-
4. Low D-
a. 200ms D-
b. 10ms D-
28.3.15.1 D- 1 4 D-
a b D-
3 4 PDDETINT PDDETSTS0 a b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 792 of 1551
RA4W1
28. USB2.0 USBFS
28.21 1 4 a b
VBUS
PDONIDPSINKE0 = 1)
PDON PDDETINTE = 1
PD?
PDDETINT
No
Yes
PDDETSTS0 = 1? No
Yes
Portable Device
?
No
D+?
SCKE = 0
Yes
BCHGLNST
SCKE = 1
ATTCH
Peripheral Device
D- VDMSRCE0
PD?
PDDETINT
No
Yes
?
D+?
No
PDDETSTS0 = 0?
No
Yes
Yes
VDMSRCE0
SCKE = 0 BCHGLNST SCKE = 1 ATTCH
28.21
1 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 793 of 1551
RA4W1
28. USB2.0 USBFS
D- VBUS
VDMSRCE0
?
No
Yes
VDMSRCE0 10ms
No ?
Yes VDMSRCE0
200ms
28.22
a b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 794 of 1551
RA4W1
28. USB2.0 USBFS
28.4
28.4.1
BMSTPCRBUSBFS USBFS 11.
28.4.2
MCU INTSTS0 INTSTS1
28.4.3
PmnPFS.PSEL PmnPFS.PMR High Low MCU INTSTS0 INTSTS1 VBINT OVRCR 1 INTSTS0 INTSTS1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 795 of 1551
RA4W1
29. SCI
29. SCI
29.1
SCI 5
UART ACIA
8
IIC
SPI
ISO/IEC 7816-3 SCI FIFO 29.1 SCI 29.1 29.2 . PCLK PCLKA
29.1
SCI (1/2)
IIC SPI
29.2 LSB MSB
IIC
SCI0 SCI0_DCUF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 796 of 1551
RA4W1
29. SCI
29.1
SCI (2/2)
7 8 9
1 2
CTSn_RTSn
1 16 FIFO SCI0 SCI1 FIFO
SCI0
Low
SPTR
RXDn 8
CTSn_RTSn 1 16 FIFO
IIC
I2CMSB
SPI
400kbps SCLn SDAn 8
SS
SSn High
4
SCIn_ERI 1
SCIn_RXI 1 2 SCIn_TXI 1 2 SCIn_TEI 1 2 SCIn_AM 1
1. 2.
n = 0, 1, 4, 9 FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 797 of 1551
RA4W1
29. SCI
RXDn/SCLn/ MISOn
TXDn/SDAn/ MOSIn
CTSn_RTSn/ SSn
SCKn
RDRHL FRDRH RDR FRDRL
TDRHL FTDRH TDR FTDRL
RSR
TSR
SCMR
SSR/SSR_SMCI/
SSR_FIFO
SCR/SCR_SMCI SMR/SMR_SMCI
SEMR SPMR
FCR FDR LSR CDR DCCR SPTR
BRR MDDR
SIMR1/2/3 SISR
SNFR
PCLK PCLK/4 PCLK/16 PCLK/64 SCIn_TEI SCIn_TXI SCIn_RXI n = 0, 1, 4, 9 SCIn_ERI SCIn_AM
SCI0_DCUF
RSR
RDR
TSR
TDR
SMR/SMR_SMCI
SCR/SCR_SMCI
SSR/SSR_SMCI/SSR_FIFO1
SCMR
BRR
MDDR
SEMR
SPMR
SPI
SNFR
SIMR1/2/3
I2C 1/2/3
SISR
I2C
RDRHL
9
FRDRH/L1 FIFO
TDRHL
9
FTDRH/L1 FIFO
FCR 1
FIFO
FDR 1
FIFO
LSR 1
CDR
DCCR
SPTR
1. SCI0 SCI1
29.1
SCI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 798 of 1551
RA4W1
29. SCI
29.2
SCI
SCI0
SCK0
RXD0/SCL0/ MISO0
TXD0/SDA0/ MOSI0
SS0/CTS0_RTS0
SCI1
SCK1
RXD1/SCL1/ MISO1
TXD1/SDA1/ MOSI1
SS1/CTS1_RTS1
SCI4
SCK4
RXD4/SCL4/ MISO4
TXD4/SDA4/ MOSI4
SS4/CTS4_RTS4
SCI9
SCK9
RXD9/SCL9/ MISO9
TXD9/SDA9/ MOSI9
SS9/CTS9_RTS9
SCI0
SCI0 SCI0 IIC SCI0
SCI0 SCI0 IIC SCI0
SCI0 Low SCI0 Low
SCI1
SCI1 SCI1 IIC SCI1
SCI1 SCI1 IIC SCI1
SCI1 Low SCI1 Low
SCI4
SCI4 SCI4 IIC SCI4
SCI4 SCI4 IIC SCI4
SCI4 Low SCI4 Low
SCI9
SCI9 SCI9 IIC SCI9
SCI9 SCI9 IIC SCI9
SCI9 Low SCI9 Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 799 of 1551
RA4W1
29. SCI
29.2
29.2.1 RSR
RSR RXDn 1 RDR RDRHL FIFO CPU RSR
29.2.2 RDR
SCI0.RDR 4007 0005h, SCI1.RDR 4007 0025h, SCI4.RDR 4007 0085h, SCI9.RDR 4007 0125h
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
RDR 8 1 RSR RSR RSR RDR
RDR SCIn_RXI 1
. RDR CPU RDR
29.2.3 9 RDRHL
SCI0.RDRHL 4007 0010h, SCI1.RDRHL 4007 0030h, SCI4.RDRHL 4007 0090h, SCI9.RDRHL 4007 0130h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RDRHL 16 9
RDRHL 8 RDR RDRHL RDR 7 8 RDRHL
1 RSR RDR RDRHL RSR
RSR RDRHL RDRHL SCIn_RXI RDRHL 1 CPU RDRHL
RDRHL [15:9] 0 0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 800 of 1551
RA4W1
29. SCI
29.2.4 FIFO H, L, HLFRDRH, FRDRL, FRDRHL
FIFO HFRDRH
SCI0.FRDRH 4007 0010h, SCI1.FRDRH 4007 0030h
FIFO LFRDRL
SCI0.FRDRL 4007 0011h, SCI1.FRDRL 4007 0031h
FIFO HLFRDRHL
SCI0.FRDRHL 4007 0010h, SCI1.FRDRHL 4007 0030h
SCIn.FRDRHL
SCIn.FRDRH
SCIn.FRDRL
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
-- RDF ORER FER PER DR MPB
RDAT[8:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b8-b0 RDAT[8:0]
b9
MPB
b10
DR
b11
PER
b12
FER
b13
ORER
b14
RDF
b15
--
FIFO
FIFO
RDAT[8:0] 0 1ID MPBSMR.MP = 1 FIFO
0FRDRH FRDRL
1
0FRDRH FRDRL 1
1FRDRH FRDRL 1
0FRDRH FRDRL 1
1FRDRH FRDRL 1
0 1
0FRDRH FRDRL
1FRDRH FRDRL
0
R/W R
R
R
1
R
R
R
1
R
1
R
1.
SSR_FIFO SSR_FIFO 0
FRDRHL FRDRL FRDRH 16 FRDRH FRDRL 16 FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 801 of 1551
RA4W1
29. SCI
SCI RSR FRDRH FRDRL 1 16 FRDRH FRDRL FRDRH FRDRL CPU FRDRH FRDRL
FRDRH RDFORER DR 1 SSR_FIFO FRDRH SSR_FIFO 0 0 1
FRDRH FRDRL FRDRH FRDRL FRDRHL 16
29.2.5 TDR
SCI0.TDR 4007 0003h, SCI1.TDR 4007 0023h, SCI4.TDR 4007 0083h, SCI9.TDR 4007 0123h
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
TDR 8
SCI TSR TDR TSR
TDR TSR 1 TDR SCI TSR
CPU TDR TDR SCIn_TXI 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 802 of 1551
RA4W1
29. SCI
29.2.6 9 TDRHL
SCI0.TDRHL 4007 000Eh, SCI1.TDRHL 4007 002Eh, SCI4.TDRHL 4007 008Eh, SCI9.TDRHL 4007 012Eh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TDRHL 16 9
TDRHL 8 TDR TDRHL TDR 7 8 TDRHL
TSR TDRHL TSR
TSR TDRHL 1 TDRHL TSR
CPU TDRHL TDRHL [15:9] 1 1 1
TDRHL SCIn_TXI 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 803 of 1551
RA4W1
29. SCI
29.2.7 FIFO H, L, HLFTDRH, FTDRL, FTDRHL
FIFO HFTDRH
SCI0.FTDRH 4007 000Eh, SCI1.FTDRH 4007 002Eh
FIFO LFTDRL
SCI0.FTDRL 4007 000Fh, SCI1.FTDRL 4007 002Fh
FIFO HLFTDRHL
SCI0.FTDRHL 4007 000Eh, SCI1.FTDRHL 4007 002Eh
SCIn.FTDRHL
SCIn.FTDRH
SCIn.FTDRL
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
-- MPBT
TDAT[8:0]
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
b8-b0 b9
b15-b10
R/W
TDAT[8:0]
W
FIFO
MPBT
W
0
1ID
MPBT SMR.MP = 1
FIFO
--
1
W
FTDRHL FTDRH FTDRL 16
FTDRH FTDRL 16 FIFO
SCI TSR FTDRH FTDRL TSR FTDRH FTDRL FTDRHL CPU FTDRH FTDRL
FTDRH FTDRL FTDRH FTDRL
MPBT
FCR.FM = 1 SSR.MPBT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 804 of 1551
RA4W1
29. SCI
29.2.8 TSR
TSR SCI TDRTDRHL FIFO TSR TXDn CPU TSR
29.2.9
SMR (SCMR.SMIF = 0)
SCI0.SMR 4007 0000h, SCI1.SMR 4007 0020h, SCI4.SMR 4007 0080h, SCI9.SMR 4007 0120h
b7
b6
b5
CM CHR PE
0
0
0
b4
b3
b2
PM STOP MP
0
0
0
b1
b0
CKS[1:0]
0
0
b1-b0
CKS[1:0]
b2
MP
b3
STOP
b4
PM
b5
PE
b6
CHR
b7
CM
b1 b0
0 0PCLK n = 01 0 1PCLK/4 n = 11 1 0PCLK/16 n = 21 1 1PCLK/64 n = 31
0 1
01 12
PE = 1 0 1
0 1 0 1
SCMR.CHR1
CHR1 CHR
0 09 0 19 1 08 1 17 3 CHR 2
0IIC 1 SPI
R/W R/W
4
R/W
4
R/W
4
R/W
4
R/W
4
R/W
4
R/W
4
1. 2. 3. 4.
n BRR 10 29.2.17BRR 8 LSB TDR MSB 7 SCR.TE SCR.RE 0
SMR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 805 of 1551
RA4W1
29. SCI
CKS[1:0] 29.2.17BRR
MP PE PM
STOP 1
2 0 PM
PM PE PE 1 PE
CHR SCMR.CHR1 8
CM IIC SPI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 806 of 1551
RA4W1
29. SCI
29.2.10 SMR_SMCI(SCMR.SMIF = 1)
SCI0.SMR_SMCI 4007 0000h, SCI1.SMR_SMCI 4007 0020h, SCI4.SMR_SMCI 4007 0080h, SCI9.SMR_SMCI 4007 0120h
b7
b6
b5
b4
b3
b2
GM BLK PE PM
BCP[1:0]
0
0
0
0
0
0
b1
b0
CKS[1:0]
0
0
b1-b0
CKS[1:0]
b3-b2
BCP[1:0]
b4
PM
b5
PE
b6
BLK
b7
GM
GSM
R/W
b1 b0
0 0PCLK n = 01 0 1PCLK/4 n = 11 1 0PCLK/16 n = 21 1 1PCLK/64 n = 31
R/W
2
SCMR.BCP2 29.3SCMR.BCP2 SMR.BCP[1:0]
R/W
2
PE = 1 0 1
R/W
2
PE1 R/W 2
1
0 1
R/W
2
0 GSM 1GSM
R/W
2
1. 2.
n BRR 10 29.2.17BRR SCR_SMCI.TE SCR_SMCI.RE 0
SMR_SMCI
CKS[1:0]
29.2.17BRR
BCP[1:0] 1
SCMR.BCP2 29.6.4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 807 of 1551
RA4W1
29. SCI
29.3
SCMR.BCP2 SMR_SMCI.BCP[1:0]
SCMR.BCP2 0 0 0 0 1 1 1 1
SMR_SMCI.BCP[1:0]
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
1 93 S = 931 128 S = 1281 186 S = 1861 512 S = 5121 32 S = 321 64 S = 641 372 S = 3721 256 S = 2561
1. S BRR S 29.2.17BRR
PM
29.6.2
PE PE 1
BLK BLK 1 29.6.3
GM GSM GM 1 GSM GSM SSR_SMCI.TEND 11.0ETUETUElementary
Time Unit = 1 29.6.6 29.6.8
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 808 of 1551
RA4W1
29. SCI
29.2.11 SCR(SCMR.SMIF = 0)
SCI0.SCR 4007 0002h, SCI1.SCR 4007 0022h, SCI4.SCR 4007 0082h, SCI9.SCR 4007 0122h
b7
b6
b5
b4
b3
b2
b1
b0
TIE RIE
TE
RE MPIE TEIE
CKE[1:0]
0
0
0
0
0
0
0
0
b1-b0
CKE[1:0]
b1 b0
0 0 I/OSCKn
0 1 SCKn
1 x SEMR.ABCS 0 SCKn 16 SEMR.ABCS 18
R/W
R/W
1
b2
TEIE
b3
MPIE
b4
RE
b5
TE
b6
RIE
b7
TIE
b1 b0
0 x SCKn
1 x SCKn
0SCIn_TEI
R/W
1SCIn_TEI
SMR.MP = 1 R/W
0
3
1 0 SSR RDRF
ORER FER1
1
MPIE 0
0 1
R/W
2
0 1
R/W
2
0SCIn_RXI SCIn_ERI
R/W
1SCIn_RXI SCIn_ERI
0SCIn_TXI
R/W
1SCIn_TXI
x: Don't care
1. TE = 0 RE = 0 2. TE RE 0 SMR.CM 1 1 TE RE
1 TE RE 0 SMR.CM 0 SIMR1.IICM 0 3. SMR.MP = 1 MPIE MPIE 1 MPIE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 809 of 1551
RA4W1
29. SCI
SCR
CKE[1:0]
SCKn
TEIE
SCIn_TEI TEIE 0
IIC STI SCIn_TEI TEIE STI
MPIE
MPIE 1 0 SSR/SSR_FIFO RDRFRDFORER FER 1 1 MPIE 0 29.4
SSR.MPB 0 RSR RDR ORER FER 1
MPB 1 MPIE 0 SCIn_RXI SCIn_ERI SCR.RIE 1 ORER FER 1
MPIE 0
RE
RE 1 RE 1 SMR
FIFO RE 0 SSR RDRFORERFER PER
FIFO RE 0 SSR_FIFO RDFORER FERPERBRKDR
TE
1 TDR TE 1 SMR
RIE
SCIn_RXI SCIn_ERI
RIE 0 SCIn_RXI SCIn_ERI
SCIn_ERI SSR/SSR_FIFO ORERFER PER 1 0 RIE 0
TIE
SCIn_TXI
TIE 0 SCIn_TXI TIE TE 1 1 SCIn_TXI TE TIE 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 810 of 1551
RA4W1
29. SCI
29.2.12 SCR_SMCI(SCMR.SMIF = 1)
SCI0.SCR_SMCI 4007 0002h, SCI1.SCR_SMCI 4007 0022h, SCI4.SCR_SMCI 4007 0082h, SCI9.SCR_SMCI 4007 0122h
b7
b6
b5
b4
b3
b2
b1
b0
TIE RIE
TE
RE MPIE TEIE
CKE[1:0]
0
0
0
0
0
0
0
0
b1-b0
CKE[1:0]
SMR_SMCI.GM = 0
b1 b0
0 0 I/O SCKn
0 1 1 x
R/W
R/W
1
b2
TEIE
b3
MPIE
b4
RE
b5
TE
b6
RIE
b7
TIE
SMR_SMCI.GM = 1
b1 b0
0 0Low x 1 1 0High
0
0
0 1
0 1
0SCIn_RXI SCIn_ERI 1SCIn_RXI SCIn_ERI
0SCIn_TXI 1SCIn_TXI
R/W
R/W
R/W
2
R/W
2
R/W
R/W
x: Don't care
1. TE = 0 RE = 0 2. TE = 0 RE = 0 1 TE RE 1 TE
RE 0
SCR_SMCI
29.10
CKE[1:0] SCKn GSM 29.6.8
TEIE TEIE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 811 of 1551
RA4W1
29. SCI
RE
1 RE 1 SMR_SMCI
RE 0 SSR_SMCI ORERFERPER
TE
1 TDR TE 1 SMR_SMCI
RIE SCIn_RXI SCIn_ERI RIE 0 SCIn_RXI SCIn_ERI SCIn_ERI SSR_SMCI ORERFER PER 1
0 RIE 0
TIE SCIn_TXI TIE 0 SCIn_TXI TIE TE 1
1 SCIn_TXI TE TIE 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 812 of 1551
RA4W1
29. SCI
29.2.13 FIFO SSR(SCMR.SMIF = 0 FCR.FM = 0)
SCI0.SSR 4007 0004h, SCI1.SSR 4007 0024h, SCI4.SSR 4007 0084h, SCI9.SSR 4007 0124h
b7
b6
b5
b4
TDRE RDRF ORER FER
1
0
0
0
b3
b2
b1
b0
PER TEND MPB MPBT
0
1
0
0
b0
MPBT
b1
MPB
b2
TEND
b3
PER
b4
FER
b5
ORER
b6
RDRF
b7
TDRE
0 1ID
0 1ID
0 1
0 1
0 1
0 1
0RDR 1RDR
0TDR 1TDR
R/W R/W
R
R
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
1. 1 0
SSR SCI
MPBT
MPB SCR.RE 0
TEND 1 SCR.TE 0 FCR.FM 0 FIFO SCR.TE 1 TEND 1 TDR
0 SCR.TE 1 TDR SCR.TE 1 TDRE = 1 TDRE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 813 of 1551
RA4W1
29. SCI
PER
1
DCCR.DCME = 0
RDR SCIn_RXI PER 1 RDR 0 1 0 PER 0 PER 0
SCR.RE 0PER
FER
1 0
DCCR.DCME = 0
2 1 2 RDR SCIn_RXI FER 1 RDR 0 1 0 FER 0 FER 0
SCR.RE 0 FER
ORER
1 RDR
RDR ORER 1 RDR 0 1 0 ORER 0 OPER 0
SCR.RE 0 ORER
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 814 of 1551
RA4W1
29. SCI
RDRF RDR 1 RSR RDR 0 1 0 RDR
. SSR RDRF RDRF
TDRE TDR 1 SCR.TE 0 TDR TSR
0 1 0 SCR.TE 1 TDR . SSR TDRE TDRE
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 815 of 1551
RA4W1
29. SCI
29.2.14 FIFO SSR_FIFO(SCMR.SMIF = 0 FCR.FM = 1)
SCI0.SSR_FIFO 4007 0004h, SCI1.SSR_FIFO 4007 0024h
b7
b6
b5
b4
b3
b2
b1
b0
TDFE RDF ORER FER PER TEND --
DR
1
0
0
0
0
0
x
0
x
b0
b1 b2 b3 b4 b5 b6
b7
DR
-- TEND PER FER ORER RDF
TDFE
FIFO
FIFO
R/W
0 FRDRHL FIFO
1FIFO
R/(W)
1
1 R/W
0 1
R/(W)
1
0 1
R/(W)
1
0 1
R/(W)
1
0 1
R/(W)
1
0FRDRHL
1FRDRHL
R/(W)
1
0FTDRHL
1FTDRHL
R/(W)
1
1. 1 0
SSR_FIFO FIFO
DR
FIFO FRDRHL 15ETUElementary Time Units FIFO
1
1
FRDRHL 15ETU 1 SSR_FIFO.FER SSR_FIFO.PER 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 816 of 1551
RA4W1
29. SCI
0 DR 1 FCR.FM 0 1
1. 15ETU 8 1 1.5
TEND FTDRHL
1 1 FTDRHL
0 SCR.TE 1 FTDRHL SCR.TE 1 TEND 1 TEND 0 FCR.FM 0 1
PER DCCR.DCME = 0FRDRHL
1 DCCR.DCME = 0 0 1 0
FRDRHL
SCR.RE 0 PER FER
DCCR.DCME = 0FRDRHL 1
0 DCCR.DCME = 0
0 1 0 FRDRHL SCR.RE 0 FER
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 817 of 1551
RA4W1
29. SCI
ORER
1 FIFO 16
0 1 0
SCR.RE 0 ORER
RDF FIFO FRDRHL
RTRG 0 FIFO 0 RDF 1
FRDRHL 1 FIFO
0 1 0
FRDRHL DMAC DTC
1 0 FRDRHL RTRG 1PCLK RDF 1
. SSR RDF RDF
1.
FRDRHL 16 FIFO RDF 1 FRDRHL
TDFE FIFO FTDRHL TSR FTDRHL
FTDRHL 1 SCR.TE 0
FTDRHL 1
0 DTC DMAC FTDRHL
1 0 1 0 TDFE 0 FTDRHL TTRG 1PCLK TDFE 1
. SSR TDFE TDFE
1.
FTDRHL 16 FIFO TDFE 1 "16 - FDR.T[4:0]"
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 818 of 1551
RA4W1
29. SCI
29.2.15 SSR_SMCI(SCMR.SMIF = 1)
SCI0.SSR_SMCI 4007 0004h, SCI1.SSR_SMCI 4007 0024h, SCI4.SSR_SMCI 4007 0084h, SCI9.SSR_SMCI 4007 0124h
b7
b6
b5
b4
TDRE RDRF ORER ERS
1
0
0
0
b3
b2
b1
b0
PER TEND MPB MPBT
0
1
0
0
b0
MPBT
b1
MPB
b2
TEND
b3
PER
b4
ERS
b5
ORER
b6
RDRF
b7
TDRE
0
0
0 1
0 1
0 Low 1 Low
0 1
0RDR 1RDR
0TDR 1TDR
R/W R/W
R
R
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
1. 1 0
SSR_SMCI
TEND TDR TEND
1
1 SCR_SMCI.TE = 0 SCR_SMCI.TE 0 1
TEND 1 1 ERS 0 TDR
1 SMR_SMCI.GM = 0 SMR_SMCI.BLK = 0 12.5ETU
SMR_SMCI.GM = 0 SMR_SMCI.BLK = 1 11.5ETU
SMR_SMCI.GM = 1 SMR_SMCI.BLK = 0 11.0ETU
SMR_SMCI.GM = 1 SMR_SMCI.BLK = 1 11.0ETU
0 SCR_SMCI.TE 1 TDR SCR_SMCI.TE 1 TDRE = 1 TDRE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 819 of 1551
RA4W1
29. SCI
PER
1 RDR
SCIn_RXI PER 1 RDR
0 1 0
PER 0 PER 0
SCR_SMCI.RE 0PER
ERS 1 Low
0 1 0
ORER
1 RDR
RDR ORER 1 RDR
0 1 0
ORER 0 ORER 0
SCR_SMCI.RE 0 ORER
RDRF RDR 1 RSR RDR
0 1 0 RDR
. SSR RDRF RDRF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 820 of 1551
RA4W1
29. SCI
TDRE TDR 1 SCR_SMCI.TE 0 TDR TSR
0 1 0 SCR_SMCI.TE 1 TDR
. SSR TDRE TDRE
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 821 of 1551
RA4W1
29. SCI
29.2.16 SCMR
SCI0.SCMR 4007 0006h, SCI1.SCMR 4007 0026h, SCI4.SCMR 4007 0086h, SCI9.SCMR 4007 0126h
b7
b6
BCP2 --
1
1
b5
b4
b3
b2
b1
b0
-- CHR1 SDIR SINV -- SMIF
1
1
0
0
1
0
b0
SMIF
b1
--
b2
SINV
b3
SDIR
b4
CHR1
1
b6-b5 b7
-- BCP2
2
R/W
0 SPI IIC
1
R/W
1
11
R/W
0TDR RDR
1TDR RDR
SPI IIC 0
R/W
1
0LSB 1MSB
SPI IIC 1
R/W
1
2
SMR.CHR
CHR1 CHR
0 0 9 0 1 9 1 0 8 1 1 7 3
R/W
1
11
R/W
SMR_SMCI.BCP[1:0] 29.4SCMR.BCP2 SMR_SMCI.BCP[1:0]
R/W
1
1.
2. 3.
SCR/SCR_SMCI TE RE 0
8 LSB TDR MSB 7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 822 of 1551
RA4W1
29. SCI
SCMR
SMIF SMIF 1 0
SPI IIC
SINV
SMR SMR_SMCI PM
CHR1 1 SMR CHR 8
BCP2 2 1
SMR_SMCI.BCP[1:0]
29.4
SCMR.BCP2 SMR_SMCI.BCP[1:0]
SCMR.BCP2 0 0 0 0 1 1 1 1
SMR_SMCI.BCP[1:0] 00 01 10 11 00 01 10 11
1 93S = 931 128S = 1281 186S = 1861 512S = 5121 32S = 321 64S = 641 372S = 3721 256S = 2561
1. S BRR S 29.2.17BRR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 823 of 1551
RA4W1
29. SCI
29.2.17 BRR
SCI0.BRR 4007 0001h, SCI1.BRR 4007 0021h, SCI4.BRR 4007 0081h, SCI9.BRR 4007 0121h
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
BRR 8
SCI SPI IIC BRR N B 29.5
BRR FFh BRR CPU SCR/SCR_SMCI TE RE 0
29.5
BRR NB
SEMR
BGDM ABCS ABCSE
0
0
0
1
0
0
BRR
PCLK � 106
N =
- 1
64 � 22n-1 � B
PCLK � 106
N =
- 1
0
1
0
32 � 22n-1 � B
(%) = {
PCLK � 106 B � 64 � 22n-1 � (N + 1)
- 1 } � 100
(%) = {
PCLK � 106 B � 32 � 22n-1 � (N + 1)
- 1 } � 100
1
1
0
Don't Don't
1
care care
SPI
IIC1
PCLK � 106
N =
- 1
16 � 22n-1 � B
PCLK � 106
N =
- 1
12 � 22n-1 � B
PCLK � 106
N =
- 1
8 � 22n-1 � B
PCLK � 106
N =
- 1
S � 22n+1 � B
PCLK � 106
N =
- 1
64 � 22n-1 � B
(%) = {
PCLK � 106 B � 16 � 22n-1 � (N + 1)
(%) = {
PCLK � 106 B � 12 � 22n-1 � (N + 1)
- 1 } � 100 - 1 } � 100
(%) = {
PCLK � 106 B � S � 22n+1 � (N + 1)
- 1 } � 100
Bbps N BRR 0 N 255 PCLKMHz n S 29.7 29.8 SMR/SMR_SMCI SCMR 1. IIC SCLn High/Low I2C
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 824 of 1551
RA4W1
29. SCI
29.6
IIC
SCL High/Low
SCL High min
(N + 1) � 4 � 22n-1 � 7 �
1 PCLK � 106
Low min
(N + 1) � 4 � 22n-1 � 8 �
1 PCLK � 106
29.7
SMR/SMR_SMCI.CKS[1:0]
CKS[1:0]
n
0 0
PCLK
0
0 1
PCLK/4
1
1 0
PCLK/16
2
1 1
PCLK/64
3
29.8
SCMR.BCP2 0 0 0 0 1 1 1 1
SMR_SMCI.BCP[1:0]
0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1
1 93 128 186 512 32 64 372 256
S 93 128 186 512 32 64 372 256
BRR N 29.9 29.10 29.11 BRR N 29.14
IIC BRR N 29.17 1 S 29.6.4 29.12 29.13
SEMR ABCSBGDM 1 29.16 2 1 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 825 of 1551
RA4W1
29. SCI
29.9
BRR 1
PCLKMHz
8
9.8304
10
12
12.288
bps n N % n N % n N % n N % n N %
110 2 141 0.03
2 174 -0.26
2 177 -0.25
2 212 0.03
2 217 0.08
150 2 103 0.16
2 127 0.00
2 129 0.16
2 155 0.16
2 159 0.00
300 1 207 0.16
1 255 0.00
2 64 0.16
2 77 0.16
2 79 0.00
600 1 103 0.16
1 127 0.00
1 129 0.16
1 155 0.16
1 159 0.00
1200 0 2400 0
207 0.16 103 0.16
0 255 0.00 0 127 0.00
1 64 0.16 0 129 0.16
1 77 0.16 0 155 0.16
1 79 0.00 0 159 0.00
4800 0 51 0.16
0 63 0.00
0 64 0.16
0 77 0.16
0 79 0.00
9600 0 25 0.16
0 31 0.00
0 32 -1.36
0 38 0.16
0 39 0.00
19200 0 12 0.16
0 15 0.00
0 15 1.73
0 19 -2.34
0 19 0.00
31250 0 7 0.00
0 9 -1.70
0 9 0.00
0 11 0.00
0 11 2.40
38400 -- -- --
0 7 0.00
0 7 1.73
0 9 -2.34
0 9 0.00
PCLKMHz
14
16
17.2032
18
19.6608
bps n N % n N % n N % n N % n N %
110 2 248 -0.17
3 70 0.03
3 75 0.48
3 79 -0.12
3 86 0.31
150 2 181 0.16
2 207 0.16
2 223 0.00
2 233 0.16
2 255 0.00
300 2 90 0.16
2 103 0.16
2 111 0.00
2 116 0.16
2 127 0.00
600 1 181 0.16
1 207 0.16
1 223 0.00
1 233 0.16
1 255 0.00
1200 1 90 0.16
1 103 0.16
1 111 0.00
1 116 0.16
1 127 0.00
2400 0 181 0.16
0 207 0.16
0 223 0.00
0 233 0.16
0 255 0.00
4800 0 90 0.16
0 103 0.16
0 111 0.00
0 116 0.16
0 127 0.00
9600 0 45 -0.93
0 51 0.16
0 55 0.00
0 58 -0.69
0 63 0.00
19200 0 22 -0.93
0 25 0.16
0 27 0.00
0 28 1.02
0 31 0.00
31250 0 13 0.00
0 15 0.00
0 16 1.20
0 17 0.00
0 19 -1.70
38400 -- -- --
0 12 0.16
0 13 0.00
0 14 -2.34
0 15 0.00
.
SEMR.ABCS = 0SEMR.ABCSE = 0 SEMR.BGDM = 0
ABCS BGDM 1 2
ABCS BGDM 1 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 826 of 1551
RA4W1
29. SCI
29.10
BRR 2
bps n
110 3
150 3
20
N % n
88 -0.25
3
64 0.16
3
PCLKMHz
25
30
N % n N % n
110 -0.02
3 132 0.13
3
80 0.47
3 97 -0.35
3
33
N % n
145 0.33
3
106 0.39
3
300 2 129 0.16
2 162 -0.15
2 194 0.16
2 214 -0.07
3
600 2 64 0.16
2 80 0.47
2 97 -0.35
2 106 0.39
2
1200 1 129 0.16
1 162 -0.15
1 194 0.16
1 214 -0.07
2
2400 1 64 0.16
1 80 0.47
1 97 -0.35
1 106 0.39
1
4800 0 129 0.16
0 162 -0.15
0 194 0.16
0 214 -0.07
1
9600 0 64 0.16
0 80 0.47
0 97 -0.35
0 106 0.39
0
19200 0 32 -1.36
0 40 -0.76
0 48 -0.35
0 53 -0.54
0
31250 0 19 0.00
0 24 0.00
0 29 0.00
0 32 0.00
0
38400 0 15 1.73
0 19 1.73
0 23 1.73
0 26 -0.54
0
40 N % 177 -0.25 129 0.16 64 0.16 129 0.16 64 0.16 129 0.16 64 0.16 129 0.16 64 0.16 39 0.00 32 -1.36
.
SEMR.ABCS = 0SEMR.ABCSE = 0 SEMR.BGDM = 0
ABCS BGDM 1 2
ABCS BGDM 1 4
29.11
(1/2)
SEMR
PCLK BGDM ABCS ABCSE MHz n N
8
0
0
0
00
SEMR
PCLK BGDM ABCS ABCSE
bps MHz n N
250000 17.2032 0
0
0
00
bps
537600
1
0
00
500000
1
0
00
1075200
1
0
0
00
1
0
0
00
1
0
00
1000000
1
0
00
2150400
Don't Don't 1 care care
00
1333333
Don't Don't 1 care care
00
2867200
9.8304
0
0
0
00
307200 18
0
0
0
00
562500
1
0
00
614400
1
0
00
1125000
1
0
0
00
1
0
0
00
1
0
00
1228800
1
0
00
2250000
Don't Don't 1 care care
00
1638400
Don't Don't 1 care care
00
3000000
10
0
0
0
00
312500 19.6608 0
0
0
00
614400
1
0
00
625000
1
0
00
1228800
1
0
0
00
1
0
0
00
1
0
00
1250000
1
0
00
2457600
Don't Don't 1 care care
00
1666666
Don't Don't 1 care care
00
3276800
12
0
0
0
00
375000 20
0
0
0
00
625000
1
0
00
750000
1
0
00
1250000
1
0
0
00
1
0
0
00
1
0
00
1500000
1
0
00
2500000
Don't Don't 1 care care
00
2000000
Don't Don't 1 care care
00
3333333
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 827 of 1551
RA4W1
29. SCI
29.11
(2/2)
SEMR
PCLK BGDM ABCS ABCSE MHz n N
12.288
0
0
0
00
SEMR
PCLK BGDM ABCS ABCSE
bps MHz n N
384000 25
0
0
0
00
bps
781250
1
0
1
0
0
00 00
768000
1
0
1
0
0
00 00
1562500
1
0
00
1536000
1
0
00
3125000
Don't Don't 1 care care
00
2048000
Don't Don't 1 care care
00
4166666
14
0
0
0
00
437500 30
0
0
0
00
937500
1
0
00
875000
1
0
00
1875000
1
0
0
00
1
0
0
00
1
0
00
1750000
1
0
00
3750000
Don't Don't 1 care care
00
2333333
Don't Don't 1 care care
00
5000000
16
0
0
0
00
500000 33
0
0
0
00
1031250
1
0
00
1000000
1
0
00
2062500
1
0
0
00
1
0
0
00
1
0
00
2000000
1
0
00
4125000
Don't Don't 1 care care
00
2666666
Don't Don't 1 care care
00
5500000
40
0
0
0
00
1250000
1
0
00
2500000
1
0
0
00
1
0
00
5000000
Don't Don't 1 care care
00
6666666
29.12
PCLK (MHz) 8
MHz 2.0000
bps
SEMR.ABCS = 0
SEMR.ABCS = 1
125000
250000
9.8304
2.4576
153600
307200
10
2.5000
156250
312500
12
3.0000
187500
375000
12.288
3.0720
192000
384000
14
3.5000
218750
437500
16
4.0000
250000
500000
17.2032
4.3008
268800
537600
18
4.5000
281250
562500
19.6608
4.9152
307200
614400
20
5.0000
312500
625000
25
6.2500
390625
781250
30
7.5000
468750
937500
33
8.2500
515625
1031250
40
10.0000
625000
1250000
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 828 of 1551
RA4W1
29. SCI
29.13
BRR SPI
bps
110 250 500 1k 2.5k 5k 10k 25k 50k 100k 250k 500k 1M 2.5M
8
n
N
10
n
N
16
n
N
PCLKMHz
20
25
n
N
n
N
30
n
N
33
n
N
3
124 -- -- 3
249
2
249 -- -- 3
124 -- --
3
233
2
124 -- -- 2
249 -- -- 3
97 3
116 3
128
1
199 1
249 2
99 2
124 2
155 2
187 2
205
1
99 1
124 1
199 1
249 2
77 2
93 2
102
0
199 0
249 1
99 1
124 1
155 1
187 1
205
0
79 0
99 0
159 0
199 0
249 1
74 1
82
0
39 0
49 0
79 0
99 0
124 0
149 0
164
0
19 0
24 0
39 0
49 0
62 0
74 0
82
0
7
0
9
0
15 0
19 0
24 0
29 0
32
0
3
0
4
0
7
0
9
----0
14 -- --
0
1
0
3
0
4
------------
0
0
1
0
1
----0
2
----
5M
0
0
------------
1
7.5M
0
0
1
40
n
N
3
155
2
249
2
124
1
249
1
99
1
49
0
99
0
39
0
19
0
9
0
3
0
1
--
1. 1 1 1 1 8 9 8/9
29.14
8 10 12 14 16 18 20 25 30 33 40
SPI
PCLKMHz
MHz 1.3333
Mbps 1.3333333
1.6667
1.6666667
2.0000 2.3333
2.0000000 2.3333333
2.6667
2.6666667
3.0000
3.0000000
3.3333
3.3333333
4.1667
4.1666667
5.0000
5.0000000
5.5000
5.5000000
6.6667
6.6666667
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 829 of 1551
RA4W1
29. SCI
29.15
BRR n = 0S = 372
bps n 9600 0
7.1424 N % 0 0.00
PCLKMHz
10.00
10.7136
n N %
n N %
0 1 30
0 1 25
13.00 n N % 0 1 8.99
bps n 9600 0
14.2848 N % 1 0.00
PCLKMHz
16.00
18.00
n N %
n N %
0 1 12.01
0 2 15.99
20.00 n N % 0 2 6.66
bps n 9600 0
25.00 N % 3 12.49
PCLKMHz
30.00
33.00
n N %
n N %
0 3 5.01
0 4 7.59
40.00 n N % 0 5 -6.66
29.16
10.00 10.7136 13.00 16.00 18.00 20.00 25.00 30.00 33.00 40.00
S = 32
PCLKMHz
bps
n
156250
0
N 0
167400
0
0
203125
0
0
250000
0
0
281250
0
0
312500
0
0
390625
0
0
468750
0
0
515625
0
0
625000
0
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 830 of 1551
RA4W1
29. SCI
29.17
BRR IIC
bps n
10k
0
8
N % n
24 0.0
0
PCLKMHz
10
16
N % n N % n
30 0.8
1 12 -3.8
1
25k
0 9 0.0
0 12 -3.8
1 4 0.0
1
50k
0 4 0.0
0 5 4.2
1 2 -16.7
1
100k
0 2 -16.7
0 3 -21.9
0 4 0.0
0
1
250k
0 0 0.0
0 0 25
0 1 0.0
0
350k
0
400k
0
1
20
N % n
15 -2.3
1
5 4.2
1
2 4.2
1
6 -10.7
1
2 -16.7
0
1 -10.7
0
1 -21.9
0
25 N % 19 -2.3 7 -2.3 3 -2.3 1 -2.3
2 4.2 1 11.62 1 -2.32
bps n
10k
1
25k
1
50k
1
100k
1
1
250k
0
350k
0
400k
0
1
PCLKMHz
30
33
N % n N % n
22 1.9
1 25 -0.8
0
8 4.2
1 9 3.1
0
4 -6.3
1 4 3.1
0
2 -21.9
1 2 -14.1
0
3 -6.3
0 3 3.1
0
2 -10.7
0 2 -1.8
0
2 -21.9
0 2 -14.1
0
40 N % 124 0.0 49 0.0 24 0.0 12 -3.9
4 0.0 3 -10.7 3 -21.9
1. 2.
100kbps 400kbps Low 1.3s
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 831 of 1551
RA4W1
29. SCI
29.18
SCL High/Low IIC
PCLKMHz
8
10
16
20
SCL High/Low
SCL High/Low
SCL High/Low
SCL High/Low
bps n N s n N s n N s n N s
10k
0 24 43.75/50.00
0 30 43.40/49.60
1 12 45.5/52.00
1 15 44.80/51.20
25k
0 9 17.50/20.00
0 12 18.2/20.80
1 4 17.50/20.00
1 5 16.80/19.20
50k
0 4 8.75/10.00
0 5 8.40/9.60
1 2 10.50/12.00
1 2 8.40/9.60
100k
0 2 5.25/6.00
0 3 5.60/6.40
0 4 4.38/5.00
0 6 4.90/5.60
250k 350k
0 0 1.75/2.00
0 0 1.40/1.60
0 1 1.75/2.00
0 2 2.10/2.40 0 1 1.40/1.60
400k
0 1 1.40/1.60
PCLKMHz
25
30
33
40
SCL High/Low
SCL High/Low
SCL High/Low
SCL High/Low
bps n N s n N s n N s n N s
10k
1 19 44.80/51.20
1 22 42.93/49.60
1 25 44.12/50.42
0 124 43.75/50.00
25k
1 7 17.92/20.48
1 8 16.80/19.20
1 9 16.97/19.39
0 49 17.50/20.00
50k
1 3 8.96/10.24
1 4 9.33/10.66
1 4 8.48/9.70
0 24 8.75/10.00
100k
1 1 4.48/5.12
1 2 5.60/6.40
1 2 5.09/5.82
0 12 4.55/5.20
250k
0 2 1.68/1.92
0 3 1.86/2.13
0 3 1.70/1.94
0 4 1.75/2.00
350k
0 1 1.12/1.281 0 2 1.40/1.60
0 2 1.27/1.45
0 3 1.40/1.60
400k
0 1 1.12/1.281 0 2 1.40/1.60
0 2 1.27/1.45
0 3 1.40/1.60
1. Low 1.3s 29.17
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 832 of 1551
RA4W1
29. SCI
29.2.18 MDDR
SCI0.MDDR 4007 0012h, SCI1.MDDR 4007 0032h, SCI4.MDDR 4007 0092h, SCI9.MDDR 4007 0132h
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
MDDR BRR
SEMR.BRME 1 MDDR M/256MDDR M B 29.19
MDDR FFh 7 1
MDDR CPU SCR/SCR_SMCI TE RE 0
29.19
MDDR MB
SEMR
BGDM ABCS ABCSE
BRR
0
0
0
PCLK � 106
N =
- 1
64 � 22n-1 � (256/M) � B
1
0
0
% = {
PCLK � 106
B � 64 � 22n-1 � (256/M) � (N + 1)
- 1 } � 100
0
1
PCLK � 106
%
PCLK � 106
N =
- 1
= {
- 1 } � 100
0
32 � 22n-1 � (256/M) � B
B � 32 � 22n-1 � (256/M) � (N + 1)
1
1
0
Don't Don't
1
care care
PCLK � 106
N =
- 1
16 � 22n-1 � (256/M) � B
PCLK � 106
N =
- 1
12 � 22n-1 � (256/M) � B
% = {
PCLK � 106
B � 16 � 22n-1 � (256/M) � (N + 1)
- 1 } � 100
%
PCLK � 106
= {
B � 12 � 22n-1 � (256/M) � (N + 1)
- 1 } � 100
SPI1
PCLK � 106
N =
- 1
8 � 22n-1 � (256/M) � B
PCLK � 106
N =
- 1
S � 22n+1 � (256/M) � B
%
PCLK � 106
= {
B � S � 22n+1 � (256/M) � (N + 1)
-1 } � 100
I2C2
PCLK � 106
N =
- 1
64 � 22n-1 � (256/M) � B
Bbps MMDDR 128 MDDR 255 N BRR 0 N 255 PCLKMHz n S 29.7 29.8 SMR/SMR_SMCI SCMR 29.2.17BRR 1. SPI SMR.CKS[1:0] = 00bSCR.CKE[1] = 0
BRR = 0 2. IIC SCLn High/Low I2C
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 833 of 1551
RA4W1
29. SCI
BRR N MDDR M 29.20
29.20
BRR MDDR1
PCLKMHz
bps n N
8
BGDM M % n N
9.8304
BGDM M % n N
38400 0 5 236
0
0.03
0 7 256 0
1
0.00 0 10
57600 0 3 236
0
115200 0 1 236
0
230400 0 0 236
0
460800 0 0 236
1
0.03
0 4 240
0
0.03
0 1 192
0
0.03
0 0 192
0
0.03
0 0 192
1
0.00 0 4 0.00 0 4 0.00 0 1 0.00 0 0
16
BGDM M 173 1
%
-0.01
236 0
0.03
236 1
0.03
189 1
0.14
189 1
0.14
PCLKMHz
bps n N
12
BGDM M % n N
12.288
BGDM M % n N
14
BGDM M
%
38400 0 8 236
0
0.03
0 9 256 0
1
0.00 0 16 191 1
0.00
57600 0 5 236
0
0.03
0 4 192
0
0.00 0 13 236 1
0.03
115200 0 2 236
0
0.03
0 4 192
1
0.00 0 6 236 1
0.03
230400 0 2 236
1
0.03
0 2 230
1
-0.17 0 2 202 1
-0.11
460800 0 0 157
1
-0.18 0 0 154
1
-0.26 0 0 135 1
0.14
PCLKMHz
bps n N
16
BGDM M % n N
17.2032
BGDM M % n N
18
BGDM M
%
38400 0 11 236
0
0.03
0 13 256 0
1
0.00 0 18 166 1
-0.01
57600 0 7 236
0
0.03
0 6 192
0
0.00 0 18 249 1
-0.01
115200 0 3 236
0
0.03
0 6 192
1
0.00 0 8 236 1
0.03
230400 0 1 236
0
0.03
0 3 219
1
-0.20 0 1 210 0
0.14
460800 0 1 236
1
0.03
0 1 219
1
-0.20 0 0 210 0
0.14
PCLKMHz
bps n N
19.6608
BGDM M % n N
20
BGDM M % n N
25
BGDM M
%
38400 0 15 256 0
0.00
0 10 173
0
-0.01 0 11 151 0
0.00
1
57600 0 9 240
0
0.00
0 9 236
0
0.03 0 7 151 0
0.00
115200 0 4 240
0
0.00
0 4 236
0
0.03 0 3 151 0
0.00
230400 0 1 192
0
0.00
0 4 236
1
0.03 0 1 151 0
0.00
460800 0 0 192
0
0.00
0 0 189
0
0.14 0 0 151 0
0.00
PCLKMHz
bps n N
30
BGDM M % n N
33
BGDM M % n N
40
BGDM M
%
38400 0 36 194
1
0.01
0 14 143
0
0.01 0 21 173 0
-0.01
57600 0 10 173
0
-0.01 0 9 143
0
0.01 0 38 230 1
-0.01
115200 0 10 173
1
-0.01 0 4 143
0
0.01 0 9 236 0
0.03
230400 0 6 220
1
-0.09 0 4 143
1
0.01 0 4 236 0
0.03
460800 0 3 252
1
0.14
0 1 229
0
0.10 0 4 236 1
0.03
1.
SEMR ABCS ABCSE 0 SEMR.BRME = 0M = 256
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 834 of 1551
RA4W1
29. SCI
29.2.19 SEMR
SCI0.SEMR 4007 0007h, SCI1.SEMR 4007 0027h, SCI4.SEMR 4007 0087h, SCI9.SEMR 4007 0127h
b7
b6
b5
b4
b3
b2
b1
b0
RXDES EL
BGDM
NFEN
ABCS ABCSE BRME
--
--
0
0
0
0
0
0
0
0
b1-b0 b2 b3
b4 b5
b6 b7
-- BRME
ABCSE
1
ABCS
NFEN
BGDM
RXDESEL
R/W
00
R/W
0 1
R/W
1
SCR.CKE[1] = 0 01SEMR BGDM
ABCS 11 6
R/W
1
016 1 18 1
R/W
1
0RXDn 1RXDn IIC 0SCLn SDAn 1SCLn SDAn NFEN0
R/W
1
SCR.CKE[1] = 0 R/W
0
1
1 2
0RXDn Low 1RXDn
R/W
1
1.
SCR/SCR_SMCI TE RE 0
SEMR 1
BRME
ABCSE 1
1 6 2 6 ABCSE SMR.CKS[1:0] = 00bBRR = 0 0
ABCS
1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 835 of 1551
RA4W1
29. SCI
NFEN
RXDn
IIC SDAn SCLn
NFEN 0
BGDM 2
SMR.CM = 0 SCR.CKE[1] = 0 2 BGDM 1 1/2 2
0
RXDESEL
RXDn 1 High 1
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 836 of 1551
RA4W1
29. SCI
29.2.20 SNFR
SCI0.SNFR 4007 0008h, SCI1.SNFR 4007 0028h, SCI4.SNFR 4007 0088h, SCI9.SNFR 4007 0128h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
NFCS[2:0]
0
0
0
0
0
0
0
0
b2-b0
NFCS[2:0]
b2
b0
0 0 01
R/W
R/W
1
b7-b3
--
IIC SMR.CKS[1:0]
b2
b0
0 0 11
0 1 02
0 1 14
1 0 08
00
R/W
1.
SCR/SCR_SMCI TE RE 0
SNFR
NFCS[2:0]
000b IIC 001b 100b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 837 of 1551
RA4W1
29. SCI
29.2.21 I2C 1SIMR1
SCI0.SIMR1 4007 0009h, SCI1.SIMR1 4007 0029h, SCI4.SIMR1 4007 0089h, SCI9.SIMR1 4007 0129h
b7
b6
b5
b4
b3
b2
b1
b0
IICDL[4:0]
--
-- IICM
0
0
0
0
0
0
0
0
b0
IICM
IIC
b2-b1 b7-b3
-- IICDL[4:0]
SDA
SMIF IICM
0 0 SPI
0 1 IIC 1 0 1 1
0 0
b7
b3
0 0 0 0 0
0 0 0 0 1 0 1
0 0 0 1 0 1 2
0 0 0 1 1 2 3
0 0 1 0 0 3 4
0 0 1 0 1 4 5
1 1 1 1 0 29 30
1 1 1 1 1 30 31
R/W R/W
1
R/W R/W
1
1. SCR.TE SCR.RE 0
SIMR1 IIC SDAn
IICM IIC
IICM SCMR.SMIF
IICDL[4:0] SDA
SCLn SDAn
31 SMR.CKS[1:0] PCLK IIC 00000b IIC 00001b 11111b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 838 of 1551
RA4W1
29. SCI
29.2.22 I2C 2SIMR2
SCI0.SIMR2 4007 000Ah, SCI1.SIMR2 4007 002Ah, SCI4.SIMR2 4007 008Ah, SCI9.SIMR2 4007 012Ah
b7
b6
b5
b4
b3
b2
b1
b0
--
--
IICACK T
--
--
--
IICCSC
IICINT M
0
0
0
0
0
0
0
0
b0
IICINTM
IIC
b1
IICCSC
b4-b2 b5
-- IICACKT
ACK
b7-b6 --
0ACK/NACK 1
0 1
00
0ACK 1NACK ACK/NACK
00
R/W R/W
1
R/W
1
R/W R/W
R/W
1. SCR.TE SCR.RE 0
SIMR2 IIC
IICINTM IIC IIC
IICCSC SCLn Low
SCLn IICCSC 1 0 SCLn SCLn
BRR SCLn 1
IICACKT ACK ACK ACK/NACK IICACKT 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 839 of 1551
RA4W1
29. SCI
29.2.23 I2C 3SIMR3
SCI0.SIMR3 4007 000Bh, SCI1.SIMR3 4007 002Bh, SCI4.SIMR3 4007 008Bh, SCI9.SIMR3 4007 012Bh
b7
b6
IICSCLS[1:0]
0
0
b5
b4
b3
b2
b1
b0
IICSDAS[1:0]
IICSTIF
IICSTP REQ
IICRST AREQ
IICSTA REQ
0
0
0
0
0
0
b0 b1 b2 b3
b5-b4
b7-b6
IICSTAREQ IICRSTAREQ IICSTPREQ IICSTIF
IICSDAS[1:0]
IICSCLS[1:0]
SDA
SCL
0 1 1 3 5 6
0 1 2 3 5 6
0 1 2 3 5 6
0 1
IICSTIF 004
b5 b4
0 0 0 1 1 0SDAn Low 1 1SDAn
b7 b6
0 0 0 1 1 0SCLn Low 1 1SCLn
R/W R/W R/W R/W R/W
4
R/W
R/W
1. 2. 3. 4. 5.
6.
IICSTAREQ IICRSTAREQ IICSTPREQ 2 1 0 1 IICSTIF 0 1 0 1 0
IICSTAREQ IICSTAREQ 1 IICSDAS[1:0]
IICSCLS[1:0] 01b 1 1 0
IICRSTAREQ IICSDAS[1:0] IICSCLS[1:0] 01b
IICRSTAREQ 1 1 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 840 of 1551
RA4W1
29. SCI
IICSTPREQ IICSDAS[1:0] IICSCLS[1:0] 01b
IICSTPREQ 1 1 1 0
IICSTIF IICSTAREQ IICRSTAREQ
IICSTPREQ IICSTIF 0
SCR.TEIE IICSTIF 1 STI 1
0 0
0 0 IICSTIF 0 SIMR1.IICM 0 IIC SCR.TE 0
IICSDAS[1:0] SDA SDAn IICSDAS[1:0] IICSCLS[1:0]
IICSCLS[1:0] SCL SCLn IICSCLS[1:0] IICSDAS[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 841 of 1551
RA4W1
29. SCI
29.2.24 I2C SISR
SCI0.SISR 4007 000Ch, SCI1.SISR 4007 002Ch, SCI4.SISR 4007 008Ch, SCI9.SISR 4007 012Ch
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
IICACK R
0
0
x
x
0
x
0
0
x
R/W
b0
IICACKR
ACK
0ACK
R
1NACK
b1
--
0
R
b2
--
R
b3
--
0
R
b5-b4
--
R
b7-b6
--
0
R
SISR IIC
IICACKR ACK
IICACKR ACK/NACK IICACKR ACK/NACK SCLn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 842 of 1551
RA4W1
29. SCI
29.2.25 SPI SPMR
SCI0.SPMR 4007 000Dh, SCI1.SPMR 4007 002Dh, SCI4.SPMR 4007 008Dh, SCI9.SPMR 4007 012Dh
b7
b6
b5
b4
b3
b2
b1
b0
CKPH CKPOL -- MFF -- MSS CTSE SSE
0
0
0
0
0
0
0
0
b0
SSE
b1
CTSE
b2
MSS
b3
--
b4
MFF
b5
--
b6
CKPOL
b7
CKPH
SSn CTS
0SSn 1SSn
0CTS RTS 1CTS
0TXDn RXDn 1TXDn RXDn
00
0 1
00
0 1
0 1
R/W
R/W
1
R/W
1
R/W
1
R/W
R/W
2
R/W
R/W
1
R/W
1
1. 2.
SCR.TE SCR.RE 0 0
SPMR
SSE SSn
SPI SSn SSE 1 0 SCR.CKE[1:0] = 00b MSS = 0 SSn SSE 0 SSE CTSE 0
CTSE CTS
SSn CTS 1 0 RTS SPI IIC 0 CTSE SSE 1 0
MSS
SPI MSS 1 TXDn RXDn TXDn RXDn SPI 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 843 of 1551
RA4W1
29. SCI
MFF
1 SPI SSE = 1 MSS = 0SSn Low
0 1 0
CKPOL SCKn 29.70 SPI 0
CKPH SCKn 29.70 SPI 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 844 of 1551
RA4W1
29. SCI
29.2.26 FIFO FCR
SCI0.FCR 4007 0014h, SCI1.FCR 4007 0034h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
RSTRG[3:0]
RTRG[3:0]
TTRG[3:0]
DRES TFRST RFRST FM
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
b0
b1 b2 b3 b7-b4
b11-b8
b15-b12
FM
RFRST TFRST DRES TTRG[3:0]
RTRG[3:0]
RSTRG[3:0]
FIFO
0 FIFO
TDR/RDR TDRHL/RDRHL
1FIFO
FTDRHL/FRDRHL
FIFO
FIFO
FCR.FM = 1 0FRDRHL 1FRDRHL
FCR.FM = 1 0FTDRHL 1FTDRHL
FIFO
0SCIn_RXI 1SCIn_ERI
0000 0
1111 15
FIFO
0000 0
1111 15
RTS
FCR.FM = 1SPMR.CTSE = 0 SPMR.SSE = 0 0000 0
1111 15
R/W R/W
1
R/W R/W R/W R/W
R/W
R/W
1. TE = 0 RE = 0
FCR FIFO FTDRHL/FRDRHL FIFO RTS
FM FIFO
FM 1 FTDRHL FRDRHL FM 0 TDR RDR TDRHL RDRHL
RFRST FIFO
RFRST 1 FRDRHL 0 1 1PCLK 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 845 of 1551
RA4W1
29. SCI
TFRST FIFO
TFRST 1 FTDRHL 0 1 1PCLK 0
DRES
DRES SCIn_RXI SCIn_ERI DMAC DTC FRDRH FRDRL DRES 1
TTRG[3:0] FIFO
FIFO FTDRHLTDFE 1 FTDRHL SCR.TIE = 1 SCIn_TXI
RTRG[3:0] FIFO
FIFO FRDRHLRDF 1 FRDRHL SCR.RIE = 1 SCIn_RXI RTRG 0 FIFO 0 RDF SCIn_RXI
RSTRG[3:0] RTS
FIFO FRDRHL RTS High RSTRG 0 FIFO 0 RTS High
29.2.27 FIFO FDR
SCI0.FDR 4007 0016h, SCI1.FDR 4007 0036h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
T[4:0]
--
--
--
R[4:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b4-b0
R[4:0]
FIFO
b7-b5 b12-b8
-- T[4:0]
FIFO
b15-b13 --
R/W
FRDRHL
R
FCR.FM = 1
0
R
FTDRHL
R
FCR.FM = 1
0
R
FRDRHL/FTDRHL
R[4:0] FIFO
FRDRHL 00h 10h FRDRHL
T[4:0] FIFO
FTDRHL 00h 10h FTDRHL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 846 of 1551
RA4W1
29. SCI
29.2.28 LSR
SCI0.LSR 4007 0018h, SCI1.LSR 4007 0038h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
PNUM[4:0]
--
FNUM[4:0]
-- ORER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
b1 b6-b2 b7 b12-b8 b15-b13
ORER
--
FNUM[4:0]
--
PNUM[4:0]
--
FIFO 0 1
0
FIFOFRDRHL
0
FIFOFRDRHL
0
R/W R
1
R R
R R
R
1. 1 SSR_FIFO.ORER 0
LSR ORER
SSR_FIFO.ORER FNUM[4:0]
FRDRHL PNUM[4:0]
FRDRHL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 847 of 1551
RA4W1
29. SCI
29.2.29 CDR
SCI0.CDR 4007 001Ah, SCI1.CDR 4007 003Ah, SCI4.CDR 4007 009Ah, SCI9.CDR 4007 013Ah
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
CMPD[8:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b8-b0
CMPD[8:0]
R/W
b15-b9 --
0 0
R/W
CDR
CMPD[8:0] DCCR.DCME = 1
3 1 7 CMPD[6:0]
8 CMPD[7:0]
9 CMPD[8:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 848 of 1551
RA4W1
29. SCI
29.2.30 DCCR
SCI0.DCCR 4007 0013h, SCI1.DCCR 4007 0033h, SCI4.DCCR 4007 0093h, SCI9.DCCR 4007 0133h
b7
b6
b5
b4
b3
b2
DCME IDSEL -- DFER DPER --
0
1
0
0
0
0
b1
b0
-- DCMF
0
0
b0 b2-b1 b3 b4 b5 b6
b7
DCMF -- DPER DFER -- IDSEL
DCME
ID
0 1
0 0
0 1
0 1
0 0
0MPB 1MPB 1ID
0 1
R/W R/(W)
1
R/W R/(W)
1
R/(W)
1
R/W R/W
R/W
1. 1 0
DCCR DCMF
SCI CDR.CMPD 1 DCCR.DCME = 1 CDR.CMPD 0 1 0
SCR RE 0 DCMF
DPER 1 0 1 0 SCR.RE 0DPER
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 849 of 1551
RA4W1
29. SCI
DFER
1 0
2 1 1 2
0 1 0
SCR.RE 0DFER
IDSEL ID MPB MPB =
1ID
DCME
SCI CDR.CMPDDCME SCI 29.3.6 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 850 of 1551
RA4W1
29. SCI
29.2.31 SPTR
SCI0.SPTR 4007 001Ch, SCI1.SPTR 4007 003Ch, SCI4.SPTR 4007 009Ch, SCI9.SPTR 4007 013Ch
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
SPB2I SPB2D RXDM
O
T
ON
0
0
0
0
0
0
1
1
R/W
b0
RXDMON
RXD
R
0RXD Low
1RXD High
b1
SPB2DT SCR.TE = 0TXD R/W
0TXD Low
1TXD High
b2
SPB2IO
TXDSPB2DT R/W
0SPB2DT TXD
1SPB2DT TXD
b7-b3 --
0 0
R/W
SPTR RXDn TXDn
29.21 TXDn SCR.TESPTR.SPB2IO SPTR.SPB2DT
29.21
TXDn
SCR.TE
SPTR.SPB2IO
0
0
0
1
0
1
1
x
SPTR.SPB2DT x 0 1 x
TXDn Hi-Z Low High
x: Don't care
.
SPTR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 851 of 1551
RA4W1
29. SCI
29.3
29.2
1 Low High
High
SCI Low
SCI FIFO
1
LSB
MSB
1
0 D0 D1 D2 D3 D4 D5 D6 D7 0/1
1
1
1
7, 89
1
1 2
1
29.2
8 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 852 of 1551
RA4W1
29. SCI
29.3.1
29.22
18 SMR SCMR 29.4
29.22
SCMR
(1/2)
SMR
1
2
3
4
5
6
7
8
9
10
11
12
13
CHR1 CHR PE MP STOP
0
0
0
0
0
S
9
STOP
0
0
0
0
1
S
9
STOP STOP
0
0
1
0
0
S
9
P
STOP
0
0
1
0
1
S
9
P
STOP STOP
1
0
0
0
0
S
8
STOP
1
0
0
0
1
S
8
STOP STOP
1
0
1
0
0
S
8
P
STOP
1
0
1
0
1
S
8
P
STOP STOP
1
1
0
0
0
S
7
STOP
1
1
0
0
1
S
7
STOP STOP
1
1
1
0
0
S
7
P
STOP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 853 of 1551
RA4W1
29. SCI
29.22
SCMR
(2/2)
SMR
1
2
3
4
5
6
7
8
9
10
11
12
13
CHR1 CHR PE MP STOP
1
1
1
0
1
S
7
P
STOP STOP
0
0
--
1
0
S
9
MPB STOP
0
0
--
1
1
S
9
MPB STOP STOP
1
0
--
1
0
S
8
MPB STOP
1
0
--
1
1
S
8
MPB STOP STOP
1
1
--
1
0
S
7
MPB STOP
1
1
--
1
1
S
7
MPB STOP STOP
S STOP P MPB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 854 of 1551
RA4W1
29. SCI
29.3.2
SCI 16 1
29.3 8 1 1
M =
(0.5 -
1 2N
) - (L - 0.5)
F -
D - 0.5 N
(1 + F) � 100 [%] ... (1)
M N SEMR.ABCSE = 0 SEMR.ABCS = 0 N = 16 SEMR.ABCS = 1 N = 8SEMR.ABCSE = 1 N = 6 DD = 0.5 1.0 LL = 9 13 F
1F= 0D= 0.5
M = {0.5 - 1/(2 � 16)} � 100 (%) = 46.875%
20 30%
1.
SEMR ABCS ABCSE 0 ABCS 1 ABCSE 0 8 4
ABCSE 1 6 3
16
8
0
7
15 0
7
RXDn
D0
29.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
15 0 D1
Page 855 of 1551
RA4W1
29. SCI
29.3.3
SCI SMR.CM SCR.CKE[1:0] SCKn
SCKn 16 SEMR.ABCS = 0 8 SEMR.ABCS = 1
SCKn 29.4
SCKn TXDn
0 D0 D1 D2 D3 D4 D5 D6 D7 0/1
1
1
1
29.4
SMR.CHR = 0PE = 1MP = 0STOP = 1
29.3.4 6
SEMR.ABCS 1 1 8 ABCS 0 SCI 2 SEMR.BGDM 1 1/2 BGDM 0 2 SCR.CKE[1] 0 ABCS BGDM 1 ABCS BGDM 0 SCI 4 SEMR.ABCSE 1 1 6 SEMR.ABCSSEMR.BGDM SMER.ABCSE 0 SCI 16/3
29.3.21 SEMR.ABCS SEMR.ABCSE 1 ABCS ABCSE 0 ABCS ABCSE 0 SCI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 856 of 1551
RA4W1
29. SCI
29.3.5 CTSRTS
CTS CTSn_RTSn SPMR.CTSE 1 CTS CTS CTSn_RTSn Low
CTSn_RTSn High RTS CTSn_RTSn Low Low High Low
(a) FIFO
SCR.RE 1
SSR ORERFERPER 0
(b) FIFO
SCR.RE 1 FRDRHL SSR_FIFO.ORER FRDRH.ORER 0 High
(a) FIFO
Low RDR SCR.RE = 0 RTS
High SCR.RE 0 SCR
(b) FIFO
Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 857 of 1551
RA4W1
29. SCI
29.3.6
DCCR.DCME 1 4 1 SCI CDR.CMPD SCI CDR.CMPD 3 SCIn_RXI
SMR.MP 0 SMR.MP = 1DCCR.IDSEL 1 MPB = 1 MPB = 0
DCCR.IDSEL 0 SCI MPB CDR.CMPD 3 SCI SCI DCCR.DCME DCCR.DCMF 1
DCCR.IDSEL 1 SCR.MPIE DCCR.IDSEL 0 SCR.MPIE SCR.RIE 1 SCI SCIn_RXI SCI DCCR.DFER 1 DCCR.DPER 1 RDR 1 SSR.RDRF 0 2
SCI DCCR.DCME SCI
DCCR.DFER DCCR.DPER 1 DCCR.DFER DCCR.DPER 0
29.5 29.6
1. 2. 3.
4.
FCR.FM = 1 FRDRHL FCR.FM = 1 SSR_FIFO.RDF 3 7 CMPD[6:0]8 CMPD[7:0] 9 CMPD[8:0] 1 DCCR.DCME 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 858 of 1551
RA4W1
29. SCI
SCIn_AM SCI0_DCUF
1
0 D0
ID1
D1
D7
1
0 D0
Data1
D1
D7
DCME DCMF
SCIn_RXI ICUIELSRn.IR
RDRF
DPER DFER
RDR
CDR RDR
(a) CDR8
SCIn_AM SCI0_DCUF
DCME DCMF
MPIE SCIn_RXI
ICUIELSRn.IR RDRF DFER
RDR
1
0 D0
ID2
D1
D7
1
0 D0
Data2
D1
D7 1
0
Data2
DCME = 0
CDR RDR
(b) CDR8
29.5
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 859 of 1551
RA4W1
29. SCI
SCIn_AM SCI0_DCUF
1
0 D0
Data0
D1
D7
MPB
0
1
0 D0
ID1
D1
D7
MPB
1
1
DCME DCMF
SCIn_RXI ICUIELSRn.IR
RDRF
DPER DFER
RDR
CDR RDR
(a) CDR8IDSEL = 1
SCIn_AM SCI0_DCUF
DCME DCMF
MPIE SCIn_RXI
ICUIELSRn.IR RDRF DFER
RDR
1
0 D0
ID2
D1
D7
MPB
1
1
0 D0
Data2
D1
D7
MPB 1
0
DCME = 0
Data2
CDR RDR
(b) CDR8IDSEL = 1
29.6
2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 860 of 1551
RA4W1
29. SCI
29.3.7 SCI
SCR 00h 29.7 29.8 SCI FIFO FIFO SCR
. SCR.RE 0 SSR SSR_FIFO ORER FER RDRF RDF PER DR RDR RDRHL SCR.TE 0 FIFO TEND
. SCR.TIE 1 SCR.TE 1 0 0 1 SCIn_TXI
[ 1 ] FCR.FM 0
SCR.TIE, RIE, TE, RE, TEIE0
FCR.FM0
SCR.CKE[1:0]
SIMR1.IICM0 SPMR.CKPH, SPMR.CKPOL0
SMR, SCMR, SEMR
BRR
MDDR
I/O
SCR.TE, SCR.RE1 SCR.TIE, SCR.RIE
[ 2 ] SCR
SCR
[ 1 ] [ 3 ] SIMR1.IICM 0 SPMR.CKPH, SPMR.CKPOL 0
[ 2 ]
[ 4 ] SMR, SCMR, SEMR
[ 3 ] [ 5 ] BRR
[ 4 ]
[ 6 ] MDDR
[ 5 ]
SEMR.BRME 0
[ 6 ]
[ 7 ] TXDn, RXDn, SCKn
I/O
[ 7 ]
[ 8 ] SCR.TE SCR.RE 1
SCR.TIE, SCR.RIE
SCR.TE, SCR.RE TXDn, RXDn
[ 8 ]
29.7
SCI FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 861 of 1551
RA4W1
29. SCI
SCR.TIE, RIE, TE, RE, TEIE0
FCR.FM, TFRST, RFRST1 FCR.TTRG[3:0], RTRG[3:0], RSTRG[3:0]
SCR.CKE[1:0]
SIMR1.IICM0 SPMR.CKPH, CKPOL0
SMR, SCMR, SEMR
BRR
MDDR
FCR.TFRST, RFRST0
I/O
SCR.TE, RE1 SCR.TIE, RIE
[ 1 ] FCR.FM 0FCR.FM, TFRST, RFRST 1 FIFOFIFO FCR.TTRG[3:0], RTRG[3:0], RSTRG[3:0]
[ 2 ] SCR
[ 1 ]
SCR
[ 3 ] SIMR1.IICM 0
[ 2 ]
SPMR.CKPH, SPMR.CKPOL 0
[ 4 ] SMR, SCMR, SEMR
[ 3 ]
[ 5 ] BRR
[ 4 ]
[ 6 ] MDDR
[ 5 ]
SEMR.BRME 0
[ 6 ] [ 7 ] FCR.TFRST, FCR.RFRST 0
[ 7 ]
[ 8 ] TXDn, RXDn, SCKn I/O
[ 9 ] SCR.TE SCR.RE 1
[ 8 ]
SCR.TIE, RIE SCR.TE,
SCR.RE TXDn, RXDn
[ 9 ]
29.8
SCI FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 862 of 1551
RA4W1
29. SCI
29.3.8
(1) FIFO
29.9 29.10 29.11
SCI SCR.TE 1 1 High TXD
1. SCIn_TXI TDR 1 SCI TDR 1 TSR SCIn_TXI SCR.TE SCR.TIE 1 1
2. SPMR.CTSE 0CTS CTSn_RTSn Low TDR 1 TSR SCR.TIE 1 SCIn_TXI SCIn_TXI TDR 1 SCIn_TEI SCIn_TXI TDR 1 SCR TIE 0SCIn_TXI TEIE 1SCIn_TEI
3. TXDn
4. SCI TDR
5. TDR SPMR.CTSE 0CTS CTSn_RTSn Low TDR 1 TSR
6. TDR SSR.TEND 1 1 SCR.TEIE 1 SSR.TEND 1 SCIn_TEI
1. 9 TDRHL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 863 of 1551
RA4W1
29. SCI
29.9 29.10 29.11
1
0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1 1 0
SCR.TE
SCIn_TXI ICUIELSRn.IR1
SSR.TEND
1
1.
SCIn_TXI
SCIn_TXI TDR
SCIn_TXI
SCIn_TXI TDR
SCIn_TXI TDR
14.ICU
29.9
1 8 1 CTS
CTSn_RTSn
1
0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1 1 0
SCR.TE
SCIn_TXI ICUIELSRn.IR1
SSR.TEND
1
1.
SCIn_TXI
SCIn_TXI TDR
SCIn_TXI TDR
SCIn_TXI
SCIn_TXI TDR
14.ICU
29.10
2 8 1 CTS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 864 of 1551
RA4W1
29. SCI
1 0 D0 D1
SCR.TE 1
SCIn_TXI ICUIELSRn.IR1
SSR.TEND
D7 0/1 1 0 D0 D1 (TIE = 1)
D7 0/1 1 0 D0 D1
D7 0/1 1
(TIE = 0)
SCIn_TXI
SCIn_TXI TDR
1
SCIn_TXI TDR TIE0TEIE1
SCIn_TXI
1. 14.ICU
SCIn_TEI
29.11
3 8 1 CTS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 865 of 1551
RA4W1
29. SCI
[ 1 ]
SCIn_TXI?
No [ 2 ]
Yes TDR
?
Yes SCR.TIE0 SCR.TEIE1
No [ 3 ]
SCIn_TEI? Yes
? Yes
TXD
No No [ 4 ]
[ 1 ] SCI SCR.TE 11 1
[ 2 ] SCIn_TXI TDR TDR TSR
SCIn_TXISCIn_TXI TDR 1
[ 3 ] SCIn_TXI TDR 1 DMAC DTC TDR SCIn_TEI TDRSCR.TIE0 SCR.TEIE 1
[ 4 ] SPTR.SPB2IO, SPTR.SPB2DT TXDn LowSCR.TE 0
SCR.TIE, TE, TEIE0
. 9 TDR TDRHL
29.12
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 866 of 1551
RA4W1
29. SCI
(2) FIFO
29.13 FTDRH FTDRL
FTDRH FTDRL 0 FTDRH FTDRL
FTDRH, FTDRL
FTDRHL
FTDRH SCMR. SMR. CHR1 CHR b7 b6 b5 b4 b3 b2 b1 b0
FTDRL b7 b6 b5 b4 b3 b2 b1 b0
7 1
0
--
--
--
--
--
--
--
--
--
7
8 1
1
--
--
--
--
--
--
--
--
9
0
Don't care
--
--
--
--
--
--
--
8 9
--0
29.13
FTDRH FTDRL FIFO
SCI SCR.TE 1 1 High TXD
1. SCIn_TXI FTDRL 1 SCI FTDRL 1 TSR FTDRL 16 - FDR.T[4:0] SCIn_TXI SCR.TE SCR.TIE 1 1
2. SPMR.CTSE 0CTS CTSn_RTSn Low FTDRL 1 TSR FTDRL SSR_FIFO.TDFE 1 SCR.TIE 1 SCIn_TXI SCIn_TXI FTDRL 1 SCIn_TEI SCIn_TXI FTDRL 1 2 SCR.TIE 0SCIn_TXI SCR.TEIE 1
SCIn_TEI
3. TXDn
4. SCI FTDRL 3
5. FTDRL 3 SPMR.CTSE 0CTS CTSn_RTSn Low FTDRL 1 TSR
6. FTDRL 3 SSR_FIFO TEND 1 1 SCR.TEIE 1 SSR_FIFO.TEND 1 SCIn_TEI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 867 of 1551
RA4W1
29. SCI
1. 2. 3.
9 FTDRH FTDRL 9 FTDRH FTDRL 9 SCI FTDRL FTDRH
29.14 FIFO
SCIn_TXI? Yes
FTDRL 12
FTDRL12
? Yes
SCR.TIE0 SCR.TEIE1
SCIn_TEI? Yes
? Yes
TXD
[ 1 ]
No [ 2 ] [ 3 ]
No
No No
[ 4 ]
[ 1 ] SCI SCR.TE 1 1 1
[ 2 ] SCIn_TXI FTDRL1 FTDRL TSR FTDRL SCIn_TXI SCIn_TXI FTDRL1 2 1
[ 3 ] SCIn_TXI FTDRL SSR_FIFO.TDFE 0 16 - ( FIFO ) DMAC DTC DMAC DTC FTDRL TDFE TDFE SCIn_TEI FTDRL SCR.TIE 0 SCR.TEIE1
[ 4 ] SPTR.SPB2IO, SPTR.SPB2DT TXDn Low SCR.TE 0
SCR.TE, TIE, TEIE0
1. 9 FTDRH/FTDRL 2. 9 FTDRHFTDRL
29.14
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 868 of 1551
RA4W1
29. SCI
29.3.9
(1) FIFO
29.15 29.16
SCI
1. SCR.RE 1 CTSn_RTSn Low
2. SCI RSR
3. SSR.ORER 1 SCR.RIE 1 SCIn_ERI RDR 1
4. SSR.PER 1 RDR 1 SCR.RIE 1 SCIn_ERI
5. SSR.FER 1 RDR 1 SCR.RIE 1 SCIn_ERI
6. RDR 1 SCR.RIE 1 SCIn_RXI SCIn_RXI RDR RDR CTSn_RTSn Low
1. 9 RDRHL
1
0 D0
D1
D7 0/1 1
0 D0
1
D1
D7 0/1 0
SCIn_RXI ICUIELSRn.IR1
SSR.FER
SCIn_RXI
1
SCIn_RXI RDR
SCIn_ERI
1. 14.ICU
29.15
1RTS 8 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 869 of 1551
RA4W1
29. SCI
1
1
0 D0
D7 0/1 1
0 D0
D7 0/1 0
0 D0
SCIn_RXI ICUIELSRn.IR1
SSR.FER
CTSn_RTSn
SCIn_RXI
SCIn_RXI RDR
SCIn_ERI
1
1. 14.ICU
29.16
2 RTS 8 1
SSR 29.23
SCIn_ERI SCIn_RXI 1 ORERFER PER 0 RDR RDRHL SCR.RE 0 RDR RDRHL RDR RDRHL
29.17 29.18
29.23
SSR
SSR
ORER
FER
PER
1
0
0
0
1
0
0
0
1
1
1
0
1
0
1
0
1
1
1
1
1
RDR RDR RDR
+ + + + +
.
9 RDRHL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 870 of 1551
RA4W1
29. SCI
[ 1 ]
SSR.ORER, PER, FER [ 2 ]
SSR.ORER = 1 SSR.PER = 1 SSR.FER = 1?
No
Yes [ 3 ]
No SCIn_RXI? Yes1
RDR2
[ 4 ]
[ 1 ] SCI
[ 2 ] [ 3 ] SCIn_ERI SSR.ORER, PER, FER ORER, PER, FER 0 1 RXDn
[ 4 ] SCIn_RXIRDR 1
[ 5 ] SCIn_RXI RDR RDR DMAC DTC
No
[ 5 ]
Yes
SCR.RIE, SCR.RE0
1. RDR RE 0 2. 9 RDR RDRHL
29.17
FIFO 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 871 of 1551
RA4W1
29. SCI
[ 3 ] No SSR.ORER = 1?
Yes
No SSR.FER = 1? Yes ? No
No SSR.PER = 1 Yes
[ 6 ] [ 6 ] RDR[ 7 ]
Yes
SCR.RE0
SSR.ORER, PER, FER0
[ 7 ] [ 7 ] 0
SSR.ORER, PER, FER
[ 8 ] [ 8 ] 0
. 9 RDR RDRHL
29.18
FIFO 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 872 of 1551
RA4W1
29. SCI
(2) FIFO
29.19 FRDRH FRDRL
FRDRH MPB 0 FRDRH FRDRL 0 FRDRH FRDRL FRDRL SCI FERPER FRDRL RDAT[8:0]FRDRH RDFORER DR SSR_FIFO
FRDRH, FRDRL
SCMR. SMR. CHR1 CHR
b7 b6
FRDRH b5 b4 b3 b2
FRDRHL b1 b0 b7 b6
FRDRL b5 b4 b3 b2
7 1
0
-- RDF ORER FER PER DR
0
0
0
7
8 1
1
-- RDF ORER FER PER DR
0
0
9
0
Don't care
-- RDF ORER FER PER DR
0
8 9
. MPB 0 (FRDRH[1]) 7 FRDRH[0], FRDRL[7] 0 8 FRDRH[0] 0 FRDRH[7]
b1 b0
29.19
FRDRH FRDRL FIFO
SCI
1. SCR.RE 1 CTSn_RTSn Low
2. SCI RSR
3. FRDRL SSR_FIFO.ORER 1 RIE 1 SCIn_ERI FRDRL 1
4. PER FRDRL 1 RIE 1 SCIn_ERI
5. FER FRDRL 1 RIE 1 SCIn_ERI
6. SCI 1
7. FIFO FRDRL 15ETU SSR_FIFO.DR 1 RIE 1 FCR.DRES 0 SCI SCIn_RXI DRES 1 SCI SCIn_ERI
8. FRDRL 1 FRDRHL RDF 1 SCR.RIE 1 SCIn_RXI SCIn_RXI FRDRL 2 FRDRL 3 RTS CTSn_RTSn Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 873 of 1551
RA4W1
29. SCI
1. 2. 3.
9 FRDRH FRDRL 9 FRDRH FRDRL 9 SCI FRDRL FRDRH
[ 1 ]
SSR_FIFO.ORER1, PER, FER, [ 2 ] DR1
SSR_FIFO.ORER1 = 1 SSR_FIFO.PER = 1 SSR_FIFO.FER = 1
SSR_FIFO.DR1 = 1
No
Yes [ 3 ]
No SCIn_RXI? Yes
FRDRHL
[ 4 ]
No
?
[ 5 ]
Yes
SCR.RIE, RE0
[ 1 ] SCI
[ 2 ] [ 3 ] SCIn_ERI SPTR.RXDMON SSR_FIFO.ORER1, PER, DR1, FER ORER1 0ORER 1 1 FER = 1, PER = 1, DR1= 1
[ 4 ] SCIn_RXI FRDRHL FRDRHL FCR.RTRG FDR.R FIFO
[ 5 ] SCIn_RXI FRDRHL RDF DR 0 DMAC DTCFRDRHL RDF RDF
1. FRDRHL.ORER DR
29.20
FIFO 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 874 of 1551
RA4W1
29. SCI
[ 3 ]
No SSR_FIFO.ORER = 1?
Yes
[ 6 ]
No SSR_FIFO.FER = 1? Yes Yes ? No
[8] [7]
No SSR_FIFO.PER = 1?
Yes
[ 8 ]
No SSR_FIFO.DR = 1?
Yes
FRDRHL
[ 9 ]
[ 6 ] FRDRHL
[ 7 ] FRDRHL SCMR.RXDESEL = 0 FRDRHL 0
[ 8 ] FRDRHL FCR.RFRST1 FRDRHL
[ 9 ] FCR.DRES1 FRDRHL
SSR_FIFO.ORER, PER, DR, FER 0
[10]
[10] 0
SSR_FIFO.ORER, PER, DR, FER
[11]
[11] 0
29.21
FIFO 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 875 of 1551
RA4W1
29. SCI
29.4
ID ID
ID
1 ID
0
29.22 ID 1 0 1 ID ID 2 1
(1) FIFO
SCI SCR.MPIE MPIE 1 1
RSR RDR 9 RDRHL
SSR.RDRFORERFER
1 SSR.MPBT 1 SCR.MPIE SCR.RIE SCIn_RXI
A (ID = 01)
B (ID = 02) (MPB = 1) 01h
(MPB = 1)
C (ID = 03)
AAh (MPB = 0)
ID =
= ID
MPB
D (ID = 04)
29.22
AAh A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 876 of 1551
RA4W1
29. SCI
(2) FIFO
FTDRHL MPBT FTDRHL TDAT FTDRHL MPB FRDRL
MPIE 1 1
RSR FRDRHL
SSR_FIFO RDFORER FER
1 8 FTDRHL.MPB 1 FRDRHL RDAT SCR.MPIE SCI SCR.RIE SCIn_RXI
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 877 of 1551
RA4W1
29. SCI
29.4.1
(1) FIFO
29.23 ID SSR.MPBT 1 ID MPBT 0
SCIn_TXI? Yes
SSR.MPBT TDR
TDR
Yes SCR.TIE0 SCR.TEIE1
SCIn_TEI? Yes
? Yes
TXD
[ 1 ]
No [ 2 ]
[ 1 ] SCI SCR.TE 1 1 1
[ 2 ] SCIn_TXI TDR TSR SCIn_TXI SCIn_TXI SSR.MPBT 0 1 TDR
No [ 3 ]
[ 3 ] SCIn_TXI TDR 1 DMAC DTC TDR
SCIn_TEI TDRSCR.TIE 0 SCR.TEIE 1
[ 4 ]
SPTR.SPB2IO, SPTR.SPB2DT TXDn LowSCR.TE 0
No
No [ 4 ]
SCR.TE, TIE, TEIE0
29.23
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 878 of 1551
RA4W1
29. SCI
(2) FIFO
29.24 FTDRH FTDRL
FTDRH MPBT 1 FTDRH FTDRL 0 FTDRH FTDRL
FTDRH SCMR. SMR. CHR1 CHR b7 b6 b5 b4 b3
7 1
0
--
--
--
--
--
8 1
1
--
--
--
--
--
9
0
Don't care
--
--
--
--
--
--0
FTDRH, FTDRL
FTDRHL
b2 b1 b0
-- MPBT -- -- MPBT -- -- MPBT
b7 b6
--
FTDRL b5 b4 b3 b2
7 8 9
b1 b0
29.24
FTDRH FTDRL FIFO
29.25 FIFO ID FTDRH.MPBT 1 ID MPBT 0 FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 879 of 1551
RA4W1
29. SCI
SCIn_TXI? Yes
MPBTFTDRHL
FTDRHL?
Yes SCR.TIE0 SCR.TEIE1
SCIn_TEI? Yes
? Yes
TXD
[ 1 ]
No [ 2 ]
[ 3 ] No
No No
[ 4 ]
[ 1 ] SCI SCR.TE 11 1
[ 2 ] SCIn_TXI FTDRHL FTDRHL TSR FTDRHL SCIn_TXI
[ 3 ] SCIn_TXI FTDRHL MPBT 1 DMAC DTCFTDRHL SCIn_TEI FTDRHL SCR.TIE 0 SCR.TEIE 1
[ 4 ] SPTR.SPB2IO, SPTR.SPB2DT TXDn Low SCR.TE 0
SCR.TE, TIE, TEIE0
29.25
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 880 of 1551
RA4W1
29. SCI
29.4.2
(1) FIFO
29.26 29.27 SCR.MPIE 1 1 1 RDR 9 RDRHL SCIn_RXI
29.26
1
0
D0
ID1
D1
D7
MPB
1
1
0
D0
Data1
D1
D7
MPB
1
0
1
MPIE SCIn_RXI ICUIELSRn.IR1
RDR
ID1
MPIE = 0
SCIn_RXI
SCIn_RXI RDR
ID MPIE1
SCIn_RXI RDR
(a) ID
1
0
D0
ID2
MPB
D1
D7
1
1
0
D0
Data2
MPB
1
D1
D7
0
1
MPIE
SCIn_RXI ICUIELSRn.IR1
RDR
ID1 MPIE = 0
ID2
Data2
SCIn_RXI
SCIn_RXI RDR
ID SCIn_RXI
MPIE 1
1.
(b) ID
14.ICU
29.26
SCI 8 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 881 of 1551
RA4W1
29. SCI
[ 1 ]
SCR.MPIE1
[ 2 ]
SSR.ORER, FER
Yes FER = 1ORER = 1?
No
No
SCIn_RXI?
[ 3 ]
Yes RDR
[ 1 ] SCI
[ 2 ] ID SCR.MPIE 1ID
[ 3 ] SCI ID 1 SCIn_RXI RDR1 ID ID MPIE 1 SCIn_RXI
[ 4 ] SCIn_RXI SCIn_RXI RDR 1
[ 5 ] SSR.ORER, FER ORER, FER 0 ORER, FER 1 SPTR.RXDMON
No
ID?
Yes SSR.ORER, FER
Yes FER = 1ORER = 1?
No
No
SCIn_RXI?
[ 4 ]
Yes RDR
No ?
Yes SCR.RE, RIE0
[ 5 ]
1. 9 RDR RDRHL
29.27
1 FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 882 of 1551
RA4W1
29. SCI
[ 5 ] No SSR.ORER = 1?
Yes
No SSR.FER = 1? Yes ? No
[ 6 ] [ 6 ] RDR1 [ 7 ]
Yes
SCR.RE0
SSR.ORER, PER, FER0
[ 7 ] [ 7 ] 0
SSR.ORER, PER, FER
[ 8 ] [ 8 ] 0
1. 9 RDR RDRHL
29.28
2 FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 883 of 1551
RA4W1
29. SCI
(2) FIFO
29.29 FRDRH FRDRL
MPB FRDRH MPB FRDRH PER 0 FRDRH FRDRL 0 FRDRH FRDRL FRDRL SCI FERMPB FRDRL RDAT[8:0]FRDRH RDF ORER DR SSR_FIFO
FRDRH, FRDRL
SCMR. SMR. CHR1 CHR
b7 b6
FRDRH b5 b4 b3 b2
FRDRHL b1 b0 b7 b6
FRDRL b5 b4 b3 b2
7 1
0
-- RDF ORER FER 0
DR MPB 0
0
7
8 1
1
-- RDF ORER FER 0
DR MPB 0
9
0
Don't care
-- RDF ORER FER 0
DR MPB
8 9
. 7 FRDRH[0], FRDRL[7] 0 8 FRDRH[0] 0 FRDRH[7]
b1 b0
29.29
FRDRH FRDRL FIFO
29.30 FIFO SCR.MPIE 1 1 1 MPB FRDRHL SCR.MPIE
SSR_FIFO.FER 1 SCI FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 884 of 1551
RA4W1
29. SCI
[ 1 ]
[ 1 ] SCI
[ 2 ] ID SCR.MPIE 1ID
SCR.MPIE1
[ 3 ] SCIID
[ 2 ]
SCI(MPB = 1)
FRDRHL
RDF1
No SCIn_RXI?
FRDRHL
[ 3 ]
SCIn_RXI
FIFO
Yes
FRDRHL 1
FRDRHL1
15 FTU SSR_FIFO.DR1
Yes FER = 1ORER = 1?
FCR.DRES 0 SCIn_RXI 1SCIn_RXI FRDRHL
ID
No
IDMPB = 1
ID
ID? No
FRDRHL MPB = 1 MPIE 1SCIn_RXI
Yes
FRDRHL?
Yes [ 4 ] SCIn_RXI
SCIn_RXI FRDRHL
No
No
SCIn_RXI?
[ 4 ]
Yes
FRDRHL1
Yes FER = 1ORER = 1?
[ 5 ] SSR_FIFO.ORER, FER SSR_FIFO.ORER, FER0 SSR_FIFO.ORER1 SPTR.RXDMON
No
No ? Yes
SCR.RE, RIE0
1. FRDRHL FRDRH, FRDRL
[ 5 ] 29.28
29.30
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 885 of 1551
RA4W1
29. SCI
29.5
29.31
1 8
SCI
8 SPMR.CKPH 1 SCI 1
SCI
BRR = 00h SMR.CKS[1:0] = 00b FIFO BRR = 00h SMR.CKS[1:0] = 00b
1
1
1
LSB
MSB
0 1 2 3 4 5 6 7
1.
Don't care High
Don't care
29.31
LSB
29.5.1
SCR.CKE[1:0] SCKn
SCI SCKn 1 8 High CTS SCR.RE 1 RE 0 High 1
CTS SCR.RE 1 CTSn_RTSn High SCR.RE 1 CTSn_RTSn Low CTSn_RTSn High High CTSn_RTSn Low RE 0 High 1
1.
SPMR.CKPH = 0 SPMR.CKPOL = 1SPMR.CKPH = 1 SPMR.CKPOL = 1 High SPMR.CKPH = 0 SPMR.CKPOL = 1SPMR.CKPH = 1 SPMR.CKPOL = 0 Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 886 of 1551
RA4W1
29. SCI
29.5.2 CTSRTS
CTS CTSn_RTSn SPMR.CTSE 1 CTS CTS CTSn_RTSn Low
CTSn_RTSn High RTS CTSn_RTSn CTSn_RTSn Low CTSn_RTSn Low High Low
(a) FIFO
SCR.RE SCR.TE 1
SCR.RE 1 TSR SCR.TE 1SCR.CKE[1] 1 SSR.ORER 0
(b) FIFO
SCR.RE SCR.TE 1
FRDRHL CTSn_RTSn SCR.RE = 1
FTDRHL SCR.TE 1SCR.CKE[1] 0 TSR SCR.TE 1SCR.CKE[1] 1 SSR_FIFO.ORER 0 High
(a) FIFO
Low RDR SCR.RE = 0 RTS
High SCR.RE 0 SCR
(b) FIFO
Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 887 of 1551
RA4W1
29. SCI
29.5.3 SCI
SCR 00h 29.5.2CTSRTS SCI SCR
. SCR.RE 0 SSR/SSR_FIFO ORER FER RDRF RDF PER DR RDR RDRHL SCR.TE 0 FIFO TEND
. SCR.TIE 1 SCR.TE 1 0 0 1 SCIn_TXI
[ 1 ] FCR.FM 0
SCR.TIE, RIE, TE, RE, TEIE0
[ 2 ] SCR
FCR.FM0
SCR.CKE[1:0]
SIMR1.IICM0 SPMR.CKPH, CKPOL
SMR, SCMR, SEMR
BRR
MDDR
I/O
SCR.TE, RE1 SCR.TIE, RIE
[ 1 ]
[ 3 ] SIMR1.IICM 0
SPMR.CKPH, CKPOL
[ 2 ]
[ 4 ] SMR, SCMR, SEMR
[ 3 ]
[ 5 ] BRR
[ 4 ]
[ 6 ] MDDR
SEMR.BRME 0
[ 5 ]
[ 7 ] TXDn, RXDn, SCKn
[ 6 ]
I/O
[ 8 ] SCR.TE SCR.RE 1
[ 7 ]
SCR.TIE, RIE
TE, RETXDn, RXDn
[ 8 ]
. SCR.TE, SCR.RE 0 1
29.32
SCI FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 888 of 1551
RA4W1
29. SCI
SCR.TIE, RIE, TE, RE, TEIE0
[ 1 ] FCR.FM, TFRST, RFRST 1 FIFOFIFO FCR.TTRG[3:0], RTRG[3:0], RSTRG[3:0]
FCR.FM, TFRST, RFRST1 FCR.TTRG[3:0], RTRG[3:0], RSTRG[3:0]
[ 1 ]
[ 2 ] SCR
SCR.CKE[1:0]
SIMR1.IICM0 SPMR.CKPH, CKPOL
SMR, SCMR, SEMR
BRR
MDDR
FCR.TFRST, RFRST0
I/O
SCR.TE, RE1 SCR.TIE, RIE
[ 2 ]
[ 3 ] SIMR1.IICM 0 SPMR.CKPH, CKPOL
[ 3 ] [ 4 ] SMR, SCMR, SEMR .
[ 5 ] BRR
[ 4 ]
[ 6 ] MDDR
[ 5 ]
SEMR.BRME 0
[ 6 ]
[ 7 ] FCR.TFRST, RFRST 0
[ 8 ] TXDn, RXDn, SCKn
[ 7 ]
I/O
[ 9 ] SCR.TE SCR.RE 1
[ 8 ]
SCR.TIE, RIE
TE,RETXDn, RXDn
[ 9 ]
. SCR.TE, RE 0 1
29.33
SCI FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 889 of 1551
RA4W1
29. SCI
29.5.4
(1) FIFO
29.34 29.35 29.36
SCI
1. SCIn_TXI TDR SCI TDR TSR SCIn_TXI SCR.TIE 1 SCR.TE 1 2 1 1
2. SCI TDR TSR SCR.TIE 1 SCIn_TXI SCIn_TXI TDR SCIn_TEI TDR SCR.TIE 0 SCR.TEIE 1
3. TXDn 8 SPMR.CTSE 1 CTSn_RTSn Low
4. SCI TDR
5. TDR TDR TSR
6. TDR SSR.TEND 1 TXDn SCR.TEIE 1 SCIn_TEI SCKn High
29.34 29.35 29.36
SSR.ORERFER PER 1 0
. SCR.RE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 890 of 1551
RA4W1
29. SCI
0 1
7 0 1
7 0
SCR.TE
SCIn_TXI ICUIELSRn.IR1
SSR.TEND
SCIn_TXI
SCIn_TXI
SCIn_TXI
SCIn_TXI
SCIn_TXI TDR
SCIn_TXI TDR
1
SCIn_TXI TDR
1. 14.ICU
29.34
CTS
CTSn_RTSn
0 1
7
0
SCR.TE
SCIn_TXI ICUIELSRn.IR1
SSR.TEND
SCIn_TXI
SCIn_TXI
SCIn_TXI TDR
SCIn_TXI TDR
SCIn_TXI
1
SCIn_TXI TDR
1. 14.ICU
29.35
CTS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 891 of 1551
RA4W1
29. SCI
SCIn_TXI ICUIELSRn.IR1
SSR.TEND
0 1
7 0 1 (TIE = 1)
7 0 1 (TIE = 0)
7
SCIn_TXI
SCIn_TXI TDR
1
SCIn_TXI
SCIn_TXI TDR
SCIn_TEI
TIE0TEIE1
1. 14.ICU
29.36
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 892 of 1551
RA4W1
29. SCI
[ 1 ]
SCIn_TXI?
No [ 2 ]
Yes TDR
?
Yes SCR.TIE0 SCR.TEIE1
No [ 3 ]
[ 1 ] SCI
[ 2 ] SCIn_TXI TDR TDR TSR
SCIn_TXI SCIn_TXI TDR 1
[ 3 ] SCIn_TXITDR SCIn_TXI DMAC DTC TDR SCIn_TEI TDR SCR.TIE 0 SCR.TEIE 1
No SCIn_TEI?
Yes SCR.TIE, TE, TEIE0
. SCR.CKE[1:0] = 10b, 11b SCK SSR.TEND 1 SCR.TE 0
29.37
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 893 of 1551
RA4W1
29. SCI
(2) FIFO
29.34 FIFO
SCI
1. SCIn_TXI FTDRL 1 SCI FTDRL 1 TSR FTDRL "16 - FDR.T[4:0]" SCIn_TXI SCR.TIE 1 SCR.TE 1 2 1 1
2. SCI FTDRL TSR FTDRL SSR_FIFO.TDFE 1 SCR.TIE 1 SCIn_TXI SCIn_TXI FTDRL SCIn_TEI FTDRL SCR.TIE 0 SCR.TEIE 1
3. TXDn 8 CTSn_RTSn Low SPMR.CTSE 1
4. SCI FTDRL
5. FTDRL FTDRL TSR
6. FTDRL SSR_FIFO.TEND 1 TXDn SCR.EIE 1 SCIn_TEI SCKn High
1. FTDRH
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 894 of 1551
RA4W1
29. SCI
[ 1 ] [ 1 ] SCI SCR.TE 1 1 1
SCIn_TXI? Yes
FTDRL
FTDRL Yes SCR.TIE0 SCR.TEIE1
SCIn_TEI? Yes
No [ 2 ] [ 3 ]
No
No
[ 2 ] SCIn_TXI FTDRL FTDRL TSR FTDRL FIFO SCIn_TXISCIn_TXI FTDRL1
[ 3 ] SCIn_TXI FTDRL SSR_FIFO.TDFE 0 DMAC DTC FTDRL TDFE TDFE SCIn_TEI FTDRL SCR.TIE 0 SCR.TEIE1
SCR.TIE, TE, TEIE0
. SCR.CKE[1:0] = 10b, 11b SCK SSR_FIFO.TEND 1 SCR.TE 0
29.38
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 895 of 1551
RA4W1
29. SCI
29.5.5
(1) FIFO
29.39 29.40
SCI
1. SCR.RE 1 CTSn_RTSn Low
2. SCI RSR
3. SSR.ORER 1 SCR.RIE 1 SCIn_ERI RDR
4. RDR SCR.RIE 1 SCIn_RXI SCIn_RXI RDR RDR CTSn_RTSn Low
SCIn_RXI ICUIELSRn.IR1
SSR.ORER
7 0
7 0 1
6 7
SCIn_RXI
SCIn_RXI RDR
1
SCIn_RXI
SCIn_ERI
1. 14.ICU
29.39
1RTS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 896 of 1551
RA4W1
29. SCI
SCIn_RXI ICUIELSRn.IR1
SSR.ORER
7
0
6 7
SCIn_RXI
SCIn_RXI RDR
CTSn_RTSn
SCIn_RXI
0
SCIn_ERI
1 1. 14.ICU
29.40
2RTS
1 SSR.ORERFER PER 0 RDR SCR.RE 0 RDR RDR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 897 of 1551
RA4W1
29. SCI
29.41
[ 1 ]
SSR.ORER
[ 2 ]
SSR.ORER = 1?
Yes [ 3 ]
No
No SCIn_RXI?
Yes
RDR
[ 4 ]
No
?
[ 5 ]
Yes
SCR.RIE, RE0
[ 1 ] SCI RXDn
[ 2 ] [ 3 ] SSR.ORER ORER 0ORER 1
[ 4 ] SCIn_RXI RDR
[ 5 ] MSB7 RDR RDR SCIn_RXI DMAC DTC
[ 6 ] RDR [ 7 ]
[ 7 ] 0
[ 8 ] 0
[ 3 ]
[ 6 ]
SSR.ORER0
[ 7 ]
SSR.ORER
[ 8 ]
29.41
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 898 of 1551
RA4W1
29. SCI
(2) FIFO
29.42 FIFO
SCI
1. SCR.RE 1 CTSn_RTSn Low
2. SCI RSR
3. SSR_FIFO.ORER 1 SCR.RIE 1 SCIn_ERI FRDRL 1
4. FRDRL 1 FRDRHL SSR_FIFO.RDF 1 SCR.RIE 1 SCIn_RXI SCIn_RXI FRDRL 2 FRDRL RTS CTSn_RTSn Low
1. 2.
FRDRH RDF ORER FRDRH FRDRL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 899 of 1551
RA4W1
29. SCI
[ 1 ]
SSR_FIFO.ORER1
[ 2 ]
SSR_FIFO.ORER = 1?
Yes [ 3 ]
No
No SCIn_RXI?2
Yes
FRDRL
[ 4 ]
No
?
[ 5 ]
Yes
SCR.RIE, RE0
[ 3 ]
[ 1 ] SCI RXDn
[ 2 ] [ 3 ] SSR_FIFO.ORER SSR_FIFO.ORER 0ORER 1
[ 4 ] FRDRL FCR.RTRG FDR.R[4:0]
[ 5 ] FRDRL SSR_FIFO.RDF 0 FRDRL SCIn_RXI DMAC DTC RDF RDF
[ 6 ] FRDRL[ 7 ]
[ 7 ] 0
[ 8 ] 0
[ 6 ]
SSR_FIFO.ORER0
[ 7 ]
SSR_FIFO.ORER
[ 8 ]
1. 2.
FRDRH.ORER ORER SSR_FIFO.ORER 0
FIFO
29.42
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 900 of 1551
RA4W1
29. SCI
29.5.6
(1) FIFO
29.43 SCI
1. SCI SSR TEND 1
2. SCR SCR TIERIETE RE 1 1
1. SCI 2. SCR RIE RE 0 SSR ORER
0 3. SCR TIERIETE RE 1 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 901 of 1551
RA4W1
29. SCI
[ 1 ]
No SCIn_TXI?
Yes
TDR
[ 2 ]
SSR.ORER
SSR.ORER = 1? No
Yes [ 3 ]
No
SCIn_RXI?
Yes
RDR
[ 4 ]
No
?
[ 5 ]
Yes
SCR.TIE, RIE, TE, RE, TEIE0
[ 1 ] SCI TXDn RXDn
[ 2 ] SCIn_TXI TDR
[ 3 ] SSR ORER ORER 0 ORER 1
[ 4 ] SCIn_RXI RDR
[ 5 ] MSB7SCIn_RXI RDR MSB7SCIn_TXI TDR SCIn_TXIDMAC DTC TDR SCIn_RXI DMAC DTC RDR
. SCR.TIE, RIE, TE, RE, TEIE 0 TIE, RIE, TE, RE 1
29.43
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 902 of 1551
RA4W1
29. SCI
(2) FIFO
29.44 FIFO
SCI
1. SCI SSR_FIFO TEND 1
2. SCR SCR TIERIETE RE 1 1
1. SCI 2. SCR RIE RE 0 SSR_FIFO
ORER 0 3. SCR TIERIETE RE 1 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 903 of 1551
RA4W1
29. SCI
[ 1 ]
No SCIn_TXI?
Yes
FTDRL
[ 2 ]
SSR_FIFO.ORER1
SSR_FIFO.ORER = 1?
Yes [ 3 ]
No
No
SCIn_RXI?2
Yes FRDRL [ 4 ]
No
?
[ 5 ]
Yes
SCR.TIE, RIE, TE, RE, TEIE 0
[ 1 ] SCI TXDn RXDn
[ 2 ] SCIn_TXI FTDRL 16 FIFO
[ 3 ] SSR_FIFO.ORER SSR_FIFO.ORER 0 SSR_FIFO.ORER 1
[ 4 ] FRDRL FCR.RTRG FDR.R[4:0]
[ 5 ] FRDRL SSR_FIFO.RDF 0 SCIn_TXI FTDRL SSR_FIFO.TDFE 0 FIFO SCIn_TXIDMAC DTC FTDRL FIFOSCIn_RXI DMAC DTC FRDRL RDF TDFE RDF TDFE
1. 2.
FRDRH.ORER ORER SSR_FIFO.ORER 0
FIFO
29.44
FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 904 of 1551
RA4W1
29. SCI
29.6
SCI ISO/IEC 7816-3Identification Card IC
29.6.1
29.45 IC MCU 29.45 MCU IC 1 TXDn RXDn VCC
IC SCR_SMCI TE RE 1 SCI IC SCKn IC CLK
MCU
TXDn RXDn SCKn Port
VCC VCC
I/O
CLK RST
IC
29.45
IC
29.6.2
29.46
1 8
2ETUElementary Time Unit = 1
10.5ETU Low 1ETU
2ETU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 905 of 1551
RA4W1
29. SCI
Ds
D0
D1
D2
D3
D4
D5
D6
D7
Dp
Ds
D0
D1
D2
D3
D4
D5
D6
D7
Dp
DE
Ds
D0D7
Dp
DE
29.46
2 IC
(1)
29.47 1 Z 0 A LSB 29.47 3Bh
SCMR.SDIR SCMR.SINV 0 SMR_SMCI.PM 0
(Z) A Z Z A Z Z Z A A Z Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Z
29.47
SCMR.SDIR = 0SCMR.SINV = 0SMR_SMCI.PM = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 906 of 1551
RA4W1
29. SCI
(2)
29.48 1 0 A Z MSB 29.48 3Fh
SCMR.SDIR SCMR.SINV 1 Z 0 SINV D7 D0 SMR_SMCI.PM 1
(Z) A Z Z A A A A A A Z Z Ds D7 D6 D5 D4 D3 D2 D1 D0 Dp
29.48
SCMR.SDIR = 1SCMR.SINV = 1SMR_SMCI.PM = 1
29.6.3
SSR_SMCI.PER
1ETU
11.5ETU SSR_SMCI.TEND
SSR_SMCI.ERS 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 907 of 1551
RA4W1
29. SCI
29.6.4
SCI SCMR.BCP2 SMR_SMCI.BCP[1:0] 32 64 372 256 93 128 186 512
29.49 1632186128466493 256
M = (0.5 - 1 ) - (L - 0.5) F 2N
D - 0.5 N
(1 + F)
� 100 [%]
M% NN = 32, 64, 372, 256 DD = 0 1.0 LL = 10 F F = 0D = 0.5N = 372 M = {0.5 - 1/(2 � 372)} � 100 [%] = 49.866%
372 186
0
185
371 0
372 186
185
371 0
RXDn
D0
D1
29.49
372
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 908 of 1551
RA4W1
29. SCI
29.6.5 SCI
SCR_SMCI 00h 29.50 SCI
SCR_SMCI TIERIETERE TEIE SCR_SMCI.RE 0 RDR
SCI SCR_SMCI.TE = 1SCR_SMCI.RE = 0 SCIn_RXI SSR_SMCI.ORER SSR_SMCI.PER
SCI SCR_SMCI.TE = 0SCR_SMCI.RE = 1 SSR_SMCI.TEND
SCR_SMCI.TIE, RIE, TE, RE, TEIE, CKE[1:0]0
SIMR1.IICM0 SCMR.SMIF1
SSR_SMCI.ORER, ERS, PER0 SPMR.CKPHSPMR.CKPOL
[ 1 ]
[ 1 ] SKE[1:0]
[ 2 ]
[ 2 ]
[ 3 ]
[ 3 ] SSR_SMCI SSR_SMCI
[ 4 ]
[ 4 ] SPMR
SMR_SMCI.GM, BLK, PM, BCP[1:0], CKS[1:0]
SMR_SMCI.PE1
SCMR.BCP2, SDIR, SINV
[ 5 ]
[ 5 ] SMR_SMCI
[ 6 ] [ 6 ] SCMR
SEMR.BRME, SEMR.RXDESEL0
[ 7 ]
[ 7 ] SEMR.BRME SEMR.RXDESEL 0
BRR
[ 8 ]
[ 8 ] BRR
I/O
SCR_SMCI.CKE[1:0] CR_SCMI.TECR_SCMI.RE1
SCR_SMCI.TIE, SCR_SMCI.RIE
[ 9 ] [ 10 ] [ 11 ]
[ 9 ] TXDn, RXDn, SCKn I/O
[ 10 ] SCR_SMCI.CKE[1:0] CKE[0] 1 SMR_SMCI.GM SCKn
[ 11 ] SCR_SMCI TE RE 1 SCR_SMCI TIE RIE TE RE 1
29.50
SCI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 909 of 1551
RA4W1
29. SCI
29.50 29.51 29.51 SMR_SMCI GM 0 29.51 SCKn TXDn SCR_SMCI CKE[0] 0 Hi-Z
SCR_SMCI CKE[0] 1 SCK SCR_SMCI TE 1 SCR_SMCI TE 0 1 1 TXDn Hi-Z MCU SCKn TXDn
SCR_SMCI TE RE 0
CKE[0] = 1SCKn
SCKn
Hi-Z
SCR.TE TXDn
Hi-Z
Ds
D0
D1
TE = 1
29.51
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 910 of 1551
RA4W1
29. SCI
29.6.6
29.52
1. 1 SSR_SMCI.ERS 1 SCR_SMCI.RIE 1 SCIn_ERI SSR_SMCI.ERS 0
2. SSR_SMCI.TEND TDR TSR
3. ERS 1
4. SCI 1 TEND SCR_SMCI.TIE 1 SCIn_TXI TDR
29.53 SCIn_TXI DMAC DTC
SSR_SMCI.TEND 1 SCR_SMCI.TIE 1 SCIn_TXI
DMAC DTC SCIn_TXI SCIn_TXI DMAC DTC TEND DMAC DTC 0
SCI TEND 0 DMAC DTC SCI DMAC DTC ERS RIE 1 SCIn_ERI ERS 0
DMAC DTC DMAC DTC SCI
DMAC DTC 17.DMA DMAC18. DTC
n Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
(DE)
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
n + 1
Ds D0 D1 D2 D3 D4
SCIn_TXI SSR_SMCI.ERS
[2]
[4]
[1]
[3]
29.52
SCI
. SMR_SMCI.GM SSR_SMCI.TEND
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 911 of 1551
RA4W1
29. SCI
29.53 TEND
I/O
SSR_SMCI.TEND SCIn_TXI SMR_SMCI.GM = 0
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
DE
12.5 ETU11.5 ETU
SMR_SMCI.GM = 1
11.0 ETU
29.53
Ds
D0D7
Dp
DE
SSR.TEND
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 912 of 1551
RA4W1
29. SCI
29.54
No SSR_SMCI.ERS = 0?
Yes No
SCIn_TXI? Yes
TDR
No ? Yes No SSR_SMCI.ERS = 0? Yes
No SCIn_TXI?
Yes SCR_SMCI.TIE, RIE, TE
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 913 of 1551
RA4W1
29. SCI
29.6.7
29.55
1. SSR_SMCI.PER 1 SCR_SMCI.RIE 1 SCIn_ERI PER
2. SCIn_RXI
3. SSR_SMCI.PER 1
4. SCR_SMCI.RIE 1 SCIn_RXI
29.56 SCIn_RXI DMAC DTC
RIE 1 SCIn_RXI DMAC DTC SCIn_RXI SCIn_RXI DMAC DTC
SSR_SMCI.ORER SSR_SMCI.PER 1 SCIn_ERI DMAC DTC DMAC DTC
PER 1 RDR
SCR_SMCI.RE 0 RDR RDR
. 29.3
n Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
n + 1
Ds D0 D1 D2 D3 D4
SCIn_RXI
[2]
[4]
SSR_SMCI.PER
[1]
[3]
29.55
SCI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 914 of 1551
RA4W1
29. SCI
SSR_SMCI.ORER = 0
No
SSR_SMCI.PER = 0?
Yes
No SCIn_RXI? Yes
RDR
29.56
No ? Yes
SCR_SMCI.RIE, RE0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 915 of 1551
RA4W1
29. SCI
29.6.8
SMR_SMCI.GM 1 SCR_SMCI.CKE[1:0] CKE[1:0] 29.2.12 SCR_SMCI(SCMR.SMIF = 1) 29.6.4
29.57 SCR_SMCI.CKE[1] 0 SCR_SMCI.CKE[0]
SMR_SMCI.GM 0 SCR_SMCI.CKE[0] SCK SCK
SMR_SMCI.GM 1 SCR_SMCI.CKE[0]
CKE[0] G M = 0
SCK
G M = 1
29.57
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 916 of 1551
RA4W1
29. SCI
29.7 IIC
I2C 8 1 8 MSB
29.58 I2C 29.59 I2C
7
S
SLA 7
W#
A
1
7
11
DATA 8
8
7
S
SLA 7
R
A
1
7
11
DATA 8
8
10
S
11110b + SLA 2
W#
A
SLA 8
1
7
11
8
10
S
11110b + SLA 2
W#
A
SLA 8
1
7
11
8
A
A/A# P
1
11
n (n = 1)
A 1 n (n = 1)
A# P 11
n
A
DATA 8
A
1
8
1
n (n = 1)
A/A# P 11
A
Sr
11110b + SLA 2
R
A
DATA 8
A
11
7
11
8
1
n (n = 1)
A# P 11
29.58
I2C
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 917 of 1551
RA4W1
29. SCI
SDAn SCLn
MSB D7-D1
LSB D0
1-7
8
9
D7-D1 D0
1-7
8
9
D7-D1 D0
1-7
8
9
S
SLA R/W# A
DATA
A
DATA
A
P
29.59
I2C SLA = 7
S
SCLn High SDAn
High Low
SLA
R/W# 1 0
A/A#
Low ACK High NACK
Sr
SCLn High
SDAn High Low
DATA
P
SCLn High SDAn
Low High
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 918 of 1551
RA4W1
29. SCI
29.7.1
SIMR3.IICSTAREQ 1
SDAn High Low SCLn BRR 1 SCLn High Low SIMR3.IICSTAREQ 0
SIMR3.IICRSTAREQ 1 SDAn SCLn Low BRR 1 SCLn Low SCLn Low High SCLn High BRR 1
SDAn High Low BRR 1 SCLn High Low SIMR3.IICRSTAREQ 0
SIMR3.IICSTPREQ 1 SDAn High Low SCLn Low BRR 1 SCLn Low SCLn Low High SCLn High BRR 1
SDAn Low High SIMR3.IICSTPREQ 0
29.60
SCLn
SDAn
SIMR3.IICSTAREQ
SIMR3.IICRSTAREQ
SIMR3.IICSTPREQ
SIMR3.IICSDAS[1:0] SIMR3.IICSCLS[1:0]
11b
01b
00b
01b
00b
29.60
R01UH0883JJ0100 Rev.1.00 2020.08.31
01b
11b
Page 919 of 1551
RA4W1
29. SCI
29.7.2
SCLn Low SCLn SCLn SIMR2.IICCSC 1
SIMR2.IICCSC 1 SCLn Low High SCLn Low High SCLn High High
SCLn High High SCLn SCLn 2 3 PCLK 1 2 SCLn Low SCLn High
SIMR2.IICCSC 1 SCLn SCLn SIMR2.IICCSC 0 SCLn
SCLn Low High
SCLn Low High 29.61
SCLn
SCLn
SCLn
29.61
Low
High
SCLnHigh
High
SCLnLow
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 920 of 1551
RA4W1
29. SCI
29.7.3 SDA
SIMR1.IICDL[4:0] SCLn SDAn 0 31 SMR.CKS[1:0] PCLKSDAn 8
SDAn SCLn SCLn SDAn SDAn SCLn IIC 300ns
29.62 SDAn
SCLn
SDAn (IICDL[4:0] = 00000b)
SDAn (IICDL[4:0] = 00001b)
SDAn (IICDL[4:0] = 00010b)
SDAn (IICDL[4:0] = 00111b)
SDAn (IICDL[4:0] = 01000b)
29.62
SDAn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 921 of 1551
RA4W1
29. SCI
29.7.4 SCI IIC
SCR 00h 29.63
SCR IIC
SCR.TIE, RIE, TE, RE, TEIE, CKE[1:0] 0
I/O
[ 1 ]
SIMR3.IICSDAS[1:0], SIMR3.IICSCLS[1:0] 11b
[ 2 ]
SMR, SCMR
[ 3 ]
BRR
[ 4 ]
MDDR
[ 5 ]
SEMR, SNFR, SIMR1, SIMR2, SPMR
[ 6 ]
SCR.RE, TE1 SCR.TIE, RIE, TEIE
[ 7 ]
[ 1 ] SCLnSDAn N I/O
[ 2 ] SCLn SDAn
[ 3 ] SMR, SCMR SMR CKS[1:0] 0 SCMR SDIR 1SINV 0SMIF 0
[ 4 ] BRR
[ 5 ] MDDR SEMR.BRME 0
[ 6 ] SEMR, SNFR, SIMR1, SIMR2, SPMR SEMR NFEN, BRME SNFR NFCS[2:0] SIMR1IICM 1 IICDL[4:0] SIMR2IICACKT, IICCSC 1IICINTM SPMR 0
[ 7 ] SCR.RE, TE 1 SCR.TIE,RIE, TEIE SIMR2.IICINTM = 1 RIE 0SCR.TE, RE 1 SCLn, SDAn
29.63
SCI IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 922 of 1551
RA4W1
29. SCI
29.7.5 IIC
29.64 29.65 29.66 SIMR2.IICINTM 1 SCR.RIE 0SCIn_RXI SCIn_ERI STI 29.24
10 29.66 34 2
IIC SCIn_TXI SCIn_TXI 1
SCLn
7
W#
SDAn SCIn_TXI ICUIELSRn.IR1
STI ICUIELSRn.IR1
STI
SISR.IICACKR
D7 D6 D1 D0
ACK
D7 D6 D1 D0 ACK/NACK
SCIn_TXI
SCIn_TXI
SCIn_TXI
ACK
NACK
ACK
1. 14.ICU
29.64
IIC 1 7
SIMR2.IICINTM 0ACK NACK ACK DMAC DTC NACK NACK
SCLn
7
W#
SDAn
SCIn_TXI ICUIELSRn.IR1
SCIn_RXI ICUIELSRn.IR1
STI ICUIELSRn.IR1
STI
D7 D6 D1 D0
ACK
D7 D6 D1 D0
NACK
SCIn_TXI
SCIn_RXI
SCIn_RXI
STI
SCIn_TXI
STI
1. 14.ICU
29.65
IIC 2 7 ACK NACK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 923 of 1551
RA4W1
29. SCI
SIMR3.IICSTAREQ1 SIMR3.IICSCLS[1:0],
IICSDAS[1:0]01b
[ 1 ] [ 1 ] IIC SCR.RIE0
RXIERI
[ 2 ] [ 2 ]
STI?
No
Yes
SIMR3.IICSTIF0 SIMR3.IICSCLS[1:0], IICSDAS[1:0]
00b
TDRR/W
[ 3 ] TDR TDRR/W
[ 3 ]
SCIn_TXI?
No
Yes
SISR.IICACKR= 0?
No
Yes
TDR
SCIn_TXI?
No
Yes
No
?
Yes
SIMR3.IICSTPREQ1 SIMR3.IICSCLS[1:0],
IICSDAS[1:0]01b
10 [3][4]2
[ 4 ]
[ 4 ] ACK SISR.IICACKR0 ACK 1
[ 5 ] [ 5 ] TDR SCIn_TXIDMAC DTCTDR ACKNACK
[ 6 ] [ 6 ]
STI?
No
Yes
SIMR3.IICSTIF0 SIMR3.IICSCLS[1:0], IICSDAS[1:0]
11b
. IIC SCIn_TXI
29.66
IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 924 of 1551
RA4W1
29. SCI
29.7.6 IIC
29.67 IIC 29.68
SIMR2.IICINTM 1
IIC SCIn_TXI SCIn_TXI 1
7
R
SCLn
SDAn
SCIn_RXI ICUIELSRn.IR1
SCIn_TXI ICUIELSRn.IR1
STI ICUIELSRn.IR1
D7
D6 D1
D0
ACK
D7
D6 D1
D0
NACK
SCR.RIE = 0RXI
RXI
SCIn_TXI
SCIn_TXI
SCIn_TXI
1.
STI STI
STI
14.ICU
29.67
IIC 7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 925 of 1551
RA4W1
29. SCI
SIMR3.IICSTAREQ1 SIMR3.IICSCLS[1:0],
IICSDAS[1:0]01b
STI?
No
Yes
SIMR3.IICSTIF0 SIMR3.IICSCLS[1:0], IICSDAS[1:0]
00b
TDR R/W
SCIn_TXI?
No
Yes
SISR.IICACKR = 0?
No
Yes
SIMR2.IICACKT0 SCR.RIE1
[ 1 ]
[ 1 ] IIC
SCRRIE0
[ 2 ]
[ 2 ]
[ 3 ]
[ 3 ] TDR TDRR/W
[ 4 ] ACK
SISR.IICACKR
[ 4 ]
0ACK
1
?
Yes
[ 5 ]
No
SIMR2.IICACKT1
[ 6 ]
TDRFFh
TDRFFh
SCIn_RXI?
No
Yes
RDR
SCIn_RXI?
No
Yes RDR
SCIn_TXI?
No
Yes
[ 5 ] TDRFFh SCIn_TXIDMACDTC TDR SCIn_RXIDMACDTC RDR
[ 6 ] NACK
[ 7 ]
SCIn_TXI?
No
Yes
SIMR3.IICSTPREQ1
SIMR3.IICSCLS[1:0], IICSDAS[1:0]01b
[ 7 ]
STI?
No
Yes
SIMR3.IICSTIF0 SIMR3.IICSCLS[1:0], IICSDAS[1:0]
11b
. IIC SCIn_TXI
29.68
IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 926 of 1551
RA4W1
29. SCI
29.8 SPI
SCI 1 SPI
SCI SPI SCMR.SMIF = 0SIMR1.IICM = 0 SMR.CM = 1SPMR.SSE 1 SPI SSn SPMR.SSE 0
29.69 SPI SSn
SPI 1 8 SCMR.SINV 1
SCI
1
SSn SCKn MISOn MOSIn
1
2
SSn SCKn MISOn MOSIn
3
29.69
SSn SCKn MISOn MOSIn
1. SSn SPMR.SSE = 0
SPI SPMR.SSE = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 927 of 1551
RA4W1
29. SCI
29.8.1
SPI SCR.CKE[1:0] = 00b 01b SPMR.MSS = 0 SCR.CKE[1:0] = 10b 11b SPMR.MSS = 1
29.24 SSn
29.24
SSn
1
SSn
High
Low
High
Low
TXDn 2
RXDn
SCKn 3
1.
2. 3.
SPMR.SSE = 0SSn SSn High SSn SCR.TE = 0MOSIn SPMR.SSE = 1SCR.TE SCR.RE = 00b SCKn
29.8.2 SS
SCR.CKE[1:0] 00b SPMR.MSS 0 SPMR.SSE = 0SSn SSn
SPMR.SSE = 1 SSn High SCKn
SPMR.SSE = 1 SSn Low MOSIn SCKn SPMR.MFF 1 SPMR.MFF MOSIn SCKn SS
29.8.3 SS
SCR.CKE[1:0] 10b SPMR.MSS 1 SSn High MISOn SCKn SSn Low SCKn
SSn Low High MISOn SCKn 1 SCIn_TXISCIn_RXISCIn_TEI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 928 of 1551
RA4W1
29. SCI
29.8.4
SPMR.CKPOL SPMR.CKPH 4 29.70 SSn High
(1) CKPH = 0 SSn
SCKn
CKPOL = 0
SCKn CKPOL = 1
MOSIn
MISOn
(2) CKPH = 1 SSn
SCKn
CKPOL = 0 SCKn
CKPOL = 1
MOSIn
MISOn
1
0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
29.70
SPI
29.8.5 SCI SPI
SPI 29.32 SPMR.CKPOL SPMR.CKPH
SCR
. 0 SCR.RE SSR.ORERFERPERRDR
SCR.TIE 1 SCR.TE 1 0 0 1 SCIn_TXI
29.8.6 SPI
SSn Low High
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 929 of 1551
RA4W1
29. SCI
29.9
PCLK SMR/SMR_SMCI CKS[1:0] MDDR
PCLK SMR/SMR_SMCI CKS[1:0] BRR MDDR 0 160 29.71 256/160 160/256
.
SPI SMR.CKS[1:0] = 00bSCR.CKE[1] = 0 BRR = 0
161
(a)
MDDR25616096
161
152/321256/160
(b) 160/256
29.71
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 930 of 1551
RA4W1
29. SCI
29.10
29.10.1 SCIn_TXI SCIn_RXI FIFO
ICU 1 SCIn_TXI SCIn_RXI ICU 1 1
ICU 0 ICU SCR/SCR_SMCI TIE RIE
29.10.2 SCIn_TXI SCIn_RXI FIFO
ICU 1 SCIn_TXI SCIn_RXI ICU ICU 0 SCIn_TXI SCIn_RXI
29.10.3 SPI
(1) FIFO
29.25 SPI SCR
SCR.TIE 1 TDR TDRHL 1 TSR SCIn_TXI SCR.TE SCR.TIE 1 1 SCIn_TXI SCIn_TXI DMAC DTC
SCR.TIE 0 SCR.TE 1 SCR.TE 1 SCR.TIE 1 2SCIn_TXI
SCR.TEIE 1 SSR.TEND 1 SCIn_TEI SCR.TE 1 TDR TDRHL 1 SSR.TEND 1 SCR.TEIE 1 SCIn_TEI
TDR TDRHL 1 SSR.TEND SCIn_TEI
SCR.RIE 1 RDR SCIn_RXI SCIn_RXI DMAC DTC
SCR.RIE 1 SSR.ORERFERPER 1 SCIn_ERI SCIn_RXI 3 ORER FERPERSCIn_ERI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 931 of 1551
RA4W1
29. SCI
(2) FIFO
29.26 FIFO
SCR.TIE 1 FTDRL FCR.TTRG SCIn_TXI SCIn_TXI SCR.TIE SCR.TE 1 1
SCR.TIE 0 SCR.TE 1 SCR.TE 1 SCR.TIE 1 SCIn_TXI
SCR.TEIE 1 FTDRL SSR_FIFO.TEND 1 SCIn_TEI
SCR.RIE 1 FRDRL FCR.RTRG SCIn_RXI RTRG 0 FIFO 0 SCIn_RXI
SCR.RIE 1 SSR_FIFO.ORER 1 FRDRL SCIn_ERI FRDRL SCIn_RXI SSR_FIFO.ORERFER PER SCIn_ERI
1. 2.
9 SCIn_TXI SCR.TIE ICU SCIn_TXI
29.25
SCI FIFO
SCIn_ERI
1
ORER, FER, PER, DFER, DPER
RIE
DTC
DMAC
SCIn_RXI
RDRF
RIE
DCMF
RIE
SCIn_AM
DCMF
--
SCIn_TXI
TDRE
TIE
SCIn_TEI
TEND
TEIE
1. ORER SPI
29.26
SCI FIFO
SCIn_ERI
1
ORER, FER, PER, DFER, DPER
RIE
DTC
DMAC
DRFCR.DRES = 1 RIE
SCIn_RXI
RDF
RIE
DRFCR.DRES = 0 RIE
DCMF
RIE
SCIn_AM
DCMF
--
SCIn_TXI
TDFE
TIE
SCIn_TEI
TEND
TEIE
1. ORER SPI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 932 of 1551
RA4W1
29. SCI
29.10.4
29.27 SCIn_TEISCIn_AM
29.27
SCI
SCIn_ERI
SCIn_RXI SCIn_TXI
ORER, FER, ERS
RDRF TEND
RIE
RIE TIE
DTC
DMAC
SCI DMAC DTC SSR_SMCI.TEND 1 SCIn_TXI DMAC DTC SCIn_TXI SCIn_TXI DMAC DTC TEND DMAC DTC 0
SCI TEND 0 DMAC DTC SCI DMAC DTC SSR_SMCI.ERS 0 SCR_SMCI.RIE 1 SCIn_ERI ERS
DMAC DTC DMAC DTC SCI DMAC DTC 17.DMA DMAC18.DTC
RDR SCIn_RXI DMAC DTC SCIn_RXI SCIn_RXI DMAC DTC DMAC DTC CPU SCIn_ERI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 933 of 1551
RA4W1
29. SCI
29.10.5 IIC
IIC 29.28 STI SCIn_TEISCIn_ERISCIn_AM
IIC DMAC DTC
SIMR2.IICINTM 1
SCLn 8 SCIn_RXI DMAC DTC SCIn_RXI SCIn_RXI DMAC DTC
SCLn 9 SCIn_TXI DMAC DTC SCIn_TXI SCIn_TXI DMAC DTC
SIMR2.IICINTM 0
SCLn 9 SDAn Low SCIn_RXI ACK DMAC DTC SCIn_RXI SCIn_RXI DMAC DTC
SCLn 9 SDAn High SCIn_TXI NACK
DMAC DTC DMAC DTC SCI
SIMR3.IICSTAREQIICRSTAREQIICSTPREQ STI
29.28
SCI IIC
SCIn_RXI SCIn_TXI STIn
ACK NACK
-- -- IICSTIF
RIE TIE TEIE
DTC
DMAC
.
SIMR2.IICINTM 1DTC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 934 of 1551
RA4W1
29. SCI
29.11
SCI ELC
(1)
FIFO FCR.DRES 1 SSR_FIFO.FER SSR_FIFO.PER 0
FIFO FIFO 15ETU
(2)
IIC SIMR2.IICINTM 0 ACK IIC SIMR2.IICINTM 1 SCLn 8
IIC SIMR2.IICINTM 1 ELC
(a) FIFO
RDR RDRHL
(b) FIFO
(3)
SCR/SCR_SMCI.TE 0 1
IIC SIMR2.IICINTM 0 NACK IIC SIMR2.IICINTM 1 SCLn 9
(a) FIFO
TDR TDRHLTSR
(b) FIFO
(4)
IIC
. FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 935 of 1551
RA4W1
29. SCI
(5)
DCCR.DCME 1 CDR.CMPD 1
29.12 SCI0_DCUF
DCCR.DCME 1 CDR.CMPD 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 936 of 1551
RA4W1
29. SCI
29.13
29.72 2 2 3 3
SEMR.ABCS = 0 SEMR.ABCSE = 0 1 1/16
SEMR.ABCS = 1 SEMR.ABCSE = 0 1 1/8
SEMR.ABCSE = 1 1 1/6
RXDn RXDn
IIC SDAn SCLn SNFR.NFCS 124 8
SCR.TE SCR.RE 0 1 1 0 3
DQ CLK
TXDn/SDAn, RXDn/SCLn
TXDn/SDAn,RXDn/ SCLn
DQ
1 2
CLK
4
8
NFCS[2:0]
DQ CLK
29.72
NFEN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 937 of 1551
RA4W1
29. SCI
29.14
29.14.1
BMSTPCRBSCI SCI 11.
29.14.2 SCI
(1)
TXDn SCR/SCR_SMCI TIE TETEIE 0 SCI SPTR TXDn TE 0 TSR SSR/SSR_SMCI TEND FIFO 1 FIFO SPTR
1. TE 1
2. SSR/SSR_FIFO/SSR_SMCI
3. TDR
SCI
29.73 29.74 29.75
DTC TE 0 DTC TE 1 SCIn_TXI 1 DTC
(2)
(a)
SCR/SCR_SMCI.RE 0
29.73
(b)
1.
2. CDR.CMPD DCCR.DCME 1
3. SCR/SCR_SMCI.RE = 1
4.
SCI RXD Low SEMR.RXDESEL 0 SEMR.RXDESEL 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 938 of 1551
RA4W1
29. SCI
RXDn 29.73
(c) SCI0
SCI0 11.
?
No [ 1 ]
Yes
SSR/SSR_FIFO/SSR_SMCI.TEND
No SSR/SSR_FIFO/SSR_SMCI.TEND = 1?
Yes
[ 2 ] I/OSPTR
SCR/SCR_SMCI.TE = 0
[ 3 ]
[ 4 ]
[ 1 ] SCR/SCR_SMCI TE 1 SSR/SSR_FIFO/SSR_SMCI TDR CPU DMAC DTC SCR/SCR_SMCI TE TIE 1 DMAC DTC
[ 2 ] TXDnI/O I/OSPTR
[ 3 ] SCR/SCR_SMCI.TE 0SCR/ SCR_SMCI.TIE = 1 SCR/SCR_SMCI.TEIE = 1 SCR.TE 0
[ 4 ]
? Yes
No I/O SCR/SCR_SMCI.TE = 1
29.73
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 939 of 1551
RA4W1
29. SCI
PmnPFS.PMR TXDn SPTR.SPB2IO SCR/SCR_SMCI.TE
SCKn
TXDn
High
SCITXDn
PmnPFS.PMR SPTRTXDn LowHigh
SPTR.SPB2DT
TE = 0TXDn SPTR
29.74
PmnPFS.PMR
SCR/SCR_SMCI.TE
SCKn
TXDn
TXD SCITXDn
SCITXDn
29.75
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 940 of 1551
RA4W1
29. SCI
SCIn_RXI?
Yes RDR
No [ 1 ]
[ 1 ]
SCR/SCR_SMCI.RE = 0
[ 2 ]
[ 2 ]
? Yes
No SCR/SCR_SMCI.RE = 1
29.76
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 941 of 1551
RA4W1
29. SCI
SCIn_RXI? Yes
RDR
No [ 1 ]
[ 1 ]
SCR/SCR_SMCI.RE = 0
CDR DCCR.DCME = 1
SCR/SCR_SMCI.RE = 1
[ 2 ]
No ?
Yes
[ 2 ]
29.77
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 942 of 1551
RA4W1
29. SCI
29.14.3
(1) FIFO
RXDn RXDn 0 SSR.FER 1 SSR.PER 1SCI FER 0 FER 1 SEMR.RXDESEL 1 SCI SSR.FER 1 SSR.FER 0 SSR.FER 0
RXDn 1 RXDn
(2) FIFO
SCI 1 0 SPTR.RXDMON RXD FRDRHL
29.14.4
SCR/SCR_SMCI.TE 0SPTR.SPB2IO SPTR.SPB2DT TXDn TXDn
SCR/SCR_SMCI.TE 1SPB2IO SPB2DT 1 I/O TXDn SPB2IO SPB2DT TXDn 0 I/O TXDn SCR/SCR_SMCI.TE 0 SCR/SCR_SMCI.TE 0
29.14.5 SPI
SSR/SSR_FIFO.ORER 1 TDR FTDRL 1 0
. SCR/SCR_SMCI.RE 0 0 1. SPI FTDRH
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 943 of 1551
RA4W1
29. SCI
29.14.6 SPI
(1)
TDR
1PCLK + tDO+ tSU 29.78
(2)
7 TDR TDRHL 29.78
7 TDR Low TDR 7 High 4PCLK 29.78
TDR
t1PCLK + tDO + tSU
7TDR
t 1
SCIn_TXI ICUIELSRn.IR1
D0 D1 D2 D3 D4 D5 D6 D7 D0 D1
(1) (2) (a)
7TDR t4PCLK t
TDR
SCIn_TXI ICUIELSRn.IR1
D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3
(2) (b) 1. 14.ICU
29.78
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 944 of 1551
RA4W1
29. SCI
29.14.7 DMAC DTC
DMAC DTC DMAC DTC
(1) TDRFTDRHL
(a) FIFO
TDR TDRHL TDR TDRHL TDR TDRHL TSR DMAC DTC TDR TDRHL SCIn_TXI
(b) FIFO
SCR.TE 1 FTDRH FTDRL FDR.T[4:0]
(2) RDRFRDRHL
DMAC DTC RDR RDRHL SCI SCIn_RXI
29.14.8
ICU IELSRn.IR 1 SCR/ SCR_SMCI.TE 1 SCR/SCR_SMCI.RE 1 14. ICU
1. SCR/SCR_SMCI.TE SCR/SCR_SMCI.RE 0
2. SCR/SCR_SMCI.TIE SCR/SCR_SMCI.RIE 0
3. SCR/SCR_SMCI.TIE SCR/SCR_SMCI.RIE 0
4. ICU IELSRn.IR 0
29.14.9 SPI
SPI SCKn
High Low 2PCLK 6PCLK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 945 of 1551
RA4W1
29. SCI
29.14.10 SPI
(1)
SPMR.SSE 1 SPMR.CKPH SPMR.CKPOL SCR.TE 0 SCR.TE 0 1 SPMR.SSE 0 SCR.TE 0
SPMR.CKPH = 1 29.79 SCKn SCIn_RXISCR.TE SCR.RE SCKn 0 SCKn SCIn_RXI SCKn SSn High
SSn Low SCKn
SCKn (CKPOL = 0)
SCKn (CKPOL = 1)
RXDn
SCIn_RXI
0 1 2 3 4 5 6 7
29.79
SPI SCIn_RXI
(2)
TDR 1PCLK + tDO+ tSU
SSn Low 5PCLK
SSn
SSn Low High SCR.TE SCR.RE 0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 946 of 1551
RA4W1
30. I2C IIC
30. I2C IIC
30.1
MCU 2 I2C IICIIC NXP I2CInter-Integrated Circuit 30.1 IIC 30.1 IIC 30.2 I2C 30.2
30.1
IIC (1/2)
SCL
I2C SMBus
400kbps
SCL 4% 96%
3 7 10 ID SMBus
8 9
SCL Low 8 9 9 1
SDA
- SCLSCL - SDA SDA - SDA SDA
SDA SDA
SDASDA
SCL
SCL SDA
NACK
IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 947 of 1551
RA4W1
30. I2C IIC
30.1
IIC (2/2)
NACK
1
CPU
1. IIC IIC0
SCLn
NF[1:0]
NFE
SDAn
NF[1:0]
NFE
PCLKB
SCLn, SDAn
PS
DLCS
IIC, IIC/2
SDA
ACKBT
ACK
NACKE
NACK ACK
MALE, NALE, SALE
PS IIC (PCLKB/1PCLKB/128)
CKS[2:0] BC[2:0]
CLO
SCLE
SCLI
IICRST ST, RS, SP
WAIT, RDRFS
SDAI BBSY, MST, TRS
SDDL[2:0]
ICDRT ICDRS
ACKBR
SARU0 SARU1 SARU2
ICMR1
ICBRH ICBRL
ICCR1
ICCR2
ICFER ICMR2 ICMR3
SARL0 SARL1 SARL2
ICDRR
TMOE
TMOS, TMOH, TMOL
NACKF TMOF
ICSR1 ICSER
ICSR2 ICIER
(IICn_TXI, IICn_TEI, IICn_RXI,
IICn_EEI, IIC0_WUI)
30.1
IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 948 of 1551
RA4W1
30. I2C IIC
SCLin
SCL
SCLout#
SDAin SDAout#
SDA
SCLin SCLout#
SCL SDA SCL SDA
SCLin SCLout#
SCL SDA
SDAin SDAout#
1
SDAin SDAout#
2
30.2
I2C
IIC I2C ICMR3.SMBS = 0 CMOS SMBus ICMR3.SMBS = 1 TTL
30.2
IIC
IIC0
IIC1
SCL0 SDA0 SCL1 SDA1
IIC0 IIC0 IIC1 IIC1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 949 of 1551
RA4W1
30.2 30.2.1 I2C 1ICCR1
IIC0.ICCR1 4005 3000h, IIC1.ICCR1 4005 3100h
b7
b6
b5
b4
b3
b2
b1
b0
ICE IICRST CLO SOWP SCLO SDAO SCLI SDAI
0
0
0
1
1
1
1
1
30. I2C IIC
R/W
b0
SDAI
SDA
0SDAn Low
R
1SDAn High
b1
SCLI
SCL
0SCLn Low
R
1SCLn High
b2
SDAO
SDA
R/W
0IIC SDAn Low
1IIC SDAn
0IIC SDAn Low
1IIC SDAn
b3
SCLO
SCL
R/W
0IIC SCLn Low
1IIC SCLn
0IIC SCLn Low
1IIC SCLn
High
b4
SOWP SCLO/SDAO 0SCLO SDAO
R/W
1SCLO SDAO
1
b5
CLO
SCL
0SCL
R/W
1SCL
1 0
b6
IICRST IIC
0IIC
R/W
1IIC
SCLn/SDAn
b7
ICE
IIC
0SCLn SDAn
R/W
1SCLn SDAn
IICRST IIC
SDAO SDA SCLO SCL
IIC SDAn SCLn
SOWP 0 IIC
IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 950 of 1551
RA4W1
30. I2C IIC
CLO SCL
SCL 1
0 1 30.12.2SCL
IICRST IIC
IIC
1 IIC IIC ICE IICRST 30.3 IIC
IIC ICCR1.ICE ICCR1.ICCRST1 IIC
ICMR1.BC[2:0]
I2C ICDRS
I2C ICSR1 ICSR2
SDAO SCLO ICCR1.SDAO ICCR1.SCLO
I2C 2ICCR2.BBSY
30.15
ICE = 1 IICRST 1 IIC IIC IIC Low Low SCLn SDAn
. IICRST SCLn Low IIC
30.3
IICRST 1
IIC
ICE 0 1
IIC
ICCR1.ICE ICCR1.ICCRST IIC
ICMR1.BC[2:0] ICSR1 ICSR2 ICDRS ICCR1.SCLO ICCR1.SDAO ICCR2 ICCR2.BBSY IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 951 of 1551
RA4W1
30. I2C IIC
ICE IIC
SCLn SDAn IICRST 2 30.3
IIC ICE 1 ICE 1 SCLn SDAn IIC ICE 0 ICE 0 SCLn SDAn SCLn SDAn IIC IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 952 of 1551
RA4W1
30.2.2 I2C 2ICCR2
IIC0.ICCR2 4005 3001h, IIC1.ICCR2 4005 3101h
b7
b6
b5
b4
b3
b2
b1
b0
BBSY MST TRS --
SP
RS
ST
--
0
0
0
0
0
0
0
0
30. I2C IIC
b0 b1
-- ST
b2
RS
b3
SP
b4
--
b5
TRS
b6
MST
b7
BBSY
0 0
0 1
0 1
0 1
0 0
0 1
0 1
0I2C 1I2C
1. ICMR1.MTWP 1 MST TRS
R/W R/W R/W
R/W
R/W
R/W R/W
1
R/W
1
R
ST
1 BBSY 0 30.11 1 1 0 0
ICSR2.AL 1 ICCR1.IICRST 1 IIC
. BBSY 0ST 1 BBSY 1ST 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 953 of 1551
RA4W1
30. I2C IIC
RS
1 BBSY 1 MST 1 30.11 1 ICCR2.BBSY 1 1 0 0
ICSR2.AL 1 ICCR1.IICRST 1 IIC
. RS 1 . RS 1
RS 1 RS
SP
1 BBSY 1 MST 1 30.11 1 ICCR2.BBSY ICCR2.MST 1 1 0 0
ICSR2.AL 1
ICCR1.IICRST 1 IIC
. BBSY 0SP . SP 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 954 of 1551
RA4W1
30. I2C IIC
TRS
IIC TRS 0 1 TRS MST IIC
R/W# TRS 1 0ICMR1.MTWP 1 TRS
1 ST 1
RS 1
R/W# 0
ICSER R/W# 1
ICMR1.MTWP 1 TRS 1
0
ICSR2.AL 1
R/W# 1
ICSER R/W# 0
ICCR2.BBSY = 1ICCR2.MST = 0
ICMR1.MTWP 1 TRS 0
ICCR1.IICRST 1 IIC
MST
IIC MST 0 1 MST TRS IIC
MST 1 0ICMR1.MTWP 1 MST 1
ST 1
ICMR1.MTWP 1 MST 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 955 of 1551
RA4W1
30. I2C IIC
0
ICSR2.AL 1
ICMR1.MTWP 1 MST 0
ICCR1.IICRST 1 IIC
BBSY I2C SCLn High SDAn High Low
1 SCLn High SDAn Low High ICBRL
0 1
0 ICBRL
ICCR1.ICE 0 ICCR1.IICRST 1 IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 956 of 1551
RA4W1
30.2.3 I2C 1ICMR1
IIC0.ICMR1 4005 3002h, IIC1.ICMR1 4005 3102h
b7
b6
b5
b4
b3
b2
b1
b0
MTWP
CKS[2:0]
BCWP
BC[2:0]
0
0
0
0
1
0
0
0
30. I2C IIC
b2-b0
BC[2:0]
b3
BCWP
BC
b6-b4
CKS[2:0]
b7
MTWP
MST/TRS
b2
b0
0 0 09
0 0 12
0 1 03
0 1 14
1 0 05
1 0 16
1 1 07
1 1 18
0BC[2:0] 1BC[2:0] 1
IIC IIC
b6
b4
0 0 0PCLKB
0 0 1PCLKB/2
0 1 0PCLKB/4
0 1 1PCLKB/8
1 0 0PCLKB/16
1 0 1PCLKB/32
1 1 0PCLKB/64
1 1 1PCLKB/128
0ICCR2.MSTTRS 1ICCR2.MSTTRS
1. BC[2:0] BCWP 0
R/W R/W
1
R/W
1
R/W
R/W
BC[2:0]
SCLn
SCLn Low + 1
BC[2:0] 000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 957 of 1551
RA4W1
30.2.4 I2C 2ICMR2
IIC0.ICMR2 4005 3003h, IIC1.ICMR2 4005 3103h
b7 DLCS 0
b6
b5
b4
SDDL[2:0]
0
0
0
b3
b2
b1
b0
-- TMOH TMOL TMOS
0
1
1
0
30. I2C IIC
b0
TMOS
b1
TMOL
L
b2
TMOH
H
b3 b6-b4
-- SDDL[2:0]
SDA
b7
DLCS
SDA
R/W
0
R/W
1
0SCLn Low
R/W
1SCLn Low
0SCLn High
R/W
1SCLn High
0 0
R/W
ICMR2.DLCS = 0IIC
R/W
b6
b4
0 0 0
0 0 1IIC 1
0 1 0IIC 2
0 1 1IIC 3
1 0 0IIC 4
1 0 1IIC 5
1 1 0IIC 6
1 1 1IIC 7
ICMR2.DLCS = 1IIC/2
b6
b4
0 0 0
0 0 1IIC 1 2
0 1 0IIC 3 4
0 1 1IIC 5 6
1 0 0IIC 7 8
1 0 1IIC 9 10
1 1 0IIC 11 12
1 1 1IIC 13 14
0SDA R/W IIC
1SDA 2 IIC/2 1
1.
DLCS = 1IIC/2SCL Low SCL High DLCS = 1 IIC
TMOS
ICFER.TMOE = 1 0 TMOS 1 16 14 SCLn TMOH TMOL IIC
30.12.1
TMOL L
SCLn Low ICFER.TMOE = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 958 of 1551
RA4W1
30. I2C IIC
TMOH H
SCLn High ICFER.TMOE = 1
SDDL[2:0] SDA
SDDL[2:0] SDA SDA DLCS SDA
SDA 1 I2C SMBus 300ns + SCL Low - 250ns
30.5SDA
1.
3450ns 100kbpsSm 900ns 400kbpsFm
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 959 of 1551
RA4W1
30.2.5 I2C 3ICMR3
IIC0.ICMR3 4005 3004h, IIC1.ICMR3 4005 3104h
b7
b6
b5
b4
b3
b2
SMBS
WAIT
RDRFS
ACKW P
ACKBT ACKBR
0
0
0
0
0
0
b1
b0
NF[1:0]
0
0
30. I2C IIC
b1-b0
b2 b3 b4 b5
b6
b7
NF[1:0]
ACKBR ACKBT ACKWP RDRFS
WAIT
SMBS
b1 b0
0 01IIC 1 0 12IIC 2 1 03IIC 3 1 14IIC 4
0 0 ACK 1 1 NACK
0 0 ACK 1 1 NACK
ACKBT 0ACKBT 1ACKBT
RDRF
0SCL 9 RDRF 8 SCLnLow
1SCL 8 RDRF 8 SCLnLow Low ACKBT
WAIT
0 9 1 SCLn Low
1 9 1 SCLn Low Low ICDRR
SMBus/I2C
0I2C 1SMBus
R/W R/W
R R/W
1
R/W
1
R/W
2
R/W
2
R/W
1. 2.
ACKBT ACKWP 1 ACKWP ACKBT 1 ACKBT 1 WAIT RDRFS
NF[1:0]
30.6
. SCLn High Low SCL High Low - 1.5 IIC + 120nsIIC SCL IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 960 of 1551
RA4W1
30. I2C IIC
ACKBR
1 ICCR2.TRS 1 1
0 ICCR2.TRS 1 0
ICCR1.ICE 0 ICCR1.IICRST 1 IIC
ACKBT
1 ACKWP 1 1
0 ACKWP 1 0
ICCR2.SP 1
ICCR1.ICE 0 ICCR1.IICRST 1 IIC
ACKWP ACKBT ACKBT
RDRFS RDRF RDRF SCL 8 SCLn
Low RDRFS 0 SCL 8 SCLn Low
SCL 9 RDRF 1 RDRFS 1 SCL 8 SCLn Low
SCL 8 RDRF 1 SCLn Low ACKBT
SCLn Low ACKACKBT 0 NACKACKBT 1
WAIT WAIT 1 ICDRR
SCL 9 1 Low WAIT 0 SCL 9 1 Low
RDRFS WAIT 0
WAIT 1 1 9 ICDRR SCLn Low 1
. WAIT ICDRR
SMBS SMBus/I2C SMBS 1 SMBus ICSER.HOAE
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 961 of 1551
RA4W1
30. I2C IIC
30.2.6 I2C ICFER
IIC0.ICFER 4005 3005h, IIC1.ICFER 4005 3105h
b7 -- 0
b6
b5
b4
b3
b2
b1
b0
SCLE NFE NACKE SALE NALE MALE TMOE
1
1
1
0
0
1
0
R/W
b0
TMOE 0
R/W
1
b1
MALE
0
R/W
ICCR2.MST TRS
1
ICCR2.MST TRS
b2
NALE
NACK 0NACK
R/W
1NACK
b3
SALE
0
R/W
1
b4
NACKE NACK 0NACK
R/W
1NACK
b5
NFE
0
R/W
1
b6
SCLE
SCL
0SCL
R/W
1SCL
b7
--
00
R/W
TMOE
30.12.1
MALE
1
NALE NACK
NACK ACK 2
SALE
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 962 of 1551
RA4W1
30. I2C IIC
NACKE NACK
NACK 1
NACKE 1 NACK NACKE 0
NACK 30.9.2NACK
SCLE SCL
SCL SCL 1
SCLE 0SCL IIC SCL SCL SCLn IIC ICBRH ICBRL SCL I2C SCL SCL SCL SCL
SCLE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 963 of 1551
RA4W1
30. I2C IIC
30.2.7 I2C ICSER
IIC0.ICSER 4005 3006h, IIC1.ICSER 4005 3106h
b7
b6
HOAE --
0
0
b5 DIDE
0
b4
b3
b2
b1
b0
-- GCAE SAR2E SAR1E SAR0E
0
1
0
0
1
R/W
b0
SAR0E
0
0SARL0 SARU0
R/W
1SARL0 SARU0
b1
SAR1E
1
0SARL1 SARU1
R/W
1SARL1 SARU1
b2
SAR2E
2
0SARL2 SARU2
R/W
1SARL2 SARU2
b3
GCAE
0
R/W
1
b4
--
00
R/W
b5
DIDE
ID
0 ID
R/W
1 ID
b6
--
00
R/W
b7
HOAE
0
R/W
1
SARyE y y = 0 2
SARLy SARUy
SARyE 1 SARLy SARUy SARyE 0 SARLy SARUy
GCAE
0000 000b + 0[W] 0
1 IIC SARLy SARUy y = 0 2 0
DIDE ID
1 ID 1111 100b ID
DIDE 1 1 ID IIC ID R/W# 0[W] IIC 2 DIDE 0 IIC 1 ID 1
ID 30.7.3 ID
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 964 of 1551
RA4W1
30. I2C IIC
HOAE
ICMR3.SMBS 1 0001 000b
1 ICMR3.SMBS 1 IIC SARLy SARUy y = 0 2
ICMR3.SMBS HOAE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 965 of 1551
RA4W1
30.2.8 I2C ICIER
IIC0.ICIER 4005 3007h, IIC1.ICIER 4005 3107h
b7 TIE 0
b6 TEIE
0
b5
b4
b3
b2
b1
b0
RIE NAKIE SPIE STIE ALIE TMOIE
0
0
0
0
0
0
30. I2C IIC
R/W
b0
TMOIE
0TMOIn
R/W
1TMOIn
b1
ALIE
0ALIn
R/W
1ALIn
b2
STIE
0STIn R/W
1STIn
b3
SPIE
0SPIn R/W
1SPIn
b4
NAKIE NACK
0NACK NAKIn
R/W
1NACK NAKIn
b5
RIE
0IICn_RXI
R/W
1IICn_RXI
b6
TEIE
0IICn_TEI
R/W
1IICn_TEI
b7
TIE
0IICn_TXI
R/W
1IICn_TXI
TMOIE ICSR2.TMOF 1 TMOInTMOI
TMOF TMOIE 0
ALIE ICSR2.AL 1 ALIn
ALI AL ALIE 0
STIE ICSR2.START 1 STIn
STI START STIE 0
SPIE ICSR2.STOP 1 SPIn
SPI STOP SPIE 0
NAKIE NACK ICSR2.NACKF 1 NACK NAKInNAKI
NACKF NAKIE 0
RIE ICSR2.RDRF 1 IICn_RXI
TEIE ICSR2.TEND 1 IICn_TEIIICn_TEI
TEND TEIE 0
TIE ICSR2.TDRE 1 IICn_TXI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 966 of 1551
RA4W1
30.2.9 I2C 1ICSR1
IIC0.ICSR1 4005 3008h, IIC1.ICSR1 4005 3108h
b7
b6
b5
b4
b3
b2
b1
b0
HOA --
DID
-- GCA AAS2 AAS1 AAS0
0
0
0
0
0
0
0
0
30. I2C IIC
b0 b1 b2 b3 b4 b5
b6 b7
AAS0
0
AAS1
1
AAS2
2
GCA
--
DID
ID
-- HOA
0 0 1 0
0 1 1 1
0 2 1 2
0 1
00
0 ID 1 ID 1 [ ID 1111 100b+ 0[W]] 1
00
0 1 0001 000b1
R/W R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/W R/(W)
1
R/W R/(W)
1
1. 0
AASy y y = 0 2 1 7 SARUy.FS = 0 ICSER.SARyE 1 y
SARLy.SVA[6:0] SCL 9 1
10 SARUy.FS = 1 ICSER.SARyE 1 y
11110b + SARUy.SVA[1:0] SARLy SCL 9 1
0 1 0
ICCR1.IICRST 1 IIC
7 SARUy.FS = 0 ICSER.SARyE 1 y
SARLy.SVA[6:0] SCL 9 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 967 of 1551
RA4W1
30. I2C IIC
10 SARUy.FS = 1
ICSER.SARyE 1 y 11110b + SARUy.SVA[1:0] SCL 9 0
ICSER.SARyE 1 y 11110b + SARUy.SVA[1:0] SARLy SCL 9 0
GCA
1
ICSER.GCAE 1 0000 000b + 0[W] SCL 9 1
0
1 0
ICSER.GCAE 1 0000 000b + 0[W] SCL 9 0
ICCR1.IICRST 1 IIC
DID ID
1
ICSER.DIDE 1 ID 1 ID1111 100b+ 0[W] SCL 9 1
0
1 0
ICSER.DIDE 1 ID 1 ID1111 100b SCL 9 0
ICSER.DIDE 1 ID 1 ID1111 100b+ 0[W] 2 0 2 SCL 9 0
ICCR1.IICRST 1 IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 968 of 1551
RA4W1
30. I2C IIC
HOA 1 ICSER.HOAE 1
0001 000b SCL 9 1
0 1 0
ICSER.HOAE 1 0001 000b SCL 9 0
ICCR1.IICRST 1 IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 969 of 1551
RA4W1
30.2.10 I2C 2ICSR2
IIC0.ICSR2 4005 3009h, IIC1.ICSR2 4005 3109h
b7
b6
b5
b4
b3
b2
b1
b0
TDRE TEND RDRF NACKF STOP START AL TMOF
0
0
0
0
0
0
0
0
30. I2C IIC
b0
TMOF
b1
AL
b2
START
b3
STOP
b4
NACKF
NACK
b5
RDRF
b6
TEND
b7
TDRE
1. 0
0 1
0 1
0 1
0 1
0NACK 1NACK
0ICDRR 1ICDRR
0 1
0ICDRT 1ICDRT
R/W
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R/(W)
1
R
TMOF
SCLn IIC TMOF 1
1
ICFER.TMOE 1 ICMR2.TMOHTMOLTMOS SCLn
0
1 0
ICCR1.IICRST 1 IIC
AL
IIC SDAn SDAn AL 1
IIC AL NACK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 970 of 1551
RA4W1
30. I2C IIC
1 ICFER.MALE = 1 ACK SDA SCL
SDAn
ICCR2.ST 1 SDA SDAn
ICCR2.BBSY 1 ICCR2.ST 1
NACK ICFER.NALE = 1 NACK ACK SDA SCL
SDAn
ICFER.SALE = 1 ACK SDA SCL
SDAn
0 1 0
ICCR1.IICRST 1 IIC
30.4
MALE 1
x x
ICFER
ICSR2
NALE SALE AL
x
x
1
ICCR2.ST 1 SDA SDAn
ICCR2.BBSY 1 ICCR2.ST 1
1
1
x
1
NACK NACK ACK
x
1
1
�: Don't care
START 1 0 1 0
ICCR1.IICRST 1 IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 971 of 1551
RA4W1
30. I2C IIC
STOP 1 0 1 0 ICCR1.IICRST 1 IIC
NACKF NACK 1 ICFER.NACKE 1
NACK 0 1 0 ICCR1.IICRST 1 IIC . NACKF 1 IIC NACKF 1
ICDRT ICDRR NACKF 0
RDRF 1 ICDRS ICDRR RDRF SCL 8
9 ICMR3.RDRFS 1 ICCR2.TRS 0
0 1 0 ICDRR ICCR1.IICRST 1 IIC
TEND 1 TDRE 1 SCL 9 0 1 0 ICDRT
ICCR1.IICRST 1 IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 972 of 1551
RA4W1
30. I2C IIC
TDRE 1 ICDRT ICDRS ICDRT ICCR2.TRS 1 TRS 1 0 ICDRT ICCR2.TRS 0 ICCR1.IICRST 1 IIC
. ICFER.NACKE 1 NACKF 1 IIC TDRE 09 ICDRS ICDRT TDRE 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 973 of 1551
RA4W1
30. I2C IIC
30.2.11 I2C ICWUR
IIC0.ICWUR 4005 3016h
b7
b6
b5
b4
b3
b2
b1
b0
WUE
WUIE
WUF
WUAC K
--
--
-- WUAFA
0
0
0
1
0
0
0
0
b0 b3-b1 b4
b5 b6 b7
WUAFA -- WUACK
WUF WUIE WUE
ACK
R/W
0
R/W
1
0 0
R/W
ICCR1.IICRST WUACK R/W 4 30.5
0
R/W
1
0IIC0_WUI
R/W
1IIC0_WUI
0
R/W
1
30.5
IICRST 0
WUACK
0
1
0
1
2
1
0
1
1
EEP
SCL 9 ACK9 SCL Low
ACKSCL 8 9 SCL Low SCL 9 SCL Low ACK
SCL 9 ACKSCL Low
SCL 9 NACKSCL Low
WUF 1 SCL 8 SCL Low
PCLKB
0 1 0 ICE 0 IICRST 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 974 of 1551
RA4W1
30. I2C IIC
30.2.12 I2C 2ICWUR2
IIC0.ICWUR2 4005 3017h
b7
b6
b5
b4
--
--
--
--
1
1
1
1
b3
b2
b1
b0
--
WUSY WUAS WUSE
F
YF
N
1
1
0
1
R/W
b0
WUSEN
0IIC
R/W
1IIC
b1
WUASYF
0IIC
R
1IIC
b2
WUSYF
0IIC
R
1IIC
b7-b3
--
11
R/W
WUSEN
ICWUR.WUE = 1WUSEN WUASYF WUSYF PCLKB
PCLKB
WUASYF 0 WUSEN 0 ICCR2.BBSY 0 PCLKB PCLKB PCLKB
PCLKB
WUASYF 1 WUSEN 1 1 WUASYF 0
WUASYF ICWUR.WUE = 1IIC PCLKB
1 ICCR2.BBSY 0 ICWUR.WUE 1 WUSEN 0
0 ICWUR.WUE 1 WUSEN 1
WUASY1ICWUR.WUE1WUSEN
1
WUASYF1WUSEN1ICWUR.WUE1
ICCR1.ICE = 0 ICCRST = 1ICC ICWUR.WUE = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 975 of 1551
RA4W1
30. I2C IIC
WUSYF ICWUR.WUE = 1IIC PCLKB
WUASYF 1 WUSYF 0 ICWUR.WUE 1 WUSEN
1
WUSYF 0 ICWUR.WUE 0 WUSEN 1
ICCR1.ICE = 0 ICCRST = 1ICC ICWUR.WUE = 0
0 WUSEN 0 ICWUR.WUE 1 ICCR2.BBSY 0
30.2.13 LySARLy(y = 0 2)
IIC0.SARL0 4005 300Ah, IIC1.SARL0 4005 310Ah, IIC0.SARL1 4005 300Ch, IIC1.SARL1 4005 310Ch, IIC0.SARL2 4005 300Eh, IIC1.SARL2 4005 310Eh
b7
b6
b5
b4
b3
b2
b1
b0
SVA[6:0]
SVA0
0
0
0
0
0
0
0
0
R/W
b0
SVA0
10
R/W
b7-b1
SVA[6:0] 7 10
R/W
SVA0 10
10 SARUy.FS = 1 10 SVA[6:0] 10 8
ICSER.SARyE 1SARLy SARUy SARUy.FS 1 SARUy.FS SARyE 0
SVA[6:0] 7 10
7 SARUy.FS = 0 7 10 SARUy.FS = 1SVA0 10 8 ICSER.SARyE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 976 of 1551
RA4W1
30. I2C IIC
30.2.14 UySARUy(y = 0 2)
IIC0.SARU0 4005 300Bh, IIC1.SARU0 4005 310Bh, IIC0.SARU1 4005 300Dh, IIC1.SARU1 4005 310Dh, IIC0.SARU2 4005 300Fh, IIC1.SARU2 4005 310Fh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
SVA[1:0]
FS
0
0
0
0
0
0
0
0
b0
b2-b1 b7-b3
FS
SVA[1:0] --
7 10 10
R/W
07
R/W
110
R/W
0 0
R/W
FS 7 10
ySARLy SARUy 7 10
ICSER.SARyE 1SARLy SARUy SARUy.FS 0 y 7 SARLy.SVA[6:0] SVA[1:0] SARLy.SVA0
ICSER.SARyE 1SARLy SARUy SARUy.FS 1 y 10 SVA[1:0] SARLy
ICSER.SARyE 0SARLy SARUy SARUy.FS
SVA[1:0] 10
10 FS = 1 10 2
ICSER.SARyE 1SARLy SARUy SARUy.FS 1 SARUy.FS SARyE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 977 of 1551
RA4W1
30.2.15 I2C Low ICBRL
IIC0.ICBRL 4005 3010h, IIC1.ICBRL 4005 3110h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
BRL[4:0]
1
1
1
1
1
1
1
1
30. I2C IIC
R/W
b4-b0
BRL[4:0]
Low
SCL Low
R/W
b7-b5
--
1 1
R/W
BRL[4:0] Low
BRL[4:0] SCL Low ICBRL ICMR1.CKS[2:0] IIC Low ICBRL SCL Low 30.9SCL Low IIC ICBRL 1
ICFER.NFE = 1ICBRL + 1 ICMR3.NF[1:0]
1.
tSU:DAT 250ns 100kbpsSm 100ns 400kbpsFm
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 978 of 1551
RA4W1
30.2.16 I2C High ICBRH
IIC0.ICBRH 4005 3011h, IIC1.ICBRH 4005 3111h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
BRH[4:0]
1
1
1
1
1
1
1
1
30. I2C IIC
R/W
b4-b0
BRH[4:0]
High
SCL High
R/W
b7-b5
--
11
R/W
BRH[4:0] High
SCL High BRH[4:0] IIC BRH[4:0]
ICBRH ICMR1.CKS[2:0] IIC High
ICFER.NFE = 1ICBRH + 1 ICMR3.NF[1:0]
IIC SCL
1) ICFER.SCLE = 0 = 1 / {[(BRH + 1) + (BRL + 1)] / IIC 1+ tr 2+ tf 2 } = {tr + [(BRH + 1) / IIC]} / {tr + tf + [(BRH + 1) + (BRL + 1)] / IIC}
2) ICFER.SCLE = 1ICFER.NFE = 0CKS[2:0] = 000bIIC = PCLKB = 1 / {[(BRH + 3) + (BRL + 3)] / IIC + tr + tf} = {tr + [(BRH + 3) / IIC]} / {tr + tf + [(BRH + 3) + (BRL + 3)] / IIC}
3) ICFER.SCLE = 1ICFER.NFE = 1CKS[2:0] = 000bIIC = PCLKB = 1 / {[(BRH + 3 + nf 3 ) + (BRL + 3 + nf)] / IIC + tr + tf} = {tr + [(BRH + 3 + nf) / IIC]} / {tr + tf + [(BRH + 3 + nf) + (BRL + 3 + nf)] / IIC}
4) ICFER.SCLE = 1ICFER.NFE = 0CKS[2:0] 000b = 1 / {[(BRH + 2) + (BRL + 2)] / IIC + tr + tf} = {tr + [(BRH + 2) / IIC]} / {tr + tf + [(BRH + 2) + (BRL + 2)] / IIC}
5) ICFER.SCLE = 1ICFER.NFE = 1CKS[2:0] 000b = 1 / {[(BRH + 2 + nf) + (BRL + 2 + nf)] / IIC + tr + tf} = {tr + [(BRH + 2 + nf) / IIC]} / {tr + tf + [(BRH + 2 + nf) + (BRL + 2 + nf)] / IIC}
1. 2.
3.
IIC = PCLKB � SCLn [tr] SCLn [tf] [Cb] [Rp] NXP I2C nf = ICMR3.NF
30.6
SCLE = 0 ICBRH/ICBRL
kbps
CKS[2:0]
BRH[4:0] (ICBRH)
BRL[4:0] (ICBRL)
PCLKBMHz
NF[1:0]
100
011
15 (EFh)
18 (F2h)
32
--
1)
400
001
9 (E9h)
20 (F4h)
32
--
1)
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 979 of 1551
RA4W1
30. I2C IIC
30.7
SCLE = 1 NFE = 0 ICBRH/ICBRL
kbps
CKS[2:0]
BRH[4:0] (ICBRH)
BRL[4:0] (ICBRL)
PCLKBMHz
NF[1:0]
100
011
14 (EEh)
17 (F1h)
32
--
4)
400
001
8 (E8h)
19 (F3h)
32
--
4)
30.8
SCLE = 1 NFE = 1 ICBRH/ICBRL
kbps
CKS[2:0]
BRH[4:0] (ICBRH)
BRL[4:0] (ICBRL)
PCLKBMHz
NF[1:0]
100
011
12 (ECh)
15 (EFh)
32
01b
5)
400
001
6 (E6h)
17 (F1h)
32
01b
5)
.
SCLn tr100kbps Sm1000ns400kbps Fm300ns
SCLn tf400kbps Sm/Fm300ns
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 980 of 1551
RA4W1
30.2.17 I2C ICDRT
IIC0.ICDRT 4005 3012h, IIC1.ICDRT 4005 3112h
b7
b6
b5
b4
b3
b2
b1
b0
30. I2C IIC
1
1
1
1
1
1
1
1
ICDRT I2C ICDRSICDRT ICDRS
ICDRT ICDRS ICDRS ICDRT
ICDRT ICDRT IICn_TXI 1
30.2.18 I2C ICDRR
IIC0.ICDRR 4005 3013h, IIC1.ICDRR 4005 3113h
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
1 I2C ICDRS ICDRR
ICDRS ICDRR ICDRS ICDRR ICDRR ICDRR IICn_RXI 1
ICDRR ICSR2.RDRF 1 ICDRR IIC RDRF 1 SCL 1 Low
30.2.19 I2C ICDRS
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
ICDRS 8 ICDRT ICDRS SDAn 1 ICDRS ICDRR ICDRS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 981 of 1551
RA4W1
30. I2C IIC
30.3
30.3.1
I2C 8 1
30.3 I2C 30.4 I2C
[7]
S SLA7 R/W# A DATA8 A
1
7
11
8
1
nn = 1
A/A# P 11
[10]
S
11110b + SLA 2
W#
A
1
7
11
SLA8 8
A DATA8 A
1
8
1
nn = 1
A/A# P 11
S
11110b + SLA 2
W# A SLA8 A
Sr
11110b + SLA 2
1
7
11
8
11
7
n
R A DATA8 A
11
8
1
nn = 1
30.3
I2C
A/A# P 11
SCLn SDAn
17
8
9
17
8
9
17
8
9
S
SLA
R/W#
A
Data
A
30.4
I2C SLA = 7
Data
A
P
S
SLA R/W#
A
A# Sr
SCLn High SDAn High Low
R/W# 1R/W# 0
SDAn Low
SDAn High
SCLn High SDAn High Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 982 of 1551
RA4W1
30. I2C IIC
DATA P
SCLn High SDAn Low High
30.3.2
30.5 IIC 1. ICCR1.ICE 0 SCLn SDAn 2. ICCR1.IICRST 1 IIC 3. ICCR1.ICE 1 4. SARLySARUyICSERICMR1ICBRHICBRL y = 0 2
IIC 30.5 5. ICCR1.IICRST 0 IIC
. IIC
ICCR1.ICE0 ICCR1.IICRST1 ICCR1.ICE1
SARLySARUy ICSER
SCLnSDAn
IIC SCLnSDAn
ICMR1.CKS[2:0], ICBRL, ICBRH
1
ICMR2ICMR3 ICFER ICIER
ICCR1.IICRST0
2
y = 02 1. ICBRL 2.
30.5
IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 983 of 1551
RA4W1
30. I2C IIC
30.3.3
IIC SCL 30.6 30.7 30.9
1. 30.3.2 IIC
2. ICCR2.BBSY ICCR2.ST 1 IIC ICSR2.BBSY ICSR2.START 1 ST 0 ST 1 SDA SDAn IIC ST ICCR2.MST ICCR2.TRS 1 IIC TRS 1 ICSR2.TDRE 1
3. ICSR2.TDRE 1 ICDRT R/W# ICDRT TDRE 0 ICDRT ICDRS TDRE 1 R/W# R/W# TRS R/W# 0 IIC ICSR2.NACKF 1 ICCR2.SP 1 10 1 ICDRT 1111 0b 2 W 2 ICDRT 8
4. ICSR2.TDRE 1 ICDRT IIC SCLn Low
5. ICDRT ICSR2.TEND 1 ICCR2.SP 1IIC 30.11.3
6. IIC ICCR2.MST ICCR2.TRS 00b IIC TDRE TEND 0 ICSR2.STOP 1
7. ICSR2.STOP 1 ICSR2.NACKF ICSR2.STOP 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 984 of 1551
RA4W1
30. I2C IIC
30.6
No ICCR2.BBSY = 0?
Yes ICCR2.ST = 1
ICSR2.NACKF = 0?
No
Yes
No
ICSR2.TDRE = 1?
Yes ICDRT
No
?
Yes
No
ICSR2.TEND = 1?
Yes
ICSR2.STOP = 0
ICCR2.SP = 1
No
ICSR2.STOP = 1?
Yes ICSR2.NACKF = 0
ICSR2.STOP = 0
[1] [2] I2C
[3] + W 1 [4] ACK
[5]
[6] [7]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 985 of 1551
RA4W1
30. I2C IIC
SCLn SDAn
BBSY MST TRS
TDRE TEND RDRF
ICDRT ICDRS ICDRR
Low
S
1234567891234567891234
b7 b6 b5 b4 b3 b2 b1 b0 ACK b7 b6
7
W
b5 b4 b3 b2 b1 b0 ACK b7 b6 DATA 1
b5 b4 DATA 2
7 + W
DATA 1
DATA 2
7+W
DATA 1 7 + W
DATA 2 DATA 1 XXXX
DATA 3 DATA 2
ACKBT ACKBR START
ST
X (ACK/NACK)
0 (ACK) 0 (ACK)
0 (ACK)
ST = 1I7CDR+TW
ICDRT DATA 1
[2]
[3]
[4]
ICDRT DATA 2
[4]
ICDRT DATA 3
[4]
30.7
17
SCLn SDAn
BBSY MST TRS
TDRE TEND RDRF
ICDRT ICDRS ICDRR
Low
S
1234567891234567891234
b7 b6 b5 b4 b3 b2 b1 b0 ACK b7 b6 1011110b + 2 W
b5 b4 b3 b2 b1 b0 ACK b7 b6 10
b5 b4 DATA 1
10 + W
10
DATA 1
10+ W
10 10 + W
DATA 1 10 XXXX
DATA 2 DATA 1
ACKBT ACKBR START
ST
X (ACK/NACK)
0 (ACK)
0 (ACK)
0 (ACK)
ST = 1I1C1D11R+0TbW+2ICDRT8
[2]
[3]
ICDRT DATA 1
[4]
ICDRT DATA 2
[4]
30.8
210
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 986 of 1551
RA4W1
30. I2C IIC
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
P
SCLn
SDAn b1 b0 ACK b7 b6 b5 b4 b3 b2 b1 b0 ACK b7 b6 b5 b4 b3 b2 b1 b0 A/NA
DATA n-2
DATA n-1
DATA n
BBSY
MST
TRS TDRE
DATA n-1
DATA n
TEND
RDRF
ICDRT ICDRS ICDRR
DATA n-1 DATA n-2
DATA n-1
DATA n DATA n
XXXX
ACKBT ACKBR
STOP SP
0 (ACK)
0 (ACK)
0 (ACK)
X (ACK/NACK)
ICDRT [DATA n]
[4]
ST = 1
[5]
STOP = 0
[7]
30.9
3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 987 of 1551
RA4W1
30. I2C IIC
30.3.4
IIC SCL
30.10 30.11 7 30.12 30.14
1. 30.3.2 IIC
2. ICCR2.BBSY ICCR2.ST 1 IIC IIC ICSR2.BBSY ICSR2.START 1 ST 0 ST 1 SDA SDAn IIC ST ICCR2.MST ICCR2.TRS 1 IIC TRS 1 ICSR2.TDRE 1
3. ICSR2.TDRE 1 ICDRT 1 R/W# ICDRT TDRE 0 ICDRT ICDRS TDRE 1 R/W# R/W# ICCR2.TRS R/W# 1 SCL 9 TRS 0 IIC TDRE 0 ICSR2.RDRF 1 ICSR2.NACKF 1 ICCR2.SP 1 10 10 1111 0b 2 R IIC
4. ICSR2.RDRF 1 ICDRR IIC SCL
5. 1 ICMR3.RDRFS SCL 8 9 ICSR2.RDRF 1 ICDRR RDRF 0 SCL 9 ICMR3.ACKBT 2 2 ICDRR ICMR3.WAIT 1WAIT 6 ICMR3.ACKBT 1
NACKNACK 9 SCLn Low
6. ICMR3.RDRFS 0 ICMR3.ACKBT 1NACK
7. 2 ICDRR ICSR2.RDRF 1 ICCR2.SP 1 ICDRR ICDRR IIC 9 Low SCLn Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 988 of 1551
RA4W1
30. I2C IIC
8. IIC ICCR2.MST ICCR2.TRS 00b ICSR2.STOP 1
9. ICSR2.STOP 1 ICSR2.NACKF ICSR2.STOP 0
No
ICCR2.BBSY = 0?
Yes ICCR2.ST = 1
No
ICSR2.TDRE = 1?
Yes ICDRT
No
ICSR2.RDRF = 1?
Yes
ICSR2.NACKF = 0?
No
Yes ICMR3.WAIT = 1
= ?
Yes
No ICDRR
No
ICSR2.RDRF = 1?
Yes ICMR3.ACKBT
ICDRR
No
ICSR2.RDRF = 1?
Yes ICSR2.STOP = 0
ICCR2.SP = 1
ICDRR
ICMR3.WAIT = 0
No
ICSR2.STOP = 1?
Yes ICSR2.NACKF = 0
ICSR2.STOP = 0
ICSR2.STOP = 0 ICCR2.SP = 1
ICDRR
[1] [2] I2C
[3] + RACK
[4] WAIT
[5] NACK 2 [6] 1
[7] ACKBTSCL
[8] [9]
30.10
7 1 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 989 of 1551
RA4W1
30. I2C IIC
No ICCR2.BBSY = 0?
Yes ICCR2.ST = 1
No
ICSR2.TDRE = 1?
Yes ICDRT
No
ICSR2.RDRF = 1?
Yes
ICSR2.NACKF = 0?
No
Yes ICDRR
No
ICSR2.RDRF = 1?
Yes
= - 1?
Yes
No Yes
= - 2?
No
ICMR3.WAIT = 1
ICDRR
[1] [2] I2C
[3] + RACK [4] [5]
ICMR3.ACKBT ICDRR
No
ICSR2.RDRF = 1?
Yes ICSR2.STOP = 0
ICCR2.SP = 1
ICDRR
ICMR3.WAIT = 0
No
ICSR2.STOP = 1?
Yes ICSR2.NACKF = 0
ICSR2.STOP = 0
[6] - 1
ICSR2.STOP = 0 ICCR2.SP = 1
ICDRR
[7]
[8] [9]
30.11
7 3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 990 of 1551
RA4W1
30. I2C IIC
SCLn SDAn
BBSY MST TRS
TDRE TEND RDRF
ICDRT ICDRS ICDRR
ACKBT ACKBR START
ST
Low
S
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
b7
b6
b5
b4
b3
b2
b1 b0 ACK b7 b6
b5
b4
b3
b2
b1
b0 ACK b7
b6
b5
b4
7
R
DATA 1
DATA 2
7 + R)
7 + R)
DATA 1
7 + R XXXX
X (ACK/NACK)
7 + R DATA 1
XXXX
0 (ACK)
0 (ACK)
DATA 2 DATA 1
0 (ACK)
ST = 1
ICDRT
7 + R
[2]
[3]
ICDRR
[4]
ICDRR DATA 1
[5]
30.12
17 RDRFS = 0
SCLn SDAn
BBSY MST TRS
TDRE TEND RDRF
ICDRT ICDRS ICDRR
Low
S
1 to 7
8
9
1 to 8
9
Sr
1
2
3
4
5
6
7
8
9
1
2
3
4
b7
b1 b0
10 W
ACK
b7 b0
10
ACK
b7 b6 b5 b4 b3
b2
b1 b0 ACK b7
b6
b5
b4
1011110b + 2
R
DATA 1
10 + W 10 10 + R
10 + R
10 + W 10 + W
10 10
10 + R 10 + R XXXX
DATA 1 XXXX
ACKBT ACKBR START
ST RS
X (ACK/NACK)
0 (ACK)
0 (ACK)
0 (ACK)
0 (ACK)
ST = 1
ICDRT 11110b + 2
+ W
ICDRT 8
[2]
START = 0
[3]
RS = 1
ICDRT 11110b + 2
+ R
ICDRR
[4]
30.13
210 RDRFS = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 991 of 1551
RA4W1
30. I2C IIC
LowWAIT
7
8
9
1
2
3
4
5
6
7
8
9
SCLn
1
2
SDAn b1 b0 ACK b7 b6 b5 b4 b3 b2 b1 b0 ACK
DATA n-2
DATA n-1
b7 b6
BBSY
MST
TRS TDRE TEND
DATA n-2
DATA n-1
RDRF
ICDRT ICDRS DATA n-2 ICDRR DATA n-3
XXXX [7 + R/10 + R]
DATA n-1 DATA n-2
LowWAIT
3
4
5
6
7
8
9
b5 b4 b3 b2 b1 b0 DATA n
NACK
DATA n
DATA n-1
DATA n
P DATA n
ACKBT ACKBR
STOP SP
WAIT
0 (ACK)
0 (ACK) 0 (ACK)
1 (NACK) 0 (ACK)
0 1 (NACK)
WAIT = 1 ICDRR DATA n-2
[5]
ACKBT = 1 ICDRR DATA n-1
[6]
SP = 1
ICDRR
[DATA n]
[7]
WAIT = 0 STOP = 0
[9]
30.14
3RDRFS = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 992 of 1551
RA4W1
30. I2C IIC
30.3.5
SCL IIC
30.15 30.16 30.17
1. IIC 30.3.2 IIC
2. IIC ICSR1.HOA, GCA, AASy y = 0 2 SCL 9 1 SCL 9 ICMR3.ACKBT R/W# 1 IIC ICCR2.TRS ICSR2.TDRE 1
3. ICSR2.TEND 1 ICDRT ICFER.NACKE 1 NACK IIC
4. ICSR2.NACKF 1 ICDRT ICSR2.TDRE 1 ICSR2.TEND 1 ICSR2.NACKF 1 TEND 1 IIC SCL 9 SCLn Low
5. ICSR2.NACKF 1 ICSR2.TEND 1 ICDRR SCLn
6. IIC ICSR1.HOAGCAAASy y = 0 2 ICSR2.TDRETEND ICCR2.TRS 0
7. ICSR2.STOP 1 ICSR2.NACKF ICSR2.STOP 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 993 of 1551
RA4W1
30. I2C IIC
ICSR2.NACKF = 0?
No
Yes No
ICSR2.TDRE = 1?
Yes ICDRT
No ?
Yes No
ICSR2.TEND = 1? Yes
ICDRR
No ICSR2.STOP = 1?
Yes ICSR2.NACKF = 0
ICSR2.STOP = 0
30.15
[1]
[2] [3] ACK ACK
[4] SCLn [5] [6]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 994 of 1551
RA4W1
30. I2C IIC
S SCLn SDAn
BBSY MST TRS
TDRE TEND RDRF AASy
ICDRT ICDRS ICDRR
ACKBT ACKBR START NACKF
Low
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
b7 b6 b5 b4 b3 b2 7
b1 b0 ACK R
b7 b6 b5 b4 b3 b2 b1 b0 ACK b7 b6 b5 b4
DATA 1
DATA 2
DATA 1
DATA 2
XXXX 7 + R
XXXX
X (ACK/NACK)
DATA 1 0 (ACK)
DATA 1
DATA 2
0 (ACK)
ICDRT
ICDRT
DATA 1 DATA 2
[3]
[3]
DATA 3 DATA 2
0 (ACK)
ICDRT DATA 3
[3]
30.16
17
SCLn
789123456789123456789
SDAn b1 b0 ACK b7 b6 b5 b4 b3 b2 b1 b0 ACK b7 b6 b5 b4 b3 b2 b1 b0 NACK
DATA n-2
DATA n-1
DATA n
BBSY
MST
TRS TDRE
DATA n-1
DATA n
TEND
RDRF
AASy
ICDRT ICDRS ICDRR
DATA n-1 DATA n-2
DATA n-1
DATA n XXXX
DATA n
ACKBT ACKBR
STOP NACKF
0 (ACK)
0 (ACK)
0 (ACK)
P 1 (NACK)
ICDRT [DATA n]
[4]
ICDRR NACKF = 0 STOP = 0
SCLn
[5]
[7]
30.17
2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 995 of 1551
RA4W1
30. I2C IIC
30.3.6
SCL IIC
30.18 30.19 30.20
1. IIC 30.3.2 IIC
2. IIC ICSR1.HOA, GCA, AASy y = 0 2 SCL 9 1 SCL 9 ICMR3.ACKBT R/W# 0 IIC ICSR2.RDRF 1
3. ICSR2.STOP 0 ICSR2.RDRF 1 ICDRR 7 + R/W# 10 8
4. ICDRR IIC ICSR2.RDRF 0 ICDRR RDRF 1 IIC RDRF 1 SCL SCLn Low ICDRR SCLn Low ICSR2.STOP 1 ICSR2.RDRF 1 ICDRR
5. IIC ICSR1.HOAGCAAASy y = 0 2 0
6. ICSR2.STOP 1 ICSR2.STOP 0
No ICSR2.STOP = 0?
Yes
No
ICSR2.RDRF = 1?
Yes ICDRRYes
No
?
Yes No
ICSR2.STOP = 1?
Yes
ICSR2.STOP = 0
[1]
ICSR2.RDRF = 1?
No
Yes ICDRR
[2] [3] [4] 1
[5] [6]
30.18
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 996 of 1551
RA4W1
30. I2C IIC
S SCLn SDAn
BBSY MST TRS
TDRE TEND RDRF AASy
ICDRT ICDRS ICDRR
ACKBT ACKBR START NACKF
Low
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
b7 b6
b5
b4
b3
b2
b1 b0 ACK b7 b6
b5
b4
b3
b2
b1
b0
7
W
DATA 1
ACK
b7 b6
b5
b4
DATA 2
7 + W
XXXX 7 + W
XXXX
X (ACK/NACK)
DATA 1
0 (ACK)
DATA 1 7 + W
0 (ACK)
DATA 2 DATA 1
0 (ACK)
ICDRR [7 + W]
[3]
ICDRR DATA 1
[3][4]
30.19
17 RDRFS = 0
SCLn
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
SDAn
b1
b0 ACK b7 b6
b5
b4
b3
b2
b1
b0 ACK b7 b6
b5
b4
b3
b2
b1
b0 ACK
DATA n-2
DATA n-1
DATA n
BBSY
MST
TRS
TDRE TEND DATA n-2
DATA n-1
DATA n
RDRF
AASy
ICDRT ICDRS ICDRR
DATA n-2 DATA n-3
XXXX DATA n-1
DATA n-2
DATA n-1
DATA n
P DATA n
ACKBT ACKBR
STOP NACKF
0 (ACK)
0 (ACK)
0 (ACK)
0 (ACK)
ICDRR DATA n-2
[3] [4]
ICDRR DATA n-1
[3] [4]
ICDRR STOP = 0 DATA n
[3] [4]
[6]
30.20
2RDRFS = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 997 of 1551
RA4W1
30. I2C IIC
30.4 SCL
SCL IIC SCLn ICBRH High SCLn Low IIC SCLn ICBRL Low SCLn IIC SCL
I2C SCL SCL SCL SCL IIC SCLn SCL SCL
IIC SCLn ICBRH High SCL SCLn Low IIC
1.
2. SCLn Low
3. ICBRL Low
Low IIC SCLn Low SCL Low IIC Low SCL Low Low SCLn SCL IIC SCL Low SCLn SCL SCL SCL High High SCL Low Low SCL ICFER.SCLE 1
[SCL]
Low
SCL High
ICBRH
ICBRH
SCLn
ICBRH
[SCL] SCLn
ICBRL
SCLn
Low SCLn
ICBRH
Low
ICBRH
ICBRL
Low
ICBRH
ICBRL
ICBRHI2CHighSCLHigh ICBRLI2CLowSCLLow
ICBRL
30.21
IIC SCL SCL
ICBRL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 998 of 1551
RA4W1
30. I2C IIC
30.5 SDA
IIC SDA SDA SDA ACK/NACK
SCL SDA SCL Low SDA SMBus 300nsSDA ICMR2.SDDL[2:0] 000b SDDL[2:0] 000b
SDA ICMR2.DLCS IIC IIC 2 IIC/2 SDA ICMR2.SDDL[2:0] IIC SDA ACK/NACK
S
SCLn
SDAn
+ PCLKB1 PCLKB (max)
NFE, NF[1:0] = 0.5 PCLKB (min), 1 IIC4 IIC (max)
SDADLCS, SDDL[2:0] = 0 (min)14 IIC (max) 8
SDA 9
b7b1
b0
ACK/NACK
SCLn
17
SDAn b7b1
SDA 8
b0
SDA
9
P
ACK/NACK
ICBRH
SCLn
ST
ICBRL
ICBRH 1
ICBRL
SDAn
b7
SDA
28 b6b0
9 ACK/NACK
ICBRL
ICBRH ICBRL
RS
19
ICBRH
ICBRL
SP
BBSY ST
1.
1
1
1
SDA
STRSSP DLCS, SDDL[2:0]
30.22
SDA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 999 of 1551
RA4W1
30. I2C IIC
30.6
SCLn SDAn 30.23
IIC 4
ICMR3.NF[1:0] 1IIC 4IIC
SCLn SDAn IIC ICMR3.NF[1:0]
PCLKB PCLKB = 4MHz 400kbps ICFER.NFE 0
DQ
4
DQ
DQ
DQ
DQ
CLK
CLK
CLK
CLK
CLK
IIC
NFE NF[1:0]
30.23
DQ
CLK PCLKB
NF[1:0] NFE
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1000 of 1551
RA4W1
30. I2C IIC
30.7
IIC 3 7 10
30.7.1
IIC 3 ICSER.SARyE y = 0 2 1 SARUy SARLy y = 0 2
IIC ICSR1.AASy y = 0 2 SCL 9 1 R/W# ICSR2.RDRF ICSR2.TDRE 1 IICn_RXI IICn_TXI AASy
30.24 30.26 AASy 1 3
[7]
S SCLn
1
2
3
4
5
6
7
SDAn
7
8
9
1
2
3
4
5
6
7
W ACK
DATA 1
8
9
1
2
3
4
5
ACK
DATA 2
BBSY AASy
TRS TDRE RDRF
7
DATA 1
[7]
ICDRR [7]
S SCLn
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
SDAn
7
R ACK
DATA 1
ICDRR DATA 1
8
9
1
2
3
4
5
ACK
DATA 2
BBSY AASy
TRS TDRE RDRF
DATA 1
DATA 2
ICDRT DATA 1
ICDRT DATA 2
ICDRT DATA 3
30.24
AASy 1 7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1001 of 1551
RA4W1
30. I2C IIC
[10]
S SCLn
1234567
8 9 1 234567
8 9 12345
SDAn
1
1
1
1
0 2 W ACK
108 )
ACK
BBSY AASy TRS TDRE RDRF
[10]
S
1234567
8 9 18
9
Sr
SCLn
SDAn
1
1
1
1
0 2 W ACK 8 ACK R
ICDRR []
1234567
89
1 1 1 1 0 2 R ACK
BBSY AASy TRS TDRE RDRF
ICDRR []
30.25
AASy 1 10
[SAR0L7SAR1L7SAR210(1)]
S
1
2
3
45
6
7
8
9
18
9
Sr
SCLn
1
2
3
4
5
6
7
8
9
SDAn
7SAR0L R/W# ACK DATA ACK
7SAR1L R/W# ACK
BBSY AAS0 AAS1 AAS2
[SAR0L7SAR1L7SAR210(2)]
S
1
2
3
45
6
7
8
9
18
9
Sr
1
2
3
4
5
6
7
8
9
SCLn
SDAn
7SAR1L
R/W# ACK DATA ACK
1
1
1
1
0 2 W ACK
BBSY AAS0 AAS1 AAS2
[SAR0L7SAR1L7SAR210(3)]
S
1
2
3
45
6
7
8
9
18
9
Sr
SCLn
1
2
3
4
5
6
7
8
9
SDAn
1
1
1
1
0 2 W ACK 8 ACK
7SAR0L
R/W# ACK
BBSY AAS0 AAS1 AAS2
30.26
AASy 1 0 7 10
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1002 of 1551
RA4W1
30. I2C IIC
30.7.2
IIC 0000 000b + 0[W] ICSER.GCAE 1
0000 000b + 1[R] IIC 0
IIC SCL 9 ICSR1.GCA ICSR2.RDRF 1 IICn_RXI GCA
[]
S SCLn
1234567
891234567
SDAn
0 0 0 0 0 0 0 W ACK
DATA 1
8 9 12345
ACK
DATA 2
BBSY AAS0 AAS1 AAS2 GCA RDRF
7
DATA 1
0000 000b + W
ICDRR [7]
ICDRR DATA 1
30.27
GCA 1
30.7.3 ID
IIC I2C 03 ID ICSER.DIDE 1 1 1111 100b IIC ID R/W# 0 SCL 8 ICSR1.DID 1 2 2 IIC ICSR1.AASy y = 0 2 1
1 ID 1111 100b R/W# 1 IIC 2 ICSR2.TDRE 1
ID IIC IIC ID IIC DID 0 1 ID 1111 100b R/W# 0 IIC DID 1 2 IIC R/W# 1 DID IIC 2 TDRE = 1 DID ID
ID ID 3 12 + 9 + 3 ID NXP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1003 of 1551
RA4W1
30. I2C IIC
[ID]
S
1
2
3
4
5
6
7
8
9
18
9
Sr
SCLn
SDAn
1
1
1
1
1
0
0
W ACK ACK
1
2
3
4
5
6
7
8
9
1
1
1
1
1
0
0
R ACK
BBSY AASy
DID TRS TDRE RDRF
ID1111 100b + W
ID1111 100b + R
710
ICDRR [710]
[ID]
S
1
2
3
4
5
6
7
8
9
18
9
Sr
SCLn
SDAn
1
1
1
1
1
0
0
W ACK ACK
1
2
3
4
5
6
7
8
9
7
R/W# ACK
BBSY AASy
DID RDRF
710 ID1111 100b + W
ID
ICDRR [710]
[ID+ R]
S
1
2
3
4
5
6
7
8
9
18
9
Sr
SCLn
SDAn
BBSY AASy
DID TDRE RDRF
1
1
1
1
1
0
0
R NACK
NACK
ID1111 100b + R
1
2
3
4
5
6
7
8
9
1
1
1
1
1
0
0
R NACK
ID1111 100b + R
30.28
ID AASyDID
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1004 of 1551
RA4W1
30. I2C IIC
30.7.4
IIC SMBus ICMR3.SMBS 1 ICSER.HOAE 1 ICCR2.MSTICCR2.TRS = 00b 0001 000b
IIC SCL 9 ICSR1.HOA 1 R/W# 0 ICSR2.RDRF 1 IICn_RXIHOA
0001 000bR/W# = 1 IIC
[]
S SCLn
1234567
SDAn
0001000
891234567
W ACK
DATA 1
8912345
ACK
DATA 2
BBSY AAS0 AAS1 AAS2 HOA RDRF
7 0001 000b
DATA 1
ICDRR [7]
ICDRR DATA 1
30.29
HOA 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1005 of 1551
RA4W1
30. I2C IIC
30.8
IIC MCU MCU
4 1
2
EEP
30.9
30.9
ACK
1
2
EEP
ACK ACK
ACK ACK NACK
SCL Low
Low
WUE = 0
WUF 0 IIC WUF 1
WUE WUIE 1 MST TRS 0
BBSY 1
SARL0 7 10 SARL1 SARL2
ICIER TIETEIERIENAKIESPIESTIE ALIE TMOIE
IRQn WUF 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1006 of 1551
RA4W1
30. I2C IIC
30.8.1 1
1 1
IIC ACK SCL 9 ACK SCL Low
1
SCL 9 SCL Low
30.30 30.32
1. 9 1 WAIT = 1
IRQn WUF 1 30.31
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1007 of 1551
RA4W1
30. I2C IIC
IIC
BBSY = 0?
No
Yes
MST = 0TRS = 0?
No
Yes IICRST = 0 ICE = 1
WUACKWUIE = 1 WUE = 1
WUSEN = 0
1 [1] I2C
[2] [3] WUACK
[4] [5] WUSEN0
WUASYF = 1?
No
Yes ICIER = 00h
WFI
No WUF = 1?
[6] WUI
[7] IICPCLKBIIC [8] IIC
PCLKB.
[9] WUF1
WUSEN = 1
[10] WUSEN1
WUSYF = 1?
No
Yes WUF = 0
No WUF = 0?
Yes WUIE = 0 WUE = 0
[11] WUF0
[12] [13]
No TRS = 1?
Yes
1. BBSY = 0 WFI
30.30
1
.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1008 of 1551
RA4W1
30. I2C IIC
WUE = 1 WUSEN = 0
WUASYF = 1?
No
Yes ICIER = 00h
WFI
1
(IRQ) [1]
[1] IRQIICPCLKB [2] WUSEN1 [3] [4] [5] IIC(ICE = 0, IICRST = 1)
Yes WUSEN = 0? No
WUSEN = 1
[2]
?
Yes
No
WUSEN = 1
WUSYF = 1?
Yes WUIE = 0 WUE = 0
No
[3] [4]
WUSYF = 1?
Yes WUIE = 0 WUE = 0
30.30 No 1
30.33 2 [9]
ICE = 0IICRST = 1
[5]
ICE = IICRST = 1
[6]
ICE = 1IICRST = 0
[7]
[6] IICICE = 1, IICRST = 1
[7]
IIC 1. 30.30
30.31
1 2 IIC IRQn
. IIC 30.3.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1009 of 1551
RA4W1
30. I2C IIC
[1] ACKSCLLow
ACK9SCLSCLLow
WAIT = 0
WFI ST
WUACK = 0ACK
WUF 0
ICDRR
SP
ICDRR 10
SCL SDA
12 3 4 56 78 9
Low
1234 5678
9
SLAVE ADDRESS
W ACK
DATA
ACK
WUF
AAS0
RDRF TRS
WUACK = 0ACK
SCL SDA
1 2 34 5 67 8 9
R ACK
WUF AAS0 TDRE TRS
Low
WUF 0
ICDRT
ICDRT
SP
1 2 34 5 67 8 9
1234 56789
DATA
ACK
DATA
NACK
30.32
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1010 of 1551
RA4W1
30. I2C IIC
30.8.2 2
2
2
SCL 8
8 9 SCL Low SCL 9 ACK
SCL 8 SCL Low
2 30.33 30.34
IRQ WUF 1 30.31
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1011 of 1551
RA4W1
30. I2C IIC
IIC
BBSY = 0?
No
Yes
MST = 0TRS = 0?
No
Yes IICRST = 0 ICE = 1
WUACKWUIE = 1 WUE = 1
WUSEN = 0
1 [1] I2C
[2] [3] WUACK
[4] [5] WUSEN0
WUASYF = 1?
No
Yes ICIER = 00h
WFI
No WUF = 1?
[6] WUI
[7] IICPCLKBIIC [8] IIC
PCLKB
[9] WUF1
WUSEN = 1
[10] WUSEN1
WUSYF = 1?
No
Yes WUF = 0
No WUF = 0?
Yes WUIE = 0 WUE = 0
[11] WUF0
[12] [13]
TRS = 1?
No
Yes
1. BBSY = 0 WFI
30.33
2
.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1012 of 1551
RA4W1
30. I2C IIC
[2]
IICSCLLowACK
89SCLSCLLowACK
(WAIT = 0) WFI ST
WUF = 0
ICDRR
SP ICDRR
SCL SDA
1234 5678
Low
9123 4567 8
9
W NACK
ACK
DATA
ACK
WUF
AAS0
RDRF TRS
(WAIT = 0)
SCL SDA
1 2 34 5 6 78
Low
R NACK
WUF = 0
ICDRT
ICDRT
SP
9
1 23 4 5 67 8 9
12 3 45 6 7 8 9
ACK
DATA
ACK
DATA
N ACK
WUF AAS0 TDRE TRS
30.34
2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1013 of 1551
RA4W1
30. I2C IIC
30.8.3 EEP
EEP SCL 9 SCL Low IIC I2C
EEP
IIC ACK NACKEEP
SCL Low IIC
EEP 30.35 30.37
. SCL Low
. EEP ICE = IICRST = 1 ICSR1 HOAGCAAAS0AAS1AAS2
IRQn WUF 1 30.36
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1014 of 1551
RA4W1
30. I2C IIC
IIC
BBSY = 0?
No
Yes
MST = 0TRS = 0?
No
Yes IICRST = 1ICE = 1
WUACKWUIE = 1 WUE = 1
WUSEN = 0
1 [1] I2C
[2] [3] WUACK
[4] [5] WUSEN0
WUASYF = 1?
No
Yes ICIER = 00h
WFI
No WUF = 1?
[6] WUI
[7] IICPCLKBIIC [8] IIC
PCLKB
[9] WUF1
WUSEN = 1
[10] WUSEN1
No WUSYF = 1? Yes
WUF = 0
No WUF = 0? Yes WUIE = 0 WUE = 0
ICE = 0IICRST = 1 ICE = IICRST = 1; ICE = 1IICRST = 0
IIC
[11] WUF0
[12] [13] [14] IIC(ICE = 0, IICRST = 1) [15] IIC(ICE = 1, IICRST = 1) [16]
1. BBSY = 0 WFI
30.35
EEP
.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1015 of 1551
RA4W1
30. I2C IIC
WUE = 1 WUSEN = 0
WUASYF = 1?
No
Yes ICIER = 00h
[1] IRQIICPCLKB [2] WUSEN1 [3] [4] [5] IIC(ICE = 0, IICRST = 1)
WFI
(IRQ) [1]
Yes WUSEN = 0?
No
WUSEN = 1
WUSYF = 1? Yes
WUIE = 0 WUE = 0
[2] No
[3] [4]
No
EEP
?
Yes
30.35 [9]
ICE = 0IICRST = 1
[5]
ICE = IICRST = 1
[6]
ICE = 1IICRST = 0
[7]
[6] IICICE = 1, IICRST = 1
[7]
IIC
30.36
EEP IIC IRQn
. IIC 30.3.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1016 of 1551
RA4W1
30. I2C IIC
[EEP]
ACK/NACK IICRSTACK
ACK/NACKSCLLow
WFI
SCL
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
SDA
R/W#
A/NA
DATA
BC BBSY START
WUF
AAS0 TDRE/ RDRF
0
0
30.37
EEP
30.8.4 WFI
30.30 30.33 30.35 BBSY = 0 WFI
1 NACK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1017 of 1551
RA4W1
30. I2C IIC
30.9 SCL Low
30.9.1
IIC ICCR2.TRS = 1I2C ICDRT I2C ICDRS SCLn Low Low Low
Low 9 1 Low
9 1 Low
[]
S SCLn SDAn
Low 1234567
89
7
W ACK
Low 1234567
89
DATA 1
ACK
Low
12
BBSY AASy TRS TDRE RDRF
7 + W
ICDRT 7 + W
[]
S SCLn
1234567
SDAn
7
DATA 1
DATA 2
89
ICDRT DATA 1
Low 1234567
ICDRT DATA 2
89
Low
123
R ACK
DATA 1
ACK
BBSY AASy TRS TDRE RDRF
DATA 1
DATA 2
ICDRT DATA 1
ICDRT DATA 2
30.38
Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1018 of 1551
RA4W1
30. I2C IIC
30.9.2 NACK
ICCR2.TRS = 1NACK ICFER.NACKE 1NACK ICSR2.TDRE = 0SCL 9 MSB 0 SDAn Low
ICSR2.NACKF = 1 NACKF 0 NACKF 0
[]
S SCLn SDAn
BBSY AASy
TRS TDRE NACKF
Low 1234567
89
7
W NACK
7+ W
DATA 1
ICBRL
P
S
1234567
89
7
W ACK
7+ W
DATA 1
ICDRT ICDRT 7+ W DATA 1
SP = 1
NACKF ICDRT ICDRT
7+ W DATA 1
[]
Low
S
1234567
89
1234567
89
P
SCLn
SDAn
7
W ACK
DATA 1
BBSY AASy
TRS
DATA 1
DATA 2
TDRE
NACKF
ICBRL
ICDRT DATA 1
ICDRT DATA 2
SP = 1
NACKF
30.39
NACK NACKE = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1019 of 1551
RA4W1
30. I2C IIC
30.9.3
ICCR2.TRS = 0ICSR2.RDRF = 1 ICDRR 1 IIC SCLn Low
IIC IIC SCLn Low
ICMR3.WAITRDRFS SCLn Low
(1) WAIT 1 Low
ICMR3.WAIT 1 IIC WAIT 1 ICMR3.RDRFS 0 SCL 8 9 IIC ICMR3.ACKBT 9 WAIT SCLn Low Low ICDRR 1
WAIT IIC
(2) RDRFS 1 ACK/NACK Low
ICMR3.RDRFS 1 IIC RDRFS 1 RDRFS 1 SCL 8 ICSR2.RDRF 1 8 SCLn Low Low ICMR3.ACKBT ICDRR 1 ACK/NACK
RDRFS IIC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1020 of 1551
RA4W1
30. I2C IIC
[RDRFS = 0, WAIT = 0]
9 1 234567 SCLn
SDAn ACK
8 9 1 234567
ACK
Low
8
9
1234
ACK
RDRF
ICDRR
[RDRFS = 0, WAIT = 1]
LowWAIT
9
1234567
SCLn
SDAn ACK
89 ACK
LowWAIT 12345
ICDRR ICDRR
67
89
Low WAIT 1
ACK
RDRF
ICDRR [RDRFS = 1, WAIT = 0]
SCLn
2345
SDAn
RDRF
ACKBT
[RDRFS = 1, WAIT = 1]
SCLn
23
SDAn
45
RDRF ACKBT
67
8
ICDRR
LowRDRFS 91234567
ACK
Low 8
ICDRR
Low
RDRFS
9
1
ACK
ACKBT = 0
Low
RDRFS
67
8
9
ACK
ICDRR ICDRR AXKBT = 0
LowWAIT
1234567
8
Low
RDRFS
9
1
ACK
ACKBT = 0 ICDRR
ICDRR AXKBT = 0
30.40
Low RDRFSWAIT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1021 of 1551
RA4W1
30. I2C IIC
30.10
IIC I2C NACK
30.10.1 MALE
IIC SDAn Low SDAn Low IIC ICCR2.BBSY = 1 ICCR2.ST 1 IIC
SDA SDAn IIC
IIC IIC
ICFER.MALE 1
ICCR2.BBSY 0 ICCR2.ST 1 SDA SDAn
ICCR2.BBSY 1 ICCR2.ST 1
ICCR2.MSTTRS = 11b SDA SDAn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1022 of 1551
RA4W1
30. I2C IIC
[]
S SCLn
12
SDAn
S SCLn
SDAn
12
SCL/SDA
3456
1 3 4 5 6 7 8 9 1 234567
0
R ACK
8 9 12345
ACK
BBSY MST TRS AL AASy
TDRE
[]
S SCLn
123456
SDAn
000000
S SCLn
123456
SDAn
000000
AL = 0
7
891
0
W ACK
7
891
0
W ACK
2345 1
2345 0
SCL/SDA
6 7 8 9 12345
ACK
BBSY MST TRS AL GCA
RDRF
0000 000b + W
AL = 0
ICDRR
30.41
MALE = 1
BBSY = 0ST = 1
PCLKB
SDA
SCLn
SDAn
SCLn SDAn
BBSY MST TRS AASy ST AL
S
1
ST = 1, BBSY = 1
ST = 1
BBSY = 1ST = 1
SCLn
PCLKB
SCLn
SDAn
SDAn
PCLKB
S SCLn
SDAn ST = 1, BBSY = 1
BBSY MST TRS AASy ST AL
1
2
S
SCLn
SDAn
BBSY MST TRS AASy ST AL
1
2
6
7
8
9
1
710
R ACK
ST = 1, BBSY = 1
ST = 1
ST = 1
30.42
MALE = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1023 of 1551
RA4W1
30. I2C IIC
30.10.2 NACK NALE
NACK SDA SDAn 2 NACK ACK 1 30.43 NACK
[NACKACK] 234567
SCLn
SDAn
234567 SCLn
SDAn
NACK
8 9 1 234567
8
9
SCL/SDA
ACK
89 1 23456
78
NACK
9
12345
ACK
ACK
BBSY MST TRS AL
RDRFS RDRF
ACKBT
RDRFS = 1 ICDRR
ICDRR ACKBT = 1 AL = 0
30.43
NACK NALE = 1
2 AB 1 A 2 B 4
A B A B A B A 2 NACK B 4 ACK A NACK B ACK A B ACK B SCL
IIC NACK ACK
NACK IIC
SMBus ARP NACK Get UDID UDID ID FFh
ICFER.NALE 1NACK IIC NACK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1024 of 1551
RA4W1
30. I2C IIC
NACK
NACK ICMR3.ACKBT = 1 SDA SDAn ACK
30.10.3 SALE
SDAn SMBus UDID ID
IIC SMBus UDID FFh
ICFER.SALE 1 IIC
ICCR2.MSTTRS = 01b SDA SDAn
[]
234567 SCLn
SDAn
234567 SCLn
SDAn
BBSY MST TRS AL
TDRE
89 ACK
89 ACK
12345
SCL/SDA
1 1 2 3 4 5 6 7 8 9 123456
0
ACK
ICDRT
AL = 0
30.44
SALE = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1025 of 1551
RA4W1
30. I2C IIC
30.11
30.11.1
IIC ICCR2.ST 1 ST 1 ICCR2.BBSY 0 IIC IIC
1. SDAn High Low 2. ICBRH 3. SCLn High Low 4. SCLn Low ICBRL SCLn Low
30.11.2
IIC ICCR2.RS 1 RS 1 ICCR2.BBSY 1 ICCR2.MST 1IIC
1. SDAn 2. ICBRL SCLn Low 3. SCLn Low High 4. SCLn High ICBRL
5. SDAn High Low 6. ICBRH 7. SCLn High Low 8. SCLn Low ICBRL SCLn Low
. ICCR2.RS 0 ICDRT ICCR2.RS 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1026 of 1551
RA4W1
30. I2C IIC
[]
ICBRH
ICBRL
SCLn SDAn
S
[]
ICBRH
SCLn SDAn
9 ACK/NACK
ICBRL
IIC BBSY
MST TRS TDRE ICDRT START
ST
ST = 1
7 + R/W#
IIC BBSY
MST TRS TDRE ICDRT START
RS
ICDRT7 + R/W# RS = 1
ICBRL
ICBRH
ICBRL
Sr
7 + R/W#
ICDRT7 + R/W#
30.45
STRS
30.46
1. 30.3.2IIC
2. IICR2.BBSY ICCR2.ST 1 IIC ICSR2.BBSY ICSR2.START 1 ST 0 ST 1 SDA SDAn IIC ST ICCR2.MST ICCR2.TRS 1 IIC TRS 1 ICSR2.TDRE 1
3. ICSR2.TDRE 1 ICDRT R/W# ICDRT TDRE 0 ICDRT ICDRS TDRE 1 R/W# R/W# TRS R/W# 0 IIC ICSR2.NACKF 1 ICCR2.SP 1 10 1 ICDRT 1111 0b 2 W 2 ICDRT 8
4. ICSR2.TDRE 1 ICDRT
IIC SCLn Low
5. ICDRT ICSR2.TEND 1 ICSR2.START 1 ICSR2.START 0
6. ICCR2.RS 1IIC
7. ICSR2.START 1 ICDRT R/W#
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1027 of 1551
RA4W1
30. I2C IIC
S SCL0 SDA0
BBSY MST TRS
TDRE TEND RDRF
ICDRT ICDRS ICDRR
ACKBT ACKBR START
ST RS
Low
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
Sr
b7 b6 b5 b4 b3 b2 b1 b0 ACK b7 b6 b5 b4 b3 b2 b1 b0 ACK
7
W
DATA 1
1
b7 7
7 + W
DATA 1
7 + R
7 + W
DATA 1 7 + W
"X"(ACK/NACK)
DATA 1 XXXX
"0"(ACK) "0"(ACK)
7 + R 7 + R
"0"(ACK)
ICDRT ST = 1 7 +
ICDRT W DATA 1
(2)
(3)
(4)
START RS = 1 ICDRT = 0 7 + R
(5) (6)
(7)
30.46
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1028 of 1551
RA4W1
30. I2C IIC
30.11.3
IIC ICCR2.SP 1 SP 1 ICCR2.BBSY 1 ICCR2.MST 1IIC
1. SDAn High Low 2. ICBRL SCLn Low 3. SCLn Low High 4. SCLn High ICBRH
5. SDAn Low High 6. ICBRL 7. BBSY
SCLn SDAn
IIC BBSY
MST TRS TDRE STOP
SP
30.47
ICBRL
ICBRH 8
b0
ICBRL
ICBRH
9 ACK/NACK
ICBRL
ICBRH
ICBRL
P
SP = 1
SP
STOP = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1029 of 1551
RA4W1
30. I2C IIC
30.12
I2C SCLn SDAn
IIC
SCLn
SCL
IIC
ICCR1.SCLOSDAOSCLISDAI IIC SCLn SDAn Low
30.12.1
SCLn IIC SCLn Low High
SCLn Low High SCLn SCLn IIC
ICFER.TMOE 1 SCLn Low High
ICCR2.MST = 1ICCR2.BBSY = 1
ICCR2.MST = 0IIC ICSR1 00h ICCR2.BBSY = 1
ICCR2.ST = 1ICCR2.BBSY = 0
ICMR1.CKS[2:0] IIC ICMR2.TMOS = 0 16 ICMR2.TMOS = 1 14
SCLn Low High ICMR2.TMOHTMOL TMOL TMOH 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1030 of 1551
RA4W1
30. I2C IIC
[]
IIC BBSY TMOE TMOH TMOL
TMOH = 1 TMOL = 0
[TMOH = 1TMOL = 1]
TMOL = 1
TMOE = 0
TMOS = 0
14 16
TMOS = 1
789
P
S
12
7
8
9
1
2
BBSY ST
TMOE TMOF
A/NA
7 R/W# ACK
30.48
TMOETMOSTMOHTMOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1031 of 1551
RA4W1
30. I2C IIC
30.12.2 SCL
SCL SDAn Low
SDAn Low IIC SCL 1
ICCR1.CLO 1 ICMR1.CKS[2:0] ICBRHICBRL SCL 1 1 CLO 0 CLO 0 CLO 1
IIC SDAn Low SCL 1 SDAn Low SDAn ICCR1.SDAI SDAn
ICFER.MALE 0 MALE 1ICCR1.SDAO SDAn
ICCR1.CLO
ICCR2.BBSY = 0ICCR2.MST = 1ICCR2.BBSY = 1
SCLn Low
30.49 SCL CLO
SCLn SDAn
IIC BBSY
MST TRS CLO
30.49
ICBRH 9
ICBRL
SDAnLow
ICBRH
ICBRL
ICBRH
ACKData 0
MSB
ICBRL
Data 1
SDAn
CLO CLO = 1
SCL CLO
CLO = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1032 of 1551
RA4W1
30. I2C IIC
30.12.3 IIC
IIC 2
IIC ICCR2.BBSY
IIC
ICCR1.IICRST 0 SCLn SDAn
IIC ICCR1.ICEIICRST = 01b
IIC 30.15
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1033 of 1551
RA4W1
30. I2C IIC
30.13 SMBus
IIC SMBus 2.0SMBus ICMR3.SMBS 1 SMBus 10kbps 100kbps ICMR1.CKS[2:0] ICBRH ICBRL 300ns ICMR2.DLCS ICMR2.SDDL[2:0] IIC ICBRL 250ns
SMBus 1100 001b L0 L2 SARL0SARL1SARL2 1 SARUy.FS y = 0 27 10 07
UDID IDICFER.SALE 1
30.13.1 SMBus
(1)
SMBus TLOW: SEXT
IIC STIn SPIn GPT SMBus Low TLOW: SEXT25msmax
GPT SMBus Low TTIMEOUT25msmin ICCR1.IICRST 1 IIC IIC SCLn SDAn
(2)
SMBus TLOW: MEXT
IIC STIn SPInIICn_TEI IICn_RXIGPT SMBus Low TLOW: MEXT10msmax TLOW: MEXT TLOW: SEXT 25msmax
ACK SCL 9 ICSR2.TEND ICSR2.RDRF 1 ICMR3.RDRFS 0 RDRFS 0 RDRF SCL 9 1
GPT SMBus Low TLOW: MEXT10ms maxSMBus Low TTIMEOUT25msmin ICDRT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1034 of 1551
RA4W1
30. I2C IIC
SCLn SDAn
BBSY TDRE TEND RDRF RDRFS START STOP
Start S
TLOW:MEXT
Clk ACK
SMBus TLOW:SEXT
TLOW:MEXT
TLOW:SEXTLow TLOW:MEXTLow
Stop
Clk ACK
TLOW:MEXT
Clk ACK TLOW:MEXT
12
7
8
9
1
2
7
8
9
1
2
7
8
9
P
7 R/W# ACK
ACK
A/NA
GPT
30.50
SMBus
30.13.2 PEC
MCU CRC CRC PEC SMBus CRC 33.CRC
PEC CRC CRC CRCDIR
PEC CRC CRCDIR CRC CRCDOR PEC
PEC ACK/NACK SCL 8 ICMR3.RDRFS 1 8 SCLn Low
30.13.3 SMBus Notify ARP Master
SMBus SMBus ARP SMBus
MCU SMBus ARP 0001 000bIIC ICMR3.SMBS ICSER.HOAE 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1035 of 1551
RA4W1
30. I2C IIC
30.14
IIC 5
NACK
30.10 DTC DMAC
30.10
IICn_EEI5
IICn_RXI
2 5
DTC
AL
NACKF
TMOF
START
STOP
RDRF
DMAC
AL = 1 ALIE = 1 NACKF = 1NAKIE = 1 TMOF = 1TMOIE = 1 START = 1STIE = 1 STOP = 1SPIE = 1 RDRF = 1 RIE = 1
IICn_TXI
1 5
TDRE
TDRE = 1 TIE = 1
IICn_TEI
3 5
TEND
TEND = 1 TEIE = 1
IIC0_WUI4
WUF
RWAKASY0 = 1 WUIE = 1
.
1.
2. 3.
4. 5.
CPU
IICn_TXI IICn_TXI ICSR2.TDRE ICDRT ICSR2.STOP = 1 0 IICn_RXI IICn_RXI ICSR2.RDRF ICDRR 0 IICn_TEI IICn_TEI ICSR2.TEND ICSR2.TEND ICDRT ICSR2.STOP = 1 0 0 IIC0_WUI 0 n = 0 1
30.14.1 IICn_TXI IICn_RXI
IR 1 IICn_TXI IICn_RXI ICU 1 1
ICU.IELSRn.IR 0 ICU 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1036 of 1551
RA4W1
30. I2C IIC
30.15
IIC 2 IIC 30.11
30.11
ICCR1 ICE, IICRST
SCLO, SDAO
IIC ICE = 0 IICRST = 1
ICE = 1 IICRST = 1
ICCR2
BBSY ST TRS, MST
ICMR1
BC[2:0]
ICMR2 ICMR3 ICFER ICSER ICIER ICSR1 ICSR2
TDRE, TEND START STOP
ICWUR ICWUR2
WUSEN
SARL0 SARL2 SARU0 SARU2 ICBRH, ICBRL ICDRT ICDRR ICDRS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1037 of 1551
RA4W1
30. I2C IIC
30.16
IIC0 IIC1 ELC
(1)
ELC
(2)
ELC
(3)
ELC
(4)
ELC
30.16.1
IIC 30.10 CPU
ELC 30.10
30.17
30.17.1
BMSTPCRBIIC IIC
B 11.
30.17.2
ICCR1.ICE = 1 IIC IR 1 ICCR1.ICE 1 IR 1 IR
1. ICCR1.ICE 0
2. ICIER.TIE 0
3. ICIER.TIE 0
4. IR 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1038 of 1551
RA4W1
31. CANController Area Network
31. CANController Area Network
31.1
CAN ISO 11898-1CAN 2.0A/CAN 2.0B 32 FIFO 11 29 CAN CAN
31.1 CAN 31.1
31.1
CAN (1/2)
ISO11898-1
1MbpsfCAN 8MHz fCANCAN
32 2 32 FIFO24
4 FIFO
ID ID ID ID
84 1
ID ID ID ID ID
ISO11898-1 CAN halt CAN halt CAN halt
CANACK15 CRC ACK
16 1248
5
FIFO FIFO
CAN
CAN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1039 of 1551
RA4W1
31. CANController Area Network
31.1
CAN (2/2)
CAN
3
PCLKB CANMCLK
3 0 1
CAN
CRX0 CTX0
(PCLKB)
EXTAL
CANMCLK
fCANCLK
(BRP)
CCLKS
fCAN
BRP BCR CCLKS BCR fCANCLKCAN fCAN CAN
ID
PCLKA
CAN0 CAN0 CAN0 FIFO CAN0 FIFO CAN0
31.1
CAN
CAN
CAN CRX0 CTX0
CAN
32 IDDLC8
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1040 of 1551
RA4W1
31. CANController Area Network
MKR0 MKR7
5
CAN0
CAN0
CAN0 FIFO
CAN0 FIFO
CAN0
31.2 CAN MCU 20.I/O
31.2
CRX0 CTX0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1041 of 1551
RA4W1
31. CANController Area Network
31.2 31.2.1 CTLR
CAN0.CTLR 4005 0840h
b15 -- 0
b14 b13 b12 b11 b10
-- RBOC BOM[1:0] SLPM
0
0
0
0
1
b9
b8
CANM[1:0]
0
1
b7
b6
TSPS[1:0]
0
0
b5
b4
b3
TSRC TPM MLM
0
0
0
b2
b1
IDFM[1:0]
0
0
b0 MBM
0
b0 b2-b1
b3 b4 b5 b7-b6 b9-b8 b10 b12-b11
b13 b15-b14
MBM
IDFM[1:0]
CAN 1
ID
1
MLM TPM
1
1
TSRC TSPS[1:0]
4
1
CANM[1:0] CAN 5
SLPM BOM[1:0]
CAN
56
1
RBOC --
2
0 1FIFO
b2 b1
0 0 ID FIFO ID
0 1 ID FIFO ID
1 0 ID FIFO ID ID IDE ID ID FIFO IDE 0 23 FIDCR0 FIDCR1 IDE FIFO 24 IDE FIFO
1 1
0 1
0ID 1
0 1 3
b7 b6
0 01 0 12 1 04 1 18
b9 b8
0 0CAN 0 1CAN 1 0CAN halt 1 1CAN
0CAN 1CAN
b12 b11
0 0ISO11898-1 0 1 CAN halt 1 0 CAN halt 1 1 CAN halt
0 1 3
0 0
R/W R/W R/W
R/W R/W R/W R/W R/W R/W R/W
R/W R/W
1. 2.
BOM[1:0]TSPS[1:0]TPMMLMIDFM[1:0] MBM CAN
RBOC 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1042 of 1551
RA4W1
31. CANController Area Network
3. 4. 5.
6.
1 0 0 TSRC CAN 1 CANM[1:0] SLPM STR CANM[1:0] SLPM SLPM CAN CAN halt SLPM SLPM 0 1
MBM CAN MBM 0 0 31
MBM 1FIFO 0 23
24 27 FIFO
28 31 FIFO
24 FIFO 28 FIFO
31.3
IDFM[1:0] ID IDFM[1:0] ID
MLM
MLM FIFO
0
1
TPM
TPM
TPM ID ID
TPM 0 ID ISO11898-1 CAN CAN ID 0 31 0 23FIFO FIFO ID 2 ID
FIFO FIFO FIFO
TPM 1 FIFO FIFO 0 23
TSRC
TSRC 1 TSR 0000h 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1043 of 1551
RA4W1
31. CANController Area Network
TSPS[1:0] TSPS[1:0] 124 8
CANM[1:0] CAN
CANM[1:0] CAN 1
CAN
CAN
CAN halt
CAN SLPM 31.3
CAN BOM[1:0] CAN halt CANM[1:0] 10b
SLPM CAN
SLPM 1 CAN CAN SLPM 0 CAN CAN 31.3
BOM[1:0]
BOM[1:0] CAN
BOM[1:0] 00b CAN ISO11898-1CAN 11 128 CAN
BOM[1:0] 01b CAN CTLR.CANM[1:0] 10b CAN halt TECR RECR 00h
BOM[1:0] 10b CAN CANM[1:0] 10b CAN 11 128 CAN halt TECR RECR 00h
BOM[1:0] 11b CAN CANM[1:0] 10b CAN halt TECR RECR 00h CANM[1:0] 10b 11 128
CAN CAN halt BOM[1:0] = 01b BOM[1:0] = 10b CPU CAN CPU CAN
RBOC
RBOC 1 CAN 0 RBOC 1 RECR TECR 00h STR.BOST 0 CAN RBOC 1 RBOC BOM[1:0] 00b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1044 of 1551
RA4W1
31. CANController Area Network
31.3
MBM = 0
0 23
24 27
28 31
MBM = 115 FIFO
FIFO FIFO
1.
2.
3. 4. 5.
FIFO TFCR 24 27 MCTL_TXj MCTL_TX24 MCTL_TX27 FIFO FIFO RFCR 28 31 MCTL_RXj MCTL_RX28 MCTL_RX31 FIFO FIFO MIER_FIFO 24 31 MKIVLR 0 FIFO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1045 of 1551
RA4W1
31. CANController Area Network
31.2.2 BCR
CAN0.BCR 4005 0844h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
TSEG1[3:0]
--
--
BRP[9:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
SJW[1:0]
--
TSEG2[2:0]
--
--
--
--
--
--
-- CCLKS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0 b7-b1 b10-b8
b11 b13-b12
b15-b14 b25-b16 b27-b26 b31-b28
CCLKS -- TSEG2[2:0]
-- SJW[1:0]
-- BRP[9:0] -- TSEG1[3:0]
CAN 2
1 1
R/W
0PCLKBPLL
R/W
1CANMCLK
0 0
R/W
b10 b8
0 0 0
R/W
0 0 12Tq
0 1 03Tq
0 1 14Tq
1 0 05Tq
1 0 16Tq
1 1 07Tq
1 1 18Tq
0 0
R/W
b13 b12
0 01Tq 0 12Tq 1 03Tq 1 14Tq
R/W
0 0
R/W
CANfCANCLK R/W
0 0
R/W
b31
b28
0 0 0 0
R/W
0 0 0 1
0 0 1 0
0 0 1 14Tq
0 1 0 05Tq
0 1 0 16Tq
0 1 1 07Tq
0 1 1 18Tq
1 0 0 09Tq
1 0 0 110Tq
1 0 1 011Tq
1 0 1 112Tq
1 1 0 013Tq
1 1 0 114Tq
1 1 1 015Tq
1 1 1 116Tq
Tq: Time Quantum 1. SCKSCR.CKSEL[2:0] 011b1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1046 of 1551
RA4W1
31. CANController Area Network
31.4BCR CAN CAN halt CAN CAN CAN halt 32 0 7
CCLKS CAN
CCLKS 0 CAN fCANPLL PCLKBCCLKS 1 CAN fCAN EXTAL CANMCLK
TSEG2[2:0] 2
TSEG2[2:0] 2PHASE_SEG2 Tq 2 8Tq TSEG1[3:0]
SJW[1:0]
SJW[1:0] Tq 1 4Tq TSEG2[2:0]
BRP[9:0]
BRP[9:0] CAN fCANCLKfCANCLK 1Tq P0 1023 fCAN P + 1
TSEG1[3:0] 1
TSEG1[3:0] PROP_SEG 1PHASE_SEG1 Tq 4 16Tq
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1047 of 1551
RA4W1
31. CANController Area Network
31.2.3 kMKRk(k = 0 7)
CAN0.MKR0 4005 0400h CAN0.MKR7 4005 041Ch
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
--
--
--
SID[10:0]
EID[17:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
EID[17:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b17-b0
EID[17:0]
b28-b18 SID[10:0]
b31-b29 --
ID ID
R/W
0 EID[17:0]
R/W
1 EID[17:0]
0 SID[10:0]
R/W
1 SID[10:0]
0
R/W
FIFO 31.6
MKR0 MKR7 CAN CAN halt
EID[17:0] ID
EID[17:0] CAN ID ID EID[17:0] 0 ID ID EID[17:0] 1 ID ID
SID[10:0] ID
SID[10:0] CAN ID ID ID
SID[10:0] 0 ID ID SID[10:0] 1 ID ID
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1048 of 1551
RA4W1
31. CANController Area Network
31.2.4 FIFO ID 01FIDCR0, FIDCR1
CAN0.FIDCR0 4005 0420h, CAN0.FIDCR1 4005 0424h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
IDE RTR --
SID[10:0]
EID[17:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
EID[17:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
R/W
b17-b0
EID[17:0]
ID
ID
R/W
b28-b18 SID[10:0]
ID
ID
R/W
b29
--
0
R/W
b30
RTR
0
R/W
1
b31
IDE
ID 1
0 ID 1 ID
R/W
1. CTLR.IDFM[1:0] 10b IDE 0 0
FIDCR0 FIDCR1 CTLR.MBM 1FIFO FIFO 28 31 EID[17:0]SID[10:0]RTR IDE FIDCR0 FIDCR1 CAN CAN halt FIDCR0 FIDCR1 31.6
EID[17:0] ID
EID[17:0] ID ID
SID[10:0] ID
SID[10:0] ID ID ID
RTR RTR FIDCR0 FIDCR1 RTR 0 FIDCR0 FIDCR1 RTR 1 FIDCR0 FIDCR1 RTR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1049 of 1551
RA4W1
31. CANController Area Network
IDE ID IDE ID ID ID IDE CTLR.IDFM[1:0]
10b ID FIDCR0 FIDCR1 IDE 0 ID
FIDCR0 FIDCR1 IDE 1 ID
FIDCR0 FIDCR1 IDE ID ID
31.2.5 MKIVLR
CAN0.MKIVLR 4005 0428h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
MB31 MB30 MB29 MB28 MB27 MB26 MB25 MB24 MB23 MB22 MB21 MB20 MB19 MB18 MB17 MB16
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
MB15 MB14 MB13 MB12 MB11 MB10 MB9
x
x
x
x
x
x
x
b8 MB8
x
b7 MB7
x
b6 MB6
x
b5 MB5
x
b4 MB4
x
b3 MB3
x
b2 MB2
x
b1 MB1
x
b0 MB0
x
x
R/W
b31-b0
MB31 MB0
0
R/W
1
MKIVLR MKIVLR 0 0MB0 31 31MB31 1
MBn 1 MBn 1 ID ID MKIVLR CAN CAN halt
1. FIFO 31 24 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1050 of 1551
RA4W1
31. CANController Area Network
31.2.6
jMBj_IDMBj_DLMBj_DmMBj_TS(j = 0 31; m = 0 7)
31.4 CAN0 31.5 CAN CAN0
MBj_IDMBj_DLMBj_Dm MBj_TS MCTL_TXj MCTL_RXjj = 0 31 00h 31.4
31.4
CAN0
CAN0
4005 0200h + 16 � j + 0 4005 0200h + 16 � j + 1 4005 0200h + 16 � j + 2
4005 0200h + 16 � j + 3
4005 0200h + 16 � j + 4 4005 0200h + 16 � j + 5
4005 0200h + 16 � j + 6
4005 0200h + 16 � j + 7
4005 0200h + 16 � j + 8
4005 0200h + 16 � j + 9
4005 0200h + 16 � j + 10
4005 0200h + 16 � j + 11
4005 0200h + 16 � j + 12 4005 0200h + 16 � j + 13
4005 0200h + 16 � j + 14 4005 0200h + 16 � j + 15
IDERTRSID10 SID6 SID5 SID0EID17EID16 EID15 EID8 EID7 EID0 -- DLC[3:0] 0 1 2 3 4 5 6 7
31.5
CAN
SID10SID6 SID5 SID0 EID17 EID16
EID15 EID8
EID7 EID0 DLC3DLC1 DATA0 DATA1 DATA7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1051 of 1551
RA4W1
31. CANController Area Network
CAN0.MB0_ID 4005 0200h CAN0.MB31_ID 4005 03F0h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
IDE RTR --
SID[10:0]
EID[17:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
EID[17:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b17-b0 b28-b18 b29 b30
EID[17:0] SID[10:0] -- RTR
ID1 ID
b31
IDE
ID 2
R/W
ID
R/W
ID
R/W
0 R/W
0
R/W
1
0 ID
R/W
1 ID
1. 2.
ID EID IDE CTLR.IDFM[1:0] 10b ID CTLR.IDFM[1:0] 10b IDE 0 0
CAN0.MB0_DL 4005 0204hCAN0.MB31_DL 4005 03F4h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
DLC[3:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b3-b0
DLC[3:0]
1
b15-b4
--
R/W
b3
b0
0 0 0 0 = 0
R/W
0 0 0 1 = 1
0 0 1 0 = 2
0 0 1 1 = 3
0 1 0 0 = 4
0 1 0 1 = 5
0 1 1 0 = 6
0 1 1 1 = 7
1 x x x = 8
0 R/W
x: Don't care 1. n n 8 DLC[3:0]
DATAn DATA7 DATA0 DATA7 6 DLC[3:0] = 6hDATA6 DATA7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1052 of 1551
RA4W1
31. CANController Area Network
CAN0.MB0_D0 4005 0206hCAN0.MB31_D0 4005 03F6h
b7
b6
b5
b4
b3
b2
b1
b0
DATA0
x
x
x
x
x
x
x
x
CAN0.MB0_D1 4005 0207hCAN0.MB31_D1 4005 03F7h
b7
b6
b5
b4
b3
b2
b1
b0
DATA1
x
x
x
x
x
x
x
x
CAN0.MB0_D2 4005 0208hCAN0.MB31_D2 4005 03F8h
b7
b6
b5
b4
b3
b2
b1
b0
DATA2
x
x
x
x
x
x
x
x
CAN0.MB0_D3 4005 0209hCAN0.MB31_D3 4005 03F9h
b7
b6
b5
b4
b3
b2
b1
b0
DATA3
x
x
x
x
x
x
x
x
CAN0.MB0_D4 4005 020AhCAN0.MB31_D4 4005 03FAh
b7
b6
b5
b4
b3
b2
b1
b0
DATA4
x
x
x
x
x
x
x
x
CAN0.MB0_D5 4005 020BhCAN0.MB31_D5 4005 03FBh
b7
b6
b5
b4
b3
b2
b1
b0
DATA5
x
x
x
x
x
x
x
x
CAN0.MB0_D6 4005 020ChCAN0.MB31_D6 4005 03FCh
b7
b6
b5
b4
b3
b2
b1
b0
DATA6
x
x
x
x
x
x
x
x
CAN0.MB0_D7 4005 020DhCAN0.MB31_D7 4005 03FDh
b7
b6
b5
b4
b3
b2
b1
b0
DATA7
x
x
x
x
x
x
x
x
x
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1053 of 1551
RA4W1
31. CANController Area Network
b7-b0
DATA0 DATA7
0 7
1 2
R/W
DATA0 7 CAN
R/W
DATA0 CAN
MSB 7
1. 2.
n n 8 DATAn DATA7 6 DATA6 DATA7 DATA0 DATA7
CAN0.MB0_TS 4005 020EhCAN0.MB31_TS 4005 03FEh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
TSH[7:0]
TSL[7:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b7-b0 b15-b8
TSL[7:0] TSH[7:0]
R/W
TSH[7:0] TSL[7:0]
R/W
R/W
EID[17:0] ID EID[17:0] ID ID
SID[10:0] ID SID[10:0] ID ID ID
RTR RTR RTR
RTR
FIFO FIDCR0 FIDCR1 RTR
FIFO RTR
IDE ID IDE ID ID ID IDE CTLR.IDFM[1:0]
10b ID IDE ID
IDE ID
FIFOFIDCR0FIDCR1IDEIDID
FIFOIDE ID ID
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1054 of 1551
RA4W1
31. CANController Area Network
DLC[3:0]
DLC[3:0] DLC[3:0]
DLC[3:0] DLC[3:0]
31.2.7 MIER
CAN0.MIER 4005 042Ch
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
MB31 MB30 MB29 MB28 MB27 MB26 MB25 MB24 MB23 MB22 MB21 MB20 MB19 MB18 MB17 MB16
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
MB15 MB14 MB13 MB12 MB11 MB10 MB9
x
x
x
x
x
x
x
b8 MB8
x
b7 MB7
x
b6 MB6
x
b5 MB5
x
b4 MB4
x
b3 MB3
x
b2 MB2
x
b1 MB1
x
b0 MB0
x
x
b31-b0 MB31 MB0
R/W
0
R/W
1
31 31MB310
0MB0
MIER FIFO
MIER 0 0MB0
MIER 31 31MB31
MIER MCTL_TXj MCTL_RXjj = 0 31 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1055 of 1551
RA4W1
31. CANController Area Network
31.2.8 FIFO MIER_FIFO
CAN0.MIER_FIFO 4005 042Ch
b31 -- x
b30 b29 b28 b27
-- MB29 MB28 --
x
x
x
x
b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
-- MB25 MB24 MB23 MB22 MB21 MB20 MB19 MB18 MB17 MB16
x
x
x
x
x
x
x
x
x
x
x
b15 b14 b13 b12 b11 b10 b9
MB15 MB14 MB13 MB12 MB11 MB10 MB9
x
x
x
x
x
x
x
b8 MB8
x
b7 MB7
x
b6 MB6
x
b5 MB5
x
b4 MB4
x
b3 MB3
x
b2 MB2
x
b1 MB1
x
b0 MB0
x
x
R/W
b23-b0 MB23 MB0
0
R/W
1
23 23MB230
0MB0
b24
MB24
FIFO
0
R/W
1
b25
MB25
FIFO 0
R/W
1 FIFO
b27-b26 --
0
R/W
b28
MB28
FIFO
0
R/W
1
b29
MB29
FIFO 1
0 1 FIFO 2
R/W
b31-b30 --
0
R/W
1. 2.
FIFO FIFO 3
MIER_FIFO FIFO FIFO
MB0 MB23
MIER_FIFO 0 0MB0
MIER_FIFO 23 23MB23
MB24MB25MB28MB29 FIFO FIFO
MIER_FIFO MCTL_TXj MCTL_RXjj = 0 31 00h FIFO MIER_FIFO
TFCR.TFE 0 TFCR.TFEST 1
RFCR.RFE 0 RFCR.RFEST 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1056 of 1551
RA4W1
31. CANController Area Network
31.2.9 MCTL_TXj(j = 0 31)
TRMREQ 1RECREQ 0
CAN0.MCTL_TX[0] 4005 0820hCAN0.MCTL_TX[31] 4005 083Fh
b7
b6
b5
b4
b3
b2
b1
b0
TRMRE RECRE
Q
Q
--
ONESH OT
--
TRMAB TRMAC SENTD T TIVE ATA
0
0
0
0
0
0
0
0
b0 b1 b2
b3 b4 b5 b6 b7
SENTDATA
1
TRMACTIVE
TRMABT
1 2
-- ONESHOT
2 3
-- RECREQ
TRMREQ
2 34 5
2 4
0 1
0 1
0
1
0 0
0 1
0 0
0 1
0 1
R/W R/W
R R/W
R/W R/W R/W R/W R/W
1. 2.
3.
4. 5.
0 1 SENTDATA TRMABT 1 TRMREQ 1 ONESHOT 1 ONESHOT 0
RECREQ TRMREQ 1 RECREQ 0 SENDDATATRMACTIVETRMABT 0
MCTL_TXj j MCTL_TXj j MCTL_TXj MCTL_TXj CAN CAN halt FIFO MCTL_TX24 MCTL_TX31
SENTDATA
SENTDATA 1 0
0 TRMREQ 0 SENTDATA TRMREQ 0 SENTDATA 0
TRMACTIVE
TRMACTIVE CAN 1 TRMACTIVE CAN CAN CAN 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1057 of 1551
RA4W1
31. CANController Area Network
TRMABT
TRMABT 1
CAN CAN CAN
RECREQ = 0TRMREQ = 1ONESHOT = 1CAN CAN CAN
TRMABT 1 SENTDATA 1 TRMABT 0
ONESHOT
RECREQ = 0TRMREQ = 1 ONESHOT 1 CAN 1 CAN CAN CAN SENTDATA 1 CAN CAN TRMABT 1 ONESHOT SENTDATA TRMABT 1 0
RECREQ RECREQ 31.10
RECREQ 1
RECREQ 0
RECREQ 0
CRC
CAN CRC EOF 7
RECREQ 1 TRMREQ 1 SENTDATA TRMABT 0
. MCTL_TXj.RECREQ MCTL_RXj.RECREQ
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1058 of 1551
RA4W1
31. CANController Area Network
TRMREQ
TRMREQ 31.10
TRMREQ 1
TRMREQ 0
TRMREQ 1 0 TRMABT SENTDATA 1 TRMREQ 1 RECREQ 1 NEWDATA MSGLOST 0
. MCTL_TXj.TRMREQ MCTL_RXj.TRMREQ
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1059 of 1551
RA4W1
31. CANController Area Network
31.2.10 MCTL_RXj(j = 0 31)
TRMREQ 0RECREQ 1
CAN0.MCTL_RX[0] 4005 0820hCAN0.MCTL_RX[31] 4005 083Fh
b7
b6
b5
b4
b3
TRMRE RECRE
Q
Q
--
ONESH OT
--
0
0
0
0
0
b2
b1
b0
MSGL INVALD NEWD OST ATA ATA
0
0
0
b0
b1
NEWDATA
1 2
INVALDATA
b2
MSGLOST
1 2
b3
--
b4
ONESHOT
2 3
b5
--
b6
RECREQ
23 45
b7
TRMREQ
2 4
0 0 1
0 1
0 1
0 0
0 1
0 0
0 1
0 1
R/W R/W
R
R/W
R/W R/W
R/W R/W
R/W
1. 2. 3.
4. 5.
0 1 NEWDATA MSGLOST 1 RECREQ 1 ONESHOT 1
RECREQ 0 RECREQ 0 ONESHOT 0 RECREQ TRMREQ 1 RECREQ 0 MSGLOSTNEWDATA RECREQ 0
MCTL_RXj j MCTL_RXj
j MCTL_RXj MCTL_RXj CAN CAN halt FIFO MCTL_RX24 MCTL_RX31
NEWDATA
NEWDATA 1 INVALDATA 1 NEWDATA 0 INVALDATA 1 NEWDATA 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1060 of 1551
RA4W1
31. CANController Area Network
INVALDATA
INVALDATA 1 INVALDATA 0 INVALDATA 1
MSGLOST
MSGLOST NEWDATA 1 1 MSGLOST EOF 6 1 MSGLOST 0
EOF 6 PCLKB 5 MSGLOST 0
ONESHOT
RECREQ = 1TRMREQ = 0 ONESHOT 1 1 NEWDATA INVALDATA MSGLOST 1 ONESHOT 0 RECREQ 0 RECREQ 0
RECREQ RECREQ 31.10 RECREQ 1
RECREQ 0
CRC
CAN CRC EOF 7
RECREQ 1 TRMREQ 1 SENTDATA TRMABT 0
.
MCTL_RXj.RECREQ MCTL_TXj.REQREQ
TRMREQ
TRMREQ 31.10
TRMREQ 1
TRMREQ 1 0 TRMABT SENTDATA 1 TRMREQ 1 RECREQ 1
NEWDATA MSGLOST 0
.
MCTL_RXj.TRMREQ MCTL_TXj.TRMREQ
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1061 of 1551
RA4W1
31. CANController Area Network
31.2.11 FIFO RFCR
CAN0.RFCR 4005 0848h
b7
b6
b5
b4
b3
b2
b1
RFEST RFWST RFFST RFMLF
RFUST[2:0]
1
0
0
0
0
0
0
b0 RFE
0
R/W
b0
RFE
FIFO
0FIFO
R/W
1FIFO
b3-b1 RFUST[2:0] FIFO b3 b1
R
0 0 0
0 0 11
0 1 02
0 1 13
1 0 04
1 0 1
1 1 0
1 1 1
b4
RFMLF
FIFO 0FIFO
R/W
1FIFO
b5
RFFST
FIFO 0FIFO
R
1FIFO 4
b6
RFWST
FIFO 0FIFO
R
1FIFO
3
b7
RFEST
FIFO
0FIFO
R
1FIFO
RFCR CAN CAN halt
RFE FIFO
RFE 1 FIFO RFE 0 FIFO RFEST = 1RFMLF RFE 0
CTLR.MBM = 0 1 RFE 0
CRC
FIFO FIFO CAN CRC EOF 7
FIFO
RFUST[2:0] FIFO
RFUST[2:0] FIFO RFE 0 RFUST[2:0] 000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1062 of 1551
RA4W1
31. CANController Area Network
RFMLF FIFO
FIFO RFMLF 1 FIFO EOF 6 1
RFMLF 0 1 FIFO EOF 6 PCLKB 5 RFMLF 0 FIFO
RFFST FIFO
FIFO 4 RFFST 1 FIFO FIFO 4 RFFST 0 FIFO RFE 0 RFFST 0
RFWST FIFO
FIFO 3 RFWST 1 FIFO FIFO 3 4 RFWST 0 FIFO RFE 0 RFWST 0
RFEST FIFO
FIFO RFEST 1 FIFO RFE 0 RFEST 1 FIFO 1 RFEST 0 FIFO
31.2 FIFO
FIFO 1 2 3 4
CAN
RFCR.RFEST
RFCR.RFWST RFCR.RFFST CAN0FIFO
MIER_FIFO29, 28 = 01b
CAN0FIFO
MIER_FIFO29, 28 = 11b
RFPCR
1 2 3 4
1 2 3 4
31.2
FIFO MIER_FIFO 2928 01b 11b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1063 of 1551
RA4W1
31. CANController Area Network
31.2.12 FIFO RFPCR
CAN0.RFPCR 4005 0849h
b7
b6
b5
b4
b3
b2
b1
b0
x
x
x
x
x
x
x
x
x
R/W
b7-b0
RFPCR FFhFIFO CPU
W
FIFO CPU RFPCR FFh RFCR.RFE 0 FIFO RFPCR
RFFST 1 FIFO CAN CPU RFMLF 1 RFPCR CPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1064 of 1551
RA4W1
31. CANController Area Network
31.2.13 FIFO TFCR
CAN0.TFCR 4005 084Ah
b7
b6
b5
b4
TFEST TFFST --
--
1
0
0
0
b3
b2
b1
b0
TFUST[2:0]
TFE
0
0
0
0
b0
TFE
b3-b1
TFUST[2:0]
b5-b4 b6
b7
-- TFFST
TFEST
R/W
FIFO
0 FIFO
R/W
1 FIFO
FIFO b3 b1
R
0 0 0
0 0 1 1
0 1 0 2
0 1 1 3
1 0 0 4
1 0 1
1 1 0
1 1 1
0 0 R/W
FIFO
0 FIFO
R
1 FIFO 4
FIFO
0 FIFO
R
1 FIFO
TFCR CAN CAN halt
TFE FIFO TFE 1 FIFO TFE 0 FIFO TFEST 1 FIFO
FIFO
FIFO CAN CAN CAN halt
TFE 1 TFEST 1 TFE 1 24
CTLR.MBM = 0TFE 1
TFUST[2:0] FIFO
TFUST[2:0] FIFO TFE 0 TFUST[2:0] 000b
TFFST FIFO
FIFO 4 TFFST 1 FIFO FIFO 4 TFFST 0 FIFO FIFO TFFST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1065 of 1551
RA4W1
31. CANController Area Network
TFEST FIFO
FIFO TFEST 1 FIFO FIFO TFEST 1 FIFO 1 TFEST 0 FIFO
31.3 FIFO
FIFO 1 2 3 4
CAN
TFCR.TFEST
TFCR.TFFST CAN0FIFO
MIER_FIFO25, 24 = 01b
CAN0FIFO
MIER_FIFO25, 24 = 11b
TFPCR
1 2 3 4
1 2 3 4
31.3
FIFO MIER_FIFO 2524 01b 11b
31.2.14 FIFO TFPCR
CAN0.TFPCR 4005 084Bh
b7
b6
b5
b4
b3
b2
b1
b0
x
x
x
x
x
x
x
x
x
R/W
b7-b0
TFPCR FFh FIFO CPU
W
FIFO FIFO CPU TFPCR FFh
TFCR.TFE 0 FIFO TFPCR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1066 of 1551
RA4W1
31. CANController Area Network
31.2.15 STR
CAN0.STR 4005 0842h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
-- RECST TRMST BOST EPST SLPST HLTST RSTST EST TABST FMLST NMLST TFST RFST SDST NDST
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
b0
NDST
b1
SDST
b2
RFST
b3
TFST
b4
NMLST
b5
FMLST
b6
TABST
b7
EST
b8
RSTST
b9
HLTST
b10
SLPST
b11
EPST
b12
BOST
b13
TRMST
b14
RECST
b15
--
R/W
NEWDATA
0NEWDATA1
R
1NEWDATA1
SENTDATA
0SENTDATA 1
R
1SENTDATA 1
FIFO
0 FIFO
R
1 FIFO
FIFO
0 FIFO
R
1 FIFO
0MSGLOST1
R
1MSGLOST1 1
FIFO 0RFMLF 0
R
1RFMLF 1
0TRMABT 1
R
1TRMABT 1
0
R
1
CAN
0CAN
R
1CAN
CAN halt
0CAN halt
R
1CAN halt
CAN
0CAN
R
1CAN
0
R
1
0
R
1
0
R
1
0
R
1
0
R
NDST NEWDATA
MCTL_RXj j = 0 31 NEWDATA 1 1 MIER MIER_FIFO NDST 1 NEWDATA 0 NDST 0
SDST SENTDATA
MCTL_TXj j = 0 31 SENTDATA 1 1 MIER MIER_FIFO SDST 1 SENTDATA 0 SDST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1067 of 1551
RA4W1
31. CANController Area Network
RFST FIFO
RFST FIFO 1 FIFO RFST 0
TFST FIFO
TFST FIFO 1 FIFO TFST 0
NMLST
MCTL_RXj j = 0 31 MSGLOST 1 1 MIER MIER_FIFO NMLST 1 MSGLOST 0 NMLST 0
FMLST FIFO
RFCR RFMLF 1 MIER_FIFO FMLST 1 RFMLF 0 FMLST 0
TABST
MCTL_TXj j = 0 31 TRMABT 1 1 MIER MIER_FIFO TABST 1 TRMABT 0 TABST 0
EST
EIFR 1 EIER EST 1 EIFR 1 EST 0
RSTST CAN
RSTST CAN CAN 1 RSTST CAN CAN 0 CAN CAN RSTST 1
HLTST CAN halt
HLTST CAN CAN halt 1 HLTST CAN CAN halt 0 CAN halt CAN HLTST 1
SLPST CAN
SLPST CAN CAN 1 SLPST CAN CAN 0
EPST
TECR RECR 127 CAN 128 TEC 256 128 REC 256EPST 1 CAN EPST 0
BOST
TECR 255 CAN TEC 256BOST 1 CAN BOST 0
TRMST
TRMST CAN 1 TRMST CAN 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1068 of 1551
RA4W1
31. CANController Area Network
RECST
RECST CAN 1 RECST CAN 0
31.2.16 MSMR
CAN0.MSMR 4005 0853h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
MBSM[1:0]
0
0
0
0
0
0
0
0
R/W
b1-b0
MBSM[1:0]
b1 b0
R/W
0 0
0 1
1 0
1 1
b7-b2
--
00
R/W
MSMR CAN CAN halt
MBSM[1:0]
MBSM[1:0]
MBSM[1:0] 00b MCTL_RXj j = 0 31 NEWDATA RFCR RFEST
MBSM[1:0] 01b MCTL_TXj SENTDATA
MBSM[1:0] 10b MCTL_RXj MSGLOST RFCR RFMLF
MBSM[1:0] 11b CSSR 31.2.18CSSR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1069 of 1551
RA4W1
31. CANController Area Network
31.2.17 MSSR
CAN0.MSSR 4005 0852h
b7
b6
b5
b4
b3
b2
b1
b0
SEST --
--
MBNST[4:0]
1
0
0
0
0
0
0
0
b4-b0 MBNST[4:0]
b6-b5 b7
-- SEST
R/W
MSMR
R
0
R
0
R
1
MBNST[4:0]
MBNST[4:0]
MBNST[4:0] NEWDATASENTDATA MSGLOST 0
MBNST[4:0] NEWDATASENTDATA MSGLOST 1
MBSM[1:0] 00b 10b FIFO 28 0 23 FIFO MBSM[1:0] 01b FIFO 24 31.6 FIFO MBNST[4:0]
MBNST[4:0] MSSR
SEST
SEST 1
SENTDATA 1 SEST 1 1 SENTDATA 1 SEST 0 SEST 1 MBNST[4:0]
31.6
FIFO MBNST[4:0]
MBSM[1:0]
00b
01b
24 FIFO
24
28 FIFO
MCTL_RXj.NEWDATA 1 FIFO 28
28
10b
MCTL_RXj.MSGLOST 1
FIFO RFCR.RFMLF 1
FIFO 28
11b
28
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1070 of 1551
RA4W1
31. CANController Area Network
31.2.18 CSSR
CAN0.CSSR 4005 0851h
b7
b6
b5
b4
b3
b2
b1
b0
x
x
x
x
x
x
x
x
x
R/W
b7-b0
MSSR
R/W
CSSR 1 8/3 MSSR.MBNST[4:0] MSSR
CSSR MSMR.MBSM[1:0] 11b CSSR CAN CAN halt
31.4 CSSR MSSR
CSSR
b7
b6
0
1
0
b3
0
1
0
b0
0
1
CAN0 4005 0851h
8/3
CAN0
MSSR
b7
4005 0852h
b2
b0
1 0
0
0
0
0
0
0
0 0
2 0
0
0
0
0
0
1
1 3
3 0
0
0
0
0
1
1
0 6
4 1
0
0
31.4
CSSR MSSR
CSSR MSSR 8/3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1071 of 1551
RA4W1
31. CANController Area Network
31.2.19 AFSR
CAN0.AFSR 4005 0856h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
R/W
b15-b0
ID
R/W
.
AFSR CAN CAN halt
ASU8 � 256 ID 1 ID MBj_ID.SID[10:0] j = 0 31 16 AFSR ASU 11 ID
ASU
ID ID 078h087h 111h
ID
. AFSR CAN
31.5 AFSR
b15 1
b8 b7
b0
SID SID SID SID SID SID SID SID SID SID SID 10 9 8 7 6 5 4 3 2 1 0
3/8
b15
b8 b7
b0
SID SID SID SID SID SID SID SID 10 9 8 7 6 5 4 3
1.
MBj_ID.SID[10:0]j = 0 31 16
31.5
AFSR
CAN0
4005 0856h
CAN0 4005 0856h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1072 of 1551
RA4W1
31. CANController Area Network
31.2.20 EIER
CAN0.EIER 4005 084Ch
b7
b6
b5
b4
b3
b2
b1
b0
BLIE OLIE ORIE BORIE BOEIE EPIE EWIE BEIE
0
0
0
0
0
0
0
0
R/W
b0
BEIE
0
R/W
1
b1
EWIE
0
R/W
1
b2
EPIE
0
R/W
1
b3
BOEIE
0
R/W
1
b4
BORIE
0
R/W
1
b5
ORIE
0
R/W
1
b6
OLIE
0
R/W
1
b7
BLIE
0
R/W
1
EIER EIFR EIER CAN
BEIE
BEIE 0 EIFR.BEIF 1 BEIE 1 EIFR.BEIF 1
EWIE
EWIE 0 EIFR.EWIF 1 EWIE 1 EIFR.EWIF 1
EPIE
EPIE 0 EIFR.EPIF 1 EPIE 1 EIFR.EPIF 1
BOEIE
BOEIE 0 EIFR.BOEIF 1 BOEIE 1 EIFR.BOEIF 1
BORIE
BORIE 0 EIFR.BORIF 1 BORIE 1 EIFR.BORIF 1
ORIE
ORIE 0 EIFR.ORIF 1 ORIE 1 EIFR.ORIF 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1073 of 1551
RA4W1
31. CANController Area Network
OLIE
OLIE 0 EIFR.OLIF 1 OLIE 1 EIFR.OLIF 1
BLIE
BLIE 0 EIFR.BLIF 1 BLIE 1 EIFR.BLIF 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1074 of 1551
RA4W1
31. CANController Area Network
31.2.21 EIFR
CAN0.EIFR 4005 084Dh
b7
b6
b5
b4
b3
b2
b1
b0
BLIF OLIF ORIF BORIF BOEIF EPIF EWIF BEIF
0
0
0
0
0
0
0
0
R/W
b0
BEIF
0
R/W
1
b1
EWIF
0
R/W
1
b2
EPIF
0
R/W
1
b3
BOEIF
0
R/W
1
b4
BORIF
0
R/W
1
b5
ORIF
0
R/W
1
b6
OLIF
0
R/W
1
b7
BLIF
0
R/W
1
EIFR EIER EIFR 1
0 1 1 0 MOV 0 1 1
BEIF
BEIF 1
EWIF
RECTEC 95 EWIF 1 REC TEC 95 1 REC TEC 95 0 REC TEC 95 95 EWIF 1
EPIF
CAN REC TEC 127 EPIF 1 REC TEC 127 1 REC TEC 127 0 REC TEC 127 127 EPIF 1
BOEIF
CAN TEC 255 BOEIF 1 CTLR BOM[1:0] 01b CAN halt CAN BOEIF 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1075 of 1551
RA4W1
31. CANController Area Network
BORIF CAN 11 128
BORIF 1 CTLR.BOM[1:0] 00b CTLR.BOM[1:0] 10b CTLR.BOM[1:0] 11b CAN BORIF 1 CTLR.CANM[1:0] 01b 11bCAN CTLR.RBOC 1 CTLR.BOM[1:0] 01b CTLR.BOM[1:0] 11b CTLR.CANM[1:0] 10bCAN halt 31.7 CTLR.BOM[1:0] BOEIF BORIF
31.7
CTLR.BOM[1:0] BOEIFBORIF
BOM[1:0]
BOEIF
00b
1
01b
10b
11b
BORIF 1
1
1
CANM[1:0] 10bCAN halt 1
ORIF
ORIF 1 1 ORIF 1
0 31 ORIF 1 FIFO 0 23 FIFO ORIF 1
OLIF
CAN OLIF 1
BLIF
CAN CAN CAN 32 BLIF 1
BLIF 1 32
BLIF 0 1
BLIF 0 1 CAN CAN CAN halt CAN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1076 of 1551
RA4W1
31. CANController Area Network
31.2.22 RECR
CAN0.RECR 4005 084Eh
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
R/W
b7-b0
CAN RECR
R
RECR CAN ISO11898-1RECR
31.2.23 TECR
CAN0.TECR 4005 084Fh
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
R/W
b7-b0
CAN TECR
R
TECR CAN ISO11898-1TECR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1077 of 1551
RA4W1
31. CANController Area Network
31.2.24 ECSR
CAN0.ECSR 4005 0850h
b7
b6
b5
b4
b3
b2
b1
b0
EDPM ADEF BE0F BE1F CEF AEF FEF SEF
0
0
0
0
0
0
0
0
b0
SEF
b1
FEF
b2
AEF
b3
CEF
b4
BE1F
b5
BE0F
b6
ADEF
b7
EDPM
1 2 1 2 ACK 12 CRC 12 1 2 1 2 ACK 12 3 4
0 1
0 1
0ACK 1ACK
0CRC 1CRC
0 1
0 1
0ACK 1ACK
0 1
R/W R/W R/W R/W R/W R/W R/W R/W R/W
1. 2.
3. 4.
1 SEFFEFAEFCEFBE1FBE0FADEF 0 MOV 0 1 EDPM CAN CAN halt 2 1
ECSR CAN CAN ISO11898-1
EDPM 0 ECSR 1 1
SEF SEF 1
FEF FEF 1
AEF ACK ACK AEF 1
CEF CRC CRC CEF 1
BE1F BE1F 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1078 of 1551
RA4W1
31. CANController Area Network
BE0F BE0F 1
ADEF ACK ACK ADEF 1
EDPM EDPM ECSR EDPM 0 ECSR
EDPM 1 ECSR
31.2.25 TSR
CAN0.TSR 4005 0854h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b15-b0
R
.
TSR 16
TSR 16 CTLR.TSPS[1:0] CAN CAN halt CAN MBj_TS TSL[7:0] TSH[7:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1079 of 1551
RA4W1
31. CANController Area Network
31.2.26 TCR
CAN0.TCR 4005 0858h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
TSTM[1:0] TSTE
0
0
0
0
0
0
0
0
R/W
b0
TSTE
CAN
0CAN
R/W
1CAN
b2-b1
TSTM[1:0]
CAN
b2 b1
R/W
0 0CAN
0 1
1 0 0
1 1 1
b7-b3
--
00
R/W
TCR CAN TCR CAN halt
(1)
CAN ISO11898-1 CAN ACK
31.6
CTX0
CRX0
31.6
CTX0
CRX0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1080 of 1551
RA4W1
31. CANController Area Network
(2) 0
0 CAN
CAN ACK CTX0 CRX0
31.7 0
CAN
CTX0
CRX0
ACK
CTX0
CRX0
31.7
0
(3) 1
1
ACK
1 CTX0 CRX0 CRX0 CTX0 CTX0 CRX0 CAN
31.8 1
31.8
CTX0
CRX0
ACK
CTX0
CRX0
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1081 of 1551
RA4W1
31.3
CAN CAN CAN halt CAN CAN 31.9
31. CANController Area Network
CPU
CANM[1:0] = 01b, 11b
SLPM = 0
CANM[1:0] = 00b
CAN
2
SLPM = 1
CAN
CANM[1:0] = 01b, 11b
CAN
SLPM = 1
CANM[1:0] = 10b
SLPM = 0
CANM[1:0] = 10b
CANM[1:0] = 00b
TEC255
CANM[1:0] = 01b, 11b
CANM[1:0] = 10b
BOM[1:0]00b,11b halt11 128 RBOC1
CAN halt CANM, SLPM, BOM, RBOCCTLR
CANM[1:0] = 01b, 11b
CANM[1:0] = 10b
1
CAN
1. 2.
CAN Halt CTLR.BOM[1:0] CTLR.BOM[1:0] 01b CTLR.BOM[1:0] 10b CTLR.BOM[1:0] 11b CTLR.CANM[1:0] 10bCAN Halt CAN CTLR.SLPM
31.9
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1082 of 1551
RA4W1
31. CANController Area Network
31.3.1 CAN
CAN CAN CTLR.CANM[1:0] 01b 11b CAN CAN STR.RSTST 1 RSTST 1 CTLR.CANM[1:0] CAN BCR CAN CAN MCTL_TXj MCTL_RXj STRSLPST TFST EIFR RECR TECR TSR MSSR MSMR RFCR TFCR TCR ECSREDPM CAN CTLR STRSLPST TFST MIER MIER_FIFO EIER BCR CSSR ECSREDPM MBj_IDMBj_DLMBj_DmMBj_TS MKRk FIDCR0 FIDCR1 MKIVLR AFSR RFPCR TFPCR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1083 of 1551
RA4W1
31. CANController Area Network
31.3.2 CAN halt
CAN halt CTLR.CANM[1:0] 10b CAN halt STR.HLTST 1 HLTST 1 CTLR.CANM[1:0] 31.8
CAN halt STR RSTST HLTST SLPST
CAN halt CTLR CANM[1:0] SLPM EIER CAN halt BCR
31.8
CAN CAN halt
CAN CANM[1:0] = 11b CAN CANM[1:0] = 01b
CAN halt
CAN CAN
CAN CAN
CAN CAN
CAN CAN
1 4
CAN CAN
CAN CAN
CAN
CAN halt 2 3
CAN
CAN halt 1 4
BOM[1:0] 00b
Halt BOM[1:0] 01b CAN Halt CAN halt
BOM[1:0] 10b CAN Halt CAN halt
BOM[1:0] 11b CAN Halt CAN halt
1.
2. 3. 4.
CAN CAN
CAN EIFR BLIF
CAN halt CAN CAN CAN halt
CAN CAN halt CAN CAN CAN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1084 of 1551
RA4W1
31. CANController Area Network
31.3.3 CAN
CAN CAN MCU CAN CAN
CTLR.SLPM 1 CAN CAN STR.SLPST 1 SLPST 1 SLPM CAN CAN
SLPM CAN CAN halt CAN SLPM
SLPM 0 CAN CAN CAN CAN
31.3.4 CAN
CAN CAN
CTLR.CANM[1:0] 00b CAN CAN RSTST HLTST 0 RSTST HLTST 0 CANM[1:0] CAN 11 CAN
CAN CAN
CAN
CAN CAN CAN 3
CAN
CAN 0TCR.TSTM[1:0] = 10b 1TCR.TSTM[1:0] = 11bCAN
31.10 CAN
31.10
STR.TRMST = 1 STR.RECST = 0
STR.TRMST = 0 STR.RECST = 0
SOF
STR.TRMST = 0 STR.RECST = 1
CAN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1085 of 1551
RA4W1
31. CANController Area Network
31.3.5 CAN
CAN CAN
CAN CAN STREIFRRECRTECRTSR CAN
(1) CTLR.BOM[1:0] = 00b
CAN CAN EIFR.BORIF 1
(2) CTLR.RBOC = 1
CAN RBOC 1 11 CAN BORIF 1
(3) CTLR.BOM[1:0] = 01b CAN halt
CAN CAN halt BORIF 1
(4) CTLR.BOM[1:0] = 10b CAN halt
CAN CAN halt BORIF 1
(5) CTLR.BOM[1:0] = 11b CAN halt CTLR.CANM[1:0] = 10bCAN halt
CAN CANM[1:0] 10bCAN halt CAN halt EIFR.BORIF 1
CANM[1:0] 10b 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1086 of 1551
RA4W1
31. CANController Area Network
31.4
31.4.1
CAN CAN CAN BCR CCLKS BRP[9:0]
31.11 CAN
(PCLKB)1
EXTAL
CCLKS1
0
fCAN
1
1/(P + 1)
P = 01023
fCANCLK
CCLKS BCR
fCAN CAN
P
BCR.BRPP = 01023
fCANCLKCANfCANCLK = fCAN/(P + 1)
1. 9. CCLKS 0 CAN PLL
31.11
CAN
31.4.2
31.12 3
31.12
SS
TSEG1
TSEG2
= 8 Tq25 Tq SS = 1 Tq TSEG1 = 4 Tq16 Tq TSEG2 = 2 Tq8 Tq SJW = 1 Tq4 Tq
TSEG1TSEG2 TSEG1TSEG2SJW
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1087 of 1551
RA4W1
31. CANController Area Network
31.4.3
fCANCAN 1 Tq
[bps]
=
fCAN 1� 1 Tq
=
fCANCLK 1 Tq
1. = P + 1P = 0 1023 P BCR.BRP[9:0] 31.9
31.9
1Mbps
fCAN = 32MHz
Tq
500kbps
250kbps
125kbps
83.3kbps
33.3kbps
8Tq 16Tq
8Tq 16Tq
8Tq 16Tq
8Tq 16Tq
8Tq 16Tq
8Tq 10Tq 16Tq 20Tq
P + 1
4 2
8 4
16 8
32 16
48 24
120 96 60 48
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1088 of 1551
RA4W1
31. CANController Area Network
31.5
31.13 32 MBj_IDMBj_DLMBj_DmMBj_TS
b7 IDE RTR
b0 SID10 SID9 SID8 SID7 SID6
CAN0 4005 0200h + 16 j + 0
SID5 SID4 SID3 SID2 SID1 SID0 EID17 EID16 4005 0200h + 16 j + 1
EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8 4005 0200h + 16 j + 2
EID7 EID6 EID5 EID4 EID3 EID2 EID1 EID0 4005 0200h + 16 j + 3
4005 0200h + 16 j + 4
DLC3 DLC2 DLC1 DLC0 DATA0 DATA1
4005 0200h + 16 j + 5 4005 0200h + 16 j + 6 4005 0200h + 16 j + 7
DATA7 TSH TSL
4005 0200h + 16 j + 13 4005 0200h + 16 j + 14 4005 0200h + 16 j + 15
31.13
j = 0 31
31.14 8 MKRk
31.14
b7
b0 CAN0
SID10 SID9 SID8 SID7 SID6 4005 0400h + 4 � k + 0
SID5 SID4 SID3 SID2 SID1 SID0 EID17 EID16 4005 0400h + 4 � k + 1
EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8 4005 0400h + 4 � k + 2
EID7 EID6 EID5 EID4 EID3 EID2 EID1 EID0 4005 0400h + 4 � k + 3
MKRk
MKRk k = 0 7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1089 of 1551
RA4W1
31. CANController Area Network
31.15 2 FIFO ID FIDCR0 FIDCR1
31.15
b7 IDE RTR
b0 SID10 SID9 SID8 SID7 SID6
CAN0 4005 0420h + 4 �n + 0
SID5 SID4 SID3 SID2 SID1 SID0 EID17 EID16 4005 0420h + 4 �n + 1
EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8 4005 0420h + 4 �n + 2
EID7 EID6 EID5 EID4 EID3 EID2 EID1 EID0 4005 0420h + 4 � n + 3
FIDCRn
FIDCRn n = 0, 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1090 of 1551
RA4W1
31. CANController Area Network
31.6
ID
MKRk ID 29 ID
MKR0 0 3
MKR1 4 7
MKR2 8 11
MKR3 12 15
MKR4 16 19
MKR5 20 23
MKR6 24 27FIFO FIFO 28 31
MKR7 28 31FIFO FIFO 28 31
MKIVLR
MBj_ID IDE CTLR.IDFM[1:0] 10b ID
MBj_ID RTR
FIFO 0 23 MKR0 MKR5 FIFO 28 31 2 MKR6 MKR7 FIFO FIDCR0 FIDCR1 2 ID FIFO 28 31 EID[17:0]SID[10:0]RTRIDE 2 FIFO 2 ID MKIVLR FIFO
FIDCR0 FIDCR1 IDE ID FIDCR0 FIDCR1 RTR 2 ID FIFO ID ID
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1091 of 1551
RA4W1
31. CANController Area Network
31.16 31.17
MKR0 MKR1 MKR2 MKR3
MKR4 MKR5 MKR6 MKR7
0
3 4
7 8
11 12
15 16
19 20
23 24
27 28
31
FIFO
MKR0
MKR1
MKR2
MKR3
MKR4
MKR5 MKR6 FIDCR0 MKR7 FIDCR1
0
3 4
7 8
11 12
15 16
19 20
23 24
27 28
31
FIFO FIFO
31.16
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1092 of 1551
RA4W1
31. CANController Area Network
MBj_ID (j = 031) ID1
MKIVLR2
ID
MKRk (k = 07)
0ID 1ID
0
1ID
1. FIFOFIDCR0, FIDCR1 2. FIFO
31.17
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1093 of 1551
RA4W1
31.7
31.10 CAN
31. CANController Area Network
31.10
CAN
MCTL_TXj.TRMREQ
MCTL_RXj.TRMREQ
0
0
MCTL_TXj.RECREQ
MCTL_RXj.RECREQ
0
0
MCTL_TXj.ONESHOT
MCTL_RX.ONESHOT
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
j = 0 31
1. MCTL_RXj 00h
2.
3. CAN ID CAN CAN ACK
MCTL_TXj 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1094 of 1551
RA4W1
31. CANController Area Network
31.7.1
31.18
MCTL_RXj j = 0 31 2 CAN CAN
CAN
SOF
j
CRC
ACK EOF
IFS SOF
j
CRC
ACK EOF
IFS
MCTL_RXj. RECREQ
MCTL_RXj. INVALDATA
MCTL_RXj. NEWDATA
MCTL_RXj. MSGLOST
CAN0
STR.RECST
CAN0
j = 031
31.18
1. CAN SOF CAN STR.RECST 1
2. CRC
3. MCTL_RXj.NEWDATA 1 MCTL_RXj.INVALDATA 1 INVALDATA 0
4. MIER 1 INVALDATA 0 CAN0
5. NEWDATA 0
6. MCTL_RXj.NEWDATA 1 CAN MCTL_RXj.MSGLOST 1 CAN0 4.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1095 of 1551
RA4W1
31. CANController Area Network
31.19 MCTL_RXj j = 0 31 2 CAN CAN 2
j
j
SOF
CAN
CRC
ACK EOF
IFS SOF
CRC
ACK EOF
IFS
MCTL_RXj. RECREQ
MCTL_RXj. INVALDATA
MCTL_RXj. NEWDATA
MCTL_RXj. MSGLOST
CAN0
STR.RECST
CAN0
j = 031
31.19
1. 5.
6. MCTL_RXj.NEWDATA 0 CAN MCTL_RXj.MSGLOST 1 EIER 1 CAN0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1096 of 1551
RA4W1
31. CANController Area Network
31.7.2
31.20
j
SOF CAN
MCTL_TXj. TRMREQ
MCTL_TXj. TRMACTIVE
MCTL_TXj. SENTDATA
j
CRC
CRC
EOF
IFS SOF
MCTL_TXk. TRMREQ
MCTL_TXk. TRMACTIVE
MCTL_TXk. SENTDATA
CAN0
STR.TRMST
k
CRC
CRC EOF
IFS
k
j, k = 031, j k
31.20
1. MCTL_TXj.TRMREQ j = 0 31 1
MCTL_TXj.TRMACTIVE 1
STR.TRMST 1CAN 1
2. TRMREQ CRC
3. MCTL_TXj.SENTDATA 1 TRMACTIVE 0 MIER 1CAN0
4. SENTDATA TRMREQ 0 SENTDATA TRMREQ 0 TRMREQ 1
1.
CAN TRMACTIVE 0 CRC CRC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1097 of 1551
RA4W1
31. CANController Area Network
31.8
CAN 0 31 CAN0 CAN0_RXM 0 31 CAN0 CAN0_TXM CAN0 FIFO CAN0_RXF CAN0 FIFO CAN0_TXF CAN0 CAN0_ERS CAN0 8 EIFR 31.11 CAN
31.11
CAN
CAN0
CAN0_ERS
CAN0_RXF CAN0_TXF CAN0_RXM
FIFO MIER_FIFO.MB29 = 0 FIFO MIER_FIFO.MB29 = 1 FIFO MIER_FIFO.MB25 = 0 FIFO MIER_FIFO.MB25 = 1 0 31
CAN0_TXM
0 31
EIFR.BLIF EIFR.OLIF EIFR.ORIF EIFR.BORIF EIFR.BOEIF EIFR.EPIF EIFR.EWIF EIFR.BEIF RFCR.RFUST[2:0]
TFCR.TFUST[2:0]
MCTL_RX0.NEWDATA MCTL_RX31.NEWDATA MCTL_TX0.SENTDATA MCTL_TX31.SENTDATA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1098 of 1551
RA4W1
31. CANController Area Network
31.9
31.9.1
BMSTPCRBCAN CAN 11.
31.9.2
CCLKS 1 CAN
fPCLKB fCANMCLK
CCLKS 0 CAN PLL
CAN PCLKA PCLKB 21
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1099 of 1551
RA4W1
32. SPI
32. SPI
32.1
MCU 2 SPISPI 32.1 SPI 32.1
PCLK PCLKA n A B i 0 1 i 0 3 SPI mSPCMDm m 0 7
32.1
SPI (1/2)
SPI
SSL
2
MOSIMaster Out/Slave InMISOMaster In/Slave OutSSLSlave SelectRSPCKSPI ClockSPI43
RSPCK RSPCK
MSB LSB 8910111213141516202432 SPI0 4 1 32 128
SPI1 1 32
PCLK RSPCK 2 4096 PCLK 6RSPCK RSPCK PCLK 6 High PCLK 3 Low PCLK 3
SPI0 128 SPI1 32
1
1 4 SSL SSLn0 SSLn3 SSLn0 SSLn3
SSLn0 SSLn1 SSLn3
SSLn0 SSLn1 SSLn3 SSL RSPCKRSPCK
1 8RSPCK 1RSPCK RSPCK SSLSSL
1 8RSPCK 1RSPCK SSL
1 8RSPCK 1RSPCK SSL
8 SPI0
SPI0SSLRSPCK MSB/LSB RSPCKSSL
SPI1SSLRSPCK MSB/LSB RSPCKSSL
SSL MOSI RSPCK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1100 of 1551
RA4W1
32. SPI
32.1
SPI (2/2)
SPI SPI SPI
SPI
SPI
1.
RSPCK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1101 of 1551
RA4W1
32. SPI
SPRX
SPTX
SPCR SSLP SPPCR SPSR SPDR/SPDR_HA SPSCR1 SPSSR1 SPDCR SPCKD SSLND SPND SPCR2 SPCMD
SPBR
PCLK
MOSIn
MISOn
SSLn0 SSLn1SSLn3
RSPCKn
2
2
2
SPIn_SPTI SPIn_SPRI SPIn_SPII SPIn_SPEI SPIn_SPTEND
SPCR
SPI
SPCR2
SPI 2
SSLP
SPI
SPPCR
SPI
SPSR
SPI
SPDR/SPDR_HA SPI
SPSCR 1 SPI
SPSSR 1 SPI
SPDCR
SPI
SPCKD
SPI
SSLND SPI SPND SPI SPCMD SPI SPI00 7 8 SPI10 1 SPBR SPI SPTX SPI SPRX SPI SPIn_SPTI SPI SPIn_SPRISPI SPIn_SPII SPI SPIn_SPEISPI SPIn_SPTENDSPI
1.
SPI0
32.1
SPI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1102 of 1551
RA4W1
32. SPI
32.2 SPI SSLn0 SPI SSLn0 SPI RSPCKnMOSIn MISOn SSLn0 SPI 32.3.2SPI
32.2
SPI
SPI0
SPI1
RSPCKA MOSIA MISOA SSLA0 SSLA1 SSLA2 SSLA3 RSPCKB MOSIB MISOB SSLB0 SSLB1 SSLB3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1103 of 1551
RA4W1
32. SPI
32.2 32.2.1 SPI SPCR
SPI0.SPCR 4007 2000h, SPI1.SPCR 4007 2100h
b7 SPRIE 0
b6 SPE
0
b5
b4
b3
b2
b1
b0
SPTIE
SPEIE
MSTR
MODF EN
TXMD
SPMS
0
0
0
0
0
0
R/W
b0
SPMS
SPI
0SPI4
R/W
13
b1
TXMD
0
R/W
1
b2
MODFEN
0
R/W
1
b3
MSTR
SPI
0
R/W
1
b4
SPEIE
SPI
0SPI
R/W
1SPI
b5
SPTIE
0
R/W
1
b6
SPE
SPI
0SPI
R/W
1SPI
b7
SPRIE SPI
0SPI
R/W
1SPI
SPCR.SPE 1 SPCR.MSTR SPCR.MODFEN SPCR.TXMD
SPMS SPI
SPI 4 3
SSLn0 SSLn3 RSPCKn MOSIn MISOn 3 SPCR.MSTR = 1 SPCMDm.CPHA 0 1 SPCR.MSTR = 0 CPHA 1 SPCR.MSTR = 0 CPHA 0
TXMD
1 SPI 32.3.6
MODFEN
32.3.8SPI MODFEN MSTR SSLn0 SSLn3 32.3.2SPI
MSTR SPI
SPI SPI MSTR RSPCKnMOSInMISOn SSLn0 SSLn3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1104 of 1551
RA4W1
32. SPI
SPEIE SPI SPI SPI SPSR.MODF 1
SPI SPSR.OVRF 1
SPI SPSR.PERF 1
32.3.8
SPTIE SPI
SPE SPTIE 1 SPTIE 1 SPE 1 SPI SPE 0 SPTIE 1
SPE SPI SPI SPSR.MODF 1 SPE 1
32.3.8 SPE 0 SPI
32.3.9SPI SPE 0 1 1 0
SPRIE SPI SPI
32.2.2 SPI SSLP
SPI0.SSLP 4007 2001h, SPI1.SSLP 4007 2101h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
-- SSL3P SSL2P SSL1P SSL0P
0
0
0
0
0
0
0
0
b0
SSL0P
SSL0
b1
SSL1P
SSL1
b2
SSL2P 1
SSL2
b3
SSL3P
SSL3
b7-b4
--
1. SPI1
R/W
0SSL0 Low
R/W
1SSL0 High
0SSL1 Low
R/W
1SSL1 High
0SSL2 Low
R/W
1SSL2 High
0SSL3 Low
R/W
1SSL3 High
0 0
R/W
SPCR.SPE 1 SSLP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1105 of 1551
RA4W1
32. SPI
32.2.3 SPI SPPCR
SPI0.SPPCR 4007 2002h, SPI1.SPPCR 4007 2102h
b7 -- 0
b6
b5
b4
b3
-- MOIFE MOIFV --
0
0
0
0
b2
b1
b0
-- SPLP2 SPLP
0
0
0
R/W
b0
SPLP
SPI
0
R/W
1
b1
SPLP2 SPI 2
0
R/W
1
b3-b2
--
0 0
R/W
b4
MOIFV MOSI
0MOSI MOSInLow
R/W
1MOSI MOSInHigh
b5
MOIFE MOSI 0MOSI
R/W
1MOSI MOIFV
b7-b6
--
0 0
R/W
SPCR.SPE 1 SPPCR
SPLP SPI
SPI
SPLP 1 SPCR.MSTR 1 SPI MISOn SPCR.MSTR 0 MOSIn SPI
SPLP2 SPI 2
SPI
SPLP2 1 SPCR.MSTR 1 SPI MISOn SPCR.MSTR 0 MOSIn SPI
MOIFV MOSI
MOIFE 1 SPI0 SPI1 SSL SPI0 SSL MOSIn
MOIFE MOSI
SPI SPI0 SPI1 SSL SPI0 SSL MOSIn MOIFE 0 SPI SSL MOSIn MOIFE 1 SPI MOIFV MOSIn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1106 of 1551
RA4W1
32. SPI
32.2.4 SPI SPSR
SPI0.SPSR 4007 2003h, SPI1.SPSR 4007 2103h
b7 SPRF 0
b6
b5
b4
b3
b2
b1
b0
-- SPTEF UDRF PERF MODF IDLNF OVRF
0
1
0
0
0
0
0
b0 b1 b2 b3 b4
b5 b6 b7
OVRF IDLNF MODF PERF UDRF
SPTEF -- SPRF
SPI
SPI SPI
0 1
0SPI 1SPI
0 1
0 1
0MODF = 1 1MODF = 1 MODF 0
0 1
0 0
0SPDR/SPDR_HA 1SPDR/SPDR_HA
1. 2. 3.
1 0 MODF UDRF 1
R/W R/(W)
1
R
R/(W)
1
R/(W)
1
R/W
1 2
R/(W
3
R/W
R/(W
3
OVRF
SPCR.MSTR = 1 RSPCK SPCR1.SCKASE = 1 1 32.3.8.1
1
SPCR.TXMD 0
0
OVRF 1 SPSR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1107 of 1551
RA4W1
32. SPI
IDLNF SPI SPI 1
0 1. 2.
SPCR.SPE 1SPI
0
SPI0 1. 2.3. 4. SPI1 1. 2. 4.
1. SPCR.SPE 0SPI 2. SPTX 3. SPSSR.SPCP[2:0] 000b 4. SPI
SPCR.SPE 0SPI
MODF UDRF
1
SPCR.MSTR 1 SPCR.MODFEN 1 SSLni
1. 2.
1. SPCR.MSTR 0 SPCR.MODFEN 1 RSPCK SSLni
2. SPCR.MSTR 0SPCR.SPE 1
SSLni SSLP.SSLiP SSLi
0 1 SPSR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1108 of 1551
RA4W1
32. SPI
PERF
1 SPCR.TXMD 0 SPCR2.SPPE 1
0 PERF 1 SPSR
UDRF
1 SPCR.MSTR 0SPCR.SPE 1
0 UDRF 1 SPSR
SPTEF SPI SPI SPDR/SPDR_HA 1 1. 2.
1. SPI SPCR.SPE 0 2. 0 SPI0SPDR/SPDR_HA SPI SPDCR
SPFC[1:0]
SPI1SPDR/SPDR_HA
SPTEF 1 SPDR/SPDR_HA SPTEF 0 SPDR/SPDR_HA
SPRF SPI SPI SPDR/SPDR_HA 1 SPI0SPCR.TXMD 0 SPRF 0 SPDCR.SPFC[1:0] SPDR/SPDR_HA OVRF 1 0 1
SPI1SPCR.TXMD 0 SPRF 0 SPDR/ SPDR_HA OVRF 1 0 1
0 SPDR/SPDR_HA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1109 of 1551
RA4W1
32. SPI
32.2.5 SPI SPDR/SPDR_HA
SPI0.SPDR 4007 2004h, SPI1.SPDR 4007 2104h b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SPI0.SPDR_HA 4007 2004h, SPI1.SPDR_HA 4007 2104h b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SPDR/SPDR_HA SPI
SPLW = 1SPDR SPLW = 0SPDR_HA
SPTXSPRXSPDR/SPDR_HA 32.2 32.3 SPI0 SPI1 SPDR/SPDR_HA
SPDR/SPDR_HA
SPI
1
SPTX0 SPTX1 SPTX2 SPTX3
1
1
SPRX0 SPRX1 SPRX2 SPRX3
1
1.
32.2
SPDR/SPDR_HA SPI0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1110 of 1551
RA4W1
SPDR/SPDR_HA
SPI SPTX0
SPRX0
32. SPI
32.3
SPDR/SPDR_HA SPI1
SPI0 4 SPI1 1 SPI0 SPDCR SPDCRSPDR/ SPDR_HA 1
SPDR/SPDR_HA SPTXnSPI0 n = 0 3SPI1 n = 0
32 SPRXnSPI0 n = 0 3SPI1 n = 0 SPTXnSPI0 n = 0 3SPI1 n = 0 9 SPRXn[8:0] SPRXn[31:9] SPTXn[31:9]
(1)
SPDR/SPDR_HA 32 SPI0 4 SPI1 1 32 32 SPDR/SPDR_HA 4 SPDR/SPDR_HA SPDCR SPI SPLW
LSB LSB
SPDR/SPDR_HA
(a)
SPDR/SPDR_HA SPTXnSPI0 n = 0 3SPI1 n = 0SPDR/SPDR_HA SPDCR.SPRDTD
SPDR/SPDR_HA
32.4 32.5 SPDR/SPDR_HA SPI0 SPI1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1111 of 1551
RA4W1
32. SPI
32.4
SPDR/SPDR_HA
SPTX0 SPTX1 SPTX2 SPTX3 + SPFC[1:0]
SPDR/SPDR_HA SPI0
SPDR/SPDR_HA
SPTX0
32.5
SPDR/SPDR_HA SPI1
SPI0 SPDCR SPFC[1:0]
SPFC[1:0] SPTX0 SPTX3 SPFC[1:0] 00b SPTX0 SPTX0 SPTX0 SPFC[1:0] 01b SPTX0 SPTX1 SPTX0 SPTX1 SPFC[1:0] 10b SPTX0 SPTX1 SPTX2 SPTX0 SPTX1 SPFC[1:0] 11b SPTX0 SPTX1 SPTX2 SPTX3 SPTX0 SPTX1
0 SPI SPCR SPI SPE 1 SPTX0
SPTXnSPI0 n = 0 3SPI1 n = 0 SPSR.SPTEF = 1SPDCR SPFC[1:0] SPSR.SPTEF = 0SPTXn
(b)
SPDR/SPDR_HA SPRXn SPTXnSPI0 n = 0 3SPI1 n = 0SPDCR SPI
SPRDTD
SPDR/SPDR_HA
32.6 32.7 SPDR/SPDR_HA SPI0 SPI1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1112 of 1551
RA4W1 SPI0
32. SPI
SPDR/SPDR_HA
0
1 SPRDTD
SPRX0 SPRX1 SPRX2 SPRX3
+ SPFC[1:0]
SPTX0 SPTX1 SPTX2 SPTX3
+ SPFC[1:0]
32.6
SPDR/SPDR_HA SPI0
1 SPI SPCR SPI SPE 1 SPRX0
SPDR/SPDR_HA SPDR/SPDR_HA SPDCR.SPFC[1:0] 0
SPI1
0
SPRX0
1
SPTX0
SPDR/SPDR_HA
32.7
SPRDTD
SPDR/SPDR_HA SPI1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1113 of 1551
RA4W1
32. SPI
SPDR/SPDR_HA SPDR/SPDR_HA SPTEF = 0 0
32.2.6 SPI SPSCR
SPI0.SPSCR 4007 2008h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
SPSLN[2:0]
0
0
0
0
0
0
0
0
b2-b0
SPSLN[2:0]
SPI
b7-b3
--
b2 b0 SPCMD07
0 0 010 0 ... 0 0 120 1 0 ... 0 1 030 1 2 0 ... 0 1 140 1 2 3 0 ... 1 0 050 1 2 3 4 0 ... 1 0 160 1 2 3 4 5 0 ... 1 1 070 1 2 3 4 5 6 0 ... 1 1 180 1 2 3 4 5 6 7 0 ... SPCMD0 SPCMD7 SPSLN[2:0] SPISPCMD0 SPCMD7 SPISPCMD0
0 0
R/W R/W
R/W
SPSCR SPI SPCR.MSTR SPCR.SPE 1 SPSCR.SPSLN[2:0] SPSR.IDLNF 0
SPSLN[2:0] SPI
SPI SPI SPSLN[2:0] SPCMD0 SPCMD7 SPCMD0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1114 of 1551
RA4W1
32. SPI
32.2.7 SPI SPSSR
SPI0.SPSSR 4007 2009h
b7
b6
b5
b4
b3
b2
b1
b0
--
SPECM[2:0]
--
SPCP[2:0]
0
0
0
0
0
0
0
0
R/W
b2-b0
SPCP[2:0] SPI
b2
b0
R
0 0 0SPCMD0
0 0 1SPCMD1
0 1 0SPCMD2
0 1 1SPCMD3
1 0 0SPCMD4
1 0 1SPCMD5
1 1 0SPCMD6
1 1 1SPCMD7
b3
--
0
R
b6-b4
SPECM[2:0] SPI
b6
b4
R
0 0 0SPCMD0
0 0 1SPCMD1
0 1 0SPCMD2
0 1 1SPCMD3
1 0 0SPCMD4
1 0 1SPCMD5
1 1 0SPCMD6
1 1 1SPCMD7
b7
--
0
R
SPSSR SPI SPSSR
SPCP[2:0] SPI
SPI SPCMDm SPI 32.3.10.1
SPECM[2:0] SPI
SPI SPCP[2:0] SPCMDm SPI SPECM[2:0] SPSR.OVRF SPSR.MODF 0 SPECM[2:0]
SPI 32.3.8SPI 32.3.10.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1115 of 1551
RA4W1
32. SPI
32.2.8 SPI SPBR
SPI0.SPBR 4007 200Ah, SPI1.SPBR 4007 210Ah
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
1
1
1
1
SPBR SPCR.MSTR SPCR.SPE 1 SPBR
SPI SPBR SPCMDm.BRDV[1:0]
SPI SPCMDmSPI0 SPCMD0 SPCMD7SPI1 SPCMD0 BRDV[1:0]
f (PCLK) Bit rate = 2 � (n + 1) � 2N
n SPBR 0, 1, 2, ......, 255N BRDV[1:0] 0, 1, 2, 3
SPBR BRDV[1:0] 32.3
32.3
SPBRBRDV[1:0]
SPBRn
BRDV[1:0]N
0
0
1
0
2
0
3
0
4
0
5
0
5
1
5
2
5
3
255
3
2 4 6 8 10 12 24 48 96 4096
PCLK = 32MHz
PCLK = 48MHz
16.0Mbps
--
8.00Mbps
12.0Mbps
5.33Mbps
8.00Mbps
4.00Mbps
6.00Mbps
3.20Mbps
4.80Mbps
2.67Mbps
4.00Mbps
1.33Mbps
2.00Mbps
667kbps
1.00Mbps
333kbps
500kbps
7.81kbps
11.7kbps
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1116 of 1551
RA4W1
32. SPI
32.2.9 SPI SPDCR
SPI0.SPDCR 4007 200Bh
b7
b6
b5
b4
b3
b2
b1
b0
(SPI0)
--
--
SPLW
SPRDT D
--
--
SPFC[1:0]
0
0
0
0
0
0
0
0
SPI1.SPDCR 4007 210Bh
b7
b6
b5
b4
b3
b2
b1
b0
(SPI1)
--
--
SPLW
SPRDT D
--
--
--
--
0
0
0
0
0
0
0
0
b1-b0
SPFC[1:0]
b3-b2 b4
--
-- SPRDTD
SPI
b5 b7-b6
SPLW --
SPI
R/W
� SPI0
R/W
b1 b0
0 01
0 12
1 03
1 14
� SPI1
R/W
00
00
R/W
0SPDR/SPDR_HA
R/W
1SPDR/SPDR_HA
0SPDR_HA
R/W
1SPDR
00
R/W
1 SPI0 4 SPI1 1 SPI0 SPCMDm.SPB[3:0] SPSCR.SPSLN[2:0] SPDCR.SPFC[1:0] SPI1 SPCMD0.SPB[3:0]
SPCR.SPE 1 SPDCR.SPFC[1:0] SPSR.IDLNF 0
SPFC[1:0]
1 SPDR/SPDR_HA 1 4
SPFC[1:0] SPDR/SPDR_HA SPI SPSR.SPTEF 0 SPFC[1:0] SPI SPSR.SPTEF = 1
SPFC[1:0] SPI SPSR.SPRF 1
SPI1 SPFC[1:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1117 of 1551
RA4W1
32. SPI
32.4
1-1 1-2 1-3 1-4 2-1 2-2 3 4 5 6 7 8
SPSLN[2:0]SPFC[1:0]
SPSLN[2:0] SPFC[1:0]
000b
00b
1
1
1
000b
01b
2
2
000b
10b
3
3
000b
11b
4
4
001b
01b
2
2
001b
11b
4
4
010b
10b
3
3
011b
11b
4
4
100b
00b
5
1
101b
00b
6
1
110b
00b
7
1
111b
00b
8
1
SPRDTD SPI
SPDR/SPDR_HA
SPDR/SPDR_HA SPI0 SPFC[1:0] SPSR.SPTEF = 1SPI1 SPSR.SPTEF = 1
32.2.5SPI SPDR/SPDR_HA
SPLW SPI
SPDR SPLW 0 SPDR_HA SPLW 1 SPDR SPLW 0 SPI SPCMDm.SPB[3:0]8 16 202432
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1118 of 1551
RA4W1
32. SPI
32.2.10 SPI SPCKD
SPI0.SPCKD 4007 200Ch, SPI1.SPCKD 4007 210Ch
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
SCKDL[2:0]
0
0
0
0
0
0
0
0
R/W
b2-b0
SCKDL[2:0] RSPCK
b2
b0
R/W
0 0 01RSPCK
0 0 12RSPCK
0 1 03RSPCK
0 1 14RSPCK
1 0 05RSPCK
1 0 16RSPCK
1 1 07RSPCK
1 1 18RSPCK
b7-b3
--
0 0
R/W
SPCKD SPCMDm.SCKDEN 1 SSLni RSPCK RSPCK SPCR.MSTR SPCR.SPE 1 SPCKD
SCKDL[2:0] RSPCK
SPCMDm.SCKDEN 1 RSPCK SPI SCKDL[2:0] 000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1119 of 1551
RA4W1
32. SPI
32.2.11 SPI SSLND
SPI0.SSLND 4007 200Dh, SPI1.SSLND 4007 210Dh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
SLNDL[2:0]
0
0
0
0
0
0
0
0
R/W
b2-b0
SLNDL[2:0] SSL
b2
b0
0 0 01RSPCK
R/W
0 0 12RSPCK
0 1 03RSPCK
0 1 14RSPCK
1 0 05RSPCK
1 0 16RSPCK
1 1 07RSPCK
1 1 18RSPCK
b7-b3
--
0 0
R/W
SSLND SPI RSPCK SSLni SSL SPCR.MSTR SPCR.SPE 1 SSLND
SLNDL[2:0] SSL
SPI SSL SPI SLNDL[2:0] 000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1120 of 1551
RA4W1
32. SPI
32.2.12 SPI SPND
SPI0.SPND 4007 200Eh, SPI1.SPND 4007 210Eh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
SPNDL[2:0]
0
0
0
0
0
0
0
0
R/W
b2-b0
SPNDL[2:0] SPI
b2
b0
R/W
0 0 01RSPCK + 2PCLK
0 0 12RSPCK + 2PCLK
0 1 03RSPCK + 2PCLK
0 1 14RSPCK + 2PCLK
1 0 05RSPCK + 2PCLK
1 0 16RSPCK + 2PCLK
1 1 07RSPCK + 2PCLK
1 1 18RSPCK + 2PCLK
b7-b3
--
0 0
R/W
SPND SPCMDm.SPNDEN 1 SSLni SPCR.MSTR SPCR.SPE 1 SPND
SPNDL[2:0] SPI
SPCMDm.SPNDEN 1 SPI SPNDL[2:0] 000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1121 of 1551
RA4W1
32. SPI
32.2.13 SPI 2SPCR2
SPI0.SPCR2 4007 200Fh, SPI1.SPCR2 4007 210Fh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
SCKAS E
PTE
SPIIE SPOE SPPE
0
0
0
0
0
0
0
0
b0
SPPE
b1 b2 b3 b4 b7-b5
SPOE
SPIIE
SPI
PTE
SCKASE RSPCK
--
R/W
0 R/W
1SPCR.TXMD = 0
SPCR.TXMD = 1
0
R/W
1
0
R/W
1
0
R/W
1
0RSPCK
R/W
1RSPCK
0 0
R/W
SPCR.SPE 1 SPCR2 SPPESPOE SCKASE
SPPE
SPCR.TXMD 0 SPCR2.SPPE 1 SPCR.TXMD 1 SPCR2.SPPE 1
SPOE
1 1
SPOE SPPE 1
SPIIE SPI
SPI SPSR.IDLNF 0 SPI
PTE
SCKASE RSPCK
RSPCK RSPCK 32.3.8.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1122 of 1551
RA4W1
32. SPI
32.2.14 SPI SPCMDmSPI0 m = 0 7SPI1 m = 0)
SPI0.SPCMD0 4007 2010h, SPI0.SPCMD1 4007 2012h, SPI0.SPCMD2 4007 2014h, SPI0.SPCMD3 4007 2016h, SPI0.SPCMD4 4007 2018h, SPI0.SPCMD5 4007 201Ah, SPI0.SPCMD6 4007 201Ch, SPI0.SPCMD7 4007 201Eh
b15 b14 b13 b12 b11
(SPI0)
SCKDE SLNDE SPNDE
N
N
N
LSBF
0
0
0
0
0
b10 b9
SPB[3:0]
1
1
b8
b7
b6
b5
b4
SSLKP
SSLA[2:0]
1
0
0
0
0
b3
b2
BRDV[1:0]
1
1
b1
b0
CPOL CPHA
0
1
SPI1.SPCMD0 4007 2110h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
(SPI1)
SCKDE SLNDE SPNDE
N
N
N
LSBF
SPB[3:0]
--
SSLA[2:0]
BRDV[1:0] CPOL CPHA
0
0
0
0
0
1
1
1
0
0
0
0
1
1
0
1
b0
CPHA
RSPCK
b1 b3-b2
CPOL
RSPCK
BRDV[1:0]
b6-b4
SSLA[2:0] SSL
1
b7
SSLKP
SSL
b11-b8
-- SPB[3:0]
SPI
b12
LSBF
SPI LSB
b13
SPNDEN SPI
R/W
0 R/W
1
0RSPCK Low
R/W
1RSPCK High
b3 b2
0 0
R/W
0 12
1 04
1 18
b6
b4
0 0 0SSL0
R/W
0 0 1SSL1
0 1 0SSL2
0 1 1SSL3
1 x x
x: Don't care
� SPI0
R/W
0 SSL 1 SSL
� SPI1
R/W
0 0
b11
b8
0100 01118
R/W
1 0 0 09
1 0 0 110
1 0 1 011
1 0 1 112
1 1 0 013
1 1 0 114
1 1 1 015
1 1 1 116
0 0 0 020
0 0 0 124
0010001132
0MSB
R/W
1LSB
01RSPCK + 2PCLK
R/W
1SPI SPND
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1123 of 1551
RA4W1
32. SPI
b14
SLNDEN SSL
b15
SCKDEN RSPCK
1. SPI1
R/W
0SSL 1RSPCK
R/W
1SSL SPI
SSLND
0RSPCK 1RSPCK
R/W
1RSPCK SPISPCKD
SPI0
SPCMDm SPI SPI0 8 SPI SPCMD0 SPCMD7SPCMD0 SPI SPI SPSCR.SPSLN[2:0] SPCMDm SPCMDm
SPCMDm SPSR.SPTEF = 1 SPCMDm SPI SPCMDm SPSSR.SPCP[2:0]
SPCR.MSTR 0 SPCR.SPE 1 SPCMDm
SPI1
SPI1 1 SPI SPCMDSPI SPCMD SPCMD0 SPI SPCR.SPE 1 SPCMD
CPHA RSPCK
SPI RSPCK SPI RSPCK
CPOL RSPCK
SPI RSPCK SPI RSPCK
BRDV[1:0]
BRDV[1:0] SPBR 32.2.8SPI SPBRSPBR BRDV[1:0] 2 4 8 SPI0 SPCMDm BRDV[1:0]
SSLA[2:0] SSL
SPI SSLni
SSLni SSLP SSLA[2:0] 000b SSLn0 SSL
SPI SSLA[2:0] 000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1124 of 1551
RA4W1
32. SPI
SSLKP SSL
SPI SSL SSL SSLni
SSLKP 1 32.3.10.1 (4)SPI SSLKP 0
SPI1 SSLKP
SPB[3:0] SPI
SPI
SPLW 0 SPI SPCMDm.SPB[3:0]8 16
LSBF SPI LSB
SPI MSB LSB
SPNDEN SPI
SPI SSLni SSLni SPNDEN 0 SPI 1RSPCK + 2PCLK SPNDEN 1 SPI SPND
SPI SPNDEN 0
SLNDEN SSL
SPI RSPCK SSLni SSL SLNDEN 0 SPI SSL 1RSPCK SLNDEN 1 SPI SSLND SSL SSL
SPI SLNDEN 0
SCKDEN RSPCK
SPI SSLni RSPCK SPI SCKDEN 0 SPI RSPCK 1RSPCK SCKDEN 1 SPI SPCKD RSPCK RSPCK
SPI SCKDEN 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1125 of 1551
RA4W1
32. SPI
32.3
32.3.1 SPI
SPI SPI SPI SPI
SPI SPCR.MSTRSPCR.MODFENSPCR.SPMS 32.5 SPI SPCR
32.5
SPCRSPI
MSTR MODFEN SPMS RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn3 SSL
RSPCK SSL
SPI
0
SPI
1
SPI
1
0
1
0 1
0
1
0
0
0
0
0
1
1
Hi-Z Hi-Z 1 PCLK/6 RSPCKn
PCLK/2
2
2
Hi-Z Hi-Z
Hi-Z
PCLK/2
2 2 MSB/LSB
Hi-Z 1 Hi-Z 1 -- PCLK/6 RSPCKn
Hi-Z 1 Hi-Z 1
-- PCLK/2
1CPHA = 1
2
8 16202432
SPI0
SPI0
SPI0
--
--
SSL RSPCK
SPTEF = 1SPTEF = 1
RSPCK
SPTEF = 1
SPI0
SPI0
SPI0
2
2 4
2 24
23
2
2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1126 of 1551
RA4W1
32. SPI
32.5
SPCRSPI
SPI
SPI
SPI
MODFEN = 1
1. 2. 3. 4.
SPCR.TXMD 1 SPCR2.SPPE 0 SPCR2.SCKASE 1
32.3.2 SPI
SPI SPCR.MSTRSPCR.MODFENSPCR.SPMS PmnPFS.NCODR 32.6 PmnPFS.NCODR 0 CMOS 1
32.6
2
SPI MSTR = 1MODFEN = 0SPMS = 0
SPI MSTR = 1MODFEN = 1SPMS = 0
SPI MSTR = 0SPMS = 0
MSTR = 1MODFEN = 0SPMS = 1
MSTR = 0SPMS = 1
PmnPFS.NCODR = 0
RSPCKn
CMOS
SSLn0 SSLn3
CMOS
MOSIn
CMOS
MISOn
RSPCKn 3
CMOS Hi-Z
SSLn0
SSLn1 SSLn33 CMOS Hi-Z
MOSIn 3
CMOS Hi-Z
MISOn
RSPCKn
SSLn0
SSLn1 SSLn35 Hi-Z1
MOSIn
MISOn 4
CMOS Hi-Z
RSPCKn
CMOS
SSLn0 SSLn35 Hi-Z1
MOSIn
CMOS
MISOn
RSPCKn
SSLn0 SSLn35 Hi-Z1
MOSIn
MISOn
CMOS
PmnPFS.NCODR = 1 Hi-Z Hi-Z Hi-Z Hi-Z 1 Hi-Z Hi-Z 1 Hi-Z 1
1. 2. 3. 4. 5.
SPI SPI SSLn0 Hi-Z SSLn0 SPCR.SPE 0 Hi-Z
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1127 of 1551
RA4W1
32. SPI
SPI SPI SPPCR.MOIFE SPPCR.MOIFV SSL SPI0 SSL MOSI 32.7
32.7
SSL MOSI
MOIFE 0 1
MOIFV 0, 1 0
Low
SSL MOSIn
1
1
High
32.3.3 SPI
32.3.3.1 MCU
32.8 MCU SPI MCU SSLn0 SSLn3 SPI SSL Low SPI 1
MCURSPCKn MOSIn SPI MISO
1.
SPCMDm.CPHA 0 SSL MCU SSLni SSL
32.8
MCU
RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn2 SSLn3
SPI
SPCK MOSI MISO SSL
MCU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1128 of 1551
RA4W1
32. SPI
32.3.3.2 MCU
32.9 MCU SPI MCU SSLn0 SSL SPI SPCK MOSI MCUMISOn 1
SPCMDm.CPHA 1 MCU SSLn0 Low MCU 32.10
1. SSLn0 Hi-Z
32.9
SPI
SPCK MOSI MISO
SSL
MCU
RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn2 SSLn3
MCU CPHA = 0
32.10
SPI
SPCK MOSI MISO
SSL
MCUCPHA = 1
RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn2 SSLn3
MCU CPHA = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1129 of 1551
RA4W1
32. SPI
32.3.3.3 MCU
32.11 MCU SPI 32.11 MCU 4 SPI 0 SPI 3 SPI
MCU RSPCKn MOSIn SPI 0 SPI 3 SPCK MOSI SPI 0 SPI 3 MISO MCU MISOn MCU SSLn0 SSLn3 SPI 0 SPI 3 SSL
MCURSPCKn MOSIn SSLn0 SSLn3 SPI 0 SPI 3 SSL Low MISO
MCU
RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn2 SSLn3
SPI0
SPCK MOSI MISO SSL
SPI1
SPCK MOSI MISO SSL
SPI2
SPCK MOSI MISO SSL
SPI3
SPCK MOSI MISO SSL
.
SSLB2
32.11
MCU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1130 of 1551
RA4W1
32. SPI
32.3.3.4 MCU
32.12 MCU SPI 32.12 SPI 2 MCU X Y SPI
SPI SPCK MOSI MCU X Y RSPCKn MOSIn MCU X Y MISOn SPI MISO SPI SSLX SSLY MCU X Y SSLn0
SPI SPCKMOSISSLXSSLY MCU XYSSLn0 Low MISOn
SPI
SPCK MOSI MISO SSLX SSLY
MCUX)
RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn2 SSLn3
MCUY)
RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn2 SSLn3
32.12
MCU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1131 of 1551
RA4W1
32. SPI
32.3.3.5 MCU
32.13 MCU SPI 32.13 2 MCU X Y 2 SPI SPI 1SPI 2 SPI
MCU X Y RSPCKn MOSIn SPI 1SPI 2 RSPCK MOSI SPI 1SPI 2 MISO MCU X Y MISOn MCU X Y MCU Y SSLn0 MCU Y X MCU X SSLn0 MCU X Y SSLn1 SSLn2 SPI 1 SPI 2 SSL SSLn0 SSLn1 SSLn2 MCU SSLn3
MCU SSLn0 High RSPCKnMOSInSSLn1SSLn2 SSLn0 Low MCU RSPCKnMOSInSSLn1 SSLn2 Hi-Z SPI SPI 1 SPI 2 SSL Low MISO
MCUX
RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn2 SSLn3
Y
MCUY
RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn2 SSLn3 X
SPI1
SPCK MOSI MISO SSL
SPI2
SPCK MOSI MISO SSL
.
SSLB2
32.13
MCU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1132 of 1551
RA4W1
32. SPI
32.3.3.6 MCU
32.14 MCU MCU SSLn0 SSLn3
MCURSPCKn MOSIn SPI MISO
MCU
RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn2 SSLn3
SPI
SPCK MOSI MISO SSL
32.14
MCU
32.3.3.7 MCU
32.15 MCU MCU MCU MISOn SPI SPCK MOSI MCU SSLn0 SSLn3
SPCMDm.CPHA 1 MCU
SPI
SPCK MOSI MISO
SSL
MCU
RSPCKn MOSIn MISOn SSLn0 SSLn1 SSLn2 SSLn3
32.15
MCU CPHA = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1133 of 1551
RA4W1
32. SPI
32.3.4
SPI SPI mSPCMDmm = 0 7 SPI 2SPCR2SPPE MSB LSB SPI SPI SPDR/SPDR_HA LSB
1
(a)
SPI m SPI SPI0 SPCMDm.SPB[3:0]SPI1 SPCMD0.SPB[3:0]
(b)
SPI m SPI SPI0 SPCMDm.SPB[3:0]SPI1 SPCMD0.SPB[3:0]
SPI0
D0
D1
D2
Dn - 2
Dn - 1
Dn
SPCMDm.SPB[3:0] (m = SPSSR.SPCP[2:0])
D0
D1
D2
Dn - 2
Dn - 1
P
32.16
SPCMDm.SPB[3:0] (m = SPSSR.SPCP[2:0])
SPI0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1134 of 1551
RA4W1 SPI1
32. SPI
D0 D1 D2
Dn - 2 Dn - 1 Dn
SPCMD0.SPB[3:0]
32.17
D0 D1 D2
Dn - 2 Dn - 1 P
SPCMD0.SPB[3:0]
SPI1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1135 of 1551
RA4W1
32. SPI
32.3.4.1 SPCR2.SPPE = 0
SPI SPDR/SPDR_HAMSB/LSB
(1) 32 MSB
32.18 SPI 32 MSB SPI SPDR
T31 T00 T31 T30 T00
0 1 RSPCK R31 R00
31
0
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 T00
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 T00
31
0
31
0
R31 R30 R29 R28 R27 R26 R25 R24 R23
R08 R07 R06 R05 R04 R03 R02 R01 R00
R31 R30 R29 R28 R27 R26 R25 R24 R23
R08 R07 R06 R05 R04 R03 R02 R01 R00
31
0
= MOSI MISO = MISO MOSI
32.18
MSB 32
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1136 of 1551
RA4W1
32. SPI
(2) 24 MSB
32.19 SPI 32 MSB 24 SPI SPDR
24 T23 T00 T23 T22 T00
0 1 RSPCK R23 R00 8 8 T31 T24 0 8 0
31
23
0
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 T00
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 T00
31
23
0
31
24 23
0
T31 T30 T29 T28 T27 T26 T25 T24 R23
R08 R07 R06 R05 R04 R03 R02 R01 R00
T31 T30 T29 T28 T27 T26 T25 T24 R23
R08 R07 R06 R05 R04 R03 R02 R01 R00
31
24 23
0
.
= MOSI MISO = MISO MOSI
32.19
MSB 24
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1137 of 1551
RA4W1
32. SPI
(3) 32 LSB
32.20 SPI 32 LSB SPI SPDR
T31 T00 T00 T31 T00 T01 T31
0 1 RSPCK R00 R31
31
0
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 T00
T00 T01 T02 T03 T04 T05 T06 T07 T08
T23 T24 T25 T26 T27 T28 T29 T30 T31
31
0
31
0
R00 R01 R02 R03 R04 R05 R06 R07 R08
R23 R24 R25 R26 R27 R28 R29 R30 R31
R31 R30 R29 R28 R27 R26 R25 R24 R23
R08 R07 R06 R05 R04 R03 R02 R01 R00
31
0
.
= MOSI MISO = MISO MOSI
32.20
LSB 32
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1138 of 1551
RA4W1
32. SPI
(4) 24 LSB
32.21 SPI 32 LSB 24 SPI SPDR
24 T23 T00 T00 T23 T00 T01 T23
8 1 RSPCK R00 R23
8 8 T31 T24 0 8 0
31
0
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 T00
T00 T01 T02 T03 T04 T05 T06 T07 T08
T23 T24 T25 T26 T27 T28 T29 T30 T31
31
0
31
0
R00 R01 R02 R03 R04 R05 R06 R07 R08
R23 T24 T25 T26 T27 T28 T29 T30 T31
T31 T30 T29 T28 T27 T26 T25 T24 R23
R08 R07 R06 R05 R04 R03 R02 R01 R00
31
0
.
= MOSI MISO = MISO MOSI
32.21
LSB 24
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1139 of 1551
RA4W1
32. SPI
32.3.4.2 SPCR2.SPPE = 1
(1) 32 MSB
32.22 SPI 32 MSB SPI SPDR
T31 T01 P T00 T31 T30 T01 P
0 1 RSPCK R31 P R31 P
31
0
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 T00
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 P
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 P
31
0
31
0
R31 R30 R29 R28 R27 R26 R25 R24 R23
R08 R07 R06 R05 R04 R03 R02 R01 P
R31 R30 R29 R28 R27 R26 R25 R24 R23
R08 R07 R06 R05 R04 R03 R02 R01 P
31
0
.
= MOSI MISO = MISO MOSI
32.22
MSB 32
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1140 of 1551
RA4W1
32. SPI
(2) 24 MSB
32.23 SPI 32 MSB 24 SPI SPDR
T23 T01 P T00 T23 T22 T01 P
0 1 RSPCK R23 P R23 P 8 8 T31 T24 0 8 0
31
23
0
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 T00
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 P
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 P
31
23
0
31
24 23
0
T31 T30 T29 T28 T27 T26 T25 T24 R23
R08 R07 R06 R05 R04 R03 R02 R01 P
T31 T30 T29 T28 T27 T26 T25 T24 R23
R08 R07 R06 R05 R04 R03 R02 R01 P
31
24 23
0
.
= MOSI MISO = MISO MOSI
32.23
MSB 24
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1141 of 1551
RA4W1
32. SPI
(3) 32 LSB
32.24 SPI 32 LSB SPI SPDR
T30 T00 P T31 T00 T01 T30 P
0 1 RSPCK R00 P R00 P
31
0
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 T00
31
P T30 T29 T28 T27 T26 T25 T24 T23
0 T08 T07 T06 T05 T04 T03 T02 T01 T00
T00 T01 T02 T03 T04 T05 T06 T07 T08
T23 T24 T25 T26 T27 T28 T29 T30 P
31
0
31
0
R00 R01 R02 R03 R04 R05 R06 R07 R08
R23 R24 R25 R26 R27 R28 R29 R30 P
P R30 R29 R28 R27 R26 R25 R24 R23
R08 R07 R06 R05 R04 R03 R02 R01 R00
31
0
.
= MOSI MISO = MISO MOSI
32.24
LSB 32
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1142 of 1551
RA4W1
32. SPI
(4) 24 LSB
32.25 SPI 32 LSB 24 SPI SPDR
T22 T00 P T23 T00 T01 T22 P
8 1 RSPCK R00 P R00 P 8 8 T31 T24 0 8 0
31
0
T31 T30 T29 T28 T27 T26 T25 T24 T23
T08 T07 T06 T05 T04 T03 T02 T01 T00
31 T31 T30 T29 T28 T27 T26 T25 T24
0
P
T08 T07 T06 T05 T04 T03 T02 T01 T00
T00 T01 T02 T03 T04 T05 T06 T07 T08
P T24 T25 T26 T27 T28 T29 T30 T31
31
0
31
0
R00 R01 R02 R03 R04 R05 R06 R07 R08
P T24 T25 T26 T27 T28 T29 T30 T31
T31 T30 T29 T28 T27 T26 T25 T24 P
R08 R07 R06 R05 R04 R03 R02 R01 R00
31
0
.
= MOSI MISO = MISO MOSI
32.25
LSB 24
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1143 of 1551
RA4W1
32. SPI
32.3.5
32.3.5.1 CPHA = 0
32.26 SPCMDm.CPHA 0 8 SPI SPCR.MSTR = 0CPHA 0 SPCR.SPMS = 1 32.26 RSPCKnCPOL = 0 SPCMDm.CPOL 0 RSPCKnCPOL = 1 SPCMDm.CPOL 1 RSPCKn SPI SPI 32.3.2SPI
SPCMDm.CPHA 0 SSLni MOSIn MISOn SSLni RSPCKn 1RSPCK MOSIn MISOn 1/2RSPCK CPOL RSPCK
t1 SSLni RSPCKn RSPCK t2 RSPCKn SSLni SSL t3 SSLni t1t2t3 SPI MCU SPI t1t2t3 32.3.10.1
RSPCKn (CPOL = 0)
RSPCKn (CPOL = 1)
MOSIn
RSPCK
1
2
3
4
5
6
7
MISOn
8
SSLni t1
t2
t3
32.26
SPI CPHA = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1144 of 1551
RA4W1
32. SPI
32.3.5.2 CPHA = 1
32.27 SPCMDm.CPHA 1 8 SPCR.SPMS 1 SSLni RSPCKn MOSIn MISOn 3 32.27 RSPCKCPOL = 0 SPCMDm.CPOL 0 RSPCKn RSPCK SPCMDm.CPOL 1 RSPCKn SPI SPI 32.3.2SPI
SPCMDm.CPHA 1 SSLni MISOn SSLni RSPCKn MOSIn MISOn 1RSPCK 1/2RSPCK SPCMDm.CPOL RSPCKn
t1t2t3 CPHA = 0 MCU SPI t1 t2t3 32.3.10.1
RSPCKn (CPOL = 0)
RSPCKn (CPOL = 1)
MOSIn
MISOn
SSLni
RSPCK
1
2
3
4
5
6
7
8
t1
t2
t3
32.27
SPI CPHA = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1145 of 1551
RA4W1
32. SPI
32.3.6
SPCR.TXMD 32.28 32.29 SPDR/SPDR_HA W
32.3.6.1 SPCR.TXMD = 0
32.28 SPCR.TXMD 0 SPI0 SPDCR.SPFC[1:0] 00bSPCMDm.CPHA 1SPCMDm.CPOL 0 SPI1 SPCMD0.CPHA 1SPCMD0.CPOL 0 SPI 8 RSPCKn RSPCK =
SPDR_HA RSPCKn
(CPHA = 1, CPOL = 0)
SPIn_SPRI
SPRF
OVRF
W
W
12345678 Empty
12345678 Full
(1)
(2)
32.28
SPCR.TXMD = 0
32.28 12
(1) SPDR_HA SPI SPIn_SPRISPSR.SPRF 1
(2) SPDR_HA SPI SPSR.OVRF 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1146 of 1551
RA4W1
32. SPI
32.3.6.2 SPCR.TXMD = 1
32.29 SPCR.TXMD 1 SPI0 SPDCR.SPFC[1:0] 00bSPCMDm.CPHA 1SPCMDm.CPOL 0 SPI1 SPCMD0.CPHA 1SPCMD0.CPOL 0 SPI 8 RSPCKn RSPCK =
SPDR_HA
RSPCKn (CPHA = 1, CPOL = 0)
TXMD (TXMD = 1)
SPIn_SPRI
SPRF
OVRF
W (1)
W
12345678
12345678
Empty (2)
(3)
32.29
SPCR.TXMD = 1
32.29 13
(1) SPCR.TXMD = 1SPSR.SPRF = 0SPSR.OVRF 0
(2) SPDR_HA SPCR.TXMD = 1SPSR.SPRF 0 SPI
(3) SPDR_HA SPSR.OVRF 0
SPCR.TXMD = 1SPI SPSR.SPRF SPSR.OVRF 13 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1147 of 1551
RA4W1
32. SPI
32.3.7
32.30 32.31 SPIn_SPTI SPIn_SPRISPDR_HA "W" "R" 32.26 SPI0 SPCR.TXMD 0SPDCR.SPFC[1:0] 00bSPCMDm.CPHA 0 SPCMDm.CPOL 0 SPI1 SPCR.TXMD 0SPCMD0.CPHA 0 SPCMD0.CPOL 0 SPI 8
32.27 SPI0 SPCR.TXMD 0SPDCR.SPFC[1:0] 00bSPCMDm.CPHA 1SPCMDm.CPOL 0 SPI1 SPCR.TXMD 0SPCMD0.CPHA 1SPCMD0.CPOL 0 SPI 8 RSPCKn RSPCK
SPDR_HA
W
RSPCKn (CPHA = 0, CPOL = 0)
SPIn_SPTI
1 Empty Full
(1) (2)
SPTEF
23 Empty
W
4567 Full
(3)
8 (4)
SPIn_SPRI SPRF
Empty (4)
R
12345678 Empty
Full
Empty
Full
(5)
32.30
SPIn_SPTISPIn_SPRI CPHA = 0CPOL = 0
SPDR_HA
W
RSPCKn
(CPHA = 1, CPOL = 0)
1
SPIn_SPTI
Empty Full (1) (2)
23 Empty
W 45
(3)
SPTEF
67 Full
8 (4)
SPIn_SPRI SPRF
Empty (4)
R
12345678 Empty
Full
Empty
Full
(5)
32.31
SPIn_SPTISPIn_SPRI CPHA = 1CPOL = 0
32.31 15 SPI
(1) SPDR_HA SPDR_HA SPI SPSR.SPTEF 0
(2) SPI SPIn_SPTISPSR.SPTEF 1 SPI 32.3.10SPI 32.3.11
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1148 of 1551
RA4W1
32. SPI
(3) SPTEF SPDR_HA SPI SPTEF 0 SPI
(4) SPDR_HA SPI SPIn_SPRI SPRF 1 SPI SPTEF 1 SPI
(5) SPRF SPDR_HA
SPTEF = 0SPDR_HA SPI SPDR_HA SPTEF SPCR.SPTIE 1
SPI SPCR.SPE = 0SPTIE 0
SPRF = 1SPI 32.3.8 SPI SPCR.SPRIE 1
ICU IELSRj.IR j SPTEF SPRF 14. ICU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1149 of 1551
RA4W1
32. SPI
32.3.8
SPI SPDR/SPDR_HA SPDR/SPDR_HA SPDR/ SPDR_HA SPI
SPI 32.8 SPI
32.8
SPI
SPI
1 SPDR/SPDR_HA
2 SPDR/SPDR_HA
3 SPI
MISOA
SPI
4
5
6 SSLn0
RSPCKnMOSInSSLn1 SSLn3
SPI
7 SSLn0
RSPCKnMOSInSSLn1 SSLn3
SPI
8 SSLn0
MISOn
SPI
32.8 1 SPI SPDR/SPDR_HA SPDR/SPDR_HA SPSR.SPTEF = 1
2 SPI SPI SPDR/SPDR_HA SPSR.SPRF = 1
3 32.3.8.4
4 32.3.8.1
5 32.3.8.2
6 8 32.3.8.3
32.3.7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1150 of 1551
RA4W1
32. SPI
32.3.8.1
SPDR/SPDR_HA SPI SPSR.OVRF 1 OVRF 1 SPI OVRF 0 OVRF 1 SPSR CPU OVRF 0
32.32 OVRF SPRF 32.32 SPSR SPDR_HA SPSRSPDR_HA "W" "R" 32.32 SPCMDm.CPHA 1 SPCMDm.CPOL 0 SPI 8 RSPCKn RSPCK
SPSR SPDR_HA
RSPCKn (CPHA = 1, CPOL = 0)
SPRF
OVRF
R
W
R
12345678 Full
12345678
Empty
(2) (1)
(3) (4)
32.32
OVRF SPRF
32.32 14
(1) SPRF 1SPI OVRF 1 SPI SPPE 1 SPI0 SPI SPCMDm SPSSR.SPECM[2:0]
(2) SPDR/SPDR_HA SPI SPRF 0 OVRF 0
(3) OVRF 1 SPI SPRF 1 SPPE 1 SPI0 SPI SPSSR.SPECM[2:0] SPI SPI
(4) OVRF 1 SPSR OVRF 0 OVRF 0
SPSR SPI SPSR SPDR_HA SPSR SPI SPI0 SPSSR.SPECM[2:0] SPCMDm
OVRF 1 OVRF 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1151 of 1551
RA4W1
32. SPI
RSPCK 32.33 32.34
SPDR_HA
RSPCKn (CPOL = 0)
RSPCKn (CPOL = 1)
RSPCK
1
2
3
4
5
6
7
8
MOSIn
RSPCK
1
MISOn
SSLni t1
Empty
t2
t3
t1
SPRF
OVRF Low
SPI (CPHA = 1)
t1SPISPCKD t2SPISSLND t3SPISPND
2
3
4
5
6
Full
R
7
8
(2)
t2
Em pty
Full
(1)
01 don't care
32.33
CPHA = 1
SPDR_HA
RSPCKn (CPOL = 0)
RSPCKn (CPOL = 1)
RSPCK
1
2
3
4
5
6
7
8
MOSIn
RSPCK
1
MISOn
SSLni t1
Empty
t2
t3
t1
SPRF
OVRF
Low
SPI (CPHA = 0)
t1SPISPCKD t2SPISSLND t3SPISPND
2
3
4
5
6
Full
R
7
8
(2)
t2
Em pty
Full
(1)
01 don't care
32.34
CPHA = 0
32.33 32.34 12
(1) RSPCK
(2) SPDR/SPDR_HA SPSR.SPRF 0 RSPCK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1152 of 1551
RA4W1
32. SPI
32.3.8.2
SPCR.TXMD 0SPCR2.SPPE 1 SPI SPI SPSR.PERF 1 SPSR.OVRF 1 SPI PERF 0 PERF 1 SPSR PERF 0
32.35 OVRF PERF 32.35 SPSR W R 32.35 SPCR.TXMD 0SPCR2.SPPE 1 SPCMDm.CPHA 1 SPCMDm.CPOL 0 SPI 8 RSPCKn RSPCK
SPSR RSPCKn
(CPHA = 1, CPOL = 0)
PERF
OVRF
R
W
12 3 4 5 6 7 8
12 3 4 5 6 7 8
(1)
(2)
(3)
32.35
OVRF PERF
32.35 13
(1) SPI SPI SPI PERF 1 SPI0 SPI SPCMDm SPSSR.SPECM[2:0]
(2) PERF 1 SPSR PERF 0 PERF 0
(3) SPI SPI
SPSR SPI SPSR SPSR SPI SPI0 SPSSR.SPECM[2:0] SPCMDm
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1153 of 1551
RA4W1
32. SPI
32.3.8.3
SPCR.MSTR 1SPCR.SPMS 0SPCR.MODFEN 1 SPI SPI SSLn0 SPI SPSR.MODF 1 SPI SPI0 SPCMDm SPSSR.SPECM[2:0] SSLn0 SSLP.SSL0P
MSTR 0 SPI SPI MODFEN 1SPMS 0 SSLn0 SPI
SPI SPCR.SPE 0 32.3.9SPI SPI
SPSR SPI SPSR SPI SPSR SPI SPI0 SPSSR.SPECM[2:0] SPCMDm
MODF 1 SPI SPE 1 SPI MODF 0
32.3.8.4
SPCR.MSTR 0SPCR.SPE 1 SPI SPI SPSR.MODF SPSR.UDRF 1
SPI SPCR.SPE 0 32.3.9SPI
SPSR SPI SPSR SPI SPSR
MODF 1 SPI SPE 1 SPI MODF 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1154 of 1551
RA4W1
32. SPI
32.3.9 SPI
SPCR.SPE 0 SPI SPE 0 SPI SPI SPI SPCR.SPE
32.3.9.1 SPE
SPCR.SPE 0 SPI
Hi-Z
SPI
SPI SPSR.STEF 1
SPE SPI SPE 1 SPI
SPSR.SPRFSPSR.OVRFSPSR.MODFSPSR.PERF SPSR.UDRF SPI SPSSR SPI0 SPI SPI
SPSR.SPTEF 1 SPI SPCR.SPTIE 1 SPI SPE 0 SPTIE 0
32.3.9.2
32.3.9.1SPE SPI SPI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1155 of 1551
RA4W1
32. SPI
32.3.10 SPI
32.3.10.1
32.3.8SPI
(1)
SPI SPI SPDR/SPDR_HA SPSR.SPTEF = 1SPI SPTX SPI0 SPDCR.SPFC[1:0] SPDR/SPDR_HA SPI1 SPI SPI
SSLni SSLP SPI 32.3.5
(2)
SPCMDm.CPHA SPI RSPCKn SPRXSPSR.SPRF = 0 SPI SPDR/SPDR_HA
. SPI SPCMDm.SPB[3:0] SSLni SSLP SPI 32.3.5
(3)
(a) SPI0
SPSCR SPCMDm SPBR SPCKD SSLND SPND
SPSCR SPI SPCMDm
SSLni
MSB/LSB
RSPCK
SPCKD
SSLND
SPND
SPBR SPI SPCKDSSL SSLNDSPND
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1156 of 1551
RA4W1
32. SPI
SPI SPSCR SPCMDm SPI SPCMDm SPSSR.SPCP[2:0] SPCR.SPE 1 SPI SPI SPCMD0 SPCMD0 SPI
SPI SPCMD0
SPSCR
SPCMD0 SPCMD1 SPCMD2 SPCMD3 SPCMD4 SPCMD5 SPCMD6 SPCMD7
CPHA CPOL BRDV[1:0] SSLA[2:0] SSLKP SPB[3:0] LSBF
SCKDEN SPCKD
SLNDEN SSLND
SPNDEN SPND
32.36
SPI0
SPDR/SPDR_HA SPCMDm 2
(SPDR/SPDR_HA)
+
(SPCMD)
32.37
SPI0
32.4 32.38
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1157 of 1551
RA4W1
32. SPI
1-1 1-2 1-3 1-4 2-1 2-2 3 4 5 6 7 8
SPTX0/SPRX0 SPCMD0
1
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD0
1
2
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD0
SPTX2/SPRX2 SPCMD0
1
2
3
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD0
SPTX2/SPRX2 SPCMD0
SPTX3/SPRX3 SPCMD0
1
2
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD1
1
2
3
4
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD1
SPTX2/SPRX2 SPCMD0
SPTX3/SPRX3 SPCMD1
1
2
3
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD1
SPTX2/SPRX2 SPCMD2
4
1
2
3
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD1
SPTX2/SPRX2 SPCMD2
SPTX3/SPRX3 SPCMD3
1
2
3
4
SPTX0/SPRX0 SPCMD0
SPTX0/SPRX0 SPCMD1
SPTX0/SPRX0 SPCMD2
SPTX0/SPRX0 SPCMD3
SPTX0/SPRX0 SPCMD4
1
2
3
4
5
SPTX0/SPRX0 SPCMD0
SPTX0/SPRX0 SPCMD1
SPTX0/SPRX0 SPCMD2
SPTX0/SPRX0 SPCMD3
SPTX0/SPRX0 SPCMD4
SPTX0/SPRX0 SPCMD5
1
2
3
4
5
6
SPTX0/SPRX0 SPCMD0
SPTX0/SPRX0 SPCMD1
SPTX0/SPRX0 SPCMD2
SPTX0/SPRX0 SPCMD3
SPTX0/SPRX0 SPCMD4
SPTX0/SPRX0 SPCMD5
SPTX0/SPRX0 SPCMD6
1
2
3
4
5
6
7
SPTX0/SPRX0 SPCMD0
SPTX0/SPRX0 SPCMD1
SPTX0/SPRX0 SPCMD2
SPTX0/SPRX0 SPCMD3
SPTX0/SPRX0 SPCMD4
SPTX0/SPRX0 SPCMD5
SPTX0/SPRX0 SPCMD6
SPTX0/SPRX0 SPCMD7
1
2
3
4
5
6
7
8
32.38
SPI SPCMDmSPI0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1158 of 1551
RA4W1
32. SPI
(b) SPI1
SPSCR SPCMD0 SPBR SPCKD SSLND SPND
SPSCR SPI SPCMD0
SSLni
MSB/LSB
RSPCK
SPCKD
SSLND
SPND
SPBR SPI SPCKDSSL SSLNDSPND
SPI SPCR.SPE = 1SPI SPCMD0 SPCMD0
SPCMD0
CPHA CPOL BRDV[1:0] SSLA[2:0] SPB[3:0] LSBF
SCKDEN SPCKD
SLNDEN SSLND
SPNDEN SPND
32.39
SPI1
SPDR/SPDR_HA SPCMD0 2
32.40
SPDR/ SPDR_HA
+
SPCMD
SPI1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1159 of 1551
RA4W1
32. SPI
32.41
SPTX0/SPRX0 SPCMD0
1
32.41
SPI SPI1
(4)
SPI0
SPI SPCMDm.SSLKP 1 SPI SSLni SSLni SSLni SSLni SPI SSLni
32.42 SPCMD0 SPCMD1 SSLni 32.42 17 SPI
. SSLni SSLP
RSPCKn
(CPHA = 1, CPOL = 0)
SSLni
(1)
(2)
(3) (4) (5)
(6)
(7)
32.42
SSLKP SPI0
1. SPI SPCMD0 SSLni RSPCK
2. SPI SPCMD0
3. SPI SSL
4. SPCMD0.SSLKP 1 SPI SPCMD0 SSLni SPCMD0
5. SPI SPCMD1 SSLni RSPCK
6. SPI SPCMD1
7. SPCMD1.SSLKP 0 SPI SSLni SPCMD1
SSLKP 1 SPCMDm SSLni SPCMDm SSLni SPI 32.42 5SSLni SSLni SSLni
. SSLni MISOn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1160 of 1551
RA4W1
32. SPI
SPI SSLKP SSLni SPCMDm.CPHA 0 SPI SSLni
SPI1
SPI SSL SSL
(5) RSPCK t1
RSPCK SPCMDm.SCKDEN SPCKD SPI0 SPI SPCMDm SPCMDm.SCKDEN SPCKD 32.9 RSPCK SPI1 SPI SPCMD0.SCKDEN SPCKD 32.9 RSPCK RSPCK 32.3.5
32.9
SCKDEN SPCKDRSPCK
SPCMDm.SCKDEN 0 1
SPCKD.SCKDL[2:0] 000b 111b 000b 001b 010b 011b 100b 101b 110b 111b
1RSPCK 1RSPCK 2RSPCK 3RSPCK 4RSPCK 5RSPCK 6RSPCK 7RSPCK 8RSPCK
RSPCK
(6) SSL t2
SSL SPCMDm.SLNDEN SSLND SPI0 SPI SPCMDm SPCMDm.SLNDEN SSLND 32.10 SSL SPI1 SPI SPCMD0.SLNDEN SSLND 32.10 SSL SSL 32.3.5
32.10
SLNDENSSLND SSL
SPCMDm.SLNDEN 0 1
SSLND.SLNDL[2:0] 000b 111b 000b
1RSPCK 1RSPCK
001b
2RSPCK
010b
3RSPCK
011b
4RSPCK
100b
5RSPCK
101b
6RSPCK
110b
7RSPCK
111b
8RSPCK
SSL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1161 of 1551
RA4W1
32. SPI
(7) t3
SPCMDm.SPNDEN SPND SPI0 SPI SPCMDm SPCMDm.SPNDEN SPND 32.11 SPI1 SPI SPCMD0.SPNDEN SPND 32.11 32.3.5
32.11
SPNDENSPND
SPCMDm.SPNDEN 0 1
SPND.SPNDL[2:0] 000b 111b 000b
1RSPCK + 2PCLK 1RSPCK + 2PCLK
001b
2RSPCK + 2PCLK
010b
3RSPCK + 2PCLK
011b
4RSPCK + 2PCLK
100b
5RSPCK + 2PCLK
101b
6RSPCK + 2PCLK
110b
7RSPCK + 2PCLK
111b
8RSPCK + 2PCLK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1162 of 1551
RA4W1
32. SPI
(8)
32.43 SPI SPI DMAC
32.43
SPISSLP
SPISPPCR SPISPBR
SPISPDCR SPISPCKD SPI SSLND SPISPND SPI2SPCR2
SPISPSCR 1
SPISPCMDm SPI0m = 07SPI1m = 0
DMAC
� SSL
� CMOS � MOSI
�
� SPI0
� RSPCK
� SSL
�
� �
� � SCI0SSL � RSPCK � SSL � � MSB/LSB � � � � � SSL
DMAC
SPISPCR
SPISPCR
1.
SPI0
� � � SPI
SPI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1163 of 1551
RA4W1
32. SPI
(9) 32.44 32.46
(a)
SPIn_SPII CPU
SPSR.MODF, OVRF, PERF, UDRF
[1]
SPCR2.SPIIE = 0
SPCR.SPE = 1 SPTIE, SPRIE, SPEIE
[2]
[3] SPCR.SPE
No
(SPIn_SPTI)?
SPSR.SPTEF = 1?1
Yes SPDR/SPDR_HA
?
[4] [4] 1
SPI0
SPDCR.SPFC[1:0]
No
Yes
SPCR.SPTIE = 0, SPYCesR2.SPIIE = 1
SPCR.SPTIE = 0, SPCR2.SPIIE = 02
SPIn_SPII
No
SPSR.IDLNF = 0?3
Yes
SPCR.SPE = 0, SPCR2.SPIIE = 0
1.
SPSR.SPTEF SPDR/SPDR_HA
2.
(SPCR2.SPIIE = 0)
3.
SPDRPSR.IDLNF 1PCLK
32.44
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1164 of 1551
RA4W1
32. SPI
(b)
SPI
SPSR.MODF, OVRF, PERF, UDRF
[1]
SPCR2.SPIIE = 0
SPCR.SPE = 1 SPTIE, SPRIE, SPEIE
[2]
[3] SPCR.SPE
No
(SPIn_SPRI)?
SPSR.SPRF = 1?
Yes
SPDR/SPDR_HA
[4] [4] 1 SPI0SPDCR.SPFC[1:0]
No ?
Yes SPCR.SPRIE = 0
[5]
32.45
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1165 of 1551
RA4W1
32. SPI
(c)
SPI
SPCR.SPE SPCR.SPE SPCR.SPE SPI0 SPSSR.SPECM[2:0]
ICU.IELSRj.IR ICU.IELSRj.IR SPIn_SPRI SPI
SPSR.MODF, OVRF, PERF, UDRF
[1]
SPCR2.SPIIE = 0
SPCR.SPE = 1 SPTIE, SPRIE, SPEIE
[2]
[3] SPCR.SPE
(SPIn_SPEI)
No
SPSR.MODF/OVRF/
PERF/UDRF = 1?
Yes
SPSR.MODF = 0
No
Yes
SPCR.SPE = 0
No SSL0 = ?
[4]
SPCR.SPTIE = 0, SPRIE = 0, SPEIE = 0, SPCR2.SPIIE = 0
[4] SSL0
[5]
SPSR.MODF, OVRF, PERF, UDRF
[5] SPIn_SPTISPIn_SPRI ICU.IELSRj.IR
[6]
32.46
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1166 of 1551
RA4W1
32. SPI
32.3.10.2
(1)
SPCMD0.CPHA 0 SPI SSLn0 MISOn CPHA 0 SSLn0
CPHA 1 SPI SSLn0 RSPCKn MISOn CPHA 1 SSLn0 RSPCKn
CPHA SPI SSLn0 MISOn CPHA SPI
SSLn0 SSLP.SSL0P SPI 32.3.5
(2)
SPCMD0.CPHA SPI RSPCKn SPSR.SPRF = 0 SPI SPDR/SPDR_HA SPI SPI SSLn0 32.3.8
SPI SPCMD0.SPB[3:0] SSLn0 SSLP.SSL0P
SPI 32.3.5
(3)
SPCMD0.CPHA 0 SPI SSLn0 32.10 SPI SSLn0 CPHA 0 SPI SSLn0 SPI CPHA 1 CPHA 0 SSLn0
(4)
SPCMD0.CPHA 1 SSLn0 CPHA 1 SSLn0 RSPCKn SSLn0 SPI
CPHA 0 2
SPI1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1167 of 1551
RA4W1
32. SPI
(5)
32.47 SPI SPI DMAC
SPISSLP
� SSLn0
SPISPDCR SPI2SPCR2 SPI0 SPCMD0
� SPI0
� � � MSB/LSB � � �
DMAC
DMAC
SPISPCR SPISPCR
� � � � SPI
32.47
SPI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1168 of 1551
RA4W1
32. SPI
(6) 32.48 32.50
(a)
SPSR.MODF, OVRF, UDRF, PERF
[1]
SPCR2.SPIIE = 0
SPCR.SPE = 1 SPTIE, SPRIE, SPEIE
[2]
[3] SPCR.SPE
No (SPIn_SPTI)?
SPSR.SPTEF = 1?1
Yes
SPDR/SPDR_HA
[4]
No ?
[4] 1 SPI0SPDCR.SPFC[1:0]
Yes
1. SPSR.SPTEF SPDR/SPDR_HA
32.48
(b)
SPI
SPSR.MODF, OVRF, UDRF, PERF
[1]
SPCR2.SPIIE = 0
SPCR.SPE = 1 SPTIE, SPRIE, SPEIE
[2]
[3] SPCR.SPE
No
(SPIn_SPRI)?
SPSR.SPRF = 1?
Yes SPDR/SPDR_HA
?
[4] [4] 1 SPI0 SPDCR.SPFC[1:0]
No
Yes SPCR.SPRIE = 0
32.49
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1169 of 1551
RA4W1
32. SPI
(c)
SSLn0 SPSR.MODF
ICU.IELSRj.IR ICU.IELSRj.IR SPI
SPSR.MODF, OVRF, UDRF, PERF
[1]
SPCR2.SPIIE = 0
SPCR.SPE = 1 SPTIE, SPRIE, SPEIE
[2]
[3] SPE
(SPIn_SPEI)
SPSR.MODF/OVRF/PERF = 1?
Yes
SPSR.MODF = 0
Yes
SPCR.SPE = 0
No No
SPCR.SPTIE = 0, SPRIE = 0, SPEIE = 0, SPCR2.SPIIE = 0
[4]
SPSR.MODF, UDRF, OVRF, PERF
[4] SPIn_SPTISPIn_SPRI ICU.IELSRj.IR
[5]
32.50
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1170 of 1551
RA4W1
32. SPI
32.3.11
SPI SPCR.SPMS 1 SSLni RSPCKnMOSInMISOn SSLni
SSLni SPI SPI SSLni
SPCR.MSTR = 0 SPCMDm.CPHA 0
32.3.11.1
(1)
SPSR.SPTEF = 1 SPDR/SPDR_HA SPI SPDR/SPDR_HA SPTX SPI0 SPDCR.SPFC[1:0] SPDR/ SPDR_HA SPI SPI
SSLn0 SPI 32.3.5
(2)
SPI RSPCKn SPSR.SPRF = 0 SPI SPI SPDR/SPDR_HA
SPI SPCMDm.SPB[3:0] SSLn0
SPI 32.3.5
(3)
(a) SPI0
SPSCR SPCMDm SPBR SPCKD SSLND SPND SSLni
SPSCR SPI SPCMDm
SSLni
MSB/LSB
RSPCKn
SPCKD
SSLND
SPND
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1171 of 1551
RA4W1
32. SPI
SPBR SPI SPCKDSSL SSLNDSPND
SPI SPSCR SPCMDm SPI SPCMDm SPSSR.SPCP[2:0] SPCR.SPE 1 SPI SPI SPCMD0 SPCMD0 SPI
SPI SPCMD0
SPSCR
SPCMD0 SPCMD1
SPCMD2 SPCMD3
SPCMD4 SPCMD5
SPCMD6 SPCMD7
CPHA CPOL BRDV[1:0] SSLA[2:0] SSLKP SPB[3:0] LSBF
SCKDEN
SPCKD
SLNDEN
SSLND
SPNDEN
SPND
32.51
SPI0
SPDR/SPDR_HA SPCMDm 2
32.52
(SPDR/SPDR_HA)
+ (SPCMD)
SPI0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1172 of 1551
RA4W1
32. SPI
32.4 32.53
1-1 1-2 1-3 1-4 2-1 2-2 3 4 5 6 7 8
SPTX0/SPRX0 SPCMD0
1
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD0
1
2
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD0
SPTX2/SPRX2 SPCMD0
1
2
3
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD0
SPTX2/SPRX2 SPCMD0
SPTX3/SPRX3 SPCMD0
1
2
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD1
1
2
3
4
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD1
SPTX2/SPRX2 SPCMD0
SPTX3/SPRX3 SPCMD1
1
2
3
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD1
SPTX2/SPRX2 SPCMD2
4
1
2
3
SPTX0/SPRX0 SPCMD0
SPTX1/SPRX1 SPCMD1
SPTX2/SPRX2 SPCMD2
SPTX3/SPRX3 SPCMD3
1
2
3
4
SPTX0/SPRX0 SPCMD0
SPTX0/SPRX0 SPCMD1
SPTX0/SPRX0 SPCMD2
SPTX0/SPRX0 SPCMD3
SPTX0/SPRX0 SPCMD4
1
2
3
4
5
SPTX0/SPRX0 SPCMD0
SPTX0/SPRX0 SPCMD1
SPTX0/SPRX0 SPCMD2
SPTX0/SPRX0 SPCMD3
SPTX0/SPRX0 SPCMD4
SPTX0/SPRX0 SPCMD5
1
2
3
4
5
6
SPTX0/SPRX0 SPCMD0
SPTX0/SPRX0 SPCMD1
SPTX0/SPRX0 SPCMD2
SPTX0/SPRX0 SPCMD3
SPTX0/SPRX0 SPCMD4
SPTX0/SPRX0 SPCMD5
SPTX0/SPRX0 SPCMD6
1
2
3
4
5
6
7
SPTX0/SPRX0 SPCMD0
SPTX0/SPRX0 SPCMD1
SPTX0/SPRX0 SPCMD2
SPTX0/SPRX0 SPCMD3
SPTX0/SPRX0 SPCMD4
SPTX0/SPRX0 SPCMD5
SPTX0/SPRX0 SPCMD6
SPTX0/SPRX0 SPCMD7
1
2
3
4
5
6
7
8
32.53
SPI SPI0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1173 of 1551
RA4W1
32. SPI
(b) SPI1
SPCMD0 SPBR SPCKD SSLND SPND SSLni
SPCMD0 SSLni MSB LSB
RSPCKn SPCKD SSLND SPND SPBR SPI SPCKDSSL SSLNDSPND SPCR.SPE 1 SPI SPI SPCMD0 SPCMD0
SPCMD0
CPHA CPOL BRDV[1:0] SSLA[2:0] SPB[3:0] LSBF
SCKDEN SPCKD
SLNDEN SSLND
SPNDEN SPND
32.54
SPI1
SPDR/SPDR_HA SPCMD0 2
SPDR/SPDR_HA
+
SPCMD
32.55
SPI1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1174 of 1551
RA4W1
32. SPI
32.56
32.56
SPTX0/SPRX0 SPCMD0
1
SPI SPI1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1175 of 1551
RA4W1
32. SPI
(4)
32.57 SPI DMAC
SPISPPCR
SPISPBR
� MOSI �
SPISPDCR
� SPI0
SPISPCKD SPI
SSLND SPISPND
SPI2SPCR2 SPISPSCR
1
SPISPCMDm SPI0m = 07SPI1m = 0
DMAC
� RSPCK
� SSL
�
� �
� � RSPCK � SSL � � MSB/LSB � � �
DMAC
32.57
SPISPCR SPISPCR
� � � SPI
1. SPI0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1176 of 1551
RA4W1
32. SPI
(5)
SPI 32.3.10.1 (9)
.
32.3.11.2
(1)
SPCR.SPMS 1 RSPCKn SPI SPI MISOn
SSLn0 SPI 32.3.5
(2)
SPI RSPCKn SPSR.SPRF = 0 SPI SPDR/ SPDR_HA SPI SPI SPCMD0.SPB[3:0]
SPI 32.3.5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1177 of 1551
RA4W1
32. SPI
(3)
32.58 SPI DMAC
SPISPDCR SPI2SPCR2 SPI0SPCMD0 DMAC
� SPI0
� � � MSB/LSB � � �
DMAC
SPISPCR SPISPCR)
� � � SPI
32.58
(4)
SPI 32.3.10.2 (6)
.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1178 of 1551
RA4W1
32. SPI
32.3.12
SPPCR.SPLP2 SPPCR.SPLP 1 SPI SPCR.MSTR 1 MISOn SPCR.MSTR 0 MOSIn SPCR.MSTR 1 MOSIn SPCR.MSTR 0 MISOn SPI SPI
32.12 SPLP2 SPLP 32.59 SPI SPPCR.SPLP2 = 1SPPCR.SPLP = 0 1
32.12
SPLP2 SPLP
SPPCR.SPLP2 0 0 1 1
SPPCR.SPLP 0 1 0 1
MOSIn MISOn
32.59
(MOSIn/MISOn)
(MISOn/MOSIn)
2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1179 of 1551
RA4W1
32. SPI
32.3.13
32.60
SPCR.TXMD = 0 SPCR2.PTE = 1 SPCR2.SPPE = 1 SPPCR.SPLP2 = 1
SPCR2.PTE = 0
32.60
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1180 of 1551
RA4W1
32. SPI
32.3.14
SPI 8
SPI
DTCDMAC
SPIn_SPEI 32.13 SPI 32.13
DTC DMAC DTC DMAC SPI DTC DMAC 17.DMA DMAC18.DTC
ICU.IELSRj.IR 1 ICU 1 1 ICU.IELSRj.IR 0 SPCR.SPTIE SPCR.SPRIE 0
32.13
SPI
SPIn_SPRI
SPIn_SPTI
SPI SPIn_SPEI
SPI
SPIn_SPII
SPIn_SPTEND
SPCR.SPRIE 1 SPSR.SPRF = 1
SPCR.SPTIE 1 SPSR.SPTEF = 1
SPCR.SPEIE 1 SPSR.MODF OVRFPERF UDRF 1
DMAC/DTC
SPCR2.SPIIE 1 SPSR.IDLNF 0
IDLNF SPI 1 0 32.15
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1181 of 1551
RA4W1
32. SPI
32.4
ELC SPI
32.4.1
SPDR/SPDR_HA
32.4.2
SPE 0 1
32.4.3
32.5.4
(1) 32.14
32.14
SPISPMS = 0 SPCR.MSTR = 0
SPCR.MODFEN
1
SSLn0
SSLn0
(2)
SPCR.MSTR 0 SPCR.SPE 1 MODF UDRF 1
(3)
SPCR.TXMD 0 OVRF 1
(4)
SPCR.TXMD 0 SPCR2.SPPE 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1182 of 1551
RA4W1
32. SPI
32.4.4 SPI
(1)
IDLNF SPI 0
(2)
SPCR.SPE 0SPI
32.4.5
SPI IDLNF SPI 1 0
32.15
SPISPMS = 0 SPMS = 1
SSLn0 RSPCKn
SPCR.SPE 0 SPCR.SPE
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1183 of 1551
RA4W1
32. SPI
32.5
32.5.1
BMSTPCRBSPI SPI B 11.
32.5.2
SPCR.SPE 0
32.5.3
ICU.IELSRj.IR 1 ICU.IELSRj.IR SPCR.SPE 1
1. SPCR.SPE = 0
2. SPCR.SPTIE SPCR.SPRIE 0
3. SPCR.SPTIE SPCR.SPRIE 0
4. ICU.IELSRj.IR 0
32.5.4
SPI SPCR.SPMS = 0SPCR.MSTR = 1SPCR.MODFEN = 1
32.5.5 SPRF SPTEF
SPRF SPTEF SPCR.SPRIE SPCR.SPTIE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1184 of 1551
RA4W1
33. CRC
33. CRC
33.1
CRC: Cyclic Redundancy CheckCRC LSB MSB CRC CRC CRC
33.1 CRC 33.1
33.1
CRC
CRC 1 CRC CRC
CRC CRC
8
32
8n CRC 32n CRC
n =
n =
8
32
3 1 [8 CRC] X8 + X2 + X + 1 (CRC-8)
[16 CRC] X16 + X15 + X2 + 1 (CRC-16) X16 + X12 + X5 + 1 (CRC-CCITT)
2 1
[32 CRC] X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10
+ X8 + X7 + X5 + X4 + X2 + X + 1 (CRC-32) X32 + X28 + X27 + X26 + X25 + X23 + X22 + X20
+ X19 + X18 + X14 + X13 + X11 + X10 + X9 + X8 + X6 + 1 (CRC-32C)
LSB MSBCRC
--
1. CRC 8 32
CRCDOR/ CRCDOR_HA/ CRCDOR_BY
CRCCR0
CRC
CRCDIR/ CRCDIR_BY
CRC CRCSAR
= ? CRCCR1
33.1
CRC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1185 of 1551
RA4W1
33.2 33.2.1 CRC 0CRCCR0
CRC.CRCCR0 4007 4000h
b7
b6
b5
b4
b3
b2
b1
b0
DORCL R
LMS
--
--
--
0
0
0
0
0
GPS[2:0]
0
0
0
33. CRC
b2-b0
b5-b3 b6 b7
GPS[2:0]
-- LMS DORCLR
CRC
CRC CRCDOR/CRCDOR_HA/ CRCDOR_BY
R/W
b2
b0
0 0 0
0 0 18 CRC-81 (X8 + X2 + X + 1)
0 1 016 CRC-16 (X16 + X15 + X2 + 1)
0 1 116 CRC-CCITT (X16 + X12 + X5 + 1)
1 0 032 CRC-32 (X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8 + X7 + X5 + X4 + X2 + X + 1)
1 0 132 CRC-32C (X32 + X28 + X27 + X26 + X25 + X23 + X22 + X20 + X19 + X18 + X14 + X13 + X11 + X10 + X9 + X8 +
X6 + 1)
R/W
00
R/W
0LSB CRC
R/W
1MSBCRC
1CRCDOR/CRCDOR_HA/CRCDOR_BY 0
W
1
1. 1
GPS[2:0] CRC CRC
LMS CRC CRC LSB CRC
MSB CRC CRC 33.3
DORCLR CRCDOR/CRCDOR_HA/CRCDOR_BY 1 CRCDOR/CRCDOR_HA/CRCDOR_BY 0000_0000h 0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1186 of 1551
RA4W1
33.2.2 CRC 1CRCCR1
CRC.CRCCR1 4007 4001h
b7
b6
b5
b4
b3
b2
b1
b0
CRCSE CRCS
N
WR
--
--
--
--
--
--
0
0
0
0
0
0
0
0
33. CRC
R/W
b5-b0
--
0 0
R/W
b6
CRCSWR 0
R/W
1
b7
CRCSEN
0
R/W
1
CRCSWR
0 CRC 1 CRC
CRCSEN 1 CRC 0 CRC
33.2.3 CRC CRCDIR/CRCDIR_BY
CRC.CRCDIR/CRCDIR_BY 4007 4004h b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRCDIR CRC-32 CRC-32C 32 CRCDIR_BY CRC-8CRC-16 CRC-CCITT 8
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1187 of 1551
RA4W1
33. CRC
33.2.4 CRC CRCDOR/CRCDOR_HA/CRCDOR_BY
CRC.CRCDOR/CRCDOR_HA/CRCDOR_BY 4007 4008h b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRCDOR CRC-32 CRC-32C 32
CRCDOR_HA CRC-16 CRC-CCITT 16
CRCDOR_BY CRC-8 8
0000_0000h CRCDOR/CRCDOR_HA/ CRCDOR_BY
CRCDIR/CRCDIR_BY CRC CRCDOR/CRCDOR_HA/ CRCDOR_BY CRC 0000_0000h CRC
8 CRCX8 + X2 + X + 1 CRCDOR_BY CRC
16 CRCX16 + X15 + X2 + 1 X16 + X12 + X5 + 1 CRCDOR_HA CRC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1188 of 1551
RA4W1
33. CRC
33.2.5 CRCSAR
CRC.CRCSAR 4007 400Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
CRCSA[13:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b13-b0 b15-b14
CRCSA[13:0] --
R/W
SCI TDR RDR R/W
0 0
R/W
CRCSA[13:0] CRC 14
CRCSA[13:0] 4007 0003h : SCI0.TDR, 4007 0005h : SCI0.RDR 4007 0023h : SCI1.TDR, 4007 0025h : SCI1.RDR 4007 0123h : SCI9.TDR, 4007 0125h : SCI9.RDR 4007 000Fh : SCI0.FTDRL, 4007 0011h : SCI0.FRDRL 4007 002Fh : SCI1.FTDRL, 4007 0031h : SCI1.FRDRL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1189 of 1551
RA4W1
33. CRC
33.3
33.3.1
CRC LSB MSB CRC
16 CRC-CCITT X16 + X12 + X5 + 1F0h CRC CRC CRC CRCDOR_HA
8 CRCX8 + X2 + X + 1 CRCDOR_BY CRC 32 CRC CRCDOR CRC
33.2 33.3 LSB MSB 33.4 33.5 LSB MSB
1. CRC 0 (CRCCR0) 83h
CRCCR0
CRCDOR_HA
7
0
15
87
0
10000011
0 000 00 000000 00 0 0
CRCDOR/CRCDOR_HA/CRCDOR_BY
2. CRC (CRCDIR_BY) F0h
CRCDIR_BY
CRCDOR_HA
7
0
15
87
0
11110000
1 11 1 0 1 1 1 10 00 1 1 1 1
CRC
3. CRC (CRCDOR_HA) CRC = F78Fh
4. 8LSB
CRC
7
07
07
0
1111011110001111 11110000
F
7
8
F
F
0
33.2
LSB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1190 of 1551
RA4W1
33. CRC
1. CRC0 (CRCCR0) C3h
CRCCR0
CRCDOR_HA
7
0
15
87
0
11000011
0 000 00 000000 00 0 0
CRCDOR/CRCDOR_HA/CRCDOR_BY
2. CRC (CRCDIR_BY) F0h
CRCDIR_BY
CRCDOR_HA
7
0
15
87
0
11110000
1 1 1 01 1 1 1 0 001 1 11 1
CRC
3. CRC (CRCDOR_HA) CRC = EF1Fh
4. 8MSB
CRC
7
07
07
0
11 110 000 1110 1111 0 0 011 111
F
0
E
F
1
F
33.3
MSB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1191 of 1551
RA4W1
33. CRC
1. 8LSB
CRC
7
07
07
0
1111011110001111 11110000
F
7
8
F
F
0
2. CRC (CRCCR0) 83h
CRCCR0
CRCDOR_HA
7
0
15
87
0
10000011
0000000000000000
CRCDOR/CRCDOR_HA/CRCDOR_BY
3. CRC (CRCDIR_BY) F0h
CRCDIR_BY
CRCDOR_HA
7
0
15
87
0
11110000
1111011110001111
CRC
4. CRC (CRCDIR_BY) 8Fh
CRCDIR_BY
7
0
10001111
CRCDOR_HA
15
87
0
0 0 0 0 0 0 0 01 1 1 1 0 1 1 1
CRC
5. CRC (CRCDIR_BY) F7h
CRCDIR_BY
CRCDOR_HA
7
0
15
87
0
11110111
0000000000000000
CRC
6. CRC (CRCDOR_HA) CRC = 0000h
33.4
LSB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1192 of 1551
RA4W1
33. CRC
1. 8MSB
CRC
7
07
07
0
1111000011101111 00011111
F
0
E
F
1
F
2. CRC 0 (CRCCR0) C3h
CRCCR0
CRCDOR_HA
7
0
15
87
0
11000011
0000000000000000
CRCDOR/CRCDOR_HA/CRCDOR_BY
3. CRC (CRCDIR_BY) F0h
CRCDIR_BY
7
0
11110000
CRCDOR_HA
15
87
0
1110111100011111
CRC
4. CRC (CRCDIR_BY) EFh
CRCDIR_BY
CRCDOR_HA
7
0
15
87
0
11101111
0 0 0 1 1 1 1 10 0 0 0 0 0 0 0
CRC
5. CRC (CRCDIR_BY) 1Fh
CRCDIR_BY
CRCDOR_HA
7
0
15
87
0
00011111
0000000000000000
CRC
6. CRC (CRCDOR_HA) CRC = 0000h
33.5
MSB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1193 of 1551
RA4W1
33. CRC
33.3.2 CRC
CRC CRC CRC CRC CRCDIR_BY CRC CRCSAR I/O CRC
I/O CRCSAR CRCSA13 CRCSA0 CRCCR1 CRCSEN 1 CRCCR1.CRCSWR 1 CRCCR1.CRCSWR 0
CRCSEN 1CRCSWR 1 CPUDMADTC I/O CRC CRCDIR_BY CRC CRCSEN 1CRCSWR 0 CPUDMADTC I/O CRC CRCDIR_BY CRC
1 CRC I/O 16 32 1 CRC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1194 of 1551
RA4W1
33. CRC
33.4
33.4.1
CMSTPCRCCRC CRC 11.
33.4.2
LSB MSB CRC 33.6 LSB MSB
328
1. CRC
(1) (2) (3) (4)CRCDIR
7
0
CRCDIR
(1)
7
0
CRCDIR
(2)
7
0
CRCDIR
(3)
7 CRCDIR
15 CRCDOR
0 (4)
CRC
87
0
CRC (H)
CRC (L)
2.
(i) LSB
CRC
7
07
07
07
07
07
0
(H)
(L)
(4)
(3)
(2)
(1)
(ii) MSB
CRC
7
07
07
07
07
07
0
(1)
(2)
(3)
(4)
(H)
(L)
33.6
LSB MSB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1195 of 1551
RA4W1
34. 14 A/DADC14
34. 14 A/D ADC14
34.1
MCU 14 A/D ADC14 8 A/D 14
ADC14
2 A B
A B A B A/D A ADC14 B A/D A B A/D A A/D
1 A1 A/D 2 A/D A/D 2
1 ADC14 3 1 A/D
A/D A/D
VREFH0AVCC0 VREFL0AVSS0
ADC14 A B A B A/D
34.1 ADC14 34.2 34.1 34.3
34.1
ADC14 (1/2)
1 8 AN004 AN006, AN009, AN010, AN017, AN019, AN020
A/D A/D
14 14 12 1 0.79�sA/D PCLKCADCLK 64MHz PCLKB1 A/D PCLKCADCLK1 PCLKBPCLKCADCLK = 1:12:14:18:11:21:4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1196 of 1551
RA4W1
34. 14 A/DADC14
34.1
ADC14 (2/2)
28 A/D 2 1 A/D 2 2
1 1 1 A/D A/D A/D 12 14 A/D A/D + 2 A/D
4
1 A/D 1 2 A/D 2
1 A/D 2
1 A/D
A/D
A B 1 A/D A B A BA/D
A
B A/D A B A/D A A/D A A/D B A/D
A/D
ELC ADTRG0
ADC14 A/D
A/D 2 12/14 2 A/D
1 A/D ELC ADC140_ADI ADC140_CMPAI/ADC140_CMPBI
ELC ADC140_WCMPM
ELC ADC140_WCMPUM 2 A/D ELC ADC140_ADI A/D ELC ADC140_ADI AA/D ELCADC140_ADI B B A/DADC140_GBADI 2 A A/D ELC ADC140_ADI B B A/D ADC140_GBADI ADC140_ADIADC140_GBADIADC140_WCMPMADC140_WCMPUM DMA DMACDTC
ELC
ELC
VREFH0AVCC0 VREFL0 AVSS0
3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1197 of 1551
RA4W1
34. 14 A/DADC14
. 1.
2. 3. 4.
PCLKB SCKDIVCR.PCKB[2:0] A/D ADCLK SCKDIVCR.PCKC[2:0] PCLKB 32MHz PCLKCADCLK 64MHz
A/D A/D 34.3.6
11. A/D A/D 12 14 2 4 3
34.2
ADC14
A/D
ELC ELC
ELC 1 2
ADC140
AN004 AN006, AN009, AN010, AN017, AN019, AN020
ADTRG0
ELC_AD00 ELC_AD01
ADC140_ADI ADC140_GBADI ADC140_CMPAI ADC140_CMPBI
ADC140_ADI ADC140_WCMPM ADC140_WCMPUM
MSTPCRD.MSTPD16
1. 2.
11. A/D 1s
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1198 of 1551
RA4W1
34. 14 A/DADC14
AVCC0
AVSS0
D/A
A/D A/D
MUX MUX
AN020 AN019 AN017 AN010 AN009
VREFL0/AN006 VREFH0/AN005
AN004
MUX
+
&
-
(ADC140_ADI, ADC140_GBADI, ADC140_CMPAI, ADC140_CMPBI)
ELC (ADC140_ADI, ADC140_WCMPM, ADC140_WCMPUM)
(ELC_AD00, ELC_AD01)
(ADTRG0)
34.1
ADC14
34.3
0
ADC14
AVCC0
AVSS0
VREFH0
VREFL0
AN004 AN006, AN009, AN010, AN017, AN019, AN020
ADTRG0
4 6, 9, 10, 17, 19, 20
A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1199 of 1551
RA4W1
34. 14 A/DADC14
34.2
34.2.1
A/D yADDRyA/D 2 ADDBLDR A/D 2 AADDBLDRAA/D 2 B ADDBLDRBA/D ADTSDRA/D ADOCDR
ADDRy y = 4 6, 9, 10, 17, 19, 20A/D 16 ADDBLDR 2 A/D 16
ADDBLDRA ADDBLDRB A/D
16 ADTSDR A/D 16 ADOCDR A/D 16
A/D ADCER.ADRFMT A/D ADCER.ADPRC[1:0]12 14 ADADC.ADC[2:0]1 2 3 4 16 ADADC.AVEE
(1) A/D
14
ADC140.ADDR4 4005 C028hADC140.ADDR6 4005 C02Ch, ADC140.ADDR9 4005 C032h, ADC140.ADDR10 4005 C034h, ADC140.ADDR17 4005 C042h, ADC140.ADDR19 4005 C046h, ADC140.ADDR20 4005 C048h, ADC140.ADDBLDR 4005 C018h, ADC140.ADDBLDRA 4005 C084h, ADC140.ADDBLDRB 4005 C086h, ADC140.ADTSDR 4005 C01Ah, ADC140.ADOCDR 4005 C01Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
AD[13:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b13-b0
AD[13:0]
13 0
14 A/D
R
b15-b14
--
0
R
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1200 of 1551
RA4W1
34. 14 A/DADC14
12
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
AD[11:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b11-b0
AD[11:0]
11 0
12 A/D
R
b15-b12
--
0
R
14
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
AD[13:0]
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b1-b0
--
0
R
b15-b2
AD[13:0]
13 0
14 A/D
R
12
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
AD[11:0]
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b3-b0
--
0
R
b15-b4
AD[11:0]
11 0
12 A/D
R
(2) A/D
A/D 2 4 A/D A/D A/D A/D A/D A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1201 of 1551
RA4W1
34. 14 A/DADC14
(3) A/D
12 14 ADPRC A/D 1 2 3 4 12 16
A/D A/D A/D
1 2 3 4 12 14 2 A/D
12 16 4 A/D
14 A/D
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
AD[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b15-b0
AD[15:0]
15 0
16 A/D
R
12 A/D
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
AD[15:0] 1
--
--
AD[13:0] 2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15-b0
AD[15:0] 1
15 0
16 A/D
b13-b0 b15-b14
AD[13:0] 2 --
13 0
14 A/D 0
1. 2.
A/D 16 A/D 1 2 3 4
R/W R
R/W R R
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1202 of 1551
RA4W1
34. 14 A/DADC14
14 A/D
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
AD[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b15-b0
AD[15:0]
15 0
16 A/D
R
12 A/D
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
AD[15:0] 1
AD[13:0] 2
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15-b0
AD[15:0] 1
15 0
16 A/D
b1-b0 b15-b2
-- AD[13:0] 2
13 0
0 14 A/D
1. 2.
A/D 16 A/D 1 2 3 4
R/W R
R/W R R
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1203 of 1551
RA4W1
34. 14 A/DADC14
34.2.2 A/D ADRD
ADRD ADC14 A/D 16 A/D AD[13:0] DIAGST
A/D ADCER.ADRFMT
A/D ADCER.ADPRC[1:0]12 14
A/D A/D A/D 34.2.11A/D ADCER
14
ADC140.ADRD 4005 C01Eh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
DIAGST[1:0]
AD[13:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b13-b0 AD[13:0]
13 0
14 A/D
R
b15-b14 DIAGST[1:0] b15 b14
R
0 0
0 10V
1 01 � 1/2
1 11
34.2.11A/D
ADCER
1. VREFH0
12
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
DIAGST[1:0] --
--
AD[11:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b11-b0 b13-b12 b15-b14
AD[11:0] -- DIAGST[1:0]
11 0
1. VREFH0
R/W
12 A/D
R
0
R
b15 b14
R
0 0
0 10V
1 01 � 1/2
1 11
34.2.11A/D
ADCER
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1204 of 1551
RA4W1
34. 14 A/DADC14
14
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
AD[13:0]
DIAGST[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b1-b0
DIAGST[1:0]
b15-b2 AD[13:0]
13 0
1. VREFH0
R/W
b1 b0
R
0 0
0 10V
1 01 � 1/2
1 11
34.2.11A/D
ADCER
14 A/D
R
12
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
AD[11:0]
--
-- DIAGST[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b1-b0
DIAGST[1:0]
b1 b0
R
0 0
0 10V
1 01 � 1/2
1 11
34.2.11A/D
ADCER
b3-b2
--
0
R
b15-b4 AD[11:0]
11 0
12 A/D
R
1. VREFH0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1205 of 1551
RA4W1
34. 14 A/DADC14
34.2.3 A/D ADCSR
ADC140.ADCSR 4005 C000h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
ADST ADCS[1:0]
--
--
ADHSC TRGE EXTRG DBLE
GBADI E
--
DBLANS[4:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b4-b0 b5 b6
b7 b8 b9 b10 b12-b11 b14-b13
b15
DBLANS[4:0]
-- GBADIE
B
DBLE EXTRG TRGE ADHSC -- ADCS[1:0]
1 A/D
ADST
A/D
R/W
1 R/W
0 0
R/W
0 B ADC140_GBADI R/W
1 B ADC140_GBADI
B
0
R/W
1
0ELCA/D
R/W
1ADTRG0 A/D
0 A/D
R/W
1 A/D
0 A/D
R/W
1 A/D
0 0
R/W
b14 b13
0 0 0 1 1 0 1 1
R/W
0A/D
R/W
1A/D
1.
A/D ADTRG0 High ADCSR.TRGE ADCSR.EXTRG 1 ADTRG0 Low ADTRG0 Low 1.5PCLKB
DBLANS[4:0]
A/D 2 1 1 A/D A/D y 2 A/D A/D 2 34.4
ADANSA0ADANSA1 DBLANS[4:0] A/D
A B B
DBLANS[4:0] ADST 0 ADST 1
A/D DBLANS[4:0] ADANSA0ADANSA1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1206 of 1551
RA4W1
34. 14 A/DADC14
34.4
DBLANS
DBLANS[4:0]
2
DBLANS[4:0]
00100
AN004
10001
00101
AN005
10011
00110
AN006
10100
01001
AN009
01010
AN010
2 AN017 AN019 AN020
.
A/D
GBADIE B
B ADC140_GBADI
DBLE
ADSTRGR.TRSA[5:0] ELC
1 ADC140_ADI 2
1 DBLANS[4:0] A/D A/D y 2 A/D 2
DBLE ADANSA0 ADANSA1
DBLE ADST 0 ADST 1
EXTRG A/D
TRGE
A/D 1
ADHSC A/D A/D 34.8.8ADHSC
ADCS[1:0]
ADANSA0ADANSA1 A/D 8 A/D A/D A/D
ADCSR.ADST 1 ADANSA0ADANSA1 A/D A/D ADCSR.ADST 0 A/D A/D A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1207 of 1551
RA4W1
34. 14 A/DADC14
ADSTRGR.TRSA[5:0] ELC A ADANSA0ADANSA1 8 A AD A/D A/D
ADSTRGR.TRSB[5:0] ELC B ADANSB0ADANSB1 8 B AD A/D
A B A/D A ADGSPCR.PGS 1 A
A B
A/D A/D
ADCS[1:0] ADST 0 ADCS[1:0] ADST 1
34.5
A/D
A/D
DBLE = 0 DBLE = 1 DBLE = 0 DBLE = 1 DBLE = 0 DBLE = 1
� � �
A
1ch
�
1ch
B
� � � �
� � � � �
�
� � � � �
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1208 of 1551
RA4W1
34. 14 A/DADC14
ADST A/D A/D ADST 1 A/D
1 1
ADCSR.EXTRG 0ADCSR.TRGE 1 ADSTRGR.TRSA[5:0] ELC
ADCSR.TRGE 1 ADSTRGR.TRSB[5:0] ELC
ADCSR.TRGE ADCSR.EXTRG 1ADSTRGR.TRSA[5:0] 000000b
A ADCSR.ADCS[1:0] = 01b ADGSPCR.PGS = 1 ADGSPCR.GBRP 1 B A/D
0 0
A/D
A
B
A ADCSR.ADCS[1:0] = 01b ADGSPCR.PGS = 1 ADGSPCR.GBRP 1 B
. A ADCSR.ADCS[1:0] = 01b ADGSPCR.PGS = 1 ADST 1
. A ADCSR.ADCS[1:0] = 01b ADGSPCR.PGS = 1 ADGSPCR.GBRP = 1 ADST 0 A/D ADST
. ADCSR.ADCS[1:0] = 01b ADGSPCR.PGS = 1 ADGSPCR.GBRP = 1ADST 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1209 of 1551
RA4W1
34. 14 A/DADC14
34.2.4 A/D A0ADANSA0
ADC140.ADANSA0 4005 C004h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
ANSA1 ANSA0
0
9
--
--
ANSA0 ANSA0 ANSA0
6
5
4
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b3-b0 b6-b4
-- ANSA06 ANSA04
A/D
b8-b7 b10-b9
-- ANSA10, ANSA09
A/D
b15-b11 --
R/W
00
R/W
0
R/W
1
6ANSA06 AN006 4
ANSA04 AN004
00
R/W
0
R/W
1
10ANSA10 AN010 9
ANSA09 AN009
00
R/W
ANSAn n = 04 06, 09, 10A/D
ANSAn.ADANSA0 A/D AN004 AN006, AN009, AN010 ANSA04 AN004 ANSA10 AN010
A/D 0000h
ADCSR.DBLANS[4:0] A ADANSA0
A/D B0ADANSB0 A/D B1ADANSB1
ADANSA0 ADCSR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1210 of 1551
RA4W1
34. 14 A/DADC14
34.2.5 A/D A1ADANSA1
ADC140.ADANSA1 4005 C006h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
ANSA2 ANSA1
0
9
--
ANSA1 7
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
--
0 0
R/W
b1
ANSA17
A/D
0
R/W
1
1ANSA17 AN017
b2
--
0 0
R/W
b4-b3
ANSA20, ANSA19
A/D
0
R/W
1
4ANSA20AN020 3
ANSA19 AN019
b15-b5
--
0 0
R/W
ANSAn n = 17, 19, 20A/D
ADANSA1.ANSAn A/D AN017, AN019, AN020 ANSA17 AN017ANSA20 AN020
A/D 0000h
ADCSR.DBLANS[4:0] 1 A ADANSA1
A/D B0ADANSB0 A/D B1ADANSB1
ADANSA1 ADCSR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1211 of 1551
RA4W1
34. 14 A/DADC14
34.2.6 A/D B0ADANSB0
ADC140.ADANSB0 4005 C014h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
ANSB1 ANSB0
0
9
--
--
ANSB0 ANSB0 ANSB0
6
5
4
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b3-b0
--
0 0
R/W
b6-b4
ANSB06 ANSB04 A/D
0
R/W
1
6ANSB06 AN006 4
ANSB04 AN004
b8-b7
--
0 0
R/W
b10-b9 ANSB10, ANSB09
0
R/W
1
10ANSB10 AN010 9
ANSB09 AN009
b15-b11 --
0 0
R/W
ANSBn n = 04 06, 09, 10A/D
ADANSB0.ANSBn B A/D AN004 AN006, AN009, AN010 ADANSB0 A ADANSA0ADANSA1 ADCSR.DBLANS[4:0] A
ANSB04 AN004ANSB06 AN006ANSB10 AN010
A/D 0000h
ADANSB ADCSR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1212 of 1551
RA4W1
34. 14 A/DADC14
34.2.7 A/D B1ADANSB1
ADC140.ADANSB1 4005 C016h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
ANSB2 ANSB1
0
9
--
ANSB1 7
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0 b1
-- ANSB17
A/D
b2 b4-b3
-- ANSB20, ANSB19
A/D
b15-b5
--
R/W
0 0
R/W
0
R/W
1
1ANSB17AN017
0 0
R/W
0
R/W
1
4ANSB20AN0203
ANSB19 AN019
0 0
R/W
ANSBn n = 17 ,19, 20A/D
ADANSB1.ANSBn B A/D AN017, AN019, AN020 ADANSB1 A ADANSA0ADANSA1 ADCSR.DBLANS[4:0]
ANSB17 AN017ANSB19 AN019ANSB20 AN020
A/D 0000h
ADANSB1 ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1213 of 1551
RA4W1
34. 14 A/DADC14
34.2.8 A/D 0ADADS0
ADC140.ADADS0 4005 C008h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
-- ADS10 ADS09 --
-- ADS06 ADS05 ADS04 --
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b3-b0 b6-b4
-- ADS06 ADS04
b8-b7 b10-b9
-- ADS10, ADS09
b15-b11 --
00
A/D
0 1 6ADS06AN006 4 ADS04 AN004
00
A/D
0 1 10ADS10AN010 9 ADS09 AN009
00
R/W R/W R/W
R/W R/W
R/W
ADSn n = 04 06, 09, 10A/D
ADANSA0.ANSAn n = 04 06, 09, 10 ADCSR.DBLANS[4:0] A/D A/D ADANSB0.ANSBn n = 04 06, 09, 10 1 ADADC.ADC[2:0] 1 16 A/D
ADADC.AVEE 0 ADADC.AVEE 1 A/D A/D 1 A/D
ADADS0 ADCSR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1214 of 1551
RA4W1
34. 14 A/DADC14
34.2.9 A/D 1ADADS1
ADC140.ADADS1 4005 C00Ah
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
-- ADS20 ADS19 -- ADS17 --
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0 b1
-- ADS17
b2 b4-b3
-- ADS20, ADS19
b15-b5
--
R/W
0 0 R/W
A/D 0
R/W
1
1ADS17 AN017
0 0 R/W
A/D 0
R/W
1
4ADS20 AN020 3
ADS19 AN019
0 0 R/W
ADSn n = 17, 19, 20A/D
ADANSA1.ANSAn n = 17, 19, 20 ADCSR.DBLANS[4:0] A/D A/D ADANSB1.ANSBn n = 17, 19, 20 1 ADADC.ADC[2:0] 1 16 A/D
ADADC.AVEE 0 ADADC.AVEE 1 A/D A/D 1 A/D
ADADS1 ADCSR.ADST 0
34.2 ADADS0.ADS06 ADADS1.ADS19 1
ADADS.AVEE = 0
4 ADADC.ADC[1:0] = 11b
ADCSR.ADCS[1:0] = 10b AN004 AN006, AN009, AN010, AN017, AN019, AN020 ADANSA0.ANSA0[15:0] = 0670h, ADANSA1.ANSA1[15:0] = 001Ah
AN004 AN006 4 A/D 6 ADDR6AN009 AN019 4 A/D 19ADDR19AN020 AN004
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1215 of 1551
RA4W1
34. 14 A/DADC14
34.2
4
AN006
3
AN006
AN019 AN019
AN006 AN006
2
AN006
AN019
AN006
1 AN004 AN005 AN006 AN009 AN010 AN017 AN019 AN020 AN004 AN005 AN006 � � �
ADADC.ADC[2:0] = 011bADADS0.ADS06 = 1ADADS1.ADS19 = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1216 of 1551
RA4W1
34. 14 A/DADC14
34.2.10 A/D ADADC
ADC140.ADADC 4005 C00Ch
b7
b6
b5
b4
b3
b2
b1
b0
AVEE --
--
--
--
ADC[2:0]
0
0
0
0
0
0
0
0
R/W
b2-b0
ADC[2:0]
b2
b0
0 0 01
R/W
0 0 12 1
0 1 03 2
0 1 14 3
1 0 116 15
b6-b3
--
0 0
R/W
b7
AVEE
0 1
1 2
R/W
1. 2.
ADADC.AVEE 0 1 2 3 4 16 16 12 ADADC.AVEE 1 2 4 3 16 ADC[2:0] = 010b 101b
ADC[2:0]
ADCSR.DBLANS[4:0] A/D A/D
ADC[2:0]
ADADC.AVEE 1 14 ADCER.ADPRC[1:0] = 11b 3 16 ADADC.ADC[2:0] = 010b 101b
ADCER.DIAGM = 1ADC[2:0] 000b
14 ADCER.ADPRC[1:0] = 11bADC[2:0] 101b
ADC[2:0] ADCSR.ADST 0
AVEE
ADCSR.DBLANS[4:0] A/D A/D
ADADC.AVEE 1 3 ADADC.ADC[2:0] = 010b
AVEE ADCSR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1217 of 1551
RA4W1
34. 14 A/DADC14
34.2.11 A/D ADCER
ADC140.ADCER 4005 C00Eh
b15 b14 b13 b12 b11 b10 b9
b8
b7
ADRFM T
--
--
--
DIAGM
DIAGL D
DIAGVAL[1:0]
--
0
0
0
0
0
0
0
0
0
b6
b5
b4
-- ACE --
0
0
0
b3
b2
b1
b0
--
ADPRC[1:0]
--
0
0
0
0
b0 b2-b1
b4-b3 b5 b7-b6 b9-b8
b10 b11 b14-b12 b15
R/W
--
00
R/W
ADPRC[1:0] A/D
b2 b1
0 012 0 1 1 0 1 114
R/W
--
00
R/W
ACE
A/D 0
R/W
1
--
00
R/W
DIAGVAL[1:0]
b9 b8
0 0
0 10V 1 01� 1/2 1 11
R/W
DIAGLD
0
R/W
1
DIAGM
0ADC14
R/W
1ADC14
--
00
R/W
ADRFMT
A/D 0A/D R/W 1A/D
1. VREFH0
ADPRC[1:0] A/D
A/D 12 14 A/D A/D
34.3.6ADPRC[1:0] ADCSR.ADST 0
ACE A/D
CPUDTC DMAC ADDRyADRDADDBLDRADDBLDRAADDBLDRB ADTSDRADOCDR 0
DIAGVAL[1:0]
ADCER.DIAGLD
ADCER.DIAGVAL[1:0] 00b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1218 of 1551
RA4W1
34. 14 A/DADC14
DIAGLD
3
DIAGLD 0 0V � 1/2 0V 0
DIAGLD 1 ADCER.DIAGVAL[1:0]
DIAGLD ADCSR.ADST 0
DIAGM
ADC14 0V � 1/2 3 A/D ADRDADRD
1 3 1 A/D ADCSR.DBLE = 1DIAGM = 0 A B
DIAGM ADCSR.ADST 0
ADRFMT A/D
ADDRyADDBLDRADDBLDRAADDBLDRBADTSDRADOCDRADCMPDR0/1ADWINLLB ADWINULBADRD
ADRFMT ADCSR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1219 of 1551
RA4W1
34. 14 A/DADC14
34.2.12 A/D ADSTRGR
ADC140.ADSTRGR 4005 C010h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
TRSA[5:0]
--
--
TRSB[5:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b5-b0 b7-b6 b13-b8
b15-b14
TRSB[5:0] -- TRSA[5:0]
--
R/W
B A/D B A/D R/W
00
R/W
A/D
A/D R/W A A/D
00
R/W
TRSB[5:0] B A/D
B TRSB[5:0] B TRSB[5:0] 000000b ADCSR.TRGE 1
A ADGSPCR.GBRP 1 B ADGSPCR.GBRP 1 TRSB[5:0] 3Fh tSCAN tSCAN A/D
A/D GPT 34.3.6 34.6 TRSB[5:0] A/D
34.6
TRSB[5:0] A/D
TRSB[5]
TRSB[4]
1
1
ELC_AD00
ELC
0
0
ELC_AD01
ELC
0
0
ELC_AD00/ELC_AD01
ELC
0
0
TRSB[3] 1 1 1 1
TRSB[2] 1 0 0 0
TRSB[1] 1 0 1 1
TRSB[0] 1 1 0 1
TRSA[5:0] A/D
A/D A
ELC A/D ADCSR.TRGE 1 ADCSR.EXTRG 0
ADCSR.ADSTADCSR.TRGE ADCSR.EXTRG TRSA[5:0] tSCAN tSCAN A/D 34.3.6
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1220 of 1551
RA4W1
34. 14 A/DADC14
34.7 TRSA[5:0] A/D
34.7
TRSA[5:0] A/D
TRSA[5] TRSA[4]
1
1
ADTRG0
0
0
ELC_AD00
ELC
0
0
ELC_AD01
ELC
0
0
ELC_AD00/ELC_AD01
ELC
0
0
TRSA[3] 1 0 1 1 1
TRSA[2] 1 0 0 0 0
TRSA[1] 1 0 0 1 1
TRSA[0] 1 0 1 0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1221 of 1551
RA4W1
34. 14 A/DADC14
34.2.13 A/D ADEXICR
ADC140.ADEXICR 4005 C012h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
-- OCSA TSSA --
--
--
--
--
-- OCSAD TSSAD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
TSSAD
A/D
0 A/D
R/W
1 A/D
b1
OCSAD
A/D 0 A/D
R/W
1 A/D
b7-b2
--
0 0
R/W
b8
TSSA
A/D
0A/D
R/W
1A/D
b9
OCSA
A/D
0 A/D
R/W
1 A/D
b15-b10 --
0 0
R/W
TSSAD A/D
TSSAD 1 ADADC.ADC[2:0] A/D 34.2.1 ADADC.AVEE 0 ADADC.AVEE 1 A/D ADTSDR
TSSAD ADCSR.ADST 0
OCSAD A/D
OCSAD 1 ADADC.ADC[2:0] A/D 34.2.1 ADADC.AVEE 0 ADADC.AVEE 1 A/D ADOCDR
OCSAD ADCSR.ADST 0
TSSA A/D
A/D
A/D
1. ADANSA0/1 ADANSB0/1 ADCSR.DBLE ADEXICR.OCSA 0
2. A/D
A/D ADDISCR 0Fh ADC14 15ADCLK 5s ADC14 A/D
TSSA ADCSR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1222 of 1551
RA4W1
34. 14 A/DADC14
OCSA A/D
A/D
A/D
1. ADANSA0/1 ADANSB0/1 ADCSR.DBLE ADEXICR.TSSA 0
2. A/D
A/D ADDISCR 0Fh ADC14 15ADCLK 5s ADC14 A/D
OCSA ADCSR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1223 of 1551
RA4W1
34. 14 A/DADC14
34.2.14 A/D nADSSTRnn = 00, 04 06, 09, 10, L, T, O
ADC140.ADSSTR00 4005 C0E0h, ADC140.ADSSTR04 4005 C0E4h ADC140.ADSSTR06 4005 C0E6h, ADC140.ADSSTR09 4005 C0E9h, ADC140.ADSSTR10 4005 C0EAh, ADC140.ADSSTRL 4005 C0DDh, ADC140.ADSSTRT 4005 C0DEh, ADC140.ADSSTRO 4005 C0DFh
b7
b6
b5
b4
b3
b2
b1
b0
SST[7:0]
0
0
0
0
1
1
0
1
R/W
b7-b0
SST[7:0]
5 255
R/W
ADSSTRn 1 = 1ADCLKA/D ADCLK 64MHz 1 = 15.625ns 13
ADCLK
SST[7:0] ADCSR.ADST 0
PCLKBPCLKCADCLK 1:12:14:1 8:1 5
PCLKBPCLKCADCLK 1:2 1:4 6
34.8 A/D 34.3.6
34.8
A/D
ADSSTR00.SST[7:0] ADSSTR04.SST[7:0] ADSSTR05.SST[7:0] ADSSTR06.SST[7:0] ADSSTR09.SST[7:0] ADSSTR10.SST[7:0] ADSSTRL.SST[7:0] ADSSTRT.SST[7:0] ADSSTRO.SST[7:0]
AN004 AN005 AN006 AN009 AN010 AN017, AN019, AN020 1 1
1.
5s SST[7:0] 255 ADCLK 5s
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1224 of 1551
RA4W1
34. 14 A/DADC14
34.2.15 A/D ADDISCR
ADC140.ADDISCR 4005 C07Ah
b7
b6
b5
b4
b3
b2
b1
b0
--
--
-- PCHG
ADNDIS[3:0]
0
0
0
0
0
0
0
0
R/W
b3-b0 ADNDIS[3:0]
b3
b0
0 0 0 0
R/W
0 0 0 1
b4
PCHG
0
R/W
1
b7-b5 --
0 0
R/W
ADDISCR A/D ADDISCR ADCSR.ADST 0
A/D ADEXICR.OCSA TSSA 1 ADDISCR 0Fh15ADCLK A/D 5s
A/D
ADNDIS[3:0]
ADNDIS[3:0] ADNDIS[3:0] = 0000b ADNDIS[3:0] = 0001b ADNDIS[3:0] = 0000b 0001b ADNDIS[3:0] 0000b 0001b
PCHG
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1225 of 1551
RA4W1
34. 14 A/DADC14
34.2.16 A/D ADGSPCR
ADC140.ADGSPCR 4005 C080h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
GBRP --
--
--
--
--
--
--
--
--
--
--
--
--
GBRSC N
PGS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
PGS
b1
GBRSCN
b14-b2 b15
-- GBRP
A 1 B
B 2
0 A 1 A
PGS = 1 PGS = 0 0 AB
B 1 AB
B
00
PGS = 1 PGS = 0 0 B 1 B
R/W R/W R/W
R/W R/W
1. 2.
ADCSR.ADCS[1:0] PGS 1 01b GBRP 1 GBRSCN B
PGS A
PGS 1 A PGS 1 ADCSR.ADCS[1:0] 01b
PGS 0 34.8.2A/D PGS 1 34.3.4.3 A
GBRSCN B
A B GBRSCN 1 A B A A/D B A A/D B A B
GBRSCN 0 A/D GBRSCN ADCSR.ADST 0
GBRSCN PGS 1
GBRP B
B GBRP 1 B B A B A A B
GBRP 1 B GBRP 1 GBRSCN GBRP ADCSR.ADST 0
GBRP PGS 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1226 of 1551
RA4W1
34. 14 A/DADC14
34.2.17 A/D ADCMPCR
ADC140.ADCMPCR 4005 C090h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
CMPAI WCMP CMPBI
E
E
E
--
CMPAE
--
CMPBE
--
--
--
--
--
--
--
CMPAB[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b1-b0
b8-b2 b9 b10 b11 b12 b13 b14
b15
CMPAB[1:0]
-- CMPBE -- CMPAE -- CMPBIE WCMPE
CMPAIE
R/W
A/B b1 b0
R/W
0 0 A OR B
ADC140_WCMPM
ADC140_WCMPUM
0 1 A EXOR B
ADC140_WCMPM
ADC140_WCMPUM
1 0 A AND B
ADC140_WCMPM
ADC140_WCMPUM
1 1
A B
CMPAE = 1 CMPBE = 1
0 0
R/W
B 0 B
R/W
ADC140_WCMPMADC140_WCMPUM
1 B
0 0
R/W
A 0 A
R/W
ADC140_WCMPMADC140_WCMPUM
1 A
0 0
R/W
B 0 BADC140_CMPBI R/W
1 BADC140_CMPBI
0
R/W
A B 1
A/D
1
A B
2 A/D
A 0 AADC140_CMPAI R/W
1 AADC140_CMPAI
CMPAB[1:0] A/B
A B CMPAE = 1 CMPBE = 1CMPAB[1:0] ADWINMON.MONCONB
CMPAB[1:0] ADCSR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1227 of 1551
RA4W1
34. 14 A/DADC14
CMPBE B B CMPBE ADCSR.ADST 0 0 A/D A0/A1/B0/B1ADANSA0ADANSA1ADANSB0ADANSB1 A/D ADEXICR OCSA TSSA B ADCMPBNSR CMPCHB[5:0]
CMPAE A A CMPAE ADCSR.ADST 0 0 A/D A0/A1/B0/B1ADANSA0ADANSA1ADANSB0ADANSB1 A/D ADEXICR OCSA TSSA A 0/1ADCMPANSR0ADCMPANSR1 A ADCMPANSER
CMPBIE B B ADC140_CMPBI
WCMPE WCMPE ADCSR.ADST 0
CMPAIE A A ADC140_CMPAI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1228 of 1551
RA4W1
34. 14 A/DADC14
34.2.18 A/D A 0ADCMPANSR0
ADC140.ADCMPANSR0 4005 C094h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
CMPC CMPC HA10 HA09
--
--
CMPC CMPC CMPC HA06 HA05 HA04
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b3-b0 --
0 0
R/W
b6-b4
CMPCHA06 A 0 R/W
CMPCHA04
1
6CMPCHA06 AN006 4
CMPCHA04 AN004
b8-b7 --
0 0
R/W
b10-b9 CMPCHA10, CMPCHA09
0 R/W 1 10CMPCHA10 AN010 9 CMPCHA09 AN009
b15-b11 --
0 0
R/W
CMPCHAn n = 04 06, 09, 10 A
ADANSA0.ANSAn n = 04 06, 09, 10 ADANSB0.ANSBn n = 04 06, 09, 10 A/D CMPCHAn 1
CMPCHAn ADCSR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1229 of 1551
RA4W1
34. 14 A/DADC14
34.2.19 A/D A 1ADCMPANSR1
ADC140.ADCMPANSR1 4005 C096h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
CMPC CMPC HA20 HA19
--
CMPC HA17
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b0
--
0 0
R/W
b1
CMPCHA17 A 0 R/W
1
1CMPCHA17 AN017
b2
--
0 0
R/W
b4-b3
CMPCHA20, A 0 R/W
CMPCHA19
1
4CMPCHA20 AN020 3
CMPCHA19 AN019
b15-b5 --
0 0
R/W
CMPCHAn n = 17, 19, 20 A
ADANSA1.ANSAn n = 17, 19, 20 ADANSB1.ANSBn n = 17, 19, 20 A/D CMPCHAn 1
CMPCHAn ADCSR.ADST 0
34.2.20 A/D A ADCMPANSER
ADC140.ADCMPANSER 4005 C092h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
--
CMPO CMPTS
CA
A
0
0
0
R/W
b0
CMPTSA
0 A
R/W
1 A
b1
CMPOCA
0 A
R/W
1 A
b7-b2
--
0 0
R/W
CMPTSA ADEXICR.TSSA 1 CMPTSA 1 A
CMPTSA ADSCR.ADST 0
CMPOCA ADEXICR.OCSA 1 CMPOCA 1 A
CMPOCA ADSCR.ADST 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1230 of 1551
RA4W1
34. 14 A/DADC14
34.2.21 A/D A 0ADCMPLR0
ADC140.ADCMPLR0 4005 C098h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
CMPLC CMPLC HA10 HA09
--
--
CMPLC CMPLC CMPLC HA06 HA05 HA04
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b3-b0 b6-b4
--
CMPLCHA06 CMPLCHA04
b8-b7 b10-b9
--
CMPLCHA10, CMPLCHA09
b15-b11 --
R/W
0 0
R/W
A A AN004AN006 R/W
34.3
ADCMPCR.WCMPE 0
0ADCMPDR0 A/D
1ADCMPDR0 A/D
ADCMPCR.WCMPE 1
0A/D ADCMPDR0 ADCMPDR1 A/D
1ADCMPDR0 A/D ADCMPDR1
0 0
R/W
A A AN009AN010 R/W
34.3
ADCMPCR.WCMPE 0
0ADCMPDR0 A/D
1ADCMPDR0 A/D
ADCMPCR.WCMPE 1
0A/D ADCMPDR0 ADCMPDR1 A/D
1ADCMPDR0 A/D ADCMPDR1
0 0
R/W
CMPLCHAn n = 04 06, 09, 10 A
A AN004 AN006, AN009, AN010 CMPLCHAn CMPLCHA04CMPLCHA06 CMPLCHA10 AN004AN006AN010 ADCMPSR0.CMPSTCHAn 1 ADC140_CMPAI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1231 of 1551
RA4W1
34. 14 A/DADC14
CMPLCHAn = 0 ADCMPDR0A/D
ADCMPDR0A/D
CMPLCHAn = 0 ADCMPDR1A/D ADCMPDR0A/DADCMPDR1 A/DADCMPDR0 CMPLCHAn = 1 ADCMPDR1A/D ADCMPDR0A/DADCMPDR1 A/DADCMPDR0
CMPLCHAn = 1 ADCMPDR0A/D
ADCMPDR0A/D
34.3
A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1232 of 1551
RA4W1
34. 14 A/DADC14
34.2.22 A/D A 1ADCMPLR1
ADC140.ADCMPLR1 4005 C09Ah
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
CMPLC CMPLC HA20 HA19
--
CMPLC HA17
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0 b1
-- CMPLCHA17
b2 b4-b3
--
CMPLCHA20, CMPLCHA19
b15-b5
--
R/W
0 0
R/W
A A AN017 R/W
34.3
ADCMPCR.WCMPE 0
0ADCMPDR0 A/D
1ADCMPDR0 A/D
ADCMPCR.WCMPE 1
0A/D ADCMPDR0 ADCMPDR1 A/D
1ADCMPDR0 A/D ADCMPDR1
0 0
R/W
A A AN019 AN020 R/W
34.3
ADCMPCR.WCMPE 0
0ADCMPDR0 A/D
1ADCMPDR0 A/D
ADCMPCR.WCMPE 1
0A/D ADCMPDR0 ADCMPDR1 A/D
1ADCMPDR0 A/D ADCMPDR1
0 0
R/W
CMPLCHAn n = 17, 19, 20 A
A AN017, AN019, AN020 CMPLCHAn CMPLCHA17CMPLCHA19CMPLCHA20 AN017AN019AN020 ADCMPSR1.CMPSTCHAn 1 ADC140_CMPAI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1233 of 1551
RA4W1
34. 14 A/DADC14
34.2.23 A/D A ADCMPLER
ADC140.ADCMPLER 4005 C093h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
--
CMPLO CMPLT
CA
SA
0
0
0
R/W
b0
CMPLTSA
A 34.3
R/W
ADCMPCR.WCMPE 0
0ADCMPDR0 A/D
1ADCMPDR0 A/D
ADCMPCR.WCMPE 1
0AD ADCMPDR0 AD ADCMPDR1
1ADCMPDR0 A/D ADCMPDR1
b1
CMPLOCA A 34.3
R/W
ADCMPCR.WCMPE 0
0ADCMPDR0 A/D
1ADCMPDR0 A/D
ADCMPCR.WCMPE 1
0AD ADCMPDR0 AD ADCMPDR1
1ADCMPDR0 A/D ADCMPDR1
b7-b2 --
00
R/W
CMPLTSA A
A ADCMPSER.CMPSTTSA 1 ADC140_CMPAI
CMPLOCA A
A ADCMPSER.CMPSTOCA 1 ADC140_CMPAI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1234 of 1551
RA4W1
34. 14 A/DADC14
34.2.24
A/D A ADCMPDR0 A/D A ADCMPDR1 A/D B ADWINLLB A/D B ADWINULB
ADC140.ADCMPDR0 4005 C09Ch, ADC140.ADCMPDR1 4005 C09Eh, ADC140.ADWINLLB 4005 C0A8h, ADC140.ADWINULB 4005 C0AAh
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b15-b0
--
--
R/W
ADCMPDRyy = 0, 1 A
ADCMPDR0 A ADCMPDR1
ADWINULB ADWINLLB B ADWINLLB B ADWINULB ADCMPDRy ADWINULB ADWINLLB
ADCMPDRyADWINULB ADWINLLB A/D A/D 1
ADCMPDR1 ADCMPDR0ADWINULB ADWINLLBADCMPDR1 ADWINULB
1.
MCU A/D 34.4 2 ADCSR.ADST ADCMPCR.CMPAE ADCMPCR.CMPBE 0
ADCMPDR1/ ADWINULB
ADCMPDR0/ ADWINLLB
A/D1
A/D2
A/D3
34.4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1235 of 1551
RA4W1
34. 14 A/DADC14
ADCMPDRyADWINLLB ADWINULB A/D A/D 14 12 A/D A/D
(1) A/D
14 14 [13:0] 12 12 [11:0] 14 14 [15:2] 12 12 [15:4]
(2) A/D
14 [15:0] 12 14 [13:0] 14 [15:0] 12 14 [15:2]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1236 of 1551
RA4W1
34. 14 A/DADC14
34.2.25 A/D A 0ADCMPSR0
ADC140.ADCMPSR0 4005 C0A0h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
CMPST CMPST CHA10 CHA09
--
--
CMPST CMPST CMPST CHA06 CHA05 CHA04
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b3-b0 b6-b4
b8-b7 b10-b9
b15-b11
-- CMPSTCHA06 CMPSTCHA04
-- CMPSTCHA10, CMPSTCHA09
--
A
A
R/W
0 0
R/W
AADCMPCR.CMPAE = 1b R/W A AN004 AN006
0 1
0 0
R/W
AADCMPCR.CMPAE = 1b R/W A AN009, AN010
0 1
0 0
R/W
CMPSTCHAn n = 04 06, 09, 10 A
A AN004 AN006, AN009, AN010 ADCMPLR0.CMPLCHAn A/D 1 ADCMPCR.CMPAIE 1 1 ADC140_CMPAI CMPSTCHA04CMPSTCHA06CMPSTCHA10 AN004AN006AN010
CMPSTCHAn 1
1
ADCMPCR.CMPAE 1 ADCMPLR0.CMPLCHAn
0
1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1237 of 1551
RA4W1
34. 14 A/DADC14
34.2.26 A/D A 1ADCMPSR1
ADC140.ADCMPSR1 4005 C0A2h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
CMPST CMPST CHA20 CHA19
--
CMPST CHA17
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0 b1
-- CMPSTCHA17
b2 b4-b3
--
CMPSTCHA20, CMPSTCHA19
b15-b5 --
A
A
R/W
0 0
R/W
AADCMPCR.CMPAE = 1b R/W A AN017
0 1
0 0
R/W
AADCMPCR.CMPAE = 1b R/W A AN019, AN020
0 1
0 0
R/W
CMPSTCHAn n = 17, 19, 20 A
A AN017, AN019, AN020 ADCMPLR1.CMPLCHAn A/D CMPSTCHAn 1 ADCMPCR.CMPAIE 1 1 ADC140_CMPAICMPSTCHA17CMPSTCHA19CMPSTCHA20 AN017 AN019AN020 CMPSTCHAn 1
1
ADCMPCR.CMPAE 1 ADCMPLR1.CMPLCHAn
0
1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1238 of 1551
RA4W1
34. 14 A/DADC14
34.2.27 A/D A ADCMPSER
ADC140.ADCMPSER 4005 C0A4h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
--
CMPST CMPST OCA TSA
0
0
0
R/W
b0
CMPSTTSA A AADCMPCR.CMPAE = 1 R/W
0
1
b1
CMPSTOCA A AADCMPCR.CMPAE = 1 R/W
0
1
b7-b2
--
0 0
R/W
CMPSTTSA A ADCMPLER.CMPLTSA
A/D 1 ADCMPCR.CMPAIE 1 1 ADC140_CMPAI
CMPSTTSA 1 1 ADCMPCR.CMPAE 1 ADCMPLER.CMPLTSA
0 1 0
CMPSTOCA A ADCMPLER.CMPLOCA A/
D 1 ADCMPCR.CMPAIE 1 1 ADC140_CMPAI
CMPSTOCA 1 1 ADCMPCR.CMPAE 1 ADCMPLER.CMPLOCA
0 1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1239 of 1551
RA4W1
34. 14 A/DADC14
34.2.28 A/D B ADCMPBNSR
ADC140.ADCMPBNSR 4005 C0A6h
b7
b6
b5
b4
b3
b2
b1
b0
CMPLB --
CMPCHB[5:0]
0
0
0
0
0
0
0
0
b5-b0
CMPCHB[5:0]
b6
--
b7
CMPLB
R/W
B
B
b5
b0
0 0 0 1 0 0AN004
R/W
0 0 0 1 0 1AN005
0 0 0 1 1 0AN006
0 0 1 0 0 1AN009
0 0 1 0 1 0AN010
0 1 0 0 0 1AN017
0 1 0 0 1 1AN019
0 1 0 1 0 0AN020
1 0 0 0 0 0
1 0 0 0 0 1
1 1 1 1 1 1
00
R/W
B B 34.5 R/W
ADCMPCR.WCMPE 0 0ADWINLLB A/D
1ADWINLLB A/D
ADCMPCR.WCMPE 1 0A/D ADWINLLB ADWINULB A/D
1ADWINLLB A/D ADWINULB
CMPCHB[5:0] B AN004 AN006, AN009, AN010, AN017, AN019, AN020 B
B A/D 16
ADANSA0.ANSAn n = 04 06, 09, 10
ADANSA1.ANSAn n = 17, 19, 20
ADANSB0.ANSBn n = 04 06, 09, 10
ADANSB1.ANSBn n = 17, 19, 20
CMPCHB[5:0] ADCSR.ADST 0
CMPLB B B
ADCMPBSR.CMPSTB 1 ADC140_CMPBI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1240 of 1551
RA4W1
34. 14 A/DADC14
CMPLB = 0 ADWINLLBA/D
ADWINLLBA/D
CMPLB = 0 A/DADWINULB ADWINLLBA/DADWINULB A/DADWINLLB CMPLB = 1 A/DADWINULB ADWINLLBA/DADWINULB A/DADWINLLB
CMPLB = 1 ADWINLLBA/D ADWINLLBA/D
34.5
B
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1241 of 1551
RA4W1
34. 14 A/DADC14
34.2.29 A/D B ADCMPBSR
ADC140.ADCMPBSR 4005 C0ACh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
CMPST B
0
0
0
0
0
0
0
0
b0
CMPSTB
B
b7-b1
--
R/W
BADCMPCR.CMPBE = 1 R/W B AN004 AN006, AN009, AN010, AN017, AN019, AN020
0 1
0 0
R/W
CMPSTB B
B AN004 AN006, AN009, AN010, AN017, AN019, AN020 ADCMPBNSR.CMPLB A/D 1 ADCMPCR.CMPBIE 1 1 ADC140_CMPBI
CMPSTB 1
1
ADCMPCR.CMPBE 1 ADCMPBNSR.CMPLB
0
1 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1242 of 1551
RA4W1
34. 14 A/DADC14
34.2.30 A/D A/B ADWINMON
ADC140.ADWINMON 4005 C08Ch
b7
b6
b5
b4
b3
b2
b1
b0
--
--
MONC MONC MPB MPA
--
--
--
MONC OMB
0
0
0
0
0
0
0
0
b0
MONCOMB
b3-b1 b4
b5
b7-b6
-- MONCMPA
MONCMPB
--
A B
R/W
A R B 0 A B 1 A B
0
R
0 A
R
1 A
0 B
R
1 B
0
R
MONCOMB ADCMPCR.CMPAB[1:0] A B
1 ADCMPCR.CMPAE 1 ADCMPCR.CMPBE 1 ADCMPCR.CMPAB[1:0]
0 ADCMPCR.CMPAB[1:0]
ADCMPCR.CMPAE 0 ADCMPCR.CMPBE 0
MONCMPA A A A/D ADCMPLR0/ADCMPLR1 ADCMPLER
1 0 1 ADCMPCR.CMPAE 1 A/D ADCMPLR0.CMPLCHAn
0 ADCMPCR.CMPAE 1 A/D ADCMPLR0.CMPLCHAn
ADCMPCR.CMPAE 0 ADCMPCR.CMPAE 1 0 0
MONCMPB B B A/D ADCMPBNSR.CMPLB
1 0 1 ADCMPCR.CMPBE 1 A/D ADCMPBNSR.CMPLB
0 ADCMPCR.CMPBE 1 A/D ADCMPBNSR.CMPLB
ADCMPCR.CMPBE 0 ADCMPCR.CMPBE 1 0 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1243 of 1551
RA4W1
34. 14 A/DADC14
34.2.31 A/D ADHVREFCNT
ADC140.ADHVREFCNT 4005 C08Ah
b7
b6
b5
b4
b3
b2
b1
b0
ADSLP --
-- LVSEL --
--
HVSEL[1:0]
0
0
0
0
0
0
0
0
b1-b0
HVSEL[1:0]
b3-b2 b4
b6-b5 b7
-- LVSEL
-- ADSLP
R/W
b1 b0
0 0AVCC0
R/W
0 1VREFH0
1 0
1 1
0 0
R/W
0AVSS0
R/W
1VREFL0
0 0
R/W
0
R/W
1
HVSEL[1:0]
AVCC0VREFH01.45V
10b HVSEL[1:0] 11b HVSEL[1:0] 10b A/D
HVSEL[1:0] = 10b AN004 AN006, AN009, AN010, AN017, AN019, AN020 A/D A/D
LVSEL
AVSS0 VREFL0
ADSLP
ADC14 ADCSR.ADHSC ADSLP 1 ADSLP 1
ADSLP 1 0 5s ADSLP 0 1s A/D
ADHSC 34.8.8ADHSC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1244 of 1551
RA4W1
34. 14 A/DADC14
34.3
34.3.1
A/D
3 2
3
2
A/D
1 1 1 ADCSR.ADST 1 0 A B ELC A B 1
ADANSA0ADANSA1 ANn n A/D ADANSA0 ADANSA1 A ANn n A/D ADANSB0ADANSB1 B ANn n A/D
1 ADC14 3 1 A/D
A/D
ADCSR.DBLE = 1ADSTRGR.TRSA[5:0] ELCADCSR.DBLANS[4:0] A/D 2 A
A/D ADSTRGR.TRSA[5:0] ELC_AD00 A/D A/D 2 AADDBLDRA ELC_AD01 A/D A/D 2 BADDBLDRB 1 2 A/D A/D 2 BADDBLDRB A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1245 of 1551
RA4W1
34. 14 A/DADC14
34.3.2
34.3.2.1
1 A/D
1. ELC ADCSR.ADST 1A/D ADANSA0ADANSA1 ANn n A/D
2. 1 A/D A/D A/D ADDRy
3. A/D ADC140_ADI
4. ADST A/D 1A/D A/D ADC14
1
ADST A/D
4 (AN004)
5 (AN005)
6 (AN006)
(1) A/D A/D1
A/D2
(4) A/D3
ADDR4 ADDR5 ADDR6
ADC140_ADI
(2)
A/D1 (2)
A/D2 (2)
A/D3
(3)
34.6
AN004 AN006
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1246 of 1551
RA4W1
34. 14 A/DADC14
34.3.2.2
ADC14 VREFH0�0, �1/2, �1 A/D
1 A/D
1. ELC ADCSR.ADST 1A/D A/D
2. A/D A/D A/D ADRD ADANSA0ADANSA1 ANn n A/D
3. 1 A/D A/D A/D ADDRy
4. A/D ADC140_ADI
5. ADST A/D 1A/D A/D ADC14
ADST
(� 0, � �, � 1)
4 (AN004)
6 (AN006)
A/D
1
(1) A/D
A/D
A/D1
A/D2
(5)
ADRD ADDR4 ADDR6 ADC140_ADI
(2)
A/D
(3) A/D1
(3)
(4)
A/D2
34.7
AN004AN006 +
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1247 of 1551
RA4W1
34. 14 A/DADC14
34.3.2.3 A/D
A/D
A/D ADANSA0 ADANSA01 ADCSR.DBLE 0
A/D A/D ADEXICR.OCSA 0 A/D A/D ADEXICR.TSSA 0
1. 5s OADSSTRT/ADSSTRO ADCLK
2. A/D ADST 1
3. A/D A/D ADTRDR A/D ADOCDRADC140_ADI
4. ADST A/D 1 A/D ADC14
TSSA/OCSA ADDISCR[4:0]
ADST ADC140_ADI
15 ADCLK
5�s
0Fh
A/D
34.8
AN004
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1248 of 1551
RA4W1
34. 14 A/DADC14
34.3.2.4 A/D
ELC 2
A/D ADEXICR.TSSAADEXICR.TSSB A/D ADEXICR.OCSAADEXICR.OCSB 0
A/D 2 2 ADCSR.DBLANS[4:0] ADCSR.DBLE 1 ADCSR.DBLE 1 ADANSA0 ADANSA1
ADSTRGR.TRSA[5:0] ELCADCSR.EXTRG 0 ADCSR.TRGE 1
1. ELC ADCSR.ADST 1A/D ADCSR.DBLANS[4:0] 1 A/D
2. 1 A/D A/D A/D ADDRy
3. ADST 0 ADC14 ADC140_ADI
4. 2 ADCSR.ADST 1A/D ADCSR.DBLANS[4:0] 1 A/D
5. A/D A/D A/D 2 ADDBLDR
6. ADC140_ADI
7. ADST A/D 1A/D A/D 0 ADC14
(ELC_AD00/ELC_AD01)
ADST A/D
4 (AN004)
ADDR4
A/D1
(1) A/D
A/D1
(3)
(2)
A/D1
ADDBLDR
ADC140_ADI
A/D1
(4) A/D (7)
A/D2
(5) (6)
A/D2
.
AN004 2 ELC_AD00/ELC_AD01
34.9
AN004 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1249 of 1551
RA4W1
34. 14 A/DADC14
34.3.2.5
A/D ELC_AD00/ELC_AD01 2
A/D ADEXICR.TSSAADEXICR.TSSB A/D ADEXICR.OCSAADEXICR.OCSB 0
A/D 2 2 ADCSR.DBLANS[4:0] ADCSR.DBLE 1 ADCSR.DBLE 1 ADANSA0 ADANSA1
ADSTRGR.TRSA[5:0] 0Bh ELC_AD00/ ELC_AD01 ADCSR.EXTRG 0 ADCSR.TRGE 1
1. ELC_AD00/ELC_AD01 ADCSR.ADST 1A/D ADCSR.DBLANS[4:0] 1 A/D
2. 1 A/D A/D ADDRy ELC_AD00/ELC_AD01 A/D 2 AADDBLDRA A/D 2 BADDBLDRB
3. ADCSR.ADST 0 ADC14 ADC140_ADI
4. 2 ELC_AD00/ELC_AD01 ADCSR.ADST 1A/D ADCSR.DBLANS[4:0] 1 A/D
5. A/D A/D 2 ADDBLDR ELC_AD00/ ELC_AD01 A/D 2 AADDBLDRA A/D 2 BADDBLDRB
6. ADC140_ADI
7. ADCSR.ADST A/D 1A/D A/D 0 ADC14
ELC_AD00/ELC_AD01
ELC_AD00 A/D1
ELC_AD01 A/D1
ADST A/D
4 (AN004)
ADDR4
ADDBLDR
(1) A/D
A/D1
(4)
(3)
A/D (7)
A/D2
(2) A/D1
(5)
A/D2
ADDBLDRA ADDBLDRB ADC140_ADI
(2) A/D1
(5) (6)
A/D2
34.10
1ELC_AD00/ELC_AD01 AN004 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1250 of 1551
RA4W1
34. 14 A/DADC14
34.3.3
34.3.3.1
A/D
ADEXICR.TSSA ADEXICR.OCSA 0 A/D A/D
1. ELC ADCSR.ADST 1A/D ADANSA0ADANSA1 ANn n A/D
2. 1 A/D A/D A/D ADDRy
3. A/D ADC140_ADI ADC14 ADANSA0ADANSA1 ANn n A/D
4. ADCSR.ADST 1A/D 23 ADCSR.ADST 0A/D A/D ADC14
5. ADST 1A/D ADANSA0ADANSA1 ANn n A/D
ADST
A/D
(1)
4 (AN004)
5 (AN005)
6 (AN006)
A/D1
A/D
A/D2
A/D3
A/D A/D4
(5)
(4) A/D51
A/D6
ADDR4 ADDR5 ADDR6
(2)
ADC140_ADI
1. A/D5
A/D1
(2)
A/D2
(2)
(2)
A/D4
A/D3
(3)
34.11
AN004 AN006
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1251 of 1551
RA4W1
34. 14 A/DADC14
34.3.3.2
ADC14 VREFH0� 0 � 1/2� 1 A/D A/D
A/D ADEXICR.TSSA A/D ADEXICR.OCSA 0
1. ELC ADCSR.ADST 1A/D A/D
2. A/D A/D A/D ADRD ADANSA0ADANSA1 ANn n A/D
3. 1 A/D A/D A/D ADDRy
4. A/D ADC140_ADI ADC14 A/D ADANSA0ADANSA1 ANn n A/D
5. ADST 1 24ADST 0A/D A/D ADC14
6. ADST 1A/D A/D
ADST A/D
(1)
(� 0, � �, � 1)
5 (AN005)
6 (AN006)
ADRD
ADDR5
ADDR6
A/D1 (2)
ADC140_ADI
A/D1
A/D
A/D2
(5)
A/D31
(6) A/D3
A/D2
A/D1
(2)
(3) A/D1 (3)
A/D2
A/D2
(4)
1. A/D3
34.12
AN005 AN006 +
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1252 of 1551
RA4W1
34. 14 A/DADC14
34.3.4
34.3.4.1
ELC A B 1 A/D A B
A B ADSTRGR.TRSA[5:0] ADSTRGR.TRSB[5:0] 2 A/D A B
A/D ADANSA0ADANSA1 A ADANSB0ADANSB1 B A B
A/D ADEXICR.TSSA A/D ADEXICR.OCSA 0 A B
ELC A ELC ELC_AD00 B ELC ELC_AD01 ELC_AD00 ELC_AD01 ELC.ELSRn GPT
1. ELC_AD00 A
2. A ADC140_ADI
3. ELC_AD01 B
4. B ADCSR.GBADIE 1 ADC140_GBADI ADC140_GBADI
GPTELC_AD01
GPTELC_AD00
ELC_AD00 ELC_AD01 ADC140_ADI ADC140_GBADI
(1) A (3) (2)
B (4)
34.13
ELC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1253 of 1551
RA4W1
34. 14 A/DADC14
34.3.4.2 A/D
A ELC 2 B ELC 1
ADSTRGR.TRSA[5:0] A ADSTRGR.TRSB[5:0] B A B A/D A B ADTRG0
ADSTRGR.TRSA[5:0] 0Bh ELC_AD00/ELC_AD01 A
A/D A ADCSR.DBLANS[4:0] A/D B ADANSB0 ADANSB1 A B
ADEXICR.TSSA ADEXICR.OCSA 0 A/D A/D
A/D 2 2 ADCSR.DBLANS[4:0] ADCSR.DBLE 1
ELC ELC_AD00 A ELC_AD01 B ELC_AD00 ELC_AD01 ELC.ELSRn GPT
1. ELC ELC_AD00 B
2. B ADCSR.GBADIE 1 B ADC140_GBADI
3. 1 ELC_AD01 A 1
4. A 1 A/D ADDRy ADC140_ADI
5. 2 ELC_AD01 A 2
6. A 2 A/D ADDBLDR ADC140_ADI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1254 of 1551
RA4W1
34. 14 A/DADC14
GPTELC_AD01
GPTELC_AD00 ELC_AD01
ELC_AD00 ADC140_ADI ADC140_GBADI
(1) B
(2)
(3) A (4)
(5) A (6)
B
34.14
ELC
34.3.4.3 A
ADGSPCR.PGS 1 A ADPGSCR PGS 1 34.15 A/D
A B A/D A/D A B A/D A B A/D A A/D ADGSPCR.GBRSCN 0 ADC14 A A/D ADGSPCR.GBRSCN 1 A A/D B ADGSPCR.GBRSCN A/D 34.9
A B B ADGSPCR.GBRP 1
ADSTRGR.TRSA[5:0] A ADSTRGR.TRSB[5:0] A B ADGSPCR.GBRP 1 ADSTRGR.TRSB[5:0] 3Fh
A/D ADANSA0ADANSA1 A ADANSB0ADANSB1 A B
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1255 of 1551
RA4W1
34. 14 A/DADC14
ADCSR.ADCS[1:0]01b
?
Yes
No
ADSTRGR.TRSA[5:0] 3Fh
ADSTRGR3F3FhTRSA[5:0]3Fh
TRSB[5:0]3Fh
ADCSR.ADCS[1:0]10b
?
No
Yes
ADCSR.ADST0A/D
ADCSR.ADCS[1:0]01b
ADSCR.ADST0A/D
?
No
Yes
ADGSPCR.PGS1
34.15
ADGSPCR.PGS
34.9
ADGSPCR.GBRSCN A/D
A/D
ADGSPCR.GBRSCN = 0
ADGSPCR.GBRSCN = 1
AA/D A
B
A A/D B A/D
BA/D A
B A/D B A/D
A A/D
A A/D
AA/D B A/D
B
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1256 of 1551
RA4W1
34. 14 A/DADC14
A 4 B 5, 6, 9 A ADGSPCR.GBRSCN = 1ADGSPCR.GBRP = 0
1. B ADCSR.ADST 1A/D ADANSB0 ADANSB1 ANn n A/D
2. B A/D A/D yADDRy
3. B A/D A ADCSR.ADST 1 B A/D ADANSA0ADANSA1 ANn n A/D B A/D A/D A/D ADDRy
4. 1 A/D A/D A/D ADDRy
5. ADC140_ADI
6. ADANSB0ADANSB1 B ANn n A/D ADCSR.ADST 1
7. 1 A/D A/D A/D yADDRy
8. B A/D ADCSR.GBADIE 1 B ADC140_GBADI ADC140_GBADI
9. A/D ADCSR.ADST ADC14
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1257 of 1551
RA4W1
34. 14 A/DADC14
A
1BA/D B B
A
AA/D
2BA/D B
B
ADST A/D (1)
A
4 (AN004)
B
5 (AN005)
6 (AN006)
9 (AN009)
A/DB1
ADDR4
(9)
A/DB2
A/DA1 (3)
(6) A/DB4
A/DB5
A/DB31
A/DB6
(4)
A/DA1
ADDR5 ADDR6 ADDR9
(2) A/DB1
(2) A/DB2
ADC140_ADI ADC140_GBADI
1. A/D B3
(7) A/DB4
(7) A/DB5
(7) A/DB6
(5)
(8)
34.16
A 1ADGSPCR.GBRSCN = 1, ADGSPCR.GBRP = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1258 of 1551
RA4W1
34. 14 A/DADC14
B A A ADGSPCR.GBRSCN = 1ADGSPCR.GBRP = 0 A 4 B 5, 6, 9
1. B ADCSR.ADST 1A/D ADANSB0 ADANSB1 B ANn n A/D
2. 1 A/D A/D A/D ADDRy
3. B A/D A ADCSR.ADST 1 B A/D B A/D A/D A/D ADDRy
4. ADANSA0ADANSA1 A ANn n A A/D
5. 1 A/D A/D A/D yADDRy
6. ADC140_ADI
7. ADGSPCR.GBRSCN 1 A A/D ADCSR.ADST 1 B ADANSB0ADANSB1 B ANn n A/D
8. 1 A/D A/D A/D yADDRy
9. B A/D A ADCSR.ADST 1 B A/D
10. ADANSA0ADANSA1 A ANn n A A/D
11. 1 A/D A/D A/D yADDRy
12. ADC140_ADI
13. A A/D ADGSPCR.GBRSCN 1 ADCSR.ADST 1 B ADANSB0ADANSB1 B ANn n A/D
14. B A/D A (9) (13) A B A/D ADCSR.ADST ADC14
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1259 of 1551
RA4W1
34. 14 A/DADC14
1BA/D B B
A
A A/D
2BA/D B
A
A A/D
3B A/D B
A
B
ADST A/D
(1)
(13)
A 4 (AN004)
B 5 (AN005) 6 (AN006) 9 (AN009)
ADDR4
ADDR5
ADDR6
A/DB1
A/DA1 (4)
(7) A/DB4
A/DA2 (10)
A/DB7
A/DB2
A/DB5
A/DB31 (3)
(5)
(2)
A/DB1
(2)
A/DB2
A/DA1
A/DB61 (9)
(11) A/DA2
(8)
A/DB4
(8)
A/DB5
ADDR9
ADC140_ADI ADC140_GBADI
1. A/DB3 B6
(6)
(12)
34.17
A 2ADGSPCR.GBRSCN = 1, ADGSPCR.GBRP = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1260 of 1551
RA4W1
34. 14 A/DADC14
A B A ADGSPCR.GBRSCN = 1ADGSPCR.GBRP = 0 A 5, 6, 9 B 4
1. A ADCSR.ADST 1A/D ADANSA0 ADANSA1 ANn n A/D
2. 1 A/D A/D A/D yADDRy
3. A A/D B A A/D B A/D A B A
4. A A/D ADC140_ADI
5. A ADCSR.ADST 1 B ADANSB0ADANSB1 B ANn n A/D
6. 1 A/D A/D A/D yADDRy
7. B ADCSR.GBADIE 1 ADC140_GBADI ADC140_GBADI
8. A/D ADCSR.ADST ADC14
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1261 of 1551
RA4W1
34. 14 A/DADC14
1AA/D A A
BA/D B
A
B
ADST A/D
A 1 (AN005)
(1)
A/DA1
2 (AN006)
3 (AN009)
(3)
A/DA2
A/DA3
(8)
B 0 (AN004)
(5)
A/DB1
ADDR5 ADDR6 ADDR9 ADDR4
(2)
A/DA1
(2) A/DA2 (2) A/DA3 (6)
A/DB1
ADC140_ADI
(4)
ADC140_GBADI
(7)
34.18
A 3ADGSPCR.GBRSCN = 1, ADGSPCR.GBRP = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1262 of 1551
RA4W1
34. 14 A/DADC14
A 4 B 5, 6, 9 A ADGSPCR.GBRSCN = 0ADGSPCR.GBRP = 0
1. B ADCSR.ADST 1A/D ADANSB0 ADANSB1 ANn n A/D
2. 1 A/D A/D A/D yADDRy
3. B A/D A ADCSR.ADST 1 B A/D ADANSA0ADANSA1 ANn n A/D
4. 1 A/D A/D A/D yADDRy
5. ADC140_ADI
6. A/D ADCSR.ADST ADC14
A
BA/D (BB)
A
A A/D
B
ADST A/D (1)
A
0 (AN004) B
1 (AN005)
A/DB1
2 (AN006)
3 (AN009)
ADDR4
(6)
A/DA1
A/DB2
A/DB31 (3)
(4) A/DA1
ADDR5 ADDR6 ADDR9
(2) A/DB1
(2) A/DB2
ADC140_ADI ADC140_GBADI
1. A/DB3
(5)
34.19
A 4ADGSPCR.GBRSCN = 0, ADGSPCR.GBRP = 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1263 of 1551
RA4W1
34. 14 A/DADC14
A 4 B 5, 6, 9 A ADGSPCR.GBRP = 1
1. ADGSPCR.GBRP = 1 ADCSR.ADST 1A/D ADANSB0 ADANSB1 ANn n A/D
2. 1 A/D A/D A/D yADDRy
3. B A/D A ADCSR.ADST 1 B A/D ADANSA0ADANSA1 ANn n A/D
4. 1 A/D A/D A/D yADDRy
5. ADC140_ADI
6. ADANSB0ADANSB1 B ANn n A/D ADCSR.ADST 1
7. 1 A/D A/D A/D yADDRy
8. ADCSR.GBADIE 1 ADC140_GBADI
9. ADANSB0ADANSB1 ANn n A/D ADGSPCR.GBRP 1 (6) (9) ADGSPCR.GBRP 1 ADCSR.ADST 0 ADGSPCR.GBRP = 1 A/D 34.31 ADCSR.ADST
1BA/D (GBRP = 1)
A
A A/D
2BA/D (GBRP = 1)
GBRP
A
B
ADST A/D
(1)
A 4 (AN004)
B 5 (AN005)
A/DB1
6 (AN006)
9 (AN009)
ADDR4
A/DA1 (3)
(6) A/DB4
A/DB2
A/DB5
A/DB31
A/DB6
(4) A/DA1
3B A/D
(GBRP = 1)
(9) A/DB7
ADDR5 ADDR6 ADDR9
(2) A/DB1
(2)
A/DB2
ADC140_ADI ADC140_GBADI
1. A/D B3
(7) A/DB4
(7) A/DB5
(7) A/DB6
(5)
(8)
34.20
A 5ADGSPCR.GBRP = 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1264 of 1551
RA4W1
34. 14 A/DADC14
34.3.5 A B
34.3.5.1
A/D A B A B B 1
1. ELC ADCSR.ADST 1A/D A/D A/D
2. A/D A/D A/D ADDRyADTSDR ADOCDRADCMPCR.CMPAE 1 A ADCMPANSRy ADCMPANSER A/D ADCMPDR0/1 ADCMPCR.CMPBE 1 B ADCMPBNSR A/D ADWINULB/ADWINLLB
3. A ADCMPLR0/1 ADCMPLER A ADCMPSR0.CMPSTCHAnADCMPSR1.CMPSTCHAn ADCMPSER.CMPSTTSA ADCMPSER.CMPSTOCA 1 ADCMPCR.CMPAIE 1 ADC140_CMPAI B ADCMPBNSR.CMPLB B
ADCMPBSR.CMPSTB 1 ADCMPCR.CMPBIE 1 ADC140_CMPBI
4. A/D
5. ADC140_CMPAI ADC140_CMPBI ADCSR.ADST 0A/D 1
6. A ADC140_CMPAI B ADC140_CMPBI A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1265 of 1551
RA4W1
34. 14 A/DADC14
ADST A/D
4 (AN004)
(1)
A/D1
5 (AN005)
6 (AN006)
9 (AN009)
ADDR4
ADDR5
A/D
A/D2
A/D3
(4)
A/D5
(5)
1
A/D4
A/D6
(2)
A/D1
(2)
A/D2
A/D3 A/D4
ADDR6
ADDR9
CMPSTCHA04 CMPSTCHA05
(3)
(3)
(3) (3)
CMPSTCHA06
CMPSTCHA09 ADC140_CMPAI/ ADC140_CMPBI
1.
(3)
(6)
34.21
AN004 AN006, AN009
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1266 of 1551
RA4W1
34. 14 A/DADC14
34.3.5.2
A B A/D A or BA and BA XOR B A B ADC140_WCMPM/ADC140_WCMPUM
A 1 A A/D
A AN004 AN006, AN009, AN010, AN017, AN019, AN020 ADC14 A/D
B AN004 AN006, AN009, AN010, AN017, AN019, AN020 A/D
1. ADCSR.ADCS[1:0] 00b
2. ADCMPANSR0/1 ADCMPANSER A ADCMPLR0/1 ADCMPLER ADCMPDR0/1
3. ADCMPBNSR B ADWINULB/ADWINLLB
4. A/B A/B ADCMPCR
A/D
[] ADANSA0 = 0030h ADSTRGR = 0900h ADCSR = 0200h
//CH4, CH5 //A/DTRSA[5:0] = 09h //
A
[] ADCMPDR0 = 0001h ADCMPDR1 = 00FFh ADCMPANSR0 = 0010h ADCMPLR0 = 0010h
//A //A //A //A
B
[] B ADWINLLB = 0001h //B ADWINULB = 00FFh //B ADCMPBNSR = 05h //B
[] B ADWINLLB = 0000h //B ADWINULB = 0000h //B ADCMPBNSR = 3Fh //B
[] ADCMPCR = 4A00h //A/BOR
34.22
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1267 of 1551
RA4W1
34. 14 A/DADC14
A
A B ADCMPCR.CMPAE = 1ADCMPCR.CMPBE = 1
A B OR ADCMPCR.CMPAB[1:0] = 00b
B ADCMPBNSR.CMPCHB[5:0] = 111111b
B 0 0 ADCMPCR.WCMPE = 1ADWINLLB[15:0] = ADWINULB[15:0] = 0000hADCMPBNSR.CMPLB = 1
34.23 ADC140_ADI ADCMPCR.CMPAB[1:0] 1PCLKB ADC140_WCMPM/ADC140_WCMPUM
. 2
CMPAB =10b
1
1
ADST
4 (AN004)
5 (AN005)
A/D
(1)
A/D1
ADDR4
A/D2
A/D1
A/D3
A/D4
A/D3
ADDR5
MONCMPA MONCMPB
A/D2
A/D4
MONCOMB ADC140_WCMPM
1 PCLKB
ADC140_WCMPUM
ADC140_CMPAI
ADC140_CMPBI ADC140_ADI
34.23
AN004 AN005
. ADCMPCR.CMPAB[1:0] A B
. A A A
B A/D ADCMPCR.CMPAE ADCMPCR.CMPBE 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1268 of 1551
RA4W1
34. 14 A/DADC14
34.3.5.3
1. ADRD ADDBLDRADDBLDRAADDBLDRB
2. 3. A B 4. B A 5. A B 6.
34.3.6
ELCADTRG0 tD A/D
34.24 ELC 34.25 ADTRG0 tSCANtD tDIS 1tDIAG tDSD 2A/D tCONV tED
A/D tCONVtSPLtSAM tSPLADC14 A/D ADCLKADSSTR
tSAM14 37.5 ADCLK14 46.5 ADCLK12 31.5 ADCLK12 40.5 ADCLK 34.10
n tSCAN tSCAN = tD + (tDIS � n) + tDIAG + tDSD + (tCONV 3� n) + tED
1 tSCAN tED 2 tDIS � n+ tDIAG + tDSD + tCONV 3� n
1.
2. 3.
tDIS = 0 A/D 15ADCLK
tDIAG = 0tDSD = 0 tSPL tCONV � n tSPL tSAM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1269 of 1551
RA4W1
34. 14 A/DADC14
34.10
ADCLK PCLKB
1 2
A
A A/D
B A A/D B A
B A A/D
tD
A/D
1
12
tDIS
tDIAG
tSPL tSAM
14
A/D 1
tCONV
12
tDED tDSD
tSPL tSAM
14
1
tED
6
3PCLKB + 6ADCLK
--
5PCLKB + 3ADCLK5
--
2PCLKB + 4ADCLK
--
--
2PCLKB + 6ADCLK
4PCLKB + 6ADCLK
6ADCLK
2PCLKB + 4ADCLK
2PCLKB + 4ADCLK
4ADCLK
ADNDIS[3:0] 00h� ADCLK3
ADSSTR00 = 0Dh� ADCLK4+ 0.5ADCLK 4
31.5ADCLK 40.5ADCLK
37.5ADCLK 46.5ADCLK
2ADCLK
2ADCLK
ADSSTRnn = 0 15, L, T, O = 0Dh� ADCLK + 0.5ADCLK
31.5ADCLK 40.5ADCLK
37.5ADCLK 46.5ADCLK
1PCLKB + 3ADCLK 2PCLKB + 3ADCLK5
1. 2. 3. 4.
5. 6.
tDtSPLSHtDIAGtCONVtED 34.24 34.25 A/D A/D 0Fh15ADCLK ns
ADCLK PCLKBPCLKB/ADCLK = 12 14
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1270 of 1551
RA4W1
34. 14 A/DADC14
1)
tD
ADST A/D
2) 2
tD
ADST A/D
tSCAN
tDIAG
tCONV
tED
tDED
DIAG
A/D
tDIAG tDED
tCONV
tCONV
tDSD
tDIAG
tDED
tCONV
DIAG
A/D
A/D
DIAG
A/D
34.24
ELC
1) tD
ADST A/D
2) 2 tD
ADST A/D
tSCAN
tDIAG
tCONV
tED
tDED
DIAG
A/D
tDIAG tDED
tCONV
tCONV
tDSD
tDIAG
tDED
tCONV
DIAG
A/D
A/D
DIAG
A/D
34.25
ADTRG0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1271 of 1551
RA4W1
34. 14 A/DADC14
34.3.7 A/D
ADCER.ACE 1 CPUDTC DMAC A/D ADDRyADRDADDBLDRADDBLDRAADDBLDRBADTSDRADOCDR ADDRyADRDADDBLDRADDBLDRAADDBLDRBADTSDRADOCDR 0000h ADDRyADRDADDBLDRADDBLDRAADDBLDRB ADTSDRADOCDR ADDRy
ADCER.ACE 0A/D 0222h ADDRy ADDRy 0111h A/D ADDRy 0111h SRAM
ADCER.ACE 1ADDRy = 0111h CPUDTC DMAC ADDRy 0000h A/D 0222h ADDRy 0000h ADDRy A/D ADDRy 0000h 0000h ADDRy
34.3.8 A/D
A/D 1234 16 1 A/D A/D 2 4 A/D
A/D A/D
A/D A/D A/D A/D
1. 12 16
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1272 of 1551
RA4W1
34. 14 A/DADC14
34.3.9
ADC14 A/D VREFH0 VREFL0
34.26 A/D 34.27 34.28
A/D
ADST
A/D
015ADCLK
015ADCLK
34.26
A/D
1 VREFH0 R = 1M
ON
OFF
ANn
1.
34.27
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1273 of 1551
RA4W1
34. 14 A/DADC14
ANn
R = 1M
VREFL0
OFF
ON
1
1.
34.28
34.3.10 A/D
AD A/D
1. PmnPFS 2. A/D ADSTRGR.TRSA[5:0] 000000b 3. ADTRG0 High 4. ADCSR.TRGE ADCSR.EXTRG 1
34.29 B A/D ADSTRGR.TRSB[5:0]20.I/O
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1274 of 1551
RA4W1
34. 14 A/DADC14
34.29
PCLKB
ADST
4
34.3.11 A/D
A/D ELC A/D
ADCSR.TRGE 1 ADCSR.EXTRG 0 ADSTRGR.TRSA[5:0]ADSTRGR.TRSB[5:0] A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1275 of 1551
RA4W1
34. 14 A/DADC14
34.4 DTC/DMAC
34.4.1
ADC14 ADC140_ADIADC140_GBADI CPU CPU ADC140_CMPAI ADC140_CMPBI
ADC140_ADI ADC140_GBADI ADCSR.GBADIE 1 ADC140_CMPAI ADC140_CMPBI ADCMPCR.CMPAIE ADCMPCR.CMPBIE 1
ADC140_ADI ADC140_GBADI DTC DMAC DTC DMAC
DTC 18.DTCDMAC 17.DMA DMAC
34.11 ADC14 ELC
34.11
ADC14ELC
DTC/DMAC ELC
A B
ELC
ADC140_ADI ADC140_ADI ADC140_CMPAI
ADC140_ADI ADC140_ADI � � AADC140_CMPAI
ADC140_CMPBI
� � BADC140_CMPBI
ADC140_WCMPM
� A/B ADC140_WCMPM
ADC140_WCMPUM �
A/B ADC140_WCMPUM
ADC140_ADI
ADC140_ADI
ADC140_ADI ADC140_CMPAI
ADC140_ADI
� � AADC140_CMPAI
ADC140_CMPBI
� � BADC140_CMPBI
ADC140_ADI ADC140_GBADI
A ADC140_ADI
� B B ADC140_GBADI
ADC140_ADI
A ADC140_ADI
ADC140_GBADI
� B B ADC140_GBADI
ADC140_CMPAI
� � AADC140_CMPAI
ADC140_CMPBI
� � BADC140_CMPBI
ADC140_ADI
AADC140_ADI
ADC140_GBADI
� B B ADC140_GBADI
�
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1276 of 1551
RA4W1
34. 14 A/DADC14
34.5
34.5.1 ELC
ELC ADC140_ADI ADC140_GBADI ADC140_CMPAI/ADC140_CMPBI 34.11ADC14 ELC
34.5.2 ELC ADC14
ADC14 ELC ELSRn A/D
ELC.ELSR8 ELC_AD00 ELC.ELSR9 ELC_AD01 A/D ELC_AD00 ELC_AD01
34.6
ADC14 VREFH0 AVCC0 VREFL0 AVSS0 A/D ADHVREFCNT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1277 of 1551
RA4W1
34. 14 A/DADC14
34.7 A/D
A/D AN004 AN006, AN009, AN010, AN017, AN019, AN020 A/D A/D
A/D 1. ADHVREFCNT.HVSEL[1:0] 11b ADC14
2. 1�s 3. ADHVREFCNT.HVSEL[1:0] 10b
. ADC14 VREFH0ADHVREFCNT.HVSEL[1:0] = 01b AVCC0 ADHVREFCNT.HVSEL[1:0] = 00bADHVREFCNT.HVSEL[1:0] = 11b ADHVREFCNT.HVSEL[1:0] = 10b 1s
4. 5�sA/D 34.30
HVSEL[1] HVSEL[0]
1�s
5�s
ADST
34.30
A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1278 of 1551
RA4W1
34. 14 A/DADC14
34.8
34.8.1
A/D A/D 2 A A/D 2 B A/D A/D A/D 2 1 A/D 2 A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1279 of 1551
RA4W1
34. 14 A/DADC14
34.8.2 A/D
A/D A/D 34.31
ADGSPCR.PGS1? No
Yes
ADGSPCR.PGS0
ADCSR.ADCS[1:0]01b
?
No
Yes
ADSTRGR 3F3FhTRSA[5:0]3Fh
TRSB[5:0]3Fh
ADSTRGR.TRSA[5:0]3Fh
ADCSR.GBADIE0
ELC ELSRn.ELS00h
ADCSR.ADST0 A/D
34.31
ADCSR.ADST
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1280 of 1551
RA4W1
34. 14 A/DADC14
34.8.3 A/D
ADC14 ADCSR.ADST 1 ADCLK 6 ADC14 ADCSR.ADST 0 ADCLK 3
34.8.4
2 1 2 A/D CPU A/D 1 A/D 2 A/D
34.8.5
ADC14 ADC14 1s A/D 11.
34.8.6
A/D ADCSR.ADST 0 ADC14 ADCSR.ADST 34.31 ADCLK 3
34.8.7
ADC14 RpRs
LSB= 4095 � Rs/(Rs + Rp)
34.8.8 ADHSC
A/D ADCSR.ADHSC 0 1 1 0 ADC14 ADCSR.ADHSC ADHVREFCNT.ADSLP 0 1s A/D
ADCSR.ADHSC
1. ADHVREFCNT.ADSLP 1
2. 0.2s A/D ADCSR.ADHSC
3. 4.8s ADHVREFCNT.ADSLP 0
. A/D ADCSR.ADHSCADHVREFCNT.ADSLP 1
. A/D ADCSR.ADHSC 1 0 ADCSR.ADHSC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1281 of 1551
RA4W1
34. 14 A/DADC14
34.8.9
1 2
ADCER.DIAGVAL[1:0]ADCER.DIAGLD 1
ADCSR.DBLE 0 1 1
MONCMPAMONCMPBMONCOMB ADCMPCR.CMPAE ADCMPCR.CMPBE 0
34.8.10
A/D AN004 AN006, AN009, AN010, AN017, AN019, AN020VREFH0VREFL0 AVCC0AVSS0 AVSS0VSS
34.8.11
AN004 AN006, AN009, AN010, AN017, AN019, AN020AVCC0 AVSS0 VREFH0 VREFL0 AN004 AN006, AN009, AN010, AN017, AN019, AN020 34.32
1 1
Rin2
0.1�F 0.1�F
AVCC0
VREFH0 AN004AN006, AN009, AN010, AN017, AN019, AN020 AVSS0
VREFL0
1
10�F
0.01�F
1. 2. Rin
34.32
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1282 of 1551
RA4W1
34. 14 A/DADC14
34.8.12 14 A/D
0 I/OIRQ2IRQ3 TS A/D A/D A/D
34.8.13 ADC14OPAMPACMPLP
34.12 A/D A/D OPAMP ACMPLP
34.12
AN005 AN006 AN017 AN019 AN020
A/D OPAMP ACMPLP
A/D
OPAMP
AMP2-
AMP2+
--
--
--
-- -- CMPIN1 CMPREF1 CMPIN1
ACMPLP
34.8.14
1s A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1283 of 1551
RA4W1
35. 12 D/A DAC12
35. 12 D/A DAC12
35.1
MCU 12 D/A DAC12 35.1 DAC12 35.1 DAC12 35.2
35.1
DAC12
12 1 D/A A/D D/A ADC14 D/A DAC12 A/D
DA0
DAADSCR DADR0 DACR DADPR DAVREFCR
AVCC0 AVSS0
DA0
ADC14 D/A
12 D/A
ELC_DA0
DADR0 D/A 0 DACR D/A DADPR DADR0
DAADSCR D/A A/D DAVREFCR D/A VREF
35.1
DAC12
35.2
AVCC0
AVSS0
DA0
DAC12
ADC14DAC12 OPAMP VCC
ADC14DAC12 OPAMP VSS
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1284 of 1551
RA4W1
35. 12 D/A DAC12
35.2 35.2.1 D/A 0DADR0
DAC12.DADR0 4005 E000h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DADR0 D/A 16 DADR0
12 DADPR.DPSEL DADPR.DPSEL = 0 12 [11:0]DADPR.DPSEL = 1 12 [15:4]
35.2.2 D/A DACR
DAC12.DACR 4005 E004h
b7
b6
b5
b4
b3
b2
b1
b0
-- DAOE0 --
--
--
--
--
--
0
0
0
1
1
1
1
1
R/W
b4-b0
--
1 1
R/W
b5
--
0 0
R/W
b6
DAOE0 D/A 0
0 0 DA0
R/W
10DA0 D/A
b7
--
0 0
R/W
DACR DAADSCR.DAADST 1D/A A/D ADC14 DACR ADC14 ADC14 ADCSR.ADST 0
DAOE0 D/A 0
D/A
D/A A/D DAADSCR.DAADST = 1ADC14 ADCSR.ADST = 0DAOE0 ADC14
ADC14
DAOE0 1 ELC_DA0 ELSR12 DAOE0 1 D/A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1285 of 1551
RA4W1
35. 12 D/A DAC12
35.2.3 DADR0 DADPR
DAC12.DADPR 4005 E005h
b7
b6
b5
b4
b3
b2
b1
b0
DPSEL --
--
--
--
--
--
--
0
0
0
0
0
0
0
0
R/W
b6-b0
--
0 0
R/W
b7
DPSEL
DADR0 0
R/W
1
35.2.4 D/A A/D DAADSCR
DAC12.DAADSCR 4005 E006h
b7
b6
b5
b4
b3
b2
b1
b0
DAADS T
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
b6-b0 b7
-- DAADST
D/A A/D
R/W
0 0
R/W
0DAC12 ADC14D/A A/D R/W
1DAC12 ADC14D/A A/D
D/A A/D D/A ADC14 D/A ADC14 ADCSR.ADST = 0 ADC14
DAADST 1 ADC14 1
DAADST D/A A/D
DAADST 0 DADR0 D/A DAADST 1 ADC14 D/A D/A DADR0 ADC14 A/D D/A DAADST ADC14 ADCSR.ADST 0ADC14 ADC14 DAADST 1 ELC ELSR12 DAADST DAC12 0 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1286 of 1551
RA4W1
35. 12 D/A DAC12
35.2.5 D/A VREF DAVREFCR
DAC12.DAVREFCR 4005 E007h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
REF[2:0]
0
0
0
R/W
b2-b0
REF[2:0]
D/A
b2
b0
0 0 0
R/W
0 0 1AVCC0/AVSS0
0 1 1AVSS0
b7-b3
--
0 0
R/W
D/A VREF DAVREFCRDAC12
REF[2:0] D/A
DAC12 000b REF[2:0] DADR0 0000h VREF
35.3.2 ADC14 A/D A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1287 of 1551
RA4W1
35. 12 D/A DAC12
35.3
DACR.DAOE0 1 DAC12 0 D/A 35.2 1. DADPR.DPSEL DADR0 D/A 2. DACR.DAOE0 1 D/A tDCONV
DA0 DADR0 DAOE0 0
DADR0 4096
�
3. DADR0 tDCONV DAADSCR.DAADST 1D/A A/D D/A A/D 1 ADCLK A/D 1
4. DAOE0 0
35.2
DADR0
DADR0
DACR
1
DADR0
DACR
2
DACR.DAOE0
DA0
tDCONV
1
2 tDCONV
tDCONV D/A
DAC12
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1288 of 1551
RA4W1
35. 12 D/A DAC12
35.3.1 D/A A/D
D/A DAC12 DAC12 ADC14 ADC14 A/D
DAADSCR.DAADST 1 DADR0 D/A
ADC14 DADR0 1PCLKB D/A
ADC14 A/D DADR0 A/D D/A DADR0 D/A A/D 1 D/A DADR0
DAADSCR.DAADST 1 DADR0 D/A
DAC12 ADC14 D/A 35.3
ADC14 D/A
1. ADC14 DAADSCR.DAADST 1
2. ADC14 DACR.DAOE0 1
3. DADR0 ADCLK D/A A/D 1
DADR0 ADC14 ADC140.ADCSR.ADST = 0 1PCLKB D/A
DADR0 ADC14 A/D ADC140.ADCSR.ADST = 1A/D D/A A/D DADR0 2 1 D/A
ADCLK PCLKB ADC14 ADC140.ADCSR.ADST ADC14D/A
DAC12 DAADSCR.DAADST
DACR.DAOE0
DADR0 DA0
(1)
(2) (3)
A/D1
D/AA
(3)
(3)
A
B
D/AA
35.3
DAC12 ADC14
R01UH0883JJ0100 Rev.1.00 2020.08.31
A/D2
D/AC C D/AC
Page 1289 of 1551
RA4W1
35. 12 D/A DAC12
35.4 ADCLK PCLKB A/D 1 A/D 2 ADCLK 1 ADC14 D/A DAC12 DA0 D/A A
ADCLK PCLKB ADC14 ADC140.ADCSR.ADST
ADC14D/A
DAC12 DAADSCR.DAADST
DACR.DAOE0
DADR0 DA0
A/D1
A/D2
D/AA
A
B
D/AA
35.4
DAC12 ADC14 D/A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1290 of 1551
RA4W1
35. 12 D/A DAC12
35.3.2
DAVREFCR.REF[2:0] 011b AVSS0 VREF 1. REF[2:0] 000b 2. DADR0 0000h 3. 2. 10s 4. DAVREFCR.REF[2:0] 011b AVSS0
5. DACR.DAOE0 1 5s 6. DADR0 D/A
REF[2:0] DADR0 XXXXh
10�s VREF
000b 0000h
DAOE0
DAn
Hi-Z
35.5
5�s
011b
D/A XXXXh
DADR0 0V
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1291 of 1551
RA4W1
35. 12 D/A DAC12
35.4
DA0
1. DADPR.DPSEL DADR0 D/A
2. ELC_DA0 ELSR12
3. ELC.ELCR.ELCON 1
4. DACR.DAOE0 1 0 D/A
5. DAC12 0 ELC.ELSR12.ELS[7:0] 00h ELCON 0
35.5
DACR.DAOE0ELC_DA0 1
D/AA/D DAADSCR.DAADST 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1292 of 1551
RA4W1
35. 12 D/A DAC12
35.6
35.6.1
DAC12 DAC12 11.
35.6.2 DAC12
D/A MCU D/A D/A DACR.DAOE0 0 D/A
35.6.3 DAC12
D/A MCU D/A D/A DACR.DAOE0 0 D/A
35.6.4 D/A A/D
DAADSCR.DAADST 1D/A A/D ADC14 A/D D/A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1293 of 1551
RA4W1
36. TSN
36. TSN
36.1
ADC14
36.1 36.1
36.1
ADC14
14A/D
36.1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1294 of 1551
RA4W1
36.2 36.2.1 HTSCDRH
TSN.TSCDRH 407E C228h
b7
b6
b5
b4
b3
b2
b1
b0
TSCDRH[7:0]
36. TSN
R/W
b7-b0
TSCDRH[7:0]
4
R
36.2.2 LTSCDRL
TSN.TSCDRL 407E C229h
b7
b6
b5
b4
b3
b2
b1
b0
TSCDRL[7:0]
R/W
b7-b0
TSCDRL[7:0]
8
R
TSCDRH TSCDRL
ADC14 Ta = Tj = 125 AVCC0 = 3.3V TSCDRH 4 TSCDRL 8
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1295 of 1551
RA4W1
36. TSN
36.3
ADC14
36.3.1
TVs T = (Vs - V1) / Slope + T1
T VsV T11 V1T1 V T22 V2T2 V SlopeV/ Slope = (V2 - V1) / (T2 - T1) 2 1. ADC14 T1 V1 2. ADC14 T1 T2 V2
Slope = (V2 - V1) / (T2 - T1) 3. Slope T = (Vs - V1) / Slope + T1 48.1 V1 T1 2
TSCDRH TSCDRL Ta = Tj = 125 AVCC0 = 3.3V CAL125 1
CAL125 CAL125 = (TSCDRH << 8) + TSCDRL V1 CAL125 V1 = 3.3 � CAL125 / 4096V
T = (Vs0 - V1) / Slope + 125 T VsV V1Ta = Tj = 125 AVCC0 = 3.3V V Slope � 1000V/
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1296 of 1551
RA4W1 36.2 3
� 12.0
36. TSN
� 10.0
� 8.0
[]
� 6.0
� 4.0
� 2.0
� 0.0
-40
-20
0
20
40
60
80
[]
36.2
36.3.2
34.14 A/D ADC14
100
120
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1297 of 1551
RA4W1
37. OPAMP
37. OPAMP
37.1
MCU 2 1 1
ADC14
AGT A/D 37.1 37.2
AMPTRS[1:0] AMPTRMn[1:0]
AMPMON[n] AMPSP
37.1
A/D
AGT1A AGT0A
AMPE[n]
IREFE
AMPn+
AMPnn = 2 AMPSP, AMPPC AMPMC AMPTRMn[1:0] AMPTRM AMPTRS[1:0] AMPTRS IREFE, AMPE[n] AMPC AMPMON[n] AMPMON
MUX
MUX
MUX
+
OPn
-
AMPPC[n]
AMPnO
37.1
OPAMP
2 2
AMP2+AMP2AMP2O
2+- 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1298 of 1551
RA4W1
37.2 37.2.1 AMPMC
OPAMP.AMPMC 4008 6008h
b7
b6
b5
b4
b3
b2
b1
b0
AMPSP --
--
--
--
AMPPC [2]
--
--
0
0
0
0
0
0
0
0
37. OPAMP
b1-b0 b2
-- AMPPC[2]
b6-b3 b7
-- AMPSP
R/W
0 0
R/W
0 2
R/W
1 2
0 0
R/W
0
R/W
1
.
AMPC 00hAMPSP
.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1299 of 1551
RA4W1
37. OPAMP
37.2.2 AMPTRM
OPAMP.AMPTRM 4008 6009h
b7
b6
b5
b4
b3
b2
b1
b0
--
-- AMPTRM2[1:0] --
--
--
--
0
0
0
0
0
0
0
0
b3-b0 b5-b4
b7-b6
-- AMPTRM2[1:0]
--
00
OPAMP
AMPTRM2[1]
n2
0
0
1 1
AMPTRM2[0]
0 AMPC
A/D
1
AMPC
1 A/D
0 1 A/D
AMPC
1 A/D
A/D A/D
00
R/W R/W R/W
R/W
. 1.
2.
A/D A/D AGT AMPTRS AMPC 1 AMPTRM2[1:0] AMPC.AMPE[2] 0
37.2.3 AMPTRS
OPAMP.AMPTRS 4008 600Ah
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
-- AMPTRS[1:0]
0
0
0
0
0
0
0
0
b1-b0
AMPTRS[1:0]
1
b7-b2
--
b1 b0
0 02 2 0 12 1 1 0 1 12 0
00
R/W R/W
R/W
. 1.
AMPTRM AMPTRS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1300 of 1551
RA4W1
37.2.4 AMPC
OPAMP.AMPC 4008 600Bh
b7
b6
b5
b4
b3
b2
b1
b0
IREFE --
--
--
-- AMPE[2] --
--
0
0
0
0
0
0
0
0
37. OPAMP
b1-b0 b2
-- AMPE[2]
b6-b3 b7
-- IREFE
R/W
0 0
R/W
OPAMP
02
R/W
1
2 1
A/D
AGT
0 0
R/W
OPAMP 0
R/W
1
. 1.
IREFE 0
37.2
37.2
0 1 2
AGT1 A AGT0 A AGT1 A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1301 of 1551
RA4W1
37.2.5 AMPMON
OPAMP.AMPMON 4008 600Ch
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
AMPM ON[2]
--
--
0
0
0
0
0
0
0
0
37. OPAMP
R/W
b1-b0
--
0
R
b2
AMPMON[2]
2
02
R
12
b7-b3
--
0
R
.
A/D
CPU 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1302 of 1551
RA4W1
37. OPAMP
37.3
37.3.1
37.2
2
(2) AMPC.AMPE[n] (3)
(1) AMPCIREFE
(7) AMPC.AMPE[n]
(8)A/D 3
(6) AMPC.IREFE
1
(4) AMPCAMPE[n]IREFE
(5)
(9) AMPCAMPE[n]IREFE
(10) A/D
3
AMPSP = 01 AMPPC[n] = 02
AMPSP = 01 AMPPC[n] = 12
AMPSP = 11 AMPPC[n] = 02
AMPSP = 11 AMPPC[n] = 12
1. 2. 3.
AMPMC.AMPSP AMPTRS.AMPTRM 1 AMPMC.AMPPC[2] 3 A/D 3
37.2
48.
(2) (8)(2) (10)(3) (10)(4) (10)
A/D AMPTRM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1303 of 1551
RA4W1
37.3.2
37.3 37.6
37. OPAMP
AMPMC.AMPSP
AMPMC.AMPPC[n]
AMPTRS.AMPTRS[1:0]
AMPTRM.AMPTRMn[1:0]
xx
00
m
A/D AMPC.IREFE
AMPC.AMPE[n]
n
1
. 1.
nn = 2 mAMPTRS n IREFE AMPE[n]
37.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1304 of 1551
RA4W1
37. OPAMP
AMPMC.AMPSP
AMPMC.AMPPC[n] AMPTRS.AMPTRS[1:0] xx
AMPTRM.AMPTRMn[1:0] xx
01
m
A/D AMPC.IREFE
AMPC.AMPE[n]
n
1
. 1.
nn = 2 mAMPTRS n AGT AMPE[n]
37.4
AMPC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1305 of 1551
RA4W1
37. OPAMP
AMPMC.AMPSP
AMPMC.AMPPC[n]
AMPTRS.AMPTRS[1:0] xx
AMPTRM.AMPTRMn[1:0] xx
11
m
A/D AMPC.IREFE
AMPC.AMPE[n]
n
1
. 1.
nn = 2 mAMPTRS n AGT
37.5
A/D 1 A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1306 of 1551
RA4W1
37. OPAMP
AMPMC.AMPSP
AMPMC.AMPPC[n]
AMPTRS.AMPTRS[1:0] xx
AMPTRM.AMPTRMn[1:0] xx
11
m
A/D AMPC.IREFE
AMPC.AMPE[n]
n
A/D AMPC.AMPE[n]
1
. 1.
nn = 2 mAMPTRS n AGT 37.4
AMPE[n]
37.6
A/D 2 AMPC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1307 of 1551
RA4W1
37. OPAMP
37.4
37.7
P0iPFS.ASEL = 1
(P0iPFS) i = 41011 AMP2+AMP2-AMP2O
AMPC = 00h
AMPMC.AMPSP = 01
AMPTRM.AMPTRM2[1:0] = 00b
2
AMPMC.AMPSP AMPSPAMPC 00h
2
AMPMC.AMPPC[2] = 1
AMPMC.AMPPC[2] = 0
AMPC.IREFE = 1
IREFE = 1 AMPE[2] = 1
AMPC.AMPE[2] = 0
AMPC.AMPE[2] = 1
2
IREFE = 0
.
48.
2
2
2 2 IREFE = 0AMPE[2] = 0
37.7
OPAMP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1308 of 1551
RA4W1
37. OPAMP
37.5
37.8
AGT
P0iPFS.ASEL = 1
(P0iPFS) i = 41011 AMP2+AMP2-AMP2O
AMPC = 00h AMPMC.AMPSP = 01
2
AMPMC.AMPSP AMPSPAMPC 00h
AMPTRS.AMPTRS[1:0] =
AMPC.AMPE[2] = 0
AMPTRM.AMPTRM2[1:0] = 01b
AMPC.AMPE[2] = 1
2 AMPC.AMPE[2] = 0
2 AMPC.IREFE = 1 AMPE[2] = 1
AMPC.AMPE[2] = 0 AMPC.AMPE[2] = 1
37.8
OPAMP
2
2
2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1309 of 1551
RA4W1
37. OPAMP
37.6 A/D
A/D 37.9
AGT
ADC14
P0iPFS.ASEL = 1
(P0iPFS) i = 41011 AMP2+AMP2-AMP2O
AMPC = 00h
2
AMPMC.AMPSP = 01
AMPTRS.AMPTRS[1:0] =
AMPMC.AMPSP AMPSPAMPC 00h
AMPC.AMPE[2] = 0
AMPTRM.AMPTRM2[1:0] = 11b
2 A/D AMPC.AMPE[2] = 0
AMPC.AMPE[2] = 1
2 AMPC.IREFE = 1 AMPE[2] = 1
2
A/D
A/D
A/D
AMPC.AMPE[2]0
37.9
A/D
37.7
AMPC A/D A/D
A/D A/D
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1310 of 1551
RA4W1
38. ACMPLP
38. ACMPLP
38.1
ACMPLP ACMPLP0 ACMPLP1
CMPREFii = 0, 1 8 D/A MCU Vref
ACMPLP High-speed Low-speed
ACMPLP 38.1 ACMPLP 38.1 ACMPLP 38.2 38.2 ACMPLP
38.1
ACMLP
2 ACMPLP0ACMPLP1
CMPINii = 0, 1
Vref CMPREFii = 01 8 D/A
CMPREFii = 01 CMPREF0CMPREF1 8 D/A
ELC
3
High-speed Low-speed
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1311 of 1551
RA4W1
38. ACMPLP
CPLOUT1 CPLOUT0
ACMPLP1
VCOUT
C1VRF2 C1VRF SPDMD
C1FCK[1:0]
CMPIN1(P102) CMPIN1(P501)
CMPSEL[6:4] & ASEL IVCMP1
Vref
1
CMPREF1(P103) DAC8 (ch1)
0
IVREF1
1
0
CRVS[6:4] & ASEL
PCLKB PCLKB/8 PCLKB/32
01
10
11
3
00
C1MON C0MON
CMPREF0(P101) DAC8 (ch0)
IVREF0 CRVS[2:0] & ASEL
CMPIN0(P100)
IVCMP0
CMPSEL[2:0] & ASEL
00 0
1
3
PCLKB/32 PCLKB/8 PCLKB
11
10 01
1.
C0VRF
ACMPLP VCOUT
C0FCK[1:0]
C1EPO
C1EDG
1
0
0
1
1 0
C1OP C0OP
C1OE C0OE
0 1
1
0
0
1
C0EPO
C0EDG
ACMP_LP1 ELC
CPLOUT1
CPLOUT0
ACMP_LP0 ELC
38.1
ACMPLP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1312 of 1551
RA4W1
38. ACMPLP
CPLOUT1 CPLOUT0
ACMPLP1
VCOUT
CMPIN1(P102) CMPIN1(P501)
CMPSEL[6:4] & ASEL IVCMP1
CMPREF1(P103) DAC81
IVREF1
CRVS[6:4] & ASEL
SPDMD
C1FCK[1:0]
PCLKB PCLKB/8 PCLKB/32
01
10
11
3
00
C1MON C0MON
CMPREF0(P101)
DAC80
IVREF0
CRVS[2:0] & ASEL
CMPIN0(P100)
IVCMP0
CMPSEL[2:0] & ASEL
00
3
PCLKB/32 PCLKB/8 PCLKB
11 10
01
C0FCK[1:0]
1. ACMPLP VCOUT
C1EPO
C1EDG
1
0
0
1
1 0
C1OP C0OP
C1OE C0OE
0 1
1
0
0
1
C0EPO
C0EDG
ACMP_LP1 ELC
CPLOUT1
CPLOUT0
ACMP_LP0 ELC
38.2
ACMPLP
38.2
ACMPLP0
IVREF0 (CMPREF0 (P101)/DAC8 ( 0))
Vref
ACMPLP1
IVREF0 (CMPREF0(P101)/
DAC8 ( 0)) IVREF1 (CMPREF1
(P103)/DAC8 ( 1)) Vref
IVREF0 (CMPREF0(P101)/
DAC8 ( 0)) IVREF1 (CMPREF1
(P103)/DAC8 ( 1))
IVCMP0 (CMPIN0(P100)
IVCMP1 (CMPIN1(P102)/CMPIN1 (P501)
VCOUT 1
1. ACMPLP0 ACMPLP1 VCOUT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1313 of 1551
RA4W1
38. ACMPLP
38.2 38.2.1 ACMPLP COMPMDR
ACMPLP.COMPMDR 4008 5E00h
b7
b6
b5
b4
b3
b2
b1
b0
C1MO N
C1VRF
C1WD E
C1ENB
C0MO N
C0VRF
C0WD E
C0ENB
0
0
0
0
0
0
0
0
b0 b1 b2 b3
b4 b5 b6 b7
C0ENB
ACMPLP0
C0WDE C0VRF
ACMPLP0 1 26
ACMPLP0 6
C0MON
ACMPLP0 3
C1ENB C1WDE C1VRF C1MON
ACMPLP1
ACMPLP1 1 25 ACMPLP1 5
ACMPLP1 3
0 ACMPLP0 1 ACMPLP0
0ACMPLP0 1ACMPLP0
0IVREF0 1Vref 4
0IVCMP0 ACMPLP0 1IVCMP0 ACMPLP0 0IVCMP0 IVREF0 IVCMP0 IVREF1 1IVREF0 IVCMP0 IVREF1
0ACMPLP1 1ACMPLP1
0ACMPLP1 1ACMPLP1
0IVREF0 IVREF1 1Vref 4
0IVCMP1 ACMPLP1 1IVCMP1 ACMPLP1 0IVCMP1 IVREF0 IVCMP1 IVREF1 1IVREF0 IVCMP1 IVREF1
R/W R/W R/W R/W
R
R/W R/W R/W
R
1. 2. 3.
4.
5. 6.
Low-speed COMPOCR.SPDMD 0
0 C0ENB C1ENB 0 IVREF0 IVREF1
C1WDE C1VRF CRV[6:4] CRV[2:0] 000b C0WDE C0VRF CRV[2:0] 000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1314 of 1551
RA4W1
38. ACMPLP
38.2.2 ACMPLP COMPFIR
ACMPLP.COMPFIR 4008 5E01h
b7
b6
b5
b4
b3
b2
b1
b0
C1EDG C1EPO C1FCK[1:0] C0EDG C0EPO C0FCK[1:0]
0
0
0
0
0
0
0
0
R/W
b1-b0
C0FCK[1:0] ACMPLP0
1
b1 b0
0 0 0 1PCLKB 1 0PCLKB/8 1 1PCLKB/32
R/W
b2
C0EPO
ACMPLP0 0 ELC R/W
1
1 ELC
b3
C0EDG
ACMPLP0
0 ELC
R/W
1
1 ELC
b5-b4
C1FCK[1:0] ACMPLP1
1
b5 b4
0 0 0 1PCLKB 1 0PCLKB/8 1 1PCLKB/32
R/W
b6
C1EPO
ACMPLP1 0 ELC R/W
1
1 ELC
b7
C1EDG
ACMPLP1
0 ELC
R/W
1
1 ELC
1.
CiFCK[1:0]CiEPO CiEDGi = 0, 1ACMPLP ELC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1315 of 1551
RA4W1
38. ACMPLP
38.2.3 ACMPLP COMPOCR
ACMPLP.COMPOCR 4008 5E02h
b7
b6
b5
b4
SPDM D
C1OP
C1OE
--
0
0
0
0
b3
b2
b1
b0
-- C0OP C0OE --
0
0
0
0
R/W
b0
--
0 0
R/W
b1
C0OE
ACMPLP0 VCOUT1 0ACMPLP0 VCOUT
R/W
1ACMPLP0 VCOUT
b2
C0OP
ACMPLP0 VCOUT1 0
1
R/W
b4-b3
--
0 0
R/W
b5
C1OE
ACMPLP1 VCOUT1 0ACMPLP1 VCOUT
R/W
1ACMPLP1 VCOUT
b6
C1OP
ACMPLP1 VCOUT1 0
1
R/W
b7
SPDMD
ACMPLP0/ACMPLP12 0 Low-speed
R/W
1 High-speed
1. 2.
ACMPLP0 ACMPLP1 VCOUT SPDMD COMPMDR CiENB i = 0, 1 0
38.2.4 COMPSEL0
ACMPLP.COMPSEL0 4008 5E04h
b7
b6
b5
b4
b3
--
CMPSEL[6:4]
--
0
0
0
1
0
b2
b1
b0
CMPSEL[2:0]
0
0
1
b2-b0
b3 b6-b4
b7
CMPSEL[2:0]
-- CMPSEL[6:4]
--
ACMPLP0 IVCMP01
ACMPLP1 IVCMP12
b2
b0
0 0 0
0 0 1CMPIN0 (P100)
00
b6
b4
0 0 0
0 0 1CMPIN1 (P102)
1 0 0CMPIN1 (P501)
00
1. 2.
CMPSEL[2:0] 000b 000b CMPSEL[6:4] 000b 000b
R/W R/W
R/W R/W
R/W
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1316 of 1551
RA4W1
38. ACMPLP
38.2.5 COMPSEL1
ACMPLP.COMPSEL1 4008 5E05h
b7
b6
b5
b4
b3
C1VRF 2
CRVS[6:4]
--
1
0
0
1
0
b2
b1
b0
CRVS[2:0]
0
0
1
b2-b0
b3 b6-b0
b7
CRVS[2:0]
-- CRVS[6:4]
C1VRF2
ACMPLP0 IVREF01
b2
b0
0 0 0
0 0 1CMPREF0 (P101)
0 1 0DAC8 0
0 0
ACMPLP1 IVREF12
b6
b4
0 0 0
0 0 1CMPREF1 (P103)
0 1 0DAC8 1
ACMPLP1 23
0IVREF0 1IVREF1
1. 2. 3.
CRVS[2:0] 000b 000b CRVS[6:4] 000b 000b C1VRF2 CRVS[6:4] CRVS[2:0] 000b
R/W R/W
R/W R/W
R/W
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1317 of 1551
RA4W1
38. ACMPLP
38.3
ACMPLP0 ACMPLP1 38.3 ACMPLP
38.3
ACMPLPi = 01
1
MSTPCRD
MSTPD29
0
2
mn ASEL
PmnPFS
COMPSEL0
CMPSEL[2:0] CMPSEL[6:4]
3
COMPOCR
SPDMD
0Low-speed 1High-speed 1
4
COMPMDR
CiWDE
0
1 2
COMPSEL1
CiVRF 5
CRVS[2:0] CRVS[6:4] C1VRF2
= IVREF0 IVREF13
COMPMDR
CiENB
1
5
tcmp100s
6
COMPFIR
CiFCK[1:0]
CiEPOCiEDG
7
COMPOCR
CiOPCiOE
VCOUT
mn PmnPFS
PSELPMR
VCOUT
8
IELSRn
IRIELS[7:0]
ICU 3
9
ELSRn
ELS[7:0]
ELC 4
10
1. 2. 3.
4.
5.
ACMPLP0 ACMPLP1 High-speed SPDMD = 1 Vref38.2.1ACMPLP COMPMDR
ACMPLPii = 0, 1 38.3 IVREFiVrefIVCMPi
COMPMDR.CiMON 1
CiMON 0
ACMPLPi ICU 38.5ACMPLP ACMPLPi ELC ELC 38.6ELC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1318 of 1551
RA4W1
38. ACMPLP
V
0
COMPMDR.CiMON 1 (i = 0, 1) 0
ICUIELSRn.IR
1 0
(A)
(B)
(A)
0
38.3
ACMPLPii = 0, 1
38.3
CiFCK[1:0] = 00b CiEDG = 1
CiEDG = 0 CiEPO = 0IELSRn.IR A
CiEDG = 0 CiEPO = 1IELSRn.IR B
ACMPLPii = 0, 1 38.4
IVREF0/IVREF1CiMON
IVREF0 IVREF1 1
IVREF0 IVREF1 0
ACMPLPi ICU 38.5ACMPLP ACMPLPi ELC ELC 38.6ELC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1319 of 1551
RA4W1
38. ACMPLP
V
IVREF1
IVREF0 0
COMPMDR.CiMON 1 (i = 0, 1) 0
1 ICUIELSRn.IR 0
(A)
(B)
(A)
(B)
(A)
(B)
0
38.4
ACMPLPii = 0, 1
38.4
CiFCK[1:0] = 00b CiEDG = 1
CiEDG = 0 CiEPO = 0IELSRn.IR A
CiEDG = 0 CiEPO = 1IELSRn.IR B
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1320 of 1551
RA4W1
38. ACMPLP
38.4
ACMPLPi 38.5 38.6
COMPFIR.CiFCK[1:0] ACMPLPi ACMP_LPi 3 IELSRn.IR 1ELC
COMPFIR.CiFCK[1:0] 00b
38.5
C1FCK[1:0]
PCLKB PCLKB/8 PCLKB/32
01 10
11
ACMPLP1
3
00
C1MON C0MON
ACMPLP0
00
3
PCLKB/32 PCLKB/8 PCLKB
11 10
01
C0FCK[1:0]
C1EPO
C1EDG
1
0
0
1
1 0
C1OP C0OP
C1OE C0OE
0 1
1
0
0
1
C0EPO
C0EDG
ACMP_LP1 ELC
CPLOUT1
CPLOUT0
ACMP_LP0 ELC
IELSRn.IR
3
IR
3 IR1
38.6
R01UH0883JJ0100 Rev.1.00 2020.08.31
0
Page 1321 of 1551
RA4W1
38. ACMPLP
38.5 ACMPLP
ACMPLP ACMPLP0 ACMPLP1 ACMPLPii = 0, 1 ICU IELSRn COMPFIR.CiEDG CiEPO
COMPFIR.CiFCK[1:0] 3 1 COMPFIR.CiFCK[1:0] 01b10b 11b ACMPLP0 COMPFIR.C0FCK[1:0] 00b ACMPLP1
38.6 ELC
ELC ACMPLP ELC ACMPLP ELC ELC ELSRn ELC COMPFIR.CiFCK[1:0] 01b10b 11b
38.7 ELC
ACMPLPi ELC ACMPLPi ELC COMPFIR.CiEDG CiEPO
38.8
ACMPLPi COMPOCR.CiOP CiOE
ACMPLP CPLOUTi VCOUT I/O mn PmnPFS
38.2.3ACMPLP COMPOCR
38.9
38.9.1
ACMPLP ACMPLP 11.
38.9.2 A/D
ACMPLP A/D 34.8.13ADC14OPAMPACMPLP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1322 of 1551
RA4W1
39. 8 D/ADAC8
39. 8 D/A DAC8
39.1
39.1 8 D/A 39.1
39.1
8 D/A
8 2
D/A (DAM)
D/A0 (DACS0)
D/A1 (DACS1)
VCC
VSS
8 D/A 0
8 D/A 1
ACMPLP 0
ACMPLP 1
39.1
8 D/A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1323 of 1551
RA4W1
39. 8 D/ADAC8
39.2 39.2.1 D/A nDACSnn = 0, 1
DAC8.DACS0 4009 E000h, DAC8.DACS1 4009 E001h
b7
b6
b5
b4
b3
b2
b1
b0
DACS[7:0]
0
0
0
0
0
0
0
0
DACSn D/A 8 D/A DACSn ACMPLP
8 D/A COMPSEL1 ACMPLP ACMPLP COMPMDR.CnENB = 1 DACS[7:0]
39.2.2 D/A DAM
DAC8.DAM 4009 E003h
b7
b6
b5
b4
b3
b2
b1
b0
--
-- DACE1 DACE0 --
--
--
--
0
0
0
0
0
0
0
0
R/W
b3-b0
--
0 0
R/W
b4
DACE0 D/A 0
00 D/A
R/W
10 D/A
b5
DACE1 D/A 1
01 D/A
R/W
11 D/A
b7-b6
--
0 0
R/W
DACEn D/A nn = 0, 1
D/A
8 D/A COMPSEL1 ACMPLP ACMPLP COMPMDR.CnENB = 1 DACEn
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1324 of 1551
RA4W1
39. 8 D/ADAC8
39.3
8 D/A 2 D/A DAM.DACEn n = 0, 1 1 8 D/A ACMPLP
0 D/A
1. DACS0 D/A
2. DAM.DACE0 1 D/A ACMPLP DACS0 DAM.DACE0 0D/A
DACS0 256
� VCC
3. COMPSEL1 8 D/A 4. COMPMDR.CiENB 1 5. Tcmp 100s38.
ACMPLP
39.4
39.4.1
8 D/A 8 D/A 11.
39.4.2 8 D/A
D/A MCU D/A D/A DAM.DACEn 0 D/A
39.4.3 8 D/A
D/A MCU D/A D/A DAM.DACEn 0 D/A
39.4.4 D/A
8 D/A DAM.DACEn 0 DACSn 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1325 of 1551
RA4W1
40. CTSU
40. CTSU
40.1
CTSU
40.1
MCU
MCU
40.1
1 2
MCU
MCU
40.2
CTSU 40.3.1 40.1 CTSU 40.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1326 of 1551
RA4W1
40. CTSU
40.1
CTSU
TSCAP
PCLKB, PCLKB/2, PCLKB/4
11 TS00TS01TS03TS10TS12TS13TS18TS28 TS30TS31TS34
LPFLow Pass Filter
1
ELCELC_CTSU
CTSU 40.3
I/O
ELC
PCLKB PCLKB/2 PCLKB/4
DTC
CTSU_CTSUWR
ICU
CTSU_CTSURD
CPU
CTSU_CTSUFN
CTSU
CTSUSC CTSURC
ICO
ICO
ICO ICO
I/O
ICO
1. n = 00, 01, 03, 10, 12, 13, 18, 28, 30, 31, 34
40.3
CTSU
I/O
I/O
TSn1
TSCAP I/O
TSCAP LPF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1327 of 1551
RA4W1
40. CTSU
40.2
CTSU
TS00, TS01, TS03, TS10, TS12, TS13, TS18, TS28, TS30, TS31, TS34
TSCAP
--
LPF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1328 of 1551
RA4W1
40. CTSU
40.2 40.2.1 CTSU 0CTSUCR0
CTSU.CTSUCR0 4008 1000h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
CTSUI NIT
--
CTSUS CTSUC CTSUS
NZ
AP TRT
0
0
0
0
0
0
0
0
R/W
b0
CTSUSTRT CTSU
0 1 1
R/W
b1
CTSUCAP CTSU 0
R/W
1
b2
CTSUSNZ CTSU
R/W
0
1
b3
--
0 0
R/W
b4
CTSUINIT CTSU
1 CTSU CTSUSCCTSURC
W
CTSUMCH0CTSUMCH1CTSUST
0
b7-b5 --
0 0
R/W
1. CTSU 0
CTSUCAP CTSUSNZ CTSUSTRT 0
CTSUSTRT CTSU
CTSUCAP 0 CTSUSTRT 1 CTSUSTRT 0 CTSUCAP 1 CTSUSTRT 1
CTSU 40.3
40.3
CTSU
CTSUSTRT 0
CTSUCAP 0
0
1
1
0
1
1
CTSU 1
1.
CTSUST.CTSUSTC[2:0] CTSUST.CTSUSTC[2:0] 000b CTSUST.CTSUSTC[2:0] = 000b
CTSUSTRT 1 1 CTSUSTRT 1 CTSUSTRT 0 CTSUINIT 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1329 of 1551
RA4W1
40. CTSU
CTSUCAP CTSU
CTSUSTRT CTSU
CTSUSNZ CTSU
CTSU CTSU OFF TSCAP
CTSU 40.4
40.4
CTSU
CTSUCR1.CTSUPON CTSUSNZ
0
0
1
0
1
1
CTSUCAP 0 -- 0
CTSUSTRT 0 -- 0
CTSU
.
CTSUSNZ 0 CTSUSTRT 1 CTSUSNZ 1
CTSUINIT CTSU
1 CTSUSTRT 0 CTSUINIT 1
CTSUSTRT 1 CTSUINIT 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1330 of 1551
RA4W1
40. CTSU
40.2.2 CTSU 1CTSUCR1
CTSU.CTSUCR1 4008 1001h
b7
b6
b5
b4
b3
b2
b1
b0
CTSUMD[1:0]
0
0
CTSUCLK[1:0]
CTSUA CTSUA CTSUC CTSUP TUNE1 TUNE0 SW ON
0
0
0
0
0
0
b0
CTSUPON
CTSU
b1
CTSUCSW
CTSU LPF
b2
CTSUATUNE0 CTSU
b3 b5-b4
CTSUATUNE1 CTSU CTSUCLK[1:0] CTSU
b7-b6
CTSUMD[1:0] CTSU
R/W
CTSU
R/W
0 OFF
1 ON
TSCAP LPF R/W 0 OFF 1 ON
VCC 2.4V
R/W
0
1
VCC 2.4V
0
1
0
R/W
1
CTSU
R/W
b5 b4
0 0PCLKB
0 1PCLKB/2PCLKB 2
1 0PCLKB/4PCLKB 4
1 1
CTSU
b7 b6
0 0 0 1 1 0 1 1
R/W
CTSUCR1 CTSUCR0.CTSUSTRT 0
CTSUPON CTSU
CTSU CTSUPON CTSUCSW
CTSUCSW CTSU LPF
ON/OFF TSCAP LPF ON TSCAP CTSUCR0.CTSUSTRT 1 I/O TSCAP Low LPF CTSUPON CTSUCSW
CTSUATUNE0 CTSU
CTSU CTSU VCC VCC VCC 1 VCC 2 3V
CTSUATUNE1 CTSU
CTSU 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1331 of 1551
RA4W1
40. CTSU
CTSUCLK[1:0] CTSU
CTSUMD[1:0] CTSU 40.3.2
40.2.3 CTSU CTSUSDPRS
CTSU.CTSUSDPRS 4008 1002h
b7
b6
b5
b4
b3
b2
b1
b0
-- 0
CTSUS CTSUPRMODE[
OFF
1:0]
0
0
0
CTSUPRRATIO[3:0]
0
0
0
0
R/W
b3-b0
CTSUPRRATIO CTSU
R/W
[3:0]
30011b
b5-b4
CTSUPRMODE CTSU
R/W
[1:0]
b5 b4
0 0510
0 1126
1 062
1 1
b6
CTSUSOFF
CTSU OFF R/W
0ON
1OFF
b7
--
00 R/W
CTSUSDPRS CTSUCR0.CTSUSTRT 0
CTSUPRRATIO[3:0] CTSU CTSUPRMODE[1:0]
= � CTSUPRRATIO[3:0] + 1 = � CTSUPRRATIO[3:0] + 1+ - 2� 0.25 �
. 40.2.21CTSU 1CTSUSO1
CTSUPRMODE[1:0] CTSU
CTSUSOFF CTSU OFF ON/OFF 1 OFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1332 of 1551
RA4W1
40. CTSU
40.2.4 CTSU CTSUSST
CTSU.CTSUSST 4008 1003h
b7
b6
b5
b4
b3
b2
b1
b0
CTSUSST[7:0]
0
0
0
0
0
0
0
0
R/W
b7-b0
CTSUSST[7:0] CTSU
0001_0000b
R/W
CTSUSST CTSUCR0.CTSUSTRT 0
CTSUSST[7:0] CTSU
TSCAP 0001_0000b TSCAP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1333 of 1551
RA4W1
40. CTSU
40.2.5 CTSU 0CTSUMCH0
CTSU.CTSUMCH0 4008 1004h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
CTSUMCH0[5:0]
0
0
1
1
1
1
1
1
b5-b0
CTSUMCH0[5:0] CTSU0
CTSU
b5
b0
0 0 0 0 0 0TS00
0 0 0 0 0 1TS01
0 0 0 0 1 1TS03
0 0 1 0 1 0TS10
0 0 1 1 0 0TS12
0 0 1 1 0 1TS13
0 1 0 0 1 0TS18
0 1 1 1 0 0TS28
0 1 1 1 1 0TS30
0 1 1 1 1 1TS31
1 0 0 0 1 0TS34
R/W
R/W
1
b7-b6
--
CTSUCR0.CTSUSTRT 1
b5
b0
0 0 0 0 0 0TS00
0 0 0 0 0 1TS01
0 0 0 0 1 1TS03
0 0 1 0 1 0TS10
0 0 1 1 0 0TS12
0 0 1 1 0 1TS13
0 1 0 0 1 0TS18
0 1 1 1 0 0TS28
0 1 1 1 0 1TS29
0 1 1 1 1 0TS30
0 1 1 1 1 1TS31
1 0 0 0 1 0TS34
1 1 1 1 1 1
0 0
R/W
1. CTSUCR1.CTSUMD[1:0] = 00b
CTSUMCH0 CTSUCR0.CTSUSTRT 0
CTSUMCH0[5:0] CTSU 0
CTSHMCH0[5:0] 000000b, 000001b, 000011b, 001010b, 001100b, 001101b, 010010b, 011100b, 011110b, 011111b, 100010b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1334 of 1551
RA4W1
40. CTSU
40.2.6 CTSU 1CTSUMCH1
CTSU.CTSUMCH1 4008 1005h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
CTSUMCH1[5:0]
0
0
1
1
1
1
1
1
R/W
b5-b0
CTSUMCH1[5:0] CTSU1
b5
b0
R
0 0 0 0 0 0TS00
0 0 0 0 0 1TS01
0 0 0 0 1 1TS03
0 0 1 0 1 0TS10
0 0 1 1 0 0TS12
0 0 1 1 0 1TS13
0 1 0 0 1 0TS18
0 1 1 1 0 0TS28
0 1 1 1 1 0TS30
0 1 1 1 1 1TS31
1 0 0 0 1 0TS34
1 1 1 1 1 1
b7-b6
--
0
R
CTSUMCH1[5:0] CTSU 1
111111b
40.2.7 CTSU 0CTSUCHAC0
CTSU.CTSUCHAC0 4008 1006h
b7
b6
b5
b4
b3
b2
b1
b0
CTSUCHAC0[7:0]
1
0
0
0
0
0
0
0
0
R/W
b7-b0
CTSUCHAC0[7:0] CTSU 0 TS
R/W
1
0
1
TS00TS01TS03
1.
MCU TS02 TS04 TS07 CTSUCHAC0[2] CTSUCHAC0[4:7] 0 0
CTSUCHAC0 CTSUCR0.CTSUSTRT 0
CTSUCHAC0[7:0] CTSU 0
CTSUCHAC0[0] TS00 CTSUCHAC0[3] TS03
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1335 of 1551
RA4W1
40. CTSU
40.2.8 CTSU 1CTSUCHAC1
CTSU.CTSUCHAC1 4008 1007h
b7
b6
b5
b4
b3
b2
b1
b0
CTSUCHAC1[7:0]
1
0
0
0
0
0
0
0
0
R/W
b7-b0
CTSUCHAC1[7:0] CTSU 1 TS
R/W
1
0
1
TS10TS12TS13
1.
MCU TS08TS09TS11TS14 TS15 CTSUCHAC1[0] CTSUCHAC1[1]CTSUCHAC1[3] CTSUCHAC1[7:6] 0 0
CTSUCHAC1 CTSUCR0.CTSUSTRT 0
CTSUCHAC1[7:0] CTSU 1
CTSUCHAC1[2] TS10 CTSUCHAC1[5] TS13
40.2.9 CTSU 2CTSUCHAC2
CTSU.CTSUCHAC2 4008 1008h
b7
b6
b5
b4
b3
b2
b1
b0
CTSUCHAC2[7:0]
1
0
0
0
0
0
0
0
0
R/W
b7-b0 CTSUCHAC2[7:0] CTSU2 TS
R/W
1
0
1
TS18
1.
MCU TS16 TS17 TS19 TS23 CTSUCHAC2[7:3] CTSUCHAC2[1:0] 0 0
CTSUCHAC2 CTSUCR0.CTSUSTRT 0 CTSUCHAC2[7:0] CTSU 2
CTSUCHAC2[2] TS18
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1336 of 1551
RA4W1
40. CTSU
40.2.10 CTSU 3CTSUCHAC3
CTSU.CTSUCHAC3 4008 1009h
b7
b6
b5
b4
b3
b2
b1
b0
CTSUCHAC3[7:0]
1
0
0
0
0
0
0
0
0
b7-b0
CTSUCHAC3[7:0]
1
CTSU 3
R/W
TS
R/W
0
1
TS28TS30 TS31
1.
MCU TS24 TS27 TS29 CTSUCHAC3[3:0] CTSUCHAC3[5] 0 0
CTSUCHAC3 CTSUCR0.CTSUSTRT 0
CTSUCHAC3[7:0] CTSU 3
CTSUCHAC3[4] TS28 CTSUCHAC3[7] TS31
40.2.11 CTSU 4CTSUCHAC4
CTSU.CTSUCHAC4 4008 100Ah
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
0
0
0
0
CTSUCHAC4[3:0]
1
0
0
0
0
R/W
b3-b0 CTSUCHAC4[3:0] CTSU4
TS
R/W
1
0
1
TS34
b7-b4 --
0 0
R/W
1.
MCU TS32TS33 TS35 CTSUCHAC4[3] CTSUCHAC4[1:0] 0 0
CTSUCHAC4 CTSUCR0.CTSUSTRT 0 CTSUCHAC4[3:0] CTSU 4
CTSUCHAC4[2] TS34
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1337 of 1551
RA4W1
40. CTSU
40.2.12 CTSU 0CTSUCHTRC0
CTSU.CTSUCHTRC0 4008 100Bh
b7
b6
b5
b4
b3
b2
b1
b0
CTSUCHTRC0[7:0]
1
0
0
0
0
0
0
0
0
R/W
b7-b0 CTSUCHTRC0[7:0] CTSU0 0
R/W
1
1
TS00TS01TS03
1.
MCU TS02 TS04 TS07 CTSUCHTRC0[2] CTSUCHTRC0[7:4] 0 0
CTSUCHTRC0 CTSUCR0.CTSUSTRT 0
CTSUCHTRC0[7:0] CTSU 0
TS CTSUCHTRC0[0] TS00 CTSUCHTRC0[3] TS03
40.2.13 CTSU 1CTSUCHTRC1
CTSU.CTSUCHTRC1 4008 100Ch
b7
b6
b5
b4
b3
b2
b1
b0
CTSUCHTRC1[7:0]
1
0
0
0
0
0
0
0
0
b7-b0
CTSUCHTRC1[7:0]
1
R/W
CTSU1 0
R/W
1
TS10TS12TS13
1.
MCU TS08TS09TS11TS14 TS15 CTSUCHTRC1[0] CTSUCHTRC1[1]CTSUCHTRC1[3] CTSUCHTRC1[7:6] 0 0
CTSUCHTRC1 CTSUCR0.CTSUSTRT 0
CTSUCHTRC1[7:0] CTSU 1
TS CTSUCHTRC1[2] TS10 CTSUCHTRC1[5] TS13
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1338 of 1551
RA4W1
40. CTSU
40.2.14 CTSU 2CTSUCHTRC2
CTSU.CTSUCHTRC2 4008 100Dh
b7
b6
b5
b4
b3
b2
b1
b0
CTSUCHTRC2[7:0]
1
0
0
0
0
0
0
0
0
b7-b0
CTSUCHTRC2[7:0]
1
CTSU2 0 1 TS18
R/W R/W
1.
MCU TS16TS17 TS19 TS23 CTSUCHTRC2[7:3] CTSUCHTRC2[1:0] 0 0
CTSUCHTRC2 CTSUCR0.CTSUSTRT 0
CTSUCHTRC2[7:0] CTSU 2
TS CTSUCHTRC2[2] TS18
40.2.15 CTSU 3CTSUCHTRC3
CTSU.CTSUCHTRC3 4008 100Eh
b7
b6
b5
b4
b3
b2
b1
b0
CTSUCHTRC3[7:0]
1
0
0
0
0
0
0
0
0
R/W
b7-b0
CTSUCHTRC3[7:0]
1
CTSU 3
0 1 TS28TS30 TS31
R/W
1.
MCU TS24 TS27 TS29 CTSUCHTRC3[3:0] CTSUCHTRC3[5] 0 0
CTSUCHTRC3 CTSUCR0.CTSUSTRT 0
CTSUCHTRC3[7:0] CTSU 3
TS CTSUCHTRC3[4] TS28 CTSUCHTRC3[7] TS31
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1339 of 1551
RA4W1
40. CTSU
40.2.16 CTSU 4CTSUCHTRC4
CTSU.CTSUCHTRC4 4008 100Fh
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
0
0
0
0
CTSUCHTRC4[3:0]
1
0
0
0
0
R/W
b3-b0 CTSUCHTRC4[3:0] CTSU4 0
R/W
1
1
TS34
b7-b4 --
0 0
R/W
1.
MCU TS32TS33 TS35 CTSUCHTRC4[3] CTSUCHTRC4[1:0] 0 0
CTSUCHTRC4 CTSUCR0.CTSUSTRT 0
CTSUCHTRC4[3:0] CTSU 4
TS CTSUCHTRC4[2] TS34
40.2.17 CTSU CTSUDCLKC
CTSU.CTSUDCLKC 4008 1010h
b7 -- 0
b6
b5
b4
b3
--
CTSUSSCNT[1: 0]
--
0
0
0
0
b2
b1
b0
--
CTSUSSMOD[1 :0]
0
0
0
b1-b0 b3-b2 b5-b4 b7-b6
CTSUSSMOD[1:0] -- CTSUSSCNT[1:0] --
CTSU CTSU
R/W
00b
R/W
0 0 R/W
11b
R/W
0 0 R/W
CTSUDCLKC CTSUCR0.CTSUSTRT 0
CTSUSSMOD[1:0] CTSU
00b CTSU
CTSUSSCNT[1:0] CTSU
11b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1340 of 1551
RA4W1
40. CTSU
40.2.18 CTSU CTSUST
CTSU.CTSUST 4008 1011h
b7
b6
b5
b4
b3
CTSUP CTSUR CTSUS CTSUD
S
OVF OVF TSR
--
0
0
0
0
0
b2
b1
b0
CTSUSTC[2:0]
0
0
0
R/W
b2-b0
CTSUSTC[2:0] CTSU
R
b2
b0
0 0 0Status0
0 0 1Status1
0 1 0Status2
0 1 1Status3
1 0 0Status4
1 0 1Status5
b3
--
00
R/W
b4
CTSUDTSR CTSU
R
0
1
b5
CTSUSOVF CTSU
R/W
0
1
b6
CTSUROVF CTSU R/W
0
1
b7
CTSUPS
CTSU
R
01
12
CTSUCR0.CTSUINIT CTSUCR0.CTSUSTRT 0
CTSUSTC[2:0] CTSU
40.3.2.2
CTSUDTSR CTSU
1 DTC 0 CTSUCR0.CTSUINIT
CTSUSOVF CTSU
CTSUSC FFFFh
1 0 CTSUCR0.CTSUINIT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1341 of 1551
RA4W1
40. CTSU
CTSUROVF CTSU
CTSURC FFFFh
1 0 CTSUCR0.CTSUINIT
CTSUPS CTSU
CTSUCR1.CTSUMD[1:0] = 11b1 2 1 2 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1342 of 1551
RA4W1
40. CTSU
40.2.19 CTSU CTSUSSC
CTSU.CTSUSSC 4008 1012h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
CTSUSSDIV[3:0]
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b7-b0
--
00
R/W
b11-b8
CTSUSSDIV[3:0] CTSU R/W
b15-b12 --
00
R/W
CTSUSSDIV[3:0] CTSU
CTSUSSDIV[3:0] 40.5
40.5
CTSUSSDIV[3:0]
fbMHz 4.00 fb 2.00fb 4.00 1.33fb 2.00 1.00fb 1.33 0.80fb 1.00 0.67fb 0.80 0.57fb 0.67 0.50fb 0.57 0.44fb 0.50 0.40fb 0.44 0.36fb 0.40 0.33fb 0.36 0.31fb 0.33 0.29fb 0.31 0.27fb 0.29 fb 0.27
0000b 0001b 0010b 0011b 0100b 0101b 0110b 0111b 1000b 1001b 1010b 1011b 1100b 1101b 1110b 1111b
CTSUSSDIV[3:0]
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1343 of 1551
RA4W1
40. CTSU
40.2.20 CTSU 0CTSUSO0
CTSU.CTSUSO0 4008 1014h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
CTSUSNUM[5:0]
CTSUSO[9:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b9-b0
CTSUSO[9:0]
CTSU
R/W
b9
b0
0 0 0 0 0 0 0 0 0 00
0 0 0 0 0 0 0 0 0 11
0 0 0 0 0 0 0 0 1 02
1 1 1 1 1 1 1 1 1 01022
1 1 1 1 1 1 1 1 1 1
b15-b10 CTSUSNUM[5:0] CTSU
CTSU
R/W
CTSUSO[9:0] CTSU
ICO CTSU TS CTSU_CTSUWR
CTSUSNUM[5:0] CTSU
CTSUSDPRS.CTSUPRRATIO[3:0] CTSUSDPRS.CTSUPRMODE[1:0] CTSUSNUM[5:0] + 1 TS CTSU_CTSUWR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1344 of 1551
RA4W1
40. CTSU
40.2.21 CTSU 1CTSUSO1
CTSU.CTSUSO1 4008 1016h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
-- CTSUICOG[1:0]
CTSUSDPA[4:0]
CTSURICOA[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b7-b0
CTSURICOA[7:0] CTSU ICO ICO
R/W
b7
b0
0 0 0 0 0 0 0 00
0 0 0 0 0 0 0 11
0 0 0 0 0 0 1 02
1 1 1 1 1 1 1 0254
1 1 1 1 1 1 1 1
b12-b8
CTSUSDPA[4:0] CTSU
CTSU
R/W
b12
b8
0 0 0 0 0 2 1
0 0 0 0 1 4
0 0 0 1 0 6
0 0 0 1 1 8
0 0 1 0 0 10
0 0 1 0 1 12
0 0 1 1 0 14
0 0 1 1 1 16
0 1 0 0 0 18
0 1 0 0 1 20
0 1 0 1 0 22
0 1 0 1 1 24
0 1 1 0 0 26
0 1 1 0 1 28
0 1 1 1 0 30
0 1 1 1 1 32
1 0 0 0 0 34
1 0 0 0 1 36
1 0 0 1 0 38
1 0 0 1 1 40
1 0 1 0 0 42
1 0 1 0 1 44
1 0 1 1 0 46
1 0 1 1 1 48
1 1 0 0 0 50
1 1 0 0 1 52
1 1 0 1 0 54
1 1 0 1 1 56
1 1 1 0 0 58
1 1 1 0 1 60
1 1 1 1 0 62
1 1 1 1 1 64
b14-b13 CTSUICOG[1:0] CTSU ICO
ICO ICO
b14 b13
0 0 100% 0 1 66% 1 0 50% 1 1 40%
R/W
b15
--
00
R/W
1.
CTSUCR1.CTSUMD[1:0] = 11b OFF CTSUSDPRS.CTSUSOFF = 1CTSUSDPA[4:0] = 00000b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1345 of 1551
RA4W1
40. CTSU
CTSU_CTSUWR CTSUSSC CTSUSO0 CTSUSO1 CTSUSO1 Status3 40.6 40.7 CTSUSO1
CTSURICOA[7:0] CTSU ICO
ICO
CTSUSDPA[4:0] CTSU
40.3.2.1
CTSUICOG[1:0] CTSU ICO
ICO ICO 00b ICO
40.2.22 CTSU CTSUSC
CTSU.CTSUSC 4008 1018h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
CTSUSC[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15-b0
CTSUSC[15:0] CTSU
R/W
ICO
R
FFFFh
CTSU_CTSURD CTSUSC CTSURC
CTSUSC[15:0] CTSU
ICO CTSU_CTSURD CTSURC CTSU Status4 CTSUST.CTSUSTC[2:0] 100b CTSUCR0.CTSUINIT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1346 of 1551
RA4W1
40. CTSU
40.2.23 CTSU CTSURC
CTSU.CTSURC 4008 101Ah
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
CTSURC[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15-b0
CTSURC[15:0] CTSU
R/W
ICO
R
FFFFh
CTSU_CTSURD CTSUSC CTSURC Status3 CTSURC Status3
CTSURC[15:0] CTSU
ICO ICO ICO CTSU ICO ICO
ICO ICO ICO ICO ICO ICO ICO ICO ICO ICO ICO ICO ICO ICO ICO
CTSURC[15:0] CTSU_CTSURD CTSU Status4 CTSUST.CTSUSTC[2:0] 100b CTSUCR0.CTSUINIT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1347 of 1551
RA4W1
40. CTSU
40.2.24 CTSU CTSUERRS
CTSU.CTSUERRS 4008 101Ch
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
CTSUI COMP
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
b14-b0
--
0
R
b15
CTSUICOMP TSCAP
TSCAP
R
0TSCAP
1TSCAP
CTSUICOMP TSCAP
CTSUSO1 ICO TSCAP TSCAP 1
TSCAP ICO ICO CTSUSO1 CTSU ICO CTSURICOA[7:0] 0
CTSUCR1.CTSUPON 0 OFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1348 of 1551
RA4W1
40.3 40.3.1
40.4
40. CTSU
-
+
VCC
LPF
TSCAP
ICO
SW1
TSn1
SW2
1. n = 00, 01, 03, 10, 12, 13, 18, 28, 30, 31, 34
R = 1/(fC)
40.4
40.5 40.7 CTSU
1. SW1: ONSW2: OFF 40.5
2. SW1: OFFSW2: ON 40.6
3. 1. 2. TSCAP ICO 40.7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1349 of 1551
RA4W1
40. CTSU
-
+
VCC
LPF
TSCAP
TSn1
ICO
SW1 SW2
i = fCV
1. n = 00, 01, 03, 10, 12, 13, 18, 28, 30, 31, 34
40.5
-
+
VCC
LPF
TSCAP
ICO
SW1
TSn1
SW2
i = fCV
1. n = 00, 01, 03, 10, 12, 13, 18, 28, 30, 31, 34
40.6
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1350 of 1551
RA4W1
40. CTSU
40.7
0
40.3.2
CTSU 40.8
Key 1 Key 2 Key 3 Key 4 Key 5 TS01 TS03 TS10 TS12 TS13 TS18
TS00 TS01 TS03
TS10 TS12 TS13
40.8
1 1 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1351 of 1551
RA4W1
40.3.2.1
40.9 CTSU
40. CTSU
TSCAP LPF I/O
CTSU CTSU
CTSU CTSU
TSCAPLow LPF
MPC TSnn = 00, 01, 03, 10, 12, 13, 18, 28, 30, 31, 34 PmnPFS.PSEL[4:0] = 01100bI/O PMRPmnPFS.PMR = 1
CMSTPCRC MSTPC3 0
CTSU VCC 2.4VCTSUCR1.CTSUATUNE0 TS CTSUCR1.CTSUATUNE1
CTSUCR1.CTSUCLK[1:0] CTSUSO1.CTSUSDPA[4:0]
CTSU TSCAP LPF CTSUCR1.CTSUPON = 1CTSUCR1.CTSUCSW = 1
TSCAPLPF
40.9
CTSU
40.10 CTSU
CTSU CTSU
CTSU TSCAP LPF CTSUCR1.CTSUPON = 0CTSUCR1.CTSUCSW = 0
CMSTPCRC MSTPC3 1
40.10
CTSU
40.9
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1352 of 1551
RA4W1
40. CTSU
40.3.2.2
CTSU CTSUST 3 40.11
Status 0
Status 1
Status 2
Status 3
2
Status 1 CTSUCR0.CTSUCAP = 0: CTSUCR0.CTSUSTRT = 1 CTSUCR0.CTSUCAP = 1: CTSUCR0.CTSUSTRT = 1
Status 0 CTSU_CTSUFN
Status 2
Status 3 CTSUST.CTSUPS = 12
Status 3 CTSUSO1 1
Status 4 CTSUST.CTSUDTSR = 0
Status 4
Status 5 40.3.3.1
Status 5
Status 1 2
1. 2.
CTSU_CTSUWR DTC ICU CTSUSO1
CTSUST.CTSUDTSR = 1
40.11
Status0
CTSUCR0.CTSUSTRT 0 1
CTSUCR0.CTSUSTRT 0 CTSUCR0.CTSUINIT 1 Status0
CTSUMCH0 CTSUCHAC0 CTSUCHAC4 CTSUCHTRC0 CTSUCHTRC4 Status1 CTSU_CTSUFN Status0
CTSUCHAC0 CTSUCHAC4
CTSUMCH0 CTSUCHAC0 CTSUCHAC4
CTSUCHAC0 CTSUCHAC4 CTSUCHTRC0 CTSUCHTRC4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1353 of 1551
RA4W1
40. CTSU
40.3.2.3
1 40.12 40.13
40.12
DTCICU
CTSU
CTSUPON = 1
CTSU CTSUCR0 CTSU
CTSU_CTSUWR SRAM CTSUSSC CTSUSO0CTSUSO1
CTSU_CTSURD CTSUSC CTSURC SRAM
CTSUCR1 CTSUCR1.CTSUCLK[1:0] CTSUCR1.CTSUMD[1:0] 00b
CTSUSDPRS CTSUSDPRS.CTSUSOFF OFF CTSUSDPRS.CTSUPRMODE[1:0] CTSUSDPRS.CTSUPRRATIO[3:0]
CTSUSST CTSUCHAC0 CTSUCHAC4 CTSUMCH0
CTSUCR0.CTSUSTRT 1 CTSUCR0.CTSUCAP CTSU CTSUCR0.CTSUSNZ
CTSU_CTSUWR ?
CTSU_CTSURD ?
No
CTSUSSC CTSUSO0 CTSUSO1
DTC DTC
No
CTSU_CTSUFN ?
CTSUSC CTSURC
DTC DTC
No
CTSU CTSUCR0.CTSUSTRT0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1354 of 1551
RA4W1
40. CTSU
CTSUSST
CTSUCR0.CTSUSTRT
CTSUMCH0 63
5
CTSUST.CTSUSTC[2:0]
0
1
2
3
4
ICO
CTSUSC 0
CTSU_CTSUWR
CTSU_CTSURD
CTSU_CTSUFN
(1) (2)
(3)
63
51
0
(4) (5)
40.13
40.13
1. CTSUCR0.CTSUSTRT 1
2. CTSU_CTSUWR
3. CTSUSSCCTSUSO0 CTSUSO1 ICO ICO
4. CTSU_CTSURD
5. CTSU_CTSUFNStatus0
40.6
40.6
Status 0 1 2 3 4 5
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1355 of 1551
RA4W1
40. CTSU
40.3.2.4
CTSUCHAC0 CTSUCHAC4 40.14 40.15
DTCICU
CTSU
CTSUPON = 1 CTSU CTSUCR0
CTSU
CTSU_CTSUWR SRAM CTSUSSC CTSUSO0CTSUSO1
CTSU_CTSURD CTSUSC CTSURC SRAM
CTSUCR1 CTSUCR1.CTSUCLK[1:0] CTSUCR1.CTSUMD[1:0] 01b CTSUSDPRS CTSUSDPRS.CTSUSOFF OFF CTSUSDPRS.CTSUPRMODE[1:0] CTSUSDPRS.CTSUPRRATIO[3:0] CTSUSST CTSUCHAC0 CTSUCHAC4 CTSUMCH0
CTSUCR0.CTSUSTRT 1 CTSUCR0.CTSUCAP CTSU CTSUCR0.CTSUSNZ
CTSU_CTSUWR ?
CTSU_CTSURD ?
No
CTSUSSC CTSUSO0 CTSUSO1
DTC DTC
No
CTSU_CTSUFN ?
CTSUSC CTSURC
DTC DTC
No
CTSUCTSUCR0.CTSUSTRT0
< > CTSUCR1.CTSUMD[1:0] = 01b 03CTSUCHAC0.CTSUCHAC0[7:0] = 00001001b
7
6
5
4
3
(2)
2
1
0 (1)
40.14
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1356 of 1551
RA4W1
40. CTSU
CTSUCR0.CTSUSTRT
CTSUMCH0 63
CTSUST.CTSUSTC[2:0]
0
ICO
CTSUSC
CTSU_CTSUWR CTSU_CTSURD CTSU_CTSUFN
CTSUSST
01
2
1
2
3
4
0
(1)
(2) (3)
N
512
3
N
63
4
51
0
0
(4) (5)
(6)
(7)
40.15
40.15
1. CTSUCR0.CTSUSTRT 1
2. CTSU_CTSUWR
3. CTSUSSCCTSUSO0 CTSUSO1 ICO ICO
4. CTSU_CTSURD
5. CTSU_CTSUWR
6.
7. CTSU_CTSUFN Status0
40.7
40.7
Status 0 1 2 3 4 5
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1357 of 1551
RA4W1
40. CTSU
40.3.2.5
High 1 2 2
CTSUCHTRC0 CTSUCHTRC4 CTSUCHAC0 CTSUCHAC4 40.16 40.17
DTCICU
CTSU_CTSUWR SRAM CTSUSSCCTSUSO0CTSUSO1
CTSU_CTSURD CTSUSC CTSURC SRAM
CTSU
CTSUPON = 1
CTSUCR1 CTSUCR1.CTSUCLK[1:0] CTSUCR1.CTSUMD[1:0] 11b
CTSUSDPRS CTSUSDPRS.CTSUSOFF OFF CTSUSDPRS.CTSUPRMODE[1:0] CTSUSDPRS.CTSUPRRATIO[3:0]
CTSUSST CTSUCHAC0 CTSUCHAC4 CTSUCHTRC0 CTSUCHTRC4 TS CTSUMCH0
CTSU CTSUCR0
CTSUCR0.CTSUSTRT 1 CTSUCR0.CTSUCAP CTSU CTSUCR0.CTSUSNZ
CTSU
CTSU_CTSUWR ?
CTSU_CTSURD ?
No
CTSUSSC DTC CTSUSO0 DTC CTSUSO1 No
1 CTSUSC DTC CTSURC DTC
CTSU_CTSURD
No
?
2 CTSUSC DTC CTSURC DTC
CTSU_CTSUFN ?
No
CTSUCTSUCR0.CTSUSTRT0
< > CTSUCR1.CTSUMD[1:0] = 11b 031213 CTSUCHAC0.CTSUCHAC0[7:0] = 00001001b, CTSUCHAC1.CTSUCHAC1[7:0] = 00110000b 03 1213 CTSUCHTRC0.CTSUCHTRC0[7:0] = 00000000b, CTSUCHTRC1.CTSUCHTRC1[7:0] = 00110000b
3
12
(3)
13
(4)
14
15
2 1
0 (1) (2)
40.16
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1358 of 1551
RA4W1
40. CTSU
CTSUCR0.CTSUSTRT
CTSUMCH0
CTSUMCH1
CTSUST.CTSUSTC[2:0]
63 63
0
CTSUST.CTSUPS
ICO CTSUSC
CTSU_CTSUWR CTSU_CTSURD CTSU_CTSUFN
CTSUSST
01
1
2
3
4
0
(1)
(2) (3)
0
2
5
1
34 5
3
4 5
1
2
(4)
(5)
(6)
40.17
40.17
1. CTSUCR0.CTSUSTRT 1
2. CTSU_CTSUWR
3. CTSUSSCCTSUSO0 CTSUSO1 ICO ICO High
4. CTSU_CTSURD
5. High
6. 2
7. CTSU_CTSUFN Status0
CTSU CTSUST.CTSUPS Status5 Status1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1359 of 1551
RA4W1
40. CTSU
40.8
40.8
Status
0
Low
1
Low
2
Low
3
Low Low Low Low
Low Low/High Low
Low Low Low Low
4
Low
5
Low
Low
Low
Low
Low
-- -- --
1 2 -- --
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1360 of 1551
RA4W1
40. CTSU
40.3.3
40.3.3.1
40.18
(1) CTSUSST
CTSUCR0.CTSUSTRT
(4)
ICO
CTSUST.CTSUSTC[2:0]
0
1
2
3
CTSU_CTSUWR
CTSU_CTSURD CTSU_CTSUFN
(2)
(3)
4
51 0
40.18
1. CTSU_CTSUWR CTSUSO1 CTSUSST
2. CTSUST.CTSUDTSR 0 Status4 CTSUSDPRS.CTSUPRMODE[1:0] CTSUPRRATIO[3:0] CTSUSO0.CTSUSNUM[5:0]
3. 2 Status1 CTSU_CTSURD CTSUSC CTSURC Low CTSUCR0.CTSUSTRT 0
4. ICO CTSUST.CTSUSTC[2:0] = 011bStatus3 100bStatus4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1361 of 1551
RA4W1
40. CTSU
40.3.3.2
CTSU
CTSU_CTSUWR
CTSU_CTSURD
CTSU_CTSUFN
(1) CTSU_CTSUWR
SRAM CTSU_CTSUWR DTC/ICU CTSU_CTSUWR Status1 Status2 SRAM CTSUSSCCTSUSO0CTSUSO1 40.19CTSUSO1 Status CTSUSO1
CTSU
4008 1012h 4008 1014h 4008 1016h
CTSUSSC CTSUSO0 CTSUSO1
SRAM 0
1
CTSU_CTSUWR1 CTSU_CTSUWR2
3
40.19
CTSU_CTSUWR DTC
CTSUSSCCTSUSO0CTSUSO1 CTSU_CTSUWR
CTSUSSC
1 2 3
SRAM CTSUSSC
1 2 3
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1362 of 1551
RA4W1
40. CTSU
(2) CTSU_CTSURD
CTSU_CTSURD DTC/ICU CTSU_CTSURD Status5 Status1 CTSUSC CTSURC 40.20
4008 1018h 4008 101Ah
CTSU
CTSUSC CTSURC
SRAM 0 1
CTSU_CTSURD1 CTSU_CTSURD2
3
40.20
CTSU_CTSURD DTC
CTSUSC CTSURC CTSU_CTSURD
CTSUSC
1 2 2
SRAM CTSUSC
1 2 2
(3) CTSU_CTSUFN
Status1 Status0 CTSUST.CTSUSOVF CTSUROVF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1363 of 1551
RA4W1
40. CTSU
40.4
40.4.1 CTSUSC CTSURC
40.4.2
CTSUCR1.CTSUCLK[1:0] 10bPCLKB/4 CTSUR0.CTSUSTRT 1 3
CTSUSTRT1
PCLKB CTSU_CTSUFN
CTSUSTRT
CTSU
40.21
40.4.3
CTSU_CTSUFN 1
CTSUCR0.CTSUSTRT 0 CTSUCR0.CTSUINIT 0
40.4.4
CTSUCR0.CTSUSTRT 0CTSUCR0.CTSUINIT 1
CTSUCR0.CTSUINIT
CTSUMCH0
CTSUMCH1
CTSUST
CTSUSC
CTSURC
DTC/ICU DTC CTSU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1364 of 1551
RA4W1
40. CTSU
40.4.5 TSCAP
TSCAP CTSU TSCAP TSCAP ONCTSUCR1.CTSUCSW = 1 I/O Low
40.4.6 CTSUCR0.CTSUSTRT = 1
CTSUCR0.CTSUSTRT = 1 TSn TSCAP
CTSUCR0.CTSUSTRT = 0 CTSUCR0.CTSUINIT = 1CTSUCR1.CTSUPON CTSUCR1.CTSUCSW 0 CTSUCR0.CTSUSNZ 0 40.9
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1365 of 1551
RA4W1
41. DOC
41. DOC
41.1
DOC16
41.1 DOC 41.1
41.1
DOC
DOC_DOPCI
16
FFFFh 0000h
DODIR DODSR
DOC_DOPCI
OMS[1:0] DOCR
41.1
DOCR DOC DODIR DOC DODSR DOC
DOC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1366 of 1551
RA4W1
41.2 41.2.1 DOC DOCR
DOC.DOCR 4005 4100h
b7
b6
b5
b4
--
DOPCF CL
DOPCF
--
0
0
0
0
b3
b2
b1
b0
-- DCSEL OMS[1:0]
0
0
0
0
41. DOC
R/W
b1-b0
OMS[1:0]
b1 b0
0 0
R/W
0 1
1 0
1 1
b2
DCSEL1
0 DOPCF
R/W
1 DOPCF
b4-b3
--
0 0
R/W
b5
DOPCF
R
b6
DOPCFCL
DOPCF
0DOPCF
R/W
1DOPCF
b7
--
0 0
R/W
1.
OMS[1:0] DOC
DCSEL
DOPCF 1 DCSEL FFFFh 0000h 0 DOPCFCL 1
DOPCFCL DOPCF 1 DOPCF 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1367 of 1551
RA4W1
41. DOC
41.2.2 DOC DODIR
DOC.DODIR 4005 4102h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DODIR 16 16
41.2.3 DOC DODSR
DOC.DODSR 4005 4104h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DODSR 16 16
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1368 of 1551
RA4W1
41. DOC
41.3
41.3.1
41.2 DOC DCSEL = 0
1. DOCR.OMS[1:0] 00b 2. DODSR 16 3. DODIR 16 4. 16 DODIR
5. DODIR DODSR DOCR.DOPCF 1
DOCR.OMS[1:0]
xxb
00b
DODSR
xxxxh
AAAAh
DODIR DOCR.DOPCF 1
0
xxxxh
AAAAh
AAAAh
5555h
DOCR.DOPCFCL 1
(1)
(2)
(3)
(4)
(5)
41.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1369 of 1551
RA4W1
41. DOC
41.3.2
41.3 DOC
1. DOCR.OMS[1:0] 01b 2. DODSR 16 3. DODIR 16 DODSR
4. 16 DODIR
5. FFFFh DOCR.DOPCF 1
DOCR.OMS[1:0] DODSR DODIR
DOCR.DOPCF 1 0
xxb
01b
xxxxh
FFF0h
FFF4h
xxxxh
0004h
FFFAh
0002h
0006h
0008h
DOCR.DOPCFCL 1
(1)
(2)
(3)
(4)
(5)
41.3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1370 of 1551
RA4W1
41. DOC
41.3.3
41.4 DOC
1. DOCR.OMS[1:0] 10b 2. DODSR 16 3. DODIR 16 DODSR
4. 16 DODIR
5. 0000h DOCR.DOPCF 1
DOCR.OMS[1:0] DODSR DODIR
1 DOCR.DOPCF
0
xxb 10b
xxxxh
000Fh
000Bh
xxxxh
0004h
0005h 0006h
FFFDh
0008h
DOCR.DOPCFCL 1
(1)
(2)
(3)
(4)
(5)
41.4
41.4 ELC
DOC ELC
FFFFh 0000h
DOCR.DOPCF 1
41.5
41.5.1
CMSTPCRCDOC DOC 11.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1371 of 1551
RA4W1
42. SRAM
42. SRAM
42.1
MCU ECC SRAM ECC SRAM0 16KB SRAM 42.1
42.1
SRAM
SRAM SRAM 1
SRAM0: 80KB
ECC
SRAM0: 2000 4000h 2001 7FFFh
0
8 1
1. 42.3.7
ECC SRAM0ECC 16KB SRAM0ECC 2000 0000h 2000 3FFFh
1 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1372 of 1551
RA4W1
42.2 42.2.1 SRAM PARIOAD
SRAM.PARIOAD 4000 2000h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- OAD
0
0
0
0
0
0
0
0
42. SRAM
b0
OAD
b7-b1
--
R/W
1
R/W
0
0 0
R/W
PARIOAD SRAM SRAMPRCRSRAMPRCR.SRAMPRCR SRAM PARIOAD
OAD
PARIOAD.OAD SRAM0ECC
42.2.2 SRAM SRAMPRCR
SRAM.SRAMPRCR 4000 2004h
b7
b6
b5
b4
b3
b2
b1
b0
KW[6:0]
SRAMP RCR
0
0
0
0
0
0
0
0
b0
SRAMPRCR
b7-b1
KW[6:0]
R/W
0
R/W
1
SRAMPRCR R/W
SRAMPRCR
PARIOAD 1 PARIOAD KW[6:0] 78h
KW[6:0]
SRAMPRCR SRAMPRCR KW[6:0] 78h KW[6:0] SRAMPRCR KW[6:0] 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1373 of 1551
RA4W1
42.2.3 ECC ECCMODE
SRAM.ECCMODE 4000 20C0h
b7
b6
b5
b4
b3
--
--
--
--
--
0
0
0
0
0
b2
b1
b0
-- ECCMOD[1:0]
0
0
0
42. SRAM
b1-b0
ECCMOD[1:0] ECC
b7-b2
--
b1 b0
0 0ECC 0 1 1 0ECC 1 1ECC
0 0
R/W R/W
R/W
ECCMODE ECC ECC ECCPRCRECCPRCR.ECCPRCR 1 SRAM ECCMODE
ECCMOD[1:0] ECC
SRAM ECC
42.2.4 ECC 2 ECC2STS
SRAM.ECC2STS 4000 20C1h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
ECC2E RR
0
0
0
0
0
0
0
0
b0
ECC2ERR
b7-b1
--
ECC 2
0ECC 2 1ECC 2
0 0
1. 0
R/W R(/W)
1
R/W
ECC2ERR ECC 2
SRAM ECC ECC 2 ECC 2 ECC2ERR 1 SRAM ECC2ERR 0 2 ECC SRAM ECCOAD 0 SRAM ECC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1374 of 1551
RA4W1
42.2.5 ECC 1 ECC1STSEN
SRAM.ECC1STSEN 4000 20C2h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
E1STS EN
0
0
0
0
0
0
0
0
42. SRAM
R/W
b0
E1STSEN
ECC 1 0ECC 1
R/W
1ECC 1
b7-b1
--
00
R/W
ECC1STSEN SRAMECC ECC 1 ECC 1 ECC1STS ECC ECCPRCRECCPRCR.ECCPRCR
E1STSEN ECC 1
SRAM ECC 1 SRAMECC 1 ECC1STS
42.2.6 ECC 1 ECC1STS
SRAM.ECC1STS 4000 20C3h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
ECC1E RR
0
0
0
0
0
0
0
0
b0
ECC1ERR
b7-b1
--
ECC 1
0ECC 1 1ECC 1
0 0
1. 0
R/W R(/W)
1
R/W
ECC1ERR ECC 1
SRAM ECC ECC 1 ECC 1 1 1 SRAM ECC1ERR 0 1 ECC
SRAM ECCOAD 0 SRAM ECC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1375 of 1551
RA4W1
42.2.7 ECC ECCPRCR
SRAM.ECCPRCR 4000 20C4h
b7
b6
b5
b4
b3
b2
b1
b0
KW[6:0]
ECCPR CR
0
0
0
0
0
0
0
0
42. SRAM
b0
ECCPRCR
b7-b1
KW[6:0]
R/W
0
R/W
1
ECCPRCR R/W
ECCPRCR
ECCMODE ECC1STSEN ECCOAD 1 ECCMODE ECC1STSEN ECCOAD KW[6:0] 78h
KW[6:0]
ECCPRCR ECCPRCR KW[6:0] 78h KW[6:0] ECCPRCR KW[6:0] 00h
42.2.8 ECC 2ECCPRCR2
SRAM.ECCPRCR2 4000 20D0h
b7
b6
b5
b4
b3
b2
b1
b0
KW2[6:0]
ECCPR CR2
0
0
0
0
0
0
0
0
b0
ECCPRCR2
b7-b1
KW2[6:0]
R/W
0
R/W
1
ECCPRCR2 R/W
ECCPRCR2
ECCETST 1 ECCETST KW2[6:0] 78h
KW2[6:0]
ECCPRCR2 KW2[6:0] 78h KW2[6:0] ECCPRCR2 KW2[6:0] 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1376 of 1551
RA4W1
42.2.9 ECC ECCETST
SRAM.ECCETST 4000 20D4h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
TSTBY P
0
0
0
0
0
0
0
0
42. SRAM
b0
TSTBYP ECC
b7-b1
--
R/W
0ECC
R/W
1ECC
0 0
R/W
ECC ECCPRCR2 ECCPRCR2.ECCPRCR2 1 SRAM ECCETST
TSTBYP ECC
ECC ECC ECC ECCMODE.ECCMOD[1:0] 00b 32 ECC 32 ECC 32 7 25 25
. ECC 42.3.4ECC
42.2.10 SRAM ECC ECCOAD
SRAM.ECCOAD 4000 20D8h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- OAD
0
0
0
0
0
0
0
0
b0
OAD
b7-b1
--
R/W
1
R/W
0
0 0
R/W
ECC ECCPRCR ECCPRCR ECCPRCR 1 SRAM ECCOAD
OAD
ECC ECCOAD.OAD SRAMECC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1377 of 1551
RA4W1
42. SRAM
42.3
42.3.1
AMSTPCRASRAM MSTPCRA.MSTPA0 MSTPCRA.MSTPA6 1 SRAM0 1
1. MSTPCRA.MSTPA0 MSTPCRA.MSTPA6
SRAM SRAM SRAM SRAM
MSTPCRA 11.
SRAM0 48KB2000 0000h 2000 BFFFhSRAM0 11.
42.3.2 ECC
ECC ECCMODE ECC ECC SEC-DED ECC 32 7 SRAMECC 39 32 7
ECC 1 ECC1STSEN.E1STSEN 1 ECC1STS.ECC1ERR 1 2 ECC2STS.ECC2ERR 1
ECC 1 ECC1STSEN.E1STSEN 1 ECC1STS.ECC1ERR 2 ECC2STS.ECC2ERR
ECC 1 2 ECC1ERR ECC2ERR
SRAM 32
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1378 of 1551
RA4W1
42. SRAM
42.3.3 ECC
SRAMECC ECC ECC 2 ECC2STS.ECC2ERR ECC 1 ECC1STS.ECC1ERR 1 ECC
ECC 1 ECC1STSEN.E1STSEN 0 ECC1ERR ECC ECC ECC
ECC ECCOAD ECCOAD.OAD 1 ECC ECCOAD.OAD 0 ECC ICU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1379 of 1551
RA4W1
42.3.4 ECC
42.1 ECC
42. SRAM
42.1
0000 0000h
SRAM0ECC F1h SRAM
SRAM0ECC 03h ECC
4 7 ECC
SRAM0ECC 00h ECC
SRAM0ECC SRAM0ECC 2 F1h SRAM
SRAM0ECC 01hECC
7 ECC 32
1 2 ECC 1 2
32
ECC00h ECC
SRAM0ECC 03h ECC
ECC 1 2 ECC
ECC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1380 of 1551
RA4W1
42. SRAM
42.3.5
IEC60730 SRAM 32 SRAM 8 SRAM0 ECC
PARIOAD.OAD OAD 1 OAD 0 ICU
42.2 42.3
<MAIN>
<NMI>
RPERF1= 1?
Yes
No
SRAM
NMI
SRAM
No
?
Yes
Yes
? No
SRAM
1. RPERFSRAMRSTSR1.RPERF
42.2
SRAM SRAM
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1381 of 1551
RA4W1
42. SRAM
<MAIN>
NMI
SRAM
<NMI>
42.3
Yes ?
No
RPEST1= 0
SRAM
RETURN
No RPEST1= 1? Yes
SRAM
1. RPESTSRAM NMISR.RPEST
SRAM SRAM
42.3.6 SRAM
SRAM ECC ECC ECCOAD.OAD PARIOAD.OAD
42.2
SRAM
ECC ECC SRAM0 ECC SRAM0
DTC
DMAC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1382 of 1551
RA4W1
42.3.7
42. SRAM
42.3
SRAM0ECC 2000 0000h2000 3FFFh
ECC ECCMOD[1] = 0
ECC ECCMOD[1] = 1
2
2
2
2
4
42.4
SRAM0 2000 4000h2001 7FFFh
2
2
42.4
42.4.1 SRAM
SRAM0 SRAM CPU SRAM CPU ECC 4 12
42.4.2 SRAM
SRAM CPU SRAM SRAM SRAM
SRAM = ANOP SRAM = A
SRAM = ASRAM = A SRAM = A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1383 of 1551
RA4W1
43.
43.
MCU 512KB 8KB FCB Silicon Storage Technology, Inc. SuperFlash�
43.1
43.1 43.1 43.2 43.3
43.1
BGO
512KB
8KB
32MHz ICLK 48MHz 1 23
ICLK 32MHz 1 1
FFh
FCLK 6 FCLK 32MHz
FFh
FCB
64 8
2KB
1KB
MCU
SCI SCI9 USB USBFS PC JTAG SWD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1384 of 1551
RA4W1
43.
1 3
(FCU_FRDYI)
FCB
9
CPU
43.1
MD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1385 of 1551
RA4W1
43.
43.2
43.2 43.2 P/E 2KB
0007 FFFFh 2552K
:
512K
0004 0000h 1282K 0003 FFFFh 1272K
:
256K
0000 0000h 02K
43.2
43.2
P/E
512KB
0000 0000h 0007 FFFFh
P/E 0000 0000h 0007 FFFFh
0 255
1KB 43.3 43.3 P/E
4010 1FFFh
71K
P/E FE00 1FFFh
:
8K
4010 0000h
01K FE00 0000h
43.3
43.3
P/E
8KB
4010 0000h 4010 1FFFh
P/E FE00 0000h FE00 1FFFh
07
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1386 of 1551
RA4W1
43.
43.3
43.3.1
FCACHE FCACHE
CPU FCACHE1 CPU DMA FCACHE2 CPU FLPF
43.4
1 FCACHE1
2 FCACHE2
FLPF
0000 0000h 007F FFFFh
0000 0000h 007F FFFFh
0000 0000h 007F FFFFh
CPU
CPU CPU
FLPF
128
8
16
2
--
64 64
8
64 64
1
64 64
2 CPU
0
SYSTEM.MEMWAIT
MEMWAIT = 00 MEMWAIT = 11 2
0
SYSTEM.MEMWAIT
MEMWAIT = 00 MEMWAIT = 11 2
0
SYSTEM.MEMWAIT
MEMWAIT = 00 MEMWAIT = 11 2
1 (Flash_BIU)
3 (MBIU)
43.4
FCACHE
FCACHEE FCACHEIV
1 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1387 of 1551
RA4W1
43.
43.3.2 43.3.2.1 FCACHEE
FCACHE.FCACHEE 4001 C100h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
FCACH EEN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
FCACHEEN
b15-b1
--
FCACHE
R/W
0FCACHE
R/W
1FCACHE
00 R/W
FCACHEE.FCACHEEN FCACHE1FCACHE2FLPF FCACHEIV.FCACHEIV FCACHE HPROT[3] 15.5
43.3.2.2 FCACHEIV
FCACHE.FCACHEIV 4001 C104h
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
FCACH EIV
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b0
FCACHEIV
b15-b1
--
R/W
R/W
0
1
1 FCACHE 0
00 R/W
FCACHEIV.FCACHEIV 1 FCACHE1FCACHE2FLPF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1388 of 1551
RA4W1
43.3.2.3 DFLCTL
FLCN.DFLCTL 407E C090h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
--
--
--
--
-- DFLEN
0
0
0
0
0
0
0
0
43.
b0
DFLEN
b7-b1
--
R/W
0
R/W
1
00 R/W
DFLCTL DFLCTL.DFLEN STOP tDSTOP
STOP
HS(High-speed) 5�s
LS(Low-speed) 720ns
LP( ) 720ns
LV(low-voltage) 10�s
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1389 of 1551
RA4W1
43.
43.4
FCACHEE
1. FCACHEE.FCACHEEN 1
2. ICLK OPCCR SOPCCR MEMWAIT.MEMWAIT
3. FCACHEIV.FCACHEIV
4. FCACHEIV.FCACHEIV 0
5. FCACHEE.FCACHEEN
. 1.
43.4.1
CPU Arm� MPU
ARM�v7-M Architecture Reference Manual ARM� Cortex�-M4 Devices Generic User Guide
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1390 of 1551
RA4W1
43.
43.5
43.5 3.
SCI
USB
JTAG
SWD
43.5
43.5
43.5
SCI/USB JTAG/SWD
43.5.1 ID
ID MCU ID ID 2 ID
ID 32 4 ID 127 126 ID ID 43.6
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1391 of 1551
RA4W1
43.
43.6
ID
ID
SCI/USB
FFh, ..., FFh FFh
127 = 1
JTAG/SWD
126 = 1 16
1 FFh
127 = 1 126 = 0
127 = 0
ID ID
ID ID ID
ID ASCII ALeRASE 414C_6552_4153_45FF_FFFF_FFFF_FFFF_F FFFh AWSC.FSPR 0
ID ID ID
ID ID
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1392 of 1551
RA4W1
43.
43.6
JTAG/SWD MCU
43.7
43.7
JTAG/SWD
SCI9 USBFS
SCI9 USBFS
JTAG/SWD
JTAG/SWD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1393 of 1551
RA4W1
43.
MCU 43.8
43.8
ID
�
�
ID FCB
�ID
ID ID JTAG/SWD 43.9 43.10
43.9 ID
ID
43.10
ID
ID � � � � � ID
ID
ID
�
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1394 of 1551
RA4W1
43.
43.6.1
43.6 ID 16
0101 0000h P/E - 0000 0000h
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0030h
ID[127:96]
002Ch
0028h
ID[95:64]
0024h
0020h
ID[63:32]
001Ch
0018h
ID[31:0]
0014h
0010h
FAWE[11:0]
FAWS[11:0]
000Ch
0008h
FSPR
BTFLG
43.6
43.6.2
8KB FCB AWSC BTFLG FSPR
43.7
(1)
(2)
0000 3FFFh
0000 1FFFh 0000 0000h
1
2
43.7
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1395 of 1551
RA4W1
43.
43.6.3
43.8
FAWS[11:0] FAWE[11:0] FAWE[11:0] FAWS[11:0]
FAWE[11:0] = FAWS[11:0] P/E
FAWE[11:0] FAWS[11:0] P/E FAWS[11:0] FAWE[11:0] 1
FAWE[11:0] FAWS[11:0] P/E
43.8
0007 FFFFh
...
0000 4000h 0000 3FFFh
8
7
6
5
0000 2000h 0000 1FFFh
4
3
2
1
0000 0000h
0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1396 of 1551
RA4W1
43.7
FCB
43.
43.8
43.9
43.10
SCI9 SCI USBFS USB 43.11
43.11
MD
P110/RXD9 P109/TXD9 USB_DP, USB_DM USB_VBUS
SCI USB SCI
USB
SCI SCI USB USB
.
MPU
43.10.1 SCI
SCI MCU SCI 9
MCU SCI SCI USB
43.9 SCI
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1397 of 1551
RA4W1
43.
MCU
SCI (SCI9)
43.9
SCI
43.10.2 USB
USB USB
USB 43.10 USB USB
USB VBUS 100mA
MCU
Rs
Rs
USB_DP USB_DM
USB_VBUS
USBFS
SRAM
43.10
USB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1398 of 1551
RA4W1
43.
43.11
43.11.1
MCU
43.11.2
43.11 MCU
RS-232C USB
USB
43.11
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1399 of 1551
RA4W1
43.
43.12
43.12.1
MCU
43.12 SRAM SRAM
SRAM
SRAM
43.12
43.12.2
43.12
43.12
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1400 of 1551
RA4W1
43.
43.13
43.13.1
1
43.13.2
1
43.14
43.14.1
43.14.2
43.14.3
2
43.14.4
RES tRESW 48.
IWDT tRESW
43.14.5
1
1.
NMI WDT IWDT 1 VBATT SRAM SRAM ECC MPU MBU CPU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1401 of 1551
RA4W1
43.
43.14.6
43.14.7 Low-speed
SOPCCR Low-speed
43.14.8
43.14.9
43.14.9
MCU OPCCR.OPCM[1:0] SOPCCR.SOPCM FlashIF FCLK MCU
DFLCTL.DFLEN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1402 of 1551
RA4W1
44. LCDSLCDC
44. LCD SLCDC
44.1
MCU LCD SLCDC 44.1
44.1
SLCDC
A B LCD LCD
44.256 SLCDC
MCU LCD 44.2 44.3 SLDC 44.1
44.2
56 SLCDC
LCD SEG9 COM4
b15 b14 b13
I/O
b12 b11
1
--
--
--
--
--
2
--
--
--
--
--
b10 b9
SEG 53
--
SEG 52
--
64
b8
b7
--
COM
3
--
--
3
--
--
--
--
--
--
--
--
--
4
--
--
--
--
--
--
SEG9 --
SEG
11
5
--
--
--
--
--
--
--
--
--
6
--
--
--
--
--
--
--
--
--
7
--
--
--
--
--
--
--
--
--
8
--
--
--
--
--
--
--
--
--
9
--
--
--
--
--
--
--
--
--
b6
COM 2 SEG 12 -- --
--
-- -- -- --
b5
COM 1 SEG 20 -- --
--
-- -- -- --
b4
b3
COM VL4
0
1
SEG -- 23
--
--
--
--
--
--
--
--
--
--
--
--
--
--
b2
b1
b0
--
VL2 VL1
1 1
--
--
--
--
--
--
SEG6 --
--
--
SEG --
49
--
--
--
--
--
--
--
--
--
--
--
--
1. VL1VL2 VL4 LCD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1403 of 1551
RA4W1
44. LCDSLCDC
44.3
56
LCD LCD
A
B
-- 1/2
1/3
1/3
99 1
2
189 2
3
279 3
3
4
369 4
4
369 4
LCD 0 (LCDC0)
LCD 0 (LCDM0)
LCDC0[5:0]
LDTY[2:0] LBAS[1:0]
LWAVE
6
7
LCD LCDSRCCLK
LCD
LCDCL
RTC
00h 76543210
LCD
03h 76543210
04h 76543210
33h 76543210
76543210
LCDON
76543210
LCDON
76543210
LCDON
76543210
LCDON
LCD
VL1 VL2 VL4
2 MDSET[1:0]
LCD 0 (LCDM0)
2
LCDON SCOC BLON LCDSEL LCD 1 (LCDM1)
44.1
SLCDC
COM0 COM3
SEG06
SEG09
SEG11
SEG53
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1404 of 1551
RA4W1
44.2 44.2.1 LCD 0LCDM0
SLCDC.LCDM0 4008 2000h
b7
b6
b5
b4
b3
b2
MDSET[1:0] LWAVE
LDTY[2:0]
0
0
0
0
0
0
b1
b0
LBAS[1:0]
0
0
44. LCDSLCDC
R/W
b1-b0
LBAS[1:0]
LCD
b1 b0
0 01/2
R/W
0 11/3
1 0
1 1
b4-b2
LDTY[2:0]
LCD
b4
b2
0 0 0
R/W
0 0 12
0 1 03
0 1 14
b5
LWAVE
LCD
0A
R/W
1B
b7-b6
MDSET[1:0]
LCD
b7 b6
0 0
R/W
.
LCDM1 SCOC 1 LCDM0
.
LDTY[2:0] = 000bLBAS[1:0] 00b
.
44.4 44.4
44.4
A A A A A B
4 3 3 2
1/3 1/3 1/2 1/2
4
1/3
LWAVE 0 0 0 0 0 1
LDTY[2:0]
0
1
1
0
1
0
0
1
0
0
0
1
0
0
0
0
1
1
LBAS[1:0]
0
1
0
1
0
0
0
0
0
0
0
1
�
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1405 of 1551
RA4W1
44.2.2 LCD 1LCDM1
SLCDC.LCDM1 4008 2001h
b7
b6
b5
b4
b3
b2
b1
b0
LCDON SCOC
--
BLON
LCDSE L
--
--
--
0
0
0
0
0
0
0
0
44. LCDSLCDC
b2-b0 b3 b4
-- LCDSEL BLON
b5
--
b6
SCOC LCD
b7
LCDON LCD
R/W
0 0
R/W
b4 b3
0 0ALCD4
R/W R/W
0 1BLCD4
1 0A B
RTCRTC_PRD
1 1A B
RTCRTC_PRD
0 0
R/W
b7 b6
0 0 0 1
R/W R/W
1 0
1 1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1406 of 1551
RA4W1
44. LCDSLCDC
44.2.3 LCD 0LCDC0
SLCDC.LCDC0 4008 2002h
b7
b6
b5
b4
b3
b2
b1
b0
--
--
LCDC0[5:0]
0
0
0
0
0
0
0
0
b5-b0
LCDC0[5:0]
LCD LCDCL
b7-b6
--
R/W
b5
b0
0 0 0 0 0 1/ 22 LOCO / 22
R/W
0 0 0 0 1 0/ 23 LOCO / 23
0 0 0 0 1 1/ 24 LOCO / 24
0 0 0 1 0 0/ 25 LOCO / 25
0 0 0 1 0 1/ 26 LOCO / 26
0 0 0 1 1 0/ 27 LOCO / 27
0 0 0 1 1 1/ 28 LOCO / 28
0 0 1 0 0 0/ 29 LOCO / 29
0 0 1 0 0 1/ 210 LOCO / 210
0 1 0 0 0 1/ 28HOCO / 28
0 1 0 0 1 0/ 29HOCO / 29
0 1 0 0 1 1/ 210HOCO / 210
0 1 0 1 0 0/ 211HOCO/ 211
0 1 0 1 0 1/ 212HOCO / 212
0 1 0 1 1 0/ 213HOCO / 213
0 1 0 1 1 1/ 214HOCO / 214
0 1 1 0 0 0/ 215HOCO / 215
0 1 1 0 0 1/ 216HOCO / 216
0 1 1 0 1 0/ 217HOCO / 217
0 1 1 0 1 1/ 218HOCO / 218
1 0 1 0 1 1/ 219HOCO / 219
00
R/W
.
32Hz 128Hz
.
LCDM1.SCOC 1 LCDC0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1407 of 1551
RA4W1
44. LCDSLCDC
44.3 LCD
LCD 44.5 LCD LCD
44.5
SEG06 SEG09 SEG11 SEG12 SEG20 SEG23 SEG49 SEG52 SEG53
LCD
b7
b6
b5
b4
b3
b2
b1
b0
4008 2106h 4008 2109h 4008 210Bh 4008 210Ch 4008 2114h 4008 2117h 4008 2131h 4008 2134h 4008 2135h
COM3
COM2
COM1
COM0
SEG06B
SEG09B
SEG11B
SEG12B
SEG20B
SEG23B
SEG49B
SEG52B
SEG53B
COM3
COM2
COM1
COM0
SEG06A
SEG09A
SEG11A
SEG12A
SEG20A
SEG23A
SEG49A
SEG52A
SEG53A
�
.
LCD 0h
56
23 4 LCD 4 A 4 B
A COM 0 COM0 1 COM1 2 COM2 3 COM3
B COM 4 COM0 5 COM1 6 COM2 7 COM3
A BLON = LCDSEL = 0 LCD B BLON = 0 LCDSEL = 1 LCD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1408 of 1551
RA4W1
44. LCDSLCDC
44.4 LCD
23 4 BLON LCDSEL LCD
A LCD 4 B LCD 4 A B RTC
LCDM1.BLON = 1 AB
b7 COM3
B
b6 COM2
b5 COM1
b4 COM0
b3 COM3
A
b2 COM2
b1 COM1
b0 COM0
SEG23 SEG20 SEG12 SEG11 SEG09 SEG06
1
44.2
LCD
44.4.1 A B
BLON LCDSEL 0 A LCD 4 LCD
BLON 0 LCDSEL 1 B LCD 4 LCD
44.3LCD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1409 of 1551
RA4W1
44. LCDSLCDC
44.4.2 A B
BLON 1 RTCA B RTC 0.5 25.RTC
LCD A B SEG06 0 1 4 0 A B SEG09 2 1 6 1 44.3LCD
44.3 44.4
RTC LCDM1.BLON, LCDSEL
LCDM1.BLON = 0 LCDM1.LCDSEL = 0
LCDM1.BLON = 1 LCDM1.LCDSEL = 01
A
A
B
A
B
A
44.3
A
RTC LCDM1.BLON = 1
LCDM1.BLON, LCDSEL LCDM1.LCDSEL = 01 B A B
44.4
A
LCDM1.BLON = 0 LCDM1.LCDSEL = 0
A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1410 of 1551
RA4W1
44. LCDSLCDC
44.5 LCD
LCD (1) LCD
(1)
PmnPFSCommon/Segment, VL1, VL2, VL4
LCDM0.LWAVE, LDTY[2:0], LBAS[1:0] AB
LCDM0.MDSET[1:0] = 00b
LCD
4?
No
Yes
LCDM1.BLON, LCDSEL AB
LCDC0LCD
LCDM1.SCOC = 1
LCDM1.LCDON = 1
LCDM1.SCOC, LCDON
LCD
[BLON, LCDSEL] LCDM1.BLON, LCDSEL
AB
44.5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1411 of 1551
RA4W1
44. LCDSLCDC
44.6
LCD 44.6 LCDM1.LDCON LCDM1.SCOC 0 LCD
LCDM1.LCDON = 0
LCDM1.SCOC = 0
44.6
A B
LCDM1.LCDON, SCOC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1412 of 1551
RA4W1
44. LCDSLCDC
44.7 LCD VL1VL2VL4
LCD
44.7.1
LCD 44.7 44.8
(a)
VCC
(b) 1/2
VL4
VL4
VL4
VL2
VL21
VL2
VL1 VSS
VL11 VSS
VL1 VSS
VCC
VL4 R
VL2 R
VL1
VSS
VL4 = VCC
VL4 = VCC
1. VL1 VL2 GND
44.7
LCD 1/2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1413 of 1551
RA4W1
44. LCDSLCDC
(c) 1/3
VL4 VL2 VL1 VSS
VCC
VL4 R
VL2
R VL1
R VSS
VL4 = VCC
44.8
LCD 2/2
. R 10k 1M VL1 VL4 VL1 VL4 GND 0.47F LCD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1414 of 1551
RA4W1
44. LCDSLCDC
44.8
LCD VLCDLCD VLCD
LCD SLCDC
(1)
44.6 COM0 COM3
2 COM2 COM3 3 COM3
44.6
COM
2 3 4
COM0 COM1 COM2 COM3
(2)
LCD 44.3LCD
A 1 0 3 COM0 COM3 B 1 4 7 COM0 COM3 1 0
LCD 1 1
.
(3) 44.7
� VLCD
44.7
LCD
VL4/VSS
VSS/VL4
-VLCD / +VLCD
0V / 0V
VL4/VSS
1/2
VL4/VSS VL2
VSS/VL4
-VLCD / +VLCD
-
1 2
VLCD / +
1 2
VLCD
0V / 0V
VL4/VSS
+
1 2
VLCD /
-
1 2
VLCD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1415 of 1551
RA4W1
44. LCDSLCDC
1/3A B
VL4/VSS
VL1/VL2
VSS/VL4
-VLCD / +VLCD
-
1 3
VLCD / +
1 3
VLCD
VL2/VL1
-
1 3
VLCD / +
1 3
VLCD
+
1 3
VLCD / -
1 3
VLCD
44.9 44.10 44.11 44.16
(a)
COMn
n = 0
TF = T TLCD1 TF
VL4 VLCD
VSS
(b) 1/2
COMn 2
n = 0, 1
TF = 2 T
COMn 3
n = 02
44.9
TF = 3 T TLCD1 TF
1/2
VL4 VL2 VSS
VLCD
VL4 VL2 VSS
VLCD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1416 of 1551
RA4W1
44. LCDSLCDC
(c) 1/3
COMn 3
n = 02
TF = 3 T
COMn 4
n = 03
TF = 4 T
TLCD1 TF
4LCD LCD32768/27 = 256HzLCDC0 = 06h LCD64Hz
44.10
2/2
VL4 VL2 VL1 VSS
VLCD
VL4 VL2 VL1 VSS
VLCD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1417 of 1551
RA4W1
44. LCDSLCDC
(a) A
VL4 VLCD
VSS
VL4
VLCD VSS
T
T
TLCD1
44.11
(b) 1/2A
VL4 VL2 VLCD VSS
VL4 VL2 VLCD VSS
T
T
TLCD1
1/3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1418 of 1551
RA4W1
44. LCDSLCDC
(c) 1/3A
VL4 VL2 VL1 VSS
VLCD
VL4 VL2 VL1 VSS
VLCD
T
T
TLCD1
44.12
(d) 1/3B
VL4 VL2 VL1 VSS
VLCD
VL4 VL2 VL1 VSS
VLCD
T/2 T/2
T/2 T/2
TLCD1
2/3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1419 of 1551
RA4W1
44. LCDSLCDC
44.9
44.9.1 4
44.14 44.13 12 LCD COM0 COM3 LCD 56.78
7 6. LCD 6. COM0 COM3 SEG20 SEG23 LCD 44.13
44.8
10COM0 COM3
COM0 COM1 COM2 COM3
SEG20
SEG23
44.8 SEG20 1101b
SEG20 LCD 44.15 COM0 SEG20 +VLCD / �VLCD LCD
SEG2n
44.13
COM0 COM2
SEG2n + 1 .
4 LCD
COM1 COM3
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1420 of 1551
RA4W1
44. LCDSLCDC
SEG06 SEG09 SEG11 SEG12 SEG20 SEG23 SEG49 SEG52
44.14
4 LCD
10110010 01110111 10100111 11111111
b3 b2 b1 b0
COM3 COM2 COM1 COM0
SEG06 SEG09 SEG11 SEG12 SEG20 SEG23 SEG49 SEG52
LCD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1421 of 1551
RA4W1
44. LCDSLCDC
(a) A
LCD COM0
COM1
COM2
COM3
SEG20 LCD -
COM0 - SEG20
1
1
COM0 - SEG20
COM1 - SEG20
COM1 - SEG20
VL4 VL2 VL1 VSS VL4 VL2 VL1 VSS VL4 VL2 VL1 VSS VL4 VL2 VL1 VSS VL4 VL2 VL1 VSS
+VL4 +VL2 +VL1 0 -VL1 -VL2 -VL4
+VL4 +VL2 +VL1 0 -VL1 -VL2 -VL4
44.15
1/3 SEG20 4 LCD 1/2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1422 of 1551
RA4W1
44. LCDSLCDC
(b) B
LCD COM0
1
1
COM1
COM2
COM3
SEG20
LCD
-
COM0 - SEG20
COM0 - SEG20
COM1 - SEG20
COM1 - SEG20
VL4 VL2 VL1 VSS VL4 VL2 VL1 VSS VL4 VL2 VL1 VSS VL4 VL2 VL1 VSS VL4 VL2 VL1 VSS
+VL4 +VL2 +VL1 0 -VL1 -VL2 -VL4
+VL4 +VL2 +VL1 0 -VL1 -VL2 -VL4
44.16
1/3 SEG20 4 LCD 2/2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1423 of 1551
RA4W1
45. SCE5
45. SCE5
45.1
MCU SCE5
45.1 SCE5 45.1
45.1
SCE5
ID
SCE5
SCE5
Advanced Encryption StandardAESNIST FIPS PUB 197 128256 128
- ECBCBCCTRNIST SP 800-38A - GCMNIST SP 800-38D - XTSNIST SP 800-38E - GCTR 128 - 12844 PCLKA - 25661 PCLKA AES-GCM AES-GCM AES-GCTRGHASH SCE5
32
MCUID ID ID MCU
SCE5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1424 of 1551
RA4W1
45. SCE5
SCE5
AES (128/256)
GHASH
45.1
SCE5
ID
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1425 of 1551
RA4W1
45. SCE5
45.2
45.2.1
45.2
SCE5
SCE5
45.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1426 of 1551
RA4W1
45. SCE5
45.2.2
1. SCE5 SCE5
2. /
45.3
-1 -2 32 � 432 � 4
W1 W1 W1 W1 W2 W2 W2 W2
-1 -3 32 � 432 � 4
R1 R1 R1 R1 W3 W3 W3 W3
W1
W2
W3
R1
R2
4461
45.3
AES
45.3
45.3.1
45.3.2
SCE5 CMSTPCRC SCE5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1427 of 1551
RA4W1
46. Bluetooth Low Energy (BLE)
46. Bluetooth Low Energy (BLE)
MCU Bluetooth Low Energy (BLE) Bluetooth 5.0 Low Energy single mode RF Link Layer RF
BLE Bluetooth
46.1
46.1 BLE 46.1 BLE
46.1
BLE
Bluetooth 5.0
Bluetooth 5.0 Low Energy RF Link Layer
BLE32.768kHz 0dBm/+4dBm �95dBm (1Mbps)�92dBm (2Mbps)�100dBm (500kbps)�105dBm (125kbps)
Extended/Periodic
Muitiple
= 4
= 1650
Periodic Periodic = 2
Periodic Advertiser
4 Periodic Advertisier4
= 251 MoreData
1Mbps2Mbps500kbps125kbps
Channel Selection Algorithm #2
Bluetooth
Bluetooth AES-CCM128
RFDC-DC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1428 of 1551
RA4W1
46. Bluetooth Low Energy (BLE)
AVCC_RF DCLOUT DCLIN_A DCLIN_D VCC_RF VSS_RF
ANT
RF
PLL
RF
A/D
Link Layer
46.1
BLE
46.2 BLE
46.2
BLE
ANT
DCLOUT DCLIN_A, DCLIN_D
VCC_RF AVCC_RF VSS_RF
RF RF 50
RF
RF DC-DCDCLOUT RF DCLOUT
RF
RF
RF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1429 of 1551
RA4W1
46. Bluetooth Low Energy (BLE)
46.3 MCU Bluetooth Low Energy Bluetooth
46.3
Bluetooth Low Energy
Low Energy Controller (PHY and LL) Low Energy Host (L2CAP and Security Manager) Attribute Protocol and Generic Attribute Profile Appearance Data Type Low Duty Cycle Directed Advertising 32-bit UUID Support in LE LE L2CAP Connection Oriented Channel Support LE Link Layer Topology LE Ping LE Data Packet Length Extension LE Secure Connections Link Layer Privacy Link Layer Extended Filter Policies LE 2M PHY LE Coded PHY High Duty Cycle Non-Connectable Advertising LE Advertising Extensions LE Channel Selection Algorithm #2
Bluetooth� core spec v4.0 v4.1
v4.2 v5.0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1430 of 1551
RA4W1
46.2 46.2.1
46.2 BLE
RF
46. Bluetooth Low Energy (BLE)
RF
46.2
BLE
RF MCU RF
RF RF LinkLayer
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1431 of 1551
RA4W1
46. Bluetooth Low Energy (BLE)
46.3
46.4 Bluetooth
46.4 BLEIRQ
DTC
DMAC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1432 of 1551
RA4W1
46. Bluetooth Low Energy (BLE)
46.4
46.4.1 RF
RF DC-DC 2
46.3 DC-DC 46.4
MCU
DCLIN_D DCLIN_A
RF
DC-DC
L0(1)
2.2�F 10�H
DCLOUT
1.
DC-DC L0 Bluetooth R01AN4886
46.3
DC-DC BLE
MCU
DCLIN_D DCLIN_A
RF
DCLOUT
0.47�F
46.4
BLE
DC-DC RF DCLOUT, DCLIN_D, DCLIN_A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1433 of 1551
RA4W1
46. Bluetooth Low Energy (BLE)
46.4.2
2.4GHz ARIB STD-T66 FCC CFR47 part15.247 part15.249 EN300 440 EN 300 328
46.4.3
Bluetooth R01AN4886
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1434 of 1551
RA4W1
47.
47.
47.1
MCU LDO
47.2
47.1 LDO 47.1 LDO LDO VCC
47.1
LDO
VCC
VCL
0.1FVSS
4.7F VSS
VCC
0.1�F VCC
VSS
LDO
VCL VSS
4.7�F
47.1
LDO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1435 of 1551
RA4W1
48.
48.
MCU VCC 1= AVCC0 = VCC_USB 2= VCC_USB_LDO 2= VCC_RF = AVCC_RF = 1.8 3.6VVREFH0 = 1.8 AVCC0VBATT = 1.8 3.6VVSS = AVSS0 = VREFL0 = VSS_RF = VSS_USB = 0VTa = Topr 1. VCC = 3.3V 2. USBFS
48.1
P100
C
VOH = VCC � 0.7, VOL = VCC � 0.3 VIH = VCC � 0.7, VIL = VCC � 0.3
C = 30pF
48.1
I/O AC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1436 of 1551
RA4W1
48.1
48.
48.1
5V 1 P004, P010, P011, P014, P015 ANT XTAL1_RF, XTAL2_RF DCLIN_A, DCLIN_D
VCC Vin
VBATT
USB
LCD
2
AN004 AN006, AN009, AN010 AN017, AN019, AN020 VL1 VL2 VL4
VREFH0 VBATT AVCC0 VCC_RF AVCC_RF VCC_USB VCC_USB_LDO VAN
VL1 VL2 VL4 Topr Tstg
1. 2.
P205, P206, P402, P407 5V 48.2.1Tj/Ta
-0.5 +4.0 -0.3 +6.5 -0.3AVCC0 + 0.3 -1.0 +1.4 -0.3 +1.4 -0.3 +2.2 -0.3VCC + 0.3 -0.3 +4.0 -0.5 +4.0 -0.5 +4.0 -0.3 +4.0 -0.3 +4.0 -0.5 +4.0 -0.5 +4.0 -0.3AVCC0 + 0.3 -0.3VCC + 0.3 -0.3 +2.8 -0.3 +4.0 -0.3 +4.0 -40 +85 -55 +125
V V V V V V V V V V V V V V V V V V V
MCU MCU VCC VSS AVCC0 AVSS0 VCC_RF VSS_RF AVDD_RF VSS_RF VCC_USB VSS_USB VREFH0 VREFL0 VCC_RF 2.2F 0.1F
VCL 4.7F VSS
I/O I/O
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1437 of 1551
RA4W1
48.
48.2
VCC 1 2
VSS
USBFS
USBFS USB
Min 1.8 VCC_USB
--
USB
VCC_USB
USBFS
--
USBFS
3.0
USB
VCC_USB_LDO
USBFS
--
USBFS
--
VSS_USB
--
VBATT
VBATT
--
1.8
AVCC0 1 2
1.8
AVSS0
--
VREFH0 VREFL0
ADC14 1.8 --
BLE
VCC_RF 3
1.8
AVCC_RF 3
1.8
VSS_RF
--
Typ -- --
0 VCC 3.3
VCC VCC 0 VCC
--
-- 0 -- 0 -- -- 0
Max 3.6 3.6
-- -- 3.6
-- -- -- --
3.6
3.6 -- AVCC0 -- 3.6 3.6 --
V V
V V V
V V V V
V
V V V V V V V
1.
2. 3.
AVCC0 VCC VCC 2.2V AVCC 2.2V AVCC0 VCC VCC 2.2V AVCC0 2.2V AVCC0 = VCC VCC AVCC0 VCC AVCC0
VCC = VCC_RF = AVCC_RF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1438 of 1551
RA4W1
48.2 DC 48.2.1 Tj/Ta
48.
48.3
DC
Ta -40 +85
Tj
Typ --
Max 105 1
High-speed Middle-speed Low-speed Low-voltage Subosc-speed
. 1.
Tj = Ta + ja � W = (VCC - VOH) � IOH + VOL � IOL + ICCmax � VCC 85 1.3 85 Tj 105
48.2.2 I/O VIH, VIL
48.4
I/O VIH, VIL (1)
VCC = AVCC0 = VCC_USB = VCC_USB_LDO = 2.73.6VVBATT = 1.8 3.6VVSS = AVSS0 = 0V
IIC 1
RES, NMI IIC
5V
2
P914, P915
P004, P010
VBATT
EXTAL P004, P010, P914, P915
P402
VIH VIL VT VIH VIL VT VIH VIL VIH VIL VIH VIL VIH VIL
Min VCC � 0.7 -- VCC � 0.05 VCC � 0.8 -- VCC � 0.1 VCC � 0.8 -- VCC_USB � 0.8 -- AVCC0 � 0.8 -- VCC � 0.8 --
Typ -- -- -- -- -- -- -- -- -- -- -- -- -- --
Max 5.8 VCC � 0.3 -- -- VCC � 0.2 -- 5.8 VCC � 0.2 VCC_USB + 0.3 VCC_USB � 0.2 -- AVCC0 � 0.2 -- VCC � 0.2
VIH VIL VT
VBATT � 0.8 -- VBATT � 0.05
--
VBATT + 0.3
--
VBATT � 0.2
----
V
--
1. 2.
P205P206P407 3 P2205P206P402P407 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1439 of 1551
RA4W1
48.
48.5
I/O VIH, VIL (2)
VCC = AVCC0 = VCC_USB = VCC_USB_LDO = 1.82.7VVBATT = 1.8 3.6VVSS = AVSS0 = 0V
RES#, NMI
5V
1
P914, P915
P004, P010
VBATT
EXTAL P004, P010
P402, P404
VIH VIL VT VIH VIL VIH VIL VIH VIL VIH VIL
Min VCC � 0.8 -- VCC � 0.01 VCC � 0.8 -- VCC_USB � 0.8 -- AVCC0 � 0.8 -- VCC � 0.8 --
Typ -- -- -- -- -- -- -- -- -- -- --
Max -- VCC � 0.2 -- 5.8 VCC � 0.2 VCC_USB + 0.3 VCC_USB � 0.2 -- AVCC0 � 0.2 -- VCC � 0.2
VIH VIL VT
VBATT � 0.8 -- VBATT � 0.01
--
VBATT + 0.3
--
VBATT � 0.2
----
V
--
1. P205P206P402P407 4
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1440 of 1551
RA4W1
48.2.3 I/O IOH, IOL
48.
48.6
I/O IOH, IOL
VCC = AVCC0 = VCC_USB = VCC_USB_LDO = 1.83.6V
P212P213
--
P409
1
P100 P111P201 P204P300P501 16
2 VCC = 2.7 3.0V 2 VCC = 3.0 3.6V 1
2
P914P915
--
3
1
2
P212P213 P409
-- 1
P100 P111P201 P204P300P501 16
2 VCC = 2.7 3.0V
2 VCC = 3.0 3.6V
1
2
P914P915
--
3
1
2
P004P010 P914P915
5
IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH IOL IOH (max) IOL (max) IOH (max) IOL (min) IOH (max) IOL (max)
Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
Max -4.0 4.0 -4.0 4.0 -8.0 8.0 -20.0 20.0 -4.0 4.0 -4.0 8.0 -4.0 4.0 -4.0 4.0 -8.0 8.0 -4.0 4.0 -4.0 4.0 -8.0 8.0 -20.0 20.0 -4.0 4.0 -4.0 8.0 -4.0 4.0 -4.0 4.0 -8.0 8.0 -30 30 -4.0 4.0 -60 60
mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA
MCU 100s
1. PmnPFS
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1441 of 1551
RA4W1
48.
2. 3. 4. 5.
PmnPFS P200P214P215 PmnPFS IIC CTSU 48.11CTSU
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1442 of 1551
RA4W1
48.2.4 I/O VOHVOL
48.
48.7
I/O VOH, VOL (1)
VCC = AVCC0 = VCC_USB = VCC_USB_LDO = 2.73.6V
IIC 1
Min
VOL
--
VOL
--
25
P40923
VOH
VCC - 1.0
Typ -- --
Max 0.4 0.6
--
--
VOL
--
--
1.0
1. 2. 3. 4. 5. 6.
P004P010
P914P915
46
5
VOH VOL VOH VOL VOH VOL VOH VOL VOH VOL
AVCC0 - 0.5
--
--
--
--
0.5
AVCC0 - 0.5
--
--
--
--
0.5
VCC_USB - 0.5 --
--
--
--
0.5
VCC - 0.5
--
--
--
--
0.5
VCC - 0.5
--
--
--
--
0.5
P100P101P204P205P206P407 6 PmnPFS
P200P214P215 P212P213 CLKOUT_RF
V
IOL = 3.0mA IOL = 6.0mA
IOH = -20mA VCC = 3.3V
IOL = 20mA VCC = 3.3V
IOH = -1.0mA IOL = 1.0mA IOH = -2.0mA IOL = 2.0mA IOH = -1.0mA IOL = 1.0mA IOH = -1.0mA IOL = 1.0mA IOH = -2.0mA IOL = 2.0mA
48.8
I/O VOH, VOL (2)
VCC = AVCC0 = VCC_USB = VCC_USB_LDO = 1.82.7V
P004P010
P914P915
1 3
2
VOH VOL VOH VOL VOH VOL VOH VOL VOH VOL
Min AVCC0 - 0.3 -- AVCC0 - 0.3 -- VCC_USB - 0.3 -- VCC - 0.3 -- VCC - 0.3 --
Typ -- -- -- -- -- -- -- -- -- --
1. 2. 3.
P200P214P215 P212P213 CLKOUT_RF
Max -- 0.3 -- 0.3 -- 0.3 -- 0.3 -- 0.3
V
IOH = -0.5mA IOL = 0.5mA IOH = -1.0mA IOL = 1.0mA IOH = -0.5mA IOL = 0.5mA IOH = -0.5mA IOL = 0.5mA IOH = -1.0mA IOL = 1.0mA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1443 of 1551
RA4W1
48.
48.9
I/O VOH, VOL (3)
3.0VVCC = AVCC0 = VCC_USB = VCC_USB_LDO = VCC_RF = AVCC_RF 3.6V
Min
Max
Low High
CLKOUT_RF
VOL
CLKOUT_RF
VOH
--
0.3
VCC_RF - 0.3
--
V V
IOL = 0.5mA IOH = -0.5mA
48.10
I/O
VCC = AVCC0 = 1.83.6V
RES, P200, P214, P215
Min
| Iin |
--
5V
| ITSI |
--
--
P200P214P215
5V
RU
10
P200P214P215
P914P915
P914P915
Cin
--
P100 P103P111P200
--
Typ --
--
--
Max 1.0
1.0
1.0
A
A
Vin = 0V Vin = VCC Vin = 0V Vin = 5.8V Vin = 0V Vin = VCC
20
50
k
Vin = 0V
--
30
pF
Vin = 0V
f = 1MHz
--
15
Ta = 25
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1444 of 1551
RA4W1
48.2.5
48.
IOH/IOL vs VOH/VOL 30
VCC = 3.6V
20
VCC = 2.7V
10
VCC = 1.8V
0
IOH/IOL[mA]
-10 VCC = 1.8V
VCC = 2.7V
-20
VCC = 3.6V
-30
0
0.5
1
1.5
2
2.5
3
3.5
4
VOH/VOL [V]
48.2
Ta = 25 VOH/VOL IOH/IOL
IOH/IOL vs VOH/VOL 6
Ta = -40�C
4
Ta = 25�C
Ta = 85�C
2
IOH/IOL[mA]
0
-2
Ta = 85�C
-4 Ta = 25�C
Ta = -40�C -6
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
VOH/VOL [V]
48.3
VCC = 1.8V VOH/VOL IOH/IOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1445 of 1551
RA4W1
48.
IOH/IOL[mA]
20
15
10
5
0
-5
-10
Ta = 85�C Ta = 25�C
-15 Ta = -40�C
-20
0
0.5
IOH/IOL vs VOH/VOL
1
1.5
2
VOH/VOL [V]
Ta = -40�C Ta = 25�C Ta = 85�C
2.5
3
48.4
VCC = 2.7V VOH/VOL IOH/IOL
IOH/IOL vs VOH/VOL 30
Ta = -40�C
20
Ta = 25�C
Ta = 85�C
10
IOH/IOL[mA]
0
-10
Ta = 85�C -20 Ta = 25�C
Ta = -40�C
-30
0
0.5
1
1.5
2
2.5
3
3.5
4
VOH/VOL [V]
48.5
VCC = 3.6V VOH/VOL IOH/IOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1446 of 1551
RA4W1
48.2.6
48.
IOH/IOL vs VOH/VOL 60
IOH/IOL[mA]
40 20
0 VCC = 1.8V
-20 VCC = 2.7V
VCC = 1.8V
VCC = 2.7V
VCC = 3.6V
-40
VCC = 3.6V
-60
0
0.5
1
1.5
2
2.5
3
3.5
4
VOH/VOL [V]
48.6
Ta = 25 VOH/VOL IOH/IOL
IOH/IOL vs VOH/VOL 12
Ta = -40�C
8
Ta = 25�C
Ta = 85�C
4
IOH/IOL[mA]
0
-4
-8
Ta = 85�C
Ta = 25�C
Ta = -40�C -12
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
VOH/VOL [V]
48.7
VCC = 1.8V VOH/VOL IOH/IOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1447 of 1551
RA4W1
48.
IOH/IOL[mA]
40
30
20
10
0
-10
-20 Ta = 85�C Ta = 25�C
-30 Ta = -40�C
-40
0
0.5
IOH/IOL vs VOH/VOL
1
1.5
2
VOH/VOL [V]
Ta = -40�C Ta = 25�C
Ta = 85�C
2.5
3
48.8
VCC = 2.7V VOH/VOL IOH/IOL
IOH/IOL[mA]
IOH/IOL vs VOH/VOL 80
60
Ta = -40�C
Ta = 25�C
40
Ta = 85�C
20
0
-20
-40
Ta = 85�C
Ta = 25�C
-60
Ta = -40�C
-80
0
0.5
1
1.5
2
2.5
3
3.5
4
VOH/VOL [V]
48.9
VCC = 3.6V VOH/VOL IOH/IOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1448 of 1551
RA4W1
48.2.7 P409
48.
IOH/IOL[mA]
IOH/IOL vs VOH/VOL 100
80 VCC = 3.6V
60
40
VCC = 2.7V
20
0
-20
-40
VCC = 2.7V
-60
-80
VCC = 3.6V
-100
0
0.5
1
1.5
2
2.5
3
3.5
4
VOH/VOL [V]
48.10
Ta = 25 VOH/VOL IOH/IOL
IOH/IOL vs VOH/VOL
60
Ta = -40�C
Ta = 25�C
40
Ta = 85�C
20
IOH/IOL[mA]
0
-20
Ta = 85�C -40 Ta = 25�C
Ta = -40�C
-60
0
0.5
1
1.5
2
2.5
3
VOH/VOL [V]
48.11
VCC = 2.7V VOH/VOL IOH/IOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1449 of 1551
RA4W1
48.
IOH/IOL vs VOH/VOL 120
Ta = -40�C
80
Ta = 25�C
Ta = 85�C
40
IOH/IOL[mA]
0
-40
Ta = 85�C -80 Ta = 25�C
Ta = -40�C
-120
0
0.5
1
1.5
2
2.5
3
3.5
4
VOH/VOL [V]
48.12
VCC = 3.6V VOH/VOL IOH/IOL
48.2.8 IIC
IOL[mA]
IOL vs VOL 120
110
100
90
80
70
60
VCC = 3.6V (Middledrive)
50
40
30
VCC = 2.7V (Middledrive)
20
VCC = 3.6V (Lowdrive)
VCC = 2.7V (Lowdrive)
10
0
0
1
2
3
4
5
6
VOL [V]
48.13
Ta = 25 VOH/VOL IOH/IOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1450 of 1551
RA4W1
48.2.9
48.
48.11
1(1/2)
VCC = AVCC0 = 1.83.6V
High-speed
1
2
Middle-speed 2
1 5
ICLK = 48MHz ICLK = 32MHz ICLK = 16MHz
ICLK = 8MHz
CoreMark 5
ICLK = 48MHz ICLK = 32MHz ICLK = 16MHz
ICLK = 8MHz
1 5
ICLK = 48MHz ICLK = 32MHz ICLK = 16MHz
ICLK = 8MHz
SRAM 5
5
ICLK = 48MHz
ICLK = 48MHz ICLK = 32MHz
ICLK = 16MHz
ICLK = 8MHz
5
ICLK = 48MHz ICLK = 32MHz
ICLK = 16MHz
ICLK = 8MHz
BGO 5
1 5
ICLK = 12MHz ICLK = 8MHz ICLK = 1MHz
CoreMark 5
ICLK = 12MHz ICLK = 8MHz ICLK = 1MHz
1 5
ICLK = 12MHz ICLK = 8MHz ICLK = 1MHz
SRAM 5
5
ICLK = 12MHz
ICLK = 12MHz ICLK = 8MHz
ICLK = 1MHz
5
ICLK = 12MHz ICLK = 8MHz
ICLK = 1MHz
BGO 6
ICC
Typ10 Max
8.4
--
5.9
--
3.5
--
2.3
--
17.9
--
12.4
--
7.0
--
4.3
--
21.2
--
16.0
--
8.8
--
5.1
--
--
56.0
mA 7
9 8 9
3.7
--
7
2.7
--
2.0
--
1.5
--
16.4
--
9
12.7
--
8
7.2
--
4.3
--
2.5
--
--
ICC
2.5
2.1
--
mA 7
--
1.0
--
5.2
--
4.0
--
1.3
--
6.5
--
8
4.8
--
1.6
--
--
23.0
1.4
--
1.3
--
0.9
--
5.3
--
4.0
--
1.5
--
2.5
--
7 8 --
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1451 of 1551
RA4W1
48.
48.11
1(2/2)
VCC = AVCC0 = 1.83.6V
1
Low-speed 3
Low-voltage 3
Subosc-speed 4
1 5
CoreMark 5
1 5
SRAM 5
5
5
1 5
CoreMark 5
1 5
SRAM 5
5
5
1 5
1 5
SRAM 5
5
5
ICLK = 1MHz ICLK = 1MHz ICLK = 1MHz ICLK = 1MHz ICLK = 1MHz ICLK = 1MHz ICLK = 4MHz ICLK = 4MHz ICLK = 4MHz ICLK = 4MHz ICLK = 4MHz ICLK = 4MHz ICLK = 32.768kHz ICLK = 32.768kHz ICLK = 32.768kHz ICLK = 32.768kHz ICLK = 32.768kHz
ICC
Typ10 Max
0.4
--
mA 7
0.6
--
1.1
--
8
--
2.5
0.3
1.0
ICC
1.8
3.0
--
7
--
8
--
mA 7
--
3.3
--
8
--
9.0
1.4
2.9
ICC
9.3
--
7
--
8
--
A 8
17.2
--
--
106.0
6.0
--
14.0
--
1.
2. 3. 4. 5. 6. 7. 8. 9. 10.
MOS OFF
HOCO MOCO
BGO
FCLKPCLKAPCLKBPCLKCPCLKD 64 FCLKPCLKAPCLKBPCLKCPCLKD ICLK FCLKPCLKB 2 PCLKAPCLKCPCLKD ICLK VCC = 3.3V
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1452 of 1551
RA4W1
48.
ICC (mA)
50 40 30 20 10
0 1.5
2
2.5
3
3.5
4
4.5
VCC (V)
Ta = 25, ICLK = 48MHz1 Ta = 25, ICLK = 32MHz1 Ta = 25, ICLK = 16MHz1 Ta = 25, ICLK = 8MHz1 Ta = 25, ICLK = 4MHz1
Ta = 85, ICLK = 48MHz2
Ta = 85, ICLK = 32MHz2
Ta = 25, ICLK = 48MHz1
Ta = 85, ICLK = 16MHz2 Ta = 25, ICLK = 32MHz1
Ta = 85, ICLK = 8MHz2 Ta = 25, ICLK = 16MHz1 Ta = 85, ICLK = 4MHz2 Ta = 25, ICLK = 8MHz1 Ta = 25, ICLK = 4MHz1
5
5.5
6
Ta = 85, ICLK = 48MHz2 Ta = 85, ICLK = 32MHz2 Ta = 85, ICLK = 16MHz2 Ta = 85, ICLK = 8MHz2 Ta = 85, ICLK = 4MHz2
1. BGO 2. BGO
48.14
High-speed
15
Ta = 85, ICLK = 12MHz2
ICC (mA)
10
Ta = 85, ICLK = 8MHz2
5
0 1.5
2
2.5
3
3.5
4
4.5
VCC (V)
Ta = 25, ICLK = 12MHz1 Ta = 25, ICLK = 8MHz1 Ta = 25, ICLK = 4MHz1 Ta = 25, ICLK = 1MHz1
Ta = 25, ICLK = 12MHz1 Ta = 85, ICLK = 4MHz2 Ta = 25, ICLK = 8MHz1 Ta = 25, ICLK = 4MHz1 Ta = 85, ICLK = 1MHz2 Ta = 25, ICLK = 1MHz1
5 5.5 6
Ta = 85, ICLK = 12MHz2 Ta = 85, ICLK = 8MHz2 Ta = 85, ICLK = 4MHz2 Ta = 85, ICLK = 1MHz2
1. BGO 2. BGO
48.15
Middle-speed
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1453 of 1551
RA4W1
48.
ICC (A)
2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
1.5
2
2.5
3
3.5
4
VCC (V)
Ta = 25, ICLK = 1MHz1
Ta = 85, ICLK = 1MHz2 Ta = 25, ICLK = 1MHz1
4.5
5
5.5
6
Ta = 85, ICLK = 1MHz2
1. BGO 2. BGO
48.16
Low-speed
ICC (mA)
6 5 4 3 2 1 0
1.5
2
2.5
3
3.5
4
VCC (V)
Ta = 25, ICLK = 4MHz1 Ta = 25, ICLK = 1MHz1
Ta = 85, ICLK = 4MHz2
Ta = 25, ICLK = 4MHz1 Ta = 85, ICLK = 1MHz2 Ta = 25, ICLK = 1MHz1
4.5
5
5.5
6
Ta = 85, ICLK = 4MHz2 Ta = 85, ICLK = 1MHz2
1. BGO 2. BGO
48.17
Low-voltage
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1454 of 1551
RA4W1
48.
ICC (A)
70.0 60.0 50.0 40.0 30.0 20.0 10.0
0.0 1.5
2
2.5
3
3.5
4
VCC (V)
Ta = 25, ICLK = 32kHz1
Ta = 85, ICLK = 32kHz2
Ta = 25, ICLK = 32kHz1
4.5
5
5.5
6
Ta = 85, ICLK = 32kHz2
1. BGO 2. BGO
48.18
Subosc-speed
48.12
2
VCC = AVCC0 = 1.83.6V
1
2
Ta = 25 Ta = 55 Ta = 85 Ta = 25 Ta = 55 Ta = 85
RTC 3
RTC 3
ICC
Typ4 Max
0.9
5.0
1.5
8.1
3.6
22.1
1.0
5.6
1.6
8.4
4.3
26.7
0.5
--
0.4
--
1.2
--
A
PSMCR.PSMC[1:0] = 01b 48KB SRAM
PSMCR.PSMC[1:0] = 00b SRAM
--
SOMCR.SODRV[1:0] = 11b 3 SOMCR.SODRV[1:0] = 00b
1.
2. 3. 4.
MOS OFF
IWDT LVD
VCC = 3.3V
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1455 of 1551
RA4W1 100
48.
10
ICC (A)
1
0.1 -40
-20
0
20
40
60
Ta ()
80
100
48.19
SRAM
48.13
3
VCC = AVCC0 = 0VVBATT = 1.83.6VVSS = AVSS0 = 0V
1
VCC RTC
Ta = 25 Ta = 55 Ta = 85 Ta = 25 Ta = 55 Ta = 85 Ta = 25 Ta = 55 Ta = 85 Ta = 25 Ta = 55 Ta = 85
ICC
Typ 0.8 0.9 1.1 0.9 1.0 1.2 1.6 1.8 2.1 1.7 1.9 2.2
Max -- -- -- -- -- -- -- -- -- -- -- --
A
VBATT = 2.0V SOMCR.SORDRV[1:0] = 11b 3
VBATT = 3.3V SOMCR.SORDRV[1:0] = 11b
3
VBATT = 2.0V SOMCR.SORDRV[1:0] = 00b
VBATT = 3.3V SOMCR.SORDRV[1:0] = 00b
1.
MOS OFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1456 of 1551
RA4W1 10
1
48.
1 1
ICC (A)
0
-40
-20
0
20
40
Ta ()
1
1.
60
80
1
48.20
VCC RTC
100
120
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1457 of 1551
RA4W1
48.
48.14
4
VCC = AVCC0 = 1.83.6VVREFH0 = 2.7V AVCC0
Min
Typ
Max
LCD USB
A/D A/D D/A 11 A/DD/A 6 A/D A/D D/A D/A
IAVCC
IREFH0 IREFH ITNS ICMPLP
DAC8
1
IAMP
1
fLCD = fSUB = 128Hz1/34
USB
OUT64 � 1 IN64 � 1 USB1 USB
ILCD1
5
IUSBH
2
USB
OUT64 � 1 IN64 � 1 USB1 USB
IUSBF
2
USB_DP
USB1 USB
ISUSP
3
--
--
3.0
--
--
1.0
--
0.4
0.8
--
--
1.0
--
--
150
--
--
60
--
50
100
--
--
100
--
75
--
--
15
--
--
10
--
--
2
--
--
820
--
--
2.5
4.0
--
140
220
--
0.34
--
--
4.3VCC
--
0.9VCC_USB
4
--
3.6VCC
--
1.1VCC_USB
4
--
0.35VCC
--
170VCC_USB
4
mA mA mA A A nA A A A A A A A A A A
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
mA
--
mA
--
A
--
1. 2. 3.
4. 5. 6.
D/A USBFS MCU USB_DP
VCC = VCC_USB = 3.3V LCD LCD MCU MSTPCRD.MSTPD16ADC140
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1458 of 1551
RA4W1
48.
48.15
(5)
VCC = VCC_RF = AVCC_RF = 3.3V, VSS = VSS_RF = 0V, Ta = +25
Typ
BLE
2Mbps
DC-DC 1Mbps
500kbps
125kbps
2Mbps Prf = -67dBm
1Mbps Prf = -67dBm
500kbps Prf = -72dBm
125kbps Prf = -79dBm
BLE
2Mbps
1Mbps
500kbps
125kbps
2Mbps Prf = -67dBm
1Mbps Prf = -67dBm
500kbps Prf = -72dBm
125kbps Prf = -79dBm Idd_idle Idd_slp Idd_down
Min 0dBm
4dBm
Idd_tx
-- 4.5
8.7
--
--
--
Idd_rx
-- 3.3
3.5
--
--
--
Idd_idle -- 0.5
Idd_slp -- 1.5
Idd_down -- 0.1
Idd_tx
-- 10.2
18.1
--
--
--
Idd_rx
-- 6.9
-- 6.9
-- 6.9
-- 7.1
Idd_idle -- 0.7 Idd_slp -- 1.5 Idd_down -- 0.1
Max -- -- -- -- --
--
--
--
-- -- -- -- -- -- -- --
--
--
--
-- -- --
mA mA mA mA mA
-- -- -- -- --
mA --
mA --
mA --
mA -- A -- A -- mA -- mA -- mA -- mA -- mA --
mA --
mA --
mA --
mA -- A -- A --
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1459 of 1551
RA4W1
48.2.10 VCC
48.
48.16
VCC = AVCC0 = 03.6V
VCC
0 01 SCI/USB 2
SrVCC
Min 0.02 0.02 0.02
Typ -- -- --
Max 2 -- 2
ms/V
--
1. 2.
OFS1.LVDAS = 0 OFS1.LVDAS 0
48.17
VCC = AVCC0 = VCC_USB = 1.8 3.6V
VCC3.6V1.8V fr(VCC) VCCVCC � 10dt/dVCC
Min
fr (VCC)
--
--
--
dt/dVCC 1.0
Typ -- -- -- --
Max 10 1 10 --
kHz MHz MHz ms/V
48.21 Vr (VCC) VCC � 0.2
48.21 Vr (VCC) VCC � 0.08
48.21 Vr (VCC) VCC � 0.06
VCC VCC � 10
VCC
1/fr(VCC)
Vr(VCC)
48.21
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1460 of 1551
RA4W1
48.3 AC 48.3.1
48.
48.18
High-speed
VCC = AVCC0 = 2.43.6V
ICLK 4
FCLK 1 2 4
PCLKA
4
PCLKB
4
PCLKC
34
PCLKD
4
2.7 3.6V 2.4 2.7V 2.7 3.6V 2.4 2.7V 2.7 3.6V 2.4 2.7V 2.7 3.6V 2.4 2.7V 2.7 3.6V 2.4 2.7V 2.7 3.6V 2.4 2.7V
f
Min 0.032768 0.032768 0.032768 0.032768 -- -- -- -- -- -- -- --
Typ -- -- -- -- -- -- -- -- -- -- -- --
Max5
48
MHz
16
32
16
48
16
32
16
64
16
64
16
1.
2. 3. 4. 5.
FCLK 1MHz FCLK 4MHz 1MHz2MHz3MHz 1.5MHz
FCLK � 3.5%
14 A/D PCLKC 2.4V 4MHz2.4V 1MHz ICLKPCLKAPCLKBPCLKCPCLKD FCLK 9.
48.23
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1461 of 1551
RA4W1
48.
48.19
Middle-speed
VCC = AVCC0 = 1.83.6V
ICLK 4
FCLK 1 2 4
PCLKA
4
PCLKB
4
PCLKC
3 4
PCLKD
4
2.7 3.6V 2.4 2.7V 1.8 2.4V 2.7 3.6V 2.4 2.7V 1.8 2.4V 2.7 3.6V 2.4 2.7V 1.8 2.4V 2.7 3.6V 2.4 2.7V 1.8 2.4V 2.7 3.6V 2.4 2.7V 1.8 2.4V 2.7 3.6V 2.4 2.7V 1.8 2.4V
f
Min 0.032768 0.032768 0.032768 0.032768 0.032768 0.032768 -- -- -- -- -- -- -- -- -- -- -- --
Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
Max5
12
MHz
12
8
12
12
8
12
12
8
12
12
8
12
12
8
12
12
8
1.
2. 3. 4. 5.
FCLK 1MHz FCLK 4MHz 1MHz2MHz3MHz 1.5MHz
FCLK � 3.5%
14 A/D PCLKC 2.4V 4MHz2.4V 1MHz ICLKPCLKAPCLKBPCLKCPCLKD FCLK 9.
48.23
48.20
Low-speed
VCC = AVCC0 = 1.83.6V
ICLK3
1.8 3.6V
FCLK 1.83.6V
13
PCLKA 3
1.8 3.6V
PCLKB 3
1.8 3.6V
PCLKC23 1.8 3.6V
PCLKD 3
1.8 3.6V
f
Min 0.032768 0.032768
Typ -- --
Max4
1
MHz
1
--
--
1
--
--
1
--
--
1
--
--
1
1. 2. 3.
4.
FCLK 1MHz A/D PCLKC 1MHz ICLKPCLKAPCLKBPCLKCPCLKD FCLK 9.
48.23
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1462 of 1551
RA4W1
48.
48.21
Low-voltage
VCC = AVCC0 = 1.83.6V
ICLK4
1.8 3.6V
FCLK 1.83.6V
12 4
PCLKA 4
1.8 3.6V
PCLKB 4
1.8 3.6V
PCLKC34 1.8 3.6V
PCLKD 4
1.8 3.6V
f
Min 0.032768 0.032768
Typ -- --
Max5
4
MHz
4
--
--
4
--
--
4
--
--
4
--
--
4
1.
2. 3. 4. 5.
FCLK 1MHz FCLK 4MHz 1MHz2MHz3MHz 1.5MHz
FCLK � 3.5%
14 A/D PCLKC 2.4V 4MHz2.4V 1MHz ICLKPCLKAPCLKBPCLKCPCLKD FCLK 9.
48.23
48.22
Subosc-speed
VCC = AVCC0 = 1.83.6V
ICLK 3
1.8 3.6V
FlashIF FCLK13
1.8 3.6V
PCLKA 3
1.8 3.6V
PCLKB 3
1.8 3.6V
PCLKC23 1.8 3.6V
PCLKD 3
1.8 3.6V
f
Min 27.8528 27.8528 -- -- -- --
Typ 32.768 32.768 -- -- -- --
Max 37.6832 37.6832 37.6832 37.6832 37.6832 37.6832
kHz
1. 2.
3.
14 A/D ICLKPCLKAPCLKBPCLKCPCLKD FCLK 9.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1463 of 1551
RA4W1
48.3.2
48.
48.23
EXTAL EXTAL High EXTAL Low EXTAL EXTAL EXTAL 1 EXTAL
9 LOCO LOCO IWDT Bluetooth Bluetooth MOCO MOCO HOCO
tXcyc tXH tXL tXr tXf tEXWT fEXTAL
fMAIN
tMAINOSCWT fLOCO tLOCO fILOCO fBLECK fBLELOCO fMOCO tMOCO fHOCO24
Min 50 20 20 -- -- 0.3 -- -- 1 1 -- 27.8528 -- 12.75 -- -- 6.8 -- 23.64
23.76
fHOCO32
31.52 31.68
fHOCO48 4 47.28 47.52
fHOCO64 5 63.04 63.36
HOCO
6 7
Low-voltage tHOCO24
--
tHOCO32
tHOCO48
--
tHOCO64
--
Low-voltage tHOCO24
--
tHOCO32
tHOCO48
tHOCO64
PLL 2
fPLLIN
4
PLL 2
fPLL
24
PLL 8
tPLL
--
PLL
fPLLFR
--
fSUB
--
3
tSUBOSC
--
Typ -- -- -- -- -- -- -- -- -- -- -- 32.768 -- 15 32 32.768 8 -- 24
24
32
32
48
48
64
64
--
-- -- --
-- -- -- 8 32.768 --
Max -- -- -- 5 5 -- 20 8 20 8 -- 9 37.6832 100 17.25 -- -- 9.2 1 24.36
24.24
32.48
32.32
48.72
48.48
64.96
64.64
37.1
ns ns ns ns ns s MHz MHz ms kHz s kHz MHz kHz MHz s MHz
s
48.22
-- 2.4 VCC 3.6 1.8 VCC 2.4 2.4 VCC 3.6 1.8 VCC 2.4
-- 48.23 --
-- -- Ta = -40-20 1.8 VCC 3.6 Ta = -2085 1.8 VCC 3.6 Ta = -40-20 1.8 VCC 3.6 Ta = -2085 1.8 VCC 3.6 Ta = -40-20 1.8 VCC 3.6 Ta = -2085 1.8 VCC 3.6 Ta = -40-20 2.4 VCC 3.6 Ta = -2085 2.4 VCC 3.6 48.24
43.3 80.6 100.9
12.5 64 55.5 -- -- -- 3
MHz MHz s MHz kHz s
-- -- 48.26 -- -- 48.27
1.
MOSCCR.MOSTP 0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1464 of 1551
RA4W1
48.
2. 3.
4. 5. 6.
7. 8.
9.
PLL VCC 2.4 3.6V SOSCCR.SOSTP
48MHz HOCO VCC = 1.8 3.6V 64MHz HOCO VCC = 2.4 3.6V MOCO HOCOCR.HCSTP 0 MOCO HOCOCR.HCSTP 0 1s OSCSF.HOCOSF MOCO PLLCR.PLLSTP 0 MOCO PLLCR.PLLSTP 0 1s
MOSCWTCR MOSCCR.MOSTP OSCSF.MOSCSF 1
48.22
EXTAL tXr
EXTAL
tXcyc
tXH
tXL
tXf
VCC � 0.5
48.23
LOCOCR.LCSTP LOCO
LOCO
tLOCO
HOCOCR.HCSTP HOCO
1. x = 24, 32, 48, 64
tHOCOx1
48.24
HOCO HOCOCR.HCSTP
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1465 of 1551
RA4W1
48.
48.25
MOSCCR.MOSTP
tMAINOSCWT
48.26
PLLCR.PLLSTP tPLL
PLL
PLL PLL
SOSCCR.SOSTP
48.27
tSUBOSC
MOCOCR.MCSTP MOCO
48.28
MOCO
tMOCO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1466 of 1551
RA4W1
48.3.3
48.
48.24
RES
RES
RES
SRAM SRAM ECC MPU MPU
LVD0 1 LVD0 2 LVD0 1 LVD0 2 LVD0 1 LVD0 2
tRESWP tRESW tRESWT
tRESWT2
tRESWT3
Min 3 30 -- -- -- -- -- --
1. 2.
OFS1.LVDAS = 0 OFS1.LVDAS = 1
Typ -- -- 0.7 0.3 0.5 0.05 0.6 0.15
Max -- -- -- -- -- -- -- --
ms s ms
ms
ms
48.29 48.30 48.29
48.30
VCC RES
tRESWP
48.29
tRESWT
RES
48.30
1
tRESW tRESWT2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1467 of 1551
RA4W1
48.3.4
48.
48.25
1
1
High-speed
20MHz 2
PLL 48MHz 2
20MHz3
PLL 48MHz 3
HOCO 4 HOCO 32MHz
HOCO 4 HOCO 48MHz
HOCO 5 HOCO 64MHz
MOCO
tSBYMC tSBYPC
tSBYEX tSBYPE
tSBYHO tSBYHO tSBYHO tSBYMO
Min -- --
-- --
-- -- -- --
Typ 2 2
14 53
43 44 82 16
Max 3 3
25 76
52 52 110 25
ms ms
s s
s s s s
48.31
1.
2. 3. 4. 5.
ICKBCKFCKPCKx
MOSCWTCR 05h MOSCWTCR 00h HOCO HOCOWTCR 05h HOCO HOCOWTCR 06h
48.26
2
1
Middle-speed
12MHz 2
PLL 24MHz 2
12MHz3
PLL 24MHz 3
HOCO24MHz
MOCO
tSBYMC tSBYPC
tSBYEX tSBYPE
tSBYHO tSBYMO
Min -- --
-- --
-- --
Typ 2 2
2.9 49
38 3.5
Max 3 3
10 76
50 5.5
ms ms
s s
s s
48.31
1.
2. 3.
ICKBCKFCKPCKx
MOSCWTCR 05h MOSCWTCR 00h
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1468 of 1551
RA4W1
48.
48.27
3
1
Low-speed
1MHz 2
1MHz3
MOCO
tSBYMC
tSBYEX
tSBYMO
Min --
--
--
Typ 2
28
25
Max 3
50
35
ms
s
s
48.31
1.
2. 3.
ICKBCKFCKPCKx
MOSCWTCR 05h MOSCWTCR 00h
48.28
4
1
Low-voltage
4MHz 2
4MHz3
HOCO
Min Typ Max
tSBYMC
--
2
3
ms 48.31
tSBYEX
--
108 130 s
tSBYHO
--
108 130 s
1.
2. 3.
ICKBCKFCKPCKx
MOSCWTCR 05h MOSCWTCR 00h
48.29
5
1
Subosc-speed
32.768kHz
LOCO32.768kHz
Min Typ Max
tSBYSC
--
0.85 1
ms 48.31
tSBYLO
--
0.85 1.2 ms
1. Subosc-speed LOCO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1469 of 1551
RA4W1
48.
ICLK IRQ
tSBYMC, tSBYPC, tSBYEX, tSBYPE, tSBYMO, tSBYHO
ICLK
48.31
IRQ
tSBYSC, tSBYLO
48.30
6
Min
High-speed
tSNZ
--
HOCO
Middle-speed
tSNZ
--
MOCO
Low-speed
tSNZ
--
MOCO
Low-voltage
tSNZ
--
HOCO
Typ 36 1.3 10 87
Max 45 3.6 13 110
s s s s
48.32
ICLKDTC, SRAM
ICLKDTC, SRAM1 PCLK
IRQ
1.
tSNZ
SNZCR.SNZDTCEN 1 ICLK DTC SRAM
48.32
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1470 of 1551
RA4W1
48.3.5 NMI/IRQ
48.
48.31
NMI/IRG
NMI
IRQ
tNMIW
tIRQW
Min 200
tPcyc � 21 200
tNMICK � 3.52 200
tPcyc � 21 200
tIRQCK � 3.53
Typ -- -- -- -- -- -- -- --
Max -- -- -- -- -- -- -- --
ns
ns
NMI NMI IRQ IRQ
tPcyc � 2 200ns tPcyc � 2 200ns tNMICK � 3 200ns tNMICK � 3 200ns tPcyc � 2 200ns tPcyc � 2 200ns tIRQCK � 3 200ns tIRQCK � 3 200ns
. . 1. 2.
3.
200ns 4 tPcyc PCLKB tNMICK NMI tIRQCK IRQi i = 0 15
NMI
48.33
NMI
IRQ
48.34
IRQ
tNMIW tIRQW
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1471 of 1551
RA4W1
48.
48.3.6 I/O POEGGPTAGTKINTADC14
48.32
I/O POEG GPT AGT
ADC14 KINT
I/O POEGGPTAGTKINTADC14
P004
POEG
AGTIOAGTEE
2.7V VCC 3.6V
2.4V VCC 2.7V 1.8V VCC 2.4V
AGTIOAGTEE High Low
2.7V VCC 3.6V 2.4V VCC 2.7V
1.8V VCC 2.4V
AGTIOAGTOAGTOB 2.7V VCC 3.6V
2.4V VCC 2.7V
1.8V VCC 2.4V 14 A/D
KRnn = 00 07
tPRW tPOcyc tPOEW tGTICW
tACYC
1
tACKWH, tACKWL
tACYC2
tTRGW tKR
Min 1.5 10 3 1.5 2.5 250 500 1000 100 200 400 62.5 125 250 1.5 250
Max -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
tPcyc �s tPcyc tPDcyc
ns ns ns ns ns ns ns ns ns tPcyc ns
48.35 48.36 48.37 48.38
48.38
48.39 48.40
. 1.
tPcycPCLKB tPDcycPCLKD
tPcyc � 2 tACYC tPcyc � 6 tACYC
tPRW
48.35
I/O
POEG
48.36
POEG
tPOEW
48.37
GPT
R01UH0883JJ0100 Rev.1.00 2020.08.31
tGTICW
Page 1472 of 1551
RA4W1
AGTIO, AGTEE
tACKWL
tACYC
tACKWH
48.
AGTIO, AGTO, AGTOB
48.38
AGT
tACYC2
ADTRG0
48.39
ADC14
tTRGW
KR00KR07 tKR
48.40
48.3.7 CAC
48.33
CAC
CAC
CACREF
tPBcyc1 tcac2 tPBcyc1 tcac2
tCACREF
Min
4.5 � tcac + 3 � tPBcyc1 5 � tcac + 6.5 � tPBcyc1
Typ -- --
Max -- --
ns ns
--
1. 2.
tPBcycPCLKB tcacCAC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1473 of 1551
RA4W1
48.3.8 SCI
48.
48.34
SCI 1
SCI
1.
tPcycPCLKA
1.8V 1.8V 1.8V
2.7V 2.4V 1.8V 2.7V 2.4V 1.8V 2.7V 1.8V
tScyc
tSCKW tSCKr tSCKf tScyc
tSCKW tSCKr tSCKf tTXD
Min 4 6 0.4 -- -- 6 4 0.4 -- -- --
--
--
--
tRXS
45
55
90
40
45
tRXH
5
tRXH
40
Max -- -- 0.6 20 20 -- -- 0.6 20 20 40
55 60 100 -- -- -- -- -- --
--
1
tPcyc
48.41
tScyc ns ns tPcyc
tScyc ns ns ns
ns
48.42
ns
ns ns ns
SCKn (n = 0, 1, 4, 9)
48.41
SCK
tSCKW
tSCKr
tSCKf
tScyc
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1474 of 1551
RA4W1
48.
SCKn TXDn RXDn
tTXD
tRXS tRXH
n = 0, 1, 4, 9
48.42
SCI
48.35
SCI 2
SPI
SCK
SCK
SCK High
SCK Low
SCK
1.8V
2.7V 2.4V
1.8V
2.7V
1.8V
SS
SS
1.8V 2.4V 1.8V 2.7V 2.4V 1.8V
1.8V 1.8V
tSPcyc tSPCKWH tSPCKWL tSPCKr, tSPCKf tSU
tH tLEAD tLAG tOD
tOH
tDr, tDf tSA
Min 4 6 0.4 0.4 --
45 55 80 40 45 33.3 40 1 1 -- -- -- -10 -20 -30 -10 -- -- --
tREL
--
Max 65,536 65,536 0.6 0.6 20
tPcyc
48.43
tSPcyc tSPcyc ns
-- -- -- -- -- -- -- -- -- 40 65 100 -- -- -- -- 20 20
10(PCLKA 32MHz), 6(PCLKA 32MHz)
10(PCLKA 32MHz), 6(PCLKA 32MHz)
ns
ns tSPcyc tSPcyc ns ns
ns tPcyc tPcyc
48.44 48.47
48.46 48.47
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1475 of 1551
RA4W1
48.
48.43
VOH SCKn
tSPCKWH
VIH SCKn
(n = 0, 1, 4, 9)
tSPCKWH
tSPCKr
VOH
VOL
VOL
tSPCKWL
VOH tSPcyc
tSPCKf
VOH
VOL
tSPCKr
VIH
VIL
VIL
tSPCKWL
VIH tSPcyc
tSPCKf
VIH VIL
VOH = 0.7 � VCC, VOL = 0.3 � VCC, VIH = 0.7 � VCC, VIL = 0.3 � VCC
SCI SPI
SCKn CKPOL = 0
SCKn CKPOL = 1
MISOn
MOSIn (n = 0, 1, 4, 9)
tSU
tH
MSB IN tDr, tDf
MSB OUT
DATA tOH
DATA
LSB IN tOD
LSB OUT
48.44
SCI SPI CKPH = 1
IDLE
MSB IN MSB OUT
SCKn CKPOL = 1
SCKn CKPOL = 0
MISOn
MOSIn (n = 0, 1, 4, 9)
tSU
tH
MSB IN
tOH
tOD
MSB OUT
DATA DATA
LSB IN tDr, tDf
LSB OUT
48.45
SCI SPI CKPH = 0
IDLE
MSB IN MSB OUT
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1476 of 1551
RA4W1
SSn
SCKn CKPOL = 0 SCKn CKPOL = 1
MISOn
MOSIn (n = 0, 1, 4, 9)
tLEAD
tTD tLAG
tSA
tOH
MSB OUT
tSU
tH
MSB IN
tOD
tREL
DATA
LSB OUT
tDr, tDf
MSB IN
DATA
LSB IN
48.46
SCI SPI CKPH = 1
SSn
SCKn CKPOL = 1 SCKn CKPOL = 0
MISOn
MOSIn (n = 0, 1, 4, 9)
tLEAD
tTD tLAG
tSA
tOH
tOD
LSB OUT (Last data)
MSB OUT
tSU
tH
MSB IN
DATA
tDr, tDf
DATA
tREL
LSB OUT
LSB IN
48.47
SCI SPI CKPH = 0
48.
MSB OUT MSB IN
MSB OUT MSB IN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1477 of 1551
RA4W1
48.
48.36
SCI 3
VCC = 2.73.6V
IIC
SDA SDA SDA
SCLSDA
IIC
SDA
SDA
SDA
SCLSDA
tSr tSf tSP tSDAS tSDAH Cb 2 tSr tSf tSP tSDAS tSDAH Cb 2
Min -- -- 0 250 0 -- -- -- 0 100 0 --
1. 2.
tIICcycSMR.CKS[1:0] Cb
Max
1000
ns 48.48
300
ns
4 � tIICcyc1 ns
--
ns
--
ns
400
pF
300
ns
300
ns
4 � tIICcyc1 ns
--
ns
48.48 PmnPFS.DSCR
--
ns
400
pF
VIH SDAn
VIL
tSr
tSf
SCLn
P1 (n = 0, 1, 4, 9)
S1
tSDAH
1.
S, P, Sr S P Sr
48.48
SCI IIC
tSP
Sr1
tSDAS
VIH = VCC � 0.7, VIL = VCC � 0.3 VOL = 0.6V, IOL = 6mA
P1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1478 of 1551
RA4W1
48.3.9 SPI
48.
48.37
SPI (1/2)
PmnPFS
SPI RSPCK
RSPCK
High
RSPCK Low
RSPCK
2.7V 2.4V 1.8V
2.4V
1.8V
RSPCK PCLKA/2
RSPCK
SSL
1.8V
SSL
2.7V
2.4V
1.8V
2.7V
2.4V
1.8V
MOSIMISO
SSL
2.7V 2.4V 1.8V
2.7V 2.4V 1.8V
tSPcyc tSPCKWH
tSPCKWL
Min
2 4 6 (tSPcyc - tSPCKr - tSPCKf) / 2 - 3 3 � tPcyc (tSPcyc - tSPCKr - tSPCKf) / 2 - 3 3 � tPcyc
Max 4096 4096 --
-- --
--
tSPCKr,
--
10
tSPCKf
--
15
--
20
--
1
tSU
10
--
10
--
15
--
tHF
0
--
tH
tPcyc
--
tH tLEAD tLAG tOD
tOH tTD tDr, tDf
tSSLr, tSSLf
20
--
-30 + N � tSpcyc2 --
6 � tPcyc
--
-30 + N � tSpcyc3 --
6 � tPcyc
--
--
14
--
20
--
25
--
50
--
60
--
85
0
--
0
--
tSPcyc + 2 � tPcyc
6 � tPcyc --
8 � tSPcyc + 2 � tPcyc 10
--
15
--
20
--
1
--
10
--
15
--
20
--
1
1
tPcyc
48.49
ns
ns
ns
�s
ns
48.50
48.55
ns
ns
ns
48.50
48.55
ns ns ns
�s ns
�s
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1479 of 1551
RA4W1
48.37
SPI (2/2)
PmnPFS
Min
SPI
2.4V
tSA
--
1.8V
--
2.4V
tREL
--
1.8V
--
1.
2. 3. 4.
tPcycPCLKA N SPCKD 1 8 N SSLND 1 8 RSPCK 16MHz
48.
Max
2 � tPcyc + 100 2 � tPcyc + 140 2 � tPcyc + 100 2 � tPcyc + 140
1
ns
ns
48.54 48.55
48.49
RSPCKn
VOH
tSPCKWH
VIH RSPCKn
tSPCKWH
tSPCKr
VOH
VOL
VOL
tSPCKWL
VOH tSPcyc
tSPCKf
VOH
VOL
tSPCKr
VIH
VIL
VIL
tSPCKWL
VIH tSPcyc
tSPCKf
VIH VIL
n = AB
VOH = 0.7 � VCC, VOL = 0.3 � VCC, VIH = 0.7 � VCC, VIL = 0.3 � VCC
SPI
SSLn0 SSLn3
RSPCKn CPOL = 0 RSPCKn CPOL = 1
MISOn
MOSIn
tLEAD
tSU
tH
MSB IN
DATA
tDr, tDf MSB OUT
tOH DATA
n = AB
.
SSLB2
tLAG
tTD tSSLr, tSSLf
LSB IN tOD
LSB OUT
IDLE
MSB IN MSB OUT
48.50
SPI CPHA = 0PCLKA 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1480 of 1551
RA4W1
48.
SSLn0 SSLn3
RSPCKn CPOL = 0
RSPCKn CPOL = 1
tLEAD
tSU
tHF
MISOn
MOSIn
MSB IN tDr, tDf
MSB OUT
DATA tOH
DATA
n = AB
.
SSLB2
tLAG
tHF LSB IN tOD LSB OUT
tTD tSSLr, tSSLf
IDLE
48.51
SPI CPHA = 0PCLKA 2
MSB IN MSB OUT
SSLn0 SSLn3
RSPCKn CPOL = 0
RSPCKn CPOL = 1
MISOn
MOSIn
tLEAD
tSU
tH
MSB IN
tOH
tOD
MSB OUT
n = AB
.
SSLB2
DATA DATA
tLAG
tTD tSSLr, tSSLf
LSB IN tDr, tDf
LSB OUT
IDLE
MSB IN MSB OUT
48.52
SPI CPHA = 1PCLKA 2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1481 of 1551
RA4W1
48.
SSLn0 SSLn3
RSPCKn CPOL = 0
RSPCKn CPOL = 1
MISOn
MOSIn
tLEAD
tSU
tHF
MSB IN
tOH
tOD
MSB OUT
n = AB
.
SSLB2
DATA DATA
tLAG
tTD tSSLr, tSSLf
tH LSB IN
tDr, tDf LSB OUT
IDLE
MSB IN MSB OUT
48.53
SPI CPHA = 1PCLKA 2
SSLn0
RSPCKn CPOL = 0 RSPCKn CPOL = 1
MISOn
MOSIn
tLEAD
tSA
tOH
MSB OUT
tSU
tH
MSB IN
n = AB
.
SSLB2
tTD tLAG
tOD
tREL
DATA
LSB OUT
tDr, tDf
MSB IN
DATA
LSB IN
48.54
SPI CPHA = 0
MSB OUT MSB IN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1482 of 1551
RA4W1
SSLn0
RSPCKn CPOL = 0 RSPCKn CPOL = 1
MISOn
MOSIn
tLEAD
tTD tLAG
tSA
tOH
tOD
LSB OUT (Last data)
MSB OUT
tSU
tH
DATA tDr, tDf
tREL LSB OUT
MSB IN
DATA
LSB IN
n = AB
.
SSLB2
48.55
SPI CPHA = 1
48.
MSB OUT MSB IN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1483 of 1551
RA4W1
48.3.10 IIC
48.
48.38
IIC
VCC = 2.73.6V
IIC
SMBus
SCL SCL High SCL Low SCLSDA
SCLSDA
SCLSDA
SDA
SDA
START
START
START
STOP
SCLSDA
IIC
SCL
SCL High
SCL Low
SCLSDA
SCLSDA SCLSDA
SDA
SDA
START
START
START
STOP
SCLSDA
tSCL tSCLH tSCLL tSr tSf tSP
tBUF
tBUF
tSTAH
tSTAH
tSTAS tSTOS tSDAS tSDAH Cb tSCL tSCLH tSCLL tSr tSf tSP tBUF
tBUF
tSTAH
tSTAH
tSTAS tSTOS tSDAS tSDAH Cb
Min 1 6(12) � tIICcyc + 1300 3(6) � tIICcyc + 300 3(6) � tIICcyc + 300 -- -- 0
Max -- -- -- 1000 300 1(4) � tIICcyc
ns 48.56 ns ns ns ns ns
3(6) � tIICcyc + 300
--
ns
3(6) � tIICcyc + 4 � tPcyc --
ns
+ 300
tIICcyc + 300
--
ns
1(5) � tIICcyc + tPcyc + 300 1000 1000 tIICcyc + 50 0 -- 6(12) � tIICcyc + 600 3(6) � tIICcyc + 300 3(6) � tIICcyc + 300 -- -- 0 3(6) � tIICcyc + 300
--
ns
--
ns
--
ns
--
ns
--
ns
400
pF
--
ns
--
ns
--
ns
300
ns
300
ns
1(4) � tIICcyc ns
--
ns
48.56
PmnPFS. DSCR
3(6) � tIICcyc + 4 � tPcyc --
ns
+ 300
tIICcyc + 300
--
ns
1(5) � tIICcyc + tPcyc + --
ns
300
300
--
ns
300
--
ns
tIICcyc + 50 0
--
ns
--
ns
--
400
pF
. 1.
tIICcycIIC IICtPcycPCLKB ICFER.NFE 1 ICMR3.NF[1:0] 11b
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1484 of 1551
RA4W1
48.
SDA0, SDA1
tBUF
VIH VIL
tSTAH
tSCLH
SCL0, SCL1
1.
P
1
S
1
tSf
tSCLL tSr
tSCL
tSDAH
S, P, Sr S P Sr
48.56
I2C
tSTAS
Sr
1
tSP
tSTOS
tSDAS
P
1
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1485 of 1551
RA4W1
48.3.11 CLKOUT
48.
48.39
CLKOUT
CLKOUT
CLKOUT_RF
3
CLKOUT 1
CLKOUT High 2
CLKOUT Low 2
CLKOUT
CLKOUT
CLKOUT_RF CLKOUT_RF High CLKOUT_RF Low CLKOUT_RF CLKOUT_RF
VCC = 2.7V VCC = 1.8V VCC = 2.7V VCC = 1.8V VCC = 2.7V VCC = 1.8V VCC = 2.7V VCC = 1.8V VCC = 2.7V VCC = 1.8V
tCcyc
tCH
tCL
tCr
tCf
tCRFcyc tCRFH tCRFL tCRFr tCRFf
Min 62.5 125 15 30 15 30 -- -- -- -- 250 100 100
Max -- -- -- -- -- -- 12 25 12 25
5 5
1
ns
48.57
ns
ns
ns
ns
ns
48.58
ns
ns
ns
ns
1. 2. 3.
EXTAL 1 CKOCR.CKOSEL[2:0] = 011b CKOCR.CKODIV[2:0] = 000b CLKOUT 45 55 MOCO CKOCR.CKOSEL[2:0] 001b 2 CKOCR.CKODIV[2:0] 001b CLKOUT_RF VCC_RF 3.0V 3.6V
48.57
tCcyc
tCH
tCf
CLKOUT
tCL
tCr
VOH = VCC � 0.7, VOL = VCC � 0.3, IOH = -1.0mA, IOL = 1.0mA, C = 30pF
CLKOUT
vOH CLKOUT_RF
tCRFH
tCRFcyc tCRFf
vOL tCRFL
tCRFr
VOH = VCC_RF � 0.8 , VOL = VCC_RF � 0.2 . CLKOUT_RFVCC_RF3.0V3.6V
48.58
CLKOUT_RF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1486 of 1551
RA4W1
48.4 USB 48.4.1 USBFS
48.
48.40
USB
VCC = VCC_USB = 3.0 3.6VTa = -20 +85 USBCLKSEL = 1
Min
High
VIH
2.0
Low
VIL
--
VDI
0.2
VCM
0.8
High
VOH
2.8
Low
VOL
0.0
VCRS
1.3
FS tr
4
LS
75
FS tf
4
LS
75
FS tr/tf
90
LS
80
ZDRV
28
Max -- 0.8 -- 2.5 VCC_USB 0.3 2.0 20 300 20 300 111.11 125 44
VBUS
VBUS
Ver 1.2
D+ D- DCD D+ D-
VIH VIL RPD RPUI RPUA IDP_SINK IDM_SINK IDP_SRC VDAT_REF VDP_SRC VDM_SRC
VCC � 0.8 -- 14.25 0.9 1.425 25 25 7 0.25 0.5 0.5
-- VCC � 0.2 24.80 1.575 3.09 175 175 13 0.4 0.7 0.7
V V V V V V V ns
--
--
| USB_DP - USB_DM |
--
IOH = -200A IOL = 2mA 48.59 48.60 48.61
ns
V
--
V
--
k --
k
k
A --
A --
A --
V
--
V
= 250A
V
= 250A
48.59
USB_DP, VCRS
USB_DM
10%
90%
tr
USB_DP USB_DM
90%
10%
tf
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1487 of 1551
RA4W1
DP
50pF
DM
50pF
48.60
FS
DP DM
48.61
LS
200pF 600pF
3.6V 1.5K
200pF 600pF
48.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1488 of 1551
RA4W1
48.5 ADC14
48.
VREFH0
4.0 3.6
3.5
3.0 2.7
2.5 2.4
2.0
2.4 2.7
2.0
2.5
3.0
3.6
3.5
4.0
ADCSR.ADHSC = 0
VREFH0
A/D (1) A/D (2)
AVCC0
4.0 3.6
3.5
3.0
2.7 2.5
2.4
2.0 1.8
1.8 2.0
2.4 2.7
2.5
3.0
3.6
3.5
4.0
ADCSR.ADHSC = 1
A/D (3) A/D (4) A/D (5) AVCC0
48.62
AVCC0 VREFH0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1489 of 1551
RA4W1
48.
48.41
A/D A/D 1
VCC = AVCC0 = 2.7 3.6VVREFH0 = 2.7V 3.6V
VREFH0VREFL0
Min
Typ
1
--
2
Cs
--
--
--
--
Rs
--
--
--
--
Ain
0
--
12
--
--
1
0.94
--
Max = 0.3k
PCLKC = 48MHz
1.50
--
Max
48
8 9 2.5 6.7 VREFH0
MHz pF pF k k V
12
--
s
--
s
DNL INL 14 1 PCLKC = 48MHz
-- -- -- -- -- -- -- -- --
-- 1.06 Max = 0.3k
1.63
� 0.5
� 0.75
� 0.5 � 1.25
� 1.0 � 1.0
� 4.5 � 6.0 � 4.5 � 6.0 -- � 5.0 � 8.0 -- � 3.0
--
14
--
--
--
--
LSB LSB LSB LSB LSB LSB LSB LSB LSB
s
s
DNL INL
--
� 2.0
� 18
LSB
--
� 24.0
LSB
--
� 3.0
� 18
LSB
--
� 24.0
LSB
--
� 0.5
--
LSB
--
� 5.0
� 20
LSB
--
� 32.0
LSB
--
� 4.0
--
LSB
--
� 4.0
� 12.0
LSB
--
--
-- ADCSR.ADHSC = 0 ADSSTRn.SST[7:0] = 0Dh ADCSR.ADHSC = 0 ADSSTRn.SST[7:0] = 28h -- -- --
-- ADCSR.ADHSC = 0 ADSSTRn.SST[7:0] = 0Dh ADCSR.ADHSC = 0 ADSSTRn.SST[7:0] = 28h -- -- --
1. 2.
14 A/D DNL INL
I/O Cin48.2.4I/O VOHVOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1490 of 1551
RA4W1
48.
48.42
A/D A/D 2
VCC = AVCC0 = 2.4 3.6VVREFH0 = 2.4V 3.6V
VREFH0VREFL0
Min
Typ
1
--
2
Cs
--
--
--
--
Rs
--
--
--
--
Ain
0
--
12
--
--
1
1.41
--
Max = 1.3k
PCLKC = 32MHz
2.25
--
Max
32
8 9 2.5 6.7 VREFH0
MHz pF pF k k V
12
--
s
--
s
DNL INL 14 1 PCLKC = 32MHz
-- -- -- -- -- -- -- -- --
-- 1.59 Max = 1.3k
2.44
� 0.5
� 0.75
� 0.5 � 1.25
� 1.0 � 1.0
� 4.5 � 6.0 � 4.5 � 6.0 -- � 5.0 � 8.0 -- � 3.0
--
14
--
--
--
--
LSB LSB LSB LSB LSB LSB LSB LSB LSB
s
s
DNL INL
--
� 2.0
� 18
LSB
--
� 24.0
LSB
--
� 3.0
� 18
LSB
--
� 24.0
LSB
--
� 0.5
--
LSB
--
� 5.0
� 20
LSB
--
� 32.0
LSB
--
� 4.0
--
LSB
--
� 4.0
� 12.0
LSB
--
--
-- ADCSR.ADHSC = 0 ADSSTRn.SST[7:0] = 0Dh ADCSR.ADHSC = 0 ADSSTRn.SST[7:0] = 28h -- -- --
-- ADCSR.ADHSC = 0 ADSSTRn.SST[7:0] = 0Dh ADCSR.ADHSC = 0 ADSSTRn.SST[7:0] = 28h -- -- --
1. 2.
14 A/D DNL INL
I/O Cin48.2.4I/O VOHVOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1491 of 1551
RA4W1
48.
48.43
A/D A/D 3
VCC = AVCC0 = 2.7 3.6VVREFH0 = 2.7V 3.6V
VREFH0VREFL0
Min
Typ
Max
1
--
24
2
Cs
--
--
8
--
--
9
Rs
--
--
2.5
--
--
6.7
Ain
0
--
VREFH0
12
--
--
12
1
2.25
--
--
Max = 1.1k
PCLKC = 24MHz
3.38
--
--
MHz pF pF k k V
s
s
DNL INL 14 1 PCLKC = 24MHz
-- -- -- -- -- -- -- -- --
-- 2.50 Max = 1.1k
3.63
� 0.5
� 0.75
� 0.5 � 1.25
� 1.0 � 1.0
� 4.5 � 6.0 � 4.5 � 6.0 -- � 5.0 � 8.0 -- � 3.0
--
14
--
--
--
--
LSB LSB LSB LSB LSB LSB LSB LSB LSB
s
s
DNL INL
--
� 2.0
� 18
LSB
--
� 24.0
LSB
--
� 3.0
� 18
LSB
--
� 24.0
LSB
--
� 0.5
--
LSB
--
� 5.0
� 20
LSB
--
� 32.0
LSB
--
� 4.0
--
LSB
--
� 4.0
� 12.0
LSB
--
--
-- ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 0Dh ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 28h -- -- --
-- ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 0Dh ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 28h -- -- --
1. 2.
14 A/D DNL INL
I/O Cin48.2.4I/O VOHVOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1492 of 1551
RA4W1
48.
48.44
A/D A/D 4
VCC = AVCC0 = 2.4 3.6VVREFH0 = 2.4V 3.6V
VREFH0VREFL0
Min
Typ
Max
1
--
16
2
Cs
--
--
8
--
--
9
Rs
--
--
2.5
--
--
6.7
Ain
0
--
VREFH0
12
--
--
12
1
3.38
--
--
Max = 2.2k
PCLKC = 16MHz
5.06
--
--
MHz pF pF k k V
s
s
DNL INL 14 1 PCLKC = 16MHz
-- -- -- -- -- -- -- -- --
-- 3.75 Max = 2.2k
5.44
� 0.5
� 0.75
� 0.5 � 1.25
� 1.0 � 1.0
� 4.5 � 6.0 � 4.5 � 6.0 -- � 5.0 � 8.0 -- � 3.0
--
14
--
--
--
--
LSB LSB LSB LSB LSB LSB LSB LSB LSB
s
s
DNL INL
--
� 2.0
� 18
LSB
--
� 24.0
LSB
--
� 3.0
� 18
LSB
--
� 24.0
LSB
--
� 0.5
--
LSB
--
� 5.0
� 20
LSB
--
� 32.0
LSB
--
� 4.0
--
LSB
--
� 4.0
� 12.0
LSB
--
--
-- ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 0Dh ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 28h -- -- --
-- ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 0Dh ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 28h -- -- --
1. 2.
14 A/D DNL INL
I/O Cin48.2.4I/O VOHVOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1493 of 1551
RA4W1
48.
48.45
A/D A/D 5
VCC = AVCC0 = 1.8 3.6VVCC 2.0V AVCC0 = VCCVREFH0 = 1.8 3.6V
VREFH0VREFL0
Min
Typ
Max
1
--
8
MHz
2
Cs
--
--
8
pF
--
--
9
pF
Rs
--
--
3.8
k
--
--
8.2
k
Ain
0
--
VREFH0
V
12
--
--
12
1
6.75
--
--
Max = 5k
PCLKC = 8MHz
10.13
--
--
s
s
DNL INL 14 1 PCLKC = 8MHz
-- -- -- -- -- -- -- -- --
-- 7.50 Max = 5k
10.88
� 1.0
� 1.5
� 0.5 � 3.0
� 1.0 � 1.0
-- --
--
� 7.5 � 10.0 � 7.5 � 10.0 -- � 8.0 � 12.0 -- � 3.0
14 --
--
LSB LSB LSB LSB LSB LSB LSB LSB LSB
s
s
DNL INL
--
� 4.0
� 30.0
LSB
--
� 40.0
LSB
--
� 6.0
� 30.0
LSB
--
� 40.0
LSB
--
� 0.5
--
LSB
--
� 12.0
� 32.0
LSB
--
� 48.0
LSB
--
� 4.0
--
LSB
--
� 4.0
� 12.0
LSB
--
--
-- ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 0Dh ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 28h -- -- --
-- ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 0Dh ADCSR.ADHSC = 1 ADSSTRn.SST[7:0] = 28h -- -- --
1. 2.
14 A/D DNL INL
I/O Cin48.2.4I/O VOHVOL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1494 of 1551
RA4W1
48.
MCU
ANn
Rs
Cin
ANn
Rs Cin
ADC Cs
48.63
48.46
14 A/D
AN004 AN006, AN009, AN010
AN017, AN019, AN020
AVCC0 = 1.8 3.6V
AVCC0 = 2.0 3.6V AVCC0 = 2.0 3.6V
A/D AN004AN006, AN009, AN010 IRQ3TS
--
--
48.47
A/D
VCC = AVCC0 = VREFH0 = 2.0 3.6V1
Min
Typ
Max
2 1.36
1.43
1.50
V
--
3
1
--
2
MHz
--
4
5.0
--
--
s
--
1. 2. 3. 4.
AVCC0 2.0V 14 A/D 14 A/D ADC14 ADC14 ADC14
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1495 of 1551
RA4W1
48.
3FFFh
A/D
INL A/D
A/D
A/D
DNL A/D 1LSB
DNL
A/D 1LSB
0000h 0
VREFH0
48.64
14 A/D
A/D A/D A/D 1LSB 12 VREFH0 = 3.072V 1LSB 0.75mV 0mV0.75mV1.5mV � 5 LSB 6mV A/D 008h A/D 003h 00Dh
INL
DNL
A/D 1LSB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1496 of 1551
RA4W1
48.6 DAC12
48.48
D/A 1
VCC = AVCC0 = 1.8 3.6V
= AVCC0 AVSS0
DNL INL
48.49
D/A 2
VCC = AVCC0 = 1.8 3.6V
=
Vbgr
DNL INL
Min -- 30 -- 0.35 -- -- -- -- -- --
Typ -- -- -- -- � 0.5 � 2.0 -- -- 5 --
Max 12 -- 50 AVCC0 - 0.47 � 2.0 � 8.0 � 30 � 30 -- 30
Min -- 1.36 30 -- 0.35 -- -- -- -- --
Typ -- 1.43 -- -- -- � 2.0 � 8.0 -- 5 --
Max 12 1.50 -- 50 Vbgr � 16.0 � 16.0 � 30 -- 30
48.
k pF V LSB LSB mV mV s
-- -- -- -- -- -- -- -- -- --
V k pF V LSB LSB mV s
-- -- -- -- -- -- -- -- -- --
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1497 of 1551
RA4W1
48.
INL
D/A 1LSB
DNL
1
D/A
000h
D/A
FFFh
1. D/A
48.65
D/A
INL
DNL D/A 1LSB
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1498 of 1551
RA4W1
48.7 TSN
48.
48.50
TSN
VCC = AVCC0 = 2.0 3.6V
25
-- -- -- -- tSTART --
Min -- -- -- -- -- 5
Typ � 1.5 � 2.0 -3.65 1.05 -- --
Max -- -- -- -- 5 --
mV/ V s s
2.4V 2.4V -- VCC = 3.3V -- --
48.8 OSC
48.51
tdr
Min --
Typ --
Max 1
ms
48.66
tdr
OSTDSR.OSTDF MOCO ICLK
48.66
OSTDSR.OSTDF
PLL
MOCO ICLK
tdr
PLL
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1499 of 1551
RA4W1
48.9 POR/LVD
48.
48.52
1
1 POR
VPOR
Min 1.27
1. 2.
3.
LVD0 2 LVD1 3
Vdet0_1 Vdet0_2 Vdet0_3 Vdet1_4 Vdet1_5 Vdet1_6 Vdet1_7 Vdet1_8 Vdet1_9 Vdet1_A Vdet1_B Vdet1_C Vdet1_D Vdet1_E Vdet1_F
2.68 2.38 1.78 2.98 2.89 2.79 2.68 2.58 2.48 2.38 2.10 1.84 1.74 1.63 1.60
Vdet0_# # OFS1.VDSEL1[2:0] Vdet1_# # LVDLVLR.LVD1LVL[4:0]
Typ 1.42
2.85 2.53 1.90 3.10 3.00 2.90 2.79 2.68 2.58 2.48 2.20 1.96 1.86 1.75 1.65
Max 1.57
2.96 2.64 2.02 3.22 3.11 3.01 2.90 2.78 2.68 2.58 2.30 2.05 1.95 1.84 1.73
V
V
48.67 48.68
48.69 VCC
V
48.70
VCC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1500 of 1551
RA4W1
48.
48.53
2
LVD0 LVD0
Min
Typ
Max
tPOR
--
1.7
--
ms
--
tPOR
--
1.3
--
ms
--
01 LVD01 tLVD0,1
--
LVD02 tLVD1
--
0.6
--
0.2
--
ms
--
ms
--
3
VCC
LVD LVD POR LVD0, LVD1
tdet
--
--
350
s
48.67
48.68
tVOFF
450
--
--
s
48.67
VCC = 1.0V
tW (POR)
1
--
--
ms
48.68
VCC = 1.0V
td (E-A)
--
--
300
s
48.70
VPORH
--
110
--
mV
--
VLVH
--
60
--
mV
LVD0
--
60
--
--
50
--
--
40
--
Vdet1_4 Vdet1_9 Vdet1_A Vdet1_B Vdet1_C Vdet1_F
1. 2. 3.
OFS1.LVDAS = 0 OFS1.LVDAS = 1 VCC VCC POR/LVD VPORVdet0Vdet1 min
VCC VPOR 1.0V
tVOFF
Low
48.67
tdet
tdet tPOR
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1501 of 1551
RA4W1
48.
VCC
VPOR
1.0V
Low
tw(POR)
1
tdet tPOR
1. tw(POR) VCC 1.0V tw(POR) 1.0ms
48.68
VCC
Vdet0
tVOFF
VLVH
48.69
Low
tdet
Vdet0
tdet
tLVD0
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1502 of 1551
RA4W1
VCC
Vdet1
tVOFF
VLVH
48.70
LVCMPCR.LVD1E
LVD1
LVD1CR0.CMPE
LVD1SR.MON Low LVD1CR0.RN = 0
LVD1CR0.RN = 1
td(E-A)
Vdet1
tdet
tdet
tLVD1
tLVD1
48.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1503 of 1551
RA4W1
48.10 VBATT
48.
48.54
VCC = AVCC0 = 1.8V 3.6VVBATT = 1.6 3.6V
VCC
VBATT VBATT_POR
VBATT_POR
VBATT
VBTLVDLVL[1:0] = 10b VBTLVDLVL[1:0] = 11b
VBATT LVD
VBATT LVD
VBATT LVD
VBATTVCC
VDETBATT VVBATTH tVOFFBATT VVBATPOR
tVBATPOR VDETBATLVD
VVBATLVDTH td_vbat tdet_vbat dt/dVCC V_BKBATT
Min 1.99 -- 300 1.30
-- 2.11 1.92 -- -- -- 1.0 1.8
Typ 2.09 100 -- 1.40
-- 2.2 2 50 -- -- -- --
Max 2.19 -- -- 1.50
3 2.29 2.08 -- 300 350 -- --
V mV s V
ms V V mV s s ms/V V
48.71 48.72 -- 48.71 48.72 -- 48.73
48.73
-- --
.
VCC VCC VDETBATT min
VCC
Vdet0
VDETBATT VPOR
VVBATH
VLVH
VBATT
VVBATPOR
Low
tdet VCC
VBATT
48.71
LVD0
tdet tLVD0 VCC
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1504 of 1551
RA4W1
48.
VCC
VDETBATT
VVBATH
VBATT
VVBATPOR
VBATT_POR Low
VCC
VBATT
48.72
VBATT_POR
tVBATPOR VCC
VBATT
VDETBATLVD
VVBATLVDTH
48.73
VBTCR2.VBTLVDEN
VBATT LVD
VBTCMPCR.VBTCMPE
td_vbat
VBTSR.VBTBLDF
tdet_vbat
VBATT
tdet_vbat
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1505 of 1551
RA4W1
48.
48.55
VBATT I/O
VBATWIOn I/O n = 0
VCC VDETBATT VCC = 2.7 3.6V
VCC = VDETBATT 2.7V
VCC VDETBATT VBATT = 2.7 3.6V
VBATT = 1.8 2.7V
VOH VOL VOH VOL VOH VOL VOH VOL
Min VCC - 0.5 -- VCC - 0.3 -- VBATT - 0.5 -- VBATT - 0.3 --
Typ -- -- -- -- -- -- -- --
Max -- 0.5 -- 0.3 -- 0.5 -- 0.3
V
IOH = -100�A IOL = 100�A IOH = -50�A IOL = 50�A IOH = -100�A IOL = 100�A IOH = -50�A IOL = 50�A
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1506 of 1551
RA4W1
48.11 CTSU
48.56
CTSU
VCC = AVCC0 = 1.8 3.6V
TSCAP TS
48.
Ctscap Cbase IoH
Min 9 -- --
Typ 10 -- --
Max 11 50 -24
nF pF mA
-- --
48.12 LCD
48.12.1
48.57
LCD 1
VL4 VCC 3.6V
LCD
1/2 1/4
48.58
LCD 2
VL4 VCC 3.6V
LCD
1/3
48.59
LCD 3
VL4 VCC 3.6V
LCD
VL4
VL4
VL4
Min 2.0
Min 2.7
Min 2.5
Typ --
Typ --
Typ --
Max VCC
Max VCC
Max VCC
V
V
V
--
--
--
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1507 of 1551
RA4W1
48.13
48.
48.60
ACMPLP
VCC = 1.83.6V
2
IVREFn (n = 0, 1)
IVREF1
IVREF0
1
Min VREF 0
Typ --
Max
VCC - 1.4 V
--
VREFH VREFL VI -- Td
-- -- -- Tcmp
1.4 0 0 1.36 -- -- -- -- -- -- 100
-- -- -- 1.44 -- -- -- -- -- -- --
VCC
V
VCC - 1.4 V
VCC
V
1.50
V
1.2
s
5
s
2
s
50
mV
40
mV
60
mV
--
s
-- -- -- -- VCC = 3.0 50mV/s
-- -- -- --
1. 2.
8 DAC 2.5 � VCC/256 IVREF1 - IVREF0 0.2V
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1508 of 1551
RA4W1
48.14 OPAMP
48.
48.61
OPAMP
VCC = AVCC0 = 1.8 3.6VVCC 2.0V AVCC0 = VCC
Vicm1 Vicm2 Vo1 Vo2
GB
Vioff Av GBW1 GBW2
PM GM Vnoise1 Vnoise2
Vnoise3
Vnoise4
PSRR CMRR
Tstd1 Tstd2
Tstd3
Tstd4
Tset1 Tset2
Tslew1 Tslew2
Iload1 Iload2
CL
3
CL = 20pF CL = 20pF f = 1kHz f = 10kHz f = 1kHz f = 2kHz
CL = 20pF 1
CL = 20pF CL = 20pF
CL = 20pF
1.
Min 0.2 0.3 0.1 0.1 -10 60 -- -- 50 10 -- -- -- -- -- --
Typ -- -- -- -- -- 120 0.04 1.7 -- -- 230 200 90 70 90 90
Max AVCC0 - 0.5 AVCC0 - 0.6 AVCC0 - 0.1 AVCC0 - 0.1 10 -- -- -- -- -- -- -- -- -- -- --
V V V V mV dB MHz MHz deg dB nV/ Hz nV/ Hz nV/ Hz nV/ Hz dB dB
650
--
--
13
--
--
650
--
--
13
--
--
--
--
750
--
--
13
--
0.02
--
--
1.1
--
-100
--
100
-100
--
100
--
--
20
s s s s s s V/s V/s A A pF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1509 of 1551
RA4W1
48.15 48.15.1
48.
48.62
1
1 1000 NPEC
NPEC tDRP
Min 1000 202 3
Typ -- --
Max -- --
-- Ta = +85
1.
2. 3.
n n = 1000 n 2KB 8 256 1 1
48.63
2
High-speed
VCC = 2.73.6V
8 2KB
8 2KB
OCD ID 1 2
tP8 tE2K tBC8 tBC2K tSED tSAS tAWS tOSIS
tDIS tMS
FCLK = 1MHz
Min
Typ
Max
--
116
998
--
9.03
287
--
--
56.8
--
--
1899
--
--
22.5
--
21.7
585
--
21.7
585
--
21.7
585
2
--
--
5
--
--
FCLK = 32MHz
Min
Typ
Max
--
54
506
--
5.67
222
--
--
16.6
--
--
140
--
--
10.7
--
12.1
447
--
12.1
447
--
12.1
447
2
--
--
5
--
--
s ms s s s ms ms ms
s s
.
.
FCLK 1MHz FCLK 4MHz
1MHz2MHz3MHz 1.5MHz
.
FCLK � 3.5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1510 of 1551
RA4W1
48.
48.64
3
Middle-speed
VCC = 1.83.6VTa = -40 +85
8 2KB
8 2KB
OCD ID 1 2
tP8 tE2K tBC8 tBC2K tSED tSAS tAWS tOSIS tDIS tMS
Min -- -- -- -- -- -- -- -- 2 720
FCLK = 1MHz
Typ
Max
157
1411
9.10
289
--
87.7
--
1930
--
32.7
22.5
592
22.5
592
22.5
592
--
--
--
--
Min -- -- -- -- -- -- -- -- 2 720
FCLK = 8MHz
Typ
Max
101
966
6.10
228
--
52.5
--
414
--
21.6
14.0
464
14.0
464
14.0
464
--
--
--
--
s ms s s s ms ms ms s ns
.
.
FCLK 1MHz FCLK 4MHz
1MHz2MHz3MHz 1.5MHz
.
FCLK � 3.5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1511 of 1551
RA4W1
48.15.2
48.
48.65
1
1
10000 NDPEC 100000 NDPEC 1000000 NDPEC
NDPEC tDDRP
Min 100000 20 23 5 23 --
Typ 1000000 -- -- 1 2 3
Max -- -- -- --
-- Ta = +85
Ta = +25
1.
2. 3.
n n = 100,000 n 1 1 1,000 1 1
48.66
2
High-speed
VCC = 2.73.6V
1 1KB
1 1KB
STOP
tDP1 tDE1K tDBC1 tDBC1K tDSED tDSTOP
Min -- -- -- -- -- 5
FCLK = 4MHz
Typ
Max
52.4
463
8.98
286
--
24.3
--
1872
--
13.0
--
--
FCLK = 32MHz
Min
Typ
Max
--
42.1
387
--
6.42
237
--
--
16.6
--
--
512
--
--
10.7
5
--
--
s ms s s s s
.
.
FCLK 1MHz FCLK 4MHz
1MHz2MHz3MHz 1.5MHz
.
FCLK � 3.5
48.67
3
Middle-speed
VCC = 1.83.6VTa = -40 +85
1 1KB
1 1KB
STOP
tDP1 tDE1K tDBC1 tDBC1K tDSED tDSTOP
Min -- -- -- -- -- 720
FCLK = 4MHz
Typ
Max
94.7
886
9.59
299
--
56.2
--
2.17
--
23.0
--
--
Min -- -- -- -- -- 720
FCLK = 8MHz
Typ
Max
89.3
849
8.29
273
--
52.5
--
1.51
--
21.7
--
--
s ms s ms s ns
.
.
FCLK 1MHz FCLK 4MHz
1MHz2MHz3MHz 1.5MHz
.
FCLK � 3.5
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1512 of 1551
RA4W1
48.16 JTAG
48.
48.68
JTAG1
VCC = 2.43.6V
TCK TCKHigh TCKLow TCK TCK TMS TMS TDI TDI TDO
tTCKcyc tTCKH tTCKL tTCKr tTCKf tTMSS tTMSH tTDIS tTDIH tTDOD
Min 80 35 35 -- -- 16 16 16 16 --
Typ -- -- -- -- -- -- -- -- -- --
Max -- -- -- 5 5 -- -- -- -- 70
ns ns ns ns ns ns ns ns ns ns
48.74
48.75
48.69
JTAG2
VCC = 1.8 2.4V
TCK TCKHigh TCKLow TCK TCK TMS TMS TDI TDI TDO
tTCKcyc tTCKH tTCKL tTCKr tTCKf tTMSS tTMSH tTDIS tTDIH tTDOD
Min 250 120 120 -- -- 50 50 50 50 --
Typ -- -- -- -- -- -- -- -- -- --
Max -- -- -- 5 5 -- -- -- -- 150
ns ns ns ns ns ns ns ns ns ns
48.74
48.75
48.74
TCK
tTCKcyc tTCKH
tTCKf tTCKL
JTAG TCK
tTCKr
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1513 of 1551
RA4W1
TCK TMS TDI TDO
tTMSS
tTMSH
tTDIS
tTDIH
tTDOD
48.75
JTAG
48.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1514 of 1551
RA4W1
48.16.1 SWD
48.
48.70
SWD 1
VCC = 2.43.6V
SWCLK SWCLK High SWCLK Low SWCLK SWCLK SWDIO SWDIO SWDIO
tSWCKcyc tSWCKH tSWCKL tSWCKr tSWCKf tSWDS tSWDH tSWDD
Min 80 35 35 -- -- 16 16 2
Typ -- -- -- -- -- -- -- --
Max -- -- -- 5 5 -- -- 70
ns ns ns ns ns ns ns ns
48.76
48.77
48.71
SWD 2
VCC = 1.8 2.4V
SWCLK SWCLK High SWCLK Low SWCLK SWCLK SWDIO SWDIO SWDIO
tSWCKcyc tSWCKH tSWCKL tSWCKr tSWCKf tSWDS tSWDH tSWDD
Min 250 120 120 -- -- 50 50 2
Typ -- -- -- -- -- -- -- --
Max -- -- -- 5 5 -- -- 150
ns ns ns ns ns ns ns ns
48.76
48.77
48.76
SWCLK
tSWCKcyc tSWCKH
tSWCKf tSWCKL
SWD SWCLK
tSWCKr
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1515 of 1551
RA4W1
SWCLK
SWDIO
SWDIO
SWDIO
SWDIO
48.77
SWD
tSWDS tSWDH
tSWDD tSWDD tSWDD
48.
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1516 of 1551
RA4W1
48.17 BLE 48.17.1
48.
48.72
VCC = VCC_RF = AVCC_RF = 3.3VVSS = VSS_RF = 0VTa = +25
Min
Typ
Max
RFCF
2402
--
RFDATA_2M
--
2
RFDATA_1M
--
1
RFDATA_500k
--
500
RFDATA_125k
--
125
RFPOWER
--
0
--
4
2480 -- -- -- -- 2 6
RFTXFERR
-10
--
10
MHz Mbps Mbps kbps kbps dBm dBm ppm
. 1.
BLE
0dBm 4dBm
1
48.17.2 2Mbps
48.73
VCC = VCC_RF = AVCC_RF = 3.3VVSS = VSS_RF = 0VTa = +25
Min
Typ
Max
RFRXFIN_2M
2402
--
RFLEVL_2M
-10
4
RFSTY_2M
--
-92
RFRXSP_2M
--
-72
--
-54
2480 -- -- -57 -47
MHz dBm dBm dBm dBm
RFCCR_2M
--
-8
--
dB
RFADCR_2M
--
2
--
dB
--
35
--
dB
--
39
--
dB
Blocking
RFBLK_2M
--
--
-1
--
-25
--
dBm dBm
--
-21
--
dBm
--
-10
--
dBm
2 RFRXFER_2M
-120
--
RSSI
RFRSSIS_2M
--
�4
120
ppm
--
dB
. 1. 2.
BLE PER 30.8%, 37byte payload RF
1
1
30MHz 1GHz 1GHz 12GHz Prf = -67dBm1 Prf = -67dBm1
�2MHz �4MHz
�6MHz
Prf = -67dBm1 30MHz 2000MHz
1
2000MHz 2399MHz 2484MHz 3000MHz 3000MHz
-70dBmPrf -10dBm
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1517 of 1551
RA4W1
48.17.3 1Mbps
48.
48.74
VCC = VCC_RF = AVCC_RF = 3.3VVSS = VSS_RF = 0VTa = +25
Min
Typ
Max
RFRXFIN_1M
2402
--
RFLEVL_1M
-10
4
RFSTY_1M
--
-95
RFRXSP_1M
--
-72
--
-54
2480 -- -- -57 -47
MHz dBm dBm dBm dBm
RFCCR_1M
--
-7
--
dB
RFADCR_1M
--
-1
--
dB
--
34
--
dB
--
35
--
dB
Blocking
RFBLK_1M
--
--
0
--
-24
--
dBm dBm
--
-20
--
dBm
--
-4
--
dBm
2 RFRXFER_1M
-120
--
RSSI
RFRSSIS_1M
--
�4
120
ppm
--
dB
. 1. 2.
BLE PER 30.8%, 37byte payload RF
1
1
30MHz 1GHz 1GHz 12GHz Prf = -67dBm1 Prf = -67dBm1
�1MHz �2MHz �3MHz
Prf = -67dBm1
1
30MHz 2000MHz 2000MHz 2399MHz 2484MHz 3000MHz 3000MHz
-70dBmPrf -10dBm
48.17.4 500kbps
48.75
VCC = VCC_RF = AVCC_RF = 3.3VVSS = VSS_RF = 0VTa = +25
Min
Typ
Max
RFRXFIN_500k RFLEVL_500k RFSTY_500k RFRXSP_500k
2402 -10 -- -- --
-- 4 -100 -72 -54
2480 -- -- -57 -47
MHz dBm dBm dBm dBm
RFCCR_500k
--
-4
--
dB
RFADCR_500k
--
6
--
dB
--
36
--
dB
--
42
--
dB
Blocking
RFBLK_500k
--
--
0
--
-23
--
dBm dBm
--
-20
--
dBm
--
-7
--
dBm
2 RFRXFER_500k -120
--
RSSI
RFRSSIS_500k --
�4
120
ppm
--
dB
. 1. 2.
BLE PER 30.8%, 37byte payload RF
1
1
30MHz 1GHz 1GHz 12GHz Prf = -72dBm1 Prf = -72dBm1
�1MHz �2MHz �3MHz
Prf = -72dBm1
1
30MHz 2000MHz 2000MHz 2399MHz 2484MHz 3000MHz 3000MHz
-70dBmPrf -10dBm
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1518 of 1551
RA4W1
48.17.5 125kbps
48.
48.76
VCC = VCC_RF = AVCC_RF = 3.3VVSS = VSS_RF = 0VTa = +25
Min
Typ
Max
RFRXFIN_125k RFLEVL_125k RFSTY_125k RFRXSP_125k
2402 -10 -- -- --
-- 4 -105 -72 -54
2480 -- -- -57 -47
MHz dBm dBm dBm dBm
RFCCR_125k
--
-2
--
dB
RFADCR_125k
--
12
--
dB
--
39
--
dB
--
45
--
dB
Blocking
RFBLK_125k
--
--
0
--
-23
--
dBm dBm
--
-20
--
dBm
--
-1
--
dBm
2 RFRXFER_125k -120
--
RSSI
RFRSSIS_125k --
�4
120
ppm
--
dB
. 1. 2.
BLE PER 30.8%, 37byte payload RF
1
1
30MHz 1GHz 1GHz 12GHz Prf = -79dBm1 Prf = -79dBm1
�1MHz �2MHz �3MHz
Prf = -79dBm1
1
30MHz 2000MHz 2000MHz 2399MHz 2484MHz 3000MHz 3000MHz
-70dBmPrf -10dBm
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1519 of 1551
RA4W1
1.
1.1
(1/2)
P004/IRQ3 P010/IRQ14 P011/IRQ15 P014/DA0
Hi-Z Hi-Z Hi-Z Hi-Z
P015/IRQ7
Hi-Z
P100/RXD0/CMPIN0/KR00/IRQ2/AGTIO0
Hi-Z
P101/CMPREF0/KR01/IRQ1
Hi-Z
P102/CMPIN1/KR02/AGTO0
Hi-Z
P103/CMPREF1/KR03 P104/RXD0/KR04/IRQ1 P105/KR05/IRQ0 P106/KR06 P107/KR07 P108/TMS P109/TDO/CLKOUT
Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z TDO
P110/IRQ3/TDI/VCOUT
P200/NMI P201 P204/SCL0/USB_OVRCURB/AGTIO1
Hi-Z
Hi-Z
P205/USB_OVRCURA/IRQ1/CLKOUT/
Hi-Z
AGTO1
P206/WAIT/IRQ0
Hi-Z
P212/IRQ3/EXTAL
Hi-Z
P213/IRQ2/XTAL
Hi-Z
P214/XCOUT
Hi-Z
P215/XCIN
Hi-Z
R01UH0883JJ0100 Rev.1.00 2020.08.31
1.
OPE = 0
OPE = 1
Keep-O 1
Keep-O 1
Keep-O 1
[DA0 DAOE0 = 1] DA
[DAOE0 = 0] Keep-O
Keep-O 1
AGTIO0 AGTIO0 2
[ ] Keep-O 1
[ ] Keep-O 1
AGTO0 AGTO0 2
[ ] Keep-O 1
[ ] Keep-O 1
[ ] Keep-O 1
[ ] Keep-O 1
[ ] Keep-O 1
[ ] Keep-O 1
Keep-O
CLKOUT CLKOUT [ ] Keep-O
ACMPLP VCOUT [ ] Keep-O 1
Hi-Z
Keep-O
AGTIO1 AGTIO1 2
[ ] Keep-O 1
CLKOUT CLKOUT
AGTO1 AGTO1 2
[ ] Keep-O 1
Keep-O 1
Keep-O 1
Keep-O 1
[ ] Hi-Z
[ ] Hi-Z
Page 1520 of 1551
RA4W1
1.
1.1
(2/2)
OPE = 0
OPE = 1
P300/TCK
Keep-O
P402/RTCIC0/IRQ4
Hi-Z
[ ] Keep-O 1
P404
Hi-Z
Keep-O 1
P407/SDA0/USB_VBUS/RTCOUT/AGTIO0
Hi-Z
RTCOUT RTCOUT
AGTIO0 AGTIO0 2
[ ] Keep-O 1
P409/IRQ6
Hi-Z
Keep-O 1
P414/IRQ9
Hi-Z
Keep-O 1
P501/CMPIN1/USB_OVRCURA/IRQ11/
Hi-Z
AGTOB0
AGTOB0 AGTOB0 2
[ ] Keep-O 1
P914/USB_DP
Hi-Z
Keep-O
P915/USB_DM
Hi-Z
Keep-O
HHigh LLow Hi-Z: Keep-O
.
1. 2.
LCD COM0 COM3 SEG6, SEG9, SEG11, SEG12, SEG20, SEG23, SEG49, SEG52, SEG51LOCO SOSC SLCDSCKCR.LCDSCKSEL[2:0] LCD
LOCO SOSC AGTIO
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1521 of 1551
RA4W1
2.
2.
2.1
56-pin QFN
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1522 of 1551
RA4W1
2.
2.2
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1523 of 1551
RA4W1
3. I/O
3. I/O
I/O
3.1
3.1
3.1
MMPU SMPU SPMON MMF SRAM BUS DMAC0 DMAC1 DMAC2 DMAC3 DMA DTC ICU DBG FCACHE SYSTEM PORT0 PORT1 PORT2 PORT3 PORT4 PORT5 PORT9 PFS PMISC ELC POEG RTC WDT IWDT CAC MSTP CAN0 IIC0 IIC1 DOC ADC140
(1/2)
MPU MPU CPU SRAM 0 1 2 3 DMAC 0 1 2 3 4 5 9 Pmn GPT BCD CAN0 Inter-Integrated Circuit 0 Inter-Integrated Circuit 1 14 A/D
0x40000000 0x40000C00 0x40000D00 0x40001000 0x40002000 0x40003000 0x40005000 0x40005040 0x40005080 0x400050C0 0x40005200 0x40005400 0x40006000 0x4001B000 0x4001C000 0x4001E000 0x40040000 0x40040020 0x40040040 0x40040060 0x40040080 0x400400A0 0x40040120 0x40040800 0x40040D00 0x40041000 0x40042000 0x40044000 0x40044200 0x40044400 0x40044600 0x40047000 0x40050000 0x40053000 0x40053100 0x40054100 0x4005C000
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1524 of 1551
RA4W1
3. I/O
3.1
(2/2)
DAC12 SCI0 SCI1 SCI4 SCI9 SPI0 SPI1 CRC GPT320 GPT321 GPT322 GPT323 GPT164 GPT165 GPT168 GPT_OPS KINT CTSU SLCDC AGT0 AGT1 ACMPLP OPAMP USBFS DAC8 FLCN TSN
12 D/A 0 1 4 9 0 1 CRC PWM 032 PWM 132 PWM 232 PWM 332 PWM 416 PWM 516 PWM 816 LCD 0 1 USB2.0 8 D/A I/O
0x4005E000 0x40070000 0x40070020 0x40070080 0x40070120 0x40072000 0x40072100 0x40074000 0x40078000 0x40078100 0x40078200 0x40078300 0x40078400 0x40078500 0x40078800 0x40078FF0 0x40080000 0x40081000 0x40082000 0x40084000 0x40084100 0x40085E00 0x40086000 0x40090000 0x4009E000 0x407EC000 0x407EC000
= = =
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1525 of 1551
RA4W1
3. I/O
3.2
I/O 3.2 3.3
I/O
I/O ICLK PCLK
ICLK PCLK
ICLK PCLK 1PCLK
. CPU DMAC DTC
3.2 GPT
3.2
GPT (1/2)
MMPU, SMPU, SPMON, MMF, SRAM, BUS, DMACn, DMA, DTC, ICU, DBG, FCACHE
4000 0000h
4001 CFFFh
SYSTEM
4001 E000h 4001 E3FFh
SYSTEM
4001 E400h 4001 E6FFh
PORTn, PFS, PMISC, ELC, POEG, RTC, WDT, IWDT, CAC, MSTP
4004 0000h
4004 7FFFh
CAN0, IICn, DOC, ADC140, DAC12
SCIn
SPIn
CRC GPT32n, GPT_OPS FLCN TSN
4004 E000h 4005 EFFFh
4007 0000h 4007 0EFFh
4007 2000h 4007 2FFFh
4007 4000h 4007 8000h
4007 4FFFh 4007 8FFFh
407E C000h 407E C000h
407E CFFFh 407E CFFFh
ICLK = PCLK
ICLK PCLK1
2
ICLK
SRAM DMA CPU
3
7
57
3
23
3
23
5 2
2 32
5 3
2 33
3
23
3.34
ICLK PCLKB PCLKB
PCLKB
PCLKA PCLKA PCLKA PCLKA
I/O GPT
I2C 14 A/D 12 D/A
CRC
PWM
7
7
ICLK
I/O
7
7
ICLK
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1526 of 1551
RA4W1
3. I/O
3.2
GPT (2/2)
KINT, CTSU, SLCDC
4008 0000h
4008 1FFFh
AGTn
ACMPLP, OPAMP
USBFS
USBFS
4008 4000h 4008 5000h
4008 4FFFh 4008 6FFFh
4009 0000h 4009 0400h
4009 03FFh 4009 04FFh
ICLK = PCLK
2
3 2
4 3
ICLK PCLK1
12
PCLKB
LCD
23
PCLKB
12
PCLKB
34
PCLKB USB2.0
23
PCLKB USB2.0
1. 2.
3. 4.
PCLK 1.5 1.5 2.5 1 3 16 FTDRHLFRDRHLFCRFDRLSRCDR) 3.2 2 8 FTDRHFTDRLFRDRHFRDRL 3.2 32 SPDR 3.2 2 8 16 SPDR_HA 3.2 3.3 ICLKPCLKAPCLKD
3.3 GPT
3.3
GPT
ICLKPCLK ICLK PCLKD = PCLKA ICLK PCLKD PCLKA PCLKD = ICLK = PCLKA
56 34
6
34 23
4
PCLKD = ICLKPCLKA PCLKD ICLK = PCLKA PCLKD ICLK PCLKA
23 4
23
12 3
12
PCLKA PCLKA PCLKA PCLKA PCLKA PCLKA
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1527 of 1551
RA4W1
3. I/O
3.3
3.4
3.4
MMPU
(1/20)
Dim --
Dim incr.
--
Dim index
--
MMPUCTLA
MMPUPTA
16 0x010 0-15 MMPUACA%s
16 0x010 0-15 MMPUSA%s
16 0x010 0-15 MMPUEA%s
SMPU
----
--
SMPUCTL
SMPUMBIU
SMPUFBIU
SMPUSRAM0
3 0x4 0, 2, 6 SMPUP%sBIU
----
--
SMPUEXBIU
SMPUEXBIU2
SPMON
----
--
MSPMPUOAD
MSPMPUCTL
MSPMPUPT
MSPMPUSA
MSPMPUEA
PSPMPUOAD PSPMPUCTL PSPMPUPT PSPMPUSA
PSPMPUEA
MMF
----
--
MMSFR
MMEN
MPU A A
A %s A %s A %s MPU MBIU
FBIU SRAM0
P%sBIU EXBIU EXBIU2
MSP
MSP
PSP
PSP
MemMirror
MemMirror
0x000 0x102 0x200 0x204 0x208 0x00 0x10 0x14 0x18 0x20 0x30 0x34 0x00 0x04 0x06 0x08
0x0C
0x10 0x14 0x16 0x18
0x1C
0x00 0x04
16 16 16 32 32 16 16 16 16 16 16 16 16 16 16 32
32
16 16 16 32
32
32 32
0x0000
0x0000
0x0000
0x00000000
0x00000003
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x00000000
0x00000003
0x0000 0x0000 0x0000 0x00000000
0x00000003
0x00000000
0x00000000
0xFFFF 0xFFFF 0xFFFF 0x00000003 0x00000003 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFEFF 0xFFFF 0x00000003
0x00000003
0xFFFF 0xFEFF 0xFFFF 0x00000003
0x00000003
0xFFFFFFFF 0xFFFFFFFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1528 of 1551
RA4W1
3. I/O
3.4
SRAM
(2/20)
Dim --
Dim incr.
--
Dim index
--
PARIOAD
SRAMPRCR
ECCMODE
ECC2STS
ECC1STSEN
ECC1STS
ECCPRCR
ECCPRCR2
ECCETST
ECCOAD
DMAC0-3 -- --
--
DMSAR
DMDAR
DMCRA
DMCRB
DMTMD
DMINT
DMAMD
DMOFR
DMCNT
DMREQ
DMSTS
DMA
----
--
DMAST
DTC
----
--
DTCCR
DTCVBR
DTCST
DTCSTS
ICU
16 0x1 0-15 IRQCR%s
----
--
NMICR
NMIER
NMICLR
NMISR
WUPEN
SELSR0
4 0x4 0-3 DELSR%s
32 0x4 0-31 IELSR%s
R01UH0883JJ0100 Rev.1.00 2020.08.31
SRAM
SRAM
0x00
0x04
ECC 0xC0
ECC 2 0xC1
ECC 1 0xC2
ECC 1 0xC3
ECC
0xC4
ECC 2 0xD0
ECC 0xD4
SRAM ECC 0xD8
DMA 0x00
DMA 0x04
DMA 0x08
DMA
DMA
0x0C 0x10
DMA 0x13
DMA
DMA
0x14 0x18
DMA
DMA
DMA
0x1C 0x1D 0x1E
DMAC 0x00
DTC 0x00
DTC 0x04
DTC 0x0C
DTC
0x0E
IRQ %s
0x000
NMI 0x100
0x120
0x130
0x140
0x1A0
SYS 0x200
DMAC 0x280 %s
ICU 0x300 %s
8 8 8 8 8 8 8 8 8 8 32 32 32 16 16 8 16 32 8 8 8 8 8 32 8 16 8 8 16 16 16 32 16 16 32
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00000000
0x00000000
0x00000000
0x0000
0x0000
0x00
0x0000
0x00000000
0x00
0x00
0x00
0x00
0x08
0x00000000
0x00
0x0000
0x00
0x00
0x0000
0x0000
0x0000
0x00000000
0x0000
0x0000
0x00000000
0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFF 0xFFFF 0xFF 0xFFFF 0xFFFFFFFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFFFFFFFF 0xFF 0xFFFF 0xFF 0xFF 0xFFFF 0xFFFF 0xFFFF 0xFFFFFFFF 0xFFFF 0xFFFF 0xFFFFFFFF
Page 1529 of 1551
RA4W1
3. I/O
3.4
DBG
(3/20)
Dim --
Dim incr.
--
Dim index
--
DBGSTR
DBGSTOPCR
TRACECTR
FCACHE -- --
--
FCACHEE
FCACHEIV
SYSTEM -- --
--
SBYCR
MSTPCRA
SCKDIVCR
SCKSCR
PLLCR
PLLCCR2
MEMWAIT
MOSCCR
HOCOCR
MOCOCR
OSCSF
CKOCR
TRCKCR
OSTDCR
OSTDSR
SLCDSCKCR
MOCOUTCR
HOCOUTCR
SNZCR
SNZEDCR
SNZREQCR
FLSTOP
PSMCR
OPCCR
MOSCWTCR
HOCOWTCR
SOPCCR RSTSR1 BKRACR
0x000
A
PLL
0x010 0x020 0x100 0x104 0x00C 0x01C 0x020 0x026 0x02A
PLL 2
0x02B 0x031 0x032 0x036 0x038 0x03C
0x03E
0x03F
0x040
0x041
LCD 0x050
MOCO 0x061
HOCO 0x062
0x092
0x094
0x098
0x09E
0x09F
0x0A0
0x0A2
0x0A5
0x0AA
0x0C0 1
0x0C6
32 32 32 16 16 16 32 32 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 32 8 8 8 8 8
8 16 8
0x00000000
0x00000003
0x00000000
0x0000
0x0000
0x4000
0xFFBFFFBE
0x44044444
0x01
0x01
0x07
0x00
0x01
0x00
0x00
0x00
0x00
0x01
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00000000
0x00
0x00
0x02
0x05
0x05
0x00 0x0000
0x06
0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFE 0xFF 0xFE 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFFFFFFFF 0xFF 0xFF 0xFF 0xFF 0xFF
0xFF 0xE0F8 0xFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1530 of 1551
RA4W1
3. I/O
3.4
SYSTEM
(4/20)
Dim --
Dim incr.
--
Dim index
--
USBCKCR
2 0x2 1,2 LVD%sCR1
2 0x2 1,2 LVD%sSR
----
--
PRCR
SYOCDCR
RSTSR0
RSTSR2
MOMCR
LVCMPCR
LVDLVLR
2 0x1 1,2 LVD%sCR0
----
--
VBTCR1
SOSCCR
SOMCR
LOCOCR
LOCOUTCR
VBTCR2
VBTSR
VBTCMPCR
VBTLVDICR
VBTWCTLR
VBTWCH0OTSR
VBTICTLR
VBTOCTLR
VBTWTER
VBTWEGR
VBTWFR
512 0x1 0-511 VBTBKR[%s]
USB 0x0D0
%s 1
0x0E0
%s 0x0E1
0x3FE
OCD
0
2
0x40E 0x410 0x411 0x413 0x417 0x418
%s 0
0x41A
VBATT 0x41F 1
0x480
0x481
0x490
LOCO 0x492
VBATT 0x4B0 2
VBATT 0x4B1
VBATT 0x4B2
VBATT 0x4B4
VBATT 0x4B6
VBATTI/O 0 0x4B8
VBATT 0x4BB
VBATT 0x4BC
VBATT 0x4BD
VBATT 0x4BE
VBATT 0x4BF
VBATT 0x500 [%s]
8 8 8 16 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
0x00
0x01
0x02
0x0000
0x00
0x00
0x00
0x00
0x00
0x07
0x80
0x00
0x01
0x00
0x00
0x00
0x00
0x01
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xFF 0xFF 0xFF 0xFFFF 0xFF 0xF0 0xFE 0xFF 0xFF 0xFF 0xF7 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xEC 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1531 of 1551
RA4W1
3. I/O
3.4
PORT0,5,9
(5/20)
Dim --
Dim incr.
--
Dim index
--
PCNTR1
PODR
PDR
PCNTR2
PIDR
PCNTR3
PORR
POSR
PORT1-4 -- --
--
PCNTR1
PODR
PDR
PCNTR2
EIDR
PIDR
PCNTR3
PORR
POSR
PCNTR4
EORR
EOSR
PFS
----
--
P004PFS
----
--
P004PFS_HA
----
--
P004PFS_BY
4 0x4 10, 11, P04PFS 14, 15
4 0x4 10, 11, P04PFS_HA 14, 15
4 0x4 10, 11, P04PFS_BY 14, 15
8 0x4 0-7 P10%sPFS
8 0x4 0-7 P10%sPFS_HA
8 0x4 0-7 P10%sPFS_BY
----
--
P108PFS
P108PFS_HA
P108PFS_BY
P109PFS
P109PFS_HA
P109PFS_BY
1
0x00
0x00
0x02
0x04 2
0x06
0x08 3
0x08
0x0A
0x00 1
0x00
0x02
0x04 2 0x04
0x06
0x08 3
0x08
0x0A
0x0C 4 0x0C
0x0E
00%s 0x004
00%s 0x006
00%s 0x007
0%s 0x028
0%s 0x02A
0%s 0x02B
10%s 0x040
10%s 0x042
10%s 0x043
108 0x060
108 0x062
108 0x063
109 0x064
109 0x066
109 0x067
32 16 16 32 16 32 16 16 32 16 16 32 16 16 32 16 16 32 16 16 32 16 8 32 16 8 32 16 8 32 16 8 32 16 8
0x00000000
0x0000
0x0000
0x00000000
0x0000
0x00000000
0x0000
0x0000
0x00000000
0x0000
0x0000
0x00000000
0x0000
0x0000
0x00000000
0x0000
0x0000
0x00000000
0x0000
0x0000
0x00000000
0x0000
0x00
0x00000000
0x0000
0x00
0x00000000
0x0000
0x00
0x00010010
0x0010
0x10
0x00010000
0x0000
0x00
0xFFFFFFFF 0xFFFF 0xFFFF 0xFFFF0000 0x0000 0xFFFFFFFF 0xFFFF 0xFFFF 0xFFFFFFFF 0xFFFF 0xFFFF 0xFFFF0000 0x0000 0x0000 0xFFFFFFFF 0xFFFF 0xFFFF 0xFFFFFFFF 0xFFFF 0xFFFF 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1532 of 1551
RA4W1
3. I/O
3.4
PFS
(6/20)
Dim --
Dim incr.
--
Dim index
--
P110PFS
P110PFS_HA
P110PFS_BY
P111PFS
P111PFS_HA
P111PFS_BY
P200PFS
P200PFS_HA
P200PFS_BY
P201PFS
P201PFS_HA
P201PFS_BY
3 0x4 4-6 P20%sPFS
3 0x4 4-6 P20%sPFS_HA
3 0x4 4-6 P20%sPFS_BY
4 0x4 12-15 P2%sPFS
4 0x4 12-15 P2%sPFS_HA
4 0x4 12-15 P2%sPFS_BY
----
--
P300PFS
P300PFS_HA
P300PFS_BY
4 0x4 2, 4, 7 P40%sPFS
4 0x4 2, 4, 7 P40%sPFS_HA
4 0x4 2, 4, 7 P40%sPFS_BY
----
--
P409PFS
P409PFS_HA
P409PFS_BY
P414PFS
P414PFS_HA
P414PFS_BY
P501PFS
P501PFS_HA
P501PFS_BY
110 0x068
110 0x06A
110 0x06B
1%s 0x06C
1%s 0x06E
1%s 0x06F
200 0x080
200 0x082
200 0x083
201 0x084
201 0x086
201 0x087
20%s 0x088
20%s 0x08A
20%s 0x08B
2%s 0x0B0
2%s 0x0B2
2%s 0x0B3
300 0x0C0
300 0x0C2
300 0x0C3
40%s 0x100
40%s 0x102
40%s 0x103
409 0x124
409 0x126
409 0x127
4%s 0x128
4%s 0x12A
4%s 0x12B
50%s 0x140
50%s 0x142
50%s 0x143
32 16 8 32 16 8 32 16 8 32 16 8 32 16 8 32 16 8 32 16 8 32 16 8 32 16 8 32 16 8 32 16 8
0x00010010
0x0010
0x10
0x00000000
0x0000
0x00
0x00000000
0x0000
0x00
0x00000010
0x0010
0x10
0x00000000
0x0000
0x00
0x00000000
0x0000
0x00
0x00010010
0x0010
0x10
0x00000000
0x0000
0x00
0x00000000
0x0000
0x00
0x00000000
0x0000
0x00
0x00000000
0x0000
0x00
0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD 0xFFFFFFFD 0xFFFD 0xFD
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1533 of 1551
RA4W1
3. I/O
3.4
PFS
(7/20)
Dim Dim incr.
2 0x4
Dim index
14,15
P9%sPFS
2 0x4 14,15 P9%sPFS_HA
2 0x4 14,15 P9%sPFS_BY
PMISC
----
--
PWPR
ELC
----
--
ELCR
2 0x2 0,1 ELSEGR%s
10 0x4 0-9 ELSR%s
----
--
ELSR12
5 0x4 14-18 ELSR%s
POEG
2 0x100 A,B POEGG%s
RTC
----
--
R64CNT
RSECCNT
BCNT0
RMINCNT
BCNT1
RHRCNT
BCNT2
RWKCNT
BCNT3
RDAYCNT
RMONCNT
RYRCNT
RSECAR
BCNT0AR
RMINAR
BCNT1AR
RHRAR
BCNT2AR
RWKAR
BCNT3AR
RDAYAR
BCNT0AER
RMONAR
BCNT1AER
RYRAR
R01UH0883JJ0100 Rev.1.00 2020.08.31
9%s 0x278
9%s 0x27A
9%s 0x27B
0x03
%s %s
12
%s POEG%s 64Hz
0x00 0x02 0x10 0x40 0x48 0x00 0x00
0x02
0
0x02
0x04
1
0x04
0x06
2
0x06
0x08
3
0x08
0x0A
0x0C
0x0E
0x10
0
0x10 0x12
1
0x12 0x14
2
0x14 0x16
3
0x16 0x18
0
0x18 0x1A
1
0x1A 0x1C
32 16 8 8 8 8 16 16 16 32 8 8 8 8 8 8 8 8 8 8 8 16 8 8 8 8 8 8 8 8 8 8 8 8 16
0x00010000
0x0000
0x00
0x80
0x00
0x80
0x0000
0x0000
0x0000
0x00000000
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x0000
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x0000
0xFFFFFFFD 0xFFFD 0xFD 0xFF 0xFF 0xFF 0xFFFF 0xFFFF 0xFFFF 0xFFFFFFFF 0x80 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xC0 0xE0 0xFF00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF00
Page 1534 of 1551
RA4W1
3. I/O
3.4
RTC
(8/20)
Dim --
Dim incr.
--
Dim index
--
BCNT2AER
RYRAREN
BCNT3AER
RCR1
RCR2
RCR4
RFRH
RFRL
RADJ
3 0x2 0-2 RTCCR%s
3 0x10 0-2 RSECCP%s
3 0x10 0-2 BCNT0CP%s
3 0x10 0-2 RMINCP%s
3 0x10 0-2 BCNT1CP%s
3 0x10 0-2 RHRCP%s
3 0x10 0-2 BCNT2CP%s
3 0x10 0-2 RDAYCP%s
3 0x10 0-2 BCNT3CP%s
3 0x10 0-2 RMONCP%s
WDT
----
--
WDTRR
WDTCR
WDTSR
WDTRCR
WDTCSTPR
IWDTRR
IWDTSR
CAC
----
--
CACR0
CACR1
CACR2
CAICR
CASTR
CAULVR
CALLVR
CACNTBR
2
3
RTC 1
0x1C
0x1E
0x1E
0x22
RTC 2 0x24
RTC 4 0x28
H
0x2A
L
0x2C
0x2E
0x40 %s
%s 0x52
BCNT0 %s %s
0x52 0x54
BCNT1 %s %s
0x54 0x56
BCNT2 %s %s
0x56 0x5A
BCNT3 %s %s
0x5A 0x5C
WDT 0x00
WDT 0x02
WDT
0x04
WDT
WDT
IWDT
0x06 0x08 0x00
IWDT 0x04
CAC0 0x00
CAC1 0x01
CAC2 0x02
CAC 0x03
CAC
0x04
CAC
0x06
CAC
0x08
CAC 0x0A
16 8 8 8 8 8 16 16 8 8 8 8 8 8 8 8 8 8 8 8 16 16 8 8 8 16 8 8 8 8 8 16 16 16
0x0000
0x00
0x00
0x00
0x00
0x00
0x0000
0x0000
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
0x33F3
0x0000
0x80
0x80
0xFF
0x0000
0x00
0x00
0x00
0x00
0x00
0x0000
0x0000
0x0000
0xFF00 0x00 0x00 0x0A 0x0E 0xFE 0xFFFE 0x0000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFFFF 0xFFFF 0xFF 0xFF 0xFF 0xFFFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFFFF 0xFFFF 0xFFFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1535 of 1551
RA4W1
3. I/O
3.4
MSTP
(9/20)
Dim --
Dim incr.
--
Dim index
--
MSTPCRB
MSTPCRC
MSTPCRD
CAN0
32 0x10 0-31 MB%s_ID
32 0x10 0-31 MB%s_DL
32 0x10 0-31 MB%s_D0
32 0x10 0-31 MB%s_D1
32 0x10 0-31 MB%s_D2
32 0x10 0-31 MB%s_D3
32 0x10 0-31 MB%s_D4
32 0x10 0-31 MB%s_D5
32 0x10 0-31 MB%s_D6
32 0x10 0-31 MB%s_D7
32 0x10 0-31 MB%s_TS
8 0x4 0-7 MKR[%s]
2 0x4 0,1 FIDCR%s
----
--
MKIVLR
MIER
MIER_FIFO
32 0x1 32 0x1 ----
0-31 MCTL_TX[%s]
0-31 MCTL_RX[%s]
--
CTLR
STR
BCR
RFCR
RFPCR
TFCR
TFPCR
EIER
EIFR
RECR
TECR
ECSR
CSSR
B C D
FIFOID
FIFO
FIFO FIFO FIFO FIFO
0x00 0x04 0x08 0x200 0x204 0x206 0x207 0x208 0x209 0x20A 0x20B 0x20C 0x20D 0x20E 0x400 0x420 0x428 0x42C 0x42C
0x820 0x820 0x840 0x842 0x844 0x848 0x849 0x84A 0x84B 0x84C 0x84D 0x84E 0x84F 0x850 0x851
32 32 32 32 16 8 8 8 8 8 8 8 8 16 32 32 32 32 32
8 8 16 16 32 8 8 8 8 8 8 8 8 8 8
0xFFFFFFFF
0xFFFFFFFF
0xFFFFFFFF
0x00000000
0x0000
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x0000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00 0x00 0x0500 0x0500 0x00000000 0x80 0x00 0x80 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x0000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
0xFF 0xFF 0xFFFF 0xFFFF 0xFFFFFFFF 0xFF 0x00 0xFF 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0x00
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1536 of 1551
RA4W1
3. I/O
3.4
CAN0
(10/20)
Dim --
Dim incr.
--
Dim index
--
MSSR
MSMR
TSR
AFSR
TCR
IIC0
----
--
ICCR1
ICCR2
ICMR1
ICMR2
ICMR3
ICFER
ICSER
ICIER
ICSR1
ICSR2
3 0x2 0-2 SARL%s
3 0x2 0-2 SARU%s
----
--
ICBRL
ICBRH
ICDRT
ICDRR
ICWUR
ICWUR2
IIC1
----
--
ICCR1
ICCR2
ICMR1
ICMR2
ICMR3
ICFER
ICSER
ICIER
ICSR1
ICSR2
3 0x2 0-2 SARL%s
3 0x2 0-2 SARU%s
R01UH0883JJ0100 Rev.1.00 2020.08.31
0x852
0x853
0x854
0x856 0x858
I2C 1
I2C 2
I2C 1
0x00 0x01 0x02
I2C 2
0x03
I2C 3
0x04
I2C 0x05
I2C 0x06
I2C 0x07
I2C1 0x08
I2C2 0x09
L%s
U%s I2CLow I2CHigh I2C
0x0A 0x0B 0x10 0x11 0x12
I2C 0x13
I2C
I2C 2
I2C 1
I2C 2
I2C 1
0x16 0x17 0x00 0x01 0x02
I2C 2
0x03
I2C 3
0x04
I2C 0x05
I2C 0x06
I2C 0x07
I2C1 0x08
I2C2 0x09
L%s U%s
0x0A 0x0B
8 8 16 16 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
0x80
0x00
0x0000
0x0000
0x00
0x1F
0x00
0x08
0x06
0x00
0x72
0x09
0x00
0x00
0x00
0x00
0x00
0xFF
0xFF
0xFF
0x00
0x10
0xFD
0x1F
0x00
0x08
0x06
0x00
0x72
0x09
0x00
0x00
0x00
0x00
0x00
0xFF 0xFF 0xFFFF 0x0000 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF
Page 1537 of 1551
RA4W1
3. I/O
3.4
IIC1
(11/20)
Dim --
Dim incr.
--
Dim index
--
ICBRL
ICBRH
ICDRT
ICDRR
DOC
----
--
DOCR
DODIR
DODSR
ADC140
----
--
ADCSR
ADANSA0
ADANSA1
ADADS0
ADADS1
ADADC
ADCER
ADSTRGR
ADEXICR
ADANSB0
ADANSB1
ADDBLDR
ADTSDR
ADOCDR
ADRD
28 0x2 0-27 ADDR%s
----
--
ADDISCR
ADGSPCR
ADDBLDRA
ADDBLDRB
ADHVREFCNT
ADWINMON
ADCMPCR ADCMPANSER ADCMPLER
ADCMPANSR0 ADCMPANSR1
I2CLow I2CHigh I2C
I2C
DOC
DOC DOC
A/D
A/D A0
A/D A1
A/D 0 A/D 1 A/D A/D A/D A/D A/D B0
A/D B1
A/D 2
A/D A/D A/D
A/D %s
A/D A/D A/D 2 A
A/D 2 B
A/D A/D A/B A/D A/D A A/D A A/D A 0 A/D A 1
0x10 0x11 0x12 0x13 0x00 0x02 0x04 0x000 0x004 0x006 0x008 0x00A 0x00C 0x00E 0x010 0x012 0x014 0x016 0x018 0x01A 0x01C 0x01E 0x020 0x07A 0x080 0x084 0x086 0x08A 0x08C
0x090 0x092 0x093
0x094 0x096
8 8 8 8 8 16 16 16 16 16 16 16 8 16 16 16 16 16 16 16 16 16 16 8 16 16 16 8 8
16 8 8
16 16
0xFF
0xFF
0xFF
0x00
0x00
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x00
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x00
0x0000
0x0000
0x0000
0x00
0x00
0x0000 0x00 0x00
0x0000
0x0000
0xFF 0xFF 0xFF 0xFF 0xFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFF 0xFFFF 0xFFFF 0xFFFF 0xFF 0xFF
0xFFFF 0xFF 0xFF
0xFFFF 0xFFFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1538 of 1551
RA4W1
3. I/O
3.4
ADC140
(12/20)
Dim --
Dim incr.
--
Dim index
--
ADCMPLR0
ADCMPLR1
ADCMPDR0
ADCMPDR1
ADCMPSR0
ADCMPSR1
ADCMPSER
ADCMPBNSR
DAC12 SCI0,1
5 0x1 ----
----
ADWINLLB
ADWINULB
ADCMPBSR
ADSSTRL
ADSSTRT
ADSSTRO
4-6, 9, ADSSTR%s 10
--
DADR0
DACR
DADPR
DAADSCR
DAVREFCR
--
SMR
SMR_SMCI
BRR SCR
SCR_SMCI
TDR SSR
A/D A 0
A/D A 1
A/D A
A/D A
A/D A 0
A/D A 1
A/D A
A/D B
A/D B
A/D B
A/D B A/D L
A/D T
A/D O
A/D %s
D/A 0
D/A
DADR0
D/A A/D
D/A VREF
SCMR.SMIF = 0
SCMR.SMIF = 1
SCMR.SMIF = 0
SCMR.SMIF = 1
FIFO (SCMR.SMIF = 0 FCR.FM = 0)
0x098 0x09A 0x09C 0x09E 0x0A0
0x0A2
0x0A4
0x0A6
0x0A8 0x0AA 0x0AC 0x0DD 0x0DE 0x0DF 0x0E0 0x00 0x04 0x05 0x06 0x07 0x00
0x00
0x01 0x02
0x02
0x03 0x04
16 16 16 16 16
16
8
8
16 16 8 8 8 8 8 16 8 8 8 8 8
8
8 8
8
8 8
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x00
0x00
0x0000 0x0000 0x00 0x0D 0x0D 0x0D 0x0D 0x0000 0x1F 0x00 0x00 0x00 0x00
0x00
0xFF 0x00
0x00
0xFF
0x84
0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF
0xFFFF
0xFF
0xFF
0xFFFF 0xFFFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFFFF 0xFF 0xFF 0xFF 0xFF 0xFF
0xFF
0xFF 0xFF
0xFF
0xFF 0xFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1539 of 1551
RA4W1
3. I/O
3.4
SCI0,1
(13/20)
Dim --
Dim incr.
--
Dim index
--
SSR_FIFO
SSR_SMCI
SCI4,9
RDR
SCMR
SEMR
SNFR
SIMR1
SIMR2
SIMR3
SISR
SPMR
TDRHL
FTDRHL
FTDRH
FTDRL
RDRHL
FRDRHL
FRDRH
FRDRL
MDDR
DCCR
FCR
FDR
LSR
CDR
SPTR
----
--
SMR
SMR_SMCI
BRR SCR
FIFO (SCMR.SMIF = 0 FCR.FM = 1) SCMR.SMIF = 1
I2C 1
I2C 2
I2C 3
I2C
SPI
9
FIFO HL
FIFO H
FIFO L
9
FIFO HL
FIFO H
FIFO L
FIFO
FIFO
SCMR.SMIF = 0 SCMR.SMIF = 1
SCMR.SMIF = 0
0x04
0x04
0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0E 0x0E 0x0F 0x10 0x10 0x10 0x11 0x12 0x13 0x14 0x16 0x18 0x1A 0x1C 0x00
0x00
0x01 0x02
8
8
8 8 8 8 8 8 8 8 8 16 16 8 8 16 16 8 8 8 8 16 16 16 16 8 8
8
8 8
0x80
0x84
0x00 0xF2 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFFFF 0xFFFF 0xFF 0xFF 0x0000 0x0000 0x00 0x00 0xFF 0x40 0xF800 0x0000 0x0000 0x0000 0x03 0x00
0x00
0xFF 0x00
0xFD
0xFF
0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xCB 0xFF 0xFFFF 0xFFFF 0xFF 0xFF 0xFFFF 0xFFFF 0xFF 0xFF 0xFF 0xFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFF 0xFF
0xFF
0xFF 0xFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1540 of 1551
RA4W1
3. I/O
3.4
SCI4,9
(14/20)
Dim --
Dim incr.
--
Dim index
--
SCR_SMCI
TDR SSR
SPI0
SSR_SMCI
RDR
SCMR
SEMR
SNFR
SIMR1
SIMR2
SIMR3
SISR
SPMR
TDRHL
RDRHL
MDDR
DCCR
CDR
SPTR
----
--
SPCR
SSLP
SPPCR
SPSR
SPDR
SPDR_HA
SPSCR
SPSSR
SPBR
SPDCR
SPCKD
SSLND
SPND
SCMR.SMIF = 1
FIFO (SCMR.SMIF = 0 FCR.FM = 0)
I2C 1
I2C 2
I2C 3
I2C
SPI
9
9
SPI
SPI SPI SPI
SPI
SPI SPI SPI SPI
SPI SPI
SPI SPI
0x02
0x03 0x04
0x04
0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x10 0x12 0x13 0x1A 0x1C 0x00 0x01 0x02 0x03 0x04 0x04 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E
8
8 8
8
8 8 8 8 8 8 8 8 8 16 16 8 8 16 8 8 8 8 8 32 16 8 8 8 8 8 8 8
0x00
0xFF
0x84
0x84
0x00 0xF2 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFFFF 0x0000 0xFF 0x40 0x0000 0x03 0x00 0x00 0x00 0x20 0x00000000 0x0000 0x00 0x00 0xFF 0x00 0x00 0x00 0x00
0xFF
0xFF 0xFF
0xFF
0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xCB 0xFF 0xFFFF 0xFFFF 0xFF 0xFF 0xFFFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFFFFFFFF 0xFFFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1541 of 1551
RA4W1
3. I/O
3.4
SPI0
(15/20)
Dim --
Dim incr.
--
Dim index
--
SPCR2
8 0x2 0-7 SPCMD%s
SPI1
----
--
SPCR
SSLP
SPPCR
SPSR
SPDR
SPDR_HA
SPBR
SPDCR
SPCKD
SSLND
SPND
SPCR2
SPCMD0
CRC
----
--
CRCCR0
CRCCR1
CRCDIR
CRCDIR_BY
CRCDOR
CRCDOR_HA
CRCDOR_BY
CRCSAR
GPT320-3 -- --
--
GTWP
GTSTR
GTSTP
GTCLR
GTSSR
GTPSR
GTCSR
GTUPSR
GTDNSR
GTICASR
GTICBSR
SPI 2
0x0F
SPI %s
0x10
SPI 0x00
SPI
SPI
SPI
0x01 0x02 0x03
SPI
0x04
SPI
SPI
0x04 0x0A
SPI
SPI
0x0B 0x0C
SPI
SPI
0x0D 0x0E
SPI2 0x0F
SPI 0
0x10
CRC 0 0x00
CRC 1 0x01
CRC
0x04
CRC 0x04
CRC
0x08
CRC
0x08
CRC 0x08
0x0C
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM A
PWM B
0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24
0x28
8 16 8 8 8 8 32 16 8 8 8 8 8 8 16 8 8 32 8 32 16 8 16 32 32 32 32 32 32 32 32 32 32
32
0x00
0x070D
0x00
0x00
0x00
0x20
0x00000000
0x0000
0xFF
0x00
0x00
0x00
0x00
0x00
0x070D
0x00
0x00
0x00000000
0x00
0x00000000
0x0000
0x00
0x0000
0x00000000
0x00000000
0xFFFFFFFF
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0xFF 0xFFFF 0xFF 0xFF 0xFF 0xFF 0xFFFFFFFF 0xFFFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFFFF 0xFF 0xFF 0xFFFFFFFF 0xFF 0xFFFFFFFF 0xFFFF 0xFF 0xFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF
0xFFFFFFFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1542 of 1551
RA4W1
3. I/O
3.4
GPT320-3
(16/20)
Dim --
Dim incr.
--
Dim index
--
GTCR
GTUDDTYC
GTIOR
GTINTAD
GTST
GTBER
GTCNT
GTCCRA
GTCCRB
GTCCRC
GTCCRE
GTCCRD
GTCCRF
GTPR
GTPBR
GTDTCR
GTDVU
GPT164, 5, -- --
--
GTWP
8
GTSTR
GTSTP
GTCLR
GTSSR
GTPSR
GTCSR
GTUPSR
GTDNSR
GTICASR
GTICBSR
GTCR GTUDDTYC GTIOR GTINTAD GTST GTBER
PWM
PWM
PWM I/O
PWM
PWM
PWM
PWM
PWM A
PWM B
PWM C
PWM E
PWM D
PWM F
PWM
PWM
PWM
PWM U
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM A
PWM B
PWM
PWM
PWM I/O
PWM
PWM
PWM
0x2C 0x30 0x34 0x38 0x3C 0x40 0x48 0x4C 0x50 0x54 0x58 0x5C 0x60 0x64 0x68 0x88 0x8C 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24
0x28
0x2C 0x30 0x34 0x38 0x3C 0x40
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
32
32 32 32 32 32 32
0x00000000
0x00000001
0x00000000
0x00000000
0x00008000
0x00000000
0x00000000
0xFFFFFFFF
0xFFFFFFFF
0xFFFFFFFF
0xFFFFFFFF
0xFFFFFFFF
0xFFFFFFFF
0xFFFFFFFF
0xFFFFFFFF
0x00000000
0xFFFFFFFF
0x00000000
0x00000000
0xFFFFFFFF
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000 0x00000001 0x00000000 0x00000000 0x00008000 0x00000000
0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF
0xFFFFFFFF
0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1543 of 1551
RA4W1
3. I/O
3.4
GPT164, 5, 8
(17/20)
Dim --
Dim incr.
--
Dim index
--
GTCNT
GTCCRA
GTCCRB
GTCCRC
GTCCRE
GTCCRD
GTCCRF
GTPR
GTPBR
GTDTCR
GTDVU
GPT_OPS -- --
--
OPSCR
KINT
----
--
KRCTL
KRF
KRM
CTSU
----
--
CTSUCR0
CTSUCR1
CTSUSDPRS
CTSUSST
CTSUMCH0
CTSUMCH1
CTSUCHAC0
CTSUCHAC1
CTSUCHAC2
CTSUCHAC3
CTSUCHAC4
CTSUCHTRC0
CTSUCHTRC1
CTSUCHTRC2
CTSUCHTRC3
CTSUCHTRC4
CTSUDCLKC
CTSUST
CTSUSSC
PWM
PWM A PWM B PWM C PWM E PWM D PWM F PWM
PWM
PWM
PWM U
CTSU 0
CTSU 1
CTSU
CTSU
CTSU 0
CTSU 1
CTSU 0 CTSU 1 CTSU 2 CTSU 3 CTSU 4 CTSU 0 CTSU 1 CTSU 3 CTSU 3 CTSU 4 CTSU
CTSU
CTSU
0x48 0x4C 0x50 0x54 0x58 0x5C 0x60 0x64 0x68 0x88 0x8C 0x00 0x00 0x04 0x08 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12
32 32 32 32 32 32 32 32 32 32 32 32 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 16
0x00000000
0x0000FFFF
0x0000FFFF
0x0000FFFF
0x0000FFFF
0x0000FFFF
0x0000FFFF
0x0000FFFF
0x0000FFFF
0x00000000
0x0000FFFF
0x00000000
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x3F
0x3F
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x0000
0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFFFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1544 of 1551
RA4W1
3. I/O
3.4
CTSU
(18/20)
Dim --
Dim incr.
--
Dim index
--
CTSUSO0
CTSUSO1
CTSUSC
CTSURC
CTSUERRS
SLCDC
----
--
LCDM0
LCDM1
LCDC0
AGT0,1
9 0x1 ----
6, 9, SEG%s 11, 12, 20, 23, 49, 52, 53
--
AGT
AGTCMA
AGTCMB
AGTCR
AGTMR1
AGTMR2
AGTIOC
AGTISR
AGTCMSR
AGTIOSEL
ACMPLP -- --
--
COMPMDR
COMPFIR
COMPOCR
COMPSEL0
COMPSEL1
OPAMP
----
--
AMPMC
AMPTRM
AMPTRS
AMPC
AMPMON
CTSU 0 CTSU 1 CTSU
CTSU
CTSU LCD 0
LCD 1
LCD 0 LCD %s
0x14 0x16 0x18 0x1A 0x1C 0x000 0x001 0x002 0x100
16 16 16 16 16 8 8 8 8
0x0000
0x0000
0x0000
0x0000
0x0000
0x00
0x00
0x00
0x00
0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFF 0xFF 0xFF 0xFF
AGT
0x00
AGT A
AGT B
AGT
0x02 0x04 0x08
AGT 1
0x09
AGT 2
0x0A
AGT I/O 0x0C
AGT 0x0D
AGT 0x0E
AGT
0x0F
ACMPLP 0x00
ACMPLP 0x01 ACMPLP 0x02 0x04 0x05 0x08 0x09 0x0A 0x0B 0x0C
16
0xFFFF
16
0xFFFF
16
0xFFFF
8
0x00
8
0x00
8
0x00
8
0x00
8
0x00
8
0x00
8
0x00
8
0x00
8
0x00
8
0x00
8
0x11
8
0x91
8
0x00
8
0x00
8
0x00
8
0x00
8
0x00
0xFFFF 0xFFFF 0xFFFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1545 of 1551
RA4W1
3. I/O
3.4
USBFS
(19/20)
Dim --
Dim incr.
--
Dim index
--
SYSCFG
SYSSTS0
DVSTCTR0
CFIFO
CFIFOL
D0FIFO
D0FIFOL
D1FIFO
D1FIFOL
CFIFOSEL
CFIFOCTR
D0FIFOSEL
D0FIFOCTR
D1FIFOSEL
D1FIFOCTR
INTENB0
INTENB1
BRDYENB
NRDYENB
BEMPENB
SOFCFG
INTSTS0
INTSTS1
BRDYSTS
NRDYSTS
BEMPSTS
FRMNUM
USBREQ
USBVAL
USBINDX
USBLENG
DCPCFG
DCPMAXP
DCPCTR
PIPESEL
R01UH0883JJ0100 Rev.1.00 2020.08.31
0
0 CFIFO
0x000
0x004
0x008
0x014
CFIFO L
0x014
D0FIFO
0x018
D0FIFO L
0x018
D1FIFO
0x01C
D1FIFO L
0x01C
CFIFO 0x020
CFIFO 0x022
D0FIFO 0x028
D0FIFO
D1FIFO
0x02A 0x02C
D1FIFO 0x02E
0x030 0
0x032 1
BRDY 0x036
NRDY 0x038
BEMP 0x03A
SOF 0x03C
0x040 0
0x042 1
BRDY 0x046
NRDY 0x048
BEMP 0x04A
0x04C
USB 0x054
USB 0x056
USB 0x058
USB 0x05A
DCP 0x05C
DCP 0x05E
DCP 0x060
0x064
16 16 16 16 8 16 8 16 8 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16
0x0000
0x0000
0x0000
0x0000
0x00
0x0000
0x00
0x0000
0x00
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0040
0x0040
0x0000
0xFFFF 0x0000 0xFFFF 0xFFFF 0xFF 0xFFFF 0xFF 0xFFFF 0xFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFF7F 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF
Page 1546 of 1551
RA4W1
3. I/O
3.4
USBFS
(20/20)
Dim --
Dim incr.
--
Dim index
--
PIPECFG
PIPEMAXP
PIPEPERI
5 0x002 1-5 PIPE%sCTR
4 0x002 6-9 PIPE%sCTR
5 0x004 1-5 PIPE%sTRE
5 0x004 1-5 PIPE%sTRN
----
--
USBBCCTRL0
USBMC
6 0x002 0-5 DEVADD%s
DAC8
2 0x01 0,1 DACS%s
----
--
DAM
FLCN
----
--
DFLCTL
TSN
----
--
TSCDRH
TSCDRL
%s
%s %s
%s BC 0
0x068 0x06C 0x06E 0x070 0x07A 0x090 0x092 0x0B0
USB 0x0CC
%s 0x0D0
D/A %s 0x00
D/A
H
L
0x03 0x90 0x228 0x229
16 16 16 16 16 16 16 16 16 16 8 8 8 8 8
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0002
0x0000
0x00
0x00
0x00
0x00
0x00
0xFFFF 0xFFBF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFF 0xFF 0xFF 0x00 0x00
= Dim = Dim inc = 2 Dim index = %s = = = = =
= =
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1547 of 1551
RA4W1
Rev. 1.00 2020.08.31
RA4W1
--
R01UH0883JJ0100 Rev.1.00 2020.08.31
Page 1548 of 1551
RA4W1
20208 31Rev.1.00
135-0061 3-2-24
http://www.renesas.com
135-00613-2-24
https://www.renesas.com/contact/
� 2020 Renesas Electronics Corporation. All rights reserved. Colophon 3.1
RA4W1
R01UH0883JJ0100