Bwave Technology W2R Tortuga User Manual

Shanghai Bwave Technology Co.,Ltd. Tortuga Users Manual

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Users Manual

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Date Submitted2017-04-05 00:00:00
Date Available2017-04-07 00:00:00
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Renesas Electronics confidential
Under Development
Confidential
GAC-B-17-0004
RTK00V2X720MTORS7J
User’s Manual: Hardware
― Preliminary ―
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp.
Rev.1.0
Jan. 2017
Renesas Electronics confidential
Introduction
RTK00V2X720MTORS7J(Tortuga) is an evaluation board for RTK00V2X7200MPIN7J (V2X wireless module).
Tortuga can be used as standalone without the need of Host board, and be evaluated RF performance of V2X wireless
module. Tortuga also be used in conjunction with the Host board.
V2X wireless module has optimized function to realize IEEE802.11p PHY layer function. This product conforms not
only to 802.11p standard but 1609.4 and ETSI standard. This module provides cost effective, low power and small form
factor solution for communication unit manufacture.
Overview
Tortuga is an evaluation board for V2X wireless module(including Renesas’ ASSP and suitable component). V2X
wireless module has optimized function to realize ETSI EN 302 571/ ETSI EN 302 663 PHY/MAC layer function. This
product provides cost effective, low power and small form factor solution to communication unit manufacture.
V2X wireless module includes radio transceiver, PA, LNA , antenna switch, Filters and peripherals.
Feature
- Support Standard: ETSI EN 302 571/ ETSI EN 302 663 / IEEE802.11p™ -2010<15.July.2010> PHY/MAC protocol
with Firmware
- Operational Frequency band: 5.9GHz
- Using 32bit CPU core, Operating Frequency: up to 160MHz
- Internal memory: RAM/128kByte, ROM/32kByte, EEPROM/512Byte
- Mini PCIE Connector
- SDIO interface for host CPU
- UART interfaces
- USB interfaces
- Integrate Function for ETSI EN 302 571/ ETSI EN 302 663
OFDM Modulator/ Demodulator with Maximum Ratio Converting diversity
MAC hardware accelerator
- Power Supply: 12V from AC Adapter or 5.0V from Host board
- Peak Power Consumption (at 12 V)
TYP:
- Listen mode : TBD (diversity on)/TBD(diversity off)
Rx mode : TBD (diversity on)/TBD(diversity off)
Tx mode : TBD (@24dBm)
- Operating Temperature
Ta = -40 to +85 degree
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Contents
DIMENSION AND LAYOUT ................................................................................................................... 4
1.
1.1
BOARD LAYOUT INFORMATION
BOARD DESCRIPTION .......................................................................................................................... 6
2.
2.1
2.2
2.3
2.4
BLOCK DIAGRAM 6
MINI PCIE PIN INFORMATION 7
POWER SUPPLY 8
USAGE FOR STANDALONE OPERATION 8
FUNCTION DETAILS ............................................................................................................................. 9
3.
3.1
ABSOLUTE MAXIMUM RATING 9
3.2
ELECTRICAL CHARACTERISTICS 9
3.3
RF CHARACTERISTIC 10
3.3.1
Receive characteristic 10
3.3.2
Transmit characteristic 11
3.4
MODE TRANSFER DEFINITION AND SUB BOARD CONTROL 12
3.5
POWER UP/DOWN, RESET, WDT SEQUENCE 14
3.5.1
Power On / Off Sequence 14
3.5.2
Reset sequence 15
3.5.3
WDT Reset timing 15
3.6
LOGIC INTERFACE AC CHARACTERISTICS 16
3.6.1
UART sequence 16
3.6.2
SDIO sequence 16
3.6.3
1PPS sequence 18
4.
APPENDIX – VALIDATION CONFIGURATION INFORMATION........................................................ 18
5.
REGULATORY WARNING STATEMENTS .......................................................................................... 18
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Renesas Electronics confidential
1.
Dimension and Layout
1.1
Board layout information
Figure1. Board top view information
Unit: mm
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Figure2. Board bottom view information
Unit: mm
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2.
Board description
2.1
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BLOCK
Diagram
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2.2
Mini PCIE pin information
Pin
Pin Name
I/O
RESERVE
I/O
No connection(only connected to test pin)
RESERVE
I/O
No connection
RESERVE
I/O
No connection(only connected to test pin)
GND
GND
GND
5.0V
Voltage Supply
5V voltage supply
5.0V
RESET
5V voltage supply
System reset input (Low Active)
1PPS
Voltage Supply
CMOS Schmitt Trigger Input
(with Pull-Up)
CMOS Schmitt Trigger I
(with Pull-Down)
th
Description
If you don’t use, select open.
GND
GND
GND
10
11
RESERVE
UART0_TXD
I/O
CMOS Output
No connection(only connected to test pin)
UART0 Tx signal [TXD]
12
ANT_M
CMOS Schmitt Trigger I
(with Pull-Up)
RX Diversity Enable selects.
- High : Diversity
- Low : Single_ANT B
13
UART0_RXD
CMOS Schmitt Trigger Input
14
RESERVE
I/O
15
16
GND
STATE
17
RESERVE
I/O
18
GND
19
RESERVE
I/O
No connection(only connected to test pin)
20
RESERVE
I/O
No connection(only connected to test pin)
21
GND
22
RESERVE
I/O
23
RESERVE
I/O
24
5.0V
25
RESERVE
26
GND
GND
27
GND
GND
GND
28
5.0V
Voltage Supply
5V voltage supply
29
GND
GND
30
RESERVE
I/O
No connection(only connected to test pin)
31
RESERVE
I/O
No connection(only connected to test pin)
32
RESERVE
I/O
No connection(only connected to test pin)
33
RESERVE
I/O
No connection(only connected to test pin)
34
GND
GND
35
GND
GND
36
RESERVE
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Functional
I/O
I/O
GND
CMOS Output
GND
GND
If you don’t use, select open.
UART0 Rx signal [RXD]
No connection(only connected to test pin)
GND
Status indication signal
No connection(only connected to test pin)
GND
GND
No connection(only connected to test pin)
No connection(only connected to test pin)
Voltage Supply
5V voltage supply
No connection(only connected to test pin)
GND
GND
GND
GND
No connection(only connected to test pin)
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Renesas Electronics confidential
Pin
Pin Name
I/O
Functional
Description
37
SDIO_CLK
CMOS Schmitt Trigger Input
(with Pull-Up)
SDIO clock [CLK]
38
RESERVE
I/O
No connection(only connected to test pin)
39
RESERVE
I/O
No connection(only connected to test pin)
40
GND
41
GND
42
RESERVE
SDIO_DAT3
I/O
I/O
RESERVE
SDIO_DAT2
GND
GND
GND(Pull Down
CMOS I/O with Pull-Up
No connection(only connected to test pin)
SDIO data [DAT3]
I/O
I/O
CMOS I/O with Pull-Up
No connection(only connected to test pin)
SDIO data [DAT2]
RESERVE
SDIO_DAT1
I/O
I/O
CMOS I/O with Pull-Up
No connection(only connected to test pin)
SDIO data [DAT1]
5.0V
SDIO_DAT0
I/O
Voltage Supply
CMOS I/O with Pull-Up
5V voltage supply
SDIO data [DAT0]
51
GND
SDIO_CMD
I/O
GND
CMOS I/O with Pull-Up
GND
SDIO command [CMD]
52
RESERVE
I/O
43
44
45
46
47
48
49
50
GND
2.3
No connection
Power Supply
Tortuga are powered from the HOST board if used in conjunction with the HOST board.
For standalone operation Tortuga are powered from the AC adapter(12V/2A).
2.4
Usage for standalone operation
Please refer to the “UW2b Tortuga test TP quick manual“ for usage of standalone operation.
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Renesas Electronics confidential
3.
Function details
*VDD1V2 / VDD3V0 / VDD5V0 / VDD12V0 described in this chapter are correspond to symbol described in “2.1
Block diagram”.
3.1
Item
Supply Voltage
Symbol
Absolute Maximum Rating
Maximum Rate
-0.3 ~ +43.5
-0.3 ~ +6.0
VDD12V0
VDD5V0
3.2
Operation Temperature
Item
Symbol
Ta
Operation
temperature
Operation Voltage
Item
Supply Voltage
Symbol
Min
Typ
+25
Max
Unit
[°C]
Condition
Min
Typ
Max
Unit
[V]
[V]
Condition
From DC jack
From mini PCIE
12
4.75
DC characteristic
Ta = 25°C, standalone operation, VDD12V0=12V(AC adapter)
Item
Symbol
Min
Typ
VDD12V0
Current
TBD
consumption
TBD
(diversity off)
TBD
Current
consumption
(diversity on)
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VDD12V0
Condition
From DC jack
From Mini PCIE
Electrical Characteristics
VDD12V0
VDD5V0
Unit
[V]
[V]
TBD
TBD
TBD
5.25
Max
Unit
[mA]
[mA]
[mA]
[mA]
[mA]
[mA]
Condition
Listen mode
Rx mode
Tx mode (@24dBm)
Listen mode
Rx mode
Tx mode (@24dBm)
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Renesas Electronics confidential
3.3
RF characteristic
*1 typical operating condition (Just informative, not guaranteed.):
*1 HW = Tortuga7, Ta = 25°C, standalone operation, VDD12V0=12V(AC adapter)
*1 Measurement point is circled in red in the figure below
3.3.1
Receive characteristic
Frequency range
Input VSWR
Minimum Sensitivity
(Diversity off)
Minimum Sensitivity
(Diversity on)
Maximum
Input Level
(Diversity off)
Maximum
Input Level
(Diversity on)
Adjacent channel rejection
(Diversity off)
Nonadjacent Adjacent channel
rejection
(Diversity off)
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Min
5850
Typ
Max
5925
2.0
-94
-93
-87
-77
-94
-94
-87
-80
-20
Unit
[MHz]
[dBm]
[dBm]
[dBm]
[dBm]
[dBm]
[dBm]
[dBm]
[dBm]
[dBm]
Condition
5890MHz
Data rate = 3Mbps
Data rate = 6Mbps
Data rate = 12Mbps
Data rate = 27Mbps
Data rate = 3Mbps
Data rate = 6Mbps
Data rate = 12Mbps
Data rate = 27Mbps
Data rate = 27Mbps
-20
[dBm]
Data rate = 27Mbps
30
29
28
18
44
41
36
27
[dB]
[dB]
[dB]
[dB]
[dB]
[dB]
[dB]
[dB]
Data rate = 3Mbps
Data rate = 6Mbps
Data rate = 12Mbps
Data rate = 27Mbps
Data rate = 3Mbps
Data rate = 6Mbps
Data rate = 12Mbps
Data rate = 27Mbps
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Renesas Electronics confidential
3.3.2
Transmit characteristic
Frequency range
Output VSWR
Maximum out put Power(ANT_B)
Maximum out put Power(ANT_A)
Minimum out put Power(ANT_B)
Minimum out put Power(ANT_A)
Output Power control range
Power control step
Relative constellation error
Spectrum Mask
(in band)
Min
5850
Typ
2.0
24
-8
-7
-35
30
0.5
-28
-28
-28
-28
-31
-33
-36
-54
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Max
5925
Unit
[MHz]
[dBm]
[dBm]
[dBm]
[dBm]
[dB]
[dB]
[dB]
[dBr/100
KHz]
@5890M
Hz
Condition
5890MHz
5890MHz
5890MHz
5890MHz
5890MHz
5890MHz
Data rate = 3Mbps
Data rate = 6Mbps
Data rate = 12Mbps
Data rate = 27Mbps
4.5MHz
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