Clevo Laptop 2700C Users Manual 2200C_Preface
2700C to the manual a0ccae1f-4741-4886-acb9-58cd1c797ab2
2015-02-05
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Notice The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. ©March, 2001 Preliminary Version Contents Chapter 1: Introduction ........................... 1 - 1 System specifications (general) ................... 1 - 2 Chapter 2: Chipset and Mainboard information ............................ 2 - 1 CPU ............................................................... 2 - 1 Chipsets ........................................................ 2 - 3 SiS630S ............................................................ 2 - 3 PC Card Chipset - PCI1410 ............................. 2 - 11 Ports ............................................................2 - 13 Mainboard....................................................2 - 14 Mainboard components list ............................... 2 - 14 Mainboard photo .............................................. 2 - 15 Chapter 3: Disassembly .......................... 3 - 1 Size chart for screws and hex nuts: .................... 3 - 1 Disassembly steps ....................................... 3 - 2 Steps to remove the CD-ROM/DVD-ROM : .......... 3 - 2 Steps to remove the CPU: ................................... 3 - 2 Steps to remove the FDD: ................................... 3 - 2 Steps to remove the HDD:................................... 3 - 3 Steps to remove the inverter board: ..................... 3 - 3 Steps to remove the LCD panel: .......................... 3 - 3 Steps to remove the mainboard: .......................... 3 - 4 Removal Procedures .................................... 3 - 5 Remove the battery............................................. 3 - 5 Remove the keyboard ......................................... 3 - 6 Remove the HDD assembly ................................ 3 - 7 Remove the CD-ROM\DVD-ROM assembly ......... 3 - 8 Remove the heat sink ......................................... 3 - 9 Applying a heat sink pad .................................... 3 - 9 Remove the CPU .............................................. 3 - 10 Reinstall the CPU ............................................. 3 - 10 Separate the notebook base in two ................... 3 - 11 Remove the FDD assembly ............................... 3 - 14 Remove the CD-ROM tray ................................ 3 - 14 Remove the Fan ............................................... 3 - 14 Remove the mainboard and tray from the bottom case ................................. 3 - 15 Remove the mainboard from the mainboard tray ................................... 3 - 16 The LCD Panel ...........................................3 - 17 Remove the LCD panel frame ........................... 3 - 17 Remove LCD panel from the LCD panel case.... 3 - 18 Remove the LCD panel from the bracket ........... 3 - 20 Appendix A: Mechanical Drawings and Parts Lists ................................................ A - 1 2200C ...........................................................A - 1 Bottom Half assembly and parts list ..................... A - 1 LCD panel (12.1”) assembly and parts list ........... A - 2 LCD panel (13.1” , 15.3”) assembly and parts list ............................................................. A - 3 LCD panel (14.1”) assembly and parts list ........... A - 4 Keyboard and Touchpad assembly ..................... A - 5 Keyboard and Touchpad assembly parts list ........ A - 6 FDD assembly and parts list ............................... A - 7 HDD assembly and parts list ............................... A - 8 CD-ROM assembly and parts list......................... A - 9 DVD-ROM assembly and parts list .................... A - 10 2700C .........................................................A - 11 Bottom half assembly and parts list ................... A - 11 LCD panel (13.3”) assembly and parts list ........ A - 12 LCD panel (14.1”) assembly and parts list ......... A - 13 Keyboard and Touchpad assembly ................... A - 14 Keyboard and Touchpad parts list ..................... A - 15 FDD Assembly and parts list ............................. A - 16 HDD assembly and parts list ............................. A - 17 CD-ROM Assembly and parts list ...................... A - 18 DVD-ROM assembly and parts list .................... A - 19 Appendix B: Schematic Diagrams ......... B - 1 Appendix C: Switch Settings .................. C - 1 Clock Settings (SW6) ........................................ C - 1 Panel ID Settings (SW7) ................................... C - 2 Introduction Chapter 1: Introduction This manual covers information you will need to service or upgrade your Notebook Computer. Information about operating the computer (e.g. getting started, etc...) is in the User’s Manual. Driver Information is also found in the User’s Manual. The User’s Manual is shipped with the computer. Operating Systems (Windows ME, Windows 2000, etc.) have their own manuals as do application software. If you have any questions regarding those, please consult their user’s manual. This manual is intended for service personnel who have completed sufficient training to undertake maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the notebook computer. The following information is covered. – – Specifications Chipset and Mainboard information – – Disassembly Mechanical drawings and Parts Lists – – Schematic Diagrams Switch Settings 1-1 Service Manual System specifications (general) The main unit of the Model 2200C/2700C Notebook PC has the following components: – Intel FC-PGA370 Pentium III with AGP technology-based mainboard, using the SiS630S chipset solution supporting SDRAM with 0MB on-board DRAM, expandable to 32MB, 64MB, 96MB, 128MB, 192MB, 256MB, or 512MB using one or two expansion SODIMMs – user-installed modules: CD-ROM or DVD or CD-RW ROM – main storage (HDD) bay: principal HDD 2.5” 12.7/9.5mm, supports PIO mode 4/ATA-33/66/ 100 (Ultra DMA) and Master mode IDE. – User interfaces - one internal keyboard, 84 keys (depending on the language) - one built-in touchpad - one 1024x768 XGA Color TFT LCD with CCFT backlight, size 13.3” or 14.1”, supports IDCT – Power Solutions - power bay: battery pack - AC adapter 1-2 Introduction CPU ( FC-PGA370 ) Keyboard Intel Celeron-450 Intel Celeron-500 (1.6V) (1.6V) Keys Fn key support 84 YES Intel Celeron-550 Intel Pentium III-600 (1.6V) (1.65V) Integrated numeric keypad Inverted “T” layout cursor keys YES YES Intel Pentium III-650 Intel Pentium III-700 (1.65V) (1.65V) HDD Intel Pentium III-750 Intel Pentium III-800 (1.65V) (1.65V) Easy change module Drive size 6GB or up 2.5” Intel Pentium III-850 Intel Pentium III-866 (1.65V) (1.65V) Height maximum Average access time 12.7mm <13ms> Intel Pentium III-933 (1.65V) Interface PCI local bus master IDE with ultra DMA33/ 66/100 Memory L2 Cache (on die) Celeron(.18) series Pentium III series FDD 128KB 256KB Easy change module 3.5" 1.44MB CD-ROM (MKE CR175)24X On board RAM Upgradable to 0MB 512MB TouchPad built-i n interface x1 PS/2 Easy change module CD type 12.8cm Height Data transfer rate 12.7mm 3600KB/s (max) Random access time Compliance <100m> Multimedia PC-2 Spec. 1-3 Service Manual Transport drawer type load/eject Speaker-out Jack YES Interface PCI local bus master IDE Microphone-in Jack YES BIOS InSyde Power Supply 256KB AC adapter Display AC-in Capacity 100-240V/47-63Hz 65W NiMH/Li-Ion LCD/CRT (simultaneous) VGA/EGA/CGA/Hercules compatible YES YES Battery pack AGP 3D graphics accelerator Adjustable brightness YES YES (standard) Power Saving Management LCD\TFT Backlight CCFT Size Resolution 13.3” or 14.1” 1024x768 Color (CRT) Monitor 16,77M 1280x1024 Support IDCT Doze mode YES PS/2 Sleep mode Suspend/Resume mode YES YES Suspend to HDD mode Hot key control suspend YES YES Closing LCD display off APM ver 1.2 support YES YES ACPI Ver 1.0b support YES Ports Audio Built-in 2 speakers and 1 microphone YES 3D, Sound Blaster compatible 1-4 YES Serial port IrDA/SIR/ASK/FIR x1 x1 Parallel port x1 15 pin external video port x 1 Introduction External 101/102 keyboard port/ PS/2 mouse x 1 PC Card Standard Type I or Type II Modem (RJ-11) port for MDC USB connector speaker-out jack x2 x1 microphone-in jack LAN (RJ45) port x1 x1 x1 x 1 (optional) Physical Dimension Weight 308 mm(W) 254 mm(D) 37.5 mm(H) 3.2KG (with Lithium-lon battery) 1-5 Notes Chipset and Mainboard information Chapter 2: Chipset and Mainboard information CPU The 2200C/2700C Notebook PC uses the Intel Mobile Pentium III/Celeron (.18) processor in an FCPGA370 package. The Intel Mobile Pentium III/Celeron (.18) processor features an integrated L2 cache (256KB for Pentium III and 128KB for Celeron (.18)) and a 64-bit high performance system bus. The Mobile Pentium III/Celeron (.18) processor’s 64-bit wide Low Power Gunning Transceiver Logic system bus is compatible with the SIS630S AGP Set and provides a glue-less, point-to-point interface for an I/O bridge/memory controller. The Intel Pentium III and Celerons (.18) processors are fully compatible with all software written for the Pentium processor with MMX technology, Pentium processor, Intel486 microprocessor, and Intel386 microprocessor. In addition, they provide improved multimedia & communication performance. Their features: – Performance improved over existing mobile processors - Supports the Intel Architecture with Dynamic Execution - Supports the Intel Architecture MMX technology – Integrated primary (L1) instructions and data caches - 4-way set associative, 32-byte line size, 1 line per sector - 16-Kbyte instruction cache and 16-Kbyte writeback data cache - Cacheable range programmable by processor programmable registers – Integrated second level (L2) cache - 4-way set associative, 32-byte line size, 1 line per sector - Operated at full core speed 2-1 Service Manual - 128/256-Kbyte, ECC protected cache data array – Low Power GTL+ system bus interface - 64-bit data bus, 100-MHz operation - Uniprocessor, two loads only (processor and I/O bridge/memory controller) - Short trace length and low capacitance allows for single ended termination – Voltage reduction technology – Pentium III processor clock control - Quick Start for low power, low exit latency clock ‘throttling’ - Deep Sleep mode for extremely low power dissipation – Thermal diode for measuring processor temperature 2-2 Chipset and Mainboard information Chipsets SiS630S The single chipset, SiS630S, provides a high performance/low cost Desktop solution for the Intel Slot 1 and socket 370 series CPU based systems by integrating a high performance North Bridge, advanced hardware 2D/3D GUI engine, Super-South bridge or an external AGP4X Slot. In addition, SiS630S provides a system-on-chip solution that complies with the Easy PC Initiative which supports Instantly Available/OnNow PC technology, USB, Legacy Removal and Slotless Design and FlexATX form factor. By integrating the UltraAGPTM technology and advanced 64-bit graphic display interface, SiS630S delivers AGP 4x performance and memory bandwidth of up to 1 GB/s. In addition, SiS also supports an extra AGP Slot that supports 4X and Fast Write transactions. Furthermore, SiS630S provides powerful hardware decoding DVD accelerator to improve the DVD playback performance. In addition to providing the standard interface for CRT monitors, SiS630S also provides the Digital Flat Panel Port (DFP) for a standard interface between a personal computer and a digital flat panel monitor. SiS630S adopts Share System Memory Architecture which can flexibly utilize the frame buffer size up to 64MB. The “Super-South Bridge” in SiS630S integrates all peripheral controllers/accelerators /interfaces. SiS630S provides a total communication solution including 10/100Mb Fast Ethernet for Office requirement and 1Mb HomePNA for Home Networking. SiS630S offers AC’97 compliant interface that comprises digital audio engine with 3D-hardware accelerator, on-chip sample rate converter, and professional wavetable along with separate modem DMA controller. SiS630S also provides interface to Low Pin Count (LPC) operating at 33 MHz clock which is the same as PCI clock on the host, and dual USB host controllers with six USB ports that deliver better connectivity and 2 x 12Mb band- 2-3 Service Manual width. The built-in fast PCI IDE controller supports the ATA PIO/DMA, and the Ultra DMA33/66/100 function that supports the data transfer rate up to 100 MB/s. It provides the separate data path for two IDE channels that can eminently improve the performance under the multi-tasking environment. The following illustrates the system block diagram Features Host Interface Controller – Supports Intel Slot 1/Socket370 Pentium II/!!! CPUs – Synchronous Host/DRAM Clock Scheme – Asynchronous Host/DRAM Clock Scheme Integrated DRAM Controller – 3-DIMM/6-Bank of 3.3V SDRAM – Supports Memory Bus up to 133 MHz – System Memory Size up to 3 GB – Up to 512MB per Row – Supports 16Mb, 64Mb, 128Mb, 256Mb, 512Mb SDRAM Technology – Suspend-to-RAM (STR) – Relocatable System Management Memory Region – Programmable Buffer Strength for CS#, DQM[7:0], WE#, RAS#, CAS#, CKE, MA[14:0] and MD[63:0] – Shadow RAM Size from 640KB to 1MB in 16KB increments – Two Programmable PCI Hole Areas 2-4 Chipset and Mainboard information Integrated A.G.P. Compliant Target/66Mhz Host-to-PCI Bridge – AGP v2.0 Compliant – Supports Graphic Window Size from 4MBytes to 256MBytes – Supports Pipelined Process in CPU-to-Integrated 3D A.G.P. VGA Access – Supports 8 Way, 16 Entries Page Table Cache for GART to Enhance Integrated A.G.P. VGA Controller Read/Write Performance – Supports PCI-to-PCI Bridge Function for Memory Write from 33Mhz PCI Bus to Integrated A.G.P. VGA – Supports Additional AGP slot with 4X and Fast Write Transaction Meet PC99 Requirements PCI 2.2 Specification Compliant High Performance PCI Arbiter – Supports up to 4 PCI Masters – Rotating Priority Arbitration Scheme – Advanced Arbitration Scheme Minimizing Arbitration Overhead. – Guaranteed Minimum Access Time for CPU And PCI Masters Integrated Host-To-PCI Bridge – Zero Wait State Burst Cycles – CPU-to-PCI Pipeline Access – 256B to 4KB PCI Burst Length for PCI Masters – PCI Master Initiated Graphical Texture Write Cycles Re-mapping – Reassembles PCI Burst Data Size into Optimized Block Size Fast PCI IDE Master/Slave Controller – Supports PCI Bus Mastering 2-5 Service Manual – Native Mode and Compatibility Mode – PIO Mode 0, 1, 2 , 3, 4 – Multiword DMA Mode 0, 1, 2 – Ultra DMA 33/66/100 – Two Independent IDE Channels Each with 16 DW FIFO Virtual PCI-to-PCI Bridge Integrated Ultra AGP VGA for Hardware 2D/3D Video/Graphics Accelerators – Supports Tightly Coupled 64 Bits Host Interface to VGA to Speed Up GUI Performance and Video Playback Frame Rate – AGP v. 2.0 Compliant – Zero-Wait-State 128x4 Post-Write Buffer with Write Combine Capability – Zero-Wait-State 128x4 2-Way Read Ahead Cache Capability – Re-locatable Memory-Mapped and I/O Address Decoding – Flexible Design Shared Frame Buffer Architecture for Display Memory – Shared System Memory Area up to 64MB – Built-in 8K Bytes Texture Cache – Supports High Quality Dithering – Supports Bump Mapping – Supports 8/16/24/32 BPP RGB/ARGB Texture Format – Supports Video YUV Texture in All Supported Texture Formats – 128-Bit 2D Engine with a Full Instruction Set – Maximum 64 MB Frame Buffer with Linear Addressing – Supports Hardware DVD Accelerator – Supports Single Frame Buffer Architecture – Supports Two Independent Video Windows with Overlay Function and Scaling Factors 2-6 Chipset and Mainboard information – Supports YUV-To-RGB Color Space Conversion – Supports Graphic and Video Overlay Function – Supports CD/DVD to TV Playback Mode – Simultaneous Graphic and TV Video Playback Overlay – Supports RGB555, RGB565, YUV422 and YUV420 Video Playback Format – Supports Filtered Horizontal Up and Down Scaling Playback – Supports DVD Sub-Picture Playback Overlay – Supports DVD Playback Auto-Flipping – Built-in Two Video Playback Line Buffers – Built-in Programmable 24-bit True-Color RAMDAC up to 270 MHz Pixel Clock RAMDAC Snoop Function – Built-in Dual-Clock Generator – Supports Multiple Adapters and Multiple Monitors – Built-in PCI Multimedia Interface – Supports Digital Flat Panel Port for Digital Monitor (LCD Panel) – Built-in VESA Plug and Display for CH7003, PanelLinkTM and LVDS Digital Interface – Built-in Secondary CRT Controller for Independent Secondary CRT, LCD or TV digital output – Supports VESA Standard Super High Resolution Graphic Modes - 640x480 - 800x600 16/256/32K/64K/16M colors 120 Hz NI 16/256/32K/64K/16M colors 120 Hz NI - 1024x768 - 1280x1024 256/32K/64K/16M colors 120 Hz NI 256/32K/64K/16M colors 85 Hz NI - 1600x1200 - 1920x1440 256/32K/64K/16M colors 85 Hz NI 8bbp/16bbp 60NI 2-7 Service Manual – Low Resolution Modes – Supports Virtual Screen up to 4096x4096 – Fully Directx 7.0 Compliant – Efficient and Flexible Power Management with ACPI Compliance Low Pin Count Interface – Forwards PCI I/O and Memory Cycles into LPC Bus – Translates 8-/16-bit DMA Cycles into PCI Bus Cycles Advanced PCI H/W Audio & Modem Advanced Power Management – Meets ACPI 1.0 Requirements – Meets APM 1.2 Requirements – ACPI Sleep States Include S1, S3, S4, S5 – CPU Power States Include C0, C1, C2 C3 – Power Button with Override – RTC Day-of-Month, Month-of-Year Alarm – 24-bit Power Management Timer – LED Blinking in S0,S1 and S3 States – System Power-Up Events Include: Power Button, Hot-Key, Keyboard Password/ Hot-Key, RTC Alarm, Modem Ring-In, SMBALT#, LAN, PME#, AC’97 Wake-Up and USB – Wake-Up – Software Watchdog Timer – Power Supply’98 Support – PCI Bus Power Management Interface Spec. 1.0 Integrated DMA Controller 2-8 Chipset and Mainboard information – Two 8237A Compatible DMA Controllers – 8/16- bit DMA Data Transfer – Distributed DMA Support Integrated Interrupt Controller – Two 8237A Compatible DMA Controllers – Two 8259A Compatible Interrupt Controllers – Level- or Edge-Triggered Programmable – Serial IRQ – Interrupt Sources Re-routable to Any IRQ Channel Three 8254 Compatible Programmable 16-bit Counters – System Timer Interrupt – Generate Refresh Request – Speaker Tone Output Integrated Keyboard Controller – Hardwired Logic Provides Instant Response – Supports PS/2 Mouse Interface – Password Security and Password Power-Up – System Sleep and Power-Up by Hot-Key – KBC and PS2 Mouse Can Be Individually Disabled Integrated Real Time Clock (RTC) with 256B CMOS SRAM – Supports ACPI Day-of-Month and Month-of-Year Alarm – 256 Bytes of CMOS SRAM – Provides RTC H/W Year 2000 Solution Universal Serial Bus Host Controller 2-9 Service Manual – OpenHCI Host Controller with Root Hub – Two USB Host Controllers – Six USB Ports – Supports Legacy Devices – Over Current Detection I2C Bus/SMBUS Series Interface Integrated Fast Ethernet Controller and MAC Interface – Plug and Play Compatible – High-Performance 32-Bit PCI Bus Master Architecture with Integrated Direct Memory – Supports Big Endian and Little Endian Byte Alignments – Implements Optional PCI 3.3v Auxiliary Power Source 3.3Vaux Pin And Optional PCI – Supports Software, Enhanced Software, and Automatic Polling Schemes to Internal – PHY Status Monitor and Interrupt – Supports 10base-T, 100base-Tx NAND Tree for Ball Connectivity Testing 672-Balls BGA Package 1.8V Core with Mixed 3.3V and 5V I/O CMOS Technology 2 - 10 Chipset and Mainboard information PC Card Chipset - PCI1410 – The PCI1410 supports the following features: – Ability to wake from D3 hot and D3 cold – Fully compatible with the Intel 430TX (Mobile Triton II) chipset – A 144-Pin Low-Profile QFP (PGE), 144-ball MicroStar Ball Grid Array (GGU) package, or 209-ball MicroStar Ball Grid Array (GHK) package – 3.3-V core logic with universal PCI interfaces compatible with 3.3-V and 5-V PCI signaling environments – Mix-and-match 5-V/3.3-V 16-bit PC Cards and 3.3-V CardBus Cards – Single PC Card or CardBus slot with hot insertion and removal – Burst transfers to maximize data throughput on the PCI bus and the CardBus bus – Parallel PCI interrupts, parallel ISA IRQ and parallel PCI interrupts, serial ISA IRQ with parallel PCI interrupts, and serial ISA IRQ and PCI interrupts – Serial EEPROM interface for loading subsystem ID and subsystem vendor ID – Pipelined architecture allows greater than 130M bps sustained throughput from CardBus-toPCI and from PCI-to-CardBus – Interface to parallel single-slot PC Card power interface switches like the TI TPS2211 – Up to five general-purpose I/Os – Programmable output select for CLKRUN – Five PCI memory windows and two I/O windows available to the 16-bit PC Card socket – Two I/O windows and two memory windows available to the CardBus socket – Exchangeable Card Architecture (ExCA) compatible registers are mapped in memory and I/ O space – Intel 82365SL-DF and 82365SL register compatible – Distributed DMA (DDMA) and PC/PCI DMA 2 - 11 Service Manual – 16-Bit DMA on the PC Card socket – Ring indicate, SUSPEND, PCI CLKRUN, and CardBus CCLKRUN – Socket activity LED pins – PCI Bus Lock (LOCK) – Advanced Submicron, Low-Power CMOS Technology – Internal Ring Oscillator 2 - 12 Chipset and Mainboard information Ports 1 2 3 4 5 6 7 1. Mic-in, headphone 2. USB 6. External monitor 7. Parallel 3. IEEE 1394 4. TV out 8. PS/2 9. AC adapter 8 9 5. Dual USB 2 - 13 Service Manual Mainboard Mainboard components list 1. 2. Microphone connector MDC to RJ-11 connector 15. 16. K/B Controller M33867 HDD connector 3. 4. Panel connector Invertor power connector 17. 18. K/B connector CMOS battery 5. 6. Heat sink fan connector Second Fan connector 19. 20. Choke (for power) MDC connector 7. 8. VR ICS1893 Lan PHY 21. 22. CPU and Memory frequency switch CPU V_Core switch 9. 10. 1394 PHY Core logic SiS630s 23. 24. FDD connector Gold figen (for debug card) 11. 12. Thermal IC TC 1066 Audio Codec 25. 26. Indicative LED and touchpad connector Internal Speaker connector 13. 14. IR TI4410 (PCMCIA + 1394 Controller) 27. CD-ROM connector 2 - 14 Chipset and Mainboard information Mainboard photo 6 1 4 3 2 5 10 9 8 7 11 12 13 16 17 14 18 15 19 20 21 22 23 27 24 25 26 2 - 15 Notes Disassembly Chapter 3: Disassembly To make the disassembly process easier each section may have a box in the page margin. Information contained in the @ boxes inform you what tools will be needed for a given procedure and the amount of screws involved. A i box lists the components that are important for that particular procedure. A @ This box lists the tools needed and the amount of screws used. contains information that may be helpful to you. Examples are shown on the left. All screw and nuts used in the assembly of the Notebook Computer are assigned a letter. If you encounter any problems reassembling the machine, refer to this table to make sure you are using the proper screw or nut. Size chart for screws and hex nuts: Letter Siz e Letter Siz e A 1.7 x 5 mm. J 2.5 x 6 mm. B 2 x 2 mm. K 2.5 x 8 mm. C 2 x 3 mm. L 2.5 x 14 mm. D 2 x 4 mm. M 2.5 x 23 mm. E 2 x 5 mm. N 2.6 x 3.5 mm. F 2 x 10 mm. O 3 x 4 mm. G 2.5 x 3 mm. P Heat sink screw H 2.5 x 4 mm. Q Standoff hex nut I 2.5 x 5 mm. R Hex stud (11 mm.) Note Information in thie box will give possible useful information. i This box lists the names of the relevant parts. 3-1 Service Manual Disassembly steps Note Remember to wear an anti-static wrist strap and remove all power sources when working on the computer From the list below choose the component that you want to disassemble, then follow the steps listed and go to the appropriate page for detailed instruction. Steps to remove the CD-ROM/DVD-ROM : Remove the battery p 3-5 Remove the keyboard Remove the CD-ROM/DVD-ROM assembly p 3-6 p 3-8 Steps to remove the CPU: Remove the battery Remove the keyboard p 3-5 p 3-6 Remove the heat sink Remove the CPU p 3-9 p 3-10 Steps to remove the FDD: 3-2 Remove the battery p 3-5 Remove the keyboard Remove the HDD assembly p 3-6 p 3-7 Seperate thenotebook base in two Remove the FDD assembly from the mainboard p 3-11 p 3-14 Disassembly Steps to remove the HDD: Remove the keyboard Remove the HDD assembly p 3-6 p 3-7 Steps to remove the inverter board: Remove the battery Remove the LCD panel frame p 3-5 p 3-17 Remove the LCD panel from the LCD panel case p 3-18 (up to step 4) Steps to remove the LCD panel: Remove the LCD panel frame Remove the LCD panel and bracket from the LCD panel case p 3-17 p 3-18 Remove the LCD panel from the bracket Remove the LCD panel p 3-20 3-3 Service Manual Steps to remove the mainboard: 3-4 Remove the battery Remove the keyboard p 3-5 p 3-6 Remove the HDD assembly Remove the CD-ROM/DVD-ROM assembly p 3-7 p 3-8 Remove the Heatsink Remove the CPU p 3-9 p 3-10 Seperate thenotebook base in two Remove the FDD assembly p 3-11 p 3-14 Remove the CD-ROM/DVD-ROM tray Remove the fan. p 3-14 p 3-14 Remove the mainboard from the bottom case Remove the mainboard from the mainboard tray p 3-15 p 3-16 Disassembly Removal Procedures @ Remove the battery 1 Philips screwdriver 1. Remove the 2 screws on the battery cover (figure 3-1). 2. Disconnect the battery connector from the computer. 1 screw 3. Slide the battery out of the computer (figure 3-2). i 1) Battery Cover 2) Battery Connector 2 3 M plug 3) Battery Connector 4 4) Battery 1 M figure 3-1 figure 3-2 3-5 Service Manual Remove the keyboard 1. Press the 4 keyboard latches at the top of the keyboard (figure 3-3). 2. Lift the top of the keyboard up and out of the computer (figure 3-4). 3. Remove the keyboard ribbon cable. 1 1 1 1 2 figure 3-3 figure 3-4 3-6 Disassembly Remove the HDD assembly @ 1. Remove 3 screws (D) holding the HDD assembly in place (figure 3-5). 2. Lift the HDD assembly out of the case using the HDD tab (figure 3-6). 1 Philips screwdriver 3 screws i 1) HDD assembly D 2) HDD tab 3) HDD connector D 4) HDD socket D 2 figure 3-5 Note For information on removing the HDD from the HDD assembly go to Appendix A. 3 1 4 figure 3-6 3-7 Service Manual Remove the CD-ROM\DVD-ROM assembly @ 1 Philips screwdriver 1. Remove screw (I) in figure (3-7). 2. Use a small screwdriver to gently push the CD-ROM assembly out of the case figure (3-7). 1 screw Note For information on removing the CD-ROM/ DVD-ROM from the CD-ROM/DVD-ROM assembly go to Appendix A. I figure 3-7 3-8 Disassembly Remove the heat sink 1. Unscrew the 4 screws (P) securing the heat sink to the mainboard (figure 3-8). 2. Lift up the heat sink part way until you see the heat sink cable. Disconnect the cable from the @ 1 Philips screwdriver 1 screw mainboard (figure 3-9). 3. Place the heat sink aside. 2 P P 3 i P P 1 1 1) Heat sink 2) Cable connector 3) Cable 4) Heat sink pad 4 figure 3-8 figure 3-9 Applying a heat sink pad 1. When the heat sink has been removed you will need to apply a new heat sink pad before reinstalling it. To do so simply peel off the old pad and adhere a new one to the same area. 3-9 Service Manual Remove the CPU @ 1. Place the CPU tool over the CPU (figure 3-10). 2. Place a screw driver in the open slot of 1 Regular screwdriver 2 1 CPU tool 1 the CPU socket and move it to the left (figure 3-11). i 3. The CPU is now unlocked from the socket so remove the CPU tool and lift the CPU out of the Socket. 1) CPU figure 3-10 Reinstall the CPU 1. Place the CPU firmly in the socket. 2. Place the CPU tool over the CPU (figure 3-10) 4) Close Slot 3. Place a screwdriver in the close slot of the CPU socket figure (3-12) and move it to the right.. 4. The CPU is now locked into the socket so remove the CPU tool and reinstall the heat sink. 3 figure 3-11 3 - 10 2) CPU Tool 3) Open Slot 4 figure 3-12 Disassembly Separate the notebook base in two @ With the CPU and heatsink, keyboard, HDD and CD-ROM/DVD-ROM drive removed: 1 Philips screwdriver 1 Hex socket wrench 1. Remove screw (I), the LCD panel ground wire and Inverter power ground wire. When rein- Top: 1 Screw 1 Hex nut stalling make sure to place the LCD panel ground wire on top of the case and the Inverter power ground on the inside of the case just above the hex nut (figure 3-14). figure 3-13 Right Side: 1 Screw Bottom: 6 Screws Bottom Rear: 3 Screws 4 i I 5 1 2 1) microphone 3 connector 2) LCD panel connector 3) Inverter power figure 3-14 connecter 4) LCD panel ground 5) Inverter power ground 3 - 11 Service Manual 2. Remove screw (I) (figure 3-15). I figure 3-15 3. Close the LCD panel and go to the right side of the computer and remove screw (I) (figure 3-16). I figure 3-16 3 - 12 Disassembly 4. On the back of the computer just above the ports, remove screws (D) (figure 3-17). D D D figure 3-17 5. Remove all screws (H, K) as shown in (figure 3-18). K K 6. Run a small screwdriver around the rim where the two halves meet and slowly pry the pieces apart. 7. You should be left with figure 3-19 on H page 3-13. H I H figure 3-18 3 - 13 Service Manual @ 1 Philips screwdriver 1 Hex socket wrench FDD: 1 Stand-off Hex nut Remove the FDD assembly Remove the CD-ROM tray 1. Remove screw (I). 2. Remove the Hex nut (Q). 1. Remove screws (I). 2. Remove screw (F) 3. Lift the FDD assembly off of the mainboard. 3. Slide the tray slightly to the right and lift it off of the mainboard. 1 Screw CD-ROM tray 3 Screws 1) Fan Remove the Fan 2 1 1. Unplug fan cable from mainboard. 3 2. Lift out the fan. i I 2) Fan cable 3) Fan cable connector I Q 4) FDD assembly 5) CD-ROM tray 4 Note For information on removing the FDD from the FDD assembly go to Appendix A. F I 5 figure 3-19 3 - 14 Disassembly Remove the mainboard and tray from the bottom case @ 1. Remove screws (F, H) and Hex nut (Q). 2. Lift the mainboard up from the battery side and pull it out of the case. 1 Philips screwdriver 1 Hex socket wrench 2 Screws 1 Hex nut Q F H figure 3-20 3 - 15 Service Manual Remove the mainboard from the mainboard tray @ 1 Hex socket wrench 1 Hex nut i 1. Remove the hex nuts (R) on the parallel port (figure 3-21). 2. Remove the hex nuts (R) on the monitor out port (figure 3-21). 3. Lift the mainboard out of the tray. R 1 R 2 R figure 3-21 1) parallel port 2) monitor port figure 3-22 3 - 16 R figure 3-23 Disassembly The LCD Panel Remove the LCD panel frame D @ D 1. Remove the rubber stoppers in positions D and J (figure 3-24). 1 Philips screwdriver 5 Screws 2. Remove the screws (D, J) (figure 3-24). 3. Run your finger around the middle of the frame and 1 separate the frame from the back (figure 3-25). i J J J figure 3-24 1) Top half of notebook computer 2) LCD panel in back 3) LCD panel frame 2 3 figure 3-25 3 - 17 Service Manual @ Remove the LCD panel and bracket from the LCD panel case 1 Philips screwdriver 1. Remove the bracket (D) screws on the side of the LCD panel (figure 3-26). 2. Remove the 4 screws at the bottom of the LCD screen 6 Screws 3. Remove screws (D) holding securing the inverter board (figure 3-26). i D D 1) Ground wire (for reassembly, please note where the ground wire is attached ) 2) Inverter Board D D 1 I I D 2 D I I figure 3-26 3 - 18 Disassembly 1 i 2 1) Inverter wire cable 2) LCD to inverter wire cable 3) LCD wire cable 4) LCD wire cable figure 3-27 connector 5) LCD bracket 4. Lift the LCD inverter and disconnect the inverter wire cable and the LCD to inverter wire cable (figure 3-27). 5. Lift the LCD screen and bracket out of the case and place it atop the keyboard (figure 3-28). 6. Disconnect the LCD wire cable. 5 5 3 4 figure 3-28 3 - 19 Service Manual @ 1 Philips screwdriver Remove the LCD panel from the bracket 1. Gently lift out the panel. 2. Remove the screws (C) holding the LCD in the bracket (figure 3-29). (small) C C C C figure 3-29 3 - 20 Mechanical Drawings and Parts Lists Appendix A: Mechanical Drawings and Parts Lists 2200C Bottom Half assembly and parts list 2200C A-1 Service manual 2200C LCD panel (12.1”) assembly and parts list A-2 Mechanical Drawings and Parts Lists LCD panel (13.1” , 15.3”) assembly and parts list 2200C A-3 Service manual 2200C LCD panel (14.1”) assembly and parts list A-4 Mechanical Drawings and Parts Lists Keyboard and Touchpad assembly 2200C A-5 Service manual 2200C Keyboard and Touchpad assembly parts list A-6 Mechanical Drawings and Parts Lists FDD assembly and parts list 2200C A-7 Service manual 2200C HDD assembly and parts list A-8 Mechanical Drawings and Parts Lists CD-ROM assembly and parts list 2200C A-9 Service manual 2200C DVD-ROM assembly and parts list A - 10 Mechanical Drawings and Parts Lists 2700C Bottom half assembly and parts list 2700C A - 11 Service manual 2700C LCD panel (13.3”) assembly and parts list A - 12 Mechanical Drawings and Parts Lists LCD panel (14.1”) assembly and parts list 2700C A - 13 Service manual 2700C Keyboard and Touchpad assembly A - 14 Mechanical Drawings and Parts Lists Keyboard and Touchpad parts list 2700C A - 15 Service manual 2700C FDD Assembly and parts list A - 16 Mechanical Drawings and Parts Lists HDD assembly and parts list 2700C A - 17 Service manual 2700C CD-ROM Assembly and parts list A - 18 Mechanical Drawings and Parts Lists DVD-ROM assembly and parts list 2700C A - 19 Notes Schematic Diagrams Appendix B: Schematic Diagrams HA#[3..31] (4) HA# [3..31] HA# 3 HA# 4 HA# 5 HA# 6 HA# 7 HA# 8 HA# 9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 HREQ#[0..4] (4) HRE Q#[0..4] (4) ADS # (2) IE RR# (4) B REQ0# (4) B PRI# (4) BNR# (4) HLOCK # (4) (4) (4) HIT # HITM# (4) DEFER# HT RDY # (4) RS# 0 (4) RS# 1 (4) RS# 2 (2,10) A 20M# (2) CP U_ FE RR# (2,10) IGNNE# (2) P WRGOOD (2,10) SMI# (2) (2) (2) (2) (2) (2) T CK T DO T DI T MS T RST # P REQ# PRDY# T CK R16 8 T DO T DI T MS R16 7 T RST # PREQ# PRDY# (2,10) INTR (2,10) NMI (2,10) ST PCLK# (2,10) S LP # AK8 AH12 AH8 AN9 AL15 AH10 AL9 AH6 AK10 AN5 AL7 AK14 AL5 AN7 AE1 Z6 AG3 AC3 AJ 1 AE3 AB6 AB4 AF6 Y3 AA1 AK6 Z4 AA3 AD4 X6 AC1 W3 AF4 HRE Q#0 AK18 HRE Q#1 AH16 HRE Q#2 AH18 HRE Q#3 AL19 HRE Q#4 AL17 A DS # AN31 IE RR# AE35 B RE Q0# B PRI# B NR# HLOCK# AN29 AN17 AH14 AK20 HIT # HITM# DEFER# AL25 AL23 AN19 HT RDY# RS# 0 RS# 1 RS# 2 G33 E37 C35 E35 AN25 AH26 AH22 AK28 A 20M# CPU_ FE RR# IGNNE # P WRGOOD SMI# AE33 AC35 A G37 AK26 AJ35 4 7 Z744 AL33 AN37 AN35 4 7 Z743 AK32 AN33 J37 A35 INTR NMI S T PCLK # S LP # M36 L37 A G35 AH30 HD# [0..63] U9A A#3 A#4 A#5 A#6 A#7 A#8 A#9 A#1 0 A#1 1 A#1 2 A#1 3 A#1 4 A#1 5 A#1 6 A#1 7 A#1 8 A#1 9 A#2 0 A#2 1 A#2 2 A#2 3 A#2 4 A#2 5 A#2 6 A#2 7 A#2 8 A#2 9 A#3 0 A#3 1 A#3 2 A#3 3 A#3 4 A#3 5 D# 0 D# 1 D# 2 D# 3 D# 4 D# 5 D# 6 D# 7 D# 8 D# 9 D#10 D#11 D#12 D#13 D#14 D#15 D#16 D#17 D#18 D#19 D#20 D#21 D#22 D#23 D#24 D#25 D#26 D#27 D#28 D#29 D#30 D#31 D#32 D#33 D#34 D#35 D#36 D#37 D#38 D#39 D#40 D#41 D#42 D#43 D#44 D#45 D#46 D#47 D#48 D#49 D#50 D#51 D#52 D#53 D#54 D#55 D#56 D#57 D#58 D#59 D#60 D#61 D#62 D#63 REQ#0 REQ#1 REQ#2 REQ#3 REQ#4 A DS # IE RR# B R0 # B PRI# B NR# LOCK# HIT # HITM# DEFER# B P# 2 B P# 3 BPM#0 BPM#1 T RDY # RS# 0 RS# 1 RS# 2 A 20M# FE RR# IGNNE # PW GOOD SMI# DBSY # DRDY # T CK T DO T DI T MS T RST # P REQ# P RDY # PICCLK P ICD1 P ICD0 INIT # FLUSH# RE SET # RE SET # L INT0 #/INTR LINT 1# /NMI BCLK BSEL0 BSEL1 S T PCLK # S LP # CLKREF W1 T4 N1 M6 U1 S3 T6 J1 S1 P6 Q3 M4 Q1 L1 N3 U3 H4 R4 P4 H6 L3 G1 F8 G3 K6 E3 E1 F12 A5 A3 J3 C5 F6 C1 C7 B2 C9 A9 D8 D10 C15 D14 D12 A7 A11 C11 A21 A15 A17 C13 C25 A13 D16 A23 C21 C19 C27 A19 C23 C17 A25 A27 E25 F16 AL2 7 A N27 HD#[0 ..63] HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#1 0 HD#1 1 HD#1 2 HD#1 3 HD#1 4 HD#1 5 HD#1 6 HD#1 7 HD#1 8 HD#1 9 HD#2 0 HD#2 1 HD#2 2 HD#2 3 HD#2 4 HD#2 5 HD#2 6 HD#2 7 HD#2 8 HD#2 9 HD#3 0 HD#3 1 HD#3 2 HD#3 3 HD#3 4 HD#3 5 HD#3 6 HD#3 7 HD#3 8 HD#3 9 HD#4 0 HD#4 1 HD#4 2 HD#4 3 HD#4 4 HD#4 5 HD#4 6 HD#4 7 HD#4 8 HD#4 9 HD#5 0 HD#5 1 HD#5 2 HD#5 3 HD#5 4 HD#5 5 HD#5 6 HD#5 7 HD#5 8 HD#5 9 HD#6 0 HD#6 1 HD#6 2 HD#6 3 HA# [3..31] 1 2 3 4 5 HA#2 8 HA#1 5 HA#1 2 HA#1 3 (4) RP1 7 1 10 2 9 3 8 4 7 5 6 HD# [0..63] 10 9 8 7 6 HD# 0 HD# 6 HD#15 HD# 4 C369 .1U 1 2 3 4 5 RP9 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 HD#10 HD#12 HD#18 HD# 9 C126 .1U 1 2 3 4 5 HA#3 0 HA#2 9 HA#2 6 HA#1 8 RP8 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 C357 .1U 1 2 3 4 5 HA#1 4 HA#7 HA#4 HA#8 HA#1 1 P RDY # (4) HRE Q#4 (4) HRE Q#0 (4) BREQ0 # (4) (4) (4) (4) DRDY# (4) HIT # (4) HT RDY# (4) HITM# DB SY# (4) DRDY# (4) P CLKPIC P ICD1 P ICD0 P CL KP IC (3) P ICD1 (2) P ICD0 (2) A G33 A E37 X4 AH4 INIT # FLUSH# CPURST # INIT # (2,10) FLUSH# (2) CPURST # (4) W3 7 HCLKCPU HCL KCPU (3) AJ3 3 AJ3 1 BS EL 0 BS EL 1 BSEL0 BSEL1 (2,3) (2,3) R30 0 150(1%)(0 805) R29 9 150(1%)(0 805) RS#2 DB SY # RS#0 RP1 6 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 P RDY # HRE Q#4 HRE Q#0 B RE Q0# RS# 2 DB SY # RS# 0 DRDY # HIT # HT RDY# HITM# 1 2 3 4 5 RP1 4 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 TS MC8R-5 6 RS#1 DEFER# HLOCK # HREQ#3 (4) HRE Q#2 (4) B PRI# (4) HRE Q#1 (4) B NR# HRE Q#2 B PRI# HRE Q#1 B NR# 1 2 3 4 5 RP1 5 1 10 2 9 3 8 4 7 5 6 (4) A DS# R308 56 A DS # R314 56 Socket370 P3(.18) Socket370 P3(.18) Socket370 Celeron(.18) 500-550E:1.6V 600-850:1.65V 533-933:1.65V 1G:1.7V V_CMOS A(MAX) FSB 1.5V 1.5V 850:16.2A 100MHz 1.5V 1.5V 1G:19.4A 133MHz 1.5V 2.5V 500:14.2A 66MHz (2) (2) (2) (2) (2) T DI T DO T CK T MS T RST # PRDY# (2) PREQ# (4) CPURST # (26) IT P _RST # T DI T DO T CK T MS T RST # PRDY# PREQ# CPURST # T P187 T P188 T P189 T P190 T P191 T P192 T P193 T P194 IT P_RST # T P195 C48 0 2.0V .1U C48 1C48 2 1 2 3 4 5 HD#40 HD#52 HD#48 HD#59 RP1 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 C4 0 .1U RP2 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 C4 1 .1U RP3 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 C4 2 .1U TS MC8R-5 6 HD#63 HD#57 HD#55 HD#46 C356 .1U C30 7 .1U VCCT C367 .1U VCCT CPURST # 10 9 8 7 6 TS MC8R-5 6 HD#51 HD#49 HD#41 HD#47 TS MC8R-5 6 RP5 1 10 9 2 8 3 7 4 6 5 VCCT 1 2 3 4 5 HD#45 HD#44 HD#42 HD#27 10 9 8 7 6 C28 7 .1U TS MC8R-5 6 VCCT V_IO C322 .1U 1 2 3 4 5 HD#38 HD#36 HD#37 HD#39 C365 .1U 10 9 8 7 6 VCCT HD#28 HD#22 HD#34 HD#43 VCCT RP4 1 10 2 9 3 8 4 7 5 6 TS MC8R-5 6 HD#20 HD# 3 HD# 7 HD#30 C368 .1U TS MC8R-5 6 (4) RS#1 (4) DEFER# (4) HLOCK # (4) HRE Q#3 (4) CPURST # 1 2 3 4 5 HD#24 HD#21 HD#23 HD#16 VCCT C32 5 .1U VCCT TS MC8R-5 6 HA#2 0 HA#2 4 HA#2 3 HA#2 7 10 9 8 7 6 TS MC8R-5 6 HD#26 HD#25 HD#19 HD#33 VCCT RP1 1 1 2 1 10 9 3 2 8 4 3 7 5 4 5 6 TS MC8R-5 6 HD#50 HD#58 HD#53 HD#54 CPU SUPP ORT VTT 1 2 3 4 5 HD#35 HD#32 HD#29 HD#31 VCCT C33 7 .1U VCCT TS MC8R-5 6 HA#5 HA#1 0 HA#2 1 HA#1 9 VCCT 10 9 8 7 6 VCCT RP6 1 2 1 10 9 3 2 8 4 3 7 5 4 5 6 TS MC8R-5 6 HD# 2 HD#14 HD#11 HD#13 VCCT HA#2 5 HA#2 2 HA#1 7 HA#3 1 CELEONP3 VCC_Core RP7 1 10 2 9 3 8 4 7 5 6 TS MC8R-5 6 1 2 3 4 5 HD# 1 HD# 5 HD# 8 HD#17 VCCT TS MC8R-5 6 HA#1 6 HA#3 HA#9 HA#6 DB SY # DRDY # CLK REF (4) HD# [0 ..63] HA#[3 ..31] J33 L35 J35 Y33 (4) HD#56 HD#61 HD#62 HD#60 10 9 8 7 6 C23 4 .1U 71-22C00-D01 ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T itle CPU & AGTL TERMINATION .1U .1 U(R) Size Document Number Custom Date: Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 1 of 31 B-1 Service Manual VCCT VCC_Core 01111 1.30V 01110 1.35V 01101 1.40V 01100 1.45V 01011 1.50V 01010 1.55V 01001 1.60V 01000 1.65V 00111 1.70V 00110 1.75V 00101 1.80V 00100 1.85V 00011 1.90V 00010 1.95V 00001 00000 VCC_CORE 2.00V 2.05V V _CPU C354 C494 .1 U 10 U VCCT V_IO AD36 Z36 AB36 (4) GTLREF C88 C97 C129 C279 C283 4.7U .1 U .1 U .1U .1 U E33 F18 K4 R6 V6 AD6 AK12 AK22 C33 C31 A33 A31 E31 C29 E29 A29 AA33 AA35 AN21 E23 S33 S37 U35 U37 AH20 AK16 AL13 AL21 AN11 AN15 G35 VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC-CORE VCC_1.5 V VCC_2.5 V EDGCTRL/VRSE L CPUPRES# VCC_CMOS VREF0 VREF1 VREF2 VREF3 VREF4 VREF5 VREF6 VREF7 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND NC GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND T HERMT RIP# T HERMDP T HERMDN PLL1 PLL2 A37 AB32 AC33 AC5 AD2 AD34 AF32 AF36 AG5 AH2 AH34 AJ11 AJ15 AJ19 AJ23 AJ27 AJ3 AJ7 AK36 AK4 AL1 AL3 AM10 AM14 AM18 AM2 AM22 AM26 AM30 AM34 AM6 AN3 B12 B16 B20 B24 B28 B32 B4 B8 D18 D2 D22 D26 D30 D34 D4 E11 E15 E19 E7 F20 F24 F28 F32 F36 G5 H2 H34 K36 L5 M2 M34 P32 P36 Q5 R34 T 32 T 36 U5 V2 V34 X32 X36 Y37 Y5 Z2 Z34 C113 C114 C61 C87 C355 10 U 10 U 4.7U 4.7 U 10U 10 U C100 C305 C324 C127 C282 C281 C306 C128 C304 C284 4.7 U 4.7U .1 U .1 U .1 U .1U .1 U .1 U C98 C366 C303 C285 C280 .1 U .1 U .1U .1 U .1U V_IO VCC_CORE V CCT C302 C336 C286 C353 C370 C483 C484 C486 + .1 U .1 U .1 U 4.7 U .1U C150 220U/6.3 V 10 U 10 U 10 U C99 C334 4.7 U .1 U V _CP U VCCT C51 C378 C377 C376 C375 .1 U .1 U .1 U .1 U .1U C374 C488 C489 C491 C492 .1 U .1U .1 U .1 U .1U V_CPU (1,10) ST PCLK# (1,10) SMI# (1,10) INIT # (1,10) INT R (1,10) NMI (1,10) IGNNE# (1,10) A20M# (1,3) BSEL0 (1,3) BSEL1 (1) IERR# (1,10) SLP# (1) PICD0 (1) PICD1 (1) FLUSH# (1) P REQ# (1) TCK (1) TMS (1) TDI (1) TDO (1) T RST # ST PCLK # SMI# INIT# INT R NMI IGNNE# A20M# BSEL0 BSEL1 IERR# SLP# PICD0 PICD1 FLUSH# PREQ# TCK TMS TDI TDO T RST # R312 R313 R134 R70 R69 R133 R311 680 270 1K 1.5 K 1.5 K 1.5 K 1.5 K R147 R148 R110 R315 R280 R288 R111 R281 R321 R322 R169 R316 R320 R R 1.5 K 1.5 K 150 150 1.5 K 1.5 K 1K 1K 150 150 1K VCC3 V_CPU R291 R298 E 1.5 K 4.7 K Q11 C 2N3904 FERR# CPU_FERR# (1 0,26) PWROK PWROK C D18 FERR# CPU_FERR# A PWRGOOD R307 F01J2E (10) (1) PWRGOOD 1.5 K (1) V_IO VCC3 C335 3 T HERMDP 4 T HERMDN R304 VCC3 R79 VCC 15 STBY# DXP 4.7 K Z209 14 ADD1 ADD0 2 7 8 C323 .1 U R295 1K SDA_AT F (25) SCL_AT F (25) ALERT # 0(0805) 0(R)(0805)Z717 R294 1K 12 SMBDAT A DXN SMBCL K 11 (10) ATF_INT # R301 U8 22P C520 4.7U(0805) 1 K Z330 R297 GND(VCC) CRIT1/VCC CRIT 0 OS# NC NC GND GND TC1066 6 10 Z210 Z211 1 5 9 13 16 Z241 Z240 VCC3 R89 R302 R 10 K OS # OS # (26) R305 R303 AG1 Hardware Protect = 95 «× R309 Z810 CRIT1 CRIT0 85 0 0 95 100 0 1 X 0 115 1 0 VCC_CORE 51(1%) C37 AH28 AL31 AL29 T HERMDP T HERMDN W33 U33 P LL1 P LL2 T HERMDP T HERMDN L19 4.7UH(0805) Z806R80 1 4.7K 4.7K(R) VCC_CORE CELEONP3 22U(1206) R292 R282 R283 110 110 R ÂÅ ¤Ñ ¹q ¸£ R293 R V_CPU CLEVO CO. Tit le CPU Size Document Number Cu stom Date: B-2 .1U C89 RTT CTRL Z807 SLEWCTRL Z808 .1 U B VID0 VID1 VID2 VID3 C77 1 AA37 AA5 AB2 AB34 AD32 AE5 AF2 AF34 AH24 AH32 AH36 A J13 A J17 A J21 A J25 A J29 AJ5 AJ9 AK2 AK34 AM12 AM16 AM20 AM24 AM28 AM32 AM4 AM8 B10 B14 B18 B22 B26 B30 B34 B6 C3 D20 D24 D28 D32 D36 D6 E13 E17 E5 E9 F14 F2 F22 F26 F30 F34 F4 H32 H36 J5 K2 K32 K34 M32 N5 P2 P34 R32 R36 S5 T2 T 34 V32 V36 W5 X34 Y35 Z32 CPU VRM SELECT TABLE FOR PPGA P3 VID[4:0] AL35 AM36 AL37 A J37 U9 B VCC_CORE 2 Z811 DEP#0 DEP#1 DEP#2 DEP#3 DEP#4 DEP#5 DEP#6 DEP#7 0 VT T VT T VT T VT T VT T VT T VT T VT T R319 VT T VT T VT T VT T VT T VT T VT T VID0 VID1 VID2 VID3 VID0 VID1 VID2 VID3 AK24 V4 AERR# B36 BERR# AL11 BINIT # AN13AP#0 AN23AP#1 AC37PR# X2 RSP# F10 BR1 G37 NC L33 NC N33 NC N35 NC N37 NC Q33 NC Q35 NC Q37 NC R2 NC W35 NC AK30NC Y1 NC E21 NC E27 VCORE_DE S35 SLEWCTRL RTT CTRL (27) (27) (27) (27) VCC3 AN1 VCC_CORE Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 2 of 31 Schematic Diagrams U26 L 56 1 VDDREF VCC3 15 19 27 30 36 42 6 BEAD C4 44 C399 C4 38 .1U .1U .1U C3 84 C4 41 C389 C446 .1U .1U .1U .1U C443 C3 86 C429 C4 27 4.7U 0.01U 0.01U 0.01U 3 CLOSE TO CLOCK GENERATOR CPUCLKF CPUCLK1 CPUCLK2 VDDREF VDD VDD VDD VDD VDD VDD VDDPCI 46 45 43 Z3 08 R4 79 CPUCLK0 R3 41 CPUCLK1 R3 42 22(R) 10 10 7 8 9 11 12 13 14 FS1 FS2 R3 48 R3 46 R3 47 R3 50 R3 67 R3 68 R3 81 33 33 33 33 33 33 33 PCLKPIC PCLK80P PCL K630 S PCLKTI PCLKLPC PCLKSIO 2 48 FS3 R3 39 R3 40 22 22 LPC14M VOSCI HCLKCPU HCL K630 S HCLKCPU (1) HCLK630S (4) CPUCLK0 C390 CPUCLK1 FS1/PCICLKF FS2/PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCLKPIC (1) PCLK80 P (25) PCLK630S (11) PCLKTI (16) PCLKLPC (20) PCLKSIO (21) AGPCLK0 (7) AGPCLK0 FS2 C393 PCICLK2 C421 PCICLK4 GNDREF FS3/REF0 REF1 GND GND GND GND GNDPCI L 57 47 CLK2.5V 25 26 C3 96 C395 C394 C3 97 4.7U .1U 0.01U .1U 0.01U 44 VDDL CPU PD# Z3 97 Z309 Z311 Z312 Z310 Z313 10K 22 R3 91 R3 92 FS0 TP1 73 TP1 72 TP1 71 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 TP1 68 TP1 65 SCLK SDAT A Z315 R382 FS3 USBCL K FS0 VCC3 USBCLK (10) DCLKREF (4) MEMCLK4 (5) MEMCLK3 (5) MEMCLK2 (5) MEMCLK1 (5) C422 10P 10P(R) C428 C439 SDRAM4 10P(R) 10P(R) C440 SDRAM3 C447 PCICLK6 10P(R) 10P(R) C437 10P FS1 C442 10P PCISTP# R3 90 10K CPUSTP# R3 89 10K SDRAM_STOP R4 80 10K(R) VCC3 PCISTP# PCISTP# CPUSTP# (10) CPUST P# 0 R3 88 SDRAM_STOP 10P 10P C445 SDRAM7 SDRAM5 DCLKREF MEMCLK4 MEMCLK3 MEMCLK2 MEMCLK1 10P 10P C385 C388 SDRAM6 22 22 22 22 22 R3 94 R3 93 R3 69 R3 52 R3 51 10K X2 24 23 18 21 20 17 PCI_ST OP# CPU_ST OP# SDRAM_ST OP# X1 SCL _AT FF SDA_AT FF (20) (7) GNDL CLOSE TO CLOCK GENERATOR (25) SCL_AT FF (25) SDA_AT FF 28 29 31 32 34 35 37 38 40 41 SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM_F0 SDRAM_F1 BEAD C3 87 LPC14M VOSCI 10P 10P C425 C426 REF1 24_48/CPU2 .5_3 .3V# FS0/48MHZ V_IO REF1 10P(R) 10P C420 PCICLK3 PCICLK5 16 22 33 39 10 10P(R) C398 VCC3 CLOSE TO CLOCK GENERATOR 5 4 ICS9248-135 1 1M Y6 2 Z33 Z29 R3 32 14.318MHz_DIP C383 22P C3 82 22P RN64 5 6 7 8 VCC3 VCC3 CLOCK SELEC T 8P4R_ 2.7K 4 Z5 94 3 Z5 96 2 Z5 97 1 Z5 95 R5 23 1 2 3 4 5 1 K Z8 55 6 FS2 FS1 FS0 CPU SDRAM PCI 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 66 100 150 133 66.8 100 100 133 66.8 97 70 95 95 112 97 96.2 100 100 100 100 133.6 133 150 133 66.8 97 105 95 126.7 112 129.3 96.2 33.3 33.3 37.5 33.3 33.4 33.3 37.5 33.3 33.4 32.3 35 31.7 31.7 37.3 32.2 32.1 MD44 (NMI) 1/2 1/3 1/4 1/5 2/5 2/7 2/9 2/11 1/6 1/7 1/8 Reserved 2/13 2/15 2/3 1/2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 MD43 MD42 (INTR) (A20M#) 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 RN60 12 11 10 9 8 7 8 7 6 5 FS0 FS1 FS2 FS3 Z761 Z650 Z761 Z650 1 2 3 4 8P4 R_10 K SW DIP-6 CPU RATIO SELEC T FS3 SW6 R524 MD41 (IGNNE#) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 (1,2) BSEL0 (1,2) BSEL1 BSEL0 BSEL1 R3 99 R3 98 10K 10K 100K VCC3 (5,6) (5,6) (5,6) (5,6) MD44 MD43 MD42 MD41 MD44 MD43 MD42 MD41 R2 23 R2 05 R2 13 R2 22 10K(R) 10K(R) 10K(R) 10K(R) ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T itle CLOCK GENERATOR Size Document Number Custom 0200-03.SCH Date: Monday, March 05, 2001 Rev 2.0 71-22C00-D02 Sheet 3 of 31 B-3 Service Manual MDD[0..63] MDD[0..63] (6) T 25 W28 W27 Y 29 Y 27 Y 26 AA 28 AA 26 AB 28 AB 26 AC29 AC27 AC25 AD28 AD27 Y 25 AG22 A J22 A F21 AH21 A F20 AH20 A J20 AG19 A J19 A F18 AH18 A F17 AG17 A J17 A F16 AH16 T 24 W29 U25 W26 Y 28 V 25 AA 29 AA 27 AB 29 AB 27 V 24 AC28 AC26 AD29 W25 AD26 A F22 AH22 AE 23 AG21 A J21 AG20 AE 22 A F19 AH19 AE 18 AG18 A J18 AD20 AH17 AE 21 AG16 MDD0 MDD1 MDD2 MDD3 MDD4 MDD5 MDD6 MDD7 MDD8 MDD9 MDD10 MDD11 MDD12 MDD13 MDD14 MDD15 MDD16 MDD17 MDD18 MDD19 MDD20 MDD21 MDD22 MDD23 MDD24 MDD25 MDD26 MDD27 MDD28 MDD29 MDD30 MDD31 MDD32 MDD33 MDD34 MDD35 MDD36 MDD37 MDD38 MDD39 MDD40 MDD41 MDD42 MDD43 MDD44 MDD45 MDD46 MDD47 MDD48 MDD49 MDD50 MDD51 MDD52 MDD53 MDD54 MDD55 MDD56 MDD57 MDD58 MDD59 MDD60 MDD61 MDD62 MDD63 VCCT 56 (R) ADS# .1U (3) HCLK63 0S (1) CPURS T# (1) ADS# (1) BNR# (1) BPRI# (1) (1) (1) (1) (1) (1) (1) (1) DBS Y# DEFER# DRDY# HIT# HIT M# HLOCK# HT RDY# B REQ0# (1) (1) (1) RS#2 RS#1 RS#0 (1) (1) (1) (1) (1) HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0 CPURST# ADS# BNR# BPRI# V29 G27 U26 P28 R29 DBSY# DEFER# DRDY# HIT# HIT M# HLOCK# HT RDY# BREQ0# U27 R26 T 27 U28 R24 T 29 P25 G28 RS#2 RS#1 RS#0 V26 R25 U29 HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0 R27 T 26 T 28 R28 P27 HCLK63 0S HA#[31] HA#[30] HA#[29] HA#[28] HA#[27] HA#[26] HA#[25] HA#[24] HA#[23] HA#[22] HA#[21] HA#[20] HA#[19] HA#[18] HA#[17] HA#[16] HA#[15] HA#[14] HA#[13] HA#[12] HA#[11] HA#[10] HA#[9] HA#[8] HA#[7] HA#[6] HA#[5] HA#[4] HA#[3] CPUCLK CPURST# ADS# BNR# B PRI# DBS Y# DEFER# DRDY# HIT# HIT M# HLOCK# HT RDY# B REQ0# U6A CSA#[5] CSA#[4] CSA#[3] CSA#[2] CSA#[1] CSA#[0] DRAM INTERFACE CSB#[5] CSB#[4] CSB#[3] CSB#[2] CSB#[1] CSB#[0] DRAM INTERFACE R78 C86 M24 H26 G29 J26 H29 H27 K27 H28 J29 J27 K26 J28 K28 L26 L27 L28 K29 M25 M26 M27 L29 N25 N28 M28 M29 N29 N26 P24 N27 HOST INTERFACE HA#31 HA#30 HA#29 HA#28 HA#27 HA#26 HA#25 HA#24 HA#23 HA#22 HA#21 HA#20 HA#19 HA#18 HA#17 HA#16 HA#15 HA#14 HA#13 HA#12 HA#11 HA#10 HA#9 HA#8 HA#7 HA#6 HA#5 HA#4 HA#3 MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0 (1) HA# [3..31] RS#[2] RS#[1] RS#[0] MA [14] MA [13] MA [12] MA [11] MA [10] MA[9] MA[8] MA[7] MA[6] MA[5] MA[4] MA[3] MA[2] MA[1] MA[0] DQM[7] DQM[6] DQM[5] DQM[4] DQM[3] DQM[2] DQM[1] DQM[0] WE# HREQ#[4] HREQ#[3] HREQ#[2] HREQ#[1] HREQ#[0] SRAS# SCAS# SDCLK AE24 AG24 AF24 AJ25 AH25 AG25 AF28 AF29 AA25 AE25 AE26 AE27 Z577 Z578 TP82 TP102 ICSA#3 ICSA#2 ICSA#1 ICSA#0 Z551 Z552 Z547 Z550 Z548 Z549 ICSA#[0..3] (6) IMA[0..14] (6) IDQM[0..7] (6) TP100 TP99 TP72 TP83 TP101 TP98 AB25 AF27 AF26 AG29 AG28 AG27 AH28 AB24 AH27 AD24 AJ27 AG26 AH26 AJ26 AF25 IMA14 IMA13 IMA12 IMA11 IMA10 IMA9 IMA8 IMA7 IMA6 IMA5 IMA4 IMA3 IMA2 IMA1 IMA0 Y24 AE28 AF23 AG23 AD25 AE29 AJ24 AD22 IDQM7 IDQM6 IDQM5 IDQM4 IDQM3 IDQM2 IDQM1 IDQM0 AH23 Z30 R177 10 RAMW# AH24 AJ23 Z31 Z32 R178 R176 10 10 SRAS# SCAS# AJ16 RAMW# (5) SRAS# SCAS# (5) (5) DCLKREF DCLKREF (3) VCC3 + C359 1 0U 0 Z34 C338 C360 1U 0.0 1U V27 AE 19 CPUAVDD SDAVDD HOST DATA BUS CK E VSSQA VSSQB GTLVREFA CPUAVS S SDAVSS E21 A19 C19 B20 B21 B19 A21 A20 D19 E20 D20 B22 C22 C20 A22 D21 A23 C21 B23 C23 A25 E22 D22 D24 D23 C25 B25 C24 E25 F22 D25 E23 B26 E24 C26 A26 A27 D26 B27 C27 B28 F24 C28 D28 H24 C29 E26 D27 J25 E28 D29 E27 H25 K24 F25 F27 E29 F26 L25 K25 F29 F28 G26 G25 V28 AE 20 630SCKE 630 SCKE (6) VCCT HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54 HD#53 HD#52 HD#51 HD#50 HD#49 HD#48 HD#47 HD#46 HD#45 HD#44 HD#43 HD#42 HD#41 HD#40 HD#39 HD#38 HD#37 HD#36 HD#35 HD#34 HD#33 HD#32 HD#31 HD#30 HD#29 HD#28 HD#27 HD#26 HD#25 HD#24 HD#23 HD#22 HD#21 HD#20 HD#19 HD#18 HD#17 HD#16 HD#15 HD#14 HD#13 HD#12 HD#11 HD#10 HD#9 HD#8 HD#7 HD#6 HD#5 HD#4 HD#3 HD#2 HD#1 HD#0 R77 E9 B24 P26 GTLVREFB P29 A24 R275 C76 Si S63 0S 7 5 (1%) 100 0P GTLREF GTLREF (2) R284 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 C75 (1) HD# [0..63] 15 0 (1%) 100 0P HD#[0..63] ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. Title 630(NORTHBRIDGE) Size Document Number Custom 0200-04.SCH Date: B-4 Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 4 of 31 Schematic Diagrams VCC3 BANK0 MEM_VCC MEM_VCC BANK1 MEM_VCC MEM_VCC L24 BEAD(1206) MEM_VCC C516 C515 MD[0..63] (3,6,9) MD[0..63] MD[0..63] .1U MD[0..63] C20 9 C C205 .1U .1U MEM_VCC C195 + C203 10U 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 GND MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 GND DQM0 DQM1 .1U (6) (6) DQM0 DQM1 (6) (6) (6) MA 0 MA 1 MA 2 MA0 MA1 MA2 GND MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 GND C204 C CN24 VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS CE0#/DQM0 CE1#/DQM1 VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 DQ13 DQ14 DQ15 VSS RES VD/DQ64 RES VD/DQ65 V SS DQ32 DQ33 DQ34 DQ35 V CC DQ36 DQ37 DQ38 DQ39 V SS CE 4#/DQM4 CE 5#/DQM5 V CC A3 A4 A5 V SS DQ40 DQ41 DQ42 DQ43 V CC DQ44 DQ45 DQ46 DQ47 V SS RE SVD/DQ68 RE SVD/DQ69 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 GND MD32 MD33 MD34 MD35 GND MD0 MD1 MD2 MD3 MD36 MD37 MD38 MD39 GND DQM4 DQM5 MD4 MD5 MD6 MD7 GND DQM0 DQM1 DQM4 MA3 MA4 MA5 GND MD40 MD41 MD42 MD43 DQM5 (6) (6) (6) DQM0 DQM1 MA 3 MA 4 MA 5 (6) (6) (6) (6) (6) (6) (6) MA0 MA1 MA2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 MA0 MA1 MA2 GND MD8 MD9 MD10 MD11 MD44 MD45 MD46 MD47 GND MD12 MD13 MD14 MD15 GND C217 CN2 5 VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS CE0#/DQM0 CE1#/DQM1 VCC A0 A1 A2 VSS DQ8 DQ9 DQ1 0 DQ1 1 VCC DQ1 2 DQ1 3 DQ1 4 DQ1 5 VSS RES VD/DQ64 RES VD/DQ65 V SS DQ32 DQ33 DQ34 DQ35 V CC DQ36 DQ37 DQ38 DQ39 V SS CE 4#/DQM4 CE 5#/DQM5 V CC A3 A4 A5 V SS DQ40 DQ41 DQ42 DQ43 V CC DQ44 DQ45 DQ46 DQ47 V SS RE SVD/DQ68 RE SVD/DQ69 CLK 0 VCC RAS # WE# CS0 # CS1 # QE# VSS RES VD/DQ66 RES VD/DQ67 VCC DQ1 6 DQ1 7 DQ1 8 DQ1 9 VSS DQ2 0 DQ2 1 DQ2 2 DQ2 3 VCC A6 A8 VSS A9 A10 VCC CE2#/DQM2 CE3#/DQM3 VSS DQ2 4 DQ2 5 DQ2 6 DQ2 7 VCC DQ2 8 DQ2 9 DQ3 0 DQ3 1 VSS SDA VCC CKE0 V CC CAS# CKE1 A12 A13 CLK1 V SS RE SVD/DQ70 RE SVD/DQ71 V CC DQ48 DQ49 DQ50 DQ51 V SS DQ52 DQ53 DQ54 DQ55 V CC A7 BA 0/A1 1 V SS BA 1/A1 2 A13 V CC CE 6#/DQM6 CE 7#/DQM7 V SS DQ56 DQ57 DQ58 DQ59 V CC DQ60 DQ61 DQ62 DQ63 V SS SCL V CC 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 GND MD32 MD33 MD34 MD35 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 CKE2 MD36 MD37 MD38 MD39 GND DQM4 DQM5 MA3 MA4 MA5 GND MD40 MD41 MD42 MD43 DQM4 DQM5 (6) (6) MA 3 MA 4 MA 5 (6) (6) (6) CKE2 (6) MD44 MD45 MD46 MD47 GND C FB1 Z651 (3) MEMCLK1 BE AD (4) S RAS # (4) RAMW# (6) CS A#0 (6) CS A#1 SRAS# RAMW# CSA#0 CSA#1 Z207 GND R193 1K(R) MD16 MD17 MD18 MD19 GND MD20 MD21 MD22 MD23 (6) (6) MA 6 MA 8 (6) (6) MA 9 MA10 (6) (6) DQM2 DQM3 MA6 MA8 GND MA9 MA10 DQM2 DQM3 GND MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 GND SDA_RA (25) SDA_RA 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 CLK0 VCC RAS # WE# CS0# CS1# QE# VSS RES VD/DQ66 RES VD/DQ67 VCC DQ16 DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC A6 A8 VSS A9 A10 VCC CE2#/DQM2 CE3#/DQM3 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS SDA VCC CKE0 V CC CAS# CKE1 A12 A13 CLK1 V SS RE SVD/DQ70 RE SVD/DQ71 V CC DQ48 DQ49 DQ50 DQ51 V SS DQ52 DQ53 DQ54 DQ55 V CC A7 BA0/A11 V SS BA1/A12 A13 V CC CE 6#/DQM6 CE 7#/DQM7 V SS DQ56 DQ57 DQ58 DQ59 V CC DQ60 DQ61 DQ62 DQ63 V SS SCL V CC 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 FB3 CKE0 CKE0 SCAS# CKE1 MA14 (6) S CAS # (4) CKE1 (6) MA14 R192(6) Z205 Z652 GND 1K (4) (4) (6) (6) BE AD S RAS # RA MW# CSA#2 CSA#3 SRAS# RAMW# CSA#2 CSA#3 Z208 GND FB 2 ME MCLK2 BE AD C216 MD48 MD49 MD50 MD51 GND MD52 MD53 MD54 MD55 (3) R194 1K(R) MD16 MD17 MD18 MD19 GND MD20 MD21 MD22 MD23 C MA7 MA11 GND MA12 MA13 DQM6 DQM7 GND MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 GND SCL_RA MA 7 MA11 (6) (6) (6) (6) MA6 MA8 MA12 MA13 (6) (6) (6) (6) MA9 MA10 DQM6 DQM7 (6) (6) (6) (6) DQM2 DQM3 S CL_RA 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 Z653 (3) MEMCLK 3 (25) MA6 MA8 GND MA9 MA10 DQM2 DQM3 GND MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 GND SDA_RB (25) SDA _RB SOCK ET -DIMM144-R MEM_V CC SCAS# CKE3 MA14 S CAS # (4) CKE3 (6) MA14 R195(6) Z206 Z654 GND 1K FB4 ME MCLK4 BE AD MD48 MD49 MD50 MD51 (3) C21 8 C MD52 MD53 MD54 MD55 MA7 MA11 GND MA12 MA13 MA 7 MA11 DQM6 DQM7 GND MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 GND SCL_RB (6) (6) MA12 MA13 (6) (6) DQM6 DQM7 (6) (6) S CL_RB (25) SOCKET-DIMM144 MEM_VCC MEM_V CC C416 C409 C415 C41 3 C411 C414 C412 C410 C196 C402 C197 C19 3 C194 C400 C198 C408 C406 C404 C407 C405 C403 C401 10U 10U .1U .1U .1U 0.01U 0.01U 0.01U 0.01U .1U .1U .1U .1U 10U 10U .1U .1U .1U 0.01U 0.01U 0.01U 0.01U ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. T it le SODIMM Size Document Number Custom 0200-05.SCH Date: Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 5 of 31 B-5 Service Manual (3 ,5,9) MD[0..63] MD[0..63] (4) MDD[0..63] MDD[0..63] VDD3 IMA[0..14] RN17 8P4R_10 RN32 8P4R_10 RN31 8P4R_10 RN30 8P4R_10 MA [0..14] IMA14 IMA13 IMA11 IMA12 IMA7 IMA10 IMA9 IMA8 IMA5 IMA3 IMA6 IMA4 IMA1 IMA2 IMA0 5 6 7 8 5 6 7 8 5 6 7 8 8 7 6 5 4 3 2 1 4 3 2 1 4 3 2 1 1 2 3 4 MA[0..14] (5) RN38 8P4R_10 MA14 MA13 MA11 MA12 MA7 MA10 MA9 MA8 MA5 MA3 MA6 MA4 MA1 MA2 MA0 RN39 8P4R_10 RN40 8P4R_10 RN12 8P4R_10 RN13 8P4R_10 RN10 8P4R_10 RN11 8P4R_10 DQM[0..7] RN29 8P4R_10 RN42 8P4R_10 IDQM6 IDQM5 IDQM7 IDQM4 IDQM2 IDQM3 IDQM0 IDQM1 5 6 7 8 5 6 7 8 4 3 2 1 4 3 2 1 DQM[0..7] (5) DQM6 DQM5 DQM7 DQM4 DQM2 DQM3 DQM0 DQM1 RN25 8P4R_10 RN26 8P4R_10 RN27 8P4R_10 IDQM[0..7] (4) IDQM[0..7] RN28 8P4R_10 RN18 8P4R_10 ICSA#3 ICSA#2 ICSA#1 ICSA#0 (4) ICSA #[0..3] 8 7 6 5 RN41 ICSA#[0..3] CSA#[0..3] 1 2 3 4 CSA#3 CSA#2 CSA#1 CSA#0 CSA #[0..3] (5) RN33 8P4R_10 RN57 8P4R_10 8P4R_10 RN56 8P4R_10 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5 MDD0 MDD1 MDD2 MDD3 MDD4 MDD5 MDD6 MDD7 MDD8 MDD9 MDD10 MDD11 MDD12 MDD13 MDD14 MDD15 MDD16 MDD18 MDD19 MDD17 MDD20 MDD23 MDD22 MDD21 MDD26 MDD25 MDD24 MDD27 MDD28 MDD29 MDD30 MDD31 MDD32 MDD33 MDD34 MDD35 MDD36 MDD37 MDD38 MDD39 MDD40 MDD41 MDD42 MDD43 MDD44 MDD45 MDD46 MDD47 MDD49 MDD50 MDD51 MDD48 MDD53 MDD52 MDD55 MDD54 MDD59 MDD57 MDD58 MDD56 MDD60 MDD61 MDD62 MDD63 VCC3 R219 VDD3 R221 0 0(R) 8 7 6 5 (4) IMA[0..14] MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD18 MD19 MD17 MD20 MD23 MD22 MD21 MD26 MD25 MD24 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD49 MD50 MD51 MD48 MD53 MD52 MD55 MD54 MD59 MD57 MD58 MD56 MD60 MD61 MD62 MD63 RN59 Z657 R401 8.2K 8P4R_270 C448 .1U (4) 630SCKE 1 630SCKE OE1# 2 4 6 8 1A 1 1A 2 1A 3 1A 4 19 U27 20 VCC 18 1Y1 16 1Y2 14 1Y3 12 1Y4 1 2 3 4 RN37 8P4R_10 1 2 3 4 Z406 Z404 Z405 Z407 2A 1 2A 2 2A 3 2A 4 8 7 6 5 CKE0 CKE1 CKE2 CKE3 CKE0 CKE1 CKE2 CKE3 (5) (5) (5) (5) 8P4R_22 OE2# 11 13 15 17 RN58 2Y1 2Y2 2Y3 2Y4 GND 9 7 5 3 Z614 Z764 Z615 Z765 T T T T 10 74LVC244 MD[0..63] MD[0..63] (3 ,5,9) V CC3 MD55 R225 4.7K(R) MD54 R226 4.7K(R) MD53 R224 4.7K(R) MD38 R383 4.7K(R) MD39 R384 4.7K(R) MD31 R400 4.7K MD[55..53]: CLOCK SK EW CONT ROL OF A GP DEFAULT 001 MD38: VGA INTERRUPT FUNCTION 1: ENABLE 0: DISA BLE MD39: VGA ECLK AND MCLK MODE 1: SY NCHRONOUS MODE 0: AS YNCHRONOUS MODE MD31: QUICK ST A RT FUNCTION 1: ENABLE 0: DISA BLE DRAM BUS DAMPING RESISTOR NEAR SIS630S ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T it le RESISTOR Size Document Number Custom 0200-06.SCH Date: B-6 Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 6 of 31 Schematic Diagrams T P76 B[2..7] T P77 T P9 2 R[2 ..7] T P63 T P5 9 T P6 4 G[2 ..7] 33 33 Z385 C1 5 Z386 B1 6 DDC1DATA DDC1CLK Z387 C1 6 A1 1 VOSCI E1 9 C1 4 B1 5 VRSET VVREF VCOMP F1 5 E1 5 DCLKAVDD F1 6 E1 6 DACAVDDC F1 8 F2 0 DACAVDDB E1 4 D1 4 Z55 3 U2 SBA7 G7 SB A 4/G6 SB A 5/G5 SB A 6/G4 A A D3 1/G3 A A D2 8/G2 A A D3 0/G1 A A D2 9/G0 SSYNC VBCL K/ST 2 VBVSYNC/ST 1 VBHSYNC/ST 0 VOSCI SB_ STB SB_ST B# AD_ST B0 AD_ST B0 # RSET VREF COMP AD_ST B1 AD_ST B1 # ECLKAVDD ECLKAVSS AGPCLK DCLKAVDD DCLKAVSS AGPVREF DACAVDDC DACAVSSC AGPRCOMP AGPAVDD1 AGPAVSS1 DACAVDDB DACAVSSB AGPAVDD2 AGPAVSS2 A A D0 A A D1 A A D2 A A D3 A A D4 A A D5 A A D6 A A D7 A A D8 A A D9 A A D1 0 A A D1 1 A A D1 2 A A D1 3 A A D1 4 A A D1 5 ECLKAVDD VBHCLK/RBF# VBCT L0/W BF# VBCTL1/PIPE# A D6 A G1 AF3 AF2 AF1 AE4 AE3 AE2 AE1 A D5 A D4 A D1 A C4 A C3 A C2 A C5 AGPVSSREF Z37 4 Z37 5 Z37 6 Z37 7 Z37 8 T P11 5 T P1 T P86 T P74 T P88 P2 P1 U6 Z38 8 Z38 9 Z36 6 R4 R5 V6 T P62 T P65 T P56 VBCLK VBVSYNC VBHSYNC Z368 Z369 T P61 T P60 AD2 AD3 Z370 Z371 T P10 6 T P93 W1 W2 Z372 Z373 T P75 T P73 AGPCLK0 R[2..7] RN6 1 2 3 4 RN54 1 2 3 4 R2 R3 R4 R5 R6 R7 G[2..7] G2 G3 G4 G5 G6 G7 8P4 R_0 8P4 R_ 0 RN55 1 8P4R_ 0 2 3 4 B[2..7] B2 B3 B4 B5 B6 RN8 1 8P4R_ 0 2 3 4 B7 0 0 R310 R108 (8) VBHSYNC (8) VBVSYNC VBBLANK# 8 7 6 5 8 7 6 5 P0 P1 P2 P3 P4 P5 P6 P7 R0 + R0- 38 39 R1 + R1- 34 35 R2 + R2- 32 33 RCLKIN+ RCLKIN- 8 7 6 5 P8 P9 P1 0 P1 1 8 7 6 5 TXIN0 TXIN1 TXIN2 TXIN3 TXIN4 TXIN5 TXIN6 TXIN7 TXIN8 TXIN9 T XIN1 0 T XIN1 1 13 15 16 18 19 20 P1 6 P1 7 22 23 25 VGCLK VBCLK 26 27 TXOUT2 + T XOUT 2TXCLKO+ T XCLKO- 4 6 7 9 10 12 P1 2 P1 3 P1 4 P1 5 TXOUT0 + T XOUT 0TXOUT1 + T XOUT 1- 44 45 47 48 1 3 VBHSYNC VBVSYNC VBBLANK# (8) 8.2K VGCLK VBCLK PLLVCC T XIN1 2 T XIN1 3 T XIN1 4 T XIN1 5 T XIN1 6 T XIN1 7 (9) (9) RCLKIN+ (9) RCLKIN- (9) VCC3 0(0805) L1 0 C26 4 C26 3 C24 7 .1U 10 00P 4.7U C26 2 C26 1 C32 .1U 10 00P 4.7U 0(0805) L1 1 5 11 17 24 46 GND GND GND GND GND T XCL KIN PWRDW N# R2 + R2- Z39 3 31 36 42 43 L VDSGND L VDSGND L VDSGND N/C T XIN1 8 T XIN1 9 T XIN2 0 (9) (9) R26 0 VCC3 AE9 AD8 Z74 2 L2 0 0(0805) 4.7K VCC3 C11 0 AA2 .1U P3 P2 P1 P0 P4 P5 SiS6 30S VRSET VVREF C273 .1U T P103 140(1%) P7 P8 P9 P10 P11 P13 P14 P15 P16 P17 T P87 T P108 T P9 4 T P8 4 T P11 0 T P11 3 T P8 9 T P9 5 P3 P2 P1 P0 P4 P5 P6 P7 P8 P9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 P1 6 P1 7 C23 9 VCC3 37 L VDSVCC R1 + R1- Z39 4 28 30 PLL GND PLL GND (9) (9) TI SN7 5LVDS84A AE1 0 AD1 0 R276 VCOMP 29 R0 + R0- 60 PLACE T HESE CIRCUITS CLOSE T O SiS 630 T P107 T P114 T P9 1 T P11 1 T P10 5 T P10 4 T P2 40 41 VCC VCC VCC VCC AGPCLK0 (3) AA1 Z36 7 R30 6 AB1 Z38 2 R88 G[2 ..7] VBCLK VBVSYNC (8) VBHSYNC (8) B[2 ..7] T2 T3 AJ 3 Z39 5 (8) R[2 ..7] 4.7U VCC3 VCC3 VCC3 8 7 6 5 HSYNC VSYNC AB3 AB4 AB6 AA5 AB5 10 00P U2 1 2 8 14 21 0(R) R50 T P57 VGCLK Z38 1 10 00P 0 T P90 T P11 2 VGCLK 10 00P R5 6 ENVDD# (9) ENABKKL (13) VBBLANK# R6 T6 10 00P 0(08 05) VCC3 1 2 3 4 Z383 D1 5 Z384 A1 6 Z37 9 Z38 0 C6 0 5 6 7 8 VOSCI ATRDY# ADEVSEL # ASERR# APAR AST OP# AC1 AG2 Z56 1 Z56 2 Z56 3 Z56 4 Z56 5 Z56 6 Z56 7 Z56 8 Z56 9 Z57 0 Z57 1 Z57 2 Z57 3 Z57 4 Z57 5 Z57 6 (3) ROUT GOUT BOUT 33 33 T P3 0 VBCAD/AREQ# VGCLK/AGNT # ENVDD# ENABKKL VBBLANK# C29 8 4 3 2 1 DDC1DATA R35 DDC1CLK R36 (8,9) DDC1DATA (8,9) DDC1CLK ACBE1# ACBE0# R1 R2 R3 C5 9 5 6 7 8 HSYNC VSYNC R24 8 R24 7 U6B SBA2/DDC2CLK SBA1 /DDC2 DAT SBA0/VBBLANK# C5 8 4 3 2 1 HSYNC VSYNC G L15 C5 0 5 6 7 8 (9) (9) B1 4 A1 4 A1 5 RED GREEN BLUE RED GREEN BL UE R Z39 2 4 3 2 1 B (9) (9) (9) T4 G6 T5 G5 U1 G4 W5 G3 V1 G2 U4 Z35 5 U5 Z55 7 V2 R7 V3 R6 V4 R5 V5 R4 W3 R3 W4 R2 Y 1 Z35 7 Z55 8 U3 T1 A A D2 7/R7 A A D2 6/R6 A A D2 5/R5 A A D2 4/R4 A A D2 3/R3 A A D2 2/R2 A A D2 1/R1 R0 /A CB E3 # SB A 3/G7 B 7/AFRA ME # B 6/A IRDY # A A D1 6/B 5 B4 /A CB E2 # A A D1 8/B 3 A A D1 7/B 2 A A D2 0/B 1 A A D1 9/B 0 AB2 Y6 AA4 AA3 Y4 Y5 Y2 Y3 B7 B6 B5 B4 B3 B2 Z35 6 Z55 9 T P58 C29 9C321 1U DACAVDDC L3 8 0 DACAVDDB L4 1 0 ECLKAVDD L40 0 DCLKAVDD L39 0 C C23 8 C23 7 C3 7 C24 3 C242 C34 C29 1 C241 C3 5 C27 2 C24 0 C3 6 0 .01U 1U 10U 0 .01U 1U 10U 0.01U 1U 10U 0.01U 1U 10U C CP1 0 8P4C_C CP9 8P4C_C CP8 CP7 8P4C_C 8P4C_C ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T it le 630(VGA) & LVDS Size Document Number Cus tom 0200-07.SCH Date: Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 7 of 31 B-7 Service Manual VCC VCC3 L61 BEAD(0805) L62 BEAD(0805) C495 C496 4.7U 4.7U L63 BEAD(0805) C497 10U U32 VDD D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 AVDD DVDD DVDD DVDD DVDD C Place cl ose to SIS630S Y V GCLK R509 39 Z787 0 Z767 5 16 30 38 Z768 .1U CSYNC VGCLK Z766 31 C498 C499 C500 C501 C502 C503 P[13..17] (7) 25 CVBS .1U .1U .1U .1U .1U C504 47P Place close to 7005 17 Z805 TP184 21 CN27 1 Z795 22 Z796 20 TP196 D35 DA204U XCLK D36 DA204U AC P[7..11] 15 14 13 12 11 10 9 7 6 4 3 2 1 44 43 42 TP183 P5 P4 P3 P2 P1 P11 P10 P9 P8 P7 P17 P16 P15 P14 P13 AC P[1..5] R511 0 Z788 40 VBVSYNC R512 0 Z789 41 VCC3 VCC3 35 TP186 R515 Z790 R516 4.7K (7,9) DDC1DATA (7,9) DDC1CLK DDC1DATA DDC1CLK R518 R519 0 0 R517 4.7K 29 32 2 C513 270P 1 3 A C 1 R513 75 1% DS/BCO AGND RESETB GND GND SD SC XI XO/FIN 34 SLD GND SLD GND SLD LUMA SLD 5 6 7 8 SVIDEO_CON L66 2 1.2uH(0805) C506 150P L67 2 1.2uH(0805) 1 C507 270P Pl ace close to 7005/6 8 18 28 36 19 23 CRMA Z804 VCC3 Connect to pin 19 ground wi th short/wide trace. V DGND DGND DGND DGND 26 27 Z799 4 C505 47P TP185 H 10K Z791 Z792 37 Pl ace close to 7005/6 A R510 Z798 C 24 360 1% POUT VBHSYNC L65 1.2uH(0805) 2 1 Z801 RSET (7) VBVSYNC C514 150P R508 75 1% Pl ace close to 7005/6 Up to 47MHz (7) VBHSYNC L64 2 1.2uH(0805) ALL COMPONENTS MUST CLOSE TO SVIDEO_CON Anal og and di gital ground should connect to a common ground plane 33 CH7005/6 Z793 Y7 Z794 14.31818MHz+-20PPM C511 10P C512 10P The two external load capaci tors value is eaqual to 2 x crystal internal cap - 12.5pF ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. Title Chrontel CH7005 TV-OUT Size Document Number Custom 0200-08.SCH Date: B-8 Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 8 of 31 Schematic Diagrams (7) R1- (7) R2+ (7) R2- (7) RCLKIN+ (7) RCLK IN- RIN0- R0+ 4 R0- 1 R1+ 4 R1- 1 L53 L 3 RIN0+ R2+ 4 2 RIN0- R2- 1 R1+ R269 18 RIN1+ R1- R270 18 RIN1- R2+ R267 18 RIN2+ R2- R268 18 RIN2- 3 RIN1+ RCLKIN+ 4 RCLKIN+ R265 18 RCLK+ 2 RIN1- RCLK IN- RCLKIN- R266 18 RCLK- C249 C269 C251 C250 C253 C252 C255 C254 10P 10P 10P 10P 10P 10P 10P 10P L52 L ID SW7-1 SW7-2 SW7-3 SW7-4 VMD39 VMD36 VMD33 VMD32 1 12.1" SANY O TM121SV-02L04 1 0 1 0 2 Samsung LT121SU-121 1 0 1 0 3 ADI AA121SJ03 0 0 0 0 4 IBM ITSV53C1 0 0 0 0 5 13.3" LG LP133X7-A2 1 1 0 0 6 Unipac UP133X01 1 1 0 0 7 Acer L133X2-1 1 1 0 0 8 Hy undai HT13X14 1 1 1 0 9 Samsung LT133X5-122 1 1 1 0 10 14.1" Samsung LT141X5-124 1 1 1 0 11 Hy undai HT14X12 1 1 1 0 12 LG LP141X5 1 1 0 0 13 NEC NL10276BC28-11E 1 1 0 0 TX36D01VC0CAA TX36D11VC0CAA LT141x5-122 X X X X 14 HITACHI 15 Samsung ON=H=1 G VSYNC R26 47 (7) HSYNC HSYNC R253 47 Z474 G Q9 S D (7) G (5,6) (5,6) (5,6) (5,6) MD39 MD36 MD33 MD32 5 6 7 8 Z447 Z446 Z444 Z445 VCC3 SW7 BEAD L29 BEAD DDC1CLK AC AC D1 DA204U 3 D Q8 D D D G S SI3456DV 6 LCDVCC 5 4 C256 C231 C230 .1U .1U 4.7U LCDVCC CN15 1 3 5 7 9 11 13 15 17 19 RCLKRCLK+ Z469 DDC1DATA (7,8) DDC1DAT A 2 4 6 8 10 12 14 16 18 20 RIN0RIN0+ RIN1RIN1+ RIN2RIN2+ LCD CONN. 20P R235 2.2K D L26 R4 2.2K C11 C15 220P 220P Z473 VCC CN5 L27 BEAD L43 BEAD Z471 Z470 Z475 Z467 L28 BEAD L30 BEAD L31 BEAD Z466 D16 DA 204U 2 8 7 6 5 Z465 D2 DA 204U 1 SW DIP-4 RED AC RED 1 2 3 4 Z472 R254 C33 R237 C25 R236 C26 75 33P 75 33P 75 33P C9 C10 C12 C13 C14 33P 33P 33P 220P 220P 8 15 7 14 6 13 5 12 4 11 3 10 2 9 1 VCC 16 17 L2 BEAD(0805) CRT CONN. 15P PIN18~29=GND Z464 C16 A C A C .1U A (7) 2 RCLK- S 2N7002 8P4R_2.7K GREEN GREEN 3 RCLK+ VCC3 4 RN63 3 2 1 MD39 MD36 MD33 MD32 BLUE C (7) BLUE 1 R256 47K ENVDD# ENVDD# 2N7002 (7) L D Q10 2N7002 VCC L50 R255 2.2K Q1 S Z477 2 RIN2- OFF=L=0 VCC VSYNC 3 RIN2+ Z390 (7,8) DDC1CLK (7) L 12V VCC Panel L51 . 18 . R272 . R1+ RIN0+ R0- . (7) 18 . R0- R271 . (7) R0+ . R0+ . Close to LCD connector. (7) LAYOUT NOTE: Make sure VIDEOGND is as clean as possible Also, the RED,GREEN,and BLUE signal traces should be shielded with VIDEOGND traces. VCC ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. Title LCD & CRT CON Size Document Number Custom 0200-08.SCH Date: Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 9 of 31 B-9 Service Manual U6C SPKR (24) S PKR (23,24,29) PWR_ON# (16) SUSPEND# EXTSMI# (29) PWRSW# (23) SCI (23) WAKE# (2) ATF_INT# PWR_ON# SUSPEND# (14) (14) (14) (14) (14) (14) (14) (19) (14) (14) 0 Z560 EXTSMI# PWRSW# SCI WAKE# R32 R33 0 0 Z483 Z484 ATF_INT# R249 R279 R14 R34 VCC3 (24,26) (14) R250 ACIN# TXD3 ACIN# TXD3 VR_HI/LO# LO/HI# 10K 10K 10K 0 GV_GATE Z592 B10 A10 A13 B13 D11 C13 SDAT I1 SDAT I0 SDATO SYNC AC_RESET# BIT_CLK (15,18) SDAT I1 (15,18) SDAT I0 (15,18) SDATO (15,18) SYNC (15,18) AC_RESET# (15,18) BIT_CLK B7 A7 D8 C8 B8 C12 D12 E17 F12 C10 F14 C6 E12 D9 D10 TXD0 TXD1 TXD2 RXER T XCLK COL CRS SPDIF MDC RXCLK TXD0 TXD1 TXD2 RXER T XCLK COL CRS SPDIF MDC RXCLK E18 E11 C7 B12 E10 B6 A6 D13 LAD[0..3] SPK PSON# ACPILED EXTSMI# PWRBTN# RING PME# THERM# ACPI LPC LDRQ# LFRAME# SIRQ KBDAT/VR-HI_LO# KBCLK/LO_HI# PMDAT /GV_GATE PMCLK/GP13 KLOCK#/GP14/TXD GP0/PREQ#3/TXD[ GP1/PGNT#3/TXD[ GP2/LDRQ1#/TXD[ GP3/RXER GPIO4/VR-HI_LO# GPIO5/LO_HI# GPIO6/GV_GATE GP7/SPDIF GP8/MDC GP9/RXCLK AC_SDIN[1] AC_SDIN[0] AC_SDOUT AC_SYNC AC_RESET# AC_BIT_CLK NMI SMI# INTR A20M# INIT# IGNNE# FERR# STPCLK# CPUST OP#/CPUSLP KBC HOST GPIO RXDV/OC0# MDIO/OC1# USB AC '97 C5 A4 BATOK C518 C519 C294 C259 100P .1U .1U .1U Z402 Z398 R46 B4 B5 AUXOK PWROK OSC32KHI OSC32KHO 10M Si S630S Y1 1 LANCLK25M RTC BATOK RTCVDD RESERVE2 RESERVE1 F13 F17 VSSA N24 VSSB U24 VSSC VSSD SYSPWGD RTCVSS A5 C4 AUXOK AUXOK A3 (26) ENT EST LPC PULL-HIGH PLACE NEAR TO W83626F (20) LAD0 LAD1 LAD2 LAD3 VCC3 LDRQ# AF5 LFRAME# AH4 AG5 Z758R481 0 SERIRQ C18 D16 D18 B17 A17 B18 A18 C17 D17 Z555 NMI SMI# INTR A20M# INIT# IGNNE# FERR# STPCLK# R257 R48 0 0 T XEN NMI SMI# INTR A20M# INIT# IGNNE# FERR# STPCLK# (1,2) (1,2) (1,2) (1,2) (1,2) (1,2) (2) (1,2) LDRQ# SERIRQ LFRAME# F10 D6 RXDV MDIO RXDV MDIO (14) (14) H5 J5 G5 H6 E5 F5 E6 F6 F8 E7 E8 D7 A12 USBP0USBP0+ USBP1USBP1+ USBP0USBP0+ (15) (15) USBP2USBP2+ USBP3USBP3+ USBP4USBP4+ USBP5USBP5+ USBP3USBP3+ (15) (15) USBCLK (3) SLP# (1,2) CPUSTP# (3) 8 7 6 5 ATF_INT# R47 10K SUSPEND# WAKE# PWR_ON# R251 R252 R455 10K 10K 10K VDD3 VDD3 C9 B9 E13 A9 RXD0 RXD1 RXD2 RXD3 D5 MIICLK R287 TP85 TP109 C297 N2 8P4R_4.7K NEAR TO SiS 630 USBCLK AE7 Z400 AH2 Z401 RN61 1 2 3 4 8 7 6 5 8P4R_1K SLP# CPUSTP# T XEN (14) SMBDATA (25) SMBCLK (25) SMBDATA SMBCLK RN62 1 2 3 4 LAD0 LAD1 LAD2 LAD3 LDRQ# (20) LFRAME# (20) SERIRQ (16,20,21) B2 B3 RXD[0] RXD[1] RXD[2] RXD[3] MII SYSPWGD UV0UV0+ UV1UV1+ UV2UV2+ UV3UV3+ UV4UV4+ UV5UV5+ USBCLK48M USBVDD0 USBVDD1 C AG4 AF4 AJ4 AE5 A8 AG3 AH3 TXEN/GP15/SMBAL# SMBDAT SMCLK SMBUS C274 (26) BATOK RTCVDD LAD0 LAD1 LAD2 LAD3 RXD0 RXD1 RXD2 RXD3 (14) (14) (14) (14) C275 C276 C277 .1U .1U 10U USBP2USBP2+ USBP1USBP1+ RN53 1 2 3 4 8 7 6 5 USBP4USBP4+ USBP5USBP5+ RN4 1 2 3 4 8P4R_15K 8 7 6 5 8P4R_15K VDD3 10 Z716 3 1 Y2 OSC VCC NC GND 4 2 VCC3 C278 .1U 25M OSC 10P Z486 R296 4.7K TXD0 R28 4.7K TXD1 R259 4.7K TXD2 R258 4.7K SPDIF R27 4.7K 2 32.768KHz_DIP C43 C260 10P 10P EXTSMI# EXTSMI# R336 VDD3 10K VDD3 (2,26) D (23) EXTSMI EXTSMI G PWROK D17 C PWROK Q17 S 2N7002 F01J2E A SYSPWGD R286 1.5K SYSPWGD VCC1.8 TXCLK R277 4.7K COL R13 4.7K CRS R231 4.7K MDC R229 4.7K RXCLK R278 4.7K TXEN R230 4.7K RXER R12 4.7K R343 10K VCC3 R327 300(R) Z718 D21 STPCLK# (1,2) C (16) SUSPEND# VCC3 R333 300(R) Z719 Z721 E B CPUSTP# Q14 2N3906(R) SUSPEND (24,25) D Z720 E LED(R) D22 SUSPEND B STPCLK# Q13 2N3906(R) CPUSTP# SUSPEND# G Q29 2N7002 S R426 10K VCC3 ÂÅ ¤Ñ ¹q ¸£ (3) 630S(SOUTHBRIDGE) Size LED(R) Custom Date: B - 10 CLEVO CO. Title C Document Number 0200-09.SCH Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 10 of 31 Schematic Diagrams VCC1.8 Z506 R1 09 0 C112 C1 11 1000 P .1U U6D (16,25) C/B E#[0..3] (16) (16) INTA # INTB # INTC# INTD# (16,25) FRA ME # (16,25) IRDY# (16,25) TRDY # (16) ST OP # C/BE#3 C/BE#2 C/BE#1 C/BE#0 F3 H4 J1 L1 INTA # INTB # INTC# INTD# N1 P4 P5 P3 FRA ME # IRDY # TRDY# ST OP# H3 H2 H1 J2 SE RR# PA R DEV SE L# PLOCK # (16) SE RR# (16) PA R (16) DEV SE L# AJ 15 Z505 C11 33 PCLK630 S PCIRST # (3) P CLK 630S (13,16,20,25) PCIRST # B 11 M6 J3 L4 R31 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 P GNT#[2] P GNT#[1] P GNT#[0] C/B E#[3] C/B E#[2] C/B E#[1] C/B E#[0] INTA # INTB # INTC# INTD# FRAME # IRDY # TRDY # ST OP # SE RR# PA R DEVSEL# PLOCK # D1 E4 J4 E3 K6 E2 E1 F4 F2 K5 F1 G4 G3 G2 G1 L5 K4 K3 M5 K2 K1 L3 N6 L2 M4 N5 M3 M2 M1 N4 P6 N3 A D[0..31] AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 (16,25) AH15 GNT 2# GNT 1# GNT 0# D2 D3 D4 P REQ#[2] P REQ#[1] P REQ#[0] 8 7 6 5 8 7 6 5 4 3 2 1 4 3 2 1 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 1 2 3 4 1 2 3 4 5 6 7 8 5 6 7 8 IDA 0 IDA 1 IDA 2 IDA 3 IDA 4 IDA 5 IDA 6 IDA 7 IDA 8 IDA 9 IDA 10 IDA 11 IDA 12 IDA 13 IDA 14 IDA 15 AE8 AE 12 AG7 A J6 AD12 AF6 AE 11 AH5 A J5 AE6 AG6 AH6 AF7 AH7 A J7 AD13 ICHRDY A IIRQA IDREQA IDACKA # IIORA# IIOWA # IDECSA 0# IDECSA 1# AE 13 AF9 AG8 A J8 AH8 AF8 A J9 AF10 IDS AA 0 IDS AA 1 IDS AA 2 CBLIDA AG9 AE 14 AD14 AH9 RN16 8P 4R_10 RN15 8P4R_10 RN14 8P 4R_10 RN21 8P 4R_10 IDEA VDD C1 C2 C3 IDA 0 IDA 1 IDA 2 IDA 3 IDA 4 IDA 5 IDA 6 IDA 7 IDA 8 IDA 9 IDA 10 IDA 11 IDA 12 IDA 13 IDA 14 IDA 15 U6E IDB 0 IDB 1 IDB 2 IDB 3 IDB 4 IDB 5 IDB 6 IDB 7 IDB 8 IDB 9 IDB 10 IDB 11 IDB 12 IDB 13 IDB 14 IDB 15 AE 17 AG12 AF12 AH11 AE 16 AJ 10 AD15 AE 15 AG10 AH10 AF11 AG11 AJ 11 AD16 AH12 AJ 12 IDB0 IDB1 IDB2 IDB3 IDB 4 IDB 5 IDB 6 IDB 7 IDB 8 IDB 9 IDB 10 IDB 11 IDB12 IDB13 IDB14 IDB15 5 6 7 8 8 7 6 5 5 6 7 8 8 7 6 5 IDB 0 IDB 2 IDB 1 IDB 3 IDB 5 IDB 6 IDB 7 IDB 4 IDB 8 IDB 9 IDB 11 IDB 10 IDB 12 IDB 15 IDB 14 IDB 13 RN23 8P 4R_10 RN36 8P 4R_10 RN34 8P 4R_10 RN35 8P 4R_10 4 3 2 1 1 2 3 4 4 3 2 1 1 2 3 4 SDD0 SDD2 SDD1 SDD3 SDD5 SDD6 SDD7 SDD4 SDD8 SDD9 SDD11 SDD10 SDD12 SDD15 SDD14 SDD13 (13) PDD[0..15] SDD[0..15] (13) PIORDY (13) PIRQ (13) PDRE Q (13) PDDA CK # (13) P DIOR# (13) PDIOW# (13) PDCS 0# (13) PDCS 1# P CICLK PCIRST # (13) P DA 1 (13) P DA 2 (13) P66CB LID (13) P DA 0 S iS 630S PIORDY PIRQ PDREQ PDDACK# PDIOR# PDIOW# PDCS0# PDCS1# R154 R131 R146 R162 R156 R153 R166 R164 1 2 3 4 PDA1 PDA2 P66CBLID PDA0 RN22 10 82 82 33 10 22 33 33 8 7 6 5 IDS AA 1 IDS AA 2 CBLIDA IDS AA 0 ICHRDY A IIRQA IDREQ[A] IDACK#[A] IIOR#[A] IIOW#[A] IDE CS A#[0] IDE CS A#[1] IDS AA [0] IDS AA [1] IDS AA [2] CBLIDA IDE GNT 2# GNT 1# GNT 0# (16) REQ2# REQ1# REQ0# PCI REQ2# REQ1# REQ0# (16) ICHRDY B IIRQB IDRE Q[B] IDACK#[B] IIOR#[B] IIOW#[B] IDE CS B# [0] IDE CS B# [1] IDS AB [0] IDS AB [1] IDS AB [2] CBLIDB AH13 AF15 AD17 AJ 13 AG13 AF13 AH14 AJ 14 AD18 AF14 AG14 AG15 ICHRDYB IIRQB IDREQB IDACKB # IIORB # IIOWB # IDECSB 0# IDECSB 1# IDSAB 0 IDSAB 1 IDSAB 2 CBLIDB R465 R175 R470 R461 R466 R467 R464 R460 8 7 6 5 IDS AB 0 IDS AB 2 CBLIDB IDS AB 1 RN24 8P 4R_33 SIORDY SIRQ SDREQ SDDACK# SDIOR# SDIOW# SDCS0# SDCS1# 10 82 82 33 10 22 33 33 1 2 3 4 SIORDY SIRQ SDRE Q SDDA CK # S DIOR# SDIOW# SDCS 0# SDCS 1# SDA0 SDA2 S66CBLID SDA1 (13) (13) (13) (13) (13) (13) (13) (13) (13) S DA 0 (13) S DA 2 (13) S6 6CB LID (13) S DA 1 (13) 8P 4R_ 33 S iS 630S V CC3 VCC1.8 C344 C348 C315 C317 C314 C333 C327 C328 C329 0.01U 0.01U 0.01U .1U .1U .1U 10U 10U 10U V CC3 PIORDY R157 4.7K SIORDY R459 4.7K PDRE Q R155 5.6K SDREQ R458 5.6K IIRQA R132 10K IIRQB R174 10 K V CC3 VCC3 FRAME# NEAR TO 630S V CC3 C332 C362 C345 C352 C361 C358 C293 0.01U 0.01U 0.01U 10U 10U 10U 10U (16) PERR# PLOCK# PERR# R68 R290 RN2 1 2 3 4 8P4R_10K 8 7 6 5 GNT0# IRDY# GNT2# GNT1# RN52 1 2 3 4 8P4R_10K 8 7 6 5 STOP# DEVSEL# SERR# TRDY# RN3 1 2 3 4 8P4R_10K 8 7 6 5 C/BE#0 C/BE#1 C/BE#2 C/BE#3 8P4R_10K 8 7 6 5 REQ2# REQ1# REQ0# INT B# INT A# INT C# INT D# RN7 1 2 3 4 8P4R_10K 8 7 6 5 R201 3 30 10K 10K RN68 1 2 3 4 PA R R2 89 10K ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T it le 630S(PCI/IDE) Size Document Number Custom 0200-10.SCH Date: Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 11 of 31 B - 11 Service Manual VCC1.8 VCCT V CC3 GTLVTT VCC3 1U C288 .1U C339 .1U C342 .1U C343 .1U C341 .1U C340 .1U C326 .1U C290 .1U C292 .1U .1U VCC1.8 VCC3 C347 .1U C346 .1U C319 .1U C312 .1U C311 .1U C318 .1U C350 .1U C331 .1U C364 .1U C313 .1U C316 .1U C351 .1U VCC1.8 AB10 AB11 AB13 AB18 AB20 H11 H12 H18 J18 L8 M8 N22 T22 Y22 C330 .1U C349 OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD OV DD PV DD PV DD PV DD PV DD PV DD PV DD PV DD PV DD PV DD PV DD PV DD PV DD PV DD PV DD .1U AA10 AA14 AA17 AA21 AB14 AB17 H13 H16 J10 J13 J16 J17 J19 J20 K21 L21 L9 M21 N21 N9 T21 U9 C363 .1U C521 330U VDD3 C246 C244 C245 10U 1U 0.01U VDD3 H9 VDD1.8 J8 IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD IV DD AUX3.3V H19 H20 H21 H22 J21 J22 K22 L22 M22 GTLVTT GTLVTT GTLVTT GTLVTT GTLVTT GTLVTT GTLVTT GTLVTT GTLVTT AA8 AA9 AB8 AB9 N8 P8 P9 U8 V8 V9 W8 W9 Y8 Y9 C309 C289 AA11 AA12 AA13 AA18 AA19 AA20 AA22 AB12 AB19 AB21 AB22 H10 H17 J11 J12 J9 K8 K9 M9 U21 U22 V21 V22 W21 W22 Y21 1U VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ GTLVTT C310 R285 R(1206) R274 0(1206) V CC3 POWER Default : 1-2 V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SD VS SQ VS SQ VS SQ VS SQ VS SQ VS SQ VS SQ VS SQ VS SQ VS SQ VS SQ VS SQ VS SQ VS SQ L13 L14 L15 L16 L17 M12 M13 M14 M15 M16 M17 M18 N11 N12 N13 N14 N15 N16 N17 N18 N19 P14 P15 P18 P19 R14 R15 T14 T15 U14 U15 V14 V15 W13 W14 W15 P16 P17 R16 R17 R18 R19 T16 T17 T18 T19 U16 U17 U18 U19 V16 V17 V18 W16 W17 P11 P12 P13 R11 R12 R13 T11 T12 T13 U11 U12 U13 V12 V13 AUX1.8V U6F Si S630S_3 VDD1.8 C296 C295 C320 10U 1U 0.01U ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. Title 630S(POW ER) Size Document Number Custom 0200-11.SCH Date: B - 12 Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 12 of 31 Schematic Diagrams VCC R363 10 K R362 10 K 14 VCC U23A 74HCT 08 1 HDDDASP# 3 VCC 7 10 K VCC 1 4 2 C174 C191 .1U .1U 10U + C192 100U/10V VCC VCC COVER_SW# COVER CLOSE SW. 4P C173 R365 R364 2.2K 47K 14 3 VCC BEAD(1206) R25 SW1 L22 T he components should be close to the connector. HDD_VCC IDELED# 2 CDDASP# COVER_SW# 4 Z539 5 6 C31 PANEL ENABKKL U23B 74HCT 08 Q18 2N7002 G L60 T he components should be close to the connector. CD_VCC VCC BEAD(1206) S (7) ENABKKL 7 D .1U R129 0 (11,16 ,20,25) CN16 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 HDDRST # PCIRST # PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0 PDD[0..7] PDREQ PDIOW# PDIOR# PIORDY PDDACK# (11) PDREQ (11) PDIOW# (11) PDIOR# (11) PIORDY (11) PDDACK# (11) PIRQ R163 33 R165 10 K PDIRQ PDA1 PDA0 PDCS0# (11) PDA1 (11) PDA0 (11) PDCS0# HDDDASP# HDD_VCC 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 C470 C471 C472 .1U .1U 10U + C222 10U PDD[8..15] PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 VDD VCC CN21 PCSEL Z307 P66CBLID PDA2 PDCS1# TP7 P66CBLID (11) PDA2 (11) PDCS1# (11) (23) IMDAT A (23) IMCL K (24) BAT LED# (24) PWRLED# (24) CHRLED# R152 470 HDD_VCC 1 2 3 4 5 6 7 8 IMDAT A IMCLK BAT LED# PWRLED# CHRLED# C476 C477 33P 33 P T/P X CHR LED 8P HDD c onn. 50P PDD[0..15] R130 0 (1 1,16,20 ,25) CDRST# PCIRST # SDD[0..15] PDD[0..15] (11) SDD[0..15] (11) VCC CN20 (18) CD_L CD_L SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0 R472 10 K SDD[0..7] (11) SIRQ R463 R462 10K 33 (11) SDIOW# (11) SIORDY (11) SDA1 (11) SDA0 (11) SDCS0# SDIOW# SIORDY SDIRQ SDA1 SDA0 SDCS0# CDDASP# CD_VCC SCSEL TP20 R450 470 Z306 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 CD_R CD_ R SDD[8..15] SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 R471 10 K (18) (23) BRIGADJ PANEL BRIGADJ PANEL CN12 L48 L45 L46 BEAD(1206) BEAD BEAD C265 (23) SCROLED# (23) CAPLED# (23) NUMLED# (21) FDDLED# C266 .1U .1U C248 .1U SDREQ SDIOR# SDREQ SDIOR# (11) (11) 1 2 3 4 Z319 Z318 Z317 SCROLED# CAPLED# NUMLED# 5 6 7 8 9 10 FDDLED# IDELED# Z316 INVERTER 10P SDDACK# SDDACK# (11) Z304 TP180 S66CBLID S66CBLID (11) SDA2 SDA2 (11) SDCS1# SDCS1# (11) L44 BEAD(0805) CD_VCC Z305 TP21 CD-ROM conn. 50P ÂÅ ¤ Ñ ¹q ¸£ PINGND1..2 =GND CLEVO CO. Tit le IDE Size Document Number Cus tom 0200-12.SCH Date: Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 13 of 31 B - 13 Service Manual VDD3 C69 REF_IN 5P P4RD P3TD P2LI P1CL P0AC Y3 25M C70 VDD3 (10) (10) (10) (10) T XD3 T XD2 T XD1 T XD0 T XD3 T XD2 T XD1 T XD0 (10) TXEN TXEN R74 8P4R_22 22 TXCLK R86 22 (10) TXCLK 8 RN5 7 6 5 1 2 3 4 Z14 Z15 Z16 Z17 VDD3 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 Z18 Z19 TXER R84 1K Z20 Z21 (10) RXER (10) RXCLK RXDV R85 22 RXCLK R101 22 RXDV R100 22 RXD0 RXD1 RXD2 RXD3 RXD0 RXD1 RXD2 RXD3 4 3 2 1 RN9 5 6 7 8 C67 .1U .1U .1U .1U 2 BEAD(1206) Z22 T XD3 T XD2 T XD1 T XD0 TXEN TXCLK TXER RXTRI VSS_IO RXER RXCLK VDD_IO RXDV RXD0 RXD1 RXD2 VDD3 PVCC3 NOD/REP 10/100SEL TP_CP VSS_T TP_TX+ TP_TXVDD_T VDD_R 10TCSR 100TCSR VSS_R VSS_R TP_RX+ TP_RXVDD_R VDD_R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NOD/REP C68 C106 C105 C71 TP_CP .1U .1U .1U .1U LTX+ LTX10TCSR 100TCSR LRX+ LRX- Z23 Z24 Z25 Z26 SET PHY ADDRESS=00001 SET TRANSMIT TING DRIVING CURRENT VDD3 R118 2K(1%) C122 C 10TCSR ICS1893 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 (10) (10) (10) (10) C102 C83 U7 RXD3 MDC MDIO VSS_IO VSS_D LOCK ANSEL VDD_D DPXSEL HW/SW VSS_R LSTA NC MII/SI RESETN VSS_R (10) RXER .1U C82 Z12 Z13 22 22 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 R65 R66 CRS COL C103 PVCC3 COL CRS VDD_IO REF_OUT REF_IN VDD_IO P0AC VSS_IO VSS_D VSS_R P1CL P2LI VSS_T P3TD VDD_T P4RD CRS COL (10) (10) 1 PVCC3 PVCC3 REF_OUT 5P L17 R82 12.1K VDD3 VDD3 R83 1.54K(1%) 100TCSR 8P4R_22 VDD3 MII/SI HW/SW R98 1.5K RESET - R94 10K C94 P0AC (ADD0) R67 1K P1CL (ADD1) R64 1K P2LI (ADD2) R55 1K P3TD (ADD3) R63 1K P4RD (ADD4) R54 1K C C104 .1U VDD3 (10) (10) MDC MDIO MDC MDIO R99 R97 22 22 Z27 Z28 LRX+ LRX+ R52 CN2 C55 61.9(1%) C Z263 1 2 3 Z264 4 Z663 VDD3 C54 R53 C53 .1U 1.HW/SW=1 HW/SW SWMODE 2.MII/SI=0 MII/SI MII MODE 3.NOD/REP=0 NOD/REP NODE OPERATION R96 R95 R62 1K 1K TP43 61.9(1%) 1K LRXLTX+ LTX- C LRXLTX+ 7 6 8 LTX- R60 R61 TP44 Z517 5 U20 RX+ RXRXC NC TX+ T XC TXNC RD+ RDC RDNC TD+ T DC TDNC 16 14 15 Z78 13 Z518 1 RD+ 2 RD- 10 11 9 Z79 12 Z579 3 TP22 R18 0(R) R19 0(R) 4 5 TD+ 6 T D- Z656 NEAR TO 1893 TP23 Z262 H0009 61.9(1%) 10/100SEL: 10/100MHZ INDECATED LOW=10 BASE-T , HIGH=100BASE-T DPXSEL: HALF OR FULL INDECATED LOW=HALF-DUPLEX, HIGH=FULL-DUPLEX R8 75 61.9(1%) TP_CP Z664 R9 75 R41 75 R40 75 7 9 8 10 LAN RJ-45 8P RING TIP C52 RING TIP Z80 C66 (15) (15) C C21 .1U L7 BEAD(1206) ANSEL: AUTO-NEGOTITATION INDECATED LOW=DISABLE, HIGH=ENABLE 1000P(1210)2KV ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. Title LAN PHY Size Document Number Custom 0200-13.SCH Date: B - 14 Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 14 of 31 Schematic Diagrams BEAD(1206) L13 R262 USBVCC0 BEAD(1206) POLYFUSE SMDC110 C48 10U F1 Z522 VCC US BVCC0 C49 0.01U R261 L12 F2 Z521 VCC 470K US BVCC1 C46 0.01U POLYFUSE SMDC110 C47 10U 560K OC0# OC0# C267 0.01U USBVCC1 USBVCC0 L49 L47 BEAD(1206) BEAD(1206) R263 (10) USBP0- 470K USBVCC1 (10) USBP0+ CN4 1 Z1 USBP0- R3 22 Z324 L1 0 Z3 2 USBP0+ R232 22 Z323 L25 0 Z85 3 VCC 1DATA1DAT A+ 4 R264 560K OC1# OC1# (10) USBP3- C268 0.01U (10) USBP3+ C8 C224 47P(R) 47P(R) R233 15K R2 15K C225 47P USBP3- R238 22 Z325 L32 0 USBP3+ R11 22 Z326 L6 0 GND C7 47P Z523 5 Z86 6 VCC 2DATA- 7 Z2 2DAT A+ 8 VCC3 T P12 (10,18) SDAT O (10,18) AC_RESET# SDAT O A C_RESET# R370 T P11 T P10 Z534 Z535 T P15 T P16 Z536 Z537 0 T P17 MDC_RESET# Z529 C24 47P(R) 47P(R) R10 15K R239 15K C23 47P GND C228 47P USB CON 8P VCC VDD3 Z533 C227 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 CN18 MONO_OUT AUDIO_PD GND MONO_PHONE AUXR R_D AUXL GND CDGND VCC CD_R R_D CD_L R_D GND P_DN 3.3V VCC GND GND 3.3V SYNC SDATA_O SDATA_INB RESET# SDATA_INA GND GND MCLK BCLK VCC 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 Z528 T P14 MODEMSPK Z527 T P13 Z526 Z525 Z530 TP166 TP167 MODEMSPK (18) R354 10K(R) CN14 1 2 HRT XRX N HRT XRX P R7 R20 0 0 RING TIP RING TIP (14) (14) MDC 2P Z524 R353 SYNC SDATI1 SDATI0 0(R) BIT_CLK SYNC SDATI1 SDATI0 (10,18) (10,18) (10,18) BIT_CLK (10,18) R355 0 MDC CON 30P ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. Title USB & MDC CON Size Document Number Custom 0200-14.SCH Date: Friday, November 10, 2000 Rev A 71-22C00-D02 Sheet 15 of 31 B - 15 Service Manual V CC R484 0(R) R485 0 B _V CC C158 .1U M18 M19 R473 R474 R486 0(R) 43k Z761 P19 N18 M17 N19 M15 W14 V14 Z761 G1 L2 P3 W7 W13 M14 J18 F17 A13 B9 A7 P HY_DA TA0 P HY_DA TA1 P HY_DA TA2 P HY_DA TA3 P HY_DA TA4 P HY_DA TA5 P HY_DA TA6 P HY_DA TA7 PHY _CTL0 PHY _CTL1 PHY_CLK PHY_LREQ PHY_LINK ON PHY_LPS C9 E9 B8 L18 L14 K18 K15 J19 F9 A8 C8 L17 K19 K17 K14 J17 B_CD0 B_CD1 B_CD2 B_CD3 B_CD4 B_CD5 B_CD6 B_CD7 B_CD8 B_CD9 B_CD10 B_CD11 B_CD12 B_CD13 B_CD14 B_CD15 C11 B11 A11 C12 B13 C13 A14 C14 F19 G17 J15 G19 F13 G15 F14 C15 D19 G14 F18 E19 E18 E17 A16 E14 B15 B14 B_CA0 B_CA1 B_CA2 B_CA3 B_CA4 B_CA5 B_CA6 B_CA7 B_CA8 B_CA9 B_CA10 B_CA11 B_CA12 B_CA13 B_CA14 B_CA15 B_CA16 B_CA17 B_CA18 B_CA19 B_CA20 B_CA21 B_CA22 B_CA23 B_CA24 B_CA25 E12 H14 G18 H17 F15 F10 B10 B12 A10 F12 B_INPA CK B_IORD# B_IOWR# B_OE# B_WE# B_WP# B_WAIT # B_REG# B_RDY BY# B_RES ET B_INPACK (17) B_IORD# B_IOWR# B_OE # B_WE # B_WP # (17) B_WAIT # (17) B_REG# B_RDYBY # (17) B_RESET (17) E10 C10 L19 A9 J14 H18 F11 E13 B_BVD1# B_BVD2# B_CD1# B_CD2# B_CE1# B_CE2# B_VS1 B_VS2 B_BV D1# B_BV D2# B_CD1# B_CD2# B_CE1# B_CE2# B_VS 1 B_VS 2 B_CA 0 B_CA 1 B_CA 2 B_CA 3 B_CA 4 B_CA 5 B_CA 6 B_CA 7 B_CA 8 B_CA 9 B_CA10 B_CA11 B_CA12 B_CA13 B_CA14 B_CA15 B_CA16 B_CA17 B_CA18 B_CA19 B_CA20 B_CA21 B_CA22 B_CA23 B_CA24 B_CA25 R142 R R143 47 B _CA16 (17) (17) (17) (17) C84 C74 C57 C300 C96 .01U .01U .01U .1U .1U .1U .1U 4.7U C7 F7 B7 E8 A6 F8 P HY_CTL0 P HY_CTL1 P HY_CLK P HY_REQ PHY_LKON P HY_LPS 4 5 2 1 19 15 R103 10 R106 1K R107 10K T PGND 1394CLK R102 R Y4 Z726 Z727 55 54 Z728 Z729 60 59 2 SHORT 24.576MHz C95 10P 6.34K(1%) R11 9 1M DATA 0 DATA 1 DATA 2 DATA 3 DATA 4 DATA 5 DATA 6 DATA 7 40 41 ISO# CPS CNA PWRDN RESET # T ES TM SE SM CTL0 CTL1 PHYCLK/49.152M LREQ C/LK ON LPS PC0 PC1 PC2 T PB1TP B1+ T PA1TP A1+ T PBIAS 1 FILT ER1 FILT ER0 XO XI B_ CD0 B_ CD1 B_ CD2 B_ CD3 B_ CD4 B_ CD5 B_ CD6 B_ CD7 B_ CD8 B_ CD9 B _CD10 B _CD11 B _CD12 B _CD13 B _CD14 B _CD15 30 31 32 2 3 4 5 6 64 65 66 37 38 39 40 41 B_CA 0 B_CA 1 B_CA 2 B_CA 3 B_CA 4 B_CA 5 B_CA 6 B_CA 7 B_CA 8 B_CA 9 B _CA10 B _CA11 B _CA12 B _CA13 B _CA14 B _CA15 Z11 B _CA17 B _CA18 B _CA19 B _CA20 B _CA21 B _CA22 B _CA23 B _CA24 B _CA25 29 28 27 26 25 24 23 22 12 11 8 10 21 13 14 20 19 46 47 48 49 50 53 54 55 56 B _INPACK B _IORD# B_IOWR# B_OE # B _WE # B _WP # B_WAIT # B _REG# B_RDYBY # B _RESET 60 44 45 9 15 33 59 61 16 58 B_BV D1# B_BV D2# B _CD1# B _CD2# B _CE1# B _CE2# B_VS 1 B_VS 2 63 62 36 67 7 42 43 57 T PB2TP B2+ T PA2TP A2+ T PBIAS 2 .1U B _V PP 18 52 V PP1 V PP1 C372 .1U A6 0 A4 4 A4 5 A9 A1 5 A3 3 A5 9 A6 1 A1 6 A5 8 A6 3 A6 2 A3 6 A6 7 A7 A4 2 A4 3 A5 7 1 34 35 68 GND GND GND GND PCMCIA CON 68P 23 24 3 P HYISO# P HYCPS Z812 14 53 P HYCNA Z235 R13 7 4.7K R14 0 390K C109 .1U C107 R87 .1U 27 28 29 Z813 Z814 R138 R141 1K 1K 20 21 22 Z815 Z816 Z817 34 35 36 37 38 R123 R136 R139 R122 R121 R124 4.7K R R R 220 220 T PB 1TPB1+ T PA 1TPA1+ T PB IAS1 43 44 45 46 47 Z818 Z819 P HY3V B+ T PGND 220 T PGND P HY3V T PGND P HY3V T PGND T PB1- (17) TPB1+ (17) T PA1- (17) TPA1+ (17) T PBIAS1 (17) R105 R104 1K 1K T T T T PGND T SB 41LV0 1 ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T itle C72 10P PCMCIA & PHY Size T PGND T PGND Document Number Custom 0200-15.SCH Date: B - 16 C371 A2 9 A2 8 A2 7 A2 6 A2 5 A2 4 A2 3 A2 2 A1 2 A1 1 A8 A1 0 A2 1 A1 3 A1 4 A2 0 A1 9 A4 6 A4 7 A4 8 A4 9 A5 0 A5 3 A5 4 A5 5 A5 6 U4 T PGND T PGND B _V CC 17 51 V CC V CC A3 0 A3 1 A3 2 A2 A3 A4 A5 A6 A6 4 A6 5 A6 6 A3 7 A3 8 A3 9 A4 0 A4 1 R0 R1 56 Z725 PVDD 30 31 42 51 52 AVDD AVDD AVDD AVDD AVDD 25 26 61 62 6 7 8 9 10 11 12 13 1 JP2 C301 (17) (17) R12 0 Z724 P HY3V (17) (17) (17) (17) P HY_D0 P HY_D1 P HY_D2 P HY_D3 P HY_D4 P HY_D5 P HY_D6 P HY_D7 (18) 1394CLK PHY3V R125 R (17) (17) B6 C6 F6 B5 E6 C5 A4 D1 BLM21P221S GPT M00-03 C73 10U B _V CC T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T V CC3 C56 10U B_CD0 B_CD1 B_CD2 B_CD3 B_CD4 B_CD5 B_CD6 B_CD7 B_CD8 B_CD9 B_CD10 B_CD11 B_CD12 B_CD13 B_CD14 B_CD15 C108 .1U(K%) L18 .1U C200 DVDD DVDD DVDD DVDD VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC R10 E7 VCCI VCCL V6 M1 VCCP VCCP ZV_PORT Interface R207 ZV _S CLK ZV _MCLK ZV _P CLK ZV_LRCLK ZV _S DATA ZV _HREF ZV _V SYNC VCC3_A UX PHY VCCD0# VCCD1# 10K 43k V CCCB V CCCB VPPD0 VPPD1 .1U C157 PGND PGND V12 U12 VCCD0# VCCD1# .1U C144 57 58 VPPD0 VPPD1 Miscellaneous .1U C170 AGND AGND AGND AGND AGND AGND (17) V CCD0# (17) V CCD1# A 0/CA D26 A 1/CA D25 A 2/CA D24 A 3/CA D23 A 4/CA D22 A 5/CA D21 A 6/CA D20 A 7/CA D18 A8/CC/B E1# A 9/CA D14 A 10/CAD9 A11/CA D12 A12/CC/BE2# A13/CPAR A1 4/CP ERR# A15/CIRDY # A 16/CCLK A17/CA D16 A 18/CRSVD A19/CBLOCK# A20/CST OP# A21/CDE VSEL# A2 2/CT RDY # A23 /CFRAME # A24/CA D17 A25/CA D19 BVD1 (S T SCHG#/RI#)/CST SCHG BVD2(SP KR#)/CAUDIO CD1#/CCD1# CD2#/CCD2# CE1#/CC/BE0# CE2#/CA D10 VS 1#/CVS1 VS 2#/CVS2 SPK ROUT .1U C185 32 33 39 48 49 50 (17) V PPD0 (17) V PPD1 MF0/INTA # MF1/ZVS EL0#/S DA MF2/PC_RING# MF3 /S ERIRQ MF4/ZV SEL1#/SCL MF5 /LED_SKT MF6 /CLK RUN# C186 DGND DGND DGND DGND U10 SPK ROUT (24) SPK ROUT INTA # INTB # LED_SKT .1U C207 17 18 63 64 W10 V10 P10 W11 U11 P11 Z759 R11 ZVS EL0# PHYSDA TA PC_RING# S ERIRQ PHYSCLK ZV SEL1# ZVS EL0# P HYS DATA PC_RING# S ERIRQ P HYS CLK ZVS EL1# D0/CA D27 D1/CA D29 D2/CRS VD D3/CAD0 D4/CAD1 D5/CAD3 D6/CAD5 D7/CAD7 D8/CA D28 D9/CA D30 D10/CA D31 D11/CAD2 D12/CAD4 D13/CAD6 D14/CRSVD D15/CAD8 INPACK#/CREQ# IORD#/CAD13 IOWR#/CAD15 OE#/CA D11 WE#/CGNT # WP(IOIS16#)/CCLKRUN# WAIT #/CS ERR# REG#/CC/B E3# READY(IREQ#)/CINT # RE SET /CRST # RI_OUT #/P ME# SUSPEND# IDSE L C142 P_R P_R P_R P_R P_R P_R P_R P_R P_R P_R P_R P_R P_R R208 AD21 R171 INTA# R491 INTB# R492 LED_S KT .1U E3 F5 G6 E2 F3 F2 G5 F1 H6 G3 G2 H5 H3 P9 W12 L1 10K 10 0 Z203 Z820 V13 0 Z821 U13 0 R12 T I_PME # SUSPEND# GRST # PRST # FRAME # IRDY # T RDY# DEVSEL# ST OP# PERR# SERR# PAR REQ# GNT # PCLK ZV _Y 0 ZV _Y 1 ZV _Y 2 ZV _Y 3 ZV _Y 4 ZV _Y 5 ZV _Y 6 ZV _Y 7 (17) (17) (22) (10,20,21) (17) (17) V11 M3 P2 N5 R1 P6 R2 P5 R3 T1 H2 H1 M6 PCI4410 C/BE3# C/BE2# C/BE1# C/BE0# R13 U14 W15 V15 R14 U15 W16 T19 (17,23) T I_P ME# (10) S USPE ND# VCC3_A UX (11) A D21 (11) INTA# (11) INTB# (17) LED_SKT K6 P1 W4 U7 PC CARD Interface P12 P13 RSVD RSVD C/B E#3 C/B E#2 C/B E#1 C/B E#0 R189 0(R) GRST # VCC3_A UX R190 0 PCIRST # (11,13,20,25) PCIRST # FRA ME# (11,25) FRAME # IRDY# (11,25) IRDY # T RDY# (11,25) T RDY # DE VSEL # (11) DEVSEL# ST OP# (11) S T OP # PE RR# (11) P ERR# SE RR# (11) S ERR# PAR (11) PAR RE Q0# (11) RE Q0# GNT0# (11) GNT0# PCLK TI (3) PCLK TI PCI Interface C206 U15 P CI4410BGA POWER GROUND ZV_UV0 ZV_UV1 ZV_UV2 ZV_UV3 ZV_UV4 ZV_UV5 ZV_UV6 ZV_UV7 C/B E#[0..3] (11,25) C/B E#[0..3] AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 R17 N14 P15 P17 R18 N15 P18 N17 J1 J2 J3 J6 K1 K2 K3 K5 L3 L6 L5 M2 N1 N2 N3 N6 U5 R6 P7 V5 U6 R7 W6 P8 V7 R8 U8 V8 W8 W9 V9 U9 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 GND GND GND GND GND GND GND GND GND GND GND GND AD[0..31] AD[0..31] A12 H19 .1U A5 E11 A15 H15 L15 R19 P14 R9 W5 M5 J5 E1 .1U (11,25) CN23 VCC3_A UX C143 C159 Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 16 of 31 Schematic Diagrams FD11 C-MARK1 1 FD12 C-MARK1 FD13 C-MARK1 FD9 C-MARK1 FD4 C-MARK1 FD6 C-MARK1 FD7 C-MARK1 47 K 47K FD10 C-MARK1 FD1 C-MARK1 FD14 C-MARK1 FD15 C-MARK1 FD24 C-MARK1 FD23 C-MARK1 ZVSEL0# (16) ZVSEL1# (16) L ED_ SKT (16) H13 2 3 4 5 9 8 7 6 1 H12 2 3 4 5 9 8 7 6 1 HoleC237D107A 2 3 4 5 H9 1 9 8 7 6 HoleC237D107A 2 3 4 5 H10 1 9 8 7 6 2 3 4 5 Hole C237 D107 B H24 9 8 7 6 1 HoleC237D110 2 3 4 5 H20 9 8 7 6 1 HoleC217D110 U16 12 V BVCC BVCC BVCC .1U 11 12 13 B_ VCC VCC 5 6 VCC3 3 4 C212 C213 4.7U .1 U BVPP 16 C187 .1U 4.7 U 10 H22 2 3 4 5 9 8 7 6 1 H17 2 3 4 5 9 8 7 6 1 HoleC237D110 2 3 4 5 H16 1 9 8 7 6 Hol eC237D110 2 3 4 5 H8 1 9 8 7 6 2 3 4 5 HoleC237D110 H5 9 8 7 6 1 HoleC237D110 2 3 4 5 H4 9 8 7 6 1 HoleC237D110 B_ VPP C189 3.3V 3.3V .1U VCCD0# VCCD1# VPPD0 VPPD1 Z217 C188 HoleC237D110 5V 5V OC# GND R191 VCC3_ AUX FD8 C-MARK1 1 R206 R210 9 .1 U FD2 C-MARK1 1 R209 ZVSEL0# ZVSEL1# LED_ SKT C190 4.7U FD17 C-MARK1 .1U(R) Hole C237 D107 B C214 FD18 C-MARK1 .1U(R) 47K C215 FD21 C-MARK1 1 C145 10P8 R_43 K 12 V FD22 C-MARK1 1 B_INPACK (16) B_RESET (16) B_CA22 (16) B_CA15 (16) B_CA21 (16) B_CA20 (16) B_CA14 (16) B_CA19 (16) FD20 C-MARK1 1 B_INPACK B_RESET B_CA22 B_CA15 B_CA21 B_CA20 B_CA14 B_CA19 FD19 C-MARK1 1 RP10 FD16 C-MARK1 C171 VCC3_ AUX 8P4 R_43 K 10 5 FD3 C-MARK1 1 1 2 3 4 6 7 8 9 8P4 R_43 K FD5 C-MARK1 1 B_ RDYBY# (16) B_WAIT # (16) B_BVD2# (16) B_BVD1# (16) (16) (16) (16) (16) 1 B_RDYBY# B_WAIT # B_BVD2# B_BVD1# B_VS2 B_CD2# B_CD1# B_VS1 1 8 7 6 5 (16) B_VS2 B_CD2# B_CD1# B_VS1 1 B_WP# 8 7 6 5 1 1 RN20 2 3 4 1 1 RN19 2 3 4 B_WP# SS1 Hole197D91 1 B_VCC 43K H14 HoleC120D87A H19 HoleC55D55 .1 U 5 VCC3_ AUX R172 H11 HoleC120D87A H18 HoleC55D55 C146 6 1 OC# GND T PS2032(R) H7 Holeoblong 7 1 OUT H3 H6 O90X130D40X87 Hole oblong 8 1 EN H2 HoleC158D158 1 .1 U OUT H1 HoleC158D158 1 1 C172 OUT IN H25 Hol eC158D158 1 4 IN H26 HoleC158D158 1 3 10K(R) T I_PME# T I_PME# VCC3_ AUX 1 2 R173 (16 ,23) 0(1206) U12 1 R151 VCC3 1 2 15 14 VCCD0# VCCD1# VPPD0 VPPD1 VCCD0# VCCD1# VPPD0 VPPD1 2 3 4 5 (16) (16) (16) (16) H15 1 9 8 7 6 2 3 4 5 HoleC217D110 8 7 B+ A D3 F1J4(2A) C Z735 C30 H23 9 8 7 6 1 HoleC237D110 2 3 4 5 H21 9 8 7 6 1 HoleC237D110 0.1u SHDN# TPS2211 10 K L9 L 3 Z731 . 4 R482 0 R483 0(R) VCC (16) TPB1(16) T PB1+ (16) TPA1(16) T PA1+ (16) TPBIAS1 Z756 (16) PHYSCL K (16) PHYSDAT A PHYSCL K PHYSDAT A R199 2.7K 2.7K 8 7 6 5 C210 C211 .1 U 1U U18 VCC WE# SCL SDA S-24C02 2 R24 R23 R22 R21 R42 R43 R44 R45 L8 4 56.2_1% 56.2_1% 56.2_1% 56.2_1% 30 30 30 30 L 3 CN8 7 VPP GND VGND 8 T PB# GND TPB 9 Z733 T PA# GND Z734 TPA 1394_CON CN16 PIN 10 ~ 17 : TPGND Z732 1 2 3 4 5 6 . R200 TPB1T PB1+ TPA1T PA1+ TPBIAS1 AD0 AD1 AD2 GND 1 2 3 4 1 Z730 C270 1U(0805)(K%) R273 4.7K . VCC3_AUX . 1 2 C271 220P ÂÅ ¤ Ñ ¹q ¸£ TPGND CLEVO CO. Tit le PCMCIA POWER TPGND Size Document Number Cus tom 0200-16.SCH Date: Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 17 of 31 B - 17 Service Manual VCC3 R135 DACVCC3 C130 C115 .1U .1U 4.7U U11 R112 Z87 C479 1 9 C116 C167 C184 .1U .1U 10U 25 38 DACGND AUDCLK (10,15) 2 AUDCLK 1394CLK SDATO (10,15) BIT_CLK (10,15) SDATI0 (10,15) SYNC (10,15) AC_RESET# PCIRST# C169 Z327 22 R149 BIT_CLK SDATI0 SYNC AC_RESET# R521 DACGND R150 R160 47 47 R520 0 Z328 Z89 Z832 C168 R183 Z757 DACGND 1K Z107 20K R184 20K R182 R478 20K 20K CD_L CD_GND CD_R SDATA_OUT BIT_CLK SDATA_IN SYNC RESET# 18 19 20 1U Z118 C165 Z117 Z92 Z320 27 28 Z507 Z419 Z418 Z508 Z509 Z510 Z511 Z512 CID0 CID1 Z513 Z420 37 33 34 39 40 41 43 44 45 46 47 48 10U MIC1 (19) SOUND_L (19) SOUND_R (19) R186 R187 1K 1K R185 4.7K CD_L R188 4.7K CD_R DACGND 1U 1U .1U LBP (24) MODEMSPK (15) SOUND_R Z108 C179 Z116 Z109 C166 .1U DACGND SOUND_L XTL_OUT C136 DACGND MIC1 XTL_IN C137 CD_L (13) CD_R (13) DACGND VREF VREFOUT C199 C180 0.01U 0.01U C155 .1U(R) DACGND C119 C117 R116 R115 20K(R) 20K(R) R114 20K(R) TP118 TP127 TP119 TP120 TP3 TP5 MONO_OUT NC NC NC NC NC NC NC NC NC NC NC Z90 Z91 Z113 Z115 Z112 Z111 Z114 C183 C181 C163 C177 C178 C164 C182 0.01U 0.01U 0.01U 0.01U 0.01U 0.01U 0.01U DACGND DACGND 29 30 31 32 AFILT1 AFILT2 CAP1 CAP2 AKM4543 26 42 4 7 23 24 14 15 16 17 22 LINE_IN_L LINE_IN_R AUX_L AUX_R VIDEO_L VIDEO_R MIC2 VSS1 VSS2 status MASTER SLAVE SLAVE SLAVE TP4 0.01U(R) 0.047U(R) CID1 NC NC GND GND 0.01U C151 .1U 10U(R) CID0 NC GND NC GND C162 C176 DACGND C161 .1U Z106 .1U 21 35 36 MIC1 LINE_OUT_L LINE_OUT_R AVDD1 AVDD2 Z105 Z110 0.01U 0.01U C517 DACGND DACGND 6 8 10 11 R C156 10U 3 5 SDATO 12 13 PC_BEEP PHONE DVDD1 DVDD2 AVSS1 AVSS2 (20) R477 R(0805) 1(0805) Z88 (16) 1394CLK DACVCC3 0(0805) C138 R113 DACVCC BEAD(0805) L21 Z422 Z423 Z424 Z421 C132 C131 C139 C141 C140 C154 10U(R) .1U .1U 10U 1000P 1000P DACGND DACGND L14 R(0805) DACVCC 1 VCC Z321 R73 C45 10U(R) 4 10K 2 3 IN U5 OUT OFF# SET GND GND GND GND MAX603 5 7 6 294K,1% Z10 100K SDATI1 R161 100K SDATI0 SDATI1 (10,15) SDATI0 (10,15) AC'97 PULL-DOWN PLACE NEAR TO AC'97 CODEC R51 8 R30 C65 C64 .1U 10U R59 100K L16 BEAD(1206) DACGND C44 .1U ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. Title AUDIO CODEC Size Custom Date: B - 18 Document Number 0200-17.SCH Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 18 of 31 Schematic Diagrams CN22 1 2 3 4 SPEAKERS CONN. 4P 1 2 3 4 R_OUT+ R_OUT L_OUT L_OUT+ VSOUND_L Z95 0.22U C91 10K R81 Z81 Z84 R57 10K Z96 C78 0.22U R58 10K Z98 C79 0.22U VSOUND_R U10 4 Z97 0.22U C90 10K R90 Z82 5 C101 10P R92 R91 10K 15K 3 L_OUT - 10 6 Z99 8 MUT EOUT 7 18 DACVCC C93 1 12 13 24 C118 4.7U .1U R_LINE IN L_HP IN R_HP IN 21 Z83 20 R71 R72 15K 10K C80 INT _MIC 10P L_OUT+ C92 L_LINE IN 1U L_OUT+ R_OUT+ L_OUT - R_OUT - L_BYPASS R_BYPASS SHUTDOWN SE/BTL# HP/LINE# VDD VDD MUT E IN MUTE OUT GND/HS GND/HS GND/HS GND/HS NC NC NC 22 R_OUT+ 15 R_OUT - 19 AMP_DOWN MUT EOUT AMP_DOWN 2 17 23 DACGND L55 BEAD Z94 CN13 1 2 3 INT MIC CONN. 3P (23) VR1 R117 C81 VSOUND_R NEAR TO AKM4543 1U (18) SOUND_R 10K(R) DACGND Z93 PHONE_IN TPA0202 DACGND BEAD Z100 14 16 11 9 L54 (18) SOUND_L DACGND:25,26,27,28,29,30,31,32,33 C120 1U C121 1U 2 Z665 3 1 Z666 6 VSOUND_L DACGND 5 VR-AUDIO DACGND C63 680P C62 680P PIN NC3.4=DACGND DACGND DACGND DACGND INT _MIC DACVCC R242 DACVCC DACGND 7.5K Z103 C226 R17 100K 10U R1 7.5K(R) R6 1K 4 3 DACGND R16 100K PHONE_IN R522 5 2 1 L37 47U/16V_D Z5 Z101 47U/16V_D BEAD Z122 Z102 4 3 CN9 (18) MIC1 MIC1 C257 .1U Z104 R240 1K R241 R243 C232 680P 680P 1K C19 680P Z121 BEAD(0805) 5 2 1 C478 NEAR AKM4543 PIN C258 0.01U 0.01U(R) EXT _SPEAKER C20 0(R) SPDIFOUT C27 + L36 L_OUT+ BEAD Z4 Z556 C28 + L3 R_OUT+ CN1 7.5K DACGND C233 DACGND MIC IN C2 C1 680P .22U(0603) 680P U1 DACGND DACGND DACGND (10) SPDIF (23) SPDIFON SPDIF SPDIFON 8 7 6 5 NO COM NIC NC IN GND NIC VCC PI5A319 1 2 3 4 VCC C29 .1U ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. Title AUDIO AMP Size Document Number Custom 0200-18.SCH Date: Rev A 71-22C00-D02 Monday, March 05, 2001 Sheet 19 of 31 B - 19 Service Manual VCC3 VCC VCC C455 .1U 67 68 69 71 72 73 74 75 114 115 116 117 118 119 121 122 IRQ[3..15] IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 98 97 96 94 93 78 10 9 8 6 7 LAD0 LAD1 LAD2 LAD3 19 18 17 16 VCC3 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15 SD[0..15] SA[0] SA[1] SA[2] SA[3] SA[4] SA[5] SA[6] SA[7] SA[8] SA[9] SA[10] SA[11] SA[12] SA[13] SA[14] SA[15] SA[16] SA[17] SA[18] SA[19] 13 21 14 23 22 SERIRQ LDRQ# VCC3 R358 Z7 24 Z514 36 37 BIOSCS # (24) BIOSCS# R372 4.7K TC 59 86 84 61 92 77 11 12 76 81 AEN IORD# IOWR# IOCHRDY LA [17] LA [18] LA [19] LA [20] LA [21] LA [22] LA [23] SD[0] SD[1] SD[2] SD[3] SD[4] SD[5] SD[6] SD[7] SD[8] SD[9] SD[10] SD[11] SD[12] SD[13] SD[14] SD[15] S MEMW # SMEMR# REFRES H# BALE SBHE# MEMR# MEMW # RTCE N/MASTER# IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 DACK0# DACK1# DACK2# DACK3# DACK5# HEFRA S/DACK6# DACK7# IRQ1/GPIO[0] KB CS#/GPIO[1] MCCS#/GPIO[2] P LE D/GP IO[3] IRQIN/GP IO[4] IRQ8/GPIO[5] RT CCS #/GPIO[6] IOHCS#/GPIO[7] LFRAME# PCICLK PCIRS T # SERIRQ LDRQ# 14.318M 14MOUT 1 14MOUT 2 24.576M/25M PWRDN# RST DRV IO16# M16# IOCHK# OWS# 111 109 108 107 106 104 103 LA17 LA18 LA19 LA20 LA21 LA22 LA23 25 VCC3 L58 RST DRV (21) IO16# M16# IOCHK# OWS# LA[17..23] R415 1K SMEMR# R413 1K IOWR# R416 8.2K IORD# R417 8.2K MEMW# R403 8.2K MEMR# R402 8.2K IOCHK# R411 4.7K SBHE# R418 4.7K(R) IOCHRDY R410 1K OWS# R412 1K REFRESH# R414 1K M16# R376 1K IO16# R359 1K MASTER# R395 1K IRQ12 R377 10K IRQ14 R361 10K IRQ15 R360 10K VCC VCC 82 83 91 101 102 112 113 123 SBHE# MEMR# MEMW# MASTER# 3 90 79 88 1 127 124 DREQ0 DREQ1 DREQ2 DREQ3 DREQ5 DREQ6 DREQ7 SMEMW# SMEMR# REFRESH# 4 89 99 87 2 128 126 S MEMW # SMEMR# RE FRESH# DREQ[0..7] DAK#[0..7] 10K CPU_FAN SELECT B SELECTA FLASH# Z6 Z8 W83626F VCC3 IRQ11 IRQ10 IRQ9 IRQ7 1 2 3 4 5 SD3 SD2 SD1 SD0 10P 8R_10K (21) 1 2 3 4 5 (21) (23) (23) (23) (25) (25) (25) (24) 22 LPC14M 869_OSC R374 22 AUDCLK RP24 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 SA16 SA17 SA18 SA19 6 7 8 9 10 SD11 SD10 SD9 SD8 LA17 LA18 LA19 LA20 1 2 3 4 5 RP25 1 10 2 9 3 8 4 7 5 6 RP23 6 7 8 9 10 5 4 3 2 1 5 4 3 2 1 SD12 SD13 SD14 SD15 VCC 10 9 8 7 6 SA0 SA7 SA6 SA5 LA23 LA22 LA21 1 2 3 4 5 10P 8R_10K RP20 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 SA1 SA2 SA3 SA4 10 9 8 7 6 SA12 SA13 SA14 SA15 10P8R_R VCC (18) DREQ0 DREQ1 DREQ2 DREQ3 1 2 3 4 5 RP21 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 DREQ7 DREQ6 DREQ5 1 2 3 4 5 SA11 SA10 SA9 SA8 10P 8R_10K RP22 1 10 2 9 3 8 4 7 5 6 10P8R_R BEAD 2 SD7 SD6 SD5 SD4 10P8R_4.7K LP C14M (3) 869_OSC (21) AUDCLK 10 9 8 7 6 VCC VCC VCC3 IRQ1 KBDCS# MCCS# CPU_FAN SELECTB SELECTA FLASH# RP26 1 10 2 9 3 8 4 7 5 6 10P8R_4.7K Z650 R375 4.7K 10 9 8 7 6 10P8R_R IRQ1 KBDCS# MCCS# Z650 1 2 3 4 5 RP27 1 10 2 9 3 8 4 7 5 6 VCC R371 38 39 40 62 63 64 65 66 26 27 28 29 IRQ3 IRQ4 IRQ5 IRQ6 S BHE# MEMR# (24) ME MW # (24) MASTER# DAK#0 DAK#1 DAK#2 DAK#3 DAK#5 DAK#6 DAK#7 80PCS#/KBEN ROMCS# 4.7K C452 .1U A EN (21) IORD# (21,23) IOWR# (21,23) IOCHRDY (21) DAK#[0..7] LAD[0] LAD[1] LAD[2] LAD[3] C449 .1U (21) DREQ[0..7] DRQ0 DRQ1 DRQ2 DRQ3 DRQ5 DRQ6 DRQ7 R373 1 C432 .1U TC R357 10K C450 .1U LA[17..23] LPC-ISA (10) LFRAME# (3) PCLKLPC (11,13,16,25) PCIRST # (10,16,21) SERIRQ (10) LDRQ# VCC TC AEN IOR# IOW # IOCHRDY SY SCLK RST DRV IOCS16# MEMCS16# IOCHK# OWS LAD[0..3] LFRAME# PCLKLPC PCIRST # C454 .1U 100 GND GND GND GND GND GND GND (10) LAD[0..3] 31 32 33 34 35 41 42 43 44 46 47 48 49 51 52 53 54 56 57 58 15 50 60 80 95 110 125 (23) IRQ[3..15] SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 A GND S D[0..15] SA[0..19] 30 (21,23,24) S A[0..19] A VCC3 (21,23,24) C456 .1U U28 VCC5 VCC5 VCC5 VCC5 VCC5 VCC5 VCC5 20 5 45 55 70 85 10 5 12 0 C431 .1U SMEMW# Z9 C424 C430 .1U 10U ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T it le LPC-ISA BRIDGE Size Document Number Custom 0200-19.SCH Date: B - 20 Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 20 of 31 Schematic Diagrams FIRVCC L23 VCC3 VCC3 BEAD(0805) CTS1# RI1# DCD1# RI2# R488 10 K DSR1# R489 10 K SIN1 R170 4.7 K DSR1# RN43 8 P4R_18 CTS1# RI1# DCD1# RI2# 10P8R_10 K 3 IRTX2 9 0.01U RXD FIR_SEL TXD 11 NC 4 Z196 R179 2.2 K 5 Z197 R180 2.2 K FIRGND HSDL-3 600 6 SHORT JP1 10K MD1 GND R198 4.7 K 10 K MDO VCC .1U R453 R429 8 IRR3 1 IRTX2 .1U IRRX2 LEAD IRR3 AGNDD 5 6 7 8 C464 4 3 2 1 INDEX# TRK0# RDATA# DSKCHG# 3MODE# WP# 4.7 U C458 U14 GND IRRX2 C463 10 Z195 C468 INDEX# T RK0# RDATA# DSKCHG# 3MODE# WP# RN44 8P4R_18 VCC3 VCC RN66 8P4R_1K R181 47K SIN1 1 2 3 4 1 2 3 4 10 9 8 7 6 2 RP28 1 10 9 2 8 3 7 4 6 5 7 1 2 3 4 5 CTS2# DSR2# SIN2 DCD2# CTS2# DSR2# SIN2 DCD2# 8 7 6 5 8 7 6 5 VCC3 C153 .47U(0805) C152 10U VCC3 FIRGND FIRVCC 13 70 VCC SA[0..15] SA[0..15] (20,23) IORD# (20,23) IOWR# (20) AEN (20) RST DRV (20) TC (20) IOCHRDY R445 1K (20) 869_OSC 869 _OSC (20) DAK#0 (20) DAK#1 (20) DAK#2 (20) DAK#3 (20) DREQ0 (20) DREQ1 (20) DREQ2 (20) DREQ3 R451 VCC3 (10,16 ,20) C459 C SERIRQ (3) PCLKSIO R420 VCC3 IRR3 IRRX2 IRTX2 46 47 48 49 51 52 53 54 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 26 27 28 29 30 31 32 39 40 41 95 35 36 1 3 25 IORD# IOWR# AEN RST DRV TC IOCHRDY Z198 42 43 44 55 33 98 96 DAK#0 DAK#1 DAK#2 DAK#3 DREQ0 DREQ1 DREQ2 DREQ3 20 34 94 22 19 50 97 17 PCLKSIO 92 37 18 38 Z202 56 10 K Z201 SERIRQ 10K IRR3 IRRX2 IRTX2 21 23 24 D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 ERROR# ACK# BUSY PE SLCT CTS1# DSR1# DCD1# RI1 RXD1 TXD1 RTS1# DTR1# IOR# IOW# AEN RESET TC IOCHRDY IRQIN CTS2# DSR2# DCD2# RI2 RXD2 /IRRX T XD2 /IRT X RTS2# DTR2# DACK_A# DACK_B# DACK_C# DACK_D# DRQ_A DRQ_B DRQ_C DRQ_D ADRX#/CLKRUN# SIRQ CLK14 CLK33 PWRGD/GAMECS# IRMODE/IRR3 IRRX2 IRTX2 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 STROBE# SLCT IN# INIT # AUT OFD# GND GND GND GND SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 4 45 65 93 (20,23 ,24) SD[0..7] SD[0..7] VCC VCC U30 (2 0,23,24) RDATA# WDATA# DSKCHG# WGATE# DIR# STEP# HDSEL# T RK0# WRT PRT # INDEX# MTR0# DS0# DRVDEN0 DRVDEN1 69 68 67 66 64 63 62 61 PPD0 PPD1 PPD2 PPD3 PPD4 PPD5 PPD6 PPD7 75 71 72 74 STROBE# SLCT IN# PPINIT # AUT OFD# 73 60 59 58 57 PPERR# PACK# PBUSY PPE PSLCT 80 78 83 82 76 77 79 81 CTS1# DSR1# DCD1# RI1# SIN1 SOUT 1 90 88 85 84 86 87 89 91 RN50 8P4R_33 DTR1# CTS2# DSR2# DCD2# RI2# SIN2 Z199 TP19 Z200 14 7 15 8 5 6 9 11 12 10 100 2 99 16 RN51 8P4R_33 5 6 7 8 5 6 7 8 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 8 7 6 5 SLCT IN# PPINIT # AUT OFD# STROBE# PPERR# PACK# PBUSY PPE PSLCT RN67 (22) (22) (22) (22) (22) (22) (22) (22) 1 PSLIN# 2 PINIT # 3 PATFD# 4 PSTB# 8 P4R_33 R430 10 K DRV0# S Q25 D FDDLED# PSLIN# PINIT # PATFD# PSTB# FDDVCC CN19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 DRV0# DSKCHG# VCC3 R452 0(R) Z411 MTR0# R490 820 DIR# R427 R428 1K 1K 3MODE# R443 0 Z412 ST EP# WDATA# WGATE# DSKCHG# DIR# STEP# HDSEL# T RK0# WP# INDEX# MTR0# DRV0# DIR# STEP# HDSEL# T RK0# WP# INDEX# MTR0# DRV0# WDATA# WDATA# WGATE# (13) (22) (22) (22) (22) INDEX# VCC3 FDDLED# 2N7 002 RTS2# RDATA# DSKCHG# 3MODE# TP179 G DRV0# (22) (22) (22) (22) (22) CTS1# DSR1# DCD1# RI1# SIN1 TP181 RTS1# TP182 CTS2# DSR2# DCD2# RI2# SIN2 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 TP18 RDATA# Z213 4 3 2 1 4 3 2 1 TRK0# R444 820 WP# WGATE# RDATA# HDSEL# FDD CON 26P NEAR TO THE CONNECTOR 3MODE# L59 FDDVCC VCC BEAD(1206) 37N869 C220 C221 C453 .1U .1U 10U + C219 100U/10V ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. Tit le S I/O Size Cus tom Date: Document Number 0200-20.SCH Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 21 of 31 B - 21 Service Manual KB V3 R216 R4870(R) R214 100K VCC3 (16) PC_RING# 10K PC_RING# S D G Q4 RN48 4 3 2 1 4 3 2 1 8P 4R_0 5 6 7 8 5 6 7 8 RN47 8P 4R_0 CP2 8P4C_180P CN6 29 4 3 2 1 Z181 Z182 Z183 Z184 Z185 Z186 Z187 Z188 Z189 4 3 2 1 1 2 3 4 4 3 2 1 CP3 8P4C_180P CP4 8P4C_180P Z190 CP1 8P4C_180P C18 180P Z191 PACK# PBUS Y PP E PSLCT PST B# PAT FD# PPERR# PINIT# PSLIN# RN46 4 3 2 1 4 3 2 1 8P 4R_0 5 6 7 8 5 6 7 8 RN49 8P 4R_0 5 6 7 8 8 7 6 5 Z192 (21) PACK# (21) PBUS Y (21) PP E (21) PSLCT (21) PST B# (21) PAT FD# (21) PPERR# (21) PINIT# (21) PSLIN# (23) VCC 5 6 7 8 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 5 6 7 8 P D0 P D1 P D2 P D3 P D4 P D5 P D6 P D7 RING# 2N7002 VCC3 (21) (21) (21) (21) (21) (21) (21) (21) RING# Z193 Z219 Z220 Z221 Z194 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 (21) (21) (21) (21) PD3 PD2 PD1 PD0 1 2 3 4 5 P D3 P D2 P D1 P D0 RP13 1 10 2 9 3 8 4 7 5 6 10P8R_2K R436 10 9 8 7 6 PAT FD# PINIT# PST B# P SLIN# 2K P PERR# PAT FD# PINIT# PST B# P SLIN# (21) (21) (21) (21) P PERR# (21) VCC (21) PBUS Y (21) PACK# (21) PPE (21) PSLCT PBUS Y PACK# PPE PSLCT 1 2 3 4 5 RP12 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 PD4 PD5 PD6 PD7 P D4 P D5 P D6 P D7 (21) (21) (21) (21) 10P8R_2K 28 R234 0 PRT _PORT ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. Title I/O CON Size Custom Date: B - 22 Document Number 0200-21.SCH Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 22 of 31 Schematic Diagrams L33 VCC CN17 EMCL K E MDA S R145 G PWR_ON# PWR_ON# C1 33 C1 34 C1 35 0.01U .1 U 10U ROW16 ROW15 ROW14 ROW13 ROW12 ROW11 ROW10 ROW9 39 40 41 42 43 44 45 46 ROW8 ROW7 ROW6 ROW5 ROW4 ROW3 ROW2 ROW1 47 48 49 50 51 52 53 54 COL8 COL7 COL6 COL5 COL4 COL3 COL2 COL1 R144 10K 55 56 57 58 59 60 61 62 ROW16 ROW15 ROW14 ROW13 ROW12 ROW11 ROW10 ROW9 C COL8 COL7 COL6 COL5 COL4 COL3 COL2 COL1 K BV3 Z1 58 ALE RT # G Q12 C3 73 .1U A D19 F01J2E C Z668 D S 2N7002 R323 10K D20 R R335 KBV 3 A PWR_ON VOLT AGE:2.5 V A D24 F01J 2E(R) D12 C K BV 3 R29 KBV 3 10 11 19 21 20 35 36 37 38 12 13 S CI MBID0 MBID1 Z5 15 Z6 27 Z1 60 BEEP_EN# (24) BE EP _EN# Z161 R328 A 1S S3 55 72 RING# C KBV3 B AT FUL L# Z1 59 BRIGADJ FAN_PWM DISBL WEBSW# K BV 3 (29,31) PWR_ON EMAILSW# AMP_DOWN USERSW# 74 75 76 77 78 79 80 1 T I_P ME # (16,17) T I_P ME # (24) DISB L WEBSW# (22) RING# EMAILS W# (19) AMP_DOW N USERSW# (13) BRIGADJ (25) FAN_PW M (10) S CI MB ID0 R2 04 100K MB ID1 100K(R) A S24 31 A1 (24,30) BAT FULL# V CC3 100K Z1 62 25 24 30 73 Z6 58 10 K R3 29 10K (29,31) PWR_ON PWR_ON C VCC D23 E KDA EK CLK L4 L35 BEAD(0803) BEAD(0803) Z152 Z153 C6 C5 C4 C3 47 P 47 P 47P 47P SP DIFON (19) 4 6 2 9 7 1 5 3 8 MS_K/B C379 VCC P17 P16 P15 P14 P13 P12 P11 P10 P 27 P 26 P 25 P 24 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 PO7 PO6 PO5 PO4 PO3 PO2 PO1 PO0 P53/WR# P 52/RD# P 51/CS# P5 0/A0 P37 P36 P35 P34 P33 P32 P31 P30 P67 P66 P65 P64 P63 P62 P61 P60 31 32 33 34 1SS 355(R) RP 19 1 10 2 9 3 8 4 7 5 6 10 9 8 7 6 10P8R_10 K SCROLED# NUMLED# CAP LED# Z1 55 63 64 65 66 67 68 69 70 SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 14 15 16 17 IOWR# IORD# Z156 SA 2 SCROLED# (13) NUMLED# (13) CAP LED# (13) SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 R2 11 P42 /IRQ1 P43/IRQ12 23 22 0 IOWR# IORD# (20,21) (20,21) SA2 (20,21,24) R330 R475 D 4.7 K 0(R) S P 76/SDA P 77/SCL VRE F P 74/EMCL K P71/E MDA P57 P56 P46 P44 P45 P23 P22 P21 P20 P55 P54 P 75/EK CL K P72/EKDA P73/IMCL K P70/IMDA IRQ1 IRQ12 (20) (20) EK CLK IMDAT A EK CLK (20) KBV3 D Z1 57 3 2 SMBDA SMBCL 5 8 EMCL K EMDA 4 7 EK CL K EKDA 6 9 IMCLK IMDAT A SMBDA SMBCL Q15 (25) (25) 4.7 K 0(R) S S W4 K BV 3 R126 MCCS # MCCS# G 2N7002 (20) USE RS W# 10 K USE RS W# 1 0K(R) .1U 3 2 4 C123 .1U EMCLK E MDA KBV3 EK CLK E KDA IMCLK IMDAT A 1 WEB 0 FUNCT ION SW4 P VCC S W2 R127 (13) (13) 10 K EMAILS W# E MAILSW# 1 3 2 4 WEB1 FUNCTION SW4P P 40 P 41 27 26 EX TS MI WA KE # EX TSMI WAKE # C124 .1U (10) (10) KBV3 RES ET # X IN CNVS S VS S AVS S X OUT 28 Z163 29 S W3 R128 Y5 8MHZ WE BS W# Z164 10 K WE BS W# M38867M8(LQFP) C2 01 C202 22P 22P 1 3 2 4 WEB2 FUNCTION SW4P Y 6:3-4 P IN->GND C125 .1U K BV 3 R220 R3 45 R 0 R344 R MBID0 MBID1 IMDAT A K BDCS # VCC IRQ1 IRQ12 18 K BV 3 K BDCS# G 2N7002 R331 R476 P 47/CS (ACP I) SPDIFON (20,21,24) (20,21,24) (20,21,24) (20,21,24) (20,21,24) (20,21,24) (20,21,24) (20,21,24) Q16 A 10 U 1 2 3 4 5 Z150 Z151 COL4 COL3 COL2 COL1 C381 E MDA E KDA IMCL K EMCLK BEAD(0803) BEAD(0803) 1 R334 E MDA E KDA (13) IMCLK EMCLK L5 L34 U13 (30) ALERT # 1K(0805) EMCLK E MDA (10,24,29) 71 ROW8 ROW7 ROW6 ROW5 ROW4 ROW3 ROW2 ROW1 K BV 3 COL4 COL3 COL2 COL1 .1U CN3 NDS352P(R) Q2 D 0(0805) E KDA EK CLK 10 9 8 7 6 C22 10P8R_10K V DD3 K BV 3 R3 18 RP 18 1 10 2 9 3 8 4 7 5 6 1 2 3 4 5 COL6 COL7 COL5 COL8 COL6 COL7 COL5 COL8 HE AD24 VCC Z149 KBV 3 ROW16 ROW15 ROW11 ROW10 ROW9 ROW8 COL2 COL1 COL8 COL7 ROW14 ROW13 ROW12 COL6 COL5 COL4 COL3 ROW7 ROW6 ROW5 ROW4 ROW3 ROW2 ROW1 2 ROW16 ROW15 ROW11 ROW10 ROW9 ROW8 COL2 COL1 COL8 COL7 ROW14 ROW13 ROW12 COL6 COL5 COL4 COL3 ROW7 ROW6 ROW5 ROW4 ROW3 ROW2 ROW1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 B EA D(0805) MB ID0 MB ID1 (13) V CC3 R212 10K BE EP_EN# K BV 3 R324 10K AMP_DOW N R2 17 10K R218 10K ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T it le KB CONTROLLER Size Custom Date: Document Number 0200-22.SCH Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 23 of 31 B - 23 Service Manual SA[0..16] VCC S A[0..16] VCC VCC (20,21,23) Q32 2N70 02 S D VCC (10,23,29) PWR_ON# PWR_ON# PWRLED# PWRLED# (13) G C418 .1 U C417 .1 U VCC SA 0 SA 1 SA 2 SA 3 SA 4 SA 5 SA 6 SA 7 SA 8 SA 9 SA 10 SA 11 SA 12 SA 13 SA 14 SA 15 SA 16 R75 C423 V CC3 1K .1 U R3 56 10K FLA SH# (20) FLA SH# MEMW# (20) MEMW# C85 .1U U24 1 IN 2 IN 3 GND TC7S32F VCC OUT 5 4 Z6 26 (20) SA 18 SA 18 22 24 1 31 BIOS CS # ME MR# (20) BIOS CS # (20) MEMR# R76 12 11 10 9 8 7 6 5 27 26 23 25 4 28 29 3 2 0(R) U22 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 10 A 11 A 12 A 13 A 14 A 15 A 16 13 14 15 17 18 19 20 21 O0 O1 O2 O3 O4 O5 O6 O7 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 (20,21,23) (20,21,23) (20,21,23) (20,21,23) (20,21,23) (20,21,23) (20,21,23) (20,21,23) G BAT FULL# ACIN# ACIN# R4 33 0(R) R4 32 32 VCC VCC SA 17 30 A 17 V CC3 10K Q28 2N70 02 (20) Q33 2N70 02 S D Z588 CHRLED# CHRLED# (13) G S G SA17 R4 40 Z5 86 0 LOOP CE OE VP P PGM D SUSP END (10,25) SUSP END (23,30) B AT FUL L# (10,26) S LOOP D R4 57 Z5 87 V DD3 10K Q35 2N70 02 BATCHA (30) B AT CHA 16 GND 29F020 R4 47 BAT_BEEP# BAT LED# B AT LED# (13) 0 U31D 9 8 LOOP U31F 13 14 1 VDD 12 COM COM 74HC14(TS SOP) U31 A 2 Z1 41 R424 3M (25) 74HC14(TS SOP) C467 U31C .1 U 74HC14(TS SOP) C D30 A Z2 42 1S S3 55 R425 5 220 K 74HC14(TS SOP) 6 Z1 36 R423 100 K Z1 45 Z1 37 C460 C461 .01U(K %) 1 U(0805) VDD E Q37 B C R448 C L OOP D29 Z139 Q27 2N3906 11 10 S G 1S S355 74HC14(TSSOP) (23) DISBL D Z142 Q36 2N70 02 R439 CC B Z1 43 B Z144 EE Q26 2N3906(R) 4.7K R4 31 10K DISB L 4 FA ULT # R422 100 K (10) S PKR S PK R D33 A C Z1 46 1S S3 55 (23) BEEP _EN# BEEP _EN# C D28 1S S355 A Z1 48 B C Q24 E2N3904 FA ULT # (25) R421 10K(R) VCC LBP VDD (23) 1 0K(R) R437 74HC14(TSSOP) DISB L 2.2K(R) DISB L U31 B 3 R4 49 B AT _BE EP # U31 E A Z138 2N39 04 Z1 40 100K C5 22 (16) SP KROUT SP KROUT R454 Z1 47 Q31 2N3904 B R93 R438 R4 46 C466 1K .1 U (18) C E 2.2 K LB P 10K 1K(R) .1U C4 65 DACVCC 0.047 U ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T it le BIOS & PCBEEP Size B Date: B - 24 Document Number 0200-23.SCH Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 24 of 31 Schematic Diagrams KBV3 VCC3 2 .1U 3 SMDA VCC3 VCC3 5 GND NC SMCLK LT C1694(R) R40 6 R40 9 R40 8 10K 10K 10K 4 R404 10K VCC RN65 R405 1K 8 P4R_ 4.7K R407 1K U2 9 8 7 6 5 C20 8 U1 7 VCC 1 2 3 4 1 SELECTA SELECTB 16 1 15 14 2 SMBDATA 7 SMBCLK 9 KBV3 BAT _DA (23) SMBDA (23) SMBCL SMBDA R20 2 0 R33 8 1 0K(R) SMBCL R20 3 0 R33 7 1 0K(R) 3 BAT _CLK (3 0,31) BAT _CLK (20) SELECTA (20) SELECTB (10) SMBDATA (10) SMBCLK 3 (3 0,31) BAT _DA 8 D14 D2 5 DA221(R) DA22 1(R) VCC EA# EB# S0 S1 10A 11A 12A 13A YA 10B 11B 12B 13B YB 6 5 4 3 10 11 12 13 SDA_ RA SDA_ RB SDA_ RA (5) SDA_ RB (5) SDA_AT F SDA_AT F (2) SCL_RA SCL_RB SCL_RA SCL_RB SCL _AT F SCL _AT F (2) (5) (5) GND 2 1 2 KBV3 1 QS325 3 VCC VCC C 1 2 D15 F01 J2E C235 4.7U CN1 1 1 (2) SCL_AT F 1K CPU_FAN R24 5 1K(R) SDA_AT F G Q22 2 N700 2 S D G Q2 1 2 N700 2 S SCL_ ATFF SCL_ ATFF (3) SDA_ATFF SDA_ATFF (3) Z66 2 40MIL A R24 4 D 2 FAN_ CON (2) SDA_AT F FAN_ VO SCL_AT F C Z661 B Q6 E 2SC467 2 4 0MIL VCC Debug Port Z125 C L4 2 R37 8 C43 3 Z126 6.8K 4 0MIL A VCC3 Z133 Z127 R396 FAN_CON CPU_FAN R39 7 Z12 8 B 1K (1 0,24) SUSPEND SUSPEND 0 C436 C43 4 0 .01U 0 .01U 2 VMIN CF E Q19 2 N3906 C FAULT VO SENSE T C6 42/(TC646) (SO8) 6 7 5 FAULT # D Q20 2 N7002 S (24) VCC B1 B2 B3 B4 B5 B6 B7 B8 B9 B1 0 B1 1 B1 2 B1 3 B1 4 B1 5 B1 6 AD1 AD3 AD5 AD7 AD9 AD11 AD13 AD15 PCL K80P PCIRST # FRAME# IRDY# TRDY# PCL K80P PCIRST # FRAME# IRDY# TRDY# (3) (1 1,13,1 6,20) (11,16) (11,16) (11,16) VCC C41 9 Z132 Z41 3 R36 6 0 COM COM (24) .1U(K%)(08 05) R5 D2 6 G FAULT # FAN_ VO L U L U L U L U L U L U L U L U L U L U L U L U L U L U L U L U DEBUG-P8 0 0(0805) 1SS35 5 R38 7 R379 C43 5 15K_1% 1 00K .22U(080 5)(K%) C (20) CPU_FAN R38 6 3 A Z13 0 Z131 0(R) Z12 9 R38 5 C/BE#0 C/BE#1 C/BE#2 C/BE#3 4 0MIL A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 4 FAN_PWM 82 0 Z65 5 U2 5 1 VIN 8 TC646 ---> R53 4 = 0 (23) FAN_PWM (1 1,16) C/BE# [0..3] Q7 E 2SC467 2 R349 V DD TC642 ---> R53 5 = 0 GND 10K B AD0 AD2 AD4 AD6 AD8 AD10 AD12 AD14 CN1 0 1 1 2 2 C R38 0 34.8K_1% P1 BEAD(12 06) D2 7 1SS35 5 1U VCC (11,16) AD[0..31] ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T it le FAN CONTROLLER Size B Date: Document Number 0200-24.SCH Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 25 of 31 B - 25 Service Manual KBV3 VCC3 2 .1U 3 SMDA VCC3 VCC3 5 GND NC SMCLK LT C1694(R) R406 R409 R408 10K 10K 10K 4 R404 10K V CC RN65 R405 1K 8P4R_4.7K R407 1K U29 8 7 6 5 C208 U17 VCC 1 2 3 4 1 SELECTA SELECTB 16 1 15 14 2 SMBDATA 7 SMBCLK 9 KBV3 BAT _DA (23) S MBDA (23) SMBCL SMBDA R202 0 R338 10K(R) SMBCL R203 0 R337 10K(R) 3 BAT _CLK (30,31) BAT _CLK (20) SELECTA (20) SELECTB (10) SMBDA TA (10) SMBCLK 3 (30,31) BAT _DA 8 D14 D25 DA221(R) DA221(R) VCC EA# EB# S0 S1 10A 11A 12A 13A YA 10B 11B 12B 13B YB 6 5 4 3 S DA_RA S DA_RB S DA_RA (5) S DA_RB (5) SDA_AT F SDA_AT F (2) 10 11 12 13 S CL_RA S CL_RB S CL_RA S CL_RB S CL_A T F S CL_A T F (2) (5) (5) GND 2 1 2 KBV3 1 QS3253 VCC VCC C 1 2 D15 F01J2E C235 4.7U CN11 1 (2) SCL_AT F 1K CPU_FAN R245 1K (R) SDA_AT F G Q22 2N7002 S D G Q21 2N7002 S SCL_ATFF SCL_ATFF (3) SDA_ATFF SDA_ATFF (3) Z662 40MIL A R244 D 2 FAN_CON (2) SDA_AT F FAN_VO SCL_AT F C Z661 B Q6 E 2SC4672 40MIL VCC Debug Port Z125 C L42 R378 C433 Z126 6.8K 40MIL A VCC3 Z133 Z127 R396 FAN_CON CPU_FAN R397 Z128 B 1K (10,24) SUSPEND SUSPEND 0 C436 C434 0.01U 0.01U 3 2 VMIN CF E Q19 2N3906 C FAULT VO SENSE T C642/(TC646) (SO8) 6 7 5 FAULT # D Q20 2N7002 S (24) VCC B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 AD1 AD3 AD5 AD7 AD9 AD11 AD13 AD15 PCLK80P PCIRST # FRAME# IRDY# TRDY# PCLK80P PCIRS T # FRAME# IRDY# TRDY# (3) (11,13,16,20) (11,16) (11,16) (11,16) VCC C419 Z132 Z413 R366 0 COM COM (24) .1U(K%)(0805) R5 D26 G FAULT # FAN_VO L U L U L U L U L U L U L U L U L U L U L U L U L U L U L U L U DEBUG-P80 0(0805) 1SS 355 R387 R379 C435 15K_1% 100K .22U(0805)(K%) C (20) CPU_FAN R386 Z131 A Z130 0(R) Z12 9 R385 C/BE#0 C/BE#1 C/BE#2 C/BE#3 40MIL A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 4 FAN_PWM 820 Z65 5 U25 1 VIN 8 TC646 ---> R534 = 0 (23) FAN_PWM (11,16) C/BE#[0..3] Q7 E 2SC4672 R349 V DD TC642 ---> R535 = 0 GND 10K B AD0 AD2 AD4 AD6 AD8 AD10 AD12 AD14 CN10 1 1 2 2 C R380 34.8K_1% P1 BEAD(1206) D27 1SS355 1U VCC (11,16) AD[0..31] ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T itle FAN CONTROLLER Size B Date: B - 26 Document Number 0200-24.SCH Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 25 of 31 Schematic Diagrams RUN/SS PC63 + 2 3 1 Z2907 8 Z2906 9 PC66 100P 1000P P_GND PGND (2) VID0 (2) VID1 (2) VID2 (2) VID3 PC67 10 220P 11 12 VIDVCC VOSENSE B4 B0 B3 B1 B2 PC12 PC11 PC21 PC20 PC8 PC9 220U 220U 470U 470U 220U 220U 1 1 1 1 1 PC14 220U 220U 1 PC13 1 VCC_CORE 18A 2 3 1 Z672 3m(2512) PQ2 19 Z692PR38 IR7805 0 18 PL6 4 4 PZD1 P C70 + 16 Z2909 PR40 0 Z671 + + + + + + + 1.4U P D3 ZD2.7V 0.1U PR189 RB05L-A 17 1 2.4U 20 PQ18 2 EXTVCC VFB RB751V INTVCC PR54 2 SENSE+ PL7 2 PGND 21 VCC_CORE+ R 2 SENSE- PR58 SI4884 2 7 BG PQ3 PD12 2 PC18 PGOOD PC60 0.1U 2 Z2905 162K/F PR50 INTVCC Z2916 2 6 (26) VR_PWRGD VIN SGND Z2915 22 A FCB 5 23 0.1U 4 Z675 C 4 PC15 220P SW PC71 IR7805 3m(2512) A ITH 0 5 6 7 8 Z2903 3 BOOST Z693 PR6 C Z2904 PC65 470P TG RUN/SS + 2 3 1 R COSC 2 24 5 6 7 8 10K 0.1U 1 Z2902 2 3 1 PR46 PC64 33K PR7 PR44 47P PC22 SI4884 A VCC3+ V_IO+ PC17 10U/25V 10U/25V PQ17 4 PU1 5 6 7 8 0 PC19 1000P C Z2901 0.1U PR43 P C72 10 1 PR5 Z2913 2 R PR45 INTVCC B+ R PR41 1 R 2 R PR47 Z69 0 PR48 5 6 7 8 PGND PR49 15 P_GND 14 VCC+ PC62 10U 0 13 LTC1736 P_GND P R42 PR12 PR39 PR36 R R R R P_GND P_GND Z673 10 PR10 R 10 PR8 10 B+ RUN/SS PR51 VDD3+ V_IO V_IO+ PU12 PQ1 G 2N7002 PC124 2 S Z2911 1 D 10U PR14 0 Z691 PC68 330K 1U 3 PQ14 G 2N7002 S VR_ON PR13 (28,29) PWR_ON+ 4 IN N.C VOUT VOUT IN GND VC GND 1 VCCT + 2 2 1 PC121 1mm PC122 PC133 PC128 PU2 MIC29302BU(T O263) VI VO 10U ON/OFF 10U 10U 0.1U ADJ 5 PR52 10K/F 5 PWR_ON+ PR186 PC132 PC74 PC75 PC16 10U 0.1U 10U 10U 47K Z760 PR53 45.3K/F 0.1U 100K VR_ON 2 Z487 (28,29) PC129 PR15 1 10U 3025LS VCC3+ VCCT PJ 5 2A 4 3mm PC73 7 6 VDD3+ PJ 7 0.3A 8 3 D 330K GND (16,17,28,29,31) PR11 PR9 VR_ON ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T it le VCC_CORE,V_IO,VCCT Size Document Number Custom 0200-26.SCH Date: 02:10:04 Rev A 71-22C00-D02 Sheet 27 of 31 B - 27 Service Manual (29) PD31 1SS 355 A C Z2036 VIN1 PR 168 V+ 10 2A 2A B+ VL 10U/25V 10U/25V PC44 + 220U 220U PC38 + 220U 8 PD8 10QS06 220U 4 PQ7 Si4812 DL3 LX5 CSH3 DL5 CSL3 CSH5 FB3 CSL5 2 R 9 PR22 0 2.5V PC 114 0.1U 4 16 Z2022 PR 159 PC36 PC35 11FS2 4.7U/25V 4.7U/25V 0 Z699 8 PQ9 Si4416 4 PL9 VCC+ 2 Z2023 V CC PR17 19 Z2025 14 Z2026 4 13 8 PJ 2 15m (2512) 4A 17 Z2024 1 PQ8 Si4812 6A 3 1 CDRH125-100 1:2.2 PD7 10QS06 2 6mm PR 184 12 Z2027 FB5 PR 182 Z2011 15 C 18 Z2021 DH5 PD6 A 22 V+ C LX3 VL BST 5 Z2008 24 Z2010 3 PR23 DH3 Z2009 1 A 47U PC34 + BST 3 A PD9 RB751V 12VR + PC30 + PC31 + PC37 + PC28 150U 150U 150U 47U A PC29 + 3 2 1 PC32 + Z2007 26 10U PU11 21 0.1U 1 2 3 C 4A CDRH-1205-100 6mm + PC33 0 Z2005 27 3 2 1 P L10 7 6 5 15m (2512) Z2004 25 PC 134 0.1U 5 6 7 4 Z2006 PR 158 PR18 6A 2 4.7U/25V 0.1A PC 118 10U/25V 10U/25V 1 2 3 VDD3+ PJ 1 1 7 6 5 8 PQ6 Si 4416 PC 111 0.1U PC42 + PC 113 5 6 7 A PC 135 0.1U PD10 RB751V VDD3 PC41 + PC 112 C PC43 + 0.1U C PC40 R 5 V DD 12VR REF 12V+ S EQ 0 PC 126 12V PR 185 0.1A 4 12VOUT PR 179 0 0 1U VL PR20 Z2012 10 0 11 PR 181 VL PR21 R Z2013 6 8 0 PR 180 R S KIP 3V ON RES ET 5V ON SY NC GND PC 125 28 3VON 7 5VON 4.7U/25V 23 Z2031 PR19 SH DN 20 PGND PC39 MA X1632 1K V+ 0.1U 12V+ VDD3+ PR 173 PR 167 100K 100K 8 7 6 5 PQ44 Si4800 VCC3+ 3 2 1 4 VCC3 PJ 6 1 (27,29) PWR_ON+ PR 183 10K 5VON (29) VDD_ON PR 157 10K 3VON 2 5mm Z677 PR 172 0 Z695 G S (27,29) PWR_ON+ D G PQ46 2N7002 PC 117 0.1U S D Z676 PC 136 PC 116 PC 137 PC 108 PC 110 PC 127 0.1U 10U 10U 0.1U 0.1U 0.1U PQ47 2N7002 ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T it le VDD3,VCC3,VCC,12V Siz e Document Number Cus tom 0200-27.SCH Date: Friday, N ovember 10, 2000 B - 28 Rev A 71-22C00-D02 Sheet 28 of 31 Schematic Diagrams VC 12V+ VDD1.8+ PR1 0 Z698 P R29 P R28 100K 100K 8 7 6 5 P Q11 S i48 00 VCC1.8+ 3 2 1 4 2A VCC1.8 P J4 1 2 3m m Z680 Z679 D PC10 P C55 D A PR27 10 1 0U P C51 PD11 Z688 (27,28) RB751V G PWR_ON+ 0 .1U P Q12 2N7002 15 10U 10K 3 Z3305 6 /S HDN LX ILIM DL 0 Z3306 18 PR2 7 Z3307 OUT REF FB 16 PC7 R 1U T ON 8 PR35 33K PR3 PGOOD PQ1 0A SI4818 Z7552 PC50 PC46 PC49 PC45 10U 10U 10U 0.1U VDD1.8+ 5.1 Z3313 13 Z3312 12 Z3311 4 Z3310 VDD1.8 P J3 1 2 SHORT + PC2 BC3316F-120M PL2 4 5 2A SD104-100 PL1 47U PQ10B P C47 P C48 10U 10U SI4818 10 NC NC NC 75K PR24 100K PGND /SKIP A GN D PR34 R 9 2 11 PR25 20 PC52 0.1U PR187 3 (28) VDD_ON Z3304 Z3303 1 1 DH PR30 19 5 6 7 BS T 8 Z3301 V+ V CC PU3 17 0.1U PC53 V DD B+ 14 C S B+ PC54 G P Q13 2N7002 S 10U VDD3+ PR33 0 PR32 2K /F P Q25 DT A 114EUA C E PWR_ON+ MA X1714 PR31 PC58 PC57 33P (27,28) P R87 PR26 P R94 Z3308 Z698 0.1U 2.49K/F 1 0K Z7 08 B 10K R PWR_ON PWR_ON# G P Q28 2N7002 G S (10 ,23,24) PWR_ON# D D PW R_ON (23,31) PQ26 2N7002 4.7U/25V ON/OFF A PWR_ON+ PD30 3 10U 0.1U ZD5.6V PS M A 6 7 PC120 PC119 PZD3 Z745 PC115 0.1U RE SE T 0 VC P U10 T CM809 P R146 10 0K P D24 1S S355 2 (23,31) PWR_ON 12 V+ C A Z7 06 P R147 P Q37 B Z7 07 100K DT C114EUA Z689 A C Z6 85 PR1 77 C PQ48 Z684 100K PR1 76 POWER SW. 4P 100K A G 0 .1U 2N7002 1SS355 PC1 23 0.1U 0 .1U PR149 PWRSW# VDD3+ 10K PD32 1S S355 A C Z762 PR170 Z683 (10) PQ43 G 2N70 02 330K S 4 S 3 2 D PD33 1 PD26 1S S355 E R SW5 B+ 5 P R148 G 10K P C106 P C105 1SS355 (16,17,27,28,31) P Q41 S I23 05 D S Z7 05 VCC+ VDD_ON (28) PR1 66 C Z686 D (27,28) Z7 00 10K Z4 55 PR1 75 A DJ 1 2 C 3 PC107 Z687 100K VDD 1 PR1 74 VO VO 0 P R171 V CC PD27 1N41 48 PR178 VC PU9 MIC295 1(S O8) 8 VI GN D C A C B+ (28) 6 7 (16,17,27,28,31) 2SB 1198 Z456A VIN1 GN D PQ45 C PD25 1N41 48 C 4 A VA S PD28 1S S355 PR169 100K PC109 1U ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. T itle VDD1.8,VCC1.8 Size Document Number Custom 0200-28.SCH Date: 0 3:17:15 Rev A 71-22C00-D02 Sheet 29 of 31 B - 29 Service Manual C PR111 0 VC (31) 15 PR73 PR121 R 10K PR113 PR112 10K PC87 10U 10K 28 Z65 9 Z67 PC98 1U 10 Z68 16 PR123 PR122 R R PB1/T CAP PA0/PWM0 PA1/PWM1 PA2/PWM2 PA3/PWM3 PA4/SCL0 PA5/SDA0 PA6/SCL1 PA7/SDA1 Vdd 1U 7 PC80 0.1 U IRQ / Vpp RESET PB7/AN0 PB6/AN1 PB5/AN2 PB4/AN3 TM CSA VM CAP(ADC) PB2/CS0(OSC1) PB3/CS1(OSC2) VSS PR114 PR77 PR75 PR110 PR88 PR74 PR68 51K R 47K R R 4.7K 4.7K PD18 PD17 1SS355 1SS355 A A PC4 PC5 PC6 PC7 ESV PC99 IRQ# PR115 SHDN_CTL# FULL_LED# 22 23 24 25 26 27 2 1 (31) PWM_CT L (31) CHG_CT L (31) BUS_CTL 0 PR117 PR109 0 BAT _CL K (25 ,31) BAT _DA (25 ,31) C 8 AC_IN R Z66 6 5 4 3 PR126 14 13 12 11 18 19 20 17 0 PD19 1SS355 PR78 PR76 0 R PD16 1SS355 A 21 (23) ALERT # PR118 R PU5 A 100 K C PR79 C VC VCC+ PR124 R CHG_I (31) VC WIN719(SOIC-28) PR69 510K(R) PC81 1UF/16V(A) 21 8 15 VA VC 7 PR134 PR128 100K 10K C 9 AC_IN# PQ32 B PB1/T CAP PA0/PWM0 PA1/PWM1 PA2/PWM2 PA3/PWM3 PA4/SCL0 PA5/SDA0 PA6/SCL1 PA7/SDA1 Vdd VC 28 Z57 PC4 PC5 PC6 PC7 ESV (31) 10 D PQ31 S2N7 002 DT C114 EUA G 16 IRQ / Vpp RESET PB2/CS0(OSC1) PB3/CS1(OSC2) VSS PB7/AN0 PB6/AN1 PB5/AN2 PB4/AN3 TM CSA VM CAP(ADC) 6 5 4 3 Z69 22 23 24 25 26 27 2 1 VC Z70 14 13 12 11 18 19 20 17 PR101 1K/F PR80 Z71 Z72 14K/B 3_5V Z73 Z74 V_BAT T EMP Z75 PC94 PC89 PC100 PC82 PC95 1U 1U 1U 1U 1U PC130 0.1 U (31) PR100 100K/F(R) PR190 20K_1% PD34 AS2 431 R Z833 PR135 E A WIN719(SSOP-28) (31) C PU6 AC_IN R PR191 51K_1% PR127 10K PR119 (31) FULL_LED# BAT FULL# (23 ,24) 0 PR165 2M PD29 1SS355 Z763 C PR188 1M VCC3+ A SHDN_CT L# SHDN_POINT PR70 BAT + (31) BAT 7 PR143 22K/F C 6 + PR131 47 K PU8 A LM339 1 PR132 10 K A PD23 1SS355 Z462 - C SHUT DOWN (26) Hi => Shu tdowm sys tem PQ33 2N3 904 BAT CHA (24) 12 Z63 (31) CHG_CT L E PQ38 DT A114 EUA T P_SHDN PR133 47K PR141 100K/F 3 (31) VCC3+ VC PR144 13.7K/F(0805) PR151 VC 10K DT C114 EUA (31) A Z460 PD22 C 1 SS355 PC103 PQ42 Z710 B Z694 PR142 1 0K/F C Z463 Z709 B 10 K PR150 LI_HI PQ36 0.1 U PR140 100K/F PC104 D 1U S 2N7 002 G AC_IN E 10K Z468 G D PQ34 S2N7002 ÂÅ ¤ Ñ ¹q ¸£ CLEVO CO. Tit le CHARGER-1 Size Cus tom Date: B - 30 Document Number 0200-29.SCH 02:10:04 Rev A 71-22C00-D02 Sheet 30 of 31 Schematic Diagrams CON1 1 2 3 PL 3 1 Z618 PF1 2 Z617 PL 5 1 Z616 0(12 06) 2 AD 0(1206) 5A PC3 PC1 PC4 PC6 PC5 10 00P 0.1U 0.1U 0.1U 0.1U P OW ER JACK E VA C Z71 1 PD4 A PR1 6 C Z74 1 BAT 1N414 8(R) (30) 2 K(12 06)(R) PR5 5 1 00K(R) 100m(2512) A2 TOT AL PC6 1 0.1U VC VA PR10 4 100K/F 5 + 6 - P C9 7 C 2 PD2 0 1 SS35 5(R) 7 Z5 3 PU7B LM32 4 100K/F 3 Z41 6 PU7A LM32 4 IRQ# (30) PR10 2 R (30) 20K + 1 Z21 6 Z21 4 - PQ2 7 2N390 4 PR130 PR12 9 PC10 1 2M 11.3K/F 1U (30) G P Q2 9 2N700 2 AC_IN# A PC2 6 0.1U 22U/25V P C2 4 100U/25V PD1 3 PQ5 Si 443 1 8 3 7 2 6 1 5 4 PC9 0 1U 40m(1206) Z4 2 Z415 PC2 7 PC7 7 P C7 8 PR5 6 40m(1206) A Z5 0 C PR9 6 100U/25V 22U/25V BAT (30) PD5 RB05L -A PC76 PR9 2 2K/F 22U/25V 0.1U PC14 0 PC14 1 0.1U 0.1U 2K/F PF2 7A A C E PQ2 1 178 2 PR10 8 ZD9.1V(LL34) Z41 6 A C PD1 5 A CON2 Z65 9 Z417 C 1 00K/F PD2 1 A VC 100K/F 1 SS 35 5 8 PC9 6 1U Z739 (2 5,30) BAT_ DA (2 5,30) BAT _CLK (30) T EMP PR9 9 Z43 5 E PU7C LM32 4 + 10 - 9 Z32 2 PR19 2 10 K(0603) 1N414 8 PR9 3 1 00K (30) 1 9 10 16 15 14 2 7 PR98 R 499K/F B Z83 1 40.2K/F Z43 0 Z4 4 Z4 1 0 PR6 2 P_CV PC131 P Q4 9 Z5 1 PR6 7 PC9 3 0.1U 10K/F 0.1U (30) BAT + DTC11 4E UA P Q5 0 G PW R_ ON PC7 9 1U 2N700 2 VC PC84 5.1K Z4 0 Z39 PR8 5 P R7 2 CHG_I PR6 3 E Q1-C 1IN+ Q2-C Q1 -E VCC Q2 -E MODE 2IN+ CT 2INRT VREF DEAD 1INCOMP GND T L59 4(SO-16) D PU4 BAT CON S 8 11 Z73 7 1 2 13 5 Z3 7 6 Z3 8 4 Z4 9 3 1 2 3 4 5 6 7 499K/F PZD2 PC2 3 0.0 01U PC9 2 C PR9 7 C Z41 6 2K(0805) C PR6 1 2K(0805) C C PR5 7 Z738 PR60 Z72 3 PR86 10K 0.1U Z4 3 DTC11 4EUA P C8 6 10 00P PC5 9 0.1U 0.1U PL 8 PD1 4 RB05 L PQ22 B PC13 9 Z74 0 Z736 B (30) CHG_CT L B+ A2 PC13 8 CDRH-1205-470 1N4148 PQ20 DTA 11 4EUA BAT 2N700 2(R) C PR5 9 100K PD2 60QC04 (T O-2 52) A1 C (30) PQ1 5 G BAT YPE VA PC2 5 PQ1 9 2N700 2(R) G FULL_LED# S C S PR10 5 A D Z56 2N700 2(R) S Z5 4 4 10K/F 10K/F PR103 11 PR11 6 D PR10 7 PR10 6 PQ1 6 Z60 4G 10K/F S Z60 7 AD D PR4 VC B+ D PD1 60 QC04 (T O-2 52) A1 C VA B Z60 6 PQ4 DTA11 4EUA(R) PR6 5 PR6 4 PR6 6 PR16 1 0 R 25.5K/F 6.8K 0.1U V _BAT R PR15 4 PR15 3 R 4.53K/F(08 05) Z712 PQ3 9 2N700 2 PR8 2 G PC9 1 13 - 14 PU7D LM32 4 (30) PR16 2 100K(R) PW R_ ON (23,29) + 5LM33 9 - 4 T EMP LI_HI PC10 2 PR13 9 P_CV 1U 0.1U PR13 6 100K PQ3 5 2N7002 20K/F (30) Z76 10K PQ2 4 2N700 2(R) G Z830 PR81 (30) D D + LI_HI G Z71 4 PC83 1U(R) PR16 3 12K/F PR16 4 R PR15 6 R PR15 5 27K/F Z71 3 D Z58 4 ÂÅ ¤ Ñ ¹q ¸£ PQ4 0 2N700 2 G LI_HI (30) CLEVO CO. T itle CHARGER-2 S P C8 8 10U Z58 3 1 2 BA T + S PR9 0 3.3K Z42 5 Z5 5 (30) PU8B S 2K/F(R) PR8 3 (30) PWM_CT L 2 BAT YPE D 15K/F 11K/F 47K 1M VC 68K PR13 7 PR15 2 R 3 PR16 0 PR84 PR9 5 5.1K PR13 8 PR14 5 1 00K P R9 1 SET_I PR8 9 5.1K (30) Z42 7 12 0.1U S PC8 5 Size Cu stom Date: Document Number 0200-30.SCH Monday, March 05, 2001 Rev A 71-22C00-D02 Sheet 31 of 31 B - 31 Service Manual +5VSB J1 +5VS 1 2 3 4 5 6 7 8 9 10 F1 +5VSB 2A BRIGH-ADJ LIGHT-ON SCRD LED# CAP LED# NVM LED# IDE LED# FDD LED# C1 2 T1 7 5 6 C2 68p/3kv HV J2 1 2 47u +5VSB HEADER 10 1 LV 3 CIUH8D45 17:2600 CR1 BAV99L 150K/F 2 R9 1 2 R10 R32 100K R8 22K/F (0~2.5V) 22 Vref _2.5 R22 R R12 66.5K/F Vref _2.5 C11 R11 0.1u 12K/F U2 R13 1 2 3 4 5 6 7 8 100K/F R1 +5VSB 100K/F R24 R25 R26 R28 C14 R17 0.1u 196K/F R2 560 560 560 D1 D2 D3 D4 D5 U3 C12 470p 2 1 8 7 4 3 6 5 C15 C8 10u Si4532 R23 560 VDD RT CT OPS ENA NDR PDR SST OZ965 R33 560 REF HCLMP LCLMP SCP ADJ FB CMP GND 16 15 14 13 12 11 10 9 1M C16 C7 C9 R31 0.1u 15K 1u 2.2u 510K 0.1u C19 LE D LE D LE D LE D LE D R30 1u 1K R27 SCRD LED# 100K CAP LED# NVM LED# IDE LED# C18 R29 470p 750/F FDD LED# CLEVO CO. Title CCFL Smart Inv erter Size Document Number Rev 2.2 2200 , 2200S , 2200C , 2700S Date: B - 32 Thursday , December 14, 2000 Sheet 1 of 1 Switch Settings Appendix C: Switch Settings Clock Settings (SW6) CPU (FSB) SDRAM SW6-1 SW6-2 SW6-3 SW6-4 SW6-6 66 PC-133 OFF OFF OFF OFF ON 66 PC-100 OFF OFF OFF OFF OFF 100 PC-100 ON OFF OFF OFF OFF 100 PC-133 ON OFF ON OFF OFF 133 PC-133 ON ON ON OFF OFF C-1 Service Manual Panel ID Settings (SW7) SIZE 13.3" 14.1" C-2 BRAND Model No. SW7-1 SW7-2 SW7-3 SW7-4 LG LP133X7-C2CC ON ON OFF OFF ADT L133X2-1 ON ON OFF OFF UNIPAC UP133X01 ON ON OFF OFF HYUNDAI HT13X14 ON ON ON OFF LG LP141X5 ON ON OFF OFF ADT L141X1 ON ON OFF OFF CPT CLAA141XB01 ON ON OFF OFF CPT CLAA141XC01 ON ON OFF OFF UNIPAC UP141X01 ON ON OFF OFF HYUNDAI HT14X13 ON ON ON OFF
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