Digi 50M1699 WLAN Module User Manual CC Wi i MX51 HRM

Digi International Inc WLAN Module CC Wi i MX51 HRM

User Manual Part1

ConnectCore TM for i.MX51TMHardware Reference Preliminary Information 90001128_D 12/22/2010
©2010DigiInternational,Inc. 2©2010 Digi International Inc.All rights reserved.Digi, Digi International, the Digi logo, a Digi International Company, Digi JumpStart Kit, ConnectCore, NET+,NET+OS and NET+Works are trademarks or registered trademarks of Digi International, Inc. in the United States and other countries worldwide. All other trademarks are the property of their respective owners.All other trademarks mentioned in this document are the property of their respective owners.Information in this document is subject to change without notice and does not represent a commitment on the part of Digi International.Digi provides this document “as is,” without warranty of any kind, either expressed or implied, including, but not limited to, the implied warranties of fitness or merchantability for a particular purpose. Digi may makeimprovements and/or changes in this manual or in the product(s) and/or the program(s) described in this manual at any time.This product could include technical inaccuracies or typographical errors. Changes are periodically made to the information herein; these changes may be incorporated in new editions of the publication.
Contents©2010DigiInternational,Inc. 3Chapter 1: About the Module........................................... 9Features and Functionality ..................................................10Module Variant ...............................................................11Block Diagram .................................................................12CPU............................................................................ 12Module ........................................................................ 13Module Pinout .................................................................14Pinout Legend ................................................................14J1 Pinout ..................................................................... 14J2 Pinout ..................................................................... 21Power ...........................................................................30Module Power Supplies..................................................... 30Supply Inputs................................................................. 30Supply Outputs .............................................................. 31MC13892 Power Management ..............................................32Memory .........................................................................33DDR2 SDRAM Memory ....................................................... 33NAND Flash Memory......................................................... 33Chip selects ....................................................................33Chip Select Memory Map................................................... 33Multiplexed GPIO .............................................................34GPIO Multiplexing Table ....................................................34Interfaces ......................................................................391-Wire .........................................................................39Accelerometer ...............................................................39ADC and Touch Screen ..................................................... 39Synchronous Serial Interface (SSI) ........................................40External Memory Interface (EMI) .........................................41Ethernet 1 ....................................................................41Ethernet 2 ....................................................................41 I2C .............................................................................42Video Subsystem ............................................................ 43Video Processing Unit (VPU)............................................... 43Image Processing Unit (IPU) ............................................... 45Keypad ........................................................................47Memory Cards................................................................ 47PWM ...........................................................................48RTC............................................................................ 49SPDIF ..........................................................................49SPI .............................................................................50
Contents©2010DigiInternational,Inc. 4Watchdog Timer .............................................................50UART .......................................................................... 51USB Host and USB OTG .....................................................51WLAN ...........................................................................52WLAN ..........................................................................52Cable Specification: U.FL/W.FL to RP-SMA .............................53Chapter 2: About the Development Board ..................... 54What’s on the Development Board? ........................................54The Development Board ....................................................56Switches and Push-buttons ..................................................57Power Switch, S2 ............................................................57Reset Button, S4 .............................................................58Power Button, S11 ..........................................................58User Buttons, S3 and S5.................................................... 58Ident Button, S10 ........................................................... 58Legend for Multi-Position Switches....................................... 58UART 1 Switch, S6........................................................... 59UART 2 Switch, S7........................................................... 59Boot Configuration Switches, S8 and S9 .................................60Jumpers ........................................................................ 61Battery Enable, J5 .......................................................... 61Module Power Source, P29 .................................................62LED 1, J16 .................................................................... 62LED 2, J9 ......................................................................62Button 1, J28 .................................................................62Button 2, J29 .................................................................62UART3 / XBee Selection, J30 and J31 ....................................62WLAN Disable, J17 ..........................................................62Touch Selection, J20 ....................................................... 62Coincell Enable, J3 ......................................................... 63JTAG Mod., J4 ............................................................... 63LEDs .............................................................................64WLAN, LE12 ..................................................................64WLAN, LE12 .................................................................. 65Power LEDs, LE3, LE4, LE6 and LE7 ........................................65User LEDs, LE49 and LE51.................................................. 65Serial Status LEDs ........................................................... 65UART 1 Status LEDs ......................................................... 66UART 2 Status LEDs ......................................................... 66
Contents©2010DigiInternational,Inc. 5XBee Assoc., LE50 ...........................................................66Audio Interface ............................................................... 67Line-out Connector Pinout, J18 ...........................................68Line-in Connector Pinout, J12 ............................................ 68Microphone Connector Pinou, J15t....................................... 68Coin Cell Battery.............................................................. 69Camera Interfaces ............................................................70X15 Pinout ....................................................................71X17 Pinout.................................................................... 71Digital IO Interface............................................................72Digital I/O Connector, X45 .................................................73Ethernet 1 Interface ......................................................... 74Ethernet 1, RJ-45 Connector X7 .......................................... 75Ethernet 2 Interface ......................................................... 76Ethernet 2, Connector J17 .................................................77HDMI Interface ................................................................ 78HDMI Connector, J19 .......................................................79I2C Interface ...................................................................802C Header, P22 ..............................................................81JTAG Interface ................................................................82Standard JTAG ARM Connector, X13 .....................................83LCD Interfaces .................................................................84LCD 1 Connector, P1 ........................................................85P1 Pinout ..................................................................... 85LCD 2 Connector, P2 ........................................................87P2 Pinout ..................................................................... 87MicroSD™ Card Interface..................................................... 89MicroSD™ Connector, X14.................................................. 90Module Connectors and Signal Rails ........................................91Module Connectors ..........................................................92Signal Rails, J25 and J26 ...................................................92J25 Pinout ....................................................................92J26 Pinout ....................................................................95Peripheral Application Header ..............................................98Peripheral Application Header, P21...................................... 99Power-Over-Ethernet (PoE) - IEEE802.3af ............................... 101The PoE Module ............................................................ 102PoE Connector (power in), P17 .......................................... 102PoE Connector (power out), P18 ........................................ 103Main Power Connector ..................................................... 104SD-Card Interface ........................................................... 105
Contents©2010DigiInternational,Inc. 6SD/MMC Connector, X18 .................................................. 106SPI Interface ................................................................. 107SPI Header, P24 ............................................................ 108UART Interface .............................................................. 109Serial Port 2, RS232, X27 ................................................. 109Serial Port 1, MEI Interface, X30......................................... 110Serial Port 3, TTL Interface, X19 ....................................... 111USB Host Interface .......................................................... 112USB Host Connectors, J8 and J10 ....................................... 112USB OTG Interface........................................................... 113USB OTG Connector, J11.................................................. 113User Interface ............................................................... 114Analog Video Interface ..................................................... 116Analog Video Connector, X32 ............................................ 117WLAN Interface .............................................................. 118Antenna Connectors (WLAN) ............................................. 119Digi XBee TM Interface...................................................... 120Digi XBeeTM Module Connectors, X28 and X29 ....................... 121Appendix A: Module Specifications ..... 122Mechanical Specifications ................................................. 123Environmental Specifications ............................................. 123Network Interface .......................................................... 124Antenna specifications: 802.11 a/b/g antenna ....................... 124Antenna Specification: 802.11b/g antenna ............................ 125Ethernet 1 .................................................................. 126Ethernet 2................................................................... 126WLAN ........................................................................ 127Electrical Characteristics .................................................. 130Supply Voltages............................................................. 130Supply Current ............................................................. 130On-Module Power Supplies................................................ 133I/O DC Parameters......................................................... 133Appendix B: Module Dimensions ......... 140Top View .................................................................... 141Bottom View ................................................................ 142Side View.................................................................... 143Connectors ................................................................. 143
Contents©2010DigiInternational,Inc. 7Appendix C: Certifications ................ 144FCC Part 15 Class B.......................................................... 144Radio Frequency Interface (RFI) (FCC 15.105) ........................ 144Labeling Requirements (FCC 15.19)..................................... 144RF Exposure................................................................. 145Modifications (FCC 15.21)................................................. 145Industry Canada ............................................................ 145Indoor/Outdoor ............................................................ 146Declaration of Conformity ............................................... 146International EMC Standards ............................................. 147Appendix D: Change Log ................... 148Revision A..................................................................... 148Revision B .................................................................... 148Revision C .................................................................... 148Revision D..................................................................... 148
©2010DigiInternational,Inc. 8Using this Guide This guide provides information about the Digi ConnectCore for i.MX51 embedded core module family.Conventions used in this guideThis table describes the typographic conventions used in this guide:Digi Information Document UpdatesPlease always check the product specific section on the Digi support website at www.digiembedded.com/support for the most current revision of this document.Contact Information For more information about your Digi products, or for customer service and technical support, contact Digi International.Additional Resources Please also refer to the most recent Freescale i.MX51 processor reference manual and related documentation for additional information.This convention Is used foritalic type Emphasis, new terms, variables, and document titles.monospaced type Filenames, pathnames, and code examples.To contact Digi International by UseMail Digi International 1101 Bren Road EastMinnetonka, MN 55343U.S.A.World Wide Web http://www.digiembedded.com/support/Telephone (U.S.) (952) 912-3444 or (877) 912-3444Telephone (other locations) +1 (952) 912-3444 or (877) 912-3444
©2010DigiInternational,Inc. 9About the ModuleCHAPTER 1The network-enabled ConnectCore for i.MX51 is a highly integrated and future-proof System-on-Module (SOM) solution based on the new Freescale® i.MX51X application processor with a high-performance ARM® Cortex-A8® core, powerful multimedia options, and a complete set of peripherals. The module combines the fast integration, reliability and design flexibility of an off-the-shelf SOM with complete out-of-the-box software development support for platforms such as Microsoft® Windows® Embedded CE 6.0, Digi® Embedded Linux ®and Timesys® LinuxLink®.With industry-leading performance and key features like a dual-display interface and a hardware encryption engine, the module is the ideal choice for a broad range of target markets including medical, digital signage, security/access control, retail, industrial/building automation, transportation and more. Complete and cost-efficient Digi JumpStart KitsTM for Microsoft Windows Embedded CE 6.0 and Linux allow immediate and professional embedded product development with dramatically reduced design risk and time-to-market.
ConnectCorefori.MX51©2010DigiInternational,Inc. 10Features and FunctionalityThe ConnectCore for i.MX51 module is based on the i.MX51 processor from Freescale. This processor offers a high number of interfaces. Most of these interfaces are multiplexed and are not available simultaneously. The module has the following features: High-end, low-power 32-bit System-on-Module600/800 MHz ARM Cortex-A8 core– 32Kbyte L1 instruction and 32Kbyte L1 data cache– 256Kbyte L2 cache– NEON coprocessor– Vector Floating Point (VFP) unitSLC and MLC NAND flash support on moduleUp to 512MB 32-bit/200Mhz DDR2-400 memoryDebug interfaces– JTAG– ETM/ETBRTCSecurity co-processor– Encryption (AES, DES, 3DES and RC4)– Hashing algorithims (MD5, SHA-1, SHA-224 and SHA-256)Timer WatchdogUp to 3 UART ports, up to 4Mbps eachUp to 3 SPI, (two of them up to 54Mbps each)Two I2C (up to 400Kbps)3 memory card interfaces (2 for the wireless version of the module) – SD/SDIO - 1 and 4-bits (up to 200Mbps)– MMC - 1, 4 and 8-bits (up to 416Mbps)USB– Up tp 3x USB 2.0 High-Speed USB Host ports– 1 USB 2.0 On-The-Go USB port (with integrated PHY on module)1-wireKeypad 6x4Two independent PWM interfaces8, 16-bit External Memory interface
ConnectCorefori.MX51©2010DigiInternational,Inc. 11GPIO with interrupt capabilitiesUp to 3x 10-bit ADC channelsMultimedia– 2x Camera ports– 2x Display ports– 4-bit touch screenSPDIF outputThree I2C/AC97/SSI, up to 1.4Mbps eachOn-module three axis accelerometer (optional)On-module 10/100 Ethernet controller (optional)Second on-module 10/100Mbit Ethernet interface (optional)2.4GHz & 5GHz IEEE 802.11a/b/g/n wireless LAN interface (optional)Complete Microsoft Windows Embedded CE 6.0 and Linux platform support with full source codeModule VariantThe ConnectCore for i.MX51 module is available with various population options such as network interfaces (Ethernet, WLAN), memory (flash, RAM), processor (speed grade/operating temperature) and others.
ConnectCorefori.MX51©2010DigiInternational,Inc. 12Block DiagramThe next figures show the block diagram of the Freescale i.MX515 CPU and the block diagram of the ConnectCore for i.MX51 module.CPUSecuritySAHARA v4OpenGLES 2 0 + VG1 1MoryROM 32KBSAHARA v4Trust ZoneRTICSCC v2OpenGLES 2.0 + VG1.1HW Video CodecsHD720 TV-OutROM 32KBRAM 96KBrsTi3ARMCSRTCSyste ControlSecure JTAGTimer x 3PWM x 2 ARMCore600/800 Cortex-A832KBI-Cache32KBD-Cache256KBL2-CachePower MgmtPLL x 3Clock ResetNeonVector Floag Point UnitETMExternal MemoryInterface Processin UnitFast IrDA1-WireI2C x 2 HS MMC /SDIO x 4Smart DMA/AHBSwitch FricDual-Display ControllerImage Signal ProcessorResizing & BlendingInversion&RotaonGPIOKeypadUSB OTG Host + PHYSSI/I2S x 3UART x 3CSPI HS x 2 / LS x 1Inversion& RotaonDual-Camera InterfaceUSB Host x 3Fuse BoxSPDIF Tx10/100 Ethernet x WatchDog x 2
ConnectCorefori.MX51©2010DigiInternational,Inc. 13Module ConnectCore i.MX51ii.MX51 Module180-pin ConnectorMemoryTimersARMCSecuritySystem Control DDR2 MemoryConguronEMIInterfcesIPUARM Corert DMAInterfesNAND MemoryC 3892Eernet HYMC13892lBuck SwitcesBery MgmtbController WLANLDO Regulor10-bit ADCTouc I/F Boost Switc ExtPower SupplyCPU I/FRTC / OscAccelerometer180-pin Connector
ConnectCorefori.MX51©2010DigiInternational,Inc. 14Module PinoutThe module has two 180-pin connectors, J1 and J2. The next tables describe each pin, its properties, and its use on the module and development board. The DC parameters for eachI/O type are defined in the “I/O DC Parameters” section of Appendix A - Specifications. The “Use on module” column shows the connection of the signals in the module. The format of this column is “component: pad_name,” where “component” is the chip where the signals are connected, and “pad_name” is the name of the pad where the signals are connected as they are defined in the component’s datasheet. Pinout LegendI InputOOutputI/O Input or outputPPower# Low level active signalJ1 PinoutPin I/O Type Signal name Use on module Use on development board Comments1 GPIO27 CSI1_D8/GPIO3_12 i.MX51: CSI1_D8 Not used2 GPIO27 CSI1_D9/GPIO3_13 i.MX51: CSI1_D9 Camera 1 Reset3 HSGPIO27 CSI1_D10 i.MX51: CSI1_D10 Camera 1 data4 HSGPIO27 CSI1_D11 i.MX51: CSI1_D11 Camera 1 data5 HSGPIO27 CSI1_D12 i.MX51: CSI1_D12 Camera 1 data6 HSGPIO27 CSI1_D13 i.MX51: CSI1_D13 Camera 1 data7 HSGPIO27 CSI1_D14 i.MX51: CSI1_D14 Camera 1 data8 HSGPIO27 CSI1_D15 i.MX51: CSI1_D15 Camera 1 data9 HSGPIO27 CSI1_D16 i.MX51: CSI1_D16 Camera 1 data10 HSGPIO27 CSI1_D17 i.MX51: CSI1_D17 Camera 1 data11 HSGPIO27 CSI1_D18 i.MX51: CSI1_D18 Camera 1 data12 HSGPIO27 CSI1_D19 i.MX51: CSI1_D19 Camera 1 data13 GPIO27 CSI1_VSYNC/GPIO3_14 i.MX51: CSI1_VSYNC Camera 1 vertical synchronization14 GPIO27 CSI1_HSYNC/GPIO3_15 i.MX51: CSI1_HSYNC Camera 1 horizontal synchronization15 GPIO27 CSI1_PIXCLK i.MX51: CSI1_PIXCLK Camera 1 pixel clock16 GPIO27 CSI1_MCLK i.MX51: CSI1_MCLK Camera 1 & 2 Master clock17 - GND - -
ConnectCorefori.MX51©2010DigiInternational,Inc. 1518 - GND - -19 WLAN WLAN_TDO WLAN: TDO Not Used20 WLAN WLAN_TCK WLAN: TCK Not Used21 WLAN WLAN_TDI WLAN: TDI Not Used22 WLAN WLAN_TMS WLAN: TMS Not Used23 WLAN WLAN_LED WLAN: LED_ON WLAN LED24 WLAN RS_BT_PRIORITY WLAN: BT_PRIORITY Not Used25 WLAN RS_WLAN_ACTIVE WLAN: WLAN_ACTIVE Not Used26 WLAN RS_BT_ACTIVE WLAN: BT_ACTIVE Not Used27 LVIO BOOT_MODE0 i.MX51: BOOT_MODE0 Boot Mode selection Boot configuration not available in EA Kit28 GPIO33 WLAN_DISABLE# WLAN Power Supply Switch WLAN Disable Jumper (J17) This signal switch ON/OFF the supplu of WLAN29 LVIO BOOT_MODE1 i.MX51: BOOT_MODE1 Boot Mode selection Boot configuration not available in EA Kit30 - - - -31 - - - -32 - - - -33 - +2.775V - -34 - - - -35 - +2.775V - -36 - +2.775V - -37 PMIC_GPO MC13892_GPO1 MC13892: GPO1 Reserved38 - +2.775V - -39 PMIC_PWRON PMIC_PWRON1 MC13892: PWRON1 Connected to Power Button (S11) Suspend / Wake-up button40 PMIC_STDBY PMIC_STDBY_REQ i.MX51: PMIC_STBY_REQMC13892: STANDBYReserved Output from i.MX51 to put MC13892 in low power mode41 PMIC_INT PMIC_INT_REQ i.MX51: PMIC_INT_REQ Reserved This high-priority interrupt input on i.MX51 is not used. The output interrupt from PMIC is connected to standard interrupt GPIO_5 on i.MX51.42 PMIC_PWGTDRV PWRGTDRV1 MC13892: PWRGTDRV1 Not used43 PMIC_LED CHRGLED MC13892: CHRGLED Battery Charging LEDPin I/O Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 1644 PMIC_PWGTDRV PWRGTDRV2 MC13892: PWRGTDRV2 +3.3V_REG: ENABLENot used Used on module to enable / disable the +3.3V supply45 PMIC_SE CHRGSE1# MC13892: CHRGSE1# Charger detection circuit This circuit is needed to boot from charger46 - VCC_COINCELL MC13892: LICELL Coincell voltage47 - VLIO MC13892: BATT Battery supply48 - VCHRG MC13892: CHRGRAW Charger supply49 - VLIO MC13892: BATT Battery supply50 - VCHRG MC13892:CHRGRAW Charger supply51 - VLIO MC13892: BATT Battery supply52 - VCHRG MC13892:CHRGRAW Charger supply53 ETH ETH1_TX+ ETH_PHY: TXP Ethernet 1 Tx+54 ETH ETH1_RX+ ETH_PHY: RXP Ethernet 1 Rx+55 ETH ETH1_TX- ETH_PHY: TXN Ethernet 1 Tx-56 ETH ETH1_RX- ETH_PHY: RXN Ethernet 1 Rx-57 - GND - -58 GPIO33 ETH1_LINK ETH_PHY: LED1 Ethernet 1 Link LED59 GPIO27 DISPB2_SER_DIN/GPIO3_5i.MX51: DISPB_2_SER_DINGPIO1 signal to LCD connectors60 GPIO33 ETH1_ACTIVITY ETH_PHY: LED2 Ethernet 1 Activity LED61 GPIO27 DISPB2_SER_RS/GPIO3_8i.MX51: DISPB2_SER_RS USB Host Reset In Early Availability Kit USB host and Digital IO interface cannot be used at the same time. 62 GPIO27 DISPB2_SER_DIO/GPIO3_6i.MX51: DISPB2_SER_DIO User button 1 & Digital IO 763 GPIO27 DISP2_DATA0/MII_RXD3/USBH3_CLKi.MX51: DISP2_DATA0ETH_PHY: RXD3LCD2 Data Ethernet 1 and LCD2 cannot be used at the same time. 64 GPIO27 DISPB2_SER_CLK_GPIO3_7i.MX51: DISPB2_SER_CLKCamera 2 Reset65 HSGPIO27 DISP2_DATA2 i.MX51: DISP2_DATA2 LCD2 Data66 GPIO27 DISP2_DATA1/MII_RX_ER/USBH3_DIRi.MX51: DISP2_DATA1ETH_PHY: RXD4LCD2 Data Ethernet 1 and LCD2 cannot be used at the same time. 67 HSGPIO27 DISP2_DATA4 i.MX51: DISP2_DATA4 LCD2 Data68 HSGPIO27 DISP2_DATA3 i.MX51: DISP2_DATA3 LCD2 Data69 GPIO27 DISP2_DATA6/MII_TXD1/USBH3_STPi.MX51: DISP2_DATA6ETH_PHY: TXD1LCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.Pin I/O Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 1770 HSGPIO27 DISP2_DATA5 i.MX51: DISP2_DATA5 LCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.71 GPIO27 DISP2_DATA8/MII_TXD3/USBH3_DATA0i.MX51: DISP2_DATA8ETH_PHY: TDX3LCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.72 GPIO27 DISP2_DATA7/MII_TXD2/UBH3_NXTi.MX51: DISP2_DATA7ETH_PHY: TDX2LCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.73 GPIO27 DISP2_DATA10/MII_COL/USBH3_DATA2i.MX51: DISP2_DATA10ETH_PHY: COLLCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.74 GPIO27 DISP2_DATA9/MII_TXEN/USBH3_DATA1i.MX51: DISP2_DATA9ETH_PHY: TXENLCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.75 GPIO27 DISP2_DAT12/MII_RX_DV/USBH3_DATA4i.MX51: DISP2_DATA12ETH_PHY: RXDVLCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.76 GPIO27 DISP2_DAT11/MII_RX_CLK/USBH3_DATA3i.MX51: DISP2_DATA11ETH_PHY: RXCLKLCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.77 GPIO27 DISP2_DATA14/MII_RXD0/USBH3_DATA6i.MX51: DISP2_DATA14ETH_PHY: RXD0LCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.78 GPIO27 DISP2_DAT13/MII_TX_CLK/USBH3_DATA5i.MX51: DISP2_DATA13ETH_PHY: TXCLKLCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.79 GPIO27 DI2_PIN2/MII_MDC i.MX51: DI2_PIN2ETH_PHY: MDCLCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.80 GPIO27 DISP2_DAT15/MII_TXD0/USBH3_DATA7i.MX51: DISP2_DATA15ETH_PHY: TXD0LCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.81 GPIO27 DI2_PIN4/MII_CRS i.MX51: DI2_PIN4ETH_PHY: CRSLCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.82 - GND - -83 RGB IOR i.MX51: IOR Not used84 GPIO27 DI2_DISP_CLK/MII_RXD1i.MX51: DI2_DISP_CLKETH_PHY: RXD1LCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.85 RGB IOR_BACK i.MX51: IOR_BACK Not used86 GPIO27 DI2_PIN3/MII_MDIO i.MX51: DI2_PIN3ETH_PHY: MDIOLCD2 Data Ethernet 1 and LCD2 cannot be used at the same time.87 RGB IOB i.MX51: IOB Not useD88 IOG IOG i.MX51: IOG Not used89 RGB IOB_BACK i.MX51: IOB_BACK Not usedPin I/O Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 1890 RGB IOG_BACK i.MX51: IOG_BACK Not used91 GPIO18 JTAG_TCK i.MX51: JTAG_TCK JTAG Connector92 GPIO18 JTAG_TRST# i.MX51: JTAG_TRST# JTAG Connector93 GPIO18 JTAG_TMS i.MX51: JTAG_TMS JTAG Connector94 GPIO18 JTAG_MOD# i.MX51: JTAG_MOD# JTAG Mod Selection95 GPIO18 JTAG_TDI i.MX51: JTAG_TDI JTAG Connector96 GPIO18 JTAG_DE# i.MX51: JTAG_DE_B JTAG Connector97 GPIO18 JTAG_TDO i.MX51: JTAG_TDO JTAG Connector98 LVIO RESET_IN# i.MX51: RESET_IN_BMC13892: RESETBNot used Warm reset input to i.MX51.99 LVIO POR# i.MX51: POR_BMC13892: RESETBMCULCD 1 & 2 Reset, JTAG Connector and Reset Button (S4)Cold reset input to i.MX51. Used to reset the module and peripherals on the Dev. Kit.100 - +1.8V -101 - GND -102 - GND -103 ETH ETH2_TX+/ETH2_DA+ ETH_CTRL: TPO+ Ethernet 1 Tx+104 ETH ETH2_RX+/ETH2_DB+ ETH_CTRL: TPI+ Ethernet 1 Rx+105 ETH ETH2_TX+/ETH2_DA- ETH_CTRL: TPO- Ethernet 1 Tx-106 ETH ETH2_RX+/ETH2_DB- ETH_CTRL: TPI- Ethernet 1 Rx-107 - - - - -108 - - - - -109 - - - - -110 - - - - -111 GPIO33 ETH2_ACTIVITY# ETH_CTRL: GPIO1/LED2# Ethernet 2 Activity LED112 GPIO33 ETH2_LINK# ETH_CTRL: GPIO0/LED1# Ethernet 2 Link LED113 GPOIO18 EIM_CS0/GPIO2_25 i.MX51: EIM_CS0 Peripheral Application Chip Select114 GPOIO18 EIM_CS1/GPIO2_26 i.MX51: EIM_CS1 Not used115 GPOIO18 EIM_CS2/GPIO2_27 i.MX51: EIM_CS2 Not used116 GPOIO18 EIM_CS3/GPIO2_28 i.MX51: EIM_CS3 Not used117 GPOIO18 EIM_CS4/GPIO2_29 i.MX51: EIM_CS4 Not used118 GPOIO18 EIM_CS5/LAN9221_CS#/GPIO2_30i.MX51: EIM_CS4EHT_CTRL: CS#Reserved119 GPOIO18 EIM_DTACK/GPIO2_31 i.MX51: EIM_DTACK Not usedPin I/O Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 19120 GPOIO18 EIM_LBA/GPIO3_1 i.MX51: EIM_LBA Not used121 GPOIO18 EIM_DA0/TRACE16 i.MX51: EIM_DA0ETH_CTRL: A1Peripheral Application Data / Address122 GPOIO18 EIM_DA1/TRACE17 i.MX51: EIM_DA1ETH_CTRL: A2Peripheral Application Data / Address123 GPOIO18 EIM_DA2/TRACE18 i.MX51: EIM_DA2ETH_CTRL: A3Peripheral Application Data / Address124 GPOIO18 EIM_DA3/TRACE19 i.MX51: EIM_DA3ETH_CTRL: A4Peripheral Application Data / Address125 - GND - -126 GPOIO18 EIM_DA5/TRACE21 i.MX51: EIM_DA5ETH_CTRL: A6Peripheral Application Data / Address127 GPOIO18 EIM_DA4/TRACE20 i.MX51: EIM_DA4ETH_CTRL: A5Peripheral Application Data / Address128 GPOIO18 EIM_DA7/TRACE23 i.MX51: EIM_DA7ETH_CTRL: FIFO_SELPeripheral Application Data / Address129 GPOIO18 EIM_DA6/TRACE22 i.MX51: EIM_DA6ETH_CTRL: A7Peripheral Application Data / Address130 - GND - -131 GPOIO18 EIM_DA8/TRACE24 i.MX51: EIM_DA8 Peripheral Application Data / Address132 GPOIO18 EIM_DA9/TRACE25 i.MX51: EIM_DA9 Peripheral Application Data / Address133 GPOIO18 EIM_DA10/TRACE26 i.MX51: EIM_DA10 Not used134 GPOIO18 EIM_DA11/TRACE27 i.MX51: EIM_DA11 Not used135 - GND - -136 GPOIO18 EIM_DA13/TRACE29 i.MX51: EIM_DA13 Not used137 GPOIO18 EIM_DA12/TRACE28 i.MX51: EIM_DA12 Not used138 GPOIO18 EIM_DA15/TRACE31 i.MX51: EIM_DA15 Not used139 GPOIO18 EIM_DA14/TRACE30 i.MX51: EIM_DA14 Not used140 - GND - -141 GPOIO18 EIM_D16/TRACE0 i.MX51: EIM_D16ETH_CTRL: D0Peripheral Application Data 142 GPOIO18 EIM_D17/TRACE1 i.MX51: EIM_D17ETH_CTRL: D1Peripheral Application Data143 GPOIO18 EIM_D18/TRACE2 i.MX51: EIM_D18ETH_CTRL: D2Peripheral Application DataPin I/O Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 20144 GPOIO18 EIM_D19/TRACE3 i.MX51: EIM_D19ETH_CTRL: D3Peripheral Application Data145 - +3.15V - -146 GPOIO18 EIM_D21/TRACE5 i.MX51: EIM_D21ETH_CTRL: D5Peripheral Application Data147 GPOIO18 EIM_D20/TRACE4 i.MX51: EIM_D20ETH_CTRL: D4Peripheral Application Data148 GPOIO18 EIM_D23//TRACE7 i.MX51: EIM_D23ETH_CTRL: D7Peripheral Application Data149 GPOIO18 EIM_D22/TRACE6 i.MX51: EIM_D22ETH_CTRL: D8Peripheral Application Data150 - GND - -151 GPOIO18 EIM_D24/TRACE8 i.MX51: EIM_D24ETH_CTRL: D8Peripheral Application Data152 GPOIO18 EIM_D25/TRACE9 i.MX51: EIM_D25ETH_CTRL: D9Peripheral Application Data153 GPOIO18 EIM_D26/TRACE10 i.MX51: EIM_D26ETH_CTRL: D10Peripheral Application Data154 GPOIO18 EIM_D27/TRACE11 i.MX51: EIM_D27ETH_CTRL: D11Peripheral Application Data155 - GND - -156 GPOIO18 EIM_D29/TRACE13 i.MX51: EIM_D29ETH_CTRL: D13Peripheral Application Data157 GPOIO18 EIM_D28/TRACE12 i.MX51: EIM_D28ETH_CTRL: D12Peripheral Application Data158 GPOIO18 EIM_D31/TRACE15 i.MX51: EIM_D31ETH_CTRL: D15Peripheral Application Data159 GPOIO18 EIM_D30/TRACE14 i.MX51: EIM_D30ETH_CTRL: D14Peripheral Application Data160 GPOIO18 EIM_A17/GPIO2_11 i.MX51: EIM_A17 Not used161 GPOIO18 EIM_A16/GPIO2_10 i.MX51: EIM_A16 Not used162 GPOIO18 EIM_A19/GPIO2_13 i.MX51: EIM_A19 Not used163 GPOIO18 EIM_A18/GPIO2_12 i.MX51: EIM_A18 Not used164 GPOIO18 EIM_A21/GPIO2_15 i.MX51: EIM_A21 Boot Configuration Switch165 GPOIO18 EIM_A20/GPIO2_14 i.MX51: EIM_A20 Boot Configuration Switch166 GPOIO18 EIM_A23/GPIO2_17 i.MX51: EIM_A23 Not used 167 GPOIO18 EIM_A22/GPIO2_16 i.MX51: EIM_A22 Not used Pin I/O Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 21J2 Pinout168 GPOIO18 EIM_A25/GPIO2_19 i.MX51: EIM_A25 Not used 169 GPOIO18 EIM_A24/GPIO2_18 i.MX51: EIM_A24 Not used 170 GPOIO18 EIM_A27/GPIO2_21 i.MX51: EIM_A27 XBEE_SLEEP_RQ171 GPOIO18 EIM_A26/GPIO2_20 i.MX51: EIM_A26 Not used 172 GPOIO18 EIM_OE#/GPIO2_24 i.MX51: EIM_OEETH_CTRL: RD#Peripheral Application Output Enable173 GPOIO18 EIM_EB0 i.MX51: EIM_EB0 Not used 174 GPOIO18 EIM_RW# i.MX51: EIM_RWETH_CTRL: WR#Peripheral Application Read / Write175 GPOIO18 EIM_EB1 i.MX51: EIM_EB1 Not used 176 GPOIO18 EIM_CRE/GPIO3_2 i.MX51: EIM_CRE Peripheral Application Interrupt input177 GPOIO18 EIM_EB2/GPIO2_22/TRCTLi.MX51: EIM_EB2 Peripheral Application Byte Enable 2178 GPOIO18 EIM_WAIT i.MX51: EIM_WAIT Not used 179 GPOIO18 EIM_EB3/GPIO2_23/TRCLKi.MX51: EIM_EB3 Peripheral Application Byte Enable 3180 GPOIO18 EIM_BCLK i.MX51: EIM_BCLK Peripheral Application Clock Burst By default not connected on Development Board.Pin Type Signal name Use on module Use on development board Comments1HSGPIO27 DISP1_DAT0 i.MX51: DISP1_DAT0 HDMI, VGA and LCD1 Data2HSGPIO27 DISP1_DAT1 i.MX51: DISP1_DAT1 HDMI, VGA and LCD1 Data3HSGPIO27 DISP1_DAT2 i.MX51: DISP1_DAT2 HDMI, VGA and LCD1 Data4HSGPIO27 DISP1_DAT3 i.MX51: DISP1_DAT3 HDMI, VGA and LCD1 Data5HSGPIO27 DISP1_DAT4 i.MX51: DISP1_DAT4 HDMI, VGA and LCD1 Data6HSGPIO27 DISP1_DAT5 i.MX51: DISP1_DAT5 HDMI, VGA and LCD1 Data7GPIO27 DISP1_DAT6 i.MX51: DISP1_DAT6 HDMI, VGA and LCD1 Data, Boot Configuration8GPIO27 DISP1_DAT7 i.MX51: DISP1_DAT7 HDMI, VGA and LCD1 Data, Boot ConfigurationPin I/O Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 229GPIO27 DISP1_DAT8 i.MX51: DISP1_DAT8 HDMI, VGA and LCD1 Data, Boot ConfigurationOn Development Kit DISP1 and DISP2 are configured at 18-bit, and connected to 24-bit LCDs.On Development Kit some DISP1 signals are used to configure the boot process. On Early Availability Kit DISP1 and DISP2 are configured at 24-bit, and connected to 24-bit LCDs.10 GPIO27 DISP1_DAT9 i.MX51: DISP1_DAT9 HDMI, VGA and LCD1 Data, Boot Configuration11 GPIO27 DISP1_DAT10 i.MX51: DISP1_DAT10 HDMI, VGA and LCD1 Data, Boot Configuration12 GPIO27 DISP1_DAT11 i.MX51: DISP1_DAT11 HDMI, VGA and LCD1 Data, Boot Configuration13 GPIO27 DISP1_DAT12 i.MX51: DISP1_DAT12 HDMI, VGA and LCD1 Data, Boot Configuration14 GPIO27 DISP1_DAT13 i.MX51: DISP1_DAT13 HDMI, VGA and LCD1 Data, Boot Configuration15 GPIO27 DISP1_DAT14 i.MX51: DISP1_DAT14 HDMI, VGA and LCD1 Data, Boot Configuration16 GPIO27 DISP1_DAT15 i.MX51: DISP1_DAT15 HDMI, VGA and LCD1 Data, Boot Configuration17 GPIO27 DISP1_DAT16 i.MX51: DISP1_DAT16 HDMI, VGA and LCD1 Data, Boot Configuration18 GPIO27 DISP1_DAT17 i.MX51: DISP1_DAT17 HDMI, VGA and LCD1 Data, Boot Configuration19 GPIO27 DISP1_DAT18 i.MX51: DISP1_DAT18 Not used20 GPIO27 DISP1_DAT19 i.MX51: DISP1_DAT19 Not used21 GPIO27 DISP1_DAT20 i.MX51: DISP1_DAT20 Boot Configuration22 GPIO27 DISP1_DAT21 i.MX51: DISP1_DAT21 Boot Configuration23 GPIO27 DISP1_DAT22 i.MX51: DISP1_DAT22 LCD2 Data24 GPIO27 DISP1_DAT23 i.MX51: DISP1_DAT23 LCD2 Data25 GPIO27 DI1_PIN2 i.MX51: DI1_PIN2 HDMI, VGA and LCD1 HSYNC26 -GND - -27 GPIO27 DI1_PIN11/GPIO3_0 i.MX51: DI1_PIN11 LCD1 PWREN#28 GPIO27 DI1_DISP_CLK i.MX51: DI1_DISP_CLK HDMI, VGA and LCD1 Clock29 GPIO27 DI1_PIN13/GPIO3_2 i.MX51: DI1_PIN13 LCD1 and LCD2 GPIO230 GPIO27 DI1_PIN3 i.MX51: DI1_PIN3 HDMI, VGA and LCD1 VSYNC31 GPIO27 DI1_PIN15 i.MX51: DI1_PIN15 HDMI, VGA and LCD1 DRDY32 GPIO27 DI1_PIN12/GPIO3_1 i.MX51: DI1_PIN12 LCD2 PWREN#33 GPIO27 DI_GP2 i.MX51: DI_GP2 Not used34 GPIO27 DI_GP1 i.MX51: DI_GP1 Not usedPin Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 2335 GPIO27 DI_GP4/MII_RXD2 i.MX51: DI_GP4LAN8710: RXD2LCD2 DRDY36 GPIO27 DI_GP3/MII_TX_ER i.MX51: DI_GP3LAN8710: INT#/TXER/TXD4Not used37 GPIO27 DI1_D1_CS/GPIO3_4 i.MX51: DI_D1_CS LCD1 and LCD2 Touch selection input38 GPIO27 DI1_D0_CS/GPIO3_3 i.MX51: DI_D0_CS LCD1 and LCD2 Touch selection input39 ADIN TOUCH_X1 MC13892: TSX1 LCD1 and LCD2 Touch X1 Analog input from Touch Screen40 ADIN ADIN5 MC13892: ADIN5 Reserved41 ADIN TOUCH_X2 MC13892: TSX2 LCD1 and LCD2 Touch X2 Analog input from Touch Screen42 ADIN ADIN6 MC13892: ADIN6 Not used Analog input 43 ADIN TOUCH_Y1 MC13892: TSY1 LCD1 and LCD2 Touch Y1 Analog input from Touch Screen44 ADIN ADIN7 MC13892: ADIN7 Not used Analog input 45 ADIN TOUCH_Y2 MC13892: TSY2 LCD1 and LCD2 Touch Y2 Analog input from Touch Screen46 -ADC_GND - -47 -GND - -48 PMIC_STDBY ADTRIG MC13892: ADTRIG Not used49 -SWBST MC13892: SWBSTMC13892: VINUSB-Used in the module to power USB PHY50 -LEDKP MC13892: LEDKP Reserved51 PMIC_LED LEDR MC13892: LEDR Not used52 -LEDAD MC13892: LEDAD Reserved53 PMIC_LED LEDG MC13892: LEDG Not used54 -LEDMD MC13892: LEDMD Reserved55 PMIC_LED LEDB MC13892: LEDB Not used56 -VSWLED - -57 GPIO27 CSI2_D12/GPIO4_9 i.MX51: CSI2_D12 Camera 2 Data58 GPIO27 CSI2_D13/GPIO4_10 i.MX51: CSI2_D13 Camera 2 Data59 HSGPIO27 CSI2_D14 i.MX51: CSI2_D14 Camera 2 Data60 HSGPIO27 CSI2_D15 i.MX51: CSI2_D15 Camera 2 Data61 HSGPIO27 CSI2_D16 i.MX51: CSI2_D16 Camera 2 DataPin Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 2462 HSGPIO27 CSI2_D17 i.MX51: CSI2_D17 Camera 2 Data63 GPIO27 CSI2_D18/GPIO4_11 i.MX51: CSI2_D18 Camera 2 Data64 GPIO27 CS12_D19/GPIO4_12 i.MX51: CSI2_D19 Camera 2 Data65 GPIO27 CSI1_VSYNC/GPIO4_13 i.MX51: CSI2_VSYNC Camera 2 VSYNC66 GPIO27 CSI2_HSYNC/GPIO4_14 i.MX51: CSI2_HSYNC Camera 2 HSYNC67 GPIO27 CSI2_PIXCLK_GPIO4_15 i.MX51: CSI2_PIXCLK Camera 2 PIXCLK68 -GND -69 -GND -70 DIG_USB USB_OTG_ID i.MX51: ID USB OTG ID71 AN_USB USB_OTG_DP i.MX51: DP USB OTG DP72 -USB_OTG_VBUS i.MX51: VBUS USB OTG VBUS73 AN_USB USB_OTG_DN i.MX51: DN USB OTG DN74 GPIO27 GPIO1_8/USB_PWR i.MX51: GPIO_8 Not used75 -GND - -76 GPIO27 GPIO1_2/PWM1/I2C2_SCLi.MX51: GPIO1_2MMA7455LR1:SCLI2C Bus Clock77 GPIO27 GPIO1_7/MMA7455LR_INT1i.MX51: GPIO1_7MMA7455LR1:INT1Reserved Accelerometer Interrupt78 GPIO27 GPIO1_3/PWM2/I2C2_SDAi.MX51: GPIO1_3MMA7455LR1:SDI2C Bus Clock79 GPIO27 GPIO1_6/MMA7455LR_INT2i.MX51: GPIO1_6MMA7455LR1:INT2Reserved Accelerometer Interrupt80 PMIC_INT CLK32K_PER MC13892: CLK32K Not used81 -GND - -82 -GND - -83 -CKIH1 i.MX51: CKIH1 Not used84 -CKIH2 i.MX51: CKIH2 Not used85 UHVIO33 SD2_DATA0/SD1_DATA1/SPI_MOSIi.MX51: GPIO1_6WLAN: SDIO_DATA0Reserved SD bus 2 connected to WLAN.In modeules without WLAN this SD bus can be used in the development boards.86 UHVIO33 SD2_CLK/I2C1_SDA/SPI_SCLKi.MX51: SD2_CLKWLAN: SDIO_CLKReserved87 UHVIO33 SD2_DATA1/SD1_DATA5i.MX51: SD2_DATA1WLAN: SDIO_DATA1Reserved88 UHVIO33 SD2_CMD/I2C1_SCL/SPI_MOSIi.MX51: SD2_CMDWLAN: SDIO_CMDReservedPin Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 2589 UHVI0O3 SD2_DATA2/SDI_DATA6i.MX51: SD2_DATA2WLAN: SDIO_DATA2Reserved90 GPIO27 KEY_COL0 i.MX51: KEY_COL0 XBee Reset#91 UHVIO33 SD2_DATA3/SD1_DATA7/SPI_SS2i.MX51: SD2_DATA3WLAN: SDIO_DATA3Reserved92 GPIO27 KEY_COL1 i.MX51: KEY_COL1 Not used93 GPIO27 KEY_ROW0 i.MX51: ROW0 Not used94 GPIO27 KEY_COL2 i.MX51: KEY_COL2 Not used95 GPIO27 KEY_ROW1 i.MX51: ROW1 Not used96 GPIO27 KEY_COL3 i.MX51: KEY_COL3 Not used97 GPIO27 KEY_ROW2 i.MX51: ROW2 Not used98 GPIO27 KEY_COL5/UART3_CTS#/I2C1_SDAi.MX51: KEY_COL5 XBee RTS#99 GPIO27 KEY_ROW3 i.MX51: KEY_ROW3 Not used100 GPIO27 GPIO1_0/SD1_CD#/SPI_SS2i.MX51: GPIO1_0 HDMI Interrupt101 GPIO27 KEY_COL4/UART3_RTS#/I2C2_SCLi.MX51: KEY_COL4 XBee/UART3 RTS selection102 GPIO27 GPIO1_1/SD1_WP#/SPI_MISOi.MX51: GPIO1_1 User Button 2103 GPIO27 OWIRE_LINE/GPIO1_24 i.MX51: OWIRE_LINE One-Wire, HDMI SPDIF104 UHVIO31 SD1_DATA0/AUD5_TXD/SPI_MOSIi.MX51: SD1_DATA0 MicroSD TM Data105 UHVIO31 SD1_CMD/AUD5_RXFS/SPI_MOSIi.MX51: SD1_CMD MicroSD TM Command106 UHVIO31 SD1_DATA1/AUD5_RXDi.MX51: SD1_DATA1 MicroSD TM Data107 UHVIO31 SD1_CLK/AUD5_RXC/SPI_SCLKi.MX51: SD1_CLK MicroSD TM Clock108 UHVIO31 SD1_DATA2/AUD5_TXC i.MX51: SD1_DATA2 MicroSD TM Data109 GPIO27 WDOG1# i.MX51: GPIO1_4 Reserved HDMI Interrupt and PMIC Watchdog input cannot be used at the same time.110 UHVIO31 SD1_DATA3/AUD5_TXFS/SPI_SS1i.MX51: SD1_DATA3 MicroSD TM Data111 GPIO27 CSPI1_MOSI/I2C1_SDA/GPIO4_22i.MX51: CSPI1_MOSIMC13892: MOSISPI_MOSI112 GPIO27 CSPI1_SS0_PMIC/AUD4_TXC/GPIO4_24i.MX51: CSPI1_SS0MC13892: CSReserved Pin Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 26113 GPIO27 CSPI1_MISO/AUD4_RXD/GPIO4_23i.MX51: CSPI1_MISOMC13892: CSSPI_MISO114 GPIO27 CSPI1_SS1/AUD4_TXD/GPIO4_25i.MX51: CSPI1_SS1 SPI_SS1115 GPIO27 CSPI1_SCLK/I2C1_SDA/GPIO4_27i.MX51: CSPI1_SCLKMC13892: CLKSPI_SCLK116 GPIO27 CSPI1_RDY/AUD4_TXFS/GPIO4_26i.MX51: CSPI1_RDY LCD1 and LCD2 SPI Chip Select117 GPIO27 UART1_RXD/GPIO4_28 i.MX51: UART1_RXD UART1 MEI118 GPIO27 UART1_RTS#/GPIO4_30 i.MX51: UART1_RTS UART1 MEI119 GPIO27 UART1_TXD/PWM2/GPIO4_29i.MX51: UART1_TXD UART1 MEI120 GPIO27 UART1_CTS#/GPIO4_31 i.MX51: UART1_CTS UART1 MEI121 GPIO27 UART2_RXD/GPIO1_20 i.MX51: UART2_RXD UART2 Console122 GPIO27 UART3_RXD/UART1_DTR#/GPIO1_22i.MX51: UART3_RXD UART3/XBee123 GPIO27 UART2_TXD/GPIO1_21 i.MX51: UART2_TXD UART2 Console124 GPIO27 UART3_TXD/UART1_DSR#/GPIO1_23i.MX51: UART3_TXD UART3/XBee125 GPIO27 USBH1_DATA2/UART2_TXD_GPIO1_13i.MX51: USBH1_DATA2 USB Host126 -GND - -127 GPIO27 USBH1_DATA4/CSPI_SS0/GPIO1_15i.MX51: USBH1_DATA4 USB Host128 GPIO27 USBH1_DATA0/UART2_CTS#/GPIO1_11i.MX51: USBH1_DATA0 USB Host (default) and UART2 Console129 GPIO27 USBH1_DATA6/CSPI_SS2/GPIO1_17i.MX51: USBH1_DATA6 USB Host130 GPIO27 USBH1_DATA1/UART2_RXD/GPIO1_12i.MX51: USBH1_DATA1 USB Host131 GPIO27 USBH1_DIR/SPI_MOSI/GPIO1_26/I2C2_SDAi.MX51: USBH1_DIR USB Host132 GPIO27 USBH1_DATA3/UART2_RTS#/GPIO1_14i.MX51: USBH1_DATA3 USB Host (default) and UART2 Console133 GPIO27 USBH1_STP/SPI_RDY/GPIO1_27i.MX51: USBH1_STP USB Host134 GPIO27 USBH1_DATA5/UART2_RTS#/GPIO1_14i.MX51: USBH1_DATA5 USB Host135 GPIO27 USBH1_NXT/SPI_MISO/GPIO1_28i.MX51: USBH1_NXT USB HostPin Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 27136 GPIO27 USBH1_DATA7/SPI_SS3/SPI2_SS3/GPIO1-18i.MX51: USBH1_DATA7 USB Host137 GPIO27 AUD3_BB_TXD/GPIO4_18i.MX51: AUD3_BB_TXD Audio CODEC and HDMI Audio138 GPIO27 USBH1_CLK/SPI_SCLK/GPIO1_25/I2C2_SCL/i.MX51: USBH1_CLK USB Host139 GPIO27 AUD3_BB_RXD/UART3_RXD/GPIO4_19i.MX51: AUD_BB_RXD Audio CODEC140 -HS_I2C_SCL/GPIO4_16 i.MX51: I2C_SCL Not used The HS_I2C interface is not working in i.MX51.141 GPIO27 AUD3_BB_CK/GPIO4_20 i.MX51: AUD_BB_CK Audio CODEC and HDMI Audio142 -HS_I2C_SDA/GPIO4_17 i.MX51: I2C_SDA Not used The HS_I2C interface is not working in i.MX51.143 -+3.3V - -144 GPIO27 AUD3_BB_FS/UART3_TXD/GPIO4_21i.MX51: AUD_BB_FS Audio CODEC and HDMI Audio145 UHVIO31 NANDF_D0/PATA_D0/SD4_DATA7/GPIO4_8i.MX51: NANDF_D0NAND_FLASH: I/O0Reserved146 -+3.3V - -147 UHVIO31 NANDF_D2/PATA_D2/SD4_DATA5/GPIO4_6i.MX51: NANDF_D2NAND_FLASH: I/O2Reserved148 UHVIO31 NANDF_D1/PATA_D1/SD4_DATA6/GPIO4_7i.MX51: NANDF_D1NAND_FLASH: I/O1Reserved149 UHVIO31 NANDF_D4/PATA_D4/SD4_CD/GPIO4_4i.MX51: NANDF_D4NAND_FLASH: I/O4Reserved150 UHVIO31 NANDF_D3/PATA_D3/SD4_DATA4/GPIO4_5i.MX51: NANDF_D3NAND_FLASH: I/O3Reserved151 UHVIO31 NANDF_D6/PATA_D6/SD4_LCTL/GPIO4_2i.MX51: NANDF_D6NAND_FLASH: I/O6Reserved152 UHVIO31 NANDF_D5/PATA_D5/SD4_WP/GPIO4_3i.MX51: NANDF_D5NAND_FLASH: I/O5Reserved153 UHVIO31 NANDF_D8/PATA_D8/GPIO4_0/SD3_DATA0i.MX51: NANDF_D8 SD/MMC Data154 UHVIO31 NANDF_D7/PATA_D7/GPIO4_1i.MX51: NANDF_D7NAND_FLASH: I/O7Reserved155 UHVIO31 NANDF_D10/PATA_D10/GPIO3_30/SD3_D2i.MX51: NANDF_D10 SD/MMC DataPin Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 28156 UHVIO31 NANDF_D9/PATA_D9/GPIO3_31/SD3_D1i.MX51: NANDF_D9 SD/MMC Data157 UHVIO31 NANDF_D12/PATA_D12/GPIO3_28/SD3_D4i.MX51: NANDF_D12 SD/MMC Data158 UHVIO31 NANDF_D11/PATA_D11/GPIO3_29/SD3_D3i.MX51: NANDF_D11 SD/MMC Data159 UHVIO31 NANDF_D14/PATA_D14/GPIO3_26/SD3_D6i.MX51: NANDF_D14 SD/MMC Data160 UHVIO31 NANDF_D13/PATA_D13/GPIO3_27/SD3_D5i.MX51: NANDF_D13 SD/MMC Data161 UHVIO31 NANDF_CS0#/GPIO3_16 i.MX51: NANDF_CS0NAND_FLASH: CE#Reserved162 UHVIO31 NANDF_D15/PATA_D15/GPIO3_25/SD3_D7i.MX51: NANDF_D15 SD/MMC Data163 UHVIO31 NANDF_CS2#/PATA_CS0#/GPIO3_18i.MX51: NANDF_CS2NAND_FLASH: NCDigital I/O Connector164 UHVIO31 NANDF_CS1#/GPIO3_17 i.MX51: NANDF_CS1NAND_FLASH: NCSD/MMC Write Protect165 UHVIO31 NANDF_CS4#/PATA_DA0/GPIO3_20i.MX51: NANDF_CS4 Digital I/O Connector166 UHVIO31 NANDF_CS3#/PATA_CS1#/GPIO3_19i.MX51: NANDF_CS3NAND_FLASH: NCHDMI audio clock enable167 UHVIO31 NANDF_CS6#/PATA_DA2/GPIO3_22i.MX51: NANDF_CS6 Digital I/O Connector168 UHVIO31 NANDF_CS5#/PATA_DA1/GPIO3_21i.MX51: NANDF_CS5 Digital I/O Connector169 UHVIO31 NANDF_RDY_INT/GPIO3_24i.MX51: NANDF_RDY_INTSD/MMC Command170 UHVIO31 NANDF_CS7#/GPIO3_23 i.MX51: NANDF_CS7 SD/MMC Clock SD clock and Digital IO cannot be used at the same time. 171 UHVIO31 NANDF_WE#/PATA_DIOW/GPIO3_3i.MX51: NANDF_WE_BNAND_FLASH: WE#Reserved172 UHVIO31 GPIO_NAND/PATA_INTRQ/GPIO3_12i.MX51: GPIO_NAND SD/MMC Card Detect173 UHVIO31 NANDF_ALE/PATA_BUFFER_EN/GPIO3_5i.MX51: NANDF_ALENAND_FLASH: ALEReservedPin Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 29174 UHVIO31 NANDF_RE#/PATA_DIOR/GPIO3_4i.MX51: NANDF_RE_BNAND_FLASH: RE#Reserved175 UHVIO31 NANDF_WP#/PATA_DMACK/GPIO3_7i.MX51: NANDF_WP_BNAND_FLASH: WP#Reserved176 UHVIO31 NANDF_CLE/PATA_RESET/GPIO3_6i.MX51: NANDF_CLENAND_FLASH: CLEReserved177 UHVIO31 NANDF_RB1/PATA_IORDY/GPIO3_9i.MX51: NANDF_RB1NAND_FLASH: NCUser LED2 and Digital I/O Connector 178 UHVIO31 NANDF_RB0/PATA_DMARQ/GPIO3_8i.MX51: NANDF_RB0NAND_FLASH: R/B#Reserved179 UHVIO31 NANDF_RB3/GPIO3_11 i.MX51: NANDF_RB3NAND_FLASH: NCDigital I/O Connector180 UHVIO31 NANDF_RB2/GPIO3_10 i.MX51: NANDF_RB2NAND_FLASH: NCUser LED1 and Digital I/O Connector Pin Type Signal name Use on module Use on development board Comments
ConnectCorefori.MX51©2010DigiInternational,Inc. 30PowerModule Power SuppliesThe following figure shows the power supply scheme of the ConnectCore for i.MX51 module.Supply InputsThe ConnectCore for i.MX51module has the following supply inputs:Battery input (VLIO)Charger input (VCHRG)Coin Cell input (VCC_COINCELL)Battery input (VLIO)The VLIO supply is used to generate all the voltage supplies needed in the module by the ConnectCore for i.MX51 CPU and by the peripherals. The minimum voltage of VLIO to allow the module to turn on is +3.4V. The maximum voltage of VLIO is +4.8V. Charger input (VCHRG)The battery charger supply is used to charge rechargeable batteries, as well as to power up the module when there is no battery or the battery is discharged. The minimum voltage of the battery charger is +3.4V. The maximum voltage of the battery charger is +20V.
ConnectCorefori.MX51©2010DigiInternational,Inc. 31Coin Cell input (VCC_COINCELL)A connection for a coin cell or supercap is provided at VCC_COINCELL. From the coin cell the RTC remains supplied in case of absense of the main battery. A low current 60uA charger is included which will change the coin cell to a programmable voltage of +2.5V to +3.3V. In case the module is turned off, it is ensured that the coin cell charge is maintained as long as a valid main battery is in place. The behavior of the coin cell charger is programmable.The following table shows the current draw from the coin cell when there is no main battery attached:The maximum voltage of the coin cell supply is +2V. The maximum voltage of the coin cell supply is +3.6V.Supply OutputsThe ConnectCore for 1.MX51 module provides the following supply outputs:+3.3V+2.775VSWBT (+5V)+1.8V+3.15V+3.3VThe ConnectCore for i.MX51 module has a DC/DC converter to generate a +3.3V supply. This supply is used in the module to power the WLAN interface, the Ethernet 1PHY and the second Ethernet Controller. This power regulator can be enabled/disabled by the software to save power when the module is in the low power modes. The maximum current provider by this regulator is 1A.+2.775VThis supply is used in the module to power the ConnectCore for i.MX51 peripherals, the accelerometer and the ConnectCore for i.MX51 image processing unit. The maximum current provided by this supply is 100mA.SWBT (+5V)The voltage level of the SWBT supply is +5V. The maximum current provided by this supply is 300mA.+1.8VThis supply is used in the module to power the external memory interface (EMI) and the JTAG interface. The maximum current provider by this supply is 800mA.Mode Description Typ Max UnitRTC All blocks disabled, no main battery attached, coin cell is attached.37uA
ConnectCorefori.MX51©2010DigiInternational,Inc. 32+3.15VThis supply is used in the module to power the NAND Flash interface and the SD-card 1 interface. The maximum current provided by this supply is 350mA.MC13892 Power Management The ConnectCore for i.MX51 module is designed with Freescale MC13892 Power Management chip. This chip provides reference and supply voltages for the i.MX51 as well as for the peripheral devices. The MC13892 has four buck switchers, one +5V boost switcher and twelve low dropout regulators as well as other user interfaces. The following figure shows the block diagram of the MC13892.MC13892BatteryManagement4BuckSwitchers12LDORegulatorsBacklightDrivers10BitADC Bias &References+5VBoostSwitcherLEDDriversTouch ScreenInterfacePowerControlLogic32.768KHz ControlInterfaceProcessor Logic Interfacing
ConnectCorefori.MX51©2010DigiInternational,Inc. 33Memory DDR2 SDRAM Memory The ConnectCore for i.MX51 module provides up to 512 MBytes of DDR2-400 SDRAM memory. The module can support up to four 16-bit, 128Mbit, DDR2-400 chips, configured as two banks of 32-bits of 128Mbits DDR2-400 memory.NAND Flash MemoryThe ConnectCore for i.MX51 module provides 512Mbytes of NAND-Flash memory. On the module a 512MByte, 2Kbyte page, NAND-Flash chip is used.Options for other densities NAND Flash devices are available depending on the module variant. Chip selects Chip Select Memory MapThe ConnectCore for i.MX51 has eight chip select signals, two for dynamic memory and six for static memory. The table below shows the memory map of these chip select signals.Name Pin Address range Sixe [Mb] Usage CommentsDRAM_CS0# Y4 0x9000_000-0x9FFF_FFFF256M DDR2 bank 0 First bank on moduleDRAM_CS1# Y3 0xA000_0000-0xAFFF_FFFF256M DDR2 bank 1 Second bank on moduleEIM_CS0 W6 0xB000_000-0xB7FF_FFFF128M External CS0#EIM_CS1 Y6 0xB800_000-0xBFFF_FFFF128M External CS1#EIM_CS2 Y7 0xC000_000-0xC7FF_FFFF128M External CS2#EIM_CS3 AC3 0xC800_000-0xCBFF_FFFF64M External CS3#EIM_CS4 AA6 0xCC00_000-0xCDFF_FFFF32M External CS4#EIM_CS5 AA5 0xCE00_000-0xCFFE_FFFF32M (minus 64K) External CS5# Used for Ethernet Controller on module
ConnectCorefori.MX51©2010DigiInternational,Inc. 34Multiplexed GPIOGPIO Multiplexing Table The ConnectCore for i.MX51 has four GPIO banks. Each bank provides 32 bidirectional general purpose input and output signals.The GPIO pins are multiplexed with other functions in the module. For each pin there are up to 8 muxing options (called ALT modes). By default all GPIO pins are configured to their respective GPIO signals. Since different modules require different pin settings (like pull up, keeper, etc) the i.MX51 has an IOMUX controller to configure the pin settings.The table below shows the ALT mode for each GPIO signal, the name of the Pad and the default use on the module. For a detailed description of all the muxing options for each pin, refer to the i.MX51 Hardware Reference Manual.GPIO Mode Pad On module default as GPIO1_0 ALT1 GPIO1_0 HDMI InterruptGPIO1_1 ALT1 GPIO1_1 User Button 2GPIO1_2 ALT0 GPIO1_2 I2C2_SCLGPIO1_3 ALT0 GPIO1_3 I2C2_SDAGPIO1_4 ALT0 GPIO1_4 Watchdog resetGPIO1_5 ALT0 GPIO1_5 MC13892 InterruptGPIO1_6 ALT0 GPIO1_6 Accelerometer Interrupt 2GPIO1_7 ALT0 GPIO1_7 Accelerometer Interrupt 1GPIO1_8 ALT0 GPIO1_8 USB Power enableGPIO1_9 ALT0 GPIO1_9 Ethernet 2 InterruptGPIO1_10 ALT7 DISP2_DAT11 Ethernet 1GPIO1_11 ALT2 USBH1_DATA0 USB Host GPIO1_12 ALT2 USBH1_DATA1 USB Host GPIO1_13 ALT2 USBH1_DATA2 USB Host GPIO1_14 ALT2 USBH1_DATA3 USB Host GPIO1_15 ALT2 USBH1_DATA4 USB Host GPIO1_16 ALT2 USBH1_DATA5 USB Host GPIO1_17 ALT2 USBH1_DATA6 USB Host GPIO1_18 ALT2 USBH1_DATA7 USB Host GPIO1_19 ALT5 DISP2_DAT6 Ethernet 1GPIO1_20 ALT3 UART2_RXD UART2_RXDGPIO1_21 ALT3 UART2_TXD UART2_TXD
ConnectCorefori.MX51©2010DigiInternational,Inc. 35GPIO1_22 ALT3 UART3_RXD UART3_RXDGPIO1_23 ALT3 UART3_TXD UART3_TXDGPIO1_24 ALT3 OWIRE_LINE S/PDIF OutputGPIO1_25 ALT2 USBH1_CLK USB Host GPIO1_26 ALT2 USBH1_DIR USB Host GPIO1_27 ALT2 USBH1_STP USB Host GPIO1_28 ALT2 USBH1_NXT USB Host GPIO1_29 ALT5 DISP2_DAT7 Ethernet 1GPIO1_30 ALT5 DISP2_DAT8 Ethernet 1GPIO1_31 ALT5 DISP2_DAT9 Ethernet 1GPIO2_0 ALT1 EIM_D16 EIM_D16GPIO2_1 ALT1 EIM_D17 EIM_D17GPIO2_2 ALT1 EIM_D18 EIM_D18GPIO2_3 ALT1 EIM_D19 EIM_D19GPIO2_4 ALT1 EIM_D20 EIM_D20GPIO2_5 ALT1 EIM_D21 EIM_D21GPIO2_6 ALT1 EIM_D22 EIM_D22GPIO2_7 ALT1 EIM_D23 EIM_D23GPIO2_8 ALT1 EIM_D24 EIM_D24GPIO2_9 ALT1 EIM_D27 EIM_D27GPIO2_10 ALT1 EIM_A16 GPIOGPIO2_11 ALT1 EIM_A17 GPIOGPIO2_12 ALT1 EIM_A18 GPIOGPIO2_13 ALT1 EIM_A19 GPIOGPIO2_14 ALT1 EIM_A20 GPIOGPIO2_15 ALT1 EIM_A21 GPIOGPIO2_16 ALT1 EIM_A22 GPIOGPIO2_17 ALT1 EIM_A23 GPIOGPIO2_18 ALT1 EIM_A24 GPIOGPIO2_19 ALT1 EIM_A25 GPIOGPIO2_20 ALT1 EIM_A26 GPIOGPIO2_21 ALT1 EIM_A27 XBEE_SLEEP_RQGPIO2_22 ALT1 EIM_EB2 EIM_EB2GPIO Mode Pad On module default as
ConnectCorefori.MX51©2010DigiInternational,Inc. 36GPIO2_23 ALT1 EIM_EB3 EIM_EB3GPIO2_24 ALT1 EIM_OE EIM_OEGPIO2_25 ALT1 EIM_CS0 EIM_CS0GPIO2_26 ALT1 EIM_CS1 GPIOGPIO2_27 ALT1 EIM_CS2 GPIOGPIO2_28 ALT1 EIM_CS3 GPIOGPIO2_29 ALT1 EIM_CS4 GPIOGPIO2_30 ALT1 EIM_CS5 Ethernet 2 Controller chip selectGPIO2_31 ALT1 EIM_DTACK GPIOGPIO3_0 ALT4 DI1_PIN11 LCD1 PWRENGPIO3_1 ALT4 DI1_PIN12 LCD2 PWRENALT1 EIM_LBA GPIOGPIO3_2 ALT4 DI1_PIN13 GPIOALT1 EIM_CRE GPIOGPIO3_3 ALT4 DI1_D0_CS LCD Touch Screen interruptALT3 NANDF_WE_B NANDF_WE_BGPIO3_4 ALT4 DI1_D1_CS LCD1_TCH_INT/TCH_EXT#ALT3 NANDF_RE_B NANDF_RE_BGPIO3_5 ALT4 DISPB2_SER_DIN GPIOALT3 NANDF_ALE NANDF_ALEGPIO3_6 ALT4 DISPB2_SER_DIO User Button 1 / GPIOALT3 NANDF_CLE NANDF_CLEGPIO3_7 ALT4 DISPB2_SER_CLK Camera 2 ResetALT3 NANDF_WP_B NANDF_WP_BGPIO3_8 ALT4 DISPB2_SER_RS USB Host Reset signalALT3 NANDF_RB0 NANDF_RB0GPIO3_9 ALT3 NANDF_RB1 GPIO / User LED2GPIO3_10 ALT3 NANDF_RB2 GPIO / User LED1GPIO3_11 ALT3 NANDF_RB3 GPIOGPIO3_12 ALT3 CSI1_D8 Not usedALT0 GPIO_NAND Card Detect input SD CardGPIO3_13 ALT3 CSI1_D9 Camera 1 ResetGPIO3_14 ALT3 CSI1_VSYNC CSI1_VSYNCGPIO Mode Pad On module default as
ConnectCorefori.MX51©2010DigiInternational,Inc. 37GPIO3_15 ALT3 CSI1_HSYNC CSI1_HSYNCGPIO3_16 ALT3 NANDF_CS0 NANDF_CS0GPIO3_17 ALT3 NANDF_CS1 SD Card write protectGPIO3_18 ALT3 NANDF_CS2 GPIOGPIO3_19 ALT3 NANDF_CS3 Not usedGPIO3_20 ALT3 NANDF_CS4 GPIO GPIO3_21 ALT3 NANDF_CS5 GPIO GPIO3_22 ALT3 NANDF_CS6 GPIO GPIO3_23 ALT3 NANDF_CS7 SD3_CLKGPIO3_24 ALT3 NANDF_RDY_INT SD3_CMD#GPIO3_25 ALT3 NANDF_D15 SD3_DATA7GPIO3_26 ALT3 NANDF_D14 SD3_DATA6GPIO3_27 ALT3 NANDF_D13 SD3_DATA5GPIO3_28 ALT3 NANDF_D12 SD3_DATA4GPIO3_29 ALT3 NANDF_D11 SD3_DATA3GPIO3_30 ALT3 NANDF_D10 SD3_DATA2GPIO3_31 ALT3 NANDF_D9 SD3_DATA1GPIO4_0 ALT3 NANDF_D8 SD3_DATA0GPIO4_1 ALT3 NANDF_D7 NANDF_D7GPIO4_2 ALT3 NANDF_D6 NANDF_D6GPIO4_3 ALT3 NANDF_D5 NANDF_D5GPIO4_4 ALT3 NANDF_D4 NANDF_D4GPIO4_5 ALT3 NANDF_D3 NANDF_D3GPIO4_6 ALT3 NANDF_D0 NANDF_D0GPIO4_7 ALT3 NANDF_D1 NANDF_D1GPIO4_8 ALT3 NANDF_D0 NANDF_D0GPIO4_9 ALT3 CSI2_D12 CSI2_D12GPIO4_10 ALT3 CSI2_D13 CSI2_D13GPIO4_11 ALT3 CSI2_D18 CSI2_D18GPIO4_12 ALT3 CSI2_D19 CSI2_D19GPIO4_13 ALT3 CSI2_VSYNC CSI2_VSYNCGPIO4_14 ALT3 CSI2_HSYNC CSI2_HSYNCGPIO4_15 ALT3 CSI2_PIXCLK CSI2_PIXCLKGPIO Mode Pad On module default as
ConnectCorefori.MX51©2010DigiInternational,Inc. 38GPIO4_16 ALT3 I2C1_CLK GPIOGPIO4_17 ALT3 I2C1_DAT GPIOGPIO4_18 ALT3 AUD3_BB_TXD AUD3_BB_TXDGPIO4_19 ALT3 AUD3_BB_RXD AUD3_BB_RXDGPIO4_20 ALT3 AUD3_BB_CK AUD3_BB_CKGPIO4_21 ALT3 AUD3_BB_FS AUD3_BB_FSGPIO4_22 ALT3 CSPI1_MOSI CSPI1_MOSIGPIO4_23 ALT3 CSPI1_MISO CSPI1_MISOGPIO4_24 ALT3 CSPI1_SS0 CSPI1_SS0 (MC13892 Chip select)GPIO4_25 ALT3 CSPI1_SS1 CSPI1_SS1GPIO4_26 ALT3 CSPI1_RDY LCD SPI chip selectGPIO4_27 ALT3 CSPI1_SCLK CSPI1_SCLKGPIO4_28 ALT3 UART1_RXD UART1_RXDGPIO4_29 ALT3 UART1_TXD UART1_TXDGPIO4_30 ALT3 UART1_RTS UART1_RTSGPIO4_31 ALT3 UART1_CTS UART1_CTSGPIO Mode Pad On module default as
ConnectCorefori.MX51©2010DigiInternational,Inc. 39Interfaces 1-WireThe ConnectCore for i.MX51 provides a 1-Wire communication interface. The module sends or receives one bit at a time. The required protocol for accessing the generic 1-Wire device is defined by Maxim.The main features of the 1-Wire interface are the following:Performs the 1-Wire bus protocol to communicate with an external 1-Wire deviceProvides a clock divider to generate a 1-Wire bus reference clockAccelerometer The module provides a three axis digital output accelerometer. This device is connected to the i.MX51 through the I2C bus. The I2C device address of the accelerometer is the following:The main features of the accelerometer device are the following:User assigned registers for offset calibrationProgrammable threshold interrupt outputLevel detection for motion recognition (shock, vibration, freefall)Pulse detection for single or double pulse recognitionSelectable sensitivity (±2g, ±4g, ±8g) for 8-bit modeADC and Touch ScreenThe module provides an eight channel 10-bit ADC. The ADC/Touch interface is integrated in the MC13892 power management device. This ADC can be used as a standard ADC or as a touch screen interface.The ADC runs at approximately 2MHz, and it has an auto calibration circuit which reduces the offset and gain errors.The main features of the ADC are the following:Resolution: 10-bitDifferential linearity error: 1 LSBIntegral linearity error: 3 LSBConversion time per channel: 10 usLow power consumption (1 mA of conversion current)Analog input range: 0 ~ 2.4VInterface I2C Address (7 bits)Accelerometer (MMA7455L) 0 x 1D
ConnectCorefori.MX51©2010DigiInternational,Inc. 40Five channels pre-assigned to battery interface measurementsInternal voltage scaling for pre-assigned measurementsNormal conversion mode and touch screen modeThe following table shows the ADC channel assignment in ADC and touch screen modes:Synchronous Serial Interface (SSI)The ConnectCore for i.MX51 module provides up to three synchronous serial interfaces (SSI) that allows communicating with a variety of serial devices as standard CODECs, audio CODECs implementing the I2S standard and Intel AC97 standard.SSI is typically used to transfer samples in a periodic manner. The SSI consists of independent transmitter and receiver sections with independent clock generation and frame synchronization.The main features of the SSI interface are the following:Independent (asynchronous) or shared (synchronous) transmit and receive sections operating in Master or Slave modeNormal mode operation using frame syncNetwork mode operation allowing multiple devices to share the port with as many as 32 time slotsTwo sets of four 15 x 32 bits Transmit and Receive FIFOs.Programmable data interface mode such like I2S, LSB, MSB alignedProgrammable word length 8, 10, 12, 16, 18, 20, 22 or 24 bitsProgram options for frame sync and clock generationProgrammable I2S modes (Master, Slave or Normal)AC97 supportChannel ADC Mode Touch Screen Mode0 Battery Voltage Touch_X11 Battery Current Touch_X22 Application voltage (VBP) -3 Charger Voltage Touch_Y14 Charger Current Touch_Y25 General Purpose ADIN5 -6 General Purpose ADIN6 Contact resistance7 General Purpose ADIN7 Contact resistance
ConnectCorefori.MX51©2010DigiInternational,Inc. 41External Memory Interface (EMI)The module provides access to the external memory controller. This memory controller handles the interface to devices external to the chip, including generation of chip selects, clock and control for external peripherals and memory. It provides asynchronous access to devices with SRAM-like interface and synchronous access to devices with NOR Flash like or PSRAM like interfaces.The following lines of the memory controller are available in the module connectors:Support for multiplexed address/data bus operations X16 and X32Programmable data port size of each Chip select (X8, X16 and X32)28-but address busUp to 5 Chip selectsRead and write control lines2 x byte enable signalsRegister/command selection line (CRE)Note: from Freescale: 8-bit memory devices are supported by EMI interfaces connecting to only one of the followign three locations:EIM_DA[7:0] padsEIM_DA[15:8] padsEIM_DA[31:24] padsConection to the EIM_D[23:16] pads is not supported.Ethernet 1The ConnectCore for i.MX51 provides a Fast Ethernet Controller (FEC) designed to support both 10 and 100 Mbps Ethernet/IEEE 802.3 networks. A low power consumption 10/100 Ethernet transceiver (LAN8710A) from SMSC is used on the module to complete the interface to the media.The module does not provide a transformer and Ethernet connector. The PHY address on the MII bus is 0x7 (0b00111).The module also provides two status signals for activity and link LEDs.Ethernet 2 The ConnectCore for i.MX51 module can provide a high-performance 10/100Mbit Ethernet controller (LAN9221) with integrated MAC and PHY from SMSC as a second Ethernet port.The main features of this Ethernet controller are the following:Embedded 16 Kbyte FIFO for packet buffers
ConnectCorefori.MX51©2010DigiInternational,Inc. 42Support burst-mode read for highest performance applicationsConfigurable interrupt pin with programmable hold-off timerCompatible with IEEE 802.3, 802.3u standardsIntegrate Fast Ethernet MAC/PHY transceiver in one chip10Mbps and 100Mbps data rateFull and half duplex operations10/100Mbps Auto-negotiation operationTwisted pair crossover detection and auto-correction (HP Auto-MDIX)IEEE 802.3x flow control for full-duplex operationWake-on-LAN capabilitiesLED pins for various network activity indicationsThe Ethernet controller is connected to CS5#. Its programmable polarity interrupt output is connected to the signal GPIO1_9.The module does not have a transformer and Ethernet connector.The module provides two status signals for activity and link LEDs. I2CThe module provides two I2C interfaces. The I2C interfaces operate up to 400Kbps, depending on pad loading and timing. The I2C system is a true multiple master bus including arbitration and collision detection.The I2C port 2 interface is available on the development board (header P22). Two 2K2 pull-up resistors are provided on the module.The I2C port 1 interface is available through the main module connectors (J1 and J2) as well as on the corresponding signal rail connectors (J25 and J26), multiplexed with other interface functionality. The development board does not provide a dedicated header for access to I2C port 1. The I2C port 1 signals are available through the main module connectors as outlined below:I2C1_SDA: – J1.141 - EIM_D16 (used on the module for external Ethernet controller, if present)– J2.111 - SPI1_MOSI (used on the module as communication channel for Freescale PMIC)– J2.86 - SD2_CLK (used on the module as communication channel for Wireless LAN  interface, if present)I2C1_SCL:– J1.144 - EIM_D19 (used on the module for external Ethernet controller, if present)– J2.115 - SPI1_SCLK (used on the module as communication channel with Freescale  PMIC)
ConnectCorefori.MX51©2010DigiInternational,Inc. 43– J2.88 - SD2_CMD (used on the module as communication channel for Wireless LAN  interface, if present)The I2C interface provides the following capabilities:Compatibility with I2C bus standardMultiple-master operationSoftware programmable for one of 64 different serial clock frequenciesSoftware selectable acknowledge bitStart and stop signal generation detectionRepeated START signal generationAcknowledge bit generation/detectionBus-busy detectionVideo Subsystem The i.MX51 processor has a video subsystem that includes the following modules:Video Processing Unit (VPU): a multi-standard video encoder/decoderImage Processing Unit (IPU): providing connectivity to displays, related processing, synchronization and controlTV encoder (TVE) bride: providing optional translation from the digital display interface supported by the IPU to SDTV analog and some HDTV interfacesVideo Processing Unit (VPU)The video processing unit of the i.MX51 is a high performance, multistandard video processing unit that can perform H.264 BP/MP/HP, VC-1 SP/MP/AP, MPEG4 SP/ASP, Divx, RV8/9, and MPEG2 MP decoding up to 1920 × 1088 resolution. It supports multiple video codecs simultaneously.The detailed features of the VPU are as follows:Multi-standard video codec– H.264/AVC decoder for baseline profile, main profile and high profile– VC-1 decoder for simple profile, main profile and advanced profile– MPEG-4 decoder for simple profile, advanced simple profile except GMC– H.263 decoder for baseline profile– Divx Home Theater decoder for profile (version 3.x, 4.x, 5.x, 6.x) and Xvid– MPEG-2 decoder for main profile @ high level– RV decoder for profile 8/9/10– H.264/AVC encoder for baseline profile– MPEG-4 encoder for simple profile
ConnectCorefori.MX51©2010DigiInternational,Inc. 44– H.263 encoder for baseline profile– MJPEG encoder for baseline profile– Multiple codec: supports up to 4 decoding/encoding processes simultaneously, each  process can have a different formatOther features– Supports rotating and mirroring simultaneously.– Built-in de-ringing filter– Built-in de-blocking filter for MPEG-2/MPEG-4/Divx– Simultaneous multi-stream and multi-standard processing capability– Robust error detection
ConnectCorefori.MX51©2010DigiInternational,Inc. 45Image Processing Unit (IPU)Connect relevant devices - cameras, displays, graphics accelerators, TV encoders and decodersRelated image processing and manipulation: sensor image signal processing, display processing, image conversions, etc.Synchronization and control capabilities (for example, to avoid tearing artifacts)The following figure shows the simplified block diagram of the IPU:Image Processing Unit (IPU)CSICameraSensorI/FSMFCCSICameraSensorI/F/VDIVideoDeInterlacerDIICDIIDMACImage DMAControllerDIDisplay I/F Image ConverterDisplay I/FDPDisplay processorDCDisplay ControlDMFCCMControlModuleIRTImage Rotator
ConnectCorefori.MX51©2010DigiInternational,Inc. 46The image processing unit has the following blocks:Camera Sensor Interface - CSI– Controls a camera port; provides interface to an image sensor or a related device. The ConnectCore for i.MX51 has two camera blocks.Display Interface - DI– Provides interface to displays, display controllers and related devices. The ConnectCore for i.MX51 has two camera blocks.Display Controller - DC– Controls the display portsDisplay Processor - DP– Performs the processing required for data sent to displayImage Converter - IC– Performs resizing, color conversion/correction, combining with graphics, and horizontal inversionVideo De Interlacer - VDI– Performs video de interlacing (interlaced -> progressive)Image Rotator - IRT– Performs rotation (90 or 180 degrees) and inversion (vertical/horizontal)Image DMA Controller - IDMAC– Controls the memory port; transfers data to/from system memorySensor Multi FIFO Controller - SMFC– Controls FIFOs for output from the CSIs to system memoryDisplay Multi FIFO Controller - DMFC– Controls FIFOs for IDMAC channels related to the display systemControl Module - CM– Provides control and synchronization
ConnectCorefori.MX51©2010DigiInternational,Inc. 47KeypadThe module provides a keypad port that can be used as a keypad matrix interface or as general purpose input/output.The Keypad port is designed to interface with the keypad matrix with 2-point contact or 3-point contact keys. The Keypad port is designed to simplify the software task of scanning a keypad matrix. With appropriate software support, the Keypad port is capable of detecting, debouncing, and decoding one or multiple keys pressed simultaneously on the keypad.Supports up to an 6 × 4 external keypad matrixPort pins can be used as general purpose I/OOpen drain designGlitch suppression circuit designMultiple-key detectionLong key-press detectionStandby key-press detectionSynchronizer chain clearSupports a 2-point and 3-point contact key matrixMemory Cards The ConnectCore for i.MX51 module provides up to four MMC/SD/SDIO interfaces. MultiMediaCard (MMC)This is a universal low-cost data storage and communication media that is designed to cover a wide area of applications including mobile video and gaming, WLAN or other wireless networks. Old MMC cards are based on 7-pin serial bus with a single data pin, while the newer high-speed MMC communication is based on an advanced 11-pin serial bus designed to operate at lower voltage.Secure Digital (SD) cardThis is an evolution of earlier MMC technology. It is specifically designed to meet the security, capacity, performance, and environment requirements inherent in newly emerg-ing audio and video consumer electronic devices. The physical form factor, pin assign-ment and data transfer protocol are forward compatible with MMC, with some additions. Under the SD protocol, an SD card can be categorized as memory card, I/O card, or combo card (having both memory and I/O functions).The main features of the Memory Card interfaces are the following:Designed to work with MMC, MMC plus, MMC RS, SD memory, miniSD memory, SDIO, and SD Combo. Compatible with the following specifications:– MMC System Specification Version 4.2– SD Host Controller Standard Specification Version 2.0
ConnectCorefori.MX51©2010DigiInternational,Inc. 48– SD Memory Card Specification Version 2.0: supports High-Capacity SD Memory Cards– SDIO Card Specification Version 2.0Supports 1, 4, or 8 bit MMC modes and 1bit or 4 bit SD and SDIO modes– Card bus clock frequency up to 52 MHz– Up to 416 Mbps of data transfer for MMC cards in 8-bit mode– Up to 200 Mbps of data transfer for SD/SDIO cards in 4-bit mode– Allows cards to interrupt the host in 1-bit and 4-bit SDIO modes, also supports interrupt periodThe following table shows the memory card signals available in the module connectors:PWMThe ConnectCore for i.MX51 module provides two PWM interfaces. These PWM interfaces share the output pad in the i.MX51 CPU with the I2C bus used on the module for the accelerometer. In order to use the PWM signals the I2C bus must be disabled.The main features of the PWM interface are the following:16-bit up-counter with clock source selection4× 16 FIFO to minimize interrupt overhead12-bit prescaler for division of clockSound and melody generationActive high or active low configured outputCan be programmed to be active in low power and debug modesInterrupts at compare and rolloverSignal Memory Card 1 Memory Card 2 Memory Card 3 Memory Card 4Card Detect (CD #) √√CLK √√√ √CMD √√√LCTL √WP# √√DATA3 - DATA0 √√√ √DATA7 - DATA4 √√√
ConnectCorefori.MX51©2010DigiInternational,Inc. 49RTCThe ConnectCore for i.MX51 provides a Real Time Clock and a Secure Real Time clock.The real time clock function is provided including time and day counters as well as an alarm function. The RTC utilizes the 32.768KHz crystal oscillator for the time base and is powered by the coin cell backup supply when main supply has dropped below operational range. In configurations where the SRTC is used, the RTC can be disabled to conserve current drain. The accuracy of the 32.768KHz crystal used for the Real-Time Clock is ±20ppm.RTC accuracy ±20ppm17-bit time of day counter15-bit day counterTime of day alarmDay alarmThe secure real time clock helps to comply with issues arising out of different applications requiring secure and certifiable time, for example Digital Rights Management (DRM) schemes.The main features of the secure RTC interface are the following:Secure 47-bit time counterNon-secure 47-bit time counterUse-mode protection. The SRTC cannot be configured by non-secured SW.Re-programming protection. The SRTC cannot be altered or disabled after SRTC locked.Clock source protectionProgrammable secure and non-secure alarms with interruptSPDIFThe ConnectCore for i.MX51 has a Sony/Philips Digital Interface Transmitter (SPDIF Tx) audio module that allows the processor to transmit digital audio over it.For the SPDIF transmitter, the audio data is provided by the processor. Zero is always inserted in the user data. The SPDIF transmitter generates a SPDIF output bitstream in the biphase mark format (IEC958), which consists of audio data, channel status, and user data. In the SPDIF transmitter, the IEC958 biphase bit stream is generated on both edges of the SPDIF transmit clock.IEC 60958 format SPIDF output7 transmit clock sourceConsumer channel status supportSupport for interrupt and DMA
ConnectCorefori.MX51©2010DigiInternational,Inc. 50SPIThe module provides up to three SPI interfaces that can be configured in either master or slave mode. Two of the SPI interfaces contain one 64 x 32 receive buffer (RXFIFO) and one 64 x 32 transmit buffer (TXFIFO). The other SPI interface contains one 8 x 32 receive buffer and one 8 x 32 transmit buffer.Full-duplex synchronous serial interfaceMaster/Slave configurableTwo SPI interfaces support SPI clocks up to 66MHz in both Master and Slave modeOne SPI interface supports SPI clocks up to 16.5MHz in both Master and Slave modeUp to four chip selects (two chip select for SPI1) to support multiple peripheralsTransfer continuation function allows unlimited length data transfersPolarity and phase of the chip select (SS#) and SPI Clock (SCLK) are configurableData ready output signal for fast data communication with fewer software interruptsDMA supportWatchdog Timer The watchdog timer module protects against system failures by providing a method of escaping from unexpected events or programming errors. Once the watchdog module is activated, it must be serviced by the software on a periodic basis. If servicing does not take place, the timer times out. Upon a time-out, the watchdog timer module asserts the internal system reset signal.A time-out counter with time-out periods from 0.5 to 128 secondsTime resolution of 0.5 secondsConfigurable time-out counter that can be programmed to run or stop during low-power and debug modesProgrammable interrupt generation prior to time-outProgrammable time duration between interrupt and timeout events, from 0 to 128 seconds in steps of 0.5 secondsPower down counter enabled out of any reset by default
ConnectCorefori.MX51©2010DigiInternational,Inc. 51UARTThe module provides up to three UART ports. The UART 1 is a full-modem UART port with all the handshake signals available. The UART 2 and UART 3 ports are 4-wire UART ports with data lines RXD/TXD and the handshake lines RTS#/CTS#. The main features of these UART ports are the following:7 or 8 data bits1 or 2 stop bitsProgrammable parity (even, odd, and no parity)Hardware flow control support for RTS# and CTS# signals (signals direction according to DEC mode)Interrupt-based or DMA-based modeSerial IR interface low-speed, IrDA-compatible (up to 115.2 Kbps)Auto baud rate detection (up to 115.2 Kbps)Programmable baud rate (up to 4Mbps)Two independent 32-byte FIFOs for receive and transmitUSB Host and USB OTGThe ConnectCore for i.MX51 provides three USB Host interfaces and one USB On-The-Go (OTG) interface. These interfaces conform to the USB 2.0 specification, the OTG supplement, and the ULPI specification. In addition to the normal USB functionality, the module also supports direct connections to on-board USB peripherals using serial or ULPI protocol. It also has serial/ULPI bypass mode connection and support for multiple interface types of ULPI and serial transceivers.Main features of the USB Host interfaces:High-speed/full-speed/low-speed hostHS/FS ULPI compliant interfaceSoftware configurable for full-speed/low-speed interface for serial transceiversFull-speed transceiverless link logic (FS-TLL) for on board connection to a FS/LS USB peripheralHigh-speed ULPI transceiverless link logic (HS-TLL) for onboard connection to a high- speed ULPI interface USB peripheralMain features of the USB OTG interface:High-speed OTGHS/FS ULPI compliant interfaceSoftware configurable for ULPI or serial transceiver interface
ConnectCorefori.MX51©2010DigiInternational,Inc. 52High-speed (with ULPI transceiver), full-speed, and low-speed operation in host modeHigh-speed (with ULPI transceiver), and full-speed operation in peripheral modeHardware support for OTG signaling, session request protocol, and host negotiation protocolUp to 8 bidirectional endpointsWLAN WLAN In addition to the on-module Ethernet interface, the ConnectCore for i.MX51 module can also provide an optional 802.11a/b/g/n WLAN interface with data rates up to 54 Mbps on the a/b/g band and up to 65 Mbps on the n band. Two U.FL antenna connectors are provided on the module.On the ConnectCore Wi-i.MX51 module variant, attach the antennas with the U.FL-RP-SMA female cable to the primary connector and secondary connector on the module.Note: When disconnecting U.FL connectors, the use of a U.FL plug extraction tool (Hirose P/N U.FL-LP-N-2 or U.FL-LP(V)-N-2) is strongly recommended to avoid damage to the U.FL connectors on the module.To mate U.FL connectors, the mating axes of both connectors must be aligned. The "click" will confirm mated connection. Do not attempt insertion at an extreme angle.PrimarySecondarySecondary
ConnectCorefori.MX51©2010DigiInternational,Inc. 53Cable Specification: U.FL/W.FL to RP-SMAAttributes Dimensions Note: Dimensions are provided for reference purposes only. The actual antenna might vary.1 = U.FL2 = RP-SMANote: This module obtained its complete certification by using the cable described here. End users in North America should use a cable that matches these specs to maintain the module’s certification.Attribute PropertyImpedance 50 OhmFrequency Range 0 to 6 GHzLength 150 mmTemperature Range -40° to +90° CLoss 3.8dB/m (3 GHz)5.6dB/m (6 GHz)
©2010DigiInternational,Inc. 54About the Development BoardCHAPTER 2The development board supports the ConnectCore for i.MX51 module. This chapter describes the interfaces of the development board and explains how to configure the board for your requirements. The development board has two 180-pin connectors that mate with the module connectors.What’s on the Development Board?Flexible 9-30VDC charger power supply with power-on switchScrew-flange Battery header with enable jumper3V coin cell batteryConnectors for Digi 802.3af PoE Application board (sold separately)1 x UART RS232 with status LEDs and SUB-D 9-pin connector1 x UART MEI (RS232/RS4xx) with status LEDs and SUB-D 9-pin connector1 x UART with TTL levels1 x USB OTG connector4 x USB Host connectors1 x SD/MMC card holder1 x MicroSD card holderSPI and I2C headersAudio interface with Line-out, Line-In and Mic-In jacksVGA interfaceHDMI interface2 x LCD connectors with Touch Screen interface2 x Camera connectorsRJ-45 Ethernet connectorConnector for a Digi 100M_ETHADPT (sold separately)
ConnectCorefori.MX51©2010DigiInternational,Inc. 552 x RP-SMA WLAN antenna connectorsScrew-flange connector for GPIOXBee interface (XBee module sold separately)Peripheral application headerModule Expansion connectorsJTAG interface2 x User LEDs (green)2 x User Push-buttons1 x Power down Push-button1 x Reset Push-button
ConnectCorefori.MX51©2010DigiInternational,Inc. 56The Development Board
ConnectCorefori.MX51©2010DigiInternational,Inc. 57Switches and Push-buttons Power Switch, S2The development board has an ON/OFF switch, S2. The power switch S2 can switch both 9V-30VDC input power supply and 12VDC coming out of the optional PoE module. However, if a power plug is connected to the DC power jack, the PoE is disabled.Power Switch, S2 UART 2 Switch, S7 UART 1 Switch, S6 Power Button, S11 Reset Button, S4 User Button 1, S3User Button 2, S5Ident Button 1, S10Boot CongurationButtons S8, S9
ConnectCorefori.MX51©2010DigiInternational,Inc. 58Reset Button, S4The reset push-button S4, resets the module and the peripherals on the development board. A push-button allows manual reset by connecting POR# or optionally RSTIN# to ground.Power Button, S11The power button S11, generates a Turn On/Turn Off interrupt to the MC13892 power management device on the module.The Turn Off event does not directly power off the module.The module is powered off by the processor's response to this interrupt. The software can configure a user initiated power down, or a transition to a low power off mode by pressing this power button.When in Off mode or in low power mode, the module can be powered via the Turn On event generated by pressing the Power button.User Buttons, S3 and S5Use the user push-buttons to interact with the applications running on the ConnectCore for i.MX51 module. Use these module signals to implement the push-buttons:GPIO3_6 is used in User Button S3 and also in the Digital I/O connector for Digital I/O7.Ident Button, S10The Ident push-button S10 is associated to the commissioning input of the Digi XBee modules. This input provides a variety of simple functions to aid in deploying devices in a network. For a deeply description of this functionality please refer to the Digi XBee modules documentation.Legend for Multi-Position SwitchesSwitches S6, S7, S8 and S9 are multi-pin switches. In the description tables for these switches, the position is designated as S[switch number].[pin number]. For example, position 1 on switch S6 is specified as S6.1.Signal Name Button GPIO UsedDISPB2_SER_DIO/GPIO3_6/USER_KEY1 S3 GPIO3_8GPIO1_1/SD1_WP#/SPI_MISO/USER_KEY2 S5 GPIO1_1
ConnectCorefori.MX51©2010DigiInternational,Inc. 59UART 1 Switch, S6Use S6 to configure the line interface for serial port 1 MEI:UART 2 Switch, S7Use S7 to configure the line interface for serial port 2 (console):Switch Pin Function Comments S6.1 On = RS232 transceiver enabled RS4xx transceiver disabledOff = RS232 transceiver disabled RS4xx transceiver enabled S6.2 On = Auto Power Down enabledOff = Auto Power Down disabledAuto Power Down is not supported on this board. This signal is only accessible to permit the user to completely disable the MEI interface for using the signals for other purposes. To disable the MEI interface, go into RS232 mode (S6.1 = ON) and activate the Auto Power Down feature (S1.2 = ON) - be sure that no cable is connected to connector X30.S6.3 On = 2-wire interface (RS4xx)Off = 4-wire interface (RS422)S6.4 On = Termination ONOff = No terminationSwitch Pin Function Comments S7.1 On = Power saveOff = Normal OperationIf there is a valid RS232 signal at receiver inputs the UART will be in normal operation mode.If there is not a valid RS232 signal at receiver inputs the UART will be in shutdown mode. S7.2 On = ShutdownOff = Normal OperationShutdown is the highest priority functionality. If switch S7.2 = ON, the UART 2 will be in shutdown mode independently of the position of S7.1.
ConnectCorefori.MX51©2010DigiInternational,Inc. 60Boot Configuration Switches, S8 and S9Use S8 to configure the source of the boot code when S9 is configures in internal boot, or to configure the source of the serial download when S9 is configured in serial downloader.Use S9 to configure the module boot mode:For a detailed description of the ConnectCore for i.Mx51 boot mode functionality please refer to the Freescale i.MX51 Processor Hardware Reference Manual.Switch Pin Function Comments S8.1 On = Boot from expansion deviceOff = Boot from NAND FlashApplies only if switch S9 is configured in internal boot modeS8.2 On = Boot from SD/MMCOff = Boot from microSD TMApplies only if switch S9 is configured in internal boot mode and S8.1 is configured to boot from expansion deviceS8.3 / S8.4 On / On = UART1 (MEI) If S9 is configured in serial boot loaderS8.3 / S8.4 On / Off = UART2 (Console) If S9 is configured in serial boot loaderS8.3 / S8.4 Off / On = UART3 (TTL) If S9 is configured in serial boot loaderS8.3 / S8.4 Off / Off = Reserved If S9 is configured in serial boot loaderSwitch Pin Function Comments S9.1 / S9.2 Off / Off Internal Boot configured by switch S8S9.1 / S9.2 Off / On ReservedS9.1 / S9.2 On / Off Internal Boot configured by fuse blockS9.1 / S9.2 On / On Serial downloader
ConnectCorefori.MX51©2010DigiInternational,Inc. 61Jumpers Battery Enable, J5When J5 is set, the development board can be powered by an external battery connected to J23.BatteryEnable, J5 LED 1, J16UART/XBee,J30 & J31WLAN Disable, J17ModulePowerSource, P29Button 1, J28 LED 2, J9Button 2, J29 Touch Sel, J20Coin cell Enable, J3JTAG Mod, J4
ConnectCorefori.MX51©2010DigiInternational,Inc. 62Module Power Source, P29When set on positions 1-2, the 3.3V supply of the development board is generated on the +3.3V power regulator (U50).When set on positions 2-3, the +3.3V supply of the development board is generated on the module.LED 1, J16When set, enables the User LED 1 (LE51) to show the status of this signal (on if low).LED 2, J9When set, enables the User LED 2 (LE49) to show the status of this signal (on if low).Button 1, J28When set, enables the User Button 1 (S3).Button 2, J29When set, enables the User Button 2 (S5).UART3 / XBee Selection, J30 and J31The UART 3 port is shared on the development board between the XBee module socket and the UART 3 connector (X19). When J30 and J31 are set to positions 1-2, the UART 3 on the connector (X19) can be used.When J30 and J31 are set to positions 2-3, the XBee module socket can be used.WLAN Disable, J17When set, this jumper disables the WLAN interface on the module. Touch Selection, J20When set, an external SPI touch screen controller is configured for the LCD 1 interface and the internal analog touch screen controller (on module) is configured for the LCD 2 interface. When removed, an internal touch screen controller is configured for the LCD 2 interface, and the internal analog touch screen controller (on module) is configured for the LCD 1 interface.
ConnectCorefori.MX51©2010DigiInternational,Inc. 63Coincell Enable, J3When set, this jumper supplies the real time clock with +3V from the lithium coin cell battery, even if the board is switched off.JTAG Mod., J4When set, this jumper disables the JTAG interface for the ConnectCore for i.MX51.When removed, the JTAG interface is enabled.
ConnectCorefori.MX51©2010DigiInternational,Inc. 64LEDsWLAN, LE12LED indicating WLAN operational status.Batt, LE4 WLAN, LE12UART 2StatusLEDsUSER LED1, LE51Assoc.,LED50USER LED2, LE49+3.3V_JS,LE79V-30V,LE3 +5V_JS,LE6UART 1StatusLEDs
ConnectCorefori.MX51©2010DigiInternational,Inc. 65WLAN, LE12LED indicating WLAN operational status.Power LEDs, LE3, LE4, LE6 and LE7All power LEDs are red. The power supplies must be present:LE3 ON indicates that +9VDC / +30VDC power is presentLE4 ON indicates that battery power is presentLE6 ON indicates that +5VDC powerfor the development board is presentLE7 ON indicates that +3.3VDC power for the development board is presentUser LEDs, LE49 and LE51The user LEDs are controlled through applications running on the ConnectCore for i.MX51 module. You may use these module signals to implement the LEDs:Serial Status LEDsThe development board has two sets of serial port LEDs - four for serial port 1 and four for serial port 2. The LEDs are connected to the TTL side of the RS232 or RS4xx transceivers.Green means corresponding signal highRed means corresponding signal lowThe intensity and color of the LED will change when the voltage is switchingSignal Name Button GPIO UsedNANDF_RB2/MII_COL/SP12_SCLK/GPIO3_10 LE51 GPIO3_10NANDF_RB1/PATA_IORDY/SPI2_RDY/GPIO3_9 LE49 GPIO3_9
ConnectCorefori.MX51©2010DigiInternational,Inc. 66UART 1 Status LEDsUART 2 Status LEDsXBee Assoc., LE50This LED is connected to the Associate output of the Digi XBee module. This LED provides information of the device's network status and diagnostics information. For a more in-depth description of this LED please refer to the Digi XBee modules documentation available at www.digi.com.LED Reference FunctionRED GREENLE60 LE45 TXDLE61 LE46 RXD#LE62 LE47 RTS#LE63 LE48 CTS#LED Reference FunctionRED GREENLE41 LE40 TXDLE57 LE42 RXDLE58 LE43 RTS#LE59 LE44 CTS#
ConnectCorefori.MX51©2010DigiInternational,Inc. 67Audio Interface The development board provides an audio interface with a line input channel, a line-output channel and a microphone input. A Wolfson WM8753L audio CODEC is used in the development board. This audio CODEC is controlled through the I2C port 2 of the ConnectCore for i.MX51. Digital audio data is sent/received between the audio CODEC and the ConnectCore for i.MX51 through an I2S interface (AUD3 channel of the i.MX51 AUDMUX).Line-OutConnector,J18 Line-InConnector,J12 Micorphone Connector,J15
ConnectCorefori.MX51©2010DigiInternational,Inc. 68The I2C device address of the audio CODEC is the following:Three stereo audio jacks are provided on the development board:J18 connector for LINE+OUTJ12 connector for LINE+NJ15 connector for microphoneLine-out Connector Pinout, J18Line-in Connector Pinout, J12Microphone Connector Pinou, J15tInterface I2C Address (7 bits)Audio CODEC (WM8753L) 0 x 1APin Signal1GND2LINE-OUT-RIGHT3LINE-OUT-LEFT4HEADPHONE-DETECT5 -Pin Signal1GND2LINE-IN-RIGHT3LINE-IN-LEFT4GND5GNDPin Signal1GND2MIC-IN3MICBIAS4GND5GND
ConnectCorefori.MX51©2010DigiInternational,Inc. 69Coin Cell BatteryThe development board provides a coin cell battery to back up the module’s integrated RTC while main power is disconnected. Jumper J3 controls if the coin cell battery power is available.Battery Holder BatteryVertical Coin-Cell Holder for CR2032 Battery Lithium coin cell, CR2032, 200mAhKeystone 1065 Renata CR2032NEttinger 15.61.602 Panasonic CR2032NCoin Cell Battery Holder, H1
ConnectCorefori.MX51©2010DigiInternational,Inc. 70Camera Interfaces The development board provides two camera interfaces connected to the camera sensor interfaces of the ConnectCore for 1.MX51 CPU. The I2C bus of the ConnectCore for i.MX51CPU is used to configure and control the two cameras. The I2C device addresses of the Digi camera application kits (CC-ACC0MT9V111) are the following:Interface I2C Address (7 bits)Camera 1 0 x 5CCamera 2 0 x 48Camera 2 Connector, X17Camera 1 Connector, X15

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