1978_RCA_Linear_Integrated_Circuits 1978 RCA Linear Integrated Circuits

User Manual: 1978_RCA_Linear_Integrated_Circuits
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SSD·24·0A

Linear
Integrated
Circuits

RCA
Linear Integrated Circuits
This DATABOOK contains complete
technical information on the full line
of RCA standard commercial linear integrated circuits and MOS field-effect
transistors for both industrial and consumer applications. An Index to
Devices provides a complete listing of
types, together with an indication of
package options available for each of
them.
The pages immediately following the
Index to Devices include photographs
of the packages used for RCA linear
integrated circuits and MOS/FET's, a
product-classification chart, recommended operating and handling considerations, a list of special terms and
symbols used in the characterization of
RCA linear integrated circuits and
MOS/FET's, and a cross-reference
directory that indicates RCA types
recommended as direct replacements
for other manufacturers' types.
Three separate data sections provide
definitive ratings and electrical
characteristics for (1) Linear Integrated
Circuits for Industrial Applications,
(2) Linear Integrated Circuits for
Consumer Applications, ~d (3) MOS
Field-Effect Transistors (MOSI
FET's). Data pages for individUal
devices are included as nearly as possible in alpha-numerical sequence of
type numbers. Because some devices
are grouped together to show similarity
of function or data, individual type
numbers may be out of sequence. If
you don't find the data on a specific
type where you expect it to be, check
the Index to Devices.
The DATABOOK also includes dimensional outlines for all currently
available packages and selected RCA
Application Notes on RCA Linear Integrated Circuits and MOS/FET's.

Table of Contents

Index to Devices ...................................................
Packages.........................................................
Product Qassification Chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Handling Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Terms and Symbols ................................................
Cross-Reference Directory. . . . . . . . . . . . . . .. . . .. . . . . . .. . . . . . . . . . .. . . . . .
Linear Integrated Circuits for Industrial Applications-Technical Data. . . . .
Linear Integrated Circuits for Consumer Applications-Technical Data ....
MOS Field-Effect Transistors-Technical Data. . . . . . . . . . . . . . . . . . . . . . . ..
Dimensional Outlines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Application Notes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
RCA Sales Offices, Manufacturers' Representatives, and
Authorized Distributors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

ROI"

SOlidi
• • State

Page
3
5
7
8
10
12
17
291
433
475
483

559

Brussels' Buenos Aires' Hamburg' Madrid' Mexico City' Milan
Montreal' Paris' Sao Paulo' Somerville NJ • Stockholm
Sunbury·on·Thames • Taipei' Tehran' Tokyo

Index to Devices Type
Number

Packaga
Suffix

-

CA101
CA101A
CA107
CA111
CA124
CA139
CA139A
CA158
CA158A
CA201

T
T
T
T

S
S
S
S

E
E
E

G
G
G

T
T
T

S
S
S

-

CA201A
:A207
CA211
CA224
CA239
CA239A
CA258
CA258A
CA270
CA301A

T
T
T

S
S
S

G
G
G

E
E
E

G
G
G

T
T
W
T

S
S

CA307
CA311
CA324
CA339
CA339A
CA358
CA358A
CA555
CA555C
CA723
CA723C
CA741
CA741C
CA747
CA747C
CA748
CA748C
CA758
CA810
CA810A

______

G
G

-

-

E'
E'

G
G
GH
GH

G
G

E
E
E

G
G
G

H
H

T
T
T
T
T

S
S
S
S
E
E
S
S
E
E
S
S

E

a

E
E
E'
E'
E
T
0
T
(j)
(j)

E
G

•••

-

OM
OM

-

-

S

H

S
M
M

a

-

H
H
H
H
H

••
• -

~

-

-

T
T

E

-

-

E'

a
a

CA2002
CA2004
CA2111A
CA2904
CA3000
CA3001
CA3002
CA3004
CA3005
CA3006

-

S
S
S

T
T
T
T
T
T
T

CA920
CA1190
CA1310
CA1352
CA1391
CA1394
CA1398
CA1458
CA1541
CA1558

-

G
G
G

-

G
G

E'
E'

-

G

H
G
G

-

-

-

-

-

-

-

-

H

H

-

-

GH

-

H

-

-

--

-

-

-

-

-

-

-

H

-

-

G
G

L
H

GH

GH

-

E'
E'
G
G

E'
E'

-

-

--

E'
-

E'

-

-

-

H
G
G

-

-

G

-

G

-

-

-

H
H

-

-

-

-

-

GH

-

-

-

GH

-

-

-

-

Data
Bullelln
File No.

Page

786
786
785
797
796
795
795
1019
1019
786

18
18
22
25
29
32
32
35
35
18

CA3007
CA3008
CA3008A
CA3010
CA3010A
CA3011
CA3012
CA3013
CA3014
CA3015

786
785
797
796
795
795
1019
1019
879E
786
785
797
796
795
795
1019
1019
834
834
788

18
22
25
29
32
32
35
35
292
18

CA3015A
CA3016
CA3016A
CA3018
CA3018A
CA3019
CA3020
CA3020A
CA3021
CA3022

22
25
29
32
32
35
35
42
42
46

CA3023
CA3026
CA3028A
CA3028B
CA3029
CA3029A
CA3030
CA3030A
CA3035
CA3036

788
531
531
531
531
531
531
760
1154
1154

46
50
50
50
50
50
50
295
298
298

CA3037
CA3037A
CA3038
CA3038A
CA3039
CA3040
CA3041
CA3042
CA3043
CA3044

1132
1155
761
961
981
981
686
531
536
531

301
303
306
309
310
310
312
50
54
50

CA3045
CA3046
CA3048
CA3049
CA3050
CA3051
CA3052
CA3053
CA3054
CA3058

1156
1105
612
1019
121
122
123
124
125
125

314
317
57
35
59
61
64
66
69
69

CA3059
CA3060
CA3060A
CA3060B
CA3064
CA3065
CA3066
CA3067
CA3068
CA3070

Typa
Number

...•
...

-

Package
Suffix

--

-

•• ••• -H
•• L H
...• - -- -... - - L

-

H
H

-

H
H

S
S

VI
t
t
t

--

L
,•• --

,
••
t
t

•

T

t

•
•
••
t
•0
0
0

E
,,,
,

•

-

H
VI
F

L
-

-

S
L

-

H

E

-

-

-

H

-

-

-

--- --- --

L
-

-

-

-

H

-

-

-

H
-

L

-

H

-

H
-

H
-

~

-

H

-

-

-

-

-

-

Linear Ie's

-

--

--

-

-

-

-

-

-

-- -H
-

-

-

-

-

-

-

-

-

-

--

-

---

-

-

-

-

-

Data
Bullelln
Fila No.

Paoa

126
316
310
316
310
128
128
129
129
316

72
74
78
74
78
82
82
84
84
74

310
316
310
338
338
236
339
339
243
243

78
74
78
87
87
90
92
92
96
96

243
338
382
382
316
310
316
310
I 274
I 275

96
99
103
103
74
78
74
78
319
108

316
310
316
310
343
363
318
319
331
340

74
78
74
78
109
111
320
323
326
328

341
341
377
611
361
361
387
382
388
490

114
114
117
120
124
124
331
103
99
127

490
537
537
537
396
412
466
466
467
468

127
132
132
132
335
337
340
340
343
345

___________________________________________________________ 3

~

!

Index to Devices Type
Number
3N128
3N138
3N139
3N140
3N141
3N142
3N143
3N152

Package
10·72
10·72
10·72
10·72
10·72
10·72
10·72
10·72

Data
Bulletin
File No.
309
283
284
285
285
286
309
314

Page
434
436
437
438
438
441
434
442

Type
Number
3N212
3N213
40467A
40468A
40559A
40600
40601
40602

3N153
3N154
3N159
3N187
3N200
3N204
3N205
3N206
3N211

10·72
10·72
10·72
10·72
10·72
10·72
10·72
10·72
10·72

320
335
336
326
436
959
959
959
875

443
444
459
446
450
453
453
453
458

40603
40604
40673
40819
40820
40821
40822
40823
40841

MOS/FET's

Package
10·72
10·72
10·72
10·72
10-72
10-72
10-72
10-72

Data
BulieUn
File No.
875
875
324
323
323
333
333
333

Page
458
458
462
463
463
464
464
464

10-72
10-72
10-72
10-72
10-72
10-72
10-72
10-72
10-72

334
334
381
463
464
464
465
465
489

465
465
466
467
468
468
470
470
471

Packages

D Suffix
Dual·ln·Line Welded-Seal
Ceramic Package

E Suffix
Dual·ln·Line Plastic Package

E Suffix
Power Stud Plastic
Dual·ln·Line Package

H1828

14 and 16·lead versions

8, 14, and 16·lead versions

CA3134E only

EM Suffix
Modified 16·lead Dual·
In·Line Plastic Package

EM Suffix
Modified 16·lead Dual·
In-Line Plastic Package

F Suffix
Dual-ln·Line Fril·Seal
Ceramic Package

H1827

CA3134EM only

CA3131EM, CA3132EM only

14 and 16·lead versions

5

Product Classification Chart
Induatrlal Clrculta
OPERATIONAL AMPLIFIERS
General Purpose
Single Unit
CA101
CA107
CA201
CA207
CA301
CA307
CA741
CA748
CA6741·

Dual Unit
CA158
CA258
CA358
CA747
CA1458
CA1558
CA2904
Quad Unit
CA124
CA224
CA324
CA3401

VOLTAGE
IZERO-VOL TAGE
REGULATORS
SWITCHES
CA723
CA3085

CA3058
CA3059
CA3079

General Purpose
Wideband
Single Unit
CA3008
CA301 0
CA3015
CA3016
CA3029
CA3030
CA3037
CA3038
CA31 00*
CA3130*
CA3140·
CA3160*
Dual Unit
CA324O*

Amplifier/
Diode

Variable
High Current
CA3094
Micropowar
CA3060
CA3078
CA3080
CA6078·

VOLTAGE
COMPARATORS
Single Unit
CA111
CA211
CA311
CA3098+
CA3099+
Duel Unit
CA3290*
Quad Unit
CAI39
CA239
CA339

ARRAYS

DIFFERENTIAL
AMPLIFIERS

CA3000
CA3001
CA3004
CA3005
CA3006
CA3007
CA3026
CA3028
CA3049
CA3050
CA3051
CA3053
CA3054
CA3102

Amplifier
CA3026
CA3035
CA3048
CA3049
CA3052
CA3054
CA3060
CA3102
Diode
CA3019
CA3039
CA3141

SPECIAL-FUNCTION
CIRCUITS
A/D Converter
CA3162
BCD-to-7-Segment Decoder/Driver
CA3161
Memory Sense Amplifier
CA1541
Four-Ouadrant Multiplier
CA3091
Timer
CA555
Programmable Schmitt Trigger
CA3098

Transistor
CA3018
CA3036
CA3045
CA3046
CA3050
CA3051
CA3081
CA3082
CA3083
CA3084
CA3086
CA3093

CA3095
CA3096
CA3097
CA3118
CA3127
CA3138
CA3146
CA3183
CA3600·
CA3724
CA3725

MOS/FET's
Single Gate
3N128
3NI38
3N139
3N142
3N143
3N152
3N153
3N154

Dual Gate
3N140
3N141
3N159
Dual Gate
Protected
3N187
3N200
40819

Con au mer Clrculta
BROADBAND
AM/FM
(VIDEO)
COMMUNICATIONS
AMPLIFIERS
CIRCUITS
CA3002
CA1352
CA3020
CA3021
CA3022
CA3023
CA3040

MULTIPLEX
DECODERS
CA758
C1310
CA3090A

CA2111A
CA3011
CA3012
CA3013
CA3014
CA3043
CA3075
CA3076
CA3088
CA3089
CA3123
CA3163
CA3189

• Low-noise versions of CA741 and CA3078

AUDIO
CIRCUITS
Preamplifiers
CA3036
CA3052

Drivers
CA3094
Power Amplifiers
CAB10
CA2002
CA2004
CA3131
CA3132

* BiMOS types

FM IF
CIRCUITS

TV RECEIVER
CIRCUITS

Subsystems
CA2111A
CA3013
CA3014
CA3043
CA3075
CA3089
CA3189
Gain Blocks
CA3011
CA3012
CA3076

Tuning
CA3163
CA3166
CA3168
AFT
CA3044
CA3064
CA3139
Sound IF
CAII90
CA2111A
CA3041
CA3042
CA3065
CA3134
PIX IF
CA270
CAI352
CA3068
CA3136
Remote Control
CA3035
,.Jungle" Circuits
CA3120
CA3142

·CMOS type

+ Programmable

Chroma Systems
CA1398
CA3066
CA3067
CA3070
CA3071
CA3072
CA3121
CA3125
CA3126
CA3128
CA3151
CA3170
Luminance
Processors
CA3135
CA3143
CA3144
Horizontal
Systems
CAI391
CAI394
CA920A
CA3159
CA3172

MOS/FET's
Single Gate
40467A
40468A
40559A
Dual Gate
40600
40601
40602
40603
40604

Dual Gate
Protected
3N204
3N205
3N206
3N211
3N212
3N213
40673
40820
40821
40822
40823
40841

7

Operating and Handling Considerations
tions, with virtually no problems of damage due to
electrostatic discharge.
In some MOS FETs, diodes are electrically connected
between each insulated gate and the transistor's source.
These diodes offer protection against static discharge and
in-circuit transients without the need for external shorting
mechanisms. MOS FETs which do not include gateprotection diodes can be handled safely if the following basic
precautions are taken:
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs attached to the device by the vendor, or by the
insertion into conductive material such as "ECCOSORB*
LD26" or equivalent.
(NOTE: Polystyrene insulating "SNOW" is not sufficiently conductive and should not be used.)
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means, for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
circuits with power on.

*Trade Mark: Emerson and Cumming, Inc.

SOLID STATE CHIPS

Solid state chips, unlike packaged devices, are nonhermetic devices, normally fragile and small in physical size,
and therefore, require special handling considerations as
follows:
I. Chips must be stored under proper conditions to insure
that they are not subjected to a moist and/or contaminated atmosphere that could alter their electrical,
physical, or mechanical characteristics. After the shipping
container is opened, the chip must be stored under the
following conditions:
A. Storage temperature, 40 0 C max.
B. Relative humidity, 50% max.
C. Clean, dust-free environment.
2. The user must exercise proper care when handling chips
to prevent even the slightest physical damage to the chip.
3. During mounting and lead bonding of chips the user must
use proper assembly techniques to obtain proper electrical, thermal, and mechanical performance.
4. After the chip has been mounted and bonded, any
necessary procedure must be followed by the user to
insure that these non-hermetic chips are not subjected to
moist or contaminated atmosphere which might cause
the development of electrical conductive patlis across the
relatively small insulating surfaces. In addition, proper
consideration must be given to the protection of these
devices from other harmful environments which could
conceivably adversely affect their proper performance.

__________________________________________________________________________ 9

Terms and Symbols
VBE(sat)
V(BR)CBO
V(BR)CES

base-ta-emitter saturation
voltage
collector-to-base breakdown
voltage
collector-to-emitter breakdown voltage

V(BR)OI
V(BR)R
V(BR)EBO
V(BR)GSSF

V(BR)G1SSF

dc breakdown voltage between diode and substrate
dc reverse breakdown voltage
emitter-to-base breakdown
voltage
dc gate-to-source forward
breakdown voltage, all other

VG2S
V G2S (off)
VI
VI(Lim)
VICR
V IL
V IH
VIO
IVIOI

terminals shorted to source

"VlOi"T

(single-gate types)
dc gate-No.1-to-source
forward breakdown voltage,

"VlOi"T

all other terminals shorted to

V(BR)G2SSF

source Idual-gate types)
dc gate No.2-to-source forward
breakdown voltage, all other

"VloI"V+

V(BR)G2SSR

VCBO
VCC

VCO
VCEO
VCEO(sus)

VOG
V OG1
V DG2
VDIO
V DR
VDS
VEE
VF
I\VFi"'T
V GH
V GL
V GS
VGS(TH)
VGSIOff)
VG1S
VG1S (Off)

temperature coefficient of

(dual-gate types)
de gate-ta-source reverse
breakdown voltage, all
other terminals shorted to
source Isingle-gate types)
de gate-No.2-to-source

aVIO

reverse breakdown voltage,

VN
Vo
"VOi"VL\VOilOV+

collector-ta-substrate voltage
charge pump voltage
drain supply voltage (the most
positive supply voltage;
always referenced to ground)
drain-to-gate voltage Isinglegate types)
drain-to-gate-No.1 voltage
(dual-gate types)
drain-to-gate-No.2 voltage
(single-gate types)
diode-to-substrate voltage
diode reverse voltage
drain-ta-source voltage

Vil Lim)
V knee

VO(rms)
"'VO
V Op_p

angle of reverse transadmittance, common-source
circuit

Zl

Zo

Zz


7)

·L

input impedance
output impedance
zener impedance

phase angle
phase margi n
efficiency
open-loop phase lag

input limiting voltage (knee)
protective diode knee
voltage (protected gate types)
output noise voltage

output voltage
dc supply voltage sensitivity
dc supply voltage sensi1ivity
open-loop output voltage
swing
output voltage temperature
coefficient

VOlat)
VOL

output voltage swing
recovered af voltage
output voltage, low level;
the voltage level at an output
when the input logic

VOO
V OH

establish logic LOW output.
output offset voltage
output voltage, high level;
the voltage level at an output

conditions have been set to

when the input logic conditions

VOM +
VOM VOP
V OPL
V OPH

channel gate input voltage,

VTH
V
Vfs

gate-No.l-to-source voltage
(dual-gate type)
gate-No.1-to-source cutoff
voltage Idual-gate types)

(-)rs

coefficient of input-offset
VOltage

source voltage (the most
negative supply voltage in a
3-supply voltage system)
dc forward voltage
temperature coefficient of
forward·voltage drop
high level
channel gate input voltage,
low level
gate-ta-source voltage
gate-to-source threshold
voltage
gate-to-source cutoff voltage
Isingle-gate types)

phase angle of small-signal,
common-source, short-circuit,
reverse transadmittance

input offset voltage drift
positive input-off set-voltage
negative input-offset-voltage

sustaining VOltage

VCIO
VCP
VOO

common-mode input voltage
range
input-voltage, low level
input-voltage, high level
input offset voltage
magnitude of input offset
voltage
temperature coefficient of
magnitude of input offset
voltage

sensitivity
average temperature

collector-ta-emitter voltage
collector-ta-emitter

2kH
V±=15V

VO=±lOV

RL;;>2kn

25

-

-

0.3

15

-

-

O.S

-

0.1

0.4

-

-

±12

±14

-

±lO ±l3

-

±lO

±l3

-

RL =2kH

V±=l5V
Common-Mode
Input-Voltage
V±=20V
Range
VICR

-

0.03 0.075 0.1

-

-

-

1.8

3

1.2

50
25

-

-

-

0.07 0.25

-

±l2

-

-

±l2

-

-

-

-

-

-

-

-

Common-Mode
Rejection Ratio
CMRR

RS~

Note 2: The input offset characteristics given are the values required to drive the output to
within 1 V of either supply with a l·mA load. These characteristics define an error
band which takes into account the worst·case effects of voltage gain and input
impedance. The input offset voltage, input offset current, and input bias current
specifications apply for any supply voltage from a 5 V single supply up to a ±15 V
dual supply.

SUPPLYVOlTAGEIII.)a,SV

t

Y7-4"SO V

40

E. ..TTER-FOLLOWER
OUTPUT
'0 RL"eoOA

'0

-0.5

0

0.5

OIFfERENTIAL INPUT VOLTAGE IVIOI-rnV

Fig. 12 - Transfer function.

11lln~ i~~:I;

:. '1!! ~ ::::
d;'Hn :::1 " ..

'0

POSITIVE SUPf'lYOUTPUT HIGH

POSITIVE AND NEGATIVE SUPPLY-

OUTPUT LOW

OUTPUT CURRENT 1:101-.'-

Fig. 13 - Output saturation lIo/rage vs.
output current.

-'0 -2'

!SO

'00

.W.I£NT TEIIIPERATURF 11&1-·C

Fig. 14 - Supply current vs. B.mbient
temperature.

8

~

•

•

~

AMBIENT TENPf.RATURE ITai-"C

Fig. 15 - Input and output leakage current

vs. ambient temperature.

___________________________________________________________________ 27

CA124, CA224, CA324 Types
"E" Suffix Types: Standard Dual-In-Line
Plastic Package
"G" Suffix Types: Hermetic Gold-Chip
Dual-In-Line Plastic Package

Quad Operational Amplifiers
For Commercial, Industrial, and Military Applications
The RCA-CA 124, -CA224, and -CA324 consist of four independent, high-gain operational amplifiers on a single monolithic
substrate. An on-chip capacitor in each of the
ampl ifiers provides frequency compensation
for unity gain. These devices are designed
specifically to operate from either single or
dual supplies, and the differential voltage
range is equal to the power-supply voltage.
low power drain and an input commonmode voltage range of from 0 V to V+ -1.5 V

(single-supply operation) make the CA124,
CA224, and CA324 suitable for battery
operation.
The CA124, CA224, and CA324 are supplied
in a 14·lead dual-in-line plastic package (E
suffix), or in a hermetic gold-chip 14-lead
dual-in-line plastic package (G suffix) to provide true hermetic performance. The CA324
is also available in chip form (H suffix). and
as a hermetic gold-chip (HG suffix).

Features:
•
•
•
•
•
•

Operation from single or dual supplies
Unity-gain bandwidth. . . . . . 1 MHz (typ.)
DC voltage gain . . . . . . 100 dB (typ.)
Input bias current .
45 nA (typ.)
Input offset voltage
2 mV (typ.)
Input offset current
5 nA (typ.)
tor CA224, CA324
3 nA (typ.) for CA124
• Replacement for industry types 124,224,324

MAXIMUM RATINGS,Abso(ute-Max;mum Va(uesat TA = 25°C

Applications

SUPPLY VOLTAGE
DIFFERENTIAL INPUT VOLTAGE.
INPUT VOLTAGE . . . . • .
INPUT CURRENT IV I <-0.3 V)t .

32Vo,±16V
±32 V

=

• Multivibrators
• Oscillators

OUTPUT SHORT CIRCUIT TO GROUND
IV+ ';;;15 V)*
DEVICE DISSIPATION:

Up to T A

• Summing amplifiers

-0.3 V to +32 V
50mA
Continuous

55°C

• Transducer amplifiers
• DC gain blocks

750mW

Above T A = 55°C

.

derate 1inearly at 6.67 mW/oC

AMBIENT TEMPERATURE RANGE:

Operating.
Storage

-55 to +125 0 C
-65 to + 150°C

LEAD TEMPERATURE lOURING SOLDERING):

At distance 1116 ± 1132 in. 11.59 ±0.79 mml
from case for 10 seconds max.

NEG
INPUT I

pos
INPUT I

*The maximum output current'is approximately 40 rnA independent of the magnitude of V+. Continuous

>

short circuits at V+ 15 V can cause excessive power dissipation and eventual destruction. Short, circuits
from the output to V+ can cause overheating and eventual destruction of the device.
tThis input current will only exist when the voltage at any of the input leads is driven negative. This current
is due to the collector·base junction of the input p·n-p transistors becoming forward biased and thereby
acting as input diode clamps. In addition to this diode action, there is also lateral n·p·n paraSitic transistor
action on the Ie chip. This transistor action can cause the output voltages of the amplifiers to go to the
V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative.
This transistor action is not destructive and normal output states will re-establish when the input voltage,
which was negative, again returns to a value greater than -0.3 V dc.

pos

INPUT 2

92CS-24204

TOP VIEW

Fig. 1 - Functional diagram.

Fig. 2-Schematic diagram-one of four operational amplifiers.

_________________________________________________________________ 29

CA124, CA224, CA324 Types
TYPICAL CHARACTERISTICS CURVES

••

INPUT COMMON-MODE VOLTAGE

RANGE CYICR)-OY

I

_

"n

~~.,.:

jl

. ,.
z

~

ISV

~

AMBIENT TEMPERATURE (TAJTO +125-C

o

~

_ ·c
_

~

~

e

0

~

~

~

o

~

Fig. 3-/nput current

VI.

,

1015202530
SUPPLY VOLTAGE (Y+)-Y

AMBIENT TEMPERATURE (TA)--':

:"

~

'\

. , .I'-..... , . ..

,
FREQUENCY

Fig. 4-Supply current drain vs. supply tloltage.

ambient temperature.

. ..

415'1

-

1\

~ ,

SV

~~o

AMBIENT TEMPERATURE
f---f--ITAI·2~·C

(IJ-H~

Fig. 5-Large-signal frequency response.

1
I

~

L.OAD RESISTANCE IR,,.I-20Ilil

~

t

!
il!
Ii

..n

'"

I

20

..
-flO

-2!I

2~

$0

7~

AMBIENT TEMPERATURE CTA I-'C

,.

to

SUPPL.Y VOL.TAGE ('1+)-'1

• HCS-2<1:roe

Fig. 7-/nput ;;urrent

Fig. 6-0utput current VI. ambient temperature.

~IENT

VI.

supply tlo/tage.

Fig. 8- Voltage gain vs. supply voltage.

TEMPERATURE: (TA)-2S-C

SUPPLY VOLTAGE CY+)-30Y

~

• 50".:r
~
y
-

I~

,~

~

i

:t--t--t'

10

VI

g

~ 4Of--+-+--I~~
i 1.1--1--1--+--+-~""
n
1011
10011
FREQUENCY III-H,

Fig. 9-Open-/oop frequency response.

~

0

,.M

J

IVo

~

t' ,.
tt

.~T,: •
--,

- .:l:l

'"

OUTPUT

•
0

I

•

•
4
•
TIM[(t)-,..

an

Fig. 10-Voltage follower pulse response
(small signal).

Fig. 11- Voltage follower pulse response.

____________________________________________________________________ 31

CA139, CA239, CA339 Types
TYPICAL CHARACTERISTICS (Cont'd)

ELECTRICAL CHARACTERISTICS
TEST CONDITIONS

LIMITS

V+-5V
CHARACTERISTIC

Input Offset
Voltage (ViOl
At Output Switch
Point V "" 1.4 V
Differential Input
Voltage (VIOl
Saturation Voltage
(V sat )
Common·Mode
Input Voltage
Range (VICR)
Input Offset
Current (1101
Input Bias Current
(lIBI
Supply Current (1+)

Unless otherwise
indicated
2SoC
VREF =
1.4 V,RS = 0 Note 1

CA139A

CA139
Min. Typ.

-

Max.

2

-

5
9

Min. Typ.

-

UNITS

Max.

1

?

a

2
mV

-

1

4

-~·c

.0

.....IENT TEMPERATURE (TA)-O-C

40

2'·C

~

30

!;

20

~

7

C

10

Keep all inputs ~O V
for V- (If usedl,
Notes 1,2
VI = 1 V,
25°C
VI+=OV,
ISINK .;;
Note 1
4mA

-

-

36

-

-

36

V

-

250

500

-

250

20

30

40

Fig. 4-lnput current vs. suPPIv voltage.

500
mV

-

-

700

-

-

700

Note 3

25 0 C 0
Note 1 0

-

V+-1.5
V+-2

0
0

-

V+-l.5
V+-2

V

11+- 11-

2SoC
Note 1

-

3

nA

3

-

25
100

-

-

-

-

25
100

-

25

100

-

25

100

-

-

300

-

-

300

-

0.8

2

-

0.8

2

mA

25°C

-

0.1

-

-

0.1

-

nA

Note 1

-

-

1

-

-

1

J1A

II+or 1125°C
with Output
in Linear
Note 1
Range
R L - 00 on all com·
parators, T A = 25°C

10

SUPPLY VOLTAGE (V1')-V

nA
TIME (11-,.5

Fig. 5-Response time for various input
overdrives-negative transition.

VI+~l V,

Output Leakage
Current

VI-=O,
Vo = 5 V
VI+~l V,
VI-'=O,
Vo = 30 V

Output Sink
Current

VI ~1 V,
VI+=O,
VO';;+1.5V,
TA = 25°C

6

16

-

6

16

-

mA

Voltage Gain (AOLI

RL ~lS kG;.t+=15 V,
TA = 25°C

-

200

-

50

200

-

V/mV

Large Signal
Response Time

VI = TTL Logic
Swing, VREF =
+1.4 V,VRL = 50 V,
RL = 5.1 kG,
TA = 25°C

-

300

-

-

300

-

ns

Response Time
See Figs. 5 & 6

VRL =5V,
RL =5.1 kG,
TA = 250 C

-

1.3

-

-

1.3

-

J1S

Note 1:

Note 2:

Note 3:

Fig. 6-Response time for lIarious input
overdrives-positille transition.

Ambient Temperature (T A) applicable over operating temperature range as shown below.
CA139 (-55 to +125 0 CII CA239 (-25 to +85 0 CII CA339 (0
HOoCI
CA139A
CA239A
CA339A
to
The comparator will provide a proper output state even if the positive swing of the inputs exceeds
the power supply voltage level. if the other input remains within the common-mode voltage range.
The low input voltage state must not be less than -0.3 V (or 0.3 V below the magnitude of tha
negative power supply, if used).

The upper end of the common-mode voltage range is (V+J - 1.5 V. but either or both inputs can
go to +30 V without damage.

__________________________________________

~

OUTPUT SINK CURRENT

!Iol-mA

Fig. 7-0utput saturation voltage vs. output sink
current.

________________________ 33

CA158, CA158A, CA258, CA258A, CA358, CA358A, CA2904 Types
Features:

Dual Operational Amplifiers
For Commercial, Industrial, and Military Appl.ications
The RCA-CAI58, -CAI58A, -CA258,
-CA258A, -CA358, -CA358A, and CA2904 types consist of two independent, high
gain, internally frequency compensated operational amplifiers which are designed specifically to operate from a single power supply
over a wide range of voltages. They may also
be operated from split power supplies. The

supply current is basically independent of
the supply .voltage over the recommended
voltage range.
These devices are particularly useful in interface circuits with digital systems and can
be operated from the single common 5 Vdc
power supply. They are also intended for
transducer ampl ifiers, dc gain blocks and

MAXIMUM RATI NGS, Absolute-Maximum Values at TA = 2!PC
SUPPLY VOLTAGE, v+:
CA2904.

•
•
•
•

Internal frequency compensation for unity gain
High dc voltage gain - 100 dB typo
Wide bandwidth at unity gain - 1 MHz typo
Wide power supply range:
Single supply .
3 to 30 V
Dual supplies.
± 1.5 to ± 15 V
• Low supply current - 1.5 mA typo
• Low input bias current
• Low input offset voltage and current
• Input common-mode voltage range
includes ground
• Differential input voltage range equal to
V+ range
• Large output voltage swing - 0 to V+
-1.5V

26 Vor ±13 V
32Vor±16V

Other Types
DIFFERENTIAL INPUT VOLTAGE:
CA2904
Other Types
INPUT VOLTAGE
INPUT CURRENT IVI
-0.3 V) +
OUTPUT SHORT CIRCUIT TO GROUND
IV+ ';;;15 V)*
DEVICE DISSIPATION:
Up to T A = 55°C .
Above T A = 55°C.
AMBIENT TEMPERATURE RANGE:
Operating .

±26V
±32V
-0.3 V to V+ V
50mA

<

Continuous

630mW

derate linearly at 6.67 mW/oC
-55 to + 125°C
...fl5 to + 150°C

Storage.
LEAD TEMPERATURE (During Soldering):
At distance 1116 ± 1132 in. 11.59 ± 0.79 mm)

from case for 10 seconds max.

+ This input current will only exist when the voltage at any of the input leads is driven negative. This current

many other conventional op amp circuits
which can benefit from the single power
supply capability.
The CA158, CA158A, CA258, CA258A,
CA358 and CA358A types are supplied in
hermetic gold-CHIP 8-lead dual-in-line plastic
packages (G suffix), 8-lead TO-5 style packages with standard leads (T suffix). and
with dual-in-line formed leads (01 L-CAN, S
suffix). The CA2904 is supplied only in the
gold-CHIP plastic package (G suffix).
The CA 158, CA 158A, CA258, CA258A,
CA358, CA358A, and CA2904 types are an
equivalent to or a replacement for the industry types 158, 158A, 258, 258A, 358,
358A, and 2904.

is due to the collector-base junction of the input p-n-p transistors becoming forward biased arid thereby acting as input diode clamps. In addition to this diode action, there is also lateral n-p-n parasitic transistor ac-

tion on the Ie chip. This transistor action can cause the output voltages of the amplifiers to go to the V+
voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This
transistor action is not destructive and normal output states will re~establish when the input voltage, which
was negative, again returns to a value greater than -0.3 V dc.

* The maximum output cur.rent is approximately 40 rnA independent of the magnitude of V+.

TOP VIEW

Continuous
short circuits at V+ 15 V can cause excessive power dissipation and eventual destruction. Short circuits
from the output to V+ can cause overheating and eventual destruction of the device. Destructive dissipa'
tion can result from simultaneous short circuits on both amplifiers.

>

r-__~________~~__~__~__~____~~T02

~
.

2

6

7

Fig.2 - Functional diagram for CA 158, CA258.
and CA358 S- and T-suffix types.

-

'sc
I Vo

~---+--~--~~~----~~----~~--~----~_T02

92CM-29:>69

Fig. 1- Schematic diagram - one of two operational amplifiers.

92CS-25015

Fig.3 - Functional diagram for CA 158, CA258,
CA358, and CA2904 G-suffix types.

----------------------------------------------~----------------------~

CA158, CA158A, CA258, CA258A, CA358, CA358A, CA2904 Types
AMBIENT TEMPERATURE ITAloZ5"C

ELECTRICAL CHARACTERISTICS (Values Apply for Each Operational Amplifier)

TEST CONDITIONS
CHARACTERISTIC
Supply Vol1Bge (V+) = 5 V
Unless Otherwise Specified

~

LIMITS
CA258A (G, T, SI
Min. Typ.

I

ISO

~

125

LOAD RESISTANCE (Rd" 20ka

111

an

UNITS

Max.

TA = 250 C
Input Offset Voltage, VIO

Note 3

-

1

3

mV

Output Voltage Swing, VOpp

RL = a n

0

-

V+ -1.5

V

Input Common·Mode
Voltage Range, VICR

Note 2, V+ = 30 V

0

-

V+ -1.5

V

-

2

15

nA

40

80

nA

20

40

-

mA

10

20

-

mA

12

50

-

/lA

Input Offset Current, 110

11+ -II

Input Bias Current, liB

II+or II ,Note 1

Output Current (Source l. 10

VI+=+l V, VI-=OV,
V+= 15 V
VI+=O V, VI-= 1 V, V+=15 V

Output Current (Sink), 10

VI+=O V, VI-= 1 V,
Vo=200mV

Short Circuit Output Current

R L = 0 (to Ground) Note 4

-

40

60

Large Signal Voltage Gain, AOL

RL;;'2 kn, V+: 15 V
(For large Vo swing)

50

100

-

V/mV

Common-Mode Rejection
Ratio, CMRR

DC

70

85

-

dB

Power' Supply Rejection
Ratio, PSRP

DC

65

100

-

dB

Amplifier-to-Amplifier
Coupling

f = 1 to 20 kHz (Input referred)

-

-120

-

dB

Input Offset Voltage, VIO

Note 3

-

-

4

mV

Temperature Coefficient of
Input Offset Voltage,"'VIO

Rs

=0

-

7

15

/lV/oC

Input Offset Current, 110

It-II-

-

-

30

nA

200

pAloC

II+or 11-

-

10

Input Bias Current, liB

40

100

nA

Input Com~on-Mode
Voltage Range, VICR

V+

= 30 V, Note 2

0

-

V+-2

V

RL

=co On All Amp!.
=co, V+ = 30 V

-

0.7

1.2

1.5

3

20
SUPPLY VOLTAGE (V+I-V

Fig.S - Voltage gain as a function of
supply voltage.

n

140

,~,--t------H~

!

~
~

60f--+---J-'

~

mA

i 20f--+--1---+-~-~~
'0

'00

10k
lOOk
FREQUENCY (fl-Hz

'OM

Fig.9 - Open-loop frequency response.

AMBIENT TEMPERATURE ITA '-2S·C
SUPPLY VOLTAGE (V+l-15V
LOAD RESISTANCE (RL'-2kn

T A = -25 to +85 0 C

Temperature Coefficient of
Input Offset Current, "'110

~S-lI4l1n

Supply Current, 1+

RL

Fig. 10 - Voltage follower pulse response.

mA
AMS lENT TEMPERATURE (TA).2~.C

NOTE 1: Due to the p-n-p input stage the direction of the input current is out of the IC. No loading change exists
on the input lines because this current is essentially constant, independent of the state of the output.
NOTE 2: The input signal voltages and the input common-mode voltage should rrot be allowed to go negative by
more than 0.3 V. The positive limit of the common-mode voltage range is V+ - 1.5 V. but either or both

inputs can go the + 32 V without damage.
NOTE 3: Va = 1.4 VOC. Rs = 0 n with V+ from 5 V to 30 V, and over the full input common-mode voltage range
(0 V to V+ - 1.5 V).
NOTE 4: The maximum output current is approximately 40 rnA independent of the magnitude of Vi. Continuous
short circuits at V+ >15 V can cause excessive power dissipation and eventual destruction. Short circuits
from the output to V+ can cause overheating and eventual destruction of the device. Destructive dissipation can result from simultaneous short circuits on both amplifiers.

SU~ PLY VOLTAGE (Y+).30 V

~

IVo

"j-

~

+

g40C

~~

~TPUT

+-

t.
0

1

2

3

4

'"

:INPUT

t

300

I

i1

50pF

l

5

I.

tt

V,~
-I

/"""

9

•+

..

,.

,

,

ej..t;.

•

6

U
FT

gW

9

TIME (1)-,..

Fig. 11 - Voltage follower pulse response
(small signa/).

______________________________________________________________________ 37

CA158, CA158A, CA258, CA258A, CA358, CA358A, CA2904 Types

.

ELECTRICAL CHARACTERISTICS (Values Apply for Each Operational Amplifier)
LIMITS
CA158 (G, T, S)
CA258 (G, T,S)

TEST CONDITIONS
CHARACTERISTIC
Supply Voltage (V+) = 5 V
Unless Otherwise Specified

Min. Typ.

Max.

-

2

5

mV

Output Voltage Swing, VOPP

RL = 2 kn

0

-

V+ -1.5

V

Input Common-Mode
Voltage Range, VICR

Note 2, V+ =30 V

0

-

V+ -1.5

V

Input Offset Current, 110

11+-11

-

3

30

nA

45

150

nA

20

40

-

mA

10

20

-

mA

12

50

-

p.A

Output Current (Source). 10

V+= 15 V
VI+=O V, VI-= 1 V, V+=15 V

Output Current (Sink), 10

~ ,.

.-,.

I

-"

."

,.

".

-00
AMBIENT TEMPERATURE (TA}--t

100

'"

92CS-2420B

Fig. 16 - Output current as a function of

VI+=O V, VI-= 1 V,
Vo=200mV

J

,.

a 2.

TA=250C

11+ or II ,Note 1

~

~

Note 3

VI+=+1 V, VI-=O V,

60

~

UNITS

Input Offset Voltage, VIO

Input Bias Current, liB

..
..
!
I

Short Circuit Output Current

R L = 0 (to Ground) Note 4

-

40

60

mA

Large Signal Voltage Gain, AOL

RL;;' 2 kn, V+ = 15 V
(For large Vo swing)

50

100

-

V/mV

Common-Mode Rejection
Ratio, CMRR

DC

70

85

-

dB

Power' Supply Rejection
Ratio, PSRR

DC

65

100

-

dB

Amplifier-to-Amplifier
Coupling

f = 1 to 20 kHz (Input referred)

-

-120

-

dB

ambient temperature.

TA = -55 to + 125°C (CA158); TA = -25 to +850 C (CA258)
Input Offset Voltage, VIO

Note 3

-

-

7

mV

Temperature Coefficient of
Input Offset Voltage,o:VIO

Rs = 0

-

7

-

p.V/oC

Input Offset Current, 110

11+-11-

-

-

100

nA

Temperature Coefficient of
Input Offset Current, 0:110

-

10

-

pA/oC

Input Bias Current, liB

II+or 11-

-

40

300

nA

Input Common·Mode
Voltage Range, VICR

V+=30V,Note2

0

-

V+-2

V

RL = 00 On All Ampl.

-

0.7

1.2

1.5

3

Supply Current, 1+

R L = 00, V+ = 30 V

mA

NOTE 1: Due to the p-n-p input stage the direction of the input current is out of the IC. No loading change exists

on the input lines because this current is essentially constant, independent of the state of the output.
NOTE 2: The input signal voltages and the input common-mode voltage should not be allowed to go negative by
more than 0.3 V. The positive limit of the common~mode voltage range is V+ - 1.5 V, but either or both
inputs can go the + 32 V without damage.
NOTE 3: Vo "" 1.4 Voe. Rs "" 0 n with V+ from 5 V to 30 V. and over the full input common~mode voltage range

(OV,oV+-l.5V).
NOTE 4: The maximum output current is approximately 40 mA independent of the magnitude of Vi-. Continuous
short circuits at V+ >15 V can cause excessive power dissipation and eventual destruction. Short circuits
from the output to V+ can cause overheating and eventual destruction of the device. Destructive dissi~
pation can result from simultaneous short circuits on both amplifiers.

__________

~

_____________________________________________________________ 39

CA158,

CA158A~

CA258, CA258A, CA358, CA358A, CA2904 Types

ELECTRICAL CHARACTERISTICS (Values Apply for Each Operational Amplifier)

LIMITS

TEST CONDITIONS

CA2804G

CHARACTERISTIC
Supply Vol.... 1v+1 • 5 V
Unl. . Otherwise Specified

Min. Typ.

UNITS

Ma.

TA = 25°C
Input Offset Voltage. VIO

Note 3

-

2

7

mV

Output Voltage Swing, VOpp

RL:'> 10kfl

0

-

V+ -1.5

V

Input Common·Mode
Voltage Range, VICR

Note 2, V+ =30 V

0

-

V+ -1.5

V

Input Offset Current, 110

11+ -II

5

50

nA

Input Bias Current, liB

11+ or II ,Note 1

-

45

250

nA

Output Current (Source),lo

VI+=+1 V, VI
V+= 15 V

20

40

-

mA

Output Current (Sink), 10

VI+=O V, VI-= 1 V. V+=15 V

10

20

-

mA

Short Circuit Output Current

RL = 0 (to Ground) Note 4

-

40

60

mA

Large Signal Voltage Gain, AOL

RL:'>2kfl, V+= 15 V
(For large Vo swing)

-

100

-

V/mV

Common-Mode Rejection
Ratio, CMRR

DC

50

70

-

dB

Power" Supply Rejection
Ratio, PSRR

DC

50

100

-

dB

Amplifier·to-Amplifier
Coupling

f = 1 to 20 kHz (lnputreferred)

-

-120

-

dB

Input Offset Voltage, VIO

Note 3

-

-

10

mV

Temperature Coefficient of
Input Offset Voltage,a:VIO

Rs = 0

-

7

-

/lV/oC

11+-11-

-

45

200

nA
pAloC

11+ or II

-

-

Input Bias Current, liB

40

500

nA

Input Common-Mode
Voltage Range, VICR

V+ = 30 V. Note 2

0

-

V+-2

V

RL = 00 On All Amp!.

-

0.7

1.2

1.5

3

=OV,

TA = -40 to + 850C

Input Offset Current, 110

j

Temperature Coefficient of
Input Offset Current, 0:110

Supply Current, 1+

RL = 00, V+ = 30 V

10

mA

NOTE 1: Due to the p·n~p input stage the direction of the input current is out of the IC. No loading change exists
on the input lines because this current is essentially constant. independent of the state of the output.
NOTE 2: The input signal voltages and the input common-moqe voltage should not be allowed to go negative by
more than 0.3 V. The positive limit of the common-mode voltage range is V+ - 1.5 V. but either or both
inputs can go the + 32 V without damage.
NOTE 3< Vo = 1.4 Voe, As = 0 n with V+ from 5 V to 30 V, and over the full input common·mode voltage range
(0 V to V+ - 1.5 VI.
NOTE 4: The maximum output current is approximately 40 rnA independent of the magnitude of V·. Continuous

short circuits. V+ ::>15 V can cause excessive power dissipatiorl and eventual destruction. Short circuits
from the output to V+ can cause overheating and eventual destruction of thedevice. Destructive dissipation can result from simultaneous short circuits on both amplifiers.

________________________________________________________________

~

____ 41

CA555, CA555C Types
ELECTRICAL CHARACTERISTICS, At TA =2!PC,

vr =5 to 15 V unless otherwise specified
150

LIMITS
CA555

CHARACTERISTIC TEST CONDITIONS
Min.

Typ.

UNITS

4.5

-

18

4.5

-

16

V

-

3

5

-

3

6

mA

V+ = 15 V.
RL = 00

-

10

12

-

10

15

mA

-

(2/3)V+

-

-

(2/3)V+

V

1.45
4.8

1.67
5

1.9
5.2

-

1.67
5

-

-

0.5

-

V+ = 5 V
V+ = 15 V

Trigger Current
Threshold Current....
ITH

-

0.5

-

/J. A

JJ.A

0.1

0.25

-

0.1

0.25

0.7

1.0

0.4

0.7

1.0

V

Reset Current

-

0.1

-

-

0.1

-

mA

2.9
9.6

3.33
10

3.8
10.4

2.6
9

3.33
10

4
11

V
V

V+ = 5V
ISINK = 5 mA

-

-

-

-

0.25

0.35

ISINK = 8 mA

-

0.1

0.25

-

-

-

V+ = 15 V
ISINK = 10mA

-

0.1

0.15

-

0.1

0.25

-

0.4

0.5

0.75

2.2

2.0

2.5

2.5

-

-

0.4

2.0

2.5

-

V+ = 5V

ISINK = 50 mA
ISINK = 100 rnA
ISINK = 200 mA

,,,,#"':'

3.3

ISOURCE = 200 mA
Timing Error
(Monostable) :
I nitial Accuracy
Frequency
Drift with
Temperature
Drift with Supply
Voltage
Output Rise Time. tr
Output Fall Time, tf

-

2.75

3.3

Rl, R2
= 1 to 100 kil
C = 0.1 /J.F

Tested at
V+ = 5 V,

v+ = 15 V

-

-

13.3
12.5
0.5

2

12.75

-

13.3
12.5
1

C

!

lJt#t
'~l~ c

1"r.'",:S:
c

.\2.

c{tt1HII

TRIGGER

~;ULSEI

VOLT,!>oi IIlV+) *

0.4

Fig. 4 - Minimum pulse width vs. minimum
trigger voltage.

(
iil

Fig. 5 - Supply current vs. supply voltage.
V

I '

f I.'
~
~

V

13.0

!J~

V

V+ = 15 V
ISOURCE = 100 mA

,.~

*WHERE • IS THE DECIMAL MU .... TIPLIER OF THE SUPPLY VOLTAGE

~

3.0

ISOURCE = 100 mA
High State. VOH

..

50

AMBILT

TEMJERALRE! (Tll.-55.~

I

0

V+ = 5V

~E.\~

V

-

-

V+ = 15 V

~.,

MINI~LM

0.4

Output Voltage
Drop:
Low State. VOL

~

:

Reset Voltage

Control Voltage
Level

I
.00

Max.

V+ = 5 V.
RL = 00

Threshold Voltage.
VTH
Trigger Voltage

CA555C
Max. Min.

1

DC Supply Voltage,
V+

DC Supply Current
(LowState)*.I+

Typ.

-

-

%

!

~ !---

J0 .•

~

0.'

~

i

J

:

rpPI

.,.

LY rLTAGE

0

,

ill

--r--r:V

+;t5-C

I

I.,

~

~

;

I

t+I.5v:!'1
,
,

.0

I

.

V+:!'115V

1

.

'00

SOURCE CURRENT I ISOURCE)- rnA

-

30

100

-

50

-

p/m/
°C

-

0.05

0.2

0.1

-

%/V

-

100

-

ns

100

-

100

-

-

100

-

ns

Fig. 6 - Output voltage drop (high state) vs.
source current.

• When the output is in a high state, the dc supply current is typically 1 mA less than the
low·state value .
.... The threshold current will determine the sum of the values of Rl and R2 to be used in
Fig. 16 (astable operation): the maximum total Rl + R2 = 20 Mil.

.0
SINI( CURRENT !:lSINICI-mA

Fig.7 - Output voltage-low state vs. sink current

atV+=5V.

____________________________________________________________________ 43

CA555, CA555C Types
I
I
-I-'
3.3 v

I
I

I
I

I
I

I
I

f-'

f-'

I-'

f-'

u

1\

\

1\

1\

\

I
I

2

~

.t

I~~---P~--~---f~--+----+----~
4

~

-

1\

1.1 v

.

~ " I1!i

v

- f-"

"
w

u
Z

;'!

~
~

2
0.1

:

.
2

O~~F_----t----f~--~~-f~--~~~

Top Trace: Output voltage (2V/div. and
0.5 msldiv'!
Bottom Trace: Capacitor voltage (1 VI
div. and 0.5 ms/div.)
Fig. 17 - Tvpical waveforms for repeat
cycle timer.

2

0·001

Fig.1S - Free running frequency of repeat cycle timer
with variation in capacitance and resistance.

____________________________________________________________________ 45

CA723 Types
ELECTRICAL CHARACTERISTlCS8t TA· 25C, y+. VC· VI-12V, V-a 0, YO· 5 V,
IL -1 mAo C1 -100 pF, CREF· 0, RSCp· 0, unless otherwise specified. Divider
impadloMe R1R2 R,+R2 8t non-inverting input, Term.S, ·'0 kn 1_ Fig. 23).
LIMITS
TEST
CA723
CA723C
CONDITIONS Min. Typ.
Max.
Min Typ.
Max.
Quiescent Regulator IL = 0,
Current, 10
2.3
VI = 30 V
3.5
2.3
4
-

CHARACTERISTIC

UNITS

9.5

Output Voltage
Range, Vo

2

1

"
rnA

-

40

9.5

37

2

-

40

-

37

V
V

3

-

6.95 7.15

VREF

Output-Voltage
Temp. CoeffiCient,

AVO

Ripple Rejection
(See Note 2)

Short-Circuit

limiting Current,

ILiM

i

.DC

..
~
,

'0

~

0

-

38

3

7.35

6.8

7.15

7.5

38

Fig. 5 - Max. load current VB differential inputoutput voltage.

VI = 12
t04DV

-

0.02

0.2

-

0.1

0.5

VI = 12
to 15V

-

0.01

0.1

-

0.01

0.1

VI = 12
to 15V,
TA = -55 to
+125"C

-

-

0.3

-

-

-

VI = 12
to 15 V.
TA = Oto
70"C

-

-

-

-

-

0.3

IL = 1
to 50 rnA

-'

IL = 1
to 50 rnA,
TA = -55 to
+125"C

-

IL = 1
to 50 rnA,
TA =0
to 70"C

-

TA

=

.0
20
50
40
DIFFERENTIAL INPUT-OUTPUT VOLTAGE IVI-VO I-V

V

Reference Voltage,

(See Note 1)

~

MAX JUNCTION TEMP. ITJ j"150·C
THERMAL RESISTANCE o150·C/W

QUIESCENT DISSIPATION IPQ)60mW
r i O HEAT SINK)

0

Differential InputOutput Voltage,
VI-VO

Load Regulation

.'"

B

Input Voltage
Range, VI

Line Regulation
(See Note 1)

TYPICAL CHARACTERISTICS
CURVES FOR TYPE CA723

V

%VO

0.15

-

-

0.6

-

-

-

-

-

-

-

0.6

-

-

-

0.03

0.03

OUTPUT CURRENT (lOI-mA

0.2

Fig. 6 - Load regulation without current limiting.

%VO

-55

to +125°C

-

TA = 0
to 70°C

-

-

-

-

0.003

f = 50 Hz
to 10 kHz

-

74

-

-

74

0.002

0.Q15

%fc

0.Q15
OUTPUT CURRENT (lOI-mA

dB

f=50 Hzto
10kHz,
CREF = 51'F

-

86

-

-

86

RSCp = 10 n,
Vo = 0

-

65

-

-

65

-

-

20

-

-

20

-

-

2.5

-

-

2.5

-

BW 100 Hz
to 10 kHz,
Equivalent Noise RMS CREF = 0
Output Voltage. VN
BW = 100 Hz
(See Note 2)
10 kHz,
CREF = 51'F

rnA

I'V

Note 1: Line and load regulation speCifications are given for condition of a constant chip
temperature. For high-dissipation conditions, temperature drifts must be separately taken into account.

Fig. 7 - Load regulation with current limiting.

Note 2:· For CREF. see Fig. 23.

OUTPUT CURRENT !.IO l-mA

Fig. 8 - Load regulation with current limiting.

______________________________________________________________________ 47

CA723 Types
'0,6

INPUT "OLTAGE l"I'.12"

100

2

468

Ik

TIM[ Itl-,..

Fig. 21 - Load transient response.

2

..

68

2

I k
FREQUENCY III-HI

..

68

10k

2

468

1M

92CS.24177

Fig. 22 - Output impedance vs. frequency.

TYPICAL APPLICATION CIRCUITS

'st_

CA723
CA723C

",C"'"'''R£''NITT-o'V'v'''''-R~8i'~elED
LIM.

NON

IN"·
INPut

CIRCUIT PERFORMANCE DATA:

CIRCUIT PERFORMANCE DAtA:

REOULATEDQUTPUTVOLTAGE •
LlNEREOULATKJNfAYI-3VI • • • • lUI mY
LOADREQULATtON!.AIL-IIGIIIA!• • • 1.& mY

REGULATEOOUTf'UTVOLTAGE .
LINE REGULATION ~VI· 3 VI • • • • 1.5 mV
LOAD REGULATION ~IL" 50 mAl • • 4.5 mV

NDt.: R3 -

:!+~~Ior I'III..._

.......... drih

Not., R3"

Fig. 23 - Low-voltags regulator circuit fV0
to 7 volts).

•+

=2

CIRCUIT PERFORMANCE DATA:
REGULATIEDOUTPUTVOLTAGE . . • -15
V
LlNEREGULATlONlt,vI'"3VI. .
1 mV
LOAD REOULATK)N IAIL" 100 mAl •
2 mV
NDt.:For ........ ionI~theTO·55tvt-PKII...
.....
_
dio*VZit;
5houId
bei ......
_ _.n
_..
_ItmIII&.2·woIr
in.ne. wilh

:~+:! lor minimUfll ......N .. drift

R3....., t.elimilMded for minimum componenl count.

_wt..

92CS-24119

Fig. 24 - High-voltJIge regulator circuit fV0 = 7
to 37 volts)•

VolT_inIIIISI.

Fig. 25 - NegstillB-VOltage reguliltor circuit..

0---<>------,

.+
Vo
OUTPUT
r'-_....L..l-_~~--;;;~:"!'~R£~GULATEO

~

2.r
CA7U
CA723C

CUftR[NT
LIM.

CA723
CA723C

Rscp

CURRENT

LIM.

"ftn

..

5-6kn

I--o--~r R~~ED

CIRCUIT NfiFORMANCE DATA:
REOULATEDOU11'UTVOLTAGE . . . . 16
V
LlNERI!GULATIONCAV',-3YI • • • • 1.6 ,.y
LOAD REGULATION (6.IL. t AJ. • • . 16 MY

CIRCUIT PERFORMANCE DATA:
REGULATl.DOUTPUTVOLTAGE •
LINE REGULATION 16VI" 3 VI .
LOAD REGULATION ItoIL· 1 AI.

C1RCUIT I"ER.ORMANCE DATA:
IS
V
REOULATEDOUTI'UTVOLTAGE • ••
UNEREGULATION ItoVI-3VI • • • • 0.6 ..v
LOADREOULATlONltolL - '0 ......1. . .
1 MY
SHORT.(:IRCUITCURREfifT • • • • • • 20 IlIA

Fig. 26 - Positive-voltago-regulator circuit (with
external n-p-n pillS transistor}.

Fig. 27 - Positive voltage-regulator circuit (with

Fig. 28 - Fofdback currtlnt-limiting circuit.

external p-n-p pass transistor).

..0'..

oz •

"II

NoJt:F.. ~....."..._T().6stPt

~"''''''VZ'''''''''''.''''·
t1m11118.Z-voIt_diodIlhouldt._
_ _ in __ wllhYOfT."m .... el.

CIRCUIT I"ERFORIIIANCE DATA:
REGULATEOOUTf'UTVOLTAGE • • • 50
V
LINE REGULATION 16VI"20YI • • • 15 mY
LOADREOULATIONUl1l"60mA} • • • 20 mY

Fig. 29 - Positive-floating regulator cirr:uit

------------------------------------------------------------------~

CA741, CA747, CA748, CA1458, CA1558 Types
TOP VIEW

RCA
Type No.

No. of
Amp/.

CA1458
CA1558
CA741C
CA741
CA747C
CA747
CA748C
CA748

dual
dual

Pha..
Comp.

Offset Voltage
Null
no
no
yes
yes
yes·
yes·
yes
yes

into
into
into
into
into
into

single
single

dual
dual

ext.
ext.

single

single

Min.
AOL

Operating.Temperature
Ranga tCI

Max. VIO
(mVI

20k
50k
20k
50k
20k
50k
20k
50k

o to +70·
-55 to +125
o to +70'"
-55 to +125
o to +70'"
-55 to +125
010 +70'"
-55 to +125

6
5
6
5
6
5
6
5

SO

Id.-CA 14585,CA 1458T,CA 15585,
and CA 1558T and internal

phase compensation.

*In the 14-lead dual-in-line plastic package only.
·AII types in any package style can be operated over the temperature range of -55 to +125 0 C,
although the published limits for certain electrical specifications apply only over the tempera·
ture range of 0 to +70o C.

O'FSET NULL

I~~~T

-

NON -INV
INPUT

'1-

ORDERING INFORMATION
When ordering any of these types, it is important that the appropriate suffix letter for the
package required be affixed to the type number. For example: If a CA1458 in a straightlead TO·5 style package is desired, order CA1458T.

+

4

NC

'1+

6 OUTPUT

!5 °J'~~ET
TOP VIEW

le.-CA74ICE,CA74ICG,CA741E,

and CA741G with internal
phase compensation.

PACKAGE TYPE AND SUFFIX LETTER
TOP '11[*

T0-5
STYLE

Type No.
8L

PLASTIC

10L OIL-CAN

Gold-CHIP
Gold·
CHIP
PLASTIC
CHIP

8L

14L 8L

CAI458

T

S

E

G

CAl 558

T

S

E

G

CA741C

T

S

E

G

CA741

T

S

E

BEAMFIG. No.
LEAD
:~ 2!}---t---"'V

14L
H

GH

H

GH
L

G

T

E

G

CA747

T

E

G

T

S

E

G

CA748

T

S

E

G

::~fll

3

la, Ie

~i-:~~;I

!5

la, Ie

=;II~~

Ib, If

1~=~Tf81 .,}--+-~~/

Id,lh
Id,lh

CA747C

CA748C

OFfSET

14 NUll'''''

H

GH

Ib, If
H

GH

Ie, Ig
Ie, 19

6}--+---",!,OFfS£T

NUll IS)

If.-CA747CE,CA747CG,CA747E,

and CA747G with internal
phase compensation.

. . .ECOM·S. PHASE
:~[SET

COMP.

I~:~T

-

NON -IN\(
INPUT

+

'1-

'1+

6

4

OUTPUT
O:~~ET

TOP VIEW

Ig.-CA748CE,CA748CG,CA748E,

and CA748G with external
phase compensation.

OUTPUT (AI

I

7 OUTPUT fBI
INV

6

V-

INPUT IBI

~.i)-+---'
TOPVI[W

1h. -CA 1458E,CA 1458G,CA 1558E,

Fig.2-Schematic diagram of operational amplifier with external phase
compensation for CA748C and CA748.

and CA 1558G with internal
phase compensation.
Fig. 1 - Functional Diagrams (Cont'd)

____________________________________________________________________ 51

CA741, CA747, CA748, CA1458, CA1558 Types
ELECTRICAL CHARACTERISTICS
For Equipment Design
LIMITS

CHARACTERISTIC

Input Offset Voltage,
VIO

TEST CONDITIONS
Supply Voltage,
V+= 15V,
Ambient
V-=-15V
Temperature, TA

RS=<;;10kn

Input Offset Current,

UNITS

Min.

Typ.

25°C

-

2

6

Oto 70°C

-

-

7.5

25°C

-

20

200

o to 70°C

110

25 °c

Input Bias Current,
liB

CA741C
CA747C"
CA748C
CA1458*

o to 70°C

Input Resistance, RI

Max.
mV

-

-

300

-

BO

500

-

800

0.3

2

-

TIME-II'

nA

Fig.8-0utput voltage vs. transient response time for
CA741Cand CA741.

nA
Mn

INVERTING
INPUT

Open-Loop Differential
Voltage Gain, AOL

25°C

RL;;' 2 kn
Vo = ±10 V

20,000 200,000 OUTPUT

Oto 70°C

15,000

-

-

Common-Mode Input
Voltage Range, VICR

25°C

±12

±13

-

V

Common-Mode
RS';;;10kn
Rejection Ratio, CMRR

25°C

70

90

-

dB

Supply-Voltage
Rejection Ratio, PSRR

RS';;;10kn

25°C

-

30

RL;;' 10 kn

25°C

±12

±14

NON-INVERTING
INPUT

92CS-19424R2

150 IlV/v

CA747CE, CA747CG, CA747E, andCA747G.

25°C

±10

±13

o to 70°C

±10

±13

-

Supply Current, I±

25°C

2.8

mA

Device Dissipation, Po

-

1.7

25°C

85

mW

Output Voltage Swing,
VOPP

Fig.9- Voltage-offset null circuit for CA741C, CA741,

RL;;'2 kn

50

V
INVERTING
INPUT
OUTPUT

NON-INVERTING
INPUT

* Values apply for each section of the dual amplifiers.

ELECTRICAL CHARACTERISTICS
Typical Values Intended Only for Design Guidance
CHARACTERISTIC

TEST
CONDITIONS
V± = ±15 V

92CS-19425A2

TYP.
VALUES
ALL TYPES

Input Capacitance, CI

Fig.10-Voltage-offset nu/J circuit for CA748C and

UNITS
pF

1.4
)

Offset Voltage
Adjustment Range

±15

mV

Output Resistance, RO

75

n

Output Short-Circuit Current

25

mA

Transient Response:
Rise Time, tr
Overshoot
Slew Rate, SR:
Closed-loop
Open-Ioo~

CA748.

Unity gain
VI = 20 mV
RL = 2 kn
CL';;;100pF

RL;;' 2 kn

0.3

IlS

5

%

>-@_~r---,VOUT

92CS-15746

0.5

Fig. 11- Transient response test circuit for all types.

V/lls

40

... Open-loop slew rate applies only for types CA748C and CA748.

___________________________________________________________________ 53

CA1541D
y+·sy

ELECTRICAL CHARACTERISTICS
TEST CONDITIONS

SIOA

V·" SV. V-· -5V

CHARACTERISTICS

SYMBOLS

VTH

A~J.'

' ITA' 25°C

-5\1 '!:. ,"'.
(Term. 131
CEXT " 0.01 ",F

LIMITS

lun'a"
indicated
otherwise)

MIN.

UNITS

I TVP.

MAX.

l~O

180

Static IDCI Ch.8Cterittia
Power Dinipetion

Po

Input Offset Current

',0

Ir.oul Bi8sCurrent:
TA=25o C
TA'

25
liB

V5 •

55°C

VOH

Low

TA'"2SC'C
TA = 12SOC
StrObe Load Current

"A

v ••

V3'" V4

Output Voltage:
High

mW
"A

50

~

10M = 200 '-'A

V'4" 5 V,

350

VOL

'9= lOrnA

400

IS

V'2 = 0

1.5

'SR

V'2 '" 5V

'G

VlO '" V,1

'GR

VIO '" Vll ~ 5V

mV

Fig. 5 - Tnt circuit for measurementoflow (VOL) and
high (VOH) output voltage le.,l£

mA

Strobe Reverse Current:
TA=25o C

~le

Load Current

Input Gate Reverse Current
TA=250 C

"A

25

TA=l25 C
Input

mA

2.5

0

THRESHOLD
WAYEFDRMS

"A

25

TA = 125°C

OUTPUT
PUL.SE

Switchint CharKterilticl
TA=250 C
TA=

Input Gate Voltage:
High

Low

14

17

20

12

17

22

VTH

5510 125°C

Input Offset Voltage

V3

VGL

V4'" V6 '" 0

~

V5 = 25 mY.

Input Gate High
Input Gate Low

2"V~":~'

'IN

mV

IIA

I .•

AMPL.IFIER

OUTPUT

0.7

AT TERM. I

:!:l.S

AT TERM. 9

VCM

-

PROPAGATION
50%

DELAY
WAYEFORMS

~r-~y

-U-I~
Ov _
_ __

:!:1.5

Input Gate Low
Differential-Mode Range:

mV

V ,O
VGH

Common·Mode Range:

Input Gate High

'.v~

AT TERM 9 035y _ _-

Input Threshold Vollage:

,-

VOH

mV

.!.1.5

VOL

Propagation Delay:
InpullO Amplifier Output

'IA

V3

10

15

Input to Output

'10

V,2 = 2V

20

30

Strobe to Output

'SO

V3= V4= V5" V6'"O.
V 12 = 2V Ipulsed)

15

20

Gete Input to Amplifier Output

'GA

V,I = 2V (pulsed)

10

15

'GI

V3 = 25 mY

30

35

Gate Input to Amplifier Input
Common·Mode Recovery Time:
Input Gate High

teMR

~

25 mV Ipulsedl.

15

30

I.

30

V3~V5'"'·5V

Inpul Gate Low

NOTE I :YTH"

Differentlal·Mode
ReCO_IY Time:
Input Gate High

',.

iOO

NOTE 2: 52 IN ~a

30
'OR

WHEN 51 IN

V3" Y5 =400mV

~a"

S2 IN-b"
WHEN S2 IN -b-

Input Gate Low

Fig. 6 - Throrhold propagation deI.v, ,.",.nd input-of""t
telt circuit with 'lSOciared pul" MeW forms.

f

!:IC SUPPLY VOLTAGE tV+,VM'."'5 v
25 AMBIENT TEMPERATURE (TA'-25-C

/

E20"--f---l---+--+/--2o''---+-+----1
/
~

~

i

"•~

25
50
75
'00
AMBIENT TEMPERATURE ITAJ--C

Fig. 7. -Input VTH'" TA-

'"

"f--f---t-/-./'--t-/-t-....,--f---t----t---1
'Of---t-/-'--t--t--r-i--t--r-~
./

-3

-3.5

M"

-".5

-5

5.5

-6

-6.5

-7

Fig. 7b - Input VTH'" VTH (AOJ.J

-.

-".5

-5.5

NEGATIVE DC SUPPU VOLTS \VMI

THRESHOLD ADJUST VOLTAGE [VTH CADJ.J]-;~S_19l91

Fig. 7c -

I~put

VTH" V-.

__________________________________________________________

~--------55

CA2111AE, CA2111AQ
Features:

FM IF Amplifieri-Limiter and
Quadrature Detector

• Di......pIocoment for ULN2111A ond MC1357
• Good ••lill.ity: I.put Ilmlling "'''''110 Ik...1 1400
pY typo .. 10.7 MHz; Z50 pY typo ot 4.5 MHz
ond 6.5 MHzl
• Excollont AM ..joctl... 145 dB typo ot 10.7 MHzI
• Pro"ilion for output from 3-1t11g1t I F amplifier section

For FM I F and TV Sound I F Applications
The CA2111A. on a single monolithic chip, provides a multistage wideband amplifler·limlter, a quadrature detector, and an
emitter-follower output stage. This device is designed for use
in FM receivers and in the sound IF sections of TV receivers.
In addition, an output terminal is provided which allows the
use of the amplifier-limiter as a straight .60-d8 wideband
amplifier.

• low hermonic distanion
•

Quadrature detection permits simplified single-coil tuning

•

Extremely low AFC

•

Minimum number of external partJ required

.0.....

.'0.'

drift ewar full

apenfing-temper.tur. Nnll

Fig. '-Block diagrlJm of CA21 ',A lind
DSochlte(/ outm,.rd componeh.

The amplifi ..·limiter features the excellent limiting characteristics of 3 cascaded differential amplifiers.
The quadrature detector requires only one coli in the associated outboard circuit and therefore, tuning is a simple

MAXIMUM RATINGS. Abso/ute·M#Jlfimum V./U.SlJt TA-2!PC

procedure.
DC Supplv Voltage
(between terminals 13 IV+).nd 7 tV-I]

A unique feature of the CA2111A is its exceptionally low
AFC voltage drift over the full operating-temperature range.
This devi~ can be supplied in either dual-in-line or quad-in·
line 14·lead plastic packages (CA2111AE and CA2111AQ,
respectively).

UptoTA""eooe " ...... " .
AboveT A ..

LIMITS
MIN.

v+ ~ 12V

DC Yoltage:
At Terminal 1

.

V,

At Terminals 4, 5, 6, 10
At Terminals 2,12
DC Current linto Terminal 13)
AtY+' BY
AtY+ '12Y

1,3

Amplifier Input Resistance
Amplifier Input Capacitance
Detector Input Resistance
Detector Input Capacitance
Amplifier Output Resistance
Detector Output Resistance
De-Emphasis Retistance

R4
1"4
1"12
1"12
1"10
1
14

-

BY

V+- BY

Y4.5.6.10
V2.12

600

we

mW

mwre

derate linearly 8.7

-

MAX.

TVP.

-

5.4
3.7
. 1.35
3.5

-

-55 to +125
-66 to +150

·c
·c

+265

·c

-

-

7
11
70
2.7
60
200
B.B

At dinanca 1/18 ;t 1/32 in.
11.59;t O.79nwn)
from case fOflOs max. . ....

Y

-

14
16

fa' 10.7 MHz

Operatinll ..... ,
Stor.
lAad Temperature (During Soldering):

UNITS

TEST CONDITIONS

SVMBOL

V

Ambient T'mpIt'alur. Range:

ELECTRICAL CHARACTERISTICS ot T A • 25"C

CHARACTERISTIC

,.

Device Dinipelion:

mA

I.

50

~f.-... k'r

40

--.. ~
~.;

.0

b.:C"~

pF

n
n
kn

20

I II

"

........

Y
.. -

~.
. , . .. . ..
••

",ofl'

'''E~ SIG"olL ",,\11 ~~

--

0

_

~~~.('l1

lo···5MItI

kn
pF
kn

1J .L .

SUPPLY VOLTAGE !V"'oI2V
AMBIENT TEMPERATURE ITAI-2S"C
IOC)%FM,30'IoAM

-'j-

,

I
INPUT SIGNAL VOLTAGE: (Vjl-IIIV[rlll.]

,

"

DVNAMIC ELECTRICAL CHARACTERISTICS ot TA' 25°C
FM ModuIotion Frequency· 400 Hz, Sou,.. R._ • son
TEST CONDITIONS
CHARACTERISTIC

fa - 10.7 MHz
M' ± 75 KHz

SVMBOL

y+. 12Y

fa =4.5 MHz
ll(::

V'·SY

± 25 KHz

y+ '12Y

f o ' 5.5 MHz
[;f - ± 50 KHz

y+ =12V

Fig.

2 I-AM Mjft:tion vs Input voIr.,. (4.5 MHz).

Fig_

3-AM,.jectlon vsinputvo,.,. (5.SMHzJ.

TESTCIR·
CUlT OR
CHARACUNITS
TERISTIC
CURVES
FIG. NO.

LIMITS
TVP.

MAX.

TVP.

MAX.

TVP.

MAX.

TVP.

MAX.

VjUim)
(4)

400

600

400

600

250

400

250

400

Y
IRMS)

7,6,8,9

AM Rejection *

AMRllI

45

37

-

36

dB

2,7,5,6

Ampl. Voltage Gain.

AylIOI

55

-

55

-

• YoIAF)

0.48

-

0.3

-

AMPL·LlMITER

Input Limiting
Threshold Voltage

*

60

-

60

-

0.72

-

1.2

-

40

dB

7

DETECTOR

Recovered Audio*
Output Voltage
Total Harmonic*
Distortion
4v i .. 10 mV (AMS)

__

~

INPUT VOLTAGE IVjl-IIIV[rllllj

111
THOll)

1

-

1

-

1.5

-

3

-

Y
IRMS)

%

6.7,8,9

1

-100% FM. 30% AM

________________________________________________________________ 57

CA3000

DC Amplifier

HIGHLIGHTS
• Input IlIP8dance • • • • • • • •• 195 10
• Volt... Gain. • • • • • • • • •• 30 d8
• ~ Rejection R.tlo • ••
98 dB
• Input Off..t Volt.... • • • • •• 1.14- tN
• Pu.h-Pull Input and Output
• freqvenc,. Capabi lit,.
DC to 30 MHz (with external C and R)
• Wide AGe Range. • • • • • • • ••
90 dB

• Designed for use in Communication, Telemetry, Instrumentation, and
Oata-Process i ng Equ i pment

• Balanced differential-alllplifier configuration with controlled
constant-current source to provide Dutstand ing versat i I ity
• Bu i It- in temperature stab i I ity for ope rat ion from -55OC to +125OC

hI'.
typo
typo
typo

t,.,.

• Companion Application Note, ICAN 5030 "Applications of RCA CA3000
Integrated C i reu it DC Amp) i fier" covers character ist ies of different

operating lIodes, frequency considerations, 10 MHz narrow band
liaR)' other

APPLICATIONS

tuned amp1 ifier design, crystal oscillator deSign, and
.ppl ieat ion aids

• Sch.itt Trl,ger
• RC-ColI,led feedt.ack '.1'1 ifier

• 10-Lead hermetic TO-5 style package
ABSOLUTE·MAXIMUM VOLTAGE LIMITS

MAXIMUM POWER SUPPLY VOLTAGE ··160' ±S V

at TFA = 2S o C
-650C to +1250C
-650C to +150oC

OPERATING-TEMPERATURE AANGE
STORAGE·TEMPERATURE RANGE

LEAD·TEMPERATURE (During Soldering):
At distance 1116± t/32 Inch 11.59 ±O.19 mm)

from case for 10 seconds max. .

.

.

.

.... V
MAXIMUM SINGLE·ENDED INPUT-SIGNAL VOLTAGE
MAXIMUM COMMON.MODE INPUT-SIGNAL VOLTAGE
. ±:IV
MAXIMUM DEVICE DISSIPATION:
From -550C to BSoC. • . • • • • . • . •
460 mW
Above S50C . • . . . . • . . . • Derate 5 mWflC

•
•
•
•

MI.er
COMparator
Modulator
Cry.tal Oscillator
• Sense AIIIPI ifler

ELECTRICAL CHARACTERISTICS, at TrA = 25"C, Va:; = +6V, VEE = -6V, unle .. otherwi.e opecilied
·LIMITS
SPECIAL TEST COIIOITliIIIS
SlMIIOLS

CHARACTER I ST! CS

Tertlina1, Mo.14- & Mo.5 "ot
Connected Unless Specified

TEST
CIRCUITS

TYPE
CA3000
Mln.JTrp,

Fie.

MIx.

STATIC CHARACTERISTICS
Input Offset Volt.

VIO

Input Offset CUrrent

110

-

-

lIB

Input Bias Current

V'

TYPICAL
CIWIACTERISTICS
CIIIVES

Units

Fig.

..,

2

I.'
1.2

5
10

,J.

2

23

36

,J.

3

TERMINALS
~

5

Me

VIO

NC,
VEE
VEE

NC
VEE
NC
VEE

Po

NC.

Me

V8

Quiescent Operating
Voltage

or

Device Dissipation

--

-

----

2.6
'.2
-1.5
0.6
30

OYIIAMIC CHARACTERISTICS
Differential Voltage Gain
Single-Ended Input

AOIFF

Bandwidth at -3 dB Point

BW

Single-Ended Output f .. I kHz
Double-Ended Output f = I kHz

28

6

32

4

V
V
V

4
4

lflii

IIOIIE

dB
dB
kHz

5

yep-PI

NiIIIE

dB

8

n

'0

12

Vour(P-P)

f = I kHz

6

-

CMRR

f· I kHz

9

70

98

Single-Ended Input
Impedance

liN

f· I kHz

11

7011

I95K

-

Single-Ended Output
Impedance

lOUT

f·1 kHz

13

5.5K

8K

10.5K

n

Total Harmonic Distortion

THO

-

0.2

5

%

AGe Range (Max jaum Vol tage
Ga in to Complete Cutoff)

AGe

SO

90

-

dB

MaximUM Output Voltage
Swing
COIIIJIOn-Mode Rejection
Ratio

6

V I -10mV, Rs-1 kG

AS·lkf! f ' l kHz VO-42Vp- p
f = 11kHz

15

38

&SO
6.~

4

2.8K

Re

D,

0,

--

R"

5
7
Rliistance values 0'" in ohms

Fie.1 SCHEMATtC DIAGRAM

"

NiIIIE

STATIC CHARACTERISTICS FOR TYPE CA3000

INPUT OFFSET VOLTAGE AND CURRENT V$ TEMPERATURE
POSITIVE DC SUPPLY VOL.TS (\Iccl- +6
NEGATIVE DC SUPPl.Y '\IOLTS tVEE). - I

INPUT BIAS CIIIlRUT

VI

QUIESCEMT OPERATING VOLTAGE

TEMPERATURE

VI

TEMPERATURE

OSI IVE OC SUPPLY VOLTS tVCC)- +6
EGAT1VE OC SUPPLY VOLTS I" l - -

POSITIVE DC SUPPLY VOLTS t'tec;' +1
NEGATIVE DC SUPPLY '\IOLTS IVEE) - - I

o.

o
-75

-~

-~

U

!50

AMBIENT TEMPERATURE tTA

15
100
l--C

12!i

-15

-50

-25

"

00

AMBIENT TEMPERATURE: tTA

15
100
J--C

125

."

-,g

-25

25

AM81~T TE"MPiRATURE ITA

75

100

125

I--C

Fig,~
Fig.2
Flg.S
______________________________________________________________________
59

CA3001

Video and Wideband Amplifier

HIGHLIGHTS

.P ...... P.II I.p.' & Output
60 .B ..,.

o4GC Ro.., • . . . . . . . . .

• De,ip_ lor ••• III Vi .... Sr.'''' ••4 CotI",unlcotlon 1 ... I,...ont
• 1.lanced tI'He,.",I.1 ....,Ufl.r cHfI.u,.,l_ w.tII c••,,.II., Con.Mllt-CU'''''' .oure.
'rOYi .... DU......4,", .,." ..IIIt)'
•••IIt-in
a.llill" hlr .,.mlo....... ~55OC to +12SOC

• ... oIwhltlo •••••••.•••
2'MH•
01.,.. R.,lstanc•...... l50kO ..,.
oOutput R.II,taneo ..•..
45 0 ..,.
19 dB .., •

• Volte,. Goln ....•.•..

teMperat.,.

olnpu' OH.., V.lta,•.••. I.S ..V .., •

• E.IIte, WI"or In,.t & output
APPLICATIONS

oC..,..,... Application Note fCAN5038 -Applicllfi•••f tho RCA·CA3001 In.........
Circuit VI'" A""Ufio,·, co.a, ••IHere.' ."""'" _ ••, •• In eM.,.I, .i.tertlo.,
Iwl ... c.,.I.Ulty, 3 .toto ••,lIflo, .... lln,." a Sch.ltt ttl ..., • ...,.

-SchMitt Tri"o,
o Mi ••r

oDC, IF. &
Vid..

aWulotor

·12-Lead Hermetic TO-S Style Package

AMplifi.r

-,

-'0

ABSOLUTE-MAXIMUM VOLTAGE AHO CURREHT LIMITS ot TA = 2SoC
Indicated voltlll8 or current limit. tor each terminal can be applied under the _pacified conditioD8 for other terminal•.
All Voltqe. are with respect to around (common tannina1 of Positive BDd Ne.ati'V. DC Supplies).

TERMINAL

VOLTAGE OR
CURRENT ~IMITS
NEGATIVE

I

2

3

CONDITIONS

POSITIVE TERMINAL

-2.5

+I!o5

0

·8.5

·10

0

2.6
3.10

-6

9

'6

1.6

0

-6.5

1.2.6
9

5

6

·8.5

"'

•
"'0

1.2.6
9

10

·6
0

0

1.2.6
3.10

-6

9

'6

1.2
3.10

0

9

2S mA

0

9

10

·10

1,2,6,10

0

S

1.2.6

"'0

3
9

'6

0

'6

25

11

"'

9
<6
200-fl RESISTOR
CONNECTED BElWEEN
TERMINALSNo.S & No.1

'10

-6

1,2.6.10
0
3
9
'6
200-0 RESISTOR

"'

mA

...,..,

CONNECTED BETWEEN
TERMINAUNo.IO&No.l1

"'

<6

00 NOT USE

F;,.2 - 'npllt o'''.t voltap ami curren' VS. temperature.

INTERNAL CONNECTION
00 NOT USE

12

INTERNAL CONNECTION

7

0

1.2.6.10
3

<6

Fi,.r - Sc......flc DIG..,....

VO~TAGE

NEGATIVE POSITIVE TERMINAL

8

'"

CONDITIONS

<6

0

·>2.5

-2.5

TERMINAL

Allresl.tors
ae in ohms.

2.211

*lntem.1 CoMlCtion - DO NOT USE

VOLTAGE OR
CURRENT ~IMITS

0

3.10
9

10
4

VO~TAGE

.,..-"

INTERNALLY CONNECTEO TO TERMINAL No.3

CASE

(SUBSTRATE)

I
POSITJY£ DC SUPPlY YOLTS 1VCC)-+6
NEGATIVE DC SUPPLY VOLTS {VEEI--&

00 NOT GROUNO

'"
OPERATING TEMPERATURE RANGE ..... .

·SSoC to t 12SoC

STORAGE TEMPERATURE RANGE

_65°C to tlSOoC

...... .

LEAD TEMPERATURE (During Soldering):
At distance 1/16 ± 1/32 inch (1.59 ± O.79mm)
from case for 10 seconds max. . ............. .
MAXIMUM SINGLE-ENDED INPUT·SIGNAL VOLTAGE ..

t26SoC

~ 10

±4V

MAXIMUM COMMON·MODE INPUT·SIGNAL VOLTAGE

±2.S V

i

MAXIMUM DEVICE DISSIPATION:

--nl

4S0mW
Derate linearly 5 mWJoe

·SS to 8SoC

Above 8S oe

................................................ .

~

·215
0
7S
AMBIENT TEMPERATUftf (TAI-·C

Fig.3 a Input 6;0. cu"ent vs. temperature.

POSITIVE oc SUPPLY VOLTS c"tcl'+f!I
NEGATIVE DC SUPPLY VOLTSCV[eI.-6

I

I 110
~

0

~»

4

MOOED

il

i~=
~~

EC

MOOED

2

i:>-

u- ,

i -,.
0

-50

-25

.

50

,.

MODE •
100

'25

0.' Yo/Ia". YO. ",,.,..,.Iure.

Fig. 4 - O.'p.' off

Fig. 5 Qu;escent operating voltage
a

¥s.

-50-250

n

50

1S

12.

AfMIENT TEMPERATURE (TAI--C

AMIIENT TEMPERATURE (TA )-'"C

temperoture.

Fig. 6 • Dev;ce Jiss;pat;on vs. temperature.

____________________________________________________________________ 61

CA3001
Iro' lIt-lei
11,1+1161

Vee
+6v

I.

Ad,.'"

VB fOl' VOVT(DC) =0 to.1 v
' ..... off•• t won ... (VIO) III mV ••

Vee

"cc

.6V

'BV

"'--z-

2..........

VB

V.

'" Separate tuned input circuits are used for 1.75 MHz and 11.7 MHz.
Source-resistance matching taps adjusled wilt! clte:"I! tuned to
resonance .,d with 5O-ohm reSistor connected to simulate

92(;S-15581

and ...c=ard

vw-iOOO

Fig. 13 .. Input oR.. , cutrent and input "ias current

noise diode.

tes' circuit.

Fig. 14 .. Hoise li9ur. fest circuit.

Fig. 12 .. Input oHs.f vo/to,. f.s' circuit.

37-250

"
OSCIl.LOSCOPE

WITH HIGH- GAIN
DIFFERENTIAL.
INPUT
ITEKTRONIX TYPE
510. 5"0. OR 580
____- " " " - - , WITH TYPED "L.UG-IN
TEKTRONIX TYPE 502,

OR

EQUIVALENTI

CONMC)t.I-MODE REJECTION RATIO

CMR-ZO LOG'OI"i~~:~:,31
- .. -SINGLE-ENDED VOLTAGE

GAIN

AGe RANGE: 20 L.OG

A WITH S IN POSITION X
10 A "fIIITH S IN POSITION Y

Fig. 15 .. Common-moJe rejedion ratio 1851 c/rcuil.

Fig. 16 .. AGe range test circuit.

._ _ _ _ 63

CA3002
ELECTRICAL CHARACTERISTICS, at T A. = 25·C VCC = i6 V. VEE =·6 V

POSITIVE OC SUPPLY VOLTS (Vce'· +S
NEGATIVE DC SUPPLY VOLTS tvEE"-6
.,.IENT TEMPERATUR£ ITA,-25·C
FREQUENCY If I • l.nI MHr

LIMITS

CHARACTERISTICS

SYMBOLS

TYPICAL
SPECIAL TEST CONDITIONS
TEST
CHARAC·
TERMINALS No.3 & No.4
CIRCUITS
CA3002
TERISTICS
NOT CONNECTED
CURVES
UNLESS OTHERWISE NOTED
Fig.
Fig.
Min. I Typ. Max. I Units

,
!
!

10

STATIC CHARACTERISTICS:
'"put Offset Voltage

VIO

Input Unbalance Current

lru

Input Bias Current

•

I)

MODE

Voltap

Device DiSSipation

2

10

p.A

2

2Q

36

p.A

3

TERMINAL

2~

t).Iiescent Opecatina

mV

2.2
2.2

1000
1000
'00
SOURCE RESISTANCE (R,I- A

•

A

VEEJ

HC

2.8

V

B

VEEJ

VEE

3.9

V

SS

mW

PT

•
•

2000

Fig. 7 -- Hoise figur. vs source resistance.

N....

Vee

.6v

DYNAMIC CHARACTER~TICS:
Differential Volta.. Gain

VIN= 10mV

(Single-Ended Input
and Output)

ADIFF

f .. 1.75 MHz

BW

As" son. VIN" 10mV

Bandwidth at ·3 dB Point
Maximum Output Voltaae SWine

19

VouT(p·PI

Noise FIII...e

2.

da

5 &.5

As-son

NF

f

= 1.75 MHz RS = 1 k.O.

11

MHz

6

5.5

Vp.p

None

d8

1

B

•

8

Input Impedance Compol18flts:

Parallel Input Resistance

RIN

f" 1.15 MHz

Non.

lOOk

n

Noo.

Par.llel Input Capacitate.

• CIN

f = 1.75 MHz

Non•

OF

No..

ROUT

f = 1.75 MHz

Ie

•
70

n

9a& 9b

.!:s
~e::=: =dl~M=:'V=~ ~'re~s~
connected to slmulat. the noise diode.

AGC

t .. 1.75 MHz

13

60

dB

12

Fig. 8 - Hoise figure.

Output Resistance

AGe Ran .. (Maximum Voltage
Gain to Complete Cutoff

POSITIVE DC SUPPLY VOL.TS IVccl' +6
NEGATIVE DC SUPPL'Y \lO\..T$ (VEE}

a

-~

-25

2!1

POSITIVE DC SUPPLY VOLTS tyee'- .1
NEGATIVE DC SUPPLY VOLTSIVEE)--.
FREQUENCY' It) • 1.75 MHr
INPUT AOolUSTED FOrt
OROlR.HMMDNIC 1
~o dB B£LOW FUNDAMENTAL.

POSITIVE DC SUPPLY VOLTS lVee)- +S
NE6ATIVE DC SUPPLY VOLTS 1Vn" -I

-6

AMIIE:NT TEMPERATURE IT" ,-n"c

FRECUENC'Y If) • 1.75 101HZ

-75

60

=:-:.

50

."

100

'"

Fig. 9B • Output ru; stance vs temp.ratur•.

10

VEE
-6V

,I'd

15
20
2'
FR£OlJ(NCY IfI-Wiz

100

Fig. 9b. Output reaisfanc. vs frequency.

12.

Fig_ 10-lnput/weI for - 30 dB intsrmodulBtion
w. temptHatunl

II IVE C SUP LY VOLTS lVee'. +S
MUATIVE DC SUPPLY VOt..TS tVEElo - .
aa.lENl TlMf'UAT\IRE ITA' -,15-c

1)

Increase both input......... toMS until tha 2fJ-n and 211-12 outputlignal voltegn an 30 dB below tha '1 and '2 outpUt..ign81 vol~_
"01.....

2) M......n rms v"u. of tha Input and output

Ii..,

3) The m....nd input Ii...' volt... is that ,,"ua wilen .... 3nI-harmonic intermodulatia" products an 30 dB below the fundamen-

... ""......

Fig. 17 • Intermodulation Test Circuit.

1015202S50
I'1t£QU1"NCY CfI- .....

Fig. 12· AGe range vs frequency.

1) Set Ittenuator at 80 dB attenuation.
2) Sel v.lable de supply '101_ at 0 V.
Inctl.... lanll Inpulvolta.. untll RF V.T.V.M. indicates SIIIV
output.
4) Set _iable de supply volta.. .t -6 V•
5) Adjust attenu.r until RF V.T.V.M. qaln indicates 5 mV output.
6) Ch ..p in attenuator seninl in dB Is
AGe Ran...
3)

tot.,

FIg. 13· AGe ""'ge.

-------------------------------------------------------------~

CA3004
INPUT OFFSET VOLTAGE TEST CIRCUIT

ELECTRICAL CHARACTERISTICS, at TFA = 25° e, Vee = i6V, VEE = -6 V unless otherwise specified
LIMITS
CHARACTERISTICS

SYMBOLS

SPECIAL TEST CONDITIONS
Terminals No.4 and NO.5 Open
Unless Otherwise Specified

TEST
CIRCUIT
Fig.

TYPE
CA1I04
Min.

I

Typ.

Max.

I

Units

TYPICAL
CHARA(}
TERISTICS
CURVES
Fig.

STATIC CHARACTERISTICS
Input Offset Voltage

VIO

Fig.4

Input Offset CUrrent

110

FI&-5

Input Bias Current

II

Fig.5

-

-

mV

FII.2

40

""""

FII.2

Fia.6

1.7

5

0.125

5

21

TERMINALS

19

Quiescent

or

Operating
Current

III

Quiescent Operating

Current RatiO

I. ADJUST RI FOR VO UT-O:6:o.IV
2. RECORO VIO

-6V
VEE

4

5

NC

NC

Flg.8

VEE

NC

NC

VEE

VEE

VEE

I

-

mA

fig.8

-

2.7

Fil.6

-

0.145

mA

Fig.6

Fig.8

-

1..25

mA

Fia.6

INPUT OFFSET CURRENT AND BIAS CURRENT

1.1

-

mA

Fla.8

-

FIg.7

-

TEST CIRCUIT
Vee

mW

NONE

-

d8

Fi e.9

9

d8

Fig..)O

CURR£NT 1Xxo)oolX12 -

d8

FI&.12

~::E:~~IIJ·~

d8

NONE

"/lll

Fi a.8

PT

Flg.S

10

Device Di ssipatlon

FI&.3

26

Fig."

+IV

DYNAMIC CHARACTERISTICS
Power Gain

Gp

f = 100 Me/s

Fil.11

Noise Figure

NF

f = 100 Me/s

FI&.11

-

..,

(lIIR

f '" 1 Kc/s

Fig. 13

-

98

AGe

f = 1.75 Mc/s

FIg.14

-60

-

COmmOfl Mode
Rejection Ratio

AGe Ranee (Max. Voltage
Gain to COmplete Cutoff)

12

-

WPUT OFfSET

:r,,1

DEFINITIONS OF TERMS
Input Offset Voltag.

Powe,.Gain

The difference In the lie voltaps which must be applied 10 the input
terminals to obtain equal quiescent ope,atinl voltages (zero output
offset voltale) at the output terminals.

The ratio of the signal power developed at the output of the device
to the signal power applied to the input, expressed in dB.

Input Offset Current

The ratio of the total noise power of the device and a ,esistive
signal source to the noise power of. the sienal !IIoUlce alone, the
signal source representinl a generator of zero Impedance in series
with the source resistance.

The difference in the currents at the two input terminals when the
quiescent operatinl voltqes at the two output terminals are equal.

Noise Figur.
QUIESCENT OPERATING CURRENT VS TEMPERATURE

Common-Mode Rejection Rafio

Input BiGS Cu,rent
The average value (one4talf the sum) of the cunents at the two
input terminals when the quiescent operatina voltaps at the two
output terminals are equal.

Quiescenf Operating Current
The average (de) value of

Fig.5

t~e

cunent in either output terminal.

The ratio of the full differential voltage lain to the common-mode
vcltaae gain.

Common·Mode Voltage Gain
The ratio of the signal voltaps lY VOI...TS (VEE'

DO NOT APPLY VOLTAGE FROM AN EX·
TERNAL SOURCE TO THIS TERMINAL

II

DO NOT APPLY VOLTAGE FROM AN EXTERNAL SOURCE TO THIS TERMINAL

oV

oV

10

125

INPUT BIAS CURRENT

·12

NO CONNECTION

4
10

100

Flg.2

2
13

1
10

OV

7S

AMBIENT TEtoFERATUFIE (TA1-"C

DO NOT APPLY VOLTAGE FROM AN EX·
TERNAL SOURCE TO THIS TERMINAL

30 mA

INPlJT OffSET VOLTA.GE

12
·12

NO CONNECTION

+7 V

11.25

NO CONNECTION

2
13

I

10

I: ll; J ,:

12

"!

DO NOT APPLY VOLTAGE FROM AN EXTERNAL 50URCE TO THIS TERMINAL

oV

POSITIVE DC SUPPLY VOLTS (Ved
NfGATlVE OC SuPPLY VOLTS (YEE)

>.

CA3016A
CA3030A
CA3015A CA3038A

NO CONNECTION

oV

IVoltage

Terminal

CA3008A
CA3029A
CA3010A CA3037A

8V

INPUT OFFSET VOL TAGE AND CURRENT

Posi·

11

oV

14

+20 V

Fig.3

1
4
10

.14 V

1
5
13

INPUT OFFSET VOL TAGE, INPUT OFFSET VOLTAGE
SENSITIVITY, AND DEVICE DISSIPATION TEST CIRCUIT

Ifltemally connected to Terminal No.4,
CA301SA (Substrate) DO NOT GROUND

CASE

CAJOO8A CAJ01OJ.
CAJ016A CAJ015A CA3029A
CA3037A CAJOleA CAJOJOJ.

CA3016A CAJOl5A CA3OO8A CA3010A
CAJOOOA CA3038A CA3029A CA3037A
·8Vlo+l V ·4Vlo +1 V
STORAGE TEMPERATURE RANGE, , , , ,55°C 10 .2000C ·55 0C to '150 0 C MAXIMUM DEVICE DISSIPATION,
600 mW 300 mW

OPERATING TEMPERATURE RANGE

e

. '55 0 C to +125 0

40°C 10 -IBOoe

MAXIMUM SIGNAL VOLTAGE

Flg.4
Proc:edure:
Input Offlet Voltage

1. Adjust Ve for a DC Output Voltage (VOUT) of 0 ± 0.1 volts.
2. Measure VE and record Input Offset VOltaie in millivolts as
VE/lOOO.
INPUT OFFSET CURRENT AND INPUT BIAS CURRENT
TEST CIRCUIT

Input Offs.t Voltage Sensitivity

1. Adjust Vi for a DC Output Voltage (VOUT ) of 0 ± 0.1 volts.
2. Increase Vce by 1 volt and record output volta,e (VOUT).

I

I
!

3. Decrease Vce by 1 volt and record output \loltall8 (VOUT).
4. Divide the diference between VOUT measured in steps 2 and3bythe
change In Vce in steps 2 and 3,
VOUT " VOUT (Step 2) • VOUT (Step 3)

Proc:edl,lre:
Input Bios Current and Input Offset Current

I

I

1. Adjust VE for VOUT < 0.1 V DC.

Gain (AOU.

2. Measure and record VE and VIN4

3. Calculate the Input Bias Cuuent usin, the followin, equation:

114=~
100 kil

4, Calculate the Input Offset Current using the followin, equation:

Fig.S

2 volts

Vcc

5. Refer the reading to the input by divldin, by Open Loop Voltap

110 "VE/lOO kO

VOUT/VCC
VloNcc

0

- - -

ADL

6. Repeat procedures 1 throu,h 5 for the Negative Supply (VEE).
7. Device Dissipation
PT '" VCCIC + VEEIE
IC '" Direct Current into Terminal 13 or
IE '" Direct Current out of Terminal 6 or

!ill
0

___________________________________________________________________ 79

CA3008A, CA3010A, CA3015A, CA3016A, CA3029A,
CA3030A, CA3037A,CA3038A
COMMON·MODE REJECTION RATIO vs. FREQUENCY

""

10
FREQUENCY tfl-MHI:

Flg.12

SINGLE.ENDED INPUT IMPEDANCE

"s.

TEMPERATURE

SINGLE·ENDED INPUT IMPEDANCE TEST CIRCUIT

vee

POSITIVE DC SLPPU' VOLTS tVeC!
N(GATIVE DC SUPf'LY VOLTS tval

-15

..

-50

Flg.U

Flg.13

OUTPUT IMPEDANCE TEST CIRCUIT

vee

1. With 52 in position (e). adjust VE fOl VounDC) "" 0 ± 0.1 volt.
2. With 51 In position (aI, and 52 in position (d). record VOUTt(,ms).
3. With Switch 51 in position (b) and 52 in posltiQn (d) adjust RL II1tll
Flg.15

VOUT2(rms) =

POSITIVE DC SUPf"LY VOLTS Ned

~
2

Record value of RL as ZOUT.

NOISE FIGURE vs. FREQUENCY

NEGATIVE DC SUPPLY VOLTS tV[El

POStTf\lf DC SUPPLY VOlTS tVee!
NEGATIVE DC SUPPLY VOlTS IVEE)

SOURCE RESISTANCE" I I( OtiM
20

i~
•
I"

-7\1

-25

25
AMBIENT

50

TEl,lP£RA~

."

100

125

tTAJ-·C
6

OUTPUT IMPEDANCE va. TEMPERATURE

Fig.16

8 1000

FREQUENCY !fI-Hz

FIII.17

___________________________________________________________________ 81

CA3011, CA3012
DISSIPATIDH TEST SETUP

ELECTRICAL CHARACTERISTICS
CHARACTERISTICS

TEST CONDITIONS
LIMITS
DC
AMBIENT
SETUP FREQUENCY SUPPLY TEMPERA·
RCA
RCA
SYMBOL
&
CA301I
CA3012
VOLTAGE TURE
PROCEDURE
f
VCC
TA
Fig.
Volts
Mel.
°c Min. Typ. Max Min. Typ. Max.
·55
80
66 80 135
<25
6
60 90 133 66 90 121
+125
70
65 70 121
·55
130
97 130 190
6
PT
+25
7.5
95 120 187 97 120 167
+125
\00
95 100 167
·55
150 210 275
+25
10
150 190 255
+125
150 160 255
·55
55
50 55
+25
6
60 66 - 60 66 9
1
+125
61
50 61 ·55
59 - 55 59 9
7.5
<25
65 70
65 70
1
A
+125
55 65
- 65
55 61
·55
+25
65 71
10
9
1
+125
55 66
7.5
+25
4.5
60 67 - 60 67
9
+25
10.7
7.5
55 61
55 61

-

-

Tot,l
Device
Dissipation·

Volt..! Gain··

-

-

-

-

'-

-

- - - - - - - - -

-

-

-

Input·lmpedance
Co_nts:
Parallel Input
Resistance
Parallel Input
Capaci tance
Output Impedance
Com_ts:
Parallel Output
Resistance
Parallel Output
Capacitll'lce

R'N

7

4.5

7.5

+25

-

3

-

-

3

CIN

'1

4.5

7.5

+25

-

7

-

-

7

ROUT

8

4.5

7.5

+25

-

31.5

-

- 31.5

COUT

8

4.5

7.5

+25

Noise Filllre

NF

10

4.5

7.5

+25

Input Limiting
Voltage (Knee)

Vi(lim)

9

4.5

7.5

<25

+~c

TYPICAL
CHARACTERISTICS
UNITS CURVES

50

A

~
mW
mW
mW
mW
mW
mW
mW
mW
mW
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB

TOT&I... DEVfCE DISSIPATION IPTI-VccJ:
ncs-IS112

Fig. 6

INPUT-IMPEDANCE COMPONENTS

TEST SETUP

5

-

kO

2

pF

2

-

kO

3

pF

3

Fig. 7

OUTPUT-IMPEDANCE COMPONENTS

- 4.2 - - 4.2
- 8.7 - - 8.7 -

300 45

- 300

4IJ(

TEST SETUP

dB

JJ.V
Fig. 8

MOISE FIGURE TEST SETUP

VOL T AGE·GAIN TEST SETUP
PROCEOURES

+Vcc

A - Volt. Gain:
1) Set Input "equency at desired value,

VI

=100 iN rml.

2) ReCOI'd vo3) Calculate Voltap Gain A "om

A = 20 10110 Yo/v I
4) Repeat Steps 1. 2. and 3 far each
ftequency and/or fo. lemp.atur. desired.
B - Input Limltln. Voltqe (Knee):

I} Repeat Steps At and A2. uslna
v,=l00mV
2} Decrease Y I to the level at which Yo

..

Is 3 dB below its value for vi:: 100 mY.

3) Recard VI as Input Llmitln. Volta..
(""

Fig. 9

).

Ll '" 82 ~, center-tapped
L2 '" 2.36~
Cl,C2 = Alco TYPe 423 padder, 01 e~ivalent

Fig. 70

_____________________________________________________________ 83

CA3013, CA3014
VOL TAGE·GAIN TEST SETUP

TEST CONDITIONS
ELECTRICAL
DC
AMBIENT
SETUP FREQUENCY SUPPLY TEMPERA·
CHARACTERISTICS
RCA
SYMBOLS
&
CA3013
(See Page 8 for
VOLTAGE TURE
PROCEDURE
Definitions 01 Terms)
TA
VCC
volls .
Fig.
Mel.
°c Min. Typ. Max.
·55
80
+25
6
60 90 133
3
+125
70
Total
·55
130
+25
Device
PT
3
7.5
87 110 187
Dissipation •
+115
100
·55
10
+15
3
~
+125·
55
·55
6
+25
60 66
4
1
+115
61
·55
59
7.5
+15
65 70
4
1
+125
65
Voltage Gain **
A
·55
4
1
10
.z5
+115
4.5
7.5
+25
60 67
4
10.7
+15
7.5
55 60
Input·lmpedance
Components:
Parallel Input
4.5
7.5
+15
3
6
RIN
Resistance

LIMITS
RCA
CA3014

,

--

-

-----

Parallel Input
Capacitance
Output·lmpedance
Components:
Parallel Output

CIN

6

4.5

7.5

+15

-

7

--

3
7

-

- 31.5 - - 31.5 - 4.1 - - 4.1 - 8.7 - - 8.7 -

8

4.5

7.5

+15

Parallel Output
Capacitance

COUT

8

4.5

7.5

+15

NF

10

4.5

7.5

.z5

Input Limiting
Voltage (Knee)

vi (lim)

14

4.5

7.5

+15

-

Recovered AF Vollage

vo(a')

14

4.5

6
7.5
10

+15
.z5
.z5

155
128 188

Amplitu.e-Modulation
Rejection

AMR

15

4.5

7.5

+15

RO(disc)

-

4.5

7.5

+25

THO

14

4.5

7.5

Output Resistance
Total Harmonic
Distortion

-

~
mW
mW
mW
mW
mW
mW
oW
mW
mW
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB

PROCEDURE:
1) Set input frequency at desired value, Vi = 100 JJ.V rml.
2) Record '10'
3) calculate Voltll' Gain A from A ::: 20 10110 vo/vi'
4) Repeat steps I, 2, and 3 for each frequency

and/or temperllure desired.

Fig. 4
VOLTAGE GAIN v •• FREQUENCY

5

kn

7

pF

7

~:~
70

•

I ..

~

i ..
~

..

e

ROUT

Discriminator

-------

-

Resistance

Noise Figure

Min. Typ. Max.
12t1
llO
llO
170
150
90 100 150
165 110 250
165 190 230
150 160 130
50 55
60 66
50 61
55 59
65 70
55 65
55 61
65 71
55 66
60 67
55 60

- 7373 9080
-- 10660 13070
106 120

--- ------ - ---

+Vee

TYPICAL
CHARAC·
TERISTICS
UNITS CURVES

• Total CUlrent dram may be determined by dlV'ldlnl

P-r.by Vee.

+15

300 450

-

-

-

-

1.8

9

pF

9

dB

11

~V

13

-

mV
mV
mV

13

60

-

n

-

1.8

-

%

12

300 400

-

155
135 188
12t1

- - 50 - - 60 - -

-

-

- -

••

kn

50

QI

'"

r\

. . .. . . .. . .
10

I
FREQUENCY CU- Mch

. Fig. 5

INPUT.IMPEDANCE COMPONENTS TEST SETUP

dB

+ Vee

•• Recommended minimum de supply volt... (Vee) IS S.5 V•
Nomln.lload cullent tI~nl into terminal 5.s 1.S rnA at 1.5 V.

Fig. 6
INPUT·IMPeDANCE COMPONENTS n. FREQUENCY

OUTPUT-IMPEDANCE COMPONENTS

¥s.

FREQUENCY

OUTPUT·IMPEDANCE COMPONENTS TEST SETUP

+Vee

Fig. 7

Fig. 8

RIEQlENCY It) _ Mcll

Fig. 9

85

CA3018, CA3018A

General-Purpose
Transistor Arrays

FEATURES

~

• Match.d monolithic ljIeneral purpou kansl_tors
• HFE match.d ~ 10%

TWO ISOLATED TRANSISTORS
AND A DARLINGTON·CONNECTED
TRANSISTOR PAIR

• YBE matched ~ 2 mY CA3018A (t smY CA3018)
• Operation from DC to 120 MH.

• Wiel. operating current range
• CA3018A. p.rformonc. characteristics controlle4
from 10~ A fa 10mA

For Low·Power ApplicatiDRS
at Frequencies from DC

•

1 Fo'

Law noi .. flgur. - . 3.2 elB typical at I KH.

• Full military temper.tur. ran,. capollility
(-55 to "" 125°C)

Through lbe VHF Rallle

°' 7'=

• The CA3018 is available in a sealed·junction
Beam Lead version (CA3018L). For further
information see File No. 515, "Beam·Lead
Devices for Hvbrid Circuit Applications".

The CA30lS and CA3018A consist of four general purpose silicon n-~n transistors on a common monolithic
substrate.

SUBSTRATE

00

Fif. ,. Sclte... "'ic Di09"'''' fa, CAJOl8 and CAJOl8A

• Supplied in the hermetic 12-lead TO-5
stvle package.

Two of the four transistors are connected in the
Darlington~configuration.
The substrate is connected
to a separate terminal fot maximum flexibility.

L

Maximum Ratings, Absolute-Maximum Val u.s, at TA-2SO'C

The transistors of the CA3018 and the CA3018A are

Power Dissipation. P:
Any ooe transistor . • • . . • • . •
Total package. . . • . . . • • • . •
Derate at 5 mW;oC {or T A> 85°C
Temperature Range:

well suited to a wide variety of applications in lowpower systems in the DC through VHF range. They

may be used as discrete transistors in conventional
circuits but in addition they provide the advantages
of close electrical and thermal matching inherent in
integrated circuit construction.

CA3018

CA3011A

300
450

STATIC CHARACTERISTICS

300
450

mW
mW

IO"'!

[MITTER CURMNT a

J-O

Operating. • • • . • • • • • • . . •. -55 to + 125 e55 to + 12SoC

Storage •.•.•••.•••..•••• e65 to + 150 e65 to + ISo-°C

The CA3018A is similar to the CA30IS but features
tighter control of current gain, leakage, and offset
parameters making it suitable for more critical applications requiring premium performance.

LEAD TEMPERATURE (During Soldering)
At distance 1/16 t Ill:! inch (1.59 ± O.79mm)
from case for 10 seconds max.

APPLICATIONS

. .. +265 0 r

The followina: raUngs apply for each transistor in the device:

• General use in signal proceninljl sYltems in DC
thrauljlh VH F range
.

CA3018
Col1ector-t..Emitter Voltase.VCEO'
Collector-ta-ease Voltap. VCDO ••

• CUltam designed differential amplifiers
• Temperature campensated amplifiers
• See RCA Application Nate, ICAN-s296 "Application
of the RCA CA3018 Integrat.d·Circuit Trans.is.tor
Arroy" for Iuggested Applications.

CA301U

15
20

15
30

V
V

Collector-la-Substrate Voltage, VCIO. 20

40

Emitter-ta-Base Voltaa;e, VESO ••.
Collector CUrreot, IC •••••• . • ••

5
50

V
V
mA

5
50

"'The collector of each transIstor of the CA3018 and CA3018A
is laolated from the substrate by .n integral diode. The

substrate (terminal 10' must be connected to the most ne,ative point in the external circuit to maintain isolation between tmnsistors and to provide (01" nonna.l transistor action.

'"

i ,:
Ilia
15:
~

60
50

~'E~CT~;;R:~~:I.":;~AOE

II~

V

V

~f

IIFEZ OR

I:

..

la~e
\,!g

:;!C

....,

,

V

4000

./

V

ZO

COLLECTOR-TO-EMITTER VOLTAGE (VCE)-!V
AMBIENT TEMPERATURE (TAI-ZS·C

'00

..

,

468,

V

3000

t;C

,

,

o

. ..Ii,

,

,

I

EMITTER CURRENT (I£I- mA

Fig. 4 _ Typical Static Forwan/ Cur,.em - Trans'er Ratio
'01"

v.

:i:~T~:~~:U~~!~:~TAG~

I'

~

0.7

~
g

~

""

:

,

0

I

,.~
I

461 1

,

~ti

'

:.o:l

; ,,
,
.
,
~ ,

,./'~'/

.f

t'

~~~

'6'

L.

LL

10":

j
,;

~~-

~i;

a

t:::L

,.-' 0

I
,

4 6 8 10

9

,.

fIi
,...u
t

I

10 :

~

tI

INPUT OFFSET IIOLTAGE_\"eE.I

4680:1

>

BASE CURR£NT (IB).

~ ,

COLLECTOR-TO-EMITTER VOLTAIE (VCE)-5V

, ~

-.6-J
.. J,J~~~
, IIII ,I

03

I

1)-,/
""GE-

~

c

,

VCEI·SV

"o ..to:

.
~~

II

I

Darlington.r;onn.cteJ Trans/ste"
anJ 04 vs Emitter Current.

.

,0'

I

92CS-25777

Ratio and Beta Ratio 'or Transistors Q,
and Q2
Em/Her Current.

'0

,

•• 0

EMITTER CURRENT IIEI-I'/IA

Fig. 3 _ Typical Static Forward Current- Trans'"

DB

AMBIENT TEMPERATIAtE ITA J--C

Fig.2 - Typical ColI.ctor- To-80S. Cutoff Current vs
Amb/e"t Temperature lor Eoch Trans;stor.

.~ 5000

iiFiII
I"" I I"E'

1/

r--

V

U=

,

VI

y

V

~

"

(YCEr SV

.

"

'00

,

~

~

Fig. 7 - Typical Collector-To-Emmiter CuloHCurrentvs
Ambient Temp.rature lor Ead Transistor.

i

Z5

50

75

100

IZ5

AMBIENT TEMf"ERATUR[ (TAJ--c

EMITTER CURRENT (IEI-mA

Fig. 5 - Typical Static Base-to--Emitter Vo/toge
Characteristic ana Input Off~et Voltage 'or
Q, and 02 vs Em;tter Current.

Fig. 6- Typieal Base. To-Ern;t,., Voltage Clt",."ete,istir::
for Each Transistor vs A.mbient Temperature

______________________----------------------------------------------87
/

CA3018, CA3018A
ELECTRICAL CHARACTERISTICS, (CONT'D)

100 COLLECTOR-TO-EMlTn" VOLTAGE (VCEl-5V
FREQUENCY {f)-IIIHa

DY1WIIC CHARACTERISTICS
Laof, _ _ filon

CA30'IA

J.Zi

1.15

4 AMBIENT TEMPERATUR£!TA,02!1-t

I

SllrctresistillCl=lKCl

lllb)

d8

low-Fr....II:',S.II-5i. .1

Eqrri.....,..circull
CMrlCteriltics:

FGIWIId CIlflIll·T'..... Rltio

lite

Sbcrt-Cirtuit Inllllll.pedance

h~

Opet-Cifcuit Ouljllt

I~

I

l-lkHz,VCE.JV,IC·111A

h..

Adllittanct Clllrac:teristics:

FarwlldTransfer AdtIitlla

V~

klputAdtiittllCe

Vie

DotpulAdllittJllce

v,.

Reverse T'lnsfer Ad.ittlllCt

V,.

Gain·Bandwidth Prlliucl

llO
1.5

KO

12

15.6

""'"

12

15.6

I
I

're

OpenoCircuit Reverse
VoU...•y,...f. Ratio

llO
15

1.811&4

-

12

l.1IIl1fl'4

-

MIIHI,VCE-rIC.10A

lI·jl.5

IHl.5

D.3+jO.1M

O.3+jO.04

- O.OO]tjO.03

-

O.OOl+jO.03

100

500

13

.....

14

CE8

YE8-3V,IE-D

0.6

0.6

CC.

VC8-3V,IC-O

0.51

~51

OF

CoUectCl-to-SUbslflte CaPICitance

eCI

YCI-3V •IC.()

2.1

2.1

of

1::t~~~:A~fA=ec:1NPUT

atIlIlA._

tto."".e,.MIto

/

're

,

I

FI,.12. FGrwarJ Current·Tran,fer RGf/o (II,.), SItar'.
Cireu;' Inpu, Impedance (",.), Open-Circuit
Output Impedance (lloe), find Open-Circuit
Rever•• Volt", •. Tron,/e, Ra,;o (liN)

vs Collec'or Cunent

17

of

~-WJ~A~~NPUT

~ICTOfl-TO-IEMlTTI!" YOLTAIE ",")-n

,~LIECTOR-TO-EIIITTt:1t YOLTME I'tf:).' v

UC1aR CUR"'NT IIe'-'IIIA

Ii

LLIECTOR CurtltlENT IIe)-'."

.
;3
~I

f",;

;i

~}

0

.

,

16

MHz

500

Collectar-Io-Bne c.illnce

I
10
FREQUENCY Ul-MHl

}

I

15

."""

See Clive

!HCom

3GfI

mh'

....,

Ellitier-to-Base Call1titince

QI

10

..

YCE-3V,!c.loA

I:"

III

"1I·2TU~

....,0 •.18_10-4

COLLECTOf' CURRENT (Iel- ......

IT

~,U

12

~

·-:--.....
R cit ··
17
t-.....
·
",
!· ,
N
. " . . ..-- . . .. . . ,I .
',,-100

1·1 KHz,VCE,IV,IC.lll11

~~

114*-+-+~~~-H+-+-~~~~

i]ii;

iW

2
I

QI

.

,

"

I

,

...

:....-

FRE:Ql£NCY (n-MHz

,

...

100

2r-+-~HH--+-+4H4--r-+444~~

§: I~~-H+-+-~H-+-~~~~~

/

10

"I-+-++++--+~I+-+-I-I-+-J..o--.+~

,

0.1

Z

468

2

46

I
10
FREQUENCY(fl-MHz

2'

6

100

'2(:8-2:57.

Fig. J3

. ForWfltJ Tra,..", AJmitfonce

(Y f.)

F;9·15 - Output Admittance (V 08)

F/,.14 - Input AJml1tance (V;.J

COLLECTOR-TO-[MITTER VOLTAGE (YcEI·'V
AMIfIENT TtMPERATURE 1'W-25·C

4

6810

Z

4

6 8 00

2

FREQUENCv(f)-MHz

COLLECTOR CURRENT (leI-iliA HCS-Df9Z

Fig. 16 • R•

.,.r.e Trans'., AJmlttance (Y re)

FI,.17 - Typlca' Gal.-Ba.JwIJt' Pr.Juct (fT ) ••
Collec'or CU,,."t

__________________________________________________

~

_____________ 89

CA3019
OC REVERSE VOLTS (1Ifl1 ACROSS DIODE·

DC FORWARO CURRENT IlflolmA

"

AMSIENT TEMPERATURE

TAI-25"C

FREQUENCY IF) • IMHOf

§

I

~O.9

~

~ 0.8

~

~

g

2

c

-50

-~

100

AMBIENT TEhl'ERATUM (TAl-*<:

.

Fig_ 2 - DC forward voltage drop (anv diode) as
a function of temperature.

o
-",

I
2
,
DC REVERSE VOLTS (VRJ ACROSS DIODE

Fig. 3 - Reverse (leakage) current (anv diode)
as a function of temperature.

AMBIENT TEMPERATURE nAI • 25·C

AMBIENT TEMPERATURE (TAl· 2$'"(:

FREQUENCY Ifl • I MHI

FMOUENCY If) • I MHI

I

2

3

..

DC "£VERSE VOLTS (VftIIiETWEEN TERMINAL 2 OR \0
AND SUBSTRATE (T£RIllINAL rJ

Fig. 5 - Diode quad-ta-substrate capacitance as a
function of reverse voltage.

Fig. 4 - Diode capacitance (an V diode) as a function
of reverse voltage.

2
3
..
I
DC REVERSE VOLTS (VRI BETWEEN TERMINALS !I OR e
AND SUSS"tRATE (T£RMIHAL TI

Fig. 6 - Diode quad-to-substrate capacitance as a
function of reverse voltage.

Fig. 7 - Series gate switching test setup.

___________________________________________________________________ 91

CA3020,CA3020A
ELECTRICAL.CHARACTERISTICS AT TA = 250(:

CHARACTERI STI CS

SYMBOLS

TEST CONDIT! OIlS
CIRCUIT
DC
AND
SUPPLY
VOLTAGE
PROCEDURE
FIG.
VCCI
VCC2

CollettOl'-to-Ellilter
Breakdown V.lllle, Q6 & Q)

V(BR)CER

.t lOrnA
Colleclor-to-Emitter
Breakdown Voltap, Ql
.10.1 rnA
Idle C..renls, Q6&Q)

LIMITS
CAJOlO
MIN.

Peak Output Currents,

!ls& Q)
Cutoff Currents,

Q6 & Q)
Differetial Amplifier

4

9.0

2.0

4

9.0

2.0

4

9.0

2.0

Tolal Current Dram

leCI +
ICC2
V2
V3
VII

Differential Amplifief
InputTerminalVollqes

Re,ulator Terminal VOltal'
Q, Culoff (Leak"e) Currents:
CollectQf-to-Emitter

Ratio. 01 atJrnA

6.3
8.0

180
1.0

1.0

.A

9.4

12.5

6.3

9.1

12.5

rIA

21.5

35.0

14.0

21.5

30.0

mA

9.0

9.0

9.0

2.0

1.11

1.11

4

9.0

2.0

2.35

2.35

lEBO
ICBO

10.0
3.0
3.0

hFEI

6.0

8W

6.0
6.0
9.0
9.0

-

6

9.0

6

9.0

RIN3

9

6.0

6.0

8J.C

-

-

-

100
0.1
0.1

30

)5

200
400

8
300'
550·

-

35'

55

-

-

30

)5

VeC2

V
100
0.1
0.1

"A
5.tlC

MHz

400

3110'
5541'

800

1000"

mW

100

50b
1000

, - M - r - - - - - VCCI

V

8
200

CatllICtar-to-.nitter bnHdawn vol.,. COs • 0,1 circuit

mA

4

'IN
'IN

TIlelrnal ReSistance

rIA

5.5

4

Sensitivity for POUT -400 mW

Termin.13 to Ground

V

9.0

PO(MAX)

Junctioo-to-Case

10

9.0

6

Inpul Resistance·---

10

110

Maximum Power CUlp.Jt

Sensitivity for POUT =800 mW

MAX.
V

5.5

6.0
6.0
9.0
12.0
9.0
12.0

Bandwidth at ·3 dB Point

TYP.

25

4

ICED

Emitter·to-Base
Collector-Io-Base
Forward CurrentT,.ns'er

MIN.

L

ICCI

Current Drain

MAX.

UNITS

18

2,

V(BR)CEO
14 IDLE
I)IOLE
14PK
I)PK
II CUTOFF
I) CUTOFF

TVP.

LIMITS
CAJ_

.V
mV

0.01

.'

..

,.F

b. Typicll audio ......ifW ctrouit u""unl IN I.OA3020 or
CA3020A _ ......dio p ....... pllfier.nd ct_ B pow.- •
.mplifi.,

Flg.2

n

1000
60

60

'CIW
TYPICAL TRANSFER CHARACTERISTICS

a Rec'" 13011

rt--_···

b Rcc = 2000

'2'
TYPICAL PERFORMANCE DATA
An E.temol RMlafw is Recommend'.d' lw Hlp A. ...W.,., T.mperature Opwatlon

CHARACTERISTICS

SYMBOLS

CA3020

CA3020A

UNITS

Power Supply Vollage

VCc:.t
VCC2

9.0
9.0

9.0
12.0

V

Oifl. Ampl.
Zero Signal Currenl Output Ampl.

·ICc:.t

15
24

15
24

rnA

Dill. Amp!.
Maximum Signal Currenl Output Ampl.

16

u.

16.6
140

mA

ICC2

a. T••t s.tup

Maximum Power Oulpul at THO: 10'1>

IC~
ICC2
Po

550

1000

mW

Sensitivity

elN

35

45

mY

Power Gain

Gp

75

75

dB

Input Resistance

RIN

55

55

kn

Efficiency

Tj

45

55

'I>

Signal·to-Noise Ratio

SIN

70

66

dB

3.1

3.3

'I>

THO at 150 mW level
Test Signal Frequency Irom 600n Generator
Equivalent Colleclor·to-Collector Load ReSistance

RCC

1000

1000

Hz

130

200

n

+t

·c

15

50

-25
H

0
0

25
-25

50

15

Z40N"-+-Z,"oNDlFf"EI'EN1lAL AMPLIFIER INPUTMILUVOI.:rstVZl) S2CS-t5221S

b. Charact.rl.tlu with R 10 .horted out

F".3

____________________________________________________________________ 93

CA3020,CA3020A
MEASUREMENT OF INPUT RESISTANCE
+VCCI

+YCC2

PROCEDURES,
Input R.slstanc. T.rmlnal 10 t.
1.

~::~rio~eilred

Gr.und

(RIM

)

value of Vee 1 aad Vee2 and .selDs in

2. AdJu.t 1 ~ kHz input for desired slenal level of mea•
• uremeat

!: ::~~':!t ~::~I~i; :l{:e of Ra.
Input R•• I.tanc.
1.

:~:1~0:e2.ired

Tarmlnal 3 to

RIN
'0
Ground (RIM)

value of Vec I and V ec2 .e\ S in

2. Adjuat t· kHz input for desired ailnal level of mea ..
aurement
3. AdJuat R for 2 = 111/2
4. Record reaulUne value of R aa RIN 3

°

Fig.9

MEASUREMENT OF SIGNAL-TQ-NOISE RATIO
AND TOTAL HARMONIC DISTORTION

a. Teat S.tup

+VCCI
DISTORTION

ANALYZER
HEWt.ETTPAc.cARD
TYPE 302A
OR

"".n

EOUIVALENT

BALLANT1N[

'.F

MODEL 320
OR
EOUIVALENT

PROCEDURES,
Sllnol.to-Nol •• Rotlo
t. Cloae 8 1 and S3i opea S2
2. Applll deaired valuea of Vec and Vce
3. Adjust e lN for an amplifierl output o~ 150mW and
record reaultlrll value of ROUT in dB .a e OUT
(reference value)
1
4. Open 9. aDd record re.ultiog value of eOUT ia dB .a
e OUT2
5. Siloal-to-Noise Ratio (S/N)

= 2010110

POWER AMPLIFIER COLLECTOR VOLTS (V4, v71

b. Characteristic

Fig.11

e OUT
_ _,_
e OUT2

Total HOlmonlc Dlat.rtlon
I. Close 8, and 8 2 i open S3
2. Apply deaired valuea of VCC and VCC
3. AdJuat e lN for d.aired level JmpUtier oltput power
4. Record Total Harmonic Diatortion (THD) in "!o
Fig.1Q

ZERO SIGNAL AMPLIFIER CURRENT
V8

AMBIENT TEMPERATURE

."

I ••
S CLOSED
S eLO ED
.0 N
S CLOSED

-50

-25

.

K>O

,,.

AMBIENT TEMPERATURE ITAI-OC

b. Diff.rentlal Amplifier Characteristics

o
-50

o
50
100
AMBIENT TEMPERATURE ITA J _·C

,50

c. Output Amplifier Characteristic.

o. Test Setup
Fig. 12

____________________________________________________________________ 95

CA3021,CA3022, CA3023
ELECTRICAL CHARACTERISTICS,

at T A =

25° e, Vee" +6V.

unless otherwise specified

TEST CONDITIONS

CHARACTERISTIC

FEEDBACK
TEST SETUP RESISTANCE
SYMBO'
AND
(R~) BETWEEN FRE·
_. PROCEDURE TERMINALS QUENCY
3ANO 7
f'

il

Fig.

TEST SETUP fOR MEASUREMENT OF AGe
SOURCE CURRENT

LIMITS

MHz

CA3021
(TA5219)

Min. Typ. Max. Mm. Typ. Max. Min. Typ. Max. Units
8

Device
Dissipation

12.5 24

PT

~GC Source

0.8

Input
Capacitance

56

dB

6a

46

dB

6a,d

dB

6b

3

57

-

40

44

7.5

50

53

40

44

16

-

4000

1300

300

-

'11

13

6c

il

-

'out

~~~~cr~:~r:~~~i~~~' keeping ein constant until eout drops

100

Fig.S

dB
4.4

-

8.5

dB
6.5

8.5

dB
dB

-

33

10

(a) Set ein = O.S mVat frequency specified, read eout Voltage Gain

(AI = 20 LOBlOBandwidth:
ein
(a) Set eout to a ccnvenient reference voltage at f '" 100 kHz and
record corresponding value of ein.

il

-

8.5

PROCEDURES
Voltage Gain:

il

10

10k
4.7k

AGC

6b

MHz

il
120

10k

33
AGC Range

6a

MHz

pF

-

300

4.2

MHz

Vee

+6V

6c

pF

10

39k

6c,d

pF
18

4.7k

6b,d

il

-

10k

4.7k

dB
dB
dB

TEST SETUP FOR MEASUREMENTSOF VOLTAGE-GAIN, _3dB
BANDWIDTH, AND MAXIMUM OUTPUT VOLTAGE

il

5.
10

39k

NF

-

10

10k

ROUT

Noise Figure

50

-

2.4

0.8

39k

Output
Resistance

-

\
10

4.7k
CtN

mA

40

4.7k
39k

Compo-

Fig ...

-

50

10k

RIN

0.8

0.8

0.8
2.5

39k

Input
tnput·
Resistance
Impedance

IAGe IS THE CURRENT fLOWING INTO TERMINAL 2.

V

0.\

4.7k
BW

-

39k

10k
18k

Bandwidth at
·3 dB Point

lb,d
3c,d

560k
39k

Voltage Gain

mW
mW

1.3

IAGC

Qmenl

vMC· ... ·v

V
1.9

10k
4.7k

Vo

48

-

2.2

39k

Quiescent
Output
Voltage

35

Vee

"V

FJL
3ad

mW
24

nents

TYPICAL
CHARAC'
TERISTIC
UNITS
CURVE

CA3023
(TA5218)

CA3022
(TA\236)

VOL TAGE GA,N VS FREQUENCY FOR CA302'

:~~~yT~~~~~~r:;~AJ'25-C

33

INALS No.3 AND 7

70

dB

10

~~~T~~::=~:~R~RM_

TERMINALS No.IO,II,ANO 12 CONNECTEO TO GROUNO

I TAN

60 F ED

dB

R

'!lb

.""',

7

!O

OUtput Voltage
(AMS V.lue)

~m'

0.6

39k

Maximum

0.7

10k

Vout

-

10

Ok

-

0.5

-

V(rm,

-

V(rm,)

, "

0.1

a

6

10

FREQUENCY (f J - MHz

Fig.6(a)

AMBIENT TEMPfRATURE !TAl· 2!"C

~~~::i~sVZ~~~:'e~~~~: CONNEC-

FEEDBACK RESISTANCE (RIJI
CONNECTED BETWEEN TERMINALS No 3 ANO 7

TED TO GROUNO

.
i
!

~

g

4

6 8 I

2

4

6 S 10

FREOlJENCY(ll-MHz

FI •. 6(b)

VOL TAGE GAIN VS TEM.PERATURE FOR CA3021,
CA3022, AND CA3023

VOL TAGE GAIN VS FREQUENCY FOR CA3023

VOLTAGE GAIN VS FREQUENCY POR CA3022

10

60 FEE

>.CO

S

.0

.'"

NCE
4

DC SUPPLY VOLTS !VCCl-+ 6
TERMINALS No.IO,1 L, AND 12 CONNECTED
TO GROUNO

TYPE

FEEDBACK RESISTANCE (R.81 CONNECTED
BETWEEN TERMINALS No.3 AND No.7

~~

CA30el

39

I

CA3022

10

5

CUD23 4.7

K

2•

•0
'0

~ 40

20

~

3!

,
4 6 8 100

4681

2

46810

FREOUEt.lCVlfl-MHl

Fig.6(c)

-76

-50

-25

25

50

75

12!)

IS)

AMBIENT TEMPERATURE (TA l-"C

Fig.6(d)

__________________________________________________________------____ 97

CA3026,CA3054

Dual Independent
Differential Amplifiers

FEATURES

For Low·Power a"licllills

TheCA3026 and CA3Q>4 each consista 01 two independent
differential amplifiers with associated coostant-current
transistors on a common monolithic substrate. The six
n~p-n transistors which comprise the amplifiers are
general purpose devices which exhibit low 1 If noise and
a yalue or fr in excess or 300 MHz. These features
make the CA.1026 and CA:J05,4 useful from de to 120 MHz.
Bias and load resistors have been, omitted to provide
maximum application nexibilily.

• Two cliff..antiolomplifi.,s on a ComMon

.Ind.p.itdently ace.nibl. inputs and outputl

to 120 MHz

• Full military tempera'u,. ran,. capa"ility

• Maximum input aH••• volta, ••• t 5 mV

• Limited ..... ,.'a.ur. ,an,...

• Dual I~n,e amplifiers

-550(: ta

ooe

to 8SOC for CA305.c

• The CA3064 is available in a sealed·junction
Beam·Lead version ICA3064L). For further
information see File No. 515, "Beam-Lead
Devices for Hybrid Circuit Applications".

• Dual Schmitt tlillen
• Multifunction combination.·· RF 'Mix., Osdlllltor;

Con..,.rt.r,IF
• IF IImplifien (diff.rential atu' a' cucade)

• CA3026-Hermetic 12·lead TO·5 package

• Prod"ct deteclars
• D.lIly "lanced mad"latars one! clemachllotors

provides close electrical and thermal matching of the
amplifiers. This feature makes these devices particularly
useful in dual channel applications where matched performance of the two ehaMets is required.

80

+125°e

APPLICATIONS

The monolithic construction of the cA3m6 and CA:lOO4

lu~.trote

II Freqlencies hi DC

• CA3054-14-lead dual·in·line plastic package

• 8010ncad CII"ad,at",. d.'act.,s
• Cncode liMit.rs
• Synchran.us cI.t.ctart
a Pairs of Itolanced .. hlers
• $ynthesi •• , mi ••,s
• Balanud (push.pull) cu;ad. ampliti."

MAXIMUM RATINGS. ABSOLUTE·MAXIMUM VALUES. AT TA
power m.. ipatlon, P:
CA3026
Afy one tran.i.tor .•..• 300 . , . .
Total packqe • . . . . . •• 600

ForTA > MOe"

CA30~

....

•. Derate at5....

=25·C

Fi,.Ja. Sdemaf/c Diagram'ot CA3026.

The foUowin, ratiDp appl,. for each trensistor in the devJee:

300

mW
mW
mW/OC

750
6.67

Temperature Ranp:
.
Oper.tin, . . • . . . . • . •.... -55 to + 125
Storale . . . . . . . . . . ••... ~5 to + 150

°c
°c

CoUector-to·Emltter Voltap. V CRO ' • , .••.•
Collector·t...Base Volta... Vcao' ••••••••.
CoUector-to-Substl"llte Voltaae. VClO0' ••••.•
Elldtter-to·aa.e Volta •• V EBO ' ..••••••••

IS
20
20
5

V
V
V
V

Collector ClllTel\t.

SO

mA

Ie' .... '.' ...........

L o~ ~~"

y'
0,

•

LHd Temperature (During Solderlngl:

rn

SUBS1IU,l[

Fit.'" - Sdemafic DiagraM lor CA305~.

At distance 1/16 t 1/32 inch (1.59 t 0.79mm)
from case fOf 10 seconds max.
. . . . . . . +265

°c

o Tha collector of each transistor ot the CAS026 and cA3054 il
Isolated from the lubstr* by an Intlltal diode. The sl.IbltnIte must
be connecled co II uolttJIIII ulaich u IID'II' "_We tIaJ. ~ colleceor
uolkIaV in order to mIIintain ilfOlation between w.-uwra and prouide

(ar fIOf'fIGJ lrt.IMisw action. The suNtrate Mould be maintained at
s4fnal (A(]I woIIId bJ' meana 0( tJ .uilable ~ cttpQCilar. to ovoid
.....iTed coupling between buuistors.

CAUTION: Substrate M15T be maintained negative with
respect to all collector terminals of this device. See
.

Maximum Voltage Ratings chart.

TYPICAL STATIC CHARACTERISTICS
10il! EMITTER CURMNT II '-0

Maximum Volta,. Ratin,.
The following chart gives the range of voltages which can be applied to the terminals
listed vertically with respect to the terminals listed horizontally. For example, the
voltage range between verticallenninal 1 t and hcrizoolallerminal 3 t i. +15 to -5
volts.

t
CA3054
TERMINAL NO.

For CA3026jcorrelpondilll terminale for CA3054 are vertical
terminal 2 aDd horizontal terminal 4.

-

•..

13

..

1

CA302_
TERMINAL

13

10

I'

11
12

10

11
0
·20

12

1

"
·5

'20
0

•

7

8

•

•

S

•

7

11

MoximulII
Current Ratin,1

12
Note 1

Note 1

• •

.15
·5
.20
0

'20
0

'20
0

.20
0

CA30s.c
TERr.tNAL
NO.•

CA3026

TERMINAL

N•.

"N
mA

m'

13

10

I.

11

SO

0.1
0.1

12

SO

0.1

,a<

'IS
·5

0.1

.1
'5

0.1

•

·20

0.1

·50

.20
0

SO

0.'

.20
0

SO

0.1

• IS
'S

.5
·S

.20
0

0.1

·15
.1
'S

11
I'

11

R.,

12

0.1
0.1

SO

stlate

~:e:.r:d.ified

limits between all ott.r terminals are not

Mot. h In the CA3026 terminal No.9 iac:onnectedto the emitter

~~~d ~~ re~re.::,.:~~tra+~::!~aC:la9·~i~.:no:(~~O~~
~Croribo!~~t-.J::z6a!:l th:aC~'05:."Wh~tre~er·a~O:::i~k

i • •bown in one column 9 and a ratin, is shown in the other
column 9, the .steriak .hould be ipored.

50
'00
AMBIENT TEMP£RATUR£ ITA)--C: -

For CAS054: use data from

..

,
IleS-ItIM

ric to 'SOc anty

FI,.2 • CoII.ctor-to-H•• clltoHcurre"t nam6;e","..,.,•
• ture lor eaclt tra"sistor•

.J

• Tenpinal No.to ofCA3054 i. not used

..

1,.'1111/'' ' ' 11
~

:

ii

Sob-

~::~=: =pe~n:~:!!:e:~:: ~eer~::i8 t~?iii t!:r=~:I:r

.

•. 1

·5

.

lOUT

~

:v
0.'

V

• Ii.

I

2

COllECTOR MILLIAMPERES

(te'

•

'10

FI,.3 • ',.put 6/0. cur,..,.t cltorac,.,;.tic v. collector
curre,.t I. each tran.i.tor.

____________________________________________________________ 99

CA3026, CA3054
TYPICAL DYNAMIC CHARACTERISTICS
COMMON MODE REJECTION RA TIO

Terminal Numb.r. In Circl•• ar.
for CA3026

:r:-~~~A~05~.r.

POSITIVE DC SUPI'LY VOLTS !Veel .... 2

In Square Box••

NfGAT,V£ DC SUl'PLY VOL.TS {VEEI • -6
FREOUENCY If I • I ilHz

CD 110

i
i•

I

~IOO

V,N'Q3vlfl'l'Il'

~

j

-I

·s

-2

DC liAS VOlTS ON TERMiNAl

Fig.8

(0) Test setup

@ []i] (Vxl

-4
tICS-IU53I"

(b) Characteri"stic

SINGLE-STAGE VOLTAGE GAIN
T:.'C~;~~umber. In Clrcl••

----.,--,----

a...

Terminal Numb.,. In Square Box••
ON for CA3054

(a) rest setup

Fig.9

TWO-STAGE VOL
Terminal Number. In Clrcl•• are
for CA3026

Terminal Number. In Square Box••
or. for CA30S4

'I'F

'.F
(aJ rest se'up

Fig,lO

TYPICAL DYNAMIC CHARACTERISTICS FOR EACH TRANSISTOR
COLI.EeT~·TO-'ASE ~TS IVcel-'

AMBIENT TEMPERATURE ITAl-2S·C

,/

0.01

I I
10.1
2
I
COLLECTOR MILLIAMPERES IIel

(h,."

4

8 '10

nC$-I!I'~AI

Fig." Forward current-transfer ratio
shOl'f.c;rcuit
Input Impedance (h;.), open-circuif output imp.Janel
(I,oe)' anJ open-circu;I rents. vo/top.tran"., ratio
(II,.) vs collecto, current 'or ."cll trons/stor.
8

____________________________________

COI.LECTOR MUIAMPER£S lIe)

F;g.J2 - G,,;n-banJwiJth proJuct ('r)
current.
~

__________

~

V.t

collector

_________________ 101

CA3028A, CA3028B, CA3053 Types

DlFFERENTlAL/CASCODE
AMPLIFIERS

APPLICATIONS

FEATURES

• RF and IF Amplifiers (oiHer.ntial or Cascod.)

• Controlled for Input Offset Voltage,
Input Offset Current, and Input Bias

• DC, Audio, and S.nse Amplifiers

Cumont' (CA3028B)

• Conv.rt.r in the Comm.rcial FM Band

Far Comllulicatilas and
Industrial Eqlipment at
Fre~uencies from DC to 120 MHz

• Mixer

• uscillotor

The CA3028A and CA3028B are differential/cascode ampli·
fiers designed for use in communications and industrial equip·
ment operating at frequencies from de to 120 MHz.
The CAJ028B is like the CA3028A but is capable of premium
performance particularlv in critical de and differential ampli·
fier applications requiring tight controls for input offset voltage,
input offset current, and input bias current.

• Companion Application Note, ICAN 5337 "Application
of til. RCA CA3028 Integrated Circuit Amplifier in the
HF and VHF Ranges." This note covers characteristics of different operoting modes, noise ,.rformonce,
mixer, limiter, and amplifier desi,n considerations.

• Wide Operating-Current Range

Pocko...
B-Laod T()'5

Suffix
Lottor

CA3028A

CA3028B

CA3053

T()'5

T

..;

.j

S

.j

..;
..;

Beam·L_

L

..;

Chip

H

.j

With Dual-ln.Lin.
Formed Loads
(DiL-cANI
750

mW

• Operation from DC to 120 MHz

Th. CA3028A, CA3028B, and CA3053 aro availablo in tho pack_
shown below. When ordering_ davie.., it i. important to add tho
appropriate suffix letter to tho device.

The CA3053 is similar to the CA3028A and CA302eS but is

DISSIPATION:
At T A up to 55°C
(CA3028AF, CA3028BF,
CA3053FI. • . . . . . . • . . . . . . . . . . . . . . . • . . .
AtTA> 55°C

• Single- and Dual-Ended Operation

• Balanced-AGC Capability

recommended for I F amplifier applications.

ABSOLUTE MAXIMUM RATINGS AT TA = 250 C

• ...nced Differential Amplifier
Configuration with Controlled
Constant-Currant Source to Provide
Unexcelled Versatility

• Limite,

.j

(CAJ02BAF, CA302BBF,

C~3053FI ...•........... Derate linearly 6.67mWfOC
At TA up to 85°C
(CA3028A, CAJ0288, CA30531 .•.•.•.....• 450 mW
At TA> 850 C
(CAJ028A, CA3028B, CA30531 .Derate linearly 5 mW/OC
AMBIENT· TEMPERATURE RANGE:

Operating. . .. . .. .•... ... .... .. ..
Storage..... . . .. .. ... .. ....... ..

-55°C to +1250 C
-650C to +15()OC

LEAD TEMPERATURE CDuring Soldering):
At distance 1116 ± 1/32" 11.59 ± 0.79 mml
from case for 10 seconds max. ...............

r;MA=XrIM_U_MrV_OL-,-T_A_GrE_R_Arn_"_GS,..-at_Tr.._=--r2_50_C.------:"..,-,-,-,....-,....-_ _..,
~~

CURR~"~MR'!'TI"GS

This cbarl gives tile range

No.

of voltages which can be applied
0
to •
.15

0

+5
to
-6

0

.\~. -\\.
.Il

+2650 C

0

t~5.

+5
to
·1
+10
to
0

+5
to

10 the termina-Is listed hOfizootally
With respect to the terminals

+20
to

0
+15
to
0
+15
t.
0

+30e

to
0

+15
to
0
+15
to
0

liN

lOUT

mA

InA

I

0.6

0.1

2

•

0.1

listed vertically. F« example.
the voltage range of Ihe horizontal

lerminal4 with ItSll'c! to terminal
21s -I to +5 volts.

+30
to
0

t

Termlnal"3 is connected to the substrate and case.

* ~~~~':: t:~~~:~"t:I~:~i:: be-

+. 6

Fig.Sa - AGC bias current 'est circuit (differential·
amplifier configuration) lor CA3028A and C.4.30288.

-5
-10
OC EMITTER SUPPLY VOlTS (VEE)

Fig.8b • AGe bias current vs. bias volts (t.rminal No.7)
I., CA3028A a.d CA30288 .

Fig.7 - Operating current vs. VEE voltage for CA3028A

• ndCA30288.

CASCOOE CONFIGURATION
AMSIENT TEMPERATURE (T A I =25 G C

DC COLLECT SUPPLY 'Io'OLTS (Vecl
DC EMITTER SUPPLY VOLTS (VEE)

.l
g

~.,..

"'1-----

*----~--_+--+-4-4_+-~~~~~J~.-~

! ~~---+--~--~t-t-~_+-+-+_+~
~ 't----4---+--t-4-4-+-~-4--~_+1

100

"
AMBIENT oTEMPERATURE (TA1-·C

..

120

Fig.9 - Device diSSipation vs. temperature for CA3028.4.

3-30 3-30 O.l-o.2S JSSSoC . . .
TEMPERATURE RANGE:
Operating . . . . .

•

•

.

-55 to +1250 C
-65 to +1SOOC

Stonge .
LEAD TEMPERATURE lOuring Soldering):
At distance 1/16 ± 1/32 inch 11.59 ±O.79 mm}
from case for 10 seconds max. • • • • .
PEAK INVERSE VOLTAGE, PIV for: 0,-05.

06·

+ 2650 C
5V

0.5 V

.

PEAK DIODE·TO-SUBSTRATE VOLTAGE, VOl
for D,-D5Iterm. 1,4,5,8 or 12 to term. 10) .
DC FORWARD CURRENT, IF • • • . •
PEAK RECURRENT FORWARD CURRENT, If
PEAK FORWARD SURGE CURRENT. If(SUra.}

ELECTRICAL CHARACTERISTICS, at TA = 250 C

CHARACo
TERISTIC
UNITS CURVES

LIMITS
SYMBOLS

SPECIAL TEST CONDITIONS
MIN.

DC Forward Vollage I)op

VF

IF·50pA
ImA
3mA
lOrnA

~

-

TYP.
• 0.65
0.13
0.16
0.81

MAX.
0.69
0.78
0.80
0.90

V
V
V
V

-

DC Reverse Breakdown Vollage

V(BR)R

IR' -10pA

5

7

-

V

DC Reverse Breakdown Vo~age
Belween any Diode Unit and Substrate
DC Reverse (Leakage) Currenl

V(BR)R

IR' -1O/'A

20

-

-

V

DC Reverse (Leakage) Currenl
Between any Diode Unit and Subsbale
Magnitude of Diode Oflset Voltage
(Difference in DC FINward Voltage
I)ops 01 any Two Diode Units)
Temperature CoeffiCient of

f Fl- VF21

Temperature Coefficient 01 Forward Orop

2

VR' -4 V

-

0.016

100

nA

3

IR

VR·-l0V

-

0.022

100

nA

4

I VFl - VF21

tF·l mA

-

0.5

5

mV

2

IF·l mA

-

1

-

jJ.VI"C

5

IF -I rnA

-

~1.9

-

mVI"C

6

IF·l rnA

..

0.65

-

V

-

L'lIVFl - VF21
L'l VF
L'lT

.

DC Forward Vottage I)op lIN
Anode-la-Substrate Diode (OS)

VF

Reverse Reoovery Time

Irr

IF • 10 mA, IR • lOmA

-

1

-

ns

-

Diode Resistanct

RD

I. I kHz, IF' 1 mA

25

30

45

n

7

Diode Capacilanct

CD

VR ·-2 V, IF'O

0.65

8

VOl • +4 V, IF ·0

-

pF

COl

-

pF

9

Diode-ta-Substrate Capacitance

3.2

..

AMBIENT TEMPERATURE

25mA

100mA
l00mA

ITAI·~II

~

II~·

!

l~"~

~

0>

~

0'/

I

.~

/

V

-

IR

L'lT

+20,-1 V

TYPICAL CHARACTERISTICS

Characteristics apply lor each dlocl. un", un/en otherwise .pecUieJ.

CHARACTERISTICS

100mW
600mW

.•

c\eratalinearly 5.7 mWfDC

t,

tt

~ SSoC. . . .
TEMPERATURE RANGE:
Operating . . . . . . . . . . . . . . . . .
Storage •••••••••••••••••••

. . . .. 450 mW
. . . .. 5 mW/"C
_550C to +125°C
_650C to +15O"C

LEAD TEMPERATURE (During Soldering):

SUBSTRATE

St.eSTItAT£

ALL AISISTANCE VALUES IN leO. ·S.

FI,.I • 'c••matlc 01." ... fo, CA3040

AI distance 1/16 ± 1/32 inch (1.59 ± 0.79mm)

from case for 10 seconds max.

•.•.••..••• +26S oC

• Limitation imposed by the thermal resistance of package.

point for either single or split power supplies.

MAXIMUM VOLTAGE RATINGS.t TA =25·C
The following chart gives the range of voltages which can be applied. to the tenninals
listed vertically with respect to the terminals listed horizontally. For example, the
voltage range of the vertical terminal 2 with respect to terminal 11 is 0 to +14 volts.
TERMINAL

No.

I

1

2
0
·1'

2

3
4

5"
6

3

4

. .
.
.
'1'
0

S"

6

7

+1'
0

·

+10
-10

+1'
0

+1'
0

·

· ·
. ·
,
·
·

'5
-3

+3
-3

7

8

9
10

1\'
12
... Rer(!f'(>nCt~ SUru.trute

Note 1: External connection required for sroper operation.

+10
-3

8

9

·
·
·
·
·
·
·

· · ·
·
· · ·
· · · ·
·
· · · ·
· · ·
· · ·
· ·
· ·

10

11'

12

+1'
0

+1'
0

+1'
0

+1'
0

+5
-3

+3
-7

+

0

Note

MAXIMUM
CURRENT RATINGS
TERMINAL
No,'

lIN

lOUT

mA

mA

1

5

5

2

-

-

3

5

5

4

I

0.1

5

-

-

6

I

0.1

7

5

5

8

5

5

9

I

0.1

Fi,.2(.' - Bi.s MaJ. A

I

+10
-I<

Fig. 74 . Typical amplifier gain vs feedback resistance.

The CA3048, as in other devices having high gain-bandwidth product, requires some attention to circuit layout,
design, and construction to achieve stability.
Should the CA304B be left unterminated, socket capacitance alone will provide sufficient feedback to cause
high frequency oscillations; therefore, all test circuits
in this data bulletin include loading networks that provide stability under all conditions _

____________________________________________________________________ 119

CA3049T, CA3102E

ELECTRICAL CHARACTERISTICS ot TA • zli"c

CH_
TYI'tCAL

TEIT
TEST CONDlnONB

SYMBOLS

CHARACTERISTICS

CAJIMIT LlII,TS

CIRCUlT
FIG.

IMAX.

TYP.

MIN·I

TEIIIITICS
CUIIYU

',G.

UNITS

STATIC CHARACTERISTICS
For EtlCh Dln.,.."I., Am IIf....
Input Off..t Vo....

0.2.

0.,

V,O

',0

Input Offld Curr.nt

Input B 1M Current

'3-'9- 2m"

13.5

...

liB

T.m.-,.tur. Co-'fk:"nt M... IIAVIOI
nlNcHlo' Input-Oft.t VOltaQII
.b.T
hT,.",1stor

F ••

DC Fgrw...d 8_to-

Va.

EmltterVol..TempwiItUre COeffk18nt of

AVSE

._.to-Eml«.. Vol....Collector-Cutoff Cu,,.n,
Collector-to-Emitur
B,..kdoWn VolUtlll
ColI..::tor-to-a...
atellkd\)wn Volt_

Collectol-to-Subltr.te
8'Hkdown Volt...
Emituor-to-8_ B,. .kd_"

VOigt.'

DYNAMIC
CHARACTERISTICS
1/f Nola FlguHl (For

AT

Ie'"

roduct
(For Singl. Tr.,.linorl

rnA

VeE" 6V, Ie· 1 mA

.

.. 10 V,le" 0

mY/oC

-0..
0.0013

nA

VIBR)CEO

Ie" 1 rnA. la" 0

2.

V

VIBRICBO

Ie" 10 JoIA, 'e '" 0

20

60

V

VIBAlelO

Ie" 10/olA, '8 = 0, Ie ,. 0

20

60

VIBRIEBO

Ie'" 10 ",A, Ie ~ 0

'00

V

V

IC'" 1mA

..•

Vce - 6 V.IC" 5 mA

1.36

GH,

0.28
0.20
1.65

pF
pF
pF

'00

,.

dB
dB

22

dB

2.

d8
dB

f = 100 KH3_ AS '" 500 H

eeB

IC" 0

Vca" 5V

Ie'" 0

VCI = 5V

Common-Mod. R.jR1ion Aa,lo
.n•• On.S....
A
Volt. . G.in. Sing.. Endad
OUtDut
InMrtion Po_r Gain
Nol.FI...r.

CM"
AGC

13'" 19- 2 rnA

Input Admit1llnc:.

v"

C~.c:i'.nc.

I
COllECTOR CUfRENT {lei-iliA

Vc

CCI

Collector·a ... C.PKit.nce
Collector·Sub,tr•••

I/oV,·C

I

IT

-,

.A
.A

".

Vce- ev

NF

Sin I. Tr.n.,tor'
~~in-aandwld1h

32

dB

12

F:~_~~.~iff....nti.1

Rev.... Tren"'.r Adminanc::.

Forward Transf.r Admlnanc:.

Output Admittllnc:.

A
NF

v.2

v2.

Bia, Voltll... -6V
Bia, Volt.... '" -4.2V
f'" 10MH:
C.lICod.
t'" 200MH:
CalCoda
VCC" 12\1
For Cascod.
Cascode
Configuration
13 = 19" 2 rnA Oitf.Amp .
For Oifl.
CatcOd.
Ampllli...
Configuration
13= 19" 4mA OiU.Amp.
(each
c:ollec:tor
IC:2mA)

V22

7"

...

9.10

14,16.18

1.5'" j 2.46

..

mmho

0.B78'" j 1.3

100 -."

150 -2'

0

25

150

75

AMBIENT TEMPERATURE ITAI-·C

16.17.19

100
.rCS-2Q7'II

Fig. J-Co/lector-cutoff cummt va. ,."",.",ru,..

0- j 0.008

mmho

0- j 0.013

Ca..:od.

17.9 - j 30.7

Diff. Amp.

-10.6. i 13

Cesc:CId.
Ditt.Amp.

-0.503-115
0.071 + j 0.52

6"

"T..minal,l • 14. or
8. ICA3102EI ' . 12 or
7 ICA3049T1
··T..minel, 13 .. 4. or 6 .. ,,_ (CA3102EI 10 ... 11 or"'" 5 (CA3049T1

28,28.30

mmho

27.8.31
20.22.24

",mho

21.23,25

AIBENT TEflW'ERATURE ITA'. 215-<:
POSITfYE DC SlPPLY VOLT_ IV·)· .IV
NEGATIVE DC StM"PL'f' VOLTAGE (Y-)_-IV
FREQUENCY cn-11IHlI

0.01

DC lIAS VOI.1AIE ON 1"I!MIJMI..S 2AHO 10-V

2

4

&

aOJ

:2
'" 6 II
Z
FREQUENCY (f) - MHz

'" 6 110

61100

Fig. 10-Voltllgegllinv... frequency.

Flfl. 9- VCJI,.,.,.n n. de bia Il0l,.,,..
DC 81AS VOLTAGE IVBI-v

Fifl. B-CapecitlltlU w. de".

~
AMBIENT TEMP£RATURE (TAI= 25"C
RSOURCE • soon

AIB!NT TEMPERATLM (1A) ·25·C

3D

/'"

20

,./"

//
'V
~
001
COLLECTOR QJRRENT IIc)- InA

Fig.

t I-Gllln-bllndwldth product liS. colteCtor curIYJnt.

~'tft

V

I--

::-14

6

801

/'"

---

Vf"

,
"

~

--

~ V-

~

4

loOKHl

6

8 I

~
00'

& 110.1
'"
COLLECTOR CURRENT (!cl-IIIA

6

II
92C$:2080!l

COLLECTOR CUflfIENT (lCl-mA

Fig.. , 2-1 h noise figure vs. collsctor current.

Fig. 13-7# noise figure vs. colltICtorcurrent_

----------------------------------------___________________________ 121

CA3049T, CA3102E
Typlcll Output AdmittllllCl Chor_ri..... for CA304IT ond CA3102E

'"
22

-6

-2
6

10

• '00'

'",2

FREQUENCY

MH~

1'1 -

I.

" '0'

FREQUENCY

tf 1 -

•

10

'r}

20

10

COLLfcTOR SUPPLY VOLTAGE (Yccl-V

4.

MH.
ft1S-M41

I!i
10

20

30

40
EIIITTER CURRlNT a,.IgI-

COLLECTOR SUPPLY VOLTAGE (VCC'"V

I.

lit"

I.

Ir.lT1!R CURRENT

••

TVIIicll - . . Tro _ _ _ for CA304tT oncI CA310n

CASCOIlE AMPLIF'IEft

~:;~o:.L~~=~R~1~ ~~i~'I:J:

j
Ii

iW"'; ..••
~o

~~

~

i

AIle£NT TEWER"TURE (TAl' 25"C

~

"

I.
I.

I •
e -I.
-2.
10

,

18
~~

\.

I' 1 -

I.'
~

•

. , .,,'r-!21 , . , .

FREOUENCY

'11

_20'"

I.

1-40

.. H,

10

" '10 2
FREQU£NCY If I -

•

r}

MHI

. .

'ISS-St4.

Pif. 21-FotvMld rr.mt.rlldmlttMlt» (y2tJ .... frItIWnt:r.

FIf. 2B-Forw.t'd
..".,..

UtHJI'" MJmlfWtCtl

fY21J ..& h//a:tOr

I11/III'"

."
IFFERENTIAL AMPLIFIER
COLLECTOR SUPPLY VOLTS CI,"lglo.
OPERATING FREQUENCY (fI-

zoo MH,

AMIIENT TEMP£RATUREITA,-2"C

..

-0

COLLECTOR SUPPLY VOLT.lGEIVcc'-V

Fig. 29-Fo,..«1

rr.n.fe, .cImirr.nu (Y21J

VI.

-2.
•

I

EMITTER CURRENT 113.lgl-mA

•

II

..

'MI'fER CURfl£NT lI"ltl-1IIA

coll«:tor.PI"yvo/,.

.p-

________________________________________________________________ 123

CA3050, CA3051
ELECTRICAL CHARACTERISTICS ot TA = 2SoC

CHARACTERISTICS

60 AMBIENT TEMPERATURE ITA).U.C

TEST
CIft..
CUlT

TEST CONDITIONS

SYMBOLS

FIG.

LIMITS
CA30SOlCA31l51
MIN.

TYPICAL
CHARACTERISTICS
CURVES
FIG.

UNITS

I TYP. I MAX.

aoo
t!

i ..

! '0
~

STATIC

~

Amplifi., Characteristics

Input Offset Voltage
Input Offset CURent
Input Bias Current
Quiescent Operating Cllrent R.tio

-

VIO
110
IIIl

I(14~12)
(16+17)
'-13-

DC F......rd ea...fo.Emitter VQltage

0.9

1.5
7
200
1.00

mV
nA
nA

5
70
500
1.13

2a,b
aa,b
4a,b
5.,b

-

I

VCE' 3V

0

ru

l;V BE

. ..

,

II

I

I

I

10

,

QUIESCENT 81AS MILLIAMPUES (131

Flg.3(a} - Typical Input oII.et current
quiescent bias c",ren'.

t-

-

5O~A
~: --

10 nil

-

VCE - 3 V, IC - 1 mA

'"Tr'""

--

II

'0

VCC-+ 6V,13- 2mA

VBE

Tell1llOr.ture Coefficient of B....t..
Emitter Voltage

-

zo

--

-

0.645
0.725
0.760
D.l105

0.700
0.800
0.B50
0.900

V

6

-1.9

-

mVI"C

7

0.002
24

100
-

nA

8

-

III

-

V
V
V
V

.

II

'00

'IS

Transistor Charact.ristics

Collect..-Cutoff Cllrent
Collector·tD-Emitter Breakdown Voltage
Collector-t.. ease Breakdown Voltage
Collector·t..Substrate Breakdown VoH.ge
Emitter·tei-Base Breakdown Voltage
DYNAMIC

ICBO
VBREEO
VCBRlCBO
V(BR)CIO
V(BR)EBO

VCB - 10 V, IE - 0

-

-

lc - 1 mA, 18 - 0

-

Ie - 10,.A, IE - 0
Ic - 10 ,.A, ICI - 0
IE - 10,.A, Ic - 0

-

15
20
20
5

-

III

7

-

=",

-

L
i

Ii 25

I 2

~

~

~

Emitter·t.. Base Capac it.....
Collect..·t..ease Capacitance
Collector-t..Substraie C.pacitance

0

e

~

~

~

AMIIENT TEWERATURI: IT"--C

Transistor Characteristics

I

CEB
teR

I VEB - 3 V,IF - 0

I - I - I

I VCR-3V,Ir,-0

I - I - I 0.471 - I

CCI

I Vcs - 3 V, IC - 0 I - I - I

- I

1.92 1

- I

pF
pF
pF

0.7sl

I

9
9
9

I

I

FI,.3(6) - Typicv/ Input ." •• t c""nt ••
odie'" tempe",ture.

".plifier Characteristics

G.in-Bandwidth Product
(F.. Single Transistor)
Forward Transadmittance
(With single-ended input .nd output)
Bandwidth at·3 dB Point

IT

IY21 1
Zt

Output Impedance
COIlllllOO-Mode Rejection Ratio

Zo
CMR

AGC Range

AGC

-

-

1Il0

-

MHz

10

VCC - 10 V, 13 - 2 mA

11

7

9

11

mmho

11

f· 1 MHz

BW

Input Imped.nce

VCE - 5 V, IC - 3 mA

VCC - 10 V, I - 2 mA
VCC - 10 V,I3 - 2 mA
f - 1 KHz
13- 2mA,f-IKHz
~- 2mA,I- 1 KHz

11

-

4.3 .

-

MHz

11

12

'-

460

-

kO

12

-

170
65

-

i ,

13

kO
dB

13

I.

-

~e~:"~N!.; ~~

11

-

III

-

dB

V

n'

,

001

I

,/

. . .,
/'

,

•

II

,

. I .....
I

INPUT BIAS NANOA. .ERES II II

Flg.4(a) - Typical ."escent "a. cU"enl va
Input "as cuttent.

,..~I.

~

AMBIENT TEMPERATURE (T.I-2!5-C

~~~ {!I COLLECTOR SUPPL.Y VOLTS (Vee l -. S

:

'·'f---H-l-++t-+--++++-+-+-HH
0.01

;
a

I

n'
-I--

oof---H-l-++t-+--++++-+-+-HH
'0

j o.8'f-+--i-+++-t--++++-t-++H
5
IDO

,..

o n7
0.01

"6
QUIESC~T

Fig.4(6'· Typical normallzeJ Inpul "'a. currenl vs
amlllen, temperature,

0.1
"
68 1
BIAS MILLIAMPERES (13)

..

5 8 10

Fig.S(o) - Typical qulescenl ope""lng cu"en'
ral'o vs quiescent hios cur,enl.

-75

2.

-50
-25
so
AMalENT TEMPERATURE IT,Al-·C

'00

Fig.S(b} - Typical quiescent operating current
,atio V$ ambient temperature.

___________________________________________________________________ 125

CA3058, CA3059, CA3079

Zero-Voltage Switche.
For 50/60 and 400 Hz Thyristor Control
Applications
The RCA-CA3058, CA3059, and CA3079
zero-voltage switches are monol ithic silicon
integrated circuits designed to control a
thyristor in a variety of AC power switching
applications for AC input voltages of 24 V,
120 V, 2081230 V, and 277 Vat 50/60 and
400 Hz. Each of the z~ro-voltage switches
incorporates 4 functional blocks (see Fig. 11
as follows:
1. Limiter-Power Supply-Permits operation
directly from an AC line.
2. Differential OnlOff Sensing AmplifierTests the condition of external sensors or
command signals. Hysteresis or proportional-control capability may easily be implemented in this section.
3. Zero-Crossing Detector-Synchr~nizes the
output pulses of the circuit at the time
when the AC cycle is at zero voltage point;
thereby eliminating radio-frequency interference (R F II when used with resistive
loads.
4. Triac Gating Circuit-Provides high-current
pulses to the gate of the power controlling
thyristor.
In addition, the CA3058 and CA3059 provide the following important auxiliary functions (see Fig. 11:
1. A built-in protection circuit that may be
actuated to remove drive from the triac if
the sensor opens or shorts.
2. Thyristor firing may be inhibited through
the action of an internal diode gate conn~cted to Terminal 1.
3. High-power de comparator operation is
provided !ly overriding the action of the
zero-erossing detector. This is accomplished
by connecting Terminal 12 to Terminal 7_
Gate current to the thyristor is continuous
when Terminal 13 is positive with respect
to Terminal 9.
For an explanation of these functions see
Operating Considerations_
For detailed application information, see companion
Application Note, ICAN-6182, "Features and
Applicatiolls of RCA Integrated-Circuit ZeroVoltage Switches (CA3058, CA3059, and
CA3079)".
The CA3058 is supplied in a hermetic 14-lead
dual-in-line ceramic package. Types CA3059
and C.A3079 are supplied in 14-lead dual-inline plastic packages.

IEUTIVI TlMHIIIATUM Cor:"ICIINT

AC Input Voltage
(50/60 or 400 Hz!
VAC

Input Series
Resistor IRSI
kn

Dissipation Rating
for RS
W

2
10
20
25

0.5
2
4
5

24
120
208/230

277

NOTE:
Circuitrv. within shaded areas, not included in

CA3079
• See chart
• IC = Internal Connection - . DO NOT USE
(Terminal Restriction applies only

to CA30791.

Fig. '-Functional block dillflram of CA3058, CA3059, and CA3019.

Features

CA3058

CA3059

~

..;
..;

..;
..;

..;
..;

..;

..;

_ 24V, 120V, 208/230V. 2nV at 50 6O,or
400 ttz operation ................... ..
_ DiHerentiallnput .•.•..•...•.......••
_ Low Balance Input Current (max.) iJA •.•..
_ Built-in Protection Circuit for
opened or .horted senSOr ITerm. 14) .... .
• Sensor R..... (RX) - kn ............ ..
- DC Mod. (T.rm 12) •••..•.•...•...•.•.
• Ext.mal Trigger (T.rm. 6) •.••••••••.••.
- External Inhibit ITerm. 11 ............••
- DC Supply Volt. (max.) ............. ..
_ Operllti.,. Temperllture A..... - OC ••.•••.

2

2to 100

..;
..;
..;

14

2to1OO

2to60

v'

..;
..;
14
-66 to +125

10

MAXIMUM RATINGS,

Absolute-Maximum Values at TA = 25°C
DC SUPPLY VOLTAGE IBETWEEN TERMS. 2

AND7):
CA3058,CA3059 ................... 14V
CA3079 ...•...•..•.••.••...•...... 10 V
DC SUPPLY VOLTAGE (BETWEEN TERMS. 2
AND 81;
CA3058, CA3059 ............... ~ . .. 14 V
CA3079 •..•..............••..••... 10V
PEAK SUPPLY CURRENT (TERMS. 5 AND 7)
........................ :!SOmA
OUTPUT PULSE CURRENT (TERM. 41
150mA
PULse

POWER DISSIPATION:
"
Up to TA =750C - CA3058 •••..••..•• 700 mW
0
Up to TA=55 C - CA3059,CA3079 ... 700 mW
Above T A=75 o C - CA3058
. . • . • . • • . .. Derete Lineerly 8 mWfOC
Above T A=55 0 C - CA3059,CA3079
. . . . . . . •. Derete linearly 6.67 mW/oC
AMBIENT TEMPERATURE RANGE:
Operating .••........•..... '. -55 to +125°C
Storage .................... -66 to +1500 C
LEAD TEMPERATURE (DURING SOLDERING):
Ala distance 1/16" ± 1132" 11.59 ±0.79 mm)
from case for 10 seconds max . ...... +266 o C

10k

Applications:
-

Relay control
- Heeter control
Valve control
- Lamp control
Synchronous switching of flashing lights
On-off motor switching
Differential comparator with self-contained
power supply for industrial applications
- Photosensiti"e control
- Power one-shot control

VI·

"'"'

!

'IC.~IIO"

Fig. 2(8)-DC supply voltage test circuit for
CA3058, CA3059, and CA3079.

________________________

~

______

~

Fig. 2(b)-DC supply voltage vs. ambient
temperature for CA3058, CA3059
andCA3079.

___________________________ 127

CA3058, CA3059, CA3079
v+

ELECTRICAL CHARACTERISTICS (For all types, unless indicated otherwise)
All voltages are measured with respect to Terminal 7.

CHARACTERISTIC

TEST CONDITIONS
TA s 25 0 C
(Unless Indicated Otherwise)

LIMITS
Min.

Typ.

RS = 8 kn. IL = 0
RS= 10kn, ll-0
RS = 5 kU. I L = 2 mA

6.1

6.5
6.8
6.4

RS=8kn.ll =0
RS 10kU,Il -0
Rs = 5 kU. Il = 2 mA
RS=8kU.IL =0
TA = -55 to +125 0 C

6

UNITS

Max.

For Operating at 120 V rms, 50·60 Hz (AC Une Voltage)DC Supply Voltage. Vs
Inhibit Mode
At 50/60 Hz
At 400 Hz
At 50/60 Hz
Pulse Mode
At 50/60 Hz
At 400 Hz
At 50/60 Hz
At 50/60 Hz (CA3058)
See Fig. 2

Gate Trigger Current. IGT (4 )

.:=r"'"

OSOLLQSCOPE

7

-

V
V
V

6.4
6.7
6.3

7

V

5.5

-

7.5

V

-

105

-

mA

50

84

-

mA

90

124

-

mA

-

170

-

mA

240

-

mA

-

-

11

......

....LII!SlSTMC!
YALUI!SAII!

Fig.

Terms. 3 and 2 connected.

See Figs. 3,5(a)

VGT= 1 V
Peak Output Current (Pulsed). Term. 3 open. Gate Trigger
IOM(4)
Voltage (VGT) = 0
With Internal Power Supply Terms. 3 and 2 connected.
Gate Trigger Voltage (VGT)=O
Term. 3 open. V -12 V. VGT=O
With External Power Supply Terms. 3 and 2 connected.
V+=12 V. VGT = 0
See Figs. 5, 6
Inhibit Input Ratio, V9N2
All Types
Voltage Ratio of Term. 9 to 2
TA - -55 to +125 0 C
CA3058
See Fig. 7
Total Gate Pulse Duration:·
For positive dv/dt. tp
50·60 Hz
CEXT =0
400 Hz
CEXT - O. REXT - 00
For negative dv/dt. tN
50·60 Hz
CEXT =0
400 Hz
CEXT - O. REXT - 00
See Fig. 8
Pulse Duration After Zero
Crossing (50·60 Hz):
For positive dv/dt, tpl
CEXT= 0
For negative dv/dt, tNl
REXT = 00

GIJN

6,.)-_ output CUrT""t (puIMJd) with-'
eJCterlfll1 power supply tftt circuit for

CA3058and CA3D59.

v
V

12I1YR",5G/tIHI,OPeItATIOtI

AMIIEMTTElII'!ItATtIItIITAl- D'C
GAT! nlGGH YOL TAG( IV ,I- 0 v

0.465 0.485 0.520
0.520
0.450 -

Fig. 6(b)-PelJk output current (pulllld) ...
• xt.rnal power .upply volt.
for CA3058and CA3069.

-

70

100
12

140

tJ5
lIS

70

100
10

140

lIS
tJ5

-

50
60

-

-

lIS
tJ5

-

0.001

-

10
20

IlA
IlA

-

220
220

1000
2000

nA
nA

-

5
10
IS
EXTUtW. POIt!II SUPI"LY VOLTS (y +)

See Fig. 8

Output Leakage Current, 14
Inhibit Mode:
All Types
CA3058
See Fig. 9
Input Bias Current, II
CA3058, CA3059
CA3079
See Fig. TO

T A - -55 to +1250 C

-

9l!CM'18064

Fig. 6(c)-PelJk output current (pul..d) vs.
smbien t temperature for CA3058

andCA3059.

___________________________________________________________________ 129

CA3058, CA3059, CA3079
.100

y+. 6V

I
i~

~

i~r--T--~~~~=-~
.,Y\J"-"J----.

--

400

~

iii

~

§200
~

,&. ~

::- r-

~ :;::::. F-

0

EXTERNAL CAPACITANC[-~F

.......,

0.02

~
.-c
0

FREQUENCY

P!,PtFOR POSI-

A
860Hz
TIVE d¥/dt\
C
50 HZ} 'N(FOA NEGA- o
60Hz
TIVE liv/lit)

0.0.
0.06
EX"TERNAI.. CAPA(liANCE-,..F

0,"

0.1

M.

0.04

--

f-~

I-- ;--

CURVE

~

0.02

I

220 V RMS, 50/60-HI OPERATION
INPUT RESISTANCE tRS)d20.n

fb)

INCI-IIOII

fa)

Fig~ to-Input biBS current ten circuit for CA3058,

220VRMS

CA3059, and CA3079.

.-I~.

UO "RMS. 5Q/60-Hz OPERATIOM
INPUT RESISTANCE tRsl >10 iii);

50~iO'H' OPERATION
600 INPUT RESISTANCE
IRSI'20kR

'

seNSOR RESInANCE ~ 5 114

•

i~

'00

~~

TUMS.1ANDllCOtlM£CTEO
DC GATE CURMNT

iM)O£\~

JrdIO~9l

EXTERNAL.

CAPACITANCE-~'

0.08
EXTERNALCAPoI,CITANCE-,..'

(c)
fd)
Fig. II-Relative pulse width and location of zero crossing for 220-volt oparation for CA3058, CA3059,
and CA3079.
~

~

~

0

H

~

~

~

AMIIENT TElIIHlUTUIIlECTA'--C
HCI-II01t

Fig. 12-s"".itivity VI. ambient tamparBtUI8
for CA3058, CA3059, and CA3079.

-25

Z5

SCI

.....1i!MTTeIIPI!ItATUIIE-<

Fig. 13-OpSlBting ragions for built·in protection
circuit for CA3058 and CA3059.

~

OPERATING CONSIDERATIONS
2. Set the value of Rp and sensor resistance
(RX) between 2'kn and 100 kn.
3. The ratio of RX to Rp, typically, should
be greater than 0.33 and less than 3. If
either of these ratios is not met with an
unmodified sensor over the entire anticipated temperature range, then either a
series or shunt resistor must be added to
avoid undesired activation of the circuit.
If operation of the protection circuit is desired under conditions other than those
specified above, then apply the data given
in Fig. 13.
External Inhibit Function for the CA3058
and CA3059
A priority inhibit command may be applied
to Terminal 1. The presence of at least +1.2 V
at 10 I1A will remove drive from the thyristor.
This required level is compatible with DTL
or T2L logic. A logical 1 activates the inhibit
function.
DC Gate Current Mode for the CA3058
and CA3059
Connecting Terminals 7 and 12 disables the
zero-crossing detector and permits the flow
of gate current on demand from the differ·
ential sensing amplifier. This mode of opera·
tion is useful when comparator operation is
desired or when inductive loads are switched.
protection circuit is activated by connecting
Care must be exercised to avoid overloading
Terminal 14 to Terminal 13 as shown in
the internal power supply when operating
Fig. 1. To assure proper operation of the pro·
in this mode. A sensitive gate thyristor
tection circuit the following conditions
should be used with a resistor placed between
should be observed:
Terminal 4 and the gate in order to limit the
gate current.
1. Use the internal supply and limit the ex·
ternal load current to 2 mA with a 5 kS2
dropping resistor.

Power Supply Considerations for CA3058,
CA3059, and CA3079
The CA305S, CA3059, and CA3079 are intended for operation as self-powered circuits
with the power supplied from an AC line
through a dropping resistor. The internal
supply is designed to allow for some current
to be drawn by the auxiliary power circuits.
Typical power supply characteristics are given
in Figs. 3(b) and 3(c).
Power Supply Considerations for CA3058
and CA3059
The output current available from the internal
supply may not be adequate for higher power
applications. In such applications an external
power supply with a higher voltage should be
used with a resulting increase in the output
level. (See Fig. 5 for the peak output current
characteristics). When an external power
supply is used, Terminal 5 should be connected to Terminal 7 and the synchronizing
voltage applied to Terminal 12 as illustrated
in Fig. 5(a).
Operation of Built-in Protection for the
CA3058, CA3059
A special feature of the CA3058 and CA3059
is the inclusion of a protection circuit which,
when connected, removes power from the
load if the sensor either shorts or opens, The

______________________________________

~---------------------------131

CA3060, CA3060A Types
ELECTRICAL CHARACTERISTICS (CA3060DI
For each amplifier at TA • 250C. v+ • 6 y. y- • -6 Y

CHARACTERISTIC

LIMITS

Amllll..... _Curren,

ISTICS
CURVES

...

STATIC CHARACTERISTICS
Input Offset Voitege

VIO

110

".

Input Bias Current
Peek Output Current

MIN. TYP. MAX.

33
1.3

",b

Peek Output Voltage:
Positive

I

MIN. TYP. MAX.

14

3Il

100

70

3IlO

5. .

2.3

MIN. TYP, MAX.

260

-

5

mV

1000

nA

2500 5000

nA

IJA

15

26

150

240

4.5

4.8

4.5

4.1

4

4.6

Current leech amplifierl

".b

IA

8,5

14

0,10

0.17

85

120

850

1.45

10

'I

10
100
AMPLIFIER eiAS CURRENT IIABCI-... "

r--5-.•~-5.-95-+--~r-5~B-+5-.•-5+----+-.-.7-+-5B~r-~V

Amplifle, SuPPly

i

r---I-Aac--'-'-~----~Ir=I=Aac~'='=D~~~~Y-I-'A-ac--'-'OO--~--~UNln

".b

10M

AMBIENT TEMPERATURE ITAI-Z5-C
SUPPLY VOLTAGE :Vt.6V,Y'·6V

I

TYPICAL

CHARACTERSYMBOL

' 'put Offset Current

-cIOOOa
...
IS

4'

8

1000

F;g.'6a-Pesk output cu"ent vs. amplifier bias CU"Mt.

1200 IJA

Power Consumption
leech amplifierl

14.5

mW
-cIOOO SUPf'\.Y VOLTAGE·Vt'6V,Y---6V

Input Offset·Yoltage
Sensitivity';
Positive

I!!VloIAV +

Negative
Amplifier Bias Voltage-

V ABC

9

1.5

120

20

120

120

20

Forward Transconductance
U.... signall

1Qa,b

92'

0.3

1.55

70

110

CMRR

I.
70

4.4 to -5.1 mIR.
4.7 to -5.3 typo

Common·Mode InputVoltage Range

3Il

D...

0.54

DYNAMIC CHARACTERISTICS (at 1 kHz unless specified otherwise)

Common·Mode Rejection
Ratio

120

120

110

p,V/V

120

-

0.66

V

30

102

mmt.o

70

90

dB

4,310 -5 min.
4.6 to -5.2 typo

V

4.3to -5 min.
4.610 -5,2 typo

"

S1ewRaleITeslckt.,
Fig. 13

VIlA

0.1

SA

()pen-Loop (921)
Bandwidth

11

SWOL

20

45

12

Resistance

800

1500

90

170

10

2.7

2.7

CI

'"

Fig.6b-Peak output current vs. ambient

110

temperature_

Input Impedance
Components:

Capacitance at 1 MHz

"

AMBIENT TEMPERATUREITA)-·C UCS-IMOI

20

2.7

OF

4.'

OF

Output Impedance
Components:
Resistance

RO

Capacitance at 1 MHz

Co

14

200

20

4.5

4.'

ZENER BIAS REGULATOR CHARACTERIsTICS (I' TA' 25DC.12· 0.1 mAl
MIN. TVP. MAX.

Vz

Voltage

1 Zz

Impedance

•

15

1

Temp. Coetf. '" 3 mV/OC

4

••

10

AMPLIFIER 81AS CURRENT UA8CI-JoI-A

Fig.Bs-Amplifier supply currsnt (tNlCh
lImp/ifief') K lImp/ifier bi", cur-

rent.

...

V

~:3 VOM-tNINIWUM1[t15V SUPPL
-14

v+

v+ IS reduced to 5 VOllS for
sensltlvltv
V' is reduc:ed to ·5 \lOllS for V- Mnsitivity

(bl ~ sensitivity in P.V/V = Voffsat· VoH... f:::'~ V and -6 V supplies
V· sensitivity in P.VfV = Voffset - Votts.. t:~~t V and +6 V supplies

.-

100

I 6.7 I 7.9
1200 13IlO

,~o

10.0001 AMIIIENT TEMPEMATURE I TA )Ol!l·C
• SUPPLY VOLTAGE y-+o6Y. Y-o_6Y

I:

6.2

1

1

Temperature-coefflclent; -2.2 mV/oC lat VABC" 0.54 V.IABC·
1 IJA.; ·2.1 mY/DC lal VAK .. 0.060 V, 'ABC - 10 pAl; -1.9
mV/DC (at VABC = 0.68 V, 'ABC '" 100 IoIAI
Conditions for Input Offset Voltage and Supply Sensitivity:
la. Bias current derilled hom -.he regulator with an appropriate
resinor connected from terminal No. 1 to the bial terminal on
the amptifier under test -

I

-50

tU~PL~

4' I
10
100
AMPLIFIER BIAS CURRENT lI.ucl-,..A

Fig.7-PtJak output IIOlt.
bias current.

4

•

a

1000

vs. amplifier

AMPLIFIER BIAS CURRENT ClAScl olOOJoI-A

·j.,A-f--

I: SUPPLY VOLTAGE'V o6V.V-o-6V
f
V+oI5V.V-o-1 V

-15

YQM-ITVPICALIt;'6V

VQM_ITYPICAL) !15V SUPPLt

-25

'000

0

25

50

75

100

AMBIENT TEMPERATURE ITA )--( .tCS~I"OI

FiI/-Bb-AmpJlfIBt' Wpp/y curreflt leach
IImp/iffer} lIS. ambient tempera-

..

,

4.

a

488

10
100
1000
AMPLIFIER BIAS CURRENT IIABC1-,.,A gaCS-I'6I7

Fig.9-Amplifier bias voltage
fler billS current

lIS.

ampli·

ture.

_________________________________________________________________ 133

CA3060, CA3060A Types
921 = AOl/Rl
8
4

SUPPLY VOLTAGE Y+.6Y, Y-.-6Y
Y.'15Y,V-'15Y
FREQUENY III· 1kHz

= 100/18 kG

'·~-r--r-rrr--r--t-~+--+--+-t1H

i

~

~100/'

5.5 mmho

(R L :: 20 kG in parallel with 200 kG

~

!

L.·'.I"

~

.,1' '.,.

·Ii,·

46'

4

10

6.

100

4

AMPLIFIER BIAS CURRENT IIA8C1-.. A

liS.

r

!',-:'"

'" 18kll)
2. Selection of suitable amplifier bias current.
The amplifier bias current is selected from the minimum
value curve of transconductance (Fig. lOa) to assure that
the amplifier will provide sufficient gain. For the required
g21 of 5.5 mmho an amplifier bias current IABC of 20 IlA
is suitable.
.

U·
i

I'

1000

''''''

!tl!CS-".20

Fig. 14-Output resistance

L'

BIAS REV'OI"TA
I upen-Loop tsandwldth
aWOL
I Slew Rate:
Unltv Gain
SR
Comparator

R

Output Resistance
Equiv. Input NOise Voltage

AlL

EqtHV. I nput NOise Current

5
63

JdB Ul
Sec Figs.

TranStent Response
I nput Resistance

H", ...... 10 Kn
RS ',10 K••

20.21
10"., to 90"~
Rise Time

eN(10Hll RS
'N I1OHz ) RS

6

6

VJ

70
2

70
<

0027
05

0.04
15

0.04
1.5

3
7.4
1
40

25
1.7
OS

2.5
0.S1
O.S
25

0
1 M~!

-

I

02.

/iV/oC
pAloe
kH,

4..

2

10
100
1000
TOTAL OUIESCENT MICROAMPERES tIOI

4 ••

I000O

2

Fig.4 - Input offse' cUTnmt vs. tolill quillSCllnt curr.",.

V//iS
/is

Mll

v

K!!
nV/yH,
pA/yH,

-;tfELECTRICAL CHARACTERISTICS, It T A = 2SOC
Typical Values Intended Only for Design GUidance

2

C~

CA3078Al
CHARACTERISTICS
SYMBOLS

Y+=.1.JY,
V-=-1.3V

RSET ' 2 Mr!
' 0 ' 10jJA
V

,n

y+ '" +0.15V.

V-·-0.15V
RSET ·,0Mfl
IQ=1JJA

0.1

0.9

10
18

V.J

v.v,.

Am

.'J:l

S4
.u

D
VOpp
VieR

CMRR
10M!

dVlO/dv'

-I-... +-

a

TYPICAL VALUES
V· '" +1.3V.
V-= -l.JY
RSET'" 2

Mn

' 0 ' 10jJA

30781
v+ = 0.75V.
Y-"'-0.75V

j

468

2461

2 4 .. 1

r-:- T

2468

10
100
1000
TOTAL QUIESCENT MICROAMPERES 1I01

10000

Flg.5 - I"pur bias current vs. total quiescent current.

UNITS

RSET"0Mn
, 0 . , jJA

1.3

1.5

"'v
nA
nA

~f-+--+~H--+-r+~-I-~t-H~

65

SO

0.5
1.3
GO

dR

;

2"
14

1.5
0.3

Lt.

14

'"

/iW

0.3

-O.S

'0

-0.2

-O.S

-0.2

to
+0.5

to
+1.1

'0

v

+1.1

+0.5

100
12

90
05

100
12

9D
0.5

dS
mA

20

50

20

50

J.1V:v

J.

uqo
.u

jJA
v

a
t+1-~-++ H-+-+~-I'"

126r-.

lOB

LOAD R£SISTANCE IR 1'1 MA

~ ~ :r n:~•.: . ~
"o

.,.

.0

--t---i--+++--if-+-+-fl"

. ..

+-H-t-+-++ft--+-H-fl
10
100
TOTAL QUI£SCENT MICROAMPERES IIQI

'000

Fig.6 - Open·/oop vo/rll!lfl gain v.s. totlll quiftC6fll current.

__________________~------__------------------------------------------143

CA3078, CA3078A Types
~t

,

•

~

.

0.'

~

!I

'r-

~
§

'r--

~

..

4 68 10" "

4

6

er;s

2

4'

I

2

FREQU£NCV (')-HJ;

4 (;

'If?

92C5-2026'

I\..

'f\.

!

j

II

: ,\i

e

ti-t i
~, J.L~..JJLL
Iii

r---

20,.A -

I

~

,

4

68 10

,

...

,

68 10

4

RESISTOR-CAP'ClltlR
COMPENSATION
RI-CI BETWEEN
TERMINALS 19;8)

CAPACITOR
COMPENSATION
(BETWEEN TERMINALS I

I

81

~0.75

1----

IUI'I'LYVOL".V· .... V· •

S

OI.JII$CE~Teu""E~TlIol.,OO~ ...
MlIIENTfEM",U.TUJI.I!IT... I.ztj·C
LOAOIMl'EOANCE:AL·IOKU.CL·'lIIIpF

0.5

."

t

, I

FUDIlACKRUI$'... NlCIIRFJ·o.,.J
OUTf'UYVOLTAGEIV"",I"OV

:~S~:M~~~ :':A~~':':~
ONA1OOmVDUTl'I.IlliGflAL
IA,. C, ~ 2.5 .,0ill

o

00

~

~

~

ro

60

~

CI..OSED-LOOP NON-INY!:ftTtNG VOLTAGE OAIN- ""

46811i'

FREQOENC'I' (fl-HI

Fig.,9 - EquiWllent input noi,e cumlnt

Fig. IS - Equiwtlenr input noile voltage vs. freqlAncy.

- 125

t

--1-

'i'0

SUPPLY VOLTAGE: Y+-SV,V---6Y
AMBIENT TEMPERATURE tTAI-ZS-C

I

VI.

Fig.20 - Slew rate ~_ closed-loop gain
lor 10 = '00 jJA - CA3078T.

ftwqUtmcy.

...• M

lOA
~=~ITOR
3i
(R,-C. BETWEEN

....

CAPACITOR
COMPENSATION

TERMINALS 1&8)

(BETWEEN TERMINALS Ie 8)

~ 03

SUNIL'I'VOlTS,y·· ...

~

iii

V-··. ...

QUIUClNT ctJRR~NJ IIQI-

ao~

_ENTTEMnRATUREfT,t,I_Zfj"c

Q2

1.OAD",IIP£IIIWC£:RL-l01CItCL-'eo ••
fU"'CIt~UIS"'MCt:IR,I-all11il

OUlPUTVOLTAGE!YOfPI-'1V

0.'

:sE~~:~::~~~~
(A,.
C, .. ~.II1"1

•
00
~
~
~
~
CI..OSEtH.OOl" NON-INVERTING VOLTAGE GA~
06
liJ
29:7 40
50
80

~

•
dB

76

CLOSEQ-LOOP IN\'ERnNG VOLTAGE GAIN- dB

~

RI
IOPTIONAL
RZ-CZ ICOMP.

86

921=5-17554111

Fig.22 - Transient response and slew·rate,
unity gain (inverting) test circuit.

Fig.27 - Si8w r.te w. clos«J./oop gain
fDr IQ .. 20 pA - CA3078A T.

Fig.23 - Slew, rate, unity gain (non-jnYfH"ting} test circuit.

Table I - Unity-glln sa.w nit. VI. compHUtion - CA3078T and CA3018AT
SUPPL V VOLTS: V+ - 6. V' =- ..

TRANSIENT RESPONSE: 10% OVERSHOOT FOR AN OUTPUT
VOLTAGE of 100mV
AMBIENT TEMPERATURE ITAI - ftOc

OUTPUT VOLTAGE IV O) - ±6V
LOAD RESISTANCE IRLI • 10 kG

~

i
i
I

/ 'I: ~~~fg~TOR

COMPENSATION
TECHNIQUE

4 (RI-C, BETWEEN
TERMINALS I

a 8)

'\.1

I
20

'0

40

I

I I
'l\. I I I I
50
60
70
80
90

CLOSED-LOOP NONINVERTING VOLTAGE GAIN -

06

~

~

~

~

~

•

CLOSED-lOOP INVERTING VOLTAGE -

dB

m

00
dB

F;g.24 - Phase compensation capacitance
I'$. closed-loop gain - CA3078T.

.,

UNITV GAIN !INVERTING. Fig. 22
Cl

.2

C2

kG

/6'

CA3Il78T-I Q =1001JA

kG

.F

Single Capacitor
Resistor & Capacitor
Input
CA3078AT - 10 .. 20 pA

0
3.5

750
350
0

~

300
100
0

~

Single Capacitor
Resistor &: Capac:itor
Input

~

0

I.
~

~

0.25

~

0.644

SLEW
RATE

.,

UNITY GAIN (NON-INVERTINGI Fig. 23
Cl

.2

C2

SLEW
RATE

kG

/6'

VIP.

VIP.

kG

.F

0
0
0.306

0.0085
0.04
0.87

0
5.3

1500

0
0
0.156

0.0095
0.027
0.29

~

0
34
~

500

n
800
125
0

~
~

0.311
~
~

0.77

0
0
0.45

0.0096
0024
0.67

0
0
0.'

0.003
0.02
0.'

".0
510kG

.'

::;}-®------+,

t.SV
CELL

~AA"

"
o

moo.

~

.00. .

~

CLOSED-LOOP MOHINVERTING VOLTAGE GAIN'- dB
191

29.7

40

50

60

CLOSED-LOOP INVERTING VOLTAGE -

70

90

dB

Fig.25 - Phase compensation capacitancs
VI. closed-loop fIlIin - CA3078A T.

Fig.27 - Inverting 2O-rJB amplilisr circuit.

Fi9.28 - Non-inverting 2O-dB amplifier circuit.

----------------------___________________________________________

1~

CA3080, CA3080A Types
ELECTRICAL CHARACTERISTICS
For Equipment Dasign

TYPICAL CHARACTERISTICS CURVES AND
TEST CIRCUITS (Cont'dl
TEST CONDITIONS
CA3080
CA3080E
--15V
CA3080S
IABC=500IJA
LIMITS
TA a 250 C
(unless indicated
Min.
Typ.
Max.
otherwisel

CHARACTERISTIC

I nput Offset Voltage

VIO

Input Offset Current

110

Input Bias Current

-

II

Forward Transconductance
Oarge signall

gm

I

Peak Output Current

110M

Peak Output Voltage:
Positive

V+OM
V OM

Negative
Amplifier Supply Current

5
6

mV

0.12

0.6

p.A

2

5

TA=Ot0700C

-

9600

7
13000

TA = Oto 700C

6700
5400

-

-

RL

=~

IA

;"VI O/;"V

Common·Mode Rejection Ratio CMRR
Common·Mode Input·Voltage
Range

VICR

Input Resistance

RI

I nput Offset Voltage

VIO

Input Offset Voltage Change

IABC = 500IJA to
I;"Vlol IABC = 5IJA

Peak Output Current

10M
V+OM
V OM

Slew Rate:
Maximum (uncompensated I
Unity Gain (compensatedl
Open· Loop Bandwidth

IABe = 511A

IABC=5I1A

IABC = 0, VTP = 36 V
IABC = 0, VOIFF - 4 V

Differential I nput Current

Amplifier Bias Voltage

IABC= 511A

IABC - O. VTP = 0

Magnitude of Leakage Current

p.A

.:
2

IJmho

0.1

I

12

13.5
-14.4

-

0.8

1

1.2

mA

24

30

36

mW

-

-

150

80
12 to
-12

110
13.6 to
-14.6

10

26

Fig.5 - Input bias current as a function of
amplifier bias curren t.

IJA

V

_

IO~

SUPPLY VOLTS:V+·+I',Y-.-15

IJV/V
dB

-

V

-

kU

VABC

mV

0.2

mV

5

IJA

BWOL

~~14'r:l=~!t~t:~~::~~~~V~~~M'~~
!;;,a.5~
V"'OAI

i 1!iJ-+-+++f-+-+-f+l-f-H-f+--1-H-H

V

~~ °r-t-rttr-r-r~r-r-rttr-r-rtH

nA

~ ~'::f-+-+i-f+-+-++I+-++++f-+-+-!+I

nA

0.71

V

~ t':~=!=!~~+::t::t:~~:~~:~::~~v.~o.~;~~
.V-CMR

V/IJs
MHz

CI

f= 1 MHz

3.6

pF

Co

f= 1 MHz

5.6

pF

15

MU

f = 1 MHz

0.024

pF

RO
CI-O

I

2

4

'I

10

2

4

I'

100

2

4

III

1000

92CS-17592

Input Capacitance

Input·to·Output Capacitance

I

AMPLIFIER BIAS MICROAMPERES (lABC'

Output Capacitance
Output Resistance

I

SUPPLY VOLTS: Y--+15, Y-·-15

0.1

SR

1000

_14.5 ~;E:;s~;~=:~!~~.E~rA )"2S·C H-tt--t-Htl

>

0.008

75
50
2

.. I I

ueS·,7l1,.
Fig.6 - Peak output current as a function of
amplifier bias current.

0.3

0.3

"'1

I
10
100
AMPLIFIER BIAS MICROAMPERES I IAliel

CA3080
CA3080E
CA3080S

0.08

"'1
1000

100

'2CS·1711~

-12

13.8
-14.5

.. II
10

AMPLIFIER 81AS ,.ICROA"PERES (.IABCI

650

-

-,,-,
I

0.1

500

150

i

•

2

ELECTRICAL CHARACTERISTICS
Typical Values Intended Only for Dasign Guidance

Peak Out'put Voltage:
Positive
Negative

350
300

~

II!

-

RL = 0
RL = O. TA = 0 to 70 0C

-;. lOll
~

-

Device Dissipation
Po
Input Offset Voltage Sensitivity:
Positive
;"VI O/;"V+
Negative

UNITS

TA = Oto 700c

0.4

..

10: SUPPLY VOLTS:V+'+15.V-=-15

v+= 15V. V

Fig.7 - Peak output voltage as a function of
amplifier bias current.
10: SUPPlY YOLTS: "'+.+15,"'- __ 15

+W

461

0.1

I

10

100

4.1

1000

AMPLIFIER BIAS MICROAMPERES (:IA8)~CS_I7!i9l

Fig.S - Amplifier supply current as a function of
amplifier bias current.

______________________________________________________________________ 147

CA3080, CA3080A Types
TYPICAL CHARACTERISTICS CURVES AND TEST CIRCUITS (Cont'dl
SUPPLY VOLTS; II ·.'5,V-'-15

SUPPLY YOLTS:V+.+I!5,V --15
AMBIENT TEMPERATURE (TA'=25°C

..
d

100

~ :~

/

10

!:

/

;

I

i

..,
2

~

0.1

0.01

I

2

3

4

... ,

INPUT DtFf'EREHTIAL IIOLTS

0.1

Fig. 13 -Inputcurrentasa function of
input differential voltage.

10

100

2

0.1

1000

7 SUPPLY VOLTS: ,,+,+15,""'-15
FREQUENCY ttl' 1111Hz

l800'~+-~~~t-+d~~~~~~==~~

T

v

~ roo'~+-~FRr-+-+-Hi~~+i~~--~~

~~'I--+-~rH~~~H1~I--t11t-1--I-t~
~

~

i

! ~'I-~-+-1-+H--+-+-H+--+-+11+-+-~+H

§

~

~ 300'~~~~F-+-+-Hi--~+i~~--rt~

61

~;~~~~~~~~~~~~~~~~

.

I(jll

~

loo~+-+t-tlr-+-+-Hi--~+i~-+--rt~
I

..

~ 10',

;~O,~:~--:~=~~~=~=~:~~=~~~~~~~:~::~~~

ii 400r -

0.1

SI

=~TVl?hT,:,;:;~;:t:Y;~;--~!5ec ~

":Sk:-

AMIIENT f'tMPERATURE ITA" 25'C

~'~.-.-rnr-r-'-nT--~+i~~--rt~

..

I
10
100
1000
AMPLIFIER 81AS MICROAMPERES (:rABe'
92CS-17100

Fig. 15 -Input resistance as a function of
amplifier bias current.

Fig. 14 - Transconductance as a function of
amplifier bias current.

SUPPLY VOLTS:V ••• 'S, '1-'-15

U

.. 61
I

AMPLIFIER BIA!; MICROAMPERES ! IAeC~2CS_17'99

92CS-ln••

10

100
1000
AMPUFrER 8.AS MICROAMF'ERES I IA8C~2CS_I7IOI

0.1

2

.. , .

I

2

4

'8

0

2"

sa

2

•

KlO

,.

1000

10

,1!I-!IIII!I"!!lII'I'IIII--!-I1il
I

11

.. IS.

AMPliFIER elAS MICROAMPERES (IAeel

2

.. I I

1000

Fig. 18 - Output resistance as a function of
amplifier bias current.

Fig. 17 -Input and output capacitance asa
function of amplifier bias current

Fig. 16 - Amplifier bias voltage as a function of
amplifier bias current.

...

I
.. al
I
10
00
AMPLIFIER 81AS MICROAMPEIIES (:lAScl

AMBIENT TEMPERATURE (TA'-Z50C

v·

...

~M6

FREQUENCY(f'-IMH,

::;
; ODS

60D4

§

SUPPLY

Fig. 19 - Input-to--output capacitance test circuit.

v+.t5v

10

VOt.TS-tV~Y-1

"

Fig.20 - Input-fa-output capacitance as a
function of supply voltage.

APPLICATIONS

V+"15V,V~=-15V

LOAD
(SCOPE PROBE I

$In

.OOI~F

nC5-24034

Fig.21 - Schematic diagram of the CA3080 and CA3080A in a unityllain voltage follower
configuration and associated waveform.

___________________________________________________________________ 149

CA3080, CA3080A Types

ALL. RESISTORS 1/2 WATT
UNLESS OTHERWISE SPECIFIED

TOP TRACE; OUTPUT
(SO mY/DIY. AND 200ns/DIY.)
BOTTON TRACE·· INPUT
150 mY/DIY. AND 200 ns/OIY.)

92CS-226!9R!
92C5-27883

Fig.28 - Input and output response for
circuit shown in Fig. 25.

Fig.29 - Thermocouple temperature control with CA3D79 zero voltage switch as
the output amplifier.

+7.5

.,
INPUT

2 K

l

SAMPL.E O Y l r . - .
STROBE
HOL.D

15 K

-7,5

Fig.3D - Schematic diagram of the CA3080A in a samplehold circuit with SiMas output amplifier.

TOP TRACE: OUTPUT-5y/01". a 2jA-S/D1V.
CENTER TRACE: 01 FFERENTIAL. COMPARISON OF
INPUT a OUTPUT-2 mY/OIV. a 2 fu/OIY.
BOTTOM TRACE: INPUT-5 VIOl". a 2 fu/DIV.

Fig.31 - Large-signal response for circuit shown
in Fig. 30.

TOP TRACE: OUTPUT-2DmV/OIV. a IOOns/DIY.
BOTTOM TRACE: INPUT-200 mY/OIV. a lOOns/DIY.

Fig.32 - Small-signal response for circuit shown
in Fig. 30.

______________________________________________________________________ 151

CA3081, CA3082 Types
ELECTRICAL CHARACTERISTICS at TA - 25°C

For Equipment Design
LIMITS

TEST CONDITIONS

CHARACTERISTIC

Typ_
Char.

SYMBOL

Collector-to-Base Breakdown Voltage

~
Fig. No.

V

V

60

20

60

16

24

5

6,9

-

30

68

-

VCE - 0,8 V,IC- SOmA

-

-

40

70

-

Ie - 30 mAo 18 - 1 mA

3

-

0,87

1.0

Collector-ta-Emitter Breakdown Voltage

V BR CEO

IC - 1 mA, IB - 0

Emitter-to-Base Breakdown Voltage

VIBRIEBO

IC-500j.IA

DC Forward·Current Transfer Ratio

hFE
sat

Max.

20

IC - 500 j.IA, IE - 0

Vse

Typ.

-

VIBR)CES
Collector-ta-Substrate Breakdown Voltage VIBR)CIO

Base-ta-Emitter Saturation Voltage

UNITS
Min.

ICI - 500 j.IA, IE - 0, IB - 0

VeE -0.5 V,le"" 30 rnA

V
V

V

Collector-ta-Emitter Saturation Voltage:
CA3081, CA3082

VeE sat

CA3081
CA3082

Ie:::: 30 rnA, fa:: 1 rnA

-

-

0,27

0,5

IC - 50 mA, 18 - 5 mA

4

0,4

0,7

Ic' SO mA, IB - 5 mA

4

-

0,4

0,8

-

10

~A

1

~A

°

Collector·Cutoff·Current

ICEO

VCE -10 V, IS -

Collector-Cutoff Current

ICBO

VCB -10V,IE-O

-

V

TYPICAL READ-OUT DRIVER APPLICATIONS

~

'~SE'.,",'"

1/7 CA30al
-THE R£SISTANCE FOR II: IS DETERMINED BY THE RELATIONSHIP

11:.

Vp-:a~l-E\/~:LEDI

92C5-ITM]
R-O FOR

WHERE:

VP'~~~~~LSE
VF'~8r:BJ~'\'EE

3

5

1

____________________________________________________________

-

Fig.7-SchemBtic dillfTBm showing one trIIfJIistor of
the CA3082 drllllnq s Hght-emltting diode
(LED),

-

FIg.6-Schematic diBfTsm showing one tranlistor of
the CA308' driving one regment of an incMJ·
descent disploy,

Vp~VaEtVFILEOI

-

{COMMON [MIT TEA)

~

FAOM

DECODER'

INCANDESCENT DISPLAY

III:CA-0II:2000 SERIES
OR EQUIVALENT I

CA3083

SET DC fORWARO-CURRENT TAAr4SfE!'r !'rATIO (lifE" 10

I.
I

:=T~E:::: (_"+"..,"'_"_'_+--_+*--+..,
/

c------ r--0_8r-----'-I--- -" -" - f-""
06f-------- -

/

J

O"'f--t--+ -+-+-+-V--7'/'+-/Tt--t-+-1

O"'I---+::;....!l~"'··r'~=--Ic-:++"::;;>-4/'--I--+-+-I
r----

I SET DC fORWARO-CURRENT TRANSfER RATIO (IIfEI • to'
AMBIENT TEMPERATURE (TAl' 25°C

-r--r-+-+-l

0.9--

-_._----

----"-Z 0"'f--f---t---+-+-+::::7"4V
--t-t-t--1

II
/

i

!

t1PIC/loL

i
~
~

*
'0

'0

COLLECTOR MILLIAMPERES !ICI

COLLECtOR MILLIAMPERES !Ie I

Fig.6- VSEsatvslc

TYPICAL STATIC CHARACTERISTICS FOR DIFFERENTIAL AMPLIFIER

i : i~~;:~T O~E~~~!:;~~~R ,;~~~~~~~E )-3 V
I

~

..

,

,

•

,

10

COLLECTOR NILLIAMPERES (ICI

Fig.7 - V 10 vs Ie (transistors
ampii/;tH).

at and 02 as a d;fferential

COLLECTOR MILLIAMPERESlIc) 92C5-17169

F;g.8-l lo VI Ie (trans;stors

at and Q28$ a differential

amplifier).

______________________________________________________________________ 155

CA3084
STATIC CHARACTERISTICS FOR EACH TRANSISTOR

ELECTRICAL CHARACTERISTICS at T A' 26"c

For Equipment DesIgn
TEST CONDITIONS
Typ.
Charac-

SYMBOL

CHARACTERISTICS

LIMITS

UNITS

mis'ics

~
Fig. No.

Min.

Typ.

Ma)f.

For Each Transistor:

Coliector·Cutoff Current

IcaO

Vca'" -lOV,I E :: 0

-0.055 -100

nA

Collector-Cutoff Current

ICEO

Vce - -10V,'B- 0

-0.12

nA

CoUector·to·Emitter Breakdown Voltage

VIBRICEO

ICE = -l00jAA, IS = 0

-40

-10

V

Collector·to-Base Breakdown Voltage

VISRICBO

ICB = -l00jAA, IE = 0

-40

-80

V

Emitter-to-Base Breakdown Voltage

VIBRIESO

IES=-l()()pA,IC- O

-40

-100

V

40

100

V

IEI - l00jr-+
\++I---I---+--++I--+---+-t--H

= -5V,

Term. 13'" Gnd.
IS'" -l00IAA,

10

0.85

1.00

1.15

11

0.90

1.00

1.10

~ O"f--+--TI\+t-+--+--t-+-t+---t-H-ti

~~I--+--+-~r--r-+-+-t+---t--+-rH

,l

~MI---r--~-+t~~t--t-+tt--t--t-t-H

I=or Transistors 05 and 06 (Darlington Configuration):
Collector·Cutoff Current

ICEO

Base-ta-Emitter Voltage

V8E

-1.0

VCE '" -10V, 18 '" 0
IE = l()()pA, VCE = -10V

DC Forward·Current Transfer Ratio

68 I 2 .. 6810

..

STATIC CHARACTERISTICS FOR DIFFERENTIAL AMPLIFIER

For Transistors 03 and Q4 (Current·Mirror Configuration):

Collector Current (Normalizedl

t

0.01
0.1
EMITTER MILLIAMPERES IIEI

Fig..7-h FE VS'E"

For Transistors 01 and 02 (Asa Differential Amplifier):

Magnitude of Input Offset Voltage

.. 68

0.001

hFE

13

0.92

1.01

15

100

1230

1.20

. ..

...

r---..

~A

V

10
100
COLLECTOR MICROAMPERES (lci

Ftg.8-VIO

VI

Ie. (transistors al and

02 as a differential
ELECTRICAL CHARACTERISTICS at T A· 26·C
Typicll Valu.lntended Only For Design Guidance

VCE "

1000

9:lCS-11Sll

amplifier~.

10V

Magnitude of Temperature Coefficil!!nt:

VSE (for each trwIsistorl

I"'VBE''''T I

IE = l00jAA,

6

-1.18

V10 (as a differential amplifier)

I"'Vlo''''TI

VCE = -10V

9

0.54

VSE IDar1ington configuration)

I"'VsE''''TI

mVf'C

Ilvf'c

-3.1

14

mvf'e

For Each Transistor:

Input Resistance

RI

f'" 1kHz, VeE'" -10V,

19

Output Resistance

RO

Ie =-l00j----------OC"-C"c'K _leD

fUO

O'IqU'~"'1

.. C.Ic ....1tI A,ppI. RIje<;I,o""Qm 2OtOllEIIVOUTI

Aippl.AIIjKIion -II

&n:1.1.0II-

I. AfI,n,A'ppI.AIJe<;I,onlw.hCAEf '2"f

I--

Fig. 13- Test circuit for ripple ~jecrion and output ,.stance.

i

!I''<''I)

VOUT

'sc.

VpuLSE
GEN.

I,

__ t

l,LLs/cm

92CS-t9001

"OUT,IIIY
1000I!SCENT

CD

OPEN

YOUT 'II.U.I "50 • 40 GIOUND

CLOSED

YOUT IIiIN.)

~

10k

• • TO •. MD. 1

Fig. 15- r.t cin:uit for

VRE~

--.l.

·ntELlIIITINGCURllErotTIS
INVERSELY PROf'OItTIOHAL to
RSCp(SHOIrT.CIRCUITPROTECTIOHRESISTANCEI

'quiescsnt, Vour/max.).

Fi,.14- Tum-on IIIId tum-off recovery time test circuit with
associated Wllveforms.

Fig. 16- T.t circuit for #miting CUmtnt

VouTfmin.).

TYPICAL REGULATOR CIRCUITS USING THE CA3085 SERIES

"

STANCORTPl

I

G,
D,

~,llH~''"
BU."

~lJ

v,.

".n

.n.

R,·
9-®_~_~~OUTPUT

w

BlACKIEtI

'"'
'"
O.OOI~F

ALL ItESIIT.uKE "ALUES AIlE IN

'OUT,lSV .. .lGYfOyO'IG ..".
REGULATION' 0 ftfLIHE AHD LOADI

IIPf'LE

~O.S ..V "'T

FUlL LOAD

Fig. 17-AppIiClltion of me CA3085 Seritls in • rypiul power
lUppIy.

~S

_

III. IICA·lttl76lA OR EOUt'ALENT
OI·IIC ... ·2MSJl1011'EQUJ' ... L£NT
'''1· G.7tLIII.\lq

Fig. 18- Typic" switching regulator circuit.

ALLREmUNCEYALUESAREtNOHIiS
Ot !KAltoIllD10REOUIVALENT
AliT p·N·"S/LICON TRAIiSISTaR
IRC"'1IlSJI10ilEQUIYALEMTI
OJ ANYN·p·NStLtCONTRANStSTOILTHAfCAN
HANDLE THE OEilREO LOAD CURREHT
(RCA·INl1110REOUtVALENTf

Ol

ZOO.A~l(."!!lA

ot

ANYN.p.N51L1CONTR ... NStSTOR
THATCANHAHDLEA1A
LOAD CUI RENT SUCH A~
II(A lNJ111 OR EOUIYALENT

-'OUT

.~III:IR1)

'ISCp 5HORT·ClltCUtT
pltOTECTIONRESISTANCE

Fig.21- Combination positive and negative IIOItage regulator
circuit.

Fi,.20- Typical current regulator circuit.
Fig.19- Typlul high-currtlflt voltage regulator circuit.

___________________________________________________________________ 161

CA3086
ELECTRICAL CHARACTERISTICS at T A· 25°C Typical Valu.. Intendod Only for Dotill" Guidance

TYPICAL STATIC CHARACTERISTICS FOR EACH TRANSISTOr<

TEST CONDITIONS

CHARACTERISTICS

Typ.
Char.teristics

SYMBOL

COLLECTOR-TO- BASE VOLTStVcw'3

TYPICAL
VALUES

UNITS

Curves
Fig. No.
DC Forward-Current

Transfer Ratio
Base-ta-Emitter Voltage

hFE

VCE ' 3 V

V BE

VCE ' 3V

VSE Temperature Coefficient

<1V BE /<1T

Collector-to-Emitter
Saturation Voltage

VCEsa'

IC' lOrnA

4

IC- 1OI'A

4

54

IE= lmA

5

0.715

IE' lOrnA

5

O.BOO

VCE ' 3V,I C '

's'"

lmA

100

6

V

-1.9

-

lmA, IC' 10mA

V

mVI"C

0.23

V

0.'

oz.

"

-",

AMBIENT TEMPERATURE (TAl-*(;

I ' lkHz,V CE ' 3V,

NF

Noise Figure (low frequency)

-

IC' 100000A, RS' 1 k f!

3.25

dB

Low-Frequency. Small-Signal
Equivalent-Circuit Characteristics:
Forward Current-Transfer Ratio

hI.

Short-Circuit Input Impedance

hie

Open-Circuit Output Impedance
Open-Circuit Reverse-Voltage
Transfer Ratio

7

-

100

7

3.5

kf!

hoe

7

15.6

,umho

hr.

7

YI.

a

31 -j1.5

mmho

9

0.3 + jO.04

mmho

0.001 + jO.03

mmho

I ' 1kHz, VCE ' 3V, IC' lmA

-

1.8 X 10-4

Admittance Characteristics:

Forward Transfer Admittance
Input Admittance

Vie

Output Admittance

Vo.

10

Reverse Transfer Admittance

vr•

11

See Curve

12

550

I· lMHz, VCE ' 3V, Ie' lmA

Gain-Bandwidth Product

'T

VCE ' 3V, IC' 3mA

Emitter-ta-Base Capacitance

C EaO

VES ' 3V, IE' 0

Collector-ta-Base Capacitance

CCSO

VCS -3V,I C ' 0

-

CoIlector-to-Substrate Capacitance

CCIO

VCI ' 3V,I C • 0

-

~

V

4680.1

MHz

0.6

pF

0.58

pF

2.8

pF

2

"68 1

"

6 810

COLLECTOR MILLIAMPERES (Ie)

Fig.7- Normalized hfti- hie' hOlY hre VI 'C'

~=~~U:::A~r,:Ar.:·JM'UT
COLLECTOR-TO-EMITTER VOLTS(VCEl-3
COLLECTOR MILUAMPERES{IC)-I

4

~

1130
!~I

z-.
8:e

;;

-10

~~
QI

ii~i '~+--r++r-+--rttr-+-~ttLLV-~
'!~4--+~+--+-1-+tr-i~rti1--~

--

10

0

boe

i~ 41~+--rttr-+--rttr-+-i-ttrl~
.3

2

n

I~

.......

t - '-!b

§~5 I~~~H-~~H+-+~~~~
/
~

... ... ... , .
1'--

2

V

2

100

IFREOUENCY (f)-MHr
"

Fig.8- Yfe

lIS

.68

468

I
10
FREQUENCY ill-MHz

INPUT

I

e

TSIVW-3
'1

I'

IN

_

'"
"-

-I

!I~,

i

I~
ell

2

. ..

,

. .."" , .

fREOUENCY(fl-MHI

Fig. 11- Yre lIS f.

2

1~2"""'681OO

FREQl£NCY(fl-MHz

-'--'r=r=r=r=l Fig. 10- Y oe VI f.
COLLECTOR-TO-EMtTTER VOLTSIVcEI.;'

~E::Ai~A:T~~~~lfS

1

0.1

100

Fig.9- Yie llS f.

f.

CMIION-EMITTER
AMBlENT TEMPER
COLLECTOR-TOCOLLECTOR MLL

if

.68

AMBIENT TEMPERATURE !TAI·~·C

......... .

L:~~

> :' ..

·.·1<2 .•• ·•·

800 •••••••••••••••

·.B ••••. ,' .••.••.•• :iii i :i

:,lootl.;·
. ·...·.H•.•.•.•·.

···r:.

I·:::

I

2

;,

4

!i

6

7

.i~

.................

~:::;.

8

9

10

COLLECTOR MILLIAMPERES Ucl

Fig.72-f T vsIC·

____~--~------------------------------------------------------------163

CA3091D
ELECTRICAL CHARACTERISTICS. For Equipment De.ign

I

LIMITS

TEST CONDITIONS
CHARACTERlmcs

Circuit

SYMBOL . TA" HOC. IIS-O.5 mA
v+-15V.Y---1I5V

.,.d/or
Cho<.

Min.

IM'TS

MM.

Ty..

c....

STATIC CHARACTERISTICS
INPUT CIRCUIT
Input Balance ICorrectionl Currents:
At x Input
Aty Input

Feadthrouth linearity Bal,n«
(Correction) Current

lie

x= 0

-20

-2.1

+20

uA

y' a

-20

-8.7

+20

uA

-34

-2.9

+34

uA

uA

lac

OUTPUT CIRCUIT
OtItput Offut Current

100

x8tV=O,

-10

-0.23

+10

Output Offset Voltage

Vaa

100 th,.., RL '" 33kO

-0.330

-0.0076

+0.330

Fig.3- Test circuit for measure""",t of output current swing

V



i

6 COLLECTOR-TO-EMITTER VOLT (vCEI'3v
At.iSfENT TEMPERATURE ITAI' 25°C

~

5r---

~ "r---

v

g

mW

250

For Diode 1011
Diode Forward Voltage

IC '" 10mA, VCE '" 3V

0.74

0.65

Diode Forward Current
Diode Reverse-Breakdown Voltage
Diode-te-Substrate
Breakdown Voltage

mA

V(BRIDR

5.5

6.9

v

VIBRlolO

loiode = l00IlA
(Terminal 101

20

60

v

'r--r--t-~"+~--~--r-t-+~

Fig. 7- V,Ovslc(transistors01andQ2asa
differential amplifier)

AMBIENT TEMPERATURE (TAI'2SoC
FREOUENCY III'IKHI

'1 •
J'.
~ ,

m
COllECTOR l,I'll'AUPERESIICI ~le5-'71n

.. ,

I

-1.9

'OF = 5mA

!
Fig. 8 - I/O vs IC (transistors 01 and 02asa

~

COLLECTOR MILLIAMPERES IIcl

OR-TO-EMITTER\lOLTS I\lCEI')\I
t •• COLLEC
AMBIENT TEMPERATURE ITAI-25'C

differential amplifier)

v

50
lOR = 5Oa",A

Oieda For.....'d-Voltage
Temp. Coefficient

-.=

0.85

1

J .1

I

i .0

J~lNT JMPERAll JJ ~c

-

!~

~ _25°C

40

!~

O"c

6

••• +

,
0.'

,

'0

Z£NER MILLIAMPERES tlzi

Fig. 9 - Typical Zener breakdown voltage vs current

'00

" '"

ZENER MILLIAMPEAESllzl

Fig. 10 - Typical Zener impedance vs current

______________________________________________________________________ 171

CA3094, CA3094A, CA3094B Types

Programmable Power Switch I Amplifier

Features';

- DeSigned for single or dual power supply
- Programmable: strobing, gating, squelching.
AGe capabilities
- Can deliver 3 watts (avg.) or 10 W (peak) to
external load (in switching mode)
- High-power. single-ended class A amplifier will
deliver power output of 0.6 watt (1.6 W device
dissipation)
- Total harmonic distortion (THO) fill 0.6 W in
class A oparation -' 1.4% typo
- High current-handling capability -100 mA (avg.).
300 mA (peak)
- Sensitivity Controlled by varying bias current
- Output: "sink" or "drive" capability

For Control & General-Purpose Applications
CA3094T,S,E:
For Operation Up to 24 Volts
CA3094AT,S,E: For Operation Up to 36 Volts
CA3094BT,S:
For Operation Up to 44 Volts
The CA3094 is a differential-input powercontrol switch/amplifier with auxiliary circuit features for ease of programmability.
For example, an error or unbalance signal can
be amplified by the CA3094 to provide an
on-off signal or proportional-control output
signal up to 100 mAo This signal is sufficient
to directly drive high-current thyristors, relays, dc loads. or power transistors. The
CA3094 has the generic characteristics of the
RCA-CA3080 operational amplifier directly
coupled to an integral Darlington power transistor capable of sinking or driving currents
up to 100 mAo
The gain of the differential input stage is
proportional to the amplifier bias current
(lABC). permitting programmable variation,
of the integrated circuit sensitivity with either'
digital and/or analog programming signals.
For example, at an IABC of 100 jJ.A, a one-

DC SUPPLV VOLTAGE:
DUll Supply , ••• ' •.•.••. , ...... ,., ........ ,' ..
Single Supply ., ................. ' ........... .
DC DIFFERENTIAL INPUT VOLTAGE
(T..minals 2 and 3) ........................ ' • '
DC COMMON-MODE INPUT VOLTAGE.,.,., ••.••.•.
PEAK INPUT SIGNAL CURRENT
(Terminal. 2 and 3) ........... , ............... .
PEAK AMPLIFIER BIAS CURRENT
(TerminalS) ................................ .

millivolt change at the input will change the
output from 0 to 100 mA (typical).
The CA3094 is intended for operation up to
24 volts and is especially useful for timing
circuits. in automotive equipment, and in
other applications where operation up to
24 volts is a primary design requirement
(see Figs.28.29 and 30 in Applications Section). The CA3094A and CA3094B are
like the CA3094 but are intended for operation up to 36 and 44 volts. respectively
(single or dual supply).
These types are available in 8-lead TO-5
style packages with standard leads ("T"
suffix) and with dual-in-line formed leads
'''DIL-CAN'' ("S" suffix). Type CA3094 is
also available in an 8-lead dual-in-line plastic
package "MINI-DIP" ("E" suffix), and in
chip form ("H" suffix).

CA3064

CA3094A

CA3084B

.12 V

.lav

'22V

24V

36V

44V

- - - - - .5"-------Term. 4

Applications;

V
V

FUNCTIONAL DIAGRAMS

V

< Term. 2 & 3 <; Term. 7

--------.1--------

'ol.

- Error-signal detector: temperaturit control
with thermistor sensor; speed control for
shunt wound dc motor
- Over-c:urrent. over-voltage, over-temperature
protectors
- Dual-tracking power supply with RCA-CA3085
- Wide-frequencv-range oscillator - Analog timer
- Level detector _ Alarm systems - Voltage followe
- Ramp-voltage generator - High-power
comparator
- Ground-fault interrupter (G FI) circuits

SINK OUTPUT
(COLLECTOR)

EXTE;ANAL
FREQUENCY

mA

--------2 --------

mA

- - - - - 300----------------100--------------

mA
mA

COMPENSATION
OR INHIBIT
INPUT

Peek ............ , ..... , .... ,',., .... ' ...... .
Average •................

DIFFERENTIAL

VOLTAGE

.lABe ClJRA[r.1T

INPUTS

~PAOGRAMNABL~

DEVICE DISSIPATION:
Up to TA = 55DC:

Without heat sink •........................
With heat sink
.......... , ....... .
Above TA = 55°C:
Without heat sink derate linearly
With heat sink derate linearly
.............. .
THERMAL RESISTANCE
(Junction to Airl ••.••..••.•...•.....•.•..•..•••

INPUT

(STA08£ OR AGel

- - - - - - - 630------------

- - - - - - - - - 1.6 - - - - - - - - - - - - -

GROUND. Y· IN
QUAL-SUPPLY
OPERATION

mW
W

NOTE

- - - - - - 6.67 - - - - - - - - mWfOC
- - - - - - 16.7
mWfOC

PIN 4 IS CONNECTED TO CAS[
TOP V'[W

TO-5 Style Package

- - - - - - 1 4 0 - - - - - - - - - oe/W

AMBIENT TEMPERATURE RANGE:

Operating ....•..............................
Storage ..................................... .

DRIVE OUTPUT
IEMITTER)

6

OUTPUT CURRENT:

[KTERNAL
F'REQUEf(CY

- - - - - -65 to + 1 5 0 - - - - - - - -

oe
oe

COMPENSATION
OR INHIBIT
INPUT

- - - - - +300--------

OC

DIFFERENTIA
VOL.T4GE
INPUTS

55 to +125 - - - - - - - -

8

1

SINK OUTPUT
(COLLECTOR)

LEAD TEMPERATURE (DURING SOLDERING):

At distance 1/16 • 1/32 in. (1.59' 0.79 mm)
from case for 10 s max.

-Exceeding this IIoltege reting will not damage the device unless the peak input signal current (1 mAl is also exceeded.

GROUND. V· IN
DUAL· SUPPLY
OPERATION

•

DRIVE OUTPUT
IUIITTERI
I"A8C CURRENT

4

•

~PROGRAMMABL.£~
INPUT
CSTROBE

TOP

OR AGel

VIEW

Plastic Package

________________________________________________________-----------173

CA3094, CA3094A, CA3094B Types
TYPICAL CHARACTERISTICS CURVES
(Cont'd)

ELECTRICAL CHARACTERISTICS at TA - 25°C For Equipment Design
TEST CONDITIONS

LIMITS

Single Supplv V+ =30 V
Dual Supply V+ = 15 V,
V- =15 V
IABC =100/JA
Unless Otherwise
Specified

CHARACTERISTIC

OUTPUT PARAMETERS (Differential Input Voltage
Peak Output Voltage:
(Terminal No. 61
V+OM
With 013 "ON"
With 013 "OFF" V-OM
Peak Output Voltage:
(Terminal No. 61
Positive
V+OM.
V-OM
Negative
Peak Output Voltage:
(Terminal No. 81
V+OM
With 013 "ON"
With 013 "OFF" V-OM
Peak Output Voltage:
(Terminal No. 81
V+OM
Positive
V-OM
Negative
Collector·to-Emitter
Saturation Voltage
(Terminal No. 81 VCE(sat)
Output Leakage Current
(Terminal No.6 to
Terminal No. 41
Composite Small-Signal
Current Transfer Ratio (Betal
hfe
and 0131
Outpu t Capacitance:
Terminal No.6
eO
Terminal No.8

(dr.!

-;:'105
~

Min.

Typ.

Max.

UNITS

C
ffi

10 2•

~

1
~

.

I II
-5S"C

~
2

0.1

-

27
0.Q1

+11
-

+12
-14.99

26

0.05
0.5
-14.95

V
V

29.95

+14.95

V+ 30 V
IC = 50 rnA
Terminal No.6 grounded I

-

V+ = 30 V

-

29.99
0.040

-

V
V

+14.99
14.96

-

V
V

O.•• ,.A I

2

10

.. 68

100

tOOO

Fig.4 - Input bias current VS. amplifier bias
current (IABC. terminal No.5).
10,

.

.. AMBIENT TEMPERATURE (TAl. 25·C

I

•

C

2

,

0,.',

"

,
I
2

0,1

0.17

0.80

V

I

468

10

..

100

661

1000

AMPLIFIER BIAS CURRENT fIAacl-,..A

Fig.5 - Device dissipation vs. amplifier bias
current /lABe terminal No.5).

2

10

/lA

.f •

10\ SUPPLY VOLTS:V

V+ - 30 V
VCE = 5 V
Ie = 50 rnA
f = 1 MHz
All Remaining
Terminals Tied to
Terminal No.4

... 1

AMPLIFIER BIAS MICROAMPERES I IAsel

V
V

V+ = 30 V

V+=15V.V-=-15V
RL = 2 kn to + 15 V

+125·C
-I-25"C

~I

V+=+15V,V-=-15V

RL = 2 kn to 30 V

•

10:

~.r

V+ = 30V

RL=2knto-15V

'
•

! ,

= , V)

RL = 2 kn to ground

..

10: SUPPLY VOlTS:V o+la,V- __15

-+!!I,V-·-I!I

'

-

16.000

100,000

-

-

5.5
17

-

pF
pF

20,000

100,000

-

V/V

~IOs

; :

-

TRANSFER PARAMETERS

Voltage Gain

A

Forward Transconductance
gm
To Terminal No.1
Slew Rate:
Open Loop:
Positive Slope
Negative Slope
Unity Gain
(Non-Inverting,
Compensated I

V+ = 30 V
IABC = 100/lA
6V ou t = 20V
RL = 2 kn

I ABC = 500 p.A
RL = 2 kn
I ABC = 500 p.A
RL = 2 kn

2f.---;55-C,+2S·C

0.1
0.1

86

100

-

1650

2200

2750

-

500
50

-

-

-

V//ls
V//Js

-

0.7

-

V//Js

t

"'II

I
10
100
AMPLIFIER BIAS CURRENT trABC1-p.A

t

'" " I

1000

dB
Fig.6 - Amplifier supply current vs. amplifier
bias current /I ABC, terminal No.5).

/lmhos

113.!li>--l--I-l-l-I-I--I-I-+l--.+--l+I+-+-++h
z

1-14.5
. . 1'~-+--I-I+l-I-H++-+-f+f+-!Y~-f!!!""'+.j.i
eM)
0.1

2.

"' • •

I
10
100
AMPLIFIER 81AS CURRENT IIABC1-p.A

2

'" SI
1000

Fig.7 - Common mode input voltage vs. amplifier
bias current (lASe; terminal No.5).

_____________________________________________________________________ i75

CA3094, CA3094A, CA3094B Types
TEST CIRCUITS (Cant'd)

+3010'

10ICn

...v

",)O,l>
l50kfi

I

--------1

+ 1 5 1 1 - - - - -....

EOUT

I

e"""'I~

E2OUT-ElooT

+15\1

I

I

INPUT VOLTAGE .. ANGE FOR CM...., 1 TO 27V

C.... RIIIBI'20LOG

I~
E20UT-ElooT

PPISSIPATION'IV+IIII
EOUT
OrrSET CUAAENT ros' 10 6 ~;;

Fig~20

Fig. 19 ..- Input bias current test circuit.

- Common-mode range and rejection ratio
test circuit.

Fig. IS - Input offset current test circuit.

+15",

..

560tC

,

so

EOUT

-15V

Fig.23 - Open-loop slew rate vs IABC test circuit.
120VA(

-15'1

Fig.21 - IIF noise test circuit.

'j

-15'"

Fig.22 - Open-loop gain

VI

frequency test circuit.

+15V
COMMON

Cr·O.5p.F
01 ·IN914
RI,o.5IMn=3MIN.

CLOSED

R2" S·' M.D.-30 MIN.
R3' 22Mn·2HRS.
R4= 44Mn=4HRS.

LOOP

GA'
dO"

RS' 1·5 Kn
'0
40

Fig.24 - Slew rate VI. non-inverting unity gain
test circuit.

TYPICAL APPLICATIONS
For Additional Application Information, refer to Application Note ICAN-6048 "Some
Applications of a Programmable Power!
Switch Amplifier IC".
Design Considerations
The selection of the optimum amplifier bias
current (lABC) depends on 1. The Desired Sensitivity - the higher the

'0

R6' 50 KIl
R7'5.IKn
RS' 1.5K.Q.

92C5-20405R2

.,_-1'-____
29Vr---....3V

G> 0----'

,

...-........-

~
@O
TIME-IHR.
52 SET TO R4

*POTENTIOMETER REQUIRED FOR INITIAL TIME SET
TO PERMIT DEVICE INTERCONNECTING TIME VARIATION
WITH TEMPERATURE < 0.3'" I·C.

Fig.25 - Phase compensation test circuit.

IABC, the higher the sensitivity - i.e., a
greater-drive current capabi lity at the output for a specific voltage change at
the input.
2. Required Input Resistance - the lower
the IABC, the higher the input resistance.
If the desired sensitivity and requred input
resistance are not known and are to be experimentally determined, or the anticipated

Fig.26 - Presettable analog. timer.

equipment design is sufficiently flexible to
!olerate a wide range of these parameters, it
·'s recommended that the equipment designer
begin his calculations with an IABC of 100
!lA, since the CA3094 is Characterized at
this value of amplifier bias current.
The CA3094 is extremely versatile and can
be used in a wide variety of applications.

______________________________________________________________________ 177

CA3094, CA3094A, CA3094B Types
TYPICAL APPLICATIONS (Cont'd)
v+

l}PP[R THR[SHOI...O'

.--r---~(I!5

vI

IQOKn

(bl SINGLE SUPPLY

(a) DUAL SUPPLY

Fig. 34 ,- Comparators (threshold detectors) -dualand single-supply types.

R"

TYPE

DI20lF

10

60 Ht

20V
6O,HI

ALL RESISTANCES IN OHMS -1/2 WATT

Fig.35 - Temperature controller.

MAl{ LOUT':t 100 mA

003,.r
I. ALL RESISTORS IN OHMS, 112 WATT. !IO'l'.
l,~goS~~[CTEDFOR 3db POINT AT

-15 "

L-~--I--'~-D'"

OUTPUT

S INPUT I~PEDANCE FROM 2T03
EQUALS 800 K.
6. WITH NO INPUT SIGNAl TERM-

"

OFFSET ADJ INCLUDED IN RTRIP

.V+I!I!PUT RANGE=19 TO 30 V '---~V\I'~---'

VOLTAGE 8ETWEEN
TERMI".ALS 2
4

a

FOR 15 V OUTPUT

**V-INPUT RANGE=-16 TO-30V
FOfH5

v

OUTPUT

INAL 8 [OUTPUT I AT .]6110LT5

VOLTAGE 8ETWEEN
TERMINALS J
4
(ADJUSTABLE WITH
RTRlpl

a

REGULATION:
[ Your

(INITIAL~

t. 'lIN

x 100=0.075% IV

::c~~",VUOT"-"''cIlN~''~IA~L~) ~ 100=0,075 %

\

GROUND FAULT
SIGNAL 60Hz

VOUT

(ll FROM I TO 50 mAl

Fig.36 - Dual-voltage tracking regulator.

Fig.37 - Ground fault interrupter (GFJ) and
waveform pertinent to ground fault
detector.

________________________________________________________________ 179

CA3095E
Super-Beta Transistor Array

Features
• Two super·beta n-p-n transistors - hFE

Differential Cascode Amplifier Plus 3 Independent Transistors

following description.)

The differential cascade amplifier incorporates two cascade
amplifiers consisting of transistors 01, Q3 and Q2, Q4,
respectively, plus a voltage-limiting circuit. consisting of

diodes D1, 02 and p-n-p transistor 05. Two of these
transistors, 01 and 02, are super-beta types that have an

input section of its respective cascade amplifier. The output
section of each cascode amplifier employs a conventional
n-p-n transistor, 03, Q4, respectively. The output signal is
obtained at the collectors of these transistors. See Operating
Considerations for bias considerations of the differential
cascade amplifier.

V10=5 mV max. at le= 100j..lAdc
110 = 20 nA max. at
• Wide current range -

Independent Transistors:

• Wide current range -

• High voltage - VCBO = 45 V max_

Applications
Differential Cascade Amplifier:
•
•
•
•

07,08)-

mW
mW/oC

°c
°c

Collector-to-Base Voltage (VCBO) _
Collector-to-Emitter Voltage (VCEOI
Emitter-to-Base Voltage (VESOI ,.
Collector-to-Substrate Voltage (VCIO) *.
Collector Current (lCI
Base Current liB) .
Conventional P-N-P Transistor (051Collector-to-Base Voltage (VCBOI
Collector-to-Emitter Voltage (VCEO)
Limiting Circuit Current HPin 11)

°c

V
V
V
mA
mA

< 1 j..IA to 10 mA

• Matched general-purpose transistors

Conventional N-P-N Transistors (03, 04, 06,

mW

Ie = 100 IlA dc

< 1 IlA to 2 mA

• hFE = 300 typo for each transistor

The CA3095E is supplied in a 16-lead dual-in-line plastic
package and operates over the ambient temperature range of
_55°C to +12SoC

MAXIMUM RATINGS, Absolute-Maximum Values at TA = 25 DC

< 1 nA

• Matched pair (01 and 02) -

The independent transistors, 06, 07 and 08, are high-voltage
silicon n-p-n conventional types for general use in signal
processing systems in the frequency range from dc through
vhf. Separate terminals for each of these transistors permit
maximum flexibility in circuit design_

hFE > 1000 and are capable of operating over a wide current
range of 1 J.1A to 2 rnA. Each of these types comprises the

Power Dissipation:
Anv One Transistor
300
Total PackageUpto 25°C _
750
Above 25 °c
. _ derate linearly
6.67
Ambient Temperature Range:
-55to+125
Operating
-55 to +150
Storage
Lead Temperature (During Soldering):
At distance not less than 1/32" 1O.79 mm)
from case for 10 seconds max ..
+265
Voltage and Current Ratings Apply for Each
Specified Transistor:
Super-Beta Transistors (Q1, 021Collector-to-Base Voltage (VCBO) .
Emitter-to-Base Voltage (VEBO)
Coliector-to-Substrate Voltage (VCIQ)*.
45
Collector Current ItCI .
50
Base Current ItB)
20

• Operation possible at II B down to

The exceptionally high·beta characteristics of 01 and 02,
plus the large signal-voltage swing capability of 03 and 04,
make the composite differential cascade amplifier an excellent choice for a broad range of small-signal, high-inputimpedance amplifier applications including low-noise video
amplifiers. This amplifier is also recommended for use in
long-interval timers, oscillators, and long-duration one-shot
applications.

ACA·CA3095E is a monolithic array of transistors connected as a super-beta diHerential cascade amplifier with
three independent n-p-n transistors. (Refer to Fig. 1 for

> 1000

• Voltage-limiting circuitry (01, 02, Q5)

45
35
6
45
50
20

V
V
mA
mA

-45
-35
20

mA

V

V

V

Super-beta pre-amplifier for op-amp
High-impedance dc meter amplifier
Low-noise video amplifier
Pie:zoelectric transducer amplifier

•
•
•
•

Long-interval timer
Long-duration one-shot multivibrator
Comparator with high-input impedance
Long·time-constant integrator
• Photocell amplifier

• Low-noise amplifier-for operation from high-source
impedances
Independent Transistors:
• General use in signal processing systems in dc through vhf range

V

* The collector of each transistor is isolated from the substrate by
an integral diode. The substrate must be connected to a voltage
which is more negative than any collector voltage in order to
maintain isolation between transistors and provide normal transistor
action. To avoid undesired coupling between transistors, the
substrate terminal should be maintained at either dc or signa! (ac)
ground A suitable bypass capacitor can be used to establish a signal
ground.

SHADED TRANSISTORS ARE
SUPER BETA TYPES

STATIC CHARACTERISTICS

Characteristics

Fig. I-Functional diagram_

limIts

Test Conditions

Symbol

Test Circuits for Measurement of Super-Beta

Units
Min.

Typ_

Max_

Cascode Amplifier Characteristics

Characteristics Apply for Each Super-Beta Cascode Amplifier Transistor
Pair (01,031 and (02, Q41, Unless Indicated Otherwise

Collector-to-Base Breakdown Voltage
Emitter-to-Base Breakdown Voltage
(Applies only to 01 & 02)
Collector-to-Substrate Breakdown Voltage

V{BRICIO

45

ICI - 100 JJA, IS - IE - 0

V

VS_8orVlO __ 8-10V, 111" 10DJJA

CoHector Cutoff Current

100

ABE'" 100 MH
VlO_8"5V
DC Forward-Current Transfer Ratio

Base-to-Emitter Voltage
(ApplIes only to 01 & Q2)
Saturation Voltage

IC'" 100 JJA. VS-8 or VlO-8
V sat

1500

llC - 1 rnA

I Ie'" 100JJA
I Ie'" lOJJA

VS-8 '" 5 V

=

5 V

1000 2000 5000

Fig.2-V(BRJCBO teu circuit.

1500
0.50 0.59

ISor 110= 1 mA,lll - 100JJA.
170r Ig'" 100JJA

0.22

0.S8
0.7

V

For Cascode Amplifiers as a Differential Matched Pair
Magnitude of Input-O~cf::-"_,,-:v:-o_It-,,g'--'_ _+--+IIII,0"-ol';-I_-I Ie ~ 100IJ. A
Magnitude of Input-Offset Current
V6 -8 = V 10- 8
Magnitude of Input-Offset Voltage Drift
(Temp. Coeff.1

mV
~

20

5V

cA

I~Vlol
~

Magnitude of Input-Offset Current Drift
(Temp. Coeff.)
Note 1; Terminal No.9 to terminals 10 and 11 connected or terminal No_ 7 to terminals 6 and 11 connected

3.3

JJV/'C

0.05

nA/'e
Fig.3-ICER test circuit

__-----------------------------------------------------------------181

CA3095E
zooo

000
~

1&00

:l'
;t

1200

.1
a::-Q
!it'

."
;~
B

~=ij~'f4#+-

1-%.""

"0"

~
"'III
II

800

000

J.o ~,

....

V

0

0.8

0.4

1.2

f-

1'z.50~

,::.'0
f--!i/I

0.8

1.2

I..

2

VOLTAGE ACROSS PINS 6 AND' (Vi_aiDA PINS IOANO 8
(1110-8 1-\1

VOLTAGE ACROSS PINS 6 AND 8 (V6_el OR PINS 10 AND 8
(V,o-e)-\1

2~

Fig. 10-1· V characteristics frY thll
cascodtlpilirs.

,uper-b.r.

ClIICodepilirs.

"

,t400
2

I
~"EN~ ri~!'TU~ IT": +~ ~

.",,-

+2!5"C

,-

/~

V

Q9

-

.........
.........

I

~

.-

f

g

0

Fig. '3-CoIltJcmr cutoff eummt VI IImbumt
ttlmpttTlltu,. for rile conventiONIi
transistors (V cs - 6 V. '0 V, 15 VJ.

!i
~

~

DC FORWARD CURRENT

C:~~~:R;~::~!~~:E~~~!.(~E

-.OV

!

,

-4O·C

001

100

i ~r--t--t-+++-+--++t+--t--+-t+I

~ -I'
. . .. . . .. . . ..
~200

."

Fig. 12-Collector cutoff cumlnt w lImb;"'t
tBm".,.tu,. for tM CDnlftllltiOllllf
tr"".inors (VCE - 5 V. 10 VI.

COlLECTOR-TO-EMITTER
VOLTAGE (IICE.).~V

i

1'"0

50

AMBIENT TEMPERATURE (TAI--C

Fig. 1 , -I-V chllrac,.r;stics for tM SU".r-betll

0.1
1.0
COLLEClOR CURRENT (Icl- iliA

10

,--- ....

0.7f--+--t-t+t--t--t-H;j;...4'''--t-t-H

~
f..--~~L-~~~t+t--t--t-t+t--t--t-t-H

~~
~

~

0.5

0.'

0.01

Fi,.14-hFE lfS. Ie for Heh conwmtiona/
trllnsistor lOS, Ol, OBI.

0.1
t
COLLECTOR CURRENT IIC1-mA

...

10

Fig. 15- V BE as e function of collector current
for the conlfflntion.1 transistors.

/

TRANFER RATIO IhFE'-1O

I~-+--+-~+--+--+-~+-~~~

~,~

~> O.• f--+--+-~+--+--+-~+~ftfl----·H-H

~tOA

~i1-

1/
1

!I/~

Fo..
~

l%.v

~ ~2
8~.I

0.0

. ..

'00 / /

~'I

~

I II

0.01
2

I

v-

tzoo f-----_+------1:7~t__+-t------i

... ,

10
COLLECTOR CURRENT tIc J- mA nCS-2031'!1

100
COLLECTOR CURRENT IICI -

1000
j4A

.000

10

4

•

•

100

4

FREQUENCY If) -

••

1000

Hz

. ..

10.000

92CS-20362

Fig.16-VCE fslltJ lIS a function of collector

current

(or

the

Fig.Il-Gain bandwidth product IfS collector
currllnt for the super.IJers clIscode
pairs.

conventional

transiston.

AMIIENT TEMPERATUAE

10

...

100
FREQUENCY

(TAI~25"C

...

1000

(n - HI

Fig. 19-EN IIs- f for Nch super-bllta cascade
IImp/ifi," transistor pair (aI, Q3) and

(Q2,04).

Fig. 18-IN n. f for Hch super-beta CMCode
amp/if;" trllnsiuor pIIir (01, 03) and
(Q2,04J.

. ..

IOPOO

,
10
15
COU.ECTOR-TO-BASE VOLUGE (vcBol-v

Fig.20-CCB If'. VCBO for esch wper.IJetB
CBSCOde amplifier transistor pair (01,
03) lind (02, 04J.

Fig.21-CCI

lfS. VCIO for tlflCh Wptlr-bfltll
IImplifier transistor PIli, (01.
03) lind 102. 04).

CIIICOdfJ

_________________________________________________________________ 183

CA3095E
TYPICAL APPLICATIONS (Cont'dl

,.
" ,%

..

laMO

......
,%

~~~-r.\-Y

Fig.30-High·input-imped/Jnce, low-nOise amplififlr circuit.
Y-'-lY

Fig.29-Super-Mtll Op·Amp with resistor drille network.

Fig.32-Lon~delIlY monostllble multillibrlltor circuit.

Fig.31- Typical high-input-impedance dc voltmeter circuit.

Fig.33-Low input-bills current compilrllror circuit.

FREQUENCY

Fig.34-CA3095E wideband IImplifier.

(f)~Hl

Fig.35-Equivalenr inpur noise lIoltage
for circuit of figure 34.

liS.

frequency

____~----------------------------__--__---------------------------185

CA3096, CA3096A, CA3096C
STATIC ELECTRICAL CHARACTERISTICS at TA
For Equipment Design

=25"C

10

LIMITS

CHARACTEST
TERISTIC CONDITIONS

Min_ Typ.

CA3096CE

CA3096E

CA3096AE

Max. Min. Typ.

UNITS

Max Min. Typ.

Max.

For Each n-p-n Transistor
ICSO

VCs= lOV.
IE = 0

-

0.001

40

-

0.001

100

-

0.001

100

nA

ICEO

VCE = 10V,
IS = 0

-

0.006

100

-

0.006

1000

-

0.006 1000

nA

'0

-

-

V(SR)CEO IC= 1 rnA,
IS = 0

35

V(SR)CSO IC= lOIlA,
IE = 0

45

100

-

45

100

-

30

80

-

V

VISR)CIO ICI = 101lA,
IS=IE=O

45

100

-

45

100

-

30

80

-

V

VISR)ESO IE= 101lA,
IC = 0

11

8

-

6

8

-

6

8

-

V

VCEISAT) IC= lOrnA,
IS=l rnA
VSE
hFE

IC=l rnA,
VeE= 5V

Il1VSE/l1TI le=l rnA,
VCE = 5V

-

35

50

24

35

V

0

'0

25

"

100

Fig. 3 - Collector cut-off current (I ceo) as a
function of temperature (n-p-n).

IZ = 10llA

Vz

50

25

TEMPERATUR'E. _·C

6
-

7.9

9.8

0.24

0.5

6

-

7.9

9.8

0.24

0.7

6
-

7.9

9.8

V

0.24

0.7

V

0.6

0.69

0.78

0.6

0.69

0.78

0.6

150

390

500

150

390

500

100

390

670

-

1.9

-

-

1.9

-

-

1.9

-

0.69 0.78

.00

I.lJ J"U.J

::'

V

~

400

i

200

:

V

I

r-...

~'£."'~~+25.C

~••'
,ooi---""" V

I

V

-

r-- ,t---

- .. o·c

100

g

rnvte

0

0.01

,

...

,

. ..

0.1
I
COLLECTOR CURRENT (Xc l-mA

,

.,.

10

Fig. 4 - Transistor (n-p-n) h FE 8S a function of

collector current.

09 COLLECTOR-lO-EMITTER VOLTAGE (VeE,-5V

I 0.8f--+-+-+++--f-++tt--t--t-t-tl
~w
~0.7

v~

~ o.6f--±_-I"'H+---1-++t+-+--+-+-tI
~V
e
~

0.5

04
•

6

e

001

2.

448

01

I

0·1

10

TEMPERATURE --c:

92CS-ZO'll

Fig. 5 - VBE (n-p-n) as a function of collector

current.

I

4

••

10

100

COLLECTOR CURRENT IIcl-mA

COLLECTOA CURRENT lIcl-mA
t2CS-2O!I4

Fig. 6 - VBE (n-p-n) as a function of tempera-

ture.

Fig. 7- VCE(SATI (n·p-n)asafunctionofcol-

lectDr current.

______________~------------------------------------------------187

CA3096,CA3096A, CA3096C
DYNAMIC
ELECTRICAL CHARACTERISTICS at T A = 25°C
Typical Values Intended Only for Design Guidance
CHARACTERISTICS

COI.LECTO"·TO-£MITTE" VOLTAGE eveE} • 5'1

TYPICAL
UNITS
VALUES

TEST CONDITIONS

For Each n-p-n Transistor
f=l kHz, VCE =5V,
IC = 1 mA. Rs = 1 k!l

Noise Figure (low frequency), NF
Low-Frequency, Input Resistance, Ri

f=1.0kHz,VCE=5V,
IC= 1 mA

Low-Frequency Output Resistance, Ro

O'..•~-r--T-rT~-;---r'-~--T--+-+~

>

.'

2_2

dB

10

k!l

80

k!l

!; ::~r
;

0.4

~

O"f--+--+--H+-I-I-++++--+---I-++
o.2f--+--+--H+-I-I-++++--+---I-+--H
O.If--+---t--H+---j-·-+++-+--+---I-+--H

~;I

4

gfe

7.5
-j13

gie

f= 1 MHz, VCE = 5V,
IC=lmA

-

Input Admittance,

Yie bie

0.76

90e

Output Admittance,

-b oe

Yoe

Gain-Bandwidth Product,

Emitter-to-Base Capacitance, CEB

Collector-to-Substrate Capacitance, CCI

VCE = 5 V,le = 1.0mA

280

VCE = 5 V,IC= 5mA

335

VEB = 3 V

0.75

mmho

mmho

MHz

U.,
~o;

Ii

",i

~!

m:

:i

VCS = 3 V
VCI = 3 V

3.2

pF

Low-Frequency Input Resistance, Ai

f = 1 kHz, VCE = 5 V,

Low·Frequency Output Resistance, Ro

IC = lOOIlA

Gain·S"ndwidth Product, fT

VCE = 5 V, IC =.lOOIlA

27

kn

680

kn

6.8

MHz

Emitter-to-Base Capacitance, CEB

VEB = -3 V

0.85

pF

Collector-to-Sase Capacitance, CCB

Ves = -3 V

2.25

pF

,;
L

,

--:j

~~"

J~, I','
, f:'i,W
,
m

TEMPERATURE--C

92CS-20322

Fig. 13 - V BE (p-n-p) as a function of tempera-

ture.

l

0.'

~

0.8

;<

dB

::m:::

o.

pF
pI'

3

10

TEMPERATU';".;'i~i:

I~

For Each p-n-p Transistor
Noise Figure (low frequency), NF

I

I-filA

mmho

0.46

f = 1 kHz,
IC = lOOIlA, RS = 1 H2

••

Ue

VBE (p-n-p) as a function of collector
current.

j2.4

fT

Collector-to-Base Capacitance, CCB

2.2
j3.1

4
0.1

COLLECTOR tUIU'ENT

Admittance Characteristics:
Yfe bfe

••

0.01

Fig. 12 -

Forward Transfer Admittance,

__

1:~4--+~~~--~~~~~~~-H

;;;

,>1

~

o.

~

~.

0.' .......

iis

0.'

I•

0.1

0.2

1/

"

/
./

6

a 0.1

I

COLLECTOR CURRENT IICI-mA

Base-to-Substrate Capacitance, CSI

:>
E

0.5

0.4

~

~

~ 0.'

.~

i
~
~
~

;•

01

'"

0
2

0.01

pF

I I;

1\

02

3.05

I

I

-~

VSI = 3 V

" f, e 10
92CS-f031!3

Fig. 14 - Magnitude of input offset voltage
IV/olasa function of collector
current for n-p-n transistor 01-02-

;

1'-- t-L.

. ..

2

Iii

VI

.,.

I
COLLECTOR CURRENT IIC1-mA

I

i

1

I

,i

. ,I .
92'CS-20324

Fig. 15 - Magnitude of input offset voltage
Iviol as a function of collector
current for p-n-p transistor Q4- Q 9

FR[OUENCYIfI-kHI

Fig. 16 - Noise figure as a function of frequency for n-p-n transistors.

FREQUENCY{fl-KH~

Fig. 17 - Noise figure as a function of frequency for n-p-n transistors.

___________________________________________________________________ 189

CA3096, CA3096A, CA3096C
•

COLLECTOR-TO-EMITTER VOLTAGE ('ICE)'

-

7

•

I

,

I

.

I
I

1

i'-"
--

t
I
6

I

j

........

I

0'

! I

~l

r---.

,

~v

~

I

OUTPUT

I

to

6

2

8

to

COLLECTOR CURRENTI1Cl-mA

NOTe:

4~618

12

FI OR

81AS VOLTAGE-v

Fig. 30 - Gain-bandwidth product as a function
of collector current (p-n-p).

Fig. 31 - Capacitance as a function of bias

F2~

10KHz

Fig. 32 - Frequency comparator using

voltage (p·n·p).

CA3096E.

•
•

,...

CENTER fREQUENCY: , kHz

7

·•
~ ·,

/

I

/

~

~
g

IOO".F

02v

2

'!--

../

/

-, o
'2-'.'0

J
-_.
0

'1"2

-

,

20

0

'l-f2"0

FREQUENCY DEVIATION (AO-Uh
92CS -20341RI

Fig. 33 - Line·operated level switch using CA3096AE or CA3096E.

Fig. 34 - Frequency comparator charac-

teristics.
v+

"T K1:

OKn

I~6RL

'0

IF IO. II1'IA
AND Rl" KD
VT:

t

+vrnmT
"IN

36!11V

-'IT

t

.

':-00 C,
TIME DELAY CHA~GES :I: 7"10
"'OR SUPPLY VOLTAGE CHAfliGE OF ± 10"10

Fig. 35 - One-minute timer using CA3096AE
and a MOS/FET.

Fig. 36 - CA3096AE small-signal zero-voltage detector having noise immunity.

70

f-.. -

60

50

_.

+0
3Of--+~t-H+-

20f--+~+-H+--+- -H++--+~+

4

• '10

'r

4 . '100:2

4 . '1000

FREQUENC'((r)-kHr
9ZCS-20346

(SUBSTRATE)

-

Fig. 37 - Ten-second timer operated form 1.5-volt

Fig. 38 - Gain-frequency characteristics.

supply using CA3096E.

__________________________________________________________________ 191

CA3097E
Features:

Thyristor/Transistor Array

• Complate isolation between alaments
• n· .." transistor - V CEO"" 30 V (min.)
IC - 100 mA lmax.)

For Military, Commercial, and Industrial Applications

•
RCA·CA3097E" Thyristor/Transistor Array iS'a monolithic in-

tegrated circuit that enables circuit designers to further integrate control systems. The CA3097E consists of five independent and completely isolated elements on one chip; an
n-p-n transistor. a p-n-p/n-p-n transistor pair, a zener diode,
a programmable unijunction transistor (PUT), and a sensitivegate silicon controlled rectifier tSCR),

The CA3097 is supplied in either the l6-lead dual-in-line
plastic package ,"E" suffix) or the chip version ("H" suffix).
and operates over the full military-temperature raoW' of
-55 to +1 ?50 C.

p-n-p/n·p-n tf'llnsistor pair - beta

2: 8000 (typ.) OIC -

10 mA. individual p-n-p, n-p-n,
or transistor pair operation

Includes:
•

• Uncomroitted n·po" Transistor
• s.nsitive-Gate Silicon Controlled Rectifier

Programmable unijunction transistor
(PUT) - peak-point current - 15 nA
(typ.) at RG = 1 Mil; V AK • ±JO V

• Programmlble Unijunction Transistor (PUTI

• (PUT) Extremely long RC time constants
with low .,.Iue of external capacitor

• p-n-p/n-p-n Transistor Pair
• Zener Diode
• Separate Substrate Connection

• Sentitive-gate silicon controlled rectifier tSeR} 150 mA forw.rd current (mo..)
•

Zenor·dodo impoclance IZZ)
Ityp.) at 10 mA

Applications:

MAXIMUM RATINGS, Absolute·MlIJ(imum Values at TA = 25"C

• Tinws
• Light dmmenlmotor controls

+50 V
Isolation Voltage, any terminal to substrate'" ........................ ,., ............................ .
Dissipation, Total Package:
750mW
UptoTA""550 C ........•.... , ............................ ,
derate linearly at 6.61 mWfOC
Above T A = 55°C .......................................... .
Ambient Temperature Range:
-55 to +1250 C
Operating ................................................ .
-65 to +1500 C
Storage .......................................................... .
Lead Temperature (During Soldering):
+265 0 C
At distance 1116 ± 1/32 inch n .59 ± 0.19 mm} from case for 10 seconds max ....................... .

•

Each n-pon Transistor (03,061

• SCR uilllrmil

The following ratings apply with terminals 6 & 9 connected together.
ColiectoHo-Emitter Voltage (VCEO)'" .................................................... .
Collector-to-Base Voltage (V CBO) ....................................................... .
Emitter·to-Base Vmtage (VEBOI ...................•..... , ................................. .
Collector Current Uci .................................................................. .
Base Current (lSi ...................................................................... .
Dissipation (POl ...................................................................... .
p-n-p Tramistor C04)
The following ratings apply with terminals 1 & 8 connected together.
CoIlector-to-Emitter Voltage (VCEO) ....................................................... .
Coliector·to·Base Voltage (Vcse) ....................................•.....................
Emitter·to·Base Voltage (VESe) .......................................................... .
Collector Current (lC)" ................................................................. .
Base Current US) .. .. .. .. .. .. .. . . . . . .. .. . .. .. . .. .. .. .. . .. .. . .. .. . . .. . . .. .. .. .. .. .. . .... .
Dissipation (Pol ...•..•................................................................
1H1-p/n-p-n Transistor Pair (03.04)
Dissipation (POl .................................... '................................... .
Pro. .mmabla Unijunction Transistor, PUT (Q1)
Gate-to-Cathode Positive Voltage IV GK)' .................................................... .
Gate-to-Cathode Negative Voltage IV GKR)' .................................................. .
Gate-to-Anode Negative Voltage IVGA) .....•................................................
Anode-to·Cathode Voltage (V AK) ......................................................... .
DC Anode Current ............ 'r' • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
Peak Anode Non-Recurrent Forward (On-State) Current 110 lAs pulse} ............................. .

Total Average Dissipation ................................................................ .
Silicon Controll'" Rectifier, SCR IQ2)
Repetitive Peak Reverse Voltage (VRAXM), AGK" 1 K{l .......... , ........•....................
Repetitive Peak OII·State Voltage (VORXM), RGK' 1 kll ...................................... .
oC On·State Current UTOC)" ............................... , ..•...•.........•............
Peak Surge (Non-Repetitive) On-State Current (10 p.s pulse) ...................................... .
Forward Peak Gate Current (lGFM) ......•........•.•.......................................
Peak Gate-ta-Cathode Reverse Voltage (VGRU).' _ ............................................ .
Total Average DiSSipation .....•...........................................................
Zonor DioIto,IZU
OCCUrrent~ ..........................................•.............................
Dissipation (POl .. '.' ................................................................... .

= 1511

• OIein.ton
• "One-shot" multivibraton
• Voltalll.re.,laton

• Coma-raton. Schmitt tri.,,.
• Constant-CIU"ent sources
• Amplifien
Logic circuits

• Pul.. Circuits
JOV
SOV
SV
100mA
20mA
SOOmW

n

:-1'-Y-"--3-:' ·:-r--1
I

p~

6_-

ZI~!

I
L__

_
5

SU8STRATE :

_
4

_ __ ..JI

_____
I

7

15

1

~40V

-50 V
-10 V
-10mA
-3mA
200mW

Fig. , - Schematic diB(JT8m of CA3091E.

TYPICAL CHARACTERISTICS
1 AMIIENT TEMPERATURE (TA"25-C
FORCED-CL.lRf'ENT TRANSf'ER RATIOCIc/1e'-1O

500mW
JOV
SV
JOV
±JOV
IS0mA
2A
300mW
JOV
JOV
IS0mA
2A
20mA
SV
300mW

~,~~--~~~-+--+-~+--t--+-~

!

"

I)

8 1

"

6810

COLl.ECTOR CURRENT {Ic)-mA

Fig.2 - Base-ttHJmitr.T utul'lltion WJIr... n. colllJt:tOT cUmlnr for
n-p-n ".m/non 03 & 05.

2SmA
250mW

• One or more of the terminals of each element of the CA3097E is isolated from the substrate by a junction diode. I n order to
maintain electrical isolation between elements, the substrate terminal must be connected to • voltage which is no more positive than that of any other terminal. To avoid undesirable coupling between elements, the substrate terminal (terminal 10)
should be maintained at either de or signal .ac) ground.

.MBIENT TEMPERATURE ITAI-·c

Fig.3 - B...-tlHlmlttM IIOItilftl .. ambient ,."",.,."ru,. for"."."
trMUhton 03 & 05.

_______________________________________________________________ 193

CA3097E
TYPICAL CHARACTERISTICS (CONT'D)

ELECTRICAL CHARACTERISTICS (Con"d.1
CHARACTERISTIC

TEST CONDITIONS

FIG.

Ambient Temperature

NO.

SYMBOL

UNITS

LIMITS

(TAI- 250(:
Min. Typ. Max.

Unlell Otherwise Specified

~

PROGRAMMABLE UNIJUNCTION TRANSISTOR (PUTI. O~
0..2

Vs = IDV, RG = lDHl
OFFSET VOLTAGE

VT'

ANODE·TO·CATHODE
VF

ON·STATE VOLTAGE

11,22"

YOM

PEAK·POINT CURRENT

Ip

0..7

Vs = lDV, RG - 1M!:!

0..2

-

0..7

IF = 5DmA

0..90.

1.5

12

-

-

1

-

13,23

-

10.

-

14,22"

-

0.55

1
0..15

'F = lDDmA
C = D.22pF

PEAK OUTPUT VOLTAGE

~6000

-

Anode Supply Voltage = 20V

V

~

~4000

V

i

2000

V

g

6

Vs = lOV, RG = lDkil

VALLEY·POINT CURRENT

'V

-

-

0..0.15

Vs = lDV, RG = lOkil

17,15

4

40.

-

Vs - lDV, RG - lMil

16

-

-

25

22"

-

0..0.2

-

nA

60.

-

ns

-

-

2

GATE REVERSE CURRENT

'GAO

Vs - JOV

GATE REVERSE CURRENT

'GKS

~~~e-To.Cathode

OUTPUT PULSE RISEl'lME

Short, VS,

Anode-Supply Voltage

tr

22"

20V

23

C=O.22~F

0..2

~A

8 100

COL.LECTOR CURRENT IIC"mA

/lA

Vs - 10V, RG = lMil

trans"'" ",t;o vs. collector cummt

Fig.. 10 - DC fDfWllrd-cun'Mt
10f' tramistor PIli, 03, Q4.

nA
GATE-tO-SOURCE VOLTAGE IVSI'IO~

t-I.

0 .•

SILICON CONTROLLED RECTIFIER (SCRI. 02
PEAK OFF·STATE CURRENT'
FORWARD
REVERSE
FORWARD DC VOLTAGE DROP

'DXM

VDRXM = 3DV, RGK = lkil

24

'RXM

VRRXM = 3DV, RGK = lkil

24

VT

GATE·TO·SOURCE

IT= SOmA

18

-

0..90.

1.5

26

33

100

50

-

20,24

-

1.2

-

mA

25

-

150.

-

V/lls

TRIGGER CURRENT
DC GATE·TRIGGER VOLTAGE

VGT

V L = IDV, RL = lODil

'HO

RGK - lkil

HOLDING CURRENT

dv/dt

OF OFF·STATE VOLTAGE

TA

=

26

-55°C

19

EXPONENTIAL RISE,

TURN·ON TIME

TURN·OFF TIME

V

~ 0.'

o

·50

V

'gt

See Fig. 33

33

-

50.

-

ns

to

See Fig. 33

33

-

10.

-

~s

21

7.2

8

8.8

V

-

15

25

il

-

mV/oC

CI RCUIT·COMMUTATED

~

~A

0.55 0..75

RGK = lkil, VDRXM = 3DV

GATE·CONTROLLED

~

,... 0.2

TA"" 25°C
'GS

CRITICAL RATE·OF·RISE

~ 0.3
~A

2

ZENER DIODE, ZI
ZENER VOLTAGE

Vz

IZ = lDmA

ZENER IMPEDANCE

Zz

lZ - lOrnA, f

= 1kHz

ZENER VOLTAGE

IAVzlVzJ/t'lT IZ= lOrnA

"-

-10.05

TEMPERATURE COEFFICIENT

t'lVzjt'lT

-

""

50.

80.

ZENER·TO·SUBSTRATE
V(BRIZIO

BREAKDOWN VOLTAGE

'Z=I~A

TERM. 5 TO SUBSTRATE

%1°C

-

~

-

V

4

6

e,

2

" 6 8 10

2

4

6 8'00 2

4

6 81000

ANODE-tO-CATHODE ON-STATE CURRENT tIFI-mA

• VT = Vp - Vs (F'g. 221
Fig.'2 - Anode-to-cathodfl on-state voltage VI. anode-to-cathode
on-stlltfl current for 01 (PUTJ.

'0

CURVE (.I): AMBIENT TEMPERATURE (T... }=25°C
:
EQUIVALENT GATE RESISTANCE (RGJ'tO KA

..... BIENT TE .... ERATURE ITAJ·2~·C
FOR TEST CtAUIT. SEE fiG. 23

I CU~E (BI:

i.

EQUIVALENT GATE VOLTAGE ('o'5};<10 V

EQUIVALENT GATE

!~lii

r;m
:i-!

~~SISTA~.~~ ,(.~~l'IO ~.~.1m

,:::1"1+,11'1:: :" ,.. , "" ,E:;;::;

C·O.22 "F,R-2 MO
FROM SUPPL't TO

ANODE

.1

§

c-_coo pF,

to

R-2 MQ

FROM SUPPLY TO

ANODE.

.tBj?~'·!ii!ii • . • ·• • • •
~ : : . •r:tt. ?:. r~::~:l;± l.:;
:;:.,.A'.

to

20

]0

o

5

W

15

W

~

EQUIVAl.ENT GATE-SOURCE VOLTAGE (VsI-V

ANODE SUPPLY VOLTAGE (VAAl-v

-~5

EQUIVAL.ENT GATE-SOURCE VOLTAGE (VSI-V

-25 b a's 50 75 IJo 125
AMBIE"'T TEMPERATURE (TA)-"C

Fig. 13 - Peak output voltage 1f8. anode wppl'l lIo1fl11/f1 for

.at (PUT).

-50

Fig. 74 - Peak-point curTtlnt ..... fIII~sourcll "fIIMl/fland ambiflt1t
temPfl,(ltl.ll'V for 07 (PUT).

Fig. 15 - Va/my-point current
01 (PUT).

n. fIII • •ource voltage for

----------------------------________________________~___________ 195

CA3097E

20V

(!}'-+-oVO
'.81111

Fig. 22 - Gentlfll' /IIJOdrJ chllnICtNin/cs toT 01 (PUT).

VAK
VRXM

IRXM

I

I

•O=,.=I~- vAK
-:::::i;1;;;;;;~I-:f=lF
CONDITIONS:
RGK"I KQ

WITH SWI CL.OSED. INC'EASE VS'UNTIL SC;:=-FIRES IVTVM DROPS
FROM 10V TO "PPROXI .. ATELY IV I. tGS (TRIGGER 1IS MEASURED
JUST .!B.!Q! TO THIS TRIGGERING POINT. NOTE TH ..T IGS ....Y
DECREASE AS Vs IS INCREASED DUE TO CURRENT DRAWN OUT
OF THE GATE TER..INAL. OF THt SCR AS IT TURNS ott. TO UNLATCH
THE SCR OPEN 5WI.
•

APPLIED
ElCPONENTlAI.;
VOL.TAGE

V OXM

TA"25·C

*"s 5t4OULO BE CAPABLE OF SUfJPLYIHG MILL.IVOl.T INCREMENTS
NEAR THE TRIGGER POINT

Fig. 24 - hincipls WJIt11ge-cummt c/laractNistics
fOl'02(SCR).

Fig. 25 - OIIflnition of crifiu/,.,. of,istI of
off.,tlltII voJrap ftK 02 (SCR).

Fi,. 26 - Talt cin:uit fo, .,ermlnln,
'GSin Q2 (SCRI.

APPLICATIONS CIRCUITS
1200

120V

'0",

'oon
L~

__ J

TVPICAL TEMPERATURE CM"RACTERISTIC
TIIIII"G PERIOD ..... 200
TIMING CYCL.E BEGINS
• SPRAGUE TVPE 4308,
SPRAGUE TYPE 6308,
OR EDUIVALENT

(i)

!:.UBSTRATE
SEC. WITH I MQ POT CENTERED
WHEN AC 'S APf"UEO
51'F AT 50 V
'SI'F AT 50 V

RL.

'330{to.~.

IOO-!O.OI""4'·C

TVP LOAD R£GUL.ATION@I L .OT040m",16Yo/VoI_100.
-3'"4 (NO L.OAOTO FULL LO.. OI

Fig. 27 - AC'lIne,opMIttKI olllt-shot timer.

PUL.SE RATE ADJUSTED BV VARYING RTOR CT'
OUTPUT PULSE WIDTH ADJUSTED av RIC.
OI~FERENTIATING TINE CONsTANT
TVPICAL. OPERATION FOR:
v+. 15 V. C,..O.I ~F, AT·4 3KO

CI :8ZpF,

RI"60Kll

Fig. 29 -

nCM-21929

Pu_ gener"rot".

________________________________________________________________ 197

CA3098 Types

Programmable Schmitt Trigger

Features:

- With Memory

• Programmable operating
current
.
• Micropower standby dissipation
• Direct control of currents up
to 150 mA
• Low input on/off current of
less than 1 nA for pro·
grammable bias current
of1 /lA

-Dual-I nput Precision Level Detectors
Applications:
• Control of relays, heaters, LED's lamps,
photo-sensitive devices, thyristors,
solenoids, etc.
• Signal reconditioning
• Phase and frequency modulators
• Onloff motor switching
• Schmitt tri ggers, level detectors
• Time delays
• Overvoltege, overcurrent, overtemperature
protection
• Battery-operated equipment
• Square and triangular-wave generators
The RCA·CA3098 Programmable Schmitt
Trigger is a monolithic silicon integrated
circuit designed to control high·operating·
current loads such as thyristors, lamps,
relays, etc. The CA3098 can be operated
with either a single power supply with
maximum operating voltage of 16 volts, or a
dual power supply with maximum operating
voltage of ±8 volts. It can directly control
currents up to 150 mA and operates with
microwatt standby power dissipation when
the current to be controlled is less than
30 mAo The CA3098 contains the following
major circuit·function features (see Fig. 1):
1. Differential amplifiers and summer: the
circuit uses two differential amplifiers,
one to compare the input voltage with
the "high" reference, and the other to
compare the input with the "low" refer·
ence. The resultent output of the differ·
ential amplifiers actuates a summer cir·
cuit which delivers a trigger that initio
ates a change in state of a flip·flop.
2. Flip-flop: the flip·flop functions as a
bistable "memory" element that changes
state in response to each trigger command
3. Driver and otuput stages: these steges
permit the circuit to "sink" maximum
peak load currents up to 150 mA at
terminal 3.
4. Programmable operating current: the cir·
cuit incorporates access at terminal 2 to
permit programming the desired quiescent
operating current and performance para·
meters.
The CA3098 is supplied in the 8-lead dual·in·
line plastic packagej("Mini·Dip", E suffix),
8-lead TO-5 style package (T suffix), 8·lead
TO·S-style package with formed leads "OIL·
CAN" (Ssuffix), and in chip form (H suffix).
For information on another RCA Dual-Input
Precision Level Detector, see the data bulletin
for the RCA-CA3099E, File No. 620.

• Built-in hysteresis: 20 mV
max.
• Programmable hysteresis:
20 mVto V+
• Dual reference input
• High sensor range: 100 0
to 100MO
• Stable predictable Switching
levels
• Temperature-i:Ompensated
reference voltege
• Power can be strobed off
via term. 2

2

PROGRAMMABLE
BIAS CURRENT

INPUT (IalAsi

OUTPUT
CURRENT

CONTROL

•

SIGNAL. INPUT

L ____

L

__~A~

-----J
__

I

__.J
y-

Fig. 1 - Block diagram of CA3098 programmable Schmitt trigger.

Maximum Ratings, Absolute-Maximum Values at TA = 2!t'C:
Supply Voltage Between Terminals 6 and 4, ............................ 16
V
Output Voltage Between Terminals 7 and 4, and 3 and 4 ................... 16
V
Differential Input Voltage Between Terminals 8 and 1, and
V
Terminals 7 and 8 .............................................. 10
Operating Voltage Range:
Term.8 ....................................•.................
V-to V+
Term. 7 .............................................. (V- plus 2.0 V) to V+
Term. 1 ........................................... (V-) to (V+ minus 2.0 V)
Load Current (Term. 3) ........................................... 150
mA
Input Current to Voltage. Regulator (Term. 5) ......................... .
25
mA
Programmable Bias Current (Term. 2) ........................... ' ..... .
mA
Output Current Control (Term. 5) .................................. .
15
mA
Power Dissipation:
Without Heat Sink:
Up to T A = 55D C
CA3098S, CA3098T ......................................... 630
mW
CA3098E . ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 630
mW
Above TA = 55DC Derate linearly at ............................. 6.67 mWI"C
With Heat Sink:
Up to T A = 55D C
CA3098S, CA3098T .........................................
1.6
W
Above TA = 55DC
CA3098S, CA3098T Derate linearly at ........................... 16.67 mWI"C
Ambient Temperature Range (All Packages):
Operating .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to + 125 DC
Storage
................................................... -65 to +150 DC
Lead Temperature (During Soldering):
At distance 1/16 ± 1/32 inch (1.59 ± 0.79 mm)
from case for 10 seconds max. ................................
265
DC

______________-----------------------------------------------------199

CA3098 Types
ELECTRICAL CHARACTERISTICS at T A = 25°C Unless Otherwise Specified

1.4 AMBIENT TEMPERATURE ITAI.2S·C

=~:M:J~~~~~;~:~~NT

:>

CHARACTERISTIC

Fig.
No.

TEST CONDITIONS

LIMITS,
Min. Typ. Max.

UNITS

"Low" Ref., VIO(LR)

VLR= Gnd, VHR = 3V
IBIAS = 100 IlA

5

-15 -3

"High" Ref., VIO(HR)

VHR = Gnd, VLR = -3 V
IBIAS = 100 Ilf/.

6

-10 ±10

-55°C to + 125 DC
-55°Cto+ 125°C

7
S

Min. Hysteresis

VREG = 6 V, V+ = 12 V
IBIAS = 100 IlA

Voltage VIO(HR-LR):
Temp. Coeff.

-55°C to + 125°C

Output Saturation Voltage,
VCE(SAT)

4.5
±S.2

9

-

3

20

10

-

6.7

-

-

0.72

1.2

/

~·I---j---+-HHf--H-+-+-+-j

~ ~~-+---+-~~--~-~~-+4
~
~
1/

5 o.4~-+---+v-'I'-1H--~-~~-+4

10

-

VI =4 V, VREG = 6V,
11,12
V+ = 12 V, IBIAS= lOOIlA

mV

6

118145)-IOOp'"

L2

~ 1r-+-~~+I/+-~4-rH

i

Input Offset Voltage:

Temp. Coeff:
"Low" Ref.
"High" Ref.

~

~ o21--f-::;.,....Q-HH--I--+-+-+-j
§ Vr-'
6
'.boo
10
'00

-

OUTPUT SINI( CURRENT IILOA01-I\fIA

IlV;"C

-

Fig. 11 - Output saturation tloltage
sink current:

lIS.

output

75

100

mV
IlV;"C
V

SUPPL'I' VOLTAGE IV+'-IOV

i

PROGRAMMING BIAS, CURRENT I1BIo\S '.100,.0\

Y

~I

W

~""
g

Total Supply Current,
ITOTAL:

~0.8

"ON"

VI = 4 V, VREG = 6 V;
13,14
V+ = 12 V, IBIAS = 100llA

500

"OFF"

VI-SV,VREG=6V
V+= 12V,ISIAS= 100llA

400

SOO

710

IlA

560 750

s
~

Q7

IlA
-100

-75

-50

Input Bias Current, liS:

25

-25

50

AMBIENT TEMPERATURE ITAI-"C

VI = 4 V, VREG = 6 V
V+= 12V,ISIAS= 100llA

IB(p.n.p)

VI = S V, VREG

IB(n-p-n)

=.

15

6V

V+= 12V,IBIAS= lOOIlA

Output Leakage Current,

Current from Term. 3 when
Q46is "OFF"

ICE(OFF)
Switching Times:
Delay, td

-

IC = lOOIlA

-

42

100

nA

-

2S

100

nA

-

-

10

IlA

-

600

-

ns
ns

Fall, tf

IBIAS= 100llA

-

50

-

Rise, tr

V+= 5V

-

500

-

ns

Storage, ts

VREG = 2.5 V

-

4.5

-

lIS

100

-

-

mA

Output Current, 10

18

V+= 12V,IBIAS=50IlA

..

•

I'~

-

I I ••

AMBIENT TEMPERATURE CTA • S-

Hf H::;+ '!~: ::::

Fig. '2 - Output sa,turation voltage
temperature.

2

..

6 810

PROGRAMMING

2

..

6 ,'I K)

lIS.

2

ambient

..

6 81000

BIASCURRENT(IBIASl-".A

Fig. '3 - Total supply current tis. programming
bias current.

e

•~:~txT~~L~e~~Lyv:t;L'1A~tv..
I I
I
"?': V
. , '6. IJ~,.'·'/
,/
i

·
.. ..== ==1-"".',.,
....
I '7,c:: '""
. ·•,
..
, . .. , . ..

PROGRAMMING BIASTc:.~~~T ~~,?S~:I~".:~ ~

,

125

92CS-20980

10

tr •

...
u

1

!2
ii

:~

... +-

tH'

mf~

"t

,ttt

• Ht

;:1

tiL

~

4

!E

0.1

,

10
100
PROGRAMMING BIAS CURRENT (I8IAS)-~A

Fig. 14 - Tota' supply current VB. ambient
temptN'ature.

4

II

1000

Fig. 15 - Input bia, current VI. programming bias
CUf1'8nt.

Fig. 16 - Input·offset voltage
rest Circuit.

____________________________________.__________________________________ 201

CA3099E
Programmable Comparator - - With
RCA·CA3099E

Memory

POSITIV£SUPPLY
VOI.TAG£FOft
CONSTANTCURR£NT8IA$

v'

Programmable Comparator is a monolithic

silicon integrated circuit designed to control high·operatingcurrent loads such as thyristors, lamps, relavs. etc. The
CA3099E can be operated with either a single power supply
with maximum operating voltage of 16 volts. or a dual
power supply with a maximum operating voltage of ± 8 Volts.
Jt can directlv control currents up to 150 rnA. It operates with
microwatt standby· power dissipation when the current 10 be

SOURC£OFRfF£A£I\ICE
"o~u.G£ I"Vb,,!I
II

controlled is less than 30 rnA. The CA3099E contains the
following six (61 major circuit-function features (Figure 11:

1. Differential amplifiers and summer; the circuit uses two
differential ampl ifiers. one to compare the input yoltage

with the "high" reference, and the other to compare the
input with the "low" reference. The resultant output of
the differential amplifiers actuates a summer circuit
which delivers a trigger that initiates a change in state of
a flip-flop.
2. Flip-flop; the flip-flop functions as a bistable "memory"
element that changes state in response to each trigger
command.
3. Driver and output ltages: these stages permit'the circuit to
"sink" maximum peak load currents up to 150 mA at
terminal 3.
4, Programmabla operating current; the circuit incorporates
a separate terminal to permit programming the desired
quiescent operating current and performance parameters.

UNIIElo,n.~~ED

Fig. , -Block diagram of CA3099E progrllfJll1Hlbl. ComtMr.tor.
is..". 3 for (leIltll'M dercriptlon Df circuit op.r.tion.)

5. Internal sources of reference voltage and programmable
bias current; an integral circuit supplies a temperaturecompensated reference \loltage IVb/21 which is about 1/2
of the externally applied bias \loltage (Vb), Additionally,
integral circuitry can optionally be used to supply an
uncompensated constant-current source of bi8$ (lbias).

Applications:
• Control of relays, heaters, LEO's, lan,ps,
photo-sensitive devices, thyristol'l,
solenoids, etc.
• Signal reconditioning
• Phase and frequlncy modulators
• Onloff motor switching
• Schmitt trlggel'l, level detecton
• Time deleys
• avlrvoltage. cwercurrent,
overtemperature protaction

• Programmable hysteresis: 10 mV to v+

•
•
•
•

Dual reference input
High sensor range: 100 n to 100 Mn
Suble predictable switching levels
Temperature-compens8ted reference
voltage

,.,.

V

Referent;eVoltage

V

Referent;e Voltage
Temperature Coefficient

10

V

Regulated Supplv Voltage

CHARACTERISTICS

OVtoV+
2.0 V to V+
to V+ mmus2.0 V
150
mA
25
mA
1
mA
15
mA

aV

750
6.67

mW
mW/oC

DC

SYMBOL

TEST CONDITIONS
OtMrwi_ IndicMed
TA • 250C

Un...

FIG. No.

Term. 9 = 12 V, Term.4 = Gfd, Term.1' = Test

LIMITS
MIN. TYP. MAX.

5.7

VREF

VREG

Input Qffset Voltage:
"Low" Reference

VIO ILA)

"High" Referent;e

VIO (HAl

Term.5 1 K to 12V. Term.4 = Grd, Term.610KtoGrd

VLR = Grd, VHR = 3 V. ISlAS = l00JJP,
VHR = Grd, VLR = 3V,~BIAS= 1DOpA

20,6
20.7

"Low" Reference Temp.
CoeffiCient

-55OC 10 .1250 C

20••

"High" Aeference Temp
CoeffiCient

-550C to +125aC

20 ••

VIOIHR-LR,

Min. Hvstere5's Voltage
Temperature Coefficient
Output Saturation Voltage

VCEISATI

Total Supplv Current"
'TOTAL "ON"
'TOTAL "OFF"

ITOTAL

InputSlas Current:
IBIp..n·pl

ISlnop-n1
OutPUt Leakage Current
Internal Bias Current

•

..3

lui
ICEtOFFI

VREG" 6 V. V· = 12 V, 'BIAS = tDO~A

-8

7.2

V

my/aC

-3

11

mV

4.'

20

"'.2

>20

6.7

20

/NI"C

10

21,10

_S5oC to t1250C
V,-4V. "REG'" 8 V, y+ '" 12 Y,ISIAS" 100~

21,12,13

-

0.72

1.2

V, - 4 V, VREG = 8 Y, y+ '" 12 V, 'SIAS. = 100SiA

21,14,15

600

710

BOO

VI-S.Y, VREG" 6Y, V+ "12V,IBIAS = tOO~

21,14.15

420

560

760

VI = 4 V; VREG '" 6 V. V+ "12 V, ISlAS '" l00~

21,16,17

33

200

VI"8 V. VREG = 6 Y, y+ .. 12 V, 'SIAS -tDOpA

21,16,17

20

60

mV

IN/0C '
V

jJA

nA

10

Current from Term.3 when 046 is "OFF"
IB,19

IIBC

V

2.•

±1

-

UNIT

JNloC

100

Regulated Supplv Voltage
Temperature CoeffiCient

Min. Hvstere51s Voltage
-55 to +125 °c
-65 to +150 o C

>2"

• Battllry-opara'btd equipment
• Square end triangular-wave generators

ELECTRICAL CHARACTERISTICS AT TA = 25"C (Unless otherwire indicated)

Mtximum Retin... AbsoJute-Msxl,,!um ValutJl.t TA .. 2SOC:

Power Dissipation:
UptoTA=550C.
Above T A '" 55°C.
Derate Lmearlyat
Ambient Temperature Aange:
Operatmg
Storage.
Lead Termperature lOuring Soldermg):
At distance not less than 1/32 Inch (0.79 mml
from seating plane for 10 s maximum

Features:
• Programmable operating current
• Micro-power stlndby dissipation
• Directly controls current up to 160 mA
• Low input onloff current of leIS than 1 nA
for programmable bias current of 1 tJA.

• Built·in Ilysteresis: 10 mV ma:K.

6. Voltage regulator; provides optional on-chip \loltage regu·
lation when power for the CA3099E is provided by an
unregulated supplv.

SupplV Voltage Between Terminals 10 and 4,
9 and 4, 8 and 4
Output Voltage Setween Terminals 7 and 4,
and 3and 4.
Differential Input Voltage Setween
Tllt'minals 14 and " and Terminals 13and 14.
Operating Voltage Range:
Tllt'm.14
Term. 13
Term. 1
Load Current (Term. 3).
Input Current to Voltage Regulator (Term. 5)
Programming Bias Current (Term. 2) .
Output CUrrent Control (Term. 71.

.

"\'u1./h.\JfD

120

200

280

jJA

Switching Times:
Delav
Fall

'.

Rise
Starage

Ie" l00)JA
ISlAS" 1001JA
v+ "'5V
VREG = 2.5 V

"

22

600

22

60

22

600

22

4.6

pS

203

CA3099E
=t 4 ~N:~~~: ;~~::::~~~~ ~TI~ ~ 25"C

·.~I:::~~FF~~~:~ :~t~::~ (f~~~II::~

t1

'.~-+4+r-~~~~~~~~

;

~ 2~~~~~~~--~r+t-r+--t-rt1

~V

g

~
~

I

~

..
i

25

50

lS

100

AMIIENT TEMPERATURE (TA!--C

I~

10

4

II 1 100

4

II '1000

PROGRAMMING liAS CURRENT tlltASI-,.A
92CS-20914

UCS-20!H9

FIg. 9 - Input-offHt IIOIt.,. ("high" reference} v.t. ambient

Fig.

to -

Min. hV$r.rrnis volt",. n. progrllmming bill' curr"",.

ttnn",,"ture.

:r

i,

AMBIENT TEMPERATUR£ (TA'-U·C

r'

:=~:~~~~~=~~T ClBlAS!·IOO~A

I

I ='::;';;;:",~ ,'-

4 REGULATED SUPPLY VOLTAGE tVR£GI-'

v

~ '~+-~~~I+-/+-~~

i

M'r---+_--_t~~_H~_i----+__t_r1

!

Mir_--~--+_~4Il_--+_--~_i_t1

~!
l

§

O.4r_--~--+/-,t'+~----t----t-++-l

~r_--~~~_i__t_t--__t----~~+_l

V

,

10

&

100

•

JI~

...

lboo

A....NT TEMPERATURE 1f,.1-"C

10
100
1000
PROGRAMMING liAS CURRENT (1 8IASI-p.A IlCS- 20913

9ZC$-ZOHO

OUTPUT SINK CURRENT ClLOACI-ftlA

Fig. 12 - Output SIIturlItion IIOItll(Jll

. ..

'0

PIIIOGRAMMING

Fig.

'6·

If$.

output .tlnk cur"",t•

. ..

'00

. ..

liAS CURRENT CIIIASI-,..A

Fi,. 13 - Output Slltu,.t/on IIOIt"". .... I!IIrIbitInt ,."".,lItul'&

'000

'nputbiMcurrtl"t .... fJI'Of1'I!Immintlbiucu',.",.

SUPPLY VOLTAII: (V+I-V

FI,. 16 _ In",""" billS CUffllftt VI. IUpply voItIIfI&.

FIll- t'-ln,.",.blMcu".",n.""""""""",tcnw.
V+

.IV

~~
I

I

V
0I:L
:I
J
:
I
I
I

~TD+i
I

HYSTERESIS VOLTAGE -VI "oFF"-VI 'bN"

FIg. 18 -Input-off.t voItIJIII tart circuit.

F~

'9 -

9ZC$-20994

Min. hyltere,ti.r voItll(Jll. tot. supply current,
IIIId input bills cur""'t ttl6t circuit.

I

....Tf I-

I.~
"I

rTsij I
41 T ,

.-

FIJ. 20 - Switching tlnw test cin:uit.

For application information, see Data Bulletin File No. 620.

-----------------------------------------------------------------205

CA31 00 Types
= 25"C:

ELECTRICAL CHARACTERISTICS, At TA

TYPICAL CHARACTERISTIC CURVES (Cont'd)
LIMITS

TEST CONDITIONS
SUPPLY VOLTAGE (V+,V-)-15 V
UNLESS OTHERWISE SPECIFIED

CHARACTERISTICS

UNITS
MIN.

TYP.

MAX.

STATIC

Input Offset Voltage, VIO

-

±1

±S

mV

-

0.7

2

Vo = 0 ± 1 V

-

±0.C5

±OA

/JA
/JA

Vo = ± 1 V Peak, F = 1 kHz

56

VO=O±O.l V

Input Bias Current, 'IB
Input Offset Current, 110

Low·Frequency Open-Loop
Voltage Gain,AOL.

Common-Mode I "put,
Voltage Range, VieR
Common-Mode
Rejection Ratio. CMRR

CMRR :;:'76 dB

±12

61

+ 14
-13

-

dB

-

V

dB

VI Common Mode'" ± 12 V

76

90

-

Positive, VOM +

Differential Input Voltage:;:: 0 ± 0.1 V

+9

+11

-

Negative, VOM -

RL = 2 KH

-9

-11

-

fREQUENCY (O-MHz

Maximum Output Voltage:

Maximum OutPllt Current:
Positive.'OM+

Differential I nput Voltage = 0

± 0.1

V

RL" 250 H

Negative. 10M

Vo ~

Supply Current,t+

Power-Supply

a to.l
t

l1V+:::;

Rejection RatiO, PSRR

V, RL210KH

lv.6v-~t 1 V

Fig. 4 - Open-loop gain vs. frequency and supply
voltage.

V

-

+15

+30

-15

-30

-

-

8.5

10.5

mA

60

70

-

dB

-

38

-

MHz

36

42

-

dB

AMBIENT TaPERATURE ITA'-ZS"C
LOAD RESISTANCE IAL,"ZIUl
LOAD CAPACITANCE tCL"20pf

mA

DYNAMIC
Unity-Gain

Cc = 0, Vo = 0.3 V (p.P)

Crossover Frequency, fT
1-MHz Open-Loop

1 = 1 MHz, Cc

Voltage Gain, AOL

=O. Vo =

10 V (P·P)

20

10
NONINVERTING GAIN-de
6
INVERTING GAIN - dB

o

Slew Rate, SR:
20-dB Amplifier

AV = 10, CC= 0, VI

=1 V

(Pulse)

AV = I, Cc = 10 pF, VI = 10 V (Pulse

Follower Mode
Power Bandwidth, PBw&:
20-d8 Amplifier

AV=

la, Cc' 0,

AV= l,Cc

Follower Mode

s

50

70

-

25

-

CLOSED-LOOP GAIN {ACLI-dB

V/jJs

Fig. 5 - Required compensation capacitance tis.
closed-loop gain.

~

Vo = 18 V (P·P)

0.8

1.2

-

10pF, Vo -lBV (P·P)

-

0.4

-

MHz

Open-Loop Differential
Input Impedance, Z,

F = 1 MHz

-

30

-

Kn

Open-Loop
Output Impedance, Zo

F

= 1 MHz

-

110

-

n

Wideband Noise Voltage Reterred to Input, eN(Total)

BW

= 1 MHz,

-

8

-

jJVRMS

RL

=2

-

0.6

-

jJs

RS

= 1 Kil

19.1

Settling Time. ts
[TO Within ± 50 mV 01 9 V
Output Swing

COMPENSATION CAPACITANCE (CC' PINS I TO e - p f

.. Power Bandwidth = Slew Rate
nVO (p·P)

,,.

KH, CL = 20 pF

• Low-frequency dynamic characteristic

Fig. 6 - Slew rate vs. compensation capacitance.

AMBIENT TEMPERATURE ITA"2S"C
SUPPlY VOLTAGE (V~V-':15 V

AMBIENT TEMPERATIJRE ITAI-ZS"C
~><1 SLPPLY
VOLTAGE 1'1+, v-l-ISV'
~ 4 r- ,---

30 AMBIENT TEMPERATURE (TA'.2S"C
BANDWOTH (BW) AT 6de-IMHr

~

~

HEWLETT

CA3~~~!~CE
"0
,

S

-

-115'1

I

-

METER 4BI5A

..s:..

I-oy

Vo~OtO.l

VDC

20

'30

40

FREQUENCY (fI-MHI

Fig. 7 - Typical open-loop output impedance tis.
frequency.

102

~

e 10"

~

I
is

AOJUST fOR
10

~,

-

7+I!5V'

2

~--i"-.,

.i ,.'
,

I~
e 104

SOURCE RESISTANCE IRsl-n

Fig. 8 - Wideband input noise voltage vs. source
resistance.

f".

.-

'-...
10:

,

,

* -'""'

1

1

t-....

:-...

---

'-...
,"

~

_.

t-....

fREQUENCY (f1-MHI

"'"

Fig. 9 - Typical open-loop difffJrential input
impedance tis. frequency.

___________________________________________________________________ 207

CA31 00 Types
TYPICAL APPLICATIONS

3dB BANOWIDTH '15 MHz

CLG'20dB

INPUT

~¥

OUTPUT TO
TERMINATED

,on

TRANSMISSION
LINE

-3dB

8ANDWIOTH~20~HI

TOTAL INPUT NOISE

VOLTAGE REFERRED TO INPUT

",

::<35 .. vRMS

IMHz

BIf

2MHI

!5V

4MHI

2 II

"
Fig. 22 - 20 dB video line driver.

Fig. 21 - 20 dB video amplifier.

INPUT IMPEDANCE

:::.-.+-I-I-I--+-+-I+I-~'--I

V"""
V"
VI-"

0'

,

'/

v

COMMON-EMITTER CIRCUIT, BASE INPUT

l/
.,.00

. ..

COlLECTOR MILLIAMPERES (I.el

~

/

1

Fig. 14-NFvs.le@Rs=lkf!.

/

,

. ..

i:Y

~

COLLECTOR MILLIAMPERES IIel

100 COLLECTOR-TO-EMITTER VOLTSIVCE )o5V

1,~J1
(#;B"

-. . .

v

,

v

~ "

"'"

fO

1 . ./.

1

'0

,

.,.~,

~

f-l9-~

. ..

&~~

,.

Fig. 13-NFvs.le@Rs=500f!.

30 COLLE~TOR TO-EMITTER VOLTS (VeE'- 5 V
SOURCE RESISTANCE OHMS (R5'-I0000
AMBIENT TEMPERATURE {TA'-25-c

~

i

COLLECTOR MILLIAMPERES tIel

Fig. 12 - 110 V$. IC (01 and 02) for types CA3146AE
and CA3146E.

, 20"

'0

I.~i/ijr"
V

./

,

00
4

loJ

;:::-..

~#
r

5

:~~--+--+-+~--+--+-+~--+--+-+~

;

,

AMBIENT TEMPERATURE (TAl"25"C

v

COLLECTOR-TO-EMITTER VOLTS (VeE>- 5
SOURCE RESISTANCE OHMS IAslolOOO
AMBIENT TEMPERATURE (TAI"25"C

COLLECTOR-TO-EMITTER VOLTS (\t£loSV
SOL.RCE RESISTANCE OHMS (Rs)'500

I
"

180.1

46',

"

COLL.ECTOR MILLIAMPERES IIel

68

10

i;_~-+--I-II-H--II--I-+f~~~-+~~~-I
.,

Fig.15-NFvs. 1e@Rs=IOkn.

1:t:'aeJ+-~~~R'A~lf;S~A~~I"P'1
COLLECTOR-TO-EMTTER VQ..TS (VcEI"3
COLLECTOR NILLIAMPERESII I-I

~

~

-3
J~ •
5~

3

~~

2

!~

.,

468

,

2

"68

ail

...

'0

~

'00

FREQUENCY (fI-MH!

Fig. 18 - Yi. vs. f.

~~-O'.5f--f--f-f-H-+·-+--H+"-"'If---1

1--+-++++-+-++t+--+---1
11-'1--+---1-+++-+--++++-+--1
,~~

,

0.1

~

~i

bo.

p'
til

ol--+---+-++J,tre ~E:~;A:T~~:=:NCIES

,

." , , .

...

L

.

FREOUENCYlfl-NHz

./

,

.

~~

~i

-I ..

of---f--f-++t--+--+++t---+---I

Fig. 19- Yo. V£ f.

10
2
FREQUENCY(f}-MHz

8100

Fig. 20- Yre "" f.

"':'::::1.·:. I T : ! '
800 '"

:,:. ,:" :::: : : , , ' "" .

·······1''''''

:: ~~:: >:"
40~:~1

::

:::11I,:':,
':' "::.1::
........ .
'::: :":1,,' ':" ,. .
'00 ::::

;::::::::::::::::::::""

COLLECTOR MLLIAMPERES IIcl

Fig. 21- 'T"" 10

BIAS VOLTAGE-V

Fig. 22- CEB. CCg. eelvs. bias voltage

__________________________________________________________________ 213

CA3127E
Features.'

High-Frequency N-P-N
Transistor Array

-

For Low-Power Applications at Frequencies up to
500 MHz
RCA-CA3127E* consists of five generalpurpose silicon n-p-n transistors on a common
monolithic substrate. Each of the completely
isolated transistors exhibits low 1 If noise and
a value of fT in excess of 1- GHz, making the
CA3127E useful from de to 500 MHz.
Access is provided to each of the terminals
for the individual transistors and a separate
substrate connection has been provided for
maximum application flexibility. The monolithic construction of the CA3127E provides
close electrical and thermal matching of the
five transistors.
The CI\3127E is supplied ,n a 16-lead dual-inline plastic package and operates over the full
military temperature range of -55 to +125"C.

* Formerly RCA Dev. No. TA6206.

Anyone transistor.

85 mW

Total Package: 0
For T A up to 75 C
For T A
75°C Derate

425 mW

>

Linearly at.

6.67 mW/oC

AMBIENT TEMPERATURE RANGE:

°

. -55.to +125 C
. -65 to +12SoC

LEAD TEMPERATURE
lOURING SOLDERING):
At distance 1/16 ± 1/32 inch
11.59 ± 0.79 mm) from case
for 10 seconds max.

. +265 0 C

The following.ratings apply for each transistor in
the device:
. Collector-ta-Emitter Voltage, V CEO .

· 15V
· 20 V
· 20V
20 mA

Collector-ta-Base Voltage, VCBO .
Collector-ta-Substrate Voltage, VeIO·
Collector Current, Ie

*The collector of each transistor of the CA3127E
is isolated from the substrate by an integral diode.
The substrate (terminal 5) must be connected to
the most negative point in the external circuit to
maintain isolation between transistors and to
provide for normal transistor action.
AMBIENT TEMP[MTWRE ITA)·2i5"C
COLLECTOR-TO-EMITTER 'IOLTAGE IVcE,·6V
30 RSCllRZ • .eo04

../

~
~

5

,. V

""
0.0'

Vi--'

~

,

~l~

../

.....y

-

VHF mixers
I F Converter
IF amplifiers
Synthesizers
Cascade
amplifiers

92CS-22214

Fig. 7 - Schematic diagram of CA3127E.

STATIC ELECTRICAL CHARACTERISTICS at TA = 25°C
CHARACTERISTICS

LIMITS

TEST CONDITIONS

UNITS

IC= 10J.LA,IE =0

20

32

-

V

Collector-to-Emitter
Breakdown Voltage

IC=lmA,IB=O

15

24

-

V

ICl = 10J.LA,IB=O, IE =0

20

60

V

4

5.7

-

Collector-to-Substrate
Breakdown Voltage
Emitter-to-Base
Breakdown Voltage*

IE = 10 J.LA, IC = 0

Collector-Cutoff-Current

VCE = 10 V, IB = 0

-

Collector-Cutoff-Current

VCB = 10V,IE =0

-

-

35

88 -

DC Forward-Current
Transfer Ratio

IC=5 mA
VCE =,6V

Ic=l,mA
IC =0.1 rnA

Base-to-Emitter Voltage

VCE = 6 V

-,

40

90

35

85

V

0.5

J.LA

40

nA

-

Ic=5mA

.0.71 0.81 0.91

IC=l mA

0.66 0.76 0.86

IC=O.l mA

0.60 0.70 0.80

V

Collector-to-Emitter
Saturation Voltage

Ic=10mA,IB=lmA

-

Magnitude of Difference
in VBE

01 & 02 Matched

-

0.5

5

mV

Magnitude of Difference
in IB

VCE = 6 V, IC = 1 mA

-

0.2

3

J.LA

0.26 0.50

V

·When used as a zener for reference voltage. the device must not be subjected to more than 0.1 millijoule of
energy from any possible capacitance or electrostatic discharge in order to prevent degradation of the
junction. Maximum operating zener current should be less than 10 rnA.

~

...... 1---"
• • 'Go

"""-

Collector-to-Base
Breakdown Voltage

~~

/

1"'=

- VHF amplifiers
- Multifunction combinationsRF/mixer/oscillator
- Sense amplifiers
- Synchronous detectors

For Each Transistor:

POWER DISSIPATION. Po:

T 2.

Applications:

Min_ Typ. Max_

MAXIMUM RATINGS,
Absolute-Maximum Values:

Operating
Storage .

Gain-Bandwidth Product (fT) > 1 GHz
Power Gain = 30 dB (typ.) at 100 MHz
Noise Figure = 3.5 dB (typ.) at 100 MHz
Five independent transistors on a common substrate

100 11HZ...........

"

COU,ECTOR CURRENT (lcl-illA

Fig_ 2 - 1If noise figure as a function of collector

current at RSOURCE = 500 11.

_____________________________________________________________________ 215

CA3127E
. . . .NT TEIIIPIItATUM: 1'Tf)-ZS"'C

,AIt: ''tEl·• ..,

CGU.ECTQII-TO-Dntu . .

IIg .

• CClLLlCTOII CUMlNT lIeI.I ....
T

i=i '

iH-

/'

r:

./"

,/

V

Y

Ii

./

\

!
I

.

I

•~

~u

,/

iI .T
~ O.
A 0.'

/

~ .,.'I-~
O.Ir--hz

,

'00

1000

FIitEQUENCY In-IIIH.

•I
•I
-•
•,
T

I
.//

..

.. .

100

t. AIII.ENT TEMPERATUM: IT.. I-2"(
1.2 COLLECTOIt-TO-PlfTTtR VOLT....
(VeEI"V
1.1 eG.LKTOft ClJRHNTtlcl-I."
'.0

....

/til

~ ,L..--"'"

J

I

./

.

.

...

COLLECTOR CURRENT UC1-mA
saCS-1HZ'

Fig. 10 - Input admittance (Y ,,) as B function of
frequency.

fig. It - Input admittance (Y tt) as a function of
collector current.

Fig. 12 - Output admittance IY22) au function of
frequency.

S

100

•

1"'1lOO

FREQUENCY tn-MHI
COLLECTOR CURRENTIICI-mA

COLLECTOR CURRENTlIcI-IIIA

Fig. 13 - Output admittance I Y22}a$ a function of
collector current.

Fig. 14 - Forward transadmittance (Y21) au
function of collector current.

1 "1000

,00

Fig. 16 - ReverBe transadmittance IY 12} as a
function of collector current.

02 1
~60n

.

Fig. 17 - Reverse transadmittance (Y 12) as a
function of frequency.

Fig. 18 - Voltage--gain test circuit using currentmirror biasing for 02-

This circuit was chosen because it conveniently
represents a close approximation in performance to
a properly unilateralized single transistor of this
type. The use of Q3 in a current-mirror configuration facilitates simplified biasing. The use of the
cascade circuit in no way implies that the transistors cannot be used individually.

""n
,

1
,

•

FREQUENCY ttl-MHJ

COLLECTOR CURRENT IIC1-ImA

,<-.--'......=-'

Fig. 15 - Forward transadmittance IY21} au
fUlJCtion of frequency.

1

=1

O~:!TEr-_~-'-1.......<1Ir_ _ _.......'OO"'!!;o'
I ".n
J:
~

I*
-1.

E. F. JOHNSON NO) 160-104-1

OR EQUIVALENT

Fig. 20 - Block diagram, of power*fJBin and noiseFig. 19 - tOO-MHz power-gain and noise-figure test circuit.

figure test sBt-upS.

________________________________________________________________ 217

CA3130, CA3130A, CA3130B Types
rcMi5O'-------------------,

MAXIMUM RATINGS, Absolute-Maximum Values
DC SUPPLY VOLTAGE
(Between v+ and V- Terminals) . . • . . • .. 16 V
DIFFERENTIAL-MODE
INPUT VOLTAGE ••.....•.••...••.. ±S V
COMMON-MODE DC
INPUT VOLTAGE •.. (V+ +8 V) to (V- -0.5 V)
INPUT-TERMINAL CURRENT ........• 1 mA
DEVICE DISSIPATION:
WITHOUT HEAT SINK UP TO 55°C ... . . • • • • . • • • . • • . .. 630 mW
ABOVE 55°C •... Derate linearly 6.67 mWfDC
WITH HEAT SINK AT 125°C. •• . . . . •• . • • . •• . • • • .. 418 mW
BELOW 125°C ... Derate linearly 16.7 mWfDC

II

'1+

'

2OOJ£A

I
I

TEMPERATURE RANGE:
OPERATING (all types) •.••• -55 to + 1250C
STORAGE (all type" ..••..•• -66 to + 160~
OUTPUT SHORT-CIRCUIT
DURATION ~ . • . . • • • • . • . .
INDEFINITE
LEAD TEMPERATURE
(DURING SOLDERING):
AT DISTANCE 1/16 ± 1/32 INCH
(1.59 ± 0.79 mm) FROM CASE
FOR 10 SECONDS MAX. • • . •
+265 oC

I

I
I

·Short circuit may be applhkl to ground or to either

supply.

OfFSfT
....L

TOTAL SUPPLY \IOlTAGE (!fOR INDICATED VOlTAGE GAINS)_"
-WITH ',.UT TERMINALS BIASED SO THAT TERM.

TO

ELECTRICAL CHARACTERISTICS at TA-25oc, V+-15 V, V- - 0 V (Unle•• otherwi.. specified) ·=,;:~~::::~;:~:.~D"'VEN

"'HER

V

POTENTIAL

fj

SU""

RAIL.
UCS·14715.

CHARACTERISTIC

CA3130B (T,S)
Min_ Typ. Max.

Input Offset Voltage,
IVloI, V±=±7,5 V

-

Input Offset Current,
V±=±7.5 V

-

11101,

Input Current, II
V±=±7.5 V

0.8
0.5

-

Common-Mode InputVoltage Range, VICR

Maximum Output
Voltage:
VOM+
At RL=2 kn
VOMVOM+
At RL =00
VOM
Maximum Output
Current:
IOM+ (Source) @
VO=OV
IOM- (Sink) @
VO= 15V
Supply Current, I :
VO=7.5 V,RL = 00
VO=OV, RL =00
Input Current, II'
Input Offset Voltage
Temp. Drift,
/:"VIO//:"T*
large-Signal Voltage
Gain, AOL *

-

2
10

-

2
0.5

5
20

-

8

15

mV

Fig. 3 - Block diagram of the CA3130 Serie•.

5

30

pA

0

-

5

30

-

5

50

pA

-

50 k

320k

-

50 k

320 k

-

VIV

-

110

80

90

-0.5
to
12

10

0

-0.5
to
12

32

100

-

32

13.3
0.002

-

-

-

94

E

110

-

dB

70

90

-

dB

10

0

-0.5
to
12

10

V

150

-

32

320 p.V/V

•

;;: eo
~

j

~

SUPPLY .....,...'V·· .. v,V" ••

'l!

'{t

1~:?'
"

•

~~

I~

I

20

~

'0

,0'

I
II

,0'

,.- ,m-

FREQUENCY

HI

""

I,

--i
3
·-1

,"/,1 I

'1,..

13

'00

'"!' '.l"!'

'c;;.

eo

IT"' ..... ~

IIII +.L

,...·~1I11

"'.....

..t
~

94

I Ill..!

100

~

0.5

20

-

. r;;..""m'j"T wiii"li..

,~

r
w

large,Signal Voltage
lOOk 320 k
Gain, AOL
110
VO=10 V p _p ' RL =2 kn 100
Common-Mode
100
86
Rejection Ratio.CMRR

Power·Supply Rejection
Ratio, /:"VIOI/:,.V±
V±=±7.5 V

LIMITS
CA3130 (T,S,E) Units
CA3130A (T,S,E)
Min. Typ. Max. Min. Typ. Max

~

t4

i

111.1 Iq
NI,\11 ,
"CS-1471.

Fig. 4 - Open-loop 1I0/r.ge gain and phs.. ,hift
VI. frequency for _iOU8 ""'II1II of
CL , Co and RL •

!

Ij-

110 LOAD _'STANCE 'RL'. 2ItA

',140

J~

12
14.99

15
0

12

0.Q1

-

-

14.99

0.Q1

13.3
0.002 0.Q1
15
0

-

12

14.99

0.Q1

13.3
0.002 0.01
15
0

-

1,20
V

•i"·

~,
I ..
'00

0.Q1

~

·so

·'00

12

22

45

12

22

45

12

22

45

12

20

45

12

20

45

12

20

45

Fig. 6 - Open·/oop gain

mA

.. I'

-

-

10

-

-

320 k

-

110

-

15

-

5

50 k

320 k

94

110

-

10

15

2

3

Fig.12

15

-

-

10

15

2

3

Fig.12

2

3

Fig.12

-

nA

~75

-

10

-

p.V(OC

i* •

-

320 k

-

110

: II.S

1,0

~

-

dB

0

temperature.

!1

~~
~~3
I~
\!

15

VIV

VI.

~

10

mA

'00
SlZeS-f..'!'I'!'

:'::T~~=R~:.;;t:I~;.:I~••:~ ~

I7.S

j'

-

so

0

AMIIENT TEMPOATURE IT.I- oc"

0

Ii!

1:1

' I,I

:'t

!r all
and its cascode-connected load resistance
provided by PMOS transistors Q3 and 05.
The source of bias potentials for these PMOS
transistors is subsequently described. MillerEffect compensation (roll-off) is accomplished by simply connecting a small capacitor between Terms. 1 and 8. A 47-picofarad
capacitor provides sufficient compensation
for stable unity-gain operation in most
applications.
Bias-Source Circuit-At total supply voltages,
somewhat above 8.3 volts, resistor R2 and
zener diode ZI serve to establish a voltage of
8.3 volts across the series-connected circuit,
consisting of resistor R I, diodes 01 through
04, and PMOS transistor 01. A tap at the
junction of resistor R1 and diode 04 provides
a gate-bias potential of about 4.5 volts for

PMOS transistors Q4 and 05 with respect to
Term. 7. A patential of about 2.2 volts is
developed across diode-connected PMOS transistor 01 with respect to Term. 7 to provide
gate bias for PMOS transistors 02 and 03. It
should be noted that Ql is "mirror-connected"t to both 02 and 03. Since transistors Ql, 02, 03 are designed to be identical, the approximately 2QO-microampere
current in 01 establishes a similar current in
02 and 03 as constant-current sources for
both the first and second amplifier stages,
respectively.
At total supply voltages somewhat less than
8.3 volts, zener diode ZI becomes nonconductive and the potential, developed
across series-connected Rl, 01-04, and 01.
varies directly with variations in supply
voltage, Consequently, the gate bias for 04,
05 and 02, 03 varies in accordance with
supply-voltage variations. This variation results in deterioration of the power-supplyrejection ratio (PSR R) at total supply voltages below 8.3 volts. Operation at total supply voltages below about 4.5 volts results in
seriously degraded performance.
Output Stage-The output stage consists of a
drain-loaded inverting amplifier using COS/
MOS transistors operating in the Class A
mode. When operating into very high resistance loads, the output can be swung within
millivolts of either supply rail. Because the
output stage is a drain-loaded amplifier, its
gain is dependent upon the load impedance.
The transfer characteristics of the output
stage for a load returned to the negative
supply rail are shown in Fig. 6. Typical opamp loads are readily driven by the output
stage. Because large-signal excursions are nonlinear, requiring feedback for good waveform
reproduction, transient delays may be encountered. As a voltage follower, the amplifier can ach ieve 0.01 per cent accuracy levels,
including the negative supply rail.
Input Current Variation with CommonMode Input Voltage
As shown in the Table of Electrical Characteristics, the input current for the CA3130
Series Op-Amps is typically 5 pA at T A=250 C
when terminals 2 and 3 are at a commonmode potential of +7.5 volts with respect to
negative supply Terminal 4. Fig.11 contains
data showing the variation of input current
as a function of common-mode input voltage
at TA = 25 0 C. These data show that circuit
designers can advantageolJsly exploit these
characteristics to design circuits which typically require an input current of less than 1
pA, provided the common-mode input voltage does not exceed 2 volts. As previously
noted, the input current is essentially the
result of the leakage current through the

gate-protection diodes in the input circuit
and, therefore, a function of the applied

INPUT CURRENT eXT , - ,A
92CS-290••

Fig. 1 1 - Input current VI. common-mode voltage.

voltage. Although the finite resistance of the
glass terminal-to-case insulator of the TO-5
package also contributes an increment of
leakage current, there are useful compensating factors. Because the gate-protection network functions as if it is connected to
Terminal 4 potential, and the TO-5 case of
the CA3130 is also internally tied to Terminal4, input terminal 3 is essentially "guarded"
from spurious leakage currents.
Offset Nulling
Offset-voltage nulling is usually accomplished
with a 100,DOO-ohm potentiometer connected across Terms. 1 and 5 and with the
potentiometer slider arm connected to Term.
4. A fine offset-null adjustment usually can
be effected with the slider arm positioned in
the mid-point of the potentiometer's total
range.
Input-Current Variation with Temperature
The input current of the CA3130 Series circuits is typically 5 pA at 25 0 C. The major
portion of this input current is due to leakage
current through the gate-protective diodes in
the input circuit. As with any semiconductorjunction device, including op amps with a
junction-FET input stage, the leakage current approximately doubles for every lOoC
increase in temperature. Fig.12 provides data
on the typical variation of input bias current
as a function of temperature in the CA3130.
4000 V+~7.5V
2 V·z-7'V

/

-80 -60 -40 -20 0
20 40 60 eo
AMBIENT TEMPERATURE ITAI-·C

tFor general information on the characteristics

of COS/MOS transistor-pairs in linaar-eircuit
applications, see File No. 619, data bulletin on
CA3600E "COS/MOS Transistor Array".

Fig. 12 - Input current

VB.

100

120

140

ambient temperature.

In applications requiring the lowest practical
input current and incremental increases in

___________________________________________________________________ 221

CA3130, CA3130A, CA3130B Types
su ited to service as voltage followers. Fig. 16
shows the circuit of a classical voltage
follower, together with pertinent waveforms
using the CA3130 in a split-supply configuration.
A voltage follower. operated from a single
supply. is shown in Fig. 17, together with
related waveforms. This follower circuit is
linear over a wide dynamic range, as illustrated by the reproduction of the output·

10 Ul

waveform in
Fig. 17a with input-signal
ramping. The waveforms in Fig. 17b show
that the follower does not lose its input-tooutput phase-sense, even though the input is
being swung 7.5 volts below ground potential. .
This unique characteristic is an important
attribute in both operational ampl ifier and
comparator applications. Fig .. 17b also shows
the manner in which the COS/MOS output
stage permits the output signal to swing down
to the negative supply-rail potential (i.e.,
ground in the case shown I. The digital-toanalog converter (DAC) circuit, described in
the following section, illustrates the practical
use of the CA3130 in a single-supply voltagefollower application.
+1'5 V

10

~n

BWI-3dB)=4MHr
SR~ 10 VII"

2 loA

o II'F

9-Bit COS/MOS DAC
A typical circuit of a 9-bit Digital-to-Analog
Converter (DAC)* is shown in Fig.18 This
system combines the concepts of multipleswitch COS/MOS IC's,' a low-cost ladder
network of discrete metal-ox ide-film resistors,
a CA3130 op amp connected as a follower,
and an inexpensive monolithic regulator in a
simple single power-supply arrangement. An
additional feature of the DAC is that it is
readily interfaced with COS/MOS input logic,
e.g., 10-volt logic levels are used in the circuit
of Fig_18.
The circuit uses an R/2 R voltage-ladder
network, with the output potential obtained
directly by terminating the ladder arms at
either the positive or the negative powersupply terminal. Each CD4007 A contains
three "inverters", each "inverter" functioning as a single-pole double-throw switch to
terminate an arm of the R/2R network at
either the positive or negative power-supply
terminal. The resistor ladder is an assembly
of one per cent tolerance metal.-oxide film
resistors_ The five arms requiring the highest
accuracy are assembled with series and
parallel combinations of 806,OOO-ohm resistors from the same manufacturing Iot_
A single 15-volt supply provides a positive
bus for the CA3130 follower amplifier and
feeds the CA3085 voltage regulator. A
"scale-adjust" function Is provided by the
regulator output control, set to a nominal
10-volt level in this s.stem. The line-voltage
regulation (approximately 0.2%) permits a
9-bit accuracy to be maintained with varia- .
tions of several volts in the supply. The
flexibil ity afforded by the COS/MOS building
blocks simplifies the design of DAC systems
tailored to particular n~eds.

Top Trace: Output

Bottom Trace: Input
lal Small-signal response 150·mV/div.
and 200 ns/div.)

OV

(a) Output..waveform with input-signal ramping

12 V Idiv. and 500 !,s/div.l

92CS·24739

Top Trace: Output signal 12 Vldiv.
and 5 !'s/div.)
Center Trace: Difference signal (5 mV Jdiv.
and 5 )lsldiv.)
Bottom Trace: Input signal (2 V/div.

and 5!,s/div.1
(b) Input-output difference signal showing
settling time (Measurement made with
Tektronix 7 A 13 differential amplifier)
Fig. 16 -

Split~supply

voltage follower with

associated waveforms.

92CS-24728RI

Top Trace: Output 15 V/div. and 200 !'sldiv.)
Bottom Trace: Input 15 V/div. and 200 !'sldiv.)
(b) Output-waveform with ground-reference
sine-wave input
Fig_17 - Single-supply voltage-follower with
associated waveforms_ (e.g_, for use
in single-supply DIA converter; see
Fig.9 in ICAN-6OOO!_

Single-Supply, Absolute-Value, Ideal FullWave Rectifier
The absolute-value circuit using the CA3130
is shown in Fig_ 19. During positive excursions, the input signal is fed through tne
feedback network directly to the output.
Simultaneously. the positive excursion of the
input signal also drives the output terminal (No_ 6) of the inverting amplifier in a
negative-going excursion such that the 1 N914
diode effectively disconnects the ampl ifier
from the signal path. During a negative-going
excursion of the input signal, the CA3130
functions as a normal inverting amplifier with
a gain equal to -R2/R1. When the equality
of the two equations shown in Fig. 19 is
satisfied, the full-wave output is symmetrical.
Peak Detectors
Peak-detector circuits are easily implemented
with the CA3130, as ill ustrated in Fig. 20
for both the peak-positive and the peaknegative circuit. It should be noted that with
large-signal inputs, the bandwidth of the

*"Digital-to-Analog Conversion Using the

RCA-CD4007A COSIMOS IC", Application
Note ICAN-6080.

___________________________________________________________________ 223

CA3130, CA3130A, CA3130B Types
justment over the range from 0.1 to 50 volts
and currents up to 1 ampere. The error
amplifier (lCl) and circuitry associated with
IC2 function as previously described, although the output of ICl is boosted by a
discrete transistor (04) to provide adequate
base drive for the Darl ington ·connected series·
pass transistors 01, 02. Transistor Q3 functions in the previously described currentlimiting circuit.
Multivibrators
The exceptionally high input resistance presented by the CA3130 is an attractive feature
for multivibrator circuit design because it
permits the use of timing circuits with high
RIC ratios. The ·circuit diagram of a pulse
generator (astable multivibratorl. with provisions for independent control of the "on"
and "off" periods, is shown in Fig. 23.
Resistors R1 and R2 are used to bias the
CA3130 to the mid-point of the supply-voltage and R3 is the feedback resistor. The
pulse repetition rate is selected by positioning Sl to the desired position and the rate
remains essentially constant when the resistors which determine "on·period" and
"off-period" are adjusted.
Function Generator
Fig. 24 contains a schematic diagram of a
function generator using the CA3130 in the
integrator and threshold detector functions:
This circuit generates a triangular or squarewave output that can be swept over a
1·,000,000:1 range (0.1 Hz to 100 kHz) by
means of a single control, Rl. A voltagecontrol input is also available for remote
sweep-control.

6UA

RSULATtON (NO LOAD TO FULL LOAD); c 0.01"
INPUT REGULATION: OD21&./V
HUM AND NOISE OUTPUT: '" 20 I£V loP TO 100 kHz
'2CM~24752

Fig.21 - Voltageregulstorcircuit (0 to 13 Vat 40 ms).

+cr--~-------------------.--------~

1000 pF

43 k.D.

+
-

+55V
INPUT

100

,.F

OUTPUT,
0.1 T050V
AT I A

lC2

!CAm6
I
I
I
I
L __ _
IkQ
S2kA

'OkQ·~VO~LT~A~G~E----------4-----~
AD.lUST

The heart of the frequency-determining system is an operational-transconductance-amplifier (OTA)', IC1, operated as a voltage-controlled current-source. The output, la, is a
current applied directly. to the integrating
capacitor, Cl, in the feedback loop of the
integrator IC2, using a CA3130, to provide
ths triangular-wave output. Potentiometer
R2 is used to adjust the circuit for slope
symmetry of positive-going and negativegoing signal excursions.
Another CA3130, IC3, is used as a controlled
switch to set the excursion limits of the
triangular output from the integrator circuit.
Capacitor C2 is a "peaking adjustment" to
optimize the high-frequency square-wave
performance of the circuit.
Potentiometer R3 is adjustable to perfect the
"amplitude symmetry" of the square-wave
output signals. Output from the threshol d
detector is fed back via resistor R4 to the
input of ICl so as to toggle the current
source from plus to minus in generating the
linear triangular wave.

REGULATION INO LOAO TO FULL LOAO): <0.005%
INPUT REGULATION, 

1111r..~r.
1111 1 1111:'0
10"

FREQUENCY

LlII.IIIII~
,
10
to'
10
m-

HI

SIMULATED

'~i

oo:~ ~2.n
I

5.lIk.Q

Fig. IS - Open-loop va/raga gain and phase lag

vs frequency.

,

"."
-e.-

10

K: SUPPLY VOLTAGE: Y+.+I!I V, ""---15 Y
/

(b) TEST CIRCUITS

Fig. 17 - Input IIoltage vs settling time.

tremely large input-signal transients from
forcing a signal through the input-protection
network and directly driving the internal
constant-current source which could result
in positive feedback via the output terminal.
A 3.9-kn resistor is sufficient.
The typical input current is in the order of
10 pA when the inputs are centered at nominal device dissipation. As the output supplies

-60

-40

-20
0
20
40
10
10
100
AMBIENT TEMPERATURE ITA I - '"C

Fig.

~9 -

______________________________________________________

120

140

Input current vs ambient
tempera ture.

~--~-------235

CA3140, CA3140A, CA3140B Types

5Jk.ll

SWEEP IN

6204

FREQUENCY

-15 V

CAliBRATION
MINIMUM

I
I
I
I
I

510 Q

I

I

: g~~19A::AY

:

L ________ ..J

Fig. 23 - Sine-wave shapero
-15 V

potentiometer connected between terminals
2 and 6 of the CA3140 and the 9.1-kil resistor and 10-kil potentiometer from terminal 2 to ground, Two break points are established by diodes D1 through D4. Positive
feedback via D5 and D6 establishes the zero
slope at the maximum and minimum levels
of the sine wave. This technique is necessary because the voltage-follower configuration approaches unity gain rather than the
zero gain required to shape the sine wave at
the two extremes.

Fig. 22 - Meter driver and buffer amplifier.
750llll
100 kO

100 kll

FINE

RATE

8.2 kll

SAW~OJ~ AND

+15V

LOW~LEVEL

SET
(-14.5'11)

75

lin

10 kn

GATE

'>--<6l_O_-"AI'v-+ PULSE
OUTPUT

This circuit can be adjusted most easily with
a distortion analyzer. but a good first approximation can be made by comparing the output
signal with that of a sine-wave generator. The
initial slope is adjusted with the potentiometer R 1. followed by an adjustment of
R2. The final slope is established by adjusting R3. thereby adding additional segments that are contributed by these diodes.
Because there is some interaction among
these controls, repetition of the adjustment
procedure may be necessary

(7)--+----~r_----r-<.J +15V

SWEEPING GENERATOR
91Ul
LOGVro

IOkn

-----,

N:

TRANSISTORS I

~

SAWTOOTH

.AM

"LOG'

I

C~~g:6
IOOll

I,

ARRAY

IL____ 3 _ _________ JI

TRIANGLE

Fig. 24 - Sweeping generator.

establish the upper frequency limit, set the
Frequency Adjustment Potentiometer to its
upper end and then adjust the Maximum
Frequency Calibration Control for the maximum frequency. Because there is interaction among these controls, repetition of
the adjustment procedure may be necesary.
Two adjustments are used for the meter.
The meter sensitivity control sets the meterscale width of each decade, while the meter
position control adjusts the pointer on the
scale with negligible effect on the sensitivity
adjustment. Thus, the meter sensitivity ad-

justment control calibrates the meter so
that it deflects 1. 6 of full scale for each decade change in frequency.
SINE-WAVE SHAPER

The circuit shown in Fig. 23 uses a CA3140
as a voltage follower in combination with
diodes from the CA3019 Array to convert
the triangular signal from the function generator to a sine-wave output signal having typically less than 2% TH D. The basic zerocrossing slope is established by the 10-kil

Fig. 24 shows a sweeping generator. Three
CA3140's are used in this circuit. One
CA3140 is used as an integrator. a second
device is used as a hysteresis switch that
determines the starting and stopping points
of the sweep. A third CA3140 is used as a
logarithmic shaping network for the log
function. Rates and slopes. as well as sawtooth. triangle. and logarithmic sweeps are
generated by this circuit.
WIDEBAND OUTPUT AMPLIFIER

Fig. 25 shows a high-slew-rate. wide band amplifier suitable for use as a 50-ohm transmission-line driver. This circuit. when used
in conjunction with the function generator
and sine-wave shaper circuits shown in Figs.
21 and 23 provides 18 volts peak-to-peak
output open-circuited. or 9 volts peak-to-peak
output when terminated in SO ohms. The
slew rate required of this amplifier is 28
volts/l/s (18 volts peak-to-peak x 11' x O.S
MHzl.

______________________________________________________________ 237

CA3140, CA3140A, CA3140B Types
system is a serious consideration, the more
usual current-sampling resistor-type of circuitry should be employed_
A power Darlington transistor (in a heat
sink TO-3 case), is used as the series-pass
element for the conventional current-limiting
system, Fig_ 27, because high-power Darlington dissipation will be encountered at
low output voltage and high currents_
A small heat-sink VERSAWATT transistor is
used as the series-pass element in the foldback current system, Fig_28, since dissipation levels will only approach 10 watts_
In this system, the D2201 diode is used for
current sampling_ Foldback is provided by
the 3 kn and 100 kn divider network connected to the base of the current-sensing
transistor _
'Both regulators, Figs_ 27 and 28, provide
better than 0_02% load regulation_ Because
there is constant loop gain at all voltage settings, the regulation also remains constant_
Line regulation is 0_1% per volt_ Hum and
noise voltage is less than 200 JlV as read
with a meter having a 10-MHz bandwidth_
Fig_31 (a) shows the turn ON and turn OFF
characteristics of both regulators_ The slow
turn-on rise is due to the slow rate of rise
of the reference voltage_ Fig_ 29 (b) shows
the transient response of the regu lator with
the switching of a 20-n load at 20 volts output_

FOR SINGL.E SUPPLY
+30V

20 dB FLAT POSITION GAIN
± 15 dB BASS AND TREBLE BOOST AND

CUT AT 100 Hz AND 10 11HZ', RESPECTIVELY
25 VOLTS p-p OUTPUT AT 20 kHz
-3 dB AT 24 kHz FROM I kHz REFERENCE

01105 ,.F

FOR DUAL SUPPLIES

+15 V

2.2 MA

,,
10110

I

BOOST
I

'
BASS:

L___TQ'!.E_ ~.!~~L._ ~E_T!i!>,!K___ J
Fig. 30 - Tone control circuit using CA3130 series

120-dB midband gain!.

FOR SINGLE SUPPLY

lator output. A FET channel resistance, a
thermistor, a lamp bulb, or other device
whose resistance is made to increase as the
output amplitude is increased are a few of
the elements often utilized.

2.2MA
20pf

L''V''''knc".'''.'''n:-~yv,kn~
ILINEAR)
I BOOST TREBLE CUT

:
I

:

:1:.15 dB BASS ANO TREBL.E BOOST

:~pi~~I~lL~~ Hz AND 10 kHz,

OUTPUT

I 2e VOLTS p-p OUTPUT AT 20 kHz.
J -3 dB AT 70 11Hz FROM 1kHz

L~~E_~_~~F!.PUT

92CS-278S7RI

811<1- 3d81 -290 .HI, DC OUTPUT (AVG I

Fig. 37 - Single-supply, absolute-value, ideal fuJI-wave rectifier with associated waveforms.
+- 15 V

SIMULATED
LOAD

>-"1"""-'

,

100

),

1t*
, ,

PF~r

L~j

~::TOP TRACE :OUTPUT
(50 mY/OIY AND 200 ns/OIVI
BOTTOM TRACE: INPUT

8w(-3dB\·4.5 MHz

SR'9

Y/jJ.~

005,..F

TOP TRACE :OUTPUT SIGNAL
{5V/DIV AND 5/-Ls/DIV.}
CENTER TRACE: DIFFERENCE SIGNAL

(50 mVlOIVANO 200 fls/DIVl
(a)

(5m VlOIV· AND

SMALL· SIGNAL RESPONSE

5~sl

DIV·}

BOTTOM TRACE '-INPUT SIGNAL
{5V/DIV. AND 5j-ts/DIV}

150 mV/DIV ANO 200nslOlVl

\b) INPUT- OUTPUT DIFFERENCE SIGNAL
SHOWIN(; SETTLING TIME {MEASUREMENT
MADE WITH TEKTRONIX 7AI3 DIFFERENTIAL
AMPLIFIER)

92C5-21880

Fig. 38 - Split-supply voltage-foJlower test circuit and associated waveforms.

l

54-62
(1312-1574\

BW(-3dBl= 140 kHz
TOTAL NOISE VOLTAGE (REFERRED
TO INPUT}:48/J-V TYP

IkSl

92C$-27888

Fig. 39 - Test circuit amplifier (30~d8 gain) used
for wideband noise measurement.

r•

4~10

(0 102~ 02541

1 - - - - - - - (I 80~=~g006) - - - - - - - 1
CA3140H Chip
The photographs and dimensions represent
a chip when it is part of the wafer. When the
wafer ~ cut into ch;p~, the cleavage angles
are 57 instead of 90 with respect to the
face of the chip. Therefore, the isolated
chip ;s actually 7 mils (0.17 mm) larger
in both dimensions.

Dimensions in parentheses are in millimeters and
are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10--- 3 inch).

___________________________________________________________________ 241

CA3141E
~

::e

2.5

I

~~ •

AMBIENT TEMPERATURE (TAI-25-C

\VF,-VF2\'\"'-"'\'~"-V..\

IVF7VF.I'IV...-',o\

r~

,1'1"; ';'i;

,

I 0.'

~
l

468

l

10

4 68

10 2

,

• '8
103

,

,

.1::1";;;; ;1';;
,,;];""1'

1/

0

'0" .... ·.,i

2
• '8
104

!!! . ,I;;;;;;;' , .
!!i ~~iIHr'j,

4 68

105

MAGNITUDE OF ANODE CURRENT(I:FAJ-pA
92CS-27176

Fig. 4 - Diode offset voltage vs. magnitude of
anode current.

4
CATHODE-lO-ANODE DC REVERSE VOLTAGE IVRI-Y

ANOOE-TO-SUBSTRATE DC REYERSE YO..TAGE

92C5-27177

evw-v

'2CS-2Tt78

Fig. 6 - Diode anode-ta-substrate capacitance
vs. reverse voltage.

Fig. 5 - Diode capacitance v&. cathode-taanode reverse voltage.

'0 t=

,-

"!I0 4

t

,~ :=
,
Y,o'
~

LEAKAGE CURRENT

/

Iv l/

~

~

:~

g !~

, 'r

0., 'f4 686.1

2

4 6 8 I

2

4 681'0

2

4

68

FORWARD (ANODE),CURRENT U:F)-mA

-'00

-\

1/

~
2~IO

0.01 2

V

DIODE -TO- SUBSTRATE

Zl03

.... ~
-50

v:: V-

o

DIODE REVERSE
(LEAKAGE)CURRENT

50

100

,.0

AMBIENT TEMPERATURE (TA)--C
,zeS-27181

92C$' 271 79

Fig. 7 - Diode cathode-to-substrate capacitance vs.
cathode-to-substrate DC reverse IID/tage.

Fig. 8 - Forward (cathode) current
.
(anode) current

liS.

forward

__________________________________________________

Fig. 9 - DC leakage current vs. ambient
temperature.

~------------------243

CA3l60, CA3l60A, CA3l60B Types
MAXIMUM RATINGS, Absolute-Maximum Values
DC SUPPLY VOLTAGE
(Between V+ and V- Terminals) . . . . . . .. 16 V
DIFFERENTIAL-MODE
INPUT VOLTAGE .................. ±8 V
COMMON-MODE DC
INPUT VOLTAGE ... IV+ +8 V) to (V- -0.5 V)
INPUT-TERMINAL CURRE~JT ......... 1 mA
DEVICE DISSIPATION:
WITHOUT HEAT SINKUP TO 55°C ................... 630 mW
ABOVE 55°C .... Derate linearly 6.67 mW/oC
WITH HEAT SINK AT 125°C... ....... ..... ...... 418 mW
BELOW 125°C ... Derate linearly 16.7 mW/oC

CIRCUIT DESCRIPTION

TEMPERATURE RANGE:
OPERATING IAII Types).
-55 to +1250 C
STORAGE (All Types) ..... -65 to +150oC
OUTPUT SHORT·CIRCUIT
DURATION* ................ INDEFINITE
LEAD TEMPERATURE
IDURING SOLDERING):
AT DISTANCE 1/16 ± 1/32 INCH
11.59±0.79MM) FROM CASE
FOR 10 SECONDS MAX ........... +265°C

*Short circuit may be applied to ground or to either
supply,

ELECTRICAL CHARACTERISTICS at TA=25 0 C, V+=15 V, V- = 0 V (Unless otherwise specified)
CA3160B (T, S)

CHARACTERISTIC

Typ.

Max.

-

0.8

2

-

2

5

-

6

15

mV

-

0.5

10

-

0.5

20

-

0.5

30

pA

-

5

20

-

5

30

-

5

50

pA

-

VN

Min.
Input Offset Voltage,
IVlol, V±=±7.5 V
Input Offset Current,
11101, V±=±7.5 V
Input Current, II
V±=±7.5 V

100 k 320 k

Large·Signal Voltage
Gain, AOL
VO=10V p _p , RL=2kH 100
Common-Mode
86
Rejection Ratio,CM R R
Common·Mode Input·
0
Voltage Range, V'ICR
Power-Supply Rejection
Ratio,/WIOIb.V±
V±=±7.5 V

LIMITS
CA3160A (T, S, E) CA3160 (T, S, E) Units
Min. Typ. Max. Min. Typ. Max

-

-

50 k 320 k

-

50 k 320 k

110

-

94

110

-

94

110

-

dB

100

-

80

95

-

70

90

-

dB

10

V

-0.5
to
12

10

0

-0.5
to
12

10

0

-0.5
to
12

32

100

-

32

150

-

32

-

12

-

14.99

Maximum Output
Voltage:
+
12
13.3
At RL=2 kS! YOM
0.002
YOM
+ 14.99
15
YOM
At RL= ~
0
YOM
Maximum Output

-

-

12

0.01

-

-

14.99

13.3
0.002 0.01

0.01

-

15
0

0.01

320 /lVN

13.3
0.002 0.01

-

15
0

0.01

V

Current:

10M + (Source)
Vo = 0 V

@

12

22

45

12

22

45

12

22

45

12

20

45

12

20

45

12

20

45

VO=7.5V,RL=~

-

10

15

15

-

10

15

VO=OV,RL=~

-

3

-

10

-

-

-

-

2
Fig.ll

3

15

2
Fig.ll

3

-

2
Fig.l1

-

5

15

-

6

-

-

8

-

50 k

320 k

320 k

-

320 k

110

-

-

94

-

110

-

-

110

10M (Sink) @
Va = 15 V
Supply Current, I

Input Current, II'
Input Offset Voltage
Temp. Drift,
LWIO/b.T'
Large-Signal Voltage
Gain, AOL

mA

mA
nA
/lV/oC
V/V

-

dB

Fig.3 is a block diagram of the CA3160
series COS/MaS Operational Amplifiers. The
input terminals may be operated down to
0.5 V below the negative supply rail, and
the output can be swung very close to
either supply rail in many applications. Consequently, the CA3160 series circuits are ideal
for single-supply operation. Three class A
amplifier stages, having the individual gain
capabil ity and current consumption shown
in Fig.3, provide the total gain of the CA3160.
A biasing circuit provides two potentials for
common use in the first and second stages.
Terminals 8 and 1 can be used to supplement
the internal phase compensation network if
additional phase compensation or frequency
roll-off is desired. Terminals 8 and 4 can also
be used to strobe the output stage into a low
quiescent current state. When Terminal 8 is
tied to the negative supply rail (Terminal 4)
by mechanical or electrical means, the output potential at Terminal 6 essentially rises
to the positive supply-rail potential at Terminal 7. This condition of essentially zero
current drain in the output stage under the
strobed "OFF" condition can only be achieved when the ohmic load resistance presented to the amplifier is very high (e.g.,
when the amplifier output is used to drive
COS/MaS digital circuits in comparator
applications) .
Input Stages - The circuit of the CA316U is
shown in Fig.l. It consists of a differentialinput stage using PMOS field·effect transistors (06, 07) working into a mirror-pair
of bipolar transistors (09, 010) functioning
as load resistors together with resistors R3
through R6. The mirror-pair transistors also
function as a differential-to-single-ended converter to provide base drive to the secondstage bipolartransistor (all). Offset nulling,
when deSired, can be effected by connecting
a 100,000-ohm potentiometer across Terms.
1 and 5 and the potentiometer slider arm to
Term. 4. Cascade-connected PMOS transistors 02, 04, are the constant-current source
for the input stage. The biasing circuit for the
constant-current source is subsequently described. The small diodes D5 through D7
provide gate-oxide protection against highvoltage transients, e.g., including static electricity during handling for 06 and 07.
Second-Stage - Most of the voltage gain in
the CA3160 is provided by the second amplifier stage, consisting of bipolar transistor
all and its cascade-connected load resistance
provided by PMOS transistors 03 and 05.
The source of bias potentials for these PMOS
transistors is described later. Miller Effect
compensation (roll off) is accomplished by
means of the 30-pF capacitor and 2-kH
resistor connected between the base and
collector of transistor all. These internal
components provide sufficient compensation
for unity gain operation in most applications.
However, additional compensation, if desired,
may be used between Terminals 1 and 8.
Bias-Source Circuit - At total supply voltages, somewhat above 8.3 volts, resistor R2
and zener diode Zl serve to establish a voltage of 8.3 volts across the series-connected

___________________________________________________________________ 245

CA3160, CA3160A, CA3160B Types
r---------------------.., v+
I
I
I
I
I
I

200 ~A

I

10

102

103

*

92CS- 28573

FigA - Open.Joop voltage gain and phase shift
VB. frequency for various values of CL
and RL.

Fig. 3 - Block diagram of the CA3160 Series.

-50

0

,

so

AMBIENT TEMPERATURE CTA'-

Fig.5 - Open-loop gain

~

6

8

temperature.

VS.

~

12

"

I '00

oc

14

~

I~

GATE VOLTAGE (VG I [TERMS 4

17.5

a

20

16

0.001

Z

4'1
24"
0.01
0.1

2

48'

I

2

,

22.

8J-V

"II'
10

•

Fig.7 - Quiescent supply current vs. supply voltage.

48.

'00

0001

2

MAGNITUDE OF LQADCURR£NT tILI-mA

Fig.S - Quiescent supply current VB. wpp/y voltage

at several temperatures.

Fig.9 - Voltage across PMOS output transistor
(081 vs. load current.

.. , .

0.01

24'1

0.1

.. 68'0 Z

2

.. , .

2

I

.. ' .

10

2

.. "

100

MAGNITUDE OF LOAD CURRENT fILI- mA

Fig. 10 - Voltage across NMOS output transistor
(0121 vs. load current.

(TA)·~·C

I
2

,

TOTAL SUPPLY VOLTAGE (V+)-V

Fig.6 - Voltage transfer characteristics of
COS/MOS output stage.

TOTAL SUPPLY VOLTAGE 1'1+1-'1

1000& AMBIENT TEMPERATURE

6

.,!5

TOTAL SUPPLY VOLTAGE (FOR INDICATED VOLTAGE GAINS)
v
WITH INPUT TERMINALS BIASED SO THAT TERM.6 POTENTIAL
IS +7.~ V ABOVE TERM. 4.
"WITH OUTPUT T.ERMINAL DRIVEN TO EITHER SUPPLY RAIL.

-100

I'

104

FREQUENCY (f}-Hz

OFFSET
NULL

468,022

468,032

FREQUENCY (f)-Hz

"68'0" 2

.. 68'05

92(5-24157,

Fig. I I - Equivalent noise voltage 1fS. frequency.

-80 -60
INPUT CURRENT I.:IT)- pol

Fig. 12 - Input current vs. common-mode voltage.

-40

-20

1/

0

20

40

60

80

100

120

140

A.MBIENT TEMPERATURE (TAI-·C

Fig. 13 - Input current vs. ambient temperature.

_______________________________________________________________ 247

CA3160, CA3160A, CA3160B Types
This characteristic is due to the fact that
reactance of the input capacitance becomes a
significant factor in shunting the source
resistance. It should be noted, however, that
for values of source resistance very much
greater than 1 megohm, the total noise
voltage generated can be dominated by the
thermal noise contributions of both the
feedback and source resistors.

TYPICAL APPLICATIONS
Voltage Followers
Operational amplifiers with very high input
resistances. like the CA3160, are particularly
suited to service as voltage followers. Fig.17
shows the circuit of a classical voltage
follower, together with pertinent waveforms
using the CA3160 in a split·supply configuration.
A voltage follower. operated from a single·
supply, is shown in Fig.18 together with
related waveforms. This follower circuit is
linear over a wide dynamic range, as illustrated by the reproduction of the output
waveform in Fig.18b with input-signal ramping. The waveforms in Fig.18c show that
the follower does not lose its input-tooutput phase-sense, even though the input is
being swung 7.5 volts below ground potential. This unique characteristic is an important
attribute in both operational amplifier and
comparator applications. Fig.18c also shows
the manner in which the COS/MaS output
stage permits the output signal to swing down
to the negative supply·rail potential (i.e.,
ground in the case shown). The digital-toanalog converter (DAC) circuit. described in
the following section, illustrates the practical
use 01' the CA3160 in a single·supply voltagefollower application.

+7,' V

BW(-3dBl=200 11Hz
TOTAL NOISE VOLTAGE (REFERRED
TO INPUTl-40I'V TYP,

Ikn

92:CS-Z8!177

Fig. 16 - Test-circuit amplifier (3o-dB gain) used
for wideband noise measurements.

+7e v

JOkn

I
I
I

,

-7.SY

1.
i?M~ATED
-=-

LOAD
CAPACITANCE

BW (-3 dBI: 4 MHz

SR; 10 VII's
O.lp.F
92CS-28578

9-Bit COS/MOS DAC
A typical circuit of a 9-bit Digital-to-Analog
Converter (DAC)* is shown in Fig.19. This
system combines the concepts of multipleswitch COS/MaS IC's. a low-cost ladder
network of discrete metal·oxide-film resistors, a CA3160 op amp connected as a
follower, and an inexpensive monolithic regulator in a simple single power-supply arrangement. An additional feature of the DAC is
that it is readily interfaced with COS/MaS
input logic, e.g., 10-volt logic levels are used
in the circuit of Fig.19.
The circuit uses an RI2R voltage-ladder network, with the output-potential obtained
directly by terminating the ladder arms at
either the positive or the negative powersupply terminal. Each CD4007A contains
three "inverters", each Uinverter" function~
ing as a single-pole double-throw switch to
terminate an arm of the R/2R network at
either the positive or negative power-supply
terminal. The resistor ladder is an assembly
of one per cent tolerance metal-oxide film
resistors. The five arms requiring the highest
accuracy are assembled with series and parallel combinations of 806,OOO-ohm resistors
from the same manufacturing lot.
A single 15-volt supply provides a positive
bus for the CA3160 follower amplifier and
feeds the CA3085 voltage regulator. A
"scale-adjust" function is provided by the
regulator output control, set to a nominal
10-volt level in this system. The line-voltage
regulation (approximately 0.2%) permits a
9-bit accuracy to be maintained with variations of several volts in the supply. The
flexibility afforded by the COS/MaS building
blocks simplifies the design of DAC systems
tailored to particular needs.
Error-Amplifier in Regulated Power Supplies
The CA3160 is an ideal choice for erroramplifier service in regulated power supplies
since it can function as an error-amplifier
when the regulated output voltage is required to approach zero.

(a)

The circuit shown in Fig.20 uses a CA3160
as an error amplifier in a continuously adjustable I-ampere power supply. One of the
key features of this circuit is its ability to
regulate down to the vicinity of zero volts
with only one de power supply input.

An RC network, connected between the base
of the output drive transistor and the input
voltage, prevents "turn-on overshoot", a
condition typical of many operativ.,al-amplifier regulator circuits. As the amplifier becomes operational, this RC network ceases
to have any influence on the regulator performance.
(b) Small Signal Response

Top Trace: Output
Bottom Trace: Input

Ie) Input-Output Difference Signal Showing

Settling Time
Top Trace: Output Signal
Center Trace: Odference Signal 5 m VIdiv
Bottom Trace: Input Signal

Fig. t 7 - Split-supplV voltage follower with associated waveforms.

* "Digital·to~Analog

Conversion Using the RCA·

CD4007 A COS/MaS I Cu. Appl ieation Note
ICAN-6080.

______________________________________________________________ 249

CA3160, CA3160A, CA3160B Types
INPUT

...V
OUTPUT

ov .. :ssv

AT I AMPERE

0.2,,'
2.41Ul

.W

T'I1/'

DELAY

.3OA
.56pF

.OA
HUM AND NOtSEOUTPUTc2!50"V .... S:
REGULATION (NO LOAD TO FULL LOAD'
< O.OO!i .. :
INPUT REGULATION c 0·01 "IV

500A

SZk4

100K4

Fig.20 - Voltage regulator circuit (0.1 to 35 Vat 1 A).

Precision Voltage-Controlled Oscillator
The circuit diagram of a precision voltagecontrolled oscillator is shown 'in Fig.21. The
oscillator operates with a tracking error in the
order of 0.02 percent and a temperature coefficient of O.Ol%/oC.
A multivibrator
(A1) generates pulses of constant amplitude
(V) and width (T2l.
Since the output
(terminal 6) of Al (a CA3130) can swing
within about 10 millivolts of either supplyrail, the output pulse amplitude (V) is
essentially equal to V+. The average output
volt~ge (E,avg ,= V T2/T1) is applied to the
non-onvertong onput term.nal of comparator
A2 via an integrating network R3, C2.
Comparator A2 operates to establish circuit
conditions such that Eavg = V1. This circuit

condition is accomplished by feeding an out·
put signal from terminal 6 of A2 through R4,
D4 to the inverting terminal (terminal 2)
of A1, thereby adjusting the multi vibrator
interval, T3.

signal, the circuit consumes somewhat less
than 500 microamperes plus the meter current required to indicate a given voltage.
Thus, at full·scale input, the total supply
current rises to slightly more than 1500
microamperes.

Voltmeter With High Input Resistance
The voltmeter circuit shown in Fig.22 illustrates an application in which a number
of the CA3160 characteristics are exploited.
Range-switch SW1 is ganged between input
and output circuitry to permit selection of
the proper output voltage for feedback to
Terminal 2 via 10 Kn current·limiting resistor. The circuit is powered by a single
8.4-volt mercury battery. With zero input

Function Generator
A function ,generator having a wide tuning
range is shown in Fig.23. The adjustment
range, in excess of 1,000,000/1, is accomplished by a single potentiometer. Three
operational amplifiers are utilized: a CA3160
as a voltage follower, a CA3080 as a high·
speed comparator, and a second CA3080A
as a programmable current source. Three
variable capacitors C1, C2, and C3 shape
the triangu lar signal between 500 kH z and
1 MHz. Capacitors C4, C5, and the trimmer
po~entiometer in series with C5 maintain
essentially constant (±10%) amplitude up
to 1 MHz.

vea CONTROL VOLTAGE (Vi)
(O-IOV)
(SENSITIVITY= IkHz/VOLTi
'OK

.M

R'

'OOK

•6
1001(

03

o.

182K
01 - 05 = IN914

F;g.21 -

__

~

Voltage~contro/Jed

31<

oscillator.

Staircase Generator
Fig.24 shows a staircase generator circuit
utilizing three COS/MOS operational amplifiers. Two CA3130's are used; one as a
multivibrator, the other as a hysteresis switch .
The third amplifier, a CA3160, is used as a
linear staircase generator.
Picoammeter Circuit
Fig. 25 is a current·to-voltage converter can·
figuration utilizing a CA3160 and CA3140
to provide a picoampere meter for ±3 pA fullscale meter deflection. By placing Terminals
2 and 4 of the CA3160 at ground potential,

____________________________________________________________ 251

CA3160, CA3160A, CA3160B Types
$.IKO

1"914

output (Terminal 6) near ground, thus markedly reducing the dissipation by reducing
the supply current to the device.
The CA3140 stage serves as a Xl00 gain
stage to provide the required plus and minus
output swing for the meter and feedback
network. A 100-to-l voltage divider network
consisting of a 9.9-Kn resistor in series with
a 100-ohm resistor sets the voltage at the
10-KMn resistor (in series with Terminal 3) to
±30 mV full-scale deflection. This 30-mV
signal results from ±3 volts appearing at the
top of the voltage divider network which
also drives the meter circuitry_

+ I!!tV
100

."

100

."

IIIIULTIVIIRATOR RETRACE INHIIIT

DlKA
+lDmVTO+IOV

IOOKA

(a)

Single-Supply Sample-and-Hold System
Fig. 26 shows a single-supply sample-and-hold
system using a CA3160 to provide a high
input impedance and an input-voltage range
of 0 to 10 volts. The output from the input
buffer integrator network is coupled to a
CA30BOA. The CA30BOA functions as a
strobeable current source for the CA3140
output integrator and storage capacitor. The
CA3140 was chosen because of its low output impedance and constant gain-bandwidth
product. Pulse "droop" during the hold
interval can be reduced to zero by adj usting
the l00-Kn bias-voltage potentiometer on
the positive input of the CA30BOA. This
zero adjustment sets the CA30BOA output
voltage at its zero current position. In this
sample-and-hold circuit it is essential that the
amplifier bias current be reduced to zero to
minimize output signal current during the
hold mode. Even with 320 mV at the amplifier bias circuit terminal (5) at least ± 100 pA
of output current will be available.

9ZCSM28596

(b) - Staircase Generator Waveform
Top Trace: Staircase Output

2 Volt Steps
Center Trace: Comparator
Bottom Trace: Osciflator

Fig. 24 - Staircase generator.

Wien Bridge Oscillator
A simple, single-supply Wien Bridge oscillator using a CA3160 is shown in Fig_ 27_
A pair of parallel-connected 1 N914 diodes
comprise the gain-setting network which
standardizes the output voltage at approximately 1.1 volts_ The 500-ohm potentiometer
is adjusted so that the oscillator will always
start and the oscillation will be maintained.
Increasing the amplitude of the voltage 'may
lower the threshold level for starting and for
sustaining the oscillation, but will introduce
more distortion.

5.61U1

lOOn

92CN·Z8589RI

Fig.25 - Curren t-to-voltage converter to pro vide a picoammeter
with ± 3 pA full·scale deflection.

By utilizing a switching technique in the
meter circuit and in the 9.9 Kn and 100-ohm
network similar to that used in voltmeter
circuit shown in Fig. 22, a current range of
3 pA to 1 nA full scale can be handled with
the single 10- KMn resistor.

Operation with Output-Stage Power-Booster
The current sourcing and sinking capability
of the CA3I60 output stage is easily supplemented to provide power-boost capabi lity.
In the circuit of Fig.2B, three COS/MaS
transistor-pairs in a single CA3600 IC array
are shown parallel-connected with the output
stage in the CA3160. In the Class A mode of
CA3600E shown, a typical device consumes

________________________________________________________________ 253

CA3160, CA3160A, CA3160B Types

IN~II---J\Mr1-<
I

1

~F

500

.on

100 mW

-=' AT IO-t.THD·

A-20 dB
LARGE SIGNAL
8W(-3dS-I90 KHz

20 KG
·SEE FILE NO. 619

NOTE:
TRANSISTORS pi, p2, p3 AND nl,n2, n3 ARE
PARALLEL. - CONNECTED WITH 08 AND 012,

RESPECTIVELY, OF THE CA3160

92CN-28592

Fig.28 - COS/MOS transistor arrBY (CA3600E) connected as power
booster in the output stage of the CA3160.

55-63
(1.397-1$001

J

I

66-74
11157-1.8791

Dimensions in parentheses are in millimeters and
are derived from the basic inch

dimens~ns

as

indicated. Grid graduations are in mils (10- inch).

.~-J

The photograph and dimensions represent a chip
when it is part of the wafer. When the wafer is cut
into chips the cleavage angles are 57'1 instead of
9t1' with respect to the face of the chip. Therefore,
the isolated chip is actually 7 mils (0.17 mm)
larger in both dimensions.

___________________________________________________________________ 255

CA3181E
TRUTH TABLE
BINARY
STATE

INPUTS

OUTPUTS

DISPLAY

~

22

21

2!l

a

b

c

d

e

0

L

L

L

L

L

L

L

L

L

L

H

1

L

L

L

H

H

L

L

H

H

H

H

2

L

L

H

L

L

L

H

L

L

H

L

3

L

L

H

H

L

L

L

L

H

H

L

4

L

H

L

L

H

L

L

H

H

L

L

5

L

H

L

H

L

H

L

L

H

L

L

6

L

H

H

L

L

H

L

L

L

L

L

7

L

H

H

H

L

L

L

H

H

H

H

8

H

L

L

L

L

L

L

L

L

L

L

9

H

L

L

H

L

L

L

L

H

L

L

10

H

L

H

L

H

H

H

H

H

H

L

11

H

L

H

H

L

H

H

L

L

L

L

12

H

H

L

L

H

L

L

H

L

L

L

13

H

H

L

H

H

H

H

L

L

L

H

14

H

H

H

L

L

L

H

H

L

L

L

15

H

H

H

H

H

H

H

H

H

H

H

.

f

g

0
I

2
3
Y
5

6
1
B
'3
-

E
H
L
P
BLANK

__________________________________________________________________

~7

CA3162E
MAXIMUM RATINGS, Absolute-Maximum Values:
DC SUPPLY VOLTAGE (between terminals 7 and 141_
INPUT VOLTAGE (terminall00r 11 to ground I
DEVICE DISSIPATJDN:
Up to T A - +55:: _
AboveT A =+55 C .
AMBIENT TEMPERATURE RANGE:

. +7 V
±15V
.

.

.

..

750mW

derate linearly at 7.9 mW/oC

Operating.

. 0 to +75°C
-65 to +150o C

Storage
LEAD TEMPERATURE (DURING SOLD,ERINGl:
At distance 1/16 ± 1/32 inch (1.59 ± 0/79 mml from case for 10 seconds max.
v+

+265°C

BCD OUTPUTS

I

L -___

: }OIGIT SELECT
@-MSD
(V-LSD

-'"--t.....

OUTP~

G)-NSD
HIGH INPUT II

CONVERSION
6

CONTROL

7 GND

if-

MSO-MOST SIGNIFICANT DIGIT
NSO" NEXT SIGNIFICANT DIGIT

92CM-30414RI

LSD" LEAST SIGNIFICANT DIGIT
GAIN
ADJ

that the multiplex rate is unchanged_ Fig. 3
shows the timing of conversion and digit
select pulses for the high-speed mode. Note
that the basic AID conversion process requires
approximately 5 ms in both modes_
The "EEE" or " ___ " displays indicate that
the range of the system has been exceeded in
the positive or negative direction, respectively. Negative voltages to -99 mV are displayed with the minus sign in the MSD. The
BCD code is 1010 for a negative overrange
(___ ) and 1011 for a positive overrange
(EEE).

System Application
Fig. 2 is the block diagram of a basic system
using the CA3162E and the CA3161E_ An
actual-size PC board layout for this circuit
is shown in Fig. 4. The BCD outputs of the
CA3162E drive the BCD inputs of the
CA3161E BCD-to-7-segment decoder directly.
The seven-segment outputs are multiplexed
to the three LED displays. The digits are
selected by terminals 3, 4, and 5 (CA3162EJ.
which provide base current to the external
p-n-p transistors_ The p-n-p's, in turn, provide
current to the anodes of the display. Adjustment procedures for the gain and zero
potentiometers are given in Note 1 of the
Electrical Characteristics chart_

Fig. 1 - Functional block diagram of the CA3162E.
<.v

...

TE ...
12

.........

r ---.

O!LSD

41110DJ

NORMAL

LOW-SPEED ..-ODE:

"'6

-

-

zoo"'"

_J

L_ ---I

.....

''lfROtJ=~N

J

HOLD:

IlOO mY

11-'OOOmY

!:Il,Il00"'''

V6" 12 II

2 ml/DIVISlON
,2CS-I0411ft1

Fig. 3 - High speed mode timing diagram •

.,

I>on

CA3162E

TERMINALS

TERMINALS

150n

••"'>1'

92CL.- 30418RI

~ ~
"4'~Kn

*-FAIRCHILD FNO'070R EQUIVALENT

CA3162E

. •2

DIGIT

=ORIVF:R

1'2"5,16.CD
SEGMENT
DRIVERS

Fig. 2 - Basic digital readout system using the CA3162E and
the CA3161E_

_____________________________________________________________________ 259

CA3182E
+5.

,.

CA3162E Liquid Crystal Display (LCDI
Application
Fig. 6 shows the CA3l62E in a typical LCD
application. LCD's may be used in favor of
LED displays in applications requiring lower
power dissipation, such as battery·operated
equipment, or when visibility in high·ambient·
light conditions is desired.
Multiplexing of LCD digits is not practical,
since LCD's must be driven by an ac signal
and the average voltage across each segment is
zero. Three CD4056B liquid·crystal decoder/
drivers are therefore used. Each CD4056B
contains an input latch so that the BCD data
for each digit may be latched into the decoder
using the inverted digit·select outputs of the
CA3l62E as strobes.
Inverters Gl and G2 are used as an astable
multivibrator to provide the ac drive to the
LCD backplane. Inverters G3, G4, and G5 are
the digit·select inverters and require pull·up
resistors to interface the open·collector out·
puts of the CA3l62E to COS/MOS logic.
The BCD outputs of the CA3l62E may be
connected directly to the corresponding
CD4056B inputs (using pull·up resistorsl. In
this arrangement, the CD4056B decodes the
negative sign (-I as an "L" and the positive
overload indicator (EI as an "H".
CA3162E Common·Cathode, LED Display
Application
Fig. 7 shows the CA3162E connected to a
CD45ll B decoder/driver to operate a com·
mon·cathode LED display.
Unlike the
CA3l6l E, the CD45ll B remains blank for
all BCD codes greater than nine. After
999 mV the display blanks rather than dis·
playing EEE, as with the CA3l61E. When
displaying negative voltage, the first digit reo
mains blank instead of (-I. and during a
negative overrange the display blanks.
The additional logic shown within the dotted
area of Fig. 7 restores the negative sign (-I,
allowing the display of negative numbers as
low as -99 mV. Negative overrange is indio
cated by a negative sign (-I in the MSD
position. The rest of the display is blanked.
During a positive overrange, only segment b of
the MSD is displayed.

.ov

1
m-

·CD409.
2

OF LCD

}m_

:CD~6B

,.
4

OF LCD

+ ••

OF LCD

GI-G6·C004049ua

HEX INVERTER
•

G7- G8: C040llUB
QUAD 2-INPUT NAND

t

mo"

CD40~B

•

1

TO LCD
BACKPLANE

92CL- 31016

Fig. 6 - Typical LCD application.

- - - - - - -------,
,----I
110-

I/8CD404tUI

I
I

L_

CD+OIU

I
I

I
I
I
~

v·

HP5082-M3I
OR EQUIVALENT

I.IKA

, '"

1.21CA

. ..

!.IKA

111111
I

II

IU

Fig. 7 - Typical common-cathode LED application.

___________________________________________________________________ 261

CA3164E
ELECTRICAL CHARACTERISTICS at T A = 25°C, V+ = 9 V
CHARACTERISTIC

LIMITS
UNITS
Min. Typ.
Max.
7
9
11
V

TEST CONDITIONS

Operating Voltage
Common·Mode Input
Voltage Range, VICR
Low·Battery Trigger
Voltage
Horn Driver
VCE(SAT)
Reference Voltage
Input Leakage
Current, IL

(V+ -2 V) = 7 V

0

External adjust
(increase onlv)
Term. 8 = 100 mA
Term. 8 - 300 mA

7.7

7.9

V

-

-

V

6.2

6.6
1
2.5
50
12

V

ISink = 10 IlA typo

Sink

ISource = 1.3 mA typo

Low·Battery Adjust, Term.5
Input Current
Timing Current
LED Blink Period
LED Pulse Width
Remote Fan·Out

Term. 13
Adjustable
Fixed

-

-

-

-

8*
18

-

pA

IlA

13

5
40

-

-

2.8

-

JJ.A
mA

50

-

IlA

50

70

100

nA

10

30
-

50
1

nA
PPM
ms

20

-

On·time
On·time = 95%
Off·time - 5%

Alarm Pulse Duty Cycle
(4.7 MO from Term. II
to gnd

V

0.5
1

5.8

Reference Source Current
LED Driver Sink Current
Interconnect Current
Source

7

7.3

Term. 2
Term. 2 at 50 C
Term. 3
No LED connected
LED connected-20 mA
for 30 ms every 60s
Photoelectric operation LE 0 photocurrent = 0.6 A
15 sec. ratel

Standby Current (13 MO
from Term. 4 to gnd)

-

-

50

95
0.5
0.026

-

-

mA

Normal
Low Battery
Smoke In Chamber

No
No
Ves

No
Ves

External Input A1
From Remote Unit

No

No

X

Alarm
Horn
8

Alarm
Enable
Pulser
11

Blink Off
X
Blink Beep
X
On
Pulsed* Resistor
to ground
Blink On"

High

Remote
Systam
Unit
Interconnect
Status
12
Low
Off
Low
Off
High
On

IkG

TO OTHER
DETECTORS

92CS-31023

:LTAGE AT TERMS

470kil

ov
20mA

~
ILED

On

X

:x>----+ TO MECH. HORN
92CS-31024

every 50 sec (AOJ)

Pulsed = 95% "on" time - Period is determined by resistor from terminal 11 to ground-5% Off Time

* Horn "Continuous"

2. Sounder Operating Mode
Continuous sound on alarm - connect
terminal 11 to V+.
Pulsed sound on alarm - connect resistor
between terminal and ground.
3. Remote (Interconnect)
Connect terminal 12 to same terminal on
all other units (fan out = 20 units). When
interconnecting units for the remote·alarm
function, ,the extremely low currents in·
valved make it extremely important that
a provision be made for limiting externally
induced transients into the remote termi·
al. For example, inadvertent contact with
external power sources or electrical storm
activity may cause triggering of the remote
alarm function. The circuit below will reduce the possibility of such occurences.

j I--'m.
High

•• Alarm Horn follows mode programmed for internal system input. For ekample, if terminal 11 has
resistor connected to ground, horn will beep. If terminal 11 is connected to V+. horn will be "on."

= Don't Care
Blink & Beep = 30 msec (fixed)

~

4. LED On·Time Adjustment
Option 1: The CA3164E is designed to
provide a fixed LED on-time of approximately 30 ms. For applications requiring
a reduction in on·time the following cir·
cuit is recommended:

OPERATING MODES TRUTH TABLE
Condition

v+~

%
sec.

• Adj ustable to 5 /loA

Smoke
Low
Led
Ionization Battery 6
Chamber

Connections for Optional Functions
1. Low Battery Adjustment - Terminal 5
Add diodes as shown below to increase the
the low·battery trigger point.

if terminal 11 is connected to V+

This circuit reduces the LED on-time but
does not affect the horn on·time of 30 ms.
When using this configuration during the
continuous·alarm mode (smoke in cham·
ber! the LED will be off instead of on, as
shown in the truth table. If the horn is
pulsed during the alarm mode, the LED
will blink at the pulse rate.

___________________________________________________________________ 263

CA3240, CA3240A Type.

Dual SiMOS Operational Amplifiers

TOP VIEW

With MOS/FET Input. Bipolar Output
The RCA-CA3240A and CA3240 are dual
versions of the popular CA3140-series integrated circuit operational amplifiers. They
combine the advantages of MOS and bipolar
transistors on the same monolithic chip. The
gate-protected MOS/FET {PMOSI input transistors provide high input impedance and a
wide common-mode input voltage range
(typically to 0.5 V below the negative supply
rail)_ The bipolar output transistors allow a
wide 0.!Jtput voltage swing and provide a high
output current capability.
The CA3240A and CA3240 are supplied in
the 8-lead dual-in-line plastic package (MiniDIP, E suffix). and in the 14·lead dual-in-line
plastic package {El suffixl. They are pincompatible with the industry standard 747
and 1458 operational amplifiers in similar
packages. The CA3240A and CA3240 have
an operating-temperature range of -40 to
+850 C_ The offset null feature is available
only when these types are supplied in the
14-lead dual-in-line plastic package (El suffixl.

Features:
Ii Dual version of CA3140
- Internally compensated
- MOS/FET input stage
{al Very high input impedance (ZIN'- 1.5 Tn typ_
{bl Very low input current {l1'- 10 pA typo at ± 15 V
(c) Wide common-mode input-voltage range {VICR'can be swung 0.5 volt below negative supplyvoltage rail
{dl Rugged input stage - bipolar diode protected
- Directly replaces industry types 747 and 1458 in
most applications
- Operation from 4-to-36 volts
single or dual supplies
- Characterized for ± 15-volt operation and for
TTL supply systems with operation down to 4
volts
- Wide bandwidth - 4.5 MHz unity gain at
± 15 Vor30V
- High voltage-follower slew rate - 9 V IlJs
- Output swings to within 0.5 volt of
negative supply at V+ a 5 V, V- .. 0

N,[tSfe"1

!I

I=T~':.\/) e. >-"T"--"""

IN~~~(81

7

..

*'PINS 9 AND 15 INTERNALLY
CONNECTED THROUGH APPAOX

El Suffix
Pin compatible with the
industry-standard 747

9tCS-30011

E Suffix
Pin compatible with the
industry-standard 1458
Fig. 7 - Functional diagram•.

Applications:
- Ground-referenced single-supply amplifiers
in automobile and portable instrumentation
- Sample and hold amplifiers
- Long-duration timers/multivibrators
{microseconds-min utes-hours)
- Photocurrent instrumentation
- Active filters - Intrusion alarm systems
- Comperators - Instrumentation amplifiers
- Function generators - Power supplies

OFFSET NULL
ALL RESISTANCE \aLUES ARE IN OHMS.

• ONLY AVAILABLE WITH 14-LEAD DIP (£1 SUFFI)( I

Fig. 2 - SchllfTNlticodiagrBm of one"'a/f CA3240 _ie••

y92CL-:SOO'4

Circuit Description
The schematic diagram of one amplifier
section of the CA3240 is shown in Fig. 2. It
consists of a differential amplifier stage using
PMOS transistors Q9 and 010 w"ith gate-to~ource protection against static discharge
damage provided by zener diodes 03, 04,
and 05. Constant current bias is applied to
the differential amplifier from transistors 02
and 05 connected as a constant-current
source. This assures a high common-mode
rejection ratio. The output of the differential
amplifier is coupled to the base of gain stage
transistor 013 by means of an n-p-n current
mirror that supplies the required differentialto-single-ended conversion. Provision for offset null for types in the 14-lead plastic
package {E! suffixl is provided through the
use of this current mirror_

______________________________________________________________

2~

CA3240, CA3240A Type.
TYPICAL ELECTRICAL CHARACTERISTICS

20

LOAD RESISTANCE {RL'- 2 110

LOAD

TEST
CONDITIONS
V+ = +15 V
V-= -15 V
TA = 25°C

CHARA'CTERISTIC

CA3240A CA3240

Typ. Value of
Resistor Between
Terms. 4 and
3(5) or Between
4 and 14(8) to
Adjust Max.

Input Offset Voltage
Adjustment Resistor
(El Package Only)

(ell

=

100 pF

18

UNITS

4.7

kn
II

15

20
92CS-30018

Input Resistance

Rl

1.5

1.5

Tn

Input Capacitance

CI

4

4

pF

Output Resistance

RO

60

60

n

Equivalent Wideband
Input Noise Voltage
(See Fig. 21 )

en

BW=140 kHz
RS = 1 Mn

48

48

Il V

Equivalent Input
Noise Voltage
(See Fig. 10)

en

f= 1 kHz

40

40

12

12

40

40

11

11

RS=

10

SUPPLY VOLTAGE IY·, V")- VOLTS

VIO

Fig. 5 - Gain-bandwidth product lIS a function
of supply voltage Bnd temperature.

nV/v'"Hz
f=10kHz lOOn

Short·Circuit Current to
Opposite Supply Source 10M +
Sink

CAPACIT~~CE

TYPICAL VALUES

IOM-

,

mA

,

SUPPLY V

,120

SUPPLY VOlTAGE, Y+-16 Y, Y-·-15 V

I

f\

~

~20

i

IM>O
~'~~-+~r--~++B-'~H-~-+t+~++B-~~

\

I.

I"

\

..

,

0

z

,

!60

1\

~~ •
~

::l~T~J~,YU+Re!!!W.)~-;I5';'8V

I

l~

10 K

,

'OOK

FREQUENCY

~ 4O~-+Ht~++B-H-f'Icl-+t++++B-~~

!\.

. . , I............,

(f)-H~

1
20

••

L-~O~,o~~~~~~~,~~-L~,,~.~~~~~~~,,~.~~,~
FREQUENCY {f I - Hz:

10

lot

10'

FREQUENCY (f) -

,0'

,0'

Hz
92CS-30020

Fig. 8 - MaX1"mum output voltage swing
as

a function of frequency.

Fig. 9 -

Common~mode

as a

rejection ratio

function of frequency.

Fig. 10 - Equivalent input noise voltage
as a function of frequency.

__________________________________________________________________ 267

CA3240, CA3240A Type.
TYPICAL ELECTRICAL CHARACTERISTICS FOR DESIGN GUIDANCE
AtV+=5V, V-=OV, TA=250 C
TYPICAL VALUES
CA3240A
CA3240

CHARACTERISTIC
IVlol

2

5

mV

Input Offset Current,

11101

0.1

0.1

pA

Input Current,

II

2

2

pA

1

1

Tn

lOOk

100

100 k
100

V/V
dB

32
90

32
90

pV/V
dB

-0.5

-0.5

2.6

2.6

31.6
90

31.6
90

Input Resistance
Large-Signal Voltage Gain,
(See Figs. 4,19)

AOL

Common-Mode Rejection Ratio, CMRR
Common-Mode Input-Voltage
Range,
(See Fig. 22)

Power-Supply Rejection Ratio, PSRR

(See Figs. 16,22)
Maximum Output Current:
Source,
Sink

+

3

3

VOM-

0.3

0.3

IOM+

20

20

VOM

"---

j-

~~T..

ui VOLTAGE
i-i-;
:INPUl

iz_

r~
~

,',';"""

,::wc

,·.~~~~~"U"E

-.~~

..

')""

I~

V

VICR

Maximum Output Voltage,

'i~

UNITS

Input Offset Voltage,

~

10M

Slew Rate (See Fig. 6)

dB

I~

. rnA

1

1
7

V/p.s

r.~

II
I~·

V

7

~~

II

pVN

5 SUPPLY VOLTAGE (V.... '

1_ V

Fig. 16 - Output-voltage-swing capability and

common-mode input-voltage range

Gain-Bandwidth Product,
(See Fig. 5)

fT

4.5

4.5

MHz

Supply Current,
(See Fig. 7)

1+

4

4

mA

Device Dissipation,

PD

20

20

mW

as a function of supply voltage and

temperature.

10 K: SUPPLY VOLTAGE: Y+"15 Y, V-.-I& V

y---.

YOLT~I
·.VI
~ENT TDI"'n. (T.J-U-C

alPPLY

"

I

.
!•
> I

.

! •

i>5-1/

~

~

-~

-I

-I

-"
0.1

I

~_""(""'.'"
...........
• .,.

,- 1----

.....

.

---~

~Y- ~:
'
,"

./ /

0

Y

/

_(~l

Joo-:

r's:f~
~'~
... , "\
-. t-'
~

-80

. . .. . . .
1\"\

ID
Cal SETTLING TIME -

-40 -20
0
ZO
40
10
eo 100 120 140
AaelENT TEMPERATURE (T.)--C 'UeS-2f",

Fig. 18 - Input current as a function of
ambient temperature.

'-

m

10

~

.roo

INVERTING

FOLLOWER

• kn

f
;

·.,.v,V-·-15

SUPPLY
VOLTAGE, V
V
AMBIENT TEMP£IU.TUltf ITAI- 2a-c

~

<%

rJ

~IO
~

.~~~

wu

t. ~~

~~~ I

S

..?

~.

~-.~~

\.

Lo

.,. ... .,.
"

1111 "'-

FREQUENCY (fl - Hz

a function of .ettling timB_

-

3

11Ir-~-'0..

10

Fig_ 17 - Input voltage H

I..

- lOCI

III I I
III

&2CS-300Z.

120

~~

~40

TES:r CIRCUITS

\.

::

-IOn
-""IIi
-

<...r.'~-A

1
RCA
C30B09

PHOTO
DIODE
TYPICAL ELECTROCARDIOGRAM WAVEFORM

92CM-30009

VERTICAL: I.DIIIVlOIII.
(AMPLIFIER GAIN .'OOX)
(SCOPE SENSITIVITY. a.IV/DIy.

HORIZONTAL: > 0.2 SECIDIY (UNCAL)

Fig. 32 - Differential light detector.

9tCS-lOOll

Fig. 31 - Typical electrocardiogram waveform.

CA3240H Dimensions and Pad Lavout

The photographs and dimensions represent a chip
when it is part of the wafer. When the wafer is cut
into chips; the cleavage angles are 5.,0 instead of
goo with respect to the face of the chip. Therefore,
the isolated chip is lICtually 7 mils (0.17 mm)

larger in both dimensions.

Dimensions in parentheses Bre in millimeters and
are derived from the basic inch dimensions as indicated. Grid graduations are in mils (70- 3 inchJ.

NOTE: NOS. IN PADS ARE FOA 14-lEAO DIP
NOS. OUTSIDE OF CHIP ARE FOR 8- LEAD DIP

________________________________________________________________ 273

CA3290, CA3290A, CA3290B
ELECTRICAL CHARACTERISTICS at TA = -55 to
CHARACTERISTIC

In put Offset
Voltage, V 10

TEST
CONDITIONS
V+
VIC=1.4 V 5V
VO=l.4 V
VIC-O V,
±15 V
VO=O V

Temp. Coefficient
of Input Offset
Voltage,L'. V lOlL'. T

+1250

C

VALUES
CA3290B CA3290A CA3290 UNITS
Typ. MaK. Typ. MaK. Typ. MaK.
3.5

-

4.5

-

8.5

3.5

-

8.5

-

8.5

8

-

8

-

8

-

/J.V;oC

mV

In put Offset
Current, 110

VIC=l.4V 5V
VIC=O V ±15 V

2
7

22
22

2
7

28
28

2
7

32
32

nA

Input Current, II"

VIC=l.4V 5V
VIC-O V ±15V

2.8
13

32
32

2.8
13

45
45

2.8
13

55
55

nA

Supply Current, 1+ "

RL = 00

Voltage Gain, AOL

RL=15kn ±15 V

Saturation
Voltage

Output Leakage
Current, 10L

V+=5 V,
4 mA,
+VI=O V,
-VI=l V

5V

0.85

1'.6

0.85

1 0.85

1.6

30V

1.62

3.5

1.62

3

1.62

3.5

150
103

-

150
103

-

150

-

103

-

+125 0 C 0.22
-55 0 C 0.1

15 V
36V

65
130

-

0.7
-

lk

0.22
0.1

0.7 0.22
- 0.1

65
130

lk

-

65
130

0.7

lk

mA
V/mV
dB
V

01 and 04 are operated with a constant current load, their gate-to-source voltage drops
will be effectively constant as long as the
input voltages are within the common-mode
range. As a result, the input offset voltage
(VGS(Ol) + VBE(02)-VBE(03)-VGS(04)l
will not be degraded when a large differential
de voltage is applied to the device for extended periods of time at high temperatures.
Additional voltage gain following the first
stage is provided by transistors 07 and oa.
The collector of oa is open, offering the user
a wide variety of options in applications. An
additional discrete transistor can be added if
it becomes necessary to boost the output
sink-current capability.
The detailed schematic diagram for one comparator and the common current-source
biasi ng is shown in Fig. 2. PMOS transistors
Q9 through 012 are the current-source
elements identified in Fig. 1 as 11 through 14,
respectively. Their gate-source potentials
(VGS) are supplied by a common bus from
the biasing circuit shown in the right-hand
portion of the Fig. 2. The currents supplied
by 010 and 012 are twice those supplied by
Q9 and all. The transistor geometries are
appropriately scaled to provide the requisite
currents with common VGS applied to Q9
through 012.

nA

"At T A = +12So C
"At TA = -55°C

I
I i&.PARATOR
NO.2

TOTAl.. SUPPLY VOl.TAGE

I -

v

Fig. 3 - SUpply current as a function
of supply voltage (both amplifiers).

-VIo--'-I--+--+---k~

Fig. 2 - Schemetic diagrem of CA3290
(only one is shown).

In essence, 01 and 04 function as source·
followers to drive 02 and 03, respectively,
with zener diodes 01 through D4 providing
gateO()Kide protection against input voltage

transients (e.g., static electricity). The cur·
rent flow in 01 and 02 is established at
approKimately 50 microamperes' by constantcurrent sources 11 and 13, respectively. Since

INPUT COMMON-MOOE VOLTAGE (VIC)-V

Fig. 4 - Input cu"ent /18 B function
of Input common-mode voltage_

___________________________________________________________________ 275

CA3290, CA3290A, CA3290B

CHARACTERISTIC

TEST
CONDo
V+

Input OffSet Voltage,
VIC=l.4 V
VIO
VO=l.4 V
VIC=O V
VO=O V
Input

Curr~nt,

II
VIC=l.4 V
VIC=O V

Input Offset Current, 110
VIC=1.4 V
VIC-O V

t

LIMITS
CA3290
Min.

Typ.

UNITS
Max.

Vo=OV
Supply Current, 1+
RL = 00
Voltage Gain, AOL
RL=lSk!1
Output Sink Current
VO=1.4 V
Saturation Voltage
+VI=O V,
-VI=l V,
4mA
Output Leakage Current,
Response Time
RL=5.1 k!1 Rising Edge
Falling Edge
Common-Mode Rejection
Ratio, CMRR
Power·Supply Rejection
Ratio, PSRR

~l ~i

j'

:l

~

I

If

'v

·
;'OOrrN
..·
·q:~-~!
·
~

l

/.

~

SV

-

7.S

20
mV

±lS V

-

7.S

~
S
5

IOmY

'-

+125-C

i!

,mY

2

-

3.S

50

-

12

50

SV
±lS V

-

2

30

7

30

V+-3.5
V-

V+-3.1
V--1.5

-

V+-3.8
V-

V+-3.4
V--1.6

-

30 V

-

1.35

3

SV

-

0.8

1.4

~

~

20

SV
±lS V

•• 1

pA

I

.. I '

I

....

IOOfl>~TPUT SI~m~URRENT_~~m.

10fl-A

92CS-~

Fig. 9 - Output saturation vo/rage as B
function of output sink cu"ent.

pA

V'N C>-'-;'.i\'2tv-'-I

5V
±15 V

10 XIO SCOPE

PROBE

V

Ok

mA

25

BOO

-

V/mV

88

118

-

dB

5V

6

30

-

mA

SV

-

0.12

0.4

V

15 V

-

100

-

500

-

±15 V

WITH Cc

36 V

IOL

~
~

Common-Mode InputVoltage Range, VICR
VO=l.4 V

···

,ov

ELECTRICAL CHARACTERISTICS AT TA = 2SoC

SV

-

±lS V

-

15 V
±15 V

TOP TRACE IIJ4.5mVlDIY-YlN

BOTTOM TRACE -IOVlDIV· \louT
H ·5,..,/DIV

pA

1.2

-

IlS

200

-

ns

44

562

100

562

lS

316

IlV /V
IlV /V

WITHOUT Cc
TOP TRACE .. 4.5mVlOIV

Large-Signal Response
Time
RL=S.l k!1

15 V

-

SOO

5V

-

400

-

BOTTOM TRACE· JOVlDIY
H -S,../DIV

ns

92CM-30059

Fig. 10 -

Paras;t;c~scillations

test circuit

and B8Sociated waveforms.

_____________________________________________________________________ 277

CA3290, CA3290A, CA3290B

Fig. 13 - Light-<:ontrol/ed on",.hot timsr.

Fig. 14 - Low-frequency multivlbrator.

+l&V

lOOK

+I!SV

471<
01

INPUT

47<

02
1001(

Fig. 15 - Window comparator.

I MEG

Fig. 16 _I LEO barllraph drivsr.

The photographs and dimensions of each COS/MOS
chip represent a chip when it is part of the wafer.
When the wafer is cut into chips, the cleavage
angles are 57° instead of 90° with respect to the
face 01 the chip. Therefore, the isolated chip is
actually 7 mils (0. " mm) larger in both dimensions.

Dimensions in parentheses are in millimBttlrI and
are derived from the basic inch dimensions .. in70-1.
NOTE:

dicated. Grid graduation. are in mil.

~os. IN PADS ARE FOR I-LEAD DIP AND TD-5

,,0-

3 inch}.

NOS. ourslDEOFCHIP ARE FOR 14- LEAD DIP
92CM-30091

Dimensions and pad layout for the CA3290H.

_____________________________________________________________________ 279

CA3401E, CA3401G
ELECTRICAL CHARACTERISTICS AT TA = 25°C, V+ = 15 V (Unless Indicated Otherwise I

CHARACTERISTIC

,

;

LIMITS

TEST CONDITIONS

AIIIIIENT HIIIPEIIATUAE ITAI·2~·C
fDA nST CIACUIT SEE F'IGUIt£ 4

,

1

Min.

Typ. Max.

13.5
-

14.2
0.03

0.1

10

13.5

-

Output Current:
Source, ISOURCE
Sink,ISINK

5
0.5

10

-

1

-

Total Ouiescent Current: 10
Noninverting inputs open

-

6.9

10

UNITS

~

r

STATIC
Output Voltage:
High, VOH
Low, VOL
Max. Undistorted Output Swing,
VOP-P

aoC!

IO"'lmA,f=1 kHl

Low·Frequency NOise Voltage

'"

'N

'0"-1 mA,f-l kHz,Rs=Oll

Low·Frequency Noise Current

'N

'0 1 mA,f·1 kHl,As"

Mn

Current·Mirror
Transfer Ratio (nl /n 2)

'MTA

1, "100 I.IA,VOS:t10 V

Gate·Terminal Current

'GT

VoS-t10 V,VGS""t3.7 V

Input Capacitance

2,3,4

V

29

0.7

C,

860

",mho

0.2

I.I v ..('HZ

0.3

pA

1.3

2.0

±O.Ot

'40

~ 0.1

i

io.O I

V.

;

/

~
oA

5.5

pF

Output Capacitance

Co

2.0

pF

Input·to·Output Capacitance

C I·O

0.35

pF

0,001

.

0,1

QOI

DRAIN CURRENT

.0

l'ol-mA

Fig. 6- Forward transcDnductance vs. drain currsnt.

For Each COS/MOS Transistor Pair

Drain Current
Orain·to-Source Cutoff Current

9,10

'DO

VOO"""O V

10010ff)

V OO -+l0 V,VSS"'O V

1.0

Gale VoltageIV G 'oo-tl0 V or 0 V
DC Output Voltage

Vo

V OD "+10 V

'"

VOO"-tl0 V, f -1 kHz

Forward Transconductance

10

4.2

2.2

4.0

0.5

100

5.0

5.8

2300

",mho

'"

V'I.I S

Slew Rale (Open, Loop)

SA

VOO=+15 V

10

Amplifier Voltage Gain

AOL

V OO "'+10 V,f=1 kHz.A b "22 Mn
Rs=50U

10.11

32

Gate·Terminal Current

'GT

V OO =-t10V

10

±o.OO5

EON

VOO=+10 V.Rb=22Mn.As=10 kU

Broadband Output Noise Voltage

Input·lo·Output Capacitance

500

eN -EQUIVALENT INPUT NOISE VOLTAGE
iN ·EOUIVALENT INPUT NOISE CURRENT

d8

±:IO

nA

,v

C,

11.8

pF

Co

5.0

pF

CI_Q

1.1

1"

Input Capacitance
Output Capacitance

10,11

AMBIENT TEMPERATURE ITA J.25-C
FOR tN,AS·OD: FOR iN,RS.INn

oA

0.001
.0

102

loJ

104

10'

.0'

OPERATING FREQUENCY HI-HI

Fig. 1- Noi$. IIOIt.,. lind noi$tI current

10

• ")00

~
B r-;,,{~
.r-- tJ..
~ K>O

~
t!

~

10

/

GNO

0.'

~ OD!

~

/

r-

0

§

., .

VOO"+IOV

~

~ooo
-75

V
-'0

I

g

/

!:!

./

/

u 0.0'

0.001

:I

/

~ l-

/'

I

i

,/

!

0.1

i

/

~

AMBIENT TEMPERATURE (TA!=25-<; Rb. 22 NO
SEE CIRCUIT IN FIG. 10
V~

vs. operating frequency.

I

0.0001

2

4

8

'0

SUPPLY VOLTAGE {Vool-VOLTS

-2 5

0

25
AMBIENT TEMPERATURE (TAl _·C

Fig. 8- Orain-ro-$ourcecutoif current

1'5'.

100

125

ambient temperature.

Fig.9 - Typical VOO vs. IOD characteristiC$ (or amplifier circuits
of Fig. 70 and Fig. , 5_

___________________________________________________________________ 283

CA3600E
APPLICATIONS - Post-Amplifiers for Op-Amps (Cont'dl

"!+6vl

120

SUPPLYWLTAG£IVoO'·";5'v--'" '\
100

2 '0
,

10V

....... ,

2,11,14

'\
22KO

~1~~+-U-~.,~,~,=+~~~~.T,~--+---1
~--+---~--4---+---~~1----

1\\
\

L-~~~IO~'~~IO~,-UW.IO~'~~IO~'~~I~O.r-~IO"'~~'O'
OPERATING FREOUENCYUI-Hr

Fig. 11- Typica' voltll~ ,.in n. opera fin, frequlllJCY chafllCteriwcs
for thrH"st.,. COS/MOS r,,,,,listor"pair flmp/ifi.,- in Fig. 16.

Fig. 18- COS/MOS rrlJllsistor.".ir u * as post..",p/ifier to OP-llfnP in
tJpM-Ioopcirr:uit.

Fig. 19- COSIMOS tl1lnsistor-pmr uUld lIS post-amplifi(lf' to op-.mp
in unity·flllin circuit.

...

Multivibrators. Threshold Detectors. and Comparators
Descriptions of several circuits using COS/MOS transistorpairs in both monostable and astable multivibrators have been
published,
The characteristics of COS/MOS pairs are also
ideal for mating with micropower op-amps in circuits such as
the precision multistable circuits shown in Fig. 22. In these

CA3600£

circuits precise timing and thresholds are assured by the stable

characteristics of the input differential amplifier in the CA3080
Moreover, speed
Operational Transconductance Amplifier.
vs. power consumption tradeoffs can be made by adjustment
of the Amplifier·Bias-Current (I ABCI supplied to terminal 5 of
the CA3080. The quiescent power consumption of the circuits
shown in Fig. 22 is typically 6 mW, but can be made to operate
in the micropower region by suitable modifications.
The schematic diagram of a programmable micropower com·
parator, shown in Fig. 23 employs the combination of an
op-amp (CA3080AI and COS/MOS transistor-pairs in the
CA3600E. Quiescent power consumption of the circuit is
about 10 IJW(typ.l. When the comparator is strobed "ON",
transistor P1 is driven into conduction and the OTA becomes
active. Under these conditions, the circuit consumes 420 lAW
and responds to a differential-input signal in about 8 ps.
By suitably biasing the CA30BOA. the circuit response time
can be decreased to about 150 ns but the power consumption
is increased to 21 mW. The differential amplifier input
common-mode range for this circuit is -1 V to +10.5 V.
Voltage gain of this micropower comparator is typically 130 dB.

Fig. 20- COSMOS 'I1ImislOr·,./rs USBd as two·stage post-amplifier to
op-amp in opfIn-loop circuit.

...

Fifl. 21- Unity"gIIin amplifier u,., COSIMOS trsnsistor..".irs as

two-st.", pcnt-amplifler to op-amp.

t.~

,--=-----~r-----_:,----, ,.", \li;.~

,.
100kA

,.
10MO

.

v-

1/3 CA3600E

bl MONOSTABLE MULTlV1BRATOR

,"
y'

Fig. 22- Mu/rist.bI" citeuit. using COSIMOS trem/sto,.".ir,.
STROBE

10

10'

'lCS·215l5

Fig. 23- Pro"ammabl. micropower compar.ror.

________

~

FJ,.

24- ()pfIn-ioop (JIlIn char.:ter;stic

for op-emp.

___________________________________________________________

~5

CA3724G,CA3725G
Features:

High-Current N-P-N
Transistor Arrays
Four Individual Sealed-Junction
High-Current N-P-N Transistors

The RCA-CA3724G and -CA3725G are highcurrent n-p-n transistor arrays each containing
4 individual sealed-junction high-current
n-p-n transistors_ They are intended for highcurrent, high-speed switching and driver
applications.
These devices are alike except for breakdown voltage ratings.
The CA3724G and CA3725G are supplied in
a 14-lead dual-in-line plastic package and
operate aver the full military temperature
range of -55 0 C to +125 0 C. The transistor
chips used in these packages are of the
sealed-junction type to provide protection
against the deteriorating effects of humidity
and other surface contaminants without the
need for a hermetic package enclosure.
The semiconductor junctions are sealed by
utilizing a sil icon nitride passivation layer.
A multi-layered, highly corrosion-resistant,
terminal-connection system of unique design
is employed.

• High Current - t A
• High Breakdown Voltage:
CA3725G = 80 V dc min. V(BR)CES
@IC= tOIlA
CA3724G = 70 V dc min. V(BR)CES
@IC= tOIlA
• Fast Switching Speeds:
ton = 30 ns typ_@ IC = 500 mA
92CS-24299

toff = 36 ns typo @ IC = 500 mA
•
•
•
•
•

Fig. 1- Terminal diagram (top lIiew).

"Hermetic Chip" Construction
Silicon Nitride Passivated
Platinum Silicide Ohmic Contacts
Gold Chip-Metallization
Electrically similar and pin compatible
with industry types MP03724, MP03725;
FP03724, FP03725; DH3724, DH3725;
SP3724, SP3725 in similar packages

MAXIMUM RATINGS, Absolute-Maximum Values at TA = 250C
CA3724G

CA3725G

COLLECTOR-TO-EMITTER VOLTAGE
With Base Open

V CEO

40

50

V

COLLECTOR-TO-BASE VOLTAGE

V CBO

70

80

V

VEBO

6

6

V

1.0

1.0

A

................ 1.0
................ 2.0
......................

1.0
2.0

With Emitter Open

EMITTER-TO-BASE VOLTAGE
With Collector Open

Applications:
•
•
•
•
•
•

Core-Memory Driver
High-Speed Switching
High-Current LED Driver
High-Voltage Switching
Relay and Solenoid Driver
Lamp Driver

COLLECTOR CURRENT

IC

POWER DISSIPATION:
At T A up to 25 o C:

Po

For Each Transistor

Total Pack age
At T A above 25°C derate linearly
AMBIENT TEMPERATURE RANGE:
Operating

................ -55 to +125
................ -66 to +150

Storage

20
-55 to +125
-66 to +150

LEAD TEMPERATURE lOURING SOLDERING):
At distance 1132" 13.17 mm) from

300

seating plane for 105 max.

I

."'V

JTtl

. INPUT

I-OVo
TO SAMP\.IHG SCOPE

Ion
VIN. + 9.7 V
t, < Ins
PULSE WIDTH _I po.

V'N~'"

zl·~on

DUTY CYCLE <2%

lC Illl

162n

I

I

I,o",:

I~F

-3·8V

I

300

1,< I.,

I
I

I
I)
I
I
I
I

I

I
I

".,oo.n OUTPUT T - Il L
I Fto1
..
100

=

I
I.....
I
I

~, ON...!

I

I

I

I. 'OFF.J

!500mA.IBlfIII~~OmA

1B2A1-!50mA

92CM- 24300

Fig. 2-Switching time test circuit.

___________________________________________________________________ 287

CA6078, CA6741 Types
~T

Opwational Anapl.......
CA6078AT - M~ Type
CA6741T - GeneraI-Purpase Type

................
·-.DC
.........

._----

~TZ

FOf" Applications where low Noise

(Burst + l/fl is a Prime Requirement
Virtually free from "popmrn" lbuntl noise:
device rejected if any noise burst eou:eeds 2O,.V lpeakl,
referred to input over a 3IJ.second time period.
RCA-CA6078AT and CA6741T are Iow-noise linear Ie
operational amplifiers that are virt...lly free of '''popcorn''

Cb&ntt noise.
These Iow-noise wersions of the CA3078AT and CA3741T
are a resulr: of improved processing cIevek:JpIMnts and ~igid
burst-noise inspection aUra. A ~ selective test ci..cuit
(See Fig. 2) asans thR .... type IM8tS the rigid Iow-noise
standards shown in the data SIClion. This Iowbunt-ooise
property also assures excellent pafor_nce throUJlhout the

1/f noise spectrum.
In addition the· CAIi078AT _

CA674IT

0_

•

. . . . . - . • • • •kc

•

T-...ry

. h_ _......

1GI£._ ... ~'JOCoUE"

the same

features inc::orporated in the CA3J78AT and CA3741T
~ively. including output short-circuit fWOtKtion.
Iatdt-.... openrrion. wide CX)~ and differentialmode signal ranges. aNi Iow~ffset nulling capKtilitv.
For detailed data, dwacterislics curves, sc:IIeIndic d ......
dimensional outline" and test circuits, refer to the Operational Amplifier Data Bulletins File No. 531 and 535. In
addition, to.. deQils of considerations in bwSl-noise
~. I't!fa to Application Note. 1CAN-6732.
' _ _ mont dllknt 1"Popmm', Noise in U _ lC"s".

The CAIi078AT _ CA6741T utilize the _""'IIy . .1ed
~ TO-!i type~. The CAIi078AT _
the CA6741T
can also be supplied on requnt with d ..J.in-li. . formed
leads. These types . . _
os the CAIi078AS _
CA674IS. This .........._
configurotian ...._
to thot

FeBtJIIB:
• ap..Iaap _ _

• ..... _"""-:3.Ii.v_.

FeBtutes:

.............. 0=_·
• "-____
....... _ _

A_.

~IIA

.-= 40)Il10_'''_.

• - ........

__

• 0p00N0ap"""-....: - . - ...... --

• ...... _ " " " - : S.V_.

........-...-.---.-.............. ...........

• a.----......,,"""-:
1-5V __
ltG.75V1
• ..... _ _ . . . -... _ _ 111A

~T

CM741T
44V
ot3OV
±15V

DCSupplyV",-c-.v+_V-terminolsJ ............... .

:::r.:::=::=:.•. :::: :::::::::::::::::::::::::

36V
±6V

Dowico DisoipoIian:
500mW
Up ... 7!iDC 1CA6741T), Up ... 125<> ICAIi078An •••••..•.•....
_ _ 7!iDC .•.•.•.•...•.......••....•....•.....•.•.•.... Derate linurly 5 mW/DC
T_IIongo:
o,.noo;................................................ .
-55 ... +12SOC
Sbngo •.•.•.•••••.•.•......•.......••..•.•.•.•.•......
-«ito+I50OC
0utputsr-t.Qrmit~ •...•..•..•..•..••••..••.•.....•
No limitation
......T_IIluri.. -ing): .......................... .

"'_1116 tl/32 indIl1li11 to.79 mm)
10 a:onds rn.x. _. _. _______ . __________ . ____ .. _

frum~for

250mW

-55 ... +12SOC
-«i ... +I50OC
No limitation

JOOOC

·If Supply VohIiII is . . . ,.... ±15.atts.. ... ~ Muimum Inp.at v ..... is . . . . lOtM Supply v . . . . ._
-Shartcin:uit..., ........ to ........ _to . . . . :wppIy.

of the ft..1ead d ..l-in-line (Mini-Dip) JIKbge.

•

\j' .......

,,,-

A_

..........................

"....,."""

F.. ,-Typ. ....."".. of trPI' w.irJr "". , . . . . . . and

typII

r:ontnrI'-I forbtlnt"....

~-

$UPl'LT ~T": V··"Y, Y- __ IIV
AIIIEJfT TE.-ERA11.ME IW-ZS·C

I .
of

:I

~

·J.U..U1.JJ."!.
I.,..!.

,

..
=
~
list .1Isr "!DOd f(It C¥14T AId) 2IOOd FOR CMO'lIIM
• CA614n OR C'AI078AT

i

.

II

. , ... ...

~
~

,

.. ••WI'

2

.. a-wi

289

Linear Integrated Circuits
for Consumer Applications
Technical Data

_ _ _ _ _ _ _ _ _ _ _ _ _ 291

CA270 Types
v+
12V

I kQ

(CA210AW AND
CA210SW ONLY)

50kll

>

AFC

I

...~

5

OL------------------+H--O~R.~S~~N
92CS-2S93'

Fig. 5- Typical waveforms for vidtlo outputs.

IOkA

18011

IOO,..F

I

~F

>

100.0

...~I
...

AGe TO
hl",kn~_--l_ _ _ _ _ _ _ _R~F()AMPL.

v+
12 V

5

1.2 kQ

.

AGe TO
I.F AMPL.

12

9
6

u

.. 3

Fig. 4- Test circuit for CA270AW, CA270BW, and CA270CW.

ELECTRICAL CHARACTERISTICS at TA = 250 C, Supply Yoitage (Y+I
and Referenced to Test Circuit (Fig. 41.
CHARACTERISTIC
Supply Yoltage, y+
Supply Current, 1+
(See Fig. 21
Video Characteristics:
DC Output Voltage,
Terrn.9 (See Fig. 51
DC Output Voltage,
Term.l0 (See Fig. 51
Sync Tip Output
Voltage, Term.9
AC Input Voltage,
Terms. 1,2
Input Res., Term. 1
Input Res., Term.2
Video Bandwidth,
Term.9
Differential Gain
Differential Phase
Intermod. Products:
Beat Freq.,l.6 MHz
Beat Freq.,2.8 MHz
Rejection at Carrier
Freq., Terms.9,10,ll
Rejection, Twice Carrier
Freq.,Terms.9,10,ll
AGC Characteristics:
Sat.Voltage, Term.4
Sat. Voltage, Term.5

TEST CONDITIONS

MIN.

Y+=12Y
V+=12 V

10.2

Zero Signal

Zero Signal
Output=AGC thres·
hold (non·gated)
Input for output=
AGC threshold

22

CA270AW
CA270BW
CA270CW
CA270AW
CA270BW
CA270CW

5.7
5.8
5.5
5.6
5:7
5.5

-

z

FREQUENCY-MHz

12 Y,

92CS-2S9!!

Fig. 6- Typical AFC characteristic.

TYP. MAX. UNITS
12
40

13.8
56

6
6
6
6
6
6
3

6.3
6.2
6.5
6.4
6.3
6.5

-

V
rnA

V

>

12

I

V

~

9

§

6

~

V

3

0E:::::::~
10

_ __

SIGNAL INPUT-mV

50

70

100

mV

-

-

Kn
Kn

At output = -3 dB

-

3.3
3.3
5

See Note 1
See Note 1

-

-

See Note 1 (95% sat.
bl ue colour bar)
F=Video Carripr;VIN
for Term.9(dc)=3.7V
F-2X Video Carrier;
VIN for Term.9(dc)
=3.7 V

-

-

-

-40
-40

-

-

-

MHz

10
10

%
deg

-60
-67

dB
dB
dB

-

-

Fig. 7- Typical AGC chIIrBcteri.tics.

VIc)

V9

OL-------------~IOO~-

dB

SIGNAL INPUT-mV
92C5-26934

Fig. 8- Typical transf. chBl7ICttJriltics.

Zero Sig.; 14 = 10 mA
Zero Sig.; 15 = 10 mA

-

-

0.7

-

0.3
1.2

V
V

____________________________________________

~

__________________

~3

CA758E
RC Phase-Locked-Loop Stereo Decoder

Features:
• Low ci....ni ... (THO): 0.4% (typ.)
• ExceHent SCA rejection: 70 dB typo

For FM Multiplex Systems

RCA-CA758E i!. a monolithic silicon integrated circuit RC
phase-lock loop stereo decoder intended for FM solid-state
stereo multiplex systems.

• RC oscillator
• Hi"'-audio~annel separation: 45 dB
• Power supply range: 10 to 16 V de
• Requires only one adjustment for complete ali",ment

The decoder uses a minimum of external components. and
requires one adjustment (oscillator frequency) for complete
alignment. In addition, the CA758E provides automatic monostereo made switching and energizes a stereo indicator lamp_

The CA758E is pin compatible and electrically equivalent to
industry types p.A758, MC1311P, LMl800, and ULX2244.

• Lo..empedance outputs

• Stereo inclcator lamp drive: 150 mA typo

The CA758E is supplied in a 16-lead dual·in·line plastic
package and operates over an ambient temperature range of
-40 to +850 C.

The CA758E decodes the multiplexed stereo input signal into
left and right channel audio output signals. The decoder also
suppresses SCA !storecast) transmissions when present in the
composite stereo signal.

\..OOP

v'

FILTER

O$C.

ST£MD

AC NETWORK

LAMP

7

MAXIMUM RATINGS. Alnoluts-Maximum Value'" TA = 25"c
DC SupplV Voltage.
DC Supply Voltage (for <;a 1S'lecond period) .
DC Voltage at Term. 11Lamp Drivar Circuit with Lamp "OFF"}.

+18 V
+22 V
+22 V

Device Dissipation:
Up to TA -700C

730 rritJ

DETECTOR
INPUT

9.1mWfJC

Above T Po • 70Dc derate linearly
Ambient Temperature Range:
Operating. .
Storage . .
Laad Temperature lOuring soldering):
At a distance not less than 1J32" 10.79 mml

-40 to +8SOC
. -65 to +1S00c

,.kMl:

L-__________~--------1_------------------~--_i~ITUT~~

from case for 10 s max.

M~~~~~EXQI}-t-______________.J

LEFT RIGHT
CHANNEL
DE-EMPHASIS

GROUND

Fig. 1 - Functional block dhlgnlm of the CA758E.

ELECTRICAL CHARACTERISTICS

CHARACTERISTIC

TEST CONDITIONS
IRet..nc1lCl to Fil 7 unl. . om_i. speclfledl
V.'2V.T A o 25:'"
Multiple. Input Stgnal (L-A. pilot "OFF")
-300mVRMS
190kHz Pilot Level - 30 mV AMS
f (modulationl- 400 Hz or 1 kHz

LIMITS

Min.

.Ty•.

75

'50
1.3

UNITS

Max.

Static Charactaoistics
Total Current

Lamp "OFF"

Maximum Available Lamp Current
DC Voltage at Term. 7 (Lamp Driver)

I (lamp) = SO mA

DC Voltage Shift at either Term. 4
orS (Output)

Stereo-to-Mono Operation

26

30

36

mA
mA

'.8

'50

V
mV

Dynamic Charactaoistici
Power Supply Ripple Rejection

For a 2OO·Hz. 200.",V AMS Signal

Input Resistance
Output Resistance
Channel Separation (Stereo)

36

45

dB

20

36

kl1

0 .•
Atf= 100Hz
f '" 400Hz
f·

30

10kHz

At f= 1 kHz

2.0

kl1
dB

45

dB
dB

45

0.3

,.5

dB

0.5

0 .•

'.4

V/V

Channel Balance (Monaural)
Voltage Gain

f.3
40

Pilot Input Level:
19·kHz Input

Lamp "ON"

19-kHz Input

Lamp "OFF"

2.0

'5
7.0

Hysteresis

Lamp "OFF"

3.0

7.0

±2.0

±4.0

±6.0

0.4

'.0

Capture Range (Deviation from
76-kHz Center Frequ:ncy)
Total Harmonic Distortion

Multiplex Input Signal = 600 mV RMS
Pi! t "OFF"

19·kHz Rejection
38-kHz Rejection
SCA (Storecast) Rejection

Total Resistance (Term. 1S to 8)
requirad to set
fRFF = 19 kHz ± 10 Hz (Term. 11)

Voltage-Controlled Oscillator·

Ooor;;;;T A S;;;25oC

Frequency Drift

25 0 S;;;T A "'700 C

mVRMS
mVRMS
dB

"
"

25

35

dB

25

45

dB

70

dB

Measured Composite Signal: 80% Stereo.
10% Pilot. 10% SCA

Voltaga-Controlled Oscillator (VeO)
Tuning Resistance

20

21.0

23.3
+0.1

0.4

..

25.5

±2

'"

"
"

___________________________________________________________________ 295

CA758E

.......

NOTES,
T ....... _ ........ :!:SS
" ' _ _ _ on...-..nil
:!:2IM ....................

'---'_a.u_

~

-+111DS.-285

Ca ·±''S .. _ciIaIit ....
f:Rintypicll ..............

"3-±'"
R4 -:l:l.

--.

H, .... ..,-:l:1Sin ... . .

Fig.7-

·T_ _ .... _ _ _ _

miI ....

*R .. .......

TYPICAL PERFORMANCE CHARACTERISTICS (R"'--d to Fig.. 71

. . . . . . ~ITaI-~ ,...:. . .
,.. II

-0IdJIImr"-,.....~.,..,

............ ____.

___________________________________________________________________ 297

CA810, CA810A Types
BOOTSTRAP

NOTE:
Pin numbering conventions
for these devices may differ
from manufacturer to manu
facturer. however the devices
are pin compatible and interchangeability is not affected.

o.

Thermal Shut-Down
The thermal-limiting network incorporated in
the CABIO Series circuits provides protection
against damage due to excessive semiconductor
temperatures that may result from high ambient
temperatures and/or excessive dissipation, e.g.,
as encountered in sustained overloads. As in·
dicated in Fig.2 the thermal-limiting feature
automatically reduces the supply current (and
output power) at the higher temperatures.

FEE~~ 8}---------.---+---~--~~~--_1------~--r__1~------~_+
.kR

RIPPLE
REJECTION
INPUT

SUPPLY VOLTAGE (Y+).I ..... Y
LOAD RESISTANCE (RLI ... .D
DISTORTION .10 '"

10

COMPENSATION

7}-----+---.
.2

08
50
100
ISO
CASE TEMPERATURE (Tcl--C

9!:CM-Z.. 13ZRI

200

Fig. 2 - Typical output power and drain current as
a function of case temperature for all types.
Fig. / - Schematic diagram of CA8/00, CA8/OQM.

·WING TABS AM TO BE GftOUHDED.

Load-Dump Voltage-Surge Protection
The maximum operating supply voltage of
the CABIOAO and CA810AOM is 20 V, and
internal protection is provided for peaks of
up to 40 V, as shown in Fig. 4. Supplyvoltage peaks of more than 40 V will require
an LC network between the supply and
terminal 5. An LC network, such as the
one shown in Fig. B, provides protection
against supply-voltage surges of up to 120 V
for 2 ms. This type of protection is ON when
the supply voltage (pulsed or dc) exceeds
20V.

v+ (VI

40

14.4

JUl
FROM

'I" 50 ms
'2 ·1000 ms

L·3mh

SUPPLy~TO TERM. I

LINE

+J5·

13~~~F

92(:5-29632

Fig. 4 - Load-dump (oveNO/tage) ·voltage surge protection network and timing diagram for
CA810AO and CA8/0AOM.
Fig. 3 - Schematic diagram of CA810AQ. CA8/0AOM.

______________________________________________________________-----299

CA920AE

Preliminary Data
Features:

TV Horizontal Oscillator
For Color and Monochrome Receivers
The RCA-CA920AE* is a silicon monolithic
integrated circuit intended for use in the
horizontal stages of color and monochrome
television receivers. This device performs
the functions of a sync separator, noise gate,
and horizontal oscillator with dual-time-constant switching in the fly-wheel loop. It
also generates automatic phase control between horizontal flyback pulses and the
horizontal oscillator frequency and provides

fast edge switching drive for transistor or
thyristor horizontal output stages.
The CA920AE is compatible with the industry type TBA920 in both lead arrangement
and electrical operation, although the CA920AE features reduced operating current.
The CA920AE is supplied in the 16-lead
dual-in-line plastic package.

• Sync separawr
• Noise gate input
• Internal precision timing ramp
• Dual-time-constant phase-locked loop
• Output suitable for transistor or
thyristor deflection systems
• Reduced power dissipation

* Formerly Dev. Type No. TA6773.

MAXIMUM RATINGS, Absolute Maximum Values:
13.2V

DC SUPPL V VOLT AGE
DEVICE DISSIPATION:
Up to T A = 5500C
AboveT",=55 C
"'MBIENT TEMPERATURE RANGE:

• . . • • . • 750mW

. Derate linearly at 7.9 mW/oC
-40 to +85°C
-65 to +150oC

Operating
Storage
LEAD TEMPERATURE (During soldering):
At a distance not less than 1/32" (0.79 mm) from case for
10 seconds max.

JJ.

HQR.PULSE
INPUT

. +2650 C

NOR·

DRIVE
OUTPUT

ozv

TERMINAL ASSIGNMENT
POSITIVE
SUPPLY VOI.TAGE

(v+J

I
15 OSCILLATOR FREQUENCY
CONTROL
14 RAMp· PRODUCING

CAPACITOR

IS OSCiLlATOR DECOUPUNG
12 Ctl~~5;ETECTO.
SHAPED-SYNC PlLSE INP

11 DUAL MODE fLYWHEEL FILTER
TIME CONSTANT CONTROL

6

I

~~8L~t~~i DETECTOR

9

NOISE GATE INPUT

TOP VIEW
92C5-21479

ALL RESISTANCES ARE IN OHMS

Fig. 1 - Functional block diagram of the CA920AE with typic.1 peripheral circuitry.

________________________________________________________________

~1

CA1190GQ

TV Sound IF and Audio Output Subsystems
"GQ" Suffix Type - Hermetic Gold-CHIP in
Quad-In-Line Plastic Package
The RCA-CA 119000 combines the sound
I F and audio output subsystems on a single
monolithic integrated circuit to provide a
television sound system. Each device includes a multistage I F amplifier-limiter, an
FM detector, and an audio power amplifier
that is designed to drive, primarily, an 8-,
16-, or 32-ohm speaker.
The CA 1190GO is electrically and mechanically equivalent to industry type TDA 1190Z.
The CAl190GO differs from the TDA1190Z
primarily in its provisions for external feedback components and a higher value volume
control.
The CA 119000 is supplied in the hermetic
Gold-CHIP (G suffix) 16-lead quad-in-line
plastic package with an integral bent-down
wing-tab heat sink (0 suffix), intended for
printed circuit board mounting.

Features:
• Nominal power output: 4 W at V+=24 V, RL =16n, dist.
= 10%; 2Wat v+=12 V, RL =8n,dist.-10%
• Wide power-supply range: 9 to 28 V
• Excellent AM rejection: 50 dB typo
• Low quiescent current: 25 mA typo
• Differential peak detector - requires one
• 5-kHz deviation sensitivity: 1 W output typ_
tuned coil
• 3-dB limiting sensitivity: 50 IJ-V typo
• Electronic volume control with improved
taper and single. wire control

ELECTRICAL CHARACTERISTICS at TA = 250 C, v+ = 24 V, DC Volume Control Rx = 0
R L = 16 n unless otherwise indicated_ Refer to Fig. 1.

I

n,

LIMITS
UNITS
Min. Typ. Max.

CHARACTERISTIC

TEST CONDITIONS

Static Characteristics
Current into Term. 14

Po = 0

10

25

40

mA

Dynamic Characteristics
IF Amplifier:
Input Limiting Voltage,
(At -3 dB point), Vl (lim)

fo : 4.5 MHz, fm = 400 Hz
Ll.f = ± 25 kHz

-

50

100

IJ-V

fo = 4.5 MHz, fm = 400 Hz.
Modulation Index = 0.3,
VIN = 1 mV

40

50

-

dB

Deviation Sensitivity

fo = 4.5 MHz. fm = 400 Hz
Ll.f = ± 25 kHz, VI = 1 mV
Rx = 0, Deviation necessary
to obtain 4 Vrms across
16n(lW)

-

5

-

kHz

Minimum Audio Output

fo = 4.5 MHz, fm = 400 Hz
Ll.f = ± 25 kHz, VI = 1 mV
Rx= 15kn

-

-

10

mVrms

Distortion at Po = 1.5 W

fo = 4.5 MHz, fm = 400 Hz
LI.f = ± 25 kHz, VIN = 1 mV

-

-

3

%

Signal to Noise Ratio

Vout atLl.f = owith Rx
adjusted for Vout = 4 Vrms
at llf = ± 25 kHz

50

-

AM Rejection, AMR

The transistor chips used in the hermetic
Gold-CHIP plastic package are of the sealedjunction type designed to provide protection
against the deteriorating effects of humidity
and other surface contaminants without the
need for a hermetic package enclosure. The
semiconductor junctions are sealed by utilizing a silicon nitride passivation layer. A
multi-layered, highly corrosion-resistant, terminal-connection system of unique design
is employed.

-

dB

MAXIMUM RATINGS, Absolute-Maximum Valul
DC SUPPLY VOLTAGE (Between Term. 14
V+ and ground tabs) .
OUTPUT PEAK CURRENT:
Repetitive. •

"

Non-repetitive .
INPUT SIGNAL VOLTAGE (Between Terms. 1 and 2)
DEVICE DISSIPATION:
With Infinite Heat Sink Up to TA =9o"C •
derate linearly
Above T A = 90°C .
With No Heat Sink - (free air) Up to T A = 25°C • .
Above TA = 25°C •
derate linearly
THERMAL RESISTANCE:
Junction to ground tabs .
AMBIENT TEMPERATURE RANGE:

Operating .

.

.

•

.

.

.

.

Storage'.
.....
LEAD TEMPERATURE (During Soldering):
At a distance 1/16 in. ± 1/32 in. (1.59 ±0.79 mm)
from case for 10 seconds max. .

+28

V

1.5
2
±3

A
A

:}.

V

5

rO.221LF

W

83.3

mW/oC

1.75
14

mW/oC

12

0C/W

W

--40 to +85
-65 to +150

+265

22 kll

°c
°c
92CM-29273

Fig.l - Block diagram of the CA 1190GO in a typical application.

________________________________________________________________

~3

CA1190GQ
DC VOLUME CONTROL

MIOIO AMPUFlER
15

A~---;--------1r------t-------~--4---~--~--~---r--~~

B--~--+---------~r-----~--------rt--~---1r--+--~

R~

6.2K

E-;r-----------'

Q50

051

F'~C=========~~~~=====±==C===~
6-;r-----------,

K--f--...l
lICTI1IE FILTER

FII DETEClllR TUNING

AUDIO AMPLIFIER

Fig.2 - St:hematic diagram (cont'd}.

92.CS-29272

Fig.3 - TIHminaI r r - .

-----------------------------------------------------------------~

CA1310E

..

,'m

2.'
'"

Fig. 2 - Schematic diagrllm of the CA 1310E (Cant'd).

NOTES

A buffered 3-volt positive-going square wave is available at Term. 10.

The alignment of the free-running oscillator frequency may be checked
at this point with a frequency counter.
C1: A lower value input coupling capacitor may be used in place of
the 2-J.LF value if reduced separation at low frequencies is acceptable.

C4: The time constant for the stereo switch level detector circuit is
calculated by C4 x 53,000 ohms ±30% with a maximum de

voltage drop across C4 of 0.25 lIolt (Term. 8 positive) and a
pilot level voltage of 100 mV RMS. Signal voltage across C4
is negligible.

C5: The recommended O.05-J.LF capacitor provides a 1.750 phase
lead at 19 kHz.
R1, R2: Load resistance values are related to supply voltage as follows:
Minimum Supply Voltage
8
10 12
V
4.3 6.2 kfl
Maximum Load Resistance 2.7
R3, C6, C8: C8 may be omitted. R3"" 100 ohms and C6 ;; 0.25 .uF,
if relaxed circuit performance is acceptable.

RESISTANCE VALUES ARE IN OHMS
CAPACITANCE VALUES ARE IN MICROFARAOS.

R4, R5, C7: If a capture range greater than ±3% typo is required,
reduce value of C7 and increase values of R4. R5 proportionally. However. beat-note distortion is increased
at high signal levels because of oscillator-phase jitter.
R4. C7 = ±1 % in test circuit and ±5% in typical application.
Fig. 3 - Telt circuit for mfHJsuremtmt of dynamic chartlCtBristics.

_____________________________________________________________________

~7

CA1352E

TV Video IF Amplifier

Features

TYPICAL STATIC CHARACTERISTICS

atTA =25°C,V+"'2V

• High 45-MHz gain - 53 dB (typ.)

With AGC and Keyer Circuit

The ACA·CA1352E is a monolithic integrated circuit designed for
use as an if amplifier in monochrome or color TV receivers. It
features a high-gain gated AGe system with a 68-dB range
(typ.). A delaved forward AGe output is adjustable by means
of a potentiometer. Either positive- or negative-going sync may
be used for this system.

• High-gain gaUd AGe system - with either positive- or
negative-going sync.

Total Current 117 + 18 + 1,,1
...•.. 27mA
Output Stage Current tl7 + 181 ..............•.... ' •. 5.7mA

• Adjustable rf AGe delay to tuner
• AGe gain reduction - 68 dB (typ.)

TYPICAL DYNAMIC CHARACTERISTICS

atT A " 25D C, v+ -t2V
AGe Range ..........•..•.....•.
Powar Gain ................... .
Minimum rf AGe Range !term. 12) •.
Maximum rf AGC Range (term. 121 ..

""dB
53 dB
0.2 V

lV

The CA1352E is supplied in the 14·lead dual-in-line plastic
package, and is directly interchangeable with the industry type
1352 in similar packages.
MAXIMUM RATINGS, AbsolufB·MaJtimum Valuel
AtTA -25
SUPPLY VOLTAGE:

Between terminels 4 and 11
Between terminals 7 or 8 and 4
INPUT VOLTAGE (terminal 1 or 21 .. '
AGe INPUT VOLTAGE (terminal6or 10) ..
DEVICE DISSIPATION:
UptoTA =65D C ........... .
Above T A .. 5SD C derate linearlv at
AMBIENT TEMPERATURE RANGE:
Operating
Storage
LEAD TEMPERATURE lOuring Soldering):
At distance 1/16 ± 1/32 in. (1.59 ±0.79 mm)
from Case for 10 seconds max. . ..

..... 18V
...... ,..18 V
.... 10V pop
6V

. ... 750mW
.. 7.9mW/D C

-40 to +8S:C
... -65 to +150 C

IF

f
=

RF AGe
OUTPUT

RF AGe

DELAY

ADJUST

*

SYNC
POLARITY

VOLTAGE AT
TERMINAL 6

NEGATIVE

-u::~.5

6
IF

INPUT

*

VOLTAGE AT
TERMINAL 10

*

VALUE OF
RI-n

v

I TO 4 V
NOM"2 V

0

-OV

POSITIVE

I TO B V
NOM=4.5

.-fLV

3.9k

--OV
92CS-24136RI

Fig. , - CA 1352E block disgrllm lind typic'" AGe tint .t-up.

_____________________________________________________________________

~9

CA1391E, CA1394E
OSC

PREDRIVER

v'

TIMING

PHASEDETECTOR

REGULATOR

"31
560
R29
1.5k

R"30
1.5k

"'

2.6~

200
""

"3

NOTE: ALL RESISTANCES ARE
IN OHMS

Fig.2 - Schematic diagram of CA 1391E, CA 1394E.

The phase detector is isolated from the
remainder of the circuit by R31, Z2, 015
and 016. The phase detector consists of
the comparator 022 and 023, and the gated
current source 018. Negative-going sync
pulses at terminal 3 turn off 017, and the
current division between 022 and 023 is
then determined by the phase relationship
of the sync and the sawtooth waveform at
terminal 4, which is derived from the horizontal flyback pulse. If there is no phase
difference between the sync and sawtooth,
equal currents flow in the collectors of 022
and 023 during each half of the sync pulse

+25'1

period. The current in 022 is turned around
by current mirror 020 and 021 so that there
is no net output current at terminal 5 for
balanced conditons. When a phase offset
occurs, current flows either in or out of

terminal 5. In circuit applications, this terminal is connected to terminal 7 through an
external low·pass filter, thereby controlling
the oscillator.
Shunt regulation for the circuit is obtained
by using a VBE and zener multiplier. Resistors R 13 and R 14 multiply the VBE of
011, and the ratio of R15 and R16 multiplies the voltage Df the zener diode Zl.

I

POSITIVE

Fig.3 - Duty cycle at the pre-drive output (term. 1)
as it is affected by the input at term. 8.

+6V

620n

,."

IW

14

200.n

I

~n

150

6aoo

~'F
I.'

55

2

150.n

430n
loon
1.65
kll

150n

1.5 lin

OI'~OI~

390
kn

TO
DRIVER
TRANSFORMER
OUTPUT

3.9
kit

1.2 kfi

LJ

20'1 p-p

5.,

\J
60 V p-p

10 p.S

92CM-2.S749

FigA - DC test circuit.

Fig.5 -

Typical circuit application.

____________________________________________________________________ 311

CA1398E

TEST SET-UP PROCEDURE FOR OIICILLATOR
die oo,i_ keying ............. i_a.nd odjust
Cx to obbin • fraoHunning _ I..... Iioquency of 3.579545
R~

____

~

_n

MHz ±10 Hz. ~ die ..... Test Conditions cIoseri.... in die
EI_a a....:o.nstiooa..t far Oocil"- Loct-\lp. wory L 1
,-",<. 20 ,,"I _
Cl '-'>x. 1I11III pFI to
die
initial_far .....,._ .... phMO _ _ _... p.

________________________________________________________ 313

CA2002, CA2002M
ELECTRICAL CHARACTERISTICS at T A = 25°C, V+ = 14.4 V
Unless otherwise specified (See Figure 2)
LIMITS

TEST CONDITIONS

CHARACTERISTIC

UNITS

Min. Typ. Max.

-

18

Quiescent Output Voltage, Vo

Measu re at Term. 4

6.4

7.2

8

Quiescent Orain Current, ID

Measure at Term. 5

-

45

80

4.8

5.2

-

8

Supply Voltage, V+

Output Power,PO

THD = 10%, A = 40 dB.
f = 1 KHz
RL =4 S1.
V+= 14.4V

RL =2S1.

V+= 16V

RL =4 S1.
RL = 2 S1.

Input Saturation Voltage, VI IRMS)

8

-

-

6.5

7

V
V
mA

SUPPLY VOLTAGE (I/+)-V

W

Fig. 4 - Typical quiescent drain current as a
function of supply voltage.

-

10

-

400

-

-

mV

mV

A=40dB,f=1 KHz

Input Sensitivity, el

Frequency Response 1-3 dB)

PO =0.5W, RL =4S1.

-

15

PO =0.5W,RL =2S1.

-

11

-

Po = 5.2 W , R L = 4 S1.

-

55

-

PO =8W, RL = 2S1.

-

50

-

R L = 4 S1., Cx = 39 nF,

40 to 15000

Hz

R X = 39 S1. ISee Figs.15,20)
-

KS1.

80

-

dB

40

40.5

dB

4

-

fJ.V

-

60

-

pA

PO=5.2W,RL =4S1.

-

68

-

PO=8W,RL=2S1.

-

58

-

30

35

-

Input Resistance, RIITerm. 1)

f = 1 KHz

Open· Loop Voltage Gain, AOL

RL=4S1.,f=IKHz

-

Closed·Loop Voltage Gain, A

RL -4S1., f-l KHz

39.5

Input Noise Voltage, eN

Freq. Resp. = 40 to
15,000 Hz 1-3 dB)

-

Input Noise Current, iN

Freq. Resp. = 40 to
15,000 Hz 1-3 dB)

70 150

I
SUPPLY VOLTAGE (\1+1-1/

Fig. 5 -

Typical output power as a function of

supply voltage.

A=40dB,f=IKHz
Efficiency, 7J

Power Supply Rejection Ratio, PSRR

RI:=4S1.,A=40dB,
Rg= 10 KS1., fripple = 100Hz,
Vripple = 0.5 V

%

dB
LOAD RESISTANCE {RLI-O

Fig. 6 -

Typical output power as a function of

load resistance.

CLOSED-LOOP VOL.TAGE GAIN (AI

CLOSED-LOOP VOLTAGE GAIN (AI

Fig. 1 -

Typical input voltage as a function of
closed-loop voltage gain.

Fig. 8 -

Typical input voltage as a function of
closed-loop voltage gain.

CLOSED-LOOP VOLTAGE GAIN (AI-dB

Fig. 9 - Typical power supply. rejection ratio as a
function of closed-loop voltage gain.

___________________________________________________________________ 315

Preliminary Data

CA2004, CA2004M

12-Watt Audio Power Amplifier

Features:

plastic TO·nO·style VERSA·V package. All
leads (except term. 3) are electrically in·
sulated from the mounting flange. elimi·
nating the need for insulating hardware. The
VERSA·V package is available with two
lead configurations. The CA2004 has a
vertical·mount lead form. and the CA2004M
has a horizontal·mount lead form.

The RCA·CA2004 is a monolithic silicon
class B audio power amplifier designed for
driving loads as low as 3.2 H. It provides a
high output current capability (up to 3.5 Al.
and very low harmonic and cross·over dis·
tortion.
The CA2004 is supplied in a hermetic trio
metal Gold·CHIP encapsulated in the 5·lead

• Hermetic Gold·CHIP encapsulated in a S·lead
plastic TO·220·style package (VERSA·V)
• Thermal overload protection
• Drives load impedance as low as 3.2 12
• Deflection amplifier capability
• Output current capability of up to 3.5 A
• Few external components
• VERSA·V power transistor package·requires no
electrical insulation

MAXIMUM RATINGS. Absolute-Maximum Values:
28 V

DCSUPPLYVOLTAGE.
OPERATING SUPPLY VOLTAGE
OUTPUT PEAK CURRENT:
REPETITIVE
NON-REPETITIVE. . . . . .
POWER DISSIPATION. Po at TA " 90°C
THERMAL RESISTANCE. JUNCTION TO CASE
AMBIENT-TERMPERATURE RANGE:
OPERATING
STORAGE
LEAD TEMPERATURE lOURING SOLDERING):
At distance 1/16 ± 1/32 inch (1.59 ± 0.79 mm) from case for 125 max.

v+

26 V

OUTPUT

GROUND
INVERTING INPUT
LON. INVERTING

3.5 A

4.5 A
15 W

4°C/W

o to +12SoC
-40 to +IS0oC

INPUT
TOP VIEW
,IeS -29223RI

TERMINAL ASSIGNMENT

r---------~---4~v·

Thermal Shut·Down
Thermal shut·down occurs if the output
overloads (temporary or permanent). the
ambient temperature is excessive. or the
junction temperature is excessive. None of
these conditions results in device damage.
They merely cause a temporary automatic
reduction of output power and drain cur·
rent.

.2
2.2.0.
5%

5V

41OI£F

92CS-308S9

Fig. 2 - Typical application.
Fig. 1 - Test circuit.

••

1M II

..........____.... ,0
100110.

• coo

10,..'
5V

C2

.,

22n

100~F

5'1 C3
33nF

C•

•2

100,..F

.7

20n

••

5V
C8

3111

18nF

3900.

.0
3900

.8

3900.

2.2.0

Fig. 3 - 25 W circuit-bridge application.

__________________________________________________________ 317

CA3035, CA3035V1

Ultra-High-Gain Wide-Band Amplifier Array

SCHEMATIC DIAGRAM FOR CA303s AND CAlO35Vl

IAMPL. N-;-,
I

I
I
I,

• Three Individual General.Purpose Amplifiers
• Ideal for service in Remote·Control Amplifiers - - e.,., TV Receivers
• Available in two electrically identical versions: C43035 with straight
leads; CA3035Vl with formed leads

1

HIGHLIGHTS

1

• All o",plifiers sing I.-ended _I, one power .upply requireel

• Thr•••• parat. amplifle,s 1.ln anel Hnelwlelth for each amplifier can III. adlusted
with ..,i •• bl. external circuitry
• Amplifier. op.,obl. intl.p.ndently or in cOlcad.

• Built.in temperature compenutiCHI

• Exceptionally high cascade yoltage lain 129 dB .yp. at 40 kHz

• H.,,,,eticoll, .e.led, .1I.weld.d lO·leaei TO·5-•• ,I.

I
1.,..,0

m.t.1 packag. with straight or formecl I•• d •

• Wid ... bancl rupans..

• Low noi .. performance

L~

r-

• Wiel. operoting t ... p."'u'. ,ang8 .55 0 C to +125°C

I

ABSOLUTE·MAXIMUM RATINGS:
Operating Temperature Range
..... ·SSoC to +12S oC
Storage Temperature Range .........
. ... ·6S oC to +ISOoC
Device Dissipation ..................................... 300 mW
Input Voltage ... . . . . . . . . . . . . . . . . . . . . . . . . . .
. 1V p.p
, .. +lSV
Supply Voltage ........................ ,.,....
Lead Temperature (During Soldering):

J
TYPICAL REMOTE COtlTROL SYSTEM

At distance 1/16 ± 1/32 inch (1.59 ± 0.79mm)

. .. , .......... , .......... +26S oC

from case for 10 seconds max.
ELECTRICAL CHARACTERISTICS AT TA = 2SoC

CHARACTERISTICS

SPEC I AL TEST
CONDITIONS

SYMBOLS

TEST
CIRCUITS
AND
CHARACTER ISTICS
CURVES

LI MI TS
CA3035, CA3035V I
Mi n.

UN I TS

I Typ. I Max.

STATIC CHARACTER I ST I CS

Qu i escent Ope rat ing
Vo! tage

V3
V5
V7

VCC

Tota I Current Orai n

Id

+9V,
VCC
RL3 • 5!ill

·
·

+9V

Fi g. 3

Fi g. 3

-

2
1.9
4.9

3.5

40
40
3B

-

-

V
V
V

5

7.5

mA

44
46
42

-

-

DYNAMI C CHARACTER I ST I CS

Vo ! tag e Ga in:
Amp I i fie r No. I
Amll' ifier No.2
Ampl ifier No.3
Output Vo 1tage Swing

AI
A2
A3

Vout
V lout
V20ut
V3 0ut

Input Res i stance:
Amplifier No.1
Ampl ifier No.2
Amplifier No.3

R lin
R2in
R3 i n

Out put Res i stance

R [out
~2out

f

No i se Fig ure
Ampl ifier No. [

Sensitivity

40 kHz,
+9V

--

o

f

·

40 kHz

-

n
n
n
n
n
n

f

·

40 kHz

BWI
BW2
BW3

-

500
2.5
2.5

-

kHz
MHz
MHz

VCC

NF I

f

•

·

+9V

I kHz,
I !ill
RS

·
·

Fig.4

-

6

7

dB

+ 13 V
VCC
Relay IKII
Current
7.5 mA

.

Flg.2

-

100

150

JJ.V

-F 9.5
F g.6
F g.7

.-

-

50K
2K
67D
270
170
lOOK

.

dB
dB
dB

-

-

2
2.6
B

-

Vp-p
Vp-p
Vp-p

RLI • I !ill
RL2 • I o !ill
RL3 • 5!ill
S i nuso i da I
Output,
Vec • +9V

R3 0ut
Bandw i dt h at
-3dB point:
Ampl ifier No.1
Ampl ifier No.2
Ampl ifier No.3

· .

VCC

COtfTIIOLFUNCTIOtfS

FI•. 2

STATIC CHARACTERISTICS TEST CIRCUIT
Vcc' +9V

flg.3

NOISE FIGURE TEST CIRCUIT

.tv

QUAN nCH
LABORATORIES
Moon No.31!
NOISE ANALYZER

CSEE NOTE.

NOT£: SET ALL INTERNAL POWER SUPPLIES ON QUAN TECH
NOISE ANALYZER TO ZERO VOLT$.
fl ....

319

CA3041

'7' ~'...

an Amb"' .. T............ , T A, 01 25 oe, and. DC s."p/y
Voltqe. Vee> 0/ +140 Volts applied eo Tenninal14 throqh a reBistance 0(6.2~. unle., otIu!,..
wise indicated. Any olher combination
DC Supply Volta,e and Serie. Ruf.lance which will
not cause the Maximum Di."ipalion Limit or any of the Maximum VoltCJBe or CUmtnl Limit. {or
1M CA3041'0 bit esceetIed may be "Bed.

ELECTRICAL CHARACTERISTICS, 0'

or

CHARACTERISTICS
(See p... 7 for Delinltions 01 Torms)

SYMBOLS

SETUP
AND
PROCEDURE
Fig.

SPECIAL CONDITIONS

IJOc
Total Device Dissipation
Zener Relllliating Voltage (DC Supply VoltallO at Terminal 14)
Quiescent Ope/8Iing Cuneot
(into Terminal 11)
9-Volt Cuneot Drain (Quiescent Operating C....nt into Terminal 14)
Input-Impedance Components:
Parallel Input Resistance
Parallel Input CapaCitance
Output-Impedance Compon.nts:
Parallel Oulput Resistance
Parallel Oulput Capacitance

Py

II

VI4

TA = +25OC
+1Ii"C

11

0.25 0.63

114

11

Ri
Ci

3

Ro
Co

-

-

V~lim)

7

Amplitude-Modulation Rejection
IF.Amplifier Voltag. Gain
RecoverarI AF VoltallO:

AMR
A(IF}
Vrf.aO

10

5

45

2. At AF-Driver Output
in Test Setup
THD

RL' 50 kl1,1I1' _25 kHz
THD • 0.1S (typ.)

-

THD < s.;

7

Vo(aO' 8 V(rms)

R~af)

-

R.,rs.

As :oIhown in the &'hcmati(' Dia~

gram (Fig. I) and the TV Receiver Bloc'k Diagrams dion, an FM-detcctor st.age, a Zl·ner-diodl'-n·gulated
power-supply sedion, and an af-amplifier s('ction specifically designcd to drive direl'll:v an
n-JHl audio output transistor or a high-gain audio output p('otod(' tuhe.

In FM receivers, the CA3042 ('an bc.! used to provide if amillifi(:atit)n and limiting. FM
detection, and af preamplification.
The CA3042 provides exceptional versatility uf l'ircuit d(~sign bc(,8UH(, th(' if-umplifi('r/
limiter section. FM detector·scdion, and af-pwamillifier/drivl'r Hedinn ('an lx' u!'\ed indl'pendently of each other.

• internally Zener-diode-regulated voltage supply
_,ow harmonic radiation
• wide frequency capability - <100 kHz to >20 MHz
• low harmonic distortion

MAXIMUM RATINGS,Absolute·Maximum Values:
OPERATlNG·TEMPERATURE RANGE ......•...............•. -40° to +86°C
STORAGE·TEMPERATURE RANGE ..........•.•............. _65° to +1 50°C
LEAD TEMPERATURE (During Soldering):
At distance 1'16 ± 1/32 inch (lo59 ± 0.79 mml
from case for 10 seconds max. ................................ +265 Q C
MAXIMUM INPUT·SIGNALVOLTAGE,
Between Terminals 1 and 3 .....•....••..............•.•........•.• ±3 V
MAXIMUM OEVICE DISSIPATION,
At Ambient Ju p to +25°C ...................................... 950 mW
Temperatures above +25Q C .......................... Derate at 10.8 mwtc

The CA:3042 utiliz{'s a 14-I(>ad dual-in-line plastic packagl' with \('ads SI)('("i<1l1y funnl'rl
to facilitate automatic insertion uf' th(· dl'vice in suitably pundwd printl'fi-(.'in.'uit bU(l['ds.

'.

------~I

Fig. 1 - Schematic Jiqram.

*

for XFMR Details see flg.2(a)

Fig.2(L) - alock diagram 01 typical TV receiver utilizing
the CA3042 and a J2FX5, 6EH5, or equivalent.

PROCEDURES:
Total Device Dissipation:

1. Set switch S in position A
2. Measure and record V14 and 114'
3. DetennineTotalDeviceDissipation from PT '" V14I14
Quiescent Operoting Cur,ent Into Terminal 11:

1. Tum switch S to position B

2. ~:tt:::o It!r!i~aif1.rd as Quiescent Operating Cur-

Fig. 2(a) • Block diagram of typical TV receiver utilizing
transistor RCA-40313.

9-Volt Current Drain:
1. Set switch S in position B
2. Measure 114 and record as 9-Volt Current Drain.

Fig.3 _ Test setup lor menurement 01 toto' device diu;potion, quiescent current into terminal No. J J, and
9.vo/t current Jro;n.

_____________________________________________________________________

~3

CA3042

ELECTRICAL CHARACTERISTICS. at an Ambi•• , T.""' ......... TA. of 26°C. and. DC Supply
Voltage, Vee. of +140 Volt. applied '0 TenninGl14 Ihl'ou,h a "ui.tance 0(6.21&0.. unl... tnh.,..
wi.e indicated. Any other comboinotioll of DC Supply Vol&QS'e and Serle. R.. ;'tanee which will
not cause the Masimum Dissipation Limit or any of the Ma:dmum VoltGJ'1f or CurreM Limit. for
the CA304~ to be exceeded may be used.

Zener Regulating Voltage (DC Supply Voltage atT enninal 14)
Quiescent Operating Cunent
(into Tenninalll)
9-Volt Cunent Drain (Quiescent Operating Current into TenniRall4)
Input·lmpedance Components:
Parallel Input Resistance
Parallel Input Capacitance
Output· Impedance Componenls:
Parallel Output Resistance
Parallel Output Capacitance

PT

3

VI4

-

III

3

114

TYPE
CA3OI2

SPECIAL CONDITIONS

DOC
Total Device Dissipation

TA' +25 UC
+85UC

VCC - +9 Vapplied directly
to Tennl.al14

3

nPICAl
CHARAC'
TERIS·
TICS

liMITS

TEST CONDITIONS
SETUP
CHARACTERISTICS
AND
SYMBOLS
(See Page 7 for Definitions of Tenns)
PROCEDURE
Fig.

Min.
200
210
220

Typ.
230
240
250

Max. Units ~
FIg.

260 mW
270 mW
280 mW

10.5 11.2 12.3

V

0.25 0.63

I

mA

18

mA

8

12

-

11
5

-

kO
pF

-

100
4

-

kO
pF

RI
CI

5
5

Ro
Co

-

Input Limiting Voltage (Knee)

V~lim)

11

-

"V
ISO 200 (nns)

Amplitude-Modulation Rejection
IF·Amplifiel Voltage Gain
Recovered AF Voltage:

AMR
A(IF)
VJ.aO

7

45

58
67

1. At FM-Detector Output
2. At AF·Driver Output
in Test Setup
3. At AF·Oriver Outpul in
TV·Receiver Sound System
Total Hannonic Distortion:
1. In Test Setup
2. In TV Receive. Sound System
FM-Oetecto. Output Resistance
AF·Orive. Input Resistance
AF·Q.i... Output Resistance
AF·Ori ... Voltage Gain

6

-

f4.5 MHz

11
11

THO
11

2A 0.2B
Ro(det)
RKaO
R.,(aO
Aaf

9

I
I

<'>f=
.25 kHz

2A 0.28

t

Rl-5OkO
THO • 0.7~ (typ.)
RV 322!l
THD<~

Rl' ISO kO
THO· I~ (typ.)
VOI'v--+-____ +20V

Fig. 2· Static chsnH:teristic. test circuit for CA3Q66.

AU. RESISTANCE VALUES ARE IN OHIIS
OSCILLATOR
OUTPUT

UNLEUOTHERWISEIHOICATEO.
ALLCAPACITANCEVALun
LE5STHAHI.OAAEIHIIICROFARA05
I o OR GREATER "RE IN PICOF"RAOS
AU. COILS "AVE A 000 >:JJ

Fig. 4 . Dynamic characteristics telt circuit for CA3066.

DYNAMIC CHARACTERISTICS TEST PROCEDURE

CHROIfA INPUT-PERCENT

Fig. 3· TypicB/ ACC ch8rac/1Jl'i.tk of chroma output ...

Chroma input fDr CA3066.

Steps 1, 2, and 3 are performed with no Chroma input
IV1· 0)
1.
Adjust ACC potentiometer for V2 '" +O.65V.
2.
Adjust Killer potentiometer for V4 '" +1.2V.
3.
Adjust capacitor ex (crystal trimmer) so that
frequency of oscillator is 3.579545 MHz.
4.
Unless otherwise noted, the chroma gain control is at
maximum gain (fully clockwise),
5.
The chroma input test signal is a 52.5 p,s "line" at
subearrier frequency, and 10 cycles of burst at 46.5%

6.

7.

of the "line" amplitude. The chroma input ('111) is in
peak·to-peak volts of "Iine" amplitude,
The chroma output (v14) is the same as the chroma
input ('111) except that the burst is removed and keying
overshoot occurs in the retrace period. The chroma
output is in peak-to·peak volts of ··line" amplitude.
The oscillator output (va) is the CW output at terminal
NO.8 and is in peak-to-peak volts. Some modulation
of oscillation dampening between burst injection is
visible.

CA3067 CHROMA OEMODULATOR
The CA3067 contains the separate functional systems of a
de tint control and a demodulator. The phase shift of the tint
amplifi.. system is accomplished by functional control of the
fixed phase signal from the CA3066 oscillator output. This
regenerated reference subearrier is applied to terminal No.3
and driven differentially into phase shift circuits. The tint
adjustment controls the vector addition of phase shifted
signals after which a limiting amplifier removes any remaining ampUtude modulation. The output of the tint amplifier

at terminal No. 1 is phase separated for the required
reference subcarrier phase at terminal No. 6 and No. 12
(terminal No. 12 lags terminal No, 6 by approximately 7601.

These terminals are inputs to the demodulator drive amplifiers. The demodulators consist of two sets of balanced
detectors which receive their ref.enca subcarrier from the
demodulator drive amplifiers. The chroma signal input fromthe CA3066 is applied to terminal No. 14. The chroma signal
differentially drives the demodulators. The demodulation
components are matrixed and dc·shifted in voltage to give
R-Y, G-Y, and a-y color difference components with
close de balance and proper amplitude ratios. The output
amplifiers of the CA3067 are specially designed to meet the
low-impedance driving source requirements of the high-level
color output amplifiers. A special feature of the CA3067 is
R-C filtering of high frequency demodulation components.
Terminal No.4 is a zener diode for use as a regulated voltage
reference at 11 ,9V, When the zener reference element is not
used, the power supply should be maintained at +11.2 ±O.5
volts.

,-----..---<7)..!...----.. . .

+11.2

v

NOTE'Q51THROUGH~IAREE"ITTtRF(lLLOWERS

llLL RESlSTANCE VAW£S AIIl" IN OHMS

ALLCA""CITANCE\lALUUAIIl"IN,F

'----~W;::....-_+20\l
92CS-11~O'

Fig.

5 - Static characteristics test circuit for CA3067.

Fig. 6 - CA3067rchemlltic dia,sm.

341

CA3068
Television Video IF System

FEATURES:

RCA·CA3068 is a monolithic integrated circuit that in·
corporates an entire video TV-IF subsystem on a single chip.
Innovations in integrated circuit design, in addition to the
many active devices and closely matched components utilized in the circuit, make the CA3068 ideally suited for use

noise immunity and minimal airplane flutter. An isolated
zener reference diode. incorporated in the IC. provides a
convenient and economical means for controlling the regu·
lated voltage supply. The inherent wide bandwidth capability

in color and black-and-white TV receivers.

suitable for other AM IF applications whose frequencies
range within this bandwidth.

The

~imarv

functions performed by the I F subsystem are

video IF amplification. linear detection. video output amplification, AGe from a keyed supply. AGe delay for tuner.
sound carrier detection, sound carrier amplification. and a
buffered AFT output. The advanced circuit design of the
CA3068 also includes secondary functions for improved

High.gain wide-band I F amplifier: 75 dB typo at 45 MHz
• Gain reduction with excell.nt stability: 50 dB typo at 46 MHz
• Video detector with linear characteristic.
• Vi~ amplifier: 12 dB gain

•

•
•

Impuhe noise limiter
Keyed AGe with noise immunity circuits

• Dolayod AGe for tuner
• 8ufferod AFT output
• Sepal'llta sound IF interclrri.
amplification
• Sound Clmer detector
• 4.5 MHz sound carrier amplifier

110·70 MHz) and high overallgoin IB7 dB) make the CA306B

The CA3068 utilizes a unique 2O·lead quad·in·line plastic
package. This package also includes a wrap·around shield
that serves to minimize intertead capacitances.

• Isolated zen. ret.encediode for
ngulatod voltago.upply
• See ICAN-6303. or. Si..... IC lor

tho Complete PIX·I F Systam In

TV Raeeivers" for Schematic Diagram

MAXIMUM RATINGS, Absolute Maximum VoIUBI. at TA - 2ft'C
DC Supply Voltage:
Between Terminals 15 and 6- ................................•.....................
Terminal 7 (Collector to ground) •...................................................
Terminal 9 tColiector to ground) ....................................... .
DC Current (into Terminal 18) ••••.....•............•..........•.••..................

11.3
20
20
2

mA

Device Dissipation:
~to~-~C ................................................. .

600

mW

AboveTA-60·C ••••.•..•••................••.........•.•....•.....

V

V
V

derate linearly 6.7 mWfC

Ambient Temperature Range:
Operating ........................................................ .
Storage .............................. .
Lead Temperature (During soldering):
At distance not less than 1/32" (0.79 mm) from case for 10 seconds max.

-40 to +85
- 65 to +150

·C

+265

·C

·C

- Thil rating does not apply when using the internal zener reference in
conjunction with tklt pau transistor.

kEYING

~'"

HI-50 IUlPOTENTIOMETER
L.I"Z.Z,.H'ADJUST Mo. OF TUltNS FOR ALIGNMENT
LZ"1,5 ,.H'AO.,lUST No- OF TURNS FOR ALIGNMENT
C .. I pF: AO.,lUST FOR PROPER AUGJlMENT
AlL RESISTANCE VALUES ARE IN OHMS
UNLESS OTHERWISE INJ)ICATEO. ALL CAPACITANCE VALUES;
LESS THAN 1.0 ARE IN MICROFARADS
1.0 OR GREATER ARE IN PICOFARAOS

Fig. ,. Functiomlblod< diagram of"," CA3068.

(a) Test lfltup for meastlnNTUlflt of video sensitivity. sync. tip ItlWII. delay bias. AFT drive

volta,..

'0

_'~""1r'0
,.
1.-.0...-1
,
ALL REStSTAHCE VALUES ARE IN OHMS

./1.

I-AD.tUST LEVEL "a"1OGIV£
ATTEMJATION OF IIfXER

2-

"b" 10 THAT

4:~I'i!?,o
WlWIFO....

(b) Tsst 6Btup for mBiIIuremlllt of BOund and chroma outpUtI.

Fig.

2 -

T... circuit for ""*"'IrtlmlJllt of white lelfli IV,g) and terminlll2 001_ IV2).

Fig.

3 -

TypiCBI dynamic hilt circuit dillfll'lllnS.

_________________________________________________________________ M3

CA3070, CA3071, CA3072 Types
Television Chroma System
The RCA CA3070. CA3071. and CAJ072 ar. monolithic

silicon in_ated circuits that constitute a complete chroma
system for color television receivws. The CA3070 is 8
complete subcarrier regeneration system featuring a new
concept of phase controlappliaj to the oscillator circuit. The
CA3071 is a chroma ampUfHr system and the CA3072

SYSTEM FEATURES
~

parforms the demodulation function.

• Vo~ Controlled Oscillator
• Koyad APC. A c e _

The CA3070 utilizes the 16-1..t plastic dual.in-line package;
the CAJ071 and CAJ072 •• supplild 14:leod plastic
dual-in-line packages.

• DC Hue Control
• _
Regulator
CAJ071

• Ace Contra". Chrome Amplifier

CA3070
Chroma Signa. Proc.ssor

• DC Chrome Goin Control

.•.,....,,"

• Color Klier

• Amplifi. -.·Clrcult_on

CA3072
• Synchronou, D _ with Col.. D _ Matrix

p-.

The CA3070 Is a oom.... ,,-,,1. _ation _
willi automatic phno oontrol applied to ilia _illator. N1
amplilled c:IIrorna ....1 from ilia CAJ071 i, appIlld to
IIrminals No. 13 and No. 14. which .-.1111 autometie phno
oontrol lApel and ilia automatic chroma oontrol (Acel in·
puts. APC and Ace _ . . . I, keyed by the horizontal
pulso which also Inhibits ilia _1I1ator output amplifier
during the bunt interval.
The Ace _
UIII a syn\:hronOUI _
... to _lop a

• Emlttar·Fol_ Output Amplifiers willi Short-Circuit

COfI'ection ""~ at tho dlfforenti.1 output IIrminli Nos. 15
• 16. This oontrollipl i, epplled to tho Input IIrmlnll NOI.
1 • 14 of tho CAJ071. The Ape _
eioo .... e synchronous detector. The Ape error ...~ is InWnaI'y coupled to
tho 3.66 MHz oscillator at balance; tho pi.- 01 ilia ,ipl.t
!arminll No. 13 I, In quadratura willi ilia _1I1ator.
To acoompllsh phasing "-Iremants. In RC phno shift
network is ulld t:.etw.. the chroma Input a'td terminll NOI.
13 and 14. The _
loop 01 tho oscillator Is from
IIrm.inll Nos. 7 and 8 back to No.8. The some ocillator
signal is available at terminal No.. 7 and 8. bUt the de output
01 the Ape d _ controls tho relative slgnel 1_ It
_minll Nos. 7 or 8. BeceUil the output at terminal No.8
is shlftod In phase comporod to ilia output It _mlnel No.7.
which is Ippilld directly to tho crystal circuit, control of ilia
_
amplltud. It tarmlf1l\l Nos. 7 and 8 ai_ilia phase
In ilia _back loop. thereby chenging tho frequency 01 tho
crystal oscill'tor. 8alenca Idlu_ts of dc . - ere
provided to _blilh an Initial no·lignal offIet oontrol in 1111
Ace output. and a no-sl...... on·frequency I d l u _
through tho Ape dltlCtor..mpllll. circuit which controls
the _iIIator frequency. The _lIIator output stage is
d_tlllly _1I1d at IIrminei No,. 2 and 3 by tho hue
control Input to tarmlnal No.1. The hue pi.- shift i,
IOOOmpli_ by 1110 ...tarnal R. L. Ind C componants _
couple tho oscillator output to the demodulator Input
tarminals. TheCA3070includ.,
regulator to _blish
a 12"'1Olt de supply.
.

I
I

L_~ ______

I
I

-cS'a;1>-~

FIll- , - Simp/1fIIId bIocIc d;.,.m of TV chrome_.

13

12

II

"'unt

-..

Mlxlmum Vo..... and Current Ratings at TA - +25°C
Voitaga'"
T_minll

No.

Min.
Volts

VollS

Current
Terminal

No.

11
mA

10
mA

1
2

0
0

+16

1
2

3

0

+16

3

-

4

-5

N2

4

20

6

-

10

N3

-

-

1

11

8

-

-

12

-

-

10

0

N3

13

20

1

11

0

Nl

14

20

1

12

0

Nl

13

0

Nl

14

0

Nl

15

0

+16

16

0

+16

7

20

-

1

-

1

• With respect to terminal
No.6 and with _mina'
No. 10 connectod IIIrough
4700 to +24 V.
Nl Regulatod voltage It tarmi
nol No. 10.
N2 Controilld by mex. ,nput

ALU'£SI'TANC£ YALUfI AilE: INOHMS

current
N3.limited by dissipation.

Fig. 2 -

_tic dlllll''''' CAJ070.

-----------------------------------------------------~

CA3070, CA3071, CA3072 Types
CA3071 Chroma Amplifier
The CA3071 is a combined two-stage chroma amplifier and
functional control circuit. The input signal is received from
the video amplifier and applied to terminal No. 2 of the
input amplifier stage. The first amplifier stage is part of the
ACe system and is controlled by differential adjustment
from the Ace input terminal Nos. 1 and 14. The output of
the 1st amplifier is directed to terminal No.6 from where
the signal may be applied to the Ace detection system of

the CA3070 or an equivalent circuit. The output at terminal
No.6 is also applied to terminal No.7 which is the input to
the 2nd amplifier stage. Another output of the 1st amplifier
at terminal No. 13 is directed to the killer adjustment circuit.

MAXIMUM RATINGS, AbsoIuiw Mllximum· VsI_ at TA ~ 21f'C

The de voltage level at terminal No. 13 rises as the ACe

DC Supply Voltage ( I erminal 8

differential voltage decreases with a reduction in the burst
amplitude. At a pre-set condition determined by the killer
adjustment resistor the killer circuit is activated and cau_
the 2nd chroma amplifier stage to be cut off. The 2nd
chroma amplifier stage is also gain controlled by the
adjustment of de voltage at terminal No. 10. The output of
the 2nd chroma amplifier stage is available at terminal No.9.
The typical output termination circuit that is shown.
provides differential chroma drive signal to the demodulator
circuit. Both amplifier outputs utiliz. eminer·followers with
short-circuit protection.

.~

to Terminal 4)
Device Dissipation:

UptoTA=+70°C ................ 530
mW
Above TA '" +70°C .... Derate Linearly at 6.7 mWfC
Ambient Temperature Range:

Operating

.:..............

Storage ,............. . . . . .

'e

-40'0+86

°c

-65 to +150

Lead Temperature (During Soldering):
At distance 1/32 in (3.17 mm)
from seating plane for 10. mBX. • • • • ••

°e

+265

Maximum Vol.... Ind Current Rltin. . . TA • +25°C
Current
V.....•

'"

3.711:

3.ltII

voe

30

T....I...
No.

"

II
mA

10

mA

Terml'"
No.

MIN

MAX

VOLTS

VOLTS

1

6

1.0

1

-5

+16

2

6

1.0

2

-6

3
6

10
1.0

10
20

3
6

0
0

+5
+2
+24

7

-5

8

0

+30

5

9

0

+24

1.0

10

0

+24

• With reference to
terminal No.4 and
with +24 V on terminal
No. 8 except for the
rating given for terminal
No.8.

11

0

+24

12

0

+20

13

0

+20

14

-6

+16

1.0

7

6

9

1.0

20

12

1.0

14

5

+5

"

,
ALLft[SIITAtIC[YAI..UESAR[UliOItMS

Fig. 6 -Schemtltic diogram for CA3On.

Voltage,
Bin Relerence T... mlnal
Ampl No I Cltroma

I~OUI

Ampl No I Ouoma
OulpulBalanced
Unbalanced
Ampl NO 2 Chro~
Input
Ampl No 2 Chroma

~t
Dy... mlcCh ...acII1'IMIC.

V"

Sl Open. S20pen

173

V2

S, 0 pen,52()p1f1

17.

V,

51 Open. 52 Open

V,

51 Open, 52 Closed

V,
V.

+14'1

"'6
17

24.5

31

"
30mVRM5 M. .su •• 116

Amplifier NO.1 Vall. G,1n

AVI

E,

Amphloirr No.2 Volt.
Glln

AV2

V, . I 0 V IRMS! M.,s"".117

14

,.

dB

Vollage

·9

VS-V,O

Output Voltlge. 1(,II,r 011
·9
Output Volt.,., Chroma Olf
Bandwidth
Amplihl1' No.1
Amph" ... No 2
Ampl.No I!IIpur
lmpadarIC'

·9

OW

Eg • 50 mVRMS. ad!un Chroma
Glln Control to Change vg to
10% of Mallimum Chroma
Oulput
SI,nPoslhon2
I:g . 50 mVRMS, ildiust "I(,lIer
AdJU$I" 'or an abruptdecrea.e
inVg

2.1

3 .•

..•

vRMS

B

Eg • 50 mVRMS. ad!U$1 Ch.oma
conuol to min Chroma Oulput

12
12

mv
"MS
MM,

30

<,'

pF

Amp!. No 2111pul
Impedance

<,2

Amp!. No 2 Output
Impedance

'0 2

'i2

'Of

RMS

k!!

'0'

11

mV

12

,,'

Ampl. No 1 OutP1.I1
Impadance

B

dB

Malt Chrol"lUl Outpul

10'!1. Chroma Gain ContrOl
Reference Voltage

Fig. 7 - Static chNBcttlristics rest circuit-CA3071.

I.'

5,0Dl!f1.S20~

5, CloMd, S2 Open
5, Open. 52 Open

7

'"

13'

85

!!

21

k!!

35

p<

.

II

9, 10
I.

B

SWITCH II IN POSITION I UNLISS OTHlRWt. NOTE:O
IN TA8L£ OF OTNAlilIC CHMACTE:"ISTtCS

2. CHROMA OAIN CONTftOL SIT TO GROUNO UNLESS OTHERWISE
NOTE:O !N TAILE OF DYNAMIC CHA"ACTERiSTICS
3. ALL REI/STANCES IN OHMS

Fig. 8 - Dynamic characteristics circuit..cA3071.

____________________________________________________________

~7

CA3070, CA3071, CA3072 Types

Fig. 14· - OynMnic clwKterl,r;CI fftt circuit for CA3072.

Application Inforlllation
TYPICAL APPLICATION CIRCUIT FOR THE CHROMA
SYSTEM
The circuit of F;'.15 i is I compl... signli proceaing system
lor color TV. The RCA ty.... CA3010. CA3011 and CA3012
monolithic integrltld circuits .... respectively used IS the
subcarriw ragenerltor. chroml Implifier. and chroml
demodulator.
The input to the system is the chrOml signal which may be
liken from the first or second video . .
il coupt.:l into
tho CA3071 chromo ampliliw th..,..., a ~ filter. The
outputs from the system .e the color ditt.ence sigMls
which ... intended to drive high .." amplifiers. luminance
mixing may' be external to the picture tube 011. the difference
signals may be Implified lAd _lied to the picture tube ..id
or cathode. where they . . internally mbced with the
luminence signal.
Othw Input require....... to tho system in tho _
..ppty
...... of +24 volts and tho horizontal koylng pu". The
_
.,ppty vo. . . Ihould be maintained within %3 vol..
of the _moncIad value of +24 ....... The total cumnt I ...
tho systwm Is _xlmotaly 70 mililampom. The horl_1
keyi,. pu" Input to tho su_l. ' - " " ' " Is Ipproxl·
motoIy +4 volts pook and _ _ on tho burst IS _
It

CA3070 Clrcult~
The CA3070 circuit IS mown In Fig. 2, consists of on
_il....... au_Ie pheR control (APeI _
••u....
_Ie chroma control (ACCI _ . 1IIb111 00011......
output ompIiI;' and. tI1unt 'lIul_. The "unt ..... iator
tho - - , bios liability lor tho 3.5795oC5 MHz
000I11at..........1 as tho bias to ali lunotlans 01 tho CA3070
circuit. The ....1otIon vo. . . is nomlnlily +12 volts ..
moosured It tlrmlnal No. 10.
The APC end Ace - . we synchronous - .
which we keyed by tho horizontal Input pul•. This lorm 01
_ion oIim_ tho need for • burst _ _ as

pray_

~n

_L

Indlvicluallmpllflw ...... _
a pooIti. . pul. is ~t It
tlrminll No.4. tho olCiliator output is cutoff and th.
_II ...... drive s.... is diverted to th. APe and ACC
RelerTl,. to Fig. 2, th. APC d _ (Og • 0101
and tho Ace _
(Os. 0eI'" amlttllr driven from tho

=,=,.~:::=iRo.

Tt

=~vi=-~~r~~~.10

Lo n

.• I'"-_·SO

......n"MClIhI,UO_ .. _
LtIt_u
_
_..u.gpMCt'_.1LIIII1
_
.....
" . _ . . ....
. __
, •.

....

11_ . . .' . _ _ - -

~,

..""

........t,..

n

. .mlnel NOI. 13 end 14 01 tho CA3070. The pu . . width
Ihould be mlintlined H clote II poIIible to the recommended wlue of 4.5 mil:rosKonch.

TI

F;'. '5 - Typicol ellrom. ._

fo, colM·TV _ _ utillzln, RCA.cAJ070. CAJOn. and CA3072.

oscillitor transistor (017). when the oscillator output ampll·
fl. transistors (02" 031 we cutoff. Tho chroma signal is
applied to twminll Nos. 13 and 14. There is o.:illator
current drive to tho APC and Ace d - . du,l,. tho
keying inttrwl; bunt separltion is effectivtly accomplished
by tho lilting action 01 Iha detectors. A lurther advan_ 01
the keying ICtton is the high lIin mlde po_lble as IIWJIt of
the low lver. current flow of the APC Ind ACe detectors.
High resistor vatues of 82 kUohms at the detector output
_mml, provide proP« detector bias consistent with the
duty loctor 01 the keying pu". Fo, a
keying pu... it
is ~ thIt smell.. values of detector ktId resistors be

w_

-.

In the abMnc:e of the keying pulse (line period). the resistor,
R20. biases the oscillltor's output Impfifier trlnsistors 102 a
031 on by keep;,. their omi_s It a higher po",ntial then
bi.
of
ag. and 010. Tho 3.58
tho _
MHz ..... is now ~t at terminal Nos. 2 • 3.
Photo(Japhs of OICillOJCOPil traces for one line period at the
twminel Nos. " 2. a'MI 3 1ft shown in Fig.1&. The effect of
tho keying pul. is mown in FIg.16a. Ind th. cutoff 01 tho
_il...... output .mplHiar I, mown in FIg.16( b) and 16c.

voI,- as. as.

The _II...... _on 01 Iha CA3070 consist. of the loop
formed by 018 end the omlttllr driven dillerantill pai,. 013
• 014. The signal output from tlrminal NOI. 7 • 8 is
coupled through the _its tuned cryltll circuit beck through
...mlnal No.6 to Q1B. 011. The coMector of 011 d,1ves
tho _II...... output ImplH;' and tho APC • ACC do·
011 il amlttllr coupiad to transistor 018. The
000111..... froquoncy and Aha. control is Iccompli_ by

_..-L

the different'" drive from the APe detector to transistors
012 • 015 which controllha balance 01 013 & 0,4. The
resulting ptw. of the feedback loop is determined by the

relltive amplitudes of the oscillator output signal at terminal
Nos. 7 and 8. The 66 pF capacitor between tanninal No.7
end 8 provides the ph. . Ihifting component .as the balance

of 013 and 014 is varied. In this way the APC detector
controls the crystal frequency at which the phase shift is
cancelled in tho leedback loop.
The controls for the CA3070 IU~_ regenerator circuit
are the APC hllance. the ACC balance. and the hue control.
The hue control is I de bllWIce adjustment of the olCillator
output Impllfi.. transistors Cl2 It Q3. A phase delay network
between the output terminals Nos. 2 8t 3 datermin.. the
range of the hue control. which for the value shown in Fig.
15. is Ipprc»eimately 9d'.
The ACC adjustment sets the initial balance of the ACe drive
to the input of the CA3071 in Fig. 15 (t«minal Nos. 1 and
14 of the CA,3071). The APC is a frequency adjustment of
the oscillator through the balance control of the APe
detector.

AJ a setup adiustment. for both the ACC and APC, switch S1
is or-ned and S2 is closed. The chroma input to the system is
removed and the de voltage at terminal No.6 of the CA3071
Is nobill. The switch S2 is then ~ and the Ace ad)u_
to set the voltage at terminal No.6 to that previously noted.
Alternatively. the differential de voltage at terminal Nos. 15
• 16 of the CA3070 may be sot to 0 mV (%2 mVI whon 51
.,d 82 are or-no Ind the CA3071 is removed· from the
circuit .

•••
Fig. 16(a) - CA3070 ..",ino! No. ,
7.5 V
"flit'" off'" pu/Ie.

ooc/'' tor

Fig. 16(bi-CA3070 ..,mlnol No. 2. 3.5 Vp.p O/ICiII.""
output; OIHI horizon"" lina. (flitted off during bum).

_";"'0'

Fig. 16(ei· CAJ070 ."",ino! No.3. 2.0 Vp-p
output; "',. horizontJI' lina, (gated off during bum).

_______________________________________________________________ M9

CA3070, CA3071, CA3072 Types

Fig.

21 (a) • CA3072 . terminal No.3 or 4. chroma input

s;gnilt.220 mVp_p.one horizonralline

Fig. 21(bi- CA3072· ,erminal No.6 or 7. reierence
subcarrier 1.2Vp 'p' one horizontal line

Fig. 21(d) , CA3072· 'erminsl No. 11,5.2 vp-p R.You'pu"
one horizont.1 Nne

Fig. 21(c) • CA3072 terminal No. 13,4.8 vp-p 8.youtpU~
one horizoritalline

Fig. 21(e) • CA3072· terminal No.9, 1.2 vp.p G·Y outpUt,
one horizont.lline

___________________________________________________________________ 351

CA3088E
TYPICAL ELECTRICAL CHARACTERISTICS

CHARACTERISTIC

TEST CONDITIONS
TA-:ZSOC

TYPICAL
VALUES

UNITS

0.7
1.4
5.6
0
3.5

V
V
V
V
V

0.35
1.0
20
0
1.2

mA
mA
mA
mA
mA

4
4
4

75
30
0.2

mVRMS

Stgnal-to-Noise Ratio (SIN I = 20dB

2
4

200
100

pV/m

JO% Modulation

4

1.0

"

3500
2000

n
n

12
17

pF
pF

1.5
1.5

pF
pF

SYMBOL

V+-1ZV

TEST
CIRCUIT

FIG. NO.
SInk: (DC) C..,...illics

OCV<>,-:
Terms. 1,4.9. 11
TermL2,7,8
Term. 10
Term.f2

T.. m.15
OCC""""':
Tarm.3
Term.S

Vt. 4,9.11
V2.7.S
V,O
V,2
V,5

1

13
IS
110
1,3
1,6

T.m.l0
Term. 13

Term. 16

1

Dynamic Characteristics

DetactorOutput
Audio Amplifier Gain

AAF

Audio Distortion
Sensitivity:

30% Modulatton
f= 1 kHz
VOUT '" l(X)mV
'IN = 1 MHz

At Converter Stage Input
At R F Stage Input

Total Harmonic Olstonion

THO

Input Resistance:

RI

At Transistor 01
At Transistor 05
Input Capacitance:

NoAGC.
Input signa' frequency

"INI-l MHz

pV/m

CFS

At Transistor 01
At Transistor

"

CI

At Transistor 01
At Transistor 05
Feedbec:k Capeeitance:

dS

as

The tyPical characteriSttcs for the CA3088E are Intended for Cjuidanca purposes In evaluating thtS devICe for ~Ulpment deugn.

v· ••!!v

Q. RC"·40841 I DUAL GATE'PROTECTEO lIIos/rEn

ALL RiESISTAfrIC[ VALUES .HE IN OHIIIS
ALL CAPACIr"NCE VALUES ARE INIoIICRo'aRAOS

Fig.4- Typical AM broadcast receiver using the CA3088E with optional RF amplifier stage.

353

CA3089E
MAxiMUM 'RAt'NGS~ Absolute Maximum Values, at TA

= 2!P C

DC Supply Voltage:
Between Terminals 11 and 4
Between Terminals 11 and 14.
DC Current (out of Terminal 15)
Device Dissipation:
Up to TA = 600 C
Above TA •

v

16
16

V

rnA
600

eo<>c

rnW

derate linearly 6.7 mWPC

AmbientTempe:rature Range:
Operating .
Storage
Lead Temperature (During Soldering):
At distance not less than 1/32" (0.79mm) fl1Jfn case for 10 secQnds max.

-55to+125
·65 to +150
+265

ALL RESISTANCE VALUES ARE IN OHMS
*L TUNES WITI-lIOOpF(C) AT 10,7 MHr
00(UNLOAOEO)_15

WI

AUTOMATIC MFe DIV EX22141 OR EOUIVALENT)

Fig. 3- Test circuit for CA3089E using a single-tuned detector
coil

.•.

·c·

ALL RESISTANCE V"LUES ARE IN OHMS
"T: PRL -Qo(UNLOAOEOHr 15(TUNES WITH 100 pf (CI) 201 Of 34. ON 7132" OIA FORM
SEC -Oo(UNlOAOEO!;r7~(TUNES WITH IOOpF(C2) 201 OF 3'1. ON 7/32"01A FORM
~Q(PER CENT OF CRITICAL COUPLING) AI 10 %
(ADJUSTED FOR COIL VOLTAGE 'Ie )-150 mV

MUTE
CONTROL

ABOVE VALUES PERMIT PROPER OPERATION OF MUTE ISQUELCH) CiRCUIT
"E" TYPE SLUGS,SPACING 4mm

FigA· Test circuit for CA3089E using a double-tuned detector
coil.

m

OUTPUT

AFC AMPL IF IER

IFRAME

.,.

100
IX
INPUT SIGNAL-I'V

ALL RESISTANCE VALUES ARE IN OHMS
ALL CAPACTANCE VALUES ME IN PICOFARAOS

Fig. 5-Muting sction, tlCCer AGC, and tuning meter output as a
function of input signal voltage.

Fig.2·Schematic diagram of 'the CA3089E.

________________________________________________________

----------~5

CA3090AQ
Features:

Stereo Multiplex Decoder
For FM Stereo Multiplex Systems
RCA·CA3090AQ . a monolithic silicon integrated circuit, is a
stereo multiplex decoder intended for FM mUltiplex systems.

The CA3090AQ is the successor to the CA3090Q; it offers
three major advantages over the CA3090a ~s follows:
1. Can directly drive a stereo indicator lamp with a current
drain of up to 100 rnA.
2. Stereo Defeat/Enable control:voltage specifications.
3, Capable of operation with lower distortion.

This stereo multiplex decoder requires only one low-inductance
tuning coil (requires only one adjustment for complete
alignment). provides automatic stereo switching, energizes a
stereo indicator lamp, and operates from a wide range of
voltage suppl ies.

Figure 1 shows the 'block diagram for the CA3090AO. The
input signal from the detector is amplified by a lowdistortion preamplifier and simultaneously applied to both
the 19·kHz and 38-kHz synchronous detectors. A 76·kHz
signal, generated by a local voltage-controlled oscillator
(VCo), is counted down by two frequency dividers to a
38-kHz signal and to two 19-kHz signals in phase quadrature.

voltage controlled oscillator (VCQ) so that it produces
an output signal to phase-lock the stereo decoder with the
pilot tone. A second synchronous detector compares the
locally generated 19-kHz signal with the 19-kHz pilot tone. If
the pilot tone exceeds an externally adjustable threshold
voltage, a Schmitt trigger circuit is energized. The signal from
the Schmitt trigger lights the stereo indicator, enables the
38-kHz synchronous detector, and automatically switches
the CA3090AO from monaural to stereo operation. The
output signal from the 38-kHz detector and the composite
signal from the preamplifier are applied to a matrixing circuit
from which emerge the resultant left and right channel audio
signals. These signals are applied to their respective left and
fight post amplifiers for amplification to a level sufficient to
drive most audio amplifiers.
The CA3090AO may be used without the stereo defeat/enable
function (see Fig. 6) if a control voltage for this function is not
readily available. In this case, Terminal 4 should be grounded.
The CA3090AO utilizes the 16·lead quad·in·line plastic package and operates over the ambient temperature range of
-SSoC to +125°C.

The 19-kHz pilot-tone supplied by the FM detector is
compared to the locally generated 19-kHz signal in a
synchronous detector. The resultant signal controls the

•
•
•
•
•
•
•
•
•
•
•
•

Requires the use of onlv one low-inductance tuning coil
Automatic stereo switching
Directly drives a stereo indicator lamp up to 100 mA
Includes driver for stereo-lamp indicator
Operates from a wide range of power supplies: 10 to 16 volts
Requires only one adjustment for alignment
Switching from monaural to stereo and stereo to monaural
produces no audible thumps
Low distortion: under G.22%(typ.)
Separate dc input permits stereo defeat or enable
High signal output: directly drives audio amplifiers
Excellent SCA (storecalt) rejection: 55 dB typo
High audio channel separation: 40 dB typo

MAXIMUM RATINGS, Ab6o!u,...MBxlmum Va'u. at TA - 2fiOc
DCSUPPLVVOLTAGE • • • • • •
16V
CURRENT AT TERM. 12 • __ • • .
• . • 100mA
INPUT SIGNAL VOLTAGE (COMPOSITE)_ . . 400 mV
AMBIENT TEMPERATURE RANGE:
Operating . _ _ _ . • _ • _ •
-56 to +12sOC
Storage. . _ • . . . . • • • .
-86 to +1 soOc
LEAD TEMPERATUAE (DURING SOLDEAING):
At distance not less than 1/32" 10.79 mm)
from case for 10 s max. . • • _ • • . . . _ • +2660 C

• For ltereo operation, a minimum Input signal vol. . (compotite) of
40 mV il required

".

to ...'IS,lES'"UL
,8. snREOh ... u S'~""L
,C, s"O£Or.o.l,"Gs.GN"L
LD,O,HERE"CEsLGUL

L "Y.'OO"', ... ~

t,.C, .. AOV'OE .... ATI.LCE_E .. ""AS'S

Sf~":.\"c."rUf

FIg.' -Functional block di•

• HiS'''~Cl .... luES ... E '~OM"S

.", of the CA309OAO•

Fig.2 - rast circuit for DC characteristics.

:::: ::::J,;.j.

:~~~ ~~~:~
.....•..

~

t

...
....... - ....,
:::: ;::. +T~~ .
.~~

~~~

~.

••• -

.- ..... T

COLLECTOR-TO-EMITTER VOLTAGE IVCEI-V

Fig. 3 - IndicatorlampcheractBristics (lCw. VCE)-

V4 > 1.6\1 TO ACTIVATE STEREO
V4< 0.9 V TO DEACTIVATE ST£AEO

Fig. 4 - Test circuit for use with stereo cklfBat/enabie.

Fig. 5 - rest circuit for usa without .tereo dtlftMt!eTlllbl••

_____________________________________________________________________ 357

CA3120E, CA3142E

TV Signal Processors
(uJungle" Circuits)
For Color and Monochrome Receivers
The RCA-CA3120E and CA3142E are monolithic silicon integrated circuit TV signal
processors for use in color or monochrome
receivers_ These circuits provide low-impedance video output signals, stripped synchronization signals in both polarities, and AGC
output signals for IF (reversel and tuner
(forward andlor reverseL
The circuit designs of the CA3120E and
CA3142E feature impulse noise inversion,
delay techniques to reduce the deleterious
effects of impulse noise in the receiver AGC
and sync circuits. In addition, they incorporate standard AGC strobing techniques.
The AGC noise lockout circuit is deleted in
the CA3142E.

Fig. 1 - Simplified block disgram of the CA3120E end CA3142E.

MAXIMUM RATINGS, Absolute-Maximum Values at TA = 250 C

These devices are supplied in the 16-lead dualin-line plastic package.

DEVICE DISSIPATION:

Features:
_
_
-

30V

DC SUPPLY VOLTAGE

750mW

Up to T A = 55°C .

Internal impulse noise processing
Sync separator - low impedance,
dual polarity
Strobed AGC system
- IF AGC output
Delayed outputs for forward or
reverse AGC tuners
Automatic noise threshold and
AGC detector level control
High-impedance video input
Low-impedance video output
Choice of external time constants
for sync separator
Negative power supply not required
R F AGC delay externally controlled

Above T A ::: 5SoC .

Derate linearly at 7.9

mWf'C

AMBIENT TEMPERATURE RANGE:
Operating

-40 to +85 °c

.

Storage.
LEAD TEMPERATURE (During soldering):

~5to+l50oC

At a distance not less than 1/32" (0.79 mml
from case for 10 seconds max. .

+265 0 C
v'

NOISE (ANCELL.EO·
VIDEO OUTPUT

SYNC-

STAIPP[ItIN

...

".

.n

""

CAll20E
OR
CA3142E
BOTTOM VIEW

24V

RESISTANCE VALUES
ARE IN OHMS

Fig.2- Test circuit for measuring tJlectrical ChllfSCteri.tiCli of the CA3120E snd CA3142E.
Refer to Fitp. 7 and 8 for switch .lector

positions.

I\.

LOWZ

..; , VIO£O
OUT'UT

*

GROUNO

IiIUISTAN(:£ V"'LUU Aft£ IN OttMS
INCLUDEO IN C""120f; ONLY

OIEL..."IOMC

:cr.="

Fig.3 - Schematic diagram of the CA3120E snd CA3142E.

__________________________________________________________________ 359

CA3120E, CA3142E
TEST CONDITIONS
CHARAC·
TERISTIC

SWITCH !\lUMBERS

t!21314151819111112113[ 14it5it6111it8it9120

TERMINAL
MEASURED

SWITCH POSITION

2 6 79 14
8
19

IT24

2 3

1 2 1 2

3

1

1

3

2

1

2

2

2

1

5

VTH

2 1 2 1 1 4

3

4

4

3

1

2

2

2

2

1

3

V5

2 1 2 1 1 4

3

4

4

3

1

2

2

2

2

2

3

VTH(SEP)

3 1 2 1
1 •
3 1 2 4 2 1

3

3

4

1

1

2

1

2

2

2

1

*

14(OFF)

1

1

1

1

1

2

1

2

2

1

1

14

V2L

1 2 2 3 2 1

1

1

1

1

1

2

1

1

2

1

1

V17

V2H

3 3

1 1 2 1

1

1

1

1

1

2

1

1

2

1

1

V17

V3L

3 3

1 1 2 1

1

1

1

1

1

2

1

2

1

1

1

V18

V3H

3 3

1 3 2 1

1

1

1

1

1

2

1

2

1

1

1

V18

111(CH)

2 1 2 5 2 1

1

5

4

3

1

2

2

2

2

1

5

111

1 2

3

6

4

3

1

2

2

2

2

1

5

111

111(LEAK) 2 1 2 5 2 1

1

6

4

3

2

2

1

2

2

1

5

111

Vll

2 1 2 5 1 2

3

2

3

3

1

2

2

2

2

1

5

Vll

V12

3 1 2 5 2 1

1

3

4

3

1

2

1

2

2

1

5

V12

VI3(LOW)

3 1 2 5 2 2

3

1

1

2

1

2

1

2

2

1

2

V13

VI3(HIGH) 3 1 2 5 2 2 3

7

4

3

2

1

1

2

2

1

4

V20
114

111 (DISCH) 2 1 2 5

114(OFF)

3 1 2 5 2 2

3

3

4

3

3

1

1

2

2

1

5

114(ON)

3 1 2 5 2 2

3

8

4

3

3

1

1

2

2

1

5

114

115(OFF)

3 1 2 5 2 2

3

3

4

3

2

3

1

2

2

1

5

115

115(ON)

3 1 2 5 2 2 3

8

4

3

2

3

1

2

2

1

5

115

•

O----OI,V

1~.V

~ ,:.22!.Fl:

-.;;:,:;r-v

SW
/I'

15~

1

-=-

@]

'--l~""""''''

t

6V

~:.
"'F~'
....

0-}J---oov
sw

2

0

IJ

1

....

w
~o
~
"A.

"

Z

1

CAUTION: Remove power before selecting or adjusting switches.

* Reduce voltage at TerminalS until V19 decreases. VTH(SEPI '" VTH - VaNOTE: Switch numbers In italics correspond to numbers In square boxes In Figs. 2 and 8.
~02
~.-~

Fig.1 - Telt condition values for auoei.ted switches' through 20 (switches 6~ 7, and 10 are omitted).
Refer to Figs.. 2 snd B for test circuit and test-condition selector-switch arrllnllflments.

MEASURE VOLTAGE

~02

~

~

IS!L-.!-~

MEASURE VOLTAGE
MEASURE \IOL TAGE:

~I

o· •
~ 2~
- L!.J

0-----0 II[ASURE YOLTAGE

~~

I

~24Y
10

on

tieL-II •••••

NOTE: The 11IIIIdZ1ld numbers in the _
110_ ""'"
to the 17 switches (switches., 7, encIl0 . .
omItuclI of the test cir...lt end carreopand to
th ... gi_ in FIIII;2 ~nd 7.

_t

CAUTION: Rem.... . . - r before ..Iectlno '" -.11_·
inglWitch..
fII["'I$TANCI IIALUES
.... E IN OHMS

F/fI.B - Tilt CDndlritm
~

U4V

Fig.9 - TyplCIIlsppliClltion using the CA3720E and CA3742E.

""trw

-rillf'"

IWiIt:h
for
_ _,.,.i#It:I of'" CA372DE _ CA37GE.

(Figure 8 continued on the next page)

___________________________________________________________________ 361

CA3121G
Features:

TV Chroma Amplifierl
Demodulator

• Excellent linearity in dc chroma gain-control circuit
• Improved filtering resulting in reduced 7_2 MHz output
from the color demodulators
• Current limiting for short-circuit protection
• Good tolerance to B+ supply variations
• Good temperature coefficient stability
• Gold-CHIP for increased reliability

Provides Complete System for Processing Chroma
When Used with RCA-CA3070 or CA3170
uG" Suffix Type-Hermetic Gold-CHIP in
Dual-in-Line Plastic Package

RCA-CA3121G is a monolithic silicon integrated circuit chroma amplifier/demodulator
with ACC and killer control for color-TV
receivers. It is designed to function compatibly with the CA3070 or CA3170 in a
two-package chroma system. Figs. 5 and 6
show a functional block diagram and the
outboard circuitry of a typical two-package
chroma system incorporating the CA3121G
and CA3170, respectively.
The CA3121G is supplied in a 16-lead dualin-line plastic package with hermetic GoldCHIP (G suffix).

The transistor chips used in the hermetic
Gold-CH IP plastic packages are of the sealedjunction type designed to provide protection
against the deteriorating effects of humidity
and other surface contaminents without the
need for a hermetic package enclosure. The
semiconductor junctions are sealed by utilizing a silicon nitride passivation layer. A'
multilayered, highly corrosion-resistant, terminal-connection system of unique design
is employed.

:.. 2500

~

lzooo

~

•

~

1500
1000

.00

100

200

300

400

500

600

100

NTSC CHROMA INPUT SIGNALtTERM.21-mv p_p 9ztS-Z2687

Fig. 2 - .Tvpical ACC plot for the CA3121G when
used with the CA3010.

CIRCUIT OPERATION
MAXIMUM RATINGS, Absolute-Maximum Values at T A • 25°C

30V

Supply Voltage .
Device Dissipation:

up to TA = IS o C
Above T A = 55 0 C
Operating Temperature Range.
Storage Temperature Range

lW
derate lineerly 10.5 mW/oC
. -40 to +85 0 C
-65 to +150o C

Lead Temperature lOuring Soldering)

At distance 1/16" ±1/32" 11.59 ±o.79 mm) from case for 10 s max ..

Ace

INPUT

CHROMA
INPUT

I

I
I
I

I
I

.

I CA3121G
L ___ _

TO Ace

8:

APe DET.

3 --- 4

-f-

AMPLIFIED CHROMA

6 "'--.E:'

SU~CA:.'E.
INPUT

Fig. 1 - Functional block diagram of the CA3121G_

The CA3121G consists of three basic circuit
sections: (1) amplifier No.1, (2) amplifier
No.2, and (3) demodulator. Amplifier No.1
contains the circuitry for automatic chroma
control (ACC) and color-killer sensing. The
output of amplifier No.1 (Terminal 3) is
coupled to the Chroma Signal Processor
(CA3070, CA3170 or equivalent) for ACC
and automatic phase control (APC) operation
and to the input of amplifier No.2 (Terminal
4) containing the chroma gain control circuitry. The signal from the color-killer circuit in amplifier No.1 acts upon amplifier
No.2 to greatly reduce its gain.
The output from amplifier No.2 (Terminal
14) is applied, through a filtering network,
to the demodulator input (Terminal 13).
The demodulator also receives the R-V and
B-V demodulation subcarrier signals (Terminals 7 and B) from the oscillator output of
the Chroma Signal Processor. The R-V and
B-V demodulators and the matrix network
contained in the demodulator section of the
CA3121G reconstruct the G-V signal to
achieve the R-V, G-V, and B-V color difference signals. These high-level outputs signals
with low impedance outputs are suitable for
driving high-level R, G, and B output amplifiers. Internal capacitors are included on
each output to filter out unwanted harmonics. For additional operating information
and signal waveforms, refer to Television
Chroma System (utilizing RCA-CA3070,
CA3071 , CA3072), File No. 468.

________________________________________________________________ 363

CA3121G

R 40
12K
R3B
6.BK

R 41

11K

R43
4.7K

~

O'

I
I

"K

I

I

I
I
I

0'"

13K

Oil
2.4 Ie

AMPL

No.1

a

2.2 K

I

AMPL.
No.2
CHAOMA
GAIN
CONTROL

a

01.

ACC.

026

I

016

RIT

'40

I

I BIAS
I CIAI CUITA
I

023

RI8
1.2K

0.0

023
5.6K

R28
600

B-Y
DEMOo.

031

02.
300

030
300

6.8IC

A-Y
DEMOD.

R32
6.8 K

RESISTANCE VAL.UES ARE IN OHMS

Fig. 4 - Schematic diagram of the CA3121G.

v,

KILLER ADJ.

CA3070

I
CA~r70
L _____ ~___ 'Q

I

-

7

8

_____

.J

CHROMA

GAIN CONTROL

92CM-22731RI

Fig. 5 - Simplified functional diagram of a two-package TV chroma system utilizin9.
the CA3121 G and CA3070 or CA3170 .

______________________________________________________________

3~

CA3123E
AM Radio Receiver Subsystem

Features:
"'---'-I-_ _ _~.§~H""'-"'""X'ER

• Low-noise,low-Rb' rf stage in cascade connection-

Includes RF Amplifier, IF Amplifier, Mixer,
Oscillator, AGe Detector, and Voltage Regulator

eliminates Miller-Effect regeneration and allows con-

MIXER BYPASS

OUTPUT

13 AF OUTPUT

trolled power rise by the choice of external components

• Mixer..gscillator stage with internal feedback eliminates need for tapped or multl-windlng

The CA3123E· is a monolithic silicon integrated circuit
that provides an rf amplifier, if amplifier, mixer, oscillator,
AGe detector, and voltage regulator on a single chip. It is
intended for use in super-heterodyne AM radio receiver

OSCILLATOR TANK Z

IZ

RF INPUT

II

RF BYPASS

4

i-+_+"o"-,,'G,,,C CAPACITOR

oscillator coils
• Cascode if amplifier with controlled output impedance
8

and negligible Miller Effect -

SUBSTRATE AND
IF AMPL. GROUND

eliminates regeneration and selectivity skewing

applications particularly in automobiles. The CA3123E is
supplied in a 14·lead dual-in-line plastic package and operates
over the temperature range of -550 to 125°C.

• Frequency-counter AGe circuitT8I'minai assignment diagram.

allows control of AGe response by selection of the
coupling capacitor

• Formerly RCA Oev. No. TA6155

• Integral regulation with built-in surge protection
• Separately accessible amplifiers
MAXIMUM RATINGS, AbtOlute·Maximum Values:

DC SUPPLY VOLTAGE:
At Terminal No.3 (V+)
At Terminal No.6 OF Output)
At Terminal No. t3 (RF Output) .
At Terminal No. 14 (Mixer Output)
DC CURRENT:
Into Terminal No.3 (V+) .
DEVICE DISSIPATION:
UptQT A =5So C.

9V
40 V
20 V
20 V

<.

Above T A = 55 0 C..

ELECTRICAL CHARACTERISTICS at T A = 2SoC
CHARACTERISTIC

SYMBOL

TEST CONDITIONS

I
Min.

I

LIMITS
Typ.

I

Max.

I

UNITS

SUtic Characteristics In Circuit of Fill_ 3
DC Voltage:
At Terminals " 4

0.71

v
v
v
v
v
v
v
v

4.0

v

4.7

At Terminals 2, 3,14

6.8
0.25

At TerminalS
At Terminal 6

'2

At Terminal 7

0.76

At Terminals 8, 9
At Terminals 10, 11

0.71

At Terminal 12

V'2

At Terminal 13

1, ,1 4 ,1 5 ,1 7 ,

Into Terminals '. 4. 6.7

8 •.9,10.11.12

35 mA
750mW

. ........... derate linearlv 6.67 mW/oC

AMBIENT TEMPERATURE RANGE:
Operating.
Storage ...
LEAD TEMPERATURE (During Soldering):
At distance 1/16" ± 1/3"
(1.59 mm ± 0.79 mm)
from case for 10 s max.

-56 to +125 0 C
-65 to +15OCC

TYPICAL CHARACTERISTICS

mA

18.19,1'0,1".1'2

mA
mA
mA
mA
mA

'.2

Into Terminal 2

'5

Into Terminal 3
Into Terminal 6

'6

4.3
4.5

"4

0.170

Into Terminal 13
'nto Terminal 14

Performance Characteristics In Circuit of Fill_ 3
Input Signal to Dummv
Antenna at fIN"" MHz,

2.3

30% AM Modulation at

Sensitivity

f MOD =400 Hz, for 11

output at

o

~V

100

200

300

400

500

600

INPUT VOLTAGE ItJN1-mvRMS

Vo

Fifl. , - Control of RF stage by signsl into Tflf'minal No.5.

Ratio of Output at Vo

SIN

Signal-to-Noise Ratio

with Modulation ON and then
OFF, Input Signal"'loo ",V,
30% AM Modulation at

34

43

160000

400000

d8

'MOD"'400Hz
Input Signal set at
1 MHz. 90% AM
Modulation, Distortion
atV o must be

Overload Distortion

< '0%
Dynernic Cheracteristicii For Indicated Stages In Circuit of Fig. 3

,.....

p.,... ef Capacitance

Transcond'lCtance

pF

Output
pF

n

n

RF Amplifier

80

6

750

2 x 10ti min,

IF Amplifier

35

3.5

950

,04

2000

2x 106 min_

Sta..

Mixer

Input

Output
140000

80000
2500 (Mixer)
3000 (Amplifier)

Fig. 2- Test c;rr:uit for Fig. ,.

______________________________________________________________________ 367

CA3125E
Television Chroma Demodulator
RCA·CA3125E is a monolithic silicon integrated-circuit
chroma demodulator having three separate demodulators
with independent phase control. It is designed to function

compatibly with the CA1398E Ie Chroma Processor as well
as other commercially available Chroma Processors in A-G-B
Systems of color-TV receivers.
The CA3125E is supplied
in a 14·lead dual-in-line plastic package.

TYPICAL STATIC CHARACTERISTICS AT TA = 25·C,
V+ = +20 VOLTS
9.6 rnA
SUPPLY CURRENT. .. . . .. . . .... . .
BRIGHTNESS CONTROL VOLTAGE:
Measured with 8 volts at
Terminals 11, '12. and 13 ......
1.4 V
MAX. OUTPUT DIFFERENCE VOLTAGE:
Measured between any two of
Terminals 11. 12. and 13 . . . . . . . . . . . . . . . . .. ±O.4 V
MAXIMUM DC DETECTOR UNBALANCE
VOLTAGE:
DC voltage shift on Terminals 11.12. and 13
when Terminals 1.2, and 3 are alternately
biased 0.5 volt positive. then negative with
reference toTerminaI14... .......... .. +150 mV

MAXIMUM RATINGS,Absolute·Maximum Values at TA =2fi"C
SUPPLY VOL TAGE .. ..
25 V
.. .... 20rnA
SUPPLY CURRENT ...
AMBIENT·TEMPERATURE RANGE,
Operating.
-40°C to +8SoC
Storage
-6SoC to +lSO°C
LEAD TEMPERATURE IDURING SOLDERING):
At distance 1/16" ± 1/32" 11.S9 ± 0.79 mm)
26SoC
from case for lOs max.

Features:
• Luminance input
• Blanking control input
• Thr. separate demodulators with independent phase control
• Low output offset voltage. . . . . . . . . . . . . • . . . . . ..

0.4 V

TYPICAL DYNAMIC CHARACTERISTICS AT TA' 25·C,
V+;;; +20lIolts
BLUE CHROMA GAIN:
Peak·to-peak voltage at Terminal 11 with 1.0 volt
peak-to·peak applied differentially between
Terminals 6 and 7. and with a subcarrier
7.36 Vp_p
injection voltage of 1 volt peak·to-peak
RED GAIN RATIO,
Peak·ta-peak voltage at Terminal 13
Peak.to-peakvoltageatTerminaI11 X 100 ........ 100%
GREEN GAIN RATIO,

Peak-ta·peak voltage at Terminal 12 X 100 .•.•..•.. 30%
Peak·ta-peak voltage at Terminal 11
LUMINANCE GAIN:
Peak-ta·peak voltage measured at Terminals 11,
12. and 13, with a peak·ta·peak voltage of
0.1 volt applied toTerminals 6 and 7
(common mode). and with no subcarrier
0.7 Vp-p
injection ......................... .

B
OUTPUT

.
.

OUTPUT

OUTPUT

~~'~:~~flR
INPUT

OEMODULATOR
BIAS

Fig. , - Fllnction./ block diagram Df th. CA3125E.

______________________________________________________________

~9

\

CA3126Q
2. When the overload detector is used. a large resistor (nominally 47.000 ohms) must be placed in series with Terminal
16 to set the required RC time constant. The same RC
network series serves to set the killer time constant.
3. The setting of the free-running oscillator frequency requires
the presence of the keying pulse. The free-running frequency
will be erroneous if Terminal 1 is de shorted during the
setting operation because of the de offset voltage introduced
to the AFPC detector.
4. Care must be taken in PC board designs to provide
reasonable 1solation between the oscillator portion of the
circuit (Terminals 6. 7. and 8) and the chroma input
(Terminal 1).

+24 V

r-_----f -~

~

'J

--r7v-----Ob--I.

'v

VIDEO IF INPUT

ov

V'N
150 mVrmt
(MODULATION
ENVELOPE)

~

92CM-28848

Fig. 1 - Block diagram of the CA3136 in a typical circuit application.

Fig. 2 - Typical detector output linearity.

_________________________________________________________________

~3

CA3136E
TYPICAL ELECTRICAL CHARACTERISTICS
At V+

=12 VDC, fc =45 MHz, T A =25°C

CHARACTERISTIC

SYMBOL

Supply Current

IS + 110

TEST CONDITIONS

VALUE

UNITS

60

mA

7

VOC

Referenced to Zero·
Carrier Level

0.3

VOC

Vg

VlO= 7V OC

7.7

VOC

V12

AFT Defeat Switch Closed

Video·Output Voltage

VlO

Noise·lnversion Offset
Voltage

VlO

Sound I F·Take·Off Output
Voltage
AFT Output Voltage

Zero Carrier Bias Adjust

3

VDC

Oscillator Pull·ln Range

3

MHz

Oscillator Hold·ln Range

6

MHz

Detector Conversion Gain

30

Video Bandwidth

9

CARRIER FREQUENCY (fC)-MHz
92CS~28846

Fig. 4 - Tvpical AFT output of CA3136.

dB
MHz

Carrier Rejection at Video
Output:
fc = 45 MHz

30

dB

2 fc = gO MHz

40

dB

Video IF
Parallel I nput Impedance:
Resistance at Term. 4

Rp

4

kn

Capacitance at Term. 4

Cp

5

pF

Sound Take·Off Output
Resistance at Term. 9

Ro

1 MHz

50

n

Video Output Resistance at
Term. 10

Ro

1 MHz

50

n

- - - - - - - - - - - - - - - - - - - -______________________________________

~5

CA3137E
ELECTRICAL CHARACTER ISTICS AT T A = 25°C. V+ = 11.2 V

CHARACTER ISTIC

SYMBOL

TEST CONDITIONS

I Min·1

LIMITS
Typ. I Max.

I

UNITS

STATIC (See Fig.2)
IT

-

35

47

mA

-

6.7

-

VDC

Oscillator Reference Inputs

V16
V9. VlO

-

3.S

V6.V7. VS

-

5

-

VDC

R·Y, G·Y, B·Y Outputs

V3

-

1.2

-

VDC

Supply Current
Reference Subcarrier Input

Chroma Input

VDC

DYNAMIC (See Fig,3)
Tint and Sensitivity
Limiting
Tint Limiting
Tint Amplifier*

Vl1

VI6:200 mV p·p@3.5SMHz

300
425

mVp·p

VI6=SOO mV p·p@3.5SMHz

200
-

-

VII
<1>V11

600

mVp·p

V16=400 mV P'p,
Term.l = 11.2 VDC

-35

-25

-15

Degrees

-130

-110

-SO

Degrees

2S

33

3S

%

V3 =40 mV p.p

lOS

120

132

%

V16=400 mV p.p,
V3=40mVp·p

350

550

-

mVp·p

-

900

-

kHz

1.5
0.42

2.2

-

Vp.p

0.7

-

1.6

2.65

-

Phase Reference
Tint Control'"
Range

.1>.<1>11

V16=SOO mV p.p,
Term.l = 1.2 VDC

Ratio G·Y to R·Y

V7 N 6

V16=400 mV p.p,

Ratio B·Y to R·Y

VSN6

Demodulated Chroma

Output R·Y

V6

Color Difference Output
(Bandwidth at 3 dB)

V3=40 mV p.p

Maximum Color Differ·
ence Outputs:
R·Y

V6

G·Y

V7

B·Y

Vs
Set·Up:
Term.2=1.6V
Term.l = 11.2 V
Term.16=400 mV p.p
@Oo Reference Angle
Term.3= 40 mV p.p
@ 100 Reference Angle
Sl Closed (Term.15 atGND)

"F lesh Detector"
Reference:

"Flesh Detector":
Phase
Amplitude

V16=400 mV p.p,
V3 = 300 mVp·p

<1>11

Same Set-up except 51 open

VII

"Flesh Detector":
Phase
Amplitude

0

-

Degrees

275

-

%

-

0

-

Degrees

100

-

%

ro

-

50

-

n

-

3

ri

-

2.5

-

kn

Small-Signal Input
Resistance:
Term.3
Terms.9&10

-

-

<1>11
VII

Small·SignalOutput
Resistance (Terms.6,7,S)

Reference
Set·Up

Same Set·up except
Term.3 at 1900 angle

• Phase angle of term. 11 referenced to term. 16 phase angle.
'" Phase angle of term. 11 with term. 1 = 1.2 V minus phase angle of term. 11 with term. 1 = 11.2 V.

_____________________________________________________________________ 387

CA3137E

R24
620

,----

_____________ ___
~

~--------------J

Fig.4 - CA3137E Schematic diagram.

________________________________________________________________

~9

CA3139E, CA3139Q
ELECTRICAL CHARACTERISTICS at TA • 25o C, y+", 28 Y CUniess Oth_iseSpecified)

CIRCUIT DESCRIPTION

See Test Circuit, Fig. 2

The CA3139 consists of five functional cir·
cuits as shown in the block diagram, Fig. 1
(see Fig. 5 for schematic diagram) .

CHARACTE RISTIC

LIMITS
• Min.
Max.

TEST CONDITIONS

UNITS

1) Cascode Amplifier - Consists of emitter·

NO SIGNAL INPUT
Supply Current, 1+
V+ = 20.8 V

Low Voltage at Term. 7'

15

20

mA

11

14.5

V

Shunt Reg. Voltage

12

14.5

V

Ouiescent Voltage at Term. 3

4.5

10

V

6

8.5

V

-0.8

+0.8

V

1.4

2.6

V

MHz
MHz
MHz
MHz

2.2
1.2
9.6
9.1

4.7
4.4
13.8
12.1

V

= 44.65 MHz
= 45.69 MHz
= 45.81 MHz

9.1
9.6
1.2
2.2

12.1
13.8
4.4
4.7

50

200

Ouiescent Voltage 2 at Terms.
13 and 14

Term. 13 connected to Term. 14

Ouiescent Difference Voltage,
Terms. 13 to 14
Ouiescent Voltage at Term. 6

SIGNAL INPUT = 15 mVRMS (Unless Otherwise Specilied), Note 3
Correction Voltage at
Term. 13

1= 44.65
1= 45.69
f = 45.81
1= 46.85

Correction Voltage at
Term. 14

f
f
f
f

4.5 MHz Output

Two·Tone Input
f1 = 45.75 MHz at 15 mV
f2 = 41.25 MHz at 5 mV

- 46.85 MHz

NOTES: 1. 17 = 12 mA maximum at V7

=

V

mVRMS

11 V.

2. V13 = 0.55 Vz ± 0.7 V
3. Resistor from term. 6 to term. 7 = 9.09 KH. Crossover steepens and "bow tie"
width increases when resistor is decreased in value. Total peak swing decreases
slightly.

v·

NOTES:
1.u.'OkO ......n ......or .. OC
v............ , ....... M.k ...

DC_.

......

2. TypiQI No ..... DC PoI"",_ Ar,

3.

eo... .......... Tal Polntl.

L1: ACAP,N.122201
L2: RCA ',N. '4133
4)1, T_ .22 Win, D.o .• O.2fi tlypJ
OIU. . . . .' . '00 «Min.'
H

'-"'.25M",

........... ·O.1.JlIt(Typ.,

Fig. 2 - rat circuit

11- ACA',N.l4C11D7
D TurnlCc.n. , ..... .zo .....

O.D.• 0.... I'y,.)
QIUnIoIdId)-l40IM6n.1
'-46.lIMH1:
1 - . . - - 0.1I1I1IITyp.1

follower 01, common-emitter amplifier
02, and common-base amplifier OJ.
2) Bias Circuit - Consists of 04 and resistors
Rl, R4, R5, and an external resistor (user
selectable) connected to the voltage regulator, terminal 7. The nominal value of
the external resistor is 9.1 kO. Reduced
values will raise the gain of the cascade
amplilier chain, and higher values will
reduce the gain. If the gain is increased,
the AFT "Bow Tie" width will increase
and the crossover slope will increase
(become steeper). The input transistor
01 is internally biased, so AC coupling
is normally used to the input terminal 5.
3) Intercarrier Mixer/ Amplifier -

The output 01 the cascade amplifier at terminal 9
is also internally connected to the intercarrier mixer/amplifier chain consisting
of transistors 013 through 017 and associated components. The video IF carrier
at 45.75-MHz and the FM sound IF
carrier at 41.25-MHz are down-converted
to a 4.5-MHz FM signal by 014. A low-pass
Ii Iter removes the carriers and upper conversion signal components. The 4.5-MHz
FM signal is lurther amplified and filtered
by 016 and C3. The FM sound output
signal is at terminal 3. The gain with
respect to a 5-m V sound carrier (tested
with a 15-mV video carrier) input signal
at terminal 5 is 10 to 40 when the resistor
is connected between terminals 6 and 7
is 9.09 kO.

4) AFT Detector and DC Amplifier - Consists of 06 through 012 and related components. The detector inputs at terminals
8 and 10 are connected to the external
discriminator transformer and biased
through the transformer at terminal-6
potential. The total current through transistors 07 and 08 is held constant by the
current-mirror transistors 010, 011, and
012. External filter capacitors connected
to terminals 11 and 12 assure that peak
detection is accomplished. The AFT output voltages are shown in the Electrical
Characteristics chart, and a graphical representation is shown in Fig. 4.
5) Voltage Regulator - An active shunt
regulator, consisting of 01, 02, Zl, Z2,
and 05, is included to reduce the dynamic
resistance.

________________________________________________________________

~1

CA3143E

TV Luminance Processor
The CA3143E is a monolithic silicon integrated circuit that performs the luminance
processing functions of amplification; contrast, brightness and peaking control; blanking; and black-level clamping.
This device, when used in conjunction with

Features:

the CA31260 chroma processor and the
CA3137E chroma demodulator, will provide a luminance/chrominance system having excellent tracking of controls. The
CA3143E is supplied in a 14-lead dualin·line plastic package.

VI3

Black-level clamping
Linear de controls for brightness,
contrast, and peaking
• Horizontal and vertical blanking
• Operates with standard or tapped delay line
CIRCUIT DESCRIPTION

+30",

VIDEO INPUT

POSITIVE
HORIZONTAL

PULSE

POSITIVE
VERTICAL
PULSE
910Q

"V
5O.n$-<---~
1.5 Y

92CL-27424

Fig. 1 - Functional block diagram.

NOTE; ATTENUATION AT '0 kHz MUST
BE AT LEAST 66dB GREATER THAN
THE ATTENUATION AT I MHz

t;ig.2 - Test circuit.

•
•

92CL-Z742,RI

Fig. 1 is a block diagram of the CA3143E
indicating the internal functions as well as
external circuitry and signals. The video
input signal with positive-going sync is applied to the input of the tapped delay line.
Signals from fixed taps of the delay line
are applied to terminals 1, 2 and 3 of the
CA3143E. In referring to Fig.4, the signal
from the delay line tap A is applied to the
video input at terminal 1. The signals from
taps Band C are summed where VA + VB
= Vsum . The signal (Vsum ) is then applied
to the parallel connection of the peaking
input terminals,. 2 and 3. The videO input
signal is applied to a non-inverting input of
the peaking amplifier while the peaking input
signal (V sum ) is applied to an inverting input of the peaking amplifier.
Low-frequency video components are unattenuated, while high-frequency components are attenuated as a function of the
delay-line tap points. The peaking amplifier
is a differential amplifier, so that the output
is proportional to V1 minus Vsum' At low
frequencies, the signal at terminals 2 and
3 is unattenuated, and the peaking amplifier produces no output at these frequencies. However, at high frequencies the signal
at terminals 2 and 3 is attenuated thUS, the
peaking amplifier output consists of high·frequency video. The peaking control setting
determines the amplitude of the peaking signal which is then fed to the video amplifier ,
where it is added to the video input signal
and amplified. The setting of the peaking
control does not substantially affect the dc
quiescent voltage at terminal 4.
The low-impedance video amplifier output
is at terminal 4. The signal is fed through an
external coupling capacitor to terminal 6, the
black-level clamp input. The action of the
black-level clamp is such that it clamps to
the black level rather than to the sync level.
Refer to the circuit diagram in. Fig.3. Consider the situation where no signal is applied
to terminal 12. Terminal 6 is biased through
diode 02. T,he signal at terminal 6 VVill
clamp its most negative excursion (sync
pulse) to the anode voltage of 02. However, if a positive pulse is applied to termi·
nal 12 during the sync interval, the anode
of 02 is forced to ground due to saturation
of 017. The clamp is thus disabled, and
terminal 6 will clamp to the next lower
signal level, the black level.

__----------------------------------------------------------------393

CA3143E
MAXIMUM RATINGS, Absolute-Maximum Values:
DC SUPPL Y CURRENT (Into Terminal 13)*
DEVICE DISSIPATION:*
Up to T A = 55°C _
Above T A = 55°C _

59.5 mA
750mW
derate linearly 7.9 mW/oC

AMBIENT -TEMPERATURE RANGE:

Operating .
Storage.

-40 to +85 0 C
.

.

.

.

.

-65 to +150°C

LEAD TEMPERATUR E (During soldering):
At distance 1/16 ± 1132 inch (1.59 ± 0.79 mm)
from case for 10 5 max. . • .

*

Although the CA3143E is rated for maximum
dissipation of 750 mW, it is recommended
that the current into terminal 13 be limited

by external circuit resistance to 39 rnA for

a typical voltage at terminal 13 of 11.8 volts.

ELECTRICAL CHARACTERISTICS at T A = 250 C
Test Conditions
Bias
Volts
"(VI

Characteristic

U
N
I
T
S

Switch Numbers

slls2JS3\S41s~s6Is7js8fs9jsl 01 SII
Switch Positions
For Characteristics Measurements

LIMITS
Min. Typ. Max_

The clamped video signal at terminal 6 is
amplified and inverted at terminal 7. Blanking is accomplished by applying horizontal
and vertical sync pulses to terminal 9. The
pulses turn ON p-n-p transistor Q6 which
shorts the base of transistor 015 to the
terminal 13 supply voltage. The brightness control function is accomplished by
varying the voltage on terminal 8. The gain
of the inverter stage remains constant, but
the de reference voltage follows the terminal
8 voltage. The contrast control function is
accomplished by varying the voltage of terminal 10_ Increasing the voltage on terminal 10 lowers the gain of the video amplifier. This reduction in gain does not substantially affect the de quiescent voltage at
terminal 4.

CA3143E
TERMINALS
VI-VA

I

2

,

STATIC
Voltage:
At Term. 13 (V131

6.1

2 1 1 2 2 4 1 2 2

1

1

11

Quiescent Voltage
At Term. 4 (V41

6.1

2 1 1 2 2 3 1 2 2 1

1

3.3

Quiescent Voltage
At Term. 7 (V71

6.1

2 1 1 2 2 2 1 2 2 1

1

7.1

Current into Term.13
(Term.13 Connected
to +11 VI (1131

11.8 13.2 V
4

5.7

V

7.7 8.3

V

10-400
I
"'

92C$-27423

Fifi.4 - Tapped delay line.

6.1

2 1 1 2 2 3 1 2 2 1

2

10

19

30 mA

Wide-Band Gain
(Note 1)

5.8

1 1 1 2 1 2 1 1 1 2

1

6

8.3

11 dB

Contrast Gain
Reduction
(Note 21

5.8

1 1

1 2 1 2 1

1 2 2

1

27

30

Peaking Gain
(Note 1)

5.8

1 1

2 2 1 2 1 1 1 2

1

15

18.4

1 1 2 2 1 2 1 1 1 2

1

16

18

-

dB

2 1 2

1

-

%

1

-

20

2 1 2

40

-

%

DYNAMIC

Peaking
Gain Reduction
(Note 31
5.8
Max. Intermodulation
Distortion:
2V (Note 4)
5.8
3V (Note 51

5.8

1
1

-

1 1 1 2
1 1 1 2

-

-

dB

22 dB

Note 1: Set 50-kHz generator for 100 mVp-p_ Adjust R 1 Peaking Control· (See Fig.21 for
minimum setting. Measure wide-band gain at terminal 7.
Note 2: Set 50-kHz generator for 100 mVp-p. Adjust R 1 for minimum setting. Measure
contrast gain reduction at terminal 7_
Note 3: Set 50-kHz generator for 100 mV-p-p. Adjust R 1 for maximum setting. Measure
peaking gain reduction at terminal 7.
Note 4: Adjust Rl for minimum setting. With S2 at switch position 1 and 57 at switch
position 3, set 50-kHz generator for 2 Vp-p. Then with 52 at switch position
2, set 1 MHz generator for 100 mVp-p. Then with S7 at switch position 2,
measure downward modulation of the I-MHz signal due to the 50-kHz signal.
Note 5:

Repeat step 4 except that the 50-kHz generator must be set at 3 VP-P.

MODULATED
-----L--.l-------I-MHrSIGNAL

~
92CS-27422

A = Amplitude of 50 kHz signal at deepest trough
B = Peak amplitude of 50 kH z signal
Downward Modulation = B-A
B

_____________________________________________________________________ 395

CA3144G
+30V

YI3

VIDEO INPUT

+!OV

311A

R2

.3
"IIH
YI3 ' - - + - - - {

24114

8.5 y

"".a:>4---.. .
1.5Y

.,.a

"OY
12.3 VOLTS
REGULATOR
VOLTAGE

50110

BRIGHTNESS

CONTROL
,2eN-28101

Fig. 1 - Functional block diagram.

10 leO.

NOTE: "TTENUATION AT 50 kH, MUST
BE AT LEAST H dB GREATER THAN

9lCL-2:8109RI

TH'E ATTENUATION AT I MHz

Fig. 2- Test circuit.

______________________________________________________

~7

CA3144G
CLAMP INHIBIT INPUT

------------,
I
I

..,

07

I,SK

BUFFER AMP

t- - - - - ---, BR~tH.-~~~I~· a

~---+--~-.

I

I
I
I
I

•• 7

2.4K

012

I

~

,

I

______ -L_

_ ___ ...1I

CLAMP

•••

2,4K

I

I

,.------;0..

I
I

I

•••

9.6K

011

M-

-----------------~-------~
13 SHUNT REGUL.ATOR

,

a BIAS

UBSTRATE

AL.L. RESISTANCES ARE IN OHMS
92CL-Zlr06

Fig. 3- Schematic diagram

minals 2 and 3 is attenuated thus, the peaking
amplifier output consists of high·frequency
video. The peaking control setting determines
the amplitude of the peaking signal which is
then fed to the video amplifier, where it is
added to the video input signal and amplified.
The setting of the peaking control does not
substantially affect the de quiescent voltage
at terminal 4.
The low·impedance video amplifier output
is at terminal 4. The signal is fed through an
external coupling capacitor to terminal 6,
the black·level clamp input. The action of
the black-level clamp is such that it clamps
to the black level rather than to the sync
level. Refer to the circuit diagram in Fig. 1.
Consider the situation where no signal is
applied to terminal 12. Terminal 6 is biased
through diode 03_ The signal at terminal 6
will clamp its most negative excursion (sync
pulse) to the anode voltage of 03. However,
if a positive pulse is applied to terminal 12

during the sync interval, the anode of 03 is
forced to ground due to saturation of 013.
The clamp is thus disabled, and terminal 6
will clamp to the next lower signal level, the
black level.
The clamped video signal at terminal 6 is
amplified and inverted at terminal 7. Blanking
is accomplished by applying horizontal and
vertical sync pulses to terminal B. The pulses
turn ON p-n-p transistor 018 which shorts
the base of transistor 020 to the terminal 13
supply voltage. The brightness control function is accomplished by varying the voltage
on terminal 9_ The gain of the inverter stage
remains constant, but the de reference voltage
follows the terminal 8 voltage. The contrast
control function is accomplished by varying
the voltage of terminal 10. Increasing the
voltage on terminal 10 lowers the gain of the
video amplifier. This reduction in gain does
not substantially affect the dc quiescent
voltage at terminal 4.

_____________________________________________________________________ 399

CA3151G

+.

20

ffi

~

10

il

0

-I

I

I

I

CA31!)IG

I

-10

VCHROM ... AT P,3· 400 fI'IVp~p

%

~~

NOTE; TINT CONTROl.. ADJUSTED

SO THAT WITH A +t
SIGNAL INTO TERM. f.
THE OSCILLATOR AT TERM.

-20

12 AND THE CHROMA AT
TERM. 13 ARE IN PHASE
+1I.6V

'2CS-29237

Fig. 2 - "Flesh" correction of oscillator phase angle
as a function of chroma input phase angle.

10.

Fl

TERMINAL DIAGRAM
(;HROMA INPUT I

lB.390 P

0.01

56~H

24 HORIZ. KEY PULSE INPUT

~

39.

SAT CONTROL 4

I.
AL.L RESISTANCE VALUES ARE IN OHMS

TINT

CAPACITANCE VALUES ARE IN MICROFARADS

100 pF

UNLESS OTHERWISE INDICATED

75pF

CONTROL

OVERLOAO DEl.
AND KILLER FILTER

82pF"-=-

PROCESSOR SECTION 6
CHROMA OUTPUT

FLESH 8

OVERLOAD

GROUND 1

DISABLE
92CL-29239

17 TINT CONTROL

Fig. 1 - Functional diagram static test circuit, and typical application circuit.
l

16 CARRIER FILTER
15 "FLESH CORRECTOR"
CARRIER OUTPUT
14 "FLESH COARECTOR- AND
OVERLOAD DETECTOR DISABLE
13 DEMODULATOR CHROMA
INPUT

QREF.INPUT II

TOP VIEW

Vee
+11.6

e2

0.01
"='

XTAL

3.579545 MHz

-_'-1

VBURST

~VPEAK(MINl

5.1 K

2.2 K

r-- -63.5 J!s

B~ 3.579545 MHz ~:r:CHROMA
,.--1. :--4.27 J!5

820'

1.2K

2.Z3~S~

--j

/.-. 5 fl.s

CENTERED
ON BURST

KEY PULSE

0.01

52J2

O~

2700'

5.1 K

8.45 V

ALL RESISTANCE VALUES ARE IN OHMS
92Cl-29236

Fig. 3 - Dynamic test circuit.

___________________________________________________________________ 401

CA3153G
MAXIMUM RATINGS, Absolute-Maximum Values:
DC SUPPLY VOLTAGE:
Between Terms. 15 and 4 .......................................... 16 V
Between 470 n connected to.Term. 12 and 4 ............................ 35 V
DC SUPPLY CURRENT:
At Term. 15. . . . . . . . . . . . . . . . . . . . . . . . . .. . ................... 20 mA
At Term. 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 mA
DEVICE DISSIPATION:
UptoTA =+55'C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .750 mW
Above T A = +55' C ............................ Derate linearly at 7.9 mWI' C
AMBIENT TEMPERATURE RANGE:
Operating ................................................... -40 to +85' C
Storage ..................................................... -65 to + 150' C
LEAD TEMPERATURE (During Soldering):
At distance 1/16 ± 1/32 inch (1.59 ± 0.79 mm) from case for 10 seconds m~x ..... +265' C

ELECTRICAL CHARACTERISTICS at TA = 25°C
CHARACTERISTIC
Operating Supply
Voltage, V 15

TEST CONDITIONS

UNITS

See Note 1

Supply Current, 1,5
Shunt Regulator
Voltage, V 12
Shunt Regulator
Current, 1,2

LIMITS
Min_
Max.
12

14.2

V

3

15

mA

10.9

13

V

6

20

mA

18.5

21

V
V

V12=10.5V

Tuner AGC High
Voltage, V 10
Tuner AGC Low
Voltage, V 10

0.3

1.3

AGC Current. 12

Non-Keyed

80

500

/JA

AGC Current (Peak), 12

Keyed Source Current

0.7

3

mA

AGC Current (Peak!. 12

Keyed Sink Current

150

680

/JA

Horizontal Key Input

Through 100 kn
connected to Term. 1

25

35

V

Video Output High
Voltage, V16

At Zero Carrier
7

10

V

Video Output Low
Voltage, V16

At 30 mV Input
0.9

2

V

Sensitivity Voltage, V 16

At 400 /JV Input

Noise
Chroma

45.75 MHz, 10 mV;
42.17 MHz, 3 mV

0.9

5

V

-

12

mV(RMS)

0.7

1.6

V (RMS)

35

85

mV(RMS)

Distortion

50 kHz, 80% Modulated,
Sync TIP Equiv. 30
mV(RMS)

-

10

%

Delay Voltage

Through 15kn. connected
to Term. 7. See note 2

0

V15

V

AFT Drive

Note 1: V15 MIN. should be at least 0.6 V above Terminal 12 potential. Lower voltage may cause some
"white" compression.
Note 2: Zero voltage corresponds to maximum delay at Signal input -= 30 mV (RMS).

__________~----------------------------------------------------@3

CA3153G
THIRD IF -AMPLIFIER STAGE,DETECTOR,
AND VIDEO-AMPLIFIER SYSTEMS
IC16-0311
QI6,17,19,2I,22,25,27,30.AND 031 ARE EMITTER FOLLOWERS
13

R36
2,9K

,~:h6cgF

R3'
15K
R43
!12K

Z2

021

R53
100

4K

-£

~~F

!C8
23pF

R32
5K

02~

R34

tt

C6
19pF

20
,F

I--

R37
2K

"

~

~~

of

l,

4K

r--

02.
R44

"

F

I
I
I
I

R56

.00

J

I

R51
5K

J
J
J
J

~I~~~
lapF

032

033

J

I
J
J

R47
10.

R42
100

R••
100

R64
IK

L--....

J

05

R'5
130

03~

F

O~

J

026
R3I
270

V

IK
R50

I
031

~

["'F
'R49

t-

-

1----------.1

f-:(~

04

Z4 ~

I

14 K

R41
11K

IK

"-';2.

r;

I

r'

Z3

025

C7

R55
75 K

,---

R46
75K

R33

r-----

I
I
I
I

R45
1.6 K

R48
40

I
J

I
I

R52
7. K
R54
10 K

CI2
I5PF

T

--------------------~

D.

08
G

R61

~A
041

6.IK

I.

r"

"7r

R60
18 K

60 pF

CIl

I

J

R59
1.4K

.~

a4'

R63

f
I

R62
OK
10
K
NOISE-GATE AND AGe SYSTEMS
a431
1 034
032.33.35, AND 036 ARE EMITTER FOLLOWERS
92CL-)I067

Fig. 2 - Schematic diagram for the CA3153G.

038, 036, and 035 to resistor R57 to form
the charge current for the external agc filter
capacitor at Terminal 2.
A constant·current discharge path for the
capacitor at Terminal 2 is provided by cur·
rent mirror components D7 and 037 during
the key·pulse duration. Thus the external
agc filter capacitor is charged or discharged
during the key-pulse interval only by the difference in current between the charge· and
discharge currents. At the end of the keypulse duration, C13 is discharged, and the

charge and discharge current paths at Terminal 2 are turned off. Diode D8 provides a
lower-gain agc path for turn-on during channel acquisition.
Noise-Gate System (See Fig. 31
The circuit components, Cll, R54, 032,
033, and 043 perform the function of a statistical system to reduce agc gain during
"spike" noise. The noise gate turns on for
large amplitude fast signals and reduces the
agc loop gain.

---------------------------------------------------------------------~

CA3153G

r------------~ -----m
_
5 +VS2

I
I

+"01
12 SHUNT

_RIg" _ _ _ _ _ _ _ _ _ _ _ _ -,

I

R27
740

I

I
I

I

I

I

I
I
I
I

C2
1.9pF

I

I
Vl5

r--'VII'v-....
R53 1

100

I
I

I
I

I
I~I~~T
16

ell

7'FJ:
R48

40

R3I
270

£~~I

.

@ ~ _...: _--=--~ =-~

R39

R43
11.21<

R38
100

___ ~~ _______________________
QI6,17,19.21.22.25.27,30 AND 031 ARE EMITTER FOLLOWERS

-.J

92CL _ 3106~

Fig. 5 - Third IF-amplifier stage, detector, and video-ampfifier systems of CA3153G (016

____________________________________________________

~Q31)..

~

_______________ 407

CA3159G
6, which drives the outboard diode phase
detector. Second, the negative pulse cuts off
the current through 036, which otherwise
holds 035 in saturation, thus enabling a
current in R41 to turn 034 on and thereby
shift the noise threshold voltage.
Terminal 7 receives a positive flyback pulse
thatsuppliesR41 with the signal to complete
the coincidence gate that alters the noise
threshold when sync and flyback pulses are
in phase. The buffered and clipped flyback
pulse also turns 043 on, which, in conjunction with an external integrating capacitor, forms a sawtooth waveform_ This
sawtooth (at flyback rate) is phase compared
with the sync pulse that was separated from
the video input.

Fig. 3 - Schematic diagram of the CA3'59G.

Circuit Description
The negative sync video input at terminal 3
is the detected video if. This video signal is
buffered and Vbe compensated by emitter·
followers 028, 027, and 026. The buffered
video signal is applied between the base
of 021 and a temperature·stable 2·V refer·
ence. 021 is normally in saturation, and the
negative sync pulse imparts a positive swi ng
to the base of 020. 020 is used as a peak
rectifier driving a capacitor at terminal 1.
The voltage at terminal 1 is the AGC control
voltage that sets the if gain such that the sync
pulses drop to just below the 2 V level, driving
021 out of saturation.
The above description is for a normal video
signal; the presence of noise pulses more
negative than the sync tip level would lower
the gain to that level. thus disturbing the
picture. A gated noise-inversion threshold
is provide at the base of 032 to compensate
for these noise pulses. The threshold is about
1.5 V during trace time, but is reduced to
about 1 V during coincidence of the sync
and flyback pulses. When the video signal
is more negative than the noise threshold,
032 conducts and pulls the base and emitter
of 030 low. Without noise, 023 conducts
0_5 mA with its collector·at 7 V, which holds

022 in cutoff. 029 has an emitter load
provided by an external 1 kn resistor and a
series capacitor: when its base is switched
low, its collector switches high. The resulting
flow of current in 023 overrides the normal
negative-going pulse in the direct signal path
and holds 021 in saturation.
The video input to terminal 3 also operates
the sync channel, beginning with 031_ Because 032 is normally cut off, 031 acts as an
amplifer with a moderate gain to its collector,
and a positive sync signal appears at terminal 4.
If the noise pulse is more negative than the
noise threshold at the base of 032, the base of
030 is pulled down as discussed above. In
addition to operating the AGC noise inverter,
the 030 current passes through 025 to the
amplifier load resistor, R35, and cancels the
potentially positive pulse at that point.

The phase detector works against an internal
bias point brought out to terminal 10, and
the phase detector output applied to terminal
11 is slightly positive or negative relative to
terminal 10. This voltage differential with
terminal 10 determines the division of current
between 09 and 010, which are part of the
voltage controlled oscillator. The oscillator
consists of the current source 011, differential amplifier 012 and 013, and differential amplifier 09 and 010. The frequency
is determined primarily by a series LC circuit
connected between terminals 13 and 14
(terminals 12 and 13 have resistor loads to
the positive supply). If the entire oscillator
current passes through 010 to terminal 13,
the oscillator operates at the frequency at
which the phase shift in the LC circuit is
zero. If the current is sent through 09 to
terminal 12, however, it must go through an
external capacitor between terminals 12 and
13 and then through the original LC circuit
and the circuit is tuned differently. Intermediate proportions of current division will
produce intermediate oscillator frequencies_
The oscillator current output from 012
provides base drive for the 31_5 kHz output
at terminal 15.

The positive sync signal at terminal 4 is
coupled through an RC network to terminal
5 for sync separation_ In essence, the network
permits 038 to clamp the positive peaks, so
the most positive part of the signal is amplified by 038 while the rest is beyond cutoff.
The separated sync, a negative pulse at the
collector of 038, follows two paths_ First,
the sync operates an output driver to terminal

__________________________________________________________________ 409

CA3183G
ELECTRICAL CHARACTERISTICS At T A = 25°C. V+ = 5 VDC. V- - 0 VDC; _
CHARACTERISTIC

LIMITS

TEST CONDITIONS

Figl. 1 It 2
UNITS

Min. Typ. Max.
Supply Current. 1+

Terms. (1+2), Fig. 1

30

60

UHF Bandswitch Input Voltage, VBH

High level

2.4

-

VHF Bandswitch Input Voltage, VBl

low level

-

90

mA
V

UHF Bandswitch Input Current, ISH

VBH=20VDC, Fig. 1

VHF Bandswitch Input Current, IBl

VSl =OVDC, Fig. 1

-

-

UHF Sensitivity level Input
Voltage, VIN(U)

fiN = 450 to 950 MHz,
fOUT = f1N/256, Fig. 2

-

- eo

mVRMS

VHF Sensitivity Level Input
Voltage, VIN(V)

fiN =90to 275MHz,
fOUT = fIN/64, Fig. 2

mVRMS

Output Voltage, Vo

Terms, 40r 5, Fig. 2

Output Voltage Rise of Fall
Time, t"tf

________________________________

0.8

V

0.5

mA

-1

mA

-

-

40

0.65

1

-

Vp •p

-

70

-

ns

~----------------------------411

CA3188E
Operational Amplifier (See Fig. 2)
Electrical Characteristics at TA = 25°C, V±
CHARACTERISTIC

&

32.5 V, Vas a 18 V, Terms 4 8& 5 grounded

TEST CONDITIONS

TYPICAL
UNITS
VALUES

Input Bias Voltage. V 13

113 = 4 mAo Feedback = 1 Mn

2.5

VDC

Input Bias Voltage, V13

113 = 6 mA, Feedback = 1 Mn

2.6

VDC

Input Bias VoltaQe, V 14

114 = 4 mA, Feedback = 1 Mn

3.3

VDC

Diode Voltage
(term. 14 to term. 13)

114 = 4 mA, Term. 13 = Reference

0.8

VDC

Diode Voltage
(term. 13toterm. 14)

113=4mA, Term. 14= Reference

0.8

VDC

Output Voltage
Low, VOL

114 = 4 mA, Resistance between
Terms. 1 and 12 = 10 kn

0.2

VDC

Output Voltage
High, VOH

V14 = 0 V, 113 = 4 mA, Resistance
between Terms. 1 and 12 = 10 kH

28

VDC

Input Offset Voltage, VIO

V13 = 0 V, Term. 1 connected to Term. 14

10

mV

Supply Current, 1+

V4 = 1 V, Feedback (Terms. 1 to 14) = 1 MH

14

mA

Output Sink Current, 10L

114 =4mA, Vl = 32.5 V

25

mA

-15

mA

0.5

nA

65

dB

75

dB

80

dB

Output Source Current, 10H 113 = 4 mA, Vl = V14 = OV
Input Bias
Current, liB (term. 14)

V13 = 0 V, Term. 1
connected to Term. 14

Common·Mode
Rejection Ration, CMRR
Power Supply Rejection
Ratio, PSRR
Open· Loop Voltage
Gain. AOL

Band-Select Switch (See Fig. 3)
Electrical Characteristics at T A = 25°C, V+ = 32.5 V, VBS = 18 V, Terms. 4 & 5 grounded
Terms. 6, 7, 9 = 100 kn to ground
CHARACTERISTIC

TEST CONDITIONS

Logic Inputs "A" & "B"
Sink Current
Logic Inputs "A" & "B"
Source Current

19 = -90 mA, VlO = Vll = 2.4 V

Output leakage Current,
Terms. 6, 7, 9
Output Saturation Voltage:
Term. 9

TYPICAL
UNITS
VALUES
100

IJ.A

-5

IJ.A

2

IJ.A

19 = -90mA, VlO=V11 =2.4 V

0.6

V

Term. 9

19 = -60mA, VlO= Vll = 24 V

0.3

V

Term. 7

17 = -90 mA, VlO=OV, V11 =24 V

0.6

V

Term. 7

17 = -60mA, VlO=O V, Vll = 2.4 V

0.3

V

Term. 6

16 = -90 mA, V10 = 2.4 V, V11 = 0 V

0.6

V

Term. 6

16 = -60mA, VlO = 24 V, V ll =OV

0.3

V

__________________________________________________________________ 413

Preliminary Data

CA3168E

2-Digit BCD-to-7-Segment
DecoderIDriver

Features:

For Common-Anode LED Displays
The RCA·CA3168E is a monolithic integrated
circuit intended for 2-digit display such as
"numbers" for TV and "CB" channel selection, and other 0-99 numerical or counting
for consumer or industrial indicator applications.

It consists of two independent

BCD-to-7-segment decoder/drivers. Two sets
of BCD inputs are buffered with p-n-p
differential ampl ifier stages internally referenced to 1.7 V. Each of the eight input
terminals draws less than 15 IlA and is provided with an internal protection circuit.

Decoding is accomplished with 12L ROM's.
The fourteen output terminals are buffered
with Darlington pairs driving common-emitter
output transistors. Each output is capable of
sinking 25 mA for an LED common·anode
display device. The supply-voltage range
(VCC) is intended to be 4.5 V to 6 V. The
output voltage (Va) must not exceed 12V,
wh ich provides for a wide range of commonanode voltage sources.
The CA3168E is supplied in the 24·lead
dual-in-I ine plastic package.

• Separate BCD inputs and segment outputs for
each digit
• Input loading less than 151lA
• 12L logic with buffered inputs and outputs
• Internal input over range protection circu it
• 5-V supply operation
• Internal biasing circuits
• Output drive capability of 25 mA per segment
• Open collector outputs drive indicators directly

CA3168E
TERMINAL ASSIGNMENT

MAXIMUM RATINGS, Absolute-Maximum Values:
6V

SUPPLY-VOLTAGE, VCC.
INPUT·VOLTAGE (MIN./MAX.) .
INPUT CURRENT (PROTECTION CIRCUIT)
OUTPUT VOL TAGE, Vo .
OUTPUT SEGMENT CURRENT, IOISPLAY

-0.3IV CC V
±10mA
12 V
25 mA

AMBIENT TEMPERATURE RANGE:
Operating
Storage
POWER DISSJPATION:
Up to +70 oC.
Above +70 C
LEAD TEMPERATURE (DURING SOLDERING):
At distance 1/16 ± 1/32 inch (1.59 ± 0.79 mm) from case for

.

MSD SEGMENT
OUTPUTS

a to +70:C
-55 to +150 C
TOP VIEW

. . . . . . 400 mW

derate linearly at 8.7

mwtc

10 seconds max.

MSD SEGMENT

OUTPUTS
CA3168E

MSD
ROM I
ADDRESS
DECODER

OUTPUT
BUFFERS

MSD
ROM2

ADDRESS
DECODER

'''-'''''

1-4

~

5

rnTT"-....~"l.

~

>

r-"L._.I""'fi§

H.>--j-{&~_...JH~
,....'"

'---+-"----{I

1---'

~

GNO

vee
13
92C FIll - 3103 ..

NOTE: Functional diagram for least significant digit is identical
to functional diagram used for MSD with the exception
DISPLAY SEGMENT IDENTIFICATION

of Terminal Assignments (see Terminal Assignment diagram). A separate LSD Bias circuit, and % of the Output
Bias Circuit is used for LSD.

Fig. 1 - Functional diagram for Most Significant Digit (MSDJ.

VDISPLAY
(DISPLAY SUPPLY)

OND

92CS-31033

NOTE: See truth table for test sequence of input/output logic tests and
Minimum R LOAD = VDISPLAY - VOL

For each of the 14 segment

Max.IDISPLAY

drive output terminals. (LED is not used in test circuit)
Fig. 2 - Test circuit.

_____________________________________________________________________ 415

CA3170G
Features:

TV Chroma System

•
•
•
•

"G" Suffix Type-Hermetic Gold-CHIP in,
Dual-In-Line Plastic Package
The RCA·CA3170G is a monolithic silicon
integrated circuit that performs the func·
tions of subcarrier regeneration, ACC and
APC detection, and tint control in color tele·
vision receivers. It is designed to function
compatibly with the CA3121E TV Chroma
Amplifier/Demodulator
in a 2·package
chroma system.

The CA3170G is a TV Chroma System of
advanced design that incorporates all the features of the CA3070E but with the added
advantage of the modified Hue Control Char·
acteristic. With the CA3170G, the designer
can provide a front panel hue contrQI that
functions linearly over its entire range, a
particularly desirable consumer feature.

MAXIMUM RATINGS, Absolute·Maximum:
DEVICE DISSIPATION:'
Up to T A = 55°C, • . • • • . • • . . • • • . • • , •••• , . • . • . , . , •• , •••• , .• , , ••••.•• 750 mW
AboveTA=550C, . . . • • . . • • . , .• , •••• , •••.••••.• ,., ••.••• derate IInearlv 7.9mW/oC

Voitage-controlled oscillator
Keyed APC and ACC delllctors
DC hue control
Shunt regulator

The CA3170G is supplied in the 16-lead
dual-in-line plastic package with a hermetic
Gold·CHIP (G suffix). The chips used in the
hermetic Gold-CH IP plastic packages are of
the sealed-junction type designed to provide
protection against the deteriorating effects
of humidity and other surface contaminants
without the need for a hermetic package
enclosure. The semiconductor junctions are
sealed by utilizing a silicon nitride passivation
layer. A multilayered, highly corrosionresistant, terminal-connection system of
unique design is employed.

AMBIENT-TEMPERATURE RANGE:
• . , • , •••••• , .• , -40 to +B5°C
• • , •• , ••.• , •••• -65 to +150oC

Operating . . . • . . . . • . . . . . . . . . . • • . •
Storage . . . . . . . . . . . . . • . . . . . • . • . . • . . • . • .
LEAD TEMPERATURE lOuring soldering):
At distance 1/16 ±1/32 Inch 11.59 ±0.79 mm)
from case for 10 s max.

· • , ••••••••..•••••. +265 0 C

v"· 24 V

OSCILLATOR
OUTPUT

f.-!.-~i}-:__----...

~

______

:\~
INPUT

~

AlLRESlIU,.nUlUEIARf'''OHM\

1Jtj~~!~ ~~::~.~S!~:?!C:,~~~R~~:"ACI'
lCOIIGREA1UUEtNP'ICCFAIIAOS

ANU VAL ".IE I
Fig. 1 - Functional block diagram of CA3170G.

,.

~"~B I

~

-.Jr--

'---""=-""."""""'"'1£0 CHROMA

GAI~tI~~~OL

Fig. 2 - Simplified functional diagram of a two-package TV chroma
system utilizing the CA3170G and CA3121E.

I

• _____ ...J

CIRCUIT DESCRIPTION
The CA3170G, is a complete subcarrier regeneration system with automatic phase control applied to the oscillator. An amplified
chroma signal from the CA3121E is applied
to terminals No. 13 and No. 14, which are
the automatic phase control (APC) and the
automatic chroma control (ACC) inpuu.
APC and ACC detection is keyed by the hor·
izontal pulse which also inhiblu the oscillator output amplifier during the burst interval.
The ACC syslllm uses a synchronous detector to develop a correction voltage at the
differential output terminal Nos. 15 & 16.
This control signal is applied to the input
terminal Nos. 1 & 16 of the CA3121E. The
APC system also uses a synchronous detector. The APC error voltage is inlllrnally
coupled to the 3.58 MHz oscillator at balance; the phase of the signal at terminal No.
13 is in quadrature with the oscillator.
To accomplish phasing requirements, an RC
phase shift network is used between the
chroma input and terminal Nos. 13 and 14.
The feedback loop of the oscillator is from
terminal Nos. 7 and 8 back to No.6. The
same oscillator signal is aVailable at terminal
Nos. 7 and 8, but the dc output of the APC
detector controls the relative signal levels at
terminal Nos. 7 or 8. Because the output at
terminal No.8 is shifted in phase compared
to the output at lIIrminal No.7, which is applied directly to the crystal circuit, control
of the relative amplitudes at terminal Nos. 7
and 8 alters the phase in the feedback loop,
thereby changing the frequency of the
crystal oscillator. Balance adjustmenU of de
offseu are provided to establish an initial nosignal offset control in the ACC output, and
no-signal, on-frequency adjustment
a
through the APC detector-amplifier circuit
which controls the oscillator frequency. The
oscillator output stage is differentially
controlled at terminal Nos. 2 and 3 by the
hue control input to terminal No.1. The hue

__________________________________________________________________ 417

CA3170G
SHUNT
REGUL.ATOR
AND BIAS

ACC
APC
INPUT INPUT

10

OSCILL.ATOR
FEEDBACK
L.OOP

•

7

HORIZONTAL.
KEY PUL.SE

I~

.31

22.

Q3I
TERMINAL. 9 NO CONNECTION
AL.L. RESISTOR VAL.UES ARE IN OHMS

Fig. 6 - Schematic diagram of the CA3110G.
TO TERM.6

.,

~
I

-----1

-

I

CHIlO"

IN~

I

I
I

.7

I

I
I
I
0.001 I

Hf>

TILT AO...

_

I

I

I
I
I
I

IL ___ _

92CS-27691111

'"

APC

AOJ

Fig. 8 - Static characteristics test circuit

0.1';,

RESISTANCE VALUES ARE IN OHMS
UNLESS OTHERWISE INDICATED, ALL CAPACITANCt
VALUES LESS THAN I ARE IN MICROFARADS,
lOR GREATER ARE IN PICOFARADS.
92CL-l!16181t1

Fig. 7 - Outboard circuitry of a typical two-package chroma system for
color- TV receivers utilizing the CA3121E and CA3170G.

__________________________________________________________________ 419

CA3172G

CHROMA
INPUT

>--+--{)0"'--'vV~-oR-Y OUTPUT

REFERENCE
SUBCARAIER 41

>--+-{9)-",--'VV~-oG-Y OUTPUT

~~~~~~0+H-----,

>--r~~-~~-oB-Y OUTPUT

,"IlICUHI o.Ll cop.cn ...n ULUfl
THAI< I 0 AilE IN .IC~OF"""O\
lOORCRUfERUE,"PI(O, .. R.. OS

U"lHS01He~.':>f
lfS~

Fig. I - Functional diagram of RCA-CA31 72_

FifJ. 2 - Schematic diagram for CA3 I 72.

a-y
OUTPUT

+24V

NOTE;

ALL CAPACITORS GIVEN IN pF
UNLESS OTHERWISE NOTED.
ALL RESISTANCES IN OHMS.

Fig. 3 - Static characteristics test circuit.

Fig. 4 - Dynamic characteristics test circuit.

_____________________________________________________________________ 421

CA3189E
ELECTRICAL CHARACTERISTICS, at T A

= 25°C, V+ = 12 Volts
LIMITS

TEST CONDITIONS

UNITS
Circuit
Min. Typ. Max.
or
Fig. No.

SYMBOL

CHARAC·
TERISTIC

Static (DC) Characteristics
Quiescent Circuit
Current

111

20

31

40

mA

VI

1.2

1.9

2.4

V

1.2

1.9

2.4

V

"><:6>--+- AUDIO

DC Voltages:
Terminal 1 (I F Input)

OUTPUT

Terminal 2 (AC
Return to Input)

V2

Terminal 3 (DC
Bias to Input)

V3

1.2

1.9

2.4

V

Terminal 15
(RF AGC)

V 15

7.5

9.5

11

V

VlO

5

Terminal 10 (DC
Reference)

2,6

No signal input,
Non muted

ALL RESISTANCE VALUES ARE IN OHMS

*1: PRI, -Qo(UNlOADEo)a 75(TUNES WITH 100 pF (el) 201 OF 34e ON

5.6

V

6

7132" DIA fORM
SEC. -Qo(UNLOADEO);;I75 (TUNES WITH 100 pF (e21 201 OF 34e ON
7132" DIA FORM
kQ(PER CENT OF CRITICAL COUPLING) iii 70 %

Dynamic Characteristics

(ADJUSTED FOR COIL VOLTAGE

lie 1~150 mV

ABOVE VALUES PERMIT PROPER OPERATION OF MUTE (SQUELCH) CIRCUIT

Input Limiting Volt·
age (-3 dB point)
AM Rejection
(Term. 6)
Recovered AF
Voltage (Term. 6)
Total Harmonic
Distortion:
Single Tuned (Term.
6)

"E~ TYPE SLUGS,SPACING 4mm

VI (lim)

AMR
VO(AF)

VIN =
0.1 V,
AM Mod.
= 30%

THO

25

!1V

45

55

-

dB

325

**C=O.OI JLF FOR 50 1-'5 OEEMPHASIS (EUROPE)
: 0,Ot5,..F FOR 75,.., DEEMPHASIS (USA)

Fig. 2 - Test circuit for CA3189E using a doubletuned detector coil.

mV

500 650

DC VOLTAGE SUPPLY V+"2V
AMBIENT TEMPERATURE (TA)-+25·C
TEST CIRCUIT SEE FIG. :5

VIN =
0.1 V

fmod' =
400 Hz,

1Il~
6

-

0.5

%

1

10

-10

~.

n

Iii

!~

Deviation
±75 kHz

THO

S+ N/N

Deviation Mute
Frequency

fDEV.

2

-

0.1

-

%

~~

-20

e

a

(PINIOTr:~1

6

g

~ 1~~t\l\1
1""'!t1E..~~o' p..1E..)

2:

TUNER AGC DC
VOLTAGE AT
TERMINAL No•• ,
(RIGHT CO-ORDINATE)

~

-30 f - -

~~-40
~

~ -50

2,6

65

72

-

dB

-60

_ .. _--1

V16

On Channel Step
V 12

VIN =
0.1 V

fDEV. <
±40 kHz

>

fDEV.
±40 kHz

-~-

~
-r~~~#1 cJl
c----t~\·~
'9"
10

fmod. = 0

12

(RECOVERED AUDIO FROM FULL
OUTPUT (LEFT CO-ORDINATE)

C~
~4

Signal plus Noise to
Noise Ratio
(Term. 6)

R F AGC Threshold

fO=10.7
MHz,

12

~ o SEE
~

*

Double Tuned
(Term. 6)

2,6

-

100
Ik
INPUT SIGNAL -,.V

-

10~

IOO~

4,6,7

-

±40

-

kHz

2,6

-

1.25

-

V

Fig. 3 - Muting action, tuner AGC, and tuning
meter output as a function of input
signal voltage.

6

-

0

-

V

DC POWER SUPPLY (V+)'12 V
AMBIENT TEMPERATURE (TA)-25·C
200 SEE TEST CIRCUIT,.,FIG. 3

-

5.6

-

1~
~ 150

5~.Q.

~A

... THO characteristics are essentially a function of the phase characteristics of the network connected
between terminals 8, g, and 10.

-50
CHANGE IN FREQUENCY

50

100

(6f)-~Hz

"0

Fig. 4 - AFC characteristics (current at Term. 7
as a function of change in frequency).

___________________________________________________________________ 423

CA3189E

...'"

,000000ATUII(

AUDIO
~

DEVIATION MUTE OETECTOR
AND AFC AMPlI.

Fig. 5 - Scho""'tic diagram of the CA31SSE

All RESISTANCE VALUES ARE IN OHMS
*L TUNES WITH 100pF (C) AT 10.7 MHz
OoCUNLOAOED)-7!5 (TOKO No. KACS K586HM OR EQUIVALENT)

*"'C~O.OI".F FOR 5O,.s DEEMPHASIS (EUROPE)
s O.OI!5".F FOR 75".1 DEEMPHASIS (USA)

Fig. 6 - Test circuit for CA3189E using a sing/etuned detector coil.

___________________________________________________________________ 425

CA3221G
Features:

TV Chroma Amplifierl
Demodulator

• Excellent linearity in de chroma gain-controlled circuit
• Improved filtering resulting in reduced 7_2-MHz output
from the color demodulators
• Current limiting for short·circuit protection
• Good tolerance to B+ supply variations
• Good temperature coefficient stability
• Gold·CHIP for increased reliability

Provides Complete System for Processing Chroma
When Used with RCA-CA3070 or CA3170
"G" Suffix Type-Hermetic Gold-CHIP in
Dual-I n- Li ne Plastic Package
The RCA-CA3221G is a monolithic silicon
integrated circuit.chroma amplifier/demodulator with ACC, saturation control, and killer
control for use in NTSC color TV receivers_
It is designed to function compatibly with
the CA3070 or CA3170 in a 2-package
chroma system. The CA3221G is functionally
identical to the industry standard CA3121,
but has a modified saturation control as
well as a modified color difference matrix.
The CA3221 G is supplied in the 16-lead
dual-in-line plastic package with a hermetic

Gold-CHIP (G suffix). The transistor chips
used in the hermetic' Gold-CHIP plastic
packages are of the sealed-junction type
designed to provide protection against the
deteriorating effects of humidity and other
surface contaminants without the need for a
hermetic package enclosure. The semiconductor junctions are sealed by utilizing a
silicon nitride passivation layer. A multilayered, highly corrosion-resistant, terminalconnection system of unique design is
employed.

MAXIMUM RATINGS at TA = 25°C
Supply Voltage "

.30V

.

Device Dissipation:

Up to T A = 55°C
Above T A = 55°C
Operating Temperature Range.
Storage Temperature Range
lead Temperature (During Soldering)
At distance 1/16" ±1/32" 11.59 ±o.79 mm) from ca.e for 10. max.

_ . . . . . . lW
derate linearly 10.5 mW/oC
. -40 to +85°C
. -65 to +1500 C

1'1

~

1500

1000

'00
100

200

soo

400

500

600

100

NTSC CHROMA INPUT SIGNALfTERM.2l-IIIV p_p 9lCS-22687

Fig. 2 - Typical A CC plot for the CA3221 G when
used with the CA3070.

Ace

INPUT

"T.

AMB'ENT

I:

I~

CHROMA
INPUT

I

i

I

I
I
I

I

I

CA322Ki

L ___ _
TO Ace a
APe DEl.
ON CA3070
OR CA3170

3

---.

AMPLIFIED CHROMA

f:6.N:-

'~~~~~;~~t'\~~
, DE"OCE.

INPUT

Fig. 1 - Functional block diagram of the CA3221G.

,

,
TERMINAL. VOLTAGE-Ydc

SATURATIOt-l REF. SUB CARRIER
CONTROL

:' ~'.;,;.' ~~.

:!~~PEC

tICS-501.

92CM-30137

Fig. 3 - Saturation control characteristic.

_____________________________________________________________________ 427

CA3221G

KILLER AOJ.

v+

CA3070

I
L ___

CA~~70

--1---'0
92CM-30142

Fig. 4 - Simplified functional diagram of a two-package TV chroma
'V_tem utilizing the CA3221G and CA3010 or CA3110.

Fig. 5 - Schematic diagram of CA3221G.

_____________________________________________________________________ 429

CA3221G
TO
TERM.'

I-Y
OUTPUT
KILLER

."

92CM-3013.

NOTE:

2,2·kO LOADS ONLY FOR TEST PURPOSE, 3,5-tlALOADS RECOMMENDED FOR APPLICATIONS.

RESISTANCE VALUeS ARE IN OHMS.
CAPACtTANCE VALUES ARE IN MJCROFARADS UNLESS OTHERWISE INDtCATED.

Fig. 7 -

TVpical characteri.ticl tat c;n:u;t for the CA322'G.

_____________________________________________________________________ 431

MOS Field-Effect
Transistors
Technical Data

_ _ _ _ _ _ _ _ _ _ _ _ _ 433

3N128, 3N143
SOUfiCE AND SUBSTRATE GROUNDED
AMBIENT TEMPERATURE ITAJ·2S·C

:'I'E..TO.SOIJ~CE 'lOLlS

(V6S)· ... 1

+0.5

0.'

-1.5

-2
5

10

15

,

-2.5
20

I)RAIN·TO·SOUACE VOLTS (VDS)

Fig. 4 .. Drain cuTten' vs. Jrain-to-source voltage

CJATEMTO·SOURCE VOLTS (vGsl

GATE-TO-SOURCE VOLTS (VGS '

Fig. S·Dra;n current vs. gate. to-source voltage (VGS)

Fig. 6· Forward transconductance vs. gate 6ios voltage

!COMMON-SOURCE CIRCUIT
SOURCE AND SUBSTRATE GROUNDED
AMBIENT TEMPERATURE ITAI~25·C
FREQUENCY (fl~ ZOO MHz
DRAIN MILLIAMPERES I 10) = 5

IIi.

5
DRAIN MILLIAMPERES

D.~,i .'LL"'''A'' '"D'

IIol

F;g. 7. ForwarJ transconductance vs. Jro;n current

Fig. 8 ·/nput admittonce vs. drain current

III,.

IS NEGLIGIBLE AT

ntis

10

IS

20

DRAIN-TO-SOURCE VOLTS (Vosl

Fig. 9· Input admittance

¥s.

Jrain·to"source volta,.

FRECUENCY

b"

-1.0

o

5

10

15

20

DRAIN-TO-SOURCE \/oLTS (VOS'
DRAIN MIl.l.IAMPERES lID I

ORAiN MILLIAMPERES 110)

FIg. 10· Reverse transaJmittance vs. Jro;n current

Fig. JJ .. Reverse transoJmittance vs. Jra;n"to-source
voltage

Fig. 12" Forward 'ransadmittance vs. drain current

...

~

f

...

t

;,

COMMON M SOURCE: CIRCUIT
SOURCE MD suaSYRAn GROUNDEO
AMalENT TEMPERATURE ITAI·25"
fREQUEMCT tn -200 MHz
DRAIII MIl.LlAMPERES tIo'·5

!ij
1~'

boo

'oo

,
(VDS'

F;g. 13-Forward fransoJm;ttance vs. drain-to-source
voltage

5
10
15
ORAIN·TO-SOURCl VOLTS tvos'

20

DRAIN MIl.l.iAMPERES IIDI

Fig. J4·0utput admittance vs. dra;n current

fig. JS·Oufput admittance vs. drain-to-source voltoge

______~-------------------------------------------------------------435

(1

3N139

SILICON MOS TRANSISTOR

FEATURES
N-Channel Depletion Type
e high input resistance
RGS 010 14 D typo

For Audio, Video, and RF AmplHier Applications in
Communications, Instrumentation and Control Circuits

elow input capacitance
C iss = 3 pF typo
•• Iow feed bKkl capacitance
erss = 0.2 pF typo

Maximum Rotings, Absolute~aximum Values:

RCA 3N139 is a silicon, insulated-gate fieldeffect transistor of the N""Channel depletion type,
utilizing the MOS'" construction. It is a general purpose
transistor especially suited for audio, video, and rf
applications, and for wide-band amplifierdesigns. The
insulated gate provides a very high input resistance
(J014 D. typJ which is relatively insensitive to tempera-

DRAIN-TO-SOURCE VOLTAGE. VDS' • •
DRAIN-T()..SUBSTRATE VOLTAGE. VDB +35.
SOURCE-TO-SUBSTRATE
VOLTAGE. VSB' •.•••••••••••• +35.
DC GATE~TQ.SOURCE VOLTAGE. Vas.
PEAK aATE-TO-SOURCE VOLTAGE. Vas
PEAK VOLTAGE. aATE-T0-ALL OTHER
TERMINALS; VOS. VaD. VOB. non~
repetitive • • • • • • . • • • • • • • • • • • •
DRAIN CURRENT. ID ••••••••••..

ture aDdis independent De gate-bias conditions (positive,
negative, or zero bias). The 3Nl39 also has a high
transconductance, a low value of input capacitance
(3 pF typJ, and. a very low feedback capacitance
<0.19 pF typJ.

+35 max.
-0.3 max.

V
V

• low gate leakage current
IGSS 00.1 "J. typo

-0.3 max.
±10 max.
±14 max.

V
V
V

.high drain-to-source voltage: +35 max. V

±42 max.

V

50 max. rnA

TRANSISTOR DISSIPA TION. PT:
At ambient temperatures up to 25°C. . . . .
330
mW
above 250C .........••..•.•.•.. Derate linearly at 2.2 mW/OC
AMBIENT TEMPERATURE RANGE:
Storage •••••••••
-65 to + 175
°c
Operating ••••
..a5 to + 175
°c
LEAD TEMPERATURE (During Soldering):
At distance not closer than 1132 inch to
seating surface for 10 seconds max•••
265 max. °c

The 3N139 is hermetically sealed in the standard
4-lead JEDEC TQ-72 package.

0

0

••

0

0

•••••

0

0

•••••

0

•

0

•

•

•

0

•

•

TERMINAL ARRANGEMENT

~
~

• Metal·Oxlde-Semiconductor

1 - Drain

2 - Source
3 - Insulated Gate
4 - Bulk (Svbstrate)
and Case

ELECTRICAL CHARACTERISTICS, at TIi. = 25° C Unl... Otherwi.e Specified. Bulk (Substrate) Connected to Source
TEST CONDITIONS

CHARACTERISTICS

FREQUENCY

DC
DRAIN·TO·
SOURCE
VOLTAGE

DC
GATE·TO·
SOURCE
VOLTAGE

DC
DRAIN
CURRENT

I

V..

ID

SYMBOLS

LIMITS
UNITS

V

Va'
V

Min.

Typ.

'DIOFF}

15

-8

-

-

50

.A

Zero-Bias Drain Current*

lOSS

15

a

5

15

25

mA

= 25°C

a

±10

-

-

1

nA

Gate Reverse Currant

IGSS
TAo = IOOGC

0

±to

-

-

100

nA

--6

V

pF

MHz

Draln·to-Source Cutoff Current

fA

~ata-to-Source

Cutoff Voltage

Small:.Signal. Short-Circuit
Ravene-Transfer Capacitance
(Drain-to·Gate)

0.05

-2

-.

1

15

5

0.05

0.2

D.•

12

-

3

10

Input Resistance

r;s

100

15

5

Input Capacitance

Ciss

100

15

5

k{l

DRAIN-TO-SOURCE VOLTS

-

'os

100

15

5

Output Capacitance

Cess

100

15

5

15

5

1 kHi!

9h

-

(Vos J

pF

Fig. 1 -

Output Resistance

Forward Transconductance

Max.

15

VGSIDFF}

C,ss

mA

6

-

kn

1.4

-

pF

5

-

mmho

I
.!...
§

Drain Current vs Drain Voltage

7 FREQUENCY (U-lkHz
DRAIN-TO-SOURCE VOlTS-15

6 AMBIENT TEMPERATUREITAJ·2S.C".O

",cf

.p'V

5

~

~

/'j

-:yJ:

,.

~~

4

-,
GATE-TO-SOURCE VOLTS (VGS

J

Fig. 2 - Drain Current vs Gate-to-Source Voltage

GATE-TO-SOURCE VOLlS (vGS 1

ORAIN MILLIAMPERES (I D J

Fig. 3 -

1 /( Hz forward transconductance vs drain current

Fig. 4 -

1 I-

."

o.
GATE No 2-TO-SOURCE
VOLTS't'lG2SI-- 1r-

I

.
5

o
-2

-I
0
1
GAT[ No. 1- TO-SOURCE VOLTS 1V61S1

Fig.7 -10

YO

-4

-3

VG1s •

-Z
-I
0
I
Z
3
GATE No.Z-TO-SOUACE VOLTS IVG2S1

Fig.8 -

..

o

S

10

15

OAAIN-TO-SOURCE VOLTS IVOsl

'0 vs VG1S-

Fig.9 - Yi5 vs

COMMON-SOURCE CIRCUIT
AMBIENT TEMPERATURE ITA)-2S-C
FREQUENCY It I >zoo MHI
DRAIN MILLIAMPERES 1101> 8
GIoTE No.Z-TO-SOUftCE VOLTS (\1625'>4

Of,

Vas·

CQWOH-SO/JRCE CIRCUIT
AMBIENT TEMPERATURE ITAI 'ZS"C
FREQUENCY m > 200 tIIHI
DRAIN MILLIAMPERES IIO'-8
~TE NO.2-TO~_SOURCE VO;!!I\lGzsl>"

~

i
~

lit ~

Or,'

i

~f

ffi

~

~
~
-'0

o

2345&78'IOIIIZI1415
DRA"'-TO-SOURCE VOLTS 1VosI

',.
•

~

ORAIN-TO-SOURCE VOLTS I\lOSI

~

-u

.;". "
7:1"t"

tt.

-,
0

•
'0
ORAIN-TO-SOURCE VOLTS IVosl

Fig.1I - YI. v, VOS'
Fig.J2 - Y'5
Vas·
Fig.JO.
Vas·
___________________________________________________________________ 439
Y05 V5

VS

3N142
Silicon MOS Transistor

Perlormance Features

N-Cho.no'Doplo.... T...

• Large dynamic range
• Enhanced signal.handling capability for low
cross-modula,jon
• Dual-polarity gate permits positi". and negati"e
swing without degradation of input impedance
• Reduced spurious responses in FM recei"ers
• Permits use of "acuum-tube biasing techniques
• Excellent thermal stability for critical oscillator
designs

For Industrial and Military Applications to 175 MHz
The-3N142 is a silicon. insulated-gate field-cffect
transistor of the N--channel depletion type utilizing the
Mo;- construction.
The-3N142 is intended primarily for use as thE' rf
amplifier in FM receivers and general amplifier applications at frequencies up to 175 MHz.
The wide dynamic range of the 3N142 reduces ('r088modulation effects in AM receivers and .minimizes the
generation of spurious responses in FM receivers.

Mo.imum Rotings, Ahsoll,lt.·Mox;mum ~'CJlues at TA '" 25° C

• DRAIN·TO-SOURCE
VOLTAGE. V.,s

·20

.DRAIN·TO-GATE
VOLTAGE, V()f;

\-

• GATE-TO-SOURCE
VOLTAGE, VI;S:

Deyice Features

Continuous .....
P('lIk II('

• 15

.DRAIN CURRENT, In
• ~tal-Oxide..semiconductO!'

\'
\'

. •.•.• +1 to-8

••••.

........

High input resistance - 1000 megohms
Low feedback capacitance - 0.35 pF max.
Low noise figure - 2.5 dB typo
High useful power gain neutraliz.ed - 16 dB min. at 100 MHz
• Hermetically sealed TO - 72 metal package

•
•
•
•

mA

50

-TRANSISTOR DISSIPATION, PT:
At ambient \ up to 25'-C , •.... :J:lO
mW
temperatures I above 25 C " " , . Derate lit 2.2mW/"C
Q

Applicafions
• RF amplifier, Mixer, and Oscillator in:
CB and Mobil. Communication Receivers
Aircraft and Marine Receiver.

CATV and MATV Equipmen.

.AMBIENT TEMPERATURE
RANGE:
Storage .. , . " .

TERMINAL DIAGRAM

Operating

-65 to +175

'C

-6500+175

'C

~
~

.. LEAD TEMPERATURE

(During Soldering):
At distances;:: 1/32" from seating
Burface for 10 seoonds max ... " 265

• Industrial Control Circuits
• Variable Attenuatars
• Current Limiters
• Instrumentation Equip ......
• High-Impedance Timing Circuits

·c

• In tlccordtmce with JEDEC Registrat.ion Dato Format J&-9
RDFl1-8

LEAD 1LEAD 2 LEAD 3 LEAD4-

ELECTRICAL CHARACTERISTICS, (A. TA - 25° C)
Measured uilh Substrate ConnC'ctC'tJ 10 Sourcl'

LJn/('ss

DRAIN
SOURCE
INSULATED GATE
BULK (SUBSTRA1E) AND CASE

Otht'ru'isf' t;pC'C'i{;C'(i

LIMITS
CHARACTERISTICS

SYMBOLS

CON OITION S

UNITS
Mm.

Gate Leakage Cunent

IGSS

Zem·Blas Drain Current··

lOSS

Drain'lo-Source Cutoff Currenl

11J{01l\

Gate-lo-50uree Culoll Voltage

VGS(olO

Forward Transconductance

gls

Drain·to-Source Channel ReSistance

rO~'nl

Small·Signal Shoft·Circult
. Reverse Transfer Capacttillfcet
Small,Slgnal Short·Cnculllnpul Capacitance

VOS • O. VGS • -8 V, TA - 15' C
VOS -0, VGS··8V, TA-125'C
,vOS' 0, VGS - d, TA - 150 C
VOS - 0, VGS - d, TA- 1150 C
VOS - 15 V, VGS - 0
VOS 10 V, VGS '-8V
VOS 15 V, 10 50 .. A
VOS - 15 V, 10 5 rnA, I I kHz
VOS - 0, VGS . 0, I I kHz

CISS

VOS' 15 V, 10·5 rnA, I· 0,110 I MHz

CISS

VOS - 15 V.ID 5 rnA, I - 0.110 I MHz

Input Adrnillane,

Vis

Common Soulce Configuration

Forward Transfer Admittance

Vis

Ottput Ad rnillanee

V's

Maximum Available Power Gain
Maximum Usable Power Gain

I· 100 MHz
VOS • 15V
10.5 rnA

T",
0,0001
0,0001

5

15

Max.
I
200
1
200

25

nA
nA
nA
nA
rnA

50

I'-A

-0_5
5000

-3
7500

0.10

0,22

0.35

5,5

7

-8
11,000

200

[1

MUG

17m~ :'~~Ii~:l:':)

G",

Noise Figure··

NF

II-

mmho

7.5-l0.9
0_21+l0_9

dB

16

l

mmho

dB

17

VOS - 15 V, 10 - 5 rnA, I -100 MHz

• In accordance with JEDEC Registration Data Format JS-9 RDF-llB

pF
mmho

-I
-I

VOS' 15 V, 10·5 rnA, I -100 MHz

pF

- 1 0.155+l3_451 -

~

(Fixed Neutralization)

V

I.mno

2_5

4

dB

Three·Terminal rvteasurement: Source Returned to Guard Terminal

··See Fie. 1

T1 N1 =6Turns.20TinnadCopperWire;W' 1.0. %" long
00 = 2IE, N1JN2" 4.85
T2 Nl + N4 = 6% Turnst'20 Tinned Copper Wire '4'. 1.0. ~ '6long
0 0 " ,90N,JN2" 1.9 Nl/N3'" 12.3 N,/N4=8

,

L ____________ ..J ________

~e!---..J

C,,,
C2"

g3:

+l6V

10 pF Variable Air Capacitor (Hammarlund Mac-10 or Equivalent!
5 pF Variable Air Capacitor IHammarlund Mac-5 or Equivalent!
~~~~~F Piston-Tvpe Variable Air Capacitor (Erie S35C or Equivalent)

,tcS-170$4

Fig. , - Tut Set Up for '00 MHz Insertion POWfN Gain and
Noise Figure

For characteristics curves, refer to types 3N128 and 3N143 _
______________________________________________________________________
441

3N153
FEATURES

SILICON INSULATED GATE FIELD·EFFECT TRANSISTOR

• excellent thermal stabilit,

N-Channel D.Plet~n~~TVIIeI

• virtually zero inherent offset voltage

RCA 3N153 is a silicon, insulated-gate field-effoct
transistor of the N-channel depletion type, utilizing the
MOS" construction. It is intended primarily for critical
chopper and multiplex applications up to 60 MHz.

The insulated gate provides a very high value of
input resistance (10 10 ohms typ) which is relatively insensitive to temperature and is independent of gate-bias
conditions (positive, negative, or zero bias>. The 3N153
also features extremely low feedback capacitance
<0.34 pF typ) and virtually zero inherent offset voltage.
This transistor features a Terminal Arrangement in
which the gate and source connections are interchanged
to provide maximum isolation between the output (drain)
and the input (gate) tenninals. Although this new basing
configuration does not appreciably change the measured
device feedback capacitance, it "Permits the use of
external inter-tenninal shields to reduce the feedback
due to external capacitances, particularly on printed
circuit boards. This feature makes it possible to minimize feedthrough capacitance.
The 3N153 is hermetically sealed in the JEDEC
T0-72 package and features a gate metallization that
covers the entire source-to-drain channel.

• low lealeage current: 50 pA max.

Maximum Ratings, A~"olut.-lttaKimum Values:

• low "on" resistance - 'DS(on)

(Substrate connected 10 source unless otherwise specified)

DRAIN-TO-SOURCE VOLTAGE, VDS ...
DRAIN-TO-SUBSTRATE VOLTAGE, VDB.
SOURCE-TO-SUBSTRATE
VOLTAGE, VSB' . • . . . . . . . . . . . . .
DC GATE-TO-SOURCE VOLTAGE, VGS.
PEAK GATE-TO-SOURCE
VOLTAGE, vGS...........

• high "off' r•• i.tanc. - RD5(off) = 10 10 II typo

+20, -0.3 max.
is, -8

V
V

e low input capacitance-Cin = 6 pF typo

±14

V

max.

(Pulse duration 20 rna, duty factor
mA

50

TRANSISTOR DISSIPATION. PT:

Air:b~e5ttote~~~t~.e~ .

. .. . . . .
400
max. mW
above 25°C •... __ . . . . . derate linearly at. 2.67 mW/oC
AMBIENT TEMPERATURE RANGE:
Storage . . . . • . . . . . . . . . • . . . . . . _ -65 to +175
°c
Operating .•.. , . • . • . . . . . . . . .
-65 to +175
°c
LEAD TEMPERATURE
(During soldering):
At distance ~ 1/32" to seatmg
surface for 10 seconds max. . , _ . . . .. 265
max. OC

• low f.edback capacitance-ern = 0.34 pF typo

APPLICA TlONS
• Choppers
e Multiplexers
• Servo Amplifiers
• Computer Operational Amplifiers
• Sampling Circuits
• Electrometer Amplifiers

TERMINAL DIAGRAM

~
~

• Metal-Oxide-Semiconductor

ELl!CTRICAL CHARACTERISTICS, at TA = 25°C, Un Ie .. Otherwls. SfMclfled. Substrate Connect" to Source.

CHARACTERISTICS

SYMBOLS

LIMITS
Type 3NIS3

TEST CONOITIONS

UNITS

Typ.

Max.

VGS =.S,-iV; Vas =OV; TA = 1SoC
VGS =.S,-8V; Vas =OV; TA = 11SoC

0.1

SO
I

pA
nA

100

300

fl

Min.

Gate·Leakage Current

IGSS

Static Drain-la-Source
"ON" Resistance

'OS(on)

VGS = OV, VOS = OV

Drain-la-Source
HOFF" Resistance

ROS(oli)

VGS = ·8V, Vas = • IV

Drain-to-Source

IO(oft)

VGS=-8V,VOS=.IV,TA = 1SoC
VGS=-8V,VOS=dV,TA =11SoC

0.1
0.1

Crss

VGS =·8V:VOS =OV, f = I MHz
Vas =ISV,lo =S rnA, f = I MHz

0.34

O.S

0.25

0.38

pF
pF

Ciss

VGS = -8V, Vas = OV, I = I MHz

S

8

pF

Small-Signal, Drain-to-Source
CapaCitance

Cds

Vas =OV, VGS =·8V, 1=1 MHz

3

pF

Zero-Gale-Bias
Forward Transconductance

gls

VGS = OV, Vas =. lSV

Oftset Voltage

Vo

VGS = .S,-8V; Vas = ov

Culolf Current
Small·Signal, Short·Circuit,
Reverse Transfer CapaCitance
Small~Signal,

Short·Circuit,

Input Capacitance

typo

V
V

DRAIN CURRENT. 10

£0.10) ••• • • • • . • • . • • . • • . • .

= 200Q

+20
max.
+20, -0.3 max.

10 9

10 10

10,000

1 - Drain
2 - Source

3 - InSOlated Gate
4 - Bulk (Substrate)
and Case

fl

I
I

nA
~A

JJ.mho
~"''''-TO-I..u.C£ VClLTS IVoSI

O·

V

teCB-I.'.!!

Fig.l - Drain current

VI.

Jra/n-to-source yo/tage•

• In measurements of Offset Voltage, thermocouple effects and contact potentials in the measurement setup may cause erronaoU$ readings of
1 microvolt Of more. These errors may be minimized by the use of soldel having a low thermal e,m.f" such as Leeds & NorthrUp No.107-1.0.1,
01

equivalent,

SUBSTRATE CONNECTEO TO SOURCE
DRAIN-TO-SOURCE VOLTS
AMBIENT TEMPERATURE ITA'·2S·C

' 10$, ...

ORAIN-TO-SOURCE MILLIVOLTS (VDS'

Fig.2 - Low-/eyel drain current
YB. droin-to-source yo/tage.

GATE-TO-SOURCE vOLTS (vO$)

Fig.3 • Drain-toosouree static resistance
Ys, gate-to-source yo/tage.

-------------------------------------------------------------------~

3N159

SILICON DUAL INSULATED·GATE FIELD·EFFECT TRANSISTOR

N-Cllannel Depletion Type

Fir M_ and Industrial Law·Naisl RF·ARI!Mr
Applications Up to • MHz

PERFORMANCE FEATURES

The 3N159" is an n-channel silicon, depletion type,
dual insulated~gate. fie1d~effect transistor utilizing the
MOS"'. construction. It has exceptional characteristics
for rf - amplifier applications at frequencies up to
300 MHz. This transistor features B series arrangement
of two separate chaMels, each channel having an
independent control gale.

• dual-got. permits simplified age circuitry

Type 3N159 has an exceptionally low..noisefigure, which
makes this type particularly suitable for critical vhf
applications.
When used in a common-sowce CODa
figuration in which gale No.2 is ac grounded, this device
reduces oscillator feedthrough to the anlenna thereby
minimizing oscillator radiation.
The 3Nl59 is hermetically sealed in the metal JEDEC
TO-72 package.

** Metal-oxide-Semiconductor.

• wid. dynamic raftl. pe,mlts la".... I.nal handling
before o .... ,I.ad
• Virtually no age power required
• .reatly reduce. spurious .... pon ••• in FM receiver.

MaxiMuM Rolin,., Absolute.oMaximum Values:

., TA ~ 2S"C

• permits use .f vacuum-tube biasing techniques

DRAIN-TO-SOURCE VOLTAGE, VDS ..•.•••• 0 to +20
GATE-No.I-TO-SOURCE VOLTAGE, VGIS:
Continuous (de) •.••.•.•••..•••.•••• -8 to +1
Peat ae •.•••••••••.•..•.•••••• -8 to +20
GATE No.2-TO-SOURCE VOLTAGE, VG2S :
Continuous (de) . • • • • • . • • • • • •• -8 to 40% of V DS
Peat ac •••••.•••.•••••••..•••.. -8 to +20
DRAIN-TO-GATE VOLTAGE:
VDGI 01' V DG2 ••..••••.• , ••••..••••••• +20

V
V
V

V
V

V

DRAIN CURRENT. '"
PUlsed: Pulse dUration ~ 20 ma,
duty factor ~ 0.15 •••.••.••••••••.•.••• SO rnA

TRANSISTOR DISSIPATION, P T :
At ambient } up to 25°C ••• . • • • • • • • • • • • • 400 mW
temperature.
above 25°C •••.•...•• derate linearly at
2.67 mW/oC

APPLICATIOHS
• RF amplifier in military and industrial communications
equipment
• alrc,.ft, marine and .,.hicular receivers

• CATV a.d MATY .qui"",•••

AMBIENT TEMPERATURE RANGE:
Storage and Operatinl .•.•••••••.••• -65 to +175 °c
LEAD TEMPERATURE (lhuiQlaoldel'iftc):
At diatanees > 1/32 inch from seating
sur(aee (01' lOaeconda max. • • • • • • • • • • • • • •• 26S °c

• .xcellent thermal stability
• superior cross.madulatlon p.rformance and greater
dynamiC ran,. than bipolar or ..In. I...... field ••Hect
transi.tors

DEYICE FEATURES

• low to" leak••e cu,rents - 'GI55 & 'G255 = I .A onax.
• high forward transconductance - = 7000 ... mho min.

'f.

• high unneutraliz" Rf pow.r lain - Gp• = 16.8 min. at 200 MHz
• low .hf nai •• figure - NF = 3.S dB max. a' 200 MHo

TERMINAL DIAGRAM

• telemetry and multiplex equipm.nt

ELECTRICAL CHARACTERISTICS,

01

TA = ~C unl .....h....i ••• p.clfied

CHARACTERISTICS

SYMBOLS

TEST CONDITIONS
Min.

Gate·No.l·to-Source Cutoff Vonage

VGIS(offj

Gate·No.2·to·Source Culoff Vonage

VG2S(011)

Gate·No.I·Leakage Current

IGISS

Gate·No.2·Leakage Currenl

'G2SS

Zero·Bias Drain Current

lOSS'

Forward Transconductance

(Gate·Mo.l·to·Orain)
Cutoff Forward Transcooductance
(Gate·No.l·lo·Orain)
Small·Signal, Short-Circuit
Input Capacitance'
Small-Signal, Short·Circuit. Reverse Transfer
Capacitance (Orain·lo·Gate NO.1)'

g,s
gfs(off)

Small·Signa I; Short-Circuit

(See Fig.! for Measuremert Circuil)
Measured Noise Figure

(See Fig.! lor Measurement Circuil)
pulse duration

Crss
Cos s

Qutput Capacitance
Maximum Usable Power Gain

* Pulse Test:

Ciss

<

20 ms, duty factor

MUG
NF

VOS· +16V, '0 • 200 ~A
VG2S • +4V
VOS c +16V, 10 • 200 ""
VGlS • 0
VGIS • ·20V, VG2~ • 0
Vn~ • 0, T • 25 C
VGIS • +IV, VG2~ ·0
VOS • 0, TA • 25 C
VGIS • ·20V, VG2S ·0
VOS ·0, TA ·moc
VG2S • ·20V, VGI~ • 0
VOS • 0, TA • 25 C
VG2 s· +1, VOS ·0
VGIS • 0, TA • 25 0 c
VG2S • ·20V, VGlS • 0
VOS ·0, TA ·moc
VOO - +I4V, VGlS - 0
VG2S • +4V
VOO • +14V, 10 • 10 mA
VG2S' +4V. f • I kHz
VOO· +14V, VGIS • -1l.SV
VG2S • ·2V, f • I kHz
VOS· +13V, 10 • 10 mA
VG2S • +4V, I • I MHz
VOS· +13V.IO ·10 mA
VG2S· +4V. f • I MHz
VOS • +llV, 10 • 10 mA
VG2S. +4V, f • I MHz
VOO • +ISV. RS • 270n
RG • son, f· 200 MHz
VOO • +15V, RS • 270n
1·200 MHz, Rc • son

LIMITS
3NIS9
Typ.

UNITS
Max.

·2

·4

V

·2

·4

V

I

nA

I

nA

0.2

~A

I

nA

I

nA

LEAD 1 LEAD 2 LEAD 3 LEAD 4 -

~
~

DRAIN
GATE No.2
GATE No.1
SOURCE, SUBSTRATE AND CASE

I

I

0.2

~A

5

18

30

mA

7000

10,000

18,000

",mho

100

",mho

3

5.5

7

pF

0.01

0.02

0.03

pF
pF

2.2
16

18

22

dB

2.5

3.5

dB

I

~---T-l--- 'f------ J
K

VAGC,±

O+---~"""I:~I

• Tubularceramic
.. Di$tceramic:
II Ferrite bead (1/2 used); Indiana General No. H 1142C{A-141) or
FU5H-Horequivalent.
t VHF plUII in so:kel J,HrOll C012·148.nd COnt49 (pari No.797H)
or equivalent.
Ct. C2: 1.5·5pFvariable air capacitor: E. F. Johnson Type 160·102
OI'equivalent.
Cr 1-10 pF piston-type variable air capacitor: JFD Type
VAM·OlO. Johanson Type 4335, or eqUIvalent.
Cf 0.3-3 pF piston·type variable air capacitor: Roanwelt Type
MH·13 01' equivalent.
Ll: 5 turns silver'plated 0.02" thick, 0.07,,·0.08" wide copper
ribbon. Internal diameter of wiooing = 0.25T~ wioomg
length approx. 0.65". Tapped at 1-1 2 turns Irom Cl end
of winding.
Lr Same as Ll except winding length approx. OJ"; no lap.

< 0.15 •

... Capacitance betw.en Gate N;'l and all other termj;;-als.

Fig.l - 200-MHz power "gain and noise-'igure
circuit
'fP. lH159.

_s'

'0'
_____________________________________________________________________ 445
• Three-Terminal Measurement with Gate No.2 and Source Returned to Guard Tenrlnal.

For characteristics curves refer to types 3N140, 3N141.

3N187
ELECTRICAL CHARACTERISTICS,

01

TA = 250 C unl ...

CHARACTERISTICS

SVMBOL

• Gat. No. 1·I.. Soorce Culoff Vol tag.

VGIS(off)

• Gal. No. 2·I.. Source Cutoff Vollag.

VG2l(oll)

" Gate No. I-Terminal Forward Current

IGISSF

• Gate No. I-Terminal Reverse Current

IGISSR

" Gate NO.2-Terminal Forward Current

IG2SSF

" Gate No. 2-Terminal Reverse Current

IG2SSR

" Zero-Bias Drain Current

lOS

Forward Transconductance

lis

(Gale No. 1·I.. Drain)

olh ••wise

spocili.d
LIMITS
Min. Typ, Max.

TEST CONDITIONS
VOS . . IS V, 10 = 50 ~A
VG2S =.4 V
VOS = .15 V, 10 = 50 ~A
VGlS = 0
VGIS =.1 V TA =250 C
VG2S = VOS =0 TA = 100 C
T = 2So C
VGlS =·6 V
VG2S = VOS=O TA-IOQoC
VG2S = .6 V TA =2So C
VGlS = VOs=O TA" 100" C
TA = 250 C
. VG2S =-6 V
VGlS =VOs=O TA-IOWC
VOS = +IS V
VG2S = .4 V
VGIS =0
VOS = +IS V, 10 - 10 mA
VG2S = +4 V, I = 1kHz

C'SS

• Small·Signal, ShOft·CircuilOulpulCapaei lane
Power Gain (see Fig. 1)
lMaximum Available Power Gain

Coss
GpS
MAG

Maximum Usable Power Gain (unneutralized)

MUG
IVlsl

• Pltase Angte of Forward TIOnsadmittance
Magnitude 01 Reverse Transadmittance

(J

Angle

01

V

-

50
S
50
S
50
S
50
5

nA

-

-

-

-.

-

-

-

-

16

-

VOS = +IS V, 10 = 10 mA
VG2S = +4 V, I =200 MHz

-

-

IS

6.0

2.0
18
20
203.5
12,00
-35
25
-25

-

1.0
2.8

IGISSF -IG2SSF = 100 ~A

6.5

10

IGISSR = IG2SSR '·100 ~A

-6.5 -10

'iss
'oss

" Output Resistance

-4

0.005 0.02

Its

" Input Resistance

-0.5 -2

4.0
VOS" +IS V,IO = 10mA
VG2S = +4 V, I - I MHz

IVrsl

Reverse Transadmillanee

-4

Gale-I.. Source
• Forward Breakdown Voltage:
Gat. No. I
Gal. No.2

VBR1GISSF
v(BR)G2SSF

Gale No. I
Gale No.2

'itBRl!>JSSR
v(BR)G2SSR

Gale-I..Source
• Reverse Brealldown Voltage:

.Limlted only by practical desran consuieratlons.
t Capacitance between Gate No.1 and all other lerminals
• Three·terminal measurement with Gate No.2 and
Source rerurned to Ifound terminal.
• In accordance with JEDEC Reelstration Data Format J5-9 RDF"J9A

~

~
;

I

~I

Gis

~

.-

10

'!
~

.i
~

nA

'0

S
10
15
ORAIN-TO-SOURCE: VOLTS (VDS'

~A.

Fig. 8. ris

nA

VI.

VDS

~A

rnA

pF

0.03

pF

-

pF
dB
dB
dB

22

4.5

dB

-

J.'mho

-

kfl

Degrees

DRAIN-TO-SOURCE VOLTS 1YOS)

Fig. 9. Y•• ••• VOS

p.mho
Degrees

kfl

-

V

-

V

IS

IS

10

DRAIN-TO-SOURCE VOLTS IVas)

Fig. 10- YI• • s. VOS

-SOURCE CIRCUIT,GATE No.1 INPUT

GATE No.1-VOLTAGE (vaIS' IS ADJUSTED
FOR 10 -10.. A WHEN Ye2s - 4 V
GATE No.2 AT ~-QROUNO POTENTIAL

I.

...

i

E No.2-TO-SOURCE

VOLTS ('16
0
-2

~

I

nA
~A

8.5

i37.5

~

g
~

GATE No 2-TO-SQURCE VOlTS 1V025,0+4

AMBIENT TEMPERATURE (TA"2e-C
DRAIN-TO-SOURCE VOLTS (Vos'eIS

d'

I
•
I•

12

FREQUENCY U1.1U)() MHI
DRAIN MILLIAMPERES 110" 10

OPERATING CONSIDERATIONS

"'.

I.

.
3

COMMON SOURCE CIRCUIT
AMBIENT TEMPERATURE ITAj'2S"C

~A

The flexible leads of the 3N 187 are usually soldered to the
circuit elements. As in the case of any high·frequency
semiconductor device, the tips of soldering irons MUST
be grounded_

AM_NT TEMPfRATlItE CTA"25-C
DRAIN-TO-SOURCE VOLT. (Vos'·"

I,

30

V

~ 1.2

7000 12,000 18,000 p.mho

NF

Noise Figure (see Fig. 1)
" Magnitude of Forward Transadmittance

-0.5 -2

5

• Small·Signal, ShOfI-CircuitinpulCapaeilaneet Ciss
• Small·Signal, Shorl·Circuil,
Reverse Transfer Capacitance
(Orain-I.. Gate No. 1).

UNITS

1--1

I ...•

-.

0
-I

0

I

GATE No. 1- TO-SOURCE 'IIOLTS IYOIS'

Fig. 6- '0 .s, VGIS

-3-2-10123
GATE No.2-TO-SOURCE VOLTS (VG2S'

Fig. 7-'0

.s. VG2S

Fig. 11- Y.. ••• VOS

.........................................................................................................................................................................._447

3N187

-I
GATE NO. 2-TO-SOURCE VOLTS IVSUI

FI,. 24·

g,. an" 'D ••. VG2S

-I

+1

lATE NO.I-TO-IOUICI VOt.TI I Vels)

Fi,. 25•• ff.... VGIS

Fig. 26· "'2 ••. VG2S

___________________________________________________________________ 449

3N200
ELECTRICAL CHARACTERISTICS
TA " 25°C

LIMITS
SYMBOLS

III

TEST CONDITIONS

unl.ss otfJerwis. specifieJ

·

Typ.

Max.

UNITS

O.50~

VGIII;ofn

VOS· -\5 V, 10' SOI"A
VG2S =. _4 V

-0.1

-I

-3

V

Gate No. No-Source Cutoff Voltage

VG211;01l)

VOS = -IS V, 10 =SOI"A
VGIS = 0

-0.1

-I

-3

V

IGISSF

VGlS=-IV TA =25°C
VG2S=VOS'0 TA = 100°C

Gate No. \-Terminal Reverse Current

IGISSR

VGlS=-6V
TA = 25°C
VG2S = VOS = 0 TA = loooe

Gate No.2-Terminal Forward Current

IG2SSF

VG2S = -6V TA=25 0 C
VGIS =VOS =0 TA= 100°C

Gate NO.2-Terminal Reverse Current

IG2SSR

TA = 25°C
VG2S=-6V
VGIS = VOS =0 TA = 100°C

Zera-Bias Drain Current

lOS

VOS = +15V, VGIS =0
VG2S = +4V

Noise Figure (see Fig. I)
Bandwidth
Gate-ta-Source Forward
Breakdown Voltage

Gate-ta-Source Reverse
Breakdown Voltage

f = 1kHz

Crss

-

-

50
5

nA
/LA

50
5

nA
/LA

-

-

-

50
5

nA
/LA

50
5

nA
/LA

0.5

5.0

12

rnA

-

4.0

6.0

f = I MHz 0.005

pF

8.5

0.02

pF

0.03

Coss

-

2.0

-

pF

10

12.5

-

dB

-

3.9

6.0

28

-

38

dB
MHz

6.5

-

13

V

fG1SSR =
IG2SSR' VG2S=VOS=0
-6.5
lOO/LA
VG1S = VOS' 0

-

- 13

V

Gate No. I

V(BR)GISSF

Gate No.2

V(BR)G2SSF

Gate No. I

V(BR)GISSR

Gate No.2

V(BR)G2SSR

-In accordance witn JEDEC ,elisl'Mion data fOfm.t
(Js-9RDF.19A.j

~
~

o

-ooug
-0.5115

AUTOMATIC GAIH COtfTROL VOLTS (VAGC)

Fig. 5- VAGC

YS.

VG1S

DRAIN IIIILUAMPaES 'Iol • 10
GATEMO. Z·fO.SOURCE YOLT5("G151-.

g

!

~

ie

~

J.

.,

L

~,
i
•

15

"

.
~

~

~

I

GpS
NF
BW

~

0.25

AllIIII!MTTE.'!IlATUfI!IT"I- 25"'C
FlEQUEMCYlfI- 4DOIIHa

10,000 15,000 20.001 /L mho

Ciss
VOS = +15V
10=IOmA
VG2S = +4V

",,,

~

Gate No_ I-Terminal Forward Currenl

gfs

AMBIEHTTEMPERATUAE(T,t,)·Z5OC

MAJ(. POWER GAIN (Gpl). (IdS

Gate No. I-to-Source Cutoff Voltage

Forward Transconductance
(Gate No. I-to-Orain)
Small-Signal~ Short-Circuit Input
Capacitance
Small-Signal, Short-Circuit,
Reverse Transfer Ca~acitance
(Orain-to-Gate-No. I)'
Small-Signal, Short-Circuit Output
Capacitance
Power Gain (see Fig. I)

··

Min.

f =400 MHz

IG1SSF =
IG2SSF = VG2S =VOS' 0
lOO/LA
VGlS = VOS = 0

6

•

111

12

DRAIM·To.SOUItCEVOLTS(Vosl

t Capacitance between Gale No.1 and all other terminals.
.Th,""termuI.1 measurement with Gate No.2 and
Sa.. ce I.t,"ned to lUard term",.I.

10
12
DRAIN-To.SClURCEVOt.TSlvDV

Fig. 7 - YOS

AIIIIIEHTTEfIIPERATURE{TA"25"C
ClATEMO.2·TO-SOORCEvoLn,vC2SJ'4

V5.

VDS

AMBIENTTE,IIPERATURE(TA}=25OC

rREIlUENCY(I)·400MH.

GATEtta. I·TO·SOURCE YQLTS(VGIs!: 0.1

DRAINMILLIA/IIPERE5UO)·IO
GATE NO. 2-TO·SOURCE VDLTS (VoZs) -.

,.'
AMBIEHTTEMPERATURE{T ... ).2SO(

DR ...... ·TQ.SOURCEVOlTS(VOS)·IS

-G.2

.
_2

6

F;g. 3 - '0

YS.

VG2S

8

10

12

DRA'H-TO-SOLRCEvOLn(vOY

G"TEIOO. 2·TO·WURCE YOLTS(VC2S'

Fig. 4 - '0

YS.

VOS

ORAIH.TO·SOURCEVOLTSIVOS)

Fig. 8· Y/s vs. VDS

_____________________________________________________________________

~1

3N204, 3N205, 3N206
Features:

Silicon Dual-Insulated-Gate
Field-Effect Transistors
With Integrated Gate·Protection Circuits
For VH F TV Applications

•
•

Low Crss - 0.03 pF max.
High IVfsl- 14 mmho typo for 3N204 and 3N205

•

Integrated gate·protection diodes

MAXIMUM RATINGS,

Absolute Maximum Values at TA = 2!PC

* DRAIN·TO·GATE No.1 VOLTAGE
* DRAIN·TO·GATE No.2 VOLTAGE.
* DRAIN·TO·SOURCE VOLTAGE

3N204 - RF Amplifier
3N205 - Mixer
3N206 - TV I F Amplifier
The RCA·3N204, 3N205, and 3N206 are
n·channel silicon, depletion type, dual·insu·
lated gate, field·effect transistors intended
for vhf TV applications. Integrated back·
to· back diodes protect the gates from ex·
cessive input voltages.
The 3N204 is intended for use in vhf rf
amplifiers and delivers linear, low·noise ampli·
fication. I ts extremely low feedback capaci·
tance allows high·gain stable operation with·
out neutralization. The 3N205 is specified for
low noise vhf mixer applications. The 3N206
is intended for use in tuned high·frequency
amplifiers such as TV if strips.

30
.

25
10
10
-10
-10
50

*

*

*

Above T A

*

=

360
2.4
1.2

25°C derate linearly

Up to TC = 25°C
Above T C == 25°C derate linearly .
AMBIENT TEMPERATURE RANGE:
Operating . .

Storage.

.

.

•

.

..

V
V
V
rnA
rnA
rnA
rnA
rnA

30

.
• GATE NO.l·TERMINAL FORWARD CURRENT.
• GATE NO.2·TERMINAL FORWARD CURRENT·
• GATE NO.l·TERMINAL REVERSE CURRENT
GATE NO.2·TERMINAL REVERSE CURRENT
CONTINUOUS DRAIN CURRENT
DEVICE DISSIPATION:
Up to T A = 25°C •

rnW
rnWJDC
W
mWf'C

8

...

* LEAD TEMPERATURE (DURING SOLDERING):
At distance 1/16 ± 1/32 inch 11.59 ±0.79 rnrn)
from case for 10 seconds max. .

-65 to +175
-65 to +200

°c
°c

+300

°c

... Forward gate-terminal current is the current into a gate terminal with a forward-gate-to-source voltage applied.

This voltage is of such polarity that an increase in its magnitude causes the channel resistance to decrease.
• In accordance with JEDEC registration data format (JS-9 RDF-19B)

OPERATING CHARACTERISTICS at TA = 25 0 C

CHARACTERISTIC

TEST CONDITIONS

LIMITS
Min.

Typ. Max.

UNITS

3N204
• Common·Source Spot Noise
Figure, NF

*

Small·Signal Common·Source
Insertion Power Gain, G ps

*
*

Bandwidth, BW
Gain·Control Gate·Supply
Voltage, VGG(GC)

-

-

3.5

20

-

28

dB

7

-

12

MHz

0

-

-2

V

-

-

5

dB

14

-

-

dB

dB

VDD=18 V, VGG=7 V,
f = 200 MHz, See Fig.13
VOO=18 V, l'>G ps =-30dB,1
f=200 MHz, See Fig. 13

*

Common·Source Spot Noise
Figure, NF

*

f = 450 MHz,lO = 10 rnA,
Small,Signal Common Source
See Figs. 15 and 16
Insertion Power Gain, G ps

*

Small-Signal Conversion
Power Gain, G ps (conv)

VO=15 V, VG2S = 4 V,

DRAIN-TO-SOURCE VOlTS (VOS)

Fi9.1 - Drain current vs. drain-to-source volts
(pulse-tested with pulse duration ==
300 IJ.S, duty cycle <;;'2%).

3N205

Bandwidth, BW

VOO=18 V, fLQ=245 MHz,3
fR F=200 MHz, See Fig.17

17

-

28

dB

4

-

7

MHz

-

-

4

dB

25

-

35

dB

3

-

6

MHz

-1.6

-

0.6

V

3N206

*

Common·Source Spot Noise
Figure, NF

• Small·Signal Common·Source VOO=24 V, VGG=6 V,
Insertion Power Gain, G ps
f=45 MHz, See Fig. 14

*

Bandwidth, BW

*

Gain·Control Gate-Supply
Voltage, VGG(GC)

VOO=24 V, l'>G ps =-3OdB,2
f=45 MHz, See Fig. 14

GATE No·' -TO-SOURCE VOLTS (VGIS)
92CS-27948

*In accordance with JEDEC registration data format (JS-9 RDF-19B)'
1.

6G ps

is defined as the change in G ps from the value at V GG "" 7V.

2. OOps is defined as the change in G ps from the value at VGG = 6V.
3. Amplitude at input from local oscillator is 3 V RMS.

Fig.2 - Drain current vs. gate-No.l-to-source volts
(pulse-tested with pulse duration == 300 IJ$,
duty cycle

<;;, 2%).

________________________________________________________________

~3

3N204, 3N205, 3N206

'0

·

"

GATE No,2-l0-SOURCE VOLTS IVG2SI

FREQUENCY ItI-MHz

92CS-279:i4

Fig.9 - Ciss .s. VG2S

Fig.8 - Y OS .s. V G2S

Fig. 7 - Yos vs. f

VGG

...,
I
I

I

r---'lN'v-~~~-=f-.r--l--"?""--"""""~·U
\ 'f
I

I
I
I
__J

27

: PFl

GATE No.2-TO-SOURCE VOLTS IVG2SI

L __

Fig.10-CO. . " · VG2S
NOTE:

CI. C2,

a

LOAD

I

......r.;"'"'--'<--l--------1\ .

FROMeO.Q.~f
SOURCE

r

'f~"~11

I

I

I

I
I
I

270.n

L __

NOTE:
CI: L£AOLESS DISC
C2:LEADLESS DISC
LI:8 TURNS No. 28
L2:9 TURNS No.28

I
I

I---J
CERAMIC, O.OOI"F
CERAMIC, O.OIp.F
WIRE. 5/32 INCH-DIA. FORM, TYPE "J" SLUG
WIRE, 5/32 INCH-OIA.FORM, TYPE "J"SLUG
92CM-27959

DRAIN CURRENT 1D:".

Fig. 13 - Gps ". ID

9ZCS-279!18

Fig. 14 - -45-MHz power-gain and noise-figure test circuit for 3N206*.

*

In accordance with JEDEC registration data format (JS-9 RDF-19B).

________________________________________________________________

~5

3N204, 3N205, 3N206

FROM!M>Q

SOURCE

NOTE:

FOR TEST FIXTURE. HE PICTORAL. DRAWING IN FIGURE II
CI THRU C4 :SU: FIG""E II. NOTE 0
C5: 0.001 ~F LEAOLESS DISC CAPACITOR
C8 THRUCIO'ALLEN-8RADLEY F!lAU 0.001",' FEED-THROUGH CANCITORS,OR EQUIVALENT

LI • L2: SEE FIGURE 18

Fig. 16 - -46(J..MHz power.gain and noise-figure test circuit for 3N204* •
• In accordance with JEDEC ragistration data format (JS-9 RDF-19BI_

V DD
110

2.2 of

Ito.

I- ~

1

3N200

________

45 MHz

~T~~~t
11

10

'0

CI

C2
91

to

t·OOl",F

NOTE:
C1: ARCO<462, 5-80 pF, or EQUIVALENT
C2: ARC0460, 1.5-16 pF. OR EQUIVALENT
L1: 4TURNSNo.14WIRE.1/4INCH INSIDEDIA.

T1: PRI: 16 TUANS No.30WIRE CLOSE WOUND
ON 114 INCH DIA. FORM, TYPE "J" SLUG
sec: 5 TURNS Na.30 WIRE CENTERED
OVER PRIMARY

Fig. 17 - -200 MHz-to45-MHz circuit for conversion power gain for 3N205*.
'" In accordance with JEDEC registration data format IJS-9 RDF-19B).

__

~

______________________________________________________________ 457

3N211, 3N212,3N213

II ....

ELECTRICAL CHARACTERISTICS, At T A = 25°C (unless otherwise specified)
CHARACTERISTIC

*

Drain-to-Source Breakdown
Voltage, V(BR)DS

*

Gate No.l-to-Source Forward
Breakdown Voltage, V(BR)G1SSFl

*

Gate No.l-to-Source Reverse
Breakdown Voltage, V(BR)G1SSRl

TEST CONDITIONS

IIENT TEMP£RATURE (Toll- 25·C
DRA'fI!- TO-SOURCE VOLTAGE 'Vosl-

LIMITS
MIN. MAX.

!C fRIEO~NCY {fl_ t kH~

UNITS

27
27
35

-

V

IG1=10mA, VG2S=VDS=0

6

-

V

V

tt:t±:ttr:t:!:± tn-::t:
:~_.;..

+

4

~::+ l!t!

!

i

r

-6

-

V

6

-

V

IG2= -10mA, VG1S=VDS=0

-6

-

V

VG1S=5V, VG2S=VDS=0

-

10

-

-10

nA

-10

pA

-

10

nA

-a~

t:

. + :.::-~ ~:
.::t1:::;'::::j.;~

V

bJitg -: .: ~trp~

j

u.~ti1·.j:itt;.

C!l

~
IG1= -10mA. VG2S=VDS=0

t~

.

f

3N211
VG1S=VG2S= -4V 3N212
3N213
10 = 10pA,

~

0

-,

o

-1-1---<-+

......

t

':: :-;::
•

~+-T

.... ~

4
~
GATE Ho.2-TO-SOURCE VOlTAGE 'VG2St-V
I

2

3

Fig. 5-IYfslvs- VG2Sfar3N211and3N212_

*

Gate No.2-to-Source Forward
Breakdown Voltage. V (BR)G2SSFl

*

Gate No.2-to-Source Reverse
Breakdown Voltage, V(BR)G2SSRl

*

Gate No.1-Terminal Forward
Current,IG1SSF

*
*

Gate No.1-Terminal Reverse
Current, IGl SSR

*
*

VG2S=5V. VG1S=VOS=0
TA=25°C

-

-10

nA

VG1S=VOS=0

T A=150°C

-

-10

pA

Zero-Gate No.1-Voltage
Orain Current. IOS2

VOS=15V. VG1S=O,
VG2S=4V

40

mA

Gate No_l-to-Source Cutoff

Gate No_2-to-Source Cutoff

Small-Signal Common-Source
Forward Transfer Admittance,

Small-Signal Common-Source
Reverse Transfer Capacitance,
Crss

,1:+
oR
-I

VG2S= -5V,

IVfs l3

*

TA=150°C

Gate No.2-Terminal Reverse

Voltage, V G2S(off)

*

TA=25°C

VG2S=VDS=0

nA

Current, I G2SSR

Voltage. VG1S(off)

*

VG1S= -5V,

Gate No.2-Terminal Forward
Current, IG2SSF

*

IG2=10mA. VG1S=VDS=0

6
3N211

-0.5 -5.5

3N212

-0_5

3N213

-0_5 -5_5

3N211

-0.2 -2.5

VG1S=0.
ID=20pA

3N212

-0.2

--4

3N213

-0.2

-4

VOS=15V.

3N211

17

40

VG1S=O,
VG2S=4V,
f=l kHz

3N212

17

40

3N213

15

35

0_005

0.05

VDS=15V,
VG2S=4V,
ID=20pA

VDS=15V,

-4

:..•

:::.I:!±t±

-:E if::
0
1
2
3
GATE No. 2-TO-SOURCE VOLTAGE (vG2S)-V

Fig_ 6 - Iy fsl vs_ V G2S far 3N213.

V

V

lATE No.I-TO-SOURCE VOL.TAGE (V6ISI-V

mmho
Fig.l-IYfslvs. VGIS f or 3N211,and3N212.

VDS=15V. VG2S=4V.
ID=lmA, f=lMHz

*In accordance with JEDEC registration data format (JS-9 RDF-198L

pF·

1I

~=II:~io~i~:~:T~:Ti~A~t~:;I: t~
30 FREQUENCY (fl- t kHz

i-! e

V

GATE-Ho.2-TO-SOURCE
VOl.TAGElVo2SI-4V

~ 20

1. All gate breakdown voltages are measured while the device is conducting rated gate current.
This ensures that the gate-voltage-limiting network is functioning properly.

i

2.

2. This characteristic must be measured using pulse techniques hW = 300$£5, duty cycle ~ 2%13. This characteristic must be measured with bias voltages applied for less than 5 seconds to
avoic4 "",""fleating. The signal is applied to gate No.1 with gate No.2 at ae ground.
-05'01 0'01

-I
-D.!
0
o.~
t
t.!
GATE Ho.I-TO-SOURCE VOLTAGE ("Glsl-v

-I.!

Fig. 8- IYfsl vs. VG1S far3N213.

________________________________________________________________

~9

3N211, 3N212, 3N213
Voo
470

r--~H

I

8.2

I

470
pF

-H-l

r~oOi"
I
,.F

Mn

1

I

390Q

5.6

Mn

I

I
I

FROM son
SOURCE

5PF

~
I
I

I
L_~
NOTE:
CI: LEADLESS DISC CERAMIC, O.OOII'F

C2: LEADLESS DISC CERAMIC. O.OI,...F
LI: 8 TURNS No. 28 WIRE. 5/32 INCH-CIA. FORM, TYPE "J" SLUG
L2:9 TURNS No. 28 WIRE, 5/32 INCH-CIA. FORM, TYPE "J" SLUG

* JEDEC

REGISTERED DATA - JEDEC RELEASE No. 6438.
92CM-26J77

Fig.10-4S MHz power gain and noise figure test circuit for 3N211 and 3N213*.

TEST CIRCUITS (CONT'DI

110

.n

1----1
I

C2Ii 2

110

200 MHz

50n

LIpFO.OOI,.F

.n

I'
I

L_

L2

__

NOTE 0
L1: 7 TURNS No. 34 WIRE, 114 INCH OIA. ALUMINUM SLUG
L2:5 1/2 TURNS No. 20 WIRE, 1/4 INCH OIA. ALUMINUM SLUG
L3: 7 TURNS No. 24 WIRE, 1/4 INCH OIA. AIR CORE
TI: PRI: 25 TURNS No. 30 WIRE CLOSE WOUND ON 1/4 INCH OIA. FORM, TYPE .JM SLUG
SEC: 4 TURNS No. 30 WIRE CENTERED OVER PRIMARY

g~:: ~~~ :;PLEE:~~ES~-~~~F
C3:0.01I'F LEADlESS OISC

* JEDEC REGISTERED DATA - -

92CM-26J78

JEDEC

RELEASE No. 6438.

Fig.I'-200 MHz-to-45 MHz circuit for conversion power gain for 3N212*_

___________________________________________________________________ 461

40468A,40559A
MOS Silicon Transistors

Device Features:

N-Channel Depletion Types

For RF Amplifier and Mixer Applications
in FM and AM/FM Receivers

- high 1orw_rd tnlnsconductMce - gfs - 7500 /UIIho typo for 40468A

-low feedback apllCitance - -

Performance Features:

en. - 0.35 pF mIIX. for 40468A

• reduced spuriow responses in FM tuners
_ ravena bias on IUbstnne improveslin....ity

RCA-40468A and 40559A are silicon insulated-gate
field-effed transistors of the n-d18nnel depletion type
utilizing the MOS" construction. They are intended
primarily for use 8S the rf amplifier and mixer, respec-

0.38 pF

mIIX_

for 40669A

- high useful power gains - neutralized· 17 dB typo
unneutl1llized - 14 dB typo

_ reduced c:ross-modulltion effects in AM recaiven

tively. in FM receivers covering the 88 to 108 MHz

o hermetically IOOlocI in TO·72 metal pocklllJO

MeI.illutlll Ratings, Absolule-A./aximuffl Values at T" = 25°C:

band, but can be used for general amplifier applications
at frequencies up to 125 MHz. For circuit design and
typical performance data refer to RCA Application Note
AN3535 .. An FM Tuner Using Single-Gate MOS FieldEffect Transistors as RF Amplifier and Mixer".

DRAIN-Tt)-SOURCE VOLTAGE, VOS . . . . . •

+20

V

DRAlN-To-GATl-: VOLTAGE. Voe

+20

V

TERMINAL DIAGRAM

+ I. -8

V

± 15

V

~
~

.......

GATE-T(}..SOURCE VOLTAGE, Vas:
CONTINUOUS (dc~ . . • . . . . . . . . .
PEAK ftc. . . . • • . . . • . . . . . . • • . . • . .

The wide dynamic range of these transistors re-

DRAIN CURRENT. 10 . . . • • • . . • . . . . . .
25
mA
TRANSISTOR DISSIPATION:
At ambient } up to 2SoC.. .... ..
330
mW
temperatures above 2SoC • • • • •
clerllll." lit 2 2 mW/oC
AMBIENT TEMPERATURE RANGE:
Storage. . . • . . . . . . . • . • . . . • . • • . . -65 to + 175°C
Operating . . . . . . • . . . • • . • • . . . . . . -65 to + 175°C
LEAD TEMPERATURE (During Soldering):
At distances not closer than 1/32 inch. to
seating surface for 10 seconds maximum.
°c
265

duces cross-modulation effects in AM receivers and
minimizes the generation of spurious responses in
FM receivers.
Operating as a neutralized amplifler at 100 MHz. the
40468A can provide a power gain of 17 dB (typ.). A
power gain of 14 dB (typ.) can be realized without
neutralization.

LEAD 1 - DRAIN
LEAD 2 - SOURCE
LEAD 3· INSULATED GATE
LEAD 4 - BULK (SUBSTRATE) AND CASE

* Metal...()xide-Semiconductor.

ELECTRICAL CHARACTERISTICS, at TA = 25a C
With Bulk (Substrate) Connected to Source Unle .. Otherwise Specified

TEST CONDITIONS
Characteristics

Symbols

Frequency

DC
Drain·toSource

f

viis

MHz
Drain-la-Source Cutoff Current
Gate Leakage Currenl

10(011)

Zero· Bias Drain Current

V

lOSS

mA

0
0
15

=·8V
VGS =·8V
VGS =+IV
VGS =0

12

IGSS

LIMITS

DC
Urain
Current
10

RCA-40468A
RF Amplifier
Min.

Typ.

VGS

5

1 kHz

15

5

7500

Small-Signal, Shorl-Circ,it
Reverse-Transfer Capacitance
(Orain·lo-Gate)

Crss

1

15

5

0.25

Inp,1 Capacitance

Ciss

1

15

5

5.5

Outp,1 Admittance

-

Vis
YI.
Yos

RF IMi'"
100 MHz
100 MHz
100z 1 10.7
MHz MHz

15
15

RF Mixer
5
3
5
3

15

5

3

Max.

100

500

1.

1
1

nA
nA

30

mA

1

gfs

Units

M~er

Max. Min. Typ.

15

Small-Sijp1al, Shorl-Circuit
Forward Transconductance

Admittance
Inp,1 Admittance
Forward Transfer Admittance

RCA-40559A

30

5

15

pA

pmho

0.35

0.25 0.38

5.5

-

-

pF
pF

-

mmho
mm 0

0.155 + j 3.45
7.4 +·0.9

0.14 + j 3.38

0.21 + j 0.9

0.076 + j 0.153

mmho

280tr

pmho

Forward COIlversion Transconductance

gfs(C)

1 kHz

15

3

Maximum Available Power Gain

MAG

100

15

5

26

dB

Maximum Usable Power Gain
(Unneutralized)

MUG

100

15

5

-

14

dB

Maximum Usable Power Gain
(Neutralized)

MUG

100

15

5

14

17

dB

Maximum Available Cgnversion
Gain

MAGe

lin = 100
lo,t =10.7

15

3

Noise Figure

NF

100

15

5

*

22
3.5

5

dB
dB

Bulk (Substrate)-to-Soorce Volts (VBS) :: -3.

For characteristics curves, refer to types 3N128 and 3N143.

____________________

~

_____________________________________________ 463

40603,40604

SILICON DUAL INSULATED·GATE FIELD·EFFECT TRANSISTORS
M·Channel Depletion Types
For FM , aner Applicatiols

• dual gates allow product mixing with extremely low
harmonic generation
• greatly r.duc." spurious r •• ponses in FM receivers

RCA 40603 and 40604 are ft¥channel silicon, depletion type, dual insulated-gate, field-effect transistor!;

• permits use of vacuum-tub. biasing techniques

utilizing the MOS construction.
These devices have exceptional characteristics for
rf-amplifier (40603) and mixer applications (40604) in
FM tuners and other 'commercial equipment operating
at frequencies up to approximately ISO MHz. These trElD-

• excellent thermal stobi lity
• sup.rior cross-modulation performance and great.r dy_
namic range than bipolar and singl.-gat. field •• ffect
transistors

MaxiMum Ratings, Absolute-Maximum Values at TA = 2SoC:

sistors feature a series arrangement of two separate

channels. each channel baving an independent control
gate. For amplifier applications the 40603 with its wide
dynamic range provides substantially better cross-modulation performance and relative freedom from spurious
responses than is obtainable with bipolar or single-gate
field-effect transistors. The mixing function performed
by the 40604 is unique in that the signal applied to gate
No.2 is used to modulate the input-gate (gate No.1)
transfer characteristic. This technique is superior to
conventional "squbre law" mixing. which can only be
accomplished in the non-linear region of the device transfer characteristic.
Because of the low feedback capacitance (0.02 typo
pF) the 40603 can provide a power gain of 25 dB (typ.)
at 100 MHz in an unneutralized amplifier circuit.
The gain of the ~f stage can be controlled by applying age:: voltage to gate No.2. Virtually no age power is
required for full gain reduction.
The 40603 and 40604 are hermetically sealed in
JEDEC TO-72 packages.

ELECTRICAL CHARACTERISTICS,

PERFORMANCE FEATURES
• large dynamic range permits large.signal handling before overload

DRAIN-TO-SOURCE VOLTAGE, VDS' •..
GATE No.l-TO-SOURCE VOLTAGE, VGlS:
Continuous (de) . . . . . . . . . . • . . . . .
Peak ae . . . • • • . . . . . . • . . . . . • . .

o to +20

v

-8 to +1
-8 to +20

v
V

GATE No.2-TO-SOURCE VOLTAGE, VG2S:
Continuous (de) • • . • • • • . . . . . . • • . -8 to 4D"!G of VDS V
Peak ae . . . • • • • . • • . . . . • • . . • •.
-8 to +20
V
DRAIN-TO-GATE VOLTAGE,
VDGI or VOO2 . • . . • • • . . . • • • • . . •
v
'20
DRAIN CURRENT, ID (Pulsed):

~:t~;a~~:t~O.~52.0.~S: • . • . • • . • • • .

50

DEVICE FEA TURES
• extremely low feedback capacitance

Cr .. = 0.02 pF .yp.
• high unneutralized RF power gain
MUG = 25 dB (typ.) for 40603
• low "oi se figure
HF = 2.5 dB 'yp. for 40603

mA

TRANSISTOR DISSIPATION, PT:
At ambient lup to 25°C. • • . • • • • .
400
mW
temperatw-es above 2S o C . . • . . . . . • derate linearly at
2.67 mW/oC
AMBIENT TEMPERATURE RANGE:
Storage and OperatiDg . • . . • . . . • • . . -65 to +175 °c
LEAD TEMPERATURE (During soldering):
At djstances > 1/32" from seating
surface for Urseeonds max • . . . . . • • .

r

TERMINAL DIAGRAM

~
~

L.ad l_Drai.

L.... 2-G.t. No. 2
L...4 3-Gcrt. No. 1
L...d .. - Source• .s..,... aM C....

0' T A = 2S·C
LIMITS
401113

CHARACTERISTICS

SYMBOLS

TEST CONDITIONS

Typ.
Gale No.l-to..source Cutoff
Voltage

Gate No.2-la-Source Cutoff

vonace

VGlS(off)

VG2S(offl

=

Vos +15 V, 10
VG2S =.ft1V
Vas'" +15 V, 10

=200 p,A
=200 p,A

VGlS '" 0

40604
MIXER

RF AMPLIFIER
Max.

Typ.

·2

·2

·2

·2

UNITS

Gate No.1 Leakage Current

'GISS

VGlS'" -20

v, VG2S '" 0, Vas'" 0

"A

Gate No.2 leakage Cunent

'G2SS

VG2S '" -20 V, VGIS '" 0, Vas'" 0

"A

Zero-Bias-Voltage Drain Current

lOSS

VG2S = +4 V, VGIS = 0, Vas'" +13 V

Small-Sianal, Short-Circuit
Reverse-Transfer CapaCitance

C'SS

( O,ain·to-Gate-No.l)
Input Capacitance

Cis5

Output Capacitance

Coss

Input Resistance

lis

Vas = +13 V, 10 '" 10 mA, f '" 1 MHz

'os

Forward Transconductance
Maximum Available Power Gain
Maximum Uaable Power Gain
(Unneutralized)

MUG
NF

Noise Figure

• conversion

",
MAG

0.02

rnA

18
0.03

0.02

0.03

pF

VG2S = +4 V

Vos = +13 V, 10 = 10 rnA
VG2S'" +4 V, f '" 1 MHz
Vos'" +13 V, '0 = 10 rnA

5.5

5.5

pF

2.1

2.3

pF

3.5

J.5

VG2S '" +4 V, I '" 100 MHz
Vos = +13 V, 10 - 10 rnA

VG2S'" T4 V, f::- 100 MHz
Vos:- +13V

Output Resistance

18

For characteristics curves, refer to type 3N140.

Max.

'0 - lOrnA
VG2S"'+4V

f

:=

20

iJ1

10,000

2800*

/llTlho

26

21

dB

f'" 10.7MHz

Vos = +13 V, '0 = 10 rnA

VG2S = +4 V, f'" 1 kHZ'
Vos = +13 V. to = 10 rnA

VG2S" +4 \I
f - 100 M!'1z. 'out for 40604
(mixer) " 10.7 MHz

kG

iJ1

100 MHz

25"

dB

2.5

dB

tlan$c~~~~tance

"'01 limlte~"--F·""

______

~

.Ydesign considerations

_____________________________________________________________ 465

40819
Silicon Dual-Insulated-Gate Field-Effect Transistor
N~Channel

The back-te-back diode configuration permits the 40819 to
retain the wide input signal dynamic range inherent in the
MOSFET. In addition, the low junction capacitance of these
diodes adds little to the total capacitance shunting the signal
gate.

Depletion Type

With Integrated Gate-Protection Circuits

The two-gate arrangement of the 40819 also makes possible
a desirable reduction in feedback capacitance by operating

For RF Amplifier Applications up to 250 MHz

The 25-volt drain·to·source rating permits the use of higher
voltage power supplies.

in the common-source configuration and ae grounding Gate
No.2. The reduced capacitance allows operation at maxi·
mum gain without neutralization and reduces local oscillator
feedthrough to the antenna - features of special importance
in rf and if amplifiers.

RCA·40819 is an n-channel silicon, depletion type, dual insulated-gate field-effect transistor (FEn.
The excellent overall performance characteristics of the
RCA·40819 make it useful for a wide variety of rf-amplifier

The 40819 is hermtically sealed in the metal JEDEC TO-72
package.
TERMINAL DIAGRAM

Special back·to-back diodes are diffused directly into the
MOS pellet and are electrically connected between each
insulated gate and the FET's source. The diodes effectively
bypass any voltage transients which exceed approximately
±10 volts and protect the gates against damage in all normal
handling and usage.

applications at frequencies up to 250 MHz. The twa seriallyconnected channels with independent control gates make
possible a greater dynamic range and lower cross-modulation than is normally achieved using devices having only a
single control element.

LEAD 1 • DRAIN
LEAD2·GATENo.2
LEAD 3· GATE No.1
LEAD 4 • SOURCE,

~'

SUBSTRATE, AND CASE

ELECTRICAL CHARACTERISTICS, at TA = 250 C unless otherwise specified

I

4

LIMITS
CHARACTERISTICS

SYMBOLS

Gale-No.l-to·Source Cutoff Voltage

VG1SIDff)

Gate-No.2-to-Source Cutoff Voltage
Gate-No.l-leakatJe Current

TEST CONDITIONS

UNITS
Min.

Typ.

Max.

VOS' +15 V, 10' 200 pA
VG2S" +4 V

-2

-4

VG2SIDft)

VOS" +15 V, 10' ZOO pA
VG1S' 0

-2

-4

IG1SS

VG1S" ±6 V
VOS" 0, VGZS • 0

50

nA

Gate-No.2·leakage Current

IG2SS

VG2S'i6V
VOS· 0, VG1S' 0

50

nA

Zero-Bias Drain Current

lOSS

VOS"+ 15V
VG2S • +4 V, VG IS' a

35

mA

Forward Transconductance (Gate-No.l-to-Drainl

9fs

VOS" +15 V, 10 " 10 mA
VG2S:: +4 V, f :: 1 kHz

15

Device Features
V

• high unneutralized RF power gain: Gps = 18 dB hyp.) at
200 MHz
• low VHF noiSe figure: 3.5 dB hyp.) at 200 MHz

JHl1hD

Small·Signal, Short·Circuit Output Capacitance

Coss

Power Gain (see Fig. 11

Gps

Ma)!imum Available Power Gain

VG2S =+4 V, f '" 1 MHz

low gate leakage currents: IG1SS & 'G2SS = 50 nA at TA = 250 C
increased drain-to·source voltage rating: VOS =-0.2 to +25 V

Performance Features
•

superior cross-modulation performance and greater

0.03

• wide dynamic range permits large-signal handling before
overload

pF

• virtually no age power required

pF

• greatly reduces spurious responses in FM receivers
• dual gate permits simplified AGe circuitry

VOS = +15 V, 10 = 10 rnA

ern

•
•

dynamic range than bipolar or· single-gate FET s
12,000

Small·Signal, Short,Circuit Input Capacitancet
Small-Signal, Short-Circuit,
AeverseTransfer Capacitance
(Orain-Io·Gate No.1l'

• back-to-back diodes protect each gate against handling 8(fd
in-circuit vMlsiants
• high forward transconductance: 9fs = 12,000 J.Lmho (typ.)

0.005

0.02

14

lB

dB

Applications

MAG

20

dB

•

Maximum Usable Power Gain (unneutralizedl

MUG

20·

dB

Noise Figure hee Fig. 1l

NF

pF

VOS" +15 V, 10' 10 mA
VG2S" +4 V, f" 200 MHz

3.5

6.0

dB

Magnitude of Forward Transadmittance

12,000

JHl1ho

Phase Angle of Forward Transadmittance

-35

degrees

ross
ldiode (reversel -

Protective Diode Knee Voltage

±100 JJA

-

kG

Absolute Maximum Values, at TA

kG

Drain-tO-Source Voltage, Vos .

±10

V

• limited only by practical design considerations.
t Capacitance between Gate No.1 and all other terminals.
, Three-terminal measurement with Gate No.2 and Source returned to guard terminal.
#Ferrite bead (41; Pyroferric Co.
"Carbonyl J" 0.09 in 00; 0.03
in 10; 0.063 in thickness. ~

Q= 40673
.. Disc ceramic.
* Tubular ceramic.

All resistors in ohms
All capacitors in pF
C1:

,
I
I
-

L------I--:::t...---'lXJ0""

,
I

Z~35

I
I
OR EQUIV.)

I

_~----I---~----..J
1000-

1.8 - 8.7 pF variable air capacitor: E. F. Johnson
Type 160-104, or equivalel:lt.

C2~

1.5 - 5 pF variable air capacitor: E. F. Johnson Type
160-102, or equivalent.

C3:

1 - 10 pF piston-type variable air capacitor: JFO
Type VAM-Ol0; Johanson Type 4335, or equivalent.

C4:

0.8 - 4.5 pF piston type variable air capacitor: Erie
560·013 or equivalent.

1000-

Ll:

• CATV and MATVequipment

• . "tetemetry and multiplex equipment

2.B

Input Resistance
Output Resistance

RF amplifier, mixer. and IF amplifier in military,
industrial, and consumer communications equipment
• aircraft and marine vehicular receivers

4 turns silver-plated O.02·in thick. 0.075-0.085 in
wide, copper ribbon. Internal diameter of winding =
0.25 in, winding length appro)(. 0.80 in.

4-1/2 turns silver-plated 0.02 in thick, 0.085-0.095in wide, 5/16·in, ID Coil = .90 in long.
Fig. 1. 200 MHz power gain and noise figure rest circuit
L2:

For characteristics curves, refer to type 3N187.

=2~c:

-0.2 to +25
V
Gate Terminal Current,
IG1S or IG2S .
±100
pA
Orain-to·Gate VOltage,
VOGI or VOG2.
+31
V
Drain Current, 10 •.
50
mA
Transistor Dissipation, PT:
At TA up to 2SJC
330
mW
At T A above 2SJC
derate lineerlv 2.2 mWfOC
Ambient Temperature Range:
Operating and Storage .
-65 to +175
0c
Lead Temperature tOuring Soldering):
At distances 1/32 in from seating
surface for 10 s max ......... .
265
0c

Maximum Ratings
Continuous Working Voltage#, at TA = 2!tC:
Gate No.1-to-SOurce Voltage, V01S.

Gate No.2-to-Source Voltage, VG2S ..

-6 to +3

V

-6 to +6 or

V

40% of V DS

/whictlever value is lessl
Drain-ta-Gate Voltage, VDGl or
VDG2··

+25

v

Continuous Working Voltage Aanng5 must 1:)8 observea tu rnaintam
device characteristics. These ratings are based on long-term continuous voltage operation but may be exceeded for short durations
le.g. testing of device characteristics), provided the absolute Maxi·
mum Ratings are not e)(ceeded.

- - - - - -__________________________________________________________

~7

40820,40821
ELECTRICAL CHARACTERISTICS at T A'" 26G C
LIMITS
CHARACTERISTICS

40820

TEST CONDITIONS

SYMBOLS

Mm

VGIS(olil

Yes"

VG2S(0Itl

VOS· +1!5V,lo-200"A,V.G1S-0

Gate to Source Forward Breakdown Volldoge
GaleNo ,

V(BR1G1SSF

IG1SSF
1(l2SSF
100j.lA

Gate No 1 to SOurce Cutoff Voltaqe
Gate No "l to SOllrce ClItOtt Voltage

Gate No 2

V(BRIG2SSF

Gale 10 Source Reverse Breakdown Vollaqe
GaleNa 1

VIBRIGISSR

GaleNo "}

VIBRlG2SSR

Gale No I Term'nal FOlwardC,,,,enT

Gate No 2 Termonal Forward CUllenl

-t16V ,IO"200"A, VG2S" -t4V

IG2SSR
IOOIJA
Vos

0

VG2S

IG1SSR

VOS

VG2S

0

IG2SSF

VDS

VG1S

0

IG2SSR

VoS

VG'S

Zero·Blas Drain Currenl

'05

VoS

'15V, VGIS

Forward Tran!.Conductance
SIgnal, Short CIlCUlt Inpu! Capacllance*

.,
-,

M"

-,

VoS

0

VG,S

VoS

0

11

VG2S

VoS

0

11

VG,S

VoS

0

VG1S

6V

VGIS

4SV

VGIS

6V

VGIS

'5V

oA

50

VG2S

6V

VG2S

4SV

50

oA

50
50
50
50

VG2S

50

"V
05

O,VG2S
1 kH,

f

"
01000

"mho

'000

,F

85

Small Signal, Short Clleu,l, Reverse Tlansfer
Caopaeltance IOraon to Gale No II'

C,ss

Small SIgnal. Short CorCUlt Output CapaCitance

VoS '15V
'0 lOrnA

Con

VG2S

Power Gam (see Fig. 61

Gps

0005

00'

DO'

o OIlS

00'

004

,F
,F

.,"

dB

,
,

Noise Figure (Me Fig. 6)

GpSIC)

• Caopacltance between Gate No , and all other termonals

oA

50

C'S5

Conllerslon Ga.n

Typ

0

9f~

IGateNo.I·I~raln)

Mm

VG2S

VG2S -6\'

Gale No 2· Terminal Reverse Curren!

Sm~1I

UNITS

40821

Mal<.

IGISSR

IGISSF

Gale No 1 Termonal Rl!\l!rse CUllen!

Typ

"lOOMHI

dB

200/44 MHI

dB

, Three termonal measurement WIth Gale No 2 and Source returned 10 ~ard terminal

, - - - - - - - - - -.7------ - - - - - - - - - - l

1 AGC' -4 TO ti~TERNAL SHIELO....

'"""'

,

C4

Q

OUT~UT

;::Fjlrrite bead (4); Pyroferric Co
"Carbonyl J" 0.09 in 00; 0.03
in 10. 0.063 in thickness.
All resistors in ohms
All capacitors in pF

~1:

i:pe-l:0~1g:. ~~r~~~~a~!~t~apacltor: E. F. Johnson

C2:

1.5 - 5 pF variable air capacitor: E. F. Johnson Type
160·102, or equivalent
1 - 10 pF piston·type variable air capacitor: JFO
Type VAM·Ol0; Johanson Type 4335, or equivalent.

C3·

L - - -_ _ _ _ _ _ _ _....._.~5D9

Fig.2 -

Q'" 40820
1I'Oi!ICceramic.
• Tubular ceramic.

1:4.

0.8 - 4.5 pF piston type variable air capacitor. Erie
560·013 or equivalent.

Lt·

4 turns silver·plated 0.02·m thick, 0.075·0.085 in
WIde, copper ribbon. Internal diameter of winding ~
025,", winding lenglh approx. 0.80 in.

L2

4·1/2 turns silver·plated 0.02 in Ihick,O.085·0095
in wide, 5/16·in; 10 Coil ~0.90 in. long.

9ZCS-17465

200 MHz power gain and noise figure test circuit for type 40820.

Table 1 - V parameters vs. frequency
CHARACTERISTICS

SYMBOL

FREOUENCY (MHz)
50

100

200

250

UNITS

Y Parameters
Input Conductance

gis

0.08

0.33

1.0

1.6

mmho

Input Susceptance

bis

1.8

3.6

7.5

9.8

mmho

Magnitude Forward Transadmittance

IVil;1

12

12

12

Angle of Forward Transadmittance

 B applies between L 1 and L2.~B2 applies between L2 and

0.500" (12.70 mm) from seating plane. Diameter is uncontrolled
in L 1 and beyond 0.500" (12.70 mm)

(T) Suffix (JEDEC MO-OO6-AF) 10-Lead TO-5 Style

SYMBOL

a

~1

A>

.8
.81
.82
00
00 1
Fl
J
k

l1
L2
L3
0

N

Nl

(V) Suffix
10 Formed Leads Radially
Arranged TO-5 Type
INCHES
MAX.
0.230 TP

MIN.

0
0.166
0.016
0

0.185
0.019

0.016
0.335

0.021
0.370

0.305

0.335

0,020
0.028
0.029

0.040
0.034

NOTE

MILLIMETERS
MAX.

MIN.

2

5.84 TP

0

0

0.407

4.70
0.482

0
4.1.
3

0

0.045
0.050

0.000
0.250

0.500

0.500
0.562
360 TP

10
1

3

0
0.407

0
0.533

8.51
7.75

9.39
8.50
1.01

0.51
4
3
3
3

1,14
1.27
12.7
14.27

0.00
6.4
12.7

92CS-14638 R2

J60TP

6

-------,-01

5

NOTES,
1. Refer to Rules for Dimensioning Axial Lead Product Out·
lines.

4. Measure from Max. 410.

2. Leads at gauge plane within 0.007" 10.178 mm~ radius of
True Position ITP) at maximum material condition.

6. N is the maximum quantity of lead positions.

3. 41B applies between L1 and L2. 41B2 applies between L2
and 0.500" (12.70 mm) from seating plane. Diameter is
uncontrolled in Ll and beyond 0.500" (12.70 mm).

0.863

0.712
0.74

S. Nl is the quantity of allowable missing leads.

92CS-15835

_____________________________________________________________________ 477

Dimensional Outlines
OUAD IN-LINE PACKAGES (Cont'd)

(W) Suffix 16-Lead Staggered

In;

.025(.64IR. 16 15

.745-.785
(18.93-19.931

14

13

12

II

10

9

MECHAmg~~

----,--

".!

INDEX
AREA

Recommended Mounting - Hole
Dimensions and Spacing

~

.240-.260
1.610-.660)

~

1

6

234

7

8
TOP
VIEW

ftCS-ZH"
NOTES:

,. Body width is measured 0.040" 11.02 mml from top surface.
2. Seating plane defined as the junction of the angle with the
narrow portion of the lead.

Dimensions in parentheses are millimeter
equivalentl of the basic inch dimensions.

(0) Suffix 16-Lead

.02'('64)R~

'~:::"~i

.785
.74e (19.93)J
18.93

~

Recommended Mounting - Hole
Dimensions and Spacing

::::::J:: r.~)
"

.. 12

"

10 •

.k-~--$--$--/~~~~

(i;+~_$_$_}~~ .

12545.7.1

60(1.90)

1~
.015

J

. 200
I~.~~I
.300
17.62)

!

,050 1.27
.020 ( .51 )

t

!--

~

li~~1 12.541
MIN.

TYP.

.39

.200

~

JL~ ~:;(1.65)
.89

___
1$_$_$It-<'21~~)
(.7&)0IA •
.., ~.030
16 HOLES
TYP.
(IN CIRCUIT BOARD)

I

--t
NOTES:

1. Bodv width is measured 0.040" (1.02 mm) from top surface.
2. Seating plane defined as the junction of the angle with the

91CS -17S35RI

TVP

TERMINAL NO.1

, t:D-$-$-$-

.200 ('.08)
.15' 3.94

.035
.020 (.50e)
. 014 .356

, _ _ _ _ _ _ _ _ _ _ _ _ TOP VIEW

us.oal

narrow portion of the lead.
92C$-17580

Dimensions in parentheses are millimeter
equivalents of the basic inch dimensions.

.Q08-.013
1203-.3301

20-Lead Shielded
I'

Recommended Mounting - Hole
Dimensions and Spacing

~

~--~--$--$-$--

.100-.120
12.54-3.041

(2'.~~'
T

INDEX

M---------1 d,

NOTCH

'"

'"

,h

---+-'j'--If'-'f'--'f'-

.200

15.08)

/

TERMINAL No.1

TQPIJIEW

~ ~$--$--$-$

/ -rtf--! $--cil--$--$'><.10
';F

(3,58
TYP.

I

-l

I

,lOa

r-12.541
TYP

~~030(.76)
18 HOLES

OIA

(IN CIRCUIT BOARDl
92CS-17!!181

NOTES:

1. Body width is measured 0.040" (1.02 mm) from top surface.
2. Seating plane defined as the junction of the angle with the
narrow portion of the lead.
Dimensions in pa-entheses are millimeter
equivalents of the basic inch dimensions.

NOTE: TERMINALS II AND 20 ARE OMITTED.

_______________________________________________________________ 479
9ZCS-17!587AI

Dimensional Outlines
DUAL·IN·LlNE AND QUAD-IN·LINE PLASTIC PACKAGES.
(Power Stud a d Heat-8ink Types)
(aM) Suffix
16-Lead Staggered with Integral Strap Heat Sink

(EM) Suffix
16·Lead with Integral Strap Heat Sink

END ALIGNMENT OF HEAT SINK
TO CENTER OF PLASTIC BODY

END ALIGNMENT OF HEAT SINK
TO CENTER OF PLASTIC BODY

I

TERMINAL r

O.537-0.587~ct.

/

(~9'~-5~O~f
.
.

.---j

~o.
15°

.125-0.150

I

. Q.rOO(254)TYP:

L

~

~

('l;.~.~

(3.18-3.81)

J~'~(7'62)TYP'

L

I

TJ

0.020- 0.050
(0.51-1.27)

L--++---g::8~Ji~b ~~~AkN(2)
io~i~::g,,~,~

(13.64-14.91) 1.125(28.58) - - - - J
I
PLASTIC BODY

INDEX AREA

0.100 (2.54) TYP.

(3.18-3.S0

La,DI5-c.oso
10.39-1.52)

CENTER OF LEAD

0.008-0.013

Po~I:':?'~2Ef

92CM-2!1649RZ

(0.204-0.330)

TO·220-STYLE (VERSA·V) PLASTIC PACKAGE
VERTICAL MOUNT
HORIZONTAL MOUNT

(M Suffix)

I

!

SYMBOL
A
B
C

0
E
F
G
H
J
K

L
M
N

P
Q

R
S
T

INCHES
MI LLiMETERS
MIN. MAX. MIN.
MAX.

0.876
0.396
0.173
0.604
0.263
0.168
0.100
0.320
0.246
0.046
0.496
0.140

0.896
0.408
0.182
0.619
0.273
0.188
0.104
0.340
0.254
0.054
0.508
0.150

22.25
10.06
4.395
15.35
6.681
4.268
2.540
8.128
6.249
1.169
12.60
3.556

5
0.015 0.020 0.381
0.033 0.040 0.839
0.129 0.139 3.277
0.600 0.630 15.24
0.680 0.710 17.27

22.75
10.36
4.622
15.72
6.934
4.775
2.641
8.638
6.451
1.371
-12.90

SYMBOL
A
B
C

0
E

F
G
H
J
K

L

3.810

M
N

0.406
1.016
3.530
16.00
18.03

P

5

INCHES
MIN.

Q

R

0.746
0.408
0.182
0.619
0.273
0.251
0.104
0.163
0.254
0.054
0.508
0.150
5
0.015 10.020
0.033 0.040
0.129 0.139

0.726
0.396
0.173
0.604
0.263
0.221
0.100
0.143
0.246
0.046
0.496
0.140

MILLIMETERS
MAX.

MAX. MIN.

18.94
10.36
4.622
15.72
6.934
6.375
2.641
4.140
6.451
1.371
12.90
3.810

18.44
10.06
4.395
15.35
6.681
5.614
2.540
3.633
6.249
1.169
12.60
3.556
5
0.381
0.839
3.277

I

-T

I

0.406
1.016
3.530

__________________________________________________________________ 481

Application Notes

_ _ _ _ _ _ _ _ _ _ _ _ 483

AN-4431
Because the published Yrs value for the 3N200 is very
small. the circuit Yrs values may differ significantly from the
Yrs values shown in Table I and hence. may result in an
unstable operating condition. It is impossible to provide data
for all possible mounting combinations. therefore, a recom·
mended mounting arrangement is shown in Fig. 2. The
source and substrate in the TO·72 package of the 3N200 are
internally connected to Icad No. 4 and the case. The
source· lead inductance can be reduced. if the case is used as
the source connection. Fig. 2 illustrates a partial component
layout in which the case is held by a clamp or other fingered
device. The damp is soldered to a feedthrough capacitor to
provide an effective. very·low inductance bypass to RF
signals. This mounting arrangement still permits the use of a
source resistor for DC stability, and enables the case to
proVide isolation between the input and output circuit in
addition to the isolation afforded by the shield.

gain, especiaUy in an RF amplifier intended for the input
stage of a receiver.
In addition to the protection afforded in normal
handling, the diodes also provide in""ircuit protection against
events such as: static discharge due to contact with the
antenna, delay in transmit-receive switching, or connection
of an antenna with an accumulated charge to the receiver.

When receiver sensitivity is an important consideration
in the design of an RF amplifier, a compromise must be
made in the circuit power gain to achieve a lower noise
factor. A contour plot of noise figure as a function of
generator source admittance is shown in Fig. 4. Each contour
is a plot of noise figure as a function of the generator source
conductance and susceptance. Data for the noise figure were
obtained from a test amplifier designed with very low
feedback. Even though the area of very Jow·noise figure in
the curves in Fig. 4 cover a broad range of source admittance,
impedance·matching for maximum power gain could result in

1". . .

..! j,

FREOUENCY(tI-400MHI

NT

Croamodulltion
Crossmodulation is an important consideration because
it is an inherent device characteristic where circuit considerations are secondary. Crossmodulation is the transfer of
modulation from an undesired signal on a desired signal
caused by the non-linear characteristics of a device.
Crossmodulation is proportional to the third-order term
of the expansion of the 10 . VGS curve. It is normally
specified as the undesired signal voltage required to produce
a crossmodulation factor of 0.01. The crossmodulation
factor is defined as the percent modulation on a desired
carrier by the modulated undesired signal divided by the
percent modulation of the undesired signal.4
Inspection of the 10 . VGIS curve of Fig. 5 offers an
insight to the possible crossmodulation as a function of
gain-reduction performance. When both channels of the
3N200 are fully conducting current, as shown by the VG2S =
4-volt curve, the device approximately follows a square-law
characteristic. If the ID - VG IS curve was ideal, the
third-order term would be zero; but in practical cases. the

TEMPE;T\JAE~"C~SE

'ACTO'

~125;~~---+~~--~-+~~--+--4--~

~

L:
i ,~
~

i 2.5

,f

(/':~r-.

\

\

\ (( (~. ))

/
II

i'--l"-..:,"4-/~ V /

...

_0•.1,.•.,,-,-_-!o20~_I*,,,,--_L."'--'-I+..,--J,'0"'-_+7.-:-.--+.---!-2.~.-:!0
GENERA.TOR SOUf'CE SUSCEPTANCE Ibi,)-1IIItItIo

"

TOP VIE.

Fig. 4 - Noise factor w.

generator source (input) IIdmitt/InCII

third-order term and crossmodulation have some low mue•.

(Yis)

•
•

a relatively poor noise figure. As shown in Table 2, the input
SHIELD

,""NG~

CAPACITOR C2

CLAMP

FEEOTHROUGH

CAPACIT"OR C7

SIDE VIEW

Fig. 2 - Partial component fayout of 400-MHz amplifiBr
circuit

The reduction of source-lead inductance provides in
addition to grealer stability, a lower input and output
conductance. Table 2 shows the differences in 6. y" parameter
values at 400 MHz when measured with the source con·
neetion made to lead No. 4 (in accordance with. the
published data for the 3N2(0) and when measured with the
case connected directly to the ground plane of the test jig.
The magnitude of reverse transadmittance is halved with a
significant change in its phase angle. The input conductance
is reduced by 30%, and the output conductance is reduced by
13%. A recalculation of the expressions for MAG, MUG, and
Linvill Criteria (e) shows a significant improvement in gain
and circuit stability.
While it is difficult to provide accurate information on
the effects of shielding between the input and output
circuits, its effect can be demonstrated when aU other
feedback components have been reduced to negligible values.
The circuit, shown in Fig. 3 (for component layout see Fig.
2), was measured both with and without a shield. The
maximum gain, without the shield, averaged 0.8 dB lower
than with the use of the shield.

conductance (gis) with the case grounded is 2.5 mmho. With
the reactive portion tuned out, the noise factor at power
matched conditions is almost I dB higher than the optimum
noise figure. However. matching to 5.0 mmho results
in a near optimum noise factor with a loss of only 0.5 dB in
gain. In addition, impedance matching to high conductance
also benefits c:rossmodulation performance, as will be discussed in a later section.

if
~'11/ ....

•

.- _~#J
~

The diodes incorporated into RCA dual-gate MOS
FETs, for pte protection, have been designed to minimize
RF loading on the input circuits. The smaJl amount of RF
loading results in ,only a fraction of a dB loss in power gain
and a negligible increase in the noise figure. The advantages
of diode protection, greatly outweigh the slight loss in power

--

.-.l

°

-I
0
0.4
I
GATE No.l-TO-SOURCE VOLTAGEIVGISI-V

FIg. 5 - Dnlin current (IOJ
(VGlsi

SYMBOL

FREQUENCY (f)
Normal
Connection

~

,.,. No. '-to-lOUrr::e vo".".

= 400 MHz

UNITS

ease
Grounded

Maximum Available Power Gain

MAG

13.0

15.7

dB

Maximum Usable Power Gain lunneutralized)

MUG

13.B

19.4

dB

Linvill Stability Factor, C

C

0.615

0.335

mmho

Input Conductance

9is

3.6

2.5

mmho

Input Susceptance

bis

11.2

11.7

mmho

I VIs I

15.5

15.5

mmho

·40.0

degrees

"y" Parameters

M8{J'Iitude of Forward Transadmittance

ills

-47.0

Output Conductance

!los

0.8

0.65

mmho

Output Susceptance

bas

4.25

4.25

mmho

Magnitude of Reverse Transadmittance

I V" I

0.14

0.07

mmho

Angle of Reverse Transadmittance

ftrs

Angle of Forward Transadmittance

Fig. 3 - 400-MHz ampfifier circuit

if . / ~
1,7
,i,

°

Ga.. _ I o n Dlod_

CHARACTERISTICS

AMBIENT TEMPERA1\IRECTA)-U-C
DRAIN-TO-SOUftCE VOLTS IVDSJ-t5

14.0

49.0

degrees

Table 2 - ••y •• Parameters at 400 MHz with source connection 10 lead No.4 and with ca.. connected to ground plane
of_jig

------------------------------------------~-------------------------~

ICAN-8048
Some Applications of a Programmable
Power/Switch Amplifier
by L. R. Campbell and H. A. Wittlinger
The RCA-CA3094 unique monolithic programmable power
switch/amplifier Ie consists of a high-gain preamplifier driving
a power-output amplifier stage. It can deliver average power 01

3 watts or peak power of 10 watts to an external load. and
can be operated from either a single or dual power supply.
This Note brieHy describes the characteristics of the CA3094.
and illustrates its use in the following circuit applications:
Class A instrumentations and power amplifiers
Class A driver-amplifier for complementary power tran·

sistors
Wide-frequency-range power multivibrators
Current· or voltage-controlled oscillators

Comparators (threshold detectors)
Voltage regulators

Analog timers (long time delays)
A1arm systems
Motor-speed controllers
Thyristor-firing circuits
Battery·charger regulator circuits
Ground-fault-interrupter circuits

Circuit Description
The CA3094 series of devices offers a unique combination
of circuit flexibility and power-handling capability. Although
these monolithic IC's dissipate only a few microwatts when
quiescent, they have a high current-output capability (100
milliamperes average, 300 milliamperes peak) in the active
state. and the premium-grade devices can operate at supply
voltages up to 44 volts.
Fig. I shows a schematic diagram of the CA3094. The portion of the circuit preceding transistors 012 and 013 is the
preamplifier section and is generically similar to that of
the RCA-CA3080 Operational Transconductance Amplifier
(OTA).I,2 The CA3094 circuits can be gain-programmed by
either digital and/or analog signals applied to a separate
Amplifier-Bias-Current (lAscl terminal (No.5 in Fig. I) to
control circuit sensitivity. Response of the amplifier is essentially linear as a function uf the current at terminalS.
This additiunal signal input "purt" provides added fleXibility
in many applications. Thus, the uutput of the amplifier is a
function of input signals applied differentially at terminals :!
and 3 and/ur in a single-ended configuration at terminal 5. The
output portion of the monolithic circuit in the CA3094 cunsists of a Darlington-connel.:ted transistur pair with al.:cess provided to hoth the collectur and emitter terminals to provide
capability to "sink"' and/ur "source" current.

,----~rrr---- 8.4 V

The CA3094 series of circuits consists of six types that dif·
fer only in voltage-handling capability and package options, as
shown belOW; other electrical characteristics are identical.
I'1IckageOption.

Maximum Voltage Rating

CA3094S; CA3094T
CA3094AS; CAJ094AT
CA3094BS; CA3094BT

24 V

36V

1

44V

OUTPUT

The suffIX "S" indicates circuits packaged in TO-S enclosures
with leads formed to an 8-lead dual·in-line configuration (0.1"
pin spacing). The suffix "T" indicates circuits packaged in 8lead TO-S enclosures with straight leads. The generic CA3094
type designation is used throughout this Note.
Cia. A Innrumentatlon Amplifiers
One of the more difficult instrumentation problems frequently encountered is the conversion of a differential input
signal to a single-ended output signal. Although this conversion can be accomplished in a straightforward design through
the use of classical op-amps, the stringent matching requirements of resistor ratios in feedback networks make the canv.ersjon particularly difficult from a practical standpOint.
Because the gain of the preamplifier section in the CA3094
can be defined as the product of the transconductance
and the load resistance (gm Rl). feedback is not needed to
obtain predictable open·loop gain performance. Fig. 2 shows
the CA3094 in this basic type of circuit.

I VOLT
FULL
SCALE

__I
Fig,3-Single-supply dif'-'sntisl-brjdge lImplifisr.

,--~""T~~---_+12V

>,®~--.YOUT

THERMOCOUPLE

M
100KO
ZERO A~J.

~~VM:ROM
THERMOCOUPLE
PRODUCES

FULL-SCALE
t---'VI/Ir-~ OUTPUT
CURRENT

.,%

100 A

1201(

NO"TES:
-30 V
PRE-AMP. GAIN IAyl. ~m RL _151110- 3) (;5&1 (lOll_ISO
(OUTPUT AT TERMINAL J I

I~I~~I:~::O~~ATION: DIFFERENTIAL INPUT::!I :!:26

mVj

DEVIATION FROM
LlNEARI"TV)
OUTPUT VOLTAGE (EO"AV

thditfl' 1180111:26 mVI- 1:4.7 V

OU"TPUT CURRENT, IO"~ • 8.35 mA
10" (9,"RL~~' dlftl

Fig.2-0pen-loop instrultl§ntafion amplifier with difter.ntial
input and single·ended output.

The gain of the preamplifier section (to terminal No. I) is
= (5 x 10-3 ) (36 x 103~ = 180. The transcon·
ductance 8m is a function of the current into terminal No.5,
IABC, the amplifier-bias

8 10 1

a,r;;

FREQUENCY -H,

Fig. 16- The mtMSUrtld responIB of the amp/ifier at extremll1J of tone-control rotation.

1.8 M

I.Or--,---r--,r--,----,------.c-.:::-o

~!
1II
o.of--+--+-----1f--+---+----IH:-:---l

. ··
o.• f---+--+---'I----1---+--III+..--1
·i
N
Z

N
Z

JUMPER

Fig. 14- A complete POWfH' ampli'i. using the CA3094 and thrwadditional trlmistofS.

0.7f--+--+--f--+---+--t1It----l
~

~

ro.• f--+--+--f--+---+--t1f----l
'20'

'~~:~;~~~~---it,

~ 0.11---+--+--1---+--+--1-11----1
~

Ffl

';OO.' '''' "L"
07

••7

,.

2201(

~
~

O.4f--+--+--f--+---+--trf--'

u

~ o.f--+--+--f--+---+--iHf----l

:=o.zl---+--+--I---+--+--hl----I
~
1''''tl1 _ _

~

•. ,1---+--+==,".H-Z~='F.:.,.::.~.t~~~I----I

.

".",~
10

POWER OUTPUT -

12

WATTS

Fig. 17- Total harmonic distortion of the amp/ifier with an
Fig. 15- A po_ omp/ifitw _ated from alinglo wpp/y.

network include. R3, R4, RS. C4. and CS. C6 block. the de
from the feedback network so that the de gain from input to
the feedback takeoff point is unity. The residual dc-outputvoltage at the speaker terminals is then IABC Rt

RII + RI2

~

where Rl is the source resistance. The input bias current is
IABC
(Vcc - Vbe)
then ~ = -~. The treble network consists of
R7, R8, R9, RIO, C7, C8, C9, and CIO, Resistors R7 and R9
limit the maximum available cut and boost. respectively. The
boost limit is useful in curtailing heating due to finite
turn-off time in the output units. The limit is also desirable

when there are tape recorders nearby. The cut limit aids the
stability of the amplifier by cutting the loop gain at higher
frequencies where phase shifts become significant.
In cases in which absolute stability under all load
conditions is required. it may be necessary to insert a small
inductor in the output lead to isolate the circuit from
capacitive loads. A 3-microhenry inductor (I ampere) in
parallel with a 22-ohm resistor is adequate. The derivation of
circuit constants is shown in Appendix B. Curves of control
action versus electrical rotation are also given.
Performance
Fig. 16 is a plot of the measured response of the

unrtlfJUlated power supply.

complete amplifier at the extremes of tone·control rotation.
A comparison of Fig. 16 with the L'Omputed curves of
Fig. 84 (Appendix B) shows good agreement. The total
harmonic distortion of the amplifier with an unregulated
power supply is shown in Fig. 17; 1M distortion is plotted in
Fig. 18. Uum and noise are typically 700 microvolts at the
output. or 83·dB down.
COMPANION RIAA PREAMPLIFIER
Many available preamplifiers are capable of providing the
drive for the power amplifier or Fig. 14. Yet the unique
its ..ower supply. input
characteristics of the amplifier
impedance. and gain .- make possible the design of an RIAA

---------------------------------------------------------------------~

ICAN-6077
c,

c,

'0

'0

'0

AlOWfREO~~

(ol BASS BOOST

'.

(d) TREBLE CUT

leI TREBLE BOOST
ItilBASSCUT

Fig. S1- Four operational-amplifier circuit configurations and the gain expressions for each.

R3

BASS

CCW

CONTROL

'"

TREBLE CONTROL

'"

Fig. 83- A plot of the response of the circuit of Fig. 14 with /:;;;~

Fig. B2- Cut and boost bass and treble controls that have the

,

0

0

,

•

'I
0
/

1

V
./

•

t

1000 HZ

0f-

k:;;"'"~
",0

/'

0

V

1KHZ

'!.\,fI

l1

h¢ f....-- V

':/1
0;/

~

k::::: ~

V

,/

•

V

4

..

.7

ELECTRICAL ROTATION Of BASS CONTROL

,.0

treble tone

91·percent of its total resistance. The amplitude response
of the treble control is, however. never completely "flat";
a computer was used to generate response curves as
controls were varied.
Fig. B3 is a plot of the response with bass and treble
tone controls combined at various settings of both controls. The values shown are the practical ones used in the
actual design. Fig. 84 shows the information of Fig. 83
replotted as a function of electrical rotation. The ideal
taper for each control would be the complement of the

50

,

::too

controls combined at various settings of both controls.

characteristics of the circuits of Fig. 81,

.2

IOO-Hz plot for the bass control and the 10·kHz response
for the treble control. The mechanical center should
occur at the crossover point in each case.

I. "Applications of the CAJ080 and CA3080A High·

Performance Operational Transconductance Amplifiers," H. A. Wittlil1ger, RCA Application Note leAN6668
2. "A New Wide-band Amplifier Technique," B. Gilbert,
IEEE Journal of Solid State Circuits, Vol. SC·3, No.
4, December, 1968.
3. "Trackability," James A. Kogar, Audio, December
1966
4. RCA Linear Integrated Circuits Manual, RCA Tech·
nical Series IC42

ELECTRICAL ROTATIOfli OF TRULE CONTROL

Fig. 84- The information of Fig. 83 plotted as a function of electrical rotation.

*RCA publications available through RCA Solid State
Division, Box 3200, Somerville, N.J., 08876.

_____________________________________________________________________ 497

ICAN-6157
tor across the output voltage terminals. The addition of a
capacitor will, however, degrade the ability of the system to
'
react to transient-load conditions.

teristics for various values of RSC are shown in Fig. 4.

,.J
(a) With simplified short-circuit protection

LOAD CURRENT n'LI-IIIA

Fig. 4- LtHId ,.,u/lltlon chllnlt:tllriltic. for circuit of Fig.

FREOUENCT tfl-IIHt

3.

Fif}. 8- Output f'tIllist.nce VI. frequency for c;ff:uit of Fig. 1.

When this circuit is used to provide high output currents at
low output voltages, care must be exercised to avoid 'excessive
IC dissipation. In the circuit of Fig. 3, this dissipation control
can be accomplished by increasing the primary-to-secondary
transformer ratio (a reduction in VIror by using a dropping
resistor between the rectifier and the CA3085 regulator. Fig. 5
gives data on dissipation limitation (VI-VO ¥s. 10) for CA3085·
series circuits.
The short-circuit current is determined as foDows:

VBE 0.7

ISC

=RSC -RSC

60

(2)

amperes

ao
t10l

100

OUTPUT MILLJAMPERES

Fig. 5- Dissiplltion #mir.tion (VI -

Vo n. 101 for CA3085If1ri..

c;rcu;u.

The line- and load-regulation characteristics for the circuit
shown in Fig. 3 are approximately 0.05 per cent of the output
voltage.

IbJ

(bJ with auxiliary short-circuit protfJCtion

Fig. 6- High·current voltage regulatoT using n-p-n pass transistor.

viously. It should be noted that the degree of short-circuit pro·
tection depends un the value of RSCp. i.e., design compromise
is required in choosing the value of RSCp to provide the desired base drive for the 2N5497 while maintaining the desired
short-drcuit protettion. Fig. 6(b) shows an alternate circuit in
whkh an addttionallranSIStor (2N5183) and two resistors have
been added as an auxiliary short-circuit protection feature. Re·
sistor R3 is used to establish the desired base drive for the
:!N5497. as described above. Resistor Rlimit now I.:ontrols the
short-circuit output current because, in the event of a shortdn.:uil. the voltage drop developed across its terminals increases
sufficiently to increase the base drive to the 2N5183 transistor.
This inl.:rease in base drive results in reduced output from the
C AJOHS because collector current flow in the 2NS 183 diverts
base drive from the Darlington output stage of the CA3085
(see Fig. 2) through terminal 7. The load regulation of this cir·
cuit is typically 0.025 per cent with 0 to 3·ampere load-current
variation;lineregulation is typically 0.025 per cent/volt change
in input voltage.
Voltage Regulator with Low VI-VO Difference
In the voltage regulators described in the previous section, it
is necessary to maintain a minimum difference of about 4 volts
between the input and output voltages. In some applications
this requirement is prohibitive. The circuit shown in Fig. 7 can
deliver an output current in the order of 2 amperes with a
VI-VO difference of only one volt.
h employs a single external p-n-p transistor having its base
and emitter connected to terminals 2 and 3, respectively, of the
CA3085. I.n this circuit, the emitter of the output transistor
(Q14 in Fig. 2) in the CA308S is returned to the negative supply rail through an external resistor (RSCp) and two seriesconnected diodes (01, D2). These forward-biased diodes maintain Q6 in the CA3085 within linear-mode operation. The

High-Current Voltage Regulator
When regulated voltages at currents greater than 100 milliamperes are required, the CAJOS5 can be used in conjunction
with an external n-p-n pass-transistor as shown in the circuits

of Fig. 6. In these circuits the output current available from the
regulator is increased in accordance with the hFE of the external n-p-n pass-transistor. Output currents up to 8 amperes
can be regulated with these circuits. A Darlington power transistor can be substituted for the 2N5497 transistor when CUrrents greater than 8 amperes are to be regulated.
A simplified method of short-circuit protection is used in
connection with the ciicuit of Fig. 6(a). The variable resistor
RSCp serves two purposes: (I) it can be adjusted to optimize

the base drive requirements (hFE) of the particular 2NS497
transistor being used, and (2) in the event of a short-circuit in
the regulated output voltage the base drive current in the

2NS497 will Increase. thereby Increasing the voltage drop
aauss RSCp. As this voltage-drop increases the short.circult
proteL'tion system within the CA3085 correspondingly reduces
the output current available at terminal 8, as dCSI;ribed pre-

UNREG

V,

Hiltl-Voltage Regulator
Fig. 9 shows a circuit that uses the CAJ085 as a voltagereference and regulator control device for high-voltage power
supplies in which the voltages to be regulated are weD above
the input-voltage ratings of the CA308S-series circuits. The external transistors QI and Q2 reqUire voltage ratings in excess of
the maximum input voltage to be regulated. Series·pass transistor Q2 is controlled by the collector current of QI, which in
turn is controlled by the nonnally regulated current output
supplied by the CA3085. The input voltage for the CA3085

V,

UNREG

"'.Q.lzovl

F;g. 9- Hiflt·voItlItIfI f1J(JUI.tor.

regulator at terminal 3 is supplied through dropping resistor R3
and the clamping zener diode DI. The values for resistor RI
and R2 are determined in accordance with Eq. (I).
Negative-Voltage Regulator
The CA3085 is used as a negative-supply voltage regulator
in the circuit shown in Fig. 10. Transistor Q3 is the series-pass
transistor. It should be noted that the CAJ085 is effectively
tonnected across the load-side of the regulated system.
Diode DJ is used initially in a "circuit-starter" function; transistor Q2 "latches" Dl out of its starter-circuit function so that
the CA3085 can assume its role in controlling the passtransistor Q3 by means of Q I.

REG.

Vo

REG

Vo
Fig. 1- Voltage regulator for/ow V I - Vo difference.

choice of resistors R I and R2 is made in accordance with
Eq. (I). Adequate frequency compensation for this circuit is
provided by the O.OI-microfarad capacitor connected between
terminal 7 of the CA3085 and the negative supply rail.
Fig. 8, which shows the output impedance of the circuit of
Fig. 7 as a function of frequency, illustrates the excellent
ripple-rejection characteristics of this circuit at frequencies
below 1 kHz. Lower output impedances at the higher frequencies can be provided by connecting an appropriate capac i-

Fig. 10- NefIBtive-lIo1ta(/eregul.tor.

Operation of the circuit is as follows: current through R3
and Dl provides base drive for QJ, which in turn provides

__________________________________________________________________ 499

ICAN-6157
Vref' the op-amp turns on QI and the cycle is repeated. It
should be apparent that the output voltage oscillates about
V,ef with an amplitude determined by RI and R2. Actually,
the value of Vref varies from being slightly more positive than
Vref' when 01 is conducting, to being slightly more negative
than Vref' when D I is conducting. The voltage and current
waveforms are shown in Fig. 17(b), (c), and (d).

A switching-regulator circuit using the CA3085 is shown in
Fig. 18. The values of Land C (1.5 millihenries and 50 microfarads, respectively) are commercially available components
having values approximately equal to the computed values in
the previous design example.

REG.

Vo

Design Example: The following specifications are used in decomputations for a switching regulator:

VI = 30 V. Vo = 5 V.IO = 500 rnA.
switching frequency'" 20 kHz,
output ripple:::: 100 mY.
If it is assumed that transistor QI is in steady-state saturated
operation with a low voltage-drop, the current in the inductor
is given by Eq. 10. as foHows:
Fig.

O.OOI~F

'OY
RUMIT •

'6- High..voJtll,. rqullltor incorporllting cummt "snllp-b8ck"
protection.

F;g.

Switching Regulator
When large input-to-output voltage differences are necessary,
the regulators described above are inefficient because they dissipate significant power in the series-pass transistor. Under these
conditions, high-efficiency operation can be achieved by using
a switching-type regulator of the generic type shown in
Fig. 17(a). Transistor 01 acts as a keyed switch and operates in

.
Ift l
It =1: Vdt

=

(VI - VO\
-L-I-) Ion

(II)

to
When transistor QI is off, the current in the inductor
is given by:

(12)
FromEq.II.
(13)

~~'~L'MAXI

VO' VREF (RI;IR2)

'8- Typiclll switch;", regullltor cin:uit.

Current Regul.tars
The CAJ085 series of voltage regulators can be used to provide a constant source or sink current. A reguJated-current supply capable of delivering up to I ()() milliamperes is shown in
Fig. 19(a). The regulated load current is controlled by RI beeawe the current flowing through this resistor must establish a
voltage difference between terminals 6 and 4 that is equal to
the internal reference voltage developed between terminals 5
and 4. The actual regulated current, reg IL. is the sum of the
quiescent regulator current and the current through RI, i.e.,
reg IL = (quiescent + IRI

co

If imax is 1.3 IL, then during ton the current in the inductor
will be 0.5 A • 1.3 = 0.65 A; therefore. lIiL = 0.15 A

(itJ

Substitution in Eq. 13 yields

L = (30 - 5), __
1__ • 2.. = I 4 rnH
I
0.15
(20.103) 30
.
(14)

tol SELF-OSCILLATING SWITCHING REGULATOR

0·001

,F

Current discharge from the capacitor Cl is given by:

it =C~;

(15)

Ay
IIio At
Thus.1Iio = C lit . or C = -;;;;Since ic

'oJ
CURRENT REGULATOR

=iL and 6t = toff. then
C = lIiL toff

Ay
(e) INDUCTOR CURRENT ILl

L

Substitution for the value of iL from Eq. 13 yields

.EGVOE~J"E~
AYo

(d) OUTPUT VOLTAGE

Fig.

c= (

Vq\. L. (VO\.

Ll")

vtl

f

toff

(16)

AY
The total period T

'7- Swifr:hin, regullltor

VI -

=toff + ton. and T =f.

Therefore,
UNREG

IIfId IIUDCillttJd WII",fa,."".

(17)

toff=t -ton

--.J

NEG.vlt-lo-_+-~_ _ _ _ _

HIGHeCURRENT REGULATOR

either a saturated or cut-off condition to minimize dissipation.
When transistor QI .is conductive. diode DI is reverse-biased
and current in the inductance LI increases in accordance with
the following relationship:

For optimum efficiency ton should be

Fig. 19- Constllnt cu"ent rquillton.

'" (~~T
vd ",(~\.l

(18)

VIJf

Substitution for ton in Eq. 18 yields

tl

=4: f Vdt

(10)
to
where V is the voltage across the inductance LI. The current
through the inductance charges the capacitor C I and supplies
current to the load. The output voltage rises until it slightly exceeds the reference voltage Vref' At this point the op-amp removes base drive to OJ and the unregulated input voltage VI is
"switched off'. The energy stored in the inductor LI now
causes the voltage at Vx to swing in t~e negative direction and
current flows through diode D I. while continuing to supply
current into the load RL' As the current in the inductor falls
below the load current, the capacitor CI begins to discharge
and Vodecreases. When Vofalls slightly below the value of
iL

t

o

ff=!-(~\!.!
Vt/ f f
f

(1-

VO\
VI")

Substitution for toffin Eq. 16 yields

C=

(VI-VO>
LI

.!..
f

VO. L
VI
f
fly

(I _

(19)

I

5

vo)
VI

I

c=~' ~'30' WxJij3'
10- 1

Fig. 19(b) shows a high-current regulator using the CA3085 in
conjunction with an external n-p-n transistor to regulate currents up to 3 amperes. In this circuit the quiescent regulator
current does not flow through the load and the output current
can be directly programmed by RI. i.e.,
Vref
RegIL=T!

Substitution of numerical values in Eq. 20 produces the
foUowing value for C:

30-5

92CS-21838

63pF

With this regulator currents between I milliampere and 3
ampeIes can be programmed directly. At currents below
1 milliampere inaccuracies may occur as a result of leakage in
the external transistor.

A D.II·Trlddng Voillge Regulator
A dual-tracking vohage regulator using a CAJ085 and a
CAJ094A* is shown in Fig. 20. The CAJ094A is baSically an
op-amp capable of supplying 100 milliamperes pf output current.

_____________________________________________________________ 501

ICAN-8182
Features and Applications of
RCA Integrated-Circuit Zero-Voltage Switches
(CA3058, CA3059, and CA3079)
by A.C.N. Sheng. G.J. Granieri. J. Yellin. and T. McNulty
RCA-CA3058, CA3059 and CA3079 zero·voltage switches

are monolithic in'tegrated circuits designed primarily for use as
trigger circuits for thyristors in many highly diverse ae
power~ontrol
and power-switching applications. These

integraled-circuit switches operate from an ae input voltage of
24, 120,208 to 230, or 277 volts at 50,60, or 400 Hz.
The CAJOS9 and CA3079 are supplied in a 14·terminal

(4) Triac Gating Circuit - Provides high-current pulses to
the gate of the power-controlling thyristor.
In addition, the CA30S8 and CA30S9 provide the following
important auxiliary functions (shown in Fig. I):
(I) A built-in protection circuit that may be actuated to
remove drive from the triac if the sensor opens or shorts.

dual-in-line plastic package. The CA3058 is supplied in a
14·terminal dual-in-Iine ceramic package. The electrical and
physical characteristics of each type are detailed in RCA Data

Bulletin File No. 490.
RCA zero-voltage switches (ZVS) are particularly well
suiled for use as thyristor trigger circuits: These switches
trigger the thyristors at z.ero-voltage points in the
supply-voltage cycle. Consequently, transient load-current
surges and radio-frequency interference (RFI) are substantially
reduced. In addition, use of the z.ero-voltage switches also
reduces the rate of change of on-stale current (di/dt) in the
thyristor being triggered, an important consideration in the
operation of thyristors. These switches can be adapted for use
in a variety of control functions by use of an internal
differential comparator to detect the difference between two
externally developed voltages. In addition, the availability of
numerous terminal connections to internal circuit points
greatly increases circuit flexibility and further expands the
types of ae power-control applications to which these
integrated circuits may be adapted. The excellent versatility of
the zero-voltage switches is demonstrated by the fact that
these circuits have been used to provide transient-free
temperature control in self-cleaning ovens, to control
gun-muzzle temperature in low-temperature environments, to
provide sequential switching of heating elements in warm-air
furnaces, to switch traffic signal lights at street intersections,
and to effect other widely different ac power-control
functions.

AC Input Voltage
150/60 or 400 Hzl
VAC

24
120
208/230
277

I nput Series
Resistor fA 5)
kl!

Dissipation Rating
for AS

2
10
20
25

0.5
2
4
5

W

Fig. , - Funcrionlll blocIc diagrllfTls of the zero-volrage switcher
CA3068, CA3059, and CA3019.

FUNCTIONAL DESCRIPTION
RCA zero-voltage switches are multistage circuits that
employ a diode limiter, a zero-crossing (thre~old) detector. an
on-off sensing amplifier (differential comparator), and a
Darlington output driver (thyristor gating circuit) to provide
the basic switching action. The de operating voltages for these
stages is provided by an internal power supply that has
sufficient current capability to drive external circuit elements.
such as transistors and other integrated circuits. An important
feature of the zero-voltage switches is that the output trigger
pulses can be applied directly to the gate of a triac or a silicon
controlled rectifier (SCR). The CA3058 and CA3059 also
feature an interlock (protection) circuit that inhibits the
application of these pulses to the thyrlstor in the event that
the external sensor should be inadvertently opened or shorted.
An external inhibit connection (terminal No. I) is also
available so that an external signal can be used to inhibit the
output drive. This feature is not included in the CA3079;
otherwise, the three integrated-circuit zero-voltage switches are
electrically identical.
Over-all Circuit Operation
Fig. 1 shows the functional interrelation of the zero..yoltage
switch, the external sensor, the thyristor being triggered. and
the load elements in an on-off type of ac power-control
system. As shown, each of the zero-voltage switches
incorporates four functional blocks as follows:
(I) Umiter-Power Supply - Permits operation directly
from an ac line.
(2) Differential On/Off Sensing Amplifier - Test. the
condition of external sensors or command signals. Hysteresis
or proportional-control capability may easily be implemented
in this section.
(3) Zero-Crossing Detector - Synchronizes the output
pulses of the circuit at the time when the ac cycle is at a
zero--voltage pOint and thereby eliminates radio-frequency
inteference (RFI) when used with resistive loads.

(2) Thyristor firing may be inhibited through the action of
an intema¥Iiode gate connected to terminal J.
(3) High-power dc-comparator operation is provided by
overriding the action of .the zero-crossing detector. This
override is accomplished by connecting terminai 12 to
terminal 7. Gate current to the thyristor is continuous when
terminal 13 is positive with respect to terminal 9.

Fig. 2 shows the detailed circuit diagram for the
integrated-circuit zero-voltage switches. (The diagrams shown
in Figs. I and 2 "are representative of all three RCA
zero-voltage switches, i.e., the CA30S8, CA30S9, and CA3079;
the shaded areas indicate the circuitry that is not included in
the CA3079.)
The limiter stage of the zero-voltage switch clips the
incoming ac line voltage to approximately ±8 volts. This signal
is then applied to the zero-voltage-crosSing detector, which
genenpes an output pulse each time the line voltage passes
through zero. The limiter output is also applied to a rectifying
diode and an external capacitor, CF. that comprise the de
power supply. The power supply provides approximately
6 volts as the Vee supply to the other stages of the
zero-voltage switch. The on-off sensing amplifier is basically a
differential comparator. The thyristor gating circuit contains a
driver for direct triac triggering. The gating circuit is enabled
when all the inputs are at a ·'high" voltage. i.e., the line voltage
must be approximately zero volts. the sensing·amplifier output
must be "high," the external voltage to terminal J must be a
logical ·'0", and, for the CA30S8 and CA30S9, the output of
the fail-safe circuit must be "high." Under these conditions,
the thyristor (triac or SCR) is triggered when the line voltage is
essentially zero volts.
Thyristor Triggering Circuits
The diodes Dl and D2 in Fig. 2 form a symmetrical clamp
that limits the voltages on the chip to ±8 volts~ the diodes 07
and 013 form a half-wave rectifier that develops a positive
voltage on the external storage capacitor, CF.
The output pulses used to trigger the power-switching
thyristor are actually developed by the zero-crossing detector
and the thyristor gating circuit. The zero-crossing detector
consists of diodes D3 through 06. transistor QI. and the
associated resistors shown in Fig. 2. Transistors QI and Q6
through 

I

>

~ ,~--t--+---r--t-~r-

I 'r-~~-r--t-~---t-

RS"SlCflNHlIJft

,.

o.

.

'f~~ '\

•

~

~.5r--r-~

~

i ..'r---r---"

.\

~
~

I

..

.,

~

~

~
\

I

0

,

2

.•

• , •

EXTERNAL. LOAD CURRENT-mA

I!I

;

Fig. 9 - DC supply voltage as fI function of external load current lor
seversl valutls of dropping resistance RS.

AMBIENT TEMPERATURE--t

Fig. 1 - Operating T8flions for .built-in protection circuit! of a typical
zero-voltage switch.

crossing every half-cycle, and an output, for example pulse
No.4, is produced to indicate the zero crossing. During the
remaining 8.3 milliseconds, however, the differential amplifier
in the zero-voltage switch may change state and inhibit any
further output pulses. The uncertainity region of the
differential amplifier, therefore, prevents pulse No.5 from
triggering the triac during the negative excursion of the ac line
voltage.

SPECIAL APPLICATION CONSIDERATIONS

Fig. I I - CA3058 OF CA3059 on-off controller with hystBres;s.

If a significant amount (greater than ±10%) of controlled
hysteresis is required, then the circuit shown in Fig. 12 may be
employed. In this configuration, external transistor 01 can be
used to provide an aUxiliary timed-delay function.

[-

1[,,",

As pointed out previously, the RCA integrated-circuit
zero-voltage switches (CA3058, CA3059, and CA3079) are
exceptionally versatile units that can be adapted for use in a
wide-variety of pewer-control applications. Full advantage of
this versatility can be realized, however, only if the user has a
basic understanding of several fundamental considerations that
apply to certain types of applications of the zero-voltage
switches.

!

-

Operating-Power Options

Power to the zero-voltage switch ~ay be derived directly
from the ac line, as shown in Fig. 1, or from an external dc
power supply connected between terminals 2 and 7, as shown
in Fig. 8. When the zero-voltage switch is operated directly
from the ac line, a dropping resistor RS of 5,000 to
10,000 ohms must be connected in series with terminalS to
limit the current in the switch circuit. The optimum value for
this resistor is a function of the average current drawn from
the internal de power supply, either by external circuit
elements or by the thyristor trigger circuits. as shown in Fig. 9.
The chart shown in Fig. I indicates the value and dissipation
rating of the resistor Rs for ac line voltages of 24, 120,208 to
230, and 277 volts.

AlL RESISTANCE
VALUES A.
IN OHMS

Fig. 8 - Operation of ths zero-voltage switch from an tlxtBrnai de
power supply connected bBtw&en ftJrminals 2 and 7.

Fig.

to -

Hslf~ycling phtmomtlflon

in the zero·voltage switch.

When a sensor with low sensitivity is used in the circuit, the
zero-voltage switch is very likely to operate in the linear mode.
In this mode, the output trigger current may be sufficient to
trigger the triac on the positive-going cycle, but insufficient to
trigger the device on the negative-going cycle of the triac
supply voltage. This effect introduces a half-cycling
phenomenon. i.e., the triac is turned on during the positive
half-cycle and turned off during the negative half-cycle.
Several techniques may be used to cope with the
half-cycling phenomenon. If the user can tolerate some
hystersis in the control, then positive feedback can be added
around the differential amplifier. Fig. II illustrates this
technique. The tabular data in the figure lists the
recommended values of resistors Rl and R2 for different
sensor impedances at the control point.

SENSOR

Fig. 12 - CA3058 or

CA3059 on-off controller with conrrolled

hysteresis.

For applications that require complete elimination of
half-cycling without the addition of hysteresis, the circuit
shown in Fig. 13 may be employed. This circuit uses a
CA3098E integrated-circuit programmable comparator with a
zero-voltage switch. A block diagram of CA3098E is show~ in
Fig. 14. Because the CA3098E contains an integral flip-flop,
its output will be in either a "0" or "I" state. Consequently
the zero-voltage switch cannot operate in the linear mode. and
spurious half-cycling operation is prevented. When the
signal-input voltage at terminal 8 of the CA3098E is equal to or
less than the "low" reference voltage (LR), current flows from
the power supply through resistor RI and R2, and a logic "0" is

100,.F

...

Half-Cycling Effect

The method by which the zero-voltage switch senses the
zero crossing of the ac power results in a half-cyding
phenomenon at the control point. Fig. to illustrates this
phenomenon. The zero-voltage switch senses the zero-voltage

Fig. 13 - Sensitive tflmperature control.

505

ICAN-6182
Circuits that use a sensitive-gate triac to shift the firing
point of the power triac by approximately 90 degrees have
been designed. If the primary load is inductive, this phase shift
corresponds to firing at zero current in the load. However,
changes in the power factor of the load or tolerances of
components will cause errors in this firing time.
The circuit shown in Fig. 19 uses a CA3086
integrated-circuit transistor array to detect the absence of load
current by sensing the voltage across the triac. The internal
zero-crossing detector is disabled by connection of terminal 12
to terminal 7, and control of the output is made through the
external inhibit input, terminal 1. The circuit permits an
output only when the voltage at point A exceeds two V SE
drops, or 1.3 volts. When A is positive, transistors 0) and Q4
conduct and reduce the voltage at terminal I below the inhibit
state. When A is negative, transistors QJ and Q2 conduct.
When the voltage at point A is less than ±1.3 volts, neither of
the transistor pairs conducts; terminal I is then pulled positive
by the current in resistor R), and the output in inhibited.

both rand 111+ modes, some other types have very poor
sensitivity in the m+ condition. Because the zero-voltage
switch supplies positive gate pulses, it may not directly drive
some higher-current triacs of these other types.
The circuit shown in Fig.20(a) uses the negative-going
voltage at terminal 3 of the zer9-voltage switch to supply a
negative gate pulse through a capacitor. The curve in
Fig.20(b) shows the approximate peak gate current as a
function of gate voltage Ve. Pulse width is approximately
80 microseconds.

zero-voltage switch. When a 10,OOO-ohm series resistor is used,
the voltage across the circuit is less than 3 volts and both
sensitivity and output current are significantly reduced. When
a SOOO-ohm series resistor is used, the supply voltage is nearly
5 volts, and operation is approximately normal. For more
consistent operation, however, a 4000-ohm series resistor is
recommended.
Altnougn positive-temperawre-coetTicienl (PTC) sensors
rated at S kilohms are available, the existing sensors in ovens
are usually of a much lower value. The circuit shown in Fig. 22
is offered to accommodate these inexpensive metal-wound

Fig. 22 - Schematic diagram of circuit for use with low-resistance

sensors. A schematic diagram of the RCA CA3080
integrated-circuit operational transconductance amplifier used
in Fig. 22, is shown in Fig. 23. With an amplifier bias current,
IABe, of 100 microamperes, a forward transconductance of
2 milliohms is achieved in this configuration. The CA3080
switches when the voltage at terminal 2 exceeds the voltage at
terminal 3. This action allows the sink current, Is, to flow
from terminal 13 of the zero-voltage switch (the input
impedance to terminal \3 of the zero-voltage switch is
approximately 50 kilohms); gate pulses are no longer applied
to the triac because Q2 of the zero-voltage switch is on. Hence,
if the PTC sensor is cold, I.e., in the low resistance state, the
load is energized. When the temperature of the PTC sensor
increases to the desired temperature, the sensor enters the high
resistance state, the voltage on terminal 2 becomes greater
than that on terminal 3, and the triac switches the load off.

Fig. 19 - Use of the CA3a58 or CA3a59 together with CA3086 for
switching Inductive 'oads.

The circuit shown in Fig. 19 forms a pulse of gate current
and can supply high peak drive to power traics with low
average current drain on the internal supply. The gate pulse
will always last just long enough to latch the thyristor so that
there is no probLem With delaymg the pulse to an optimum
time. As in other circuits of this type, -RFI results if the load is
not suitably inductive because the zero-crossing detector is
disabled and initial turn-on occurs at random.
The gate pulse forms because the voltage at point A when
the thyristor is on is less than 1.3 volts: therefore, the output
of the zero-voltage switch is inhibited, as described above. The
resistor divider Rl and R2 should be selected to assure this
condition. When the triac is on, the voltage at point A is
approximately one-third of the instantaneous on-state voltage
(VT) of the thyristor. For most RCA thyristors, V'f (max) is
less than 2 volts, and the divider shown is a conservative one.
When the load current passes through zero, the triac
com mutates and turn~ off. Because the circuit is still being
driven by the line voltage, the current in the load attempts to
reverse, and voltage increases rapidly across the "turned-off'
triac. When this voltage exceeds 4 volts, one portion of the
CA3086 conducts and removes the inhibit signal to permit
application of gate drive. Turning the triac on causes the

Fig. 20 - Use of the CA3058 or CA3059 to provide negative g8te
pu'ses: (a) schematic diagram; (bl peak gate current (at
terminal 3) as a function of gate voltage.

Operation with Low-Impedance Sensors
Although the zero-voltage switch can operate satisfactorily
with a wide range of sensors, sensitivity is reduced when
sensors with impedances greater than 20,000 ohms are used.
Typical sensitivity is one per cent for a SOOO-ohm sensor and
increases to three per cent for a O.l-megohm sensor.
Low-impedance sensors present a different problem. The
sensor bridge is connected across the internal power supply
and causes a current drain. A SOOO-ohm sensor with its
associated SOOO-ohm series resistor draws less than
1 milliampere. On the other hand, a 300-ohm sensor draws a
current of 8 to 10 milliampers from the power supply.
Fig. 21 shows the 600-ohm load line of a 300-ohm sensor
redrawn power-supply regulation curve for the

Interfacing Techniques
Fig. 24 shows a system diagram that illustrates the role of
the zero-voltage switch and thyristor as an interface between
the logic circuitry and the load. There are several basic

voltage across it to drop and thus ends the gate pulse. If the
latching current has not been attained, another gate pulse
forms, but no discontinuity in the load current occurs.
Provision of Negative Gate Current
Triacs trigger with optimum sensitivity when the polarity of
the gate voltage and the voltage at the main terminal 2 are
similar (1+ and Ir modes). Sensitivity is degraded when the
polarities are opposite (r and 111+ modes). Although RCA
triacs are designed and specified to have the same sensitivity in

Fig. 23 - Schematic diagram of the CA3080.

Further cycling depends on the voltage across the sensor.
Hence, very low values of sensor and potentiometer resistance
can be used in conjunction with the zero-voltage switch power
supply without causing adverse loading effects and impairing
system performance.

Fig. 21 - Power-supply regulation of the CA3058 or CA3059 with If
3OO·ohm sensor (6O(J.ohm IOBdJ lor tMO values of sBries
resistor.

interfacing techniques. Fig. 2S(a) shows the direct input
technique. When the logic output transistor is switched from
the on state (saturated) to the off state, the load will be
turned on at the next zero-voltage crossing by means of the
interfacing zero-voltage switch and the triac. When the logic
output transistor is switched back to the on state,
zero-crossing pulses from the zero-voltage switch to the triac

__________________________________________________________________ 507

ICAN-6182
TEMPERATURE CONTROLLERS
Fig. 29
shows a triac used

lag the incoming line voltage. The moton, however. are
switched by the triacs at zero current, as shown in F.ig. 34(b).

in
an
oRoOff
temperature-controUer confIguration. The triac is turned on at
zero voltage whenever the voltage Vs exceeds the reference

2."

'OWER
OUTPUT

,

.."

....E.
OUTPUT

,

The problem or driving inductive loads such.as these moton
by the narrow pulses generated by the zero-voltage switch is
solved by use of Ihe sensitive-gale RCA40S26 Iriac. The high
sensitivity of this device (3 milliamperes maximum) and low
latching current (approximately 9 milliamperes) permit
synchronous operation or the temperaturCKontroller circuit.
In Fig. 34(0), it is apperenl Ihal, Ihough Ihe gale pulse Vg of
triac Y 1 has elapsed, triac Y2 is switched on by the current
through RL I. The low latching current of the RCA40S26
triac results in dissipation of only 2 watts in RL I. as opposed
to 10 to 20 watts when devices that have high latching
currents are used.

""

POWER

"""'"

P.....

I

TlME--

O.!lA

Fig. 3' - Principl,. o( proportional control.

'AG

thermal system and the closed-loop type of control. In the
circuit shown in Fig. 32, the ramp voltage is generated when
the capacitor C 1 charges through resistors Ro and R 1. The
time base or the ramp is determined by resistors R2 and R3.
capacitor C2. and the breakover voltage of the D3202U· diac.
Fig. 29 - CA3058 0' CA3D59 on-off NmpeI'lItu,. controller,

TYOE
AC

voltage V r. The transfer characteristic of this system, shown in

,-----=---{)

IN5195

TOptN Z

I·Q-.....~h

VCC+6V

I.

Fig. 30(a), indicates significant thermal overshoots and

undershoots, a well-known characteristic of such a system. The
differential or hysteresis of this system. however. can be
further increased. if desired. by the addition of positive
feedback.

TO PIN 9

1-+iI'l---r~e.tf"r1"1-~OUTPUT

O.l,.F

TO PIN 7

I.

20011

~=---~--~----~----~--~
_FORMERLV RCA 45412
COMMOIII
ALL RESISTORS 1/2 WATT
UNL.ESS OTHERWISE SPECIFIEO

PIN CONNECTIONS REFER TO
RCA CA5058 OR CA305'

DIFFERENTIAL

c:to.,-ce

.FORMERLY RCA40528

Fig. 32 - Ramp ..".,..ror.

I.}

Ib}

Fig. 30 - T,.".,.,. chsractsmUc. of (.) on-off and (bJ pmpottionlll
control sy.nelnl.

For precise temperature-control applications, the
proportional-control technique with synchronous switching is
employed. The transfer curve for this type of controller is
shown in Fig. 30(b). In this case, the duty cycle of the power
supplied to the load is varied with the demand for heat
required and the thermal time constant (inertia) of the system.
For example, when the temperature setting is increased in an
on-off type of controller, full power (100 per cent duty cycle)
is supplied to the system. This effect results in significant
temperature excursions because there is no anticipatory circuit
to reduce the power gradually before the actual set
temperature is achieved. However, in a proportional control
technique, less power is supplied 10 the load (reduced duly
cycle) as the error signal is reduced (sensed temperature
approaches the set temperature).

When the voltage across C2 reaches approximately 32 volts,
the diac switches and turns on the 2N697S transistor and
IN914 diodes. The capacitor C. then discharges through the
collector-to-emitter junction of the transistor. This discharge
time is the retrace or tlyback time of the ramp. The circuit
shown can generate ramp times ranging from 0.3 to
2.0 seconds through adjustment of R2. For precise
temperature regulation, the time base of the ramp should be
shorter than the thermal time constant or the system, but long
with respect to the period or the 6O-Hz line voltage. Fig. 33
shows a triac connected for the proportional mode.

'0'

Ibl
F;II- 34 - Dual outpUr.

o","~nder

r.mpet'arure conrrollef fa} circuir.

fb} voIrag.1IIId cul'ffltlr .... for",,_

"K
a.

",

Before such a system is implemented, a time base is chosen
so that the on-time of the triac is varied within this time base.
The ratio of the on-to-otT time of the triac within this time
interval depends on the thermal time constant of the system
and the selected temperature setting. Fig. 31 illustrates the
principle of proportional control. For this operation, power is
supplied to the load until the ramp voltage reaches a value
greater than the dc control signal supplied to tt,..e opposite side
of the differential amplifier. The triac then remains off for the
remainder of the time-base period. As a result. power is
"proportioned" to the load in a direct relation to the heat
demanded by the system.
For this application, a simple ramp generator can be
realized with a minimum number of active and passive
components. A ramp having good linearity is not required for
proportional operation because of the nonlinearity of the
• Fonnerly RCA 45412

Fig. 34(a) shows a dual·output temperature controller that
drives two triacs. When the voltage Vs developed across the
temperature-sensing network exceeds the reference voltage
VRl, motor No. I turns on. When the voltage across the
network drops below the reference voltage VR2, motor No.2
turns on. Because the motors are inductive, the currents 1M 1

Electrlc-Heet Application
For electric·heating applications, the RCA·2N5444
40-ampere triac and the zero-voltage switch constitute an
optimum pair. Such a combination provides synchronous
switching and effectively replaces the heavy-duty contacton
which easily degrade as a result of pitting and wealout from

_______________________________________________________________ 509

ICAN-6182
"

2N5444

system. Many types of automatic equipment are not complex
enough or large enough to justify the cost of a flexible logic
system. A special circuit, designed only to meet the control
requirements of a particular machine, may prove more
economical. For example, consider the simple machine shown
in Fig. 42; for each revolution of the motor. the belt is
advanced a prescribed distance, and the strip is then punched.
The machine also has variable speed capabiJity.

"',

O.5,.F
200VOC

* fOR PftOPORTlOftAL OP(RATIQh OPEN TERMINALS 9,10 IoNQ II "'ltd) CONNECT POSTIVE RAMP VOlTAGE

C

Fig.
TO lVINIMAL 11

_.SELECTED FOR XGT-6 mA MAXIMUM
_FORMERLY RCA 44003
_FORMERLY RCA 40655

Fig. 39 - CA3058

01'

CA3059 iflttlgnll-cycltl r.mperaWftI controlle,

rltat features #I prottICtion circuit and no "'1f~I;ng effect.

When the ae line swings negative, capacitor C discharges

through the triac gate to trigger the triac on the -negative
half-cycle. The diode-resistor~apacitor "slaving network"
triggers the triac on negative half-cyc1e to provide only integral
cycles of ae power to the load.
When the temperature being controlled reaches the desired
value, as determined by the thermistor, then a positive voltage

leg of the ac line is maintained at ground. The comparator. Al
(a CA3130). is powered from a 6.4-volt source of potential
provided by the zero-voltage·switch (ZVS) circuit ~a CA307:».
The ZVS, in turn, is powered off-line through a senes-droppmg
resistor R6. Terminal 4 of the ZVS provides trigger-pulses to
the gate of the load-SWitching triac in response to an appro·
priate control signal at terminal 9.

level appears at terminal 4 df the zero-voltage switch. The SCR
then starts to conduct at the beginning of the positive input
cycle to shunt the trigger current away from the gate of the
triac. The triac is then turned off. The cycle repeats when the
SCR is again turned OFF by the zero-voltage switch.
The circuit shown in Fig. 39 is sfmilar to the configuration
in Fig. 38 except that the protection circuit incorporated in
the zero-voltage switch can be used. In this new circuit, the
NTe sensor is connected between terminals 7 and 13, and
transistor Qo inverts the signal.output at terminal 4 to nullify
the phase reversal introduced by the SCR (Y I)' The internal
power supply of the zero-voltage switch supplies bias current
to transistor 0 0 ,
Of course, the circuit shown in Fig.· 39 can readily be
converted to a true proportional intepak:ycle temperature
controUer simply by connection of a positive-going ramp
voltage to terminal9 (with terminals 10 and 11 open), as
previously discussed in this Note.
Thermocouple Temperature Control

Fig. 40 shows the CA3080A operating as a pre-amplifier for
the zero-voltage switch to form a zero-voltage Switching circuit
for use with thermocouple sensors.

ALL RESISTORS 1/2 WAlT
UNLESS OTHERWISE SPECIFIED
UCS-22619

Fig. 40 - Thermocoupl.

temper"tu,.

control

with

zero·lIOItllge

switching.

Thermocouple Temperature Control with Zero-Voltage load
Switching
Fig. 41 shows the circuit diagram of a thermocouple temperature control system using zero·voltage load switching. It
should be noted that one terminal of the thermocouple is con·
nected to one leg of the supply line. Consequently, the thermocouple can be "ground·referenced", provided the appropriate

42 - $tep-tlfld-punch trIIIChin ••

The typical electromechanical control circuit for such a
machine might consist of a mechanical cambank driven by a
separate variable speed motor. a time delay relay, and a few
logic and power relays. Assuming use of industrial-grade
controls, the control system could"get quite costly and large.
Of greater importance is the necessity to eliminate transients
generated each time a relay or switch energizes and deenergizes
the solenoid and motor. Fig. 43 shows such transients, which
might not affect the operation of this machine, but could
affect the more sensitive solid-state equipment operating in the
area.
A more desirable system would use triacs and zero-voltage
switching to incorporate the following advantages:
a.
Increased reliability and long life inherent in
solid-state devices as opposed to moving parts and
contacts associated with relays.

I~IK ~1-:Y0r®-l

REF.

VOLTAGE
A[hJUST

HYSTERES'S ·R3/R4XII.4V' IK/~.lMII6.4V '12~1ft1/

92CM·29961

Fig. 41 - Thermocouple remperatunlcontrol with Zf1«J·voitllp
.witching.

The CA3130 is an ideal choice for the type of comparator
circuit shown in Fig. 41 because it can "compare"low voltages
(such as those generated by a thermocouple) in the proximity
of the negative supply r~il. Adjustment· of potentiometer RI
drives the voltage-divider network R3, R4 so that reference
voltages over the range of 0 to 20 millivolts can be applied to
noninverting terminal 3 of the comparator. Whenever the
voltage developed by the thermocouple at terminal 2 is more
positive than the reference voltage applied at terminal 3, the
comparator output is toggled so as to sink current from terminal 9 of the ZVS; gate pulses are then no longer applied to
the triac. As shown in Fig. 411, the circuit is provided with a
control-point "hysteresis" of 1.25 millivolts.~
Nwling of the comparator is performed by means of the
following procedure: Set Rl at the low end of its range and
short the thermocouple output signal appropriately. If the
triac is in the conductive mode under these conditions. adjust
nulling potentiometer R5 to the point at which triac conduction is interrupted. On the other hand, if the triac is in the nonl:onductive mode under the conditions above. adjust R5 to the
point at which triac conduction commences. The thermo·
couple output signal should then be unshorted. and Rl can be
set to the voltage threshold desired for control-circuit operation.

MACHINE CONTROL AND AUTOMATION
The earlier section on interfacing techniques indicated
several techniques of controlling ae loads through a logic

Fig. 43 - Transients generated by reiay-contllCt bounce lind non-zero
tum-oH of inductil/fl 10ild.

b.

Minimized generation of EMI/RFI using zero-voltage
Switching techniques in conjunction with thyristors.
c.
Elimination of high-voltage transients generated by
relay-contact bounce and contacts breaking inductive
loadS, as shown in Fig. 42.
d.
Compactness of the control system.
The entire control system could be on one printed-circuit
board, and an over-all cost advantage would be achieved ..
Fig. 44 is a timing diagram for the proposed solid-state

Fig. 44 - Timing rJillfl'"m tor propo$fK/ $OlId-sttJre mllChine control.

511

ICAN-6182
SYNCHRONOUS LIGHT FLASHER

Fig. 50 shows
a
simplified
version
of
the
synchronous·switching traffic light flasher shown in Fig. 49.

o..,.f
Z5VDC

....'20

2.

,-

I

VI<

'OK

I

1i5voc+

120VAC

GOH'

I

OJ,.'

10VOC

ON

Fig. 60 - Synchronous light flasher.

Flash rate is set by use of the curve shown in Fig . .J 6. If a more
precise flash rate is required, the ramp generator described
previously may be used. In this circuit, ZVS 1 is the master
control unit and ZVS2 is slaved to the output of ZVSl
through its inhibit terminal (terminal I). When power is
applied to lamp No. I, the voltage of terminal 6 on ZVSl is

*IF Y2' FOR EXAMPLE, IS A "O'AMPERE TRIAC, THEN R, MUST BE
SUfFICIENT lGT fOR Y2

DECREASED TO SUPPLY

• FOftMULY RCA 40191

Fig.

5' - Zero'lIOltllgtl switch

trIInSient·'rBfI

switch controller in which

POweT is supplied to thelOild when the switch

;s tJpM.

high and ZVS2 is inhibited by the current in Rx. When lamp
No. I is off, ZVS2 is not inhibited, and triac Y2 can fIre. The

power supplies operate in parallel. The on-of( sensing amplifier
in ZVSa is not used.
TRANSIENT·FREE SWITCH CONTROLLERS
The zero-voltage switch can be used as a simple solid-stat;e
Switching device that permits ac currents to be turned on or
off with a minimum of electrical transients and circuit noise.

The circuit shown in Fig. 51 is connected so that, after the
control terminal 14 is opened, the electronic logic waits until
the power-line voltage reaches a zero crossing before power is
applied to the load ZL. Conversely, when the control terminals
are shorted, the load current continues until it reaches a zero
crossing. This circuit can switch a load at zero current whether
it is resistive or inductive.
The circuit shown in Fig. 52 is connected to provide the
opposite control logic to that of the circuit shown in Fig: S 1.
That is, when the switch is closed, power is supplied to the
load, and when the switch is opened, power is removed from
the load.
In both configurations, the maximum rms load current that
can be switched depends on the rating of triac Y2. IfY2 is an
RCA·2NS444 triac, an rms current of 40 amperes can be
switched.

120VAC

OOH,

* If

Yz , fOA EXAMPLE, IS A 40-AMP[RE TRIAC, AI MUST 8E DECREASEO TO SUPPLY
SUFfiCIENT IGT fOR Yz

• FORMERLY RCA "0691

DIFFERENTIAL COMPARATOR FOR

IN~USTRIAL

USE

Differential comparators have found widespread use as limit
detectors which compare two analog input signals and provide
a go/noogo, logic' one" or logic ''zero'' output, depending
upon the relative magnitudes of these signals. Because the
signals are often at very low voltage levels and very accurate
discrimination is normally required between them. differential
comparators in many cases employ differential amplifiers as a
basic building block. However. in many industrial control
applications. a high-performance differential comparator is not
required. That is, high resolution, fast switching speed. and
similar features are not essential. The zero·voltage switch is
ideally suited for use in such applications. Connection of
terminal 12 to terminal 7 inhibits the zero-voltage threshold
detector of the zero-voltage switch, and the circuit becomes a
differential comparator.
Fig. S3 shows the circuit arrangement for use of the
zero-voltage switch as a differential comparator. In this
application, no external dc supply is required. as is the case .
commerCially available integrated-circuit
with most
comparators; of course. the output-current capability of the
zero·voltage switch is reduced because the circuit is operating
in the dc mode. The l()()().ohm resistor Ro. connected
between terminal 4 and the gate of the triac, limits the output
current to approximately 3 milliamperes.
When the zero-voltage switch is connected in the dc mode,
the drive current for terminal4 can be determined from a
curve of the external load current as a function of dc voltage

Fig. 52 - Zero·voltage switch transient-free switch controller in which
poWflr;s applied to the load when the switch is closed.

'L

ANY POWER
FACTOA

• fCMtMULY IilCA 40191

FI,. 53 - DifftmlntitJI COTrlplHator wing rhfI CA305B or 00\3059

in,...tfId-clrcu;t

zero·WI',..,. "witch.

_____________________________________________________________________ 513

ICAN·6182
3. Two phases must be turned on for initial starting of the
system. These two phases form a single-phase circuit
which is out of phase with both of its component phases.
The single-phase circuit leads one phase by 30 degrees
and lags the other phase by 30 degrees.
These conditions indicate that in order to maintain a
system in which no appreciable RFI is generated by the
switching action from initial starting through the steady-state
operating condition. the system must first be turned on, by
zero-voltage switching, as a single-phase circuit and then must
revert to synchronous three-phase operation.

Fig. 67 -"".. Control ci~uit usin, a CA3058 or CA3069 and two
CA3086 inte(p'8ted.arcui,..

•• 0

Fig. 60 shows a simplified circuit configuration of a
three-phase heater control that employs zero·voltage
syncluonous switching in the steadY4tate operating condition,
with random starting. In this system, the logic command to
turn on the system is given when heat is required, and the
command to turn off the system is given when heat is not
required. Time proportioning heat control is also possible
thrOUgh the use of logic commands.
The three photo-ooupled inputs to the three zero-voltage
switches change state simultaneously in response to a "logic
command". The zero-voltage switches then provide a positive
pulse, approximately 100 microseconds in duration, only at a
zero-voltage crossing relative to their particular phase. A
balanced tluee-phase sensing circuit is set up with the three
zero-voltage switches each connected to a particular phase on
their common side (terminal?) and referenced at their high
side (terminalS), through the current-limiting resistors R4,
RS, and R6. to an established artificial neutral pOint. This
artificial neutral point is electrically equivalent to the
inaccessible neutral point of the wye type of three-wire load
and, therefore, is used to establish the desired phase
relationships. The same artificial neutral point is also used ~o
establish the proper phase relationships for a delta type of
three-wire load. Because only one triac is pulsed on at a time,
the diodes (Dl, D2, and D3) are necessary to trigger the
opposite-polarity triac. and. in this way, to assure initial
latching·on of the system. The three resistors (RI, R2, and
R3) are used for current limiting of the gate drive when the
opposite-polarity triac is triggered on by the line voltage.
In critical applications that require suppression of all
generated RFI. the circuit shown in Fig. 61 may be used. In
addition to synchronous steady-state operating conditions, this
circuit also incorporates a zero-voltage starting circuit. The
start-up condition is zero-voltage synchronized to a
single-phase, 2·wire, line-to-line circuit, comprised of phases A
and B. The logic command engage' the linsle-phase .tart-up
three-pIwe
photo...,upled
zero-voltage
.witch
and
isoiatonOCl3. OC14. OCIS through the photo-coupled

Fig. 68 -

control circuits. This signal must be electrically isolated
from the three·phase power system.
3. Three separate triac gating signals are required.
4. For operation with resistive loads, the zero-voltage
SWitching technique should be used to minimize any
radio-frequency interference (RFI) that may be
generated.
1 _ aI DC ....... ClrauItry
As expbdnocl earlier WIder Speolol AppIb_
~ isolation of tho de losic circuitry" from tho ac
line. tho _ . and tho load circuit is often desirable ..... in
many sinsle-phase power-oontrol applicationa. In control
circuil1l for pclypbaae power ayatoms. however. this typo of
.isolation is essential, because the common point of the de logic
circuitry cannot be referenced to a common line in all phases.
• The de tope _

prooIdos the Iow-level olectrk:al _
that
dictate. the state of the load. For temperature controls. the de Io8ic
circuitry incluc1cs a temperature sensor for feodback. The RCA
intepated-clmrit zero-voltap IWitch, when operated. in the de mode
with I08l8 additional circuitry. can Ieplace the de Iosic cltcuitry for
temperature controls.

On~ff

touch switch.

In the three-phase circuits described in this section,
photo-optic techniques (i.e., photo-coupled isolators) are used
to provide the electrical isolation of the de logic command
signal from the ac circuits and the load. The photooCoupled
isolaton consist of an infrared light-emitting diode aimed at a
silicon photo transistor, coupled in a common package. The
light-emitting diode is the input section, and the photo
transistor is the output section. The two components provide a
voltage isolation typically of I SOO volts. Other isolation
techniques, such as pulse transformers. magnetoresistors, or
reed relays, can also be used with some circuit modifications.

lal

Resistive Loads
Fig. S9 illustrates the basic phase relationships of a
balanced three-phase resistive. load. such as may be used in
heater applications, in which the application of load power is
controned by zero.>Oltaao switchins. The fonowing condillona

Ibl

are inherent in this typo of application:
I. The phu.. are 120 degr... aparl;conaequently. all three

Fig. 69 - Volt.., phase ";'tionship for a thrH-p/IMe "';8tillll load

phases cannot be switched on simultaneouJly at zero
>oltaao.
2. A single phase of a wye confrguration type of three-wire
system cannot be turned on.

when the BPtJlicarion of IOIHI power is controlled by

zero·vol. switching: fal voItllflB .......forms. fbI

losd~in:uit

=,::~0:'~ra:::,::,,;::,,:~~n::e::'Zditt;:,:.';:

deviation at starr-up and hlrn~ff should be noted.1

_____________________________________________________________________ 515

ICAN-8182

Fig.. 62 - Triac three-phase control circuit fo, an inductillfl load, i.fI.,
thretl-pluJsemoror.

517

ICAN-8222
Considerations in Low-Noise Performance

AMBIENT TEMPERATURE !T"J'25-C

Fig.S shows the schemati<;: diagram of a noise model
useful in a review of the considerations pertinent to optimizing low-noise performance in amplifier operation.

;--

'~-~---~r+---1--+-+++--r--~-H

. ,.

. ,.

ENT•
REFERREO
TOHERE~

100
FREQUENCY Cf) -

1000

Hz

. ..

QI-QI CONTAINEO IN
THE C"3095E
• SEE FIG_2

10,000

Fig. • TOTAL INPUT-REFERREO NOISE ...OLTAGE

f.fFfi'

ENTI

FOR AMPLIFIER ORIVEN FROM SIGNAL- SOURCE HAVING SOURCE
RESISTANCE RS. Entilin VI.,/HiJ '''4I
I..OW· OIUFTi~~~~A~~~RCONSTANT

Fifl. '6 - Typical w".,..".ta op"llmp IIPPJicllrions:
lal piuoelectric rranaduew IImplifier
(b) low-drlfr. long-tim.-eQnsranr intqrlltor.

Fig. 14 - Op·.mp with unity (JlIin pl'llillTlp/ifier.
Fig. 18 - Tapti play·back preamplifier equalized for

...'"

108M

'"
200.
'" ....."'"c-,.-,.-(ii}-r

·SEEFIG.2

• SEE FIG 2:

NAB standarch (7.5 inls).

playback standards is shown in Fig. 19. Transistors QI and Q3
are cascode'IN\, r.. I 02.
DETECTOR I
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ZENER
REFERENCE

HORIZONTAL
KEYING INPUT

RESISTANCE VALUE ARE IN OHMS.

Fig. 7- Compillre circuit d/afyam mowing dIItlli/s of thll bylng circuit
IIIId int.,,,,,1 bias circuits.

________________________________________________________________ 525

ICAN-6257
l

24

ti:

23

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REIVT

22 ~---t-~-~-

f----

·2.
.g
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AFt VOiTAGE-pr 7-10 rROSS

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T[MPERATURE-·C

'"

linearity improves as the bandwidth increases; however,
recowred audio decreases. A satisractory compromise for
most FM-receiver applications is reflected in the circuit of
Fig. 9(a). This circuit typically provides 400 millivolts rms of
recovered audio with less than O.Sopercent distortion.
Because a double-tuned circuit has better phase linearity <*r
a wider bandwidth, distortion figures ofless than O.I-percent
are attainable with the network used. in the circuit of Fig.
9(b). Proper alignment and coupling adjustment of the
double-tuned circuit are most easily accomp1ished while
viewing the resulting S curve. Initial adjustment of the
primary tuning sJug to the proper crossover is made with the
secondary slug removed. The secondary tuning slug is then

100

where Rl is the total parallel resistance and V8 is
approximately 300 millivolts, peak-to-peak.

exhibit inductive reactance at their terminals. The nominal
mput impedance of the CA3089E is approximately 9,000
ohms, and it is not recommended that an impedance match
be attempted. Most commercial receivers use ceramic-filter
frequency-selective elements that normally have source
impedances or 500 ohms or less. When these fdters are
properly terminated with loading resistors, the typical source
impedance is rurther decreased to 250 ohms or less. Higher
levels of source impedance are possible with very careful
circuit layout; however, the maintenance of stability could
be diffICult.

wen

Various circuit values can be used to obtain the same
recovered audio. but the basic conditions of circuit
bandwidth and phase linearity must be maintained. The
detector circuit also sets up conditions which are required for
proper operation or the mute circuit. The rf voltage on pin 9
must be held at approximately 175 millivolts nns, ±25
millivolts. The reason for this requirement is discussed
subsequently in connection with the mute logic circuit. The
approximate voltage at pin 9 is determined rrom the
equivalent circuit shown in Fig. 10.
The peak.to-peak voltage on .pin 9 is:

I V91"'I V81-;J;

Fig. 1- SuppJv cummt and AFC voItIIgIIM a function of tflmptJI'lIttJnI.

The CAJ089E has a rrequency response that is typically
flat to 20 MHz; consequently, the device can provide userul
gain
above that frequency. If the device is used at lower
rrequencies, the larger-value bypass capacitors required may
not be adequate to bypass tbe higher frequencies. Double

measuring distortion. The coupling may be varied by either
moving the coils or by changing the value or the secondary
load resistor.

ALL RESISTANCE VAlUES ARE IN OHMS
*l TUfES WITH 100 pF ICI AT 10.7 NHE
00Iu"'1..0"oa))-7$ 16.1. AUTOMATIC MFG. 01V. EX22741 OR EQUIVALENT)

bypassiDg with lower-value capacitors can overcome such a
ploblenL Another means of allOYiating the problem is 10
externally reduce the frequency tesponae by using a smaU
capacitance across the output load of the device.

The Q of the tuned circuit between pins 9 and 10 may be
affected by the effective Q of the choke between pins 8 and
9 and the series resistor R31 in the CA3089E. All of the
above factors should be considered in selecting circuit values.
Table I lists some typical combinations of component values
under various conditions.
A choke is normally selected to equalize delays in the
signal path and in the limiter-quadrature path. It also
reduces the ir harmonic content across the quadrature
circuit. In some cases, such as in narrow-band applications, it
may become necessary to use a capacitor as the coupling
component where large values or inductance with high Q's
are difftcult to obtain. If a capacitor is used, the phase or the
recovered audio and AFC voltage will be reversed, some
asymmetry of the S curve may result, and the distortion may
be adversely affected to a small degree.
As indicated above, the inductance between pins 8 and 9
tends to equalize delays in the detector signal paths. The
matching of elemen ts of the IC in the balanced detector

I.)

~

i

"~"

.twmin• ."",oxi"",,. von.,. on

Fig. 10- EquiWlltmt cimuit used to
pin 9 of tM CA3089E in Fifo 9.

circuit results in an AFe output with a very small offset
voltage at pin 10. For most
when referred to
applicatiOns, the inherent offset variation is well within
tolerances, and does not affect circuit perrormance. ]n some
narrow·band applications, however, the offset becomes more
critical because of the very narrow bandwidth. In such
situations. the combination or normal production variations
of the device and the external circuit components results in
receiver detuning when the AFC loop is closed. This detuning
results in an increased distortion or the recovered audio. This
distortion can be corrected with the addition or a variable
capacitor from pin 8 to ground to provide phase
compensation. The capacitor can be adjusted to provide zero
AFC offset with minimum distortion. Generally, the orrset is
in one direction ror a given set of conditions. The addition of
a fIXed capacitor will minimize variations sufficiently to
satisfy many applications. A value or 5 picorarads is an
effective value for the circuit or Fig. 9(a) with the
recommended PC-board layout. Conversely, the ofrset
created by using a capacitor between pins 8 and 9, as
mentioned earlier, may be compensated by placing an
inductance between pins 8 and 10.

the

a) Bottom villW of printlld-circuit board.

ALL RESISTANCE VAlUES AfiE IN OHMS
*T:PR1.-00IUNlOADEDIIil'SCTUNES WITH 100 pF

ten

201 OF 34. ON 7/!2MOIA. f'ORM

SEC.-00(UNlOAOEDI1I75 (TUNES WITH 100 pF IC2) 201 OF 34e 0lIl 7/32" OIA. FORM
kQ(PERCENT OF CR1T1CAL COlIPLiNGIIi TO%
(ADJUSTED FOR COIL VOLTAGE Vc;lol5Q rtN
ABOVE IJALlJES PERMIT PROPER OPERATION OF MUTE lsaUELCtlI CIRCUIT
"E" T'HIE SLUGS,SPACING 4 ... ""

bl Components/de -!UP view.
"'" 8.-. CA3OB9E Md ourIJoenI ~tJ mountlld on.
pdnred cin:ult boen/..
O"....nt-Det8ctor Ciroui'll

The quadrature-detector tuned circuit is connected
between pins 9 and 10. The signaJ voltage at pin 8 is
normally coupled to pin 9 throush a choke. The circuit
values for the detector network are determined by several
ractors, the primary one being distortion at a particular level
of recovered audio. Distortion is determined by the phase
linearity of the quadrature network and is not influenced by
the device unless excessive. recovered audio overdrives the
audio circuit With a Single tuned network, the phase

(b)
Fig. 9- (a) Ten c;n;uit for tlHl CA3089E using a sin....tunlld dBtector
.coil, (b) at circuit for ,l1li CA3D89E wing a doublfl-tuned
.tectorcoil.

adjusted until '8 slight "ripple" is observed moving along the
S curve. If the ripple is excessive (enough to distort the S
curve) the coupling is too tight. If no ripple is observed. the
coupling is too loose. As the ripple moves through the
crossover point, it will be observed that the S curve becomes
more linear near the center frequency. Slight readjustment of
both slugs may be necessary for final alignment. The best
performance can then be achieved by slight adjustment while

Audio .,d AFC CircuitS
The audio and AFC circuits are very similar, and both
develop the same audio signal at their respective output
terminals. The audio output voltage on pin 6 is developed
across an internal. nominal. 5.000·ohm resistor ·CR49)
connected to the 5.6-volt reference. In addition, the audio
signal level can be attenuated by providing' a direct current
into pin 5 without any shift in its dc level. The audio output,

________________________________________________________________ 527

ICAN-8257
455 kHz without the use of external c:ircuilly. The rf-AGC
and mute logic 9
CARRY OUT

"9-

+7.5V

+IOV

02- 05
4/5

Fig. 6- Photo of circu;t-boBrd layout

CA3083

Fig. 5- Counter·latch-timer-control circuit schematic.

_____________________________________________________________________ 555

Abstracts of Other Application Notes
voltages: a 50-dB amplifier: a la-dB. 42-MHz
amplifier: a twin-T bandpass amplifier: a Za-dB.
I D-MHz bandpass amplifil'r; and a voltagefollower.
ICAN-5269 . . . . . . . . . . . . . . .

CA3028B are suitable for use in a wide range
of applications in dc, audio. and pulse aml'lifier
service; they have ':been used as sense amplIfIers,
preamplifiers for low-level transducers. and dc
differential amplifiers.

7 pages

Integrated Circuits for FM Broadcast Receivers

This Note describes several approaches to
FM receiver design using silicon monolithic
in tcgratcd circuits. Th~ ~uncr ~.ction is described
first. and then the II-amphfler and detector
sections. Performance characteristics are described where applicable. The FM receivers discussed
arc designed for use from a +9-volt supply.
The key to design simplicity is the use of the
RCA multifundion integrated circuits CA3005,
CA30l2, and CA3014. The CA3005 may be
used as a cascade rf amplifier, a differential rf
amplifier, a mixer-oscillator. and an if amplif!er;
the CA3012 and CA3014 perform if amplIfIcation. limiting, detection, and preamplification.
ICAN-5296 . . . . . . . . . . . . . . 5 pages
Application of the RCA-CA3018 IntegratedCircuit Transistor Array
The CA3018 integrated circuit consists of
four silicon epitaxial transistors produced by a
monolithic process on a single chip mounted in
a 12-lead 1'0-5 package. The four active devices,
two isolated transistors plus two transistors with
an emitter-base common connection, are especially suitable for applications in which
closely matched device characteristics are required, or in which a number of active devices
must be interconnected with non-integrable
components such as tuned circuits, large-value
resistors, variable resistors. and microfarad bypass capacitors. Such areas of application include
if, rf (through 100 MHz). video, agc, audio, and
de amplifiers.
ICAN-5299 . . . . . . . . . . . . . . . 6 pages
Application of the RCA-CA3019 IntegratedCircuit Diode Array
The CA 30 19 in tegra ted circuit diode array
provides four diodes internally connected in a
diode-quad arrangement plus two individual
diodes. Its applications include gating, mixing,
modulating. and detecting circuits. Because all
the diodes are fabricated simultaneously on a
single silicon chip. they have nearly identical
characteristics. and their parameters track each
other with temperature variations. ConsequentIy, the CA3019 is particularly useful in circuit
configurations that require either a balanced
diode bridge or identical diodes.
ICAN-5337 . . . . . . . . . . . .
10 pages
Application of the RCA-CA3028A and CA30288 Integrated-Circuit RD Amplifiers in the
HF and VHF Ranges
The C A3028A and CA3028B monolithicsilicon integrated circuits are single-stage differential amplifiers intended for service in
communications systems opera ting at frequencies up to 100 MHz wilh single power supplies.
This Note provides technical data and recommended circuits for use of the CA3028A and
CA3028B in rf amplifiers, au todyne converters,
if amplifiers, and limiters. The CA3028A and

ICAN-5338 . . . . . . . . . . . . . . . 14 pages
Application of the RCA-CA3021, CA3022,.a.nd
CA3023 Integrated-Circuit, Wideband AmplIfIers
The CA3021, CA3022, and CA3023 integrated circuits arc multipurpose high-gain amplifiers designed for use in video and AM or ~M.
if stages in single-power-supply systems. SpecIfIcally, they can be used in video amplifiers
operating at frequencies through 30 MHz, A!'1
and FM if amplifiers, and buffer amplIfiers In
which an isolation capability greater than 60
dB at I MHz is desired.
ICAN-5380 . . . . . . . . . . . . . . . 7 pages
Integrated - Circuit Frequency - Modulation if
Amplifiers
The discussion in this Note shows that the
simplest approach I to the use of the CA3012
and CA3028 integrated circuits in FM if-amplifier strips is to replace each stage in present
discrete-transistor if strips with a differential
amplifier. This integrated-circuit approach requires a minimum of re-engineering be~ause a
cascade of individually tuned if stages IS used.
From a performant.-e point of view, this approach results in better AM rejection than that
obtained with discrete circuits because of the
inherent limiting achieved with the differentialamplifier configuration.
ICAN-5766 . . . . . . . . . . . . . . . 8 pages
Application of the RCA-CA3020 and CA3020A
Integrated-Circuit Multipurpose Wideband
Power Amplifiers
The CA3020 and CA3020A integrated circuits are multipurpose, multifunction power
amplifiers designed for lise as power-output
amplifiers and driver stages in portable and
fixed communications equipment and in ac
servo-control systems. The flexibility of these
circuits and the high-frequency capabilities of
the circuit components make these types suitable for a wide variety of applications such as
broadband amplifiers, video amplifiers, and
video line drivers. Voltage gains of 60 dB or
more are available with a 3-dB bandwidth of
8 MHz. Applications covered include audio,
wideband, and driver amplifiers.
5 pages
ICAN-5831 . . . . . . . . . . . .
Application of the RCA-CA3044 and CA3044VI
Integrated Circuits in Automatic-Fine-Tuning
Systems
This Note describes the use of the CA3044
and CA3044VI integrated circuits as automatic
fine-tuning (AFT) system components and discusses the advantages of integrated circuits in
this application. The CA3044VI is electrically
identical to the CA3044, but is supplied with
formed leads for easier printed-circuit-board
mounting. The construction and performance
of a typical automatic-fine-tuning 'system for a
color television system are examined.

ICAN-584I . . . . . . . . . . . . . . . 4 pages
Feedback-Type Volume-Control Circuits for
RCA-CA3041 and CA3042 Integratad Circuits
This Note describes feedback-type volume
controls for use with RCA-CA3041 and CA3042
integrated circuits in television receivers. In
television sets using these integrated circuits,
the volume control is often located remote
from the amplifier. The long leads required in
such a configuration sometimes pick up undesirable signals that, in turn, cause the system to
exhibit hum and noise at low volume levels.
The proposed feedback-type volume control
reduces hum and noise pick-up by reducing the
gain of the system rather than the signal level,
and thus eliminates the cost of shielding the
leads.
ICAN-6259 . . . . . . . . . . . . . . . 10 pages
Integrated-Circuit Stereo Decoder Using the
CA3090AQ Stereo Multiplex Demodulator
The CA3090AQ integrated-circuit provides
features heretofore unavailable to the receiver
designer. This device needs only a sin):le tuning
adjustment. which reduces to a mmlmum the
manual effort during assembly; the phase-locked
loop maintains performance under conditions
of temperature variations, humidity, and aging.
The compactness of the CA3090AQ and of the
required external components, added to the
other attributes, makes this stereo decoder a
significant advancement in the state of the art
of stereo decoder designs.
ICAN-6302 . . . . . . . . . . . . . . . 9 pages
Description and Application of the RCACA3120E I ntagrated-Circuit TV-Signal Processor
The CA 3120E is a 16-pin, dual-in-linemonolithic-silicon integrated circuit that processes a video signal and provides the follow.ing
outputs: non-inverted video output; nOlseprocessed, inverted .video output; dual-polarIty,
composite synchronization signals; and automatic gain-control signals (agc). The IC, whIch
can be used in color or monochrome TV
reoeivers, requires a single-polarity power supply
(positive) and includes impulse noise inversion
and delay circuits that reduce the deleterIOUS
effects of impulse noise in the receiver age and
synchronization (sync) circuits. Standard agc
strobing techniques are also used. Th~ agc and
impUlse-noise thresholds are ~utomal!cally s:'t
and require no controls. The If maxlmu'!l-galn
bias and the tuner agc delay may be adjusted
for optimun. TV-receiver performanoe; the
time constant tor the sync-separator input can
also be optimized by the set designer.
ICAN-6724 . . . . . . . . . . . . . . . 8 pages
A Flexible Integrated-Circuit Color Demodulator for Color Television

This Note describes the circuit operation
and application of the CA3067 in a .color television receiver. The CA3067, whIch IS supplIed
in a quad-in-line 16-lead plastic package,. provides the following color-demodulator CIrCUIt
functions: amplification, balanced chroma demodulation. dc-operated tint (phase) control,
and zener-diode voltage regulation.

____________________________________________________________ 557

RCA Sales Offices
Manufacturers'Representatives,
and Authorized Distributors

_ _ _ _ _ _ _ _ _ _ _ _ 559

RCA Manufacturers' Representatives
ArIzona ...•...• C.T. Carlbelll Allsocl ....,
4238 North Brown Ave.,
Scottsdale, AZ 85251 •......•........... (802}277·2808
Caillomia •..... Beetronlca (San Diego Area)
7827 Convoy Court, Suite 407,
San Diego, CA 92111 .........••.......•. (714)278-2150
Colorado ..•.•.. Waugaman AIIsocI ..... Inc.
4800 Van Gordon.
Wheatrldge, CO 80033 ..•.••........•..• (303)423-1020
Delawara •...•.. Thoma. AIIsocI ...., Inc., (See New Jersey)
florida ..•...•.• O.F. Bohman Allsoclata••
5104 No. Orange Blossom
Trail, Suite 115, Rosemont Bldg.
Orlando, FL 32804 ...................... (305)2115-6780
O.F. Bohman Allsocl .....
3172 SW 27th Ave., Apt. 3,
Miami, FL 33133 ...•....•...••....•.••. (30S)584-3081
O.F. Bohman Allsocl.ta.,
4511 Bayahore Blvd. NE.
St. Petersburg, FL 33703 .......••••••.•.. (813)527"54
Idaho .•...•..•. Wa.tem Technical Sal... Inc.,
(No. of Boise. see Washington)
R2Mallletlng, (E. & S. of
Boise. see Utah)
IIIlnol•...•..•.. Kebco. (see Missouri)
Iowa ...•....•.. Loranz Sal... Inc., Suite 302,
Executive Plaza,
Cedar Rapids, IA 52402 ..•..•..•.•....... (319)3113-8812
Ken.a. • ••.•... K.bco, 7070 West 107th St., Suite 160,
Overland Park. KS 68204 ••.••••........•. (913)848-2188
Loul.l.na •..... J.ckson Amold Company. (see Texas)
Michigan •..•... Nlcon AllsocIata., 3835 W. Eight
Mile Rd., DetrOit, MI48221 ••.•...•.•.•... (313)341.7886
Mlnn._ ..•..• Com.trand. Inc.,
2852 Anthony Lane South,
Minneapolis, MN 55114 •....•.........•. (612)788-8234
MllIOuri .....•. Kabco, 75 Worthington Drive.
Maryland, MO 63043 .•••........•.•. (314)578-411014111
Montana ..•.... R2 M.lllellng. (see Utah)
N.br••ka .•..... Loranz Sal... Inc., (see Iowa)
Nevada ...•.••. C.T. Carlberg AIIsocI .... (Clerk Co.,
see Arizona)

New Jer.., ...•. Thoma. AIIsocI ..... Inc••
(So. N.J.), 12 South Blackhorse Pika
(215)827""5
Bellmawr, NJ 08031 ..••.•••••••.••...•.. (60l)Il33-2800
New Mexico ..•. C.T. Carl belli Allsocl.....
PO Box 3177. Station D.
Albuquerque. NM87110 ••.•..•.•••....•. (5CIS)2§1579
New YolII .•..•.. L·Mar Allsoclam. Inc••
(Upst.te Ny), 08 Elwell Ave.
Binghamton. NY 13901 •.•.•..••.••.••••. (607)723-1513
New York •..•.•. L·Mer Allsocl ..... Inc ••
(Upetate Ny) PO Box 7945.
Roch.ster. NY 14608 .••.•••••••.••.••••• (718)328-5240
L·Mar Allsocl ..... Inc••
216 Tilden Drive.
E. Syracuse. NY 13057 .•••..•..••..•...• (315)437·7779
North Dakota ••• Lorenz Sal... Inc•• (se. Iowa)
Ohio ........... Arthur H. aaler Company.
87 AI pha DrIve.
Cleveland, OH 44143 .••.•.••.•...•.•.•.. (218)481-8181
Arthur H. aaler Company,
4040 Profit Way.
Dayton. OH 45414 .•.•....••.•••.•••.•.. (513)278-4128
Oregon •..•.•••. W..tam Technl~al Sal••• Inc••
2271 N.E. Comell Rd.,
Hillsboro. OR 97123 ..........•...•..... (503)840-4821
Pannsylvanla •.. Arthur H. aaler Company, ~. Pa., see Ohio)
Pannayl"anla •.• Thoma. AllsocI ..... Inc•• (E. Pa•• see New Jersey)
South Dakota •.• Lorenz Sal.., Inc., (see Iowa)
T............... C.T. Cerlberv Allsocl ..... (EI Paso)
Area. see New Mexico)
Jackson Amold Company.
(Austin. Houston, San Antonio
Area), PO Box 42388.
Houston. TX 77042 ...••..•.••.•......•. (713)881-1;781
Utah •.......... R2 Mallleting. 3886 West 2100 South.
Salt Lake City. UT84120 .•.•••..••.•...•• (901)872·6848
Wa.hlngton •.•. We.tem Technical Sal.., Inc••
PO Box 3923,
Bellevue, WA 98009 ...•.•...••...•.•.•.• (208)841-3800
Weat Vlrvlnla ... Arthur H. Baler Company. (see Ohio)
WI_.ln ...••. Key Ent.rprt.... 850 Elm
Grove Road, Elm Grove, WI 53122 •.•..•... (414)784-3380
Wyoming ........ Waugaman Allaoclata•• Inc., (see Colorado)

_____________________________________________________________________ 561

RCA Authorized Distributors
Talwlll .••.••••. Hwa Sheng Electronic Co., Ltd., 3th Fl.,
117, Ren ..' Rd., Sec. 2,
Taipei, R.O.C.......................... (02)3218311-5
lballllld .•..•.. Anglo·lbal Eng. Ltd., PO Box 18,
Bangkok
Turkay •.•.•.••. Taknlka TAS, PO Box KarakDy 153,
Istanbul ................................... 4381 00
Taknlm Company Ltd., Rim Seh
Pehlevl Caddeal 7, Kavaklldere,
Ankara ..................................... 275800
Uruguay .•.••..• Amerlcan Pladucla 8.A., Av. Italla 4230,
Montevideo
Venezuela •..••• Tala_a, C.A-, PO Box 3975, caracas
Yugollevla •.••. Avtotehna, PO Box 593, XI,
TIIova3&, LjublJana 81000 ..•.••..•..•..•.•••. 317044
UK •...••.•..•. Apex CompollMla Ltd., 398
Bath Road, Slough, Berka,
SL18JD ............................. Burnham 83741
Cnliion Ltd. 3801388
Bath Road, Slough, Berka,
SL1 8JE .............................. Bumham 4434
Dlstronlc Ltd., 50151
Burnt Mill, Elizabeth Way,
Hartow, Essex, CM20 2HU .......•.. Hartow (0279)38701
Electronic Sanlloa., edinburgh Way,
Harlow, Essex, CM20 2DE ••••.••.••..••. Harlow 28811
Mogul Electronlca Ltd.,
273 High Street,
epping, Essex, CM 18 4DA •..••••..•.•••. epping 77388
Semlcamp. (Northam) Ltd.
East Bowmont Street, Kelso,
Roxboroughahlre TD5 7BZ ...•.....•..•.... Kelso 2388

m

U.S.
Alllbama .•••.•• Hamllton·Awnet Electronics,
4692 Commercial Drive N.W.,
Huntsville, AL 35805 ......•...•..•...•.. (205)837-7201
Arbona •.•..•.• Hamllton·Awnet Electronics,
2815 South 21st Street,
Phoenix, AZ 85034 ...................... (802)275-7851
Klerultf electroniCS, Inc.,
4134 East Wood Street,
Phoenix, AZ85040 ..•.•........•...•..•. (802)243-4101
Artmna .•.••..• Uberty Electronlcl/Allmna,
8155 North 24th Avenue,
Phoenix, AZ 85022 ...................... (802)2....2232
Caillomia ...•.• CremeliSan Franclaco, 720
Palomer Avenue,
Sunnyvale, CA 94088 .•......•..••.••.•.. (408)739-3011
Electronic Supply Corp. 2488
Third Street, Riverside,
CA 92507 ............................. (714)883-7300
Elmer ElectroniCS, Inc., 2288
Charleaton Roed, Mt. View,
CA 84042 .•..•..•...............•..•.. (415)881-3811
Hamlllon·Awnet electronic.,
1175 Bordeaux Drive,
Sunnyvale, CA 94088 ........•..•.....•.. (415)743-3300
Hamllton·Awnet electronics,
8917 Complex Drive, Sen Diego,
CA 92123 ••.••.•..••..•.........•..... (714)279-2421
Hamilion Electro Sal.., 10912
W. Washington Blvd., Culver
City, CA 90230 ......................... (213)558-2020
Klerulff electroniCS, Inc.,
2585 Commerce Way,
Los Angelea, CA 90040 ...•.......•...•.. (213)885-5511
Klerulff electronics, Inc,
3989 E. Bayshore Road,
Palo Alto, CA 94303 •.•.•.••.••..••.•.... (415)888-8292
Klerultf electroniCS, Inc.
8797 Balboa Avenue,
San Diego, CA 92123 ..•.••..•.•.•..•..•• (714)278-2112
Uberty ElectroniCS, 124
Maryland Avenue,
EI Segundo, CA 90245 ................... (213)322·81 00
~

Calilomia ...... Liberty/Sen Diego, 9525
Chesapeake Drive, San Diego
CA 92123 ............................. (714)585-8171
G.s. Marshall Company,
9874 Telstar Avenue,
EI Monte, CA 91731 .•..•..............•• (213)888-0141
RPS ElectroniCS, Inc., 1501
South Hili Street, Los Angeles,
CA90015 ............................. (213)7....,271
Schwaber Electronlca Corp.,
17811 Gillette Ave.,
Irvine, CA 92714 ........................ (714)558-3880
Colorado ..•.... Elmar ElectronlcllDanver,
6777 East 50th Aven ue
Commerce City, CO 80022 •..•..•.•...... (303)267-11811
Hllllllton·Awnet electronics,
5921 North Broadway,
Denver, CO 80216 ..•..••..•.•.•••..•.•• (303)534-1212
Klerultf electroniCS, Inc.,
10890 East 47th Avenue,
Denver, CO 80239 ...................... (303)371-8500
Connecticut •... Arrow electroniCS, Inc.,
295 Treadwell Street,
Hamden, CT 06514 •...•................ (203)248-3801
CramarlCo_lout, 12 Beaumont Rd.,
Wallingford, CT 06492 ...••.......•..••.. (203)265-7741
Hamllton·Awnet Electronics,
643 Danbury Road,
Georgetown, CT06629 •.•••.•........... (203)762-0381
Sch_bar Electronics Corp.,
Finance Drive, Commerce Industrial Park,
Danbury, CT 06810 •.....•..•........... (203)782-3500
Flortda ..•.•...• Arrow Electronlca, Inc.,
1001 NW 62nd St., Suite 402,
Ft. Lauderdale, FL33309 ••••.•..•..••.•. (305)776-7790
Arrow electronics, Inc.,
115 Palm Bay Road, N.w., Suite 10,
Palm Bay, FL32905 •.•..••.••.••....••.. (306)725-1480
CrameliOrtando,
345 Grsham Avenue,
Orlando, FL32803 ...................... (305)885-1511
H.mIHon·Awnet electronics,
8800 N.W. 20th Avenue,
Ft. Lauderdale, FL33309 ••••.•••.•..••.. (306)871·2900
Hamllton·Awnet Electronics,
3197 Tech Drive No.,
St. Petersburg, FL 33702 ...•............. (813)576-3830
Schweber electronics Corp~
2630 North 28th Terrace,
Hollywood, FL3302O ...•................ (305)827-0511
Georgia ........ Arrow electronics, Inc., 3408 Oak Cliff
Rd., Doraville, GA 30350 ..•..•.•.....••.. (404)455-4054
CrameliManla,8458
Warren Drive,
Norcross, GA 30071 .................... (404)448-9050
Hamllton·Awnet Electronics,
8700 165 Access Road, Suite 1E
Norcross, GA 30071 ..•..•.....•..•..•.. (404)448-0800
Illinois ......... CrameIiChlc_go, 1911
South Busse Road,
_.
Mt. Prospect, IL 60056 •..••..••.•.••..•.. (312)583-8230
Hamlllon·Awnet electronics,
3901 North 25th Avenue,
Schiller Park,'L80178 ...•...•.....•..... (312)678-8310
Newark electroniCS, 500
North Pulaski Road,
Chlcago,IL80624 ....•..•..•..•.....•.. (312)638-4411
Schwebar Electronics Corp.,
1275 Brummel Ave., Elk
Grove Village, IL80007 .....•..•..•..•... (312)593-2740
Semiconductor Specialists, Inc~
195 Spangler Avenue,
Elmhurst, I L 80126 ...................... (312)279-1 000
Indiana ........ Graham Electranlca Supply, Inc.,
133 S. Pannsylvanla Street,
Indianapolis, IN 46204 ....•.....•......• (317)834-8202
Iowa ........... Desco, Inc., 2500
16th Avenue, S.W.,
Cadar Rapids, IA 52801 ..............•... (318}385-7551

___________________________________________________________________ 563

RCA Authorized Distributors
Ohio. . . . . . . . . •• eramerfCleveland,
5835 Harper Road,
Solon, OH 44139 .........•.•..•........ (218)248-8400
Hamlllon·Amet Elactronlc.,
761 Beta Drive, Suite E.
Claveland, OH 44143 .•...•.............. (218)481·1400
Ham"lon·Amet Electronics,
954 Senate Drive,
Dayton,OH 45459 ...................... (513)433-0810
Hugh_Petars, Inc.,
481 East 11th Aveneu,
Col umbu8, OH 43211 .....••.•.•.•.•.... (218)484-2970
Schweber Electronics Corp.,
23880 Commerce Park Road,
Beachwood, OH 44122 •.........•••.•.•. (218)484-2970
The SIotts BlIeclman Co.,
2600 East River Road,
Dayton, OH 45439 ....•......•..•.•..... (513)298-6555
Oklahoma ...... Radio, Inc.,
1000 S. Main Streat,
Tulsa, OK 74119 ........................ (918)587-8123
Pennsylvania ... Harbach. Radaman, Inc.,
401 East Erie Avenue,
Philadelphia, PA 19134 •.•..•..••.•..••.. (215)426-1700
Pennsylvania ... Semiconductor Specialist., Inc.,
1000 RIDC Plaza, Suite 207,
Pittsburgh, PA 15238 ............•...•..• (412)781-812O
Taxa•...•...... CramadTaxas,
13740 Midway P.oad,
Dallas, TX 75240 •..•..•......•........• (214)881-8300
Ham"ton·Amet electronics,
445 Sigma Road,
Dallas, TX 75240 ....................... (214)881·8881
Hamlllon·Amet Elactronlcs,
3939 Ann Arbor Street,
Houston, TX n063 ..................... (713)780·1n1
Sch_bar ElectroniCS, Corp.,
14177 Proton Road,
Dallas, TX 75240 .••.•.•.•....•......... (214)881·5010

Taxa•..•....... Schwebar Elactronlcl Corp.
7420 Harwln Drive,
Houston, TX 77063 ................•..•. (713)784-3800
Sterling electronic., Inc.,
2800 Longhom, Sulta 100,
Austin, TX 78758 ....................... (512)838-1341
Sterling electronic., Inc.,
4201 Southwest Freeway,
Houston, TX n027 ..•..•..•.......•.... (713)827·9800
Sterling Electronics, Inc.,
2875 Merrell Road,
Dallas, TX 75229 ....................... (214)357·9131
Trevino Elactronlcs, Inc.,
2828 Walnut Hili Lane,
Dellas, TX 75229 •.•.•.•.....•.•••...... (214)358-2418
Utah •...•.•.•.• Hamlllon·Amet Elactronlc8,
1585 West 2100 South,
Salt Lake City, UT 84119 •.•.•.•.•••••.•.• (801)972·2800
Washington ..•. Hamlllon·Amet Elactronlcs,
13407 Northrup Way,
Bellevue, WA 98005 ......•..•.•.•.•....• (208)748-8750
Uberty ElectnmlcalNorIh_st,
1750 132nd Ave. N.E.,
Bellevue, WA 98005 ..................... (208)453·8300
Robert E. Priebe Company,
2211 5th Avenue,
Seattle, WA 98121 ......•.•............. (208)882-8242
Wisconsin ...... Arrow electroniCS, Inc.,
434 West Rawson Avenue,
Oak Creek, WI 53154 •......•.•.•.•.•.•.• (414)784-8800
Hllflllllon·Amet Electronics,
2975 South Moorland Road,
New Berlin, WI 53151 ..•.•.•....•.•.•..• (414)784-4510
Taylor electric Company,
1000 W. Conges Bay Road,
Mequon, WI 53092 .....•.•...•......•... (414)24104321

________________________________________________________________

5~
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