1993_Allegro 1993 Allegro

User Manual: 1993_Allegro

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THE PACE QUICKENS
TM

I N T E G RAT E 0 -

AND

•

0 I S eRE T E

SEMICONDUCTORS
AMS-501

INTEGRATED

DISCRETE

AND

SEMICONDUCTORS
Applications for

•

EDP Peripherals

•

Automotive

•

Industrial Control

•

Consumer

• Motor & Power Drive

•

Displays

•

Office Automation

.; Power Management

•

Mass Storage

Allegro MicroSystems, Inc.
Formerly Sprague Semiconductor Group

115 Northeast Cutoff, Box 15036
Worcester, MA 01615
(508) 853-5000

Data Book AMS 501
© Copyright 1993 Allegro MicroSystems, Inc.

1. GENERAL INFORMATION & PRODUCT INDEX
Allegro MicroSystems, Inc ......................................................... 1-1
Definition of Terms .................................................................... 1-3
Allegro Package Designators ..................................................... 1-5
Allegro Part Numbering Systems ............................................... 1-6
Ordering Information ................................................................. 1-8
Technical Assistance ................................................................. 1-8
Product Index (ICs and Transistor Arrays) ................................ 1-9
See Also:
Discrete Semiconductors Index and Cross Reference ......... 7-2
Sales Offices and Representatives ...................... Back of Book

2. PRODUCT SELECTION GUIDES
Peripheral Power and Display Drivers ....................................... 2-1
High-Voltage (;:::80 V) Peripheral Power and Display Drivers .... 2-3
BiMOS Intelligent Power Interface Drivers ................................ 2-4
Motor Drivers ............................................................................. 2-5
Hall-Effect Sensors .................................................................... 2-6
Devices for Mass Storage Applications ..................................... 2-7
Devices for Printer Applications ................................................. 2-7
Automotive, Signal Processing, and Consumer ICs .................. 2-8
Integrated Circuits Cross-Reference ....................................... 2-10
Competitive Integrated Circuits Part-Numbering Systems ...... 2-16
See Also:
Quick Guide to Allegro Discrete Devices .............................. 7-1
Discrete Semiconductors Index and Cross Reference ......... 7-2
Discrete and Integrated Circuit
Semiconductor Chips ................................... Brochure CN-193

3. TECHNICAL DATA & APPLICATION NOTES
for Peripheral Power and Display Driver ICs
in Numerical Order .............................................. Beginning at 3-1
Applications Information:
Power ICs for Motor-Drive Applications ............................ 3-222
Integrated Circuits for Current-Sourcing Applications ....... 3-229
Expanding the Frontiers oflC Interface
for Electronic Displays ...................................................... 3-239
Trends in IC Interface for Electronic Displays ................... 3-245
2936 3-Phase Brushless DC Motor Controller/Driver ....... 3-251
Series 5800 SiMaS II Power Drivers ................................ 3-255
See Also:
Reliability Reports ....................................................... Section 8

4. TECHNICAL DATA & APPLICATION NOTES
for Hall-Effect Sensor ICs
in Numerical Order ............................................. Beginning at 4-1
Applications Information:
Hall Effect Applications Guide ............................................. 4-74
The Hall Effect Sensor ...................................................... 4-108

5. TECHNICAL DATA & APPLICATION NOTES
for Mass Storage Application ICs
in Numerical Order ............................................... Beginning at 5-1

6. TECHNICAL DATA & APPLICATION NOTES
for Automotive, Signal-Processing,
and Consumer ICs
in Numerical Order .............................................. Beginning at 6-1

7. TECHNICAL DATA
for Discrete Transistors, Diodes, and Arrays
Quick Guide to Discrete Devices ............................................... 7-1
Discrete Semiconductors Index and Cross Reference .............. 7-2
Discrete Devices Ratings:
NPN Bipolar Transistors ..................................................... 7-14
PNP Bipolar Transistors ...................................................... 7-18
N-Channel Junction Field-Effect Transistors ...................... 7-20
P-Channel Junction Field-Effect Transistors ....................... 7-26
General-Purpose and Schottky Diodes ............................... 7-28
Zener Diodes ...................................................................... 7-29
Transistor and Diode Arrays .................................................... 7-31
See Also:
High-Current Darlington

Tr~nsistor

Arrays ................. Section 3

Discrete and Integrated Circuit
Semiconductor Chips .................................... Brochure CN-193

8. QUALITY & RELIABILITY INFORMATION
Reliability ................................................................................... 8-1
Quality Assurance Flow Chart ................................................... 8-2
PACE Primer ............................................................................. 8-3
Reliability Reports:
Series 2000 and 2800 Darlington Drivers ............................. 8-9
Series 5800 BiMOS Drivers ................................................ 8-14
Series 6100 High-Voltage Display Drivers .......................... 8-19
SOT-23 Transistors ............................................................. 8-23

9. PACKAGE INFORMATION
Package Thermal Characteristics .............................................. 9-1
Thermal Design for Plastic Integrated Circuits ........................... 9-3
High-Performance Power Package
for Power-Integrated Circuit Devices .......................................... 9-7
Applications Information:
Electrostatic Protection for Semiconductor Products .......... 9-19
Operating and Handling Practices
for MaS Integrated Circuits ................................................ 9-21
Mounting Power Tab Devices ............................................. 9-21
Surface-Mount Integrated Circuits ...................................... 9-22
Computing IC Temperature Rise ........................................ 9-25
Thermal Resistance -

A Reliability Consideration ............ 9-30

Package Outline Drawings ...................................................... 9-39

A, B, & M Plastic DIPs ........................................................ 9-39
EA, EB, & EP Square Plastic Leaded Chip Carriers ........... 9-45
EQ Rectangular Plastic Leaded Chip Carrier ..................... 9-47
JT Thin Quad Flatpack ........................................................ 9-49
K Plastic SIP ....................................................................... 9-51
KA Plastic SIP ..................................................................... 9-52
L Plastic SOICs ................................................................... 9-53
LB & LW Wide-Body Plastic SOICs .................................... 9-55
LL Long-Leaded Plastic SOT .............................................. 9-57
LR Plastic Small-Outline Transistor .................................... 9-68
LT Plastic SOT .................................................................... 9-58
U Plastic SIP ....................................................................... 9-59
UA Plastic SIP ..................................................................... 9-60
W Plastic Power-Tab SIP .................................................... 9-61
WH Plastic PowE!r-Tab SIP for Horizontal Mounting ........... 9-62
WV Plastic Power-Tab SIP for Vertical Mounting ............... 9-62
Z Plastic Power-Tab SIP ..................................................... 9-66
Plastic Transistor ................................................................ 9-67
Plastic Small-Outline Transistor .......................................... 9-68
Tape and Reel Information for Discrete Devices ..................... 9-69

SALES OFFICES & REPRESENTATIVES
World-Wide .............................................................. Back of Book

GENERAL INFORMATION & PRODUCT INDEX

SECTION 1. GENERAL INFORMATION & PRODUCT INDEX

Allegro MicroSystems, Inc . .......................................................................................... 1-1
Definition of Terms ....................................................................................................... 1-3
Allegro Package Designators ........................................................................................ 1-5
Allegro Part Numbering Systems .................................................................................. 1-6
Ordering Information ..................................................................................................... 1-8
Technical Assistance ................................................................................................... 1-8
Product Index (ICs and Transistor Arrays) ................................................................... 1-9
See Also:
Discrete Semiconductors Index and Cross Reference ..................................... 7-2
Sales Offices and Representatives ................................................... Back of Book

GENERAL
INFORMATION
ALLEGRO MICROSYSTEMS, INC.
Allegro MicroSystems, Inc. specializes in the design, manufacture,
and marketing of advanced mixed-signal (analog + digital) integrated
circuits as well as a line of discrete transistors and diodes. Allegro,
formerly the Sprague Semiconductor Group, combines over 25 years
of semiconductor experience, over a decade of extensive mergedtechnologies experience, and worldwide resources in design and
applications engineering, process technology, packaging, quality
control, manufacturing, and testing.
Allegro is a leading supplier of mixed-signal solutions and
emphasizes system-level ICs for original equipment manufacturers
that primarily serve the computer peripherals, automotive, consumer,
and industrial markets. Allegro's strengths center on an excellent track
record in product quality and innovation, and a diversified base of major
OEM customers. The company's reputation for quality spans both
product design and manufacturing. This reputation is evident in
preferred vendor/ship-to-stock programs. Allegro has received quality
awards from leading manufacturers worldwide, and is the only US IC
manufacturer to have received IECO manufacturer's approval.
Headquartered in Worcester, Massachusetts, Allegro currently
operates two wafer-fabrication plants in Worcester and Willow Grove,
Pennsylvania, as well as assembly/test operations in the Philippines.
Allegro's product expertise in power ICs, signal processing ICs,
and sensor ICs-believed to be unique in the industry-is supported
by strong capabilities in bipolar, CMOS, and DMOS process technologies. Allegro can and does combine any two or all three of its product
disciplines (and/or process technologies) in a single monolithic chip
to deliver powerful system-level solutions.

1-1

Within the worldwide semiconductor market, Allegro has strategically positioned itself in the analog segment. Allegro primarily serves
the analog IC industry through the development, manufacture, and
marketing of a wide variety of complex products. The company emphasizes application-specific, market-driven products with high technology
content. These include bipolar, CMOS, and DMOS technologies, as
well as merged technologies such as SiCMOS (bipolar + CMOS), SCD
(bipolar + CMOS + DMOS), and DASIC (digital + analog + SiCMOS).
Analog ICs can generally be separated into three classifications:
sensor, Signal processing, and power ICs. Sensors are analog ICs
which respond to physical phenomena and provide inputs to an
electronic system. Signal processing ICs represent a broad category
of analog ICs which accept, generate, or process an analog signal.
Power ICs are those products which act as the interface from an
electronic system back to the physical world. These products typically
operate at voltages and currents well in excess of those applied to
other parts of the electronic system due to their requirement to drive
motors, displays, solenoids, relays, lamps, and other devices.
At Allegro, original designs are emphasized, rather than second
source products, in order to command a higher value in the marketplace. Many of these original designs have ultimately become industry
standard products, such as the company's popular Hall-effect switches
and power drivers.
Customers expect suppliers to add tangible value at a system level
because they need to maximize performance and speed time to market.
Applications, design, and technology consultation provided by IC
suppliers, therefore, become crucial, as does the working synergy
between the two design partners. Customers also need to feel confident
in their IC supplier's ability to control the manufacturing and testing
processes, thereby ensuring quality, reliability, and consistent delivery.
Allegro is exceptionally positioned to serve each customer's system
requirements with either application-specific custom products or a
broad spectrum of standard products. The measure of our success is
your total satisfaction.

1-2

GENERAL
INFORMATION
DEFINITION OF TERMS
ABSOLUTE MAXIMUM RATINGS are limiting values of operation and
should not be exceeded under the worst conditions. These values are
chosen to provide acceptable serviceability of the device. The equipment manufacturer should design so that initially, and throughout life,
no absolute maximum value is exceeded. If exceeded, even if the
device continues to operate, its life may be considerably shortened.
The absolute maximum output current ratings are the maximum
allowable under any condition. In application, output current will be
limited by number of outputs conducting, duty cycle and timing,
ambient temperature, heat sinking and/or forced cooling, and other heat
sources.
Under any set of conditions, the specified maximum junction
temperature (usually +150°C) should not be exceeded. In those
devices which include an internal thermal shutdown, fault conditions
which produce excessive junction temperature will activate device
thermal shutdown circuitry. These conditions can be tolerated, but
should be avoided.
TYPICAL CHARACTERISTICS are given for circuit design information
only and, unless otherwise stated, are usually given at the nominal
operating voltage and an ambient temperature of +25°C. Although
these values are indicative of the peak distribution for a large number
of production lots, these values should hot be construed as guaranteed
for any particular device or production lot.
CHARACTERISTICS LIMITS are those values that are guaranteed
under the test conditions shown.
The absolute magnitude convention is used for Electrical
Characteristics Limits where the limits are defined as:
maximum [minimum] limit: the greater [smaller] magnitude limit of
a range of like-signed values; if the range includes both positive
and negative values, both limiting values are maximums [the
minimum is implicitly zero].
The algebraic convention is used for Magnetic Characteristics
Limits where negative flux densities are defined as less than zero.
The minimum value is therefore the most negative value, the maximum
value is the most positive value, and zero has no special significance.
RECOMMENDED OPERATING CONDITIONS are given for optimum
device performance. Operation outside these conditions is permitted
(within the Absolute Maximum Ratings) without any implied guarantee
of level of performance.
It is recommended that equipment manufacturers consult their local
sales office whenever device applications involve unusual electrical,
mechanical, or environmental operating conditions.

1-3

SPECIAL SYMBOLS are sometimes used to simplify circuit drawings.

CurrentSourcing
Amplifier

CurrentSinking
Amplifier

HalfBridge
Amplifier

TriState
Amplifier

Darlington
Transistor
Dwg. No. OA-001

ADVANCE INFORMATION is used to advise customers of proposed
additions to the product line. The specifications given are target or
goal specifications and may, therefore, change without notice. Allegro
MicroSystems, Inc. reserves the right to not manufacture these proposed devices which have been announced as "advance information".
Contact your local sales office for details of current status and latest
specifications.
PRELIMINARY INFORMATION is issued to advise customers of
additions to the product line which, nevertheless, still have "pre-production" status. Details may, therefore, change without notice although it is
expected that the performance data is representative of "full production"
status. Contact your local sales office for details of current status and
latest specifications.

IMPORTANT NOTICE
Allegro MicroSystems, Inc., reserves the right to make, from
time to time, such departures from the detail specifications as may
be required to permit improvements in the performance, reliability, or
manufacturability of its products. Changes and improvements made
after the publication of this catalog will be reflected in updated data
sheets or other literature as soon as possible. Components made under
military approvals will be in accordance with the approval requirements.
The information included herein is believed to be accurate and
reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third
parties which may result from its use.
Allegro MicroSystems, Inc. reserves the right to discontinue any
device without notice.
Before placing an order, Allegro advises its customers to obtain the
latest version of the relevant information to verify that the information
being relied upon is current.
Allegro products are not intended for use in life support appliances,
devices, or systems. Use of an Allegro product in such applications
without the written consent of Allegro MicroSystems, Inc. is prohibited.

1-4

PACKAGE
DESIGNATORS
D (Semi-Tab DIP)
8 to 24 pins

A (DIP)
14 to 40 pins

Dwg.OA-OD4-18

K (SIP) 4 pins
KA (SIP) Spins

JT (Thin Quad Flatpaek)
64 leads

UA

Dwg. OA-008-3

LD (Semi-Tab SOIC) 20 or 24 leads
LW (Wide-Body SOIC) 16 to 28 leads

Dwg. OA-005-21

Dwg.OA-005-14

Dwg.OA-015-3

LL, LR, or L1l' (SOT)

Dwg.OA-014-64

L(SOIC)
8,14, or 16 leads

W

Dwg.OA-007-44

Dwg.OA-004-17

Dwg.OA-013-4

U

EA (One-Semi-Tab PLCC) 28 leads
ED (Semi-Tab PLCC) 28 or 44 leads
EP (Sq. PLCC) 20, 28, or 44 leads
EQ (Reel. PLCC) 32 (7 x 9) leads

Dwg.OA-005-17

W (Power-Tab SIP) 12 leads

M (DIP) 8 pins

Dwg.OA-004-8

Z (Power-Tab SIP) Sleads

~
Owg. OA-01S-4

Dwg.OA-006-12

Owg. OA-006-5

1-5

DEVICE
PART-NUMBERING
ALLEGRO MICRO SYSTEMS NEW PART NUMBERS
A

8958

5

EA

F-1
LlnstrUCtions (optional; in the order listed).
A = Revision, see detail specification
F = Active pull-down device (BiMOS only)
-1 = (Any number except 883) Selected version, see detail specification
BU = Burned-In device'
BS = Compliant, with screening to BS9493'
TR = Tape and reel (surface-mount devices only)

Package Designation.
A = Plastic, dual in-line
B = Plastic, dual in-line semi-tab
C = Unpackaged chip t
EA = Plastic, leaded chip carrier, one semi-tab
EB = Plastic, leaded chip carrier, two semi-tabs
EP = Plastic, leaded chip carrier, square
EQ = Plastic, leaded chip carrier, rectangular
JT = Plastic, thin quad flatpack, 64 leads
K = Plastic, 4-lead mini-SIP
KA = Plastic, 5-lead mini-SIP
L = Plastic, SOIC
LB = Plastic, wide-body SOIC power tab
LL = Plastic, SOT-89, long-lead version
LR = Plastic, SOT-23rrO-236AB
LT = Plastic SOT-89rrO-243AA .
LW = Plastic, wide-body SOIC
M = Plastic, 8-pin mini-DIP
T = Plastic, 3-lead mini-SIP
U = Plastic, 3-lead thin mini-SIP
UA = Plastic, short 3-lead thin mini-SIP
W = Plastic, 12-lead single in-line power tab
WH = W Package with 18 formed leads, horizontal mount
WV = W Package with 18 formed leads, vertical mount
X = Special
Z = Plastic, 5-lead single in-line power tab (TO-220)

Operating Temperature Range.
C = Commercial (O°C to +70°C)
S = Standard (-20°C to +85°C)
E = Extended automotive/industrial (-40°C to +85°C)
K = Industrial/military (-40°C to +125°C)
L = Automotive/military (-40°C to + 150°C)
M = Military (-55°C to +125°C)
X = Special (i.e., wafer probe at +25°C only)

Device Type (four digits).
Allegro MicroSystems Identifier.
• Instruction suffix 'BU' available only with temperature codes'S', 'E', 'K, or'L';
suffix 'BS' available only through European sales office.

t

Discrete and integrated circuit chips are described in Brochure CN-193.

All possible combinations of device type, operating temperature range, and package style are not
necessarilyavailabie. Consult individual device specifications or sales office for complete information.
1-6

ORIGINAL SPRAGUE SEMICONDUCTOR GROUP PART NUMBERS
UC

N

11
5810

A

F-1

L

Instructions
Same as Allegro New Part Number System'

Package Designation.
Same as Allegro New Part Number System'

Device Type (four digits).
Operating Temperature Range.
K;
N;
Q;
S;

Extended automotive/industrial
Commercial/industrial
Automotive/industrial
Military

Family (UC, UD, UG, UL, or UM).
Instruction suffix 'BU' available only with temperature codes 'N' or '0';
suffix 'BS' available only through European sales office.
t Discrete and integrated circuit chips are described in Brochure CN·193.

ORIGINAL SPRAGUE SEMICONDUCTOR GROUP PART NUMBERS

l

TIC 6118

-2

FM

L

Shipping style (TIC prefix only).
FM ; Wafer sawn on frame
TS ; Tray pack
WA ; Whole wafer

Instructions (optional).
Device Type (three or four digits).
Family.
BA- ; Pro-Electron registered diode
BC- ; Pro-Electron registered diode
BZ- ; Pro-Electron registered Zener diode
TH-' ; Unpackaged discrete device chip t
TIC; Integrated circuit chip or probed wafer t
TMP-' ; SOT-23fTO-236AB packaged discrete device
TND ; Diode array
TP ; Bipolar transistor in TO-92fTO-226AA
TPP ; Darlington array
TPQ ; Quad transistor array
2N ; JEDEC registered transistor
•D

F

= diode
= JFET

T
Z

= transistor
= Zener

tDiscrete and integrated circuit chips are described in Brochure CN-193.

All possible combinations of device type, operating temperature range, and package style are not
necessarily available. Consult individual device specifications or sales office for complete information.

1-7

GENERAL
INFORMATION
ORDERINGINFOBMATION
To place an order, obtain price and delivery information, or to
request technical literature, contact your local Allegro sales office or
sales representative. See back of book, or:
From United States
and Canada

Allegro MicroSystems, Inc.
115 Northeast Cutoff
Box 15036
Worcester, MA 01615
Tel: (508) 853-5000
Fax: (508) 853-5049

From Europe
and Mideast

Allegro MicroSystems Europe Ltd.
Balfour House, Churchfield Road
Walton-on-Thames, Surrey KT12 2TD
UNITED KINGDOM
Tel: (44-932) 253-355
Fax: (44-932) 246-622

From Asia

Allegro MicroSystems, Inc.
115 Northeast Cutoff
Box 15036
Worcester, MA 01615
Tel: (508) 853-5000
Fax: (508) 853-5049

TECHNICAL ASSISTANCE
Requests for additional technical information or applications
assistance should be referred to your local Allegro sales office or sales
representative. See back of book, or:
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Box 15036
Worcester, MA 01615
Tel: (508) 853-5000
Fax: (508) 853-5049

1-8

INTEGRATED CIRCUITS
AND TRANSISTOR ARRAYS
PRODUCT INDEX
TN NUMERICAL ORDER*
See Section 7 for Index to Discrete Devices

IPart Number'
06 thru 56
903 thru 942
2001 thru 2024
2061 thru
2222
2429
2436
2454 and
2460
2540
2543
2544
2547
2549
2580
2585
2588
2595
2596 and
2801 thru

2069

2455

2597
2823

2878 and 2879
2907
2916
2917
2918
2936
2943
2944
2953 and 2954
2961
2962
2981 thru 2984
2985

Description

Page

Quad Transistor Arrays .................................................................................................. 7-35
Multiple Diode Arrays ..................................................................................................... 7-31
7-Channel, High-Current Darlington Arrays ..................................................................... 3-1
Reliability Report .............................................................................................................. 8-9
1.5 A Darlington Switches ................................................................................................ 3-9
Quad NPN Transistor Array ........................................................................................... 7-34
Fluid Detector .................................................................................................................... 6-1
Dual-Mode (10 min/5 min) Countdown Timer .................................................................. 6-4
Automotive Lamp Monitors/Comparators ......................................................................... 6-7
Electronic Spark Timing ................................................................................................. 6-11
Quad 1.8 A Darlington Power Driver .............................................................................. 3-18
Quad Protected Darlington Power Driver ....................................................................... 3-21
Quad 1 .8 A Darlington Power Driver .............................................................................. 3-25
Quad Protected Darlington Power Driver ....................................................................... 3-28
Quad Protected Darlington Power Driver ....................................................................... 3-32
8-Channel, High-Current Source Driver ......................................................................... 3-36
8-Channel, Saturated Source Driver .............................................................................. 3-36
8-Channel, High-Current Source Driver ......................................................................... 3-36
8-Channel, Saturated Sink Driver .................................................................................. 3-44
8-Channel, Saturated Sink Drivers ................................................................................. 3-46
8-Channel, High-Current Darlington Arrays ................................................................... 3-48
Reliability Report ..................................................................... ,........................................ 8-9
Quad 4 A Darlington Switches ....................................................................................... 3-56
Quad PNP Transistor Array ........................................................................................... 7-34
Dual Full-Bridge PWM Motor Driver ............................................................................... 3-61
Dual Full-Bridge PWM Motor Driver ............................................................................... 3-66
Dual Full-Bridge PWM Motor Driver ............................................................................... 3-71
3-Phase ±2 A Brushless DC Motor Drivers .................................................................... 3-76
Description and Application .......................................................................................... 3-249
High-Current Half-Bridge Motor Driver ........................................................................... 3-84
Quad 4 A High-Voltage Source Driver ........................................................................... 3-88
2 A Full-Bridge PWM Motor Drivers ............................................................................... 3-91
3.4 A PWM Printhead/Motor Driver ................................................................................ 3-96
Dual 3 A PWM Solenoid/Motor Driver .......................................................................... 3-101
8-Channel, Source Drivers ........................................................................................... 3-106
8-Channel, Saturated Source Driver ............................................................................ 3-111

• Complete part number includes additional characters to indicate operating temperature range and package style.
See detailed specification.

1-9

I Part Number'
2987
2993
2998
3046
3055
3056 and 3058
3059
3113
3119
3120
3121,3122, & 3123
3130
3132 and 3133
3140
3141,3142,&3143
3175 and 3177
3185 thru 3189
3235
3275
3501
3503
3506 and 3507
3625 and 3526
3718
3751
3827
3828
3841
3844
3845 and 3846
3847
3848
3859
3883
3904 and 3906
4000
5140
5275
5348
5401
5616

Description

8-Channel, Short-Circuit Protected Source Driver ....................................................... 3-113
Dual Full-Bridge Motor Driver ....................................................................................... 3-117
Dual 2 A Full-Bridge Motor Driver ................................................................................ 3-121
Zero-Speed Hall-Effect Gear-Tooth Sensors ................................................................... 4-1
Multiplexed Two-Wire Hall-Effect Sensor IC .................................................................... 4-8
Zero-Speed Hall-Effect Gear-Tooth Sensors ................................................................... 4-1
AC Coupled Hall-Effect Gear-Tooth Sensor .................................................................. 4-16
Hall-Effect Switch .. ......................................................................................................... 4-20
Hall-Effect Switch ................................................................................................... See 3121
Hall-Effect Switch .. ......................................................................................................... 4-20
Hall-Effect Switches for High-Temperature Operation ................................................... 4-24
Hall-Effect Switch ........................................................................................................... 4-20
Ultra-Sensitive Bipolar Hall-Effect Switches ................................................................... 4-29
Hall-Effect Switch ........................................................................................................... 4-20
Sensitive Hall-Effect Switches for High-Temperature Operation ................................... 4-34
Hall-Effect Digital Latches .............................................................................................. 4-35
Hall-Effect Latches for High-Temperature Operation ..................................................... 4-38
Dual Output Hall-Effect Digital Switch ............................................................................ 4-42
Complementary Output Hall-Effect Latch ....................................................................... 4-46
Linear Output Hall-Effect Sensor ................................................................................... 4-48
Ratiometric, Linear Hall-Effect Sensor ........................................................................... 4-52
Ratiometric, Linear Hall-Effect Sensors for High-Temperature Operation ..................... 4-56
Power Hall Sensor/Drivers for Brushless DC Motors ..................................................... 4-57
Low-Voltage Audio Power Amplifier ............................................................................... 6-16
Power Operational Amplifier ........................................................................................ 3-125
FM Stereo Decoder with Noise-Actuated Blend .................................................... See 3828
FM Stereo Decoder with Noise-Actuated Blend ............................................................. 6-20
AM Signal Processor ...................................................................................................... 6-25
Dual-Conversion AM Receiver .. ..................................................................................... 6-32
AM Noise Blankers .. ....................................................................................................... 6-34
Dual-Conversion AM Receiver ............................................................................... See 3844
Dual-Conversion AM Receiver ....................................................................................... 6-41
FM Communications IF System ..................................................................................... 6-43
FM Communications IF and Audio System .................................................................... 6-45
Quad Transistor Arrays .................................................................................................. 7-34
Medium-Power Quad Darlington Array .......................................................................... 7-32
Protected PowerHall Sensor Lamp/Solenoid Driver ...................................................... 4-63
Complementary Output Hall-Effect Latched Driver ........................................................ 4-70
Smoke Detector with Interconnect and Timer ................................................................ 6-48
Quad PNP Transistor Array ........................................................................................... 7-34
Liquid Crystal Display Automotive Clock ........................................................................ 6-55

• Complete part number includes additional characters to indicate operating temperature range and package style.
See detailed specification.

1-10

Page

I

I Part Number·
5703 and 5706
5713
5800 and 5801
5804
5810
5810-F
5811
5812-F
5815
5816
5817
5818-F
5821 thru 5823
5829
5832
5833
5841 thru 5843
5881
5890 and 5891
5895
6002
6116 and 6118
6427
6502 and 6700
7003
8131
8181
8901
8902
8920
8925
8932
8932-A
8936
8951
8952
8958
8980

Description

Page

I

Quad Peripheral and Power Drivers ............................................................................ 3-129
Dual OR Peripheral and Power Driver ......................................................................... 3-133
High-Speed BiMOS Latched Drivers ............................................................................ 3-136
Reliability Report ............................................................................................................ 8-14
1.25 A, Unipolar Stepper-Motor Translator/Driver ........................................................ 3-141
1O-Bit High-Speed Serial-In, Latched Source Driver .......................................... See 581 O-F
1O-Bit Serial-In, Latched Source Drivers with Active Pulldowns .................................. 3-146
12-Bit High-Speed Serial-In, Latched Driver ................................................................ 3-150
12-Bit Serial-In, Latched Source Drivers with Active Pulldowns .................................. 3-154
8-Bit High-Speed Latched Source Driver ..................................................................... 3-158
Addressable, Latched 16-Channel Driver .................................................................... 3-161
Addressable, 28-Line Decoder/Driver .......................................................................... 3-165
32-Bit Serial-In, Latched Source Drivers with Active Pulldowns .................................. 3-170
8-Bit High-Speed Serial-In, Latched High-Voltage Drivers .......................................... 3-174
9-Bit Serial-In, Latched 1.6 A Driver ............................................................................. 3-178
32-Bit Serial-In, Latched Sink Driver ............................................................................ 3-187
32-Bit Serial-In, Latched Darlington Driver ................................................................... 3-191
8-Bit Serial-In, Latched High-Voltage Drivers .............................................................. 3-195
Dual 8-Bit Latched Driver with Read Back ................................................................... 3-200
8-Bit Serial-In, Latched Source Drivers ........................................................................ 3-203
8-Bit Serial-In, Latched Source Driver .......................................................................... 3-208
Dual Complementary-Pair Transistor Array ................................................................... 7-34
Vacuum Fluorescent Display Drivers ........................................................................... 3-213
Reliability Report ............................................................................................................ 8-19
Quad NPN Transistor Array ........................................................................................... 7-34
Dual Complementary-Pair Transistor Arrays ................................................................. 7-34
7-Channel, 150 V Darlington Array .............................................................................. 3-218
Precision Supervisory Systems Monitor ......................................................................... 6-61
Low-Dropout, 5 V Regulator ............................................................................................ 6-66
3-Phase Brushless DC Motor Back-EMF Controller/Driver .............................................. 5-1
3-Phase Brushless DC Motor Back-EMF Controller/Drivers .......................................... 5-11
Dual Schottky Diode ....................................................................................................... 5-21
3-Phase ±4 A Brushless DC Motor Controller/DMOS Driver ......................................... 5-23
5 V MOS Voice Coil Motor Driver ....................................................................... See 8932-A
5 V MOS Voice Coil Motor Driver ................................................................................... 5-28
5 V MOS Voice Coil Motor Driver ................................................................................... 5-35
Servo Controller System ................................................................................................ 5-42
Servo Loop Compensator .............................................................................................. 5-47
12 V Voice-Coil Motor Driver .......................................................................................... 5-52
SuperServo Spindle & Voice-Coil Actuation Manager/Driver ......................................... 5-58

• Complete part number includes additional characters to indicate operating temperature range and package style.
See detailed specification.

1-11

PRODUCT SELECTION GUIDES

SECTION 2. PRODUCT SELECTION GUIDES
Peripheral Power and Display Drivers .......................................................................... 2-1
High-Voltage

(~80

V) Peripheral Power and Display Drivers ....................................... 2-3

BiMOS Intelligent Power Interface Drivers ................................................................... 2-4
Motor Drivers ............................................................................................................... 2-5
Hall-Effect Sensors ...................................................................................................... 2-6
Devices for Mass Storage Applications ....................................................................... 2-7
Devices for Printer Applications .................................................................................... 2-7
Automotive, Signal Processing, and Consumer ICs .................................................... 2-8
Integrated Circuits Cross-Reference ................................................................... '" .... 2-10
Competitive Integrated Circuits Part-Numbering Systems ......................................... 2-16
See Also:
Quick Guide to Allegro Discrete Devices .......................................................... 7-1
Discrete Semiconductors Index and Cross Reference ..................................... 7-2
Discrete and Integrated Circuit Semiconductor Chips ................ Brochure CN-193

PERIPHERAL POWER AND DISPLAY DRIVERS
Section 3, unless otherwise indicated

IN ORDER OF 1) OUTPUT CURRENT, 2) OUTPUT VOLTAGE, 3) NUMBER OF DRIVERS
Output Ratings·

rnA

Features
Serial
Input

Latched
Drivers

Diode
Clamp

Saturated
Outputs

Internal
Protection

X

2595
5833
5832

Part Number t

V

#

20
30
40

8
32
32

-

-

X

-

-

X

X
X

X

-

150

7

-

-

X

-

-

7003

60
45
50
80
80

2
1
8
2
4

Hall Sensor/Driver

-

X

-

Hall Sensor/Driver
-

X
X
X

-

X

X
X

-

X

X

50
50
50
50
50
50
60
80
80
95
95
100
100

4
7
8
8
8
8
16
8
8

X
X
X
X

-

-

5275 +
5140 +
2596
5713
5703 and 5706

450

30

28

Dual 4 to 14-Line Decoder/Driver

500

50

7

600

60
60

4
4

-

SINK DRIVERS
100

250
300

350

8
8
8

X
X

-

X

X
X
X

X

4 to 16-Line Latched Decoder/Driver

-

X
X

X
X

-

-

X
X
X

X

X

-

X

X

X

-

-

700

60

4

-

750

50

8

-

900

14
26

2
2

Hall Sensor/Driver
Hall SensorlDriver

1250

50
50
50

4
2
4

80
80

2
4

1600

50

9

1800

50
50

4
4

4000

50
80

4
4

1500

t
t

7-

-

X

-

-

-

-

X

X
X

X
X
X
X

-

-

X

5800
2001, 2003, and 2004
2801, 2803, and 2804
5801
5821
5841
5816
5822
5842
2023 and 2024
2823
5823
5843
5817
2013

X

2547
2549

X

X

2543

X

-

2597

X
X

X
X

3625+
3626+

X

5804
2061
2064 and 2068

-

X
X

-

X
X

-

X

X

-

-

X

5829

-

-

X
X

-

2544
2540

X
X

-

-

Stepper Motor Translator/Driver

-

-

-

-

Current is maximum specified test condition, voltage is maximum rating.
See specification for sustaining voltage limits or over-current protection voltage limits.
Complete part number includes additional characters to indicate operating temperature range and package style.
Hail-Effect sensor. See Section 4.

2062
2065 and 2069

2878
2879
Continued next page ...

2-1

Output Ratings'
mA

V

Features

#

Serial
Input

Latched
Drivers

Diode
Clamp

-

X
X
X
X
X

-

Saturated
Internal
Outputs Protection

Part Number t

SOURCE DRIVERS
-25

-120

-350

-4000

60
60
60
60
60
65
80
80
80
80
85
85
115

8
10
12
20
32
8
8
10
20
32
6
8
8

-25
30
50

8
8
8

35
50
50
-50
-80
80
80

8
8
8
8
8
8
8

60

4

X
X
X
X

-

Active Pull-Down

Active Pull-Down
Active Pull-Down

-

-

X
X
X
X

Active Pull-Down
Active Pull-Down
Active Pull-Down

-

-

-

-

X

X

X
X
X

-

-

X
X
X

-

X

X

-

-

X

X

X
X
X
X
X
X
X

-

-

X

-

-

-

-

-

-

X
X
X

-

-

-

-

-

-

-

-

-

X

-

-

5815
5810-F
5811
5812-F
5818-F
6118-2
5815-1
5810-F-1
5812-F-1
5818-F-1
6116
6118
6118-1
2585
2985
5895
2987
2981 and 2982
5891
2580 and 2588
2588-1
2983 and 2984
5890
2944

SOURCE I SINK DRIVERS

•

±350

7.0

2

Voice-Coil Motor Driver

NMOS

X

8980 §

±500

6.0
6.0
40

2
2
4

Voice-Coil Motor Driver
Voice-Coil Motor Driver
Dual Full Bridge

CMOS
CMOS

X
X

X

-

-

8932-A §
8936 §
2993

±750

45

4

Dual PWM Bridge

X

X

X

2916

±800

16

2

Voice-Coil Motor Driver

-

X

8958 §

±900

7.0
14

3
3

3-0 Back-EMF Controller/Driver
3-0 Back-EMF Controller/Driver

DMOS
DMOS

X
X

8901 §
8902 §

±1000

7.0
28

3
1

3-0 Back-EMF Controller/Driver
Power Op Amp
X

NMOS

X

-

-

8980 §
3751

±1500

45
45

4
4

Dual PWM Full Bridge
Dual PWM Full Bridge

X
X

2917
2918

±2000

45
50
50

3
2
4

3-0 Brushless Controller/Driver
PWM Full Bridge
X
Dual Full Bridge
X

X
X
X

2936 and 2936-120
2953 and 2954
2998

±3000

45

2

PWM Control

X

-

-

2962

±3400

45

1

PWM Control

X

-

X

2961

±4000

14

3

3-0 Brushless Controller/Driver

DMOS

X

8925 §

X
X

Current is maximum specified test condition, voltage is maximum rating.
See specification for sustaining voltage limits or over-current protection voltage limits.

t

Complete part number includes additional characters to indicate operating temperature range and package style.
See Section 4.
§ Mass Storage device. See Section 5.

+ Hall-Effect sensor.
2-2

HIGH-VOLTAGE PERIPHERAL POWER
AND DISPLAY DRIVERS
Section 3

IN ORDER OF 1) OUTPUT VOLTAGE, 1) OUTPUT CURRENT, 3) NUMBER OF DRIVERS
Features

Output Ratings'

V

Serial
Input

Latched
Drivers

Diode
Clamp

-

-

X
X
X

X
X
X
X

-

-

rnA

#

-25
-25
-25
-25
300
300
-350
350
350
-350
1500
1500
4000

8
10
20
32
2
4
8
8
8
8
2
4
4-

-80

-350

8

85

-25
-25

6
8

95

350
350

7
8

-

100

350
350

8
8

80

115

-25

8

150

250

7

Saturated
Internal
Outputs Protection

-

-

X
X

X
X

X
X

-

X
X

-

-

-

-

X
X

-

-

-

X
X

X
X

X
X

-

-

-

-

-

-

X

-

X
X

X

X

Active Pull-Down
Active Pull-Down
Active Pull-Down

-

X
X

X

-

X

Part Number t

-

5815-1
5810-F-1
5812-F-1
5818-F-1
5713
5703 and 5706
2983 and 2984
5822
5842
5890
2062
2065 and 2069
2879

-

6116
6118

-

2023 and 2024
2823

-

5823
5843

-

7003

-

-

-

2588-1

6118-1

Current is maximum test condition; voltage is absolute maximum allowable.
Negative current is defined as coming out of (sourcing) the output.

t

Complete part number includes additional characters to indicate operating temperature range and package style.

2-3

BiMOS SMART POWER
INTERFACE DRIVERS
Section 3
Output Ratings *

Part Number t

SERIAL·INPUT LATCHED DRIVERS
8-Bit (saturated drivers)
8-Bit
8-Bit
8-Bit
8-Bit
8-Bit
8-Bit
8-Bit
8-Bit

-120
350
350
-350
350
350
-350
350
350

9-Bit

mA
rnA
rnA
rnA
rnA
rnA
rnA
rnA
rnA

50V:j:
50V
50V:j:
50V:j:
80V
80V:j:
80V:j:
100 V
100 V:j:

5895
5821
5841
5891
5822
5842
5890
5823
5843

1.6 A

50V

5829

1O-Bit (active pull-downs)
10-Bit (active pull-downs)

-25 rnA
-25 rnA

60V
80V

5810-F
5810-F-l

12-Bit

-25 rnA

60V

5811

20-Bit (active pull-downs)
20-Bit (active pull-downs)

-25 rnA
-25 rnA

60V
80V

5812-F
5812-F-l

32-Bit (active pull-downs)
32-Bit (active pull-downs)
32-Bit
32-Bit

-25 rnA
-25 rnA
100 rnA
100 rnA

60V
80V
30 V
40V

5818-F
5818-F-l
5833
5832

4-Bit

350 rnA

50 V:j:

5800

8-Bit
8-Bit
8-Bit

-25 rnA
-25 rnA
350 rnA

60V
80V
50 V:j:

5815
5815-1
5801

25 rnA

20V:j:

5881

1.25 A
350 rnA
450 rnA

50V:j:
60V:j:
30V

5804
5816
5817

PARALLEL·INPUT LATCHED DRIVERS

Dual 8-Bit With Read Back
SPECIAL·PURPOSE FUNCTIONS
Unipolar Stepper Motor Translator/Driver
Addressable 16-Line Latched Decoder/Driver
Addressable 28-Line Decoder/Driver

Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining voltage limits.
Negative current is defined as coming out of (sourcing) the output.

t

Complete part number includes additional characters to indicate operating temperature range and package style.

:j: Internal transient-suppression diodes included for inductive-load protection.

2-4

MOTOR DRIVERS
Sections 3, 4, and 5

Output Ratings *

Function

P,art Number t

Detailed Info
Section

INTEGRATED CIRCUITS FOR BRUSHLESS DC MOTORS

3-Phase Controller/Drivers
2-Phase Hall-Effect Sensor/Controller
Hall-Effect Latched Sensors
Hall-Effect Complementary Output Sensor
2-Phase Hall-Effect Sensor/Driver
2-Phase Hall-Effect Sensor/Driver
Hall-Effect Compo Output Sensor/Driver
3-Phase Back-EMF Controller/Driver
3-Phase Back-EMF Controller/Driver
3-Phase Controller/DMOS Driver
3-Phase Back-EMF Controller/Driver

±2.OA
20 rnA
lOrnA
20 mA
900 mA
900mA
300mA
±900mA
±900 mA
±4.0A
±1.0A

45 V
25 V
24V
25V
14V
26V
60V
7V
14V
14V
7V

2936 and 2936-120
3235
3175 and 3177
3275
3625
3626
5275
8901
8902
8925
,8980

3
4
4
4
4
4
4
5
5
5
5

FULL-BRIDGE DRIVERS FOR DC AND BIPOLAR STEPPER MOTORS

Dual Full Bridge
Dual Full Bridge
Dual Full Bridge
Full Bridges

±750 mA
±1.5A
±1.5A
±2.OA
±500mA
±2.OA

45V
45V
45V
50V
40V
50V

2916
2917
2918
2953 and 2954
2993
2998

3
3
3
3
3
3

Unipolar Stepper Motor Driver
Linear Servo Motor Driver
Unipolar Stepper-Motor Translator/Driver
Voice-Coil Motor Driver
Voice-Coil Motor Driver
Servo Controller System
Servo Loop Compensator
Voice-Coil Motor Driver
Voice-Coil Motor Driver

1.8A
±1.0A
1.25A
±500mA
±500mA

50V
28V
50V
6V
6V

2544
3751
5804
8932-A
8936
8951
8952
8958
8980

3
3
3
5
5
5
5
5
5

PWM Current Controlled
PWM Current Controlled
PWM Current Controlled
PWM Current Controlled
Dual Full Bridge
Dual Full Bridge
OTHER MOTOR DRIVERS

-

-

-

±800 mA
±350 mA

16V
7V

•

Current is maximum specified test condition, voltage is maximum rating.
See specification for sustaining voltage limits or over-current protection voltage limits.
Negative current is defined as coming out of (sourcing) the output.

t

Complete part number includes additional characters to indicate operating temperature range and package style.

2-5

HALL-EFFECT SENSORS
Section 4
UNIPOLAR HALL·EFFECT SWITCHES

=

Switch Points (at T. +25°C)
Max. Operate
Min. Release

Max. Output
Ratings

Part Number *

175 G
200G
200G
300G
350G
400G
440 G
450G
450G

2 x 25 mAt/25 V
25 mN25 V
900 mN28 V
24 Vt
25 mN25 V
25 mN30 V
25 mN30 V
25 mN25 V
25mN30V

3235
3140
5140
3055
3120
3122
3123
3113
3121

25 mN28 V
25 mN24 V

3046/56/58
3059

25G
50G
50G
-25G
50 G
140G
180G
30G
125 G

Gear-Tooth Sensors, Zero Speed
Gear-Tooth Sensor, AC Coupled

t

Complete part number includes additional characters to indicate operating temperature range and package style.
Output 1 switches on south pole, output 2 switches on north pole.

t

Multiplexed two-wire sensor; after proper address, power/signal bus current indicates magnetic field condition.

Ext. Temp.
Available

yes

yes
yes
yes
yes

yes
yes
yes

BIPOLAR HALL·EFFECT SWITCHES

=

Max. Output
Ratings

Part Number *

25 mN25 V
25 mN25 V
25 mN25 V

3133
3132
3130

Switch Points (at T. +25°C)
Min. Operate
Max. Operate

Max. Output
Ratings

Part Number *

±50G
±50G
±25G
±80G
±50G
±25G
±25G
±170G
±70G

15 mN18 V
25 mN30 V
15 mN18 V
25mN30V
25mN30V
2 x50 mN25 Vt
2 x 500 mN30 Vt
25 mN30 V
25 mN30 V

3177
3187
3175
3188
3189
3275
5275
3185
3186

Switch Points (at T. +25°C)
Max. Operate
Min. Release
+75G
+95G
+150G

-75 G
-95G
-150 G

Ext. Temp.
Available
yes
yes
yes

BIPOLAR HALL·EFFECT LATCHES

=

±150G
±150G
±170G
±180 G
±230 G
±250G
±250G
±270G
±330G

*

Complete part number includes additional characters to indicate operating temperature range and package style.

t

Complementary outputs for 2-phase unipolar brush less dc motor control.

Ext. Temp.
Available

yes

yes
yes
-

yes
yes

LINEAR HALL·EFFECT SENSORS
Description

Part Number *

Typical output 0.7 mV/gauss
Typical output 1.3 mV/gauss
Typical output 2.5 mV/gauss

3501
3503
3506/07

..

Complete part number Includes additional characters to indicate operating temperature range and package style.
See also, 2429 fluid detector and 5348 smoke detector, Section 6.
2-6

Ext. Temp.
Available

yes

DEVICES FOR
MASS STORAGE APPLICATIONS
Section 5
Part Number'

Description

8901
8902
8920
8925
8932-A
8936
8951
8952
8958
8980

5 V 3-Phase Brushless DC Motor Controller/Driver with Back-EMF Sensing
5 V and 12 V 3-Phase Brushless DC Motor Controller/Driver with Back-EMF Sensing
Dual Schottky Diode
3-Phase Motor Controller/Driver with Linear Current Control and Power DMOS Outputs
6 V, 600 rnA Voice Coil Motor Driver
6 V, 600 rnA Voice Coil Motor Driver
Servo Controller System
Servo Loop Compensator
16 V, 250 rnA Voice Coil Motor Driver
Spindle & Voice-Coil Actuation Manager/Driver

'. Complete part number includes additional characters to indicate operating temperature range and package style.

DEVICES FOR
PRINTER APPLICATIONS
Section 3

•

Part Number'

Description

2916
2917
2918
2961
2962
5817
5829

Dual 45 V, 750 rnA Full-Bridge PWM Stepper Motor Driver
Dual 45 V, 1.5 A Full-Bridge PWM Stepper Motor Driver
Dual 45 V, 1.5 A Full-Bridge PWM Stepper Motor Driver
45 V, 3.4 A Solenoid Printhead Driver
Dual 45 V, 3 A Solenoid Printhead Driver
Addressable 30 V, 450 rnA 28-Line Ink-Jet Printer DecoderlDriver
Serial-In 50 V, 1.6 A 9-Wire Solenoid Printhead Driver

Complete part number includes additional characters to indicate operating temperature range and package style.

2-7

o

SELECTION GUIDE
AUTOMOTIVE, SIGNAL-PROCESSING,
AND CONSUMER ICs
EXTENDED TEMPERATURE DEVICES SUITABLE FOR AUTOMOTIVE APPLICATIONS

•

Part
Number'

Function

2001 , 2003, 2004,
2013, and 2023
2065 and 2068
2429
2436
2454 and 2455
2460
2543,2547, & 2549
2596
2801, 2803, 2804, & 2823
2916
2943
2981 thru 2984
3046, 3056, & 3058
3059
3120
3121,3122, & 3123
3130
3132 and 3133
3140
3141,3142, & 3143
3185 thru 3189
3506 and 3507
3828
3841
3844
3845 and 3846
3848
4000
5140
5616
5703
5800 and 5801
5810-F
5812-F
5832
6118

High-Voltage, High-Current Darlington Arrays
1 .5 A Darlington Switches
Fluid (Low-Coolant) Detector
Countdown Power Timer (Rear-Window Defogger)
Lamp Monitors
Electronic Spark Timing
Protected Quad Power Drivers
8-Channel Saturated Sink Driver
High-Voltage, High-Current Darlington Arrays
Dual Full-Bridge PWM Motor Driver
High-Current Half-Bridge Motor Driver
8-Channel Source Drivers
Hall-Effect Gear-Tooth Sensors - Zero Speed
Hall-Effect Gear-Tooth Sensor - AC Coupled
Hall-Effect Switch
Hall-Effect Switches
Hall-Effect Switch
Ultra-Sensitive Bipolar Hall-Effect Switches
Hall-Effect Switch
Sensitive Hall-Effect Switches
Hall-Effect Latches
Ratiometric, Linear Hall-Effect Sensors
FM Stereo Decoder
AM Signal Processor
Dual-Conversion AM Receiver
AM Noise Blankers
Dual-Conversion AM Receiver
Medium-Power Darlington Array
Protected PowERHALL Sensor - Lamp/Solenoid Driver
LCD Automotive Clock - Programmable
Quad 2-lnput Peripheral/Power Driver
BiMOS " Latched Drivers
BiMOS " 1O-Bit Serial-Input, Latched Source Driver
BiMOS " 20-Bit Serial-Input, Latched Source Driver
BiMOS " 32-Bit Serial-Input, Latched Driver
Fluorescent Display Driver

Complete part number includes additional characters to indicate operating temperature range and package style.

2-8

Detailed Info
Section
3
3
6
6
6
6
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
6
6
6
6
6
7
4
6
3
3
3
3
3
3

SELECTION GUIDE
AUTOMOTIVE, SIGNAL-PROCESSING, AND CONSUillER ICS

LINEAR INTEGRATED CIRCUITS FOR RADIO APPLICATIONS (Detailed Information in Section 6)

•

Part
Number"

Inputs

Function

Supply Voltage
Range

3718
3828
3841
3844
3845
3846
3848
3859

Audio
Composite Audio
to 30 MHz
to 30 MHz
to 30 MHz
to 30 MHz
to 30 MHz
to 30 MHz

Low-Voltage Audio Power Amplifier
FM Stereo Decoder w/Noise-Actuated Blend
AM Signal Processor
Dual-Conversion AM Receiver
AM Stereo Noise Blanker
AM Noise Blanker
Dual-Conversion AM Receiver
FM Communications IF System

1.8-9V
8.5-12 V
7-16V
7.5-16 V
7.5-12 V
7.5-12 V
7.5-16 V
4-9 V

Complete part number includes additional characters to indicate operating temperature range and package style.

SPECIALIZED INTEGRATED CIRCUITS FOR CONSUMER APPLICATIONS

•

Part
Number"

Function

2429
2436
2455
3059
5348
8902

Fluid Detector
Countdown Power Timer
Quad Comparator
Hall-Effect Gear-Tooth Sensor
Ionization-Type Smoke Detector
3-Phase Brushless DC Motor Controller/Driver w/Back-EMF Sensing

Detailed Info
Section
6
6
6
4
6
5

Complete part number includes additional characters to indicate operating temperature range and package style.

OTHER ANALOG INTEGRATED CIRCUITS

•

Part
Number"

Function

3501
3503
3506 and 3507
3718
3751
8131
8181
8932-A
8936
8951
8952
8958

Linear Output Hall-Effect Sensor
Ratiometric Linear Output Hall-Effect Sensor
Ratiometric Linear Output Hall-Effect Sensors
Low-Voltage Audio Power Amplifier
Power Operational Amplifier
Precision Supervisory Systems Monitor
LoW-Dropout, High-Efficiency, 5 V Regulator
16 V, 250 rnA Voice-Coil Motor Driver
16 V, 250 rnA Voice-Coil Motor Driver
Servo Controller System
Servo Loop Compensator
16 V, 800 rnA Voice-Coil Motor Driver

Detailed Info
Section
4
4
4
6
3
6
6
5
5
5
5
5

Complete part number includes additional characters to indicate operating temperature range and package style.

2-9

IN ALPHA-NUMERICAL ODDER
The suggested Allegro replacement devices are based
on similarity as shown in currently published data. Exact
replacement in all applications is not guaranteed and the
user should compare the specifications of the competitive
device and recommended Allegro replacement.

MFG ABBREVIATIONS:
A

ASAHI
CS
DI

EXR
FSC
HIT
IP
ITT

MAT
MCRL
MICR
MIT
MOT

MT
NEC
NS

Allegro MicroSystems
Asahi
Cherry Semiconductor
Dionics, Inc.
Exar Integrated Systems
Fairchild Semiconductor
Hitachi Ltd.
Integrated Power
ITT Semiconductors
Matsushita
Micrel
Microswitch
Mitsubishi Electric Corp.
Motorola Semiconductor
Mietec
Nippon Electric Co.
National Semiconductor

# European registration; manufactured by various companies including
In, Philips, SGS/ATES, Siemens, Thomson-CSF, AEG·Telefunken,
Valvo, & others.
~

Functional equivalent only; usually improved performance but not
necessarily pin compatible.

2-10

OKI

PE
RCA
RFA
SAM
SANY
SG
SIEM
SIG
SGS

SPR
SYL
THM
TI
TOS
TRW

UNI

Oki Semiconductor
Pro-Electron #
RCA (Harris)
Rifa
Samsung Semiconductor
Sanyo
Silicon General Inc.
Siemens Corp.
Signetics Corp.
SGS/ATES
Sprague Electric Co.
Sylvania
Thomson-CSF
Texas Instruments
Toshiba Corp.
TRW
Unitrode

Competitive Part Number
Prefix
CA
CA
CA
CA
CA
CS
DI
DI
DN
DN
DN
DN
DN
ECG
ECG
EW
FSA
FSA
HA
HA
HA
HA
HA
IP
IP
IP
IP
IP
ITT
ITT
ITT
ITT

KA
KA
l
l
l
l
l
l
l
l

Base
Number
3169
3219
3219
3242
3262
166
508
514
6835
6836
6837
6838
6839
2013
2021
550
2619
2719
13007
13415
13421
16617
16617
293
2064
.2065
2068
2069
552
556
652
656
2580
2588
165
201
203
204
293
293
295
298

Suffix

AE
E
E
E

P
P

A
P
PJ
D
N
N
N
N

A
A

D

D

Mfg.
Code(s)

Suggested
Allegro
Replacement

RCA
RCA
RCA
RCA
RCA
CS
DI
DI
NS/MAT
NS/MAT
NS/MAT
NS/MAT
NS/MAT
SYl
SYl
ASAHI
FSC
FSC
HIT
HIT
HIT
HIT
HIT
IP
IP
IP
IP
IP
ITT
ITT
ITT
ITT
SAM
SAM
SGS
SGS
SGS
SGS
SGS/UNI
SGS
SGS/UNI
SGS

UDN2943Z
UDN2543B
UDQ2543B
UDN2543B
UDN2543B
UlN2429A
UDN6116A
UDN6118A-2
UGN3501U
UGN3501U
A3121 EU
UGN3130U
A3121EU
UlN2013A
UDN6118A
UGN3140U
TND908
TND903
UDN2540B
UDN2543B
UDN2993B
UDN6118A-2
UDQ6118A-2
UDN2993B
UlN2064B
UlN2065B
UlN2068B
UlN2069B
UlN2001A
UlN2003A
UlN2001A
UlN2003A
UDN2580A
UDN2588A
UlN3751Z
UlN2001A
UlN2003A
UlN2004A
UDN2993B
UDN2993B
UDN2962W
UDN2998W

Competitive Part Number
Notes Prefix
~

~

~

~

=

=
=
=
=

l
l
l
l
l
l
l
lB
lB
lB
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
MC
MC
MC
MC
MC
MC
MC
MC
MC
MC
MIC
MIC
MIC
MIC

Base
Number
298
298
603
6218
6219
6220
6221
1231
1233
1234
2001
2003
2004
2064
2065
2580
2803
2823
2981
2982
2983
2984
54523
54524
54526
54532
54562
54563
1411
1411
1413
1413
1416
1416
1417
1473
3359
3479
5800
5800
5801
5801

Suffix
DNE
B

P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
TP
P
TP
P
TP
P
PI
P
P
BM
BN
BN
BV

Mfg.
Code(s)

Suggested
Allegro
Replacement

TI
SGS/UNI
SGS
SGS
SGS
SGS
SGS
SA NY
SANY
SANY
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MCRl
MCRl
MCRl
MCRl

UDN2993B
UDN2998W
UlN2823A
UDN2916B
UDN2916B
UDN2544B
UDN2540B
UlN2001A
UlN2003A
UlN2004A
UlN2001A
UlN2003A
UlN2004A
UlN2064B
UlN2065B
UDN2580A
UlN2803A
UlN2823A
UDN2981A
UDN2982A
UDN2983A
UDN2984A
UlN2003A
UlN2001A
UlN2004A
UlN2064B
UDN2982A
UDN2981A
UlN2001A
UlQ2001A
UlN2003A
ULQ2003A
UlN2004A
ULQ2004A
UDN2580A
UDN5713M
UlN3859A
UCN5804B
UCQ5800l
UCQ5800A
UCQ5801A
UCQ5801EP

Notes
~

=
=

~

=

=

# European registration; manufactured by various companies including ITT, Philips, SGS/ATES,Siemens, Thomson·CSF, AEG-Telefunken, Valvo, &

others.
= Functional equivalent only; usually improved performance but not necessarily pin compatible.

2-11

Competitive Part Number
Prefix

Base
Number

MIC
MIC
MPQ
MPQ
MPQ
MPQ
MPQ
MSl
MTC
MTC
MTC
NE
NE
NE
NE
NE
NE
OH
OHN
OHN
OHN
OHN
OHN
OHS
OHS
OHS
OHS
PBD
PBD
PBD
PBD
PBD
PBD
PBl
PBl
S
SA
SAA
SAA
SAS
SAS
SG

5801
5821
3904
3906
6002
6502
6700
912
6020
6033
6034
594
5503
5504
5601
5603
5604
360
3013
3019
3020
3030
3040
3019
3020
3030
3040
3517
3523-01
3523-02
3523-03
3523-12
3523-13
3717
3770
4534
594
1027
1042
251
251
298

Suffix
CN
CN

R
D
D
N
N
N
N
N
N
U
U
U
U
U
U
U
U
U
N
N
N
N
N

N

S4
S5
D

Mfg.
Code(s)

Suggested
Allegro
Replacement

MCRl
MCRl
MOT
MOT
MOT
MOT
MOT
OKI
MT
MT
MT
SIG
SIG
SIG
SIG
SIG
SIG
TRW
TRW
. TRW
TRW
TRW
TRW
TRW
TRW
TRW
TRW
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
AMI
SIG
SIG/PE
MOT/PE
SIEM
SIEM
SG

UCN5801A
UCN5821A
TPQ3904
TPQ3906
TPQ6002
TPQ6502
TPQ6700
UDN6118A-2
UCN5801A
UCN5832C
UCN5832C
UDN6118A-2
UlN2023A
UlN2024A
UlN2001A
UlN2003A
UlN2004A
A3121 EUGN3113U
A3121EU
A3121EU
UGN3130U
UGN3140U
A3121lU
A3121lU
UGS3130U
UGS3140U
UCN5804B
UlN2001A
UlN2004A
UlN2003A
UlN2024A
UlN2023A
UDN2953B
UDN2953B
UCN581 OAF
UDQ6118A-2
UCN5804B
UCN5804B
UGN3275A3121EUDN2998W

Competitive Part Number
Notes Prefix

z
z

z

z
z

z
z

z

SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SN
SN
SN
SN
SN
SN
SN
SN
SN
SN
SN
SN
SN
SN
SN
SS
SS
SS
SS
SS
SS
SS
TCA
TO
TO
TO
TO
TD

Base
Number
2001
2003
2004
2013
2023
2024
2064
2065
2068
2069
3173
3643
3853
6118
75064
75065
75068
75069
75437
75468
75468
75468
75469
75469
75512
75518
75518
754410
754411
31
41
44
44
46
81
89
365
62001
62001
62003
62003
62004

Suffix
N
N
N
N
N
N
W
W
W
W
P
S
N
N
NE
NE
NE
NE
ANE
D
N
N
N
N
BN
FN
N

EA
A
B
EA
A1
AP
P
AP
P
AP

Mfg.
Code(s)

Suggested
Allegro
Replacement

SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
MICR
MICR
MICR
MICR
MICR
MICR
MICR
PEiSIEM
TOS
TOS
TOS
TOS
TOS

UlN2001A
UlN2003A
UlN2004A
UlN2013A
UlN2023A
UlN2024A
UlN2064B
UlN2065B
UlN2068B
UlN2069B
UlN3751Z
UDN2962W
UlN2013A
UDN6118A
UlN2064B
UlN2065B
UlN2068B
UlN2069B
UDN2543B
UlN2023l
UlN2023A
UlN2023A
UlN2024A
UlN2024A
UCN5811A
UCN5818EPF
UCN5818AF
UDN2993B
UDN2993B
UGS3132U
UGS3132UA
UGS3140UA
UGS3120UA
A3185lUA
UGN3132U
UGN3501U
UlN3751Z
UlN2001A
UlN2001A
UlN2003A
UlN2003A
UlN2004A

Notes

z

z
z
z
z
z
z
z
z
z
#z

# European registration; manufactured by various companies including lIT, Philips, SGS/ATES, Siemens, Thomson-CSF, AEG-Telefunken, Valvo, &
others.
~

Functional equivalent only; usually improved performance but not necessarily pin compatible.

2-12

Competitive Part Number
Prefix
TD
TD

TD
TD

TD
TD
TD
TD

TD
TD

TD
TDA
TEA
TID
TID
TID
TID
TL
TL
TL
TL
TL
TL
TL
TL
TL
TL
TL
TL
TL
TL
TL
TVA
UC
UC
UC
UC
UC
UCN
UCN
UCN
UCN

Base
Number
62004
62064
62064
62081
62083
62084
62101
62103
62104
62478
62781
3717
3717
121
122
123
124
170
172
173
173
3019
3020
4810
4810
4810
4810
5812
5812
5812
5812
5812
298
3175
3517
3620
3717
3770
4202
4203
4204
4205

Suffix

P
AP
P
AP
AP
AP
P
P
P
AP

C
C
I

BDW
BIDW
BIN
BN
FN
FN
IFN
IN
N

A
A
A
B
B-2

Mfg.
Code{s)

Suggested
Allegro
Replacement

TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
PE
PE
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
MOT/PE
UNI
UNI
UNI
UNI
UNI
SPR
SPR
SPR
SPR

ULN2004A
ULN2064B
ULN2064B
ULN2801A
ULN2803A
ULN2804A
ULN2001A
ULN2003A
ULN2004A
UDN5713M
UDN6118A-2
UDN2953B
UDN2953B
TND933
TND940
TND938
TND939
UGN3130U
A3121EU
UGN3503U
UGN3503U
A3121EUA
UGN3120UA
UCN5810LWF
UCQ5810LWF
UCQ581 OAF
UCN5810AF
UCN5812EPF
UCN5812EPF
UCQ5812EPF
UCQ5812AF
UCN5812AF
ULQ2436M
A8958CEA
UCN5804B
UDN2936W
UDN2953B
UDN2954W
UCN5804B
UCN5804B
UCN5804B
UCN5804B

Competitive Part Number
Notes

#~
#~

~

~

~

~

#
~

~

~

~

~

~

Prefix
UCN
UCN
UCN
UCN
UCN
UCN
UCN
UCN
UCN
UCN
UCN
UCN
UCN
UD
UDN
UDN
UDN
UDN
UDN
UDN
UDN
UDN
UGN
UGN
UGN
UGN
UGN
UGN
UGN
UGN
UGN
UGN
UGS
UGS
UGS
UGS
UGS
UGS
UHP
UHP
UHP
UHP

Base
Number
4401
4801
4801
4810
4810
4815
4821
4822
4823
5812
5812
5812
5812
4181
2541
2542
2952
2952
2975
5713
6126
6184
3013
3019
3020
3030
3040
3075
3077
3119
3131
3501
3019
3020
3030
3040
3119
3131
181
400
400
402

Suffix
A
A
ADP
A
N
A
A
A
A
A
A-1
EP
EP-1
B
B
B
W
W
N
A
A

-

M

-

-1
-1

Mfg.
Code{s)

Suggested
Allegro
Replacement

SPR
SPR
THM
SPR
TI
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
TI
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
AlSPR
AlSPR
SPR
SPR
SPR
SPR
SPR
AlSPR
AlSPR
SPR
SPR
SPR
SPR

UCN5800A
UCN5801A
UCN5801A
UCN581 OAF
UCN581 OAF
UCN5815A
UCN5821A
UCN5822A
UCN5823A
UCN5812AF
UCN5812AF-1
UCN5812EPF
UCN5812EPF-1
UDN5706A
UDN2543B
UDN2543B
UDN2953B
UDN2954W
UDN2962W
UDN5713M
UDN6116A
UDN6118A-1
UGN3113A3121 EA3121 EUGN3130UGN3140UGN3175UGN3177A3121 EUGN3132UGN3501L1
A3121 LA3120LUGS3130UGS3140A3121 LUGS3132UDN5706A
UDN5706A
UDN5706A
UDN5703A

Notes

~

~

~

~

~

~

~

~

~

~

~

# European registration; manufactured by various companies including ITT, Philips, SGS/ATES, Siemens, Thomson-CSF, AEG-Telefunken, Valvo, &
others,
~

Functional. equivalent only; usually improved performance but not necessarily pin compatible.

2-13

Competitive Part Number
Prefix
UHP
UHP
UHP
UHP
UHP
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN

Base
Number
402
403
403
406
406
2001
2001
2001
2003
2003
2003
2003
2003
2003
2004
2004
2004
2004
2004
2004
2013
2023
2023
2024
2064
2064
2064
2065
2065
2065
2068
2068
2068
2069
2069
2069
2401
2801
2801
2803
2803
2803

Suffix

-1
-1
A
AN
N
A
AD
AN
D
DI
N
A
AD
AN
D
DI
N
N
D
N
N
B
N
NE
B
N
NE
B
N
NE
B
N
NE
A
A
N
A
D
N

Mfg.
Coders)

Suggested
Allegro
Replacement

SPR
SPR
SPR
SPR
SPR
MOT/SGS
TI
IP
MOT/SGS
TI
TI
IP
SGS
IP/SIG
MOT/SGS
TI
TI
IP
SGS
IP/SIG
IP
IP
IP
IP
MOT/SGS
IP
MOTITI
MOT/SGS
IP
MOTITI
MOT/SGS
IP
TI
MOT/SGS
IP
TI
SPR
MOT/SGS
IP
MOT/SGS
IP
IP

UDN5703A
UDN5703A
UDN5703A
UDN5706A
UDN5706A
ULN2001A
ULN2001A
ULN2001A
ULN2003A
ULN2003L
ULN2003A
ULN2003L
ULN2003L
ULN2003A
ULN2004A
ULN2004L
ULN2004A
ULN2004L
ULN2004L
ULN2004A
ULN2013A
ULN2023L
ULN2023A
ULN2024A
ULN2064B
ULN2064B
ULN2064B
ULN2065B
ULN2065B
ULN2065B
ULN2068B
ULN2068B
ULN2068B
ULN2069B
ULN2069B
ULN2069B
ULN2455A
ULN2801A
ULN2801A
ULN2803A
ULN2803LW
ULN2803A

Competitive Part Number
Notes Prefix
~

~

~

~

~

ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULN
ULS
UPA
UPA
UPA
XR
XR
XR
XR
XR
XR
XR
XR
XR

fLA
IlA

fLA

~

Base
Number
2804
2804
2804
2823
2823
3006
3008
3008
3827
3847
3006
2001
2003
2004
2001
2003
2004
2013
2201
2203
2204
6118
6118
9665
9667
9668
6
8
8
8
8
55
65
65
91
92
103
103
103
103
513
517

Suffix

Mfg.
Coders)

A
MOT/SGS
D
IP
N
IP
D
IP
N
IP
T
SPR
M
SPR
T
SPR
A
SPR
EP
SPR
T
SPR
C
NEC
C
NEC
NEC
C
P
EXR
P
EXR
EXR
P
CP
EXR
CP
EXR
CP
EXR
CP
EXR
P
EXR
P-2
EXR
PC
FSC
PC
FSC
PC
FSC
MICR
SS
MICR
SS1E1
SS3E1
MICR
SS5E1
MICR
SS7E1
MICR
MICR
SS16
SS2
MICR
SS4
MICR
SS12-2
MICR
SS12-2
MICR
SR
MICR
SR13A-1 MICR
SR17A-1 MICR
SR5A-1
MICR
SS16
MICR
MICR
SS16

Suggested
Allegro
Replacement
ULN2804A
ULN2804LW
ULN2804A
ULN2823LW
ULN2823A
A3121 EU
UGN3501L1
UGN3501U
A3828EA
A3844EEP
A3121LU
ULN2001A
ULN2003A
ULN2004A
UL02001A
UL02003A
UL02004A
ULN2013A
ULN2001A
ULN2003A
ULN2004A
UDN6118A
UDN6118A-2
ULN2001A
ULN2003A
ULN2004A
UGN3501UGN3130U
UGN3121EU
UGN3130U
UGN3120U
UGN3120U
UGN3113U
UGN3113U
UGN3501U
UGN3501U
UGN3501A3121LUGS3130UGN3113UGS3140U
UGS3132U

Notes

~

~

~

~

~

~

~

~

~

~

~

~

~

~

~

~

~

# European registration; manufactured by various companies including lIT, Philips, SGS/ATES, Siemens, Thomson-CSF, AEG-Telefunken, Valvo, &
others.

=

Functional equivalent only; usually improved performance but not necessarily pin compatible.

2-14

Competitive Part Number
Prefix

Base
Number
518
552
556
613
613
613
617
617
617
652
656
9665
9667
9668

Suffix
SS16

SS2
SS2
SS4
SS2
SS2
SS4

PC
PC
PC

Mfg.
Code(s)
MICR
ITT
ITT
MICR
MICR
MICR
MICR
MICR
MICR
ITT
ITT
FSC
FSC
FSC

Suggested
Allegro
Replacement
UGS3132U
ULN2001A
ULN2003A
A3121 EA3121LU
UGS3120U
UGS3130UGS3130U
UGS3130U
ULN2001A
ULN2003A
ULN2001A
ULN2003A
ULN2004A

Competitive Part Number
Notes

Prefix

Base
Number

Suffix

Mfg.
Code(s)

Suggested
Allegro
Replacement

Notes

~

~

~

~

~

~

~

# European registration; manufactured by various companies including lIT, Philips, SGS/ATES, Siemens, Thomson·CSF, AEG·Telefunken, Valvo, &
others.

=

Functional equivalent only; usually improved performance but not necessarily pin compatible.

2-15

COMPETITIVE IC
PART NUMBERING
Cherry Semiconductor:
CS

123

0

L

Exar:

XR

2001

Package.

L
L
C

N

L

Grade.

Fairchild:

IlA

705

P

D = Small Outline
DW = Wide-Body Small Outline
FN = Plastic Leaded Chip Carrier
J = Ceramic DIP
N = Plastic DIP
V = Power Tab SIP
VH = Power Tab SIP with Lead Form

Package.

D = Small Outline
N = CerDIP
P = Plastic DIP

C = Commercial (O°C to +70°C)
M = Military (-55°C to +125°C)
Blank = Improved Commercial

C

L

Temperature. C = Commercial (O°C to +70 or +75°C)
L = -55°C to +85°C
M = Military (-55°C to +125°C)

Package.

D = Ceramic DIP
= Flange Mount (TO-66)
K = Flange Mount (TO-3)
P = Plastic DIP
R = Ceramic Mini-DIP
T = Plastic Mini-DIP
U = Power Tab (TO-220)

J

Fujitsu:
MB

3759

E

C

L

Package.

C = Ceramic
P = Plastic DIP
Z = CerDIP

Hitachi:
HA

1199

P

L

Package.

P = Plastic DIP
C = Ceramic DIP
CG = Ceramic Leadless Chip Carrier
CP = Plastic Leaded Chip Carrier
F = Small Outline
G = CerDIP
T = Power-Tab SIP

Integrated Power:
IP

3

P

45

T

L

LTempe'"tme
2-16

Package.

D = Ceramic

J = CerDIP

K = Flange Mount (TO-3)
N = Plastic DIP
T = Power Tab (TO-220)
1 = -55°C to + 125°C
2 = -25°C to +85°C
3 = O°C to +70°C

Mitsubishi:

M

L
5

4523

P

L

Package.

K=CerDIP
P = Plastic DIP
S = Ceramic DIP

Temperature. 5 = Commercial/Industrial
9 = Military

Motorola:
MC

1311

P

L

Package.

D = Small Outline
K = Metal Flange Mount (TO-3)
L = Ceramic DIP
P = Plastic DIP
PQ = Plastic Quad In-Line
R = Metal Flange Mount (TO-66)
T = Power Tab (TO-220)
U = Ceramic DIP

National Semiconductor:
LM

380

N

L- Package.

D = Ceramic DIP
E = Ceramic Leadless Chip Carrier
J = CerDIP
M = Small Outline
N = Plastic DIP
T = Power Tab (TO-220)
V = Plastic Leaded Chip Carrier
WM = Wide-Body Small Outline

Pro-Electron:

TO

A

1060

l

Temperature.

P

L

Material.

Package.

C = Metal-Ceramic
G = Glass-Ceramic (CerDIP)
M= Metal
P = Plastic

D = Dual In Line
G = Flat Quad
K = Diamond

A = See Detail Specification
B = O°C to +70°C
C = -55°C to +125°C
D = -25°C to +70°C
E = -25°C to +85°C
F = -40°C to +85°C
G = -55°C to +85°C

RCA (Harris):
CA

758

E

L

Package.

D = Ceramic DIP
E = Plastic DIP
F = CerDIP
M = Small Outline
Q = Plastic Leaded Chip Carrier
W = Staggered Quad In-Line Plastic
Blank = See Detail Specification

2-17

SGS-Thomson:
L

v

292

L

L

Package.

Special.

Signetics:
NE

564

M = Mini-DIP
N=DIP
T = Flange Mount
V = Power Tab SIP (TO-220)
VH = Power Tab SIP with Lead Form

C = Commercial Temperature
D = Internal Diodes

N

L

Temperature.

Package.

A = Plastic Leaded Chip Carrier
D = Small Outline
F = CerDIP
FE = Mini-CerDIP
G = Leadless Chip Carrier
I = Ceramic DIP
N = Plastic DIP
U = Plastic SIP

Nor NE = O°C to +70°C
SA = -40°C to +85°C
S or SE = -55°C to + 125°C
SU = -25°C to +85°C

Silicon General:
SG

2-18

1524

F

L

Package.

D = Small Outline
DM = 8-Lead Small Outline
DW = Wide-Body Small Outline
G = Power Tab (TO-220)
H = Ceramic DIP
J = CerDIP
L = Leadless Ceramic Chip Carrier
M = Plastic Mini-DIP
N = Plastic DIP
P = Power Tab (TO-220)
W = Plastic DIP Semi-Tab
Y = Ceramic Mini-DIP

Texas Instruments:

SN

75

064

NE

L..

Package. D = Small Outline
DW = Wide· Body Small Outline
FG = Ceramic Rectangular Leadless Chip Carrier
FH = Ceramic Square Leadless Chip Carrier
FK = Ceramic Square Leadless Chip Carrier
FM = Plastic Rectangular Leaded Chip Carrier
FN =. Plastic Square Leaded Chip Carrier
J = CerDiP
JD = Ceramic DIP
K = Power Tab (TO-220)
N = Plastic DIP
ND = Plastic DIP Semi-Tab
NE = Plastic DIP Semi-Tab
P = Plastic Mini-DIP

Temperature. 55 = -55°C to + 125°C
75 = O°C to +70°C

TL

494

L
C

J

L

Package. As shown above.

Temperature. C = Commercial (O°C to +70°C)
E = Extended (-40°C to +85°C)
I = Industrial (-25°C to +85°C)
M = Military (-55°C to +125°C)

Toshiba:

TA

7272

P

L

Package.

C = Ceramic
D = CerDIP
J = Plastic SOJ
P = Plastic DIP
T = PLCC

2-19

PERIPHERAL POWER & DISPLAY DRIVER ICs

SECTION 3. TECHNICAL DATA & APPLICATION NOTES
for Peripheral Power and Display Driver ICs

in Numerical Order .................................................................................. Beginning at 3-1
Applications Information:
Power ICs for Motor-Drive Applications ........................................................ 3-222
Integrated Circuits for Current-Sourcing Applications ................................... 3-229
Expanding the Frontiers of IC Interface for Electronic Displays .................... 3-239
Trends in IC Interface for Electronic Displays ............................................... 3-245
2936 3-Phase Brushless DC Motor Controller/Driver ................................... 3-251
Series 5800 BiMOS II Power Drivers ............................................................ 3-255
See Also:
Reliability of Series 2000 and 2800 Darlington Drivers ............................ Section 8
Reliability of Series 5800 BiMOS Drivers ................................................. Section 8
Reliability of Series 6100 High-Voltage Display Drivers ........................... Section 8

HIGH-VOLTAGE, HIGH-CURRENT
DARLINGTON ARRAYS
Ideally suited for interfacing between low-level logic circuitry and
multiple peripheral power loads, the Series ULN2000NL high-voltage,
high-current Darlington arrays feature continuous load current ratings
to 600 rnA for each of the seven drivers. At an appropriate duty
cycle depending on ambient temperature and number of drivers
turned ON simultaneously, typical power loads totaling over 260 W
(400 mA x 7, 95 V) can be controlled. Typical loads include relays,
solenoids, stepping motors, magnetic print hammers, multiplexed LED
and incandescent displays, and heaters. All devices feature open
collector outputs with integral clamp diodes.

ULN20XXL

ULN20XXA

The ULN2001 A device is a general-purpose array that may be used
with external input current limiting, or with most PMOS or CMOS logic
directly.
The Series ULN20x3NL has series input resistors selected for
operation directly with 5 V TTL or CMOS. These devices will handle
numerous interface needs-particularly those beyond the capabilities
of standard logic buffers.
The Series ULN20x4NL features series input resistors for
operation directly from 6 to 15 V CMOS or PMOS logic outputs.

Dwg. No. A·9594

ABSOlLUTE MAXIMUM RATINGS
Output Voltage, VCE
(ULN200X', ULN2013A) ........ 50 V
(ULN202X') .................. 95 V
Input Voltage, VIN ................. 30 V

Continuous Output Current, Ic
(ULN200X', ULN202X') ...... 500 rnA
(ULN2013A) ............... 600 rnA
Continuous Input Current, liN' ...... 25 rnA

The Series ULN200xNL is the standard Darlington array. The
outputs are capable of sinking 500 mA and will withstand at least
50 V in the OFF state. Outputs may be paralleled for higher load current
capability. The ULN2013A device is similar except that it will sink
600 mA. The Series ULN202xNL will withstand 95 V in the OFF state.
These Darlington arrays are furnished in 16-pin dual in-line plastic
packages (suffix A) and 16-lead surface-mountable SOICs (suffix L).
All devices are pinned with outputs opposite inputs to facilitate ease of
circuit board layout.

lFlEATUlIUES
I!!I TTL, DTL, PMOS, or CMOS Compatible Inputs
f!i1I Output Current to 600 mA
III Output Voltage to 95 V
II Transient-Protected Outputs
• Dual In-Line Plastic Package or Small·Outline IC Package

Power Dissipation, PD
(one Darlington pair) ........... 1.0 W
(total package) ........... See Graph
Operating Temperature Range,
TA'

. • . . . . . . . . . • . • .•

-20°C to +85°C

Storage Temperature Range,
Ts' ............... -55°C to +150°C
Note that the ULN2000A series (dual in·line
package) and ULN2000L series (small·outline
IC package) are electrically identical and share
a common pin number assignment.
x = digit to identify specific device. Characteristic shown applies to family of devices with
remaining digits as shown. See matrix on next page.

3·1

2001

TIIRlJ

2024

HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

DEVICE NUMBER DESIGNATION
PARTIAL SCHEMATICS
VCE(MAX)

SOV

SOV

9SV

IC(MAX)

SOOmA

600mA

SOOmA

ULN200lA (Each Driver)
Logic
COM

Part Number

General Purpose
PMOS, CMOS

ULN2001A*

-

-

SV
TIL,CMOS

ULN2003A*
ULN2003L*

ULN2013A*

ULN2023A*
ULN2023L

6-1S V
CMOS, PMOS

ULN2004A*
ULN2004L*

-

ULN2024A

'Also available for operation between -40°C and.+8SoC. To order, change
prefix from 'ULN' to 'ULQ'.
Dwg. No. A·9595

ULN20X3AIL (Each Driver)
2.5

,----,----,------y---,.----,

iii!:
z 2.0

~~-_+---_t_--_I---_t_--__I

en

~

COM

o

2.7K

i=

IfZ!C

,,
I

:,

L - - - - --- - ----... fiII--.-

~

I!'u,c,

~+,

-1'
'-9
1.5r---_+~~~ +----+---4---~
"61
~~

'-"%-

w

~

w 1.0
Owg. No. A-9651

1--.3Io~+_--_+-~:_t---+----I

~

:
w

0.5 1----+----

..J

ULN20X4AIL (Each Driver)

COM

I O~--~---~--~---~--~
....

2S

50

75

100

12S

1S0

AMBIENT TEMPERATURE IN °C

Dwg. No. GP·006

Dwg. No. A·9898A

x = Digit to identify specific device. Specification shown applies to family of devices with

remaining digits as shown. See matrix above.

3-2

SERIES ULN2000AIL

ELECTRICAL CHARACTERISTICS at +25°C (unless otherwise noted),
Characteristic
Output Leakage Current

Symbol

Test
Fig.

Applicable
Devices

ICEX

1A

All

Test Conditions

VCE(SAT)

1B

ULN2004*

2

All

Ic = 500 ~, T A = 70°C

50

65

-

VCE = 2.0 V, Ic = 200 mA

-

-

2.4

V

2.7

V

3.0

V

5.0

V

6.0

V

7.0

V

8.0

V

-

-

-

Ic = 100 mA, 18 = 250 ~

Ic = 350 mA, 18 = 500 ~
Input Current

IIN(ON)

3

ULN2003*
ULN2004'

Input Voltage

IIN(OFF)

4

All

VIN(ON)

5

ULN2003'

VIN = 3.85 V
VIN = 5.0 V

VCE = 2.0 V, Ic = 250 mA
VCE = 2.0 V, Ic = 300 mA
ULN2004*

VCE = 2.0 V, Ic= 125 mA
VCE = 2.0 V, Ic= 200 mA
VCE = 2.0 V, Ic = 275 mA
VCE = 2.0 V, Ic= 350 mA

D-C Forward Current

hFE

2

ULN2001A

Units

V IN = 12 V

VCE = 50 V, TA = 70°C, VIN = 1.0 V

Ic = 200 mA, 18 = 350 ~

Saturation Voltage

Limits
Typ. Max.

-

VCE = 50 V, TA = 25°C
VCE = 50 V, TA = 70°C

Collector-Emitter

Min.

VCE = 2.0 V, Ic = 350 mA

1000

<1

50

~

<1

100

!!A

<5

500

~

0.9

1.1

V

1.1

1.3

V

1.3

1.6

V

0.93

1.35

mA

0.35

0.5

mA

1.0

1.45

mA

~

Transfer Ratio
Input Capacitance

C IN

-

All

Turn-On Delay

tpLH

8

All

0.5 EIN to 0.5 EOUT

Turn-Off Delay

tpHL

8

All

0.5 EIN to 0.5 EOUT

IR

6

All

V R = 50 V, TA = 25°C

Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage

V R = 50 V, TA = 70°C
VF

7

All

IF= 350 mA

-

15

25

pF

0.25

1.0

!!S

0.25

1.0

!!S

-

50

!!A

100

!!A

1.7

2.0

V

'Complete part number includes suffix to identify package style: A = DIP, L = SOIC.

3-3

2001

TIIRU

2024

HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

TYPE ULN2013A

ELECTRICAL CHARACTERISTICS at +25°C (unless otherwise noted),
Characteristic
Output Leakage Current

Collector-Emitter
Saturation Voltage

Input Current

Symbol

Test
Fig.

ICEX

1A

VCE(SAT)

2

Limits
Test Conditions

Min.

Typ.

Max.

Units

VCE ; 50 V, T A ; 25°C

-

<1

50

~

VCE ; 50V, T A ; 70°C

-

<1

100

~

Ic ; 200 mA, Ie = 350 ~

-

1.1

1.3

V

Ic = 350 mA, Ie = 500 ~

-

,1.3

1.6

V

Ic = 500 mA, Ie = 600 ~

-

1.7

1.9

V

3

VIN =3.85 V

-

0.93

1.35

mA

IIN(OFF)

4

Ic = 500~, TA = 70°C

50

65

-

~

VIN(ON)

5

VCE = 2.0 V, Ic = 250 mA

-

2.7

V

-

3.0

V

-

3.5

V

15

25

pF

0.25

1.0

J.lS

0.25

1.0

J.lS

-

50

~

IIN(ON)

Input Capacitance

CIN

Turn·On Delay

tON

8

tOFF

8

0.5 EIN to 0.5 EOUT

IR

6

V R =50V,TA=25°C

-

V R =50V,TA =70°C

-

-'"

100

~

IF = 350 mA

-

1.7

2.0

V

2.1

2.5

V

Input Voltage

VCE = 2.0 V, Ic = 300 mA
VCE = 2.0 V, Ic= 500 mA

Turn-Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage

VF

-

7

0.5 EIN to 0.5 EOUT

IF = 500 mA

3-4

SERIES ULN2020AIL

ELECTRICAL CHARACTERISTICS at +25°C (unless otherwise noted).
Characteristic
Output Leakage Current

Collector-Emitter

Symbol

Test
Fig.

Applicable
Devices

ICEX

1A

All

VCE(SAT)

Test Conditions

-

< 1

50

VCE = 95 V, TA = 70°C

-

<1

100

!lA

<5

500

!lA

0.9

1.1

V

1.1

1.3

V

V IN = 3.85 V

ULN2024A

V IN = 5.0 V

-

0.35

0.5

mA

VIN = 12 V

-

1.0

1.45

mA

Ic = 500 !lA, T A = 70°C

50

65

-

!lA

= 2.0 V, Ic = 200 mA

-

-

2.4

V

VCE = 2.0 V, Ic = 250 mA

-

-

2.7

V

VCE = 2.0 V, Ic = 300 mA

-

V

2

All

VCE = 95 V, TA = 70°C, VIN = 1.0 V
Ic = 100 mA, IB = 250!lA

Ic = 350 mA, IB = 500 !lA

Input Voltage

!lA

ULN2023*

ULN2024A

3

Units

VCE = 95 V, TA = 25°C

Ic = 200 mA, IB = 350 !lA

IIN(ON)

Limits
Typ. Max.

-

18

Saturation Voltage

Input Current

Min.

IIN(OFF)

4

All

VIN(ON)

5

ULN2023*

ULN2024A

VCE

1.3

1.6

V

0.93

1.35

mA

Ic = 125 mA

-

-

3.0
5.0

V

VCE = 2.0 V, Ic = 200 mA

-

-

6.0

V

VCE = 2.0 V, Ic = 275 mA

-

-

7.0

V

8.0

V

15

25

pF

-

0.25

1.0

!IS

0.25

1.0

!Is

VCE

VCE

= 2.0 V,

= 2.0 V,

Ic= 350 mA

-

Input Capacitance

C IN

-

All

Turn-On Delay

tpLH

8

All

0.5 EIN to 0.5 EOUT

Turn-Off Delay

tpHL

8

All

0.5 EIN to 0.5 EOUT

IA

6

All

V A =95V,TA =25°C

-

-

50

!lA

VA = 95 V, TA = 70°C

-

-

100

!lA

IF = 350 mA

-

1.7

2.0

V

Clamp Diode
Leakage Current
Clamp Diode

VF

7

All

Forward Voltage
'Complete part number includes suffix to identify package style: A = DIP, L

= SOIC.

3-5

TEST FIGURES
OPEN

OPEN

VeE

Dwg. No. A-9729A

Dwg. No. A-9731A

FIGURE IA

FIGURE IB

FIGURE 2

OPEN

OPEN

~_""'_-oOPEN

Dwg. No. A-9732A

Dwg. No. A-9734A

FIGURE 3

FIGURE 5

FIGURE 4

V..
ULN20X,·
ULN20X3·
ULN2DX4*

Owg. No. A-9735A

3-6

FIGURE 7

12V

Complete part number includes a final letter to indicate package.

Dwg. No. A-9736A

x

FIGURE 6

3.5V
3.5V

=

Digit to identify specific device. Specification shown applies
to family of devices with remaining digits as shown.

FIGURE 8

2001

THRU

2024

HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE

TYPICAL APPLICATIONS

(DUAL IN-LINE PACKAGED DEVICES)
6OOr-~---T---r--~--~--r-~---T---r--,

o

~

!;;:

~ 400

l

P~~S---{L}--i>~--~~--~

NUMBER Of OUTPUTS
CONDUCTING

o

o

..

..

IMUlTANEOUSlY
20

OUTPUT

60

PER CENT DUlY CYCLE

100

Owg. No. A·9652

Owg. No. A·97528

(SMALL OUTLINE PACKAGED DEVICES)

~

600

!;;:
<

E

~
I-

76

400

I?

200

"~

4

"'

::::>

0
II:

5

3

~~

NUMBEROFOUlPUTS

0

2

'\ ~ ~ i'..

Z
W
II:
II:

i'..

..... .........

"

~~~

- jDUCY>lG StULTiiSLY

0

~

0

W

Il.

o

20
40
PER CENT DUlY CYClE

---

I--..

80

60

100
Dwg. No. A-9654A

COLLECTOR CURRENT
AS A FUNCTION OF SATURATION VOLTAGE

COLLECTOR CURRENT AS A
FUNCTION OF INPUT CURRENT

600

_~l1
1

I

!!:400

3:::
a
(j
g200

A4

"

A~

o
u
~,~
o

4

I

~I
')

''L~
,~~

I

~ ~O
...."'~

.....

0.5

I

200

I

I

/ /

if'

1.0

I.J

COLLECTOR-EMITTER SATURATION VOLTAGE IN VOLTS
Dwg. No. A·9754C

2 0

I

i'l

~

~,

o

I·

" ,/ -

'/1.'

I

600

o

, 0

"

'/

,

./

,

/

./

V-

REQUIRED
A- MAXIMUM
INPUT CURRErT

200
400
INPUT CURRENT IN J'A

600

Dwg. No. A·l0,B728

3-7

2001

THRU

2024

HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

TYPICAL APPLICATIONS

INPUT CURRENT
AS A FUNCTION OF INPUT VOLTAGE
SERIES ULN20X3AIL
7.5 ,..-_..-_...,-_-,-_--,_ _..-_...,-_-,-_-,

2.0

-

u

2

0.5

~

Dwg. No. A-9750B

INPUT VOLTAGE - VIN

SERIES ULN20X4AIL
2.0

Z
1.5

«

?;

1.0

.~
:>

u

2?;

~

0.5

~

p

E

""".,..

---- ---

.. --" .-

--" ---

1'i~\CAl",,

10
INPUT VOLTAGE - VIN

3-8

~

--'

__

II

12
Owg. No. A·9899A

1.5 A DARLINGTON SWITCHES
ULN2064/65B

High-voltage, high-current Darlington arrays ULN2061 M through
ULN2069B are designed for interface between low-level logic and a
variety of peripheral loads such as relays, solenoids, dc and stepper
motors, magnetic print hammers, multiplexed LED and incandescent
displays, heaters, and similar loads. Output OFF voltage ratings of 50 V
and 80 V are available. In the DIP, the quad drivers can drive resistive
loads to 480 watts (1.5 A x 80 V, 26% duty cycle). For inductive loads,
sustaining voltages of 35 V and 50 V at 100 mA are specified.
Dual-driver arrays ULN2061 M and the higher-voltage ULN2062M
are used for common-emitter (externally connected) or emitter-follower
applications. They are supplied in 8-pin plastic mini-DIPs.

Dwg. No. A·9765A

ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
for Any One Driver
(unless otherwise noted)
Output Voltage, VCEX •••••.••.• See Guide
Output Sustaining Voltage,
VCE(SUS) •.•.••••..•..••• See Guide
Output Current, lour (Note 1) ....... 1.75 A
Input Voltage, VIN (Note 2) ...... See Guide
Input Current, Is (Note 3) .......... 25 mA
Supply Voltage,
Vs (ULN2068B/LB & 2069B) ..... 10 V
Total Package Power Dissipation,
PD' ................... See Graph
Operating Temperature Range, (Note 4),
TA ................. -20°C to +85°C
Storage Temperature Range,
Ts' ................ -55°C to -150°C

Quad drivers ULN2064B/LB, ULN2065B, ULN2068B/LB, and
ULN2069B are intended for use with TTL, low-speed TTL, and 5 V MOS
logic. The ULN2065B and ULN2069B are selected for the 80 V minimum
output breakdown specification. The ULN2068B/LB and ULN2069B have
pre-driver stages and are recommended for applications requiring high
gain (low input-current loading). Quad-driver arrays are supplied with
heat-sink contact tabs in 16-pin plastic DIPs (suffix B) and 20-lead
surface-mountable wide-body SOICs (suffix LB).

FEATURES
• TTL, DTL, MOS, CMOS Compatible Inputs
• Transient-Protected Outputs
• Loads to 480 Watts
• Heat-Sink Contact Tabs on Quad Arrays

1. Allowable combinations of output current,
number of outputs conducting, and duty cycle
are shown on following pages.
2. Input voltage is referenced to the substrate (no
connection to other pins) for the ULN2061/62M,
reference is ground for all other types.
3. Input current may be limited by maximum
allowable input voltage.
4. The ULN2065B and ULN206BB are also
available for operation between -40°C and
+B5°C. Change third character from 'N' to '0'.

Always order by complete part number, e.g., IULN2061MI.
See matrix on next page. Note that all devices are not available
in all package types.
3-9

5.0 , - - -....- - - ; - - - . - - , - - . , - - - - ,

~

a;

SELECTION GUIDE
Part

Max.

Min.

Max.

Number'

VCEX

VCE(5U5)

VIN

ULN2061M
ULN2062M

50 V
80V

35 V
50V

30V
60V

TTL, DTL, Schottky TTL,
and 5 V CMOS

3.0

ULN2064B
ULN2064LB
ULN2065Bt

50V

35V

15 V

TTL, DTL, Schottky TTL,
and5VCMOS

80V

50V

15 V

2.01---+-"""''"'''''d----+--4j--\--l

ULN2068Bt
ULN2068LB
ULN2069B

50V

35V

15 V

80V

50V

15 V

4.0 1---+--==±=-=-¥=-:-::-7'l~--I

~

~
iii
i5

II:

w

~w
~

:

~ 1.0 I---+--=="""'..!:----F~_-t--\-+-l

C

:+:,
),

~~;::;:;~~~

Dwg. No. A·10,354C

Dwg. No. A-10,310

ELECTRICAL CHARACTERISTICS at +25°C, Vs = 5.0 V (unless otherwise noted).
Characteristic
Output Leakage Current

Symbol

Test
Fig.

Applicable
Devices

ICEX

1

ULN206S*

Collector-Emitter
Saturation Voltage

VCEISUS)

2

VCEISAT)

3

Max.

Units

-

100

(JA

VCE = 50 V, TA = 70°C

-

500

(JA

VCE = SO V

-

100

(JA

VCE = SO V, TA = 70°C

-

500

(JA

ULN206S*

Ic = 100 mA, VIN = 0.4 V

35

-

V

ULN2069B

Ic = 100 mA, VIN = 0.4 V

50

-

V

Both

Ic = 500 mA, VIN = 2.75 V

-

1.1

V

Ic = 750 mA, VIN = 2.75 V

-

1.2

V

Ic = 1.0 A, VIN = 2.75 V

-

1.3

V

Ic = 1.25 A, VIN = 2.75 V

-

1.4

V

ULN2069B
Input Current

Input Voltage

Min.

VCE = 50 V

ULN2069B

Output Sustaining Voltage

Limits
Test Conditions

IINION)

4

Both

VINION)

5

ULN206S*
ULN2069B

Ic = 1.5 A, VIN = 2.75 V

-

1.5

V

VIN = 2.75 V

-

550

(JA

VIN = 3.75 V

-

1000

(.IA

VCE = 2.0 V, Ic = 1.25 A

-

2.75

V

VCE = 2.0 V, Ic = 1.5 A

-

2.75

V

Supply Current

Is

S

Both

Ic = 500 mA, VIN = 2.75 V

-

6.0

mA

Turn-On Delay

tpLH

-

Both

0.5 Ein to 0.5 EOU !

-

1.0

(.Is

tpHL

-

Both

0.5 E,n to 0.5 EOU !' Ic = 1.25 A

-

1.5

(Js

V R = 50 V

-

50

(JA

V R =50V,TA =70°C

100

(JA

Turn-Off Delay
Clamp Diode Leakage Current

IR

6

ULN206S*

ULN2069B

Clamp Diode Forward Voltage

VF

7

Both

V R = SO V

-

50

(JA

V R = 80 V, TA = 70°C

-

100

(JA

IF = 1.0 A

-

1.75

V

-

2.0

V

IF = 1.5 A
'Complete part number includes suffix to identify package style: B

= DIP with

heat sink tabs, LB

= SOIC with

heat sink tabs.

3-13

INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE AT +25°C
4
14

/

1. 1

V

12

ULN206B/69
0
10

-~
~

::".

..,

E

~

B

~
2

6

E

~

I

/

*}

0. B

/

::"

o. 6

./

/

5

~

y

~ 0. 4
0. 1

/
0

V V

V

,.V

40

1.5

~

/

45

4.0
INPUT VOLTAGE - VIN

INPUT VOLTAGE - YIN

Dwg. No. A-1 Q,363C

Dwg. No. A-12,306A

COLLECTOR CURRENT AS A FUNCTION OF INPUT CURRENT AT +25°C

.... ...--_..

I

,

ULN2062
ULN2065

~

V

1.5

,~

/ . ........ /-

~
~

0

l

/
I

o

f

/

ULN-2061

ULN_2064

/

K

~

IJ~~
r-- ~"'~
~

o
1.0

2.0

3.0

/
o

.

/

50

INPUT CURRENT

INPUT CURRENT IN rnA - IS

Dwg. No. A-10,358C

3-14

V

J~
&

,

,

o

"

~"

K

100
IN~

150

-1 8

Dwg. No. A-12,306A

PEAK COLLECTOR CURRENT AS A FUNCTION OF DUTY CYCLE
(DUAL IN-liNE PACKAGED DEVICES)

1.5

"-'O~f
~ ~D
~

"

i
u

g

Uu

1.0

~~
O~

u:{
,,~

~~
~"

fl.JrC

'8

r""........

~SCO

tvu

......... ~d

ULN2061162
UNL2064165

0.5

"

~

'5u

0

1""--

Uu

1.0

joo

:jl"

f"

1.5

UCr,tv_

~It

O~

u:{
~~

o

o

60

40

20

80

PERCENT DUTY CYCLE

100

Dwg. No. A-10,356A

4

_LL

~

....

t--..... r--..

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
ULN2064 THROUGH ULN2069B
WITH STAVER V·7 HEAT SINK

,,~
,,~

~ffi

~ r--......
'" r-.....r-...... r;...r--......

.........

0.5

:i'''

"Z
g-

I

I

"
20

27.5"

jm

60

40

I

100

80

PERCENT DUTY CYCLE

Dwg. No. A-l0,398C

~,

'\

~

~"
"-

'","
i'oo...

~

~ :--.....
.....
2 ........

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY

ULNr64 TT OUG , ULN20rB

o

1.5

.........
........
,/ ,......." .........
........

- ----

r'\. ~ .........~ ....... ..........

~

.........
"-..... ..............
........ .........
~
2

::>

u

1"uu

1.0

j~

4

O~

u"

,,~

./

,,~

o

20

40

60

80

100

PERCENT DUTY CYCLE

Dwg. No. A-1 0,3608

~~ 0.5

~"
m"
"Z

>o-

S
;(

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
ULN2Q64 THROUGH ULN2069B "
WITH STAVER V-S HEAT SINK
37.5" cm

'~'''-"-

~
u

::>

g

"

1\10,..

1.0

~~

O~
u~

,,"

,,~

~~

~~

......

"

........ :--"""'-

I
20

1.5

-

40
60
PERCENT DUTY CYCLE

80

100

Dwg. No. A-l0,400C

......

~

"r- r--...

~ ~ r--... "-

./

f"".

rr--... r-- to--

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
ULN2064 THROUGH ULN2069B

0.5

>oz
g"

I I I I
20

60
PERCENT DUTY CYClE
40

80

100

Dwg. No. A-10,3618

3-15

PEAK COLLECTOR CURRENT AS A FUNCTION OF DUTY CYCLE
(DUAL IN-LINE PACKAGED DEVICES, cont'd)

I.S

""

"""

~

~

1.5

~
2 ......

~ ""-

~

r-:-- r--...
",,'

r--

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
UlN2064 THROUGH UlN2069B
WITH STAYER Y·a HEAT SINK

I I
40

20

I

60

" ""

......... r--..

3

W
37.St

"-

I~

r-.....

.......

.......

~

........
~

"

~ ....

r--...

-t:::--.

NUMBER OF OUTPUTS~
..........
CONDUCTING
SIMUlTANEOUSl Y
UlN2064 THROUGH UlN2069B
WITH STAVER V·7 HEAT SINK

I

.........
.........

--

27SCIW
I

80

100

40

20

PERCENT DUTY CYClE

60

80

100

PERCENT DUTY CYCLE

Dwg. No. A-1O,399C

Owg. No. A-10,401C

(ULN2064LB and ULN2068LB only)

z>W

a:
a:

z>-

w

1.5

\ \

::J

()

a:

~
~

'"'"

I"I~

()

1.0

...J

8~
,",0
«oo
W>-

r-....

>-. ~
...........
.............

...JW

ala:

I

~~

I

I

I

I

g~

;;!~

----

--

:--

~
W

1.0

8~

~f2
w>0..«

w UJ 0.5

...JW

ala:
«w

~~

o

;;!~

20

40

60

80

100

o

'"

I"l'
..........

()

...J
...J

\

\

...J«

a

PER CENT DUTY CYCLE

3-16

1.5

()

3 ..........

NUMBER OF OUTPUTS /
CONDUCTING SIMULTANEOUSLY

~;;;05

a:
a:

::J

-,
-

0

i"-- ""1

~

~ i'-.............

~4
NUMBER OF OUTPUTS .
CONDUCTING SIMUlTANEOUSl Y

, ,
20

I ,
40

PERCENT DUTY CYCLE

...........
3

~

60

--- 2

'-.

80

100

TYPICAL APPLICATION

Dwg. No. 6-1365

COMMON-CATHODE LED DRIVERS
(Type ULN2068B/LB is also applicable)

3-17

QUAD DARLINGTON
POWER DRIVER

OUT4
K
OUT3

IN4
IN3
ENABLE

GROUND

GROUND

GROUND

GROUND

OUTZ

Vee

K

INz

OUTl

Combining AND logic gates and inverting high-current bipolar
outputs, the UDN2540B quad Darlington power driver provides interface between low-level signal-processing circuits and power loads
totaling 360 W. Each of the four independent outputs can sink up to
1.8 A in the ON state with peak inrush currents to 2.5 A. The four
power outputs are each comprised of an open-collector Darlington
driver and an internal flyback/clamp diode for switching inductive leads.
They feature a minimum breakdown and sustaining voltage of 50 V.
The logic inputs are compatible with TTL and 5 V CMOS logic systems.
Typical applications include print heads, relays, solenoids, and
dc stepping motors. The UDN2540B can also be used to drive highcurrent incandescent lamps, LEOS, and heaters. A similar device,
specifically intended for driving a unipolar stepper motor in the twophase drive format, is the UDN2544B.
The UDN2540B is supplied in a 16-pin batwing power DIP. The
batwing construction provides for maximum package power dissipation
in a standard DIP construction. At 25°C, and with only 1 sq. in. of
copper foil at the ground tabs, the package is capable of safely
dissipating 3.8 W.

Dwg. No. A-11 ,561A

FEATURES
•
•
•
•
•
•

1.8 A Continuous Output Current
Output Voltage to 50 V
TTL and 5 V CMOS Compatible Inputs
Efficient InpuVOutput Pinning
Integral TranSient-Suppression Diodes
Replaces L6221 A

ABSOLUTE MAXIMUM RATINGS
at TA =25°C
Output Voltage, Vour ........ ',' .... 50 V
Output Current, lOUT (peak) ......... 2.5 A
(continuous) ................. 1.8 A
Logic Supply Voltage, Vee' ......... 7.0 V
Input Voltage, VIN . • . . • . . • . . . . . . . . . 7.0 V
Package Power Dissipation,
Po .................... See Graph
Operating Temperature Range,
T A •••••.••••••••••• ·20°C to +85°C
Storage Temperature Range,
Ts ................ ·55°C to +150°C

Always order by complete part number: IUDN2540el.
3-18

ELECTRICAL CHARACTERISTICS at T A

= 25°C,TJ ~

150°C, Vee

= 4.75 V to 5.25 V.
Limits

Characteristic

Symbol

Output Leakage Current

IcEX

Output Sustaining Voltage
Output Saturation Voltage

Input Current

Total Supply Current

Min.

Typ.

Max.

Units

V OUT ; 50 V. V 1N ; 0.8 V. V EN ; 2.4 V

-

<1.0

100

flA

V OUT ; 50 V, V 1N ; 2.4 V, V EN ; 0.8 V

-

<1.0

100

flA

V CE(sus}

lOUT; 1.8 A, L; 3.0 mH

50

-

-

V

VCE(SAT}

lOUT; 600 mA, V 1N ; V EN ; 2.4 V

-

0.9

1.0

V

lOUT; 1.0 A, V 1N ; V EN ; 2.4 V

-

1.0

1.2

V

lOUT; 1.8 A, V 1N ; V EN ; 2.4 V

-

1.3

1.6

V

V1N (1} or VEN (1}

2.4

-

-

V

Logic 0

V1N(O} or V EN(O}

-

-

0.8

V

Logic 1

V 1N (1} or V EN (1}; 2.4 V

-

-

10

flA

Logic 0

V1N(O} or VEN(O}; 0.8 V

-

-

-100

flA

Icc

V 1N * ; V EN ; 2.4 V, Vee; 5.0 V,

-

14

20

mA

V 1N * ; V EN ; 0.8 V, Vec; 5.0 V

-

0.4

2.0

mA

IF; 1.0 A

-

1.3

1.6

V

IF; 1.8A

-

1.6

2.0

V

V R ; 50 V

-

<1.0

100

flA

Logic 1

Input Voltage

Test Conditions

Outputs Open

Clamp Diode Forward Voltage

Clamp Diode Leakage Current

VF

IR

Typical Data is for design information only.
* All inputs simultaneously, all other tests are performed with each input tested separately.

(fJ

5,...---,...---,...---,...--.-,...-----,

~

z

Z

o

4/---+_--+_--+_-

!;i
D.

gj 3l---+__--+__--+__--H,...--l

C
a:
w

~
w

TRUTH TABLE
21----+

~

"o~

w

11----+---+---~~-+--+4

...J

ID

~

~ °2LS---LSO---7LS---10LO---1L2S--31S0
co:

ENABLE

INN

H

H

ON

-

L

OFF

X

OFF

L

OUTN

X ; Don't care.

TEMPERATURE IN °C
Dwg. No. GP-01QB

3-19

TYPICAL APPLICATION
(QUAD RELAY DRIVER WITH ZENER FLYBACK)
+28V
IN4

IN 3
ENABLE

+5V

Dwg. EP-016

APPLICATIONS INFORMATION
A typical application is shown for driving four high-current relays,
solenoids, or print heads. A Zener diode is used to increase the flyback
voltage, providing a much faster inductive load turn-OFF current decay,
resulting in faster dropout (reduced relay contact arcing), and improved
performance. The maximum Zener voltage, plus the load supply
voltage, plus the flyback diode forward voltage must not exceed the
device's rated sustaining voltage.
With external control circuitry, the ENABLE input can be used for
chopper (PWM) applications. If the ENABLE input is not used, it should
be tied high.
All inputs will float high if open circuited.

Vee" Vz + VF

w



I CEX

3-20

Dwg. WP-001

PROTECTED
QUAD POWER DHlVERS
OUT4

IN4

K

IN3
ENABLE

GROUND

GROUND

GROUND

GROUND

OUT2

Vee

K

OUT l

Dwg. No. A-11 ,561A

Providing interface between low-level signal processing circuits and
power loads to 240 W, the UDN2543B and UDQ2543B quad power
drivers combine NAND logic gates and high-current bipolar outputs.
Each of the four independent outputs can sink up to 700 mA in the ON
state. The outputs have a minimum breakdown voltage of 60 V and a
sustaining voltage of 35 V. The inputs are compatible with most TTL,
DTL, LSTTL, and 5 V CMOS and PMOS logic systems.
Over-current protection has been designed into each channel of the
UDN/UDQ2543B and typically occurs at 1 A. It protects anyone
channel from output short circuits with supply voltages up to 25 V.
When the maximum output current is reached, that output stage is
driven linearly. If the over-current condition continues, that output's
thermal limiting will operate, limiting that output's power dissipation.
The outputs also include transient suppression diodes for use with
inductive loads such as relays, solenoids, or dc stepping motors.
Both' devices are supplied in a 16-pin power DIP of batwing construction to provide for maximum package power dissipation. They are
rated for continuous operation over the temperature range of -20°C to
+85°C (UDN2543B) or for use in automotive applications over an
extended temperature range as the UDQ2543B.

FEATURES
• 700 mA Output Current per Channel
• Output Voltage to 60 V
• Low Output-Saturation Voltage
• Integral Output TranSient-Suppression Diodes
• TTL, CMOS, PMOS, NMOS Compatible Inputs
• Independent Over-Current Protection for Each Output

ABSOLUTE MAXIMUM RATINGS
at TA =25°C
Output Voltage, VOUT' . . . . . . . . . . . .. 60 V
Over-Current Protected Output Voltage,
VOUT ....................... 25V
Output Current, lOUT' ............ 1.0 A*
Supply Voltage, Vcc .............. 7.0 V
Input Voltage, V IN or VEN . . • . • • . . • . • 18 V
Package Power Dissipation,
PD' . . . . . . . . . . . . . . . . . .. See Graph
Operating Temperature Range, TA
(UDN2543B) ......... -20°C to +85°C
(UDQ2S43B) ......... -40°C to +85°C
Storage Temperature Range,
Ts ............... -55°C to +150°C
'Outputs are peak current limited at approximately
1.0 A per driver. See Circuit Description and
Applications for further information.

Always order by complete part number:
Part Number

Operating Temperature

UDN25438

-20°C to +85°C

UDQ25438

-40°C to +85°C
3-21

FUNCTIONAL BLOCK DIAGRAM
(1 OF 4 CHANNELS)

K

Vee
ENABLE

«1Q

Dwg. No. 0-1005

rn

~

5,---.----.----.---.....-----,

z

Z 41-----\----\----\--

o

~

gj

is

31-----\----\----\---Hr---l

II:

~ 21----t-

w

";2

o
: 11----t----t----~~-t---+;
w

....I

'"~

9
:i

O,--__'-__'-__'-__
25

50

75

100

'-_~

150

TEMPERATURE IN °C
Dwg. No. GP-Ol0B

3-22

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee

= 4.75 V to 5.25 V
Limits

Characteristic

Output Leakage Current

Output Sustaining Voltage
Output Saturation Voltage

Input Voltage

Input Current

Total Supply Current

Symbol

Min.

Max.

Units

-

100

\lA

100

\lA

= VEN = 0.8 V
lOUT = 100 mA, VIN = VEN = 2.0 V
lOUT = 400 mA, VIN = VEN = 2.0 V
lOUT = 700 mA, VIN = VEN = 2.0 V

35

-

-

200

mV

-

400

mV

-

600

mV

Logic 1

VIN (1) or VEN (1)

2.0

-

Logic 0

V IN(D) or VEN (0)

-

0.8

V

Logic 1

VIN (1) or VEN(1)

= 2.0 V

-

20

\lA

Logic 0

VIN(D) or VEN(D) = 0.8 V

-

-10

\lA

= 2.0 V

-

65

mA

= 0.8 V, VEN = 2.0 V

-

15

mA

IcEX

VOUT(SUS)
VOUT(SAT)

Icc

Test Conditions

= 60 V,
VOUT = 60 V,

VOUT

= 0.8 V, VEN = 2.0 V
VIN = 2.0 V, VEN = 0.8 V
VIN

lOUT = 100 mA, VIN

lOUT

= 700 mA, VIN '

Outputs Open, VIN '
Clamp Diode Forward Voltage

Clamp Diode
Leakage Current

VF

IR

= VEN

V

V

= 1.0 A

-

1.6

V

IF = 1.5 A

-

2.0

V

-

50

\lA

IF

VR = 60 V, VIN

= VEN = 2.0 V,

D1 + D2 or D3 + D4

• All inputs simultaneously, all other tests are performed with each input tested separately.

3-23

TYPICAL OUTPUT HERAVIOR

INOT TO SCALE I
!zw
a:
a:

~

(.)

~o

---"~"'I
CURRENT LIMIT

NORMAL LOAD

I

TIME
Dwg. No. WP-013

CIRCUIT DESCRIPTION AND APPLICATION
INCANDESCENT LAMP DRIVER
High incandescent lamp turn-ON/in-rush currents can destroy
semiconductor lamp drivers and contribute to poor lamp reliability.
However, lamps with steady-state current ratings up to 500 mA can be
driven with the UDN/UDQ2543B without the need for warming or
current-limiting resistors.
When an incandescent lamp is initially turned ON, the cold filament
is at minimum resistance and would normally allow a 10x to 12x in-rush
current. With the UDN/UDQ2543B, during turn-ON, the high in-rush
current is sensed by the internal low-value sense resistor. Drive current
to the output stage is then diverted by the shunting transistor and the
load current is momentarily limited to approximately 1.0 A. During this
transition period, the output stage is driven in a linear fashion. During
lamp warmup, the filament resistance increases to its maximum value,
the output stage goes into saturation and applies full supply voltage to
the lamp.

INDUCTIVE LOAD DRIVER
Bifilar (unipolar) stepper motors, relays, or solenoids can be driven
directly. The internal flyback diodes prevent damage to the output
transistors by suppressing the high-voltage spikes which occur when
turning OFF an inductive load.
FAULT CONDITIONS
In the event of a shorted load, the load current will attempt to
increase. As described above, the drive current to the affected output
stage is diverted, causing the output stage to go linear, limiting the peak
output current to approximately 1 A. As the power dissipation of that
output stage increases, a thermal gradient sensing circuit will become
operational, further decreasing the drive current to the affected output
stage and reduCing the output current to a value dependent on supply
voltage and load resistance. If the fault condition is corrected, the
output stage will return to its normal saturated condition.
Due to the independent operation of the four channels, only a
single channel should be shorted at a time. Multiple overload conditions may be tolerated provided rated package power dissipation is not
exceeded.

3-24

QUAD DARLINGTON
POWER DRIVER

OUT4

IN4

K

OUT3

IN3
ENABLE

GROUND

GROUND

GROUND

GROUND

OUT 2

Vee

K

IN2

OUT l

Dwg. No. PP-017

Combining logic gates and high-current bipolar outputs, the
UDN2544B quad Darlington power driver provides an interface
between low-level logic circuitry and high-power loads. Each of the
four outputs can sink up to 1.8 A in the ON state with peak inrush
currents to 2.5 A. The four power outputs are each comprised of an
open-collector Darlington driver and an internal flyback/clamp diode for
switching inductive loads. They feature a minimum breakdown and
sustaining voltage of 50 V. The logic inputs are compatible with TIL
and 5 V CMOS logic systems.
This device is particularly well-suited for unipolar stepper motor
drive applications. With complementary control inputs and an active-low
ENABLE, the UDN2544B makes it easy to implement full stepping of a
stepper motor with only two microcontroller/microprocessor control
lines. Other typical applications include relay or solenoid driving and
incandescent or LED lamp driving.
The UDN2544B is supplied in a 16-pin batwing power DIP. The
batwing construction provides for maximum package power dissipation
in a standard DIP construction. At 25°C, and with only 1 sq. in. of
copper foil at the ground tabs, the package is capable of safely dissipating 3.8 W.

FEATURES
•
•
•
•
•
•

1.8 A Continuous Output Current
Output Voltage to 50 V
Inputs Configured for Unipolar Stepper Motors
Active-Low Output Enable
TIL and 5 V CMOS Compatible Inputs
Integral Transient-Suppression Diodes

ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Output Voltage, VOUT .............. 50 V
Output Current, lOUT
(Peak) ...................... 2.5 A
(Continuous) ................. 1.8 A
Logic Supply Voltage, Vcc .......... 7.0 V
Input Voltage, VIN . . . • . . . . . • . . . . . . . 7.0 V
Package Power Dissipation,
PD .................... See Graph

Operating Temperature Range,
TA

•••••••.•••••••••

-20°C to +85 c C

Storage Temperature Range,
Ts ................ -55 c C to +150 c C
Always order by complete part number: IUDN2544BI
3-25

ELECTRICAL CHARACTERISTICS at T A

= +25°C, TJ ::; 150°C, Vee =4.75 V to 5.25 V.
Limits

Characteristic

Symbol

Output Leakage Current

ICEX

VOUT= 50 V

-

Output Sustaining Voltage

VCE(SUS)

lOUT = 1.8 A, L = 3.0 mH

Output Saturation Voltage

VCE(SAT)

Input Voltage

Input Current

Total Supply Current

Clamp Diode Forward Voltage

Clamp Diode Leakage Current

Test Conditions

Min.

Typ.

Max.

Units

<1.0

100

IlA

50

-

-

V

lOUT = 600 mA

-

0.9

1.0

V

lOUT = 1.0 A

-

1.0

1.2

V

lOUT = 1.8 A

-

1.3

1.6

V

Logic 1

V1N (1) or VEN (l)

2.4

-

-

V

Logic 0

V1N(O) or VEN(O)

-

-

0.8

V

Logic 1

V1N (1) or VEN (l) = 2.4 V

-

-

10

r.tA

Logic 0

V1N(O) or VEN(O) = 0.8 V

-

-

·100

IlA

Icc

All Outputs ON, Outputs Open

-

14

20

mA

All Outputs OFF

-

0.4

2.0

mA

IF = 1.0 A

-

1.3

1.6

V

IF = 1.8 A

-

1.6

2.0

V

VR = 50 V

-

< 1.0

100

Il A

VF

IR

Typical Data is for design information only

TRUTH TABLE
ENABLE

INl

OUT1

IN2

OUT2

IN3

U)

OUT3

IN4

OUT4

L

H
L

ON
OFF

H
L

OFF
ON

H
L

OFF
ON

H
L

ON
OFF

H

X

OFF

X

OFF

X

OFF

X

OFF

x = Don't care

5,----,----,----,---.,..,------,

~

z

Z 4f----+_--+_--+_-

o

~
illis

3f----+_--+_--+_--H.----I

Ie

w

~w 2f----t~

u

~ lr---t---t---~~-t--~
w

....I

ID

~
o~ o~--~--~--~-~~-~
25
50
75
100
150
TEMPERATURE IN·C
Dwg. No. GP-010B

3-26

TYPICAL APPLICATION
(UNIPOLAR STEPPER MOTOR WITH ZENER FLYBACK)
+28V
INPUT 314

L

Dwg. EP·01S

TRUTH TABLE
INPUTS

APPLICATIONS INFORMATION

WINDINGS

112

314

A

B

C

D

L
L
H
H

H
L
L
H

ON
OFF
OFF
ON

ON
ON
OFF
OFF

OFF
ON
ON
OFF

OFF
OFF
ON
ON

A typical application is shown driving a four-phase unipolar stepper
motor. Note that with the complimentary control inputs, only two logic
signals are needed to drive the motor in the two-phase format. The two
phase drive format illustrated, energizes two adjacent phases in each
detent position (AB, BC, CD, DA) to provide an improved torque-speed
product and greater detent torque.
A Zener diode can be used to increase the flyback voltage. The
increased flyback voltage gives a much faster inductive load turn-OFF
current decay resulting in improved motor performance. The maximum
Zener voltage, plus the load supply voltage, plus the flyback diode
forward voltage must not exceed the device's rated sustaining voltage.

OJ



With external control circuitry, the ENABLE input (active low) can
be used for chopper (PWM) applications. If the ENABLE input is not
used, it should be tied low.
All inputs will float high if open circuited.

veE (SAT)-"'---~

I CEX

Dwg. WP-001

3-27

PROTECTED
QUAD POWER DBlVERS
UDNlUDQ2547B
FAULT

1

IN1
IN2
ENABLE

GROUND

4

GROUND

GROUND

5

GROUND

OUT3

6

SUPPLY

CONNECTI~~

IN3

Providing interface between low-level signal processing circuits and
power loads, the UDN2547B and UDN2547EB quad power drivers
combine logic gates and high-current bipolar outputs with complete
output protection. Each of the four outputs will sink 600 mA in the ON
state. The outputs have a minimum breakdown voltage of 60 V and a
sustaining voltage of 40 V. The inputs are compatible with TTL and 5 V
CMOS logic systems and include internal pull-down resistors to ensure
that the outputs remain OFF if the inputs are open-circuited.
Over-current protection for each channel has been designed into
these devices and is activated at approximately 1.3 A. It protects each
output from short circuits with supply voltages up to 25 V. When a
maximum driver output current is reached, that output drive is reduced
linearly, maintaining a constant load current. If the over-current or short
circuit condition continues, each channel has an independent thermal
limit circuit which will sense the rise in junction temperature and turn
OFF the individual channel that is at fault. Foldback circuitry decreases
the output current if excessive voltage is present across the output and
assists in keeping the device within its SOA (safe operating area).

Dwg. No. PP-018

Each output also includes diagnostics for increased device protection. If any output is shorted or opened, the diagnostics can signal the
controlling circuitry through a common FAULT pin.

ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Output Voltage, VOUT' . . . . . . . . . . . .. 60 V
Over-Current Protected Output Voltage,
VOUT ........... ,' ........... 25V
Output Current, lOUT' ............. 1.3 A*
FAULT Output Voltage, VF . . . . . . . . . . 40 V
Supply Voltage, Vcc ............... 7.0 V
Input Voltage, Y'N or VEN . . . . . . . . . .. 7.0 V
Package Power Dissipation,
PD' .................... See Graph
Operating Temperature Range, TA
Prefix 'UDK' ........ -40°C to +125°C
Prefix 'u'DN' ......... -20°C to +85°C
Prefix 'UDQ' ......... -40°C to +85°C
Storage Temperature Range,
Ts ................ -55°C to +150°C
'Outputs are current limited at approximately
1.3 A per driver and junction temperature limited
if current in excess of 1.3 A is attempted.
See Circuit Description and Application for further
information.

3-28

The UDN2547B/EB can be used to drive various resistive loads
including incandescent lamps (without warming or limiting resistors).
With the addition of external output clamp diodes, the UDN2547B/EB
can be used to drive inductive loads such as relays, solenoids, or dc
stepping motors.
The UDN2547B is a 16-lead power DIP while the UDN2547EB is
a 28-lead power PLCC for surface-mount applications. Both packages
are of batwing construction to provide for maximum package power
dissipation. They are rated for continuous operation over the temperature range of -20°C to +85°C. Similar devices for use in automotive
applications, or over an extended temperature range, are available as
the UDQ2547B and UDK2547EB.

FEATURES
• 600 mA Output Current per Channel
• Independent Over-Current Protection for Each Driver
• Independent Thermal Protection for Each Driver
• Output Voltage to 60 V
• Output SOA Protection
• . Low Output-Saturation Voltage
• TIL and 5 V CMOS Compatible Inputs
• Diagnostic FAULT Output

Always order by complete part number, e.g., iUDN2547Bi

UDKlUDN2547EB

~

io

z

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•
•

•

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-L______k-____"

..

GROUND

25

50

75

100

TEMPERATURE IN

125

'c
Dwg. No. GP-010B

•
•

•

•
•

•
GROUND

GROUND

Z

M

~

0

M
z

a

z

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5
o

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a.
00

Ul

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Dwg. No. PP-019

FUNCTIONAL BLOCK DIAGRAM

DW9. No. FP-007

3-29

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = 4.75 V to 5.5 V
Characteristic

Symbol

Output Leakage Current

lOUT

-

Test Conditions

Min.

Limits
Typ.
Max.

Units

30

100

~A

VOUT = 60 V, V1N = 2.0 V, VEN ='0.8 V

-

30

100

~A

-

-

V

-

300

mV

400

mV

550

mV

VOUT = 60 V, V1N = 0.8 V, VEN = 2.0 V

Output Sustaining Voltage

VOUT!SUS)

lOUT = 100 rnA, V1N = 0.8 V, Vcc= Open

40

Output Saturation Voltage

VOUT(SAn

lOUT = 400 rnA
lOUT = 500 rnA

-

lOUT = 600 rnA

-

-

Over-Current Limit

lOUT

5 ms PulseTest, VOUT = 5.0 V

-

1.3

1.7

A

Input Voltage

Logic 1

V1N(1) or VEN (1)

2.0

-

-

V

Logic 0

V1N(O) or VEN(O)

-

-

0.8

V

Logic 1

V1N(1) or VEN(1) = 2.0Y

-

-

60

~A

Logic 0

V1N(O) or VEN(O) = 0.8 V

10

-

-

~A

IF

VF = 40 V

-

<1.0

2.0

~A

IF

VF=40 V, Driver Outputs Open,
V1N = 0.8 V, VEN = 2.0 V

40

60

80

~A

-

0.1

0.4

V

Input Current

Fault Output Leakage Current
Fault Output Current

Fault Output Saturation Voltage

VF(SAT)

IF= 30 ~A

Total Supply Current

Icc

All Outputs ON

-

45

50

rnA

All Outputs OFF

-

6.0

10

rnA

165

-

°C

-

15

-

°C

Thermal Shutdown

TJ

Thermal Hysteresis

T

J

Typical Data IS for design information only.

TRUTH TABLE
STATUS

IN~

ENABLE

OUTN

FAULT

Normal Load

H
L
X

H
H
L

L
H
H

H
H
H

Over-Current or
Short to Supply

H

H

R

L

Thermal Fault

H

H

H

L

Open Load or
Short to Ground

L

H

L

L

x = Don't care.
R

3-30

= Linear drive, current limited.

CIRCUIT DESCRIPTION AND APPLICATION

,

INOT TO SCALE I
z>-

w

a:
a:

:>

The UDN2547B or UDN2547EB monitors its outputs for open or
shorted conditions. Both conditions are sensed by comparing the input
and output states. Note that the FAULT output is operational only if the
ENABLE input is high. When a fault condition is sensed, the FAULT
output will go to a low state. An external FAULT output filter capacitor is
recommended to eliminate erroneous switching.

(,J

INCANDESCENT LAMP DRIVER

a.

:;

..:
...J

,

,

"

r-SHORTCIRCUIT--

'

CURRENT LIMIT
~~-

-

r--

t-

THERMAL SHUTDOWN
THERMAL HYSTERESIS

TIME

Dwg. WP-005A

High incandescent lamp turn-ON/in-rush currents can contribute
to poor lamp reliability and destroy semiconductor lamp drivers.
Warming or current-limiting resistors protect both driver and lamp but
use significant power either when the lamp is OFF or when the lamp is
ON, respectively. Lamps with steady-state current ratings up to 600 mA
can be driven by the UDN2547B/EB without the need for warming or
current-limiting resistors.
When an incandescent lamp is initially turned ON, the cold filament
is at minimum resistance and would normally allow a 1Ox to 12x in-rush
current. With the UDN2547B/EB drivers, during turn-ON, the high in-rush
current is sensed by the internal low-value sense resistor, drive current
to the output stage is diverted by the shunting transistor, and the load
current is limited to approximately 1.3 A. During this short transition
period, the ouput driver is driven in a linear fashion. During lamp warmup,
the filament resistance increases to its maximum value, the output driver
goes into saturation and applies maximum rated voltage to the lamp.
INDUCTIVE LOAD DRIVER

With the addition of external clamp diodes, bifilar (unipolar) stepper motors and other inductive loads can be driven directly. The external
diodes prevent damage to the output transistors by suppressing the highvoltage spikes which occur when turning OFF an inductive load.
OVER-CURRENT CONDITIONS

In the event of a shorted load, or stalled motor, the load current will
attempt to increase. As described above, the drive current to the affected
output stage is linearly reduced (limiting the load current to about 1.3 A),
causing the output stage to go linear. As the junction temperature of the
output stage increases, the thermal shutdown circuit will shut OFF the
affected output. If the fault condition is corrected, the output driver will
return to its normal saturated condition.

3-31

PROTECTED
QUAD POWER DRIVERS
Providing improved output current limiting, the UDN2549B and
UDN2549EB quad power drivers combine NAND logic gates and highcurrent bipolar outputs with complete output protection. Each of the
four outputs will sink 600 mA in the ON state. The outputs have a
minimum breakdown voltage of 60 V and a sustaining voltage of 40 V.
The inputs are compatible with TTL and 5 V CMOS logic systems.

UDN2549B

OUT4
K

OUT3
GROUND

GROUND

GROUND

GROUND

OUTZ
K

Vee
INz

OUTl

Dwg. No. A-11 ,561A

Over-current protection for each channel has been designed into
these devices and is activated at approximately 1 A. It protects each
output from short circuits with supply voltages up to 25 V. When an
output current trip point is reached, that output stage is driven linearly
resulting in a reduced output current level. If an over-current or short
circuit condition continues, the thermal limiting circuits will first sense
the rise in junction temperature and then the rise in chip temperature,
further decreasing the output current. Under worst-case conditions, the
UDN2549B/EB will tolerate short-circuits on all outputs, simultaneously.
These devices can be used to drive various loads including incandescent lamps (without warming or limiting resistors) or inductive loads
such as relays, solenoids, or dc stepping motors.
The UDN2549B is a 16-pin power DIP while the UDN2549EB is a
28-lead power PLCC for surface-mount applications. Both packages
are of batwing construction to provide for maximum package power
dissipation. They are rated for continuous operation over the temperature range of -20°C to +85°C. Similar devices for use in automotive
applications, or over an extended temperature range, are available as
the UDK or UD02549B and UDK or UD02549EB.

FEATURES
ABSOLUTE MAXIMUM RATINGS
at TA =25°C
Output Voltage, VOUT' ........... " 60 V
Over-Current Protected Output Voltage,
VOUT ....................... 25V
Output Current, lOUT' ............ 1.0 A*
Supply Voltage, Vee .............. 7.0 V
Input Voltage, V1N or VEN' . • . . . . • . . 7.0 V
Package Power Dissipation,
PD' ................... See Graph
Operating Temperature Range, TA
Prefix 'UDK' ......... -40°C to +125°C
Prefix 'UDN'. . ....... -20°C to +85°C
Prefix 'UDQ'. . ....... -40°C to +85°C
Storage Temperature Range,
Ts ............... -55°C to +150°C

•
•
•
•
•
•
•
•

600 mA Output Current per Channel
Independent Over-Current Protection for Each Driver
Thermal Protection for Device and Each Driver
Output Voltage to 60 V
Low Output-Saturation Voltage
Integral Output Flyback Diodes
TTL and 5 V CMOS Compatible Inputs
Pin-Compatible With UDN2543B/EB

Always order by complete part number:
Part Number

'Outputs are peak current limited at approximately
1.0 A per driver. See Circuit Description and
Applications for further information.

3-32

Package

UDN2549B

16-Pin DIP

UDN2549EB

2a-Lead PLCC

FUNCTIONAL BLOCK DIAGRAM
(1 of 4 Channels)

K

Dwg. No.

D~ 1005

UDN2549EB
z

0

>=

()

w

~
::J
0

Z
Z

,.:-

00

::J

'"

0

Z()

i;

If)

N

;.:

S
3:
GROUND

GROUND

•
•
•
•

•
0

•
•
•

•

~
Z

0

~

0-

iii

If)

is
II:

w

3:
0

0W

Cl


oj

~o

T J '" 165°C

>

0-

:::>

JujTION

i!::::>

INCANDESCENT LAMP DRIVER
High incandescent lamp turn-ON/in-rush currents can contribute to
poor lamp reliability and destroy semiconductor lamp drivers. Warming
or current-limiting resistors protect both driver and lamp but use significant power either when thFJ lamp is OFF or when the lamp is ON,
respectively. Lamps with steady-state current ratings up to 600 mA can
be driven by the UDN2549B/EB without the need for warming or
current-limiting resistors.

TEMP. LIMIT

o

THERMAL
GRADIENT
SENSING
VOUT(SAT)

OUTPUT CURRENT, lOUT
Dwg. GP-013

TYPICAL OUTPUT HEHAVIOR

NORMAL LAMP IN-RUSH CURRENT

INOT TO SCALE I

!zw

INDUCTIVE LOAD DRIVER
Bifilar (unipolar) stepper motors, relays, or solenoids can be driven
directly. The internal fly back diodes prevent damage to the output
transistors by suppressing the high-voltage spikes which occur when
turning OFF an inductive load.
FAULT CONDITIONS
In the event of a shorted load, the load current will attempt to
increase. As described above, the drive current to the affected output
stage is reduced, causing the output stage to go linear, limiting the peak
output current to approximately 1 A. As the power dissipation of that
output stage increases, a thermal gradient sensing circuit will become
operational, further decreasing the drive current to the affected output
stage and reducing the output current to a value dependent on supply
voltage and load resistance.
Continuous or multiple overload conditions causing the chip temperature to reach approximately 165°C will result in an additional
reduction in output current to maintain a safe level.

II:
II:
:l

o

D..

~

\
\

LTHERMAL GRADIENT SENSING
CURRENT LIMIT

If the fault condition is corrected, the output stage will return to its
normal saturated condition.

R'~~'~_~
--~~--------------~

TIME
Dwg. WP-008

3-35

8-CHANNEL SOURCE DRIVERS
UDN2580/85LW

aT

~

UDN2580/85A

This versatile family of integrated circuits will work with many
combinations of logic- and load-voltage levels, meeting interface
requirements beyond the capabilities of standard logic buffers_ Series
UDN2580AlLW source drivers can drive incandescent, LED, or vacuum
fluorescent displays. Internal transient-suppression diodes permit the
drivers to be used with inductive loads such as relays, solenoids, dc
and. stepping motors, and magnetic print hammers.
The Type UDN2580A and UDN2580LW are high-current source
drivers used to switch the ground ends of loads that are directly connected to a -50 V supply. Typical loads are telephone relays, PIN
diodes, and LEOs.
The UDN2585A and UDN2585LW are drivers designed for
applications requiring low output saturation voltages. Typical loads are
low-voltage LEOs and incandescent displays. The eight non-Darlington,
25 V outputs will simultaneously sustain continuous load currents of
-120 mA at ambient temperatures to +70°C.
The UDN2588A has separate logic and driver supply lines. Its eight
drivers can serve as an interface between positive logic (TTL, CMOS,
PMOS) or negative logic (NMOS) and either negative or split-load
supplies to -45 V. Selected devices (UDN2588A-1) may be operated
to -65 V.
These drivers are packaged in plastic DIPs (suffix A) or surfacemountable wide-body SOICs (suffix LW), and are rated for operation
over the temperature range of -20°C to +85°C.

FEATURES
Dwg. No. A-11 ,359

Note that the UDN2580/85A (dual in-line packages) and UDN2580/85LW (small-outline Ie
packages) are electrically identical and share a
common pin number assignment.

•
•
•
•

TTL, CMOS, PMOS, NMOS Compatible
High Output Current Rating
Internal Transient Suppression
Efficient Input/Output Structure

Always order by complete part number, e.g., 1UDN2580A I.
3-36

ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature for anyone driver (unless otherwise noted)
UDN2580A/LW

UDN2585A/LW

UDN2588A

UDN2588A-1

Output Voltage, VCE

50 V

25 V

50 V

80 V

Supply Voltage, Vs (ref. sub.)

50 V

25 V

50 V

80 V

50 V

80 V

Supply Voltage, Vcc (ref. sub.)
Input Voltage, V1N (ref. Vs)
Total Output Current, (lc + Is)
Substrate Current ISUB

-

-

-30 V

-20 V

-30 V

-30 V

-500 mA

-250 mA

-500 mA

-500 mA

3.0A

2.0A

3.0A

3.0A

Package Power Dissipation, Po (single output) ................................................................. 1.0 W
(total package) ............................................................ See Graph
Operating Temperature Range, TA ................................................................... -20°C to +85°C
Storage Temperature Range, Ts .................................................................... -55°C to +150°C

~

2.5.-----..,---......,.---,----r---~

~

z

o

~D-

iii
Ul

C
a:
w

~D-

w

1.0

C)

;::i

~

0.51----+---+--

....w
III
....~
....
oct

--+-"".....---"~----I

o~--~--~--~----'--~

25

50

75

100

125

150

AMBIENT TEMPERATURE IN °C

Dwg. No. GP-01BA

3-37

For simplification, these devices are characterized on the following
pages with specific voltages for inputs, logic supply (Vs)' load supply (VEE)'
and collector supply (V c). Typical use of·the UDN2580AlLW·is with negative (eferenced logic. The more common application of the UDN2585A1LW,
UDN2588A, and UDN2588A-1 is with positive referenced logic supplies. In
application, the devices are capable of operation over a wide range of logic
and supply voltage levels:

TYPICAL OPERATING VOLTAGES
Device Type

Vs

V1N(ON)

V1N(OFF)

vee

VEE(MAX)

OV

-15 V 10 -3.6 V

-0.5 Vlo 0 V

NA

-25 V

UDN2585A1LW

-50 V

UDN2580AlLW

+5 V

o Vlo +1.4 V

+4.5 Vto +5 V

NA

-20 V

UDN2585A1LW

-45 V

UDN2580AlLW

-45 V

UDN2588A

-75 V

UDN2588A-1

-13V

UDN2585A1LW

5V

+12 V

o V to +8.4 V

+ 11.5 V to + 12 V

NA

12 V

+15 V

OVto+11.4V

+ 14.5 V to + 15 V

NA

15 V

NOTE: The substrate must be tied to the most negative point
in the external circuit to maintain isolation between drivers
and to provide for normal circuit operation.

3-38

-38 V

UDN2580AlLW

-38 V

UDN2588A

-68 V

UDN2588A-1

-10V

UDN2585A1LW

-35 V

UDN2580AlLW

-35 V

UDN2588A

-65 V

UDN2588A-1

UDN2580A and UDN2580LW
ELECTRICAL CHARACTERISTICS at TA = +25°C, V s = 0 v, VEE = -45 V (unless otherwise noted).
Limits
Characteristic

Symbol

Output Leakage
Current

ICEX

Test Conditions

Min.

Max.

Units

V,N = -0.5 V, VOUT= VEE = -50 V

-

50

IJA

V,N = -0.4 V, VOUT= VEE = -50 V, TA = 70 DC

-

100

IJA

35

-

V

1.8

V

Output Sustaining
Voltage

VCE(SUS)

V,N = -0.4 V, lOUT = -25 mA, Note 1

Output Saturation

VCE(SAT)

V,N = -2.4 V, lOUT = -1 00 mA

-

V,N = -3.0 V, lOUT = -225 mA

-

1.9

V

V,N = -3.6 V, lOUT = -350 mA

-

2.0

V

V,N = -3.6 V, lOUT = -350 mA

-

-500

IJA

V,N = -15 V,I OUT = -350 mA

-

-2.1

mA

I'N(OFF)

lOUT = -500 IJA, TA= 70 D C, Note 3

-50

-

IJA

V'N(ON)

IOUT=-100 mA, VCE 1.8 V, Note 4

-

-2.4

V

lOUT = -225 mA, VCE 1.9 V, Note 4

-

-3.0

V

lOUT =-350 mA, VCE 2.0V, Note 4

-

-3.6

V

-

V

Input Current

Input Voltage

I'N(ON)

V'N(OFF)

-0.2

lOUT = -500 IJA, TA = 70 DC

Clamp Diode
Leakage Current

IR

VR= 50V, TA = 70 DC

-

50

IJA

Clamp Diode
Forward Voltage

VF

IF=350 mA

-

2.0

V

Input Capacitance

C'N

Turn-On Delay

tpHL

Turn-Off Delay

tpLH

-

25

pF

0.5 E'N to 0.5 EOUT

-

5.0

IJs

0.5 E'N to 0.5 EOUT

-

5.0

IJs

PARTIAL SCHEMATIC

NOTES: 1. Pulsed test, tp 300 ~s, duty cycle 2%.
2. Negative current is defined as coming out of
the specified device pin.
3. The I'N(OFF) current limit guarantees against
partial turn·on of the output.
4. The V'N(ON) voltage limit guarantees a
minimum output source current per the
specified conditions.
5. The substrate must always be tied to the most
negative point and must be at least 4.0 V
below Vs'

7.1K

10K

L-----+--oOUT

SUB

Dwg. No. A·11 ,358

Dwg. No. A·11,359

3-39

UDN2585AAND UDN2585LW
ELECTRICAL CHARACTERISTICS atTA = +25°C, Vs = OV, VEE = -20V(unlessotherwisenoted)
Limits
Characteristic

Symbol

Output Leakage
Current

ICEX

Test Conditions

Min.

Max.

Units

VIN =-0.5 V. VOUT= VEE = -25 V

-

50

VIN = -0.4 V, VOUT= VEE =-25 V, TA = 70°C

-

100

JlA
JlA

Output Sustaining
Voltage

VCE(SUS)

VIN = -0.4 V, lOUT = -25 mA, Note 1

15

-

V

Output Saturation
Voltage

VCE(SAT)

VIN = ·4.6 V, lOUT = -60 mA

1.1

V

VIN =-4.6 V, IOUT=-120 mA

-

1.2

V

VIN = -4.6 V, lOUT = -120 mA

-

-1.6

mA

VIN = -14.6 V, lOUT =-120 mA

-

-5.0

mA

IOUT= -120 mA, VCE :<;;1.2 V, Note 3

-4.6

V

IOUT=-100 IlA, TA = 70°C

-0.4

-

V

Input Current

Input Voltage

IIN(ON)

VIN(ON)
VIN(OFF)

Clamp Diode
Leakage Current

IA

VA =25 V, TA = 70°C

-

50

JlA

Clamp Diode
Forward Voltage

VF

IF =120mA

-

2.0

V

Input Capacitance

CIN

25

pF

5.0

IlS

5.0

Ils

Turn-On Delay

tpHL

0.5 EIN to 0.5 EOUT

-

Turn-Off Delay

tpLH

0.5 EIN to 0.5 EOUT

-

NOTES: 1. Pulsed test, tp'; 300 ~s, duty cycle,; 2%.
2. Negative current is defined as coming out of the specified device pin.
3. The VIN(ON) voltage limit guarantees a minimum output source current per the specified conditions.
4. The substrate must always be tied to the most negative point and must be at least 4.0 V below Vs'

PARTIAL SCHEMATIC
+VS

UK

IN o-~N'-_--I
4.8K

L---+--oOUT

SUB

Dwg. No. A-11,360

Dwg. No. A-11 ,359

3-40

UDN2588A AND UDN2588A-I
ELECTRICAL CHARACTERISTICS at T A = +25°C, V s = 5.0 V, Vee = 5.0 V, VEE = -40 V
(unless otherwise noted).
Characteristic

Symbol

Applicable
Devices

Output Leakage
Current

ICEX

UDN2588A

UDN2588A·1

Test Conditions

Min.

VCE(SUS)

Output Saturation
Voltage

VCE(SAr)

Input Current

Input Voltage

UDN2588A
UDN2588A-1

IIN(ON)

Both

Both

Units

VIN 2:4.5 V, Vour = VEE =·45V

-

50

VIN 2:4.6 V, Vour=VEE=·45V, TA = 70 D C

-

100
50

VIN 2:4.6V, Vour = VEE =·75V, TA = 70 C

-

100

VIN 2:4.6V, lour=·25 rnA, Note 1

35

-

V

VIN 2:4.6V, VEE =-70V, lour=-25 rnA, Note 1

50

-

V

VIN =2.6V, lour=-100rnA, Ref. Vcc

-

1.8

V

VIN =2.0V, lour=-225 rnA, Ref. Vcc

-

1.9

V

VIN 2:4.5 V, Vour=VEE=·75V
D

Output Sustaining
Voltage

Limits
Max.

!lA
!lA
!lA
!lA

VIN = 1.4 V, lour = -350 rnA, Ref. Vcc

-

2.0

V

VIN = 1.4 V, lour = -350 rnA

-500

!lA

Vs = 15 V, VEE =-30V, VIN =OV, lour=-350rnA

-

-2.1

rnA

IIN(OFFI

Both

lour=-500I-1A, TA = 70 D C, Note 3

-50

-

!lA

VIN(ON)

Both

lour=-100rnA, VcE :S:1.8V, Note 4

-

2.6

V

lour=-225 rnA, VcE :S:1.9V, Note 4

-

2.0

V

lour = -350 rnA, VCE :S:2.0 V, Note 4

-

1.4

V

lour = -500 !lA, TA= 70 C

4.8

-

V

VIN(OFF)

Both

ClarnpDiode
Leakage Current

IR

UDN2588A

VR=50V, TA = 70 C

-

50

UDN2588A-1

VR=80V, TA = 70 D C

-

50

!lA
!lA

ClarnpDiode
Forward Voltage

VF

Both

IF =350rnA

-

2.0

V

Input Capacitance

CIN

Both

-

25

pF

Turn-On Delay
Turn-Off Delay

"'HL
"'LH

D

D

Both

0.5 EIN to 0.5 Eour

-

5.0

1-15

Both

0.5 EIN to 0.5 Eour

-

5.0

I-1s

NOTES: 1. Pulsed test, tp ,;;300 I1s, duty cycle,;; 2%.
2. Negative current is defined as coming out of
the specified device pin.
3. The IIN(OFF) current limit guarantees against
partial turn·on of the output.
4. The VIN(ON) voltage limit guarantees a
minimum output source current per the
specified conditions.
5. The substrate must always be tied to the most
negative point and must be at least 4.0 V
below VS.
6. Vcc must be less positive than VS.

PARTIAL SCHEMATIC

3K

'------+_OU1
SUB
Dwg. No. A·11,361

Dwg. No. A-11,357

3-41

ALLOWABLE PEAK COLLECTOR CURRENT
AT 50°C AS A FUNCTION OF DUTY CYCLE
50 0

45 0

0

o RECOMMENDED

MAXIMUM OUTPUT CURRENT

\' ~\ \
\~"."
,,~

0

0

0

NUMBER OF OUTPUTS....
CONDUCTING
SIMULTANEOUSLY

VS = 15V
UDN-258OA
UDN-2588A

°H

....

~

'I'..

,'"'-

~ .....

~
.......

~ ....
............

.......

"""'-

r--.....
::::-- ::::::
...........

r=::

I

I

D-

0

10

20

lO
I

40
50
60
PER CENT DUTY CYCLE

70

80

90

100

Dwg. No. A-II.I07B

ALLOWABLE PEAK COLLECTOR CURRENT
AT 70°C AS A FUNCTION OF DUTY CYCLE
500

450

u 400

...f;!
c 350
1

RECOMMENDED MAXIMUM OUTPUT CURRENT

"- !"'~
"
~~

\ ~\ \

I"

~

!E

300

lI!

!!I
u
~

250

0200
u

~

i

~

100

50

0

3"'0....

I'....
~ ~ ~ r--.... ~~ ........
~ ~ t:'- t' i"'-...
.....
~ ~ t:::::
.............
~

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY

a. 150

<

.........

J

Vs = 15V
UDN-258OA
UDN-2588A

10

20

I
30

60
40
50
PER CENT DUTY CYCLE

70

80

90

100

Dwg. No. A-11,10BB

3-42

TYPICAL APPLICATIONS
UDN25SOA

-28 V

~IGIT

VEE

SELECT
Dwg. No. B-1458A

COMMON-CATHODE LED DRIVER

Dwg. No. A-11,356

TELECOMMUNICATIONS
RELAY DRIVER
(Negative Logic)

UON2588A-l

UON2588A

SEGMENT
SELECT

111

01 GI T
SELECT

-48V
VEE
Dwg. No. A-11 ,362

Dwg. No. A-l1,363

TELECOMMUNICATIONS RELAY DRIVER

VACUUM-FLUORESCENT DISPLAY DRIVER

(Positive Logic)

(Split Supply)

3-43

8-CHANNEL
SATURATED SINK DRIVERS
UDN2595LW

ot-$

~

UDN2595A

Developed for use with low-voltage LED and incandescent
displays requiring low output saturation voltage, the UDN2595A and
UDN2595LW meet many interface needs, including those exceeding
the capabilities of standard logic buffers. The eight non-Darlington
outputs of each driver can continuously and simultaneously sink load
currents of 100 mA at ambient temperatures of up to +75°C.
The eight-channel driver's active-low inputs can be driven directly
from TTL, Schottky TTL, DTL, 5 to 16 V CMOS, and NMOS logic. All
input connections are on one side of the package, output connections
on the other, for simplified printed wiring board layouts.
These drivers are packaged in plastic DIPs (suffix A) or surfacemountable wide-body SOICs (suffix LW), and are rated for operation
over the temperature range of -20°C to +85°C.

FEATURES
•
•
•

Dwg. No. A-11 ,407

•
•
•
•

Non-Inverting Function
(Input Low = Output ON)
200 mA Current Rating
100 mA Continuous and Simultaneous
(All outputs) to +85°C
.
Low Saturation Voltage
TTL, CMOS, NMOS Compatible
Efficient Input/Output Pin Format
DIP or SOIC Packaging

ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
for an" one driver
(unless otherwise noted)

Output Voltage, VCE" • . . . • . . . • • • • . . . 20 V
Supply Voltage, Vs . . . . . . . . . . . . . . .. 20 V
Input Voltage, V1N . . . • . • . • . . . • . • . .• 20 V
Output Current, Ic ............... 200 rnA
Ground Terminal Current, IGND . • . . . . . 1.6 A
Package Power Dissipation,
PD' ................... See Graph
Operating Temperature Range,
TA . . . • . . . • . . . . . . . .. -20°C to +85°C
Storage Temperature Range,
Ts .................-55°C to +150°C
Note that the UDN2595A (dual in-line package)
and UDN2595LW (small-outline Ie package) are
electrically identical and share a common pin
number assignment.

3-44

Always order by complete part number:
Part Number

Package

UDN2595A

18-Pin DIP

UDN2595LW

18-Lead Wide-Body

sOle

ELECTRICAL CHARACTERISTICS at TA

= +25°C, Vs =5.0 V (unless otherwise noted).
Limits

Characteristic

Symbol

Output Leakage
Current

IcEX

Test Conditions

Input Current

VCE(SAT)

I'N(ON)

Input Voltage

= 20 V, TA = 25°C
V OUT = 20 V, TA = 70°C

Y'N 4.5 V, V OUT
Y'N 4.6 V,

Output Saturation
Voltage

Min.

= 0.4 V,
Y'N = 0.4 V,
Y'N = 0.4 V,
Y'N = 0.4 V,

Y'N

= 50 mA
lOUT = 100 mA
lOUT = 100 mA
lOUT = 100 mA, Vs = 15 V

lOUT

= 100 mA, VOUT

0.6 V

V'N(ON)

lOUT

V'N(OFF)

lOUT = 100 ).lA, TA = 70°C

Input Capacitance

C'N

Supply Current

Is

Y'N
Y'N

= 0.4 V,
= 0.4 V,

lOUT
lOUT

= 100 mA
= 100 mA, Vs = 15 V

Max.

Units

-

50

).lA

-

100

).lA

-

0.5

V

-

0.6

V

-

-1.6

mA

-

-5.0

mA
V

-

0.4

4.6

-

-

25

-

6.0

mA

-

20

mA

V
pF

NOTES: 1. Negative current is defined as coming out of the specified device pin.
2. The V,NtON) voltage limit guarantees a minimum output sink current per the specified conditions.
3. Is is measured with anyone of eight drivers turned ON.

ONE OF EIGHT DRIVERS

U>

2.5

~

:;:
""
~

Vs

z

0

;:::

""

a.
iii
U>

Ci

a:
w

:;:

IN

0

~---o OUT

a.
w

CJ

"""
""

u
a.
w
...J

Ol

:;:
""
0

...J
...J

Dwg. No. A-11 ,408

""

50

75

125

100

150

AMBIENT TEMPERATURE IN 'c
Dwg. No. GP-018A

3-45

8-CHANNEL
SATURATED SINK DRIVERS

Vee

IN,
IN,
OUT,
OUT,
OUT6
OUT 5
IN6

Low output saturation voltages at high load currents are provided by
UDN2596A and UDN2597A sink driver ICs. These devices can be used
as interface buffers between standard low-power digital logic (particularly
MOS) and high-power loads such as relays, solenoids, stepping motors,
and LED or incandescent displays. The eight saturated sink drivers in
each device feature high-voltage, high-current open-collector outputs.
Transient suppression clamp diodes and a minimum 35 V output sustaining voltage allow their use with many inductive loads.
The saturated (non-Darlington) NPN outputs provide low collectoremitter voltage drops as well as improved turn-off times due to an active
pull-down function within the output predrive section. The UDN2596A is
for use with output loads to 500 mA while the UDN2597 A is for use with
loads to 1 A. Adjacent outputs may be paralleled for higher load currents.
Inputs require very low input current and are activated by a low logic
level consistent with the much greater sinking capability associated with
NMOS, CMOS, and TTL logic. The UDN2596A and UDN2597A are rated
for use with 5 V logic levels.

GND

Both devices are furnished in 20-pin DIP packages with copper
leadframes for improved thermal characteristics. The UDN2596A is also
available for operation between -40°C and +85°C. To order, change the
prefix from 'UDN' to 'UDQ'.

VK

Dwg. No. W-100

FEATURES
• Non-Inverting Function
• Low Output ON Voltages
• Up to 1.0 A Sink Capability
.50 V Min. Output Breakdown
• Output Transient-Suppression Diodes
• Output Pull-Down for Fast Turn-Off
• TTL, CMOS Compatible Inputs

ABSOLUTE MAXIMUM RATINGS
at TA = + 25°C

ONE OF EIGHT DRIVERS

OutputVoltage,vCE . • • . • • . . . • • • • • • . 50 V
Output Current, lOUT
(UDN2596A) ............... 500 mA
(UDN2597A) ................. 1.0 A

Supply Voltage, Vcc' .............. 7.0 V
Input Voltage, V1N •.••••..•.•..•..• 7.0 V
Package Power Dissipation,
Po ....................... 2.27 W*
Operating Temperature Range,
TA . . . . . . . . . • • • . • . . -20°C to + 85°C
Storage Temperature Range,
Ts ............... -65°C to +150'C
'Derate at the rate of 18.2 mW/'C above TA= 25'C
Dwg. No. W-l01

3-46

ELECTRICAL CHARACTERISTICS at TA = + 25°C, Vee = 5.0 V

Characteristics

Symbol

Output Leakage Current
Output Sustaining Voltage

Output Saturation Voltage

Applicable
Devices

VCEISAT)

Test Conditions

Max.

Units

-

10

IJA

35

-

V

35

-

V

lOUT = 300 mA

-

0.5

V

lOUT = 750 mA

-

1.0

V

VR = 50 V

-

10

IJA

Both

VOUT = 50 V. VIN = 2.4 V

UDN2596A

lOUT = 300 mA, L = 2 mH

UDN2597A

lOUT = 750 mA, L = 2 mH

UDN2596A
UDN2597A

ICEX
VCElsus)

Limits
Min.

Clamp Diode Leakage Current

IR

Both

Clamp Diode Forward Voltage

VF

UDN2596A

IF = 300 mA

-

1.8

V

UDN2597A

IF = 750 mA

-

1.8

V

Both

VIN = 0.8 V

-

-15

IJA

Logic Input Current

IINIO)

Both

VIN = 2.4 V

-

10

IJA

UDN2596A

VIN = 0.8 V

-

6.0

mA

UDN2597A

VIN = 0.8 V

-

22

mA

ICC(OFF)

Both

VIN = 2.4 V

-

1.3

mA

tpdO

Both

0.5 EIN to 0.5 EOUT

-

3.0

IJs

tpd1

Both

0.5 EIN to 0.5 EOUT

-

2.0

IJs

IIN(1)
Supply Current (per driver)

Turn-On Delay
Turn-Off Delay

ICCION)

TYPICAL APPLICATION
DUAL STEPPER MOTOR DRIVE

RECOMMENDED
OPERATING CONDITIONS
Type Number

Logic

UDN2596A

5.0 V

300 mA

UDN2597A

5.0V

750 mA

Note: Pins 2 and 12 must both be connected to
power ground.

3-47

HIGH-VOLTAGE, HIGH-CURRENT
DARLINGTON ARRAYS
ULN2SXXLW

ULN2SXXA

Featuring continuous load current ratings to 600 mA for each of
the eight drivers, the Series ULN2800NLW high-voltage, high-current
Darlington arrays are ideally suited for interfacing between low-level
logic circuitry and multiple peripheral power loads. Typical power loads
totaling over 300 W (400 mA x 8, 95 V) can be controlled at an appro~
priate duty cycle depending on ambient temperature and number of
drivers turned ON simultaneously. Typical loads include relays, solenoids, stepping motors, magnetic print hammers, multiplexed LED and
incandescent displays, and heaters. All devices feature open collector
outputs with integral clamp diodes.
The ULN2801A device is a general-purpose array that may be
used with external input current limiting, or with most PMOS or CMOS
logic directly.
The Series ULN28x3NLW has series input resistors selected
for operation directly with 5 V TTL or CMOS. These devices will handle
numerous interface needs-particularly those beyond the capabilities
of standard logic buffers.
The Series ULN2804NLW features series input resistors for
operation directly from 6 to 15 V CMOS or PMOS logic outputs.
The Series ULN280xNLW is the standard Darlington array. The
outputs are capable of sinking 500 mA and will withstand at least 50 V
in the OFF state. Outputs may be paralleled for higher load current
capability. The ULN2823NLW will withstand 95 V in the OFF state.

Dwg. No. A·10,322A

ABSOLUTE MAXIMUM RATINGS
Output Voltage, VCE
(ULN280X*) .................. 50 V
(ULN2823*) . . . . . . . . . . . . . . . . .. 95 V
Input Voltage, V,N .................. 30 V
Continuous Output Current, Ic ..... 500 mA
Continuous Input Current, liN' ...... 25 mA
Power Dissipation, PD
(one Darlington pair) ........... 1.0 W
(total package) ........... See Graph
Operating Temperature Range,
TA' • • • • • • • • • • • • • • • • -20°C to + 85°C
Storage Temperature Range,
Ts' ............... -55°C to +150°C
Note that the Series ULN2800A (dual in-line
package) and Series ULN2800LW (small outline
IC package) are electrically identical and share a
common pin number assignment.

3-48

These Darlington arrays are furnished in 18-pin dual in-line
plastic packages (suffix A) and 18-lead surface-mountable wide-body
SOICs (suffix LW). All devices are pinned with outputs opposite inputs
to facilitate ease of circuit board layout.

FEATURES
•
•
•
•
•

TTL, DTL, PMOS, or CMOS Compatible Inputs
Output Current to 500 mA
Output Voltage to 95 V
Transient-Protected Outputs
Dual In-Line Plastic Package or Small-Outline IC Package

x = digit to identify specific device. Characteristic shown applies to family of devices with
remaining digits as shown. See matrix on next page.

PARTIAL SCHEMATICS
50 V

95 V

500 mA

500 mA

VCE(MAX)

ULN280lA (Each Driver)

Part Number

Logic

COM

General Purpose
PMOS, CMOS

ULN2801A

5V
TTL, CMOS

ULN2803A*
ULN2803LW*

6-15 V
CMOS, PMOS

ULN2804N
ULN2804LW*

ULN2823N
ULN2823LW'

-

* Also available for operation between -40'C and +85°C. To order, change prefix from

'ULN' to 'ULQ'.

Owg. No. A-9595

C/)

ULN28X3A1LW (Each Driver)

2.5

5
COM

==
~
Z

0

<5'(/,<:,

i=

X>-t-"/,
'

-""'_-0 OPEN

Cwg. No. A-9732A

FIGURE 6

Cwg. No. A-9733A

Cwg. No. A-9734A

FIGURE 7

FIGURE 8

'F

~

Owg. No. A-973SA

ULN28X1"

3.5 V

ULN28X3"

3.5 V

ULN28X4"

12 V

~r

-1

tPLl1

r_

~50"

Dwg. No. A-9736A
Complete part number includes a final letter to indicate
package.

X = Digit to identify specific device. Specification shown
:~g~e:. to family of devices with remaining digits as

3-52

COLLECTOR CURRENT
AS A FUNCTION OF
SATURATION VOLTAGE

PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
(DUAL IN-LINE PACKAGED DEVICES)

600

.

E

"
/

I

.4

"

o~

"
'kt."";I

~400

J

...'<"

~~~~

Z

a

",0

~~

~

,~",,~"r

,

I

a
0.5

.

~,

1-'''-

500

[)

~T

~

200

i---j---j--NUMBER OF OUTPUTS71--1-=1-"';;~::::::t:;::::l
CONDUCTING

~

SIMULTANEOUSLY

~

~

I.,

1.0

2

a

COllECTOR-EMITIER SATURATION VOLTAGE IN VOLTS

~

Owg. No. A·9754C

0

0

30

5
PER CENT DUTY CYCLE

Dwg. No. A-11 ,037

COLLECTOR CURRENT AS A
FUNCTION OF INPUT CURRENT

,

,,

600

..

u~1

/l
I

E
~400

~

,
,,

a
1)

t

200

~

o
u

a

""

/

,./ VL
a

200

,

L

./

L
V
:;

V

,

<

~350i-_ _j-_-j---j--~\'~,"~"-~~~~-~~~-~--~

~

V

~

a
§300~_ _t---t---t---+--~~~~4-~~~-~~--~-~~

MAXIMUM REQUIRED

~

INPuT CURRENT
400

600

INPUT CURRENT IN j.lA

8

NUMBER OF OUTPlJTS
CONDUCTING

~ 250f---t---t---t-SIMULTANEOUSlY
~

~

Owg. No. A-10,872B

~

~200.i-_ _j---+---+---+---+---+---~--~~~~~~~

150~O---L--~2~O~--L---,~o~-~---f,60~-~--~8~O---L-~I~OO
PER CENT DUTY CYCLE

Dwg. No. A-10,380A

3-53

PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE

INPUT CURRENT AS A
FUNCTION OF INPUT VOLTAGE

(SMALL OUTLINE PACKAGED DEVICES)

ULN2804AfLW

600r---~~~~--~--~--~--~--~--~~

2.0
Z

,

1.5

<{

p

E

~

....

1.0

:J

0.5

~

u

....
i<
z

"."....-. !""'"
~

.-- .------

--

~

~~C~l",, __

------'

~--.

10

11

12

INPUT VOLTAGE - VIN
Dwg. No. A·9899A

600
500
0:
0
I0
LlJ
....J0 400
....Jo
0 0
0l()
~I-

«

300

LlJ<
a.. E
LlJZ 200
....Jall
<0

100

o0

10

20

30

40

50

PER CENT DUTY CYCLE

3-54

60

70

80

90

100

2801

THRU

2823

HIGJ!.-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

TYPICAL DISPLAY INTERFACE

ULN2SX3A1LW
2.5

z

2.0

y

,--,---,--,--,..--,--,----r--,
DIGlT DRIVER,
1/2 ULN-206IM

f---+--+---il---+--+--boo,.::;.-t---i

1.5

f---+--+---il---b"""-+~

~

1.0

r--t--::;iJp~~~~..r=-t---t---t--i

::>

7-SEGMENT DISPLAY

u

2

0'

1/8 UDN-2981/82A

~

z

-<

0'

1/4 ULN-2074;76B

0.5 f-....:::~~'IM'I"-=-il---'t­

WITH DECIMAL POINT,

~

~

COMMON-ANODE LED

o ~__~__~~__~__~~__~~~~__~~~
2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

-

6.0

INPUT VOLTAGE - VIN

Dwg. No. A-975GB

TO OTHER
DIGITS

r---SEGMENT DRIVER,
SERIES U LN-2800A

~

1Dwg. No. A-10.378

+Vcc

Rp

TTl
OUTPUT
Dwg. No. A-10,384

3-55

QVAD HIGH-CVRRENT
DARLINGTONSflqTCHES

o
..
..

...'"
n

0

i'

These quad Darlington arrays are designed to serve as interface
between low-level logic and peripheral power devices such as solenoids, motors, incandescent displays, heaters, and similar loads of up
to 320 W per channel. Both integrated circuits include transient-suppression diodes that enable use with inductive loads. The input logic is
compatible with most TTL, DTL, LSTTL, and 5 V CMOS logic.
Type UDN2878W and UDN2879W 4 A arrays are identical except
for output-voltage ratings. The former is rated for operation to 50 V
(35 V sustaining), while the latter has a minimum output breakdown
rating of 80 V (50 V sustaining). The lower-cost UDN2878W-2 and
UDN2879W-2 are recommended for applications requiring load currents of 3 A or less. These less expensive devices are identical to the
basic parts except for the maximum allowable load-current rating.
For maximum power-handling capability, all drivers are supplied in
a 12-pin single in-line power-tab package. The tab needs no insulation.
External heat sinks are usually required for proper operation of these
devices.

FEATURES
OWg. No. A-11 ,974

ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
for any driver
(unless otherwise noted)

• Output Currents to 4 A
• Output Voltages to 80 V
• Loads to 1280 W
• TTL, DTL, or CMOS Compatible Inputs
• Internal Clamp Diodes
• Plastic Single In-Line Package
• Heat-Sink Tab

Output Voltage, VCEX
(UDN2878W
& UDN2878W-2) .............. 50 V
(UDN2879W
& UDN2879W-2) .............. 80 V

Output Current, Ic
(UDN2878W
& UDN2879W) ............... 5.0 A
(UDN2878W-2
& UDN2979W-2) .............. 4_0 A

Input Voltage, VIN ................. 15 V
Input Current, liN ................ 25 rnA
Supply Voltage, Vs ................ 10 V
Total Package Power Dissipation,
Po ..................... See Graph
Operating Ambient Temperature Range,
TA. . . • . . . . . . . . . . . . . -20°C to +85°C
Storage Temperature Range,
Ts ................ -55°C to +150°C

3-56

Always order by complete part number:

Max_lc

Max. VCEX

Min. VCE (sus)

UDN2878W

S.OA

SOV

35V

UDN2878W-2

4.0 A

50V

35V

UDN2879W

S.OA

80V

50V

UDN2879W-2

4.0 A

80V

50V

Part Number

0-"""'--0 OPEN
Dwg. No. A-9732

Dwg. No. A-10,350

FIGURE I

FIGURE 2

FIGURE 3

v,

CPEt4

"

Dwg. No. A·9735A

Dwg. No. A-9736

Dwg. No. A-9734A

FIGURE 4

FIGURES

Vs

FIGURE 6

OPEN

'e

Dwg. No. A·10,351

FIGURE 7

3·59

TYPICAL APPLICATIONS
STEPPER-MOTOR DRIVER
UDN2878W

o

o

INPUT WAVEFORMS

x

y

X +5V

+2av
Dwg. No. A-l1 ,795

PRINT-HAMMER DRIVER

Dwg. No. A-l1 ,975

DIGIT DRIVER
FOR MULTIPLEXED INCANDESCENT LAMP DISPLAY
UDN2879W

o

UDN2879W

0

o

0
sDa
.'V
rC>-- ~r4

~

r-.:i

·6

P

v.

P
~ ~l1f.
:J1i1
.it,
1"1

,

..

S

8

e

NC 1Hz IN, +5V

tiil

,nf

11

t2

NC

IN.

DIGIT
I

'----TO
SEGMENT
SELECT

TO
OTHER
DIGITS

tiil

Dwg. No. A-l1 ,976

3-60

jil
~

4il

DIGIT

2

Dwg. No. 8-1512

DVAL FVLL-BlUDGE
PWM MOTOR DRIVERS
UDN2916B

SENSE,

,----I..O-"Jl o,
GROUND
GROUND

PHASE,
PHASE,
RC,

________lIIIIIiIiIIr LOGIC SUPPLY
Dwg. No. PP-005

ABSOLUTE MAXIMUM RATINGS
at T J $150°C
Motor Supply Voltage, Vee .......... 45 V
Output Current, lOUT
(Peak, tw $ 20 J.ls) ............ ±1.0 A
(Continuous) .............. ±750 rnA
Logic Supply Voltage, Vcc .......... 7.0 V
Logic Input Voltage Range,
VIN . . . . . . . . . . . .·0.3 V to Vcc + 0.3 V
Output Emitter Voltage, VE •.••••••.. 1.0 V
Reference Voltage, VREF •.•••••••. 7.5 V
Package Power Dissipation,
PD' .................... See Graph
Operating Temperature Range,
TA . • . . • . • . • . . . • . • . ·20°C to +85°C
Storage Temperature Range,
Ts ................ ·55°C to +150°C
Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified peak current rating or a junction
temperature of + 150°C.

The UDN2916B, UDN2916EB, and UDN2916LB motor drivers
are designed to drive both windings of a bipolar stepper motor or
bidirectionally control two dc motors. Both bridges are capable of
sustaining 45 V and include internal pulse-width modulation (PWM)
control of the output current to 750 mA:'The outputs have been
optimized for a low output saturation voltage drop (less than 1 .8 V
total source plus sink at 500 mAl.
For PWM current control, the maximum output current is determined by the user's selection of a reference voltage and sensing
resistor. Two logic-level inputs select output current limits of 0, 33,
67, or 100% of the maximum level. A PHASE input to each bridge
determines load current direction.
The bridges include both ground clamp and flyback diodes for
protection against inductive transients. Internally generated delays
prevent cross-over currents when switching current direction. Special
power-up sequencing is not required. Thermal protection circuitry
disables the outputs if the chip temperature exceeds safe operating
limits.
The UDN2916B is supplied in a 24-pin dual in-line plastic batwing
package with a copper lead-frame and heat sinkable tabs for improved
power dissipation capabilities. The UDN2916EB is supplied in a 44-lead
power PLCC for surface-mount applications. The UDN2916LB is
supplied in a 24-lead surface-mountable SOIC. Their batwing construction provides for maximum package power diss,ipation in the smallest
possible construction. The UDN2916B/EB/LB are also available for
operation from -40°C to +85°C. To order, change the prefix from
'UDN'to 'UDQ'.

FEATURES
•
•
•
•
•
•
•

750 mA Continuous Output Current
45 V Output Sustaining Voltage
Internal Clamp Diodes
Internal PWM Current Control
Low Output Saturation Voltage
Internal Thermal Shutdown Circuitry
Similar to Dual PBL3717, UC3770

Always order by complete part number:

Part Number

Package

UDN2916B

24·Pin DIP

UDN2916EB

44·Lead PLCC

UDN2916LB

24-Lead SOIC
3-61

UDN2916EB
~

~

~u

"-

~

>0

W i;l

>:0
0

u

:0

Z

z

w
Z

0

u
0

z

0

.;; i;l

0
i=
Z

m

t;

Z

0:

w

V>

0

'3"

Z

0
i=

i;l trl
Z

""I

H

H

m

>-" H°

:0

0

H

i!i
.;; U
CO '3

.;;
V>

""I

.;; Ii!

50

0

u

75

100

TEMPERATURE IN

Z

125

150

°c

Dwg. No. PP-006

Dwg. No. GP·035

g

PWM CURRENT-CONTROL CIRCUITRY

UDN2916LB
'B' PACKAGE,
CHANNEL 1
PIN NUMBERS
SHOWN.

LOAD SUPPLY
OUT 28

PHASE 2

SENSE,

V REF2

RC,

OUT 2A

GROUND

GROUND

GROUND

GROUND

RC,

PHASE 1

IO~-----f

I1~-~-~-1

LOGIC SUPPLY

V REF1

SOURCE
DISABLE

40K

SENSE,
OUT 1B
Dwg. No. EP-007A

TRUTH TABLE
Dwg. No. PP-047

3-62

PHASE
H

H

L

L

L
H

ELECTRICAL CHARACTERISTICS at T A = +25°C, VBB = 45 V, Vee = 4.75 V to 5.25 V,
VREF = 5.0 V (unless otherwise noted).
Limits
Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

-

Output Drivers (OUTA or OUTe)
45

V

-

< 1.0

50

I1A

-

<-1.0

-50

I1A

45

-

-

V

Motor Supply Range

Vee

10

Output Leakage Currenl

IcEX

VOUT= Vee
VOUT = 0

Oulput Sustaining Voltage

VCE(sus)

lOUT = ± 750 mA, L = 3.0 mH

Output Saturation Voltage

VCE(SAT)

Sink Driver, lOUT = +500 mA

-

0.4

0.6

V

Sink Driver, lOUT = +750 mA

-

1.0

1.2

V

Source Driver, lOUT = -500 mA

1.0

1.2

V

Source Driver, lOUT = -750 mA

-

1.3

1.5

V

VR=45 V

-

< 1.0

50

I1A

Clamp Diode Leakage Current

IR

Clamp Diode Forward Voltage

VF

Driver Supply Current

IF = 750 mA

-

1.6

2.0

V

lee (ON)

Both Bridges ON, No Load

-

20

25

mA

IBe(OFF)

Both Bridges OFF

-

5.0

10

mA

VIN(1)

All digital inputs

2.4

-

V

VIN(O)

All digital inputs

0.8

V

<1.0

20

I1A

VIN = 0.8 V

-

- 3.0

-200

I1A

Operating

1.5

-

7.5

V

10= 11 = 0.8 V

9.5

10

10.5

-

Control Logic
Input Voltage

Input Current

Reference Voltage Range
Current Limit Threshold
(at trip point)

Thermal Shutdown Temperature
Total Logic Supply Current

IIN(1)

VREF
VREFiVsENSE

VIN = 2.4 V

10 = 2.4 V, 11 = 0.8 V

13.5

15

16.5

10 = 0.8 V, 11 = 2.4 V

25.5

30

34.5

-

-

170

-

°C

40

50

mA

10

12

mA

TJ
IcC(oN)

10 = 11 = 0.8 V, No Load

ICC(OFF)

10 = 11 = 2.4 V, No Load

3-63

APPLICATIONS INFORMATION
PWM CURRENT CONTROL:
The UDN2916B/EB/LB dual bridges are
designed to drive both windings of a bipolar
stepper motor. Output current is sensed and
controlled independently in each bridge by
an external sense resistor (Rs)' internal
comparator, and monostable multivibrator.
When the bridge is turned ON, current
increases in the motor winding and it is
sensed by the external sense resistor until
the sense voltage (V SEN~E) reaches the level
set at the comparator's Input:

PWM OUTPUT CURRENT WAVE FORM

:-

rr-\

If

"§,A~.t"'H.:h""·.,"",,,,,-.J":..

I

l

!

I

ITRIP = VRE!1 0 Rs
The comparator then triggers the
monostable which turns OFF the source
driver of the bridge. The actual load current
peak will be slightly higher than the trip point
(especially for low-inductance loads) because
of the internal logic and switching delays. This
delay (t d ) is typically 2 IlS. After turn-off, the
motor current will normally decay, circulating
through the ground-clamp diode and sink
transistor. The source driver's OFF time
(and therefore the magnitude of the current
decrease) is determined by the monostable's
external RG timing components, where
tOff = RTG Twithin the range of 20 kQ to
100 kQ and 100 pF to 1,000 pF.

..

-It~;:--

//

Dwg. No. WM-003-1

LOAD CURRENT PATHS

Vaa

~

I1

(~-;;.-::, --=--]-:::.--

Loads with high distributed capacitances

to trip the comparator, resulting in erroneous
current control or high-frequency oscillations.
An external RcG time delay should be used
to further delay the action of the comparator.
Depending on load type, many applications
will not require these external components
(SENSE connected to E).

".........--./"v.,.",,A...'tI

(
I

CROSSOVER / /
CURRENT DELAY

When the source driver is re-enabled,
the winding current (the sense voltage) is
again allowed to rise to the comparator's
threshold. This cycle repeats itself, maintaining the average motor winding current at the
desired level.

may result in high turn-ON current peaks.
This peak (appearing across Rs) will attempt

/

I

/

f

\

~,

I:,

-

I

I

_I

-

' - I
I

, ... -----"'"
Rs

~:, J

BRIDGE ON - - . SOURCE OFF -----ALL OFF·

Dwg. No. EP-006-1

3-64

LOGIC CONTROL OF OUTPUT CURRENT:
Two logic level inputs (10 and I,) allow digital selection of the motor
winding current at 100%, 67%, 33%, or 0% of the maximum level per
the table. The 0% output current condition turns OFF all drivers in the
bridge and can be used as an OUTPUT ENABLE function.

TYPICAL APPLICATION
, -_ _ _ _ _ _ _- - - "

O

STEPPER
MOTOR

CURRENT-CONTROL TRUTH TABLE
Output Current

10

11

L

L

V REI1 0 Rs = ITRIP

H

L

VREI15 Rs = 2/3 ITRIP

L

H

V REF/30 Rs = 1/3 ITRIP

H

H

0

These logic level inputs greatly enhance the implementation of
IlP-controlied drive formats.
During half-step operations, the 10 and I, allow the IlP to control
the motor at a constant torque between all positions in an eight-step
sequence. This is accomplished by digitally selecting 100% drive
current when only one phase is ON and 67% drive current when two
phases are ON. Logic highs on both 10 and I, turn OFF all drivers to
allow rapid current decay when switching phases. This helps to ensure
proper motor operation at high step rates.
The logic control inputs can also be used to select a reduced
current level (and reduced power dissipation) for 'hold' conditions andl
or increased current (and available torque) for start-up conditions.

GENERAL:
To avoid excessive voltage spikes on the LOAD SUPPLY pin
(Vaa) , a large'value capacitor (~22IlF) should be connected from Vaa
to ground as close as possible to the device. Under no circumstances
should the voltage at LOAD SUPPLY exceed 45 V.
The PHASE input to each bridge determines the direction motor
winding current flows. An internally generated deadtime (approximately
3 1lS) prevents crossover currents that can occur when switching the
PHASE input.
All four drivers in the bridge output can be turned OFF between
steps (10 = I, ~ 2.4 V) resulting in a fast current decay through the
internal output clamp and flyback diodes. The fast current decay is
desirable in half-step and high-speed applications. The PHASE, 10 ,
and 11 inputs float high.

Dwg. No. EP-Q08A

Varying the reference voltage (V R F)
provides continuous control of the pea~ load
current for micro-stepping applications, within
the specified limits for VREF.
Thermal protection circuitry turns OFF
all drivers when the junction temperature
reaches + 170°C. It is only intended to protect
the device from failures due to excessive
junction temperature and should not imply
that output short circuits are permitted. The
output drivers are re-enabled when the
junction temperature cools to +145°C.
The U DN2916B/EB/LB output drivers
are optimized for low output saturation
voltages-less than 1.8 V total (source plus
sink) at 500 mAo Under normal operating
conditions, when combined with the excellent
thermal properties of the batwing package
design, this allows continuous operation of
both bridges simultaneously at 500 mAo

3-65

DUAL FULL-BKlDGE
PWM MOTOR DHlVER

~

w

The UDN2917EB motor driver is designed to drive both windings
of a bipolar stepper motor or bidirectionally control two dc motors. Both
bridges are capable of sustaining 45 V and include internal pulse-width
modulation (PWM) control of the output current to 1.5 A.

~

~ ~ --

~ ~

For PWM current control, the maximum output current is determined
by the user's selection of a reference voltage and sensing resistor. Two
logic-level inputs select output current limits of 0, 33%, 67%, or 100%
of the maximum level. A PHASE input to each bridge determines load
current direction. Active-low ENABLE inputs control the four drivers in
each bridge.
The bridges include both ground clamp and flyback diodes for
protection against inductive transients. Internally generated delays
prevent cross-over currents when switching current direction. Special
power-up sequencing is not required. Thermal protection circuitry disables the outputs if the chip temperature exceeds safe operating limits.

50

!:i

w

z

~

w 0

"

i -Q

w

>

w

ro

~ ~

0

~

3

The UDN2917EB is supplied in a 44-lead power PLCC for surfacemount applications. Its batwing construction provides for maximum
package power dissipation in the smallest possible construction.

FEATURES
Dwg. No. PP-021

•
•
•
•
•
•

1.5 A Continuous Output Current
45 V Output Sustaining Voltage
Internal Clamp Diodes
Digital Control of Output Current
Internal Thermal Shutdown Circuitry
Similar to Dual PBL3770

ABSOLUTE MAXIMUM RATINGS
at T J S; +150°C

Motor Supply Voltage, VBB' . . . . . . . . . . . 45 V
Output Current, lOUT (tw s; 20 IJS) ... ±1.75 A
(Continuous) ................. ±1.5 A
Logic Supply Voltage, Vcc ........... 7.0 V
Logic Input Voltage Range,
VIN .................• -0.3 V to +7.0 V
Output Emitter Voltage, VE' . . . . . . . . . . 1.0 V
Package Power Dissipation,
PD' ..................... See Graph
Operating Temperature Range,
TA' . . . . . . . . • . • . . . ... -20°C to +85°C
Storage Temperature Range,
Ts ................. -55°C to +150°C
Output current rating may be limited by duty cycle,
ambient temperature, and heat sinking. Under any
set of conditions, do not exceed the specified peak
current rating or a junction temperature of +150°C.

Always order by complete part number: 1UDN2917EB I.
3-66

PWM CURRENT-CONTROL CIRCUITRY

CHANNEL 1
PIN NUMBERS
SHOWN.

SOURCE
DISABLE

IO~-----f

11~--~---1

I

I
I

.LCe

T

I

I

{-

Dwg. No. EP·007-2

TRUTH TABLE
'" 12.5

.------r----.,.---,-----r----,

5;=

i

o

10r----r--~-~

!;i
a.

illC

7.5

f---+---t---1-\,.--+---I

Enable

Phase

QutA

Quta

L
L
H

H
L

H
L
Z

L
H
Z

X

X = Don't care
Z = High impedance

0:
W

~

a.
w

~

~ 2.51----r
a.
w

....J

~

....J

.0:

OL-____
25

~

50

____

~

75

____

~

____

100

~

125

__

~

150

TEMPERATURE IN 'C
Dwg. No. GP-020B

3-67

ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 45 V, Vee = 5.0 V, VREF = 5.0 V
(unless otherwise noted).
Limits
Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

I

Units

Output Drivers (OUTA or OUTB)

Motor Supply Range

Vss

10

-

45

V

Output Leakage Current

ICEX

VOUT = Vss

-

<1.0

50

J.lA

VOUT = 0

-

<-1.0

-50

J.lA

Output Sustaining Voltage

VCE(SUS)

lOUT = ±1.5 A, L = 3.5 mH

45

-

-

V

Output Saturation Voltage

VCE(SATI

Sink Driver, lOUT = + 1.0 A*

-

0.5

0.7

V

Sink Driver, lOUT = +1.5 A*

-

0.8

1.0

V

Source Driver, lOUT = -1.0 A*

-

1.8

1.9

V

Source Driver, lOUT = -1.5 A*

-

1.9

2.1

V

<1.0

50

J.lA

Clamp Diode Leakage Current

IR

VR = 45 V

Clamp Diode Forward Voltage

VF

IF = 1.5 A

-

1.6

2.0

V

Iss (ON)

Both Bridges ON, No Load

-

9.0

12

mA

IS8 (OFF)

Both Bridges OFF

-

4.0

6.0

mA

VIN(l)

All Inputs

2.4

-

-

VIN(O)

All Inputs

-

-

0.8

V

IIN(l)

VIN = 2.4 V

-

<1.0

20

J.lA

IIN(O)

VIN = 0.8 V

-

-3.0

-200

J.lA

Reference Voltage Range

VREF

Operating

1.5

-

7.5

V

Current Limit Threshold
(at trip point)

VREFIVSENSE

10 = 11 = 0.8 V

9.5

10

10.5

-

10 = 2.4 V, 11= 0.8 V

13.5

15

16.5

-

10 = 0.8 V, 11 = 2.4 V

25.5

30

34.5

-

-

170

-

'C

Driver Supply Current

Control Logic

Input Voltage

Input Current

V

Thermal Shutdown Temp.

TJ

Total Logic Supply Current

ICC(ON)

10 = 11 = VEN = 0.8 V, No Load

-

90

105

mA

IcC(oFF)

10 = I, = 2.4 V, No Load

-

10

12

mA

Negative current is defined as coming out of (sourcing) the specified device pin.
Typical Data is for design information only.
* Pulse test «10 ms).

3-68

APPLICATIONS INFORMATION

PWM OUTPUT CURRENT WAVEFORM

PWM CURRENT CONTROL:

The UDN2917EB dual bridge is designed
to drive both windings of a bipolar stepper
motor. Output current is sensed and controlled independently in each bridge by an
external sense resistor (Rs), internal comparator, and monostable multivibrator.

VpHASE

When the bridge is turned ON, current
increases in the motor winding and it is
sensed by the external sense resistor until the
sense voltage (VSENSE) reaches the level set at
the comparator's input:
ITR1P = VREF/1 0 Rs
The comparator then triggers the monostable which turns OFF the source driver of
the bridge. The actual load current peak will
be slightly higher than the trip point (especially
for low-inductance loads) because of the
internal logic and switching delays. This delay
(td) is typically 2 JlS. After turn-off, the motor
current will normally decay, circulating through
the ground clamp diode and sink transistor.
The source driver's OFF time (and therefore
the magnitude of the current decrease) is
determined by the monostable's external RC
timing components, where toff = RTC Twithin
the range of 20 kQ to 100 kQ and 200 pF
to 500 pF.

/

--J

CROSSOVER CURRENT DELAY

'd

-ll+--

toll

--..J
Dwg. No. WM-003-1

LOAD CURRENT PATHS
Vss

When the source driver is re-enabled, the
winding current (the sense voltage) is again
allowed to rise to the comparator's threshold.
This cycle repeats itself, maintaining the
average motor winding current at the desired
level.
Special circuitry has been included to
prevent runaway current control when the
fixed OFF time (toff ) is set too short. This
circuitry prevents the source driver from being
re-enabled until the load current has decayed
to below the ITR1P level.
Loads with high distributed capacitances
may result in high turn-ON current peaks.
This peak (appearing across Rs) will attempt
to trip the comparator, resulting in erroneous
current control or high-frequency oscillations.
An external ReCe low-pass filter may be
needed to delay the action of the comparator.

Rs

i1

,:,
,

BRIDGE ON - - SOURCE OFF -----ALL OFF

Dwg. No. EP-006-1

3-69

CURRENT-CONTROL
TRUTH TABLE
10

11

Output Current

L

L

V RE/1 0 Rs = ITRIP

H

L

VRE/15 Rs

=2/3 ITRIP

L

H

VRE.l30 Rs

= 1/3 ITRIP

H

H

0

LOGIC CONTROL OF OUTPUT CURRENT:
Two logic level inputs (10 and h) allow digital selection of the motor
winding current at 100%, 67%, 33%, or 0% of the maximum level per
the table. The 0% output current condition turns OFF all drivers in the
bridge and can be used as an output enable function. These logic level
inputs greatly enhance the implementation of IlP-controlled drive
formats.
During half-step operations, the 10 and 11 inputs allow the IlP to
control the motor at a constant torque between all positions in an eightstep sequence. This is accomplished by digitally selecting 100% drive
current when only one phase is ON and 67% drive current when two
phases are ON.
The logic control inputs can also be used to select a reduced
current level (and reduced power dissipation) for 'hold' conditions
and/or increased current (and available torque) for start-up conditions.

GENERAL:
To avoid excessive voltage spikes on the LOAD SUPPLY pin (VBB),
a large-value capacitor (;:0:47 IlF) should be connected from VBB to
ground as close as possible to the device. Under no circumstances
should the voltage at LOAD SUPPLY exceed 45 V.
The PHASE input to each bridge determines the direction motor
winding current flows. An internally generated deadtime (approximately
3 115) prevents crossover currents that can occur when switching the
PHASE input.
All four drivers in the bridge output can be turned OFF (VEN ;:0: 2.4 V
or 10 = 11 ;:0: 2.4 V), resulting in a fast current decay through the internal
output clamp and flyback diodes. The fast current decay is desirable in
half-step and high-speed applications. All logic inputs float high; the
ENABLE input must be tied low if it is not used.
Varying the reference voltage (VREF) provides continuous control
of the peak load current for micro-stepping applications, within the
specified limits for VREF.
Thermal protection circuitry turns OFF all drivers when the junction
temperature reaches +170°C. It is only intended to protect the device
from failures due to excessive junction temperature and should not
imply that output short circuits are permitted. The output drivers are
re-enabled when the junction temperatur€ cools to +145°C.

3-70

DVAL FVLL-BKlDGE
PWM MOTOR DRIVER
The A2918SWH and A2918SWV motor drivers are designed
to drive both windings of a bipolar stepper motor or bidirectionally
control two dc motors. All bridges are capable of sustaining 45 V and
include internal pulse-width modulation (PWM) control of the output
current to 1.5 A.
For PWM current control, the maximum output current is determined by the user's selection of a reference voltage and sensing
resistor. A PHASE input tQ each bridge determines load current
direction. Active low ENABLE inputs control the four drivers in
each bridge.
The bridges include both ground clamp and fly back diodes for
protection against inductive transients. Internally generated delays
prevent cross-over currents when switching current direction.
Special power-up sequencing is not required. Thermal protection
circuitry disables the outputs if the chip temperature exceeds safe
operating limits.
The A2918SWHN are supplied in an 18-lead power-tab package
with staggered lead forming. The tab is internally insulated from the
device and requires no external isolation.

FEATURES
Dwg, PP-OSl

ABSOLUTE MAXIMUM RATINGS
at T J ~ + 150°C

•
•
•
•
•
•
•

±1.5 A Continuous Output Current
45 V Output Sustaining Voltage
Internal PWM Current Control
Low Output Saturation Voltage
Internal Clamp Diodes
Internal Thermal Shutdown Circuitry
Similar to Dual PBL3718 or Dual PBL3770

Motor Supply Voltage, VBB • . • . • . • . • • 45 V
Output Current, lOUT (tw,,20 Ils) .... ±1.75 A
(Continuous) ............... ±1.5 A
Logic Supply Voltage, Vcc ......... 7.0 V
Logic Input Voltage Range,
VIN • • • • • • . . • • • • . . . -0.3 V to +7.0 V
Output Emitter Voltage, VE . . . . . . . .. 1.5 V
Package Power Dissipation,
Po . . . . . . . . . . . . . . . . . . .. See Graph
Operating Temperature Range,
TA . • • • . . • • . • • . • • •. -20°C to +85°C
Storage Temperature Range,
Ts ............... -40°C to +150°C
Output current rating may be limited by duty cycle,
ambient temperature, and heat sinking. Under
any set of conditions, do not exceed the specified
peak current rating or a junction temperature of
+150°C.

Always order by complete part number:

Part Number

Application

A2918SWH

For Horizontal Mount

A2918SWV

For Vertical Mount
3-71

FUNCTIONAL BLOCK DIAGRAM

PHASE 1

®-fil

PHASE 2

ENABLE1~

ENABLE2

SOURCE
DISABLE

SOURCE
DISABLE

Dwg. FP-033

10.------.~._--._----_.----~----__,

z

o

Eia..

gj61-----!----+--~

is
a:
w

TRUTH TABLE

o==
a..

Enable

Phase

OutA

L
L

H

H

L

L

H

H

X

L
Z

X = Don't care
Z = High impedance

Outs

Z

w

Cl

~
~ 21----1---a..
w

-I

III

~

-I

c(

o~

25

____

~

50

____

~

______

75

~

____

~

__

~~

100

TEMPERATURE IN DC
Dwg. GP-043

3-72

ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB
VREF = 5.0 V (unless otherwise noted).

=45 V, Vee = 4.75 V to 5.25 V,
Limits

Test Conditions

Characteristic

Min.

Typ.

Max.

10

-

45

V

JlA
JlA

Output Drivers (OUTA or OUT B)

Motor Supply Range

VBB

Output Leakage Current

IcEx

VOUT

~

VBB

-

<1.0

50

VOUT

~

0

-

<-1.0

-50

Output Sustaining Voltage

VCElsus)

lOUT ~ ±1 .5 A, L ~ 3.0 mH

45

-

-

V

Output Saturation Voltage

VCEISAT)

Sink Driver, lOUT ~ + 1.0 A

-

0.7

0.8

V

-

0.9

1.1

V

Sink Driver, lOUT

+1.5 A

Source Driver, lOUT

~

-1.0 A

-

1.8

2.0

V

Source Driver, lOUT

~

-1.5 A

-

1.9

2.2

V

-

<1.0

50

JlA

-

1.6

2.0

V

IBBION)

Both Bridges ON, No Load

-

12

15

mA

IBBIOFF)

Both Bridges OFF

-

4.0

6.0

mA

V,N(1 )

All Inputs

2.4

-

-

V

V'NIO)

All Inputs

-

-

0.8

V

I'N(1)

V'N~

2.4 V

-

<1.0

20

I,NIO)

Y,N

~

0.8 V

-

-3.0

-200

JlA
JlA

VREF

Operating

1.5

-

Vcc

V

At Trip Point

9.5

10

10.5

-

Clamp Diode Leakage Current

IR

VR ~ 45 V

Clamp Diode Forward Voltage

VF

IF

Driver Supply Current

~

~

1.5 A

Control Logic

Input Voltage

Input Current

Reference Voltage Range
Current Limit Threshold

VREFNsENSE

Thermal Shutdown Temp.

TJ

-

170

-

°C

Total Logic Supply Current

ICCION)

VEN

~

0.8 V, No Load

-

105

140

mA

IcC(oFF)

VEN

~

2.4 V, No Load

-

10

12

rnA

Negative current is defined as coming out of (sourcing) the specified device pin.
Typical Data is for design information only.

3-73

PWM OUTPUT CURRENT WAVEFORM

APPLICATIONS INFORMATION
PWM Current Control:

:
-

The A2918SWHIV dual bridges are
designed to drive both windings of a bipolar
stepper motor. Output current is sensed and
controlled independently in each bridge by
an external sense resistor (Rs), an internal
comparator, and an internal monostable
multivibrator.

Irr'~=r,"-

If

·-t-Hih·_t;, /

V;.rH.:r.J'J,:·.t'_-.!~./'_"_"..

I
/

:r
I
..

/

\

.-.....•....;-..~...r.....v

I
J

/

/

CROSSOVER / /
CURRENT DELAY

When the bridge is turned ON, current
increases in the motor winding and it is sensed
by Rs until the sense voltage (VSENSE) reaches
the level set at the comparator's input:
ITRIP = VREF/10 Rs

Dwg. WM-OD3-1

The comparator then triggers the
monostable which turns OFF the source driver
of the bridge. The actual load current peak will
be slightly higher than the trip point (especially
for low-inductance loads) because of internal
logic and switching delays. This delay (~) is
2 IJS typically. After turn-off, the motor current
decays, circulating through the ground clamp
diode and sink transistor. The source driver's
OFF time toft, and therefore the magnitude
of the current decrease, is determined by the
monostable's external RC timing components,
where toft = RTCT within the range of 20 kQ to
100 kQ and 200 pF to 500 pF.
When the source driver is re-enabled, the
winding current (the sense voltage) again is
allowed to rise to the comparator's threshold.
This cycle repeats itself, maintaining the average motor winding current at the desired level.
Special circuitry has been included to
prevent runaway current control when toft is set
too short. This circuitry prevents the source
driver from being re-enabled until the load
current has decayed to below the ITRIP level.
Loads with high distributed capacitances
may result in high turn-ON current peaks. This
peak, appearing across Rs, will attempt to trip
the comparator, resulting in possible erroneous
current control or high-frequency oscillations.
An external RcCc low-pass filter may be used
to delay the action of the comparator, and thus
ignore turn-on spikes.

3-74

General:

LOAD CURRENT PATHS

To avoid excessive voltage spikes on
the LOAD SUPPLY pin (V BB ), a large-value
capacitor (~47 ~F) should be connected
from VBB to the ground pin as close as
possible to the device. Under no circumstances should the voltage at VBB exceed
45 V.
The PHASE input to each bridge
determines the direction motor winding
current flows. An internally generated
deadtime, of approximately 3 ~s, prevents
crossover currents that can occur when
switching the PHASE input.
All four drivers in the bridge output can
be turned OFF, with VEN ~ 2.4, resulting in
a fast current decay through the internal
ground clamp and flyback diodes. The fast
current decay is desirable in half-step and
high-speed applications. The ENABLE
input must be tied low if it is not used.
Varying the reference voltage (VREF)
provides continuous control of the peak load
current.

Rs

~:,j

BRIDGE ON - - SOURCE OFF - - - - - ALL OFF

Owg. Ep·DD6·'

Thermal protection circuitry tums OFF
all drivers when the junction temperature
reaches approximately +170°C. It is intended only to protect the device from
failures due to excessive junction temperature and should not imply that output short
circuits are permitted. The output drivers
are re-enabled when the junction temperature cools to approximately +145°C.

3-75

3-PHASE BRUSHLESS DC MOTOR
CONTROLLEHlDRlVERS"

o
o
Dwg. No W-188

Combining logic and power, the UDN2936W and UDN2936W-120
provide commutation and drive for three-phase brush less dc motors.
Each of the three outputs are rated at 45 V and ±2 A (±3 A peak), and
include internal ground clamp and flyback diodes. These drivers also
feature internal commutation logic, PWM current control, and thermal
shutdown protection.
The UDN2936W and UDN2936W-120 are compatible with singleended digital or linear Hall effect sensors. The commutating logic is
programmed for 60° (UDN2936W) or 120° (UDN2936W-120) electrical
separation. Current control is accomplished by sensing current through
an external sense resistor and pulse-width modulating the source
drivers. Voltage thresholds and hysteresis can be externally set by the
user. If desired, internal threshold and hysteresis defaults (300 mY, 7.5
percent) can be used. The UDN2936W/W-120 also include braking and
direction control. Internal protection circuitry prevents crossover current
when braking or changing direction.
For maximum power-handling capability, the UDN2936W and
UDN2936W-120 are supplied in 12-pin single in-line power tab packages. An external heat sink may be required for high-current applications. The tab is at ground potential and needs no insulation.

FEATURES

ABSOLUTE MAXIMUM RATINGS
at T J S; +150°C

• 10 V to 45 V Operation
• ±3 A Peak Output Current
• Internal Clamp Diodes
• Internal PWM Current Control
• 60° or 120° Commutation Decoding Logic
• Thermal Shutdown Protection
• Compatible with Single-Ended or Differential Hall Effect Sensors
• Braking and Direction Control

Supply Voltage, VBB . • . . . • • • . • • • • • . 45 V
Output Current, lOUT
(continuous) ................ ±2.0 A
(peak) ..................... ±3.0 A
Input Voltage Range, VIN . • . . -0.3 V to 15 V
Threshold Voltage, VTHS • . • • • . . . . • . • 15 V
Package Power Dissipation,
PD • . . • . . . . • • • . • . • • • . • • See Graph
Operating Temperature Range,
TA .•••.•••.••...•.• -20°C to +85°C
Storage Temperature Range,
Ts ................ -55°C to +150°C
Note: Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified peak current and a junction temperature
of +150°C.

3-76

Always order by complete part number:

Part Number
UDN2936W
UDN2936W-120

Sensor Inputs
Single-Ended, 60° Separation
Single-Ended, 120° Separation

FUNCTIONAL BLOCK DIAGRAM

6.8V

DIRECTION

6}------'

THERMAL
SHUTDOWN

BRAKE
(ACTIVE LOW)
5~------------------------~----~

Dwg. No. W-190A

3-77

COMMUTATION TRUTH TABLE
UDN2936W
Hall Sensor Inputs

z

o

~
~

6r-----r-~~~--_1_

is
a:

w

;;:

~
w

4r-----r----

~

~

21--------r

w

..J

 VTHS /9.5

190

250

310

J.1A

VTHSIVsENSE at trip pOint. VTHS < 3.0 V

9.5

10

10.5

VTHS ~3.0 V

270

300

330

VTHS~3.0 V

-

7.5

-

mV
%

BRAKE or DIRECTION

-

2.0

-

J.1s

APPLICATIONS INFORMATION
The UDN2936W and UDN2936W-120 power drivers provide
commutation logic and power outputs to drive three-phase brushless
dc motors.
The UDN2936W and UDN2936W-120 are designed to interface
with single-ended linear or digital Hall effect devices (HEDs). Internal
pull-up resistors allow for direct use with open-collector digital HEDs.
The HN inputs have 2.5 V thresholds.
The commutation logic provides decoding for HEDs with 60 0
(UDN2936W) or 120 0 (UDN2936W-120) electrical separation. At any
one step in the logic sequencing, one half-bridge driver is sourcing
current, one driver is sinking current, and one driver is in a highimpedance state (see Truth Table).
A logic low on the BRAKE pin turns ON the three sink drivers and
turns OFF the three source drivers, essentially shorting the motor
windings to ground. During braking, the back-electromotive force
generated by the motor produces a current which dynamically brakes
the motor. Depending upon the rotational velocity of the motor, this
current can approach the locked rotor current level (which is limited only
by the motor winding resistance). During braking the output current
limiting circuitry is disabled and care should be taken to ensure that the
back-EMF generated brake current does not exceed the maximum
rating (3 A peak) of the sink drivers and ground clamp diodes.
Changing the logic level of the DIRECTION pin inverts the output
states, thus reversing the direction of the motor. Changing the direction
of a rotating motor produces a back-EMF current similar to when
braking the motor. The load current should not be allowed to exceed
the maximum rating (±3 A peak) of the drivers.
An internally generated dead time (td) of approximately 2 Ils
prevents potentially destructive crossover currents that can occur
when changing direction or braking.
Motor current is internally controlled by pulse-width modulating the
source drivers with a preset hysteresis format. Load current through an
external sense resistor (Rs) is constantly monitored. When the current
reaches the set trip point (determined by an external reference voltage
or internal default), the source driver is disabled. Current recirculates
through the ground clamp diode, motor winding, and sink driver. An
internal constant-current sink reduces the trip point (hysteresis). When
the decaying current reaches this lower threshold, the source driver is
enabled again and the cycle repeats.
Thresholds and hysteresis can be set with external resistors or
internal defaults can be used. With VTHs > 3.0 V, the trip point is
internally set at 300 mV with 7.5% hysteresis. Load current is then
determined by the equation:
ITRIP = 0.3/Rs

3-81

With VTHS < 3.0 V, the threshold, hysteresis percentage, and peak
current are set with external resistors according to the equations:
Threshold Voltage (VTHS ) = VREF • RT /(RH + RT)
Hysteresis Percentage = RH/50 VREF
Load Trip Current (I TRIP) = VTHS /10 Rs
Percentage hysteresis is a fixed value independent of load current.
The chopping frequency is a function of circuit parameters including
load inductance, load resistance, supply voltage, hysteresis, and
switching speed of the drivers.
The UDN2936W and UDN2936W-120 outputs are rated for normal
operating currents of up to ±2 A and startup currents to ±3 A (see
cautions above regarding braking and changing of motor direction).
Internal power ground clamp and flyback diodes protect the outputs
from the voltage transients that occur when switching inductive loads.
All devices also feature thermal protection circuitry. If the junction
temperature reaches +165°C, the thermal shutdown circuitry turns OFF
all output drivers. The outputs are re-enabled when the junction cools
down to approximately +140°C. This protection is only intended to
protect the device from failures due to excessive junction temperature
or loss of heat sinking and should not imply that output short circuits are
permitted.
As with all high-power integrated circuits, the printed wiring board
should utilize a heavy ground plane. For optimum performance, the
drivers should be soldered directly into the board. The power supply
should be decoupled with an electrolytic capacitorb (>10 IlF) as close
as possible to the device supply pin (V ss ).

3-82

VOIRECTION

----------------------------~

+

OUTA

O----+'

OUTs

+
0

+M~fN,1I\

OUTc

0

TYPICAL HALL EFFECT
SENSOR LOCATIONS

Dwg. No. W-193

3-83

HIGH-CURRENT BIPOLAR
HALF-BBIDGE MOTOR DHlVE
Designed for use as a general-purpose motor driver, the
UD02943Z half~bridge driver combines high-current sink and source
drivers with logic stages, level shifting, diode transient protection, and
a voltage regulator for single-supply operation. Capable of operating in
extremely harsh environments, this device can withstand high ambient
temperatures, output overloads, and repeated power supply transient
voltages without damage. The driver can be used in pairs for full-bridge
operation, or as triplets in three-phase brushless dc motor-drive applications.

o

The input circuitry is compatible with TTL, low-voltage CMOS, and
NMOS logic. Logic lockout prevents both source and sink drivers from
turning ON simultaneously. Each driver is turned ON by an active-low
input, making the UD02943Z especially desirable in many microprocessor applications. An accidental input open circuit will turn OFF the
corresponding output. The device also provides an internally-generated
dead time to prevent crossover currents during output switching.
Monolithic, space-saving construction offers reliability unobtainable
with discrete components.

>'
+

f-

::>

D

a.

Z

w

a:

~
()

a:

::>

::>

f-

::>

a.

0

f-

(!l

0

::>

f-

::>

a.

~
~

z

iii

0

en
Dwg. No. A-14, 135

Saturated output drivers provide for low saturation voltage at the
maximum rated current. Internal short-circuit protection, activated at
load currents above 1 A, protects the source driver from accidental
short-circuits between the output and ground.
The UD02943Z driver is rated for continuous operation with
inductive loads at supply voltages of up to 24 V. With the application
of increased supply voltages (to 45 V maximum), a high-voltage protection circuit becomes operative, shutting OFF both output drivers. The
internal thermal shutdown is triggered by a nominal junction temperature of 160°C.
Single-chip construction and a modified 5-lead power-tab TO-220
plastic package provide cost-effective and reliable systems designs.
It also features excellent power dissipation ratings, minimum size, and
ease of installation. The heat-sink tab is at ground potential and does
not require insulation.

ABSOLUTE MAXIMUM RATINGS

Supply Voltage, Range Vs ... 8.5 V to 45 V·
Output Voltage, VCE(sus)' • . . • . . . • . . • • 24 V
Input Voltage Range, VIN .•• -0.3 V to +18 V
Continuous Output Current, lOUT .... ±1.0 A
Package Power Dissipation,
Po" .................. See Graph
Operating Temperature Range,
TA' . • • . . • • • • . • • . . •• -40°C to +85°C
Storage Temperature Range,
Ts" .. .. .. . .. .. ... -55°C to +150°C
'Internal high-voltage shutdown above 26 V.

3-84

FEATURES
•
•
•
•
•
•
•
•
•
•

±1 A Output Current
8.5 V to 24 V Operating Range
Withstands 45 V Supply Transients
Crossover-Current Protected
Logic-Compatible Inputs
Saturated Output Drivers
Output-Transient Protection
Tri-State Output
Internal Over-Voltage Protection
Internal Short-Circuit Protection

FUNCTIONAL BLOCK DIAGRAM

SOURCE
INPUT

~------{

4 OUTPUT

SINK
INPUT

GROUND
Dwg. No. A-14,136

ALLOWABLE POWER DISSIPATION
AS A FUNCTION OF
AMBIENT TEMPERATURE

LOGIC TRUTH TABLE

a 151---+---+---T\.
~
iii5

Source Driver
Pin 2

II:

~
D.

W

W

~~

51----1-

Sink Driver
Pin 5

Output
Pin 4

Low

Low

High

Low

High

High

High

Low

Low

High

High

High Z

D.

w

....

III

~2.4
> 2.4
> 2.4
< 0.8

V
V
V
V

High
Low
Open
High

OUTPUT ENABLE

Oute
Low
High
Open
High

"'

o
Dwg. No. A-13,023

ELECTRICAL CHARACTERISTICS at TA

= +25°C, TJ ::;

+150°C, V BB

= 50 V, Vee = 5

V,

VSENSE = 0 V, RC = 20 kQ/470 pF to Ground.
Characteristic

Test Conditions

Min.

Limits
Typ.
Max.

Output Drivers (OUTA or OUT B)

Output Supply Range

VBB

6.5

-

50

V

Output Leakage Current

ICEX

VENABLE = 5 V, VOUT = VBB , (note)

-

-

50

I1A

VENABLE = 5 V, VOUT = 0 V, (note)

-

-

-50

I1A

50

-

-

V

-

1.0

1.2

V

1.2

1.4

V

1.5

1.8

V

-

50

I1A

1.8

2.2

V

Output Sustaining Voltage

VCElsus)

lOUT = ±2 A, L = 2 mH

Output Saturation Voltage

VCEISAT)

VENABLE = 0 V, lOUT = ±0.5 A

= ±1.0 A
lOUT = ± 2.0 A

VENABLE = 0 V, lOUT
VENABLE

= 0 V,

Clamp Diode Leakage Current

IR

VR= 50 V

Clamp Diode Forward Voltage

VF

IF

Motor Supply Current

=2 A

IBBION)

VENABLE

IBBIOFF)

VENABLE

= 0.8 V,

VREF = 2.4 V, No Load

= VREF = 2.4 V, No Load
VENABLE = 5 V, VREF = 0.8 V, No Load

20

30

mA

2.5

3.5

mA

40

60

mA

4.5

5.0

5.5

V

<-1.0

-10

I1A

-50

-200

I1A

Control Logic

Logic Supply Range

Vcc

Logic Input Current

IINll)

All Inputs = 2.4 V

IINIO)

All Inputs = 0.8 V

-

VIN(1 )

All Inputs

2.4

-

-

V

VINIO )

All Inputs

-

-

0.8

V

-

V

Logic Input Voltage

VREF Open-Circuit Voltage

VREFIOPEN)

IREF

-

=0

Vcc /2

Current Limit Threshold

V REFIV SENSE at Trip Point

9.5

10

Turn-On Delay

-

1.0

-

ton

All Drivers

Turn-Off Delay

tOil

All Drivers

Thermal Shutdown Temp.

TJ

Logic Supply Current

Icc

NOTE: Tests performed at OUTB with

VpHASE

= 0.8 V

= VREF = 2.4 V
VENABLE = 0.8 V, VREF = 2.4 V

VENABLE

and at OUTA with

VpHASE

10.5

I1s

1.0

-

I1s

165

-

°C

15

20

rnA

22

30

mA

= 2.4 V

3-93

TYPICAL APPLICATION
UDN2953B

+36V

APPLICATIONS INFORMATION
The UDN2953B and UDN2954W full-bridge motor drivers are ideal
for driving bidirectional dc servo, brush less dc, and 2-phase bipolar
stepper motors with various current-control formats. Output current
can be controlled by using an external sense resistor (RSENSE) and an
optional RC network and reference voltage for PWM current control,
or by using an external PWM source.
The output current trip point is set by:

'5V
PHASE

ENABLE
:ACTIVE LOW)

VREF

~-""'-'-'

o----{~~;;;~~~-----'
Dwg. No. A-12,649B

NOTE: Pin 3 must be
connected to an RC
network as shown, or
to Vcc' It must NOT be
left unconnected.

10 RSENSE
where the reference voltage (V REF ) can be between 2.4 V and 15 V.
If left unconnected, VREF defaults to Vc/2..(see Figure 1).
When the bridge is turned ON, current increases in the motor and
is sensed by the external sense resistor. When the current through the
sense resistor reaches the trip point, the internal comparator triggers
a monostable which turns OFF the sink drivers. As shown in Figure 2,
the actual load current peak will be slightly higher than the trip point
(especially for low-inductance loads) because of the internal logic and
switching delays. This delay (td) is typically 2 ~s.
After the sink drivers turn OFF, the motor current decays, circulating through the source driver and flyback diode. The sink driver's OFF
time (and therefore the magnitude of the current decrease) is determined by the monostable's external RC timing components, where
t If = RC within the range of 20 kn to 100 kn and 200 pF to 500 pF.
If the RC pin is tied to Vcc' interna: timing circuitry is activated,
allowing current control without an external RC network. The internally
generated to I is approximately 12 ~s at Vcc = 5 V and TA = +25°C,
increasing slightly with increasing temperatures. With RC tied to Vcc' Icc
will increase by approximately 6 rnA.
When the sink driver is re-enabled, the motor current is again
allowed to rise to the trip point. This cycle repeats itself, maintaining
the average motor current at the desired level.

Average motor current can also be controlled with external current
control logic by using the OUTPUT ENABLE pin. Toggling the OUTPUT
ENABLE pin shuts OFF both the source and sink drivers. Both the
flyback and ground-clamp diodes conduct during turn-OFF (anodes
(A pin) connected to ground and cathodes (K pin) connected to V B),
resulting in a very fast current decay. If the internal current controf
circuitry is not used, the RC pin should be connected to ground through
a 20 kn (minimum) resistor.
A logic low at the VREF'BRAKE pin turns ON both source drivers and
turns OFF both sink drivers, essentially shorting both ends of the motor
winding to the motor supply. In this condition, the back-electromotive
force (back-EMF) generated by the motor produces a current which
dynamically brakes the motor. Depending upon the rotational velocity
of the motor, this current level can approach that of a locked-rotor
condition (which is limited only by the resistance of the motor winding).
The internal current control circuitry is not operational when the brake
function is used. Therefore, care should be exercised when braking to
3-94

ensure that the current generated by the
back-EMF never exceeds the absolute
maximum rating of the drivers.

Figure 1

With bidirectional dc servo motors, the
PHASE pin can be used for direction control.
Similar to dynamically braking a motor,
changing the direction of a rotating motor
produces a current generated by the
back-EMF. Again, this current should not be
allowed to exceed the absolute maximum
rating.

50K

BRAKE

45K

An internally generated deadtime
(approximately 3 Jls) prevents crossover
currents that can occur when switching
phases or braking.
R SENSE

Dwg. No. A-13,025

Figure 2

Thermal protection circuitry turns OFF
all drivers when the junction temperature
typically reaches 165°C. It is only intended
to protect the device from failures due to
excessive junction temperature and should
not imply that output short circuits are
permitted. The thermal shutdown has a
hysteresis of approximately BOC.
The printed wiring board should utilize a
heavy ground plane. For optimum performance, the driver should be soldered directly
into the board. The load supply (V BB ) should
be decoupled with an electrolytic capacitor
(~1 0 IlF) as close as possible to the driver.

,/

CROSSOVER '
CURRENT DELAY

Dwg. No. WM-003-1

CURRENT CONTROL OPTIONS
Circuit Terminal
VREF/BRAKE

RC(TIMING}

VSENSE

OUTPUT ENABLE

NoPWM

Vee or High



~

Cl

II:

~

::li

w

50

'"z

iii

It
a:
>

1)
II:

5o.
ii!:

~

.~

z
w

!;!

w

C

~

10

11

~
o.
o.

50

::>

Ul
()

C!i

9

11

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o.
o.

w
()

::>

II:

~

::>

£l

Ul

Dwg. No. PP-D36

3-97

2961
IlIGIl-CURRENT IlALF-BRIDGE PRINTIlEADIMOTOR DRIVER

ELECTRICAL CHARACTERISTICS at TA =+25°C, VBB =45 V,
Vee = 4.75 V to 5.25 V, Rev = 2940 Q (unless otherwise noted).
Limits
Test Conditions

Characteristic

Min.

Typ.

Max.

<-1.0

-100

<1.0

100

I!A
I!A

Output Drivers
Output Leakage Current

ICEX

VEN = 0.8 V, VSOUACE = 0 V
VEN = 0.8 V, VSINK = 45 V

Output Saturation Voltage

VCE(SAT)

1.6

2.2

V

1.5

-

V

Sink Driver, lour = 3.4 A

-

1.0

1.4

V

Sink Driver, lOUT = 3.0 A

-

0.9

45

-

-

V

lour = ±3.4 A, L = 3 mH

100

I!A

Source Driver, lOUT = -3.4 A
Source Driver, lOUT = -3.0 A

Output Sustaining Voltage

VCE(SUS)

-

V

Recovery Diode Leakage Current

IA

VA = 45 V

-

<1.0

Recovery Diode Forward Voltage

VF

IF =3.4A

-

2.0

V

VEN = 2.0 V, VIN = 0.8 V, No Load

-

-

70

rnA

Motor Supply Current

IBB(on)

VEN = 0.8 V

-

-

2.5

rnA

Source Driver, lOUT = -3.4 A

-

600

ns

Sink Driver, lour = 3.4 A

-

-

600

ns

Source Driver, lOUT = -3.4 A

-

-

600

ns

-

600

ns

VIN(1)

2.0

-

-

V

VIN(O)

-

0.8

V

IBB(off)
Output Rise Time

Output Fall Time

tr

~

Sink Driver, lOUT = 3.4 A
Control Logic
Logic Input Voltage

Logic Input Current

Reference Input Current
Transconductance

Logic Supply Current

Turn On Delay

Turn Off Delay

Thermal Shutdown Temperature

IIN(1)

VIN =5.0 V

-

-

10

I!A

IIN(O)

VIN =0 V

-

-

-1.0

rnA

IAEF

VAEF = 5.0 V

-

-

50

I!A

ITAI"", AEF

VAEF = 1.0V

0.9

1.0

1.1

AN

VAEF = 3.2 V

0.9

1.0

1.1

AN

VEN = 2.0 V, VIN = 0.8 V, No Load

-

-

160

rnA

VEN =0.8V

15

rnA

Source Driver

-

600

ns

Sink Driver

-

600

ns

Source Driver

2.0

J.lS

Sink Driver

-

-

-

165

Icc

tpd(on)

tpd(off)
TJ

Negative current is defined as coming out of (sourcing) the specified device terminal.

3-98

2.0

J.lS

-

°C

2961
HIGH-CURRENT HALF-BRIDGE PRINTHEADIMOTOR DRIVER

APPLICATIONS INFORMATION
The UDN2961 B/W is a high current
half-bridge designed to drive a number of
inductive loads such as printer solenoids,
stepper motors, and dc motors. Load current
is sensed internally and is controlled by pulsewidth modulating (PWM) the output driver(s)
in a fixed off-time, variable-frequency format.
The peak current level is set by the user's
selection of a reference voltage. A slow
current-decay mode (chopping only the
source driver) or a fast current-decay mode
(chopping both the source and sink drivers)
can be selected via the MODE pin.

RECIRCULATION (SLOW·DECAY MODE)
RECIRCULATION (FAST-DECAY MODE)

A logic low on the MODE pin sets the
current-control circuitry into the slow-decay
mode. The RS flip-flop is set initially, and both
the source driver and the sink driver are
turned ON when the INPUT pin is at a logic
low. As current in the load increases, it is
sensed by the internal sense resistor until the
sense voltage equals the trip voltage of the
comparator. At this time, the flip-flop is reset
and the source driver is turned OFF. Over the
range of VREF = 0.8 V to 3.4 V, the output
current trip point transfer function is a direct
linear function of the reference voltage:

r-'
I t
I
I

-= +
ENABLE

INPUT

ITRIP = VREF
To ensure an accurate chop current level
(±1 0%), an external 2940 Q ±1 % resistor (Rev)
is used. The actual load current peak will be
slightly higher than the trip point (especially
for low-inductance loads) because of the
internal logic and switching delays (typically
1.5 )1s). After the source driver turns OFF,
the load current decays, circulating through
an external ground clamp diode, the load,
and the sink transistor. The source driver's
OFF time (and therefore the magnitude of
the current decrease) is determined by the
one-shot's external RC timing components:
t OFF = RC

within the range of 20 kQ to 100 kQ and
100 pF to 1000 pF. When the one-shot times
out, the flip-flop is set again, the source driver
is re-enabled, and the load current again is
allowed to rise to the set peak value and trip
the comparator. This cycle repeats itself,
maintaining the average load current at the
desired level.
A logic high on the MODE pin sets the
current-control circuitry into the fast-decay

~

I

-

-

-

,

-----

PWM CURRENT CONTROL

-

.l

-=

I
I
I
I
I

Dwg. No. EP-037

L

n

~

~

MODE

-.:j

r-

RC

LOAD
CURRENT

Dwg. No. WP-015

mode. When the peak current threshold is detected, the flip-flop is
reset and both the source driver and the sink driver turn OFF. Load
current decays quickly through the external ground clamp diode, the
load, and the internal flyback diode. In the fast-decay mode, the OFF
time period is one-half the time that is set by the external RC network
for the slow-decay mode:
RC
tOFF

=2

The amount of ripple current, when chopping in the fast-decay
mode, is considerably higher than when chopping in the slow-decay
mode.
3-99

The frequency of the PWM current control
is determined by the time required for the load
current to reach the set peak threshold (a
function of the load characteristics and Vss)
plus the OFF time of the switching driver(s)
(set by the external RC components).
To prevent false resetting of the flip-flop,
due to switching transients and noise, a
blanking time for the comparator can be set
by the user where ts ~ 3600 x C in the slowdecay mode or ts ~ 2400 x C in the fast-decay
mode. For C between 100 pF and 1000 pF,
ts is in jlS.

INPUT

ENABLE

MODE

POWER CONSIDERATIONS
The UDN2961 BIW outputs are optimized
for low power dissipation. The sink driver has
a maximum saturation voltage drop of only
1.4 V at 3.4 A, while the source driver has a
2.2 V drop at -3.4 A. Device power dissipation
is minimized in the slow-decay. mode, as the
chopping driver (the source driver) is ON for
less than 50% of the chop period. When the
source driver is OFF during a chop cycle,
power is disSipated on chip only by the sink
driver; the rest of the power is dissipated
through the external ground clamp diode. In
the fast-decay mode, the ON time of the
chopping drivers (both the source driver and
the sink driver) may be greater than 50%, and
the power dissipation will be greater.

GENERAL
A logic low on the ENABLE pin prevents
the source driver and the sink driver from
turning ON, regardless of the state of the
INPUT pin or the supply voltages. With the
ENABLE pin high, a logic low on the INPUT
pin turns ON the output drivers.
To protect against inductive load voltage
transients, an external ground clamp diode
is required. A fast-recovery diode is recommended to reduce power disSipation in the
UDN2961 BIW. The blanking time prevents
false triggering of the current sense comparator, which can be caused by the recovery
current spike of the ground clamp diode
when the chopping source driver turns ON.
The load supply (VB~) should be well
decoupled with a capacitor placed as close
as possible to the device.
The EMITIER pin should be connected
to a high-current power ground.
Thermal shutdown protection circuitry is

activated and turns OFF both output drivers at
3-100

INPUT

a junction temperature of typically +165°C. It is intended only to protect
the device from catastrophic failures due to excessive junction temperatures and should not imply that output short circuits are permitted. The
output drivers are re-enabled when the junction temperature cools
down to approximately + 145°C.

MOTOR DRIVER APPLICATIONS
Two UDN2961 BlWs can be cross connected as shown to form a
full-bridge driver circuit. Two full-bridge circuits are needed to drive a
two-phase bipolar stepper motor. When in a full-bridge configuration,
one INPUT signal must be logically inverted from the other INPUT
signal to prevent the simultaneous conduction of a source driver from
one half-bridge and the sink driver from the other half-bridge. In order
to prevent cross-over currents, a turn-ON delay time of 3 ILs is needed
between the time an INPUT signal for one of the half bridges goes high
and the INPUT signal for the other half bridge goes low.
In addition to the two external ground clamp diodes, diodes in
series with the load to the SINK OUT are needed in a full-bridge
configuration. These series diodes prevent the sink drivers from
conducting. on the inverse mode, which can occur when the opposite
half-bridge ground clamp diode is conducting and forces the sink
driver collector below ground.
If fast current decay is used (MODE = logic high) or pulse width
modulation of the load-current direction is used, diodes in series with
the load to the SOURCE OUT are needed. These series diodes prevent
the SOURCE OUT from inverse conducting during the recirculation
period and thereby prevent shoot-through currents from occuring as the
drivers turn back ON.

DUAL SOLENOID/MOTOR DRIVER
-PULSE-WIDTH MODULATED CURRENT CONTROL
GROUND

SENSEA

-

o

<..l

Vcc '
SOURCEB [--_+_,

o

SINKS ~~_.J------f

SENSEB
INB

.L__~

THSB~.-.. ._ _ _ _

Dwg. No. 0-1001

Using PWM to minimize power dissipation and maximize load
efficiency, the UDN2962W dual driver is recommended for impact
printer solenoids and stepper motors. It is comprised of two source/sink
driver pairs rated for continuous operation to ±3 A. It can be connected
to drive two independent loads or a single load in the full-bridge configuration. Both drivers include output clamp/flyback diodes, input gain
and level shifting, a voltage regulator for single-supply operation, and
pulse-width modulated output-current control circuitry. Inputs are
compatible with most TTL, DTL, LSTTL, and low-voltage CMOS or
PMOS logic.
The peak output current and hysteresis for each source/sink pair
is set independently. Output current, threshold voltage, and hysteresis
are set by the user's selection of external resistors. At the specified
output-current trip level, the source driver turns OFF. The internal
clamp diode then allows current to flow without additional input from
the power supply. When the lower current trip point is reached, the
source driver turns back ON.
The UDN2962W is in a 12-pin single in-line power tab package.
The tab is at ground potential and needs no insulation. For high-current
or high-frequency applications, external heat sinking may be required.

FEATURES
• 4 A Peak Output
• 45 V Min. Sustaining Voltage
•
•
•

Internal Clamp Diodes
TTL/PMOS/CMOS Compatible Inputs
High-Speed Chopper

ABSOLUTE MAXIMUM RATINGS
at TJ:S; +150°C
Supply Voltage, Vcc ............... 45 V
Peak Output Current, lOUT . . ........ ±4 A
Input Voltage Range,
VIN . . • • • . . . • . . . • • • • -0.3 V to +7.0 V
Package Power Dissipation,
PD' ................... See Graph
Operating Temperature Range,
T A • • . • . • . • • • • . . . . . • -20°C to +85°C
Storage Temperature Range,
Ts ................ -55°C to +150°C
NOTE: Output current rating may be limited by
duty cycle, ambient temperature, and heat sinking
Under any set of conditions, do not exceed the
specified peak current and a junction temperature
of +150'C.

Always order by complete part number: IUDN2962W/.
3-101

FUNCTIONAL BLOCK DIAGRAM
(ONE OF TWO DRIVERS)
Vee

SOURCE

_So"'~:}~O

/""_. . . .

Dwg. No. D-1 002

TRUTH TABLE

lOr---r---r---r---rr--,

z
o

~
~

6r---r-~~r---r

i5
II:
w

;;::
~

4r---j---

w

Cl
VTHS I10

NA

SOURCE
DRIVER

SINK
DRIVER

Off
On
Off

Off
On
On

ELECTRICAL .CHARACTERISTICS at TA

=

(unless otherwise noted).

+25°C, TJ ~ +150°C, Vee

=

45 V, VSENSE
Limits

Characteristic
Supply Voltage Range

Symbol

Test Conditions

Min.

Typ.

-

Max.

=

0V

JUnits

J

Vcc

Operating

20

ICEX

VIN = 2.4 V, VSOURCE = 0 V

<-1.0

-100

jlA

V IN = 2.4 V, V SINK = 45 V

-

<1.0

100

jlA

Source Drivers, ILOAD = 3.0 A

-

2.1

2.3

V

Source Drivers, ILOAD = 1.0 A

1.7

2.0

V

Sink Drivers, ILOAD = 3.0 A

-

1.7

2.0

V

Sink Drivers, ILOAD = 1.0 A

-

1.1

1.3

V

lOUT

= ±3.0 A, L = 3.5 mH
= 3.5 mH
VTHS = 1.0 V to 2.0 V, L = 3.5 mH
VTHS = 2.0 V to 5.0 V, L = 3.5 mH

45

V THS = 0.6 V to 1.0 V, L

-

-

±25

%

-

-

±10

%

-

-

±5.0

%

1.7

2.0

V

0.5

1.0

jls

0.5

1.0

jls

-

-

V

0.8

V

1.0

10

jlA

-20

-100

jlA

45

V

Output Drivers
Output Leakage Current

Output Saturation Voltage

VCE(SAT)

Output Sustaining Voltage

V CE(sus)

Output Current Regulation

t.louT

.
Clamp Diode Forward Voltage

VF

Output Rise Time

t,

Output Fall Time

tf

= 3.0 A
ILOAD = 3.0 A, 10% to 90%, Resistive Load
ILOAD = 3.0 A, 90% to 10%, Resistive Load
IF

-

V

Control Logic
Logic Input Voltage

2.4

V IN (l)
VIN(O)

Logic Input Current

IIN(l)
IIN(O)

= 2.4 V
VIN = 0.8 V
VIN

ITHS(ON)

V THS ~ 500 mV, VSENSE"; V THS /10.5

ITHS(HYS)

V SENSE ~ VTHs /9.5, VTHS

= 0.6 V to 5.0 V

-

-2.0

-

jlA

140

200

260

jlA

-

-

At Trip Point, VTHS = 2.0 V to 5.0 V

9.5

10

10.5

Supply Current
(Total Device)

Icc

VIN

= 2.4 V, Outputs OFF
VIN = 0.8 V, Outputs Open

-

8.0

12

mA

25

40

mA

Propagation Delay Time
(Resistive Load)

tpd

50% VIN to 50% V OUT' Turn OFF

-

-

2.5

jls

50% VIN to 50% VOUT' Turn ON

-

-

3.0

jls

100% V SENSE to 50% V OUT*

-

-

3.0

jls

V THSiVSENSE Ratio

• Where VSENSE ~ VTHS /9.5
NOTE: Negative current is defined as coming out of (sourcing) the specified device pin.

3-103

CIRCUIT DESCRIPTION
AND APPLICATIONS INFORMATION
The UDN2962W high-current driver is intended for use as a
free-running, pulse-width modulated solenoid driver.
Circuit Description. In operation, the source and sink drivers are
both turned ON by a low level at the input. The load current rises with
time as a function of the load inductance, total circuit resistance, and
supply voltage and is sensed by the external sense resistor (Rs). When
the load current reaches the trip point (I TRIP )' the comparator output
goes high and turns OFF the source driver. The actual load current will
peak slightly higher than ITRIP because of the internal logic and switching
delays.
After the source driver is turned OFF, the load current continues to
circulate through the sink driver and an internal ground clamp diode.
The rate of current decay isa function of the load inductance and total
circuit resistance.

Circuit Layout. To prevent interaction
between channels, each of the two high-level
power ground returns (the low side of the
sense resistors) must be returned independently to the low-level signal ground (pin 1).
The circuit common (pin 1) can then be
routed to the system ground.
The printed wiring board should utilize a
heavy ground plane. For optimum performance, the driver should be soldered directly
into the board.
The power supply (Vee) should be
decoupled with an electrolytic capacitor
(;2:10 j.!F) as close as possible to pin 7.

An internal constant current sink reduces the trip point (hysteresis)
until the decaying load current reaches the lower threshold, when the
comparator output goes low and the source driver is again turned ON.
Load current is again allowed to rise to the trip point and the cycle
repeats.
Maximum load current and hysteresis is determined by the user.
Determining Maximum Load Current and Hysteresis. Trip
current (I TRIP) is determined as a function of resistance Rs and the
threshold voltage, VTHS :

Owg.OP-001

VTHs
10 R

ITRIP = - -

TYPICAL WAVESHAPES

S

where VTHS = 10' VSENSE = 0.6 V to 5.0 V.
Hysteresis percentage (H) is determined by resistance RH and is
independent of the load current:

VS1NK

L
"-----'

~_vcc
" - - - - - ' '="GN"'Oc----

RH
H=----..:..:50' VREF
The chopping frequency is asynchronous and a function of the
system and circuit parameters, including load inductance, supply
voltage, hysteresis setting, and switching speed of the driver.
V THS --....nJlJl..ns

~

Resistance RT is determined as:
R _
T-

Note that if VTHS

3-104

RHVTHS

VREF - VTHS

= VREF. then

RT

=

00.

Owg. WP-006

APPLICATIONS INFORMATION
RESISTOR By VALUE
AS A FUNCTION OF PEAK LOAD CURRENT

RESISTOR ~ VALUE
AS A FUNCTION OF HYSTERESIS
5

0

VREFI': 5V

l/"

I

./

5

"

0:

10

5

o
o

./
.",..,
20

l/"

40

0:

60

80

100

HYSTERESIS, H, IN PERCENT

10r---+---~---+----r---1---~'

o~~~~U~
o
0.5

lO

1.5

2.0

LOAD CURRENT.

IMAx, IN AMPERES

Dwg. No. A-12,417

Dwg. No. A·12,416

MOUNTING POWER TAB DEVICES
Power-tab packages are efficient thermal dissipators when properly
utilized. In application, the following precautions should be taken:
1. Always fasten the tab to the heat sink before the leads are soldered
to fixed terminals.

2. Strain relief must be provided if there is any probability of axial
stress to the leads.

3. Thermal grease (Dow Corning 340 or equivalent) should always be
used. Thermal compounds are better heat conductors than air but
not a good substitute for flat mating surfaces.

4. The mounting surface should be flat to within 0.002 inch/inch
(0.05 mm/mm).

5. Brute force mounting to poorly finished heat sinks can cause
internal stresses which damage silicon chips and insulation parts.
Mounting torque should be between 4 and 8 inch pounds
(0.45 to 0.90 Nm.)
6. The mounting holes should be as clean as possible with no burrs
or ridges.
7. Use appropriate hardware including a lock washer or torque washer.
8. If insulating bushings are used, they should be of dialylphthalate.
fiberglass-filled polycarbonate, or fiberglass-filled nylon. Unfilled
nylon should be avoided.

3-105

8-CHANNEL SOURCE DRIVERS
Recommended for high-side switching applications that benefit
from separate logic and load grounds, these devices encompass
load supply voltages to 80 V and output currents to -500 mA. The
UDN2981A through UDN2984A1LW 8-channel source drivers are
useful for interfacing between low-level logic and high-current loads.
Typical loads include relays, solenoids, lamps, stepper and/or servo
motors, print hammers, and LEOs.

UDN2982/84LW

@,

~

UDN2981-84A

All devices may be used with 5 V logic systems - TTL, Schottky
TTL, DTL, and 5 V CMOS. The UDN2981A and UDN2982A1LW are
interchangeable, will withstand a maximum output OFF voltage of 50 V,
and operate to a minimum of 5 V; the UDN2983A and UDN2984A1LW
drivers are interchangeable, will withstand an output voltage of 80 V,
and operate to a minimum of 35 V. All devices in this series integrate
input current limiting resistors and output transient suppression diodes,
and are activated by an active high input.
The suffix W (all devices) indicates an 18-lead plastic dual in-line
package with copper lead frame for optimum power dissipation. Under
normal operating conditions, these devices will sustain 120 mA continuously for each of the eight outputs at an ambient temperature of +50°C
and a supply of 15 V.

Dwg ..No. A·1O, 243

ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
Output Voltage Range, VCE
(UDN2981A &
UDN2982A/LW) ......... 5 V to 50 V
(UDN2983A &
UDN2984NLW) ........ 35 V to SO V
Input Voltage, V1N
(UDN2981A & UDN2983A) ...... 15 V
(UDN2982NLW &
UDN2984NLW) ............... 20 V
Output Current, lOUT' ........... -500 mA
Package Power Dissipation,

The suffix 'LW' (UDN2982LW and UDN2984LW only) indicates
a surface-mountable wide-body SOIC package. All devices are also
available for operation between -40°C and +85°C. To order, change
the prefix from 'UDN' to 'UDQ'.

FEATURES
• TTL, DTL, PMOS, or CMOS Compatible Inputs
• 500 mA Output Source Current Capability
• Transient-Protected Outputs
• Output Breakdown Voltage to 80 V
• DIP or SOIC Packaging

PD' ................... See Graph
Operating Temperature Range,
T A .•••.••••.••••••• -20°C

to +S5°C

Storage Temperature Range,
T s' ............... -55°C to +150°C
Note that the UDN2982/84A (dual in-line package)
and UDN2982/84LW (small-outline Ie package),
respectively, are electrically identical and share a
common pin number assignment.

3-106

Always order by complete part number, e.g.,

IUDN2981A I.

Note that all devices are not available in both package types.

ELECTRICAL CHARACTERISTICS at TA = +25°C (unless otherwise specified).
Characteristic
Output Leakage Current

Symbol
ICEX

Applicable
Devices

Input Current

Clamp Diode
Leakage Current

Is

IR

Units

-

-

200

llA

UDN2983/84t

VIN ~ 0.4 V*, Vs ~ 80 V, TA ~ +70'C

1

-

-

200

llA

VIN ~ 2.4 V, lOUT ~ -100 mA

2

-

1.6

1.8

V

VIN ~ 2.4 V, lOUT ~ -225 mA

2

-

1.7

1.9

V

VIN ~ 2.4 V, lOUT ~ -350 mA

2

-

1.8

2.0

V

VIN ~ 2.4 V

3

-

140

200

llA

VIN ~ 3.85 V

3

-

310

450

llA

VIN ~ 2.4 V

3

-

140

200

!lA

VIN ~ 12 V

3

-

1.25

1.93

mA

UDN2981/83A

VIN ~ 2.4 V, VCE ~ 2.0 V

2

-350

-

-

mA

UDN2982/84t

VIN ~ 2.4 V, VCE ~ 2.0 V

2

-350

-

-

mA

All

UDN2982/84t

Supply Current
(Outputs Open)

Limits
Typ. Max.

1

UDN2981/83A

lOUT

Min.

VIN ~ 0.4 V*, Vs ~ 50 V, TA ~ +70'C

IINION)

Output Source Current

Test
Fig.

UDN2981182t

Collector-Emitter
Saturation Voltage
VCEISAT)

Test Conditions

U DN2981 182t

VIN~2.4V*, Vs~50V

4

-

-

10

mA

UDN2983/84t

VIN~2.4V*, Vs~80V

4

-

-

10

mA

UDN2981/82t

V R ~ 50 V, VIN ~ 0.4 V*

5

-

-

50

!lA

UDN2983/84t

V R ~ 80 V, VIN ~ 0.4 V*

5

-

-

50

llA

Clamp Diode
Forward Voltage

VF

All

IF ~ 350 mA

6

-

1.5

2.0

V

Turn-On Delay

tON

All

0.5 EIN to 0.5 EOUT' RL ~ lOOn,

-

-

1.0

2.0

115

tOFF

All

0.5 EIN to 0.5 EOUT' RL ~ lOOn,

-

-

5.0

10

115

Vs ~ 35 V
Turn-Off Delay

Vs ~ 35 V, See Note
NOTES: Turn·off delay is influenced by load conditions. Systems applications well below the specified output loading may require timing considerations
for some designs, i.e., multiplexed displays or when used in combination with sink drivers in a totem pole configuration.
Negative current is defined as coming out of (sourcing) the specified device terminal.
* All inputs Simultaneously.

t Complete part number includes suffix to identify package style: A = DIP, LW

= SOIC.

3-107

ONE OF EIGHT DRIVERS

g;:

25,---,---,---,---,-----,

'"

~ 2.0f-~_ _+_--+--_+--__I--_l

20 K

~

iii
en
2i 1.51o----+--~
a:
w

~

2983/84 ONLY

~ l.of---_+_---"'~

"..:u
"..:

3 K

INPUT

OUTPUT

a.
w

O.51----+----t----+""""~_'\01:--___l

...J
III

~

j

~~5--~50--~7~5---1~O-O--1...J2~5--3015·0

..:

AMBIENT TEMPERATURE IN

°c
Dwg. GP-018A

Dwg. No. k10,2428

TEST FIGURES
FIGURE I

FIGURE 2

FIGURE 3

OPEN

Dwg. No. A-11 ,084

Dwg. No. A·11 ,083

FIGURE 4

FIGURE 5

Dwg. No, A-11 ,085

FIGURE 6

OPEN

OPEN

Dwg. No. A-11 ,086

3-108

Dwg. No. A-11 ,087

Dwg. No. A·ii,DBB

ALLOWABLE PEAK. COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
SERIES UDN29S0A
500

500

450

450

u 400

400
J5 a

g
:;:

RECOMMENDED MAXIMUM OUTPUT CURRENT

\\ .\ ~

]00

\

a
20 a

~~~
"- ~ ......
~ ......"""'-. .......... ['...

NUMBER OF OUTPUTS .....
CONDUCTING
SIMULTANEOUSLY

a

01

Vs = '35 V

"
'"

"- ~

l

I

1--.........

............

::::.... :--....... r-....
-........::

<

RECOMMENDED MAXIMUM OUTPUT CURRENT
350

~ 300

III::

250

8

200

g

~ 150

Ig

100

;(

50

JO

20

40
SO
60
PER CENT DUTY CYCLE

70

I

BO

90

SIMULTANEOUSLY

Hv,

ao

100

I': ~
.........

NUMBER OF OUTPUTS)l"8 7 ."""
CONDUCTING

w

f::::::

'" ,"

]1"-..

~\ ~ ~ ~
'\
~ ~~

il

50

0

\ ~\1\

E

= 35 V

10

I
40
50
60
PER CENT DUTY CYCLE

20

Dwg. No. A-11,1068

"""'-.

i'-.

~

............

I'--. I-...
..:::::: ~ t---....
-.;;:

70

BO

90

100

Dwg. No. A-11,111B

SERIES UDN29SlIS2A
50 a

50a

45 a

45 a

40 a

a
J5

u

g
RECOMMENDED MAXIMUM OUTPUT CURRENT

\\.\ \

30 a

\~'\l"

20 a

NUMBER OF OUTPUTS .....

CONDUCTING
SIMULTANEOUSLY

15 a

°H

'":::--:::::
~

V, = 15 V

I"

I

a

0
0

~

~
.....
,,~ ~
............
t'-... ~
r-

25 a

10

~

--r::::
r--

400

~]5O
;z:

20

30

50
PER CENT DUTY CYCLE

70

80

90

100

'"
~ 0-:" '"

\\\ \

300

~

~ 250

8
~

~

9

100

.......

~

,...."

r--.......

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY

~ 150

;(

i'-.

~ ~;:.~ ~ ........
X :::..:: t:'--.. t'- i'-.......
:-....: ~ ~
.........

200

50

1

RECOMMENDED MAXIMUM OUTPUT CURRENT

0

v,

10

= 15V

20

I
30

so

.0

70

80

90

100

PER CENT DUTY CYCLE

Dwg. No. A-11,107B

Dwg. No. A-11,10BB

3-109

ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
SERIES UDN2983/84A
500

50 0

450

450

400

'00
RECOMMENDED MAXIMUM OUTPUT CURRENT

350

~
\\ \ r'\.
\.\
\ ~""- ~

300

250

"

' ' "-

I'-...

~~

200

NUMBER OF OUTPUTS

150

CONDUCTING
SIMULTANEOUSLY

100

1

v,

50

o

o

10

= 60 V

20

.............

40

50

60

70

\~

," "''""
\ r'\.

"

~

NUMBER OF OUTPUTS ........

CONDUCTING

15 0

SllMULTANEOUSlY

10

:]
0

100

PER CENT DUTY CYCLE

Dwg. No. A-11,1098

V,

10

= 60 V

20

I

r--...

r--...

~ i'....'

20 0

b::;::
90

\' \

25 0

........

80

RECOMMENDED MAXIMUM OUTPUT CURRENT

300

"""-

..........
"/~::::::- ~ I'-... ..........

I
30

350

.......

~
.............

" '"~ ::::--h:"" p:::::

~ ~ I'-.. .......

......

~

-..........:

30

40
50
60
PER CENT DUTY CYCLE

70

80

90

Dwg. No. A-l1, 110B

INPUT CURRENT AS A FUNCTION
OF INPUT VOLTAGE

TYPICAL ELECTROSENSITIVE
PRINTER APPLICATION

2.5

2.0

;/

<

.EEl.5

~

.-:

~~/

~

'"'":::J
U
I-

,
~l'{'i'\c,~
~

l.0

:::J

./

Q.

~

./I" V

0.5

~

. /~

)..--

V~

',""
2

4

10

12

INPUT VOlTAGE (VOlTS)

Dwg. No. A-11,1158

3-110

Dwg. No. A-11.113A

100

8-CHANNEL SOURCE DRIVER
Recommended for applications requiring separate logic and load
grounds, load supply voltages to 30 V, and load currents to 250 mA, the
UDN2985A source driver is used as an interface between standard lowpower digital logic and LEDs, relays and solenoids. The outputs feature
saturated transistors for low collector-emitter saturation voltages.
The UDN2985A driver is for use with 5 V logic systems-TTL,
Schottky TTL, DTL, and CMOS. This device has a minimum output
breakdown rating of 30 V with a minimum output sustaining voltage of
15 V. The output is switched ON by an active high input level.
Under normal operating conditions, this device can source up to
120 mA for each of the eight outputs at an ambient temperature of 75°C
and a supply voltage of 15 V. It incorporates input current-limiting
resistors and output transient suppression diodes.
The UDN2985A source driver is supplied in an 18-lead dual in-line
package. All inputs are on one side of the package, output pins on the
other, to simplify printed wiring board layout.

FEATURES
Dwg. No. A-10,243

• TTL, DTL, or CMOS Compatible Inputs
• 250 mA Output Source Current Capability
• Output Transient-Suppression Diodes
.30 V Minimum Output Breakdown Voltage
• Low Output-Saturation Voltage

PARTIAL SCHEMATIC DIAGRAM
1 OF 8 DRIVERS

v,

ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Driver Supply Voltage, Vs ........... 30 V
Continuous Output Current,
-250 rnA
...•.••.•.•••••• -20 V

lOUT . . . . . • . . . . . . . . . . . . . . .

I NPUT o--~.,f\N-.....-.....--I

10 K
'--~--o

OUTPUT

30 K

Input Voltage, VIN
Package Power Dissipation,
Po ........................ 2.2W'
Operating Temperature Range,
TA

••••.•..••••••••.

-20°C to +85°C

Dwg. No. DS-1 013

Storage Temperature Range,
Ts ................ -55°C to +150°C
"Derate althe rate of 18 mW/oC above TA", 25°C

Always order by complete part number: I UDN2985AI_
3-111

ELECTRICAL CHARACTERISTICS at TA = 25°C, Vs = 30 V (unless otherwise noted),
limits
Characteristics

Symbol

Test Conditions

Output Leakage Current

ICEX

V IN = 0.4 V, V OUT = 0 V

Min.

Max.

Units

-100

~A

-

-

V

V IN = 2.4, lOUT = -60 mA

-

0.8

1.1

V

V IN = 2.4, lOUT = -120 mA

-

0.9

1.2

V

V IN = 2.4 V

-

90

225

~

V IN =5.0 V

-

280

650

~A

IIN(OFF)

V IN = 0.4 V

-

10

15

~A

Is

Vs = 30 V, V IN = 2.4 V

-

10

15

mA

IR

V R =30V,TA =70°C

-

<1.0

50

~A

VF

IF =120mA

-

1.1

2.0

V

VCE(sus)

. lOUT = -120 mA, L = 3 mH

Output Saturation Voltage

VCE(SAT)

Supply Current

Typ.
<-1.0

15

Output Sustaining Voltage

Input Current Voltage

-

liN (ON)

(outputs open)
Clamp Diode
Leakage Current
Clamp Diode
Foward Voltage
Turn-On Delay

tON

-

0.5

1.0

~s

Turn-Off Delay

tOFF

-

5.0

10

~s

NOTE: Negative current is defined as coming out of (sourcing) the specified device pin.

COMMON-CATHODE LED DRIVER
TO OTHER DIGITS

~IT
I SE1LECT
3-112

Dwg. No. OS-1014

8-CHANNEL SOURCE DRIVER
WITH OVER-CURRENT PROTECTION
Providing over-current protection for each of its eight sourcing
outputs, the UDN2987A driver is used as an interface between standard low-level logic and relays, motors, solenoids, LEOs, and incandescent lamps. The device includes thermal shutdown and output transient
protection/clamp diodes for use with sustaining voltages to 35 V.
In this driver, each channel includes a latch to turn OFF that
channel if the maximum channel current is exceeded. All channels are
disabled if the thermal shutdown is activated. A common FAULT output
is used to indicate either chip thermal shutdown or any over-current
condition. All outputs are enabled by pulling the common OE/R input
high. When OE/R is low, all outputs are inhibited and the eight latches
are reset. The UDN2987A is supplied in a 20-lead dual in-line plastic
package.
Under normal operating conditions, each of eight outputs will
source in excess of 100 mA continuously at an ambient temperature of
25°C and a supply of 35 V. The over-current fault circuit will protect the
device from short-circuits to ground with supply voltages of up to 35 V.
The inputs are compatible with 5 V and 12 V logic systems-TTL,
Schottky TTL, DTL, PMOS, and CMOS. In all cases, the output is
switched ON by an active high input level.
Dwg. No. A-13,285

ABSOLUTE MAXIMUM RATINGS
at TA = +25°C

FEATURES
•
•
•
•
•
•

350 mA Output Source Current
Over-Current Protected
Internal Ground Clamp Diodes
Output Breakdown Voltage 35 V, Minimum
TTL, DTL, PMOS, or CMOS Compatible Inputs
Internal Thermal Shutdown

Driver Supply Voltage, Vs' .......... 35 V
Output Sustaining Voltage, VCE(sus) •••• 35 V
Continuous Output Current,
lOUT' . . . . . . . . . . . . . . . . . . . -500 rnA'

FAULT Output Voltage, VCE' •••.•.•• 35 V
FAULT Output Current, Ic' ........ 30 rnA
Input Voltage, V1N .••.••.•.••••.••• 15 V
Package Power Dissipation,
PD' ................... See Graph
Operating Temperature Range,
TA

•.•..•.•..•.•.•••

-20°C to +85°C

Storage Temperature Range,
Ts ................ -55°C to +150°C
• Outputs are disabled at approximately -500 mA
per driver.

Always order by complete part number: 1UDN2987 A I·
3-113

III 2. 5

~

z

Z 2.
o

:
Cij

~

Cl
II:

1. 5

w

~ 1. 0
'><"
w
CJ

~ o. 5

W

..J

III

~
:::l

'"

FUNCTIONAL BLOCK DIAGRAM

O~

0
25

"'N~.~

'~

INN 0 - - . . - - - - - - 1

"

50
75
100
AMBIENT TEMPERATURE IN

~

125

150

OE/R

°c

ONE OF EIGHT DRIVERS
COMMON CONTROL

o--_._-q

Dwg. GS-004-1

FAULT

Dwg. No. A-13,286

OVER-CURRENT FAULT SENSE

OUTPUT CURRENT WAVE SHAPES

Vs

L

+

,

~tPHL

OE/R-+------------

VSENSE

1M -+----+\
10UT-A

OUTPUT A SHORTEDLJ

I

_________ I L

IM~
10UT-B

~ tL~----lJL
MOMENTARY FAULT C( lj.ls)

Dwg. No. A-13,293

3-114

ELECTRICAL CHARACTERISTICS at TA

= 25°C, VOE = 2.4 V, Vs = 35 V

(unless otherwise noted).
Characteristic

Symbol

Functional Supply Range

Vs

Output Leakage Current

IcEX

Output Sustaining Voltage
Output Saturation Voltage

VOUT(SUS)
V OUT(SAT)

Test Conditions

7.0

FAULT Saturation Voltage
Input Voltage

-200

I1A

-

V

VIN = 2.4 V, lOUT = -100 mA

-

1.6

1.8

V

1.7

1.9

V

1.8

2.0

V

<-5.0

1M

VIN = 2.4 V

-500

-

mA

IcEX

Vcc = 35 V

-

<1.0

100

I1A

VCE(SAT)

Ic = 30 mA

-

0.3

0.8

V

2.4

-

-

V

0.4

V

125

170

I1A

840

1020

I1A

1500

1800

I1A

VIN(ON)

IINION)

V IN =2.4V

IIN(OFF)

VIN = 0.4 V

Clamp Diode Leakage Current

IR

V R = 35 V, TA = 70°C

Clamp Diode Forward Voltage

VF

IF = 350 mA

ISION )

VIN = 2.4 V', Outputs Open

IS(OFF)

VIN = 0.4 V'

Thermal Shutdown

TJ

Thermal Hysteresis

L>.TJ

Dead Time

V

-

VIN = 12 V

Propagation Delay Time

Units

35

-

VIN = 5.0 V

Supply Current

-

35

VINIOFF)
Input Current

Limits
Max.

lOUT = -350 mA, L = 2.0 mH

VIN = 2.4 V, lOUT = -225 mA

FAULT Leakage Current

Typ.

VIN = 0.4 V'

VIN = 2.4 V, lOUT = -350 mA
Channel Shutdown Threshold

Min.

tpLH

RL = 100n

tpHL

RL = 100n

td

-400

-

-

15

I1A

-

50

I1A

1.5

1.8

V

13

18

mA

8.0

12

mA

165

-

°C

15
0.3

0.6

115

2.0

4.0

liS

1.0

-

liS

°C

'All inputs simultaneously.

3-115

APPLICATIONS INFORMATION
AND CIRCUIT DESCRIPTION

ALLOWABLE OUTPUT CURRENT
AS A FUNCTION OF DUTY CYCLE

400
U 350

u-,
~

\

I Vs =35V I

300

~ \.'

'\~

~ 250
I--

z

200

w

g;'"

150

'"2

100

u
u

',""

~

~

'" "::::::

!;(

~

~~

NUMBER OF OUTPUTS
CONDUCTING SIMULTANEOUSLY

~8~
J

"~

~

........

.............

.............

w

-'
-'

o

U

50

o
o

10

20

30

40

50

60

70

80

90

100

PERCENT DUTY CYCLE
Dwg. No. A-13,288

oU 350~==t===~~~~~~~~---i~-t---t--~2
~ 300~~===+~-+~~~~.-~~+-~~~~~

!;(

~ 250b---b---b---b-~~~~~~-4~
~
~

200b-~--~--~---4--~~~~

w

'"g;

150

'"2

100b-~,-~--~---4---4---+---+---+~~~~

U

U

w
-'
-'

o

NUM BER OF OUT PUTS -'-----'------7'-+-""'...,--:"""',---"""""--1f"'ooo.~
CONDUCTING SIMULTANEOUSLY

50b-~~~--~---4---4---+---+---+---+---1

U

°0~~10~~20~~370--~40~~50~-6~0~~7=0'-~8=O~~9~O~~100
PERCENT DUTY CYCLE
Dwg. No. A-13,289

3-116

As with all power integrated circuits, the
UDN2987A has a maximum allowable output
current rating. The 500 mA rating does not
imply that operation at that value is permitted or
even obtainable. The channel output current
trip point is specified as -400 mA, minimum;
therefore, attempted operation at current levels
greater than -400 mA may cause a fault
indication and channel shutdown. The device
is tested at a maximum of -350 mA and that is
the recommended maximum output current
per driver. It provides protection for current
overloads or shorted loads up to 35 V.
All outputs are enabled by pulling the
OE/R input high. When OE/R is low or allowed
to float (internal pull-down), all outputs are
inhibited and the latches are reset. Note that
the RESET pulse duration (OE/R low) should
be at least 1 IJ.s. This will ensure safe operation
under attempted RESET conditions with a
shorted load. The latches are also reset during
power-up, regardless of the state of the OE/R
input.
The load current causes a small voltage
drop across the internal low-value sense
resistor. This voltage is compared to the
voltage drop across a reference resistor with a
constant current. The two resistors are
matched to eliminate errors due to manufacturing tolerances or temperature effects. Each
channel includes a comparator and its own
latch. An over-current fault (VSENSE > V REF ) will
set the affected latch and shut down only that
channel. All other channels will continue to
operate normally. The latch includes a 1 IJ.s
delay (td) to prevent unwanted triggering due to
crossover currents generated when switching
inductive loads. For an abrupt short circuit, the
delay and output switching times will allow a
brief, permissable current in excess of the trip
current before the output driver is turned OFF.
A common thermal shutdown disables all
outputs if the chip temperature exceeds
+ 165°C. At thermal shutdown, all latches are
reset. The outputs are disabled until the chip
cools down to about + 150°C (thermal
hysteresis).
A common open-collector FAULT output is
used to indicate any channel over-current
condition or chip thermal shutdown.

DUAL H-BBIDGE MOTOR DRIVERS
UDN2993B
LOGIC SUPPLY

LOAD SUPPLY

ENABLEB
PHASE B
GROUND
GROUND

OUT2B

--..--...-

VEB

Dwg. No. A-12,455

ABSOLUTE MAXIMUM RATINGS
at T J ~ +150°C
Load Supply Voltage, VBB ........... 40 V
Logic Supply Voltage, Voo .......... 7.0 V
Logic Input Voltage Range, VPHASE or
V ENABLE . . . . . . . . -0.3 V to V DD + 0.3 V
Output Current, lOUT ........... ±600 rnA
Sink Driver Emitter Voltage,
~

......................... 15V

Package Power Dissipation,
PD' ................... See Graph

Operating Temperature Range,

Cost-effective monolithic drive electronics for bipolar stepper and
dc (brush) servo motors to 40 V and 500 mA is very practical with the
UDN2993B and UDN2993LB. These dual full-bridge motion control ICs
integrate separate inputs, level shifting for upper power outputs, control
logic, integral inductive transient protection, and source (upper) and
sink (lower) drivers in an H-bridge configuration. The single-chip power
IC provides improved space utilization and reliability unmatched by
discrete component circuitry.
Excepting the power supply connections, the two H-bridges are
independent. An ENABLE input is provided for each bridge and permits
pulse-width modulation (PWM) through the use of external circuitry.
PWM drive techniques provide the benefits of reduced power dissipation, improved motor performance (especially torque), and positively
affect system efficiency. Separate PHASE inputs for each bridge
determine the direction of current flow in the load. Additionally, each
pair of (sink) emitters are terminated to package connections. This
allows the use of current-sensing circuitry. Both devices incorporate an
intrinsic "dead time" to preclude high crossover (or cross-conduction)
currents during changes in direction (phase).
These devices are packaged in plastiC DIPs (suffix B) or surfacemountable wide-body SOICs (suffix LB) with copper lead frames for
optimum power dissipation without heat sinks. The lead configurations
allow automatic insertion, fit standard IC sockets or printed wiring board
layouts, and enable easy attachment of a heat sink for maximum
power-handling capability. The heat-sink tabs are at ground potential
and require no insulation.
Dual full-bridge drivers with peak current ratings of ±3 A are
supplied as the UDN2998W.

JFEATURES
IiI!I ±600 mA Output Current

III
II
III
III
II
III

Output Voltage to 40 V
Crossover Current Protection
TTL/NMOS/CMOS Compatible Inputs
Low Input Current
Internal Clamp Diodes
DIP or SOIC Packaging

T A . . . . • . • . . . . . • . . • . -20 c C to +85°C
Storage Temperature Range,
Ts ................ -55°C to +150°C
IMPORTANT: Load supply voltage must never be
applied without logic supply voltage present.
NOTE: Output current rating may be limited by
chopping frequency, ambient temperature, airflow,
and heat sinking. Under any set of conditions, do
not exceed the specified maximum current and a
junction temperature of +150"C.

it

Always order by complete part number:
Part Number

Package

UDN2993B

16-Pin DIP

UDN2993LB

20-Lead Wide-Body SOIC

1M#?

..

e'

k&

..

, hPi"·

f

~M

",.,

3-117

UDN2993LB
FUNCTIONAL BLOCK DIAGRAM
(One of Two Drivers)

LOGIC

LOAD

SUPPLY

SUPPLY
ENABLEA

ENABLES

PHASEA

PHASE S

GROUND

GROUND

GROUND

GROUND

GROUND

GROUND

GROUND

GROUND

OUl2S

"----...-

VES

Dwg. No. A-14.340

Dwg. No. A-12,447

TRUTBTABLE
Enable
Input

Phase
Input

Output 1

Output 2

High

High

Low

High

High

Low

High

Low

Low

High

Low

Open

Low

Low

Open

Low

VENABLE

VPHASE

+
lOUT

Dwg. GP·021

3-118

Dwg. No. A-12,448

ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 40 V, VDD
Figure 1 (unless otherwise noted).

= 5 V, VE =0 V, TJ ~ +150°C
Limits

Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

I

Units

Output Drivers
Operating Voltage Range

VBB

Output Leakage Current

ICEX

Output Saturation Voltage

VCE(SAT)

10

-

40

V

VENABLE = 0.8 V, VOUT = VBB' Note 2

-

< 1.0

10

~

VENABLE = 0.8 V, VOUT = 0 V, Note 2

-

< -1.0

-10

~

VENABLE = 2.4 V, lOUT = 500 rnA

-

1.6

1.8

V

VENABLE = 2.4 V, lOUT = -500 rnA

-

1.6

2.0

V

40

50

-

V

Output Sustaining Voltage

VCE(Sus)

lOUT = ±500 rnA, Figure 2, Note 2

Motor Supply Current

IBB(ON)

VENABLE = 2.4 V, Outputs Open, Note 2

-

1.0

3.0

rnA

IBB(OFF)

VENABLE = 0.8 V, Outputs Open, Note 2

-

250

300

~

t,

lOUT = -500 rnA, VBB = 30 V

-

-75

Source Driver Fall Time

\

lOUT = -500 rnA, VBB = 30 V

-

280

-

ns

Clamp Diode Forward Voltage

VF

IF =500 mA

-

1.6

1.8

V

IIN(1)

VPHASE or VENABLE = 2.4 V

-

< 1.0

10

~

IIN(O)

VPHASE or VENABLE = 0.8 V

-

-200

-300

~

Source Driver Rise Time

ns

Control Logic (PHASE or ENABLE)
Logic Input Current

Logic Input Voltage

VIN1 )

2.4

-

-

V

VIN10l

-

-

0.8

V

Logic Supply Current

IDD

-

14

20

mA

Turn-On Delay Time

tpdo

ENABLE Input to Source Drivers

-

250

-

ns

Turn-Off Delay Time

tpd1

ENABLE Input to Source Drivers

-

500

-

ns

NOTES: 1. Each driver is tested separately.
2. Test is performed with VpHASE

=0.8 V and then repeated for VpHASE =2.4 V.

3. Negative current is defined as coming out of (sourcing) the specified device pin.

3-119

TYPICAL APPLICATION

TEST FIGURES

2-PHASE BIPOLAR STEPPER MOTOR DRIVE
(Chopper Mode)

FIGURE I

+36V

+5V

+5V

Dwg. No. A-12.449

Dwg. No. A-12,453

FIGURE 2
Voo = 5V

INPUT A

+5V
O

L

J

+ 5V - - - - ,
INPUT B

O

Ves" 40V

.----,

L-.J

L-

Dwg. No. A·12,454
Dwg. No. A-12,450

3-120

DUAL FULL-BRIDGE
MOTOR DRIVER

GROUND -

PHASEA

o

~

OUT 1A L:"=----_I----r

OUT

2Aram:--r-----...J

ENABLE.

o

~

PHASE.Ii~'-----1_ _ _~_.l

___J
Dwg. No. W-106

As an interface between low-level logic and solenoids, brushless
dc motors, or stepper motors, the UDN2998W dual full-bridge driver will
operate inductive loads up to 50 V with continuous output currents of
up to 2 A per bridge or peak (start-up) currents to 3 A. The control
inputs are compatible with TTL, DTL, and 5 V CMOS logic. Except for a
common supply voltage and thermal shutdown, the two drivers in each
package are completely independent.
For external PWM control, an Output Enable for each bridge circuit
is provided and the sink driver emitters are pinned out for connection to
external current-sensing resistors. The chopper drive mode is characterized by low power dissipation levels and maximum efficiency. A
PHASE input to each bridge determines load-current direction.
Extensive circuit protection is provided on-chip. Both ground-clamp
and fly back diodes for each bridge are provided. A thermal shutdown
circuit disables the load drive if chip temperature rating (package
power dissipation) is exceeded. Internally-generated delays provide
crossover-current protection.
The UDN2998W is packaged in a 12-pin single in-line power tab
package for high power capabilities. Driving either of the bridges at the
full 2 A dc rating requires the use of an external heat-sink. The tab is at
ground potential and needs no insulation.
A similar dual full-bridge driver for use with continuous load
currents to ±500 mA is the UDN2993B.

FEATURES
ABSOLUTE MAXIMUM RATINGS
at T J ~ +150°C
Supply Voltage, VBB • • . • • • • • • • . • • . • 50 V
Output Current, lOUT (DC) ........... ±2 A
(Peak) ...................... ±3 A
Sink Driver Emitter Voltage, VE •••.•• 1.5 V
Logic Input Voltage Range,
V PHASE or V ENABLE' •.••• -0.3 V to 15 V
Package Power Dissipation,
PD

....................

• ±3 A Peak Output Current
• Output Voltage to 50 V
• Integral Output Suppression Diodes
• Output Current Sensing
• TTL/CMOS Compatible Inputs
• Internal Thermal Shutdown Circuitry
• Crossover-Current Protected

See Graph

Operating Temperature Range,
TA . • • • • . • . • • • • . • • . • -20°C to +85°C
Storage Temperature Range,
Ts ................ -55°C to +150°C
NOTE: Output current rating may be limited by
chopping frequency, ambient temperature, air
flow, or heat sinking. Under any set of conditions,
do not exceed the specified current rating or a
junction temperature of +150°C.
Always order by complete part number: 1
UDN2998W I.
3-121

FUNCTIONAL BLOCK DIAGRAM
(ONE OF TWO DRIVERS)

Dwg. No. W-107A

til

~10r----'-----'----~----TT---'
;:

'"

£:

~ 8r-~~+-----+-~~~~~~~--1

To maintain isolation between integrated circuit components
and to provide for normal transistor operation, the ground tab must
be connected to the most negative point in the external circuit.

!i"entil

C

II:

TRUTH TABLE

W

;:

o

"w

Cl

;2

ENABLE
INPUT

PHASE
INPUT

OUTPUT 1

OUTPUT 2

Low
Low
High
High

High
Low
High
Low

High
Low
Open
Low

Low
High
Low
Open

c.>

~ 2r-----+---~~~--+_--~~--\;1

w
..J
m

~

~ °2~5~---7~--~~--~----~----~·

'"

3-122

Owg. GP·012A

ELECTRICAL CHARACTERISTICS at T,\

= +25°C, TJ ~ +150°C, VBB = 50 V

Characteristic

Test Conditions

Min.

Typ.

Limits
Max.

Output Drivers

Operating Voltage Range

VBB

Output Leakage Current

ICEX

Output Saturation Voltage

VCE(SAT)

Output Sustaining Voltage

VCE(sus)

-

SO

V

VOUT = SO V, VENABLE = 2.0 V, Note 2

-



l-

c..

c..

6

l-

~

Z

~

Z

I<.:)

z

<.:)

Z

;::

;::

::5

::5

Z

Z

:>

>

""""

~

c..

V>

>
+

~

a

IV>

co

• ±3 V to ±13 V Operation
• High Output Swing
• Peak Output Current to ±3.5 A
• Low Input Offset
• 90 dB Typical Open-Loop Gain
• Internal Thermal Shutdown
• High Common-Mode Input Range
• Unity Gain Stable
• Pin Compatible with L165, L465, SG 1173

~

V>

Z

a
z

Dwg. No. PS·OO2

ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
Supply Voltage Differential
(+Vs to -Vsl.·.·.·.· .. · ... ·.·. 28 V
Peak Output Current, lOUT' ........ ±3.5 A
Input Voltage Range,
VIN .............. +Vs to-Vs -O.3V
Package Power Dissipation,
PD' ................... See Graph
Operating Temperature Range,
TA • • . . . • . . • . • . • . • . . • • O°C to +70°C
Storage Temperature Range,
T5 . . . . . . . . . . . . . . . . -40°C to +150°C

Always order by complete part number: IULN3751Z I.
3-125

ELECTRICAL CHARACTERISTICS at TA
(unless otherwise noted).

= 25°C, TJ :::; +150°C, Vs = ±6.0 V
Limits

Characteristic
Functional Supply Voltage Range

Test Conditions
+Vs to -Vs

Quiescent Supply Current

a
a

Min.

-Typ.

Max.

6.0

-

26

V

-

40

60

mA

Units

Crossover Distortion t

POUT = 50 mW, Rl = 4Q

-

Common Mode Rejection

/l,.VcM =2V

60

Input Common Mode Range t

Positive
Negative

-

Open-Loop Voltage Gain

f=0

80

Slew Rate

V1N = VOUT = 6 Vpp, Rl = 00

1.0

Gain-Bandwidth Productt

Av = 40 dB

-

Output Voltage Swing

lOUT = 1.0 A

4.5

4.7

lOUT = -1.0 A

-4.5

-4.7

-

V

Supply Voltage Rejection

+Vs,/I,.V=IV

60

85

dB

-Vs ,/I,.V=IV

60

80

-

-

160

-

Input Bias Current

V IN = 0, lOUT =

Input Offset Voltage

VIN = 0, lOUT =

Input Offset Current

V1N = 0, lOUT = 0

Input Noise Voltage t

BW = 40 Hz to 15 kHz

Input Noise Currentt

BW = 40 Hz to 15 kHz

.

Thermal Shutdown Temp.t

-60

-1000

nA

±2.0

±10

mV

10

100

nA

4.0

-

I-lV

60

-

pA

<0.05

-

%

85

-

dB

+Vs -2V

-

V

dB

2.3

-

V/I-ls

900

-

kHz

-Vs-0.3V
90

V

V

dB
°C

t Typical values given for circuit design information only.
(J)

~20r-----r-----~--r-~----'-----'

«
:;:
;;
z

o

~15~----+-----+-----~'---+-----;
a.

c;;

(J)

C
a:

~10~----~~~+-----+----\1-----;

oa.

w

(!l

«

'"~

5

w

..J

"'

~j [=====r~:::1:::::±;:~=I~~~.

o

«

0
25

TEMPERATURE IN

'c
Owg.GP-014A

3-126

TYPICAL APPLICATIONS
UNITY GAIN VOLTAGE FOLLOWER

LINEAR VOLTAGE REGULATOR
v CC = 6V TO 25V

+6V

I
INPUT

2.75V
REF.
TL43l
OR EQUIV.

O• l

o------l +

i
R2

r

O. l

-=

VOLTAGE
ADJU ST

Rl

-6V
CAPACITANCE VALUES I N \IF.
Owg. No. A-12,551

Dwg. No. A-12,553A

NON-INVERTING POWER AMPLIFIER

+6V

mGH-POWER LINEAR REGULATOR
(Short-Circuit Protected)

VCC

= 6V TO

25V

I
INPUT

O• l

RSC = VSE
ISC

2.75V
REF.

1

2N3055/2N3772

TL431
OR EQUIV.

In

-=
Rl

R2

0.1

1

R2
VOLTAGE
ADJUST

-=

AV=l+ Rl
R2
CAPACITANCE VALUES I N \IF.

Vo = 2. 75V

[1 + :iJ

CAPACITANCE VALUES IN \IF.

Dwg. No. A-12,552

Dwg. No. A-12.5548

3-127

TYPICAL APPLICATIONS
WIENBRIDGE
OSCILLATORIMOTOR DRIVER

VIDEO MONITOR
VERTICAL DEFLECTION AMP.

6V AC

MOTOR

o

RAMP
IN

4Il YOKE

0.1 ~
0.511

Dwg. No. A-12,3768

SIMPUFIED SERVO APPUCATION
WITH CONTROL TRANSFORMERS

Owg. No. A-12,375A

SINGLE·ENDED POSITION SERVO
WITH SENSE POTENTIOMETER

rROM .,p CONJROl
IHANSMIf It,U

ex

/

r"AN~"'OHMER

er

/

/
L---INPUT

~

CONII10L

CONfUOl

L

GEAR TRAIN

__ ~ __ ..1

/

AtlGLE

/

I

I ~~~ I

I
I

I
I

-Vs

I

~

0.1

:

:L _____________________
A'lCHANICAt DRIVE LINK
:
~

RI, R2 DHIN[ D-C GAIN.
R), Cl PICKID TO PROVIDE lOOP COMPENSAJlQH.
CAPACITANCE VALUES IN liE

Owg. No. A-14,250

3-128

Dwg. No. A-12,556

QUAD 2-INPUT PEmPHEBALIPOWER DHIVERS
-TRANSIENT-PROTECTED OUTPUTS
These 16-lead quad 2-input peripheral/power drivers are bipolar
monolithic integrated circuits containing AND or OR logic gates, highcurrent switching transistors, and transient-suppression diodes
on
the same chip. The four output transistors are capable of simultaneously sinking 300 mA continuously at ambient temperatures of up
to +70°C. In the OFF state, these drivers will withstand at least 80 V.

UDN5703A

Series UDN5700A quad drivers are ideally suited for interface
between low-level or high-level logic and high-currenVhigh-voltage
loads. Typical applications include driving peripheral loads such as
incandescent lamps, light-emitting diodes, memories, and heaters.
The integral transient-suppression diodes allow their use with
inductive loads such as relays, solenoids, or stepping motors without
the need of discrete diodes.
Both devices are furnished in 16-pin DIP packages with copper
leadframes for improved thermal characteristics. The UDN5703A is also
available for operation between -40°C and +85°C. To order, change its
prefix from 'UDN' to 'UDQ'.

FEATURES
Dwg. No, A-9SG9

ABSOLUTE MAXIMUM RATINGS
at TA =+25°C
Supply Voltage, Vee ............... 7.0 V
Input Voltage, VIN . • • • . . • . . • • . . • . .. 30 V
Output Off-State Voltage,
VOFF •••••••••••••••••••••••• 80V
Output On-State Sink Current,
ION ..•..•.•.•.•••..••.••.• 600 mA
Suppression Diode Off-StateVoltage,
VOFF •••••••••••••••••••••••• 80V
Suppression Diode On-State Current,
ION •.•••.•••..•.•.•..•...• 600 mA
Power Dissipation, PD. . . . . . . . . . .. 2.0 W'
Eaeh Driver . . . . . . . . . . . . . . . . . 0.8 W
Operating Free-Air Temperature Range,
TA • . • . . . . . • • . • . . . • . -20°C to +85°C
Storage Temperature Range,
Ts ................ -55°C to + 150°C
"Derate at the rate of 16.7 mwrc above
TA = +25°C

•
•
•
•
•

Two Logic Types
DTLlTTLIPMOS/CMOS Compatible Inputs
Low Input Current
300 mA Continuous Output Current
Standoff Voltage of 80 V

Always order by complete part number:

Part Number Description
UDN5703A
Quad OR Driver
UDN5706A
Quad AND Driver
3-129

RECOMMENDED OPERATING CONDITIONS
Min.

Nom.

Max.

Units

4. 75

5.0

5.25

V

Operating Temperature Range

0

+25

+85

°C

Current into any output (ON state)

-

-

300

mA

Supply Voltage (Vee)

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted).
Test Conditions
Characteristic

Symbol

"1" Input Voltage

V'N(I)

Driven
Input

Limits

Other
Input

Temp.

Vee
MIN
MIN

-

-

Output

Min.

Typ.

-

2.0

-

-

V

-

-

-

0.8

V

-

I'N(O)

-

MAX

0.4 V

30V

"1" Input Current

I'N(I)

-

MAX

30V

OV

-

Input Clamp Voltage

VLK

-

MIN

-12mA

-

-

"0" Input Voltage

V'N(O)

"O"lnput Current

SWITCHING CHARACTERISTICS at Vee

Max.

Units

Notes

-

-50

-100

-

-

10

!IA
!IA

-1.5

V

Min.

Typ.

Max.

Units

Notes

-

200

500

ns

3

-

300

750

ns

3

2
2

=5.0 V, TA =25°C
Limits

Characteristic
Turn-on Delay Time

Symbol

Test Conditions
Vs=70V.RL =4650 (10 Watts).

tpdO

CL =15pF
Turn-off Delay Time

Vs=70V.RL =4650 (10 Watts).

tpdl

CL =15pF
NOTES: 1. Typical values are at Vcc =5.0 V. TA = 25°C.
2. Each input tested separately.
3. Voltage values shown in the test circuit waveforms are with respect to network ground terminal.
4. Capacitance values specified include probe and test fixture capacitance.

INPUT PULSE CHARACTERISTICS

3-130

V'N(O)= OV

tf = 7 ns

V'N(I)= 3.5 V

t,= 14 ns

tp=1/lS
PRR = 500 kHz

UDN5703A QUAD OR DRIVER
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted).
Test Conditions
Characteristic

Symbol

"1" Output Reverse Current

IOFF

"0" Output Voltage

VON

Temp.

Vcc

-

MIN

2.0V

OV

SOV

OPEN

2.0V

OV

SOV

-

-

MIN

O.SV

O.SV

150 rnA

-

0.35

Diode Leakage Current
Diode Forward Voltage Drop

Limits

Driven
Input

Other
Input

Output

Min.

Typ.

Max.

Units

-

100

f1A

-

-

100

f1A

-

0.5

V

-

-

Notes

MIN

O.SV

O.SV

300 rnA

-

0.5

0.7

V

ILK

NOM

NOM

OV

OV

OPEN

-

-

200

f1A

-

1.5

1.75

V

4

16

25

rnA

1,2

72

100

rnA

1,2

VD

NOM

NOM

Vcc

Vcc

"1" Level Supply Current

IC C( 11

NOM

MAX

5.0V

5.0V

"0" Level Supply Current

IcC(O)

NOM

MAX

OV

OV

-

3

NOTES: 1. Typical values are at Vcc = 5.0 V, TA = 25"C.
2. Per package
3. Diode leakage current measured at VA = VOff(mioi'
4. Diode forward voltage drop measured at I, = 300 mAo
5. Capacitance values specified include probe and tesUixture capacitance.

INPUT

VCC o 5V

OPEN

OUTPUT

Vs

INPUT
l(}O/o

~'::.;Q%::..-----

Vin(O)

I

I

'pd'

-r-------1

ro------r- 'pdQ

'..-----...,:- - -

150%

O_U_T_PlJ_T_ _ _ _....

Dwg. No. A-9123A

--Vout(l)

50% Lvo",!Q)
Dwg. No. A-7628C

Dwg. No. A-9869

3-131

UDN5706A QUAD AND DRIVER
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted),
Test Conditions
Characteristic

Symbol

"1" Output Reverse Current

IOFF

"0" Output Voltage

VON

Temp.

Vee

-

MIN

2.0V

2.0V

BOV

OPEN

2.0V

2.0V

BOV

-

MIN

O.BV

Vee

150 rnA

-

0.35

Other
Input

Output

Min.

Typ.

Max.

Units

-

100

-

100

J.lA
J.lA

-

0.5

V

-

Notes

-

MIN

O.BV

Vee

300 rnA

0.7

V

-

ILK

NOM

OV

OV

OPEN

-

0.5

NOM

-

200

J.lA

3

Diode Leakage Current

Limits

Driven
Input

Diode Forward Voltage Drop

Vo

NOM

NOM

Vee

Vee

-

-

1.5

1.75

V

4

"1" Level Supply Current

leep)

NOM

MAX

5.0V

5.0V

-

-

16

24

rnA

1,2

"0" Level Supply Current

'ee(o)

NOM

MAX

OV

OV

-

-

70

9B

rnA

1,2

NOTES: 1. Typiealvalues are at Vcc =5.0V,TA = 25°C.
2. Per package
3. Diode leakage current measured at VA = Voff (min)'
4. Diode forward voltage drop measured at If = 300 rnA.
5. Capacitance values specified include probe and test fixture capacitance.

INPUT

2.4V VCC=SV 0 EN

OUTUT-

Vs

-If'
i~
S~

INPUT

,

10%

I

I

I

Ipdl

LOAD
IL _____
CIRCUIT j I

O_U_T_PU_T_ _ _

':":

-=

Dwg. No. A·7678A

3-132

I

.

~

ISpF

i TNO,eS)

If

j,~

S~

I

---=~_'p

I
I

-=-

__

-.j I--

96%-:- - - - - - - - --Vin{l)
I

I

V;nlOl
I

-I

IpdO

'_..Jj"'s~----s-~""'\C::::~:
Dwg. No. A-762BC

Dwg. No. A-98G6

DUAL PERIPHERAL AND POWER DRlVER
- TRANSIENT PROTECTED OUTPUTS
This "mini-DIP" dual peripheral and power driver is a bipolar
monolithic integrated circuit incorporating NOR logic gates, high-current
switching transistors, and transient suppression diodes on the same
chip. The two output transistors are capable of simultaneously sinking
300 mA continuously at ambient temperatures of up to +70°C. In the
OFF state, this driver will withstand at least 80 V.
The UDN5713M dual driver is ideally suited for inter1ace between
low-level or high-level logic and high-currenVhigh-voltage loads. Typical
applications include driving peripheral loads such as incandescent
lamps, light-emitting diodes, memories, and heaters with a load current
of up to 600 mAo

Dwg. No. A-97S9

The integral transient suppression diodes allow the use of these
drivers with inductive loads such as relays, solenoids, or stepping
motors without the need for discrete diodes. Similar devices with four
drivers per package are the 5703 and 5706.

FEATURES
•
•
•
•

DTLlTTLlPMOS/CMOS Compatible Inputs
Low Input Current
300 mA Continuous Output Current
Stand-off Voltage of 80 V

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vcc ............... 7.0 V
Input Voltage, V 1N

.••.•••.•••••••••

30 V

Output Off-State Voltage,
VOFF . . . . . . . . . . . . . . . . . . . . . . . . SO V
Output On-State Sink Current,
ION ....................... 600 rnA
Suppression Diode Olf-State Voltage,
VOFF . . . . . . . . . . . . . . . . . . . . . • . . SOV
Suppression Diode On-State Current,
ION ....................... 600 rnA
Power Dissipation at T A = 25°C, PD
Package ................... 1.5 W·
Each Driver ................. O.S W
Operating Free-Air Temperature Range,
T A ..•.•.•••••••..•. -20°C to +S5°C
Storage Temperature Range,
T s ................ -55°C to +150°C
'Derate at the rate of 12.5 mW/'C above TA = 25'C.

Always order by complete part number, e.g., 1UDN5713M I.
3-133

RECOMMENDED OPERATING CONDITIONS
Supply Voltage (Vcc)

Min.

Nom.

Max.

4.75

5.0

5.25

V

0

+25

+85

°C

300

rnA

Operating Temperature Range

-

Current into any output (ON state)

-

Units

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted).
Test Conditions
Characteristic

Symbol

"1" Input Voltage

V 'N (l)

"0" Input Voltage

V'N(O)

Temp.

Driven
Input

Vee

-

MIN

-

I'N(O)

-

MAX

0.4 V

I'N(O)

-

MAX

0.4 V

MIN

Limits

Other
Input

-

Output

Min.

Typ.

Max.

Units

Notes

-

2.0

-

-

V

-

-

-

0.8

V

-

30V

-

-

-50

-100

30V

-

-

-100

-200

!JA
!JA

-

-

"0" Input Current at ali
Inputs except Strobe
"0" Input Current at Strobe

2

"1" Input C~rrent at ali
I'N(l)

-

MAX

30V

OV

-

-

-

10

"1" Input Current at Strobe

I'N(l)

-

MAX

30V

OV

-

-

-

20

!JA
!JA

-

Input Clamp Voltage

V,K

-

MIN

-12mA

-

-

-

-

-1.5

V

-

Inputs except Strobe

SWITCHING CHARACTERISTICS at Vee

2

=5.0 V, TA =25°C
limits

Characteristic
Turn-on Delay Time

Symbol

Test Conditions
Vs=70V.RL =465Q(10Wa1ts).

tpdO

Min.

Typ.

Max.

Units

Notes

-

200

500

ns

3

-

300

750

ns

3

CL = 15pF
Turn-off Delay Time

Vs=70V. RL =465Q(10Wa1ts).

tpdl

CL =15pF
NOTES: 1. Typical values are at Vcc = 5.0 V. TA = 25°C.
2. Each inputtested separately.
3. Voltage values shown in the test circuit waveforms are with respect to network ground terminal.
4. Capacitance values specified include probe and test fixture capacitance.

INPUT PULSE CHARACTERISTICS

3-134

V'N(O) = 0 V

tf = 7 ns

V'N (l) = 3.5 V

t,= 14 ns

tp=ll!S
PRR = 500 kHz

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted).
Test Conditions
Characteristic

Symbol

"1" Output Reverse Current

"0" Output Voltage

IOFF

VON

Vcc

Other
Input

MIN

2.0V

OV

SOV

-

OPEN

2.0V

OV

SOV

Temp.

-

Limits

Driven
Input

Output

Min.

Typ.

Max.

Units

Notes

-

100

~

-

-

100

~

-

-

MIN

O.SV

O.SV

150mA

-

0.35

0.5

V

-

-

MIN

O.SV

O.SV

300mA

-

0.5

0.7

V

-

OPEN

Diode Leakage Current

ILK

NOM

NOM

OV

OV

-

-

200

~

Diode Forward Voltage Drop

VD

NOM

NOM

Vcc

Vcc

-

-

1.5

1.75

V

4

"1" Level Supply Current

ICC(1)

NOM

MAX

5.0V

5.0V

-

-

S.O

13

mA

1,2

"0" Level Supply Current

IcC(O)

NOM

MAX

OV

OV

-

-

36

50

mA

1,2

3

NOTES: 1. Typical values are at Vcc =5.0 V, TA =25°C.
2. Per package.
3. Diode leakage current measured at VR = 80 V.
4. Diode forward voltage drop measured at IF = 300 rnA.
5. Capacitance values specified include probe and test fixture capacitance.

INPUT

OPEN OUTPUT

----I
RL
.-J-'-'-T-~

INPUT
lOOk

:

I
I

I
I
. 15pF I
]Note 5)1

':' LOAO I

L~l~C~I!.

~1.:.O"k;;;",,_ _ _ _ _ v;n(O)

J

Dwg. No. A-9123A

1

tpdl

1

OUTPUT

I.
1'"'--~+-tpdO
1,--_ _ _ _..... : __ --Vou ,(1}

--r-----i

1

50"/0

.

50"/0

L

vout(O)

Dwg. No. A·7628C

3·135

BiMOS II LATCHED DHIVEHS
UCN5800L

chi

~

UCN5800A
OUTPUT

ENABLE

LOGIC
SUPPLY
OUT,

The UCN5800AlL and UCN5801A1EP latched-input BiMOS ICs
merge high-current, high-voltage outputs with CMOS logic. The CMOS
input section consists of 4 or 8 data ('0' type) latches with associated
common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The
power outputs are bipolar npn Darlingtons. This merged technology
provides versatile, flexible interface. These BiMOS power interface
ICs greatly benefit the simplification of computer or microprocessor
1/0. The UCN5800A and UCN5800L each contain four latched drivers;
the UCN5801 A and UCN5801 EP contain eight latched drivers.
The UCN5800AlL and UCN5801A1EP supersede the original
BiMOS latched-input driver ICS (UCN4400A and UCN4801A). These
second-generation devices are capable of much higher data input rates
and will typically operate at better than 5 MHz with a 5 V logic supply.
Circuit operation at 12 V affords substantial improvement over the
5 MHz figure.
The CMOS inputs are compatible with standard CMOS and NMOS
circuits. TTL circuits may mandate the addition of input pull-up resistors.
The bipolar Darlington outputs are suitable for directly driving many
peripherallpower loads: relays, lamps, solenoids, small dc motors, etc.

Owg. No. A-l0,4990

ABSOLUTE MAXIMUM RATINGS
at +25°CFree-Air Temperature
Output Voltage, VCE • . . • . . . • . • . . . . . 50 V
Supply Voltage, VDD . • . . . . . . . • . . . . . 15 V
Input Voltage Range,
V,N .•••.....•.• -0.3 V to Voo + 0.3 V
Continuous Collector Current,
Ic .............. _......... 500mA
Package Power Dissipation,
PD' . . . . . . . . • . . . . • . . • . •

See Graph

Operating Temperature Range,
TA ••••••••••••••••• -20 c C to +85c C
Storage Temperature Range,
Ts ............... -55 c C to +150 c C

All devices have open-collector outputs and integral diodes for
inductive load transient suppression. The output transistors are capable
of sinking 500 mA and will withstand at least 50 V in the OFF state.
Because of limitations on package power dissipation, the simultaneous
operation of all drivers at maximum rated current can only be accomplished by a reduction in duty cycle. Outputs may be paralleled for higher
load current capability.
The UCN5800A is furnished in a standard 14-pin DIP; the
UCN5800L in a surface-mountable SOIC; the UCN5801A in a 22-pin
DIP with 00400" (10.16 mm) row centers; the UCN5801 EP in a 28-lead
PLCC. All devices are also available for operation between -40°C and
+85°C_ To order, change the prefix from 'UCN' to 'UCQ'.

FEATURES
• 404 MHz Minimum Data Input Rate
•
•
•
•
•

High-Voltage, High-Current Outputs
Output Transient Protection
CMOS, NMOS, TTL Compatible Inputs
Internal Pull-Down Resistors
Low-Power CMOS Latches

Note that the UCN5800A (dual in-line package)
and UCN5800L (small-outline IC package) are
electrically identical and share a common pin
number assignment
Caution: CMOS devices have input static
protection but are susceptible to damage when
exposed to extremely high static electrical charges_

Always order by complete part number:
3-136

IUCN5801 EP I.

FUNCTIONAL BLOCK DIAGRAM

GROUND

OUTPUT
ENABLE
TYPICAL MOS LATCH

COMMON MOS
CONTROl

TYPICAL BIPOLAR DRIVER

Dwg. No. A-10,495A

UCN580lA

22·PIN DIP, RaJA = 50'CiW
OUTPUT
ENABLE
LOGIC
SUPPLY
OUT,
OUT,
OUT,
OUT,

28·LEAD PLCC, R eJA = 55'CiW

en

S
:::

14·PIN DIP, RaJA = 60'CiW

~
Z

0

~

D..

iii
en
is

1.5

IX
OUTs

OUT,
OUTa
COMMON

W

:::
0
D..
W

C)

«
~
U
«
D..
W
....I

0.5

III

«
Dwg. No. A·10,498D

:::

0

....I
....I

«

o~----~------~----~------~----~

25

50
75
100
125
AMBIENT TEMPERATURE IN 'C

150

Dwg. No. GP-023

3-137

ELECTRICAL CHARACTERISTICS at TA

= +25°C, VDD = 5 V (unless otherwise noted),
Limits

Characteristic
Output Leakage Current

Collector-Emitter
Saturation Voltage

Input Voltage

Symbol
ICEX

VCE(SAT)

Test Conditions

Min.

-

-

50

;tA

-

-

100

;tA

Ic~ 100 mA

-

0.9

1.1

V

Ic~ 200 mA

-

1.1

1.3

V

Ic ~ 350 mA, V DD ~ 7.0 V

-

1.3

1.6

V

-

1.0

V

VDD~12V

10.5

-

-

V

~

8.5

-

-

V

10 V

V DD ~ 5.0 V (See Note)

Supply Current

RIN

IDD(ON)
(Each
Stage)

IOD(OFF)
(Total)
Clamp Diode
Leakage Current

IR

Clamp Diode Forward Voltage

VF

Units

VCE ~ 50 V, TA ~ +70°C

V DD

Input Resistance

Max.

VCE ~ 50 V, TA ~ +25°C

V1N(O)
V1N (1)

Typ.

V DD

~

3.5

-

-

V

-

kn

12 V

50

200

V DD ~ 10 V

50

300

V DD ~ 5.0 V

50

600

-

kn

V DD ~ 12 V, Outputs Open

-

1.0

2.0

mA

V DD ~ 10 V, Outputs Open

-

0.9

1.7

mA

V DD ~ 5.0 V, Outputs Open

-

0.7

1.0

mA

V DD ~ 12 V, Outputs Open, Inputs ~ 0 V

-

-

200

;tA

V DD ~ 5.0 V, Outputs Open, Inputs ~ 0 V

-

50

100

IlA

V R ~ 50 V, TA ~ +25°C

-

50

;tA

V R ~ 50 V, TA ~ +70°C

-

-

100

;tA

IF ~ 350 mA

-

1.7

2.0

V

kn

NOTE: Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic "1 ".

TYPICAL INPUT CIRCUIT

UCN580lEP

Dwg. No. A-12,520

3-138

Dwg. No. PP-037

Dwg. No. A-10,895A

TIMING CONDITIONS·
(Logic Levels are V DD and Ground)
A. Minimum Data Active Time Before Strobe Enabled
(Data Set·Up Time) ..................................... 50 ns
B. Minimum Data Active Time After Strobe Disabled
(Data Hold Time) ....................................... 50 ns.
C. Minimum Strobe Pulse Width ............................... 125 ns
D. Typical Time Between Strobe Activation and
Output On to Off Transition .............................. 500 ns
E. Minimum Time Between Strobe Activation and
Output Off to On Transition .............................. 500 ns
F. Minimum Clear Pulse Width ................................ 300 ns
G. Minimum Data Pulse Width ................................. 225 ns

Information present at an input is transferred to its latch when the
STROBE is high. A high CLEAR input will set all latches to the output
OFF condition regardless of the data or STROBE input levels. A high
OUTPUT ENABLE will set all outputs to the OFF condition, regardless
of any other input conditions. When the OUTPUT ENABLE is low, the
outputs depend on the state of their respective latches.

TRUTH TABLE
OUT IN

OUTPUT

INN

STROBE

CLEAR

ENABLE

t·1

t

0
1

1
1

0
0

X
X
X
X

X
X
0
0

1

0
0
X

X
0
0

1

X
X
X
X

0
0

ON
OFF

OFF
ON
OFF
OFF
ON
OFF

x = irrelevant
t·\ = previous output state
t = present output state

3-139

TYPICAL APPLICATION
UNIPOLAR STEPPER-MOTOR DRIVE
+30Y

I1P

UCN-5800A
Dwg. No. 8-1537

UNIPOLAR WAVE DRIVE
STROBE
IN 1
IN 2
IN 3
IN

--1l
Sl

n

L -_ _~nL

UNIPOLAR 2-PHASE DRIVE

_____~
IN 1

n

________________

~!l~

_________

IN ~
OUT 1

I

OUT 2

~

'---__--'r-------.J

LDwg. No. A·11 ,446

3-140

n L -_ _---'Il'---_________

_ ______

--'n~_~~

..Jl----------------~~
"""I

OUT 2

OUT 3

OUT

IN Z
IN 3

~

OUT 1

---'nL____--'~

' - - - _ - - - ' L -_ _

OUT 3

OUT 4

Dwg. No. A-11 ,447

BiMOS n UNIPOLAR
STEPPER-MOTOR TRANSLATOR/DRIVER

OUTPUT B

1

SUPPLY

Combining low-power CMOS logic with high-current and highvoltage bipolar outputs, the UCN5804B BiMOS 1\ translator/driver
provides complete control and drive for a four-phase unipolar
'stepper-motor with continuous output current ratings to 1.25 A
per phase (1.5 A startup) and 35 V.
The CMOS logic section provides the sequencing logic, DIRECTION and OUTPUT ENABLE control, and a power-ON reset function.
Three stepper-motor drive formats, wave-drive (one-phase), two-phase,
and half-step are externally selectable. The inputs are compatible with
standard CMOS, PMOS, and NMOS circuits. TTL or LSTTL may
require the use of appropriate pull-up resistors to ensure a proper
input-logic high.

'-------I

9

ONE-PHASE

Dwg. No. W-194

The wave-drive format consists of energizing one motor phase at
a time in an A-B-C-D (or D-C-B-A) sequence. This excitation mode
consumes the least power and assures positional accuracy regardless
of any winding inbalance in the motor. Two-phase drive energizes
two adjacent phases in each detent position (AB-BC-CD-DA). This
sequence mode offers an improved torque-speed product, greater
detent torque, and is less susceptible to motor resonance. Half-step
excitation alternates between the one-phase and two-phase modes
(A-AB-B-BC-C-CD-D-DA), providing an eight-step sequence.
The bipolar outputs are capable of sinking up to 1.5 A and
withstanding 50 V in the OFF state (sustaining voltages up to 35 V).
Ground clamp and fly back diodes provide protection against inductive
transients. Thermal protection circuitry disables the outputs when the
chip temperature is excessive.
The UCN5804B is rated for operation over the temperature range
of -20°C to +85°C. It is supplied in a 16-pin dual in-line plastic batwing
package with a copper lead frame and heat-sinkable tabs for improved
power dissipation capabilities.

FEATURES
ABSOLUTE MAXIMUM RATINGS
Output Voltage, VCE . . . . . . . . . . . . . . . . 50 V
Output Sustaining Voltage,
VCE(SUS)" . . . . . . . . . . . . . . . . . . . . 35 V
Output Sink Current, lOUT" ......... 1.5 A
Logic Supply Voltage, VDD . . . . . . . . . . 7.0 V
Input Voltage, V1N .••••.•..•••.••.. 7.0 V
Package Power Dissipation,
PD' . . . . . . . . . . . . . . . . . . . See Graph
Operating Temperature Range,
TA • . • • . • . • • • . . . . • . . -20°C to +85°C
Storage Temperature Range,
Ts ................ -55°C to +150°C

•
•
•
•
•
•
•

1.5 A Maximum Output Current
35 V Output Sustaining Voltage
Wave-Drive, Two-Phase, and Half-Step Drive Formats
Internal Clamp Diodes
Output Enable and Direction Control
Power-ON Reset
Internal Thermal Shutdown Circuitry

Always order by complete part number: IUCN5804B

I.
3-141

5804
BiMOS II UNIPOLAR STEPPER-MOTOR TRANSLATORIDRIVER

TYPICAL INPUT CIRCUIT

~
~

z

o

~

iii

en
2i
a:

IN

w

~

~

w

Cl

;2
U

~

IVg. No. EP-010-5

W
..J

III

~

o

..J
..J


~

0.5

0

-

aJ

...J

w

:::>

«
z

W

a.
a.

I-

en

o.

0

:::>

...J

aJ

z«

a

I-

:::>

g

0

w

iii'
en
d-

0

~

a.
I

iii'

en

~

«

aJ
~

0
~

0
~

0

0

«

::(

'"
«

l-

I-

l-

0

0

0

:::>

:::>

:::>

::(
I-

:::>

0

'"

'"

0

iii

'"

1-::(

1-::(

aJ
I-

l-

I-

:::>

:::>

0

0

0

0

0

:::>

:::>



iii

'"
iii

'"
iii

l-

I-

I-

0

0

0

:::>

:::>

:::>

Owg. FP-032

TYPICAL INPUT CIRCUIT

TYPICAL OUTPUT DRIVER

____- - - - t - - - 0 OUTN

IN

Dwg. EP-010-1

3-166

Dwg. Ep·021·7

ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5.0 V.
Limits
Characteristic

Test Conditions

Min

Typ

Max

Output Drivers
Output Leakage Current
Output Saturation Voltage

Unclamped Inductive

ICEX
VCEISAT)

-

V CE = 30 V
lOUT = 450 mA
lOUT = 400 mA

0.8

Load Current

IL = 500 mA, Test Fig.
tpHL

Vcc =21 V, RL =39 0

Fall Time

Rise Time

<1.0

100

~

1.15

1.45

V

1.1

1.4

125

225

V

-

See Note

Vcc =30V, L= 3flH, RL = 56 0,

Turn-On Time

Turn-Off Time

0.85

475

-

ns

tf

Vcc = 21 V, RL = 39 0

-

20

tpLH

Vcc = 21 V, RL = 39 0

175

250

400

ns

tf

Vcc = 21 V, RL = 39 0

-

50

--

ns

ns

Control Logic
Logic Input Voltage

Logic Input Current

Input Resistance
Supply Current

V IN(1 )

3.5

-

-

V

V INIO)

-

-

0.8

V

IIN(1)

VIN = 5.0 V

-

<1.0

100

~

IINIO)

VIN = 0 V

-

<-1.0

-100

~

50

-

IOOION)

Two Outputs ON

-

6.0

10.0

mA

IOOIOFF)

All Drivers OFF, All Inputs = 0 V,

-

-

600

flA

RIN

-

kO

OEA = OEs = Voo
Note: Device will turn off and meet all specifications after tesl.

3-167

Vee

Dwg. EP-Q44

UNCLAMPED INDUCTIVE LOAD CURRENT TEST FIGURE

~-----------------------tENABLE----------------~~

1,....---,.

OUTPUT ENABLE
(A and/or B)
~------------------tOUT----------------~----~

90%

90%

OUTPUT VOLTAGE N

50%
50%
10%lI~------------------------------------------------Jl-r10%

Dwg. WP·017

TIMING CONDITIONS
(Logic Levels are VDD and Ground)
A. Minimum Data Active Time Before Output Enable (Data Set-Up Time) ............... 150 ns
B. Minimum Data Hold Time After Output Enable (Data Hold Time) ........................ 250 ns
3-168

APPLICATIONS INFORMATION
This device is intended specifically for, although
certainly not limited to, driving ink-jet print heads. In
this application, a certain minimum energy (a function
of load voltage and output pulse duration) is required
for proper operation, while excessive energy will
degrade the life of the print head. The output pulse
duration (tOUT) is equal to tENABLE + tpLH - tpHL ' where tpHL
is adjusted during manufacture to compensate for
variations in the output saturation voltage (VCEISAl))'
For the A5817SEP, the relationship between tOUT
and tENABLE at TA = 25°C is:
tOUT =tENABLE + 25 ns + ([VCEISAl) (act) - VCEISAl) (typ)]
x330ns) ±110ns.
For most applications, this will result in a driver contribution to energy error of less than ±4%.
A logic low on the CHIP ENABLE input will prevent
the drivers from turning ON, regardless of the state of
other inputs or the logic supply Voltage. The CHIP
ENABLE input has a slow response time and should
not be used as a high-speed control line. For proper
operation, all ground terminals should be connected to
a common ground on the printed wiring board. The IC
(Internal Connection) terminals are used to program
the turn-on time of the device and MUST be left
electrically unconnected (floating) for proper operation.

DECODER TRUTH TABLE
IND
(MSB)

INc

INs

INA
(LSB)

N

0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1

0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1

0
1
2
3
4
5
6
7
8
9

10
11
12
13

ALL OFF
ALL OFF

Depending on the four address inputs, the 4-to-14
line decoder selects one driver from each of the 14
output A and B banks of sink drivers according to
the Decoder Truth Table. The state of the selected
outputs is determined by the OUTPUT ENABLE
inputs as shown in the Enable Truth Table.

ENABLE TRUTH TABLE
CHIP
ENABLE

OUTPUT
ENABLEA

OUTPUT
ENABLEB

0

X

X

OUTPUTS (OFF unless otherwise specified.
For the value of N see the Decoder Truth Table)
ALL OFF
ALL OFF
OUTANON

0

0

0

OUTBNON

0

OUTAN ON, OUTBN ON

X= Irrelevant
3-169

5818-F
BiMOS n 32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
WITH ACTIVE DMOS PULL-DOWNS
UCN5818EPF
i"

z

n

n
~ 5
g
g ~ a
~ ii.' ffi iil Q ~ Glz J'

a

'"

z

n

Designed primarily for use with vacuum fluorescent displays, the
UCN5818AF and UCN5818EPF smart power BiMOS "drivers combine
CMOS shift registers, data latches, and control circuitry, with bipolar
high-speed sourcing outputs and DMOS active pull-down circuitry. The
high-speed shift register and data latches allow direct interfacing with
microprocessor LSI-based systems. A CMOS serial data output enables cascade connections in applications requiring additional drive
lines. Both devices feature SO V and -40 mA output ratings, allowing
them to be used in many other peripheral power driver applications.
Selected devices (suffix '-1 ') have maximum output ratings of 80 V. In
all other respects, devices with and without the '-1' suffix are identical.
These smart power drivers have been designed with BiMOS "
logic for improved data entry rates. With a 5 V supply, they will typically
operate above 5 MHz. At 12 V, significantly higher speeds are obtained.
Use of these devices with TTL may require the use of appropriate pullup resistors to ensure an input logic high. All devices can be operated
over the ambient temperature range of -20°C to +85°C.

Owg. No. A'14,218

ABSOLUTE MAXIMUM RATINGS
alTA =25°C
Logic Supply Voltage, VOO " " " " " 15 V
Driver Supply Voltage, VBB ' , , , , , , , . , 60 V
(suffix '-1') .,', ............... 80 V
Continuous Output Current,
lOUT •••••.•••..••••• ·40to+15mA
Input Voltage Range,
VIN ••••..... ·0.3 V to V OD + 0.3 V
Package Power Dissipation, Po
(UCN5818AF) .............. 3.5 W·
(UCN5818EPF) ............. 2.5 Wt
Operating Temperature Range,
TA . . . . . . . . . . . . . . . . . ·20°C to +85°C
Storage Temperature Range,
T s ................ ·55°C to +150°C
• Derate at rate of 28 mWrC above TA = + 25°C
t Derate at rate of 20 mWrC above TA = + 25°C

Caution: CMOS devices have input static
protection but are susceptible to damage when
exposed to extremely high static electrical
charges.

The UCN5818AF is supplied in a 40-pin plastic dual in-line
package with O.SOO" (15.24 mm) row spacing. A copper lead frame,
reduced supply current requirement, and low output saturation voltage
permits operation with minimum junction temperature rise. The 'A'
package allows all 32 outputs to be operated at -25 mA continuously
over the operating temperature range.
For high-density packaging applications, the UCN5818EPF is
furnished in a 44-lead plastic chip carrier (quad pack) for surface
mounting on solder lands with 0.050" (1.27 mm) centers. The PLCC
allows -25 mA continuous operation of all outputs simultaneously at
ambient temperatures to SO°C.
Similar devices are available as the UCN5810AF/LWF (10 bits),
UCN5811 A (12 bits), and UCN5812AF/EPF (20 bits).

FEATURES
•
•
•
•
•
•
•
•

60 V or 80 V Source Outputs
High-Speed Source Drivers
Active DMOS Pull-Downs
Low-Output Saturation Voltages
Low-Power CMOS Logic and Latches
3.3 MHz Minimum Data Input Rate
Reduced Supply Current Requirements
Improved Replacements for SN75518N/FN

Always order by complete part number:
Part Number

Package

UCN5818AF

40·Pin DIP

UCN5818AF·1
UCN5818EPF
UCN5818EPF·1

3-170

Max. VBB
60V
80V

44·Lead PLCC

60V
80V

5SIS-F
32-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
WITH ACTIVE DMOS PULL-DOWNS
UCN5818AF
DA~!R6~~IT}+----'
OUT 32 3

FUNCTIONAL BLOCK DIAGRAM

LOGIC
40 SUPPLY

LOAD
SUPPLY

SERIAL
DATA IN

Qvoo

OUT I
SERIAL

OUT 2

DATAQUT

OUT)
OUT 4
OUT5

BLANKING

OUT 6
OUT I
OUT 25

OUTS

OUT24

OUT 9

OUT 2)

OUT IO

OUTn

OUT ll

OUT21

OUT 12

OUT2D

OUTn

OUT l9

OUT 14

OUT IS

OUT 15

P'

OUT...

GROUND

QUT"

OUT,.

TYPICAL INPUT CIRCUIT

OUT lI
STROBE
CLOCK

IN O--'"VVIr-1_

Dwg. No. A-12.269A

Cwg. No. A·13.035

TYPICAL OUTPUT DRIVER
v ••

50
75
100
125
AMBIENT TEMPERATURE IN 'C

150

Dwg. No. GP·025

Cwg. No. A-14,219

3-171

5S1S-F
32-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
lVITH ACTIVE DMOS PULL-DOWNS
ELECTRICAL CHARACTERISTICS at TA = + 25°C, VBB = 60 V (UCNS818AFIEPF)
or 80 V (sutrlX '-1') unless otherwise noteCl.
Limits @Voo = 5 V
Characteristic

Symbol

Output Leakage Current
Output Voltage

Min.

Typ.

Max.

Min.

Typ.

Max.

Units

IcEX

VOUT = 0 V, TA = +70°C

-

-5.0

-15

-

-5.0

-15

ItA

VOUT(l)

lOUT = -25 mA, VBB = 60 V

58

58.5

-

58

58.5

V

lOUT = -25 mA, VBB = 80 V·

78

78.5

-

78

78.5

lOUT = 1 mA

-

2.0

3.0

-

-

-

lOUT = 2 mA

-

-

-

2.0

3.5

V

VOUT=5VtoVBB

2.0

3.5

-

-

-

-

8.0

13

-

mA

VOUT = 20 V to VBB

-

VOUT(O)

Output Pull-Down Current

Input Voltage

Input Current

Serial Data Output Voltage

Limits @ Voo = 12 V

Test Conditions

10UT(0)

V
V

mA

V'N (l)

3.5

-

5.3

10.5

-

12.3

V

V'N(O)

-0.3

-

+0.8

-0.3

-

+0.8

V

0.1

1.0

ItA

-0.1

-1.0

ItA

I'N(l)

Y'N = Voo

-

0.05

0.5

I'N(O)

Y'N = 0.8 V

-

-0.05

-0.5

-

VOUT(l)

lOUT = -200 ItA

4.5

4.7

-

11.7

11.8

-

V

VOUT(O)

lOUT = 200 ItA

-

200

250

-

100

200

mV

3.3

5.0

-

-

7.5

-

MHz

100

300

-

200

500

I1A

100

300

200

500

ItA

1.5

3.0

mA

10

100

I1A

400

1000

ns

200

500

ns

Maximum Clock Frequency

fClk

Supply Current

100(1)

All Outputs High

100 (0)

All Outputs Low

IBB(l)

Outputs High, No Load

-

3.0

6.0

IBB(O)

Outputs Low

-

10

100

tpHL

CL = 30 pF, 50% to 50%

800

2000

tpLH

CL = 30 pF, 50% to 50%

350

650

Output Fall Time

t,

CL = 30 pF, 90% to 10%

850

1450

-

400

650

ns

Output Rise Time

t,

CL = 30 pF, 10%to 90%

-

-

350

650

-

300

700

ns

Blanking to Output Delay

Negative current is defined as coming out at (sourcing) the specified device pin .
• UCN5818AF-1 and UCN5818EPF-1 only.

3-172

5818-F
32-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
WITH ACTIVE DMOS PULL-DOWNS

I

CLOCK

DATA I N

1$f-1

----'~

I;:f-E-"-h-F

-1~------------'

STROBE - - - - - - - - '

BLANKING

'----------------

------+I---,..----'~
~G-1

Information present at any register is
transferred to the respective latch when the
STROBE is high (serial-to-parallel conversion). The latches will continue to accept new
data as long as the STROBE is held high.
Applications where the latches are bypassed
(STROBE tied high) will require that the
BLANKING input be high during serial data
entry.

r---

---I

1-1

OUT N

Serial Data present at the input is transferred to the shift register on the logic "0" to
logic "1" transition of the CLOCK input pulse.
On succeeding CLOCK pulses, the registers
shift data information towards the SERIAL
DATA OUTPUT. The SERIAL DATA must
appear at the input prior to the rising edge of
the CLOCK input waveform.

~I___________

L---J

-----------'.

Dwg. No. 12,649A

TIMING CONDITIONS

(TA

When the BLANKING input is high, the
output source drivers are disabled (OFF); the
DMOS sink drivers are ON, the information
stored in the latches is not affected by the
BLANKING input. With the BLANKING input
low, the outputs are controlled by the state of
their respective latches.

= +25°C, Logic Levels are VDD and Ground)
Voo = 5.0 V

A. Minimum Data Active Time Before Clock Pulse
(Data Set-Up Time) ..................................... 75 ns
B. Minimum Data Active Time After Clock Pulse
. (Data Hold Time) ....................................... 75 ns
C. Minimum Data Pulse Width ................................. 150 ns
D. Minimum Clock Pulse Width ................................ 150 ns
E_ Minimum Time Between Clock Activation and Strobe. . . . . . . . . . .. 300 ns
F. Minimum Strobe Pulse Width ............................... 100 ns
G. Typical Time Between Strobe Activation and
Output Transistion ..................................... 500 ns

TRUTH TABLE
Shift Register Contents
Serial
Data Clock.
IN_1 IN
Input Input I-1 12 13

...

Serial
Data Strobe
Output Input

R1

R2

...

RN_2 RN_1

RN_1

R1

R2 ...

RN_2 RN_1

RN_1

H

I

H

L

I

L

X

L.

R1

R2 R3 ...

X

X

X

RN_1 RN

... X

P 1 P2 P3 ...

X

PN-1 PN

Latch Contents
11

12

13

...

IN_1

R2

R3

...

RN_1 RN

H = High Logic Level

IN

Blanking

11

12

13

...

IN_1

IN

RN

X

L

R1

PN

H

P1 P2 P3 ...

X
L = Low Logic Level

Output Contents

X = Irrelevant

X

P = Present State

X

...

PN-1 PN

L

P1 P2 P3 ...

X

H

L

X

L

L

...

PN-1 PN

L

L

R = Previous State

3-173

BiMOS H 8-BIT SERIAL-INPUT,
LATCHED DRIVERS
,

OUT,

SERIAL DATA IN

2

OUT,

LOGIC GROUND

3

OUT3

SERIAL DATA OUT

5

OUTS

OUTPUT ENABLE

7

OUT7

POWER GROUND

8

CLOCK

OUT 4

Dwg. No. PP-026

A merged combination of bipolar and MOS technology gives
these devices an interface flexibility beyond the reach of standard
logic buffers and power driver arrays. The three devices in this series
each have an eight-bit CMOS shift register and CMOS control circuitry,
eight CMOS data latches, and eight bipolar current-sinking Darlington
output drivers. Except for maximum driver output voltage ratings,
the UCN5821A, UCN5822A, and UCN5823A are identical.
SiMOS II devices have much higher data-input rates than the
original SiMOS circuits. With a 5 V logic supply, they will typically
operate at better than 5 MHz. With a 12 V supply, significantly higher
speeds are obtained. The CMOS inputs are compatible with standard
CMOS and NMOS logic levels. TTL circuits may require the use of
appropriate pull-up resistors. Sy using the serial data output, the drivers
can be cascaded for interface applications requiring additional drive
lines.

FEATURES
•
•
•
•
•
•

3.3 MHz Minimum Data Input Rate
CMOS, NMOS, TTL Compatible
Internal Pull-Down Resistors
Low-Power CMOS Logic & Latches
High-Voltage Current-Sink Outputs
16-Pin Dual In-Line Plastic Package

ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air 1:emperature
Output Voltage, VOUT
(UCN5821 A) .................. 50 V
(UCN5822A) .................. 80 V
(UCN5823A) ................. 100 V
Logic Supply Voltage, Voo ........... 15V
Input Voltage Range,
VIN ............. -0.3VtoVoo +0.3V
Continuous Output Current,
IOUT······················500mA

Package Power Dissipation,
Po ·······················2.08W*
Operating Temperature Range,
TA • • • • • • • • • • • • • • • • • • -20°C to +85°C
Storage Temperature Range,
Ts ................. -55°C to +150°C
'Derate at the rate of 16.7 mW/oC above TA =+25°C
Caution: CMOS devices have input static protection
but are susceptible to damage when exposed to
extremely high static electrical charges.

3-174

Always order by complete part number:

Part Number
UCN5821A

Max. VOUT
50V

UCN5822A

80V

UCN5823A

100 V

TYPICAL INPUT CIRCUITS

FUNCTIONAL BLOCK DIAGRAM
CLOCK'
SERIAL

DATA IN
LOGIC
GROUND

6

STROBE
OUTPUT
ENABLE

STROBE

7 OUTPUT ENABLE
(ACTIVE LOW)

sqPOWER

GROUND

Owg. No. FP.(I13
Dwg. No. EP.(Il0·3

Number of Outputs ON
(lOUT = 200 mA
Voo= 12 V)
8
7
6
5
4

CLOCK
SERIAL
DATA IN

3
r77

2
1

25°C
90%
100%
100%
100%
100%
100%
100%
100%

Max. Allowable Duty Cycle
at Ambient Temperature of
40°C
50°C
60°C
79%
90%
100%
100%
100%
100%
100%
100%

72%
82%
96%
100%
100%
100%
100%
100%

65%
74%
86%
100%
100%
100%
100%
100%

70°C
57%
65%
76%
91%
100%
100%
100%
100%

Dwg. No. EP'0104

TYPICAL OUTPUT DRIVER

Dwg. No. A-14.314

3-175

ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5 V, (unless otherwise specified).
Applicable
Characteristic
Output Leakage Current

Symbol

Devices

IcEX

UCN5821A

Limits
Test Conditions

Min.

Max.

Units

-

50

J.tA

100

J.tA

Vour=80V

-

50

J.tA

Your = 80 V, TA = +70°C

-

100

J.tA

Vour =100V

-

50

J.tA

Vour = 100 V, TA = +70°C

100

J.tA

lour = 100 mA

-

1.1

V

lour =200 mA

-

1.3

V

lour = 350 mA, Voo = 7.0 V

-

1.6

V

-

0.8

V

Vour =50V
Vour= 50 V, TA = +70oG

UCN5822A

UCN5823A

Collector· Emitter
Saturation Voltage

InputVoltage

Input Resistance

Supply Current

VCE(SAl)

ALL

VIN(O)

ALL

VIN (!)

ALL

RIN

IOO(ON)

IOO(OFF)

ALL

ALL

ALL

Voo= 12V

10.5

-

V

Voo=10V

8.5

-

V

Voo = 5.0 V

3.5

-

V

Voo=12V

50

-

k.Q

Voo=10V

50

-

k.Q

Voo ';5.0 V

50

-

kO

One Driver ON, V00 = 12 V

-

4.5

mA

One Driver ON, Voo = 10 V

-

3.9

mA

One Driver ON, V 00 = 5.0 V

-

2.4

mA

Voo = 5.0 V, All Drivers OFF, All Inputs = 0 V

-

1.6

mA

2.9

mA

Voo = 12 V, All Drivers OFF, All Inputs = 0 V

3-176

I

CLOCK

Serial Data present at the input is transferred to the shift register on the logic "0" to
logic "1" transition of the CLOCK input pulse.
On succeeding CLOCK pulses, the registers
shift data information towards the SERIAL
DATA OUTPUT. The SERIAL DATA must
appear at the input prior to the rising edge of
the CLOCK input waveform.

~I_______

. -$.A
B~-i
DATA IN I
---------r

~;

C

ETF~

~L----~L------------

Information present at any register is
transferred to its respective latch when the
STROBE is high (serial-to-parallel conversion). The latches will continue to accept new
data as long as the STROBE is held high.
Applications where the latches are bypassed
(STROBE tied high) will require that the
ENABLE input be high during serial data
entry.

['

OUTN - - - - - - - - - - - - - ,
Dwg. No. A-12,627

When the ENABLE input is high, all of the
output buffers are disabled (OFF) without
affecting the information stored in the latches
or shift register. With the ENABLE input low,
the outputs are controlled by the state of the
latches.

TIMING CONDITIONS
(Voo = 5.0 V, TA = +25°C, Logic Levels are Voo and Ground)
A. Minimum Data Active Time Before Clock Pulse
(Data Set-Up Time) ........ , ... , .................. , .. , .. 75 ns
B. Minimum Data Active Time After Clock Pulse
(Data Hold Time) ..... , _. , .............................. 75 ns
C. Minimum Data Pulse Width ......... , , ...................... 150 ns
D. Minimum Clock Pulse Width ............. , .. , ..... , _..... , .. 150 ns
E. Minimum Time Between Clock Activation and Strobe ... , .. , , .. ,. 300 ns
F. Minimum Strobe Pulse Width. , ... , . , ..................... , . 100 ns
G. Typical Time Between Strobe Activation and
Output Transition ................... , .... , ......... , ,. 500 ns

TRUTH TABLE
Shift Register Contents
Serial
Data Clock
Input Input I, 12 13
18

..............

Serial
Data Strobe
Output Input

Latch Contents
I,

12

13

..............

Output Contents

18

H

I

H

Rl R2 .............. R7

L

.r

L

Rl R2

R7

R7

X

1..

Rl R2 R3 .............. Rs
X X X .............. X

Rs
X

L

Rl R2 R3 .............. Rs

Ps

H

P1 P2 P3 .. ............ Ps
X X X .. ............ X

P1 P2 P3
L = Low Logic Level

..............

..............

Ps

H = High Logic Level

Output
Enable

I,

12 13

..............

18

R7

X = Irrelevant

P = Present State

L

P1 P2 P3

..............

Ps

H

H H H

..............

H

R = Previous State

3-177

9-BIT SEHIAL-INPUT,
LATCHED SINK DlUVEH

h

~ ~ffi

i

..

~

~

~~
~o

~

~

Intended primarily to drive high-current, dot matrix 9- and 24-wire
printer solenoids, the UCN5829EB serial-input, latched sink driver
provides a complete driver function with a minimum external parts
count. Included on chip are constant-frequency PWM current control
for each output driver, a user-defined output enable timeout, current
sensing, and thermal shutdown.

~

.}

m~

The 9-bit CMOS shift register and latches allow operation with most
microprocessor/LSI-based systems. With a 5 V logic supply, these
BiMOS devices will operate at data input rates greater than 3.3 MHz.
The CMOS inputs cause minimum loading and are compatible with
standard CMOS, PMOS, NMOS, and TTL circuits. A CMOS serial data
output allows cascade connections in applications requiring additional
drive lines as required for 24-wire printheads.

~~ § .;0

.; .; ~ .;
0

0

0

§ § .;0

~~

~

!

Owg. No. PP·02BA

ABSOLUTE MAXIMUM RATINGS

Output Voltage, VOUT .............. 50 V
Output Current, lOUT
(Continuous) ................. 1.6 A
(Peak) ...................... 1.8 A
Logic Supply Voltage, Voo' ......... 7.0 V
Input Voltage Range,
VIN

•••••.•.••.•

·0.3 V to Voo + 0.3 V

Package Power Dissipation,
PD' ................... See

Graph

Operating Temperature Range,
TA •

• • • • • • • • • • • • • • ••

The device features nine open-collector Darlington drivers, each
rated at 50 V and 1.6 A. Current-control for each output is provided by
an internal current-sensing resistor and a constant-frequency chopper
circuit. An external high-side driver can be used to optimize print head
performance. It is enabled by an on-Chip driver during the output
enable timeout. Internal logic sequencing prevents false output operation during power up. Other high-current devices for driving dot matrix
printheads are the UDN2961BIW and UDN2962W.
The UCN5829EB is supplied in a 44-lead power PLCC. Its batwing
construction provides for maximum package power dissipation in a
minimum-area, surface-mountable package.

FEATURES
•
•
•
•
•
•
•
•
•
•

1.6 A Continuous Output Current
50 V Minimum Sustaining Voltage
Internal Current Sensing
Constant-Frequency PWM Current Control
Control for External High-Side Driver
3.3 MHz Guaranteed Data Input Rate
Low-Power CMOS Logic & Latches
Internal Pull-Ups for TTL Compatibility
User-Defined Output Enable Timeout
Internal Thermal Shutdown Circuitry

·20°C to +85°C

Junction Temperature, TJ • . . . . . . . +150°C'
Storage Temperature Range,
Ts' ............... ·55°Cto+150°C
• Fault conditions that produce excessive junction
temperature will activate device thermal shutdown
circuitry. These conditions can be tolerated, but
should be avoided.
Caution: This CMOS device has input static
protection but is susceptible to damage when
exposed to extremely high static electrical charges.

Always order by complete part number: 1UCN5829EB
3-178

I.

FUNCTIONAL BLOCK DIAGRAM
HIGH-SIDE
DRIVER

6

STROBE

RCV
5 kQ

CLOCK

±1%

SERIAL
DATA IN

",'--+--1
uS
~

SERIAL
DATA OUT

(f)

(f)

II:
W

II:
W

>
a:
o

INg

1

>

a:
o

~

~

DRIVER TWO
OF NINE
DRIVERS

«1

n

Dwg. FP-015

en

12.5

~

~
Z

10r------+------+---~

o

~

0-

lii
en 7.5
i5
a::

I----t----t----+'~--+_--_I

w
!i:

o0W

Cl

<
~

(.)

<
0-

~

III

<

!i:

9
...I

<

50

75

100

TEMPERATURE IN °C

125

150

Dwg. No. GP-D2QB

3-179

TYPICAL INPUT CIRCUITS

TYPICAL·OUTPUT DRIVER

...--------oOUTN

IN

«1 Q

Dwg. No. EP·Ol0-3

Dwg. No. EP-021-2

ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5 V,
in Test Circuit/Typical Application (unless otherwise noted).
Characteristic

Test Conditions

Min.

Typ.

Limits
Max.

Output Power Drivers (OUT, through OUTg) with VREF <::4.5 V
Output Leakage Current
Output Saturation Voltage

Output Sustaining Voltage

VOUT= 50 V

-

1.0

100

/lA

IOUT= 1.0 A

-

1.0

1.5

V

IOUT= 1.6A

-

1.5

1.9

V

VOUT(sus)

IOUT= 1.6 A, L = 2.5 mH

50

-

-

V

VCE(SAT)

Ic = 20 rnA

lOUT
VOUT(SAT)

Control Logic
HSD Output Saturation Voltage
Logic Input Voltage

VIN (1)
VIN(O)

Logic Input Current

liN

Reference Input Current

IREF
100

Maximum Clock Frequency

felk

Serial Data Output Voltage

VOUT (1)
VOUT(O)

Clock to Serial Data Out Delay

tpo

Thermal Shutdown Temperature

TJ

0.5

1.0

V

-

5.3

V

·0.3

-

0.8

V

1.0

·90

·180

-

500

900

All Drivers OFF

-

/lA
/lA
/lA

15

25

mA

All Drivers ON, No Load

-

55

75

mA

3.3

5.0

-

MHz

lOUT = ·200 /lA

4.5

4.7

-

V

lOUT = 200 /lA

-

250

-

mV

CL = 30 pF

-

-

300

ns

165

-

°C

VIN = 5.0 V
VIN = 0.8 V

Logic Supply Current
(V REF = 2.0 V)

3.5

VREF = 3.0 V

Continued next page ...

3·180

ELECTRICAL CHABACTERISTICS at T A = +25°C, VDD = 5 V,
in Test Circuit/Typical Application (unless otherwise noted).
Limits
Characteristic

Test Conditions

Chopping Characteristics (TJ

Min.

Typ.

Max.

= +25°C to +150°C) with Fast Clamp Diodes

Enable Timeout

tEN

REN = 20 kil, CEN = 0.01 J.lF

190

200

210

J.lS

fCh

Rc = 20 kQ, Cc = 250 pF

90

100

110

kHz

Duty Cycle Range

dc

ton I ton + toll

15

-

<50

%

Chop Current Level

ITRIP

VREF = 2.0 V,

fCh

< 100 kHz

0.9

1.0

1.1

A

VREF = 2.8 V,

fCh

< 100 kHz

1.26

1.4

1.54

A

1.0

3.2

V

0.5

-

1.6

A

-

300

500

ns

4.5

-

Vee + 0.3

V

Chopping Frequency

Output Current Control Range

VREF
ITRIP

Delay

td

Chop Inhibit Voltage Range

ITRIP to IOUT(P), TA = +25°C

VREF

..
Negative current IS defined as coming out of (sourcing) the specified device terminal.

EXTERNAL mGH-SIDE DRIVERS

CHARGE-PUMP CmCUITRY

NMOS

PMOS

FOR SINGLE-SUPPLY OPERATION

Vss
Vss+ 10V

VSS

0.022
~F

Dwg. No. EP-027

Dwg. No. Ep·028

Dwg. No. EP-026

3-181

TEST CIRCUIT AND
TYPICAL APPLICATION
+36 V

POWER
NMOS

CHARGE

PUMP

--------------:-

I

LOADS (9)

I
I
I

--------------

J

I
I
I
I

I
I
I
I

I
I
I
I

OUTPUTS

Voo

HIGH-SIDE
DRIVER (HSD)
RC C

V REF

-:-

STROBE

RC EN

CLOCK

INg

t-----''--''

SERIAL
DATA IN

SERIAL
DATA OUT

Skn±1%
Dwg. No. EP·023A

TRUTH TABLE
Serial
Data

Clock

Input

Input

Shift Register
Contents·

'2

...

Serial
Data

Strobe
Input

'9

Output

H R,

...
...

Rs

R7

L

I
I

Rs

R7

X

1

R, R2 ...

Rg

Rs

H

"
L

R,

X X

... X

P, P2 ...

Pg

Latch
Contents·

"

'2 ... '9

Output
Contents·

"

X

H

'X

H

R,

R2 ... Rg

Ps

L

P,

P2 ... Pg

P,

'2 ... '9
H

L

P2 ... Pg

H

* Serial Data Output connected to Inputg'

L = Low Logic Level

3-182

H = High Logic Level

X

= Irrelevant

P = Present State

HSD
OUTPUT

R = Previous State

D

CLOCK _ _- - I

DATA IN

~

STROBE

C

E·I

1

F

r-r---I- -

f+- G---.j
HIGH-SIDE _ _ _ _ _ _....1

1...______

IJ

DRIVER OUT

I

-'V~

LOAD _ _ _ _ _ _
CURRENT

\

\
\
\

\

~TO IOUT(asym)
I

I

Dwg. No. WP-011 A

TIMING CONDITIONS

TA

=+25°C, Logic Levels are VDD and Ground

A. Minimum Data Active Time Before Clock Pulse
(Data Sel·Up Time) .................................... 75 ns
B. Minimum Data Active Time After Clock Pulse
(Data Hold Time) ..................................... 75 ns
C. Minimum Data Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 250 ns
D. Minimum Clock Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 250 ns
E. Minimum Time Between Clock Activation and Strobe. . . . . . . . . . .. 500 ns
F. Minimum Strobe Pulse Width ........ , ..... , ...... , ........ 500 ns
G. Enable Timeout. tEN ...................................... REN CEN
H. Chop Period., ton + toft· ................................... 2 Rc Cc
• Chopping is disabled if VREF is greater than 4.5 V.

3-183

APPLICATIONS INFORMATION
The UCN5829EB is designed to drive high-current, 9- or 24-wire
(3 devices cascaded) dot matrix impact printer solenoids. The internal
CMOS control logic:
1) selects the operating channels from a 9- or 24-bit word previously
loaded into the shift register,
2) controls the peak load current of the output drivers via nine
constant-frequency switch-mode current choppers,
3) sets a user-defined print enable time, and
4) turns ON an external high-side driver during the print enable
interval.
Data present at the SERIAL DATA INPUT is transferred to the shift
register on the low-to-high transition of the CLOCK input pulse. The data
must appear at the input prior to the rising edge of the clock input waveform.
On succeeding clock pulses, the registers shift data information towards the
SERIAL DATA OUTPUT. Information present at any register is transferred
to its respective latch on the high-to-Iow transition of the STROBE (serial-toparallel conversion). Drivers that have a logic high stored in their latch will
be enabled for a set time interval (tEN) generated by an internal one-shot.
The output current is internally sensed and controlled in a fixed-frequency
chopper format. Between strobe pulses, a new data word can be clocked in
for the next print enable cycle.
PRINT ENABLE TIME

A high-to-Iow transition of the STROBE input starts an internal one-shot
which sets the print enable time (tEf'I) of the output drivers and the external
high-side driver. The print enable time is determined by an external resistor
(50 knmax) and capacitor (100 pF min) at RC EN as
tEN

= REN CEN

The print enable time can also be controlled from a microprocessor. In
this mode, the internal one-shot is operated as an output disable function.
In this mode, REN and CEN are not used; instead a 10 kn series resistor is
connected between RC EN and an externally generated output disable pulse. .
As before, on the high-to-Iow STROBE transition, the outputs will be enabled. They will remain enabled until a low-to-high logic (;::3.3 V) DISABLE
transition at RCEN"
When operating in a continuous chopping mode, and neither print
enable timeout nor output disable are desired, RC EN should be grounded.·
BIGB-SIDE DRIVER

To reduce the current decay time at the end of a print enable cycle,
an external high-side driver can be used and controlled by the HIGH-SIDE
DRIVER (HSD) output.. The HSD is designed to drive an external
N-channel MOSFET (with accompanying charge pump circuitry). During
the print enable time (tEN)' the internal high-side driver is OFF, allowing the
external high-side driver to be ON. If the external high-side driver is a
P-channel device (eliminating the need for charge-pump circuitry), the
HSD signal must be inverted for correct operation.
If an external high-side driver is used, an external ground clamp diode is
also required.

OUTPUT CURRENT CONTROL
Each of the nine channels consists of a power Darlington sink driver,
internal low-value current-sensing resistor, comparator, and an RIS flip-flop.
The output current is sensed and controlled independently in each channel
by means of a fixed-frequency chopper which sets the flip-flop and allows
the 'output to turn ON. As the current increases in the load it is sensed by
the internal sense resistor until the sense voltage equals the trip voltage of
the comparator. At this time, the flip-flop is reset and the output is turned
OFF. Over the range of VA 4.5 V. To prevent
operation at higher than allowable current leve1s, V AEF should not exceed
3.2 V, except to disable the chopping function.

DUTY CYCLE LIMITS
For correct operation of the UCN5829EB, the duty cycle must be
between 15% and 50% with 20% to 40% recommended. The lower limit is
due to internal lockout circuitry while the upper limit guarantees synchronous operation. The duty cycle (dc) can be calculated as
dc =

_t_on_ ~
ton + tOil

where

IOUTI?) I louTlasym) + Vd l Vc
1+Vd /vc

louTlasym) = the asymptotic current value ~ v/R L
Vd = discharge voltage across the load = VHSO + VOIOOE
Vc = charge voltage across the load = V ss - V OUTISAT) - V HSO

For most practical cases, correct operation can be achieved if
louTlasym/ IOUTI?) > 2.5.

3-185

GENERAL
For applications with 9-wire printheads, SERIAL DATA OUT should be
connected to INg. For 24-wire printhead applications, three devices (eight
channels per device) are cascaded by connecting SERIAL DATA OUT to
the next SERIAL DATA IN.
Each of the CMOS logic inputs have internal pull-up resistors for TTL
compatibility.
An external transient-protection flyback diode is required at each output.
Fast recovery diodes are recommended to reduce power dissipation in the
UCN5829EB. Internal filtering prevents false triggering of the current sense
comparator which can be caused by the recovery current spike of the
diodes when the outputs turn ON.
The SUPPLY terminal should be well decoupled with a capacitor placed
as close as possible to the device. Internal power-ON reset circuitry
prevents false output triggering during power up.
Thermal protection circuitry is activated and turns OFF all drivers at a
junction temperature of typically + 165°C. The thermal shutdown is independent of all other functions. It should not be used as another control
input but is intended only to protect the chip from catastrophic failures due
to excessive junction temperatures. The output drivers are re-enabled
when the junction temperature cools down to approximately + 145°C.

TYPICAL APPLICATION
Shown is a typical application with the UCN5829EB controlling a chop
current of 1 A through a 3 mH, 9 Q load. To check the duty cycle and
louTlasym/louTIP) restrictions
where

Vd = VHSD+VDIODE '" 1.5+1.5 = 3
Vc = VBB

-

VOUTISAT) - VHSD = 36 -1.5 -1.5 = 33

louTlasym) = vJ RL = 33/9 = 3.67
then

louTlasym/ IOUTIP) = 3.67/ 1 = 3.67

The condition of louTlas m/ IOUTIP) > 2.5 is met and the duty cycle will be within
the proscribed limits. The actual duty cycle is
dc =

IOUT(P/loUT(asym! + vivc

1.0/3.67 + 2.5/33

1 + v/vc

1 + 2.5/33

= 32%

For a 50 kHz chopping frequency and a 250 /ls print enable time, the
remaining component values are

3-186

with

Ce = 250 pF and C EN = 0.01 /IF

then

Re = 1/(2 fCh C e) = 1/(2 x 50 x 103 x 250 x 10- '2 ) = 40 kQ

and

REN = tEN / C EN = 250 x 10-6 / 10 x 10-g = 25 kQ

BiMOS n 32-BIT SERIAL-INPUT,
LATCHED DRIVERS
UCN5832A
LOGIC - - , . . . - - - - " . - - - .
CLOCK
SUPPLY
SERIAL
A
DATA IN l-<--,-----,
,----illJ
OUTPUT
GROUNO
ENABLE
OUT l2

6m 6uT

OUT 31

The devices each have 32 bipolar npn open-collector saturated
drivers, a CMOS data latch for each of the drivers, two 16-bit CMOS
shift registers, and CMOS control circuitry. The high-speed CMOS shift
registers and latches allow operation with most microprocessor- based
systems. Use of these drivers with TTL may require input pull-up
resistors to ensure an input logic high. MOS serial data outputs permit
cascading for interface applications requiring additional drive lines.

OUT 30
OUT Z9
OUT Z8
OUTZI

OUT ZS
OUT Z4
OUT Z3

OUT ZI
OUT ZO
OUT I9

OUTIl

-.1IIIIIi_________

The UCN5832A is supplied in a 40-pin dual in-line plastic package
with 0.600" (15.24 mm) row spacing. Under normal operating conditions, this device will allow all outputs to sustain 100 mA continuously
without derating. The UCN5832EP is supplied in a 44-lead plastic
leaded chip carrier for minimum area, surface-mount applications. Both
devices are also available for operation from -40°C to +85°C. To order,
change the prefix from 'UCN' to 'UCQ'.
Similar 32-bit serial-input latched source drivers are available
as UCN5818AF/EPF. High-voltage, high-current 8-bit devices are
available in Series UCN5820A and UCN5840NEP/LW.

OUT I8

21

Intended originally to drive thermal printheads, Types UCN5832A
and UCN5832EP have been optimized for low output-saturation
voltage, high-speed operation, and pin configurations most convenient
for the tight space requirements of high-resolution printheads. The
integrated circuits can also be used to drive multiplexed LED displays
or incandescent lamps at up to 150 mA peak current. The combination
of bipolar and MOS technologies gives BiMOS II arrays an interface
flexibility beyond the reach of standard buffers and power driver
circuits.

INTERNAL
CONNECTION

ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
Output Voltage, VOUT .............. 40 V
Logic Supply Voltage, VDD . . . . . . . . . . 15 V
Input Voltage Range,
V IN ••..•.....•. -0.3 V to V DO + 0.3 V
Continuous Output Current,
lOUT' ..................... 150 mA
Package Power Dissipation,
PD' . . . . . . . . . . . . . . . . . . . See Graph
Operating Temperature Range,
TA • • . . • . • . . . • . . . . . -20°C to +85°C
Storage Temperature Range,
Ts ................ -55°C to +150 C

FEATURES
•
•
•
•

5 MHz Typical Data Input Rate
Low-Power CMOS Logic and Latches
40 V Current Sink Outputs
Low Saturation Voltage

Always order by complete part number:

D

Caution: CMOS devices have input-static
protection but are susceptible to damage when
exposed to extremely high static electrical charges.

Part Number

Package

UCN5832A

40-Pin DIP

UCN5832EP

44-Lead PLCC
3-187

i

FUNCTIONAL BLOCK DIAGRAM

i!!:

z
a

~

Cii

2.0/----3!o.------~

'"C
a:

w

~

1.51----t----"'I..

D.

w

CJ

g 1.01----t---+----"iE---->~_+--__I
~

___

~L

w
..J
m

__

BIPOLAR

~ O.5t---+--+---t--~~.--I

a

..J
..J

q

~~5---5~O------7~5------1~O~O-----12L5----~150
AMBIENT TEMPERATURE IN °C
Dwg. GP-025

UCN5832EP
w

50

~

!'l
~

g

~

~;,;

(!)

",0

~~
w<

>-

o~

§~

,:;"

§
0

~O

>-w
=>~

~~ >-<
w< =>z
~m

",0

Ow

5'"

~

L.....__,.---,__......__.--____.-...,.__,.---,__-.J,---~'" QUT21

5o

3-188

5o

5o

Dwg. No. A-14,360

ELECTRICAL CHARACTERISTICS at T A = +25°C, V00 = 5 V (unless otherwise noted).
Limits
Characteristic

Symbol

Output Leakage Current
Collector-Emitter
Saturation Voltage
Input Voltage

Input Current

Input Impedance
Serial Data Output Resistance
Supply Current

ICEX
VCEISAT)

Test Conditions

Min.

Max.

Units

-

10

JlA

lOUT = 50 rnA

275

mV

lOUT =·100 rnA

250

550

mV

V OUT = 40 V, TA = 70°C

V IN(1 )

3.5

5.3

V

VINIO)

-0.3

+0.8

V

IIN(1)

VIN = 3.5 V

IINIO)

V IN = 0.8 V

-

liN

V IN = 3.5 V

3.5

-

20

kQ

One output ON, lOUT = 100 rnA

-

5.0

rnA

ROUT
100

All outputs OFF
Output Rise Time

tr

lOUT = 100 rnA, 10% to 90%

Output Fall Time

tf

lOUT = 100 rnA, 90% to 10%

1.0

JlA

-1.0

JlA

-

MQ

50

JlA

1.0

Jls

1.0

Jls

NOTE: PoSItive (negative) current is defined as gOing Into (coming out of) the specified deVice pin.

TYPICAL INPUT CIRCUIT

TYPICAL OUTPUT DRIVER

OUT

I N Q--JllVI.--

~&

g~

u

a

u

w
<

z

--t---li..]
<>--+--u.J--'

~-----i

<>----UJ

OUTPUT Q----ilJOE''"LtoL.H;:-t-rUlJ--'
ENABLE
(ACTIVE LOW)
Dwg. No.

A-12.547

TRUTH TABLE
Shift Register Contents
Serial
Data Clock
Input Input I, 12 13
Is

..............

R1 R2 .............. R7

H

I

H

L

I

L

X

""L

R1 R2 R3
X

R1 R2
X

X

P1 P2 P3

..............
..............

Serial
Data Strobe
Output Input

I,

R7

R7
Rs

.............. X

X

L

..............

Ps

H

H = High Logic Level

13

..............

Is

R, R2 R3 .---.-----.. -. Rs
P, P2 P3 -.. -.--.. --... Ps
X

L = Low Logic Level

12

Output Contents
Output
Enable

I, 12 13

..............

Is

P, P2 P3
H H H

..............
..............

Ps
H

R7

Rs
Ps

Latch Contents

X = Irrelevant

X

P = Present State

X

.______ .. _.. _. X

L

H

R = Previous State

3-199

BiMOS n DUAL 8-BIT LATCHED
DRIVER WITH READ BACK
With 16 CMOS data latches (two sets of eight), CMOS control
circuitry for each set of latches, and a bipolar saturated driver for each
latch, the UCN5881 EP provides low-power interface with maximum
flexibility. The driver includes thermal shutdown circuitry to protect
against damage from high junction temperatures and clamp diodes
for inductive load transient suppression.
The CMOS inputs cause minimal circuit loading and are compatible
with standard CMOS, PMOS, and NMOS circuits. TTL or DTL circuits
may require the use of appropriate pull up resistors. When reading
back, each data input will sink 8 mA (if its corresponding latch is low) or
source 400 j.IA (if its corresponding latch is high). The read back feature
is for error checking. It allows the system to verify that data has been
received and latched.
The bipolar outputs are suitable for use with low-power relays,
solenoids, and stepping motors. The very-low output saturation voltage
makes this device well-suited for driving LED arrays. The output
transistors are capable of sinking 50 mA and will maintain at least
20 V in the OFF state. Outputs may be paralleled for higher current
capability.
Dwg. No. A-14,22S

The UCN5881 EP dual 8-bit latched sink driver is rated for operation
over the temperature range of -20°C to +85°C and is supplied in a
plastic 44-lead chip carrier conforming to the JEDEC MS-007AB
outline.

FEATURES

ABSOLUTE MAXIMUM RATINGS

•
•
•
•
•
•

4.4 MHz Minimum Data-Input Rate
Low-Power CMOS Logic
20 V, 50 mA (Max.) Outputs
Transient-Protected Outputs
Thermal Shutdown Protection
Low-Profile Leaded Chip Carrier

Output Voltage, VOUT .............. 20 V
Output Sustaining Voltage, VCElsus)

•••

15 V

Output Current, lOUT ............. 50 mA
Input Voltage Range,
VIN •••••••••••• -0.3 V to Voo + 0.3 V
Logic Supply Voltage, V DO. . . . . . . . . . 15 V
Package Power Dissipation,
Po' ................... See Graph
Operating Temperature Range,
TA ••••••••••••••••• -20°C to +85°C
Storage Temperature Range,
Ts ................ -55°C to +150°C
Caution: CMOS devices have input static
protection, but are susceptible to damage when
exposed to extremely high static electrical
charges.

Always order by complete part number:
3-200

IUCN5881 EP I.

FUNCTIONAL BLOCK DIAGRAM
(1 OF 16 CHANNELS)
Voo 0
CLEARo-------------~

STROBEo---------------,-~

K

OUTPUTN
READIINN

READ/WRITE

OWg. No. A-14,227

TRUTH TABLE
.0

5~
.0

5

Clear

X
D

X

X
0
0
0

1

~

n

~~

~
75

100

0
X
X

1

0

Output
Enable

Latch
ReadlWrite Contents

1

X

0
0
0
X
X

X
0

1

n-1

X
0

n

0

Output
OFF
OFF
ON
n-1
OFF
n

n = Present Latch Contents
n-1 = Previous Latch Contents
X = Irrelevant

Vb-1t-

.0

50

Strobe

X
X

.",

0
25

Read!ln

~

125

150

AMBIENT TEMPERATURE IN 'C
Dwg. No. GP-025-1

3-201

ELECTRICAL CHARACTERISTICS at TA

=25°C, VDD =5 V (uuless otherwise noted).
limits

Characteristic

Symbol

Output Leakage Current
Output Saturation Voltage

Output Sustaining Voltage
Input Voltage

Input Current

Readback Output Voltage

Logic Supply Current

Test Conditions

Min.

Max.

Units

ICEX

VouT =20V

-

50

J.LA

VCE(SAT)

lOUT = 10 mA

-

0.1

V

lOUT = 25 mA

-

0.5

V

-

V

VIN(O)

-0.3

0.8

V

V IN (1)

3.5

5.3

V

VCE(SUS)

lOUT = 25 mA, L = 2 mH

15

IIN(O)

VIN = 0.8 V

-

-10

J.lA

IIN(1)

V IN = 5 V

-

10

J.LA

3.5

-

J.LA

V

VOUT(1)

lOUT = -400

VOUT(O)

lOUT = 5.0 mA

-

0.8

V

100

All Drivers ON

-

14

mA

All Drivers-OFF

-

3.0

mA

-

50

J.LA

-

1.5

V

Clamp Diode Leakage Current

IR

V R =20 V

Clamp Diode Forward Voltage

VF

IF = 50 mA

A high on the READIWRITE input allows
the circuit to accept data in. Information then
present at an input is transferred to its latch
when the STROBE is high. A high CLEAR
input will set all latches to the output OFF
condition regardless of the data or STROBE
input levels. A high OUTPUT ENABLE will
set all outputs to the OFF condition regardless of any other input conditions. When the
OUTPUT ENABLE is low, the outputs depend
on the state of their respective latches.
Dwg. No. A·14,228

TIMING CONDITIONS
(VDD = 5.0 V, Logic Levels are VDD and Ground)
A. Minimum Data Active Time Before Strobe Enabled
(Data Set-Up Time) .................................... 50 ns
B. Minimum Data Active Time After Strobe Disabled
(Data Hold Time) ...................................... 50 ns
C. Minimum Strobe Pulse Width ............................... 125 ns
D. Typical Time Between Strobe Activation and Output
ON to OFF Transition ................................... 5 J.ls
E. Typical Time Between Strobe Activation and Output
OFF to ON Transition ................................. 500 ns
F. Minimum Clear Pulse Width ................................ 225 ns
G. Minimum Data Pulse Width ................................ 225 ns
3-202

A low on the READIWRITE input will
allow the latched data to be read back on the
data input lines. Allow a minimum of 750 ns
delay (will increase with capacitive loading)
before reading back the state of the latches.
The read back feature is for error checking
applications and allows the system to verify
that data has been received and latched.

BiMOS II 8-BIT SERIAL-INPUT,
LATCHED SOURCE DlUVERS
SERIAL
DATA OUT
LOGIC SUPPLY

OUTPUT
ENABLE
LOAD SUPPLY

OUTS

Dwg. No. 12,639

ABSOLUTE MAXIMUM RATINGS
atTA

=+25°C

Output Voltage, VOUT
(UCN5890A) .................. 80 V
(UCN5891A) .................. 50V
Logic Supply Voltage Range,
Voo' .................. 4.5 Vto 15 V
Driver Supply Voltage Range, VBB
(UCN5890A) ............ 20 V to 80 V
(UCN5891 A) ............ 5.0 V to 50 V
Input Voltage Range,
VIN • . • • . • • • • • . • • -0.3 V to Vee + 0.3 V
Continuous Output Current,
lOUT ...................... -500mA
Allowable Package Power Dissipation,
PD' .................... See Graph
Operating Temperature Range,
T A' . • • • . . . . . • • . • • . • • -20°C to + 85°C
Storage Temperature Range,
Ts ................. -55°C to +150°C

Frequently applied in non·impact printer systems, the UCN5890A
and UCN5891A are SiMOS II serial·input, latched source (high·side)
drivers, The octal, high·current smart-power ICs merge an 8·bit CMOS
shift register, associated CMOS latches, and CMOS control logic
(strobe and output enable) with sourcing power Darlington outputs.
Typical applications include multiplexed LED and incandescent dis·
plays, relays, solenoids, and similar peripheral loads to a maximum
of -500 mA per output.
Except for output voltage ratings, these smart high·side driver ICs
are equivalent. The UCN5890A is rated for operation with load supply
voltages of 20 V to 80 V and a minimum output sustaining voltage of
50 V. The UCN5891 A is optimized for operation with supply voltages
of 5 V to 50 V (35 V sustaining).
SiMOS II devices have higher data·input rates than the original
SiMOS circuits. With a 5 V logic supply, they will typically operate at
better than 5 MHz. With a 12 V supply, significantly higher speeds are
obtained. The CMOS inputs are compatible with standard CMOS and
NMOS logic levels. TTL circuits may require the use of appropriate
pull·up resistors to ensure a proper input-logic high. A CMOS serial
data output, allows cascading these devices in multiple drive-line
applications required by many dot matrix, alphanumeric, and bar
graph displays.
All devices are supplied in a standard dual in-line plastic package
with copper lead frame for enhanced package power dissipation
characteristics. A similar driver, featuring reduced output saturation
voltage, is the UCN5895A. Complementary, 8-bit serial-input, latched
sink drivers are the Series UCN5820A.

FEATURES
•
•
•
•
•

50 V or 80 V Source Outputs
Output Current to -500 mA
Output Transient-Suppression Diodes
3.3 MHz Minimum Data-Input Rate
Low-Power CMOS Logic and Latches

Always order by complete part number:
Part Number

Caution: CMOS devices have input static protection,
but are susceptible to damage when exposed to
extremely high static electrical charges.

Max. VOUT

UCN5890A

80V

UCN5891A

50V
3·203

 DATA OUT

1---+--0 OUTPUT

ENABLE
(ACTIVE LOW)

Owg. No. A· 12,548

3-207

BiMOS H 8-BIT SEHlAL INPU~
LATCHED SOURCE DHIVERS
UCN5895A
SERIAL
DATA OUT
CLOCK

lOGIC SUPPLY

SERIAL
DATA IN

OUTPUT
ENABLE
lOAD SUPPLY

OUT,

OUT. a

-...............--

OUT 6
OUTs
Owg. No. i 2,639

The UCN5895A and UCN5895EP BiMOS II serial-input,
latched source drivers are designed for applications emphasizing
low output saturation voltages and currents to -250 mA per output.
These smart high-side octal, driver ICs merge an 8-bit CMOS shift
register, associated'CMOS latches, and CMOS control logic (strobe
and output enable) with medium current emitter-follower (sourcing)
outputs. Typical applications include incandescent or LED displays
(both directly driven and multiplexed), non-impact (i.e., thermal)
printers, relays, and solenoids.
The UCN5895A and UCN5895EP are suitable for high-side applications to -250 mA per channel. The maximum supply voltage is 50 V
and a minimum output sustaining voltage rating of 35 V for inductive
load applications. Under normal operating conditions, the UCN5895A
is capable of providing -120 mA (8 outputs continuous and simultaneous) at +65°C with a logic supply of 5 V. Similar devices, with
higher output current ratings, are the UCN5890A and UCN5891 A.
BiMOS II devices can operate at greatly improved data-input rates.
With a 5 V supply, they will typically operate at better than 5 MHz.
At 12 V, significantly higher speeds are obtained.
The CMOS inputs provide for minimum loading and are compatible
with standard CMOS, PMOS, and NMOS circuits. TTL or DTL circuits
may require the use of appropriate pull-up resistors to ensure a proper
input-logic high. A CMOS serial data output allows cascading these
devices in multiple drive-line applications required by many dot matrix,
alphanumeric, and bar graph displays.

ABSOLUTE MAXIMUM RATINGS
alTA =+25°C

Output Voltage, VOUT , . " " . " ••••• 50 V
Logic Supply Voltage Range,
V oo ····· .. ········ .. ·4.5Vt012V
Driver Supply Voltage Range,
Vee ····· .. ···········5.0Vt050V

Input Voltage Range,
V'N ............ -0.3 V to VDD + 0.3 V

Continuous Output Current,
lOUT ••..•.•••••••••••••••

-250 rnA

Allowable Package Power Dissipation,
Po" .................. See Graph
Operating Temperature Range,
TA

.................

These devices are rated for continuous operation over the temperature range of -20°C to +85°C. Because of limitations on package power
dissipation, the simultaneous operation of all output drivers may require
a reduction in duty cycle. The UCN5895A is supplied in a standard 16pin dual in-line plastic package with a copper lead .frame for increased
allowable package power dissipation. The UCN5895EP is supplied in
a 20-lead plastic leaded chip carrier for minimum area, surface-mount
applications.

FEATURES
•
•
•
•
•

Low Output-Saturation Voltage
Source Outputs to 50 V
Output Current to -250 mA
3.3 MHz Minimum Data-Input Rate
Low-Power CMOS Logic & Latches

-20°C to +85°C

Storage Temperature Range,
Ts ................ -55°C to +150°C
Caution: CMOS devices have input-static
protection. but are susceptible to damage when
exposed to extremely high static electrical charges.

Always order by complete part number, e.g.,
3-208

1UCN5895A I.

In

2.5r---"---"---~--'-----'

S
:=

FUNCTIONAL BLOCK DIAGRAM
('A' Package PIN numbers shown)

i!!: 2.oP'.....--+-----1f---+----+----I

~

2i

1.-L

SERIAL
DATA IN

- -~......,--"...

SERIAL
DATA OUT

C

I. .

1.01----+---'

OUTPUT
ENABII

1&1

~

~ O.~--~---~--~-~~~--_I

....1&1

!

50
75
100
125
AMBIENT TEMPERATURE IN ·C

150
Dwg. No. A·12.654

Dwg. No. GP-026

TYPICAL INPUT CmCUIT

UCN5895EP
I-

..Ji!!:

0

:!;

""
UJ« g
0

0:,..,

"'0

0

::>

z

-,0

~

0

a:.t-

00..

0:

'"

~<~n..

woe( 0::::'
U')O ...JU)

OUTPUT
ENABLE
STROBE

NC

LOAD
SUPPLY

LOAD
SUPPLY
OUTS

Dwg. No. A-12.520

TYPICAL OUTPUT DRIVER

NC

OUT 7

.

l-

::>
0

.,

I-

::>

0

VBB
Owg. No. A·14,368

OUT

Dwg. No. A·12.655

3-209

ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 50 V, VDD = 5 V and 12 V
(unless otherwise noted)•.
limits
Characteristic
Output Leakage Current

Symbol

Test Conditions

Output Sustaining Voltage
Input Voltage

Input Current

Input Impedance

Units

VCE{SAT)

lOUT = -60 mA
lOUT = -120 mA

-

1.2

V

VCE{SUS)

lOUT = -120 mA, L = 2 mH

35

-

V

TA =+25°C

-50

)JA

-100

)JA

1.1

V

Voo= 5.0 V

3.5

5.3

V

Voo= 12V

10.5

12.3

V

VIN{O)

V oo =5Vto12V

-0.3

+0.8

V

IIN{l)

Voo= VIN = 5.0 V

-

50

)JA

Voo= VIN = 12 V

-

240

)JA

Voo= 5.0 V

100

-

kn

Voo= 12 V

50

-

kn

VIN{l)

ZIN

Clock Frequency

fClK

Serial Data-Output
Resistance

ROUT

Turn-ON Delay

tplH

Turn-OFF Delay

tpHl

Output Enable to Output, lOUT = -120 mA

IBB

All outputs ON, All outputs open

Supply Current

Max.

-

lOUT

TA =+70°C
Output Saturation Voltage

Min.

3.3
Voo= 5.0 V
Voo= 12V
Output Enable to Output, lOUT = -120 mA

All outputs OFF
100

Voo = 5 V, All outputs OFF, Inputs = 0 V
Voo = 12 V, All outputs OFF, Inputs = 0 V
Voo = 5 V, One output ON, All inputs = 0 V
Voo = 12 V, One output ON, All inputs = 0 V

Diode Leakage Current

IR

Diode Forward Voltage

VF

V R = 25 V, TA = +25°C
V R = 25 V, TA = +70°C
IF= 120 mA

MHz

-

20

kQ

-

6.0

kn

2.0

).1s

-

-

10

).1S

10

mA

200

)JA

100

)JA

200

).1A

1.0

mA

3.0

mA

50

)JA

100

)JA

2.0

V

NOTES: Turn-off delay is influenced by load conditions. Systems applications well below the specified output loading may require timing considerations
for some designs, I.e., multiplexed displays or when used in combination with sink drivers in a totem pole configuration.
Positive (negative) current is defined as going into (coming out of) the specified device pin.

3-210

CLOCK

DATA IN

STROBE

I

I

--- -------

-ffi~
~C ETFI

-----------

~G~

OUTPUT
ENABLE

I

OUT N

-----------

r-l
~
Dwg. No. A-12,649A

TIMING CONDITIONS

(VDD

=5.0 V, Logic Levels are VDD and Ground)

A. Minimum Data Active Time Before Clock Pulse
(Data Set-Up Time) ..................................... 75 ns
B. Minimum Data Active Time After Clock Pulse
(Data Hold Time) ....................................... 75 ns
C.
D.
E.
F.
G.

Minimum Data Pulse Width ................................. 150 ns
Minimum Clock Pulse Width ................................ 150 ns
Minimum Time Between Clock Activation and Strobe. . . . . . . . . . .. 300 ns
Minimum Strobe Pulse Width ............................... 100 ns
Typical Time Between Strobe Activation and
Output T ransistion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1.0 ~s

Serial Data present at the input is transferred to the shift register
on the logic "0" to logic "1" transition of the CLOCK input pulse. On
succeeding CLOCK pulses, the registers shift data information towards
the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the
input prior to the rising edge of the .CLOCK input waveform.
Information present at any register is transferred to its respective
latch when the STROBE is high (serial-to-parallel conversion). The
latches will continue to accept new data as long as the STROBE is held
high. Applications where the latches are bypassed (STROBE tied high)
will require that the OUTPUT ENABLE input be high during serial data
entry.
When the OUTPUT ENABLE input is high, all of the output buffers
are disabled (OFF) without affecting the information stored in the
latches or shift register. With the OUTPUT ENABLE input low, the
outputs are controlled by the state of their respective latches.

3-211

TYPICAL APPLICATION
.12V

UCN5895A
DATA OUT

H - - - + FOR)8 SEGMENTS
PER DIGIT
CLOCK
DATA IN

~---".=J-;:]

~}-I----O OUTPUT ENABLE

~....,~

CAC T I VE LOW)

CLOCK
DATA IN

TO
OTHER
DIGITS

+ '2V

DATA OUT
STROBE
OUTPUT
ENABLE

Dwg.8-1541

TRUTH TABLE
Serial
Shift Register Contents
Data Clock
,. IN_, IN
Input Input I,
12 13

.

Serial
Strobe
Data
Output Input

Latch Contents
I,

12

13

...

IN_1

Output Contents
IN

Output
Enable

11

12

13

...

IN_1

IN

PN-,

PN

H

I

H

R1

R2

...

RN_2 R N_1

RN_,

L

I

L

R1

R2

.,.

RN_2 RN. 1

RN_,

RN_1 RN

RN

X

X

X

L

R,

R2

R3

...

RN_, RN

PN-,

PN

PN

H

P,

P 2 P3

...

PN-1 PN

L

P, P2 P3

...

X

X

...

X

H

L

... L

X

'1..

R,

R2

R3

...

X

X

X

...

P,

P2

P3

...

L = Low Logic Level

3-212

H = High Logic Level

X = Irrelevant

P = Present State

X

X

R = Previous State

L

L

L

FLUORESCENT DISPLAY DRIVERS
Consisting of six or eight NPN Darlington output stages and the
associated common-emitter input stages, these drivers are designed
to interface between low-level digital logic and vacuum fluorescent
displays. All devices are capable of driving the digits and/or segments
of these displays and are designed to permit all outputs to be activated
simultaneously. PUll-down resistors are incorporated into each output
and no external components are required for most fluorescent display
applications. The highest voltage parts (suffix A-1) are also used in
.gas-discharge display applications as anode (digit) drivers.

UDN6116A

Five standard devices are listed, so that a circuit designer may
select the optimum device for his application. Input characteristics,
number of drivers, package style, and output voltage are tabulated for
each device in the Device Type Number Designation chart. With any
device, the output load is activated when the input is pulled towards the
positive supply (active 'high'). All units operate over the temperature
range of -20°C to +85°C.
Dwg. No. A·9643A

FEATURES
•
•
•
•
•

Digit or Segment Drivers
Low Input Current
Integral Output Pull-Down Resistors
High Output Breakdown Voltage
Single or Split Supply Operation

ABSOLUTE MAXIMUM RATINGS
atTA

=+25°C

Supply Voltage, VBB
(suffix A or LW) ................ 85 V
(suffixA-1) ................... 115V
(suffix A-2) .................... 65 V
Input Voltage, VIN ••••.. , . . . • • • • • . • . 20 V
Output Current, lOUT .............. -40 rnA
Allowable Package Power Dissipation,
PD' .................... See Graph
Operating Temperature Range,
TA ••.•..••••••••.••• -20°C to +85°C
Storage Temperature Range,
Ts ................. -55°Cto+150°C
Caution: The high input impedance of these devices
makes them susceptible to static discharge damage
associated with handling and testing. Techniques
similar to those used for handling MOS devices
should be employed.

Always order by complete part number, e.g., ! UDN6118A-2! .
See matrix on third page. Note that all devices are not available in both
package types.
3-213

UDN6116A

UDN611 SA"
UDN611SA-I"
UDN611SA-2"

Dwg. No. A-9643A

UD

N

T1

6118

A -

UDN611SLW"

Dwg. No. A-9641A

Dwg. No. A-14,370

2.5

1

18-PIN DIP, RaJA = 55°CIW

T '""'''''''0"', ""CTI'D VCR"O' '"

16-PIN DIP, RaJA

TYPE NUMBER DESIGNATION, NEXT PAGE
PACKAGE: A = PLASTIC DIP
LW = PLASTIC SOIC
DEVICE TYPE.

!;:a.

' - - - - - - - - OPERATING TEMPERATURE RANGE.
N = ·20"C TO +85"C
Q = -40"C TO +85"C'
L -_ _ _ _ _ _ _ _ _

~

<
;:
:?:
z

FAMILY. UD = DIGITAL DRIVERS

= 60"CIW

18-LEAD SOle, RI}JA = BO"CIW

2.0

0

iii
rn
15

1.5

n:
w

;:
0

a.

w

1.0

Cl

<

"u

.

r,

"

~rm -V-

t;.

-.;
~
-.;

~

J~

---

-----

----

--

-

(L-

VBIAS

----

- ------

- ----- ~

,
,

- - - -

-----

-

-

- --

l~ I~

~ r4r----

il

0

---<0

r-- - -

('
V FIL
Dwg. No. A-l0,261B

3-217

HIGH-VOLTAGE, HIGH-CUHBENT
DARLINGTON AHHAY
Integrating seven high-voltage, high-current npn Darlingtons into
a monolithic power array, the ULN7003A is designed for interfacing
between TTL or CMOS logic and a variety of peripheral loads. The
seven open-collector Darlington outputs are specified for 150 V minimum breakdown and 90 V minimum sustaining. Included are integral
power diodes for switching inductive loads. Typical applications include
relays, lamps, print heads and hammers, solenoids, and level shifting to
power discretes.
The ULN7003A includes input current-limiting resistors compatible
with the drive capabilities of TTL and (most) CMOS operating at a
nominal logic supply of 5 V. Operation with 12 V CMOS may require
additional input current limiting.
The high sustaining voltage rating of this power array makes it ideal
for inductive load applications where Zener diode flyback techniques
are used. The increased flyback voltage provides a much faster
inductive load turn-OFF current decay that is especially useful with
dc stepper motors, solenoids, and print heads.
The ULN7003A is pinned with outputs opposite inputs to facilitate
ease of circuit board layout. It is supplied in a 16-pin plastic dual
in-line package with a copper lead frame to maximize device power
dissipation capabilities.
Dwg. No. A·9594

ABSOLUTE MAXIMUM RATINGS
at TA =+25°C

FEATURES
•
•
•
•
•

150 V Minimum Output Breakdown
90 V Minimum Sustaining Voltage
300 mA Output Current
Internal High-Current Clamp Diodes
Logic-Compatible Inputs

Output Voltage, VCEX ••••••••.•.••• 150 V
Output Sustaining Voltage,
VCE(sus) •.•••••••••••••••••• 90 V
Output Current, Ic .............. 300 rnA
Input Current, liN ................ 25 rnA
Package Power Dissipation,
Po ................... see Graph
Operating Temperature Range,
TA • . • • • • • • • • • • • • • • -20°C to +85°C
Storage Temperature Range,
Ts ............... -55°C to +150°C
Output current may be limited by duty cycle,
number of drivers operating, ambient temperature,
and heat sinking. Under any set of conditions, do
not exceed the specified maximum current rating
or a junction temperature of t SO°C.

3-218

Always order by complete part number: 1ULN7003A I.

7003
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAY

5

~

2.

z

2. 0

~
is

1. 5

PARTIAL SCHEMATIC
(ONE OF SEVEN DRIVERS)

o

'" , "'
~'e.VV,%-

iii

a:
w

~

~ 1. 0
CJ

;2

~

O. 5

w
-'

r--.r--<>COM

2.7K

:i

~

01


u

i2

~

2.0

0.5 t-~~W\~~'-'---+---"4r­

z
0
20

40

100

BO

60

PEn CENT DUTY CYCLE

0~~~--~--~~-7~--77--~--~~~.
2.0
2.5
3.0
3.5
~.O
~.5
5.0
5.5
6.0
INPUT VOLTAGE - VIN
Dwg. No. A-975GB

Dwg. GP-015

30 0

u

~

~

~
<

E

~

Ie
'"

~

0

..........

h:'"'r............'....

NUMBEAOFOUlPUT~

-

5 ..........

r--

CONDUCTING
SIMULTANEOUSLY

100

0

U

."
<
w

o

o

20

40

60

BO

100

PEn CENT DUTY CYCLE

Dwg. GP-OI5-1

3-221

APPLICATIONS
INFORMATION
POWER INTEGRATED CIRCUITS
FOR MOTOR~DHlVE APPLICATIONS
Improved systems performance and reliability, lower component
counts, and reduced cost are among benefits offered by space-saving
power interface ICs. Many of the following devices are specifically
designed for motor-drive applications. The development of these
devices is especially significant in view of the increasing use of
microprocessor-controlled servo and stepper motors.

UNIPOLAR STEPPER-MOTOR
TRANSLATO~RIVER
The UCN5804B integrated circuit drives permanent magnet
stepper motors rated to 1.25 A and 35 V with a minimum of external
components.
Internal step logic activates one or two of the four output sink
drivers to step the load from one position to the next. The logic is
activated when STEP INPUT (pin 11) is allowed to go HIGH. Singlephase (A-B-C-Or, two-phase (OA-AB-BC-CO), or half-step (A-AB-B-BCC-CO-O-OA) operation, and step-inhibit are selected by connections
at pins 9 and 10. The sequence of states is determined by the DIRECTION CONTROL (pin 14).

Drive Format
Two-Phase
One-Phase
Half-Step
Step-Inhibit

Pin 9

Pin 10

L
H

L

L

H

RECOMMENDED MAXIMUM OPERATING CONDITIONS
Output Voltage, VOUT' ............................... 35 V

L
H
H

Output Current, lOUT ............................... 1.25 A
Logic Supply Voltage, Vee' .................... 4.5 V to 5.5 V
Input Voltage, V IN

.•.•.•••••••.••••••.•••..••••••.•.

VB STEPPER-MOTOR DRIVE

5V

28V

DIRECTION
CONTROL

OR
'-------I<-,'---L.......r.

n.rtIU1
STEP INPUT

3-222

5.5 V

FULL-BRIDGE MOTOR DRIVERS
The UDN29538 and UDN2954W are designed for bidirectional,
chopped-mode current control of dc motors with peak start-up currents
as high as 3.5 A. The output-current limit is determined by the user's
selection of a sensing resistor. The pulse duration is set by an external
RC timing network. The chopped mode of operation is characterized by
low power-dissipation levels and maximum efficiency.
Internal circuit protection includes thermal shutdown with hysteresis, output transient-suppression diodes, and crossover current
protection.
The UDN29538 is supplied in a 16-pin DIP with heat-sink contact
tabs. The UDN2954W, with increased allowable package power
dissipation, is supplied in a 12-lead single in-line power tab package.
In both case styles, the heat sink is at ground potential and needs no
insulation.
RECOMMENDED MAXIMUM OPERATING CONDITIONS
Motor Supply Voltage, VBB

••.•••.•..•••.•••..••

7.5 V to 50 V

Continuous Output Current, lOUT ..................... ±2.0 A
Peak Output Current, lop ........................... ±3.5 A
Logic Supply Voltage, Vee .................... 4.5 V to 5.5 V
Input Voltage, VIN • . • . . . • • . • . . • . . • • . • • • . • • . . . . . . . • . . . 24 V

UDN2953B
+36V

+5V

PHASE
ENABLE
(ACTIVE LOW)

Dwg. No. A-12,649B

3-223

QUAD DARLINGTON SWITCHES
The UDN2878W and UDN2879W drive motor windings at up to 200
watts per channel. The integrated circuits include transient-suppression
diodes and input logic that is compatible with most TTL, LS TIL, and
5 V CMOS. The 12-pin single in-line power-tab package allows maximum power-handling capability.

RECOMMENDED MAXIMUM OPERATING CONDITIONS
Load Voltage, V cc (UDN2878W) ...................... 35 V
(UDN2879W) ...................... 50 V
Continuous Output Current, Ic ......................... 4 A
Peak Output Current, Icp ............................. 5 A
Logic Supply Voltage Range, Vs ............... 4.5 V to 7.0 V
Input Voltage, VIN ................................... Vs

STEPPER-MOTOR DRIVE
2-PHASE, UNIPOLAR INPUT
WAVEFORMS

UDN2878W

o

x

o

y

x X +5V

y

+28V
Dwg. No. A·ll,795

Dwg. No. A-11 ,975

3-224

DUAL FULL-BRIDGE MOTOR DRIVER
The UDN2993B motor driver contains two independent full-bridges
capable of operating with load currents of up to 600 mAo An internally
generated deadtime prevents potentially destructive crossover currents
when changing load phase. Internal transient-suppression diodes are
included for use with inductive loads. Emitter outputs allow for current
sensing in pulse-width modulated applications.

RECOMMENDED MAXIMUM OPERATING CONDITIONS
Load Voltage Range, VBB ••••••••••••••••••••• 10 V to 40 V
Output Current, lOUT ............................ ±500 rnA
Logic Voltage Range, V DO •••••••••••••••••••• 4.5 V to 5.5 V

2-PHASE BIPOLAR STEPPER-MOTOR DRIVE
(Pulse-Width Modulated)

+36V

+5V

+5V

Dwg. No. A-12,453

INPUT A

+5V

o

J

+5V~
INPUT B

0

1
..___-'

L
\
Dwg. No. A-12,4S4

3-225

LINEAR MOTOR DRIVERS
Power operational amplifiers are useful in driving voice-coil motors,
linear servo motors, and ac and dc motors in a linear mode where
motor speed or position is a direct function of a linear input signal. The
operational amplifiers listed here are standard "building block" circuits
providing almost unlimited application. The high-gain, high-impedance
operational amplifier configuration allows many specialized input,
output, and feedback arrangements.
All devices feature high output voltage swings, high input common
mode range, high PSRR and CMRR. The unity-gain stable versions
need no external compensation. Internal thermal shutdown circuitry
protects these devices against output overloads. The dual amplifiers
include programmable output current-sensing capability.

MAX.

CONT.

PEAK

PART NUMBER

TYPE

INs

lOUT

lop

ULN3751Z

Single

28V

±2.5A

3.5A

FEATURES

PACKAGE

Uhity-Gain Stable Internal Compensation

5-Lead SIP

POSITION SERVO
FROM J.lP CONTROL

~
R4

R6

+5V

0.1

J

':" I
I

0.001

I

-=
0.1::c
L __________

I
I
I

0.1 I

~_-1

MECHANICAL DRIVE/LINKAGE

R4 = R5 = R6 = R7
R1, R2 DEFINE D-C GAIN
R3, C1 SELECTED FOR LOOP COMP;
Dwg. No. A-12,6S2

3-226

TWO·PHASE, 60 Hz OSCILLATORIMOTOR DRIVER
505"2

505"2

25K

¢=90°

15"2
8.2K

~0.1

-=
0.33

I
Dwg. No. A-12,6S1

THREE.PHASE, 400 Hz OSCILLATORIMOTOR DRIVER

505"2

505"2

61.5K

8.2K

8.2K

IO. 1
~~----------------~I~--~
0.022

Dwg. No. A-12,650

3-227

BiMOS UNIPOLAR MOTOR DRIVERS

UNIPOLAR WAVE DRIVE
STROBE
IN 1

-Il
-II

n

f"L-

All devices contain CMOS data latches, CMOS control circuitry,
high-voltage, high-current bipolar Darlington outputs, and output
transient protection diodes for use with inductive loads.

n

IN 2

n

IN J
IN'
OUT 1

n

~

I

OUT 2

r---

OUT 3

OUT ..

Driving unipolar motors is one of many successful applications for
the UCN5800A and UCN5801 A SiMOS II latched sink drivers.

The UCN5800A is a direct replacement for the original UCN4401 A.
The UCN5801A replaces the UCN4801A. With a 5 V supply, SiMOS II
devices typically operate at data input rates above 5 MHz; at 12 V,
significantly higher speeds are obtainable.

L--

--.J

Device

Package

Drivers

Features

UCN5800A

14-pin DIP

4

Clear, Strobe, Output Enable

UCN5801A

22-pin DIP

8

Clear, Strobe, Output Enable

Dwg. No. A·11,446

UNIPOLAR 2-PHASE DRIVE

'--_--' '-__--'n

~

RECOMMENDED MAXIMUM OPERATING CONDITIONS

IN 1

Output Voltage, Vour ............................... 35 V

IN 2

Continuous Output Current,

IN J
IN<
OUT 1

.Jl----------'~
I

OUT 2

'--____----'r---

Logic Supply Voltage, VDD

lOUT' . . . • . . . . . . . . . . . . . . .
••••.•••.••••••••••.

350 rnA

4.5 V to 12 V

OUT J

UNIPOLAR STEPPER-MOTOR DRIVE
our

4

+30V

Dwg. No. A-11,447
OUTPUT ENABLE (ACTIVE LOW)
CLEAR

I

STROBE
IN ,

"P

~r=-I~
v•• ~v••
I"

'n-

J- ~
~t r""

IN 3
IN 4

'--

,b.

I

OUT'

~

IN 2

,I

t.

OUT2

)-~

OUT 3

~

OUT

41

I

+30V

Dwg. No. 8-1537

3-228

•

APPLICATIONS
INFORMATION
INTEGRATED CmCUITS FOR
CURRENT-SOURCING APPLICATIONS
FLOATING
LOGIC-GROUND LEVEL
(Sink Driver)

'V

'5V

Dwg. No. A-11,532

During recent years, the appearance of many new low-power
monolithic devices (LSI and microprocessors) has created an increased
need of peripheral power driver integrated circuits. Interface drivers are
typically categorized in terms of their output-drive functions. When
current flows out of the driver output terminal and into the load, the
device is said to "source" current. Conversely, current flows from a
load into a "sink" driver.
Integrated source drivers usually consist of high-voltage
PNP devices and high-power NPN Darlington outputs (which provide
PNP-type action), with input-level shifting. These power ICs are useful
for interfacing low-level logic (TTL, CMOS, NMOS, PMOS) and highcurrent or high-voltage relays, solenoids, lamps (incandescent, LED,
neon), motors, and displays (gas-discharge, LED, vacuum-fluorescent).
They can also be used to provide multi-channel buffers for discrete
power semiconductors.
The advantages of source drivers for display interface are quite
evident. The X-V addressing of most readouts requires both source
and sink functions to minimize pin count, interconnections, and
package count.
A more subtle advantage of source drivers is related to their use
with inductive loads or incandescent lamps. Both types of load generate troublesome transients and noise currents on common logic/load
ground lines. In addition, high ground currents can shift the ground rail,
affecting logic input levels, thresholds, and noise immunity. The use of
source drivers can minimize many of these concerns by separating the
logic and power returns.

SEPARATE GROUND RETURNS
(Source Driver)
+V

+5V

LOGIC

HIGH
CURRENT

r-'---t!
POWER
GROUND

Owg. No. A·11,531

3-229

RELAY-DRIVER APPLICATIONS
TELECOMMUNICATIONS
RELAY DRIVER
(Positive logic)

Series UDN2580A, eight-channel source drivers provide currenV
voltage translation from TTL, positive CMOS, or negative CMOS logic
to -48 V telecommunication relays requiring less than 350 mA All
devices have internal inductive-load transient-suppression diodes_
Type UDN2580A is best driven from negative-reference CMOS
or NMOS logic (-5 V or -12 V swing) in order to provide a -48 V swing
at the output The active-low input Type UDN2588A-1 can be driven
from positive logic TTL (+5 V swing) or CMOS (+ 12 V swing) levels_

RECOMMENDED MAX. OPERATING CONDITIONS
Supply Voltage, VEE __ .................. _...................... -50 V
Continuous Output Current, lOUT (per output) ..... _.............. -350 rnA

-48V
Dwg. No. A-11,S24

TELECOMMUNICATIONS
RELAY DRIVER
(Negative logic)

-48V

Dwg. No. A-11 ,538

3-230

PRINTER APPLICATIONS
Source drivers have been used extensively in electrosensitive,
thermal, and impact printer applications. Multi-channel devices in the
Series UDN2580A and UDN2980A reduce parts count and provide up
to 350 mA per output at voltages up to 75 V (resistive load). Copper
lead frames make these devices capable of simultaneously delivering
up to 125 mA continuously from all eight channels at an ambient
temperature of +50°C.

RECOMMENDED MAX. OPERATING CONDITIONS
Supply Voltage Range, V s
UDN2588A-1 .......................................... to 75 V
UDN2981 A and UDN2982A ............................ 5 V to 45 V
UDN2983A and UDN2984A ........................... 35 V to 75 V
Logic Voltage, V IN • • • • • . • . • . • • • . • . • • • • • . • • • • • • . • • • • . • • . • • • • • • • • 12 V
Continuous Output Current, lOUT (per output) .................... -350 rnA
Peak Output Current, lop ................................... - 500 rnA

THERMAL PRINTER APPLICATION

ELECTROSENSITIVE PRINTER
APPLICATION

UDN-2S88-1
UDN-2983/84A

IN4
INS
IN6
IN7

I N8 0--00--1

">.....----l-ff1}---YV'~

+SOV
-SOV

Dwg. No. A·11,530

Dwg. No. A-11 ,529

3-231

VACUUM-FLUOHESCENTIGAS-DISCHAHGE
DISPLAY APPLICATIONS
Series UDN6100A and UDN2580A source drivers provide solutions
to problems encountered in driving higher-voltage vacuum-fluorescent
and planar gas-discharge displays. Both series of parts provide TIL,
CMOS, and NMOS input-logic compatibility. Series UDN61 OOA devices
are active high (non-inverting) drivers. Series UDN2580A drivers are
active low (inverting) devices.
At minimum cost, UDN6118A-2 devices offer 60 V output breakdowns for vacuum-fluorescent displays typically utilizing less than 32
characters. Featuring a minimum 80 V output breakdown voltage,
standard UDN6118A drivers (no additional suffix) guarantee 25 rnA per
output. Suffix -1 devices provide for a 110 V breakdown, recommending
them for 40 to 80-digit or dot-matrix V-F applications or gas-discharge
anode-drive applications requiring the higher output voltage. All of these
drivers include internal pull-down resistors and provide operation from
single-ended positive supplies.
For vacuum-fluorescent display applications requiring a higher
current capability (operating several displays with common drive
circuitry), Type UDN2588A can be used with appropriate external
output pull-down resistors to provide up to 350 rnA per output.

MAXIMUM OPERATING VOLTAGES
V1N(ON)

V1N(OFF)

vee

VEE(MAX)

+5

<14

>4.5

0

-45

UDN2588A

-75

UDN2588A-1

-45

UDN2588A

-75

UDN2588A-1

+12

3-232

Device Type

Vs V BB

<8.4

>11.5

0

+60

TTL or CMOS

NA

0

UDN6118A-2

+80

TTL or CMOS

NA

0

UDN6118A

+110

TTL or CMOS

NA

0

UDN6118A-1

MULTIPLEXED VACUUM- FLUORESCENT DISPLAY DRIVERS
+36V

UDN6118A-2
..ri

,
dp

~
-d

~

"""
"
"
"
"

14i-

~~~

... ~

UDN6118A-2
"

..rI

-Ii

rd
.l..

"
"
"
"
"

..

"

---------

---

- -- - - ---- - ------

I~

- ---

--- ---- ---

r41
---

0

rly
--- o

(L----- Jl

VBIAS

V Fil

~

Dwg. No. A-11 ,522

UDN-2588A

Dwg. No. A-l1 ,526

3-233

ELECTRO-MECHANICAL
DISPLAY APPLICATIONS
Source drivers in the Series UDN2580A and UDN2980A, when
combined with the Type ULN2804A sink driver, provide a simple
interface between 12 V CMOS logic and a multiplexed electro-mechanical display. As shown, the need for additional inverter packages is
eliminated since Type UDN2580A is activated by a low input level and
Type UDN2982A is turned ON by a high input level. All drivers have
internal inductive-load transient-suppression diodes and copper lead
frames for improved package power dissipation capability.

RECOMMENDED MAX. OPERATING CONDITIONS
Supply Voltage, Vs ............................................ 35 V
Continuous Output Current, lOUT (per output) .................... -350 rnA

MULTIPLEXED ELECTRO-MECHANICAL DISPLAY DRIVERS
SEGMENT
SElECT

UDN-2982A

j
::i
j

~"1
~

;,...'-++~~~

~~
:::.~

TO
OTHER
SEGMENTS

v~

~t..;;:
12

---

"y...
dp ~~M+~rH------~r-~>~~~~IIr----­
..!!
y... ~
+12V
Vs

o--------d

J.

SINK DRIVER

UDN-2580A

~ K Y4- ~

"J ;:

Y4-

t

, K Y4- ~.
:::: .~ I

L--------{j.[}---1-1 h

";}

+12V~

"

K~"w

;;"..Lw--

v;

____ }
___
_
____
----

___ _

TO
OTHER
SEGMENTS

II ______ _

Lw-- ~
Dwg. No. 8-1476

3-234

LIGHT-EMITTING
DIODE APPLICATIONS
Series UDN2580A and Series UDN2980A 8-channel source drivers
provide monolithic solutions to problems associated with driving multiplexed
LED displays in common-cathode or common-anode configurations.
Type UDN2585A is a non-Darlington inverting (input low = output high)
source driver that is frequently used as a segment or dot driver in a common-cathode LED display where multiplexed segment or dot currents do
not exceed 120 mA. This device features input logic-level compatibility with
open-collector TTL, standard TTL, CMOS, and NMOS, as well as low
output saturation Voltages.
For common-cathode applications requiring higher segment currents, or
for common-anode digit drive applications, Series UDN2980A is recommended. This non-inverting (input high = output high) series features 350
mA per output continuous current ratings with peak currents reaching 500
mA per output. Outputs may be paralleled for higher current capability.
Type UDN2982A is logic-compatible with 2.4 V output levels of TTL and
CMOS. Similar high output current ratings, for use in inverting applications,
are offered by the Type UDN2580A driver.
Combining source drivers with mUlti-channel, high-current sink drivers
(such as Type ULN2068B or UDN2595A provides simple, compact, and
economical solutions to driving high-current multiplexed LED displays.

RECOMMENDED MAX. OPERATING CONDITIONS
Supply Voltage, V s

UDN2585A .................................................. 15 V
UDN2982A .................................................. 45 V
Continuous Output Current, lOUT (per output)
UDN2585A .............................................. -120 rnA
UDN2982A ............................................... -350 rnA
Input Voltage, V IN . • • . . • • . • • • • • . . • • • . . • . • . . . . • • • . . • • • . . • • • • . . • . • • • 15 V

COMMON-CATHODE LED DISPLAY

COMMON-CATHODE LEO 01 SPLAY
Dwg. No. 1473A

3-235

COMMON-CATHODE LED DISPLAY

COMMON-ANODE LED DISPLAY

TO OTHER
SEGW£NTS

,----...

UDN-2585A

UDN-2982A

;11/ // II 1/ II II

II

-5V

SINK DRIVER

UDN-2595A

TO
OTH£R
DIGITS

NC

Dwg. No. 8-1481

Dwg. No. 8-1480

NOTE: Source driver turn-off delay is influenced by load conditions. System applications well below the specified output loading may require timing
considerations for some designs, i.e., to prevent "ghosting" in multiplexed displays.

3-236

MULTI-CHANNEL INTERFACE
TO HIGH-POWER LOADS
Source drivers can be employed as multi-channel pre-drivers for
discrete high-current or high-voltage semiconductors, thus reducing
the need for many discrete components. For instance, a UDN2580A
8-channel source driver can provide up to 350 mA of pre-drive current
into the base of power NPN devices, making 5 A load currents readily
available. Higher load currents can be obtained by using power NPN
Darlington devices.
For a-c loads, it is possible to use a source driver to provide gate
current (with appropriate current-limiting) to a power seR or triac. This
scheme can provide an economical solution to many applications such
as driving incandescent lamps or a-c motors at up to 20 A.

DRIVER FOR HIGH-POWER DISCRETE DEVICES

r-----------.,
+5V

r------------,

_---011_----,

.....,..1

+5V +-r-_-_1>------.,

D-C
LOAD

"'"I

1

UDN-2585A

Dwg. No. A-l1,533

Dwg. No. A-11 ,534

3-237

nvCANDESCENTLAMP
DRIVER APPLICATIONS
Driving multiplexed incandescent lamps at voltages up to
75 V with peak currents approaching 500 mA per segment, Series
UDN2980A eight-channel source drivers, when combined with Type
ULN2069B sink drivers, provide for a very cost-effective approach.
Multiplexed lamps must typically be operated at a voltage {N (N = the
number of digits) times the nominal d-c voltage, to obtain sufficient
brightness. For example, a four-digit, 28 V display requires 56 V to
operate satisfactorily. In addition, care must be taken to select a proper
driver to withstand the substantial inrush currents created by cold
filaments. Peak currents of up to ten times the nominal operating
currents have been observed. Multiplexed lamps must also incorporate
diodes to prevent series/parallel paths to unaddressed elements.

RECOMMENDED MAX. OPERATING CONDITIONS
Supply Voltage Range, V s
UDN2981 A and UDN2982A ............................ 5 V to 45 V
UDN2983A and UDN2984A ........................... 35 V to 75 V
Continuous Output Current, lOUT (per output) .................... -350 rnA
Peak Output Current, lop ..................................... -500 rnA

MULTIPLEXED LAMP DRIVER, TTL- OR MOS-COMPATIBLE
SEGMENT SHEeT
UDN298JI84A

3-238

APPLICATIONS
INFORMATION
EXPANDING THE FRONTIERS OF
IC INTERFACE FOR ELECTRONIC DISPLAYS
INTRODUCTION
The original monolithic high-voltage/high-current power drivers
(Series UHP500) were capable of sustaining 100 V and sinking load
currents of 250 mA on each of four outputs. That 1970 peripheral driver
capability has since been expanded and improved on to solve many of
the most difficult display interfaces. Newer devices are rated for operation to 130 V, sourcing or sinking to 1.5 A, and as many as eight drivers
per package (not all together) with inputs for TIL, Schottky TIL, DTL,
CMOS, and PMOS.

LAMP (INCANDESCENT) INTERFACE

Dwg. A-9a69

Utilizing marketing inputs that related to existing hybrid interface
circuits, a group designed and manufactured monolithic ICs which
initially were largely used for aircraft indicator lamp interface. Although
not widely known, these quad driver units were developed quite independently (and simultaneously) to the ubiquitous TI 75451 series of
high-speed, low-voltage peripheral drivers. A concentration upon circuit
design factors, improvements in DIP packaging (copper alloy lead
frames), and tighter, tougher control of diffusion-related parameters
has allowed the manufacture of quad power drivers rather than the
dual mini-DIPs offered by TI.
An increased awareness for improvements in reliability and space
and power reductions provided a rather successful military market for
lamp and relay interface; early success was evident in military aircraft
indicator lamp interface, a tough application for TIL type ICs due to
severe inrush currents resulting in secondary breakdown during "turn
on". The increased current sinking capability of the peripheral power
driver ICs offers a solution to lamp interface that usually obviates the
need for "warming" resistors (across the output) which slightly warm the
lamp filament and thus minimize problems associated with cold lamp
filaments.
The high current-sinking capability of these ICs allow such loads
as the #327 or #387 lamps to be driven without difficulty of secondary
breakdown. The device beta will usually not allow sinking of the 10 to
13 times (nominal value) inrush current of cold lamps; but the lamp
rapidly reaches a current level within the device output limitations
(Figure 2 shows current as a function of time for a single #327 lamp).
Sustaining this instantaneous inrush current and its peak power has
been a key element in the success of many lamp interface circuits.

GAS DISCHARGE DISPLAY ICs

Dwg. A-98G6

FIGURE 1

Early in 1972, the first high-voltage IC designed for gas discharge
displays-a five channel, 130 V unit for cathode (segment) interface
was produced. Subsequently, other circuits, both cathode and anode
drivers, were produced; most of which were used in calculator applications with the Burroughs Panaplex® II.
Through a collaborative effort begun late in 1973 with Burroughs
Corp. a newer, more efficient interface scheme evolved. Featured in
"Electronic Displays '75," this series of monolithic IC interface devices
for the high-voltage gas discharge panels has been one of the trailblaz3-239

ers in the world of display interface ICs.
Intended for use in multiplexed display
systems, these ICs present one of the easiest
and least expensive solutions to a difficult
interface problem. A combination of highvoltage bipolar techniques with thin-film
resistor technology (circuit resistors sputtered
over the IC dielectric) has provided both digit
(anode) and segment (cathode) interface.
0.4 0

Many of the ICs used in high-current LED applications were originally designed for use with electro-mechanical loads (relays, solenoids,
motors, etc.) although the high-voltage ratings of the drivers are obviously not a concern. A combination of high-current, high-voltage
Darlington drivers is shown in Figure 3.

0.3 6
0.3 2

0.2 6
0.2 4
(J)

W

0.2 0

a::
~

O.tG

:;;
c::r

0.12

0.0 6

The efficiency of LED displays has improved, but with the larger
digits (up to 1" presently) most of the IC drivers are unable to switch the
higher currents required in multiplexed systems. The rule-of-thumb
generally applied uses the suggested dc current- multiplied by the
number of digits in the display. For example, a multiplexed display of
160 mA peak current will give approximately the same light intensity
output as a steady 20 mA in each of eight digits. Of particular difficulty
is the switching of currents associated with the lower efficiency yellow
and green LEOs. Completely monolithic integrated circuit solutions are
available for applications requiring segment currents (source drivers) of
350 mA and digit currents (sink drivers) of up to 4 amperes!

i

I

f- f-l

\

-......

0.0 4

o '-a

5

I

--

The ULN2061 M source driver is utilized as a modified emitterfollower. Through the use of discrete diodes in the common collector
line, allowing the base to be switched to a potential higher than the
collector, it is then possible to obtain a saturated output. This prevents
the usual emitter-follower problems associated with gain, the MOS

t--

. 10

-

-

15

-

20

25

30

35

40

45

Vss

50

MILLISECONDS
Dwg. A-10,289

FIGURE 2

To facilitate a minimum component
interface, a split supply (±1 00 V) is employed
to allow dc level-shifting (rather than capacitors or >200 V transistors) and both digit and
segment drivers incorporate all pull-up, pulldown, current limiting, off-bias reference, etc.
which were formerly required in discrete and/
or hybrid systems. With the combination of
the digit and segment drivers (each capable
of withstanding 120 V), the split power supply
approach affords PN diode IC technology
suitable for driving a display usually requiring
a 180 V minimum ionization voltage (equivalent to ±90 V in the split system).

I
I
UlN2061M

I
J

LED INTERFACE
With the obvious abundance and variety
of LED interface integrated circuits it would
seem unlikely that there are still systems in
search of an IC hardware solution to further
minimize cost, component count, space, etc.;
but this is definitely the case. The deficiencies
are chiefly related to the limited number of
current-sourcing circuits and/or high-current
drivers.
3-240

Dwg. A-9776B

FIGURE 3

,- - - - - - - r---r----.----------.---+----,
1
1/4 UDN-298IA

I

I

DIGIT
SElECT

I

1*
I

I

I

*

I

~'~~~=-~=---~~-+_--~---~--~-~

SEGMENT +I>N-t---i
SELECT

FIGURE 4
output impedance, and power. It is also
possible to now better define the voltage at
the emitter output and to then provide suitable
segment current-limiting resistors for the
LEOs.
An eight-channel source driver is shown
as a digit switch for common anode LEOs in
Figure 4. The Series UON2980A drivers will
handle output currenfs to a maximum of 500
mAo Two basic versions of the driver will allow
interface from TTL, Schottky TTL, OTL,
PMOS, and CMOS levels.
A common-cathode LED configuration is
shown in Figure 5 for currents of up to 1.5 A
per digit. A Series UON2980A source driver
is used to switch the segment side, the
ULN2064B to switch the digit side. As has
been shown with Figure 3, the IC package
power dissipation must be considered with
high-current applications.

The three examples that have been shown for LED interface
represent only a very-small portion of the total applications area. The
high-current capabilities and high gain of the drivers represent potential
solutions to many difficult LED display systems-alphanumeric, sevensegment, or matrix; common-cathode or common-anode; continuous or
multiplexed.

AC PLASMA DISPLAY INTERFACE
Plasma displays, such as those manufactured by National Electronics/NCR (USA) and NEC or Fujitsu (Japan), all have one common
element with their gas discharge cousin-both types use a neon gas
mixture. The plasma panels emit an orange glow when switched at
rather high frequencies, and light output intensity is a function of
frequency. The ac term for the plasma display is something of a
misnomer since these panels actually operate from a toggled dc
supply (usually in the area of 20 kHz).
The panel is basically a neon-filled capacitor, and has plates
(electrodes) which are covered with the dielectric-between which is
the neon mixture. Switching this capacitive load presents a problem
with high peak currents in addition to the older problem of the high
3-241

.v
1-- -

-- -

- r---.,...---r--------~r_-t_--_,

1
1/4 UDN-2981/82A

I

I

I

*
,,

DIGIT
SELECT

--------,

--------,

1

1
1

1
1

1

1

I

I
I

I

1

1- _ _ _ _ _ _

'-------1/4 ULN-20648

114 ULN-2064B

...!

Dwg.8·1363

FIGURE 5
voltages which are associated with gas displays. Drive circuits use supply voltages of 150 to 260 V (depending on unipolar or bipolar drive),
and the semiconductors used must switch instantaneous currents in
the order of several hundred milliamperes for the larger displays.
Several high-voltage, high-current arrays can provide an answer to
one side of the ac plasma display interface. The ULN7003A Darlington
power driver is rated at 150 V. It is able to handle the application shown
in Figure 6 (a basic dc, non-multiplexed clock interface rather than a
more complex multiplexed system).
The high-current diodes that are internal to the arrays are utilized in
the unipolar drive scheme connected to a suitable OFF reference. In
one POS application, a set of 14 ULN7003A Darlington drivers replace
more than 400 discrete components. The cost and space savings in
such a machine are considerable, and a very complex printed wiring
board was greatly simplified.
Further improvements in interface and plasma displays will no
doubt evolve, and thus benefit all concerned-display and interface
vendor along with the end user. Plasma displays are well-suited to
custom panels (particularly those with various sizes of characters) and
3-242

with improvements in Ie breakdown voltages
some further simplification of interface should
evolve.

FLUORESCENT
DISPLAY INTERFACE
Although the vast majority of fluorescent
displays are directly driven from MOS logic
(handheld and low-cost desk calculators),
there is an emerging need for interface
integrated circuits for use with the larger
characters (higher currents) and the higher
voltages coming into use. These blue-green
display panels originated in Japan, and the
manufacturers are quite aggressively pursuing markets such as POS systems, clocks,
cash registers, appliances, automotive
displays, etc. Larger and/or more complex
styles are being made, including displays
with alphanumeric capability (a starburst 14
or 16-segment pattern).

260 Vp at 20 kHz

-260 V

I I I I 1I 1

1111111
'00 K

.-----------t----r-"1-S2 V
1- - - - -

-

-

-

- - - --,

1- - - - -

- - -

- - - -I

SEGMEN I

I

SELECT

1

1

1

1

1

1

I

'- _ _ _ _ _ _ _ _

_J
'- _________ J

FIGURE 6

Modest voltage capability (60 or 70 volts) is all that is required of
a semiconductor device to drive these panels, and the currents are
in 20 to 30 mA region. These electrical requirements are well within
the capability of many gas discharge digit drivers.
The UDN6118A device is designed specifically for use with
fluorescent displays and includes internal pull-down resistors so that
up to eight segments and eight digits will require only two packages
and a greatly simplified power supply (Figure 7). The UDN6118A
driver is compatible with TTL, Schottky TTL, DTL, and 5 volt CMOS.
The future of fluorescent displays look rather strong, particularly
if competition further reduces prices. For the moment at least, these
displays will not seriously tax the capability of IC interface.

HOT WIRE READOUTS
Although hot wire readouts could easily be placed in the incandescent category, their application in multidigit, multiplexed display
systems more closely resembles LED circuit operation. Since hot
wire displays will conduct current in either direction, isolation diodes
are required to prevent sneak paths from partially turning ON unaddressed segments. Compare the typical hot wire display of Figure 8
with the LED display of Figure 4. The availability of a suitable,
inexpensive diode array would be of considerable asset in multiplexed hot wire systems.

The hot wire readouts are available in both
seven-segment and alphanumeric (16-segment)
versions and are quite well-suited to high
ambient light applications. They do not wash out
in sunlight, although their reliability diminishes
with the higher currents required in brightly
lighted applications. As described, multiplexed
schemes can be cumbersome because of the
great number of discrete diodes required.
One avionics system using a 16-character,
16-segment alphanumeric panel required
256 discrete diodes.

SUMMARY
The phenomenal growth in display technology has largely come as a result of the electronic calculator, and electronic displays will
pervade all our lives in an ever-increasing
number of products. The use of digital displays
in appliances, gasoline pumps, electronic games
(even pinball machines), etc., etc., will also
require that a continuing evolution on interface
integrated circuits meet the challenges of higher
brightness, increased currents, improved
reliability, and lower system costs.

3-243

SEGMENT SELECT
UDN611BA

-- .

i

V"

"
"

,
dp

~~~:==-

.

..Jl •

"

~

"

"r

',,!D--

--

"

."

."
"

T

- ----- -

DIGIT SELECT
UDN611BA

"

d[JJ

~ eM r

"

---

----

-----------

r---

0

---

(L- - - -- i l

VB1AS

V Fll

,,,!0-

-d

o

k-

Dwg. A-10,261B

FIGURE 7

,,- - - - - - - r---""T"""""---'--=-=--=--=-=-=-':=-=~=-=~=-=="";
I

1/.04UDN-2981A

I

DIGIT

SELECT

I

*

Dwg.8-1362

FIGURE 8
3-244

APPLICATIONS
INFORMATION
TRENDS IN IC INTERFACE
FOR ELECTRONIC DISPLAYS
Display technology was truly set into high gear by the explosion of
the electronic calculator business. Expansion at a phenomenal pace
continues, encompassing a multitude of products, particularly highvolume consumer products (calculators, clocks, games, and watches).
Recently, further stimulated by the "microprocessor revolution," with its
far-reaching effects, and the resulting changeover to solid state design
from electromechanical, mechanical, fluidic, or electrical systems, the
vistas for displays have expanded well beyond the horizon. Products
have been and are being developed, using microprocessors and
displays, that never previously existed.
To augment this microprocessor revolution, semiconductor
manufacturers are developing many new interface circuits useful with
displays, although some of these will,not be exclusively for display
systems, To accomplish this, the present boundaries of device design,
process, packaging, and electrical parameters will require continual
extension and expansion.

DISPLAV BUFFERS
A continuing evolution of standard interface ICs is needed to buffer
low-level logic from high-voltage and/or high-current loads. Some of this
buffer development will serve display systems. Since there already is
a broad assortment of buffers (particularly for low-to medium-current
LED applications), the ongoing development in simple or low-order
interface will mainly concentrate upon further reduction in discrete
component count, package improvement (particularly for high-current!
high-power devices), improvements in device current, voltage, switching speed, and greater reliability.
Figures 1, 2, and 3 show some interface ICs that represent buffer
circuits; other vendors supply similar, or identical, high-current or highvoltage buffers to allow operation of displays from low-level logic. Two
basic changes have occurred relatively recently:
1. Greater use of 18-pin DIPs for eight driver channels
(Source Driver, Figure 2).
2. Creation of sourcing functions (Figures 2 and 3; useful for LED,
gas-discharge, vacuum fluorescent, incandescent, and electromagnetic displays, depending upon device ratings). While further
buffer designs are needed (particularly in high-current (>2 A)
and high-voltage (> 100 V) circuits), the main emphasis will be
toward the incorporation of logic and control circuitry with output
buffers.

COMPLEX INTERFACE
Paralleling (though lagging) the microprocessor LSI revolution is
the area of greatest future for IC display circuits: The need for complex,
smart or high-order interface. This will be MSI to LSI logic (with perhaps
some linear functions) combined with suitable output buffers.

3-245

UDN6116A
GAS-DISCHARGE DRIVER

INPUT o-_N-....,.-r..

L--+_-o OUTPUT
125K

GNDo---~~~-~--------~

Dwg. A-9643A

Dwg. A-10,592C

FIGURE lA

FIGURE IB

SERIES UDN2980A
SOURCE DRIVER
v,

20 K

INPUT

3K
OUTPUT

Dwg. A-10,243

FIGURE2A

3-246

Dwg. A-1 Q,242A

FIGURE 2B

8-DIGIT/8-SEGMENT HIGH-CURRENT LED INTERFACE

+V

---1
---l
-l

---l

-=---FIGURE 3

3-247

UCN580lA
BiMOS LATCHIDRIVER

Dwg. A-10,49BA

FIGURE4A

Dwg. A-1 0,495A

FIGURE4B

Display interface ICs (similar to the MaS I/O control chips), both
custom and standard product, are becoming available in this category.
High-volume applications may justify custom ICs, but the more general
trend will be toward standard, off-the-shelf designs- chiefly due to the
high costs of developing custom ICs.
The higher voltage displays (gas-discharge, vacuum fluorescent,
ac plasma, and dc electroluminescent) may share some circuits
(if appropriately planned and designed), particularly in the area of
matrix displays. It is difficult to imagine, however, much commonality
between high-current LEOs, high-voltage gas-discharge or ac plasma,
and low-power LCDs, although they should share considerably the
development of cellullar CAD circuit designs. Sasic shift registers,
latches and decoders do have considerable commonality.
In Figure 4 is a pinout and logic diagram of a SiMaS device
combining logic and output drive. Although not expressly intended
for display applications, this SiMaS (CMOS logic and bipolar outputs)
IC has a great deal of utility to engineers working with lower voltages
and high currents (LEOs, incandescent and electromagnetic displays).
Type UCN5801A is a parallel-in/parallel-out unit composed of eight '0'
latches and eight 350 mA/50 V bipolar Darlington outputs.
More recently, serial-in/parallel-out SiMaS interface ICs have been
designed expressly for use with vacuum fluorescent displays. Figure 5
shows the UCN5810AF 1O-bit serial-in/parallel-out interface for use
with VF displays; the use of serial data allows 10 output lines, data in
and data out in a standard 18-lead DIP. It makes possible both fewer IC
packages and simpler PC board wiring, although it is slower than a
parallel data approach. It uses only a single pin of the I/O ports.
A slightly more recent design for vacuum fluorescent displays is the
UCN5815A. This is a 22-lead, 8-bit parallel-in/parallel-out SiMaS unit.
The unit may have data inputs and a strobe bus (see Figure 6). The
chip enable/blanking pin provides control of VF buffers. A power-onclear is internally incorporated.
3-248

UCN58 lOAF
VF DRIVEB BLOCK DIAGIlAM
OUT g
CLOCK
IN

CK

OUT 10
SERIAL
DATA OUT

OATA
IN

IN

10 BIT SERIAL IN PARAllEl OUT
SHIFT REGISTER

LOAD SUPPLY

CLOCK

•

SERIAL
DATA IN
LOGIC SUPPLY

•

•

BLANKING
OUT 1

STROBE

STROBE
IN

10 PARALLEL IN

Sf
PARALLEL OUT LATCHES

OUT2

•

•

•

•

•

•

•

•

•

•

•

•

BLANKING

Dwg. PP-029

FIGURE 5A

UCN5815A
PARALLEL S-BIT VF INTERFACE
INPUTS

STROBE

BLANKING

OUT 1

OUT 2

OUT 9

OUT 10

FIGURE 5B

FIGURE 6

3-249

DEVICE TECHNOLOGIES
With the exception of LCD displays
(which at least until recently have been
largely, if not entirely, driven by MOS) the
display and interface technologies in highvolume use are mainly associated with bipolar
semiconductors. Early display interface ICs
(particularly devices such as the 7447 and
7448) were aimed at LED technology and
represent MSI with modest output capability.
The increasing use of higher voltage displays,
multiplexed high-current applications, and the
need for greater circuit complexity and low pin
count will dictate other technologies, such as
12L, SiMOS, CMOS/DMOS, and possibly
DMOS.

STANDARD BIPOLAR
Standard bipolar technology, long associated with TTL or linears (early op amps),
appears very limited in scope for the future.
Circuit density and supply power requirements will dictate other processes for functions beyond the simple MSI level. The
advantages of standard bipolar ICs appear
to be in the areas of simple high-current,
high-power, or high-voltage interface. In particular, applications requiring the combination
of high voltages (~1 00 V) or multiple highcurrent outputs (~2 A) will restrict the logicl
control circuitry to a low level. Cost, chip size,
and package power dissipation will restrict
this circuitry largely to versatile, simple
buffers.

I2L
Anticipated to increase significantly is
the use of FL for systems of low-to-modest
voltages (LEDs through VF). The present
limits of FL appear to be limited to applications below the 50- to 60-volt level. FL, with
its combination of circuit density, low power
and reasonable switching speeds should
make a fine match for LEDs or other lowvoltage display applications. For higher
voltages (>25 or 30 V), prospects the penalty
of reduced circuit density may diminish its
cost effectiveness. Some increase in standoff
voltage may be afforded by the uses of cascaded output transistors or process improvements, thus reducing the need to sacrifice

3-250

logic density. Without a standard 12L logic family, the main market
penetration would appear to be custom designs although there is a
definite opportunity for standard interface for lower voltage applications,
particularly LEDs and vacuum fluorescent.

BiMOS
SiMOS, a combination of CMOS and bipolar for interface ICs,
seems to fit a technology niche of higher breakdown voltages than FL,
especially where logic power and supply voltage range (5 to 15 V) is
important. Other SiMOS or SiFET ICs which are presently on the
market, are largely related to operational amplifiers, although other
uses, such as the Series UCN5800 application of SiMOS to interface,
are emerging.
Currently, it is feasible to design and manufacture SiMOS interface
with breakdown voltages in the 80 to 100 V range. With additional time
and greater concentration on increasing breakdown voltage, it appears
that higher voltages (~150 V) for output buffers could be obtained.
Sy obtaining breakdowns in the 120 V to 160 V range, SiMOS then
becomes a viable IC technology for interface for the higher voltage
displays: dc gas-discharge with ±1 00 to ±130 V and glow transfer or dc
electroluminesc(:lnt (DCEL) opportunities with a range of 120-150 volts.
Switching speeds and output configurations (active pull-down or
resistive) are critical to matrix displays with large numbers of drive lines.
Adding active pull-down or pull-up will tend to increase chip size (and
cost), thus adding to the potential overall difficulty of SiMOS with its
greater process complexity and slightly longer manufacturing cycle.
This does appear to be a very key technology for the near future. Its
product niche will include applications requiring 60 to 100 V (or more)
breakdowns, low-power logic, wide supply range, modest speeds, and
MSI to small LSI.

CMOSIDMOS
CMOS/DMOS display interface appears to be intended for much of
the same display market as SiMOS. Product information now available
indicates 60 to 100 V breakdown (DMOS outputs), CMOS logic, low-tomodest output currents (::;25 mAl, and logic speeds to 4 MHz. Designs
now being promoted are targeted toward ac plasma and vacuum
fluorescent panels.
Two apparent disadvantages now appear to exist:
1. Logic operates from 12 V ±1 0% (may be done to provide
maximum speed).
2. Output drive current is insufficient for high-current displays
(without 100 mA, or more, the larger matrix panels will use
discretes or another technology).
These shortcomings may be modified with time, although it is
doubtful if 500 mA to 1A DMOS ouputs are practical.

APPLICATIONS
INFORMATION
3-PHASE BRUSHLESS DC
MOTOR CONTROLLER/DRIVER
Three-phase brushless dc motors are especially useful because
they have no brushes to make noise, dust, or wear out. The brushes of
a conventional motor have been replaced by position sensors, usually
Hall effect or optical devices. These sensors detect the rotor position
with respect to the stator windings .. This information is used to drive the
windings in a sequence synchronized with the rotor position, called
commutation. To use a three-phase brushless motor usually requires
custom les to perform the commutation, and discretes for drivers.
Then, to control the motor current, and with it speed and torque,
requires pulse width modulation circuitry. All this adds up to many
components and an expensive solution.

LINEAR
HALL
SENSOR
INPUTS

Now, due to progress in integrated power technology, all of the
functions needed to drive three phase brush less motors can be performed by one chip. The UDN2936W incorporates Hall effect sensor
decoding logic, power outputs capable of driving 2 A continuous at
45 V, PWM current limiting, direction control, dynamic braking, and
integrated protection features. This device can be used to provide a
simple, inexpensive, and reliable solution to the problem of driving
brushless dc motors.

OUTPUT
STATES

OVERALL CHIP STRUCTURE

Dwg. No. A-14, 146

FIGURE 1

The UDN2936W is made up of five sections, namely the commutation logic, output drivers, current limiting, direction and braking, and
thermal shutdown. All logic and power functions utilize only bipolar
processing, which allows for high power with an efficient use of die
area.

MOTOR COMMUTATION
In a three-phase motor, winding current must be synchronized to
rotor position to run the motor efficiently, i.e., with unidirectional torque.
Hall effect sensors detect rotor position, which must be decoded to
drive the coils in the proper sequence. Hall effect sensors produce low
level differential analog outputs. Today's Hall effect les amplify this
signal to make it easier to use. These Hall effect les produce either
large signal ac linear waveforms, or open collector digital signals. The
UDN2936W is compatible with both types of Hall effect les.

Vee

----------

:

~

I

I

I
I

I
I

I

I

I

VSENSE

:

: ILr

:

,

1

~RS

Position of the Hall effect sensors determines the decoding sequence to produce the correct driving waveforms for each motor. The
decoding sequence programmed into this device is based on Hall effect
cells 60 electrical degrees apart. This 60 degree sequence is one of the
most common used in the industry. The truth table and timing waveforms found in Figure 1 illustrate how the Hall cell inputs, driving output
waveforms, and motor currents states are interrelated. Motors with
other commutation sequences can typically be accommodated by
inverting one of the position inputs.

Dwg. No. A-14,147

FIGURE 2
3-251

CHOPPING

CURRENT CONTROL
The current limit technique chops the
source drivers to control the load current level.
The maximum current and percentage ripple,
or hysteresis, can be programmed by the user
or left to internal default values. Source
chopping produces a continuous sense
voltage (see Figure 2), so this voltage is an
accurate representation of load current, even
during recirculation. Also, chopping only the
sources produces a fast current charge-up
and a slower current decay. This occurs
because of the different voltages across the

coil in both states, and results. in a controllable current waveform. The
chopping method functions as follows: When the current reaches ITAIP '
the source is disabled and the current recirculates through a sink driver
and a clamp diode. The motor current decays a fixed percentage, the
source is enabled again, and the cycle repeats. The internal sense
voltage comparator has a limited bandwidth that essentially filters out
noise on the sense pin to prevent erroneous chopping.
The limiting current level and hysteresis are determined by the user
or left to internal defaults. Figure 3 illustrates these values in a typical
output current waveform. A voltage divider on the V AEF pin sets the
external V AEF • If set above 3 V, the internal VAEF is used. Whether V AEF
is set internally or externally, VA~/1 0 is the trip threshold on VSENSE. The
default trip can be programmed oy:
I TRIP

= 0.3 V
Rs

Ilim+----t~-htl~f7'.;:--7'"">::--,CURRE:NT

HYSTERESIS
(RiPPLE CURRENT)

Default hysteresis is set at 7.5%. For a V AEF <3 V, the trip threshold
is the following:

I TAIP = VAEF
10 Rs

Owg. No. A· 14, 148

FIGURE3A

ton

toft

--I

TRIP POINT

lOUT· VREF/tORS

In this case, hysteresis is created by drawing 200 IlA from the
resistor divider when the sources are chopped, lowering the trip
theshold a certain percentage. The sources turn back when the sense
voltage decays to the new lower threshold. Hystersis is given by this
expression:
%hys = 100 (200 IlA • RH)

Vp
The graphs in Figure 5 aid in selecting values for RH and RT"

Dwg. No. A-14, 149

FIGURE3B

The internal and external current limit settings can be used together
to start a motor with a high regulated current, and run it at a lower regulated current. To do this, VAEF must be tied above 3 V when the motor
starts, and the VAEF divider switched in after start-up (see Figure 6).

OUTPUTS

------------,

V. EF

I
I

:

!V

TlfS

The output section consists of three half-bridges capable of sourcing or sinking 2 A continuously at a saturation voltage of less than
2 V per driver. They are built to sustain at least 45 V. Source and sink
clamp diodes are included to provide a current path during commuation
and chopping. These are high-performance substrate isolated diodes
that virtually eliminate the wasteful parasitic substrate currents of
conventional diodes. The drivers, both source and sink, are bipolar
double level metal Darlingtons.

DIRECTION AND BRAKING

Dwg. No. A-14,1S0

FIGURE 4
3-252

The direction control allows the motor to be reversed even while
running. When direction changes polarity, the state of the outputs is
reversed, i.e., if the source was ON, the sink will turn ON, and vice
versa. Because the turn off times are longer than the turn on times, the
drivers turning ON must be delayed by a precise amount to prevent

potentially destructive crossover currents.
This delay is generated internally.
The brake function uses the back EMF of
the motor to brake it dynamically. The windings are effectively 'shorted' together through
sink drivers and clamp diodes.

25

THERMAL SHUTDOWN AND

I

I

VREF" 5V
RS" 0.111

I
I

5

POWER DISSIPATION

I
I

I

0\0",

"
I

I

./(;"'0;0," /

I

"0<>J;°~O\o/~

0

The thermal shutdown feature protects
the IC from overheating. This circuit turns
OFF all drivers at about 165°C, and allows
the device to cool down approximately 25°
before turning ON again.

.........
~~::: I-,........"?).~O\...,
. .0:;;1-"

5

o
o

~

0.5

1.5

1.0

.-- --------

~~
2.0

2.5

_

?ol~-::::-,,"

---~r-3.5

3.0

LOAD CURRENT, IMAX, IN AMPERES

The device is packaged in a 12-pin power
SIP that has a large copper tab for excellent
heat dissipation. The design of the tab, and
the fact that it is at ground, make the package
easy to use with a heat sink. The maximum
allowable power dissipation in 25°C ambient
air without a heat sink is 5.2 W. With minimal
heat sinking, dissipation greater than 10 W
can be accomplished.

Dwg. No. A-14,151

25

20
VREF= 5V

APPLICATION
The application shown in Figure 7 is
a simple one illustrating the use of the
UDN2936W in an open-loop situation with
bilevel current limiting. The motor uses
digital open-collector Hall cells such as the
UGN3113U or linear Hall effect ICs such as
the UGN3503U. These Hall effect sensors
have a quiescent output voltage of 2.5 V, and
emitter follower outputs. The UDN2936W has
a regulated internal 2.5 V reference designed
to make the inputs compatible with those
linear Hall effect sensors. The 5 V supply
is also used as a reference in the current
limiting for the VREF resistor divider. Choosing
Rs = 0.15 ohms results in internal default trip
current of 2 A, and 7.5% ripple. This internal
limiting is active when 01 is OFF. R1 and R2
form a resistor divider, when 01 is ON, to
apply 1 V to the VREF input, producing 0.67 A
of regulated running current and 5% ripple.
Typically, 01 would be OFF during start-up,
giving 2 A of regulated start-up current, and
then turned ON to provide 0.67 A of running
current. The values of R R2 , and VSENSE can
"
be calculated using the circuit and equations
of Figure 5, or the tables of Figure 6.

I

20

<.1

15

0:

10

,..../'
o

o

/
20

I

/
40

/
60

/

80

100

HYSTERESIS, H, IN PERCENT
Dwg. No. A-14,1S2

FIGURE 5

ISTART UP

= 3 V/1 0 Rs +--r.---n---"'c-,,,<-,,,,-7\-

IRUNNING

= VRE I10 Rs

Dwg. No. A-14,153

FIGURE 6

3-253

The motor speed is controlled by the current limiting. For a given
load, speed is proportional to torque, and torque is proportional to motor
current. Subsequently, the motor speed can be controlled through VREF •

CONCLUSION
Smart power integrated circuits have come a long way in the
past few years in solving numerous motor driving problems. The
UDN2936W is one example of how integrated monolithic devices can
replace a drive circuit of many components with one reliable component. Also evident is the fact that bipolar transistors continue to provide
economic solutions in the high current application.

o

o
SV

RS =

0.1S0

I-'-'+---~U Vee

FIGURE 7
3-254

Dwg. EP-033

APPLICATIONS
INFORMATION
DiMOS n

SERIES 5800
POWER DHlVERS

INTRODUCTION

INCANDESCENT LAMP DRIVERS

The second generation of merged CMOS/
bipolar integrated circuits extends the lead in
innovative interface forged by the original
SiMOS power drivers.

Each of the UCN5800A or UCN5801A open-collector Darlington
outputs will sink up to 500 mA and will sustain at least 50 V in the OFF
state. The high peak current rating of these devices allows their use
with the high inrush (10 x) currents normally associated with incandescent lamps. Package power limitations normally disallow simultaneous
and continuous operation of all outputs at the rated maximun current:
Either a reduction in output current or a suitable combination of duty
cycle and number of active outputs is usually required.

Higher-density CMOS logic gives SiMOS
II integrated circuits improved switching
speeds at reduced costs. With a 5 V supply,
second generation SiMOS typically operates
at data input rates above 5 MHz; at 12 V,
significantly higher speeds are obtainable.
The SiMOS II series also offers new and
improved functions.
Reliable, single-chip SiMOS II solutions
are available for a wide variety of peripheral
and power interface problems. Two or more
devices are no longer required to interface
low-level (TTL, CMOS, NMOS, PMOS) LSI or
microprocessor functions with power loads
such as LEDs, gas-discharge or vacuumfluorescent displays, relays, solenoids,
thermal printers, motors, impact printer
hammers, and incandescent lamps. Since all
SiMOS devices include logic and control in
addition to power functions, they also free the
microprocessor from many housekeeping
tasks.

The UCN5800A is supplied in a standard 14-lead DIP. The
UCN5801A is furnished in a 22-lead DIP with 0.400" row spacing.

RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage ........................................... 45 V
Logic Supply Voltage Range .......................... 5.0 V to 12 V
Continuous Output Current ............................... 350 rnA

OUTPUT ENABLE (ACTIVE LOW)

+28V

C;LEAR

NO. 327

I------':-L----.. LAMPS

IN.

Owg. No. A·12.550

3-255

PLANAR GAS-DISCHARGE DISPLAY DRIVERS
Combining the high-voltage UCN5810AF-1, UCN5812AF-1 or
UCN5818AF-1 serial-input, latched source driver with the UCN5823A
serial-input, latched sink driver provides a simple way to drive multiplexed high-voltage planar gas-discharge displays.
RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage
UCN581OAF-1, UCN5812AF-1, UCN5818AF-1 .............. 75V
UCN5823A ........................................... 95 V
Logic Supply Voltage Range .......................... 5.0 V to 12 V
Continuous Output Current
UCN5810AF-1, UCN5812AF-1, UCN5818AF-1 ............ -25 rnA
UCN5823A ........................................ 350 rnA

UCN5810AF·l
ANODE
DRIVER

"0'".

~~---+-----HJ

v
.-li§}---+-~SERIAL DATA OUT

'5V

.~

~

SERIAL

DATA IN
BLANKING

.5V

UCN-5623A
CATHODE
DRIVER
CLOCK
SERIAL DATA IN <>-+-8:l"

SERIAL DATA OUT
STROBE
ENABLE

Dwg. C-1275

3-256

VACUUM-FLUORESCENT DISPLAY DRIVERS
The UCN5815A 8-bit, latched, source driver provides a practical
means of driving the segments, dots (matrix panel), or bars of multiplexed high-voltage vacuum-fluorescent displays. The UCN5810AF
(10-bit), UCN5812AF (20-bit), or UCN5818AF (32-bit) serial-input
latched source drivers are well-suited for use as character or digit
drivers. The high-voltage versions (suffix-1) can also be used to drive
the anodes of planar gas-discharge displays.

RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage
UCN5810AF, UCN5812AF, UCN5818AF ...•...•..... " ...• 55 V
UCN5810AF-1, UCN5812AF-1, UCN5818AF-1 .........•.... 75 V
Logic Supply Voltage Range .......................•.. 5.0 V to 12 V
Continuous Output Current ....•........................... -25 mA

PARALLEL DATA IN

TROBE~----~+1~~~~~--------------~+-~-r~~-'

NABLE

~----~+1~~~~-r--T-"------------~+-~-r-r-~-t'1

~

UCN-5815A
SEGMENT
DRIVERS

VACUUM·FLUORESCENT
DISPLAY DRIVERS

~

Q
I I I ;AT;HE,' I

==

~~7n'<7n'\7

J
BLANKING

o----++H+_t_H-++~-----------t++_ir_t+_t_H_+-'

.50VO-

L...o.5V

.50vo-

'-<>.5 V

._·UcII
N-58.'2,u- &
CHARACTER DRIVER

'5~

IV..

DA~!R~~~ ~-++_t_H-+++_t_----m-~:=J

v" ~v

c:=---I!'!}-------jH_+++-H-+++--< 6~~~AI~

J.<

L-----m®-'---------'
BLANKING

o----------------------!Ill1 6E

S T i I D - - - - - - - - - - - - - - - - - - - - - - o STROBE

____._r---------------------

OJ

,ACTIVE LOW
f-

:0

o

>
CLOCK

~--"'''--':;;;J

DATA IN

~--.."-'

STROB E

~--"'.:!...r--";""":.:.::;:.J

<0

+

Dwg.8·1541

3-258

MULTIPLEXED LED DRIVERS
Latched source drivers are simple, compact, and economical
segment drivers for multiplexed LED and incandescent and lamp
applications. The UCN5895A features saturated outputs for minimum
voltage drop. It sources a minimum of 120 mA per driver. The source
driver is supplied in an economical 16-pin 'A' package.
A typical common-cathode LED display driver application is shown
below. The high-current UCN5821A, a latched sink driver, is used to
drive the digits. Common-anode LED displays would require the use of
the UCN5891 A source driver and UCN5821 A sink driver.
In order to obtain sufficient brightness, multplexed LED displays
must typically be operated at greatly increased current. Appropriate
current limiting is required.

RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage
UCN5821A ........................................... 45 V
UCN5890A ........................................... 75 V
UCN5891 A ........................................... 45 V
UCN5895A ........................................... 45 V
. Logic Supply Voltage Range .......................... 5.0 V to 12 V
Continuous Output Current
UCN5821 A ........................................ 350 rnA
UCN5890A ....................................... -350 rnA
UCN5B91 A ....................................... -350 rnA
UCN5B95A ....................................... ·120 rnA

.. 12V

UCN·5S95A

{J~~~~~hl-l-_-+DATA
FOR )8OUT
SEGMENTS
PER DIGIT

0+--22

"

~Vss

I~<}

l .........

>30 v

•••••••••

'

JJ

10 ~'--C..J
~

c

~ ~ :~~:KOUT

OE~

t-D-iW--------,

fi>"

UCN-5832A

"

••••••••

~

Dwg.No.O·1113

3-260

RELAY AND SOLENOID DRIVERS
BiMOS II drivers provide an interface flexibility beyond the reach of
standard logic buffers and power-driver arrays. Drivers with internal,
transient-suppression diodes are ideal for use with relay and solenoid
loads.
Series UCN5840A sink drivers feature isolated logic and power
grounds that allow split-supply operation or isolated grounds for reduction of transients and noise currents on common logic/load ground
lines. The UCN5890A source driver requires load supply voltages
of at least 20 V. For lower-voltage operation, the UCN5891 A is
recommended.
The serial DATA OUTPUT allows cascading for interface applications requiring additional drive lines. The OUTPUT ENABLE can also
provide a CHIP ENABLE function that uses a minimum number of drive
lines to control output from several packages in a simple multiplex
scheme.

RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltages (Inductive Load)
UCN5841A ........................................... 35 V
UCN5842A ........................................... 50 V
UCN5843A ........................................... 60 V
UCN5890A ........................................... 50 V
UCN5891 A ........................................... 35 V
Logic Supply Voltage Range ......................... 5.0 V to 12 V
Continuous Output Current ............................... 350 mA

+5V
+5V -15V

+48V

+36V

UCN-5S90A

~~"'''''~~n-+-+-'> DATA OUT
CLOCK
DATA IN

DATA OUT
STROBE

0--+--[;0
o---t---Lu--'

I---I-OOUTPUT ENABLE
(ACTIVE LOW)

~---U'-h

o-----iJ'J

~~zm 0-----\Ju
(ACTIVE LOW)

Dwg. No. A-12,547

Dwg. No. A-12,S4B

3-261

MULTI-CHANNEL INTERFACE
TO HIGH-POWER LOADS
SiMOS II power drivers can also be used as multi-channel predrivers for discrete high-current semiconductors, reducing the need
for many discrete components. SiMOS II sink drivers provide enough
switching current to the bases of discrete PNP power transistors for
load currents of up to 20 A. Higher load currents can be obtained by
using power Darlington devices. SiMOS II source drivers may require
discrete Darlington power drivers for significant load currents, but have
the advantage of allowing rather wide load-voltage swings.
For ac loads, source drivers can be used to provide gate current
(with appropriate current limiting) to a power SCR or triac. This
scheme can provide an economical approach to many applications
such as driving incandescent lamps or ac motors with current levels
of up to 20 A.

+Vs

-------,
I

I

PNP
POWER

I
I

I
I
I
I

SINK
DRIVER

D-C
LOAD

I

I
______ -lI

-Vs
Dwg. No. A-11,744A

+Vs

Vss

-------,
I

SOURCE
DRIVER

D-C
LOAD

:
I
I
I
I

I
I
100 K
I
_-l

NPN
DARLINGTON

Dwg. NO.A-11,745A

3-262

HALL-EFFECT SENSOR ICs

SECTION 4. TECHNICAL DATA & APPLICATION NOTES
for Hall-Effect Sensor ICs
in Numerical Order .................................................................................. Beginning at 4-1
Applications Information:
Hall Effect Applications Guide ......................................................................... 4-74
The Hall Effect Sensor .................................................................................. 4-108

3046, 3056,
3058

AND

HALL-EFFECT GEAR-TOOTH
SENSORS-ZERO SPEED
The A3046EU/LU, A3056EU/LU, and A3058EU/LU Hall-effect
gear-tooth sensors are monolithic integrated circuits that switch in
response to differential magnetic fields created by ferrous targets.
These devices are ideal for use in gear-tooth-based speed, position,
and timing applications and operate down to zero rpm over a wide
range of air gaps and temperatures. When combined with a backbiasing magnet and proper assembly techniques, devices can be
configured to give 50% duty cycle or to switch on either leading,
trailing, or both edges of a passing gear tooth or slot.

1

~

2

3

o

I-

z

0...
0...

:::>

(j)



The six devices differ only in their magnetic switching values and
operating temperature ranges. The low hysteresis of the A3046/56EU
and A3046/56LU makes them perfectly suited for ABS (anti-lock brake
system) or speed sensing applications where maintaining large air gaps
is important. The A3046EU/LU features improved switch point stability
with temperature over the A3056EU/LU. The high hysteresis of the
A3058EU and A3058LU, with their excellent temperature stability,
makes them especially suited to ignition timing applications where
switch-point accuracy (and latching requirements) is extremely
important.

oa:

:::>
0...

I-

:::>

o

Dwg. No. PH·012

Pinning is shown viewed from branded side.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vec ............... 28 V
Reverse Battery Voltage,

All devices, when used with a back-biasing magnet, can be configured to turn ON or OFF with the leading or trailing edge of a gear tooth
or slot. Changes in fields on the magnet face caused by a moving
Continued next page ...

BENEFITS
•
•
•
•
•
•
•
•
•
•

Senses Ferrous Targets Down to Zero RPM
Defined Power-Up State (3058 only) Available Mid-1993
Large Effective Air Gap
Wide Operating Temperature Range
Operation from Unregulated Supply
High-Speed Operation
Output Compatible With All Logic Families
Reverse Battery Protection
Solid-State Reliability ... No Moving Parts
Resistant to Physical Stress

VRCC . . • . • . . . . . . . . . . . . . . . . . . -30 V

Magnetic Flux Density, B ....... Unlimited
Output OFF Voltage, V OUT' . . . . . . . .. 28 V
Reverse Output Voltage, VOUT' . . . .. -0.5 V
Output Current, lOUT' . . . . . . . . . . .. 25 mA
Package Power Dissipation, PD' .. 500 mW
Operating Temperature Range, TA
Suffix "EU" . . . . . . . . .. -40°C to +85°C
Suffix "LU" ........ , -40°C to +150°C
Storage Temperature Range,
Ts . . . . . . . . . . . . . . .. -65°C to +170°C

SELECTION GUIDE
Switching Hysteresis, Bop-B RP
15-90 G
Operating Temp. Range

150-250 G

Device Type Number

-40°C

to +85°C

A3046EU
A3056EU

A3058EU

-40°C

to +150°C

A3046LU
A3056LU

A3058LU

4-1

ferrous mass are sensed by two integrated
Hall transducers and are differentially amplified by on-chip electronics. The on-chip
temperature compensation and Schmitt
trigger circuitry minimizes shifts in effective
working air gaps and switch points over
temperature making these devices ideal
for use in ignition timing, anti-lock braking
systems, and speed measurement systems
in hostile automotive and industrial environments.

FUNCTIONAL BLOCK DIAGRAM

-*
~

SUPPLY

OUTPUT

Each Hall-effect digital Integrated circuit
includes two quadratic Hall effect sensing
elements, a voltage regulator, temperature
compensating circuitry, low-level amplifier,
Schmitt trigger, and an open-collector output
driver. The on-board regulator permits
operation with supply voltages of 4.5 to 24
volts. The output stage can switch up to 20
mA at conservatively specified repetition rates
to 20 kHz and is compatible with bipolar and
MOS logic circuits.
Both magnetic characteristics are available in a choice of two operating temperature
ranges. Suffix EU devices have an operating

Dwg. No. FH-010

range of -40°C to +85°C while suffix LU devices feature an operating
range of -40°C to + 150°C. All devices are packaged in a 3-pin plastic
SIP.

ELECTRICAL CHARACTERISTICS at Vee = 8 V, over operating temperature range.
Limits
Characteristic

Symbol

Supply Voltage

Vee

Output Saturation Voltage

Min.

Operating

4.5

-

24

V

lOUT = 20 rnA, B > Bop

-

135

400

mV

-

5.0

(lA

Max.

Units

Vee =24 V, B< BRP

7.2

14

rnA

t,

RL = 820 n, CL = 20 pF

-

100

-

ns

tf

RL = 820 n, CL = 20 pF

-

100

-

ns

IOFF

Vee = VOUT = 24 V. B < BRP

Supply Current

Icc

Output Fall time

Typ.

-

Output Leakage Current

Output Rise time

4-2

VOUT(SAT)

Test Conditions

MAGNETIC CHARACTERISTICS in gauss at Vee = S V.
Part Numbers'

3046
Characteristic

Test Conditions

Operate Point, Bop

Output Switches OFF to ON,

3056

3058

Min.

Typ.

Max.

Min.

Typ.

Max.

Min.

--

--

150

--

--

150

--

--

250

-150

--

--

-150

--

--

-250

--

--

Typ. Max.

TA = +25°C
Release Point, BRP

Output Switches ON to OFF,
TA = +25°C

Hysteresis, Bhys

Bop-B RP ' TA = +25°C

15

50

90

15

50

90

150

200

250

Change in Trip Point,

Over operating temperature range,

--

--

±50

--

--

±75

--

--

±50

tiBop or tiB RP

Ref. Bop or BRP at TA = +25°C

NOTES: Magnetic switch points are specified as the difference in magnetic fields at the two Hall elements.
As used here, negative flux densities are defined as less than zero (algebraic convention).
Typical values are at TA = +25°C .
• Complete part number includes the prefix 'A' and a suffix to identify operating temperature range and package style. (see selection guide).

TYPICAL OPERATING CHARACTERISTICS
200

~
'OU'i20 mA

180

.,'E
w

C>

~
0

160

--

>

z 140

0

~

a:

S

120

~

V

V

./

100
·50

50

150

100

AMBIENT TEMPERATURE IN ~c
Dwg. No. GH·033

10

~
8:>Bop

11.-------,---,---,-------,-------,

10r-~~~+---+---+-------1-------1

-

B Bo and
switches the output OFF (output HIGI=/) when
BE1 - BE< < BRp · The difference between Bop
and BRP IS the hysteresis of the device.
Figure 3 relates the output state of a
back-biased sensor IC, with switching characteristics shown in Figure 2, to the target gear
profile and position. Assume a north pole
back-bias configuration (equivalent to south
pole at the face of the device). The motion of
the gear produces a phase-shifted field at E1
and E2 (Figure 3 (a)); internal conditioning
circuitry subtracts the field at the two elements (Figure 3 (b)); and the Schmitt trigger
at the output of the conditioning circuitry
switches at the pre-determined thresholds
(Bop and BRP ). As shown (Figure 3 (c)), the
IC output is LOW whenever sensor E1 sees
a (ferrous) gear tooth and sensor E2 faces
air. The output is HIGH when sensor E1 sees
air and sensor E2 sees the ferrous target.
A gear-tooth sensor can be configured
(see ASSEMBLY TECHNIQUES) to operate as a
latch, a (positive) switch, or a negative switch.
Note the change in duty cycle in each of the
cases (Figure 4).
A latch is a device where the operate
paint is greater than zero gauss and the
release point is less than zero gauss. With
the configuration shown in Figure 3, such a
device will switch ON on the leading edge and
OFF on the trailing edge of the target tooth.
A (positive) switch is a device where
both the operate and release points are
greater than zero gauss (positive values).
In the configuration shown in Figure 3, such a
device will switch ON and then switch OFF on
the leading or rising edge of the target tooth
(Figure 4 (a)).

LEADING
EDGE

TRAILING
EDGE

DIRECTION
OF ROTATION

4300G

8

&

E1

8

E2

4130G
150G
BOp" +25 G

\

8 -8
E1

E2

-150 G

VOUT(SAT)

OUTPUT DUlY CYCLE", 50%

Dwg. No.wH-003

Figure 3
GEAR-TOOTH SENSOR OPERATION

A negative switch is a device where both the operate and release
points are less than zero gauss (negative values). In the configuration
shown in Figure 3, such a device will switch OFF and then switch ON
on the trailing or falling edge of the target tooth (Figure 4 (b)).
Speed sensors can use any of the three sensor configurations
described. Timing sensors, however, must use a latch to guarantee
dual-edge detection. Latches are most easily made using the A3058EU
or A3058LU device types.

4-5

SYSTEM ISSUES
150G

Optimal performance of a gear-tooth
sensing system strongly depends on four
factors: the IC magnetic parameters, the
magnet, the pole piece configuration, and
the target.

BOp= +100 G

B RP = +50 G

(a)

Sensor Specifications. Shown in Figure 5
are graphs of the differential field as a function of air gap. A 48-tooth, 2.5" (63.5 mm)
diameter, uniform wheel similar to that used
in ABS applications is used. The samarium
cobalt magnet is 0.32" diameter by 0.20" long
(8.13 x 5.08 mm). The maximum functioning
air gap with this typical gear/magnet combination can be determined using the graphs and
the specifications for the sensor IC.
In this case, if an A3056EU/LU sensor
with a Bo of +25 G and a BRP of -25 G
is used, the maximum allowable air gap
would be 0.110" (2.79 mm). If the switch
points change +75 G with temperature
(Bop = + 100 G, BRP = +50 G), the maximum
air gap will be approximately 0.077" (1.96 mm).
All system issues should be translated
back to such a profile to aid the prediction of
system performance.
Magnet Selection. These devices can be
used with a wide variety of commercially
available permanent magnets. The selection
of the magnet depends on the operational
and environmental requirements of the
sensing system. For systems that require
high accuracy and large working airgaps or
an extended temperature range, the usual
magnet material of choice is rare earth
samarium cobalt (SmCo). This magnet
material has a high energy product and can
operate over an extended temperature range.
For systems that require low-cost solutions
for an extended temperature range, Alnico-8
can be used. Due to its relatively low energy
product, smaller operational airgaps can be
expected. At this time, neodymium iron boron
(NeFeB) is not a proven high-temperature
performer; at temperatures above + 150°C
it may irreversibly lose magnetic strength.

4-6

-"\----t-~r---__t_--'lr---....,...

--+---/t--\----It---\---tt--_\_

·150 G

VOUT{SAn

OUTPUT DUTY CYCLE = 65%

150G

BOp= -50 G

B AP =-l00G

(b)

-150G

--I-"

V QUT(SAT)

OUTPUT DUTY CYCLE", 33%

Dwg. No. WH·004

Figure 4
POSITIVE AND NEGATIVE SWITCH OPERATION

Of these three magnet materials, Alnico-8 is the least expensive by
volume and SmCo is the most expensive.
Either cylindrical- or cube-shaped magnets can be used, as long
as the magnet pole face at least equals the facing surface(s) of the IC
package and the pole piece. Choose the length of the magnet to obtain
a high length-to-width ratiO, up to 0.75:1 for rare earths, or 1.5:1 for
Alnico-8. Any added magnet length may incrementally improve the
allowable maximum air gap.
Magnets, in general, have a non-uniform magnetic surface profile.
The flux across the face of a magnet can vary by as much as 5% of the
average field over a 0.10" (2.5 mm) region. If a Hall sensor is placed
directly on a magnet face, the non-uniformity can appear to shift the
operating parameters of the sensor. For example, if a device is placed
on a 3000 G magnet with ±2% face offsets, each of the operating points
might be shifted by ±60 G. When offsets are present, the operating
characteristics may be greatly altered.

2000
150 0

\

1000

Pole Piece Design. A pole piece may be used at the face of the
magnet to smooth out the magnet-face offsets. A 0.020" (0.51 mm)
thick, soft-iron pole piece will bring the field non-uniformity down to
the ±1%-to-±3% range. Note that pole pieces will minimize but not
eliminate the non-uniformity in the magnet face field. Front pole pieces
will almost always result in a reduced maximum air gap.

\

I' .......

500

t-...

0

./

-50 0
-100 0
-150 0

-200 0

/

J

Ferrous Targets. The best ferrous targets are made of cold-rolled
low-carbon steel. Sintered-metal targets are also usable, but care must
be taken to ensure uniform material composition and density.

i-"""

V

0.025

0.050

0.075

0.100

0.125

AIRGAP FROM PACKAGE FACE IN INCHES

Dwg. No. GH-035

200

Or--...

15

100
0

I'--

-

0

-50

°v

-10

~--

-150

-200
0.070

0.080

0.090

0.100

0.110

0.120

AIRGAP FROM PACKAGE FACE IN INCHES

Dwg. No. GH-036

Figure 5
DIFFERENTIAL FLUX DENSITY

The teeth or slots of the target should be cut with a slight angle
so as to minimize the abruptness of transition from metal to air as the
target passes by the sensor. Sharp transitions will result in magnetic
overshoots that can result in false triggering.
Gear teeth larger than 0.10" (2.54 mm) wide and at least 0.10"
(2.54 mm) deep provide reasonable working air gaps and adequate
change in magnetic field for reliable switching. Generally, larger teeth
and slots allow a larger air gap. A gear tooth width approximating the
spacing between sensors (0.088" or 2.24 mm) requires special care in
the system design and assembly techniques.

ASSEMBLY TECHNIQUES
Due to magnet face non-uniformities and device variations, it is
recommended that applications requiring precision switching utilize a
mechanical optimization procedure during assembly. Without a pole
piece, the inherent magnet face offsets can be used to pre-bias the
magnetic circuit to obtain any desired operating mode. This is achieved
by physically changing the relative position of the magnet behind the
sensor to achieve the desired system performance objective. For
example, with a rotating ABS gear, the objective might be a 50% duty
cycle at maximum air gap. Similar objectives can be set for ignition
(crank and cam position) sensing systems.
Non-precision speed sensing applications do not require optimization. For applications where mechanical optimization is not feasible,
non-zero speed devices such as the UGN/UGS3059KA ac-coupled
gear-tooth sensor are available.

SENSOR LOCATION

r

ACTIVE AREA OEPTH

O.017"
0.43 mm
NOM

......

0.088"
2.24mm


co

::>

oc:

(9

FEATURES
Dwg. No. PH-005

Pinning is shown viewed from branded side.

• Complete Multiplexed Hall-Effect IC with
Simple Sequential Addressing Protocol
• Allows Power and Communication Over a
Two-Wire Bus (Supply/Signal and Ground)
• Up to 30 Hall-Effect Sensors Can Share a Bus
• Sensor Diagnostic Capabilities
• Magnetic-Field or Switch-Status Sensing
• Low Power of BiMOS Technology Favors
Battery-Powered and Mobile Applications
• Ideal for Automotive, Consumer, and Industrial Applications

ABSOLUTE MAXIMUM RATINGS
at TA

=+25°C

Supply Voltage, Vsus .............. 24 V
Magnetic Flux Density, B ....... Unlimited
Operating Temperature Range,

TA

• • • • • • • • • • • • • •

-20°C to +85°C

Storage Temperature Range,
Ts ................ -55°Cto+150°C
Package Power Dissipation,
Po . . . . . . . . . . . . . . . . . . 750mW

Always order by complete part number:
4-8

I UGN3055U I .

OPERATIONAL CHARACTERISTIC over operating temperature range.
Limits

Electrical
Characteristics
Power Supply Voltage
Signal Current
Quiescent Current

Min.

Typ.

Vsus

-

-

15

V

12

15

20

mA

2.5

mA
mA

Is

Max.

Units

Vsus=6V

10H

-

-

Vsus=9V

10l

-

-

2.5

10

-

-

300

J.lA.

1

-

30

-

10H-IOl
Address Range
Clock Thresholds

Symbol

Addr
LOW to HIGH

V ClH

-

-

8.5

V

HIGH to LOW

V CHl

6.5

-

-

V

Hysteresis

V CHYS

-

0.8

-

V

1.0

-

ms

tClK

0.1

Address LOW Voltage

Vl

VRST

6

VCHl

Address HIGH Voltage

VH

V CLH

9

Vsus

V

3.5

5.5

V

Clock Period

Power-On Reset Voltage
Settling Time

Propagation Delay

Pin 3 Input Resistance

V

VRST

2.5

VBUS= 9 V

th

100

-

-

J.ls

V BUS = 6 V

tl

100

-

-

J.ls

LOW to HIGH

tPlh

10

-

-

J.ls

HIGH to LOW

tphl

-

10

J.ls

No Magnetic Field (VOUT = HIGH)

ROUTH

40

-

75

kQ

Mag. Field Present (VOUT = LOW)

ROUTL

-

-

50

Q

'Turn-On

Bop

50

150

300

G

BRP

-25

100

300

G

BHyS

a

50

75

G

Magnetic Characteristics
Magnetic Thresholds

Turn-Off
Hysteresis (Bop-B RP )

• Alternate magnetic switch point specifications are available on request. Please contact the factory.

4-9

FUNCTIONAL BLOCK DIAGRAM

SENSOR LOCATION
(±0.005" [0.13 mm] die placement)

r

ACTIVE AAEA DEPTH
0.017"
0.43mm
NOM

---

0,071"
1.BO mm

~

-.-L...O.O84~

,

2.13mm

.91.
BRANDED

SUAFACE

1

2

3

Owg. No. MH·002

Dwg. No. FH-009

DEFINITION OF TERMS
Sensor Address
Each bus sensor has a factory-specified predefined
address. At present, allowable sensor addresses are
integers from 1 to 30.
LOW-to-HIGH Clock Threshold (VCLH)
Minimum voltage required during the positive-going
transition to increment the bus address and trigger a
diagnostic response from the bus sensors. This is also
the maximum threshold of the on-chip comparator which
monitors the supply voltage, VBUS .
HIGH-to-LOW Threshold (VHL)
Maximum voltage required during the negative-going
transition to trigg'er a signal current response from the bus
sensors. This is also the maximum threshold of the on-chip
comparator which monitors the supply voltage, VBUS.
Bus HIGH Voltage (VH)
Bus HIGH voltage required for addressing. Voltage
should be greater than VCLH.
Address LOW VoltagE!. (VL)
Bus LOW Voltage required for addressing. Voltage should
be greater than VAST and less than VCHL .
Bus Reset Voltage (VAST)
Voltage level required to reset individual sensors.
Sensor Quiescent Current Drain (IQ)
The current drain of bus sensors when active but not
addressed. IQH is the maximum quiescent current drain
when the sensor is not addressed and is at Vw IQL is the
maximum quiescent current drain when the sensor is not
addressed and is at V L.

4-10

Diagnostic Phase
Period on the bus when the address voltage is at Vw
During this period, a correctly addressed sensor responds
by increasing its current drain on the bus. This response
from the sensor is called the diagnostic response and
the bus current increase is called the diagnostic current.
Signal Phase
Period on the bus when the address voltage is at VL.
During this period, a correctly addressed sensor that
detects a magnetic field greater than magnetic Operate
Point Bop responds by maintaining a current drain of Is
on the bus. This response from the sensor is called the
signal response and the bus current increase is called
the signal current.
Sensor Address Response Current (Is)
Current returned by the bus sensors during the diagnostic
and the signal responses of the bus sensors. This is
accomplished by enabling the constant current source
(CCS).
Magnetic Operate Point (Bop)
Minimum magnetic field required to switch ON the Hall
amplifier and switching circuitry of the addressed sensor.
This circuitry is only active when the sensor is addressed.
Magnetic Release Point (B AP)
MagnetiC field required to switch OFF the Hall amplifier
and switching circuitry after the output has switched ON.
This is due to magnetic memory in the switching circuitry.
However, when a device is deactivated by changing the
current bus address, all magnetic memory is lost.
Magnetic Hysteresis (B Hys)
Difference between the Bop and B AP magnetic field
thresholds.

ADDRESSING PROTOCOL
The device may be addressed by modulating the supply voltage as shown in Figure
1. A preferred addressing protocol is as
follows: the bus supply voltage is brought
down to 0 V so that all devices on the bus
may be reset. The voltage is then raised to
the address LOW voltage (V l) and the bus
quiescent current is measured. The bus is
then toggled between Vl and VH (address
HIGH voltage), with each positive transition
representing an increment in the bus address.
After each voltage transition, the bus current
is monitored to check for diagnostic and
signal responses from sensor IC's.

address cycle). This response may be used as an indication that the
sensor is alive and well on the bus and is also called the diagnostic
response. If the sensor detects an ambient magnetic field, it also
responds with Is during the low portion of the address cycle. This
response from the sensor is called the signal response. When the next
positive transition is detected, the sensor becomes disabled, and its
contribution to the bus signal current returns to 10 .
Bus Current
Figure 1 displays the above described addressing protocol. The top
trace represents the bus voltage transitions as controlled by the bus
driver (see applications note for an optimal bus driver schematic).
The second trace represents the bus current contribution of sensor
(address 2). The diagnostic response from the sensor indicates that
it detected its address on the bus; however, no signal response current
is returned which indicates that sufficient magnetic field is not detected
at the chip surface. The third trace represents the current drain of
sensor 2 when a magnetic field is detected. Note both the diagnostic
and signal response from the sensor. The last trace represents the
overall bus current drain when sensors 2 and 3 are present; note that

Sensor Addressing
When a sensor detects a bus address equal
to its factory programmed address, it responds with an increase in its supply current
drain (called Is during the HIGH portion of the

FIGURE 1

BUS TIMING Dl
VH

Bus &JppIy Vonage

-

Addr2

' - _ _ _ _ Add"

VCLH

------

Vall

-

-

-

-

Add, 30

Add'3

-

Diagnostic Current Returned
Sensor #2 Supply Current
No Magnet Present

100

--~

10l

o rnA--

Sensor #2 Supply Current
Magnet Present

Is

-

-

-

-

-

-

-

-

-

-

,-----n
Diagnostic & Signal Current Returned

OmA- -

II
~~
Addr 2

tphl

--~

M:l"3

IS

Bus Supply Current
Address 2 & 3 Responding
OmA- -

--~

NOTE: Diagnostic current is retufnod when tho preSQI device add.ross i9 doleded.
Signal current is returnod when the corred address and magnetic field are both detected.

4-11

APPLICATIONS NOTES
while sensor 2 returns a diagnostic and
signal current, sensor 3 only returns a
diagnostic current. When no sensors are
addressed, the net bus current drain is the
sum of quiescent currents of all sensors on
the bus (for 'n' sensors, the bus quiescent
current drain is n*lo)'
Bus Issues
At present, a maximum of 30 active sensors
can coexist on the same bus, each with a
different address. Address 0 is reserved for
bus current calibration in software. This
feature allows for fail-safe detection of signal
current and eliminates detection problems
caused by low signal current (Is)' the operation of sensors at various ambient temperatures, lot-to-Iot variation of quiescent current,
and the addition and replacement of sensors
to the bus while in the field. Address 31 is
designed to be inactive to allow for further
address expansion of the bus (to 62 maximum addresses). In order to repeat the
address cycle, the bus must be reset as
shown in Figure 1 by bringing the supply
voltage to below VRST" Sensors have been
designed not to 'wrap-around'.
Magnetic Sensing
The sensor IC has been designed to respond
to an external magnetic field whose magnetic
strength is greater than Bop, It accomplishes
this by amplifying the output of an on-chip
Hall transducer and feeding it into a threshold
detector. In order that bus current is kept to a
minimum, the transducer and amplification
circuitry is kept powered down until the
sensor is addressed. Hence, the magnetic
status is evaluated only when the sensor is
addressed.
External Switch Sensing
The third pin of the IC (pin 3) may be used to
detect the status of an external switch when
magnetic field sensing is not desired (and in
the absence of a magnetic field). The allowable states for the switch are 'open' and
'closed' (shorted to sensor ground).

Magnetic Actuation
Figure 2 shows the wiring of the UGN3055U when used as a magnetic
threshold detector. Pin 1 of the sensor is wired to the positive terminal
of the bus, pin 2 is connected to the bus negative terminal, and pin 3
has no connection.
Mechanical Actuation
Figure 3 shows the wiring of the UGN3055U when used to detect the
status of a mechanical switch. In this case, pin 3 is connected to the
positive terminal of the switch. The negative side of the switch is .
connected to the negative terminal of the bus. When the mechanrcal
switch is closed (shorted to ground) and the correct bus address is
detected by the IC, the sensor responds with a signal current. If the
switch is open, only a diagnostic current is returned.

FIGURE 2

MAGNETICALLY ACTUATED SENSOR
Bus Pas

2

FIGURE 3

MECHANICALLY ACTUATED SENSOR
Bus Pas

N3055

Bus Neg

4-12

No Connection

Bus Neg

FIGURE 4

BUS INTERCONNECTION
0

'"'"
u
ec.
eu
Q)

Address
Reset

AID In

::E

Bus Configuration
A maximum of 30 sensors may be connected
across the same two wire bus as shown in
Figure 4. It is recommended that the sensors
use a dedicated digital ground wire to minimize the effects of changing ground potential
(as in the case of chassis ground in the
automotive industry).
The bus was not designed to require two
wire twisted pair wiring to the sensors;
however, in areas of extreme EMI (electromagnetic interference), it may be advisable to
install a small bypass capacitor (.01 ~F for
example) between the supply and ground
terminals of each sensor instead of using the
more expensive wiring.

Bus Driver
It is recommended that the bus be controlled
by microprocessor-based hardware for the
following reasons:
• Sensor address information may be stored
in ROM in the form of a look up table.
• Bus faults can be pinpointed by the microprocessor by comparing the diagnostic
response to the expected response in the
ROM look up table.
• The microprocessor, along with an AID
converter, can also be used to self calibrate the quiescent currents in the bus and
hence be able to easily detect a signal
response.

• The microprocessor can easily keep track of the signal responses,
initiate the appropriate action; e.g., light a lamp, sound an alarm, and
also pinpoint the location of the signal.
Optimally, the microprocessor is used to control bus-driving circuitry
that will accept TTL level inputs to drive the bus and will return an
analog voltage representation of the bus current.

Interface Schematic
The bus driver is easily designed using a few operational amplifiers,
resistors, and transistors. Figure 5 shows a schematic of a recommended bus driver circuit that is capable of providing 6 to 9 V transitions, resetting the bus, and providing an analog measurement of the
current for use by the AID input of the microprocessor.
In Figure 5, the Address pin provides aTTL-compatible input that is
used to control the Bus supply. A HIGH (5 V) input switches 01 ON and
sets the bus voltage to 6 V through the resistor divider R4, R5, and the
Zener Z1. A LOW input switches OFF 02 and sets the bus voltage to
9 V. This voltage is fed into the positive input of the operational amplifier OP1 and is buffered and made available at Bus Supply (or sensor
supply). Bus reset control is also available in the form of a TTL-compatible input. When this input, which is marked Reset, is HIGH, 02 is
switched ON and the positive input of the op amp is set to the saturation voltage of the transistor (approximately 0 V). This resets the bus.
A linear reading of the bus current is made possible by amplifying
the voltage generated across R6 (which is IB~S *R6). The amplifier,
OP2, is a standard differential amplifier of gain R9/R7 (provided that
R7 = R8, R9 = R1 0). The gain of the total transimpedance amplifier
is given by:
VOUT = IBus *R6*R9/R7
This voltage is available at the terminal marked Analog Out.

• The microprocessor can also be used to
filter out random line noise by digitally
filtering the bus responses.

4-13

Bus Control Software
The processing of the bus current (available at Analog Out) is best
done by feeding it into the ND input of a microprocessor. If the flexibility
provided by a microprocessor is 'not desired, this signal could be fed
into threshold detection circuitry; e.g., comparator, and the output used
to drive a display.

Related References
1. G. AVERY, "Two Terminal Hall. Sensor," ASSIGNEE: Sprague
Electric Company, North Adams, MA, United States. Patent number
4,374,333; Feb. 1983.

2. T. WROBLEWSKI and F. MEISTERFIELD, "Switch Status
Monitoring System, Single Wire Bus, Smart Sensor Arrangement There
Of," ASSIGNEE: Chrysler Motor Corporation, Highland Park, MI, United
States. Patent number 4,677,308; June 1987.

FIGURE 5

BUS INTERFACE SCHEMATIC

1 kQ

BUS SUPPLY

50Q R,
Q2

RESET

5kQ

50kQ

50 kQ

R,

R,
SWITCH

BUS RETURN

>----

ANALOG OUT

100kQ

R,o

Dwg. No. EH-003A

4-14

HALL-EFFECT GEAR-TOOTH
SENSORS-ZERO SPEED
The A3056EU/LU and A3058EU/LU Hall effect gear-tooth sensors
are monolithic integrated circuits that switch in response to differential
magnetic fields created by ferrous targets. These devices are ideal for
use in gear-tooth-based speed, position, and timing applications and
operate down to zero rpm over a wide range of air gaps and temperatures. When combined with a back-biasing magnet and proper assembly techniques, devices can be configured to give 50% duty cycle or to
switch on either leading, trailing, or both edges of a passing gear tooth
or slot.

1

2

The six devices differ only in their magnetic switching values and
operating temperature ranges. The low hysteresis of the A3056EU and
A3056LU makes them perfectly suited for ABS (anti-lock brake system)
or speed sensing applications where maintaining large air gaps is
important. The high hysteresis of the A3058EU and A3058LU, with their
excellent temperature stability, makes them especially suited to ignition
timing applications where switch-point accuracy (and latching requirements) is extremely important.

3

Complete technical information on these devices is included with
the A3046EU/LU.

~
a...
a...

::J
CJ)

o
Z

I::J

oa:

I::J

::J
C)

BENEFITS

a...

o

Dwg. No. PH-012

Pinning is shown viewed from branded side.

•
•
•
•
•
•
•
•
•
•

Senses Ferrous Targets Down to Zero RPM
Defined Power-Up State (3058 only) Available Mid-1993
Large Effective Air Gap
Wide Operating Temperature Range
Operation from Unregulated Supply
High-Speed Operation
Output Compatible With All Logic Families
Reverse Battery Protection
Solid-State Reliability ... No Moving Parts
Resistant to Physical Stress

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vcc ............... 28 V
Reverse Battery Voltage,
VRCC

.................•.....

-3D V

Magnetic Flux Density, B ....... Unlimited
Output OFF Voltage, VOUT .......... 28 V
Reverse Output Voltage, VOUT. . . . .. -0.5 V
Output Current, lOUT . . . . . . . . . . . .. 25 rnA
Package Power Dissipation, PD' .. 500 mW
Operating Temperature Range, TA
Suffix uEU" ......... , -40°C to +85°C
Suffix uLU" . . . . . . . .. -40°C to + 150°C
Storage Temperature Range,
Ts" .............. ~65°C to +170°C

4-15

HALL-EFFECT GEAR-TOOTH SENSORS
-ACCOUPLED
The UGN3059KA and UGS3059KA ac-coupled Hall-effect geartooth sensors are monolithic integrated circuits that switch in response
to changing differential magnetic fields created by moving ferrous
targets. These devices are ideal for use in non-zero-speed, .
gear-tooth-based speed, position, and timing applications.

Vee
2

3

4

5

f-

a

II:

II:

aa:

u::

u::

>...J
a.
a.

:::l

:::l

en

:::l

a

n.

f-

Z
:::l

~

~

C)

Owg. No. PH-Oll

Pinning is shown viewed from branded side.

Both devices, when coupled with a back-biasing magnet, can be
configured to turn ON or OFF with the leading or trailing edge of a
gear-tooth or slot. Changes in fields on the magnet face caused by a
moving ferrous mass are sensed by two integrated Hall transducers
and are differentially amplified by on-chip electronics. Steady-state
magnet and system offsets are eliminated using an on-chip differential
band-pass filter. This filter also provides relative immunity to interference from RF and electromagnetic sources. The on-chip temperature
compensation and Schmitt trigger circuitry minimizes shifts in effective
working air gaps and switch points over temperature, allowing operation to low frequencies over a wide range of air gaps and temperatures.
Each Hall-effect digital Integrated circuit includes a voltage regulator, two quadratic Hall effect sensing elements, temperature compensating circuitry, a low-level amplifier, band-pass filter, Schmitt trigger,
and an open-collector output driver. The on-board regulator permits
operation with supply voltages of 4.5 to 18 volts. The output stage can
easily switch 20 mA over the full frequency response range of the
sensor and is compatible with bipolar and MOS logic circuits.
The two devices provide a choice of operating temperature ranges.
The UGN3059KA has an operating range of -20°C to +85°C. The
UGS3059KA has an operating range of -40°C to + 125°C. Both devices
are packaged in a 5-pin plastic SIP.

FEATURES
ABSOLUTE MAXIMUM RATINGS
at TA +25°C

=

Supply Voltage, Vcc . . . . . . . . . . . . . .. 24 V
Reverse Battery Voltage, VRCC . . . . .. -30 V
Magnetic Flux Density, B ...... Unlimited
Output OFF Voltage, VOUT .......... 24 V
Output Current, lOUT. . . . . . . . . . . .. 25 mA
Package Power Dissipation,
Po ...................... 500mW
Operating Temperature Range, TA
UGN3059KA . . . . . . .. -20°C to +85°C
UGS3059KA ....... -40°C to +125°C
Storage Temperature Range,
Ts ................ -65°C to +150°C

4-16

•
•
•
•
•
•
•
•
•

Senses Motion of Ferrous Targets Such as Gears
Large Effective Air Gap
Wide Operating Temperature Range
4.5 V to 18 V Operation
Operation to 30 kHz
Output Compatible With All Logic Families
Reverse Battery Protection
Activate With Small, Inexpensive Magnets
Resistant to RFI, EMI

Always order by complete part number:

Part Number Operating Temperature Range
UGN3059KA

-20°C to +85°C

UGS3059KA

-40°C to +125°C

1

SUPPLY

FUNCTIONAL BLOCK DIAGRAM

4
FILTER

5
Dwg. No. FH-008

FILTER

ELECTRICAL CHARACTERISTICS over operating temperature range.
Limits
Characteristic

Symbol

Supply Voltage

Vcc

Output Saturation Voltage

VOUT(SAT)

Test Conditions

Min.

Typ.

Operating

Max.

4.5

-

18

V

lOUT = 20 mA, B > Bop

-

-

400

mV

-

10

~

-

20

mA

-

kHz

Units

Output Leakage Current

IOFF

Supply Current

Icc

= 24 V, B < BRP
Vcc = 18 V, B < BRP

High-Frequency Cutoff

leah

-3 dB

30

-

-

0.04

0.2

I-ls

-

0.18

0.3

I-ls

VOUT

Output Rise time

tr

VOUT

Output Fall time

tf

VOUT

= 12 V,
= 12 V,

RL
RL

= 820 Q
= 820 Q

MAGNETIC CHARACTERISTICS over operating temperature range, Vee

= 12 V.

Limits
Characteristic

Symbol

Test Conditions

Operate Point

Bop

Output Switches OFF to ON

10

-

100

G

Release Point

B RP

Output Switches ON to OFF

-100

-

-10

G

Hysteresis

Bhys

Bop-B RP

20

-

150

G

NOTES:

Min.

Typ.

Max.

Units

Magnetic switch points are specified as the difference in magnetic fields at the two Hall elements.
As used here, negative flux densities are defined as less than zero (algebraic convention).
Typical values are at TA = +25°C and Vcc = 12 V.

4-17

APPLICATIONS INFORMATION
1kr-----~_.--------_.------__,

~

100

f--:!~--__I_----_I_---___I

i!!:
II.
II.

~U
~
Z

1 0 r - - -_

__I_~~--_I_----___I

~

:il
II:
II.

~

1.0

r------__I_-----_I_~--___I

0.101:-.01:--------0~.1:--------...Jl.0------....Il0
CAPACITANCE IN

!1F
Dwg. No. GH·025

Magnetic Operation. The UGN3059KA and UGS3059KA sensor
ICs have two integrated Hall transducers that are used to sense a
magnetic field gradient across the face of the IC.
The magnetic field is measured and converted into an analog
voltage by each of the two Hall transducers, E1 and E2 where E1 is
the left element and E2 is the right element. The difference voltage
is amplified, band-pass filtered to remove dc offset components, and
then fed into a Schmitt trigger. This trigger switches the output ON
when BE1 -B E2 > Bop and switches the output OFF when BE1 -B E2 < BRP '

AC-Coupled Operation. Steady-state magnet and system offsets
are eliminated using an on-chip differential band-pass filter. The
lower frequency cut-off of this patented filter is set using an external
capacitor the value of which can range from 0.01 (.l.F to 10 (.l.F.
The high-frequency cut-off of this filter is set at 30 kHz by an internal
integrated capacitor.
The differential structure of this filter enables the IC to reject singleended noise on the ground or supply line and, hence, makes it resistant
to radio-frequency and electromagnetic interference typically seen in
hostile remote sensing environments. This filter configuration also
increases system tolerance to capacitor degradation at high temperatures, allowing the use of an inexpensive external ceramic capacitor.

Low-Frequency Operation. Low-frequency operation of the sensor
is set by the value of an external capacitor. The graph provides the
low-frequency cut-off (-3 dB point) of the filter as a function of capacitance value. This information should be used with care. The graph
assumes a perfect sinusoidal magnetic signal input. In reality, when
used with gear teeth, the teeth create transitions in the magnetic field
that have a much higher frequency content than the basic rotational
speed of the target. This allows the device to sense speeds much lower
than those indicated by the graph for a given capacitor value.
Capacitor Characteristics. The major requirement for the external
capacitor is its ability to operate in a bipolar (non-polarized) mode.
Another important requirement is the low leakage current of the
capacitor (equivalent parallel resistance should be greater than 500 kQ).
To maintain proper operation with frequency, capacitor values should
be held to within ±30% over the operating temperature range. Available
non-polarized capacitors include ceramic, polyester, and some tantalum
types. For low-cost operation, ceramic capacitors with temperature
codes Z5S, Y5S, X5S, or X7S (depending on operating temperature
range) or better are recommended. The commonly available Z5U
temperature code should not be used in this application.

4-18

SENSOR LOCATIONS
(±0.005" [0.13 mm] die placement)

r

ACTIVE AREA DEPTH
0.017"
0.43mm

---

NOM

0.087"

O.O81~

2.21 mm

2.06 mm

r

--,-

,

0.075"
1.90mm

E1

E2

The UGN/UGS3059KA can also be used without a back-biasing
magnet. In this configuration, the sensor can be used to detect a
rotating ring magnet such as those found in brush less dc motors or in
speed sensing applications. Here, the sensor detects the magnetic field
gradient created by the moving magnetic poles.

JI.
BRANDED
SURFACE

Magnet Biasing. In order to sense moving non-magnetized ferrous
targets, the UGN3059KA or UGS3059KA must be back-biased by
mounting it on a small permanent magnet. This can be accomplished
by attaching the pole end of a magnet (AlNiCo 8, SmCo, or NeFe B) to
the back of the package, opposite to the branded side. Either magnetic
pole (north or south) can be used. The magnetic system, thus configured, can sense ferrous gear teeth out to 0.070" (1.75 mm) for typical
wheel speed sensing targets or 0.100" (2.5 mm) for deep slotted
ignition targets.

1

2

3

4

5

Dwg. No. MH-007A

Magnet Selection. The UGN/UGS3059KA can be used with a wide
variety of commercially available permanent magnets. The selection
of the magnet depends on the operational and environmental requirements of the sensing system. For systems that require high accuracy
and large working airgaps or an extended temperature range, the usual
magnet material of choice is rare earth samarium cobalt (SmCo). This
magnet material has a high energy product and can operate over an
extended temperature range. For systems that require low-cost solutions for an extended temperature range, AlNiCo 8 can be used. Due
to its relatively low energy product, smaller operational airgaps can be
expected. Neodymium iron boron (NeFeB) can be used over moderate
temperature ranges when large working airgaps are required. Of these
three magnet materials, AlNiCo 8 is the least expensive by volume and
SmCo is the most expensive.

4-19

3113, 3120,
3130, AND 3140
HALL-EFFECT SWITCHES
These Hall-effect switches are highly temperature stable and stressresistant sensors best utilized in applications that provide steep magnetic
slopes and low residual levels of magnetic flux density.
Each device includes a voltage regulator, quadratic Hall voltage
generator, temperature stability circuit, signal amplifier, Schmitt trigger
and open-collector output on a single silicon chip. The on-board regulator
permits operation with supply voltages of 4.5 to 24 volts. The switch
output can sink up to 20 mA. With suitable output pull up, they can be
used directly with bipolar or MaS logic circuits.

2

The four package styles available provide a magnetically optimized
package for most applications. Suffix LT is a surface-mount SOT-89
(TO-243AA) package; suffixes LL, U, and UA feature wire leads for
through-hole mounting.

3

FEATUBES
~

CL
CL

:J
(f)

o

Z
:J

oa:

(!J

I-

:J

CL
I-

:J

o

Dwg. No. PH-003A

Pinning is shown viewed from branded side.

•
•
•
•
•
•
•
•

4.5 V to 24 V Operation
Activate With Small, Commercially Available Permanent Magnets
Solid-State Reliability ... No Moving Parts
Small Size
Constant Output Amplitude
Superior Temperature Stability
Resistant to Physical Stress
Directly Replace Series UGN and UGS3000T/U Switches

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ............... 25 V
Magnetic Flux Density, B ....... Unlimited
Output OFF Voltage, VOUT ........... 25 V
Continuous Output Current, lOUT .... 25 mA
Operating Temperature Range, TA
Prefix UGN .......... -20°C to +85°C
Prefix UGS ......... -40°C to + 125°C
Storage Temperature Range,
Ts ................ -65°C to + 150°C'
• Devices can be stored at +200'C for short
periods of time.

4-20

Always order by complete part number, e.g., 1 UGN3113UA I .
See Magnetic Characteristics table for differences between devices.

ELECTRICAL CHARACTERISTICS at T A + +25°C, Vee = 4.5 V to 24 V (unless otherwise noted).
Limits
Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

Units

Operating

4.5

-

24

V

VOUT(SAT)

lOUT = 20 mA, B > Bop

150

400

mV

Output Leakage Current

IOFF

VOUT = 24 V, B < B RP

<1.0

10

j.iA

Supply Current

lee

-

Supply Voltage
Output Saturation Voltage

Vee

Output Rise Time

t,

Output Fall Time

tt

= 4.5 V, Output Open
= 12 V, RL = 820 n, C L = 20 pF
Vee = 12 V, RL = 820 n, CL = 20 pF
Vee

Vee

4.7

8.0

mA

0.04

2.0

).IS

0.18

2.0

).IS

MAGNETIC CHARACTERISTICS in gauss
Part
Characteristic
Operate Point, Bop

Release Point, BRP

Hysteresis, Bhys

Number'

TA
Min.

=+25°C
Max.

=

T A -20°C to +85°C
Min.
Max.

TA

=

-40°C to + 125°Ct
Min.
Max.

3113

-

450

-

510

-

-

3120

70

350

70

425

35

450

3130

-

150

-

175

-

200

3140

70

200

45

260

45

270

3113

30

20

-

-

3120

50

50

405

25

3130

·150

·175

-

-200

3140

50

180

25

240

25

250

3113

20

-

10

-

3120

20

-

20

3130

20

-

20

20

-

3140

20

-

20

20

-

330

-

-

20

430

-

NOTE: As used here, negative flux densities are defined as less than zero (algebraic convention) .
• Complete part number includes a prefix denoting operating temperature range (UGN or UGS) and a suffix denoting package type (LL, LT, U, or UA).

t

Applicable to prefix UGS devices only (available with all devices except 3113).

4-21

TYPICAL CHARACTERISTICS
AS FUNCTIONS OF TEMPERATURE

FUNCTIONAL BLOCK DIAGRAM

III::J
c:C +50

(!j

~

~

(5
II.
0::

-50

~

g

-

OPERATE POINT

r-- -

RELEASE POINT

~-100
w

>

~w

II:
Dwg. No. FH-OD5

-40

40

80

120

160

200

AMBIENT TEMPERATURE IN "C
Dwg. No. GH-018

TYPICAL CHARACTERISTICS
AS FUNCTIONS OF TEMPERATURE
OUTPUT SATURATION VOLTAGE

SUPPLY CURRENT
6.0

200

5.5

>

175

E

--

~
w
(!j

~

...J

0

150

>
Z

0

;::

~

~

<0:
E
~

~

!zw
~

<0:

4. 5

::J

o

>

~

<0:
II:

::J
I-

5.0

4.0

II.

::J
Ul

125

Ul

""
........

-.............

i'--r--

3. 5

100
-40

40

60

120

160

200

40

60

120

160

200

AMBIENT TEMPERATURE IN "C

AMBIENT TEMPERATURE IN"C
Dwg. No. GH-013

4-22

3.0
-40

Dwg. No. GH-014

SENSOR LOCATIONS
(±O.OO5" [O.13mm] die placement)

SUFFIX "LL" AND "LT"
ACTIVE AREA DEPTH

~

0.035"
0.89 mm
NOM

0.089"

r

r---"-t-,,---;-L
0.051"

Dwg. No. MH-008A

SUFFIX "U"

r

ACTIVE AREA DEPTH
O.01 7"
0.43 mm
NOM

SUFFIX "UA"

~,0.092"1
2.34 mm

-..L

r

-

ACTIVE AREA DEPTH
0.020"
0.51 mm
NOM

~

0.083"
2.11mm~

0.080"
2.03 mm

cfJ

LI"

f

.91.
BRANDED
SURFACE

0.063"
1.60mm

BRANDED
SURFACE
1

2

3

'--

'--

'--

1

~

Dwg. No. MH-002-1A

f

.91.
2

~

3

'--

Dwg. No. MH-Ol1-1A

4-23

3121, 3122,
3123

AND

HALL-EFFECT SWITCHES
FOB HIGH-TEMPERATURE OPERATION
These Hall-effect switches are monolithic integrated circuits with
hter magnetic specifications and switch points, designed to operate
continuously over extended temperatures to + 150°C, and are more
stable with both temperature and supply voltage changes. The unipolar
switching characteristic makes these devices ideal for use with a simple
bar or rod magnet. The three basic devices (3121, 3122, and 3123) are
identical except for magnetic switch points.

x

Each device includes a voltage regulator for operation with supply
voltages of 4.5 volts to 24 volts, reverse battery protection diode,
quadratic Hall-voltage generator, temperature compensation circuitry,
small-signal amplifier, Schmitt trigger, and an open-collector output to
sink up to 25 mA. With suitable output pull up, they can be used with
bipolar or CMOS logic circuits. The 3121 is an improved replacement
for the 3113 and 3119.

1

~

Il..
Il..

:)
C/)

2

Cl

3

I-

Z

:)

o
II:

I-

:)

CJ

Il..

:)

o

The first character of the part number suffix determines the device
operating temperature range; suffix 'E-' is for the automotive and
industrial temperature range of -40°C to +85°C, suffix 'L-' is for the
automotive and military temperature range of -40°C to + 150°C. Four
package styles provide a magnetically optimized package for most
applications. Suffix '-LL' is a long-leaded version of suffix '-LT, a
miniature SOT-89/TO-243AA transistor package for surface-mount
applications; suffix '-U' is a three-lead plastic mini-SIP while suffix
'-UA' is a three-lead ultra-mini-SIP.

Dwg. No. PH-Q03A

Pinning is shown viewed from branded side.

FEATURES and BENEFITS

ABSOLUTE MAXIMUM RATINGS
at TA =+25°C

•
•
•
•
•
•
•
•

Superior Temp. Stability for Automotive or Industrial Applications
4.5 V to 24 V Operation ... Needs Only An Unregulated Supply
Open-Collector 25 mA Output ... Compatible with Digital Logic
Reverse Battery Protection
Activate with Small, Commercially Available Permanent Magnets
Solid-State Reliability ... No Moving Parts
Small Size
Resistant to Physical Stress

Supply Voltage, Vcc ............................... 30 V
Reverse Battery Voltage, VRCC .••.••.••••• -30 V
Magnetic Flux Density, B ............. Unlimited
Output OFF Voltage, VOUT .................... 28 V
Reverse Output Voltage, VOUT .......... -0.5 V
Continuous Output Current, lOUT ....... 25 mA
Operating Temperature Range, TA
Suffix 'E-' ...................... -40 o e to +85°e
Suffix 'L-' .................... -40o e to +150 o e
Storage Temperature Range,
Ts ................................ -65°e to +1700 e

Always order by complete part number, e.g., 1A3121 ELL I.
4-24

3121, 3122,

AND

3123

HALL-EFFECT SWITCHES
FOR HIGH-TEMPERATURE OPERATION
ELECTRICAL CHARACTERISTICS over operating temperature range, at Vee = 12 V.
Limits
Characteristic

Symbol

Supply Voltage

Vee

Test Conditions

Min.

Operating

4.5

140

Output Leakage Current

IOFF

= 20 mA, B > Bop
VOUT = 24 V, B < B RP

Supply Current

lee

B < B RP (Output OFF)

-

= 820 n, C L = 20 pF
RL = 820 n, CL = 20 pF

-

Output Saturation Voltage

lOUT

VOUT(SAT)

Output Rise Time

tr

Output Fall Time

tf

RL

Typ.

Max.

Units

24

V

400

mV

<1.0

10

J.lA

4.6

9.0

mA

0.04

2.0

ns

0.18

2.0

ns

MAGNETIC CHARACTERISTICS in gauss over operating supply voltage range.
Part Numbers'
A3121

Characteristic

Bop at TA = 25°C
over operating temp. range

BAP at TA = 25°C
over operating temp. range

BhyS at TA = 25°C
over operating temp. range

A3122

A3123

Min.

Typ.

Max.

250

350

450

280

340

400

220

350

500

260

340

430

125

245

380

140

235

330

80

245

410

120

235

360

70

105

140

70

105

60

105

150

70

105

Min.

Typ.

Max.

Min.

Typ.

Max

250

345

440

230

345

470

180

240

300

160

240

330

140

70

105

140

140

70

105

140

NOTES: Typical values are at TA = +25°C and Vcc = 12 V.
Bop = operate point (output turns ON); BAP = release point (output turns OFF); Bhy, = hysteresis (Bop - BAP )'
'Complete part number includes a suffix to identify operating temperature range (E- or L-) and package type (-LL, -LT, -U, or -UA).

FUNCTIONAL BLOCK DIAGRAM

Dwg. No. FH-005-2

4-25

TYPICAL OPERATING CHARACTERISTICS
OUTPUT SATURATION VOLTAGE

SWITCH POINTS

0

-

r-

OPERATE POINT

~
VCC~4~

0

RELEASE POINT

I--- I---

I~

0

o

0
50

AMBIENT TEMPERATURE IN °C

AMBIENT TEMPERATURE IN °C

Dwg. No. GH-040

Dwg. No. GH-038

SUPPLY CURRENT
0

........ ......

0

~=~

I'-.... ......

0

B~Bop

['-...

r-.......

I--

'-"
r--......

0

....... ['-...

-

~BSBRP

AMBIENT TEMPERATURE IN °C

r-

'"

Dwg. No. GH-039

CHANGE IN OPERATE POINT

SUPPLY CURRENT
0

,

.0

B ~ Bop

a,;;8 AP

0

.0

0

o

o

$

0

.0

TSUPPL y VOLTAGE IN VOLTS

0

.
SUPPLY VOLTAGE IN VOLTS

Dwg. No. GH-041

• Complete part number includes a suffix denoting operating temperature range (E- or L-) and package type (-LL, -LT, -U, or -UA).

4-26

Dwg. No. GH·042

3121, 3122,

AND

3123

HALL-EFFECT SWITCHES
FOR HIGH-TEMPERATURE OPERATION
OPERATION
SENSOR LOCATIONS

The output of these devices (pin 3) switches low when the magnetic
field at the Hall sensor exceeds the operate point threshold (Bop), At
this point, the output voltage is VOUT(SAT)' When the magnetic field is
reduced to below the release point threshold (B RP )' the device output
goes high. The difference in the magnetic operate and release points
is called the hysteresis (Bh s) of the device. This built-in hysteresis
allows clean switching of the output even in the presence of external
mechanical vibration and electrical noise.

SUiTIX "LL" and "LT"

Dwg. No. MH-008-2

Suffix

"U"
~,O.091"1
2.31 mm

-.L
0.071"
1.80m m

f
51.
BRANDED
SURFACE

1

3

2

'-

'---Dwg. No. MH-002-2

SUiTIX "UA"
ACTIVE AREA DEPTH

~

--

0.020"
0.51 mm
NOM

0.082"

2.10 mm

r
t
I

0.054"

51.
BRANDED
SURFACE

1

-

1.38mm

2
'-

3
'Dwg. No. MH-011-2A

4-27

HALL-EFFECT SWITCH
This Hall-effect switch is a highly temperature stable and stressresistant sensor best utilized in applications that provide steep magnetic
slopes and low residual levels of magnetic flux density.
Each device includes a voltage regulator, quadratic Hall voltage
generator, temperature stability circuit, signal amplifier, Schmitt trigger
and open-collector output on a single silicon chip. The on-board regulator
permits operation with supply voltages of 4.5 to 24 volts. The switch
output can sink up to 20 mA. With suitable output pull up, they can be
used directly with bipolar or MOS logic circuits.

2

The four package styles available provide a magnetically optimized
package .for most applications. Suffix LT is a surface-mount SOT-89
(TO-243AA) package; suffixes LL, U, and UA feature wire leads for
through-hole mounting.

3

Complete technical information for the UGN3130- is included with
the UGN3113-.

>-

--'

a..
a..

:::J

en

o

I-

oa:

I-

Z
:::J

o

:::J

a..

FEATURES

:::J

•
•
•
•
•
•
•
•

o

Dwg. No. PH-003A

Pinning is shown viewed from branded side.

4.5 V to 24 V Operation
Activate With Small, Commercially Available Permanent Magnets
Solid-State Reliability ... No Moving Parts
Small Size
Constant Output Amplitude
Superior Temperature Stability
Resistant to Physical Stress
Directly Replace Series UGN and UGS3030T/U Switch

ABSOLUTE MAXIMUM RATINGS

Supply Voltage, Vcc ............... 25 V
Magnetic Flux Density, B ....... Unlimited
Output OFF Voltage, VOUT' .......... 25 V
Continuous Output Current, lOUT .... 25 mA
Operating Temperature Range, TA
Prefix UGN .......... -20°C to +85°C
Prefix UGS ......... -40°C to +125°C
Storage Temperature Range,
Ts' . . . . . . . . . . . . . . . -65°C to +150°C·
• Devices can be stored at +200°C for short
periods of time.

Always order by complete part number, e.g.,
4-28

1UGN3130UA I·

ULTRA-SENSITIVE BIPOLAR
HALL-EFFECT SWITCHES
These Hall-effect switches are designed for magnetic actuation
using a bipolar magnetic field, i.e., a north-south alternating field.
They combine extreme magnetic sensitivity with excellent stability over
varying temperature and supply voltage. The high sensitivity permits
their use with multi-pole ring magnets over relatively large distances.

><

1

Each device includes a voltage regulator, quadratic Hall voltage
generator, temperature stability circuit, signal amplifier, Schmitt trigger,
and open-collector output on a single silicon chip. The on-board
regulator permits operation with supply voltages of 4.5 to 24 volts.
The switch output can sink up to 25 mAo With suitable output pull up,
they can be used directly with bipolar or MOS logic circuits.

2

3

The four package styles available provide a magnetically optimized
package for most applications. Suffix LT is a surface-mount SOT 89
(TO-243AA) package; suffixes LL, U, and UA feature wire leads for
through-hole mounting. Prefix 'UGN' devices are rated for continuous
operation over the temperature range of -20°C to +85°C; prefix 'UGS'
devices over an extended range of -40°C to + 125°C.

lFJEATURES

~

a..
a..

:::J
C/)

o

I:::J

aa:

I:::J

Z
:::J

C9

a..

a

Dwg. No. PH·Q03A

•
•
•
•
•
•
•
•
•

4.5 V to 24 V Operation
Reverse Battery Protection
Superior Temperature Stability
Superior Supply Voltage Stability
Activate with Multi-Pole Ring Magnets
Solid-State Reliability". No Moving Parts
Small Size
Constant Output Amplitude
Resistant to Physical Stress

Pinning is shown viewed from branded side.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC' .............. 25 V
Reverse Battery Voltage, VRCC . . . . .. -35 V
Magnetic Flux Density, B ....... Unlimited
Output OFF Voltage, VOUT' . . . . . . . .. 25 V
Continuous Output Current, lOUT ... 25 mA
Operating Temperature Range, TA
Prefix UGN .......... -20°C to +85°C
Prefix UGS ......... -40°C to +125°C
Storage Temperature Range,
Ts' ............... -65°C to +150°C

Always order by complete part number
including prefix and suffix, e.g., IUGN3132LLI.
4-29

FUNCTIONAL BLOCK DIAGRAM

OUTPUT
2 GROUND

Dwg. No. FH-005-2

ELECTRICAL CHARACTERISTICS at TA

= +25°C
Limits

Characteristic

Symbol

Supply Voltage

Vee

Test Conditions

Min.

Typ.

Max.

Units

Operating

4.5

-

24

V

145

400

mV

<1.0

10

IlA
mA

VOUT(SAT)

lOUT; 20 mA, B ~ Bop

Output Leakage Current

IOFF

VOUT; 24 V, B ~ B RP

-

Supply Current

lee

Vee; 24 V, B ~ BRP

-

4.3

9.0

Output Rise Time

tr

Vee; 12 V, RL ; 820

20 pF

-

0.04

2.0

!1S

Output Fall Time

tf

Vee; 12 V, RL ;

20 pF

-

0.18

2.0

IlS

Output Saturation Voltage

n, CL ;
820 n, C L ;

MAGNETIC CHARACTERISTICS over operating temperature and voltage range.
Limits
Characteristic

Symbol

Operate Point

Bop

Release Point

Hysteresis

BRP

B hys

Device Type'

Min.

Typ.

Max.

Units

3132

-

32

95

G

3133

-

32

75

G

3132

-95

-20

-

G

3133

-75

-20

G

Both

30

52

-

G

NOTE: As used here, negative flux densities are defined as less than zero (algebraic convention.)
Typical values are at TA = +25°C and Vee = 12 V .
• Complete part number includes a prefix denoting operating temperature range (UGN or UGS) and a suffix denoting package type (LL, LT, U, or UA).

4-30

TYPICAL CHARACTERISTICS

40

-

-+---l

OPERATE POINT

20

40

-

--

~ r-......

Ul
Ul

::::J
c(

Cl
~

I Vee~12V~~
I lOUT =20mA

....
Z
0Il.

:I:

0

....

§

Ul

·20

·40
·50

-

f---- OPERATE POINT
20
Ul
Ul

::::J
c(

Cl
~

TA • 25'C
llOUT =20mA

:I:

~

_~EPOINT

---

·25

25

r-..-.

50

Ul

~

75

.........

~

100

·20
RELEAiE POINT

-40

125

4.0

8.0

16

12

24

20

Owg. No. GH·021

Dwg. No. GH·022

200

6. 0

-... .....

I lOUT =20 m~
175

c(

--- ---

~

w

~
g

150

~

!O:

,/

,/

~
::::J

E
~

5. 0

!iw<
a:
a:

::::J

o

::;
8:

4. 0

::::J

Ul

125

Ul

100
·50

28

SUPPLY VOLTAGE IN VOLTS

AMBIENT TEMPERATURE IN °C

:e

A~

I

....

Z

0Il.

·25

25

50

75

100

125

3. 0
·50

.........

........

B~Bop

I

"""'.........

Vee -12V

" "'""'"

·25

25

f-

...............

50

----~B~
75

:"'--..

..............

100

125

AMBIENT TEMPERATURE IN °C

AMBIENT TEMPERATURE IN °C
Owg. No. GH·024

Dwg. No. GH·023

4-31

SENSOR LOCATIONS
(±o.OOS" [O.13mm] die placement)

SUFFIX""LL" & SUFFIX "LT" "

r -, r

ACTIVE AREA DEPTH

0.035"
0.89 mm

0.088"
2.24 mm

NOM

i

{

0.042"
1.07 mm

r;;r-,

f

""I-"

.9l
1
'-

2

-

3
'--

Dwg. No. MH-008-2A

SUFFIX "U"

r

SUFFIX "UA"

ACTIVE AREA DEPTH

r - r

ACTIVE AREA DEPTH

0.017"
0.43 mm

0.020"
0.51 mm

...,0.091"l
2.31 mm

NOM

~

0.082"
2.10 mm

NOM

0.071"
1.80 mm

" .....
I:>~

1

2

'-

'--

1

-

3

-

0.054"
1.38 mm

.9l
BRANDED
SURFACE

2

'--

3

-

Dwg. No. MH-011-2A

Dwg. No. MH-002-2

4-32

'-'....I

f

.9l
BRANDED
SURFACE

."

HAIL-EFFECT SWITCH
This Hall-effect switch is a highly temperature stable and stressresistant sensor best utilized in applications that provide steep magnetic
slopes and low residual levels of magnetic flux density.
Each device includes a voltage regulator, quadratic Hall voltage
generator, temperature stability circuit, signal amplifier, Schmitt trigger
and open-collector output on a single silicon chip. The on-board regulator
permits operation with supply voltages of 4.5 to 24 volts. The switch
output can sink up to 20 mA. With suitable output pull up, they can be
used directly with bipolar or MOS logic circuits.

1

2

The four package styles available provide a magnetically optimized
package for most applications. Suffix LT is a surface-mount SOT-89
(TO-243AA) package; suffixes LL, U, and UA feature wire leads for
through-hole mounting.

3

Complete technical information for the UGN3140- is included with
the UGN3113-.

o

I-

~

z

:::>

:::>

o0:

I-

11.
11.
(/J

:::>
(!J

11.

:::>

o

Dwg. No. PH-003A

Pinning is shown viewed from branded side.

FEATURES
•
•
•
•
•
•
•
•

4.5 V to 24 V Operation
Activate With Small, Commercially Available Permanent Magnets
Solid-State Reliability ... No Moving Parts
Small Size
Constant Output.Amplitude
Superior Temperature Stability
Resistant to Physical Stress
Directly Replace Series UGN and UGS3040T/U Switch

ABSOLUTE MAXIMUM RATINGS

Supply Voltage, Vcc ............... 25 V
Magnetic Flux Density, i3 ....... Unlimited
Output OFF Voltage, VOUT ........... 25 V
Continuous Output Current, lOUT .... 25 rnA
Operating Temperature Range, TA
Prefix UGN .......... -20°C to +85°C
Prefix UGS ......... -40°C to + 125°C
Storage Temperature Range,
T s ................ -65°C to + 150°C'
• Devices can be stored at +200'C for short
periods of time.

Always order by complete part number, e.g.,

1UGN3140UA I.
4-33

SENSITIVE HAIL-EFFECT SWITCHES
FOB ID.CH-TEMPERATVHE OPERATION
These Hall-effect switches are monolithic integrated circuits with
tighter magnetic specifications and switch points, designed to operate
continuously over extended temperatures to + 150°C, and are more
stable with both temperature and supply
. changes. The high
sensitivity and unipolar switching
these devices
ideal for use with a simple bar or rod
basic devices
(3141,3142, and 3143) are identical
switch pOints.

1

>-'

Q.
Q.

:::J

(f)

2

3

o

I:::J

oa:

I:::J

Z
:::J

CJ

Each device includes a
voltages of 4.5 volts to 24
quadratic Hall-voltage
small-signal amplifier,
sink up to 25 mA.
bipolar or CMOS
for the 3120 and

operation with supply
protection diode,
compensation circuitry,
an open-collector output to
up, they can be used with
3141 is an improved replacement

number suffix determines the device
suffix 'E-' is for the automotive and
of -40°C to +85°C, suffix 'L-' is for the
temperature range of -40°C to +150°C. Four
a magnetically optimized package for most
, is a long-leaded version of suffix '-LT', a
V-"""'f'" transistor package for surface-mount
'-U' is a three-lead plastic mini-SIP while suffix '-UA'
ultra-mini-SIP.

Q.

o

Dwg. PH-003A

Pinning is shown viewed from branded side.

ese devices are currently available for sampling. Production
tities are expected in 1993. Contact the local sales office for
mplete specifications and availability.

FEATURES and BENEFITS

ABSOLUTE MAXIMUM RATINGS
atTA = +25°C

•
•
•
•
•
•
•
•

Superior Temp. Stability for Automotive or Industrial Applications
4.5 V to 24 V Operation ... Needs Only An Unregulated Supply
Open-Collector 25 mA Output ... Compatible with Digital Logic
Reverse Battery Protection
Activate With Small, Commercially Available Permanent Magnets
Solid-State Reliability ... No Moving Parts
Small Size
Resistant to Physical Stress

Supply Voltage, Vee ............... 30 V
Reverse Battery Voltage, VRee ....... -30 V
Magnetic Flux Density, B ....... Unlimited
Output OFF Voltage, VOUT ........... 28 V
Reverse Output Voltage, VOUT ...... -0.5 V
Continuous Output Current, lOUT .... 25 rnA
Operating Temperature Range, TA
Suffix 'E-' ........... -40°C to +85°C
Suffix 'L-' ........... -40°C to +150°C
Storage Temperature Range,
T s . . . . . . . . . . . . . . . . -65°C to + 170°C

Always order by complete part number, e.g.,
4-34

1A3141 ELL I.

HALL-EFFECT LATCHES
These Hall-effect latches are temperature-stable and stressresistant sensors especially suited for electronic commutation in
brush less dc motors using multipole ring magnets. Each device includes a voltage regulator, quadratic Hall voltage generator, temperature compensation circuit, signal amplifier, Schmitt trigger, and an opencollector output on a single silicon chip. The on-board regulator permits
operation with supply voltages of 4.5 to 18 volts. The switch output can
sink 10 mAo With suitable output pull up, they can be used directly with
bipolar or MOS logic circuits.

x

The four package styles available provide a magnetically optimized
package for most applications. Suffix LT is a surface-mount SOT 89
(TO-243AA) package; suffixes LL, U, and UA feature wire leads for
through-hole mounting.

FEATURES
1

~

a..
a..

::J
(f)

2

3

o

I::J

o0:

I::J

Z
::J

CD

a..

!II
III
•
..
..
..
..
•
11\

Symmetrical Response
4.5 V to 18 V Operation
Open-Collector Output
Reverse Battery Protection
Activate With Small, Commercially Available Permanent Magnets
Solid-State Reliability ... No Moving Parts
Small Size
Superior Temperature Stability
Resistant to Physical Stress

o

Dwg. No. PH-003A

Pinning is shown viewed from branded side.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vec ............... 18 V
Reverse Battery Voltage, VRCC . . . . . . -18 V
Magnetic Flux Density, B ...... Unlimited
Output OFF Voltage, VOUT .......... 18 V
Continuous Output Current, lOUT ... 15 mA
Operating Temperature Range,
TA • . . . • . . . • . • . . . • .• -20°C to +85°C
Storage Temperature Range,
Ts. . . . . . . . . . . . . . .. -65°C to +150°C

Always order by complete part number, e.g., 1UGN3175LL I.
See Magnetic Characteristics table for differences between devices.
4-35

FUNCTIONAL BLOCK DIAGRAM

x

OUTPUT
GROUND
Dwg. No. FH·005·2

ELECTRICAL CHARACTERISTICS at TA
(unless otherwise noted).

= +25°C, Vee = 4.5 V to

18 V
Limits

Characteristic

Symbol

Supply Voltage

Vee

Output Saturation Voltage

Test Conditions

VOUT(SAT)

Min.

Typ.

Max.

Units

Operating

4.5

-

18

V

Vee = 18 V, lOUT = 10 mA, B> Bop

-

200

300

mV

Output Leakage Current

IOFF

VOUT=18V,B
'"'"

100

C[

CI

;!;

I

Vcc=14V

....
z

6
11.
:c

g ·100

::=

RELEASE POINT

'"

·200

·30

10

·10

30

70

50

90

AMBIENT TEMPERATURE IN "C
Owg. No. GH-020

SENSOR LOCATIONS
(±O.005" [O.13mm) die placement)
SUiT"1X "LL" & SUiT"1X "LT"

Dwg. No. MH·Q08·1 A

r

Suffix "U"

0.017"
0.43 mm

+-,0.093"
2.36mm

NOM

Suffix "UA"

1

ACTIVE AREA DEPTH

r

ACTIVE AREA DEPTH

~

0.020"
0.51 mm

---

NOM

0.084"
2.13mm

I

0.072"
1.83 mm

I

f
JI.
BRANDED
SURFACE

2

3

-

-

Dwg.No . MH-002·3A

2

I

'~

0.057"
1.45 mm

JI.
BRANDED
SURFACE

I

r

-

3
'-

Owg. No. MH·011A

4-37

HALL-EFFECT LATCHES
FOB HIGH-TEMPERATURE OPERATION
These Hall-effect latches are extremely temperature-stable and
stress-resistant sensors especially suited for operation over extended
temperature ranges to + 150°C. Superior high-temperature performance
is made possible through a novel Schmitt trigger circuit that maintains
operate and release point symmetry by compensating for temperature
changes in the Hall element. Additionally, internal compensation
provides magnetic switch points that become more sensitive with
temperature, hence offsetting the usual degradation of the magnetic
field with temperature. The symmetry capability makes these devices
ideal for use in pulse-counting applications where duty cycle is an
important parameter. The five basic devices (3185 through 3189)
are identical except for magnetic switch points.

><

Each device includes on a single silicon chip a voltage regulator,
quadratic Hall-voltage generator, temperature compensation circuit,
signal amplifier, Schmitt trigger, and a buffered open-collector output to
sink up to 25 mA. The on-board regulator permits operation with supply
voltages of 3.8 to 24 volts.

1

2

3

~

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z
:::)

I-

a..
a..

:::J
Cf)

oa:

<.9

The first character of the part number suffix determines the device
operating temperature range; suffix 'S-' is for -20°C to +85°C, 'E-' is
for -40°C to +85°C, 'K-' is -40°C to + 125°C, and 'L-' is -40°C to + 150°C.
Four package styles provide a magnetically optimized package for most
applications. Suffix '-LL' is a long-leaded version of suffix '-LT', a
miniature SOT-89/TO-243AA transistor package for surface-mount
applications; suffix '-U' is a three-lead plastic mini-SIP while suffix
'-UA' is a three-lead ultra-mini-SIP.

:::)

a..

I-

:::J

o

FEATURES

Dwg. No. PH-003A

Pinning is shown viewed from branded side.

ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
Supply Voltage, Vcc ............... 30 V
Reverse Battery Voltage, V RCC

••••• ,

-30.V

Magnetic Flux Density, B ...... Unlimited

• Symmetrical Switch Points
• Superior Temperature Stability
• Operation From Unregulated Supply
• Open-Collector 25 mA Output
• Reverse Battery Protection
• Activate With Small, Commercially Available Permanent Magnets
• Solid-State Reliability ... No Moving Parts
• Small Size
• Resistant to Physical Stress

Output OFF Voltage, VOUT' ........ , 30 V
Reverse Output Voltage, VOUT ..... -0.5 V
Continuous Output Current, lOUT ... 25 mA
Operating Temperature Range, TA
Suffix'S-' . . . . . . . . . .. -20°C to +85°C
Suffix 'E-' ..... ". . . .. -40°C to +85°C
Suffix 'K-' .......... -40°C to +125°C
Suffix 'L-' .......... -40°C to +150°C
Storage Temperature Range,
Ts' ............... -65°C to +170°C

Always order by complete part number, e.g., IA3185sLLI.
4-38

3185

THRU

3189

HALL-EFFECT LATCHES
FOR HIGH-TEMPERATURE OPERATION
ELECTRICAL CHARACTERISTICS over operating telDperature range, at Vee

= 12 V.

Limits
Characteristic

Symbol

Test Conditions

Min.

Vee

Operating

3.8

Supply Voltage

Typ.

Max.

Units

24

V
mV

-

VOUT(SAT)

lOUT = 20 mA, B > Bop

-

175

400

Output Leakage Current

IOFF

VOUT=24V,B Bop (Output ON)

-

5.7

-

mA

n, CL = 20 pF
RL = 820 n, CL = 20 pF

-

100

-

ns

-

100

-

ns

Output Saturation Voltage

Output Rise Time

tr

Output Fall Time

tf

RL = 820

MAGNETIC CHARACTERISTICS in gauss over operating supply voltage range.
Part Numbers·
A3185

Characteristic
Bop at TA = 25°C
over operating temp range
BRP at TA = 25°C
over operating temp range

Bhy, at TA = 25°C
over operating temp range

Min.

Max.

A3186

Min.

Max.

A3187

Min.

A3188

Max.

Min.

A3189

Max.

Min.

Max.

170

270

70

330

50

150

100

180

50

230

140

300

30

350

50

175

80

200

50

250

-270

-170

-330

-70

-150

-50

-180

-100

-230

-50

-300

-140

-350

-30

-175

-50

-200

-80

-250

-50

340

540

140

660

100

300

200

360

100

460

280

600

100

700

100

350

160

400

100

500

= release point (output turns OFF); Bhy , = hysteresis (Bop - BRP )'
As used here, negative flux densities are defined as less than zero (algebraic convention).
'Complete part number includes a suffix to identify operating temperature range (E, K, L, or S) and package type (LL, LT, U, or UA).

NOTES: Bop = operate point (output turns ON); B RP

FUNCTIONAL BLOCK DIAGRAM

OUTPUT
GROUND

Owg. No. FH-005-3

4-39

3185

THRU

3189

HALL-EFFECT LATCHES
FOR HIGH-TEMPERATURE OPERATION
TYPICAL OPERATING CHARACTERISTICS
A3185" SWITCH POINTS

-

f--

A3187" SWITCH POINTS

,

~

,

OPERATE POINT

~-~

,

--l

OPERATE POIN

rv;-~

0

,

-

RELEASE

porL

,

I--

·'00

"

,

-15 50

AMBIENT TEMPERATURE IN °C

AMBIENT TEMPERATURE IN'C

Dwg. No. GH-026

f--

'E

.,

§

-- -

v~~~

;!;

w,,'"

~
z

~ ,
~

,

,
AMBIENT TEMPERATURE IN"C

E

~

6

U
>

•

~

;;:

,

5

,
,,

a ~ B FlP

,

B~Bop

Bs-B RP

,

~

,

SUPPLY VOLTAGE IN VOLTS

~

,
\

,
SUPPLY VOLTAGE IN VOL T5

Dwg. No. GH-030

• Complete part number includes a suffix denoting operating temperature range (E, K, L, or S) and package type (LL, LT, U, or UA).

4-40

Dwg. No. GH-028

OPERATE POINT

,

,

.........

AMBIENT TEMPERATURE IN"C

,

,

z

$-.'t==:.
- -r- --

-

Owg. No. GH-029

SUPPLY CURRENT

.

'- ...........

,'-

10

,

Owg. No. GH-027

SUPPLY CURRENT

OUTPUT SATURATION VOLTAGE

,

-

RELEASE pOllT

r--

Dwg. No. GH-037

3185

THRU

3189

HALL-EFFECT LATCHES
FOR HIGH-TEMPERATURE OPERATION
OPERATION

SENSOR LOCATIONS
(±0.005 [0.13 mml die placement)

SUWIX "LL" and "LT"

In operation, the output transistor is OFF until the strength of the
magnetic field perpendicular to the surface of the chip exceeds the
threshold or operate point (Bop). When the field strength exceeds
Bop, the output transistor switches ON and is capable of sinking
25 mA of current
The output transistor switches OFF when magnetic field reversal
results in a magnetic flux density below the OFF threshold (B RP ). This
is illustrated in the transfer characteristics graph (A3187* shown).
Note that the device latches; that is, a south pole of sufficient
strength will turn the device ON. Removal of the south pole will leave
the device ON. The presence of a north pole of sufficient strength is
required to turn the device OFF.

Dwg. No. MH-008-4A

TYPICAL TRANSFER CHARACTERISTICS

r

SUWIX

"U"

20

ACTIVE AREA DEPTH
O.017"
0.43mm
NOM

1+.-,o092"l
2.32 mm

-*-0.077"
1.96 mm

f

I "ce l2V I
<.:>

""oco
>

OFF t
10

I

I
I

:

Jl
BRANDED
SURFACE

2

1

3

~

Dwg. No. MH-002-7A

I

! OPERATE
I POINT

i

!I

I

:I

RELEASE I
JON
POINT
o
-250
-125
125
250
North Pole
South Pole
MAGNETIC FLUX DENSITY IN GAUSS
Dwg.No.A-11,739

r

Suffix "UA"

ACTIVE AREA DEPTH
0.020'
0.51 mm

0.082"
2.10 mm

-to

NOM

r

t

The simplest form of magnet that will operate these devices
is a ring magnet, as shown in the figure. Other methods of operation
are possible.

0.061"
1.55mm

t

Jl
BRANDED
SURFACE

1

2

3

'Dwg. No. MH-011-4A

Although sensor location is accurate to
three sigma for a particular design, product
improvements may result in small changes to
sensor location.

Dwg. No. A-11,899

4-41

DUAL-OUTPUT
HALL-EFFECT SWITCH
TypeUGN3235K Hall-effect sensors are bipolar integrated circuits
designed for commutation of brushlessdc motors, and other rotary
encoding applications using multi-pole ring magnets. The device
features two outputs which are independently activated by magnetic
fields of opposite polarity.
Each sensor IC includes a Hall voltage generator, two Schmitt
triggers, a voltage regulator, output transistors, and on-board reverse
polarity protection. The regulator enables these devices to operate from
voltages ranging between 4.5 V and 24 V. On-chip compensation
circuitry stabilizes the switch points over temperature.

1

2

3

>-

~

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f::J

::J

f::J

c..
c..

(/)

c..

a

Each open-collector output is independently operated by the proper
amount and polarity of incident magnetic flux. Output 1 responds only
to the positive flux from the south pole of a magnet, Output 2 to the
negative flux from the north pole of a magnet. When the sensor experiences the field of a south magnetic pole greater than the maximum
operate point of Output 1, that output switches to the LOW state and
Output 2 is unaffected. When the incident flux falls below the minimum
release point for Output 1, that output returns to the HIGH state and
Output 2 remains unchanged.

4

C\J

c..

0
Z
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a

C!)

f::J

aa:

Dwg. PH-QO?

Pinning is shown viewed from branded side.

Output 2 independently responds in the same manner to the
negative flux from the north magnetic pole of a magnet. Figure 1 shows
a zone in the region of 0 G, tH , where both outputs are in the HIGH or
OFF state. This constitutes a delay that is independent of rate of
change of the incident magnetic field and ensures that both outputs
are never ON simultaneously. This is an essential feature for driving
brushless dc motors with a minimum of reactive transient currents.
The UGN3235K is supplied in a four-pin plastic single in-line
package (SIP) measuring just 0.205" wide x 0.135" high x 0.060" thick
(5.2 x 3.4 x 1.55 mm).

FEATURES

ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
Power Supply, V cc ................ 25 V

Reverse Battery Voltage, VRCC

•••••.

-30 V

Magnetic Flux Density, B ....... Unlimited
Output OFF Voltage, VOUT .......... 25 V

• Reliable and Rugged Magnetic Sensing Switch
• Two Outputs Independently Switched by North and South Poles
• Independent Actuation of Outputs Minimizes Inductive-Load
Reactive Transient
• Built-in Hysteresis Minimizes Interference from Stray Fields
• Operates from 4.5 V to 24 V
• Outputs Compatible with All Logic Levels
• On-Board Reverse Polarity Protection
• Open-Collector, Active-Low Outputs

Output ON Current, lOUT .......... 50 mA
Operating Temperature Range,

TA • • • • . . • • • • • • . • • • • -20°C to + 85°C
Storage Temperature Range
Ts ................ -65°C to +150°C

Always order by complete part number:
4-42

IUGN3235K I

FUNCTIONAL BLOCK DIAGRAM

2 OUTPUT1

3

OUTPUT2

4

GROUND

Dwg. FH-003A

ELECTRICAL CHARACTERISTICS at TA = +25°C (unless otherwise noted).
Characteristic

Symbol

Supply Voltage

Vee

Output Saturation Voltage

VOUT(SAT)

Test Conditions

Min.

Typ.

Max.

Units

4.5

-

24

V

Vee; 24 V, lOUT; 20 mA

-

160

400

mV

Output Leakage Current

10FF

VOUT ; 24 V, Vee; 24 V

-

-

1.0

J.lA

Supply Current

lee

Vee; 24 V, Output Open

-

6.0

8.0

mA

-

0.04

0.4

~s

0.18

0.4

~s

n, CL ;
820 n, C L ;

Output Rise Time

tf

Vee; 14 V, RL ; 820

20 pF

Output Fall Time

tf

Vee; 14 V, RL ;

20 pF

MAGNETIC CHARACTERISTICS at Vee = 4.5 V to 24 V
Characteristic

Operate Point, Bop

Test Conditions

TA ; +25°C

Output

01
02

TA; -20°C to +85°C

01
02

Release Point, BRP

T A ; +25°C

01
02

T A ; -20°C to +85°C

01
02

Hysteresis, Bhys

Min.

Max.

Units

50
-175

175
-50

G

35
-200

200
-35

G
G

25
-160

160
-25

G

15
-190

190
-15

G

G

G

G

T A ; +25°C

01 &02

15

100

G

T A; -20°C to +85°C

01 &02

15

110

G

4-43

OUTPUT SWITCHING CHARACTERISTICS
SOUTH

Va::;

r ".
I
I
I

I
II
II

I
II
II

TIME

I
II
II

I

I
I

I
I

R3
20mALIMIT

--LrNLJ::

NORTH

1 I~

4,5 V TO 24 V

I

I

I

2
3

GND

a2~

4

SIGNAL OUT

UGN3235

TIME

FIGURE2A

FIGURE I

MOTOR COIL DRIVER

r------1'----------r----_----,.--_>----loII...- - - - Q ~~~to 24V
R3
lk

Cl ,lut
MINIMUM
VALUE
DECOUPLE
Ul

VCC

L2
WINDING 2

Q

UGN 3235
GND

MOTOR COILS

Q

20mALiMIT
4

FIGURE 2B

SWITCH POINTS
VERSUS TEMPERATURE

-

140
120
100

§:
X
::l
....I

U.

9

IW
Z



I-

:::>
D-

I-

:::>

o

JI.
_ _ _ _ .1 __ ~RP(Q2)

B RP (Ql)

BRANDED
SURFACE

VOUT(SAT)

1

2

3

4

'-

'-

.8

·8

'-

MAGNETIC FLUX
Dwg. GH-043

Dwg. MH-001-1A

GUIDE TO INSTALLATION
<.)

280

o

~

260

ti!

240

~

~

220

a: 200
w
Cl..

::2

w

I-

a:

W

o

...J

oCf)

o
TIME IN SOLDER BATH IN SECONDS

Dwg. No. A-12.062

1. All Hall effect integrated circuits are susceptible to mechanical stress effects.
Caution should be exercised to minimize the application of stress to the leads
or the epoxy package. Use of epoxy glue is recommended. Other types may
deform the epoxy package.
2. To prevent permanent damage to the Hall cell, heat-sink the leads during hand
soldering. Recommended maximum conditions for wave soldering are shown in
the graph above.

4-45

COMPLEMENTAR~OUTPUT

HALL-EFFECT LATCH
Type UGN3275K latching Hall-effect sensors are bipolar integrated
circuits designed for electronic commutation of brush less dc motors.
They feature dual complementary outputs. The latches are typically
used to sense matched magnetic flux densities of alternating polarity
from multi pole ring magnets.
Each sensor IC includes a Hall voltage generator, operational
amplifier, Schmitt trigger, voltage regulator, and dual bipolar output
transistors. The regulator allows use of the integrated circuit with supply
voltages of 4.5 V to 24 V.

2

3

f-

II

:::J
11.

f:::J

o

4

D
Z

:::J

oa:

CJ

Dwg. No. PH·Q02

Pinning is shown viewed from branded side.

If the Hall cell is exposed to a magnetic flux density greater
than the operate threshold (B ), OUTPUT goes low (turns ON) and
OUTPUT goes high (turns OFF). The outputs will hold (latch) this state
until magnetic field reversal exposes the Hall cell to a magnetic flux
density below the release threshold (BJiP) when OUTPUT will go high
(OFF) and OUTPUT will go low (ON). I his state is also latched. Under
any condition one output is ON while the other is OFF. Because the
operating state switches only with magnetic field reversal, and not
merely with a change in the strength, these integrated circuits qualify
as true Hall-effect latches.
Similar devices with a 500 mA continuous output current rating are
available as the UGN5275K.
These complementary-output Hall-effect latches are supplied in a
four-pin plastic SIP, 0.200" (5.08 mm) wide, 0.130" (3.3 mm) high, and
0.060" (1.54 mm) thick.

FEATURES
•
•
•
•
•
•
•

Operable with Multipole Ring Magnets
High Reliability
Small Size
Output Compatible with All Digital Logic Families
4.5 V to 24 V Operation
High Hysteresis Level Minimizes Stray-Field Problems
Complementary Outputs

ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee' ............... 25 V
Magnetic Flux Density, B ....... Unlimited
Output OFF Voltage, VOUT .......... 25 V
Output ON Current, lOUT .......... 50 mA
Operating Temperature Range,
T A' . . . . . . . . . . . . . . . . -20°C to +85°C
Storage Temperature Range,
Ts' ............... -65°C to +150°C

Always order by complete part number:
4·46

1UGN3275K I.

SENSOR LOCATION

r

ACTIVE AREA DEPTH

~ 2.40
0.094"
mm

O.01 7"

a.43mm
NOM

FUNCTIONAL BLOCK DIAGRAM

1

~
0.047"
1.19mm

OUTPUT

f
51.
BRANDED
SURFACE

OUTPUT
I

2

'-

3
'-

GROUND

4

-

Dwg. No. FH-002
Dwg. No. MH-001-2

ELECTRICAL CHARACTERISTICS at T A = +25°C, Vee = 4.5 V to 24 V
(unless otherwise noted).
Characteristic
Supply Voltage
Output Saturation Voltage

Symbol
Vcc
VOUT(SAT)

Output Leakage Current

IOFF

Supply Current

lee

Output Rise Time

tr

Output Fall Time

tf

Test Conditions

Min.

Typ.

Max.

Units

Operating

4.5

-

24

V

= 4.5 V, lOUT = 20 mA, B> Bop
VOUT = 24 V, Vee = 24 V, B < B RP
Vee = 24 V, B < B RP
Vee = 12 V, RL = 820 £I, CL = 20 pF
Vee = 12 V, RL = 820 £I, CL = 20 pF

-

-

400

mV

-

-

10

flA

-

-

7.0

mA

Vee

-

0.04

0.4

Ils

-

0.18

0.4

Ils

MAGNETIC CHARACTERISTICS
TA

T A = -20°C to +85°C

= +25°C

Characteristic

Symbol

Min.

Max.

Min.

Max.

Units

Operate Point

Bop

25

250

15

250

G

Release Point

BRP

-250

-25

-250

-15

G

Hysteresis

Bhj's

100

-

100

-

G

NOTE: As used here, negative flux densities are defined as less than zero (algebraic convention).

4-47

LINEAR OUTPUT
HALL EFFECT SENSORS
Utilizing the Hall effect for sensing a magnetic field, UGN3501U and
UGN3501 UA integrated circuits provide a linear single-ended output
that is a function of magnetic field intensity.
These devices can sense relatively small changes in a magnetic
field - changes that are too small to operate a Hall effect switch. They
can be capacitively coupled to an amplifier, to boost the output to a
higher level.
The UGN3501U/UA include a Hall cell, linear amplifier, emitterfollower output, and a voltage regulator. Integrating the Hall cell and the
amplifier into one monolithic device minimizes problems related to the
handling of millivolt analog signals.
1

~

Il.
Il.

::J

(J)

2

3

Cl
Z

::J

oOC

::J

::J
(!J

Both devices are rated for continuous operation over the temperature range of O°C to +70°C and over a supply voltage range of 8V t012 V.

FEATURES

f-

Il.
f-

o

Dwg. No. PH-D06

•
•
•
•

Excellent Sensitivity
Flat Response to 25 kHz (typ.)
Internal Voltage Regulation
Excellent Temperature Stability

Pinning is shown viewed from branded side.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee' .............. 16 V
Output Current, lOUT ............ " 4 rnA
Magnetic Flux Density, B ....... Unlimited
Operating Temperature Range,
TA

.•••....••.••.••..

O°C to +70°C

Storage Temperature Range,
Ts ............... -65°Cto+150°C

4-48

Always order by complete part number:

Part Number

Package

UGN3501U

3-Pin Mini-SIP

UGN3501UA

3-Pin Ultra-Mini-SIP

FUNCTIONAL BLOCK DIAGRAM

OUTPUT

GROUND

Owg. No. FH-006

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = 12 V
Limits
Characteristic
Operating Voltage
Supply Current
Quiescent Output Voltage
Sensitivity
Frequency Response
Broadband Output Noise
Output Resistance

Symbol

Test Conditions

B.O

Vee
Icc
VOUT

Min.

Typ.

-

Max.

Units

12

V

Vcc=12V

-

10

20

mA

B = 0 G. Note 1

2.5

3.6

5.0

V

B = 1000 G. Notes 1. 2

0.35

0.7

-

mV/G

BW

fH . fL at . 3 dB

-

25

-

kHz

en

f = 10Hz to 10kHz

-

0.1

-

mV

-

100

-

Q

/l,.VOUT

ROUT

NOTE 1. All output voltage measurements are made with a voltmeter having an input impedance of 10 kQ or greater.
NOTE 2. Magnetic flux density is measured at the most sensitive area of the device. which is 0.017" (0.43 mm) below the branded side of the "U"
package; 0.020" (0.51 mm) below the branded side of the "UA" package.

4·49

NORMALIZED SENSITIVITY
AS A FUNCTION OF TEMPERATURE

NORMALIZED SENSITIVITY
AS A FUNCTION OF Vee
1.0

.95

/
V

.90

~

V
./

io"""

V

0> "

!

___ ; __

......... 1'-.

I

iJ
I'

:

0.95

= 1000 GAUS~

V

'l =

'I'"

!

I

i I I
i

..... 1'-.1

_~ __

f--t-+--t--t--+--+-+---1-t--t--tI'-.---1.......
---'''''''':I--I

TA ·2SoC

I

I---

I-+--+--t-I--+-~ 1--1-- .. -+_-+-+vcc ="

v

_

B" 1000 GAUSS

Rl = 10 k....

10
Vee (VOLTS)

8

"

11

o. 90 L...-.L.-.....L.--'--...l.--:L--L.........L-.L.--'---.J,:-.L---'I---'I---'I~
o
25
50
75

Owg. No. A·1o.s22

Dwg. No. A·10.521

OUTPUT VOLTAGE AS A FUNCTION
OF MAGNETIC FLUX DENSITY
+5.6

OUTPUT VOLTAGE
AS A FUNCTION OF AIR GAP
·4 0

./

./
./
./

+3,6

+2.6

~

.....---

I,odi ooo
Generol
5R8522

/"

~--EJ-f-

1

\

Vee" 12V

TA '" 25O (
Rl'" 10. k.r..

·3 8

,/

6

~ 0

THE BRANDED SIDE CF THE
PACKAGE'I

3000

2000

1000

1000

I
2000

3000

NORTH POLE

SOUTH POLE

MAGNETIC FLUX DENSITY (GAUSSI

-3.6

o

...L

2128]

\,

NOTE; NORTH POLE IS wlTH
THE NORTH POLE FACING

.10

-

-c.jJ87l--

'"

1

~

.20

AIR GAP 0, (I NCHES)

Owg. No. A·10.523

4-50

I

'"'k::-1L~~l~--t-+I-+L-+:-+-i

I.OOt--t--t--t........
-t........

B

Lilj

I

"j--..I'-.'
I--+-+--+-+-I--+i-l- t".....

/

•85

.,....,- ~

-

,3D

Vee

~

TA

25°::

'"

12'./

Rl = IOk{'l

I
.50

Owg. No. A·10.519

NOISE SPECTRAL DENSITY
AS A FUNCTION OF FREQUENCY

12

~,o
'-..

~

8

'"

6

>

Z

I

l\\

IIIII
~

Vee
12 V
TA ~ 25°C

,
"

w

'"is
Z

I

i'-.

2

1"'- ..

o
100

10

...
10,000

1000
FREQUENCY, Hz

Dwg. No. A·10,520A

TYPICAL APPLICATIONS
SENSITIVE PROXIMITY DETECTOR

FERROUS

~

tffN dVo~lOmV

FERROUS METAL SENSOR

Q.

D= 0.250'

LOBE OR COG SENSOR

NOTCH OR HOLE SENSOR

For reference only - an Alnico VIII permanent magnet, 0.212" (5.38 mm) in diameter and 0.187" (4.75 mm) long is approximately 800 gauss at the
surface. A samarium cobalt permanent magnet, 0,100" (2.54 mm) square and 0.040" (1.02 mm) thick is approximately 1200 gauss at its surface.

4-51

HATIOMETRlC~

LINEAR

HALL EFFECT SENSORS
Type UGN3503U and UGN3503UA Hall effect sensors accurately
track extremely small changes in magnetic flux density-changes
generally too small to operate Hall effect switches.
As motion detectors, gear tooth sensors, and proximity detectors,
they are magnetically driven mirrors of mechanical events. As sensitive
monitors of electromagnets, they can effectively measure a system's
performance with negligible system loading while providing isolation
from contaminated and electrically noisy environments.

x

Each Hall effect integrated circuit includes a Hall sensing element,
linear amplifier, and emitter-follower output stage. Problems associated
with handling tiny analog signals are minimized by having the Hall cell
and amplifier on a single chip.
The UGN3503U and UGN3503UA are rated for continuous operation over the temperature range of -20°C to +85°C.

1

2

3

~
a.
a.

Cl

I-

FEATURES

~

en

Z

~

oa:

(!)

~

a.

I~

o

•
•
•
•
•

Extremely Sensitive
Flat Response to 23 kHz
Low-Noise Output
4.5 V to 6 V Operation
Magnetically Optimized Package

Dwg. No. PH-OOG

Pinning is shown viewed from branded side.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vcc ................ 8 V
Magnetic Flux Density, B ...... Unlimited
Operating Temperature Range,
TA . • • • • • • . • . . • . . . • • -20°C to +85°C
Storage Temperature Range,
Ts. . . . . . . . . . . . . . .. -65°C to +150°C

4-52

Always order by complete part number:
Part Number

Package

UGN3503U

3-Pin Mini-SIP

UGN3503UA

3-Pin Ultra-Mini-SIP

FUNCTIONAL BLOCK DIAGRAM

Vee

x

OUTPUT

GROUND

Dwg. No FH-007

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = 5 V
Characteristic
Operating Voltage
Supply Current
Quiescent Output Voltage
Sensitivity
Bandwidth (·3 dB)
Broadband Output Noise
Output Resistance

Symbol

Test Conditions

Vee

AV OUT

ROUT

Max.

Units

-

6.0

V
mA

-

9.0

14

2.25

2.50

2.75

V

B = 0 G to ±900 G

0.75

1.30

1.72

mV/G

BW
Vau!

Typ.

4.5

B=OG

Icc
V OUT

Min.

BW = 10Hz to 10kHz

-

23

-

kHz

-

90

-

l·tV

-

50

-

n

All output·voltage measurements are made with a voltmeter having an input impedance of at least 10 kQ.
Magnetic flux density is measured at most sensitive area of device located 0.016" (0.41 mm) below the branded face of the 'U' package; 0.020"
(0.51 mm) below the branded face of the "UA" package.

4·53

OUTPUT NOISE AS A
FUNCTION OF FREQUENCY

OUTPUT VOLTAGE AS A
FUNCTION OF TEMPERATURE
.0

0

I

J

.5
B

Vee = 5V

+5OOG

J-

~

1I

8. 0

Vee = +5V
TA = +15°C

~

~ 6. 0 \

3. 0

\ ~II

;::
B = OG
2. 5

~

2. 0

o

I

4. 0

\,

=>
=>

B

5

40

0

2. 0

""""--

-5OOG

+25
+85
AMBIENT TEMPERATURE IN uC

0

+125

100
FREQUENCY IN Hz

10

-

10K

lK

Dwg. No. A-12,S05

Dwg. No. A-12,573

SUPPLY CURRENT AS A
FUNCTION OF SUPPLY VOLTAGE

DEVICE SENSITIVITY AS A
FUNCTION OF SUPPLY VOLTAGE
2. 5

2

I 8 = OG

I

--------

«

E

;::

I

0

r

0 ____

8. 0

7. 0

I

I 'A = +25°C I

4.5

5.0

5,5

SUPPLY VOLTAGE IN VOLTS

6.0

"

:;

2. 0

E

z
;:: 1. 5

";:>
in
Z
~

1. 0

~
~
~

O. 5

I

----

0
4.5

~

--

I

6.0

5.5
5.0
SUPPLY VOLTAGE IN VOLTS

Dwg. No. A-12,506

OUTPUT NULL VOLTAGE AS A
FUNCTION OF SUPPLY VOLTAGE

TA = +25"(

Dwg. No. A-12,507

LINEARITY AND SYMMETRY AS A
FUNCTION OF SUPPLY VOLTAGE
100

5. 0

1

4. 0

B=OG

TA = +25°C

~

~
8= -~

8

3. 0

I"""

-

OUTPUT SYMMETRY
9~,ow.NUl

2. 0

7

0

6

B:= +
~

-------

t-"

'A = +25"C

0
4.5

5.0

5.5

60

SUPPLY VOlTAGE IN VOlTS

Dwg. No. A-12,508

4-54

5

4.5

5.0
5.5
SUPPLY VOLTAGE IN VOLTS

J
6.0

Dwg. No .. A-12,509

OPERATION
NOTCH SENSOR

The output null voltage (8 = 0 G) is nominally one-half the supply
voltage. A south magnetic pole, presented to the branded face of the
Hall effect sensor will drive the output higher than the null voltage level.
A north magnetic pole will drive the output below the null level.
In operation, instantaneous and proportional output-voltage levels
are dependent on magnetic flux density at the most sensitive area of
the device. Greatest sensitivity is obtained with a supply voltage of 6 V,
but at the cost of increased supply current and a slight loss of output
symmetry. The sensor's output is usually capacitively coupled to an
amplifier that boosts the output above the millivolt level.
In two applications shown, a permanent bias magnet is attached
with epoxy glue to the back of the epoxy package. The presence of
ferrous material at the face of the package acts as a flux concentrator.

Dwg. No.

A~12,574

GEAR TOOTH SENSOR

The south pole of a magnet is attached to the back of the package
if the Hall effect IC is to sense the presence of ferrous material. The
north pole of a magnet is attached to the back surface if the integrated
circuit is to sense the absence of ferrous matrial.
Calibrated linear Hall devices, which can be used to determine the
actual flux density presented to the sensor in a particular application,
are available.

SENSOR LOCATIONS

r

SUFFIX "U"

ACTIVE AREA DEPTH
O.016"
0.41 mm
NOM

0.073"
1.85mm

Dwg. No. A-12,S12

CURRENT MONITOR

Dwg. No. MH·002-SA

SUFFIX "UA"

r

ACTIVE AREA DEPTH
O,020"
0.51 mm
NOM

BRANDED
SURFACE

'"
Dwg. No. A-12.513

Dwg. No. MH-011-3A

4-55

RATIOMETHlC~

LINEAR HALL-EFFECT SENSORS
FOR HIGH-TEMPERATURE OPERATION
The A3506- and A3507- linear Hall-effect sensors provide an
output voltage that is proportional to the incident magnetic field.
On-chip processing circuitry provides the user with an amplified
low-impedance output signal that minimizes the need for external
circuitry. Internal temperature compensati circuitry lowers the
intrinsic sensitivity drift of the Hall
lowing it to accurately
operate continuously over
re ranges to + 150°C.
These highly sensitive,
etic transducers are
ideal for use in linear and rotary
in the harsh
environments of automotive and i
The two
where the
devices are identical except for
A3506- is the more precise
.

2

3

o

l-

z

=:)

oa:

(!J

a quadratic Hall element,
, a small-signal amplifier,
normally associated with
by having the Hall element and
preciSion is obtained by internal gain
the manufacturing process.

=:)
(L

l-

=:)

o

Dwg. PH-OOS

in a 3-pin ultra-mini-SIP UA package
+85°C (suffix 'SUA') or -40°C to + 150°C
currently available for sampling. Production
in 1993. Contact the local sales office for
and availability.

Pinning is shown viewed from branded side.

Proportional to Incident Magnetic Field
Rail-to-Rail Output
Sensitivity
Temperature Stability
V to 5.5 V Operation
Small Package Size
• Solid-State Reliability

Supply Voltage, Vee .............. 8.0 V
Output Voltage, Vo ............... 8.0 V
Output Sink Current, 10 . . . . . . . . . . . 10 mA
Magnetic Flux Density, B ...... Unlimited
Operating Temperature Range, TA
Suffix 'S-' . . . . . . . . . .. -20°C to +85°C
Suffix'L-' .......... -40°C to +150°C
Storage Temperature Range,
T s . . . . . . . . . . . . . . .. -65°C to +170°C

Always order by complete part number, e.g.,
4-56

I A3506LUA I

POWER HALCMSENSORIDRIVER
FOR BRUSHLESS DC MOTORS

PWM /10 ADJUST

Requiring a minimum of external components, the UDN3625M and
UDN3626M are monolithic ICs that provide single-chip control and
direct drive solutions for many small, single-phase, unipolar brush less
dc motor applications. Integrated into the ICs are a high-sensitivity Halleffect sensor, control and commutating logic, a stable voltage regulator,
extensive self and system protective functions, and two high-current
saturated NPN outputs. Both ICs include thermal shutdown, output
over-current limiting, and output transient protection/flyback diodes.
The UDN3625M is nominally for 12 V motor applications while the
UDN3626M is better suited to 24 V motors.

I

INTERNAL
CONNECTION
INTERNAL
CONNECTION

Dwg. No. PP-012

Output over-current limiting (relating to startup surge or a locked
rotor condition) and short-circuit protection are provided by an internal
current-sense resistor. The maximum (default) output load current is
typically 1.3 A for the UDN3625M or 600 mA for the UDN3626M, but
may be decreased by user selection of an external low-wattage resistor.
A separate lOW-level output provides tachometer capability for
motor speed control or sensing a locked rotor condition. With appropriate external logic, pulse-width modulated (PWM) speed control can be
accomplished at the output current adjust pin.
These sensor/drivers are supplied in an 8-pin mini-DIP plastic
package with a copper leadframe for increased package power
handling capability.

FlEATURlES
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee' .......... See Table
Output Current, 10 . • . • • . • . . • • . See Table
PWM Current Control Voltage,
VADJ ............. See Applications
Magnetic Flux Density, B ....... Unlimited
Package Power Dissipation,
PD' ................... See Graph
Operating Temperature Range,
T A • . . . . • • . . • . . • . • • . -20°C to +85°C
Storage Temperature Range,
Ts ................ -65°C to +150°C

VCC(MAX)
10(CONT)
10(PEAK)

UDN3625M

UDN3626M

14 V
1.0 A
1.6 A

26 V
0.45 A
0.75 A

Output current rating will be limited by ambient
temperature, supply voltage, and duty cycle.
Under any set of conditions, do not exceed a
junction temperature of +150°C.

l1JI 900 mA/12 V or 400 mA /24 V Operation
EI Speed-Control (PWM) Capability
(J]

Locked-Rotor Indication

till Minimum External Components

Ia Over-Current Protected
IlIl Thermal Protection
iii Enhanced Reliability

• Reduced Cost

Always order by complete part number, e.g.,1 UDN3625M
See Maximum Ratings at left.

I.
4-57

FUNCTIONAL BLOCK DIAGRAM
SUPPLY

Vs
1

r---------------------------------~~--------------_{.5 -------~

1

OUTs
..............._ - - - - - - ( 4 .----/------------{6

:

\..AAAr-,

01

-~-I

OUTA
1
1

~--{I:l)--'VV'v_-1

TACH

OUT

7
1

GROUND

1

PWM/I O 1

ADJUST ~

~RADJ
....!..

Dwg. FP-OOS-1

TRUTH TABLE

~ 2.5.---.-----,----.----,----,

;;:

Mag. Field

~ 2.0/--~.----/----j----t---t----t

....

<1:
enrn
is 1.5p...;::--I--30H---j----t----j
II:

w

~
Il.
w

1.01---1---"~----""od---+---I

~

o

«

Il.

w
....
II>

O.5/----I---j---j--""'...,-:o",r.----j

~

~ ~L5---5~O--~75---1~O-O--1~25--~150
«
AMBIENT TEMPERATURE IN ·C
Dwg. GP·009·'

4-58

> +Bop
> -Bop
Any

PWMlloAOJ

QUTA

QUTB

Open
Open
<0.3 V

Low
High
High

High
Low
High

3625 AND 3626
POWERHALV SENSORIDRIVER FOR BRUSHLESS DC MOTORS
M

ELECTRICAL CHARACTERISTICS at TA
Range (unless otherwise noted).

= +25°C, RADJ =00, Over Operating Voltage
Limits

Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

UDN3625M
Operating Voltage Range
Output Leakage Current
Output Breakdown Voltage
Output Saturation Voltage

Output Current Limit

Vs

10

Vcc =Vo =24 V

6.5

12

14

V

-

-

100

itA

V(BR)CEX

Vcc =24 V,lo= 10 mA-

34

-

V

VO(SAT)

10 = 450 mA, Vs = 6.5 V

-

0.25

0.4

V

10 = 900 mA, Vs = 12 V

-

0.5

0.8

V

RADJ =~, Vo = 2 V

1.0

1.3

1.6

A

11

12

13

V

loMAX

Output Clamp Voltage
(Test Fig. 1)

VCl

ICl = 10 mA, Vcc = 0
ICl = 450 mAt, Vcc = 0

13

14

15

V

Output Switching Time

tplH

50% V ADJ to Vo = 3.0 V, 10 = 450 mA

-

-

5.0

its

Supply Current
(Test Fig. 2)

Icc

RAOJ =~, Vs = 14 V, One Output ON

-

30

38

mA

n, Vs = 14 V, Outputs OFF

-

8.0

10

mA

RADJ = 0

UDN3626M
Operating Voltage Range

Vs

Ouiput Leakage Current

10

:j:

24

26

V

Vcc=Vo=30V

-

-

100

itA

-

-

V

0.15

0.3

V

0.3

0.5

V

450

600

750

mA

ICl = 10 mA, Vcc = 0

17

18

20

V

ICl = 250 mAt, Vcc = 0

19

20

22

V

-

-

5.0

its

24

mA

8.0

10

mA

Output Breakdown Voltage

V(BR)CEX

Vcc = 30 V,lo = 10 mA-

50

Output Saturation Voltage

VO(SAT)

10 = 250 mA, V s = 6.5 V

-

10 = 400 mA, V s = 24 V
Output Current Limit

loMAX

RADJ=~' Vo=2V

Output Clamp Voltage
(Test Fig. 1)

VCl

Output Switching Time

tplH

50% VADJ to Vo = 3.0 V, 10 = 250 mA

Icc

RADJ = ~, V s = 26 V, One Output ON

Supply Current
(Test Fig. 2)

RADJ = 0 n, Vs = 26 V, Outputs OFF

- 10 is almost entirely Zener clamp current.
t Pulse test.
Dependent on value of external series Zener diode (see Applications), 6.5 V without a Zener diode.

Continued next page ...

*

4·59

3625

AND

3626

POWERHALV SENSORIDRIVER FOR BRUSHLESS DC MOTORS
M

ELECTRICAL CHARACTERISTICS continued
Limits
Characteristic

Test Conditions

Symbol

Min.

Typ.

Max.

-

±100

±150

-

200

1

Units

Both

Operate Point§

Bop

Hysteresis

BH

Output Current Limit Ratio

RADJ = 39 kn

Idlo MAX

PWM Control Current

Tach Output Sat. Voltage

-

-350

-500

j.LA

-

10

!lA

0.2

0.4

V

165

-

°C

10

-

°C

VADJ = 0

-

IT

VT = 14 V

VT(SAT)

IT = 750 j.LA

-

TJ

Thermal Hysteresis

.1TJ

-

-

0.25

RADJ = 10 kn

Thermal Shutdown

G
G

-

0.50

IADJ

Tach Output Leak. Current

0.75

-

RADJ = 17 kn

-

§ Magnetic flux density is measured at most sensitive area of device, nominally located 0.055" (1.40 mm) below the top of the package.

OUTPUT CLAMP VOLTAGE TEST

SUPPLY CURRENT TEST

(ONE OUTPUT TESTED AT A TIME)

+v

~

Dwg. EP-012

TEST FIG. I

4-60

Dwg. EP-013

TEST FIG. 2

3625 AND 3626
POWERHALVM SENSORIDRIVER FOR BRUSHLESS DC MOTORS

SENSOR LOCATION

APPLICATIONS INFORMATION
Power Dissipation. Care should be taken in evaluating the package
power dissipation of these devices. Total power dissipated by the
device will consist of power due to the internal regulator, logic and drive
circuitry (Icc x Vcc), power due to the output drivers (10 x VO(SAT))' and
power due to the clamp circuitry (lCl x VCl x duty cycle).
For example:

.:=£

-'!111111"'___

Icc x Vee = 38 mA (max) x 14 V =
0.055" (1.40 mm) NOM.

Dwg.MP·002

10 x VO(SAT) = 450 mA x 0.4 V (max) =

532 mW (max)
180mW(max)

lel x Vel x duty cycle = 450 mA x 15 V (max) x 1% =

67.5 mW (max)

Total package power dissipation

= 779.5 mW (max)

Some of the power dissipated by the device (lee X Vee) can be
reduced by inserting a Zener diode in the supply line (ZA In the figure).
Note that the voltage at the Vee pin under worst-case conditions must
be greater than the minimum operating voltage (6.5 V).
Transient Protection. A note of caution concerns negative (below
ground) excursions of the outputs. In application, the coupling of the
two motor windings can provide for just such a case. Reducing the
coupling between windings will help, but ground clamp diodes or diodes
in series with the motor windings might be required (De or Os in the
figure). Most small brushless motors will not require these diodes.
System requirements usually utilize a diode type of reversepolarity protection. If series diode protection is used with an inductive
load (the usual fan application), a Zener clamp between Vs and ground
(Zs in the figure) is required. The Zener voltage must be greater than
the supply voltage but less than the rated maximum allowable supply
voltage.
With diode reverse-polarity protection, a high-impedance supply,
or a switched supply line, high-voltage spikes will be generated (especially with high-current or high-inductance loads) during normal operation, coasting, or immediately after turn-off. In these situations, a Zener
clamp (Zs) from VSto ground will be required.
Over-Current Adjust Pin. The over-current limit may be reduced from
the default value (lp MAX) by selection of an external resistor (RAo) at
the PWM/l o ADJ pin.
The external overcurrent adjust and the thermal shutdown are
commoned at the PWMll o ADJ pin and tieing it to Vee will disable the
thermal shutdown. PWM current/speed control can be performed at the
PWM/l o ADJ pin from a standard totem-pole logic output with a series
Schottky diode (1 N5818, 1N5819, or equivalent) or by pulling it low
through an open-collector transistor (no pull-up resistor). PWM/l o ADJ
input voltages greater than 0.3 V are not recommended and may create
an unstable operating condition.

4-61

TYPICAL FAN APPLICATION
VS

"L

JU

PWM
CONTROL'

REVERSE
POLARITY
PROTECTION

Dwg. EP-014

MAGNETIC FIELD
DEFINITIONS

OUTA ONILOW

(
OUTS ON/LOW

Dwg. AP-001-1

Dwg. GP·OOB

The north pole of a magnet is the north-seeking pole
and is attracted to the earth's magnetic north pole. By
accepted magnetic convention, lines of flux emanate
from the north-seeking pole of a magnet and enter the
south-seeking pole.

4-62

PROTECTED POWERllALL@ SENSOR
- LAMP/SOLENOID DlUVER
The UGQ5140K unipolar Hall effect switch is a monolithic
integrated circuit designed for magnetic actuation of low-power
incandescent lamps or inductive loads such as relays or solenoids.
Included on chip is a Darlington power output that is capable of continuously sinking in excess of 300 mA. Internal protection circuitry limits
surge (lamp turn-ON) or fault currents to approximately 900 mA. A
sensitive magnetic threshold allows the device to be used in conjunction with inexpensive magnets or in applications that require relatively
large operating distances.

2

--'

>-

I:::J

CL
CL

CL

:::J

I:::J

(f)

o

3

w

o

o
o

4

o

Z
:::J

o0:
(9

Pinning is shown viewed from branded side.
Dwg. No. PH-001

Each sensor/driver includes a magnetic sensing Hall voltage
generator, operational amplifier, Schmitt trigger, voltage regulator, and
an open-collector, high-gain Darlington power output stage. The
regulator allows use of the device with supply voltages of 4.5 V to 28 V.
On-chip compensation circuitry stabilizes switch-point performance over
temperature. The magnetic operation of this device is similar to that of
the UGN3140U Hall effect switch.
The sensitive magnetic switch point coupled with the power output,
current limiting, and thermal limiting circuitry allow the UGQ5140K to
magnetically actuate various loads without requiring any external
components.
The UGQ5140K is rated for operation over an extended temperature range of -40°C to +85°C. It is supplied in a four-pin mini-SIP
plastic package, 0.200" (5.08 mm) wide, 0.130" (3.30 mm) high, and
0.060" (1.54 mm) thick.

FJEATURES
ABSOLUTE MAXIMUM RATINGS
alTA = +25°C
Supply Voltage, Vcc ................ 28 V
Reverse Battery Voltage, VRCC ..•..•.• ·45 V
Output OFF Voltage, VOUT' ........... 45 V
Over-Current Protected Output Voltage,
VOUT ' ....................... 25V
Output ON Current, lOUT' ......... 900 rnA'
Magnetic Flux Density, B ........ Unlimited
Package Power Dissipation,
PD' .................... See Graph
Operating Temperature Range,
TA . . . . . . . . . . . . . . . • • . ·40°C to +85°C
Storage Temperature Range,
Ts ................. ·65°C to +150°C

I!l Magnetically Actuated Power Switch
Temperature-Compensated Switch Points
El High Current-Sink Capability
300 mA Continuous
900 mA Peak Current Limit
II Output Short-Circuit Protection
II Low Quiescent Standby Current
II Linear Thermal Limiting
II Automotive Temperature Range
-40°C to +85°C, Operating
II Internal Inductive FlybackiClamp Diode Protection
II Reverse Battery Protection
• Low-Profile 4-Pin Mini-SIP
[!'J

• Output is current limited at approximately 900 mA
and junction temperature limited if current in excess
of 900 mA is attempted. See Circuit Description and
Applications for further information.
Always order by complete part number: i UGQ5140Ki.
4-63

ELECTRICAL CHARACTERISTICS at TA =-40°C to +S5°C, Vee =4.5 V to 24 V
(unless otherwise noted).
Characteristic

Test Conditions

Min.

Vee

Operating

4.5

lOUT

VouT =24 V

-

VOUT(SUS)

lOUT = 100 mA

35

VOUT(SAT)

IOUT=300 mA, Vee = 24 V

-

Symbol

Supply Voltage Range
Output Leakage Current
Output Sustaining Voltage
Output Saturation Voltage

Limits
Typ.
Max.

Units

12

24

V

<1.0

10

IJA

0.84

-

V

1.2

V

Over-Current Limit

ILiMIT

Vee = VOUT= 12 V, B 500 G

-

900

-

Output Rise Time

t,

Vee =12V,Vss =18V,

-

0.04

2.0

IJS

Output Fall Time

tf

RL = 1.1 k ,C L= 20 pF

-

0.04

2.0

IJs

Supply Current

Icc

Output OFF

-

5.5

10

mA

Diode Forward Voltage

VF

IF =300mA

1.1

1.5

V

IR

VR=35V

-

<1.0

50

IJA

-

165

-

°C

Diode Leakage Current
Thermal Limit

mA

Vee = VOUT= 12 V, B 500G,

TLiMIT

lOUT = 10 mA
Typical Data is atTA =+25°C and is for design information only.

MAGNETIC CHARACTERISTICS at Vee = 4.5 V to 24 V.
TA

=

=+25°C

TA -40°C to +85°C

Symbol

Min.

Typ.

Max.

Min.

Max.

Units

Bop

70

155

200

45

-

240

G

Magnetic Release point

BAP

50

100

180

25

-

220

G

Hysteresis

Bhys

20

55

-

20

-

-

G

Characteristic
Magnetic Operate Point

r

FUNCTIONAL BLOCK DIAGRAM

i!;

z

o

O

0.8

~

iii

5 o. 6
0:

~

0.
W

Typ.

'" "

"'~«'"
~,

O. 4

"

~

~

~ o. 2
~

~
_

'"

0

-50

)'?e:;.

-25

25

50

75

AMBIENT TEMPERATURE IN °C

100

.....

'"

125

150

Dwg. GH-001

Dwg. FH-OOl

4-64

TYPICAL OPERATING CHARACTERISTICS
1000

950

e(

E
~

!::
:E

900

:::;

I-

Z
UJ

a:
a:

850

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l<:
e(

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800

Ul
I..J

0
> 0.9

~

~

~
w
Cl
e(

'"

I..J

0

Ilour -300mA I

...............

~

0.8

~

>

..............

Z

0

~

i=
e(
a:

::J
l-

~

0.7

e(

Ul

750
-40

-20

o

25
55
85
AMBIENT TEMPERATURE IN °C

105

0.6
-40

125

-20

o

25

55

85

AMBIENT TEMPERATURE IN °C
Dwg. GH-004

Dwg. GH-002

180

Il oUT 160

/
e(

E

OPERATE POINT

e(

CI
~

I

~

Ul
Ul

::J

10 mA

~

140

I-

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w

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a:
a:

o
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120

f:!

~

100

----I

>
..J

0..
0..

::J
Ul

6.0

RELEASE POINT

80

-40

-20

o

25

55

85

AMBIENT TEMPERATURE IN °C

5·~4'-:0,----_..,t2i:-O----!0'----~25=----::5~5----::I­
AMBIENT TEMPERATURE IN °C

Dwg. GH-006

Dwg. GH-003

4-65

TYPICAL TRANSFER CHARACTERISTICS
at TA = +25°C
15

12

------

-VBB

'"
t...J
0

>

~

9.0

Cl

~

...J

0

6.0

t-

::>

Q.

t0

l'our 300 mA

::>

I

3.0

I
I
I

1

I
I
I
I
I
I
I

B~p

o

------

rVOUT(SAT)

o

25

50

75

100

The UGOS140K merges state-of-the-art
Hall effect sensing and power driving technologies to allow precision non-contact
actuation of incandescent lamps or inductive
loads. It is rated for operation over an
extended temperature range as typically
required in automotive applications.

Bop

Ii

w

>

I
I
I
I
I

125

150

CIRCUIT DESCRIPTION AND
OPERATION

175

200

MAGNETIC FLUX DENSITY IN GAUSS
Dwg GH-007

Magnetic Operation
As shown in the Transfer Characteristics
graph, the output of the device (pin 2)
switches low when the magnetic field at the
Hall sensor exceeds the operate point threshold (Bop), At this point, the output voltage is
VOUT($AT)" When the magnetic field is reduced
to below the release point threshold (B AP )' the
device output goes high. The difference in
the magnetic operate and release points is
called the hysteresis (B H) of the part. This
built-in hysteresis allows clean switching of
the output even in the presence of external
mechanical vibration and electrical noise.
Current and Thermal Limiting
Output short circuits may be caused by
faulty connectors, crimped wiring harnesses,
or blown loads. In such cases, current and
thermal limit circuitry will protect the output
transistor against destruction.
Current through the output transistor is
sensed with a low-value on-Chip aluminum
resistor. The voltage drop across this resistor
is fed back to control the base drive of the
output stage. This feedback prevents the
output transistor from exceeding its maximum
current density rating by limiting the output
current to approximately 900 mA. It may also
cause the output voltage to increase (VOUT =
V BB - [ILiMIT x RLl)· In this mode, the device
will dissipate an increased amount of power
(Po = VOUT x ILiMIT) and the output transistor will
be thermally stressed. This stress, unless
protected against (as in the UGOS140K), will
cause the device junction temperature to rise
until it fails catastrophically.

4-66

Thermal stress protection is provided in
two manners; delta temperature protection,
and junction temperature protection. Under
worst-case conditions (see Figures 1 and 2),
if the output is shorted to supply, the output
transistor will heat up much faster than the
rest of the integrated circuit. This condition
could cause localized failure in the output
transistor. To prevent damage, a delta
temperature limiting scheme is used. If a
large thermal gradient is sensed across the
device, the output transistor base drive is
reduced to lower the output current. This
reduces the power (heat) generated by the
output transistor.

FIGURE 1
OUTPUT CURRENT UNDER SHORT-CIRCUIT
CONDITIONS

I

NOT TO SCALE

I

PEAK CURRENT LIMIT

f-

Z

W

a:
a:

::>

u

f-

DELTA TEMP.
LIMIT

::>

c..
f-

When thermal stresses cause the junction temperature to reach approximately
+ 165°C, a linear thermal limiting circuit is
activated. This circuit linearly reduces the
base drive of the output transistor to maintain
a constant junction temperature of 165°C. In
this mode, the output current will be a function of the heat dissipating characteristics of
the package and its environment. Linear
thermal limiting eliminates the low-frequency
thermal oscillation problems experienced by
thermal shutdown (ON-OFF) schemes.
The output characteristics are shown in
Figures 1 and 2. Note the three distinct
operating regions: peak limit, delta limit, and
thermal limit. In practice the output voltage
and current may exhibit some oscillations
during peak current limiting due to output load
characteristics. These oscillations are of
very-short duration (typically 50 ms) and may
be damped with an external capacitor between pins 2 and 4.
When the fault condition that caused the
output overload is corrected, the device
returns to normal operating mode.

::>

o

JUNCTION
TEMP. LIMIT

TIME
Dwg. WH-002

FIGURE 2
OUTPUT VOLTAGE vs OUTPUT CURRENT

I NOT TO SCALE I
J-

::>

a
>

w

~
~
o

TJ fSOC
=

>

50..
....:::J

JUNCTION
TEMP. LIMIT

o

OUTPUT CURRENT, lOUT
Dwg. GP-013-1

4-67

FIGURE 3

TYPICAL APPLICATIONS

TYPICAL LAMP DRIVER APPLICATION

+12V

I
I

I

I
I
I

....L.

:---0
..!....

o-Wy-.. ---.

OPTIONAL LAMP TEST
(SEE TEXT)

':'

Dwg. EH-001

FIGURE 4
LAMP CURRENT vs TIME
I

J:.'" NORMAL LAMP IN-RUSH CURRENT
"
,," ''
,,, '''

INona SCALE I

J \,

,,
,,
,,

·

IZ
W

a:
a:
~

u

a.

:;;

<[

-'

,
,

''
'''
''

I
I

I,

'I

I

I

,•
I

I

·
I

I
I

:

,

I

'
'

I
I

I, CURRENT LIMIT

'

DELTA TEMP.
LIMIT

,
"

TIME

4-68

DwgWH-001

Incandescent LalDp Driver
High incandescent lamp turn-ON currents
(commonly called in-rush currents) can contribute to poor lamp reliability and destroy
semiconductor lamp drivers. Warming
resistors protect both driver and lamp but use
significant power when the lamp is OFF while
current-limiting resistors waste power when
the lamp is ON. Lamps with steady-state
current ratings to 300 mA can be driven by
the UGQ5140K (Figure 3) without the need
for warming or current limiting resistors. In
applications using several sensor/drivers to
control multiple lamps, the internal clamp
diodes may be connected together to an
appropriate current-limiting resistor and
simple "lamp test" switch.
As shown in Figure 4, when an incandescent lamp is initially turned ON, the cold
filament is at minimum resistance and will
normally allow a 10x t012x peak in-rush
current. As the lamp warms up, the filament
resistance increases to its rated value and the
lamp current is reduced to its steady-state
rating. When switching a lamp with the
UGQ5140K, the internal current-limiting
circuitry limits the peak current to approximately 900 mA. The device will stay in the
current limit and delta temperature limit
modes until the lamp resistance increases to
its rated steady-state value (Figure 4). A
side-effect of this current-limiting feature is
that lamp turn-on times will increase. Typical
lamp turn-on times are shown in Figure 5.

Inductive Load Driver
Connecting the internal clamp diode (pin
3) to the positive supply allows relays or other
inductive loads to be driven directly, as shown
in Figure 6. The internal diode prevents
damage to the output transistor by clamping
the high-voltage spikes which occur when
turning OFF an inductive load. An optional
external Zener diode can be used to increase
the flyback voltage, providing a much faster
inductive load turn-OFF current decay,
resulting in faster dropout (reduced relay
contact arcing), and improved performance.
The maximum Zener voltage, plus the load
supply voltage, plus the clamp diode forward
voltage should not exceed 35 volts.

5140
PROTECTED POWERllALL ® SENSOR: LAMP/SOLENOID DRIVER

FIGURE 5

SENSOR LOCATION AREA

LAMP TURN-ON TIME
150

"'
E
?:
w

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125

1=

z
0
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a:

100

....::;)
n.
::;:
et
...J

75

....etw

::;:

X

0

a:
n.
n.

et

r

---- ------

ACTIVE AREA DEPTH
0.017"
0.43 mm
NOM

I vss " 14 V I

50

25
-40

~

i

~BULB

..........

~

...............

0.053"
1.35mm

,I;,
""I'-'

a

55

25

AMBIENT TEMPERATURE IN °C

f

......

5'l.

~

-20

J

0.120"
3.04 mm

BRANDED
SURFACE

1

'---

3

2

-

-

4

~

85
DW9. No. MH-001A

Dwg. No. GH-005

FIGURE 6
TYPICAL RELAY/SOLENOID DRIVER APPLICATION

-------~VBB+~

V BB

+12V

.... w
::;)Cl
n. et

Vee

........

::;)-'

00

>

1

2

3

VOUT(SAT) -

4

........

::;)z

n.w
.... a:
::;)a:

~ , / ZENER CLAMP

~""/ DIODE CLAMP

0::;)
0

,~

-

OPTIONAL ZENER

Dwg. No. EH-002

Dwg. No. WP-001-1

4-69

COMPLEMENTARY OUTPUT
POWER HALLTM

LATCH

Type UGN5275K latching Hall effect sensors are bipolar integrated
circuits designed for electronic commutation of brush less dc motors.
They feature open-collector complementary power outputs that are
capable of sinking up to 300 mA continuously. Increased current
ratings, complementary outputs, and sensitive switching points that
are stable over temperature and time ideally suit these devices for
minimum-component brushless dc motor designs.

2

3

~

I:::J

:::J

I:::J

Ii

[L
[L

(/J

[L

o

Each sensor IC includes a Hall voltage generator, an operational
amplifier, a Schmitt trigger, a voltage regulator, and large-area dual
NPN output transistors. The regulator enables the IC to operate with
supply voltages ranging from 4.5 V to 14 V. On-chip compensation
circuitry stabilizes switch point performance over temperature. The
large bipolar junction output transistors are fed by a unique driver stage
which minimizes power dissipation within the IC. The magnetic operation of this device is similar to that of the UGN3275K complementaryoutput Hall effect latch.

4

o

Z

:::J

oa:

Cl
Dwg. PH-OQ2

Pinning is shown viewed from branded side.

Output Q of the IC switches to the LOW state when the internal Hall
generator exp~riences a magnetic field that exceeds the rated operate
point. Output Q switches HIGH within one ~s of the Output Q change
of state. When the device is exposed to a sufficient magnetic field of
opposite polarity, Output Q returns to the HIGH state, and Output Q
returns to the LOW state.
The UGN5275K is rated for operation over a temperature range
of -20°C to +85°C, and is supplied in an environmentally rugged,
four-pin miniature plastic SIP. Please consult the factory for alternate
packaging and custom magnetic requirements.

FEATURES

ABSOLUTE MAXIMUM RATINGS
at TA = +25°C

• High Sink-Current Capability
• Magnetic Sensing, Complementary-Output Latch
• On-Chip Schmitt Trigger Provides Hysteresis
• Temperature-Compensated Switch Points
• Rugged, Low-Profile SIP

Supply Voltage, Vcc ............... 14 V
Magnetic Flux Density, B ....... Unlimited
Output OFF Voltage, VCE . . . . . . . . . . . 60 V
Output ON Current, Ic
Continuous .................. 0.5 A
Peak (Start Up) ............... 0.9 A
Operating Temperature Range,
TA' . . . . . . . . . . . . . . . . -20°C to +85°C
Storage Temperature Range,

Ts' ............... -65°C to +150°C
Package Power Dissipation,

PD . . . . . . . . . . . . . . . . . . . . . . . 750 mW

Always order by complete part number: I UGN5275KI
4-70

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = 4.5 V to 14 V
(unless otherwise noted).
Symbol

Characteristic
Supply Voltage

Test Conditions

Min.

Vcc

Typ.

4.5

-

VCE(SAT)

Vcc ;14V,l c ;300mA

-

400

Output Leakage Current

ICEX

V cE ;14V,Vcc ;14V

-

-

Supply Current

Icc

Vcc; 14 V, Output Open

Output Saturation Voltage

Max.

Units

14

V

600

mV

10

J.lA

-

18

30

mA

Output Rise Time

tr

Vcc; 14 V, RL ; 45

-

0.3

1.5

J.ls

Output Fall Time

tf

Vcc ; 14 V, RL ;

-

0.3

1.5

J.l

~t

Vcc; 14 V, RL ; 45

-

1.0

3.0

J.ls

n, C L ; 20 pF
45 n,c L ; 20 pF

Switch Time
Differential

n, C L ;

20 pF

MAGNETIC CHARACTERISTICS
TA

TA = +25°C

=-20°C to +85°C

Characteristic

Symbol

Min.

Max.

Min.

Max.

Units

Operate Point

Bop

25

250

15

250

G

Release Point

B RP

·250

·25

-250

·15

G

Hysteresis

Bhy •

100

-

100

-

G

NOTE: As used here, negative flux densities are defined as less than zero (algebraic convention).

14V

TEST CIRCUIT
FUNCTIONAL BLOCK DIAGRAM

2

OUTPUT

3

OUTPUT

4 GROUND
\ r - - -.......- f - - - j - - - - - G VOut 1

v----t-.....- - t - - - - - 0

VOU! 2

Dwg. FH·002

• Includes probe and test
'--......--fixture capacitance
RU ~ RL2~ 820 n
Cu

~ ~2 ~20

pF nom.
Dwg. No. 1-14,408A

4-71

FIGURE 2

MOTOR COIL DRIVER
MOTOR COILS

R1

-I

C1
.1)JF
Minimum
Value

V(X Q

2

3

APPLICATIONS

SWITCH POINTS VERSUS
TEMPERATURE

The increased current sinking capability of the UGN5275K ideally
suits it for building small, inexpensive brushless dc motors using a
minimum number of external components. Figure 2 shows that the only
components required to commutate motor windings L 1 and L2 are the
Hall effect IC, flyback diodes 01 and 02, and one decoupling capacitor.
The remaining components are optional for improving motor performance. Care should be taken to ensure that the motor winding impedances are high enough to guarantee that start-up surge currents do not
exceed the maximum rating of the Hall effect IC.

UGN5275K
400
BH TYP

Bop lYP

100

-100
SAP lYP

-200

·20

VCC

UGN5275

GND Q

200

o

DECOUPLE

Z2

300

03

25
TEMPERATURE (0C)

85

In the circuit shown, diodes 01 and 02 supply a flyback path for the
current of each winding to prevent reactive voltages from exceeding the
sustained voltage rating of the Hall-effect IC output transistors. Zener
diode Z1 enables the windings to switch more rapidly by allowing the
output voltage to rise above the source voltage, while simultaneously
clamping the extreme reactive Voltages.
The maximum output voltage level will be restricted to the following:

Vee - V03 + Vz + V01 (blocking diode 03 voltage drop). Blocking diode 03
provides reverse input-polarity protection, and should be used only if
reverse battery voltage is a possibility. Capacitor C1 decouples the
Hall-effect IC from any high dv/dt transients injected onto the Vee rail to
prevent regulator latch-up within the device. Zener diode Z2 and resistor
R1 are required for operation from a Vee exceeding 14 V.

4-72

HYSTERESIS CHARACTERISTICS

Ul

.g RP
>

<::

Ul

.g

OFF

12 -

H t

Q)

0>

""
>
0

6-

3-

ON

I
I
-200 -100

r

6-

S0.
S

0

OP
I

I
100

0

I
I
-200 -100

200

I

I
100

0

200

GlJ[JI)E ']['0 :U:NS,][,AJLLAT:u:ON
()

280

0

0.112"-1
2.86 mm

~

t
0.047"
1.19mm
1':;'<1

~

"-;>I

~a:

220

lf-

~

f-

~

l-

w 200
a..
I::;:
w
f-

a:
0

-'

0

(fJ

5'1.

260

w 240
a:

w

BRANDED
SURFACE

ON

Magnetic Flux Density in Gauss

SENSOR LOCATION

~

3-

RP

Magnetic Flux Density in Gauss

ACTIVE AREA DEPTH
O.0 1 7"
0.43 mm
NOM

9-

aI

S

OP

12 -

t t

oS

9-

0

OFF

>

I I I I

°

I I I I

5

I I I I
I I
15
10

TIME IN SOLDER BATH IN SECONDS
Dwg. No. A·12,062

1

'--

2

3

4

'--

'--

1. All Hall Effect integrated circuits are susceptible to mechanical stress
effects. Caution should be exercised to minimize the application of
stress to the leads or the epoxy package. Use of epoxy glue is
recommended. Other types may deform the epoxy package.
Dwg. No. MH-001-3

2. To prevent permanent damage to the Hall cell, heat-sink the leads
during hand-soldering. Recommended maximum conditions for wave
soldering are shown in the graph above.

4-73

APPLICATIONS
INFORMATION
HALL EFFECT IC
APPLICATIONS GUIDE
Allegro Microsystems uses the latest bipolar integrated circuit
technology in combination with the century-old Hall effect to produce
Hall effect ICs. These are contactless, magnetically activated switches
and sensors with the potential to simplify and improve systems.

+ Vee

LOW-COST SIMPLIFIED SWITCHING

_-fXI-_~4D

02
........

+VHALL

-VHALL

3

Simplified switching is a Hall sensor's strong point. Hall effect IC
switches combine Hall voltage generators, signal amplifiers, Schmitt
trigger circuits, and transistor output circuits on single integrated circuit
chips. Output is clean, fast, and switched without bounce-an inherent
problem with mechanical contact switches. A Hall effect switch typically
operates at up to a 100 kHz repetition rate, and costs less than many
common electromechanical switches.

EFFICIENT, EFFECTIVE, LOW-COST LINEAR SENSORS
Dwg. No. 13,100

FIGURE I

+

The linear Hall effect sensor detects the motion, position, or change
in field strength of an electromagnet, a permanent magnet, or a ferromagnetic material with an applied magnetic bias. Energy consumption
is very low. The output is linear and temperature-stable. The sensor's
frequency response is flat up to approximately 25 kHz.
A Hall effect sensor is more efficient and effective than inductive or
optoelectronic sensors, and at a lower cost.

x

SENSITIVE CIRCUITS FOR RUGGED SERVICE
The Hall effect sensor is virtually immune to environmental contaminants and is suitable for use under severe service conditions. The
circuit is very sensitive and provides reliable, repetitive operation in
close tolerance applications. The Hall effect sensor can see precisely
through dirt and darkness.

CURRENT APPLICATIONS
Dwg. No. 13,101

Current applications for Hall effect ICs include use in ignition
systems, speed controls, security systems, alignment controls, micrometers, mechanical limit switches, computers, printers, disk drives,
keyboards, machine tools, key-switches, and pushbutton switches.
They are also used as tachometer pickups, current limit switches,
position detectors, selector switches, current sensors, linear potentiometers and brush less dc motor commutators.

FIGURE 2

+

THE HALL EFFECT SENSOR:
HOW DOES IT WORK?
The basic Hall sensor is a small sheet of semiconductor material
represented by Figure 1.

Dwg. No. 13,102

FIGURE 3

4-74

A constant voltage source, as shown in Figure 2, will force a
constant bias current to flow in the semiconductor sheet. The output will
take the form of a voltage measured across the width of the sheet that
will have negligible value in the absence of a magnetic field.
.

If the biased Hall sensor is placed in a magnetic field with flux lines
at right angles to the Hall current (Figure 3), the voltage output is
directly proportional to the strength of the magnetic field. This is the Hall
effect, discovered by E. F. Hall in 1879.

+

LINEAR OUTPUT HALL EFFECT DEVICES.

Dwg. No. 13,103

The output voltage of the basic Hall effect sensor (Hall element)
is quite small. This can present problems, especially in an electrically
noisy environment. Addition of a stable high-quality dc amplifier
and voltage regulator to the circuit (Figures 4 and 5) improves the
transducer's output and allows it to operate over a wide range of supply
Voltages. The modified device provides an easy-to-use analog output
that is linear and proportional to the applied magnetic flux density.

FIGURE 4
The UGN3501 is this type of linear output device. The UGN3503
has improved sensitivity and temperature-stable characteristics. The
output of the UGN3503 is ratiometric; that is, its output is proportional to
its supply Voltage.

DIGITAL OUTPUT HALL EFFECT SWITCHES

Dwg. No. 13.104

The addition of a Schmitt trigger threshold detector with built-in
hysteresis, as shown in Figure 6, gives the Hall effect circuit digital
output capabilities. When the applied magnetic flux density exceeds a
certain limit, the trigger provides a clean transition from OFF to ON
without contact bounce. Built-in hysteresis eliminates oscillation (spurious switching of the output) by introducing a magnetic dead zone in
which switch action is disabled after the threshold value is passed.

FIGURE 5
An open-collector NPN output transistor added to the circuit
(Figure 7) gives the switch digital logic compatibility. The transistor is a
saturated switch that shorts the output terminal to ground wherever the
applied flux density is higher than the ON trip point of the device. The
switch is compatible with all digital families. The output transistor can
sink enough current to directly drive many loads, including relays,
triacs, SeRs, LEOs, and lamps.

Dwg. No. 13,105

FIGURE 6

The circuit elements in Figure 7, fabricated on a monolithic silicon
chip and encapsulated in a small epoxy or ceramic package, are
common to all Hall effect digital switches. Differences between device
types are generally found in specifications such as magnetic parameters, operating temperature ranges, and temperature coefficients.

OPERATION

Vee

All Hall effect devices are activated by a magnetic field. A mount
for the the devices, and electrical connections, must be provided;
Parameters such as load current, environmental conditions, and
supply voltage must fall within the specific limits shown in the
appropriate documentation.
Magnetic fields have two important characteristics-flux density
and polarity (or orientation). In the absence of any magnetic field, most
Hall effect digital switches are designed to be OFF (open circuit at
output). They will turn ON only if subjected to a magnetic field that has
both sufficient density and the correct orientation.
Dwg. No. 13,106

FIGURE 7

4-75

Hall switches have an active area that is closer to one face of the
package (the face with the lettering, the branded face). To operate the
switch, the magnetic flux lines must be perpendicular to this face of the
package, and must have the correct polarity. If an approaching south
pole would cause switching action, a north pole would have no effect. In
practice, a close approach to the branded face of a Hall switch by the
south pole of a small permanent magnet will cause the output transistor
to turn ON (Figure 8).

Dwg. No. 13,107

FIGURE 8

A Transfer Characteristics Graph (Figures 10 and 11) plots this
information. It is a graph of output as a function of magnetic flux density
(measured in gauss) presented to the Hall cell. The magnetic flux
density is shown on the horizontal axis. The digital output of the Hall
switch is shown along the vertical axis.
To acquire data for this graph, add a power supply and a pull-up
resistor that will limit current through the output transistor and enable
the value of the output voltage to approach zero (Figure 9).

Dwg. No. 13,108

FIGURE 9
12

In the absence of an applied magnetic field (0 G), the switch is
OFF, and the output voltage equals the power supply (12 V). A permanent magnet's south pole is then moved perpendicularly toward the
active area of the device. As the magnet's south pole approaches the
branded face of the switch, the Hall cell is exposed to increasing
magnetic flux density. At some point (240 G in this case), the output
transistor turns ON and the output voltage approaches zero (Figure 10).
That value of flux density is called the operate point. If we continue to
increase the field's strength, say to 600 G, nothing more happens.
The switch turns ON once and stays ON.

1---'=----,
IO.P.

To turn the switch OFF, the magnetic flux density must fall to a
value far lower than the 240 G "operate point" because of the built-in
hysteresis. For this example we use 90 G hysteresis, which means the
device turns OFF when flux density decreases to 150 G (Figure 11).
That value of flux density is called the "release point".

iJ

ION

,,
,,,

!,,

CHARACTERISTICS AND TOLERANCES

:,,

100

200

300

400

500

600

MAGNETIC FLUX DENSITY IN GAUSS

Dwg. No. 13,109

The exact magnetic flux density values required to turn Hall
. switches ON and OFF differ for several reasons, including design
criteria and manufacturing tolerances. Extremes in temperature will also
somewhat affect the operate and release points.

FIGURE 10
For each device type, worst-case magnetic characteristics for the
operate value, the release value, and hysteresis are provided.
I

IO.P.

q

1

:

ION

!, !:
: ,
l

:
l

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tl

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o L~R.P:..:'.'':::::L:::'::'=::;:==:::;:::::::;::3:3-

o

100

200

300

400

500

600

MAGNETIC FLUX DENSITY IN GAUSS

Dwg. No. 13,110

FIGURE II
4-76

All switches are guaranteed to turn ON at or below the maximum
operate point flux density. When the magnetic field is reduced, all
devices will turn OFF before the flux density drops below the minimum
release point value. Each device is guaranteed to have at least the
minimum amount of hysteresis to ensure clean switching action. This
hysteresis ensures that, even if mechanical vibration or electrical noise
is present, the switch output is fast, clean, and occurs only once per
threshold crossing.

GETTING STARTED
Since the electrical interface is usually straightforward, the design
of a Hall effect system should begin with the physical aspects. In
position-sensing or motion-sensing applications, the following questions
should be answered:

1 "0 x 0.2" 20-POLE·PAIR RING
(RADIAL POLES)

400

I

I

How much and what type of motion is there?
What angular or positional accuracy is required?
How much space is available for mounting the sensing device
and activating magnet?

300

How much play is there in the moving assembly?
200

How much mechanical wear can be expected over the lifetime
of the machine?

\r\

100

Will the product be a mass-produced assembly, or a limited number
of machines that can be individually adjusted and calibrated?
What temperature extremes are expected?

~r--

A careful analysis will pay big dividends in the long term.

THE ANALYSIS

0
0.15

0.10

0.05

0

TOTAL EFfECTIVE AIR GAPIINCHES)

Dwg. No. 13,126

FIGURE 12A

The field strength of the magnet should be investigated. The
strength of the field will be the greatest at the pole face, and will decrease with increasing distance from the magnet. The strength of the
magnetic field can be measured with a gauss meter or a calibrated
linear Hall sensor, such as a UGN3503U (see Appendix II).
A plot of field strength (magnetic flux density) is a function of
distance along the intended line of travel of the magnet. Hall device
specifications (sensitivity in mV/G for a linear device, or operate and
release points in gauss for a digital device) can be used to determine
the critical distances for a particular magnet and type of motion. Note
that these field strength plots are not linear, and that the shape of the
flux density curve depends greatly upon magnet shape, the magnetic
circuit, and the path traveled by the magnet.

TOTAL EFFECTIVE AIR GAP (TEAG)

ALNICO 8, 0.212"0 x 0.187"
1000

1"~f
B-

BOO

1\

600

\

400

'"

200

0

0

0.05

0.10

0.15

"I-0.20

0.25

0.30

0.35

0.40

TOTAL EFfECTIVE AIR GAP (INCHES)

Dwg. No. 13,112

FIGURE 12B

Total effective air gap, or TEAG, is the sum of active area depth
and the distance between the package's surface and the magnet's
surface. A graph of flux density as a function of total effective air gap
(Figure 12A) illustrates the considerable increase in flux density at the
sensor provided by a thinner package. The actual gain depends on the
characteristic slope of flux density for a particular magnet.

MODES OF OPERATION
Even with a simple bar or rod magnet, there are several possible
paths for motion. The magnetic pole could move perpendicularly
straight at the active face of the Hall device. This is called the head-on
mode of operation. The curve of Figure 128 illustrates typical flux
density (in gauss) as a function of TEAG for a cylindrical magnet.
The head-on mode is simple, works well, and is relatively insensitive to lateral motion. The designer should be aware that overextension
of the mechanism could cause physical damage to the epoxy package
of the Hall device.
4·77

ALNICO 8, 0.212"0 x 0.187'"
1000 ~-r----r---.----r-----';l--'----'

: c-" \.._. "~l'
400

I--l---l-\-\+--I---r----r--.:;---1

200

I--+-+--'~--cl--+-+--t----l

o '-----'----'-----L-'--",----,-----,----,------,
o 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40
DISTANCE 0 (INCHES)

Dwg. No. 13,113

FIGURE 13

A second possibility would be to move the magnet in from the side
of the Hall device in the slide-by mode of operation, as illustrated in
Figure 13. Note that now the distance plotted is not total effective air
gap, but rather the perpendicular distance from the centerline of the
magnet to the centerline of the package. Air gap is specified because
of its obvious mechanical importance, but bear in mind that to do any
calculations involving flux density, the "package contribution must be
added and the TEAG used, as before. The slide-by mode is commonly
used to avoid contact if overextension of the mechanism is likely. The
use of strong magnets and/or ferrous flux concentrators in well-designed
slide-by magnetic circuits will allow better sensing precision with smaller
magnet travel than the head-on mode.
Magnet manufacturers generally can provide head-on flux density
curves for their magnets, but they often do not characterize them for
slide-by operation, possibly because different air gap choices lead to an
infinite number of these curves; however, once an air gap is chosen, the
readily available head-on magnet curves can be used to find the peak
flux density (a single point) in the slide-by application by noting the value
at the total effective air gap.

STEEP SLOPES-HIGH FLUX DENSITIES
ALNICO S, 0.212'0, 0.187·L

1000

r--r----r---,----r--------,

0.15
0.20
0.25
0.30
DISTANCE 0 (INCHES)

0.35

0.40

Dwg. No. 13,114

FIGURE 14

For linear Hall devices, greater flux changes for a given displacement
give greater outputs, clearly an advantage. The same property is desirable for digital Hall devices, but for more subtle reasons. To achieve
consistent switching action in a given application, the Hall device must
switch ON and OFF at the same positions relative to the magnet.
To illustrate this concept, consider the flux density curves from two
different magnet configurations in Figure 14. With an operate point flux
density of 200 G, a digital Hall effect device would turn ON at a distance
of approximately 0.14 inches in either case. If manufacturing tolerances
or temperature effects shifted the operate point to 300 G, notice that for
curve A (steep slope) there is very little change in the distance at which
switching occurs. In the case of curve S, the change is considerable.
The release point (not shown) would be affected in much the same way.
The basic principles illustrated in this example can be modified to include
mechanism and device specification tolerances and can be used for
worse-case design analysis. Examples of this procedure are shown in
later sections.
VANEINTERRUPTERS~TCHING

.
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JiALl EFFECT DEVICE

JiAll EFFECT OEVICE

Dwg. No. 13,115

FIGURE 15

4-78

In this mode, the activating magnet and the Hall device are mounted
on a single rigid assembly with a small air gap between them. In this
position, the Hall device is held in the ON state by the activating magnet.
If a ferromagnetic plate, or vane is placed between the magnet and the
Hall device, as shown in Figure 15, the vane forms a magnetic shunt
that distorts the flux field away from the Hall device.
Use of a movable vane is a practical way to switch a Hall device.
The Hall device and magnet can be molded together as a unit, thereby
eliminating alignment problems, to produce an extremely rugged switching assembly. The ferrous vane or vanes that interrupt the flux could
have linear motion, or rotational motion, as in an automotive distributor.
Ferrous vane assemblies, due to the steep flux density/distance curves
that can be achieved, are often used where precision switching over a
large temperature range is required.

The ferrous vane can be made in many configurations, as shown in
Figure 16. With a linear vane similar to that of Figure 16B, it is possible
to repeatedly sense position within 0.002" over a 125°C temperature
range.

ELECTRICAL INTERFACE FOR
DIGITAL HALL DEVICES

c

B

A

Dwg. No. 13,116

FIGURE 16

b."''''
~COMMON
Dwg. No. 13,117

FIGURE 11

The output stage of a digital Hall switch is simply an open-collector
NPN transistor. The rules for use are the same as those for any similar
switching transistor.
When the transistor is OFF, there is a small output leakage current
(typically a few nanoamps) that usually can be ignored, and a maximum
(breakdown) output voltage (usually 24 V), which must not be
exceeded.
When the transistor is ON, the output is shorted to the circuit
common. The current flowing through the switch must be externally
limited to less than a maximum value (usually 20 mAl to prevent
damage. The voltage drop across the switch (VCE(Satl) will increase for
higher values of output current. You must make certain this voltage is
compatible with the OFF, or "logic zero," voltage of the circuit you wish
to control.
Hall devices switch very rapidly, with typical rise and fall times in
the 400 ns range. This is rarely significant, since switching times are
almost universally controlled by much slower mechanical parts.

COMMON INTERFACE CIRCUITS
Figure 17 illustrates a simplified schematic symbol for Hall digital
switches (Types 3113,3120-23,3130,3132/33, and 3140). It will make
further explanation easier to follow.

+5V

Interface for digital logic integrated circuits usually requires only an
appropriate power supply and pull-up resistor.

Owg. No. 13,118

With current-sinking logic families, such as DTL or the popular 7400
TTL series (Figure 18A), the Hall switch has only to sink one unit-load
of current to the circuit common when it turns ON (1.6 mA maximum for
TTL). In the case of CMOS gates (Figure 18B), with the exception of
switching transients, the only current that flows is through the pull-up
resistor (about 0.2 mA in this case).

FIGURE 18A
Loads that require sinking currents up to 20 mA can be driven
directly by the Hall switch.

+10V

A good example is a light emitting diode (LED) indicator that
requires only a resistor to limit current to an appropriate value. If the
LED drops 1.4 V at a current of 20 mA, the resistor required for use with
a 12 V power supply can be calculated as:
12V-1.4V =530
0.02 A
Owg. No. 13,119

FIGURE 18B

4-79

The nearest standard value is 560 n, resulting in the circuit of
Figure 19.
Sinking more current than 20 mA requires a current amplifier. For
example, if a certain load to be switched requires 4 A and must turn ON
when the activating magnet approaches, the circuit shown in Figure 20
could be used.

+12V

When the Hall switch is OFF (insufficient magnetic flux to operate),
about 12 mA of base current flows through the 1 kn resistor to the
2N5812 transistor, thereby saturating it and shorting the base of the
2N3055 to ground, which keeps the load OFF. When a magnet is
brought near the Hall switch, it turns ON, shorting the base of the
2N5812to ground and turning it OFF. This allows:
12V =210mA
56n
Dwg. No. 13,120

of base current to flow to the 2N3055, which is enough to saturate it for
any load current of 4 A or less.

FIGURE 19

The Hall switch cannot source current to a load in its OFF state, but
it is no problem to add a transistor that can. For example, consider
using a 40669 triac to turn ON a 115 V or 230 V ac load. This triac
would require about 80 mA of gate current to trigger it to the ON
condition. This could be done with a 2N5811 PNP transistor, as shown
below in Figure 21.

+12V

When the Hall switch is turned ON, 9 mA of base current flows into
the 2N5811, thereby saturating it and allowing it to supply 80 mA of
current to trigger the triac. When the Hall switch is OFF, no base
current flows in the 2N5811, which turns it OFF and allows no gate
current to pass to the triac. The 4.7 kn and the 1 kn resistors were
added as a safeguard against accidental turn-on by leakage currents,
particularly at elevated temperatures.
Dwg. No. 13,121

FIGURE 20

Note that the +12 V supply common is connected to the low
side of the ac line, and in the event of a mixup, the Hall switch and
associated low-voltage circuitry would be .115 V above ground.
Be careful!
115/230 VAC

+12V

4.7K
1.2K

"--_!lA.v-.......---I

2N08ll

12.
lK

COMMON

FIGURE 21

4-80

t

Owg. No. 13.122

ROTARY ACTIVATORS FOR HALL SWITCHES
A. MAGNETIC ROTOR

A frequent application involves the use of Hall switches to generate
a digital output proportional to velocity, displacement, or position of a
rotating shaft. The activating magnetic field for rotary applications can
be supplied in either of two ways:

MAGNETIC ROTOR ASSEMBLY

B. FERROUS VANE ROTOR

The activating magnet(s) are fixed on the shaft and the stationary
Hall switch is activated with each pass of a magnetic south pole (Figure
22A). If several activations per revolution are required, rotors can
sometimes be made inexpensively by molding or cutting plastic or
rubber magnetic material. Ring magnets can also be used. Ring
magnets are commercially available disc-shaped magnets with poles
spaced around the circumference. They will operate Hall switches
dependably and at reasonable costs.
Ring magnets do have limitations:
The accuracy of pole placement (usually within 2 or 3 degrees).
Uniformity of pole strength (±5%, or worse).
These limitations must be considered in applications requiring
precision switching.

FERROUS VANE ROTOR ASSEMBLY
Both the Hall switch and the magnet are stationary (Figure 22B);
the rotor interrupts and shunts the flux with the passing of each ferrous
vane.
Dwg. No. 13,123

FIGURE 22

Vane switches tend to be a little more expensive than ring magnets,
but because the dimensions and configuration of the ferrous vanes can
be carefully controlled, they are often used in applications requiring
precise switching or duty cycle control.
Properly designed vane switches can have very steep flux density
curves, yielding precise and stable switching action over a wide
temperature range.

A. RADIAL

RING MAGNETS FOR HALL SWITCH APPLICATIONS
Ring magnets suitable for use with Hall switches are readily available from magnet vendors in a variety of different materials and configurations. The poles may be oriented either radially (Figure 23A) or
axially (Figure 23B) with up to 20 pole-pairs on a one-inch diameter
ring. For a given size and pole count, ring magnets with axial poles
have somewhat higher flux densities.

B.AXIAL

Materials most commonly used are various Alnicos, Ceramic 1,
and barium ferrite in a rubber or plastic matrix material. Manufacturers
usually have stock sizes with a choice of the number of pole pairs.
Custom configurations are also available at a higher cost.

Dwg. No. 13,124

FIGURE 23

4-81

Alnico is a name given to a number of
aluminum nickel-cobalt alloys that have a
fairly wide range of magnetic properties. In
general, Alnico ring magnets have the highest
flux densities, the smallest changes in field
strength with changes in temperature, and the
highest cost. They are generally too hard to
shape except by grinding and are fairly brittle,
which complicates the mounting of bearings
or arbor.
Ceramic 1 ring magnets (trade names
Indox, Lodex) have somewhat lower flux
dehsities (field strength) than the Alnicos, and
their field strength changes more with temperature; however, they are considerably
lower in cost and are highly resistant to
demagnetization by external magnetic fields.
The ceramic material is resistant to most
chemicals and has high electrical resistivity.
Like Alnico, they can withstand temperatures
well above that of Hall switches and other
semiconductors, and must be ground if

reshaping or trimming is necessary. They may require a support arbor
to reduce mechanical stress.
The rubber and plastic barium ferrite ring magnets are roughly
comparable to Ceramic 1 in cost, flux density, and temperature coefficient, but are soft enough to shape using conventional methods. It is
also possible to mold or press them onto a shaft for some applications.
They do have temperature limitations ranging from 70°C to 150°C,
depending on the particular material, and their field strength changes
more with temperature than Alnico or Ceramic 1.
Regardless of material, ring magnets have limitations on the
accuracy of pole placement and uniformity of pole strength which, in
turn, limit the precision of the output waveform. Evaluations have shown
that pole placement in rubber, plastic, and ceramic magnets usually
falls within 2° or 3° of target, but 5° errors have been measured.
Variations of flux density from pole to pole will commonly be ±5%,
although variations of up to ±30% have been observed.
Figure 24 is a graph of magnetic flux density as a function of
angular position for a typical 4 pole-pair ceramic ring magnet, one inch
in diameter, with a total effective air gap of 0.065" (0.050" clearance
plus 0.015" package contribution). It shows quite clearly both the errors
in pole placement and variations of strength from pole to pole.

FOUR-POLE-PAIR CERAMIC RING MAGNET (1"0 AXIAL POLESI
1000

800

600

400

200

f\

(\

(\

I '\

I \
I \\

I \
II \\

1\

I \
III \

7'\

II

/

1\

-200

\

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\I

-600

/

1\

\ I

-400

1/

.I

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1\

;\

\ I

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V ---d-I

-800

TEAG .065·

I

-1000

I

\ I
\ /
V

I

I
o

45

90

135

180

225

270

315

360

MAGNET ROTATION (DEGREES)

Dwg. No. 13,125

FIGURE 24

4-82

1"0 X 0.2H 20·POLE·PAIR RING
(RADIAL POLES)
400

r--,----r----,-------,

300

1---\--!------f----1

200

1----\--!------f----1

100

1----+''<---j----1

A frequent concern with ring magnets is ensuring sufficient flux
density for reliable switching. There is a trade-off between the number
of pole-pairs and the flux density for rings of a given size. Thus, rings
with large numbers of poles have lower flux densities. It is important
that the total effective air gap (TEAG) is kept to a minimum, since flux
density at the Hall active area decreases by 5 G or 6 G per 0.001" for
many common ring magnets. This is clearly shown in Figure 25, a
graph of flux density at a pole as a function of TEAG for a typical 20pole-pair plastic ring magnet. Also shown in Figure 25 is the effect of
"package contribution" to the TEAG. The standard "U" package contributes about 0.016". The other factor contributing to TEAG is mechanical
clearance, which should be as small as possible, consistent with
dimensional tolerances of the magnet, bearing tolerances, bearing
wear, and temperature effects on the Hall switch mounting bracket.

WHAT IS A BIPOLAR SWITCH?
0.05

0.15

0.10

TOTAL EFFECTIVE AIR GAP (INCHES)

Dwg. No. 13,126

FIGURE 25

+
::1

.
ffic,
o

I

I

Dwg. No. 13,127

FIGURE 26A

A bipolar switch, the UGN/UGS3130, has a maximum operate point
of + 150 G, a minimum release point of -150 G, and a minimum hysteresis of 20 G at + 25°C; however, the operate point could be as low as
-130 G (-150 G minimum release, 20 G minimum hysteresis) and the
release could be as high as + 130 G (+150 G maximum operate, 20 G
minimum hysteresis). Figure 26A shows two cases of operate and
release with one device operating at the maximum operate and release
points, and the other with minimum operate and release points.
In applications previously discussed, the Hall switch was operated
(turned ON) by the approach of a magnetic south pole (positive flux).
When the south pole was removed (flux approaches zero), the Hall
switch had to release (turn OFF). On ring magnets, both south and
north poles are present in an alternating pattern. The release point flux
density becomes less important, for if the Hall switch has not turned
OFF when the flux density goes to zero (south pole has passed), it will
certainly turn OFF when the following north pole causes flux density to
go negative. Bipolar Hall switches take advantage of this extra margin
in release point flux values to achieve lower operate point flux densities,
a definite advantage in ring magnet applications.

THE BIPOLAR LATCH
Unlike the Type 3130 bipolar switch, which may operate and
release with a south pole or north pole, the bipolar latch offers a
more precise control of the operate and release parameters. This
Hall integrated circuit has been designed to operate (turn ON) with
a south pole only; it will then remain ON when the south pole has
been removed. In order to have the bipolar latch release (turn OFF),
it must be presented with a north magnetic pole. This alternating south
pole-north pole operation, when properly designed, will produce a duty
cycle approaching 50%.

DUTY CYCLE (LATCH OUTPUT)

The UGN3175 was designed specifically for applications requiring
a tightly controlled duty cycle, such as in brushless dc motor commutation. This was accomplished with the introduction of the bipolar latch
in 1982. The 3175 has become very popular as a brush less dc motor
commutator, shaft encoder, speedometer element, and tachometer
sensor.

Dwg. No. 13,128A

FIGURE26B

Duty cycle is controlled with an altemating magnetic field, as shown
in Figure 26B.
4-83

DESIGN EXAMPLE
Given:
Operating temperature range of -20°
to +85°C.
Bipolar Hall switch UGN3130U in
standard "U" package:
Maximum operate point +200 G
from -20° to + 85°C.
Minimum release point -200 G
from -20°C to + 85°C.
Air gap package contribution
0.016".
Necessary mechanical clearance
0.030".

TEMPERATURE EFFECTS
Unfortunately, magnet strength is affected by temperature to some
degree. Temperature coefficients of some common magnetic materials
are given below:
Material

Temperature Coefficient

Rubber/Plastic
Ceramic 1
Alnico 2, 5
Alnico 8

-0.2%
-0.15%
-0.02%
±0.01%

to -0.3% per DC
to -0.2% per DC
to -0.03% per °C
per °C

If we are considering a ceramic ring magnet with a worst-case
temperature coefficient of -0.2%/oC, we must add some extra flux
density to the requirement at room temperature to ensure that we still
have +300 G per south pole at +85°C. This amount is:
[(85°C - 25°C) x 0.2%fDC] 300 G = +36 G

First, find the total effective air gap:
TEAG = clearance + package
contribution
TEAG = 0.030" + 0.016" = 0.046"
Now, determine the necessary flux
density sufficient to operate the Hall switch,
plus 40%.
To operate the Hall switch, the magnet
must supply a minimum of ±200 G at a
distance of 0.046" over the entire temperature
range. Good design practice requires the
addition of extra flux to provide some margin
for aging, mechanical wear, and other imponderables. If we add a pad of 100 G, a reasonable number, the magnet required must
supply ±300 G at a distance of 0.046" over
the temperature range.

Thus, the flux density that will ensure that the Hall switch will operate
over temperature is 300 G + 36 G = 336 G per south pole at +25°C.
Follow the same procedure for the north pole requirements. If the
magnet will supply +300 G per south pole and -300 G per north pole at
+85°C, it will supply even more flux density per north pole at -20°C
because of the negative temperature coefficient.
In applications where temperature conditions are more severe,
Alnico magnets are considerably better than the ceramic magnets
we considered. It is also possible to order custom Hall switches with
specifications tailored to your application. For example, you can specify
a range of operate and release pOints at a particular temperature, with
temperature coefficients for operate and release points, if that is better
suited to your application. On a custom basis, Hall switches are available with operate and release point temperature coefficients of less
than 0.3 G/oC, and with operate flux densities of less than 100 G.
If you intend to use a low-cost, low flux density ring magnet, then
the UGN3130U device in the 0.060" package would be a good choice.
The package contribution is 0.016", which results in a significant
improvement in peak flux density from a magnet, as shown in
Figure 25.
If the rotor drive can withstand an increased torque requirement,
consider a ferrous flux concentrator. Flux density can be increased by
10% to 40% in this manner. A concentrator of 0.03125" mild steel
having the same dimensions as, and cemented to, the back surface of
the Hall switch, will increase flux density by about 10%. A return path of
mild steel from the back side of the device to the adjacent poles can
add even more. Often the functions of mounting bracket and flux
concentrator can be combined. Additional information can be found in
the section on flux concentrators.

4-84

0

RING MAGNETS
-DETAILED DISCUSSION
AN INEXPENSIVE ALTERNATIVE
Innovative design can produce surprisingly good results. Rubber
and plastic magnet stock comes in sheets. One side of the sheet is
magnetic north; the other side is south. This material is relatively
inexpensive and can easily be stamped or die-cut into various shapes.

5

0

5

5

5

5
Dwg. No. 13,129

These properties prompted one designer to fabricate an inexpensive magnetic rotor assembly that worked very well. The rubber magnet
stock was die-cut into a star-shaped rotor form, as shown in Figure 27.
A nylon bushing formed a bearing, as shown in Figure 28.

FIGURE 27
Finally, a thin mild steel backing plate was mounted to the back of
the assembly to give mechanical strength and to help conduct the flux
back from the north poles on the opposite side. This actually served
to form apparent north poles between the teeth; the measured flux
between south pole teeth is negative. Figure 29 shows the completed
magnetic rotor assembly, essentially a ring magnet with axial poles.
The Hall switch was mounted with its active surface close to the top
of the rotor assembly, facing the marked poles. There is some versatility in this approach, as asymmetrical poles can be used to fabricate a
rotor that wll allow trimmable ON time and, thus, work as a timing cam.
Figure 30 illustrates a cam timer adjusted to 180 0 ON and 180 0 OFF.
Dwg. No. 13,130

FIGURE 28

RING MAGNET SELECTION
When you discuss your application with a magnet vendor, the
following items should be considered:
Mechanical Factors
•
•
•
•
•

Dimensions and tolerances
Mounting hole type and maximum eccentricity
Rotational speed
Mechanical support required
Coefficient of expansion

Magnetic Factors
Dwg. No. 13,131

FIGURE 29

•
•
•

Poles: number, orientation, and placement accuracy
Flux density at a given TEAG (remember to add the Hall switch
package contribution to the clearance figure)
Magnetic temperature coefficient

Environmental Factors
• Tolerance of the material to the working environment (temperature,
chemical solvents, electric potentials)

Dwg. No. 13,132

FIGURE 30

4-85

Flux density curves from several typical
ring magnets are included to present an idea
of what can be expected from various sizes
and materials. Figure 31 shows the curve for
a ring similar in size and material to that of
Figure 25, but with 10 pole-pairs instead of
20 (note increased flux density values).
Figure 32 shows the curve from a one polepair Alnico 8 ring. Figure 33 shows the curve

from a three-pole-pair Ceramic 1 ring. Figure 34 shows the curves
from a four-pole-pair Ceramic 1 ring, with and without a ferrous flux
concentrator.
Incoming inspection of ring magnets is always advisable. You can
ensure the magnets are within the agreed upon magnetic specifications
by making measurements with a commercial gaussmeter, or a calibrated linear Hall device mounted in a convenient test fixture. Calibrated UGN3503U Hall devices and technical assistance are available.

10-POLE-PAIR PLASTIC 1 (RAOIAL POLES)

l-POLE-PAIR ALNICO 8 (AXIAL POLES)

400r------r,--------,-------,

400r-------,-------~-------,

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300

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100

100

'"
O~

____

~~

o

____

L_~

0.05

+~

_ _ _ _ _ __ J

0.10

.L~.75"""t! t-TE G

0.2"on~
O~

o

0.15
Owg. No. 13,133

TOTAL EFFECTIVE AIR GAP (INCHES)

3-PQLE-PAIR CERAMIC 1 (RADIAL POLES)

\\

300

"

~

...

>-

iii

zw
C

200

N

)(

...::>u.
w

z

""::;

::>

o

o

0.;5~

0.10

r\

0.15
Dwg. No. 13,134

300

...iii
z

w
C

~

200

)(

...::>u.
U

;::
W

z

"::;"

100

,
0.20

TOTAL EFFECTIVE AIR GAP (lNCHESI

FIGURE 33

4-86

~

">-

O·L~fTEG
N

____

~

S

t

~

0,10

4-POLE-PAIR CERAMIC 1 (RADIAL POLES)

iii
U)

~

l'

100

__

400r-----~,,~----_.-------,

@

U

;::

~

FIGURE 32

400

::>

0.05

TOTAL EFFECTIVE AIR GAP (INCHES)

FIGURE 31

iii
U)

__________
0.125"

O~----------~--~-------J
o
0.20
0.10

0.30
Dwg. No. 13,135

TOTAL EFFECTIVE AIR GAP (INCHES)

FIGURE 34

Dwg. No. 13,136

FERROUS VANE
ROTARY ACTIVATORS
A ferrous vane rotor assembly is the
alternative to magnetic rotors for rotary Hall
switch applications. As shown previously,
a single magnet will hold a Hall switch ON
except when one of the rotor vanes interrupts
the flux path and shunts the flux path away
from the Hall switch. The use of a single stationary magnet allows very precise switching
by eliminating ring magnet variations, placement, and strength. Unlike the evenly spaced
poles on ring magnets, the width of rotor
vanes can easily be varied. It is possible

to vary the Hall switch OFF and ON times, which gives the designer
control over the duty cycle of the output waveform. Ferrous vane rotors
are a good choice where precise switching is desired over a wide range
of temperatures. As the vane passes between magnet and Hall switch,
progressively more flux will be blocked or shunted. Small variations in
lateral position have a very small effect on the transition point.

A FERROUS VANE IN OPERATION
Figure 35 combines top and front views of a ferrous vane magnet!
Hall switch system with the graph of flux density as a function of vane
travel produced by this system. Note that the drawings and the graph
are vertically aligned along the horizontal axis. Position is measured
from the leading edge of the vane to the centerline of the magnet!
Hall device.

2.5'0 CUP VANE

1150 GIDEGREE)

TOTAL EFFECTIVE AIR GAP

FERROUS VANE

t22.5Iww.~
~

HALL

ACTIVE

y,-rI

TOP VIEW

AREA

1 _
/

I

D- ~5t"m
..,""
r
FERROUS VANE

1

FRONT VIEW

1-_ _ _I -_ _-+-_ _ _I-i::;--_-+-_---;lt::::.~EFFECTIVE

VANE WIDTH _

"""I ~ ""

I

!>---OPERATE POINT

Dwg. No. 13,137

4-87

Initially, when the vane is located entirely
to the left of the magnet, the vane has no
effect and the flux density at the sensor is at
a maximum of 800 G. As the leading edge
of the vane nears the magnet, the shunting
effect of the vane causes the flux density to
decrease in a nearly linear fashion. There,
the magnet is covered by the vane and flux
density is at a minimum. As the vane travels
on it starts to uncover the magnet. This allows
the flux to increase to its original value. After
that, additional vane travel has no further
influence on flux density at the sensor.
A Hall switch located in the position of the
sensor would initially be ON because of the
presence of the magnetic field. Somewhere in
the linearly decreasing region, the flux would
fall below the release point, and the Hall
switch would turn OFF. It would remain OFF
until the increasing flux reaches the operate
point for that particular Hall switch. Recall that
the operate point flux density is greater than
the release point flux density by the amount of
hysteresis for that particular Hall switch.
The interval during which the Hall switch
remains OFF is determined by the actual
width of the vane and the steepness of the
magnetic slope, as well as by the operate and
release point flux density values for the Hall
switch. This interval is called the effective
vane width, and it is always somewhat greater
than the physical vane width.

ROTOR DESIGN
Two commonly used rotor configurations are the disk and the cup, as shown
in Figure 36.

as machine control. Axial movement of the rotor must be considered.
Vane activated switches tolerate this quite well, but the rotor must not
hit the magnet or the Hall switch.
Cup rotors are somewhat more difficult to fabricate and so are more
expensive, but dealing with a single radial distance simplifies calculations and allows precise control of the output waveforms. For cup
rotors, radial bearing wear or play is the significant factor in determining
the clearances, while axial play is relatively unimportant. Cup rotors
have been used ve[y successfully in automotive ignition systems. The
dwell range is determined by the ratio of the vane-to-window widths
when the rotor is designed. Firing point stability may be held to ±0.005
distributor degrees per degree Celsius in a well-designed system.

MATERIAL
Vanes are made of a low carbon steel to minimize the residual
magnetism and to give good shunting action. The vane thickness is
chosen to avoid magnetic saturation for the value of flux density it must
shunt. Vanes usually are between 0.03" and 0.06" thick.

VANE/WINDOW WIDTHS, ROTOR SIZE
Generally, the smallest vanes and window on a rotor should be at
least one and one-half times the width of the magnet pole to provide
adequate shunting action and to maintain sufficient differential between
the OFF and ON values of flux density.
In Table 1, the maximum flux density (obtained with window centered over the magnet, the minimum flux density (vane centered over
the magnet), and the difference between the two values are tabulated
for three cases:
1. Vane and window width the same as magnet pole width.
2. Vane and window width one and one-half times magnet
pole width.
3. Vane and window width two times the magnet pole width.
In each case the magnet is 0.25" x 0.25" x 0.125" samarium cobalt·
the air gap is 0.1 "; the rotor vanes are made of 0.04" mild steel stock. '

The disk is easily fabricated and, hence,
is often used for low-volume applications such

TABLE I
Window Vane Width Factor

DISK

CUP

Dwg. No. 13,113

FIGURE 36
4-88

Flux Density with
Window Centered

1.0

1.5

2.0

630 G

713 G

726G

Flux Density with
Vane Centered

180 G

100 G

80 G

Flux Change Density

450G

613 G

646 G

If a small rotor with many windows and vanes is required, a miniature rare earth magnet must be used to ensure sufficient flux density for
reliable operation. For example, a 0.1" cubical samarium cobalt magnet
makes it practical to fabricate a 1.25" diameter rotor with as many as 10
windows and vanes. With fewer vanes, even further size reduction is
possible.

TABLE 2
Curve

Magnet

Air Gap

Slope G/mil

'Concentrator

A

0.25"0, 0.25"L Samarium Cobalt

B

0.25"0, 0.25"L Samarium Cobalt

0.1"

14

Yes

0.1"

9.85

No

C

0.25"0, 0.125"L Samarium Cobalt

0.1"

9.0

Yes

°

0.25"0, 0.125"L Samarium Cobalt

0.125"

8.7

Yes

E

0.25"0, 0.125"L Samarium Cobalt

0.1"

7.8

No

F

0.25"0, 0.125"L Samarium Cobalt

0.125"

6.3

No

G

0.25"0, 0.125"L Samarium Cobalt

0.125"

5.6

Yes

H

0.25"0, 0.125"L Samarium Cobalt

0.125"

4.5

No

NOTE: The "U" package is used for all measurements:

STEEP MAGNETIC SLOPES FOR CONSISTENT SWITCHING
1000

800

5IG/MIL-~

600
2.5 G/MILI
400

1200

17

If H

--o·r·

I- 0.02·

o
-300

~

r-

-200

-100

100

200

300

VANE POSITION (MILS)

Dwg. No. 13,139

FIGURE 37

The flux density vane travel graph for most common vane configurations (Figure 35), is very nearly linear in the transition regions. The
Hall switch operate and release points fall in these linear transition
regions, and it is easily seen that if these values change, the position
of the vane which causes the switching must change also. Figure 37
shows the flux density as a function of vane position for two different
magnetic circuits. In one case, the magnetic slope is 2.5 G/mil. In the
second case, it is 5.0 G/mil.
If the 2.5 G/mil system is used with a Hall switch known to have an
operate point flux density of 300 G at + 25°C, the device would switch
ON when the vane is 85 mils past the center of the window at this
temperature. If the Hall switch operate point went up to 400 G at a
temperature of + 125°C (this represents Hall switch temperature coefficient of 1 G/°C), the vane must move to 120 mils past center, a change
in switching position of 45 mils. If the same Hall switch is used in the
second system having the 5 mil/G slope, the operate point would shift
only 20 mils, or half as much, since the slope is twice as steep.
Slopes in typical vane systems range from 1 G/mil to 15 G/mil, and
are affected by magnet type and size, the magnetic circuit, and the total
effective air gap. It is interesting to note that, although slide-by operation can give very steep slopes, the transition point is much affected by
lateral motion (change in air gap); therefore, vanes are often preferred
for applications involving play or bearing wear.

SMALL AIR GAPS FOR STEEP SLOPES
The air gap should be as small as the mechanical system allows.
Factors to be considered are:
Vane material thickness and vane radius.
Maximum eccentricity for cup vanes.
Bearing tolerance and wear.
Change in air gap with temperature due to
mounting considerations.

4-89

1000

2..

YMBOL

1

900

3 ...

AIR GAP

SLOPEIGfMILl

*CONC.

0.1'

14

YES

0_2S-D,0.2S-L SAM.CO

0.1"

9.85

NO

0.2S"D,O.12S-L SAM.CO.

0.1"

'.0

YES

0.2s·D,0.2S'L SAM,CO

0.125"

8.1

YES

518)

0.2S"D,O,12S'L SAM.co,

0.1-

1.8

NO

60

0.2S'O,O.2S'L SAM.CO

O.12S"

6.3

NO

1 A

0.2S"D,O.12S"L SAM.CO,

0.125-

5.6

YES

8 D

0.2s"D,o.12S'L SAM.co.

0.12S"

4.5

NO

4

800

•

MAGNET
.2S-D,0.2S-L SAM_CO

NOTE - THE 'U- PACKAGE IS USED FOR ALL MEASUREMENTS

100

oI

[]:::l *0.125"D,0.25-L

N

600

S

MILD STEEL

Dwg, No, 13,140

VANE LEADING EDGE TO HALL SWITCH/MAGNET CENTERLINE (MILS)

FIGURE 38
In Figure 38, two different samarium cobalt magnets are used in a
vane system to illustrate the effects of changes in air gap and magnet
size. Note that only the falling transition region is shown (transition
regions are symmetrical). The distances on the horizontal axis have
been measured from the leading edge of the vane.
The term "air gap" as used in Figure 38 is not the total effective air
gap; but is simply the distance from the face of the magnet to the
surface of the Hall switch. It does not include the package contribution.
The "U" package is often used in ferrous vane applications because it
has a shallow active area depth.
4-90

FLUX CONCENTRATORS
PAY DIVIDENDS

point at +25°C, plus a maximum temperature coefficient on these
parameters over the operating temperature range. Representative
specifications might be:

What if economic or size considerations
dictated the smaller magnet used in Figure
38, and mechanical considerations dictated
the larger (0.125") air gap, but the resulting
flux density and slope (Curve 8) were not
good enough? Curve 7 in Figure 38 shows
the very substantial improvement that can be
achieved by adding simple flux concentrators.
Those used in the example were 0.125" in
diameter by 0.250" long, and were fastened
behind the Hall switch.

+25°C Operate Point, Minimum .............................................. 300 G
+25°C Operate Point, Maximum ............................................. 450 G
+25°C Release Point, Minimum .............................................. 200 G
Temperature Coefficients:

DESIGN EXAMPLE

= +0.7 GfOC

6.. R.P.!6.. T, maximum

= + 1.0 GfOC

Solid-state Hall effect ignition systems can be designed to fire
either on operate or release of the Hall switch. We have arbitrarily
chosen to have the system in this example fire when the switch operates and, thus, the operate point specifications of the Hall switch
(between 300 and 450 G at + 125°C) will determine the amount of
uncertainty in the initial timing of the spark. It is possible that the
mechanical system would also make a contribution, but that is not
considered here.

The magnet/concentrator configuration
we just considered (Curve 7, Figure 38)
seems to offer a high performance/cost ratio.
Following is an evaluation of its use in an
automotive ignition system using a 2.5"
diameter cup rotor.
The initial timing and wide operating
temperature range requirements for this
application have generally led designers to
specify custom Hall switches in terms of the
minimum and maximum operate or release
700

6.. O.P.!6.. T, maximum

Figure 39 shows the measured flux density at the pOSition of the
sensor as a function of the vane travel. The shape of the curve requires
explanation: Because the flat minimum and maximum flux regions are
irrelevant, it is convenient to measure from the vane's leading edge to

\

600

1\

500

\

40 0

I

+25

10 0

0
-200

MAGNETIC SLOPE
5.67 G/Mll
124 G/OIST. DEGREE

/

h
'---I

;'-+

·C·'MIN.REL ASE POINT

Soc OPERA E POINT M X .(450 GI

/

\

30 0

20 0

V

(2.S"DIAMETER VANE)

1\ /
W\ /-

'1.20

+25 0

!--'N

F OPERATE

OINT MIN,t DOG)

IAL TIMING UNCERTAI

150
100
-50
50
-150
-100
VANE LEADING(-) OR TRAILING(+) EDGE TO HALL SWITCH/MAGNET CENTERLINE(MILS)

Y@+2SoC

200
Dwg. No. 13,141

FIGURE 39

4-91

edge of the vane to the magnet centerline
while plotting data for the rising transition.
(The same presentation would result if all
data were plotted while a vane passed the
magnet, the center low flux areas were
snipped out, and the ends containing the
linear transitions were pulled together.) From
this graph, we can identify the magnetic slope
of the transition regions for our systemapproximately 5.67 G per 0.001" of vane
travel.

Additional contributions to the initial timing uncertainty will result if
the total effective air gap is changed, as that would affect the shape or
slopes of the magnetic flux density/vane travel curve of Figure 39.
Factors to be considered are the magnet peak energy product tolerances, as well as manufacturing tolerances in the final Hall switch/
magnet assembly.

TEMPERATURE STABILITY OF OPERATE POINT
The Hall switch operate point temperature coefficient is approximately 0.2 G/oC for a UGN/UGS3130. To translate this into distributor
degrees per degree Celsius, we take:

Calculations based on the rotor diameter
(2.5") show we have 22 mils of vane travel
per distributor degree. The 5.67 G/mil slope
obtained from Figure 39 is equivalent to 125
G per distributor degree. From the specifications, it is known that the Hall switch will
operate when flux is between 300 and 450 G,
leaving a 150 G window of uncertainty. At
+25°C, this will be:

150 G x

0.2 G
1°C

-- x

Distributor Degrees
125 G

0.0016 Distributor Degrees/oC
The distributor timing would, therefore, change 0.16 degrees for a
temperature change of 100°C.
A typical samarium cobalt magnet temperature coefficient is
-0.04%/oC. A magnetic field of 375 G at +25°C would decrease to 360
G at + 125°C. For Figure 40, our system has a magnetic slope of 5.67
G/mil, giving an additional vane travel requirement at + 125°C of:

Distributor Degree
125 G

1.2 Distributor Degrees

~ = 2.7 mils

(375 G-360 G) x

5.67G

700

(2.5"DJAMETEA VANE)

\

600

\

500

400

~/

MAGNETIC SLOPE

5.67 G/MIL
124 G/OIST. DEGREE

\r

4---0,073"

0.050'_1--0 .06 ' -

tJ(.,
IA.25.

II
5° C QPER

OPERATE

E POINT (4 5G1

OINT 1375

)

125°C REL ASE POINT 360G,A
300

~'04'.
+25°C R LEASE

por T (260m

200

\/

10 0

-200

-150

-100

/

-50

50

100

150

VANE LEAOING{-) OR TRAILlNG("" EDGE TO HALL SWITCH1MAGNET CENTERLINEIMILS)

FIGURE 40

4-92

200
Dwg. No. 13,142

This translates to timing change of:

2.7 mils x

then be'

. 450 + [ (73 mils + 58 mils) x

Distributor Degree

22 mils

0.12 Distributor Degrees
for a temperature change of 1000 e.

CALCULATING DWELL ANGLE AND
DUTY CYCLE VARIATIONS
The dwell angle in a conventional system
is the number of distributor degrees during
which the points are closed, which corresponds to the amount of time current can flow
in the coil's primary winding. In our example,
current flows in the coil primary from the time
the Hall switch releases until it operates,
which is called the effective vane width. For
nostalgic reasons we will assume an eightcylinder engine, which requires a distributor
rotor with eight windows and eight vanes of
equal size. One window-vane segment thus
occupies 45 distributor degrees and will fire
one cylinder. Let us further assume a typical
Hall switch operate point of 375 G at +25°e
(A), and a +25°e release point of 260 G (B).
From Figure 40 we find that the points will
close 40 mils before the vane's leading edge
passes the magnet centerline; they open 60
mils after the vane's trailing edge passes the
magnet centerline. The effective vane width is
greater than the mechanical vane width by an
amount:

(60 mils + 40 mils) x

D' 'b t D
]
Istn u or. egree =
22 mils

Distributor Degree
.
22 mils

4.54 Distributor Degrees
This gives a dwell angle of

(45° + 4.54°) = 49.54 distributor degrees
at +25°e. The duty cycle is:

50.9 Distribution Degrees
The duty cycle is then:

50.9°
- - =56.6%
90°

EFFECTS OF BEARING WEAR
A ±1 0 mil radial movement of the vane, with its position adjusted to
the approximate operate point of the Hall switch, gave a measured
change of ±6 G. This translates into a change of:

6Gx

Distributor Degrees
125 G

0.048 Distributor Degrees,
which is equivalent to 0.097 crankshaft degrees.

MOUNTING ALSO AFFECTS STABILITY
In the example above, it was assumed that the physical relationship
between the Hall switch and the magnet was absolutely stable. In
practice, it is necessary to design the mountings with some care if this
is to be true. It has been found that supporting the magnet or Hall
switch with formed brackets of aluminum or brass will often contribute
a significant temperature-related error to the system. Use of molded
plastic housings has proven to be one of the better mounting
techniques.

INDIVIDUAL CALIBRATION TECHNIQUES
In some applications, it may be desirable to have the vane switch
assemblies operate within a narrower range of vane edge positions
than is possible with a practical operate point specification for the
Hall switch; for example, if it were necessary to reduce the initial
timing window in the previous case. One solution would be individual
calibration. Possible techniques include:

1) Adjusting the air gap by changing the magnet position.
49.54° = 55.0% at +25°e.
90°

2) Adjusting the position of a flux concentrator behind the
Hall switch.

Using the specified worst-case temperature coefficients, we calculate the new
operate and release points at + 125°e to be
445 G (e) and 360 G (D), also shown in
Figure 40. The dwell angle at + 125°e would

3) Adjusting the position of a small bias magnet mounted
behind the Hall switch.
4) Demagnetizing the magnet in small increments that would
decrease the magnetic slope and, thus, increase the
temperature effects.

5) Adjusting the position of the Hall switch-magnet assembly
relative to the rotor in a manner similar to rotating an
automotive distributor to change the timing.

4-93

OPERATING MODES
HEAD-ON AND SLIDE-BY MODES

HEAD.ON ALNICO 8 0.212"0 X 0.187"

\

f

\G'MIL

TEAG

8I

\
0

"'" 'I'---

0

0.2

TOTAL EFFECTIVE AIR GAP (INCHES)

.

Dwg. No. 13,144

FIGURE 41
SLlDE·BY, ALNICO 8, 0.212"0 X 0.187"

lOooll~~~
...
SYMBOL
0

TEA G
0.050"
0.065'

'"

0.095"

0

SLOPE (GfMIU

'.7
3.'
2.'

The most common operating modes are head-on and slide-by. The
head-on mode is simple and relatively insensitive to lateral motion, but
cannot be used where overextension of the mechanism might damage
the Hall switch. The flux density plot for a typical head-on operation
(Figure 41) shows that the magnetic slope is quite shallow for low
values of flux density, a disadvantage that generally requires extreme
mechanism travel and extreme sensitivity to flux changes in operate
and release points of the Hall switch. This problem can be overcome
by selecting Hall switches with higher operate and release properties.
The slide-by mode is also simple, can have reasonably steep
slopes (to about 10 G/mil) and has no problem with mechanism overtravel. It is, however, very sensitive to lateral play, as the flux density
varies dramatically with changes in the air gap. This can be seen clearly
in the curves of Figure 42, in which the flux density curves are plotted
for actual Slide-by operation with various air gaps. It is apparent that
the operating mechanism can have little side play if precise switching
is required.

OPERATING MODE ENHANCEMENTS
-COMPOUND MAGNETS
PUSH-PULL

200

f---j---+---""'&---l----l

0~0---~---L---~--~~--~0.25
DISTANCE D, MAGNET fiNCHES)
TO PACKAGE, CENTER LINES

Dwg. No. 13,143

FIGURE 42

Because the active area of a Hall switch is close to the branded
face of the package, it is usually operated by approaching this face with
a magnetic south pole. It is also possible to operate a Hall switch by
applying a magnetic north pole to the back side of the package. While a
north pole alone is seldom used, the push-pull configuration (simultaneous application of a south pole to the branded side and a north pole
to the back side) can give much greater field strengths than are possible with any single magnet (Figure 43). Perhaps more important,
push-pull arrangements are quite insensitive to lateral motion and are
worth considering if a loosely fitting mechanism is involved.
Figure 44 shows the flux density curve for an actual push-pull slideby configuration that achieves a magnetic slope of about 8 G/mil.

PUSH-PUSH
Another possibility, a bipolar field with a fairly steep slope (which is
also linear), can be created by using a push-push configuration in the
head-on mode. (Figure 45)
In the push-push mode, head-on configuration as shown in Figure
45, the magnetic fields cancel each other when the mechanism is
centered, giving zero flux density at that position. Figure 46 shows the
flux density plot of such a configuration. The curve is linear and moderately steep at better than 8 G/mil. The mechanism is fairly insensitive to
lateral motion.
PUSH-PULL

SLIDE-BY

Dwg. No. 13,145

FIGURE 43

4-94

stronger field in the opposite direction approached the opposite face.
(Figure 47)

BIASED OPERATION
It is also possible to bias the Hall switch
by placing a stationary north or south pole
behind it to alter the operate and release
points. For example, a north pole attached
to the reverse face would turn the device
normally ON until a north pole providing a

Figures 48-51 demonstrate four additional slide-by techniques.
Compound magnets are used in push-pull, Slide-by, edgewise configurations to achieve a rnagnetic slope of 17.4 G/mil. Rare earth magnets
may be used to obtain substantially steeper slopes. A flux density curve
of up to 100 G/mil is obtainable.

PUSH-PULL SLIDE-BY, ALNICO 8, 212"0 x 0.187"
2000...-_ _
-,-_ _ _,-_ _...._ _-,_ __

Or

16001----t----t--1

1200

~

l:::::::--+---r---i

800r---+--~~--~---i--~

4001-----+---I---e"k-----i-----j

0.05

0.10

0.15

0.25

0.20

DISTANCE 0 (INCHES)

Dwg. No. 13,147

Dwg. No. 13,146

FIGURE 45

FIGURE 44

500

~
-.l V

300

~

.

100

/

~
Q

X

~

iii"
~,.

x 0.187"

V

0.205.l-/

g
)-

a 212"0

PUSH PUSH HEAD-ON ALNICO 8

-100

-30

-50

0

O~

-0.06

L

-0,04

V

.... 8.44 GIMIL

/
HEAD-ON

-0.02

a

0.02

0.04

0.06

MAGNET ASSEMBLY TRAVEL {INCHES)

Dwg. No. 13,148

FIGURE 46

Dwg. No. 13,149

FIGURE 47

4-95

PUSH·PULL, EDGEWISE SLlDE·BY, ALNICO B, 0.212"0 x 0.1B7"

EDGEWISE SLlDE·BY ALNICO 8 0212"0 x 0 187"

1000

1000

500

soo

,.... "

.. ~

0.0"·

~
f-----+---:;;>,L.I----+-----lf---+---I

-500

-10~~."L-----O.LO.-----O.L.O.---01---0...J.OL..---O...J.OL..---O.J"

-100 0

-500

-0.6

-0.4

t~

/\ "\

J

8.1SG/MIL

'-J

-0.2

DISTANCE 0 (INCHES)

0.6

0.2
DISTANCE D (lNCHESI

Dwg. No. 13,150

Dwg. No. 13,151

FIGURE 49

FIGURE 48

ALNICO 8, 0.212"0 x 0.187"
PUSH-PULL SLIDE-BY, COMPOUND MAGNETS

SLIDE-BY COMPOUND, ALNICO 8, 0.212"0 x 0.187"

"00

'--;----.----.----.------1---.,.......,
TEAGLJ

500

f-_-+ ___1--_+++_-I

0 044
.
'

~ I~

T~

D

1000

I:

l--

~_~s J,
TN~

I---t-+-H'----+---\-t---I'-+---l
-600

-100~0'':.6:---0;!-. •;--~-0:':.2:---~---=0.':-2----=-0.•~-~~
DISTANCE D !INCHES)

/v

--jot-

600

200

-500

/v

-1000
-0.06

-0.04

/

/

/

V

/

-0.02

~'MIL

0.02

4-96

0.04

0.0$

DISTANCE D [INCHES)

Dwg. No. 13,152

FIGURE 50

·0·

Dwg. No. 13,153

FIGURE 51

INCREASING FLUX DENSITY
BY IMPROVING
THE MAGNETIC CIRCUIT

However, magnetic flux easily flows through a ferromagnetic
material such as mild steel. The reluctance of air is greater by a factor
of several thousand than that of mild steel.

Magnetic flux can travel through air,
plastic, and most other materials only with
great difficulty. Since there is no incentive
for flux from the activating magnet to flow
through the (plastic and silicon) Hall device,
only a portion of it actually does. The balance
flows around the device and back to the other
pole by whatever path offers the least resistance. (Figure 52)

In a Hall device application, the goal is to minimize the reluctance
of the flux path from the magnetic south pole, through the Hall device,
and back to the north pole. The best possible magnetic circuit for a Hall
device would provide a ferrous path for the flux, as shown in Figure 53,
with the only "air gap" being the Hall device itself.
While a complete ferrous flux path is usually impractical, unnecessary, and even impossible in applications requiring an undistorted or
undisturbed flux field, it is a useful concept that points the way to a
number of very practical compromises for improving flux density.
FLUX CONCENTRATORS

Flux concentrators are low carbon (cold-rolled) steel magnetic
conductors. They are used to provide a low reluctance path from a
magnet's south pole, through the Hall sensor, and back to the north
pole. Flux concentrators can take many forms and will often allow use
of smaller or less expensive magnets (or less expensive, less sensitive
Hall devices) in applications where small size or economy are important. They are of value whenever it is necessary or desirable to increase flux density at the Hall device. Increases of up to 100% are
possible.
Dwg. No. 13,154

FIGURE 52

An example of the effectiveness of a concentrator is illustrated in
Figures 54(A) and 54(B).
(A) The south pole of a samarium cobalt magnet 0.25" square and
0.125" long, is spaced 0.25" from the Hall switch. There is a
flux density of 187 G at the active area.

MILD STEEL

(8) With a concentrator 0.125" in diameter and 0.5" long, the flux
density increases to 291 G.

SIZE OF THE CONCENTRATOR

Dwg. No. 13,155

FIGURE 53

The length of the concentrator also has an effect on the flux
density. This is illustrated in Figure 56.

B=291G

S"187G

The active area of the Hall device is typically 0.01" square. Best
results are obtained by tapering the end of the concentrator to approximately the same dimensions. With the "U" package, however, there is
0.044" from the active area to the rear surface of the package. Due to
this 0.044" distance, a slightly larger end to the concentrator results in
higher values of flux density at the active area. If the end is too large,
the flux is insufficiently concentrated. Figure 55(A), (B), and (C) illustrates these effects using cylindrical flux concentrators and a 0.25" gap.

(BI

Cylindrical concentrators were used here for convenience, but
the body of the concentrator has little effect. The important factors
are the shape, position, and surface area of the magnet end nearest
the Hall sensor.

Dwg. No. 13.156

FIGURE 54

4-97

The effectiveness of other concentrator
configurations can be measured easily by
using a calibrated linear Hall device, such as
the UGN3503U, or a commercial gaussmeter.

adjacent north poles, flux density increases from 265 G to 400 G
(0.015" air gap). Note that the concentrator has a dimple, or mesa,
centered on the Hall device. In most applications, the mesa will give a
significant increase in flux density over a flat mounting surface.

MOUNTING THE MAGNET TO
A FERROUS PLATE

ATTRACTIVE FORCE AND DISTORTED FLUX FIELD
Whenever a flux concentrator is used, an attractive force exists
between magnet and concentrator. That may be undesirable.

Mounting the magnet to a ferrous plate
will give an additional increase in flux density
at the Hall element. Using the same configuration as in Figure 55(C), which produced 291
G, note the available flux attained in Figure
57(A) and (6) with the addition of the ferrous
plate.

FEED-THROUGHS
An example of the use of a magnetic conductor to feed flux through
a nonferrous housing is shown in Figure 59. A small electric motor has
a 0.125" cube samarium cobalt magnet mounted in the end of its rotor,
as shown. A 0.125" cube ferrous conductor extends through the alloy
case with a 0.031" air gap between it and the magnet's south pole. The
Hall switch is mounted at the other end with a flux concentrator behind it.

Figure 58 shows a possible concentrator
for a ring magnet application. Using a flux
concentrator that extends to both of the

8=261 G
0.25-0, O.S"L
TAPERED
TO 0.02"

(TOO SMALL)

8=269 G

0.25··0, a.sol

~B~

(TOO LARGE)

-E3;3---tl~

(A)

8"'291 G

0.125D.

o.n

(8)

~-tr-

~

(e)

Dwg. No. 13,157

FIGURE 55
8=357 G

tt°.5"SQUARE

SAMARIUM COBALT,0.12S·'D,0.2S"GAP

~_~

400...---------r-------.,

~

to.032' MILD STEEL)

(A)

8=389 G

l'SQUARE

to.032' MILD STEEl)

a

0.5
1,0
CONCENTRATOR -LENGTH (INCHES)

FIGURE 56

4-98

Dwg. No. 13,159

Dwg. No. 13,158

FIGURE 57

MAGNET SELECTION

In general, the feed-through should be of
approximately the same cross-sectional area
and shape as is the magnet pole.

A magnet must operate reliably with the total effective air gap in the
working environment. It must fit the available space. It must be mountable, affordable, and available.

This concept can be used to feed flux
through any non-ferrous material, such as a
pump case, pipe, or panel.

FIGURES OF MERIT
The figures of merit commonly applied to magnetic materials are:

The two curves of Figure 60 illustrate the
effects on flux density of increasing the length
of the feed-through, as well as the contribution by the flux concentrator behind the Hall
switch. Values for curve A were obtained with
the flux concentrator in place, those for curve
B without it. In both cases, the highest flux
densities were achieved with the shortest
feed-through dimension L, which was 0.125".
Peak flux density was 350 G with flux concentrator in place, 240 G without it.

Residual Induction (B,) in gauss: How strong is the magnetic field?
Coercive Force (Hcl in oersteds: How well will the magnet resist
external demagnetizing forces?
Maximum Energy Product (BHma,} in gauss-oersteds times 106 •
A strong magnet that is also very resistant to demagnetizing forces
has a high maximum energy product. Generally, the larger the energy
product, the better, stronger, and more expensive the magnet.

o

Dwg. No. 13,160

Dwg. No. 13,161

FIGURE 59

FIGURE 58

400~-----'-------r---------------------'

~

=>

.
L'U:~'~r:;r~
~. . "
----

300

SAM. CO.

~

>1=

~

!l

200

~

tJ

~

,.".

100

o~----~------~------~------~----~

o

0.125

0.250

0.376

CONDUCTOR LENGTH, L (INCHES)

0.500

0.625
Dwg. No. 13,162

FIGURE 60

4-99

Temperature Coefficient: The rate of
change of the operate or release point over
temperature, measured in gauss per degree
Celsius. How much will the strength of the
magnet change as temperature changes?

Rare Earth-Cobalt is an alloy of a rare earth metal, such as
samarium, with cobalt (abbreviated RE cobalt). These magnets are the
best in all categories, but are also the most expensive by about the
same margins. Too hard for machining, they must be ground if shaping
is necessary. Maximum energy product, perhaps the best single
measure of magnet quality, is approximately 16 x 106 •

MAGNETIC MATERIALS

Alnico is a class of alloys containing aluminum, nickel, cobalt, iron,
and additives that can be varied to give a wide range of properties.
These magnets are strong and fairly expensive, but less so than RE
cobalt. Alnico magnets can be cast, or sintered by pressing metal
powders in a die and heating them. Sintered Alnico is well suited to
mass production of small, intricately shaped magnets. It has more
uniform flux density, and is mechanically superior. Cast Alnico magnets
are generally somewhat stronger. The non-oriented or isotropic Alnico
alloys (1, 2, 3, 4) are less expensive and magnetically weaker than
the oriented alloys (5, 6, 5-7,8, 9). Alnico is too hard and brittle to be
shaped except by grinding. Maximum energy product ranges from
1.3 x 106 to 10 x 106 •

Neodymium (Ne-Fe 8)-The new
neodymium-iron-boron alloys fill the need for
a high maximum-energy product, moderately
priced magnet material. The magnets are
produced by either a powdered-metal technique called orient-press-sinter or a new
process incorporating jet casting and conventional forming techniques. Current work is
being directed toward reducing production
costs, increasing operating temperature
ranges and decreasing temperature coefficients. Problems relating to oxidation of the
material can be overcome through the use of
modern coatings technology. Maximum
energy products range from 7.0 to 15.0
MGOe depending on the process used to
produce the material.

Ceramic magnets contain barium or strontium ferrite (or another
element from that group) in a matrix of ceramic material that is compacted and sintered. They are poor conductors of heat and electricity,

TABLE 4
Properties of Magnetic Materials

Material

Maximum Energy
Product
(Gauss-Oersted)

Residual
Induction
(Gauss)

Coercive Force
(Oersteds)

R.E. Cobalt

16 x 10 6

8.1

Alnico 1. 2, 3, 4

1.3 -1.7 x 106

5.5 - 7.5 x la'

0.42 - 0.72 x la'

Alnico 5,6,5-7

4.0 - 7.5

X

106

10.5·13.5 x 10'

0.64 - 0.78 x 10'

Alnico 8

5.0 - 6.0

X

106

7 - 9.2

1.5 - 1.9 x 10'

Alnico 9

10 x 10 6

10.5 X 10'

Ceramic 1

1.0 x 106

Ceramic 2, 3, 4, 6

X

10'

7.9

X

10'

Temperature
Coefficient

Cost

·0.05%/'C

Highest

Strongest, smallest, resists
demagnetizing best

-0.02%/'C to
·0.03%/'C

Medium

Non-oriented

-0.02%/oC to

·0.03''101'C

Comments

MediumOriented
High

-0.01 %/oC to
+O.OI%/'C

MediumHigh

1.6 X 10'

-0.02%/'C

High

Oriented, highest energy product

2.2xl0'

1.8 x 10'

-0.2%/'C

Low

Non·oriented, high coercive force,
hard, brittle, non-conductor

1.8 - 2.6 x 106

2.9·3.3 x la'

2.3 - 2.8 x 10'

-0.2%/'C

LowMedium

Partially oriented, very high coercive
force, hard, brittle, non-conductor

Ceramic 5, 7, 8

2.8 - 3.5 x 106

3.5 - 3.8 x la'

2.5 - 3.3 x la'

-0.2%/oC

Medium

Fully oriented, very high coercive
force, hard, brittle, non-conductor

Cunife

l.4x 106

5.5x 10'

0.53 x la'

-

Medium

Ductile, can cold form and machine

Fe-Cr

5.25 x 106

13.5 X 10'

0.60

-

Medium- Can machine prior to
final aging treatment
High

Plastic

0.2 - 1.2 x la'

1.4-3x la'

0.45-1.4x 10'

1.3 - 2.3 x 10'

1 - 1.8 x 10'

Rubber

0.35 -1.1 x 106

X

la'

X

10'

-02%/'C
-0.2%/'C
-.157%/'Cto

Neodymium

4-100

7 -15 x 106

6.4 11.75x 10'

5.3 - 6.5 x 10'

-.192''101'C

Oriented, high coercive force.
best temperature coefficient

Lowest

Can be molded, stamped, machined

Lowest

Flexible

MediumNon-oriented
High

are chemically inert, and have-high values of coercive force. As with
Alnico, ceramic magnets can be fabricated with partial or complete
orientation for additional magnetic strength. Less expensive than
Alnico, they also are too hard and brittle to shape except by grinding.
Maximum-energy product ranges from 1 x 1DB to 3.5 x 1DB.
Cunife is a ductile copper base alloy with nickel and iron. It can be
stamped, swaged, drawn, or rolled into final shape. Maximum energy
product is approximately 1.4 x 1DB.
I (AMPS)
B (GAUSS) ::::; -=-4-,,-r--:("'"'IN""C""H:'::E:::S:-")

Dwg. No. 13.163

FIGURE 61

fran-Chromium magnets have magnetic properties similar to Alnico
5, but are soft enough to undergo machining operations before the final
aging treatment hardens them. Maximum energy product is approximately 5.25 x 106 •
Pfastie and rubber magnets consist of barium or strontium ferrite in
a plastic matrix material. They are very inexpensive and can be formed
in numerous ways including stamping, molding, and machining, depending upon the particular matrix material. Since the rubber used is
synthetic, and synthetic rubber is also plastic, the distinction between
the two materials is imprecise. In common practice, if a plastic magnet
is flexible, it is called a rubber magnet. Maximum energy product
ranges from 0.2 x 106 to 1.2 x 1DB.

CHOOSING MAGNET STRENGTH
A magnet must have sufficient flux density to reach the Hall switch
maximum operate point specification at the required air gap. Good
design practice suggests the addition of another 50 G to 100 G for
insurance and a check for sufficient flux at the expected temperature
extremes.

12 3
Dwg. No. 13,164

FIGURE 62(A)

The data sheet on the UGN3120U Hall switch specifies a 350 G
maximum operate point at +25°C. After adding a pad of 100 G, we have
450 G at +25°C. If operation to +70°C is needed, the requirement is
450 G + 45 G = 495 G. (For calculations, we use 0.7 G/oC operate point
coefficient and 1 G/oC release point coefficient.) Since the temperature
coefficient of most magnets is negative, this factor would also require
some extra flux at room temperature to guarantee high-temperature
operation.

COERCIVE FORCE

B::::: 6 G/A

Coercive force becomes important if the operating environment
will subject the magnet to a strong demagnetizing field, such as that
encountered near the rotor of an ac motor. For such applications, a
permanent magnet with high coercive force (ceramic, Alnico 8, or,
best of all, RE cobalt) is clearly indicated.

PRICE AND PEAK ENERGY PRODUCT
The common permanent magnet materials and their magnetic
properties are summarized in Table 4. The cost column shows the
relationship between the price paid for a magnet and its peak energy
product.

Dwg. No. 13,165

FIGURE 62(B)
4-101

HALL DEVICE

TOROID

Dwg. No. 13,166

OWg. No. 13,167

FIGURE 63

FIGURE 64

CURRENT LIMITING AND MEASURING
CURRENT SENSORS
Hall effect devices are excellent currentlimiting or measuring sensors. Their response
ranges from dc to the kHz region. The conductor need not be interrupted in high-current
applications.
The magnetic field about a conductor is
normally not intense enough to operate a Hall
effect device (Figure 61).
The radius, r, is measured from the
center of the conductor to the active area of
the Hall device. With a radius of OS' and a
current of 1,000 A, there would be a magnetic
flux density of 159 G at the Hall device. At
lower current, use a toroid or closed magnetic
circuit to increase the flux density, as illustrated in Figure 62(A) and (8).
With a 0.06" air gap for the "U" package,
there would be 6 G/A per turn for Figure
62(A), and 6 G/A for Figure 62(8).
The core material can be of either ferrite
or mild steel (C-1 01 0) for low-frequency
applications, and ferrite for high-frequency
measurements.
The main concerns are:
That the core retains minimal field when
the current is reduced to zero.
That the flux density in the air gap isa
linear function of the current.
And that the air gap is stable over the
operating temperature range.
The cross-sectional dimensions of the
4-102

core are at least twice the air gap dimension to ensure a reasonably
homogeneous field in the gap. For example, a toroid with a 0.06" gap
would have at least a 0.12" x 0.12" cross-section.
Another Simple and inexpensive application is illustrated in Figure
63. A toroid of the appropriate diameter is formed from mild steel stock,
0.0625" thick and 0.1875" wi~. The ends are formed to fit on each side
of the central portion of the Hall device. One advantage of this technique is th~t the toroid can be placed around a conductor without
disconnecting the conductor.

MULTI-TURN APPLICATIONS
There are several considerations in selecting the number of turns
for a toroid such as the one in Figure 62(A):

Hall Switches
Keep the flux density in the 200 G to 300 G range for a trip pOint.
Devices can be supplied with a narrow distribution of magnetic parameters within this range. If, for example, you want the Hall switch to turn
ON at 10 A:
__
3_00_G
__ = 5 turns
6G/Ax 10A
It is possible to supply parts having a ±20% operating point window
in this range.

N=

Hall Unears
It is desirable to have flux density in the 200 G to 300 G range to
maximize the output signal/zero drift ratio. In using the UGN3501, for
example, the zero drift is typically 0.15 mV/oC, so from O°C to +70°C
there would be typically a ±7 mV zero drift. A sensitivity of 1.4 mV/G
and a 300 G field would give a 420 mV output signal.

The UGN3501 also has a -0.3%/oC
sensitivity coefficient. For example, a 420 mV
output signal at O°C would drop to 330 mV
at +70°C.
For low-current applications in which
many turns are required, one can wind a
bobbin, slip it over a core, and complete the
magnetic circuit through the Hall device with a
bracket-shaped pole piece, as shown in
Figure 64.

With this bobbin-bracket configuration, it is possible to measure
currents in the low milliampere range or to replace a relay using a Hall
switch. To activate a Hall switch at 1 mA (±20%), using a device with a
200 G (±40 G) operate point, bobbin windings require:

°

-::-:::-:-:-20_0--:G:-:-:-:- = 3333 tu rns
6 G/A x 0.01 A
It would be practical to tweak the air gap for final, more precise
calibration. In all cases, be careful not to stress the package.

OTHER APPLICATIONS FOR LINEAR SENSORS
Type UGN3503U and UGS3503U Hall Effect linear sensors are
used primarily to sense relatively small changes in magnetic fieldchanges too small to operate a Hall Effect switching device. They are
customarily capacitively coupled to an amplifier, which boosts the
output to a higher level.
As motion detectors, gear tooth sensors, and proximity detectors·
(Figure 65), they are magnetically driven mirrors of mechanical events.
As sensitive monitors of electromagnets, they can effectively measure
a system's performance with negligible system loading while providing
isolation from contaminated and electrically noisy environments.

",

",

Dwg. No. 13,168

FIGURE 65

The output null voltage of Type 3503 is nominally one-half the
supply Voltage. A south magnetic pole presented to the branded face of
the Hall effect sensor will drive the output higher than the null voltage
level. A north magnetic pole will drive the output below the null level.

MAGNET

UGN-350~U
S

LOAD

1~F

+5V .

'--MA--=--

-=-

10K

Dwg. No. 13,169

FIGURE 66

MAGNET

2.2K

LOAD

'5V

-=-

In operation, instantaneous and proportional output-voltage levels
are dependent on magnetic flux density at the most sensitive area of
the device. Greatest sensitivity is obtained with a supply voltage of 6 V,
but at the cost of increased supply current and a slight loss of output
symmetry. The sensor's output is usually capacitively coupled to an
amplifier that boosts the output above the millivolt level.
In the two applications shown in Figures 66 and 67, permanent bias
magnets are attached with epoxy glue to the back of the epoxy packages. The presence of ferrous material at the face of the package then
acts as a flux concentrator.

UGN-350~U
N
22pF

Each Hall effect integrated circuit includes a Hall sensing element,
linear amplifier, and emitter-follower output stage. Problems associated
with handling tiny analog signals are minimized by having the Hall cell
and amplifier on a single chip.

The south pole of a magnet is attached to the back of the package
if the Hall effect IC is to sense the presence of ferrous material. The
north pole of a magnet is attached to the back surface if the integrated
circuit is to sense the absence of ferrous material.

10K

Calibrated linear Hall devices, which can be used to determine the
actual flux density presented to the Type 3503 sensor in a particular
application, are available.
Dwg. No. 13,170

FIGURE 67

4-103

METAL SENSOR

FERROUS METAL DETECTORS
Two similar detector designs are illustrated in Figures 68 and 69. The first senses
the presence of a ferrous metal; the other
senses an absence of the metal. The two
sensing modes are accomplished simply by
reversing the magnet poles relative to the
UGN3501. The pole of the magnet is affixed
to the unbranded side of the UGN3501 in
both cases.

The north pole of the magnet is affixed to the back side of a
UGN3501. The sensor is in contact with the bottom of a 0.09375" epoxy
board. A 20 mV output change (decrease) is produced as a 1" steel ball
rolls over the sensor. This signal is amplified and inverted by the IlA
741 C operational amplifier and drives the 2N8512 ON.

NOTCH SENSOR
The south pole of the magnet is fixed to the backside of a
UGN3501. The sensor is 0.03125" from the edge of a steel rotor. A
0.0625" wide by 0.125' deep slot in the rotor edge passing the sensor
causes a 10 mV peak output change (decrease). This signal is amplified and inverted by the IlA 741 Cop amp and drives the 2N5812 ON.

Frequency response characteristics of
this circuit are easily controlled by changing
the value of the input decoupling capacitor for
the low-frequency break-point. If high-frequency attenuation is desired, a capacitor can
be used to shunt the feedback resistor.

Note that, in both examples, the branded side of the UGN3501
faces the material (or lack of material) to be sensed. In both cases, the
presence (or absence) of the ferrous metal changes the flux density at
the Hall Effect sensor so as to produce a negative going output pulse.
The pulse is inverted by the amplifier to drive the transistor ON.

MAGNET

MAGNET

UGN_35~'
S

LOAD

22fAF

+12V

UGN_35~'
N

+12V

!-1rN~

~-'V\".,.....

-=

LOAD

1,..F

-=-

10K

10K

Dwg. No. 13,172

Dwg. No. 13,171

FIGURE 69

FIGURE 68

-j

r-

0 . 03 "·

LJ~0.125
J\
U

UGN-J501

FLUX
CONCENTRATOR

0

aJ

..

0.062··

1
Dwg. No. 13,174

Dwg. No. 13,173

FIGURE 70

4-104

FIGURE 71

.1UGN-3501

PRINTER APPLICATION
'15V

The device in Figure 70 senses lobes on a character drum. Lobes
are spaces 0.1875" apart around the circumference, are 0.25" long and
rise 10 to 15 mils from the surface of the drum.

Dwg. No. 13,157

FIGURE 72

A UGN3501 Hall effect linear IC sensor is used with an Indiana
General Magnet Products Company SR8522 magnet. The north pole is
affixed to the reverse side of the package. A flux concentrator is affixed
to the branded face. Though it does not provide a flux return path, a
concentrator will focus the magnetic field through the switch.
The concentrator blade, shown in Figure 71, is aligned with the
drum lobe at an air gap distance of 0.01 ". The output change is 10 mV
peak, amplified as shown to develop a +3 V output from the operational
amplifier, driving the transistor ON, as illustrated in Figure 72.
Sensitivity is so great in this configuration that the UGN3501 output
signal's baseline quite closely tracks eccentricities in the drum. This
affects lobe resolution, but lobe position can still be measured.

USING CALIBRATED DEVICES
UGN3503U
The calibrated Type 3503 is an accurate, easy-to-use tool for
measuring magnetic flux densities. Each device is individually calibrated and furnished with a calibration curve and sensitivity coefficient.
Although calibration is performed in a south and north 500 G field, the
UGN3503 is useful for measuring fields in both polarities to 1000 G.
A closely regulated 5 V (±10 mY) power supply is necessary to
preserve accuracy in calibrated UGN3503 flux measurements. An
ambient temperature range of 21°C to 25°C must also be maintained.
Connect Pin 1 to voltage VcC' Pin 2 to ground, and Pin 3 to a highimpedance voltmeter. Before use, the device should be powered-up
and allowed to stabilize for one minute.
The calibration curve affords the most convenient method of flux
measurement. Subject the device to the field in question. Read the
output voltage from the voltmeter and find that value on the chart X
axis. Locate the intersection of the output level with the calibration trace
and read the corresponding flux density on the chart's Y axis.
The sensitivity coefficient can be used to calculate flux densities
somewhat more precisely. First, determine the null output voltage of the
device under 0 G or null field condition. Then, read the output of the
device under an applied field condition by subjecting it to the flux in
question. Magnetic flux density at the device may be calculated by:

where

B

=

tJ.VOUT(B)

= Output voltage under applied field in volts.

VOUT(O)

= Output null voltage in volts.

S

= Sensitivity coefficient in mV/G.

B

= Magnetic flux density at the device in gauss.

tJ.VOUT(B) - VOUT(O) *1000/S

4-105

GLOSSARY
Active Area - The site of the Hall element on the
encapsulated IC chip.
Air Gap - The distance from the face of the magnetic
pole to the face of the sensor.
Ampere-turn (NI) - The mks unit of magnetomotive
force.
Ampere-turns/meter (NI/m) - The mks unit of
magnetizing force. One ampere turn per meter equals
79.6 oersteds.

Oersteds (Oe) - The CGS unit of magnetizing force.
Equivalent to gilberts per centimeter (Gilberts/cm).
One oersted equals 125.7 ampere-turns per meter.
Remanent Induction (Bd) - The magnetic induction that
remains in a magnetic circuit after removal of an applied
magnetomotive force. When there is no air gap in the
magnetic circuit, remanent and residual induction are
equal. With an air gap, remanence will be less than
residual induction. Measured in gauss.

Bipolar - A method of operating a Hall sensor using both
north and south magnetic poles.

Residual Induction (B,) - The flux density remaining in
a closed magnetic circuit of magnetic material when the
magnetizing force adequate to saturate the material is
reduced to zero. Measured in gauss.

Coercive Force (H ) - The demagnetizing force that
must be applied to reduce the magnetic flux density in
a magnetic material to zero. Measured in oersteds.

Slide-by - A method which a Hall sensor is actuated.
The magnetic field is increased and decreased as a
permanent magnet is moved laterally past the sensor face.

Concentrator - Any ferrous metal used to attract
magnetic lines of force.

Tesla (T) - The mks unit of magnetic flux density. Equivalent to one weber per square meter (Wb/m2). One tesla
equals 10' gauss.

Gauss (G) - The CGS unit of magnetic flux density.
Equivalent to one maxwell per square centimeter (Mx/cm2).
One gauss equals 10" tesla.
Gilbert - The CGS unit of magnetomotive force.
Head-On - A method by which the Hall sensor is
actuated. The magnetic field is increased and decreased
by moving the magnetic pole toward and away from the
sensor face.

Toroid -A doughnut-shaped ring often composed of iron,
steel or ferrite.
Total Effective Air Gap (TEAG) - The distance from the
face of a magnetic pole to the active area of a Hall Effect
sensor.
Unipolar - A method of operating a Hall sensor using
a single magnetic pole, usually the south pole.

Maximum Energy Product (BHmax) - T~e highest
product of Band H from the demagnetization curve of a
magnetic material. Given in gauss-oersteds x 106 (MGOe).

Vane - Any ferrous metal used to shunt a magnetic field
away from the Hall sensor (at least 1.5 times the width of
an associated magnet).

Maxwell (Mx) - The CGS unit of total magnetic flux.
One maxwell equals 10.8 webers.

Window - An opening in a vane at least 1.5 times the
width of an associated magnet.

4-106

SOURCES FOR FERRITE TOROIDS AND MAGNETS
As a convenience, some sources for ferrite toroids and magnets are listed below.
Addresses and telephone numbers are correct to the best of our knowledge at time of printing.

TOROID SUPPLIERS
Neosid Inc.
28 Main Street
Eatontown, NJ 07724
201/389-4411

Magnetics
900 East Butler Road
P.O. Box 391
Butler, PA 16001
412/282-8282

J.W. Miller Co.
Division of Bell Industries
19070 Reyes Avenue
P.O. Box 5825
Rancho Dominguez, CA 90224
213/537-5200

Dexter Magnetic Materials Division
10 Fortune Drive
Billerica, MA 01865
508/663-7500

Fair-Rite Products Corp.
P.O. Box J
Wallkill, NY 12589-0288
914/895-2055

MAGNET SUPPLIERS

Types

Arnold Engineering
P.O. BoxG
Marengo, IL 60152
815/568-2000

Alnico, Ceramic,
Multipole Ring

Bunting Magnetics Company
1165 Howard SI.
Elk Grove Village, IL 60007
312/593-2060

Alnico, Ceramic, Plastic

Ceramic Magnetics, Inc.
87 Fairfield Road
Fairfield, NJ 07006
201/227-4222

Ceramic, Multipole Ring

Crucible Magnetics
101 Magnet Dr.
Elizabethtown, NJ 42701
502n69-1333

Alnico, Rare Earth

Hitachi Magnetics
7800 Neff Road
Edmore, MI 48829
5171427-5151

Alnico, Ceramic,
Rare Earth

IG Technolog
405 Elm Street
Valparaiso, IN 46383
219/462-3131

Alnico, Ceramic,
Multipole Ring, Rare Earth

Ogallala Electronics
P.O. Box 59
Ogallala, NE 69153
308/284-4093

Ceramic, Multipole Ring

Dexter Magnetic
Materials Division
400 Karin Lane
Hicksville, NY 11801
516/822-3311

Representatives of
various manufacturers.
Dexter Magnetic also
does custom grinding.

Recoma, Inc.
2 Stewart Place
Fairfield, NJ 07006
2011575-6970

Rare Earth

FerroxlDivision of Amperex Corp.
5083 Kings Highway
Saugerties, NY 12477
914/246-2811

Stackpole Carbon Co.
Magnet Division
700 Elk Ave.
Kane, PA 16735
814/837-7000

Ceramic. Flexible Plastic

TDK Corporation of America
Head Office
1600 Feehanville Drive
Mount Prospect, IL 60056
312/803-6100

Rare Earth

The Electrodyne Company
4188 Taylor Road
~atavia, OH 45103
513/732-2822

Plastic

Xolox Corporation
6932 Gettysburg Pike
FI. Wayne, IN 46804
219/432-0661
3-M Plastiform
3-M Center
Industrial Electric
Products Div.
Building 225-4N
SI. Paul, MN 55144
Attn: James Fenwick
800/328-1373
Magnaquench
Div. of Gen. Motors
6435 S. Scatterfield Rd.
Anderson, IN 46011
317/646-2763

Plastic, Multipole Ring

Plastic

Neodymium

Dynacast Co.
921 Albion Ave.
Schaumburg, IL 60193
312/351-6100

4-107

APPLICATIONS
INFORMATION
THE HALL-EFFECT SENSOR
The basic Hall sensor is simply a small sheet of semiconductor
material. A constant voltage source forces a constant bias current to
flow in the semiconductor sheet. The output, a voltage measured
across the width of the sheet, reads near zero if a magnetic field is not
present (Figure 1).
If the biased Hall sensor is placed in a magnetic field oriented at
right angles to the Hall current, the voltage output is in direct proportion
to the strength of the magnetic field. This is the Hall effect, discovered
by E. H. Hall in 1879 (Figure 2).

FIGURE I
If no magnetic field is present, the voltage
measured across the width of the semiconductor
material of the Hall-effect sensor is zero.

FIGURE 2
The output voltage of a Hall-effect sensor is
directly proportional to the magnetic field present
at right angles to the direction of current flow
through the sensor.

12
(/)

I-

--'
0

>

-

IO.P.

I~
ION

~

w

I

C!>

«

I

0

I
I

I

:;

I

>

I-

:::>

"-

I-

:::>
0

OFF

f

I
I
I

I
I
I

o L~R~.P~.:::::;:=::::L=::L:=::;:~~~
o 100 200 300 400 500 600
MAGNETIC FLUX DENSITY IN GAUSS

FIGURE 3
The transfer characteristic graph plots input on the
horizontal axis vs output on the vertical axis. With
no magnetic field present, the Hall-effect switch is
off; as the field increases, the switch will turn on at
a predesigned operating point. This particular
device exhibits hysteresis of 90 gauss.

4-108

The basic Hall sensor is essentially a transducer that will respond
with an output voltage if the applied magnetic field changes in any
manner. Differences in the response of devices are generally related to
tolerances and specifications, such as operate (turn on) and release
(turn off) thresholds, as well as temperature range and temperature
coefficients of these parameters. Also available are linear output
sensors that differ in sensitivity or respond per gauss change.
A Hall sensor is activated by a magnetic field created by either
electromagnets or permanent magnets. Magnetic fields have two
important characteristics: magnitude and direction (or orientation). In
the absence of any magnetic field, the most common Hall-effect digital
switches are designed to be off (open circuit at output). They will turn
on only if subjected to a magnetic field that has both sufficient strength
and the correct polarity.
If the approach of the South pole of a magnet would cause switching action of a digital sensor, the approach of the North pole of a
magnet would have no effect. In practice, a close approach by the
South pole of a magnet will cause the output transistor to turn on.
The transfer characteristics graph (Figure 3) shows input vs output.
The input variable, which is the strength of the activating magnetic
field (magnetic flux density, measured in gauss), is plotted along the
horizontal axis. The output variable, which is the digital (on, off) output
from a Hall switch, is plotted along the vertical axis.
In the absence of any magnetic field (zero gauss), the Hall-effect
switch is off and the output voltage equals the power supply (12 V). As
the strength of the magnetic field increases, at some point (240 gauss
in this case) the output transistor will turn on and the output voltage
goes to zero. The output does not change even if the magnetic field's
strength continues to increase.
The switch stays on until the magnetic field falls well below the
240 G operating point. This is a circuit design characteristic (hysteresis)
that prevents oscillations. Our example uses a 90 gauss hysteresis
(240-150), which will turn the device off at 150 gauss.

Reprinted from Sensors, March 1986, Copyright © North American Technology, Inc.
174 Concord Street, Peterborough, NH 03458.

FIGURES OF MERIT
COMMONLY APPLIED TO
MAGNETIC MATERIALS
• Residual Induction (B,> in Gauss.
How strong is the magnetic field? A
magnet must have sufficient flux
density to satisfy the Hall switch
maximum operating point specifica·
tion at the required air gap.
• Coercive Force (He> in Oersteds.
How well will the magnet resist
external demagnetizing forces? This
property becomes important if the
operating environment will subject the
magnet to a strong demagnetizing
field, such as might be encountered
near the rotor of an A.C. motor. For
such applications, a permanent
magnet with this coercive force
(ceramic, alnico-8, or, best of all,
RE cobalt) is clearly indicated.
• Maximum Energy Product [(BdX
Hd>Max x 106] in Gauss-Oersteds.
A strong magnet that is also very
resistant to demagnetizing forces
would have a high maximum energy
product. Generally, the larger the
energy product, the better, stronger,
and more expensive the magnet.
• Temperature Coefficient in
Percent per Degree Celsius. How
much will the strength of the magnet
change as the temperature changes?

All switches turn on at or below their maximum operating point flux
density, and when the magnetic field is reduced, all devices turn off
before the flux density drops below their minimum release point value.
Additionally, each device has a minimum amount (typically, 20 gauss)
hysteresis to ensure clean switching action. This hysteresis ensures
that even if mechanical vibration or electrical noise is present, the
switch output is fast, clean, and occurs only once per threshold crossing.
Linear Hall-effect sensors differ from digital Hall-effect sensors with
respect to the output response from the sensor. The digital sensor has
an off/on or high/low output; the linear sensor has an output proportional to the magnetic field subjected to the "active area." Hall-effect
linear sensors are used primarily to sense relatively small changes in
magnetic fields, changes too small to operate a Hall-effect digital
switch.
The exact magnetic flux density values required to activate Hall
sensors differ for several reasons, including design criteria and manufacturing tolerances. Extremes in temperature also affect the response
characteristics of the sensors.
For each device type, worst-case magnetic specifications can be
set out for the user by a Hall-effect sensor marketing or applications
engineer, if it has been determined that a catalogue item will not meet
required tolerances.

APPLICATIONS
With an understanding of how Hall-effect sensors work, it is
possible to build devices around them. The physical aspects of their
characteristics form the basis of Hall device applications.
Analysis. The field created by a magnet must be compatible with the
characteristics of the Hall-effect device it is expected to operate.
Measure the strength of the magnetic field, which is greatest at the
magnet's pole face, with a gaussmeter or a calibrated linear Hall
sensor. Then plot a graph of field strength (magnetic flux density) vs
distance of the magnet from the device along the intended line of travel
of the magnet. Then, by using the Hall device specifications sensitivity
of mV/gauss for a linear device, or operate and release points in gauss
for a digital device) one can find the critical distances for a particular
magnet and type of motion. These field strength plots are not linear,
and the shape of the plot depends greatly upon magnet shape, magnetic circuit (concentrators), and path traveled.
Total Effective Air Gap. Hall-effect switches are offered in many
different packages, such as epoxy three-pin SIPs, ceramic substrate
mounted chips, ceramic three-pin SIPs, and surface mount packages.
The most critical difference between packages is the distance from the
face of the package to the surface of the Hall cell: the active area depth,
which effectively adds to the total effective air gap.
The total effective air gap (TEAG) is the sum of the active area
depth arid the distance between the package surface and the magnet's
surface. For Hall device applications, the TEAG should be as small as
possible, consistent with the limitations of the activating mechanical
system. This will ensure that the magnetic flux will always be great
4-109

enough to switch the device. Remember, magnetic flux decreases very
sharply as the total effective air gap increases.

Ferrous Vane
Modes of Operation. There are many ways to operate a Hall sensor.
For example, with a simple bar or rod magnet there are two possible
paths for the magnetto travel-head-on and slide-by. In the head-on
mode, the magnetic pole moves along a perpendicular path straight at
the active face of the Hall device. The head-on mode is simple, works
well, and is relatively insensitive to lateral motion; however, if the
mechanism moving the magnet overshoots the mark, the sensor
package could be damaged.
A second possible path is to move the magnet in from the side of
the hall device in the slide-by mode of operation. The slide-by mode is
commonly used to avoid contact with the sensor package. The use of
strong magnets or ferrous flux concentrators in well-designed slide-by
magnetic circuits allows better sensing precision with a shorter travel
path than the head-on mode.

Hall Switch On

Magnet manufacturers generally can provide head-on flux density
curves for their magnets, but they often do not characterize magnets for
slide-by operation, possibly because different air gap choices lead to
an infinite number of these curves. Once a TEAG is chosen, however,
the head-on magnet curves can be used to find the peak flux density
(a single point) for slide-by applications by noting the value of magnetic
flux at the chosen TEAG.
A third mode of operation keeps the Hall-effect sensor and magnet
a fixed distance from one another and switches the sensor with a
movable ferromagnetic vane. The Hall device and magnet can be
molded together as a unit in a single rigid assembly, separated by an
air gap. This eliminates alignment problems and produces an extremely
rugged switching assembly.

Hall Switch Off

FIGURE 4
The ferromagnetic vane moves between the
activating magnet and the Hall-effect switch
shunting the flux field from the switch. These
assemblies can be used for precision switching
over large temperature ranges.

The Hall device is held in the on state by the activating magnet.
Placing the vane between the magnet and the Hall device (Figure 4)
forms a magnetic shunt that distorts the flux field away from the Hall
device. The vane can be made in many configurations to repeatedly
sense position within ±0.002 in. over a 125°C temperature range.

Alnico-8, .2.2"0, .187"

~ 1000

,-,,-,-,.-----.-...,---.--.--,-,-----::-=-::-=-r-:,-,

~

I-'H-t-+--+-+-+-t-+

800

.~

~ 600 H-t----l't+...1...--'-Yf-u::
~

400 F'~=+-+"'d-+-+-!-I-+-t-

6,

~ 200 H-+-+--+--+'''Io:-hr=--.-r---;--,-,-+-.-I

.05

.10

.15
.20
.25
.30
Dislance (0) (inches)

.35

.40

FIGURE 5
Hall devices must always switch on/off at the same
point relative to the magnet. The effect of a change
in flux density on switching distance is shown.

.4-110

The ferrous vane or vanes that interrupt the flux could have linear
motion or rotational motion (as for a shaft encoder). Ferrous vane
assemblies, due to the steep flux density/distance curves that can
be achieved, are often used where precision switching over a large
temperature range is required.
Steep Slopes and High Flux Densities. For linear Hall devices,
greater flux changes for a given displacement give greater outputs,
clearly an advantage because the voltage output of the sensor will be
much greater, reducing the possibility of instruments picking up electrical noise. The same property is desirable for digital Hall devices, but
the reasons are more subtle. To achieve consistent switching action in
a given application, the Hall device must always switch on and off at the
same positions relative to the magnet.
Consider, for example, the flux density curves of the two different
magnet configurations in Figure 5. With an operating point flux density
of 200 gauss, a digital Hall-effect device would turn on at a distance of

approximately 0.14 in. from either magnet. If manufacturing tolerance or
temperature effects shifted the operating point of the sensor to 300
gauss, notice that in the curve for magnet "A" (steep slope) there is very
little change in the distance at which switching occurs, while in the
case of the curve of magnet "8", the change is considerable. The
release point would be affected in much the same way.

+12V

The basic principles illustrated in this example can be modified to
include mechanism and device specification tolerances and used for
worst-case design analysis.

ELECTRICAL INTERFACE
FOR DIGITAL HALL DEVICES
FIGURE 6
This circuit could be used if a load required a
current of 4 A to switch.

1151230
VAC
HIGH

L--------.J--...L._A.C.&
+12Y
COMMON

FIGURE 7
This circuit could be used to switch a 115 or 230
VAG load.

A typical application for a Hall-effect sensor is interfacing the
sensor signal to a microporocessor. The output of the Hall element is
quite small; therefore, Hall ICs have been developed that contain a
voltage regulator to allow a wide range of operating voltages, a highquality DC amplifier to boost the element signal to a more easily used
signal, a Schmitt trigger threshold detector to produce digital logic, and
output stages for universal interfaces capable of current sinking or
sourcing. The output of the Hall-effect digital switch can be either linear
(proportional to the magnetic field present) or clean-switching (no
bounce) digital logic. Energy consumption is very low, and frequency
responses are well over 100 kHz.
The output stage of a digital switch is simply an open collector npn
transistor switch, and the rules for use are the same as those for any
similar switching transistor. When the transistor is off, there is a small
leakage current (typically a few nanoamps) that usually can be ignored
and a maximum (breakdown) voltage specification that must not be
exceeded. When the transistor is on, the device output is shorted to
the circuit common, and the current flowing through the switch must be
externally limited to less than the maximum specified value to prevent
damage (usually 20 mAl.
Hall devices switch very rapidly; typical rise and fall times are in the
400 nano-second range. This is rarely significant, since switching times
are almost universally controlled by the much slower mechanical parts
of the device.
Interfacing with digital logic integrated circuits usually requires only
an appropriate power supply and pull-up resistor.
Loads that require sinking currents up to 20 mA can be driven
directly by a Hall switch. A good example is a light emitting diode (LED)
indicator that requires only a resistor to limit current to an appropriate
value.
Sinking more current than 20 mA requires a current amplifier. For
example, if a certain load to be switched requires 4 amperes and must
turn on when the activating magnet approaches, the circuit shown in
Figure 6 could be used. To turn on a 115 or 230 VAC load, consider
Figure 7. Note, however, that the +12 V supply common is connected to
the low side of the AC line, and in the event of a mixup, the Hall switch
and associated low voltage circuitry would be 115 volts above ground.

4-111

Due to the magnetic field around any
current-carrying conductor, Hall-effect devices
can be used to measure and limit current by
converting this magnetic field to an electrical
signal. The sensor response ranges from DC
to the kHz range, and the conductor need not
be interrupted. In low current applications,
the magnetic field about a conductor is not
normally intense enough to operate a Halleffect digital switch; therefore, it would be
best to use a toroid or closed magnetic circuit
to increase the flux density.

MAGNETIC MATERIALS
MOST COMMONLY USED
•

Rare Earth-Cobalt. An alloy of rare earth metal, such as
samarium, with cobalt (abbreviated RE cobalt). These magnets
are the best in all categories but are also the most expensive.
Too hard for machining, these magnets must be ground, if shaping is necessary. Maximum energy product, perhaps the best
single measure of magnet quality, is· approximately 16 x 106.

•

Alnico. A class of alloys containing aluminum, nickel, cobalt,
iron, and additives, which can be varied to give a wide range of
properties. The magnets are strong and fairly expensive, but
less so than REcobalt. Alnico magnets can be cast or sintered
by pressing metal powders into a die and heating. Sintered
alnico is well suited to mass production of small, intricately
shaped magnets, has a more uniform flux density, and is
mechanically superior, but cast alnico magnets are generally
magnetically stronger. The nonoriented or isotropic alnico
alloys (alnico-1, alnico-2, alnico-3, alnico-4) are lessexpensive
and magnetically weaker than the oriented alloys (alnico-S,
alnico-6 ... alnico-9). Alnico is too hard and brittle to be shaped
except by grinding. Maximum energy products range from 1.3
to 10 x 106.

Hall-effect linear sensors are used
primarily to sense relatively small changes in
magnetic fields-changes that are too small
to operate a Hall-effect switching device.
They are customarily capacitively coupled to
an amplifier that boosts the output to a higher
level (Figure 7).
As motion detectors, gear tooth sensors,
and proximity detectors, linear Hall-effect
sensors produce an electrical output that is
a magnetically driven mirror of mechanical
events. As sensitive monitors of electromagnets, they can effectively measure a system's
performance with negligible system loading
while producing isolation from contaminated
and electrically noisy environments.
Hall-effect sensors, both digital and
linear, are used in the commutation of
brushless DC motors, speed sensors, shaft
encoders, current limiters and monitors,
position sensors, and gear tooth sensors.
Recent technology breakthroughs in Halleffect devices have made available sensors
for temperature ranges as high as 170°C.
These sensors have been integrated into a
vast array of innovative high-technology
applications where reliability, efficiency, and
cost competitiveness are a must.

• Ceramic. These magnets contain barium or strontium (or
another element from that group) ferrite in a matrix of ceramic
material that is compacted and sintered. They are poor conductors of heat and electricity, chemically inert, and have high
values of coercive force. As with alnico, ceramic magnets can
be fabricated with partial or complete orientation for additional
magnetic strength. Less expensive than alnico, they are also
too hard and brittle to shape except by grinding. Maximum
energy products range from 1 to 1.3 x 106.
•

Cunife. A ductile copper base alloy with nickel and iron, cunife
can be stamped, swaged, drawn, or rolled into final stage.
Maximum energy product is approximately 1.4 x 106.

•

Iron-Chromium. These magnets have magnetic properties
similar to alnico-S but are soft enough to undergo machining
operations before the final aging treatment hardens them.
Maximum energy product is approximately S.2S x 106.

• Plastic and Rubber. These magnets consist of barium and
strontium ferrite in a plastic matrix material. They are very
inexpensive and can be formed in numerous ways, including
stamping, molding, and machining, depending on the particular
matrix material. Since synthetic rubber is a plastic, the distinction between the two materials is not very precise. If a plastic
magnet is flexible like rubber, it is generally called a rubber
magnet. Maximum energy products range from 0.2 to 1.2 x 106.

4-112

MASS STORAGE APPLICATION ICs

SECTION 5. TECHNICAL DATA & APPLICATION NOTES
for Mass Storage Application ICs .
in Numerical Order ................................................................................... Beginning at 5-1

3-PHASE BRUSHLESS DC MOTOR
CONTROLLERIDRIVER WITH BACK-EMF SENSING
LOAD
SUPPLY

FCOM

READM'RlTE

GROUND
GROUND
CLOCK
RESET

NOT USABLE
TACH

REF

lOGIC

The A8901 CLB is a three-phase brushless dc motor controller/
driver for use in 5 V hard-disk drives. The three half-bridge outputs are
low on-resistance n-channel DMOS devices capable of driving up to
1.25 A. The A8901 CLB provides complete, reliable, self-contained
back-EMF sensing motor startup and running algorithms. Linear
current control circuitry provides precise motor speed regulation.
A serial port allows the user to program various features and
modes of operation, startup current limit, sleep mode, and diagnostic
modes.
The A8901 CLB is fabricated in Allegro's BCD (Bipolar CMOS
DMOS) process, an advanced mixed-signal technology that combines
bipolar, analog and digital CMOS, and DMOS power devices. It is
provided in a 24-lead wide-body SOIC batwing package. The package
provides for the smallest possible construction in surface-mount
applications.

SUPPLY

DATA

FILTER

Dwg. PP-032A

ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
Load Supply Voltage, VBB ..... Voo + 1.0 V
Output Current, lOUT .............. ±1.1 A
Logic Supply Voltage, Voo ......... 6.0 V
Logic Input Voltage Range,
VIN . . . . . . . . . . .. -0.3 V to Voo + 0.3 V
Package Power Dissipation,
Po .................... See Graph
Operating Temperature Range,
TA .................. O°C to +70°C
Junction Temperature, TJ ....... +150°Ct
Storage Temperature Range,
Ts ................ -55°C to +150'C

FEATURES
•
•
•
•
•
•
•
•
•
•
•

DMOS Outputs
Low rOS(on)
Startup Commutation Circuitry
Back-EMF Commutation Circuitry
Serial Port Interface
Programmable Start-Up Current
Diagnostics Mode
Sleep Mode
Linear Current Control
Internal Current Sensing
Internal Thermal Shutdown Circuitry

t Fault conditions that produce excessive junction
temperature will activate device thermal shutdown
circuitry. These conditions can be tolerated, but
should be avoided.
Output current rating may be restricted to a value
determined by system concerns and factors.
These include: system duty cycle and timing,
ambient temperature, and use of any heatsinking
and/or forced cooling. For reliable operation, the
specified maximum junction temperature should
not be exceeded.

Always order by complete part number:

1A8901 CLB I.
5-1

8901
3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER
WITH BACK-EMF SENSING

FUNCTIONAL BLOCK DIAGRAM
NO
CONNECTION

LOGIC
SUPPLY

@

@
VDD
LOAD
SUPPLY
OUTA

CENTERTAP

2r-----~

C WD 4}---------------------1

6-7

GROUND

21

I~I~

0---,
UJ

rJJ

><:

"UJ

o

0:

o

GROUND

0:

UJ

~

u::

---'

o

Dwg. FP-035

~

iii!: 2_0

z

o

~
D.
ffj

o

:D

1:
--<
\I

OJ

1.5

()

:<

II:

w

~D.

1.01----+---+-

w

CJ
oct
~

~

D.

0-5/----+---t--------11-----'~--t_I

W
....I

m

~

....I
....I

oct

°2~5------5~0------'7------~----~------3
5
100
125
150
TEMPERATURE IN °C
Dwg. GP-019A

5-2

8901
3-PHASE BRVSHLESS DC MOTOR CONTROLLERIDRIVER
lVlTH BACK-EMF SENSING

= +25°C, VDD = 5.0 V

ELECTRICAL CHARACTERISTICS at TA

Limits
Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

Units

Logic Supply Voltage

VDD

Operating

4.5

5.0

5.5

V

Logic Supply Current

IDD

Operating

7.5

10

mA

-

1.5

mA

Load Supply Voltage

Vss

Operating

-

-

VDD + 1

Thermal Shutdown

TJ

-

165

-

°C

~TJ

-

20

-

°C

1.0

300

Vss = 14 V, VOUT = 0 V

-

-1.0

·300

IJA
IJA

lOUT = 600 MA

-

1.2

1.4

Q

Vss = 6 V, louF 900 mA, L = 3 mH

6.0

IF = 1.0 A

-

VIN(O)

DATA, RESET,CLK,REF,RAN,

-0.3

VIN(1)

CHIP SELECT, TACH

3.5

IIN(o)

VIN = 0 V

-

IIN(1)

VIN = 5.0 V

-

VOUT(O)

lOUT = 250

VOUT(1)

lOUT = -100 flA

3.5

-

-

V

VOUT(O)

lOUT = 500

IJA
lOUT = -200 IJA

-

-

1.5

V

3.5

-

-

V

Sleep Mode

Thermal Shutdown Hys.

V

Output Drivers

Output Leakage Current

Total Output ON Resistance
Output Sustaining Voltage
Clamp Diode Forward Voltage

IDsx

rDS(on)
VDS(sus)
VF

Vss = 14 V, VOUT = 14 V

1.25

-

V

1.5

V

Control Logic

Logic Input Voltage

Logic Input Current

DATA Output Voltage

FCOM Output Voltage

VOUT(1)
CST Current

CST Threshold

Filter Current

ICST

IJA

-

1.5

V

5.3

V

-0.5

IJA

1.0

flA

1.5

V

Charging

16

20

28

Discharging

-16

-20

-28

IJA
IJA
V

VCSTH

2.1

2.5

2.9

VCSTL

-

500

-

mV

IFILTER

CD Current
(CD1 or CD2)

ICD

CD Current Matching

-

CD Threshold

VCD

CWD Current

IcwD

Charging

8.0

10

15

Discharging

-8.0

-10

-15

IJA
IJA

Leakage, VFILTER = 2.5 V

-

5.0

-

nA

IJA
IJA
-

Charging

16

23

30

Discharging

-35

-53

-72

ICD(DISCHRG)/lcD(cHRG)

2.0

2.2

2.4

-

2.5

-

16

22

28

Charging

V

IJA

Continued next page ...

5-3

8901
3-PHASE BRVSHLESS DC MOTOR CONTROLLERIDRIVER
WITH BACK-EMF SENSING
ELECTRICAL CHARACTERISTICS continued
Limits
Symbol

Characteristic
CWD Threshold Voltage

Test Conditions

Min.

Typ.

Max.

Units

VTL

1.4

1.5

1.55

V

VTH

2.25

2.5

2.75

V

louT(MAX) Accuracy

-

Transconductance Gain

-

±20

-

%

gm

0.4

0.5

0.6

AN

Centertap Resistors

RCT

5.5

10

12

kn

Back-EMF Hysteresis

-

lOUT = 1 A

VSEMF - VCTAP at

15

25

40

mV

FCOM Transition

-15

-25

-40

mV

SERIAL PORT TIMING CONDITIONS

CHIP SElECT

READIWRITE

-1

A1

1EI-CLOCK

Dwg. WP·014A

A. Minimum READIWRITE setup time before CHIP SELECT ....................... 150 ns
B. Minimum DATA setup time before CLOCK rising edge ............................. 100 ns
C. Minimum DATA hold time after CLOCK rising edge .................................. 100 ns
D. Minimum READIWRITE hold time after CHIP SELECT disable ................ 100 ns
E. Minimum CLOCK low time before CHIP SELECT ....................................... 50 ns
F. Minimum CHIP SELECT hold time after CLOCK rising edge .................... 150 ns

G. Maximum CLOCK frequency ................................................................... 3.3 MHz

CHIP SELECT

REAOIWAITE

J

I

~~~~I~r---------~~~

DATA

~

OUTPUT

~

CLOCK

Dwg.

H. Minimum READIWRITE setup time before CHIP SELECT ....................... 150 ns

I.

Minimum time until output DATA valid ....................................................... 150 ns

J. Minimum READIWRITE hold time after CHIP SELECT disable ................ 150 ns
5-4

WP·023

TERMINAL FUNCTIONS
Term.

Terminal Name

Function

1

LOAD SUPPLY

VBB; the 5 V motor supply.

2

CENTERTAP

Motor centertap connection for back·EMF detection circuitry.

3

CST

Startup oscillator timing capacitor.

4

Cwo

Timing capacitor used by the watchdog circuit to disable the back-EMF comparators during
commutation transients, and to detect incorrect motor position.

5

OUTA

Power amplifier A output to motor.

GROUND

Power and logic ground and thermal heat sink.

8

OUTB

Power amplifier B output to motor.

9

OUTc

Power amplifier C output to motor.

10

NC

No internal connection; may be used as tie point or wired through.

6-7

11

TACH

Logic-level tachometer input for speed control loop.

12

REF

Logic-level reference input for speed control loop.

13

FILTER

Analog voltage input to control motor current. Also, compensation node for speed control
loop.

14

DATA

Serial port data input/output line.

15

LOGIC SUPPLY

Voo; the 5 V logic supply.

16

RESET

When pulled low forces the chip into sleep mode; clears all serial port bits.

17

CLOCK

Clock input for serial port.

GROUND

Power and logic ground and thermal heat sink.

20

CHIP SELECT

Strobe input (active low) for data word.

21

READIWRITE

Logic-level input to control direction of serial-port data; logic high

22

CD2

One of two capacitors used to generate the ideal commutation points from the back·EMF
zero crossing points.

23

CDl

One of two capacitors used to generate the ideal commutation points from the back-EMF
zero crossing points.

24

FCOM

Logic-level signal that changes state at every back-EMF zero crossing.

18·19

= read,

logic low

= write.

5-5

FUNCTIONAL DESCRIPTION
Power Outputs. The power outputs of the
A8901 CLB are n-channel DMOS transistors
with a total source plus sink rOS(on) of typically
1.1 n. Internal charge pump boost circuitry
provides voltage above supply for driving the
high-side DMOS gates. Intrinsic ground
clamp and flyback diodes provide protection
when switching inductive loads and may be
used to rectify motor back-EMF in powerdown conditions. An external Schottky power
diode or pass FET is required in series with
the load supply to allow motor back-EMF
rectification in power down conditions.
Back-EMF Sensing Motor Startup and
Running Algorithm. The A8901 CLB provides a complete self-contained back-EMF
sensing startup and running commutation
scheme. The three half-bridge outputs are
controlled by a state machine. There are six
possible combinations. In each state, one
output is high (sourcing current), one low
(sinking current), and one is OFF (high impedance or 'Z'). Motor back-EMF is sensed
at the OFF output. The truth table for the
output drivers sequencing is:
Sequencer
State

OUTA

OUTB

1
2

High

Low
Low

3
4

Low
Low

Z

Z

5

Z

High
High

6

High

Z

WP~016-1

Startup Oscillator. If the motor does not move at the initial startup
state, then it is in a null-torque position. In this case, the outputs are
commutated automatically by the startup oscillator after a period set by
the external capacitor at CST.

OUTc

Z

VCWD

High
High

--------------~

Dwg. WP·020

Z
Low
Low

At startup, the outputs are enabled in one
of the sequencer states shown. The backEMF is examined at the OFF output by
comparing the output voltage to the motor
centertap voltage at CENTERTAP. The motor will then either step forward, step backward, or remain stationary (if in a null-torque
position). If the motor moves, the back-EMF
detection circuit waits for the correct polarity
back-EMF zero crossing (output crossing
through centertap). True back-EMF zero
crossings are used by the adaptive commutation delay circuit to advance the state
sequencer (commutate) at the proper time to
synchronously run the motor. Back-EMF zero
crossings are indicated by FCOM, an internal
signal that toggles at every zero crossing.
FCOM is available at the DATA terminal via
the programmable data out multiplexer.
5-6

Dwg.

where

teST =

4{VCSTH - VcsTd X CST
IST(Charge) + IST(diScharge)

In the next state, the motor will move, back EMF will be detected,
and the motor will accelerate synchronously. Once normal synchronous back-EMF commutation occurs, the startup oscillator is defeated
by pulses of pulldown current at CST at each commutation, which prevents CST from reaching its upper threshold and thus completing a cycle
and commutating.

8901
3-PHASE BRVSHLESS DC MOTOR CONTROLLERlDRlVER
WITH BACK-EMF SENSING
Adaptive Commutation Delay. The adaptive commutation delay circuit uses the back-EMF zero-crossing indicator signal (FCOM) to determine an optimal commutation time
for efficient synchronous operation. This circuit commutates the outputs, delayed from the last zero crossing, using two external timing capacitors, COt and Co 2 , to measure the time between crossings.

-1

NORMAL COMMUTATION

tFCOMrDwg. WP·022

WATCHDOG-TRIGGERED
COMMUTATION

V CWD

BLANK

Dwg. WP-021

Dwg. WP-016-2

where

t

t
ICD(charge)
CD = FCOM x IICD(discharge) I

C0 1 charges up with a fixed current from its 2.5 V reference while FCOM is high. When FCOM goes low at the next
zero crossing, COt is discharged at approximately twice
the charging current. When COt reaches the CO threshold, a commutation occurs. CO 2 operates similarly except
on the opposite phase of FCOM. Thus the commutations
occur approximately halfway between zero crossings. The
actual delay is slightly less than halfway to compensate for
electrical delays in the motor, which improves efficiency.

Blanking and Watchdog Timing Functions. The blanking and watchdog timing functions are derived from one
timing capacitor, Cwo.
VTL X Cwo
where
tBLANK =
Icwo
VTH x Cwo
and
two
Icwo
The CWO capacitor begins charging at each commutation, initiating the BLANK signal. BLANK is an internal signal
that inhibits the back-EMF comparators during the commutation transients, preventing errors due to inductive recovery and voltage settling transients.
The watchdog timing function allows time to detect
correct motor pOSition by checking the back-EMF polarity
after each commutation. If the correct polarity is not
observed between tBLANK and two, then the watchdog timer
com mutates the outputs to the next state to synchronize
the motor. This function is useful in preventing excessive
reverse rotation, and helps in resynchronizing (or starting)
with a moving spindle.

5-7

voo

r----+----,

I

ERROR SLOW- }-I

I
I
I
I

I
I

FIL ER

I
I
I

I
I
I

I

l.."""~

LINEAR
: ''', CURRENT CONTROL

I"

:

...... ,.....

I

II . . . . . . . . . . . '_ ______________ JJ

I
I
I

I
I
I
I

I

MAX CURRENT LIMIT
:
----------------------~

Current Control. The A8901 CLB provides
linear current control of the sink drivers during
start-up and running modes. In the start-up
mode, the maximum load current can be
programmed via the serial port (see Serial
Port). During the running mode, the output
current is linearly controlled for low noise in
frequency-locked or phase-locked speedcontrol systems. To accomplish this the load
current is monitored by an internal sense
resistor (RS). The voltage across the sense
resistor is compared to one-tenth the voltage
at the FILTER terminal less two diode drops
(see Figure 1), generating an error voltage to
drive the gate of the appropriate output sink
transistor. This creates a load current that is
proportional to the voltage at the FILTER
terminal less two diode drops. This
transconductance function is lOUT = (VFILTER2Vo) /10Rs. Where Rs is nominally 0.2 Q,
and Vo is approximately 0.7 V.

5-8

Dwg. EP-046-1

Speed Control. The A8901 CLB has been configured to operate in
conjunction with external digital circuitry to provide frequency-locked
loop speed control of spindle motors. The TACH and REF inputs are
used to turn on current sources Ic and Id to charge and discharge a
lead/lag loop filter compensation network (see Figure 2). The truth
table for this function is:

REF

TACH

'e

'd

0
0
1
1

0
1
0
1

off
on
off
off

off
off
on
off

The external circuitry required for implementation of the speed
control loop is shown in Figure 2. The operation of this circuit is as
follows: the FCOM signal is a logic signal that changes state every time
the A8901 CLB detects a back-EMF zero crossing. By dividing the
FCOM signal by three times the number of poles in the motor, a TACH
signal is developed that changes state every mechanical revolution.
This is done to develop a low-jitter tachometer signal. The low jitter
is achieved because each time the TACH signal changes state the
back-EMF circuitry is looking at the same magnet pole pair.

8901
3-PHASE BRVSHLESS DC MOTOR CONTROLLERIDRIVER
WITH BACK-EMF SENSING
Figure 2
EXTERNAL DIGITAL CIRCUITRY REQUIRED FOR
FREQUENCY-LOCK LOOP SPEED CONTROL
+

FCOM

NO. OF POLES x 3

1---___1'--

COUNTER
OSC

0

ENABLE

CLOCK

TACH

S

Q
LATCH
D

R

---0 +5V

Microprocessor controlled phase-locked
loop speed control systems can use the
FILTER terminal as a transconductance input
by omitting the loop filter components and
connecting TACH and REF to ground.
Serial Port. The serial port functions to read
or write various operational and diagnostic
modes from or to the A8901 CLB. The serial
port DATA is enabled/disabled by the CHIP
SELECT terminal; its direction is controlled
by the REAOIWRITE terminal. When CHIP
SELECT is high the serial port is disabled and
the chip is not affected by changes in data at
the DATA or CLOCK terminals.

Q

There are five bits in the serial input port.
DO will be the last bit written to the serial port.
Their functions are:

REF

Serial Port Bit Definitions.

TACH (SLOW)

~

DO - Sleep/Run Mode;
LOW = Sleep, HIGH = Run
This bit allows the A8901 CLB to be
powered down when not in use.

L

TACH (FAST)

REF

ERROR FAST (DISCHARGES FILTER
ERROR SLOW (CHARGES FILTER.I---4--.!
Owg. EP-030

The derived TACH signal is compared to the desired time (REF) for
one revolution. This is done by using the positive-going edge of the
TACH signal to trigger a latch that enables a counter. The counter is
driven by an accurate oscillator signal and (in conjunction with an AND
gate) is used to count the desired number of oscillator cycles ina single
revolution. When the counter reaches its desired number the latch is
reset and the REF signal goes low (see Figure 2). The TACH and REF
signals are fed back to the A8901 CLB to charge and discharge the filter
compensation network. If the TACH signal goes low before REF an
Error-Fast signal turns on Id lowering the current in the motor and
thereby reducing its speed. If the REF signal goes low before TACH
an Error-Slow signal turns on Ie which increases the load current and
thereby the speed of the motor. The loop filter components are used
to dampen the response of the loop and achieve optimal settling time.
Response time to disturbances in speed can be improved by
synchronizing to sector data once information is being read from the
disc. This change can be made by changing the count number in the
counter and switching TACH to a sector tachometer signal. This
should be done when TACH and REF are in the low state so as not
to generate an erroneous error signal.

01 - Step Mode;
LOW = Normal Operation,
HIGH = Step Only
When in the step-only mode the
back-EMF detection circuitry is
disabled and the power outputs
are stepped through their normal
commutation sequence by the
start-up oscillator. This mode is
intended to facilitate device and
system testing.
02 - Read Output Select;
LOW = Thermal Shutdown Status,
HIGH = Start-Up Oscillator.
03 and 04 - These two bits set the maximum
output current according to the
following truth table:

03

04

louT(MAX)

0
0
1
1

0
1
0
1

1A
800mA
600mA
400mA

5-9

8901
3-PHASE BRVSHLESS DC MOTOR CONTROLLERIDRIVER
WITH BACK-EMF SENSING
Write Mode (READIWRITE Low).
To write data to the serial port, the READ/
WRITE terminal and the CLOCK terminal
should be low prior to the CHIP SELECT
terminal going low. Once CHIP SELECT
goes low, information on the DATA terminal
is read into the shift register on the positivegoing transition of the CLOCK. Data written
into the serial port is latched and becomes
active on the low-to-high trans ilion of the
CHIP SELECT terminal at the end of the
write cycle.

TYPICAL APPLICATION

z

o

§~
::Ow
~Cl
o

u

Read Mode (READ/WRITE High).
The transitions of the start-up oscillator or
the status of the thermal shutdown of the
A8901 CLB can be read from the serial port
DATA terminal. The choice between these
two functions is selected by the D2 bit in the
serial port's latches. To read data the READ/
WRITE terminal must be high prior to CHIP
SELECT going low. When CHIP SELECT
goes low the DATA terminal will register the
status of the selected function. If the status of
the selected function is changing, the data
output will reflect this as long chip select is
held low and READIWRITE is held high.
Thermal Shutdown Status: LOW = No
Fault, HIGH = Fault
Oscillator: Each change represents a
step to the next state in the six step output
sequence.
The READ/WRITE terminal should be
held high until the CHIP SELECT terminal has
returned high to avoid erroneous data being
written to the device.
Reset. The RESET terminal when pulled low
clears all serial port bits, including the DO
latch, which puts the A8901 CLB in the sleep
mode.
Centertap. The A8901 CLB internally simulates the centertap voltage of the motor. To
obtain reliable start-up performance from
motor to motor, the motor centertap should
be connected to this terminal.
External Component Selection.
Applications information is available from the
factory for external component selection,
frequency-locked loop speed control, and
commutation delay capacitor selection.

5-10

Dwg. EP-032B

3-PHASE BRVSHLESS DC MOTOR
CONTROLLERlDlUVER WITH BACK-EMF SENSING
The A8902CJT and A8902CLB are three-phase brush less dc motor
controller/drivers for use in 5 V or 12 V hard-disk drives. The three halfbridge outputs are Iowan-resistance n-channel DMOS devices capable
of driving up to 1.25 A. The A8902- provides complete, reliable, selfcontained back-EMF sensing motor startup and running algorithms. A
programmable digital frequency-locked loop speed control circuit
together with the linear current control circuitry provides precise motor
speed regulation.

A8902CLB
LOAD
SUPPLY

A serial port allows the user to program various features and
modes of operation, such as the speed control parameters, startup
current limit, sleep mode, diagnostic modes, and others.

LOGIC
SUPPLY

SECTOR
DATA

Dwg. PP-0408

ABSOLUTE MAXIMUM RATINGS
alTA

= +25°C

Load Supply Voltage, VBB .......... 14 V
±1.25 A
Output Current, lOUT. . . .
Logic Supply Voltage, Voo ......... 6.0 V
Logic Input Voltage Range,
VIN . . . . . . . . . . .. -0.3 V to Vee + 0.3 V
Package Power Dissipation, Po. See Graph
Operating Temperature Range,
TA .................. O°C to +70°C
Junction Temperature, TJ ....... +150°Ct
Storage Temperature Range,
Ts ................ -55°C to +150°C

The A8902- is fabricated in Allegro's BCD (Bipolar CMOS DMOS)
process, an advanced mixed-signal technology that combines bipolar,
analog and digital CMOS, and DMOS power devices. The A8902CLB
is provided in a 24-lead wide-body SOIC batwing package while the
A8902CJT is supplied in a 64-lead TQFP. Both packages provide for
the smallest possible construction in surface-mount applications.

FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•

DMOS Outputs
Low rOS(on)
Startup Commutation Circuitry
Back-EMF Commutation Circuitry
Serial Port Interface
Frequency-Locked Loop Speed Control
Sector Data Tachometer Signal Input
Programmable Start-Up Current
Diagnostics Mode
Sleep Mode
Linear Current Control
Internal Current Sensing
Dynamic Braking Through Serial Port
Power-Down Dynamic Braking
System Diagnostics Data Out
Data Out Ported in Real Time
Internal Thermal Shutdown Circuitry

t Fault conditions that produce excessive junction
temperature will activate device thermal shutdown
circuitry. These conditions can be tolerated, but
should be avoided.
Output current rating may be restricted to a value
determined by system concerns and factors.
These include: system duty cycle and timing,
ambient temperature, and use of any heatsinking
and/or forced cooling. For reliable operation, the
specified maximum junction temperature should
not be exceeded.

Always order by complete part number:

Part Number

Package

A8902CJT

64-Lead Thin Quad Flatpack

A8902CLB

24-Lead Batwing SOIC
5-11

FUNCTIONAL BLOCK DIAGRAM

o

LOGIC
SUPPLY

= 'LB' BATWING SOIC

o ='Jr

THIN QUAD FLATPACK

CD2

~

CST

BRAKE

24
22

VDD

LOAD
SUPPLY
OUTA

OUTB

OUTC

CENTERTAP
CWD
SECTOR
DATA
CURRENT
CONTROL

OSC

PWRGROUND
GROUND
GROUND
60

GROUND

13

FILTER

'"g

()

()

Ii

Dwg. FP·034

"LB" Package

,

2.5

~ 2.0

z
o

:m

1.5

is

a:

~

~ 1.0
w

~

'"'"

;r.

0.5

w

...J

m

~
g a25
...J

..:

Jl

~

"

OJ
0

~

()

50

75

A8902CJT

~

-

'60

"0O'%-

'"1'\

100

TEMPERATURE IN

125

150

°c

Dwg. GP·019A

5-12

Dwg. PP-055

ELECTRICAL CHARACTERISTICS at TA

= +25°C, VDD = 5.0 V
Limits

Characteristic

Test Conditions

Min.

Typ.

Max.

Logic Supply Voltage

Voo

Operating

4.5

5.0

5.5

V

Logic Supply Current

100

Operating

-

7.5

10

mA

Load Supply Voltage

V BB

Operating

Symbol

-

-

1.5

mA

4.5

-

14

V

TJ

-

165

°C

Ll.TJ

-

20

-

Sleep Mode

Thermal Shutdown
Thermal Shutdown Hys.

Units

°C

Output Drivers
Output Leakage Current

V BB = 14 V, V OUT = 14 V

Output Sustaining Voltage
Clamp Diode Forward Voltage

1.0

300

-

·1.0

-300

-

1.4

1.8

lOUT = 600 MA, A8902CLB

-

1.1

1.4

V BB = 14 V, IOUT= louT(MAX), L = 3 mH

14

-

-

V

IF= 1.0A

-

1.25

1.5

V

SECTOR DATA, RESET, CLK,

-0.3

-

1.5

V

VIN(l)

CHIP SELECT, OSC, BRAKE

3.5

-

5.3

V

IIN(o)

VIN =

-

-

-0.5

IIN(l)

VIN = 5.0 V

-

1.0

flA
flA

1.5

V

-

-

V

V BB = 14 V, V OUT =
Total Output ON Resistance
(Source + Sink + Rs)

-

flA
flA
n
n

losx

rOS(on)

VOS(sus)
VF

aV

lOUT = 600 MA, A8902CJT

Control Logic
Logic Input Voltage

Logic Input Current

DATA Output Voltage

CST Current

VIN(O)

aV

VOUT(O)

lOUT = 500 flA

-

VOUT(l)

lOUT = -500 flA

3.5

ICST

CST Threshold

VCSTH

Filter Current

IFILTER

Charging

14

20

28

Discharging

-14

-20

-28

flA
flA

2.1

2.5

2.9

V

-

500

-

mV

Charging

7.0

10

15

Discharging

-7.0

-10

-15

flA
flA

VCSTL

Co Current
(COlor CO 2)
CD Current Matching

Ico

-

CD Threshold

Vco

Cwo Current

Icwo

Leakage, VFILTER = 2.5 V

-

5.0

-

nA

Charging

14

22

28

flA

Discharging

-26

-35

-66

Ico(olsCHRGjllco(cHRG)

1.7

2.2

2.3

flA
-

-

2.5

-

V

14

22

28

flA

Charging

Continued next page ...

5-13

... continued from.previous page

Limits
Symbol

Characteristic
Cwo Threshold Voltage

Max. FLL Oscillator Frequency

Test Conditions

Min.

Typ.

Max.

Units
V

VTL

0.80

0.85

0.95

VTH

2.4

2.75

3.0

V

20

-

-

MHz

fosc

Voo = 5.1 V. TA = 25°C
Voo = 4.5 V. TA = 70°C

-

10

-

MHz

louT = 1 A

-

±20

-

%

VSRK

1.4

1.7

2.0

V

Transconductance Gain

gm

0.26

0.35

0.50

AlV

Centertap Resistors

RCT

5.0

10

13

kQ

-

louT(MAX) Accuracy
BRAKE Threshold

-

Back-EMF Hysteresis

VSEMF - VCTAP at

15

25

40

mV

FCOM Transition

-15

-25

-40

mV

SERIAL PORT TIMING CONDITIONS

CHIP SELECT

CLOCK

DATA

Dwg. WP-019

A. Minimum CHIP SELECT setup time before CLOCK rising edge ........... 100 ns
B. Minimum CHIP SELECT hold time after CLOCK rising edge ................ 150 ns
C. Minimum DATA setup time before CLOCK rising edge ......................... 150 ns
D. Minimum DATA hold time after CLOCK rising edge .............................. 150 ns
E. Minimum CLOCK low time before CHIP SELECT ................................... 50 ns
F. Maximum CLOCK frequency ............................................................... 3.3 MHz

5-14

TERMINAL FUNCTIONS
"JT" Term.

"LB" Term.

Terminal Name

Function

24

1

LOAD SUPPLY

Vss; the 5 V or 12 V motor supply.

26

2

CO 2

One of two capacitors used to generate the ideal commutation points from the
back-EMF zero crossing points.

28

3

Cwo

Timing capacitor used by the watchdog circuit to disable the back-EMF comparators during commutation transients, and to detect incorrect motor position.

32

4

CST

Startup oscillator timing capacitor.

36

5

OUTA

Power amplifier A output to motor.

-

6-7

GROUND

40

-

PWRGROUND

43

8

OUTs

50

9

OUTc

54

10

CENTERTAP

56

11

BRAKE

57

12

CRES

59

-

GROUND

60

13

FILTER

61

14

SECTOR DATA

64

15

LOGIC SUPPLY

1

16

OSCILLATOR

3

17

DATA OUT
GROUND

-

18-19

16

20

RESET

17

21

CHIP SELECT

19

22

CLOCK

20

23

DATA IN

22

24

C 01

Power and logic ground and thermal heat sink.
Power ground.
Power amplifier B output to motor.
Power amplifier C output to motor.
Motor centertap connection for baCk-EMF detection circuitry.
Active low turns ON all three sink drivers shorting the motor windings to ground.
External capacitor and resistor at BRAKE provide brake delay. The brake function
can also be controlled via the serial port.
External reservoir capacitor used to hold charge to drive the source drivers'
gates. Also provides power for brake circuit.
Low-level analog and digital ground.
Analog voltage input to control motor current. Also, compensation node for
internal speed control loop.
External tachometer input. Can use sector or index pulses from disk to provide
precise motor speed feedback to internal frequency-locked loop.
Voo; the 5 V logic supply.
Clock input for the speed reference counter. Typical max. frequency is 10 MHz.
Thermal shutdown indicator, FCOM, TACH, or SYNC signals available in real
time, controlled by 2-bit multiplexer in serial port.
Power and logiC ground and thermal heat sink.
When pulled low forces the chip into sleep mode; clears all serial port bits.
Strobe input (active low) for data word.
Clock input for serial port.
Sequential data input for the serial port.
One of two capacitors used to generate the ideal commutation points from the
back-EMF zero crossing points.

5-15

FUNCTIONAL DESCRIPTION
Power Outputs. The power outputs of
the A8902CLB and A8902CJT are n-channel
DMOS transistors with a total source plus sink
rOS(on) of typically 1.1 nand 1.4 n, respectively. Internal charge pump boost circuitry
provides voltage above supply for driving the
high-side DMOS gates. Intrinsic ground
clamp and flyback diodes provide protection
when switching inductive loads and may be
used to rectify motor back-EMF in powerdown conditions. An external Schottky power
diode or pass FET is required in series with
the load supply to allow motor back-EMF
rectification in power down conditions.
Back-EMF Sensing Motor Startup and
Running Algorithm. The A8902- provides a
complete self-contained back-EMF sensing
startup and running commutation scheme.
The three half-bridge outputs are controlled
by a state machine. There are six possible
combinations. In each state, one output is
high (sourcing current), one low (sinking
current), and one is OFF (high impedance or
'Z'). Motor back EMF is sensed at the OFF
output. The truth table for the output drivers
sequencing is:
Sequencer
State

OUTA

OUT B

OUTe

2
3
4
5
6

High
Z
Low
Low
Z
High

Low
Low
Z
High
High
Z

Z
High
High
Z
Low
Low

at the proper time to synchronously run the motor. Back-EMF zero
crossings are indicated by FCOM, an internal signal that toggles at
every zero crossing. FCOM is available at the DATA OUT terminal
via the programmable data out multiplexer.

V OUTA

V OUTB

SOURCE ON

BACK-EMF VOLTAGE

Dwg. WP·016·1

Startup Oscillator. If the motor does not move at the initial startup
state, then it is in a nUll-torque position. In this case, the outputs are
commutated automatically by the startup oscillator after a period set by
the external capacitor at CST.

/ 4 - - - - teST - - - -

Dwg. WP-020

At startup, the outputs are enabled in one
of the sequencer states shown. The back
EMF is examined at the OFF output by
comparing the output voltage to the motor
centertap voltage at CENTERTAP. The
motor will then either step forward, step
backward, or remain stationary (if in a nulItorque position). If the motor moves, the
back-EMF detection circuit waits for the
correct polarity back-EMF zero crossing
(output crossing through centertap). True
back-EMF zero crossings are used by the
adaptive commutation delay circuit to
advance the state sequencer (commutate)

5-16

where

teST =

4(VcSTH - VCSTL) X CST
IST(Charge) + IST(diScharge)

In the next state, the motor will move, back EMF will be detected,
and the motor will accelerate synchronously. Once normal synchronous back-EMF commutation occurs, the startup oscillator is defeated
by pulses of pulldown current at CST at each commutation, which
prevents CST from reaching its upper threshold and thus completing a
cycle and commutating.

Adaptive Commutation Delay. The
adaptive commutation delay circuit uses the
back-EMF zero-crossing indicator signal
(FCOM) to determine an optimal commutation time for efficient synchronous operation.
This circuit commutates the outputs, delayed
from the last zero crossing, using two
external timing capacitors, COl and CO2, to
measure the time between crossings.

Blanking and Watchdog Timing Functions. The blanking and
watchdog timing functions are derived from one timing capacitor, Cwo.
where

tBLANK

=

VTL

X

Cwo

Icwo
and

two =

VTH

Cwo
Icwo

X

The CWD capacitor begins charging at each commutation, initiating
the BLANK signal. BLANK is an internal signal that inhibits the backEMF comparators during the commutation transients, preventing errors
due to inductive recovery and voltage settling transients.
The watchdog timing function allows time to detect correct motor
position by checking the back-EMF polarity after each commutation. If
the correct polarity is not observed between tBLANK and two, then the
watchdog timer commutates the outputs to the next state to synchronize
the motor. This function is useful in preventing excessive reverse
rotation, and helps in resynchronizing (or starting) with a moving spindle.

Dwg. WP-022

NORMAL COMMUTATION

Dwg. WP-016-2

where

teo = tFCOM X

ICo(charge).

]
[ Ico(discharge)

COl charges up with a fixed current from
its 2.5 V reference while FCOM is high.
When FCOM goes low at the next zero
crossing, COl is discharged at approximately
twice the charging current. When CD l
reaches the CD threshold, a commutation
occurs. CO2 operates similarly except on the
opposite phase of FCOM. Thus the commutations occur approximately halfway
between zero crossings. The actual delay is
slightly less than halfway to compensate for
electrical delays in the motor, which improves efficiency.

V CWD

BLANK

Dwg. WP·021

WATCHDOG-TRIGGERED
COMMUTATION

5-17

Current Control. The A8902- provides linear current control via
the FILTER terminal, an analog voltage input. Maximum current limit is
also provided, and is controlled in four steps via the serial port. Output
current is sensed via an internal sense resistor (Rs). The voltage
across the sense resistor is compared to one-tenth the voltage at the
FILTER terminal less two diode drops, or to the maximum current limit
reference, whichever is lower. This transconductance function is
lOUT = (VFlLTER -2Va) / 1ORs, where Rs is nominally 0.3 Q and Va is
approximately 0.7 V.

PQWERUP
ERROR FAST

ll
S

a

YANK
-I

I
I
INITIALIZATION I
R

Dwg. EP-046

Speed Control. The A8902- includes a frequency-locked loop
speed control system. This system monitors motor speed via internal
or external digital tachometer signals, generates a precision speed
reference, determines the digital speed error, and corrects the motor
current via an internal charge pump and external filtering components
on the FILTER terminal.
A once per revolution TACH signal can be generated by counting
cycles of FCOM (the number of motor poles must be selected via the
serial port). TACH is then a jitter-free signal that toggles once per
motor revolution. The rising edge of TACH triggers REF, a precision

f-"--·TACH

REF~
TACH.r--L..J
SERIAL PORT
REGISTER

EARO~
SLOW

REF~

osc

TACH~

E~~~~
Dwg. EP-045

5-18

desired
total count

60 x fosc
desired motor speed (rpm)

where the total count (number of oscillator cycles) is equal to the sum of the selected
(programmed low) count numbers corresponding to bits D5 through D18.
The speed error is detected as the
difference in falling edges of TACH and
REF. The speed error signals control the
error-correcting charge pump on the FILTER
terminal, which drive the external loop
compensation components to correct the
motor current.

FROM FLL SPEED.CONTROl

FCOM

speed reference derived by a programmable
counter. The duration of REF is set by
programming the counter to count the desired
number of OSC cycles

Sector Mode. An external tachometer
Signal, such as sector or index pulses, may
be used to create the TACH signal, rather
than the internally derived once around.
To use this mode, the signal is input to the
SECTOR terminal, and the sector mode must
be enabled via the serial port. When Switching from the once-around mode to sector
mode, it is important to monitor the SYNC
signal on DATA OUT, and switch modes only
when SYNC is low. This ensures making the
transition without disturbing the speed control
loop. The speed reference counter should be
reprogrammed at the same time.
Speed Loop Initialization (YANK). To
improve the acquire time of the speed control
loop, there is an automatic feature controlled
by an internal YANK signal. The motor is
started at the maximized programmed current
by bypassing the FILTER terminal. The
FILTER terminal is clamped to two diodes
above ground, initializing it near the closed
loop operating point. YANK is enabled at
startup and stays high until the desired speed
is reached. Once the first error-fast occurs,
indicating the motor crossed through the
desired speed, YANK goes low. This
releases the clamp on the FILTER terminal
and current control is returned to FILTER.
This feature optimizes speed acquire and
minimizes settling. The Current Control
Block Diagram illustrates the YANK signal
and its effects.

FAULT)>--...>f--

'

i

"--I"---.

-.-0s

I

SRAKE

RS

Dwg.OP-004

Braking. A dynamic braking feature of the A8902- shorts the
three motor windings to ground. This is accomplished by turning the
three source drivers OFF and the three sink drivers ON. Activation of
the brake can be implemented through the BRAKE input or through
the D2 bit in the serial port. The supply voltage for the brake circuitry
is the CRES voltage, allowing the brake function to remain active after
power failure. Power-down braking with delay can be implemented by
using an external RC and other components to control the brake
terminal, as shown. Brake delay can be set using the equation below
to ensure that voice-coil head retract occurs before the spindle motor
brake is activated. Once the brake is activated, due to the inherent
capacitive input, the three sink drivers will remain active until the
device is reset.
tBRK = RBCB (1 - In

VBRK

Centertap. The A8902- internally simulates the centertap voltage of the motor. To
obtain reliable start-up performance from motor
to motor, the motor centertap should be
connected to this terminal.
External Component Selection. Applications information regarding the selection of
external component values is available from
the factory for external component selection,
frequency-locked loop speed control, and
commutation delay capacitor selection.

)

VFAULT- Vo

TYPICAL APPLICATION

Dwg. EP-036C

5-19

Serial Port. The serial port functions to write various operational
and diagnostic modes to the A8902-. The serial port DATA IN is
enabled/disabled by the CHIP SELECT terminal. When CHIP
SELECT is high the serial port is disabled and the chip is not
affected by changes in data at the DATA IN or CLOCK terminals.
To write data to the serial port, the CLOCK terminal should be low
prior to the CHIP SELECT terminal going low. Once CHIP SELECT
goes low, information on the DATA IN terminal is read into the shift
register on the positive-going transition of the CLOCK. There are 24
bits in the serial input port.
Data written into the serial port is latched and becomes active
upon the low-to-high transition of the CHIP SELECT terminal at the
end of the write cycle. 00 will be the last bit written to the serial port.

SERIAL PORT BIT DEFINITIONS.
DO - Sleep/Run Mode; LOW = Sleep, HIGH = Run
This bit allows the device to be powered down when not in use.
01 - Step Mode; LOW = Normal Operation, HIGH = Step Only
When in the step-only mode the back-EMF commutation circuitry
is disabled and the power outputs are com mutated by the startup oscillator. This mode is intended for device and system
testing.
D2 - Brake; LOW = Run, HIGH

= Brake.

04

Current Limit

0
0
1
1

0
1
0
1

Saturated
1A
800mA
600 mA

05 thru 018 - This 14-bit word (active low) programs the
desired motor speed.

Count Number

05
06
07
08
09
010
011
012
013
014
015
016
017
018

16
32
64
128
256
512
1024
2048
4096
8192
16384
32768
65536
131 072

019 - Speed-control mode switch; LOW =
internal once-around speed signal,
HIGH = external sector data.
020 and 021 - These bits program the number of
motor poles for the once-around FCOM
counter:

03 and 04 - These two bits set the output current limit:

03

Bit Number

020

021

0
0
1
1

0
1
0
1

Motor Poles
8

16
12

D22 and D23 - Controls the multiplexer for
DATA OUT:
REF

time to set

022

023

OATAOUT

0
0
1
1

0
1
0
1

TACH (once around or sector)
Thermal Shutdown
SYNC
FCOM

Reset. The RESET terminal when pulled
low clears all serial port bits, including the 00
latch, which puts the A8902- in the sleep
mode.

5-20

DVAL SCHOTTKY DIODE.

3

Schottky barrier diodes combine high rectification efficiency with
high switching speeds and low series resistance. The A8920SLR dualdiode is designed specifically for hard-disk drive applications requiring
low voltage drop rectification of the spindle motor back emf during
power-down head retraction. It is supplied in a 3-lead small-outline
transistor package (SOT-23/TO-236AB) for surface-mounting for use
over the operating temperature range of -20°C to +85°C.

FEATURES
• Low Forward Voltage Drop 440 mV Typical at 150 mA
• 500 mA Forward Current
• 20 V Reverse Voltage
Dwg. No. PO-C02

TYPICAL APPLICATION
Voo

L

L
Dwg. No. EO-002

ABSOLUTE MAXIMUM RATINGS
at TA=+25°C
Forward Current, IF .......................... 500 rnA
Reverse Voltage, V R .....•......................• 20 V
Package Power Dissipation,
Po ........................................ See Graph
Operating Temperature Range,
TA .................................. -20°C to +85°C
Storage Temperature Range,
Ts ................................ -65°Cto+150°C

Always order by complete part number:

1A8920SLR I.
5-21

ELECTRICAL CHARACTERISTICS at T A = +25°C (unless otherwise specified).
Limits
Characteristic

Test Conditions

Symbol

Min.

Typ.

Max.

Units

IR = 100!lA

20

-

-

V

Reverse Leakage Current

IR

VR = 10 V

-

1.6

20

!lA

Forward Voltage

VF

IF = 50 mA

-

346

400

mV

IF = 150 mA

-

440

500

mV

Junction Capacitance

CT

VR = 0 V, f = 1 MHz

370

trr

-

pF

IF = IR = 100 mA

-

Reverse Breakdown Voltage

V(BR)

Reverse Recovery Time

32

ns

TYPICAL CHARACTERISTICS
100

600

~~

30
500

>

"""...z~

E

~
W

400

".......""

W

II:
II:

§?
Q

II:

~
fr

10

3.0

~

<.>

~

w

300

(J)

II:

1.0

W

>
W

II:

II:

200

./

0.3

0.1
1k

~
o

5.0

Dwg. No. GO-003

;:

250

~

0

~

20

o~

in

!!l
0

15 0

II:

w

;:
0

a.
w 100

"

~

....

~S'>.so

~

"~

"""
<.>
'"
~
w

50

'"~

....0
....

""

10

15

20

Dwg. No. GO-004

E

z

V

REVERSE VOLTAGE IN VOLTS

FORWARO CURRENT IN rnA

0
25

50

75

100

"

125

AMBIENT TEMPERATURE IN °c

150

Dwg. No. GD-002

5-22

~

/

3-PHASE BRUSHLESS DC MOTOR CONTROLLEHI
DRIVER WITH LINEAR CURRENT CONTROL
AND POWER DMOS OUTPUTS
The A8925CEB is a DMOS three-phase brushless dc motor controller/driver designed for use in Winchester disk drives and other data
storage applications. The power output stages are capable of ±4 A output currents and have DMOS power outputs with less than 0.25 Q
rDS(on) for low power dissipation. Intrinsic ground clamp and flyback diodes protect the output drivers when switching inductive loads. Thermal shutdown circuitry is provided to protect the device from excessive
junction temperature.
A transconductance amplifier is used to linearly regulate the load
current and control motor speed. Internal current-sensing circuitry
eliminates the need for external sense resistors. Analog and digital
control circuitry provide complete sequencing of the output drivers as
well as providing brake, disable, and tachometer functions. A FAULT
output flag indicates the presence of an under-voltage condition on the
12 V supply, excessive junction temperature, or an invalid Hall input
combination. The A8925CEB's commutation logic is compatible with
motors that have digital Hall-effect sensors with 120° of electrical separation. Internal charge pump circuitry is provided to drive the N-channel
DMOS source drivers to their required gate Voltages.
Dwg. PP-034

The A8925CEB is provided in a 44-lead PLCC power package for
surface-mount applications. The copper batwing provides for maximum
allowable package power dissipation in the smallest possible construction.

FEATURES
ABSOLUTE MAXIMUM RATINGS
AT TA = +25°C
Load Supply Voltage, Vss .......................... 14 V
Output Current, lOUT ........................... ±4.0 A
Logic Supply Voltage, Vcc .................... 14 V
Logic Input Voltage Range,
VIN ................................ -0.3 V to +6.0 V
Package Power Dissipation, Po .. See Graph
Operating Temperature Range,
TA ..................................... O°C to +70°C
Junction Temperature, TJ ............... +150°Ct
Storage Temperature Range,
Ts ............................. -55°C to +150°C

•
•
•
•
•
•
•
•
•

DMOS Outputs
Low rDS(on) - 0.25 Q Maximum
Linear Current Control
Internal Commutation Circuitry
Internal Current Sensing
Thermal Shutdown Circuitry
Under Voltage Detection Circuitry
Fault Output Flag
Power Surface-Mount Package

t Fault conditions that produce excessive junction
temperature will activate device thermal shutdown
circuitry. These conditions can be tolerated, but
should be avoided.
Output current rating may be restricted to a value
determined by system concerns and factors.
These include: system duty cycle and timing,
ambient temperature, and use of any heatsinking
and/or forced cooling. For reliable operation, the
specified maximum junction temperature should
not be exceeded.

Always order by complete part number: IA8925CEBI
5-23

8925
3-PHASE BRUSHLESS DC MOTOR CONTROLLERlDRlVER
WITH LINEAR CURRENT CONTROL
AND POWER DMOS OUTPUTS

C/)

12.5

~
~

z

10

0

;::
<0:

a.
iii
C/)

is
a:

7.5

w

;;::
0

a. 5.0
w

"
<0:

l<:
0

<0:

a.

w

2.5

..J

III

<0:

;;::
0

..J
..J

<0:

0
25

50

75

ELECTRICAL CHARACTERISTICS AT TA

125

100

TEMPERATURE IN

150

°c

Dwg. GP-020B

= +25°C, Vee = VBB = 12 V
Limits

Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

Units

Logic Supply Voltage

Vcc

Operating

10

12

14

V

Load Supply Voltage

V BB

Operating

10

12

14

V

Supply Current

Icc

Operating

50

mA

TJ

-

30

Thermal Shutdown

165

-

°C

lOUT ~ 4.0 A, Pulse Test

-

0.20

0.25

Q

lOUT ~ 4.0 A, L = 2 mH

14

-

-

V

IF = 4.0 A

1.5

2.0

V

10

300

~

VOUT~OV

-

-10

-300

~

ENABLE,POLE

-

-

0.8

V

Output Drivers
Output ON Resistance
Output Sustaining Voltage
Clamp Diode Forward Voltage
Output Leakage Current

rOS(on)
VOS(SUS)
VF
losx

VouT =14V

Control Logic
Logic Input Voltage

VIN(O)

Logic Input Voltage

VIN(O)

2.4

VIN(1)

-

BRAKE

3.0

VIN(1)
Logic Input Current

Logic Output Voltage
(FAULT, TACH)

IIN(O)

VIN = 0 V

IIN(1)

V IN

~5.0

V

VOUT(O)

lOUT ~ 3 mA

VOUT(1)

louT~ -50 ~

NOTE: Negative current is defined as coming out of (sourcing) the specified device terminal.

5-24

2.0

-

V

0.8

V

-

V

-1.0

~

1.0

~

0.8

V

-

V

Continued next page ...

.8925
3-PHASE BRUSHLESS DC MOTOR CONTROLLERIDRIVER
WITH LINEAR CURRENT CONTROL
AND POWER DMOS OUTPUTS
ELECTRICAL CHARACTERISTICS CONTINUED
Limits
Test Conditions

Characteristic

Min.

Typ.

Max.

-

5.0

10

[lA

3.0

5.0

mV

0

-

6.0

V

80

50

-

III k

1/1.2k

III Ak

-

8.0

-

9.5

V

-

-500

-

[1A

250

-

[1A

3.8

-

V

Error Amplifier
Input Bias Current

Is

Input Offset Voltage

Vas

Input Common-Mode Voltage Range

VIC

Error Voltage Gain

Avo

Unity Gain Bandwidth

BW

Common-Mode Rejection Ratio

CMRR

Power Supply Rejection Ratio

PSRR

V INI +) -VI NI -) ; 0
Avo; 100

-

VsouT/VSIN

1.0
80

dB
MHz
dB
dB

Miscellaneous
Current Sense Gain

Aics

Under-Voltage Trip Point

Vee

Hall Input Current

lOUT; 1.0 A

IINIO)

V IN ; 0 V

IIN(1)

VIN ; 5.0 V

Hall Input Threshold

VIN

Hall Input Pull-Up Resistance

Rpu

25

kQ

NOTE: Negative current is defined as coming out of (sourcing) the specified device terminal.

COMMUTATION TRUTH TABLE
Hall Sensor Inputs

Outputs
ENABLE BRAKE

FAULT

OUTA

H1

H2

H3

OUTs

OUTe

High
High
High
Low
Low
Low

Low
Low
High
High
High
Low

High
Low
Low
Low
High
High

High
High
High
High
High
High

High
High
High
High
High
High

High
High
High
High
High
High

High
High
Z
Low
Low
Z

Low
Z
High
High
Z
Low

Z
Low
Low
Z
High
High

High
Low

High
Low

High
Low

X

X

High
High
High

Low
Low

X

High
High
Low

X

Z
Z
Z

Z
Z
Z

Z
Z
Z

X

X

X

X

Low

X

Low

Low

Low

x ; Irrelevant
Z ; High Impedance

5-25

8925
3-PHASE BRUSHLESS DC MOTOR CONTROLLERIDRIVER
WITH LINEAR CURRENT CONTROL
AND POWER DMOS OUTPUTS
TERMINAL FUNCTIONS
Term.

Terminal Name

1
2

OUTe
LOGIC SUPPLY

3
4

LOGIC GROUND
OUTc

6
7-17
18
19

ENABLE
POWER GROUND

20
21

Power DMOS output.
Vcc; low-current 12 V supply for the logic.
Low-level logic ground.
Power DMOS output.
Active high chip enable.
Power ground and thermal heat sink.

VSENSE

External precision resistor for sense-FET current.

CaMP.

Compensation; error amplifier output.

REFERENCE

22
23

Function

VREF; voltage input that sets the power output current.

ERROR AMP.

Input that controls the current in the load.

LOAD SUPPLY

Vee; high-current 12 V supply for the voice-coil motor.

BRAKE

A logic low turns OFF all source drivers and turns ON all sink drivers (shorts the windings to
ground).

24

H1

High-level input from a Hall sensor.

26
28

H2

High-level input from a Hall sensor.

H3

High-level input from a Hall sensor.

29-39
40

POWER GROUND

42
43

OUTA

Power DMOS output.

TACH

Speed reference output; the H1 Hall input divided by the number of motor poles.

44

POLE

Designates four- or eight-pole motor; Low

FAULT

Power ground and thermal heat sink.
A logic low at this output indicates a thermal shutdown, under -voltage fault, or an invalid Hall
input combination.

= 4 pole,

High

= 8 pole.

FUNCTIONAL DESCRIPTION
Power Outputs (OUTA, OUTB, and
OUTd. The power outputs of the A8925CEB
are DMOS transistors with a maximum rDS(on)
of 0.25 Q. Intrinsic ground clamp and flyback
diodes clamp transient voltage spikes when
switching inductive loads. Internal charge
pump circuitry is used to drive the gates of the
N-channel source drivers to their required
gate voltages.

CHARGE
PUMP

!
VSENSE

! .---

IOUf

1200

!
t-A./VvI

~~
-.:..

R,

R,

vREF --f\/VIv.SUB

Dwg. EP·040

Current Control. Current in the load is
monitored by an internal sense amplifier that
produces an output current that is approximately one twelve hundredth that of the load
current (see Figure). This current is output to
the VSENSE terminal and develops a voltage
across Rs that equals Rs • ILOAoI1200. This
sense voltage (VSENSE) is compared to a ref-

Continued next page ...

5-26

8925
3-PHASE BRVSHLESS DC MOTOR CONTROLLERIDRIVER
lVlTH LINEAR CVRRENT CONTROL
AND POlVER DMOS OVTPVTS
erence voltage (VREF) and an error voltage is
developed that is gated in by the sequential
control logic to drive the gate of the appropriate output sink transistor. A
transconductance control function is thus realized where lOUT = VREF· 1200/Rs. External
components Cj, C2, Rl, R2, and R3 are compensation components used to obtain optimal
response and settling of the current control
loop. Information on how to select these
components is available.
FAULT. The FAULT terminal when low
indicates the presence of one of three fault
conditions:
A)

An under-voltage condition
on the logic supply. The trip
point for this function is
between 8 and 9.5 volts.

B)

An invalid Hall input combination ... all inputs High or
all inputs Low.

C)

An excessive device
junction temperature. The
thermal shutdown circuitry
disables the output drivers
in addition to forcing the
FAULT output signal low.

TACH and POLE. In order to develop a
low-jitter tachometer signal (TACH) for use in
controlling motor speed, the A8925CEB divides the frequency of the Hl input by the
number of poles in the motor. This eliminates
the jitter caused by variations in Hall-effect
device placement, sensitivity, and magnet
strengths by always changing state when
looking at the same magnet/sensor pair. The
resulting TACH signal changes state every mechanical revolution of the motor. The POLE
input sets the TACH signal for four-pole motors
when Low or eight-pole motors when High.

Hall Inputs (Hlo H2. H3). The A8925CEB is configured for use with
open-collector Hall-effect devices. Internal 25 kQ pull up resistors to 10
volts are connected to these inputs.
ENABLE. The ENABLE terminal when Low puts the device in a
low current consumption, power-down mode. When ENABLE is High
the device is active.
BRAKE. When the BRAKE input goes Low the output source drivers are disabled and the gates of the sink drivers are pulled high and
left floating. This achieves optimum passive braking performance since
the sink power DMOS output drivers are ON until the motor has fully
completed braking. The braking control circuitry operates off the load
supply (Vss) to allow it to remain operational during power loss by using
the back-EMF voltage of the motor as it's supply.
LOAD SUPPLY (Vss). This terminal is the power supply connection for the power output drivers and braking control circuitry. This terminal should be decoupled with a large-value capacitor to absorb load
currents dumped back into the supply during the de-energization of motor windings. These currents can cause the supply voltage to exceed
the maximum voltage rating of the device if not properly decoupled.
The intrinsic ground clamp and flyback diodes will rectify the motor's
back-EMF voltage during power loss. In applications were use of the
motor's back-EMF voltage is desired a series diode should be used to
isolate this terminal from the logic supply (Vce). This is to avoid dumping the charge back into the supply and therefor clamping the voltage
available from rectification of the motor's back-EMF Voltage.
LOGIC SUPPLY (Vec). This is the 12 volt supply terminal for the
A8925CEB and powers all circuitry except the power outputs and brake
control circuitry.
LOGIC GROUND. This must be connected to the power ground
terminals in systems that do not use separate power and logic grounds.
POWER GROUND. Terminals 7 through 17 and 29 through 39 are
webbed together and attach to the die mounting area to form a low
thermal resistance path to allow heat to be conducted out of the device.
The power dissipation of the package can be further enhanced by soldering these terminals to a large area of copper foil on the printed wiring board.

5·27

VOICE COIL MOTOR DRIVER
Providing control and drive of the voice coil motor used for head
positioning in 5 V disk drive applications, the second-generation
A8932-A is a full-bridge driver which can be configured so that its
output current is a direct function of an externally applied control
voltage or current. This linear current control function is supplemented
by additional circuitry to protect the heads and the data disk during
system failure or normal system shutdown.

A8932CLWA

The two ±500 mA MaS driver outputs provide very low saturation
voltage and minimal power dissipation. Additional headroom is
achieved by the sense-FET structure eliminating the need for an
external current-sense resistor. Internal circuitry can be configured to
provide closed-loop velocity control of the actuator by utilizing the
generated back-EMF of the voice coil motor. Thermal protection and
under-voltage lockout disables the system in a controlled sequence if
a fault condition occurs.

FEATURES

Dwg. PP·042B

ABSOLUTE MAXIMUM RATINGS
Supply Voltages, Vcc and V00 ............. 6.0 V
Output Current, lOUT (peak) ........... ±600 rnA
(continuous) ............................ ±500 rnA
Analog Input Voltage Range,
VIN ....•.•......•..•.........•.....••.. -0.3 V to Vcc

•
•
•
•
•
•

Internal Back-EMF Velocity Loop Option
Lossless Current Sensing
Zero Deadband
High Transconductance Bandwidth
User-Adjustable Transconductance Gain
Digital Transconductance Gain Switch (4:1 Ratio)
• 5 Volt Monitor with Selectable UV Trip Point
• Retract Circuitry Functional to Volts
• Chip Enable/Sleep Mode Function
• 1 V at 500 mA Output Saturation Voltage
• Internal Thermal Shutdown Circuitry

a

Logic Input Voltage Range,
VIN .•.•..•••..•.........•••••...... -0.3 V to +6.0 V
Package Power Dissipation,
Po ......................................... See Graph
Operating Temperature Range,
TA ...................................... 0°Cto +70°C
Junction Temperature, TJ ............... + 150°Ct
Storage Temperature Range,
T s ................................. -55°C to +150°C

t Fault conditions that produce excessive junction
temperature will activate device thermal shutdown
circuitry. These conditions can be tolerated, but
should be avoided.
Output current rating may be restricted to a value
determined by system concerns and factors.
These include: system duty cycle and timing,
ambient temperature, and use of any heatsinking
and/or forced cooling. For reliable operation the
specified maximum junction temperature should
not be exceeded.

5-28

Always order by complete part number:
Part Number

Package

A8932CJTA

64-Lead Thin Quad Flatpack

A8932CLWA

28-Lead SOIC

FUNCTIONAL BLOCK DIAGRAM

o

o

= 'LW' WIDE-BODY SOIC
= 'JT' THIN QUAD FLATPACK

SIGNAL
SUPPLY

LOAD
SUPPLY

@§]

@ill

ACT FB 19 1 1 - - - - - - - - - ,
V LOAD
SGNDp

ACT

13@

REFERENCE

4@)

OUTp
OUTN

HGAIN

I!]@

SGNDN
V SENS FB
V SENS
INN

OUT

FAULT

OUTsw
MPRESET

tii
tiia:

(/J

"-

t:;
o

GROUND

SWITCH

a:

Dwg. FP-024D

A8932CjTA

5

2.0

;=
~

15

1.5

~
iii

!!l

c

ffi
~
a.

1.0

'"

:~

6'6V

0-1z-

w

"-""

~

'"~

05

w

..J

III

~

g
..J

..

0

-9~~

~~~-1/, VREF.

An output voltage proportional to the load voltage. Used in conjunction with
closed-loop velocity control.

DEVICE DESCRIPTION
Current Amplifier. The A8932CJTA and
A8932CLWA voice coil motor drivers feature
a wide transconductance bandwidth and no
measurable crossover distortion. The
transconductance gain is user selectable:

A

=--'

g
m

Rgm

where Ai is either 20~0 (H GAIN
or 8000 (H GAIN = High)

(Equation t)

ILOADRLOAD voltage component from the voltage across the load, the back·
EMF term can be isolated and fed back to close a velocity control loop.
The amplifier output voltage VLOAD is proportional to the voltage
across the load (AvD(VoUTN - VOUTP )). Rs is selected so that VSENSE repre·
sents ILOAD while R3 is dependent on RLOAD as shown in the following
equations:

= Low)

The error amplifier's bandwidth and load
compensation zero are set utilizing external
resistor and capacitor feedback components
around the amplifier.

where Ai

= 2000 (H GAIN = logic Low)
OUTsw = 0.4 (V BEMF R/Rz)

The actuator main loop compensation
can be set by applying a square wave and
adjusting Rz and Cz for optimum response.

Current and Voltage Sensing. The load
current is sensed internally. Three auxiliary
amplifiers are also included to allow various
control functions to be implemented. The
first of these amplifiers provides a voltage
output that is proportional to the load current:
Rs IloAD
VSENSE = - A il

(Equation 2)

The second and third auxiliary amplifiers
may be used in conjunction with the first to
provide a closed-loop velocity control system
for the actuator arm during a controlled
retract for head parking. This is achieved
by determining the back·EMF voltage gener·
ated by the voice coil and feeding back this
information to the main actuator control input.
The back-EMF feedback voltage can be
switched in as required by means of the
SWITCH logic input.

where J is the moment of inertia, KB is the back-emf motor constant, and
KT is the torque constant.
Velocity loop compensation = LlOAD/RlOAD = R, C, = R3 Cz

The back EMF-voltage represents the
velocity of the actuator. By subtracting the
Dwg. No. OP-003B

5·33

Retract and Brake. A retract-brake sequence is initiated on receiving a fault indication from the internal thermal shutdown
(TSD), or under-voltage lockout (UVLO),
or an externally applied logic High at the
RETRACT input.
If the velocity control scheme is implemented, the head can be retracted under
the full control of INPUT in conjunction with
OUTsw back-EMF voltage if no fault condition
exists. If a fault condition were to occur
however, the retract velocity would be controlled by applying a constant user-defined
voltage across the load:
2 Ra
VREHET = 1000 + R + R
7
a

The user determines the total time for the retract sequence, before the
spindle brake is enabled, by the choice of an external resistor and
capacitor at the FAULT output.
Power for the retract function is provided by the rectified back EMF
of the spindle motor by way of the V8EMF terminal. The A8932-A will
perform the retract function under low supply conditions (nominally
down to 2 V). Operation down to almost 0 V requires an energystorage capacitor at the VFLT terminal.
Protective Features. The A8932-A has a number of protective
features incorporated into the design. Under-voltage lockout provides
system protection in the event of reduced primary supply voltages. The
under-voltage trip point is internally set at approximately 4.2 V. It can
be user-defined with an external resistor voltage divider:
2 (R5 + R6)
UV TR1P = -":"-R=---"'::::""

(Equation 3)

6

(Equation 4)

where R7 + Ra » 1000 Q.

where R5 + R6 « 200 kQ.

When the sequence is operated, the output
voltage is forced to approximately VRET-SET to
retract the heads, and then a fault command
("brake") is sent to the spindle motor driver.

Thermal shutdown circuitry is included to protect the device from
excessive junction temperature. It is only intended to protect the chip
from catastrophic failures due to excessive junction temperature.

TEST CIRCUIT AND TYPICAL APPLICATION
,----------,-- +5 V

o
RZ

r-'VV\rO-----~

Vee

0

VOLTAGE-SENSE
AMP

+C z
I

Ram

I

VIJ\l--.JVV\r-~----­
r

V REiF =2v::>---~+~",.

"'x
H GAIN

0--;:::==_-,

DIODE FOR RETRACT FUNCTION
OTHERWISE SHORT TO SUPPLY

Dwg. No. EP-041 C

5-34

VOICE COIL MOTOR DRIVER
Providing control and drive of the voice coil motor used for head
positioning in 5 V disk drive applications, the A8936- is a full-bridge
driver which can be configured so that its output current is a direct
function of an externally applied control voltage or current. This linear
current control function is supplemented by additional circuitry to protect
the heads and the data disk during system failure or normal system
shutdown. An under- or over-velocity sense disables the system in a
controlled sequence if a fault condition occurs.

A8936CLW

The two ±500 mA MaS driver outputs provide very low saturation
voltage and minimal power dissipation. Additional headroom is
achieved by the sense-FET structure eliminating the need for an
external current-sense resistor. Thermal protection and under-voltage
lockout disables the system in a controlled sequence if a fault condition
occurs.

FEATURES

Dwg. PP·046A

•
•
•
•
•
•

ABSOLUTE MAXIMUM RATINGS

•

Supply Voltages, Vcc and VDD .•........... 6.0 V

•
•

Output Current, lOUT (peak) ........... ±600 mA
(continuous) ............................ ±500 mA
Analog Input Voltage Range,
V 1N .................................... -0.3 V to Vcc

•
•

Over-Velocity Fault Function
Lossless Current Sensing
Zero Deadband
High Transconductance Bandwidth
User-Adjustable Transconductance Gain
Digital Transconductance Gain Switch (4:1 Ratio)
5 Volt Monitor with Selectable UV Trip Point
Retract Circuitry Functional to Volts
Chip Enable/Sleep Mode Function
1 V at 500 mA Output Saturation Voltage
Internal Thermal Shutdown Circuitry

a

Logic Input Voltage Range,
V 1N .••••••••••••••••••.•.•••...•.•• -0.3 V to +6.0 V
Package Power Dissipation,
PD ......................................... See

Graph

Operating Temperature Range,
TA ...................................... O°C to +70°C
Junction Temperature, TJ ............... +150°Ct
Storage Temperature Range,
Ts ................................. -55°C to +150°C

t

Fault conditions that produce excessive junction
temperature will activate device thermal shutdown
circuitry. These conditions can be tolerated, but
should be avoided.
Output current rating may be restricted to a value
determined by system concerns and factors.
These include: system duty cycle and timing;
ambient temperature, and use of any heatsinking
and/or forced cooling. For reliable operation the
specified maximum junction temperature should
not be exceeded.

Always order by complete part number:
Part Number

Package

A8936CJT

64·Lead Thin Quad Flatpack

A8936CLW

28·Lead SOIC

5-35

FUNCTIONAL BLOCK DIAGRAM

o
o

= 'LW' WIDE-BODY SOIC
= 'Jr THIN QUAD FLATPACK

SIGNAL
SUPPLY

LOAD
SUPPLY

@~

@[i]

ACT FB

'"~
35 7

OUT

45G)

INN

[g]~

ACT 1

SGND p

13@ OUTp

REFERENCE

4(gj)
H GAIN lrui§QJ-------'

OUTN
SGNDN
V SENS FB
VSENS

FAULT

VEL IN

1

EN VEL FLT

MPRESET

>-w
::;;
'='
LL
w
:!t'
>
:::> ;J'
LL

fW

en
fw
a:

u.
W

a:
fw
a:

I!

"-

>--

:::>

e

a:

I~

GROUND

Dwg. FP-030

A8936C]T

Dwg. PP-052-1

5-36

ELECTRICAL CHARACTERISTICS at T A = +25°C, Vee = VDD = 5.0 V, VREF = V1N = 2.0 V,
Load = 150 IlBJ3.5 Q (unless otherwise noted).
Limits
Characteristic

Test Conditions

Min.

Typ.

Max.

-

50

Error Amplifier
mV

V IO

Current Gain

AiH

H GAIN ~ 3.5 V

7200

8000

8800

-

Ail

H GAIN ~ 0.7 V

1800

2000

2200

-

-

±10

%

-

-

±10

%

1.5

-

2.5

V

Current Gain Linearity

EL(adj)

Reference Voltage Range

VREF

ILOAD; 0 mA

-

Input Offset Voltage

lOUT; 5 mA to 500 mA, Ai ; Ail
lOUT; 5 mA to 500 mA, Ai ; AiH

-

Current-Sense Amplifier
Voltage Gain

Rs; Rgm

Input Offset Voltage

ILOAD ; 0 mA, Ai; Ail

1.0
±25

Output Drivers
Output Saturation Voltage
(Source + Sink)

VDS(SAT)

Retract Output Saturation Voltage

VDS(SAl)

Output Current
Full Power Bandwidth

ILOAD ; 100 mA
ILOAD ; 500 mA

10
BW

-

0.25

-

V

1.5

-

V

lOUT ~ 150 mA

-

-

1.0

V

Pulse Test, ±600 mA Limited

-

-

±500

mA

-3 dB

1.0

-

-

kHz

Window Comparator
Lower Trip Point

1.12

1.25

1.38

Upper Trip Point

2.47

2.75

3.03

Uncommitted Op Amp
Voltage Gain

Avs

Unity Gain Bandwidth

BW

Max. Load Capacitance

CLOAD

Slew Rate

SR

Output Voltage

Vo

VIO ; 100 mV

-

91

dB

-

1.0

-

MHz

40

-

-

pF
V/!lS

-

4.2

-

2.5

-

3.5

±250

Max. Output Current

10

-

Input Offset Voltage

VIO

-

Negative current is defined as coming out of (sourcing) the specified device terminal.

-

-

±10

V

!lA
mV

Continued next page ...

Typical Data is for design information only.

5-37

ELECTRIcAL CHARACTERISTICS at TA = +25°C, Vee
Load = 150 /11113.5 Q (unless otherwise noted).

= VDD = 5.0 V, VREF = VIN = 2.0 V,
Limits

Characteristic

Test Conditions

Min.

Typ.

Max.

Vcc = Voo

3.9

4.2

4.35

V

Miscellaneous

Under-Voltage Lockout Voltage
Fault Logic Output

Vcc

VRETRACT ;" 3.5 V

-

-

500

mV

VRETRACT $ 0.7 V

4.5

-

V

VFLT = 2.25 V

20

-

!lA

VRETRACT;" 3.5 V

4.5

VRETRACT $ 0.7 V, IMPREsET = 1.5 rnA

-

800

mV

Outputs Balanced, No Load

-

-

10

mA

2.0

mA

V1N(O)

-

-

0.7

V

VIN(1)

VFAULT

IFAULT
Power-On Reset

Total Supply Current

VMPRESET

Icc + 100

Sleep Mode, PWR OFF = Vcc
Logic Input Voltage

V

3.5

-

-

V

Thermal Shutdown Temperature

TJ

-

165

-

°C

Thermal Shutdown Hysteresis

dTJ

-

20

-

°C

Negative current is defined as coming out of (sourcing) the specified device terminal.
Typical Data is for design information only.

5-38

TERMINAL FUNCTIONS
"LW"Term.

Terminal Name

25

1

RET REF

27

2

VFLT

28

3

VBEMF

30

4

GROUND

33

5

UV SET

"JT" Term.

34

6

RouTP

35

7

OUT

36

8

EN VEL FLT

Function
The reference supply for setting the voltage across the load during retract.
Reservoir (energy storage) capacitor used to operate fault circuitry.
Back-EMF voltage from spindle motor used to retract heads during loss of power.
Circuit reference.
Under-voltage trip point reference input. Set internally to 4.2 V but may be overridden
by external resistor divider. (Equation 4).
Source driver used for retract; externally connected to OUTp.
Output of uncommitted operational amplifier.
Logic input for over-velocity fault latch.

45

9

INN

Inverting input to uncommitted operational amplifier.

46

10

VELIN

Analog voltage input corresponding to motor speed.

47

11

RETRACT

50

12

FAULT

A logic low at this MOS output indicates a thermal shutdown, under-voltage fault, or
retract command.

51

13

MPREsET

(Power-On Reset) A logic low at this open-collector output may be used to reset the
system on under-voltage fault or power ON.

53

14

SIGNAL SUPPLY

55

15

ACT

58

16

REFERENCE

60

17

HGAIN

62

18

PWROFF

1

19

ACTFB

Input connection for feedback network which sets the error amplifier gain and
bandwidth.

2

20

SGNDp

Power ground for the OUT p sink driver.

4

21

OUTN

8

22

LOAD SUPPLY

An active-low logic input that initiates the retract sequence.

Vcc; low-current supply voltage in the range of 4.5 V to 5.5 V.
Input which controls the current in the load. Transconductance gain is set with an
external resistor in series with this input (Equation 1).
VREF; reference input for all amplifiers; ac ground.
Logic input to switch the error amplifier transconductance gain: LOW
HIGH = 8400.

= 2100,

An active-high logic input that puts the device in a "sleep mode". All fault circuitry
remains active.

Power output. Sinks current when VACT < VREF.
Vao; high-current supply voltage for the voice-coil motor.

13

23

OUTp

15

24

SGNDN

Power ground for the OUTN sink driver.

16

25

VSENSFB

Input connection for feedback network which sets the current-sense amplifier gain and
bandwidth. Also called gm SET.

19

26

VEL FLT

21

27

VSENS

23

28

RET SET

Power output. Sinks current when VACT> VREF.

An active-low logic output indicating an over-velocity fault.
Voltage output representing load current (Equation 2). Also called MONITOR.
An external resistor divider to set the retract voltage across the load.
Used in conjunction with VRET-REF (Equation 3).

5-39

DEVICE DESCRIPTION
Current Amplifier. The A8936CJT and
A8936CLW voice coil motor drivers feature
a wide transconductance bandwidth and no
measurable crossover distortion. The
transconductance gain is user selectable:
Ai

gm =

"""'Fl

(Equation 1)

gm

where Ai is either 2000 (H GAIN = Low)
or 8000 (H GAIN = High)
The error amplifier's bandwidth and load
compensation zero are set utilizing external
resistor and capacitor feedback components
around the amplifier.
The actuator main loop compensation
can be set by applying a square wave and
adjusting Rz and Cz for optimum response.
Current and Voltage Sensing. The load
current is sensed internally. Two auxiliary
amplifiers are also included to allow various
control functions to be implemented. The
first of these amplifiers provides a voltage
output that is proportional to the load current:

(Equation 2)

The second auxiliary amplifier may be
used in conjunction with the first to provide a
closed-loop velocity control system for the
actuator arm during a controlled retract for
head parking.
Under- & Over-Velocity Fault. For a
constant load, motor current (I LOAD ) and
therefore VSENS are proportional to motor
velocity. V SENS is amplified by the uncommitted amplifier and compared against the
internal 2 V reference and used to indicate
a velocity fault if the voltage is greater than
a nominal ±0.75 V from the 2 V reference.
EN VEL FLT may be tied to the FAULT
terminal to reset the velocity fault after
a tripout.

5-40

Retract and Brake. A retract-brake sequence is initiated on receiving a
fault indication from the internal thermal shutdown (TSD), under-voltage
lockout (UVLO), the under- or over-velocity fault, or an externally
applied logic High at the RETRACT input.
If the velocity control scheme is implemented, the head can be
retracted under the full control of INPUT in conjunction with OUTsw
back-EMF voltage if no fault condition exists. If a fault condition were to
occur however, the retract velocity would be controlled by applying a
constant user-defined voltage across the load:
2 Rs
VRET·SET = 1000 + R + R
7

(Equation 3)

S

where R7 + Rs » 1000 Q.
When the sequence is operated, the output voltage is forced to
approximately VRET. ET to retract the heads, and then a fault command
("brake") is sent to t~e spindle motor driver. The user determines the
total time for the retract sequence, before the spindle brake is enabled,
by the choice of an external resistor and capacitor at the FAULT output.
Power for the retract function is provided by the rectified back EMF
of the spindle motor by way of the VBEMF terminal. The A8936- will
perform the retract function under low supply conditions (nominally
down to 2 V). Operation down to almost 0 V requires an energy-storage
capacitor at the VFLT terminal.
Protective Features. The A8936- has a number of protective features
incorporated into the design. Under-voltage lockout provides system
protection in the event of reduced primary supply voltages. The undervoltage trip point is internally set at approximately 4.2 V. It can be userdefined with an external resistor voltage divider:

(Equation 4)

where R5 + Rs « 200 kQ.
Thermal shutdown circuitry is included to protect the device from
excessive junction temperature. It is only intended to protect the chip
from catastrophic failures due to excessive junction temperature.

TEST CIRCUIT AND TYPICAL APPLICATION

1~V---------' 6::,----I·' "~~I~~~~~J1
vv

VJI'J--~-I----

VOICE COIL:
MOTOR '

:
,

--------3----:-1.--

VREF = 2

0---,

,,

,

:
:
:

~~-----------~---~----

H GAIN 0 - - - - - - - '

0---,

~

r-----o----~---~,

PWR OFF

____VSlE...NJ,____

J

RFAULT <: 200 kQ
I-..../\,/\/"v--I

t---i
J--L--.-,
'
,

'

~--i f--1---~--

~:

-L

~

,!

Vee

R5

,

"

:! I~~ I~>
:
~-- ~,-------------------------l-----------------!

t T

-----t--'\I'V'\I--i

!
:

Rs

,

":

Ry

RS

~:

-=:=-______________________________________
-=__:
I
,
BACK EMF FROM _____________ • ____ ~ ____ v
DIODE FOR RETRACT FUNCTION
t ___________
~

SPINDLE MOTOR

~---

G"II

DD

OTHERWISE SHORT TO SUPPLY

Dwg. EP-043A

5-41

SERVO CONTROLLER SYSTEM
The A8951 CLW generates the analog position-error signal used
for the voice-coil actuator in 5 V hard disk drives. Digital circuitry
provides tracking signals to the system microcontroller. This device,
with the A8952CLW loop compensator, is an alternative to a full DSP
servo approach. Included on chip are an 8-bit, R/2R, digital-to-analog
converter and a stable band gap voltage reference.
Each circuit function is optimized for the servo controller application. The signal-path switching transmission gates feature short
propagation delays, the operational amplifiers feature low input offset
voltages and individual logic-switched feedback loops, and the CMOS
sample-and-hold amplifiers provide low droop.

ANALOG
GROUND

The A8951 CLW is supplied in a 28-lead SOIC for surface-mount
applications. It is rated for continuous operation over the temperature
range of DoC to +70°C.
SUPPLY
DIGITAL
GROUND

FEATURES

REFERENCE
OUT

•
•
•
•
•
•
•
•

Dwg. No. PC-006

Position-Error Signal Generation
Track Position Detection Functions
On-Track Signal Generation
8-Bit DAC
Low Offset Operational Amplifiers
Low Droop Sample/Hold Amplifiers
Short Delay Transmission Gates
Guaranteed DAC Monotonicity

ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Supply Voltage, Vcc .............................. 6.0 V
Output Current, lOUT .................... ±1.0 rnA
Reference Output Current, IRFB ....... ±5.0 rnA
Input Voltage Range,
V 1N ••••· •• · ••• • •••••••••••••• -0.3 V to Vee + 0.3 V
Package Power Dissipation, PD ........... 1.2 W
Operating Temperature Range,
TA ...................................... O°C to +70°C
Junction Temperature, T J .................... 150°C
Storage Temperature Range,
Ts ................................. -55°C to +150°C
Caution: This CMOS device has input static
protection but is susceptible to damage when
exposed to extremely high static electrical
charges.

Always order by complete part number: IA8951CLWI.
5-42

FUNCTIONAL BLOCK DIAGRAM
~ SUPPLY

ON
TRACK
DAC
OUT
DO

ANALOG 5
GROUND
D7

DAC
WRITE
DIGITAL
GROUND
ABCD
PES
SCD

8}-------------------~

4,, -=
«
(/)
z

UJ

AB

co

:,:t>--r;=

VIN

SEEK
CHANNEL

:>'

"o

o
...J

I
I

LOOP
GAIN

MPX

"-

o

()

I

LOOP
GAIN

I N 2 - = [ > - ACTUATOR
+
ORIVE

REF

REF

SEEK S OIFF
Dwg. No. FC-004

Voice--coil servo motors in disk-drive head-positioning systems
utilize complex algorithms and sophisticated circuitry to provide good
track-seeking and track-following performance. A typical hard-disk
track geometry requires precise voice--coil motor control to ensure
accurate positioning of the head above the desired track.
The A8951 CLW servo controller system and A8952CLW servo loop
compensator are companion devices that provide most of the circuitry
to accomplish the head-positioning servo functions. A digital velocity
command is converted into an analog signal and, through signal
proce·ssing with multiple operational amplifiers and sample-and-hold
circuits, is utilized to develop a position-error signal to correct the servo
loop.
Surface-mount technology provides major benefits of reduced
package size afld weight, and improved system reliability through the
reduction of printed wiring board through holes. Improved quality as
well as lower assembly cost are obtained through the adaptability of
these devices to high-speed, automated, pick-and-place assembly.

5-46

SERVO LOOP COMPENSATOR

REFERENCE
IN

INTG OFF
SUPPLY

NO
CONNECTION

The A8952CLW provides all of the active circuitry for the servo
loop compensation in the control and drive to the voice coil driver used
for head positioning in disk-drive applications. Included are multiple
transmission gates, operational amplifiers, and two sample-and-hold
amplifiers. Circuit functions are isolated and major circuit nodes are
accessible for a complete user-configurable system architecture.
Each circuit function is optimized for the loop compensation appli·cation. The signal-path switching transmission gates feature short
propagation delays, the operational amplifiers feature low input offset
voltages and individual logic-switched feedback loops, and the CMOS
sample-and-hold amplifiers provide low droop.
The A8952CLW is supplied in a 28-lead SOIC for surface-mount
applications. It is rated for continuous operation over the temperature
range of O°C to +70°C.

FEATURES
•
•
•
•

User-Configurable Architecture
Loop Compensation
Low Offset Operational Amplifiers
Low Droop Sample & Hold Amplifiers
Short Delay Transmission Gates

Dwg. No. PC-OOS

ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Supply Voltage, Vcc .............................. 6.0 V
Output Current, IOUT ......................... ±1.0 rnA
Op Amp Output Current, lOUT .......... ±5.0 rnA
Input Voltage Range,
V,N ......................... -0.3 V to Vee + 0.3 V
Package Power Dissipation, Po ........... 1.2 W
Operating Temperature Range,
TA ...................................... O°C to +70°C
Junction Temperature, TJ .................... 150°C
Storage Temperature Range,
T s ................................. -55°C to +150°C
Caution: This CMOS device has input static
protection but is susceptible to damage when
exposed to extremely high static electrical
charges.

Always order by complete part number:

IA8952CLW I.
5-47

FUNCTIONAL BLOCK DIAGRAM
DIFFCNT

20

.GJ.
3 REFERENCE

/~IN

V RFB
OA5
IN

SIH2
IN

--,-,

,,
,,
,,
,

R

7

SEEK

SIH2
CONTR

ACT
DRIVE

SW1

--4t-------------------'

,,,
,

20 kQ

-----------------,

,

:

:5

---,-------1
INTG~
OFF ~SW3 14

---V-j
,I,

,,
,,
,,
,,
,

,,

,,,

VCC

"®

OA3
OUT

~

SW4

SUPPLY

GROUND

G)
NO CONNECTION
Dwg. No. Fe-002

I/)

2.0

~
~

~ 1.5

~0..

iii
I/)

c

"~

ffi 1.0
~0..

""

W

(!l

«
~

~ 0.5

0..

w

....J

1>-<-1>~
~

~

~1>%.
6'6'0'

III

~

o
j

«

0

25

50

75

"'

'"

125

100

AMBIENT TEMPERATURE IN

°c

150

Dwg. No. GP-034-1

5-48

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = 5.0 V
Limits
Characteristic

Symbol

Test Conditions

Supply Voltage Range

Vee

Operating

Supply Current

Icc

No Load

Min.

Typ.

Max.

Units

4.5

5.0

5.5

V

-

4.5

9.0

mA

TRANSMISSION GATE PARAMETERS
On Resistance

RON

-

140

280

Q

Propagation Delay

tpD

-

-

50

ns

Input Current

110

INTG OFF Bias Current

lis

V IN

~

0V

-

<1.0

100

nA

VIN

~

5.0 V

-

<1.0

100

nA

VIN

~

0V

-

<1.0

100

nA

VIN

~

5.0 V

-

<1.0

100

nA

ABCD PES Bias Current

lis

V IN

~

2.5 V

-

1.0

2.0

IlA

LOW GAIN Bias Current

lis

VIN

~

5.0 V

-

3.0

300

nA

S DIFF Bias Current

lis

V IN

~

0V

-

<1.0

100

nA

V IN

~

5.0 V

-

<1.0

100

nA

Switch Bias Current
(SW1, SW2, and SW3)

lis

V IN

~

0V

-

<1.0

50

nA

VIN

~

5.0 V

-

<1.0

50

nA

Attenuation

a

f ~ 1 kHz, Vin ~ 800 mV RMS

-

80

-

dB

THD

f ~ 1 kHz, Vin ~ 800 mV RMS

-

<0.1

-

%

Via

VIN ~ 2.5 V, lOUT ~ 0 mA

-

0.75

4.0

mV

Input Bias Current

lis

V IN ~ 2.5 V, lOUT ~ 0 mA

-

35

250

nA

Input Offset Current

los

-

4.0

50

nA

Open Loop Gain

Ae

lOUT ~ 0 mA

60

100

-

dB

Gain Bandwidth Product

BW

No Load

-

1.0

-

MHz

Slew Rate

SR

-

1.0

-

V/IlS

VeE(SAT)

lOUT ~ -900 IlA

-

0.9

1.0

V

lOUT ~ 900 IlA

-

0.9

1.0

V

-

300

750

nA

60

75

-

dB

Distortion

OPERATIONAL AMPLIFIER PARAMETERS
Input Offset Voltage

Output Saturation Voltage

Reference Input Bias Current

IRFS

Power Supply Rejection Ratio

PSRR

Total input current, V RFS
!1Vee~1.0V

~

2.5 V

Continued ...

5-49

... Electrical Characteristics (continued)

Limits
Characteristic

Symbol

Test Conditions

I

Min.

Typ.

Max.

-

1.0

-

VIV

-

4.0

12.5

mV

VIN ~ 2.5 V

-

±10

±50

mV

VIN ~ 2.5 V, t ~ 10 ms

-

100

500

/lV/ms

VIN ~ 0 V

-

<1.0

100

nA

VIN ~ 5.0 V

-

<1.0

100

nA

-

30

350

nA

Units

SAMPLE AND HOLD PARAMETERS
Gain
Output Offset Voltage
Pedestal Error
Droop
SEEK Bias Current

Ae

I!.Vin

~

1.0 V

Vaa
Ep

I!.Vdt
liB

S/H2 IN Bias Current

liB

VIN ~ 2.5 V

S DIFF Bias Current

liB

VIN ~ 0 V

-

<1.0

100

nA

VIN ~ 5.0 V

-

<1.0

100

nA

Negative current is defined as coming out of (sourcing) the specified device terminal.
Typical Data is for design information only.

5-50

TYPICAL DISK-DRIVE APPLICATION USING A8951CLW AND A8952CLW
OUTER CD
SIZE

ON TRACK

SIZE
INNER CD

'"a:
~w

ABeD
POSITION
ERROR SIGNAL

POS

MPX

Z
Z

o

INTEGRATOR
LOOP
GAIN
AB CD VIN
IN 1

----D----t---

REF-V

SEEK
CHANNEL

~

~

CfJ

Z
W
D..

::;

o(J

D..

o

g

I
I
I

LOOP
GAIN

LOOP
GAIN

IN2~ ACTUATOR
REF
MPX

+

DRIVE

REF

SEEK S DIFF
Dwg. No. FC-004

Voice-coil servo motors in disk-drive head-positioning systems
utilize complex algorithms and sophisticated circuitry to provide good
track-seeking and track-following performance. A typical hard-disk
track geometry requires precise voice-coil motor control to ensure
accurate positioning of the head above the desired track.
The A8951 CLW servo controller system and A8952CLW servo loop
compensator are companion devices that provide most of the circuitry
to accomplish the head-positioning servo functions. A digital velocity
command is converted into an analog signal and, through signal
processing with multiple operational amplifiers and sample-and-hold
circuits, is utilized to develop a position-error signal to correct the servo
loop.
Surface-mount technology provides major benefits of reduced
package size and weight, and improved system reliability through the
reduction of printed wiring board through holes. Improved quality as
well as lower assembly cost are obtained through the adaptability of
these devices to high-speed, automated, pick-and-place assembly.

5-51

VOICE COIL MOTOR DRIVER
Providing control and drive of the voice coil motor used for head
positioning in disk drive applications, the A8958- is a full-bridge driver
which can be configured so that its output current is a direct function of
an externally applied control voltage or current. This linear current
control function is supplemented by additional circuitry to protect the
heads and the data disk during system failure or normal system shutdown.

A8958CEA

The two ±800 mA driver outputs provide very-low saturation voltage
drops and precise current control utilizing a single current-sensing
resistor connected in series with the load. Under-voltage lockout
disables the system in a controlled sequence if a fault condition occurs.

c

~

"

.... .

c

z

~

(!l

Dwg. PP-038A

ABSOLUTE MAXIMUM RATINGS
at TA 25°C

=

Supply Voltages, VB B and Vee ............... 16 V
Output Current, lOUT ............................ ±1.0 A
Park Drive Output Current, IpARK
Continuous ................................ 250 mA
Peak ............................................... l.0 A
Amplifier Input Voltage Range,
VIN ..................................... -2.0 V to Vee
Sense Input Voltage Range,
VSENSEIN ............................ -0.3 Vto Vee
Comparator and Digital Inputs,
VIN .................................... -0.3 V to 10 V
liN ............................................... ±10 mA
Power OK Output, VeEx .......................... 20 V
le .................................................. 30 mA
Output Clamp Diode Current,
IF (pulsed) ...................................... 1.0 A
Package Power Dissipation, PD ... See Graph
Operating Temperature Range,
TA ...................................... O°C to +70°C
Junction Temperature, TJ ................... 150°C·
Storage Temperature Range,
Ts ................................. -55°C to +150°C
• Fault conditions that produce excessive iunction
temperature will activate device thermal shutdown
circuitry. These conditions can be tolerated but
should be avoided.

5-52

When activated by the under-voltage comparator, or a park command, the output power drivers change from a controlled current to a
user-determined constant park voltage. Other features include a power
ok flag, a limit input to force the outputs to their maximum level in either
polarity, an over-riding output disable to shut down both power amplifiers and reduce quiescent supply current, and internal thermal shutdown
which disables the load (but still allowing the head to be parked) in the
event of excessive junction temperatures. The load is re-enabled when
the junction temperature returns to a safe level.
The A8958CEA is supplied in a 28-lead power PLCC for surfacemount applications; the A8958CLB is supplied in a 24-lead power
SOIC. The copper half-batwing/batwing construction provides for
maximum package power dissipation in a minimum package size.
Both are rated for continuous operation over the temperature range
of O°C to +70°C.

FEATURES
• Controlled-Velocity Head Parking
•• 4 V to 15 V Operation
• Zero Deadband
• High Transconductance Bandwidth
• User-Adjustable Transconductance Gain
• ±800 mA Load Current
• Dual Under-Voltage Monitors
with Flag and User-Selectable Trip Points
• Internal Thermal Shutdown Circuitry
• Replaces UC3175

Always order by complete part number:

Part Number

Package

A8958CEA

28-Lead Half-Batwing PLCC

A8958CLB

24-Lead Batwing SOIC

A8958CLB
en

LOGIC
SUPPLY

1=
---0 VBOOST(L)
paR

OUT
ADJUST
(FROM SERIAL
INTERFACE)

VRETRACT

FILTERED

veOOST(L)

VVEL

RETRACT
MODE

veOOST(L)

>-...,....---D

V

REF('2)

SHUTDOWN/
SLEEP

Dwg. FP·031A

5-60

SPINDLE
The spindle function is a three-phase
back-EMF sensing motor controller and driver.
During start-up, internal circuitry provides
complete spindle control and drive. At speed
however, an external microcontroller is used
to provide speed (phase/frequency) detection
as well as compensation.

constant voltage, and several sleep modes. In addition, a power-on
reset function and two programmable voltage references (VREF and
VREF!>2)) are provided that are suitable for output to the user.
An onboard dc-to-dc converter generates two regulated "high"
(greater than the supply) voltages referred to as VBOOST(H) and V BOOST(L)"
These voltages supply critical functions with maximum immunity from
supply variations.

ENERGY MANAGER
The management of available energy
is provided by automatic operating modes
envoked by the fault monitor or sleep-mode
manager. The fault monitor consists of an
over-velocity fault circuit, a V CC(A) undervoltage fault circuit, and a thermal fault circuit.
The operating modes include V CC(PWR) isolation, active rectification of spindle back-EMF
voltage to provide nearly lossless conversion
of spindle rotational inertia into power to
operate the voice-coil motor for parking the
heads, actuator retract mode controlled by

SERIAL INTERFACE
The serial interface is used to alter the control state of the device
from an external microcontroller or other digital CMOS source. In
addition to the various operational and diagnostic control states
(modes), all critical constants, variables, and parameters can be
adjusted through this interface. The serial interface is a synchronous
serial three-wire port with serial data input, clock, and load (active low)
functions. When lOAD is high, the serial interface is disabled and the
chip is not affected by changes in SER DATA IN or ClK SER. To write
data to the serial interface, ClK SER should be low prior to lOAD
going low. Once lOAD goes low, information at SER DATA IN is read
into the shift register on the positive-going transitions of ClK SER.

TERMINAL FUNCTIONS
ANALOG SUPPLY

V CC(A); supplies all analog functions except for gate drive of power output transistors. For most
applications, V CC(A)' V CC(D)' and V CC(PWR) are connected together.

DIGITAL SUPPLY

VCC(D); supplies all digital functions. For most applications,
connected together.

LOAD SUPPLY

V CC(PWR); supplies all voice-coil and spindle power output transistors. This terminal is internally
connected to the source of the blocking FET used to isolate V M from V CC(PWR) on system failure
or shutdown. For most applications, V CC(A)' V CC(D)' and V CC(PWR) are connected together.

SUB

Substrate. This terminal must be connected to ground.

VCC(A)' VCC(D)'

and

VCC(PWR)

are

Supplies power to the voice-coil and spindle power output transistors. Connect this terminal to
the external flyback inductor for the dc-to-dc converter; internally connected to the drain of the
blocking FET.
LFLYBCK

VBOOST(H)

VBOOST(L)

External inductor for the dc-to-dc converter.
Internally generated "high" voltage for driving the gates of all source-side power output
transistors. This source is regulated and requires a compensation capacitor from this terminal
to ground.
Internally generated intermediate voltage for driving the gates of all sink-side power output
transistors, the bandgap reference, and fault monitors. This source is regulated and requires
a compensation capacitor from this terminal to ground.

5-61

Control voltage provided to drive the gate of an optional external enhancement-mode power FET,
augmenting the internal blocking FET between VCC(PWR) and V M.
Programmable reference voltage output. This reference tracks VREF(x2) and may be used as a
relative signal ground.

VREF(X2)

Programmable reference voltage output. Derived from a trimmed internal bandgap reference.
May be used as the reference for system DAC and ADC.
Power-on reset for the application system. Active low guaranteed by design to,be active on
power up. Also occurs as a result of VCC(A) degrading below the BLACKOUT under-voltage
threshold.

TRIPADJ

VUV(TRIP); trip threshold adjust input (an external resistor divider between VCC(A) and ground) for the
under-voltage BLACKOUT fault monitor. A capacitor at this terminal can provide for time domain
filtering.

ClK

fCLK (2MHZ); reference for all internal analog signal-processing functions. Affects frequency domain
placement of all poles, zeros, and bandwidths.

SER DATA IN

Non-inverting microcontroller serial-data input used for transferring data to all internal parameterand mode-control registers.

ClK SER

fCLK(SER); reference for the serial data interface. Data is transferred on the positive-going edge of
this clock.

lOAD

Active low. Begins and ends data transfer.

EXTXFR

Direct clock gating data from temporary internal latch to control register. This continuous time
input is redundant to the XFR bit, which is embedded in the serial data format. It is internally
synchronized to the fCLK(2MHZ) positive-going edge.
Analog input or output. Also used to drive internal nodes.
Analog input or output. Also used to drive internal nodes for calibration and measurement on
internal analog functions.

DMUX OUT

Non-inverting digital multiplexer output. Used to probe internal nodes allowing precise timedomain measurements. Also used to extract internal status and diagnostic information.

OUTp

VOUT(P); voice-coil power output. Full-bridge differential complement to VOUT(N)"

OUTN

VOUT(N); voice-coil power output. Full-bridge differential complement to VOUT(P)"

VSENS(act)

The voltage at this terminal is proportional to voice-coil actuator current.

Rgm(act)

A resistor between this terminal and VSENS(act) is used to adjust the forward transconductance gain
of the voice-coil transconductance amplifier.

RETRACT

5-62

Active high retract input from the system. Continuous-time direct input to cause immediate
retract mode.

EXT ACT

VSERVO; summing junction at the input of the voice-coil transconductance amplifier. This direct
continuous-time input to the actuator gm amplifier provides diagnostic as well as feed-forward
access.

OP 1(IN)

Operational amplifier inverting input. The non-inverting input is internally connected to VREF .

OP1 (OUT)

Operational amplifier output. This undedicated operational amplifier functions in continuous time.
Inverting input of operational amplifier portion of over-velocity fault circuit.
Non-inverting input of operational amplifier portion of over-velocity fault circuit.

VEL

VVEL; output of the over-velocity operational amplifier. Also internally connected to the inputs of
two comparators that provide the positive and negative velocity fault thresholds.

OUTA

vOUT(AI; spindle motor power output terminal.

OUTB

VOUT(BI; spindle motor power output terminal.

OUTc

VOUT(C); spindle motor power output terminal.

CTAP

Connection to spindle motor center tap; provides the differential reference for detection of backEMF zero crossings. If this terminal is not connected, the device will internally simulate the
centertap of the motor.

V SENS(spin)

The voltage at this terminal is proportional to the spindle motor current.

Rgm(SPin)

A resistor connected from this terminal to VSENS(s In) provides for adjusting the forward
transconductance gain of the spindle transcono8ctance amplifier.
A digital logic output that goes low to high on a back-EMF zero crossing; provides tach-like
information to the spin controller.

EXT COM

fs nc; hard external commutation sequence start (positive-edge triggered). May be used to place
spindle commutation edges in the inter-sector gap, or for phase-locking multiple spindle drivers.

EXT SPIN

VSPln ; direct continuous time input to the spindle transconductance amplifier/driver. Zero demand
current occurs at 2.00 V; full-scale positive demand current occurs at 4.00 V.
Input for uncommitted analog switch.

SWOUT

Output of uncommitted analog switch.

SWON

Logic input for uncommitted analog switch; a high level connects SW 1N to SW our

5-63

ADDRESS MAP AND DATA BIT ASSIGNMENTS
Address
Word

Data
Bit

',Function

OOH

0-3
4-7

Blanking Time
Commutation Delay Time

01H

0-5
6
7

Coast Time
Commutation Multiplexer
Not used at this time

0-3
4-7

Startup Time
Watchdog Time

0-7
8

Spindle-Demand DAC Current
Magnitude
Reverse Commutation Mode

04H

0-3
4-6
7

Spindle Slew Rate Control
Spindle Multiplexer
Not used at this time

05H

0-3

Spindle Transconductance Amp.
Bandwidth
Spindle Transconductance Amp.
Local Zero

Address
Word

Data
Bit

Function

OCH

0-3
4
5-7

Notch Width (Zeta Dz3 ) Control
Notch Reset Control
Not used at this time

ODH

0-3

Low-Pass Filter Freq. Synth.
(D n2) Control
Not used at this time

4-7
02H
03H

OEH

4-7
OFH

06H

4-7

Internal 6.25 kHz Oscillator
Frequency Trim
Not used at this time

07H

0-7

Not used at this time

08H

0-11

Servo-Demand DAC Current
Magnitude

09H

0-7

Not used at this time

OAH

0-3
4
5
6-7

Low-Pass Filter
Control
Not used at this
Low-Pass Filter
Not used at this

0-3
4-7

Notch Depth (a3 ) Control
Not used at this time

OBH

5-64

0-3

Damping (Zeta)
time
Reset Control
time

0-3
4-6
7
0-2
3-5

Notch Center Frequency
(Dnal Control
Not used at this time
Actuator Bandwidth
(BWACT) Control
Actuator Zero (Damping) Control
Not used at this time

6-7

Retract Velocity Demand Voltage
Actuator Analog Multiplexer Input
Select
Not used at this time

11 H

0-7

Sleep Mode Manager

12H

0-3
4-6
7

Fault Control Monitor
Programmable References
Voltage Select
Not used at this time

13H

0-2
3-5
6-7

Analog Multiplexer-2 Selection
Digital Multiplexer Output Selection
Not used at this time

14H

0-2
3

Analog Multiplexer-1 Selection
Chopper Stabilization of LP &
Notch Filters
Use Notch
Not used at this time

10H
4-6

0-3

4
5-7

AUTOMOTIVE, SIGNAL-PROCESSING,
& CONSUMER ICs

SECTION 6. TECHNICAL DATA & APPLICATION NOTES
for Automotive, Signal-Processing, and Consumer ICs
in Numerical Order ................................................................................... Beginning at 6-1

FLUID DETECTOR

NO CONNECTION

2

GROUND

3

GROUND

4

Primarily designed for use as an automotive low coolant detector,
the ULN2429A monolithic bipolar integrated circuit is ideal for detecting
the presence or absence of many different types of liquids in automotive, home, or industrial applications. Especially useful in harsh environments, reverse voltage protection, internal voltage regulation, temperature compensation, and high-frequency noise immunity are all incorporated in the design.

OSCILLATOR L:S~---,
OSC. OUTPUT

6

OSCILLATOR

7

9

DET. INPUT

A simple probe, immersed in the conductive fluid being monitored,
is driven with an ac signal to prevent plating problems. The presence,
absence, or condition of the fluid is determined by comparing the
loaded probe resistance with an internal (pin 8) or external (pin 6)
resistance. Typical conductive fluids which can be sensed are tap
water, sea water, weak acids and bases, wet soil, wine, beer, and
coffee.

Dwg. No. PS - 017

The high-current output is typically a square wave signal for use
with an LED, incandescent lamp, or loudspeaker. A capacitor can be
connected (pin 12) to provide a dc output for use with inductive loads
such as relays and solenoids.
These devices are furnished in an improved 14-lead dual in-line
plastic package with a copper alloy lead frame for superior thermal
characteristics. However, in order to realize the maximum currenthandling capability of these devices, both of the output pins (1 and 14)
and both ground pins (3 and 4) should be used.

FEATURES

ABSOLUTE MAXIMUM RATINGS

•
•
•
•
•
•

High Output Current
AC or DC Output
Single-Wire Probe
Low External Parts Count
Internal Voltage Regulator
Reverse Voltage Protection

Supply Voltage, Vcc
(continuous) .......... -50 V to +16 V
(1 hr. at +25°C) ............... 24 V
(10 liS) ...................... 50V
Output Voltage, VOUT
......... 30 V
Output Current, lOUT
(continuous) ............... 700 rnA
(1 hr. at +25°C) ............... 1.0 A
Package Power Dissipation, Po' ... 1.33 W'
Operating Temperature Range,
T A •••••••••.••••••• -40°C to +85°C
Storage Temperature Range,
Ts ................ -65°C to +150°C
• Derate at the rate of 16.67 mW/oC above
T A= +70°C.

Always order by complete part number: I ULN2429AI.
6-1

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = VOUT = 12 V
(unless otherwise specified).
Characteristic
Supply Voltage Range
Supply Current

Symbol

Test
Pin

Test Conditions

Vee

13

Operating

10

Vee=16V

-

RL = 18 kO

Icc

13

Oscillator Output Voltage

Vase

6

Output ON Voltage

V OUT

1,14

Output OFF Current

lOUT

1,14

Oscillator Frequency

lose

6

Min.

RL ;;: 30 kO, lOUT = 500 mA
R L :;; 10 kO, V OUT = V OUT(max)
RL = 18 kO

-

Limits
Typ.
Max.

-

Units

16

V

10

mA

3.0

-

Vpp

0.9

1.5

-

100

IlA

2.4

-

kHz

V

CIRCUIT SCHEMATIC

OSCILLATOR

------...,
DECOUPLING

11

NC

10

o

4.7 K

7V

3

Dwg. No. A-10,825

6-2

TEST CIRCUIT

5CL-.

Dwg. No. A-l0,707

TYPICAL APPLICATIONS
1()"'16V

10-16V

- -- -

-

OPTIONAL FOR

~ D-C OUTNT

~Of'F

HIGH-RESISTANCE (AIR)
TURNS OUTPUT lAMP ON.
18K

HIGH-RESISTANCE (AIR)
TURNS OUTf\ll LAMP OFF.

Dwg. No. A-l0,706

Dwg. No. A-10,711

6-3

COUNTDOWN POWER TIMER

MODE SELECT
NO
CONNECTION
NO
CONNECTION
SUPPLY

The ULQ2436M is a rugged, long-duration countdown timer
specifically designed to operate in an automotive or industrial environment. It uses an internal RC oscillator to drive a digital countdown
circuit for timing periods of typically 2-1/2 to 5 minutes. The ULQ2436M
multiplies the oscillator period by 4064. Internal logic can automatically
cause the timeout to be halved for successive timeouts. FL technology
is used for the countdown and logic circuitry and conventional linear
bipolar devices for the oscillator and output power functions. This
combination, together with the low-cost 8-pin mini-DIP plastic package,
results in a very economical power timer suitable for a wide variety of
applications.
The Darlington-connected output driver is capable of switching
loads up to 400 mA.

FEATURES
•
•
•
•
•
•
•

28 V/400 mA Output Switch
Low-Cost Ceramic Timing Capacitor
Dual-Mode Timing Operation
-40°C to +85°C Operation
10 V to 16 V Operation
Internal Stabilizing Regulator
Low-Cost 8-Pin Mini-DIP

APPLICATIONS
•
•
•
•

Automotive Rear-Window Defogger Timer
Automotive Courtesy Light Timer
Appliance Power Timer
Power Control System

ABSOLUTE MAXIMUM RATINGS
at TA =+25°C
Supply Current, IREG ............. 15 mA
Output Voltage, VOUT' . . . . . . . . . . . .. 28 V
Output Current, lOUT . . . . . . . . . . .. 400 mA
Input Voltage, V1 or V4 (2 min.) ...... 24 V
(continuous) ................. 16 V
Package Power Dissipation,
PD' ................... See Graph
Operating Temperature Range,
TA . • . . • • . . . . . . . . . .• -40°C to +85°C
Storage Temperature Range,
Ts' ............... -65°C to +150°C
Always order by complete part number:
6-4

IULQ2436M I.

UJ

TEST CIRCUIT AND TYPICAL
REAR-WINDOW DEFOGGER APPLICATION

2.0...---.....-...---,..---,..---,..----,

~

!!:

Vcc

z

o

RS 1 k

~
iii

UJ

C

a:
~

1.ol------j-""-.

o

Il.
W
(!l

«

'~"

65 ,65 mH

0.51---t----t----t""~-"1_-___l

w
...J

III

~

;;!

OL-_ _L-_ _L-_ _L-_ _
25

50

75

100
TEMPERATURE IN °c

L-_~

125

150

TOGGLE

Dwg. No. GP-009-1A
Dwg. No. ES-012

ELECTRICAL SPECIFICATIONS at TA
(unless otherwise specified).

= -40°C to

+85°C, Vee

= 12 V
Limits

Characteristic

Test Conditions

Regulator Voltage

IREG

Output Saturation Voltage

lOUT

Output Leakage Current

= 12 rnA,

VOUT
VOUT

= 28 V,
= 22 V,

Units

7.0

9.0

V

-

2.5

V

T A = +25°C

-

1.35

V

Vcc
V cc

= 12 V
= Open Circuit

Input Threshold Voltage

10k Series Resistor

Oscillator Tolerance

TA

= +25°C

T A = -40°C to +85°C
Divider Count
(V cc = 10 V to 16 V)

Max.

T A = +25°C

Output Off

= 400 rnA,
lOUT = 250 rnA,

Min.

-

100

~A

-

100

~A

1.0

5.0

V

-

±3.0

%

-

±6.0

%

Initial Timeout

4064

4064

-

Subsequent Timeouts

2032

2032

-

6-5

CIRCUIT

DESCRI~TION

OSC. An external resistor in the range of
200 k to 2 M and an external capacitor
in the range of 0.0011JF to 1 IJF determine
the frequency of the internal oscillator. The
period of oscillation is nominally RTCT with
the overall output time period (after the
digital countdown) of

COURTESY LIGHT TIMER
BATIERY
1 k

t = 4064 RTC T
where t is in seconds. See also MODE
SELECT.

OUTPUT. The output is an open-collector
of a Darlington-connected transistor. The
output is ON (low) during the timing period.
An external Zener diode is used to protect
the output against inductive-load switching
transients and automotive "load dump".
TOGGLE. A push-button, momentary-action
switch at this input toggles the timer from
the OFF to the ON state. The oscillator and
countdown circuitry are started on the falling
edge of the input pulse. Internal de-bounce
circuitry is included.
SUPPLY. The timer requires a supply current
applied to this pin through a current-limiting
resistor (R~). An internal 8 volt Zener diode
shunt regulator provides a stable supply to
the device over wide supply voltage variations. Capacitor Cs is used to provide
decoupling.

MODE SELECT. With MODE SELECT
connected to GROUND, the first activation
will run for the preset time delay. All activations after the first will time out at half of the
initial preset time. This sequence is reset
each time the supply is interrupted. With
MODE SELECT connected to SUPPLY
(V REG)' the timer will repeat the preset time
delay each time it is activated.

6-6

Dwg. No. ES-013

AVTOMOTIVE LAMP MONITORS
Capable of monitoring all types of automotive lamps, the
ULN2454L, ULN2454M, and ULN2455A lamp monitors provide
multiple LED outputs to pinpoint the area in which a lamp has failed.
The ULN2455A is a quad comparator capable of monitoring eight
individual lamps or groups of lamps. The ULN2454UM are dual
comparators featuring an additional output to trigger an alarm if either
of the comparators detects a lamp failure. This output can be used to
drive an audible signaling device or centrally located warning indicator.
All devices can be used to monitor lamps, multiple low-voltage power
supplies, or, with appropriate sensors, industrial processes.

ULN2455A

Installation and operation of these lamp monitors has no effect on
normal lamp operation. Comparators sense the normal voltage drop in
the lamp wiring (approximately 20 mV) for each of the monitored lamp
circuits. Little additional wiring is necessary for installation because the
system can be completely integral to the wiring assembly. No standby
power is required ... the operating voltage is obtained from the sense
leads; the system is energized only when the lamps are turned ON.
Dwg. No. PS-013

All devices are designed for use in the severe automotive environment. Lateral PNP transistors provide high-frequency noise immunity
and differential transient-voltage protection. Reverse voltage protection,
internal regulators, and temperature compensation are all embodied
in the circuit designs. A failure within a device will not affect lamp
operation.
These versatile lamp monitors are packaged in 14-pin plastic DIPs
(suffix A), a-lead surface-mountable SOICs (suffix L), or 8-pin mini-DIPs
(suffix M) and are rated for operation over the temperature range of
- 40°C to +85°C.

FEATURES

ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
Supply Voltage, Vcc . . . . . . . . . . . . . .. 30 V
Peak Supply Voltage, Vcc(1 00 ms) . .. 80 V
Peak Reverse Voltage, VR . • . . • . • . . . 30 V
Output Current, lOUT. . . . . . . . . . . .. 35 mA
Package Power Dissipation, PD. See Graph
Operating Temperature Range,
TA . . . . • . • . . . . . • • • .• -40°C te +85°C
Storage Temperature Range,
Ts ................ -65°C to +150°C

•
•
•
•
•
•

No Standby Power
Integral to Wiring Assembly
Fail-Safe
Reverse Voltage Protected
Internal Transient Protection
DIP or SOIC Plastic Packages

Always order by complete part number:
Part Number

Function

Style

ULN2454L

Dual Comparator with OR Output

8-Lead SOIC

ULN2454M

Dual Comparator with OR Output

8-Pin Mini-DIP

ULN2455A

Quad Comparator

14-Pin DIP
6-7

PIN OUT & FUNCTIONAL BLOCK DIAGRAMS
ULN2455A

ULN2454L
and ULN2454M

NC

Owg. No. FS-010A

Note that the dual in-line package and the small-outline Ie package
are electrically identical and shar? a common pin number assignment.

Dwg. No. A-12.033A

2.5,...---,...---,...---,...---,...----,

~

~

z
o

14·PIN DIP, RaJA

~
iiiis

~

BO'C/W

I

I

a·PIN alP, RaJA ~ B7'C/W
B-LEAD SOIC, RaJA ~ 10B'C/W

II:

~

UJ

~
~

~ 0.51---+--_f----'''''''p~~d_--_f

~

:;;!

O~

25

__

~

__

~

__

~

__

~_~

50
75
100
125
AMBIENT TEMPERATURE IN 'C

150
Dwg. No. G$-008-1

6-8

SIMPLIFIED SCHEMATIC
(SINGLE DIFFERENTIAL SENSE AMPLIFIER)

9k.Q

OUT

51 k.Q
Dwg. ES-011

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee
(unless otherwise noted).

= V1N = 10 to

16 V
Limits

Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

Units

IcEX

VOUT = 80 V, ,WIN < 7 mV

-

-

100

IlA

Output Saturation Voltage

VCE(SAT)

lOUT = 5 mA, tNIN > 20 mV

-

0.8

1.0

V

Differential Switch Voltage

b.V IN

Output Leakage Current

Input Current

lOUT = 30 mA, ,WIN> 20 mV

-

1.4

2.0

V

VIN-VINlVs

7.0

13

20

mV

liN

b.V IN = VIN-VINlVs = +30 mV

150

300

800

IlA

liN/Is

b.V IN = VIN-VINlVs = -30 mV

0.5

1.7

3.5

mA

6-9

PRINCIPLE OF OPERATION
Operation of these lamp monitors is
similar to that of a simple bridge circuit in
which the top two legs of the bridge are
formed by the wiring assembly resistance or
discrete low·value resistors. The bottom legs
of the bridge are the monitored lamps. These
differential amplifier circuits sense the voltage
drops in the wiring assemblies (approximately
20 mV) for each of the lamp circuits. When
the system detects a difference in voltage due
to an open filament, the appropriate output
driver is turned ON.

BASIC BRIDGE MONITORING SYSTEM
FEED

TYPICAL APPLICATIONS
POWER SUPPLY SUPERVISORY CIRCUIT

VOLTAGE FOLLOWER SUPPLIES
DETECTOR OPERATING CURRENT
VOFFSET
VSWITCH

«

II

OUT

VSWITCH (R, Rz)(R,.Rz)
RS = -(6""'V-1N-'-=R-z)c-."'-V""S-W-ITC-H-(7:R:-I-.::::Rz-;-)

1)1 ULN -2455A
IF

THEN

VREF = 10 V
VIN = 15V
Rz=15kQ

IF

6VIN = 250 mV
VSWITCH = 13 mV

THEN

Rs = 423 Q

R, = 7.5 kQ

Dwg. No. 8-1524

QUAD LAMP MONITOR
SI GNAl
OUTPUT
Dwg. No. A-11 ,473A

IK

IK

IK

TYPICAL SWITCH CHABACTERISTICS
30V
VCC

---\

I
I
I

'>

~
w'
 SUPPLY

GROUND
Dwg. No. A-11,716A

6-17

TYPICAL CHARACTERISTICS
TYPICAL OUTPUT POWER AS A
FUNCTION OF SUPPLY VOLTAGE
1000r------r------r------r----~----~,

~

3E
z
o

3:

THD= 10%
fin = 400 Hz

800

E

~

3E

iii

0-

en

:::>
0

i5

D..

w

r£
w
3:

a:

~

600

0

D..

D..
I-

W

Cl

~

~

D..
I-

~

0

400

~

U

200r------+------~--~~r-~~_+~--__1

W
..J

CD

~

50

..J

oct

75

100

125

0L---~~==~--~----~--~

150

o

TEMPERATURE IN °C

2

468

10

SUPPLY VOLTAGE, Vee IN VOLTS
Dwg. No. GS-01 0

Dwg. No. GP-009-1A

POWER SUPPLY REJECTION RATIO
AS A FUNCTION OF FREQUENCY
20

0

"C

3E

3E 15

0

V

.,.:
Z

w
a:
a: 10
~
u
>...J

a:

z

0

./

D..
D..

V

~

en
I- 5
z
w

/

t..,w

",

20

w

a:
>...J
D..
D..
~

en

'"

"

""" ~"

" 1k
,
"

00

I~"

en
w

4..-

II "

.... CO '6;

~

30

a:
w
3:

u

.....

i\
~

0

:5

D..

o

40

o

2

4

6

8

10

10

30

100

~~

'"

300

,,

~ ....

....
lk

FREQUENCY IN HERTZ

SUPPL Y VOLTAGE, Vee IN VOLTS
Dwg. No. G8-011

6-18

10

i=
oct

(,)

~

0

...........

CD

oct
E

Dwg. No. GS-012

APPLICATIONS INFORMATION
Selection of power-supply voltage and speaker impedance allows
a designer to choose audio power levels within the allowable package
power dissipation rating for any maximum operating temperature. No
unique precautions are necessary when designing with this device. It is
stable and ac short-circuit immune.
External component selection for this low-power amplifier involves
only two capacitors - one for output coupling and one for feedback
and ripple decoupling. The coupling capacitor value should be selected
to provide the desired low-frequency cutoff with the chosen load
impedance. The decoupling capacitor should be chosen for both
low-frequency audio rollof! and supply-ripple rejection.
Ripple rejection is not practical to calculate due to the large number
of mechanisms involved. A 500 IlF capacitor achieves typically 25 dB
rejection at 120 Hz.
The high gain and the high input impedance of the power amplifier
recommend use of this device in many diverse applications. However,
the input stage does have other characteristics that should be taken
into account for best results. The input is referenced to ground for
internal biasing and must be provided with a dc path to ground. A
current of typically 1 !lA flows from the input through the volume control.
This produces an IR drop that is multiplied by the closed loop dc gain of
the amplifier and appears as an error in output centering. This recommends a value of 200 kQ or less for the volume control; values of less
than 100 kQ are preferred.
The selection of amplifier load impedance involves more than just
consideration of the desired power output. A low load impedance will
produce the highest power output for any given supply voltage. Higher
impedances will furnish significant reduction in harmonic distortion and
improvement in overall repeatability in power output capacity.
Special steps toward minimizing tendencies towards instabilities
of all types were taken in the design of this device. However, as with all
high-gain circuits, care should be given to printed wiring board layout
to avoid undesirable effects. Inputs and outputs should be well separated and should avoid common-mode impedances wherever possible.
For best performance, connect low-level input-signal ground terminals
and the decoupling capacitor ground terminal together at pin 3 (signal
ground); connect the high-level speaker ground terminal and the
power supply ground terminal together at pin 2 (power ground).
The signal ground and the power ground should be interconnected
at only one point.

6-19

EM STEREO DECODER
SUPPLY
DE-EMPHASIS

2

HIGH CUT

J

HIGH CUT

17

LAMP FILTER

16

STEREO LAMP
BLEND
TIMING! FILTER

6

DE-EMPHASIS

BLEND
NOISE [
BANDPASS

7

14

B

1J

9

,

11

_ _ _ _. .-

COMPOSITE IN

The A3828EA FM stereo decoder utilizes advanced demodulation
techniques for improved performance under adverse receiving conditions. This is particularly important in automotive receivers where the
signal strength and multipath effects are continuously changing. It is
designed to provide the best possible performance under the widest
range of signal conditions while also reducing the cost and complexity
of standard FM multiplex receivers. This is accomplished through the
use of a dual-bandwidth phase-locked loop and a Walsh function for the
regenerated carrier. These two improvements to the carrier recovery
system produce the best possible immunity to noise and interference
of any modern PLL stereo decoder under poor signal conditions. The
A3828EA is an improved, direct replacement for the ULN3827A.

DECOUPLE
BLEND NOISE
BANDPASS
NorSE
DEMODULATOR

Dwg. No. PS-011

The dual-bandwidth phase-locked loop switches to a very narrow
bandwidth to assure optimal phase stability under noisy reception
conditions. Noise-actuated blending adjusts the stereo separation as
a function of signal-to-noise ratio to reduce the background noise for
low-signal levels and eliminate transition problems at the stereo/mono
switch point. The regenerated 19 kHz reference and 38 kHz carrier are
free from 3rd and 5th harmonics to improve adjacent channel rejection
and signal-to-noise ratio as well as providing good rejection of ARI
(Auto Radio Information), RDS (Radio Data System), and other data
tones.
The A3828EA is supplied in a 20-pin dual in-line plastic package
with a copper lead frame that eliminates many decoupling problems.

FEATURES
•
•
•
•
•
•
•
•
•

Reduced Automotive Stereo Multi-Path Effects
Dual Bandwidth Phase-Locked Loop
No Adjustments Required
Improved Adjacent-Channel Rejection
Good ARI/RDS Rejection
19 kHz Pilot Canceling
Noise-Actuated Blending and High Cut
Ceramic Resonator Controlled Oscillator
Automatic Stereo/Mono Switching

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vcc' ................ 13 V
Package Power Dissipation, PD' ....... 1.0 W
Operating Temperature Range,

TA'

.................•.

-40°C 10 +85°C

Storage Temperature Range,
Ts .................... -65°Clo+150°C

Always order by complete part number:
6-20

1A3828EA I.

FUNCTIONAL BLOCK DIAGRAM
BLEND NOISE BP

r----.j ~---------- 8 J.----lo=---+t--~p__{1S .) ~-o +V

SUPPLY

~
COMPOSITE IN
C>-~

r 14

: BLEND NOISE

10 BANDPASS
Vee

L - - - - - -

NOISE
DEMOD.

,

~

~DECOUPLE

~

I

L+R

--j

BLEND TIMING
AND FILTER

I

I

I

16

6

: STEREO LAMP 1

''VIIV;@--o+v
'I

L-R

Cl

a::

aj l

8

~I!z

Dwg. No. FS-008

6-21

ELECI'RICAL CHARACTERISTICS at TA = +25°C, VCC = 10.0 V, Composite Input = 400 mVrms
(L = R, pilot OFF), Pilot Level = 40 mVrms, fm = Ild1z, unless otherwise speci6ed.
Limits
Characteristic

Test Conditions

Supply Voltage Range

Functional

Max. Composite Input

THD

= 1.0%

Typ.

8.5

10

600

800

Max.
12

-

Units
V
mVrms

Input Impedance

15

25

35

kQ

Output Impedance

0.4

1.0

3.0

kQ

1m = 100 Hz

-

50

-

dB

1m = 1.0 kHz

30

50

-

dB
dB

Stereo Channel Separation
(100 Hz to 1 kHz)

-

40

-

·0.4

0.6

1.6

dB

-

0

±1.0

dB

-

0.05

0.5

%

Lor R only

0.1

0.5

%

19 kHz

36

51

35

45

SCA Rejection

67 kHz (Note 2)

55

65

Spurious Response

114 kHz, 10% modulation

-

65

190 kHz, 10% modulation

-

65

PLL Bandwidth

Loop Locked

-

20

-

dB

38 kHz

Stereo Switch Level

19 kHz Pilot Only, Lamp ON

10

15

22

mVrms

19 kHz Pilot Only, Lamp OFF

6.0

11

16

mVrms

3.0

dB

36

-

20

40

rnA

< 0.1

3.0

f.lA

22

35

rnA

1m = 10kHz
Monaural Gain
Monaural Channel Balance
Total Harmonic Distortion

Ultrasonic Frequency Rejection

=0
19 kHz Pilot Level = 0
19 kHz·Pilot = 0
19 kHz Pilot Level

Stereo Lamp Hysteresis

Lamp OFF to Lamp ON

Capture Range

Pilot = 6.0 mV

Lock Range

Pilot = 20 mV

Blend Threshold

S+N/N

-

Stereo Lamp Output Current

Short Oircuit, Lamp ON

5.0

Lamp OFF, Vcc
Quiescent Supply Current

= 12 V

Lamp OFF

NOTES: 1) Typical values are given for circuit design information only.
2) Measured with a stereo composite signal of 80% stereo, 10% pilot. and 10% SeA.

6·22

Min.

-

300
300

dB
dB
dB
dB
Hz

Hz
Hz
dB

THE ALLEGRO
FM STEREO SYSTEM
This new stereo decoder utilizes
advanced demodulation techniques for
improved performance under adverse receiving conditions. This is particularly important
in automotive receivers where the signal
strength and multipath effects are continuously changing. The A3828EA FM stereo
decoder also reduces the cost and complexity
of FM multiplex receivers. It is designed to
provide the best possible performance under
the widest range of signal conditions. This is
accomplished through the use of a variablebandwidth phase-locked loop and the use of
a Walsh function for the regenerated carrier.
Prior integrated stereo decoders utilized a
loop bandwidth of typically 300 Hz, which was
a compromise between acquisition performance and carrier recovery. Acquisition is generally satisfactory with this bandwidth, however, carrier recovery integrity often degrades
under noisy conditions; in the worst case to
complete loss of carrier. This is more apparent under multipath conditions. Although this
is not the only noise observed under multi path
events, it is a real source of disturbance. A
secondary feature of the wider bandwidth is a
peak in L - R distortion at the loop resonance
frequency at 9.5 kHz. Clearly, to provide optimal performance, the loop bandwidth should
be sub-audible. To provide reasonable acquisition times, the A3828EA phase-locked loop
is operated in a wide-band mode until carrier
acquisition. Upon capture, the loop is then
switched to a narrow-band mode (typically 20
Hz) to provide superior noise immunity under
adverse signal conditions.
Currently available stereo decoders generate square waves for the regenerated 19
kHz pilot and 38 kHz carrier. Although this is
convenient from the standpoint of circuit design, the spurious response of the receiver,
as observed at RF, exhibits a sine n/n spurious response pattern centered about the received frequency and spaced at 38 kHz intervals. The most detrimental harmonic is the
5th, located at 190 kHz, since this spurious
seriously degrades adjacent channel rejection. The preferred technique for eliminating
these spurious responses would be the use of
a pure sine-wave regenerated carrier.

TEST CIRCUIT AND TYPICAL APPLICATION
vee

POLARIZED CAPACITANCE VALUES ARE IN
iJ-F. NON-POLARIZED CAPACITANCE VALUES
ARE IN pF, UNLESS OTHERWISE INDICATED.

Dwg. No. ES-010

The typical application and circuit constants herein are included only as an example
and provide no guarantee for designing equipment to be mass-produced. The
information herein is believed to be accurate and reliable. However, no responsibility is assumed by Allegro MicroSystems for its use, nor for any infringements of
patents or other rights of third parties which may result from its use.

However, this is impractical using digital carrier regeneration
techniques. A more conveniently implemented method is the Walsh
function which is a digital technique for generating the odd-ordered
harmonics in a waveform that can be subtracted from the square
wave to produce a sine-wave approximation. This avoids much of the
previously described spurious responses. The implementation of this
function is relatively easy in a modern stereo decoder employing a
high-frequency ceramic resonator tor the oscillator since the required
divider can readily produce the Walsh function as a side product.
This stereo decoder also incorporates a noise-operated blending
system that is completely contained within the chip. Other devices with
signal-strength operated blending are frequently fooled into full stereo
operation by strong but poor quality signals during multipath events.
The noise-operated blending system is also actuated by environmentally generated and multipath-induced noise since the system is based
exclusively on ~ignal-to-noise ratio as observed at the FM detector
output. Since the technique of blending on noise is inherently more
repeatable than signal-strength based blending, production blend
adjustments are not required.

6-23

PIN FUNCTIONS
In addition to the advanced features
previously described, the A3828EA decoder
uses a ceramic oscillator to eliminate the last
remaining adjustment. Forced mono can be
accomplished externally which also stops the
oscillator.
Implementation is in DABiC which is
a bipolar plus CMOS process. It has the
advantages of low-noise linear circuitry and
CMOS logic that is dense (for reduced cost)
and fully characterized for operation over a
very-wide temperature range.

Pin

DC Voltage

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

10.0
4.0
4.3
3.4
3.4
4.3
4.0
3.0
3.7
4.4
5.1
5.4
5.4
3.6
8.3
9.0
5.0
5.6
0.0
9.0

NOTES

6-24

1) The decoder

Function

Notes

Supply
Left De-Emphasis
Left High Cut
Left Output
Right Output
Right High Cut
Right De-Emphasis
Blend Capacitor
Blend Capacitor
Blend Capacitor
Blend Capacitor
Blend Capacitor
Blend Decouple
Composite Input
Blend Timing & Filter
Stereo Indicator
Lock Detector Filter
Loop Filter
Ground
608 kHz Resonator

Rs
Rs
Rs
Rs
Rs
Rs

= 27.8 kQ
= 20 kQ
=
=
=
=

1 kQ
1 kQ
20 kQ
27.8 kQ

RIN = 25 kQ [1]
[2]
Locked = 0.1 V
Locked = 4.7 V
Locked = 4.7 [3]

-

-

matrix does not account for FM detector frequency roll-off.
An input RC network can be used to correct for this if separation is not
sufficient.
2) Blend threshold can be increased to about 42 dB (but separation will be
reduced at lower levels) by adding 470 kQ to Vee. Smaller values will
cause blending when it is not desired.
3) The loop filter capacitor should be low-leakage current because the
phase detector output current is very low.

AM SIGNAL PROCESSOR
Providing the AM signal processing functions for an electronicallytuned AM receiver (ETR), the ULN3841A includes a balanced mixer,
buffered local oscillator, IF amplifier, AM detector, scan control detectors, and a switchable voltage regulator. The addition of a JFET
matched to a whip antenna, RF tuning components, IF selectivity,
and audio stages gives a complete AM radio which can be used in
automotive receivers. Additional applications are in high-quality home
entertainment receivers (especially with the addition of an AM stereo
decoder) and scanning-type shortwave receivers. The frequencydetecting stop circuit is also capable of recovering narrow-band FM,
making it useful for scanners or weatherband radio applications.
The ULN3841 A has a greatly improved stop detection system over
other existing devices. It uses the dual criteria of frequency and amplitude for establishing a valid stop. Tuning accuracy (frequency criteria)
is established by evaluating phase shift across the detector coil. The
circuitry is similar to that used in FM discriminators. Since this detection
system is phase operated, it remains effective even in the presence of
strong signals, which can cause false stops in systems using narrowband filters. The amplitude criterion for stop is determined by evaluating
the IF level. It includes a unique circuit that removes the effect of the
AGC action. This allows the AGC tuning components to be selected
for lOW-frequency audio performance without compromising scanning
speed.
These AM signal processors are packaged in 20-pin plastic DIPs
and are rated for operation over the temperature range of -40°C to
+85°C.

FEATURES
•
•
•
•
•
•
•
•
•

Low Noise Figure
Balanced Mixer
Buffered Local Oscillator
Improved 'Stop' Detector
Wide-Band AGC
Delayed AGC
Narrow-Band FM Output
Low Supply Current
7 to 16 Volt Operation

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vcc" ............. 18 V
Package Power Dissipation, Po ., .. 1.18 W
Operating Temperature Range,
TA • • • • • • • • • • • • • . • •• -40°C to +85°C
Storage Temperature Range,
Ts' ............... -65°C to +150°C
Always order by complete part number: IULN3841A I .

6-25

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = 14.4 V, fo = I MHz, fif = 450 kHz,

fm = I kHz at 30% AM (unless otherwise noted).
Limits
Characteristic
Minimum Operating Voltage
Quiescent Supply Current
Sensitivity

Symbol

Test Conditions

Min.

Typ.

Max.

Units

-

7.0

-

V

Icc

No Signal

-

25

33

mA

Yin

VOUT = 50 mV

6.0

10

IlV

Vcc=11V

-

6.0

12

IlV

S + N/N = 20 dB

-

6.0

10

IlV

V6

Usable Sensitivity

Yin

Recovered Audio

VOUT

Yin = 1 mV

173

245

346

mV

Total Harmonic Distortion

THD

Yin = 1 mY, 80% AM

-

0.4

3.0

%

Oscillator Output Voltage

YOU!

150

200

400

mV

Stop Output Voltage

VII

Yin = 0

4.3

4.6

-

V

Yin = 1 mV

-

-

2.7

V

VII = 1.5 V, 0% AM

27

35

80

IlV

Vin= 1 mY, VII = 1.5 V, O%AM

8.0

10.2

13.5

kHz

Yin = 0

-

-

0.2

V

Yin = 60 mV

2.0

-

V

Stop Sensitivity

Yin

Stop Bandwidth
Wide-Band AGC

Vagc

Overload

Yin

THD = 10%, 80% AM

25

70

Input Limiting Threshold

VTH

Pin 10, M = ±3 kHz, -3 dB

-

12

FM Recovered Audio

V IO

ill = ±3 kHz, 1m = 50 Hz

-

380

-

Signal-to-Noise Ratio

S + N/N

Yin = 250 IlV

45

50

-

dB

Yin = 10 mV

-

60

-

dB

ilVOUT = -10 dB rei. Yin = 5 mV

4.2

6.0

8.4

IlV

Vin=O

1.5

1.65

1.8

V

Yin = 1 mV

0.6

0.85

1.2

V

5.1

-

V

Pin 20 Grounded (Muted)

-

-

0.6

V

AGC Figure 01 Merit
Delayed AGe Voltage

Regulator Voltage

6-26

Yin
VI?

Vg

mV
IlV
mV

TEST CIRCUIT

Small-Signal AC Parameters at TA = +25°C,
Vee = 14.4 V, fo = 1 MHz, fif = 450 kHz

I Characteristic

Pins

Typical Value

MIXER
Input Resistance

18

5 kO

Input Capacitance

18

20 pF

Transconductance

18to 19

4mmho

Output Resistance

19

75 kO

Output Capacitance

19

4pF

Input Resistance

1

8 kO

Input Capacitance

1

7 pF

1 to 8

54dB

8

450

IF

Voltage Gain
Output Resistance

Typical values are given for circuit design information only.

TYPICAL CHARACTERISTICS

o

/

-1 0

".-

7
Recovere)AUdiO V out T

1

2

=25 a C

o

>
.s

80% AM

;;-

-2 0 /

I

OJ
"0

.s

-3

'"
.2:
'"
ro

CD

ai

O~

CD
> -4
0
-'

6

J

""'" ~

-V

~ ~D

-5 0

a:

-6 0

10

"'~
100

)

4

--1---

r--<::,

~
o

10K

10 mV

"in

Iy

II

\
\

S
a.
S

o

a.

J

7;
(;

'\

o

(jj

100K

I
.1
\In = 100 I1V

\

>

-8

1K

-

·6

·4

-2

0

4

6

8

Tuning Error, kHz

Input Voltage, \In in I1V

6-27

TYPICAL CHARACTERISTICS

...

TA = 25°C

...........

1\,

~

::>
ai 3

~

:g

2

"i

\

Q.

8

1

Q.

o

U5

A HIGH-PERFORMANCE
ELECTRONICALLY-TUNED
AM STEREO RECEIVER FOR
AUTOMOTIVE APPLICATION
USING THE ULN3841A

0
10

"--

100

Input Voltage, Vinin!IV

1K

The advent of AM stereo has changed
the perception of AM as a low-fidelity medium. This has caused a revaluation of AM
receiver performance objectives, particularly
minimum audio bandwidth. To achieve
satisfactory stereo imaging, a minimum highfrequency response of 4 kHz has been shown
to be necessary. Additionally, AM stereo has
imposed the totally new requirements of
phase linearity and freedom from incidental
phase noise and modulation.

RFSECTION
6

5

I

. /~

/'

4

TA=250C

,~

'"

2

0

>
.~

3

0
>~

2

-15

o

-5

-10

~

+5

--

/

..-

+10

+15

RF gain is provided by a large-area JFET,
selected for high gate-to-channel capacity to
provide a capacitive match to the broad-band
antenna. To further improve this match, a
wide-band step-up transformer T1 is also
included. The inductance of this transformer
was selected to resonate with typically 90 pF
cable capacity at the lower band edge to
improve across the band gain uniformity.
T1 improves usable sensitivity, typically 3 dB.
A cascode bipolar stage is also included to
prevent Miller effect from loading the antenna,
providing typically 2 dB improvement in
usable sensitivity at 1400 kHz.

fin in kHz

Overall gain of the RF stage is low to
minimize cross-modulation, made possible by
a low noise figure mixer. At moderate signal
levels, cross-modulation is primarily limited by
the performance of the JFET. At higher levels,
wide-band AGe is applied to a clamp transistor at the antenna. This signal is derived from
the secondary to T2 and is rectified and
amplified by the ULN3841A.

I

10.0

VOU ! =50mV
8.0

~

6.0

~

c::

->

.i.>

----

4.0

""c::

·iii
(J)

(f)

2.0
·25

o

50

25

Ambient Temperature, TA in

°c

75

A wider RF bandwidth is used to reduce
the effects of mistracking and misalignment
on stereo separation and distortion. The
overall bandwidth (audio response) and band
shape of the receiver should be determined
by the IF selectivity.
To achieve widest bandwidth with minimum sacrifice in out-band selectivity, a
double-tuned section was selected, T2 and
T3. To further enhance bandwidth vs. selectivity performance across the band, a combination of frequency-dependent loading and
coupling is used. The 330 IlH choke is used

6-28

as top coupling and is constant across the
band; the .047 J-lF capacitor is a bottomcoupling element which decreases coupling
with increasing frequency. The varactor diode
series-loading resistors (6.8Q) are also
employed to reduce Q at the lower end of the
band. This produces typical 6 dB bandwidths
of 18.6 kHz at 600 kHz and 24 kHz at 1400
kHz. Variable coupling also reduces gain
variation across the band (ref. 1).

MIXER AND IF
The output from the double-tuned RF is
applied to the balanced mixer, pin 18, which
is biased from pin 17. Output from the mixer
is taken via T5. The primary impedance is
15 kQ. Secondary and Q are selected for the
ceramic filter which was chosen for stereo
performance and bandwidth. This filter has a
quasi-parabolic band pass and reasonably
constant group delay. Termination resistors
at pin 1 are configured as a pad to permit
adjustment of overall gain.

TYPICAL CHARACTERISTICS
270

>

E

260

0

250

Yin = 1 mV

.s
::;
>

~

~

., . /

0

i5
::0

4:

V

/

240

"0
Q)

a;

>

230

0

u

Q)

0:

220

·25

25

75

50

Ambient Temperature, TA in

°c

215

>

E

The detector coil (L 1) serves as the AM
detector and also establishes the stop bandwidth. Tuning accuracy is established by
evaluating phase shift across the detector coil
employing circuitry similar to that used in FM
discriminators. Stop phase criteria is internally
set to one-half the 3 dB bandwidth (fif/2x
loaded Q) of L1. The value in the application
is 20. This circuit also recovers narrow-band
FM at pin 10.

.s

AGe rate is selected for audio performance. AGe action is removed from the stop
circuit, which effectively eliminates the tradeoff between AGe performance and permitted
scanning rate. Monaural output is provided in
this application for alignment and evaluation.
If the monaural output is not required the 10
kQ and .005 J-lF components can be deleted
without affecting stereo performance. In this
application the ULN3841 A stop detector
output (pin 11) is applied through a time delay
to the AM stereo decoder force monaural
input to reset the decoder counters during the
tuning. The IF signal for the decoder is taken
out at the detector coil.

0

210

'5
205
0

>

'"

Ol

~

200

0

195

'5
0'5

190

>
0

0

185

1§
·0

180

./

~

V
~

-

.......

~

'"'",

~

/'

U)

175
-25

a

25

Ambient Temperature, TA in

50

75

°c

6-29

TYPICAL CHARACTERISTICS
4.5
3.0
aJ

1:l

c

~

1.5

~

.;; 0
<=
'iii
c

'"a.

/

-1.5

./

C/)

0

i'i5

-3.0

V

.-.

STEREO DECODER

-

REFERENCES

V

1. "Development of High Quality Receiver for
AM Stereo" by Jon P. Grosjean and Oliver
Richards, publication TP80-5.

~

-4.5
-25

o

25

50

75

N

I

10.5

-'"
.~

..c:

i5
.;;:
1:l

...-....,

vin= 1 mV

'"I ,

1-0-.

10.0

C

'"

aJ

a.
o

i'i5 9,5

-25

o

25

Ambient Temperature, TA in

6-30

50

0c

2. "Pilot-Tone Band-Pass Filter Circuit
Component Tolerance Considerations,"
Motorola, publication M68465.
3. "VCO and Phase-Lock Loop Performance,"
Motorola publication M684131.

Ambient Temperature, T A in oc

110

The component values used with the AM
stereo decoder are based on the applications
information as given elsewhere. Note that the
pilot-tone and co-channel components should
be precision as shown (ref. 2, 3).

75

Vcc_B

MURATA
SFG450F

r-------~,. ~i----------,

~

[IJ

~
~
o
~

CAPACITOR VALUES S -1 ARE IN IlF.
"1 ARE IN pF UNLESS OTHERWISE SHOWN
TOKO KV 1235Z

~
~

~~
HI = AUTOMII.T!C MONO STEREO
LO = FORCEO MONO

~

o
~

~

io

~

e;

COIL INFORMATION FOR TEST CIRCUIT AND
HIGH-PERFORMANCE ETR AM STEREO RECEIVER
Symbol

Q

NYN2

N'IN3

Taka Part Number

c
e
100(

O'l

~

1:1.6

Antenna

T1

RF

T2,T3

120

LocalOsc.

T4

120

Mixer

T5

Detector (test)

L1

100

(application)

L2

100

2:1

o

7HN-60064CY
10:1

RWOS-6A7894AO, L

5:1

7TRS-A5609AO

8.9:1

7LC-502112N4, CT

= 178 flH

= 180 pF
= 100 pF
A7BRS-T1041Z, CT = 1000 pF

7NRES-A5622AAG, CT

~

DUAL-CONVERSION AM RECEIVER
Providing the AM signal processing functions for an electronically
tuned AM receiver (ETR), the A3844EEP includes two balanced mixers,
a crystal local oscillator, an UC-tuned local oscillator, oscillator buffer, IF
amplifier, AM detector, scan control detectors, and a switchable voltage
incoming RF up to a
regulator. This dual-conversion device mixes
first IF of 10.7 MHz, then down to 450 kHz,
detects the audio.
The addition of a JFET matched to a
low-pass filter, IF
selectivity, and audio stages gives a
which can be
used in automotive receivers. The
circuit is also
capable of recovering
for scanners or
weather band radio applications.

ii

~
~

8
~

~c

Wz
>~
~~
~(!)

The A3844EEP has a
other existing devices. It
tude for establishing
is established
circuitry is
system is

'~"

detection system over
of frequency and ampliaccuracy (frequency criterion)
across the detector coil. The
tii",r.rirnin."tnr", Since this detection
effective even in the. presence of
false stops in systems using narrowcriterion for stop is determined by evaluating
unique circuit that removes the effect of the
the AGC tuning components to be selected for
performance without compromising scanning speed.
is an improved, direct replacement for the ULN3847EP.

Dwg. No. PS-012

signal processor is packaged in a 28-lead plastiC leaded
rrier (PLCC) for surface-mount applications and is rated for
ation over the temperature range of -40°C to +85°C. Devices for
eration over a temperature range of -40°C to +1 05°C are available
on special order.

FEATURES

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee'" ............ 12 V
Package Power Dissipation, Po .... 1.2 W
Operating Temperature Range,
TA • • • • • • • • • • • • • • • •• -40·C to +8S·C
Storage Temperature Range,
Ts' . . . . . . . . . . . . . .. -6S·C to +lS0·C

•
•
•
•
•
•
•
•
•
•
•

Low Noise Figure
High Dynamic Range First Mixer
Balanced Mixers
Buffered Oscillators
Very Effective Stop Detector
Dual Wide-Band AGC
Delayed AGC
Narrow-Band FM Output
Full-Wave Detector
Low Temperature Drift
6.5 V to 12 V Operating Range

APPLICATIONS
•
•
•
•

Automobile Radios
High-Quality Home Entertainment Receivers
World-Band Receivers
CB Transceivers

Always order by complete part number:

1A3844EEP I.

= +25°C, Vee = 10 V, fo = 1 MHz, fifl = 10.7 MHz,

ELECTRICAL CHARACTERISTICS at TA
fif2 =450 kHz, fm =1 kHz

Limits
Characteristic

Test Conditions

Symbol

Min.

Typ.

Max.

Units

-

50

65

mA

Supply Current

Icc

12 , Vin = 0
12 , Vin = 0, V24 = 0 (Muted)

-

3.0

-

mA

Sensitivity

Vin

Vaut = 50 mV

-

6.0

-

\JV

Usable Sensitivity

V.In

S + N/N = 20 dB

-

Recovered Audio

Vaut

Vin = 1 mV

200

Total Harmonic Oist.

THO

Vin = 1 mV, Mod = 80%

Oscillator Output

Va

Stop Output Voltage

VSTP

Stop Sensitivity

Vstp

Stop Bandwidth

BWsTP

Wide-Band AGC

VAGC

Overload

Vin

14

-

\JV

250

-

mV

-

0.4

1.5

%

V 15

-

300

-

mV

V7 ,Vin =0

-

4.8

-

V

V7 , Vin = 1 mV

-

0.05

-

V

V 11 = 2.5 V, Mod = 0%

-

100

-

\JV

Vin = 1 mV, V 11 = 1.5 V, Mod = 0%

-

10.2

-

kHz

Vin = 0

-

7.5

-

V

Vin = 18 mV

-

6.5

-

V

V in = 60 mV

-

1.0

-

V

Vaut = 10% THO, Mod = 80%

-

200

-

mV

First Mixer

-

450

-

mV

-3dB Limiting

Vin

Mod = 3 kHz peak deviation

-

12

-

\JV

IF Output Voltage

Vaut

V in = 1 mV

-

197

-

mV

FM Recovered Audio

Vaut

V6' Mod = 3 kHz peak deviation

-

380

-

mV

Signal to Noise Ratio

S+N/N

Vin = 1 mV

-

55

-

dB

V in = 10 mV

-

60

-

dB
\JV

AGC Figure of Merit

FOM

ReI. at Vin = 5 mV, V in or Vaut = -10 dB

-

30

-

Regulator Voltage

V REG

V5

-

5.1

-

V

V 5' V 24 = 0 (Muted)

-

0

0.2

V

V 13

-

3.5

-

V

Reference Voltage

V REF

6-33

AM NOISE BLANKEHS
ULN3845A
,

SUPPLY

RF BYPASS

RF IN

2

RF BIAS

3

NO
CONNECTION
RF GATE
LOW
RF GATE
HIGH

AUDIO DELAY

5

GROUND

AUDIO BLANK
TIME (R)

AUDI~~~1~~
AUDIO OUT,
AUDIO IN,

RF BLANK
TIME
7

12

~f1!~~RENTIATOR

11

AUDIO OUT2

-...---.Dwg. No. PS-OD3

These noise blanker integrated circuits contain all of the necessary
circuitry for adding an extremely efficient noise blanking technique
(patents pending) to any type of AM tuner or receiver with RF input
frequencies (or a first IF) to 30 MHz. The ULN3845A features dual
audio channels and is intended for AM-stereo or independent sideband
applications. The ULN3846A has only a single audio channel but is
electrically identical to the ULN3845A in all other respects.
A high input impedance, high-gain, broadband RF amplifier permits
these devices to be directly connected to the RF stage of a tuner. The
internal automatic gain control circuitry insures that the noise detection
threshold remains constant with changes in input signal level. The AGC
circuitry is identical to that of the ULN3841 A AM signal processor and is
especially recommended for use with those devices. The response time
of the RF gate is sufficiently fast to blank the noise pulse at the output
of the mixer before the IF filter. Very-short blanking times will effectively
suppress most of the interfering noise. Residual audio noise is removed
by an audio sample-and-hold gate. The RF blanking time, audio gate
delay time, and audio gate blanking time can all be independently
adjusted to suit the particular application.
These AM noise blankers are packaged in plastic DIPs and are
rated for operation over the temperature range of -40°C to +85°C.

FEATURES
• RF Blanking to 30 MHz
• Single-Channel or Stereo Audio Blanking
• Adjustable RF and Audio Blanking Time
• Adjustable Audio Blanking Delay
• Sample-and-Hold MaS Audio Gates
• Internal Voltage Regulation
• Minimum External Components

APPLICATIONS
•
•

AM and AM-Stereo Automotive Radios
CB Transmitter/Receivers

• Short-Wave Receivers
•

Mobile Communications Equipment

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vcc ............. " 12 V
Package Power Dissipation,
PD ....................... 880 mW
Operating Temperature Range,
TA ................ -40°C to +125°C
Storage Temperature Range,
Ts ................ -55°C to +125°C

6-34

Always order by complete part number:

Part Number

Function

ULN3845A

Stereo Noise Blanker

ULN3846A

Mono Noise Blanker

ULN3646A
RF IN

,

RF BYPASS

2

RF BIAS

3

AUDIO DELAY
AUDIO BLANK
TIME (R)
AUDIO 8LANK
TIME (C)
AUDIO OUT

SUPPLY
NO
CONNECTION
RF GATE
LOW
RF GATE
HIGH

5

NOISE

-.......-...-

0

FIGURE 1

:0~05

Vee

267

001

001

h---j

RF"v

931

2K

187

GROUND

7

Jlfit

TEST CIRCUIT

-=-

RF BLANK
TIME
NOISE
DIFFERENTIATOR

-=

-=

0.1

Dwg. No. PS-004

AUDIO

Dwg. No. ES-007

Note that the noise-pulse input is
attenuated 20 dB by the test circuit.

FUNCTIONAL BLOCK DIAGRAM
(ULN3845A)

MI8D~ >,----,

RF IN
RF

>---1(;--,-----

1
' RF BYPASS

~

r-

-'-

t- __I~

~+-"VV'.,....

GROUND

I

....!....

rh

SUPPLY~

69pF

13 RF BLANK
~ TIME

4 )---4---------'

RF AGC

~ - - - --®-----,

~

J;.

RF BIAS

t---ll-I

3

b:
5

2

:'(
~

J

B: E--;'
- -?

IF
IN

40

:
RF'6 T---~
BYPASSl
T
Vee
~

+4V

@ NO

t----+-t--{9

>---I\N'\,.-+-l8

CONNECTION

AUDIO IN,

AUDIO OUT,

AUDIO
DELAY

1K
>--'VV'Ir--{11

AUDIO OUT2
Dwg. No. FS-OD4

6-35

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = 9 V, frf = 1 MHz,
Noise (fnOIse
. ) = 500 Hz Square Wave, f a f = 1 kHz, Test Fig·ure·!.
Limits

Test
Pins·

Min.

Typ.

Max.

Units

Supply Voltage Range

18

Operating

7.5

9.0

12

V

Quiescent Supply Current

18

VRF = 0

-

12

20

mA

Characteristic

Test Conditions

RF INPUT AMPLIFIER:
Trigger Threshold

1

Noise Pulse Amplitude for VRF = 0

-

jJV

1

Noise Pulse Modulation for VRF = 1 mV

-

100

Modulation Threshold

85

Detector Rise Time

12

C 12 = 0

-

500

-

ns

-

50

%

RFSWITCH:
ON Resistance

15·16

OFF Resistance

15·16

Time Delay

1-15

From Beginning of RF Pulse
to Beginning of RF Blanking

70

100

-

k

1.5

3.0

jJs

AUDIO SWITCHES:
Attenuation
Noise
Crosstalk
Gain

9·8,10·11

60

80

-

dB

8,11

-

1.5

6.0

mVpp

60

-

dB

·1.0

·0.5

0

dB

<0.1

0.5

%

100

k

1.0

-

55

65

jJs

8,11

ULN3845A Only

9·8,10·11

Total Harmonic Distortion

8,11

Input Impedance

9, 10

Output Impedance

8,11

Vat = 300 mV, Vnoise = 0

-

k

BLANKING TIMERS:
RF Blanking

15

Audio Delay

8

Rs = 350 k

40

50

62

jJs

Audio Blanking

8

R6 =110k,C 7=0.0012jJF

220

290

360

jJs

'Pin numbers are for ULN3845A.

6·36

R13 = 350 k

45

CIRCUIT DESCRIPTION
Previous attempts at suppression of
impulse noise in AM receivers have used a
variety of approaches ranging from gating the
signal OFF at the antenna to simply clipping
(limiting) any signal that was larger than the
average modulation. Unfortunately, the former
can generate as much noise as it removes
while the latter only reduces the level of noise
impulses and does not remove them.
A major problem in attempting to suppress impulse noise in an AM receiver can
best be described by looking at the shape of
a noise pulse as it passes through a typical
tuner as shown in Figure 2. Here, a typical
0.5 ~s pulse is applied to the antenna input.
The resulting waveforms are essentially the
impulse response of the different selectivity
sections as limited only by the dynamic range
of the individual sections. Note that the signal
remains quite narrow until the IF filter is
reached. Because of the relatively narrow
bandwidth of the IF filter, the limiting of the
IF amplifier, and the filtering effect of the
detector, the audio output resulting from
the impulse is much wider than the original
input pulse and is therefore much more
objectionable.
One blanking scheme currently in use
senses the noise pulse in the IF amplifier and
blanks the audio output. This results in a long
blanking time and poor performance at the
higher frequencies where a short blanking
time is needed most.
The ULN3845A and ULN3846A take a
different approach to the noise suppression
problem by sensing the noise pulse in the
receiver's RF section and blanking the pulse
before it reaches the IF. This requires a noise
amplifier with a minimum propagation delay
and high-speed gating.
Blanking the noise pulse in this way is
very effective, but some of the interference
can still reach the audio output due to the loss
of carrier during the blanking interval. For this
purpose, an additional delay, blanking interval, and audio gate (or gates in the case of
the ULN3845A) are included to further
suppress any residual signal. The result is
almost 100% suppression of impulse noise
including that from ignition systems and from
sources producing interference at a power
line rate such as light dimmers and fluorescent lamps.

QUIESCENT DC VOLTAGES
(FOR CIRCUIT DESIGN INFORMATION ONLY)
Pin Number

Typical

ULN3845A

ULN3846A

1

1

RF In

3.1

2

2

RF Bypass

3.1

3

3

RFBias

3.1

4

4

RFAGC

0.9

5

5

Audio Delay

4.8

6

6

Audio Blank Time (R)

4.8

7

7

Audio BlankTime (C)

4.8

8

8

Audio Out x

4.75

9

9

Audio In x

4.0

10

Audio In 2

4.75

11

-

Audio Out2

4.0

12

10

Noise Differentiator

4.9

Pin Function

DC Voltage

13

11

RF Blank Time

14

12

Ground

4.8

15

13

RF Gate High

-

16

14

RF Gate Low

-

17

15

No Connection

18

16

Supply

Reference

0
Vcc

Referring to the Functional Block Diagram, the RF input stage is a
differential amplifier, so that the input impedance is high. The triggering
threshold at the RF amplifier input is about 15 ~V at 1 MHz. This means
that a pulsed RF input signal of 15 ~V will exceed the threshold and
trigger the blanker. The external capacitor at the dV/dt detector circuit
(C 12 ) is selected so that audio signals do not cause triggering. At high
input levels, the threshold is internally set so that an RF burst of 50%
modulation triggers the blanker. A resistor in parallel with C '3 will
increase the detection threshold level.
The RF-switching MOSFET (pins 15-16) is controlled by the RF
one-shot whose gate time is determined by the value of R,3 .
RF Gate Time (~s) = 157 x 10.12

X

R'3

where R'3 should be greater than 33 k . Smaller values for C 12 will
reduce the sensitivity to RF input pulses. The MOSFET turns ON within
approximately 1.5 ~s (shunting the RF signal to ground) after a noise
pulse is detected and then turns OFF over a 15 ~s period after the end
of the RF gate time. The ON resistance of the MOSFET is about 40
The slow turn-OFF prevents any additional transients from being
introduced into the receiver by the RF gate. The internal gate circuit
also includes charge-balancing circuits so that switching transients are
canceled and do not appear at the output. These features ensure
transient-free switching even when the RF gate is connected to the
low-level input stages of a receiver. Note that the RF gate must be
6-37

TYPICAL PULSE RESPONSE
FIGURE 2
ANTENNA
BW='WIDE'

RF
20 kHz

MIXER

IF
12 kHz

AUDIO
5kHz

t o.5JiS
NOISE
PULSE

Dwg. No, 05-001

connected to a supply to obtain the minimum ON-resistance of the
MOSFET gate. This makes it convenient to connect the RF gate in
parallel with the receiver mixer output transformer primary.
Blanking in the RF or mixer sections of the receiver removes most
of the noise pulse but a small amount still remains due to the hole
punched in the carrier. This residual noise is theoretically somewhere
between the peak audio and 100% negative modulation but is significantly smaller and narrower than that which the impulse would normally
produce without blanking. An audio delay, one-shot,.and audio gate(s)
are included to eliminate this residual signal.
The audio delay is determined by the value of Rs:
Audio Gate Delay (lJs) = 143 x 10"2 X Rs
where Rs should be greater than 33 k . The amount of delay required
will depend on the IF filtering characteristics of the particular receiver
design. After the audio delay time, the audio one-shot is triggered. The
audio switching MOSFETs (pins 8-9 and pins 10-11) are controlled by
the audio one-shot whose gate time is determined by the values of Rs
and C 7 :
Audio Gate Time (lJs)

=2.2 X Rs x C7

The MOSFET audio gates also include charge-balancing circuits to
eliminate switching transients.
6-38

TYPICAL APPLICATION

TYPICAL RF FREQUENCY
RESPONSE

A typical application using the ULN3845A in a C-QUAM® AM
stereo car radio tuner is shown in Figure 3. Although there is a 1.5 j.Js
delay from the beginning of the noise pulse to the start of blanking, this
is small compared with the impulse response time of the receiver. It
takes almost 10 j.Js for the RF noise burst to reach 70% amplitude at
the mixer input. The blanker RF input could have been connected to
the collector of the discrete RF amplifier, but the bandwidth is much
wider there and false triggering from strong adjacent channel signals
could occur.

~
\

-5

\

-10

-15

0.1

1.0

10

\\

The ULN3845A and ULN3846A noise blankers can also be used in
dual-conversion AM tuners. The blanker RF input would then be connected at the first IF amplifier input and the blanker RF gate connected
at the second mixer output. Since the first IF band-width is usually relatively wide, the noise pulses are narrower, and the RF blanking time will
be correspondingly less. In this case, it may be necessary to reduce the
value of capacitor C '2 so that the noise separator does not extend the
RF blanking time.

RF INPUT FREOUENCY IN MHz
Dwg. No. GS-006

COIL INFORMATION FOR HIGH-PERFORMANCE
ETR AM STEREO RECEIVER WITH
NOISE BLANKING
Symbol
Antenna
RF

Q

N1:N2

N1:N3

1:1.6

T,

Toko Part Number
7HN-60064CY

T 2, T3

120

10:1

RWOS-6A7894AO,
L = 178IJH

LocalOsc.

T4

120

5:1

7TRS-A5609AO

Mixer

Ts

8.9:1

7LC-502112N4,
CT = 180 pF

Detector

L2

2:1

100

A7BRS-T1041Z,
CT = 1000 pF

® Registered trademark of MOTOROLA, INC.

6-39

ETR AM STEREO RECEIVER WITH NOISE BLANKING

'"
~

="l

r-

1-

CA!'Acm:1fI VALUES ~1 AII~ IN ,
~1 AAE'NpFUNI.1:SS0THEFlWlSESIIOWN

DUAL-CONVERSION AM RECEIVER
Providing the AM signal processing functions for an electronically
tuned AM receiver (ETR), the A3848EEQ includes two balanced mixers,
a crystal local oscillator, an UC-tuned local oscillator, oscillator buffer, IF
amplifier, AM detector, scan control detectors, and a switchable voltage
ming RF up to a
regulator. This dual-conversion device mixes the i
first IF of 10.7 MHz, then down to 450 kHz, and t
etects the audio.
The addition of a JFET matched to a whip a ......
low-pass filter, IF
selectivity, and audio stages gives a com
which can be
used in automotive receivers. The fre
top circuit is
also capable of recovering n a r r o w - b g it useful for scanC and field-strength
ners or weather band radio appli .
indicator modes provide speci
anning.
The A3848EEQ has
d stop detection system over
other existing devices. I
criteria of frequency and amplitude for establishi
ning accuracy (frequency criterion)
is established b
shift across the detector coil. The
circuitry is
ed in FM discriminators. Since this detection
it remains effective even in the presence of
system is
stron .
n cause false stops in systems using narrowba
plitude criterion for stop is determined by evaluating
es a unique circuit that removes the effect of the
is allows the AGC tuning components to be selected for
y audio performance without compromising scanning speed.

o

8
g
o

z

~

In
normal AGC mode (AGC RESET low). a slow, narrow-band
'strength indicator (FSI) is provided for controlling signal-dependent
nctions such as stereo blending. A fast AGC mode (AGC RESET high)
resets the AGC holding capacitors to maximum gain. This mode allows
cataloging station strengths quickly during a band sweep.
This AM signal processor is packaged in a rectangular, 32-lead,
plastic, leaded chip carrier (PLCC) for surface-mount applications and
is rated for operation over the temperature range of -40°C to +85°C.
Devices for operation over a temperature range of -40°C to +1 05°C
are available on special order.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ............... 12 V
Package Power Dissipation, PD ..... 1.2 W
Operating Temperature Range,
T A. . . . . . . . . . . . . . . .. -40°C
Storage Temperature Range,
Ts ................ -65°C

to +85°C

to +150°C

FEATURES

APPLICATIONS

•
•
•
•
•
•
•
•
•
•
•
•

• Automobile Radios
• High-Quality
Home Entertainment Receivers
• World-Band Receivers
• CBTransceivers

Low Noise Figure
High Dynamic Range First Mixer
Balanced Mixers
Field-Strength Indicator
Buffered Oscillators
Very Effective Stop Detector
Dual Wide-Band AGC
Delayed AGC
Narrow-Band FM Output
Full-Wave Detector
Low Temperature Drift
0.5 V to 12 V Operating Range

Always order by complete part number:

I A3848EEQ I.
6-41

ELECTRICAL CHARACTERISTICS at TA
= 450 kHz, fm = 1 kHz

fiB

= +25°C, Vee = 10 V, fo = 1 MHz, fifl = 10.7 MHz,
Limits

Characteristic

Symbol

Supply Current

Icc

Test Conditions

Min

Typ

Max

Units

12, Yin = 0

-

50

65

mA

12, Yin = 0, V27 = 0 (Muted)

-

3.0

-

mA

-

6.0

-

IlV

14

-

IlV

250

-

mV

Sensitivity

Yin

Vout = 50 mV

Usable Sensitivity

Yin

S + N/N = 20dB

Recovered Audio

Vout

Yin = 1 mV

Total Harmonic Oist.

THO

Yin = 1 mY, Mod = 80%

-

0.4

1.5

V 17

300

-

mV

Va, Yin = 0

-

4.8

-

V

Va, Yin = 1 mV

-

0.05

-

V

V 12 = 2.5 V, Mod = 0%

-

100

-

IlV

Yin = 1 mY, V12 = 1.5 V, Mod = 0%

-

10.2

-

kHz

Yin = 0

-

7.5

-

V

Yin = 18 mV

-

6.5

-

V

Yin = 60 mV

-

1.0

-

V

Yin = 0

-

-

0.5

V

Oscillator Output
Stop Output Voltage

Vo
VSTP

Stop Sensitivity

Vstp

Stop Bandwidth

BWsTP

Wide-Band AGC

VAGC

Field-Strength
Indicator
Output Voltage
(unmodulated,
AGC Reset High)

Field-Strength
Indicator
Output Voltage
(unmodulated,
AGC Reset Low)

Overload

V FS1

VFSI

Vin

200

%

Yin = 10 IlV

-

1.1

-

V

Yin = 100 IlV

-

2.2

-

V

Yin = 1 mV

-

3.3

-

V

Vin=10mV

4.0

4.4

5.0

V

Yin = 0

-

-

0.5

V

Yin = 10 IlV

1.1

-

V

Yin = 100 IlV

-

2.2

-

V

Yin = 1 mV

-

3.3

-

V

Vin =10mV

4.0

4.4

5.0

V

Vout =10% THO, Mod = 80%

-

200

-

mV

First Mixer (Note 2)

450

-

mV

-3dB Limiting

Yin

Mod = 3 kHz peak deviation

-

12

-

IlV

IF Output Voltage

Vout

Yin = 1 mV

-

197

-

mV

FM Recovered Audio

Vout

V 7, Mod = 3 kHz peak deviation

-

380

-

mV

Signal to Noise Ratio

S+N/N

Vin= 1 mV

55

-

dB

Vin= 10 mV

-

60

-

dB

AGC Figure of Merit

FOM

ReI. at Yin = 5 mY, Yin or Vout = -10 dB

-

30

-

IlV

Regulator Voltage

V REG

VB

-

5.1

-

V

VB, V27 = 0 (Muted)

-

0

V ts

-

3.5

Reference Voltage

VREF

NOTES: 1. Typical data is for design information only.
2. Attenuate MIXER t output with 50 Q load on mixer coil secondary, VO"t =to% THD, Mod = 80%

6-42

0.2

V

-

V

FM COMMUNICATIONS IF SYSTEM
This low-power, narrow-band FM IF system provides the second
converter, second IF, demodulator, and squelch circuitry for communications and scanning receivers.
The ULN3859A's double-balanced mixer permits low-noise operation while eliminating spurious responses, effectively rejecting tweet
and IF feedthrough, and reducing local oscillator radiation. The mixer's
high input impedance matches popular 10.7 MHz crystal filters while
its output impedance matches most 455 kHz ceramic filters. Although
designed for use with a 10.7 MHz first IF and a 455 kHz second IF, the
mixer operates at other RF or IF input frequencies through 30 MHz.
A multi-stage 1 MHz differential amplifier/limiter following the
second IF filter operates as a high gain stage with excellent commonmode rejection.
Audio is recovered by a quadrature FM detector that requires only
a single low-cost tuned circuit.
The ULN3859A has both a low-impedance emitter-follower audio
output and an AFC output. Few external components are needed for
operation with noise-activated or tone squelch.
This communications IF system meets the stability requirements of
many automotive applications, and also meets the low-power demands
of portable radio design. Internal voltage regulators and bias supplies
ensure stable performance despite variations in external supply voltage
(4 to 9 V) or temperature (-30°C to +70°C).

FEATURES
•
•
•
•
•

Dual Conversion
Low Current Drain
Wide Operating Voltage Range
High Sensitivity
Replaces MC3359P

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ............... 12 V
Mixer Input Voltage, Vin •••••••••••• 1.0 V
Mute Terminal Voltage Range,
V'6 ................ -0.5Vto+12V
Operating Temperature Range,
TA • • • • • • • • • • • • • • • •• -30°C to +70°C
Storage Temperature Range,
Ts ................ -65°C to +150°C

Always order by complete part number:

1ULN3859A I.
6-43

ELECTRICAL CHARACTERISTICS at TA= +25°C, Vee = B.O V, fo = 10.7 MHz,
fm = 1.0 kHz, fd =±3.0 kHz (unless otherwise noted).
Characteristic

Test
Pin

Limits
Test Conditions

Min.

Typ.

Max.

4.0

8.0

9.0

V

-

3.0

6.0

mA

Units

Operating Voltage Range

4

Quiescent Supply Current

4

V14

V14 ? 0.7 V, Mute ON

-

4.0

7.0

mA

Input Limiting Threshold

18

-3 dB Limiting

-

2.0

6.0

IlV

Mixer Conversion Gain

3

See Note 1, Below

-

24

-

dB

Mixer Input Resistance

18

-

3.6

-

kQ

Mixer Input Capacitance

18

-

2.2

-

pF

Mixer Output Impedance

3

-

1.8

-

kQ

Limiter Input Impedance

5

Quiescent DC Output Voltage

10

= 0,

Mute OFF

See Note 2, Below

-

1.8

-

kQ

3.6

4.4

V

Vin

=0

2.4

-

500

-

Q

= 3.0 mV

450

700

mVrms

Audio Output Impedance

10

Recovered Audio Output

10

Vin

Amplifier Gain

13

f

40

53

Quiescent DC Output Voltage

13

Vin

-

1.7

-

Mute Switch Resistance

16

-

4.0

10

Scan Source Current

15

2.0

4.0

-

= 4.0 kHz, Vin = 5.0 mV
=0
hs = 2.5 mA, V14 ? 0.7 V
V14 = V15 = 0, Mute OFF

V
Q
mA

TEST CIRCUIT

APPLICATION INFORMATION
1. In a typical application, with a 3.6 kQ
crystal filter source, the ULN3859A will
give 23 dB conversion gain.

t--+---o
rf1'7]---~

2. Because crystal filters are extremely
sensitive to reactive loading, radio designers frequently have added a coil and/or
capacitor at pin 18 to cancel the input
reactance component. This practice is not
required with ULN3859A, since its input is
designed to match typical 10.7 MHz crystal
filters. However, if an external reactive
component is used, it is important to adjust
it for optimal passband shape and not
simply peak if for maximum sensitivity.
3. Pin 11 provides AFC. If AFC is not required, pin 11 should be grounded, or tied
to pin 9 to double the available recovered
audio.

dB

50

I-F INPUT

Q

=--fllr}------Q MUTE

H151-----o

SCAN CONTROL

--c=--rT4l----{)

SQUELCH INPUT

f---.;-----o

AMPLIFIER OUTPUT

1-......- - - - 0

AMPLIFIER INPUT

-Il1lf---_.--o
/<.fTIf1-----f---O
WOK

0.1.r

AFC OUTPUT
AUDIO OUTPUT

lOOK

4. Pin 10 may require an external resistor
(2 kQ minimum) to ground to prevent audio
rectification with some capacitive loads.
Dwg. No. A-11 ,372

6-44

FM COMMUNICATIONS IF
AND AUDIO SYSTEM

QUADRATURE
COIL

Dwg. PS·019

The ULN3883A low-power, narrow-band FM IF system provides the
second converter, second IF demodulator, and audio amplifier circuitry
for communications and scanning receivers. A double-balanced mixer
permits low-noise operation while eliminating spurious responses,
effectively rejecting IF feedthrough, and reducing local oscillator radiation. The mixer high input impedance matches popular 10.7 MHz
crystal filters and is designed to handle strong adjacent signal rejection,
while its open-collector output is suitable for driving tuned transformer
networks. Although designed for use with a 10.7 MHz first IF and a
455 kHz second IF, the mixer operates at other RF or IF input
frequencies through 50 MHz. After the second IF filter, a multistage
1 MHz differential amplifier/limiter operates as a high-gain stage with
excellent common-mode rejection. Audio is recovered by a quadrature
FM detector that requires only a single low-cost tuned circuit. An onboard audio amplifier provides 250 mW output (at Vcc = 5 V) with low
distortion for driving a speaker. The audio switches OFF in the mute
mode, thus reducing power consumption.
This communications IF system meets the stability requirements of
many automotive applications and also meets the low-power demands
of portable radio design. Internal voltage regulators and bias supplies
ensure stable performance despite variations in external supply voltage
(3 V to 9 V) or temperature (-20°C to +85°C).
The ULN3883A is supplied in an 18-pin dual in-line plastic package
with a copper lead frame that eliminates many decoupling problems.

FEATURES
•
It
IiII
rill
•

Dual Conversion
Wide Operating Voltage Range
High Sensitivity
Large Dynamic Range Mixer
Audio Power Amplifier OFF in Standby

APPLICATIONS

ABSOLUTE MAXIMUM RATINGS

•
•
•
•

Cordless Telephones
Scanning Receivers
Amateur Radio
Land-Mobile Service

Supply Voltage, Vee ............... 12 V
Mixer Input Voltage, Vin . . . . . . . . .. 1 Vrms
Mute Input Voltage Range,
Va ................. -0.5 V to +12 V
Package Power Dissipation, PD ..... 1.2 W
Operating Temperature Range,
T A • . . • . • . . • . • . • • • • . -20°C to +85°C
Storage Temperature Range,
Ts ................ -65°C to +150°C
Always order by complete part number:

I ULN3883A I .
6-45

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee
fd = ±3 kHz, RL = 8Q (unless otherwise specified).

=4.8 V, fin = 10.7 MHz, fm = 1 kHz,
Limits

Characteristic

Test Pin

Test Conditions

Min.

Typ.

Max.

3.0

4.8

9.0

V

3.0

6.0

mA

Units

Operating Voltage Range

5

Functional

Quiescent Current

5

Mute ON

-

Mute OFF

-

10

15

mA

Input Limiting Threshold

10

-3 dB Limit

-

5.4

8.0

~V

Detector Output Voltage

18

1.1

1.3

1.4

V

Recovered Audio

18

95

-

mV

100

170

110

-

-

>100

30

35

-

-

1.0

3.0

%

50

-

mW

Muting Attenuation

4

Audio Amplifier Gain

4

Power Amplifier THD

4

Audio Power Output

4

= 3.0 V, Vin = 1 mV
Vee = 4.8 V, Vin = 1 mV
Vee = 9.0 V, Vin = 1 mV
Vee

Mute ON

= 100 mW
Vee = 3.0 V, f = 1 kHz, THD = 10%
Vee = 3.6 V, f = 1 kHz, THD = 10%
Vee = 4.8 V, f = 1 kHz, THD = 10%
Vee = 9.0 V, f = 1 kHz, THD = 10%
Po

mV
mV
dB
dB

Mute Control Threshold

8

-

0.6

-

Quiescent Noise Amp. Volt.

7

0.9

1.6

2.2

V

45

53

-

dB

Noise Amplifier Gain

Vin = 600 ~V, f = 4 kHz

6-7

-

93

160

260

300

-

NOTE: Typical values are given for circuit design information only.

TEST CIRCUIT AND TYPICAL APPLICATION
10k

SOk

1.0

Dwg. ES-014

6-46

mW
mW
mW
V

CIRCUIT DESCRIPTION AND
APPLICATIONS INFORMATION
A test circuit and typical application (such as might be
used for a low-cost cordless telephone) is shown. The
oscillator uses a 10.245 MHz crystal to convert the first IF
signal to 455 kHz. The second IF filter consists of a tuned
transformer matched to a ceramic filter with about a 15
kHz bandwidth.
The output of the ceramic filter is matched with a 1.8

kn resistor at the input of the IF amplifier. The detector
coil is loaded with a 47 kQ resistor to give a loaded 0 of

transistors at pin 17 should have at least 100 mVrms
across them for linear detector operation. The quadrature
coil Rand C values are selected as:
C=

1400 OL _ 10 and R = 00 Xc OL
V 17
OO-OL
The detector output is an emitter with a low output
impedance of approximately 400 Q. Some of the 455 kHz
Signal appears at the output, and the circuit layout should
separate the pin 18 and pin 16 circuitry.

about 25 to produce an audio output of about 170 mVrms
with a 3 kHz peak deviation. This is more than enough to
drive the audio amplifier, so a resistor between the detector output and volume control can be added together with
a capacitor to produce a desired de-emphasis network.
Muting is accomplished by amplifying the noise present at
the detector output in the absence of a signal, rectifying it
and applying the rectified signal to the mute input. The
audio amplifier is turned OFF when the voltage at pin 8
exceeds 0.6 V. The internal noise amplifier is connected
as an active band-pass filter centered at 7 kHz. In a
telephone application, this filter could be designed to
respond to the guard tone signal being transmitted.

Pin 3 is the main circuit ground and the ground for the
audio power amplifier. The speaker ground should be
connected close to this pin. The output coupling capacitor
at pin 4 can be selected to give a desired -3 dB lowfrequency response and to reduce power consumption
by reducing the low-frequency output. The capacitor at
pin 3 serves as the bypass for the internal amplifier
feedback and also determines the response speed of the
mute circuit. Pin 1, the amplifier input, is the base of a
pnp transistor, and an external resistance of less than
50 kQ to ground is needed.

MIXER (pins 10 and 11)

NOISE AMPLIFIER/MUTE DRIVER (pins 6 and 7)

The mixer is internally biased, so that only a coupling
capacitor is needed at the input. The mixer ground is pin 9
and should be connected to the input circuit ground. Pin
10 is equivalent to 3 kQ in parallel with 20 pF. The mixer
output current is about 400 !lA and the output is equivalent
to about 100 kQ in parallel with 3 pF. Conversion
transconductance is 600 Ilmho. The mixer can be used as
an IF preamplifier, instead of a mixer, by connecting pin 12
to 13. In this configuration its transconductance is about
1.4 mmho.

The noise amplifier is an inverting amplifier with a
typical gain at 4 kHz of 53 dB. DC feedback between pins
6 and 7 is required. A low-pass, band-pass, or high-pass
filter can be built with this configuration.

OSCILLATOR (pins 12 and 13)
The oscillator is a transistor with the base connected
to pin 13 and the emitter through a 400 !lA current source
to pin 12. The stray capacitance at pin 13 is about 7 pF.

IF AMPLIFIER (pins 14, 15, and 16)
Pin 15 is the base of the first stage, and it is biased
through the 1.8 kn resistor from pin 14 but this can be
from 0 to about 10 kn for proper balance of the IF amplifier. The -3 dB frequency response of the IF amplifier is
about 1.5 MHz, and it falls off at about 6 dB per octave
above this. The -3 dB limiting sensitivity at 455 kHz is
about 131lV.

DETECTOR (pins 17 and 18)
The IF output is a 570 mVpp square wave in series
with a 10 pF capacitor to the detector input. The detector

AUDIO AMPLIFIER (pins 1, 2, 3, and 4)

In the band-pass configuration, ceramic capacitors
should not be used because of their usually low O.
Polystyrene- or polycarbonate-film capacitors are recommended. The gain of the active filter must be high enough
so that the output can be rectified to drive the mute input.
This depends on the output level of the detector, the
bandwidth of the IF filter, and the active filter frequency.
For example, an IF bandwidth of 15 kHz will result in a
detector output roll-off around 7 kHz, so the amplifier
operating frequency should not be set much higher than
this. The active filter can be used instead as a low-pass
filter in the audio circuit to improve sensitivity or to remove
unwanted tones, or as a high-pass filter to amplify tones to
be applied to tone-detector circuits. It is recommended
that impedances be kept less than 100 kn in order to
avoid the loading effects of the noise amplifier.

MUTE INPUT (pin 8)
The mute input is a 22 kQ resistor in series with the
base of a grounded emitter transistor. Thus, the mute
threshold is about 0.6 V. A capacitor from pin 8 to ground
filters the output of the rectifier circuit and should be
selected to give the desired mute characteristics for
marginal signals.
6-47

SMOKE DETECTOR
WITH INTERCONNECT AND TIMER

DETECT. IN
GUAR01
SENSmVITY
SET

OSC.CAP.

The A5348CA is a low-current, CMOS circuit providing all of the
required features for an ionization-type smoke detector. A networking
capability allows as many as 125 units to be interconnected so that if
any unit senses smoke, all units will sound an alarm. In addition,
special features are incorporated to facilitate alignment and test of the
finished smoke detector. This device is designed to comply with
Underwriters Laboratories Specification UL217.
The internal oscillator and timing circuitry keeps standby power to a
minimum by powering down the device for 1.66 seconds and sensing
smoke for only 1a ms. Every 24 on/off cycles, a check is made for low
battery condition. By substituting other types of sensors, or a switch for
the ionization detector, this very-low power device can be used in
numerous other battery-operated safety/security applications.
The A5348CA is supplied in a low-cost, 16-pin dual in-line plastic
package. It is rated for continuous operation over the temperature
range of aoc to +5aoC.

FEATURES
•
•
•
•
•
•
•
•

Interconnect Up to 125 Detectors
Piezoelectric Horn Driver
Guard Outputs for Detector Input
Pulse Testing for Low Battery .
Power-ON Reset
Internal Reverse Battery Protection
Internal Timer & Control for Reduced Sensitivity
Built-In HystereSiS Reduces False Triggering

ABSOLUTE MAXIMUM RATINGS
(Voltages are referenced to Vss)
Supply Voltage Range,
Voo ................................. -0.5 V to +15 V
Reverse Battery (10.5 V) ........................ 20 s
Input Voltage Range,
VIN ......................... -0.3 Vto Voo + 0.3 V
Input Current, liN ................................ 10 rnA
Operating Temperature Range;
T A ...................................... O°C to +50°C
Storage Temperature Range,
Ts ................................ -55°C to +125°C
CAUTION: CMOS devices have input static
protection but are susceptible to damage when
exposed to extremely high static electrical
charges.

Always order by complete part number: 1
A5348CA I.
6-48

FUNCTIONAL BLOCK DIAGRAM AND TYPICAL APPLICATION
+ SUPPLY V DD

1/0

FEEDBACK

V DD

-T
I

-'-

-=

rl

I
I
I

r------------{ 8

-'--e---'V\tv----l
.....L,...

....

11

-L

I
I

I
I

"'-~------_' 1

H~:~~-~------~

-=

LOGIC

1--------,

1----1G}----'V\tv---I-4-- +V

~

~

LED

TIMING RES.

1--------(7

--JVV\r--

+V

OSC.CAP.

OSCILLATOR
& TIMING

1-------(12

---H·------,

---1G)

I
I
I

1-1

I

DETECT. 15
16
IN II r--------II

L. ___________ -,

GUARD 1

: :

:

t~)

GUARD 2

1

TIMER
START

~

TIMER OUT

Dwg. No. FC·001 A

6-49

ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 9.0 V, Vss = 0 V, C 12 = O.lIlF,
R7 = 8.2 MQ (uuless otherwise noted).
Characteristic
Supply Voltage Range
Detector Input Current
Input Offset Voltage

Hysteresis
Common Mode Range

Limits

Test
Pin
6

Min.

Typ.

Max.

Units

Operating

6.0

9.0

12

V

oto 40% RH, V1N = 0 to 9.0 V

-

±1.0

pA

-

±100

mV

±100

mV

±50

mV

170

mV
V

Test Conditions

14-15

Active Guard

-

16-15

Active Guard

-

15-13

Detect Comparator

-

-

13

No Alarm to Alarm

90

130

Guard Amplifier

2.0

-

V DD - 0.5
VDD - 2.0

15

14-15

Smoke Comparator

0.5

-

Active Guard Impedance

14

to Vss

-

10

16

to Vss

OsciiJator Period

12

NDAlarm

13-15

Alarm
Oscillator Pulse Width

4

Timer Period

4

After Pin 1 High-to-Low, No Smoke

Low Voltage Threshold

6

TA = 0 to 50°C

Sensitivity Adj. Voltage

13

V 13/VDD' pin 13 open circuit

10-11

lOUT = 16 mA, V DD = 9.0 V

Horn Output Voltage

Horn Output ON Time

Horn Output OFF Time

10-11

10-11

Timer Start Logic Levels

1

Timer Start Input Current

1

500

kQ

-

kQ

1.34

1.67

2.00

s

32

40

48

ms

8.0

10

12

ms

8.0

10

12

min

7.2

-

48.5

-

7.8

V

50

51.5

%

0.1

0.5

V

lOUT = 16 mA, VDD = 7.2 V

-

-

0.9

V

lOUT = -16 mA, VDD = 9.0 V

8.5

8.8

-

V

lOUT = -16 mA, V DD = 7.2 V

6.3

-

-

V

Alarm

120

160

208

ms

Low Battery

8.0

10

12

ms

Alarm

60

80

104

ms

Low Battery

32

40

48

5

V1H

3.5

-

-

V

V 1L

-

-

1.5

V

V1N = 9.0 V

20

-

80

llA

NOTE 1: Negative current is defined as coming out of (sourcing) the specified device pin.
NOTE 2: Alarm (Smoke) Condition is defined as V 15 < V 13 ; No Alarm (No Smoke) Condition as V 15 > V 13'

6-50

-

V

-

Continued next page ...

ELECTRICAL CHARACTERISTICS continued

Characteristic

Test
Pin

Limits
Test Conditions

Timer Out Output Current

4

VOUT = 0.5 V

LED Output ON Current

5

Voo = 7.2 V, VOUT = 1.0 V

LED Output ON Time

5

LED Output OFF Time

5

I/O Current

2

Min.

Typ.

Max.

Units

500

-

-

IlA

10

-

-

mA

8.0

10

12

ms

No Alarm, In Standby

32

40

48

5

No Alarm, Timer Mode After Pin 1
High-to-Low

8.0

10

12

5

No Alarm, Vila = Voo - 2.0 V

25

-

60

Il A

-

mA

Alarm, Vila = V DO - 2.0 V

-7.5

I/O Alarm Voltage

2

External "Alarm" In

3.0

-

-

V

I/O Delay

2

"Alarm" Out

-

3.0

-

s

Supply Current

6

Voo = 9.0 V, No Alarm, No Loads

-

5.0

9.0

IlA

Voo = 12 V, No Alarm, No Loads

-

-

12

IlA

NOTE 1: Negative current is defined as coming out of (sourcing) the specified device pin.
NOTE 2: Alarm (Smoke) Condition is defined as V 15 < V 13 ; No Alarm (No Smoke) Condition as V 15 > V 13 .

CIRCUIT DESCRIPTION
The A5348CA is a low-current CMOS circuit providing all of the
required features for an ionization-type smoke detector.
Oscillator. An internal oscillator operates with a period of 1.67 seconds during no-smoke conditions. Every 1 .67 seconds, internal power
is applied to the entire circuit and a check is made for smoke. Every 24
clock cycles (40 seconds). the LED is pulsed and a check is made for
low battery by comparing Voo to an internal reference. Since very-low
currents are used in the device, the oscillator capacitor at pin 12 should
be a low-leakage type (PTFE, polystyrene, or polypropylene).
Detector Circuitry. When smoke is detected, the resistor divider
network that sets the sensitivity (smoke trip point) is altered to increase
the sensitivity set voltage (pin 13) by typically 130 mV with no external
connections to pins 3 or 13. This provides hysteresis and reduces
false triggering. An active guard is provided on both pins adjacent to
the detector input (pin 15). The voltage at pins 14 and 16 will be within
100 mV of the input. This will keep surface leakage currents to a
minimum and provide a method of measuring the input voltage without
loading the ionization chamber. The active guard amplifier is not power
strobed and thus provides constant protection from surface leakage
currents. The detector input has internal diode protection against static
damage.
Alarm Circuitry. If smoke is detected, the oscillator period changes to
40 ms and the horn is enabled. The horn output is typically 160 ms
ON, 80 ms OFF. During the OFF time, smoke is again checked and

6-51

inhibit further alarm output if smoke is not
sensed. During smoke conditions the low
battery alarm is inhibited and the LED is
driven at a 1 Hz rate.
Sensitivity Adjust. The detector sensitivity
to smoke is set internally by a voltage divider
connected between Voo and Vss. The sensitivity can be externally adjusted to the individual characteristics of the ionization chamber by connecting a resistor between pin 13
and VDO' or between pin 13 and Vss.
Low Battery. The low battery threshold is set
internally by a voltage divider connected
between Voo and VSS. The threshold can be
increased by connecting a resistor between
pin 3 and VDO. The threshold can be decreased by connecting a resistor between pin
3 and V s. The battery voltage level is
checked every 40 seconds during the 10 mA,
10 ms LED pulse. If an LED is not used, it
should be replaced with an equivalent resistor
(typically 500 0 to 1000 0) such that the
battery loading remains at 10 mAo
Timer. An internal timer is provided that can
be used in various configurations to allow for
a period of reduced smoke detector sensitivity
("hush"). When a high-to-Iow transition
occurs at pin 1, the internal timer is· reset, the
timer mode enabled, and the circuit reset to a
no alarm condition. The LED will flash at a 10
second rate. If the level of smoke is increased such that the reduced sensitivity level
is reached, the device will go into the alarm
condition. The timer, however, will continue
to completion of the nominal 10-114 minute
period (368 clock cycles). If the timer mode is
not used, pin 1 should be tied low.

1/0. A connection is provided at pin 2 to allow
multiple smoke detectors to be commoned. If
any single unit detects smoke (1/0 is driven
high), all connected units will sound their
associated horns after a nominal 3 second
delay. The LED is suppressed when an
alarm is signaled from an interconnected unit.
Testing. On power up, all internal counters
are reset. Internal test circuitry allows for low
battery check by holding pins 8 and 12 low
during power up, then reducing VDO and
monitoring HORN, (pin 10). All functional
tests can be accelerated by driving pin 12
with a 2 kHz square wave. The 10 ms strobe
period must be maintained for proper operation of the comparator circuitry.
6-52

TYPICAL APPLICATION

200kQ

9V

I

PUSH
TO

TEST

,,r---- --------

4

,

,,r
,
:,,
,,
,,

~

,,[
:
:,,
~

§

NOTE 2

I

L-----------------------JV\/Ir----------------------"
Owg. EC·005

NOTE 1: Use an external resistor to adjust sensitivity for a particular smoke chamber.
NOTE 2: Select resistor to reduce sensitivity during timer mode.
NOTE 3: A resistor to ground or VDO may be added to this pin to modify low battery
voltage threshold.

TIMING DIAGRAMS IN TYPICAL APPLICATION
NON· TIMER MODE
I----L;;~~~RY---

V1ScV13(SUOKE)

'""'"

CHAMBER

V1S",V13(NOSUOKE)

Dwg. WC-003

TIMER MODE
YO,
OSC.CAP

INTERNAL
CLOCK

I,"
no~\"

JlI

"

I

I
I

d

-----------------U-----U------U------U------U------U------U------U--Q--U------U-11--U------U------U------U------U------U------------------------------------------

I

00""" CY,,",'

I

0"""" OFF ,",G,

~

I

-----------------][---------------------------------------------------U----------- ----------------11------------------------------------ --U---------------------------------------------------

'(

~.o

,,,j,,","
1/

U,-NOTIF_r""_'_ _
Dwg. we-005

6-53

110 OPERATION

INTERNAL
CLOCK

HORN

.,

HORN/~OTSELFOOt.PLETING

V2IN
110

II

WHEN IN REMOTE ONLY ALARM L_ _ _ _ _ _ _ _ __

~--------LOC&A~RMMODE--------------

INTERNAL

CLOCK

HORN

HORN
ON

,,1·>---------nClOCKCYCl.£S;--------oI
V20UT
110

Ii'

Dwg. WC-004

6-54

2-FUNCTION, 4-DIGIT
LCD AUTOMOTIVE CLOCK-PROGRAMMABLE
The SCL5616HW is a 2-function digital automotive clock circuit.
Fabricated on a single monolithic chip using silicon-gate CMOS PROM
technology, it offers low cost, low power, and high reliability. It also
includes digital frequency correction, stored in the internal nonvolatile
memory, for easy adjustment of the oscillator nominal frequency.

COLON

82

P

~

f.'PB@)~1(:jj(:;0)j:iif~~j~1
ad3 ['i

c2

f3

83

b3

c

c

>

Z
0

>=

z

~

The SCL5616HW is supplied in wafer form and is rated for
continuous operation over the automotive temperature range of
-40°C to +85°C.

FEATURES
•
•
CI
•
•
•
•
•

Digital Tuning of Crystal Frequency
PROM for Storing Frequency Correction Information
12 or 24 Hour Timekeeping Option
Flashing Colon
Two Switches Control All Setting Functions
High Noise Immunity
Internal Power-Up Reset Circuitry
Internal Voltage Regulation

<.i

(/)

o

Dwg. No. pc-om

ABSOLUTE MAXIMUM RATINGS
Supply Current, 100 ........................... 2.0 mA
Input Voltage Range, VIN
(except Vpp) ............•.......... -0.3 V to VDD
(Programming
Power Voltage, Vpp ) .••..•.•..•........ 18.5 V
Input Current (except Vpp ), Ilw .......... ±10 mA
Power Dissipation, Po ..................... 300 mW
Operating Temperature Range,
TA ................................... -40°C to +85°C
Storage Temperature Range,
Ts ................................. -65°C to +150°C
Caution: These CMOS devices have static protection, but are susceptible to damage if exposed to
extremely high static electrical charges.

Always order by complete part number:

ISCL5616HW I·
6-55

TYPICAL APPUCATION

6.8kQ

4.194304 MHz
CL = 15 pF, RS= 50

D
IGNITION

VDD

BACKPLANE

+12 V
( ) - - - - - - - - t S2

SEGMENTS

~OURS
~-+-O t ) - - - - - - ;

S1

GROUNDS

Dwg. EC-OOI

6-56

ELECTRICAL CHARACTERISTICS at TA = -40°C to +85°C, in Typical Application
(unless otherwise noted).
Limits
Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

Units

Voo

TA = +25°C

4.5

-

-

V

Zener Voltage

Voo

100 = 1.0 mA

5.5

-

6.S

V

Segment Output Current

lOUT

Voo = 5.0 V, VOUT = 4.S V

-20

-

-

I!A

Voo = 5.0 V, V OUT = 0.2 V

120

-

I!A

Voo = 5.0 V, VOUT = 4.S V

-SO

-

-

I!A

VOO = 5.0 V, V OUT = 0.2 V

240

-

I!A

V oo :1:5.0 V

4.0

-

-

V

Sl,S2,DATA,orSELECT

-55

-

-700

I!A

4.194304

-

MHz

Operating Voltage Range

Backplane Output Current

LCD Drive Signal
'Input Current

lOUT

V OISP
liN

Oscillator Frequency

'osc

Oscillator Starting Time

tosc

Oscillator Stability

Mosc

Backplane Frequency

'BP

Switch Debounce Time

V DO = Zener voltage
.o.Voo = ±100 mV

-

-

200

ms

-

-

±1.0

ppM

64

-

Hz

tOB

0

-

Osc. Feedback Resistance

Rosc

-

16

-

MQ

Osc. Input Capacitance

COS CI

15

-

pF

Osc. Output Capacitance

Cosco

-

30

-

pF

-

-

1.0

mA

Supply Current

100

V oo =5.0V

62.5

ms

NOTE: Negative current is defined as coming out of (sourcing) the specified device terminal.

DISPLAY FORMAT

PM
dl

d2

d3

d4

Owg.OC·OOl

6-57

FUNCTIONAL DESCRIPTION
DATA Logic Levels are VDD and Ground
Power-Up Reset. When power up occurs, the hours and minutes
counters are reset, and the clock starts running:
Operation
12-Hour mode and counting starts from 1:00 AM
Programming Modes. Data is loaded by pulling DATA low (1 jJs pulse
duration) n times to set the desired bits for frequency correction into the
data input register. This information is latched in the RAM, thus allowing the testing of the oscillator frequency adjustment without storing the
selected pattern in the PROM cells. The data latched in the RAM is
stored in the PROM cells when DATA is held low for a minimum of 10
ms.
The data stored in the data input register is cleared on any SELECT
transition (low to high or high to low). It is also cleared when the
program power voltage (V pp) is reduced from 18 V to VDO. Clearing the
data input register does not affect the data latched in the RAM.
Program
Vpp

DATA

SELECT

Vo

Vs

18 V
18 V

Pulse
Ground

Ground

Voo

Voo

Voo
Ground

Operation
DATA load for frequency correction
DATA store
Verify stored data

FREQUENCY CORRECTION

VERIFY CYCLE (Vpp = Voo )

V,

0l~_tSLOV
~=-:---4~
XXXX>IC
>I200 mA Output Current
LSTIL-Compatible ON/OFF Control
For Sequential Power-up or Emergency Shutdown
• Internal Thermal Protection
• SOIC Surface-Mount Package

Output current rating is limited by input voltage,
duty cycle, and ambient temperature. Under
any set of conditions, do not exceed a junction
temperature of +150°C. See next page.

t

Fault conditions that produce excessive junction
temperature will activate device thermal
shutdown circuitry. These conditions can be
tolerated but should be avoided.

Always order by complete part number:
6-66

1A8181SLB I.

FUNCTIONAL BLOCK DIAGRAM
IN

OUT

IN

OUT

ENABLE

6

Dwg. FS-012

MAXIMUM ALLOWABLE OUTPUT CURRENT with device mounted on 2.24" x 2.24"
(56.9 mm x 56.9 mm) solder-coated copper-clad board in still air.
Maximum Allowable Output Current in Milliamperes with VI; 10 V,

TJ ; 150°C'

de (Duty Cycle)

TA

100%

90%

80%

70%

60%

50%

40%

30%

20%

25°C

370

415

465

530

620

745

930

1000

1000

50°C

295

330

370

425

495

595

745

995

1000

70°C

235

265

295

340

395

475

595

795

1000

85°C

190

215

240

275

320

385

485

645

970

• 10 = (TJ - T A)/([VI - Vol R.JA • dc) ; (150 - TA)/(5 • 67 • dc)
Output current rating can be increased (to 1 A maximum) by heat sinking or reducing the input voltage. With an infinite heat sink, ROJA = ROJT =
6°CIW. Conditions that produce excessive junction temperature will activate device thermal shutdown circuitry. These conditions can be tolerated
but should be avoided.

6-67

ELECTRICAL CHARACTERISTICS at TA +25°C (unless otherwise noted),
Limits
Characteristic

Symbol

Output Voltage

Va

Output Volt. Temp. Coetl.

ayO

Test Conditions

Min.

Typ.

Max.

Units

TA = 25°C, 5.5 V OS; VI OS; 10 V,
a mA OS; 10 OS; 500 mAt

4.90

5.00

5.10

V

TA = 85°C, 5.5 V OS; VI OS; 10 V,
a mA OS; 10 OS; 500 mA*t

4.85

-

5.15

V

10=

a

±100

-

Il rc

Line Regulation

~VOI~YI)

5.5 V

10 V, Output open

-

10

30

mV

Load Regulation

~VOI~IO)

a mA OS; 10 OS; 500 mAt, VI = 6 V

-

40

100

mV

Dropout Voltage

Vlmin - Va

10 = 500 mAt

-

-

300

mV

VI = 10 V, 10 = 500 mAt

-

87

120

IlA

VI = 10 V, Output open

-

86

120

IlA

laloff)

VI = 10 V, Output open, VE = 0.4 V

-

-

20

IlA

V EH

Output ON, VI = 10 V

2.4

-

-

V

VEL

Output OFF, VI = 10 V

-

-

0.4

V

VE=VI =10V

-

-

±0.1

IlA

-

165

-

°c

-

67

-

°CIW

-

6.0

-

°CIW

Quiescent Current
(GND terminal current)

ENABLE Input Voltage

10

ENABLE Input Current

IE

Thermal Shutdown Temp.

TJ

Thermal Resistance

RaJA

OS;

Typical values are given for circuit design information only.
* This parameter is tested to a lot sample plan only.

Pulse test «20 ms).

6-68

VI

OS;

Mounted on 2.24" x 2.24" solder-coated
copper-clad board in still air

ReJT

t

v

-

TYPICAL CHARACTERISTICS
LINE REGULATION

LOAD REGULATION
5.06

5.06

5.04

5.04

~V,
'~V,

(f)

>-

...J

0
>

III

5.02

~

>05.00

~

"10 V
"8V
"7V

100 mA INTERVALS

>-

...J
~

>0

W

«

5.00

W

(!l

4.98

I"---

0
>

V, "6V
V, "5.5 V

>- 4.96
a.
>-

::::I

-,.
'j

::::::

«
>-

4.98

...J

10" 500 rnA

0
>

>::::I

4.96

a.

>-

::::I

0

5.02

0
>

V,

(!l

!:i

TA" -20:C

(f)

::::I

4.94

4.92

f-----

TA " -20"C

o

100

I

0

4.94

4.92
200

400

300

500

5.0

6.0

7.0

8.0

Dwg. GP-039

Dwg. GP·040

5.06

5.06

5.04 - L 2 s 1

5.04
(f)

>...J
0
>

,9

5.00

/rr,~:

~

-

W
4.98

/

...J

0
>

>-

::::I

a.

4.96

-

0
>

-?
W

~~

4.98

--

~

,...-

~
/' f-::::

...J

0
>

>-

::::I

a.
0

4.96

-/

-

:::::=:::::: ~

~rnA

4.94

4.92
100

200

300

400

500

5.0

6.0

7.0

8.0

10

9.0

INPUT VOLTAGE, VI in VOLTS

OUTPUT CURRENT, 10 in rnA
Dwg. GP-039-1

CAUTION:

«
>-

>::::I

r

o

~IO"OrnA

5.00

(!l

4.94 - T "25 0 C
4.92

5.02

.5

V, ~6~~
V, "5.5 V

>::::I
0

>...J

, - - V, " 10V
"8V
"7V

5.02

(!l

«>-

100 mA INTERVALS

(f)

.5

10

9.0

INPUT VOLTAGE, VI in VOLTS

OUTPUT CURRENT, 10 in rnA

Dwg. GP-040-1

Maximum allowable duty cycle will be signilicantly less than 100% at high temperatures, at high input voltages, or at high output currents.
See Maximum Allowable Output Current table.

6-69

TYPICAL CHARACTERISTICS (cont'd)
LINE REGULATION

LOAD REGULATION
5_06

5.06

5.04

~
0

5.04 r - T L 6 J

TA=65°C
Ul
I-

5.02

...J

0
>

>

100 mA INTERVALS

5.02
flo=omA

.5

.5

5.00

0
>

~
0

4.96

co:

I-

4.96

>0

W

W

CJ

5.00

CJ

!:i

4.96

:::>

I-

:::>

4.96

~

Il.

Il.

I-

I-

:::>
0

:::>
D

4.94
4.92
0

-100

--

~,

I~

0
>

>

~

4.94

10 =500 mA

4.92
200

300

400

500

5.0

OUTPUT CURRENT, 10 In mA

6.0

7.0

6.0

10

9.0

INPUT VOLTAGE, VI InVOLTS
Dwg. GP·039·2

Dwg. GP·040·2

DROPOUT VOLTAGE

OUTPUT VOLTAGE vs TEMP.

0.5

0.4

~

~

§!
.5

§!

>

~

0.2

~

4.99

I-

4.96

:::>
0

-so
OUTPUT CURRENT, loin mA

o

+50

+100

AMBIENT TEMPERATURE, TA In °C
Dwg.GP-041

6-70

r-- ......

I!:
:::>

0.1

CAUTION:

-

0
>

:::>
0
Il.
0

c

5.00

W

I-

II:

lo·OmA

.5

0.3

w
CJ

~
0

V I ·6V

5.01

Dwg. GP-036

Maximum allowable duty cycle will be significantly less than 100% at high temperatures, at high input voltages, or at high output currents.
See Maximum Allowable Output Current table.

TYPICAL CHARACTERISTICS (cont'd)
QUIESCENT (GROUND TERMINAL) CURRENT
87

81


v


0

II:

/

g;
u
3



o
~

V I =6V
10= 0 rnA

....
z
w

II:

-

!:!.
u

VI -9V

w

80

u
3

....

VI _10V
86

82

....

z
~

78



70

,~

W
II:
II:

U

:E
z

,,
,,

0

II:

....z

40



!:!.

I

,

60

II:
W

e

"

~.

95%

APPROVAL RATE EXPECTED

Product Development
Objectives and Methodology
Plan, including:
Functional Specification
Preliminary Process Data
New Package Evaluation

Working Samples

Qualified Product

Detailed Designs

Production Capability

Detailed Technical Reviews
Phase' 3 Review
>95%

CYCLE TIME (ROUGH EST.):
• SIMPLE PRODUCT

2 - 4 Weeks

4 - 6 Weeks

3 - 6 Months

1 - 3 Months

• COMPLEX

8 - 12 Weeks

12 -52 Weeks

7 - 12 Months

3 - 4 Months
Dwg.OA-010

8-4

EXHffiIT3
PACE, Mini-PACE, AND ACTION PLAN BASED PROJECTS

END. DO NOT
r----,,.. DO PROJECT

PHASE 0 REVIEW BY
THE PAC, STANDARDIZED
PRODUCT PROPOSAL
SPREADSHEETS
(2)

PHASE 0
REVIEW BY
THE PAC
(5)

ACTION PLAN/SCHEDULE,
BUSINESS JUSTIFICATION,
RESOURCE REQUIREMENTS, SIGN
OFF FROM MANAGER OF EACH
FUNCTION FROM WHICH SUPPORT
IS REQUIRED (7)

UPON APPROVAL:
PACE
PROGRAM
(8)

MINI-PACE
PROGRAM
(9)

ACTION PLAN
BASED PROGRAM
(10)

PROJECT LEADER

PROGRAM
MANAGER

PROGRAM
LEADER

TEAM
LEADER

PHASE 1
REQUIREMENTS

PRODUCT DEVELOPMENT
OBJECTIVES AND
METHODOLOGY
(PHASE 1 DELIVERABLE)

SCHEDULE, SPEC AND
TRACKING SHEET AT
ABRIDGED PHASE 1

ACTION
PLAN

TEAM
REQUIREMENTS

FULL CORE TEAM

CORE TEAM

PROJECT TEAM

PROGRESS
REVIEWS

REVIEWS BY
PAC

PHASE 0, ABRIDGED PHASE 1
BY PAC, ALL
COMMENSURATE REVIEWS
BY FUNCTIONAL MANAGERS.
RETURNS TO PAC IF
TRACKING SHEET
TOLERANCES ARE VIOLATED

FUNCTIONAL
MANAGERS
MONTHLY
REPORTS

SCHEDULING

TEMPLATE-BASED
SCHEDULE;
ACTUALvs.
PLANNED REPORTING

TEMPLATE-BASED
SCHEDULE;
ACTUALvs.
PLANNED REPORTING

TEMPLATE-BASED
SCHEDULE;
ACTUAL vs.
PLANNED REPORTING
Dwg.OA-011

8-5

THE PRODUCTIPROJECT APPROVAL COMMITTEE (PAC)
This group of senior associates assesses the merits of
each program through the PACE process for its continued
business viability and strategic fit. They will focus on the
five major purposes of the phase review process:
1. The creation of a clear and consistent environment
for making decisions

3. The linkage between product strategy and product
development
4. The measurement of clear checkpoints towards the
original objective
5. The support of milestones that emphasize commitment equal to the urgency

2. The empowerment of development teams to
execute a project plan

THE DEVELOPMENT ORGANIZATION

a

The primary outcome of a Phase review is the
appointment of a program manager/leader. The program
manager/leader is chosen by the PAC and may be the
sponsor or any other appropriate person within the
organization. The PAC also allocates the necessary
resources from required functional areas to create a "core
team" and the support team necessary to complete the
project. The lead customer may also be a participant on
a development team as a member of the support team.
See Exhibit 4.

The PAC is the senior group of managers who set and
monitor the overall strategic direction of the company. The
PAC members attend all Phase Reviews, and are responsible for ensuring that products allowed into the product
development pipeline are consistent with the overall
strategic direction of the company. In addition, the PAC
must allocate the appropriate resources to each product
development effort, and make changes to these resources
as appropriate. The PAC also has the responsibility of
providing advice, guidance, and support to the Core
Teams when asked.

The roles and responsibilities of the Product Approval
Committee are to:
• Provide a clear and consistent process for
making major decisions on new products and
enhancements,

EXHIBIT 4
EXAMPLE OF A DEVELOPMENT TEAM
TYPICAL
FUNCTIONAL
TEAM

• Empower Core Teams to execute product
development efforts,
• Link product development efforts with overall
corporate strategy and communicate linkage
to organization,
• Determine disposition of product development
efforts at Phase Reviews,
• Communicate decisions within one work day of
each Phase Review,
• Serve as the gate for all new product development
efforts entering the product development pipeline,
• Make resource allocation decisions,
• Establish priorities among new product
development efforts,
• Contribute to the continuous improvement of the
Allegro PACE Process,
• Ensure that the organization adheres to the
policies and procedures set forth by the Allegro
PACE Process, and
CORE TEAM

• Support customer requirements.
8-6

• Program Manager for PACE Programs.
Program Leader for Mini-PACE Programs
Dwg.OA-012

All team members are equally responsible for assuring
the success of the program. Their roles and responsibilities are as follows:

The responsibilities of the Core Team Members are to:

The responsibilities of the Program Manager or
Program Leader are to:

• Work with Development Team members,

• Act as product champion,
• Act as team leader, builder, and motivator,
• Be responsible for monitoring overall cost and
schedule of the program,
• Be responsible for assuring that overall product
quali