1995_Burr Brown_Linear_Products 1995 Burr Brown Linear Products
User Manual: 1995_Burr-Brown_Linear_Products
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BURR-BROWN
ICDATABOOK
@
QUEST-REP,.,
MANUFACWRERS' REPRESENTATIVE
6494 Weathers Place , Suite 200
San Diego, CA 92121
(619) 622-5040 • Fax: (619) 622-5047
email :questrep@questrep.com
LINEAR PRODUCTS
E3E3
1995
Model Index
ACF2101 ............•................... 7.3
BUF600 ............................... 3.1.3
BUF601 ............................... 3.1.3
BUF634 ....•.•..•...••..•........... 3.1.18
DIV100 ........•..•...••.•.............. 7.17
INA101 ................................... 4.4
INA102 ................................. 4.10
INA103 ....................•............ 4.22
INA105 .............................•... 4.34
INA106 .............,.....•............. 4.46
INA110 ................................. 4.52
INA111 ................................. 4.63
INA114 ................................. 4.74
INA115 ................................. 4.87
INA116 ................................. 4.98
INA117 ............................... 4.100
INA118 ............................... 4.114
INA120 ..................•............ 4.125
INA131 ...............•............... 4.135
INA2128 ............................. 4.145
INA2141 .............•..•..........•. 4.147
15C3OO .•...........•....•...•.......•.... 5.4
150100 ................................. 5.15
150102 ....•..........•..•.............. 5.30
150103 •.......•.........••............. 5.45
150106 ........•.........•.............. 5.30
150107 ................................. 5.54
150113 ................................. 5.62
150120 ................................. 5.70
150121 ..................•.............. 5.70
150122 ........•.........•.............. 5.84
150130 ................................. 5.97
150150 .................•............. 5.108
150212 ............................... 5.117
IXR100 ............................... 5.128
LOG100 .......••....•...............•.. 7.28
MPY100 ............................... 7.37
MPY534 ............................... 7.49
MPY600 ............................... 7.57
MPY634 ............................... 7.69
OPA27 .................................... 2.6
OPA37 ...................•................ 2.6
OPA77 .................................. 2.19
OPA111 ................................ 2.27
OPA121 ................................ 2.39
OPA124 ................................ 2.45
OPA128 ................................ 2.53
OPA129 .................••............. 2.62
OPA131/2131/4131 .............. 2.69
OPA1n ....••.........•................ 2.19
OPA404 ................................ 2.71
OPA445 .•...•...•••..•••..••..••.... 3.2.27
OPAS01 ............................. 3.2.33
OPA502 ...............•............. 3.2.39
OPA512 ............................. 3.2.49
OPA541 ............................. 3.2.55
OPA544 ...............•............. 3.2.63
OPA600 ...............•................ 2.82
OPA602 .....•.........•...•............ 2.85
OPA603 ...............•...•............ 2.94
OPA604 .............................. 2.106
OPA606 .............................. 2.118
OPA620 .............................. 2.127
OPA621 ....•..........•....•......... 2.143
OPA622 .............................. 2.159
OPA623 ..•..•..•..................... 2.1n
OPA627 .............................. 2.193
OPA628 .............................. 2.206
OPA633 .....•....................... 3.2.70
OPA637 .............................. 2.193
OPA640 .............................. 2.221
OPA641 .............................. 2.234
OPA642 .............................. 2.247
OPA643 .....•........................ 2.262
OPA644 ...................•.......... 2.275
OPA646 .............................. 2.288
OPA648 .....•........................ 2.301
OPA650 ...............•.............. 2.312
OPA651 .............................. 2.314
OPA654 .....•........................ 2.316
OPA655 ...............•.............. 2.324
OPA658 .............................. 2.326
OPA660 ...............•.............. 2.328
OPA671 .............................. 2.346
OPA675 .............................. 2.353
OPA676 .............................. 2.353
OPA678 .............................. 2.366
OPA1013 ............................ 2.381
OPA2107 ............................ 2.390
OPA2111 ............................ 2.397
OPA2541 ........................... 3,2.78
OPA2544 ........................... 3.2.86
OPA2604 ............................ 2.410
OPA2650 ............................ 2.422
OPA2658 ............................ 2.424
OPA2662 ............................ 2.426
OPA4650 ............................ 2.445
OPA4658 ............................ 2.447
OPT101 .........................••....... 6.2
OPT202 .................................. 6.4
OPT209 .............•.................. 6.13
OPT301 ................................ 6.24
PGA102 .............................. 4.149
PGA103 .............................. 4.157
PGA202 .............•................ 4.164
PGA203 .............................. 4.164
PGA204 ..... ,........................ 4.174
PGA205 .............................. 4.174
PGA206 .............................. 4.188
PGA207 .............................. 4.188
PW5725 ................•............ 5.142
PW5726 ............•................ 5.142
PW5740 ............................. 5.148
PW5745 ~ ...........•...........•.... 5.156
PW5750 ............................. 5.166
RCV420 .............•................ 4.190
REF01 .................................... 8.3
REF02 .................................. 8.11
REF05 .................................. 8.19
REF10 ...............•.................. 8.25
REF101 ................................ 8.32
REF102 ................................ 8.41
REF200 ................................ 8.50
REF1004 .............................. 8.65
REG1117 ............................. 8.72
REG5601 ............................. 8.79
5HC615 ................................ 7.n
UAF42 .................................. 7.96
VCA61 0 .............................. 2.449
XTR101 .............................. 4.200
XTR103 .............................. 4.215
XTR104 .............................. 4.225
XTR110 .............................. 4.236
XTR501 .............................. 4.245
0804MC ............................. 3.2.94
100MS ................................ 5.1n
722 ..................................... 5.179
724 ..................................... 5.184
3554 ................................... 2.461
3583 .................................. 3.2.95
3584 ................................ 3.2.100
3650 ................................... 5.189
3652 ................................... 5.189
3656 ................................... 5.201
4127 ................................... 7.102
4302 ................................... 7.110
4341 ................................... 7.117
Model Index
ADC71 .................................... 2.3
ADC76 .................................... 2.7
ADC80AG ............................ 2.11
ADC80MAH .......................... 2.15
ADC84 .................................. 2.19
ADC85 .................................. 2.19
ADC87H ............................... 2.19
ADC574A ............................. 2.23
ADC601 ................................ 2.33
ADC603 ................................ 2.37
ADC614 ................................ 2.55
ADC674A ............................. 2.70
ADC700 ................................ 2.76
ADC701 ................................ 2.88
ADC774 .............................. 2.103
ADC803 .............................. 2.110
ADC7802 ............................ 2.113
ADS574 .............................. 2.126
ADS602 .............................. 2.139
ADS605 .............................. 2.147
ADS61 0 .............................. 2.162
ADS703 .............................. 2.166
ADS704 .............................. 2.170
ADS774 .............................. 2.174
ADS7800 ............................ 2.188
ADS7803 ............................ 2.199
ADS7804 ............................ 2.212
ADS7805 ............................ 2.222
ADS7806 ............................ 2.232
ADS7807 ............................ 2.250
ADS7808 ............................ 2.269
ADS7809 ............................ 2.279
ADS7810 ............................ 2.289
ADS7819 ............................ 2.298
ADS7833 ............................ 2.307
DAC56 .................................... 3.3
DAC80 .................................... 3.8
DAC600 ................................ 3.17
DAC601 ................................ 3.29
DAC602 ................................ 3.32
DAC650 ................................ 3.35
DAC667 ................................ 3.46
DAC700 ................................ 3.55
DAC701 ................................ 3.55
DAC702 ................................ 3.55
DAC703 ................................ 3.55
DAC707 ................................ 3.65
DAC708 ................................ 3.65
DAC709 ................................ 3.65
DAC712 ................................ 3.77
DAC713 ................................ 3.88
DAC714 ................................ 3.92
DAC725 ................................ 3.96
DAC729 .............................. 3.103
DAC811 .............................. 3.114
DAC813 .............................. 3.123
DAC1204 ............................ 3.134
DAC2813 ............................ 3.141
DAC2814 ............................ 3.150
DAC2815 ............................ 3.161
DAC4813 ............................ 3.172
DAC4814 ............................ 3.180
DAC4815 ............................ 3.192
DAC7528 ............................ 3.202
DAC7541 ............................ 3.210
DAC7545 ............................ 3.218
DAC7800 ............................ 3.225
DAC7801 ............................ 3.225
DAC7802 ............................ 3.225
DAC8043 ............................ 3.238
DDC101 ............................. 2.318
DEM-ADS605 ......................... A.4
DEM-ADS7804/05 ................. A.9
DEM-ADS7806/07 ............... A.20
DEM-ADS7808/09 ............... A.32
DEM-ADS781 0/19 ............... A.45
DEM-DAC600 ....................... A.56
DEM-DAI1710 ...................... A.64
DEM-OPA64x ..................... A.68'
DEM-PCM1702 .................... A.76
DEM-PCM1710 .................... A.82
DEM-PCM1760 .................... A.86
DF1700 ........................... 8.3.148
DF1750 ........................... 8.3.158
DF1760 ............................. 8.1.37
DSP101 .............................. 2.345
DSP102 .............................. 2.345
DSP201 .............................. 3.245
DSP202 .............................. 3.245
IS0150 ................................... 4.1
MPC100 ................................. 5.2
MPC102 ............................... 5.18
MPC104 ............................... 5.33
MPC506 ............................... 5.48
MPC507 ............................... 5.48
MPC508 ............................... 5.59
MPC509 ............................... 5.59
MPC800 ............................... 5.69
MPC801 ............................... 5.77
PCM54 .............................. 8.2.52
PCM55 .............................. 8.2.52
PCM56P ............................ 8.2.55
PCM58 .............................. 8.2.64
PCM61 .............................. 8.2.70
PCM63 .............................. 8.2.74
PCM66 .............................. 8.2.84
PCM67/69 ......................... 8.2.91
PCM78 ................................ 8.1 .3
PCM1700 ........................ 8.2.103
PCM1702 ........................ 8.2.108
PCM1710 ........................ 8.2.116
PCM1712 ........................ 8.2.125
PCM1714 ........................ 8.2.135
PCM1715 ........................ 8.2.139
PCM1750 .......................... 8.1.19
PCM1760 .......................... 8.1.37
SDM862 ............................. 2.367
SDM863 ............................. 2.367
SDM872 ............................. 2.367
SDM873 ............................. 2.367
SHC76 .................................... 6.2
SHC298 .................................. 6.7
SHC605 ................................ 6.15
SHC615 ................................ 6.30
SHC702 ................................ 2.88
SHC803 ................................ 6.49
SHC804 ................................ 6.49
SHC5320 .............................. 6.53
VFC32 .................................... 7.2
VFC100 .................................. 7.9
VFC101 ................................ 7.24
VFC110 ................................ 7.34
VFC121 ................................ 7.42
VFC320 ................................ 7.50
NOTE: (0) This product can be found in the 1995
Burr·Brown Ie Data Book-Linear Products.
For information on any of these products or to receive the Burr-Brown Data Conversion Products IC Data Book,
call our automated literature request line at 1-602-741-3884, or contact your local sales representative.
How to Use This Boole
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If you know the
PRODUCT TYPE,
Use the TABBED TABLE OF CONTENTS,
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If you want
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models released since publication of this data
- book.
If you want a PRICE,
Contact your local Burr-Brown or representative. See INSIDE BACK COVER.
If you want TAPE
& REEL. SPECS,
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Burr-Brown
Integrated Circuits
Data Boolc
Linear Products
'995
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LI-464
©1995 Burr-Brown Corporation
Printed in USA
Burr-Brown Corporation
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Street Address:
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The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility
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product for use in life support devices and/or systems.
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Table of Contents
BURR-BROWN CORPORATION
About Burr-Brown, Applications Library, Sales & Service
OPERATIONAL AMPLIFIERS
POWER OPERATIONAL AMPLIFIERS
INSTRUMENTATION AMPLIFIERS
ISOLATION PRODUCTS
OPTICAL SENSORS
SPECIAL FUNCTIONS
REFERENCES AND REGULATORS
APPENDIX A
Demonstration Board Products
APPENDIX B
Cross Reference Guide
APPENDIX C
Tape and Reel Specifications
APPENDIX D
Package Drawings (Mechanicalsj
•..
..
•..
•..
•
•
-•III
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I
Burr-Brown Corporation
..
About Burr-Brown
Burr-Brown Corporation is an internationalleaderin
the design and manufacturer of precision microcircuits and microelectronic-based systems for use in
data acquisition, signal conditioning, and control
applications throughout the world.
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Burr-Brown Receives
IS09001 Certification in U.S. and Europe
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In September 1993, Burr-Brown Corporation received IS0900 1 certification in the United States and 0
Europe, simultaneously. In the United States, regis- o
The Company's products range from precision linear tration is recognized through the AT&T Quality z
integrated circuits to data collection systems and Registrar by the Registration Accreditation Board
personal computer instrumentation. The Company's (RAB). Certification is accepted through the Elecintegrated circuit components are used in analog and tronics Industries Quality Registrar by the Dutch m
I
digital signal processing applications found in medi- Registration Board (RCV) in Europe.
cal and scientific instrumentation, factory automa- IS09001 is the international standard for assessing
tion, automatic test equipment, process control, and the quality systems of companies that design, manu- ::)
consumer products such as electronic musical instru- facture, and test products. Adopted by 91 member
ments and professional audio equipment.
countries, it's the international quality standard for
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Company Facts
• Founded in 1956.
• Corporate headquarters: Tucson, Arizona.
manufacturing, trade, and communications industries. Certification indicates that a formal quality
system exists for all processes and that these processes are audited on a timely basis.
• 1470 employees.
• 1000+ products.
• Manufacturing and technical facilities in: Tucson,
Arizona; Atsugi, Japan; Livingston, Scotland.
• 7 North American direct sales offices, 130 sales
representatives and distributors in 180+ locations.
• International sales and distribution subsidiaries in
Austria, France, Germany, Italy, Japan, the Netherlands, Switzerland, and the United Kingdom; 26
sales representatives throughout the rest of the
world.
• Over 200 sales and service staff worldwide.
BURR~BROWN®
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Applications Library
Applications Bulletins and Design Software
APPLICATIONS LIBRARY
The following applications information is available from BurrBrown at no charge.
Call 1-800-548-6132 to order.
APPLICATIONS BULLETINS
Increasing INAI17 Differential Input Range ................ AB-OOI
Make a Precision Current Source or Current Sink ...... AB-002
Voltage-Reference Filters ........................................... AB-003
Make a Precision -1 OV Reference ............................. AB-004
Make a Precision ±1 OV Reference ........................... '" AB-005
Make a-I OV to +1 OV Adjustable Precision
Voltage Source ............................................................ AB-006
Classical Op Amp or Current-Feedback Op Amp? This
Composite Op Amp Gives you the Sest
of Both Worlds ............................................................. AB-OO?
AC Coupling Instrumentation and Difference
Amplifiers .................................................................... AB-008
Single-Supply Operation of Isolation Amplifiers .......... AB-009
±200V Difference Amplifier with Common-mode
Voltage Monitor ........................................................... AB-Ol0
Low Power Supply Voltage Operation of
REF10210V Precision Voltage Reference ................. AB-011
Boost IS0120 Bandwidth to More Than 100kHz ........ AB-012
Increasing ADC603 Input Range ................................ AB-013
Input Overload Protection for the RCV420
4-20mA Current-loop Receiver ................................... AB-014
Extending the Common-mode Range of
Difference Amplifiers ................................................... AB-015
Boost Amplifier Output Swing With Simple
Modification ................................................................. AB-016
Low-pass Active Filter Design Program ...................... AB-Ol?
0-20mA Receiver Using the RCV420 .......................... AB-018
Using the ADS?800 12-Bit ADC with Unipolar
Input Signals .................... ,....................•..................... AB-019
Operational Amplifier and Instrumentation
Amplifier Macromodels ................................................ AB-020
Synchronization of IS0120/lS0121 Isolation Amplifiers AB-021
Fast Settling Low-Pass Filter ...................................... AB-022
Simple Output Filter Eliminates ISO Amp
Output Ripple and Keeps Full Bandwidth ................... AB-023
Analog Isolation with Power ........................................ AB-024
Boost Instrumentation Amp CMR with Common-Mode
Driven Supplies ........................................................... AB-025
A Low Noise, Low Distortion Design for
Anti-Aliasing and Anti-Imaging Filters ......................... AB-026
High Speed Data Conversion ..................................... AB-02?
Feedback Plots Define Op Amp AC Performance ...... AB-028
Input Filtering the INA11? ±200V Difference
Amplifier ...................................................................... AB-029
Thermal and Electrical Properties of Selected
Packaging Materials .................................................... AB-030
IC Building Blocks Form Complete Isolated
4-20mA Current-Loop Systems ................................... AB-032
Single-Supply, Low-Power Measurements
of Bridge Networks ...................................................... AB-033
MFB Low-Pass Filter Design Program ........................ AS-034
Filter Design Program for the UAF42 Universal
Active Filter ....... ,.......•................................................. AS-Q35
Diode-Based Temperature Measurement ................... AS-036
Mounting Consideration for TO-3 Package ................. AB-03?
Heat Sinking-TO-3 Thermal Model ........................... AB-038
Power Amplifier Stress and Power Handling
Limitations ................................................................... AB-039
Frequency-to-Voltage Conversion .............................. AB-040
Single Supply 4-20mA Current Loop Receiver ........... AS-041
Programmable-Gain Instrumentation Amplifiers ......... AB-042
Use Low-Impedance Bridges on 4-20mA
Current Loops ............................................................ AS-043
Improved Device Noise Performance for the
3650 Isolation Amplifier ............................................... AS-044
Op Amp Performance Analysis ................................... AS-045
Operational Amplifier Macromodels: A Comparison ... AS-046
Noise Sources in Applications Using Capacitive
Coupled Isolated Amplifiers ......................................... AS-04?
The ACF2101 Used as a Bipolar Switched Integrator .. AB-048
The MPC100 Analog Multiplexer Improves RF
Signal Distribution ....................................................... AB-049
Compensate Transimpedance Amplifiers Intuitively ... AB-050
Double the Output Current to a Load with the
Dual OPA2604 Audio Op Amp .................................... AB-051
OPA660 Drives Magnetic Recording Head ................. AS-052
Improved Noise Performance of the ACF2101·
Switched Integrator ..............................•...................... AS-053
Clamping Amplifiers Track Power Supplies ................ AS-054
Precision IA Swings Rail-to-Rail on Single 5V Supply AS-056
Comparison of Noise Performance Between a FET
Transimpedance Amplifier and a Switched Integrator
..................................................................................... AS-05?
Simple Filter Turns Square Waves into Sine Waves .. AS-058
MTTF, Failrate, Reliability and Life Testing ................. AS-059
Careful Layout Tames Sample-Hold Pedestal Errors. AS-060
Digitally Programmable, Time-Continuous
Active Filter ................................................................. AS-062
DeSign and Application of Transformer-Coupled Hybrid
Isolation Amplifier Model 3656 .................................... AS-0?8
The Key to Understanding Sources of Error in the
ISO 100 Isolation Amplifier ........................................... AS-0?9
BURR-BROWNI!I
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Or, Call Customer Service at 1·800·548·6132 (USA Only)
Applications Library
Applications Bulletins and· Design Software
Hybrid Isolation Amps Zap Prices and Voltage Barriers .. AB-080
Isolation Amps Hike Accuracy and Reliability ............. AB-093
II
CDAC Architecture Plus Resistor Divider Gives ADC574
Pinout with Sampling, Low-Power, New Input Ranges
..................................................................................... AB-178
Build A Three Phase Sine Wave Generator With
the UAF42 ................................................................... AB-096
Video Operational Amplifiers ....................................... AB-179
VOltage-to-Frequency Converters Offer Useful
Options In AID Conversion .......................................... AB-130
Diamond Transistor OPA660 ...................................... AB-181
An Error Analysis of the IS0102 in Small Signal
Measuring ................................................................... AB-161
New Ultra High-Speed Circuit Techniques
with Analog ICs ........................................................... AB-183
DC/DC Converter Noise Reduction ............................. AB-162
Designing Active Filters With The Diamond Transistor
OPA660 ....................................................................... AB-190
Partial Discharge Testing ............................................ AB-163
Ultra High-Speed ICs .................................................. AB-180
Implementation and Applications of Current
Sources and Current Receivers .................................. AB-165
Intermodulation Distortion (IMD) ................................. AB-194
Coding Schemes Used with Data Converters ............. AB-175
DESIGN SOFTWARE
FilterPro Disk .................................................... AB/E-034, 035
Spice Disk ................................................................ AB/E-020
Exchanging Files on the Customer Service
Electronic Bulletin Board ............................................. AB-176
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BURR-BROWN®
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ABOUT THIS BOOK
Technical Literature or
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contact your local salesperson or representative.
Customers outside the USA should call the nearest
sales office for details and information-see international Sales Office Listing at back of book.
To return product, please call for your RMA number. Ship units prepaid and supply the original
purchase order number and date, along with an
explanation of the malfunction. Upon receipt of the
returned devices, Burr-Brown will verify the mal-
function and inform you of the warranty s t a t u s "
cost to repair or replace, credits, and status o~
replacements where applicable.
~
~
Area Code Alert!
Beginning March 19, 1995, the area code for Ari- a:
zona will be changed from a single area code state Q.
to a dual area code state (The area code for the a:
entire state, with the exception of the Phoenix
Metropolitan area, will change from 602 to 520.). o
The phone company will provide a new number
change message until June, 1995.
o
o
z
3=
oa:
m
a:
a:
I
:l
m
BURR-BROWN®
I EI Ell
Burr-Brown Ie Data Book - Linear Products
1.11
Or, Call Customer Service at 1·800·548·6132 (USA Only)
Z Operational Amplifiers
The following selection guides include new products which combine exceptional performance with
monolithic IC reliability and economy. Many of
these products implement low noise bipolar, DifeP,
and wideband complementary bipolar processes.
The following highlights some of our newest developments:
OPA124-Low Cost, Low Noise Op Amp. Proven
DifefP technology in low cost 8-pin plastic DIP
and surface mount packages. High performance
grade offers IpA bias current and 2/lV/oC drift.
OPA129-Ultra-Low Bias Current DifefP Op
Amp. This amplifier has bias current under IOOfA
in a low cost, 8-pin plastic DIP and SOIC package.
OPA64x-Wideband Op Amps. This series offers
unity-gain bandwidths up to 1.3GHz while providing other unique features such as:
95dBc Spurious Free Dynamic Range
1.8nVlVHz Voltage Noise
55mW Power Dissipation
2500VIllS Slew Rate
0.007%/0.008° Differential GainlPhase Errors
OPA628-Low Distortion Voltage Feedback Op
Amp. This product features O.IdB gain flatness to
30MHz together with differential gain error 0.015%
max and differential phase error of 0.015° max.
OPA65x-Low Cost, Wideband Op Amps. This
high speed family of eight features both current
and voltage feedback models with unity gain stable
bandwidths up to 900MHz and input bias currents
as low as 100pA. Two models are also available i n l l
dual and quad configurations.
OPA2604-Dual PET-Input, Low Distortion Op
Amp. This low cost, dual op amp features 0.0003%
distortion and wide supply range (to ±24V).
en
OPA678-Wideband Switched-Input Op Amp.
This amplifier has two input stages which can be
switched to the output stages in 4ns.
::::i
VCA610-Wideband Voltage Controlled Amplifier. This product has a gain control range from
-40dB to +40dB and is available in an 8-pin
plastic DIP or SOIC package.
Description
Two-Channel
Voijage
Controlled Gain
Model
OPA675
OPA676
OPA678
VCA61 0
1
1
1.5
5
5
20
Open
loop
Gain
min
(dB)
35
35
50
61'}
65
65
50
14}
C.
~
..J
.,OPA27137E
PARAMETER
CONDITIONS
MIN
TYP
MAX
nDA'>7J07A,OPA27/37F
MIN
TYP
MAX
,OPA27/37G
MIN
TYP
MAX
UNITS
NOISEI"
Voltage, fo = 10Hz
fo = 30Hz
to = 1kHz
f, = 0.1Hz to 10Hz
current,'I'-:: = 10Hz
= 30Hz
= 1kHz
OFFSET VOLTAGE 121
Input Offset Voltage
Average Drift (3)
Long Term Stability I"
Supply Rejection
TAMIN
to TAMAX
±Vcc=4to 18V
±Vcc =4t018V
100
BfAS CURRENT
Input Bias Current
OFFSET CURRENT
Input Offset Current
IMPEDANCE
Common-Mode
3.1
2.9
2.7
0.07
1.7
1.0
0.4
5.5
4.5
3.8
0.18
4.0
2.3
0.6
3.5
3.1
3.0
0.08
1.7
1.0
0.4
5.5
4.5
3.8
0.18
4.0
2.3
0.6
3.8
3.3
3.2
0.09
1.7
1.0
0.4
±S
±O.2
0.2
134
±O.2
±25
±O.6
1
±SO
±1.3
1.5
±10
±12
±0.3
0.3
125
±0.6
±10
±25
±0.4
0.4
120
±1
±11
±40
±13
±55
6
35
8
50
100
V'N=±11VDC
94
2.5112.5
3112.5
VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
8.0
5.6
4.5
0.25
nV/'l'Hz
nV/~
nV/~
Open-Loop Voltage Gain
I1VP-P
;;N~
0.6
±100
±20
I1V
I1V/oC
l1V/mo
dB
I1V/V
±15
±SO
nA
10
75
nA
±1.8(6)
2.0
2112.5
GO II pF
±11
114
±12.3
128
±11
106
±12.3
125
±11
100
±12.3
122
V
dB
120
118
126
125
120
118
125
125
117
124
124
dB
dB
5
45
8
63
5
45
8
63
5(6)
8
63
MHz
MHz
Slew Rats (5)
1.7
11
1.9
11.9
25
25
1.7
11
1.9
11.9
25
25
1.7(6)
11 ,6,
1.9
11.9
25
25
Settling Time, 0.01 %
V/IlS
V/IlS
I1S
I1s
OPA27
OPA37
Vo =±10V,
RL =2kU
OPA27, G = +1
OPA37, G = +5
OPA27,G=+1
OPA37, G =+5
RL~2kU
RL~6000
Output Resistance
Short Circuit Current
±12
±10
±13.8
±12.8
70
25
±12
±10
±13.8
±12.8
70
25
±12
±10
±13.8
±12.8
70
25
V
V
0
rnA
45(6)
DC, Open Loop
RL =00
60
60
60 (6)
POWER SUPPLY
Rated Voltage
Voltage Range,
Derated Performance
Current, Quiescent
W
u:::
::i
D:i
«
..J
«
Z
0
!;:
W
D-
O
RATED OUTPUT
Voltage Output
en
IX
IX
~L~2kO
.Fl>1kU
Gain-Bandwidth Product 15'
~
0
pN~
nD"N_ nnD GAIN, DC
±15
±4
10= OmADC
±15
±22
3
±4
4.7
3
±15
±22
4.7
±4
-55
3.3
VDC
±22
5.7
VDC
rnA
+125
,,:m..-cn..TURE RANGE
-55
-25
+125
+85
-55
-25
+125
+85
-55
+125
-55
+125
-40
+85
°C
°C
°C
-55
-40
+125
+85
°C
°C
..
NOTES: (1) Measured With Industry-standard no,se test CirCUit (Figures 1 and 2). Due to errors Introduced by thiS method, these current noise speCifications should
be used for comparison purposes only. (2) Offset voltage specifications on grades A and E are also guaranteed with units fully warmed up. Grades S, C, F, and G are
measured with automatic test equipment after approximately 0.5 seconds from power turn-on. (3) Unnulled or nulled with 8kU to 20kU potentiometer. (4) Long-term
voltage offset vs time trend line does not include warm-up drift. (5) Typical specification only on plastiC package units. Slew rate varies on all units due to differing test
methods. Minimum specification applies to open-loop test. (6) This parameter guaranteed by design.
BURR-BROWN®
11511511
N
INPUT
Specification
A, B, C (J, Z)
E, F(J,Z)
G (P, U, J, Z)
Operating
J,Z
P, U
.....
M
.....
Burr-Brown Ie Data Book-Linear Products
2.7
For Immediate Assistance, Contact Your Local Salesperson
ELECTRICAL
AtVce= ±15VDC andTA =T_ to T... unless otherwise noted.
PARAMETER
CONDITIONS
OPAZT/37A,OPA'0137E
OPA27137B,OPA27137F
OPA27137C,OPA27137G
MIN
MAX
MIN
MAX
MIN
+125
+85
-55
--25
+125
+85
TYP
TYP
TYP
MAX
UNITS
-55
+125
-40
+85
°C
°C
°C
TEMPERATURE RANGE
Specification Range
A, B, C (J,Z)
E, F(J,Z)
G (P, U, J,Z)
-55
-25
INPUT
OFFSET VOLTAGE II,
Input Offset Voltage
A,B,C
E,F,G
Average Drift.'
Supply Rejection
A,B,C
E,'F,G
TAMIN
±24
±17
±0.2
to TAMAX
±Vce =4.5toI8V
tVee = 4.5 to 18V
96
97
±SO
±SO
±45
±33
±a.6
130
130
±a.3
94
96
±200
±140
±1.3
±SO
±48
±a.4
127
127
86
so 0'
±300
±220 '•
±1.8(3)
122
122
ltV
ltV
IlVioC
dB
dB
BIAS CURRENT
Input Bias Current
A,B,C
E,F,G
tl6
tl3
±SO
±SO
±22
±95
±95
±29
tl6
±21
tl50
±150 '•
nA
nA
OFFSET CURRENT
Input Oftset Current
A,B,C
E,F,G
23
12
50
50
25
14
85
85
35
20
135
135 ,3,
nA
nA
VOLTAGE RANGE
Common-Mode Input Range
A,B,C
E,F,G
Common-Mode Rejection
A,B,C
E,F,G
t10.3
±10.5
ill.5
±11.8
t10.3
±IO.5
±11.5
±11.8
±10.3
±10.5 '"
tll.5
±11.8
V
V
108
110
124
126
100
102
122
124
94
96(3)
120
122
dB
dB
116
118
121
123
114
117
120
122
110
113'"
118
120
dB
dB
tll.5
tll.7
t13.7
t13.8
25
tll.O
tll.4
±13.5
t13.6
25
±10.5
tll.O o,
±13.3
t13.4
25
V
V
mA
V,.=±IIVDC
OPEN-LOOP GAIN, DC
RL~2kIl
Open-Loop Voltage Gain
A,B,C
E, F, G
RATED OUTPUT
Voltage Oulput
A,B,C
E, F, G
RL=2kIl
Vo'; OVDC
Short Circuit Current
..
NOTES: (I) Oftset voRage specificatIons on grades A and E are also guaranteed With the umts fully warmed up. Grades B, C, F, and G are measured WIth automaUc
test equipment after approximately 0.5s from power turn-on. (2) Unnulled or nulled with 8kIlto 20kQ potentiometer. (3) This parameter guaranteed by design in P-DIP,
"Po package and SOIC "U" package.
ABSOLUTE MAXIMUM RATINGS.
Supply Voltage ............................................................,............. ±22V
Internal Power Dissipation II, ............................................... 500mW
Input Voltage .............................................................................. ±Vce
Output Short-Circuit Duration I~ ....................................... Indefinite
Differential Input Voltage'" ..................................................... ±0.7V
Differential Input Current
±25mA
Storage Temperature Range:
J, Z .................................................................... -55°C to +150°C
P, U ................................................................... -55°C to +125°C
Operating Temperature Range:
A, B, C, E, F, G (J, Z) .............:......................... -55°C to +125°C
G (P, U) ............................................................... -40°C to +85°C
Lead Temperature:
J, Z, P (soldering, lOs) ......................................................... +3OO°C
U (soldering, 3s) ................................................................... +260°C
0' ...................................................
PACKAGE TYPE
8..
UNITS
TO-99 (J)
8-Pin HermetiO DIP (Z)
8-Pin Plastic DIP (P)
8-Pin SOIC (U)
150
150
100
160
"OIW
"OIW
~CIW
'CIW
NOTES: (I) Maximum package power dissipation vs ambient temperature: (2) To
common with ±Vee = 15V. (3) The inputs are protected by back-to-back diodes.
Current limiting resistors are not used in order to achieve low noise. If diffiJrential
input voltage exceeds to.7V, the input current should be limited to 25mA.
The information provided herein Is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specilications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third partY. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andlor systems.
BURR-BROWNe
2.8
Burr-Brown Ie Data Book-Linear Products
I ElEII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
CONNECTION DIAGRAMS
Top View
J Package
P, U, Z Packages
OlfselTrim
-In
+In
-Vee
•
ORDERING INFORMATION
MODEL'"
OPA27AJ
OPA27BJ
OPA27CJ
OPA27EJ
OPA27FJ
OPA27GJ
OPA27AZ.
OPA27BZ
OPA27CZ
OPA27EZ
OPA27FZ
OPA27GZ
OPA27GP
OPA27GU(2'
PACKAGE
TEMPERATURE
RANGE (OC)
OFFSET VOLTAGE
MAX (l!V), 25°C
TO-99
T0-99
TO-99
TO-99
TO-99
TO-99
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
Plastic
SOIC
--Q5 10 +125
--Q5 10 +125
--Q5 10 +125
-2510 +85
-2510 +85
-4010+85
--Q5 to +125
--Q5 to +125
--Q5 to +125
-25 to +85
-25 to +85
-40 to +85
-4010 +85
-40 to +85
±25
±60
±100
±25
t/)
a::
w
LL
::::i
Q.
:E
±SO
±100
±25
±SO
<;;
~
en
a:
w
u:::
-5
-20
4
o
-1
6
Time From Power Turn-On (min)
+1
+2
+3
+4
:::J
D..
:::E
Time From Thermal Shock (min)
a, 0
DUT
2
10
t--
~
"~
z
4
"
lMaxlOO
f
Warning: This industry-standard equation
is inaccurate and these figures should
ba used for comparison purposes onlyl
0.2
8
~
B, F
::--A,E
2
0
0.1
10
lk
100
10
10k
100
OPEN-LOOP FREQUENCY RESPONSE
BIAS AND OFFSET CURRENT vs TEMPERATURE
140
20
20
120
"'
~
100
:E-
.ljj
..
~
80
15
~
100
lk
10k
lOOk
1M
10M
0
~
0
-75
100M
-50
-25
0
+25
+50
~100
+75
Frequency (Hz)
Ambiant Tamparatura (OC)
OPA27 CLOSED-LOOP VOLTAGE GAIN AND
PHASE SHIFT vs FREQUENCY (G = 100)
OPA37 CLOSED-LOOP VOLTAGE GAIN AND
PHASE SHIFT vs FREQUENCY (G = 100)
+125
50
50
40
30
'"
L\
~
20
C!l
10
~
C!l
-180 .c:
>
-90
:E-
~
>
a.
-10
40
iii" 30
-135
Gai!..,
.
~
if
-45
:E-
f"
.;!
5
o
10
"'
10 10
~
0
J!!
5
o
E
()
Offsat
~
«
~
~
Bias
iil
40
20
.ljj
15
(3
ill 10
OPA27~
60
A, E
~
OPA37
C!l
1
lk
Fraquancy (Hz)
Frequancy (Hz)
-225
-4S
0
:Ec:
·iii 20
f"
10
-90
:..c.
-G-5
Gain
'"
0
..
I!!
if
:E>E
.c:
-135 Ul
~
-180 .c:
a.
-10
-225
-20
-20
10
100
lk
10k
lOOk
Frequency (Hz)
1M
10M
100M
10
100
lk
10k
lOOk
1M
10M
100M
Frequancy (Hz)
BURR~BROWN®
2.12
Burr-Brown Ie Data Book-Linear Products
IElElI
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
TA "" +25°C, ±vcc = ±15VDC unless otherwise noted.
COMMON-MODE REJECTION vs FREQUENCY
140 rT"TTn-T--n;r-r-;-nrT-rTTrT"'1""TTT""T"T'T'11--rTm
:E.
I+lm:ml++pa~+-Wthwjm=Ul
~~
AJ_E:
6
100 r+~~-H~r+Hr~~~'~'~-H~r+ffi
m 120
J"
~
80
60
POWER SUPPLY REJECTION vs FREQUENCY
N
~
0
--
r+~~-H~+-+Hr~~-+---- I~-+- +ft'<.~ OPA37
--rs
~---
OPA27
__
~
~
40
~1+~-H#-+-+~~~~4#~~~~
8
20
r+~~-H~r+Hr~~-+---I-+*---I-~-r+ffi
E
r-r--
~
10
100
1k
10k
100k
1M
en
a::
w
10M
10
100
1k
Frequency (Hz)
10k
100k
1M
10M
Frequency (Hz)
u::::
:::::i
D..
:IE
Rll J2Jn --
::::~
120
f-'"
:::~ .....- r--c;:~
..... f.-
;!;l ~ aboi(
r-----
~
a:
e-
~0
~5°C
E
E
~
~ ~
..-: ~~ ~" TA=+25°CI I
I"
~:; ~:---
t-- V
t:-~
-10
±5
±10
±15
±20
Supply Voltage (Vee)
+1~5ot
U
j,J
TA =+25°C_
I I
TA =+125°C
~:--- ~
-15
o
TA =
VTA=~n
f:::
0
0
+125
~~~~Fft]l-
-~-
+125°C
,EilEiI,
+50
Ambient Temperature CC)
--
o
+25
Supply Voltage (Veol
6
±5
±10
±15
±20
Supply Voltage (Vee)
BURR~BROWN®
Burr-Brown Ie Data Book-Linear Products
0
t;:
r----
2.13
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CO NT)
T. = +25°C. ±Vcc = ±15VDC unless otherwise noted.
OPA27 SMALL SIGNAL TRANSIENT RESPONSE
+60
OPA37 SMALL SIGNAL TRANSIENT RESPONSE
+60
1\
+40
.§. +20
i
!
I
+40
;;-
S
~
+20
i%
-20
S
-20
AVCL==+1
C L = 15pF
-40
Av=+5
C L = 25pF
o
-40
\
r--60
-60
0.5
1.5
Time
2
o
2.5
Time
OPA27 LARGE SIGNAL TRANSIENT RESPONSE
I
1.0
1.2
(~s)
OPA37 LARGE SIGNAL TRANSIENT RESPONSE
\
II
~ +2
0
~
'S -2
o
-4
0.8
+15
+4
>
0.6
0.4
(~s)
+6
So
~
0.2
-
I
II
+10
\
"
E
1\
/
I
~ +5
~
\
\
AVCL = +1
i
-5
0
-10
\
/
0
/
\
II
\
+5
Av
I---15
2
4
8
10
o
12
Time(~s)
2
4
3
Time
5
(~s)
APPLICATIONS INFORMATION
OFFSET VOLTAGE ADJUSTMENT
THERMOELECTRIC POTENTIALS
The OPA27/37 offset voltage is laser-trimmed and will require no further trim for most applications. Offset voltage
drift will not be degraded when the input offset is nulled with
a 10kn trim potentiometer. Other potentiometer values from
lkn to IMQ can be used but Vos drift will be degraded by
an additional 0.1 to 0.2IlV/oC. Nulling large system offsets
by use of the offset trim adjust will degrade drift perfonnance
by approximately 3.3IlV/oC per millivolt of offset. Large
system offsets can be nulled without drift degradation by
input summing.
The OPA27/37 is laser-trimmed. to microvolt-level input
offset voltage and for very low input offset voltage drift.
The conventional offset voltage trim circuit is shown in
Figure 3. For trimming very small offsets, the higher resolution circuit shown in Figure 4 is recommended.
Careful layout and circuit design techuiques are necessary to
prevent offset and drift errors from external thermoelectric
potentials. Dissimilar metal junctions can generate small
EMFs if care is not taken to eliminate either their sources
(lead-to-PC, wiring, etc.) or their temperature difference. See
Figure II.
Short, direct mounting of the OPA27/37 with close spacing
of the input pins is highly recommended. Poor layout can
result in circuit drifts and offsets which are an order of
magnitude greater than the operational amplifier alone.
The OPA27/37 can replace 741-type operational amplifiers
by removing or modifying the trim circuit.
BURR~aROWN(!l
2.14
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
NOISE: BIPOLAR VERSUS FET
Low-noise circuit design requires careful analysis of all noise
sources. External noise sources can dominate in many cases,
so consider the effect of source resistance on overall operational amplifier noise performance. At low source impedances, the lower voltage noise of a bipolar operational
amplifier is superior, but at higher impedances the high
current noise of a bipolar amplifier becomes a serious liability. Above about J51d:! the Burr-Brown OPAllllow-noise
PET operational amplifier is recommended for lower total
noise than the OPA27 (see Figure 5).
COMPENSATION
Although internally compensated for unity-gain stability, the
OPA27 may require a small capacitor in parallel with a
feedback resistor (~) which is greater than 21d:!. This capacitor will compensate the pole generated by R, and C1N and
eliminate peaking or oscillation.
INPUT PROTECTION
Back-to-back diodes are used for input protection on the
OPA27!37. Exceeding a few hundred millivolts differential
input signal will cause current to flow and without externa. .
current limiting resistors the input will be destroyed.
Accidental static discharge as well as high current can
damage the amplifier's input circuit. Although the unit may
still be functional, important parameters such as input offset
voltage, dirft, and noise may be permanently damaged as will
any precision operational amplifier subjected to this abuse.
Transient conditions can cause feedtbrough due to the
amplifier's finite slew rate. When using the OP-27 as a unitygain buffer (follower) a feedback resistor of lid:! is recommended (see Figure 6).
±4mV Typical Trim Range
C/)
a:
w
u:
:J
D..
:i
----4'----o
0-----"-1/
6
Input
FIGURE 17. Unity-Gain Buffer.
500PF=T
I~P~6
1
Output
j3v
FIGURE 18. High Slew Rate Unity-Gain Buffer.
10~F/20V
...c-4
+15V
+
:-((---:-----~
500
Input
I
I
I
I
I
I
r'~
L _________ _
Siemens LHI 948
FIGURE 19. RF Detector and Video Amplifier.
FIGURE 20. Balanced Pyroelectric Infrared Detector.
+
1kn
6
Airpax
Magnetic
Ot-t---lr--t--+Output
Pickup
fOUT
-:-
ocRPMX N
Where N = Number of Gear Teeth
FIGURE 21. Magnetic Tachometer.
BURR·BROWNIHI
2.18
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BROWN®
OPA177
OPA77
IEaEaI
Precision
OPERATIONAL AMPLIFIER
en
a:
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FEATURES
APPLICATIONS
• LOW OFFSET VOLTAGE: 10~V max
• PRECISION INSTRUMENTATION
• LOW DRIFT: O.1~V/oC
• HIGH OPEN·LOOP GAIN: 130dB min
• LOW QUIESCENT CURRENT: 1.SmA typ
• DATA ACQUISITION
u:
::::i
D.
::::E
<
<
Z
...I
• TEST EQUIPMENT
• BRIDGE AMPLIFIER
• THERMOCOUPLE AMPLIFIER
• REPLACES INDUSTRY·STANDARD OP
AMPS: OP·07, OP·77, OP·177, AD707,
ETC.
o
~
a:
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DESCRIPTION
D.
The OPAI77 and OPA77 precision bipolar op amps
feature very low offset voltage and drift. Laser-trimmed
offset, drift and input bias current virtually eliminate
the need for costly external trimming. Their high
performance and low cost make them ideally suited to
a wide range of precision instrumentation.
The low quiescent current of the OPAl77 and OPA77
dramatically reduce warm-up drift and errors due to
thermoelectric effects in input interconnections. They
provide an effective alternative to chopper-stabilized
amplifiers. The low noise of the OPAI77 and OPA77
maintains accuracy.
OPA 177 and OPA77 performance gradeouts are available. Packaging options include 8-pin plastic DIP, 8pin ceramic DIP, and SO-8 surface-mount packages.
Vo
6
+In
3
o--'W~+-~r-'--I
-In
20--'l/\J\r--+--......- - - - I - - - - - - '
International Airport Industrial Part< • Mailing Address: PO Box 11400
Tel: (602) 746-1111 • Twx: 9111-9524111 • Cable: BBRCORP •
• Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Telex: 066-6491 • FAX: (602) 889-1510 • Immediate Product Info: (800) 548-6132
PDS-1081C
2.19
o
For Immediate Assistance, Contact Your Local Salesperson
OPA 177 SPECIFICATIONS
ELECTRICAL
At
v. = ±15V, TA = +25'C unless otherwise noted.
OPAI77E
PARAMETER
OFFSET VOLTAGE
Input Offset Voltage
Long·Term Input Offset'"
Voltage Stability
Offset Adjustment Range
Power Supply Rejection Ratio
CONDITION
Rp= 20kn
V.= ±3V to ±18V
MtN
INPUT IMPEDANCE
Input Resistance
1Hz to 100Hz'"
1Hz to 100Hz
Differential Mode'"
Common Mode
MAX
4
0.2
10
0.3
0.5
1
±1.5
85
4.5
150
26
45
200
V",= ±13V
±13
130
±14
140
OPEN-LOOP GAIN
Large-Signal Voltage Gain
RL <: 2kn
Vo= ±10V,5,
5000
12000
RL<:2kn
RL<: lkn
±13.5
±12.5
±12
±14
±13
±12.5
60
RL<: 2kn
G=+1
0.1
0.4
0.3
0.6
RL~ 10kn
Open-Loop Output Resistance
FREQUENCY RESPONSE
Slew Rate
Closed-Loop Bandwidth
Supply Current
V.= ±15V, No Load
V.- ±3V, No Load
V. = ±15V, No Load
MAX
10
0.3
25
·
110
·
20
0.1
UNITS
20
0.4
60
I'V
I'V/Mo
,
2.8
±2.8
nA
nA
·
nVrms
V
dB
2000
6000
·
··
··
VlmV
V
V
V
0
··
.
15
0.1
40
0.3
pArms
MO
GO
'.
··
··
·
mV
dB
120
115
·
··
·
··
10
0.03
MAX
18.5
·
60
4.5
2
TVP
1.5
±2
·
··
40
3.5
1.3
MIN
··
POWER SUPPLY
Power Consumption
OPAI77G
TVP
·
lt5
125
INPUT VOLTAGE RANGE
Common·Mode Input Range'"
Common·Mode Rejection
OUTPUT
Output Voltage Swing
MIN
±3
120
INPUT BIAS CURRENT
Input Offset Current
Input Bias Current
NOISE
Input Noise Voltage
Input Noise Current
OPAI77F
TVP
VII'S
MHz
·
··
mW
mW
mA
100
1.2
I'V
I'VI'C
ELECTRICAL
At V.= ±15V, -40OC s TA S +85OC, unless otherwisa noted.
OFFSET VOLTAGE
Input Offset Voltage
Average Input Offset
Voltage Drift'"
Power Supply Rejection Ratio
V.= ±3V to ±18V
120
INPUT BIAS CURRENT
Input Offset Current
Average Input Offset Current
Drift'n
Input Bias Current
Average Input Bias Current
Drift'"
INPUT VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
OPEN-LOOP GAIN
Large-Signal Voltage Gain
OUTPUT
Output Voltage Swing
POWER SUPPLY
Power Consumption
Supply Current
125
0.5
1.5
1.5
25
0.5
8
±4
25
VCM = ±13V,
±13
120
±13.5
140
RL <:2kn, Vo =±10V
2000
6000
RL<: 2kn
±12
±13
V.=±15V, No Load
V.=±15V, No Load
110
60
2
120
106
115
2.2
40
·
··
·
·
75
2.5
20
0.7
40
15
dB
4.5
85
nA
pArC
±6
60
nA
pArC
110
·
·
V
dB
1000
4000
V/mV
·
·
V
··
··
mW
mA
• Same as speciication for product to left.
NOTES: (1 ) Long-Term Input Offset Voltage Stability refers to the averaged trend line of Vos vs time over extended periods after the first 30 days of operation. Excluding
the inHial hour of operation, changes in Vo. during the first 30 operating days are typically less than 21'V. (2) Sample tested. (3) Guaranteed by design. (4) Guaranteed
by CMRR test condition. (5) To Insure high open-loop gain throughoutthe ±10Voutput range, AaL Is tested at-l0V s VoSOV, OV SVoS +10V,and-l0V SVoS +10V.
(6) OPI77EZ and OPI77FZ: TCVos is 100% tested. (7) Guaranteed by end-point limits.
2.20
Burr-Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
OPA77 SPECIFICATIONS
ELECTRICAL
At Vs = ±15V; T, = +25°C unless otherwise noted.
OPA77E
CONDITION
PARAMETER
OFFSET VOLTAGE
Input Offset Voltage
Long-Term Input Offset
Voltage Stability'"
Offset Adjustment Range
Power Supply Rejection Ratio
MIN
'"R"".
Input Noise Current
Input Noise Current Density
MAX
10
0.3
25
±3
0.7
= 20kO
Vs =±3Vto±1BV
INPUT BIAS CURRENT
Input Offset Current
Input Bias Current
NOISE
Input Noise Voltage
Input Noise Voltage Density
TYP
0.1 Hz to 10Hz.'
f= 10Hz'"
f = 100Hz'~
f = 1000Hz'~
0.1 Hz to 10Hz
f= 10Hz
f = 100Hz
f = 1000Hz
MIN
3
0.3
1.2
1.5
0.35
B.5
7.5
7.5
35
0.73
0.26
0.22
0.6
18
13
11
±2
TYP
MAX
20
0.4
60
··
·
.
0.38
··
·
··
··
Differential Input Resistance(3)
26
45
200
INPUT VOLTAGE RANGE
Common Mode Input Range
Common-Mode Rejection
OPEN-LOOP GAIN
Large-Signal Voltage Gain
±13
±14
0.1
V~=±13V
RL ~2kll. Vo = ±10V
5000
12000
RL;, 10kll
RL ;, 2kll
RL ;, 1kll
±13.5
±12.5
±12
±14
±13
±12.5
60
OUTPUT
Output Voltage Swing
Open-Loop Output Resistance
FREQUENCY RESPONSE
SlewRate
Closed-Loop Bandwidth
RL ;, 2kll
AVCL= +1
0.1
0.4
2000
··
·
0.3
0.6
POWER SUPPLY
Power Consumption
V,=±15V, No Load
V, = ±3V, No Load
50
3.5
MAX
UNITS
50
100
IlV
IlVlMo
·
·
·
TYP
· ·
· ·
·· ·
· ··
·
0.65
20
13.5
11.5
1B.5
1
MIN
2.B
±2.B
INPUT RESISTANCE
Common-mode Input Resistance
1.6
·
mV
IlVN
IlVp-p
nVl,fHz
nVl,fHz
nVl,fHz
pAp-p
pAl,fHz
-~~
MO
GO
·
V
IlVN
·
6000
VimV
···
V
V
V
Q
VillS
MHz
·
·
mW
mW
ELECTRICAL
,-
,-
At V, = ±15V, -25°C <
- T < +85°C for OPA77EZ and OPA77FZ, O°C ~ T < +70°C for OPA77FP and OPA77GP, unless otherwise noted.
OFFSET VOLTAGE
Input Offset Voltage
Average Input Offse~"
Voltage Drift
Power Supply Rejection Ratio
ZPackage
P Package
ZPackage
P Package
V, = ±3V to ±1.8V
INPUT BIAS CURRENT
Input Offset Current
Avg Input Offset Current Drift'"
Input Bias Current
Avg Input Bias Current Drift's,
INPUT VOLTAGE RANGE
Common Mode Input Range
Common-Mode Rejection
OPEN-LOOP GAIN
large-Signal Voltage Gain
±13
V",=±13V
10
10
0.1
0.3
1
45
55
0.3
0.6
3
0.5
1.5
2.4
8
2.2
40
±4
40
±13.5
0.1
1
RL ~ 2kll, Vo ~ ±10V
2000
6000
RL ~ 2kll
±12
±13
OUTPUT
Output Voltage Swing
20
20
0.2
0.4
·
·
15
100
100
0.6
1
5
80
150
0.7
1.2
·
4.5
85
··
·
±6
60
·
··
1000
4000
·
·
·
3
IlV
IlV
Ilvrc
Ilvrc
IlVN
nA
pArC
nA
pArC
V
IlV/V
VlmV
·
V
POWER SUPPLY
Power Consumption
Vs
=±15V, No Load
60
75
mW
• Same as specification for product to left. NOTES: (1 ) Long-Term Input Offset Voltage Stability refers to the averaged trend line of Vos vs time over extended period
after the first 3.0 days of operation. Excluding the initial hour of operation, changes in Vos during the first 30 operating days are typically 2.5IlV. (2) Sample tested. (3)
Guaranteed by design. (4) OPA77E: TCVes is 100% tested on Z package. (5) Guaranteed by end-point limits.
BURR-BROVVNQlI
I ElEII
Burr-Brown Ie Data Book-Linear Products
i':
......
,...
~
0
nA
nA
·
· .
60
4.5
......
......
OPA77G
OPA77F
2.21
en
a:
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~
:IE
1--
o
w
c.
-1
o
-2
2.5 r---t--:-:-'"'"":~""I"'~=f==*=;::;:::J
V. = ±5V
0'--_-'-_ _........_ - ' -_ _"--_-'-_---'
12
6
24
18
36
30
15
lOUT (mA)
OFFSET VOLTAGE CHANGE
DUE TO THERMAL SHOCK
~
30
J§!.
25
15
10
o
45
60
75
90
105
120
CLOSED-LOOP RESPONSE vs FREQUENCY
100
Device Immerse~ in 700 C Inert liquid
/
20
30
Time from Power Supply Turn-On (s)
l
~ c~ramic diP
,---- fL=.
I
/
\
Ir
1/
o
~
i\. Plas)iC DIP
10
20
30
--
m
:Ec:
80
60
'ij
(OJ
'r--
a. 40
0
.
__._--
40
50
,.,
'~
0
..J
"
lOOk
INPUT BIAS AND INPUT OFFSET CURRENT
vs TEMPERATURE
POWER SUPPLY REJECTION
vs FREQUENCY
0.1
10k
Frequency (Hz)
Frequency (Hz)
RSI Rs,= 200kO
Thermal noise of
w
g
source resistors
t--.
included.
100
1
j
~
z
¥i
~
~
II: 0.1
10
t-....
=
~
..5
0.Q1
100
lk
10k
Bandwidth (Hz)
lOOk
10
100
lk
10k
Frequency (Hz)
BURR-BROWNilI
2.24
Burr-Brown Ie Data Book-Linear Products
I E!lE!II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25°C, Vs =±15V unless otherwise noted.
MAXIMUM OUTPUT SWING vs FREQUENCY
32
~
Q)
"C
f-- --..---
28
--
24
f---I--
0(
16
0..
12
III
8
~
Q)
L~111
--
RL = 2k.Q
\
=!E 20
~
Q)
.
-
POWER CONSUMPTION vs POWER SUPPLY
100
e--- ---
c--- i--
~
.§.
..
i"
§
-
i!!0
10
(.)
--
0..
4
I
_...
K "'r---
0..
C/)
0
lk
10k
100k
10
1M
Frequency (Hz)
20
30
40
Total Supply Voltage (V)
a::
w
iL
~
Q.
:E
40 r---r---r---r---r---r---r---r--,
~
5
a.
5
0 10
E
::J
--E
.~
::;
-e-
--
15
5 ----
1
-
i
Output
-N~9~;ive-- f-
----~
-I--
-
--
------ --i-------f---r---r-
~
~
-
I---
~ 30
Output
;; I
---
---- ----
35
- ----- ----------- ------ ------1---25
rn
-
'5 20
~
------~-+_+_~+l+H--~--j-----
... Isc+ ....
~--dIsc-
-
---
r - -r------- - - - -
------- -------
O'--_-'--'--'--J...J....L..J....U--_-'---I.--I.....J....J-'-J..J.J
100
lk
10k
Load Resistance to Ground (0)
t<:1'\
\lY
o
2
3
4
Time from Output Being Shorted (min)
ELECTROSTATIC
DISCHARGE SENSITIVITY
Any integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. ESD can cause damage ranging
from subtle performance degradation to complete device
failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes
could cause the device not to meet published specifications.
Burr-Brown's standard ESD test method consists of five
IOOOV positive and negative discharges (lOOpF in series
with 1.5kQ) applied to each pin.
Failure to observe proper handling procedures could result
in small changes to the OPAl 77's input bias current.
BURR-BRQWN®
I~~I Burr-Brown Ie Data Book-Linear Products
w
Q.
o
---
1---------- --------
«
«
Z
o
~
a::
..J
OUTPUT SHORT-CIRCUIT CURRENT vs TIME
MAXIMUM OUTPUT VOLTAGE vs LOAD RESISTANCE
2.25
For Immediate Assistance, Contact Your Local Salesperson
APPLICATIONS INFORMATION
The OPA177 is unity-gain stable, making it easy to use and
free from oscillations in the widest range of circuitry. Applications with noisy or high impedance power supply lines
may require decoupling capacitors close to the device pins.
In most cases O.11JF ceramic capacitors are adequate.
The OPA177 has very low offset voltage and drift. To
achieve highest performance, circuit layout and mechanical
conditions must be optimized. Offset voltage and drift can
be degraded by small thermoelectric potentials at the op amp
inputs. Connections of dissimilar metals will generate thermal potential which can mask the ultimate performance of
the OPAI77. These thermal potentials can be made to cancel
by assuring that they are equal in both input terminals.
1. Keep connections made to the two input terminals close
together.
2. Locate heat sources as far as possible from the critical
input circuitry.
3. Shield the op amp and input circuitry from air currents
such as cooling fans.
OFFSET VOLTAGE ADJUSTMENT
The OPA177 and OPA77 have been laser-trimmed for low
offset voltage and drift so most circuits will not require
external adjustment. Figure 1 shows the optional connection
of an external potentiometer to adjust offset voltage. This
adjustment should not be used to compensate for offsets
created elsewhere in a system since this can introduce
excessive temperature drift.
INPUT PROTECTION
The inputs of the OPA177 and OPA77 are protected with
5000 series input resistors and diode clamps as shown in the
simplified circuit diagram. The inputs can withstand ±30V
differential inputs without damage. The protection diodes
will, of course, conduct current when the inputs are overdriven. This may disturb the slewing behavior of unity-gain
follower applications, but will not damage the op amp.
-
1
Conventional op amp wnh
external bias current
cancellation resistor.
8
V,N
yOPAI77'>-----oVoUT
0-_ _---'3, +
+
Trim Range is approximately ±3.0mV
FIGURE 1. Optional Offset Nulling Circuit.
NOISE PERFORMANCE
The noise performance of the OPA177 and OPA77 is optimized for circuit impedances in the range of 2W to 50kO.
Total noise in an application is a combination of the op
amp's input voltage noise and input bias current noise
reacting with circuit impedances. For applications with higher
source impedance, the OPA627 PET-input op amp will
generally provide lower noise. For very low impedance
applications, the OPA27 will provide lower noise.
INPUT BIAS CURRENT CANCELLATION
The input stage base current of the OPA177 is internally
compensated with an equal and opposite cancellation current. The resulting input bias current is the difference between the input stage base current and the cancellation
current. This residual input bias current can be positive or
negative.
When the bias current is cancelled in this manner, the input
bias current and input offset current are approximately the
same magnitude. As a result, it is not necessary to balance
the DC resistance seen at the two input terminals (Figure 2).
A resistor added to balance the input resistances may actually increase offset and noise.
,
(8)
~
i> 20k.Q
2 -,
0-----'-1
No bias current
cancellation resistor needed
(b)
OPAl 77 wnh no external
bias current cancellation
resistor.
FIGURE 2. Input Bias Current Cancellation.
BURR·BROWN®
2.26
Burr-Brown Ie Data Book-Linear Products
lEa Ea I
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BRQWN@
OPA111
IE:lE:lI
'I""
'I""
'I""
~
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Low Noise Precision Difet®
OPERATIONAL AMPLIFIER
en
a::
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u:::
FEATURES
APPLICATIONS
:::i
Q.
:E
• LOW NOISE: 100% Tested, 8nVftiZ max
(10kHz)
• PRECISION INSTRUMENTATION
...J
• LOW BIAS CURRENT: 1pA max
• TEST EQUIPMENT
o
• OPTOELECTRONICS
• MEDICAL EQUIPMENT-CAT SCANNER
!;;:
Y'N> -Vcc-6V. See Figure 2. (3) Short
circuit may be to power supply common only. Rating applies to +2S·C
-Vee
ambient. Observe dissipation limit and TJ .
PACKAGE INFORMATION(1)
MODEL
OPAlllAM
OPAlllBM
OPAlllSM
PACKAGE
PACKAGE DRAWING
NUMBER
T0-99
TO-99
TO-99
001
001
001
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
ORDERING INFORMATION
MODEL
OPAlllAM
OPAlllBM
OPAlllSM
PACKAGE
TEMPERATURE
RANGE
TO-99
TO-99
T0-99
-2S"C to +8S·C
-2S·C to +8S·C
-
~
BM
r-..
BM
AM,SM
I'
10
III
0.1
10
100
lk
Frequency (Hz)
10k
lOOk
1M
10
100
lk
10k
lOOk
1M
Frequency (Hz)
BURR~BROWN®
2.30
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
T. = +25°C, Vee = ±15VDC unless otherwise noted,
lk
,...
,...
,...
100
o
TOTAL" INPUT VOLTAGE NOISE SPECTRAL
DENSITY vs SOURCE RESISTANCE
lk
f.s
po;;-
-- .-
N~
-
R~I~11Jal
BM
10
.. ':1'-:. c-=' c.
1..
-
F.·
F·
*Includes contribution
--
---!rR ri~9i-~ifsrnref
0.1
10
9=
§;-
...
-
~
2-
Rs = 100ka
.-
-
.r-. "
-
g
f- Rs = 10Ma
_",,-,,",
_.
~
-_..
-.
-F.,,-
r-
100
.m
j
-- -
TOTAL" INPUT VOLTAGE NOISE (PEAK-TO-PEAK)
vs SOURCE RESISTANCE
j
~R~11UJ
j
10
g
--
.-
t1111
en
a:
1 .
11111-1
100
lk
10k
lOOk
Frequency (Hz)
w
u::
10'
10'
Source Resistance (a)
:J
D..
:E
@'
~
.s
-~
III
z
'is
z
E
"
I>
0.1
~
0
-50
-25
0
25
50
75
100
h
.... -
E
[g
BM
10
-- ~ ~:
=_.
~
,----
--50
~7"
-
-25
Temperature (OC)
10
i
o
~
~
0.1
/" . /
0.01
~a:
__ . - c""
----
-I='C-:= .
:/'V./
0.1
.
ti
100
..
./
--=--=--==- --
<3
0.01
125
:-- ..7' i/-
::'=
-'-
4
-75
_
-~
100
~
z
o
lk
~.
10
40
0
15
10
GAIN-BANDWIDTH AND SLEW RATE
vs TEMPERATURE
4
4
--45
i
iD 100
80
5
0
OPEN-LOOP FREQUENCY RESPONSE
120
.~
el
-5
Common-Mode Voltage (V)
140
a
-10
Frequency (Hz)
--BO
Gain
!JI J
20
~'"
\;
II
0
100
I. '"
'"
J
D-
Ln-...
--tJ
e.
2
r- f--
0::
0::
2
"
1ii
a:
j
el
1k
10k
100k
1M
o
o
-180
10M
-75
-50
-25
25
100
125
OPEN-LOOP GAIN vs TEMPERATURE
-
130
-
2
"'~
"
II:
1ii
~
'"
0
Supply Voitage (±Vccl
75
140
3
10
50
Ambient Temperature (OC)
GAIN-BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
5
-
'0;
Frequency (Hz)
L
~
~
III 1"'-
ill
10
-135
III J LI
3
6
~
~
Phase
Margin
= 65°
¥
f!!
Ii!'
15
20
iD
a
0::
~
120
j
~
-
r--
~
- ---
1Hl
100
-75
-50
-25
25
50
75
100
125
Ambient Temperature (0G)
BURR~BROWN@
2.32
Burr-Brown Ie Data Book-Linear Products
I EJ EJ I
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
T, =+25"(;, Vee =±15VDC unless olherwise noled.
,...
MAXIMUM UNDISTORTED OUTPUT
VOLTAGEvsFREQUENCY
30
~-
15
- - ------
f--- -
10
IG
-
-~
..
f
_- I--
>
-
-~
.
.. _----
-I--
i
-- I -
--
I-
20
"
-
I-
10
."'-. ....... 1- -. .
-15
lOOk
1M
--
~
o
-.-
--
\
\. -.
\
en
a:
w
u:::
----
.
-10
0
10k
fII
.-
-
lk
\~
II
---
0
,...
,...
LARGE SIGNAL TRANSIENT RESPONSE
o
10
20
Frequency (Hz)
30
Time
40
:::i
50
Q.
(~s)
::a:
40
0
--
-40
0.01%
!
\
a:
I
V
..:,
" 60
E
-20
!;i
/1
"'
~-
CD
i
Z
o
I
/ II
--.
s:-
----+-~-o Output
5kil
25kil
Differential Amplifier •
+In
------'--------_.
1
0----'''-1
-=-
Differential Vo~age Gain
= 1 + 2RF/RG
FIGURE 17. FET Input Instrumentation Amplifier.
=10pF
10kO
6
Input
0-----1
Output
Droop = 1OO~V/s
'Reverse polarity for
negative peak detection.
FIGURE 18. Low-Droop Positive Peak Detector.
BURR-BROWNe
2.38
Burr-BrownIe Data Book-Linear Products
I EBEB I
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BURR-BROWN®
OPA121
IE5IE5II
,..
N
,..
~
o
Low Cost Precision Difet®
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
• LOW NOISE: 6nVNHi typ at 10kHz
• OPTOELECTRONICS
• LOW BIAS CURRENT: SpA max
• DATA ACQUISITION
• LOW OFFSET: 2mV max
• TEST EQUIPMENT
• LOW DRIFT: 3J.lVf'C typ
• MEDICAL EQUIPMENT
• HIGH OPEN·LOOP GAIN: HOdB min
• RADIATION HARD EQUIPMENT
C/)
a:
w
u::
::::i
a..
:IE
«
-I
«
z
o
~
a:
• HIGH COMMON·MODE
REJECTION: 86dB min
w
a..
o
DESCRIPTION
The OPA121 is a precision monolithic dielectricallyisolated FET (Difet®) operational amplifier. Outstanding performance characteristics are now available for low-cost applications.
Case (TO·99) and Substrate
~
r-----------~--~7
Noise, bias current, voltage offset, drift, open-loop
gain, common-mode rejection, and power supply
rejection are superior to BIFET® amplifiers.
Very low bias current is obtained by dielectric
isolation with on-chip guarding.
Laser-trimming of thin-film resistors gives very low
offset and drift. Extremely low noise is achieved with
new circuit design techniques (patented). A new
cascode design allows high precision input specifications and reduced susceptibility to flicker noise.
Standard 741 pin configuration allows upgrading of
existing designs to higher performance levels.
'-----......- - - -......--14
-Vee
*Patented
OPA121 Simplified Circuit
OiteP. Burr-Brown Corp.
BIFE'f«', National Semiconductor Corp.
• Mailing Address: PO Box 11400 • Tucson, AZ 8S734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
• Twx: 91Q.952·1111 • Cable:BBRCORP • Telex:06~491 • FAX: (602) 889-1510 • Immediate Product Info: (800)546-6132
International Airporllnduslrial Part<
Tel: (602)746-1111
PDS·539F
2.39
For Immediate Assistance, Contact Your Local SalesperSon
SPECIFICATIONS
ELECTRICAL
At vCC = ±15VDC and TA= +25°C unless otherwise noted Pin 8 connected to ground
OPA121KP, KU
OPA121KM
PARAMETER
INPUT
NOISE
Voltage, fo = 10Hz
fo= 100Hz
fo= 1kHz
fo = 10kHz
f,= 10Hz to 10kHz
,f.=O.IHzto 10 Hz
Current, f,= O.IHz to 10Hz
fo = 0.1 Hz thru 20kHz
OFFSET VOLTAGE'"
Input Offset Voltage
Average Drift
Supply Rejection
BIAS CURRENT'"
Input Bias Current
OFFSET CURRENT'"
Input Offset Currant
CONDITIONS
MIN
TYP
(1)
40
(1)
15
8
6
0.7
1.6
15
0.8
(1)
(1)
(1)
(1)
(1)
(1)
MAX
,.'
50
18
10
7
9. 8
2
21
1.1
. UNITS
nVl.,ffZ
nVl>'HZ
nVl>'HZ
nVl>'HZ
IlVrm S
IlVp-p
fA, p.p
fAl>'HZ
±3
±3
±10
±5O
104
±6
±5O
mV
IlV/o C
dB
IlVN
±5
±1
±10
pA
±4
±0.7
±6
pA
±2
±10
104
±6.
VCM = OVDC
Device Operating
±1
VOM ; OVDC
Device Operating
±0.7
86
MAX
±0.5
±3
±D.5
VOM =OVDC .
TA=TM~toT"""
TV!'
MIN
86
',::
:
IMPEDANCE
Differential
10"111
10"113
Common-Mode
VOTAGE RANGE
Common-Mode Input Range
Common·Mode Rejection
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
FREQUENCY RESPONSE
Unity Gain, Small Signal
Full Power Response
Slew Rate
Settling Time, 0.1 %
0.01%
Overload Recovery,
50% Ove
"
100
.s
.!!l0
KP,KU
100
r=== =K
~
LL
10
E
10
z
1"
"'-t--
K
10
u"
~
./ ./
0.1
0.1
0.01 V /
10
100
Ik
10k
Frequency (Hz)
lOOk
1M
-60
0.01
-25
10
~
V
rrent
E
~
140
~
E
urn
~
"
u"
U
!Q
K
0.1
iXi
0.1
-10
~
H+H+--HH-H-++++l-H+H---1-+H+-i-+++I-+-1+H
100
1=!=!=FF!==!=9P=#l-...l::-Hli-I-++I++++I+-1-+W-+1-Hl
180
a:
J
~
~
+10
60
40
20
o
10
+15
100
~
10k
lOOk
1M
10M
OPEN·LooP FREQUENCY RESPONSE
140
KM
~ 120
,~
Ik
Frequency (Hz)
K
~
+125
120
140
~
+100
l5
COMMON·MODE REJECTION
vs FREQUENCY
J
+75
"""""""""'''''TTr-r-rm.,...,...,.rr;.,.",...,.,..",.-r-TMI
Common·Mode Voltage (V)
l5
+50
~
0.Q1
0.01
-15
+25
POWER SUPPLY REJECTION
vsFREQUENCY
BIAS AND OFFSET CURRENT
vs INPUT COMMON·MODE VOLTAGE
BI
a
Ambient Temperature (·C)
10
-45
120
Gain
in 100
:E.
100
80
c:
80
1
60
'0;
(!l
CD
60
~
40
20
0
Phase_
Margin_I\;·
-65·
40
20
III
III
a
10
100
Ik
10k
Frequency (Hz)
lOOk
1M
10M
1
10
100
Ik
10k
lOOk
1M
-180
10M
Fraquency (Hz)
BURR-BROWN®
2.42
E
u"
./
~
!
~
~
~
~
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CO NT)
T, = +25°C, Vee =±15VDC unless otherwise noted.
LARGE SIGNAL TRANSIENT RESPONSE
,...
,...
~
SMALL SIGNAL TRANSIENT RESPONSE
+80
('II
+15
:>
~
+40
.§.
..,"~
0
l>"
g
s
~
%
0
0
+40
-15
+80
25
2
0
50
3
4
5
-en
a:
W
u:::
Time(~s)
Time(~s)
::::i
:!
Il.
------,
8
The OPAl24 is a precision monolithic PET operational amplifier using a Difet (dielectrical isolation)
manufacturing process. Outstanding DC and AC performance characteristics allow its use in the most
critical instrumentation applications.
Bias current, noise, voltage offset, drift, open-loop
gain, common-mode rejection and power supply rejection are superior to BlFET and CMOS amplifiers.
Difet fabrication achieves extremely low input bias
currents without compromising input voltage noise
performance. Low input bias current is maintained
over a wide input common-mode voltage range with
unique cascode circuitry. This cascode design also
allows high precision input specifications and reduced
susceptibility to flicker noise. Laser trimming of thinfilm resistors gives very low offset and drift.
Compared to the popular OPAl II, the OPA124 gives
comparable performance and is available in an 8-pin
PDIP and 8-pin SOlC package.
-In
+In
3
Trim(1)
IOkn
Trim(1)
IOkn
5
2kn
2kn
2kn
2kn
OPAl 24 Simplified Circuil
-Vee
4
NOTES: (I) Omitted on SOIC. (2) Patented.
BIFE'f® National Semiconductor Corp.,
Dlfe,. Burr-Brown Corp.
Inlernational Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602)746-1111 • Twx: 9111-952·1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (602) 889-1510 • Immediate Product Info: (SOO) 548-6132
PDS-1203B
2.45
For Immediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
At Vco = ±15VDC and TA = +25°C unless otherwise noted.
OPAl 24U1P
PARAMETER
CONDITION
MIN
INPUT NOISE
Voltage, fa = 10Hz'"
to = 100Hz(4)
to = 1kHz(4)
fa = IOkHz,5,
fe = 10Hz to 10kHz'"
fe = O.IHz to 10Hz
Current, fe = O.IHz to 10Hz
fa = 0.1 Hz thru 20kHz
OFFSET VOLTAGE'\(
Input Offset Voltage
VOM =OVDC
OPAl 24UAlPA
TYP
MAX
40
15
8
6
0.7
1.6
9.5
0.5
MIN
OPA124UB/PB
TYP
MAX
80
40
15
8
1.2
3.3
15
0.8
40
15
8
6
0.7
1.6
9.5
0.5
±200
±4
110
lao
±BOO
±7.5
±150
MIN
TYP
MAX
UNITS
80
40
15
8
1.2
3.3
15
0.8
40
15
8
6
0.7
1.6
9.5
0.5
BO
40
15
8
1.2
3.3
15
0.8
nVl'i'Hz
nVl'i'Hz
nVl'i'Hz
nVl'i'Hz
±500
±4
±IOO
±I
110
100
±250
±2
~V
~Vf'C
~Vrms
~Vt>-p
fAP-p
fAJ'i'Hz
vs Temperature
Supply Rejection
vs Temperature
Vcc ';±IOVlo±18V
TA =TMIN to T MAX
BIAS CURRENT'"
Input Bias Current
VOM = OVDC
±I
±5
±0.5
±2
±O.35
±I
pA
OFFSET CURRENT'"
Input Offset Current
VOM = OVDC
±I
±5
±0.5
±I
±O.25
±0.5
pA
TA
=:
TMIN
to
TMAX
88
B4
IMPEDANCE
Differential
Common-Mode
VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
vs Temperature
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
FREQUENCY RESPONSE
Unity Gain, Small Signal
Full Power Response
Slew Rate
THD
Settling Time, 0.1 %
0.01%
Overload Recovery,
50% Overdrive(2)
RATED OUTPUT
Vo~age Output
Current Output
Output Resistance
Load Capacitance Stability
Short Circuit Current
POWER SUPPLY
Rated Voltage
Voltage Range, Derated
Current, Quiescent
TEMPERATURE RANGE
Specification
Storage
6Junction-Ambient: PDIP
SOIC
±2
90
86
10"111
10" 113
110
100
100
90
10"111
10" 113
dB
dB
10"111
10"113
QllpF
QllpF
V,N=±IOVDC
TA=TMINtoTMAX
±IO
92
86
±II
110
100
±IO
94
86
±II
110
100
±IO
100
90
±II
110
100
V
dB
dB
RL,,2kn
106
125
106
125
120
125
dB
20Vp-p, RL = 2kn
Vo=±IOV, RL =2kn
16
I
Gain = -I, RL = 2kn
10VStep
1.5
32
1.6
0.0003
6
10
Gain =-1
5
RL =2kn
Va = ±IOVDC
DC, Open Loop
Gain =+1
±II
±5.5
10
16
I
±II
±5.5
10
2.5
TMIN and T MAX
-25
-65
90
100
±12
±IO
100
1000
40
±II
±5.5
10
±15
±15
10= OmADC
16
I
5
±12
±IO
100
1000
40
±5
1.5
32
1.6
0.0003
6
10
±18
3.5
±5
+85
+125
-25
-65
2.5
90
100
1.5
32
1.6
0.0003
6
10
MHz
kHz
V/~
%'
~
~
5
~
±12
±IO
100
1000
40
V
mA
Q
pF
mA
±15
±18
3.5
±5
+85
+125
-25
-65
2.5
90
100
±18
3.5
VDC
VDC
mA
+85
+125
°C
°C
°cm
°cm
NOTES: (I) Offset voltage, offset current, and bias current are measured with the units fully warmed up. For performance at other temperatures see Typical PEirformance
Curves. (2) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive.
(3) For performance at other temperatures see Typical Performance Curves. (4) Sample tested, 98% confidence. (5) Guaranteed by design.
2.46
Burr-Brown Ie Data Book-Linear Products
BURR-ElROWi(!l
I ElEiiI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
CONNECTION DIAGRAMS
Top View
DIP
OIIseITrim
8
SOIC
Top View
Substrate
-In
Output
+In
-Vs
5
4
Offset Trim
NC = No Connect
ABSOLUTE MAXIMUM RATINGS
PACKAGE INFORMATION(1)
Supply ........................................................................................... ±18VDC
Internal Power Dissipation(1) ......•.•..•..............•.•..•...............•.•.•..•... 750mW
Differential Input Vottage12' ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• ±36VDC
Input Voltage Range'................................................................... ±18VDC
Storage Temperature Range .......................................... -65°C to +150°C
Operating Temperature Range ....................................... -40°C to +125°C
Lead Temperature (soldering, 10s) ................................................ +300°C
Output Short Circuit Duration(3) ............................................... Continuous
Junction Temperature .................................................................... +175°C
NOTES: (1) Packages must be derated based on 8" =90°CIW for PDIP and
1OO°CIW for SOIC. (2) For supply voltages less than ±18VDC, the absolute
maximum input voltage is equal to +18V > Y'N > -Vcc - 6V. See Figure 2. (3)
Short circuit may be to power supply common only. Rating applies to +25°C
ambient. Observe dissipation limit and TJ •
PACKAGE DRAWING
MODEL
OPA124U
OPA124P
OPA124UA
OPA124PA
OPA124UB
OPA124PB
PACKAGE
NUMBER
8-Pin SOIC
8-Pin Plastic DIP
8-Pin SOIC
8-Pin Plastic DIP
8-Pln SOIC
8-Pin Plastic DIP
182
006
182
006
182
006
w
u::
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
OPA124U
OPA124P
OPA124UA
OPA124PA
OPA124UB
OPA124PB
PACKAGE
TEMPERATURE
RANGE
8-PINSOIC
-25°C TO +85°C
8-Pin Plastic DIP -25°C to +85°C
8-Pin SOIC
-25°C to +85°C
8-Pin Plastic DIP -25°C to +65°C
8-Pin SOIC
-25°C to +85°C
8-Pin Plastic DIP -25°C to +85°C
::J
c.
:E
c(
...J
c(
Z
o
fi
ORDERING INFORMATION
MODEL
en
a:
BIAS
CURRENT
pA,max
JlVloC,max
5
5
2
2
1
1
7.5
7.5
4
4
2
2
a:
w
c.
OFFSET
DRIFT
o
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in I~e support devices andlor systems.
BURR-BROWN®
I~~I Burr-Brown Ie Data Book-Linear Products
2.47
For Immediate Assistance, ConlactYour Local. Salesperson
TYPICAL PERFORMANCE CURVES
T. = +25°C, Voc = ±15VDC unless otherwise noted.
INPUT CURRENT NOISE SPECTRAL DENSITY
INPUT VOLTAGE NOISE SPECTRAL DENSITY
100
~:e.
lk
l!:>
10
100
E-
.~
U/P
z
/
j
UB/PB
r.....
UB/PB
10
f;
II
0.1
10
100
lk
10k
lOOk
1M
10
100
Frequency (Hz)
lk
10k
1M
lOOk
Frequency (Hz)
TOTAL(l) INPUT VOLTAGE NOISE SPECTRAL
DENSITY vs SOURCE RESISTANCE
TOTAL(l) INPUT VOLTAGE NOISE (PEAK·TO·PEAK)
vs SOURCE RESISTANCE
lk
lk
Rs = 10Mll
Rs
l-
= 1Mil
I-
NOTE: (1) Includes contribution
". from source resistance:
Rs = 100kll
R~ 1~ll0~J
UB/PB
"
NOTE: (1) Includes contribution
UB/PB
fe = O.IHzto 10Hz
from source resistance.
I II
1
111'"1
0.1
I
1111
10
100
I--"'
1111 I I
lk
10k
10 4
lOOk
100
= 1kHz
...-
10
V
.!!l
0
Z
8
~
CD
E
f;
6
?- I--'
~
::::. l!!
;;---
-50
-25
o
25
50
Temperature ('C)
10
.,
.!!l
0
z
1:'
~
::0
0.1 u
::::::=---r--
4
10 '0
lk
I
CD
I
TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY
AT 1kHz V9 SOURCE RESISTANCE
12
E-
10·
Source Resistance (ll)
VOLTAGE AND CURRENT NOISE SPECTRAL
DENSITY vs TEMPERATURE
l!:>
1111
10 5
Frequency (Hz)
fa
II
1
75
100
0.01
125
l!:>
E- 100 ="
o
Kj
"
;s
W
.~
z.,0
I
10
OPAI24UB/PB +
Resistor ....
f;
f--
Resistor Noise Only
I II
1/
100
V
lk
I II
10k
lOOk
1M
10M
100M
Source Resistance (ll)
BURR-BROWN~
2.48
Burr-Brown Ie Data Book-Linear Products
I EiI Eill
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONn
TA = +25°C, Vee "" ±15VDC unless otherwise noted.
BIAS AND OFFSET CURRENT
vs TEMPERATURE
lk ~~~~~~~~~~~~~~~~ lk
__
-
-
•••
_o __ • _ _ _
•
__
~
_______
BIAS AND OFFSET CURRENT
vs INPUT COMMON MODE VOLTAGE
~
100
~
i
~
10
Bias Current
i.,
o
·tftlitl{
o
~
~ 0.1
0.1
CJ)
0.01 .......c:......o::._--'_ _-'-_-'"_ _" - _......_--' 0.01
-25
25
50
75
100
125
--50
a:
-15
-10
Ambient Temperature ('C)
--5
10
5
:J
~
:E
~-+~~~~~+*-r-t+H-~~-+-Htr+-~
m 120
5
g
~80H-tttt-+++It-H+tf"'k:tttt-H-ttl-t-ttlt-+-1+H
~80H-t+tf+itIt-Httt-1'-tttt-H-ttl-+-ttlt-t-Hi1
j
~ 60H-t-tit-i-t-tilH--Htt-H-ttt-f"o;;H-rH-t-tIt'-t-tttl
~ 40H-t+tf+itIt-Httt-++ttt-H-ttl~
-90
80
60
Gain
40
0
5
10
15
Common-Mode Voltage (V)
1
10
100
lk
~
liP
e.
;E
'"en
f"s
-135
"gj
'"
11.
lJl..,
1'1.
.11
0
--5
= 65'
~:" 1l.Lil
LI
II
20
-10
Phase ..)
Margin
t'"
80
70
-15
10k
lk
Frequency (Hz)
~
o
m100
t:
E
E
100
w
OPEN-LOOP FREQUENCY RESPONSE
120
'8
.:0
o
~
a:
100 H-t+tt-t-ii"tt-N+tt-t--t+tt-H-tt1-t-Htt--t-t-H1
COMMON-MODE REJECTION
vs INPUT COMMON MODE VOLTAGE
::!
"
c.
~
75
0
~
w
o
-75·
-150
-1
Time From Power Turn-On (Minutes)
0
2
3
4
Time From Thermal Shock (Minutes)
BURR-8ROWN®
1155115511
Burr-Brown Ie Data Book-Linear Products
2.51
For Immediate Assistance, Contact·Your Local Salesperson
APPLICATIONS INFORMATION
NOTE: No trim on sOle.
OFFSET VOLTAGE ADJUSTMENT
The OPAl24 offset voltage is laser-trimmed and will require
no further trim for most applications. In order to reduce
layout leakage errors, the offset adjust capability has been
removed from the SOIC versions (OPA124UB, OPA124UA,
and OPA124U). The PDIP versions (OPA124PB,
OPA124PA, and OPA124P) do have pins available for
offset adjustment. As with most amplifiers, externally trimming the remaining offset can change drift performance by
about O.3I1V1°C for each lOOI1V of adjusted offset. The
correct circuit configuration for offset adjust for the PDIP
packages is shown in Figure 1.
10kn to 1 MQ trim potentiometer.
(100kn recommended).
±I OmV typical trim ·range.
FIGURE 1. Offset Voltage Trim for PDIP packages.
Maximum Safe Current
INPUT PROTECTION
Conventional monolithic PET operational amplifiers require
external current-limiting resistors to protect their inputs
against destructive currents that can flow when input PET
gate-to-substrate isolation diodes are forward-biased. Most
BIPET amplifiers can be destroyed by the loss of -Vcc.
Unlike BIPET amplifiers, the Oifet OPAl24 requires input
current limiting resistors only if its .input voltage is greater
than 6V more negative than -Vcc. A lOkQ series resistor
will limit input current to a safe level with up to ± 15V input
levels, even if both supply voltages are lost (Figure 2).
Static damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers (both bipolar and PET types),
this may cause a noticeable degradation of offset voltage and
drift. Static protection is recommended when handling any
precision IC operational amplifier.
-10
5
-5
10
15
Input Voltage (V)
FIGURE 2. Input Current vs Input Voltage with ±Vee Pins
Grounded.
Non-Inverting
Buffer
GUARDING AND SHIELDING
As in any situation where high impedances are involved,
careful shielding is required to reduce "hum" pickup in input
leads. If large feedback resistors are used, they should also
be shielded along with the external input circuitry.
Leakage currents across printed circuit boards can easily
exceed the bias current of the OPAI24. To avoid leakage
problems, the OPAI24 should be soldered directly into a
printed circuit board. Utmost care must be used in planning
the board layout. A "guard" pattern should completely
surround the high impedance input leads and should be
connected to a low impedance point which is at the signal
input potential.
The amplifier substrate should be connected to any input
shield or guard via pin 8 minimizing both leakage and noise
pickup (see Figure 3).
Bottom View
Inverting
In
8~e
(6l
7e
6e
5e
lQJ
Board layout for PDIP input guarding: guard top and bottom 01 board.
FIGURE 3. Connection of Input Guard.
If guarding is not required, pin 8 should be connected to
ground.
BURR - BROWN~
2.52
Burr-Brown Ie Data Book-Linear Products . - - .
Or, Call Cuslomer Service aI1-800-548-6132 (USA Only)
BURR-BROWN®
OPA128
11191191
co
N
'I"'"
~
o
Dife(9) Electrometer-Grade
OPERATIONAL AMPLIFIER
en
a::
w
u::
FEATURES
APPLICATIONS
• ULTRA-LOW BIAS CURRENT: 75fA max
• ELECTROMETER
• LOW OFFSET: 50011V max
• MASS SPECTROMETER
• LOW DRIFT: 511VI"C max
• HIGH OPEN-LOOP GAIN: 110dB min
• CHROMATOGRAPH
• ION GAUGE
• HIGH COMMON-MODE REJECTION:
90dBmin
• PHOTODETECTOR
e.
~
I>"
.c;
60
Phase_
Margin_
=90·
40
20
-135
'""
~
0..
iii' 120
:Eo
~
.~
I"'
10
100
lk
10k
Frequency (Hz)
lOOk
1M
80
II:
+PSRR
~
c- 60
"li;
'"
40
~
20
-PSRR
~
"'I-J.
0
100
-180
10M
10
iii'
:Eo 120
a 100
'fl
I:
II:
~
~
i
100 H-++1It++-H-t-I+I+H-++++++-H-H+1-H
i
1M
10M
I-~~rII"~~j:+ttt::t::+m+~~=tt!tt~
H+rt+-+-iftH-f"kt+t-H+tt-+-+tI+-t-+Ht-+-Ht1
80H+Ht-+-1ftH-+-+++t-f>l..tft+ttlt-t-+Ht-+-ftH
i ~ H+rt+-+-ftH-+-+++t-H+tt+~+-t-+Ht-+-Ht1
901-++++-1-+-1-++++++-1-+-++++++-+-1-++-11+++1
~ ~ H-+-rt+-+-iftH-+-+++t-H+tt-+-+tI+-t-+~d-Ht1
80H-HIt-I+H-++++-H+H-+++++H-++IH-t-I
70
lOOk
mm""FF=n==FFfFFRFFf=Ff=n==FFR""mm
iii'
:Eo 110 1-++++fI-+-I-++++++-I-+-++++++-+-I-+-Il++++I
t
lk
lqk
Frequency (Hz)
COMMON-MODE REJECTION
vs FREQUENCY
COMMON-MODE REJECTION
vs INPUT COMMON·MODE VOLTAGE
120
100
820H-+-rt+-+-ftH-+-+++t-H+tt-+-++I+-t-+Ht-...p.,H-H
u...u..u..J...I...u..u........I....L..u...w...u..J...I...u..u..J...L..U
-15
-10
5
Common-Mode Volt8lle (V)
10
15
10
100
lk
10k
Frequency (Hz)
lOOk
1M
10M
'159159'
BURR-BROWN®
2.56
Burr-Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
At TA = +25°C. + 15VDC unless otherwise noted.
BIAS AND OFFSET CURRENT
vs TEMPERATURE
BIAS AND OFFSET CURRENT
vs INPUT COMMON-MODE VOLTAGE
10
co
E
N
,....
§
0
~
10
~
o
~
j
III
0.1
i.!:!
'iii
§
z
tJ)
a:
w
iL
::i
0.01
~o
-25
25
50
75
100
125
-15
-10
Ambient Temperature (OC)
10
-5
0
Common-Mode Voltage (V)
15
c..
GAIN-BANDWIDTH AND SLEW RATE
VS SUPPLY VOLTAGE
GAIN-BANDWIDTH AND SLEW RATE
vs TEMPERATURE
4
4
6
---
I-Oi'
~
2
*
~
'I
--r------
II:
Q)
Cii
J:
e
=
2
I--
+ Slew
'C
'ji
'C
-Slew
ffi
~
I-~
'iii
C'J
--
I--
w
I--
o
o
-75
-50
-25
25
50
75
100
o
125
5
Ambient Temperature (OC)
SUPPLY CURRENT vs TEMPERATURE
OPEN-LOOP GAIN. PSR. AND CMR vs TEMPERATURE
:s
1.5
<=
'iii
C'J
g
~
130
Q)
Cl
£10
8
>
-'"-~-
--- r-- r--
120
a:
:::;
t
~
20
140
iii'
«
15
10
Supply Voltage (±Vcc)
2
0
0.5
a:
en
_.. -
-
r-
..........
-<
r- ~
110
.---~-
AOL
I----
--
~
PSR
"-
o
CMR
~
100
-75
~O
-25
25
50
75
100
125
Ambient Temperature (OC)
-75
~O
-25
o
25
50
75
100
125
Ambient Temperature (OC)
BURR ~ BROWNe
lEa Ea I
Burr-Brown Ie Data Book-Linear Products
«
«
Z
o
~
a:
..J
-
N
L..
:E
2.57
c..
o
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25'C, +15VDC unless otherwise noted.
LARGE SIGNAL TRANSIENT RESPONSE
i
SMALL SIGNAL TRANSIENT RESPONSE
II
• l' •
I
~
10
I
II'
~ I,
o
I II
5
~
o
6.
•11!i1!J1
-10
I
!
II
•
,
III
II II
~,
II
i
Ii
I
I
II
!
I
[;l.!m
o
I
25
Time
o
50
4
2
(~s)
6
Time
8
10
(~s)
BIAS CURRENT
vs ADDITIONAL POWER DISSIPATION
COMMON-MODE INPUT RANGE
vs SUPPLY VOLTAGE
100pA
15
V
~
I'"
"8'"
E
E
0
0
0
'"
15
.......
100
.!l!
V
10
~
§
V/
10
o
20
INPUT VOLTAGE NOISE SPECTRAL DENSITY
100
150
200
250
300
350
FULL-POWER OUTPUT vs FREQUENCY
1000
30
a:
Q.
100
~ 20
"
C)
"
~
.!!l
0
>
Z
'"
E
50
Additional Power Dissipation (mW)
Supply Vonage (±Vcc)
~::.s
I-KM
lpA
E
5
5
-
~
V
~
~0
10pA
V/
10
5
10
~
0
10
0
>
10
100
lk
Frequency (Hz)
10k
lOOk
'\.
o
lk
lOOk
10k
1M
Frequency (Hz)
BURR-BROWNI DISCHARGE SENSITIVITY
DIP/SOIC
NC
Any integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
8
Substrate
Output
NC
4
5
V-
NC: No internal connection.
ESD damage can range from subtle perfonnance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet
published specifications.
TYPICAL PERFORMANCE CURVES
TA = +25'C, + 15VDC, unless otherwise noted.
POWER SUPPLY REJECTION vs FREQUENCY
OPEN-LOOP FREQUENCY RESPONSE
140
120
iii' 100
:Eo
c:
'iii
80
f
60
(!l
C1>
140
III
,
r-..
f\.,
e
,
,
40
20
100
lk
10k
Freq~ency (Hz)
'if!!!
90
:if
:Eo
;e
.<:
Phase \
Margin
'"~
135 "nOif
I'HUII\
0
10
iii' 120
45
IIII
Gain
lOOk
1M
:Eo
c:
:§
C1>
.~
II:
~
Q.
"
'"~
6?
180
10M
100
r-..
~
80
r-..
60
40
+PSRR
r-..
-PSRR
.
r-..
20
r-..
0
10
100
lk
10k
Frequency (Hz)
lOOk
1M
10M
BURR~BROWN®
2.64
Burr-Brown Ie Data Book-Linear Products
IE5IE5II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CO NT)
TA =+25°C, +15VDC, unless otherwise noted.
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
en
COMMON-MODE REJECTION vs FREQUENCY
120 r-~==F==F==F=~----'
~
~
110
100
c:
90
-.
.-~
/---. --.
.~
100
'j
80
~
60
o
E
80 ...
H-f-t-tt-Htl ~N+H-+-+-++~-I-
o
•
40
~
-.. - . - - - - - -.. ----.
~
120 14"'f+lt'-4.;;;t1
~.--
6
i
N
,....
rJ)
~
20
W
o
Common-Mode Voltage (V)
lk
10k
Frequency (Hz)
BIAS AND OFFSET CURRENT vs TEMPERATURE
BIAS AND OFFSET CURRENT
vs INPUT COMMON-MODE VOLTAGE
15
10
5
10
10
15
100
lOOk
1M
10M
u::
::::i
~
::E
-10
100
Q)
"j
c. 10
>
r-....
10
10
100
lk
10k
lOOk
Frequency (Hz)
lk
10k
'"
lOOk
Frequency (Hz)
i'.
1M
BURR-BROWN\!!
IEilEilI
Burr-Brown Ie Data Book-Linear Products
2.65
o
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25'C, +15VDC, unless otherwise noted.
GAIN BANDWIDTH AND SLEW RATE
vs TEMPERATURE
GAIN BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
4
4
'N 3
3
J:
6
3
Ui'
:l.
~
""
I
~
L
2
m
'n;
2
:'l
"
1;!
"
+Slew
~
·-5lew
a:
"
--l GBW
(jj
Cl
o L--___L.---I_--.l._-'-_-'-_-'-_-"----'
-75
-SO
-25
0
25
50
75
100
r--
o
o
0
125
10
5
Ambient Temperature ('C)
15
20
Supply Voltage (±Vcc)
OPEN-LOOP GAIN, PSR AND CMR vs TEMPERATURE
SUPPLY CURRENT vs TEMPERATURE
130
iIi'
<"
1.5
f----+--+--+-+-+--r--f---f
.§.
'E
~
~
~
~
i
-
I:::::",
~
~
<3
...
" 120
a:
a:
g:
110
r----.....
---
0.5
f----+---\--+-+-+--r--f---f
(,)
-
100
r----.....
CM~
~
:;:
ell
.1
~OL-
...........
~~
PSR
-..........
90
-75
-SO
25
-25
50
75
100
125
-75
-25
-SO
0
25
50
75.
100
125
Ambient Temperature ('C)
Ambient Temperature ('C)
SMALL SIGNAL TRANSIENT RESPONSE
LARGE SIGNAL TRANSIENT RESPONSE
80
~
10
I
!
[
40
"
f
o
io
-10
25
Time (~s)
50
0
-40
2
4
6
10
Time(~s)
BURR-BROW'Ne
2.66
Burr-Brown Ie Data Book-Linear Products
llalal
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
T. = +25°C, + 15VDC, unless otherwise noted.
COMMON-MODE INPUT RANGE vs SUPPLY VOLTAGE
15
BIAS CURRENT vs ADDITIONAL POWER DISSIPATION
.------.------,-----,---7""""---,
0')
C"II
'P'"
~
10pA
<"
'=E
o
--
lpA
~
()
~
10
o
10
5
15
20
50
100
150
200
250
300
350
Additional Power Dissipation (mW)
Supply Voltage (±Vcd
APPLICATIONS INFORMATION
NON-STANDARD PINOUT
The OPA129 uses a non-standard pinout to achieve lowest
possible input bias current. The negative power supply is
connected to pin 5-see Figure 1. This is done to reduce the
leakage current from the V-supply (pin 4 on conventional
op amps) to the op amp input terminals. With this new
pinout, sensitive inputs are separated from both power
supply pins.
V,N o-~I\I\IC"""---l
>''-+------OVOUT
~1\1\1~/\1\~1
V-
Due to its laser-trimmed input stage, most applications do
not require external offset voltage trimming. If trimming is
required, the circuit shown in Figure 1 can be used. Power
supply voltages are divided down, filtered and applied to the
non-inverting input. The circuit shown is sensitive to variation in the supply voltages. Regulation can be added, if
needed.
To minimize surface leakage, a guard trace should completely surround the input terminals and other circuitry
connecting to the inputs of the op amp. The DIP package
should have a guard trace on both sides of the circuit board.
The guard ring should be driven by a circuit node equal in
potential to the op amp inputs-see Figure 2. The substrate,
pin 8, should also be connected to the circuit board guard to
assure that the amplifier is fully surrounded by the guard
potential. This minimizes leakage current and noise pick-up.
Careful shielding is required to reduce noise pickup. Shielding near feedback components may also help reduce noise
pick-up.
OFFSET VOLTAGE TRIM
Triboelectric effects (friction-generated charge) can be a
troublesome source of errors. Vibration of the circuit board,
input connectors and input cables can cause noise and drift.
Make the assembly as rigid as possible. Attach cables to
avoid motion and vibration. Special low noise or low leakage cables may help reduce noise and leakage current. Keep
all input connections as short possible. Surface-mount components may reduce circuit board size and allow a more rigid
assembly.
BURR-BROWN@
IEaEaI
Burr-Brown Ie Data Book-Linear Products
:::;
a.
:E
Y'N > -Vee - 8V. See Figure 2. (3) Short circuit may be to power supply common only. Rating applies to +25°C ambient. Observe dissipation
IElElI
a:
a:
PACKAGE INFORMATION!I)
TEMPERATURE
RANGE
NOTE: (1) OPA404KU may be marked OPA404U.
Top View
~
dB
±10
80
ORDERING INFORMATION
OPA404KP
OPA404KU")
OPA404AG
OPA404BG
OPA404SG
111:3'
I1V/'C
I1V/'C
• Specification same as OPA404AG.
MODEL
0
W
±10
82
80
POWER SUPPLY
Current, Quiescent
OPA404SG
MAX
80
BIAS CURRENT
Input Bias Current
VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
KP. KU
TYP
2.73
Q.
o
For Immediate Assistance, Contact Your Local Salesperson
DICE INFORMATION
PAD
FUNCTION
PAD
FUNCTION
1
2
3
4
5
6
7
Output A
-Input A
+Input A
+Vcc
+Input B
-Input B
Output B
8
9
10
11
12
13
14
Output C
-Input C
+Input C
-Vee
+Input D
-Input D
Output D
Substrate Bias: -Vcc
NC: No connection
MECHANICAL INFORMATION
Die Size
Die Thickness
Min. Pad Size
MILS (0.00''')
MILLIMETERS
108x 108±5
20±3
4x4
2.74x2.74±0.13
0.51 ±0.08
0.10 x 0.10
None
Backing
OPA404 DIE TOPOGRAPHY
TYPICAL PERFORMANCE CURVES
T, = +25°C, Vee
=±15VDC unless otherwise noted.
POWER SUPPLY REJECTION AND COMMON·MODE
REJECTION vs TEMPERATURE
INPUT CURRENT NOISE SPECTRAL DENSITY
100
~
~
.~
z
110
iii'
PSR
105
:s
10
a:
til
..,a.
v
E
11::I
100
lii
/
a:
::;
0
0
95
,/
V ....
l/:'
CMR
""'"
"V
0.1
90
10
100
1k
10k
Frequency (Hz)
100k
1M
-75
-50
I=im III
0
+25
+50
Temperature ee)
+75
+100
+125
BIAS AND OFFSET CURRENT
vs TEMPERATURE
TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY
AT 1kHz vs SOURCE RESISTANCE
10~""'!!/
-25
10nA
10nA
1nA
1nA
«
.s 100
~
100
8
gj
iii
_ _
«
.s
E
~
Bias Current
::I
10
10
0
1ii
~
Offset Current
Resistor noise only
100
1k
I II
I
10k
100k
1M
Source Resistance (0)
0.1
0.1
10M
100M
-50
-25
o
+25
+50
+75
+100
+125
Ambient Temperature (OC)
BURR-BROWN@
2.74
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
TA =+25°C, Vcc = ±15VDC unless otherwise noted.
POWER SUPPLY REJECTION
vs FREQUENCY
BIAS AND OFFSET CURRENT
vs INPUT COMMON-MODE VOLTAGE
10
10
m 120
:!l.
Bi s urrent
.§ 100
H-tttl-+oIo!::H-H;:Ht-r++tt-H+#-++t-H-~H-lI
"l 80
~-+Hr4r++~H'Ni-P'-Id-tt+-+-++H-~~-++t-ll
g
"Off"e
urr n-
H-tttl-+++fl--H+tt-r++tt-H+#-t-H-H-~H-lI
- t---
r-. "" .
.;,.
g: 60H-tttt-+-t+fl--H+tt-r-PI-rf"!dtt-++t-H-~H-lI
'"-
40H-t-H+-+-f-tII-+-t+H-H+tt-f--A-4H"""=H+-+-H-H
~
20 H--H-lt-H+tI-+t+JjH-+tft-lH-Ht-+-l'fil--P*Hl
J
en
a::
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0.01
100
10
Common-Mode Voltage (V)
10k
1k
100k
1M
u:::
10M
:::::i
Frequency (Hz)
Q.
==
80
-90
~.
C)
f
+15
40
~-+~4r+"<~~+#~-HCL= 1OOPF+-+++H-H-Il -45
:!l.
"
+10
10
-. fliLJYL
RL= 2kn
m 100
.~
-10
60
6
e."
I.,
:E
.<::
'"
-135 ~"
D-
40
"N
I
i!?
8
............
6
~ r--.
c:
/'
Slew Rate
ID
.~
C)
36
GBW
4
r--- ~ r-I\..
\
20
0
10
100
1k
10k
100k
1M
-180
10M
Frequency (Hz)
2
-75
"'
~
I--
"
1il
35 II:
~
34
33
-.50
-25
o
+25
+50
+75 +100 +125
Ambient Temperature ('C)
BURR-BROW"NI!l
I ~~I
Burr-Brown Ie Data Book-Linear Products
2.75
'"
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25OC, Vee =±15VDC unless otherwise noted.
GAIN-BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
8
OPEN-LOOP GAIN
vs TEMPERATURE
38
A~=1+11
120
I-- R L= 10kQ
Ui'
36
1/1/
GBW
::1-
~
*
a:
~
V
34C/l
..... V
r--<
1/
·iii
Cl
100
CD
f
r-- r-
--.. r---..
............
90
.........
ileiRtel
80
32
o
5
-
110
1ii"
:sc:
10
Supply Voltage (±Vcc)
15
20
-75
MAXIMUM OUTPUT VOTAGE SWING
vs FREQUENCY
-50
-25
+25
+50
+75
Ambient Temperature (OC)
+100
+125
LARGE SIGNAL TRANSIENT RESPONSE
30
a:
"<:.
CD
~
20
10
CD
E
g
E
g
s
% 10
0
!>
g.
,
"
0
-10
_R1L=fkf
o
10k
100k
1M
Frequency (Hz)
10M
0
2
3
4
5
Time(~s)
SETTLING TIME
vs. CLOSED-LOOP GAIN
SMALL SIGNAL TRANSIENT RESPONSE
5
150
;:;-
4
100
.s
"
E
g
I
Ui'
a
50
~"
0
'"
~
S -50
g.
<5 -100
II
3
2
0.01%
V
V II
V
/
RL= 2kQ
°TII
-150
0.1%
0
1
Time(~s)
2
-1
Cr=1 1
-100
-10
Closed-Loop Gain (VN)
-1k
BURR-BROWN®
2.76
Burr-Brown ICData Book-Linear Products
I E!lE!II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25°C, Vee = ±15VDC unless otherwise noted.
CHANNEL SEPARATION
vs FREQUENCY
SUPPLY CURRENT vs TEMPERATURE
oqo
0
oqo
11
«
10
--
.s
1:'
~
;........
"
0
~
~
0
r--~
g.
CI)
7L-__
-75
L-~
-50
__
~
__
~
--
.. .
--------
__- L__- L__
-25
0
+25
+50
+75
Ambient Temperature (0C)
en
a:
w
~--J
+100
+125
100
10
1k
Frequency (Hz)
10k
100k
ii:
:::J
11.
:::i
----.0 Out
Leakage currents across printed circuit boards can easily
exceed the bias current of the OPA404. To avoid leakage,
utmost care must be used in planning the board layout. A
"guard" pattern should completely surround the high
impedance input leads and should be connected to a lowimpedance point which is at the signal input potential. (See
Figure 3).
-t5V
±2mV
~---.AA~-~~Off~t
Trim
+t5V
FIGURE 1. Offset Voltage Trim.
Buffer
Non-Inverting
INPUT PROTECTION
Conventional monlithic PET operational amplifiers require
external current-limiting resistors to protect their inputs against
destructive currents that can flow when input PET gate-tosubstrate isolation diodes are forward-biased. Most BlFET
amplifiers can be destroyed by the loss of -VCC"
Unlike BlFET amplifiers, the DifetoPA404 requires input
current limiting resistors only if its input voltage is greater
than 8 volts more negative than -Vcc. A 10ill series resistor
will limit the input current to a safe value with up to ±15V
input levels even if both supply voltages are lost. (See Figure
2 and Absolute Maximum Ratings).
In 0--;'---'---1
Inverting
For input guarding,
guard top and bottom of board.
INPUT CURRENT vs INPUT VOLTAGE
WITH ±Vcc PINS GROUNDED
+2
<'
.§.
FIGURE 3. Connection oflnput Guard.
~
+1
;;;
~
HANDLING AND TESTING
Measuring the unusually low bias current of the OPA404 is
difficult without specialized test equipment; most commercial benchtop testers cannot accurately measure the OPA404
bias current. Low-leakage test sockets and special test fixtures are recommended if incoming inspection of bias current is to be performed.
~
"
0
5Q.
£;
-1
---------_ .. -
ttttl1f1JjjJ~~lt~M~~imiuimisJru~e~c]ur~m~m~
-21::
-15
-10
-5
+5
Input Vollage (V)
+10
FIGURE 2. Input Current vs Input Voltage with±Vcc
Pins Grounded.
+15
To prevent surface leakage between pins, the DIP package
should not be handled by bare fingers. Oils and salts from
fmgerprints or careless handling can create leakage currents
that exceed the specified OPA404 bias currents.
BURR - BROWN$
2.78
Burr-Brown Ie Data Book-Linear Products
IEalEalI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
If necessary, DIP packages and PC board assemblies can be
cleaned with Freon TF", baked for 30 minutes at 85°C,
rinsed with de-ionized water, and baked again for 30 minutes at 85°C. Surface contamination can be prevented by the
application of a high-quality conformal coating to the cleaned
PC board assembly.
APPLICATIONS CIRCUITS
Figures 5 through 11 are circuit diagrams of various applications for the OPA404.
BIAS CURRENT CHANGE
VERSUS COMMON-MODE VOLTAGE
The input bias currents of most popular BIPET operational
amplifiers are affected by common-mode voltage (Figure 4).
Higher input PET gate-to-drain voltage causes leakage and
ionization (bias) currents to increase. Due to its cascode
input stage, the extremely-low bias current of the OPA404
is not compromised by common-mode voltage.
o
Gain =-100
Vos < 10~V
Drift=0.05~VI"C
Zero Droop=l~V/s
Referred to Input
CJ)
a:
W
u::
80
__ TA = +25°C; curves taken from
mfg. published typical data
70
---+-OOut
Ino--+---1
10
100
.s
CD
CD
.!II
.!II
~
C
1/
§
r-
~
r-
CD
~
10
~
0
0.1
10
100
lk
10k
lOOk
1M
100
10
Frequency (Hz)
POWER SUPPLY REJECTION AND COMMON·MODE
REJECTION vs TEMPERATURE
10k
lOOk
1M
TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY
AT 1kHz vs SOURCE RESISTANCE
110
lk
l!:>
105
iii'
:Eo:
~ 100
."
CMR
."
PSR
0:
::;;
0
lk
Frequency (Hz)
-
V-....
-50
-25
25
50
Temperature ('C)
75
100
125
~ .
+
V
Rs
OPA602 + Resistor
.~
CD
90
-75
oIl
z
95
100
,
.s
=:"~
r-
~
10
1 ~
100
iiSliioi Nni,°I'Y
lk
10k
lOOk
1M
10M
100M
Source Resistance (0)
BURR~BROWN®
2.88
Burr-Brown Ie Data Book-Linear Products
11E5I1E5I1
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
T, = +25°C, Vs =±15VDC unless otherwise noted.
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
OPEN-LOOP FREQUENCY RESPONSE
120
140
m
:s 110
120
...
<=
,g.,
'iii'
II:
.,
.I R:
c..
_-
C\I
~I\kri I
=
o
-45
CD
100pF
~
_100
ED
:s
100
0
<:
0
80
0
.,
60
>
40
~
0
90
E
E
80
~
_.
(!l
-0
::;;
<=
'iii
.. ~
cjj
-135
Aot.20
u
;e
j
-
en
a:
w
-180
70
-15
-10
-5
0
+5
Common-Mode Voltage (V)
+10
+15
10
100
10k
lk
1M
lOOk
2
0..
II
--
o
10M
u::
Frequency (Hz)
:::i
~
GAIN BANDWIDTH AND SLEW RATE
vs TEMPERATURE
10
N
J:
..............
6
(!l
.. -
8
35
[----
- -
L_
~
~
Slew Rate
ED
<=
'iii
N __
GBW
e
¥l'j;
37
8
4 ---.
'\.
'\
~vJJ
r--- -
[---
-50
-25
0
25
50
75
100
100
90
- -r--- r--
----·-+-H+l-H+---f--H--\'-
r-.- ..............
\>
~ 20
i--+-++H-++l+--+--+-++i+I+f--I-l-+++-H+l
I
)----+-++t+ti-tt---t--H-+H~
~
.........
10
~+-hH+l+H-~++~~--~'r--RL = 1kO+t+ltt--+-+-+-H-+ttt----p..d-t+
80
-75
10k
-50
-25
25
50
75
100
'-r--- .
125
lOOk
1M
10M
Frequency (Hz)
Ambient Temperature (OC)
Burr-Brown Ie Data Book-Linear Products
2.89
o
~
a:
w
Q.
o
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CO NT)
T. = +25°C, v. =±15VDC unless otherwise noted.
LARGE SIGNAL TRANSIENT RESPONSE
SMALL SIGNAL TRANSIENT RESPONSE
110
~
10
.,
100
.§.
50
f
f
>
:;
8
:>
~ -50
:;
0 -100
-10
-150
o
3
2
Time
4
o
5
(~s)
Time
SETTLING TIME vs CLOSED-LOOP GAIN
5
SUPPLY CURRENT vs TEMPERATURE
3.5
I
I
4
«
.§.
E
~
I
0.01%
I
/
J..
:J
0.1%
3.25
r-3.0
0
:J
/
CI)
2.75
RL = lkf.l
<;.
= 100pF
o
-10
2.5
-75
-lk
-100
-50
-25
0
25
50
75
Closed-Loop Gain (VN)
Ambient Temperature fOe)
OPEN-LOOP GAIN vs SUPPLY VOLTAGE
TOTAL HARMONIC DISTORTION
vs FREQUENCY
104
'in
100
~.,
f-
'iii
Cl
f-
,
>
0.1
100
125
=c'~t""N
~
_
"
- - -r--- r--
~
C.
/
-1
(~s)
~.
==
-
~
6.5Vrms
lkf.l
.
.!Il
0
Z
+
96
c
J:
f-
Av= +10IVN
0.Q1
Av=+IVN
92
JI JilL ./
0.001
5
10
Supply Vo~age (±Vcc)
15
20
0.1
10
100
lk
10k
lOOk
Frequency (Hz)
BURR~BROWN@
2.90
Burr-Brown Ie Data Book-Linear Products
leaeal
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25°C, Vs =±15VDC unless otherwise noted.
BIAS AND OFFSET CURRENT
vs TEMPERATURE
BIAS AND OFFSET CURRENT
vs INPUT COMMON MODE VOLTAGE
10nA
~
i
:>
o
10
o
CD
..
InA
100
N
10
;;
B
~
---E"l'"E'
~ ~
....
i 0
i
~
o.IB"
o
~
0.1
en
0.1
0.01
0.1
-50
-25
o
25
50
75
100
125
-15
-5
-10
Ambient Temperature (OC)
5
a:
w
u::
15
10
Common-Mode Voltage (V)
::i
Q.
:E
POWER SUPPLY REJECTION
vs FREQUENCY
iii" 120
:8-
I
c: 100
!
!
a.
6_+----00ut
>,-+---0 Out
In
o-'---+-+---"l
Inverting
.6
>,,6_+.---o 0ut
.7
Board Layout for Input Guarding:
Guard top and bottom of board.
Memate-use Teflon" standott for sensnive input pins.
Teflon. E.I. Du Pont de Nemours & Co.
To Guard Drive
FIGURE 1. Connection of Input Guard.
APPLICATION CIRCUITS
MSB
B1
• • • • • • • • • • 8 12
6
±10mV Typical
Trim Range
DAC7541A
NOTE: (1) 10kn to 1MQ Trim·
Potentiometer (100kn
Recommended)
Single-Point Ground
-:;-Vee
FIGURE 2. Offset Voltage Trim.
VOIJT=-VREF
(
B'
2
+
B,
""4"
+
B,
8
+ ••• +
B" )
4096
-fOV,;VR,,';+10V
0,; Vour'; Where:
4095
4096 V REF
S. = 1 if the BN digital input is high
S. =0 if the BN digital input is low
FIGURE 3. Voltage Output D/A Converter.
BURR-BROWN®
2.92
Burr-Brown Ie Data Book-Linear Products
1&51&511
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
(2)
HP 5082-2835
+15V
1~F
High Quality
Pulse Generator
+
+15V
1~F
1~F Tantalum
Pulse in
±5V
+
~
f-----::L
-15V
+
-::-
~
1~F Tantalum
~
f-----::L
-::-
I
Output
f-----::L
-::Error Out
±0.5mV
(0.01%)
L
en
a:
w
~
C
500pF
-::-
u::
:::i
1~F
Q-::-
Q.
:aE
-........
I
---- ... - ... -........
11
~
-----
-----
-----
2.9
+25
+75
+50
+100
Temperature (OC)
Temperature (OC)
NON INVERTING INPUT BIAS CURRENT
vs TEMPERATURE
INVERTING INPUT BIAS CURRENT
vs TEMPERATURE
+5
+30
+4
+20
+3
+2
a.
Ci.
Q.
55
'""
I
1----
40
_ _ _ _ _ 0.
-Vs- ---
- -
-_."
45
0..
r--
---
~
Vs =±5V
+V;;-
II:
j-"
"-
~
Tracking Supplies
iii
80
c:
0
CD
illillil
~
---
en
a::
w
35
10
100
lk
10k
lOOk
1M
10
100
lk
Frequency (Hz)
10k
lOOk
1M
u::
:::i
D..
:::i
Frequency (Hz)
.
~
10"
"
l;
'"
-4
10
~
~
I
..so
10-3
100
1k
100k
10k
10-3
10
1M
100
lk
-50
0
'E -50
tl
-70
0
-50
J:
--1l0
21
------ t--- -- ..
-----
V
----- r----
~
"
V
-40
1M
-50
R, = lOOn
~--i--T-r++1-Ht~2~-r------
:i
-50
--
"0
~J:
-70
~
0
"2'
Vs= ±15V
--
-100 '----'--'-"'---'-"--'-'-'-'-----'"---'--'--'1.....
1-'-'-'-'
1
10
100
Frequency (MHz)
G = ~2V/J
r-- Va = 2Vp-p --t-i "l---r-r-rt----- p-- r------
:s
c:
ID
31
j.---
lOOk
LARGE-SIGNAL
HARMONIC DISTORTION vs FREQUENCY
G=+2
R, = lOOn
10k
Frequency (Hz)
-30
-40 I-- Va = 2Vp-p--
ID
.,E
0
ft.
LARGE-SIGNAL
HARMONIC DISTORTION vs FREQUENCY
"11
c:
w
D..
3: 10
I.......
-30
i5
!ci:
a::
±5V
-4
Frequency (Hz)
c:
0
~
+Vs
10"
Q.
10
":s
Vs
Ci.
0..
.1>
Trac~~~'~uPPlies
c=
llll
"~
0
U
CD
10
~
II:
Vs
--.-----oVo
a:
11 on
V,N
w
u::
C
100pF
:::i
I
Q.
:a:
-t--...,...--o Vo
R, ~ 150n
for±10V
Out
V,N
This composite amplifier uses the OPA603 current-feedback op amp to
provide extended bandwidth and slew rate at high closed-loop gain.
The feedback loop is closed around the composite amp, preserving the
preCision input characteristics olthe OPA627/637. Use separate power
supply bypass capacitors for each op amp. See Application Bulletin
AB-007 for details.
2-pole Butterworth lP
f-3dB = 10MHz
f
G=I.6
1
--21t RC
NOTE: (1) Minimize capaCitance at this node.
-adB -
FIGURE 8. Low-Pass Filter -
10MHz.
GAIN
(VN)
OPAMP
(n)
100
1000
OPA627
OPA637
50.5(1)
A,
R,
49.9
R.
R.
~dB
(kn)
(n)
(kil)
(MHz)
SLEW
RATE
(VIlIS)
4.99
4.99
20
12
15
11
700
500
R.
NOTE: (1) Closest 1/2% value.
FIGURE II. Precision-Input Composite Amplifier.
BURR-BROWNe
I E51E5II
w
Q.
o
>---
(j)
Iii
60
CMR
~
60
I......
.....,~
40
.......
f'.
o
100
10k
lk
lOOk
"8"
40
~0
20
0
E
E
20
10
a:"
'iii"
~
0
0..
120
100
c::
j
10
15
AcL' PSR, AND CMR vs SUPPLY VOLTAGE
120
+PSR
iii" 100
5
-5
Common-Mode Voltage (V)
CMR
iii"
:Eo
a:
:::;:
l-
a:"
(j)
0..
I
I
V
100
0
90
~f-"""
r----
V
PSRi--
I
l"-
j
./
r~
80
0
0
10M
1M
I
I
110
I
J
70
5
10
Frequency (Hz)
15
25
20
Supply Voltage (±Vs)
GAIN·BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
GAIN·BANDWIDTH AND SLEW RATE
vs TEMPERATURE
28
33
28
30
sleJ Rate
¥
24
Gain-Bandwidth
G = +100'
~
I
~~
20
'5
%
10
0
10iln
-10
.-
0
-
IIII
o
.._--
1"
Vi-'
I
~sl JlllJv
c:
---
-
_.
o
-100
10k
-1000
CJ)
"-
1M
lOOk
10M
Frequency (Hz)
Closed-Loop Gain (VN)
a::
w
u:::
~
Il.
:E
SUPPLY CURRENT vs TEMPERATURE
LARGE-SIGNAL TRANSIENT RESPONSE
o
L~J
!;:
~ +10
Vs =±24VDC
w
f
Il.
o
'5
Vs = ±5VDC
~
-_._-
4 f- ..
.... __ .. --~--t------~~.--
a::
"
5LE$~~
... -
-10
-~~
3~--~~--~--~--~--~--~~
-75
-50
-25
25
50
«
..J
«
Z
75
100
10
125
Ambient Temperature (OC)
Time (us)
SHORT-CIRCUIT CURRENT vs TEMPERATURE
SMALL-SIGNAL TRANSIENT RESPONSE
60
1
«
_ +100
g
E-
"-...
~
I
!
'~ - - -
50
10
"
<.:>
"3
40
~
~-~
~.-
Ie
(3
t:0
-100
.c
30
-------
~
,I
Isc+ and Isc-~
~
~~
.-.~-+--.
"::::::
~-~
~
--
-~
i'-.
'"
o
'I'S
21'S
Time (us)
Burr-Brown Ie Data Book-Linear Products
20
-75
-50
-25
25
50
-_._"--
75
~
100
125
Ambient Temperature (0C)
2.111
For Immediate Assistance, ContactYour Local Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
TA
= +25OC, Vs =±15V unless otherwise noted.
POWER DISSIPATION vs SUPPLY VOLTAGE
MAXIMUM POWER DISSIPATION vs TEMPERATURE
1.4
0.5
worsl case Isine
0.45
wave RL = 600n
[
0.40
6
0.35 f - - -
I::::
I---
'\
~ 0.20
0.15
0.05
..",-
V
/" 1'-""""" ......
l;;
0.10
V
./
Typical high·level
music RL = soon
~
6
0
[.....:::V~
10
12
r..-
14
16
V
V
V
[
...-
"
.2 1.0
16
a.
./
~
I
bw
Soldered to
1'../ Circuit Board
"'"
(see text)
~
0.6
Il.
No signal
°rnolo~d20
0.8
16J•A = 900
"
,,.
Maximum
0.4 t---Specified Operating_
, ". . .
,...,
Temperature
~ 0.2
..
,,
f-- I 85°C I
...
V
VI'
18
'"
1.2
22
24
Supply Voltage, ±Vs (V)
o
o
25
50
75
100
125
150
Ambient Temperature (OC)
APPLICATIONS INFORMATION
OFFSET VOLTAGE ADJUSTMENT
The OPA604 offset voltage is laser-trimmed and will require
no further trim for most applications. As with most amplifiers, externally trimming the remaining offset can change
drift performance by about O.3J.lVrC for each 100J.lV of
adjusted offset. The OPA604 can replace many other amplifiers by leaving the external null circuit unconnected.
The OPA604 is unity-gain stable, making it easy to use in a
wide range of circuitry. Applications with noisy or high
impedance power supply lines may require decoupling capacitors close to the device pins. In most cases, a 1J.IF
tantalum capacitor at each power supply pin is adequate.
Op amp distortion can be considered an internal error source
which can be referred to the input. Figure 2 shows a circuit
which causes the op amp distortion to be 10 1 times greater
than normally produced by the op amp. The addition of R3
to the otherwise standard non-inverting amplifier configuration alters the feedback factor or noise gain of the circuit.
The closed-loop gain is unchanged, but the feedback available for error correction isreduced by a factor of 101. This
extends the measurement limit, including the effects of the
signal-source purity, by a factor of 101. Note that the input
signal and load applied to the op amp are the same as with
conventional feedback without R 3•
Validity of this technique can be verified by duplicating
measurements at high gain and/or high frequency where the
distortion is within the measurement capability of the test
equipment. Measurements for this data sheet were made
with the Audio Precision, System One which greatly simplifies such repetitive measurements. The measurement technique can, however, be performed with manual distortion
measurement instruments.
6
CAPACITIVE LOADS
±50mV Typical
Trim Range
-Vee
NOTE: (1) 50k,Q to lMn
Trim Potentiometer
(100k,Q Recommended)
FIGURE 1. Offset Voltage Trim.
DISTORTION MEASUREMENTS
The distortion produced by the OPA604 is below the measurement lintit of virtually all commercially available equipment. A special test circuit, however, can be used to extend
the measurement capabilities.
The dynamic char/lcteristics of theOPA604 have been
optimized for commonly encountered gains, loads and operating conditions. The combination of low closed-loop gain
and capacitive load will decrease the phase margin and may
lead to gain peaki!1g or oscillations. Load capacitance reacts
with the op amp's open-loop output resistance to form an
additional pole in the feedback loop. Figure 3 shows various
circuits which preserve phase mllfgin with capacitive load.
Request Application Bulletin AB-028 for details of analysis
techuiques and applications circuits.
For the unity-gain buffer, Figure 3a, stability is preserved by
adding a phase-lead network, Rc and Ce. Voltage drop
BURR-BROWN®
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across Rc will reduce output voltage swing with heavy
loads. An alternate circuit, Figure 3b, does not limit the
output with low load impedance. It provides a small amount
of positive feedback to reduce the net feedback factor. Input
impedance of this circuit falls at high frequency as op amp
gain rolloff reduces the bootstrap action on the compensation network.
will dominate. At a few thousand ohms source impedance
and above, the OPA604 will generally provide lower noise.
POWER DISSIPATION
The OPA604 is capable of driving a 6000 load with power 'II::t'
supply voltages up to ±24V. Internal power dissipation is
increased when operating at high power supply voltage. The CD
typical performance curve, Power Dissipation vs Power
Supply Voltage, shows quiescent dissipation (no signal or
no load) as well as dissipation with a worst case continuous
sine wave. Continuous high-level music signals tYPiCall. .
produce dissipation significantly less than worst case sin
waves.
o
~
Figures 3c and 3d show compensation techniques for
noninverting amplifiers. Like the follower circuits, the circuit in Figure 3d eliminates voltage drop due to load current,
but at the penalty of somewhat reduced input impedance at
high frequency.
o
Figures 3e and 3f show input lead compensation networks
for inverting and difference amplifier configurations.
Copper leadframe construction used in the OPA604 improves heat dissipation compared to conventional plastic
packages. To achieve best heat dissipation, solder the device
directly to the circuit board and use wide circuit board
traces.
NOISE PERFORMANCE
Op amp noise is described by two parameters-noise voltage and noise current. The voltage noise determines the
noise performance with low source impedance. Low noise
bipolar-input op amps such as the OPA27 and OPA37
provide very low voltage noise. But if source impedance is
greater than a few thousand ohms, the current noise of
bipolar-input op amps react with the source impedance and
1-
~A
OUTPUT CURRENT LIMIT
Output current is limited by internal circuitry to approximately ±4OmA at 25°C. The limit current decreases with
increasing temperature as shown in the typical curves.
SIG.
R3~?'
~
~
Generator
R2
R.
101
~
5kn
50n
10
101
500n
5kn
500n
100
101
50n
5kn
~
1
Vo
I
V
=10Vp-p
(3.5Vrms)
I
I
C9
Audio Precision
System One
Analyze~1)
I
I
I
I
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lkf.!
I
V
NOTE: (1) Measurement BW =80kHz
Z
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IBM PC
or
Compatible
FIGURE 2. Distortion Test Circuit.
BURR· BROWNe
11E!5I1E!5I1
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Input
Output
a..
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DIST.
GAIN GAIN
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2.113
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(b)
(a)
-neo
'>---+--oVo
D.
6.04kn
---OVo
G=1
+
FIGURE 6. Differential Amplifier with Low-Pass Filter.
BURR - BROWN®
I EilEiII
Burr-Brown Ie Data Book-Linear Products
2.115
For Immediate Assistance, Contact Your Local Salesperson
lOon
10k.Q
NOTE: (1) C,
=~
COUT
2" Rtfe
R, = Internal feedback resistance = 1.5k.Q
fe =Crossover frequency = 8MHz
G= 101
(40dB)
10
Piezoelectric _
Transducer
PCM63
20·bit
D/A
Converter
NOTE: (1) Provides input
bias current return path.
FIGURE 7. High Impedance Amplifier.
1
FIGURE 8. Digital Audio DAC I-V Amplifier.
-
t
Vo =±3Vp
To low-pass
filter.
I,
R,
f
I
FIGURE 9. Using Two OPA604 Op Amps to Double the Output Current to a Load.
BURR~aROWNI1O
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I ~~ I
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SOUND QUALITY
The following discussion is provided, recognizing that
not all measured performance behavior explains or
correlates with listening tests by audio experts. The
design of the OPA604 included consideration of both
objective performance measurements, as well as an
awareness of widely held theory on the success and
failure of previous op amp designs.
~
o
CD
~
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SOUND QUALITY
The sound quality of an op amp is often the crucial
selection criteria--even when a data sheet claims exceptional distortion performance. By its nature, sound
quality is subjective. Furthermore, results of listening
tests can vary depending on application and circuit
confignration. Even experienced listeners in controlled
tests often reach different conclusions.
Many audio experts believe that the sound quality of a
high performance FET op amp is superior to that of
bipolar op amps. A possible reason for this is that
bipolar designs generate greater odd-order harmonics
than FETs. To the human ear, odd-order harmonics
have long been identified as sounding more unpleasant
than even-order harmonics. FETs, like vacuum tubes,
have a square-law I-V transfer function which is more
linear than the exponential transfer function of a bipolar transistor. As a direct result of this square-law
characteristic, FETs produce predominantly even-order harmonics. Figure 10 shows the transfer function
of a bipolar transistor and FET. Fourier transformation
of both transfer functions reveals the lower odd-order
harmonics of the FET amplifier stage.
Ie
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(~~0l.?··1
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1
0.651
VBE (V)
VOS~+
.~
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(rnA)
VBE = 1kHz + DC Bias
----
L...___<_--+---+->----<
'0
210
"0
4'0
5'0
VGS = 1kHz + DC Bias
log
Vo
loj
(Vo)
5'0
VGS(V)
u:
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THE OPA604 DESIGN
The OPA604 uses FETs throughout the signal path,
including the input stage, input-stage load, and the
important phase-splitting section of the output stage.
Bipolar transistors are used where their attributes,
such as current capability are important and where
their transfer characteristics have minimal impact.
The topology consists of a single folded-cascode gain
stage followed by a unity-gain output stage. Differential input transistors I I and 12 are special largegeometry, P-channel JFETs. Input stage current is a
relatively high 800J.IA, providing high
transconductance and reducing voltage noise. Laser
trimming of stage currents and careful attention to
symmetry yields a nearly symmetrical slew rate of
±25V/J.IS.
012345
Frequency (kHz)
FFT
en
a:
w
012345
Frequency (kHz)
The JFET input stage holds input bias current to
approximately 50pA or roughly 3000 times lower
than common bipolar-input audio op amps. This dramatically reduces noise with high-impedance circuitry.
The drains of II and 12 are cascoded by QI and Q2,
driving the input stage loads, FETs 13 and h Distortion reduction circuitry (patented) linearizes the openloop response and increases voltage gain. The 20MHz
bandwidth of the OPA604 further reduces distortion
through the user-connected feedback loop.
The output stage consists of a JFET phase-splitter
loaded into high speed all-NPN output drivers. Output
transistors are biased by a special circuit to prevent
cutoff, even with full output swing into 6000 loads.
FIGURE 10. I-V and Spectral Response of NPN and
JFET.
aURR-BROWN(!I
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Burr-BrownIe Data Book-Linear Products
2.117
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For Immediate Assistance, Contact Your Local Salesperson
BURR-BROWN®
OPA606
IE:lE:lI
Wide-Bandwidth Difet @
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
• WIDE BANDWIDTH: 13MHz typ
• OPTOELECTRONICS
• DATA ACQUISITION
• HIGH SLEW RATE: 35V1J.1S typ
• LOW BIAS CURRENT: 10pA max at
TA = +25°C
• TEST EQUIPMENT
• AUDIO AMPLIFIERS
• LOW OFFSET VOLTAGE: 500J.lV max
• LOW DISTORTION: 0.0035% typ at 10kHz
DESCRIPTION
The OPA606 is a wide-bandwidth monolithic
dielectrically-isolated PET (Dife~) operational amplifier featuring a wider bandwidth and lower bias current than BlFET'" LF156A amplifiers. Bias current is
specified under warmed-up and operating conditions,
as opposed to a junction temperature of +25°C.
Laser-trimmed thin-film resistors offer improved offset voltage and noise performance.
The OPA606 is internally compensated for unity-gain
stability.
Y~--+--+----4-o6 vom
Simplified Circuil
Difef'; Burr·Brown Corp.
BIFEr; National Semiconductor Corp.
International Airport Industrial Park • Mailing Address; PO Box 11400 • Tucson, AZ 85734 • Street Address; 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tal; (602)746-1111 • Twx; 911M152-1111 • Cablo;BBRCORP • Tolox;066-6491 • FAX;(602)889·1510 • ImmodlateProducllnfo;(600)548-6132
2.118
PDS·598C
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At Vee = ±15VDC and T. = +25'C unless otherwise noted.
OPA606KM
PARAMETER
FREQUENCY RESPONSE
Gain Bandwidth
Full Power Response
Slew Rate
Settling Time('): 0.1%
0.01%
Tota! Harmonic Distortion
INPUT OFFSET VOLTAGE(2)
Input Offset Voltage
Average Drift
Supply Rejection
CONDITIONS
MIt.!
!"-"-
Small Signal
20Vp-p, Rl = 2kn
Vo = ±10V,
Rl = 2kn
Gain =-1,
Rl = 2kn
10V Step
G = +1, 20Vp-p
RL = 2kn
f = 10kHz
10
12.5
515
33
VCM = OVDC
TA = TMIN to T MAX
Vee = ±10V to ±18V
22
82
OPA606KP
OPA606LM
MAl(
~
"f'o'P
11
13
550
35
25
MAX
MIN
]"YP
9
12
470
30
MHz
kHz
VliJ.s
20
MAX
UNITS
1.0
1.0
1.0
iJ.s
2.1
0.0035
2.1
0.0035
2.1
0.0035
iJ.S
%
±180
±5
100
±10
±1.5mV
±3mV
±32
±300
±10
90
±32
±100
iJ.V
Ilvrc
dB
IlVN
±500
±5
±79
±100
±3
104
±6
90
80
BIAS CURRENT(2)
Input Bias Current
VCM = OVDC
±7
±15
±5
±10
±8
±25
pA
OFFSET CURRENT(2)
Input Offset Current
VCM = OVDC
±0.6
±10
±0.4
±5
±1
±15
pA
100% tested (L)
100% tested (L)
100% tested (L)
37
21
14
12
11
1.3
1.5
30
20
13
11
10.5
1.2
1.3
40
28
16
13
13
1.5
2
37
21
14
12
11
1.3
1.7
10"111
10. 4 113
10"111
10. 4 113
NOISE
Voltage, fo = 10Hz
100Hz
1kHz
10kHz
20kHz
f. = 10Hz to 10kHz
Current, fo = 0.1 Hz thru 20kH:
(3)
(3)
(3)
(3)
IMPEDANCE
Differential
Common-Mode
VOLTAGE RANGE
Common-Mode Input Range
nV/vHz
nV/*iZ
nV/*iZ
nV/*iZ
nVl*iZ
IlVrms
fAl*iZ
10"111
10. 4 113
Q
Q
II
II
pF
pF
Common-Mode Rejection
Y'N = ±10VDC
±10.5
80
±11.5
95
±11
B5
±11.6
96
±10.2
7B
±11
90
V
dB
nD"N_1 nnD GAIN,.DC
Open-Loop Voltage Gain
Rl ;, 2kn
95
115
100
liB
90
110
dB
RL = 2kn
Vo = ±10VDC
DC, Open Loop
Gain = +1
±11
±5
±12.2
±10
40
1000
20
±12
±5
±12.6
±10
40
1000
20
±11
±5
±12
±10
40
1000
20
V
mA
±15
VDC
RATED OUTPUT
Vo~age Output
Current Output
Output Resistance
Load CapaCitance Stability
Short Circuit Current
10
POWER SUPPLY
Rated Voltage
Voltage Range,
Derated Performance
Current, Quiescent
TEMPERATURE RANGE
Specification
Operating
OJ.
10
±15
±5
10 = OmADC
Ambient Temperature
KM,KP, LM
Ambient Temperature
6.5
0
±15
±IB
9.5
+70
+125
~5
10
200
±5
6.2
0
~5
200
±IB
9
±5
+70
+125
0
--40
6.5
155
Q
pF
mA
±IB
10
VDC
mA
+70
+85
'c
'c
'C/W
NOTES: (1) See settling time test circuit in Figure 2. (2) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (3) Sample
tested-this parameter is guaranteed on L grade only.
,EiilEiiI, Burr-Brown Ie Data Book-Linear Products
BURR-BROWN@!
2.119
CD
0
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ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)
At Vee = ±15VDC and TA = TM~ to T MAX unless otherwise noted.
OPA606KM
PARAMETER
TEMPERATURE RANGE
Speciflqation Range
INPUT OFFSET VOLTAGE'"
Input Offset Voltage
Average Drift
Supply Rejection
CONDITIONS
MIN
Ambient Temp.
0
VeM = OVDC
Vee = ±10V to ±18V
80
TYP
OPA606LM
MAX
MIN
+70
0
±400
±5
98
±13
±2mV
TYP
OPA606KP
MAX
MIN
+70
0
TYP
±750
±100
±335
±3
100
±10
±56
±750
±10
95
±18
85
±5
78
MAX
UNITS
+70
·C
±3.5mV
±126
IlV
Ilvrc
dB
IlVN
BIAS CURRENT'"
Input Bias Current
VOM = OVDC
±158
±339
±113
±226
±181
±568
pA
OFFSET CURRENfC'1
Input Offset Current
Vo. = OVDC
±14
±226
±9
±113
±23
±339
pA
VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
OPEN·LOOP GAIN, DC
Open-Loop Voltage Gain
RATED OUTPUT
Voltage Output
Current Output
Y'N =±10VDC
±10.4
78
±11.4
92
±10.9
82
±11.5
95
±10
75
±10.9
88
V
dB
R, ~ 2kQ
90
106
95
112
88
104
dB
R, = 2kQ
Vo = ±10VDC
±10.5
±12
±10
±11.5
±12.4
±10
±10.4
±11.8
±10
V
mA
±5
±5
±5
POWER SUPPLY
Current, Quiescent
10 = OrnADC
6.6
10
6.4
9.5
6.6
10.5
rnA
NOTES: (1) Offset voltage, offset current, and bias current are measured wijh the units fully warmed up.
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAMS
Supply Voltage ............................................................................ ±180VDC
Internal Power Dissipation "' .......................................................... 500mW
Differential Input Voltage ............................................................... ±36VDC
Input Voltage Range ....................... ,., ........................................... ±18VDC
Storage Temperature Range ................................... M = -65·C to + 150·C
P = -40·C to +85·C
Operating Temperature Range ................................ M =-o5·Cto +125·C
P = -40·C to +85·C
Lead Temperature (soldering, 1Os) ................................................ +3000C
Output Short-Circuit Duration"' ................................................ Continuous
Junction Temperature .................................................................... + 175°C
Top View
TO·99
NC
NOTES: (1) Packages must be derated baSed on 8Je = 15·CIW or 8JA. (2) For
supply voltages less than ±18VDC, the absolute maximum input voltage is
equal to the negative supply voltage. (3) Shortcircuij may be to power supply
common only. Rating applies to +25·C ambient. Observe dissipation limit
Case is connected to Vee.
andTJ .
PACKAGE INFORMATION(1)
Top View
MODEL
PACKAGE
PACKAGE DRAWING
NUMBER
OPA606KM
OPA606LM
OPA606KP
T0-99
TO-99
Plastic DIP
001
001
006
NOTE: (1) For detaIled draWIng and dImension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
DIP
8
Offset Trim
NC
-In
+Vcc
+In
Output
-Vee
4
5
Offset Trim
ORDERING INFORMATION
MODEL
PACKAGE
TEMPERATURE
RANGE
OPA606KM
OPA606LM
OPA606KP
TO-99
T0-99
Plastic DIP
O·Cto 70·C
O·Cto 70·C
O·Cto 70·C
2.120
Burr-Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
DICE INFORMATION
PAD
FUNCTION
1
2
OIIsetTrim
-In
+In
-V,
Offset Trim
Output
+V,
NC
No Connection
3
4
5
6
7
CD
o
CD
~
o
8
NC
Substrate Bias: No Connection.
MECHANICAL INFORMATION
Die Size
Die Thickness
Min. Pad Size
OPA606 DIE TOPOGRAPHY
Backing
Transistor Count
MILS (0.001 ")
MILUMETERS
65x54±5
20±3
4x4
1.65 x 1.37±0.13
0.51 ±0.08
0.10 x 0.10
None
43
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Cl
-90
Gain .....
40
-135
III
III
20
0
10
100
10k
lk
>
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~
en
Sl
'0
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:5!-
60
l!
!6'
~
6:
I'-
100
CI>
l>
10
I'lOOk
1M
-180
100M
10M
10
100
Frequency (Hz)
10nA
/
InA
100
B
~
./
10
InA
<.e
c
§
§
()
lOOk
()
./
InA
InA
/
1-
C 100
10k
BIAS AND OFFSET CURRENT YS
INPUT COMMON-MODE VOLTAGE
BIAS AND OFFSET CURRENT YS TEMPERATURE
10nA
~
lk
Frequency (Hz)
los ~
10
/"
~
~
/
/
100
100
§
IB
()
~
-
I J
10
~
~
C
<3
10
l os
~
/
....-.
0.1
~O
-25
25
50
75
100
V
0.1
125
-15
POWER SUPPLY REJECTION
vs FREQUENCY
120
iii" 120
:5!-
80
c.
c.
60
cil
I
Q.
I:
100
l
b
15
140
:5!-
~
10
COMMON-MODE REJECTION
YS FREQUENCY
140
I:
5
Common-Mode Voltage (V)
Ambient Temperature (OC)
iii"
/
o
-10
0
.....
I'-+Vcc
-Vee
I'-
'Ii
CI>
80
'"
60
II:
~
~
40
"0
0
~0
I-..
E
E
.....
20
100
'iii'
0
()
40
.....
20
i'
0
0
10
100
lk
10k
tOOk
Frequency (Hz)
1M
10M
100M
10
100
lk
10k
lOOk
1M
10M
100M
Frequency (Hz)
BURRwBROWNI!I
2.122
Burr-Brown Ie Data Book-Linear Products
1151151 1
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25°C, Vee = ±15V unless otherwise noted.
MAXIMUM UNDISTORTED OUTPUT
VOLTAGE vs FREQUENCY
GAIN-BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
30
1\
9=
a.
(D
14
40
12
35
~
N
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e
G 20
I
"
fs
g. 10
lOOk
'"
Frequency (Hz)
30
-iii
Cl
~.
~
en
IX:
'- ....
8
1M
o
1ij
C: 10
"
0
~
a:
I:
OJ
ID
10k
o
(D
0
10M
W
u:::
25
15
10
20
:::i
c..
Supply Voltage (±Vccl
:is
SUPPLY CURRENT vs TEMPERATURE
OPEN-LOOP GAIN vs TEMPERATURE
iw
1D
--~
I:
-iii
Cl 110 f--
-
~50
~
.............
_...
r---
---
IX:
W
25
50
75
100
~75
125
GAIN-BANDWIDTH AND SLEW RATE
vs TEMPERATURE
-50
~25
25
50
75
100
125
OPEN-LOOP GAIN AND SUPPLY CURRENT
vsSUPPLYVOLTAGE
38
¥ 14
e-"
36
10
.,
~
12
34
[ij
~
a:
~
ID
C:
w
"iii
Cl 10
32
---
120
-.-.-~-~
«g
1D
~
E
I:
!!!
"iii
Cl 110
<3
"
I>
~
6 a.
w
"
100
5
30
8
-50
~25
0
o
Ambient Temperature (OC)
16
~75
c..
.....;;;..
--- - -
100
Ambient Temperature (OC)
~
""'-..
!;i
90
o
~25
'"
"
~
5 ------+---~---+--~----+---~---~---1
~75
120
~
r--r-.-
4
"0
o
130
8
6
«
...J
«
Z
25
50
75
100
125
Ambient Temperature (OC)
4
0
10
15
20
Supply Voltage (±Vcc)
BURR-BROWN~
IElElI
Burr-Brown Ie Data Book-Linear Products
2.123
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25°C, Vee = ±15V unless otherwise noted.
TOTAL HARMONIC DISTORTION
VB FREQUENCY
SETILING TIME vs CLOSED-LOOP GAIN
10
0.01
G=+1
8
VO ",,7Vrrns
~
0.008
.!_-.,
0.006
o
"
~:L
0.004
iii
0.002
'2
v
0
V
2
~
V
10
100
tOO
lk
lk
Closed-Loop Gain (VN)
lOOk
10k
LARGE SIGNAL TRANSIENT RESPONSE
SMALL SIGNAL TRANSIENT RESPONSE
+15
+40
~
(I)
(I)
f
~
~
S
O·
S
g.
%
0
III
Frequency (Hz)
+80
g
1I
Test Equipment
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<5
+40
-15
0.5
2.5
0
5
Time (us)
Time (us)
APPLICATIONS INFORMATION
OFFSET VOLTAGE ADJUSTMENT
The OPA606 offset voltage is laser·trimmed and will require
no further trim for most applications. As with most amplifiers, externally trimming the remaining offset can change
drift performance by about o.5~v/oc for each millivolt of
adjusted offset. Note that the trim (Figure 1) is similar to
operational amplifiers such as LF156 and OP-16. The
OPA606 can replace most other amplifiers by leaving the
external null circuit unconnected.
+Vcc
NOTE: (1) 10knto 1Mil
Trim Potentiometer
(100kn Recommended)
±50mV Typical
Trim Range
FIGURE 1. Offset Voltage Trim.
BURR~BROWN(g
2.124
Burr-Brown Ie Data Book-Linear Products
IEilEilI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
INPUT PROTECTION
Noninverting
Static damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers (both bipolar and PET types),
this may cause a noticeable degradation of offset voltage and
drift. Static protection is recommended when handling any
precision IC operational amplifier.
If the input voltage exceeds the amplifier's negative supply
voltage, input current limiting must be used to prevent
damage.
Buffer
Out
co
o
Inverting
CD~CD
~
~0 3vf
~CD
lCD
CD8
3
CIRCUIT LAYOUT
Wideband amplifiers require good circuit layout techniques
and adequate power supply bypassing. Short, direct connections and good high frequency bypass capacitors (ceramic or
tantalum) will help avoid noise pickup or oscillation.
GUARDING AND SHIELDING
As in any situation where high impedances are involved,
careful shielding is required to reduce "hum" pickup in input
leads. If large feedback resistors are used, they should also
be shielded along with the external input circuitry.
Leakage currents across printed circuit boards can easily
exceed the bias current of the OPA606. To avoid leakage
problems, it is recommended that the signal input lead of the
OPA606 be wired to a Teflon@ standoff. If the OPA606 is to
be soldered directly into a printed circuit board, utmost care
must be used in planning the board layout.
A "guard" pattern should completely surround the high
impedance input leads and should be connected to a low
impedance point which is at the signal input potential (see
Figure 3).
CO
TO·99 Bottom View
In
CJ)
a:
Mini-DIP Bottom View
w
u::
BOARD LAYOUT
FOR INPUT GUARDING
Guard top and bottom of board.
Alternate: use Teflon® standoff
for sensitive input pins.
::i
Il.
:i
'------+--0 Output
0.1%
-15VDC
2kO
+15Vo----------+------~--~--------~
+5V
FIGURE 4. Inverting Amplifier.
I
-5V ~ n.u--_--vV,J~--____t
VOUT
>---------+--0 Output
Input 0--------'1
+15V
Bandwidth> 12MHz
Gain~+IVN
R'N= 10'30
FIGURE 2. Settling Time Test Circuit.
-15VDC
FIGURE 5. Noninverting Buffer.
BURR-BROWN®
IEii!lEii!lI
~
o
Burr-Brown Ie Data Book--Linear Products
2.125
For Immediate Assistance, Contact Your Local Salesperson
lMO
.1SV
Output
Voltage
Eo
6
Load
>'--.---"\J~/""""'--O - -
-I ~ -.. : . :.
Input
Eo =Iii R = lV1~A
Optimize response for particular
load condRion with C, and R, .
lMO -lSV
FIGURE 8. Isolating Load Capacitance from Buffer.
Differential Gain = 1 + (2 x 10kQ)/RG
6
l
FIGURE 6. Absolute Value Current-to-Voltage Circuit.
=O.2pF ij necessary to
Differential
Input
: _____ _11- ,!lr~~e~t_g~lin peaking
3 Metal.film : lS0kQ
lS0kQ
Differential
Output
~.oJ
L
lS0kQ:
resistors
2. Differential Gain = 11
3. Differential Output =SOVp·p
4. Differential Slew Rate = 65V1~s
>,6_ _ _0---0 Output
FIGURE 9. DifferentiallnputIDifferential Output Amplifier.
1. Circuit must be well shielded.
2. Stray capacijance is critical.
3. Bandwidth = 1MHz
4. Output =22V/mW/cm2
+lSV
FIGURE 7. High-Speed Photodetector.
49.90
2.49kQ
Total Mid·band Gain = 40dB
See; "Topology Considerations for RIM Phono Preamplifiers".
AES reprint #1719.
October 1980, by Wa~er G. Jung
7.32kQ
6
l.0SkQ
1. Load Rand C per cartridge manufacture~s recommendations. IO.3~F
2. Use metal film resistors and plastic film capacitors.
3. Bypass ±Vee adequately.
FIGURE 10. Low NoiseILow Distortion RIAA Preamplifier.
BURR-BROWNe
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I e:ae:al
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BROWN®
OPA620
IEaEaI
Wideband Precision
OPERATIONAL AMPLIFIER
en
IX:
W
u::
FEATURES
APPLICATIONS
• LOW NOISE: 2.3nV/fIiZ
• HIGH OUTPUT CURRENT: 100mA
• LOW NOISE PREAMPLIFIER
• LOW NOISE DIFFERENTIAL AMPLIFIER
• FAST SETTLING: 25n$ (0.01%)
• HIGH·RESOLUTION VIDEO
• HIGH·SPEED SIGNAL PROCESSING
• GAIN·BANDWIDTH: 200MHz
• UNITY·GAIN STABLE
• LOW OFFSET VOLTAGE: ±100IlV
• LOW DIFFERENTIAL GAIN/PHASE ERROR
• 8-PIN DIP, SOIC PACKAGES
::i
D..
:::i
c(
..J
c(
Z
• LINE DRIVER
• ADC/DAC BUFFER
o
• ULTRASOUND
• PULSE/RF AMPLIFIERS
IX:
W
• ACTIVE FILTERS
o
fi
D..
DESCRIPTION
The OPA620 is a precision wideband monolithic operational amplifier featuring very fast settling time, low
differential gain and phase error, and high output current drive capability.
used in all op amp applications requiring high speed
and precision.
Low noise and distortion, wide bandwidth, and high
linearity make this amplifier suitable for RF and video
applications. Short-circuit protection is provided by an
internal current-limiting circuit.
The OPA620 is internally compensated for unity-gain
stability. This amplifier has a very low offset, fully
symmetrical differential input due to its "classical"
operational amplifier circuit architecture. Unlike "current-feedback" amplifier designs, the OPA620 may be
Non.lnverting
Input
Inverting
Input
The OPA620 is available in plastic, ceramic, and
SOle packages. Two temperature ranges are offered:
-40oe to +85°e and -55°e to +125°C.
3
Output
Stage
2
0-=----+'''---'
6 Output
4
-Vee
International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tueaon, AZ 85706
Tel: (602) 746·1111 • Twx: 910.Q52·1111 • cable: BBRCORP • Telex: 066-6491 • FAX: (602)889-1510 • Immediate Product Info: (800)!i4U132
PDS·872F
2.127
For Immediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
At vco = ±5VDC Rl = 1000 and TA= +25'C unless otherwise noted
OPA620KP, KU, KG
PARAMETER
CONDITIONS
INPUT NOISE
Voltage: fo = 100Hz
fo= 1kHz
fo= 10kHz
fo=lookHz
10=IMHz to 100MHz
IB= 100Hz to 10MHz
Current: 10 = 10kHz to 100MHz
MIN
VOM = OVDC
TA =TM~ to T....
±Vc< = 4.5V to 5.5V
MAX
±200
15
30
VOM = OVDC
0.2
2
Open·Loop
15111
1 111
OPEN·LOOP GAIN, DC
Open-Loop Voltage Gain
f\ = 1000
Rl = 500
FREQUENCY RESPONSE
Closed-Loop Bandwidth
(-{ldB)
Gain·Bandwidth
Differential Gain
Differential Phase
Harmonic Distortion(2)
Full Power Response'"
Slew Rate'"
Overshoot
Settling Time: 0.1 %
0.01%
Phase Margin
Gain = +WN
Gain = +2VN
Gain = +5VN
Gain = +10VN
Gain = +10VN
3.58MHz, G = + WN
3.58MHz, G = +IVN
G = +2VN, I = 10MHz, Vo = 2Vp-p
Second Harmonic
Third Harmonic
Vo = 5Vp-p, Gain = +IVN
Vo = 2Vp-p, Gain = +WN
2V Step, Gain = -WN
2V Step, Gain = -1 VN
2V Stap, Gain = -WN
Rise Time
RATED OUTPUT
Voltage Output
Oulput Reslstanoe
Load Capacitanoe Stability
Short Circuit Current
POWER SUPPLY
Rated Voltage
Derated Performanoe
Current, Quiesoent
TEMPERATURE RANGE
Specification: KP, KU, KG, LG
SG
Operating: KG, LG, SG
KP,KU
±3.0
65
±3.5
75
50
48
58
20
200
0.05
0.05
11
27
175
loan
-61
-65
16
40
250
10
13
25
60
-60
-65
··
·
2
22
±3.0
±2.5
Continuous
··
±3.5
±3.0
0.D15
20
±150
5
±Voc
±Voc
10 = OmADC
4.0
Ambient Temperature
-40
21
6.0
23.
+85
·
-65
-65
Ambient Temperature
-40
MAX
··
··
70
55
53
nVl.ffiZ
nVl.ffiZ
nVl.ffiZ
nVl.ffiZ
nVl.ffiZ
I1V, rms
pAl.ffiZ
±5oo
I1V
I1V/'C
dB
·
25
I1A
·
I1A
··
kn IlpF
Mn IIpF
··
··
V
dB
dB
dB
·
··
··
·
·
·· · · ··· ··
··
·
·
·
··
··
··
·
··
··
·
·· ··
·
·
·
·
·
· ·
· ·
· ·
· ·
·
+125
+125
UNITS
±100
·
··
·
300
100
40
Gain = +WN
Gain = +WN, 10% to 90%
Vo = lOOmVp-p; Small Signal
Vo = 6Vp-p; Large Signal
Rl =
1\ = 500
lMHz, Gain = +WN
Gain = +WN
60
55
·
··
·
·
TYP
··
··
··
·
·
·
60
VeM = OVDC
Y'N = ±2.5VDC, V0 = OVDC
MIN
·
±lmV
OFFSET CURRENT
Input Offset Current
INPUT VOLTAGE RANGE
Common·Mode Input Range
Common-Mode Rejection
MAX
··
··
BIAS CURRENT
Input Bias Current
INPUT IMPEDANCE
Differential
Common-Mode
TYP
··
±8
50
OPA620LG
OPA620, SG
MIN
10
5.5
3.3
2.5
2.3
8.0
2.3
R. = on
OFFSET VOLTAGE'"
Input Offset Voltage
Average Drift
Supply Rejection
TYP
-65
+125
MHz
MHz
MHz
MHz
MHz
%
Degrees
dBc'"
dBc
MHz
MHz
V/I1S
%
ns
ns
Degrees
ns
ns
V
V
Q
pF
mA
VDC
VDC
mA
'C
'C
'C
'C
+65
8,.
KG, LG, SG
KP
KU
125
90
100
125
'CIW
'CIW
'CIW
• Same specifications as for KP/KU.
BURR~BROWNe
2.128
Burr-Brown Ie Data Book-Linear Products I~~I
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS (CONT)
ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)
At Vee =±5VDC, R, = 100Q, and TA =T.'N to T""" unless otherwise noted.
nD.&~?nIlD
PARAMETER
TEMPERATURE RANGE
Specification: KP, KU, KG, LG
SG
OFFSET VOLTAGE'"
Average Drift
Supply Rejection
CONDITIONS
MIN
Ambient Temperature
-40
KU, KG
TYP
MAX
+B5
TYP
·
-55
Full Temp.
D'C to +70'C ±Vee = 4.5V to 5.5~
Full Temp., ±V;; = 4.5 to 5.5V
45
±B
60
40
55
Full Temp., V OM
= OVDC
15
40
OFFSET CURRENT
Input Offset Current
Full Temp., VeM
= OVDC
0.2
5
INPUT VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
OPA620LG
MAX
MIN
+125
·
· ·
BIAS CURRENT
Input Bias Current
50
45
·
±2.5
60
±3.0
75
R, = 1000
RL = 50Q
46
44
60
58
52
50
O'C to +70'C,R, = 100Q
-40'C to +85'C, R, = loon
O'C to +70'C, R, = 50Q
-40'C to +B5'C, R, = son
±3.0
±2.75
±2.5
±2.25
±3.5
±3.25
±3.0
±2.7
·
·
V'N
OPEN LOOP GAIN, DC
Open-loop Voltage Gain
RATED OUTPUT
Voltage Output
OPA620SG
MIN
POWER SUPPLY
Current, Quiescent
= ±2.5VDC, Vo = OVDC
10
= OmADC
·
21
·
65
.
25
TYP
MAX
UNITS
'c
·
·
·
·
·
···
·
·
11V/'C
dB
dB
35
No Internal Connection
Inverting Input
Positive Supply (+Vcel
U)
I1A
V
dB
dB
dB
V
V
V
V
mA
_ _ _ _ _ _ _L.--_P-'A620
Basic Model Number
Performance Grade Code
K, l = -40'C to +85'C
S = -55'C to +125'C
(T) ( ) (~
P~geCooe--------------------------~
G = 8-pin Ceramic DIP
P = 8-pin Plastic DIP
U = 8-pin Plastic SOIC
Reliability Screening
Q = o-Screened
Supply ............................................................................................. ±7VDC
Internal Power Dissipation(11 ....................... See Applications Information
Dillerential Input Voltage ............................................................ Total Vee
Input Voltage Range .................................... See APplications Information
Storage Temperature Range: KG,lG, SG ................... -65'C to +150'C
KP, KU .......................... -4O"C to +125'C
lead Temperature (soldering, lOs) .............................................. +300'C
(soldering, SOIC 3s) ....................................... +260'C
Output Short Circuit to Ground (+25'C) ............... Continuous to Ground
Junction Temperature (TJ ) ............................................................ +175'C
NOTE: (1) Packages must be derated based on specified 9 JA' Maximum
TJ must be observed.
PACKAGE INFORMATION(1)
OPA620KP
OPA620KU
OPA602KG
OPA620LG
OPA620SG
No Internal Connection
ABSOLUTE MAXIMUM RATINGS
ORDERING INFORMATION
MODEL
8-Pln DIP
B-PlnSOIC
Oulput
Non-Inverting Input
Negative Supply (-Veel
PACKAGE
PACKAGE DRAWING
NUMBER
B-Pin Plastic DIP
B-pin Plastic SOIC
B-pin Ceramic DIP
B-Pin Ceramic DIP
B-Pin Ceramic DIP
006
182
157
157
157
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or APpendix D of Burr-Brown IC Data Book.
BURR-BROWNe
IElElI
Burr-Brown Ie Data Book--Linear Products
~
0
I1A
PIN CONFIGURATION
No Internal Connection
C"II
CO
'C
• Same specifications as for KP/KU.
NOTES: (1) Offset Voltage specifications are also guaranteed with units fully warmed up. (2) Parameter is sample tested. (3) dBc =dB refered to carrier-input signal.
Top View
0
2.129
a:::
W
u::
:::::i
D..
:i
F +10VN CLOSED-LOOP
SMALL-SIGNAL BANDWIDTH
-135
+14
-180
+12
---
lG
-Loili11i
/./
\
ITlm-
1M
j
0-
.- .
\-'
.........
~
"'-
100M
~
o
:o
10M
Frequency (Hz)
~
en
1\\
IpU~~o'
-
u
N
CD
-135
"
-180
lG
Frequency (Hz)
U)
IX
W
u:::
:::::i
D..
:::i
"
z
0
~
2.5
'0
Z
lOOk
10k
1M
10M
100M
-50
-25
0
+25
+50
+75
+100
+125
Ambient Temperature (OC)
INPUT OFFSET VOLTAGE CHANGE
DUE TO THERMAL SHOCK
INPUT OFFSET VOLTAGE WARM-UP DRIFT
+1000
:>
a
+50
"Iii'"
.<::
+500
Q)
'"
<::
2.9
I
fo
g
~
-50
-500
-1000
2
-1
6
4
0
BIAS AND OFFSET CURRENT
20
0.6
a
c
§
15
-
0
~
-- -
~
Bias Current
10
;;-
j...
.............
.............
0.4
~
~
c
0.2
18
~
I!!
C
0
0
S
15
.............
I
I
-4
--3
-2
-1
I
+1
0
+2
Common-Mode Voltage (V)
+4
+5
~
0.8
,
~ 15
~
12
+3
+4
9
-75
0.6
~~rent
'"
::I
Offset Current
9
+3
21
0.8
;(
+2
BIAS AND OFFSET CURRENT
vs TEMPERATURE
vs INPUT COMMON-MODE VOLTAGE
25
+1
Time from Thermal Shock (min)
Time from Power Turn-on (min)
-50
0.4
~
I
o
15
S
0.2
off¥ur~nt
-25
0
+25
+50
~
o
+75
+100 +125
Ambient Temperature (OC)
BURR~BROWNe
2.132
Burr-Brown Ie Data Book-Linear Products
I BEilI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
At Vee = ±5VDC, RL = 1000, and T. = +25°C unless otherwise noted,
COMMON-MODE REJECTION vs FREQUENCY
iii'
N
CD
~
I
80
~
I:
~
o
POWER SUPPLY REJECTION vs FREQUENCY
60
-j--
Q)
-'"
Vo= OVDC
". 40
rf--
II:
'0
o
r-...
.....
j----
--
.....
0
~0
20
0
0
E
E
0
"'r--.
en
a:
w
-20
lk
10k
lOOk
1M
10M
100M
lG
lk
1M
lOOk
10k
Frequency (Hz)
10M
100M
lG
Frequency (Hz)
u::
::i
Q.
:E
0
>
5
5
g.
%
0
"
0
~O
--{j
0
25
50
Time (ns)
'1:11:1'
0
100
200
Time (ns)
BURRRBROWN®
Burr-Brown Ie Data Book-Linear Products
2.133
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
At Vee = ±5VDC,
f\ = 1000, and TA = +25°C unless otherwise noted.
SETTLING TIME vs OUTPUT VOLTAGE CHANGE
SETTLING TIME vs CLOSED-LOOP GAIN
100
II
./
./
/ ' /'"
./
Vo =2V Step
80
o.L V
u;-
.s
CD
60
E
F
'"
c:
~
-------
40
en
20
0
-1
-2
i-'"
~
L.----' V
160
/""
/""
140
G=-1VN
120
~
100
F
80
'"c:
il
en
60
"E
,/
K
or
-4
-5
-5
20
-8
-7
-9
-10
2
.A oL , PSR, AND CMR vs TEMPERATURE
FREQUENCY CHARACTERISTICS vs TEMPERATURE
"C~R
1.5
1ing1e
i'<-r--
ll:
::;;
PSR-----...
60
~~
--
--
1.0
AcL
0.5
50
~
.......
--~
Q.
«
8
6
2.0
lil 70
:E-
cj
4
Output Voltage Change (V)
80
()
--- -0.1%
o
Closed-Loop Gain (V/V)
a:
en
./
)./"
~
40
o
..,'l
/'
0.01%
~
t:-::": f--7
r---~
Gain-Bandwidth
k::'
r--
SleiRate
40
-75
-50
-25
0
+25
+50
+75
-75
+100 +125
-50
-25
NTSC DIFFERENTIAL GAIN vs CLOSED-LOOP GAIN
0.5
f = 3.58MHz
0.4
lc:
'iii
0.3
'iii
E
l!!
IVo =Lto2 11V-
II
a
0.1
yo = oy to o'f..::..:; k'"
-
V
V
ii!!
e."'"
~,.....
~
.c:
2
3
4
+100
+125
0.8
.
,
RL = 7SO(Two Back-Terminated Outputs)
I I I
0.6
Q.
~
f.-- V
7
8
.,
'iii
c:
0.4
l!!
~
I
0
+75
NTSC DIFFERENTIAL PHASE vs CLOSED-LOOP GAIN
,
I
J.
+50
f=3.58MHz
I
Vo =OVto1.4V,""",,
0.2
~
+25
1.0
III. I
RL ='7sodwo Back-Terminated Outputs)
(!l
0
Temperature (OC)
Temperature (OC)
0.2
0
5
Closed-Loop Gain (V/V)
10
2
3
4
5
6
9
10
Closed-Loop Gain (VN)
BURR~BROWNe
2.134
Burr-Brown Ie Data Book-Linear Products
11EI1EI1
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CO NT)
At Vee = ±5VDC, Rl = 100Q, and TA = +25°C unless otherwise noted.
LARGE·SIGNAL
HARMONIC DISTORTION vs FREQUENCY
SMALL-SIGNAL
HARMONIC DISTORTION vs FREQUENCY
--30
G =+2VN
Vo =0.5Vp-p
RL = 50Q
U --40
'"c:
-
_.
~ -50 f-
~
.11
c:
~
:J:
-~--
-70
1....-
?/,
--
21,
-60 I- -
~ f-
-
---
0
'E -50
'""
-60
21
:J:
-70
0
-
..
~
-
r-
VV
en
a:
'3f
-60
100k
100M
..
0
~f-f--
k-"
f---
~
I
c:
.~
CD
/-
r----
:!1-
10M
1M
--40
C";I
/
G =+2VN
Vo = 2Vp-p
RL = 50Q
0
T
I-- f-
1---
-60
100k
g
;,/
:!1-
0
--30
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
W
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1MHz HARMONIC DISTORTION
vs POWER OUTPUT
g
:!1c:
~
~
0
--30
G =+2VN
RL =50Q
fc=1MHz
--40
--40
U
'":!1-c:
-50
~
:J:
-50
G =+2VN
. RL = 50Q
fc =10MHz
0
~
1---+---\--+-
0
a:
w
'E
-60
2f
-70
-_.
-60
~
,
.2
6
«
..J
«
Z
10MHz HARMONIC DISTORTION
vs POWER OUTPUT
--30
is
.~
0
~
:J:
·3f -
------
I
0.125Vp-p
0.25Vp-p
0.5Vp-p
1Vp-p
2Vp-p
+5
+10
-90
-60
£l.
0
-70
-60
-90
-20
-15
-10
-5
0
+15
-20
Power Output (dBm)
APPLICATIONS INFORMATION
DISCUSSION OF PERFORMANCE
The OPA620 provides a level of speed and precision not
previously attainable in monolithic form. Unlike current
feedback amplifiers, the OPA620's design uses a "Classical" operational amplifier architecture and can therefore be
used in all traditional operational amplifier applications.
While it is true that current feedback amplifiers can provide
wider bandwidth at higher gains, they offer many disadvantages. The asymmetrical input characteristics of current
feedback amplifiers (i.e. one input is a low impedance)
prevents them from being used in a variety of applications.
In addition, unbalanced inputs make input bias current errors
difficult to correct. Bias current cancellation through matching of inverting and non-inverting input resistors is impossible because the input bias currents are uncorrelated. Current noise is also asymmetrical and is usually significantly
higher on the inverting input. Perhaps most important, settling time to 0.01 % is often extremely poor due to internal
design tradeoffs. Many current feedback designs exhibit
-15
-10
-5
o
+5
+10
+15
Power Output (dBm)
settling times to 0.01 % in excess of 10 microseconds even
though 0.1 % settling times are reasonable. Such amplifiers
are completely inadequate for fast settling 12-bit applications.
The OPA620's "Classical" operational amplifier architecture employs true differential and fully symmetrical inputs
to eliminate these troublesome problems. All traditional
circuit configurations and op amp theory apply to the
OPA620. The use of low-drift thin-film resistors allows
internal operating currents to be laser-trimmed at waferlevel to optimize AC performance such as bandwidth and
settling time, as well as DC parameters such as input offset
voltage and drift. The result is a wideband, high-frequency
monolithic operational amplifier with a gain-bandwitdth
product of 200MHz, a 0.01 % settling time of 25ns, and an
input offset voltage of lOOIlY.
WIRING PRECAUTIONS
Maximizing the OPA620's capability requires some wiring
precautions and high-frequency layout techniques. Oscilla-
BURR-BROWN
()
.1:
200
.<::
.1
f--
-......
150
11
0
i:
0
-
V
+Isc
K r-- r--
~
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-Ise
100
CIJ
50
-75
-50
-25
0
+25
- r-- ----
+50
+75
+100
+125
Ambient Temperature (OC)
FIGURE 5. Short-Circuit Current vs Temperature.
CAPACITIVE LOADS
The OPA620's output stage has been optimized to drive
resistive loads as low as 500. Capacitive loads, however,
will decrease the amplifier's phase margin which may cause
high frequency peaking or oscillations. Capacitive loads
greater than 20pF should be buffered by connecting a small
resistance, usually 50 to 250, in series with the output as
shown in Figure 6. This is particularly important when
driving high capacitance loads such as flash AID converters.
(Rs typically 50 to 250)
In general, capacitive loads should be minimized for optimum high frequency performance. Coax lines can be driven
if the cable is properly tenninated. The capacitance of coax
cable (29pF/foot for RG-58) will not load the amplifier
when the coaxial cable or transmission line is tenninated in
its characteristic impedance.
COMPENSATION
The OPA620 is internally compensated and is stable in unity
gain with a phase margin of approximately 60°. However,
the unity gain buffer is the most demanding circuit configuration for loop stability and oscillations are most likely to
occur in this gain. If possible, use the device in a noise gain
of two or greater to improve phase margin and reduce the
susceptibility to oscillation. (Note that, from a stability
standpoint, an inverting gain of -IVN is equivalent to a
noise gain of 2.) Gain and phase response for other gains are
shown in the Typical Performance Curves.
The high-frequency response of the OPA620 in a good
layout is very flat with frequency. However, some circuit
configurations such as those where large feedback resistances are used, can produce high-frequency gain peaking.
This peaking can be minimized by connecting a small
capacitor in parallel with the feedback resistor. This capacitor compensates for the closed-loop, high frequency, transfer
function zero that results from the time constant formed by
the input capacitance of the amplifier (typically 2pF after PC
board mounting), and the input and feedback resistors. The
selected compensation capacitor may be a trimmer, a fixed
capacitor, or a planned PC board capacitance. The capacitance value is strongly dependent on circuit layout and
closed-loop gain. Using small resistor values will preserve
the phase margin and avoid peaking by keeping the break
frequency of this zero sufficiently high. When high closedloop gains are required, a three-resistor attenuator (tee network) is recommended to avoid using large value resistors
with large time constants.
SETTLING TIME
Settling time is defined as the total time required, from the
input signal step, for the output to settle to within the
specified error band around the final value. This error band
is expressed as a percentage of the value of the output
transition, a 2V step. Thus, settling time to 0.01 % requires
an. error band of ±200!1V centered around the final value of
2V.
Settling time, specified in an inverting gain of one, occurs in
ouly 25ns to 0.01% for a 2V step, making the OPA620 one
of the fastest settling monolithic amplifiers commercially
available. Settling time increases with closed-loop gain and
output voltage change as described in the Typical Performance Curves. Preserving settling time requires critical attention to the details as mentioned under "Wiring Precautions."
The amplifier also recovers quickly from input overloads.
Overload recovery time to linear operation from a 50%
overload is typically ouly 30ns.
FIGURE 6. Driving Capacitve Loads.
BURR-BROWN®
2.138
Burr-Brown Ie Data Book-Linear Products
I EilEiII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
In practice, settling time measurements on the OPA620
prove to be very difficult to perform. Accurate measurement
is next to impossible in all but the very best equipped labs.
Among other things, a fast flat-top generator and high speed
oscilloscope are needed. Unfortunately, fast flat-top generators, which settle to 0.01% in sufficient time, are scarce and
expensive. Fast oscilloscopes, however, are more commonly
available. For best results a sampling oscilloscope is recommended. Sampling scopes typically have bandwidths that
are greater than 1GHz and very low capacitance inputs.
They also exhibit faster settling times in response to signals
that would tend to overload a real-time oscilloscope.
Figure 7 shows the test circuit used to measure settling time
for the OPA620. This approach uses a 16-bit sampling
oscilloscope to monitor the input and output pulses. These
waveforms are captured by the sampling scope, averaged,
and then subtracted from each other in software to produce
the error signal. This technique eliminates the need for the
traditional "false-summing junction," which adds extra parasitic capacitance. Note that instead of an additional flat-top
generator, this technique uses the scope's built-in calibration
source as the input signal.
Third IMD = 2(OPPP - Po)
where OPPP = third-order output intercept, dBm
Po = output level/tone, dBm/tone
Third IMD = third-order intermodulation ratio
below each output tone, dB
~
o
2pF to 5pF (Adjust lor Optimum Settling)
oto +2V, I = 1.25MHz
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+5VDC
Oto-2V
:::i
0..
:::i
U
~V
OUT
«
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«
Z
To Active Probe
(Channel 2)
DIFFERENTIAL GAIN AND PHASE
Differential Gain (DG) and Differential Phase (DP) are
among the more important specifications for video applications. DG is defined as the percent change in closed-loop
gain over a specified change in output voltage level. DP is
defined as the change in degrees of the closed-loop phase
over the same output voltage change. Both DG and DP are
specified at the NTSC sub-carrier frequency of 3.58MHz.
DG and DP increase with closed-loop gain and output
voltage transition as shown in the Typical Performance
Curves. All measurements were performed using a Tektronix
model VM700 Video Measurement Set.
DISTORTION
The OPA620's Harmonic Distortion characteristics into a
50n load are shown vs frequency and power output in the
Typical Performance Curves. Distortion can be further improved by increasing the load resistance as illustrated in
Figure 8. Remember to include the contribution of the
feedback resistance when calculating the effective load resistance seen by the amplifier.
Two-tone, third-order intermodulation distortion (IM) is an
important parameter for many RF amplifier applications.
Figure 9 shows the OPA620's two-tone, third-order IM
intercept vs frequency. For these measurements, tones were
spaced IMHz apart. This curve is particularly useful for
determiuing the magnitude of the third-order 1M products as
a function of frequency, load resistance, and gain. For
example, assume that the application requires the OPA620
to operate in a gain of +2VN and drive 2Vp-p into 50n at
a frequency of IOMHz. Referring to Figure 9 we find that the
intercept point is +40dBm. The magnitude of the third-order
IM products can now be easily calculated from the expression:
o
For this case OPI'P = 40dBm, Po = IOdBm, and the third- N
order IMD = 2(40 - 10) = 60dB below either IOdBm tone. CD
The OPA620's low IMD makes the device an excellent
choice for a variety of RF signal processing applications.
on sampling scope.
NOTE: Test lixture built using all surface-mount components. Ground
plane used on component side and entire fixture enclosed in metal case.
Both power supplies bypassed with 10l'F Tantalum II 0.011'f ceramic
capacitors. It is directly connected (without cable) to TIME CAL trigger
souroe on Sampling Scope (Data Precision's Data 61 00 with Model 640I plug-in). Input monitored with Active Probe (Channel I).
FIGURE 7. Settling Time Test Circuit.
10MHz HARMONIC DISTORTION
vs LOAD RESISTANCE
-40
Vo= 2Vp-p
S
~
"
0
'E
-50
~
~O
i5
"
-70
~O
~ ~
J\
\...
j
1"--_
0
~
J:
21
G-+2VN
~ r-....
tl
.Q
G=+1VN
I
c--
--~-
=fL---
3t
-1l0
o
100
200
300
400
500
Load Resistance (O)
FIGURE 8. 1OMHz Harmonic Distortion vs Load Resistance.
NOISE FIGURE
The OPA620's voltage and current noise spectral densities
are specified in the Typical Performance Curves. For RF
applications, however, Noise Figure (NF) is often the preferred noise specification since it allows system noise
performance to be more easily calculated. The OPA620's
Noise Figure vs Source Resistance is shown in Figure 10.
Burr-Brown Ie Data Book-Linear Products
2.139
o
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a:
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o
For Immediate Assistance, Contact Your Local Salesperson
RELIABILITY DATA
2-TONE, 3RD ORDER INTERMODULATION
INTERCEPT vs FREQUENCY
Extensive reliability testing has been performed on the
OPA620. Accelerated life testing (2000 hours) at maximUm
operating temperature was used to calculate MTTF at an
ambient temperature of 25°C. These test results yield MTTF
of: Cerdip package = 1.31E+9 Hours, Plastic DIP = 5.02E+7
HourS, and SOIC = 2.94E+7 Hours. Additional tests such as
PCT have also been performed. Reliability reports are available upon request for each of the package options offered.
60
55
E
III
!
1:
;f
a
50
45
40
35
30
~ 25
S
..5
20
ENVIRONMENTAL (Q) SCREENING
15
10
10
20
30
40 50 60
Frequency (MHz)
80
90
100
FIGURE 9. 2-Tone, 3rd Order Intermodulation Intercept vs
Frequency.
SPICE MODELS
Computer simulation using SPICE is often useful when
analyzing the performance of analog circuits and systems.
This is particularly true for Video and RF amplifier circuits
where parasitic capacitance and inductance can have a major
effect on circuit performance. SPICE models using MicroSim
Corporation's PSpice are available for the OPA620. Request
Burr-Brown Application Note AN-167.
The inherent reliability of a semiconductor device is controlled by the design, materials and fabrication of the device
-it .cannot be improved by testing. However, the use of
environmental screening can eliminate the majority of those
units which would fail early in their lifetimes (infant mortality) through the application of carefully selected accelerated
stress levels. Burr-Brown "Q-Screening" provides environmental screening to our standard industrial products, thus
enhancing reliability. The screening illustrated in the following table is performed to selected levels similar to those of
MIL-STD-883.
SCREEN
Stabilization Bake
Temperature Cycling
Bum-In Test
NOISE FIGURE vs SOURCE RESISTANCE
25
N~~~ ~~:~~t +1 ~";~I(;:~s)' j_
20
~ 15
~
10
4kTRs
Temperature = 125°C, 24 hrs
Temperature = -55°C to 125°C, 10 cycles
Temperature = 125°C, 160 hrs minimum
Hermetic Seal
Fine: He leak rate < 1 X 10 atm CC/S
Gross: Perfiourocarbon bubble test
Electrical Tests
As described in specifications tables.
Extemal Visual
Burr-Brown OC5150
DEMONSTRATION BOARDS
,)~
Demonstration boards to speed prototyping are available.
Request DEMl135 for 8-Pin DIP, and DEMI136 for sorc
package.
.......
o
10
Burr-Brown OC4118
NOTE: Q Screening is availabile on SG package .only.
\
5
METHOD
Intemal Visual
100
1k
10k
100k
Source Resistance (Q)
FIGURE 10. Noise Figure vs Source Resistance.
The Information provided herein Is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the use(s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andlor systems.
BURR~BROWNIS
2.140
Burr-Brown Ie Data Book-Linear Products
I EilEiII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
APPLICATIONS
390n
390n
o
Video
Input
0
N
CD
7S0Transmission Una
~
~va~
~
7
0
7ID
7sn
~va~
7Sn
(f)
a:
High output current drive capability (6Vp·p into SOn)
~
allows three back~terminated 750 transmission lines
to be simultaneously driven.
W
V
u:::
aUT
::i
7ID
Q.
:&
c(
-I
c(
FIGURE I L Video Distribution Amplifier.
Z
+SV
H
0
Ei
a:
w
(+)
Q.
0
VOUT
v'No-""IIi'--+---------1
1S.8k!l
:&
C,
OR,
OR.
2k!l
2kn
L---~----~~
1000pF
Ie = 1MHz
BW = 20kHz at -3dB
Q =50
FIGURE 12. High-Q IMHz Bandpass Filter.
° SelectJ,. J,and R,. R, to set
inputstagecurrentforoptimum
performance.
___
_o~V
I.: 1pA
eN : 6nV/'<'Hz at 1MHz
Gain·Bandwidth : 200MHz
Slew Rate : 2S0 VIlIS
Settling Time : 1Sns to 0.1 %
FIGURE 13. Low Noise, Wideband PET Input Op Amp.
aURR .. BROWNe
IEilEilI
Burr-Brown Ie Data Book-Linear Products
2.141
For Immediate Assistance, Contact You; Local Salesperson
5OO0r75O
Transmission Line
~l
50C!
or
750
'L ~_---t
Differential
Optional back-termination resistors. Output swing and gain
doubled if removed.
RG
2::0 >-_+-_-VVVL_ _
500 or 750
Differential
Output
+lTra~ i~ ~ Linel- "' ~ J
___
50C!
50C!
or
or
750
750
Differential Vo~age Gain _ 2VN = 1 + 2R,IRG
Bandwidth. -3dB = 12SMHz
Slew Rate = SOOVII'S
FIGURE 14. Differential Line Driver for 500 or 750 Systems.
2490
2490
2490
2490
Differential
Vo~age
Gain = 2VN = 1 + 2R,1R.
FIGURE 15. Wideband, Fast-Settling Instrumentation Amplifier.
2490
1500
Single~Ended
7
Output
ADC603
12-Bit.
10MHzAlD
Converter
750
Triax
Input
Signal
Input
Analog
Common
FIGURE 16. Unity Gain Difference Amplifier.
FIGURE 17. Differential Input Buffer Amplifier (G=-2VN).
BURR~Bme
2.142
Bu"-Brown Ie Data Book-Linear Products IEiI~
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
BURR-BROWN®
OPA621
11511511
,...
N
CD
~
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Wideband Precision
OPERATIONAL AMPLIFIER
en
EX:
W
u::
FEATURES
APPLICATIONS
• LOW NOISE: 2.3nV/-vHz
• LOW DIFFERENTIAL GAIN/PHASE ERROR
• LOW NOISE PREAMPLIFIER
• LOW NOISE DIFFERENTIAL AMPLIFIER
• HIGH OUTPUT CURRENT: 150mA
• HIGH-RESOLUTION VIDEO
• FAST SETTLING: 25ns (O.Ol%)
• GAIN-BANDWIDTH: 500MHz
• LINE DRIVER
• HIGH-SPEED SIGNAL PROCESSING
• STABLE IN GAINS: ~ 2VIV
• ADC/DAC BUFFER
• LOW OFFSET VOLTAGE: ±lOOIlV
• SLEW RATE: 500V/lls
• ULTRASOUND
• PULSE/RF AMPLIFIERS
• a-PIN DIP, SOIC PACKAGES
• ACTIVE FILTERS
DESCRIPTION
The OPA621 is a precision wideband monolithic operational amplifier featuring very fast settling time, low
differential gain and phase error, and high output current drive capability.
The OPA621 is stable in gains of±2VN or higher. This
amplifier has a very low offset, fully symmetrical differential input due to its "classical" operational amplifier circuit architecture. Unlike "current-feedback" am-
Non.lnverting
Input
Inverting
Input
:J
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0
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~~
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lk
10k
lOOk
1M
10M
0.1
100M
100
lG
lk
10k
1M
lOOk
10M
100M
Frequency (Hz)
Frequency (Hz)
VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY
vs TEMPERATURE
INPUT CURRENT NOISE SPECTRAL DENSITY
3.1
100
3.1
I
10 = 100kHz
If
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10
....
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2.5
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100
lk
10k
lOOk
1M
10M
100M
-{;o
-75
Frequency (Hz)
-25
+25
+50
+75
·15
2.2
0
1.9
+100 +125
INPUT OFFSET VOLTAGE CHANGE
DUE TO THERMAL SHOCK
INPUT OFFSET VOLTAGE WARM-UP DRIFT
+1500
~ +100
S-
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a
0
0
"
,w
+750
.""'"
.."
.<::
.<::
.
0
g
~
-100
-750
-1500
-200
0
2
3
4
Time From Power Turn-On (min)
2.148
5
6
-1
+1
+2
+3
Time From Thermal Shock (min)
Burr-Brown Ie Data Book-Linear Products
+4
..
2.5
Ambient Temperature (0C)
+200
f~
-
2.2
0.1
@
~
~:::::...
Voltage Noise
,w
~
:>
~
2.8
~ntNoise
+5
z
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~
:>
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
At Vee = ±5VDC, RL = lOOn, and TA = +25'C unless otherwise noted.
BIAS AND OFFSET CURRENT
vs INPUT COMMON·MODE VOLTAGE
BIAS AND OFFSET CURRENT
vs TEMPERATURE
28
..-
---
23
«
a
BiasFurrent
E
~ 18
"
()
~
r-
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24
0.8
~
13 1----.
--
0.6
V
V V- - - -
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0.2 0
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I.-,-- ~
------
15
Offset Current
8
-4
-2
-3
-1
I
I
o
+1
12
+2
-75
+4
+3
~k-
-'-"
21
E
~ 18
0.4 ~
..
0.8
- - f---
.b.-
"
0.6
0.4!.
;,
~O
0.2
@
o
0
+25
C/)
a:
/
Offset Current
-25
Common·Mode Voltage (V)
~
...... _---
+50
+75
+100 +125
Ambient Temperature ('C)
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a.
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-4
~~
-3
__
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~~
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0
__
~~
~
__
~
~~~
~
~
~
f - ._.-
I---
1::
65
--..-
29
.E..
Va= OVDC
70
60
,rt-..
. -PSR
0
lk
80
;E~
8
>'
.f-
Frequency (Hz)
"
o
~
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t<
f-
-20
10k
lk
~
+PS
r-..
i~20
I
.s
1,g"
"5
S
"
0
-50
25
o
50
100
Time (ns)
SETILING TIME; vs CLOSED-LOOP GAIN
100
SETILING TIME vs OUTPUT VOLTAGE CHANGE
160
II
Vo =2V Step
140
80
.,.s
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,....-...-
40
i
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LYV
i=
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20
"
0
-1
~
-2
-4
0.1%
-5
-5
"E
,./
0.10
E
i=
r:::
.,.s
V
,/
60
(II
...------
-7
-5
i
V
120
G=-2VN
100
/'
80
60
/"'" l-l.----::- ~
C/)
40
20
0.1%
o
--9
-10
o
4
8
Output Voltage Change (V)
FREQUENCY CHARACTERISTICS vs TEMPERATURE
A Ol ' PSR, AND CMR vs TEMPERATURE
80
2.0
iil' 70
:E-
1.5
CMR
ll:
::;
a:
... V
0.01%
Closed-Loop Gain (VN)
0
200
Time (ns)
PSR~
60
~~
C/)
a.
a 50
-
-,....
..>
AOl
«
0.5
~
settlinfTime
L
t---
1.0
--
'..
"'-f--SlewIRate . /
-
Gain-B ndwidth
o
40
-75
-50
--25
0
+25
+50
Temperature (OC)
+75
+100 +125
-75
-50
-25
0
+25
+50
+75
+100 +125
Temperature (OC)
BURR-BROWN~
2.150
Burr-Brown Ie Data Book-Linear Products
11EiiiI1EiiiI1
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES {CO NT)
At Vcc = ±5VDC, RL = 100Q, and TA = +25°C unless otherwise noted.
NTSC DIFFERENTIAL GAIN vs CLOSED-LOOP GAIN
0.5
~
"
'iii
I
(0
f =3.5BMHz
I
R, = 75Q(Twa Back-Terminated Outputs)
0.4
N
1.0
f= 3.5BMHz
I
,...
NTSC DIFFERENTIAL PHASE vs CLOSED-LOOP GAIN
r---,--,---,-,----,;------r---r-...,.....,
I I
0.3
I
0.8
~
0.6
~
C!l
I
i\:
0.2
:!ii
0.4
0.1
o
:o=.~_i
0.2
o
If
I
R, = 75Q (Two Back-Terminated Outputs)
o
I I I
en
IX:
W
o
2
3
4
6
8
7
9
2
10
3
5
4
Closed-Loop Gain (VN)
6
10
u::
::i
Closed-Loop Gain (VN)
Q.
:::aE
-{JO
-40
;J5
-50
G =+2VN
Vo = 0.5Vp-p
- R, =50Q
.. -
-- V~-·
._--
~
~
~.11
"
I
~
"
~ -50
.~
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.11
-60
~
-70
"
I
-80
1M
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~
IX:
j-....Jf-++++H· ....- .
~
-70
-30
lOOk
Z
G =+2VN
Va = 2Vp-p
R, = 50Q
~-40
/-
-60
standoffs located close to the amplifier's pins can be used to
mount feedback components.
4) Resistors used in feedback networks should have values
of a few hundred ohms for best performance. Shunt capacitance problems limit the acceptable resistance range to about
1ill on the high end and to a value that is within the
amplifier's output drive limits on the low end. Metal film
and carbon resistors will be satisfactory, but wirewound
resistors (even ''non-inductive'' types) are absolutely unacceptable in high-frequency circuits.
5) Surface mount components (chip resistors, capacitors,
etc) have low lead inductance and are therefore strongly
recommended. Circuits using all surface mount components
with the OPA621AU (SOIC package) will offer the best AC
aURRMBRPWNI!I
2.152
Burr-Brown Ie Data Book-Linear Products
11511511
0" Call Customer Service at 1·800·548·6132 (USA Only)
perfonnance. The parasitic package inductance and capacitance for the SOIC is lower than the both the Cerdip and 8lead Plastic DIP.
6) Avoid overloading the output. Remember that output
current must be provided by the amplifier to drive its own
feedback network as well as to drive its load. Lowest
distortion is achieved with high impedance loads.
7) Don't forget that these amplifiers use ±SV supplies.
Although they will operate perfectly well with +SV and
-S.2V, use of ±lSV supplies will destroy the part.
The internal protection diodes are designed to withstand
2.5kV (using Human Body Model) and will provide adequate ESD protection for most nonnal handling procedures.
However, static damage can cause subtle changes in amplifier input characteristics without necessarily destroying the
device. In precision operational amplifiers, this may cause a
noticeable degradation of offset voltage and drift. Therefore,
static protection is strongly recommended when handling
the OPA621.
8) Standard commercial test equipment has not been designed to test devices in the OPA62 I 's speed range. Benchtop op amp testers and ATE systems will require a special
test head to successfully test these amplifiers.
20kO
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en
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9) Terminate transmission line loads. Untenninated lines,
such as coaxial cable, can appear to the amplifier to be a
capacitive or inductive load. By tenninating a transmission
line with its characteristic impedance, the amplifier's load
then appears purely resistive.
w
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OFFSET VOLTAGE ADJUSTMENT
The OPA62 I 's input offset voltage is laser-trimmed and will
require no further adjustment for most applications. However, if additional adjustment is needed, the circuit in Figure
1 can be used without degrading offset drift with temperature. Avoid external adjustment whenever possible since
extraneous noise, such as power supply noise, can be inadvertently coupled into the amplifier's inverting input tenninal. Remember that additional offset errors can be created by
the amplifier's input bias currents. Whenever possible, match
the impedance seen by both inputs as is shown with R3. This
will reduce input bias current errors to the amplifier's offset
current, which is typically only 0.21JA.
INPUT PROTECTION
Static damage has been well recognized for MOSFET devices, but any semiconductor device deserves protection
from this potentially damaging source. The OPA621 incorporates on-chip ESD protection diodes as shown in Figure 2.
This eliminates the need for the user to add external protection diodes, which can add capacitance and degrade AC
perfonnance.
All pins on the OPA621 are internally protected from ESD
by means of a pair of back-to-back reverse-biased diodes to
either power supply as shown. These diodes will begin to
conduct when the input voltage exceeds either power supply
by about 0.7V. This situation can occur with loss of the
amplifier's power supplies while a signal source is still
present. The diodes can typically withstand a continuous
current of 30mA without destruction. To insure long tenn
reliability, however, diode current should be externally limited to lOrnA or so whenever possible.
11.
:::as
'---v----'
V,N or Ground
10) Plug-in prototype boards and wire-wrap boards will not
be satisfactory. A clean layout using RF techniques is
essential; there are no shortcuts.
c(
....c(
Output Trim Range" +V cc ( R2 ) to -v cc ( R2 )
RTrim
RTri~
* R3 is optional and can be used to cancel offset errors due to input bias
currents.
tia::
FIGURE 1. Offset Voltage Trim.
OUTPUT DRIVE CAPABILITY
The OPA621's design uses large output devices and has
been optimized to drive SOO and 7S0 resistive loads. The
device can easily drive 6Vp-p into a SOO load. This highoutput drive capability makes the OPA621 an ideal choice
for a wide range of RF, IF, and video applications. In many
cases, additional buffer amplifiers are unneeded.
Internal current-limiting circuitry limits output current to
about ISOmA at 2S0C. This prevents destruction from accidental shorts to common and eliminates the need for external
current-limiting circuitry. Although the device can withstand momentary shorts to either power supply, it is not
recommended.
Many demanding high-speed applications such as ADC/
DAC buffers require op amps with low wideband output
impedance. For example, low output impedance is essential
when driving the signal-dependent capacitances at the inputs
of flash AID converters. As shown in Figure 3, the OPA621
maintains very low closed-loop output impedance over frequency. Closed-loop output impedance increases with frequency since loop gain is decreasing with frequency.
v
+ cc
E~ernal ~_3
Pin
I
ESD Protection diodes internally
_____~~n:~~o all::~:~1
Circuitry
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Teflone E. I. Du Pont de Nemours & Co.
BURR-BROWN~
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FIGURE 2. Internal ESD Protection.
Burr-Brown Ie Data Book-Linear Products
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2.153
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250
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100
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-25
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Ambient Temll"rature eG)
Frequency (Hz)
FIGURE 5. Short-Circuit Current vs Temp!rature.
FIGURE 3. Small-Signal Output Impedance vs Frequency.
and the junction-to-ambient thermal resistance, ()'A' of each
package. The variation of short-circuit current with temperature is shown in Figure 5.
THERMAL CONSIDERATIONS
The OPA621 does not require a heat sink for operation in
most environments. The use of a heat sink, however, will
reduce the internal thermal rise and will result in cooler,
more reliable operation. At extreme temperatures and under
full load conditions a heat sink is necessary. See "Maximum
Power Dissipation" curve, Figure 4.
The internal power dissipation is given by the equation P D=
PDQ + PDL' where PDQ is the quiescent power dissipation and
PDL is the power dissipation in the output stage due to the
load. (For±Vcc =±5V, PDQ = lOV X28mA = 28OmW, max).
For the case where the amplifier is driving a grounded load
(1\) with a DC voltage (±VOUT) the maximum value of P DL
occurs at ±VOUT = ±Vcel2, and is equal to PDL' max =
(±Vcc)2/41\. Note that it is the voltage across the output
transistor, and not the load, that determines the power
dissipated in the output stage.
When the output is shorted to common P DL = 5V X 150mA
= 750mW. Thus, P D = 280mW + 750mW = lW. Note that
the short-circuit condition represents the maximum amount
of internal power dissipation that can be generated. Thus, the
"Maximum Power Dissipation" curve starts at lW and is
derated based on a 175°C maximum junction temperature
1.2
~
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Gerdip /
Package
.........
0.6
0.4
In general, capacitive loads should be minimized for optimum high frequency performance. Coax lines can be driven
if the cable is properly terminated. The capacitance of coax
cable (29pF/foot for RG-58) will not load the amplifier
when the coaxial cable or transmission line is terminated in
its characteristic impedance.
(Rs typically 50 to 250)
I
Plastic, SOIG
Packages
-
~
FIGURE 6. Driving Capacitive Loads.
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CAPACITIVE LOADS
The OPA621's output stage has been optimized to drive
resistive loads as low as son. Capacitive loads, however,
will decrease the amplifier's phase margin which may cause
high frequency peaking or oscillations. Capacitive loads
greater than 15pF should be buffered by connecting a small
resistance, usually 5n to 25n, in series with the output as
shown in Figure 6. This is particularly important when
driving high capacitance loads such as flash AID converters.
0.2
0
0
+25
+50
+75
+100
Ambient Temperature (oG)
FIGURE 4. Maximum Power Dissipation.
+125
+150
The OPA621 is stable in inverting gains of "C.-2VN and in
non-inverting gains "C.+2VN. Phase margin for both configurations is approximately 50°. Inverting and non-inverting gains of unity should be avoided. The miuimum stable
gains of +2VN and -2VN are the most demanding circuit
configurations for loop stability and oscillations are most
'151151'
BURR-BROWN®
2.154
Burr-Brown Ie Data Book-Linear Products
Dr, Call Customer Service at 1·800·548·6132 (USA Only)
likely to occur in these gains. If possible, use the device in
a noise gain greater than three to improve phase margin and
reduce the susceptibility to oscillation. (Note that, from a
stability standpoint, an inverting gain of -2VN is equivalent
to a noise gain of 3.) Gain and phase response for other gains
are shown in the Typical Perfonnance Curves.
The high-frequency response of the OPA621 in a good
layout is flat with frequency for higher-gain circuits. However, low-gain circuits and configurations where large feedback resistances are used, can produce high-frequency gain
peaking. This peaking can be minimized by connecting a
small capacitor in parallel with the feedback resistor. This
capacitor compensates for the closed-loop, high frequency,
transfer function zero that results from the time constant
fonned by the input capacitance of the amplifier (typically
2pF after PC board mounting), and the input and feedback
resistors. The selected compensation capacitor may be a
trimmer, a fixed capacitor, or a planned PC board capacitance. The capacitance value is strongly dependent on circuit
layout and closed-loop gain. Using small resistor values will
preserve the phase margin and avoid peaking by keeping the
break frequency of this zero sufficiently high. When high
closed-loop gains are required, a three-resistor attenuator
(tee network) is recommended to avoid using large value
resistors with large time constants.
tion to the details as mentioned under "Wiring Precautions."
The amplifier also recovers quickly from input overloads.
Overload recovery time to linear operation from a 50%
overload is typically only 3Ons.
,...
In practice, settling time measurements on the OPA621
prove to be very difficult to perfonn. Accurate measurement
C\I
is next to impossible in all but the very best equipped labs. CO
Among other things, a fast flat-top generator and high speed
oscilloscope are needed. Unfortunately, fast flat-top generators, which settle to 0.01 % in sufficient time, are scarce and
expensive. Fast oscilloscopes, however, are more COmmOnlY. .
available. For best results a sampling oscilloscope is recom
mended. Sampling scopes typically have bandwidths tha
are greater than IGHz and very low capacitance inputs.
They also exhibit faster settling times in response to signals
that would tend to overload a real-time oscilloscope.
~
o
en
Figure 7 shows the test circuit used to measure settling time
for the OPA621. This approach uses a 16-bit sampling
oscilloscope to monitor the input and output pulses. These
wavefonns are captured by the sampling scope, averaged,
and then subtracted from each other in software to produce
the error signal. This technique eliminates the need for the
traditional "false-summing junction," which adds extra parasitic capacitance. Note that instead of an additional flat-top
generator, this technique uses the scope's built-in calibration
source as the input signaL
SETTLING TIME
Settling time is defined as the total time required, from the
input signal step, for the output to settle to within the
specified error band around the final value. This error band
is expressed as a percentage of the value of the output
transition, a 2V step. Thus, settling time to 0.0 I % requires
an error band of ±200IlV centered around the final value of
2V.
Settling time, specified in an inverting gain of two, occurs in
only 25ns to 0.01 % for a 2V step, making the OPA621 one
of the fastest settling monolithic amplifiers commercially
available. Settling time increases with closed-loop gain and
output voltage change as described in the Typical Perfonnance Curves. Preserving settling time requires critical atten-
DIFFERENTIAL GAIN AND PHASE
Differential Gain (OG) and Differential Phase (OP) are
among the more important specifications for video applications. OG is defined as the percent change in closed-loop
gain over a specified change in output voltage leveL OP is
defined as the change in degrees of the closed-loop phase
over the same output voltage change. Both OG and OP are
specified at the NTSC sub-carrier frequency of 3.58MHz.
OG and OP increase with closed-loop gain and output
voltage transition as shown in the Typical Perfonnance
Curves. All measurements were perfonned using a Tektronix
model VM700 Video Measurement Set.
lpF to 4pF (Adjust lor Optimum Settling)
o to +2V, I
=1.25MHz
Oto-2V
U
NOTE: Test fixture built using all surface-mount components. Ground
plane used on component side and entire fixture enclosed in metal case.
Both power supplies bypassed with IOI'F Tantalum II 0.D111F ceramic
capacitors. It is directly connected (without cable) to TIME CAL trigger
source on Sampling Scope (Data Precision's Data 61 00 with Model 6401 plug-in). Input monitored with Active Probe (Channell).
~
V
OUT
To Active Probe (Channel 2)
on sampling scope.
FIGURE 7. Settling Time Test Circuit.
Burr-Brown Ie Data Book-Linear Products
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20
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60
80
100
Temperature (OC)
Temperature (OC)
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100M
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10
20
30
40
50
60
70
80
90
-6
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Time (ns)
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-30
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Frequency (Hz)
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BANDWIDTH vs OUTPUT VOLTAGE
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FreQuencv (Hz)
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Frequency (Hz)
0
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BANDWIDTH vs RlOAD
20
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Frequency (Hz)
FREQUENCY RESPONSE vs C LOAD
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100M
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BURR~BROWN~
Burr-Brown Ie Data Book-Linear Products
I EilEiII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
VOLTAGE·FEEDBACK AMPLIFIER (Figure 5)
At V'" = ±5VDC, 10 =±5mA, GeL = +2VN, RCOAD = 1000, R,auRCE = 500, Ra = 4300, Roo = 1500 and TA = +25°C unless otherwise specified.
HARMONIC DISTORTION vs FREQUENCY
0
GeL = +2VN, VOUT = 2.8Vp·p, R LOAD
1--
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GROUP DELAY TIME vs FREQUENCY
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10M
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300k
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Frequency (Hz)
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Frequency (Hz)
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INPUT OFFSET VOLTAGE WARMUP
100
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80
70
60
50
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30
20
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Time (Minutes)
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Time (minutes)
CLOSED LOOP OFFSET VOLTAGE vs TEMPERATURE
QUIESCENT CURRENT vs TEMPERATURE
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-2
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-6
-8
-10
-12
-14
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--40
-20
20
40
60
80
100
--40
Temperature ("C)
-20
20
40
60
80
100
Temperature ("C)
BURR-BROWN®
IEilEilI
Burr-Brown Ie Data Book-Linear Products
2.181
For Immediate Assistance, Contact Your Loca/Salesperson
TYPICAL PERFORMANCE CURVES
At Vcc
(CONT)
=±5VDC, RL = 1000, 10 =±4mA, R,• = 1500, TAM, =+25°C unless otherwise noted ..
OUTPUTtMPEDANCEvsFREQUENCY
INPUT IMPEDANCE vs FREQUENCY
100
10M
1M
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20
30
40
50
Time (ns)
60
70
80
40
-40
90
-160
100
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160
120
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160
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Frequency (Hz)
S.§.
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100M
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OPEN LOOp·GAIN vs FREQUENCY
iD
10M
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Frequency (Hz)
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o
10
20
30
40
50
60
70
80
90
100
Time (ns)
BURR-BROWN®
2.182
Burr"Brown Ie Data Book-Linear Products
IEilEilI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
AI Vee = ±5VDC, AL = 100!!,IQ =±4mA, A,. = 150!!, TAM' = +25°C unless otherwise noled.
LAAGE SIGNAL PULSE AESPONSE
LAAGE SIGNAL PULSE AESPONSE
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20
30
40
Time (ns)
50
60
70
SO
90
100
Time (ns)
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0.2Vp-p
I
Gel =+2VN
'-1
i
g.
io
5
o
-5
-10
\\
1 1 11
1M
10M
100M
20
""
5Vp-p
IG
"
:\
0.6Vp-p
IIIII I
f
--, \
0.2Vp-p
I
-20
10
"
11i~VP-~
-15
15
~
~;~VP-p
'5
5
-5
-10
% -15
0
\
-20
1
Gel =+10VN
-I 111111
-25
dB
300k
1M
-25
10M
lG
3G
BANDWIDTH vs OUTPUT VOLTAGE
BANDWIDTH vs OUTPUT VOLTAGE
I
1\ \
Frequency (Hz)
20
10
l
..L
Frequency (Hz)
15
z
o
......
5
'5
\
~\
0.2Vp-p
-15
5Vp-p
10
G
IIII I
15
C.
c:
0.6Vp-p
CI
Jg
"
.~
z
"
100n
0::
son
...,
1\
~
10
f
1\
Gel =+2VN, R,
100k
1M
=R2 = 300n, Y'N = 1.0Vp-p
10M
100M
Frequency (Hz)
1
1G
3G
100
1k
10k
100k
1M
10M
Frequency (Hz)
IURR-aROWNilII
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Dr, Call Customer Service at 1·800·548·6132 (USA Dnly)
DISCUSSION OF
PERFORMANCE
Requiring very low quiescent power, the OPA623 achieves
its exceptional AC performance by using the current-feedback topology. This wide-band monolithic operational amplifier is designed for gain applications of up to 20VN,
where power and cost are of primary concern.
Operating from a ±5V supply, the OPA623 consumes only
40mW, yet maintains a 350MHz large-signal bandwidth at
VOUT = 2.8Vp-p and a 2100V/J.IS slew rate. Benefiting from
the current-feedback architecture, the OPA623 offers stable
operation with no compensation capacitor, even at unity
gain.
With its low differential gain and phase errors of typically
0.12% and 0.05° at4.43MHz, the OPA623 meets the performance and cost requirements of high-volume broadcast and
HDTV applications.
The OPA623's large-signal bandwidth, high slew rate, excellent pulse response, and high drive capabilities are features well-suited to wide-band RGB video applications, RF
instruments, and even high-speed digital communication
systems.
For most circuit configurations, the OPA623 current-feedback op amp can be treated like a conventional op amp. As
with a voltage-feedback op amp, the feedback network
connected to the inverting input controls the closed-loop
gain. But with a current-feedback op amp, the impedance of
the feedback network also controls the open-loop gain and
frequency response. Feedback resistor values can be selected to provide nearly constant closed-loop bandwidth
over a wide range of gains and flat gain adjustment vs
frequency.
DESCRIPTION
C")
N
CO
~
o
_
A wide-band operational transconductance amplifier ( O T A ) "
and an output buffer are the main blocks of a currentfeedback op amp. The simplified circuit diagram is illus- (/)
trated in Figure 2. The OTA consists of a complementary
unity-gain amplifier and a subsequent current mirror. The
input buffer is connected across the inputs of the op amp.
The voltage at the high-impedance +In terminal is transferred to the -In terminal at a low impedance. The current
mirrors reflect any current flowing into or out of the +In
terminal by a fixed ratio to the high-impedance OTA output,
which is directly connected to the complementary output
buffer. It is designed to drive low-impedance transmission
a:
w
u::
:::::i
a..
:E
4o Internal Connection
, ,+Vs
OtfsetTrim
-Vs
TYPICAL PERFORMANCE CURVES
T, ~ +25'C, Vs
=±15V unless otherwise noted,
TOTAL INPUT VOLTAGE NOISE va BANDWIDTH
INPUT VOLTAGE NOISE SPECTRAL DENSITY
100
lk
~
10
j
p-p
Noise Bandwidth:
0.1 Hz to indicated
frequency,
f
"
i
0.1
RMS
Lli
0.Q1
10
100
lk
10k
lOOk
1M
10
10M
100
VOLTAGE NOISE vs SOURCE RESISTANCE
r
lk
100
,~
1M
10M
10M
100M
OPEN LOOP GAIN vs FREQUENCY
III
_ 100
"
OPA637
ED
:!l- 80
c:
'iii
riilstir
lk
lOOk
120
1
10k
140
o~A~di ~ ~9Sis~
V
lk
Bandwidth (Hz)
Frequency (Hz)
10k
(!l
Compsrison w~h IOPA27 Bipolar Op
Amp + Resistor' ~ ~
~olii <>r~;
lOOk
ttr1M
Source Resistance (0)
~
=
~
1~kl~z 110M
40
OPA627
20
Spot NOisL
it
60
0
100M
-20
10
100
lk
10k
lOOk
1M
Frequency (Hz)
IURRaaRoWN@
2.196
Burr-Brown Ie Data Book-Linear Products _ EilEiI,
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C,
v, =±15V unless othelWise noted,
......
CW)
OPA627 GAIN/PHASE vs FREQUENCY
30
...----r-r-r-rn-n-r--;---,--r,..,...,.,.n -90
~
OPA637 GAIN/PHASE vs FREQUENCY
30~r-----~~~~~~~~--~~,,-n~ ~O
f-------~=:::ti'
--, .. -
C'I
CD
~
·--rt-TTn
-120
-150
I 0
fa
en
0..
-180
-10 L-_-'---"--"-I-.u...u..._ _"'--'-_l''-'-''''''''..... -210
10
100
-10 L...._...J...--1.--1.-I-.u...u..._ _"'--I--'-..........I..I..u -210
10
100
Frequency (MHz)
Frequency (MHz)
a:
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D.
:E
,,-6---<>---0 Out
>'-......-oOul
In
Board Layout for Input Guarding:
Guard lop and bottom of board.
Alternate-use Teflon" standoff for sen·
0---\:-+"'"
>6_""'-0 Out
Cas.(')
sitive input pins.
Teflon" E.!. du Ponl de Nemours & Co.
NOTE: (I) Case conn.cted to pin 8 on
TO-99 package only.......... text.
To Guard Drive
FIGURE 4. Connection of Input Guard for Lowest lB.
BURR-BROWNe
,E5IE5II
..J
c(
Burr-Brown Ie Data Book-Linear Products
2.201
For Immediate Assistance, Contact Your Local Salesperson
pins. In most cases O.l¢' ceramic capacitors are adequate.
The OPA627/637 is capable of high output current (in
excess of 45mA). Applications with low impedance loads or
capacitive loads with fast transient signals demand large
currents from the power supplies. Larger bypass capacitors
such as I¢' solid tantalum capacitors may improve dynamic
performance in these applications.
INPUT BIAS CURRENT
Oifet fabrication of the OPA627/637 provides very low
input bias current. Since the gate current of a FET doubles
approx:inuitelyevery lOoC, to achieve lowest input bias
current, the die temperature should be kept as low as possible. The high speed and therefore higher quiescent current
of the OPA627/637 can lead to higher chip temperature. A
simple press-on heat sink such as the Burr-Brown model
807HS (TO-99 metal pacIalge) can reduce chip temperature
by approximately 15°C, lowering the I" to one-third its
warmed-up value. The 807HS heat sink can also reduce lowfrequency voltage noise caused by air currents and thermoelectric effects. See the data sheet on the 807HS for details.
Temperature rise in the plastic DIP and SOlC packages can
be miuimized by soldering the device to the circuit board.
Wide copper traces will also help dissipate heat.
The OPA627/637 may also be operated at reduced power
supply voltage to minimize power dissipation and temperature rise. Using ±5V power supplies reduces power dissipation to one-third of that at ±l5V. This reduces the I" of TO99 metal package devices to approximately one-fourth the
value at ±15V.
Leakage currents between printed circuit board traces can
easily exceed the input bias current of the OPA627/637. A
circuit board "guard" pattern (Figure 4) reduces leakage
effects. By surrounding critical high impedance input circuitry with a low impedance circuit connection at the same
potential, leakage current will flow harmlessly to the lowimpedance node. The case connection (TO-99 metal pack-
age only) may also be driven at guard potential to minimize
any leakage which might occur from the input pins to the
case. The case is not internally connected to -Vs'
Input bias current may also be degraded by improper handling or cleauing. Contamination from handling parts and
circuit boards may be removed with cleaning solvents and
deiouized water. Each rinsing operation should be followed
by a 30-minute bake at 85°C.
Many FET-input op amps exhibit large changes in input bias
current with changes in input voltage. Input stage cascode
circuitry makes the input bias current of the OPA627/637
virtually constant with wide common-mode voltage changes.
This is ideal for accurate high input-impedance buffer applications.
Ikil
200pF
G=+1
BW ~IMHz
For Approximate Butterworth Response:
C F = 2 RoCL
R F » Ro
RF
f
_
-odB - 2~~R,
1
F\, Go G.
FIGURE 6. Driving Large Capacitive Loads.
PHASE-REVERSAL PROTECTION
The OPA627/637 has internal phase-reversal protection.
Many FET-input op amps exhibit a phase reversal when the
input is driven beyond its linear common-mode range. This
is most often encountered in non-inverting circuits when the
input is driven below -12V, causing the output to reverse
into the positive rail. The input circuitry of the OPA627/637
does not induce phase reversal with excessive commonmode voltage, so the output limits into the appropriate rail.
(2)
OUTPUT OVERLOAD
When the inputs to the OPA627/637 are overdriven, the
output voltage of the OPA627/637 smoothly limits at approximately 2.5V from the positive and negative power
supplies. If driven to the negative swing limit, recovery
takes approximately 50Ons. When the output is driven into
the positive limit, recovery takes approximately 6118. Output
recovery of the OPA627 can be improved using the output
clamp circuit shown in Figure 5. Diodes at the inverting
input prevent degradation of input bias current.
HP 5082-2811
Diode Bridge
BB: PWS74O-3
Ikil
ZD, : IOV IN961
>------QVo
Clamps output
atVo = ±11.SV
FIGURE 5. Clamp Circuit for Improved Overload Recovery.
BURR-BROWNe
2.202
Burr-Brown Ie Data Book-Linear Products
I
E5I E511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
CAPACITIVE LOADS
As with any high-speed op amp, best dynamic performance
can be achieved by minimizing the capacitive load. Since a
load capacitance presents a decreasing impedance at higher
frequency, a load capacitance which is easily driven by a
slow op amp can cause a high-speed op amp to perform
poorly. See the typical curves showing settling times as a
function of capacitive load. The lower bandwidth of the
OPA627 makes it the better choice for driving large capacitive loads. Figure 6 shows a circuit for driving very large
load capacitance. This circuit's two-pole response can also
be used to sharply limit system bandwidth. This is often
useful in reducing the noise of systems which do not require
the full bandwidth of the OPA627.
D
D
./
Optional Rs
-Vs
-::-
D: IN4148- 25nA Leakage
2N4117A-lpA Leakage
Siliconix
~
=--h}-
(a)
D
OPA627
D:2N390~
(b)
INPUT PROTECTION
The inputs of the OPA627/637 are protected for voltages
between +Vs + 2V and -Vs - 2V. If the input voltage can
exceed these limits, the amplifier should be protected. The
diode clamps shown in Figure 7a will prevent the input
voltage from exceeding one forward diode voltage drop
beyond the power supplies-well within the safe limits. If
the input source can deliver current in excess of the maximum forward current of the protection diodes, use a series
resistor, R,., to limit the current. Be aware that adding
resistance to the input will increase noise. The 4nV/-mz
theoretical thermal noise of a lill resistor will add to the
4.5nVl-mz noise of the OPA627/637 (by the square-root of
the sum of the squares), producing a total noise of 6nVI.yHz.
Resistors below l00Q add negligible noise.
~-
'I
NC
::::i
FIGURE 7. Input Protection Circuits.
Q.
times larger than the input bias current of the OPA627/637.
Leakage current of these diodes is typically much lower and
may be adequate in many applications. Light falling on the
junction of the protection diodes can dramatically increase
leakage current, so common glass-packaged diodes should
be shielded from ambient light. Very low leakage can be
achieved by using a diode-connected PET as shown. The
2N4117 A is specified at 1pA and its metal case shields the
junction from light.
Leakage current in the protection diodes can increase the
total input bias current of the circuit. The specified maximum leakage current for commonly used diodes such as the
IN4148 is approximately 25nA~more than a thousand
Sometimes input protection is required on l/V converters of
inverting amplifiers (Figure 7b). Although in normal operation, the voltage at the summing junction will be near zero
(equal to the offset voltage of the amplifier), large input
transients may cause this node to exceed 2V beyond the
LARGE·SIGNAL RESPONSE
SMALL-SIGNAL RESPONSE
(A)
When used as a unity-gain buffer, large common-mode input voltage steps
produce transient variations in input-~tage currents. This causes the rising
edge to be slower and falling edges to be faster than nominal slew rates
observed in higher-gain circuits.
FIGURE 8. OPA627 Dynamic Performance, G
(6)
~G-l
~
= +1.
BURR·BROWN®
I EiI Eill
Burr-Brown Ie Data Book-Linear Products
en
a:
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u:::
2.203
::a:
8
-10
0
(0)
-10
6pF'
'NOTE: Optimum value will
depend on circuit board lay·
out and stray capacitanoe at
the Inverting input.
When driven with a very fast input step (left), common·mode
transients cause a slight variation in Input stage currents which
will reduoe output slew rate. If the input step slew rate is reduced
(right), output slew rate will increase slightly.
G=-1
FIGURE 9. OPA627 Dynamic Performance, G =-1.
OPA637
LARGE-SIGNAL RESPONSE
OPA637
SMALL-6IGNAL RESPONSE
+10
~
0
}
+100
~5
(E)
(F)
0
>0
-10
-100
4pF'
soon
'NOTE: Optimum value will depend on circuit
board layout and capacijance at inverting input.
FIGURE 10. OPA637 Dynamic Response, G = 5.
2.204
:;':i'"
IoU
Burr-Brown Ie Data Book-Linear Products .~L:-=~-="_
Or, Call Customer Service at 1·800·548·6132 (USA Only)
Error Out
R,• Ry
C,
Error Band
(0.01%)
~
-::-
High Quality
Pulse Generator
~
-::-
OPA627
OPA637
2kn
6pF
to.SmV
SOOll
4pF
to.2mV
NOTE: C, is selected for best settling time performance
depending on test fixture layout. Once optimum value is
determined. a fixed capacitor may be used.
tSV
Out
en
a:
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u:::
FIGURE 11. Settling Time and Slew Rate Test Circuit.
-In
Gain = 100
CMRR= 116dB
Bandwidth = 1MHz
0------1
::::i
Q.
2:----;;~;------~~k~--: S
Input Common-Mode
Range = t5V
101ll
I
R"
3pF
:E
«
..J
«
Z
I
:
I
INA10S
Differential
:
Amplifier
I
I
I
Output
16
o
31
:
+In
~
2Skn
!.----------
0------1
a:
w
-::-
Differential Voltage Gain = 1 + 2RF lAo
Q.
o
FIGURE 12. High Speed Instrumentation Amplifier, Gain = 100.
-In
Gain = 1000
CMRR= 116dB
Bandwidth =400kHz
0------1
,------------------1
2I
Input Common-Mode
Range = tl0V
10kn
100kn
I
:
I
:
31
3pF
:
IS
I
I
I
I
INA106
Differential
Amplifier
Output
16
10kn
'----------
+In o-----~
Differential Voltage Gain = (1 + 2R F IRG)
•
10
FIGURE 13. High Speed Instrumentation Amplifier, Gain = 1000.
This composite amplifier uses the OPA603 current-feedback op amp to
provide extended bandwidth and slew rate at high closed-loop gain. The
feedback loop is closed around the composite amp. preserving the
precision input characteristics of the OPA627/637. Use separate power
supply bypass capacitors for each op amp.
>-+--.--0 Va
RL ~ 150ll
for tl0V Out
*Minimize capacitance at this node.
GAIN
(VN)
R,
(0)
50.5
49.9
R,.
R,.
(teO)
(0)
4.99
4.99
20
12
R,
(teO)
-3dB
SLEW RATE
(MHz)
(V/J.I8)
IS
11
700
500
NOTE: (1) Closest 112% value.
FIGURE 14. Composite Amplifier for Wide Bandwidth.
BURR~aRowN
~
50
25
".
0
-25
-60
oovcurrj"t
'-...
5
-75
-...:j.
-100
o
-125
60
80
100
120
140
160
-60
180
o
-25
-- -- -r-.
25
--
50
1:
1.5 ~
c3
~
1.0
/'
i
j
0.5 0
o
75
100
125
CMR; PSR, and AcL VB TEMPERATURE
SUPPLY CURRENT VB TEMPERATURE
32
2.0 ~
Temperature (OC)
Time(s)
34
2.5
----
....... ~
40
4
~ Bi~c~jt
"'-
75
20
3
BIAS and OFFSET CURRENT vs TEMPERATURE
INPUT OFFSET VOLTAGE WARM-UP DRIFT
125
"g>
2
Common-Mode Voltage (V)
Common-Mode Voltage (V)
~
o
-1
120
CIMR
115
I-'\.
-r--~~
iii" 110
:E.
r--.
J 105
a::
fe
a::
::;
r--. ......
()
100
r---- AOL
95
/
I---
90
---
24
85
22
-60
--25
o
25
i
50
Temper1l\Ure (OC)
75
100
125
80
-60
--25
o
25
50
75
100
125
Temperature (OC)
BURR~BROWNQfI
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Burr-Brown Ie Data Book-Linear Products
IEilE!I'
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
At V co
(CONT)
=±5VDC, R, = t 000 (including leedback impedance), and TA =+25°C unless otherwise noted.
RANGE 01 CHANGE in Vos
vs TEMPERATURE RELATIVE to Vos at 25°C
5MHz HARMONIC DISTORTION vs TEMPERATURE
-70
1.0
:>
§.
"
f
~
g
0.5
~
-80 t----- -
~
~5
- -----j------t----f---t---+------
~
0
.Q
~
.5
"~
~
=+2VJv
Vo =2Vp-p -Rl = 1000
-75
-0.5
III
J:
.t:
(,)
-1.0
-50
-25
25
50
75
100
-90
-95
-100
-50
125
-- - 21-
-
..-
-~----
---t------j - -
-i--+--rj---r~--31
-25
25
50
75
en
a:
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100
125
Temperature (OC)
Temperature eC)
u::
::::;
D-
::i
DISCUSSION OF
PERFORMANCE
The OPA628's classical operational amplifier architecture
employs true differential and fully symmetrical inputs allowing optimal performance in either inverting or non-inverting
circuit applications. All traditional circuit configurations and
op amp theory apply to the OPA628. The use oflow drift thin
film resistors allows internal operating currents to be laser
trimmed at wafer level to optiruize AC performance such as
distortion, bandwidth and settling time, as well as DC parameters such as input offset voltage. The result is a' wideband,
high frequency monolithic operational amplifier with a gainbandwidth product of 150MHz, a spurious free dynaruic
range (SFDR) of 90dB, and input offset voltage of 5001lV.
The layout considerations described in the "Printed Circuit
Board Guidelines" section must be followed to achieve the
best possible performance of the OPA628.
DIFFERENTIAL GAIN AND PHASE
Differential Gain (DG) and Differential Phase (DP) are
among the more important specifications for video applications. DG is defined as the percent change in closed-loop
gain over a specified change in output voltage level. DP is
defined as the change in degrees of the closed-loop phase
over the same output voltage change. Both DG and DP are
specified at the NTSC sub-carrier frequency of 3.58MHz and
the PAL subcarrier of 4.43MHz. All NTSC measurements
were performed using a Tektronix model VM700A Video
Measurement Set. All PAL measurements were performed
using a Rohde & Schwarz Video Analyze! UAF.
DG and DP of the OPA628 were measured with the amplifier
in a gain of +2VN with 750. input impedance and the output
back-terruinated in 750.. The input signal selected from the
generator was a OV to 1.4V modulated ramp with sync pulse.
With these conditions the test circuit shown in Figure 1
delivered a lOOIRE modulated ramp to the 750. input of the
video analyzer. The signal averaging feature of the analyzer
was used to establish a reference against which the performance of the amplifier was measured. Signal averaging was
also used to measure the DG and DP of the test signal in order
to eliminate the generator's contribution to measured amplifier performance. Typical performance of the OPA628 is
0.015% differential gain and 0.015 0 differential phase to
both NTSC and PAL standards. Increasing the closed loop
gain degrades the DP and DG.
GAIN FLATNESS
Small signal ±O.ldB gain flatness can be achieved up to
30MHz in a non-inverting gain of +2VN through careful
layout of the printed circuit board and frequency shaping of
the feedback network. Frequency shaping is achieved empirically by placing a small capacitor in parallel with either
the feedback resistor or the input resistor of the OPA628 to
compensate for printed circuit parasitic capacitance. A capacitor in the range of approximately I pF to 20pF is suggested. Printed circuit board layout design will deterruine if
the capacitor should be placed across the feedback resistor or
the input resistor.
Small signal ±O.ldB gain flatness of greater than 30MHz can
be achieved at a gain of +lVN. To eliruinate the effects of
package lead inductance, a small value resistor should be
included in the feedback path. Maxiruizing gain flatness for
a particular layout requires optiruization of the feedback
resistor; an approximate value is 500. to 750..
DISTORTION
The OPA628's Harmouic Distortion characteristics when
driving a lOOn load are shown vs frequency and vs voltage
output in the Typical Performance Curves. Distortion can be
further optiruized by decreasing output loading as also shown
in Typical Performance Curves. Include the contribution of
BURR-BROWN@
I E:I E:l1
Burr-Brown Ie Data Book-Linear Products
2.213
-"NV''-_--<---l
V1N or Ground
Output Trim Range" +V co(
_t:t.l )to -V cc (
RTrim
R,)
RTrim
NOTE: (1) R, is optional and can be used to reduce error due to Input
bias currents.
FIGURE 9. Offset Voltage Trim.
SPICE MODELS
Computer simulation using SPICE is often useful when
analyzing the performance of analog circuits and systems.
This is particularly true for Video and RF amplifier circuits
where parasitic capacitance and inductance can have a major
effect on circuit performance. SPICE models are available
for the OPA628. Contact Burr-Brown Applications Department to receive a SPICE diskette.
RELIABILITY DATA
Reliability reports are available upon request for each of the
package options offered.
DEMONSTRATION BOARDS
Contact Burr-Brown Applications Department for availability of demonstration boards for the OPA628. There are
separate demonstration boards for the DIP and SOIC packages. These demonstration boards use the PC board layouts
shown in Figures lOa and lOb. They are carefully designed
for optimum low distortion performance as described in the
wiring precaution section.
PRINTED CIRCUIT BOARD GUIDELINES
The printed circuit board layout is critical to obtaining the
full performance of the OPA628, particularly optimum distortion and gain flatness. The guidelines below should be
employed to design the OPA628 printed circuit board. Conceptual layouts illustrating these guidelines for the DIP and
SOIC packages are shown in Figures lOa and lOb.
I. Establish the primary ground plane on the IC side of the
pc board. The primary ground planeis the lowest impedance ground plane, it should be as wide as possible with
minimal interruptions. Connect all unused space on both
sides of the board to the ground plane. The ground plane
should extend beneath the body of the IC on both sides of
the board. A 2-ounce copper ground plane is recommended. The input signal ground return, the load return,
and the power supply common should all be connected to
the same physical point to avoid ground loops which can
cause unwanted feedback.
'!f!.
...
0
2. The entire physical circuit should be as small as p r a c t i c a l "
All signal and power supply paths should be as short an
direct as .possible to minimize stray capacitance and
inductance which are detririlent8I to high frequency per- C/)
formance. Minimize signal trace impedance by keeping
traces as wide and short as possible. Stray capacitance
should be minimized, especially at high impedance nodes
such as the amplifier's input terminals. In addition, stray :::::i
signal coupling from the output of the amplifier back to Il.
:::i
the input should be minimized.
a:
w
u::
3. In general, the use of surface mount components improves
performance over through-hole components by minimizing parasitics. (However, it should be noted that use of the
DIP version of the OPA628 will not compromise amplifier performance.) If circuit elements with leads are used,
the leads should be kept as short as possible (6mm) to
minimize lead inductance. Resistors used in feedback
networks should have values of a few hundred ohms for
best performance. Shunt capacitance problems limit the
acceptable resistance range to about 1,0000 on the high
end and to a value that is within the amplifier's output
drive limits on the low end. Remember that output current
must be provided by the a)lJ.plifier to drive its own feedback network as well as to drive its load.
4. As with any low distortion, wide bandwidth amplifier,
power supply bypassing is extremely critical and must
always be used. The system power supplies should be
well bypassed at the board level with a minimum of 2.2}lF
tantalum capacitors. In addition, all four power supply
leads should be locally bypassed to ground as close as
possible to the atnplifier pins. Surface mount 0.1}lF capacitOrs will provide the best performance for local bypassing. Johanson 0;1}lF capacitors (part number
2S0RI8B 104zP4W) are used on the OPA628 demonstration board. All power supply bypass capacitors should be
low impedance designs and should be located on the
primary ground plane side of the pc board for the lowest
impedance connection to ground. Properly bypassed and
modulation free power supply lines allow optimum amplifier performance.
5. The OPA628 should.be soldered directly into the pc board
for best performance.
aURR-BROWN@
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Top-side and Primary Ground-plane
-Vee
Bottom (as seen through board)
NOTES: (1) Pin 1 deSignated by rectangular pad. (2) OUT inserted Top-Side. (3) Power supply by-pass caps installed at pin locations on Top-side. (4) All
unused area on both sides oonnected to primary ground-plane. (5) Continue ground-plane under OUT both-sides.
FIGURE lOa. Conceptual PCB Layout (8-pin DIP).
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Bottom (as seen through board)
NOTES: (1) Pad 1 designated by smallest rectangle. (2) OUT installed Top-side. (3) Power supply by-pass caps installed at pad locations on Top-side. (4) All
unused area on both sides connected to primary ground-plane. (5) Continue ground-plane under OUT both sides.
FIGURE lOb. Conceptual PCB Layout (8-pin SOIC).
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APPLICATIONS
390n
Video
Input
390n
o$
.~
750
High output current drive capability (6Vp-p into 750)
allows two back-terminated 750 transm\sSion lines
to be simultaneously driven.
7ID
FIGURE 11. Video Distribution Amplifier.
249n
ADC614
12-Bit.
150n
10MHzAlD
Converter
750
Triax
Input
Singie~Ended
~ Output
Signal
Input
46
Analog
Common
NOTE: The value of Rs varies with the value of./he input capacitance of
the AID converter. Rs is. 6n for the ADC614 since the input capacitance
in only 5pF.
ADC INPUT CAPACITANCE
As
C,.< 20pF
on
C'N> 20pF
30nto 500
FIGURE 13. Low Distortion Unity Gain Difference
Amplifier.
FIGURE 12. Differential Input Buffer;Anlplifier (G= 2VN).
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OPA640
DEMO BOARD AVAILABLE
See Appendix A.
Burr-Brown IC Data BookData Conversion Products
Wideband Voltage Feedback
OPERATIONAL AMPLIFIER
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FEATURES
APPLICATIONS
• UNITY-GAIN BANDWIDTH: 1.3GHz
• COMMUNICATIONS
• MEDICAL IMAGING
::::i
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• LOW NOISE: 2.9nV/fflz
• LOW HARMONICS: -75dBc at 10MHz
• HIGH COMMON MODE REJECTION: 85dB
• TEST EQUIPMENT
..J
• HIGH SLEW RATE: 350V/J.I.S
• HIGH-RESOLUTION VIDEO
• UNITY-GAIN STABLE
c:;;::",., r---
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60
50
--
s
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15
10
'0
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5
o
40
~~~
0
~
40
50
90
Ambient Temperature (OC)
100
1~
140
10
100
lk
10k
lOOk
1M
10M
FreQuency (Hz)
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TYPICAL PERFORMANCE CURVES
(CONT)
T. = +25°C, Vs= ±5V, RL = 1000, CL= 2pF, R", = 4020 and all four power supply pins are used unless otherwise noted. RF8 = 250 for a gain of +1.
SMALL SIGNAL TRANSIENT RESPONSE
(G =+1, R, = lOOn)
RECOMMENDED ISOLATION RESISTANCE
vs CAPACITIVE LOAD FOR G =+1
160 1---
g
30
g--c-- ..... ~V
~, ~
~
i
20
~
__
/ ..
80
"
,
40
0
O-
-40
~
-/+--+-.. -.
101--¥---+---+--+--I--1-----l
----.-+---+--1-----1
10
30
20
50
----
--
if
.
0
•
-- --c-- - - - f-- -
-80 ~f=..J'
-120
- ..
r-
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-----------\.--~-
---
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70
60
--"--,,
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-
-160 1--
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[
~
- -" ----. -- '--c' ... -"
I---
120
"V
0
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Time (5ns/Div)
:::i
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Capacitive Load (pF)
1.6 1--+-+---+-+---1--+--1--+----+-1
--
:1-;-1
i ~:: ~j--=-
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\
....... "
\'\ - '-+-r- - ~
~
[[
[[
-21
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f----
Ii
.-
DIP
Bandwidth
-6
Bandwidth
= 286MHz
i'~
-45
-90
1\.
-135
[[ [[[[I
10M
100M
C
~
C/)
~=I
-180
-225
-270
lOG
.,5l
.<:
=68MHz
14
iii'
:s
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11
5
"-
-180
-1
-225
-4
I-
Ii
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.Glosed-Loop
Ph ~."
-- -
-
-- ..
..
..
---
-
-270
lG
Frequency (Hz)
'151151'
-135 "-
,~llLJ-'
[
Gain
17
li~'~~HZ
I--1M
tx
--
[
[
Is61hll
I-- Closed-Loop
Phase
-90
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Av = +SVN CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
~
iii' 3
-45
J;;oh~~lh
Bandwidth
100M
lG
Frequency (Hz)
G = +2VN CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
........
... '
[
10M
r--
: = 1.45GHz
"
-18
Time (5nsJOiv)
0
. \._-' sOle
--SOIC
... _Closed-Loop
1--1-12
Phase
-15
-1.6 1--+-+---+--+---f--I---+--I--+--1
I~~
-,
_L Bandwidth
, , "',= 1.05GHz
l\.' /' Bandwidth
~-i)
~-9
==I-=r---I---l-.--+,
III
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---1----- .-j-+-j--+-+----l
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_ I Jipi
Gain
1.2 - -
i ~:: -- -- V-----
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G = +1VN CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
LARGE SIGNAL TRANSIENT RESPONSE
(G = +1, RL = 1000)
2.0 , - - - , - - , - - , - - , - - , - - , - - , - - , - - , - - - .
1M
10M
100M
lG
Frequency (Hz)
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TYPICAL PERFORMANCE CURVES (CONT)
T, = +25°C,
v, = ±5V, RL = loon, CL= 2pF, R,. ='402n and all lour power supply pins are used unless otherwise noted. R", = 25n for a gain of +1.
HARMONIC DISTORTION vs FREQUENCY
(G = -I, Vo = 2Vp-p, RL = lOOn)
HARMONIC DISTORTION vs FREQUENCY
(G = +1, Va = 2Vp-p, RL = lOOn)
-40
-40
S'
:s
"
'E
S'
"
'E
:s
~o
0
.~
0
~
l/
~
f/
0
.~
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0
/
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V
0
,\I
"E
0
-80
:I:
210
310
-100
lOOk
1M
10M
-100
lOOk
100M
HARMONIC DISTORTION vs FREQUENCY
(G = +2, Vo = 2Vp·p, RL = lOOn)
HARMONIC DISTORTION vs FREQUENCY
(G = +5, Vo = 2Vp·p, RL = lOOn)
-40
S'
S'
~O
,
.1/
0
:s
~"0
}
.i0
~
:I:
100M
FreQuency (Hz)
-40
"
10M
1M
Frequencv (Hz)
:s
~"
I
210
k"
OJ
:I:
310
-80
~O
~
~
.~
0
~ :::::p
~
210
~
210
-80
V
310
:I:
310
-100
lOOk
1M
10M
-100
lOOk
100M
5MHz HARMONIC DISTORTION vs OUTPUT SWING
(G = +1, RL = lOOn)
HARMONIC DISTORTION vs TEMPERATURE
(G = +1, Vo= 2Vp-p, RL = lOOn, 10 = 5MHz)
-70
S'
CJ
"
0
:s
-80
r----
210
.~
0
~
-90
310
:I:
-100
-75
-50
"
----
-25
0
25
-80
0
?
'E
.~
0
100M
Frequency (Hz)
-70
:s
'"
10M
1M
Frequency (Hz)
'E
~
....... ~
~
/ '~
.1/
"g
-90
lil
:I:
-------
----:110
-100
50
Ambient Temperature (OC)
75
100
125
o
1.0
2.0
3.0
4.0
Output Swing (Vp-p)
BURR~BROWNiII
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TYPICAL PERFORMANCE CURVES
TA : +25°C, Vs: ±5V, RL : 1000,
cL:
(CONT)
2pF, R,,: 4020 and all four power supply pins are used unless otherwise noted. R,,: 250 for a gain of +1.
10MHz HARMONIC DISTORTION vs OUTPUT SWING
(G: +1, RL : 1000)
~5
i
i
-75
is
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-85
-95
o
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2.0
3.0
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Output SwinQ (Vp-p)
APPLICATIONS INFORMATION
DISCUSSION OF PERFORMANCE
The OPA640 provides a level of speed and precision not
previously attainable in monolithic form. Unlike current
feedback amplifiers, the OPA640's design uses a "Classical" operational amplifier architecture and can therefore be
used in all traditional operational amplifier applications.
While it is true that current feedback amplifiers can provide
wider bandwidth at higher gains, they offer some disadvantages. The asymmetrical input characteristics of current
feedback amplifiers (i.e. one input is a low impedance)
prevents them from being used in a variety of applications.
In addition, unbalanced inputs make input bias current errors
difficult to correct. Cancelling offset errors (due to input bias
currents) through matching of inverting and non-inverting
input resistors is impossible because the input bias currents
are uncorrelated. Current noise is also asymmetrical and is
usually significantly higher on the inverting input. Perhaps
most important, settling time to 0.01 % is often extremely
poor due to internal design tradeoffs. Many current feedback
designs exhibit settling times to 0.01 % in excess of 10
microseconds even though 0.1 % settling times are reasonable. Such amplifiers are completely inadequate for fast
settling 12-bit applications.
The OPA640's "Classical" operational amplifier architecture employs true differential and fully symmetrical inputs
to eliminate these troublesome problems. All traditional
circuit configurations and op amp theory apply to the
OPA640.
WIRING PRECAUTIONS
Maximizing the OPA640's capability requires some wiring
precautions and high-frequency layout techniques. Oscillation, ringing, poor bandwidth and settling, gain peaking, and
::i
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instability are typical problems plaguing all high-speed
amplifiers when they are improperly used. In general, all
printed circuit board conductors should be wide to provide
low resistance, low impedance signal paths. They should
also be as short as possible. The entire physical circuit
should be as small as practical. Stray capacitances should be
minimized, especially at high impedance nodes, such as the
amplifier's input terminals. Stray signal coupling from the
output or power supplies to the inputs should be minimized.
All circuit element leads should be no longer than 114 inch
(6mm) to minimize lead inductance, and low values of
resistance should be used. This will minimize time constants
formed with the circuit capacitances and will eliminate
stray, parasitic circuits.
Grounding is the most important application consideration
for the OPA640, as it is with all high-frequency circuits.
Oscillations at high frequencies can easily occur if good
grounding techniques are not used. A heavy ground plane
(20z copper recommended) should connect all unused areas
on the component side. Good ground planes can reduce stray
signal pickup, provide a low resistance, low inductance
common return path for signal and power, and can conduct
heat from active circuit package pins into ambient air by
convection.
Supply bypassing is extremely critical and must always be
used, especially when driving high current loads. Both
power supply leads should be bypassed to ground as close as
possible to the amplifier pins. Tantalum capacitors (2.2!-!F)
with very short leads are recommended. A parallel 0.01!-!F
ceramic must also be added. Surface mount bypass capacitors will produce excellent results due to their low lead
inductance. Additionally, suppression filters can be used to
isolate noisy supply lines. Properly bypassed and modulation-free power supply lines allow full amplifier output and
optimum settling time performance.
Burr-Brown Ie Data Book-Linear Products
2.227
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Points to Remember
1) Making lise of all four power supply pins will lower the
effective power supply impedance seen by the input and
output stages. This will improve the AC performance including lower distortion. The lowest distortion is achieved
when running separate traces to VSI and VS2 ' Power supply
bypassing with O.Olj.IF and 2.2j.IF suiface mount capacitors
on the topside of the PC board is recommended. It is
essential to keep the O.Olj.IF capacitor very close to the
power supply pins. Refer to the DEM-OPA64X data sheet
for the recommended layout and component placements.
2) Whenever possible, use surface mount. Don't use pointto-point wiring as the increase in wiring inductance will be
detrimental to AC performance. However, if it must be used,
very short, direct signal paths are required. The input signal
ground return, the load ground return, and the power supply
common should all be connected to the same physical point
to eliminate ground loops, which can cause unwanted feedback.
3) Surface mount on backside of PC Board. Good component selection is essential. Capacitors used in critical locations should be a low inductance type with a high quality
dielectric material. Likewise, diodes used in critical locations should be Schottky barrier types; such as HP50822835 for fast recovery and miuimum charge storage. Ordinary diodes will not be suitable in RF circuits.
4) Whenever possible, solder the OPA640 directly into the
PC board without using a socket. Sockets add parasitic
capacitance and inductance, which can seriously degrade
AC performance or produce oscillations.
5) Use a small feedback resistor (usually 250) in uuity-gain
voltage follower applications for the best performance. For
gain configurations, resistors used in feedback networks
should have values of a few hundred ohms for best performance. Shunt capacitance problems limit the acceptable
resistance range to about lill on the high end and to a value
that is within the amplifier's output drive limits on the low
end. Metal film and carbon resistors will be satisfactory, but
wirewound resistors (even "non-inductive" types) are absolutely unacceptable in high-frequency circuits. Feedback
resistors should be placed directly between the output and
the inverting input on the backside of the PC board. This
placement allows for the shortest feedback path and the
highest bandwidth. Refer to the demonstration board layout
at the end of the data sheet. A longer feedback path than
this will decrease the realized bandwidth substantially.
6) Due to the extremely high bandwidth of the OPA640, the
SOIC package is strongly recommended due its low parasitic impedance. The parasitic impedance in the PDIP and
CERDIP packages causes the OPA640 to experience about
SdB of gain peaking in unity-gain configurations. This is
compared with virtually no gain peaking in the SOIC package in unity-gain. The gain peaking in the PDIP arid CERDIP
packages is minimized in gains of 2 or greater, however.
Surface mount components (chip resistors, capacitors, etc.)
have low lead inductance and are also strongly recommended.
2.228
7) Avoid overloading the output. Remember that output
current must be provided by the amplifier to drive its own
feedback network as well as to drive its load. Lowest
distortion is achieved with high impedance loads.
8) Don't forget that these amplifiers use ±5V supplies.
Although they will operate perfectly well with +SV and
-S.2V, use of ±lSV supplies will destroy the part.
9) Standard commercial test equipment has not been designed to test devices in the OPA640's speed range. Benchtop op amp testers and ATE systems will require a special
test head to successfully test these amplifiers.
10) Terruinate transmission line loads. Unterruinated lines,
such as coaxial cable, can appear to the amplifier to be a
capacitive or inductive load. By terruinating a transmission
line with its characteristic impedance, the amplifier's load
then appears purely resistive.
11) Plug-in prototype boards and wire-wrap boards will not
be satisfactory. A clean layout using RF techniques is
essential; there are no shortcuts.
OFFSET VOLTAGE ADJUSTMENT
If additional offset adjustment is needed, the circuit in
Figure 1 can be used without degrading offset drift with
temperature. Avoid external adjustment whenever possible
since extraneous noise, such as power supply noise, can be
inadvertently coupled into the amplifier's inverting input
terruinal. Remember that additional offset errors can be
created by the amplifier's input bias currents. Whenever
possible, match the impedance seen by both inputs as is
shown with R,. This will reduce input bias current errors to
the amplifier's offset current.
R,
20kO :>----1r--...!\IV'---- r=::: t--r--~
-_ ....
0
s-
a
50 I--+--+-+--+--·~-I-----
1--+--1-+---1--1--- - --1-._-40
L-~
__~_L~__~~__~~__~~
0
~
~
M 00 100 1~ 1~
_~~
Ambient Temperature (OC)
FIGURE 4. Output Current vs. Temperature.
BURR-BROWNIlfl
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THERMAL CONSIDERATIONS
OUTPUT DRIVE CAPABILITY
The OPA640 has been optimized to drive 750 and 1000
resistive loads. The device can drive 2Vp-p into a 750 load.
This high-output drive capability makes the OPA640 an
ideal choice for a wide range of RF, IF, and video applications. In many cases, additional buffer amplifiers are unneeded.
a:
2.229
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R,(lI
21<0
R,(')
21<0
L-----~---------+------__o
-6V
FIGURE 10. Differential Input Buffer Amplifier (G =+2VN).
NOTE: (1) Select Jl' J,and R"
R, to set Input stage current for
optimum performanoe.
Input Bias Current: 1pA
4020
FIGURE 9. Low Noise, Wideband PET Input Op Amp.
Diffe~l~
Single·
~ Ended
~
Input
Output
FIGURE 11. Unity Gain Difference Amplifier.
2.232
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402Q
4020
~
Video
Input
~
~
75Q
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FIGURE 12. Video Gain Amplifier.
500 or 75Q
I~
500
or
750
Differential
Input
L~
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Transmission Line
50Q
or
750
Q.
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Differential
Output
RG
RF
4020
500
or
75Q
50Q
or
700
Differential Voltage Gain
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FIGURE 13. Differential Line Driver for 50Q or 75Q Systems.
4020
402Q
Differential Voltage Gain = 2VN = 1 + 2R,JR.
FIGURE 14. Wideband, Fast-Settling Instrumentation Amplifier.
aURR .. BROWN\!l
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=2VN = 1 + 2R,JR.
4020
o
2.233
For Immediate Assistance, Contact Your Local Salesperson
BURR-BROWN®
OPA641
IE3IE3II
DEMO BOARD AVAILABLE
See Appendix A,
Burr-Brown IC Data BookData Conversion Products
Wideband Voltage Feedback
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
• GAIN-BANDWIDTH: 1.6GHz
• COMMUNICATIONS
• MEDICAL IMAGING
• STABLE IN GAINS ~ 2
• LOW DIFFERENTIAL GAIN/PHASE
ERRORS: 0.015%/0.006°
• TEST EQUIPMENT
• HIGH SLEW RATE: 650V//lS
• FAST 12-BIT SETTLING: 18ns (0.01%)
• CCD IMAGING
• ADCIDAC GAIN AMPLIFIER
• HIGH-RESOLUTION VIDEO
• HIGH COMMON MODE REJECTION: BOdB
• LOW NOISE PREAMPLIFIER
• LOW HARMONICS: -72dBc at 10MHz
• ACTIVE FILTERS
DESCRIPTION
The OPA641 is an extremely wideband operational
amplifier featuring low noise, high slew rate and high
spurious free dynamic range.
operational amplifier circuit architecture. This allows
the OPA641 to be used in all op amp applications
requiring high speed and precision.
The OPA641 is conservatively compensated for stability in gains of 2 or greater. This amplifier has a fully
symmetrical differential input due to its "classical"
Low noise, wide bandwidth, and high linearity make
this amplifier suitable for a variety of RF, video, and
imaging applications.
Non-Inverting
Input
Inverting
Input
3
Output
Stage
2
6
Output
0-----'--+'.,-----'
4,5
-Vs
International Airport Industrial Park • MaIling Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. TuCson Blvd. • TuCson, AZ 85706
Tol:(602)746-1111 • Twx: 9111-952·1111 • Cabl.:BBRCORP • Tolox:066-6491 • FAX: (602)889·1510 • Immedlale Produet Info: (800) 548-6132
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SPECIFICATIONS
ELECTRICAL
TA : +25"C, Vs: ±5V, RL : 1000, CL : 2pF, RFB : 402!l and ali lour power supply pins are used unless otherwise noted.
OPA641H, P, U
CONDITIONS
PARAMETER
OFFSET VOLTAGE
Input Offset Voltage
Average Drift
HSQ Grade Over Temperature
Power Supply Rejection {+ Vsl
{-Vsl
INPUT BIAS CURRENT
Input Bias Current
Over Specilied Temperature
HSQ Grade Over Temperature
Input Offset Current
Over Specilied Temperature
HSQ Grade Over Temperature
Vs: ±4.5 to ±5.5V
MIN
56
51
Vcu: OV
MAX
±2
±10
±6
79
58
13
20
0.2
0.5
VCM:OV
OPA641HSQ, PB, UB
TYP
MIN
TYP
MAX
UNITS
±2
mV
±6
61
54
±1
±6
±3
82
60
mV
dB
dB
30
75
1.0
2.0
4.0
JJ.A
30
90
2
2.5
·
8.0
2.9
2.8
2.8
63
INPUT VOLTAGE RANGE
Common-mode Input Range
Over Specified Temperature
JJ.A
JJ.A
JJ.A
·
nV/rHZ
nV/rHZ
nV/rHZ
nV/rHZ
~Vrms
VcM :±0.5V
±2.5
±2.5
56
Differential
Slew Rate(1)
At Minimum Specified Temperature
Spurious Free Dynamic Range
OUTPUT
Voltage Output
Over Specified Temperature
HSQ Grade Over Temperature
Voltage Output
Over specmed Temperature
HSQ Grade Over Temperature
Current Output
Over Specified Temperature
HSQ Grade Over Temperature
Short Circuit CUrrent
Output Resistance
W
Vo: ±2V, RL : 1000
Vo: ±2V, RL : 1000
50
45
V
V
dB
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±2.85
±2.75
78
·
65
80
kQ II pF
MOllpF
58
56
53
48
61
··
·
·
·
·
··
±3.0
±2.5
RL : 1000
±2.5
±2.3
±55
±50
Burr-Brown Ie Data Book-Linear Products
75
0.04
·
±2.8
·
·
±25
1MHz, G : +2VIV
c(
0
No Load
±2.25
±2.0
±4O
±25
c(
...J
dB
dB
800
78
39
650
550
18
13
5
O.ot5
0.006
0.1
78
72
±2.6
a..
:::i
pAl,,!HZ
dB
dB
Ali Four Power Pins Used
Gain"" +2VN
Gain :+5VIV
Gain: +10VIV
G : +2, 2V Step
G : +2, 2V Step
G : +2, 2V Step
G : +2, 2V Step
G : +2, 2V Step
Vo: OV to 1.4V, RL : 1500
Vo: OV to 1.4V, RL : 1500
G:+2
G : +2, I : 5MHz, Vo :2Vp-p
G : +2, f : 10MHz, Vo :2Vp-p
::J
4
13
15111
2111
Common-Mode
Settling Time: 0.01 %
0.1%
1%
Differential Gain at 3.58MHz, G : +2VIV
Differential Phase at 3.58MHz, G : +2VIV
Gain Flatness
en
a:
2.0
INPUT
FREQUENCY RESPONSE, RFB =4020
Closed Loop Bandwidth
~
0
u::::
I : O.IHz to 20kHz
Noise Figure (NFl
Rs: tkO
Rs: 500
OPEN-LOOP GAIN, DC
Open-loop Voltage Gain
Over Specified Temperature
U)
JJ.A
Input Bias Current Noise Density
Common-mode Rejection
'II:t
JJ.A
1.2
NOISE
Input Voltage Noise
Noise Density, f : 100Hz
f: 10kHz
f: lMHz
f : 1MHz to 500MHz
Voltage Noise, BW: 100Hz to 500MHz
JJ.VI"C
,....
MHz
MHz
MHz
V/JJ.s
V/JJ.s
ns
ns
ns
%
degrees
MHz
dBc
dBc
V
V
V
·
±50
·
rnA
mA
mA
mA
Q
2.235
Z
~
0
For Immediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
(CONT)
ELECTRICAL
T.= +25°C, vs= ±5V, RL = 1000, CL= 2pF, R" = 4020 and all four power supply pins are used unless otherwise noted.
OPA641H, P, U
PARAMETER
CONDITIONS
POWER SUPPLY
Specified Operating Voltage
Operating Vollage Range
Quiescent Current
Over Specified Temperature
TEMPERATURE RANGE
Specification: H, P, PB, U, UB
HSQ
Thermal Resistance
P
U
H
TMtN
MIN
TYP
OPA641HSQ, PB, UB
MAX
MIN
·
··
,,5
to TUA)(
±4.5
TMlNtoTtAAX
±5.5
±15
±19
Ambient
±22
±24
-40
TYP
+85
--55
Ambient
6.. , Junction to Ambient
MAX
UNITS
·
V
V
mA
mA
·
·
°C
°C
+125
·
··
120
170
120
°C/W
°C/W
°C/W
NOTE: (1) Slew rate is rate of change from 10% to 90% of output voltage step.
ORDERING INFORMATION
OPA641
ABSOLUTE MAXIMUM RATINGS
J
( ) ( ) (Q)
T
Basic Model Number
-==-r-Package Code - - - - - - - - - - - - - - - - ' H = B-pin Sidebraze DIP
P = B-pin Plastic DIP
U = B-pin Plastic SOIC
Perlormance Grade Code - - - - - - - - - - - - - '
S = --55°C to +125°C
B(1) or No Letter = -40°C to +B5°C
Reliability Screening
Q = Q-Screened (HSQ Model Only)
Supply .......................................................................................... ±5.5VDC
Internal Power Dissipation") ....................... See Applications Information
Differential Input Voltage ............................................................ Total Vee
Input Vottage Range .................................... See Applications Information
Storage Temparature Range: H, HSQ .......................... -65°C to +150°C
P, PB, U, UB ................. -40°C to +125°C
Lead Temperature (soldering, 10s) .............................................. +300°C
(soldering, SOIC 3s) ....................................... +260"C
Junction Temperature (TJ ) ............................................................ +175°C
NOTE: (1) Packages must be derated based on specified 6 J" Maximum
TJ must be observed.
NOTE: (1) The "B" gradeolthe SOIC package will be designated with a 'B". Refer
to the mechanical section for the location.
PACKAGE INFORMATION(1)
PIN CONFIGURATION
Top View
DIPISOIC
NC
PACKAGE
PACKAGE DRAWING
NUMBER
OPA641H, HSQ
OPA641P, PB
OPA641U, UB
B-Pin Cerdip
B-Pin DIP
B-PinSOIC
157
006
1B2
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appandix D of Burr-Brown IC Data Book.
Inverting Input
Non-Inverting Input
-VSl
MODEL
Output
I\l\
\l:::I
4
NOTE: (1) Making use of all four power supply pins is highly recommended,
although not required. Using these four pins, instead of just pins 4 and 7, will
lower the effective pin impedance and substantially lower distortion.
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from performancedegradation to complete device failure, Burr-Brown
Corporation recommends that all integrated circuits be handled
and stored using appropriate ESD protection methods:
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet published specifications.
The information provided herein is believed to be reliable; however, BURR·BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications ars subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in Iffe support devices andlor systems.
BURR-BROWN®
2.236
Burr-Brown Ie Data Book-Linear Products
IEilEilI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
TA = +25°C, V,= ±5V, RL = 1000, CL= 2pF, RF8 = 4020 and all four power supply pins are used unless otherwise noted.
+PSR
"-
80
:E-
iii'
:E-
r-...
CMR
.;7
0:
75
II:
70
Q)
'C
0
CIl
~0
Q.
j
80
Q)
'iI>
:::;
-PSR
60
.....
85
c:
:fi
lI:
U
~
90
,
iii'
,....
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
AcL' PSR, CMR vs TEMPERATURE
90
CO
_..
--
--
i\-
70 - - - - -
\
\
65
E
E
60
u
55 I
-
I
--.
-{;O
-25
0
25
50
75
100
-5
125
(/)
a:
\
50
50
-75
---
\
0
AcL
~
o
---
-4
-3
Temperature (OC)
-2
w
-1
u::
4
::::i
0..
:E
Common· Mode Voltage (V)
INPUT BIAS CURRENT vs TEMPERATURE
20 ,..---;---;---;---;---;---;---;-----,
SUPPLY CURRENT vs TEMPERATURE
17
,--r--r--r--r--r--r--r----,
r---T--~---t---r--~--T---r_~
I--'",.,""..---t---- .--- -.------ -----.-.
15
I---
-'.•
-.::::~
-- ----+---f----f
~ ~- ~=~~- "---+'""'----F""'-....:1---I
1---- -- - - - f - - - - - - - - -
16
f---t--+---+---t---t-..··- c---' ---
15
-------r_ . --+--/--I---+---I---
r--t---r--
---~
14 - -
-----c----c-- ... -.
r---r--
1---~·---r--+_--+----~~--_4--~
10 L-_.l-_-'-_-'-_....I..._--'-_-I._--'_---'
-75
-{;O -25
0
25
50
75
100
125
13 '---'---'---'---'---'---'---'------'
-75
-50
-25
Ambient Temperature (OC)
E
:!:!.
75
100
125
10
- r-- r--
60
§
%
0
50
12
1:
u
'5
25
VOLTAGE NOISE vs FREQUENCY
OUTPUT CURRENT vs TEMPERATURE
70
..
0
Ambient Temperature (OC)
--,...-
50
-~
~3>
"-
s
-10
Q)
f..- ....-
.!!l
0
Z
"
E
4
1'-
0
>
2
40 L--I._...l----J_-'-_.!....-I._...l----J_-'----I
~
~~
0
~
~
00
00
100
1~
1~
Ambient Temperature (OC)
0
100
lk
10k
lOOk
1M
10M
Frequency (Hz)
BURR-BROWN@
IE!lE!lI
Burr-Brown Ie Data Book--Linear Products
2.237
c(
...I
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~
a:
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TYPICAL PERFORMANCE CURVES
T A = +25°C, Vs= ±5V, Rl = 1000, C l
(CONT)
=2pF, RFB = 4020 and all four power supply pins are used unless otherwise noted.
SMALL SIGNAL TRANSIENT RESPONSE
(G = +2, RL = 1000)
RECOMMENDED ISOLATION RESISTANCE
vs CAPACITIVE LOAD FOR G = +2
50
40
20
40
§:
1l
"
30
."
20
·1a:"
.2
0
.!!l
10
o
/
,::
o
V
~
/
/
!
-
V
o
-20
-80
-100
v
-120
-140
-160
40
20
BO
60
100
Time (2ns/div)
Capacitive Load (pF)
LARGE SIGNAL TRANSIENT RESPONSE
(G = +2, RL = 1000)
Av = +2 OPEN·LOOP
SMALL SIGNAL BANDWIDTH
80
1
60
O.B
40
0.6
?:
0.4
"
~
0.2
-"
20
o
\
\
-
~
~ -0.2
I
I
(5 -0.4
.........
"-
""- I......
'-
oJ
-0.6
-
-o.B
-1
1k
G = +5 CLOSED-LOOP BANDWIDTH
24
22
II IIIIII
III
20
18
II IIIIII
III
II IIIIII
-90
"
-135
\
\
m
tf.
!
!
-180
-225
1G
1M
Frequency (Hz)
G = +10 CLOSED-LOOP BANDWIDTH
24~~mr~~~~I~III~IIIIII~llnl~I~~~
22 t---t-t-HttHt--Hffitttt---t-SOIC Bandwidth ttttt-t-tTtttttt
20
i"'
= 39MHz
18 r-rH~fr-++~ffi-~~~-r+Httttt-t-tTtttttt
16 r-rH~fr-++~ffi-~~~-r+Httttt-+4+mm
iii 14 r-rH~fr-++~ffi-~~~-r+Httttt-+4+mm
~12 ~rH~~++~ffi-~~~~+Httttt-+4+mm
~ 10 ~rH~~++~ffi-~-t+l1\It-~+Httttt-+-++mm
III
SOIC Bandwidth
= 77MHz
16
iii 14
~
-45
-100
Time (2ns/div)
~
-
"- .......
12
10
8~rH~~++~ffi-~-t+I+fI\-~+Httttt-+-++mm
\
\
2
o
100k
1M
10M
100M
Frequ8ncy (Hz)
1G
10G
Frequency (Hz)
BURR-BRQWN@
2.238
Burr-Brown Ie Data Book-Linear Products
I
EiI Eill
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
T A = +25°C, V,= ±5V, RL = 100Q,
(CONT)
cL= 2pF, RFB = 402Q and all four power supply pins are used unless otherwise noted.
10
Il~tll!]JI
= 879MHz
---- ----
'U
:g.
CD
~
lOOk
1M
..
-
10M
100M
Frequency (Hz)
~
~
,-- _ 310_
.51
<=
_.
-----
--
~
I
-- -
r--- ----100
-75
lOG
/7
- - - ----
-90
0
_-
lG
210
~O
/
-- -----
~---
C
V
qo
-70
<=
V
--
,...
HARMONIC DISTORTION vs TEMPERATURE
(G = +2, Vo = 2Vp.p, RL = lOOn, 10 = 5MHz)
G = +2 CLOSED-LOOP BANDWIDTH
-50
-25
a
25
------
50
75
--
CD
~
0
III
en
a:
W
----
100
125
u::
:::i
c..
Temperature (0C)
NOTE: Dip Bandwidth = 785MHz
::::i!E
0
0.1
COMPENSATION
0.01
0.001
10k
lOOk
1M
10M
100M
Frequency (Hz)
FIGURE 3. Small-Signal Output hnpedance vs Frequency.
THERMAL CONSIDERATIONS
The OPA641 does not require a heat sink for operation in
most environments. At extreme temperatures and under full
load conditions a heat sink may be necessary.
The internal power dissipation is given by the equation
PD= PDQ + PDL' where PDQ is the quiescent power dissipation
and PDL is the power dissipation in the output stage due to the
load. (For ±Vee= ±SV, PDQ = lOV x 24mA = 240mW, max).
For the case where the amplifier is driving a grounded load
(R,) with a DC voltage (±Vour) the maximum value of PDL
occurs at ±Vour = ±Veel 2, and is equal to P DL'
max = (±Vcc)2/4~. Note that it is the voltage across the
output transistor, and not the load, that determines the power
dissipated in the output stage.
The short-circuit condition'represents the maximum amount
of internal power dissipation that can be generated. The
variation of output current with temperature is shown in the
Typical Performance Curves.
CAPACITIVE LOADS
The OPA64 1' s output stage has been optimized to drive low
resistive loads. Capacitive loads, however, will decrease the
amplifier's phase margin which may cause high frequency
peaking or oscillations. Capacitive loads greater than SpF
should be buffered by connecting a small resistance, usually
SO to 2S0,in series with the output as shown in Figure 4.
This is particularly important when driving high capacitance
loads such as flash AID converters.
In general, capacitive loads should be minimized for optimum high frequency performance. Coax lines can be driven
if the cable is properly terminated. The capacitance of coax
The OPA641 is internally compensated and is stable in unity
gain with a phase margin of approximately 60°. However,
the unity gain buffer is the most demanding circuit configuration for loop stability and oscillations. are most likely to
occur in this gain. If possible, use the device in a noise gain
of two or greater to improve phase margin and reduce the
susceptibility to oscillation. (Note that, from a stability
standpoint, an inverting gain of -I VN is equivalent to a
noise gain of 2.) Gain and phase response for other gains are
shown in the Typical Performance Curves.
The high-frequency response of the OPA641 in a good
layout is very flat with frequency. However, some circuit
configurations such as those where large feedback resistances are used, can produce high-frequency gain pe3king.
This peaking can be minimized by connecting a small
capacitor in parallel with the feedback resistor. This capacitor compensates for the closed-loop, high frequency, transfer
function zero that results from the time constant formed by
the input capacitance of the amplifier (typically 2pF after PC
board mounting), and the input and feedback resistors. The
selected compensation capacitor may be a trimmer, a fixed
capacitor, or a planned PC board capacitance. The capacitance value is strongly dependent on circuit layout and
closed-loop gain. Using small resistor values will preserve
the phase margin and avoid peaking by keeping the break
frequency of this zero sufficiently high. When high c1osedloop gains are required, a three-resistor attenuator (tee network) is recommended to avoid using large value resistors
with large time constants.
SETTLING TIME
Settling time is defined as the total time required, from the
input signal step, for the output to settle to within the
specified error band around the final value. This error band
is expressed as a percentage of the value of the output
transition, a 2V step. Thus; settling time to 0.01 % requires
an error band of ±2001lV centered around the final value of
2V.
BURR-BROWN®
2.242
Burr-Brown Ie Data Book-Linear Products
1151&:11
Or, Call Customer Service at 1·800·548·6132 (USA Only)
Settling time, specified in an inverting gain of one, occurs in
only 18ns to 0.01% for a 2V step, making the OPA641 one
of the fastest settling monolithic amplifiers commercially
available. Settling time increases with closed-loop gain and
output voltage change as described in the Typical Performance Curves. Preserving settling time requires critical attention to the details as mentioned under "Wiring Precautions."
The amplifier also recovers quickly from input overloads.
Overload recovery time to linear operation from a 50%
overload is typically only 3Oos.
In practice, settling time measurements on the OPA641
prove to be very difficult to perform. Accurate measurement
is next to impossible in all but the very best equipped labs.
Among other things, a fast flat-top generator and high speed
oscilloscope are needed. Unfortunately, fast flat-top generators, which settle to 0.01 % in sufficient time, are scarce and
expensive. Fast oscilloscopes, however, are more commonly
available. For best results a sampling oscilloscope is recommended. Sampling scopes typically have bandwidths that
are greater than 1GHz and very low capacitance inputs.
They also exhibit faster settling times in response to signals
that would tend to overload a real-time oscilloscope.
Figure 6 shows the test circuit used to measure settling time
for the OPA641. This approach uses a 16-bit sampling
oscilloscope to monitor the input and output pulses. These
waveforms are captured by the sampling scope, averaged,
and then subtracted from each other in software to produce
the error signal. This technique eliminates the need for the
traditional "false-summing junction," which adds extra parasitic capacitance. Note that instead of an additional flat-top
generator, this technique uses the scope's built-in calibration
source as the input signal.
DIFFERENTIAL GAIN AND PHASE
Differential Gain (DG) and Differential Phase (DP) are
among the more important specifications for video applications. DG is defined as the percent change in closed-loop
gain over a specified change in output voltage level. DP is
defined as the change in degrees of the closed-loop phase
over the same output voltage change. Both DG and DP are
specified at the NTSC sub-carrier frequency of 3.58MHz.
DG and DP increase with closed-loop gain and output
voltage transition. All measurements were performed using
a Tektronix model VM700 Video Measurement Set.
-70
G
S
:s
"
~
Although harmonic distortion may decrease with higher
load resistances (i.e. higher feedback resistors), the effective
output noise will increase due to the higher resistance.
Therefore, noise or harmonic distortion may be optimized
by picking the appropriate feedback resistor.
~
.>1
0
~
:x:
-80
2fo
(0
~l'
~
::---
0
3fo
-fOO
fO
100
1k
10k
load Resistance (Q)
U)
FIGURE 5. 5MHz Harmonic Distortion vs Load Resistance.
The third-order intercept point is an important parameter for
many RF amplifier applications. Figure 6 shows the
OPA641 ' s single-tone, third-order intercept vs frequency.
This curve is particularly useful for determining the magnitude of the third harmonic as a function of frequency, load
resistance, and gain. For example, assume that the application requires the OPA641 to operate in a gain of +2VN and
drive 2Vp-p into lOOn at a frequency of 5MHz. Referring to
Figure 6 we find that the intercept point is +38dBm. The
magnitude of the third harmonic can now be easily calculated from the expression:
Third Harmonic (dBc)
= 2(OPPP -
For this case OPPP = 38dBm, Po = 7dBm, and the thirdHarmonic =2(38 - 7) =62dB below the fundamental tone.
The OPA641's low IMD makes the device an excellent
choice for a variety of RF signal processing applications.
The value for the two-tone, third-order intercept is typically
6dB lower than the single-tone value.
60
E
III
50
E
"0
1S.
40
~
30
"e
t-
...-
"-
l6
"E
0
"E
20
:E
I-
10
1M
10M
100M
Frequency (Hz)
FIGURE 6. Single-Tone, Third Order Intercept Point vs
Frequency.
iURR-BROWN®
E!lE!II Burr-Brown Ie Data Book-Linear Products
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-2.0
10
-75
-00
~
0
25
50
Ambient Tempei'ature eC)
75
100
125
o
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
aURR-BROW"NI8
2.250
Burr-Brown Ie Data Book-Linear Products
IE!lE!lI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
T, ~ +25"C,
(CONT)
v, = ±5V, RL = loon, CL= 2pF, RFB = 4020 and all four power supply pins are used unless otherwise noted. RFB = 25n for a gain of +1.
SMALL SIGNAL TRANSIENT RESPONSE
(G = +1, RL = lOOn)
RECOMMENDED ISOLATION RESISTANCE
vs CAPACITIVE LOAD FOR G = + 1
25
r---..,.---...,.----,---.....,.----,
,
200
160
120
~
80
40
Q)
f
-S -40
~
-80
C/)
-120
a:
-160
o
~--~~--~----~----~----~
o
10
20
w
LL
::i
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:5
-200
Time (5nsldiv)
50
40
30
Capacitive Load (pF)
LARGE SIGNAL TRANSIENT RESPONSE
(G=+1.RL=100n)
G = +lVN CLOSED·LOOP
SMALL SIGNAL BANDWIDTH
2.0
1.2 I---r-'"
7
0
-1-.-+--+---1--+---+---\--\_.-1
. - - f - . _ - . - .-.+--I-.-+--i\-.-+--~
g~:: ;;J;J-~.- .... . ~='=~:t- -.
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a:
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Closed·Loo Phase
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iii'
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Cl
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6
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-f--
1.6
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-45"
++H----I-++++++H---t-+'M-WHtI
-9
-90"
-12 L--l..-L....L-I...u..1JJ..._"-,-L...L.J.J.J.JJ._-'-.J....J-U1WJ -135"
1M
10M
100M
lG
-2.0
Time (5nsldiv)
Frequency (Hz)
G = -WN CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
9
3
"
-6
~
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Cl
.
Gain
0
-3
15
II
II
6
iii'
G = +2VN CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
Closed-Loop P
ase ...
.-
~
\
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-9
-12
--
-15 f---
.--
r··
.-.
-
12
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Cl
6
r-
K~
,/63/iAHz
3
I""rs -
0
----
K"
-3
r-;;
-18 1--.
-21
-9
10M
100M
Frequency (Hz)
...
Oosed-L.oop Phase
-6 t--.
1M
-tr'
Gain
Bandwidth
= 145MHz
~
_ ..
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Burr-Brown Ie Data Book-Linear Products
1M
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C
~
(IJ
Q)
-45"~11.
-90"
-135"
10M
100M
lG
Frequency (Hz)
2.251
For Immediate Assistance, Contact YourLocalSalesperson
TYPICAL PERFORMANCE CURVES
(CONT) .
TA = +25°C, Vs= ±5V, RL = 1000, CL= 2pF, RF8= 4020 and all lour power supply pins are used unless 01herwise noted. R" = 250 lor a gain 01 +1.
. HARMONIC DISTORTION vs FREQUENCY
(G = +1, Vo = 2Vp-p, RL = 1000)
G = +5VN CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
~
23
20
"co
-70
~
~O
.~
-90
II
210
:!!.
17
C
Gail,
Closed-Loop Phase
..........
I,
11
;E
Bandwidth
r-- -....
= 44MHz
N
1Q
~
~
0
V5
0
i'
-45°
x~
1M
II
J
. .. '
-100
-90°
5
/
c:
-110
100M
10M
1~lo
. .. ,
10k
100k
1M
100M
10M
Frequency (Hz)
Frequency (Hz)
NOTE: The Dashed Line Represents THO + N
The Actual Harmonics will be Lower.
HARMONIC DISTORTION vs FREQUENCY
(G = +2, Va = 2Vp-p, RL = 1000)
HARMONIC DISTORTION vs FREQUENCY
(G =-1, Vo = 2Vp-p, RL = 1000)
~O
~O
210
;ll
:!!.
210
i
I
~
4ro
1M
10M
100M
100k
.11
J
100M
10M
Frequency (Hz)
HARMONIC DISTORTION vs FREQUENCY
(G = +5, Vo = 2Vp-p, RL = 1000)
HARMONIC DISTORTION vs TEMPERATURE
(G = +1, Va = 2Vp-p, RL = 1000, 10 = 5MHz)
-70
:!!.
c: -80
0
'E
I
V
V~
-
"co
/
~O
o
1M
Frequency (Hz)
210;
~1D
/
/'
-100
-70
:!!.
/
-90
~O
;ll
310
-80
"
. -100
100k
V
c:
I
i-"
-70
~
~Ii
0
-
.11
c:
0
E
-90
-90
210
x'"
310
-100
-100
100k
1M
10M
Frequency (Hz)
100M
-75
-50
-25
25
50
75
100
125
Ambient Temperature (OC)
iURR.BROWNIIII
2.252
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
TA : +25'C, Vs: ±5V, Rc: 10011, C c: 2pF, R'B: 40211 and all four power supply pins are used unless otherwise noted, R'B: 2511 lor a gain 01 +1.
5MHz HARMONIC DISTORTION vs OUTPUT SWING
(G:+1,RL :10011)
-70
1OMHz HARMONIC DISTORTION vs OUTPUT SWING
(G: +1, RL : 10011)
-80 , . . - - - - , . . - - - - , . . - - - - , . . - - - - ,
r----r----r----r-----,
g
~
o
-80
'E
~
o
.~
o
~
-90
UJ
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-90
-100
;;"O'==-_..l-__--l_ _ _-I
310
-95 L-_ _
'-----J......,---"-----"------'
o
4
2
Output Swing (Vp-p)
3
4
:::i
D:E
Output Swing (Vp-p)
-...-.I\I'v"--_~---I
Output Trim Range" +Vee ~ to -Vee ~
RTTlm
RTrlm
NOTE: (1) Rs is optional and can be used to cancel offset erlOrs due to Input
bias currents.
INPUT PROTECTION
Static damage has been well recognized for MOSFET devices, but any semiconductor device deserves protection
from this potentially damaging source. The OPA642 incorporates on-chip ESD protection diodes as shown in Figure 2.
This eliminates the need for the user to add external protection diodes, which can add capacitance and degrade AC
performance.
+Vee
ESD Protection diodes Internally
E~ernal ~ ~:~::d_t~:1
Pin
I
___
P':ernal
Circuitry
-Vee
u:::
FIGURE 2. Internal ESD Protection.
All pins on the OPA642 are internally protected from ESD
by means of a pair of back-to-back reverse-biased diodes to
either power supply as shown. These diodes will begin to
conduct when the input voltage exceeds either power supply
by about 0.7V. This situation can occur with loss of the
amplifier's power supplies while a signal source is still
present. The diodes can typically withstand a continuous
current of 30mA without destruction. To insure long term
reliability, however, diode current should be externally limited to lOrnA or so whenever possible.
The OPA642 utilizes a fine geometry high speed process
that withstands 500V using the Human Body Model and
lOOV using the Machine Model. However, static damage
can cause subtle changes in amplifier input characteristics
without necessarily destroying the device. In precision operational amplifiers, this may cause a noticeable degradation
of offset voltage and drift. Therefore, static protection is
strongly recommended when handling the OPA642.
OUTPUT DRIVE CAPABILITY
The OPA642 has been optimized to drive 750. and 1000.
resistive loads. The device can drive 2Vp-p into a 750. load.
This high-output drive capability makes the OPA642 an
ideal choice for a wide range of RF, IF, and video applications. In many cases, additional buffer amplifiers are unneeded.
Many demanding high-speed applications such as
ADCIDAC buffers require op amps with low wideband
output impedance. For example, low output impedance is
essential when driving the signal-dependent capacitances at
the inputs of flash AID converters. As shown in Figure 3,
the OPA642 maintains very low closed-loop output impedance over frequency. Closed-loop output impedance increases with frequency since loop gain is decreasing with
frequency.
FIGURE 1. Offset Voltage Trim.
'151151'
BURR-BROWN®
Burr-Brown Ie Data Book-Linear Products
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V,N O--J\J'V'--.--------j
C,
~ 1000pF
Ie = 1MHz
BW =20kHz at -3dB
Q =50
L---~-----~----o -5V
Input Bias Current: 1pA
NOTE: (1) SelectJ,. J,and R"
R2 to set input stage current for
optimum performance.
FIGURE 11. High-Q IMHz Bandpass Filter.
FIGURE 12. Low Noise, Wideband PET Input Op Amp.
I~
500
or
750
500
or
750
Differential
Input
~l
Differential
Output
L~
RF
4020
500
or
750
500
or
750
Differential Voltage Gain
=2VIV =1 + 2R,JR
~J
G
FIGURE 13. Differential Line Driver for 50Q or 75Q Systems.
BURR~BRawN®
IElElI
Burr-Brown Ie Data Book-Linear Products
2.259
For Immediate Assistance, Contact Your Local satesperson
402.0
402.0
Differential Voltage Gain
=2VN = 1 + 2R,!R"
FIGURE 14. Wideband, Fast-Settling Instrumentation Amplifier.
4020
High Speed
12-,14-, or 16-8it
ADC
Diffe~l~
Single~ Ended
Output
?
Input
Inpu1
>-1HW~----I' Input
FIGURE 15. Unity Gain Difference Amplifier.
FIGURE 16. Low Distortion Gain Amplifier for ADCs
(G='-2VN).
DAC650
Digital
Data
In
.2.>--+--oVOUT
FIGURE 17. Gain Amplifier for High Speed Digital-to-Analog Converters Like the DAC650.
BURR· BROWNe
2.260
Burr-Brown Ie Data Book-Linear Products
I EalEaII
Or Call Customer Service at 1·800·548·6132 (USA Only)
J
DAC600
Digital
Data
In
FIGURE 18. Gain Amplifier for High Speed Digital-to-Analog Converters Like the DAC600.
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1--
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0
10
100
lk
10k
lOOk
1M
10M
Frequency (Hz)
BURR·BROWN@
11511511
Burr-Brown Ie Data Book-Linear Products
2.265
ForlmmediateAssistance Contact Your Local Salesperson
J
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25°C, Vs =±5V, R, = 100n, C, =2pF, R" =402n and all four power supply pins are used unless otherwise noted.
RECOMMENDED ISOLATION RESISTANCE vs
CAPACITIVE LOAD FOR G = +5
SMALL SIGNAL TRANSIENT RESPONSE
(G = +5, R, = 100n)
200
60
160
50
120
9:
2l
I
40
/""
c
0
yg
20
10
/
o
40
0
'5 -40
8"
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30
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--80
-V
-
\
-120
V
I--
-160
-200
10
20
30
40
Time (5nsldiv)
50
Capacitive Load (pF)
G =CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
LARGE SIGNAL TRANSIENT RESPONSE
(G = +5, R, = 100n)
2.0
20
II
1.6
17
1.2
~
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I
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0.4
~
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o
-{l.4
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14
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Bandwidth
= 253MHz
CIOSed-L6~p Phase
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V"
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S
-
\
1\
5
l"-
-1.6
-2.0
2
1M
Time (5nsldiv)
10M
0
.<:
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-45
.<:
0-
~
-90
•
100M
-1S0
1G
Frequency (Hz)
G = +20 CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
G = +10 CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
29
35
26
32
c
23
~c 20
;e
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Gain
45 en
- -105 I--+-I+H++-I---+-+-H-f
~
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-85 t-H-H-t-Ht----t---t-t-i-tittt---t--t---t-,--til
310
1.0
4
3
2
Frequency (Hz)
g
o
----- ----1------
is
--
---
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PACKAGE INFORMATION(1)
-V".(l)
NOTE: (1) Making use of all four power supply pins is highly recommended,
although not required. Using these four pins, instead of just pins 4 and 7, will
lower the effective pin impedance and substantially lower distortion.
u::
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2.277
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a.
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TYPICAL PERFORMANCE CURVES
TA = +25°C, Vs = ±5V, RL = 1000, CL= 2pF, RFB = 4020 and all four power supply pins are used unless otherwise noted. RFB
=250 for a gain of +1.
OUTPUT CURRENT vs TEMPERATURE
PSR AND CMR vs TEMPERATURE
80
80
PSR+
70
a;:s!-
a:
:::E
tl
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100
:;:..r.-100
100k
125
3fo
HARMONIC DISTORTION vs FREQUENCY
(G = +5, Vo = 2Vp-p, RL = fOOO)
:s!c:
0
lL
-SO
-eo
'E
3fo
~
~
J:
V
;[
-00
<:>.
0
100M
~
;[
.11
c::
10M
1M
FreQuencv (Hz)
HARMONIC DISTORTION vs FREQUENCY
(G =-1, Vo = 2Vp-p, RL = 1000)
~
140
210
J:
-40
c::
1~
~
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Ambient Temperature (OC)
:s!-
100
00
III
tl
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U
19
~
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40
-40
;t!.
C/)
~
0
HARMONIC DISTORTION vs FREQUENCY
(G = +2, Vo =2Vp-p, RL = 1000)
SUPPLY CURRENT vs TEMPERATURE
"
~~
Ambient Temperature (OC)
20
1:'
~
10
60
Temperature (OC)
--<""'--o Vour= ±2V Full Scale
Gain=-2VN
FIGURE 10. Output Amplification for the DAC650.
BURR~BROWN@
2.286
Burr-Brown Ie Data Book-Linear Products
I EilEiII
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
DAC600
Digital
44::::>----+---0 VOUT = ov to +2.0V
Full Scale
Data
In
Gain=-2VN
FIGURE 11. Output Amplification for the DAC600.
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c(
2000
R
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Differential Voltage Gain = 5VN = 1 + 2R,IR.
a:
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FIGURE 12. Wideband, Fast-Settling Instrumentation Amplifier.
High Speed
12-, 14-, or 16-Bn
ADC
Input
4990
FIGURE 13. Low Distortion Gain Amplifier (G = +5VN).
BURR-BROWN@!
• Ell Ell. Burr-Brown Ie Data Book-Linear Products
2.287
For Immediate Assistance, Contact Your Local Salesperson
IjRR-SROWN@
OPA646
E:lE:II
DEMO BOARD AVAILABLE
See Appendix A,
Burr-Brown IC Data BookData Conversion Products
Low Power, Wide Bandwidth
OPERATIONAL AMPLIFIER
FEATURES
DESCRIPTION
• LOW POWER: 55mW
• UNITY-GAIN BANDWIDTH: 650MHz
The OPA646 is a low power, wideband voltage feedback operational amplifier. It features a high bandwidtb
of 650MHz as well as a l2-bit settling time of only
15ns. Its low input bias current and wide bandwidtb
allows it to be used for high speed integrator and active
filter designs. Its low distortion gives exceptional performance for telecommunications, medical imaging and
video applications.
• UNITY-GAIN STABLE
• FAST 12-BIT SETTLING: 15ns (0.01%)
• LOW INPUT BIAS CURRENT: 2J.lA
• LOW HARMONICS: -82dBc at 5MHz
• LOW DIFF GAIN/PHASE ERRORS:
0.025%/0.08°
APPLICATIONS
• TELECOMMUNICATIONS
• MEDICAL IMAGING
• CCD IMAGING
• PORTABLE EQUIPMENT
The OPA646 is internally compensated for unity-gain
stability. This amplifier has a fully symmetrical differential input due to its "classical" operational amplifier
circuit architecture. Its unusual combination of speed,
accuracy and low power make it an ideal choice for
many portable, multichannel and otber high speed applications where power is at a premium.
• ACTIVE FILTERS
• VIDEO AMPLIFICATION
• ADC/DAC GAIN AMPLIFIER
• HIGH SPEED INTEGRATORS
Non-Inverting
Input
3
Inverting
2
Output
Stage
6
Output
Input
4.5
-Vs
International Alrport Indust~al Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602) 746-1111 • Twx: 9111-952-1111 • Coble: BBRCORP • Telex: 06~1 • FAX: (602) 889-1510 • Immediate Product Info: (BOO) !i4lH132
2.288
PDS-ll92A
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
TA : +25°C. Vs: ±5V. RL
=1000. CL:
2pF. RFB : 4020 and all lour power supply pins are usad unless otherwise notad. RFB
=250 lor a gain 01 + 1.
OPA646H, P, U
PARAMETER
CONDITIONS
OFFSET VOLTAGE
Input Offset Voltage
Average Drift
HSQ Grade Over Temperature
Power Supply Rejection (+Vs)
(-Vol
MIN
:
±4.5 to ±5.5V
50
45
±3
±6
VCM
70
55
2
3
V'" mOV
=OV
0.4
0.9
MIN
60
48
5
7
1.5
3.0
3.0
19.1
:
±0.5V
Vo: ±2V. RL : 1000
±2.5
±2.5
60
45
43
0.1%
1%
Over-Voltage Recovery (2)
Spurious Free Dynamic Range
Differential Gain Error at 3.58MHz
Differential Phase Error at 3.58MHz
Gain Flatness to O.ldB
OUTPUT
Voltage Output
Over Specified Temperature
HSQ Grade Over Temperature
Voltage Output
Over Speciliad Temperature
HSQ Grade Over Temperature
Voltage Output
Over Specilied Temperature
HSQ Grade Over Temperature
Current Output. +25°C to max Temp
Over Speciliad Temperature
HSQ Grade Over Temperature
Short Circuit Current
Output Resistance
±1
±12
±5
±2.5
mV
Jl.V/oC
mV
dB
dB
··
±6
.
·
10
.
Jl.A
1.5
5.0
JJ.A
JJ.A
±3.0
±3.0
80
All Four Power Pins Used
G = +IVIV
G = +2VIV
G = +5VIV
G : +10VIV
G: +1. 2V Step
51
49
··
75
47
45
·
··
90
~
CO
~
0
en
a:
dB
dB
·
No Load
±2.5
±2.75
RL = 2500
±2.5
±2.7
±2.0
±2.5
RL : 1000
±40
±30
lMHz. G: +1V1V
·
0.025
0.08
100
±52
±48
60
0.2
·
·
·
·
·
·
±2.3
±2.5
±2.0
±2.5
±2.0
±2.3
±25
±35
··
·
··
··
Burr-Brown Ie Data Book-Linear Products
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53
82
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V
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kClll pF
MOil pF
65
G: +1. I : 5.0MHz
Vo : 2Vp-p. RL = 4020
G : +2VIV. Vo: 0 to I.4V. RL :
G : +2VIV. Vo: 0 to I.4V. RL :
dB
dB
··
·
·
··
650
160
45
22
180
155
5.3
5.9
15
11.5
6
1V Step
IV Step
G: +1. 2V Step
G: +1. 2V Step
G: +1. 2V Step
nVNHz
nVNHz
nV/v'Hz
nV/v'Hz
Jl.Vrms
MHz
MHz
MHz
MHz
V/Jl.S
V/Jl.s
ns
ns
ns
ns
ns
ns
dBc
%
degrees
MHz
V
V
V
V
V
V
V
mA
mA
mA
mA
0
BURR-BROWNe
I E3E31
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JJ.A
JJ.A
JJ.A
·
3.5
4
pAlv'Hz
1511 1
1.6111
Slew Rate(1)
At Minimum Spec~ied Temperature
Rise Time
Fall Time
Settling Time: 0.01%
UNITS
1.1
INPUT IMPEDANCE
Differential
Common-Mode
= 4020
MAX
·
23.2
7.5
7.1
7.2
141
V CM
OPEN-LOOP GAIN
Open-Loop Voltage Gain
Over Speciliad Temperature
TYP
W
NOISE
Input Voltage Noise
Noise Density: I : t OOHz
I = 10kHz
I =IMHz
1= lMHz to 100MHz
Voltage Noise. BW : 100Hz to 100MHz
Input Bias Current Noise
Current Noise Density. I : 0.1 Hz to 20kHz
Noise Figure (NF)
Rs: 10kCl
Rs: 500
FREQUENCY RESPONSE, RFB
Closed-Loop Bandwidth
MAX
±20
VS
INPUT BIAS CURRENT
Input Bias Current
Over Specified Temperature
HSQ Grade Over Temperature
Input Offset Current
OVer Specffied Temperature
HSQ Grade Over Temperature
INPUT VOLTAGE RANGE
Common-Mode Input Range
Over Specilied Temperature
Common-Mode Rejection
,PB,UB
TYP
2.289
a.
0
For Inimediale'Assistance, Contact Your Local Salesperson
SPECIFICATIONS
(CONT.)
ELECTRICAL
T,= +25"<:, Vs =±5V, RL = 1000, CL = 2pF, RFB = 4020 and all four power supply pins are used unless otherwise noted. RFB = 250 fora gain of +1.
OPA646H, P, U
PARAMETER
CONDITIONS
POWER SUPPLY
Specified Operating Voltage
Operating Voltage Range
TMIN
TMIN
MIN
to TMAl(
to TMAX
±5
±5.5
±6.5
±7,5
±5.25
±6.5
Over Specilied Temperature
HSQ Grade Over Temperature
6JA ,
OPA646HSQ, PB, UB
MAX
±4,5
Quiescent Current
TEMPERATURE RANGE
SpecificatiOn: H, P, PB, U, UB
HSQ
Thermal Resistance
P
U
H
TYP
Ambient
Ambient
Junction to Ambient
-40
+85
MIN
.
.
-55
120
170
120
TYP
MAX
UNITS
.
±7,5
±6,5
V
V
rnA
rnA
rnA
.
+125
°C
"<:
.
.
°CIW
°CIW
°CIW
NOTE: (1) Slew rate is rate of change from 10% to 90% of output voltage step. '(2) Recovery time to linear operation after a 50% overload recovery,
ABSOLUTE MAXIMUM RATINGS
ORDERING INFORMATION
~
YIf
Basic Model Number
Package Code - - - - - - - - - - - - - - - ' H = 8-pin Sidebraze'DIP
P = 8-pin Plastic DIP
U = 8-pin Plastic SOIC
Performance Grade Code - - - - - - - - - - - - - '
SQ = -55°C to +125°C, Reliability Screened
8<" or No Letter = -40°C to +85°C
NOTE: (1) The "B" grade of the SOIC package will be marked wHh a "B" by Pin
8. Refer to the mechanical section for the location.
PACKAGE INFORMATION(')
PIN CONFIGURATION
Top View
DIP/sOIC
NC
8
Inverting Input
+VS2(l)
MODEL
PACKAGE
PACKAGE DRAWING
NUMBER
OPA646H, HSQ
OPA646P, PB
OPA646U, UB
8-Pin Cerdip
8-Pin DIP
8-Pin SOIC
157
006
182
+VS1
Non-Inverting Input
-VSl
Supply """""","""""",,,,""",,"",,,,""",,"",,',,',,.,,""""""""""" ±5.5VDC
Internal Power Dissipation'" """"""""""". See Applications Information
Differential Input VoHage '''''"."''''''''''''''''''''''''''''''''''".,,'''''''',,. Total Vee
Input Voltage Range "",,,,,,,,,,,,,,,,,.,,,,,,,,,,,,,, See Applications Information
Storage Temperature Range: H, HSQ"""",,,,,,,,,,,,,,,,,, -65°C to +150°C
P, PB, U, UB """"""'"'' -4O"C to +125°C
Lead Temperature (soldering, lOs) """""""""",,,,,,,,,,,,,,,,,,,,,,,,,, +300'C
(soldering, SOIC 3s) """"""""""",,""""",,.,, +260"C
Junction Temperature (TJ) """"",,,",,.,,"""""""""""""""""""" +175'C
NOTE: (1) Packages must be derated based on specified 9 JA' Maximum
TJ must be observed.
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book,
Output
4
5
-VS2(1)
1\1'\
NOTE: (1) Making use of all four power supply pins is highly recommended,
although not required. Using these four pins, instead of just pins 4 and 7, will
lower the effective pin impedance and substantially lower distortion.
ELECTROSTATIC
\[)I DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from performancedegradation to complete device failure_ Burr-Brown
Corporation recommends that all integrated circuits be handled
and stored using appropriate ESD protection methods_
ESD damage can range from subtle performance degradation
to complete device failure_ Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet published specifications_
The information provided herein Is believed to be reliable; however, BURR-BROWN assumes no responsibilHy for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use ,of this information, and all use of such information shall be entirely at the users own risk. Prices and specifications are subject to change
wHhout notlce_ No patent rights or licenses to any of the circuits described herein are implied or granted to any third party, BURR-BROWN does not autholize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
IURR~BROWNIfII
2.290
Burr-Brown Ie Data Book-'-Linear Products _ Ell Ell,
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
T,= +25°C, V,= ±5V, R, = loon, C, = 2pF, R,,= 402n and all four power supply pins are used unless otherwise noted. R,. = 25n for a gain of +1.
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
Ace' PSR, AND CMR vs TEMPERATURE
110
90
Iii"
:!l.
0:
:!l.
PSR+
~
rr
100
"
""
90
E
E
80
0:
70
"\
V
:\ II
0
C/l
0..
J
c:
.iI)
::;;
0
Iii"
CMR
80
~0
60
Ace
PSR-
50
-75
-50
-25
o
+25
+75
+50
+100
70
-5
+125
rJ)
\
0
0
-3
-4
-2
-1
+1
+3
+2
a:
w
+4
+5
Common-Mode Voltage (V)
Temperature (OC)
LL
::i
c..
:E
c:(
~
c:(
INPUT BIAS CURRENT vs TEMPERATURE
4
.........
r-- r--
~
;!:!.
r-- r--..
-.....
8
o
7
a:
~
E
~
"
~
0
>a.
Q.
,....,......
"
5
C/l
-----
4
-75
-50
-25
+25
+50
+75
+100
+125
-75
-50
S
%
0
60
~
"50
+25
+50
+75
+100
+125
100
- 1--
I
------
o
VOLTAGE NOISE vs FREQUENCY
OUTPUT CURRENT vs TEMPERATURE
0
a
w
c..
Ambient Temperature (OC)
70
;!:!.
/""
-25
Ambient Temperature (OC)
<"
E
Z
SUPPLY CURRENT vs TEMPERATURE
10+
-
l¥>:
E-
10
"
~
§;
40
~
- -
60
1\
.~
z0
/
r- --- ··1--
80
40
m
......
a
~~
am
40
00
00
100 1m 140
Ambient Temperature (OC)
10
lOa
Ik
10k
lOOk
1M
10M
Frequency (Hz)
BURR-BROWNiIlI
I ~~ I
Burr-Brown Ie Data Book-Linear Products
2.291
For immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
(CONT.)
T.= +25°C, Vs= ±5V, RL = 1000, CL= 2pF, RFB = 4020 and all four power supply pin~ are used unless otheowise noted. RFB = 250 for again of +1.
SMALL SIGNAL TRANSIENT RESPONSE
(G = +1, RL = 1000)
RECOMMENDED ISOLATION RESISTANCE
vs CAPACITIVE LOAD
200
25
150 ~-+--1-~--~--t--+--1-~--~--1
g
/
20
·i
"
I
15
{£
0
': t==t==~~~~~E::t==l:~===t==J
V
V
1l
40
o
o
V
I
/
~-r--~~~--~-+--+-++--t-~
J~ t:::t-:::JIII--Ti--t-"it::::=t=j
10
~:t:=+--l-~--l-----l-----+-----'~::t=-:::j
-120
-150
-200
o
50
Time (5nsldiv)
150
100
Capacitive Load (pF)
LARGE SIGNAL TRANSIENT RESPONSE
(G = +1, RL = 1000)
G = + 1 CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
2.0
9
1.6
~
0.8
i
0.4
0
0
"
I
-1.2
\
I
~.4
~.8
r-..
/
-
/
I
0
a;-
.~
\
"-
-
-12
~O
SOIC
Bandwidth
-6 5M
1n
-15
-18
Time (5nsldiv)
til
-45
"'-
Closed·Loop
Phase
~
-2.0
c
;e
.<:
........
+
~
C)
-1.6
..
'.
-(l
:E,
\
IDII~II
I
Bandwidth
=691MHz
Gain
3
---+---.MI"--_---<~_I
('IR, = R, II R2
R,
'---v------'
V1N or Ground
Output Trim Range" +Vee
J'lL
Rrrim
to -Vee J'lL
RTrim
NOTE: (1 ) R, is optional and ean be used to canoel offset errors due to input
bias currents.
FIGURE 1. Offset Voltage Trim.
INPUT PROTECTION
Static damage has been well recognized for MOSFET devices, but any semiconductor device deserves protection
BURR-BROWN®
I EI Ell
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Burr-Brown Ie Data Book-Linear Products
2.295
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<.>
~
&
:>
10+
60
E
50
10
/
0
40
~
~
~
a
W
~
00
00
100 lW
1~
Ambient Temperature (OC)
FIGURE 4. Output Current vs Temperature.
THERMAL CONSIDERATIONS
The OPA646 does not require a heat sink for operation in
most environments. At extreme temperatures and under full
load conditions a heat sink may be necessary.
2.296
Burr-Brown Ie Data Book-Linear Products
Ie
BURR· BROW
I E!I E!I _
Or Call Customer Service at 1·800·548·6132 (USA Only)
f
CAPACITIVE LOADS
The OPA646's output stage has been optimized to drive low
resistive loads. Capacitive loads, however, will decrease the
amplifier's phase margin which may cause high frequency
peaking or oscillations. Capacitive loads greater than IOpF
should be buffered by connecting a small resistance, usually
50 to 250, in series with the output as shown in Figure 5.
This is particularly important when driving high capacitance
loads such as flash AID converters. Increasing the gain from
+ I will improve the capacitive load drive due to increased
phase margin.
(Rs typically 50 to 25Q)
FIGURE 5. Driving Capacitive Loads.
In general, capacitive loads should be minimized for optimum high frequency performance. Coax lines can be driven
if the cable is properly terminated. The capacitance of coax
cable (29pF/foot f()r RG-58) will not load the amplifier
when the coaxial cable or transmission line is terminated in
its characteristic impedance.
COMPENSATION
The OPA646 is internally compensated and is stable in unity
gain with a phase margin of approximately 60°. However,
the unity gain buffer is the most demanding circuit configuration for loop stability and oscillations are most likely to
occur in this gain. If possible, use the device in a noise gain
of two or greater to improve phase margin and reduce the
susceptibility to oscillation. (Note that, from a stability
standpoint, an inverting gain of -IVN is equivalent to a
noise gain of 2.) Gain and phase response for other gains are
shown in the Typical Performance Curves.
The high-frequency response of the OPA646 in a good
layout is very flat with frequency. However, some circuit
configurations such as those where large feedback resistances are used, can produce high-frequency gain peaking.
This peaking can be minimized by connecting a small
capacitor in parallel with the feedback resistor. This capacitor compensates for the closed-loop, high frequency, transfer
function zero that results from the time constant formed by
the input capacitance of the amplifier (typically 2pF after PC
board mounting), and the input and feedback resistors. The
selected compensation capacitor may be a trimmer, a fixed
capacitor, or a planned PC board capacitance. The capacitance value is strongly dependent on circuit layout and
closed-loop gain. Using small resistor values will preserve
the phase margin and avoid peaking by keeping the break
frequency of this zero sufficiently high. When high closedloop gains are required, a three-resistor attenuator (tee network) is recommended to avoid using large value resistors
with large time constants.
SETTLING TIME
Settling time is defined as the total time required, from the
input signal step, for the output to settle to within the
specified error band around the final value. This error band
is expressed as a percentage of the value of the outpullt
transition, a 2V step. Thus, settling time to 0.01 % requires
an error band of ±200I1V centered around the final value 0
2V.
Settling time, specified in an inverting gain of one, occurs in
only 15ns to 0.01 % for a 2V step, making the OPA646 one
of the fastest settling monolithic amplifiers commercially
available. Settling time increases with closed-loop gain and
output voltage change as described in the Typical Performance Curves. Preserving settling time requires critical attention to the details as mentioned under "Wiring Precautions."
The amplifier also recovers quickly from input overloads.
Overload recovery time to linear operation from a 50%
overload is typically only 65ns.
In practice, settling time measurements on the OPA646
prove to be very difficult to perform. Accurate measurement
is next to impossible in all but the very best eqnipped labs.
Among other things, a fast flat-top generator and high speed
oscilloscope are needed. Unfortunately, fast flat-top generators, which settle to 0.0 I % in sufficient time, are scarce and
expensive. Fast oscilloscopes, however, are more commonly
available. For best results a sampling oscilloscope is recommended. Sampling scopes typically have bandwidths that
are greater than I GHz and very low capacitance inputs.
They also exhibit faster settling times in response to signals
that would tend to overload a real-time oscilloscope.
DIFFERENTIAL GAIN AND PHASE
Differential Gain (DG) and Differential Phase (DP) are
among the more important specifications for video applications. DG is defined as the percent change in closed-loop
gain over a specified change in output voltage level. DP is
defined as the change in degrees of the closed-loop phase
over the same output voltage change. Both DG and DP are
specified at the NTSC sub-carrier frequency of 3.58MHz.
DG and DP increase with closed-loop gain and output
voltage transition. All measurements were performed using
a Tektronix model VM700 Video Measurement Set.
BURR-BROWNe
1 E:I E:l1
Burr-Brown Ie Data Book-Linear Products
2.297
tn
EX:
W
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D..
::::i
c:(
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DISTORTION
SPICE MODELS
The OPA646's Harmonic Distortion characteristics into a
1000 load are shown vs frequency and power output in the
Typical Performance Curves. Distortion can be significantly
improved by increasing the load resistance as illustrated in
Figure 6. Remember to include the contribution of the
feedback resistance when calculating the effective load resistance seen by the amplifier.
Computer simulation using SPICE is often useful when
analyzing the performance of analog circuits and systems.
This is particularly true for Video and RF amplifier circuits
where parasitic capacitance and inductance can have a major
effect on circuit performance. SPICE models are available
for the OPA646. Contact Burr-Brown Applications Department to receive a spice diskette.
ENVIRONMENTAL (a) SCREENING
-40
g
The inherent reliability of a semiconductor device is controlled by the design, materials and fabrication of the device
-it cannot be improved by testing. However, the use of
environmental screening can eliminate the majority of those
units which would fail early in their lifetimes (infant mortality) through the application of carefully selected accelerated
stress levels. Burr-Brown "Q-Screening" on the HSQ grade
provides environmental screening to our standard industrial
products, thus enhancing reliability. The screening illustrated in the following table is performed to selected stress
levels similar to those of MIL-STD-883.
IG=ll.1a~~
-50
:s
~ -60
~
C
310
-70
:5
~
~
r-.
.2
-80
"'-90
-100
10
20
50
100
210
"
200
500
lK
SCREEN
Load Resistance (0)
Internal Visual
FIGURE 6. SMHz Harmonic Distortion vs Load Resistance
with R,,= 4020.
Stabilization Bake
Temperature Cycling
Burn-In Test
METHOD
Burr-Brown QC4118
= 150"C, 24 hrs
=-65"C to 150"C, 10 cycles
Temperature = 125"C, 180 hrs minimum
Temperature
Temperature
Centriluge
NOISE FIGURE
The OPA646 voltage and current noise spectral densities are
specified in the Typical Performance Curves. For RF applications, however, Noise Figure (NF) is often the preferred
noise specification since it allows system noise performance
to be more easily calculated. The OPA646's Noise Figure vs
Source Resistance is shown in Figure 7.
20000G
HermetiC Seal
Fine: He leak rate < 5 x 10-' atm ccls,30PSiG
Gross: Perflourocarbon bubble test, 60PSiG
Electrical Tesls
As described in specifications tables.
External Visual
Burr-Brown QC5150
NOTE: Q Screening is available on the HS package only.
DEMONSTRATION BOARDS
Demonstration boards to speed prototyping are available.
Refer to the DEM-OPA64X Data Sheet for details.
~
.ill
t5~~H#~~~~~-+++~~~~
1\
10 1-+-1-I-I++Hl--+-N-+++Hl--+-I-I-I++Hl---I-W-l-Ul-ll
~
10
100
lk
10k
100k
Source Resistance (0)
FIGURE 7. Noise Figure vs Source Resistance.
BURR-BROWN--*--{) VOUT
Q.
o--NV'----1-------j
C,
~ 1000pF
L---~----~-----o ~V
Ie = tMHz
BW = 20kHz at -3dB
Q =50
NOTE: (I) Select J,. J,and R,.
Input Bias Current: IpA
R2 to set input stage current for
optimum performance.
FIGURE 9. High-Q IMHz Bandpass Filter.
FIGURE 10. Low Power, Wideband PET Input Op Amp.
500 or 750
Transmission Line
500
or
750
500
or
750
Differential
Input
L~- -.- - - l~ o
~l
Differential
Output
RF
4020
500 or 750
Transmission Line
500 or 750
500
or
750
~J
750
Differential Voltage Gain
=2VN =1 + 2R,!RG
FIGURE 11. Differential Line Driver for 50Q or 75Q Systems.
BURR-BROWN@
I EI Ell
o
a:
R2
IS8.Q
V,N
-1>-;M"--_._--I
Input
FIGURE 14. Differential Input Buffer Amplifier (G=+2VN).
FIGURE 16. Single Supply Operation.
BURR-BROWN@
2.300
Burr-Brown Ie Data Book-Linear Products
IE!lE!lI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BROWN®
OPA648
I-=--=-I
DEMO BOARD AVAILABLE
See Appendix A,
Burr-Brown Ie Data BookData Conversion Products
ULTRA-WIDEBAND CURRENT
FEEDBACK OPERATIONAL AMPLIFIER
en
a::
w
u:::
c.
::::i
FEATURES
DESCRIPTION
• WIDE BANDWIDTH: 1GHz
• LOW DIFFERENTIAL GAIN/PHASE
ERRORS: 0.02%/0.02°
The OPA648 is an ultra high bandwidth current feedback operational amplifier. The current feedback architecture also allows for a very high slew rate, which
gives excellent large signal bandwidth, even at high
gains. The high slew rate and well-behaved pulse
response allow for superior large signal amplification
in a variety of RF, video and other signal processing
applications. Fabricated on an advanced complementary bipolar process, the OPA648 offers exceptional
performance in monolithic form.
• GAIN FLATNESS: 0.1dB to 100MHz
• FAST SLEW RATE: 1200V//..ls
• CLEAN PULSE RESPONSE
• UNITY GAIN STABLE
APPLICATIONS
• HIGH-SPEED SIGNAL PROCESSING
• HIGH-RESOLUTION CRT PREAMP
• HIGH-RESOLUTION VIDEO
Current Mirror
• PULSE AMPLIFICATION
• IF SIGNAL PROCESSING
• DAC IN CONVERSION
• ADC BUFFER
v+
VOUT
Current Mirror
Internalional Airport Induslnal Park • Mailing Address: PO Box 11400 • Tucson, A2 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tol: (602) 746·1111 • Twx: 911).952·1111 • cablo: BBRCORP • Tetox: 066-6491 • FAX: (602) 888-1510 • Immsdlate Product Info: (BOO) 548-6132
PDS-1253
2.301
::a:
L
25
INVERTING INPUT BIAS CURRENT vs TEMPERATURE
- --
10
...........
8
'\.
'\.
'\.
"-
6
4
2
o
2.3
-40
25
Temperature (OC)
125
85
Temperature (OC)
OUTPUT VOLTAGE SWING
vsTEMPERATURE(RL =150)
:?
-
10+
42
Temperature (OC)
2.4
125
85
Temperature (OC)
Temperature (OC)
15
--
~
60
85
125
-liS
-40
--
25
.......
85
"-..
..........
125
Temperature (OC)
BURR-BROWN@
2.304
Burr-Brown Ie Data Book-Linear Products • EEl EEl,
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
TA = +25°C, V s "" ±5V, RL = 1Don, c L :::: 2pF,
RFB
(CONT)
= 243(1 unless otherwise noted.
NON-INVERTING INPUT BIAS CURRENT vs
TEMPERATURE
OPEN-LOOP TRANS IMPEDANCE AND PHASE
-6
200
-7
~1~
0
g 150
-45
-8
i
-9
-10
~
"~
-11
~
~o
-12
-13
-14
-15
-16
-55
-40
25
85
Ff99TFq::rrTTTn-:TlTTTiTn-nll
45
125
-90
100
-135
75
-180
!. .
m
c. .
~w
1i
_0
8-
-270
25
L..I.....l...I.I..L.l-I...l..LL-L...L.LI..I-L....L..w.==:=........u -315
100k
1M
1k
10k
10M
100M
1G
125
Temperature (0C)
en
a:
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:::i
c..
:E
Frequency (Hz)
I
I
\
\
0
%-40
0
"0
!!! 10
=
\
\
I
oJ
5
r--
--_.- . - -
-50
-50
-100
10
20
30
40
50
60
70
60
90
100
Time (2nsldiv)
Capacitive Load (pF)
LARGE SIGNAL TRANSIENT RESPONSE
(G = +2, RL = 1000)
DISTORTION vs FREQUENCY
(G = +2, RL = 1000, Vo = 2Vp-p)
700
-40
,/
560
420
[
280
.,
140
E
f;
1
-50
0
5 -140
:B-
~"
3f.y-
-50
~
8" -280
-420
~
;l!
\
\
\
V
V
/
-70
.J
II
./
V'
V'-..
-560
-700
-50
Time (2nsldiv)
1M
10M
100M
Frequency (Hz)
BURR-BROWNe
2.306
Burr-Brown Ie Data Book-Linear Products
11:11:11
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25°C, V,= ±5V, RL = l00Q, CL = 2pF, R,,= 243Q unless otherwise noted.
DISTORTION vs GAIN
10MHz HARMONIC DISTORTION vs OUTPUT SWING
(G = +2, Rl = 100Q)
(10 = 5MHz, Rl = 100Q, Vo = 2Vp-p)
~O
-50
r---------~--------~------~
r-------,.-------,--------,---------,
210
i
j
.-QO
0'
:!!.
§
'"
~"
.-QO
~
0
-70 t-:;;~-_=::j:::==..--t"=------1
310
'""o
-60
-70
~O
-90
~ -100
-110
~O ~--------~--------~------~
4
6
2
rJ)
~
_______L_ _ _ _ _ _- ' -_ _ _ _ _ _- ' -_ _ _ _
o
Non-Inverting Gain (V/v)
3
2
a:
~
4
Output Swing (Vp-p)
w
iL
::::i
~
:E
15
~
10
5
1\
Vs = ±12V
Q)
0
II
~.
1\
20
\S -c,
c, = 20PF-t\
Vs=~5J
lOOk
~
~'\ ~,
0
1M
10M
30
Vs =±15V
25
20
......
1
I
10
Vs =±5V
o
100M
o
50
~
100
(,)
-o§
Z
10
10
!
\
I
0.01
-15
-{i
-10
0
+5
+10
+15
1,000
100
'"
10
~
.!!l
0
z
400
0.1
0.01
t-~_+_c7"-boL-~t---
t-7"'-7""-~+~~t--~-+~~+~~
0.001 " ' - -......- - - ' - - - ' - - -......- - - ' - - - - '
-{i5
-25
+35
+65
+95
+125
+5
QUIESCENT CURRENT vs POWER SUPPLY VOLTAGE
INPUT VOLTAGE NOISE SPECTRAL DENSITY
'"
~
350
Temperature ('C)
50;----r----r----r----,---~--__,
100,000
S
300
t-~_+~~+~~t--_c7f~L-+~~
Input Voltage (V)
10,000
250
!
0.1
0.001
l!:>
200
100 t-~_+~~+~~t--~-+~_c~__:7'''-l
<3
~
~
150
INPUT BIAS CURRENT vs TEMPERATURE
1000 ,----,---...,.---,..-----,---...,.-----,
INPUT BIAS CURRENT
!5
100
Output Current (rnA)
1000
~
......,
I
Frequency (Hz)
E
.....1\
",'
Vs = ±12V
5
......... ......
1
Vs =±18V
~
5 15
~~5PF
c, ~ 10pF
11
~
=OpF
I
35
""
........
"'-
""-..",
~
5
c.
45
t-~_+~~+~~t__~_+~~+~--1
30
b-.-.F=:::::P
~
t-~_+~~+~~t__~_+~~+~--1
.5
20L---~----~--~----~--......--~
0.1
0.01
0.1
10
100
lk
10k lOOk 1M 10M 100M
Frequency (Hz)
2.320
±5
±10
±15
±20
Supply Voltage (±V)
Burr-Brown Ie Data Book~Linear Products
BURR-BRPWN®
I EI Ell
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
TA :::: +25°C, Vs = ±15V unless otherwise noted.
OUTPUT CURRENT LIMIT VB TEMPERATURE
450 ~--~----'-----r---~----'-----'
MAXIMUM POWER DISSIPATION
VB
TEMPERATURE
7
OPA6~4A~_
400
~
350
~
300
()
250
i
Me1aITO-3
For case Temp~
I--- 9JC =15'C/W
~
+1
r--
"'-
For ambienl Temp ~
2001----+-
I-- 9JA
150 L-__...J.____...L..____.L-__-..l.____...L..__- - I
--.55
-25
+35
+65
+95
i
450C
/W
o
+125
25
Temperalure (0C)
CIRCUIT LAYOUT
With any wide-bandwidth circuitry, careful circuit layout
will ensure best perfonnance. Make short, direct circuit
interconnections and avoid stray wiring capacitance--especially at the inverting input pin. A component-side ground
plane will help ensure low ground impedance. Do not place
the ground plane under or near the inputs and feedback
network.
Power supplies should be bypassed with good high-frequency capacitors positioned close to the op amp pins. In
most cases, a 2.2J.lF solid tantalum capacitor for each power
supply is adequate. The OPA654 can deliver load currents
up to 200mA. Even if steady-state load currents are lower,
signal transients may demand large current transients from
the power supplies. It is the power supply bypass capacitors
which must supply these current transients. Larger bypass
capacitors such as 1OJ.lF solid tantalum capacitors may
improve dynamic perfonnance in these applications.
I
"
r-- "-
50
75
100
-- '"
"'-
125
150
these sensitive nodes, making the type and location of the
potentiometer less critical. This also reduces the trim range,
providing more adjustment resolution. Do not use an offset
voltage adjustment to correct for offsets produced in other
circuitry since this can introduce large offset voltage drift.
OFFSET ADJUSTMENT
Many applications require no external offset voltage adjustment. Figure la shows connection of an optional offset
voltage trimming potentiometer. Use a small, non-inductive
potentiometer with short connections to the trim pins. Avoid
stray capacitance from the input or output nodes. The added
resistors in Figure I b help decouple the potentiometer from
,EilEiI,
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COMPENSATION
The OPA654 uses external compensation capacitors. This
tailors the open-loop response characteristics to the application. Its effect can be seen in the open-loop gain and phase
curves.
V+
CASE CONNECTION
The case of the TO-3 metal package should be connected to
ground. Failure to connect the case to ground will not
damage the device but will degrade its AC performance. The
case is internally connected to the substrate of the
dielectrically isolated Ie. This substrate is DC-neutral-it is
not connected to the V-power supply as it would be with
most analog ICs. In principle, it could be connected to any
AC ground potential such as one of the power supplies, but
DC ground is usually most convenient. Do not connect the
case to DC potentials which exceed the power supply voltages, ±VS.
en
a:
w
Trim Range. ±100mV
(a)
Trim Range. ±20mV
(b)
FIGURE 1. Optional Offset Voltage Trim Circuits.
Figures 2 shows typical capacitor values for various c1osedloop gains. This chart should be considered a starting point
for optimizing an application. Many variables including
circuit layout, source and load characteristics, and desired
dynamic behavior will affect the optimum capacitor values.
Capacitive loads change op amp behavior and higher compensation capacitor values are generally required. Resistor
Rs' shown in Figure 3, can improve the ability to drive a
capacitive load. Typical values for Rs range from 5.0 to
50.0, depending on the load and how much voltage drop can
be tolerated.
BURR-BROWN@
Burr-Brown Ie Data Book-Linear Products
2.321
o
!ci:
a:
w
D..
o
For Immediate Assistance, Contact Your Local Salesperson
CLOSED-LOOP
CLOSED-LOOP
GAIN
C,
C,
R,
R,
GAIN
C,
C,
R,
R,
+1000
+100
+10
+1
0.5pF
1pF
3pF
18pF
0
0
0
30pF
100
1000
1000
10k!l
10k!l
9000
0
-1000
-100
-10
-1
0.5pF
1pF
3pF
18pF
0
0
0
20pF
100
1000
1000
1kO
10k!l
10k!l
1k!l
1k!l
-
G =-10 SMALL-SIGNAL RESPONSE, R, =1000
G = +10 SMALL-SIGNAL RESPONSE, R, =1000
+200
>
g
},
+200
>
g
0
5
0
>0
-200
-200
G = +10 LARGE-SIGNAL RESPONSE, R, =1000
+10
G =-10 LARGE-SIGNAL RESPONSE, R, =1000
+10
o
-10
-10
FIGURE 2. Basic Amplifier Circuits.
BURR-BROWN®
2.322
Burr-Brown Ie Data Book-Linear Products
IEaEaI
0" Call Customer Service at 1·800·548·6132 (USA Only)
Figure 3 also demonstrates a compensation technique using
an additional network, R,-C,. This allows use of a smaller
value for C" producing a corresponding increase in slew
rate. It reduces the high frequency loop gain by placing the
op amp in a higher noise gain at high frequency. This
technique improves large-signal response at the sacrifice of
small-signal behavior. Settling time is increased and high
frequency noise performance will be somewhat degraded.
1000pF
G=+1
:hMIY~~-{)VOUT
R,
100n
2pF
G = + 1 LARGE-SIGNAL RESPONSE. Rt =1 oon
en
a:
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+10
~
§
u:::
::J
0
Q.
>
Rs
=5!l to son
(see text)
:E
ptimal PC board
layout. Refer to the demonstration board layout lor detailing. (3) Slew rate IS rate of change lrom 10% to 90% of output voltage step.
llalal
:::i
~Vrms
kQ
kQ
±5.75
±S.5
a:
W
u:::
0
Q
·
C/)
nVl~
kQ
·
~
0
~
V
dB
·
it)
!1A
I'A
·
250
CO
CD
:::aE
c(
...J
c(
·
·
±S.5
±7.75
±8.5
mV
I'VI"C
dB
dB
pAl-iHZ
±S
Vs
degrees
pAl.JHz
dBm
dBm
200
175
·
MHz
MHz
MHz
MHz
V/!1S
VII's
ns
ns
ns
dBc
dBc
dBm
%
%
degrees
nVi Hz
nVl-iHZ
nVl-iHZ
·
·
UNITS
dB
MHz
···
·· ··
·
··
·
·
·
15
1
·
··
TBD
10.3
2.9
1.9
1.9
33.6
~~:~~~
·
TBD
~TBD
~ 100Hz
I~ 1kHz
f ~ 10kHz
f ~ 1MHzQ
fB ~ 100Hz
~PU;o~~~~~f;~=!:e
:O:;~;"R~j'~~F;~~a1Ure
MAX
*(1)
2000
1500
15
11.5
6
5
40
2
30
I
to 200MHz
Inverting Input Bias Current
Noise Density: I = 10MHz
Non-Inverting Input Current
Noise Density: f = lOMHz
Noise Figure (NF)
TYP
195
G ~ +1, 2V Step
G ~ +1, 2V Step
G ~ +1, 2V Step
f ~ 5MHz, G ~ +1, Vo~ 2Vp-p
f ~ 20MHz, G~ +1, Vo~ 2Vp-p
f ~ 10MHz
+2, NTSC, Va = 1.4Vp-p, RL ~ 150Q
+2, NTSC, Va ~ 1.4Vp-p, RL ~ 400Q
+2, NTSC, Va ~ 1.4Vp-p, RL = 150Q
+2, NTSC, Va = 1.4Vp-p, RL ~ 400Q
G = +2, DC to 200 MHz
G = +2
~~~f6;s~~~~~~!
Over Specified Temperature
Power Supply Rejection (+Vs)
(-Vs)
TYP
900
1%
Third Order Intercept Point
Differential Gain
MIN
2.327
Z
~
W
D..
0
For Immediate Assistance, Contact YourLocal Salesperson
IjRR-BROWN®
OPA660
•
EaEaI
Wide Bandwidth
OPERATIONAL TRANSCONDUCTANCE
AMPLIFIER AND BUFFER
FEATURES
APPLICATIONS
• WIDE BANDWIDTH: 700MHz
• VIDEO/BROADCAST EQUIPMENT
• HIGH SLEW RATE: 3000V/J.iS
• COMMUNICATIONS EQUIPMENT
• LOW DIFFERENTIAL GAIN/PHASE
ERROR: 0.06%/0.02°
• WIDE BAND LED DRIVER
• HIGH-SPEED DATA ACQUISITION
• VERSATILE CIRCUIT FUNCTION
• DIRECT-FEEDBACK AMPLIFIER
• EXTERNAL la-CONTROL
• AGC-MULTIPLIER
• HIGH IMPEDANCE CURRENT SOURCE
• NS-PULSE INTEGRATOR
• CONTROL LOOP AMPLIFIER
• 400MHz DIFFERENTIAL INPUT
AMPLIFIER
DESCRIPTION
The OPA660 is packaged in SO-8 surface-mount, and
8-pin plastic DIP packages and is specified for the
extended industrial temperature range (-40°C to
+85°C).
The OPA660 is a versatile monolithic component
designed for wide-bandwidth systems including high
performance video, RF and IF circuitry. It includes a
wideband, bipolar integrated voltage-controlled current source and voltage buffer amplifier in an 8-pin
package.
The voltage-controlled current source or Operational
Transconductance Amplifier (OTA) can be.viewed as
an "ideal transistor." Like a transistor, it has three
terminals-a high-impedance input (base), a low-impedance input/output (emitter), and the current output
(collector). The OTA, however,. is self-biased and
bipolar. The output current is zero for zero differential
input voltage. AC inputs centered about zero produce
an output current which is bipolar and centered about
zero. The transconductance of the OTA can be adjusted with an external resistor, allowing bandwidth,
quiescent current and gain trade-offs to be optimized.
loon
V,o-,/W''--'-t=--!
The open loop buffer amplifier provides 700MHz
bandwidth and 3000V/llS slew rate. Used as a basic
building block, the OPA660 simplifies the design of
AGC amplifiers, LED driver circuits for Fiber Optic
Transmission, integrators for short ns pulses, fast
control loop amplifiers, and control amplifiers for
capacitive sensors and active filters.
h .. 20mA
R,
Cp
6.4pFI
~
XE
OPA660 DIRECT-FEEDBACK FREQUENCY RESPONSE
20
5Vp-p
2.8Vp-p
1.4Vp-p
15
I
10
c-
5
{-~
::J
o
,1'li~1>1'
IJ~~p_p'
-15
ii'~I(
-20
IIIIII
IIIIII
-25
-30
100k
1M
10M
100M
lG
Frequency (Hz)
Inlarnatlonal Airport Industrtal Park • Mailing Address: PO Bo. 11400
Tucson, AZ 85734 • S1ree1 Address: 6730 S. TUCson Blvd. • Tucson, AZ 85706
746-1111 • Twx: 91G-952·1111 • Cablo:BBRCORP • Tol•• :066-6491 • FAX: (602)889-1510 • Immedla1eProduc1lnfo:(80o)548-6132
2.328
PDS-1072D
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
Typical at
10:
20mA, V,: ±5VDC, T A : +25°C, RL : soon unless otherwise specified.
nDA~~nAD,
PARAMETER
AU
CONDITIONS
MIN
TYP
MAX
UNITS
Vc :OV
75
125
200
mAN
±30
55
40
40
+7
50
60
45
48
mV
JlVloC
dB
dB
dB
±5
JlA
nArC
nAN
nAN
nAN
OTA TRANSCONDUCTANCE
Transconductance
OTA INPUT OFFSET VOLTAGE
Initial
vs Temperature
vs Supply (tracking)
vs Supply (non-tracking)
vs Supply (non-tracking)
V, : ±4.5V to ±5.5V
V + : 4.5V to 5.5V
V- : -4.5V to -5.5V
OTA B-INPUT BIAS CURRENT
Initial
-2.1
5
vs Temperature
vs Supply (tracking)
vs Supply (non-tracking)
vs~ply_
OTA OUTPUT BIAS CURRENT
Output Bias Current
V, : ±4.5V to ±5.5V
V+ : 4.5V to 5.5V
V - -4.5V to -5.5V
±750
±1500
±SOO
±10
500
±10
±10
+10
Vc: OV
vs Temperature
vs Supply (tracking)
vs Supply (non-tracking)
vs Supply
OTAOUTPUT
Output Current
Output Voitage Compliance
Output Impedance
Open Loop Gain
V, : ±4.5V to ±5.5V
V+ : 4.5V to 5.5V
V - -4.5V to -5.5V
Harmonic Distortion, 2nd Harmonic
Slew Rate
Settling Time 0.1%
Rise Time (10% to 90%)
±30
V, : ±4.5V to ±5.5V
V+ : 4.5V to 5.5V
V
-4.5V to 5.5V
-2.1
5
±5
55
40
40
V, : ±4.5V to ±5.5V
V+ : 4.5V to 5.5V
V : -4.5V to -5.5V
~AN
rnA
V
nllpF
dB
±750
±1500
±500
1.0112.1
Va= ±100mV
Vo :±1.4V
Vo: ±2.5V
3.58MHz, at 0.7V
3.58MHz, at 0.7V
f: 10MHz, Vo: 0.5Vp-p
5V Step
2V Step
Vo: 100mVp-p
5V Step
700
Group Delay Time
BUFFER RATED OUTPUT
Voltage Output
Current Output
Gain
±25
+7
50
60
45
48
BUFFER INPUT NOISE
Voltage Noise Density, f: 100kHz
Differential Gain Error
Differential Phase Error
±25
f: 1kHz
±10
±4.0
BUFFER and OTA INPUT IMPEDANCE
Input Impedance
BUFFER DYNAMIC RESPONSE
Small Signal Bandwidth
Full Power Bandwidth
±25
±15
±4.7
25k 114.2
70
Ic:±1mA
vs Temperature
BUFFER INPUT BIAS CURRENT
Initial
vs Temperature
vs Supply (tracking)
vs Supply (non-tracking)
vs Supply
JlA
nArC
JlAN
JlAN
10 = ±1mA
±3.7
±10
0.96
RL : 5kn
Output Impedance
POWER SUPPLY
Voltage, Rated
Derated Performance
Quiescent Current (Programmable, Useful Range)
JlA
nArC
nAN
nAN
nAN
Mn
II pF
4
nVIv'HZ
850
800
570
0.06
0.02
-£8
3000
25
1
1.5
250
MHz
MHz
MHz
%
Degrees
dBc
V/JlS
ns
ns
ns
±4.2
±15
0.975
0.99
7112
V
rnA
VN
VN
nil pF
ps
±5
±4.5
±3
mV
JlV/oC
dB
dB
dB
±5.5
±20
±26
V
V
rnA
BURR-BROWN®
I
E!I E!l1
If0
en
a:
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:J
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a..
0
5
c.
5
0
g -5
-10
4
6
8
10
12
14
16
18
20
Total Quiescent Current -10 (rnA)
-50
-40
-20
20
40
60
OTA Input Voltage (mV)
BURR-BROWN®
I EI Ell
Burr-Brown Ie Data Book-Linear Products
2.331
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CONn
10 = 20mA, TA = +25°C, Vs = ±5V unless otherwise noted.
BUFFER AND OTA B·INPUT OFFSET VOLTAGE
vs TEMPERATURE
BUFFER AND OTA B·INPUT RESISTANCE vs
TOTAL QUIESCENT CURRENT (10)
20 r-----~----,-----~----~----__,
J
15 ~----~-----+------+-----~----~
~RINoTA
~
o
. . . r-
r-----+-----~-----+----~----~
~ ~
-10 ~----~-----+------+_----~---~
~O
~
____
~
____
o
-25
~
____
25
~
____
~
__
~
75
50
4
100
6
8
BUFFER OUTPUT AND OTA E·OUTPUT RESISTANCE vs
TOTAL QUIESCENT CURRENT (10)
§
\",
'~ r--
'" 10 -
§
3600
3400
-
::I.
*
a:
-
ROUT/
j
2800
'"
2600
20
2400
_t-Failing Edge
~~-
- - f--~- f - - -
2000
0 4
6
8
10
12
14
16
18
4
20
6
8
10
14
12
16
18
20
Total Quiescent Current -10 (rnA)
OTA TRANSCONDUCTANCE vs
TOTAL QUIESCENT CURRENT (10)
OTATRANSCONDUCTANCE vs FREQUENCY
1000
~
RL =5On
I
§.
CD
100
10 = 20mA
"c:
'"
c:
.,8
l!J
0
::I
::I
/'
."
-g
./
50
./
I-
~
/
0
0
18
-
- ---
2200
150
~
_t-"
3000
Total Quiescent Current -10 (rnA)
1lc:
16
RiSi~9 Edgel
~ 3200 /"
/RoUTOTA
-g
i
.,
30
g
14
I
3800
w 20
12
BUFFER SLEW RATE vs
TOTAL QUIESCENT CURRENT (10)
4000
40
S
10
Total Quiescent Current -10 (rnA)
Temperature (OC)
itI!
r--
r-----~----_+------+_----~----~
-15
1l
--
100
8.,
~
I-
10= lOrnA
~
1111
0
1/
66m
I
10 = SmA
,\ \
II
40mNV
10
3
4
6
8
10
12
14
16
Total Quiescent Current -10 (rnA)
18
20
106mNV
/
1M
10M
~\\\
100M
lG
Frequency (Hz)
BURR-BROWN@
2.332
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
Ie = 20mA, TA = +25°C, Vs = ±5V unless otherwise noted.
BUFFER FREQUENCY RESPONSE
BUFFER VOLTAGE NOISE SPECTRAL DENSITY
20
II I i--3dB Poinl
15
c--
I
i
f-- -
10
2.8VP-P~
5
1.4Vp-p
I--
°ri
.J.I
~.
'1
o
-5
l
o
-
10k
lOOk
1M
10M
100M
1---
II
~
II
dB
Ik
200k
1M
10M
100M
~
o
CJ)
a:
w
u::
IG
Frequency (Hz)
Frequency (Hz)
CD
CD
~
0.21~P
-15
-20
-25
100
'-
P
:: -10
o
:::i
la = 20mA R'N = 160Q RL = 100Q
0-
:i
0
t" = tF = I ns,
Gain = 4
40
OV
-2.5V
-0.625V
Input Voltage = 1.25Vp-p,
30
+2.5V
~.625V
~
>0
20
Output Voltage = 5Vp-p
BURRwBROWNI8I
I EilEiII
Burr-Brown Ie Data Book-Linear Products
2.333
For Immediate Assistance, Contact YourLocal Salesperson
TYPICAL PERFORMANCE CURVES
(CONT)
10 = 2OmA, T, = +2SOC, v, = ±sv unless otherwise noted.
BUFFER LARGE SIGNAL PULSE RESPONSE
BUFFER LARGE SIGNAL PULSE RESPONSE
(HDTV Signal Pulse)
t" = tF = 3ns, Va = SVp-p
t,. = tF = IOns, Va = SVp-p
BUFFER SMALL SIGNAL PULSE RESPONSE
son
Network
Analyzer
son
D
V,
R'N = son
son
R,
Test Circuit Buffer Pulse and Frequency Response
t. = t, = 3ns, Va = 0.2Vp-p
BUFFER DIFFERENTIAL GAIN ERROR
VB TOTAL QUIESCENT CURRENT (b)
BUFFER DIFFERENTIAL PHASE ERROR
vs TOTAL QUIESCENT CURRENT (b)
0.2S
l
g
0.10
0.20
RL=~on
w 0.15
<=
·iii
Cl
"iii
<=
.'"
0.10
i!!
~
1\
Vo = 0.7Vp-p
f= 3.S8MHz
.""
..........
...............
o
10
0.09
i!!
C>
0.08
e."
0.07
g
O.OS
4
i
12
14
w
---
16
Total Quiesoont Current -10 (rnA)
18
~
.<::
0..
20
f=3.S8MHz
0.06
O.O.S
...........
0.04
~i!!
0.03
'"
0.01
0
~
f-RL~SOOn I
I- ~q = 0.7Vp-p
-r--I--
0.02
4
6
8
10
12
14
Total Quiescent Current -
16
18
20
10 (rnA)
BURR·BRQWN®
2.334
Burr-Brown Ie Data Book-Linear Products
I E!lE!II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
10 = 20mA, TA '" +25°C, Vs '" ±5V unless otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
-30 .-------r----r--.,--,.----r---r-,-"""T""1
;if --40
RL = 150n
Vo= 0.5Vp-p
-IQ=20mA
~O
+---+--1---+--+-+-++--1
~
,,--40
~
V
/~p'
~
~ -50 1----+--+-:~+--+_t_t--l:A--I
.~
'1 -60
'1-60
~
J:
--------~-
-70
-60
~
~-3f
-------- -------~
.t
L -- -
,"
-1---
J:
MeTasurement iu miJ
___
__
10M
~
20M
HARMONIC DISTORTION vs FREQUENCV
.-------r----r--.,--r----r---r--,-"""T""1
_ RL = soon
la=20mA
3)
-1--f-I---:J.-1
____ 2~P~7'~~_
I------+--+--+_
1:--~7
-50 1----+--+--+--::...,...-31
-70
_._-- -::::p.--;~~~~~
,/ -j"_
.,/.V
'21
__ -L_[ __ --------j1 -_O~V'+
60M
100M
-60
.._--
10M
Frequency (Hz)
Mefurement rimit . -..
20M
40M
_
60M
I
100M
w
u:::
The buffer output is not current-limited or protected, If the
output is shorted to ground, currents up to 60rnA could flow .
Momentary shorts to ground (a few seconds) should be
avoided, but are unlikely to cause permanent damage. The
same cautions apply to the OTA section when connected as
a buffer (see Basic Applications Circuits, Figure 6b).
Inputs of the OPA660 are protected with internal diode
clamps as shown in the simplified schematic, Figure 1.
These protection diodes can safely conduct lOrnA, continuously (30mA peak). If input voltages can exceed the power
supply voltages by O.7V, the input signal current must be
limited.
3 B
'5
10 I-
R,
-
---
--
1.4Vp;~
0
..
-5
-_.-
-10
-20
--
-30
100k
Ro = 2500 (10 =20mA)
10 = 20mA R,
FIGURE 9. Current-Feedback Amplifier.
-
:2.-6'j~~~~~
ITITI
0.2Vp-p
._-
-----
-25
V,
....... f\-
2.8Vp-p ~
...
5
% -15
0
470
-
CD
CD
~
o
1'\
1'\
J~
It~"t[\
TffliIjOlT
en
a:
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IIIIIII
1M
10M
Frequency (Hz)
1G
100M
= 470 R2 = 56Q R. = 2000 R5 = 220 Gain = 10
FIGURE 10. Current-Feedback Amplifier Frequency
Response, G = 10.
u::
:::::i
0..
:E
--,JW....,..-----"f"--l'
Gain range: 20dB
1000
Minimum quiescent current: 1rnA
FIGURE II. Variable Gain Amplifier (Luminance).
V,
V+ 0-_-,3=-+=B-L
RE
Tuning Coil
Magnelic Head
Driver Transformer
Ro =2500 (10 =20mA)
FIGURE 13. Cable Amplifier.
V- 0-_ _3=-+=B'---1
C
8
FIGURE 12. High-Speed Current Driver (bridge
combination for increased output voltage
capability).
BURR-BROWN@
I EilEiII
Burr-Brown Ie Data Book-Linear Products
2.339
For Immediate Assistance, Contact Your Loca/Salesperson
C,
0.S... 2.SpF
+SV
R,
271<.0
Offset R.
Trim 101<.0
V,
6
-5V
Propagation Delay Time = Sns
Rise Time =I.Sns
-5V
0,
DMF3068A
FIGURE 14. Comparator (Low Jitter).
+SV
221l
11<.0
V, fl.-<>--.!I/lf\----=-I=--l
Diode
~
0 ,.0.: 2N3906
FIGURE 15. High Speed Current Driver.
BURR~BROWNI!I
2.340
Burr-Brown Ie Data Book-Linear Products
I EI Ell
Or, Call Customer Service at 1·800·548·6132 (USA Only)
Vo
v,
0
CD
CD
v,
Va
'-...8
±100mV
±300mV
±700mV
±1.4V
±2.5V
351 MHz
374MHz
435MHz
460MHz
443MHz
~
0
R'N
500
-::-
G = _ _ _1,-:-_ _ = 1; Ro =-f1+
-;:29-m-'-;;(~::-E-+-;:;R:-'N')
9m
FIGURE 17. Integrator for ns-pulses.
C/)
a:
w
FIGURE 16. Voltage Buffer with Doubled Output Current.
r
u:::
:::J
+5V
2.2pF
0.
:E
-::-
-~flf\I'----
20
lOOk
1M
~3>
--
.s
ill
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CI)
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--
Av = +1 OVIV CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
Av = +50VIV CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
50
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Frequencv (MHz)
Frequency (MHz)
45
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/
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/21
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LARGE SIGNAL
HARMONIC DISTORTION vs FREQUENCY
SMALL SIGNAL
HARMONIC DISTORTION vs FREQUENCY
cp
21
iil
18
.~
Cl
15
~
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cp
-I-
12
9
0
-45
~
-
6
c
~
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-90
-135
-180
3
o
Frequency (MHz)
0.3
10
100
1000
Frequency (MHz)
BURR-BROWN
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O.125Vpj)
+15
-ll0
-20
r
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21
.,'
-80
0-70
-80
O.25Vp-p
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=50
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Cc
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21
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~
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-20
I I I
Av
Cc
RL
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21 ~?.
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Power Output (dBm)
10MHz HARMONIC DISTORTION vs POWER OUTPUT
-
,,-
O.5Vp-p
O.25Vp·p
O.125VPil
-ll0
-20
Power Output (dBm)
-20
-
--
2Vp.p
wp1'
0
-80
o -70
31...1
-80
-40
l
I
g -50
:s
c:
-30
1000
100
10
0.3
1MHz HARMONIC DISTORTION vs POWER OUTPUT
-30
-180
1\
Frequency (MHz)
-20
-ll0
-135
o
100
-45
If!
-15
.",
'-
'"
/31
/
./
O.25Vp-p
-10
i.'
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./
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O.5Vp-p
1Vp.j>
0
+5
2V»1>
+10
+15
Power Oulput (dBm)
,EilEiI,
BURR~BROWN@
2358
Burr-Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
CHANNEL-TO-CHANNEL
CROSSTALK vs FREQUENCY
0
-15 f--
116.~~HZ
--68.3dB
6"
-45
:E.
1---
--60 1--
]I
r:l
e -75
0
-90
-10r+-+-+--+-~~-~-~-+-+--;
~i'
-30
'"
2.5MHz SMALL-SIGNAL
HARMONIC DISTORTION SPECTRUM
,;,;;. ~f"' ..
_
ffi
Gain = +10VN
-20 H--I--+--+-+---+ VoUT =500mvp-p-RL =50Q
-30H-+-·r-·-+-+-~-~--r--r-r-~
:E.
I
V
-40
~ ~r+-+-+--+-~~-~-~-+-+--;
io'"
'5
%--60r+--I--+--+-+-~-~-~--I--+--;
III
o
-105
-ro~-+-+--+r-+-~-~-~-+-+--1
-120
0.3
10
Frequency (MHz)
100
1000
--60~~~~~~~~~=F~~~~
-90~~~--~~--~~--~~~~
2
4
10
6
12
FreQuencv (MHz)
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Out
TTL
tn
ECL
Threshold
FIGURE 2. Internal OPA676 TTL Logic Level Shifter.
FIGURE 3. 1% Settling Time.
aURR-aROWN~
2.360
Burr-Brown Ie Data Book-Linear Products
IElElI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
Tektronix
SG503
To Scope
£
loon
lkO
loon
+0.5V
r
-{).5V
lMHz
Square
Wave
8
500n
To Scope
R,
75n
loon
50n
FIGURE 4. OPA675/676 Settling Time Test Circuit.
FIGURE 5. OPA676 Input Selection Transition Time Test
Circuit.
APPLICATION TIPS
6.
Wirewound resistors (even "non-inductive" types) are
absolutely unacceptable in high frequency circuits.
7.
Avoid overloading the output. Remember that output
current must be provided by the amplifier to drive its
own feedback network as well as to drive its "load."
Lowest distortion is achieved with high impedance
loads.
Wideband amplifier circuits require good layout techniques
to be successful. The use of short, direct signal paths and
heavy (20z copper recommended) ground planes are absolutely necessary to achieve the performance level inherent in
the OPA675/676. Oscillation, ringing, poor bandwith and
settling, gain peaking, and instability are typical problems
that plague all high-speed amplifiers when they are used in
poor layouts. The OPA675 and OPA676 are no different in
this respect - any amplifier with a gain bandwith product of
a few GHz requires some care be taken in its application.
8.
9.
Points to remember:
I.
2.
3.
Use a heavy copper ground plane on the component side
of your PC board. This provides a low inductance
ground and it also conducts heat from active circuit
package pins into ambient air by convection.
Bypass power supply pins directly at the active device.
The use of tantalum capacitors (l to IO~/10V) with
very short leads is highly recommended. Supply pins
should not be left unbypassed.
Signal paths should be short and direct. Feedback
resistors, compensation capacitors, termination resistors, etc. should have lead lengths no longer than 114
inch (6cm).
4.
Surface mount components (chip resistors, capacitors,
etc.) have low inductance and are therefore recommended. Parasitic inductance and capacitance should be
avoided if best performance is to be achieved.
5.
Resistors used in feedback networks should have values
of a few hundred ohms for best performance. Shunt
capacitance problems limit the acceptable range to about
lkQ or on the high resistance end and to a value that is
within the amplifier's output drive limits on the low end.
Metal film and carbon compensation resistors will be
satisfactory.
PC board traces for signal and power lines should be
wide to reduce impedance or inductance.
Don't forget that these amplifiers use ±5V supplies.
Although they will operate perfectly well with +SV and
-S.2V, the use of ±15V supplies will result in destruction.
10. Standard commercial test equipment has not been designed to test devices in the OPA67S/676 speed range.
Benchtop op amp testers and ATE systems will require
a special test head to successfully test these amplifiers.
II. High-speed amplifiers can drive only a limited amount
of capacitance. If the load exceeds 10 to 20pF consider
using a fast buffer or a small resistor to isolate the
capacitance from the amplifier's output. Capacitive
loads will cause loop instability if not compensated for.
12. Terminate transmission line loads. Unterminated lines,
such as coaxial cable, can appear to the amplifier to be
a capacitive or inductive load. By terminating a transmission line with its characteristic impedance, the
amplifier's load then appears as a purely resistive
impedance.
13. For clean, fast input selection the logic input pins should
be terminated with appropriate resistors. Resistors should
be connected from input selection pins to ground plane
with short leads. Failure to terminate long lines will
result in ringing and poor high frequency switching.
14. Plug-in prototype boards and wire-wrap boards will not
be satisfactory. A clean layout using RF techniques is
required; there is no shortcut.
BURR-BROWN®
IElElI
Burr-Brown Ie Data Book-Linear Products
2.361
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---
InputB
+
International Airport Industrial Part< • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tol:(602)746-1111 • Twx: 91Q.952-1111 • CabIe:BBRCORP • Telex:066-6491 • FAX:(602)889-1510 • ImmedlaIeProductlnlo:(800)54HI32
2.366
PDS-1l36C
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At Vee = ±5VDC, RL = 1500, COOMP = 5pF, and TA = +25'C unless otherwise noted.
nDA~'7OA"',
PARAMETER
CONDmONS
INPUT NOISE'"
Voltage: 10 = 100Hz
10 = 1kHz
10 = 10kHz
10 = 100kHz
Ie = 10Hz to 10MHz
Current: fa == 10Hz to 1MHz
OFFSET VOLTAGE'"
Input Offset Voltage
Offset Voltage Drift
Supply Rejection
BIAS CURRENT'"
Input Bias Current
OFFSET CURRENT'"
Input Offset Current
MIN
Crosstalk
Harmonic Distortion: 5MHz
V CM = OVDC
TA = TMIN to TMAX
±Voc = 4.5V to 5.5V
Settling Time: 1%
0.1%
0.01%
Differential Gain (OV to 0.7V)
Differential Phase (OV to 0.7V)
TYP
MAX
UNITS
nV/..JHZ
nV/..JHZ
nVl..JHZ
nVl,JRZ
INrms
pAl..JHZ
±3BO
±3
71
±1.5mV
±15
_V CM = OVDC
14
VCM = OVDC
0.2
65
V'N = ±0.5VDC, Vo = ±1.25V
Gain = +WN, Cc = 9pF
Gain = +2VN, Cc = 7pF
Gain = +5VN, Cc = 1pF
Gain = + WN, I = 100kHz
1= 1MHz
1= 10MHz
1= 100MHz
G = +WN, RL= 1500, Vo= 0.25Vp-p
±1mV
±10
I'V
I'V/'C
dB
50
"
j1A
2
1.5
I'A
all pF
olipF
2.0
75
±2.5
85
V
dB
50
60
dB
140
200
100
70
-102
--B3
--B4
"
MHz
MHz
MHz
dBC'"
dBC
dBC
dBC
"
"
"
-44
4.5MHz, Gain = +2VN, Cc = 2.2pF
4.5MHz, Gain = +2VN, C~ = 2.2pF
-71
--B2
45
350
11
22
30
0.02
0.02
ECL: Operation
TTL: Operation
4
4
V 0 = 2.5Vp-p, Gain = +1 VN
Gain = +WN
Gain =-WN, 1Vour Step
±3B0
±3
25kl12
10'115
Second Harmonic
Third Harmonic
Large Signal Response'"
Slew Rate
OPA678SG
MIN
32
250
"
"
dBCo,
dBC
MHz
"
"
"
VII'S
ns
ns
ns
%
Degrees
INPUT SELECTION's,
Transition Time
50% In to 50% OUt
B
6
9
"
9
ns
ns
DIGITAL INPUT
TIL Logic levels: V1L
V,"
I"
I"
ECL Logic Levels: V"
V"
I"
I"
RATED OUTPUT
Voltage Output
Current Output
Output Resistance
load Capacitance Stability
Short Circuit Current
Logic "LO"
Logic"HI"
Logic "LO", V" = OV
Logic "HI", V" = +2.7V
Logic"LQ"
Logic "HI"
Logic "LO", V" = -1.6V
Logic "HI", V," = -1.0V
RL = 1500
RL = 500
1MHz, Open Loop, Cc = 5pF
R, = 1000, Gain = +WN, C c = 10pF
Continuous to Gnd
0
+2.0
--{).05
1
-1.81
-1.15
~O
~O
±2.5
±1.7
±30
±3.75
±2.2
+0.6
+5
-{).2
20
-1.475
-0.88
-100
-100
"
"
"
"
"
"
"
"
"
"
"
"
±44
5
17
+45
"
±45
V
V
rnA
j1A
V
V
j1A
j1A
V
V
rnA
a
pF
rnA
BURR-BROWN®
I EiiI Eiill
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,....
CD
OPEN LOOP GAIN, DCI1I
Open-Loop Voltage Gain
FREQUENCY RESPONSE
Closed-Loop Bandwidth
MAX
55
21
7.8
4.9
18
2.1
Rs=OO
INPUT IMPEDANCE"'
Differential
Common-Mode
INPUT VOLTAGE RANGE"'
Common-Mode Input Range
Common-Mode Rejection
AP, AU
TYP
Burr-Brown Ie Data Book-Linear Products
2.367
if
0
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V o =OVtol.4V
=OV 10 0.7V
4
5
Closed Loop Gain
NOTE: For the gain of +2VN, Cc = 2.2pF; for the gain of +5VN, Cc = O.
~
5
Closed Loop Gain
NOTE: For the gain of +2VN, Cc = 2.2pF; for the gain of +5VN, Cc = O.
BURR-BROWN®
I ~~ I
Burr-Brown Ie Data Book-Linear Products
2.371
o
!cc
II:
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For Immediate Assistance, Contact Your Loca/Salesperson
TYPICAL PERFORMANCE CURVES
o
(CONT)
OPEN-LOOP GAIN, CMR AND PSR YS TEMPERATURE
CHANNEL-TO-CHANNEL CROSSTALK vs FREQUENCY
110
-15
100
-30
g -45
90
--
I--
:!!.
~ ~o
~ -75
<.:>
70
~
-90
I--
-105
60
-120
0.1
10
100
,R-
L---' r-
50
-50
1000
AoL -
o
-25
Frequency (MHz)
1MHz HARMONIC DISTORTION YS POWER OUTPUT
100
75
125
5MHz HARMONIC DISTORTION vs POWER OUTPUT
I-
-30
c--
-
g
.....
.§
V
-60
~
21
I--"'"'
-70
......
~O
-
31
-15
-10
-
Av= +1VN
Ce = 5pF
R, = 150n
Ie = 5MHz
-
g -40 -:!!. -50
6
i
is
....-
/
~o
1Vp-p
o
-5
5
2Vp-p 10
....-
/
r--r-- ~.1
-90
-20
15
21V
-70
~O
0.125Vp-p 0.25Vp-p 0.5Vp-p
-90
-20
V
31
5Vp-p 0.25Vp-p O. Vp-p
-15
-10
Power Output (dBm)
V
1Vp-p
2Vp-p I 10
5
-5
15
Power Output (dBm)
1OMHz HARMONIC DISTORTION vs POWER OUTPUT
20MHz HARMONIC DISTORTION vs POWER OUTPUT
-20
-20
-30
-
-40
-
-
g
50
-20
Av=+1VN
C e =5pF
-40 I - RL = 150n
I - Ie = lMHz
:!!. -50
I
25
Temperature (OC)
-20
-30
CMR-
--
Av = +IVN
Ce -5pF
RL = 150n
Ie = 10MHz_
-30
:!!. -50
-
.2
I ~O
V
-70
....-
...-
21
g
V.
/
./
-40
-
6
j ~O
31./
-70
~O
-
0.125Vp-p 0.25Vp-p 0.5Vp-p
-15
-10
-5
1Vp-p
o
Power Output (dBm)
2.372
5
-
:!!. -50
/
~O
-90
-20
-
--
2Vp-p I 10
15
-
-90
-20
Av=+1VN
Ce =5pF R, = 150n
Ie = 20MHz
-
_. --- -
-
V
I
21""-
I
./
V
/
31
0.125Vp-p 0.25Vp-p 0.5Vp-~
-15
...-
...-
-10
lVp-p
-5
2Vp-p
5
Power Output (dBm)
Burr-Brown Ie Data Book-Linear Products
10
-
15
0" Call Customer Service at 1·800·548·6132 (USA Only)
THEORY OF OPERATION
The simplified circuit of the ECL compatible OPA678 is
shown in Figure 1. It is a "classical" high-speed op-amp
architecture with one important exception-the amplifier
has two ECL logic selectable differential input stages. An
appropriate differential ECL logic signal on A and 1\ will
tum on either Q5 or Q6, steering operating (tail) current to
either differential input pair QI and Q2 or Q3 and Q4. The
input pair receiving the tail current operates as a conventional op-amp input stage while the de-selected input pair
receiving no tail current appears as an open circuit. The deselected inputs have only a few pF parasitic capacitance and
in the off condition exhibit only a very low leakage (bias)
current of about lOOpA. Two feedback networks can be
connected to each input separately allowing a wide range of
circuit applications. The feedback network connected to the
selected input operates in a normal op amp fashion while the
feedback network connected to the de-selected input is
totally inactive, appearing only as an additional load to the
amplifier's output stage.
Standard TTL and ECL logic levels may be applied to each
input selection circuit but only 350mV is typically required
to switch between inputs. This logic input sensitivity allows
simpler high-speed logic driver circuitry and it minimizes
digital noise coupling into adjacent wideband analog circuitry and allows single ended ECL inputs to be used with
VBB applied to the other input.
The OPA678 is designed to be frequency compensated by a
single capacitor connected from pin 5 to ground. Recommended compensation is shown in the Typical Performance
Curve section. A small variable capacitor may be trimmed
for best bandwidth, settling time, and gain peaking. C l o s e d _
loop gain/phase (Bode) plots are shown in the Typic
Performance Curves.
(/)
OFFSET TRIM
IX:
The laser trimmed input offset voltage is low enough for
many video and RF applications. Independent control of
input offset will require that trim adjust current be summed
into one or both inputs.
::::i
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posniv~
Supply
UUl .4.1 JuJ ~~l.lillI,,,,,
''\"
II"
'q~
,·'u·
IWI I,L.·
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.!fiJi Ij~k.I
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~
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Supply
0
a:
1M
lOOk
O.IHz TO 10Hz NOISE
I
~
0
'"'a:'"
10k
lk
Frequency (Hz)
POWER SUPPLY REJECTION RATIO
vs FREQUENCY
-...::
10M
~
~
o
Time After Power On (Minutes)
120
3M
" ~vsJ15V
80
j60
2
1M
~
~ 100
j
o
300k
120
Vs = ±15V
o
lOOk
COMMON-MODE REJECTION RATIO
vs FREQUENCY
OFFSET VOLTAGE vs TIME
V--
30k
Balanced Source Resistor (0)
5
./
hV s = 5V/oV, 25°C
>
--
-
6 Represen1alive Devices
-50
f.,
;v
20
a.
0
0.1
10
100
lk
Frequency (Hz)
10k
lOOk
1M
2
4
6
8
10
Time(s)
BURR - BROWN®
2.384
Burr-Brown Ie Data Book-Linear Products
IElElI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CO NT)
TA = +25°C unless otherwise noted.
,....
,....
C")
10Hz VOLTAGE NOISE DISTRIBUTION
NOISE DENSITY vs FREQUENCY
0
200
180
300
~
160
r--...
0::
Current
.0
E
80
Z
60
•
:I
---
f-----
30
'5 100
li;
-
1-- -
+-
120
::l
Noise
t--.
100
0
140
.j(!
en
40
Voltage
a:
20
Noise
w
i!
::i
0
10
1
10
lk
100
10
20
40
30
50
60
Voltage Noise Density (nVl1Hz)
Frequency (Hz)
Q.
::a:
SUPPLY CURRENT vs TEMPERATURE
!
~ 15 r----,----~-----r----,_----r_--_, 5 ~
460
f----t----t----------j --- - -----
;(
.a
li;
Vs = ±15V
420
~
c----- ___ +_~...
-~-t------+-
li;
§
I
-
E
..: 380
c.
E
10
------=
_
::-. _ _ _
340
r----
(,)
~
c. 300 f--g.
--
Vs = 5V!OV
-50
-25
o
25
75
50
100
0
\
2
Vs = ±15V
Vs =5V/oV
0
-5
~
-10
Temperature (OC)
----- 1------
~~_8
~
E
f-- --
~ ~.6
:I
(,)
~-
- --=
!---
1D
~ -0.4
~-
Vs = 5V/OV
..... i-"""
~
f..--
K!.
-25
~
~
§
Vs = ±15V
-
.E ~.2
E
0
~0
-1 E
E
--30
0
(,)
I
VCM = OV
-20
u
-15
~
-10 -Vs =5V/OV
5
Vs =±2'i\
c.
I\..
.E
----
~-
>I
1±15V- -
-5
o
-50
-25
-20
-15
~
"
'C
--30
~±2.5~~_
'----
'[
~
.E
INPUT BIAS CURRENT
vs TEMPERATURE
H---
VCM = OV
c.
Input Bias_ Current (nA)
INPUT OFFSET CURRENT
vs TEMPERATURE
-1
~
~
>
5
._--- r----I\--Ie----+---+----j----j
-5
(,)
125
"
3 ~
Cl
~
'__...l...._--'-_---'_ _-'-_-'-_--'-_---'
260
~+
oj
~c-IO~--~~~-+_-+_-+--___l
~
~§ -15 L-____ ____\1'-..---1--____
____' _____
__
f-----+---+--I---+- -1---+----1
(J)
4
--f----
5
"
>
0
- - - - ----- - - -
5
~
--p:::~--
I~---
f----
e----~-r----.
s
0
-25
25
50
75
100
125
Temperature eC)
-50
-25
o
25
50
75
100
125
Temperature (OC)
BURR-BROWN®
• EilEiI, Burr-Brown Ie Data Book-Linear Products
«
«z
...I
INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
2.385
0
tia:
W
Q.
0
For Immediate Assistance,' Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25QC unless otherwise noted.
OUTPUT SATURATION AND SINK CURRENT
vs TEMPERATURE
OUTPUT SHORT CIRCUIT CURRENT vs TIME
10
r::
'f:!'"
:=== +V = SVto 30V
V=OV
-
f~
6
§
~
.r::
-10
S
-20
70°C
%
0 ~ -30
2SoC
0
t::
0
is'NK = '1 OO~A
~
Is'NK = 10~A
-
~ -40 f--
-00
o
-2S
2S
SO
O°C
(jj
is'NK = 0
0.01
70oC
I
I
C/l
0.1
2SoC
10
"
(3
is'NK = lmA
C/l
30
Vs = ±ISV
O°C
r-
1
'"!!
-
40
20
0
=
is'NK = SmA
""e
~
-
IS'NK = lOrnA
~
C
SO
-00
7S
100
o
12S
2
3
Time (Minutes)
VOLTAGE GAIN vs FREQUENCY
VOLTAGE GAIN vs LOAD RESISTANCE
140
10M
±ISV
Va = +10Vwith Vs
r--
120
Va = 20mV ta 3.SV
with Vs = SVI V
100
i-"
/'
/(1)
iii'
:E-
V
~
f
80
'" "
-...... ~
C,=100pF_
Vs = ±ISV
~
...... ~
60
Vs = 5V10V
40
~
0
>
(2)
I
~
/
lOOk
100
20
I
10k
lk
0.1
10
iii'
:Er::
"-
10
""-1"'"--
'0;
Cl
Gain
If'"
Vs =SV/OV
0
>
~
~
"
120 -
'\. Phase
160
1\ ~,=±ISV
180
Vs = SV/OV
~
-10
100
I
140
\.
~
0.1
10k lOOk
1M
10M
!
'C/li1
~
i
140
r::
~ 120
I
~ 100
~
~
,--::::::::1=::::::::-1'--1.:--::::::----,
F==+----"'d---+---"-c---+-----I
1---+--
\
200 11.
......
220
80 I----+---~- Limited by
pin-ta-pin
240
capacitance
60 '--_ _-'-_ _-1-_......:;..'-'--_--'_-"'--'
10
Frequency (MHz)
160
C, = l00pF
::........
V s =±ISV
lk
CHANNEL SEPARATION vs FREQUENCY
80
V CM =OV
I-
100
Frequency (Hz)
GAIN AND PHASE vs FREQUENCY
~-
~
~~
-20
0.01
Load Resistance to Ground (Q)
NOTES: (1) TA = +2SoC, V, =±ISV. (2) TA = +2SoC, V, =5V10V.
20
~
0
o
10
100
lk
10k
lOOk
1M
Frequency (Hz)
BURR~BROWN@
2.386
Burr-Brown Ie Data Book-Linear Products
IE:lE:lI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
C")
,...
0,...
~
LARGE SIGNAL TRANSIENT RESPONSE
Vs = ±15V, G = +1
SMALL SIGNAL TRANSIENT RESPONSE
Vs =±15V,G=+1
+5OmV
+10V
OmV
0
--
OV
en
-10V
-50mV
a::
W
u:::
Vs =5V/OV
SMALL SIGNAL TRANSIENT RESPONSE
Vs = 5V/OV, G = +1, RL = 6000 to Ground
::i
Q.
:E
--r--.,jIJIIf'-----I
N channel enhancement MOSFET
Supertex, Silioon;x, Motorola, etc.
or
2x2N2222
To Ground or-Vs
FIGURE 1. Precision Current Mirror.
BURR-BROWN®
2.388
Burr-Brown Ie Data Book-Linear Products
llalal
Or, Call Customer Service at 1·800·548·6132 (USA Only)
v,
M
,....
o
,....
~
o
Input common-mode range
extends to approximately
150mV above V- supply -limited
by OPA1013 output swing.
V2
en
a::
FIGURE 2. Instrumentation Amplifier.
w
u:
::;j
D-
::i
«
..J
-t-=--OVo
Vo =V2
V,
Input v2
fi
-v,
a::
o~......a:=t====t=1j
w
DV-
O
Input common-mode range extends
to approximately 200mV below V- supply.
FIGURE 3. Instrumentation Amplifier.
V+
~
VI
_______ (+100mV)
___ ~ _______ (-100mV)
I
I
I
I
I
I
~output
Output
v,
NOTE: V, must sink 1OO~A.
FIGURE 4. Window Comparator.
BURR-BROWN®
• EEl EEl, Burr-Brown Ie Data Book-Linear Products
2.389
Forlmmediate Assistance, Contact Your Local Salesperson
BURR-BROWN®
OPA2107
IElElI
Precision Dual Difet ®
OPERATIONAL AMPLIFIER
APPLICATIONS
FEATURES
• VERY LOW NOISE: 8nV/{HZ at 10kHz
• DATA ACQUISITION
• LOW Vas: SOOIJ,V max
• LOW DRIFT: S~V/oC max
•
•
•
•
• LOW la: SpA max
• FAST SETTLING TIME: 2j.lS
to 0.01%
DAC OUTPUT AMPLIFIER
OPTOELECTRONICS
HIGH-IMPEDANCE SENSOR AMPS
HIGH-PERFORMANCE AUDIO CIRCUITRY
• MEDICAL EQUIPMENT, CT SCANNERS
• UNITY-GAIN STABLE
DESCRIPTION
The OPA2107 dual operational amplifier provides
precision Offet performance with the cost and space
savings of a dual op amp. It is useful in a wide range
of precision and low-noise analog circuitry and can be
used to upgrade the performance of designs currently
using BIFET" type amplifiers.
The OPA2107 is fabricated on a proprietary
dielectrically isolated (Olfet) process. This holds input bias currents to very low levels without sacrificing
other important parameters, such as input offset voltage, drift and noise. Laser-trimmed input circuitry
yields excellent DC performance. Superior dynamic
performance is achieved, yet quiescent current is held
to under 2.SrnA per amplifier. The OPA2107 is unitygain stable.
r------__.---Q +Vs
(8)
Outpul
(1,7)
L-~~--------~--_o-Vs
(4)
The OPA2107 is available in plastic DIP, metal TO99, and sOle packages. Industrial and Military temperature range versions are available.
Dlfet" Burr-Brown Corp.
BIFE'r National Semiconductor
International Airport Industrial Park • MoOing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602)746-1111 • Twx: 9111-852-1111 • Coble: BBRCORP • Telex: 066-6491 • FAX: (602) 889-1510 • Immediate Product Info: (800) 548-6132
2.390
PDS-863B
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
SPECIFICATIONS
TA = +25°C, Vs = ±15V unless otherwise noted.
n".~.n'7A",
PARAMETER
CONDITION
OFFSET VOLTAGE'"
Input Offset Voltage
Over Specified Temperature
SMGrade
Average Drift Over Specified Temperature
Power Supply Rejection
tNPUT BIAS CURRENT'"
Input Bias Current
Over Specified Temperature
SMGrade
Input Offset Current
Over Specified Temperature
SMGrade
INPUT NOISE
Voltage: f = 10Hz
f = 100Hz
f= 1kHz
f = 10kHz
BW=0.1 to 10Hz
BW = 10 to 10kHz
Current: f = 0.1 Hz thru 20kHz
BW = 0.1Hz to 10Hz
MIN
OPEN-LOOP GAIN
Open-Loop Voltage Gain
Over Specified Temperature
SMGrade
DYNAMfC RESPONSE
Slew Rate
Settling Time: 0.1 %
VOM = OV
Vs =±10to±18V
80
VCM = OV
VCM "" OV
R" = 0
TEMPERATURE RANGE
Specification
AP, AU, AM, BM
SM
Operating
AP,AU
AM,BM,SM
Storage
AP,AU
AM,BM,SM
Thermal Resistance (8J.,.)
AP
AU
AM,BM,SM
V~_,u,gm
MIN
1mV
2
2.5
10
4
0.25
4
1
10
1.5
35
8
1
28
84
TYP
MAX
UNITS
±10.5
±10.2
±10
80
±11
±10.5
±10.3
94
Vo =±10V, RL =2kQ
82
80
80
96
94
92
G=+1
G=-1,10VStep
13
18
1.5
2
4.5
0.001
120
VcM =±10V
G=100
G=+1,f=1kHz
f = 100Hz, RL = 2kQ
50
0.2
500
1
2
100
5
2
0.15
5
1
0.5
3
0.5
·
·
0.9
17
·
··
·
84
100
84
82
100
96
dB
dB
dB
·
V/jJS
QllpF
QllpF
V
V
V
dB
jJS
)lS
MHz
%
dB
±18
±4.5
RL =2kQ
±11
±10.5
±10.2
±10
1MHz
G=+1
·
±5
±12
±11.5
±11.3
±40
70
1000
V
V
mA
V
V
V
mA
Q
pF
-25
-55
+85
+125
-25
-55
+85
+125
-40
-65
+125
+150
90
175
200
pA
nA
nA
pA
nA
nA
nV/Ji=iZ
nV/iHz'
nV/iHz'
)lVp-p
)lVrms
fAlJi=iZ
fAp-p
±15
±4.5
)lV
mV
mV
)lV/oC
dB
nV/Ji=iZ
30
12
9
8
1.2
0.85
1.2
23
10"112
10"114
POWER SUPPLY
Specified Operating Voltage
Operating Voltage Range
Current
OUTPUT
Voltage Output
Over Specified Temperature
SMGrade
Short Circuit Current
Output Resistance, Open-Loop
Capacitive Load Stability
100
0.5
0.8
3
96
1
0.01%
Gain-Bandwidth Product
THO + Noise
Channel Separation
MAX
·
·
·
·
·
·
·
°c
°C
°c
°c
°c
°C
°CIW
°CIW
°CIW
• Specifications same as OPA21 07 AM. NOTE: (1) Specified with devices fully warmed up.
BURR-BROWN®
I EaEa I
....
,....
0
INPUT IMPEDANCE
Differential
Common-Mode
INPUT VOLTAGE RANGE
Common-Mode Input Range
Over Specified Temperature
SMGrade
Common-Mode Rejection
SM, AP, AU
TYP
Burr-Brown Ie Data Book-Linear Products
2.391
N
~
0
CJ)
a:
W
u::
:,j
D..
:::a:
«
..J
«
Z
0
fia:
W
D..
0
For Immediate. Assistance, Contact Your Loca/Salesperson
PACKAGE INFORMATION(1)
ABSOLUTE MAXIMUM RATINGS
Supply Voltage ................................................................................... ±18V
Input Voltage Range ..................................................................... ±Vs±2V
Differential Input Voltage ........................................................ Total Vs±4V
Operating Temperature
M Package .................................•................................ -55'C to +125'C
P and U Packages ........................................................ --25'C to + B5'C
Storage Temperature
M Package .................................................................. -55'C to +150'C
P and U Packages ....................................................... -40'C to +125'C
Output Short Circuit to Ground (T. =+25'C) ............................. Continuous
Junction Temperature ..............................................................:..... +175'C
Lead Temperature
M and P Packages (soldering.10s) ............................................ +300'C
U Package, SOIC (3s) ................................................................ +260'C
MODELS
PACKAGE
PACKAGE DRAWING
NUMBER
OPA2107AP
OPA2107AM
OPA2107BM
OPA2107SM
OPA2107AU
Plastic OIP
Metal TO-99
Metal TO-99
Metal TO-99
SO-8S0IC
006
001
001
001
182
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
ORDERING INFORMATION
MODELS
OPA2107AP
OPA2107AM
OPA2107BM
OPA2107SM
OPA2107AU
PACKAGE
SPECIFICATION
TEMPERATURE RANGE
Plastic DIP
Metal TO-99
Metal TO-99
Metal TO-99
SO-BSOIC
--25 to +85'C
--25 to +85'C
--25 to +85'C
-55 to +125'C
--25 to +B5'C
PIN CONFIGURATIONS
Top View - M Package
Top View - P & U Packages
-Vs
DICE INFORMATION
PAD
FUNCTION
1
2
3
4
5
6
7
8
Out A
-InA
+lnA
-V.
+lnB
-lnB
OutB
+V.
Substrate Bias: -Vs
MECHANICAL INFORMATION
Die Size
Oie Thickness
Min. Pad Size
Transistor Count
Backing
MILS (0.001")
MILLIMETERS
97x77±3
20±3
4x4
2.46 x 1.96±0.13
0.51 ±0.08
0.10 x 0.10
53
None.
OPA2107 DIE TOPOGRAPHY
BURR~BROWNe
2.392
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
TA = +25°C, Vs = ±15V unless otherwise noted.
INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY YS FREQUENCY
10
~ ~
~.,
.!!l
~
E
~
"
()
: Current Noise
1
-ft -+-t+t+-l Voltage Noise
1---
-tUiltt
lk
100
10
lJ]tJt
c--
10k
.....
TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY
at tkHz ys SOURCE RESISTANCE
100
lOOk
o
,...
,: ~~~::~:[r=,js
;::·2.:!l·-I+:Eo!mE.+l.I;;~i-"'lml--~_m
~a
N
~
o
--
F·
w
.~
a
Z
I"a
10
-f: .=1=
~=-:
>
. . ··let"li'°lNtillonlY
0.1
1M
100
lk
Frequency (Hz)
10k
lOOk
I-- .
.r1M
10M
en
a::
w
u:::
100M
Source Resistance (Q)
:::J
Q.
BIAS AND OFFSET CURRENT
ys TEMPERATURE
«
==
...J
«
Z
BIAS AND OFFSET CURRENT
ys INPUT COMMON-MODE VOLTAGE
lanA
lanA
10
10
o
~.
. / InA
InA
~
--
Bias Current
~
~
t-.
E 100
~
":g
./
Bias Current 7'"- _../
-
()
10
iii
--
-r----
0.1
-50
-25
-
100
-=--
7'"
E
~
~
L
~
Offset Current
E
~
E
§
()
10
... ~:.--
./
a
~
./
r:::p-
~
~
()
'--·-L
;;
0.1
iii 0.1
8
Offset Current·
+50
+75
+100
0.1
+125
0.01
0.01
-15
-10
Ambient Temperature (OC)
-5
a
+5
Common·Mode Voltage (V)
+10
+15
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
POWER SUPPLY AND COMMON·MODE
REJECTION vs FREQUENCY
120
120
110
+PSR
f.-
a;-
100
~
:B-
~"
80
-PSR
100
:"
.iI>
ex:
~
g.
(f)
I
Il.
80
l"
Q)
60
r-...
:--
20
60
CMR ' -
t-...
40
l"
20
"-
a
0
100
lk
10k
"
0
13
ex:"
-g"
.iI>
40
10
a;:B-
lOOk
1M
a;-
:B- 100
·u"a.,
.iI>
ex:
-g"
90
E
E
E
E
80
()
()
~0
a
~0
0
70
10M
Frequency (Hz)
-15
-10
-5
0
+5
Common-Mode Voltage (V)
+10
+15
BURR-BROWNI!l
I ElEII
Burr-Brown Ie Data Book-Linear Products
w
" Q.
()
:g
-.
+25
ti
a::
2.393
o
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
TA = +25°C,
(CONT)
v, = ±15V unless otherwise noted.
MAXIMUM OUTPUT VOLTAGE SWING
vs FREQUENCY'
OPEN-LOOP FREQUENCY RESPONSE
120
,
100
"':s"
'0;
r-.. ....
1---- ------
90
0
L-~~~~~~~~~~~~~~
5
lOOk
10k
- - ---I--
--
15
10
20
•
Supply Voltage (±Vs )
Frequency (Hz)
o
en
a:
w
u:::
:::::i
D-
:E
.3
~
20
o
<1>
g>
jg
--
()
<1>
~
;!;
~-20
U)
a:::
w
-40
10
0.1
1k
100
10k
100k
u::
4
Frequency (Hz)
Time From Power Turn-On (Minutes)
:::i
a..
:::a:
E 10
:1-
+--
U
<1>
.iI)
a:
-a:g.
en
i;
;!;
}-
80
60
-
IH~
I
-
40
---I
~
0
a.
20
0
10
Source Resistance (0)
100
1k
10k
100k
1M
10M
Frequency (Hz)
BURR-BROWN®
I E:I E:l1
z
o
~
a:::
Burr-Brown Ie Data Book-Linear Products
2.401
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
TA
;:
+25°C, Vee
(CO NT)
=±15VDC unless otherwise noted.
TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY
AT 1kHz vs SOURCE RESISTANCE
COMMON-MODE REJECTION
vs INPUT COMMON MODE VOLTAGE
120
I I I
I
m
~ 110
:
'E"
,*' 100
I
C
o
10
E
10k
100k
1M
10M
100M
1
I
i!
I~
I
II
I
-15
:
I
!
70
1k
1
1
80
8
i
!i
..,
i
I
-- T-
-
E
100
1
I
~-
"8"
::;; 90
I
I
!
I
I
0::
·1-
I
I
1
!
1
1
-5
-10
i
r-t~
I
10
Source Resistance (.Q)
Common-Mode Voltage (V)
INPUT OFFSET VOLTAGE CHANGE
DUE TO THERMAL SHOCK
GAIN-BANDWIDTH AND SLEW RATE
vs TEMPERATURE
15
150
~
"'"
4
75
~---r~---~-I~---I---~--r-~
N
I
e.
~
:-0
()
"
-
0
f
---- --~--i-
1D -75
8
····i-·~-·-,--I-
-150
-1
2
3
-75
4
-50
-25
BIAS AND OFFSET CURRENT
vs INPUT COMMON MODE VOLTAGE
-~
Bias Current
I
;{
Eo
Eo
"
~
~-'-
Offset Current
+~
()
...L~
"
~
-+-
()
1D
til
iii 0.1
0.1
.+
L
0.01
-15
-10
-5
Common-Mode Voltage (V)
75
100
125
---
I
~II!IIII
;{
50
OPEN-LOOP GAIN vs TEMPERATURE
140 , - - - ; - - ; - - ; - - ; - - ; - - - - ; - - - ,
10
10
+1
25
Ambient Temperature (OC)
Time From Thermal Shock (Minu1es)
10
15
0.01
8
130
~-+_--I-·-·-_+--r--+_--_r-_+-_1
120
I---+_--+-~ -
~
~
-
N
g
--
---
110
100
-75
-50
-25
25
50
75
100
125
Ambient Temperature (OC)
BURR-BROWN®
2.402
Burr-Brown Ie Data Book-Linear Products
IE:lE:lI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CO NT)
TA - +25'C, Vee = ±15VDC unless otherwise noted.
COMMON-MODE REJECTION
YS FREQUENCY
LARGE SIGNAL TRANSIENT RESPONSE
a;- 120 H--H+I-!--+++!-+-H-ll-l--++!H-f-l-H+-H-f++l--I-++lI
:!1.
6 100 H--H+I-!--+++!-~H-ll-l-++H-f-l-H+-H-f++l--I-++lI
~
40
u
-
--
~f
--
.
II
H-H+t--l-ttlt-+-H+l-+-++!fH-+~~+t++tI-tI
\ '\
-
N
~
o
1---- f -
en
a:::
\
-15
20 H--H+I-!--+++!-+-H-ll-l-~H-f-hH+-H-f++l-~++lI
o
----
H-H+t--l-ttlt-+-H+l-'l'.r-t1fH-+H+-fH+t++tI-tI
60H--H+I-!--+++!-+-H-ll-l-++fI-'I....r-H+-H-f++l--I-++lI
1
E
o
--
15
g
~ 80
,....
,....
,....
w
u::
.L-J.....L..J..1L..L.....l.W-.J.....J.J..I.L....l-UJ.L...L-.l..llL..J...J...LJ.J.....J.....L..J..B
10
100
10k
lk
lOOk
1M
10M
25
Frequency (Hz)
Time
:::::i
50
(~s)
D-
==
IV
60
Phase
Margin
_.
40
IT 65'
20
I11-J I
-110
:!en
~
.f\;
-135
80
.,
1//
I
V
::L
-;60
e." i=E
0>
IP
"
0.01%
40
ien
0..
0
-180
100
10k
lk
lOOk
1M
w
D-
O
0.1%
1/
~ ./
20
I......
10
z
o
~
a:::
I
-45
a;- 100
:!1.
.0; 80
.s
100
·iiz
"
f
~~
100
Volta e Noise
~
10
l¥
~
·sz"
r-;-..
E
10
~
0
-180
0
Iyurrenlt ~Aisel
-20
1
10
100
lk
10k
Frequency (Hz)
lOOk
1M
10M
10
100
lk
10k
lOOk
1M
Frequency (Hz)
BURR-BROWN®
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TYPICAL PERFORMANCE CURVES (CO NT)
T. = +25°C. Vs = ±15V unless otherwise noted.
10nA
<"
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E
~
<"
.e,
E 1nA
~
0
c.
£
c.
£
8s
.• =
~~~~=_F.• ._.~.f C'-~_=.:fc.~ ~ _~.fr-=.: :..JF_=.~=-ff~i=.±I=~pfu~:~.~
~.~_~-~_~-q-~~-~~_~:~~~.
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:....:c-I--.it' .~~
o
-25
25
75
50
100
N
~
<"
.e,
100 E
~
"
--- -··j-~=l:P'=1r-_-j-V",L'=loo=--j-- .
. __ ..-
s
15
100r.~_~~_~~~.~_~~~.~~~~~~~~.. ~.~.*j-~.~~_~_~~~.~_ 10
I~
I--"" ---~ -I--- Input - --P---""-_ . f- -- -t-'[""eLculent-..
10
-15
125
___
-6
-10
5
10
~
1nA
0
-
-50
U)
. . . ·__ C
"
15
0
-75
IIII:t
0
INPUT BIAS AND INPUT OFFSET CURRENT
vs INPUT COMMON-MODE VOLTAGE
INPUT BIAS AND INPUT OFFSET CURRENT
8s
c.
£
--
1
15
Common-Mode Voltage (V)
Ambient Temperature (OC)
0
en
a:
w
u:::
::::i
Q.
.
50
'§
;"
""
Ui'
CHANNEL SEPARATION vs FREQUENCY
160
I
/
....-
25
Temperature ("C)
/
V II
b:Jl~
......
f.-
~
r--
I----·Gain-BanLdth
G = +100
SETTLING TIME vs CLOSED-LOOP GAIN
1111
-
20
Iii
Supply Voltage (tVsl
_ V o =10VStep
RL = 11<0
4 - CL =50pF
~
e
* !
0:
1--" .... ,....
5
N
29
Slew Rate
8
6
10M
-75
-SO
-25
0
25
50
75
100
125
Ambient Temperature ("C)
aURR~BROWN®
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TYPICAL PERFORMANCE CURVES
T.
= +25'C,
(CONT)
Vs = ±15V unless otherwise noted.
LARGE-SIGNAL TRANSIENT RESPONSE
SMALL-SIGNAL TRANSIENT RESPONSE
:>
.5-
+10
~
+100
--
.
"
~
~
0
~
"5
>
"5
%
%
0
en
a:
0-100
-10
w
0
5
Time
10
111"
(~s)
u::
211"
::::i
Time (us)
Il.
:i
.1
Isc+ and lse-
1---" ~ _.
50
75
100
125
Ambient Temperature ('C)
0.4
0.3
0.2
8
10
12
14
16
18
20
22
24
Supply Voltage, ±Vs (V)
MAXIMUM POWER DISSIPATION vs TEMPERATURE
1.4
~
c:
0
1.0
:~
0
0.8
fii
I""......
6J.• = 90'CIW
Soldered to
, / Circuit Board
1.2
"""
(see text)
';-,
i;; 0.6
1
~
a.
1
Maximum
0.4 r---Sp cilied Operating _
1
~
1"-1
Temperature
t-0.2 I--85'C
1
o
25
50
,,
,
1
I
o
,,
75
100
125
,,
,,
150
Ambient Temperature ('C)
BURR-BROWN(5l
I EiI Eill
Burr-Brown Ie Data Book-Linear Products
2.415
For Immediate Assistance, Contact Your Local Salesperson
APPLICATIONS INFORMATION
The OPA2604 is unity-gain stable, making it easy to use in a
wide range of circuitry. Applications with noisy or high
impedance power supply lines may require decoupling capacitors close to the device pins. In most cases IJ.lF tantalum
capacitors are adequate.
and capacitive load will decrease the phase margin arid may
lead to gain peaking or oscillations. Load capacitance reacts
with the op amp's open-loop output resistance to form an
additional pole in the feedback loop. Figure 2 shows various
circuits which preserve phase margin with capacitive load.
Request Application Bulletin AB-028 for details of analysis
techniques ane! applications circuits. ,
DISTORTION MEASUREMENTS
For the unity-gain buffer, Figure 2a, stability is preserved by
adding a phase-le;ld network, Rc and C e . Voltage drop across
Rc will red~ce output voltage swing with heavy loads. An
alternate circuit, Figure 2b, does not limit the output with low
load impedance. It provides a small amp1lllt of positive feedback to reduce the net feedback factor. IripUtimpedance of this
circuit falls at high frequency as opamp gain rolloff reduces
the bootstrap action on the compensation network.
The distortion pro(juced by the OPA2604 is below the measurement limit of virtually all commercially available equipment. A special test circuit, however, can be usee! to extend the
measurement capabilities.
Op amp distortion can be considered an internal error source
which can be referred to the input. Figure 1 shows a circuit
which causes the op amp distortion to be 10 1 times greater
than normally produced by the op amp. The addition of R3 to
the otherwise standard non-inverting amplifier configuration
alters the feedback factor or noise gain of the circuit. The
closed-loop gain is unchanged, but the feedback available for
error correction is reduced by a factor of 101. This extends the
measurement limit, including the effects of the signal-source
purity, by a factor of 101. Note that the input signal and load
applied to the op amp are the same as with conventional
feedback without R3.
Figures 2c and 2d show compensation techniques for
noninverting amplifiers. Like the follower circuits, the circuit
in Figure 2d eliminates voltage drop due to load current, but
at the penalty of somewhat reduced input impedance at high
frequency.
Figures 2e and 2f show input lead compensation networks for
inverting and difference amplifier configurations.
NOISE PERFORMANCE
Validity of this technique can be verified by duplicating
measurements at high gain andlor high frequency where the
distortion is within the measurement capability of the test
equipment. Measurements for this data sheet were made with
the Audio Precision, System One which greatly simplifies
such repetitive measurements. The measurement technique
can, however, be performed with manual distortion measurement instruments.
Op amp noise is described by two parameters-noise voltage
and noise current. The voltage noise determines the noise
performance with low source impedance. Low noise bipolarinput op amps such as the OPA27 and OPA37 provide very
low voltage noise. But if source impedance is greater than a
few thousand ohms, the current noise of bipolar-input op amps
react with the source impedance and will dominate. At a few
thousand ohms source impedance and above, the OPA2604
will generally provide lower noise.
CAPACITIVE LOADS
The dynamic characteristics of the OPA2604 have been
optimized for commonly encountered gains, loads and operating conditions. The combination of low closed-loop gain
R,
-r-~
IO:A2~>----+-O
R, ""
~
V
Generator
Output
SIG. DIST.
GAIN GAIN
1
101
VO = 10Vp·p
R,
R,
~
5kn
50n
10
101
500n
5kn
500n
100
101
50n
5kn
~
Analyzer
Input
I
I
I
~
V
(3.5Vrms)
R,
Audio Precision
System One
Analyzer"
I
I
I
~RL
lkn
~
* Measurement BW = 80kHz
<
IBM PC
or
Compatible
FIGURE 1. Distortion Test Circuit.
2.416
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Or, Call Customer Service at 1·800·548·6132 (USA Only)
(b)
(a)
Cc
eo
·0
e,
CL
CL
Cc = ~120 X 10-12 CL
fOOOPF
f
e,
OOOPF
-:-
2kQ
-:-
10Q
R,
Rc = 4C L X 10'0_1
en
a:
w
u:::
Cc = C, X 103
Rc
R,
::::i
Q.
::IE
(d)
(e)
R,
R,
-:-
«
...I
«
Z
R,
-:Rc
o
20Q
e,
e,
CL
CC=~CL
R,
Rc = 2CL X 10'"- (1 + R,IR,)
fOOOPF
R,
-:-
!:;:
a:
·0
eo
w
Q.
o
CL
fOOOPF
Cc = CLX 103
Rc
(e)
(f)
R,
R,
H1 .
2kQ
2kQ
e,
2kQ
.,o---.j\J'V'---;----/
Rc
20Q
CL
ISOOOPF
Cc
.,o-,N'V'---+-+-.N'V'--,
0.22~i
R,
Rc
=2C L X 10'"- (1
+ R,IR,)
C _ CLX1Q3
c-
Rc
R _
R,
c - 2C LX 10'"- (1 + R,IR,)
Cc =C,X1Q3
Rc
NOTE: Design equations and component values are approximate. User adjustment is required for optimum performance.
FIGURE 2. Driving Large Capacitive Loads.
BURR-BROWN®
11:11:11
Burr-Brown Ie Data Book-Linear Products
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For Immediate Assistance, Contact Your Local Salesperson
POWER DISSIPATION
The OPA2604 is capable of driving 6000 loads with power
supply voltages up to ±24V. Internal power dissipation is
increased when operating at high power supply voltage. The
typical perfonnance curve, Power Dissipation vs Power Supply Voltage, shows quiescent dissipation (no signal or no
load) as well as dissipation with a worst case continuous sine
wave. Continuous high-level music signals typically produce
dissipation significantly less than worst case sine waves.
Copper leadframe construction used in the OPA2604 improves heat dissipation compared to conventional plastic
packages. To achieve best heat dissipation, solder the device
directly to the circuit board and use wide circuit board traces.
OUTPUT CURRENT LIMIT
Output current is liruited by internal circuitry to approximately ±40mA at 25°C. The Hruit current decreases with
increasing temperature as shown in the typical curves.
22kQ
R,
V,N o---,I\I\J"-_---,J\IIfL--+--.,Ml'----I
10kQ
>---~-{)Vo
FIGURE 3. Three-Pole Low-Pass Filter.
R,
V,N O----Jvv'---.......- - -.......--___,/V'v"---..--l
6.04kQ
Ca
IOOOPF
Low'pass
3-pole Butterworth
f-3dB
Cz
~OOOPF
=40kHz
See Application Bulletin AB'()26
for information on GIC filters.
FIGURE 4. Three-Pole Generalized Imruittance Converter (GIC) Low-Pass Filter.
2.418
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111:1'
C,'
o
CO
N
I-OuIDAC
~
o
rc;;;;1='J~
•C - .
Low-pass
2-pole Butterworth
f..,," = 20kHz
en
a:
w
R, = Feedback resislance =2kn
fc = Crossover frequency = 8MHz
u:
::::i
0..
::::i
FIGURE 5. DAC UV Amplifier and Low-Pass Filter.
«
..J
«
Z
o
tc
a:
w
0..
o
V,N
:>---OVo
G=1
+
FIGURE 6. Differential Amplifier with Low-Pass Filter.
'151151'
BURR-BRawN~
Burr-Brown Ie Data Book-Linear Products
2.419
For Immediate Assistance, Contact Your Local Salesperson
loon
'C,~~ 2xC R, f,
10kll
OUT
R, =Internal feedback resistance = I.Skll
f, = Crossover frequency = BMHz
G= 101
(4OdB)
10
Piezoelectric
Transducer -
PCM63
20-bit
D/A
Converter
'It
Vo =±3Vp
To lOw-pass
filter.
Provides input bias
current return path.
FIGURE 7. High Impedance Amplifier.
FIGURE 8. Digital Audio DAC I-V Amplifier.
1/20PA2604
t
1
t
VOUT = V,N (1 + R:!R,)
I
FIGURE 9. Using the Dual OPA2604 Op Amp to Double the Output Current to a Load.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and ali use of such information shall be entirely at the user's own risk. Prices and spscnications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andlor systems.
BURR-BROWNIt!>
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SOUND QUALITY
The following discussion is provided, recognizing that
not all measured performance behavior explains or
correlates with listening tests by audio experts. The
design of the OPA2604 included consideration of both
objective performance measurements, as well as an
awareness of widely held theory on the success and
failure of previous op amp designs.
SOUND QUALITY
The sound quality of an op amp is often the crucial
selection criteria-even when a data sheet claims exceptional distortion performance. By its nature, sound
quality is subjective. Furthermore, results of listening
tests can vary depending on application and circuit
configuration. Even experienced listeners in controlled
tests often reach different conclusions.
Many audio experts believe that the sound quality of a
high performance FET op amp is superior to that of
bipolar op amps. A possible reason for this is that
bipolar designs generate greater odd-order harmonics
than FETs. To the human ear, odd-order harmonics
have long been identified as sounding more unpleasant
than even-order harmonics. FETs, like vacuum tubes,
have a square-law I-V transfer function which is more
linear than the exponential transfer function of a bipolar
transistor. As a direct result of this square-law characteristic, FETs produce predominantly even-order harmonics. Figure 10 shows the transfer function of a
bipolar transistor and FET. Fourier transformation of
both transfer functions reveals the lower odd-order
harmonics of the FET amplifier stage.
1r
Ic~
'~:Cil
o
0.65
VBE = 1kHz + DC Bias
FFT
,
I
VBE (V)
410
510
2 3 4
Frequency (kHz)
5
fa
o
210
310
{~:r~~~
510
1
0
VGS (V)
a:
w
u::
:::::i
c..
:E
c:(
...I
c:(
THE OPA2604 DESIGN
Z
The OPA2604 uses FETs throughout the signal path,
including the input stage, input-stage load, and the
important phase-splitting section of the output stage.
Bipolar transistors are used where their attributes, such
as current capability are important and where their
transfer characteristics have minimal impact.
The topology consists of a single folded-cascode gain
stage followed by a unity-gain output stage. Differential
input transistors J I and J2 are special large-geometry, Pchannel JFETs. Input stage current is a relatively high
800/lA, providing high transconductance and reducing
voltage noise. Laser trimming of stage currents and
careful attention to symmetry yields a nearly symmetrical slew rate of ±25VIllS.
The JFET input stage holds input bias current to approximately lOOpA, or roughly 3000 times lower than
common bipolar-input audio op amps. This dramatically reduces noise with high-impedance circuitry.
log
(Vol
1
(/)
~-+--2C>:-~3-+4~5
Frequency (kHz)
FIGURE 10. I-V and Spectral Response of NPN and
JFET.
The drains of J I and J2 are cascoded by QI and Q2,
driving the input stage loads, FETs J3 and J4 • Distortion
reduction circuitry (patent pending) linearizes the openloop response and increases voltage gain. The 20MHz
bandwidth of the OPA2604 further reduces distortion
through the user-connected feedback loop.
The output stage consists of a JFET phase-splitter
loaded into high speed all-NPN output drivers. Output
transistors are biased by a special circuit to prevent
cutoff, even with full output swing into 6000 loads.
The two channels of the OPA2604 are completely
independent, including all bias circuitry. This eliminates any possibility of crosstalk through shared circuits-even when one channel is overdriven.
Burr-Brown Ie Data Book-Linear Products
2.421
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~
a:
w
c..
o
For Immediate Assistance, Contact Your Local Salesperson
OPA2650
BURR-BROWN®
I-=--=-I
PRELIMINARY INFORMATION
SUBJECT TO CHANGE
WITHOUT NOTICE
Wideband, Low Power Voltage Feedback
OPERATIONAL AMPLIFIER
FEATURES
DESCRIPTION
• LOW POWER: 50mW
The OPA2650 is a dual, low power, wideband voltage
feedback operational amplifier. It features a high bandwidth of 560MHz as well as a l2-bit settling time of
only 15ns. The low input bias current allows its use in
high speed integrator applications, while the wide
bandwidth and true differential input stage make it
suitable for use in a variety of' active filter applications. Its low distortion gives exceptional performance
for telecOminunications, medical imaging and video
applications.
• UNITY GAIN STABLE BANDWIDTH:
560MHz
• FAST SETTLING TIME: 15ns to 0.01%
• LOW INPUT BIAS CURRENT: 2.7J.LA
• DIFFERENTIAL GAIN/PHASE ERROR:
0.01%/0.01°
• PACKAGE: 8-Pin DIP and 8-Pin SOIC
APPLICATIONS
• HIGH RESOLUTION VIDEO
• MONITOR PREAMPLIFIER
• CCD IMAGING AMPLIFIER
• ULTRASOUND SIGNAL PROCESSING
• ADC/DAC GAIN AMPLIFIER
• ACTIVE FILTERS
The OPA2650 is internally compensated for uuitygain stability. This amplifier b.as a fully symmetrical
differential input due to its "classical" operational
amplifier circuit architecture. Its unusual combination
of speed, accuracy and low power make it an outstanding choice for many portable, multi-channel and other
high speed applications, where power is at a premium.
The OPA2650 is also available in single OPA650 and
quad OPA4650 configurations.
• HIGH SPEED INTEGRATORS
• DIFFERENTIAL AMPLIFIER
Non-Inverting
Input
Output
Stage
Output
Inverting 0----+-'=-----'
Input
-VS
Internallonal Alrporllndustrial PaJ1< • Mailing Add....: PO Box 11400
Tucson, AZ 85734 • 51lii0i Add ....: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602)746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (602)889-1510 • Immediate Product Info: (BOO) 548-6132
2.422
PDS-1266
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SPECIFICATIONS
TA = +25'C, Vs = ±5V, RL = 1000, C L= 2pF, R" = 4020 unless otherwise noted. R" = 250 lor a gain 01 + 1.
,UB
OPA2650P,U
PARAMETER
CONDITIONS
Closed-Loop Bandwidth'"
Slew Rate'S)
At Minimum Specilied Temperature
Rise Time
Fall Time
Settling Time
0.01%
0.1%
1%
Spurious Free Dynamic Range
Differential Gain
Differential Phase
Gain Flatness
Crosstalk
MIN
G = +1, 2V Step
G = +1, 2V Step
G = +1, 2V Step
G = +1, I = 5.0 MHz
V = 2Vp-p
G = +2, NTSC,'\io = 1.4Vp, RL = 1500
G = +2, NTSC, Vo = 1.4Vp, RL = 4000
G = +2, NTSC, Vo = 1.4Vp, RL = 1500
G = +2, NTSC, Vo = 1.4Vp, Rl = 4000
DC to 100MHz
Input Referred, 5MHz, Channel-ta-Channel
INPUT BIAS CURRENT
Input Bias Current
Over Temperature
Input Offset Current
Vs = ±4.5V to ±5.5V
50
45
= OV
VetA
.MI""
·
±1
±5
70
55
±3
2
3
0.4
0.9
5
8
1.5
3.0
±0.35
3
%
%
Degrees
Degrees
dB
±1
60
48
·
·· ··
4
5.5
··
···
·
1.1
mV
flVI"C
dB
dB
f1A
f1A
f1A
f1A
VetA
= +2V
±2.2
52
±2.8
57
65
Differentia!
16111
OPEN-LOOP GAIN
Open-Loop Voltage Gain
Over Specified Temperature
~~~~~~utPut
Over Specilied Temperature
Current Output
Over Specilied Temperature
Short Circuit Current
qutp~t Resistance
~~ = ±2V, ~~ = 1000
45
43
51
49
No Load
RL = 2500
RL = 1000
+25'C to Max Temperature
±2.5
±2.5
±2.0
±35
±25
±2.75
±2.7
±2.5
±50
±48
60
0.2
= ±2V,
= 1000
1MHz, G = +1
~~~~~d ~::~~g Voltage
Operating Vottage Range
~:~c;~f~~e~~mperature
~;.;;;~~;,~~~~ U~~~?~B
Thermal ReSistance, 6JA
P
U
n
±10.5
±11
-40
55
53
···
·
±40
±30
±5.5
±15.5
±17.5
·
±10
±10.5
V
V
V
mA
mA
mA
0
±14
±16
·
+85
120
170
dB
dB
±55
±52
·
V
V
mA
mA
'C
'C/W
'C/W
NOTES: (1) An asterisk
specilies the same value as the grade to the left. (2) Bandwidth can be negatively affected by a non-optimal PC board layout. ReIer
to the demonstration board layout lor details. (3) Slew rate is rate 01 change lrom 10% to 90% 01 output voltage step.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product lor use in lile support devices and/or systems.
.
BURR~aROWN6491 • FAX: (602) 889-1510 • ImmadlataProducllnfo:(900)~132
2.426
PDS·1l29C
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
DC·SPECIFICATIONS
At Vee = ±5V, RQ = 750n, TA = 25"C, and configured as noted under "CONDITIONS".
(0
(0
,AU
PARAMETER
CONDITIONS
OTA INPUT OFFSET VOLTAGE
Initial
vs Temperature
vs Supply (tracking)
vs Supply (non-traCking)
vs Supply (non-tracking)
Matching
OTA B-INPUT BIAS CURRENT
Initial
vs Temperature
vs Supply (tracking)
vs Supply (non-tracking)
vs Supply (non-tracking)
Matching
OTA C-OUTPUT BIAS CURRENT
Initial
vs Temperature
vs Supply (tracking)
vs Supply (non-tracking)
vs Supply (non-tracking)
Matching
B-lNPUT IMPEDANCE
Impedance
OTA INPUT NOISE
Input Noise Voltage Density
Output Noise Current Density
"', I
i Ratio
OTA C-RATED OUTPUT
Output Voltage Compliance
Output Current
Output Impedance, rc
OTA E-RATED OUTPUT
Vonage Output
DC Current Output
VonageGain
Output Impedance, rE.
POWER SUPPLY
Rated Voltage
Derated Performance
Positive Quiescent Current
lor both OTAs(4)
Positive Quiescent Current
lor both OTAs(4)
Quiescent Current Range
TEMPERATURE RANGE
Specification
Thermal Resistance, 6JA
AP
AU
MIN
RE = 5Ok!!, Re = 40n
Vee = ±4.5V to ±5.SV, RE = SOk!!, Re = Ikn
Vee = +4.5V to +5.SV, RE = SOk!!, Re = Ikn
Vcc ~ -4.5V to -O.SV, RE = 50k!!, Rc = 1k!!
RE = lOOn, Rc = 40n
TYP
MAX
12
35
27
15
40
2
±30
1
-1/+5
~A
±1
nAl"C
nAIV
nAIV
nAiV
~
60
160
40
0.2
N
~
mV
~V/"C
±7
-0
Vee = ±4.SV to ±5.SV, RE = SOk!!, Re = Ikn
Vee = +4.SV to +S.SV, RE = 50k!!, Re = Ikn
Vcc = -4.SV to S.SV, RE = SOkn, Rc = 1k!!
UNITS
dB
dB
dB
mV
•
RE = lOOn, Re = 1k!!
0.5
1.5
72
236
92
0.06
Vcc = ±4.SV to ±S.SV
Vce = +4.5V to +S.5V
Vec = -4.SV to -S.SV
-0.51+1.5
rnA
~"C
~
~
~AlV
±a.s
rnA
la=±17mA
4.5111.5
MnllpF
I = 20kHz to 100MHz
4.4
0.09
97
nVl.JHZ
nAl.JHZ
dB
±3.4
±7S
V
rnA
SIN = 20 log' (0.7NN ·,ISMHz)
Ic = ±5mA, RE = lOOn, Rc = 1k!!
Rc = 40n, RE = loon
V'N=±3V
la=±17mA
RE = lOOn, Rc = 40n
RE = lOOn, Rc = 40n
V'N=±4V
V'N=±2.5V
RE = loon
RF =50kn
.la=±17mA
4.5116.5
k!!
II pF
±3.0
V
±2S
rnA
0.86
0.98
VN
VN
16112.2
nil pF
RE = 50k!!, Rc = 1k!!
RE = SOk!!, Rc = 40n
Ra = 7S0n, RE = 50k!!, Rc = 1k!!,
Both Channels Enabled
Ra = 7S0n, RE = SOk!!, Rc = 1k!!,
Both Channels Disabled
Programmable
Ra = 3k!! to 30n
±4.S
±3
+15
±5.S
±3
±65
Ambient Temperature
-40
+85
±6
+17
+18
90
100
VDC
VDC
rnA
rnA
+4
rnA
"C
"C/W
"C/W
NOTES: (1) Characterization sample: (2) "Typical Values" are Mean values. The average of the two ampl~iers is used for amplifier specific parameters. (3) "Min" and
"Max" Values are mean ±3 Standard Deviations. Worst case 01 the two amplifiers (Mean ±3 Standard Deviations) is used for amplifier specific parameters. (4) 1-Qtypically
2mA less than I'Qdue to OTA C-Output Bias Current and TTL Select Circuit Current.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product lor use in life support devices andlor systems.
BURR-BROW"N®
I EiI Eill
Burr-Brown Ie Data Book-Linear Products
0
2.427
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For Immediate Assistance, Contact YOUf Local Salesperson
SPECIFICATIONS
(CaNT)
ELECTRICAL
AC-SPECIFICATION
Typical at Vee: ±5VDC, Ra :
750n, Ie :
±37.5mA (V'N :
2.5Vpp, RE :
lOOn), Ie :
±75mA (V,N ' ~ 2,5Vpp, RE
50n), R,ouReE :
50n,
and TA :::: +25°C unless otherwise noted.
OPA2662AP, AU
PARAMETER
CONDmONS
MIN
TYP
MAX
UNITS
FREQUENCY DOMAIN
LARGE SIGNAL BANDWIDTH
le:±37,5mA
le:±75mA
Ie: ±37.SmA (Optimized)
Ie = ± 7SmA (Optimized)
GROUP DELAY TIME
Measured Input to Output
(Demo Board Used)
RE
RE
RE : lOOn, Re: 50n
RE : loon, Re: 25n
150
200
370
250
MHz
MHz
'MHz
MHz
Bto E
BtoC
1.2
2.S
ns
ns
I : 10MHz, Ie: ±37.SmA
-31
-37
-33
-32
-29
-32
-30
-2S
-31
-30
-28
-23
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
= lOOn, Re: 50n, C, = 5.6pF
= lOon, Re : 2Sn, CE= 5.6pF
RE = lOOn, Re = son
HARMONIC DISTORTION
Second Harmonic
Third Harmonic
Second Harmonic
I : 10MHz, Ie: ±7SmA
Third Harmonic
Second Harmonic
Third Harmonic
Second Harmonic
I : 30MHz, Ie = ±37.SmA
I : 30MHz, Ie = ±7SmA
Third Harmonic
Second Harmonic
Third Harmonic
Second Harmonic
Third Harmonic
I : SOMHz, Ie: ±37.SmA
CROSSTALK
Typical Curve Number 3
Ie: ±37.5mA, I : 30MHz
Ie = ±75mA, 1 = 30MHz
--51
--56
dB
dB
RE : lOOn, 1 = 30MHz
RE = 50n, 1 : 30MHz
-90
--90
dB
dB
10%to90%
75mAStep Ie
150mA Step Ie
2
2.6
ns
ns
Ie: 75mA
Ie = 150mA
37.5
58
mAins
mAins
FEEDTHROUGH
Off Isolation
1 : 5OMHz, Ie : ±75mA
TIME DOMAIN
RISE TIME
SLEW RATE
CHANNEL SELECTION
OPA2662AP, AU
PARAMETER
ENABLE INPUTS
Logic 1 Voltage
Logic a Voltage
Logic 1 Current
Logic a Current
SWITCHING CHARACTERISTICS
EN to Channel ON Time
EN to Channel OFF Time
Switching Transient, Positive
Switch(ng Transient, Negath,(e
CONDITIONS
MIN
V'EL : 2.0V to 5V
VSEL : OV to 0.8V
0.8
-1
TYP
2
a
Ie: 150mAp-p, I : 5MHz
90% Point 01 Va: 1Vp·p
10% Point 01 Va: tVp-p
(Measured While Switching
Between the Grounded Channels)
1.1
0.05
MAX
UNITS
Vcc +O.6
V
V
0.8
10
30
200
30
--90
ItA
ItA
.'
..
ns
ns
mV
mV
BURR~BROWN®
2.428
Burr-Brown Ie Data Book-Linear Products
I E51E5II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
(CONT)
ELECTRICAL (Full Temperature Range -40°C to +85°C)
At Vee = ±5VDC, RQ
= 750Q, T, =
TMIN to TM" unless otherwise noted, and configured as noted under "CONDITIONS".
,AU
PARAMETER
CONDITIONS
MIN
MAX
UNITS
12
2
±36
±7.2
mV
mV
1
0.2
5.9
1.2
!1A
!1A
610
mNV
=50ko, Re =40Q
OTA INPUT OFFSET VOLTAGE
Initial
Matching
R,
OTA INPUT BIAS CURRENT
Initial
Matching
R, = 100Q, Re = 40Q
-1.9
-1.2
OTATRANSCONDUCTANCE
Transconductance
TYP
Ie = 75mA, R, = 0
OTA C-RATED OUTPUT
Output Voltage Compliance
Ie =±5mA, R,
POWER SUPPLY
Positive Quiescent Current for both OTAs'"
RQ
= 1000, Re = 16Q
=750Q, R, =50kQ, Rc = 1kQ,
580
+17
+25
~
0
V
C/)
mA
W
±3.2
+8
N
CD
CD
N
Both Channels Selected
a:
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DICE INFORMATION
.§. 13
>
1D 11
:1!1
V
0
'3
10
Q.
/
.5
j :~
/
"'"
l!l
"0 12
V
RE =50kn
Rc=40n -
-50
-25
o
25
50
75
~ __ :----t---r-_--__-r-----t ... __ j -___
----.- -
\
t-
--r-- ,--r---r--------- --- - -
i
8
~
6
~
4 r---T---~--~~-r---'---T--~---'
o
2
1
8
-- ~_~
16
514
I---t---t---- -.
o
100
r-.--~~~-t----j----r----r_--~--~--~
•
en
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w
~~--~--~--~--~~--~--~
12
7
17
Temperature (OC)
22
27
32
37
42
47
Total Quiescent Current. 10 (±mA)
u:::
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D.
:E
a
'5
g.
---
-.-----_.
leMAx = ±75mA
g
~.---
>-
o
--~-------
r=50n
:>
8 -1.0
10
~±34~___ -----t\----.
100
Re = lon, RE = 50n
-100 L-_ _..I-_ _-'-_ _-.l.._ _- - '_ _- - '
a
Time (ns)
20
30
Time (ns)
OTA LARGE SIGNAL PULSE RESPONSE
vs OUTPUT VOLTAGE
OPTIMIZED FREQUENCY RESPONSE
vs OUTPUT VOLTAGE
1.0
150
-
~
I
I
laJ ±17mA
50
200
10
40
50
20F===~====~====~~~~
Re= Ion
I
I\.
~ 0.5
CD
~
Re=/30n
E
m
~
::E. -20
~
TeslClrcuH
~"
~ -0.5 - - l v,,~C::P"P
o
?
-1.0
TestCiraJH
+I\-----+--l---I
rrl~
v~~~~~
~
1m
""
50
-40
500
~O
~---''----------'------'
a
100
Time (ns)
150
200
L -_ _ _ _ _
~
1M
______
~
______
10M
10=
±17mA
____
~~
100M
~
lG
Frequency (Hz)
BURR ~ BROWN®
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tRISE = tFAL = 1ns (Generator)
a
2
"
~
~
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w
S
-2
<.>
-4
f'N
"gc
75
-75
g
4
200
2
150
~
100
i>"
50
zw
0
-50
/
/
=5MHz
~i
250
L
Both Inputs
Connected
wijh 1500
toGND
500
Time (ns)
0
250
0
Time (ns)
OFF ISOLATION vs FREQUENCY
"\
V:N
![
-20
IJil
-40
~
~o
~O
-100
300k
lG
1M
10M
--
/
V
100M
Frequency (Hz)
Frequency (Hz)
HARMONIC DISTORTION vs FREQUENCY
OTA TRANSFER CHARACTERISTICS
-20r-------r-------r-------r-----~
;g
>
i
20
5
100M
.
1:1'"
0
-100
CROSSTALK vs FREQUENCY
20r-------r-------r-------r-------,
10M
>
g
lG
-251-----+_---+_---+_----j
2nd Harmonic
~~Ol-----+----+=~--~~~---j
~
~ ~51-----+_~~-+_~~-+_~~~
.!.!
g
~
-401---~~~~~-~---L---~
~ -451---~~~---~--50L-----~------~------~----~
1.0M
3.0M
10M
Frequency (Hz)
30M
100M
Variable Inpul Voltage (mV)
for ±75mA Collector Current althe End Points
BURR- BROW'N~
2.434
Burr-Brown Ie Data Book-Linear Products • Ea Ea'
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
At Vee
(CONT)
=±5V, RQ =7500, (R, =100n, V,. =2.5Vp-p), Ie =±75mA (R, =500, V.. =2.5Vp-p), and TA =+25"C unless otherwise specified.
OTA SPECTRAL NOISE DENSITY
BUFFER SPECTRAL NOISE DENSITY
-124
140
-134
44
:E- -144
14
~
124
I¥
~
.s
:E-
~
E
m
"
"S
z
"
.!II
g
-164
100
lk
10k
-134 .. - - - - .--..-
E
3l
z
·0
4.4 0
~m
10 =±8mA
140
m
0
z
~
~----'-----r-----'----~
-144
-154
1500
~
en
-
Vo-----...e----1>---- 8
R"
100
~C2
7500
NOTE: (1) Not assembled.
FIGURE 8. Circuit Schematic of the DEM-OPA2662-1GC.
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~-
TTU
~El
Rt!
II
,Cl
I£IIIIICDIIII:
e.l
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w'if
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I B
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1
~
R.4
~ GND
0.3
TTL2
C2
eo.
I2Rt2 •
t:J
E2
NEG
Silk Screen
Component Side
Solder Side
FIGURE 9. Si1kscreen and Board Layouts of the DEM-OPA2662-1 GC.
BURR-BROWN@
2.440
Burr-Brown Ie Data Book-Linear Products
1 -- I
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL APPLICATIONS
r--------...,.---o V OUT
;---+--0
V,N ()--,j\ll,/~-t-L
son
Vour
son
100n
FIGURE 10. Single Ended to Differential Line Driver
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:::::i
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200
l>"
0
§.
-200
-400
--600
0
2
6
4
8
10
Time (ns)
FIGURE 18. Pulse Response of the 400Mbit/s Line Driver.
Coax
son
100n
-
Coax
son
100n
1
son
son
6 .8PF
FIGURE 19. Bidirectional Line Driver.
IR = 2.4ns
IF =2.15ns
+80V;60mA
to CRT
IR
=0.7ns
50Vp·p
tF = 0.7n5
U
son
FIGURE 20. CRT Output Stage Driver for a 1600 X 1200 High-Resolution Graphic Monitor.
2.444
Burr-Brown Ie Data Book~Linear Products
BURR-BROWNe
IE5IE5II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
OPA4650
BURR-BROWN®
IElElI
PRELIMINARY INFORMATION
SUBJECT TO CHANGE
WITHOUT NOTICE
Wideband, Low Power Voltage Feedback
OPERATIONAL AMPLIFIER
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FEATURES
DESCRIPTION
• LOW POWER: 50mW PER AMP
The OPA4650 is a quad, low power, wideband voltage
feedback operational amplifier. It features a high bandwidth of 560MHz as well as a l2-bit settling time of
only l5ns. The low input bias current allows its use in
high speed integrator applications, while the wide
bandwidth and true differential input stage make it
suitable for use in a variety of active filter applications. Its low distortion gives exceptional performance
for telecommunications, medical imaging and video
applications.
• UNITY GAIN STABLE BANDWIDTH:
560MHz
• FAST SETTLING TIME: 15ns to 0.01%
• LOW INPUT BIAS CURRENT: 2.7tJA
• DIFFERENTIAL GAIN/PHASE ERROR:
0.01%/0.01°
• PACKAGE: 14-pin DIP and 14-pin SOIC
APPLICATIONS
• HIGH RESOLUTION VIDEO
• MONITOR PREAMPLIFIER
• CCD IMAGING AMPLIFIER
• ULTRASOUND SIGNAL PROCESSING
• ADC/DAC GAIN AMPLIFIER
• ACTIVE FILTERS
~
The OPA4650 is internally compensated for unitygain stability. This amplifier has a fully symmetrical
differential input due to its "classical" operational
amplifier circuit architecture. Its unusual combination
of speed, accuracy and low power make it an outstanding choice for many portable, multi-channel and other
high speed applications, where power is at a premium.
The OPA4650 is also available in single OPA650 and
dual OPA2650 configurations.
• HIGH SPEED INTEGRATORS
• DIFFERENTIAL AMPLIFIER
Non-Inverting
Input
Output
Stage
Output
Inverting o-----"=F=---'
Input
International Alrport Industrial Park • Mailing Address: PO BOl114oo
Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tol:(602)746-1111 • Twx: 91D-952·1111 • Cablo:BBRCORP • Tolol:066-6491 • FAX:(602)889·1510 • ImmedfSle Product 1nIo: (800)5411-6132
PDS-1267
2.445
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WIDEBAND
VOLTAGE CONTROLLED AMPLIFIER
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FEATURES
APPLICATIONS
• WIDE GAIN CONTROL RANGE: aOdB
• ULTRASOUND
• SMALL PACKAGE: a-pin SOIC or DIP
• AGC AMPLIFIER
• ANALYTICAL INSTRUMENTATION
..J
• FAST GAIN SLEW RATE: 300dB/!1S
• SONAR
• ACTIVE FILTERS
o
• EASY TO USE
• LOG AMPLIFIER
• WIDE BANDWIDTH: 30MHz
• LOW VOLTAGE NOISE: 2.2nV/,iHz
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• IF CIRCUITS
• CCD CAMERAS
Q..
DESCRIPTION
o
The VCA610 is a wideband, continuously variable,
voltage controlled gain amplifier. It provides lineardB gain control with op amp style, high impedance
inputs. It is designed to be used as a flexible gain
control element in a variety of electronic systems.
The VCA61 0 has a gain control range of 80dB (---40dB
to +40dB) providing both gain and attenuation for
maximwll lltx.iblllty in a srrJ.4l1 8-pin SOle or plastic
dual-in-line package. The broad attenuation range can
be used for gradual or controlled channel turn-on and
turn-off for applications in which abrupt gain changes
can create artifacts or other errors. In addition, the
output can be disabled to provide -80dB of attenuation. Group delay variation with gain is typically less
than ±2ns across a bandwidth of I to ISMHz.
The VCA610 is designed with a very fast overload
recovery time of only 200ns. This allows a large
signal transient to overload the output at high gain,
without obscuring low-level signals following closely
behind. The excellent overload recovery time and
distortion specifications optimize this device for lowlevel doppler measurements.
The VCA610 has a noise figure of 3.SdB (with an Rs
of 2ooQ) including the effects of both current and
voltage noise, 1.4pA/,JRZ and 2.2nV/,JRZ respectively.
Instantaneous output dynamic range is 70dB for gains
of OdB to +40dB with IMHz noise bandwidth. The
output is capable of driving 100Q. The high speed,
300dB/lJS, gain control signal is an easy to generate
unipolar voltage that varies the gain linearly in dBN.
+5V -5V
-Ino--t---I
>--/---0 Your
+Ino--t---I
Vc
Gain
Control
VCA610
tntemational Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602)746-1111 • Twx: 911J.952·1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (602) 889·1510 • Immediate Product Info: (800) 54H132
PDS-ll40B
2.449
Forlmmediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
All specHicalions al Vs = ±5VDC, R, = 5000,
As = 00, and T. = +25'C unless otherwise noted.
VCA610AP, AU
PARAMETER
INPUT NOISE
Input Voltage Noise
Input Current Noise
Noise Figure
INPUT
Input Impedance
Bias Current
Offset Current
Differential Voltage Range
Common-Mode Voltage Range
Common-Mode Rejection
GAIN
SpecHied Gain Range
Gain Accuracy, ,~
Gain Accuracy Temperature Drift
Gain with Output Disabled
GAIN CONTROL
Gain Scaling Factor
Control Vottage (Vcl
Bandwidth
Slew Rate
Settling Time: 1%
Input Impedance
Input Bias Current
Output Offset Change'"
FREQUENCY RESPONSE
Bandwidth, Small-8ignal
Bandwidth, Large-Signal
Group Delay Variation
OdB ,; G ,; +4OdB
-40dB ,; G < OdB
Output Slew Rate
OVerload Recevery'"
Two-tone Intermodulation Distortion'~
Two-tone, 3rd Order IMD Intercept<5,
OUTPUT
Voltage Swing'"
G=+4OdB
G=OdB
Output Voltage LimH
Short-Circuit Current
Instantaneous Dynamic Range (IDR)'"
G = OdB to +40dB
Offset
Output Resistance
POWER SUPPLY
Specification
Operation
PSR
Quiescent Current
TEMPERATURE
SpecHication
Operation
9,.
AP
AU
CONDITIONS
MIN
TYP
MAX
UNiTs
G = +4OdB, As = 00
G = -40dB to +4OdB
G = +40dB, Rs = 2000
2.2
1.4
3.5
Common-Mode
All Gains
All Gains
1111
6
2
MnllpF
,.,
IlA
2.5
50
Vp-p
dB
2
-40
-40dB ,; G ,; +40dB
T. = -25'C to +65'C
+O.IV$ Vc'; +2.0V, I = IMHz
-40dB ,; G ,; +4OdB
G =-4OdB (Vc = OV) to +4OdB (Vc = -,2V)
-3dB
BOdB Gain Step
Y'N = 10mVDC, IJ, G = BOdB
±C.5
±C.OI
-80
-3dB, All Gains
Vo = tVp-p, G <: OdB
30
25
1= 1 to 15MHz
1= I to 15MHz
Vo = lVp-p
±I
±2
60
200
-00
15
Small-Signal
Small-Signal
2
I
±SO
Vo= 1.5Vp-p
G =-40dB
I = 1MHz, All Gains
70
±IO
10
±4.5
±4
40
±75
±2
±3
-25
-40
dBIV
V
MHz
dB/llS
ns
MO II pF
I!A
mV
ns
ns
V/j1S
ns
dBc
dBm
Vp-p
Vp-p
mA
±30
±5.5
±6
50
26
dB
dB
dBl"C
dB
MHz
MHz
3
1.5
Symmetrical to Ground (±IO%)
Continuous to Common
Applies to Temperature Drift Specs
+40
±2
-2
All Gains
IJ,G=BOdB
Output Relerred, I = 100kHz
I!A
40
0
I
300
BOO
1111
2
±30
±5VDC Recommended
nVl{Hz
pNVHz
dB
dB
mV
0
32
VDC
VDC
dB
mA
+B5
+125
'C
'C
90
100
'CIW
'CIW
NOTES: (1) See InpuVOutput Range discussion in Applications Information Section (Figure 2). (2) Gain Is laser trimmed and tested over the -40dB to +40dB gain
range; V,N = tVp-p lor gains less than OdB; VOUT = I Vp-p lor gains 01 OdB to +40dB. (3) Output offset change Irom offset at G • -40dB.
(4) Gain = +40dB; Input step 01 2V to 2mV; time required for output to return from saturation to linear operation. (5) V~ = 7mVp-p, Vour = 700mVp-p (250mVrms);
Output Power = -IOdBmJlone, equal ~litude tones of 5MHz ±500Hz, G = +4OdB. See typical.performance curves. (6) With As - 00, and noise bandwidth of
lMHz. lOR = 20 log (VO,...!(eORMS x ~BW)); where VORNS is rms output voltage, eo_ is output noise spectral density, and BW is noise bandwidth.
ElURR·aROWN(!l
2.450
Burr-Brown Ie Data Book-Linear Products
I ElBI
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
ORDERING INFORMATION
PIN CONFIGURATION
Top View
-In
PACKAGE
DIP
SOIC
8-pin Plastic DIP
8-pin Plastic SOIC
Q
....
PACKAGE INFORMATION(')
MODEL
+In
Gain No
Control, Intemal
Vc
Connection
VCA610AP
VCA610AU
PACKAGE DRAWING
NUMBER
006
182
~
>
o
NOTE:(1) For detailed drawing and dimension table, please see end of
sheet, or Appendix D of Burr-Brown IC Data Book.
en
a:
ABSOLUTE MAXIMUM RATINGS
w
Supply ................................................................................................. ±7V
Differential Input Voltage ............................................................... Total Vs
u::
Input Voltage Range ..................................... See Input Protection Section
:::l
Storage Temperature Range .......................................... -6S·C to +1S0·C
Lead Temperature (soldering, DIP, 1Os) ........................................ +300·C
Lead Temperature (soldering, SOIC, 3s) ....................................... +260·C
Output Short Circu~ to Ground (+2S·C) ................................... Continuous
Junction Temperature (TJ ) ............................................................. +17S·C
CL.
::E
E
·0
0..
a
-10
II
Q)
~
g
.E
-----.-.-.
,....
----1-------
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-30
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Input Power in dBm (Differential Input VOltaQ9 in Vp-p)
FIGURE 2. Input and Output Range.
Vco-+---t
Gain Control
Amplifier
FIGURE 1. Block Diagram of the VCA61O.
A user-applied voltage, Vc, controls the amplifier's gain
magnitude through a high-speed control circuit. Gain polarity can be either inverting or noninverting depending upon
the amplifier input driven by the input signal. Use of the
inverting input is recommended since this connection tends
to minimize positive feedback from the output to the noninverting input. The gain control circuit presents the high
input impedance of a noninverting op amp connection.
Control voltage Vc varies the amplifier gain according to the
exponential relationship G(VN) = 10 -2 (Yc+l). This translates
to the linear, logarithmic relationship G(dB) = - 40 - 40Vc.
Thus, G(dB) varies linearly over the specified -40dB to
Figure 2 plots output power vs input power for five voltage
gains spaced at 20dB intervals. The IdBm compression
points occur where the actual output power (solid lines)
deviates by -ldBm from the ideal output power (dashed
lines). Compression is produced by different mechanisms
depending on the selected gain. For example, at G = -40dB,
IdBm compression occurs when the input signal approaches
approximately 3Vp-p (13.5dBm for Rs = SOQ).Input overloading is the compression mechanism for all gains from
-40dB to about -SdB. For gains between -SdB and +SdB,
the compression is due to internal gain stage overloading.
Compression over this gain range occurs when the output
signal becomes distorted as internal gain stages become
overdriven. At G = OdB, IdBm compression occurs when
the input exceeds approximately 1.SVp-p (7.5dBm). At
gains greater than about SdB, the compression mechanism is
due to output stage overloading. Output overloading occurs
ElURR-BROWNe
2.454
Burr-Brown Ie Data Book-Linear Products • Ell Ell,
Or, Call Customer Service at 1·800·548·6132 (USA Only)
when either the maximum output voltage swing or output
current is exceeded. The VCA61O's high output current of
±80mA insures that virtually all output overloads will be
limited by voltage swing rather than by current limiting. At
G = +40dB, IdBm compression occurs when the output
voltage approaches 3Vp-p (3.5dBm for RL = 500n). Table
I below summarizes these results.
Rv
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Internal Stages Overtoading Output Voltage Range
Output Stage Overload
Output Voltage Range
CP~f
TABLE I. Output Signal Compression.
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Maximizing the VCA61O's capability requires some wiring
precautions and high-frequency layout techniques. In general, printed circuit board conductors should be as short and
as wide as possible to provide low resistance, low impedance signal paths. Stray signal coupling from the output or
power supplies to the inputs should be minimized. Unused
inputs should be grounded as close to the package as
possible.
Low impedance ground returns for signal and power are
essential. Proper supply bypassing is also extremely critical
and must always be used. Both power supply leads should be
bypassed to ground as close as possible to the amplifier pins.
Tantalum capacitors (l1JP to 101JP) with very short leads are
recommended. Surface mount bypass capacitors will provide excellent results due to their low lead inductance.
OVERLOAD RECOVERY
As shown in Figure 2, the onset of overload occurs whenever the actual output begins to deviate from the ideal
expected output. If possible, the user should operate the
VCA6iO within the iinear regions shown in onler [0 minimize signal distortion and overload delay time. However,
instances of amplifier overload are actually quite common in
Automatic Gain Control (AGC) circuits which involve the
application of variable gain to signals of varying levels. The
VCA61O's design incorporates circuitry which allows it to
recover from most overload conditions in 2000s or less.
Overload recovery time is defined as the time required for
the output to return from overload to linear operation following the removal of either an input or gain control overdrive
signal.
OFFSET ADJUSTMENT
Where desired, the offset of the VCA610 can be removed as
shown in Figure 3. This circuit simply presents a DC voltage
to one of the amplifier's inputs to counteract the offset error
voltage. For best offset performance, the trim adjustment
should be made with the amplifier set at the maximum gain
of the intended application. The offset voltage of the VCA610
varies with gain, limiting the complete offset cancellation to
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WIRING PRECAUTIONS
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-40dB to +40dB
+40dB
Vc>
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010-2V
G,
-40dB
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100kHz
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FIGURE 6. Two Series Connected VCA610s Expand the
Gain Range and Improve Noise Performance.
R,
SOkn
For lower composite gains, VCA, provides the gain control
and VCA2 acts as a fixed attenuator. There, variation of VCI
varies G, from -40dB to +40dB while VC2 remains fixed at
OV for G2 = -40dB. This mode produces the -SOdB to 0dB
&egillent of the composite gain range.
FIGURE 7. This AGC Circuit Maintains a Constant Output
Amplitude for a 1000: 1 Input Range.
Between gain corrections, resistor R, charges the capacitor
in a negative direction, increasing the amplifier gain. R" R2
and ~ determine the release time of this action. Resistor R,
forms a voltage divider with R " limiting the maximum
negative voltage developed on CH • This limit prevents input
overload of the VCA610's gain control circuit.
300n 4700pF
, =lI2ltRw,Cw,
RW1 =RW2
Cw,=CW2
>--.......--------.---0 Vo
.....-,I\I\{~-U
R,
VR
0.1 VDC
SOkn
V-
FIGURE S. Adding Wein-bridge Feedback to the AGe Circuit of Figure 7 Produces an Amplitude Stabilized Oscillator.
Burr-Brown Ie Data Book-Linear Products
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At higher gains, variation of VC2 alone makes VCA, provide
all of the gain control, leaving the gain of VCA, fixed at its
maximum of 4OdB. This gain maximum corresponds to the
maximum bias currents in VCA" minimizing this amplifier's
noise. Thus, for composite circuit gains of OdB to +SOdB,
VCAl serves as a low-noise, fixed-gain preamp.
CW,
4700pF
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STABILIZED WEIN-BRIDGE OSCILLATOR
Adding Wein-bridge feedback to the above AGe amplifier
produces an amplitude-stabilized oscillator. Shown in
Figure 8, this alternative requires the addition of just two
resistors (Rw,' R~ and two capacitors (Cw" Cwz).
Connecting the feedback network to the amplifier's
noninverting input introduces positive feedback to induce
oscillation. The feedback factor displays a frequency dependence due to the changing impedances of the Cw capacitors.
As frequency increases, the decreasing impedance of the
Cm increases the feedback factor. Simultaneously, the decreasing impedance of the Cw, decreases this factor.
Analysis shows that the maximum factor occurs at f =
1I21tRwCw' making this the frequency most conducive to
oscillation. At this frequency the impedance magnitude of
Cw equals Rw and inspection of the circuit shows that this
condition produces a feedback factor of 113. Thus, selfsustaining oscillation requires a gain of three through the
amplifier. The AGe circuitry establishes this gain level.
Following initial circuit turn on, R, begins charging CH
negative, increasing the amplifier gain from its minimum.
When this gain reaches three, oscillation begins at f =
1I21tRwCw and R,'s continued charging effect makes the
oscillation amplitude grow. This growth continues until that
amplitude reaches a peak value equal to VR. Then, the AGe
circuit counteracts the R, effect, controlling the peak amplitude at VR by holding the amplifier gain at a level of three.
Making VR an AC signal, rather than a DC reference,
produces amplitude modulation of the oscillator output.
a DC reference voltage. Optionally, making this voltage a
second signal produces log-ratio operation. Either way, the
Log term's argument constrains the polarities of VRand VIN•
These two voltages must be of opposite polarities to ensure
a positive argument. This polarity combination results when
VR connects to the inverting input of the VCA61O. Alternately, switching VR to this amplifier's noninverting input
removes the minus sign of the log term's argument. Then,
both voltages must be of the same polarity to produce a
positive argument. In either case, the positive polarity requirement of the argument restricts VIN to a unipolar range.
The above VOL expression reflects a circuit gain introduced
by the presence of R, and Rz. This feature adds a convenient
scaling control to the circuit. However, a practical matter
sets a minimum level for this gain. The voltage divider
formed by R, and Rz attenuates the voltage supplied to the
Vc terminal by the op amp. This attenuation must be great
enough to prevent any possibility of an overload voltage at
the Vc terminal. Such an overload saturates the VCA61O's
gain control circuitry, reducing the amplifier's gain. For the
feedback connection of Figure 9 , this overload condition
permits a circuit latch. To prevent this, choose R, and Rz to
ensure that the op amp can not possibly deliver more than
2.5V to the Vc terminal.
VR
-10mV
LOW-DRIFT WIDEBAND LOG AMP
The VCA610 can be used to provide a 250kHz (-3dB) log
amp with low offset voltage and low gain drift.
The exponential gain control characteristic of the VCA610
permits simple generation of a temperature-compensated
logarithmic response. Enclosing the exponential function in
an op amp feedback path inverts this function, producing the
log response. Figure 9 shows the practical implementation
of this technique. A DC reference voltage, VR' sets the
VCA610 inverting input voltage. This makes the amplifier's
output voltage VOA = - GVR where G = 10.2 (VO + ').
A second input voltage also influences V OA through control
of gain G. The feedback op amp forces VOA to equal the
input voltage VIN connected at the op amp inverting input.
Any difference between these two signals drops across R3,
producing a feedback current that charges Cc. The resulting
change in VOL adjusts the gain of the VCA610 to change
VOA . At equilibrium, VOA = VIN =-VRIO ·2 (Vo+'). The op amp
forces this equality by supplying the gain control voltage
Vc = R, VOL/(R, + Rz). Combining the last two expressions
and solving for VOL yields the circuit's logarithmic response.
Examination of this result illustrates several circuit characteristics. First, the argument of the Log term, -VINNR'
reveals an option and a constraint. In Figure 9, VRrepresents
I-
However, the circuit shown provides greater output swing
than the more common multiplier implementation. The latter
replaces the VCA610 of the figure with an analog multiplier
having a response of Vo =XY110. Then, X = VOA and Y =
V c' making the circuit output voltage V 0 =V OAV dl O. Thus,
the multiplier implementation amplifies VOA by a gain of Vd
10. Circuit constraints require that Vc::; 10, making this gain D..
::; 1. Thus, the multiplier performs only as a variable attenu- :E
1. Then, operating the VCA610 with gains in the
range of one to 100 avoids the reduction in output swing
capability.
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VOLTAGE-CONTROLLED HIGH·PASS FILTER
A circuit analogous to the above low-pass filter produces a
voltage-controlled high-pass response. The gain control provided by the VCA6IO of Figure 12 varies this circuit's
response zero from 1Hz to 10kHz according to the relationship Fz ~ 1I2nGR,C where G = 10 -2 (Yc + I).
R,
R,
V, Q----1>-------J\I\J'-----..----./IJ
FIGURE 11. This Voltage-Tuneable Low-Pass Filter Produces a Variable Cutoff Frequency with a
3,000: 1 Range.
The response control results from amplification of the feedback voltage applied to Rz. Consider first the case where the
VCA610 produces G = 1. Then, the circuit performs as if
this amplifier were replaced by a short circuit. Visually
doing so leaves a simple voltage amplifier with a feedback
resistor bypassed by a capacitor. This basic circuit produces
a response pole at fp = 1I21tRzC.
For G > I, the circuit applies a greater voltage to Rz,
increasing the feedback current this resistor supplies to the
summing junction of the OPA620. The increased feedback
current produces the same result as if Rz had been decreased
in value in the basic circuit described above. Decreasing the
effective Rz resistance moves the circuit's pole to a higher
frequency, producing the fp = G/21tRzC response control.
For R3« GR, and f« 1/2"R 3Cs,
~ = _ :, (1 + GR,Cs),
I
,
where G = 10-2(VC + 1)
fz = 1/2"GR,C
FIGURE 12. A Voltage-Tunable High-Pass Filter Produces a Response Zero Variable from 1Hz to
10kHz.
Burr-Brown Ie Data Book-Linear Products
2.459
D..
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For Immediate Assistance, Contact Your Local Salesperson
To visualize the circuit's operation, consider a circuit condition and an approximation that permit replacing the VCA61 0
and R3 with short circuits. First consider the case where the
VCA610 produces G = 1. Then, replacing this amplifier with
short circuit leaves the operation unchanged. In this shorted
state, the circuit is simply a voltage amplifier with an R-C
bypass around R I • The resistance of this bypass, ~, serves
only to phase compensate the circuit and practical factors
makeR3 «RI . Neglecting ~ for the moment, the circuit
becomes just a voltage amplifier with capacitive bypass of
R I • This circuit produces a response zero at fz = 1I21tRI C.
Adding the VCA610 as shown permits amplification of the
signal applied to capacitor C and produces voltage control
of the frequency fz. Amplified signal voltage on C increases the signal current conducted by the capacitor to the
op amp feedback network. The result is the same as if C
had been increased in value to. GC. Replacing C with this
effective capacitance value produces the circuit's control
expression fz 1I2nRI GC.
=
Two factors limit the high-frequency performance of the
resulting high-pass filter. The finite bandwidth of the op
amp and the circuit's phase compensation produce response
poles. These limit the frequency duration of the high-pass
response. Selecting the R3 phase compensation with the
equation R3 = .../(Rl/21tfcC) assures stability for all values of
G and sets the circuit's bandwidth at BW = ..J(fd21tRI C).
Here, fc is the unity-gain crossover frequency of the op amp
used. With the components shown, BW = 100kHz. This
bandwidth provides a high-pass response duration of five
decades of frequency for fz = 1Hz, dropping to one decade
for fz = 10kHz.
VOLTAGE-CONTROLLED BAND-PASS FILTER
The VCA61O's variable gain also provides voltage control
over the center frequency of a band-pass filter. Shown in
Figure 13, this filter follows from the state-variable configuration with the VCA610 replacing the inverter common to
that configuration. Variation of the VCA610 gain moves the
filter's center frequency through a 100: 1 range following the
relationship fo = [10 -(vc • I) ]/21tRC.
As before, .variable gain controls a circuit time constant to
vary the filter response. The gain of the VCA610 amplifies
or attenuates the signal driving the lower integrator of the
circuit. This alters the effective resistance of the integrator
time constant producing the response
~ _
VI -
-slnRC
S2
+ s/nRC + G/R2C2
Evaluation of this response equation reveals a passband gain
of Ao= -1, a bandwidth ofBW = 1I21tDRC and a selectivity
of Q = nlO -(Yc·I ). Note that variation of control voltage Vc
alters Q but not bandwidth.
The gain provided by the VCA610 restricts the output swing
of the filter. Output signal V0 must be constrained to a level
that does not drive the VCA610 output, VOA ' into its saturation limit. Note that these two outputs have voltage swings
related by VOA = GVo' Thus, a swing limit VOAL imposes a
circuit output limit of VOL:;:; VOAL/G.
The output voltage limit of the VCA610 imposes an input
voltage limit for the filter. The expression VOA = GVI relates
these two voltages. Thus, an output voltage limit VOAL
constrains the input voltage to VI:;:; VOAl/G.
~
0.047~F
nR
VI
_
-6inRC
- 82 + slnRC + G/R2C2
nR
10-{vc+ 1)
10=
VI
51<0
51<0
R
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3300
21tRC
BW= _ _
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21tnRC
Q = nl0-
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FREQUENCY CHARACTERISTICS
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FREQUENCY CHARACTERISTICS
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VOLTAGE FOLLOWER TRANSIENT RESPONSE
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65
Temperature ('C)
95
125
5
10
15
20
Supply Voltage (±V)
aURR-BROWN~
2.466
Burr-Brown Ie Data Book-Linear Products
I EI Ell
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
AlTo = +25°C and ±15VDC, unless otherwise noted.
SETILINGTIME
SETILING TIME vs OUTPUT VOLTAGE CHANGE
1500
1250
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RMS INPUT NOISE VOLTAGE(1)
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NOTE: (1) Includes contribution from source resistance.
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100
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TOTAL INPUT NOISE VOLTAGE(1)
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5
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Common·Mode Input Vollage (±V)
NOTE: (1) Includes contrlbulion from source resistance.
BURR-BROWN@
2.468
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
At Tc = +25°C and ±15VDC, unless otherwise noted.
QUIESCENT SUPPLY CURRENT
MAXIMUM POWER DISSIPATION
6 r---~----~----~--~----~----'
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RLOAD = 200n
DC, R_ = loon
±2.5
±2.5
±20
3.611 2
±5
±4.5
±2.6
-54
TEMPERATURE RANGE
Specification
Storage
V
V
mA
nil pF
±20
6.2112
POWER SUPPLY
Rated Voltage
Derated Performance
Quiescent Current
Rejection Ratio
±3.0
±3.3
±3
-72
-40
-40
±5.5
±6.6
VDC
VDC
mA
dB
85
125
'C
'C
MAX
UNITS
±5
±5.5
±3.4
85
125
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±5.4
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AC-SPECIFICATION
At Vee = ±5VDC, RLOAD = 200n (BUF600) and loon (BUF601), RsouReE = 500, and TAM. = +25'C, unless otherwise noted.
BUF600AP/AU
PARAMETER
CONDITIONS
MIN
TYP
BUF601AP/AU
MAX
MIN
TYP
FREQUENCY DOMAIN
LARGE SIGNAL BANDWIDTH
(-adB)
Vo= 5Vp-p, Cour = lpF
Vo = 2.8Vp-p, Cour = 1pF
Vo = 1.4Vp-p, COUT = lpF
320
400
700
320
400
700
MHz
MHz
MHz
SMALL SIGNAL BANDWIDTH
Vo = 0.2Vp-p, COUT = 1pF
650
900
MHz
250
200
ps
0.4
0,05
%
%
%
%
0.025
0.03
Degrees
Degrees
Degrees
Degrees
GROUP DELAY TIME
DIFFERENTIAL GAIN
DIFFERENTIAL PHASE
V.. = 0.3Vp-p, f = 4.43MHz
VDC = 0 to 0.7V
BUF600 RLOAD = 200n
R_ = lkn
BUF601 RLOAD = loon
R_ = 500n
0.5
0.075
Y'N = 0.3Vp-p, f = 4.43MHz
VDC = 0 to 0.7V
BUF600 RLQAO = 200n
RLOAD = lkn
BUF601 RlOAI) = loon
RLOAD = 500n
0,02
0.04
BURR-BROWN@
3.1.4
Burr Brown Ie Data Book-Linear Products
IEilEilI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
AC·SPECIFICATIONS (CONT)
At Vee = ±5VDC, RlOAD = 2000 (BUF600) and 1000 (BUF601), RsouRe, = 500, and T.... = +25°C, unless otherwise noted.
BUF600AP/AU
PARAMETER
CONDITIONS
MIN
TYP
BUF601AP/AU
MAX
MIN
TYP
MAX
UNITS
HARMONIC DISTORTION
Second Harmonic
1= 10MHz, Va = I.4Vp-p
-£5
1= 30MHz, Va = 1.4Vp-p
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Third Harmonic
Second Harmonic
Third Harmonic
Second Harmonic
Third Harmonic
-$5
-$7
-64
~9
-$2
-53
~6
1= 50MHz, Va = 1.4Vp-p
dBc
dBc
dBc
dBc
dBc
dBc
-43
-48
.....
0
~
0
0
CD
GAIN FLATNESS PEAKING
Va = 0.4Vp-p, DC to 30MHz
Va = 0.4Vp-p, 30MHz to 300MHz
0.01
0.3
0.005
0.1
dB
dB
Va = 0.4Vp-p, DC ta 30MHz
Va = O.4Vp-p, 30 to 300MHz
5.5
55
3.8
45
Degrees
Degrees
10% to 90%, 700ps
I.4Vp-p Step
2.8Vp-p Step
5.0Vp-p Step
0.82
0.97
1.18
0.87
0.95
1.13
ns
ns
ns
Va = 1.4Vp-p
Va = 2.8Vp-p
Va = 5.0Vp-p
1500
2400
3400
1500
2400
3600
VII's
VII's
VII's
U.
::J
m
LINEAR PHASE DEVIATION
TIME DOMAIN
RISE TIME
Ell
SLEW RATE
en
II:
W
u:::
:::;
Q.
:E
ELECTRICAL (FULL TEMPERATURE RANGE -40°C to +85°C)
0.9
RCOAD = 1000
RCOAD = 2000
RCOAO = 10kO
±2.8
±3.2
±3.4
±3.6
10 = OmADC
±1.3
±~
ABSOLUTE MAXIMUM RATINGS
MIN
TYP
MAX
UNITS
-1.5
±30
mV
0.95
0.96
0.99
BIAS CURRENT
Input Bias Current
RATED OUTPUT
Voltage Output
BUF601AP/AU
0.98
-2.515
±G.O
VN
VN
VN
0.99
1.5
±2.8
±3.2
±3.2
±3.6
±2.7
loC
-51+10
"A
V
V
V
m.A,
±12.C
PACKAGE INFORMATION(!)
Power Supply Voltage .......................................................................... ±6V
Input Voltage'" ......................................................................... ±Vce ±O. 7V
Operating Temperature ..................................................... -40°C ta +85°C
Storage Temperature ...................................................... -40°C to + 125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldertng, lOs) ................................................ +300°C
PACKAGE DRAWING
MODEL
BUF600AP
BUF600AU
BUF60lAP
BUF60lAU
PACKAGE
Plastic 8-Pin DIP
50-8 Surface-Mount
Plastic 8-Pin DIP
SO-8 Surface-Mount
NUMBER
006
182
006
182
NOTE: (I) Inputs are internally diode-clamped to ±Vce.
ORDERING INFORMATION
MODEL
BUF600AP
BUF600AU
BUF60lAP
BUF60IAU
PACKAGE
TEMPERATURE
RANGE
Plastic 8-Pin DIP
50-8 Surface-Mount
Plastic 8-Pin DIP
50-8 Surface-Mount
-4Q°C ta +85°C
-4Q°C to +85°C
-4Q°C to +85°C
-40°C to +85°C
The information provided herein is believed to be reliable; however, BURRBROWN assumes no responsibility for inaccuracies or omissions. BURR·
BROWN assumes no responsibility for the use of this information, and all use
of such information shall be entirely at the user's own risk. Prices and
specilications are subject to change without notice. No patent rights or licenses
ta any 01 the circuits described herein are implied or granted to any third party.
BURR-BROWN does not authorize or warrant any BURR-BROWN product lor
use in life support devices and/or systems.
BURR-BROWN@
IE3IE3II
Burr-Brown Ie Data Book-Linear Products
3.1.5
II:
W
u.
u.
::J
m
For Immediate Assistance, Contact Your Local Salesperson
PIN CONFIGURATION
FUNCTIONAL DESCRIPTION
FUNCTION
In
Out
+Voc
-Vee
DESCRIPTION
SO/DIP
Analog Input
Analog Output
Positive Supply Voltage; typical +5VDC
Negative Supply Voltage; typical-5VDC
. DICE INFORMATION
PAD
FUNCTION
1
2
3
4
5
Analog Input
-5V Supply
-5V, Output
Analog Output
+5V Supply, Output
+5V Supply
6
Substrate Bias: Negative Supply
NC: No Connection
Wire Bonding: Gold wire bonding is recommended.
MECHANICAL INFORMATION
MILS (0.001 ")
MILLIMETERS
Ole Size
Die Thickness
39x42±5
0.99 x 1.07±0.13
14±1
0.55±0.025
Minimum Pad Size
4x4
0.10xO.l0
Backing: TItanium 0.02 +0.05·0.0 0.0005 +0.0013-0.0
Gold
0.30±0.05
0.0076 ±0.OOI3
BUF600/601 DIE TOPOGRAPHY
BURR-BROWNell
3.1.6
Burr Brown Ie Data Book -Linear Products
I ElEII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
INPUT PROTECTION
Static damage has been well recognized for MOSFET devices, but any semiconductor device deserves protection
from this potentially damaging source. The BUF600/601
incorporate on-chip ESD protection diodes as shown in
Figure 1. This eliminates the need for the user to add
external protection diodes, which can add capacitance and
degrade AC performance.
+vcc
External
Pin
~
ESD Protection Diodes
internally connected to
all pins.
_ _ _ _ Internal
Circuitry
All input pins on the BUF600/601 are internally protected
from ESD by means of a pair of back-to-back reverse-biased
diodes to either power supply as shown. These diodes will
begin to conduct when the input voltage exceeds either
power supply by about O.7V. This situation can occur with
loss of the amplifier's power supplies while a signal source
is still present. The diodes can typically withstand a
continuous current of 30mA without destruction. To insure
long term reliability, however, the diode current should be
externally limited to IOmA or so whenever possible.
The internal protection diodes are designed to withstand
2.5kV (using the Human Body Model) and will provide
adequate ESD protection for most normal handling procedures. However, static damage can cause subtle changes in
amplifier input characteristics without necessarily destroying the device. In precision amplifiers, this may cause
noticea.ble ~egradation of offset and drift. Therefore, static
protection IS strongly recommended when handling the
BUF600/601.
alii
-Vee
FlGURE 1. Internal ESD Protection.
TYPICAL PERFORMANCE CURVES
INPUT BIAS CURRENT vs TEMPERATURE
OFFSET VOLTAGE vs TEMPERATURE
4
§c:
2
~
:>
g
3 I~-~~--l----l-----l-----I------- - - I
f---- BUF600
0
-
~
...,'l
« 1.4
E 1.2
{g
--t-------j----
-20
0
BUF600-
m
0.4
20
40
Temperature (OC)
60
--
0.2
80
-40
100
-20
o
20
40
Temperature (0C)
60
80
100
INPUT IMPEDANCE VB FREQUENCY BUF601
INPUT IMPEDANCE vs FREQUENCY BUF600
10M~mI!I_
10M_nnmtm
Ik
~~~-LJJ~-l--LU~~~-LJJ~-l--~
100
Frequency (Hz)
Ik
10k
lOOk
1M
10M
100M
Frequency (Hz)
BURR-BROWN®
I ElEII
Burr-Brown Ie Data Book-Linear Products
u..
u..
~
o
-40
c(
l----
-~
I
-5
::i
0..
:i
a:
w
--
0.8
iii 0.6
-----
-4 1----- f--
f----.
- - - - f----
<3gj
I
l-
BUF6~1-
::L
::...--t-"
------" -I I--~_I_~=___+~--I--..;
N
g -2 I-- BUF601
~
1.8 - - -1.6
__ f-
a:
w
u::
At Vee =±5VDC, Reo.., = 10kn, and T. =25°C unless otherwise noted.
i
en
3.1.7
Forlmmediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
(CONT)
AtVce =±5VDC, RLOAO= 10kn, and T. = 25'C unless otherwise noted,
INPUT VOLTAGE NOISE
SPECTRAL DENSITY BUF600/601
QUIESCENT CURRENT vs TEMPERATURE
12
100
10
~
BUF601/
~
'\
(I)
,!!l
z.,0
10
--- --- ------,./'
UFF600
~
g
BUFF601
IIII
2
1111
1
o
-40
lOOk
1000
10k
Frequency (Hz)
100
4
I
I
I
.
14
I
RLOAO = 200n
~BUF600-
3
2:
2
I~
~ -1
8
-2
-3
-4
./'
r-- V
./
./
./
/'
/'"
V
f--
\
60
100
80
II
---4?,C
10
l
11
w
c:
'iii
C!l
+25'C
8
85'C
6
,\.
4
I
2
-4
-3
-2
-1
2
0
3
4
5
-5
-4
-3
-2
I
1
-
4 f-B0F601
RLOAD = loon
-1
-2
/'
r--
../
/'
/'
V
-4
12
V
f--40'C
+25°C
10
l
~c:
'iii
C!l
I
r+85'C
8
I
6
4
./
-3
II
(Full Temperature Range, RLOAO = 1000)
-
2
-5
-5
5
234
BUF601 GAIN ERROR vs INPUT VOLTAGE
~
3
I% ~
0
14
_~
2
-1
Input Voltage (V)
TRANSFER FUNCTION
5
-4
20
40
Temperature ('C)
(Full Temperature Range, RCOAO = 2000)
Input Voltage (V)
-3
I--
~
o
-5
0
__
12
-5
2:
BUF60~
BUF600 GAIN ERROR vs INPUT VOLTAGE
TRANSFER FUNCTION
5
o
-20
V
-2
-1
0
Input Voltage (V)
2
3
4
5
o
-5
-4
-3
-2
-1
0
Input Voltage (V)
2
3
4
5
BURR~BROWNI!I
3.1.8
Burr Brown Ie Data Book -Linear Products • EilEiI,
Or, Call Customer Service at 1·800·548·6132 (liSA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
At Vee = ±5VDC. RLOAD = tOOO (BUF601). RLOAD = 2000 (BUF600). and TA = 25'C unless otherwise noted.
GROUP DELAY TIME VB FREQUENCY
....
BUF600/601 GAIN FLATNESS
2
Q
1.5
2
~
0.5
Q
iii'
0
'C
-;; -0.5
"-
...-
~
-2
300k
-2.5
III
11111
1M
100M
lG
3G
m
JlIl
-
III
Vo = 0.2Vp-p BUF600 RLOAD = 2000
"' BUF601 R~~~D = 1000
-3
10M
U.
::::»
1111
-1.5
RLOAD = 1000
CD
~UF~OI
BUF600
-1.0
1M
300k
10M
Frequency (Hz)
100M
lG
C/)
Frequency (Hz)
a:
w
i!
:::i
BUF600 SMAll SIGNAL PULSE RESPONSE
160
120 11-1/t;;~;;;;;;;j;_t:t,,'SE = tFAll.. = l.5ns
(Generator)
-+-+-H-~
80
:;;-
g
I
V, =5Vp-p
tRISE = tFALL =
3
V, ___
~
---"0
'"
0
[i]'
0
'"
~
-1
w
::::»
m
-2
-120
-3
-160
-4
0
5
10
15
20
25
30
35
40
45
50
o
5
10
15
20
Time (ns)
BUF600 SMAll SIGNAL PULSE RESPONSE
'"
~
0
40
45
50
BUF600 LARGE SIGNAL PULSE RESPONSE
V, =5Vp-p
tRISE "" tFALL = 3ns
Generator)
2
~
rl
40
~
--
\\
V,--
V,--
I--Vo
-40
I--Vo
-1
~\
h
-80
l
-2
1\\
-120
-160
35
4
80
>
30
V, =0.2Vp-p
tRISE = tFAll - 3ns
(Generator)
120
g
25
Time (ns)
160
,\
-3
o
10
15
20
25
30
35
40
45
50
Time (ns)
-4
o
5
10
15
20
25
30
35
40
45
50
Time (ns)
BURR - BROWN®
IEaEaI
Burr-Brown Ie Data Book-Linear Products
::a:
-10
'5
\r\.
1M
10
15
0.6Vp-p
-5
dB
300k
::J
a.
:E
BUFSOl BANDWIDTH vs OUTPUT VOLTAGE
.....31
-70
:x:
2f
~O
-'"3'1
-70
1
-80
~O
O.lM
1M
10M
100M
Frequency (Hz)
,EilEiI,
O.lM
1M
10M
100M
Frequency (Hz)
BURR-BROWNe
Burr-Brown Ie Data Book-Linear Products
3.1.11
U.
::l
m
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
At Vee =±5VDC, RLOAD = 1000 (BUF601),
(CON't)
f\0A0 =2000 (BUF6OO), and T. = 25"C unless otherwise noted.
IQ vs TIME (Warmup)
BUF600, BUF601 GAIN ERROR vs INPUT VOLTAGE
100
5
(Full Temperature Range, RLOAD = 10kll)
I
4
1-'
3
99
r-BU~600
IS< --r
/,
"
~ 98
>
I
Oi
if
97
C
96
'5
2
Q
~
4
~
"
~
'BUF601
I
95
BUF601
o
'BUF6OO
94
~
0
2
345
Input Voltage (V)
o
2
3
4
6
7
8
Tlme(s)
DISCUSSION OF
PERFORMANCE
The BUF600/601 are fabricated using a high-perfonnance
complementary bipolar process, which provides highfrequency NPN and PNP transistors with gigahertz transition
frequencies (fT). Power supplies are rated at ±6V maximum,
with the data sheet parameters specified at ±5V supplies. The
BUF600/601 are 3-stage open-loop buffer amplifiers consisting of complementary emitter followers with a symmetrical
class AB Darlington output stage. The complementary structure provides both sink and source current capability independent of the output voltage, while maintaining constant output
and input impedances. The amplifiers use no feedback, so
their low-frequency gain is slightly less than unity and somewhat dependent on loading. The optimized input stage is
responsible for the high slew rate of up to 3600V/IlS, wide
large signal bandwidth of 320MHz, and quiescent current
reduction to ±3mA (BUF600) and ±6mA (BUF60l). These
features yield an excellent large signal bandwidth/quiescent
current ratio of 320MHz, 5Vp-p at 3mA16mA quiescent
current. The complementary emitter followers of the input
stage work with current sources as loads. The internal PTAT
power supply controls their quiescent current and with its
temperature characteristics keeps the transconductance of the
buffer amplifiers constant. The Typical Performance Curves
show the quiescent current variation versus temperature.
The cross current in the input stage is kept very low, resulting
in a low input bias current of 0.71JA11.51JA and high input
impedance of 4.8Mn II 1pF/2.5MQ II 1pF. The second stage
drives the output transistors and reduces the output impedance
and the feedthrough from output to input when driving RLC
loads.
The input of the BUF600/601 looks like a high resistance
parallel to a picofarad capacitance. The input characteristics
change very little with output loading and input voltage swing.
TheBUF600/601 have excellent input-to-output isolation and
feature high tolerance to variations in source impedances. A
resistor between lOOn and 250n in series with the buffer
input lead will usually eliminate oscillation problems from
inductive sources such as unterminated cables without sacrificing speed.
Another excellent feature is the output-to-input isolation over
a wide frequency range. This characteristic is very important
when the buffer drives different equipment over cables. Often
the cable is not perfect or the tetu1ination is incorrect and
reflections arise that act like a signal source at the output of the
buffer.
Open-loop devices often sacrifice linearity and introduce
frequency distortion when driving low load impedance. The
BUF600/601, however, do not. Their design yields low distortion products. The harmonic distortion characteristics into
loads greater than lOOn (BUF601) and greater than 200n
(BUF600) are shown in the Typical Performance Curves. The
distortion can be improved even more by increasing the load
resistance.
Differential gain (DG) and differential phase (DP) are among
the important specifications for video applications. DG is
defined as the percent change in gain over a specified change
in output voltage level (OV toO.7V.) DPis defined as the phase
change in degrees over the same output voltage change. Both
DG and DP are specified at the PAL subcarrier frequency of
4.43MHz. The errors for differential gain arelowerthanO.5%,
while those for differential phase are lower than 0.04°.
With its minimum 20mA long-term DC output current capability, 50mA pulse current, low output impedance over frequency, and stability to drive capacitive loads, the BUF601
can drive 50n and 75n systems or lines. The BUF600 with
lower quiescent current and therefore higher outputimpedance is well-suited primarily to interstage buffering. This type
of open-loop amplifieris anew and easy-to-use step to prevent
an interaction between two points in complex high-speed
analog circuitry.
I1RR.aRDWNCl!I
3.1.12
Burr Brown Ie Data Book -Linear Products _ E3 E!l1
Or, Call Customer Service at 1-800-548-6132 (USA Only)
The buffer outputs are not current-limited or protected. If the
output is shorted to ground, high currents could arise when the
input voltage is ±3.6V. Momentary shorts to ground (a few
seconds) should be avoided but are unlikely to cause permanent damage.
• A resistor (WOn to 250n) in series with the input of the
buffers may help to reduce peaking.
CIRCUIT LAYOUT
SUGGESTED LAYOUT
The high-frequency performance of the buffer amplifiers
BUF600/601 can be greatly affected by the physical layout of
the printed circuit board. The following tips are offered as
suggestions, not as absolute musts. Oscillations, ringing, poor
bandwidth and settling, and peaking are all typical problems
that plague high-speed components when they are used incorrectly.
A completely assembled and tested demonstration board is
available for the BUF600/601 to speed prototyping. This
board allows easy and fast performance testing during the
design phase and for product qualification. The user can
qualify the most important parameters within hours instead of
days, while avoiding the hassles of an optimized board layout
and power supply bypassing. The complete AC characterization was performed with the same type. Figure 2 shows
schematic and Figure 3 the silk screen and double-sided
layout. RequestDEM-BUF600-IGC or DEM-BUF601-IGC
to test the buffer amplifiers in the 8-pin DIP package.
• Bypass power supplies very close to the device pins. Use
tantalum chip capacitors (approximately 2.211F); a parallel
470nF ceramic chip capacitor may be added if desired.
Surface-mount types are recommended due to their low
lead inductance.
• Plug-in prototype boards and wire-wrap boards will not
function well. A clean layout using RF techniques is
essential-there are no shortcuts.
,..
::)
m
en
a::
w
D
• Use a low-impedance ground plane on the component side
to ensure that low-impedance ground is available throughout the layout.
::i
a..
:iiE
----~r----_o
va
V, 0--,/1111'--1
-5V
R,
1500
G=+2=1 +
~
R,
-5V
FIGURE 7. Inside a Feedback Loop of a Voltage Feedback Amplifier (BUF60l and OPA660).
BURR-BROWN®
I EiI Eill
Burr-Brown Ie Data Book-Linear Products
3.1.15
For Immediate Assistance, Contact Your Local Salesperson
+5V
R,
2400
OPA660
-5V
R,
420
V,l)-_~/'''\I"~'-'
7511
470pF
+----, 10nF.I
2.2~F.I
.I
-
-:-
FIGURE 8. Output Buffer for an Inverting RF-Amplifier (Direct Feedback).
+5V
68nF
1500
v,~
1
47kll
750
47kll
Clamp
Pulse
~p-p
-5V
FIGURE 9. Input Amplifier with Baseband Video DC Restoration.
BURR·8ROWN®
3.1.16
Burr Brown Ie Data Book -Linear Products
I EilEilI
0" Call Customer Service at 1·800·548·6132 (USA Only)
+5V
Generator
son
In
R'N
160n
Out
son
Network
Analyzer
,....
son
Test Fixture
o
~
o
--SV
o
CD
LL
::J
III
FIGURE 10. Test Circuit Frequency Response.
C/)
+5V
Pulse
Generator
son
In
Out
son
a:
w
Digitizing
Scope
u:::
:::i
Q.
son
Test Fixture
:E
-5V
«
a:
w
LL
LL
::J
III
FIGURE 11. Test Circuit Pulse Response.
Generator
FIGURE 12. Test Circuit Differential Gain and Phase.
BURR-BROWN®
I EiiI Eiill
Burr-Brown Ie Data Book-Linear Products
3.1.17
For Immediate Assistance, Contact Your Local Salesperson
BURR-BROWN®
BUF634
11511511
250mA HIGH-SPEED BUFFER
FEATURES
APPLICATIONS
• HIGH OUTPUT CURRENT: 250mA
• VALVE DRIVER
• SOLENOID DRIVER
• OP AMP CURRENT BOOSTER
• SLEW RATE: 2000V/I!S
• PIN-SELECTED BANDWIDTH:
30MHz/180MHz
• LINE DRIVER
• HEADPHONE DRIVER
• LOW QUIESCENT CURRENT:
1.5mA (30MHz BW)
• VIDEO DRIVER
• MOTOR DRIVER
• WIDE SUPPLY RANGE: ±2.25 to ±18V
• INTERNAL CURRENT LIMIT
• TEST EQUIPMENT
• ATE PIN DRIVER
• THERMAL SHUT-DOWN
• 8-PIN DIP, 50-8, 5-PIN TO-220
PACKAGES
DESCRIPTION
The BUF634 is a high speed unity-gain open-loop
buffer recommended for a wide range of applications.
It can be used inside the feedback loop of op amps to
increase output current, eliminate thermal feedback
and improve capacitive load drive.
For low power applications, the BUF634 operates on
1.5mA quiescent current with 250mA output and
2000V/IlS slew rate. Bandwidth is increased from
30MHz to l80MHz by connecting pin I to V-.
Output circuitry is fully protected by internal current
limit and thermal shut-down making it rugged and
easy to use.
The BUF634 is available in a variety of packages to
suit mechanical and power dissipation requirements.
Types include 8-pin DIP, SO-8 surface-mount and
5-pin TO-220.
o
5·Pin T0-220
8·Pin DIP Package
80-8 Surface-Mount Package
I
BW
I v-I I v+I
V,N
Vo
International Airport industrial Park
Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
T.I: (602) 746-1111 • Twx: 91D-952·1111 • CobIe:BBRCORP • Telex: 066-&191 • FAX: (602)989-1510 • ImrnedIateProductlnfo:(800)54UI32
PDS·1206A
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
TA = +25"C"', Vs= ±15V unless otherwise noted.
BUF634P, U, T
LOW QUIESCENT CURRENT MODE
PARAMETER
CONDmON
INPUT
Offset Voltage
vs Temperature
vs Power Supply
Input Bias Current
Input Impedance
Noise Voltage
MIN
Specified Temperature Range
Vs = ±2.25V'" to ±18V
V,N = OV
AL= 100Q
f = 10kHz
GAIN
OUTPUT
Current Output, Continuous
Voltage Output, Positive
Negative
Positive
Negative
Positive
Negative
TYP
MAX
±30
±1oo
0.1
±0.5
80 II B
4
±100
AL = 1kQ, Vo= ±10V
AL = 100Q, Vo= ±10V
AL = 67Q, Vo = ±10V
0.95
0.85
0.8
0.99
0.93
0.9
10= 10mA
10 • -10mA
10= 100mA
10= -100mA
10= 150mA
10= -150mA
(V+) -2.1
(V-) +2.1
(V+) -3
(V-) +4
(V+) -4
(V-) +5
±25O
(V+) -1.7
(V-) +1.8
(V+) -2.4
(V-) +3.5
(V+) -2.8
(V-) +4
Short-Circuit CUrrent
±35O
DYNAMIC RESPONSE
Bandwidth, -3dB
Slew Aate
Settling Time, 0.1 %
1%
Differential Gain
Differential Phase
POWER SUPPLY
Specified Operating Voltage
Operating Voltage Aange
Quiescent Current, 10
TEMPERATURE RANGE
Specification
Operating
Storage
Thermal Shutdown
Temperature, TJ
Thermal Resistance, 9JA
8"
8JA
8JC
1
±2
±2.25'·
±1.5
-40
-40
-40
MAX
±20
·
·
mA
V
V
V
V
V
V
±400
mA
180
160
MHz
MHz
V/jJ.s
ns
ns
%
.
+85
+125
+125
mV
jJ.VI"C
mVN
jJ.A
MQ II pF
nVlv'Hz
·
0.4
0.1
±18
±2
UNITS
VN
VN
VN
±55O
±15
10= 0
TYP
±5
8118
30
20
2000
200
50
4
2.5
AL= 1kQ
AL= 100Q
20Vp-p, AL = 100Q
20V Step, AL = 100Q
20V Step, AL = 100Q
3.58MHz, V0 = O. 7V, AL = 150Q
3.58MHz, Vo = 0.7V, AL = 150Q
"P" PackagePI
"U" PackagePl
''T" PackagePI
"T" Package
WIDE BANDWIDTH MODE
MIN
·
LL
:;)
m
III
,
.
±15
±20
·
··
·
·
V
V
mA
"C
"C
"C
175
100
150
65
"C
"C/W
"C/W
"C/W
6
nC/"v~J
V+
II1I:I"
('I)
CD
V+
~ ~
BW
V-
V-
NOTES: (1) Tests are performed on high speed automatic test equipment, at approximately 25"C junction temperature. The power dissipation of this product will
cause some parameters to shift when warmed up. See typical performance curves for over-temperature performance. (2) Limited output swing available at low supply
voltage. See Output voltage specifications. (3) Typical when all leads are soldered to a circuit board. See text for recommendations.
The information provided herein is believed to be reliable; however, BUAA-BAOWN assumes no responsibility for inaccuracies or omissions. BUAA-BAOWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BUAA-BAOWN does not
authorize or warrant any BUAA-BAOWN product for use in life support devices and/or systems.
BURR-BROWN
11
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11
-~-
1j,
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10
10
.... Vs -±15V
Wide BW Mode ._.
~
10
-10
""g
'5
12
-'- "-'-
~
;g -
'5
g-11
-11
I---t---t:r'-+~;...--'"\TJ _-40°C _ _
f-=-"""I=:"-""'f--- TJ -25°C _._.
1--c=:::;;;!;""'-=-V,N_-13 V - - TJ -125°C--
-12
-13
-13
0
50
100
150
200
250
III
-12
300
o
50
10utput Currentl (mA)
100
150
200
250
300
10utput Currentl (mA)
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MAXIMUM POWER DISSIPATION vs TEMPERATURE
MAXIMUM POWER DISSIPATION vs TEMPERATURE
3
12
TO-220 Package
Infinite Heat Sink
8JC -JoCIW
10
[
[
c: 2
o
i
.~
----
T0-220 Package - I--- Free Air
a-Pin DIP " " "
-8JA - 100°CIW - i"'JA - 65°CIW -1----
~
o
I
/' r:::::
so-a I
-
I'-.
8JA - 150°CIW
o
-..QO
-25
I
I
o
25
50
. . ..
.
....
", ......
75
........ ~
100
c:
0
rac.
.~
a
--
6
1--- -
0
to
~
0
4
0..
2
~
125
--_ .. - ._- ._....\\ "
TO-220 Package
Free Air
8JA _65°CIW
,
~
\
Ambient Temperature (0C)
\
\
---
LARGE-SIGNAL RESPONSE
Rs - SOO, RL - 1000
Input
Input
10Vldiv
100mV/div
WideBW
Mode
Wide BW
Mode
Low 10
Low 10
Mode
Mode
20nsldiv
20nsldiv
BURR~BROWN@
IEiilEiilI
Burr-Brown Ie Data Book-Linear Products
4.
V-
FIGURE 3. Boosting Op Amp Output Current.
POWER DISSIPATION
Power dissipation depends on power supply voltage, signal
and load conditions. With dc signals, power dissipation is
equal to the product of output current times the voltage
across the conducting output transistor. Power dissipation
can be minimized by using the lowest possible power supply
voltage necessary to assure the required output voltage
swing.
For resistive loads, the maximum power dissipation occurs
at a dc output voltage of one-half the power supply voltage.
Dissipation with ac signals is lower. Application Bulletin
AB-039 explains how to calculate or measure power dissipation with unusual signals and loads.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an inadequate heat
sink For reliable operation, junction temperature should be
limited to 150°C, maximum. To estimate the margin of
safety in a complete design, increase the ambient temperature until the thermal protection is triggered. The thermal
protection should trigger more than 45°C above the maximum expected ambient condition of your application.
INPUT CHARACTERISTICS
Internal circuitry is protected with a diode clamp connected
from the input to output of the BUF634--see Figure L If the
output is unable to follow the input within approximately 3V
(such as with an output short-circnit), the input will conduct
increased current from the input source. This is limited by
the internal 200(1 resistor. If the input source can be damaged by this increase in load current, an additional resistor
can be connected in series with the input
BANDWIDTH CONTROL PIN
The -3dB bandwidth of the BUF634 is approximately 30MHz
in the low quiescent current mode (L5mA typical). To select
this mode, leave the bandwidth control pin open (no connection).
Bandwidth can be extended to approximately 180MHz by
connecting the bandwidth control pin to V-. This increases
the quiescent current to approximately 15mA. Intermediate
bandwidths can be set by connecting a resistor in series with
the bandwidth control pin-see typical curve "Quiescent
lII
Current vs Resistance" for resistor selection. Characteristics
of the bandwidth control pin can be seen in the simplified
circuit diagram, Figure L
The rated output current and slew rate are not affected by the
bandwidth control, but the current limit value changes slightly.
Output voltage swing is somewhat improved in the wide
bandwidth mode. The increased quiescent current when ill
wide bandwidth mode produces greater power dissipation
during low output current conditions. This quiescent power
is equal to the total supply voltage, (V+ )+IV-I, times the
quiescent current.
BOOSTING OP AMP OUTPUT CURRENT
The BUF634 can be connected inside the feedback loop of
most op amps to increase output current-see Figure 3.
When connected inside the feedback loop, the BUF634's
offset voltage and other errors are corrected by the feedback
of the op amp.
To assure that the op amp remains stable, the BUF634's
phase shift must remain small throughout the loop gain of
the circuit For a 0=+1 op amp circuit, the BUF634 must
contribute little additional phase shift (approximately 20° or
less) at the unity-gain frequency of the op amp. Phase shift
is affected by various operating conditions that may affect
stability of the op amp--see typical Gain and Phase curves.
Most general-purpose or precision op amps remain unitygain stable with the BUF634 connected inside the feedback
loop as shown. Large capacitive loads may require the
BUF634 to be connected for wide bandwidth for stable
operation. High speed or fast-settling op amps generally
require the wide bandwidth mode to remain stable and to
assure good dynamic performance. To check for stability
with an op amp, look for oscillations or excessive ringing on
signal pulses with the intended load and worst case conditions that affect phase response of the buffer.
HIGH FREQUENCY APPLICATIONS
The BUF634' s excellent bandwidth and fast slew rate make it
useful in a variety of high frequency open-loop applications.
When operated open-loop, circuit board layout and bypassing
technique can affect dynamic performance.
For best results, use a ground plane type circuit board layout
and bypass the power supplies with O.lllF ceramic chip
BURR-BROWN@
'&:1&:1'
Burr-Brown Ie Data Book-Linear Products
3.1.25
fJ)
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---~t----o pseudo
ground
+
12V
FIGURE 5. Pseudo-Ground Driver.
5kn
V,N
±2V
0.015%
0.02%
FIGURE 4. High Performance Headphone Driver.
FIGURE 6. Current-Output Valve Driver.
10kn
1kn
9kn
10kn
FIGURE 7. Bridge-Connected Motor Driver.
V,N
FIGURE 8. Differential Line Driver.
BURR· BROWN®
3.1.26
Burr-Brown Ie Data Book-Linear Products
IE:lE:lI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
OPA445
IiRR-BROWN@
ElEII
~
(~
1 " 1
i
I
j
High Voltage FET-Input
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
• WIDE POWER SUPPLY RANGE: ±10V to
• TEST EQUIPMENT
±45V
en
a:
w
• HIGH VOLTAGE REGULATORS
• HIGH SLEW RATE: 10V/J.1S
• POWER AMPLIFIERS
• LOW INPUT BIAS CURRENT: 50pA max
• DATA ACQUISITION
• SIGNAL CONDITIONING
• STANDARD·PINOUT TQ.99 AND DIP
PACKAGES
u::
:J
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-----+--+---"'+'O(~i
International Airport Induatrial Park • Mailing Address: PO Bo.114OO
Tol: (602) 746-1111 • Twx: 91(1.952.1111 • Coble:BBRCORP •
• Tucson, AZ B5734 • Street Addre..: 6730 S. Tucson Blvd. • Tucson, AZ 85706
T818.:066-6491 • FAX: (602)_1510 • Immedl.teProductlnlo:(800)~132
PDS-754C
3.2.27
For/mmediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
At
v. = ±40'C and T, = +25'C, unless otherwise specified.
OPA445SM
PARAMETER
CONDmONS
MIN
OPA445BM
TYP
MAX
0.5
··
1.0
·
·
OPA445AP
TYP'
MAX
UNITS
2.0
15
5.0
mV
INrC
dB
50
10
50
100
20
pA
nA
10
5
20
40
10
pA
nA
MIN
TYP
MAX
1.0
10
110
3.0
80
20
4
MIN
INPUT
OFFSET VOLTAGE
Input Offset Voltage
Average Drift
Supply Rejection
Vcu = OV
TA
;" TMIN
to T~
·
V, = ±10V to ±50V
BIAS CURRENT
Input Bias Current
Over Temperature
VOM = OV
OFFSET CURRENT
Input OIIset Current
Over Temperature
VOM = OV
·
··
IMPEDANCE
Differential
Common-Mode
VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
100
50
·
(1 I] pF
(1 I] pF
10"1] 1
1014 1] 3
·
±35
Y'N = ±30V,
OverTemp.
·
OPEN·LOOP GAIN. DC
Open·Loop Voltage Gain
Over Temperature
·
R, =5k(1
·
80
95
100
97
105
Small Signal
35Vp-p, R, = 5kU
·
Vo = ±35V,
R, = 5kU
Vo = ±200mV
11,,= +1
~ = 5kU II 50pF
·
DYNAMIC RESPONSE
Slew Rate
Rise Time
Overshoot
OUTPUT
Voltage Output, Over Temp.
Current Output
Output Resistance
Short Circuft Current
·
R, = 5kU
Vo = ±28V
DC, Open Loop
POWER SUPPLY
45
5
·
·
2
55
·
10
100
220
±26
·
··
-55
+125
Over Temperature
10 = OmA
±10
3.8
Ambient Temperature
·
·
-25
-55
MHz
kHz
··
·
VIlIS
ns
%
+65
+125
V
rnA
(1
rnA
·
·
±45
4.5
TEMPERATURE RANGE
Specification
Operating
6 Junction·Ambient
dB
dB
··
±35
±15
±40
Rated Voltage, ±V,
Voltage Range, ±V,
Derated Performance
Current, Quiescent
dB
·
30
··
V
·
··
FREQUENCY RESPONSE
Gain Bandwidth
Full Power Response
·
·
··
·
-25
200
V
+65
100
V
rnA
'c
'c
oelW
'Specifications same as OPA445BM.
CONNECTION DIAGRAMS
TopVlaw
Top View
NC
DIP
OIIsetTrim
8
NC
-In
+In
-Vs
Output
4
5
OIIsetTrim
-Vs
Case is connected to .c.Vs
3.2.28
Burr-Brown Ie Data Book-Linear Products
T().99
Or, Call Customer Service at 1·800·548·6132 (USA Only)
DICE INFORMATION
PAD
FUNCTION
PAD
FUNCTION
1
2
3
4
5
6
Offset Trim
7
8
-V,
(Compensation)
Output
+V,
NC
NC
-In
+In
NC
-V,
Offset Trim
9
10
11
12
Substrate Bias: Electrically connected to -V, supply.
NC: No Connection.
MECHANICAL INFORMATION
Die Size
Die Thickness
Min. Pad Size
MILS (0.001")
MILLIMETERS
88x72±5
20±3
4x4
2.24xl.83±0.13
0.51 ±0.08
0.1 x 0.1
Backing
ChromiumMSilvsr
CJ)
OPA445 DIE TOPOGRAPHY
a:
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ABSOLUTE MAXIMUM RATINGS
u::
ORDERING INFORMATION
Power Supply ..................................................................................... ±50V
Intemal Power Dissipation ............................................................. 680mW
Differential Input Voltage •............•...................................................... ±80V
Input Voltage Range ................................................................... I±Vsl-'3V
Storage Temperature Range: M ..................................... ~5°C to +150°C
P ........................................ -40°C to +85°C
Operating Temperature Range: M .................................. -55°C to +125°C
P ..................................... -40°C to +85°C
Lead Temperature (soldering, lOs) ................................................ +300°C
Output Short-Circuit to Ground (T. = +25°C) ........................... Continuous
Junction Temperature .................................................................... +175°C
MODEL
OPA445AP
OPA445BM
OPA445SM
PACKAGE
TEMPERATURE RANGE
8-pin plastic DIP
8-pin TD-99
8-pin TO-99
-25°C to +85°C
-25°C to +85°C
-55°C to +125°C
::::i
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:::\\E
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PACKAGE INFORMATION!11
PACKAGE
PACKAGE DRAWING
NUMBER
8-pin plastic DIP
8-pln TD-99
8-pin TD-gg
006
001
001
MODEL
OPA445AP
OPA445BM
OPA445SM
Z
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
o
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TYPICAL PERFORMANCE CURVES
T. = +25"C,
v, = ±40VDC, unless otherwise noted.
GAIN BANDWIDTH AND SLEW RATE
vs TEMPERATURE
GAIN BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
2.6
2.4
.........
N
J:
e,0;
2.2
'j;
2.0
.!l
"
~
~
'"-
..,
-g
GBW
1.8
'OJ
Cl
~ I--,
1.6
1.4
-75
2.2
11
10
SR
N
9
~
8
~
IfJ
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7
J:
e
2.0
14
r-
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'O"J
Cl
--
GBW
-.......
5
-25
0
25
50
75
100
"
1ii
1.8
SIR
-
1.6
125
Ambient Temperature (OC)
'E!lE!I'
~
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~
10 Cii
III
6
-50
12 u;-
8
10
20
30
40
50
Supply Voltage (±Vs)
aURR-BROWN~
Burr-Brown Ie Data Book-Linear Products
3.2.29
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CO NT)
TA = +25°C,
v, = ±40VDC, unless otherwise noted.
POWER SUPPLY REJECTION
vs FREQUENCY
INPUT BIAS CURRENT
vs TEMPERATURE
E
~
100nA
120
10nA
iii'100
c:
0
"
~
100pA
"il'iii'
10pA
'li
.E
lpA
li;
()
a.
--
:--.
..........
60
a:
..........
~
40
~
20
" '"
I. . . . .
60
>-
O.lpA
"
~O
-25
0
25
75
50
100
10
125
100
lk
10k
\
~
80
-90
e
lOOk
1M
10M
100M
'---;
-
4.0
.~
"'-..
Frequency (Hz)
140
'0;
" '"I"
-Vee ..........
Temperature (OC)
c:
+Vcc
0
O.OlpA
-75
~
:E-
InA
21
-
r- r---..
..............
20
----- --.....
..........
Current
Limit
19
18
2
10
12
14
16
18
lOUT (mA)
20
22
24
26
-75
~O
-25
0
25
50
75
100
125
Ambient Temperature (0C)
BURR-BROWN®
3.2.30
Burr-Brown Ie Data Book-Linear Products
IElIElII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CO NT)
T. = +25°C, Vs = ±15VDC unless olherwise noted.
MAXIMUM OUTPUT VOLTAGE SWING
vs FREQUENCY
OPEN-LOOP GAIN vs TEMPERATURE
120
90
---
80
~
iii 110
:Eo
,
c:
'n;
(!j
!J
---
60
"
~
50
~
30
0
> 40 - -
"
100
"
0
-
70
,--
~K
--
---
20
---
10
-
..
0
90
-75
-50
o
-25
25
50
75
100
125
lk
10k
Ambient Temperature fOe)
lOOk
1M
Freeuencv (Hz)
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S
%
0
(,)
0.8
30 ~--~-+--+--+--~~
r--~o~-Circuit burrent
~--------+--I
25 ~--
0.7
--
20 I---!----- c--- ----II------F""'-d----I
15
-~current
10 t----j-----j- - - - ------
o
-25
[
0.5
c:
.2
0.4
1;j
Q.
.~
(5
---=-V-:-o+-=":±"'35"'V~;;;;:--:--
25
75
50
Temperature (OC)
100
\PI~ti:;;
"TO-~ ~
0.6
:===:===--~-o__~____~_-~-l~-"-_---_'-~-_--_-_-~
--<50
w
MAXIMUM POWER DISSIPATION vs TEMPERATURE
OUTPUT CURRENT vs TEMPERATURE
35
125
0.3
..- - --
-25
-
75
I
I
I
r- r-
~
.~
F
10
:c=
---
I--
E I
I
-
-- f--
I
I
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-
-=-- -
-~
w
E':'I~
--- - - - I - f-- - ----- r---- - -
--
r--10
100
lk
10k
lOOk
Frequency (Hz)
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
wijhaut notice. No patent rights or licenses to any of the circuijs described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andlor systems.
BURR-BROWN@
IElElI
Burr-Brown Ie Data Book-Linear Products
3.2.31
For Immediate Assistance, Contact Your Local Salesperson
INSTALLATION AND
OPERATING INSTRUCTIONS
The OPA445 may be operated frOm power supplies up to
±45V or a total of 9OV. Power supplies should be bypassed
with O.022J.IF capacitors, or greater, near the power supply
pins. Be sure that the capacitors are appropriately rated for
the supply voltage used.
The OPA445 can supply output currents of 15mA and
larger. This would present no problem for a standard op amp
operating from ±15V supplies. With high supply voltages,
however, internal power dissipation of the op amp can be
quite large. Operation from a single power supply (or unbalanced power supplies) can produce even larger power dissipation since a larger voltage is impressed across the conducting output transistor.
Dissipation should be limited to 680mW at 25°C. At temperatures above 25°C, the maximum dissipation should be
derated according to the thennal resistance of the package
type used.
Package thermal resistance, 8JC' is affected by mounting
techniques and environments. The figures provided are typical for common mounting configurations with convection
air flow. Poor air circulation and use of sockets can significantly increase thennal resistance. Best thermal performance is achieved by soldering the op amp into a circuit
board with wide printed circuit traces to allow greater
conduction through the op amp leads. Simple clip-on heat
sinks can reduce the thennal resistance of the TO-99 metal
package by as much as 50°CIW.
A short-circuit to ground will produce a typical output
current of 25mA. With ±40V power supplies, this creates an
internal power dissipation of LOW. This exceeds the maximum rating for the device, and is not recommended. Permanent damage is unlikely, however, since the short-circuit
output current will diminish as the junction temperature
rises.
TYPICAL APPLICATIONS
-Vs
NOTE: (1) 10kn to lMIl
Trim Potentiometer
(100kn recommended).
-12V
FIGURE 1. Offset Voltage Trim.
FIGURE 3. Programmable Voltage Source.
R,
100kn
R.
10011
~o-~r~--+-------~A~---'
Load
IL = [(V. - V,)/R,;] (R./R,)
=(V2 - V,)/lkll
Compliance Voltage Range = ±35V
FIGURE 2. Voltage-to-Current Converter.
3.2.32
Burr-Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BROWN®
OPA501
1E3E31
,..
o
In
High Current, High Power
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
• HIGH OUTPUT CURRENT: ±10A Peak
• MOTOR DRIVER
• SERVO AMPLIFIER
• WIDE POWER SUPPL V RANGE:
±10 to ±40V
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• VALVE ACTUATOR
• LOW QUIESCENT CURRENT: 2.6mA
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• SVNCRO DRIVER
• PROGRAMMABLE POWER SUPPL V
• ISOLATED CASE TO·3 PACKAGE
DESCRIPTION
«
«Z
v+
...I
The OPA501 is a high output current operational
amplifier. It can be used in virtually all common op
amp circuits, yet is capable of output currents up to
±1OA. Power supply voltages up to ±40V allow very
high output power for driving motors or other electromechanical loads.
Safe operating area is fully specified, and user-set
current limits provide protection for both the amplifier
and load. The class-B (zero output stage bias) provides
low quiescent current during small-signal conditions.
This rugged hybrid illLt:grat~u (.;ifCu1t Is packaged in a
metal 8-pin TO-3 package. Both industrial and military temperature range models are available.
0
~
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a:
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5
Output
4
~
0
a..
RCL
6
v-
International Airport Industrial Park • Mailing Add....: PO Box 11400 • Tucson, AZ 85734 • Street Add..ss: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602)7411-1111 • Twx: 91Q.952·1111 • Cable: BBRCORP • Telex: 0611-6491 • FAX: (602)869-1510 • Immediate Product Info: (SOD) 546-6132
PDS-490F
W
3.2.33
Forlmmediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
At Te= +25°C, V.= ±28V, (OPA50tRM, AM);
v. = ±34V (OPASOtSM, BM) unless otherwise noted.
OPA501RM, AM
PARAMETER
RATED OUTPUT"'~
Output Current
Continuous(3)
Output Voltage")
DYNAMIC RESPONSE
Bandwidth, Unity Gain
Full Power Bandwidth
Slew Rate
INPUT OFFSET VOLTAGE
Initial Offset
vs Temperature
CONDmONS
MIN
R" = 2n (RM, AM)
RL = 2.60 (SM, BM)
10 = lOA peak
±IO
±IO
±20
Small Signal
Vo = 40Vp-p, RL = 60
RL = 00 (RM, AM)
RL = 6.00 (SM, BM)
10
1.35
1.35
OPA501SM, BM
MAX
MIN
±23
±26
I
16
··
±5
±IO
-25°C < T < +85°C (AM, BM)
-55°C < T < +125°C (RM, SM)
±IO
±65
TYP
MAX
UNITS
A
A
V
±29
·
MHz
kHz
VI)!s
v/)!s
±2
±5
±IO
mV
)!VloC
)!VloC
)!VN
TCASE ;;: +25°C
15
±C.05
±C.02
40
·
··
±40
20
nA
nAf'C
nAN
TCASE = +25°C
-25'C < T < +85°C (AM, BM)
-55°C < T < +I 25'C (RM, SM)
±5
±C.OI
±IO
±2
±3
±C.OI
nA
nAf'C
nAf'C
115
dB
dB
vs Supply Voltage
±35
INPUT BIAS CURRENT
Initial
vs Temperature
vs Supply Voltage
INPUT DIFFERENCE CURRENT
Initial
vs Temperature
TYP
OPEN-LOOP GAIN, DC
RL = 6.00 (SM, BM)
RL = 00 (RM, AM)
94
98
INPUT IMPEDANCE
Differential
Common-mode
INPUT NOISE
Voltage Noise
= 10Hz to 10kHz
Current Noise
," = 10Hz to 10kHz
'0
INPUT VOLTAGE RANGE
Common-mode Voltage(4)
Common·mode Rejection
115
10
250
,; = 0.3Hz to 10Hz
Mf.!
Mf.!
3
20
," = 0.3Hz to 10Hz
4.5
Linear Operation
I = DC, VeM = ±(IVsl-£)
POWER SUPPLY
Rated Voltage
Operating Voltage Range
Current, quiescent
±(IVsl-£)
70
±(iVsl-3)
110
80
±28
±10
±2.6
TEMPERATURE RANGE
Specification, RM, SM
AM,BM
Operating, derated
pertormance, AM, BM
Storage
case
THERMAL RESISTANCE
Steady State 0Je
)!Vrms
pAp-p
pArms
V
dB
·
±34
±36
±IO
-55
-25
+125
+85
-55
-£5
+125
+150
2.0
)!VP-P
·
·
5
2.2
·
··
··
±40
·
·
···
V
V
mA
°C
'C
°C
°C
°CIW
'Specification same as lor OPA501 RM, AM.
NOTES: (1) Package must be derated based on a junction-to·case thermal resistance of 2.2'CIW or a junction-to·ambient thermal resistance of 30'CIW. (2) Safe
Operating Area and Power Derating Curves must be observed. (3) With ±Rsc = O. Peak output current is typically greater than 1OA if duty cycle and pulse width limitations
are observed. Output current greater than lOA is not guaranteed. (4) The absolute maximum voltage is 3V less than supply voltage.
The information provided herein is believed to be reliable; however, BURR·BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in lile support devices andior systems.
BURR-BROWN@
3.2.34
Burr-Brown Ie Data Book-Linear Products
I E!lE!II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAM
Power Supply Voltage (Vs) ................................................................ ±40V
Power Dissipation at +25°C<1. 2)
...........................................................
79W
Differential Input Voltage ............................................................... ±Vs-3V
Common-Mode Input Voltage .............................................................. ±Vs
Operating Temperature Range ....................................... -55'C to + 125'C
Storage Temperature Range
__ ............................ -65°C to +150D C
Lead Temperature (soldering, 1Os) ................................................ +300'C
Junction Temperature .................................................................... +200°C
Output Short-Circuit Duration(3) ................................................ Continuous
NOTES: (1) At case temperature of +25'C. Derate at 2.2'CIW above case
temperature of +25'C. (2) Average dissipation. (3) Within safe operating
Top View
r--------~--OVo
+In
,....
-In
o
area and with appropriate derating.
it)
~
NC
o
ORDERING INFORMATION
MODEL
PACKAGE
8-Pin
8-Pin
8-Pin
8-Pin
OPA501AM
OPA501BM
OPA501RM
OPAS01SM
Metal
Metal
Metal
Metal
TO-3
TO-3
TO-3
TQ-3
TEMPERATURE
RANGE
-25'C to +85'C
-25'C to +85'C
-55'C to + 125'C
-55'C to + 125'C
Ell
en
a::
w
u::
PACKAGE INFORMATION(')
MODEL
OPAS01AM
OPA501BM
OPA501RM
OPAS01SM
PACKAGE
8-Pin
8-Pin
8-Pin
8-Pin
Metal TO-3
Metal TQ-3
Metal TO-3
Metal TQ-3
::i
Q.
:i
PACKAGE DRAWING
NUMBER
«
«z
o
030
030
030
030
-'
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
fi
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o
a::
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~
oQ.
BURR-BROWN@
I EiilEiiII
Burr-Brown Ie Data Book-Linear Products
3.2.35
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
Typical at +25'C case and ±V, = 2BVDC, unless otherwise noted.
COMMON MODE REJECTION vs FREQUENCY
OPEN-LOOP FREQUENCY RESPONSE
t20
k
100
iii'
:!l-
~"
C.
E
«
BO
60
120
0
\"",
f\. 1"'-
-60
V Phase
~
20
AmPI1"de/
0
'"
'"I'"
-90
-120
~
lk
10k
lOOk
1M
-180
~
r:
~
"Ii!'
!!!
.;;
:!l-
!
.c
'8"
::!!
.:
0
60
8
20
Q.
-150
-20
100
100
:!l-
40
10
iii'
-30
80
I'\.
0:
"'"t-.....
40
E
E
-210
10M
10
100
2.4
iii
E
0
6
E
~
u'"
2.0
\
.E
0.4
Av=10
---
±35
~
'\
<:.
o
-50
...........
~
S
r--
%±20
0
±15
±10
o
..,25
±30
1" ±25
"""
1.2
O.B
c.
±40
1.6
!S
25
50
75
100
125
±10
Case Temperature ('C)
'"
~
"
J
S
1'-
I 1"-'
20
Maximum "Undistorted"
Sine Wave Output
Output
1.4
"'~
1.0
RL=811
Ay=+10
Tc=+25'C
2
4
6
±40
Rc=4
RL =8
0.6
RL = 1611
0.4
RL =50
0.2
111111
2
±35
1.2
0.8
6
4
±30
Vo =4OVp-p
Av = +10
Vs = ±2BV
Maximum
10
±25
1.8
~+Vs=±28~
%
0
±20
HARMONIC DISTORTION vs FREQUENCY
+Vs -±34
60
40
±15
Power Supply Voltage, Vs (V)
FULL POWER RESPONSE
100
~
1M
OUTPUT VOLTAGE SWING
vs POWER SUPPLY VOLTAGE
INPUT BIAS CURRENT vs TEMPERATURE
2.B
.~
lOOk
10k
Frequency (Hz)
Frequencv (Hz)
i
lk
-.........
o
10
20
Frequency (kHz)
40
60
100
10
102
10'
1()4
Frequencv (kHz)
BURR-BRQWNIlJI
3.2.36
Burr-Brown Ie Data Book-Linear Products
I E!lE!II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
Typical at +25°C case and ±vs = 28VDC, unless otherwise noted.
CURRENT LIMIT RESISTOR vs LIMIT CURRENT
POWER DERATING CURVE
120
~
r---,---,----,---,......--,...----.
100 f - - -
n.
~"
~.--
80
SO
--.--f--..
40
.._..._ - - -
..
...
.
--_.
"I'----
li;
~
-
~ ......... eJC = 2.2°C/W
--.-. _.
...
.9-
~
-
---~-
-
__ __
.
..
~
20
I---f---~--+-~-
9:
~
0.20
i
0.1S
75
50
~ 0.12
............
... - - I - -
125
100
1---1-\--+---+---+--_._-
~\ ~---
..
-
,....
- ..-.-
oII)
._---- - -
~
0::
~
0.08
()
0.04
"
o
25
._--
Tc=+25°C
0
0
I,l1\
0.24
::;
c;;
E
0.28
ISO
------~~=-'--.
o
--j---j--~I-~""""'r__,.---
---._. --.... -
~-~-~-~-~-~--~~
o
4
2
12
10
S
14
Ell
Limit Current (A)
Case Temperature (OC)
CJ)
a:
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CURRENT LIMIT vs TEMPERATURE
±7
"
.'"
()
±5
±4
~
±3
.c
15
±2
'"
±1
Q.
1.2
±S
~
1:
~
::J
NORMALIZED THERMAL RESISTANCE
vs FREQUENCY
r-r--
-
-50
1.0
-
o
-25
:E
I--
t--
o
/Rsc7 o.12Q
---r--
-
/Rsc= 0.28Q
25
I--
50
--
75
100
-0
€
O.B
c;;
E
0
z
..J
t--
"C
.~
«
«Z
o
~
a:
r-....
"
O.S
..
0.4
0.2
w
Q.
125
10
100
Freouencv (Hz)
0.1
Case Temperature (0C)
lk
10k
o
a:
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S
PULSE RESPONSE, Av = +1
~
PULSE RESPONSE,
"C
~
!1l.
!1l.
~
:>
i"
i"
i
g
~
~
;;
%
"
Co
.5
.5
Time (10iJSIdiv)
BURR - BROWN®
11511511
oQ.
Av = +1
Burr-Brown Ie Data Book-Linear Products
Time (100IJ.S/div)
3.2.37
/
For Immediate Assistance, Contact Your Local Salesperson
APPLICATIONS INFORMATION
Grounding techniques can greatly affect the perfonnance of
a power op amp. Figure I shows grounds connected so that
load current does not flow through signal ground connections. Power supply and load connections should be physically separated from the amplifier input and signal connections.
Power supply connections to the amplifier should be bypassed with 101JP tantalum capacitors connected close to the
device pins. The capacitors should be connected to load
ground as shown.
I
I
,FigUrti 2, shows the permissible range of voltage and current. SOA is reduced at high operating temperature-see
Figure 3.
The safe output current decreases as VCB increases. Output
short-circuits are a very demanding. A short-circuit to ground
forces the full power supply voltage (positive or negative
side) across the conducting transistor. With Vs = ±30V, the
current limit must be set for 2A to be safe for short-circuit
to ground. For further infonnation on SOA and evaluating
signal and load conditions, consult Applications Bulletin
AB-039.
HEAT SINKING
Most applications require a heat sink to assure that the
maximum junction temperature of 200°C is not exceeded.
The size of the heat sink required depends on the power
dissipated by the amplifier and ambient temperature conditions. Application Bulletin AB-039 explains how to fmd
maximum power dissipation for dc, ac, reactive loads, and
other conditions. Applications Bulletin AB-038 shows how
to detennine heat sink requirements.
Load
NOTE: (1) 1O~F Tantalum.
The case of the OPA501 is isolated from all circuitry and can
be fastened directly to a heat sink. This eliminates cumbersome insulating hardware that degrades thennal performance. See Applications Bulletin AB-037 for information
on mounting techniques and procedures.
10
8
6
4
FIGURE 1. Basic Circuit Connections.
._--
E
~
g.
::I
ILIMIT
0.4
-TJUNCTION
ILThm is the desired maximum current at room temperature in
Amperes and Rsc is in ohms. The current limit value decreases with increasing temperature-see typical performance curves. The current limit resistors conduct the full
amplifier output current. Power. dissipation of the current
limit resistors at maximum current is:
P MAX = (ItIMrd Rsc
The current limit resistors can be chosen from a variety of
types .. Most wire-wound types are satisfactory, although
some physically large resistors may have excessive inductance which can cause instability.
0.1
1\
Maximu"; tRM, AM
Specijied
Voltage
SM. BM
I-
J
I
4
6 8 10
20
40
60 80100
VoltaQe Across OutDut Transistor (V)
FIGURE 2. Transistor Safe Operating Area at +25°C Case
T~mperature.
10
8
6
4
0.5ms
5ms
.......
MaXimum
~
2
E
§
:;
Stress on the output transistor is detennined by the output
current and the voltage across the conducting output transistor. The power dissipated by the output transistor is equal to
the product of the output current and the voltage across the
conducting transistor, VCE' The Safe Operating Area (SOA),
I
1\1\
Second
Breakdown
Limit
1 1-
2
'-'
SAFE OPERATING AREA
i
,\1\
II
=
= +200°C-
°JC = 2T C
0.2
Power
Dissipation ~
Limit
_
I
I
1.0
::I
'-' 0.8 TCAS~ ~ +25°C':
:; 0.6
0
Rsc = 0.65 _ O. 04370
Specified
Current
~
Ims
0.5ms
Maximum -
CURRENT LIMITS
The OPA501 has independent positive and negative current
limit circuits. Current limits are set by the value of R+sc and
R-sC" The approximate value of these resistors is:
5m
DC
--T--t--
1.0
0.8
% 0.6
0
0.4
0.2
0.1
Specified
Current
'"
~c.,;;='".; 125'b
+200°C
i
TJUNCTtON ==
OJc=2TC
I
2
1
4
,\
Maximu~ tRM. AM
Specified
Voltage
I
Iriis'
"'<:!r-'<
r-....
DC
-
6
810
\
JSM. BM
20
40
60 80100
VoltaQe Across OuIDut Transistor (V)
FIGURE 3. Transistor Safe Operating Area at + 125°C Case
Temperature.
3.2.38
Burr-Brawn Ie Data Book-Linear Products
BURR--aN ®
lEa'
Or, Call Customer Service at 1-800-548-6132 (USA Only)
BURR-BROWN®
OPA502
IIIS:IIIS:II
N
o
In
~
High Current, High Power
OPERATIONAL AMPLIFIER
o
FEATURES
APPLICATIONS
C/)
• HIGH OUTPUT CURRENT: 10A
• MOTOR DRIVER
• WIDE POWER SUPPLY VOLTAGE:
±10Vto±4SV
• SERVO AMPLIFIER
• PROGRAMMABLE POWER SUPPLY
• USER-SET CURRENT LIMIT
• ACTUATOR DRIVER
• SLEW RATE: 10V/~
• AUDIO AMPLIFIER
• FET INPUT: 18 = 200pA max
• TEST EQUIPMENT
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«
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• CLASS AlB OUTPUT STAGE
• QUIESCENT CURRENT: 2SmA max
• HERMETIC T0-3 PACKAGE ISOLATED CASE
fi
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DESCRIPTION
The OPA502 is a high output current operational
amplifier designed to drive a wide range of resistive
and reactive loads. Its complementary class NB
output stage provides superior performance in
applications requiring freedom from crossover distortion. Resistor-programmable current limits provide
protection for botb tbe amplifier and tbe load during
abnormal operating conditions. An adjustable foldover
current limit can also be used to protect against
potentially damaging conditions.
The OPA502 employs a custom monolithic op ampl
driver circuit and rugged complementary output
transistors, providing excellent DC and dynamic
performance.
D.
o
a:
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~
D.
Bias
Circuit
+-_ _ _~--~1 Current
Sense
1--<~M/'~_....__8oQ -Output
Drive
The industry-standard 8-pin TO-3 package is electrically isolated from all circuitry. This allows tbe
OPA502 to be mounted directly to a heat sink witbout
cumbersome insulating hardware which degrade
tbermal performance. The OPA502 is available in
-40°C to +85°C and -55°C to +125°C temperature
ranges.
International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ B5734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602) 746-1111 • Twx: 91D-952-1111 • cable: BBRCORP • Telex: 066-6491 • FAX: (602) 889-1510 • Immediate Product Info: (800) 5~132
PDS-l\66A
3.2.39
For Immediate A$sistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
TCASE = +25"C, Vs = ±40V unless otherwise noted.
OPA502BM
CONDmON
PARAMETER
OFFSET VOLTAGE
Input Offset Voltage
vs Temperature
vs Power Supply
TYP
MAX
±5
74
±C.5
±5
92
200
Specilied Temp. Range
Vs =±10Vto±45V
INPUT BIAS CURRENTt')
Input Bias Current
Input Offset Current
VOM = OV
VOM= OV
12
±3
NOISE
Input VoHage Noise
Noise Density,
Current Noise DenSity,
1= 1kHz
1= 1kHz
25
3
INPUT VOLTAGE RANGE
Common·Mode Input Range, Posijive
Negative
Common-Mode Rejection
Linear Operation
Linear Operation
VcM =±35V
OPA502SM
MIN
(V+) -:0
(V-) +5
74
·
···
(V+)-4
(V-) +4
106
INPUT IMPEDANCE
Differential
Common·Mode
MIN
10 12 115
1012 114
OPEN·LOOP GAIN
Open· Loop Voltage Gain
At. = 6a
92
G=+10, RL =50a
66Vp-p, RL = 6a
5
Vo = ±34V,
FREQUENCY RESPONSE
Gain·Bandwidth Product
Slew Rate
Full-Power Bandwidth
Total Harmonic Distortion
G = +3, I = 20kHz
Vo =20V,RL =6Q
10= 10A
10=10A
10= 1A
10= 1A
POWER SUPPLY
Specified Operating Voltage
Operating VoHage Range
Quiescent Current
TEMPERATURE RANGE
Specification
Storage
Thermal Resistance, OJC
··
.
··
··
.
·
mV
IJ.V/"C
dB
pA
pA
fN;IHz"
··
·
V
V
dB
a II pF
allpF
·
dB
2.0
10
See Typical Curves
0.06
MHz
VlIJ.S
%
··
(V+) -j)
(V-) +6
(V+}--3.5
(V-) +3.6
(V+) -2.5
(V-) +3.1
See SOA Curves
Resistor Programmed
±20
-40
-:05
1.25
0.8
30
±45
±25
+85
+125
1.4
0.9
V
V
V
V
·
·
·
±40
±10
10=0
UNITS
nV/ ;1Hz"
I
I
See Figure 6
DC
ACf,,50Hz
No Heat Sink
9JA
MAX
103
Capacijive Load
OUTPUT
VoHage Output, Positive
Negative
Positive
Negative
Current Output
Short Circuit Current
TYP
V
V
mA
·
+125
-:65
·
·
"C
"C
"C/W
"C/W
"C/W
NOTE: (1) High·speed test at TJ = 25"C.
ORDERING INFORMATION
PACKAGE
TEMPERATURE RANGE
8-PlnTO-3
8·PinTQ.3
-4Q"C to +85°C
-:05°C to +125°C
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibilijy lor inaccuracies or omiSSions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the usefs own risk. Prices and specifications are subject to change
wHhout notice. No patent rights or lioenses to any 01 the circuits described herein are implied or granted to any third party. BURR·BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
BURR~BROWN@
3.2.40
Burr-Brown Ie Data Book-Linear Products
I EiI Eill
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Supply Voltage. V+ to V- ...................•.................._.............................. 90V
Output Current ......................................................_........... See SOA Curve
Input Voltage .............................................................. (V-) -IV to (V+)+1V
Case Temperature, Operating ......................................................... 150·C
Junction Temperature ........................................... _........... _.............. 200·C
T().3
Top View
PACKAGE INFORMATION(I)
MODEL
PACKAGE
PACKAGE DRAWING
NUMBER
OPA502BM
OPAS02SM
8-PinTO-3
8-PinTO-3
030
030
C\I
o
it)
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
~
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Ell
TYPICAL PERFORMANCE CURVES
en
a:
w
TCASE = +25°C, Vs == ±40V unless otherwise noted.
u::
CURRENT LIMIT vs TEMPERATURE
CURRENT LIMIT vs LIMIT RESISTOR
10
2.4
..
2.2
~'"
2.0
ICL
R
1.8
$
.E
+ICl
r--
r----
0.22
RCL = 5.00
--~.
r-----, • --~t-.,
...........
RCL =0.50
I""- I"'---
I
1.4
I"
I
0.10
-50
10
o
-25
OPEN-LOOP GAIN AND PHASE vs FREQUENCY
120
o
100
-45
l"l
t~
RL = 500
I"'-
R =4~"'
I ~ II I
20
1'\
--
--
10
100
lk
10k
50
0.18$
Z
0.16 -rj
0.14
0.12
0.10
75
100
125
~
I\,
\.
1
c
'"5
()
-180
...........
............
I I
'"
~
r---- Vs = ±10 to ±45V
I
I
r-----
~
i""--.. ....,
I
... ~
['...
c-.
lOOk
........
10
1M
10M
Frequency (Hz)
-50
-25
o
25
50
75
100
125
Case Temperature (·C)
BURR-BROWN<8
• EEl EEl, Burr-Brown Ie Data Book-Linear Products
0
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Q.
........
20
15
:;
II)
S
~
G=+10
RL=Sn
% 10
0
-25
25
50
75
Case Temperature (0C)
100
125
1_000
--+- --+---+-+-++H+---tt'--r-.",100k
Frequency (Hz)
10k
1M
en
0.
OUTPUT VOLTAGE SWING VB OUTPUT CURRENT
:E
++1+1+1-- ----
P = 100mW
Ell
a:
w
u:::
:::;
=
~{~~~!!II~~!II~~
G = +3
- RL=Sn
- Measurement --
o
_-THrio
TOTAL HARMONIC DISTORTION AND NOISE
vs FREQUENCY
4
P = 5W
(+Vs)
~ 0.100 ~=~B~WfjS~OijkHfz~=~'!II~I'III_HI-7'~
L----
0.010
o
0
-50
~
N
'------+---+---+-+-H\H+-- r_-
5
~
\
-
Q)
10
\
c--
30
------- - - -
12 ~--r----
~
FULL POWER RESPONSE
r---;----r---r--~---,----,-__,
14
Vo
,-
~'II~~/III~II"'IP~O~-~5~OW~
I Vsl
IVai
--
-1--
o
"'--,,"-"--'-Ju.I.I.,---,---"-.w..u.J.J.L..-...J.....J....J....C...u.JJU--J
20
100
1k
Frequency (Hz)
...I
---",,-0 Va
±20V
at 5A
~OV
FIGURE 9. Digitally Programmable Power Supply.
'151151'
BURR-BROWNI8I
3.2.48
Burr-Brown Ie Data Book-Linear Products
O~
Call Customer Service at 1-800-548-6132 (USA Only)
OPA512
N
....
Very-High Current-High Power
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
• WIDE SUPPLY RANGE: ±10V to ±50V
• SERVO AMPLIFIER
• HIGH OUTPUT CURRENT: 15A Peak
• MOTOR DRIVER
• SYNCRO EXCITATION
• CLASS AlB OUTPUT STAGE:
Low Distortion
It)
~
o
en
a:
w
u::
• AUDIO AMPLIFIER
• VOLTAGE-CURRENT LIMIT PROTECTION
CIRCUIT
• TEST PIN DRIVER
::i
n.
:E
The OPA512 employs a laser-trimmed monolithic
integrated circuit to bias the output transistors, providing excellent low-level signal fidelity and high output
voltage swing. The reduced internal parts count made
possible with this monolithic Ie improves performance and reliability.
...I
• SMALL TO-3 PACKAGE
DESCRIPTION
The OPA512 is a high voltage, very-high current
operational amplifier designed to drive a wide variety
of resistive and reactive loads. Its complementary
class AlB output stage provides superior performance
in applications requiring freedom from cross-over distortion. User-set current limit circuitry provides protection to the amplifier and load in fault conditions. A
resistor-programmable voltage-current limiter
circuit may be used to further protect the amplifier
from damaging conditions.
This hybrid integrated circuit is housed in a hermetic
TO-3 package and all circuitry is electrically-isolated
from the case. This allows direct mounting to a chassis
or heat sink without cumbersome insulating hardware
and provides optimum heat transfer.
«
«Z
o
ti
a:
w
n.
o
a:
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~
on.
_._------------.
4
+---___-+-...;...--------0---+-0 Out
Bias
5
Circuit
RCL_
~
RVI
~(Optional)
...J.....
6
-Vs
International Airport Industrial Pari< • Mailing Addreaa: PO Box 11400
Tucaon, AZ 85734 • Street Add....: 6730 S. Tucson Blvd. • Tucaon, AZ 85706
Tol:(602)746-1111 • Twx: 9111-952-1111 • Cablo:BBRCORP • Tolex:068-6491 • FAX:(602)889-1510 • ImmedlatePtoductlnfo:(BOO)548-6132
PDS-600B
3.2.49
For Immediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
At To = +2SoC, and V. = ±40V, unless otherwise noted.
OPA512BM
PARAMETER
CONDITIONS
MIN
INPUT OFFSET VOLTAGE
InHial Offset
vs Temperature
Specnied Temp. Range
vs Supply Voltage
vs Power
INPUT BIAS CURRENT
Initial
vs Temperature
Specfied Temp. Range
vs Supply Voltage
INPUT OFFSET CURRENT
Initial
vs Temperature
Specfied Temp. Range
INPUT IMPEDANCE, DC
GAIN
Open-Loop Gain at 10Hz
Gain-Bandwidth Product, I MHz
Power Bandwidth
Phase Margin
OUTPUT
VoHage Swing (1)
Current, Peak
Settling Time to 0.1 %
Slew Rate
CapacHive Load
POWER SUPPLY
Voltage
Current, Quiescent
THERMAL RESISTANCE
AC Junction-to-Case(3)
DC Junction-to-Case
Junction to Air
TEMPERATURE RANGE
Specified
MAX
±2
±IO
±30
±20
±65
±200
MIN
±6
12
±50
±IO
30
400
±12
±50
±30
IknLoad
Specified Temp. Range
8il Load
8il Load
8il Load
Specified Temp. Range
8il Load
BM at lOA, SM at ISA
Specified Temp. Range
10= SOmA
10=SA
±(IVsl-5)
74
±t
±3
±40
mV
IlVioC
IlVN
10
±S
·
IlVN
20
·
nA
pAf'C
±IO
nA
pAf'C
±(IVsl-3)
100
·
pAN
Mil
·
pF
··
V
dB
dB
108
4
20
13
·
20
·
dB
MHz
kHz
·
Degrees
±(IV.I-6)
±(IV.I-7)
V
±(Il1sl-S)
±(IV.I-5)
10
15
··
V
V
A
2.5
2
4
Specified Temp. Range
G=I
Specified Temp. Range
G> 10
·
··
JlS
V/JlS
1.5
nF
SOA")
±IO
To =~5°Cto +1 25°C,
f>60Hz
To=~5°CtO+125°C
To=~OCto+125°C
To
UNITS
110
96
2V Step
Specified Temp. Range
MAX
·
·
3
Specified Temp. Range
Specified Temp. Range
TYP
·
200
INPUT CAPACITANCE
VOLTAGE RANGE
Common-Mode Voltage
Common-Mode Rejection
OPA512SM
TYP
-25
±40
25
±45
50
0.8
1.25
30
0.9
1.4
+85
·
··
·
~5
±50
35
··
+125
V
rnA
°CIW
°CIW
°CIW
°C
'Spec~ication
same as OPASI2BM.
NOTES: (I) +V. and -Vs denote the postive and negative supply voltage, respectively. Total V. is measured Irom +Vs to -Vs' (2) SOA = Safe Operating Area.
(3) Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
The Information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibilHy for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notioe. No petent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devioes andlor systems.
BURR-BROWN~
3.2.50
Burr-Brown Ie Data Book-Linear Products
I EilEiII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAM
Supply Voltage, +V,to -V, ................................................................. 100V
Output Current: Source ........................................................................ 15A
Sink .................................................................... see SOA
Power Dissipation, Internal"' ............................................................. 125W
Input Voltage: Differential ......................................................... ±(lV,1- 3V)
Common-mode ............................................................. ±Vs
Temperature: Pins (soldering, 1as) ................................................ +300'C
Top View
Junction(1) ................................................................ +2000C
Temperature Range: Storage"' ....................................... ~5'C to +150'C
Operating (Case) .......................... ~'C to +125'C
NOTES: (1) Long term operation at the maximum junction temperature will
result in reduced product life. Derate internal power dissipation to achieve
high MTIF. (2) OPA512BM, -55Q C to +100'C.
ORDERING INFORMATION
MODEL
PACKAGE
TEMPERATURE RANGE
OPA512BM
OPA512SM
8-pin TO-3
8-pin TO-3
-25'C to +85'C
-55'C to + 125'C
PACKAGE INFORMATION(1)
MODEL
PACKAGE
PACKAGE DRAWING
NUMBER
OPA512BM
OPA512SM
8-PinTO-3
8-PinTO-3
030
030
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
BURR ... ·BROWN®
I EiI Eill
Burr-Brown Ie Data Book-Linear Products
3.2.51
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
T. = 25°C,
v. = ±4OVDC, unless otherwise noted.
BIAS CURRENT
POWER DERATING
2.5
140
~
...!!'
2.2
i\
\\
E 1.9
...........
~
::I
I'-..
()
..,~
~
BM
SM
1.6
\
1.3
iE
1.0
z
0.7
""- I'-..
!;
~
0.4
o
20
80
100
60
Case Temperature, Tc (OC)
40
120
-50
140
t
10.0
~
<3
100
:!!.
80
"
60
<
·iii
Cl
7.5 1----+.--:,J.----+---4-.........ji-=""-k---l
5.0
2.5~A===S~
o
g.
i
a.
-25
25
75
50
100
"
40
20
0
~_~_~_~_~_~~_~_~
--50
"'"I'" "-
Ii
-120
if
-150
--50
-90
125
10
100
lk
10k
lOOk
1M
Frequencv, f (Hz)
,-
100
68
"'
\>46
~
........
125
"'r-....
PHASE RESPONSE
-
""'" "
-20
Case Temperature, Tc (OC)
~O
100
SMALL SIGNAL RESPONSE
ill
~
~
75
50
120
15.0 1----+---l----+.---4-.........jf--+_---I
12.5
25
Case Temperalure, Tc (OC)
CURRENT LIMIT
17.5 ,..--..,---,----r----r---,---r-----,
$
-25
::!'
t\. .........
-180
10M
POWER RESPONSE
........
I+Vsl + I-V.I
r-...
= 100V
=80V
.........I+Vsl + I-V.I
['-.....,
32
........
j22
~
'"
o
I+Vsl + I-V.I
> 15
I'....
=30V
i'-..
"S
% 10
o
....
6.8
4.6
-210
1
10
100
lk
10k
Frequency, f (Hz)
lOOk
1M
10M
10
20
30
50
70
100
Frequency, f (kHz)
BURR~BROWNIBI
3.2.52
Burr-Brown Ie Data Book-Linear Products
I EaEaI
Or, Call Cuslomer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
T. = 25°C, V, = ±40VDC, unless otherwise noted.
COMMON-MODE REJECTION
.-.
--
PULSE RESPONSE
8
Y'N = ±5V, tR = t oons
-t--+--+--
6
~,,--t---I
~
I
lk
10k
lOOk
--f-----j.-.- - - -
-.-Lt:=j:::=t==+==\-~
j--\ -
4
N
,...
I--f-.+I+-+---+--+--H\,---f---
0
i
o
100
~--~~--~--~---r---r--'-~
'I
-2
-4
It)
\
~
~
1--r-----j-~--+-_+----r-~---1
~
L-~
__
~
o
1M
__
~
__
4
2
Frequency, f (Hz)
~
__
L_~~~
6
8
10
_ _~
12
Time, t(~.)
o
III
en
a:
INPUT NOISE
HARMONIC DISTORTION
100
~
3 .---'---~----~---r--~r---,
:>
.s
50
>
40 I-----
z
ai
f
3l
z
'0
G=10
.......
70
"---
30 f-------
"'"
f-----"""
I~
20 f - - - - - - t------
1-----t---t----7"'=------:+c:------::;t4---'-i
0.3
~
~
........
'5
c.
.5
o
i'--
o
100
Ik
10k
0.03 1--""74----:;~'---+r--+----+----I
0.01
L-_-'---"":.........I..-__--'-___.l.-__---'-_---'
100
lOOk
«
«
Z
o
~
a:
..J
0.1
0.003
10
w
ii:
::::i
0..
:E
300
Ik
3k
10k
30k
lOOk
Frequency, f (Hz)
Frequency, f (Hz)
w
0..
o
1.6
1.4
----r----.,-----r----,-----,......---,
r,
--
~---~-
i
.~
1.0
E
z0
0.8
0.6
-
0.4
I
_._--
Te~-25OC
-
.2 1.2
iii
a:
w
3::
OUTPUT VOLTAGE SWING
QUIESCENT CURRENT
-
40
-
+25°C
Te
-
Te = +85°9...-
c...--- f-.-- r--Te -
+125°C
I
~
5
1---+---+-----1
~E
4
I----+---+----+-~~~-~
i
J:
~ 3 1-~~~~-+--~~~-+----1
[!l,
~
g
2 ~~-+---+---+---+-----I
I
50
60
70
80
90
100
Total Supply Voltage, V. (V)
o
3
6
9
12
15
Output Current, 10 (A)
BURR-BROWN®
I E!lE!II
Burr-Brown Ie Data Book-Linear Products
3.2.53
o0..
For Immediate Assistance, Contact Your Local Salesperson
APPLICATIONS INFORMATION
POWER SUPPLIES
15
Specifications for the OPA5l2 are based on a nominal
operating voltage of ±40V. A single power supply or unbalanced supplies may be used as long as the maximum total
operating voltage (total of +Vs and -Vs) is not greater than
90V (lOOV for OPA5l2SM model.)
....... r-.,
~ Thermal Limil
10
8
t=5ms
6
t~ 1ms
5
4 =Tc-+125°C~""'"
....... t'- O.5mS\:~
~
3
III
~
.......
.........
E
2 ,_+__ Tc = ~25°C
jg
'::.
~
::I
1.5
(,)
Tc = +85°C~
:;
1
0.8
::I
I \I \
,r-,
. . . . r-... .......
.s-
CURRENT LIMITS
0
Current limit resistors must be provided for proper operation. Independent positive and negative current limit values
may.be selected by choice of R"u. and ReL-' respectively.
Resistor values are calculated by:
RCL = 0.651Iu.. (amps) -D.OO7
This is the nominal current limit value at room temperature.
The maximum output current decreases at high temperature
as shown in the typical performance curve. Most wirewound resistors are satisfactory, but some highly inductive
types may cause loop stability problems. Be sure to evaluate
performance with the actual resistors to be used in production.
HEAT SINKING
Power amplifiers are rated by case temperature (not ambient
temperatnre.) The maximum allowable power dissipation is
a function of the case temperature as shown in the power
derating curve. Load characteristics, signal conditions, and
power supply voltage determine the power dissipated by the
amplifier. The case temperatnre will be determined by the
heat sinking conditions. Sufficient heat sinking must be
provided to keep the case temperature within safe bounds
given the power dissipated and ambient temperature. See
Application Bulletin AB-038 for further details.
s~nda~ B7ak1o~n f\,
0.5
0.4
0.3
0.2
5
6 7 8 910
15 20
40
60
VollaQe Across Output Transistor (V)
80 100
FIGURE 1. Safe Operating Area.
under normal load conditions. Sensing both the output current and the output voltage, this limiter circuit increases the
current limit value as the output voltage approaches the
power supply voltage (where power dissipation is low.) This
type of limiting is achieved by connecting pin 7 through a
programming resistor to ground. The V-I limiter circuit is
governed by the equation:
0.28 Vo
0.65 + 20+~
ILIMIT
=-----RCL + 0.007
where:
ILIMIT is the maximum current available at a given output
voltage.
RvI is the value (kO) of the resistor from pin 7 to ground.
RCL is the current limit resistor in ohms.
V 0 is the instantaneous output voltage in volts.
SAFE OPERATING AREA (SOA)
The safe area plot provides a comprehensive summary of the
power handling limitations of a power amplifier, including
maximum current, voltage and power as well as the secondary breakdown region (see Figure.) It shows the allowable
output current as a function of the power supply to output
voltage differential (voltage across the conducting power
device.) See Application Bulletin AB-039 for details on
SOA.
Reactive or EMF-generating loads may produce unusual
(perhaps undesirable) waveforms with the V-I limit circuit
driven into limit. Since current peaks in a reactive load do
not align with the output voltage peaks, the output waveform
will not appear as a simple voltage-limited waveform.
Response of the load to the limiter, in fact, may produce a
"backfire" reaction producing unusual output waveforms.
VOLTAGE-CURRENT LIMITER CIRCUITRY
The voltage-current (V-I) limiter circuit provides a means to
protect the amplifier from SOA damage such as a short
circuit to ground, yet allows high output currents to flow
3.2.54
Burr-Brown Ie Data Book--Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BROWN®
OPA541
I~~I
High Power Monolithic
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
• POWER SUPPLIES TO ±40V
en
a:
• MOTOR DRIVER
• OUTPUT CURRENT TO 10A PEAK
w
i!
::J
c..
:E
• SERVO AMPLIFIER
• SYNCHRO EXCITATION
• PROGRAMMABLE CURRENT LIMIT
• INDUSTRY·STANDARD PIN OUT
• AUDIO AMPLIFIER
• PROGRAMMABLE POWER SUPPLY
• FET INPUT
• TO·3 AND LOW-COST POWER PLASTIC
PACKAGES
DESCRIPTION
The OPA541 is a power operational amplifier capable
of operation from power supplies up to ±40V and
delivering continuous output currents up to SA. Internal current limit circuitry can be user-programmed
with a single external resistor, protecting the amplifier
and load from fault conditions. The OPA541 is fabricated using a proprietary bipolar/FET process.
Pinout is compatible with popular hybrid power amplifiers such as the OPA511, OPA512 and the 3573.
The OPA541 uses a single current-limit resistor to set
both the positive and negative current limits. Applications currently using hybrid power amplifiers requiring two current-limit resistors need not be modified.
The OPA541 is available in an ll-pin power plastic
package and an industry-standard 8-pin TO-3 hermetic package. The power plastic package has a copper-lead frame to maximize heat transfer. The TO-3
package is isolated from all circuitry, allowing it to be
mounted directly to a heat sink without special insulators.
c:(
...I
c:(
Z
o
fi
a:
w
c..
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==
Current
Sense
Output
Drive
External
L-------~~----~~-+------------~--~--_c-vs
International Airport Industrial Park • Mailing Address: PO Box 11400
Tel: (602) 746-1111 • Twx: 91D-952·1111 • cable: BBRCORP •
• Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Telex: 066-6491 • FAX: (602) 889-1510 • Immediate Product Info: (BOO) 548-6132
PDS·737G
3.2.55
For Immediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
s= ±35VDC unless otherwise noted.
At Tc= +25"C and V
OPA541BMlSM·
OPA541AM1AP
PARAMETER
INPUT OFFSET VOLTAGE
Vos
vs Temperature
vs Supply Voltage
vs Power
CONOmONS
MIN
Specified Temperature Range
Vo = ±IOV to ±VMA>(
INPUT BIAS CURRENT
I.
INPUT OFFSET CURRENT
los
TYP
MAX
±2
±20
±2.5
±20
±10
±40
±IO
±SO
4
50
±I
±30
5
Specified Temperature Range
INPUT CHARACTERISTICS
Common-Mode Voltage Range
Common-Mode Rejection
Input Capacitance
Input Impedance, DC
GAIN CHARACTERISTICS
Open Loop Gain at 10Hz
Gain-Bandwidth Product
OUTPUT
Voltage Swing
Specilied Temperature Range
V"" = (I±Vol- 6V)
±(IV.I- 6)
95
±(IVol-3)
113
5
1
R, = 6n
90
97
1.6
10 = SA, Continuous
10= 2A
10= 0.5A
±(IV01 - 5.5)
±(IV01- 4.5)
±(IVol-4)
9
±(IV01 - 4.5)
±(IVol- 3.6)
±(lV.I-3.2)
10
6
45
55
Current, Peak
AC PERFORMANCE
Slew Rate
Power Bandwidth
Settling Time to 0.1 %
Capacitive Load
Phase Margin
POWER SUPPLV
Power Supply Voltage, ±Vo
Current, Quiescent
THERMAL RESISTANCE
0JC (Junction-to-Case)'"
oJC0'
0,. (Junction-to-Ambient)
OPA541 AP (PlastiC)
TEMPERATURE RANGE
TCASE
R, = 8n, Vo = 20Vrms
2V Step
Specified Temperature Range, G = 1
Specilied Temperature Range, G >10
Specified Temperature Range, R, = an
3.3
Specified Temperature Range
±IO
MAX
UNITS
±O.1
±15
±1
±30
mV
I1VI"C
I1VN
I1VIW
·
·
··
·
··
··
··
··
SOA'"
40
±35
25
·
pA
nA
dB
MHz
·
·
V
V
V
A
··
VlIlS
kHz
IlS
nF
·
· ·
· ·
±35
±40
Degrees
V
mA
"CIW
"CIW
"CIW
"CIW
2.5
3
40
40
-25
pA
V
dB
pF
Tn
·
10
±30
20
TYP
··
·
2
AC Output I > 60Hz
DC Output
No Heat Sink
AM, BM, AP
SM
MIN
+85
·
-55
·
+125
"C
"C
• Specification same as OPA54IAMlAP.
NOTE: (I) SOA is the Sale Operating Area shown in Figure I. (2) Plastic package may require insulator which typically adds I"CIW.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility lor inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the use(s own risk. Prices and specilications are subject to change
without notice. No patent rights or licenses to any olthe circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize "rwarrant
any BURR-BROWN product lor use in IIle support devices andior systems.
BURR-BRbWN®
3.2.56
Burr-Brown Ie Data Book-Linear Products
IE!lE!lI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
DICE INFORMATION
PAD
FUNCTION
PAD
NC
11
12
13
14
lS
16
17
18
19
20
21
-V,
-V,
-V,
-V,
2
3
4
S
6
7
8
9
10
NC
-In
+In
NC
NC
FUNCTION
NC
Current Sense
+V,
+Vs
+Vs
+Vs
Current Sense
Output Drive
Output Drive
Output Drive
Output Drive
NOTE: For full output current capability, wire-bond all like connections of + V.,
-Vs and Output Drive.
Substrate Bias: Electrically connected to -V, supply.
MECHANICAL INFORMATION
Die Size
Die Thickness
Min. Pad Size
MILS (0.001 ")
MILLIMETERS
213x20S±S
20±3
4x4
S.41 x S.21 ±0.13
O.Sl iO.08
0.1 xO.l
C/)
Chromium-Silver
Backing
a:
w
u::
:::i
Q.
:E
CONNECTION DIAGRAMS
T0-3
Top View
Top View
Plastic Package
c.
.E
" UJ
rn..
-Gain
30
0.001
25
50
75
100
1
10
100
10k
lk
lOOk
NORMALIZED QUIESCENT CURRENT
VB TOTAL POWER SUPPLY VOLTAGE
OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
.2 1.1
--------- ----- -Tc =-25°C
~
0.8
(+VB)-VO
,;.-
~ 4
V
~
l--- -;:;:+25°C
l---
0.9
5
§
.,,/
~
r
3
~
2
v::
-------
10M
v
V
V
I-Vsl-IVol
V
r-;:;; =+125°C
0.7
V I--V I-/"'"
, / r-
I---'
0.6
20
40
30
50
60
70
80
o
90
o
2
3
456
7
8
+Vs + I-Vsl (V)
lour (A)
VOLTAGE NOISE DENSITY
VB FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
VB FREQUENCY
1R
9
10
10
lk _ _
l
r-
Q)
.!Il
z0
0.1
+
1=
0
:I:
f-
Po -l00mW
IIII
Po -5W
I-'""
0.01
100
lk
FreQuencv (Hz)
10k
lOOk
,.,Po = SOW
Av=..JS
IIIIIII
0.001
10
10
100
lk
10k
lOOk
Frequency (Hz)
BURR-BROWNI!!
3.2.58
Burr-Brown Ie Data Book-Linear Products
i
e.~
j
1M
6
....-V-
-135
-180
'1\
N.lll
Frequency (Hz)
---
-90
~
I
I
Temperature (OC)
._-
1.2
o
I
ZL,~3:3~~*
125
1.3
III
ZL -2kO
-10
-25
l
I
ZL =2kO
t-..
10
./
ill
III
ZL = 3.3nF
./
0.01
i
III
50
Q)
./
0.1
Phase
c::
'01
0
-
III I
l'
111
:s!. 70
./
§
III I
90
./
I ElEII
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
T, = +25 C, Vs =±35VDC unless otherwise noted.
Q
CURRENT LIMIT
vs RESISTANCE LIMIT
CURRENT LIMIT vs RESISTANCE LIMIT
vs TEMPERATURE
10~~~~~~~~~P±fHIm
1:::-... ~J1'1- ~power ~Iastic . e:-c.:1- TO-3
10
-r--
f-- -+-+-++++++- ~c--- J,;;;:~
~~~~~~~~~~~~~~~
tJ-=LL~
:;~~ Power Plastic at 25'C - I J=:-2 I I_I_~~ l.xc~ '<---. Power Plastic at +S5'C
.:
.._ TO-3 at -25 C I~
f--+-+-+++I-H
,...
____ ..
~cT01~_-T3"iat-l+S'T5n'CTt:--o:.~-l'f-~~,..x·,N-
- ..--
III::t
In
~
0
0.01
10
Ell
0.1
RCL (0)
10
RCL (0)
en
IX:
W
COMMON-MODE REJECTION
vs FREQUENCY
DYNAMIC RESPONSE
120
- -----.- -'-1&-
"1-
110
i --.---
I'
i'i
.2
f-
t--
SO l'-
I'
70
1J,
~
--
60
~_
-
__
:iE
-r----i-I-t---r--
J
-/ft-~r-----t---
1
II
---- ~--,-r---
-- ---t----t-..1--Ti--t-..1
J"::.r-
10
100
lk
10k
Frequency (Hz)
lOOk
0w
a..
BURR~BROWN®
I ~~I
Burr-Brown Ie Data Book-Linear Products
3.2.59
For Immediate Assistance, Contact Your Local Salesperson
INSTALLATION
INSTRUCTIONS
POWER SUPPLIES
The OPAS41 is specified for operation from power supplies
up to ±40V. It can also be operated from unbalanced power
supplies or a single power supply, as long as the total power
supply voltage does not exceed SOY. The power supplies
should be bypassed with low series impedance capacitors
such as ceramic or tantalum. These should be located as near
as practical to the amplifier's power supply pins. Good
power amplifier circuit layout is, in general, like good high
frequency layout. Consider the path of large power supply
and output currents. Avoid routing these connections near
low-level input circuitry to avoid waveform distortion and
oscillations.
CURRENT LIMIT
Internal current limit circuitry is controlled by a single
external resistor, RCL ' Output load current flows through this
external resistor. The current limit is activated when the
voltage across this resistor is approximately a base-emitter
turn-on voltage. The value of the current limit resistor is
approximately:
(AM, BM, SM)
(AP)
R = O.S09 _ 0.OS7
CL
I~I
R = 0.S13 _ 0.02
CL
IIUM1
Because of the internal strncture of the OPAS41, the actual
current limit depends on whether current is positive or
negative. The above RcLgives an average value. For a given
~, +IoUT will actually be limited at about 10% below the
expected level, while -~UT will be limited about 10% above
the expected level.
The current limit value decreases with increasing temperature due to the temperature coefficient of a base-emitter
junction voltage. Similarly, the current limit value increases
at low temperatures. Current limit versus resistor value and
temperature effects are shown in the Typical Performance
Curves. Approximate values for ~L at other temperatures
may be calculated by adjusting ~ as follows:
LiRCL = -2mV X (T - 2S)
l~lMl
The adjustable current limit can be set to provide protection
from short circuits. The safe short-circuit current depends on
power supply voltage. See the discussion on Safe Operating
Area to determine the proper current limit value.
Sinusoidal outputs create dissipation according .to rills load
current. For the same ~, AC peaks would still be limited
to SA, but rms current would be 3.SA, and a current limiting
resistor with a lower power rating could be used. Some
applications (such as voice amplification) are assured of
signals with much lower duty cycles, allowing a current
resistor with a low power rating. Wire-wound resistors may
be used for R CL. Some wire-wound resistors, however, have
excessive inductance and may cause loop-stability problems. Be sure to evaluate circuit performance with resistor
type planned for production to assure proper circuit operation.
HEAT SINKING
Power amplifiers are rated by case temperature, not ambient
temperature as with signal op amps. Sufficient heat sinking
must be provided to keep the case temperature within rated
limits for the maximum ambient temperature and power
dissipation. The thermal resistance of the heat sink required
may be calculated by:
Commercially available heat sinks often specify their thermal resistance. These ratings are often suspect, however,
since they depend greatly on the mounting environment and
air flow conditions. Actual thermal performance should be
verified by measurement of case temperature under the
required load and environmental conditions.
No insulating hardware is required when using the TO-3
package. Since mica and other similar insulators typically
add approximately 0.7°C/W thermal resistance, their elimination sigruticantly improves thermal performance. See BurrBrown Application Note AN-S3 for further details on heat
sinking. On the power plastic package, the metal tab is
connected to -Vs' and appropriate actions should be taken
when mounting on a heat sink or chassis.
SAFE OPERATING AREA
The safe operating area (SOA) plot provides comprehensive
information on the power handling abilities of the OPAS41.
It shows the allowable output current as a function of the
voltage across the conducting output transistor (see Figure
1). This voltage is equal to the power supply voltage minus
the output voltage. For example, as the amplifier output
swings near the positive power supply voltage, the voltage
across the output transistor decreases and the device can
safely provide large output currents demanded by the load.
Since the full load current flows through ~, it must be
selected for sufficient power dissipation. For a SA current
limit on the TO-3 package, the formula yields an ~ of
0.IOS0 (0.1430 on the power plastic package due to different internal resistances). A continuous SA through 0.IOS0
would require an ~ that can dissipate 2.62SW.
ElURR-BROWN~
3.2.60
Burr-Brown Ie Data Book-Linear Products
IE5IE5II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
APPLICATIONS CIRCUITS
SAFE OPERATING AREA
__. _______ -+_+++++l_ _+-AP,AM
0_1
Inductive or
BI'~t
L
'--_--'---'--'-l...J....I...I..J..I.-_--'---'--'-l...J....I....L.U
10
EMF-Generating
Load
100
IVs - Vourl (V)
0, - 0,: IN4003
FIGURE 1. Safe Operating Area.
Short circuit protection requires evaluation of SOA. When
the amplifier output is shorted to ground, the full power
supply voltage is impressed across the conducting output
transistor. The current limit must be set to a value which is
safe for the power supply voltage used. For instance, with Vs
±35V, a short to ground would force 35V across the conducting power transistor. A current limit of 1.8A would be safe.
FIGURE 2. Clamping Output for EMF-Generating Loads.
::::i
Il.
::i
R,
10kll
«
...I
«Z
o
~
a:
V"o--"WIr--i
w
Il.
o
FIGURE 3. Isolating Capacitive Loads.
Rr.t+
Not Required
Pin 2 is "open" on OPA541.
FIGURE 4. Replacing OPA501 with OPA541.
Because one resistor carries the current previously carried
by two, the resistor may require a higher power rating.
Minor adjustments may be required in the resistor value to
achieve the same current limit value. Often, however, the
change in current limit value when changing models is small
compared to its variation over temperature. Many applications can use the same current limit resistor.
BURR-BROWN®
I EiI Eill
a:
w
u:::
Reactive, or EMF-generating, loads such as DC motors can
present difficult SOA requirements. With a purely reactive
load, output voltage and load current are 90° out of phase.
Thus, peak output current occurs when the output voltage is
zero and the voltage across the conducting transistor is equal
to the full power supply voltage. See Burr-Brown Application Note AN-123 for further information on evaluating
SOA.
REPLACING HYBRID POWER AMPLIFIERS
The OPA541 can be used in applications currently using
various hybrid power amplifiers, including the OPA50l,
OPA5 11 , OPA5l2, and 3573. Of course, the application
must be evaluated to assure that the output capability and
other performance attributes of the OPA541 meet the necessary requirement. These hybrid power amplifiers use two
current limit resistors to independently set the positive and
negative current limit value. Since the OPA541 uses only
one current limit resistor to set both the positive and negative
current limit, only one resistor (see Figure 4) need be
installed. If installed, the resistor connected to pin 2 (TO-3
package) is superfluous, but it does no harm.
en
Burr-Brown Ie Data Book-Linear Products
3.2.61
Iffi
~
Il.
For Immediate Assistance, Contact Your Local Salesperson
+35V
+60V
25kn
O-SOV
V'N 0--1-----1
R,
2.5kQ
During Slewing
Av
--35V
FIGURE
5~
= 1 + R 2 /R, = 5
FIGURE 6. Programmable Voltage Source.
Paralleled Operation, Extended SOA.
+35V
+15V
+
I1~F
Digital Word
Input r-__--'-1.:..8_ _..1..-23-'--_-.....
1
MSB
2
3
4
VOUT =
-1l0V to
+30V
5
£[ 1~F
6
7
8
-1l5V
DAC702
9
10
+15V
11
12
+
I1~F
13
14
15
16
LSB
10kn'
'TCR
19
20
Tracking
Resistors
-15V
5kn'
FIGURE 7. 16-Bit Programmable Voltage Source.
3.2.62
Burr-Brown Ie Data Book-Linear Products
aURR-m®
I EiI~
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BROWN@
OPA544
1e.e.1
High-Voltage, High-Current
OPERATIONAL AMPLIFIER
FEATURES
DESCRIPTION
UJ
• HIGH OUTPUT CURRENT: 2A min
The OPA544 is a high-voltagelhigh-current operational amplifier suitable for driving a wide variety of
high power loads. High perfonnance PET op amp
circuitry and high power output stage are combined on
a single monolithic chip.
:E
The OPA544 is protected by internal current limit and
thermal shutdown circuits.
....I
• WIDE POWER SUPPLY RANGE:
±10to±35V
• SLEW RATE: 8V/IlS
• INTERNAL CURRENT LIMIT
• THERMAL SHUTDOWN PROTECTION
• FET INPUT: 19 = 100pA max
• 5·PIN T0-220 PLASTIC PACKAGE
APPLICATIONS
The OPA544 comes in an industry-standard 5-pin
TO-220 package. Its copper tab allows easy mounting
to a heat sink for excellent thennal perfonnance. It is
specified for operation over the extended industrial
temperature range, -40°C to +85°C.
a:
w
u:::
~
a.
50Hz
DC
No Heat Sink
±35
±15
2.7
3
65
V
V
mA
°C
°C
°C/W
°C/W
°C/W
NOTES: (1) High-speed test at TJ = 25°C.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility lor inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this Information, and all use 01 such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any 01 the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product lor use in life support devices andlor systems.
aURR-BROW'N®
3.2.64
Burr-Brown Ie Data Book-Linear Products
I E!lE!II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
DICE INFORMATION
PAD
FUNCTION
1
2
3A, 3B, 3C
4A,4B
SA,SB, SC
+In
-In
VVo
V+
Substrate Bias: Internally connected to
V- power supply.
MECHANICAL INFORMATION
Die Size
Die Thickness
Min. Ped Size
MILS (0.001 '1
MILLIMETERS
1S9x 162±S
20±3
4x4
4.04x4.11 ±0.13
0.S1 ±O.OS
0.1 xO.1
Chromium-Silver
Backing
(JJ
a:
w
u::
:::l
0..
OPA544 DIE TOPOGRAPHY
:i
0:
~
Co
Co
"li;
V-Supply
60
...
.......
r"
r-..
r-.
GBW
..............
- Y r-....
V+Supply
"-
80
I II
I II
I'
.....
2.5
......
SR+
:"-
~..-
t:--
L
SR-
rn
~
d?
- r--.
i'.
40
"-
20
1
10
100
lk
10k
lOOk
0.5
-75
1M
-50
-25
25
50
75
100
125
Ell
C/)
Temperature (OC)
Frequency (Hz)
IX
w
u::
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
10
35
Clipping
30
~
I>"
i
0
~
25
2W
~
20
100mW
RL -150
Slew Rate
Limited
z
~
15
:r:
t-
"I'
10
i'-........
0
20k
lOOk
-
0.001
200k
./
..-
0.01
---
~
,..
~
~
:J
c..
:E
30W
W
20
100
10k 20k
lk
Frequency (Hz)
Frequency (Hz)
c..
o
IX
W
~
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
5
--
4
~
1;
.,g
/'
I
1
~
I
1----+---- -.....
I
I
10= +2A
-
-.J...
_ _ lo=-2A
- - --
"7_
-r
I(V-)-Vol
2
c..
OUTPUT VOLTAGE SWING vs TEMPERATURE
10= +0.5A
~
10=-{)·5A
.. ...... . ....... 1---
-_.+---1----+--+---1._OL-_-'-_--'_ _-'-_--'-_ _"'--_.....
o
o
-75
Output Current (A)
-50
-25
0
25
50
75
100
125
Temperature (0G)
BURR~BROWN®
11'511'511
Burr-Brown Ie Data Book-Linear Products
3.2.67
For Immediate Assistance, Contact Your Loca/Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
TCASE"" +25°C, Vs= ±35V unless otherwise noted.
SMALL SIGNAL RESPONSE
G=3,CL =lnF
LARGE SIGNAL RESPONSE
G=3,RL =I5n
SVidiv
S~s/div
APPLICATIONS INFORMATION
Figure 1 shows the OPA544 connected as a basic noninverting amplifier. The OPA544 can be used in virtually
any op amp configuration. Power supply terminals should be
bypassed with low series impedance capacitors. The technique shown, using a ceramic and tantalum type in parallel
is recommended. Power supply wiring should have low
series impedance and inductance.
the conducting transistor. With Vs = ±35V the safe output current
is 1.5 (at 25°C). The short-circuit current is approximately 4A
which exceeds the SOA. This situation will activate the thermal
shutdown circuit in the OPA544. For further insight on SOA,
consult Application Bulletin AB-039.
SAFE OPERATING AREA
10
Current-Limiled
4
+3SV
J
$
v+
~
Output current may
be limited to less
'than 4A-see text.
u"
io
.......
r-..
-=:b.
,....... T, -2SOC
>r-..
Te
8SoC
0.4
"
/
T e =12SoC
I
0.1
2
S
10
20
so
100
FIGURE 2. Safe Operating Area.
CURRENT LIMIT
V-
-35V
FIGURE 1. Basic Cjrcuit Connections.
SAFE OPERATING AREA
Stress on the output transistors is determined by the output
current and the voltage across the conducting output transistor, V CE' The power dissipated by the output transistor is
equal to the product of the output current and the voltage
across the conducting transistor, V CE' The Safe Operating
Area (SOA curve, Figure 2) shows the permissible range of
voltage and current.
The safe output cmrent decreases as VCE increases. Output shortcircuits are a very demanding case for SOA. A short-circuit to
ground forces the full power supply voltage (V+ or V-) across
The OPA544 has an internal current limit set for approximately 4A. This current limit decreases with increasing
junction temperature as shown in the typical curve, Current
Limit vs Temperature. This, in combination with the thermal
shutdown circuit, provides protection from many types of
overload. It may not, however, protect for short-circuit to
ground, depending on the power supply voltage, ambient
temperature, heat sink and signal conditions.
POWER DISSIPATION
Power dissipation depends on power supply, signal and load
conditions. For dc signals, power dissipation is equal to the
product of output current times the voltage across the conducting output transistor. Power dissipation can be minimized by using the lowest possible power supply voltage
necessary to assure the required output voltage swing.
BURR.,BROWN~
3.2.68
Burr-Brown Ie Data Book-Linear Products
I EI Ell
Or, Call Customer Service at 1·800·548·6132 (USA Only)
For resistive loads, the maximum power dissipation occurs
at a dc output voltage of one-half the power supply voltage.
Dissipation with ac signals is lower. Application Bulletin
AB-039 explains how to calculate or measure power dissipation with unusual signals and loads.
shows an output series RIC compensation network (IQ in
series with O.OIIJF) which generally provides excellent stability. Some variation in circuit values may be required with
certain loads.
HEATSINKING
Some applications do not require equal positive and negative
output voltage swing. The power supply voltages of the
OPA544 do not need to be equal. For example, a ~V
negative power supply voltage assures that the inputs of the
OPA544 are operated within their linear common-mode
range, and that the output can swing to OV. The V+ power
supply could range from 15V to 65V. The total voltage (Vto V+) can range from 20V to 70V. With a 65V positive
supply voltage, the device may not be protected from damage during short-circuits because of the larger VCE durin~
this condition.
~
UNBALANCED POWER SUPPLIES
Most applications require a heat sink to assure that the
maximum junction temperature is not exceeded. The heat
sink required depends on the power dissipated and on
ambient conditions. Consult Application Bulletin AB-038
for information on determining heat sink requirements.
THERMAL PROTECTION
The OPA544 has thermal shutdown that protects the amplifier from damage. Any tendency to activate the thermal
shutdown circuit during normal operation is indication of
excessive power dissipation or an inadequate heat sink.
The thermal protection activates at a junction temperature of
approximately I55'C. For reliable operation, junction temperature should be limited to I50'C, maximum. To estimate
the margin of safety in a complete design (including heat
sink), increase the ambient temperature until the thermal
protection is activated. Use worst-case load and signal conditions. For good reliability, the thermal protection should
trigger more than 25'C above the maximum expected ambient condition of your application. This produces a junction
temperature of 125'C at the maximum expected ambient
condition.
Depending on load and signal conditions, the thermal protection circuit may produce a duty-cycle modulated output
signal. This limits the dissipation in the amplifier, but the
rapidly varying output waveform may be damaging to some
loads. The thermal protection may behave differently depending on whether internal dissipation is produced by
sourcing or sinking output current.
R,
20k.Q
V'N o-.tIJ'II'-.......--!--.N'II'-...,
:E
4
3
1
2
0
~
......
(See Text)
II
0
4~.,
~SineWave----"
1
~ 2.0
Ul"
,~il
RL = 100n
1
5
1
~Rs=1k.O:
C=Squar~
C>
:~
0
>
2
~~
i
0
...............
'[ 1.5
c
I
~
~ 2500
<::.
-60
100
i
j
1~lllr
J~~'l\ov
1500
RL = Ikll
125
I'...... ...
......
......
o
-25
25
75
50
Ambient Temperature (OC)
100
125
SLEW RATE vs LOAD CAPACITANCE
3000
V, Rising Edge
~
2000
100
o
0
r:s: r--1~1Ii~1~ .............
~
0.5
SLEW RATE vs LOAD CAPACITANCE
3000
75
1.0
Frequency (MHz)
3500
25
50
Temperature (0G)
.§
3 111
10
~
2.5
6
I NI
5
Ii
r--
MAXIMUM POWER DISSIPATION
vs AMBIENT TEMPERATURE
SAFE INPUT VOLTAGE vs FREQUENCY
6
............
............
Va = 0.25Vrms
250 f--R L =100n
-60
~
\
- - Rs=50n
-12
j
~\
I
----- Rs=300n
-10
290
\
"'\
I
~
\
2500
~
~ 2000
2.
i
........
~
1000
r-
1500
Va =±10V
RL =100n
1000
\
500
500
o
o
1
10
100
Load Capacitance (pF)
1000
10
100
1000
10,000
Load Capacitance (pF)
BURR - BROWN(]fI
3.2.72
Burr-Brown Ie Data Book-Linear Products
I &:I &:II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
At +25°C, Vs = ±12V, Rs = 500, R, = 1000, and C, = 10pF, unless otherwise specified.
POWER SUPPLY REJECTION vs FREQUENCY
80 "---'-~~~"-""'..,..~~~-r""'TT~
SLEW RATE vs TEMPERATURE
2500 . . - - - . , - - - - , - - - , - - - , . - - - , - - , . - - - - ,
I.
Falling Edge
~
1500
1--+---+---+---+---+1 -~--t-=.......
Jailing
Ed~e
10
40 - - - --.. -
0.
30
a
-25
25
so
Temperature (OC)
75
100
~
20
"
~
!;l
.!!!
0
"
----
...
1~k-~~~~1~Ok-~~~~10~0-k~~~~1M
125
IiIiII
Frequency (Hz)
t A--:
Vs=±1~
~ -::~ ~V
I--
tJ)
a:
w
iL:
----
QUIESCENT CURRENT vs TEMPERATURE
0
I--+-+++I-+-f-f+--- -
-----
10
30
25
-Hf+tt--+--t-+++-f+tt---j--+-++++H
20
~_~_~_~_~_~_~_~
-50
<-
~~~~+m
_._-
----·---t+I+tt·~-+_t-_f+1
II:
SOO 1----+----+---
§.
C
50
:9-
gj
Rising Edge
a
__
60 - - . -
~d?e
u;-
--
70 ~~~~gu--~**~~
2000 - - - ·-RL = 1 k O - - - - ._----
INPUT BIAS CURRENT vs TEMPERATURE
25 r--"---~-""'--r---.r--~--'
20 ~-+---+---+---+--~~-+-~
a.
::i
c(
..J
c(
Z
o
~
a:
._------ --
15 -
::J
10
w
5
o
-25
-50
25
50
Temperature (OC)
75
100
125
a
-25
25
50
75
100
125
Temperature Cc)
a.
o
a:
w
30
25
I
20
./"
1/ ./'"
"
;:::. 15
J
---
1.0
Js =±i2V
0.9
1
-
I---
1
Vs =±10V
,/
---
10
Vs= ±15V
.1
--
---_.
~
1
--LL~
0.8
I---
~
I---
>§
I---
>'?
I
a
a
100
200 300 400
Va =-10
0.7
500
600
I
I
700
600
0.6
'x ~ ~
0.5
~::e::"""
0.4
~~
0.3
.,.
o ~
0.1
900
1k
Load Resistance (0)
"> ~
Va =.;"10
0.2
-1---
5
:=
oa.
V,N - VauT vs OUTPUT CURRENT
OUTPUT VOLTAGE SWING vs LOAD RESISTANCE
a
10
"
20
....e:!
p30
40
I
Va=OCurrent Sinking
~
Va=O
1
Current Sourcing
1
1
1
50
60
70
80
1
90 100
Output Current (mA)
BURR~BROWN®
IElElI
Burr-Brown Ie Data Book-Linear Products
3.2.73
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
(CO NT)
At +25°C, Vs = ±12V, Rs = 50n, R, = loon, and C, = 10pF, unless otherwise specnied.
VOLTAGE GAIN vs LOAD RESISTANCE
_
GAIN ERROR vs TEMPERATURE
1---1'---:::::::;::===="
1.00
100
~c:
:>
~ 0.90
f
>
--
80
0.95 1 - - - - - - , 4 L
.si!l
I----/---j------i-------j
60
I"""
>
I
1---I----!------+------1
0.80
L..L._ _ _ _J....._ _ _ _- ' -_ _ _----'
RL = lkn
40
>0
0.85
I--
-~
Vo =±10V- r---
20
10
100
lk
o
-50
10k
o
-25
25
OUTPUT ERROR vs INPUT VOLTAGE
1.0
0.8
~
0.6
~
>-
0.2
>5
0
'" -0.2
-0.4
.-,
V .:>-:/"
~
.--.
RL=lkn
T
L!--
'l'
-0.8
40
20
0
-20
-
/ . t/" /
'/- I--
-0.6
-a
-a
-4
-2
0
2
4
4
:>
.s
:>
.s
J
13
I
>
--
2
0
-40::
-1.0
-10
6
8
-a0
-2
-a0
-100
-4
10
V
-50
/
~
V
-25
25
~
50
r-
75
l..---
100
125
Temperature (OC)
Input VottOlle (V)
TOTAL HARMONIC DISTORTION vs FREQUENCY
TOTAL HARMONIC DISTORTION vs OUTPUT VOLTAGE
0.06
1.0
---
0.1
~
'">J:
0.01
125
6
60
RL = 10kn
---::::- :/'
100
80
J:%: ~ .-
-
I
>
75
OFFSET VOLTAGE vs TEMPERATURE
100
I ~.J.
RL=~OOn-
RL = 50n
0.4
50
Temperature ('C)
Load Resistance (n)
/'
V
V
III
~o~!v~~
0.05
~
0.04
l
<1kHZ
RL = lOOn
'"~
RL =100n
0.03
0.02
0.Q1
0.001
0.5
1.0
1.5
2.0
Output Voltage (Vrms)
2.5
3.0
100
lk
10k
lOOk
Frequency (Hz)
BUftR-BROWNI8J
3.2.74
Burr-Brown Ie Data Book-Linear Products
I EilEiII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
APPLICATIONS INFORMATION
As with any high frequency circuitry, good circuit layout
technique must be used to achieve optimum performance.
Power supply connections must be bypassed with high
frequency capacitors. Many applications benefit from the
use of two capacitors on each power supply-a ceramic
capacitor for good high frequency decoupling and a tantalum type for lower frequencies. They should be located as
close as possible to the buffer's power supply pins. A large
ground plane is used to minimize high frequency ground
drops and stray coupling.
Pin 6 connects to the substrate of the integrated circuit and
should be connected to ground. In principle it could also be
connected to +Vs or -Vs, but ground is preferable. The
additional lead length and capacitance associated with sockets may cause problems in applications requiring the highest
fidelity of high speed pulses.
Depending on the nature of the input source impedance, a
series input resistor may be required for best stability. This
behavior is influenced somewhat by the load impedance
(including any reactive effects). A value of son to 200n is
typical. This resistor should be located close to the OPA633' s
input pin to avoid stray capacitance at the input which could
reduce bandwidth (see Gain and Phase versus Frequency
curve).
input voltage versus frequency curves. When used to buffer
an op amp's output, the input to the OPA633 is limited, in
most cases, by the op amp. When high frequency inputs can
exceed safe levels, the device must be protected by limiting
the power supply current.
PROTECTION CIRCUITS
The OPA633 can be protected from damage due to excessive currents by the simple addition of resistors in series with
the power supply pins (Figure Sa). While this limits output
current, it also limits voltage swing with low impedance
loads. This reduction in voltage swing is minimal for AC or
high crest factor signals since only the average current from
the power supply causes a voltage drop across the series
resistor. Short duration load-current peaks
supplied by the bypass capacitors.
arm
The circuit of Figure Sb overcomes the limitations of th
previous circuit with DC loads. It allows nearly full output
voltage swing up to its current limit of approximately 140mA.
Both circuits require good high frequency capacitors (e.g.,
tantalum) to bypass the buffer's power supply connections.
The input and output circuitry of the OPA633 are not
protected from overload. When the input signal and load
characteristics are within the devices's capabilities, no protection circuitry is required. Exceeding device limits can
result in permanent damage.
The OPA633's small package and high output current capability can lead to overheating. The internal junction temperature should not be allowed to exceed ISO°C. Although
failure is unlikely to occur until junction temperature
ex(.:eed:s 20QoC, reliability of L"lc pa..4: will be degraded
significantly at such high temperatures. Since significant
heat transfer takes place through the package leads, wide
printed circuit traces to all leads will improve heat sinking.
Sockets reduce heat transfer significantly and are not recommended.
Junction temperature rise is proportional to internal power
dissipation. This can be reduced by using the minimum
supply voltage necessary to produce the required output
voltage swing. For instance, I V video signals can be easily
handled with ±5V power supplies thus minimizing the
internal power dissipation.
Output overloads or short circuits can result in permanent
damage by causing excessive output current. The son or
7Sn series output resistor used to match line impedance
will, in most cases, provide adequate protection. When this
resistor is not used, the device can be protected by limiting
the power supply current. See "Protection Circuits."
Excessive input levels at high frequency can cause increased
internal dissipation and permanent damage. See the safe
Q.
The OPA633 is designed to safely drive capacitive loads up
to 0.0 I J.IF. It must be understood, however, that rapidly
changing voltages demand large output load currents:
lLOAD
= CLOAD
10
Specified Temperature Range, RL = 80
tkHz, RL = 60
B
55
2
·
V
V
V
A
A
A
·
··
3.3
SOA
40
80
0
~
a:
nF
Q"
Degrees
dB
Specified Temperature Range
Total-Both Amplniers
±to
±30
40
±35
±35
50
±4O
V
mA
I ·
W
0
a:
(Junction-to-Case)
°JC
°JC
°JC
0", (Junction-to-Ambient)
Both Amplifiers"', AC Output f > 60Hz
Both Amplifiers (2), DC Output
One Amplifier, AC Output f > 60Hz
One Amplifier, DC Output
No Heat Sink
0.8
0.9
1.25
1.4
30
···
·
t.O
1.2
1.5
1.9
°CIW
°CIW
°CIW
°CIW
°CIW
'CMI'CnA' un': RANGE
AM,BM
SM
-25
+85
·
-55
°C
°C
+125
'Specification same as OPA2541AM.
NOTES: (1) Input bias and offset current approximately doubles for every 10°C increase in temperature. (2) Assumes equal dissipation in both amplifiers.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andlor systems.
BURR-BROWN®
Burr-Brown Ie Data Book-Linear Products
:>
0
Q"
n~~~' .... u~
I E!lE!II
«
..J
«
Z
~
Current, Quiescent
Case
Q"
W
Power Supply Voltage, ±V,
0JC'
:J
VlIlS
kHz
IlS
POWER SUPPLY
THERMAL
a:
W
u:::
::aE
AC DcDcnD.u .....c
Settling Time to 0.1 %
(J)
3.2.79
For Immediate Assistance, Contact Your Local Salesperson
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAM
Supply Voltage, +V,to-V.................................................................... 80V
Output Current ............................................................................. see SOA
Power Dissipation, Internal'" ............................................................. 125W
Input Voltage: Diiferential ....... ,............................................................. ±V,
Common-mode ............................................................. ±V,
Temperature: Pin Solder, lOS ........................................................ +300'C
JUnction"' ................................................................ +150'C
Temperature Range:
Storage .................................................... ~'C to +150'C
Operating (Case) ..................................... -55'C to +125'C
T0-3
Tap View
NOTE: (1) Long term operation at the maximum junction temperature will
result in reduced product life. Derate intemal power dissipation to achieve
high MTTF.
PACKAGE INFORMATION(1)
MODEL
PACKAGE
PACKAGE DRAWING
NUMBER
TO-3
TO-3
TO-3
030
030
030
OPA2541AM
OPA2541BM
OPA2541SM
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
ORDERING INFORMATION
MODEL
PACKAGE
TEMPERATURE RANGE
OPA2541AM
OPA2541BM
OPA2541SM
TO-3
TO-3
TO-3
-25'C to +S5'C
-25'C to +S5'C
-55'C to +125'C
TYPICAL PERFORMANCE CURVES
TA ~ +25'C and Vs ~ ±35VDC, unless otherwise noted.
OPEN-LOOP GAIN AND PHASE vs FREQUENCY
INPUT BIAS CURRENT vs TEMPERATURE
«.s
100
110
100
10
90
,
c::
'iil
0
CD
0.1
'5
Q.
.E
I
80
~
I!l 50
./
0
>
0.01
0.001
-25
o
25
75
50
Junction Temperature ('C)
100
125
III
Phase
in 70
:Eo
./
~
'"
~
I ill
SO
1:'
III
III
1111
IIII
Gain
40
I
I
o
I
--45
-90
z..~2kn
I'oi>iJ
-135
-180
z..=3.3~t'-.~
l
IIII
30
~~1~2kn
20
10
0
-10
ZL=3.J~
10
100
lk
10k
FreQuencv (Hz)
lOOk
1M
10M
t
aURR~aROWNe
3.2.80
Burr-Brown Ie Data Book-Linear Products
IEilEilI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C and V,= ±35VDC, unless otherwise noted.
NORMALIZED QUIESCENT CURRENT
vs TOTAL POWER SUPPLY VOLTAGE
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
1.3
1.2
1.1
.9
i."1
T c = -25°c;.--
1.0
OJ
g 0.9
z
0.8
0.7
0.6
---- -
-- ----
~
~
~ - Tc =+I25°C
~
30
40
--
(+Vs)-Vo
p
-- --
~~
l.---""
V
~
It)
I..?V
N
~
o
o
50
60
70
80
o
90
.....
.......- Y
~rf-- f-- I-Vsl-lVol
V
:.--- --r;; = +25°C
~
20
V
2345689
10
III
U)
lOUT (A)
a:
w
u::
VOLTAGE NOISE DENSITY vs FREQUENCY
1.0
.s
l
f
~
"
r==po
.!II
100
I
Q.
:i
oc>
O
:::i
TOTAL HARMONIC DISTORTION vs FREQUENCY
10
Ik _ _ _
"lgml~IIEII~11
E
z0
I
0.1
+
C
:I:
f-
...-
III
~Po
c(
..J
c(
100mW
.".
Z
o
5W
fia:
Po= 50W
V
0.01
w
0.001
10
100
Ik
10k
lOOk
10
100
Ik
Frequency (Hz)
FreQuencv (Hz)
lOOk
10k
Q.
o
a:
w
;:
COMMON-MODE REJECTION vs FREQUENCY
12
110
10
100
iii"
:!lII:
II:
::!!
0
$:
"
90
80
E
!o
,
50
100
Ik
:--
8
60
10
8
e
"-
70
10k
lOOk
oQ.
OUTPUT CURRENT vs TEMPERATURE
120
--
-.... r--
---
r--- I---.
4
~
-....
~ ~ r--
~
o
1M
Frequency (Hz)
-<;0
-25
o
25
50
75
Case Temoerature (OC)
100
125
BURR· BROWN~
• ElEI, Burr-Brown Ie Data Book-Linear Products
3.2.81
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
T,= +25°C and V,= ±35VDC, unless otherwise noted.
DYNAMIC RESPONSE
ZLOAD =
co,
DYNAMIC RESPONSE
Vs = ±35V, Av = +1
ZLOAD
= 4700pF, Vs = ±35V, Av = +1
INSTALLATION
INSTRUCTIONS
POWER SUPPLIES
The OPA2541 is specified for operation from power supplies up to ±40V. It can also be operated from an unbalanced
or a single power supply so long as the total power supply
voltage does not exceed 80V (70V for "AM" grade). The
power supplies should be bypassed with low series impedance capacitors such as ceramic or tantalum. These should
be located as near as practical to the amplifier's power
supply pins. Good power amplifier circuit layout is, in
general, like good high-frequency layout. Consider the path
of large power supply and output currents. Avoid routing
these connections near low-level input circuitry to avoid
waveform distortion and instability.
Signal dependent load current can modulate the power
supply voltage with inadequate power supply bypassing.
This can affect both amplifiers' outputs. Since the second
amplifier's signal may not be related to the first, this will
degrade the inherent channel separation of the OPA2541.
HEAT SINKING
Most applications will require a heat sink to prevent jnnction
temperatures from exceeding the 150°C maximum rating.
The type of heat sink required will depend on the output
signals, power dissipation of each amplifier, and ambient
temperature. The thermal resistance from junction-to-case,
0IC' depends on how the power dissipation is distributed on
the amplifier die.
DC output concentrates the power dissipation in one output
transistor. AC output distributes the power dissipation equally
between the two output transistors and therefore has lower
thermal resistance. Similarly, the power dissipation may be
all in one amplifier (worst case) or equally distributed
between the two amplifiers (best case). Thermal resistances
are provided for each of these possibilities. The case-tojunction temperature rise is the product of the power dissi-
pation (total of both amplifiers) times the appropriate thermal resistance-Ll TIC = (PD total) (OIC)·
Sufficient heat sinking must be provided to keep the case
temperature within safe limits for the maximum ambient
temperature and power dissipation. The thermal resistance
of the heat sink required may be calculated by:
0HS
= (150°C -
Ll TIC - TA)/PD •
Commercially available heat sinks usually specify thermal
resistance. These ratings are often suspect, however, since
they depend greatly on the mounting environment and air
flow conditions. Actual thermal performance should be
verified by measurement of case temperature under the
required load and environmental conditions.
No insulating hardware is required when using the OPA2541.
Since mica and other similar insulators typically add
O.7°CIW thermal resistance, this is a significant advantage.
See Burr-Brown Application Note AN-83 for further details
on heat sinking.
SAFE OPERATING AREA
The Safe Operating Area (SOA) curve provides comprehensive information on the power handling abilities of the
OPA2541. It shows the allowable output current as a function of the voltage across the conducting output transistor
(see Figure 1). This voltage is equal to the power supply
voltage minus the output voltage. For example, as the
amplifier output swings near the positive power supply
voltage, the voltage across the output transistor decreases
and the device can safely provide large output currents
demanded by the load.
BURR·BROWNIHI
3.2.82
Burr-Brown Ie Data Book-Linear Products
I EiIEiI I
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
The internal current limit will not provide short-circuit
protection in most applications. When the amplifier output is
shorted to ground, the full power supply voltage is impressed across the conducting output transistor. For instance, with Vs = ±35V, a short circuit to ground would
impress 35V across the conducting power transistor. The
maximum safe output current at this voltage is 1.8A, so the
internal current limit would not protect the amplifier. The
unit-to-unit variation and temperature dependence of the
internal current limit suggest that it be used to handle
abnormal conditions and not activated in commonly encountered circuit operation.
APPLICATIONS CIRCUITS
10~F
+~
Inductive·
or EMF-
Generating
Load
SAFE OPERATING AREA
en
a:
D, - D2 , IN4003
FIGURE 2. Clamping Output for EMF-Generating Loads.
+35V
w
ii:
:::i
a..
:E
50Hz
Both Ampliliers, DC
One Amplilier, I > 50Hz
One Amplilier, DC
No Heat Sink
UNITS
!ljI pF
4
10= 0
MAX
1012 I1B
10'2 1110
I
G =-10, 60V Step
TYP
3.2.87
0
fi
a:
W
c..
0
a:
W
S
0
c..
For Immediate Assistance, Contact Your Local Salesperson
DICE INFORMATION
PAD
FUNCTION
lA,IB
2A, 2B, 2C, 2D
3
4
SA,SB
6A, 6B, 6C, 6D
7
8
0U1s
V+
+lnA
-InA
Out..
V-
+Ine
-Ine
Substrate Bias: Internally connected to
V- power supply.
MECHANICAL INFORMATION
DieSiz9
Die Thickness
Min. Pad Size
MILS (0.001 ")
MILLIMETERS
218 x 2S2±5
20±3
4x4
8.58 x 9.92 ±0.13
0.51 ±0.08
0.1 xO.l
Backina
Chromium-Silver
OPA2544 DIE TOPOGRAPHY
CONNECTION DIAGRAMS
ORDERING INFORMATION
T0-3
Top View
MODEL
OPA2S44BM
OPA2544SM
PACKAGE
8-Pin Metal T0-3
8-Pin Metal T0-3
TEMPERATURE
RANGE
-40°C to +85OC
to +l25°C
~5OC
PACKAGE INFORMATION(')
MODEL
OPA2544BM
OPA2544SM
Case is electrically isolated.
PACKAGE
PACKAGE DRAWING
NUMBER
8-Pin Metal TO-3
8-Pin Metal TO-3
030
030
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
ABSOLUTE MAXIMUM RATINGS
Supply VoRage, V+ to V- ................................................................... 70V
Output Current ................................................................. See SOA Curve
Input VoHage .................................................... (V-) ...(J.7V to (V+) +0.7V
Operating Temperature ................................................. ~5°C to +12SoC
Storage Temperature ..................................................... ~soC to +12SoC
Junction Temperature ...................................................................... 150°C
Lead Temperature (soldering -lOs) ................................................ 300°C
((1\ ELECTROSTATIC
\l:)I DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes coUld cause the device not to meet its
published specifications.
BURR-BROWNe
3.2.88
Burr-Brown Ie Data Book-Linear Products
IEiiSEiiSI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
TCASE "" +25°C, Vs = ±35V unless otherwise noted.
OPEN-LOOP GAIN AND PHASE vs FREQUENCY
INPUT BIAS CURRENT vs TEMPERATURE
IOn
120
100
80
iii'
:!1.
·i
C!l
g
-45
RL =150
/
In
E
60
90
~
"
~
40
135 0-
20
180
-/ /
Is
~
/
"
~ lOOp
iii
!-'
SQ.
V
lOp
.5
"-
../
los
0
-20
10
100
lk
10k
lOOk
1M
lp
-75
10M
-50
-25
0
CURRENT LIMIT vs TEMPERATURE
--
r-- '---
4
........
I'-...
l24
.........
'"
E
~
(3
22
!
o
~
~
125
Ell
w
iL
::::i
c..
:E
-50
-25
0
25
50
75
100
18
-75
125
-50
-25
-20
iii' -40
:!1.
~ -60
1
o
50
75
100
125
9k!l
~
-=-
~~-W~~-W~~-W~~~~~~
10k
lOOk
Frequency (Hz)
Burr-Brown Ie Data Book-Linear Products
rv
-=-
+
9k!l
_ 150
-=-
~
-=-
......
-
~
-a0
-100
lk
25
""'r-..
""-... ........ r-....
......... r-.. . . .
CHANNEL CROSSTALK vs FREQUENCY
o
100
0
"'"
P'-
o
Temperature (OC)
VOLTAGE NOISE DENSITY vs FREQUENCY
10
c(
...I
c(
Z
"'<
i'--.
Vx
:.,(
-IPt I
I IIII I IIII I I
-120
10
100
lk
en
a:
Vs = ±35V
Vs = ±10V
Temperalure (OC)
1
100
QUIESCENT CURRENT vs TEMPERATURE
20
10
75
26
r--
-75
50
Temperalure (OC)
Frequency (Hz)
5
25
10k
lOOk
1M
Frequency (Hz)
3.2.89
ti
a:
w
c..
o
a:
w
S
oc..
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CON1)
TA ~ +25'C, Vs
~±35V
unless otherwise noted.
COMMON-MODE REJECTION vs FREQUENCY
110
a;-100
:8.
<:
90
~
'a;-
80
"8"
70
a:
::!
i:
0
E
E
60
u
50
0
POWER SUPPLY REJECTION vs FREQUENCY
120
-.......
.........
i"
<:
V+ Supply
.2
.......
al
1-
.........
~
00-
'"
:J
lk
'"
80
60
"r-.....
~
0
0-
"
lOOk
10k
"
i'
20
1M
10
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
30
.............
-...J-
g
~
0-
-
..............
;...
9
fii
"~
t--- i---
SR+
S 1.5
r--
L:
SA-
7
.~
Slew Rate
Limited
co
a:
f
20
1
en
0
10
8~
'" " ",
~ 25
i
"-
15
"-.....
5
Cl
--50
25
-25
50
75
100
125
20k
lOOk
100mW
2W
I--
+
~
1
;.-----
~
I
0.1
-
J:
f--
0.01
0.001
-
20
,,-
(~+)\Vo
4
~
l
-- --
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
5
10
RL-15Q
200k
Frequency (Hz)
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
z
-...........
6
Temperature ('C)
0
1M
Clipping
........
52.0
0.5
-75
lOOk
10k
35
...
t.o
lk
100
Frequency (Hz)
GAIN-BANDWIDTH PRODUCT AND SLEW RATE
vs TEMPERATURE
¥
I'
i'.
40
Frequency (Hz)
2.5
"
II
V-Supply
en
40
100
IIII
IIII
I'
a;- 100
:8.
3
_f---V
1/
1
30W
..' ....
.
.
.
n
I(V-)-Vol
~
o
100
lk
Frequency (Hz)
10k 20k
o
2
3
Output Current (A)
BURR-B$i'j«&
3.2.90
Burr-Brown Ie Data Book-Linear Products IElI§!.....
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
TA = +25°C, Vs
(CONT)
=±35V unless otherwise noted.
OUTPUT VOLTAGE SWING vs TEMPERATURE
6
-
I
I
10= +2A
5
-J...
~=-2A
r-:: :--
-r
10= +0.5A
---= - -~
10=-o·5A
f---
Ell
en
- - ---- - -
o
-75
~O
-25
0
25
50
75
100
125
Tempera1ure ('C)
a:
u:::
w
SMALL SIGNAL RESPONSE
LARGE SIGNAL RESPONSE
G =3, C L = 1nF
G =3, RL = 15Q
::::i
D..
:E
c(
..J
c(
Z
o
5V/dlv
200mV/div
fia:
w
D..
2~sldiv
o
5~sldiv
a:
w
~D..
BURR~BROWN~
11E:5I1E:5I1
Burr-Brown Ie Data Book-Linear Products
3.2.91
For Immediate Assistance, Contact Your Local Salesperson
APPLICATIONS INFORMATION
Figure I shows the OPA2544 connected as a basic noninverting amplifier. The OPA2544 can be used in virtually
any op amp configuration. Power supply tenninals should be
bypassed with low series impedance capacitors. The technique shown, using a ceramic and tantalum type in parallel
is recommended. Power supply wiring should have low.
series impedance and inductance.
The safe output current decreases as V CE increases. Output
short-circuits are a very demanding case for SOA. A shortcircuit to ground forces the full power supply voltage (V+ or
V-) across the conducting transistor. With Vs = ±35V the
safe output current is 1.5 (at 25°C). The short-circuit current
is approximately 4A which exceeds the SOA. This situation
will activate the thermal shutdown circuit in the OPA2544.
For further insight on SOA, consult AB-039.
CURRENT LIMIT
+35V
The OPA2544 has an internal current limit set for approximately 4A. This current limit decreases with increasing
junction temperature as shown in the typical curve, Current
Limit vs Temperature. This, in combination with the thermal
shutdown circuit, provides protection from many types of
overload. It may not, however, protect for short-circuit to
ground, depending on the power supply voltage, ambient
temperature, heat sink and signal conditions.
V+
POWER DISSIPATION
Power dissipation depends on power supply, signal and load
conditions. For dc signals, power dissipation is equal to the
product of output current times the voltage across the conducting output transistor. Power dissipation can be minimized by using the lowest possible power supply voltage
necessary to assure the required output voltage swing.
For resistive loads, the maximum power dissipation occurs
at a dc output voltage of-one-half the power supply voltage.
Dissipation with ac signals is lower. Application Bulletin
AB-039 explains how to calculate or measure power dissipation with unusual signals and loads.
FIGURE 1. Basic Circuit Connections.
SAFE OPERATING AREA'
Stress on the output transistors is detennined by the output
current and the voltage across the conducting output transistor, VCE' The power dissipated by the output transistor is
equal to the product of the output current and the voltage
across the conducting transistor, V CEo The Safe Operating
Area (SOA curve, Figure 2) shows the pennissible range of
voltage and current.
The case of the OPA2544 is electrically isolated from all
circuitry and can be connected directly to a heat sink. This
eliminates cumbersome insulating hardware that increases
thermal resistance. Consult Application Bulletin AB-037 for
proper mounting techniques and procedures for TO-3. power
products.
SAFE OPERATING AREA
10
4
......
$
I
!
i
o
Current-limIted
........
'"
Output current may
be limited to less
than 4A-see text.
,...
"'-
">
l'.
T~ = ~5'C
I'...
~
THERMAL PROTECTION
The OPA2544 has thermal shutdown that protects the amplifier from damage. Any tendency to activate the thermal
shutdown circuit during normal operation is indication of
excessive power dissipation or an inadequate heat sink.
Tc - 85'C
l"-o.
0.4
L.
Tc = 125[C
~
0.1
2
5
10
IVs - Vol (V)
FIGURE 2. Safe Operating Area.
20
HEATSINKING
Most applications require a heat sink to assure that the
maximum junction temperature is not exceeded. The heat
sink required depends on the power dissipated and on
ambient conditions. Consult Application Bulletin AB-038
for information on detennining heat sink requirements.
50
100
The thermal protection activates at a junction temperature of
approximately 155°C. For reliable operation, junction temperature should be limited to 150'C, maximum. To estimate
the margin of safety in a complete design (including heat
sink), increase the ambient temperature until the thermal
BURR - BROWN0
3.2.92
Burr-Brown Ie Data Book-Linear Products
IE!lE!lI
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
protection is activated. Use worst-case load and signal conditions. For good reliability, the thermal protection should
trigger more than 2S·C above the maximum expected ambient condition of your application. This produces a junction
temperature of 12S"C at the maximum expected ambient
condition.
supply could range from lSV to 6SV. The total voltage (Vto V+) can range from 20V to 70V. With a 6SV positive
supply voltage, the device may not be protected from damage during short-circuits because of the larger VCE during
this condition.
Depending on load and signal conditions, the thermal protection circuit may produce a duty-cycle modulated output
signal. This limits the dissipation in the amplifier, but the
rapidly varying output waveform may be damaging to some
loads. The thermal protection may behave differently depending on whether internal dissipation is produced by
sourcing or sinking output current.
OUTPUT PROTECTION
Reactive and EMF-generating loads can return load current
to the amplifier, causing the output voltage to exceed the
power supply voltage. This damaging condition can be
avoided with clamp diodes from the output terminal to the
power supplies as shown in Figure 2. Fast-recovery rectifier
diodes with a 4A or greater continuous rating are recommended.
UNBALANCED POWER SUPPLIES
SOCKET
A socket, Burr-Brown model 0804MC is available for the
OPA2S44. Although not required, this socket makes mounting and interchanging parts easy, especially during design
and testing.
..J
Av=-R,IR, =-10
Y'N o-.tIJ'II'--...--t--.JVV'---,
Y'N u-,/\I'" ......___-,
w
Q.
o
recommended for input
signals that can cause
V-
a::
w
S
amplHiers to slew.
0,. 02 : Motorola MUR420
Fast Recovery Rectifier.
FIGURE 3. Motor Drive Circuit.
oQ.
FIGURE S. Paralleled Operation, Extended SOA.
+35V
+35V
10kn
10kn
10kn
20kn
300
t Load)
Y'N 0 - - - - - - 1
±10V
\ 120Vp·p
(±60V)
~5V
G=-1
~5V
FIGURE 4. Bridge Drive Circuit.
aURR·BROWN@
Burr-Brown Ie Data Book-Linear Products
-
.,
;!!.
f
75
g.
50
'5
"~.
n; 30
~
"
0
25
..........
'
0
10k
20
i.
.to
10
::J
0
E
1:
~
8
i.~
"iii
E
z0
40
~
100 - I - '
..J
+25°C to +85°C_~_-+----'
RL~2kO
Q.
,
a:
..............
!
..........................
r--.
--
20
10L-_ _
1k
irequ6ilCY {Hz}
1M
±50
~
___
±75
No Load
2knLoad
___
~
CURRENT LIMIT vs TEMPERATURE
o
~
a::
w
Q.
~
__
~
±125
±100
Pl')wer !=;IJPply VnltR[!A (V)
±150
o
a::
w
~
OPEN-LOOP FREQUENCY RESPONSE-FULL LOAD
120
........
........
100
i'........
...............
1ii"
:Eo
.......
.........
-20
~
~O
60
I>
40
.,
~
'" "-
80
c:
'«1
a
~
g
.~
100
10
z
5
.=c.
-100 L-__
-150
~
____
~
__
~
____
o
-100
~
00
__
~
__
100
!
~
Noise of Source Resistor
Amplnier Noise
0
100
10'
10'
Output Voltage (V)
TOTAL LOW FREQUENCY INPUT NOISE
vs SOURCE RESISTANCE
:Eo
100
..........
'"
c:
.
0
'ii
100
Thermal Noise 01
Source Resistor
.~0
z
5Q.
J
10'
COMMON-MODE REJECTION vs FREQUENCY
iii'
.=
107
120
1000
~
a
10·
10'
Source Resistance (11)
Amplilier Shot Noise
10
t
--
10.
1--107
Source Resistance (11)
I'-.
'ij)'
II:
CD
60
~0
40
'8
E
E
0
0
1 = 0.01 Hfo 10Hz
10'
80
Vs= ±150V
..........
10'
..........
..........
........
"""
20
10
100
lk
10k
lOOk
1M
Frequency (Hz)
BURR w BROWNe
3.2.98
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
TCASE = +25°C, ±V CC = 150VDC, unless otherwise noted.
COMMON-MODE VOLTAGE
vs FREQUENCY
150
"
125
POWER SUPPLY REJECTION vs FREQUENCY
'1---"--"""""1""T"rTTT-'I---;-I'I'I""TT"T"TI
-_ ~\-
LinearOperation_
Vee
E
~ 100
110
10 90
=±150V
~
<=
:§
"
70
'iii'
a:
C")
50
~
Q.
-
------~
---- -- - -- --
l;;
25
~
~-- ~r--
t----+-----j-i-+
..........
10k
1k
CO
:::I
(/)
-
it)
C")
30
0
--
0-
10
10
1M
100
1k
Frequency (Hz)
10k
100k
1M
Frequency (Hz)
III
en
a:
w
u:
APPLICATION INFORMATION
Figure 1 shows the basic connections required to operate the
3583. Power supply bypass capacitors should be connected
close to the device pins. Be sure that these capacitors have an
adequate voltage rating.
Input offset voltage and drift of the 3583 are laser-trimmed.
Many applications require no external offset trimming.
Figure 1 also shows connection of an optional offset trim
potentiometer connected to pins 3 and 4.
PET input circuitry reduces the input bias current of the 3583
to less than 20pA at room temperature. Input bias current
remains nearly constant throughout the full common-mode
range. Input bias current approximately doubles for each 10D C
increase in case temperature above 25 D C. Heat sinking can
help minimize this effect by reducing the case temperature.
The thermal shut-down circuit will normally protect the
amplifier during a short-circuit to ground. It will not protect
against short-circuit to one of the power supplies. The typical
performance curve "Safe Operating Area" shows that the
large stress occurring during this high voltage condition may
cause damage if it exceeds 5ms duration. The thermal
protection circuitry will not activate fast enough to protect
the device from short-circuits to one of the power supplies.
The package case of the 3583 is electrically isolated from all
circuitry. No special insulating hardware is required.
Although not absolutely required, it is recommended that the
case be connected to ground.
"
"5
%
0
-
120 ----- 1-"
~
r----r--
>
.!!.
-~-.
IIIII
Compensation:
2000 and 0.1~F
r:- 2k!l and 500pF
200 andSOpF
r-
\" '\
t-t---
90
1.0
I I II
I
a:"
1ii
;:
.J!l
\
60
en
\
30
.~
"iii
z
""-
r-....
['.: t--
100k
1M
V
/'
0.6
k"
O.S
40
V
.,
120
"
a:
SO
""
~
1ii
~
I
en
/
/
V
-
./
/'
70
60
SO
100
90
OPEN-LOOP FREQUENCY RESPONSE FULL LOAD
,....."
100
"'i"-"'......
......
lil
SO
';;;
"
60 f-- Compensation:
2000 and 0.1 ~F
40 f-- 2k!l and SOOpF
f-- 200 and SOpF
20
"
l>
J\
......
.........
~
r----
,,'
\.
\.
\.
........ \.
\.
....... "\. \.
""-
,//
~\
V
.------...... "\.\.
c----
"\.
"\..
"\..\.\.
"\..~
~
,
0
o
-20
Ex1ernal Compensation Impedance (0)
--
./
50
120
(!l
2k
L
Power Supply (% of max)
40
200
'"
/'
~-2S'C (Case)
,/
SLEW RATE vs COMPENSATION
.--~---."
L
/'
2S'C to SS'C (Case)/,
0.7
10M
,/
./
O.S
Frequency (Hz)
160
I
~~~mrsation~r~~o and ~1~~
§
0
10k
I
"C
\
\
0.9
20k
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
BURR~BROWN®
3.2.102
Burr-Brown Ie Data Book-Linear Products
I ElEII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CO NT)
TCASE
=+25°C, Vs =±150V, unless otherwise noted.
OPEN-LOOP GAIN
vs SUPPLY VOLTAGE AT MAX LOAD
m
POWER DISSIPATION
~
-1
§
:E!-
...C!lc
a.
0
~
a.
0"
4
!
-2
.~
o
-J
:;;
~
-4
00;
-5
.E
21----1---
E
-'-_OVo
V,N 0------'''1
Gatn
Cpnnect case
to ground.
The 3584 has internal thermal shut-down circuitry that
activates at a case temperature of approximately 150°C or
higher. As this circuitry is activated, the output current drive
is reduced. As the case temperature returns to less than the
~
V+
..J
V-70V to -150V
1
10
100
1000
C
Rc
10nF 2000
500pF
2kn
50pF
20kn
(no connection)
I~rpolate
values for
intermediate gains.
FIGURE 1. Basic Circuit Connections.
BURR-BROWNI8I
3.2.104
Burr-Brown Ie Data Book-Linear Products
I E!lE!II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
4 Instrumentation Amplifiers
Instrumentation amplifiers (lAs) are much more
than just precise op amps. They are closed loop
amplifiers with built-in precision feedback components. Knowledgeable designers use lAs to extract low-level signals from system errors and
noise.
Instrumentation amplifiers can amplify signals in
the presence oflarge common-mode signals. They
are ideal for use with all sensor types such as strain
gages, load cells, thermocouples, RIDs, current
shunts, chemical sensors, and physiological probes.
They also make excellent universal input amplifiers for data acquisition systems.
Programmable gain amplifiers are ideal for systems that must connect to a variety of sources with
varying signal levels. Models include programmable-gairi lAs and op amps.
Choose from the industry's widest selection, including:
INAIOS, INAI06-Simple 0=1 and G=lO difference amplifiers... incredibly versatile circuit elements.
INA114, INAl18-The industry's most versatile
and accurate 8-pin lAs. INAll8 features lowpower operation.
INA2128, INA2141-lndustry's first dual instrumentation amplifiers.
INAl1l-High-speed, FET-input lAs using a current-feedback architecture.
INAl1&-Electrometer IA with ultra-low input
bias current.
INAI03-Ultra-Iow InVN'jfz noise makes this
IA ideal for microphones, bridges or other IOWa
impedance sources.
'
INA117-A difference amplifier with ±2()()V common-mode voltage range.
00
PGA204, PGA20&-Programmable gain lAs great
for data acquisition systems that connect to a u:::
variety of sources or needing exceptional dynamic ::i
range.
ffi
a.
XTRIOl, XTRI03, XTRI04-4 to 20mA current :::i
loop transmitters with built-in lAs for RIDs or ut
""
~n~2~~----~~
International Airport industrial PaIi< • Mailing Addnoss: PO Box 11400 • TUcson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
T81: (602) 746-1111 • Twx: 911J..952·1111 • cable:BBRCORP • ToIex:068-6491 • FAX:(602)889-1S10 • ImrnedIataProduc1ln1o:(600)548-6132
4.4
PDS·454J
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At +25'C with ±15VDC power supply and in circuit of Figure 1 unless otherwise noted.
1NA101A11,AG
PARAMETER
MIN
1NA101SM, SO
TIP
MAX
G.l +141lk1f\,)
±(O.M +0.00016G
±(0.1 +0.0003G
..{)'o2IG)
..{).oW)
2
20
22
22
±10.OO2 + 1il" G)
5
100
110
110
±(0.005+2xlIt1>FS
10
±12.S
±10
02
1000
vs Temperature
±(25
+200/G)
±(0.75
+100)
±(10+
l00/G)
±(25+
2OOIG)
±(0.25 +
100)
±(125 +
45OIG)
±(250 +
SOOIG)
±15
;ll2
;ll.1
±15
;ll.5
vsSu,opty
InmaJOIfsetCu..nt
vsTemperature
~V
~vrc
±(2 +2OIG)
±30
±10
~
±20
±30
±10
~
±20
nA
nArc
nAN
nA
nN'C
:~:II~
INPUT VOLTAGE RANGE
Range, Unear Response
CUR wilh 1len Souroe Imbalance
.1
DC to
DC to
.10
DC to 60HZ: G .100 to 1000
±10
106,
nllpF
nllpF
±12
V
90
106
.
no
.
65
·65
dB
90
100
95
105
dB
dB
0.8
~V,i>1>
18
15
13
nVNflZ
nVi-iFIZ
nVNflZ
De!1s11y,G.l000
fo'" 10Hz
fo=100Hz
fo=1kHz
InptltCurrernNoise
fB ",O.01Hzto 10Hz
Oensl1y
fo=10Hz
io .. 100llz
fo=1kHz
50
pA,i>1>
0.8
t>ANB!:
0~5
pN-iFIZ
p"J~
300
140
25
2.5
kHz
kHz
kHz
kHz
20
10
1
200
6.4
0.4
kHz
kHz
kHz
Hz
kHz
1).413
DYNAMIC ReSPONSE
SmaU Signal, ±3dB Flatness
G.l
G.l0
G·l00
G.l000
Smal SIgnal, ±1% Flatness
G.l
G.l0
G.l00
G.l000
Full Power, G • 1 to 100
Slew Ra1e, G. 1 to 100
Set11ing llme (O.l%)
G·l
G.l00
G.l000
Set11lng lime 10.01%)
G.l
G.l00
G.l000
0.2
VilIS
30
40
350
40
55
470
~s
30
50
500
45
~s
70
650
~s
~~o::Y
±15
VoHage Range
Current, Quiescanteak fuD scale 0U1put.13) No1 including the TCA of R,·14) Adjustable
(5) q.OU1putstage..
"".83"CIW.
+85
+125
0
+70
"C
-65
.. ~gain.
BURR-BROWN@
1&51&511
U)
a::
W
u:::
:::i
c..
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w
II
....
I---
o
o
10
tk
100
10k
u::
----- - - - - - -
..
:i
a.
:E
~-
~
2
jg
•
a::
10
t20
Z
en
WARM-UP DRIFT vs TIME
CMR vs FREQUENCY
~
_..
"" ')r.-
II
lk
100
Gain (VN)
0::
..
t""
~
1%Erro~/
I
1000
100
~
-----
..
\
0.0003
10
--
-...
""
G=l l
o
:9-
,
- --
-~~
o
2
-
3
~
'"
f
:>
ll.D1~
100
I
g
20 / - - - - - - 1 - - - - - - + - - - - 1 - /
~
10
J
~V
/------1------+-..,..-----1
!
1%
1
10
10
100
1000
10
100
1000
Gain (VN)
Gain (VN)
INPUT NOISE VOLTAGE
vs FREQUENCY (100';: GAIN,; 1000)
1 L-________
o
~
________
10
~
100
______
~
1000
Frequency (Hz)
APPLICATION INFORMATION
Figure I shows the basic connections required for operation
of the INAlOl. (Pin numbers shown are for the TO-lOO
metal package.) Applications with noisy or high impedance
power supplies may require decoupling capacitors close to
the device pins as shown.
The output is referred to the output Common tenninal which
is nonnally grounded. This must be a low-impedance connection to assure good common-mode rejection. A resistance greater than 0.10 in series with the Common pin will
cause common-mode rejection to fall below 106dB.
SElTlNG THE GAIN
Gain of the INAIOI is set by connecting a single external
resistor, Ro:
(1)
The 40ill term in equation (1) comes from the sum of the
two internal feedback resistors. These are on-chip metal film
resistors which are laser trimmed to accurate absolute values. The accuracy and temperature coefficient of these
resistors are included in the gain accuracy and drift specifications of the INAIOL
The stability and temperature drift of the external gain
setting resistor, Ro, also affects gain. Ro' s contribution to
gain accuracy and drift can be directly inferred from the gain
equation (1). Low resistor values required for high gain can
make wiring resistance important. Sockets add to the wiring
resistance which will contribute additional gain error (possibly an unstable gain error) in gains of approximately 100 or
greater. The gain sense connections on the DIP and SOL-16
packages (see Figure 2) reduce the gain error produced by
wiring or socket resistance.
'151151'
BURR· BROWNe
4.8
Burr-Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
OFFSET TRIMMING
voltage can be adjusted with the optional trim circuit connected to the Common pin as shown in Figure 2. The voltage
applied to Common terminal is summed with the output.
Low impedance must be maintained at this node to assure
good common-mode rejection. The op amp connected as a
buffer provides low impedance.
The INAIOI is laser trimmed for low offset voltage and
drift. Most applications require no external offset adjustment. Figure 2 shows connection of an optional potentiometer connected to the Offset Adjust pins for trimming the
input offset voltage. (Pin numbers shown are for the DIP
package.) Use this adjustment to null the offset voltage in
high gain (G ~ 1(0) with both inputs connected to gmund.
Do not use this adjustment to null offset produced by the
source or other system offset since this will increase the
offset voltage drift by O.3,NI"C per lOOI1V of adjusted
offset.
THERMAL EFFECTS ON OFFSET VOLTAGE
To achieve lowest offset voltage and drift, prevent air
currents from circulating near the INA 101. Rapid changes in
temperature will produce a thermocouple effect on the
package leads that will degrade offset voltage and drift. A
shield or cover that prevents air currents from flowing near
the INAIOI will assure best performance.
Offset of the output amplifier usually dominates when the
INA 10 1 is used in unity gain (G = I). The output offset
,...
o
,...
+-+-=---o Vo = G (E, - E2)
u::
:::i
Q.
:i
7
50kQ(2}
-25
+85
-25
+85
+150
~
·
·
kHz
kHz
kHz
kHz
·
··
·
·
·· ··
···
··
·
···
·· ···
30
3
0.3
0.03
2.5
0.15
1.7
0.1
··
·
·
·
·
··
kHz
kHz
kHz
kHz
kHz
VlJlS
JlS
JlS
JlS
JlS
JlS
JlS
· ·
·
0
-.25
-.25
-55
V
V
.
IlA
+70
+85
+85
+125
'C
'C
'C
'C
'Speclficalion same as for INA102AG.
NOTES: (1) The infemal gain set resistors have an absolute tolerance of ±20%; however, their lracking is 50ppml"C. f\ will add to the gain error if gains other than
1,10,100 or 1000 are set externally. (2) At high temperalure, ou1put drive current is limited. An external buffer can be used if required. (3) Adjusfable to zero.
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Top View
16
Offset Adjust
Offset Adjust
xl0 Gain
+In
xl00Gain
-In
x 1000 Gain
Filler
x 1000 Gain Sense
+Vcc
PACKAGE INFORMATION(1)
Output
Gain Sense
MODEL
Common
GainSe1
CMRTrim
Supply ................................................................................................ ±18V
Input Vol1age Range ..............................•..•.. ,...................................... ±V""
Operaling Temperature Range ......................................... -25°C to +85°C
Storage Temperature Range: Ceramic .......................... ~oC to +150°C
Plastic, SOIC .................. -55°C to +125°C
Lead TemperalUre (soldering, 10s) ............................................... +300°C
Output Short-Circuit Duration ................................. COnfinuous to Ground
8
INA102AG
INA102CG
INA102KP
INA102AU
-Vee
PACKAGE
PACKAGE DRAWING
NUMBER
IS-Pin Ceramic DIP
IS-Pin Ceramic DIP
IS-Pin Plastic DIP
IS-Pin SOIC
109
109
180.
211
NOTE: (1) For de1ailed drawing and dimension table, please see end of data
shee1, or Appendix D of Burr-Brown IC Data Book.
ORDERING INFORMATION
MODEL
INA102AG
INA102CG
INA102KP
INA102AU
PACKAGE
TEMPERATURE RANGE
IS-Pin Ceramic DIP
16-Pln Ceramic DIP
IS-Pin Plastic DIP
IS-Pin Plastic SOIC
-25°C to +85'C
-25°C to +85°C
DOC to +70°C
-25°C to +85'C
BURR ~ BROWNe
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PAD
FUNCTION
PAD
FUNCTION
1
2
3
4
5
6
7
8
9
Offset Adjust
X10 Gain
X100Gain
X1000Gain
X1000 Gain Sense
Gain Sense
Gain Set
CMRTrim
-Vee
10·
11
12
13
14
15
16
Common
Output
+Vee
Filter
-In
+In
Offset Adjust
(A, Output)
(A,Output)
17
18
• Glass covers upper one-third of this pad_
Substrate Bias: Electrically connected to -v supply.
NC: No Connection.
MECHANICAL INFORMATION
MILS (0.001·')
MILLIMETERS
142x 104±5
20±3
4x4
3.61 x2.64±0.13
0.51 ±0.08
0.10xO.10
Die Size
Die Thickness
Min. Pad Size
Backing
INA 102 DIE TOPOGRAPHY
N
o,...
c(
z
Gold
TYPICAL PERFORMANCE CURVES
00
a:
w
u:::
At +25°C and in circuit of Figure 2 unless otherwise noted.
80
iii"
~
I..,"
60
1-+++HtI-Ir'T'T-'i'ti-iiit--t+H+tt+Io-.;::-H++HttI
100
iii" 40
:s
...c:
80
0
(!l
~0
E
E
:::i
D..
:E
GAIN vs FREQUENCY
COMMON-MODE REJECTION vs SOURCE IMBALANCE
120
60
20
0
0
GI=111~
I
100
Ik
10k
1M
,,
III,,,,,,
z
o
~
~
~i'
III
G=1
-20 I
10
11111111
lOOk
c(
III
G=10
u
401
Vour = O.1Vrms
111111
G = 1000
!
,
~
1% Error
::-".
,
II!
100
Ik
,II" ,
10k
r--.
Z
w
:E
,
::l
lOOk
1M
tOO
Frequency (Hz)
Source Resistance Imbalance (0)
a:
Z
COMMON-MODE REJECTION vs FREQUENCY
120
l.ld ~ j~~
iii"
:s
c:
I
"
>
.S-
G = 1000
100
~
80
E
60
~
WARM-UP DRIFT vs TIME
50
i'--. ~
~
30
'5
c- 20
.5
.5
'""
c:
III
.c:
U
V'N =20Vp-p
00 Source Imbalance
10
o
40
10
1D
~
~
1
40
I
:1>
~1
8
CI>
100
Ik
Frequency (Hz)
Bu"-Brown Ie Data Book-Linear Products
/
o
/
.-3
2
4
5
TIme (ms)
4.13
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
At +25'C and in circuit of. Figure 2 unless otherwise noted.
STEP RESPONSE
QUIESCENT CURRENT vs SUPPLY
1000
±15
900
Vo = 10V
(noload) -
« 800
a
700
i
() 500
E
I
j :~
Vo _0
1\
\
I
It
0
!-Q
200
RL = 10ka
CL = 1000pF
;;;;1000
~ ±5
600
I
G=1
±10
-10
100
o
o
-15
±5
±10
±15
±20
o
2
Supply Voltage (V)
Bandwidth = 1Hz to 1MHz
~
r--
->f
.....:--
3l
~
~
~
10
Q.
i
'.
0.1%
0.01
10
1000
100
500kQ
As
I
0.01% ~
0.1
~
100
7.-:-~
_
500ka
~
.~
8
PEAK-PEAK VOLTAGE NOISE vs GAIN
~ 1000
RL 10kQ
CL = 1000pF
I
""
6
Time (ms)
SETTLING TIME vs GAIN
10
5
4
3
W
~
lMQ
~~
r-- ~As =0
11111
See ~PP:i~tif~~
10
Gain (VN)
fit
~ction
100
1000
Gain (VN)
INPUT NOISE VOLTAGE vs FREQUENCY
POWER SUPPLY REJECTION
1000
VB
FREQUENCY
125
100
~
75
'1if
r--...
-
11111
r--.
II:
G_l
~
Q.
G-l0
CI>
G = 100, G = 1000
Q.
11111
10
1
~
10
"
I
11111
100
Frequency (Hz)
I"r--
I"---.t'--
r--.
50
10k
IIlll1
~1fi
t---..
25
]1!
Gailn~
o
lk
Gain = 1000
1
10
100
lk
10k
Frequency (Hz)
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DISCUSSION OF
PERFORMANCE
INSTRUMENTATION AMPLIFIERS
Instrumentation amplifiers are differential-input closed-loop
gain blocks whose committed circuit accurately amplifies the
voltage applied to their inputs. They respond mainly to the
difference between the two input signals and exhibit extremely high input impedance, both differentially and common-mode. The feedback networks of this instrumentation
amplifier are included on the monolithic chip. No external
resistors are required for gains of I, 10, 100, and 1000 in the
INA 102.
An operational amplifier, on the other hand, is an open-loop,
uncommitted device that requires external networks to close
the loop. While op amps can be used to achieve the same
basic function as instrumentation amplifiers, it is very difficult to reach the same level of performance. Using op amps
often leads to design tradeoffs when it is necessary to amplify
low-level signals in the presence of common-mode voltages
while maintaining high-input impedances. Figure I shows a
simplified model of an instrumentation amplifier that eliminates most of the problems associated with op amps.
e o = e A + as
eA == G(e2
-
9 1)
== Geo
e = G(e, + e,)/2 = Ge",
,
CMRR
CMRR
impedance (lO"n) desirable in instrumentation amplifier
applications. The offset voltage, and offset voltage versus
temperature, are low due to the monolithic design, and
improved even further by state-of-the-art laser-trimming
techniques.
The output stage (A3) is connected in a unity-gain differential
amplifier configuration. A critical part of this stage is the
matching of the four 20k(.! resistors which provide the
difference function. These resistors must be initially well
matched and the matching must be maintained over temperature and time in order to retain good common-mode rejection.
All of the internal resistors are made of thin-film nichrome
on the integrated circuit. The critical resistors are lasertrimmed to provide the desired high gain accuracy and
common-mode rejection. Nichrome ensures long-term stability and provides excellent TCR and TCR tracking. This
provides gain accuracy and common-mode rejection when
the INAI02 is operated over wide temperature ranges.
o,..
I 00), the bias current can cause a large offset error at the
output. This can saturate the output unless the source impedance is separated, e.g., two SOOkO paths instead of one lMQ
unbalanced input. Figures S·through 16 show some typical
applications circuits.
BURR - BROWNe
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+15V
v
+15V
Shield
e,
eOUT
=
1000 (e2 - e,)
INA102 replaces classical three-op-amp
Instrumentation amplifier.
N
o
FIGURE 5. Amplification of a Differential Voltage from a Resistance Bridge.
15
Noise
(60Hz Hum)
3
,,
Transducer
or
Analog
Signal
\
Noise
(60Hz Hum)
eOUT
G
R.
=
en
Shield
\
\
II
II
II
II
\
\
,, ,
\.L.l"V
a:
w
RG
u::
6
:J
Q.
:::E
14
c(
-::-
Ry = 4.4k!l, 404n, or 40Q in gains
of 10, 100, or 1000 respectively.
G (de,.)
= 1 + (40k/IRG + Ry])
= (40k - RyIG -l])/(G -1)
z
-15V
o
~
~
Note: Gain drift will be higher than that
specified with internal resistors only.
FIGURE 6, Amplification of a Transformer-Coupled Analog Signal Using External Gain Set.
Z
w
:::E
K
::l
a:
+15VDC
+15VDC
-15VDC
G= 100
"--r-----,
+15VDC
7
INA102
Digital
IN914
Cold
Junction
Compensation
4990Q
-15VDC
15kQ
-15VDC
lMQ
Up-Scale
Bum-Out
Indication
100kQ
Zero Adjust
-15VDC
-15VDC
FIGURE 7. Isolated Thermocouple Amplifier with Cold Junction Compensation.
BURR-BROWNe
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Z
xl0
100Q
ten
4.17
For Immediate Assistance, Contact Your Local Salesperson
+15VDC
15
5
11
M,N =1mVp-p
eOlIT =
j
1Vp-p
to isolation amplifier.
7
14
-15VDC
FIGURE 8. EeG Amplifier or Recorder Preamp for Biological Signals.
+9V
G=100
eour contains a midscale
DC voltage 01 +4.5V.
FIGURE 9. Single Supply Low Power Instrumentation Amplifier.
* Does not require
external isolation
power supply.
Bias Current
Return Resistor
722
Isolation
Power
Supply
Note that x1000 gain sense has not
been used to lacilttate Simple swttching.
FIGURE 10. Precision Isolated Instrumentation Amplifier.
aURR-BROWN®
4.18
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,------1)
Channel
Select
,----1) Gain
Select
Control
Logic
CP
CE
1
*
N
o
,...
As shown channels a and 1 may be used for auto offset zeroing. and gain calibration respectively.
c(
-Z
FIGURE 11. Multiple Channel Precision Instrumentation Amplifier with Programmable Gain.
. -.·
l~:~
..9
-
4
-40
0
40
V,N (mV)
(f)
a::
w
u:
::i
c..
:E
c(
z
o
~
~
G= 100
FIGURE 12. 4mA to 20mA Bridge Transmitter Using Single Supply Instrumentation Amplifier.
Z
w
:E
:::)
10kQ
a::
t;
z
-
10kQ
Input Protection: D = FDH300 (Low LeakaQe)
x10
x100-:Gain Select
FIGURE 13. Programmable-Gain Instrumentation Amplifier Using the INA102 and PGA102.
BURR-BROWN®
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Burr-Brown Ie Data Book-Linear Products
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Ground Resistance
FIGURE 14. Ground Resistance Loop Eliminator (INAI02 senses arid amplifies VI accurately).
+15V
-15V
AeOUT
+15V
Overall Gain
=MouldS,. = 200
":15V
FIGURE 15. Differential InputlDifferential Output Amplifier (twice the gain of one INA).
BURR-BROW'Ne
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+15V
II
5,
16
112
II
DG5043CJ
8
112
DG5043CJ
S.
Reference
-15V
S
't-
110dB
• BUILT-IN GAIN SETTING RESISTORS:
G = 1, 100
• AMPLIFICATION OF SIGNALS FROM:
Strain Gages (Weigh Scale Applications)
Thermocouples
Bridge Transducers
• UPGRADES AD625
DESCRIPTION
The INA103 is a very low noise, low distortion monolithic instrumentation amplifier. Its current-feedback
circuitry achieves very wide bandwidth and excellent
dynamic response. It is ideal for low-level audio signals
such as balanced low-impedance microphones. The
INA103 provides near-theoretical limit noise performance for 2000 source impedances. Many industrial
applications also benefit from its low noise and wide
bandwidth.
The INA103 is available in 16-pin plastic DIP, 16-pin
ceramic DIP and SOL-16 surface-mount packages.
Commercial and industrial temperature range models
are available.
Unique distortion cancellation circuitry reduces distortion to extremely low levels, even in high gain. Its
balanced input, low noise and low distortion provide
superior performance compared to transformer-coupled
microphone amplifiers used in professional audio equipment.
The INA103's wide supply voltage (±9 to ±25V) and
high output current drive allow its use in high-level
audio stages as well. A copper lead frame in the plastic
DIP assures excellent thermal performance.
Offset Offset
-Gain Drive
Null
Null
3
4
V+
v-
-Input
-Gain Sense
-RG
G=100
+Gain Sense
2
+Input
1
+Gain Drive
International Airport Industrtal Parle • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602)746-1111 • Twx: 910-952·1111 • Cable:BBRCORP • Teiex:066·6491 • FAX:(602)889-1510 • Immediate Product Info: (800) 546.e132
4.22
PDS·1016F
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SPECIFICATIONS
ELECTRICAL
All specifications at TA = +25"C, Vs = ±15V and R, = 2kn, unless otherwise noted.
INA103AG
PARAMETER
CONDITIONS
GAIN
Range of Gain
Gain Equation (11
Gain Error, DC G = 1
G = 100
Equation
Gain Temp. Co. G = 1
G = 100
Equation
Nonlinearity, DC G = 1
G = 100
OUTPUT
Voltage, R, = 6000
R, = 6000
Current
Short Circuit Current
Capacitive Load Stability
1
G
±10V Output
±10V Output
±10V Output
TA
= TMIN to TMAX
Vs = ±25, TA = 25"C
TA=TMINtoTMAX
TYP
MIN
±11.5
±20
±40
INA103BG
MAX
I
MIN
TYP
1000
·6k.Q
0.005
0.05
0.5
10
25
25
0.0003
0.0006
·
0.25
0.003
0.04
0.1
0.Q1
0.1
0.01
0.01
0.0002
0.0006
0.002
0.004
··
±12
±21
(20 +
700/G)
(100+
5000/G)
(20 +
320/G)
MIN
TYP
0.07
·
··
·
··
··
±70
10
INPUT OFFSET VOLTAGE
Initial Offset RTI (3)
INA103KP, KU
MAX
MAX
·
··
··
(50 +
2000/G)
(30 +
1200/G)
INPUT BIAS CURRENT
Initial Bias Current
vs Temp
Initial Offset Current
vsTemP
TI<:::
TMIN
to
TA
0~75
·20/G
TMAX
2
0.2 + 81G 4 + 60!G
TA==TM1NtoT MAX
±9Vto ±25V
2.5
15
0.04
0.5
=TMlN to TMA)(
·
··
12
0.03
1
±11
±12
·
72
100
86
125
80
110
91
129
60112
60115
INPUT VOLTAGE RANGE
(5)
CMR
G= 1
G = 100
DC to 60Hz
DC to 60Hz
INPUT NOISE
Voltage IS)
10Hz
100Hz
1kHz
Current, 1kHz
10/~
·
·
·
TA = T M1• to T M",
INPUT IMPEDANCE
Differential Mode
Common-Mode
Common-Mode Range
•
·20/G
0/0 of FS(2)
%ofFS
!'V
12 + 30/G
!'V/"C
!,VI"C
!'VN
8
40 (4)
nArC
0.5
2.5(<1)
!LA
·
·
!LA
nArC
MOil pF
MOil pF
V
· ·
dB
dB
OUTPUT NOISE
Voltage
A Weighted, 20Hz-20kHz
1kHz
20Hz-20kHz
65
-100
Small Signal
Small Signal
G= 1
VOIIr = ±10V, R, = 6000
G=lto500
G = 100,f= 1kHz
6
800
··
·
DYNAMIC
-3dB Bandwidth: G = 1
G = 100
Full Power Bandwidth
Slew Rate
THD + Noise
Settling Time 0.1 %
G= 1
G = 100
Settling Time 0.01%
G= 1
G = 100
Overload Recovery m
1.7
1.5
Vo = 20V Step
2
3.5
1
50% Overdrive
·
·
nVlVi'iZ
dBu
··
·
·
·
··
··
·
MHz
kHz
240
15
0.0009
Vo = 20V Step
"
Same speCification
as INA103AG.
NOTES: (1) Gains other than 1 and 100 can be set by adding an external resistor,
nV/~
nV/Vi'iZ
nV/Vi'iZ
pNVi'iZ
1.4 (4)
··
kHz
V/I'"
%
I'"
I'"
I'"
I'"
!,s
F\ between pins 2 and 15. Gain accuracy is a function of R•. (2) FS = Full Scale.
(3) Adjustable to zero. (4) Guaranteed by design. (5) Vo = OV, see Typical Curves for V eM vs Yo' (6) V""SERTI = ""'NWPIIr + (VNOIJTI'.,!Gain), + 4KTR•. See Typical
Curves. (7) Time required for output to return from saturation to Ijnear operation following the removal of an input overdrive voltage.
BURR-BROWN®
IE!lE!lI
Burr-Brown Ie Data Book-Linear Products
,...
0
«
Z
-
Cf)
a:
W
u:::
:i
c..
:E
«
Z
0
....Z~
W
:E
Rs =00
2
1.2
1
2
(W')
!'V
(250+
SOOO/G)
vs Temp G = 1 to 1000
G = 1000
vs Supply
VN
VN
%
%
%
ppmPC
ppmPC
ppm/"C
V
V
mA
mA
nF
·
(KU Grade)
UNITS
4.23
:J
a:
ICf)
-Z
For Immediate Assistance, ContactYour Local Salesperson
SPECIFICATIONS (CO NT)
ELECTRICAL
All speclficatlons at T, = +25·C, Vs
=±15V and RL =2kn, unless otherwise noted.
fNA103AG
PARAMETER
CONDITIONS
MIN
POWER SUPPLY
Rated Voltage
Vo~age Range
Quiescent Current
TVP
±15
±9
9
TEMPERATURE RANGE
Specification
Operation
Storage
Thermal Resistance, 8"
-25
-55
-65
INA103KP, KU
INA103BG
MAX
±25
12.5
+85
+125
+150
MIN
MAX
TVP
.
·
··
.
MIN
TVP
MAX
.
·
.
·
0
-40
-40
+70
+85
+100
·
100
UNITS
V
V
mA
·C
·C
OC
·C/w
DICE INFORMATION
PAD
FUNCTION
PAD
FUNCTION
1
2
3
+Input
+Galn Sense
+Offset Null
-Offset Null
9
10
II
12
13
14
IS
16
V+
Output
Sense
-Gain Drive
-RG
G-IOO
-Gain Sense
-Input
4
5
6
7
8
+Gain Drive
+R.
Ref
V-
Substrate Bias: Electrically connected to V- supply.
MECHANICAL INFORMATION
Die Size
Die Thickness
Min. Pad Size
Backing
INA103 DIE TOPOGRAPHY
INAI03AG
INAI03BG
INAI03KP
INAI03KU
4.24
Chromium-Silver
PACKAGE
\l::I DISCHARGE SENSITIVITY
Ceramic DIP
Ceramic DIP
Plastic DIP
SOL-I 6
109
109
180
211
Any integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet published specifications.
ORDERING INFORMATION
INAI03AG
INAI03BG
INAI03KP
INAI03KU
4.93x2.92±0.13
0.51 ±0.08
0.1 xO~1
PACKAGE DRAWING
NUMBER
NOTE: (I) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
MODEL
MILLIMETERS
t94x 115±5
20±3
4x4
IQ\ ELECTROSTATIC
PACKAGE INFORMATION(I)
MODEL
MILS (0.001")
PACKAGE
Ceramic DIP
Ceramic DIP
Plastic DIP
SOL-I 6
TEMP RANGE
-25·C to
-25·C to
O·C to
O·C to
+85·C
+SS·C
+70·C
+70·C
Burr-Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Top View
DIP or SOIC
16
+ Input
-lnpu1
-Gain Sense
+ Gain Sense
+ Offset Null
G= 100
-Offset Null
-RG
+ Gain Drive
-Gain Drive
Sense
+~
Outpu1
Ref
V-
9
8
Power Supply Voltage ....................................................................... ±25V
Input Voltage Range, Continuous ....................................................... ±V.
Operating Temperature Range:
P, U Pact
a
<"
a
10
~
2.50
i
J
_ 2.45
.E
()
j
:
INPUT BIAS CURRENT ys SUPPLY
......
~
2.40
............
"-
'5
~ 2.35
() -to
~
2.30
2.25
3
2
4
5
9
Time (min)
10
15
20
25
Power Supply Voltage (±V)
SMALL SIGNAL TRANSIENT RESPONSE
(G=I)
INPUT BIAS CURRENT vs TEMPERATURE
6
~r-
'"
~
2
-.Q5
~
o
50
100
125
Time
(~s)
Temperature (OC)
SMALL SIGNAL TRANSIENT RESPONSE
(G
=100)
Time(~s)
LARGE SIGNAL TRANSIENT RESPONSE
(G=I)
Time
(~s)
BURR-BROWN~
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I I a lal
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TYPICAL PERFORMANCE CURVES (CO NT)
At TA = +25°C, Vs
= ±15V unless otherwise noted.
SETTLING TIME vs GAIN
(0.1 %, 20V STEP)
LARGE SIGNAL TRANSIENT RESPONSE
(G~ 100)
8 1-------
----
-
'-'-H-1+H+r--+-
V-
V
('I)
o
,....
2 1--+-+-H+-H++--+--H++l+fl-+/+-I-+++++H
I--r-
V
4
/
!
a:
SMALL-8IGNAL FREQUENCY RESPONSE
10
~
•
en
SETTLING TIME vs GAIN
(0.01 %, 20V STEP)
__ f-2
II
I
c-c-- -
w
u::
1-
r-.
G ~ 1000
"
::::i
a.
:E
t'-
IT~"-r-
~
G~10
"
.s
1=
!E.
.,
·15
100
10
z
...
---
....,. ......
10
~
~
~.,.
G:l
.
--- - " --
G-l00
100
[[
.,
"
80
0
60
GJo
~0
E
E
40
G ~500'G
0
20
i~~
t'~
t~
If:;'
..- _.
0
~
1000
Illl
a
100
lk
10k
Frequency (Hz)
-
II~~-
iii' 120
--_ ....
liiz
CMR vs FREQUENCY
140
lk
10
100
lk
10k
lOOk
1M
Frequency (Hz)
BURR-BROWN®
11EiiiI1EiiiI1
Burr-Brown Ie Data Book-Linear Products
4.27
For Immediate Assistance, Contact Your Loca/Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
At T, = +25°C,
v. = ±15V unless otherwise noted.
V+ POWER SUPPLY REJECTION
vs FREQUENCY
THD + N vs FREQUENCY
140
10
:!!.
0.1
+
G-l000
0.010
'"J:
....
100
'ij)
80
0.001
~
G= 10
G=10
G=1
G~1
i"t--. ....
a:
G=1
120
c:
.~
£z
r-
G-l0
VOIIf- +18dBu
""en"8:
40
D..
20
I
i"-
10
i"-
100
1
10k 20k
lk
10
100
V- POWER SUPPLY REJECTION
vs FREQUENCY
140
c:
0
~
'ij)
a:
~
c.
en"
I
120
100
=1
1M
THD + N vs LEVEL
f
( =11
i"-
( =1
......
80
i"-
,
1',
i"-
60
,
40
"
0.1
i"-
£z
I"-
,
'"i!:
1kHz
......
+
"
0.010
G=1
......
i"-
20
0.001
........
0.0005
10
100
lk
lOOk
10k
1M
~o
-45
Frequency (Hz)
o
-15
--30
15
Output Amplitude (dBu)
THD + N vs LOAD
CCIF IMD vs AMPLITUDE
0.1
5
G 1
Vaun 20VPi>
f= 1kHz
........
0.01
£
'"
+
'"....
lOOk
10k
110<1
0
~
z
lk
Frequency (Hz)
Frequency (Hz)
:!!.
'r-..
60
o
0.0001
10
'r-..
'" ........
0.1
.........
.......
;!!
LL
J:
(3
0
0.001
0.010
...t
-
100 .......
G=10.......
.0.001
0.0001
G = 1000
.......
0.0001
200
400
600
RLOAD(O)
800
lk
~O
-50
-40
--30
-20
-10
0
10
20
Output Amplitude (dBu)
BURR BR9WN8I
M
4.28
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IElElI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CO NT)
At TA = +25'C, V, = ±15V unless otherwise noted.
CCIF IMD vs FREQUENCY
r---- ---t----
.-.+-+~j--
SMPTE IMD vs AMPLITUDE
5
.. --..- - - -
~
. - [-. r- ;----
._-----
~
l
....
0
~
;---~
~
0.1
w
Is.:...G= 1000
.........
-100
(/)
1""0.
0.010
0.001
0.0005
0.0001
2k
10k
. -r--;
=--==
Ii::::;
20k
~O
~O
-40
Frequency (Hz)
-30
-20
I.........
G=1 .......
G
10~ 1:::2..
-10
0
10
C"')
o,....
c:a::
z
20
Output Amplitude (dBu)
-
•
U)
~
l
~
w
Ii:
:::;
(/)
u::
l!
[--
0.1
w
100
5
0
a:
CURRENT NOISE SPECTRAL DENSITY
SMPTE IMDvs FREQUENCY
~
c::
~_G.100
0.010 t:::=G
"
0
::i
a..
['-..,
::a:
c:a::
z
10
.~
z
~1
!
t---G-1
f"'-..
0
G=10
0.001
0.0005
2k
10k
10
20k
100
1k
10k
::a:
::J
APPLICATIONS INFORMATION
Figure 1 shows the basic connections required for operation,
Power supplies should be bypassed with IIJF tantalum
capacitors near the device pins. The output Sense (pin 11)
and output Reference (pin 7) should be low impedance
connections. Resistance of a few ohms in series with these
connections will degrade the common-mode rejection of the
amplifier.
To avoid oscillations, make short, direct connection to the
gain set resistor and gain sense connections. Avoid running
output signals near these sensitive input nodes.
INPUT CONSIDERATIONS
Certain source impedances can cause the INAI03 to oscillate. This depends on circuit layout and source or cable
characteristics connected to the input. An input network
consisting of a small inductor and resistor (Figure 2) can
greatly reduce the tendancy to oscillate. This is especially
,EBEB,
Z
w
Frequency (Hz)
Frequency (Hz)
o
~
~
useful if various input sources are connected to the INAI03.
Although not shown in other figures, this network can be
used, if needed, with all applications shown.
GAIN SELECTION
Gains of 1 or IOOVN can be set without exterual resistors.
For G = IVN (uuity gain) leave pin 14 open (no connection)-see Figure 4. For G = lOOVN, connect pin 14 to pin
6-see Figure 5.
Gain can also be accurately set with a single exterual resistor
as shown in Figure 1. The two interual feedback resistors are
laser-trimmed to 3kn within approximately ±O.l %. The
temperature coefficient of these resistors is approximately
5Oppm/'C. Gain using an external Ro resistor is-
G=I+6kQ
RG
BURR-BROWN®
Burr-Brown Ie Data Book-Linear Products
4.29
a:
~
z
-
For Immediate Assistance, Contact Your Local Salesperson
son
15
13
VO=G'V[N
V[N RG
14
6
RL
2
-=-
~
VNOTES: (1) No RG required for G = 1.
See gain-set connections in Figure 4.
(2) RG for G = 100 is internal. See
gain-set connection in Figure 5.
GAIN
GAIN (dB)
RG(n)
1
3.16
10
31.6
100
316
1000
0
10
20
30
40
50
60
Note 1
2774
667
196
60.6["
19
6
FIGURE 1. Basic Circuit Configuration.
Accuracy and TCR of the external Ro will also contribute to
gain error and temperature drift. These effects can be directly inferred from the gain equation.
Connections available on Al and A, allow external resistors
to be substituted for the internal 3ill feedback resistors. A
precision resistor network can be used for very accurate and
stable gains. To preserve the low noise of the INAI03, the
value of external feedback resistors should be kept low.
Increasing the feedback resistors to 20ill would increase
noise of the INAI03 to approximately 1.SnV!-YHz. Due to
the current-feedback input circuitry, bandwidth would also
be reduced.
NOISE PERFORMANCE
The INAI03 provides very low noise with low source
impedance. Its InV!,IHz voltage noise delivers near theoretical noise performance with a source impedance of 2000.
Relatively high input stage current is used to achieve this
low noise. This results in relatively high input bias current
and input current noise. As a result, the INAlO3 may not
provide best noise performance with source impedances
greater than Will. For source impedance greater than IOkO,
consider the INA114 (excellent for precise DC applications), or the INAIII FET-input 1A for high speed applications.
son
FIGURE 2. Input Stabilization Network.
Offset voltage can be trimmed with the optional circuit
shown in Figure 3. This offset trim circuit primarily adjusts
the output stage offset, but also has a small effect on input
stage offset. For a ImV adjustment of the output voltage, the
input stage offset is adjusted approximately IILV. Use this
adjustment to null the INAI03's offset voltage with zero
differential input voltage. Do not use this adjustment to null
offset produced by a sensor, or offset produced by subsequent stages, since this will increase temperature drift.
To offset the output voltage without affecting drift, use the
circuit shown in Figure 4. The voltage applied to pin 7 is
summed at the output. The op amp connected as a buffer
provides a low impedance at pin 7 to assure good commonmode rejection.
Figure 5 shows a method to trim offset voltage in ac-coupled
applications. A nearly constant and equal input bias current
of approximately 2.SI!A flows into both input terminals. A
variable input trim voltage is created by adjusting the balance of the two input bias return resistances through which
the input bias currents must flow.
16
15
13
>--=+--oVOUT
14
OFFSET ADJUSTMENT
Offset voltage of the INAlO3 has two components: input
stage offset voltage is produced by Al and A 2 ; and, output
stage offset is produced by A 3 • Both input and output stage
offset are laser trimmed and may not need adjustment in
many applications.
Offset Adjust .
Range = ±250mV. RTI
FIGURE 3. Offset Adjustment Circuit.
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Figure 6 shows an active control loop that adjusts the output
offset voltage to zero. A2, R, and C form an integrator that
produces an offsetting voltage applied to one input of the
INA103. This produces a --6dB/octave low frequency rolloff like the capacitor input coupling in Figure 5.
COMMON-MODE INPUT RANGE
OUTPUT SENSE
An output sense terminal allows greater gain accuracy in
driving the load. By connecting the sense connection at the
load, loR voltage loss to the load is included inside the
feedback loop. Current drive can be increased by connecting a current booster inside the feedback loop as shown in
Figure 11.
For proper operation, the combined differential input signal
and common-mode input voltage must not cause the input
amplifiers to exceed their output swing limits. The linear
input range is shown in the typical performance curve
"Maximum Common-Mode Voltage vs Output Voltage."
For a given total gain, the input common-mode range can be
increased by reducing the input stage gain and increasing the
output stage gain with the circuit shown in Figure 7.
C")
o
,..
10kO can increase noise and reduce bandwidth--6eetext.
NOTE: AD625 equivalent pinout.
FIGURE 7. Gain Adjustment of Output Stage.
FIGURE 8. Use of External Resistors for Gain Set.
(b) INA103 G = I, Y'N = ±15V, RL = 600n
(a) AD625 G = 1, Y'N = ±15V, RL = 600n
A common problem with many Ie op amps and instrumentation amplifiers is shown In (a). Here, the amplifier's input Is driven beyond Its linear common mode
range, forcing the output of the amplifier into the supply rails. The output then "folds back", i.e., a more positive input voltage now causes the output of the amplifier
to go negative. The INA103 has protection circuitry to prevent fold·back, and as shown in (b), limits cleanly.
FIGURE 9. INA103 Overload Condition Performance.
Gain=1VN
(Od8)
Introduces
approximately
+0.2% Gain Error.
V+
..,.
FIGURE 10. OptionalCircuitforExternallyTrimmingCMR.
FIGURE 11. Increasing Output Circuit Drive.
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47~F/63V
16
+
Phantom
Power
2400
1
6.8kO
>--'-'-+---..-0 VOUT
Gain
Adjust
47kO
100ka
47~F/63V
C")
o....
Output offset voltage
control loop.
---'-"-+---o Your
::::i
0..
:::i
10ka
\
I
\.L
\
I
.::,../
5
Operation
Storage
±lB
±2
+85
+125
+150
.
·
··
·
.
-40
-40
V
V
mA
··
+85
+125
°C
°C
°C
• Specification same as for INA105AM.
NOTES: (1) Connected as difference amplifier (see Figure 4). (2) Nonlinearity is the maximum peak deviation from the best-fit straight line as a percent of full-scale peakto-peak output. (3) 25kO resistors are ratio matched but have ±20% absolute value. (4) Maximum input voltage wnhout protection is 1OV more than either ±15V supply
(±25V). Umit I'N to 1mAo (5) With zero source impedance (see "Maintaining CMR" section). (6) Referred to output in unity-gain difference configuration. Note that this
circuit has a gain of 2 for the operational amplifier's offset voltage and noise vottage. (7) Includes effects of amplifier's input bias and offsel currents. (8) Includes effects
of amplifier's input current noise and thermal noise contribution of resistor network..
ABSOLUTE MAXIMUM RATINGS
Supply ................................................................................................ ±18V
Input Voltage Range ............................................................................ ±Vs
Operating Temperature Range: M .................................. -55'C to + 125'C
P, U ................................ -40°C to +85'C
Storage Temperature Range: M ..................................... --1>5'C to +150'C
P, U ................................. -40'C to +125'C
Lead Temperature (soldering, lOS) M, P ....................................... +300'C
Wave Soldering (3s, max) U .......................................................... +260"C
Output Short Circuit to Common ................................ ___ ........... Continuous
PACKAGE INFORMATION(')
MODEL
INA105AM
INA105BM
INA105KP
INA105KU
PACKAGE
PACKAGE DRAWING
NUMBER
TO-99 Metal
TO-99 Metal
8-Pin Plastic DIP
8-Pin SOIC
001
001
006
182
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andior systems.
BURR-BROWN@
I EaEa I
,..
0
-
RTQ(6)(7)
OUTPUT NOISE VOLTAGE
f. : 0.01 Hz to 10Hz
10: 10kHz
Settling Time: 0.1%
0.01%
0.01%
1
0.005
1
0.0002
MIN
50
50
Differential
Voltage Range"}
MAX
0.01
+40/-10
1000
To Common
Stable Operation
INPUT
Impedance(3)
INA105BM
TYP
Burr-Brown Ie Data Book-Linear Products
4.35
en
a:
W
u:::
:J
D.
:E
+50
I>
0
.
§.
S
~
~O
0
4
12
Time
in
o,....
o
16
+50
§.
E
g
0
}
S
~
::::i
I
Q)
D.
-7.5
~
~O
-2.5
o
5
o
10
:E
-_-I-=-6_--{) va
V, }---,/W'---'''t----,NV'----+
+15V
Vo=V,-V,
Offset Adjustment
Range = ±300~V
-15V
FIGURE 2. Offset Adjustment.
INA105BM
-In
R,
2
~
,...
499kO
+------JI/V'-----<1 OOkO
v,o--=+--,AA~~~-,AA.~-----+~
For low source impedance applications, an input stage using OPA27 op
amps will give the best low noise, offset, and temperature drift performance.
At source impedances above about 10ka, the bias current noise of the
OPA27 reacting with the input impedance begins to dominate the noise
performance. For these applications, using the OPA 111 or Dual OPA2111
FET input op amp will provide lower noise performance. For lower cost use
the OPA121 plastic. To construct an electrometer use the OPAI28.
R.
A"A.,
R,
(0)
(0)
OPA27A
OPAlllB
OPA128LM
50.5
202
202
2.5k
10k
10k
GAIN CMRR
(dB)
(VN)
100
100
100
128
110
118
MAX
I.
NOISE AT 1kHz
(nV/fIiZj
40nA
lpA
75fA
4
10
38
25kO
w
u::
____+6=---..0--0 Vo
--
.AA
VVV
5
~
7
6
(V+)/2
y~
~
"'r>
6
Common
4
1
Comman
FIGURE 10. Pseudoground Generator. .
FIGURE 7 .. ±lOV Precision Voltage Reference.
INA105
2
5
REF10
6
+5VOut
2
V, O--+-V\I\/'--.;
4
5
-.QVOut
6
Vo = (V, + v.)I2, ±O.Ol% maximum
FIGURE I L Precision Average Value Amplifier.
FIGURE 8. ±5V Precision Voltage Reference.
BURR-BROWNIBI
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IHA10S
IHA10S
Oto +10V Output
±2ppml"C
2
Ii
5
5
6
Vo
v,
6
Output
(')
-10V
to
+10V
Input
Device
3
Vo
=2· V,
VFC320
VFC100
DAC60
DAC703
XTR110
Gain Error::::; 0.01% maximum
Gain Drift = 2ppml"C
2
FIGURE 12. Precision (G = 2) Amplifier-
Output
0-10kHz
0-FCLOCK/2
O-FS (12 bits)
O-FS (16 bits)
4-20mA
6
REF10
I
10V
IHA10S
4
NOTE: (1) Unipolar Input Device.
5
FIGURE 15. Precision Bipolar Offsetting.
>---4'6'--4-0 Vo
V, o--'t-----./W'----.-t
V, v--"r-----.IVV--
Vo
= v, + v,. ±0.01% maximum
FIGURE 13. Precision Summing Amplifier.
>---+"6'--4-0 Vo
v,~+
v,o-J-,w-J
'------------'
IHA10S
2
ForG=10.
See INA106.
5
FIGURE 16. Precision Summing Amplifier with Gain.
>---f6~>-oVO
V,o--=3+---,/'IIV'--.-t
= 112 V,
±20V
Vo
=V.j2. ±0.01%
FIGURE 14. Precision Gain = 112 Amplifier.
BURR-BROWN~
I E!lE!II
Burr-Brown Ie Data Book-Linear Products
4.41
It)
0
,..
-----f'--~--ovo,
V,
10 = (V, - V2) (1/25k + 1/R)
For R '" 20011, Figure 24 will
provide superior periormance.
FIGURE 19. Precision Voltage-to-Current Converter with
Differential Inputs.
:g
,....
INA10S
----I'''----+--0V02
en
a:
w
3
u:
::i
D..
:t
VO,- V02 = 2 (V2 - V,)
3
V3 o-'T----;/W'---+--;/\/\J'----t:;-*-<
----t''--4I--{) Vo: 200 (V, -
V,)
3
In
o
,....
v,
------INA105
Amplifier (e.g., INA10l or INA102)
A: 2 ------o~
A: 100
_
FIGURE 27. Boosting Instrumentation Amplifier Common-Mode Range From ±5 to ±7.5V with lOV Full-Scale Output.
a:
w
u::
INA10S
2
R,
::i
c.
:E
5
-_-+,6'--41-0 vo: IV,I
3
en
o
~
~
D,
V,
Z
input
Rs
2kO
w
:E
::>
a:
t;
FIGURE 28. Precision Absolute Value Buffer.
z
V
oto 10
in
12.5kn
Ikn
O---,M1'----.--M~___,
INA10S
5
2
+15V
2
50.10
REF10
6
10V
50.10
3
4
410 20mA
Out
I
t
FIGURE 29. Precision 4-20mA Current Transmitter.
BURR-BROWNe
IE!lE!lI
Burr-Brown Ie Data Book-Linear Products
4.45
For Immediate Assistance, Contact Your Local Salesperson
BURR-BROWN@
INA106
IElElI
Precision Gain=10
DIFFERENTIAL AMPLIFIER
FEATURES
APPLICATIONS
• ACCURATE GAIN: ±O.025% max
• HIGH COMMON-MODE REJECTION:
• G=+10 AMPLIFIER
• G=10 DIFFERENTIAL AMPLIFIER
86dB min
• G=-10 AMPLIFIER
• G=+ 11 AMPLIFIER
• INSTRUMENTATION AMPLIFIER
• NONLINEARITY: 0.001% max
• EASY TO USE
• PLASTIC 8-PIN DIP, SO-8 SOIC
PACKAGES
DESCRIPTION
The INAI06 is a monolithic Gain=lO differential
amplifier consisting of a precision op amp and on-chip
metal film resistors. The resistors are laser trimmed
for accurate gain and high common-mode rejection.
Excellent TCR tracking of the resistors maintains gain
accuracy and common-mode rejection over temperature.
The differential amplifier is the foundation of many
commonly used circuits. The INA106 provides this
precision circuit function without using an expensive
resistor network. The INA106 is available in 8-pin
plastic DIP and SO-8 surface-mount packages.
International Airport Induslrial Park • Mailing Address: PO Box 11400
Tel: (602) 746·1111 • TWx: 910·952·1111 • Cable: BBRCORP •
4.46
R,
R2
10kn
100kn
-In 02=+---,/\J\f'._---.J\!\,!'-------f"-O Sense
7
6
4
V+
Output
V-
3 f--VVI/'--.----J'W'---+-D Reference
+In 0-=1
• Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Telex: 1166·6491 • FAX: (602) 889·1510 • Immediate Product Inlo: (800) 548·6132
PDS·729D
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At +25"C, Vs = ±15V, unless otherwise specified.
INA106KP, U
PARAMETER
CONDITIONS
MIN
GAIN
Initial(1)
Error
vs Temperature
Nonlinearity(2)
TYP
10
0.01
-4
0.0002
OUTPUT
Related Voltage
Rated Current
Impedance
10 = +20mA, -5mA
Vo = 10V
Current limit
10
+20,-5
Capacitive load
Stable Operation
Voltage Range
Common-Mode Rejection(3)
OFFSET VOLTAGE
Initial
vs Temperature
vs Supply
vsTime
Differential
Common-mode
Differential
Common-mode
TA =TMIN to TMAX
0.01%
0.01%
POWER SUPPLY
Rated
Voltage Range
Quiescent Current
0.001
12
VN
%
ppml"C
%
V
rnA
Q
rnA
pF
10
110
±1
±11
86
UNITS
k!l
k!l
V
V
dB
100
50
0.2
1
10
±V, = 6V to 18V
200
10
~V
~vrc
~VN
~V/mo
RTI(5)
~V*,
1
30
-3dB
Vo= 2OVp-p
30
2
Vo= 10V Step
Vo = 10V Step
VeM = 10V Step, Vo", = OV
nVi Hz
5
50
3
5
10
5
MHz
kHz
VI~
~
~
~s
5
Derated Performance
Vo=OV
±5
±1.5
TEMPERATURE RANGE
Specification
Operation
StoraQe
0
-40
-55
±18
±2
+70
+85
+150
V
V
rnA
"C
"C
"C
NOTES: (1) Connected as difference amplifier (see Figure 1). (2) Nonlinearity is the maximum peak deviation from the best-fit straight line as a percent offull-scale peakto-peak output. (3) Wtth zero source impedance (see "Maintaining CMR" section). (4) Includes effects of amplifiers's input bias and offset currents. (5) Includes effect
of amplifier'S input current noise and thermal noise contribution of resistor network.
ELECTROSTATIC
DISCHARGE SENSITIVITY
PIN CONFIGURATION
DIPISOIC
Top View
This integral circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
Ref
-In
ESD damage can range from subtle perfonnance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet
published specifications.
+In
V-
NOTE: (1) Pin 1 indentifier for S0-8 peckage.
Model number identification may be abbreviated
on SO-8 package due to limited available space.
aURR-BROWN®
I EiI &ill
CD
0
,....
.s
'"
E
g
'S
~
CD
0
0
,....
-50
Vs - ±12V
-5
Vs = ±15V
10
Vs = ±12V
7.5
I
I
5
.Vs =±5V -
-2.5
f--.
2.5
~
Vs = ±5V
I
0
-2
-4
0
-5
-10
-12
-lOUT (rnA)
Burr-Brown Ie Data Book-Linear Products
o
6
12
18
24
30
36
lOUT (rnA)
4.49
For Immediate Assistance, Contact Your Loea/Salesperson
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25°C. Vs =±15V, unless othelWise noted.
POWER SUPPLY REJECTION
vs FREQUENCY
CMR vs FREQUENCY
110
140
120
100
'",
iil 90
'"
~
a:
::!!
() BO
70
60
10
100
lk
Frequency (Hz)
~100
~
II:
a:
g:
~
10k
BO
~
I~
60
'"
t'--...
............
I~
40
10
100k
100
~
.........
~
~,
10k
lk
100k
Frequency (Hz)
APPLICATIONS INFORMATION
Figure 1 shows the basic connections required for operation
of the INAI06. Power supply bypass capacitors should be
connected close to the device pins as shown.
Figure 2 shows a voltage applied to pin I to trim the offset
voltage of the INA 106. The known lOOn source impedance
of the trim circuit is compensated by the IOn resistor in
series with pin 3 to maintain good CMR.
Vl~F
~
-::-
l~F
4
7
~
INA106
R,
INA106
V,
2
R,
R,
10kQ
100kQ
V,o-----~2~-,NVL-~--.A~--f5~
V3o--J\/V"~r-~~~~--.-i
V3
3
+
Your = 10(V3 -V,)
I
Compensates for
some impedance
at pin 1. See text.
Vo= v,- V3
Offset Adjustment Range = ±3mV
+15V
+-__
~4,,9\9I\kQl'-___!,"~
-15V
FIGURE 1. Basic Power Supply and Signal Connections.
FIGURE 2. Offset Adjustment.
The differential input signal is connected to pins 2 and 3 as
shown. The source impedance connected to the inputs must
be equal to assure good common-mode rejection. A 5n
mismatch in source impedance will degrade the commonmode rejection of a typical device to approximately 86dB. If
the source has a known source impedance mismatch, an
additional resistor in series with one input can be used to
preserve good common-mode rejection.
Referring to Figure I, the CMR depends upon the match of
the internal R4~ ratio to the R/R, ratio. A CMR of lO6dB
requires resistor matching of 0.005%. To maintain high
CMR over temperature, the resistor TCR tracking must be
better than 2ppm/°C. These accuracies are difficult and
expensive to reliably achieve with discrete components.
The output is referred to the output reference terminal
(pin 1) which is normally grounded. A voltage applied to the
Ref terminal will be summed with the output signal. The
source impedance of a signal applied to the Ref terminal
should be less than IOn to maintain good common-mode
rejection.
BURRRBROWN@
4.50
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11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
INA106
INA106
v,
5
o--JV'J'---"-I--J\JV\_......--J'VV'~--t"--J\III'-+ Gain
Adjust
6
Eo
Output
V2
CMR
Adjust
Eo = 10(1 + 2R2 /R,) (E2 - E,)
To eliminate adjustment interactions,
first adjust gain with V2 grounded.
CD
FIGURE 3. Difference Amplifier with Gain and CMR
Adjust.
To make a high pertormance high gain instrumentation amplifier, the INAI 06
can be combined with state-of-the-art op amps. For low source impedance
applications, OPA37s will give the best noise, offset, and temperature drift. At
source impedances above about 10kn, the bias current noise of the OPA37
reacting with input impedance degrades noise. Forthese applications, use an
-1r-1'N'-..---JII\I'---t-o
topology and laser. trimmed input stage provide
x 100 O+-NV'+f
excellent dynamic performance and accuracy. The "I
INAllO settles in 4j.1S to 0.01%, making it ideal for
X200 O+""""ILt-'---JVV'---'
high speed or multiplexed-input data acquisition sysx500
terns.
1
Sense
Output
Internal gain-set resistors are provided for gains of I,
10, 100, 200 and 500VN. Inputs are protected for
differential and common-mode voltages up to ±VCC"
Its very high input impedance and low input bias
current make the INAllO ideal for applications
requiring input filters or input protection circuitry.
The INA I 10 is available ill 16-pin plastic and ceramic
DIPs, and in the SOL-16 surface-mount package.
Military, industrial and commercial temperature range
grades are available.
Input
+Vcc
-Vee
Output
Offset
Offset
Adjust
Adjust
NOTE: (1) Connect to RG for desired gain.
International Airport Industrial Park '. Mailing Address: PO Box 11400 ' Tucson, AZ 85734 ' street Addre88: 6730 S. Tucson Blvd. ' Tucson, AZ 85706
Tel: (602) 746-1111 ' Twx: 91110852·1111 ' Cable: BBRCORP , Telex: IJ66.6491 ' FAX: (602) 889-1510 ' Immedlala Product Info: (800) 548-6132
4,52
PDS-645D
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At +2SoC, ±Vco = ISVDC, RL = 2k.Q, unless otherwise specilied,
INAll0AG
PARAMETER
CONDITIONS
GAIN
Range 01 Gain
Gain Equation(1)
Gain Error, DC: G = 1
G= 10
G= 100
G=200
G=5OO
Gain Temp. Coefficient: G = 1
G= 10
G= 100
G=200
G=SOO
Nonlinearity, DC: G = 1
G=10
G= 100
G=200
G=SOO
OUTPUT
Voltage, RL = 2k.Q
Current
Short-Circutt Current
Capacitive Load
MIN
1
OVer Temperature
Over Temperature
±10
±5
Stability
INPUT OFFSET VOLTAGE'"
Initial Offset: G, P
TYP
INAll0BG, SG
MAX
.
BOO
0.002
0.01
0.02
0.04
0.1
±3
±4
±6
±10
±2S
±0.001
±0.002
±0.004
±0.006
±0.01
0.04
0.1
0.2
0.4
1
±2O
±2O
±4O
±BO
±100
±G.Ol
±0.01
±0.02
±0.02
±0.04
MIN
G'= 1
TYP
I
[40kl(Ro
O.OOS
0.01
0.02
O.OS
·
±2
±3
±5
±10
±O.OOOS
±G.OOI
±0.002
±0.003
±O.OOS
INAll0KP, KU
MAX
TYP
0.02
O.OS
0.1
0.2
O.S
±10
±10
±20
·
±30
±50
±G.OOS
±G.OOS
±G.Ol
±G.Ol
±G.02
·
··
··
±(100+ ±(SOO+
±(5O+
±(25O+
1000/G) SOOO/G)
BOO/G)
3000/G)
u
2000/G)
vs Supply
Vco =±6Vto±18V
±(S+
100/G)
:6~;'
±(30+
±(1 +
10/G)
±(2+
300/G)
30/G)
±(10+
1801G)
Each Input
Initial Offset Current
Impedance: Differential
Common-Mode
20
2
100
SO
10
1
50
2S
VOLTAGE RANGE
Range, Linear Response
CMR with 1k.Q Source Imbalance:
G=1
I~:~~::::~
VIN
Diff.
= OV(3)
±10
SO/G)
DC
70
90
80
100
G::: 10
DC
87
104
9G
112
G= 100
G=200
G=SOO
DC
DC
DC
100
100
100
110
110
110
106
106
106
116
116
116
INPUT NOISE"
Voltage, 10 = 10kHz
1.= 0.1 Hz to 10Hz
Current, 10 = 10kHz
10
1
1.8
·
OUTPUT NOISE'"
6S
8
Voltage, ::.= 10kHz
= O.IHz to 10Hz
DYNAMIC RESPONSE
Small Signal: G = 1
G=10
G= 100
G=200
G=SOO
Full Power
Slew Rate
Setiling Time:
O.I%,G=1
G= 10
G= 100
G=200
G=500
-3dB
VQUT=±10V,
G=2tol00
G=2tol00
Va = 20V Step
2.S
2.S
470
240
100
190
12
270
17
4
2
3
5
11
Burr-Brown Ie Data Book-Linear Products
·
·
·
IlV
··
·
·
··
IlVN
·
··
··
·
··
dB
de
dB
dB
dB
nV/v'HZ
IlVp-p
IAlv'HZ
nV/-!HZ
IlVp-p
·
MHz
MHz
kHz
kHz
kHz
··
kHz
V/J!S
··
·
·
,....
,....
0
100
lk
10k
lOOk
1M
Frequency (Hz)
Frequency (Hz)
SMALL SIGNAL TRANSIENT RESPONSE
(G = 100)
,
10
~
100
"
0
1t
:;
0
:;
Q.
~
8 -10
0
0
10
Time(~s)
20
-100
0
10
20
nme(~s)
BURR-BRQWN@
4.56
Burr-Brown Ie Data Book.:c...-Linear Products
IE5IE5II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CO NT)
T. = +25°C. ±vco
=15VDC. unless otherwise noted.
SETILING TIME vs GAIN
(0.01%. 20V Step)
OUTPUT NOISE VOLTAGE
20
VB
FREQUENCY
1000
--t--
~
~
"
IS
'"
i"
........
3>
"
~
~
10
.......
5
f---
~
50
1
20
0
~
100
.~
en
-t------~
-; 200
E
;::
soo
f-------
10
to
Ik
100
10
lk
Frequency (Hz)
INPUT NOISE VOLTAGE vs FREQUENCY
COMMON-MODE VOLTAGE vs
DIFFERENTIAL INPUT VOLTAGE
----
12
2
100
Gain (VN)
10k
..
en
a:
w
:---.
u::
:J
c..
::i
----------
II(
z
~-----4-------+------~----~
100
10
Ik
tOk
o
6
9
Differential Input Voltage x Gain (V)
Frequency (Hz)
12
o
~
~
Z
= Vo
w
::i
~
a:
t;
WARM-UP DRIFT vs TIME
so
:>
-z
20
"
~
0
40
;;
30
>
8s
c. 20
.E
.E
"
fii'"
10
'"
()
/
If
----
0
2
3
4
5
Time (minutes)
BURR~BRDWN®
IE!lE!lI
Burr-Brown Ie Data Book-Linear Products
4.57
For Immediate Assistance, Contact Your Local Salesperson
DISCUSSION OF
PERFORMANCE
A simplified diagram of the INA I 10 is shown on the first
page. The design consists of the classical three operational
amplifier configuration using current-feedback type op amps
with precision PET buffers on the input. The result is an
instrumentation amplifier with premium performance not
normally found in integrated circuits.
The input section (AI and A2) incorporates high performance, low bias current, and low drift amplifier circuitry.
The amplifiers are connected in the noninverting configuration to provide high input impedance (lOl2Q). Laser-trimming is used to achieve low offset voltage. Input cascoding
assures low bias current and high CMR. Thin-film resistors
on the integrated circuit provide excellent gain accuracy and
temperature stability.
The output section (A3) is connected in a unity-gain difference amplifier configuration. Precision matching of the four
lOill resistors, especially over temperature and time,
assures high common-mode rejection.
BASIC POWER SUPPLV
AND SIGNAL CONNECTIONS
Figure I shows the proper connections for power supply and
signal. Supplies should be decoupled with 1).IF tantalum
capacitors as close to the amplifier as possible. To avoid
gain and CMR errors introduced by the external circuit,
connect grounds as indicated, being sure to minimize ground
resistance. Resistance in series with the reference (pin 6)
will degrade CMR. To maintain stability, avoid capacitance
from the output to the gain set, offset adjust, and input pins.
VOUT
FIGURE 2. Offset Adjustment Circuit.
For systems using computer autozeroing techniques, neither
offset nor offset drift are of concern. In many other applications, the factory-trimmed offset gives excellent results.
When greater accuracy is desired, one adjustment is usually
sufficient. In high gains (> I 00) adjust only the input offset,
and in low gains the output offset. For higher precision in all
gains, both can be adjusted by first selecting high gain and
adjusting input offset and then low gain and adjusting output
offset. The offset adjustment will, however, add to the drift
by approximately 0.33,JVf'C per lOOIlV of input offset
voltage that is adjusted. Therefore, care should be taken
when considering use of adjustment.
Output offsetting can be accomplished as shown in Figure 3
by applying a voltage to the reference (pin 6) through a
buffer. This limits the resistance in series with pin 6 to
minimize CMR error. Be certain to keep this resistance low.
Note that the offset error can be adjusted at this reference
point with no appreciable degradation in offset drift.
Your = VOFFSETTING + AV1N G.
With ±Vcc = tSV. R, = 100kn, R2 = lMn.
R, = 10kn, VOFFSETTlNG = ±IS0mV.
FIGURE I. Basic Circuit Connection.
FIGURE 3. Output Offsetting.
OFFSET ADJUSTMENT
Figure 2 shows the offset adjustment circuit for the INAIIO.
Both the offset of the input stage and output stage can be
adjusted separately. Notice that the offset referred to the
INAllO's input (RTI) is the offset of the input stage plus the
offset of the output stage divided by the gain of the input
stage. This allows specification of offset independent of
gain.
BURR-BROWN®!
4.58
Burr-Brown Ie Data Book-Linear Products
I Ell Ell I
Or, Call Customer Service at 1·800·548·6132 (USA Only)
GAIN SELECTION
Gain selection is accomplished by connecting ihe appropriate pins together on the INA II O. Table I shows possible
gains from the internal resistors. Keep' the connections as
short as possible to maintain accuracy.
CONNECT PIN 3
TO PIN
GAIN
GAIN
ACCURACY (%)
are eliminated since they are inside the feedback loop.
Proper connection is shown in Figure 1. When more current
is to be supplied, a power booster can be placed within the
feedback loop as shown in Figure 5. Buffer errors are
minimized by the loop gain of the output amplifier.
GAIN
DRIFT (ppm/'C)
R,
The following gains have guaranteed accuracy:
none
13
12
16
11
1
10
100
200
500
0.02
0.05
0.1
0.2
0.5
10
10
20
30
50
VOUT
Output Stage Gain
The following gains have typical accuracy as shown:
300
600
700
800
12.16
11.12
11.16
11.12.16
0.25
0.2~
2
2
(R21120kQ) + R, + R,
= R2 1120kQ
10
40
40
80
,....
fiGURE 4. Gain Adjustment of Output Stage Using H Pad
Attenuator.
TABLE I. Internal Gain Connections.
Gains other than 1, 10, 100, 200, and 500 can be set by
adding an external resistor, R G , between pin 3 and pins 12,
16, and 11. Gain accuracy is a function of Ra and the internal
resistors which have a ±20% tolerance with 20ppml°C drift.
The equation for choosing Ra is shown below.
=
R
G
G= 100,1k
~
11
10
0.01%
--
...
II:
!
10
100
Frequency (Hz)
1k
10k
10
./
0.1%
100
1000
Gain (VN)
BURR~BROWNI!II
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Burr-Brown Ie Data Book--Linear Products
113131
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
TA == +25°C, Vs
= ±15V unless otherwise noted.
INPUT BIAS CURRENT vs TEMPERATURE
OFFSET VOLTAGE WARM-UP vs TIME
~
J
75
300
50
200
25
100
~
10n
~
J
>'8
~
i
~ -25
-100
Jl!
(I! -50
-200 a:
i
~
~
'*
1n
~
10 100p
1!::>
'-'
10p
~-'-c:_:==~~= c:::-~~=: ~.).zy:-=~ ~~
5
1p
- r::=:-: -~ "-:~~Y.::--::-~r==
~
Co
__
.E
-300
!
!!.::.l
~G=10~\ G=1k
iii
.E
.-10~
5Co
G=1
G= 10
+10p
-100~
'-'
m
~F
.E
+1p
G-1k~=1
+100p
-20
+15.7V
+15.7V=
-15
-10
-5
o
5
10
15
20
+10p
-20
-15
Differential Overload Voltage (V)
NOTE: One input grounded.
-10
-5
o
5
Z
•
10
-10~
+1p
125
-10m
-.~--
--
._._-
Co
100
C/)
INPUT BIAS CURRENT
-~
5
75
vs COMMON-MODE INPUT VOLTAGE
-100~
iii
50
INPUT BIAS CURRENT
1!::>
'-'
25
Temperature ('C)
-1m
~
0
va DIFFERENTIAL INPUT VOLTAGE
r-- -15.7V
....
....
....
0.1p
10
15
20
"0
~
25
1\
20
~
"-
15
"
10
"-
5
~
-z
50
«
40
~_
30
S
E
«
t;
OUTPUT CURRENT LIMIT vs TEMPERATURE
c3
'"~
C~/l
"'
0
1k
10k
100k
1M
':i;-
20
r--
r-- ~
10
----
o
10M
Frequency (Hz)
,ElEI,
------ ---
-75
--50
-25
0
25
50
75
100
125
Temperature ('C)
BURR - BROWN--~--+-;Nv~
V,;.
OUTPUT VOLTAGE SENSE
(SOL-16 Package Only)
Load
'-------+--.r.t.I~
The surface-mount version of the INAlll has a separate
output sense feedback connection (pin 12). Pin 12 must be
connected, usually to the output terminal, pin 11, for proper
operation. (This connection is made internally on the DIP
version of the INAll1.)
The output feedback connection can be used to sense the
output voltage directly at the load for best accuracy. Figure 8
shows how to drive a load through series interconnection
resistance. Remotely located feedback paths may cause
instability. This can be generally be eliminated with a high
frequency feedback path through Ct.
/"'1'1
Equal resistance here preserves
good common-mode rejection.
-:-
FIGURE 8. Remote Load and Ground Sensing.
C,
0----11---------1
A,
A,
v," o--.JV\JL--;-----I
NOTE: To preserve good low frequency CMA,
make A, = A2 and C, = C2·
FIGURE 9. High-Pass Input Filter.
V,~
o--.JV\JL--;-----I
A, =A2
C, =C2
±6Vlo±18V
Isolated Power
C3 = 10C,
v+ v-
FIGURE 6. Input Low-Pass Filter.
+10V
Isolated
Common
FIGURE 10. Galvanically Isolated Instrumentation Amplifier.
FIGURE 7. Bridge Transducer Amplifier.
IURR-BRDWNI8I
4.72
Burr-Brown Ie Data Book-Linear Products _1511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
V,N
V,N
+
R,
lM11
/
r--:
~C
". I I
i-3dB=
~
1.59Hz
MakeGsl0where G = 1 +
FIGURE II. AC-Coupled Instrumentation Amplifier.
~
FIGURE 12. Voltage Controlled Current Source.
CJ)
a:
w
iL
::::;
NOTE: Driving lhe shield minimizes CMR degradation
due to unequally distributed capacitance on the input
line. The shield is driven at approximately 1V below
the common-mode input voltage.
D.
ForG =100
RG = 51 H1 II 2(22.1 kn)
effective RG =50511
:E
c(
z
o
~
~
FIGURE 13. Shield Driver Circuit.
Z
w
:E
+5V
Q
Channell
a:
MPC800
MUX
Channel B
::l
V,N : 0-----1
V,N
ADS574
t;
12 Bits
Out
-z
: 0-----1
FIGURE 14. Multiplexed-Input Data Acquisition System.
BURR~BROWN@
I E:lE:II
Burr-Brown Ie Data Book-Linear Products
4.73
For Immediate Assistance, Contact Your Local Salesperson
BURR-BROWN@
INA114
IE:lE:lI
Precision
INSTRUMENTATION AMPLIFIER
FEATURES
DESCRIPTION
• LOW OFFSET VOLTAGE: 50ItV max
The INAl14 is a low cost, general purpose instrumentation amplifier offering excellent accuracy. Its versatile 3-op amp design and sinall size make it ideal for a
wide range of applications.
• LOW DRIFT: O.25ItV/oC max
• LOW INPUT BIAS CURRENT: 2nA max
• HIGH COMMON-MODE REJECTION:
115dB min
• INPUT OVER-VOLTAGE PROTECTION:
±40V
• WIDE SUPPLY RANGE: ±2.25 to ±18V
• LOW QUIESCENT CURRENT: 3mA max
• 8-PIN PLASTIC AND CERAMIC DIP,
SOL-16
APPLICATIONS
• BRIDGE AMPLIFIER
A single external resistor sets any gain from 1 to 10,000.
Internal input protection can withstand up to ±40V
without damage.
TheINAl14 is laser trimmed for very low offset voltage
(50J.lV), drift (0.25J.lV/°C) and high common-mode
rejection (115dB at G = 1000). It operates with power
supplies as low as ±2.25V, allowing use in battery
operated and single 5V supply systems. Quiescent current is 3mA maximum.
The INA1l4 is available in 8-pin plastic and ceramic
DIPs, and SOL-16 surface-mount packages, specified
for the -40°C to +85°C temperature range.
• THERMOCOUPLE AMPLIFIER
• RTD SENSOR AMPLIFIER
• MEDICAL INSTRUMENTATION
• DATA ACQUISITION
V,N
Feedback
(12)
DIP Connected
Internally
>-.;-6":-c--+O Vo
(11)
5
(10)
+
V,N
Ref
tntemational Airport IndustJlal Park • Mailing Address: PO Box 11400
Tucson, AZ 85734 • Slreet Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tet: (602) 746-1111 • Twx: 910.952·1111 • Cable: BBRCORP • Tetex: 066-6491 • FAX: (602) 669-1510 • Immediate Product Info: (&DO) 546-6132
4.74
PDS-1142C
BURR-BROWN~
,ElElI
Or, Call Cuslomer Service al·1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At T,' +25'C, Vs' ±t5V, RL• 2kn unless otherwise noted.
INAl14BP, BG, BU
PARAMETER
CONDITIONS
INPUT
Offset Voltage, RTI
Initial
vs Temperature
vs Power Supply
Long-Term Stability
Impedance, Differential
MIN
T,,"" +25°C
TA=TMlNtoTuAX
Vs ·±2.25Vto±18V
Common-Mode
Input Common-Mode Range
Sale Input Vo~age
Common-Mode Rejection
±11
VeM ' ±10V, dRs. lkn
G.l
G.l0
G.l00
G.l000
80
96
110
115
TYP
INAl14AP, AG, AU
MAX
±10+20/G 1±50_+ 100/G
±0.1 +0.5/G ±0.25+ 5/G
0.5+ 2/G
3+ 1DIG
±0.2+ O.51G
10" 116
10"116
±13.5
±40
96
115
120
120
~5
±2
v~;~:,:,~~~:,~,~"
±~5
±2
t + (50k!llR,,)
Gain vs Temperature
50kQ Resistance(1)
Nonlinearity
OUTPUT
Voltage
±D.Ot
±0.02
±D.05
±0.5
±2
±25
±O.OOOt
±0.0005
G·t
G. to
G.l00
§..j()OJL
10 = SmA. TMiN to TMA.lC
V,.±lt.4V, RL=2kn
V" ±2.25V, RL• 2kn
1o~~~~
±13.5
±to
±1
Load CapaCitance Stability
Short Circuit Current
FREQUENCY RESPONSE
Bandwidth, -3dB
Slew Rate
Settling Time,
O.Ot%
Overload Recovery
G. t
G.l0
G. tOO
G.1000
Vo ·±tOV,G.l0
G·l
G. to
G. too
G.l000
50% Overdrive
POWER SUPPLY
Voltage Range
Current
TEMPERATURE RANGE
Specilication
Operating
8J~
0.3
±2.25
V'N'O V
10000
±D.05
±D.4
±D.5
±t
±to
±tOO
±0.001
±0.002
··
t
100
10
1
0.6
18
20
120
tl00
20
-40
-40
·
··
···
·
·
··
·
·
·
UllpF
UllpF
V
V
dB
dB
dB
dB
nA
pArC
pr;.:,C
~Vp-p
pAlv'HZ
p~
±0.002
±0.004
V/V
V/V
%
%
%
%
ppm/'C
ppm/'C
%oIFSR
%oIFSR
o;oo~:
~~:~~~
··
±0.5
±0.7
±2
±10
V
V
V
pF
mA
0
2.0
1.8
-75
50
75
100
-15
-40
125
60
85
QUIESCENT CURRENT AND POWER DISSIPATION
vs POWER SUPPLY VOLTAGE
..,sO
-25
0
25
«g
2.6
120
2.5
100
§"
E 2.4
-----50
75
100
:>
C.l
Power Dissipa1ion
2.3
E
.~
2.2
.....-V
0
2.1
/c uiescent Current
40
o
±6
±3
~
!
a.
2.0
125
~"
20
i-"'"
±9
±12
±15
0
±18
NEGATIVE SIGNAL SWING vs TEMPERATUE (R, =2kn)
-16
12
60
g
Power Supply Voltage (V)
Vs =±15V
14
80
,.. / "V
;g
POSITIVE SIGNAL SWING vs TEMPERATUE (R, = 2kn)
I>
35
r--:Jlcd
QUIESCENT CURRENT vs TEMPERATURE
16
.
10
--
~
Temoerature (OCI
Tempera1ure (OCI
~
-
-
....... +11cL1
Temperature (OCI
------
:>
C.l
15
10
-25
2.8
1
--- --
E
r--
VS=~15V- f - -
-14
Vs =±11.4V
f----
Vs=±11.4V f----
10
8
'3
9:>
0
4
Vs = ±2.25V
2
o
-75
-so
Vs = ±2.25V -
-2
o
-25
0
25
50
Temperature (OC)
75
100
125
-75
..,sO
-25
25
50
75
100
125
Temperature (OC)
BURR-BROWNe
4.80
Burr-Brown Ie Data Book-Linear Products
I EilEiII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
AI T, = +25"C, V,= ±15V, unless otherwise noled.
LARGE SIGNAL RESPONSE, G = 1
SMALL SIGNAL RESPONSE. G
=1
+10V
+100mV
a
o
-10V
-200mV
....
....
~
-----+-,l'lv~
Load
'-------+-/..."N/~
Equal resistance here preserves
good common~mod9 rej$CI:ion.
-:-
FIGURE 5. Remote Load and Ground Sensing.
FIGURE 6. Buffered Output for Heavy Loads.
o--Pi=====A-J
,N o--'ct=======~±t-I
V,N
V
~-t:::YJ~~
Shield is driven at the
common·mode potential.
1000
ForG~
100
Aa ~ 511r.l1/2(22.1kr.l)
effective Aa =505r.l
FIGURE 7. Shield Driver Circuit.
BURR~BROWNe
4.84
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
Equal line resistance here creates
a small commonMmode voltage
which is rejected by INA114.
RTD~1!N
2
!y,{'-----"I\I\i"-......- - - l
3
Ivv;.,\...._ _ _ _ _ _---,
l
Resistance in this line causes
a small common-mode voltage
~
,...
,...
which is rejected by INA114.
----,,\/1/'---,
A,
IB Error
OPA1??
OPA602
OPA128
±1.5nA
1pA
?5fA
FIGURE 13. Differential Voltage to Current Converter.
BURR,· BROWN@
4.86
Burr-Brown Ie Data Book-Linear Products
IElElI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BROWN®
INA115
IE3IE3II
Precision
INSTRUMENTATION AMPLIFIER
it)
.....
.....
c(
FEATURES
DESCRIPTION
• LOW OFFSET VOLTAGE: 50~V max
• LOW DRIFT: O.25~V/oC max
• LOW INPUT BIAS CURRENT: 2nA max
The INA liS is a low cost, general purpose instrumentation amplifier offering excellent accuracy. Its versatile three-op amp design and small size make it ideal
for a wide range of applications. Similar to the model
lNA1l4, the lNAllS provides additional connections
to the input op amps, A, and A2 , which improve gain
accuracy in high gains and are useful in forming
switched-gain amplifiers.
• HIGH COMMON-MODE REJECTION:
115dB min
• INPUT OVER-VOLTAGE PROTECTION:
±40V
• WIDE SUPPLY RANGE: ±2.25 TO ±18V
• LOW QUIESCENT CURRENT: 3mA max
• SOL-16 SURFACE-MOUNT PACKAGE
APPLICATIONS
• SWITCHED-GAIN AMPLIFIER
• BRIDGE AMPLIFIER
• THERMOCOUPLE AMPLIFIER
• RTD SENSOR AMPLIFIER
.. iViEDICAL INSTRUMENTATION
A single external resistor sets any gain from I to
10,000. Internal input protection can withstand up to
±40V without damage.
-Z
en
a:
w
u:::
:::i
c.
:E
c(
The lNAllS is laser trimmed for very low offset
voltage (50J.!V), drift (0.25J.!VrC) and high commonmode rejection (1l5dB at G=IOOO). It operates with
power supplies as low as ±2.25V, allowing use in
battery operated and single 5V supply systems. Quiescent current is 3mA maximum.
o
~
~
The lNAI15 is available in the SOL-16 surface-mount
package, specified for the -40°C to +85°C temperature range.
:E
• DATA ACQUISITION
z
Z
w
:::;
a:
ten
-Z
-
V,N
Feedback
12
>--+1""1-+-0 Vo
+
V,N
>--+-v'VV'--<>---MI'----+--o Ref
10
V-
Intemational Airport Industrial Park • Mailing Address: PO Box 11400
Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602) 746-1111 • Twx: 911J.952·1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (602) 889-1510 • Immediate Product Info: (800)548-6132
PDS·1169A
4.87
For Immediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
At T.= +25'C, V,= ±15V,
f\ = 2kU unless otherwise noted.
INA115BU
PARAMETER
CONDITIONS
INPUT
Offset Voltage, RTI
Initial
vs Temperature
vs Power Supply
Long-Term Stability
Impedance, Differential
Common-Mode
Input Common-Mode Range
Safe Input Voltage
Common-Mode Rejection
BIAS CURRENT
vs Temperature
OFFSET CURRENT
vs Temperature
NOISE VOLTAGE, ATI
f= 10Hz
f = 100Hz
f= 1kHz
f,=O.IHztoIOHz
Noise Current
f=10Hz
f=1kHz
fe= O.IHz to 10Hz
GAIN
Gain Equation
Range of Gain
Gain Error
Gain vs Temperature
50kU Resistance'"
Nonlinearity
OUTPUTt'>
Voltage
Slew Rate
Settling Time,
Ove~oad
T.= +25'C
TA=TMINtoTMAX
V, = t2.25V to tl8V
±II
0.01%
Recovery
POWER SUPPLY
Voltage Range
Current
TEMPERATURE RANGE
Specification
Operating
9"
TYP
INA115AU
MAX
MIN
±10+2O/G ±50+ 100/G
to.1 +O.51G ±0.25+ 5/G
0.5 + 2IG
3 + IO/G
to.2 + O.51G
1010 116
1010 116
t13.5
TYP
80
96
110
115
96
115
120
120
±0.5
···
··
75
90
106
106
·
·
90
106
110
110
±2
±6
±0.5
MAX
±25+30/G ±125+ 500/G
±I +IO/G
±0.25+ 51G
±40
VOM =±IOV, AR,= lkU
G=I
G= 10
G=IOO
G = 1000
·
±2
±5
±5
±6
G = 1000, Rs = 00
·
·
15
II
II
0.4
0.4
0.2
18
1+ (50kU/R.l
I
±D.OI
±D.02
±D.05
±0.5
±2
±25
±D.OOOI
±0.0005
±D.0005
±0.002
G=I
G= 10
G=loo
G = 1000
G=I
G=I
G=IO
G= 100
G = 1000
10 = SmA, TMIN to TMAX
V,=tll.4V, RL = 2kU
V,= ±2.25V, RL = 2kU
Load Capacitance Stability
Short Circuit Current
FREQUENCY RESPONSE
Bandwidth, -3dB
MIN
G=I
G=IO
G= 100
G = 1000
Vo = ±IOV, G = 10
G=I
G= 10
G= 100
G = 1000
50% Overdrive
±13.5
tlO
±I
0.3
t2.25
V1N=OV
10000
±0.05
±D.4
±D.5
±I
·
tlO
±IOO
±O.OOI
to.002
±0.002
±D.OI
··
·
±13.7
±10.5
±1.5
1000
+20/-15
I
100
10
I
0.6
18
20
120
1100
20
tl5
±18
±2.2
±3
-40
-40
+85
+125
·
·
80
• Specification same as INA115BU.
NOTE: (I) Temperature coefficient of the "50kU" term in the gain equation. (2) Output specifications are for output amplHier,
voltage swing but have less output current drive. A, and A. can drive external loads of 25kQ II 200pF.
·
·
··
··
··
··
·
·
"V
"V/'C
"VN
"Vlmo
OllpF
OllpF
V
V
dB
dB
dB
dB
nA
pA/'C
nA
pA/'C
nV/-[Hz
nV/-[Hz
nVl-[Hz
"Vp-p
pAl-[Hz
pAl-/Hz
pAp-p
·
±D.5
to.7
±2
±IO
to.002
±0.004
±0.004
±0.02
VN
VN
%
%
%
%
ppml'C
ppml'C
%ofFSR
%ofFSR
%ofFSR
%ofFSR
V
V
V
pF
mA
·
·
··
··
··
·
UNITS
MHz
kHz
kHz
kHz
VlJ1S
"S
J1S
J1S
IlS
J1S
··
·
V
mA
'C
'C
'CIW
A.. A, and A, provide the same output
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for Inaocuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such Information shall be entirely at the user's own risk. Prices and specifications are subject to change
wHhout notice. No petent rights or licenses to any of the cireuHs described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
4.88
Burr-Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
PIN CONFIGURATIONS
U Package
V o,
1
t(]\ ELECTROSTATIC
\.f::I DISCHARG E SENSITIVITY
SOL-16 Surface-Mount
TOp View
0
16 NC
Gain Sense,
R"
RG
V+
V+ 1N
Feedback
Vo
VVo.
INA115AU
INA115BU
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
,...
,...
it)
ABSOLUTE MAXIMUM RATINGS
Ref
9
8
Supply Voltage .................................................................................. ±18V
Input Voltage Range .......................................................................... ±40V
Output Short-Circuit (to ground) .............................................. Continuous
Operating Temperature ................................................. -40'C to +125'C
Storage Temperature ..................................................... -40'C to + 125'C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, lOS) ............................................... +300"C
NC
PACKAGE INFORMATION(')
MODEL
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
PACKAGE DRAWING
NUMBER
SOL-16 Surlace-Mount
SOL-16 Surlace-Mount
211
211
MODEL
INA115AU
INA115BU
PACKAGE
TEMPERATURE RANGE
SOL-16 Surlace-Mount
SOL-16 Surlace-Mount
-40'C to +85'C
-40'C to +85'C
w
u::
:::i
:i
ien"
-
_.
-----
0.01%
---
400
V__
,....
,....
It)
II 0.1%
1/ 111I
200
...
"/
-
10
-+1111
100
i
60
75
105
90
Time from Power Supply Turn-on (s)
INPUT BIAS AND INPUT OFFSET CURRENT
vs TEMPERATURE
INPUT BIAS CURRENT
vs DIFFERENTIAL INPUT VOLTAGE
--±-I.---I-----------+-----+-----
O~=±~~_ _~==~~
~~=-=--=:..::::::::--5
"'
~m
-1~----~----~----+_----+_--~
iii
<3
0
.~
-
i
VI
- - - -I---
ID
-
-1
35
60
:E
i
---
~ 0.4
f...---
<:
S
;g
~
"
i!
(/)
o
--_.-
-~--
-50
-25
25
50
75
100
-40
125
-15
10
Temperature (OC)
~
<>
<:
-~
I-- I--
-
r-
I-
---
I-- r--
2.0
1.8
-75
r-
--
EQ) 2.4
""
<>
2.3
.~
2.2
"
S
60
~
-gj"-
2.1
-50
-25
25
50
75
100
r-----
Vs = ±11.4V
i==
;0
0
20
±9
±12
0
±1a
±15
NEGATIVE SIGNAL SWING
VB =
-14
~ -12
8
g
-8
%
6
~
-6
o
~15V- r-----
VB = ±11.4V
f----
Vs = ±2.25V
I---
-10
-4
-
Vs= ±2.25V
TEMPERATUE (RL = 2kQ)
.-.~
1l!0
>
4
VB
-16
i
2
Ii;
"-
Power Supply Voltage (V)
t----+---I---I----r---f-Vs = ±15V
12
±6
±3
<=
Ci
40
V
125
;:
0
/
,/
0
10
0
80
~centcurrent
E
Q)
POSITIVE SIGNAL SWING vs TEMPERATUE (RL = 2kQ)
'5
---+-- 7
2.0
16
C>
100
Power DiSjiPatiO':'
Temperature (Oe)
Q)
--
I
S
g 2.2
~
85
120
2.5
2.6 - - -
14
60
2.6
E
8"
35
QUIESCENT CURRENT AND POWER DISSIPATION
VB POWER SUPPLY VOLTAGE
QUIESCENT CURRENT vs TEMPERATURE
2.4
--:llcd
Temperature (OC)
2.8
E
-r---
15 - - - - - ~-
---
...............
10
-75
<:
S
-
--........ r--. +llcd
--
20
(3
0.2
-_._-
-2
I--
0
-75
-50
-25
25
50
Temperature (0G)
75
100
125
-75
-50
-25
25
50
75
100
125
Temperature eC)
BURR· BROWN®
4.92
Burr-Brown Ie Data Book-Linear Products
IE:lE:lI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
AIT.= +25'C, Va= ±15V, unless o1herwise n01ed.
SMALL SIGNAL RESPONSE, G = 1
LARGE SIGNAL RESPONSE, G = 1
+10V
+100mV
o
o
-10V
-200mV
It)
,...
,...
--+1-C-
.A,
1+ V>-.....--1J125i!\kilJ'--+----2J1IJ"kil'J----+-10-I'-::-1
V
--==-
1~__~~_______~8
HI-509
8
A,
-15V
L
H
Gain
L
L
L
H
H
H
+
Y'N
GAIN STEPS
1,10, 100, 1000
1,2,4,8
Highest
1,2,5,10
0, +3, +6, +9dB
R,
(0)
R,
R,
R,
(0)
(0)
(0)
2.5k
12,5k
15k
17.7k
55,6
12.5k
10k
60.3k
500
12,5k
2,5k
12.5k
10k
25k
17.7k
15k
FIGURE 2. Switched-Gain Instrumentation Amplifier (minimum components).
BURR~BROWN®
I E:I E:l1
Burr-Brown Ie Data Book--Linear Products
4.95
t;
-z
For Immediate Assistance, Contact Your Local Salesperson
V,N
+15V
9
14
13
2
NCo-~r-------------~'VV~~
NCo-~--------------~VL-.
3
~--+-~--~--------------------~
B
7
B
+
V,N
-15V
Po"
At
Gain
L
H
L
H
L
L
H
H
1
Highest
R,
R,
R,
R.
R,
lie
R,
GAIN STEPS
(U)
(U)
(U)
(U)
(U)
(U)
(U)
1,10, 100, 1000VN
1Bk
1Bk
1Bk
1Bk
1.Bk
9k
10.Bk
12.74k
1BO
4.5k
3.6k
9.02k
40
9k
7.2k
43.7k
1BO
4.5k
3.6k
9.02k
1.Bk
9k
10.Bk
12.74k
1Bk
1Bk
1Bk
1Bk
1,2,4, BVN
1,2,5,10VN
0, +3, +6, +9dB
FIGURE 3. Switched-Gain Instrumentation Amplifier (improved gain drift).
Microphone,
Hydrophone
etc.
Thermocouple
FIGURE 4. Optional Trimming of Output Offset Voltage.
Center-tap provides
bias current retum.
FIGURE 5. Providing an Input Common-Mode Current Path.
4.96
Burr-Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1-800-548-6132 (USA Only)
INPUT COMMON-MODE RANGE
The linear common-mode range of the input op amps of the
INAIIS is approximately±13.7SV (or 1.2SVfrom the power
supplies). As the output voltage increases, however, the linear
input range will be limited by the output voltage swing of the
input amplifiers, Al and 1..,. The common-mode range is
related to the output voltage of the complete amplifier-see
performance curve "Input Common-Mode Range vs Output
Voltage."
A combination of common-mode and differential input signals can cause the output of Al or A2 to saturate. Figure 6
shows the output voltage swing of Al and A2 expressed in
terms of a common-mode and differential input voltages.
Output swing capability of the input amplifiers, Al and A, is
the same as the output amplifier, A3 • For applications where
input common-mode range must be maximized, limit the
output voltage swing by connecting the INA I IS in a lower
gain (see performance curve "Input Common-Mode Voltage
Range vs Output Voltage"). If necessary, add gain after the
INAllS to increase the voltage swing.
Input-overload often produces an output voltage that appears
normal. For example, an input voltage of +20V on one input
and +40V on the other input will obviously exceed the linear
common-mode range of both input amplifiers. Since both
input amplifiers are saturated to the nearly the same output
voltage limit, the difference voltage measured by the output
amplifier will be near zero. The output of the INAIIS will be
near OV even though both inputs are overloaded.
INPUT PROTECTION
The inputs of the INAllS are individually protected for
voltages up to ±40V. For example, a condition of-40V on one
input and +40V on the other input will not cause damage.
Internal circuitry on each input provides low series impedance
undernormal signal conditions. To provide equivalent protection, series input resistors would contribute excessive noise. If
the input is overloaded, the protection circuitry limits the input
current to a safe value (approximately l.SmA). The typical
performance curve "Input Bias Current vs Common-Mode
Input Voltage" shows this input current limit behavior. The
inputs are protected even if the power supply voltage is zero.
OTHER APPLICATIONS
It)
;::
--+-.JI\N---<>---JV\I'--t-o Ref
____________~__________~
V-
Dlfef®; Burr-Brown Corporation
Internalional Airport Induslrial Park • Mailing Address: PO Box 11400 • Tucson, AI 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AI 85706
Tel: (602) 746-1111 • Twx: 910-952·1111 • Cable: BBRCORP • Telex: 061>6491 • FAX: (602) 889-1510 • Immediate Producllnfo: (SOD) 548-6132
4.98
PDS·1242
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
TA : +25°C, Vs = ±15V, RL : 10kO unless otherwise noted.
INAI16P, U
PARAMETER
CONDITIONS
INPUT
Offset Voltage, RTI
Initial
MIN
TA=TMINtoTMAX
Vs: ±4.5V to ±IBV
Bias Current
VB
Temperature
Offset Current
VB
Temperature
Impedance, Differential
Common-Mode
Linear Input Voltage Range
NOISE
Voltage Noise, RTI
f: 1kHz
te: O.IHz to 10Hz
Current Noise
f: 1kHz
VCM : ±10.5V, aRs: lkO
G: I
G: 10
G: 100
G: 1000
(V+)-4.5
(V-)+3.0
±40
(V+)-3.5
(V-)+2.0
80
96
106
106
90
110
115
115
Gain vs Temperature
50kO Resistance(1 )
Nonlinearity
±0.01
±0.25
±0.35
±1.25
±5
±25
±O.0005
±O.OOI
±O.OOI
±0.005
G: I
G: 10
G: 100
G: 1000
GUARD OUTPUTS
Offset Voltage
Output Impedance
±I
I
+2/-0.05
Current Drive
OUTPUT
Voltage Positive
Negative
Load Capacitance Stability
RL : 10kO
RL : 10kn
(V+) -I
(V-) +0.35
Short Circuit Current
FREQUENCY RESPONSE
Bandwidth, -3dB
Slew Rate
Settling Time, 0.01 %
Overload Recovery
POWER SUPPLY
Voltage Range
Current
G: 1
G: 10
G: 100
G: 1000
Yo: ±IOV, G : 10 to 200
G: I
G: 10
G: 100
G : 1000
50% Overdrive
73
90
100
100
V,N : OV
TEMPERATURE RANGE
Specification
Operating
9JA
-40
-40
±150
fA
Q
Q
V
V
V
··
·
dB
dB
dB
dB
nV/-iHZ
"Vp-p
fAJ-iHZ
··
±0.5
±0.7
±2
±20
±Ioo
±0.005
±0.01
±0.01
±0.04
·
±IO
.
·
·
V
V
pF
rnA
kHz
kHz
kHz
kHz
VI,,"
·
±IB
VN
VN
%
%
%
%
ppml"C
ppm?C
% of FSR
% of FSR
% of FSR
% of FSR
mV
kO
rnA
··
·
··
B5
125
BO
±150
mV
"VloC
INN
"Vlmo
fA
·
·
··
··
··
1000
±O.05
±O.4
±O.5
±1.75
±IO
±IOO
±0.005
±0.005
±0.005
±O.02
(V+) -0.7
(V-) +0.2
1000
+51-12
±15
±I
±5±10/G
±10±30/G
±20±100/G
··
BOO
500
70
7
0.8
22
25
145
400
20
±4.5
±0.2±0.5/G
±1±51G
.
0.2
G: I
G: 10
G: 100
G: 1000
G: I
UNITS
·
I +(50k.Q/RG)
Gain Error
MAX
·
24
2
I
TYP
··
G : 1000, Rs : on
GAIN
Gain Equation
Range of Gain
..
MIN
>10 12
>10 '2
Safe Input Voltage
Common-Mode Rejection
INAI16PA, UA
MAX
±0.2±0.5/G
±1±51G
±0.5 ±2/G
±5±30/G
±I ±IO/G
±IO ±IOO/G
±I +20/G
±IO
±75
Doubles Every Ie °C
±75
±IO
I
I
Doubles Every 10°C
T A = +25°C
vs Temperature
vs Power Supply
Long-Term Stability
TYP
""
""
""""""
·
V
rnA
·
°CIW
°C
°C
• Specification same as INA116P
NOTE: (I) Temperature coeficient of the "50kO" term in the gain equation.
The information provided herein is believed to be reliable; however, BURR·BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no respon~bility for the use of this
information, and all use of such information shall be entirely at the user's own risk. Prices and speoilications are subject to change without notice. No patent rights or liDenses to any of the drcuits described
herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use In life support dev~es and/or systems.
BURR~BROWN@
11131131
Burr-Brown Ie Data Book-Linear Products
4.99
CD
,....
,....
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Z
-
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~
~
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Forlmmediate Assistance, Contact Your Local Salesperson
I:RR-BROWN®
INA117
ElEII
High Common-Mode Voltage
DIFFERENCE AMPLIFIER
FEATURES
APPLICATIONS
• COMMON-MODE INPUT RANGE:
±200V (Vs = ±15V)
• CURRENT MONITOR
• BATTERY CELL-VOLTAGE MONITOR
• PROTECTED INPUTS:
±500V Common-Mode
±500V Differential
• GROUND BREAKER
• INPUT PROTECTION
• SIGNAL ACQUISITION IN NOISY
ENVIRONMENTS
• UNITY GAIN: 0.02% Gain Error max
• NONLINEARITY: 0.001% max
• FACTORY AUTOMATION
• CMRR: 86dB min
DESCRIPTION
The INA117 is a precision unity-gain difference
amplifier with very high common-mode input voltage
range. It is a single monolithic Ie consisting of a
precision op amp and integrated thin-film resistor
network. It can accurately measure small differential
voltages in the presence of common-mode signals up
to ±200V. The INA117 inputs are protected from
momentary common-mode or differential overloads
up to ±SOOV.
In many applications, where galvanic isolation is not
essential, the INA117 can replace isolation amplifiers.
This can eliminate costly isolated input-side power
supplies and their associated ripple, noise and quiescent current. The INAl17's 0.001% nonlinearity and
200kHz bandwidth are superior to those of conventional isolation amplifiers.
The INA 117 is available in 8-pin plastic mini-DIP and
SO-8 surface-mount packages, specified for the ooe to
+700 e temperature range. The metal TO-99 models are
available specified for the -2Soe to +8S oe and -ssoe
to +125°e temperature range.
In\ernaUonal Airport Industrial Park • Mailing Address: PO Box 11'400 • Tucson, AZ 85734 • StreeI Address: 6730 s. Tucson Blvd. • Tucson, AZ 85706
Tel: (602) 746-1111 • Twx: 91N52-1111 .' Cable: BBRCORP • Telex: 06H491 • FAX: (602) 118901510 • Immediate Product Info: (600) 548-6132
4.100
PDS-74l1P
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At TA = +25"<:, V. : ±15V unless otherwise noted,
INA117AM, SM
PARAMETER
CONDITIONS
MIN
GAIN
Initial (1)
Error
vs Temperature
Nonlinearity (21
OUTPUT
Rated Voltage
Rated Current
Impedance
Current Umij
Capacitive Load
10 : +20mA, -5mA
10
+20, -5
Vo: 10V
INA117BM
TYP
MAX
1
0.01
2
0.0002
0.05
10
0.001
MIN
INA117P, KU
TYP
MAX
·
0.02
MIN
Voltage Range
Common-Mode Rejection
DC
AC,60Hz
vs Temperature, DC
AM, BM, P, KU
SM
To Common
Stable Operation
1+~900013
Differential
Common·Mode
Differential
Common-Mode, Continuous
800
400
V""
= 400Vp-p
V
mA
"
66
80
80
86
66
94
94
66
60
75
75
80
90
74
8.5
90
200
1000
40
80
25
550
Vo : 20Vp-p
30
2
Vo : 10V Step
Vo = 10V Step
V",,: 10V Step, VO'FF: OV
~~::=R SUPPLY
"
.
Derated Performance
Vo: OV
TEMPERATURE RANGE
Specification: AM, BM, P, KU
SM
Operation
Storage
mA
pF
.....
,....
,....
kG
kG
V
V
---1--,-0 Vo
4
V3 -v.
=~
1+--
R"
7
380kll
380kll
V,~~-v\~--~~--vVV'--'
Refer 10 Application
Bulletin AB-OOl for
details.
GAIN
R,
R,
(VN)
(kQ
(k~
1/2
1/4
1/5
1.05
3.16
4.22
20
20
20
FIGURE 10. Reducing Differential Gain.
FIGURE 11. Summing Vx in Output.
R,
3BCkO
R,
380....
Refer to Application Bulletin AB·01O for details. .
2
R,
R"
380kQ
380kll
6
V
3
3
Vom =Va -V,
INA117
8
-=-
5'
100pF
R"
5kll
(b)
R7
10kll
>-......---<~O -V3/20
FIGURE 12. Common-Mode Voltage Monitoring.
4.110
Burr-Brown Ie Data Book-Linear Products
(a)
Or, Call Customer Service at 1·800·548·6132 (USA Only)
,-------------------------~------~ +9V
7
380kO
380kO
~o-~~JVIJ~~~_.----~~_,
VCM Range =
+50V to +200V
(Vs = ±9V)
V3O-~~~~~--_.~
(a)
-3V > V0 > -{;V swap A, pins
2 and 3 for +4V > Vo > 3V.
r--
,...
,...
V0 > -{;V swap A, pins
2 and 3 for +4V > Vo > OV.
:!E
1r---{)Vo
Vo = ~ -I,
3
::J
0.
= 'LOAD
::i
20
10k
lk
lOOk
co
,....
,....
<.> -10
1
CD
"0
0
-1
~
-4
--5
--5
-10
15
10
4
~
...........
I---
"""G=1
0
3
4
5
1.,,::::::= i=""""'
-- -
J
10
-_.
~
G=
~V
1.:::::== P
0
-
G~
.......
b~
2
<.>
-1
INPUT COMMON-MODE RANGE
vs OUTPUT VOLTAGE
..... :::::-
3
E
E
-2
INPUT COMMON-MODE RANGE
vs OUTPUT VOLTAGE
CD
"0
0
~0
~
3~--~--~----~---r----r---~
CD
i
-4
Output Voltage (V)
5
~
-5
Output Voltage (V)
~M
.~
V""'~+5V
V"",=
1--.. --- -
.lv
2
3
CM
i..-
INA118
+
-:-
v
0
Ref
-:-
0
4
Output Voltage (V)
o
2
Output Voltage (V)
BURR - BROWN®
IElElI
Burr-Brown Ie Data Book-Linear Products
z
•
3
CD
E
E
lOOk
5
10
0
10k
FreQueney (Hz)
4
-80
.lk
100
FreQuency (Hz)
CD
~0
~=
10M
1M
15
,
~=10
I'-...
0
-20
~
~O
r--."
80
0
Gill
-10
100
0
::;;
C:
0
JJJJ6
F::
:9.
---
'"-; 20
IIII
iii 120
4.117
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
(CONn
At TA = +25°C, V, = ±t5V, unless otherwise noted.
NEGATIVE POWER SUPPLY REJECTION
VB FREQUENCY
POSITIVE POWER SUPPLY REJECTION
vs FREQUENCY
160
t60
iii"
:s
~
l
I
I
III
140
t40
I""'-
t20
tOO
......
80
.......
.......
.......
.......
iii"
:s
~199°
~iiO"
r--...
r-.....
r-.....
60
40
80
I
=1-
60
I
~
20
-.. G~10
100
l
~=tO
G~~
120
~
r-.....
II
~=1000
...........
40
0..
20
o
o
to
t
lk
100
10k
10
lOOk
100
lk
Frequency (Hz)
FrequencY (Hz)
INPUT- REFERRED NOISE VOLTAGE
vs FREQUENCY
1000
~
8
10
ill
z
=
"C
E
i= 100
"
~
()
l= tOOO 3WI.im
!3
iii
~
I
10
100
RL = 10kn
CL = 100pF
.3
. HO(
r---
u;-
·0
11
,;\:
h
lOOk
SETTLING TIME vs GAIN
100
~
10k
"
'"c:
I--
~
'"
...
·0.01%
...
-
/
I-- r-
I?-"
.E
(All Gains)
lk
0.1
0.1%
II
10
10k
10
100
1000
Gain (VN)
Frequency (Hz)
QUIESCENT CURRENT and SLEW RATE
VB TEMPERATURE
500 ,...--,...--,....--,....--,....--,....--,....--,....---, 1.5
VB
INPUT BIAS CURRENT
INPUT OVERLOAD VOLTAGE
10
8
~
~
8
~
~
400 I--t-----'''''''...-t---I--
300 1--t---t---t---t--"-t""''""-4 _G-l
If
I
I
G
I - I--
}G = 1000
~-e
-8
200 ' - _ l - _ l - _ l - _ l - _ l - _ l - _ l - - - - '
-75
-00
-25
25
50
Temperature (OC)
75
100
-10
-40
o
40
Overload Voltage (V)
BURR-BROWN®
4.118
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONn
At TA = +25°C, Va = ±15V, unless otherwise noted.
INPUT BIAS AND OFFSET CURRENT
vs TEMPERATURE
OFFSET VOLTAGE vs WARM-UP TIME
«
4
E
3
"~
2
.s
()
;;
I
~
0
~ -1
co
,....
,....
::! -2
1ii
5--3
Co
£-4
--*___IW'-------,IIN'--,
Y'N
+
A,
IBError
OPA177
OPA602
OPA128
±1.5nA
lpA
75fA
FIGURE 11. Differential Voltage to Current Converter.
BURR~B"OWNI!I
4.144
Burr-Brown Ie Data Book - Linear Products
I EilEiII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BROWN@
INA2128
IE:lE:lI
PRELIMINARY INFORMATION
SUBJECT TO CHANGE
WITHOUT NOTICE
Dual, Low Power
INSTRUMENTATION AMPLIFIER
ClO
....
C\I
C\I
FEATURES
DESCRIPTION
• LOW OFFSET VOLTAGE: 75~V max
The INA2128 is a low power, general purpose instrumentation amplifier offering excellent accuracy. Its
versatile 3-op amp design and small size make it ideal
for a wide range of applications. Current-feedback
input circuitry provides wide bandwidth even at high
gain (200kHz at 0=100).
• LOW DRIFT: O.75~V/oC max
• LOW INPUT BIAS CURRENT: 2nA max
• HIGH CMR: 110dB min
• INPUTS PROTECTED TO ±40V
• WIDE SUPPLY RANGE: ±2.25 to ±18V
A single external resistor sets any gain from 1 to 10,000.
Internal input protection can withstand up to ±40V
without damage.
• LOW QUIESCENT CURRENT: 1mA Total
• 16·PIN PLASTIC DIP, SOL·16
The INA2128 is laser trimmed for very low offset
voltage (75J.lV), drift (0.75J.lV/°C) and high commonmode rejection (llOdB at G 1000). It operates with
power supplies as low as ±2.25V, and quiescent current
is only 500J.lA per amplifier-ideal for battery operated
systems.
APPLICATIONS
=
• BRIDGE AMPLIFIER
• THERMOCOUPLE AMPLIFIER
• RTD SENSOR AMPLIFIER
The INA2128 is available in 16-pin plastic DIP, and
SOL-16 surface-mount packages, specified for the
-40°C to +85°C temperature range.
• MEDICAL INSTRUMENTATION
• DATA ACQUISITION
-___-Ml.......--NlI----+':.::.2- 0 Ref
40kll
vInternational Airport Industrial Park • Mailing Address: PO Box 11400
Tel: (602) 746·1111 • Twx: 911).952·1111 • Cable: BBRCORP •
Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Telex: 066-6491 • FAX: (602)889-1510 • Immediate Product Info: (8DD) 54&-6132
PDS·I244
4.147
For Immediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
At TA = +25'C, Vs= ±15V, RL 10kll unless otherwise noted.
Q
INA2141P, U
PARAMETER
CONDmONS
INPUT
Offset Voltage, RTI
MIN
G-l0
G=100
G=10
G=l00
G= 10
G= 100
G= 10
G=100
vs Temperature
vs Power Supply
Long-Term Stability
Impedance, Differential
Common-Mode
Linear Input Voltage Range
Safe Input Voltage
Common-Mode Rejection
INA2141PA, UA
TYP
MAX
±20
±15
0.5
0.2
2
1
1
0.5
1010 111
1010 114
(V+)-2
(V-) + 2
±150
±SO
3
1
15
5
97
107
110
120
±1
±ao
±1
±ao
NOISE VOLTAGE, RTI
f= 10Hz
f= 100Hz
f=lkHz
f,= O.lHz to 10Hz
G=l00,Rs =OO
±2
±25O
±15O
5
2
20
10
IIV
IIV
IIvrc
IIvrc
IIVN
IIVN
llV/mo
IIV/mo
OllpF
OllpF
V
V
V
±O.02
0.01
±1
±0.0005
±O.0005
G=l00
G= 10
G = 10, 100
G=Vl0
G= 100
OUTPUT
Voltage: Positive
Negative
Load Capacitance Stability
Short-Circuit Current
RL= 10k(}
RL= 10k(}
(V+)-l
(V-) +1
G=10
G= 100
Vo = ±10V, G = "10
G=10
G=100
50% Overdrive
POWER SUPPLY
Voltage Range
Current, Per Amplifier
···
TEMPERATURE RANGE
Specilication
Operating
6,.
±O.15
0.025
±10
±0.Q02
±0.002
··
(V+)-0.8
(V-) +0.8
1000
+51-12
700
200
4.5
6
8
4
±2.25
V'N=OV
±15
±500
-40
-40
±18
85
125
80
dB
dB
±5
±5
·
··
nA
pArC
nA
pArc
nV/{Hz
nV/{Hz
nV/{Hz
IIVp-p
··
0.5
0.3
25
Gain vs Temperature
Nonlinearity
.
±SO
±25
·
±2
25
12
12
0.6
GAIN
Gain Error
Recovery
UNITS
89
98
G=10,Rs = 00
Ove~oad
MAX
·
12
7
7
0.3
f= 10Hz
f= 100Hz
f= 1kHz
f, = O.lHz to 10Hz
Noise Current
f= 10Hz
f=lkHz
f,= O.lHz to 10Hz
Slew Rate
Settling Time, 0.01 %
TYP
±40
VeM = ±12.5V, aRs= lkll
G=10
G=l00
BIAS CURRENT
vs Temperature
Offset Current
vs Temperature
FREQUENCY RESPONSE
BandWidth, -3dB
MIN
nV/{Hz
nV/fflz
nV/fflz
IIVP-P
··
·
·
·
··
··
··
··
pAlfflz
pAlfflz
pAp-p
·
0.05
±0.004
±0.004
%
%
ppmfOC
%ofFSR
%of FSR
V
V
pF
mA
kHz
kHz
VIlIS
lIS
lIS
liS
·
··
V
IIA
'C
'C
'C/W
..
SpeciJ,catlon same as INA2141P, U.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. P~ces and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
BURR-BROWNiII
4.148
Burr-Brown Ie Data Book-Linear Products
IE!lE!lI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BROWN®
PGA102
1E3E31
High Speed
PROGRAMMABLE GAIN AMPLIFIER
N
o
,..
4 f--- f--- ---t--- +--1---1--..--
~ 3~~=i~i-_t~~G~=fl,~I~°f=~==t_l
OL--L~--~~--~~--L--L--L-~
~
00 00
Temperature COC)
100
100
1~
.
~
CD
1ii
12
11
10
0::
~
cij
Nigat~
8
7
V
--
l'
~~~
0
r---
~
--
~
00
r'\
f--
00
/
100
.......... ","oSitiVe
.- ~ I -
I /'
t\
\,
100
1~
-z
G=1
1/7
G=10
rf-
-G=100
\
"
-100
1~
Temperature (0G)
\
"-
a
2
4
6
8
'-...
10
12
Time (us)
BURR-BROWN@
I E!lE!II
Burr-Brown Ie Data Book-Linear Products
4.153
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
T, = +25OC, ±Vcc = 15VDC unless otherwise noted.
LARGE SIGNAL STEP RESPONSE
OVERLOAD RECOVERY vs INPUT OVERLOAD
10
10
G=l/
1r:--
j
-10
o
2>
4
6
1=
~
\
~
il
\-
8
a:
4 -
1
3
G=10
~
10
~=1
o
12
10
INPUT CROSSTALK vs FREQUENCY
100
100
.,
~
c:
Cl
-40
lk
lk
.
.~
.
~
V
G=100
E
\
-G=100
2
.
\
G=10
!J
t
/
9
'r-...
.:
f..- I-f..--
~
-
1M
~
Vee = ±5V
,I'
'r-...
20
o
o
1
10
100
lk
Freouencv (Hz)
10k
lOOk
1M
~
-40
~
0
~
~
80
80
100
1~
1~
Temperature (OC)
BURR-BROWNe
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APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation
of the PGA102. Power supplies should be bypassed with
O.IIJP capacitors located close to the device pins.
The inputs for each gain are independent and can be connected to three separate signal sources. Or, for many applications, the three inputs are connected in parallel to form a
single input-see Figure 1. Only the input corresponding to
the selected gain is active, operating as a non-inverting
amplifier. The two inactive inputs behave as open circuits.
The input bias current of the inactive inputs is negligible
compared to that of the selected input.
OFFSET ADJUSTMENT
The offset voltage of each of the three input stages is lasertrimmed. Many applications require no further adjustment.
The optional trim circuit shown in Figure 1 can be used to
adjust the offset voltage. This adjustment affects the offset
of all three gain channels. Since each gain setting may
require a different adjustment of the potentiometer, this
requires a compromise. Often, offset voltage of the G = 100
channel is the most important, so adjustment can be optimized for this channel only. Alternatively, Figure 2 shows a
CMOS switch used to select independent offset adjustment
potentiometers for each of the three channels.
Use these offset adjustment techniques only to null the offset
voltage of the PGA102. Do not null offset produced by the
signal source or other system offsets or this will increase the
temperature drift of the PGA102.
Optional
Offset
Trim
-15V
+15V
15
Adjust for
VOUT= OV
for all channels.
Output
Ground
+15V
==
c(
Z
o
~
~
Analog
Ground
Z
4016
w
CMOS
SWITCH
Logic "0": OV ~ V S O.BV
I ...... ~ ... "'" " • ..", ... ".,..
,\I
:!:
L-===~-'---'--L.......:.--,I ~~~;~ V~I;;g~; ~r; r:;:r~ed to pin 3.
Offset
Adjusts
FIGURE I. Basic Circuit Connections.
:::»
a:
t;
CHI CH2 CH3
6
5
13
z
DIGITAL INPUTS
Gain is selected by the digital input pins, "XlO" and "XlOO".
The threshold of these logic inputs is approximately 1.3V
above the voltage on pin 3. For CMOS or TIL logic signals,
connect pin 3 to logic ground. The logic inputs are not
latched. Any change logic inputs immediately selects a new
gain. Switching time is approximately IJ.lS. This does not
include the time required for the analog output to settle to a
new output value (see settling time specifications).
Note that the two logic inputs allow four possible logic
states-see Figure 1 for the logic table. A logic "1" on both
inputs is an invalid code. This will not damage the device,
but the analog output voltage will not be predictable while
this code is applied.
ABC
o 0 1 CHI
o CH2
o CH3
FIGURE 2. Independent Offset Adjustment of Channels 1, 2,
and 3.
GAIN ADJUSTMENT
Gain of the PGA102 is accurately laser trimmed and usually
requires no further adjustment. The optional circuit in
Figure 3 allows independent gain adjustment of the G = 10
and G = 100 inputs.
BURR-BROWN®
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The gain of the G = 10 and G = 100 inputs can be changed
by adding external resistors to the internal feedback network
as shown in Figures 4 and 5. The internal gain-set resistors
trimmed for precise ,ratios, not to exact values. The
internal resistor values are within approximately ±30% of
are
the nominal values, shown on the front page diagram. This
makes the external resistor values in Figures 4 and 5 subject
to variation-especially for gains differing greatly from the
initial value.
V'N1(Xl)
VIN1 (Xl)
V'N2(Xl0)
15
V'N2 (Xl0)
V'N,(Xl00)
V'N' (Xl 00)
RX10DN
Rs
97.2kQ
)
RX10DN =- ( G----"'1o + 10.BkQ
R"
R.
X10 DN-
+-----,,10vOvkQ'---I---;/Wl"-M_Q-,,lBVMVQ,--+ Xl00 Fine
Adjust
10BkQ
RX100DN=100 ( 100 G
X100DN
Xl0 Fine
Adjust
FIGURE 3. Optional Fine Gain Adjustment.
-1.09kQ
)
Example:
RX10DN=B.64kQand RX100DN= 107kQ
gives gains of 1, 5, 50
FIGURE 5. Connections for Lower Gains.
G = 1, 10, 100
6
V'N1(Xl)
7
V'N2(Xl0)
10
B
V'N,(Xloo)
9
RX10UP
RX100UP
-:-
3.32kQ
10.BkQ
RX10UP ""
3.32kQ
GX1oup-10
l08kQ
RX100UP'" GX100UP
100
Example:
RX10 UP = 1.08kQ and RX100 UP = 1.0BkQ
gives gains of 1, 20. 200
FIGURE 4. Connections for Higher Gains.
4.156
FIGURE 6. High-Speed Instrumentation Amplifier.
Burr-Brown Ie Data Book-Linear Products
VOIIT
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR - BROWN®
PGA103
113131
Programmable Gain
AMPLIFIER
FEATURES
DESCRIPTION
• DIGITALLY PROGRAMABLE GAINS:
G=1, 10, 100VN
The PGA103 is a programmable-gain amplifier for
general purpose applications. Gains of 1, 10 or 100 are
digitally selected by two CMOSfTTL-compatible inputs. The PGAI03 is ideal for systems that must
handle wide dynamic range signals.
• CMOSITTL-COMPATIBLE INPUTS
• LOW GAIN ERROR: ±o.05% max, G=10
• LOW OFFSET VOLTAGE DRIFT: 2J.1V/oC
• LOW QUIESCENT CURRENT: 2.SmA
• LOW COST
• 8-PIN PLASTIC DIP, SO-8 PACKAGES
APPLICATIONS
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The PGA 103' s high speed circuitry provides fast settling time, even at 0=100 (8/lS to 0.01 %). Bandwidth
is 250kHz at G=100, yet quiescent current is only
2.6mA. It operates from ±4.5V to ±l8V power supplies.
:i
The PGAI03 is available in 8-pin plastic DIP and
SO-8 surface-mount packages, specified for the --40°C
to +85°C temperature range.
o
~
~
• DATA ACQUISITION SYSTEMS
INPUT CURRENT NOISE vs FREQUENCY
100
I-
.g"
1111
100
10k
lk
i'
1':
Bandii 1-'- ••
Limited
10
t:s~ --
z
G=100
1--
>
1-10
~
1
0
1-1-
I-
1- All
I
0.1
lOOk
1M
Frequency (Hz)
10
100
lk
SMALL SIGNAL RESPONSE
4
«3
.s
i
c3
2
_I
<5
--
~
10k
Frequency (Hz)
QUIESCENT CURRENT vs TEMPERATURE
-1-
ains
lOOk
1M
•
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::J
a.
-
~
:E
.s
10'
"
.~
z
10
10'
10'
Frequency (Hz)
10
10'
10'
Frequency (Hz)
10'
BURRMBRDWN~
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Burr-Brown Ie Data Book-Linear Products
4.167
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CO NT)
TA = +25°C, Va =±15V unless otherwise noted.
QUIESCENT CURRENT vs POWER SUPPLY
INPUT BIAS CURRENT vs POWER SUPPLY
r------,------,------,------,
12
8 ~-----+~----+-----~------~
11
10
----
%
10
C
2
1------+------+-------+--------1
o
~----~------~----~------~
12
15
6
9
18
~
~
1.941-------\-------+-------+--------1
"
9
iii
8
()
ll!
~
~
.5
7
o
6
INPUT RANGE vs POWER SUPPLY
./
8
4
V
/
/'"
OUTPUT SWING vs POWER SUPPLY
/
TA = +25°C
V
"-
/'"
10
5
V
/
/
/
TA = ---25°C
o
6
12
9
15
6
18
12
9
15
SETTLING TIME vs FILTER CAPACITOR
OUTPUT SWING vs LOAD
15
10
10
/
V
o
v
8
,,/'
Ui'
..
C
6
E
i=
C>
I:
~
(/)
4
~
2
-4
500
1000
Load (0)
18
Power Supply (±V)
Power Supply (±V)
o
18
15
o
5
15
Power Supply (±V)
16
12 - -
12
9
Power Supply (±V)
1500
2000
o
/
10
/
/"
20
30
Filter Capacitor (pF)
BURR-BROWN@
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Burr-Brown Ie Data Book-Linear Products
I Ell Ell I
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
T" = +25°C, Vs = ±15V unless otherwise noted.
QUIESCENT CURRENT VB TEMPERATURE
INPUT BIAS CURRENT VB TEMPERATURE
10 r---~--~----~--~----r---~
8
----
~--+-----
6
«
g
-
-
4 \-----+__ ---- --~ - - - - - -----
..s;
2
---4---4--+---~--~-~
o ~--~--~----~--~----~--~
--50
--25
o
25
50
75
100
--50
--25
•
T emperalure ('C)
CURRENT LIMIT VB TEMPERATURE
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SLEW RATE vs TEMPERATURE
25
a:
25
~
20
~
'"""-
...............
~ .........
~
~
w
i!
::::i
...............
a..
:iE
r-
10
--50
-25
25
50
75
100
10
--50
-25
25
50
75
100
Z
Temperature ('C)
Temperature ('C)
w
:iE
a:
~
z
LARGE SIGNAL RESPONSE
OUTPUT SWING VB TEMPERATURE
14
12
~
B10
>
V
-
/
/'
8
6
--50
«
o
~
a-;
z
15
-25
o
25
50
75
100
Temperature ('C)
1~s/Div
BURR-BROWNI!!
1-=--=-1 Burr-Brown Ie Data Book-Linear Products
4.169
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE
CURVES (CO NT)
TA =+25OC, Vco
D'N
=±15V unless otherwise noted.
SMALL SIGNAL RESPONSE
1~S/Div
FIGURE 1. Basic Circuit Connections.
DISCUSSION OF
PERFORMANCE
OFFSET ADJUSTMENT
A simplified diagram of the PGA2021203 is shown on the
first page. The design consists of a digitally controlled,
differential transconductance front end stage using precision
PET buffers and the classical transimpedance output stage.
Gain switching is accomplished with a novel current steering technique that allows for fast settling when changing
gains. The result is a high performance, programmable
instrumentation amplifier with excellent speed and gain
accuracy.
The input stage uses a new circuit topology that includes
PET buffers to give extremely low. input bias currents. The
differential input voltage is converted into a differential
output current with the transconductance gain selected by
steering the input stage bias current between four identical
input stages differing only in the value of the gain setting
resistor. Each input stage is individually laser-trimmed for
input offset, offset drift and gain.
Figure 2 shows the offset adjustment circuits for the PGA2021
203. The input offset and the output offset are both separately adjustable. Notice that because the PGA2021203 change
between four different input stages to change gain, the input
offset voltage will change slightly with gain. For systems
using computer autozeroing techuiques, neither offset nor
drift is a major concern, but it should be noted that since the
input offset does change with gain, these systems should
perform an autozero cycle after each gain change for optimum performance.
In the output offset adjustment circuit, the choice of the
buffering op amp is very important. The op amp needs to
have low output impedance and a wide bandwidth to maintain full accuracy over the entire frequency range of the
PGA2021203. For these reasons we recommend the OPA602
as an excellent choice for this application.
The output stage is a differential transimpedance amplifier.
Unlike the classical difference amplifier output stage, the
common mode rejection is not limited by the resistor matching. However, the output resistors are laser-trimmed to help
minimize the output offset and drift.
V,N
BASIC CONNECTIONS
~---
20
10
_-
E-
d~ ioo
~~
en
-
CJ)
_..
E 100
l } G =10
~
1k
3>
G~ \k
I'
§ 100
I!
a:
t-
INPUT- REFERRED NOISE VOLTAGE
vs FREQUENCY
10
100
1k
10k
Frequency (Hz)
BURR-BROWN®
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TYPICAL PERFORMANCE CURVES (CO NT)
,
At TA = +25°C, V,= ±15V, unless otherwise noted.
INPUT BIAS AND INPUT OFFSET CURRENT
vs TEMPERATURE
INPUT-REFERRED
OFFSET VOLTAGE WARM-UP VB TIME
6
~
i
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.:;
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~
.0:
2
"
0
~
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!
-2
~
8 -4
iii
;;
2
l3
-
±I
0
/
los
-......... -......... .......
~
-1
............
"
1
.s
-6
0
15
30
45
60
75
90
105
120
-2
-75
-60
-25
0
INPUT BIAS CURRENT
vs DIFFERENTIAL INPUT VOLTAGE
3
2
2
I-
-!;.:.t-~
I
.3
'I
iii
G-100,1k
-30
l
./
o
-15
~
~
0
.~
V
-3
-45
15
over-Voltag~
Protection
30
125
!-"""
::Jnelln~ut
ove~-v~ltsl,e
Protection
. Normal
eration
I
}
One Input
-3
-45
45
t -Jr- o
...H-r
-2
.J..-1"
Both Inputs
o
-15
--30
Differential OVerload Voltage (V)
15
45
30
Common-Mode Voltage (V)
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
SLEW RATE vs TEMPERATURE
32
1.0
J--
11111
28
100
~th l~pJts
::.:;'
I
m
- -1
VV
G= 10
75
Illbll~II~1
1
~
-2
50
INPUT BIAS CURRENT
vs COMMON-MODE INPUT VOLTAGE
3
I
25
Temperature (OC)
Time from Power Supply Turn-on (s)
d~W'
0.8
""iii
~
1\
\
0.6
"
1ii
a:
j
~
-
f.-- f--
f.--
.
G=~or10
--
0.4
0.2
.......
10
100
1k
10k
Freauencv (Hz)
4.180
100k
o
1M
-75
-60
-25
0
25
50
75
100
.125
Temperature (OC)
Burr-Brown Ie Data Book-Linear Products
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I EI~
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TYPICAL PERFORMANCE CURVES (CO NT)
At T. = +25°C, Va= ±15V, unless otherwise noted.
QUIESCENT CURRENT vs TEMPERATURE
OUTPUT CURRENT LIMIT vs TEMPERATURE
6.0
30
r--......
<
g
25
E
=s
..........
"
20
r--..
d
t::
0
.<::
en
r--......
........
r--.
§
0
----
r---
15
....
__
<
g
r...........
._-
--
~Icd
<3
I'-........
~llcd
-15
10
35
~ .......
f--
..............
1l
-~
a
r---
..............
4.5
4.0
-75
85
60
5.0
...... ""-..
E
10
-40
......
5.5
E
~
-QO
-25
0
QUIESCENT CURRENT
vs POWER SUPPLY VOLTAGE
16
5.0
E
~
~
12
"
10
f
4.5
8
S
!
4.0
100
125
•
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14
V+
1
a
75
POSITIVE OUTPUT SWING vs TEMPERATURE
5.2
<3
50
Temperature (OC)
Temcerature (OC)
1
25
..........
V-
::J
Vs 11.4_ -
c.
:i
--+-11-+0 Vo
IS
14
10
Q.
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16
a a
a I
I a
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~
12
25kn
GAIN
PGA204 PGA205 A, Ao
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Z
PGA204'
PGA205
Feedback
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Burr-Brown Ie Data Book-Linear Products
4.183
For Immediate Assistance, Contact YourLocal Salesperson
Some applications select gain ,of the PGA204/205 with
switches or jumpers. Figure 2 shows pull-up resistors connected to assure a noise-free logic "1" when the switch,
jwnper or open-collector logic is open or off. Fixed-gain
applications can counect the logic inputs directly to V+ or
V- (or other valid logic level); no resistor is required.
l00kn
OFFSET VOLTAGE
Voltage offset of the PGA204/205 consists of two components-input stage offset and output stage offset. Both
components are specified in the specification table in equation form:
Digiial ground can ,
alternatively be oomiected
to V- power supply,
9
Vos = VOSI + Voso I G
(1)
where:
Vos total is the combined offset, referred to the input.
FIGURE 2. Switch or Jwnper-Selected Digital Inputs.
VOSI is the offset voltage of the input stage, Al and A 2•
a logic "1" input. A constant current of approximately
1.3mA flows in the digital ground pin. It is good practice to
retwn digital ground through a separate connection path so
that analog ground is not affected by the digital ground
current.
The digital inputs, Ao and AI' are not latched; a change in
logic inputs immediately selects a new gain. Switching time
of the logic is approximately 1jJS. The time to respond to
gain change is effectively the time it takes the amplifier to
settle to a new output voltage in the newly selected gain (see
settling time specifications).
Many applications use an external logic latch to access gain
control data from a high speed data bus (see Figure 7).
Using an external latch isolates the high speed digital bus
from sensitive analog circuitry. Locate the latch circuitry as
far as practical from analog circuitry.
Voso is the offset voltage of the output difference
amplifier, A3•
VOSI and Voso do not change with gain. The composite offset
voltage Vos changes with gain because of the gain term in
equation 1. Input stage offset dominates in high gain (G;::: 100);
both sources of offset may contribute at low gain
(G=l to 10).
OFFSET TRIMMING
Both the input and output stages are laser trimmed for very
low offset voltage and drift. Many applications require no
external offset adjustment.
Figure 3 shows an optional input offset voltage trim circuit.
This circuit should be used to adjust only the input stage
offset voltage of the PGA204/205. Do this by programming
V,N
Feedback
12
A,
Ao
Digital
Ground
Resistors can be substituted
for REF200, Power supply
rejection will be degraded.
16
15
14
11
V REF
+
V,N
25kn
10
±10mV
Adjustment Range
output Offset
Adjustment
V-
FIGURE 3. Optional Offset Voltage Trim Circuit.
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it to its highest gain and trimming the output voltage to zero
with the inputs grounded. Drift performance usually improves slightly when the input offset is nulled with this
procedure.
Microphone,
Hydrophone
etc.
Do not use the input offset adjustment to trim system offset
or offset produced by a sensor. Nulling offset that is not
produced by the input amplifiers will increase temperature
drift by approximately 3.3I1V/oC per ImV of offset adjustment.
Many applications that need input stage offset adjustment do
not need output stage offset adjustment. Figure 3 also shows
a circuit for adjusting output offset voltage. First, adjust the
input offset voltage as discussed above. Then program the
device for G=l and adjust the output to zero. Because of the
interaction of these two adjustments at 0=8, the PGA205
may require may require iterative adjustment.
47kQ
Thermocouple
The output offset adjustment can be used to trim sensor or
system offsets without affecting drift. The voltage applied to
the Ref terminal is summed with the output signal. Low
impedance must be maintained at this node to assure good
common-mode rejection. This is achieved by buffering the
trim voltage with an op amp as shown.
Center-tap provides
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bias current retum.
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NOISE PERFORMANCE
u::
The PGA204/205 provides very low noise in most applications. Low frequency noise is approximately OAI1Vp-p measured from 0.1 to 10Hz. This is approximately one-tenth the
noise of "low noise" chopper-stabilized amplifiers.
-=-
INPUT BIAS CURRENT RETURN PATH
The input impedance of the PGA204/205 is extremely highapproximately 101On. However, a path must be provided for
the input bias current of both inputs. This input bias current
is typically less than ±InA (it can be either polarity due to
cancellation circuitry). High input impedance means that
this input bias current changes very little with varying input
voltage.
Input circuitry must provide a path for this input bias current
if the PGA204/205 is to operate properly. Figure 4 shows
provisions for an input bias current path. Without a bias
current return path, the inputs will float to a potential which
exceeds the common-mode range of the PGA204/205 and
the input amplifiers will saturate. If the differential source
resistance is low, bias current return path can be connected
to one input (see thermocouple example in Figure 4). With
higher source impedance, using two resistors provides a
balanced input with possible advantages of lower input
offset voltage due bias current and better common-mode
rejection.
Many sources or sensors inherently provide a path for input
bias current (e.g. the bridge sensor shown in Figure 4).
These applications do not require additional resistor(s) for
proper operation.
:::i
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-t-:-11-+0VO
15
14
+
VOM
>---<~;/V'V\..-4--.IV'V'---t---o
5
10
Ref
-:V-
FIGURE 5. Voltage Swing of Aj and A z.
Input-overload often produces an output voltage that appears
normal. For example, consider an input voltage of +20V on
one input and +40V on the other input will obviously exceed
the linear common-mode range of both input amplifiers.
Since both input amplifiers are saturated to the nearly the
same output voltage limit, the difference voltage measured
by the output amplifier will be near zero. The output of the
PGA204/205 will be near OV even though both inputs are
overloaded.
47kQ
47kQ
VIN o-------f---t---l
+
VIN o-----j--t--f---\----t
INPUT PROTECTION
The inputs of the PGA204/205 are individually protected for
voltages up to ±40V. For example, a condition of -40V on
one input and +40V on the other input will not cause
damage. Internal circuitry on each input provides low series
impedance under normal signal conditions. To provide
equivalent protection, series input resistors would contribute
excessive noise. If the input is overloaded, the protection
circuitry limits the input current to a safe value (approximately 1.5mA). The typical performance curve "Input Bias
Current vs Common-Mode Input Voltage" shows this input
current limit behavior. The inputs are protected even if no
power supply voltage is present.
Dl, D2: IN4146, IN914, etc.
SWITCH
POSITION
A
B
C
D
GAIN
PGA204 PGA205
1
10
100
1000
1
2
4
8
FIGURE 6. Switch-Selected PGIA.
The information provided herein is believed to be reliable; however, BURR·BROWN assumes no responsibility for inaccuracies or omissions. BURR·BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR·BROWN does not authorize or warrant
any BURR·BROWN product for use in life support devices and/or systems.
BURR-BROWNe
4.186
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Or, Call Customer Service at 1·800·548·6132 (USA Only)
+15V
PGA204
PGA205
Feedback
46
V,N {
12
25kQ
13
A,
16
Ao
15
Va
11
14
It)
-
12
0
{
C'I
5
10
Ref
'III:t
0
10
C'I
-+1:-:-1-+0Vo
Ao~~====~~~~~~~
a-
Digital
Ground
+
>--+-.J1IfIf'--+-~VV'---+--10--O
Ref
V,N
Vas Adj
V~
V-
Internallonal Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602) 746-1111 • Twx: 91Q.952..1111 • Cable: BBRCORP • Telex: 06&-6491 • FAX: (602) 889-1510 • Immediate Producllnlo: (SOO)54HI32
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IElElI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At T.: +25°C, Va: ±t5V, R,: 21<0 unless otherwise noted.
~::::~
PARAMETER
CONDITIONS
INPUT
Offset Voltage, RTI
Innial
vs Temperature
vs Power Supply
Long-Term Stability
Impedance, Differential
Common-Mode
Linear Input Voltage Range
Safe Input Voltage
Common-Mode Rejection
TYP
±(IVsl-4)
±50±20OIG
±a.5±21G
±3±21G
±1±201G
10"116
10"116
±(lVsl-3·5)
TA ",,+25°C
TA = TMIN to TMA)(
Vs: ±4.5V to ±18V
Yo: OV
GAIN
Gain Error
MIN
80
85
90
95
94
100
106
112
75
80
85
±3±30/G
±2O±20/G
~V/oC
89
TUIN
TUIN
·
G:l
G:2
G:4,5
G:8.10
Yo: ±10V, G:l to 10
20V Step, All Gains
20V Step, All Gains
50% OVerdrive
100
10
200
pA
·
··
·
··
±0.024
±10
±0.0025
'~... ~~n. ,un'; RANGE
SpecHication
Operating
Thermal ReSistance, 8,.
-40
-40
·
±0.05
·
±0.OO5
·
MHz
MHz
MHz
MHz
V/j.lS
j.ls
j.lS
j.lS
·
·
·
%
ppml"C
%ofFSR
V
V
pF
rnA
··
·
±18
+85
+125
80
IAI..JHZ
·
V+
±15
+11.61-10.4
j.lVp-p
·
500
±4.5
nV/,fHz
nV/,fHz
·
1
V~:OV
nV/,fHz
··
(V+)-4
Voo + 0.8V
Voo +2
dB
dB
dB
dB
·
··
V
rnA
°C
°C
°C/W
BURR-BROWN®
Burr-Brown Ie Data Book-Linear Products
C\I
CO
0
0
a:
en
a:
W
ii:
:::i
0..
:E
o
a:
The two sense resistors are laser-trimmed to typically m a t c .
within 0.01 %; therefore, when adding parallel resistance t
,
decrease gain, take care to match the parallel resistance 0
each sense resistor. To maintain high CMR when increasing
the gain of the RCV420, keep the series resistance added to
the feedback network as small as possible. Whether the Rcv
w
Com pin is grounded or connected to a voltage reference for
level shifting, keep the series resistance on this pin as low as
possible. For example, a resistance of 200 on this pin
degrades CMR from 86dB to approximately 80dB. For D.
applications requiring better than 86dB CMR, the circuit
-'INI,-< 100kO
::::i
:IE
Z
IkO
o
PROTECTING THE SENSE RESISTOR
-:-
-15V
FIGURE 3. Optional Output Offset Nulling Using External
Amplifier.
The 750 sense resistors are designed for a maximum continuous current of 40mA, but can withstand as much as
250mA for up to 0.1 s (see absolute maximum ratings). There
are several ways to protect the sense resistor from overcur-
i=
z~
w
:IE
~
a:
Use 10V Ref for +
and 10V Ref with INA105 for -.
Vo
t;
Procedure:
1. Connect CMV to CT.
2. Adjust potentiometer for near zero
at the output.
=(0.3125)(I'N) + V ZERO
-z
-10V
2000
CMR
Adjust
........~VIf\.,......~ >1 OOkO
FIGURE 4. Optional Zero Adjust Circuit.
FIGURE 5. Optional Circuit for Externally Trimming CMR.
BURR .. BROWN@
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rent conditions exceeding these specifications. Refer to Figure 6. The simplest and least expensive method is a resistor
as shown in Figure 6a. The value of the resistor is determined
from the expression
~ = Vcc/40mA -750
and the full scale voltage drop is
VRX =.20mA
x~.
For a system operating off of a 32V supply Rx = 7250 and
VRX =14.5V.1n applications that cannot tolerate such a large
voltage drop, use circuits 6b or 6c. In circuit 6b a power JFET
and source resistor are used as a current limit. The 2000
potentiometer, ~, is adjusted to provide a current limit of
approximately 30mA. This circuit introduces a 1-4V drop at
full scale. If only a very small series voltage drop at full scale
can be tolerated, then a O.032A series 217 fast-acting fuse
should be used, as shown in Figure 6c.
a) Rx =(V+)/40mA - 750
For automatic fold-back protection, use the circuit shown in
Figure IS.
b) Rx set for 30mA current fimtt at 25°C.
VOLTAGE REFERENCE
The RCV420 contains a precision IOV reference. Figure 8
shows the circuit for output voltage adjustment. Trimming
the output will change the voltage drift by approximately
O.007pprn/"C per mV of trimmed voltage. Any mismatch in
TCR between the two sides of the potentiometer will also
affect drift, but the effect is divided by approximately 5. The
trim range of the voltage reference using this method is
typically ±40OmV. The voltage reference trim can be used to
trim offset errors at the output of the RCV420. There is an 8: 1
voltage attenuation from Ref IIi to Rcv Out, and thus the trim
range at the output of the receiver is typically ±5OmV
The high-frequency noise (to I MHz) of the voltage reference
is typically ImVp-p. When the voltage reference is used for
level shifting, its noise contribution at the output of the
receiver is typically 12511VP-P due to the 8:1 attenuation
from Ref In to Rcv Out. The reference noise can be reduced
by connecting an external capacitor between the Noise Reduction pin and ground. For example, O.lJlF capacitor reduces the high-frequency noise to about200I1Vp-p at the
output of the reference and about 2511V pop at the output of
the receiver.
c) ~ is O.032A, Lifflefuse Series 217 fast-acting fuse.
Request Application Bulletin AB·OI4 for details of a
more complete protection circutt.
FIGURE 6. Protecting the Sense Resistors.
-In
>---OVo
+In
±400mV adjustment at output of reference, and ±50mV
adjustment at output of receiver if reference is usad for
level shifting.
FIGURE 7. Optional Voltage Reference External Trim Circuit.
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Vo
>-:..,.-1-0 (D-5V)
V-15V
o
-=-
N
~
o>
a:
FIGURE 8. RCV420 Used in Conjunction with XTRlOl to Form a Complete Solution for 4-20mA Loop.
en
-
+In
cT
4-20mA
-In
a:
w
Vo
u::
>--+--+----0 (Q-5V)
::::i
a.
:E
15.9kO
-=-
«
z
o
15.9kn
V-15V
i=
~
FIGURE 9. 4-20mA to O-lOV Conversion With Second-Order Active Low-Pass Filtering «('dB = 10Hz).
zw
::i
a:
I-
~1mA
R,
r---~I--------'-----o
en
Z
V+ = 15V
on PWS740
1000
Vo
OV-5V
"-----.......+----0 Gnd on PWS740
V-=-15V
~----~-----~---00nPWS7~
FIGURE 10. Isolated 4-20mA Instrument Loop (RID shown).
BURR~BROWNe
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Burr-Brown Ie Data Book-Linear Products
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>,---<>-0 Vo
>-=-......--oVo
«H;V)
>--"'-_-0 Vo
(O-5V)
(5-0V)
Vo = 6.25V - (0.3125) (I,.)
FIGURE 13. 4-20mA to 5-OV Conversion.
NOTE: (1) AeM and A. are used 10 provide a first order correction of CMA
and Gain Error, respectively, Table 1 gives typical resistor values for AeM
and RG when as many as three RCV420s are stacked. Table 2 gives
typical CMA and Gain Error with no correction. Further improvement in
CMA and Gain Error can be achieved using a 500kn potentiometer for AeM
and a loon pctentlometer for AG•
RCV420
R",,(k~
R.(~
1
2
3
00
0
7
23
200
67
TABLE 1. 'TYpical Values for RCM and Ro'
RCV420
CMR(dB)
GAIN ERROR %
1
2
3
94
68
62
0.025
0.075
0.200
Vo
«H;V)
+40V (max)
Vo
«H;V)
TABLE 2. 'TYpical CMR and Gain Error
Without Correction.
FIGURE 11. Series 4-20mA Receivers.
NOTE: (1) Ax= A,j
(k_l)
16mA
FIGURE 14. Power Supply Current Monitor Circuit.
Vo = 0.3125 (1,-1,)
Max Gain Error = 0.1% (ACV420BG)
.".
FIGURE 12. Differential Current-to-Voltage Converter.
BURR - BROWN@
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+15V
-15V
16
4
RCV420
300kO
99kO
92kO
~--~Ar----~~____-r____'--oVo
O-SV
10.0V
1.27kO
10kO
0
N
10kO
1OkO
>
0
a::
0.57V
B.9SV
"11:3"
AT&T
LH1191
Solid-State
Relay
en
a::
47kO
J
w
22.9kO
4700
u:::
1~F
Overrange
Underrange
Output
Output
::::i
Q.
:E
«
z
o
See Application Bulletin AB-014 for more details.
FIGURE 15. 4-20mA Current Loop Receiver with Input Overload Protection.
i=
~
z
+15V
w
RCV420
:E
:J
~--~\~--~~~--oVo
....a::en
o-sv
-z
See Application Bulletin AB-01 B for more details.
FIGURE 16. 0-20mAlO-5V Receiver Using RCV420.
BURR~BROWN®
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IiRR-BROWN@
XTR101
E:lE:II
Precision, Low Drift
4-20mA TWO-WIRE TRANSMITTER
FEATURES
APPLICATIONS
• INSTRUMENTATION AMPLIFIER INPUT
Low Offset Voltage, 30llV max
Low Voltage Drift, 0.75IlV/oC max
Low Nonlinearity, 0.01% max
• INDUSTRIAL PROCESS CONTROL
Pressure Transmitters
Temperature Transmitters
Millivolt Transmitters
• TRUE TWO-WIRE OPERATION
Power and Signal on One Wire Pair
Current Mode Signal Transmission
High Noise Immunity
• RESISTANCE BRIDGE INPUTS
• THERMOCOUPLE INPUTS
• RTDINPUTS
• CURRENT SHUNT (mV) INPUTS
• DUAL MATCHED CURRENT SOURCES
• PRECISION DUAL CURRENT SOURCES
• WIDE SUPPLY RANGE, 11.6V to 40V
• -40°C to +85°C SPECIFICATION RANGE
• SMALL 14-PIN DIP PACKAGE, CERAMIC
AND PLASTIC
• AUTOMATED MANUFACTURING
• POWER/PLANT ENERGY SYSTEM
MONITORING
DESCRIPTION
The XTR101 is a microcircuit, 4-20mA, tWo-wire
transmitter contaiuing a high accuracy instrumentation amplifier (IA), a voltage-controlled output current
source, and dual-matched precision current reference.
This combination is ideally suited for remote signal
conditioning of a wide variety of transducers such as
thermocouples, RIDs, thermistors, and strain gauge
bridges. State-of-the-art design and laser-trimming,
wide temperature range operation and small size make
it very suitable for industrial process control applications. In addition, the optional external transistor allows even higher precision.
The two-wire transmitter allows signal and power to
be supplied on a single wire-pair by modulating the
power supply current with the input signal source. The
transmitter is inunune to voltage drops from long runs
and noise from motors, relays, actuators, switches,
transformers, and industrial equipment. It can be used
by OEMs producing transmitter modules or by data
acquisition system manufacturers.
Optional
External
Transistor
e,
1
' - - - - - - - Q 10UT
~
Optional
Offset Null
NOTE: (1) Pins 12 and 13 rue used for optional BW control.
International Airport Induatrial Park • MaIling Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602)746-1111 • Twx: 911).852.1111 • CsbIe:BBRCORP • Telex: 066-6491 • FAX:(602)889·1510 • ImmedlataProduct Info: (900) 548-6132
4.200
PDS·627F
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At TA = +25'C, +Vcc =24VDC, RL = toon with external transistor connected, unless otherwise noted
XTR101AG
PARAMETER
CONDITIONS
OUTPUT AND LOAD'
"""
Current
Uneer Operating Region
Derated Perlorrnanoe
Current Limn
Offset Current Error
vs Temperature
Full Scale OUIpUi Current Error
Power Supply Voltege
Load Resistanoe
SPAN
OUipUI Current Equation
Span Equation
vs Temperature
MI~'TYP
4
3.8
28
±3.9
±10.5
1",10 = 4mA
a~slaT
Full Scale =20mA
+11.6
V"" Pins 7 and 8,
Compliance'"
AI V", = +24V, 10 = 20mP
AI V", = +4OV, 10 =20mA
20
22
38
±IO
±20
±4O
±40
""AN
-5
"""-'"
Dead Band
XTR101AP
!IIAX_
±2.5
±6
±8
±15
±SO
±15
MIN
TYP
31
±a.5
±10.5
±SO
XTR101AU
MAX
MIN
±Ig
±2O
±60
TYP
MAX
31
±8.5
±Ig
±SO
±60
AN
±100
0
0.01
0
0
Ves
aVrJaT
aVcdPSRR =V" Error
~
a\laT
los,
/!J,,/aT
DC
8, and 9 2 with Respect
to Pin 7
CURRENT SOURCES
Magnitude
Accuracy
0
110
90
±SO
±0.75
125
60
0.30
10
0.1
100
4
1
±60
±1.5
!lA
g
g
600
1400
0.4))3
10 ))3
Ae = (92 - 9,)(3)
!lA
ppm, FSi'C
VDC
600
±SO
-2.5
UNITS
mA
rnA
rnA
io = 4mA + [0.016!l + (401R,)] (e, - e,)
S = [O.OISg + (401R,1l
Rsinn
Excluding TCR of R,
Hys1ere~s
TYP
1400
As in C, 81 and 82 in V
Untrimmed Erro'.
Non'nearity
INPUT CHARACTERISTICS
Impedance: Differential
Common -Mode
Voltage Range, Full Scale
Offset Vollage
vs TOfT!lerature
Power Supply Rejection
Bias Current
vs Temperature
OflselCurrent
vs Temperature
Common-Mode Rejectio~"
Common-Mode Range
±20
XTR101BG
M.AXIoIIN
±20
±O.35
±100
±SO
±O.75
110
122
6
Gil)) pF
00)) pF
V
en
II:
~V
V
1
mA
V", =24V,
VP1N8 - VPIN10.11 ::: 19V
R, = 5k1!, Fig. 5
±O.OS
±oo
±3
vs Temperature
vs V",
vsTIme
±O.17
±80
±O.025
±30
±O.075
±O.2
±O.37
±0.2
±O.37
±50
±8
Ccmplkmcc Voltlgc
l.A!!!h
R~pect
tn Pr" 7
Tracking
(1 -1""/1,,,,) X 100%
Ratio Matoh
Accuracy
vs Tempeature
n
±0.014
vs Vcr;
vsTIme
OUlpUtlmpedanoe
IVee - •. ,
10
±O.OS
±15
±O_009
±O.04
10
±0.031
±IO
±1
20
±O.OS8
±0.031
±O.OS8
%
ppmfC
ppmIV
ppmfmonlh
V
%
ppmfC
ppmIV
ppmfmonth
M!l
15
15
TEMPERATURE RANGE
Specil~ation
Operating
Storage
-40
-55
-55
+85
+125
+165
-40
-40
-55
+85
+85
+125
-40
-55
+85
+125
'C
'C
'C
·Same as XTR101AG.
NOTES: (1) See Typical Performance Curves_ (2) Span error shown is untrimmed and may be adjusted to zero. (3) e, and e, are signals on the -In and +In terminats
with respect to the output, pin 7. While the maximum permissible Ae is 1V, tt is primarily intended lor much lower input signal levels, e.g., 10mV or 50mV full scale for
the XTR101A and XTR101B grades respectively_ 2mV FS is also possible with the B grade, but accuracy will degrade due to possible errors in lhe low value span
resistance and very high amplification of offset, drift, and noise. (4) Offset vollage is \rimmed with lhe application of a 5V common-mode voltage_ Thus the associated
common~mode error is removed. See Application Information section.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice_ No patent rights or licenses to any of the circuils described herein are implied or granted to any third party_ BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in lile support devices and/or systems_
aURR·BROWN®
I EaEaI
Burr-Brown Ie Data Book-Linear Products
~
><
dB
nA
nArC
nA
nArC
dB
±20
II:
ppmfC
%
%
%
%
~vrc
122
150
1
±3O
0.3
±100
,....
0
,....
4.201
W
u:::
:::i
CL
:i
«
Z
0
~
~
Z
W
:i
:=;
II:
~
en
-Z
For Immediate Assistance, Contact YourLocal Salesperson
PIN CONFIGURATION
Top View
DIP
Zero Adjusl
Top View
14 Zero Adjust
SOIC
Zero Adjust
1
16
Bandwidth
-In
Zero Adjust
Bandwidth
B Control
-In
'REF2
+In
Span
IREF1
Span
IAEF1
Span
E
Span
E
DIP
+In
Out
7
B Control
SOL·16
Surface-Mount
IREF2
+Vcc
+Vcc
NC
8
9
NC
DICE INFORMATION
PAD
FUNCTION
PAD
FUNCTION
1
2
3
4
5
6
7
Zero Adjust
Zero Adjust
-In
+In
Span
Span
Out
8
9
10
11
12
13
14
+Vcc
E
'REF1
IAEF2
B Control
Bandwidth
Zero Adjust
NC: No Connection
Substrate Bias: Electrically connected to V- supply.
MECHANICAL INFORMATION
Die Size
Die Thickness
Min. Pad Size
MILS (0.001 ")
MILLIMETERS
150 x 105±5
20±3
4x4
3.81 x 2.67 ±0.13
0.51 ±C.08
0.10xO.l0
Backing
Gold
XTR101 DIE TOPOGRAPHY
PACKAGE INFORMATION(')
ABSOLUTE MAXIMUM RATINGS
Power Supply, +Vcc ............................................................................ 40V
Input Voltage, 8 1 or ~ ........................................................... ';!.Vour• S+Vcc
Storage Temperalure Range, Ceramic .......................... -65°C to +165°C
Plastic ............................ -65°C 10 +125°C
Lead Temperalure (soldering lOS) G, P .•..................................... +300°C
(wave soldering, 3s) U .................................... +260°C
Output Short·Circurt Duration ............................... Continuous +Vcc to lOUT
Junction Temperature ................................................................... +165Q C
MODEL
XTR101AG
XTR101BG
XTR101AP
XTR101AU
PACKAGE
PACKAGE DRAWING
NUMBER
14-Pin Ceramic DIP
14-Pin Ceramic DIP
14-Pin Plastic DIP
16-Pin SOIC
169
169
010
211
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
ORDERING INFORMATION
MODEL
XTR101AG
XTR101BG
XTR101AP
XTR101AU
PACKAGE
14-Pin Ceramic DIP
14-Pin Ceramic DIP
14-Pin Plastic DIP
16-Pin SOIC
TEMPERATURE RANGE
-40OC to
-40°C 10
-40OC to
-40°C to
+85°C
+85°C
+85°C
+85°C
BURR~aROWN(J
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Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
TA = +25Q C, +Vcc = 24VDC unless otherwise noted.
SPAN vs FREQUENCY
STEP RESPONSE
SO ~----~-------r------~----~
i
E"
Rs=250
Cc=O
~R,,"s,-=....1~00;..;c0+_~_·
___
-·_-L::~--
60
L~
Rs=4000
0>
~
40
§
20
~
!
-.....;:~
L.........
Rs=2kn
~,~_~~s_:=~:_:_:t_~:._:_:__::=+::::_:_:_.~~~
,...
-~
o,...
100
10k
1k
100k
1M
200
400
Frequency (Hz)
600
Time
SOO
t<
•
FULL SCALE INPUT VOLTAGE vs Rs
Rs(kn)
2
4
COMMON-MODE REJECTION
vs FREQUENCY
S
6
~---'-----r7---r-----,
O.OS
.......
100
0.06
0.6
~
o to Skn scale
~ 0.04
:;
0.4
u.
l
-- 0.2
0.02
o
'-.0 to SOmV (lOW level signals)
and 0 to 4000 scale
L -____
______
______
~
~
100
200
en
120
O.S
~
~
rn"
'5
u.
.j
........
"'"r-...
SO
iii"
:!l-
II:
::;;
IX
1000
(~s)
IX
W
~
60
r-...
()
40
u:
"-...,
~
r-...
'iii"
100
SO
II:
~
Co
60
rn"
I
40
a.
20
~
"N
~
w
:E
BANDWIDTH vs PHASE COMPENSATION
.,6
~
:::'J
IX
I-
en
-
1k
i
100
til
10
Z
I::
~
"
0
0.1
0.1
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
10
100
1k
10k
100k
1M
Bandwidth Control, Cc (pF)
BURR· BROWNe
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TYPICAL PERFORMANCE CURVES
(CONT)
T. = +25"C. +Vcc= 24VDC unless otherwise noted.
INPUT VOLTAGE NOISE
DENSITYvsFREQUENCY
INPUT CURRENT NOISE
DENSITY vs FREQUENCY
60
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40
30
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10
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"-
10
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10k
lOOk
10k
lOOk
Frequency (Hz)
\
'"
10
--I-100
lk
Frequency (Hz)
10k
lOOk
OUTPUT CURRENT NOISE
DENSITY vs FREQUENCY
6
1\
\
Rs =00
\]\
10
"" ---
lk
100
Frequency (Hz)
THEORY OF OPERATION
A simplified schematic of the XTRI01 is shown in: Figure 1.
Basically the amplifiers, A[ and A" act as a single power
supply instrumentation amplifier controlling a current source,
A3 and Q[. Operation is determined by an internal feedback
loop. e[ applied to pin 3 will also appear at pin 5 and
similarly e2 will appear at pin 6. Therefore the current in Rs,
the span setting resistor, will be Is = (e2 - e[)1R" = emIRs.
This current combines with the current, ~, to form 1[. The
circuit is configured such that 12 is 19 times II" From this
point the derivation of the transfer function is straightforward but lengthy. The result is shown in Figure 1.
Examination of the transfer function shows that 10 has a
lower range-limit of 4mA when t1N = e2 - e[ = OV. This 4mA
is composed of 2mA quiescent current exiting pin 7 plus
2mA from the current sources. The upper range limit of 10
is set to 20mA by the proper selection of Rs based on the
upper range limit of eIN• Specifically Rs is chosen for a
16mA output current span for the given full scale input
voltage span; i.e., (0.016U+ 401R,,)(eIN full scale) = 16mA.
Note that since 10 is unipolar e2 must be kept larger than e[;
i.e., eo ~ e[ or eIN ~ O. Also note that in order not to exceed
the output upper range limit of 20mA, t1N must be kept less
than IV when Rs = 00 and proportionately less as Rs is
reduced.
INSTALLATION AND
OPERATING INSTRUCTIONS
BASIC CONNECTION
The basic connection of the XTR101 is shown in Figure 1.
A difference voltage applied between input pins 3 and 4 will
cause a current of 4-20mA to circulate in the two-wire
output loop (through RL , Vps , and D[). For applications
requiring moderate accuracy, the XTR101 operates very
cost-effectively with just its internal drive transistor. For
more demanding applications (high accuracy in high gain)
an external NPN transistor can be added in parallel with the
internal one. This keeps the heat out of the XTR101 package
and minimizes thermal feedback to the input stage. Also in
BURR,· BRSWN 24V to limit power dissipation.
FIGURE 2. Power Calculation of XTR101 with External Transistor.
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Frequencv (Hz)
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APPLICATION INFORMATION
Negative input voltage, VIN' will cause tIle output current to
be less than 4mA. Increasingly negative VIN will cause the
output current to limit at approximately 3.6mA.
Figure 1 shows the basic connection diagram for the XTRlO3.
The loop power supply, VPS provides power for all circuitry.
Output loop current is measured as a voltage across the
series load resistor, Ru
Increasingly positive input voltage (greater than VFS) will
produce increasing output current according to the transfer
function, up to the output current limit of approximately
34mA.
Two matched 0.8mA current sources drive the RTD and
zero-setting resistor, Rz. The instrumentation amplifier input
of the XTRI03 measures the voltage difference between the
RTD and Rz. The value of Rz is chosen to be equal to the
resistance of the RTD at the low-scale (minimum) measurement temperature. Rz can be adjusted to achieve 4mA output
at the minimum measurement temperature to correct for
input offset voltage and reference current mismatch of the
XTRlO3.
EXTERNAL TRANSISTOR
Transistor QI conducts the majority of the signal-dependent
4-20mA loop current. Using an external transistor isolates
the majority of the power dissipation from the precision
input and reference circuitry of the XTRlO3, maintaining
excellent accuracy.
Rc.. provides an additional voltage drop to bias the inputs of
Since the external transistor is inside a feedback loop its
characteristics are not critical. Requirements are: VCEO =
45V min, fJ =40 min and Po = 800mW. Power dissipation
requirements may be lower if the loop power supply voltage
is less than 40V. Some possible choices for Q! are listed in
Figure 1.
the XTRlO3 within their common-mode range. Resistor, Ra,
sets the gain of the instrumentation amplifier according to
the desired temperature measurement range.
The transfer function through the complete instrumentation
amplifier and voltage-to-current converter is:
The XTRlO3 can be operated without this external transistor
by conneCting pin 11 to 14 (see Figure 2). Accuracy will be
somewhat degraded by the additional internal power dissipation. This effect is most pronounced when the input stage is
set for high gain (for low full-scale input voltage). The
typical performance curve "Input Offset Voltage vs Loop
Supply Voltage" describes this behavior.
10 = VIN " (0.016 + 401Ro) + 4mA,
(VIN in volts,
Ro in ohms, RUN = 00)
where VIN is the differential input voltage. With no Ra
connected (Ro= 00), a OV to IV input produces a 4-20mA
output current. With Ra = 25Q, a OV to lOmV input produces a 4-20mA output current. Other values for Ra can be
calculated according to the desired full-scale input voltage,
VFS' with the formula in Figure 1.
VtN = v+IN - V-1N
Possible choices for 0, (see text).
= IR (RTD - Rz)
IR=
O.SmA
!
IR=
O.SmA
! Ir
+
V ,N
\
RTD
(1,3)
IR
TYPE
PACKAGE
2N4922
TIP29B
TIP31B
TO-225
TO·220
T0-220
10
V+
5
R"
(2,3)
Ro
XTR103
6
B
0,
+
E
RG
RLIN(3)
11
~A+VIN(0.016+~)
Rz
NOTES: (1) Rz = RTD resistance at the minimum measured temperature.
(2)
R" =
~500
Q
• where
VFS is Full Scale V ,N•
--1
VFS
(3) See Table I for values.
FIGURE 1. Basic RTD Temperature Measurement Circuit.
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The low operating voltage (9V) of the XTR103 allows
operation directly from personal computer power supplies
(12V ±5%). When used with the RCV420 Current Loop
Receiver (Figure 8), load resistor voltage drop is limited to
1.5V.
LINEARIZATION
On-chip linearization circuitry creates a signal-dependent
variation in the two matching current sources. Both current
sources are varied equally according to the following equation:
500· VIN
IRI = IR2 = 0.8 +
~
XTR103
C")
o,...
in mA, VIN in volts, RLJN in ohms)
(maximum IR = 1.0rnA)
(IR
For operation without external
transistor, connect pin 11 to
pin 14. See text for discussion
of performance.
a:
This varying excitation provides a 2nd-order term to the
transfer function (including the RID) which can correct the
RID's nonlinearity. The correction is controlled by resistor
RLIN which is chosen according to the desired temperatura
measurement range. Table I provides the Ro, Rz and RLI
'
resistor values for a PtlOO RTD.
t<
FIGURE 2. Operation Without External Transistor.
LOOP POWER SUPPLY
The voltage applied to the XTR103, V+, is measured with
respect to the 10 connection, pin 7. V+ can range from 9V to
40V. The loop supply voltage, Vps, will differ from the
voltage applied to the XTR103 according to the voltage drop
on the current sensing resistor, RL (plus any other voltage
drop in the line).
If a low loop supply voltage is used, RL must be made a
relatively low value to assure that V + remains 9V or greater
for the maximum loop current of 20mA. It may, in fact, be
prudent to design for V+ equal or greater than 9V with loop
currents up to 34mA to allow for out-of-range input conditions. The typical performance curve "Loop Resistance vs
Loop Power Supply" shows the allowable sense resistor
values for full-scale 20rnA.
If no linearity correction is desired, do not connect a resistor
to the RLIN pins (RLJN = co). This will cause the excitation
current sources to remain a constant 0.8mA.
ADJUSTING INITIAL ERRORS
Most applications will require adjustment of initial errors.
Offset errors can be corrected by adjustment of the zero
resistor, Rz.
Figure 3 shows another way to adjust zero errors using the
output current adjustment pins of the XTRI03. This provides a minimum of ±300J.IA (typically ±500J.IA) adjustment
around the iuitiallow-scale output current. This is an output
current adjustment which is independent of the input stage
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FIGURE 3. Bridge Sensor, V LIN Connected for Negative Nonlinearity.
RlJN '" 24000 • 0.01 = -632 0
0.2· (-1.9)
6RIDGE TRANSDUCER TRANSFER FUNCTION
WITH PARABOLIC NONLINEARITY
Use RUN = 6320. Because the calculation yields a negative
result, connect V+LIN to V-IN and V-LIN to V+IN.
Gain is affected by the varying the excitation voltage. For
each 1% of corrected nonlinearity, the gain must be altered
by 4%. As a result, equation 2 will not provide an accurate
RG when nonlinearity correction is used. The following
equation calculates the required value for Ro to compensate
for this effect.
R = _ _ _.;;.;25:...;00-'--_ __
(6)
G
1
-;;-.,...-;;c-;;-;'--;~,.,--
(1 + 0.04 • B) V IS
10
9
8
~ 7 -
5
_
po~itive ~onlin:"'rity
6= +2.5%
6
!/----7 ~
%5
4
'"
3
~
2
- 1
o
/
1.# Linear Res~onse
6 =-1.9"/.
Negative Nonlinearity
o
0.1
0.2
0.3
0.4 0.5 0.6 0.7
Normalized Stimulus
0.8
0.9
3
A more accurate value for RUN can be determined by first
measuring the actual gain constant of the linearization inputs, KLIN (see equation 4). Measure the change in the
reference voltage, 6.V R' in response to a measured voltage
change at the linearization inputs, 6.V LIN' Make this measurement with a known, temporary test value for RLIN• These
measurements can be made during operation of the circuit
by providing stimulus to the bridge sensor, or by temporarily
unbalancing the bridge with a fixed resistor in parallel with
one of the bridge resistors. Calculate the actual K LIN:
R1ffif
+
•
NONLINEARITY vs STIMULUS
Ro = 23.320 for the example above.
•
v
/
B must again be a signed number in this calculationpositive for positive bowing nonlinearity, and negative for a
negative-bowing nonlinearity.
6. V R
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/
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0
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"
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0.1
.......
,
v
; r---....
"'-...
Positive Nonlinearity
B =+2.5%
""'-
~
.___v V
r-
-
" Negative Nonlinearity
6 =-1.9%
0.2
0.3
0.4 0.5 0.6 0.7
Normalized Stimulus
0.8
0.9
6. V lJN
Where: 6.VUN is the change in voltage at V LIN.
6.VR is the measured change in reference voltage, VR'
RmsT is a temporary fixed value of RLIN (in 0).
FIGURE 4. Parabolic Nonlinearity.
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Then, RUN can be calculated using equation 5 using the
accurate value of KLIN from equation 7. KUN can be a
different value for each XTRI04.
It is also possible to make a real-time adjustment of RUN with
a variable resistor (active circuit trimming). This is done by
measuring the change in VR in response to a zero-to-VFS
change in voltage applied to the VUN inputs. To correct for
each I % of nonlinearity, the excitation voltage, VR' must
make a 4% change at full-scale input. So the change in
reference voltage, /:N R' for a full-scale change in VLIN can be
calculated by:
!!VR = 0.2' B
OTHER SENSOR TYPES
The XTRI04 can be used with a wide variety of inputs. Its
high input impedance instrumentation amplifier is versatile
and can be configured for differential input voltages from
millivolts to a maximum of I V full scale. The linear common-mode range of the inputs is from 2V to 4V, referenced
to the 10 terminal, pin 7.
You can use the linearization feature of the XTRI04 with
any sensor whose output is ratiometric with an excitation
voltage. For example, Figure 5 shows the XTRI04 used with
a potentiometer position sensor.
(8)
REVERSE·VOLTAGE PROTECTION
Example: A bridge sensor has a -1.9% nonlinearity. Apply
the full-scale bride output, V FS (10mV), to the V UN inputs
and adjust RUN for:
VR' = 5V + 0.2 • B = 4.62V
Note that with all the calculation and adjustment methods
described above, the full-scale bridge output is no longer
equal to V FS because the excitation voltage at full scale is no
longer 5V. All the calculations and adjustment procedures
described above assume VFS to be the full-scale bridge
output with constant 5V excitation. It is not necessary to
iterate the calculations or adjustment procedures using the
new full-scale bridge output as a starting point. However, a
new value for Ro must be calculated using equation 6.
A refined value for RLIN, arrived at either by active circuit
trimming, or by measuring linearization gain (equation 7)
will improve linearity. Reduction of the original parabolic
nonlinearity of the sensor can approach 40: I. Actual results
will depend on higher-order nonlinearity of the sensor.
If no linearity correction is desired, make no connections to
the RUN pins (RUN = 00). This will cause the VR output to
remain a constant +5V. The V+LIN and V-LIN inputs should
remain connected to the bridge output to keep these inputs
biased In theIr active region.
~
Figure 6 shows two ways to protect against reversed output
connection lines. Trade-offs in an application will determine
which technique is better. D, offers series protection, but
causes a 0.7V loss in loop supply voltage. This may be
undesirable if V+ can approach the 9V limit. Using D
(without D,) has no voltage loss, but high current will
in the loop supply if the leads are reversed. This coul
damage the power supply or the sense resistor, RL' A diode
with a higher current rating is needed for D2 to withstand the
highest current that could occur with reversed lines.
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Long lines may be subject to voltage surges which can
damage semiconductor components. To avoid damage, the
maxinJum applied voltage rating for the XTRI04 is 40V. A
zener diode can be used for D2 (Figure 7) to clamp the
voltage applied to the XTRI04 to a safe level. The loop
power supply voltage must be lower than the voltage rating
of the zener diode.
There are special zener diode types (Figure 7) specifically
designed to provide a very low impedance clamp and withstand large energy surges. These devices normally have a
diode characteristic in the forward direction which also
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FIGURE 5. Potentiometer Sensor Application.
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Bypass capacitors on the input often reduce or eliminate this
interference. Connect these bypass capacitors to the Io terminal (see Figure 7). Although the DC voltage at the Io
terminal is not equal to OV (at the loop supply, VpS) this
circuit point can be considered the transmitter's "ground".
protects against reversed loop connections. As noted earlier,
reversed loop connections would produce a large loop Cl!l'rent, possibly damaging RL'
RADIO FREQUENCY INTERFERENCE
The long wire lengths of current loops invite radio frequency
interference. RF can be rectified by the sensitive input
circnitry of the XTRI04 causing errors. This generally
appears as an unstable output current that varies with the
position of loop supply or input wiring.
LOW-IMPEDANCE BRIDGES
Low impedance bridges can be used with the XTRI04 by
adding series resistance to limit excitation current to S2mA.
Equal resistance should be added to the upper and lower
sides of the of the bridge (Figure 8) to keep the bridge ontput
voltage centered at approximately 2.5V. Bridge output is
reduced, so a preamplifier, as shown, may be needed to
reduce offset and drift.
If the bridge sensor is remotely located from the XTRI04,
the interference may enter at the input terminals. For integrated transmitter assemblies with short connections to the
sensor, the interference more likely comes from the current
loop connections.
lN4148
D1
,-----t-......---t--I4I---..
°
Use either 01 or 2See "Reverse Voltage Protection."
D2
lN4001
FIGURE 6. Reverse Voltage Protection.
Zener diode 36V: 1N4753A
or
General Semiconductor Transorb'" lN6286A, special
low impedence clamp type. Use lower voltage zener
diodes with loop power supply voltages less than 30V
for increased protection.
Maximum VPS must be less than
minimum voltage rating of zener diode.
FIGURE 7. Over-Voltage Surge Protection.
'1:11:1'
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1.37mAat 5V
Bridge Excitation
Vo~aQe = 0.42V
approx. x10
Amplifier
FIGURE 8. 3500 Bridge With XlO Preamplifier.
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FIGURE \/. ±L!V-Powered Transmitter/Receiver Loop.
::)
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-
,...-----__.-..----0 +15V
.+---0 0
Isolated Power
from PWS740
-15V
1~V+
9
10 =4·20mA
7
8
o
Vo
-::- 0-5V
V-
FIGURE 10. Isolated TransmitterlReceiver Loop.
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BURR-BROWN@
XTR110
IEilEilI
PRECISION VOLTAGE-TO-CURRENT
CONVERTER/TRANSMITTER
FEATURES
APPLICATIONS
• 4mA TO 20mA TRANSMITTER
• SELECTABLE INPUT/OUTPUT RANGES:
OV to +5V, OV to +10V Inputs
OmA to 20mA, 5mA to 25mA Outputs
Other Ranges
• PRESSUREITEMPERATURE
TRANSMITTERS
• INDUSTRIAL PROCESS CONTROL
• CURRENT-MODE BRIDGE EXCITATION
• GROUNDED TRANSDUCER CIRCUITS
• CURRENT SOURCE REFERENCE FOR
DATA ACQUISITION
.0.005% MAX NONLINEARITY, 14 BIT
• PRECISION +1 OV REFERENCE OUTPUT
• SINGLE SUPPLY OPERATION
• PROGRAMMABLE CURRENT SOURCE
FOR TEST EQUIPMENT
• WIDE SUPPLY RANGE: 13.5V to 40V
• POWER PLANT/ENERGY SYSTEM
MONITORING
DESCRIPTION
The XTRllO is a precision voltage-to-current
converter designed for analog signal transmission. It
accepts inputs of 0 to 5V or 0 to IOV and can be
connected for outputs of 4 to 20mA, 0 to 20mA, 5 to
25mA and many other commonly used ranges.
A precision on-chip metal film resistor network provides input scaling and cl1rrent offsetting. An internal
IOV voltage reference can he used to drive external
circuitry.
I
Source
Resistor
VREF Adjust 11
V,N, (IOV)
The XTRllO is available in l6-pin plastic DIP,
ceramic DIP and SOL-16 surface-mount packages.
Commercial and industrial temperature range models
are available.
14
4
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'--'----t--;:;--'
g~:
7 }:::
Adjust
I8
=t
International Airport Indust~al Park • Mailing Address: PO Box 11400 • TUcson, AZ 85734 • Strael Address: 6730 S. lueaon Blvd. • luC8Dn. AZ 85706
181:(602)746-1111 • Twx: 911J.852-1111 • C8ble:BBRCORP • 10Iex:066-&191 • FAX: (602) 889-1510 • Immedial8 Product Info: (800)546-6132
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SPECIFICATIONS
ELECTRICAL
At T". =+25°C and Vee = +24V and Rl
=2500**, unless othelWise specified.
XT~KP,_KU
PARAMETER
CONDITIONS
MIN
Specified Performance
Specified Performance
Specified Performance(1)
Derated Performance!')
16mAl20mA Span(2)
10 = 4mA(1)
0
0
4
0
TYP
XTRll0BG
MAX
MIN
TYP
MAX
UNITS
··
0.005
V
V
mA
mA
%ofSpan
0.1
0.003
%ofSpan
%ofSpan/'C
JI
TRANSMITTER
Transfer FUnction
Input Range: V1N ,(5)
V,,,,
Current, 10
Nonlinearity
Offset Current, los
Initial
vs Temperature
,.,
",
10= '"
20mA
vs Supply, Vee
Span Error
Initial
vs Temperature
vs Supply, Vee
Output Resistance
Input Resistance
",
",
",
From Drain of FET (0",),3,
V1N1
V,,,,
VAEFln
10 = 10 :V""lnll_6). ('i~,14) ~ (V,.,t2 IRSp,"
+10
*
+5
20
40
0.002
0.01
0.025
··
0.2
0.0003
0.0005
0.4
0.005
0.005
0.02
0.3
0.0025
0.003
10 x 10'
27
22
19
0.6
0.005
0.005
0.05
0.0009
·
·
0.2
0.003
%ofSpanN
0
.....
.....
%ofSpan
% of SpanIDe
%ofSpanIV
I-
n
kn
kn
kn
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Dynamic Response
Settling Time
To 0.1% of Span
To 0.01 % of Span
15
20
1.3
Slew Rate
+9.95
vs Temperature
POWER SUPPLY
Input Voltage, Vco
Ouiescent Current
~
"S
mlV~
Line Regulation
Load Regulation
Specified Performance
+10
35
0.0002
0.0005
100
+10.05
50
0.005
0.01
-0.100
10
+0.25
+13.5
Excluding 10
TEMPERATURE RANGE
Specification: AG, BG
KP,KU
Operating: AG, BG
KP,KU
+40
4.5
3
-40
0
-55
-25
+85
+70
+125
+85
+9.98
15
··
·
·
·
+10.02
30
·
·
··
·
V
ppml"C
%N
%/mA
ppm/lk hrs
V
mA
V
mA
'C
'C
'C
'C
.. Spcc:ficat:cns same a:; l',G/KP grades. ** Specifications apply to the range of Rl showp. !!"! Typica! Pe-rrormanoo Gtlrv~~
NOTES: (1) Including internal reference. (2) Span is the change in output current resulting from a full-scale change in input voltage. (3) Wijhin compliance range limited
by (+Vee -2V) +Vos required for linear operation of the FET. (4) For VREF adjustment circuit see Figure 3. (5) For extended IREF drive circuit see Figure 4. (5) Unit may
be damaged. See section, "Input Voltage Range".
ABSOLUTE MAXIMUM RATINGS
Power Supply, +Vee ............................................................................. 40V
Input Voltage. V1N1• V,N2• VREFIN.·· ...... ·.··.·······... ·.·.··········· .....····· .......... +Vcc
See text regarding safe negative input voltage range.
Storage Temperature Range: A, B ................................ -55'C to +125'C
K, U ................................. -40'C to +85"C
lead Temperature
(soldering, lOs) G, P ................................................................... 300'C
(wave soldering, 3s) U ................................................................ 260'C
Output Short-Circuit Duration, Gate Drive
and VREF Force ................................. Continuous to common and +Vcc
OUtput Current Using Internal son Resistor .................................... 40mA
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Output Voltage
vs Supply, Vee
vs Output Current
vs Time
Trim Range
Output Current
·
t
'g 3
X
I
2500
..
..
§:
rf
10 ",,4mA
2 F--.
1
...
_. . .
2000
__
1500
1000
0
.
500
,..
,..
._-----
-40
-20
20
40
60
80
a:
><
..
I-
0
15
Temperature (Oe)
20
25
30
+Vee (V)
SETILING TIME WTH NEG V ,N STEP
PULSE RESPONSE
V,N
V,N
OV
OV
35
40
en
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::::i
Q.
::a:
OV
10 Error
10
(O.OI%of
Span/Box)
soon
<
1---------1
4
T,
3
R,
15kn
(f)
a:
w
Offset
Adjust
RB 2000
Fine Trim
RH 50kn
)
u::
Span
Adjust
Course Trim
:J
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liiz
-15V
200
R1 , R2 : Low Te resistors to dissipate O.32W continuous power.
For other current ranges, scale both resistors proportionately.
RB• R,0 , Rl1 : 10-tum trimpots for greatest sensitivity.
Rs. R7: Low Te resistors.
o +----------",1"'-_ _ _ _ _--1 V ,N (V)
-200
A, - A.:
T, :
T,:
T,:
1/4 LM324 (powered by ±15V).
International Rectifier IR9513(1).
International Rectifier IR513(1).
International Rectifier IRFF9113(1).
NOTE: (I) Or other adequate power rating MOS transistor.
FIGURE 8. ±200mA Current Pump.
BURR-BROWN®
• Ea Ea, Burr-Brown Ie Data Book-Linear Products
4.243
For immediate Assistance, Contact YourLocal Salesperson
,:
Isolation Barrier
+15V
Isolated Power
Supply (722)
1jJF
-15V +15V
f-::L
-15V +15V
7
FIGURE 9. Isolated 4mA to 20mA Channel.
+24V
4
OVto+10V
XTR110
3
14
See extended span section.
FIGURE 10. OA to lOA Output Voltage-to-Current
Converter.
aURR-"Bm e
4.244
Burr-Brown Ie Data Book-Linear Products IEiI~
Or, Call Customer Service at 1-800-548-6132 (USA Only)
BURR-BROWN@
XTR501
1E3E31
PRELIMINARY INFORMATION
SUBJECT TO CHANGE
WITHOUT NOTICE
HIGH CURRENT BRIDGE DRIVER
and 4-20mA Transmitter
,...
o
it)
a:
t<
FEATURES
DESCRIPTION
• SENSOR EXCITATION OF 1W
The XTRSOI contains a high efficiency DCIDC converter and 4-20mA three wire current transmitter. It
provides regulated bridge excitation, optional half
bridge, differential inputs and current transmitter necessary for the excitation and signal conditioning of
low impedance bridge sensors and high integrity signal transmission.
• VARIABLE EXCITATION VOLTAGE:
1.5V to 5.0V
• SINGLE SUPPLY: 11.4V to 30VDC
• INRUSH CURRENT LIMITING
• 4-20mA TRANSMITTER
APPLICATIONS
• GAS DETECTION SENSORS
• PELLISTOR CATALYTIC DETECTORS
• STRAIN GAGES
• HIGH CURRENT BRIDGES
The DC/DC converter is capable of supplying 1W into
a regulated bridge voltage of l.SV to S.OV from a
supply of 11.4V to 30V. The combination of a low
startup current and high efficiency current step-up
allows for a combined supply line resistance of up to
lOOn when exciting low impedance sensors.
The instrumentation amplifier of the current transmitter can be used over a wide range of gains, accommodating a variety of input signals and sensors.
• LOAD CELLS
• HOT-WIRE ANEMOMETERS
The XTRSOI is particularly suited to excitation of
high currentllow impedance sensors used in bridge
applil;auuHs allowing the use of lighter cabling leading to considerable savings on cabling costs.
en
a:
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~
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z
-
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lOngC~
XTR501
DC/DC
International Airport Indu.trial Par1c • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Add....: 6730 S. Tucson Blvd. • Tuc.on, AZ 85706
Tel: (602) 746-1111 • Twx: 911Wl52-1111 • Cable: BBRCORP • Telex: 066·6491 • FAX: (602) 899-1510 • Immediate Product Info: (800) 548-6132
PDS·1212
4.245
For Immediate Assistance; Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
v, = 24V, VBRIDOE = 2V, ILOAD= 300mA unless otherwise specified.
T. c +25°C,
XTR501
PARAMETER
CONDITIONS
INSTRUMENTATION AMPLIFIER/CURRENT TRANSMITTER
SIGNAL OUTPUT
Output Current Equation
Ra in 0, V1N in V
Output Current
Linear Operating Range
Over,scale Limn
Under-scale Limit
ZERO
Output Current
Offset Error
vs Temperature
vs Supply Voltage
10
4
25
TYP
~
4
±SO
0.2
0.5
R" in g, Y'N in V
Span
G= 1
G =250
vs Temperature
Nonlinearity
G= 1, 10 = 4mAto20mA
INPUT
Common-Mode Range
Offset Voltage
vs Temperature
vs Supply Voltage
Common-Mode Rejection
Impedance; Differential, Common-Mode
DC/DC CONVERTER
BRIDGE EXCITATION VOLTAGE SOURCE
Output Voltage
vs Temperature
vs Long Term Stability
Output Power
Lin. Voltage Regulation
Load Voltage Regulation
Output Vottage Ripple
Output Voltage Ripple Frequency
Output Short-Circuit Current
Input Current
POWER SUPPLY
Supply Voltage, Vs
Supply Current
0.25
0.25
-40
-40
IS
%
%
ppmrC
%
V
ppmrC
ppmll000hrs
W
%
%
1
Limned Duration
Output Short-Circuit
AN
5
85
V, = 11.4V to 30.0V
Loed Current 160mA to 340mA
Load Voltage 2V
Load Current 300mA
Load Voltage 2V
JJ.AN
V
mV
jlV/oC
dB
dB
gil pF
10" 116
200
100
ItA
4.94(1)
35
50
100
1.5
A
mA
mA
mA
J-lArC
2
+ 50knlR.)/4.94]
±0.2
±2.5
±1.5
±10
50
±O.025
Y'N = OV, G= 1
UNITS
mA
±100
= 0.016[(1
0
11.4
TEMPERATURE
Operating
Storage
MAX
o.oJ + 0.016 [(1 + 50knlR.l/4.94] Y'N
20
27
0
V, = 11.4V to 30V
SPAN
Span Equation
Untrimmed Error
NOTE: (1) Common-Mode Range
MIN
150
mV
100
2.6
150
kHz
A
24
See Typical Curve
rnA
30
V
+70
+85
OC
OC
based on a multiple of a bandgap reference of 1.235V.
The Information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such Information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for uSe in lHe support devices and/or systems.
4.246
Burr-Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
5 Isolation Products
and offered with specifications over the military
temperature range.
ISOI03-Unity-gain isolation amp combined with
an internal isolated DCIDC converter in a spacesaving, 24-pin ceramic DIP.
IS0212-Low cost, uncommitted input amplifier,
differential output with an internal isolated
DCIDC converter.
ISOIOO-Versatile, adjustable gain opticallycoupled amplifier in a 18-pin DIP.
3656-Transformer-coupled amplifier with an internal isolated DCIDC converter that offers three
port isolation.
..
IS0150-High speed, low cost dual digital trans
ceiver that is TTL- and CMOS-compatible, available in a 24-pin plastic DIP and in a 28-Lead
Isolation amplifiers can be used to amplify and
measure low level signals in the presence of high
common-mode voltages, breakground loops and!
or eliminate source ground connections, provide
an interface between medical patient monitoring
equipment and provide isolation protection to electronic instruments/equipment.
Our isolation amplifiers feature three different
technologies-transformer isolation, capacitor isolation, and opto-isolation. The following selection
guides will help you determine the performance
and functionality that best fit your requirements.
Choose from the industry's most complete line of
isolation solutions including:
IS013O-Provides high isolation-mode rejection,
wide bandwidth and low cost in 8-pin DIP and
surface-mount packages.
IS0122-Low cost, 1500V isolation available in
16-pin plastic DIP and 28-pin SOIC packages.
IS0120-Industry's first total hermetic isolation
amplifier with 0.01 % linearity. It is synchronous
en
W~.
~
The selection guide also includes our versatile line
of isolated DCIDC converters.
Descrip
Model
Balanced
Current
Input
3650
2000
Balanced
3652
2000
5000
Low Drift
WideBW
High IMR
WideBW
IS0100
750
2500
IS0130
720
960
5000
Isolation
ModeReIso
jection, typ Leakage ImpeDC UOH.;, Current daiice
(dB) (dB)
(!IA)
(0) (pF)
Gain Nonlinearity
typ
max
(%)
(%)
140
120
0.351~
140
120
0.35 12)
1012
1.8
±0.1
0.31~
1012
2.5
0.07
TBO
10" 0.7
±D.25
14613) 108(3)
140
140
0
oa:
c.
Boldface = NEW
OPTICALLY-COUPLED ISOLATION AMPLIFIERS
Isolation
Voltage (V)
Pulse
Coni T&st
Peak Peak
::)
1012
1.8
Voltage
Ext
Drift
Bias ±3dB Iso
(±ilVreI CUii6iit Fi6q POW6i
Page
max
max (kHz) Req Tempi') No.
5
40nA
±0.05
25
0.02
2.5(3)
±D.l
2.1(4)
±0.05 ±0.02
15
Yes
Ind
5.189
50pA
15
10nA
60
Yes
Ind
5.189
Yes
Ind
5.15
670nA(4)
85
Yes
Ind
5.97
NOTES: All packages are DIPs. (1) Ind =-25'C to +85'C. (2) At 240V/60Hz. (3) R'N = 10ka (4) Typical.
BURR-BROWN®
• EalEaI, Burr-Brown Ie Data Book - Linear Products
1
5.1
z
o
~
....i
o
~
For Immediate Assistance, Contact Your Local Salesperson
CAPACITOR-COUPLED ISOLATION AMPLIFIERS
Boldface
Model
Isolation
Voltage (V)
Pulse
Cont Test
Peak Peak
1500VAC IS0102
Isolation
IS0120
IS0122
2121 4000
2121 2500(2)
1500 2400(2)
160
160
160
120
115
140
1.0
0.5
0.5
1014
1014
10 14
6
2
2
±O.003 ±0.002
±0.01 ±O.005
±0.02 ±O.016
±250
±150
±200(4)
70
60
50
Yes
Yes
Yes
Ind(3)
Ind(')
Com
5.30
5.70
5.84
3500VAC
Isolation
4950 8000
4950 5600(2)
160
160
130
115
1.0
0.5
10 14
1014
6
2
±O.025 ±O.007
±0.01 ±O.005
±250
±150
70
60
Yes
Yes
Ind(')
Ind(')
5.30
5.70
Descrlp
IS0106
IS0121
Isolation
ModeReIso
lectlon, tll! Leakage ImpsDC60Hz
Current dance
(0) (pF)
(jlA)
(dB) (dB)
=~EW
Voltage
Ext
Drift
Bias ±3dB Iso
(±J.lV/"C) Current Freq Power
Page
max
max (kHz) Req Temp(1) No.
Gain Nonlinearity
max
tYP
(%)
(%)
NOTES: All packages are DIPs except ISOl22 which is also available in SOIC. (1) Ind =
discharge test voltage. (3) Hermetic. (4) Typical.
~25°C
to +85°C. Com = O°C to +70°C. (2) Partial
TRANSFORMER-COUPLED ISOLATION AMPLIFIERS
Descrlp
Model
Isolation
VOltage~1
.
PUBe
Cont Test
Peak Peak
High
Isolation
Voltage
3656
3500
Low Cost
SelfPowered
IS0212
1060 1200(2)
8000
Boldface
= NEW
Voltage
.Ext
Drift
Bias ±3dB Iso
(±J.LV/"C) Current Freq Power
Page
max
max (kHz) Req Temp(') No.
Isolation
Mode ReIso
jectlon,tw Leakage ImpeDC 60 z Current dance
(dB) (dB)
(jlA)
(0) (pF)
Gain Nonlinearity
max
tYP
(%)
(%)
160
125
0.5
10"
6
±0.05 ±0.03
100nA
5+
(350/G,)
160
115
2
10'·
12
±O.025 ±0.015
±30
50nA
(±30/G,)
30
No
No
Ind
5.201
Com 5.117
NOTES: The package for the 3656G is a DIP, the packlige for the IS0212P is a SIP. (1) Ind = -25°C to +85°C, Com = O°C to +70°C. (2) Partial
discharge test voltage.
Boldface = NEW
CAPACITOR-COUPLED ISOLATION AMPLIFIER, WITH POWER
Isolation
Isolation
Voltage (V)
Mode
Gain Non"
PulseJ Rejection, typ Leakage
Iso
linearity
DC 60Hz Current Impedance max typ
Cont Test
Peak Peak
(dB) (dB)
(%) (%)
(IIA)
!U! !pFj
Voltage
Drift
(±J.LVI"C) Bias
max
Current
±3dB
Freq
(kHz) Temp(')
Page
No.
Description
Model
1500VAC
Input Power
IS0103
2121
5657
160
130
2.0
10"
9
.05
.018
250
20
Ind
5.45
1500VAC
Output Power
ISOl13
2121
5657
160
130
2.0
10"
9
0.02 0.012
250
20
Ind
5.62
2500VAC
Input Power
IS0107
3500
8000
160
100
2.0
10" 13
0.025 0.01
400
20
Ind
5.54
NOTES: All packages are DIPs. (1) Ind = -25°C to +85°C.
BURR·BROWNIHI
5.2
Burr-Brown Ie Data Book - Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
ISOLATION POWER SUPPLlES(1)
Isolation
Voltage (V)
Pulse
Cont Test
Peak Peak
Model
Description
Boldface
Input
Voltage
(VDC)
min max
Single
±15V
Output
PWS725A
PWS726A
2121
4950
4000
8000
7
7
18
18
Dual±15V
Output
0722
3500
8000
5
Quad±8V
Output
0724
1000
3000
Multiple
Output (1-8)
PWS740
PWS745(8)
PWS750
2121 4000
1060 1200(9 )
1060 1200(9)
Leakage
Current
240VAC
60Hz
(IIA)
2
2
Iso
Impedance
(0) (pF)
Current,
Balanced
Sensitivity
Loads On All
To Input
Outputs (mA)
Change
Max")
Temp")
(VN)
Rated
= NEW
Pkg
Page
No.
10"
10"
9
9
±15
±15
±40
±40
1.15
1.15
Ind
Ind
DIP
DIP
5.142
5.142
16
10'·
6
±3-40
±50
1.13
Ind
Mod
5.179
5
16
10"
6
±3-16
±60
0.63
Ind
Mod
5.184
7
4.5(5)
4.5(5)
20
18(6)
18(6)
10"
10"
10"
3
8
8
30(3)
60(3)
1.20
±15
±15
30
30
(7)
Ind
Ind
Ind
Sys(4)
Comp
Comp
5.148
5.156
5.166
1.5
1.5
1.5
(7)
NOTES: (1) See complete Product Data Sheet for full specifications, especially regarding output current capabilities. (2) Ind =
-25°C to +85°C. Com = QOC to +70°C. (3) Per channel. (4) 1 TO-3 driverper8 channels, plus 2 DIPs perchannel. (5) 5Voperation. (6) 15V operation.
(7) 5V operation: 4.12; 15V operation: 1.2. (8) PWS745-1 driver may also be used with PWS740 and PWS750 components. (9) Partial discharge
test voltage.
CAPACITOR-COUPLED, DIGITAL COUPLER
Isolation
ulse
Test
Peak
Leakage
Current
240VAC
60Hz
(J.IA)
24()O12)
0.6
VOlta~e(V)
Description
Model
Cont
Peak
Dual
Isolated
Transceiver
IS0150
1500
NOTES: (1) Xlnd
Boldface
Iso
Impedance
(0) (pF)
10"
Data
Rate
(MBd)
Common
Mode
Transient
Immunity
(kV/IJS)
Power
Consumption
per Channel
(mW)
Ext
Power
Req
Page
Temp(')
BD")
1.6(3)
250
Yes
Xlnd
5
= 40°C to +85°C. (2) Partial discharge test voltage.
Precision
Measured
SOOrms
•
No.
60Hz coni
Leakage Isolation
Current Impedance
4p.Arms 2GQIIISpF
3.SHz
3SnA (Iyp)
Yes
No
Temp.
Range
Pkg
Page
No.
O°C 10 +70°C Mod
S.4
r.hAnnAI
ISOLATION CURRENT TRANSMITTER
Description Model
Two-wire
Span
IXR100 untrimmed error (max):
-2.5%
non-linearity (max):
0.01% (EMF),
0.1% (RTD)
Temperature
Drift
Boldface
Input
50ppm (typ)
Output
Temperature
Range
Offset Voltage
Current Range 4 - 20mA -20 to +70°C
500l1V (typ)
Current Limit 32mA
10Qppm (max)
Offset Voltage
Isolation Voltage 1500rms
vs Temp 511V!°C
CMR vs Supply 100dB
= NEW
Pkg
Page
No.
Mod
5.128
BURR-BROWN@
I EilEiII
Burr-Brown Ie Data Book - Linear Products
o
o
Gain Non- Frequency Input Bias Reference
Isolatad
linearity
Response Current
VoHage Power Req
±O.OI% (typ)
en
I-
:::l
C
Boldface = NEW
Isolation Isolation
Voltage
Mode
ISC300
Pkg
DIP, 5.108
SOIC
(3) Typical.
SPECIAL FUNCTIONS
Description Model
= NEW
5.3
IX:
~
Z
o
~
....i
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~
Forlmmediate Assistance, Contact Your Local Salesperson
BURR-BROWN®
ISC300
IE:lE:lI
Universal Precision Isolated
MEASUREMENT CHANNEL
FEATURES
APPLICATIONS
• CALIBRATION CAPABILITY
• INTEGRAL SENSOR EXCITATION
• UNIVERSAL INPUT CHANNEL FOR
PROCESS CONTROL SYSTEMS
• OPEN CIRCUIT SENSOR DETECTION
• ISOLATED MEASUREMENT CHANNEL
FOR THERMOCOUPLE, RTD AND
VOLTAGE TRANSDUCERS
• LOW POWER: 80mW
• INSTRUMENT AMPLIFIER INPUT
• CHANNEL.TO CHANNEL ISOLATED
MULTIPLEXED SYSTEMS
• PROGRAMMABLE GAIN
• 12-BIT LINEARITY
• TWO ISOLATED POWER SUPPLIES:
±13Vat SmA
• ISOLATED 4 TO 20mA RECEIVER
• LOW DRIFT 10V REFERENCE
DESCRIPTION
The ISC300 is an isolated measurement channel with
open circuit sensor detection for use with RID and
thermocouple temperature sensors. In addition to temperature measurement, the ISC300 can accept full
scale input voltages of ±100mV and ±lOV which
allows use with other sensors such as pressure, humidity and flow sensors. The low level resistance measurement capability also allows stimulus and measure9
ment of strain gauges. The measurement channel has
a highly stable internal reference which can be selected from the output side. This allows the user to
calibrate each channel at the factory, record the calibration data and periodically recalibrate the system
while in use over time and ambient temperature
changes.
INPUT
SELECT
..VI80 o - - - - - - - - - - - - - - - - ,
2 -vISOO----------------,
~
",0------1
Oul
28
De~d
~,o------I
Vcc (+15) 25
p~,
1
A,
A"
Signal
0
0
1
1
0
1
0
1
GAIN
SELECT
G
0.5
50
0
1
Com,
B,",,,
VREFo-----..J
CKI
26
Com 2
27
+O.IV
+10V
SELECT
and GAIN
A"
'"
A,
InputSlda
OuIputSide
RS'f
23
DCom2
24
No Change
No Change
latch
RESET
International Airport Industrial Park • Mailing Address: PO Box 11400
Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd.
Tel: (602) 746·1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX:
5.4
PDS-1135A
RST
ClK
1
1
1
0
0
1
A
X
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At Vee = 15V, VDD = 5V, T. = +25°C unless otherwise noted.
ISC300
PARAMETER
ISOLATION
Isolation Voltage (V,SO)
CONDITIONS
MIN
AC60Hz Continuous
AC60Hz Continuous
500
±700
700
800
110
Vise, DC
Isolation Mode Rejection (IMR)
Barrier Impedance
Leakage Current (1"0)
Partial Discharge(1)
V"o = Rated 60Hz Con~2)
VPEAI<
V
4
50,0.5
10
O°Cto +70°C
__ ~o =-5V to +5V(4)
±30
±D.Ol
vs Supply (Veel
V,N = OV G = 0.5
V,N =OVG=50
O°C to +70°C G = 0.5
O°C to +70°C G = 50
Vee = 14V to 16V
±1.5
INPUT CURRENT
Initial Bias
vs Temperature
-40°C to +85°C
35
100
vs Temperature
INPUT
Voltage Range
Resistance Range
Peal< Voltage
Impedance: Differential
Common Mode Rejection
Source Impedance Imbalance
OUTPUT
Voltage Range
Overrange Voltage
Output Impedance
Ripple Voltage
FREQUENCY RESPONSE
Input Bandwidth
Input Settling Time
Input Overload Recovery
Output Overload Settling Time
Output Overload Recovery
VOLTAGE REFERENCE
VREF> (Internal and External)
Initial Accuracy
vs Temperature
vs Time
vs Supply (Veel
Rated Operation G = 0.5V Input
Rated Operation G = 50V Input
Rated Operation G = 50 3~wir8 Resistance
Applied to Any Signal Input Wr! Com 1(5)
CMR at DC Gain = 0.513)
CMR at DC Gain = 50(3)
CMR at 60Hz)')
For Normal Operation < 1kQ Imbalance
Min Load = 1MQ
During Input Fault (V'N < -llVor V,N > l1V)
±5
±200
±5
0
V
V
Q
V
MQ
dB
dB
dB
75
tOO
70
!!2
en
t-
0
::::)
C
0
a:
c..
V
V
mVrms
3.5
0.5
5
1
2
Hz
s
s
ms
ms
Z
0
kQ
~
mVp-p
5
....i
0
!!2
V
±1
±20
±20
%
ppmrc
ppmlkHr
%N
100
±D.l
±10
V REF2 (Internal)
Initial Accuracy(6)
vs Temperature
vs Time
mV
±1
±20
±20
%
ppm/oC
ppmlkHr
%N
vs Supply (Vee)
POWER SUPPLIES
Analog Supply Range
Supply Current
Digital Supply Range
Supply Current
Total Power Dissipation
Isolated Supplies: Vonage
Current
C")
0
kQ
3
0.5
10
to
±D.l
±10
0
0
mV
mV
)!Vf'C
)!VloC
mVN
±10
±D.l
500
±3B0
±5
External Loading of 100nA
%
nA
pAloC
±5.4
TSETT' to within 5% forVIN < 14V
%
ppm/oC
50
10
f = 0 to 5kHz Min Load 1MQ
f = 0 to 100kHz Min Load 1MQ
dB
GQllpF
)!Arms
VN
mVlQ
±3
±50
±0.025
±200
10
66
75
60
UNITS
Vrms
21115
Resistance Conversion
INPUT OFFSET VOLTAGE
Initial Offset (Input Referred)
MAX
Vrms
V"o = 240 Vrms 60Hz
GAIN
Voltage Gains
Initial Error
vs Temperature
Nonlinearity
TYP
Vee Pin
14
No External Load
5
VooPin
4
No External Load
at SmA Each Supply
11.5
1
80
13
5
16
10
6
3
184
V
mA
V
mA
mW
V
mA
BURR-BROWN®
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Burr-Brown Ie Data Book-Linear Products
5.5
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SPECIFICATIONS (CONn
ELECTRICAL
At Vee = t5V, Voo = 5V, TA = +25'C unless otherwise noted.
ISC300
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT OIC SENSE
Sense Current
REFERENCE CURRENT
Reference Current (lREF')
199
Reference Currents Ratio
IREF1 :
Vee = 15V
Vee = 15V
V. = ltV Vee = 15V
V,,=4VVee =15V
"A
201
I1A
±D.5
%
3.5
1.5
450
20
20
5
5
11
V
V
45
55
55
kHz
%
0
0
-40
70
70
85
'c
'c
'c
350
350
50
I1A
I1A
'CIW
220
8JA
V
V
ns
ns
ns
ns
ns
4
45
TEMPERATURE RANGE
Specification
Operating
Storage
200
IREF2
DIGITAL INPUTS A." A" G, CLK, RST (74HC EQUIVALENT)
High-Level Input Voltage
low-level Input Voltage
Input Rise and Fa/I Times (tR, ~)
ClK RST A" A" G
Pulse Width (tw)
ClK, RST
Data Change to ClK High
Setup (Isu)
Hold(!,.,)
Data Change from ClK High
RST High to ClK High
Release (t"EG)
CLOCK SYNC CKI
Input Voltage - High level
Input Voltage - low level
Input Current - High level
Input Current - low level
Input Frequency
Input Duty Cycle
I1A
0.7
0.7
I", Sense 1 = OV
-I", Sense 2 = OV
150
TJmsx
'c
NOTES: (1) See "High Voltage Testing" Section. (2) IMR is defined with respect to the voltage between Com 1 and Com 2 with both inputs tied to Com 1. (3) CMR is
defined with respect to the Input common, Com 1, only. (4) Deviation from a straight line between the end pOints of the output voltage. (5) Device output remains
monotonic. (6) limit referred to V REF,.
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Bottom View
1
2
3
4
5
6
7
8
9
10
10VRef
-VSS1
Sense 1
IREF1
+In
-In
IREF2
Sense 2
Signal Input Voltage ......................................................................... ±380V
Analog Supply Voltage Vee .................................................................. 18V
Digital Supply Voltage VDO ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 7V
Voltage Across Barrier ................................................................. 800Vrms
Storage Tempereture Range .......................................... -45'C to +1 OO'C
lead Temperature (soldering, lOs) ................................................ +300'C
Out Short Circuit Duration ........................................ Continuous to Com 2
Relative Humidity (non-condensing) ............................................. 95% RH
NOTES: Stresses exceeding those listed above may cause permanent
damage to the device. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
+VSS1
Com 1
TIMING INFORMATION
18
19
20
21
22
23
24
25
26
27
28
Voo (+5V)
G
A,
-
A,
ClK
RST
DCom2
Vcc (+15V)
CKI
Com 2
Out
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THEORY OF OPERATION
The ISC300 has no galvanic connection between the input
and output sections. The differential input signal is multiplied by the progranunable gain amplifier and accurately
transferred across the isolation barrier to the output. The
output section demodulates the signal transferred from the
input section and transfers power to the input section.
ISC300 DESIGN
The ISC300 consists of:
• A filtered differential high impedance input.
• Precision matched current sources.
• Fault detect bias resistors.
• Digitally selectable internal calibration references.
• Digitally selectable gain.
• Isolation of all digital and analog signals.
• Isolated DC/DC converter.
• Synchronizable internal oscillator.
• Two isolated power supplies available for external circuitry.
• Externally available lOY reference.
INPUT SECTION
Sense Lines
The two sense lines can be configured to detect short or open
circuits e.g. transducer bum out. This would be indicated by
an out of range output (see Input Configuration in Applications section).
Multiplexer
The multiplexer is used to route either the measurement
channel or the precision voltage references (used in system
calibration) to the programmable gain amplifier.
Isolation Barrier
The isolation barrier consists of two transformers and three
opto couplers. One transformer transmits the sigual from the
input side to the output side. The other transmits power from
the output side to the input side. The opto-couplers are used
to isolate the logic used for mux select, gain and reference
voltage control.
o
oC")
o
Voltage Reference
~
The voltage reference provides lOY, 0.1 V and OV references
for channel calibration. The 10V reference is also aVailablD
externally.
Filter
Since the ISC300 is designed to measure slowly changing
processes, the input filter is set for a cut off frequency of
2Hz. This gives good noise rejection at power frequencies of
50Hz and 60Hz.
Current References
Two matched 20011A current references are available for the
excitation of RTDs or for use in external signal conditioning
circuitry.
9
+v'soO--------------------------,
2
-v'sco------------------------,
20M
8 Sense 2
+Ipo-----------l
Cha~!"'E"1
01."
-Ipo-----------l
20M
3 Sense 1
o---J\Af----,
.,'
0..
Z
o
Barrier
o---J\Af----,
'"
--L.:!"v,so
.J.:V1so
MUX
10.0V
Ref f-.---.--"'=-~ Channel 2
VREFo---------'
0.100V
Channel 3
r::::l---"
Out
= '." "
~
o
~
Com 2
27
18
22
A,
10
com1~
G
19
A,
20
RST
Input Side
'------0 DCom 2
23
24
FIGURE 1. ISC300 Block Diagram.
BURR-BROWNe
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Burr-Brown Ie Data Book-Linear Products
ti
...i
26
ClK
Channel 4
28
CKI
.------0 VOD (+5)
Com 1
~
o
:;:)
c
oa:
5.7
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PGA
The programmable gain amplifier allows the user to digitally
select device gains of O.S and SO, allowing input ranges of
±O.lV or, ±10V full scale. When used in conjunction with
the O.lV, lOV and common references, channel calibration
can be performed.
Isolated Supplies
Two 13V isolated supplies, capable of supplying SmA each,
are available to power signal conditioning circuitry.
overvoltages below this level will not cause any damage.
The extinction voltage is above SOOVrms so that even
overvoltage-induced partial discharge will cease once the
barrier voltage is reduced to the rated level. Older high
voltage test methods relied on applying a large enough
overvoltage (above rating) to catastrophically break down
marginal parts, but not so high as to damage good ones. Our
new partial discharge testing gives us more confidence in
barrier reliability than breakdown/no breakdown criteria.
BASIC OPERATION
OUTPUT SECTION
SIGNAL AND SUPPLY CONNECTIONS
The output section passes power across the isolation barrier
to provide the isolated supplies, and demodulates the signal
transmitted back across the isolation barrier.
As with any mixed signal analog and digital signal component, correct decoupling and signal routing precautions must
be observed to optimize performance. The ISC300 has an
internal O.l~ decoupling capacitor at Vce' so additional Vee
decoupling will not be necessary. However, a ground plane
will minimize potential noise problems. If a low impedance
ground plane is not used, Com 2 should be tied directly to
the ground at the supply. It is not necessary to connect
DCom 2 and Com 2 at the device. Layout practices associated with isolation signal conditioners are very important.
The capacitance associated with the barrier and series resistance in the signal and reference leads must be minimized.
Any capacitance across the barrier will increase AC leakage,
and in conjunction with ground line resistance, may degrade
high frequency IMR, see Figure 2.
ABOUT THE BARRIER
For any isolation product, barrier integrity is of paramount
importance in achieving high reliability. The ISC300 uses
miniature transformers designed to give maximum isolation
performance when encapsulated in a high dielectric strength
material. The device is designed so that the barrier is located
at the center of the package.
HIGH VOLTAGE TESTING
Burr-Brown Corporation has adopted a partial discharge test
criterion that conforms to the German VDE0884 Optocoupler Standards. This method requires the measurement of
minute current pulses «SpC) while applying 800Vrms,
60Hz high-voltage stress across every device isolation barrier. During a two second test partial discharge must occur
five times on five separate half cycles of 60Hz, and each
time occurrence must not be separated by a line period of
more than four half cycles in order to produce a partial
discharge fail. This confirms transient overvoltage (1.6 X
Vnoted) protection without damage. Life-test results verify the
absence of failure under continuous rated voltage and maximum temperature.
This new test method represents the "state-of-the-art" for
nondestructive high voltage reliability testing. It is based on
the effects of non-uniform fields existing in heterogeneous
dielectric material during barrier degradation. In 'the case of
void non-uniformities, electric field stress begins to ionize
the void region before bridging the entire high voltage
barrier.
INPUT CONFIGURATION
The ISC300 allows easy configuration for temperature measurement using an RID. Figure 3 shows the basic,connections for RID operation. The two reference currents excite
the resistance transducer and a current-to-voltage conversion is made corresponding to the resistance value of the
transducer. If a gain of SO is selected, a IOn resistance value
results in a (10 • 200J.IA) • SO = 0.1 V output; the soon full
scale value gives a (SOO • 200J.IA) • SO = SV output. The
connection of the sense line allows open circuit sensor
detection. An open circuit will give a corresponding >S.l V
output. A short circuit will give a corresponding <0.1 V
output. See the Applications section under Fault Conditions
for more information.
The transient conduction of charge during and after the
ionization can be detected externally as a burst of 0.01118 0.1118 current pulses that repeat on each AC voltage cycle.
The minimum AC barrier voltage that initiates partial discharge is defined as the "inception voltage." Decreasing the
barrier voltage to a lower level is required before partial
discharge ceases and is defined as the "extinction voltage."
We have designed and characterized the package to yield an
inception voltage in excess of 800Vrms so that transient
FIGURE 2. Barrier Capacitance.
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Figure 4 shows the configuration for voltage measurement.
A full scale input range of ± lOV can be accepted by the
ISC300. The two sense lines can be connected to give open
or short circuit detection. An open circuit will result in an
output of <-5.IV and a short circuit will give a -'-"'---1
-In
-----r--<;>--"'---I
1\
\
\.
1\
V
!om--~----~~~--------
V
V
/
f =50kHz
FIGURE 5. CKI Input.
CKI
SimDlified Schematic
FIGURE 7. Mode Selection Jumpers.
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excitation current. Four wire measurements avoid this problem by measuring the voltage generated across the RTD on
a second pair of wires. Very little current flows through the
voltmeter, therefore the lead resistance error contribution is
negligible. Three wire resistance measurements also avoid
lead length resistance errors.
r-~~------------oCom1
+-----...11111'---_-------0 +In
In Figure 8:
(I) - (2)
L------../If\JL---t------,>---Q -In
(+In) = -r, (I, + I,) - r,I,
(1)
(-In) = -r, (I, + 1,) - R,I, - r3I,
(2)
= -r,1, + Rsl, + r31,
Since r, = r, = r3
(LEADS)
and I, = I,
Output < +0.1 V
VIN=RsI,
FIGURE 10.
-VISO
Rs Short Circuit.
FAULT CONDITIONS
The ISC300 can be configured to detect line or transducer
faults which may occur in a system. Figures 8 to 14 show
how the output of the ISC300 will reflect these various fault
conditions by giving corresponding out of range outputs.
Com 1
0
0
M
0
~
+In
Rs
T,
-V,SO
t
-In
r-~NV~----------~Com1
f-----...JIJV'---.,--------o +In
12 • Rs= V,N
~
o
;::)
c
t
L------J\J\f----t-----.--o -In
FIGURE 11. +In Open Circuit.
oa::
Il.
Z
Output = G • V,N
o
~
....I
o
FIGURE 8. Normal Operation.
r--,,~N~----------OCom1
~
f-----...JIJV'---.,--------o +In
+V,SO
t
L------J\J\f----t----- +S.IV
FIGURE 9. Rs Open Circuit.
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---------~O
r-~vv------------oComl
-~---------c
Undefin.d
Output Undefined
+In
t------{V'V'---r--------o +In
-In
L------NIJ'---t------
c
0
a:
c..
+In
Z
0
~
-'
0
-In
sa
IREF1
Com 1
-=FIGURE 17. Isolated 4 to 20mA receiver (0 to SV output).
BURR-BROWN®
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FIGURE 18. Temperature Measurement Using Thermocouple with Small Span.
FIGURE 19. Thermocouple with Cold Junction Compensation.
The information provided herein is believed to be reliable; however, BURR·BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits deSCribed herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andior systems.
5.14
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BURR-BROWN@
150100
113131
Optically-Coupled Linear
ISOLATION AMPLIFIER
FEATURES
APPLICATIONS
o
o
• EASY TO USE, SIMILAR TO AN OP AMP
Vourll'N = RF, Current Input
VourIV'N = Rp'R'N' Voltage Input
.100% TESTED FOR BREAKDOWN:
750V Continuous Isolation Voltage
• INDUSTRIAL PROCESS CONTROL
Transducer Sensing
(Thermocouples, RTD, Pressure Bridges)
4mA to 20mA Loops
Motor and SCR Control
Ground Loop Elimination
o
• ULTRA·LOW LEAKAGE: 0.3~, max, at
240V/60Hz
\"'"
~
• BIOMEDICAL MEASUREMENTS
• TEST EQUIPMENT
• DATA ACQUISITION
• WIDE BANDWIDTH: 60kHz
• 18·PIN DIP PACKAGE
~
o
:'j
c
oa:
DESCRIPTION
The ISO I 00 is an optically-coupled isolation amplifier. High accuracy, linearity, and time-temperature
stability are achieved by coupling light from an LED
back to the input (negative feedback) as well as forward to the output. Optical components are carefully
matched and t..l!e a.rnplifier is actively laser-trimmed to
assure excellent tracking and low offset errors.
The circuit acts as a current-to-voltage converter with
a minimum of 750V (2500V test) between input and
output terminals. It also effectively breaks the galvanic connection between input and output commons
as indicated by the ultra-low 60Hz leakage current of
0.3J.IA at 250V. Voltage input operation is easily
achieved by using one external resistor.
Versatility along with outstanding DC and AC performance provide excellent solutions to a variety of
challenging isolation problems. For example, the
ISOIOO is capable of operating in many modes, including: noninverting (unipolar and bipolar) and inverting (unipolar and bipolar) configurations. Two
precision current sources are provided to accomplish
bipolar operation. Since these are not required for
unipolar operation, they are available for external use
(see Applications section).
Q.
Z
Designs using the ISOIOO are easily accomplished
with relatively few external components. Since VOUT
of the IS0100 is simply IINR", gains can be changed
by altering one resistor value. In addition, the ISO I 00
has su..f:ficient bandwidth (DC to 60kHz) to amplify
most industrial and test equipment signals.
o
ti
..J
o
~
I
REF,
Balance
----.
+In 15
-In 17
12 10
-Vee +Vcc
lB
I
Input
Common
4
2
c~~~~n-Vcc +Vcc
International Al'port Industrial Part< • Mailing Address: PO Box 11400 • Tucson, AZ 85734
SIreeI Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602) 746-1111 • Twx: 911H152-1111 • cable: BBRCORP • Telex: 06fHi491 • FAX: (602) 889-1510 • Immediate Product Info: (800) 54H132
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SPECIFICATIONS
ELECTRICAL
At TA = +2S"C and ±Vcc = lSVDC. unless otherwise specified.
IS0100AP
PARAMETER
CONDITIONS
MIN
lOs
750
2S00
ISOLATION
Voltage
Rated Continuous. AC peak or DC("
Test Breakdown. DC
Rejection.' DC
AC
""
Impedance
Leakage Current
101<0, Gain - 100
240Vrms. 60Hz
0.3
OFFSET VOLTAGE (RTI)
Input Stage (Vos,)
In~ial Offset
vs Temperature
vs Input Power Supplies
TYP
Common-Mode Range
10.S
12
SOO
S
lOS
300
2
0.3
·
SO
lS0
0.3
-10
+15
0.22
0.1%
60
S
0.31
100
-2S
-40
-55
+8S
+100
+100
-20
-1
= 2kU.
RF = lMO
DC. Open-Loop
Vo
-10
0
1200
= RF (I,.)
2
0.03
O.OS
0.1
Nonlinearit~3}
CURRENT NOISE
0.01 Hz to 10Hz
10Hz
100Hz
1kHz
-0.02
+1
0.1
R,
··
·
···
·
·
S
0.07
0.4
·
··
2 x 10'
Gain = WIllA
Gain = lVIIlA. Vo =±10V
·
·
12.S
300
3
TYP
·
·
··
·
·
·
·
MAX
·
UNITS
V
V
pNV
dB
pNV
dB
'1llpF
1lA. rms
200
2
"V
1lV!"C
dB
"VIkHr
200
2
"V
"VI"C
dB
"VlkHr
nNV
dB
V
·
lS0
·
·
·
IlA
ppml"C
nNV
nA
ppml"C
nNV
V
'1
kHz
kHz
VII'S
I'S
·
·
·
··
·
"C
"C
"C
··
·· ··
· ·
··
IlA
mA
UNIPOLAR OPERATION
GAIN
Initial Error (adjustable to zero)
vs Temperature
vs Time
MIN
·· ·
···
· ·
···
·
300
2
±10
TEMPERATURE RANGE
SpeCification
Operating
Storage
GENERAL PARAMETERS
Input Current Range
Unear Operation
Without Damage
Input Impedance
Output Voltage Swing
Output Impedance
IS0100CP
MAX
SOO
S
lOS
1
3
90
60Hz. R, = 1M'1
R,. = 10kU. Gain = 100
REFERENCE CURRENT SOURCEl
Magnitude
Nominal
vs Temperature
vs Power Supplies
Matching
Nominal
vs Temperature
ys Power Supplies
Compliance Voltage
Output Resistance
FREQUENCY RESPONSE
Small Signal Bandwidth
Full Power Bandwidth
Slew Rate
Settling TIme
MIN
1
vs Time
Output Stage (Voso)
Initial Offset
vs Temperature
ys Output Power Supplies
vs Time
Common-Mode Rejection Ratio(2)
IS0100BP
MAX
5
146
400
108
10"1I2.S
R,. = 10kU. Gain = 100
60Hz,' 460V. RF = 1M'1
R 1N
TYP
·
·
1
0.01
·
0.03
2
O.OS
0.1
1
O.OOS
·
0.02
·
0
2
0.03
%ofFS
0.07
V
0
~"C
%IkHr
%
I,. = 0.21lA
20
1
0.7
0.6S
··
·
··
pAp-p
pN,rRZ
pN..jHz
pN,rRZ
BURR-BROWftrl@
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SPECIFICATIONS
(CONT)
ELECTRICAL
At TA
= +25°C and ±Vcc = 15VDC, unless otherwise specified.
IS0100AP
PARAMETER
CONDITIONS
MIN
INPUT OFFSET CURRENT (10 ,)
Initial Offset
vs Temperature
vs Power Supplies
vs Time
POWER SUPPLIES
Input Stage
Voltage (raled performance)
Voltage (derated performance)
Supply Current
MAX
1
0.05
0.1
100
10
MIN
±2
+13, -2
±18
±1.1
Va = 0
Short Circuit Current Limit
±2
±40
BIPOLAR
MAX
UNITS
nA
nAl"C
nAN
pAlkHr
V
V
rnA
rnA
V
V
rnA
rnA
V"C"" I IV""
-10
-1
+10
+1
·
0.1
f\
GAIN
Initial Error (Adjustable To Zero)
= 2kQ, RF = 1MQ
-10
Va = RF (I'N)
2
0.03
0.05
0.1
i
CURRENT NOISE
0.01Hz to 10Hz
10Hz
100Hz
1kHz
· ·
+10
1200
vs Temperature
vs Time
40
vs Time
2
0.05
1
0.005
2
0.03
%ofFS
0.4
0.03
0.1
0.02
0.07
%
·
·
%I"C
'YolkHr
200
3
0.7
±15
±7
±18
+3,-2
+8,-1.1 +13, -2
+~, -1.1
I'N = +101lA
I'N = -101lA
±15
±7
Va = 0
±1.1
nA, pop
pN.[FfZ
pN.[FfZ
··
·
20
±18
±2
±40
pN.[FfZ
70
2
·
250
Short Circuit Current Limit
IlA
rnA
Q
V
Q
1
0.01
6
vs Power Supplies
Output Stage
Vottage (rated performance)
Voltage (derated performance)
Supply Current
··
5
0.07
1.5
17
7
vs Temperature
PCW'CR SUrrL1ES
Input Stage
Voltage (rated performance)
Voltage (derated performance)
Supply Current
··
lIN = 0.21lA
INPUT OFFSET CURRENT (los' bi~lar<'»)
Initial Otfset
.
10
35
1
·
nA
nAl"C
nAN
pAlkHr
·
V
V
rnA
rnA
·
··
··
V
V
rnA
rnA
current mismatch and unipolar offset current.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
BURR-BROWN®
Burr-Brown Ie Data Book-Linear Products
~
en
t-
0
:)
C
0
a:
Q.
Z
0
~
...J
• Same as IS0100AP.
NOTES: (1) See Typical Performance Curves for temperature effects. (2) See Theory of Operation section for definitions. For dB see Ex. 2, CM and HV errors.
(3) Nonlinearity is the peak deviation from a "best fit" straight line expressed as a percent of full scale output. (4) Bipolar offset current includes effects of reference
I EilEiII
0
0
,...
0
Linear Operation
i
TYP
·
GENERAL PARAMETERS
Input Current Range
Without Damage
Input Impedance
Output Voltage Swing
Output Impedance
MIN
·
·· ·· · · ···
·
··
· · ·
±15
±7
MAX
··
±18
±1.1
+8, -1.1
I'N = -Q.021lA
I'N = -201lA
Output Stage
Voltage (rated performance)
Voltage (derated performance)
Supply Current
TVP
··
±15
±7
IS0100CP
IS0100BP
TYP
5.17
0
~
For Immediate Assistance, Contact Your Local Salesperson
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Supply Voltages .......•......................................................................... ±18V
Isolation Vo~age, AC pk or DC ......................................................... 750V
Input Current .. :.................................................................................. ±lmA
Storage Temperature Range ......................................... -5S·C 10 +100·C
Lead Temperature (soldering, lOs) ............................................... +300·C
Bottom View
180100
Output
Input Common
Short~circuit
Duration ..........; ....................... Continuous to ground
-In
Ref,
PACKAGE INFORMATION(l)
+In
Bal
Sal
Sal
Bal
MODEL
IS0100AP
IS0100BP
IS0100CP
Ref,
Output Common
PACKAGE
PACKAGE DRAWING
NUMBER
IS-Pin Bottom-Braze DIP
IS-Pin Bottom-Braze DIP
IS-Pin Bottom-Braze DIP
220
220
220
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D 01 Burr-Brown IC Data Book.
NOTE: (I) No internal connection.
ORDERING INFORMATION
MODEL
IS0100AP
IS0100BP
IS0100CP
PACKAGE
TEMPERATURE RANGE
IS-Pin Bottom-Braze DIP
IS-Pin Bottom-Braze DIP
IS-Pin Bottom-Braze DIP
-2S·C to +8S·C
-2S·C to +SS·C
-2S·C 10 +SS·C
BURR-BROWNe
5.18
Burr-Brown Ie Data Book-Linear Products • ElEI,
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
TA.
= +25°C, ±Vcc =
15VDC, unless otherwise specified.
SMALL SIGNAL FREQUENCY RESPONSE
BIPOLAR OUTPUT SWING vs RF
20
±20
N37\
----....(\
iii'
~
"
i
-10
<
,,;!O
E
±18Vee
----------_._-
10 --
±15
~F=4PF
!
~\
--30
V
L
.~
Jj ±10
1000
±7Vee
r---
±5
Vo= (12~A) (RF)
= lVecl-1.2V max
o
100
±10Vcc
Output Stagey
Power Supply
-40
10
±13Vee
10k
1M
lOOk
Frequency (kHz)
10M
100M
RF(O)
0
0
~
0
sa
BIPOLAR INPUT STAGE SUPPLY CURRENT
vs INPUT CURRENT
PHASE SHIFT vs FREQUENCY
0,-====---;--0::::---,----,
10
<-
r---..
5
S
E
~
()
0
b
-----
r----------T------~~~--------~
180
1-----------+----------""'-\----------1
270
r----------T----------~--T----~
I
+Vcc
f
•
::::»
c
0
~
-5
tJ)
I-
0
~
-Vee
8:
::>
rtl
90
a:
Q.
Z
-10
,,;!O
-10
10
20
10
100
Frequency (kHz)
1000
0
~
-I
0
UNIPOLAR OUTPUT SWING vs RF
0
10
VO= (12~A) (RF)
= IVccl-l.2 V max
±7Vee
-5
~
\
0>
~
-10
'5
r--- -_ .._. r-- \
1
-
±10Vce
E
±13Vcc
()
~
g.
::>
0
-15
r-----
sa
UNIPOLAR INPUT STAGE SUPPLY CURRENT
vs INPUT CURRENT
r------,-------
5
0 f-------f--------
j
Output Stag?\
POW"lr Supply \
rtl
±18Vcc
-5
--30
-20
10k
lOOk
1M
10M
100M
-20
-10
10
20
RF(O)
BURR-BROWN®
. - - . Burr-Brown Ie Data Book--Linear Products
5.19
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
T.
=+25°C. ±V00 = 15VDC. unless otherwise specified.
ISOLATION LEAKAGE CURRENT
vs ISOLATION VOLTAGE
CONTINUOUS DC ISOLATION VOLTAGE
vs TEMPERATURE
15
3
1250
~
Ui"
E
~
2
1:
10
<.s
" 1000
N
~
{;
"
.S!
10
750
.
<.)
500
CJ
0
0
11
CJ
CJ
CD
"
"
f
5
CJ
«
~
3
0
3
2
0
c:
~
0
"'"c:
"
'"
8
250
0
-25
0
25
Isolation Voltaoe (kV)
AC ISOLATION VOLTAGE vs TEMPERATURE
75
100
125
RATE OF GAIN ERROR SHIFT vs ISOLATION VOLTAGE
1.5
1250
c:
50
Temperature (OC)
1000
C!.
CD
N
{;
750
·8
j
500
~
250
0
-25
0
25
50
100
125
Temperature (0G)
o
250
500
750
Isolation Voltage (VDC)
1000
GAIN ERROR
vs TEMPERATURE AND ISOLATION VOLTAGE
3
~--
P 2.5
l\l
+
g
2
".!>!
CD
"iii
E
0
/ " V,M>VT
I
1.5
~
g
w
... 0.5
c:
V
~
~
I
V,M 12V
vs Temperature
vs Supplies
vs Load
Current Output
Short Circuit Current
POWER SUPPLIES
Rated Voltage, ±Vcc,. ±VCO2
Voltage Range
Quiescent Current: +VCCI
-VCC1
20
3
0.3
CD
0
pF
100
5
-10
-12
dB
IlVrmsIV
dB
IlVrmsIV
dB
IlVDCN
I
INPUT
Vo~age
UNITS
Vrms
VDC
Vrms
VDC
125
DC
MAX
1500
2121
3500
4950
115
150106
TYP
5.31
For Immediate Assistance,· Contact Your Local Salesperson
ELECTRICAL (CONT)
IS0102
PARAMETER
CONDITIONS
MIN
GAIN
Nominal Gain
Initial Error(3 )
Gain vs Temperature
Nonlinearity(4)
V 0 = -10V to +10V
INPUT OFFSET VOLTAGE
Initial Offset
vs Temperature
vs Power Supplies(5)
Y'N =OV
Input Stage, Vco, = ±1 OV to ±20V
Output Stage, VCO2 = ± 1OV to ±20V
0
-4
CONDITIONS
MIN
IS0102B
TYP
MAX
MIN
1
±O.1
±20
±0.007
±O.25
±SO
±O.012
GAIN
Nominal Gain
Initial En-or3)
Gain vs Temperature
Nonlinearity(4)
V o =-10Vto+10V
INPUT OFFSET VOLTAGE
Initial Offset
vs Temperature
vs Power Supplies(5)
V,N = OV
±25
±250
1.4
-1.4
±70
±SOD
4.0
0
.
TYP
MAX
MIN
1
±0.1
±20
±0.04
±O.25
±SO
±0.075
0.07
±12
±0.007
±70
±500
±15O
±25
±250
3.7
-3.7
Input Stage, Vco, = ±1 OV to ±20V
Oulput Stage, VCC2 = ±10V to ±20V
MAX
UNITS
0.07
±12
±O.002
0.13
±25
±0.003
VN
O/OFSR
ppm FSRI"C
O/OFSR
±15
±150
±25
±250
mV
IlVi'C
mVN
mVN
MAX
UNITS
·
VN
%FSR
ppm FSRI"C
%FSR
·
IS0106
PARAMETER
TYP
··
··
IS0106B
TYP
·
··
±25
±O.025
·
±25O
mV
IlVi'C
mVN
mVN
• Spec~ication same as model to the left.
NOTES: (1) 100% tested at rated continuous for one minute. (2) Isolation-mode rejection is the ratio olthe change in output voltage to a change in isolation barriervoltage.
It is a function of frequency as shown in the Typical Performance Curves. This is specified for barrier voltage slew rates not exceeding 100V/jJ.S. (3) Adjustable to zero.
FSR = Full Scale Range = 20V. (4) Nonlinearity is the peak deviation of the oulput voltage from the best fit straight line. It is expressed as the ratio of deviation to FSR.
(5) Power supply rejection = change in Vo.!20V supply change. (6) Ripple is the residual component of the barrier carrier frequency generated internally. (7) Dynamic
range = FSRI(voltage spectral noise density x square root of user bandwidth). (8) Overshoot can be eliminated by band-limiting. (9) See "Power Dissipation vs
Temperature" performance curve for limitations. (10) Band limited to 10Hz, bypass capacitors located less than 0.25" from supply pins.
ABSOLUTE MAXIMUM RATINGS
ORDERING INFORMATION
MODEL
PACKAGE
150102
IS0102B
IS0106
IS0106B
Ceramic
Ceramic
Ceramic
Ceramic
TEMPERATURE
RANGE
-25'C
-25'C
-25'C
-25'C
Supply Without Damage .................................................................... ±20V
Input Voltage Range .......................................................................... ±50V
Transient Immunity, dV/dt .......................................................... 100kV/jJ.S
Continuous Isolation Voltage Across Barrier
ISOl 02 .................................................................................... 1500Vrms
ISOt 06 .................................................................................... 3500Vrms
Junction Temperature .................................................................... +160°C
Storage Temperature Range ......................................... -65'C to +15O'C
Lead Temperature (soldering, lOs) ............................................... +300'C
Amplifier and Reference Oulput
Short Circuit Duration ....................................... Continuous to Common
to +85'C
to +85'C
to +85'C
to +85'C
PACKAGE INFORMATION(')
MODEL
IS0102
IS0102B
IS0106
IS0106B
PACKAGE
24-Pin
24-Pin
40-Pln
40-Pin
Ceramic
Ceramic
Ceramic
Ceramic
PACKAGE DRAWING
NUMBER
208
208
206
206
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
The information provided herein is believed to ba reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR·BROWN assumes
no responsibility for the use of this information, and all use of such irformation shall be entirely at the user's own risk. Prices and specifications are subject to !==hange
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR·BROWN product for use in life support devices andlor systems.
BURR-BROWN®
5.32
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PIN CONFIGURATION
150102
150106
24
-VCC1
V ,N
Gain Adjust
V ,N
Offset
Common1
40
-VCC1
+VCC1
Offset Adjust
Gain Adjust
Referenc91
Offset
Commont
Isolation
+VCC1
Offset Adjust
ReferenC91
Isolation
Barrier
Barrier
Digital Common
C,
ReferenCB2
+VCC2
C,
c"
Common 2
Referenc9 2
VOUT
12
13
Digital Common
Common 2
+VCC2
-VCC2
20
CD
PIN DESCRIPTIONS
±VCC1 '
Common 1
Positive and negative power supply voltages and common (or ground) for the input stage. Common 1 is the analog reference voltage for input
signals. The voltage between Common 1 and Common2 is the isolation voltage and appears across the internal high voltage barrier.
(or ground) for the output stage. Common, is the analog reference voltage for output
isolation voltage and appears across the internal high vottage barrier.
o..C\i
o..-
o
~
for ±10V. The input level can actually exceed the input stage
Gain
Adjust
Reference l
This pin is an optional signal input. A series 5kn petentiometer between this pin and the input signal allows a guaranteed ±1.50/0 gain adjustment
range. When gain adjustment is not required, the Gain Adjust should be left open. Figure 4 illustrates the gain adjustment connection.
+5V reference output. This low·drift zener voltage reference is necessary for setting the bipolar offset point of the input stage. This pin must
be strapped to either Offset or Offset Ad/ust to allow the isolaUon amplifier to function. The reference is often useful for input signal
conditioning circuits. See "Effect of Reference Loading on Oftset" performance curve for the effect of oftset voltage change with reference loading.
is identical to, but independent of,
This output is short circuit
+5V reference output. This reference circuit is identical to, but independent of, Reference,. It controls the bipelar offset of the output stage through
an internal connection. This output is short·circuit protected.
Offset
Adjust
This pin is for optional offset control. When connected to the Reference, pin through a 1kn petentiometer, ±150mV of adjustment range is
guaranteed. Under this condition, the Oftset pin should be connected to the Offset Adjust pin. When oftset adjustment is not required, the Offset
Adjust pin is left open. See Figure 4.
Digital
Digital common or ground. This separate ground carries currents from the digital portions of the output stage circu". The best grounding practices require that digital common current does not flow in analog common connections. Both pins can be tied directly to a ground plane if available.
Difference in potentials between the Common 2 and Digital Common pins can be ±lV. See Figure 2.
Common
Signal output. Because the isolation amplffier has unity gain, the output signal is ideally identical to the input signal. The output is low impedance
and is short-cIrcuit protected. This Signal is referenced to Common2; subsequent circuitry should have a separate "sense" connection to Common 1
as well as Your
Cl , C2
CapaCitors for small signal bandwidth control. These pIns connect to the internal rallaff frequency controlling nodes of the output low-pass filter.
Additional capacitance added to these pins will modify the bandwidth of the buffer. C, is always twice the value of C,. See "Bandwidth Control"
performance curve for the relationship between bandwidth and C1 and C2• When no connections are made to these pins, the full small·signal
bandwidth is maintained. Be sure to shield C, and C, pins from high electric fields on the PC board. This preserves AC isolation-mode rejection
by reducing capacitive coupling effects.
Burr-Brown Ie Data Book-Linear Products
5.33
~
o
:::»
c
oa:
c..
z
o
~
....!
o
~
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
TA
= +25°C, Vco =±15VDC unfess otherwise noted.
ISOLATION LEAKAGE CURRENT
vs ISOLATION VOLTAGE FREQUENCY
ISOLATION-MODE REJECTION
vs ISOLATION VOLTAGE FREQUENCY
10m
160
iii"
IIII
Isbi66
r-....
140
~
t::
~
~
.~ 120
~
.2
100
]j
60
1ii
i
::I
~
Q)
i'-.
100
10~
~
IIII
10
100~
...J
i'-.
'IJJ~
60
1m
~
'"
0::
"C
0
$E
i'-.
Ik
"
10k
lOOk
lOOn
1M
100
10
Isolation Voltage Frequency (Hz)
d GAIN ERROR AND d OFFSET VOLTAGE
VB ISOLATION VOLTAGE
;;;-
.s
0.5
~
Q)
Gain
t::
0
0
Offset
(!l
I
1ii
~
CD
-90
~
,1;;
~
rJ>
~
No extemal C, ' C2
~
_.- -
-180
a
10
90
~
~
.~
0
Z
+
f!:
I"'""
Vo =5Vp-p
0
~
0.1
0-
C
oa:
Vo -20Vp·p
-18
o
10
100
lk
10k
JlU
-270
lOOk
o
100
Frequency (Hz)
lk
10k
lOOk
Z
Frequency (Hz)
LARGE SIGNAL TRANSIENT RESPONSE
o
~
-!
o
RECOMMENDED RANGE OF ISOLATION VOLTAGE
15
10k
sa
I=.IS0106
-
~"
10
~
CD
~
g
II
J
5
/
/
/
0
:;
~-5
0
-10
;gB
\
IS0102
lk
f"...
Nonspecified
Operation
6
fa
~
\
c, =100pF
c,= 200pF
5k
2k
E 100
E
.1;i
\
Operational
Region
['.
::;:
-15
10
o
100
200
300
400
Time (us)
lk
10k
lOOk
1M
Isolation Voltage Frequency (Hz)
BURR-BROWNiIJI
11511511
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Q.
5.35
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
TA = +2SOC, Vee
(CO NT)
= ±1SVDC unless otherwise noted.
IS0102B TYPICAL LINEARITY
EFFECT OF REFERENCE LOADING ON OFFSET
0.01
50
TA = -25°C to +85°C bandwidth limited to 10Hz.
(Linearity is limited by 111 noise). Bypass
capacitors located 0.2S" from supply pins.
0.005
.s>
Ref,
10
,jg
!
?
0
0
'5
Ref,
%
0
0
-o.OOS
-0.01
-50
o
-10
2
o
-5
V01JT
Voltaae Reference Load (rnA)
=V,N
10
(V)
THEORY OF OPERATION
The IS0102 and ISOI06 have no galvanic connection between the input and output. The analog input signal referenced to the input common is accurately duplicated at the
output referenced to the output common. Because the barrier
information is digital, potentials between the two commons
can assume a wide range of voltages and frequencies without influencing the output signal. Signal information remains undisturbed until the slew rate of the barrier voltage
exceeds lOOVfllS. The isolation amplifier's ability to reject
fast dVfdt changes between the two grounds is specified as
transient immunity. The amplifier is protected from damage
for slew rates up to 100,OOOVfllS.
Offset
Adjust
-VCC1
A simplified diagram of the IS0102 and ISO 106 is shown in
Fignre 1. The design consists of an input voltage-controlled
oscillator (VeO) also known as a voltage-to-frequency converter (VFC), differential capacitors, and output phase lock
loop (PLL). The input veo drives digital levels directly into
the two 3pF barrier capacitors. The digital signal is frequency modulated and appears differentially across the barrier, while the externally applied isolation voltage appears
common-mode.
+VCC2
-VCC2
Ref,
Ref,
+SV
Out
O.SkO
8
VCO
24.SkO
180102
Digital
Common
150106
FIGURE 1. Simplified Diagram of IS0102 and ISOI06.
BURR - BROWNe
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A sense amplifier detects only the differential infonnation.
The output stage decodes the frequency modulated signal by
the means of a PLL. The feedback of the PLL employs a
second VCO that is identical to the encoder VCO. The PLL
forces the second VCO to operate at the same frequency
(and phase) as the encoder VCO; therefore, the two VCOs
have the same input voltage. The input voltage of the
decoder VCO serves as the isolation buffer's output signal
after passing through a 100kHz second-order active filter.
For a more detailed description of the internal operation of
the IS0102 and ISOI06, refer to Proceedings of the 1987
International Symposium on Microelectronics, pages 202206.
ABOUT THE BARRIER
For any isolation product, barrier composition is of paramount importance in achieving high reliability. Both the
ISOlO2 and ISOlO6 utilize two 3pF high voltage ceramic
coupling capacitors. They are constructed of tungsten thick
film deposited in a spiral pattern on a ceramic substrate.
Capacitor plates are buried in the package, making the
barrier very rugged and hennetically sealed. Capacitance
results from the fringing electric fields of adjacent metal
runs. Dielectric strength exceeds IOkV and resistance is
typically 1014Q. Input and output circuitry are contained in
separate solder-sealed cavities, resulting in the industry's
first fully hennetic hybrid isolation amplifier.
Input
Ground
Plane
~
O.I~F
O.I~F
~
Offset Adjust
V'N
Gain Adjust
~
NC
The ISOI02 and ISO 106 are designed to be free from partial
discharge at rated voltages. Partial discharge is a fonn of
localized breakdown that degrades the barrier over time.
Since it does not bridge the space across the barrier, it is
difficult to detect. Both isolation amplifiers have been extensively evaluated at high temperature and high voltage.
POWER SUPPL V AND SIGNAL CONNECTIONS
Figure 2 shows the proper power supply and signal connections. Each supply should be AC-bypassed to Analog Common with 0.11JF ceramic capacitors as close to the amplifier
as possible. Short leads will minimize lead inductance. A
ground plane will also reduce noise problems. Signal common lines should tie directly to the common pin even if a
low impedance ground plane is used. Refer to Digital Common in the Pin Descriptions table.
To avoid gain and isolation-mode rejection (IMR) errors
introduced by the external circuit, connect grounds as indicated, being sure to minimize ground resistance. Any capacitance across the barrier will increase AC leakage current
and may degrade high frequency IMR. The schematic in
Figure 3 shows the proper technique for wiring analog and
digital commons together.
Offset
CINTERNAL
!l
Digital Common
-=-
NC
Reference 2
C2
VOUT
Load
"
-:-
Common 2
NC
1------0
V OUT
-~
0;:----'
Output
Ground
Plane
f- - -----Di-9i\a-1c-o-m-m-o-n---"t
CEm
Inpul
Common
-.l
CeXT1 has minimal effect on totallMR.
C EXT2 and R have a direct effect.
Digital Output
Ground'
Power
Supply
'Pari of ground plane to
reduce voltage drops.
NG-no connection necessary.
FIGURE 2. Power Supply and Signal Connection.
FIGURE 3. Technique for Wiring Analog and Digital Commons Together.
BURR-BROWN----'lMr----1--'\M--<
leg
32~VCCl
pws
NOTE: Diodes are IN4148.
1
I
4
-VCC1
FIGURE 15. Right-Leg-Driven EeG Amplifier (with defibrillator protection and calibrator).
BURR-BROWN~
5.42
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AN ERROR ANALYSIS OF THE IS01021N A
SMALL SIGNAL MEASURING APPLICATION
High accuracy measurements of low-level signals in the
presence of high isolation mode voltages can be difficult due
to the errors of the isolation amplifiers themselves.
This error analysis shows that when a low drift operational
amplifier is used to preampJify the low-level source signal,
a low cost, simple and accurate solution is possible.
In the circuit shown in Figure 16, a 50mV shunt is used to
measure the current in a 500VDC motor. The OPA27
amplifies the 50mV by 200 X to 10V full scale. The output
of the OPA27 is fed to the input of the ISOI02, which is a
unity-gain isolation amplifier. The 5kQ and lill potentiometers connected to the IS0102 are used to adjust the gain and
offset errors to zero as described in Discussion of Specifications.
Some Observations
The total errors of the op amp and the ISO amp combined are
approximately 0.11% of full-scale range (see Figure 17). If
the op amp had not been used to preamplify the signal, the
errors would have been 2.6% of FSR. Clearly, the small cost
of adding the op amp buys a large performance improvement. Optimum performance, therefore, is obtained when
the full ±10V range of the ISOI02II06 is utilized.
The rms noise of the IS0102 with a 120Hz bandwidth is only
0.18mVrms, which is only 0.0018% of the 10V full scale
output. Therefore, even though the 161lV"'Hz noise spectral
density specification may appear large compared to other
isolation amplifiers, it does not turn out to be a significant
error term. It is worth noting that even if the bandwidth is
increased to 10kHz, the noise of the iso amp would only
contribute 0.016%FSR error.
CD
o
,...
-,...
N
o
+15V
-15V
Input
Power
Supply
OUiput
Power
Supply
o
+15V
~
-15V
200kO
+15V
+VCC2
-VCC2
+15V
-15V
en
~
+500VDC
::l
C
R,
oa:
Gain
Adjust
1kO
D.
'-
,
Z
OVa
o
Offset 22
-15V
Input Common
[
~-~-----:~~=-==-----~VISO
Va
=50mVDC (FS)
'0
Ei
...!
g~22~F
o
~
Output
Common
500VDC
FIGURE 16. 50mV Shunt Measures Current in a 500VDC Motor.
BURR~BROWN~
IE!!IE!!II
Burr-Brown Ie Data Book-Linear Products
5.43
For Immediate Assistance, Contact Your Local Salesperson
f
The Errors of the Op Amp at 25"C (Referred to Input, RTI)
1
-1-+-1-}+ Vos (1 + R,IRF ) + I. R, + P.S.R. + Noise
Ve(OPA)
= Vo
VEIOP~
=Total Op Amp Error (RTI)
Vo
~
= Differential Voltage (Full Scale) Across Shunt
1
{I - 1 +
~ ~ }= Gain Error Due to Finite Open Loop Gain
P = Feedback Factor
AvOL
Vos
I.
=Open Loop Gain at Signal Frequency
= Input Offset Voltage
= Input Bias Current
= Power Supply Rejection (INN)
P.S.R.
[Assuming a 5% change with ±15V supplies. Total error is twice that due to one supply.]
= SnV/-.fHZ(lor lkD source resistance and 1kHz bandwidth)
Noise
GAIN ERROR
ERROR,O'., (RTI)
OFFSET
P.S.R.
NOISE
{o.02smV (1 + 11200) + 40 x 10-< x 100}
(20J!.VN x 0.7SV x 2)
(SnVV12o (nVrms))
(0.0251 mV + 0.04mV)
1
=
VE(OPA)
Error as % 01 FSR
SOmV {I - 1 +
1
}
10'/200
=
=
O.OlmV
+
0.03mV
0.02%
+
(0.05% + 0.08%)
+
0.06%
+ 0.055 x 10000mVrms
0.00011%
+
=
=
=
=
O.OlmV
+
(OmV+ OmV)
+
O.03mV
+ 0.055 x 10"mVrms
+
(0%+0%)
+
0.06%
After Nulling
Error as % of FSR'"
'FSR
= Full-Scale
0.10mV
0.02%
+
0.00011%
0.08% 01 50mV
Range. SOmV at input to op amp, or 10V at input (and output) of ISO amp.
The Errors of the Iso Amp at 25"C (RTI)
I
VEilS'»
= 1/200 (V,so"MR + Vos + G.E. + Nonlinearity + P.S.R. + Noise)
I
V""O( = Total ISO Amp Error
IMR == Isolation Mode Rejection
= Input Offset Voltage
= V"", = Isolation Voltage = Isolation Mode Voltage
G.E. = Gain Error (% 01 FSR)
Nonlinearity = Peak-to-peak deviation of output voltage Irom best-lit straight line. It is expressed as ratio based on full-scale range.
P.S.R. = Change in Vosl1 OV x Supply Change
Vos
V,so
I
Noise
=Spectral noise density x "bandwidth. It is recommended that bandwidth be limited to twice maximum signal bandwkfth for optimum dynamic range.
IMR
ERROR,'!"1l (RTI)
VE(ISOl
Error as % of FSR
G.E.
Vas
NONLINEARITY
=
=
=
11200 { 500VDCI140dB
+
70mV
+ 20V x 0.2S1100 + 0.00311 00 x 20V
11200 { O.OSmV
+
70mV
+
SOmV
+
0.6mV
0.0005%
+
0.7%
+
O.S%
+
=
=
11200 { O.OSmV
+
OmV
+
OmV
+
0%
+
0%
I
NOISE
P.S.R.
1.4mV x 0.7SV x 2 + 16J!.VV12o (rms) }
2.1mV
+
0.17SmVrms }
0.006%
+
+
0.021%
+
0.00175%
+
O.SmV
+
2.1mV
+
0.17SmVrms }
+
0.006%
+
0.021%
+
0.00175%
After Nulling
VEl1SO)
Error as % 01 FSR
Total Error
=
=
=
=
=
=
=
1/200 (3.0mV)
0.03mV
O.OOOS%
0.03% 01 SOmV
VE{OPA}
+
VEl1SO)
0.10mV
+
0.03mV
0.08% 01 SOmV
+
0.03% 01 SOmV
O.II%ol50mV
FIGURE 17. Op Amp and Iso Amp Error Analysis.
BURR-Bm e
5.44
Burr-Brown Ie Data Book-Linear Products IE:I~
Or, Call Customer Service at 1-800-548-6132 (USA Only)
BURR-BROWN®
150103
1E3E31
Low-Cost, Internally Powered
ISOLATION AMPLIFIER
M
o
,....
FEATURES
APPLICATIONS
• SIGNAL AND POWER IN ONE
DOUBLE-WIDE (0.6") SIDE-BRAZED
PACKAGE
• MULTICHANNEL ISOLATED DATA
ACQUISITION
o
!ll
• ISOLATED 4-20mA LOOP RECEIVER AND
POWER
• 5600Vpk TEST VOLTAGE
• 1500Vrms CONTINUOUS AC BARRIER
RATING
en
• POWER SUPPLY AND MOTOR CONTROL
I-
• GROUND LOOP ELIMINATION
o
:::)
• WIDE INPUT SIGNAL RANGE:
-10V to +10V
• WIDE BANDWIDTH:
20kHz Small Signal, 20kHz Full Power
+Ve
Sense
• BUILT-IN ISOLATED POWER:
±10V to ±18V Input, ±50mA Output
V,N
Vour
-Ve
Com 1
Gnd 1
• MULTICHANNEL SYNCHRONIZATION
CAPABILITY (TTL)
• BOARD AREA ONLY 0.72in.2 (4.6cm 2)
c
oa:
+VCC1
Com 2
-Vee2
Sync'
+VCC2
PsGnd
Enable
-Veel
Gnd2
Extra power is available on the isolated input side for
external input conditioning circuitry. The converter is
protected from shorts to ground with an internal current limit, and the soft-start feature limits the initial
currents from the power source. Multiple-channel synchronization can be accomplished by applying a TTL
clock signal to paralleled Sync pins. The Enable con-
trol is used to turn off transformer drive while keeping
the signal channel demodulator active. This feature
provides a convenient way to reduce quiescent current
for low power applications.
The wide barrier pin spacing and internal insulation
allow for the generous 1500Vrms continuous rating.
Reliability is assured by 100% barrier breakdown
testing that conforms to UL1244 test methods. Low
barrier capacitance minimizes AC leakage currents.
These specifications and built-in features make the
ISO 103 easy to use, as well as providing for compact
PC board layouts.
International Airport Industrial Park • Mailing Address: PO Box 114110 • Tucson, AZ 85734 • S1reet Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel:
746-1111· Twx: 910-952·1111 • Coble: BBRCORP • Telex: 066-6491 • FAX:
• Immediate Product Info:
PDS-IOO4D
o
ti
....I
o
!ll
DESCRIPTION
The ISO 103 isolation amplifier provides both signal
and power across an isolation barrier. The ceramic
non-hermetic hybrid package with side-brazed pins
contains a transformer-coupled DCIDC converter and
a capacitor-coupled signal channel.
D..
Z
5.45
For Immediate Assistance, Contact Your Local Salesperson
SPECIFICATIONS
ELECTRICAL
At TA ~ +25·C and VCC2 =±15V, ±15mA output current unless otherwise noted.
.IS01038
1S0103
PARAMETER
ISOLATION
Rated Continuous Voltage'"
AC,60Hz
DC
Test Breakdown, 100% AC, 60Hz
Isolation-Mode Rejection
Barrier Impedance
Leakage Current
GAIN
Nominal
Initial Error
Gain VB Temperature
Nonlinearily
INPUT OFFSET VOLTAGE
Inftial Offset
vs Temperature
vs Power Supplies
vs Output Supply Load
SIGNAL INPUT
Voltage Range
Resistance
CONDITIONS
MIN
TUIN to TMA)(
T... to T"""
lOs
t'500Vnns, 60Hz
2121VDC
1500
2121
5657
240Vrms, 60Hz.
130
160
1012 119
I
Vo= -IOV to 10V
Vo=-5Vto 5V
I
±D.12·
±60
±D.026
±O.O09
VCC2 = ±IOV to ±18V
I =Oto±50mA
±2O
±300
0.9
±0.3
OulplJt Voltage in Range
SIGNAL OUTPUT
Voliage Range
Current Drive
Ripple Voltage, 800kHz Carrier
±IO
±IO
±5
400W4.7nF (See Figure 4)
Capacitive Load Drive
Voltage Noise
FREQUENCY RESPONSE
Small Signal Bandwidth
Slew Rate
Settling Time
POWER SUPPUES
Rated Voltage, VCO2
Voltage Range
Input Current
Ripple Current
Rated Output Voltage
Output
Load Regulation
Line Regulation
Output Vo~age vs Temperature
Voltage Balance Error, ±Vce,
Vo~age Ripple (800kHz)
Output Capacitive Load
Sync Frequency
TEMPERATURE RANGE
Specification
Operating
Storage
TYP
MAX
MIN
···
MAX
2
··
±0.3
±IOO
±O.O75
±D.OS
±2O
±D.OIS
±O.15
±SO
±0.050
±0.025
±60
±500
±IOO
±250
·
·
±14.25
10
10
Grounded~'
±15.75
·
1.6
-25
-25
-25
%FSR
ppml"C
%FSR
%FSR
mV
jlVI"C
mVN
mV/mA
V
mA
mVp-p
mVp-p
pF
+85
+85 .
+125
jlVl1Hz
kHz
VljlS
jlS
·
±18
I
Sync-Pin
·
··
··
··
·
0.3
1.12
2.5
0.05
50
5
No External Capacftors
C'XT = IjlF
!lA
V
±15
+90/-4.5
+60/-4.5
60
3
±15
Vrms
VDC
Vpk
dB
dB
GllpF
kG
±12.5
±15
25
5
1000
4
±IO
10 = ±15mA
10= OmA
No Filter
C'N = IjlF
Load = 15mA
SOmA Balanced Load
I OOmA Single-Ended Loads
Balanced Load
UNITS
VN
±15
200
20
1.5
75
0.1%, -IO/IOV
TYP
··
·
·
·
··
··
·
V
V
mA
mA
mAp-p
mAp-p
V
V
V
%/mA
VN
·
·
·
mVI"C
%
mVp-p
mVp-p
jlF
MHz
·C
·C
·C
• Speclficstlons same as ISOI03.
NOTE: (I) Conforms to UL1244 test methods. 100% tested at 1500Vrms for I minute. (2) Husing external synchronization with a TTL-level clock, frequency should
be between 1.2MHz and 2MHz with a duty-cycle greater than 25%.
aURR-BROWN
:;
~
&
g
>...
50
nme(~s)
100
w
14
15
0
0
0
10
20
20
40
30
60
40
80
±V CC1 Supply Output Current (rnA)
BURR-BROWN®
5.48
..g
'6
;;:
6
13
o
"-
Small Signal Frequency (Hz)
LARGE SIGNAL TRANSIENT RESPONSE
10
rJ)
.,~
-15
lk
20
co
S
.,;E
90
Phase'
Frequency (Hz)
~
45
"
--1)
'iii
=:i1'
0
Gain
f\\
(!l
I
om
:----.
-3
=2Vp-p
I
0,1
II
iii"
Cl
lOOn
lOOk
10k
GAIN/PHASE vs FREQUENCY
10
Va
lk
Isolation Voltage Frequency (Hz)
Isolation Voltage Frequencv (Hz)
lz
100
Burr-Brown Ie Data Book-Linear Products
I EilEiII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
T, = +25°C,
vcc, =±15VDC, ±15mA output current unless otherwise noted.
ISOLATION POWER SUPPLY VOLTAGE
vs TEMPERATURE
ISOLATED POWER SUPPLY LINE REGULATION
2,---..,----;---,---,----,
19
18
17
16
~
8
>
+
15
14
13
1 r - - - - ' - - - - . - - . -----+-----1-------
~=~ ~JIv-I~;:Z~- =~--_t_---"-.t_____l
--- - 7V
12
- --~r- - r---
11
10
9
L
-~
---- ---- ---
-.- ---- --- -.- --- --
-1--
L--L~_~~_~~_~~_~~
9
10
11
12
13
14
15
16
17
18
r---~--_T--_t_--~~~--
-1
~
L-_~
__
~
-25
19
__
25
~
__
50
~
__
75
~
100
Temperature (0C)
+VCC2 (V)
M
C)
,...
o
~
ISOLATED SUPPLY VOLTAGE AND Vos
vs SYNC FREQUENCY
5,------;-----,-----,
250
~
2.5 /---""""',-----1-----+------1 125
:;g
13
>
o
:;-
g
0
0
::l
8
C
oa:
>
20 IS0103.
(2) Bypass supplies
as shown in Figure 1.
Channel 2
o
~
' - - + - - - - - - - 0 VOUT2
~
Additional Channels
~
C
FIGURE 7. Synchronized-Multichannel Isolation.
oa::
a.
z
o
~
...I
o
~
BURR-BROWN®
I EaEaI
Burr-Brown Ie Data Book-Linear Products
5.53
For Immediate Assistance, Contact Your Local Salesperson
I:RR-BROWN@
IS0107
E:lE:II
High-Voltage, Internally Powered
ISOLATION AMPLIFIER
FEATURES
APPLICATIONS
• SIGNAL AND POWER IN ONE
TRIPLE-WIDE PACKAGE
• MULTICHANNEL ISOLATED DATA
ACQUISITION
• 8000Vpk TEST VOLTAGE
• 2500Vrms CONTINUOUS AC BARRIER
RATING
• BIOMEDICAL INSTRUMENTATION
• POWER SUPPLY AND MOTOR CONTROL
• GROUND LOOP ELIMINATION
• WIDE INPUT SIGNAL RANGE:
-10V to +10V
• WIDE BANDWIDTH: 20kHz Small Signal,
20kHz Full Power
IS0107 BLOCK DIAGRAM
I..-.c::::::;;:-i
• BUILT-IN ISOLATED POWER:
±10V to ±18V Input, ±50mA Output
V,N
• MULTICHANNEL SYNCHRONIZATION
CAPABILITY (TTL)
Sense
Vour
Corn 2
Corn 1
'-------I -Vcc>
Gnd 1
Sync
+VCC2
Enable
-VCC1
Gnd2
+VCC1
DESCRIPTION
The ISO I 07 isolation amplifier provides both signal
and power across an isolation barrier. The ceramic
side-brazed hybrid package contains a transformercoupled DCIDC converter and a capacitor-coupled
signal channel.
Extra power is available on the isolated input side for
external input conditioning circuitry. The converter is
protected from shorts to ground with an internal current limit, and the soft-start feature limits the initial
currents from the power source. Multiple-channel synchrouization can be accomplished by applying a TIL
clock signal to paralleled Sync pins. The Enable con-
International Airport Induslrial Parie • Mailing Address: PO Box 11400
Tel: (602) 746-1111 • Twx: 910-952·1111 • Cabl.: BBRCORP •
5.54
trol is used to turn off transformer drive while keeping
the signal channel demodulator active. This feature
provides a conveuient way to reduce quiescent current
for low power applications.
The wide barrier pin spacing and internal insulation
allow for the generous 2500Vrms continuous rating.
Reliability is assured by 100% barrier breakdown
testing that conforms to UL544 test methods. Low
barrier capacitance minimizes AC leakage currents.
These specifications and built-in features make the
150107 easy to use, as well as providing for compact
PC board layouts.
• Tucson, AZ 85734 • SlreaI Addresa: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Telex: Q66.64111 • FAX: (602) 889-1510 • 1m_IBIS ProducIlnIo: (BOO) 54&G132
PDS-898C
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
T = +25°C and VeC2_= ±15V, ±15mA output current unless otherwise noted.
"n"R'~'~n~
~u'w'''u
ISOLATION
Rated Continuous Voltage (1)
AC,60Hz
DC
Tesl Breakdown, AC, 60Hz
Isolation-Mode Rejection
.. ~
TMIN to TMAX
TMIN to TMAX
lOs
2500Vrms, 60Hz
2121VDC
MIN
240Vrms, 60Hz
GAIN
Nominal
Innial Error
Gain vs Temperature
Nonlinearity
INPUT OFFSET VOLTAGE
Inilial Offset
vs Temperature
vs Power Supplies
INPUT
Voltage Range
Load Regulation
Line Regulation
Output Voltage VB Temperature
Vollage Balance Error, ±Vce,
Voltage Ripple
Output Capacitive Load (See Figure 1)
Sync Frequency
I
±O.I
±50
±0.01
±O.25
±120
±O.025
ppm/oC
%FSR
±20
±150
±50
±400
"vrc
VN
O/OFSR
mV
mVN
20
1.5
75
kHz
VI,,"
±15
V
V
mA
mAp-p
mAp-p
V
mA
mA
%/mA
±IO
No External Capacitors
10
3
±15
±15
30
0.5
1.IH
10
0.05
10
Sync-Pin Grounded(3)
1.6
±14.25
Balanced Load
Single
Balanced Load
-25
-25
-25
""
±18
+75/-4.5
No Filter
C," = IJ1F
±15.75
±50
100
VIV
mVioC
%
mVp-p
I
"F
MHz
+85
+85
+125
°C
°C
°C
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
wnhout notice. No patent lights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andlor systems.
BURR-BROWN@
Burr-Brown Ie Data Book-Linear Products
en
l-
0
::)
C
NOTES: (1) Conforms to UL544 test methods. 100% tested at 2500Vrms for I minute. (2) For other conditions, see Performance Curve, Input Current (+ V=) VB Output
Current. Input Current (-Vce,) is constant at-4.5mA (typ) for all output currents. (3) If using extemal synchronization with a TTL-level clock, frequency should be between
1.2MHz and 2MHz with a duty-cycle greater than 25%.
IEiilEiilI
,...
~
V
mA
mVp-p
pF
"VI1Hz'
'o=±15mA(2}
,...
0
0
±12.5
±15
20
1000
4
±5
TEMPERATURE RANGE
Specification
Operating
Storage
n~t
±IO
O.I%,-IO/IOV
Rated Output Voltage
Oulput Current
2
V
kn
Slew Rate
POWER SUPPLIES
Rated Voltage, Vee>
Voltage Range
Input Current
Ripple Current
100
160
10" 1113
1.2
±15
200
FREQUENCY RESPONSE
Smail Signal Bandwidlh
Settling Time
VDC
Vpk
dB
dB
±IO
Resistance
SIGNAL OUTPUT
Voltage Range
Current Drive
Ripple Voltage, 800kHz Carrier (See Figure 4)
Capacitive Load Drive
Vollage Noise
UNITS
Vrms
±2
Ve",_=±IOVtO±18V
Output Voltage in Range
MAX
2500
3500
6000
Barrier Impedance
Leakage CUrrent
TYP
5.55
0
a:
C.
Z
0
~
...i
0
~
For Immediate Assistance, Contact Your Local Salesperson
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
Supply Without Damage .................................................................... ±18V
V~, Sense Voltage ............................................................................ ±50V
Com I to Gnd I or Com 2 to Gnd 2 ........................................... ±200mV
Enable, Sync ........................................................................... OV to +V=
Continuous Isolation Voltage ..................................................... 2500Vrrns
V ISO' dv/dt ...................................................................................... 20kVlIJS
Junction Temperature ...................................................................... 150"C
Storage Temperature ..................................................... -25"C to +125"C
Lead Temperature, (soldering, lOS) ................................................ 300"C
Output Short to Gnd 2 Duration .............................................. Continuous
±Vee1 to Gnd I Duration .......................................................... Continuous
DIP
Top View
NC
32
NC
Gnd1
V,N
-VCC1
4
29
Com I
Com 2
13
20
-Vcc,
PACKAGE INFORMATION(!)
PACKAGE
PACKAGE DRAWING
NUMBER
32-Pin Side-Braze Ceramic
210
NOTE: (I) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
Sync'
Sense
Gnd 2
"" ELECTROSTATIC
\l)I DISCHARGE SENSITIVITY
16
17
Enable
'Operation requires that this pin be grounded or driven with TTL levels.
Any integrated circuit can be damaged by ESD_ Burr-Brown
recommends that all integrated circuits be handled with appropriate precautions_ Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet published specifications.
BURR~BROWN®
5.56
Burr-Brown Ie Data Book-Linear Products
I ElBI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
TA = +25°C, VCC2
=±15VDC, ±15mA output current unless otherwise noted.
IMRILEAKAGE vs FREQUENCY
RECOMMENDED RANGE OF ISOLATION VOLTAGE
10k
~
G
.,
~
120
rmnm[:l'"1'Tmm---r"TTlTTTl1'""'Tmrrnr"TnIllill
305k
ill
:s
100
lk
"
U
~"
a:
"
0" 80
100
"
"0
0
(5
!!1
E
E
Ox"
::;;
60
VI--'
C:
~
10
~
OJ
::;;
VV
VI--'
40 I--
/V
Leakage at
240Vrms
1::*
'I'--
V_..
-
VI--'
100nA
lOOk
20
10
100
lk
10k
lOOk
1M
10
10k
lk
100
-45
I I
Gain
~VCC2
-Vcc,
0
0
~~t-.
--_.
o
....
oen
GAIN/PHASE vs FREQUENCY
PSRR vs FREQUENCY
---
-3
i' r...
I'
Isolation Voltage Frequency (Hz)
Isolation Voltage Frequency (Hz)
60
lOrnA
VV
2500 Vrms
r--....I'--
0
g
~~~kag~ ~t
r--.... I'-- IIII
IMR
-~---
_._--- --
'--
45
;e
ill
"0
.r:
,;-e
°iii
"'""
'-.. "'-
.,
Ul
90
~
(!)
-12
0-
135
-9
...
_- ...-
•
::;)
C
oa::
180
-----
~
Il.
o
100
lk
10k
-15
100
lOOk
300
lk
3k
10k
30k
225
lOOk
Z
o
Small Signal Frequencv (Hz)
Supply Modulation Frequencv (Hz)
!i
....i
LARGE SIGNAL TRANSIENT RESPONSE
"
~
g
io
~
10
16
45
5 14
30
-jl12
15
j
l
g
0
(;'
g
"
-10
~
18 ~--~--~--_r--~--~ 60
Balanced Load Efficiency
20 , . . - - - - , - - - - , - - - - . . , - - - - ,
~
o
ISOLATED POWER SUPPLY
LOAD REGULATION AND EFFICIENCY
""
~
-Ii
-20 '--_ _ _.1...-_ _ _.1...-_ _ _- ' -_ _----'
o
50
Time
10 L-_ _
100
(~s)
~
__
~
__
~
__
~_~~
40
10
20
30
80
20
40
60
±VCCl Supply Output Current (rnA)
BURR - BROWN®
11511511
Burr-Brown Ie Data Book-Linear Products
5.57
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TYPICAL PERFORMANCE CURVES
(CONT)
T. = +25"C, V0C2 = ±15VDC, ±15mA output current unless otherwise noted.
ISOLATED POWER SUPPLY VOLTAGE
vs TEMPERATURE
ISOLATED POWER SUPPLY LINE REGULATION
19
2
18
,/
17
±15mALoad
16
~
~-Ii
./
15
14
1
i8VrJv' /'
lL"
/
12
V
11
-1
~.
V
10
./
9
9
10
11
-2
12
13
14
15
16
17
18
19
-25
o
25
+Vcc,(V)
~ b"
50
75
100
Temperature ('C)
ISOLATED SUPPLY VOLTAGE AND Vos
vs SYNC FREQUENCY
ISOLATED POWER SUPPLY
INPUT CURRENT vs OUTPUT CURRENT
5
145
50
2.5
«
.§.
25
:>
:>
.§.
0
~
.§.
0
~
-Ii
95
70
45
vv'
10
/
V
20
L
V
30
V
--
40
50
+VCCl Supply Balanced Output Current (rnA)
Sync Frequency (MHz)
BURR~BROWN@
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Burr-Brown Ie Data Book-Linear Products
IEilEilI
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THEORY OF OPERATION
The block diagram on the front page shows the isolation
amplifier's synchronized signal and power configuration,
which eliminates beat frequency interference. A proprietary
800kHz oscillator chip, power MOSFET transfonner drivers, patented square core wirebonded transfonner, and single
chip diode bridge provide power to the input side of the
isolation amplifier as well as external loads. The signal
channel capacitively couples a duty-cycle encoded signal
across the ceramic high-voltage barrier built into the package. A proprietary transmitter-receiver pair of integrated
circuits, laser trimmed at wafer level, and coupled through a
pair of matched "fringe" capacitors, result in a simple,
reliable design.
OPTIONAL GAIN AND OFFSET ADJUSTMENTS
Rated gain accuracy and offset perfonnance can be achieved
with no external adjustments, but the circuit of Figure 2a
may be used to provide a gain trim of ±0.5% for the values
shown; greater range may be provided by increasing the size
of Rl and RI. Every 2ldl increase in Rl will give an
additional I % adjustment range, with R2 ;::: RI. If safety or
conveuience dictates location of the adjustment potentiometer on the other side of the barrier from the position shown
in Figure 2a, the position of RI and R2 may be reserved.
Gains greater than I may be obtained by using the circuit of
Figure 2b. Note that the effect of input offset errors will be
multiplied at the output in proportion to the increase in gain.
Also, the small-signal bandwidth will be decreased in in-
SIGNAL AND POWER CONNECTIONS
Figure I shows the proper power supply and signal connections. All power supply pins should be bypassed as shown
with the 1t filter for +VCC2 an option recommended if more
than ±15mA are drawn from the isolated supply. The separate input and output common pins and output sense are low
current inputs tied to the signal source ground, output
ground, and output load, respectively, to minimize errors
due to IR drop in long conductors. Otherwise, connect Com
I to Gnd I, Com 2 to Gnd 2, and Sense to Vour at the ISOI07
socket. The enable pin may be left open if the ISOlO7 is
continuously operated. If not, a TTL low level will disable
the internal DCIDC converter. The Sync input must be
grounded for unsynchrouized operation while a 1.2MHz to
2MHz TTL clock signal provides synchronization of multiple units.
......
o,..
o
~
FIGURE 2a. Gain Adjust.
I
~i
30
~
I
o
rvVIN
29
::::»
I
c
oa::
I
I
I
R1 +R1)
Gain=1+ ( R2 200k
c..
z
o
~
....i
o
FIGURE 2b. Gain Setting.
Isolation Barrier
-VCC2
~
+VCC2
NC
La'
NOTES: (1) Enable =pin open
or TIL high. (2) Ground sync il
not used. (3) " filler reduces
ripple current: L, =IO"H, <1 OQ.
+VCC1
Co'?
La'
-VCC1
Co'?
'Optional Fmering:
L,,= 101lH, <100
Co = 0.1 -10pF
FIGURE 1. Signal and Power Connections.
BURR~BRDWN@.
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Burr-Brown Ie Data Book-Linear Products
5.59
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verse proportion to the increase in gain. In most instances, a
precision gain block at the input of the isolation amplifier
will provide better overall performance.
Figure 3 shows a method for trimming Vos of the ISO 107.
This circuit may be applied to either Signal Com (input or
output) as desired for safety or convenience. With the values
shown, ±l5V supplies and unity gain, the circuit will provide ±150mV adjustment range and 0.25mV resolution with
a typical trim potentiometer. The output will have some
sensitivity to power supply variations. For a ±100mV trim,
power supply sensitivity is 8mVN at the output.
100kQ>_-----;f\J
Signal Com 1
or
Signal Com 2
i'----r--
HIGH VOLTAGE TESTING
FIGURE 3. Vos Adjust.
OPTIONAL OUTPUT FILTER
Figure 4 shows an optional output ripple filter that reduces
the 800kHz ripple voltage to <3mVp-p without compromising DC performance. The small signal bandwidth is extended above 30kHz as a result of this compensation.
~
o
The IS0107 was designed to reliably operate with 2500Vrms
continuous isolation barrier voltage. To confirm barrier
integrity, a two-step breakdown test is performed on 100%
of the units. First, an 8000V peak, 60Hz barrier potential is
applied for lOs to verify that the dielectric strength of the
insulation is above this level. Following this exposure, a
2500Vrms, 60Hz potential is applied for one minute to
conform to UL544. Life-test results show reliable operation
under continuous rated voltage and maximum operating
temperature conditions.
Sense
'V V,N
29
ISOLATION BARRIER VOLTAGE
The typical performance of the ISO I 07 under conditions of
barrier voltage stress is indicated in the first two performance curves-Recommended Range of Isolation Voltage
and IMR/Leakage vs Frequency. At low barrier modulation
levels, errors can be determined by the IMRR characteristic.
At higher barrier voltages, typical performance is obtained
as long as the dv/dt across the barrier is below the shaded
area in the first curve. Otherwise, the signal channel will be
interrupted, causing the output to distort, and/or shift DC
level. This condition is temporary, with normal operation
resuming as soon as the transient subsides. Permanent damage to the integrated circuits occurs only if transients exceed
20kV/flS. Even in this extreme case, the barrier integrity is
assured.
14
13
I
4.7nF
FIGURE 4. Ripple Reduction.
MULTICHANNEL SYNCHRONIZATION
Synchronization of multiple IS0107s can be accomplished
by connecting pin 19 of each device to an external TTL level
oscillator, as shown in Figure 6. The PWS750-1 oscillator is
convenient because its nominal synchronizing output frequency is 1.6MHz, resulting in a 800kHz carrier in the
IS0107 (its nominal unsynchronized value). The open collector output typically switches 7.5mA to a 0.2V low level
so that the external pull-up resistor can be chosen for
different pull-up voltages as shown in Figure 6. The number
of channels synchronized by one PWS750-1 is determined
by the total capacitance of the sync voltage conductors. They
must be less than 1000pF to ensure TTL level switching at
800kHz. At higher frequencies the capacitance must be
proportionally lower.
Customers can supply their own TTL level synchronization
logic, provided the frequency is between 1.2MHz and 2MHz,
and the duty cycle is greater than 25%.
BURR-BROWN®
5.60
Burr-Brown Ie Data Book-Linear Products I~~I
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APPLICATIONS
RL
0,
0,
R11
R2•
-15V
OPA2111·
2N3904
2N7000
IN4148
IC,
Q,,02,04
0
1%,1/2W
R3
R4 • Rs
IC" IC, Bypass
IC, Bypass
""Burr-Brown PIN
......
0
,...
~
1%,22100
1,0!,F
0.1!,F
FIGURE 5. EeG Amplifier with Right Leg Drive, Defibrillator Protection, and E.S.U. Blanking.
en
I-
o
c
oa:
::::)
Sync ~ 1.6MHz
Q.
.AA.
Channel 1
Z
o
ISO
fi
..i
o
R
~
NOTES: (1) PWS750-1 can sync
>20 IS0107s. (2) Bypass supplies
as shown in Figure 1.
Channel 2
Additional Channels
FIGURE 6. Synchronized-Multichannel Isolation.
BURR-BROWN@
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Burr-Brown Ie Data Book-Linear Products
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IiRR-BROWN®
150113
.a.al
Low-Cost, High-Voltage, Internally Powered
OUTPUT ISOLATION AMPLIFIER
FEATURES
DESCRIPTION
• SELF-CONTAINED ISOLATED SIGNAL
AND OUTPUT POWER
The 1S0113 output isolation amplifier provides both
signal and output power across an isolation barrier in
a small double-wide DIP package. The ceramic nonhermetic hybrid package with side-brazed pins contains a transformer-coupled DC/DC converter and a
capacitor-coupled signal channel.
• SMALL PACKAGE SIZE: Double-Wide
(0.6") Sidebraze DIP
• CONTINUOUS AC BARRIER RATING:
1500Vrms
Extra power is available on the isolated output side for
driving external loads. The converter is protected from
shorts to ground with an internal current limit, and the
soft-start feature limits the initial currents from the
power source. Multiple-channel synchronization can
be accomplished by applying a TIL clock signal to
paralleled Sync pins. The Enable control is used to
turn off transformer drive while keeping the signal
channel modulator active. This feature provides a
convenient way to reduce qniescent current for low
power applications.
• WIDE BANDWIDTH: 20kHz Small Signal,
20kHz Full Power
• BUILT-IN ISOLATED OUTPUT POWER:
±10V to ±18V Input, ±50mA Output
• MULTICHANNEL SYNCHRONIZATION
CAPABILITY
• BOARD AREA ONLY 0.72In.2 (4.6cm2)
APPLICATIONS
The wide barrier pin spacing and internal insulation
allow for the generous 1500Vrms continuous rating.
Reliability is assured by 100% barrier breakdown
testing that conforms to UL1244 test methods. Low
barrier capacitance minimizes AC leakage currents.
• 4mA TO 20mA VII CONVERTERS
• MOTOR AND VALVE CONTROLLERS
• ISOLATED RECORDER OUTPUTS
• MEDICAL INSTRUMENTATION OUTPUTS
These specifications and bnilt-in features make the
1S0113 easy to use, and provides for compact PC
board layout.
• GAS ANALVZERS
,r---;::c====:::;:=~ +Vc
Sense
+VCC1
V,N
Duty Cycle Demodulator
. . --C========~==1
-VCC1
Com 1
Sync"
t=;:::===::'-~=-1-~_
Enable
Gnd 1
+VCC2
Rectifiers, Filters
C::=======~-::J~
"Ground if not used
VOIJT
Gnd
-Vc 2
-Z==========::J
PsGnd
-Vcc,
International Airport Industrial Parle • Mailing Add ....: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602) 746-1111 • Twx: 9111-952·1111 • Coble: BBRCORP • Telex: 066-6491 • FAX: (602) 889·1510 • Immedlete Product Info: (BOO) 548-6132
5.62
PDS·844D
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At TA = +25°C and VCC1 = ±15V, ±15mA output current unless otherwise noted.
150113
PARAMETER
ISOLATION
Rated Continuous Voltage
AC,60Hz
DC
Test Breakdown, t 00% AC, 60Hz
Isolation-Mode Rejection
Barrier Impedance
Leakage Current
GAIN
Nominal
Initial Error
Gain vs Temperature
Nonlinearity
CONDITIONS
MIN
to TUA)(
to TUA}(
lOs
1500Vrms, 60Hz
2121VDC
1500
2t21
5657
TMIN
TMIN
TYP
SIGNAL INPUT
Voltage Range
240Vrms, 60Hz
2
Vo =-10Vtol0V
Vo =-5Vt05V
1
±0.3
±60
±0.05
±0.02
±0.5
±100
±0.1
±0.04
VOC2= ±10 to±18V
10 = 0 to ±50mA
±20
±300
0.9
±0.3
±10
±10
±5
4000l4.7nF (See Figure 4)
Voltage Noise
POWER SUPPLIES
Rated Voltage, Vee1
Range
Input Current
Hipple Current
10=±15mA
10=OmA
NO Filter
Rated Output Voltage
Output
Load Regulation
Une Regulation
Output Vo~age vs Temperature
Voltage Balance, ±Vee,
Voltage Ripple (800kHz)
.
TEMPERATURE RANGE
Specification
Operating
Storage
··
±14.25
10
10
+90/-4.5
+60/-4.5
60
3
±15
±15.75
·
·
50
Sync-Pin Grounded(2)
1.6
·
1
..
·
+85
+85
+125
··
·
Vrms
VDC
Vpk
dB
dB
OllpF
~
VN
%FSR
ppmPC
%FSR
%FSR
mV
I1vrc
mVN
mVimA
V
mA
mVp-p
mVp-p
pF
11V1 .JHz
kHz
VII'S
I'S
·
·
·
··
·
V
V
mA
mA
mAp-p
mAp-p
V
V
V
OJo/mA
VN
mV/'C
%
mVp-p
mVp-p
I1F
MHz
'c
'c
'C
Spec WI cations same as ISOI13.
NOTE: (1) Conforms to UL1244 test methods. 100% tested at 1500Vrms for 1 minute. (2) If using external synchronization with a TTL-level clock, frequency should
be between 1.2MHz and 2MHz wHh a duty-cycle greater than 25%.
BURR-BROWN®
1&:1&:11
Burr-Brown Ie Data Book-Linear Prodvcts
M
,....
,....
0
~
V
·
5
-25
-25
-25
·
··
UNITS
kO
·
···
0.3
1.12
2.5
0.05
No External CapaCitors
C'XT = ll1F
±250
··
··
·
±18
Output Capacitive Load
Sync Frequency
±100
±SO
±0.05
±0.02
··
±15
±10
C,N = ll1F
Load = 15mA
SOmA Balanced Load
100mA Single-Ended Load
Balanced Load
·
±SO
±SOO
20
1.5
75
0.1%, -10110V
Vo~age
·
±20
±0.03
±0.012
±12.5
±15
25
5
1000
4
Capacitive Load Drive
FREQUENCY RESPONSE
Small Signal Bandwidth
Slew Rate
Settling Time
MAX
·
±15
200
Resistance
SIGNAL OUTPUT
Voltage Range
Current Drive
Ripple Voltage, 800kHz Carrier
TYP
·
130
160
10" 119
1
Output Voltage in Range
MIN
·
INPUT OFFSET VOLTAGE
InHial Offset
vs Temperature
vs Power Supplies
vs Output Supply Load
1501138
MAX
5.63
en
t-
0
:::»
C
0
a:
C.
Z
0
~
....i
0
~
For Immediate Assistance, Contact Your Local Salesperson
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Enable
Supply Without Damage .................................................................. ±18V
V,N , Sense Voltage ............................................................................ ±50V
Com, to Gnd, ...
.............................................................................................. ±20DmV
Enable, Sync ..................................
...................... Gnd to +VCC1
Continuous Isolation Voltage
....... 1500Vrms
............................. 20kV/~
V,SC ' dv/dt ........................................
Junction Temperature. ",
........... _......................... +150°C
Storage Temperature ............ ,........................................ -25°C to +125°C
Lead Temperature,10s ................................................................. +300°C
Output Short to Gnd Duration ................................................ Continuous
±VCC2 to Gnd 2 Duration ................
................................. Continuous
NC
Gnd 1
+VCC1
V,N
Sync
Com 1
Gnd2
9
16
IQ\ ELECTROSTATIC
\f::I DISCHARGE SENSITIVITY
-Vc
VOUT
Any integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
Sense
Ps Gnd
12
PACKAGE INFORMATION(1)
MODEL
PACKAGE
IS0113
24-Pin DIP
I
I
PACKAGE DRAWING
NUMBER
231
I
I
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet
published specifications.
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown
Ie Data Book.
The information provided herein is believed to be reliable; however, BURR~BROWN assumes no responsibility for inaccuracies oromissions. BURR~BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR~BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
BURR ~ BROWN®
5.64
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IEElEElI
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TYPICAL PERFORMANCE CURVES
TA = +25°C.Vcc> = ±15VDC. ±15mA output current unless otherwise noted.
RECOMMENDED RANGE OF ISOLATION VOLTAGE
IMRILEAKAGE vs FREQUENCY
10k~~"
I;±W!
~
2.1k
lk
.2
100
1ii
]j
E
10
.§
~
100
10k
lk
lOOk
1M
10M
100
100nA
lOOk
10k
lk
Isolation Voltage Frequency (Hz)
Isolation Vol1a!Je Frequency (Hz)
DISTORTION vs FREQUENCY
GAIN/PHASE vs FREQUENCY
3
10
II
..
--
/
lz
== 1=
+
o
Va
-
1=
Va
~
10
~
"
·iii
/"
45
90
Phase\
Cl
=20Vp-p
0
-en
Gain
"" .\
iii"
€:
~
en
!ll
s=
135 a.
-9 1-- 1--.
180
-12
IIIIIII
0.01
r--.
~
=2Vp-p
IIIIIII
J:
t- 0.1
~
.
lk
10k
o
:;:)
c
oa:
c..
z
o
-15
100
I-
lk
100
Frequency (Hz)
lOOk
10k
ti
Small Signal Frequency (Hz)
....i
o
LARGE SIGNAL TRANSIENT RESPONSE
20
~
~
f
0
15
60
16
45
15
30
14
15
l
~
%
15
0
%
0
17
CD
"
f
~
ISOLATED POWER SUPPLY
LOAD REGULATION AND EFFICIENCY
<3
"
>
+1
-10
13
-20
0
50
TIme
100
(~s)
"
~w
0
10
20
20
40
30
60
40
80
±V cc. Supply Oulpul Current (mA)
BURR-BROWN(i>'
I E51E5II
Burr-Brown Ie Data Book-Linear Products
5.65
For Immediate Assistance, Contact YourLocal Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25"C,VCC1 = ±15VDC, ±15mA output current unless otherwise noted.
ISOLATION POWER SUPPLY VOLTAGE
vs TEMPERATURE
ISOLATED POWER SUPPLY LINE REGULATION
19·
2
18
,;'
17
?:
8
>
....
/
±15mALoad
16
/
15
14
1.12VN
13
V
l
8
V
12
./
--
v--
~
-1
C"-...
/'
10
-2
-25
9
9
10
11
12
13
14
15
16
17
18
19
o
25
50
75
100
Temperature (OC)
+VCC1 (V)
ISOLATED SUPPLY VOLTAGE AND Vas
vs SYNC FREQUENCY
5
250
2.5
125
;;(
;;(
.§.
.§.
0
13
>
-------....
,...
,...
C")
-VCC1
>--------------'
o
!Q
NOTES: (I) Enable = pin open or TTL high. (2) Ground sync il not used.
(3) ~ Iiltarreduces ripple currant; l, = 10~H, 20 IS0113o. (2) Bypass supplies as shown in Figure 1.
FIGURE 7. Synchronized-Multichannel Isolation.
BURR-BROWN®
I EBEBI
Burr-Brown Ie Data Book-Linear Products
5.69
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J
BURR-BROWN@
150120
150121
IElElI
Precision Low Cost
ISOLATION AMPLIFIER
FEATURES
APPLICATIONS
• 100% TESTED FOR PARTIAL DISCHARGE
• INDUSTRIAL PROCESS CONTROL: Trans·
ducer Isolator for Thermocouples, RTDs,
Pressure Bridges, and Flow Meters, 4mA
to 20mA Loop Isolation
• 150120: Rated 1500Vrms
• 150121: Rated 3500Vrms
• HIGH IMR: 115dB at 60Hz
• GROUND LOOP ELIMINATION
• USER CONTROL OF CARRIER
FREQUENCY
• MOTOR AND SCR CONTROL
• POWER MONITORING
• ANALYTICAL MEASUREMENTS
• LOW NONLINEARITY: ±O.01% max
• BIPOLAR OPERATION: V 0 = ±10V
• 0.3"·WIDE 24·PIN HERMETIC DIP, 150120
• BIOMEDICAL MEASUREMENTS
• DATA ACQUISITION
• SYNCHRONIZATION CAPABILITY
• TEST EQUIPMENT
• WIDE TEMP RANGE: -55°C to +125°C
(150120)
DESCRIPTION
The IS0120 and IS0121 are precision isolation amplifiers incorporating a novel duty cycle modulationdemodulation technique. The signal is 'transmitted
digitally across a 2pF differential capacitive barrier.
With digital modulation the barrier characteristics do
not affect signal integrity, which results in excellent
reliability and good high frequency transient immunity across the barrier. Both the amplifier and barrier
capacitors are housed in a hermetic DIP. The IS0120
and ISO 121 differ only in package size and isolation
voltage rating.
These amplifiers are easy to use. No external components are required for 60kHz bandwidth. With the
addition of two external capacitors, precision specifications of 0.01 % max nonlinearity and 15011V/oC max
Vos drift are guaranteed with 6kHz bandwidth. A
power supply range of ±4.5V to ±18V and low qniescent current make these amplifiers ideal for a wide
range of applications.
Isolation Barrier
' - - - C2H
V,N
Sense
VOUT
Signal
Com 1
Signal
Com 2
ExlOsc
-v..
Gnd 1
Gnd2
InternlUonal Airport Industrial PaJk • MIUlng Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602) 746-1111 • Twx: 910-952·1111 • cable: BBRCORP • Telex: 06H491 • FAX: (602) 118901510 • Immediate Producllnfo: (800) 548-6132
5.70
PDS-820D
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
At T.= +25°C: V" =
v" = ±15V: and RL = 2kn, unless otherwise noted.
IS01208G,IS01218G
PARAMETER
CONDITIONS
ISOLATION
Voltage Rated Continuous IS0120: AC 60Hz
TMIN to TMAX
DC
TUIN to TMAX
IS0121: AC 60H,
TUIN to TUAX
DC
TMIN to TMAX
100% Test (AC 60Hz): IS0120
1s; Partial Discharge ~ ~p~
IS0121
1s; Partial Discharge :s 5Pc
Isolation Mode Rejection ISO 120: AC 60Hz
1500Vrms
DC
IS0121: AC60Hz
3500Vrms
DC
Barrier Impedance
Leakage Current
V,so = 240Vrms, 60Hz
MIN
Gain vs Temperature
Nonlinearity
Nominal Gain
Gain Error
Gain vs Temperature
Nonlinearity
INPUT OFFSET VOLTAGE'"
Inmal Offset
vs Temperature
Initial Offset
vs Temperature
Initial Offset
vs Supply
C,
115
160
115
160
10" 112
0.18
1
±0.04
±5
±0.005
1
±0.04
±40
±0.02
= C2 = 0
±5
±100
±25
±250
C, = C, = 1000pF
C,
= C2 = 0
Noise
±10
Resistance
OUTPUT
Voltage Range
Current Drive
±10
±5
Capacitive Load Drive
Ripple Voltage.'
FREQUENCY RESPONSE
Small Signal Bandwith
Slew Rate
Settling TIme
0.1%
0.01%
Overioad Recovery Time(3)
POWER SUPPLIES
Rated Voltage
Voltage Range
Quiescent Current: ~:
TEMPERATURE RANGE
Specification: BG and G
SG'"
Operating
Storage
8,,: IS0120
IS0121
IS012OG,IS0120SG(4),IS0121G
MIN
··
·
··
±0.1
±20
±O.01
±0.25
±0.1
dB
dB
dB
dB
nil pF
JlArms
·
·
·
±12.5
±15
0.1
10
±0.25
±40
±0.05
±0.25
±O.1
mVN
flV/-/HZ
··
··
V
kG
V
rnA
.
kHz
kHz
·
flS
flS
fls
15
±18
±5.5
±a.5
85
85
125
150
40
25
m~:-,,V/flS
50
350
150
-25
-25
-55
-65
mV
flV/oC
mV
flV/0C
±SO
±400
±100
·
2
±4.0
±5.0
VN
%FSR
ppml"C
%FSR
VN
%FSR
ppml°C
%FSR
±2
4
±15
200
±4.5
UNITS
Vrms
±10
±150
±40
±SOO
±25
±150
±100
6
Vo = ±10V
C, = 100pF
C, = C, = 1000pF
50% Output Overload,
S,=C,=O
MAX
Vrms
VDC
Vrms
VDC
Vrms
1
±0.05
±10
±0.01
1
±O.05
±40
±O.04
60
C, = C, = 0
C, = C, = 1000pF
TYP
0.5
±2
4
or ±V" = ±4.5V to
INPUT
Voltage Range'"
MAX
1500
2121
3500
4950
2500
5600
Vo =±10V
C, = C, = 1000pF
GAIN'"
Nominal Gain
Gain Error
TYP
-25
-55
-55
-55
40
25
..
V
V
rnA
rnA
85
125
125
150
°C
°C
°C
°C
°cm
°cm
·Specmcations same as IS0120BG, IS0121BO.
NOTE: (1) Input voltage range = ±1 OV for V.,, V., = ±4.5VDC to ±18VDC. (2) Ripple frequency is at carrier frequency. (3) Overload recovery is approximately three times
the settling time for other values of C,. (4) The SG-grade is specHied -55°C to + 125°C; pertonnance of the SO in the -25°C to +85°C temperature range is the same
as the BG-grade.
BURR-BROWN®
IEilEilI
Burr-Brown Ie Data Book-Linear Products
5.71
,...
,...
C\I
0
,...
C\I
0
~
en
....
0
::;)
Q
0
a:
C.
Z
0
~
...i
0
~
For Immediate Assistance, Contact Your Local Salesperson
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAM
Supply Vollage (any supply) ............................................................... 18V
V ,N • Sense Voltage .......................................................................... ±1 OOV
External Oscillator Input .................................................................... ±25V
Signal Common 1 to Ground 1 ........................................................... ±1V
Signal Common 2 to Ground 2 ........................................................... ±1V
Continuous Isolation Voltage: IS0120 ...................................... 1500Vrms
IS0121 ....................................... 3500Vrms
V,SO ' dvldt ...................................................................................... 20kV!1JS
Junction Temperature ...................................................................... 150"C
Storage Temperature ..................................................... -65'C to +150'C
Lead Temperature (soldering. lOs) ............................................... +300'C
Output Short Duration ......................................... Continuous to Common
C'H
1/1(1)
24/40
Gnd 1
V,N
ClL
212
23/39
+Vs,
3/3·
22138
Ext Osc
-Vs,
4/4
21/37
Com 1
Com 2
PACKAGE INFORMATION(')
DRAWING
NUMBER
PACKAGE
MODEL
PACKAGE
IS0120G
IS0120BG
IS0120SG
24-Pin DIP
24-Pin DIP
24-Pin DIP
225
225
225
IS0121G
IS0121BG
40-Pin DIP
40-Pin DIP
206
206
NOTE: (1) For detailed drawing and dimension table. please see end of data
sheet. or Appendix 0 of Burr-Brown IC Data Book.
9/17
16/24
-VS2
VOUT 10118
15/23
+VS2
Sense 11/19
14122
C2l
Gnd2 12120
13/21
C 2H
NOTE: (1) First pin number is for ISOI20.
Second pin number is for ISOI21.
ORDERING INFORMATION
MODEL
IS0120G
ISOI20BG
IS0120SG
IS0121G
IS0121BG
TEMPERATURE
RANGE
-25'C to 85'C
-25'C to 85'C
-65C to 125'C
-25'C to 85'C
-25'C to 85'C
tQ\ ELECTROSTATIC
\lY DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from performance degradation to complete device failure_ Burr-Brown
Corporation recommends that all integrated circuits be handled
and stored using appropriate ESD protection methods_
The information provided herein is believed to be reliable; however. BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are
81
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not aL
any BURR-BROWN product for use in life support devices andlor systems.
aURR-BROWN®
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TYPICAL PERFORMANCE CURVES
TA
=
+25°C; VS1
= VS2 = ±15V; and
RL = 2kn., unless otherwise noted.
ISOLATION MODE VOLTAGE
vs FREQUENCY IS0120
ISOLATION MODE VOLTAGE
vs FREQUENCY IS0121
2.1 k
CD
CD
f
~
tJ~ffi+$$j$=§'iE~
1k
H--+++i',+++++-+-f-hII
~
a
"
~
~
1i
~
H--+ttt-~=l=ttl--cH-+rH--+ttt
"'" 100
~
~
"'"
~~~III~
f:c~
100
,..
100
1k
10k
100k
1M
10M
100
100M
10k
1k
Frequency (Hz)
100k
1M
10M
C\I
,..
100M
Frequency (Hz)
o
C\I
,..
BANDWIDTH vs C2
o
PHASE SHIFT vs C2
~
r~;~~'i!tII::CC~'-~"~lml~~~11
~"I- .
100nF
II
_._._- --1-+++-1+1--+-+-1+++++1
en
I-
o
~'$~ffm~~~$m.~$$l'fl.
1000pF
r==~=~1mt=::t:ttml:l:l-~"'-""","9;;:b;i:-i::tj:j:l:ll
o
;:)
c
F
0.1 ,---,--,-...u..J..J.I.I.L.._I........J'-J....l..W.l..U._...l-.J...J-U.l..UJ
100
1k
10k
100k
100
10k
1k
-.'ldB Frequency (Hz)
100k
Frequency (Hz)
oa:
Q.
Z
o
~
......i
o
ISOLATION LEAKAGE CURRENT
vs FREQUENCY
PSRR vs FREQUENCY
60
54
\
40
10mA
~
~:
\
iii'
:s
.3Ii!
20
-VS1'-VS2
-I-
f--
f- ._.-
1\
-1\1-
1500 Vrms
100~A
i 10~A
I-- --
1\ 1\ \
~
3500 Vrms
1mA
to
+VS1 ' +VS2
/~ I\V
a:
a:
(/l
a.
\
=F"'irr_vrm,f
1~A
0.1~A
10
100
1k
10k
100k
1M
Frequency (Hz)
1
10
100
1k
10k
100k
1M
Frequency (Hz)
BURR-BROWN®
IEiilEiilI
Burr-Brown Ie Data Book-Linear Products
5.73
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES
TA
(CONT)
= +25"C; v., = v.. = ±15V; and R, = 2kn, unless otherwise noted.
IMR vs FREQUENCY
SIGNAL RESPONSE vs CARRIER FREQUENCY
160
140
I'-
a
120
.....
iii'
;;
"
I'-
100
;;!
I'-
80
I'-
60
"-
..............
~
r-- ................ "'_--- ..
-..
,r-
-40
I'-
40
1
10
100
lk
10k
toOk
1M
a
liN (Hz)
~
2OdB/dec (lor comparison only)
',/
Ie
~
\
21c
31c
~I--~~--~I----+----+I----~--~I
Frequency (Hz)
lOUT (Hz)
a
a
1,12
SYNCHRONIZATION RANGE at 25"C
±4Vp SINE WAVE INPUT TO EXT OSC
fc12
a
NOISE vs SMALL SIGNAL BANDWIDTH
12
10nF
10 f - - - -
o
1000pF
a
'c12
C2 =C 1'"
~JIII~~ill
~
./
7
Y
V
V
r""'\ ~
y/
1-:"'-
cr i'
2
2
'C, ,;5000pF
lk
10k
C2~C,
lOOk
1M
0· 1I-3--"V\~----'r--or
Signal Com 2
-VS1 0r-VS2
+15V
C,
2
FIGURE 5. Vos Adjust.
.-----"1---+----.-1 ~
Ext Osc on
150120 (pin 22)
CARRIER FREQUENCY CONSIDERATIONS
As previously discussed, the IS0120 and IS0121 amplifiers
transmit the signal across the iso-barrier by a duty-cycle
modulation technique. This system works like any linear
amplifier for input signals having frequencies below one
half the carrier frequency, fc' For signal frequencies above
fr!2, the behavior becomes more complex. The Signal Response vs Carrier Frequency performance curve describes
this behavior graphically. The upper curve illustrates the
response for input signals varying from DC to fr!2. At input
frequencies at or above fr!2, the device generates an output
signal component that varies in both amplitude and frequency, as shown by the lower curve. The lower horizontal
scale shows the periodic variation in the frequency of the
output component. Note that at the carrier frequency and its
harmonics, both the frequency and amplitude of the response go the zero. These characteristics can be exploited in
certain applications. It should be noted that when C, is zero,
the carrier frequency is nominally 500kHz and the -3dB
point of the amplifier is 60kHz. Spurious signals at the
TIL
fiN
3
6N136
C,
= lOX C"
with a minimum 1OnF
FIGURE 6. Synchronization with Isolated Drive Circuit for
Ext Osc Pin.
ISOLATION MODE VOLTAGE
Isolation mode voltage (IMY) is the voltage appearing between isolated grounds Gnd 1 and Gnd 2. IMV can induce
error at tb.e output as indicated by the plots of IMY vs
Frequency. It should be noted that if the IMV frequency
exceeds fr!2, the output will display spurious outputs in a
manner similar to that described above, and the amplifier
response will be identical to. that shown in the Signal Response vs Carrier Frequency performance curve. This occurs
BURR-BROWN(l!i
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Burr-Brown Ie Data Book-Linear Products
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because IMV-induced errors behave like input-referred error
signals. To predict the total IMR, divide the isolation voltage
by the IMR shown in IMR vs Frequency performance curve
and compute the amplifier response to this input-referred
error signal from the data given in the Signal Response vs
Carrier Frequency performance curve. Due to effects of very
high-frequency signals, typical IMV performance can be
achieved only when dVIdT of the isolation mode voltage
falls below lO00VIllS. For convenience, this is plotted in the
typical performance curves for the ISO 120 and ISO 121 as a
function of voltage and frequency for sinusoidal voltages.
When dV/dT exceeds l000V/IIS but falls below 20kV/IIS,
performance may be degraded. At rates of change above
20kV/IIS, the amplifier may be damaged, but the barrier
retains its full integrity. Lowering the power supply voltages
below ±15V may decrease the dV/dT to 500V/IlS for typical
performance, but the maximum dVldT of 20kV/IIS remains
unchanged.
Leakage current is determined solely by the impedance of
the 2pF barrier capacitance and is plotted in the Isolation
Leakage Current vs Frequency curve.
ISOLATION VOLTAGE RATINGS
Because a long-term test is impractical in a manufacturing
situation, the generally accepted practice is to perform a
production test at a higher voltage for some shorter time. The
relationship between actual test voltage and the continuous
derated maximum specification is an important one. Historically, Burr-Brown has chosen a deliberately conservative
one: V TEST = (2 X ACrms continuous rating) + l000V for 10
seconds, followed by a test at rated ACrms voltage for one
minute. This choice was appropriate for conditions where
system transients are not well defined.
Recent improvements in high-voltage stress testing have
produced a more meaningful test for determining maximum
permissible voltage ratings, and Burr-Brown has chosen to
apply this new technology in the manufacture and testing of
the lSU120 and 150121.
Partial Discharge
When an insulation defect such as a void occurs within an
insulation system, the defect will display localized corona or
ionization during exposure to high-voltage stress. This ionization requires a higher applied voltage to start the discharge and lower voltage to maintain it or extinguish it once
started. The higher start voltage is known as the inception
voltage, while the extinction voltage is that level of voltage
stress at which the discharge ceases. Just as the total insulation system has an inception voltage, so do the individual
voids. A voltage will build up across a void until its inception voltage is reached, at which point ,the void will ionize,
effectively shorting itself out. This action redistributes electrical charge within the dielectric and is known as partial
discharge. If, as is the case with AC, the applied voltage
gradient across the device continues to rise, another partial
discharge cycle begins. The importance of this phenomenon
is that, if the discharge does not occur, the insulation system
retains its integrity. If the discharge begins, and is allowed
to continue, the action of the ions and electrons within the
defect will eventually degrade any organic insulation system
in which they occur. The measurement of partial discharge
is still useful in rating the devices and providing quality
control of the manufacturing process. Since the IS0120 and
ISO 121 do not use organic insulation, partial discharge is
non-destructive.
The inception voltage for these voids tends to be constant, so ,....
that the measurement of total charge being redistributed N
within the dielectric is a very good indicator of the size of :!:::
the voids and their likelihood of becoming an incipient 0
failure. The bulk inception voltage, on the other hand, varies N
with the insulation system, and the number of ionization
defects and directly establishes the absolute maximum volt- 0_
age (transient) that can be applied across the test device
before destructive partial discharge can begin. Measurin.
the bulk extinction voltage provides a lower, more conserva
tive voltage from which to derive a safe continuous rating.
In production, measuring at a level somewhat below the
expected inception voltage and then derating by a factor 0
related to expectations about system transients is an ....
accepted practice.
0
0
:::l
Partial Discharge Testing
Not only does this test method provide far more qualitative
information about stress-withstand levels than did previous
stress tests, but it provides quantitative measurements from
which quality assurance and control measures can be based.
Tests similar to this test have been used by some manufacturers, such as those of high-voltage power distribution
equipment, for some time, but they employed a simple
measurement of Rl' noise to detect ionization. Tnis memutl
was not quantitative with regard to energy of the discharge,
and was not sensitive enough for small components such as
isolation amplifiers. Now, however, manufacturers of HV
test equipment have developed means to quantify partial
discharge. VDE, the national standards group in Germany
and an acknowledged leader in high-voltage test standards,
has developed a standard test method to apply this powerful
technique. Use of partial discharge testing is an improved
method for measuring the integrity of an isolation barrier.
To accommodate poorly-defined transients, the part under
test is exposed to voltage that is 1.6 times the continuousrated voltage and must display $5pC partial discharge level
in a 100% production test.
Burr-Brown Ie Data Book-Linear Products
5.79
Q
o~
c.
z
o
~
-I
o
~
For Immediate Assistance, Contact Your Local Salesperson
APPLICATIONS
The ISOl20 and ISOl21 isolation amplifiers are nsed in
three categories of applications:
1. Accnrate isolation of signals from high voltage ground
potentials,
2. Accnrate isolation of signals from severe ground noise
and,
3. Fault protection from high voltages in analog measurements.
Fignres 7 through 12 show a variety of Application Circuits.
APPLICATION CIRCUITS
20~H
+1SV 0----.--_._----'
PWS74D-2
To 1-'-r-.----71
t -_ _ _ _ _=-j8 +V'N
0.3~F
3
b
PWS740-3
PWS740·1
4
I1.0~F
-Vs ,-----.,.....-----,
O-SV 0--_ _ _ _ _ _ _.:;2=-j3
VN2222
System Uses:
1 - Oscillator/Driver
8 - Transformers
8 - Bridges
8 -150120s
8 - Transistors VN2222
8 - Zener Diodes, S.2V, 400mW, 20%
Not all components shown.
-ISV
FIGURE 7. Eight-channel Isolated 0-20mA Loop Driver.
aURR~BROWN8
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Burr-Brown Ie Data Book-Linear Products
IElElI
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39 V-Connected Power Transformer
+VS1 -VS1 +VS2 -VS2
+VS1
120Vrms
100A
16
0.005 Power Resistor
C,
C,
= 1000pF
= 1000pF
,....
,....
Differential input accurately senses power resistor voltage.
Two resistors protect INA110 from open power resistor.
High frequency spike reject filter has feo = 400Hz.
N
(:)
N
FIGURE 8. Isolated Powerline Monitor.
SLJL~~OV
SMQ
1mV
Calibration Signal
~
o
::::)
c
oII:
a.
Z
3F
Gain = 1000
rvs, I:
i
fj;i
J
201u'1
9
20PF
o
726A
!a
4114
:
1
NOTE: (1) All eapaettor values in ~F unless otherwise
noted. Diodes are IN4146. (2) NE2H: Neon bulb. max
striking voltage 9SVAe'
!;i....I
r----l
PWS
1
-VS1
:
o
I
20~H
L
L
FIGURE 9. Right-Leg Driven ECG Amplifier (with defibrillator protection and calibration).
BURR-BROWN®
I EiI Eill
Burr-Brown Ie Data Book-Linear Products
5.81
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J
ChargeIDischarge Control
Control
Section
+v -v
.______ lLt4_____ _
I
I
I
I
I
FIGURE 10. Battery Monitor for a 600V Battery Power System.
ImA
lmA
~
~
+-,r,r. . . r'r----...,...-----,---- +vs = 15V on PWS740
Rs
1500
RTD
R,
1000
(PT100)
R2
2.5kO
--2mA
'---++_ Sync
' - - - -.....+_<~ Gnd
' - - - - -.....- - - - -.......--Vs =-15V
'---y--J
NOTE: Some IS0120 connections left out for clarity.
on PWS740
FIGURE 11. Isolated 4-20mA Instrument Loop. (RID shown).
BURR-BROWN@!
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Burr-Brown Ie Data Book-Linear Products
1&:1&:11
Or, Call Customer Service at 1·800·548·6132 (USA Only)
v+
8
6-~-~-
?
6-~-~-
.....
.....
-.....
N
4
PWS740-1
6
3
5
1
1
...L
Tl0~F
0
N
} Upto6
more
channels
~
TO.3~F
0
TO.3~F
~
FIGURE 12. Synchronized-Multichannel Isolation System.
~
:::;)
C
oa:
Q.
Z
o
!i
..J
o
~
BURR-BROWN®
11511511
Burr-Brown Ie Data Book-Linear Products
5.83
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IS0122
Precision Lowest Cost
ISOLATION AMPLIFIER
FEATURES
APPLICATIONS
.100% TESTED FOR HIGH-VOLTAGE
BREAKDOWN
• INDUSTRIAL PROCESS CONTROL:
Transducer Isolator, Isolator for Thermocouples, RTDs, Pressure Bridges, and
Flow Meters, 4mA to 20mA Loop Isolation
• RATED 1500Vrms
• HIGH IMR: 140dB at 60Hz
• GROUND LOOP ELIMINATION
• BIPOLAR OPERATION: Vo= ±10V
• 16-PIN PLASTIC DIP AND 28-LEAD SOIC
• MOTOR AND SCR CONTROL
• EASE OF USE: Fixed Unity Gain
Configuration
• POWER MONITORING
• PC-BASED DATA ACQUISITION
• 0.020% max NONLINEARITY
• TEST EQUIPMENT
• ±4.5V to ±18V SUPPLV RANGE
DESCRIPTION
The IS0122 is a precision isolation amplifier incorporating a novel duty cycle modulation-demodulation
technique. The signal is transmitted digitally across
a 2pF differential capacitive barrier. With digital modulation the barrier characteristics do not affect signal
integrity, resulting in excellent reliability and good high
frequency transient immunity across the barrier. Both
barrier capacitors are imbedded in the plastic body of
the package.
>----0
V,N 0----1
The IS0122 is easy to use. No external components
are required for operation. The key specifications are
0.020% max nonlinearity, 50kHz signal bandwidth,
and 2001!V/oC Vos drift. A power supply range of
±4.5V to ±18V and quiescent currents of ±5.0mA on
VSI and ±5.5mA on VS2 make these amplifiers ideal
for a wide range of applications.
Gnd
Voor
-v"
+v"
The IS0122 is available in 16-pin plastic DIP and 28lead plastic surface mount packages.
International Airport industrial Park • MaIling Address: PO Bo. 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tet: (602) 746-1111 • Twx: 91G-952-1111 • Cable: BBRCORP • T818.:068-6491 • FAX: (602) 889-1510 • Immediate Product Info: (800) 548-6132
5;84
PDS-857F
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
AtTA "" +25°C, VSl
""
VS2 = ±15V, and RL = 21<0 unless otherwise noted.
IS0122P/U
"""M"'''.
...v~' """"'_
ISOLATION
Voltage Rated Continuous AC 60Hz
100% Test
(ll
Isolation Mode Rejection
Barrier Impedance
Leakage Current at 60Hz
GAIN
Nominal Gain
Gain Error
Gain vs Temperature
Nonlinearity(2)
Is, 5pc PD
60Hz
VISO
MIN
140
10"112
0.18
=240Vrms
I
±D.05
±IO
±0.016
±20
±200
±2
4
vs Supply
Noise
INPUT
Voltage Range
±IO
±12.5
200
±IO
±5
±12.5
±15
0.1
20
Resistance
OUTPUT
Vottage Range
Current Drive
Capacitive Load Drive
Ripple Valtage~1
Storage
OJA
OJC
0.5
TYP
±0.020
±SO
·
··
±0.050
·
·
·
··
·
··
··
±15
·
±5.0
±5.5
-25
-25
-40
±18
±7.0
±7.0
+85
+85
+85
100
65
·
VN
%FSR
±0.025
···
50
mV
I1V/oC
mVN
I1V1VHz
kHz
VII'S
I1s
I1s
I'S
···
·
V
V
mA
mA
°C
°C
0(;
I
°CIW
°CIW
• Specification same as ISOI22P/U.
NOTES: (I) Tested at 1.6 X rated, fail on 5pC partial discharge. (2) Nonlinearity is the peak deviation of the output voltage from the best-fit straight line. It is expressed
as the ratio of deviation to FSR. (3) Ripple frequency is at carrier frequency (500kHz).
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in I~e support devices and/or systems.
BURR-BROWNe
lEa Ea I
Burr-Brown Ie Data Book-Linear Products
N
N
,..
0
~
V
mA
I1F
mVp-p
··
·
ppmrC
%FSR
V
kO
·
·
UNITS
VAC
VAC
dB
gil pF
I1Arms
··
350
150
±4.5
MAX
·
·
±D.50
Vo=±IOV
v"
Operatina
··
50
2
Quiescent Current: V81
TEMPERATURE RANGE
Specification
MIN
Vo=±IOV
vs Temperature
POWER SUPPLIES
Rated Voltage
Voltage Range
IS0122JP/JU
MAX
1500
2400
INPUT OFFSET VOLTAGE
Inijial Offset
FREQUENCY RESPONSE
Small Signal Bandwidth
Slew Rate
Settling Time
0.1%
0.01%
Overload Recover TIme
TYP
5.85
en
t-
0
:;:)
0
0
a:
Q.
Z
0
~
...I
0
~
For Immediate Assistance, Contact Your Local Salesperson
CONNECTION DIAGRAM
Top View -P Package
Top View-U Package
PACKAGE INFORMATION(I)
MODEL
IS0122P
ISOI22JP
IS0122U
IS0122JU
ABSOLUTE MAXIMUM RATINGS
PACKAGE
PACKAGE DRAWING
NUMBER
16-Pin Plastic DIP
16-Pln Plastic DIP
28-Pln Plastic SOIC
28-Pin Plastic SOIC
238
238
217-1
217-1
Supply Voltage ................................................................................... ±18V
V'N ......................................................................................................±100V
Continuous Isolation Voltage ..................................................... 1500Vrms
Junction Temperature .................................................................... +150'C
Storage Temperature ....................................................................... +85°C
Lead Temperature (soldering, lOS) ................................................ +300°C
Output Short 10 Common ......................................................... Continuous
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
ORDERING INFORMATION
MODEL
PACKAGE
NONLINEARITY
MAX%FSR
ISOI22P
IS0122JP
ISOI22U
IS0122JU
Plastic DIP
Plastic DIP
Plastic SOIC
Plastic SOIC
±0.020
±D.050
±0.020
±0.050
BURR~aROWNiII
Burr-Brown Ie Data Book-Linear Products
I EI Ell
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
T. = +2S"C.
v. = ±1SV unless otherwise noted.
SINE RESPONSE
(f = 2kHz)
SINE RESPONSE
(f=20kHz)
+10
+10
~
~
f
>
I
a>
a>
~
0
0
0
>
5
5
g.
:>
-10
-10
0
0
500
1000
50
Time (1lS)
N
100
N
,..
TIme(llS)
0
$!2
II
STEP RESPONSE
STEP RESPONSE
en
+10
~
a>
f
>
0
I"
g
0
5
g.
:::l
C
0
5
8
:>
0
f-
~
-10
IX:
Q.
Z
0
50
0
1000
500
0
~
100
Time(j1S)
Time(llS)
...I
0
!a
ISOLATION VOLTAGE
vs FREQUENCY
IMR vs FREQUENCY
160
..... r--,
140
2.1k
"
f
r--r.....
120
1k
iii'
:9a:
c
.2
1;j
~
'0
!!!
'"III
'I"
100
..... r.....
80
100
"
".....
0..
60
40
100
1k
10k
100k
1M
10M
100M
Frequency (Hz)
10
100
1k
10k
100k
1M
Frequency (Hz)
aURR~BROWN®
I EilEiII
Burr-Brown Ie Data Book-Linear Products
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TYPICAL PERFORMANCE CURVES
T. = +25°C,
v, =±15V unless otherwise noted.
ISOLATION LEAKAGE CURRENT
vs FREQUENCY
PSRR vs FREQUENCY
60
54
100mA
'\
1'1\
-
lOrnA
Ui'
E
c.
40
1\
~
\
,·~VS11-VS2
lmA
~
8100~
+VS1' +VS2
1500Vrms
CD
f
20
\
lOIlA
~
\1\
240Vrms
1~
O.lIlA
10
lk
100
10k
lOOk
10
1M
100
lk
10k
lOOk
1M
Frequency (Hz)
Frequency (Hz)
SIGNAL RESPONSE TO
INPUTS GREATER THAN 250kHz
250
E
-10
200
">~
S
0
-20
150
> -30
"
[
100
III
')
g
::I
-40
LL
50
500kHz
lMHz
1.5MHz
Input Frequency
(NOTE: Shaded area shows aliasing frequencies that cannot
be removed by a lOw-pass filter at the output.)
BURR-BROWN®
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THEORY OF OPERATION
The ISOl22 isolation amplifier uses an input and an output
section galvanically isolated by matched I pF isolating capacitors built into the plastic package. The input is dutycycle modulated and transmitted digitally across the barrier.
The output section receives the modulated signal, converts it
back to an analog voltage and removes the ripple component
inherent in the demodulation. Input and output sections are
fabricated, then laser trimmed for exceptional circuitry matching common to both input and output sections. The sections
are then mounted on opposite ends of the package with the
isolating capacitors mounted between the two sections. The
transistor count of the ISOl22 is 250 transistors.
MODULATOR
An input amplifier (AI, Figure I) integrates the difference
between the input current (VI j2ooJeQ) and a switched
±1001JA current source. This current source is implemented
by a switchable 2001JA source and a fixed 1001JA current
sink. To understand the basic operation of the modulator,
assume that V IN = O.OV. The integrator will ramp in one
direction until the comparator threshold is exceeded. The
comparator and sense amp will force the current source to
switch; the resultant signal is a triangular waveform with a
50% duty cycle. The internal oscillator forces the current
source to switch at 500kHz. The resultant capacitor drive is
a complementary duty-cycle modulation square wave.
DEMODULATOR
The sense amplifier detects the signal transitions across the
capacitive barrier and drives a switched current source into
integrator A2. The output stage balances the duty-cycle
modulated current against the feedback current through the
200JeQ feedback resistor, resulting in an average value at the
vOUT pin equal to VIN. The sample and hold amplifiers in the
output feedback loop serve to remove undesired ripple
voltages inherent in the demodulation process.
BASIC OPERATION
SIGNAL AND SUPPLY CONNECTIONS
Each power supply pin should be bypassed with I~ tantalum capacitors located as close to the amplifier as possible.
The internal frequency of the modulator/demodulator is set
at 500kHz by an internal oscillator. Therefore, if it is desired
to minimize any feedthrough noise (beat frequencies) from
a DCIDC converter, use a 1t filter on the supplies (see Figure
4). ISO 122 output has a 500kHz ripple of 20mV, which can
be removed with a simple two pole low-pass filter with a
100kHz cutoff using a low cost op amp. See Figure 4.
The input to the modulator is a current (set by the 200kQ
integrator input resistor) that makes it possible to have an
input voltage greater than the input supplies, as long as the
output supply is at least ±15V. It is therefore possible when
using an unregulated DCIDC converter to minimize
related output errors with ±5V voltage regulators on th
isolated side and still get the full ±IOV input and output
swing. An example of this application is shown in Figure
10.
N
N
,....
o
!a
PSD
~
o
::l
C
CARRIER FREQUENCY CONSIDERATIONS
The ISOl22 amplifier transmits the signal across the isolation barrier by a 500kHz duty cycle modulation technique.
For input signals having frequencies below 250kHz, this
system works like any linear amplifier. But for frequencies
above 250kHz, the behavior is similar to that of a sampling
amplifier. The signal response to inputs greater than 250kHz
o
a::
11.
Z
o
~
...I
o
isoiation Barrier
~
1pF :
1pF :
V,N
+VS2
Gnd2 -VS2
FIGURE I. Block Diagram.
,E:lE:I,
BURR-BROWN®
Burr-Brown Ie Data Book-Linear Products
5.89
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perfonnance curve shows this behavior graphically; at input
frequencies above 250kHz the device generates an output
signal component of reduced magnitude at a frequency
below 250kHz. This is the aliasing effect of sampling at
frequencies less than 2 times the signal frequency (the
N yquist frequency). Note that at the carrier frequency and its
hannonics, both the frequency and amplitude of the aliasing
go to zero.
ISOLATION MODE VOLTAGE INDUCED ERRORS
IMV can induce errors at the output as indicated by the plots
of IMV vs Frequency. It should be noted that if the IMV
frequency exceeds 250kHz, the output also will display
spurious outputs (aliasing), in a manner similar to that for
VIN > 250kHz and the amplifier response will be identical to
that shown in the Signal Response to Inputs Greater Than
250kHz perfonnance curve. This occurs because IMVinduced errors behave like input-referred error signals. To
predict the total error, divide the isolation voltage by the
IMR shown in the IMR vs Frequency curve and compute the
amplifier response to this input-referred error signal from
the data given in the Signal Response to Inputs Greater than
250kHz perfonnance curve. For example, if a 800kHz
1000Vnns IMR is present, then a total of [(-6OdB) +
(-30dB)] x (lOOOV) = 32mV error signal at 200kHz plus a
1V, 800kHz error signal will be present at the output.
HIGH IMV dV/dt ERRORS
As the IMV frequency increases and the dV/dt exceeds
1000VIllS, the sense amp may start to false trigger, and the
output will display spurious errors. The common mode
current being sent across the barrier by the high slew rate is
the cause of the false triggering of the sense amplifier.
Lowering the power supply voltages below ±15V may
decrease the dV/dt to 500V/IlS for typical perfonnance.
HIGH VOLTAGE TESTING
Burr-Brown Corporation has adopted a partial discharge test
criterion that confonns to the German VDE0884 OptocoupIer Standards. This method requires the measurement of
minute current pulses «5pC) while applying 2400Vnns,
60Hz high voltage stress across every IS0122 isolation
barrier. No partial discharge may be initiated to pass this
test. This criterion confinns transient overvoltage (1.6 x
1500Vnns) protection without damage to the IS0122. Lifetest
results verify the absence of failure tinder continuous rated
voltage and maximum temperature.
This new test method represents the "state of the art" for
non-destructive high voltage reliability testing. It is based on
the effects of non-unifonn fields that exist in heterogeneous
dielectric material during barrier degradation. In the case of
void non-nniformities, electric field stress begins to ionize
the void region before bridging the entire high voltage
barrier. The transient conduction of charge during and after
the ionization can be detected externally as a burst of 0.010.11lS current pulses that repeat on each AC voltage cycle.
The minimum AC barrier voltage that initiates partial discharge is defined as the "inception voltage." Decreasing the
barrier voltage to a lower level is required before partial
discharge ceases and is defined as the "extinction voltage."
We have characterized and developed the package insulation
processes to yield an inception voltage in excess of 2400Vnns
so that transient overvoltages below this level will not
damage the ISOI22. The extinction voltage is above
1500Vrrns so that even overvoltage induced partial discharge will cease once the barrier voltage is reduced to the
1500Vnns (rated) level. Older high voltage test methods
relied on applying a large enough overvoltage (above rating)
to break down marginal parts, but not so high as to damage
good ones. Our new partial discharge testing gives uS more
confidence in barrier reliability than breakdown/no breakdown criteria.
Isolation Barrier
A,
A,
V,N
IS0122P
16
FIGURE 2. Basic Signal and Power Connections.
FIGURE 3. Programmable-Gain Isolation Channel with
Gains of 1, 10, and 100.
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EiI Eill
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Isolation Barrier
13kn
100pF
V'N
IS0122
Gnd
N
N
,..
FIGURE 4. Optionai1t Filter to Minimize Power Supply Feedthrough Noise; Output Filter to Remove 500kHz Carrier Ripple.
For more information concerning output filter refer to AB-023.
r-----------,
This Section Repeated 49 Times.
+V
e,=12V
e,= 12V
I
I
I
I
I
I
~
-V
I
I
L __________ -.JI
,
Control
Section
ChargelDischarge
Control
L ________ _
FIGURE 5. Battery Monitor for a 600V Battery Power System. (Derives Input Power from the Battery.)
BURR-aROWN~
1155115511
Burr-Brown Ie Data Book-Linear Products
5.91
o
~
For Immediate Assistance, Contact Your Local Salesperson
+15V
+15V -15V
+15V -15V
9
1S0122P
10
7
Voor
14
,,
,,
,,
,,,
,,
,,
,
:
R,
lOon
tSA
TYPE
-:-
L _________________________________
~
: _______ ~~U~~~~_~h!~".!1~.?~~~~t_________ ~
,
E
;
NOTE: (1) -2.1 mV/oC at 2.0011A.
K
T
MATERIAL
Chromel
Constantan
Iron
Constantan
Chromel
Alumel
Copper
Constantan
SEE BACK
COEFFICIENT
(ltVI"C)
(R,=100~
R,
R.
(R, +
II. = 100~
58.5
3.48kn
56.2kn
50.2
4.12
64.9kn
39.4
5.23kn
80.6kn
38.0
5.49kn
64.5kn
FIGURE 6. Thennocouple Amplifier with Ground Loop Elimination, Cold Junction Compensation, and Up-scale Bum-out.
lmA
lmA
~
~
.. +V, =15V
~------------~._---
on PWS740
~OOT
R, =100
,+8
-
16
OV-5V
-v
2mA
L-----4-+-..... Gnd
-+-_.... _V. = -15V
L--_ _ _ _ _--4-_ _ _ _ _ _
on PWS740
FIGURE 7. Isolated 4-20mA Instrument Loop. (RID shown.)
IURR~aRawN®
5.92
Burr-Brown Ie Data Book-Linear Products _ E51E5II
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
Rs
2kQ
10kO
IS0122P +V
C\I
C\I
.,..
~
o
sa
(V,)
'---------r=--r=--I-'-~------_--
6
~ 'f-------<
4
I
PWS740-3
31
8
5
1
I
+V
I
0.3"F
I
4
~10"F
Voor
PWS740-3
3
16
3
12
11
\...JJ...A..}
PWS740-2
(Y'(Y'
4
HOfTr~ I--<
5
6
=r==
PWS740-1
4
3
-=-
Channel 3
(Same as Channell.)
Channel 4
(Same as Channell.)
FIGURE 9. Three-Port, Low-Cost, Four-Channel Isolated, Data Acquisition System.
5_94
Burr-Brown Ie Data Book-Linear Products
BURR-BROWi lffl
IEili!5!i
O~
Call Customer Service at 1·800·548·6132 (USA Only)
+1SV
N
N
,...
o
~
To PWS740-2,-1
NOTE: The input supplies can be subregulated to ±5V to raduce
PSR related errors without reducing the ±1 OV input range.
~
FIGURE 10. Improved PSR Using External Regulator.
::l
C
Vs , (+15V)
v.
M
INPUT RANGE
(V),.,
20+
15
12
-2 to +10
-2 to +5
-,2 to +2
oa:
7
a..
INA10S
z
Dillerence Amp
10kn
o
+V.. (+15V)
fi-'
o
",.
~
VOUT::: V 1N
-v..
NOTE: (1) Select to match
As.
(-15V)
NOTE: Since the amplffier is unity gain, the input
range is also the output range. The output can go to
-2V since the output section olthe ISO amp operates
from dual supplies.
FIGURE 11. Single Supply Operation of the IS0122P Isolation Amplifier. For additional information see AB-009.
BURR -
BROWN~
IElElI
Burr-Brown Ie Data Book-Linear Products
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4
V,N 0---+------,
5
6
r-----+--+-----o -15V. 20mA
r----t-......- - - - - o +15V. 20mA
Auxiliary
Isolated
Power
Output
+15V
0---+----'
-15V
0--------'
'-------------0 Va
FIGURE 12. Input-Side Powered ISO Amp. For additional information refer to AB-024.
+15V
\
HPR117
6
5
2
~
(
94
95
96
HPR117
4
V,N 0----+--+--+-------,
Input
Gnd
Gnd
0----+---+------,
,-------+--+---0 -15V. 20mA
,-----+-......- - - 0 +15V. 20mA
Auxilial}'
Isolated
Power
Output
Auxilial}'
Isolated
Power
Output
+15V. 20mA 0---_-----/------'
-15V. 20mA 0 - - - - - - -......- - - - - '
' - - - - - - - - ' -......- - - - - 0 Output
Gnd
' - - - - - - - - - - - - - 0 Va
FIGURE 13. Powered ISO Amp with Three-Port Isolation. For additional information refer to AB-024.
5.96
==__
Burr-Brown Ie Data Book-Linear Products __
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BURR-BROWN@
150130
1-=--=-1
High IMR, Low Cost
ISOLATION AMPLIFIER
FEATURES
APPLICATIONS
•
• MOTOR AND SCR CONTROL
HIGH ISOLATION-MODE
REJECTION:10kV//lS (min)
o
M
....
o
• MOTOR PHASE CURRENT SENSING
• LARGE SIGNAL BANDWIDTH: 85kHz (typ)
•
DIFFERENTIAL INPUT/DIFFERENTIAL
OUTPUT
• INDUSTRIAL PROCESS CONTROL:
Transducer Isolator, Isolator for
Thermocouples, RTDs
•
VOLTAGE OFFSET DRIFT vs
TEMPERATURE: 4.6IlV/oC (typ)
• GENERAL PURPOSE ANALOG SIGNAL
ISOLATION
•
OFFSET VOLTAGE 1.8mV (max)
• POWER MONITORING
•
INPUT REFERRED NOISE: 300llVrms (typ)
• GROUND LOOP ELIMINATION
~
~
::l
C
•
NONLINEARITY: 0.25% (max)
•
SINGLE SUPPLY OPERATION
DESCRIPTION
•
SIGMA-DELTA A/D CONVERTER
TECHNOLOGY
•
UL1577, VDE 0884, CSA APPROVAL
•
AVAILABLE IN 8-PIN PLASTIC DIP and
a-PIN GULL-W!NG PLASTIC SURFACE
MOUNT
The ISO 130 is a high isolation-mode rejection, isolation amplifier suited for motor control applications. Its
versatile design provides the precision and stability
needed to accurately monitor motor currents in highnoise motor control environments. The IS0130 can
also be used for general analog signal isolation applications requiring stability and linearity under severe
noise conditions.
The signal is transmitted digitally across the isolation
barrier optically, using a high-speed AlGaAs LED.
The remainder of the ISO 130 is fabricated on lllID
CMOS IC process. A sigma-delta analog-to-digital
converter, chopper stabilized amplifiers and differential input and output topologies make the isolation
amplifier suitable for a variety of applications.
GND, 04 _--,---,
IMRSHIELD
The IS0130 is easy to use. No external components
are required for operation. The key specifications are
JOkV/!IS isolation-mode rejection, 85kHz large signal
bandwidth, and 4.6!lV/oC Vos drift. A single power
supply ranging from +4.5V to +5.5V makes this amplifier ideal for low power isolation applications.
The IS0130 is available in 8-pin plastic DIP and 8-pin
plastic gull-wing surface mount packages.
Intemational Airport Industrial Park • Mailing Address: PO Box 11400
Tucson, AZ 85734 • Street Address: 6730 S. Tueaon Blvd. • Tucaon, AZ 85706
Tel: (602) 746-1111 • Twx: 9111-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (602)889-1510 • Immediate Producllnfo: (800)54UI32
PDS-1234A
5.97
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Q.
Z
o
~
-!
o
~
For Immediate Assistance, Contact Your Loca/Salesperson
SPECIFICATIONS
ISOLATION SPECIFICATIONS - VDE0884 INSULATION CHARACTERISTICS
= OV, TA = 25°C, VB" V.. = 5.0V, unless otherwise noted.
At V~-, V'N-
ISOI30P/ISOI30PB
ISOI30UlISOI30UB
PARAMETER
ISOLATION CHARACTERISTICS
Installation Classification
Table I
Rated Mains Voltage'; 300Vrms
Rated Mains Voltage'; 800Vrrns
Climatic ClassHication
Pollution Degree'"
Maximum Working Insulation Voltage (V'ORM)
Side A to Side B Test Vo"age, Method b (VPR)
Partial Disch8lQe < 5pC
Side A to Side B Test Vo~e, Method a (VpR)
Partial Discharge < 5pC
Highest Allowable Overvoltage (VTR)
Sefety-Limiting Values
case Temperature (T..)
Input Power (PSI ('NPUT))
Output Power (PSI (OUl1'UT))
UNITS
CHARACTERISTIC
CONDmONS
As Per VDEOI 09/1 2.83
I-IV
1-111
As Per VDEOI09/12.83
VpA = 1.6 X V!ORM' tp = 1s
Type and Sample Test
VPR ~ 1.2 x V.,..., t, = 80s
Transient Overvoltage, t.. = lOS
INSULATION RELATED SPECIFICATIONS
Min. External Air Gap (clearance)
Min. External Tracking Path. (creepage)
Internal Isolation Gap (clearance)
Tracking Resistance (CTI)
Isolation Group
Insulation Resistance
per VDEOI09
25°C, V,so = 500V
40/85121
2
600
Vrms
960
Vrms
720
6000
Vrms
175
80
250
°C
mW
mW
>7
8
0.5
175
ilia
mm
mm
mm
V
~
VpEAk.
10 '1
Q
SPECIFICATIONS
ISOLATION SPECIFICATIONS
At V'N+' V'N- = OV, TA = 25°C, VB" V., = 5.0V, unless otherwise noted.
ISOI30P,ISOI30PB
ISOI30U,ISOI30UP
PARAMETER
ISOLATION
Rated Continuous (in accordance with UL1577)
Voltage Test Breakdown,
(in accordance wijh UL1577)
Barrier Impedance
Resistance
Capacitance
Isolation Mode Vo~e Errors
Rising Edge Transient Immunity
Failing Edge Transient Immunity
Isolation Mode Rejection Ratio'"
CONDITIONS
MIN
3750
Vrms
I s, Leakage CUrrent < 5jJA
4500
Vrms
VISO = 500VDC
f = IMHz
V'M
VIM
= IkV, a VOIIT < 50mV
= IkV, a VOIIT < 50mV
10
10
TYP
MAX
UNITS
10 '3
Q
0.7
pF
25
15
> 140
kVl.,s
kVl.,s
dB
BURR-BROWNe
5.98
Burr Brown Ie Data Book-Linear Products
I ~~ I
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SPECIFICATIONS
ELECTRICAL
At V1N+. VIN-
=av, TA = 25°C, VS1 '
VS2
= S.OV,
unless otherwise noted.
PARAMETER
CONDITIONS
INPUT
Initial Offset Voltage
vs Temperature
MIN
TYP
MAX
UNITS
-1.8
-0.9
4.6
30
-40
0.0
mV
IlVI"C
VSl
vs VS2,
VS
Power Supply Rejection; VS,
and V", Together
1MHz Square Wave, 5ns Rise/Fall Time
0.1 Hz to 100kHz
Noise
Input Voltage Range
Maximum Input Voltage Range before Output
Initial Input Bias Current")
vs Temperature
Input Resistance(3)
vs Temperature
Common·Mode_R~~ct~ Aatio(4)
INN
INN
5
300
200
-200
i
±3oo
-a70
3
530
0.38
72
mVN
IlVrms
mV
mV
nA
nAl"C
kQ
%I"C
dB
(II')
-200mV < V~+ < 200mV
-200mV < V'N+ < 200mV
7.61
7.85
Gain vs VS2
Gain Nonlinearity
for -200mV < VIN+ < 200mV
for -l00mV < V1N+ < 100mV
vs Temperature(6)
-200mV < V,N+ < 200mV
-200mV < ~::: < 200mV
-200mV < I < 200mV
v~ ~:(;;)
vs
8.00
7.93
10
2.1
-0.6
8.40
8.01
VN
VN
ppml"C
ppmlmV
ppmlmV
0.2
0.1
-0.001
-0.005
-0.007
0.35
0.25
%
%
%pts/"C
% pts/V
%pts/V
VIN+
V,N+
""
+500mV
= -500mV
-4Q°C < TA < 85°C, 4.SV < V81 < S.SV
2.2
VOIJf:::: OV or VOIIf = VS2
--40·C to 85·C
50
3.61
1.18
2.39
1
9.3
11
0.6
2.6
V
V
V
mA
mA
Q
%I"C
kHz
kHz
85
35
-4U'"'(; to S5"C
*."
6,S
--4OOC to 85·C
-40·C to 85·C
-40·C to 85·C
2.0
3.4
6.3
3.3
5.6
9.9
POWER SUPPLIES
Rated Voltage
Voltage Range
CJ)
t-
:::»
C
0
a:
Q.
Z
5.0
4.5
V ,N+
= 200mV, --40·C < T, < 85·C, 4.5V < V.,
< 5.5V
10.7
11.6
--40·C < T < 85·C, 4.5V < VSI < 5.5V
0
us
us
~
us
5.5
V
V
15.5
15.5
mA
mA
85
100
125
·C
·C
·C
·CIW
RANGE
--40
-40
Specification
Operating
Storage
8e-
-55
86
NOTES: (1) This part may also be used in Pollution Degree 3 environments where the rated mains voltage is 300Vrms (per DIN VDE0109/12.83). (2) IMRR
= 20 log (av,.!av"o)' (3) Time averaged value. (4) V,N + = V",- = Vc.' CMRR = 20 log (aVc./aVos)' (5) The slope of the best-fit line of (VOUT• - VOUTJ vs (V,N•
-VIN-..J (6) Change in nonlinearity vs temperature or supply voltage expressed in number of percentage points per °C or volt. (7) For best offset voltage
performance.
BURR-BROWN@
Burr-Brown Ie Data Book-Linear Products
fi
d
jlS
Quiescent Current
IEilEilI
~
0
FREQUENCY RESPONSE
Bandwidth
-3dB
--45·
Rise/Fall Time (10% - 90%)
Propagation Delay
to 10%
to 50%
to 90%
I cm.-cn"I un ..
0
0
OUTPUT
Voltage Range
High
Low
Common-Mode Voltage
Current Drive(7)
Short-Circuit Current
Output Resistance
vs
~:
0
,...
GAIN($)
Initial Gain
IS0130P/IS0130U
IS0130PBlIS0130UB
Gain vs Temperature
Gain vs VSl
5.99
For Immediate Assistance, Contact Your Local Salesperson
PIN CONFIGURATION
Top VIew
ABSOLUTE MAXIMUM RATINGS
8-Pln DIP/SOIC
Supply Voltages: vs,' V........................................................... ov to 5.5V
Steady-State Input Voltage .......................................... -2V to VS1 + 0.5V
2 Seoond Transient Input Voltage ..................................... ,............. -6.0V
Output Voltages: VOUT+' Vour-c .................................. ...(J.5V to V", + 0.5V
Lead Temperature Solder (1.6mm below seating plane, 10s) ....... 260'C
PACKAGE INFORMATION(1)
MODEL
IS0130P
IS0130PB
IS0130U
IS0130UB
f(/\ ELECTROSTATIC
\lY DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE
PACKAGE DRAWING
NUMBER
8·Pin Plastic DIP
8-Pin Plastic DIP
B-Pin Gull·Wing Plastic Surface Mount
B-Pin Gull·Wing Plastic Surface Mount
006-3
006-3
006-2
006-2
NOTE: (1) For detailed draWing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
ORDERING INFORMATION
GAIN ERROR
MODEL
PACKAGE
IS0130P
8·Pin Plastic DIP
IS0130PB
B-Pin Plastic DIP
IS0130U
B·Pin Gull·Wing Plastic Surface Mount
IS0130UB B-Pin Gull·Wing Plastic Surface Mount
(MAX)
±5% (mean value =8.00)
±1% (mean value =7.93)
±5% (mean value =8.00)
±1% (mean value = 7.93)
The information provided herein is believed to be reliable; however, BURR·BROWN assumes no responsibility for inaccuracies or omissions. BURR·BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any olthe circuits described herein are implied or granted to any third party. BURR·BROWN does not authorize orwanant
any BURR-BROWN product for use in life support devices andior systems.
5.100
Burr Brown Ie Data Book-Linear Products
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
BANDWIDTH vs TEMPERATURE
'N
AMPLITUDE and PHASE RESPONSE vs FREQUENCY
110
48
100
44
I
~
t"
'"
[[]
90
40
~
~
"tij
[[]
---
80
36
[[]
"
":3
.r=
0-
0)
70
32
-20
20
0
40
60
80
r- 1"'-1'
'N
I
~
iii -1
-
:s
Phase
-2
E
-~
i"
---
II:
--5
~
-10
--
CD
I«
........, Amplitude
_.
--_._-
-30
:s
"
"I!!
0>
:3"
1\
.-.. -
..
1\
~
-_..
-15
.r=
0-
-45
1\
--50
lOOk
-4
28
100
100
lk
10k
Frequency (Hz)
Temperature (OC)
o
,....
('I)
o
!a
PROPAGATION DELAYS and RISEIFALL TIME
vs TEMPERATURE
..
~
8
3
2.5
.§.
2
"
j--~---
-~-
.!!l
0
z
~
:;
Co
.E
0.5
o
OL---~--~--~--~--~----~~
-20
20
40
60
80
100
-_.
No Bandwidth
Limitin~
---_.- . . . . . y
-_. _._-
1.5
"
~
-40
II
INPUT VOLTAGE NOISE vs INPUT VOLTAGE
10r---~--~----~--~----r---~--~
50
100
--
Bandwidth Limited
~1dthlLimited to 100kHz
o
L
V
tol0kH~
-.1
150
Q.
o
ti
Input Vo~age (mV)
Temperature (OC)
Q
o~
Z
250
200
~
::l
...J
o
1500
r---_r--~r---;----;----r---_r--_.
~
j
~
~
600r---~----~-----r----;-----r---~
~
2l, 1000
400
I-~~~~~r-~~r-~~r--
200
I-~~r-~~~~~r-~~F-~-
1l,
tij
5
500
I
o
~ --500 I-~--±_"'--+-
.E
-20
o
20
40
60
80
!a
INPUT OFFSET VOLTAGE CHANGE vs
INPUT SUPPLY VOLTAGE
INPUT OFFSET VOLTAGE CHANGE vs TEMPERATURE
~
-200
1---j----I7'-
i
-400
1-____<'---r-~_____lr_~_____lC_~_____l~~_____l-
--500
L-__
100
Temperature (OC)
4.4
~
____
4.6
~
4.8
____
~
5.0
__
~
____
5.2
~
5.4
__
~
5.6
Input Supply Voltage, V s, (V)
BURR-BROWN®
I E:lE:II
Burr-Brown Ie Data Book-Linear Products
5.lO1
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
At T.
=25°C, v.,, V.. = 5.0Vcc ' V1N+, V1N- = OV,
unless otherwise noted.
INPUT OFFSET VOLTAGE CHANGE vs
OUTPUT SUPPLY VOLTAGE
400
\.
;:;-
a
300
"'"
"
c:
.r;
()
~5
i
~ F ~~
--
-ka"-
~OO
4.B
4.6
5.4
5.2
5.0
-4
()
/
5
c.
,§ -6
~esn
~ r--
./
-100
4.4
/
1 -2
""'-,
"- ~
100
.........
~
~5V
r--....
200
f
Vs,
INPUT CURRENT vs INPUT VOLTAGE
2
-6
/
J
L
-10
5.6
-6
GAIN DRIFT vs TEMPERATURE
r--
~
GAIN CHANGE vs INPUT SUPPLY VOLTAGE
~ L~
/
/
-1
-40
~
CD
~
~
f-"
'"c:
"
-0.5
c:
-1
.r;
~ean
()
'm
Cl
V
-1.5
t 2a
-2
o
-20
0
/+~a
/
-0.5
40
20
BO
60
4.4
100
Tempsrature (OC)
lO.3 I,
~
0.2
0.1
VS1
'\
5.4
5.6
~ 5V
0.2
CD
~
\.+20-
'"'" -- --4.6
~
LL
~
4.B
5.2
Output Supply Voltage, VS2 (V)
0
I--0.2
""'-
5.0
0.1
'5
'#. -0.1
'\.
~--i
4.4
5.2
0.3
i\.
~~
-0.1
5.0
NONLINEARITY ERROR VB INPUT VOLTAGE
GAIN CHANGE vs OUTPUT SUPPLY VOLTAGE
1""'-.
4.B
4.6
Input Supply Voltage, V 81 (V)
0.5
t
6
0.5
./~
8
4
2
Input Voltage (V)
1.5
0.4
o
-2
-4
OUiput Supply Voltage, VS2 (V)
5.4
5.6
-0.3
-0.2
-0.1
0
0.1
Input Voltage (V)
aURR~BROWNe
5.102
Burr Brown Ie Data Book-Linear Products
I EiI Eill
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES (CONT)
NONLINEARITY CHANGE vs INPUT SUPPLY VOLTAGE
NONLINEARITY CHANGE vs TEMPERATURE
0.15 ..---,----,--.,...----.,...--,...---,-----,
~
~
C
0.10 1-----+--'\.-1-
C
" 0.05
g>
~
0.04
0.02
(I)
.
OJ
0::
.0::
c5
:!a
0.06
0
0
~
0 t--=*=:::;;j--'T"'=~=r-""'~j__-_t_--_t
-f -0.02
~0
z -0.04 -
-0.05
~2"
-0.05 L...._--'_ _--I.._ _-'-_ _-'-_ _.l-_.......I
-0.10 L...._-'-_--'_ _-'-_--I.._ _J......._-'-_.......I
-40
~20
40
100
o
20
so
80
4.4
4.5
4.8
Temperature (OC)
5.0
5.2
o
5.5
5.4
,....
C")
Input Supply Voltage, Vs (V)
o
~
NONLINEARITY CHANGE v.
OUTPUT SUPPLY VOLTAGE
0.06
~
NONLINEARITY ERROR vs INPUT VOLTAGE
.-----::""'---,---r----,----,-----,
0.04 I-------j-"<---t----t----j---t-------\
C
I
0.02 I--------j--'<:---t-'\--+---j---
Z
-0.02
F.....
-0.05 p.~~"""'=F".......--_+--_+-+--==-~
~
-0.10 I------+--''<----t_ -)'----,1------1
-0.15
4
-
(I)
3
2.5
8
2
_......_--
1
(Pin?)
V
~
/
- J
-0.6
5.4
5.6
.-0.10
-0.05
o
0.05
INPUT CURRENT vs INPUT VOLTAGE
:;
1.5
5.2
OUTPUT VOLTAGE vs INPUT VOLTAGE
VOUT+
J
5.0
Input Vo~age (V)
" "\
3.5
~
4.8
I-----+---"<--I--r----+-------\
-0.20 '--_ _ _-'-_ _ _-'-_ _ _....1._ _ _- '
Output Supply Voltage, V. (V)
-0.4
-0.2
/
/'
1-400
VOUT_
I
o
~
0.2
-600
:;
~ -800
~1000
-
0.4
0.5
V
/'
/"
~1200
Input Voltage (V)
-0.2
-0.1
/'
/"
L
o
/
0.1
../""
0.2
Input Vo~age (V)
BURR ~ BRDWN@
IEilEilI
Burr-Brown Ie Data Book-Linear Products
Q
oa:
c..
z
o
~
...J
o
~
~200
(PinS)
'" "--
0.10
o
r -
~
::)
~
-0.04 '--_--1_ _-'-_ _-'-_ _..1...._ _' - - _ - '
4.6
II
Jo.~ =------:.!-"'""---I----7"'-~.,...---
I--------j--~--,f---++___:;.....o;;:c_-t__="'--I
4.4
.-----,...----,...----r--::-----,
0.10 1-----+----7''--I---'<:----+--,t-------\
'0
.~
~
~o
0.15
5.103
For Immediate Assistance, Contact Your Local Salesperson
TYPICAL PERFORMANCE CURVES, (CONT)
INPUT SUPPLY CURRENT vs INPUT VOLTAGE
OUTPUT SUPPLY CURRENT vs INPUT VOLTAGE
10.5
«
.s
lE
10
E
~
11.5
~
"
"
()
()
i
9.5
~
Q.
11
"
'5
10.5
%
0
"
rJl
rJl
1.E
-0.3
-0.2
-0.1
0.1
0.2
0.3
0.4
-0.3
DEPENDENCE OF SAFETY-LIMITING PARAMETERS
ON AMBIENT TEMPERATURE
400
150
300
I
200
~
100
~~
§'
a:
!
\
100
~
\
-
~
,\\
50
\0.
o
o
40
60
80
100
120
0
0.1
0.2
0.3
0.4
140
160
+100mV
1
.E
-100mV
~
i
0
~
20
-0.1
LARGE SIGNAL SINUSOIDAL RESPONSE
OFlS0130
200
.s
-0.2
Input VoHage (V)
Input Voltage (V)
,~
I
0
180
10IJS/div
Ambient Temperature (OC)
OVERLOAD RECOVERY OF IS0130
V,N = 500mV 10 0, 2kHz Square Wave
LARGE SIGNAL SQUARE WAVE RESPONSE
OF IS0130
+100mV
'5
Q.
0
.E
~ 3.4
-100mV
'5
a-
"
0
,.,I
'5
a-
"
0
2.4
1.4
10IJS/div
2IJS/div
BURR-BROWN\!!
5.104
Burr Brown Ie Data Book-Linear Products
I EilEiII
Or, Call Customer Service at 1·800·548·6132 (USA Only)
THEORY OF OPERATION
(in accordance with UL1577). To confirm the barrier integrity, each isolation amplifier is proof-tested by applying an
isolation test voltage greater than or equal to 4500Vrms for
one second. The barrier leakage current test limit is 51JA.
This test is followed by the partial discharge isolation
voltage test as specified in the German VDE0884. This
method requires the measurement of small current pulses
«5pico Colomb) while applying 960Vrms across every
ISO 130 isolation barrier. No partial discharge may be initiated to pass this test. This criterion confirms transient
overvoltage (1.6 X 600Vrms) protection without damage to
the IS0130.
This test method represents "state of the art" for nondestructive high voltage reliability testing. It is based on the
effects of non-uniform fields that exist in heterogeneous
dielectric material during barrier degradation. In the case of
void non-uniformities, electric field stress begins to ionize
the void region before bridging the entire high voltage
barrier. The transient conduction of charge during and after
the ionization can be detected externally as a burst of 0.01 to
0.1J.lS current pulses that repeat on each AC voltage cycle.
The minimum AC barrier voltage that initiates partial discharge is defined as the "inception voltage". Decreasing
barrier voltage to a lower level is required before parti
discharge ceases and is defined as the "extinction voltage".
The IS0130 isolation amplifier (Figure I) uses an input and
output section galvanically isolated by a high speed optical
barrier built into the plastic package. The input signal is
converted to a time averaged serial bit stream by use of a
sigma-delta analog-to-digital converter and then optically
transmitted digitally across the isolation barrier. The output
section receives the digital signal and converts it to an
analog voltage, which is then filtered to produce the final
output signal.
Internal amplifiers are chopper-stabilized to help maintain
device accuracy over time and temperature. The encoder
circuit eliminates the effects of pulse-width distortion of the
optically transmitted data by generating one pulse for every
edge of the converter data to be transmitted. This coding
scheme reduces the effects of the non-ideal characteristics of
the LED, such as non-linearity and drift over time and
temperature.
LED
Drive
Circuit
Decoder
and
D/A
Detector
Circuit
Output
D.
Z
~
S.t1k!l
+5V
+15V
--L O.1~F
8
>--.....- 0 Vour
IS0130
5
330PFl,
Pulse Generator
FIGURE 2. Isolation Mode Rejection and Transient Immunity Test Circuit.
aURR-BROWN®
I E!I E!l1
oa:
o
~
...J
o
FIGURE 1. Block Diagram of IS0130 Isolation Amplifier.
+
-=-9V
00_
c
Barrier
and
Encoder
~
~:::>
Voltage
Regulator
Clk
Isolation
Input
CW')
0
tha
ISOLATION SPECIFICATIONS
The performance of the isolation barrier of the ISO 130 is
specified with three specifications, two of which require
high voltage testing. The IS0130 is designed to reliably
operate with 3750Vrms continuous isolation barrier voltage
Voltage
Regulator
0
Burr-Brown Ie Data Book-Linear Products
5.105
For Immediate Assistance, Contact Your Local Salesperson
Both tests are 100% production tests. The partial discharge
testing of the 180130 is performed after the UL1577 test
criterion giving more confidence in the barrier reliability.
the output signal of the 180130. A Transient Immunity failure
is determined when the output of the 180130 changes by
more than 50mV as illustrated in Fignre 3.
The third guaranteed isolation specification for the 180130 is
Transient Immunity (TI), which specifies the minimum rate
of rise or fall of an isolation mode noise signal at which small
output perturbations begin to occur. An isolation mode signal
is defined as a signal appearing between the isolated grounds,
GND, and GND2• Isolation Mode Voltage (IMV) is the
voltage appearing between isolated grounds. Under certain
circumstances this voltage across the isolation barrier can
induce errors at the output of the isolation amplifier. Fignre 2
shows the Transient Immunity Test Circuit for the 180130. In
this test circuit a pulse generator is placed between the
isolated grounds (GND, and GND,). The inputs of the 180130
are both tied to GNDI" A difference amplifier is used to gain
Finally, Isolation Mode Rejection Ratio (typically >140dB
for the 180130) is defined as the ratio of differential signal
gain to the isolation mode gain at 60 Hz. The magnitude of
the 60Hz voltage across the isolation barrier during this test
is not so large as to cause Transient Innnunity errors. The
Isolation Mode Rejection Ratio should not be confused with
the Common Mode Rejection Ratio. The Common Mode
Rejection Ratio defines the relationship of differential signal
gain (signal applied differentially between pins 2 and 3) to
the common mode gain (input pins tied together and the
signal applied to both inputs at the same time).
APPLICATIONS INFORMATION
APPLICATION CIRCUITS
n
_
50mV PertUibation
(Definition of Failure)
V'C7""
_OV
FIGURE 3. Typical Transient Immunity Failure Waveform.
Figure 4 illustrates a typical application for the 180130. In
this motor control circuit, the current that is sent to the motor
is sensed by the resistor, RsENSB ' The voltage drop across this
resistor is gained up by the 180130 and then transmitted
across the isolation barrier. A difference amplifier, A" is
used to change the differential output signal of the 180130
to a single ended signal. This voltage information is then
sent to the control circuitry of the motor. The 180130 is
particularly well suited for this application because of its
superior Transient Immunity (JOkV/lIS, max) and its excellent immunity to RF noise.
HV+
f- ...
f- ...
FIGURE 4. 180130 Used to Monitor Motor Current.
BURR-BROWNI3
5.106
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I EI Ell
Or, Call Customer Service at 1·800·548·6132 (USA Only)
The current-sensing resistor should have a relatively low
value of resistance (to minimize power dissipation), a fairly
low inductance (to accurately reflect high-frequency signal
components), and a reasonably tight tolerance (to maintain
overall circuit accuracy).
LAYOUT SUGGESTIONS
1. By-pass capacitors should be located as close as possible
to the input and output power supply pins.
2. In some applications, offset voltage can be reduced by
placing a O.OlllF capacitor from pin 2 and/or pin 3 to
GND .. This noise can be caused by the combination of
long input leads and the switched-capacitor nature of the
input circuit. This capacitor(s) should be placed as close
to the isolation amplifier as possible.
3. The trace lengths at input should be kept short or a twisted
wire pair should be used to minimize EMI and inductance
effects. For optimum performance, the input signal should
be as close to the input pins a possible.
4. A maximum distance between the input and output sides
of the isolation amplifier should be maintained in the
layout in order to minimize stray capacitance. This practice will help obtain optimal Isolation Mode performance.
Ground planes should not pass below the device on the
PCB.
oC")
,...
o
~
II
~
5. Care should be taken in selecting isolated power supplies
or regulators. The IS0130 can be affected by changes in
the power supply voltages. Carefully regulated power
supplies are recommended.
;:)
C
oa::
6. For improved non-linearity and non-linearity temperature
drift performance, pin 3 should be tied to GND, and the
input voltage range of pin 2 should be less than lOOmV.
Il.
Z
o
~
..J
o
~
BURR-BROWN@)
IEi!lEi!lI
Burr-Brown Ie Data Book-Linear Products
5.107
For Immediate Assistance, Contact Your Local Salesperson
BURR-BROWN®
IS0150
IElElI
Dual, Isolated, Bi-Directional
DIGITAL COUPLER
FEATURES
APPLICATIONS
• REPLACES HIGH-PERFORMANCE
OPTOCOUPLERS
• DIGITAL ISOLATION FOR AID, D/A
CONVERSION
• DATA RATE: 80M Baud, typ
• ISOLATED UART INTERFACE
• MULTIPLEXED DATA TRANSMISSION
• LOW POWER CONSUMPTION:
25mW Per Channel, max
• ISOLATED PARALLEL TO SERIAL
INTERFACE
• TWO CHANNELS, EACH BI-DIRECTIONAL,
PROGRAMMABLE BY USER
• TEST EQUIPMENT
• PARTIAL DISCHARGE TESTED: 2400Vrms
• CREEPAGE DISTANCE OF 16.5mm (DIP)
• MICROPROCESSOR SYSTEM INTERFACE
• ISOLATED LINE RECEIVER
• LOW COST PER CHANNEL
• GROUND LOOP ELIMINATION
• PLASTIC DIP AND SOIC PACKAGES
DESCRIPTION
The IS0150 is a two-channel, galvanically isolated
data coupler capable of data rates of 80MBaud, typical. Each channel can be individually programmed to
transmit data in either direction.
Data is transmitted across the isolation barrier by
coupling complementary pulses through high voltage
O.4pF capacitors. Receiver circuitry restores the pulses
to standard logic levels. Differential signal transmission rejects isolation-mode voltage transients up to
1.6kV//JS.
ISOl50 avoids the problems commonly associated
with optocouplers. Optically isolated couplers require
high current pulses and allowance must be made for
LED aging. The IS0150's Bi-CMOS circuitry operates at 25mW per channel.
IS0150 is available in a 24-pin DIP package and in a
28-lead SOIC. Both are specified for operation from
-40'C to 85'C.
International Airport Industrial Park • Mailing Add.....: PO Box 11400 • Tucson, AZ 85734 • S1reet Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602) 746-1111 • Twx: 91D-952.1111 • Csble:BBRCORP • Tel..: 066-6491 • FAX:(602)989-1510 • Immediate Product Info: (800)546-6132
5.108
PDS-1213B
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
TA
= +25'C, Vs = +5V unless otherwise noted.
IS0150AP, AU
PARAMETER
ISOLATION PARAMETERS
Rated Voltage, Continuous
Partial Discharge, 100% Test!l)
Creepage Distance (External)
DIP-"P" Package
SOIC-"U" Package
Internal Isolation Distance
Isolation Voltage Transient Immunity!')
Barrier Impedance
Leakage Current
DC PARAMETERS
Logic Output Voltage, High, VOH
Low, VOL
Logie Output Short-Circuit Current
Logie Input Voltage, High!')
Low(3)
CONDITION
M~N
60Hz
1s,5pC
1500
2400
6mA
6mA
Source or Sink
10L=
Receive Mode
AC PARAMETERS
Data Rate, Maximum!')
Data Rate, Minimum
Propagation Time!')
Propagation Delay Skew(7)
Pulse Width Distortion!')
Output Rise/Fall Time, 10% to 90%
Mode Switching Time
Receive-ta-Transmit
TransmiHo-Receive
Vrms
mm
mm
mm
kV/1lS
nil pF
IlArms
Vs
0.4
30
2
0
3
UNITS
Vrms
Vs-1
0
logic Input Capacitance
Logic Input Current
Power Supply Voltage Range!')
Power Supply Curren~4)
Transmit Mode
M-""-
16
7.2
0.10
1.6
>1014 117
0.6
240Vrms, 60Hz
10H =
rvP
Vs
0.8
5
<1
5
5.5
V
V
mA
V
V
pF
nA
V
Q
in
'P'"
DC
50MBaud
DC
50MBaud
CL = 50pF
CL = 50pF
CL = 50pF
CL = 50pF
CL = 50pF
TEMPERATURE RANGE
Operating Range
Storage
Thermal Resistance,6JA
0.001
14
7.2
16
50
DC
20
100
10
40
2
6
14
13
75
75
ns
ns
ns
ns
ns
ns
85
125
-40
-40
0
~
MBaud
80
27
0.5
1.5
9
IlA
mA
mA
mA
'C
'C
'CIW
NOTES: (1) All devices receive a 1s test. Failure criterion is;,5 pulses of <:5pC. (2) The voltage rate-of-change across the isolation barrier that can be sustained
without data errors. (3) Logic inputs are HCT-type and thresholds are a function of power supply vo~age with approximately O.4V hystersis-see text. (4) Supply
current measured with both tranceivers set for the indicated mode. Supply current varies with data rate-see typical curves. (5) Calculated from the maximum Pulse
Width Distortion (PWD), where Data Rate = 0.3/PWD. (6) Propagation time measured from V,N =1.5V to Va =2.5V. (7) The difference in propagation time of channel
A and channel B in any combination of transmission directions. (8) The difference between progagalion lime of a rising edge and a falling edge.
en
I-
0
:)
C
0
a:
a..
z
o
~
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o
~
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patenl rights or licenses to any of Ihe circuits described herein are implied or granled to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andlor systems.
Burr-Brown Ie Data Book-LinearProducts
5.109
For Immediate Assistance, Contact Your Local Salesperson
ABSOLUTE MAXIMUM RATINGS
PACKAGE INFORMATION(1)
-40·c
Storage Temperature .........................................................
to +12S·C
Supply Voltages, Vs ............•..................••....•................................ -(l.S to 6V
Transmitter Input Voltage, V, ...•......,.................................. -(l.S to V. + O.SV
R'!,.ceiver OUtput Voltage, V0 ••.••.••.••.•..••..•.••.••.•..••.•.••••.•.•.. -(l.S to Vs + O.SV
AfTx Inputs ...................................................•..................... -(l.S to V. + O.SV
Isolation Voltage dV/dt, VISO •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• SOOkV/J1S
Ox Short to Ground ...................................................................... Continuous
Junction Temperature, TJ ••••••••••••••.•••••.••••••••••••••.•••••.•••••.••••.•••••.••.•••••• 17S·C
Lead Temperature (soldering, lOs) ..............•...................................... 260·C
1.6mm below seating plane (DIP package) ......................................... 300·C
MODEL
°
PIN DESCRIPTIONS
0"
TOP VIEW
DIP
M1A
V..
0,.
24 D2A
Rtf,. 2
23
G.
RiflB
Rtf2A
V.. 3
PACKAGE DRAWING
NUMBER
24-Pln Single-Wide DIP
IS01S0AP
243-1
IS01S0AU
28-Lead SOIC
217-2
NOTE. (1) For detailed draWing and dimension table, please see end of
data sheet, or Appendix of BUIT-Brown IC Data Book:
NAME
PIN CO.NFIGURATION
PACKAGE
FUNCTION
Data in or data out for transceiver 1A. AfT,. held
low makes D1A an input pin.
ReceivefTransm~
switch controlling transceiver 1A.
+SV supply pin for side A which powers transceivers
lAand 2A.
Ground pin tor transceivers 1Band 2B.
ReceiveITransmit switch controlling transceiver 18.
0,.
Data in or data out far transceiver 1B.
low makes D1B an input pin.
Ri1\B held
0",
Data in or data out for transceiver 2B.
low makes 0 .. an input pin.
Rtf", held
Rtf",
ReceivefTransmit s~ch controlling 0",.
V••
+SV supply pin for side B which powers transceivers
lB and 2B.
GA
Ground pin for transceivers 1A and 2A.
Rtf",
0",
ReceivefTransmit switch contrOlling transceiver 2A.
Data in or data out for transceiver 2A.
low makes 02A in input pin.
Rtf", held
15 V..
G. 10
Rtf,.
11
14
0,.
12
13 O2 •
Rtf2•
t<:.l\ ELECTROSTATIC
\l:>' DISCHARGE SENSITIVITY
TOP VIEW
SOIC
•
0,.
Rtf,.
2
VSA 3
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
G. 12
Rtf,.
13
0,. 14
aURR-BROWNiII
5.110
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IEaEaI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
TA = +25°C, Va = +5V unless otherwise noted.
SUPPLY CURRENT PER CHANNEL
vsSUPPLYVOLTAGE
S
4
POWER CONSUMPTION PER CHANNEL V5 FREQUENCY
10
50
t=.j;_
CL =1!jP
f = 1MHz =2MBaud
No Load 111.1
One Channel
--
I
l=fq
40
~-+-----.v-
-
30
--
-- -
--
f-~-
---- --
j---
10
4
--
J
_.- .. -
7
;;7 I
:;
Receive
1M
lOOk
6
- -
/
-Hli
o
3
2
.
-
- r-yar\il
----
--
._--
-
--
--_ ..
-- -
--
B~udRate = 2' FrequT
20
1---+-7-
NOTE:
--
o
10M
o
100M
,..
Frequency (Hz)
Supply Vofiage, Vs (V)
it)
o
~
SUPPLY CURRENT PER CHANNEL
V5 TEMPERATURE
TYPICAL RISE AND FALL TIMES vs CAPACITIVE LOAD
vs SUPPLY VOLTAGE
100
t,
-----
/,
VA
80
- - -1-----
....s-"
U>
60
./
Vs - 3.0)(
40
h
_.._-_ .. <--_.
0
1
~
~
~
0
~
~ p-
20
2 I-=~--t"=t--
~
~
~
00
100
1~
.,,/ V,./Ir
/ . / ::,..........-
100
oa:
------
~O
300
~
o
::l
C
/~ ~
~ Vs =5.0V
."
1~
•
400
Temperature (0C)
Capacitive Load (pF)
NORMALIZED RISE/FALL TIME vs TEMPERATURE
PROPAGATION DELAYvs SUPPLY VOLTAGE
SOO
Q.
Z
o
~
..J
o
~
1_6
r---r-...,----,-.,--,..---r-...,----,-.,--,
LS 1---+----+--+--+--+----1----1-4
.s-
j
L3
~ '-2
1.1
1.0
.9
~~
~
0
~
~
~
00
100
1~
1~
Temperature eC)
'E:lE:i'
2.S
3.0
3.5
4.0
4.S
S.O
5.5
Supply Voltage, Vs (V)
BURR - BROWN®
Burr-Brown Ie Data Book-Linear Products
5.111
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TYPICAL PERFORMANCE CURVES (CONT)
T. = +25'C, Vs = +5V unless otherwise noted.
PULSE WIDTH DISTORTION
vs TEMPERATURE
PROPAGATION DELAYvs TEMPERATURE
60
CL = 50pF
--
VS
!----
I.
=3.0V
~~ !----
-
Vs = 5.0V
o
~
~~
~
0
~
50
50
100
1~
~~
1~
0
~
~
50
50
100
1~
1~
Temperature ('C)
Temperature ('C)
LOGIC INPUT THRESHOLD VOLTAGE
vs SUPPLY VOLTAGE
OUTPUT VOLTAGE vs LOGIC INPUT VOLTAGE
2.0 . - - - , - - - , - - - , - - - , - - - , - - - , - - - , - - - - - ,
1.8
~-·-"·-·--1--_+-_+-_+-__t
1.6 ~---1----jV.
1.4
~-t_-t_--:
4 1--\--\--+-'----. - - -f---H--I----
~ 1.2
~
J
l<1.0~-t-
> 0.8 ~-l_~-t_-t_-t_-l_-t_-t_-t___I
0.2
~-l_-l_-l_-l_-l_-t--l___I
~-~--f--+---- +---H~+---I
21--\---\--\--- r - -
0.6 ~-I---f--+--+-+-+-+---I
0.4
3
0L---i._-l..._-!-_.J....._......--i._-l..._..J
MUM
U
U
U
U
U
o
U
0.5
1.5
1.0
2.0
V,N (V)
Supply Voltage, V ss (V)
ISOLATION LEAKAGE CURRENT vs FREQUENCY
ISOLATION VOLTAGE vs FREQUENCY
10k
2.1k
f= ;:::~"':iUG
lk
Degraded
Performance
V,
= 1500Vrm
100
V, 0
=240Vrmsi='r=
10
lOOn
1
10
100
lk
Frequency (Hz)
5.112
10k
lOOk
1M
lk
10k
lOOk
1M
Frequency (Hz)
Burr-Brown Ie Data Book-Linear Products
10M
100M
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
(CONT)
TA = +25°C, Vs::= +5V unless otherwise noted.
TYPICAL INSULATION RESISTANCE vs TEMPERATURE
1010 L---l_-..I..._...l-_-'----J_--'-_-'-_..J---.-J
o
20
40
60
80
100
120
140
160
o
180
II)
,...
Temperature (0C)
ISOLATION BARRIER
Data is transmitted by coupling complementary logic pulses
to the receiver through two 0.4pF capacitors. These capacitors are built into the ISOl50 package with Faraday shielding to guard against false triggering by external electrostatic
fields.
The integrity of the isolation barrier of the ISOl50 is
verified by partial discharge testing. 2400Vrms, 60Hz, is
applied across the barrier for one second while measuring
any tiny discharge currents that may flow through the
barrier. These current pulses are produced by localized
ionization within the barrier. This is the most sensitive and
reliable indicator of barrier integrity and longevity, and does
not damage the barrier. A device fails the test if five or more
current pulses of 5pC or greater are detected.
o
Conventional isolation barrier testing applies test voltage far ~
in excess of the rated voltage to catastrophically break d o w n .
a marginal device. A device that passes the test may be
weakened, and lead to premature failure.
CJ)
APPLICATIONS INFORMATION
I-
Figure I shows the ISO 150 connected for basic operation.
Channel 1 is configured to transmit data from side B to A.
Channel 2 is set for transmission from side A to B. The RiT pins
for each of the four transceivers are shown connected to the
required logic level for the transmission direction shown. The
transmission direction can be controlled by logic signals
applied to the Rif pins. Channel 1 and 2 can be independently
controlled for the desired transmission direction.
:J
C
0--------,
Channel 2
, - - - - - - { ) Data Out
NOTES: (1) Power Supplies and grounds on
side A and side B are isolated. (2) Recommended
bypass: O.II1F in parallel with lnF.
Channell
Data Out 0 - - - - > - - - - - - '
Channel 1
.:------0 Data In
FlGURE 1. Basic Operation Diagram.
BURR~BROWN®
• Ell Ell, Burr-Brown Ie Data Book-Linear Products
oa:
Q.
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..J
o
~
+5V(I)
Channel 2
Data In
o
5.113
For Immediate Assistance, Contact Your Local Salesperson
LOGIC LEVELS
PROPAGATION DELAY AND SKEW
A single pin serves as a data input or output, depending on
the mode selected. Logic inputs are CMOS with thresholds
set for TIT. compatibility. The logic threshold is approximately I.3V with SV supplies and with approximately 400mV
of hysteresis. Input logic thresholds vary with the power
supply voltage. Drive the logic inputs with signals that swing
the full logic voltage swing. The ISOlS0 will use somewhat
greater quiescent current if logic inputs do not swing within
O.SV of the power supply rails.
Logic transitions are delayed approximately 27ns through
the ISOI50. Some applications are sensitive to data skewthe difference in propagation delay between channel 1 and
channel 2. Skew is less than 2ns between channel 1 and
channel 2. Applications using more than one ISOlS0 must
allow for somewhat greater skew from device to device.
Since all devices are tested for delay times of 20ns min to
40ns max, 20ns is the largest device-to-device data skew.
In receive mode, the data output can drive 15 standard
LS-TIT. loads. It will also drive CMOS loads. The output
drive circuits are CMOS.
POWER SUPPLY
Separate, isolated power supplies must be connected to side
A and side B to provide galvanic isolation. Nominal rated
supply voltage is SV. Operation extends from 3V to S.5V.
Power supplies should be bypassed close to the device pins
on both sides of the isolation barrier.
The Vs pin for each side powers the transceivers for both
channel 1 and 2. The specified supply current is the total of
both transceivers on one side, both operating in the indicated
mode. Supply current for one transceiver in transmit mode
and one in receive mode can be estimated by averaging the
specifications for transtuit and receive operation. Supply
current varies with· the data transtuission rate-see typical
curves.
POWER-UP STATE
The IS0150 transtuits information across the barrier only
when the input-side data changes logic state. When a transceiver is first programmed for receive mode, or is' poweredup in receive mode, its output is iuitialized "high". Subsequent changes of data applied to the input side will cause the
output to properly reflect the input side data.
SIGNAL LOSS
MODE CHANGES
The transtuission direction of a channel can be changed "on
the fly" by reversing the logic levels at the channel's R!f
pins on both side A and side B. Approximately 75ns after the
transceiver is programmed to receive mode its output is
iuitialized "high", and will respond to subsequent input-side
changes in data.
STANDBY MODE
Quiescent current of each transceiver circuit is very low in
transtuit mode when input data is not changing (InA typical). To conserve power when data transtuission is not
required, program both side A and B transceivers for transtuit mode. Input data applied to either transceiver is ignored
by the other side. High speed data applied to either transceiver will increase quiescent current.
CIRCUIT LAYOUT
The high speed of the IS0150 and its isolation barrier
require careful circuit layout. Use good high speed logic
layout techniques for the input and output data lines. Power
supplies should be bypassed close to the device pins on both
sides of the isolation barrier. Use low inductance connections. Ground planes are recommended.
Maintain spacing between side 1 and side 2 circuitry equal
or greater than the spacing between the tuissing pins of the
ISOlS0 (approximately 16mm for the DIP version). Sockets
are not recommended.
The ISO 150' s differential-mode signal transtuission and
careful receiver design make it highly immune to voltage
across the isolation barrier (isolation-mode voltage). Rapidly
changing isolation-mode voltage can cause data errors. As
the rate of change of isolation voltage is increased, there is
a very sudden increase in data errors. Approximately 50% of
IS0150s will begin to produce data errors with isolationmode transients of 1.6kV/J.IS. This may occur as low as
500V/J.IS in some devices. In comparison, a lOOOVrms, 60Hz
isolation-mode voltage has a rate of change of approximately
O.SV/J.IS.
Still, some applications with large, noisy isolation-mode
voltage can produce data errors by causing the receiver
output to change states. After a data error, subsequent changes
in input data will produce correct output data.
BURR~BROWN®
5.114
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IElElI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
+5V
Data
(1/0) 0--+----,
BUS
..,....6--+....-11----0 B
o
DElRE 0 - - - + - - - - '
,....
It)
+5V
o
"1"
~
(+5V)
FIGURE 2. Isolated RS-485 Interface.
~
o
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c
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Z
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BURR ~ BROWN----,Mf
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CAP
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t:I::i
;:
~
(5
~
~
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QB
QE 4
BYTE
OO~
01
I
16
...n...t
02 15
AGN0 2
03 13
SBlBTC
04 12
EXTIINT
05 11
23
~
QC 2
SRCLK
RIC
6
26 REFO
S
.!!..
10 SRCLR
7
25 PWRO
(=:)
QAI15
•
~RCLK
QF 5
13 G
QG
6
QH
7
150150
QH
8
~
BUSY
U2
14 SER
U--o+5V
Vee,
...n...
- - 0 High Byte Enable
VCC2
-=-----L__...1
FIGURE 3. Technique for Connecting Com 1 and Com 2.
BURR-BROWNe
1&:1&:11
en
0""
:::»
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0
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POWER SUPPLY AND SIGNAL CONNECTIONS
To avoid gain and isolation mode (IMR) errors introduced
by the external circuit, connect grounds as indicated in
Figure 3. Layout practices associated with isolation amplifiers are very important. In particular, the capacitance associated with the barrier, and series resistance in the signal and
reference leads, must be minimized. Any capacitance across
D.
Since gain inversion can be incorporated in either the input C"II
or output stage of the IS0212P, it is possible to use the input TC"II
amplifier in a non-inverting configuration and preserve the
high impedance this configuration offers. Signal inversion at
the output is easily accomplished by connecting OfP High to ~
Com 2 instead of OfP Low.
. .
Burr-Brown Ie Data Book-Linear Products
5.123
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network, especially when all IS0212Ps are synchronized. It
is best to use a well decoupled distribution point and to take
power to individual IS02l2Ps from this point in a star
arrangement as shown in Figure 4.
external driver connected to Clk In. See Figure 5. The driver
may be an external component with Series 4000 CMOS
characteristics, or one of the IS02l2Ps in the system can be
used as the master clock for the system. See Fignre 6 and 7
for connections in multiple IS02l2P installations.
NOISE
Output noise is generated by residual components of the
25kHz carrier that have not been removed from the signal.
This noise may be reduced by adding an output low pass
filter (see Figure 8). The filter time constants should be set
below the carrier frequency. The output from the IS0212P
is a switched capacitor and requires a high impedance load
to prevent degradation of linearity. Loads ofless than lM!l
will cause an increase in noise at the carrier frequency and
will appear as ripple in the output waveform. Since the
output signal power is generated from the input side of the
barrier, decoupling of the ±VSS I outputs will improve the
signal to noise ratio.
SYNCHRONIZATION
OF THE INTERNAL OSCILLATOR
The IS02l2P has an internal oscillator and associated timing components, which can be synchronized, incorporated
into the design. This alleviates the requirement for an external high-power clock driver. The typical frequency of oscillation is 50kHz. The internal clock will start when power is
applied to the IS02l2P and Clk In is not connected.
Because the frequencies of several IS02l2Ps can be marginally different, "beat" frequencies ranging from a few Hz to
a few kHz can exist in multiple amplifier applications. The
design of the IS02l2P accommodates "internal synchronous" noise, but a synchronous beat frequency noise will not
be strongly attenuated, especially at very low frequencies if
it is introduced via the power, signal, or potential grounding
paths. To overcome this problem in systems where several
IS02l2Ps are used, the design allows synchroniztion of
each oscillator in a system to one frequency. Do this by
forcing the timing node on the internal oscillator with an
Power In
CHARGE ISOLATION
When more than one IS02l2P is used in synchronous mode,
the charge which is returned from the timing capacitor
(22OpF in Fignre 5) on each transition of the clock becomes
significant. Figure 7 illustrates a method of isolating· the
''Clk Out" clamp diodes (Figure 5) from this charge.
A 22k!l resistor (recommended maximum to use) together
with the 39k!l internal oscillator timing resistor (Figure 5)
forms a potential divider. The ratio of these resistors should
be greater than 0.6 which ensures that the input voltage
triggers the inverter connected to "Clk In". If using a single
resistor, then account must be taken of the paralleled timing
resistors. This means that the 22k!l resistor must be halved
to drive two IS02l2Ps, or divided by 8 if driving 8 IS02l2Ps
to insure that the ratio of greater than 0.6 is maintained. The
series resistors shown in Figure 7 reduce the high frequency
content of the power supply current.
APPLICATIONS
The IS0212P isolation amplifier, together with a few low
cost components, can isolate and accurately convert a 4-to20mA input to a ±lOV output with no external adjustment.
Its low height (0.43" (l1mm) ) and small footprint (2.5" X
0.33" (57mm X 8mm) ) make it the solution of choice in OS'
board spacing systems and in all applications where board
area savings are critical.
The IS0212P operates from a single + l5V supply and offers
low power consumption and l2-bit accuracy. On the input
side, two isolated power supplies capable of supplying SmA
at ±8V are available to power external circuitry.
Track Resistance/Inductance
FIGURE 4. Recommended Decoupling and Power Distribution.
Clock
In
o-+-+---..,.----ri
Clock
Out
D-t--------'-/ +
NOTE: (1) e.g., strain gauge, pressure transducer, RTD, gas detection and analysis.
FIGURE 9. Instrument Bridge Isolation Amplifier.
100k,Q
+15V
l00kO
250kn
Siemens BPW21
FIGURE 10. Photodiode Isolation Amplifier.
+15V
lMn
I
,-----------------------------------------------,
I
\
,
I
I
\
FIGURE 11. Thermocouple Amplifier with Ground Loop Elimination, Cold Junction Compensation and Down-Scale Burn-Out.
BURR-::pwJi®
5.126
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..
Or, Call Customer Service at 1·800·548·6132 (USA Only)
100kll
+SOOVDC
lkll
V D = SOmV {FS)
-10V
to
+10V
--or--
0..
C"II
,...
C"II
3-Phase Y-Connected
Power Transformer
o
~
~
;:)
C
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0..
Z
FIGURE 12. Isolated Current Monitoring Applications_
7.87kll
200~A
o
~
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o
+lSV
~
!
PT100
-200"C to 850"C
FIGURE 13. Isolated Temperature Sensing and Amplification.
BURR-BROWN@
11511511
Burr-Brown Ie Data Book-Linear Products
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For Immediate Assistance, Contact Your Local, Salesperson
BURR-BROWN@
IXR100
IISaElI
Isolated, Self-Powered,
Temperature Sensor Conditioning
4-20mA TWO-WIRE TRANSMITTER
FEATURES
APPLICATIONS
• 1500Vrms ISOLATION
• INDUSTRIAL PROCESS CONTROL:
All Types of Isolated Transmitters;
Pt100 RTD
Thermocouple Inputs
Current Shunt (mY) Inputs
• TRUE TWO-WIRE OPERATION:
Power and Signal on One Wire Pair
• RESISTANCE OR VOLTAGE INPUT
• DUAL MATCHED CURRENT SOURCES:
400/JAat 7V
• ISOLATED DUAL CURRENT SOURCES
• AUTOMATED MANUFACTURING
• WIDE SUPPLY RANGE 12V TO 36V
• POWER PLANT/ENERGY MONITORING
• PT100 RTD LINEARIZATION
• GROUND LOOP ELIMINATION
DESCRIPTION
The IXRlOO is an isolated 2-wire transmitter featuring
loop powered operation and resistive temperature sensor conditioning (excitation and linearization). It contains a DCIDC convertor, high accnracy instrumentation amplifier with single resistor programmable span
and linearization, and dual matched excitation cnrrent
sonrces. This combination is ideally suited to a range
of transducers such as thennocouples, RIDs, thermistors and strain gages. The small size makes it ideal
for use in head mounted isolated temperatnre tnlllsmitters as well as rack and rail mounted equipment.
Pt100 NONLINEARITY CORRECTION
USING IXR100
The isolated two-wire transmitter allows signal transmission and device power to be supplied on a single
wire-pair by modulating the power supply cnrrent
with the isolated signal sonrce. The transmitter is
resistant to voltage drops from long runs and noise
from motors, relays, actuators, switches, transfonners
and industrial equipment.
It can be used by OEMs producing isolated transmitter
modules or by data acquisition system manufacturers.
The IXRl 00 is also useful for general purpose isolated
current transmission where the elimination of ground
loops is important.
+V~,t---+--"i
4.4
Uncorrected
+0.1
_______________ ~_;:.;rr~:..::_=--e9_ _"",,-=:,,,:::,,::~
-0.1
~~--------~-~------------------
·-200
ATD
AUN
850
Process Temperature (OC)
In\et'nallonal AlrporIlndustrtal Part< • Mailing Address: PO Box 11400
Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
ToI:(602)746-1111 • Twx: 910-952-1111 • Cable:BBRCORP • Telex: 06606491 • FAX: (602)1189-1510 • ImmedlateProcIuctlnfo:(800)54H132
5.128
PDS-1141A
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
VS = +24V. TA == +25°C, unless otherwise noted.
IXR100
PARAMETER
OUTPUT AND LOAD CHARACTERISTICS
Output Current
Output Current Limit
Loop Supply Voltage
Load Resistance
MIN
Linear Operating Region
4
TYP
11.6
RLOAD
UNITS
20
mA
mA
VDC
11
36
=(Vs -11.6)/10
300
200
V1N=O, Rs=oo
'""",a,",a
SPAN
Output Current Equation
Span Equation
Untrimmed Error
vs Temperature
Nonlinearity: EMF Input
: Pll00 Input
INPUT
Voltage Range
Common-Mode Range
Offset Voltage
vs Temperature
vs Supply
MAX
32
ZERO
Initial Error (1)
vs
CONDmONS
Rs in .0:, VrN in V
'"
10
=4mA + [0.016 + (40/R s)] (V,.)
S = [0.016 + (40/R s)]
-2.5
Excluding TCR of Rs
50
0.01
0.1
,2,
'"
Rs =00
0
100
0.025
1
2
V,." V,"- with Respect to COM
0.5
3
100
CURRENT SOURCES
Magnitude
Accuracy
vs Temperature
Match
4
2.5
5
50
25
DYNAMIC RESPONSE
Settling Time
To O.I%of Span
TEMPERATURE RANGE
Operating
Storage
ISOLATION
Isolation Voltage
V'SO
V'SO
1
100
0.5
50
500
-20
-40
1000JP
1500 KP
AN
%
ppm/°C
%FSR
%FSR
V
V
mV
~V/oC
dB
0.4
VST.
f1A
ppm FSRI"C
+70
+85
mA
%
ppm/oC
%
ppm/oC
Power Supply (+V, -I"",) ................................................................... 40V
Input Voltage (Com to V,N ) .................................................................... 9V
Storage Temperature Range ........................................... -40°C to +85°C
Lead Temperature (soldering lOs) ................................................ +300°C
Output Current Limit Duration ................................................. Continuous
Power Dissipation ......................................................................... 500mW
PACKAGE INFORMATION(1)
MODEL
PACKAGE
PACKAGE DRAWING
NUMBER
IXR100
2-wire Transmitter
901
en
I-
0
°C
°C
0
Vrms
Vrms
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from
performance degradation to complete device failure. BurrBrown Corporation recommends that this integrated circuit
be handled and stored using appropriate ESD protection
methods.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andlor systems.
BURR-BROWN@!
Burr-Brown Ie Data Book-Linear Products
~
:)
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
I EI Ell
.,..
a:
ms
NOTES: (1) Can be adjusted to zero. (2) End point span non-linearity. (3) End point, corrected span non-linearity wHh a Pll00 RTD input operated from -200°C to
+850°C.
ABSOLUTE MAXIMUM RATINGS
0
0
5.129
C
a:
D.
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o
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....i
o
~
For Immed(ate Assistance, Contact Your Local Salesperson
PIN CONFIGURATION
Top View
o
15
14
* ... NoPin
DISCUSSION
OF PERFORMANCE
FUNCTIONAL DESCRIPTION
The IXRlOO comprises of several functions:
The IXRIOO makes the design of isolated two wire 4 to
20mA transmitters easy and provides exceptional performance at very low cost. It combines several unique features
not previously available in a single package. These include
galvanic isolation, sensor excitation and linearization, excellent DC performance, and low zero and span drift. The
IXRlOO functions with voltages as low as 11.6V at the
device. This allows operation with power supplies at or
below 15V. When used with the RCV420 the complete4 to
20mA current loop reqnires only 13.1V. If series diode
protection is desired the minimum loop supply voltage is
still only about 13.7V. This is especially useful in systems
where the available supplies are only 15V.
BASIC CONNECTION
The basic connection of the IXRIOO is shown in Figure 1. A
differential voltage applied between pins 2 and 3 will cause
a current of 4 to 20mA to circulate in the two wire output
loop pins 28 and 18. Pins 1 and 4 supply the current
excitation for resistive sensors. Pins 6 and 7 are provided for
the connection of an· external span resistor which increases
the gain. Pins 8 and 9 provide linearity correction. Pins 10,
11 and 12 adjust the output offset current.
• Sensor excitation
• Internal voltage regulator
• Input amplifier and VII converter
• Linearization circnit
• DC/DC Converter
SENSOR EXCITATION
Sensor Excitation consists of two matched OAmA current
sources. One is used to excite the resistive sensor and the
other is used to excite the zero balance resistor Rz. When the
linearity correction feature is used these current sources are
modulated together so that three wire operation of a PtlOO
RID is possible.
INTERNAL VOLTAGE REGULATOR
The circnitry within the IXRlOO regulates the supply voltage
to the DC/DC Converter, Input Amplifier, Linearization
Amplifier and VII Converter and removes the normal variations in Vs from these stages as the output spans from 4 to
20mA.
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1_ _1
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0.4mA
10 - 4mA + (0.Ot6 +
Optional
Offset
Adjust
O.4mA
~~) V,N
V,N - IREF (RTD - Rz)
+VIN
6
Rsl21
IXR100
Your
7
3
-VIN
RUN
RTD
131
Rill
o
o
.....
NOTES: (1) Rz - RTD resistance at the minimum process temperature.
z
(2) RsReM
40
n.
0.016/(I!.V,N) - 0.016
a:
~
(3) RLiN - soon to 1500n or ~ if linearization is not required.
FIGURE 1. Basic Connection for RTD.
INPUT AMPLIFIER AND VII CONVERTER
DC/DC CONVERTER
The Input Amplifier is an instrumentation amplifier whose
gain is set by Rs, it drives the VII Converter to produce a 4
to 20mA output current. The Input Amplifier has a common
mode voltage range of 2 to 4V with respect to COM (pin 5).
Normally this requirement is satisfied by returning the
currents from the RTD and zero balance resistor ~ to COM
through a common mode resistor RCM ' For most applications
a single value of 3.9ldl may be used. When used with RTDs
having large values of resistance ~ must be chosen so that
the inputs of the amplifier remain within iis rairo "(,,nmon
mode range. RCM should be bypassed with a O.Olj.IF or larger
capacitor.
The DClDC Converter transfers power from the 2 wire
current loop across the barrier to the circuitry used on the
input side of the isolation barrier.
The Linearity Correction Circuit is unique in several ways.
A single external resistor will provide up to 50 times
improvement in the basic RTD linearity. Terminal based
non-linearity can be reduced to less than ±O.1 % for all RTD
temperature spans. The Linearization circuit also contains an
instrnmentation amplifier internally connected to the ±VIN
pins. The gain of this stage is set by l\1N' The output controls
the excitation current sources to produce an increasing
excitation current as VIN increases. An important feature is
that the Linearity Correction is made directly to the RTD
output independent of the gain of the Input Amplifier. This
provides minimal interaction between Rs and Rz . This feature can be useful at the systems level by reducing data
acqnisition system processor overhead previously used to
linearize sensor response in software/firmware.
Z
IREF'!' IREF2
These pins provide a matched pair of current sources for
sensor ""citation. These current sources provide excellent
thermal tracking, and when the linearization feature is used,
are modulated by an equal amount. Their nominal current
value is O.4mA and their compliance voltage is:
V IN+ < VIREP < (Com+ 7V)
V
~=4001JA+~
2RUN
+V IN • -VIN
These are the inputs to both the input amplifier and the
linearization amplifier. Because the IXRlOO has been optimized for RTD applications, the two sets of inputs are
internally connected.
The resistor connected across these terminals determines the
gain of the IXRlOO. For normal 4-20mA outputs:
Rs = _ _ _4..:..;0'--_ _
n
(1)
0.0 16/(AVIN) - 0.016
BURR· BROWN®
I ElEII
Burr-Brown Ie Data Book-Linear Products
C
oa:
0..
PIN DESCRIPTIONS
LINEARIZATION CIRCUIT
~
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5.131
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~
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For Immediate Assistance, Contact Your Local Salesperson
RL1 • RL2
The resistor connected between these tenninals detennines
the gain of the linearization circuit and the amount of
correction applied to the RTD. Its value may be detennined
in several ways. Two of which are shown as follows.
1. Empirically by interactively adjusting ~IN' Rs and Rz to
achieve best fit 4 to 20mA output. Rz is used to set 4mA
at minimum input, R. is adjusted for l2mA with a half
span input, and ~ is adjusted to give 20mA with a full
span input. This may require a few iterations but is
probably the most practical method for field calibration.
~IN will range between 500Q and 1500Q for 100Q
sensors (PtlOO, D100, SAMA). Initially it may seem a
little strange adjusting Rs for 12mA and ~ for 20mA.
However, convergence is achieved much more qnickly as
the linearized curve passes through zero and has less
effect at the mid span and the linearity trim resistor tends
to adjust the transfer function more at the full span than
the mid point.
IXR100
o
(a)
±400~A
2. Using Table I and linear interpolation for values of span
not given in the table. This will yield very accurate results
for the Pt100 sensor and acceptable results for D100 and
SAMA sensors.
IXR100
ZERO ADJUST (OPTIONAL) 0Sl' 0 82, 0 83
The IXR100 has provision for adjusting the output offset
current as shown in Figure 2. In many applications the
already low offset will not need to be known at all. This trim
effects the VII converter stage and does not introduce Vos
drift errors that occur when the trim is performed at the input
stage. If possible use Rz to trim sensor output error to zero
and use the offset control to trim the output to 4mA when
VIN = OV. The offset adjustment can be made with a
adjust range
o
(b)
±40~A
adjust range
FIGURE 2. Basic Connection for Zero Adjust.
SPAN AT ("C)
TABLEI.~
I
T... ("C)
50
100
200
300
400
500
600
700
800
900
1000
-200
-150
-100
-50
573
745
983
1233
653
855
1105
1284
839
1059
1228
1286
995
1158
1251
1262
1083
1197
1249
1236
1131
1206
1231
1208
1152
1205
1207
1180
1159
1196
1182
1152
1159
1175
1156
1125
1154
1151
1129
1097
~
0
50
100
150
1302
1263
1225
1188
1287
1249
1211
1174
1273
1220
1183
1146
1229
1192
1155
1119
1201
1184
1127
1091
1173
1136
1100
1064
1145
1108
1073
1038
1117
1081
1046
1011
~
200
250
300
1137
1101
1066
1031
1110
1074
1039
1005
1083
1048
1013
979
1056
1021
987
954
1030
995
962
926
I--'-
350
1151
1114
1079
1044
400
4SO
SOD
550
1009
975
942
909
996
963
930
897
971
938
905
873
946
913
881
849
600
650
700
750
800
877
865
834
803
773
841
845
814
784
754
-
~
-
1127
1089
1003
969
921
888
NOTES: (1) Linear interpolation between two horizontal
or vertical values yields acceptable values. (2) Althou gh
not optimum, these values will also yield acceptable
results wHh 0100 and SAMA 1000 nominal senso rs.
(3) Double RUN value for PT200.
ValuesforPt100Sensor.
BURR-BROWNe
5.132
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IEiilEiilI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
potentiometer connected as shown in Figures 2a and 2b. The
circuit shown in Figure 2a provides more range while the
circuit in Figure 2b provides better resolution. Note, it is not
recommended to use this adjusting procedure for zero elevation or suppression. See the signal suppression and elevation
section for the proper techniques.
COM
This is the return for the two excitation currents IREFI and
IR£F2 and is the reference point for the inputs.
Vs. lOUT
These are the connections for the current loop Vs being the
most positive connection. For correct operation these pins
should have 11.6 to 36V between them.
the effects of non-uniform fIelds existing in heterogeneous
dielectric material during barrier degradation. In the case of
void non-uniformities, electric fIeld stress begins to ionize
the void region before bridging the entire high voltage
barrier.
The transient conduction of charge during and after the
ionization can be detected externally as a burst of O.01!lSO.l!lS current pulses that repeat on each AC voltage cycle.
The minimum AC barrier voltage that initiates partial discharge is defIned as the "inception voltage". Decreasing the
barrier voltage to a lower level is required before partial
discharge ceases and is defIned as the "extinction voltage".
We have designed and characterized the package to yield an
inception voltage in excess of 2400Vrms so that transient
overvoltages below this level will not cause any damage.
The extinction voltage is above l500Vrms so that even
overvoltage-induced partial discharge will cease once the
barrier voltage is reduced to the rated level. Older high
voltage test methods relied on applying a large enough ~
overvoltage (above rating) to catastrophically break down IX:
marginal parts, but not so high as to damage good ones. Our
new partial discharge testing gives us more confIdence in ~
barrier reliability than breakdown/no breakdown criteria. _ _
o
o
HIGH VOLTAGE TESTING
Burr-Brown Corporation has adopted a partial discharge test
criterion that conforms to the German VDE0884 Optocoupler
Standards. This method requires the measurement of minute
current pulses «5pC) while applying 240Onns, 60Hz highvoltage stress across every devices isolation barrier. No
partial discharge may be initiated to pass this test. This
criterion confIrms transient overvoltage (1.6 X VRATED) protection without damage. Life-test results verify the absence
of failure under continuous rated voltage and maximum
temperature.
This new test method represents the "state-of-the-art" for
nondestructive high voltage reliability testing. It is based on
APPLYING THE IXR100
The IXRlOO has been designed primarily to correct
nonlinearities inherent in RID sensors. It may also be used
in other applications where its excellent performance makes
it superior to other devices available. Examples are shown in
the Applications Section.
(/)0""
:::)
C
0
IX:
Q.
O.4mA
,I ,II
/
Z
o
~
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Optional Input
Fillering
O.4mA
3
~I
~
7
Rs
IXR100
6
CBVPASS
Rz
.ry.
== Transmitter Case
NOTE: (1) R, and R2 should be made equal if used (±1 % resistors are adequate).
FIGURE 3. Transient and RFI Protection Circuit.
Burr-Brown Ie Data Book-Linear Products
5.133
For Immediate Assistance, Contact Your Local Salesperson
RFI AND TRANSIENT SUPPRESSION
INPUT BANDWIDTH LIMITING
Radio frequency interference and transients are a common
occurrence in 4-20mA loops, especially when long wirlDg
leJigths are involved. RFlusually appears as a temporary
change in output and resultS from rectification of the radio
signal by one or more stages in the amplifier. F.or sensors
which are closely coupled to the IXRl00 and are contained
in a common metal housing, the usual entry for RFI is via the
4-20mA loop wiring. Coaxial bypass capacitors may be used
with great effectiveness to bring these leads into the transducer housing while suppressing the RFl. Values of 100 to
l000pF are generally recommended. For sensors remote
from the IXRl00, coaxial capac;:itors can also be used to
filter the excitation and signal leads. Additional low-pass
filtering at the IXRl00 input helps suppress RFl. The easiest
way to do this is with the optional' differential RC filter
shown in Figure 4. Typical values for R, and R2 are 100lO00n, and for C, are l00-I000pF.
Filtering at the input to the 1XR100 is recommended where
possible and can be done as shown in Figure 4. C, connected
to pins 3 and 4 will reduce the bandwidth with a f__
frequency given by:'
Transient suppression for negative voltages can be provided
by the reverse-polarity protection diodes discussed later.
However, positive transients cannot be handled by these
diodes and do frequently occur in field-mounted loops. A
shunt zener diode is of some help, but most zener diodes
suffer from limited current-handling capacity and slow tumon. Both of these characteristics can lead to device failure
before the zener conducts. One type of zener, called the
TRANZORB and available from General Semiconductor
Industries, is especially effective in protecting against highenergy ,transients such as ,those induce9 by lightning or
motor contactors. Choose a TRANZORB with a voltage
rating close to, but exceeding, the maximum Vs which the
IXRl00 will see. In combination, the coaxial bypass capacitors and TRANZORB provide a very high level of protection against' transients and RFl.
t_ = O.159/(R, + R2 + RID + Rz> (C, + 3pF)
This method has the disadvantage of having t3dB vary with
R" R" RTD, and ~ may require large values of R" and R,.
R, and R, should be matched to prevent zero errors due to
input bias current.
SIGNAL SUPPRESSION AND ELEVATION
In some applications it is desired to have suppressed zero
range (span elevation) or elevated zero range (span suppression). This is easily accomplished with the IXRl00 by using
the current sources to create the suppression/elevation voltage. The basic concept is shown in Figure 5. In this example
the sensor voltage is derived from RT (a thermistor, RID or
other variable resistance element) excited by one of the
OAmA current sources. The other current source is used to
create the elevated zero range voltage. Figures 6a, 6b, 6c and
6d show some of the possible circuit variations. These
circuits have the desirable feature of noninteractive span and
suppression/elevation adjustments.
NOTE: Use of the optional offset null (pins 10, 11, and 12)
for elevation or suppressiun is not recommended. This trim
techuique is used only to trim the IXRlOO's output offset
current.
MAJOR POINTS TO CONSIDER
WHEN USING THE IXR100
1. The leads to Rs and l\m should be kept as short as
possible to reduce noise pick-up and parasitic resistance.
If the linearity correction feature is not desired, the RUN
pins are left open.
2. +Vs should be bypassed with a O.OlJ.IF capacitor as close
to the unit as possible (pins 18 to 28).
0.4mA! 0,4mA! R,I')
3. Always keep the input voltages within their range of
linear operation, +2V to +4V (±V'N measured with
respect to pin 5).
7
15 1 - - - - - - - - / - ' ; - -
~
10
5
I-------I---I-+~
1---+----=-'1'----
Rz
o
~
________
~
________________
- 0 +
NOTE: (1) R, and R2 should be made equal if used,
Figure 4. Optional Bandwidth-Limiting Circuitry.
5.134
V,N
Figure 5. Elevation and Suppression Graph.
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~
Or, Call Customer Service at 1·800·548·6132 (USA Only)
!o.4mA
! O.4mA
! 0.4 mA
V ,N
+
! O.4mA
+
v,
A,
e'2
+
e'2
~--- ... "
V,N =(e', -V,)
RT /
----
',':--=+;----'---=---=-=---:-
O.SmA
VIN = (e'2 +V4)
V, = O.4mA X A,
e', =O.4mA X AT
V, = O.4mA X A,
e', = O.4mA X AT
(a) Elevated Zero Aange
(b) Suppressed Zero Aange
o
!o.smA
..... ------- ...
!o.smA
V,N
"" "~e';-~-
+
,/
o,..
VIN
a:
+
~
"V}-I---'.-----L.-
t, V4
"-- _____ --- ---- O.SmA
VIN = (e',-V,)
VIN = (e',+V.,)
V, =O.SmA X A,
v, =O.SmA X A,
(e) Elevated Zero Aange
(d) Suppressed Zero Aange
~
;:)
C
oa:
FIGURE 6. Elevation and Suppression Circuits.
4. The maximum input signal level (.6.VIN) is IV with Rs
open and is less as Rs decreases in value.
5. Always return the current references to COM (pin 5)
through an appropriate value of RCM to keep VeM within
its operating range. Also, operate the current sources
within their rated compliance voltage:
important if the receiving equipment has particularly low
resistance or uses higher voltage supplies. In general, the
series diode is recommended unless 12V operation is
necessary. In either case a IN4148 diode is suitable.
8. Use a layout which minimizes parasitic inductance and
capacilaIlc~, especially in high gain.
VIN + ~ V1REF ~ (Com + 7V)
6. Always choose 1\, (including line resistance) so that the
voltage between pins 18 and 28 (+ Vs) remains within the
l1.6V to 36V range as the output changes between 4mA
and 20mA.
7. It is recommended that a reverse polarity protection diode
be used. This will prevent damage to the IXRlOO caused
by a transient or long-term reverse bias between pins 18
and 28. This diode can be connected in either of the two
positions shown in Figure 7, but each connection has its
trade-off. The series-connected diode will add to the
minimum voltage at which the IXRlOO will operate but
offers loop and device protection against both reverse
connections and transients. The reverse-biased diode in
parallel with the IXRlOO preserves 11.6V minimum
operation and offers device protection, but could allow
excessive current flow in the receiving instrument if the
field leads are accidently reversed. This is particularly
RECOMMENDED HANDLING
PROCEDURES FOR INTEGRATED CIRCUITS
All semiconductor devices are vulnerable, in varying
degrees, to damage from the discharge of electrostatic energy. Such damage can cause performance degradation or
failure, either immediate or latent. As a general practice, we
recommend the following handling procedures to reduce the
risk of electrostatic damage.
1. Remove static-generating materials, such as untreated
plastic, from all areas where microcircuits are handled.
2. Ground all operators, equipment, and work stations.
3. Transport and ship microcircuits, or products incorporating microcircuits, in static-free, shielded containers.
4. Connect together all leads of each device by means of a
conductive material, when the device is not connected
into a circuit.
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c..
z
o
5
o
!a
For Immediate Assistancs, Contact Your Local Salesperson
5. Control relative humidity to as high a value as practical
(50% recommended).
RTD APPLICATIONS
The IXRlOO has been designed with RID applications
specifically in mind. The following information provides
additional information for those applications.
TWO- AND THREE-WIRE CONNECTIONS
The IXRlOO performs well with two-wire and three-wire
RID connections commonly encountered in industrial monitoring and control.
In two-wire applications, the voltage drop between the RTD
and the IXRIOO can be nulled by proper adjustment of Rz'
but care must be taken that this voltage drop does not vary
with ambient conditions. Such variation will appear as an
apparent variation in the RTD resistance and therefore as a
change in measured temperature. Also, the linearity correction will interpret this change as a variation and attempt to
linearize both the actual RTD signal and the resistance
changes in the signal lines. For these reasons, the line
resistance between the RID and the IXRlOO should be
minimized by keeping line lengths short and/or using largegauge wires. This limitation does. not apply for three-wire
connections.
In three-wire applications, shown in Figure 7, the RTD and
lead arrangements set up a pseudo-Kelvin connection to
the RID. This occurs because the currents through the three
wires are set up in opposing directions and cancel IR drops
in the RID leads. The current sources are both modulated
equally, so that use of the linearity correction does not affect
the cancellation. This action is true so long as the three wires
are of the same length and gauge. Because most RID leads
are twisted and bundled, this reqUirement is usually met with
no difficulty. Care must be taken that intermediate connections such as screw terminals do not violate this assumption
by introducing unequal line resistances.
RTD ZERO ELEVATION AND SUPPRESSION
The IXRlOO may be operated in zero-elevated and zerosuppressed ranges by simply offsetting ~. It may also be
used in increase-decrease applications by interchanging the
physical locations of the RTD and ~ as shown in Figure 8.
Use the same values of~, l\'N and Rs' Again, because the
current sources are matched and are modulated equally, this
connection has no effect on IXRlOO performance, especially
in three-wire applications.
OPEN CIRCUIT DETECTION
In some applications of the IXRIOO, the RID will be located
remotely. In these cases, it is possible for open circuits to
develop. The IXRIOO responds in the following manner to
breaks in each lead. The following connections refer to the
RID connections shown in Figure 7.
TERMINAL OPEN
IOUT•
2
32mA
3.6mA
32mA
3
~
'approximate value
0,
o.4mA!
O.4mA!;'N
+
RTD:
'3
1 ________ .. _________ _
Three-wire Connection
FIGURE 7. Basic 3-Wire RID Connection for Increase-Increase Action.
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O.4mA!
O.4mA!
0,
!
\
-
V,N
Rs
IXR100
6
1
Rz
RTO:
o
2
--------------------Three-wire Connection
:3
RCM = 3.9kn
o
'I"'"
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FIGURE 8. Basic 3-Wire RTD Connection for Increase-Decrease Action.
OTHER APPLICATIONS
From Equation (I), Rs = 48.S0. Span adjustment (calibration) is accomplished by trimming Rs.
In instances where the linearization capability of the IXR100
is not required, it can still provide improved performance in
several applications. Its small size, wide compliance voltage, low zero and span drift, high PSRR, high CMRR and
excellent linearity makes the IXRlOO ideal for a variety of
other isolated two-wire transmitter applications. It can be
used by OEMs producing different types of isolated transducer transmitter modules and by data acquisition systems
manufacturers who gather transducer data. Current mode
transmission greatly reduces noise interference. The twowiT" nHhlr" of the device allows economical signal conditioning at the transducer. Thus, the IXRlOO is, -in general,
very suitable for a wide variety of applications. Some
examples, including an isolated non-linearized Pt100 case
follow.
'
In order to make the lower range limit of 2SoC correspond
to the output lower range limit at 4mA, the input circuitry
shown in Figure 9 is used. VIN must be OV at 2S0C and R
is chosen to be equal to the RTD resistance at 25°C, o~
109.730. Computing RCM and checking CMV:
At +2SoC, V IN+
=43.9mV
Since both V IN+ and Vz are small relative to the desired 2V
common-mode voltage, they may be ignored in computing
ReM as long as the Cr-.1V is met.
V IN+ min = 3V + 0.0439V
V IN+ max = 3V + 0.0629V
EXAMPLE 2
Given a process with temperature limits of +25°C and
+150°C, configure the IXRlOO to measure the temperature
with a Pt100 RID which produces 109.730 at 25°C and
157.310 at 150°C (obtained from standard RID tables).
Transmit 4mA for +25°C and 20mA for +lSO°C. The
change in resistance of the RTD is 47.60. When excited
with a 0.4mA current source l'>.VJN is OAmA X 47.60 =
19mV.
Thermocouple shown in Figure 10.
40
0
R s - 0.016/(l'>.VJN) - 0.016
(1)
Given a process with temperature (T,) limits of O°C and
+ 1000°C, configure the IXR100 to measure the temperature
with a Type J thermocouple that produces a 58mV change
for lOOO°C change. Use a semiconductor diode for a cold
junction compensation to make the measurement relative to
O°C. This is accomplished by supplying a compensating
voltage, equal to that normally produced by the thermocouple with its "cold junction" (T2) at ambient. At +2SoC
this is 1.28mV (from thermocouple tables with reference
junction at O°C). Typically, at T2 = +25°C, V D = 0.6V and
Burr-Brown Ie Data Book-Linear Products
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RCM = 3V/0.8mA = 3.7SkO
V ,N_ = 3V + 0.0439V
EXAMPLE 1
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At +ISO°C, VIN+ = 62.9mV
PtlOO RID without linearization shown in Figure 9.
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5.137
For Immediate Assistance, Contact Your Local Salesperson
fNJAT = -2mV/oC. R, imd R. fonn a voltage divider for
the diode voltage Vo' The divider values are selected so that
the gradient AVJAT equals the gradient of the thennocouple
at the reference temperature. At +25°C this is approximately
-52I1V/oC (obtained from standard thennocouple table);
therefore,
AVrrfAT = (t.VJt.T)(R/(Rs + R6»
(2)
-52I1V/oC = (-2000I1VfOC)(R/(Rs+R6»
Rs is chosen as 3.74kQ to be much larger than the resistance
of the diode. Solving for R6 yields 1000.
Transmit 4mA for T, = O°C and 20mA for T, = + lOOO°C.
Note: VIN = VIN. - VIN- indicates that T, is relative to T2• The
input full scale span is 58mV. R,. is found from Equation (1)
and equals 153.90.
R. is chosen to make the output 4mA at TTC = O°C (YTC =
1.28mV) and To = 25°C (Yo 0.6V).
=
VTC will be. -1.28mV when TTC = O°C and the reference
junction is at +2S°C. V. must be computed for To = +25°C
to make VIN =OV.
VD(2S"C)
=600mV
V IN(2S C) = 600mV (100/3740) = 16.OmV
0
VIN = VIN• - VIN_ = VTC + V4 - VIN_
With VIN = 0 and VTC = -1.28mV,
V. = V IN•
-
VTC
V. = 16.OmV - (-1.28mV)
0.4mA (R.) = 17.28mV
R.
=43.20
THERMOCOUPLE BURN-OUT INDICATION
In process control applications it is desirable to detect when
a thennocouple has burned out. This is typically done by
forcing the two-wire transmitter current to the upper or
lower limit when the thennocouple impedance goes very
high. The circuits of Figures 10, 11 and 12 inherently have
down scale indication. When the impedance of the thennocouple gets very large (open) the bias current flowing into
the + input (large impedance) will cause 10 to go to its lower
range limit value (about 3.6mA). If up scale indication is
desired, the circuit of Figure 13 should be used. When the Tc
opens, the output will go to its upper range limit value (about
32mA or higher).
3
O.4mA
O.4mA
! !
!
\
VIN
•
Rz
0,
7
Rs
IXR100
Vour
6
"7
RTO
ReM
FIGURE 9. Ptl00 RID Without Linearization.
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!o.4mA
1N414B
-.----------.--.
, •I
+
: :
V1N-
·.
··:, :.,
::
·: .:
Thermocouple
TTC
6
: :
-
·
::
"
,
::
_~~~~~r~~~r~_~~ __
•,
L - - - - f - < ) 'OUT
+
+ ::
VTC
+ V4
o
-
R.
43.20
o
,...
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3.9kn
i I_________________________~~~~~~~t~~~~_~~~
~
____________ ____________ _
FIGURE 10. Thermocouple Input Circuit with Two Temperature Regions and Diode (D) Cold Junction Compensation.
en
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This circuH has down
scale bum-out indication.
0
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C
D,
TypeJ
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VOUT
~
6
..J
0
-'-
-=-
~
3.9kn
FIGURE 11. Thermocouple Input with Diode Cold Junction Compensation and Down Scale Burn-out Indication.
Burr-Brown Ie Data Book-Linear Products
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~ O.4mA
This circuit has down
scale burn-out Indication.
~ O.4mA
3
D,
TypeJ
7
510
Rs
"-Zero
IXR100
6
Adjusl
2
3.9kO
FIGURE 12. Thermocouple Input with RTD Cold Junction Compensation and Down Scale Burn-out Indication.
I
IO.4mA
+
This circuit has up
scale burn-out indication.
O.4mA+
D,
7
500
"-Zero
Adjust
Rs
IXR100
Your
6
Zero
FIGURE 13. Thermocouple Input with RID Cold Junction Compensation and Up Scale Bum-out Indication.
FIGURE 14. Isolated 4-20mA Instmment Loop.
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+~o-.------------.
IXR100
4000
R,
3
10
0-20mA
I
t
NOTE: (I) Other conversions are readily achievable by changing the
R,. R2 • and R3 ratios (see Burr-Brown Application Bulietin AB-031).
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F1GURE 15. 4-2OmA to 0-20mA Output Converter.
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BURR~BROWN@
• Ea Ea' Burr-Brown Ie Data Book-Linear Products
5.141
For Immediate Assistance, Contact YourLocal Salesperson
BURR-BROWN®
PWS725A
PWS726A
IE5IE5II
Isolated, Unregulated
DC/DC CONVERTERS
FEATURES
• ISOLATED ±7 TO ±18VDC OUTPUT FROM
SINGLE 7 TO 18VDC SUPPLY
• PROTECTED AGAINST OUTPUT FAULTS
• COMPACT
• ±15mA OUTPUT AT RATED VOLTAGE
ACCURACY
• LOW COST
• EASY TO APPLY-FEW EXTERNAL PARTS
• HIGH ISOLATION VOLTAGE
PWS725A,1500Vrms
PWS726A, 3500Vrms
APPLICATIONS
• LOW LEAKAGE CAPACITANCE: 9pF
• MEDICAL EQUIPMENT
• INDUSTRIAL PROCESS EQUIPMENT
• LOW LEAKAGE CURRENT: 2J.LA max,
at 240VAC 50/60Hz
• TEST EQUIPMENT
• HIGH RELIABILITY DESIGN
• DATA ACQUISITION
• AVAILABLE WITH OUTPUT
SYNCHRONIZATION SIGNAL FOR USE
WITH IS0120 AND IS0121
DESCRIPTION
The PWS725A and PWS726A convert a single 7 to
18VDC input to bipolar voltages of the same value as
the input voltage. The converters are capable of
providing ±15mA at rated voltage accuracy and up to
±40mA without damage. (See Output Current Rating.)
oscillator before either MOSFET driver turns on,
protects the switches, and eliminates high inrush currents during tnrn-on. Input current sensing protects
both the converter and the load from possible thennal
damage during a fault condition.
The PWS725A and PWS726A converters provide
reliable, engineered solutions where isolated power is
required in critical applications. The high isolation
voltage rating is achieved through use of a speciallydesigned transfonner and physical spacing. An additional high dielectric-strength, low leakage transfonner
coating increases the isolation rating of the PWS726A.
Special design features make these converters
especially easy to apply. The compact size allows
dense circuit layout while maintaining critical isolation requirements. The Input Sync connection allows
frequency synchronization of multiple converters. The
Output Sync is available to synchronize ISOl20 and
ISOl21 isolation amplifiers. The Enable input allows
control over output power in instances where
shutdown is desired to conserve power, such as in
battery-powered equipment, or where sequencing of
power tnrn-onltnrn-off is desired.
Reliability and perfonnance are designed in. The
bifilar wound, wirebonded transfonner simultaneously
provides lower output ripple than competing designs,
and a higher perfonnance/cost ratio. The soft-start
oscillator/driver design assures full operation of the
Inlornational Airport industrial Park • Mailing Add.....: PO Box 11400 • Tucs.., AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
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PDS-736D
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SPECIFICATIONS
ELECTRICAL
TA = +25°C, C, = I)1F ceramic, Y'N = 15VDC, operating frequency = 800kHz, VO\IT = ±15VDC, CIN = I)1F ceramic, lOUT = ±15mA, unless otherwise specified.
PWS725A
PARAMETER
CONDITIONS
INPUT
Rated Voltage
Input Voltage Range
Input Current
Input Current Ripple
MIN
MIN
TYP
MAX
UNITS
18
·
·
·
·
VDC
VDC
mA
mAp-p
mAp-p
mAp-p
77
150
5
60
Input to Output, 10 seconds
Input to Output, 60 seconds, min
Input to Output, Continuous, AC 60Hz
Input to Output, Continuous DC
Input to Output
Input 10 Output, 240Vrms, 60Hz
Rated Voltage
Isolation Impedance
Leakage Current
OUTPUT
Rated Output VoHage
Output Current
4000
1500
10"119
1.2
Balanced Loads
Single-Ended
Balanced Loads, ±10mA < lOUT < ±40mA
No External Capacitor
Lo = 10)1H, Co = 1)1F (Figure 1)
Lo = O)1H, Co Filter Only
Lo = 10"H, Co = ll1F
Lo = 100"H, C Finer
C Finer Only
Output Switching Noise
Output Capacitive Load
Voltage Balance, V+, VSensHivity to /;.Y'N
Output Voltage Temp. Coefficient
Output Sync Signal
·
0.04
1.15
10
30
+85
+85
+125
VDC
mA
mA
%/mA
mVp-p
mVp-p
·
··
·
DIP
MODEL
NC
Output Ground
"F
)1F
%
VN
mVI"C
Vp·p
°C
°C
°C
CD
N
t::
S 14
~ ~ -3
i
0
-4
-5
/
/
'"
\
\
I\.
/
i"
I
I
I
±15
±30
±45
-5
-50
o
50
85
100
Temperature (0C)
5.144
Burr-Brown Ie Data Book-Linear Products
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TYPICAL PERFORMANCE CURVES (CONn
TA
= +25°C, Vee =±15VDC unless otherwise noted.
SYNC FREQUENCY vs
INPUT CURRENT AND OUTPUT VOLTAGE
~
CD
90
15
fil'
'"
g
80
:;
S 14
70
1
i
()
"
0
~
.s
60
400
800
1600
1200
SYNC Frequency (kHz)
(Optional External Control)
THEORY OF OPERATION
The PWS725A and the PWS726A DCIDC converters consist of a free-running oscillator, control and switch driver
circuitry, MOSFET switches, a transformer, a bridge rectifier, and filter capacitors together in a 32-pin DIP (0.900
inches nominal) package. The control circuitry consists of
current limiting, soft start, frequency adjust, enable, and
synchronization features. See Figure 1. In instances where
several converters are used in a system, beat frequencies
developed between the converters are a potential source of
low frequency noise in the supply and ground paths. This
noise may couple into signal paths. See Figures 2 and 3 for
connection of INPUT SYNC pin. Converters can be syn-
withll
chronized and these beat frequencies avoided. The unit
the highest natural frequency will determine the synchronized running frequency. To avoid excess stray capacitance, the INPUT SYNC pin should not be loaded with
more than 5OpF. H unused, the INPUT SYNC must be left
open.
Soft start circuitry protects the MOSFET switches during
start up. This is accomplished by holding the gate-to-source
voltage of both MOSFET switches low until the freerunning oscillator is fully operational. In addition to that
soft start circuitry, input current sensing also protects the
MOSFET switches. This current limiting keeps the FET
'N
FIGURE I. PWS72SAI726A Functional Diagram.
BURRRBROWN®
Burr-Brown
Ie Data Book-Linear Products
Z
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fi
~
NOTES: (1) Frequency Adjust is optional, with pins 19 and 20 left open. The normal switching frequency is 800kHz.
(2) Leave INPUT SYNC pin open if unused; limit stray capacitance on INPUT SYNC pin to less than 50pF.
(3) Leave ENABLE pin open or connect to V'N if not used.
(4) Optional oulputfiltering, wtth La =0, limtt Co" I~F, with La = 100~H, limit Co" 10~F, see Performance
Curves for La = O.
(5) Optional input filtering, see Performance Curves for LIN = O.
(6) CAUTION: Do not connect pin 29 to low impedance loads. See Figure 5.
IElElI
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29
(5)
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-I
OUTPUT SYNC
L
~
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C
5.145
ForlmmediateAssistance, Contact YourLocal Salesperson
+7Vto +18 V
MC1472
or Equivalenl
Peripheral
+5V
DriVe\
16
Master
PWS725A
1
15
Slave
PWS725A1726A
15
-Vee
PWS725AJ726A
16
15
16
Keep Connection
Short
NOTE: (1) Unils 10 be synchronized
should have a lower free-running
frequency than the master unit.
Grounding Frequency Adjust (pin 19)
will shift the free-running frequency
to approximately 400kHz.
To Other
PWS725N726A .
Converters
FIGURE 2. Synchronization of Multiple PWS725As or
PWS726As from a Master Converter.
switches operating in their safe operating area under fault
conditions or excessive loads. When either of these conditions occur, the peak input current exceeds a safe limit. The
result is an approximate 5% duty cycle, 3001JS drive period
to the MOSFET switches. This protects the internal MOSFET
switches as well as the external load from any thermal
damage. When the fault or excessive load is removed, the
converter resumes normal operation. A delay period of
approximately 50IJS incorporated in the current sensing
circuitry allows the output filter capacitors to fully charge
after a fault is removed. This delay period corresponds to a
filter capacitance of no more than IIJF at either of the output
pins. This provides full protection of the MOSFET switches
and also sufficiently filters the output ripple voltage (see
specification table). The current sensing circuitry is designed to provide thermal protection for the MOSFET
switches over the operating temperature range as well. The
low thermal resistance for the package (file = lOOCIW)
ensures safe operation under rated conditions. When these
rated conditions are exceeded, the unit will go into its
shutdown mode.
An optional potentiometer can be connected between the
two FREQUENCY ADJUST pins to trim the oscillator
operating frequency ±10% (see Figure 4). Care should be
taken when trimming the frequency near the low frequency
range. If the frequency is trimmed too low, the peak inductive currents in the primary will trip the' input current
sensing circuitry to protect the MOSFET switches from
these peak inductive currents.'
The ENABLE pin allows external control of output power.
When this pin is pulled low, output power is disabled. Logic
thresholds are TTL compatible. When not used, the Enable
input may be left open or tied to V IN (pin 16).
NOTES: (1) Units to be synchronized
should have a lower free-running
frequency Ihan the TTL signal.
Grounding Frequency Adjust (Pin 19)
will shift the free-running frequency
to approximately 400kHz. (2) The TTL
SYNC signal can have a frequency
range of 450kHz to 1,5MHz,
PWS725N726A
16
To Other
PWS725N726A
Converters
FIGURE 3. Synchronization of Multiple PWS725As or
PWS726As from an External TTL Signal.
PWS725AJ726A
Monitor frequency with scope
or frequency counter (use
low C probe).
15
+ _ Frequency
r-
(1)
Increase
~E
+4VBE
'--v---'
1.25~s
Nominal
SYNC Signal
NOTE: (1) For noniinal800kHz operation, leave
pins 19 and 20 open.
FIGURE 4. Frequency Adjustment Procedure.
OUTPUT CURRENT RATING
The. total current which can be drawn from the PWS725A
or PWS726A is a function of total power being drawn from
both outputs (see Functional Diagram). If one output is not
used, then maximum current can be drawn from the other
output. If both outputs are loaded, the total current must be
limited such that:
IIL+I + IIel :s; SOmA
It should be noted that many analog circuit functions do not
simultaneously draw full rated current from both the positive and negatives supplies. For example, an operational
amplifier may draw 13mA from the positive supply under
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full load while drawing only 3mA from the negative supply.
Under these conditions, the PWS72SAJ726A could supply
power for up to five devices (80mA + 16mA z 5). Thus, the
PWS72SAJ726A can power more circuits than is at fl.rst
apparent.
OUTPUT SYNC SIGNAL
To allow synchronization of an IS0120 or IS0121 isolation
amplifier, the PWS725A and PWS726A have an OUTPUT
SYNC signal at pin 29. It should be connected as shown in
Figure 5 to keep capacitive loading of pin 29 to a minimum.
If output sync is not used, leave pin open.
ISOLATION VOLTAGE RATINGS
Because a long-term test is impractical in a manufacturing
situation, the generally accepted practice is to perform a
production test at a higher voltage for some shorter period of
time. The relationship between actual test conditions and the
continuous derated maximum specification is an important
one. Burr-Brown has chosen a deliberately conservative
one: VDCTEST =(2 X VACrms CONTINUOUS RATING) + lOOOV for
ten seconds. This choice is appropriate for conditions where
system transient voltages are not well defined. (I) Where the
real voltages are well-defined or where the isolation voltage
is not continuous, the user may choose a less conservative
derating to establish a specification from the test voltage.
t
PWS725A1726A
29
ExtOsc
.2~'f
-VVv
1
20PF
-::-
Connection
of
IS0120
or
IS0121
FIGURE 5. Synchronization with IS0120 or IS0121 Isolation Amplifier.
NOTE: (1) Reference National Electrical Manufacturers Association (NEMA)
Standards Parts ICS 1-109 and ICS 1-111.
•
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'151151'
BURR·BROWN®
Burr-Brown Ie Data Book-Linear Products
5.147
For Immediate Assistance, Contact Your Local Salesperson
BURR-BROWN@
PWS740
IElElI
Distributed Multichannel Isolated
DC-TO-DC CONVERTER
FEATURES
APPLICATIONS
• ISOLATED ±7 TO ±20VDC OUTPUTS
• INDUSTRIAL MEASUREMENT AND
CONTROL
• BARRIER 100% TESTED AT 1500VAC, 60Hz
• LOWEST POSSIBLE COST PER CHANNEL
• DATA ACQUISITION SYSTEMS
• TEST EQUIPMENT
• MINIMUM PC BOARD SPACE
.80% EFFICIENCY (8 CHANNELS, RATED
LOADS)
The PWS740-1 is a high-frequency (400kHz nominal)
oscillator/driver, handling up to eight channels. This
part is a hybrid containing an oscillator and two power
FETs. It is supplied in a TO-3 case to provide the
power dissipation necessary at full load. Transformer
impedance limits the maximum input current to about
700mA at l5V input, well within the unit's thermal
limits. A TTL-compatible ENABLE pin provides output shut-down if desired. A SYNC pin allows synchronization of several PWS740-1s.
• FLEXIBLE USE WITH PWS745
COMPONENTS
DESCRIPTION
The PWS740 is a multichannel, isolated DC-to-DC
converter with a l500VAC continuous isolation rating. The outputs track the input voltage to the converter over the range of 7 to 20VDC. The converter's
modular design, comprising three components, minimizes the cost of isolated multichannel power for the
user.
The PWS740-2 is a trifilar-wound isolation transformer using a ferrite core and is encapsulated in a
plastic package, allowing a higher isolation voltage
rating. The PWS740-3 is a high-speed rectifier bridge
in a plastic 8-pin mini-DIP package. One PWS740-2
and one PWS740-3 are used per isolated channel.
-Va
Gnd1
Functional Diagram
-Va
+Vo
Gnd2
+Vo
PWS740·3
v+
PWS740·2
PWS740·1
~I--~--+----+---+---+--------~--~--~--~
r+.r2y-OpyH-y'-__--+__-+____________-+__
O.3~F
4=-
O.3~F
4=-
~--VDRrvE} 6u~:e
L-__~-=~~~----~~~~~~~~-~
'Optional features; nunused, leave open.
Channels
*. User Option
International Airport Industrial Park • Mailing Address: PO Box 11400
Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602) 746-1111 • Twx: 911J.952-1111 • Coble: BBRCORP • TeIax: 066-6491 • FAX: (602)889-1510 • Immediate Product Info: (900)548-8132
5.148
PDS-758F
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
v,. = 15V, output load on each of 8 channels = ±15mA, T, = +25"C unless otherwise specified.
r"""m"",,,n
,",u.. "",un
MIN
Continuous, AC, 50/60Hz
Continuous, DC
10s, minimum
Measured from Pin 2 to Pin 5 of the PWS740-2
24OVACrms, 60Hz Per Channel
4000
TYP
MAX
UNITS
1500
2121
VACrms
VDC
VACrms
GllpF
PWS740 SYSTEM
ISOLATION
Rated Voltage
Test Voltage
Impedance
leakage Current
tNPUT
Rated Voltage
Voltage Range
Current
10"113
0.5
1.5
15
7
±30mA Output load on 8 Channels, V,. = 15V
Rated Output load on 8 Channels, V~ = 15V
Full Output load on 8 Channels, V,. = 15V with" Filter on Input
Current Ripple
OUTPUT
Rated Voltage
Voltage at Min load
Voltage Range
Vour vs Temp
load Regulation
Tracking Regulation
Ripple Voltage
Noise Voltage
Current I +I~", I + I -lOUT I
± 15mA Output load on 8 Channels
±1 mA/Channel
±15mA Output load on Each Channel
±15mA Output load on Each Channel
±3mA < Output load < ±30mA
14
15
30
±7
""'
VDC
VDC
rnA
520
300
1
mA
mA
16
±20
±0.05
0.25
1.2
Va.!"'N
See Typical Performance Curves
See Theory of Operation
Each Channel
TEMPERATURE
Specification
Operation
20
VDC
VDC
VDC
vrc
V/mA
VN
60
mA
-25
-25
+85
+85
"C
"C
350
7
2
0
470
20
Vs
0.8
kHz
V
V
V
PWS740-10SCIlLAT'
Frequency
Supply
Enable
V~=
15V
Drivers On
Drivers Off
400
15
Rated Isolation Voltage
Isolation Impedance
Isolation leakage
Primary Inductance
Winding Ratio
10s, minimum
60s, minimum
Continuous
4000
1500
1500
240VAC
400kHz, Pin 1 to Pin 5
PrimarylSecondary
10"113
0.5
300
68176
'F= 'R:o:: 50mA
40
1.5
VACrms
VACrms
VACrrns
GllpF
""'
"H
PWS740-3 DIODE BRIDGE
Reverse Recovery
Reverse Breakdown
Reverse Current
Forward Voltage
IA= 100,,",
VA =40V
'F= 100mA
ns
V
55
1.5
1.6
""'
V
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specijications are subject to change
without notice. No patent rights or licenses to any olthe circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices andior systems.
BURR-BROWN®
I EiI Eill
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3:
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I-
0
::l
C
0
PWS74O-.2ISOLATION·
Isolation Test Voltage
0
Burr-Brown Ie Data Book-Linear Products
5.149
II:
Q.
Z
0
~
-I
0
~
For Immediate Assistallce, Contact Your Local Salesperson
PIN CONFIGURATION
TO-3
PlasUc Mini-DIP
PlasUcDIP
AC
Gnd
AC
(J)-
®
To
®
®
.®
VD
@
To
V- 1
8 NC
PWS740-3
V+ 4
PWS740-2
To
(Drawings NOt to Scale)
PACKAGE INFORMATION(l)
MODEL
PWS740-1 Driver
PWS740-2 Transformer
PWS740-3 Rectifier
PACKAGE
PACKAGE DRAWING
NUMBER
TO-3
S-Pln Plastic DIP
8-Pin Plastic DIP
030
216
006
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown Ie Data Book.
IURR-BROWNIBI
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TYPICAL PERFORMANCE CURVES
LINE REGULATION
1 THROUGH 8 CHANNELS
VRIPPLE VS CLOAD
25
f
>
g
~
..
\
10
ii:
>
_ - f------
--
~
--
5
0
o
±Io = ±15mAlChannel
10 =±15mAlChannel ~
_S
15
1
.1
V,N = 15V
I
20
25
0.4
0.2
--
0.6
CcOAD
(~F)
20
~
15
!5
----
-
-fj
+I
----
10
5
0
0.8
1.0
0
5
10
EFFICIENCY vs LOAD 1,4. AND 8 CHANNELS
l
60
a, ;bannels
"
40
/
is'
.~
IE
w
~ t:::=-:::
-
20
0
o
4 Channels
~
~
~
-....:::
25
~
•
1 Channel-,
_f..---"'"
VIN=t 5V
-10
5
20
OUTPUT VOLTAGE DRIFT
o
100
80
15
V,N(V)
10
15
20
25
o
-25
30
+25
+50
+85
Temperature (OC)
±loUT (mA)
LOAD REGULATION 1. 4 AND 8 CHANNELS
FREQUENCY ADJUSTMENT RANGE
20 .---~--"'--...,..--r---'-----.
Iis'
~
15
I
>8
500
400
/
'"
.5
1ii
to 200
+I
V-
/
300
8"
10
See Functional Diagram
5
0
5
10
15
20
25
30
±Iour (mA)
BURR-BROWN®
IEilEilI
Burr-BrownIe Data Book~Linear Products
10
100
J
I
lk
10k
lOOk
Frequency Adjustment Resistor (0)
5.151
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ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause daruage ranging from performance degradation to complete device failure. BurrBrown Corporation recommends that all integrated circuits
be handled and stored using appropriate ESD protection
methods.
PIN DESCRIPTIONS OF
PWS740-1 DRIVER
+VIN' RETURN, AND GND
These are the power supply pins. The ground connection,
RETURN, for the N-chauneIMOSFET sources is brought
out separately from the ground counection for the oscillatorl
driver chip. The waveform of the FETs' ground return
current (and also the current in the VDRIVE line) is an 800kHz
sawtooth. A capacitor between +VIN and the FET ground
provides a bypass for the AC portion of this current.
The power should never be instantaneously interrupted to
the PWS740 system (i.e., a break in the line from V+, either
accidental or by means of a series switch). Normal powerdown of the V+ supply is not considered instantaneous.
Should a rapid break in input power occur, however, the
transformers' voltage will rapidly increase to maintain current flow. Such a voltage spike may daruage the PWS740-1.
The bypass capacitors at the +VIN pin of the PWS740-1 and
the VDRIVE pins of the transformers provide a path for the
primary current if power is interrupted; however, total protection requires some type ofbidirectionallA voltage claruping at the +VIN pin. A low cost SA20A TransZorb® from
General Semiconductor' ) or equivalent, which will clarup
the +VIN pin between -O.6V and +23V, is recommended.
To ANDro
These pins are the drains of the N-chaunel MOSFET switches
which drive all the transformer primaries in parallel. The
signals on these pins are 400kHz complementary square
waves with twice the aruplitude of the voltage at +VIN' It is
these lines that allow the power to be distributed to the
individual high voltage isolation transformers. Without proper
printed circuit board layout techniques, these lines could
generate interference to analog circuits. See the next section
on PCB layout.
SYNCHRONIZATION
The SYNC pin is used to synchronize up to eight PWS740I oscillators. Synchronization is useful to prevent beat frequencies in the supply voltages. The SYNC pins of two or
more PWS740-ls' are tied together to force all units to the
sarue frequency of oscillation. The resultant frequency is
slightly higher than that of the highest unsynchronized unit.
If this feature is not required, leave the SYNC pin open. The
SYNC pin is sensitive to capacitance loading. ISOpF or less
is recommended. Also external parasitic capacitive feedback
between either To and the SYNC pin can cause unstable
operation (commonly seen as jitter in the To outputs). Keep
SYNC connections and To lines as physically isolated as
possible. Avoid shorting the SYNC pin directly to ground or
supply potentials; otherwise, daruage may result.
Figure I shows a method for synchronizing a greater number
of PWS740-1 drivers. One unit is chosen as the master. Its
synchronization sigual, buffered by a high-speed unity gain
aruplifier can synchronize up to 20 slave units. Pin I of each
slave unit must be grounded to assure synchronization.
Minimize capacitive coupling between the buffered sync
line and the outputs of the drivers, especially at the end of
long lines. Capacitance to ground is not critical, but total
stray capacitance between the sync line and switching outputs should be kept below SOpF. Where extreme line lengths
are needed, such as between printed circnit boards, additional OPA633 buffers may be added to keep drive impedance at an acceptably low value. Because of temperatureinfluenced shifts in the switching levels, best operation of
this circuit will occur when differences in arubient temperatures between the PWS740-1 drivers are minimized, typically within a 35°C range.
8 Channels
r----------------------
-11200ns
400kHz
4
Slave
740-1
2
#1
6
8 Channels
ENABLE
A high TTL logic level on this pin activates the MOSFET
driver circuitry. A low TTL level applied to the ENABLE
pin shuts down all drive to the transformers and the output
voltages go to zero (only the oscillator is unaffected). For
continuous operation, the ENABLE pin can be left open or
tied to a voltage between +2V and +V.
-i1L~~:::lgV~~~_jl-=:'-----------8-~hannels
(I) General Semiconductor Indnstries Inc., 2001 W. 10th Place, Tempe P;z 85281,
602-%8-3101.
TransZorb· General Semiconductor Industries Inc.
FIGURE I. MasterlSlave Synchronization of Multiple
PWS740 Drivers.
BURR-BROWNiII
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+V,N (7-20V)
+5V
3300
lW
-.-_=;
L -_ _ _ _ _ _ _--;-_ _ _ _
8
4.0V(2)
11/
2.5V-
TTL Sync (1)
(MC1472or
Equivalent)
~<,--J
-11-
Peripheral
Driver
PWS74o-1
I""
6200
200ns
t
1I8W
4
-:-
PWS740-1
+
1000
NOTES: (1) See text for frequency range; duty cycle = 5-75%. (2) Typical waveform at 25°C. Active
pull-up initiates synchronization; pulse width is set by PWS740 pull-down characteristics and is not
affected by frequency of operation.
Other
PWS740s
FIGURE 2. External Synchronization of Multiple PWS740 Drivers with TIL-Level Signals.
If larger temperature gradients are likely to occur, the user
may wish to consider the synchronization method shown in
Figure 2. This circuit is driven from an external TILcompatible source such as a system clock or a simple freerunning oscillator constructed of TIL gates. The output
stage provides temperature compensation over the rated
temperature range of the PWS740. The signal source frequency should be about 800kHz for rated performance, but
may range from 500kHz to 2MHz with slightly reduced
performance. Precautions with regard to circuit coupling and
layout are the same as for the circuit of Figure 1. Repeaters
using the OPA633 may be used for long line lengths.
Symmetry and good high-frequency layout practice are
important in successful application of both of these synchronization techniques.
FREQUENCY ADJUSTMENT
The FREQ ADJ pin may be connected to an external
potentiometer to lower an unsynchronized PWS740-1 oscillator frequency. This may be useful if the frequency of the
PWS740-l is too close to some other signal's frequency in
the system and beat interference is possible. See Typical
Performance Curves. Use of this pin is not usually required;
if not used, leave open for rated performance.
THEORY OF OPERATION
EXTERNAL FILTER COMPONENTS
Filter components are necessary to reduce the input ripple
current and the output voltage noise_ Without any input
filtering, the sawtooth currents in the FET switches would
flow in the +V supply line. Since this AC current can be as
great as lA peak, voltage interference with other components using this supply line would likely occur. The input
ripple current can be reduced to approximately lrnA peak
(2) Pulse Engineering. PO Box 12235. San Diego CA 92112, 619-268-2400.
Other
PWS740s
th_
with the addition of two components-a bypass capacitor
between the +VIN pin and ground, and a series inductor in
VDRIVE line. A 1O~ tantalum capacitor is adequate fo
bypass. A parallel 0.33~ ceramic capacitor will extend th
bandwidth of the tantalum. Additional bypass capacitors at
each primary center-tap of the transformers are recommended. In general, the higher the capacitance, the lower the
ripple, but the parasitic series inductance of the bypass
capacitors will eventually be the limiting factor. The inductor value recommended is approximately 20(.IH. Greater
reduction in ripple current is achieved with values up to
lOO(.IH; then physical size may become a concern. The
inductor should be rated for at least 2A and its DC resistance
should be less than O.IQ. An example of a low cost indicator
is part number 51591 from Pulse Engineering(2).
Output voltage filtering is achieved with a 0.33~ capacitor
connecting each VOUT pin of the diode bridge to ground.
Short leads and close placement of the capacitors to the unit
provide optimum high frequency bypassing. The 800kHz
output ripple should be below 5mVp-p. Higher frequency
noise bursts are also present at the outputs. They coincide
with the switch times and are approximately 20mV in amplitude. Inductance of 1O(.IH or less in series with the output
loads will significantly reduce the noise as seen by the loads.
PC BOARD LAYOUT CONSIDERATIONS
Multilayer printed circuit boards are recommended for
PWS740 systems. Two-layer boards are certaiuly possible
with satisfactory operation; however, three layers provide
greater density and better control of interference from the
FET switch signals. Should four-layer boards be reqnired for
other circuitry, the use of separate layers for power and
ground planes, a layer for switching signals, and a layer for
analog signals would allow the most straightforward layout
for the PWS740 system. The following discussion pertains
to a tbree- or four-layer board layout.
BURR-BROWN@
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5.153
~
::::»
c
oa:
Il.
Z
o
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+
VORIVE
PWS740-2
-:-
-:-
PWS74D-l
+15V(11 __- - - . . , .
-15Vi'1------+---1o
Gndl
Switch Power to
Other 7 Channels
System Uses:
1 OsciliatorlDriver
8 Transformers
13
2
8 Bridges
Isolation
Amplifier
ISOI02(3)
MPCSS
Multiplexer 8
16
Aa
Ao
81S0102s
1 Multiplexer
Not all components are shown.
VauT
~GND
Offset
NOTES: (I) Supplies ±15mA of isolated supply current par channel.
(2) WestCap DKM-IO or equivalent. (3) Or IS0120 or 180122.
FIGURE 3. Low Cost Eight-Channel Isolation Amplifier Block with Channel-to-Channel Isolation.
Critical consideration should go to minimizing electromagnetic radiation from the switching signal's lines. To and To.
You can identify the path of the switching current by starting
at the +VIN pin. The dynamic component of the current is
supplied primarily from the bypass capacitor. The high
frequency current flows through the inductor and down the
V DRIVE line, through one side of the transformer windings,
returning in the To with the "on" PET switch, and then back
up through the bypass capacitor. This current path defines a
loop antenna which transmits magnetic ~nergy. The magnetic field lines reinforce at the center of the loop, while the
field lines reinforce at the center of the loop, while the field
lines from opposite points of the loop oppose each other
outside the loop. Cancellation of magnetic radiation occurs
when the loop is collapsed to two tightly spaced parallel line
segments, each carrying the same current in opposite directions: For this reason, the printed circuit traces for both To
connections should lay directly over a power plane forming
the VDRIVE connecti~n. This plane need not extend much
wider than To and To. All of the current in the plane will
flow. directly under the To traces because this is the path of
least inductance (and least radiation).
Another potential problem with the To lines is electric field
radiation. Fortunately, the VDRIVE plane is effective at terminating most of the field lines because of its proximity to
these lines. Additional shielding can be obtained by running
ground trace(s) along the To lines, which also facilitate
minimum loop area connections for the transformer's center
tap bypass capacitors.
The connections between the secondary (output side) of the
transformer and the diode bridges should be kept as short as
possible. Unnecessary stray capacitance on these lines could
cause tuned circuit peaking to occur, resulting in a slight
increase of output voltage.
The PWS740 is intended for use with the IS0102, IS0120
or ISOl22 isolation amplifiers (see Figure 3). Place the
PW~740-2 transformer on the V OUT side of the buffer rather
than on the C 1 (bandwidth control) side to prevent possible
pickup of switch signal by the IS0102.
The best ground connection ties the IS0102 output analog
common pin to the PWS740-1 ground pin with a ground
plane. This is where a four-layer board design becomes
convenient. The digital ground of the IS0102 can be connected to the ground plane or closer to the +V supply. If
possible; you should include the analog components that the
IS0102 drives on the same board. For example, if several
IS0102s are multiplexed to an analog/digital converter, then
having all components sharing the same ground plane will
significantly simplify grourid errors. Avoid connecting digi-
BURR~BROWNe
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tal ground and the PWS740 ground together locally, leaving
the ISO 102 analog ground to be connected off of the board;
the differential voltage between analog and digital ground
may become too great.
OUTPUT CURRENT RATINGS
The PWS740-1 driver contains "soft-start" driver circuitry
to protect the driver PETs and eliminate high inrush currents
during tum-on. Because the PWS740 can have between one
and eight channels connected, it was not possible to provide
a suitable internal current limit within the driver. Instead,
impedance-limiting protects the driver and transformer from
overload. This means that the internal impedance of each
PWS740-2 transformer is high enough that, when shortcircuited at its output, it limits the current drawn from the
driver to a safe value. In addition, the wire size and mass of
the transformer are large enough that the transformer does
not receive damage under continuous short-circuit conditions.
The PWS740-1 is capable of driving up to eight individual
channels to their full current rating. The total current which
can be drawn from each isolation channel is a function of
total power being drawn from both DC V+ and V- outputs.
For example, if one output is not used, then maximum
current can be drawn from the other output. In all cases, the
maximum total current that can be drawn from any individual channel is:
It should be noted that many analog circuit functions do not
simultaneously draw full rated current from both the positive
and negative supplies. Thus, the PWS740 can power more
circuits per channel than is first apparent. For example, an
operational amplifier does not draw maximum current from
both supplies simultaneously. If a circuit draws lOrnA from
the positive supply and 3mA from the negative supply, the
PWS740 could power (60 + 13), about four devices per
channel.
ISOLATION VOLTAGE RATINGS
Because a long-term test is impractical in a manufacturing
situation, the generally accepted practice is to perform a
production test at a higher voltage for some shorter period of
time. The relationship between actual test conditions and the
continuous derated maximum specification is an important
one. Burr-Brown has chosen a deliberately conservative
one: VTEST = (2 X VCONTINUOUSRATlN,) + lOOOV. This choice is
appropriate for conditions where system transient voltages
are not well defined. (3) Where the real voltages are welldefined or where the isolation voltage is not continuous, the
user may choose a less conservative derating to establish a
specification from the test voltage.
1~+I+IIL-I::;6OmA
-~
~
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(3) Reference National Electrical Manufacturers Association (NEMA) Standards part
les 1·109 and ICSI-llL
,EilEiI,
BURR-iBROWN(!I
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PWS745
r:RR-BROWN®
EEl EEl I
Multi-Channel Isolated
DC/DC CONVERTER COMPONENTS
FEATURES
APPLICATIONS
• COMPACT SIZE
• LOW COST PER CHANNEL
• INDUSTRIAL CONTROL
• GROUND-LOOP ELIMINATION
• DRIVES UP TO 8 CHANNELS
• PC-BASED DATA ACQUISITION
• 750/1500VAC ISOLATION
• POINT-OF-USE POWER CONVERSION
• FLEXIBLE USE WITH PWS740/PWS750
COMPONENTS
• 5V TO ±15V FROM DIGITAL SUPPLIES
• 0.4 IN. MAXIMUM MOUNTING HEIGHT
DESCRIPTION
The PWS745 is a set of components useful in the
construction of single or multi-channel isolated
DC/DC converters. By themselves, or in combination
with the PWS740 and PWS750 families of components, they allow compact, optimal, and low-cost solutions to many power supply problems.
The PWS745-1 DIP oscillator/driver can be used to
drive up to eight channels of independently isolated
power. The switching MOSPETs are built into the
driver to allow simple low-cost assembly of the multichannel converter. The PWS745-1 also is capable of
operating at 5VDC and can be easily synchronized
with TTL level signals. While offering the user an
alternative to the TO-3 package of the PWS740, the
PWS745-1 also allows the user to select varying levels
of power, isolation voltage, mounting technology and
system configuration by choosing among the several
component families. For example, the PWS745-1 can
directly drive the PWS740, PWS745, or PWS750
transformers. It also can drive the PETs of a PWS750
distributed power system. The operating frequency is
compatible with the ISO 120 family of isolation amplifiers and is capable of multi-channel synchronized
operation to eliminate troublesome beat frequencies.
The PWS745-2 is a 15V to ±15V output version, while
the PWS745-4 is the 5V to ±15V output version. The
PWS740-3 high-speed bridge provides a convenient
rectifier for the selected transformer output.
PWS745-2 (15V Operation)
PWS745-4 (5V Operation)
T
To
AC
COM2
Vo
GND
f
To
AC
COMI
International Airport Industrial Park
Mailing Address: PO 80111400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (602)746·1111 • Twx: 91Cl-952·1111 • C8b1e:BBRCORP • Telex: 066-6491 • FAX: (602) 889-1510 • Immediate Producllnlo: (800) 54U132
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SPECIFICATIONS
ELECTRICAL
At V'N = 15VDC, Output Load = ±15mA (PWS745-2) and TA = 25°C unless otherwise noted.
OrV'N = 5VDC, Output Load = ±12mA (PWS745-4) and TA = 25°C unless otherwise noted.
Frequency:
IntemalOSC
ExtemalOSC
Supply: 15V Operation
5V Operation
Current
TTL'N =OV
No Load
Max Load
CBVPASS :::: 1~F
Current Ripple
TTL1N :
TTL",,:
550
500
10
4.5
600
600
15
5
10
650
2.5
650
1000
18
5.5
50
7
0.7
kHz
kHz
V
V
mA
mA
mAp-p
nA
!!A
V
V
MHz
mA
kHz
mA
V
V
150
Vrms
Vrms
QllpF
!!Arms
10
I"
III
V'H
VIL
Frequency
-1
0.8
2
15
10L
Frequency
T, T Drive Current
T, f Drive Voijage: High
Low
600
60Hz, Is
750
1200
10" 118
V~O
= 240Vrms, 60Hz
Voltage, Rated Continuous AC 60Hz
100% Te5t(1)
60Hz, Is
Barrier Impedance
Leakage Current at 60Hz
,
750
1200
Vrrns
Vrms
QllpF
10"118
=
240Vrms, 60Hz
~
::l
150
C
Specification
Operation
Storage
°C
°C
°C
o
a:
a..
z
o
NOTES: (1) Tested at 1.6 rated, fail on 5pc partial discharge leakage current on five successive pulses.
fi
..J
o
~
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
BURR-BROWN@
I E51E5II
Burr-Brown Ie Data Book-Linear Products
5.157
For Immediate Assistance, Contact Your Local Salesperson
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATIONS
Supply Voltage ..................................................................................... 18V
Continuous Isolation Voltage ....................................................... 750Vrms
Junction Temperature ...................................................................... 150'C
Storage Temperature ......................................................................... 85'C
Lead Temperature (soldering, lOs) .................................................. 300'C
Transformer Output Short to Common .................................... Continuous
Max Load, Sum of All Transformer Outputs ... :................................. 500mA
Stresses above these ratings may permanenUy damage the device.
PWS745-1
COMl
COM2
16
PACKAGE INFORMATION(I)
MODEL
PWS745-1
PWS745-2
PWS745-4
PACKAGE
PACKAGE DRAWING
NUMBER
16-Pin Plastic DIP
B-Pin Plastic
B-Pln Plastic
129
250
250
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
PWS745-21PWS745-4
I\l\ ELECTROSTATIC
\l:)I DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from performance degradation to complete device failure. BurrBrown Corporation recommends that all integrated circuits
be handled and stored using appropriate ESD protection
methods.
BURR-BROWNI!l
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TYPICAL PERFORMANCE CURVES
T, = 25'C, +15VDC or +5VDC unless otherwise specified.
LOADlINE, PWS740
LOADlINE, PWS745
18
rr---r---r--r----,----r---,
18
17
17
16
15
15
>~
5
14
14
-.?
13
13
12
1---t----t----t----t-1'--~.._-_J
12
11
11
10
10
20
15
25
30
5
0
10
EFFICIENCY, PWS745
0.9
0.7
0.6
~
'u
if:
w
0.5 I0.4
//
// /
/
0.1
o
PWS740-2, 4 Channels --..
0.7
V
/ V
//
0.6
PWS745-2, 4 Channels
(;'
c:
0.5
'u
"
if:
w
0.4
0.2
0.1
o
10
15
20
25
30
~
I--"::
"\
:;:)
PWS740-2, 8 Channels
C
o
I. /
0.3
5
30
--
0.8
'II
1/
0.2
25
EFFICIENCY, PWS740
I II
0.3
o
--
8Channe~./
20
0.9
__ PWS745-4, 4 Channels
/ y ,.,.--,
PWS745-2
0.8
15
Load (mA)
(Balanced Loads)
Load (mA)
(Balanced Loads)
a:
a..
//
/I
,
o
z
5
10
Load (mA)
(Balanced Loads)
15
20
25
30
Load (mA)
(Balanced Loads)
o
fi
...I
o
~
LINE REGULATION USING PWS745-2 TRANSFORMERS
LINE REGULATION USING PWS740-2 TRANSFORMERS
20
./
,
-~
20
18
18
l/
4chaJnels_
16
./
12
~
16 1--->-
.J 14
/;
8 Channels
12
/v
10
4dhannels
/
10
V
8
/'
8 chaniels
~
8
8
10
12
14
16
18
20
V,N
8
10
12
14
16
18
20
V,N
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TYPICAL PERFORMANCE CURVES
(CONT)
TA =25°C, +15VDC or +5VDC unless o1herwlse specified.
OUTPUT RIPPLE VOLTAGE
LINE REGULATION USING PWS745-4 TRANSFORMERS
20
18
4Cha~nels_ r---...
16
---
12
10
~
.....- ~
I-"'
,.......
20
----
!\
18
\
16
14
ia:"
\
I\,
'\
f
g 1210
"- ..........
8
6
4
........ r-
2
o
8
4.5
4.7
4.9
5.1
5.3
5.5
5.7
5.9
o
6.1
0.1
0.2
0.3
0.4
15.5
15
15
PWb45:2, 8
-
6han~els
II
0.7
0.8
0.9
-
-.... ........
..........
"""'-
14.5
::--.
I
7
PWS740-2, 8 Channels
/
14
0.6
DRIFT, PWS740
DRIFT, PWS745
15.5
14.5
0.5
C Load (~F)
V'N
J
I"""" ~
f' ~
PWr45-j,41hann!",s
13.5
14
13.5
13
13
-25 -15 --5
5
15
25
35
45
55
65
75
--25 -15 --5
85
5
Temperature (OC)
PWS745-1 MAXIMUM INPUT POWER
..........
35
45
55
65
75
85
--.
TIL'N SIGNAL DUTY CYCLE
100
r---- t---...
25
Temperature (OC)
12
10
15
75
............
I'--. r--......
:...........
251-------"
o
--25 -15 --5
5
15
25
35
45
Temperature eC)
55
65
75
85
o
~--~--~~~------~--------~
1.5
2
2.5
Synchronization Frequency (MHz)
(= Twice the FET Drive Frequency)
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Transformer
(See Table I)
NOTE: (1) Optional input filter inductor and
capacitor to reduce input current ripple.
Diode Bridge
(See Table II)
Multiple Channels
(See Table I)
FIGURE 1. Typical Connections.
BASIC OPERATION
The PWS74S components are used to build a multichannel
DCIDC converter. The oscillator runs at 600kHz nominal,
making it possible to reduce the size of the transformer and
lower the output ripple voltage. The PWS74S-l is a power
oscillator/switch able to directly drive the primary side of an
isolation transformer. The small size of the driveris achieved
by using a multiple chip transfer molding process. The
power components are mounted directly on the copper
leadframe, utilizing two pins directly connected to each die
pad to maximize heat sink area. The output of the transformer is rectified with a high speed diode bridge. The
PWS740-2 is used when lS00Vrms isolation is required.
The PWS745-2 or PWS7S0-2 is used when 750Vrms isolation is required. With these transformers, the output voltages
ilirt:cily track the input voltage. The P,\VS745 -1 or P'lfS750-
4 is used to step up the input voltage from SV to ±lSV.
Operation at SV makes it possible to build an isolated system
for powering the analog components when only a logic
supply is available. Using the PWS74S-2 or -4 allows the
user O.Sin. PCB spacing. The possible component combinations are summarized in Figure 1 and Tables I and II. The
600kHz operating frequency enables direct synchronization
with products such as the IS0120 and ISOl21. See Figure
3. The use of synchronization makes it possible to eliminate
any power-supply induced ripple in the output of the isolation amplifiers and to minimize beats falling in the signal
path bandwidth.
PIN DESCRIPTIONS
+V'N AND GND
The +VIN pin supplies power to the oscillator. The GND pins
are used for the return currents of the driver chip.
PWS745·2
PWS745·4
PWS740-2
PWS750-2U
PWS750-4U
750VAC
1500VAC
750VAC
750VAC
4
8
8
4
~:::J
TABLE I.
DIODE BRIDGE
TECHNOLOGY
PWS740-3
PWS750-3U
Thru-hole
Surface-mount
C
o
a:
D..
Z
TABLE II.
COM1, COM2
The COM pins are connected to the sources of the internal
MOSFETs and each pin must be tied to ground. The current
from the primary windings of the transformers flows in
through the T and T pins and then out through the COM
pins.
TTL'N
This pin must be tied to ground, except when it is desired to
control the driver frequency with an external TTL level
frequency source. The duty cycle can vary from 12% to 9S%
(see Typical Performance Curves). The input frequency
must be twice the desired operating frequency, because an
internal flip-flop is used to produce a precise 50% duty cycle
signal to the drivers.
TTLoUT
When multiple PWS74S-1 drivers must be synchronized to
minimize beat frequencies in the output, a single driver is
used to synchronize with the remaining drivers. The TTLOUT
pin is used as the synchronizing signal from the master
controller and is connected to the TTLIN of the slave drivers.
A standard open collector output is provided, therefore a
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J
3300 to 3.31d1 pull-up resistor will be necessary, depending
on the stray capacitance on the synchronizing line. A maximum of 8 PWS745-1s can be connected without the use of
an external TTL buffer.
ENABLE
An ENABLE pin is provided so that the DRIVE and i5RNE
pins can be shut down to the low state within one cycle to
minimize power use if desired. A TTL low applied to the pin
will shut down the driver .and a TTL high will enable the
driver. The TTLOUT will stilI have the 1.2MHz signal so that
a master driver can be disabled without shutting down the
remaining synchronized drivers. The pin can be left open for
normal operation.
DRIVE, DRIVE
These pins are normally connected directly to the adjacent
GATE pin and are used to drive the gates of the internally
packaged MOSFETs. If desired, these pins may be used
instead to drive the gates of external FETs, such as those
used in the PWS750 series of power components. It is
important to minimize the capacitance on these nodes to
insure the rapid charging of the MOSFET gates.
GATE, GATE
These pins are normally connected directly to the adjacent
DRIVE pins, which are internally connected to the gates of
the MOSFETs.
T,T
The T and T pins are the complementary transformer drive
connections. The signals on these pins are 600kHz complementary square waves with twice the amplitude of the input
voltage. These lines connect MOSFET switches to the isolation transformers through the To and To pins. Without
proper printed circuit board layout techniques, these lines
could generate interference to analog circuits. Refer to the
section on layout techniques.
To, To
These pins are the primary terminals of the transformer and
are connected to the T and T pins of the PWS745-1.
VD
The center tap of the primary of the transformer is tied
directly to the supply. A 0.3IJP bypass .capacitor must be
located as close to this pin as possible.
AC
The output of the isolation transformer which is connected
to the AC inputs on the PWS740-3 or PWS750-3 diode
bridge.
PC BOARD LAYOUT
CONSIDERATIONS
Multilayer printed circuit boards are recommended for
PWS745 systems. Two-layer boards are certainly possible
with satisfactory operation; however, three layers provide
greater density and better control of interference from the
power switching lines. Should a four-layer board be required
for other circuitry, the use of separate layers for ground and
power planes, a layer for switching signals and a layer for
analog signals would allow the most straightforward layout
of the PWS745 system. Critical consideration should go to
minimizing electromagnetic radiation from the power switching lines T -To and T -To:The dynamic component of the
current is supplied by the bypass capacitor on the V D pin of
the transformer. The high frequency AC current flows through
the transformer , To' returning in the T pin, passing through
the MOSFET and exiting through the COM pin back to the
bypass capacitor. This current path defines a magnetic loop
which transmits a magnetic field. The magnetic field lines
reinforce at the center of the loop, while the field lines from
opposite points of the loop oppose each other outside the
loop. Cancellation of the magnetic radiation occurs when the
loop is collapsed to two tightly spaced parallel line segments, each carrying the same current in the opposite direction. All of the current in the ground or power plane will
flow directly under the T -To traces because this is the path
of least inductance or impedance. Another potential problem
with the T-To lines is electric field radiation. Here, the
power plane is effective in terminating most of the field lines
because of its proximity. Additional shielding can be obtained by running ground trace(s) along the T -To lines,
facilitating a minimum loop area for the transformer's center-tap bypass capacitor.
The connection between the outputs of the transformer and
the diode bridge should be kept as short as possible. Unnecessary stray capacitance on these lines could cause resonant
peaking to occur, resulting in a slight increase in output
voltage.
EXTERNAL FILTER COMPONENTS
Filter components are necessary to reduce the input ripple
current and output voltage noise. Without any input filtering,
~~awtooth currents of the switching power lines T-To and
T-To would flow in the supply line. Since this AC current
can be as great as IA peak, voltage interference with other
components using this supply line would likely occur. Use
of a pi-filter can reduce the input ripple cUrrent to about
1mA peak. Recommended values are a 201lH inductor prior
to the connection of the supply to the power plane. A lOIJP
tantalum capacitor with a 0.33IJP ceramic capacitor is adequate for the input bypassing. The inductor must be rated
for at least 2A or a DC resistance of 0.10. An example of a
low-cost inductor is part number 51591 from Pulse Engineering. Output voltage filtering is achieved with a 0.33IJP
capacitor connecting each V OUT pin of the diode bridge to
ground. Short leads and close placement of the capacitors to
the bridge provide optimum high frequency bypassing. Using correct bypassing techniques, 600kHz ripple of less than
5mVp-p is achievable. High frequency noise bursts coinciding with the switch times are approximately 2OmVp-p.
Inductance of 201lH in series with the output loads will
significantly reduce the noise seen by the loads.
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HIGH VOLTAGE TESTING
5V OPERATION
With SV operation, the transfonner winding ratio is 3-to-l,
generating much greater currents in the primary. Therefore,
four channels are the maximum that can be powered directly
by the PWS74S-1.
Burr Brown Corporation has adopted a partial discharge test
criterion that confonns to the Gennan VDE0884 optocoupler
standard. This method requires that less than Spc partial
discharge crosses the isolation barrier with 1200Vnns 60Hz
applied. This criterion confInns transient overvoltage (1.6 x
7S0Vnns) protection without damage to the PWS74S-2 or
PWS74S-4. Life test results verify the absence of high
voltage breakdown under continuous rated voltage and maximum temperature. The minimum AC voltage that initiates
partial discharge above Spc is defIned as the "inception
voltage." Decreasing the barrier voltage to a lower level is
required before partial discharge ceases and is known as
"extinction voltage." We have developed a package insulation system to yield an inception voltage greater than
1200Vnns so that transient voltages below this level will not
damage the isolation barrier. The extinction voltage is above
7S0Vnns so that even overvoltage induced partial discharge ~
will cease once the barrier is reduced to the rated value. • Previous high voltage test methods relied on applying a ~
large enough overvoltage (above rated) to break down mar- >
ginal units, but not so high as to pennanently damage good Il.
ones. Our partial discharge testing gives us more confIdence
in barrier reliability than breakdown criteria.
•
OUTPUT CURRENT RATING
The PWS74S-1 driver contains "soft start" driver circuitry to
protect the driver MOSFETs and eliminate high in-rush
currents during tum-on. Impedance limiting by the isolation
transfonners provides short circuit protection on the secondary side and limits the primary side current to a safe value.
The total current which can be drawn from each isolation
channel at rated voltage is a function of total power being
drawn from both V+ and V- outputs. For example, if one
output is not used, then maximum current can be drawn from
the other output. In all cases, the maximum total current that
can be drawn from any individual channel is:
I~ +1
+ IlL-I < 60rnA
It should be noted that many analog circuit functions do not
simultaneously draw full rated current from both the positive
and negative supplies. Thus the PWS74S system can power
more circuits per channel than is first apparent. For example,
if a circuit draws 10rnA from the positive supply and 3rnA
from the negative supply, the PWS74S could power (60/13),
or about four devices per channel.
~
o
::::l
C
o
a:
Q.
//
/"
4nS
V'N
T
8
SV
O.3~F
f
2,3
-=-
5
//
/"
PWS745-1
T
TTL'N
15, 11!
"
-
III
-
/
-
4
L
..
o
o
2
~3~F f
~-
7
2
I
>-j~
/
Mother
board
Daughter
board
---0 Powerfor
input signal
conditioning
....-0 circu itry
O.3~F
~
6
---/
/
4
.-I
14
I T
1
Power for
output
circuitry
/
>-j~
PWS75O-3U(1)
H,O.3~F
-
~
6
3
6
~
...J
PWS750-3U(1)
f---
/
/" J-
as appropriate for V,so or mounting technology.
J
7
Z
3
O.3~F
-
:
NOTE: (I) Substitute other PWS components
+-
PWS750-4U(1)
12UI3
11
+
O.3~F
I //
/
4
6
/
6,7
I
/
PWS750-4U(1)
I
O.3~F
--'::-
~v
;~" ~~ f12-o
VOUT
±IOV
FIGURE 2. Complete ±1OV Signal Acquisition System Operating from a Single SV Supply.
8
7
V, N
±I OV
""
BURR~BROWN~
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Burr-Brown Ie Data Book-Linear Products
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APPLICATIONS
The PWS745 components form part of a versatile collection
of isolation power supply components from Burr-Brown.
Figures 2, 3, and 4 illustrate only a few of the many possible
combinations.
V ,N'
IS0120
21
V-
-:-
4
V+
V-
20pF
"
AC
-:-
20k.!l
"
AC
4
To
T
AC
PWS745-2
PWS740-2
PWS750-2
V+
5
V,N
GND
VD
To
20kQ
AC
AC
3
6
AC
GND
AC
To
vD
To
PWS745-2
PWS740-2
PWS750-2
2,3
)~ ..
PWS745-1
T
20pF
PWS740-3
PWS750-3
'"
"0
Cl
6
AC
4
V+
V-
PWS740-3
PWS750-3
'0
Cl
V+
more
channels
14,15
T
10~F
IO.3~F
TO.3~F
FIGURE 3. Synchronized-Multichannel Isolation System.
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+V'ND-+--~_-_rr"'-----_----,
PWS745-2
PWS74o-2
5
2.3
AC
3
GND
PWS745·1
PWS74o-3
h
11
14.15
fo
Other local
channels
L-_ _--' AC
6L-_ _--Ih---o-VOUT
PWS75-2U
4
3
3
PWS750·3U
O.3~F
GrD'--_++~-r7--l
s
'-----------"1
+V'ND----+----'yy'---_----t----.
10~FI
O.3~F
I
2
6
h--t-----o-VOUT
-=-
Output
GND
Other remote
channels.
~
o
=»
c
o
a:
FIGURE 4. Remote and Local Operation of Isolated Power Channels.
0..
z
o
fi
..J
o
~
BURR~BROWN®
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IIRR-BROWN@
PWS750
-==--==-1
Isolated, Unregulated
DC/DC CONVERTER COMPONENTS
FEATURES
APPLICATIONS
.100% TESTED FOR HIGH-VOLTAGE
BREAKDOWN
• INDUSTRIAL PROCESS CONTROL
EQUIPMENT
• COMPACT-SURFACE MOUNT
• GROUND-LOOP ELIMINATION
• MULTICHANNEL OPERATION
• PC-BASED DATA ACQUISITION
• 5V OR 15V INPUT OPTIONS
• FLEXIBLE USE WITH PWS740/PWS745
COMPONENTS
• VENDING MACHINES
The PWS750-2U and PWS750-4U are split-bobbin
wound isolation transformers using a ferrite core.
They are encapsulated in plastic packages, allowing a
high isolation voltage rating.
DESCRIPTION
The PWS750 consists of three building blocks for
building a low cost DClDC converter. With them you
can optimize DClDC converter PC board layout or
build a multichannel isolated DC/DC converter. All
parts are surface mount, requiring minimal space to
build the converter. The modular design minimizes the
cost of isolated power.
The PWS750-3U is a high-speed monolithic diode
bridge in a plastic 8-pin SO package.
One PWS750-IU can be used to drive up to four
channels (l5V nominal operation). One PWS750-2U
and PWS750-3U and two 2N7002 (surface mount) or
2N7008 (T0-92) MOSFETs made by Siliconix are
used per isolated channel. When a PWS750-4U is
used as the transformer (5V input), then two TN0604s
made by Supertex must be used, due to the higher
currents of the primary (lower RDS on) and the lower
Vos threshold. With 5V operation only one channel
can be directly driven by the PWS750-lU (a simple
FET booster circuit can be used for multichannel
operation; see Figure 3).
The PWS750·lU is a high-frequency (800kHz nominal) driver that can drive N-channel MOSFETs up to
the size of a 1.3A 2N701O. The recommended
MOSFET for individual transformer drivers is the
2N7008. The PWS750-lU is supplied in a 16-pin
double-wide SO package.
PWS750 SINGLE-CHANNEL CONNECTION
1--------------------------------------,
,
,
r - - - - - - - - - - - - ' ' T ' , y - " ' - - - - - - j - - , 2N7002(2)
+V +V'N 7
:
PWS750.2U'
5
4
PWS750-3U
,,
6
3
7
2
Output
: 2N7002 (2) -:Ground
,
or
TTLauT
'TTL,N
: 2N7008
.
10n(1) ,
~
Typical Connection for
,DupllC8te for multichannel
_
,
Internal Oscillator Operation L~~~O~~~h!_~S!~O':'2~:.. ___ : ___ ________VE ___ ___:"'VE __:
NOTES: (I) User option. (2) Use TN0604 tor 5V to ±15V operation. (3) Multichannel Operation.
IntematIonaI Airport Industrial Park • lIaDlng Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
746-1111 • Twx: 91C).852.1111 • cable:BBRCORP • Telex: 066-6491 • FAX:
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SPECIFICATIONS
ELECTRICAL
At T. =25'C; +V'N = +15V; and lour ~ ±15mA balanced loads unless otherwise noted.
PARAMETER
_ ..·..'n_1 •• n ..,.,.
\AI...,,'''''''''
MIN
TYP
MAX
UNITS
725
1
10
4.5
800
875
2.5
18
5.5
50
7
0.7
0.8
15
kHz
MHz
V
V
mApk
V
V
nA
j.IA
V
V
mA
1.5
Vrms
Vrms
QllpF
j.lArms
.Tna
TTL'N~ OV
Frequency: Internal OSC
External OSC
Supply: 15V Operation
5V Operation
T, l' Drive Current
T, l' Drive Voltage, High
Low
TTL,N' I,"
I"
V,"
V"
TT~UT' 10l
15
5
3
10
-1
2
I +V.. TO ±VOOT ISOLATION'
0
ISOLATION
Voltage Rated Continuous AC 60Hz
100% Test (1)
Barrier Impedance
Leakage Current at 60Hz
Winding Ratio
60Hz, 1s, <5pC PO
750
1200
10"118
1
48148
V,sn ~ 240Vrms
Prima
.s
30
:!ii
20
i"
1
..........
15
\
~-
- - - _.. _._--- ----_._-- - - - ' - - -
~
3:
c..
----
Ripple Frequency =
Oscillator Frequency
•
en
I-
'\
0
::l
C
----- --- ---
-~.--
~ ..........
~
Q.
oc
~~+-
10
-
0
0:
a.
0
20
25
30
0.1
Load (mA)
0.2
0.4
0.6
Filter capacitance
Z
0.8
0
(~F)
fi
....I
0
'I"
::
EFFICIENCY/LOAD CURVE
80
TTL IN SIGNAL DUTY CYCLE
r----,----,---,-----,---..,----,
100
75
i
,..
0
4 Channel
PWS750-1U
25
//-+----+---+--- -
40
50
"
0
;f.
30 '--.L-...JA'--_-'-_ _.l...._-J.__-'-_--l
o
10
15
20
25
30
Load Current (±mA)
Burr-Brown Ie Data Book-Linear Products
Synchronization Frequency (MHz)
(. TWice the FET DrIVe Frequency)
5.169
For Immediate Assistance, Contact Your!ocal Salesperson
TYPICAL PERFORMANCE CURVES (CONT)
TA =+25'C. V,N =15VDC. 1_ =±15mA unless otherwise noted.
THE OUTPUT VOLTAGE CAN BE ADJUSTED
±3% BY VARYING THE DRIVER FREQUENCY
'OUTPUT VOLTAGE DRIFT WITH A ±15mA LOAD
?:
5
~
15.5
16
15.25
15.5
15
~
/
""""
14.75
'"'"
5
:i:
15
14.5
/
,/"
~
14
14.5
-25
?:
a
25
50
75
100
1.5
1.6
2
TTL'N Frequency (MHz)
Temperature ('C)
THEORY OF OPERATION
The PWS750 components are basic building blocks to be
used with other standard components to build an isolated
push-pull DCIDC converter. The oscillator runs at 800kHz
nominal, making it possible to reduce the size of the transformer and lower the output ripple voltage.
During overload conditions the output drive shuts off for
approximately 801JS, then turns back on for 20IJS, resulting
in a 25% power up duty cycle. If the overload condition still
exists, then the output will shut off again. When the fault or
the excessive load is removed, the converter resumes normal
operation.
PWS750-1U OSCILLATOR PIN FUNCTIONS
The T and T pins are the complementary PET drive outputs
and are tied directly to the corresponding PET gate. The
connection must be as short as possible. For multiple channel operation they cannot be located above any ground or
power planes, because capacitive loading will not allow fast
enough charging of the PET gate.
TILIN is used to control the driver frequency with an
external TIL level frequency source. The input frequency
must be twice the desired driver frequency, since there is an
internal divide-by-2 circuit to produce a 50% duty cycle
output. The input duty cycle can vary from 12% to 95% (see
Typical Performance Curves). When in the free running
mode, the TI'I.w pin must be tied to ground.
TTLoUT is used when it is desired to synchronize the outputs
of multiple PWS750-1Us to minimize beat frequency problems. A standard open collector output is provided, therefore
a 3300 to 3.3kQ pull-up resistor will be necessary depending on stray capacitance on the sync line. A maximum of
eight PWS750-1Us can be connected without the use of an
external TTL buffer.
An Enable pin is provided so that the driver (T, T) can be
shut down to minimize power use if required. A TIL low
applied to the pin will shut down the driver within one cycle.
A TTL high will enable the driver within one cycle. The
TILOUT will still have an 800kHz signal when a master
driver is disabled, so other synchronized drivers will not be
shut down. The pin can be left open for normal operation.
The +VIN pin supplies power to the oscillator. The Vo pin
connects the power to the transformer through the internal
overcurrent sense resistor. The other end of the overcurrent
sense resistor is tied to +VIN' A O.31JP bypass capacitor must
be connected to the V0 pin to reduce the ripple current
through the shunt resistor; otherwise false current limit
conditions can occur due to ripple voltage peaks.
PWS750-2U AND PWS750-4U
TRANSFORMER PIN FUNCTIONS
On the primary side the VD pin of the PWS750-2U is tied
directly to the Vo pin of the PWS750-1U. Remember to
place a 0.11JP capacitor as close to the PWS750-2U V0 pin
as possible. The To and To pins are connected to the drains
of the corresponding PETs, whose sources are connected to
ground. On the secondary side of the transformer, the Gnd
pin is tied directly to the isolated ground. AC pins are
800kHz square wave signals at twice the output voltage, and
are connected directly to the corresponding pin on the
PWS750-3U. Pins 2 and 4 can be interchanged for ease of
hook up. The connection to the diode bridge must be as
direct as possible to minimize radiated noise.
The winding ratio for the PWS750-2U is 1:1. This means
that the output would normally be less than the input due to
voltage drops in the PETs, transformer and diode bridge.
Since the DCIDC converter is operating at 800kHz, the
transformer is starting to operate close to the resonant
frequency, which causes the output to increase in magnitude.
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SYNC
PWS750-2U
en
t-
Vo
o
:::)
c
a:
+b
0
D..
+V''1
Z
0
!;i
...I
0
sa
FIGURE 1. Sample PC Board Layout, 4:1.
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MULTIPLE CHANNEL OPERATION
PWS750·3U HIGH SPEED
DIODE BRIDGE PIN FUNCTIONS
The AC pins are tied directly to the AC pins of the PWS7502U. The +V and -v pins are rectified output voltages. The
filter capacitors milst be located as close as possible to these
pins to minimize series inductance and therefore noise.
Bypass capacitors will be needed at each device in the
circuit.
BASIC OPERATION
SINGLE CHANNEL OPERATION,
PC BOARD LAYOUT CONSIDERATIONS
A simple two-layer board can be used on single channel
applications to create a DCIDC converter with low radiated
noise. A ground plane should be located directly under both
the input and the output components for optimum ground
return paths. The surface mount components make it easy to
design with a ground plane. The output filter capacitors
should be located as close to the PWS750-3U as possible. A
sample layout is shown in Figure 1.
For multiple channel applications, T and Ttraces must have
miuimum capacitive loading. Therefore, there should be no
ground plane (or power plane) under these two traces. The
driver signal is a 4-6V low cnrrent 800kHz signal, which
will generate little radiated noise if the traces are kept short.
The oscillator can drive up to four-channels (eight FETs)
directly when operating at 1O-18V. A lOQ resistor must be
placed in series with T and T to stabilize the FET gate
charging. For more than four-channel operation, or 5Vmultiple-channel operation, the driver circuit needs a FET
booster circuit, as shown in Figure 2. Large gate drive surge
cnrrents (> 100riIA) are needed to tum on the gates.
If the total output cnrrent drawn by all the channels exceeds
250mA, then it will be necessary to circumvent the cnrrent
limit circuit by leaving the V0 pin of the PWS750-1 U open,
and connect the V0 pin of the PWS750-2U directly to the
supply.
5V OPERATION
With 5V operation, the transformer winding current ratio is
3: I, therefore generating much greater currents in the primary. The input ripple voltage will be larger, so an input pi
filter will be necessary to isolate the converter noise from the
rest of the circuit. For example, when the output is ±15mA
the input cnrrent will be at least 120mA.
MOSFET
MAX DRIVE CURRENT
PACKAGE
BREAKDOWN
4A
115mA
500mA
1.3A
1.2A
TO·92
SO-T23
TO-92
TQ-237
4-Pin DIP
40V
60V
60V
60V
60V
TN0604
2N7002
2N7008
2N7010
2N7012
TABLE I. MOSFET Selector Guide.
3
+V
+VrN
VD
7
11
O.3~F
----------------------------------------------,
10~H
'---j----t-fo 2N7002 0
User Option
~
4 :
+ Va I
O.3~F
PWS750·2U
:
PWS750-3U
O.3~F
I
L~
O.3~F
0-"-+-.......-0 -Yo
L~====:""--! ~~~ut
_____________::_____ ~~~i~a~e!~~~~!.?~:n~':s
_______: : ________
:
:
:
:
J
FIGURE 2. MOSFET Driver Booster Circuits.
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OUTPUT CURRENT RATING
The PWS750-IU oscillator contains soft start circuitry to
protect the PETs from high inrush currents during turn on.
The interual input current limit is 250mA peak to prevent
thermal overload of the MOSPETs. The maximum output
rating is ±30mA. Total current, which can be drawn from
each isolation channel, is the total of the power being drawn
from both the +V and -V outputs. For example, if one output
is not used, then maximum current can be drawn from the
other output. In all cases the maximum current that can be
drawn from any individual channel is:
1+loUTI + 1-loUTI < 60mA
It should be noted that many analog circuit functions do not
simultaneously draw equal current from both the positive
and negative supplies.
When multiple channel operation is used, the maximum
current of all channels must be reduced to prevent the
overcurrent limit to trip. Alteruately, bypass the overcurrent
by leaving the VDPin of the PWS750-IU open and connecting the VD pin of the PWS750-2U directly to the supply.
HIGH VOLTAGE TESTING
Burr-Brown Corporation has adopted a partial discharge test
criterion that conforms to the German VDE0884 optocoupIer standard. This method requires that less than 5pC partial
discharge crosses the isolation barrier with 1200Vrms 60Hz
applied. This criterion confirms transient overvoltage (1.5 x
750Vrms) protection without damage to the PWS750-2U or
PWS750-4U. Life test results verify the absence of high
voltage breakdown under continuous rated voltage and maximum temperature.
PWS7SQ.1U
f
7
VOUT
10
9
2
~
_8
VOUT
10~H
7
~
10 9
::;)
C
4
1
3
PWS7S0-2U
2
7
o
a:
Q.
1 4
Z
o
PWS7SQ.3U
PWS750-3U
~
....I
o
.. "
:::.::
4
1
3
PWS7SQ.2U
2
7
PWS750-2U
7
1 4
PWS750-3U
PWS750-3U
J11
VOUT~
IS0122P
IS0122P
FIGURE 3. Four-Channels of ±lOV Signal Isolation with Channel-to-Channel Isolation.
BURR-BROWN®
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The minimum AC barrier .voltage that initiates partial discharge above SpC is defmed as the ."inception voltage."
Decreasing !he barrier voltage to a lower level is required
before partial discharge ceases; this is known as "extinction
voltage." We have developed a package insulation system,to
yield an inception voltage greater than 1200Vrms so that
transient voltages below this level will not damage the
isolation barrier. The extinction voltage is above 7S0Vrms
so that even overvoltage-induced partial discharge will cease
once the barrier voltage is reduced to the rated value.
Previous high voltage test methods relied. on applying a
large enough overvoltage (above rating) to break down
marginal units, but not so high as to permanently damage
good ones.. Our partial discharge testing gives us more
confidence in barrier reliability than breakdown/no breakdown criteria.
10~H
3
1
7
T
5V
PWS750-3U
PWS750-1U
6
16
1 4
T
-:O.3~F
14
-:-
::r
-:-
5
4
6
3
7
2
O.3~F
3
PWS750-3U
Power for
} input signal
H-+--o conditioning
circuitry
6
-:Powerior {
output
circuHry
V~±10V
FIGURE 4. A Complete ±10V Signal Acquisition System Operating From a Single SV Supply.
H7F
T07-14-3.5
l~F
180mA
3 Turns
-Yo
TN0604
+5V
D
T
7
G
Vo
PWS750-1U
S
-:-
3
O.3~F
14
-:-
Gnd
-:- TTLln
47pF
+Vo
FIGURE S. A PWS7S0 Driver Can Be Used to Boost the Input Voltage to lSV to Power a PWS726 From a SV Supply.
iURR - BROWN@
Burr-Brown Ie Data Book-Linear Products _1511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
-V.V
VoUT ±10V
o-.....-C
Power for input signal
conditioning circuits
150103 22
24
14
TN0604 PWS750-4U
D
5
4
6
3
5V
V,.±10V
3
+Vo
PWS750-3U
PWS750-1U
6
7
O.3~F
-Yo
~
-=-
o
TN0604 PWS750-4U
D
G
O.3~F
:c
-=-
G
5
4
6
3
3
:::l
C
4
o
a:
PWS750-3U
D.
-=-6
7
Z
o
S
-=-
FIGURE 6. Powering the Internally Powered IS0103 Isolation Buffer From a Single 5V Supply. Two Power Channels Are
Necessary to Provide the 80mA Nominal for the +V of the 1S0103.
2N700B
PWS74D-2
D
G
4
~--V-~
r ~3&-
____3~-----o~~__--o
+Vo
PWS750-3U
PWS750-1U
:c
_
3
16
O.3~F
2N7008
D
G
Output
Gnd
FIGURE 7. 1500VAC Isolation Using PWS740-2 Transformer.
aURR~BROWNI8
I
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~
..J
o
~
For Immediate Assistance, Contact Your Local Salesperson
2N701 0
+VIN
G
T
16
7
-:PWS75D-1U
3
T
11
1
2N7010
G
D
S
-:-
O.3~F
------------------------------,
r----
Duplicate for up to 8 Channels
-:-
-:Input
Gnd
PWS75D-2U
5
4
3
6
+Vo
PWS750-3U
O.3~F
I
6
7
-:-
-Va
_
-
Output
Gnd
____________________________________ J
FIGURE 8. FET Pair Driving Up to Eight-Channels.
I~~
,~,
'= • ""[1
I
~
V'N'
~
II
15
V-
IS0120
I~~
,~,
,~ · ""1'
I
15
41'-22
24 ............. ~
3 0se
V+
-VS1
IS0120
V'N2
1L.o
iI
4~
24r---....
3
VV+
_..=-
~
1
V-
4
V+
13
lito
13
9\0
11
8\0
9
<8
-
V+ eXT
8200
5100
2000
5100
2000
00
2000
00
00
-
-
6.5V
7.5V
9.0V
125
125
:J
100
100
a.
"E
'"c
75
:0
E
50
50
~
25
25
'x
::;:
~
~
!!!
!
>-
75
e
!a.
Q)
E
(!
"
«
E
~
.~
::;:
CD
E
:J
E
..
0
0
50
100
150
200
Total Output Current(2) (rnA)
N
N
.....
OUTPUT VOLTAGE vs INPUT VOLTAGE
111
SINGLE-CHANNEL LOAD REGULATION
18
16
~
1
~ 13
~
f"
O
ai
fa!
>
5
%
0
en
t-
15
8
.3
::::)
C
14
0
13
0
a:
Q.
5
%
0
3
4
8
12
Z
16
0
20
Input Voltage (V)
40
60
80
fi
100
Output Load Currentlltl (rnA)
...J
0
!Q
CHANNEL-TO-CHANNEL INTERACTION
SINGLE OUTPUT LOAD REGULATION
~
16
z
~
~
ai
1
~
g
ai
5
>
0
j'
~
0
a!
.3
16
15
%
of
c::
14
lij
14
~
5
()
%
.~
:g
0
a.
8-
13
0
Output Load Currentlltl (rnA)
20
40
60
80
100
Output Load Currentlltl (rnA)
NOTES: (1) Using a 104mm x 19mm x 1.6mm aluminum strip mounted to the bottom of the case with heat sink compound. (2) Total output current is the sum of the
currents for each individual output.
BURR-BROWNe
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5.181
For Immediate Assistance, Contact Your LocaJ.Salesperson
TYPICAL PERFORMANCE CURVES
(CONT)
T. ~ +25°C, v,. = 15VDC, C ~ 0.47IlF. R, selected per Typical Performance Curve.
PARALLEL OUTPUT BALANCED
LOAD REGULATION
PARALLEL OUTPUT UNBALANCED
LOAD REGULATION
16
"'--
~
Q
~
<:.
~
15
oj
I>
~15
9a
14
~Il
V
V
V
V
~
t
~
~
IL
13
o
20
t
13 '--_ _i - -_ _i - -_ _i - -_ _.l...-_--'
40
60
Output Load Current
80
o
100
lid (rnA)
40
80
120
Output Load Current
200
160
lid (rnA)
OUTPUT-TO-OUTPUT INTERACTION
~
16
~
oj
~
;'$
15
15
9-
a
~
.."
14
0
13
9-
'"
0
~
0
40
80
120
Output Load Current
160
200
lid (rnA)
INSTALLATION AND
OPERATING INSTRUCTIONS
Typical application connections for the 722 are shown in
Figures 1 and 3. Primary power (VIN) is applied at the "P+"
and "V-" terminals. The common or ground for VIN may be
connected to either "P+" or "V-"; the only requirement is
that "P+"·and "V+" must be positive with respects to "V_".
Power for the internal oscillator and switch drivers is derived from the primary power by a voltage dropping resistor,
R I. The value of RI as a function of VIN is shown in the
Typical Performance Curves section. Alternately, voltage
for the "V+" terminal may be obtained from a separate
source. "V+" should be +5V to +7.5V positive with respect
to "V-." If a separate source is used, the "V+" input must be
applied before the "P+" input to avoid possible damage to
the unit. "P+" and "V+" must remain positive with respect
to ~'V-" at all times (including transients). If necessary,
diode clamps should be put across these inputs.
The "E" pin enables the converter when connected to "V+"
and disables it when connected to "V-."
An external capacitor, "C" (0.4711F ceramic), is used to
reduce input ripple. It should be connected as close to the
"P+" and "V-" pins as practical. Input leads to these terminals should also be kept as short as possible. Since the 722
is not internally shielded, external shielding may be appropriate in applications where RFl at the 900kHz nominal
oscillator frequency is a problem.
Each output is filtered with an internal O.2211F capacitor.
Output ripple voltage can be reduced below the specified
value by adding external capacitors up to 101IF between
each output and its common.
BURR BROWN$
w
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SHORT CIRCUIT PROTECTION
DISCUSSION
OUTPUT CURRENT RATINGS
At rated output voltage accuracy, the 722 is capable of
providing 64mA divided among its four outputs(l). A minimum average output current of 3mA is recommended at
each output to maintain voltage accuracy.
The circuit in Figure 2 may be added to the input of the 722
to protect it from damage in situations where too much
current is demanded from the outputs-such as a short
circuit from an output to its common. The circuit limits input
current to approximately 150mA for an input voltage of
15VDC (for B of 2N2219 of 50).
Output channels(2) may be connected in series or parallel for
higher output voltage or current.
P+ +V01
+
ISOLATION CONFIGURATIONS
C,
The fact that the two outputs of the 722 are isolated from the
input and from each other allows both two-port and threeport isolation connections.
Figure I shows Burr-Brown's 3650 optically coupled isolation amplifier connected in three-port configuration. One of
the 722 channels provides power to the 3650's input. The
other channel supplies power to the 3650's output. The
amplifier's input and output are isolated from each other and
the system's power supply common. In this configuration,
the 722's channel-to-channel isolation specification applies
to the amplifier input-to-output voltage.
Y'N
v+
-V01
E
+V02
v-
-V02
IN4148
c2
1000
722
FIGURE 2. Short Circuit Protection.
+15V -15V
+V01 P+
~
C,
-V01
v+
+V02
E
+15V
~
Q
o
c2
-V02
722
a:
V-
c..
/
Power
Com
Supply
Common
Com #2
Figure 3 illustrates how the 722 may provide isolated input
power to the input stage of two 3650' s connected in the twoport configuration. Power for the output stage is provided by
the system + 15V and -15V supplies. Input stages are isolated from each other and from the system supply. In this
situation, the 722's input-to-output isolation specification
applies to the amplifier's input-to-output voltages, while the
channel-to-channel 722 specification applies to the voltage
existing between "IJP Com #1" and "IJP Com #2."
/
+15V-15V
O/PCom
~~~
...----<.vv~
FIGURE 1. TII_ree-Port Isolation
rv
H
~
L
-15V
"
FIGURE 3. Two-Port Isolation with Two 3650's.
NOTES: (1) "Output" denotes a single output terminal
(+V or -V) and its associated common. (2) "Channel"
denotes a pair of outputs (+V and -V) and their
associated common.
BURR-BROWN®
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5.183
z
o
ti
....I
o
~
For Immediate Ass/stance, Contact Your Local Salesperson
BURR-BROWN@
724
IE5IE5II
QUAD ISOLATED DC/DC CONVERTER
FEATURES
APPLICATIONS
• QUAD ISOLATED ±8V OUTPUTS
• MEDICAL EQUIPMENT
• INDUSTRIAL PROCESS CONTROL
• HIGH BREAKDOWN VOLTAGE:
3000VTest
• TEST EQUIPMENT
• DATA ACQUISITION SYSTEMS
• NUCLEAR INSTRUMENTATION
• LOW LEAKAGE CURRENT: <1!lA at
240V/60Hz
• LOW COST PER ISOLATED CHANNEL
• SMALL SIZE: 27.9mm X 27.9mm X 6.6mm
(1.1" X 1.1" X 0.26")
DESCRIPTION
The 724 converts a single 5VDC to 16VDC input into
four pairs of bipolar output voltages of approximately
half the output voltage. The converter is capable of
providing a total output current of 128mA at rated
voltage accuracy and up to SOOmA without damage.
The four output channels are isolated from the input
and from each other. They may be connected independently, in series for higher output voltage, or in parallel for higher output cUrrent as a single channel isolated DCIDC converter.
Integrated circuit construction of the 724 reduces size
and cost. High isolation breakdown voltages and low
leakage currents are assured by special design and
construction which includes use of a high dielectric
strength, and low leakage coating used on the internal
assembly.
A self-contained 800kHz oscillator drives switching
circuitry, which is designed to eliminate the common
problem of input current spiking due to transformer
saturation or crossover switching.
p+Q--------------------.
v-o-----~~--------4_~
Inl8maUonal Airport Industrtal Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tol:(602)746-1111 • Twx: 9111-952·1111 • Cable:BBRCORP • Tel..: 066-6491 • FAX:(602)889-1510 • ImmediateProductlnlo:(800)54U132
5.184
PDS-405A
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SPECIFICATIONS
ELECTRICAL
At 25°C with V'N
=t 5V, R, = t .3kn, C = 0.47"F, unless otherwise noted.
INPUT
Input Va~age
Input Current
5
L lour = 24mA
L lOUT = t28mA, 25°C
L lOUT = 128mA, 25°C
L lOUT = 24mA, C = 0.47"F
L
= 128mA, C = 0.47"F
Input Ripple"")
ISOLATION
Test Valtage'~
Rated Voltage")
Isolation Impedance
Leakage Current
OUTPUT
Voltage(3)
Current for Rated Voltage
Total Safe Nondestructive Current
Load Regulation(3)
Ripple Voltage (5)
Difference of +V0 and -V0
Sensitivity to Input Voltage Change
Output Voltage Change
15
50
110
120
10
16
t25
25
Input-to-Output, 55 min
Channel-to-Channel, 55 min
Input-to-Output, Continuous
Channel-to-Channel, Continuous
Input-to-Output
Input-to-Output, 240V/60Hz
3000
3000
1000
1000
VDC
VDC
VDC
VDC
GQllpF
1.0
"A
9.0
8.3
t28
V
V
mA
500
200
mA
mA
200
mV, pk
mV,pk
mV
10116
8.0
7.5
At 15V Input IL = 3mA
IL=16mA
Total of All Outputs
Any One OutpU~"
Total of All Outputs
Any One Output
8.5
7.9
VDC
mA
mA
mA
mA, pk
mA,pk
3
'"
IL =3mA
IL =t6mA
+IL =-I L
35
±30
0.63
2
-25°C to +85°C
TEMPERATURE RANGE
Operating
-25
-55
V/V
%
~
+85
+125
NOTES: (1) 0.471'f external capacitor across "P+" to ''V-" pins and 12" of #24 wire to V'N' (2) See "Isolation Voltage Ratings" on page 5. The inpulla output and channel
to channel continuous AC rating is 700Vrms. (3) See ''Typical Performance Curves." (4) A minimum output current of 3mA at each output is recommended to maintain
output voltage accuracy. (5) Test bandwidth 10MHz, max.
CONNECTION DIAGRAMS
PACKAGE INFORMATION(')
MODEL
724
c
o~
D.
PACKAGE
PACKAGE DRAWING
NUMBER
20-Pin
102A
NOTE: (1) For detailed drawing and dimension table, please see end of data
she6t, or Appendix D af Burr Srm.·m !C Data Beck.
Z
o
~
...i
o
~
No pin present
No pin present
+V02
C2 10
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any althe circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
BURR-BROWN(!
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o
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5.185
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TYPICAL PERFORMANCE CURVES
All specifications typical at 25°C, unless otherwise noted.
OUTPUT VOLTAGE
vs INPUT VOLTAGE
16
k
L lOUT = 24mA
'L
0
2
=±3mA
~
~
/'
:::r
).
L lOUT = 12BmA_ 1c,=±16~A
o
o
~
5
10
IS
20
Input Voltage (V)
LOAD REGULATION
(Single Channel wijh Balanced Load)
9
9
IF 13mA
~ ,..,.~
RF is chosen for
'F = 3mA
1-
R;;Is chosen for
_'F=16mA
'F= 16mA
Test Condijion I
(Dual Output, Balanced Load)
Test Condijion 2
(Dual Output, Unbalanced Load)
6.5
6.5
o
10
20
30
40
o
50
10
20
30
40
50
'L
Output Current, + (mA)
. Output Current,I L+ = 'L- (mA)
TEST CONDITION I
(Balanced Load)
TEST CONDITION 2
(Unbalanced Load)
R,
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INSTALLATION AND
OPERATING INSTRUCTIONS
Typical application connections for the 724 are shown in
Figures I and 2. Primary power (VIN) is applied at the "P+"
and "V-" terminals. The common or ground for VIN may be
connected to either "P+" or "V-", the only requirement is
that "P+" and "V+" must be positive with respect to "V_".
Power for the internal oscillator and switch drivers is derived from the primary power by a voltage dropping resistor,
R,. The value of R, as a function of VIN is shown in the
"Typical Performance Curves" section. Alternately, voltage
for the "V+" terminal may be obtained from a separate
source. "V+" should be +5VDC to +7.5VDC positive with
respect to "V_". If a separate source is used, the V+ input
must be applied before the "P+" input to avoid possible
damage to the unit. P+ and V+ must remain positive with
respect to "V-" at all times (including transients). If necessary, diode clamps should be put across these inputs.
The "E" pin enables the converter when connected to "V+"
and disables it when connected to "V_".
An external capacitor, "C" (O.4711F ceramic), is used to
reduce input ripple. It should be connected as close to the
"P+" and "V-" pins as practical. Input leads to these terminals should also be kept as short as possible. Since the 724
is not internally shielded, external shielding may be appropriate in applications where RFI at the 800kHz nominal
oscillator frequency is a problem.
Each output is filtered with an internal 0.04711F capacitor.
Output ripple voltage can be reduced below the specified
value by adding external capacitors up to 101IF between
each output and its common.
DISCUSSION
OUTPUT CURRENT RATINGS
At rated output voltage accuracy, the 724 is capable of
providing 128mA divided among its eight outputs(l). A
minimum average output current of 3mA is recommended at
each output to maintain voltage accuracy.
Outputs channels(2) may be connected in series or parallel for
higher output voltage or current.
ISOLATION CONFIGURATIONS
The fact that the four outputs of the 724 are isolated from the
input and from each other allows both two-port and threeport isolation connections.
~
Figure I shows two 3650 optically coupled isolation ampli- ~
fiers connected in three-port configuration. Two of the 724
channels provide power to the 3650's inputs. The oth~~
channels supply power to both 3650's outputs. Eac~
amplifier's input and output are isolated from each other and
the system's power supply common. Isolation specification t/)
applies to the amplifier input-to-output voltage isolation 01specification.
~
Q
oa:
0..
+15VDC
P+ ~----~~.-~
+V01
Z
o
~
..J
o
C.
-vo•
v+
+VC2
E
c2
~
v-V02
Power Supply
Common
724
+V03
c.
Denote separate input
common 1 and input common 2.
-V03
+V04
c.
-:!=-
[j] [g]
Denote separate output
common 1 and output common 2.
-V04
FIGURE l. Three-Port Isolation.
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SHORT CIRCUIT PROTECTION
Figure 2 illustrates how the 724 may provide isolated input
power to the input stage of four 3650s connected in the twoport configuration. Power for the four output stages is
provided by the system +15VDC and -15VDC supplies.
Input stages are isolated from each other and from the
system supply. In this situation, the 724's isolation specification applies to amplifier's input-to-output voltage and to
the voltage existing between any two IIP COM terminals.
The circuit in Figure 3 may be added to the input of the 724
to protect it from damage in:· situations where too much
current is demanded from the outputs-such as a short
circuit from an output to its common. The circuit limits input
current to approximately 150mA for an input voltage of
15VDC (for {:J of 2N2219 of 50).
ISOLATION VOLTAGE RATINGS
NOTES: (1) 'Output" denotes a single output terminal (+V or -V) and its
associated common. (2) 'Channel" denotes a pair of outputs (+V and -V) and
their associated common. (3) Reference National Electrical Manufacturers
Association (NEMA) Standards Parts ICS 1·109 and ICS 1-111.
Since a "continuous" test is impractical in a product manufacturing situation (implies infinite test duration), it is generally accepted practice to perform a production test at a
higher voltage (i.e., higher than the continuous rating) for
some shorter length of time.
The important consideration is then "what is the relationship
between actual test conditions and the continuous derated
maximum specification?" There are several rules of thumb
used throughout the industry to establish this relationship.
Burr-Brown has chosen a very conservative one: VTEST =
(2 x VCONTINUOUSRATINO) + 1000V. This relationship is appropriate for conditions where the system transient voltages are
not well defined.(3) Where the real voltages are well defined
or where the isolation voltage is not continuous the user may
choose to use a less conservative derating to establish a
specification from the test voltage.
P+
+
724
V+
Y'N
E
V-
FIGURE 3. Short Circuit Protection.
-120
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5
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-160
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70°C
Min at Output
Supply ±15V
",,.,,,
-----
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0.3
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5
30
15
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20
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Frequency (kHz)
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3652 COMMON-MODE AND
ISOLATION-MODE REJECTION vs GAIN
3650 COMMON-MODE AND
ISOLATION-MODE REJECTION vs GAIN
140
120
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100
,
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60
100
100
10
1000
a:
12
.///,7'
S
%
0
..
80
'0
16
8
0.3
3
10
30
100
FrequencY (kHz)
,ElEI,
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,________
~
~
________
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Time of Operation (Hours)
~
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lOOK
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DEFINITIONS
NONLINEARITY
ISOLATION·MODE VOLTAGE, VISO
The isolation-mode voltage is the voltage which appears
across the isolation barrier, i.e., between the input common
and the output common. (See Figure 1.)
Two isolation voltages are given in the electrical specifications: ''rated continuous" and "test voltage". Since it is
impractical on a production basis to test a "continuous"
voltage (infinite test time is implied), it is a generally
accepted practice to test at a significantly higher voltage for
some reasonable length of time. For the 3650 and 3652, the
''test voltage" is equal to lOOOV plus two times the ''rated
continuous" voltage. Thus, for a continuous rating of 2000V,
each unit is tested at 5000V.
COMMON·MODE VOLTAGE, VCM
The common-mode voltage is ,the voltage midway between
the two inputs of the amplifier measured with respect to
input common. It is the algebraic average of the voltage
applied at the amplifiers' input terminals. In the circuit in
Figure I, (V+ + VJ/2 = VCM' (NOTE: Many applications
involve a large system "common-mode voltage." Usually in
such cases the term defined here as "VCM" is negligible and
the system "common-mode voltage" is applied to the amplifier as "VISO" in Figure 1.)
Nonlinearity is specified to be the peak deviation from a best
straightline expressed as a percent of peak-to-peak full scale
output (i.e. ±lOrnV at 20Vp-p '" 0.05%).
THEORY OF OPERATION
Prior to the introduction of the 3650 family optical isolation
had not been practical in linear circuits. A single LED and
photodiode combination, while useful in a wide range of
digital isolation applications, has fundamental limitationsprimarily nonlinearity and instability as a function of time
and temperature.
The 3650 and 3652 use a unique technique to overcome the
limitations of the single LED and photodiode isolator.
Figure 2 is an elementary equivalent circuit for the 3650,
which can be used to understand the basic operation without
considering the cluttering details of offset adjustment and
biasing for bipolar operation.
./
-
CR,
I,
!
I
I
I
I
Isolation Barrier
CR2
RK
-..-
ISOLATION·MODE REJECTION
The isolation-mode rejection is defined by the equation in
Figure I. The isolation-mode rejection is not infmite because there is some leakage across the isolation barrier due
to the isolation resistance and capacitance.
i/
Isolation Barrier
FIGURE 2. Simplified Equivalent Circnit of Linear Isolator.
Two matched photodiodes are used-one in the input (CR3)
and one in the output stage (CR,)-to greatly reduce
nonlinearities and time-temperature instabilities. Amplifier
AI' LED CR I• and photodiode CR3 are used in a negative
feedback configuration such that II = lIN Ra (where RG is the
user supplied gain setting resistor). Since CR, and CR3 are
closely matched. and since they receive equal amounts of
light froin the LED CRI (i.e .• A.I = A.J. 12 = II = lIN' Amplifier
A, is connected as a current-to-voltage converter with VOUT
= 12 RK where RK is an internal IMQ scaling resistor. Thus
the overall transfer function is:
C
(Output)
VOUT = VIN
FIGURE 1. illustration of Isolation-Mode and CommonMode Specifications.
NOTE: (1) The only effect of decreased LED outpul is a slight decrease in full
scale swing capabilify. See Typical Performance Curves.
~. (RG in Qs)
RG
This improved isolator circuit overcomes the primary
limitations of the single LED and photodiode combination.
The transfer function is now virtually independent of any
degradation in the LED output as long as the two photodiodes and optics are closely matched(l). Linearity is now a
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function of the accuracy of the matching and is further
enhanced by the use of negative feedback in the input stage.
Advanced laser trimming techniques are used to further
compensate for residual matching errors.
A model of the 3650 suitable for simple circuit analysis is
shown in Figure 3. The output is a current dependent voltage
source, VD' whose value depends on the input current. Thus,
the 3650 is a transconductance amplifier with a gain of one
volt per microamp. When voltage sources are used, the input
current is derived by using gain setting resistors in series
with the voltage source (see Installation and Operating
Instructions for details). RIN is the differential input impedance. The common-mode and isolation impedances are very
high and are assumed to be infinite for this model.
lower bias currents (50pA) and overvoltage protection. The
+IR and -IR inputs have a lOms pulse rating of 6000V
differential and 3000V common-mode (see Definitions for a
discussion of common-mode and isolation-mode voltages.)
The addition of the buffer amplifiers also creates a voltagein voltage-out transfer function with the gain set by Ra, and
Ra2·
INSTALLATION AND
OPERATING INSTRUCTIONS
POWER SUPPLY CONNECTIONS
The power supply connections for the 3650 and 3652 are
shown in Figure 5. When a DCIDC converter is used for
isolated power, it is placed in parallel with the isolation
barrier of the amplifier. This can lower the isolation impedance and degrade the isolation-mode rejection of the overall
circuit. Therefore, a high quality, low leakage DCIDC converter such as the Burr-Brown Model 722 should be used.
C'I
~
~
in
CD
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OFFSET VOLTAGE ADJUSTMENTS
23
-
10
c
(Output)
(Input)
+y
-y
FIGURE 3. Simple Model of 3650.
A simplified model of the 3652 is shown in Figure 4. The
isolation and output stages are identical to the 3650. Additlonallnput circuit....y consisting of PET buffer amplifiers and
input protection resistors have been added to give higher
differential and common-mode input impedance (lOlIO),
The offset nulling circuits are identical for the 3650 ~
3652 and are shown in Figure 5. The offset adjust circui
is optional and the units will meet the stated specifications
with the BAL terminals unconnected. Provisions are available to null both the input and output stage offsets. If the
amplifier is operated at a fixed gain, normally only one
adjustment will be used: the output stage (lOW adjustment)
for low gains and the input stage (50W adjustment) for high
gains, (> 10).
Use the following procedure if it is desired to null both input
and output components. (For example, if the gain of the
amplifier is to be switched). The input stage offset is first
nulled (50kO adjustment) with the appropriate input signal
pins connected to input common and the amplifier set at its
maximum gain, The eain i~ then set to its minimum value
and the output offset is nulled (lOW adjustment).
Same as 36!!0 in Figure 3,
+IR 1.6MQ
6
40---+-1
+1
10
=t(:3
.-...-
17
c
(Output)
FIGURE 4. Simple Model of 3652.
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C
+15VDC
-15VDC
Output
Output
Common
NOTE: (1) Optional Offset Adjust.
FIGURE 5. Power and Offset Adjust Connections.
NOTE: (1) The offset adjustment circutry and power supply connections
have been omilled for simplicity. Refer to Figure 5 for details. (2) IMRR
here is in pAN, typically 5pAN at 60Hz and 1pAN at DC.
INPUT CONFIGURATIONS
Some possible input configurations for the 3650 and 3652
are shown in Figures 6a, 6b, 6c. Differential input sources
are used in these examples. For situations with nondifferential
inputs, the appropriate source term should be set to zero in
the gain equations and replaced with a short in the diagrams.
FIGURE 6a. 3650 with Differential Current Sources.
Figure 6a shows the 3650 connected as a transconductance
amplifier with input current sources. Voltage sources are
shown in Figure 6b. In this case the voltages are converted
to currents by Rm and Ro2' As shown by the equations, they
perform as gain setting resistors in the voltage transfer
function. When a single voltage source is used, it is recommended (but not essential) that the gain setting resistor
remain split into two equal halves in order to minimize
errors due to bias currents and common-mode rejection (see
Typi<;al Performance Curves).
Figure 6c illustrates the connections for the 3652 when the
FET buffer amplifiers, A, and A 2, are used. This configuration provides an isolation amplifier with high input impedance (both common-mode and differential, and good common-mode and isolation-mode rejection. It is a true isolated
instrumentation amplifier which has many benefits for noise
rejection when source impedance imbalances are present.
In the 3652, the voltage gain of the buffer amplifiers is
slightly less than unity, but the gain of the output stage has
been raised to compensate for this so that the overall transfer
function from the ±I or ±IR inputs to the output is correct. It
should be noted that A, and A, are buffer amplifiers. No
summing can be done at the ±I or ±IR inputs. Figure 6c
shows the +1 and -I inputs used. If more input voltage
protection is desired, then the +IR and -IR inputs should be
used. This will increase the input noise due to the contribution from the 1.6MQ resistors, but will provide additional
differential and common-mode protection (IOms rating of
3kV).
Vwr
7
VOUT=~Vl-V2)+ I~I:] [RG1+R::ilRIN+Ro]
NOTE: (1) The offset adjustment circutry and power supply oonnections
have been omilled for simplicity. Refer to Figure 5 for details.
FIGURE 6b. 3650 with Differential Voltage Sources.
ERROR ANALYSIS
A model of the 3650 snitable for DC error analysis of offset
voltage, voltage drift versus temperature, bias current, etc.,
is shown in Figure 7.
A, and A" the input and output stage amplifiers, are considered to be ideal. Separate external generators are used to
model the offset voltages and bias currents. RIN is assumed
to be small relative to Ro, and Ro2 and is therefore omitted
from the gain equation. The feedback configuration, optics
and component matching are such that I, = 12 = 1, = 14, A
simple circnit analysis gives the following expression for the
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NOTE: (1) The offset adjustment circutry and power supply connections
N
In
CD
have been omitted for simplicity. Refer to FiQure 5 for details.
FIGURE 6c. 3652 with Differential Voltage Sources.
~
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..---::,-----t.., ).
en
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V
u:::
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FIGURE 7. DC Error Analysis Model for 3650.
.
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(500V)
3650HG
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20
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26 _VccL---'::.:....:='------L--
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4 ~~
+Vcc
I/O Com 12 w
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722
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0
0
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VOUT
g
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:;
14
'--
/
\.
D
4'r~1
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'0
Z
Input Stage
1111
10
-75
-55
-50
-25
o
25
Temperature ("C)
50
75 85100
0.1
10
100
lk
I
10k
lOOk
Frequency (Hz)
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TYPICAL PERFORMANCE CURVES (CO NT)
All specifications typical at +25°C, unless otherwise specified.
QUIESCENT CURRENT vs TEMPERATURE
"1.
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ISOLATED OUTPUT VOLTAGE AND CURRENT
vs TEMPERATURE
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i
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-55
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Rc is resistance in series
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II ~III
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9
8
75 85 100
50
ISOLATION-MODE REJECTION vs GAIN
15 r-------r-------r-------r-----~ 10
E
25
Temperature (Oe)
QUIESCENT CURRENT AND ISOLATED VOLTAGE
OUTPUT vs SUPPLY VOLTAGE
J
o
-25
Temperature (OC)
1 1:-:- --
L
-- _r.- --
Re-O-:-:-_
l--':'r:-
--- I::-:" --
.
Re ~ 5kil
--
;:-;--
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- - - - Unshielded
80
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100
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1000
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ISOLATION MODE REJECTION
vs FREQUENCY
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AC AND DC LEAKAGE CURRENT vs ISOLATION VOLTAGE
50
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100
1k
10k
100k
40
r--·----·t----t--·---i-·-----r
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4k
o
2k
6k
Frequency (Hz)
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05
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o
6k
10k
Isolation VoHaqe (Vp)
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THEORY OF OPERATION
Details of the 3656 are shown in Figure 1. The external
connections shown, place it in its simplest gain configuration -unity gain, noninverting. Several other amplifier gain
configurations and power isolation configurations are
possible. See Installation and Operating Instructions and
Applications sections for details.
Isolation of both signal and power is accomplished with a
single miniature toroid transformer with multiple windings.
A pulse generator operating at approximately 750kHz provides a two-part voltage waveform to transformer, T I. One
part of the waveform is rectified by diodes DI through D. to
provide the isolated power to the input and output stages
(+V, -V and V+, V-). The other part of the waveform is
modulated with input signal information by the modulator
operating into the V 2 winding of the transformer.
The modulated signal is coupled by windings W6 and W 7 to
two matched demodulators---~---+--o Vour
~p;u~;e~G~E;N~~--JL~-~+
i-+-
O._47..:..~F_T~_ _
20Li_ _ _
15V
FIGURE 2. Power: Three-Port Isolation; Signal: Unity-Gain Noninverting.
:===::::19
1-'-'----+
O.47~F
FIGURE 3. Power: Two-Port, Dual Supply; Signal: Noninverting Gain.
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Inverting Gain, Voltage or Current Input
Total amplifier gain:
G=GloG,=VOUTVIN
(1)
Input Stage:
GI = 1 + (RAIFA)
(2)
(Select G I to be less than 5V/full scale VIN to limit
demodulator output to 5V).
RA + RF ~ 2MQ
(3)
(Select to load input demodulator with at least 2MQ).
Rc = RA II (RF+ 100kQ) =
RA (RF+ lOOkf.l)
RA + RF + 100kf.l
(4)
(Balance impedances seen by the + and - inputs
of Al to reduce input offset caused by bias current).
The signal portion of Figure 4 shows two possible inverting
input stage configurations: current and input, and voltage
input.
Input Stage:
For the voltage input case:
G I = -RplRs
(8)
(Select G I to be less than 5V/full scale VIN
to limit the demodulator output voltage to 5V).
RF = 2MQ
(Select to load the demodulator with
at least 2MQ).
Rc =
Rs
II (R I + 100kQ) =
Output Stage:
G, = 1 + (RxIRJ
(Select ratio to obtain VOUT between 5V and lOV
full scale with VIN at its maximum).
(5)
Rx II RK = 100kf.l
(Balance impedances seen by the + and - inputs
of A, to reduce effect of bias current on the
output offset).
(6)
~=~+~
m
(9)
Rs (RF + lOOkQ)
Rs + RF + lOOkQ
(10)
(Balance the impedances seen by the + and- inputs of AI).
:g
For the current input case:
VOUT = -lIN RF
0
G2
(11)
Rc = RF
(Load output demodulator equal to input demodulator).
~
(12)
Rp may be made larger than 2Mn if desired. The l O P .
capacitors are used to compensate for the input capacitanc
of Al and to insure frequency stability.
en
Output Stage:
The output stage is the same as shown in equations (5), (6),
and (7).
t3
::l
C
oa:
a..
100kll
z
o
~
...I
o
sa
15
+
>---3---<~VOUT
+
FIGURE 4. Power: Two-Port, Single Supply; Signal: Inverting Gains.
BURR~BROWN@l
I EiI Eill
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For Immediate Assistance; Contact YourLocal Salesperson
mustrative Calculations:
Step 6
The maximum input voltage is loomV. It is desired to
amplify the input signal for maximum accuracy. Noninverting
output is desired.
G2 = I + (RxfRK) = 2.0
:.RxfRK = 1.0
:.Rx = RK
(15)
Input Stage:
Step 7
Step 1
The resistance seen by the + input terminal of the output
stage amplifier A, (pin 13) is the output resistance 100kn of
the output demodulator. The resistance seen by the (-) input
terminal of A, (pin 14) should be matched to the resistance
seen by the + input terminal.
G, max = 5V/max Input Signal = 5V O.IV = 50VN
With the above gain of 50VN, if the input ever exceeds
100mV, it would drive the output to saturation. Therefore, it
is good practice to allow reasonable input overrange.
So, to allow for 25% input overrange without saturation at
the output, select:
G,=40VN
G, = I + (RF + RA) = 40
:. RF+ RA = 39
Step 2
(13)
The voltage divider with RA + RF = 2Mn is 2Mnt(2Mn +
lookn) = 21(2 + 0.1) =95.2%, i.e., the percent loading is
4.8%.
(14)
Step 3
Solving equations (13) and (14)
RA = 50kn and RF = 1.95Mn
Step 4
The resistances seen by the + and - input terminals of the
input amplifier A, should be closely matched in order to
minimize offset voltage due to bias currents.
·"Re = RA II (RF + 100kn)
= 50kn II (1.95Mn + lookn)
'" 49kn
Output Stage:
Step 5
VOUT = VINMAX • G, • G2
As discussed in Step I, it is good practice to provide 25%
input overrange.
So we will calculate G2 for lOY output and 125% of the
maximum input voltage.
:. VOUT = (1.25 ·0.1)(G,)(G2)
i.e., IOV = 0.125 ·40· G2
:.G2 = lOV/5V = 2VN
5.210
:.Rx II RK = lookn
(Rx • RJ!(Rx + RK) = lookn
RJ![I +(RKIR01 = lookn
(16)
Step 8
Solving equations (15) and (16) RK = 20kn and Rx = 200kn.
RA + RF forms a voltage divider with the lookn output
resistance of the demodulator. To limit the voltage divider
loading effect to no more than 5%, RA + RF should be chosen
to be at least 2Mn. For most applications, the 2Mn should
be sufficiently large for RA + RF. Resistances greater than
2Mn may help decrease the loading effect, but would
increase the offset voltage drift.
Choose RA + RF = 2Mn
The resistance seen by pin 14 is the parallel combination of
Rx and RK.
Step 9
The output demodulator must be loaded equal to the input
demodulator.
:.RB = RA + RF = 2Mn
(See equation (14) above in Step 2).
Use the resistor values obtained in Steps 3, 4, 8 and 9, and
connect the 3656 as shown in Figure 3.
OFFSET TRIMMING
Figure 5 shows an optional offset voltage trim circuit. It is
important that RA + RF = RB.
CASE I: Input and output stages in low gain, use output
potentiometer (R,) only. Input potentiometer (R,)
may be disconnected. For example, uuity gain
could be obtained by setting RA = ~ = 20Mn, Rc
= lookn, ~= 0, ~ = 100kn, andRK =00.
CASE 2: Input stage in high gain and output stage in low
gain, use input potentiometer (R,) only. Output
potentiometer (R,) may be disconnected. For
example, GT = 100 could be obtained by setting
RF = 2Mn, RB = 2Mn returned to pin 17, RA =
20kn, Rx = 100kn, and RK := 00.
CASE 3: When it is necessary to perform a two-stage
precision trim (to maintain a very small offset
change under conditions of changing temperature
and changing gain in A, and A,), use step I to
adjust the input stage and step 2 for the output
stage. Carbon composition resistors are acceptable, but potentiometers should be stable.
Step I: Input stage trim (RA = Rc = 20kn, Rj = RB = 20Mn.
Rx = 100kn, RK = 00, R, disconnected); A, high, A2
low gain. Adjust R, for OV ±5mV or desired setting
at VOUT' pin 15.
Burr-Brown Ie Data Book-Linear Products
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~
FIGURE 5. Optional Offset Voltage Trim.
;:)
Step 2: Output stage trim (RA = R. = 20Mn, Rc = lOOW,
RF =0, Rx = lOOW, Rx =00, R, and R2 connected);
A, low, A2 low gain. Adjust R, for OV ±lmV or
desired setting at VOUT ' pin 15 (±llOmV approximate total range).
NOTE: Other circuit component values can be used with
valid results.
oa:
output voltage to be. t..ri111rned to compensate for increased
o
APPLICATIONS
offset voltage caused by unbalanced impedances seen by the
inputs of the output stage amplifier.
ECG AMPLIFIER
In many modern electrocardiographic systems, the patient is
not grounded. Instead, the right-leg electrode is connected to
the output of an auxiliary operational amplifier as shown in
Figure 7. In this circuit, the common-mode voltage on the
body is sensed by the two averaging resistors, R, and R"
inverted, amplified, and fed back to the right-leg through
resistor R.. This negative feedback drives the commonmode voltage to a low value. The body's displacement
current id does not flow to ground, but rather to the output
circuit of A3. This reduces the pickup as far as the EeG
amplifier is concerned and effectively grounds the patient.
Although the features of the circuit shown in Figure 6 are
important in patient monitoring applications, they may also
be useful in other applications. The input circuitry uses an
external, low quiescent current op amp (OPAI77 type)
powered by the isolated power of the input stage to form a
high impedance instrumentation amplifier input (true threewire input). R3 and R4 give the input stage amplifier of the
3656 a noninverting gain of 10 and an inverting gain of -9.
R, and R, give the external amplifier a noninverting gain of
1 + 1/9. The inputs are applied to the noninverting inputs of
the two amplifiers and the composite input stage amplifier
has a gain of 10.
The 330W, 1W, carbon resistors and diodes D, - D4 provide
protection for the input amplifiers from defibrillation pulses.
The output stage in Figure 6 is configured to provide a
bandpass filter with a gain of 22.7 (68MOJ3Mn). The high-
The value of R4 should be as large as practical to isolate the
patient from ground. The resistors R, and R4 may be selected
by these equations:
R, = (R/2) (VJVeM) and R. = 01CM - Vo)/id
(-IOVS Vo S +lOV and -lOY S VCM S+lOV)
BURR-BROWN@
I EilEiII
Q
pass section (O.05Hz cutoff) is formed by the IIlF capacitor
and 3Mn resistor which are connected in series between the
output demodulator and the inverting input of the output
stage amplifier. The low-pass section (lOOHz cutoff) is
formed by the 68Mn resistor and 22pF capacitor located in
the feedback loop of the output stage. The diodes provide for
quick recovery of the high-pass filter to overvoltages at the
input. The lOOW pot and the lOOMn resistor allow the
Burr-Brown Ie Data Book-Linear Products
5.211
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...I
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For Immediate Assistance, Contact Your Local Salesperson
Ra
3MG
R,
11kG(2)
100MG(4)
High
Low
0,
+
-=-
15VOC
24V
O.5W
NOTES: (1) Bandpass O.OSHz to 100Hz. (2) Adjustable resistor may be used to achieve max common-mode
rejection between LA IRA and RL.(3) Negative 15V supply may be connected in place of 0.47~F capacitor navailable.
(4) See offset trimming section.
FIGURE 6. EeG Amplifier.
3MG
300kG
15
High
Out
Low
Out
~
Ra
Va ~~."I\I·~--t>--'
+V
-V
+1115VOC
FIGURE 7. Driven Right-Leg Amplifier.
,EaEa,
BURR-BROWN®
5.212
Burr-Brown Ie Data Book-Linear Products
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where V0 is the output voltage of A" and VCM is the
common-mode voltage between the inputs LA and RA and
the input common at pin 3 of the 3656.
This circuit has the added benefit of having higher commonmode rejection than the circuit in Figure 6 (approximately
10dB improvement).
BIPOLAR CURRENT OUTPUT
The three-port capability of the 3656 can be used to implement a current output isolation amplifier function-usually
difficult to implement when grounded loads are involved.
The circuit is shown in Figure 8 and the following equations
apply:
loUT
:s; ±2.5mA
V,:S; ±4V (compliance)
RL:S; 1.6kQ
RF + RA
be used to provide 15V for the pulse generator (pins 19 and
20). The input stage is configured as a unity gain buffer,
although other configurations such as current input could be
used. The circuit uses the isolation feature between the
output stage and the primary power supply to generate the
output current configuration that can work into a grounded
load. Note that the output transistors can only drive positive
current into the load. Bipolar current output would require
a second transistor and dual supply.
ISOLATED 4mA TO 20mA OUTPUT
Figure 10 shows the circuit of an expanded version of the
isolated current output function. It allows any input voltage
range to generate the 4mA to 20mA output excursion and is
also capable of zero suppression. The "span" (gain) is
adjusted by R2 and the "zero" (4mA output for minimum
input) is set by the 200kQ pot in the output stage. A threeterminal 5V reference is used to provide a stable 4mA
operating point. The reference is connected to insert an
adjustable bias between the demodulator output and the
noninverting input of the output stage.
A more practical version of the current output function is
shown in Figure 9. If the circuit is powered from a source
greater than 15V as shown, a three-terminal regulator should
CD
C")
=R, + R, :s; 2MQ
CURRENT OUTPUTLARGER UNIPOLAR CURRENTS
CD
II)
. .
DIFFERENTIAL INPUT
Figure 11 shows the proper connections for differential inpu
configuration. The 3656 is capable of operating in this input
configuration only for floating loads (Le., the source VIN
has no connection to the ground reference established at
pin 3). For this configuration the usual2MQ resistor used in
~
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15
+
FIGURE 8. Bipolar Current Output.
BURR-BROWN®
1E:I E:l1
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For Immediate Assistance, Contact Yoor Local Salesperson
FIGURE 9. Isolated I to 5Vn/4rnA to 20rnA lOUT"
+
V,N
FIGURE 10. Isolated 4rnA to 20rnA lOUT"
BURR·BRQWN®
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lOOk!)
15
+
>--':~"""-{)VOUT
~
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FIGURE 11. Differential Input, Floating Source.
the input stage is split into two halves, RF and RF-' The
demodulator load (seen by pin 10 with respect to pin 3) is
still 2MQ for the floating load as shown. Notice pin 19 is
common in Figure 11 whereas pin 20 is common in previous
figures.
SERIES STRING SOURCE
Figure 12 shows a situation where a small voltage, which is
part of a series string of other voltages, must be measured.
The basic problem is that the small voltage to be measured
is 500V above the system ground (i.e., a system commonmode voltage of 500V exists). The circuit converts this
system CMV to an amplifier isolation mode voltage. Thus,
the isolation voltage ratings and isolation-mode rejection
specifications apply.
IMPROVED INPUT CHARACTERISTICS
In situations where it is desired to have better DC input
amplifier characteristics than the 3656 normally provides, it
is possible to add a precision operational amplifier as shown
in Figure 13. Here the instrumentation grade OPAI77 is
supplied from the isolated power of the input stage. The
3656 is configured as a unity-gain buffer. The gain of the
OPAI77 stage must be chosen to limit its full scale output
voltage to 5V and avoid overdriving the 3656's demodulators. Since the 3656 draws a significant amount of supply
current, extra filtering or the input supply is required as
shown (2 X 0.471JF).
0
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Q.
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0
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ELECTROMAGNETIC RADIATION
The transformer coupling used in 3656 for isolation makes
the 3656 a source of electromagnetic radiation unless it is
properly shielded. Physical separation between the 3656 and
sensitive components may not give sufficient attenuation by
itself. In these applications, the use of an electromagnetic
shield is a must. A shield, Burr-Brown lOOMS, is specially
designed for use with the 3656 package. Note that the offset
voltage appearing at pin 15 may change by 4mV to 12mV
with use of the shield; however, this can be trimmed (see
Offset Trimming section).
The information provided herein is believed to be reliable; however, BURR·BROWN assumes no responsibility for inaccuracies or omissions. BURR·BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the usefs own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR·BROWN does not
authorize or warrant any BURR·BROWN product for use in life support devices andior systems.
BURR~BROW'NiI!I
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0
Burr-Brown Ie Data Book-Linear Products
5.215
~
For Immediate Assistance, Contact Your Local Salesperson
FlGURE 12. Series Source.
1001<0
15
Vour = [1 + (R,/R.)] V,N
FlGURE 13. Isolator for Low-Level Signals.
BURR - BROWNe
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6 Optical Sensors
Optical Electronic Integrated Sensors (OEICs)
combine the building blocks traditionally used in
a transimpedance amplifier on a single monolithic
die. The photodiode; low noise, low bias current
FET-input operational amplifier, and feedback
network are matched to optimize performance.
Our monolithic sensor/amplifier combinations free
designers from the tedious design rules necessary
to optimize responsivity and speed while maintaining stability and minimal gain peaking in discrete solutions. Other errors that are reduced by a
monolithic solution are leakage current errors and
noise.
Light falling on the photodiode section of the die
is converted to a current. The op amp is connected
as a transimpedance amplifier, converting the photodiode current into an output voltage which is
proportional to the intensity and wavelength of the
light.
Several models and package options are available
to allow flexibility in configuring light measurement systems. An external resistor can be placed
in series with the internal IMQ to increase
responsivity in all packages, or placed in parallel
to reduce the overall responsivity (in all packages
except the SIP).
OPTIOI-This device was designed to operate on
a single power supply of +2.7V to +36V, with a
quiescent current of only 120J.LA at dark. Response
peaks at 850nm with a response of O.6A1W.
OPT202-This is currently the fastest of BurrBrown's OEICs with a 50kHz signal bandwidth.
Available in clear plastic DIP and SIP packages,
as well as a hermetic ceramic DIP.
OPT209-This device is available in plastic DIP,
and will help to improve your signal-to-noise ratio
in systems not needing the full 50kHz bandwidth
of the OPT202.
OPT301-This OEIC is packaged in a hermetic
TO-99 package with a glass window, and is specified over the extended industrial temperature range
of -40°C to +85°C. Offering a hermetic package
and enhanced UV performance, the OPT301 has a
4kHz signal bandwidth.
II
rn
II:
0
~
W
Boldface = NEW
OPTICAL SENSORS
Model
Bandwidth
(kHz)
OPT101P
OPT101W
OPT202G
OPT202P
OPT202W
OPT209P
OPT301
20
20
50
50
50
16
4
Dark Errors
(mV)
Max
Quiescent
Current at
Dark
(J.lA)
Max
10<')
10<')
2
2
2
+120
+120
2
±SOD
2
±SOD
±500
±sOD
±sOD
Power
Supply
(V)
Photodlode
Size
DC
Transimpedance
Gain (VIA)
Typ
+2.7 to +36
+2.7 to +36
±2.25to ±18
±2.25to±18
±2.25to±18
±2.25to ±18
±2.25to±18
0.09" x 0.09"
0.09" x 0.09"
0.09" x 0.09"
0.09" x 0.09"
0.09" x 0.09"
0.09" x 0.09"
0.09" x 0.09"
10"
10'
10"
10"
10'
10'
10"
Responsivily
at 650nm
Typ
Pkg
Page
No.
0.45
0.45
0.45
0.45
0.45
0.45
0.45
8-Pln PDIP
5-PinSIP
8-Pln CERDIP
8-Pin PDIP
5-PinSIP
8-Pin PDIP
To-gg
6.2
6.2
6.4
6.4
6.4
6.13
6.24
(A/W)
NOTE: (1) Pedestal introduced for single supply operation.
BURR~BROWN®
I EilEiII
Burr-Brown Ie Data Book - Linear Products
6_1
rn
...!
-<~JW-+("'5)-...o Vo
~~~-'~~--~~--~~--~~o
100 200 300 400 500
(SIP)
DIP
600
700 800 900 1000 1100
Wavelengtl1 (nm)
International Airport Industrtal Park • Mailing Add.....: PO Box 11400 • Tucson, AZ 85734 • Street Add....: 6730 S. Tucson Blvd. • Tucson, AZ 85708
Tel: (602) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (602) 889-1510 • Immediate Product Info: (800) 548-6132
6.4
PDS·1200c
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
ELECTRICAL
v, = ±15V,1. =650nm, intemallMO feedback resistor, unless otherwise noted.
TA = +25·C,
0PT202P, W, G
PARAMETER
MIN
CONDI110NS
RESPONSIVITV
Photodlode Current
Voltage Outpul
vs Temperature
Unit-ta-Unit Variation
Nonlinearity(1)
Photodiode Area
DARK ERRORS, RTO'"
Offset Voltage, Output: P, W Packages
G Package
vs Temperature
vs Power Supply
Voltage Noise
650nm
650nm
650nm
FS Output = 10V
(0.090 x 0.090in)
(2.29 x 2.29mm)
0.45
0.45
100
±5
0.01
0.008
5.2
V, = ±2.25V to ±18V
Measured BW = 0.1 Hz to 100kHz
±a.5
±a.5
±10
10
1
RESISTOR-l MQ Internal
Resistance
Tolerance: P, G Packages
W Package
vs Temperature
FREQUENCY RESPONSE
Bandwidth, Large or Small-Signal, --3dB
Rise Time, 10% to 90%
Settling Time, 1%
0.1%
0.01%
Overload Recovery Time (to 1%)
OUTPUT
Voltage Output
1
±a.5
±a.5
50
FS to Dark
FS to Dark
FS to Dark
100% Overdrive, V, = ±15V
100% Overdrive, V, = ±5V
100% Overdrive, V, = ±2.25V
RL = 10kO
RL = 5kO
(V+) - 1.25
(V+) -2
Capacilive Load, Stable Operation
Short-Circuit Current
POWER SUPPLY
Specifled Operating Voltage
Operating Voltage Range
Quiescent Current
TVP
MAX
NW
V/jJ.W
ppm/·C
%
%of FS
in2
mm'
±2
±3
100
±2
MO
%
%
ppmrc
N
0
N
kHz
I's
(V+) - I
(V+) - 1.5
10
±18
V
V
nF
mA
en
a::
0
en
V
V
I'A
W
±400
ID..
j!.S
0
j!.S
j!.S
j!.S
j!.S
I's
±15
Vo = a
mV
mV
jJ.V/·C
jJ.VN
mVrms
50
10
10
20
40
44
lOa
240
±2.25
TEMPERATURE RANGE
Spe~!fi~atit)!"; P, W PRr.k~!Jp.~
G Package
Operating,
P, W Packages
G Package
Storage
p, W Packages
G Package
Thermal Resistance, 6JA
UNITS
±18
±500
Z
en
...I
a
-40
0
-55
-25
-55
+70
+85
+70
+125
+85
+125
100
I AND SOLDERING
ABSOLUTE MAXIMUM RATINGS
Supply Voltage ................................................................................... ±18V
Input Voltage Range (Common Pin) .................................................... ±Vs
Output Short-Circuit (to ground) ............................................... Continuous
Operating Temperature: P, W ........................................... -25°C to +85°C
G ............................................. -55°C to +125°C
Storage Temperature: P, W ........................................... -25°C to +85°C
G ............................................. -55°C to +125°C
Junction Temperature: P, W .......................................................... +85°C
G ............................................................. +150°C
Lead Temperature (soldering, lOS) ................................................ +300°C
(Vapor-Phase Soldering Not Recommended on Plastic Packages)
Clear plastic does not contain the structural-enhancing fillers
used in black plastic molding compound. As a result, clear
plastic is more sensitive to environmental stress than black
plastic. This can cause difficulties if devices have been stored
in high humidity prior to soldering. The rapid heating during
soldering can stress wire bonds and cause failures. Prior to
soldering, it is recommended that plastic devices be baked-out
at 85°C for 24 hours.
The fire-retardant fillers used in black plastic are not compatible with clear molding compound. The 0PT202 plastic
packages cannot meet flammability test, UL-94.
PACKAGE INFORMATION(')
MODEL
OPT202P
OPT202W
OPT202G
PACKAGE
PACKAGE DRAWING
NUMBER
8-Pin Plastic DIP
SoPin Plastic SIP
a-Pin Ceramic DIP
006-1
321
161-1
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
,EilEiI,
~
o
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap~"
propriate precautions. Failure to observe proper handling an~
installation procedures can cause damage.
F=
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BURR - BROWNe
Burr-Brown Ie Data Book-Linear Products
6.7
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TYPICAL PERFORMANCE CURVES
At T A = +25°C, Vs= ±15V,).= 650nm, unless otherwise noted.
NORMALIZED SPECTRAL RESPONSIVITY
1.0
i
0
"
E
/'-1 4-\
O.S
~ 0.6
/
6
E
~ 0.4
"
0
"0
i
z~
VOLTAGE RESPONSIVITY vs RADIANT POWER
10 _ _ _
rl1".
0.2
/
/
650nm
(0.45A1W)
/
(O.4SAIW)
1\
\
\
\
/
I\,
/
0
0.001 '-""-.u.u.w........l-......w.u......I....J..J..l.Wu...-.l....L..I.U.WI...--I...J..UoWlI
100 200 300 400 500
600
700 SOD 900 1000 1100
0.01
0.1
10
100
lk
Wavelength (nm)
Radiant Power (~W)
VOLTAGE RESPONSIVITY vs IRRADIANCE
VOLTAGE OUTPUT RESPONSIVITY vs FREQUENCY
= IOMQ-
R
1 0 _ "
~
~
:1
0.1
~
a: 0.01
0.001
0.001
'-!....J...""-IJJI-.J...J..wJWJ......J...u.J.J.WI.......!....J..J..J.J.W1.....1....J...J..J.WlI
0.01
0.001
0.1
10
100
100
10k
lk
RESPONSE vs INCIDENT ANGLE
1.0
I
f--
."
O.S
a.
0.6
0
.,
~
0.4
a:
"*
I
o
-~
~-'
o
O.S
Ely
I'..
.
l\-
iI
±40
Incident Angle (0)
-........
"\.
O.SO
S 0.70
0.6
!
0.4
i
~
0.2
1\
\
0.50
±60
JZ
k"'ir
A··'··
'8x
0.40
02.0
0.10
±60
"-\
0.60
a: 0.30
o
±20
1.00
0.90
~
~~ "" '""-'" ""
i
0.2
I.............
...........
c:
8!
a:
1
10M
RESPONSE vs INCIDENT ANGLE
1.0
~:r--
1M
lOOk
Frequency (Hz)
Irradiance (W/m2)
o
o
10
Ceramic
20
30
40
ax and Ely
\
\
\
50
60
70
SO
90
Angle of Incidence
aURR-BROWN®
6.8
Burr-Brown Ie Data Book-Linear Products
IEilEilI
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TYPICAL PERFORMANCE CURVES
At TA = +25°C. Vs = ±t5V. l. = 650nm. unless otherwise noted.
OUTPUT NOISE VOLTAGE
vs MEASUREMENT BANDWIDTH
QUIESCENT CURRENT vs TEMPERATURE
0.6
r--,.--,.--,.--,.--,.--,.--,.---,
1!r' ... _.
1
5;
8
0.4
I----'-t-.-::----I--I--!-;---:-:l;;,-;--I--I--I
f----. --/" Vs = ±t5V f - - - - - ---K
1-1---._-__+_-._-'.:, _.'+f-.....--::-~__-~r-,.._;,~::~::;:--=~t-------~=-+f"--.-:----t+-:-l
0.3
1--_+-_+_-11-__1--_-+1--==1-.....-\;-;;=::1
0.5
-
.a
0.2
""ffn
t- noise measured beyond itI:-i-tttt--t-ti±l~••
§
f--=-TlfFr=F RF
10M
f 1= 'R
~1~~~~~~~~~~~~~~~1I~~!l
F=
1,-1---,- -.-.-. Dice---
100MQ
10-0~~~~~!I~!I~~~~~~R~=~10~0~1ill~~
~> 10-<;
~_ _ _ _ _ R_
F =1MO
__
1--1--1--1--1--1--1--1--1
a
..
_ 10""" ~ the signal bandwidth.
. .-.: : :.
1----.. --. V = ±2.25V
___
t" Dotted lines indicate .11
I··
I----f--f----+----I
O.t
f----f---+---f---+---+---f----- t - OL--'-----L----l.--'--....l...._-'-_...l----I
-75
-50
-25
25
50
75
100
1~7~~~~~~~~~~~~~~~~~
t25
1
10
100
Temperature (OC)
10k
1k
100k
1M
Frequency (Hz)
C'\I
o
SMALL-SIGNAL RESPONSE
~
LARGE-SIGNAL RESPONSE
o
II
en
a:
oen
z
w
10IJ.S/div
en
<
o
10IJ.S/div
..J
NOISE EFFECTIVE POWER
vs MEASUREMENT BANDWIDTH
1~~~~~~~~~a!~!
i= Dotted lines indicate
10-0
noise measured beyond
the signal bandwidth.
A.= 650nm
F
i=
D..
DISTRIBUTION OF RESPONSIVITY
o
60
-+++-H-+++-H-+++-H...f-1-l RF = t 001ill
50
40
~
.l!l
"
30
::::l
20
10
0
0.43
0.44
0.45
0.46
0.47
0.48
Responsivily (A/W)
to
100
1k
10k
100k
1M
Frequency (Hz)
BURR-BROWN®
IE!lE!lI
Burr-Brown Ie Data Book-Linear Products
6.9
Forlmmediate Assistance, Contact Your Local Salesperson
minimize this effect. Sensitive junctions are shielded with
APPLICATIONS INFORMATION
metal, and differential stages are cross-coupled. Furthermore,
Figure 1 shows the basic connections required to operate the
0PT202. Applications with high-impedance power supplies
may require decoupling capacitors located close to the
device pins as shown. Output is zero volts with no light and
increases with increasing illumination.
(Pin availa!:!le on DIP only)
10 is proportional
(OV)
- ID
3pF
to light intensity
(radiant power).
A~D!
>-4-.iw'+.......{) Vo
Vo= ID RF
+15V
the photodiode area is very large relative to the op amp input
circuitry making these effects negligible.
If your light source is focused to a small area, be sure that
it is properly aimed to fall on the photodiode. If a narrowly
focused light source were to miss the photodiode area and
fall only on the op amp circuitry, the OPT202 would not
perform properly. The large (0.090 X 0.090 inch) photodiode
area allows easy positioning of narrowly focused light sources.
The photodiode area is easily visible-it appears very dark
compared to the surrounding active circuitry.
The incident angle of the light source also affects the
apparent sensitivity in uniform irradiance. For small incident
angles, the loss in sensitivity is simply due to the smaller
effective light gathering area of the photodiode (proportional
to the cosine of the angle). At a greater incident angle, light
is diffused by the side of the package. These effects are
shown in the typical performance curve "Response vs Incident
Angle."
-15V
FIGURE 1. Basic Circuit Connections.
For RF > 1MQ
Photodiode current, 10 , is proportional to the radiant power
or flux (in watts) falling on the photodiode. Ata wavelength
of 650nm (visible red) the photodiode Responsivity, RI , is
approximately 0.45A1W. Responsivityat other wavelengths
is shown in the typical performance curve "Responsivity vs
Wavelength."
1750
The typical performance curve "Output Voltage vs Radiant
Power" shows· the response throughout a wide range of
radiant power. The response curve "OutPut Voltage vs
Irradiance" is based on the photodiode area of 5.23 x 1()-6m2.
The 0PT202' s voltage output is the product of the photodiode
current times the feedback resistor, (loRF). The internal
feedback resistor is laser trimmed to IMQ ±2%. Using this
resistor, the output voltage responsivity, R v, is approximately
0.45V/IlW at 650nm wavelength.
An external resistor can be connected to set a different
voltage responsivity. Best dynamic performance is achieved
by connecting REXT in series (for R., > IMQ), or in parallel
(for RF < IMQ), with the internal resistor as shown in
Figure 2. Placing the external resistor in parallel with the
internal resistor requires the DIP package. These connections
take advantage of on-chip capacitive guarding of the internal
resistor, which improves dynamic performance. For values
of RF less than IMQ, an external capacitor, C EXT' should be
connected in parallel with RF (see Figure 2). This capacitor
eliminates gain peaking and prevents instability. The value
of CEXT can be read from the table in Figure 2.
LIGHT SOURCE POSITIONING
The OPT202 is 100% tested with a light source that uniformly
illuminates the full area of the integrated circuit, including
the op amp. Although all IC amplifiers are light-sensitive to
some degree, the 0PT202 op amp circuitry is designed to
0PT202
ForR F < 1MQ
1MQ
4
Circun Requires
DIP Package
EQUIVALENT R,
e""
100MQ
10MQ
1MQ
330kll
,;100kQ
,.,
(1)
'"
2pF
(2)
NOTES: (1) No CEXT required. (2)
Not recommended due to possible
op amp instability.
FIGURE 2. Using External Feedback Resistor.
BURR~EIROWN~
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
DARK ERRORS
The dark errors in the specification table include all sources.
The dominant error source is the input offset voltage of the
op amp. Photodiode dark current and input bias current of
the op amp are in the 2pA range and contribute virtually no
offset error at room temperature. Dark current and input bias
current double for each 10°C above 25°C. At 70°C, the error
current can be approximately 100pA. This would produce a
ImV offset with R F= lOMO. The OPT202 is useful with
feedback resistors of 100MO or greater at room temperature.
The dark output voltage can be trimmed to zero with the
optional circuit shown in Figure 3.
When used with very large feedback resistors, tiny leakage
currents on the circuit board can degrade the performance of
the 0PT202. Careful circuit board design and clean assembly
procedures will help achieve best performance. A "guard
ring" on the circuit board can help minimize leakage to the
critical non-inverting input (pin 2). This guard ring should
encircle pin 2 and connect to Common, pin 8.
lMn
3pF
100~A
112 REF200
5000
v+
v-
loo~A
1/2 REF200
6
v-
Adjust dark output for OV.
Tr!m Range: ±7rrtV
simple RIC circuit with a -3dB cutoff frequency of 50kHz.
This yields a rise time of approximately 1O}JS (10% to 90%).
Dynamic response is not limited by op amp slew rate. This
is demonstrated by the dynamic response oscilloscope
photographs showing virtually identical large-signal and
small-signal response.
Dynamic response will vary with feedback resistor value as
shown in the typical performance curve "Voltage Output
Responsivity vs Frequency." Rise time (10% to 90%) will
vary according to the -3dB bandwidth produced by a given
feedback resistor value-(1)
where:
tR is the rise time (10% to 90%)
fc is the -3dB bandwidth
NOISE PERFORMANCE
Noise performance of the 0PT202 is deterruined by the op
amp characteristics in conjunction with the feedback
components and photodiode capacitance. The typical
performance curve "Output Noise Voltage vs Measurement
Bandwidth" shows how the noise varies with RF and measured
bandwidth (1Hz to the indicated frequency). The signal
bandwidth of the 0PT202 is indicated on the curves. Noise
can be reduced by filtering the output with a cutoff frequency
equal to the signal bandwidth.
•
Output noise increases in proportion to the square-root of th
feedback resistance, while responsivity increases linearly
with feedback resistance. So best signal-to-noise ratio is
achieved with large feedback resistance. This comes with
the trade-off of decreased bandwidth.
The noise performance of a photodetector is sometimes
characterized by Noise Effective Power (NEP). This is the
radiant power which would produce an output signal equal
to the noise level. NEP has the units of radiant power
(watts). The typical performance curve "Noise Effective
Power vs Measurement Bandwidth" shows how NEP vanes
with R" and measurement bandwidth.
FIGURE 3. Dark Error (Offset) Adjustment Circuit.
CJ)
a:
0
CJ)
Z
W
CJ)
...I
«
o
~
o
Current output of the photodiode is very linear with radiant
power throughout a wide range. Nonlinearity remains below
approximately 0.01% up to 1001lA photodiode current. The
photodiode can produce output currents of lOrnA or greater
with high radiant power, but nonlinearity increases to several
percent in this region.
3pF
Gain Adjustment
+50%;-0%
This very linear performance at high radiant power assumes
that the full photodiode area is uuiformly illuminated. If the
light source is focused to a small area of the photodiode,
nonlinearity will occur at lower radiant power.
DYNAMIC RESPONSE
FIGURE 4. Responsivity (Gain) Adjustment Circuit.
BURR - BROWN@
IEilEilI
~
o
D..
LINEARITY PERFORMANCE
Using the internal IMO resistor, the dynamic response of
the photodiode/op amp combination can be modeled as a
N
o
Burr-Brown Ie Data Book-Linear Products
6.11
For Immediate Assistance, Contact Your Local Salesperson
3pF
3pF
+
Vz
3.3V
(pesudo-ground)
Advantages: High gain with low resistor values.
Less sensitive to circuit board leakage.
Disadvantage: Higher offset and noise than by using high
value for RF.
NOTE: (t) Zener diode or other shunt regulator.
FIGURE 5. ''T' Feedback Network.
FIGURE 7. Single Power Supply Operation.
3pF
R3
tOOkO
C,
R,
IO.1~F
tMQ
2
R,
1kll
1MQ
4
FIGURE 6. Current Output Circuit.
Other application circuits can be seen in the
OPT209 data sheet.
See AB-061 lor details.
Circuit requires DIP package.
20dB/decade
'"
I"""B=~
2"R R C
2 3 2
= 16Hz
FIGURE 8. DC Restoration Rejects Unwanted Steady-State
Background Light.
BURR·BROW'M®
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IEilEilI
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BURR-BR9WN®
OPT209
1-=--=-1
PHOTODIODE
WITH ON-CHIP AMPLIFIER
FEATURES
DESCRIPTION
• PHOTODIODE SIZE: 0.090 x 0.090 inch
(2.29 x 2.29mm)
The OPT209 is an opto-electronic integrated circuit
containing a photo diode and transimpedance
amplifier on a single dielectrically isolated chip. The
transimpedance amplifier consists of a precision PETinput op amp and an on-chip metal film resistor. The
0.09 x 0.09 inch photodiode is operated at zero bias for
excellent linearity and low datk current.
o
The integrated combination of photodiode and
transimpedance amplifier on a single chip eliminates
the problems commonly encountered in discrete designs such as leakage current errors, noise pick-up and
gain peaking due to stray capacitance.
en
a:
• 1Mn FEEDBACK RESISTOR
• HIGH RESPONSIVITY: 0.45AIW (650nm)
• LOW DARK ERRORS: 2mV
• BANDWIDTH: 16kHz
• WIDE SUPPLY RANGE: ±2.25 to ±18V
• LOW QUIESCENT CURRENT: 400llA
• TRANSPARENT 8-PIN DIP
APPLICATIONS
0')
o
~
oen
zw
en
The 0PT209 operates over a wide supply range (±2.25
to ±18V) and supply current is only 4OOJ.IA. It is
packaged in a transpatent plastic 8-pin DIP, specified
for the O°C to 70°C temperature range.
• MEDICAL INSTRUMENTATION
• LABORATORY INSTRUMENTATION
-I
0.1
0.1
0
100 200 300 400 500 600
Offset Voltage, Output
vs Temperature
vs Power Supply
Voltage Noise
CONDITIONS
MIN
650nm
650nm
650nm
FS Output = 10V
(0.090 x O.090in)
(2.29 x 2.29mm)
0.45
0.45
100
±5
0.Q1
0.008
5.2'
V. = ±2.25V to ±18V
Measured BW = 0.1 to 100kHz
±0.5
±10
10
350
RESISTOR-IMr.! Internal
Resistance
Tolerance
vs Temperature
FREQUENCY RESPONSE
Bandwidth, Large or Smail-Signal, --3dB
Rise Time, 10% to 90%
Settling Time, 1%
0.1%
0.01%
OVe~osd Recovery TIme (to 1%)
OUTPUT
Voltage Output
1
±0.5
FS to Dark
FS to Dar\<
FS to Dark
100% overdrive, V. - ±15V
100% overdrive, Vs = ±5V
100% overdrive, V. = ±2.25V
(V+) -1.25
(V+) -2
R,,= 10ka
R,= 5ka
Capacitive Losd, Stable Operation
Short-CircuH Current
POWER SUPPLY
Specified Operating VoHage
Operating VoHage Range
Quiescent Current
TYP
MAX
A!W
V/JlW
ppml°C
%
%ofFS
in2
mm'
±2
100
MO
%
ppml°C
16
22
60
85
100
44
100
240
kHz
JlS
JlS
JlS
JlS
JlS
JlS
JlS
(V+)-1
(V+)-1.5
1
±18
V
V
nF
mA
±2
±15
±400
Vo = 0
mV
JlV/oC
JlVN
JlVrrns
50
±2.25
TEMPERATURE RANGE
Specification, Operating
Storage
Thermal Resistance, 9,.
UNrrs
0
--25
±18
±500
V
V
JlA
+70
+85
"C
"C
.oCIW
MAX
UNrrs
100
NOTES: (1) Deviation in percent of full scale from best-fit straight line. (2) Referred to Output. Includes all error sources.
PHOTODIODE SPECIFICATIONS
TA = +25°C, unless otherwise noted.
Photodlode of OPT209
PARAMETER
Photodiode Area
Current ResponsivRy
Dark Current
vs Temperature
Capacitance
CONDITIONS
(0.090 x 0.090in)
(2.29 x 2.29mm)
650nm
Vo = OVl')
Vo = OV")
MIN
TYP
0.008
5.1
0.45
500
doubles every 10°C
600
in2
mm'
A!W
fA
pF
NOTE: (1) Voltage Across Photodlode.
BURR ~ BROWNe
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IEilEilI
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SPECIFICATIONS
(CONT)
ELECTRICAL
Op Amp Section of OPT2091)
TA = +25"C. Vs = ±15V. unless o1herwise nOled.
OPT209 Op Amp
MIN
..vnul I IV""
""""MCIC"_
INPUT
Offset Voltage
vs Temperature
vs Power Supply
Input Bias Current
TYP
MAX
±O.5
±5
10
I
~oubles every 10"C
Vs = ±2.25V to ±18V
vs Temperature
NOISE
Input Voltage Noise
Voltage Noise Density. f=IOHz
MOOHz
f=lkHz
Current Noise Density. f=lkHz
UNITS
mV
~V/"C
~VN
pA
30
25
IS
0.8
nVi..[Hz
nVi..JHZ
nV/..JHZ
IA/..JHZ
INPUT VOLTAGE RANGE
Common-mode Input Range
Common-mode Rejection
±14.4
106
V
dB
INPUT IMPEDANCE
Differential
Common-mode
10"113
10"113
QllpF
QllpF
OPEN-LOOP GAIN
Open·loop Voltage Gain
FREQUENCY RESPONSE
Gain-Bandwid1h Product
Slew Rate
Settling Time 0.1%
0.01%
OUTPUT
Voltage Output
R,,= 10ka
R,= 5ka
(V+)-1.25
(V+)-2
Short-Circuit Current
POWER SUPPLY
Specified Operating Voltage
Operating Voltage Range
Quiescent Current
dB
4
6
4
5
MHz
(V+)-I
(V+)-1.5
±18
V
V
rnA
±15
V
V
±2.25
10=0
±400
en
0
N
120
Vi~
....Il.
0
~
~
±18
±500
0
a::
0
0
Z
~
w
NOTE: (I) Op amp specifications provided for information and comparison only.
o
...J
<_-t--\t-'---r--'-l
1'l4-\ (O.4~NW)
t· --
o
0
i
0.6
650nm
~-I---I----I- (0.45A1W)--~- --
g
r----l\--
1--+-_+-,..+--j--lt-_-+--+-+--+-\\+---I
,------
tl 0.4
~
~
I---+-_.-tl~---I+/+-t--t---t--f.-.. _-_-.II\:~.-_--I
0.2
:l1
/
o
100
200 300 400 500
600
700 SOO 900 1000 1100
10
100
1k
Radiant Power (~W)
Wavelength (nm)
0)
o
~
VOLTAGE OUTPUT RESPONSIVITY vs FREQUENCY
VOLTAGE RESPONSIVITY vs IRRADIANCE
10 _ _ _
RF = 10MO
10 _
o
_
II
~
~
~0.1."
~
~
~RF=33
0.001 L-J...J..l..I- 1Mn
FIGURE 1. Basic Circuit Connections.
1Mn
4
Photodiode current, I is proportional to the radiant power
or flux (in watts) falling on the photodiode. At a wavelength
of 650nm (visible red) the photodiode Responsivity, RI , is
approximately 0.45A/W. Responsivity at other wavelengths
is shown in the typical performance curve "Responsivity vs
Wavelength."
RF = REXT + 1Mn
D,
REXT
0
en
CEXT
Z
W
R,= REXT II1Mn
ForR,< 1Mn
en
REXT
2
..J
«
(.)
1Mn
'vv--- 4
3pF
i=
Il.
0
Vo: loR,
-:-
LIGHT SOURCE POSITIONING
V+
V-
EQUIVALENT R,
C""
100Mn
10Mn
1Mn
330kn
100kn
33kn
S20kn
")
'"
'"
(1)pF
9pF
25pF
~)
NOTES: (1) No Cm reqUIred. (2)
Not recommended due to possible
op amp instability.
FIGURE 2. Using External Feedback Resistor.
BURR-BROWN®
IEilEilI
0
en
[C
V-
V+
An external resistor can be connected to set a different
voltage responsivity. Best dynamic performance is achieved
by connecting REXT in series (for Rp > IMQ), or in parallel
(for Rp < IMQ), with the internal resistor as shown in
Figure 2. These connections take advantage of on-chip
capacitive guarding of the internal resistor, which improves
dynamic performance. For values of Rp less than IMQ, an
external capacitor, CEXT' should be connected in parallel with
Rp (see Figure 2). This capacitor eliminates gain peaking and
prevents instability. The value of ~T can be read from the
table in Figure 2.
The OPT209 is 100% tested with a light source that uniformly
illuminates the full area of the integrated circuit, including
the op amp. Although all IC amplifiers are light-sensitive to
some degree, the OPf209 op amp circuitry is designed to
minimize this effect. Sensitive junctions are shielded with
tIl.
Vo= 10 RF
The typical performance curve "Output Voltage vs Radiant
Power" shows the response throughout a wide range of
radiant power. The response curve "Output Voltage vs
Irradiance" is based on the photodiode area of 5.23 X 1()-6m2.
The 0PT209' s voltage output is the product of the photodiode
current times the feedback resistor, (IoRp). The internal
feedback resistor is laser trimmed to IMQ ±2%. Using this
resistor, the output voltage responsivity, Kv, is approximately
0.45VI~W at 650nm wavelength.
0
C"II
Burr-Brown Ie Data Book-Linear Products
6.19
For Immediate Assistance, Contact Your Local Salesperson
DARK ERRORS
The dark errors in the specification table include all sources.
The dominant error source is the input offset voltage of the
op amp. Photodiode dark current and input bias current of
the op amp are in the 2pA range and contribute virtually no
offset error at room temperature. Dark current and input bias
current double for each 10°C above 25°C. At 70°C, the error
current can be approximately lOOpA. This would produce a
ImV offset with RF = 10M!). The OPT209 is useful with
feedback resistors of 100M!) or greater at room temperature.
The dark output voltage can be trimmed to zero with the
optional circuit shown in Figure 3.
When used with very large feedback resistors, tiny leakage
currents on the circuit board can degrade the performance of
the 0PT209. Careful circuit board design and clean assembly
procedures will help achieve best performance. A "guard
ring" on the circuit board can help minimize leakage to the
critical non-inverting input (pin 2). This guard ring should
encircle pin 2 and connect to Common, pin 8.
4
10pF
50011
V+
Dynaruic response wil1 vary with feedback resistor value as
shown in the typical performance curve "Voltage Output
Responsivity vs Frequency." Rise time (10% to 90%) wiIJ
vary according to the -3dB bandwidth produced by a given
feedback resistor value(1)
where:
tR is the rise time (10% to 90%)
fc is the -3dB bandwidth
NOISE PERFORMANCE
Noise performance of the OPT209 is determined by the op
amp characteristics in conjunction with the feedback
components and photodiode capacitance. The typical
performance curve "Output Noise Voltage vs Measurement
Bandwidth" shows how the noise varies with Rp and measured
bandwidth (1Hz to the indicated frequency). The signal
bandwidth of the OPT209 is indicated on the curves. Noise
can be reduced by filtering the output with a cutoff frequency
equal to the signal bandwidth.
2
1Mil
simple RIC circuit with a -3dB cutoff frequency of 16kHz.
This yields arise time of approximately 22J.1S (10% to 90%).
Dynaruic response is not limited by op amp slew rate. This
is demonstrated by the dynaruic response oscilloscope
photographs showing virtually identical large-signal and
small-signal response.
Output noise increases in proportion to the square-root of the
feedback resistance, while responsivity increases linearly
with· feedback resistance. So best signal-to-noise ratio is
achieved with large feedback resistance. This comes with
the trade-off of decreased bandwidth.
v-
The noise performance of a photodetector is sometimes
characterized by Noise Effective Power (NEP). This is the
radiant power which would produce an output signal equal
to the noise level. NEP has the uuits of radiant power
(watts). The typical performance curve "Noise Effective
Power vs Measurement Bandwidth" shows how NEP varies
with Rp and measurement bandwidth.
Adjust dark output for OV.
Trim Range: ±7mV
vFIGURE 3. Dark Error (Offset) Adjustment Circuit.
LINEARITY PERFORMANCE
Current output of the photodiode is very linear with radiant
power throughout a wide range. Nonlinearity remains below
approximately 0.01 % up to lOOIlA photodiode current. The
photodiode can produce output currents of 10mA or greater
with high radiant power, but nonlinearity increases to several
percent in this region.
2
4
10pF
Gain Adjustment
+50%;-0%
This very linear performance at high radiant power assumes
that the full photodiode area is uuifonnly illuruinated. If the
light source is focused to a small area of the photodiode,
nonlinearity will occur at lower radiant power.
DYNAMIC RESPONSE
Using the internal 1M!) resistor, the dynaruic response of
the photodiodelop amp combination can be modeled as a
FIGURE 4. Responsivity (Gain) Adjustment Circuit.
iURR-BROWN<1II
6.20
Burr-Brown Ie Data Book-Linear Products
E!lE!II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
2
-::-
This OPT209 used
as photodiode, only.
2
4
1M'1
10pF
RF
4
NC
10pF
175'1
5
NC
R,
19k.!l
OPT209
R2
-::-
1k.!l
Advantages: High gain with low resistor values.
less sensitive to circuit board leakage.
-::-
1M'1
Disadvantage: Higher offset and noise than by using high
value for RF"
RF
4
10pF
FIGURE 5. "T" Feedback Network.
1750
5
Vo: (1 02 -1 0,) RF
OPT209
3
2
4
V+
10pF
V-
Vo
Bandwidth is reduced to
11 kHz due to additional
photodiode capacitance.
-::-
0')
o
~
D.
o
...---_ _-----;aen
FIGURE 7. Differential Light Measurement.
a:
2
v+
v-
oen
4
Max linear
input voltage
(v+) ...{J.6V typ
z
en
10pF
1M'1
RF2
w
...J
4
~-----,.,AN
.. '-----J2-+
l5
650nm
(0.47A1W)
/
0.6
~"
10
(0.52A/W)
U
~
~
0.2
I
~
\
-V
/
I
\
100
200
JJ~~~
~
1=
~t 1!t=+~
0.1
I~~....~
~
~tffi1f~
0 0 .01
1\
II
o
i
i
\
j
0.4
~
i\
1--
400 SOO
600
700 800
0.01
900 1000 1100
0.1
VOLTAGE OUTPUT RESPONSIVITY VB FREQUENCY
VOLTAGE RESPONSIVITY vs IRRADIANCE
10
i
i
~
0.1
....~
~t~~
~~~~
~~
0 0 .01
....~
9
~~
~II
0.001
0.001
0.Q1
=
),.
~
--
:1
I
a:
0.1
0.01
0.1
10
100
100
10k
lk
RESPONSE vs INCIDENT ANGLE
1.0
SO
"8.
8l
a:
20
~
a:
"
~
::J
~T_
'" "
lB
30
I
'\
\
0.6
0.4
o
0.46
0.47
0.46
Responsivity (A/W)
0.49
0.5
I
,
\
±20
0.8
0.6
-
\
o
_
1.0
-
0.2
10
6.28
........
0.8
40
0.45
1M
lOOk
Frequency (Hz)
DISTRIBUTION OF RESPONSIVITY
"
F-
),.=650nm
60
J!l
EXT - 30~11
100knC XT=90p
F = 330
~
Irradiance (W/m2)
~
650nm
III
II
..
lk
100
Radiant Power (uW)
10
~
-
r rill II
10
Wavelength (nm)
~
I
11111
0.001
300
'-),.=650nm-
~~
±40
Incident Angle
-
0.4
0.2
o
±60
±SO
n
Burr-Brown Ie Data Book~Linear Products
-====--
Or, Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
At TA = +25°C, Vs = ±15V, A. = 650nm, unless otherwise noted.
OUTPUT NOISE VOLTAGE
vs MEASUREMENT BANDWIDTH
QUIESCENT CURRENT vs TEMPERATURE
0.6
«
.§.
<'
0.5
f
0.4
~
:g
"
()
~
"1Il
~
lOa
=_-"_"H_
10
t.-.-t;.I'Tffit~
Q)
f
0.3
V =±2.25V._
-
--- - -
-~
Dice-
.~
~
0.2
.-
0.1
.
_
. . . ._._-
_.- _._-----
_.
__ __ . .
.
a
-75
-50
-25
25
75
50
lOa
125
10
Temperature eCl
100
Ik
lOOk
LARGE-SIGNAL DYNAMIC RESPONSE
SMALL-SIGNAL DYNAMIC RESPONSE
•
M
: I \
-;).
10k
Measurement Bandwidth (Hz)
en
a:
oen
V.
z
w
en
100JlS/div
100JlS/div
..J
c(
o
~
o
NOISE EFFECTIVE POWER
vs MEASUREMENT BANDWIDTH
10-14 L-J....)...uJ.wJ.-I.-UJ.WL.-'-J..u.u.w......I-I..JCW",--'-J..U,J..).)JJ
1
10
100
lk
10k
lOOk
Measurement Bandwidth (Hz)
BURR-BROWN®
11:311:311
BurrHBrown Ie Data Book-Linear Products
6.29
For Immediate Assistance, Contact Your Local Salesperson
APPLl~ATIONS
INFORMATION
Figure 1 shows the basic connections required to operate the
OPr301. Applications with high-impedance power supplies
may require decoupling capacitors located close to the
device pins as shown. Output is zero volts with no light and
increases with increasing illumination.
2
4
10 is proportional
(OV)
40pF
to light intensity
(radiant power).
10
I
>-<........NV'-t5=-4-- 50pF
0.2
0.4
2
4
C'N > 50pF
0.2
0.4
2
4
Charge Transfer TC
Charge Offset Error
Charge Offset TC
1
10
pC
fcre
mV
~V/oC
1
10
pC
fC/oC
mV
~vrc
. POWER SUPPLY
Specified Operating Voltage
Operating Voltage Range
Positive Supply
Negative Supply
+5, -15
+4.5
-10
+18
-18
V
V
Positive
For Dual
For Dual
12
3.5
15
5.2
mA
mA
-40
-40
-40
Operation
Storage
Thermal Resistance (both packages)
+85
+125
+125
°c
°c
°C
Junction to Ambient
100
"e/W
offset voltage error is 1mV.
BURR ~ BROWN@
Burr-Brown Ie Data Book-Linear Products
-
I,,,
-
Z
~
LL
..J
.,
~
30
..,
~
;;
ci
g
-
20
"E
i=
5l
............
-
............
-#
;;
/
.....-
6
ci
.,
g
~
V
........ V
10
~
4
"E
i=
'"
c:
i
"./
2
C/l
,/'"
V
V
a
....---
s
100
200
300
400
500
~
BOO 700 800 900 1000
a
100 200
500 BOO 700 800 900 1000
CLOAD (pF)
300 400
RESET SWITCH RON vs INPUT CURRENT
HOLD SWITCH RaN vs INPUT CURRENT
1.BSk
1.65k
1.SSk
......-
V
V
C'NTEGRAT'ON (pF)
1.6k
V
V
"./
0
a
J
600
MT,
C'N(PF)
40
a
I
I ~ooi,~
6",oGAA'' ' ' ' ':' :';' '
-r-r
I
I I I
/1-""
J20
./
f-"""
V
50
S
.9-40
<5 30
I
I
1\
\
'\~
~
"'.sw
+
1.5k
'\
1.4k
~~'---I
1.Bk
1.SSk
§:
....... ~
1.45k
z
1.Sk I--~+.,....-+---I---+--"'-+~---l
rr.0
1.4Sk
1.4k
r--~-t-~~t-~-t-~~-j--~--t-~---j
1.3Sk L - _ - L_ _L-_-'-_ _-'-_-'-_---I
1.35k
-100~A
r-r--
r--....,...-~.---....,...---r---,----,.
-10~A
-1~A
a
-100~A
-10~A
-1~A
a
BURR~BROWNG!I
7.8
Burr-Brown Ie Data Book-Linear Products
IEilEilI
Or, Call Customer Service at 1·800·548·6132 (USA Only)
APPLICATIONS INFORMATION
BASIC CIRCUIT CONNECTION
Improper handling or cleauing may increase droop. Contamination from handling parts and circuit boards can be
removed with cleaning solvents and de-ionized water.
Basic Layout
As with any precision circuit, careful layout will ensure best
performance. Make short, direct interconnections and avoid
stray wiring capacitance--especially at the analog and
digital input pins.
Figures I a and I b illustrate the basic connections needed for
operation. Figures Ic and Id illustrate the addition of
external integration capacitors and input guards.
Leakage currents between printed circuit board traces can
easily exceed the input bias current of the ACF2lOl. A
circuit board "guard" pattern reduces leakage effects by
surrounding critical high impedance input circuitry with a
low impedance circuit connection at the same potential.
Leakage will flow harmlessly to the low impedance node.
Figure 2a and 2b show printed circuit patterns that can be
used to guard critical pins. Note that traces leading to these
pins should also be guarded.
Top View
ACF2101BU
Input
Pinout
The pinout for the DIP and SOIC package of the ACF2lOl is
different. The pinouts for the different packages are shown in
several figures in this data sheet.
Power Supplies
The ACF2101 can operate from supplies that range from
+4.5V and -IOV to ±18V. Since the output voltage
integrates negatively from ground, a positive supply of +5V
is sufficient to attain specified performance. Using +5V and
-15V power supplies reduces power dissipation by one-half
of that at ±15V.
Power supply connections should be bypassed with good
high-frequency capacitors, such as IIJP solid tantalum
capacitors, positioned close to the power supply pins.
ACF2101BP
Top View
Input
InB
,..
QUIA
InA
GndA
CapB
Cap A
ComA
ComB
ComA
Cap A
GndB
GndA
InA
QutB
QutA
SwinA
o,..
N
U.
o
R 2
DYNAMIC CHARACTERISTICS
EXTERNAL CAPACITOR
An external integration capacitor may be used instead of or
in addition to the internal lOOpF integration capacitor. Since
'the transfer function depends upon the characteristics of the
integration capacitor, it must be carefully selected. An external integration capacitor should have low voltage coefficient, temperature coefficient, memory, and leakage current.
The optimum selection depends upon the requirements of
the specific application. Suitable types include NPO ceramic, polycarbonate, polystyrene, and silver mica. If the
internal integration capacitor is not used, the Cap pin should
be connected to common.
Frequency Response
The ACF2lOl switched integrator is a sampled system
controlled by the sampling frequency (fs), which is usually
dominated by the integration time. Input signals above the
Nyquist frequency (fs/2) create errors by being aliased into
the sampled frequency bandwidth. The sampled frequency
bandwidth of the switched integrator has a -3dB characteristic at fsl2.26 and a null at fs and harmonics 2fs, 3fs, 4fs,
etc. This characteristic is often used to eliminate known
interference.
FREQUENCY RESPONSE
0
CINTERNAL
Cap
iii -10
Out
:sOl
"'c:
In
Sensor
8.
Swln
11 A
\ ,I"
is
c: -30
Q)
"
eli!
u.
C'N
Com
~
,Nr,~~f
-20
"'
~
SwOut
R'N
It
--40
SwCom
-50
------------------
Is/I 0
!s
it
lilll
lOIs
201s
Sampling Frequency (Is)
FIGURE 6. Capacitance of Circuit at Input of Integrator.
FIGURE 7. Frequency Response.
BURR-BROWN@
7.12
Burr-Brown Ie Data Book-Linear Products
IE!lE!lI
0" Call Customer Service at 1·800·548·6132 (USA Only)
Charge Transfer
Charge transfer is the charge that is coupled from the logic
control inputs through circuit capacitance to the integration
capacitor when the Hold and Reset switches change mode.
Careful printed circuit layout must be used to minimize
external coupling from digital to analog circuitry and the
resulting charge transfer. Charge transfer results in a DC
charge offset error voltage. The ACF2101 switches are
compensated to reduce charge transfer errors.
HOLD
!
~
RESET
Since the ACF2101 switches contribute equal and opposite
charge for positive and negative logic input transitions, the
total error due to charge transfer is determined by the
switching sequence. For each switch, a logic transition
results in a specific charge (and offset voltage) while an
opposite going logic transition results in an opposite charge
(and opposite offset voltage). Thus, if the Hold switch is
turned on and off during one integration cycle, the total
charge transfer at the end of the sequence due to the Hold
switch is essentially zero.
The amount of charge transfer to the integration capacitor is
constant for each switch. Therefore, the charge offset error
voltage is lower for larger integration capacitors. The
ACF21OI's O.lpC charge transfer results in a ImV charge
offset voltage when using the 100pF internal integration
capacitor. The offset voltage will change linearly with the
integration capacitance. That is, SOpF will result in a 2mV
charge offset and 200pF in a O.SmV charge offset.
Droop
Droop is the change in the output voltage over time as a
result of the bias current of the amplifier, leakage of the
integration capacitor and leakage of the Reset and Hold
switches. Droop occurs in both the Integrate and Hold
modes of operation. Careful printed circuit layout must be
used to minimize external leakage currents as discussed
previously.
The droop is calculated by the equation:
100fA
Droop = --::C,c:.INTEG~R::':A:"'TIO-N-
where CINTEGRATION = C INTERNAL + C EXTERNAL and is the integration capacitance in farads and the result is in volts per
second. For the internal integration capacitance of 1OOpF,
the droop is calculated as:
100x 10-15
Droop = 100 X 10 12 = 1mV/s or 1nV/!'s
Droop increases by a factor of 2 for each 10°C increase
above 2SoC. See the typical performance curve showing
Bias Current vs Temperature.
Capacitive Loads
Any capacitive load can be safely driven through the multiplexed output of the ACF21Ol. As with any op amp, however, best dynamic performance of the ACF2101 can be
achieved by minimizing the capacitive load. See the typical
performance curve showing settling time as a function of
capacitive load for more information. A large capacitive
00
. . . . . . . . . . . . . . . . . . . ..J
Charge Offset
lmV'
+
Droop
lnV/~s'
··········································\··I~~~;·~~~~.
• 100pF ln1egration
CapaCitor
FIGURE 8. Droop and Charge Offset Effects.
load is often useful in reducing the noise of systems not
requiring the full bandwidth of the ACF21Ol.
PROGRAMMABLE I TO V CONVERTER EXAMPLE
Figure 10 illustrates the use of the ACF2101 as a programmabie current to voltage converter. The output of the circuit,
V OUT' is a DC level for a constant current input. The timing
diagram shown in Figure 9 shows VOUT for an input current
that varies from one sample to the next. This circuit offers
wide dynamic range without the use of extremely large
resistors. An ACF2101 and an OPA2107 op amp are config•
ured to convert a low level input current to an output voltage.
The equivalent gain of the converter is determined by th
frequency of the digital input signal, fs' The inherent integrating function of the ACF2101 is very useful for rejection
of noise such as power line pickup.
The ACF2101 integrates the current sigual for the period of
f s' The Inagnitude of the ralnp voltage at the ontpnt of the
ACF2101 is a function of the frequency offs and the value
of the integration capacitor, CINTEGRATION' The ACF21OI's
lOOpF internal capacitor is used for CINTEGRATION in this
example. The effect is that fs controls the equivalent feedback resistance of a transconductance (current-to-voltage)
amplifier. The equivalent feedback resistance range can vary
over a large range of at least IMQ to IGQ as illustrated in
the accompanying table. Larger equivalent feedback resistances can be obtained if internal capacitances smaller than
lOOpF are used with the ACF21Ol.
A simplified equation for the operation of this circuit is:
VOUT = ISENSOR X R..OGRAM
Where:
V OUT is the voltage at the output of the OPA2107,
ISENSOR is the current into the ACF2101, and
~ROGRAM is the equivalent feedback resistance of the
circuit calculated by the equation,
R PROGRAM
= 1/(fs X CINTEGRATION) = 1/(fs X 1OOpF)
BURR-BROWN®
IE:!IE:!II
Burr-Brown Ie Data Book-Linear Products
7.13
.....
0
.....
~
0
----4---<'-;-I:>--+----oSW Out
D,
L---1'"""'''t-----+--------<,..-,,:>--+---oSWCom
112 ACF2101
FIGURE 12. Using the ACF2101 with a Voltage Source.
7.16
Burr-Brown Ie Data Book-Linear Products ...==__
Or, Call Customer Service at 1·800·548·6132 (USA Only)
BURR-BROWN®
DIV100
IElElI
ANALOG DIVIDER
FEATURES
APPLICATIONS
• HIGH ACCURACY: 0.25% Maximum Error,
40:1 Denominator Range
• DIVISION
• SQUARE ROOT
• RATIOMETRIC MEASUREMENT
• TWO-QUADRANT OPERATION
Dedicated Log-Antilog Technique
• EASY TO USE
Laser-trimmed to Specified Accuracy
No External Resistors Needed
• PERCENTAGE COMPUTATION
• TRANSDUCER AND BRIDGE
LINEARIZATION
• AUTOMATIC LEVEL AND GAIN CONTROL
• LOW COST
o
o,..
• VOLTAGE CONTROLLED AMPLIFIERS
• DIP PACKAGE
• ANALOG SIMULATION
DESCRIPTION
The DIVIOO is a precision two-quadrant analog
divider offering superior perfonnance over a wide
range of denominator input. Its accuracy is nearly two
orders of magnitude better than multipliers used for
division. It consists of four operational amplifiers and
logging transistors integrated into a single monolithic
circuit and a laser-trimmed, thin-film resistor network.
The electrical char~ct"ri"tics of these devices offer the
user guaranteed accuracy without the need for external
adjustment - the DIVIOO is a complete, single package analog divider.
~
C
For those applications requiring higher accuracy than
the DIVlOO specifies, the capability for optional
adjustment is provided. These adjustments allow the
user to set scale factor, feedthrough, and outputreferred offsets for the lowest total divider error.
en
z
The DIVIOO also gives the user a precision, temperature-compensated reference voltage for external use.
o
~
Z
Designers of industrial process control systems,
analytical instrumem", or hiomedical instrumentation
will find the DIVIOO easy to use and also a low cost,
but highly accurate solution to their analog divider
applications.
::J
LL
...I
±10
±10
Negative
POWER SUPPLY REQUIREMENTS
Rated Voltage
Operating Range
Quiescent Current
Postive Supply
Negative Supply
TYP
4
50% Output Overload
N,;IOI
0l!+250mV
Either Input
0.3
0.05'~
350
15
1000
30
2
15
Positive
OUTPUT NOISE VOLTAGE
f, = 10Hz to 10kHz
0=+10V
=+250mV
MIN
RL~ 10kn
INPUT CHARACTERISTICS
Input Voltage Range
Input Resistance
DIV100KP
MAX
Vo = 10NI0
TRANSFER FUNCTION
ACCURACY
Total Error
Initial
vs Temperature
TYP
6.5'·
6.8
±25
±50
3
flVrrns
mVrms
7.1'"
±15
Derated Performance
±12
±20
5
8
Derated Performance
0
-25
-40
·
7'·
10'·
+70
+85
+85
·
·· ·
··
··
· · · · ·
··
···
V
INN
ppmlOC
kn
VOC
VOC
mA
mA
·C
·C
·C
'Same as OIVI OOHP.
NOTES: (1) FSO is the abbreviation for Full Scale Output. (2) This parameter is untested and is not guaranteed. This speclfcation is established to a 90% confidence
level.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authortze or warrant any BURR-BROWN product for use in life support devices andlor systems.
BURR-BROWNIBI
7.18
Burr-Brown Ie Data Book-Linear Products
lEa Eal
Or, Call Cuslomer Service aI1·800·548·6132 (USA Only)
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
DIP
Bottom View
+Vcc
o 14
Numerator (N) Input
0
13
0
2 0
Supply ........................................................................................... ±20VDC
Internal Power Dissipation(1) .......................................................... 600mW
Input Voltage Rangel•.................................................................. ±20VDC
Storage Temperature Range ........................................... -40"C to +85"C
Operating Temperature Range ......................................... -25"C to 85"C
Lead Temperature (soldering. lOs) ............................................... +300"C
Output Short-Circuit Duration(1.3) ............................................. Continuous
Junction Temperature .................................................................... +175°C
Gain Error Adjust
Output
Output Offset Adjust
0
12
0
N Input Offset Adjust
0
11
4 0
D Input Offset Adjust
Common
0
10
5 0
Internally Connected to Pin 1
Denominator (D) Input
0
6 0
Internally Connected to Pin 14
Refererence Voltage
0
8
7 0
Internally Connected to Pin 8
-Vee
NOTES: (1) See General Information section for discussion. (2) For supply
vottages less than ±20VDC, the absolute maximum input vottage is equal
to the supply voltage. (3) Short-circutt may be to ground only. Rating
applies to an ambient temperature of +38'C at rated supply voltage.
PACKAGE INFORMATION(!)
ORDERING INFORMATION
MODEL
TEMPERATURE
RANGE
TOTAL INITIAL
ERROR (% FSO)
DIV100HP
DIV100JP
DIV100KP
O"C to +70"C
O"C to +70"C
O'C to +70"C
1.0
0.5
0.25
MODEL
PACKAGE
PACKAGE DRAWING
NUMBER
DIV100HP
DIV100JP
DIV100KP
14-Pin DIP
14-Pin DIP
14-Pin DIP
105
105
105
NOTE: (1) For detaIled draWing and dImension table, please see end of data
sheet, or Appendix 0 of Burr-Brown IC Data Book.
TYPICAL PERFORMANCE CURVES
TA
= +25°C, Vcc =±15VDC, unless otherwise specified.
TOTAL ERROR vs DENOMINATOR VOLTAGE
o
o
,..
TOTAL ERROR vs AMBIENT TEMPERATURE
3
10V < N < +10V
>
C
2.4
6"
'"~
"-
1.8
II
g
w 1.2
~
CJ)
O'--_ _'--_--'_ _
0.01
0.1
10
-5
10
25
~
_ _-"-_ _-'
40
55
70
Denominator Voitagtl (V)
Z
o
fiz
~
U.
FREQUENCY RESPONSE vs DENOMINATOR VOLTAGE
TOTAL ERROR VB OUTPUT CURRENT
0.6
_.-
0.5
-~.-
0.4 - -
~
~
0.3 - - -
~
CJ)
_.-
~.
~
0.2
---
..-'
-10V Output
I
0.1
2
4
6
8
10
Output Current (rnA)
10
0.1
Denominator Voltage (V)
BURR~BROWNI!l
I EilEiII
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RL=2kn
.,
N
§;
~
~
150
0
o
D = +10V
C L =20pF
r'
-
50
-
0
----
'5
-_..---
-5
~ -50
0
--._--1\--.---+--
I'-...
-100
-10 ' -______"'--______.L....:......____......____-'-'
o
50
100
150
-150
o
200
10
50
,---:;;--r-------,.,--------,--------,
1+·---+----1+---
.,
OUTPUT NOISE vs DENOMINATOR VOLTAGE
10
~
g
D = +250mV
CL = 20pF - -
0
0
,....
.~
0
~
z
------------\----+----1
>
0
'5
~
0
,...---
:l:'
N= 10V
e'"
-50 I - - - - - f -
2
N
:x:
-100 ' -______"'--______"'--......::::...__"'--____-'-'
o
40
Time (~s)
TRANSIENT RESPONSE
100
30
20
Time(~s)
100
50
150
e
N=OV
0.1
200
0.1
10
Time (~s)
•
en
Z
Denominator Voltage (V)
0
i=
0
POWER SUPPLY REJECTION
vs DENOMINATOR VOLTAGE
80
6i"
:s
c:
~.,
:l
~
g-
z
QUIESCENT CURRENT vs AMBIENT TEMPERATURE
:::>
u.
12
I
f=60Hz
70
60
50
'"~
_
posLe Supply
:/v
. / ,-
~ 40
30
/""
~
--
f"'"
-
.-~
~galiVe Supply
Positive Supply
~--
..
/
2
0.1
10
Denominator Voltage (V)
o
10
20
30
40
50
60
70
Ambent Temperature COC)
BURR-BROWN@
IE5IE5II
Burr-Brown Ie Data Book-Linear Products
...I
c(
Negative Supply
r--
7.21
(3
W
D.
en
For Immediate Assistance, Contact Your Local Salesperson
DEFINITIONS
0.5% AMPLITUDE ERROR
At high frequencies the input-to-output relationship. is a
complex function that produces both a magnitude and vector
error. The 0.5% amplitude error is the frequency at which
the magnitude of the output drops 0.5% from its DC value.
TRANSFER FUNCTION
The ideal transfer function for the DIVlOO is:
VOUT = 10NID
where: N = Numerator input voltage
D = Denominator input voltage
10 = Internal scale factor
0.57° VECTOR ERROR
Figure 1 shows the operating region over the specified
numerator and denominator ranges. Note that below the
minimum denominator voltage (250mV) operation is
undefined.
The 0.57° vector error is the frequency at which a phase
error of 0.01 radians occurs. This is the most sensitive
measure of dynamic error of a divider.
LINEARITY
Defining linearity for a nonlinear device may seem
unnecessary; however, by keeping one input constant the
output becomes a linear function of the remaining input. The
denominator is the input that is held fixed with a divider.
Nonlinearities in a divider add harmonic distortion to the
output in the amount of:
10
8
6
~
4
is
The DIV100 is a log-antilog divider consisting of four
operational amplifiers and four logging transistors integrated into a single monolithic circuit. Its basic principal of
operation can be seen by an analysis of the circuit in Fig~
4.
..
The logarithmic equation for a bipolar transistor is:
V BE = V T in (Idls)'
(I)
where: VT = kT/q
k = Boltzmann's constant 1.381 x 10-23
T = Absolute temperature in degrees Kelvin
q = Electron charge = 1.602 x 10-'9
Ic = Collector current
Is = Reverse saturation current
=
en
z
o
i=
(.)
Z
:l
LL
...I
c:(
(3
W
C-
en
8, =20°CIW
PDQ
FIGURE 3. DIV100 Thermal Model.
FIGURE. 4 One-Quadrant Log-Antilog Divider.
aURR·BROWNiII
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VREF
Output
D
4
07__.-.._--1h11JV1_----. 0 ,
--G
8
14
09_ _ _-,r-~Afu~-_+
+Vcc
12
Input 11
o----~~~~-~
N 13
In~t O----------_~-----------~~-~
FIGURE S. DIVlOO Two-Quadrant Log-Antilog Circuit.
Applying equation (1) to the four logging transistors gives:
ForQI:
VBE
= VB -
VE = VT[ I!n(V~x - .en Is]
This leads to:
VI = -VT[ I!n(VRmlRx - I!n Is]
ForQ,:
Y I - V2 = V T[.en(VNIRN) - in Is]
ForQ,:
Y, = -VT[ in (VrfRo) - fuI s]
We have now taken the logarithms of the input voltage VREF'
V N, and Vo. Applying equation (1) to Q. gives:
Y, - V2 = VT [in (VJRo) - in Is].
Assume V T and Is are the same for all four transistors (a
reasonable assumption with a monolithic IC). Solving this
last equation in terms of the previously defined variables and
taking the antilogarithm of the result yields:
VREF VNRoRo
Vo = - - - - VoRXRN
(2)
In the DIVlOO V REF = 6.6V, Ro = RN = Ro, and Rx is such
that the transfer function is:
Vo = 10NID
(3)
Still another limitation is that the value of the N input must
always be equal to or less than the absolute value of the D
input. From equation (3) it can be seen that if this limitation
is not met, V0 will try to be greater than the lOY output
voltage limit of A4 •
A limitation that may not be obvious is the effect of source
resistance. If the numerator or denominator inputs are driven
from a source with more than 100 of output resistance, the
resultant voltage divider will cause a significant output
error. This voltage divider is formed by the source resistance
and the DIVlOO input resistance. With RSOURCE = 100 and
RINPUT (DIVIOO) = 2Sk.Q an error of 0.04% results. This means
that the best performance of the DIV100 is obtained by
driving its inputs from operational amplifiers.
Note that the reference voltage is brought out to pins 7 and
8. This gives the user a precision, temperature-compensated
reference for external use. Its open-circuit voltage is
+6.8VDC, typically. Its Thevenin equivalent resistance is
3k.Q. Since the output resistance is a relatively high value, an
operational amplifier is necessary to buffer this source as
shown in Figure 6. The external amplifier is necessary
because current drawn through the 3k.Q resistor will effect
the DIV100 scale factor.
where: N = Numerator Voltage
D = Denominator Voltage
Figure 5 is a more detailed circuit diagram for the DIVIOO.
In addition to the circuitry included in Figure 3, it also shows
the resistors (It" R4, R 8, R" and R",) used for level-shifting.
This converts the DIVlOO to a two-quadrant divider.
The implementation of the transfer function in equation (3)
is done using devices with real limitations. For example, the
value of the D input must always be positive. If it isn't, ~
will no longer conduct, A, will become open loop, and its
output and the DIVlOO output will saturate. This limitation
is further restricted in that if the D input is less than +2SOmV
the errors will become substantial. It will still function, but
its accuracy will be less.
7.24
DIV100
FIGURE 6. Buffered Precision Voltage Reference.
OPTION ADJUSTMENTS
Figure 7 shows the connections to make to adjust the
DIV100 for significantly better accuracy over its 4O-to-l
denominator range.
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The adjustment procedure is:
1. Begin with R" R2. and R3 set to their mid-position.
2. With INI = D = 1O.000V, ±ImV, adjust R, for
Vo = +1O.000V, ±ImV. This sets the scale factor.
3. Set D to the minimum expected denominator voltage.
With N = -D, adjust R2 for V 0 = -1 O.OOOV. This adjusts
the output referred denominator offset errors.
4. With D still at its minimum expected value, make N =
D. Adjust R3 for Vo = 1O.000V. This adjusts the output
referred offset errors.
5. Repeat steps 2-4 until the best accuracy is obtained.
The LVDT (Linear Variable Differential Transformer) weigh
cell measures the force exerted on it by the weight of the
material in the container. Its output is a voltage proportional
to:
W=~
a
where: W = Weight of material
F = Force
g = Acceleration due to gravity
a = Acceleration (acting on body of weight W)
-vee
+Vcc
2
9
D
The advantage of using the DIVIOO can be illustrated from
the example shown in Figure 9.
vo~
10N/D
R,
N
13
20kn
FIGURE 9. Weighing System - Fractional Loss.
FIGURE 7. Connection Diagram for Optional Adjustments.
CONNECTION DIAGRAM
Figure 8 is applicable to each application discussed in this
section, except the square root mode.
Note that by using the DIV 100 in this application the
common physical parameters of g and a have been eliminated from the measurement, thus eliminating the need for
precise system calibration.
The output from a ratiometric measuring system may also be
used as a feedback signal in an adaptive process controi
system. A common application in the chemical industry is in
the ratio control of a gas and liquid flow as illustrated in
Figure 10.
13
9
2
PERCENTAGE COMPUTATION
Vour
RSOURCE< 100
FIGURE 8. Connection Diagram-Divide Mode.
RATIOMETRIC MEASUREMENT
The DlV100 is useful for ratiometric measurements such as
efficiency, elasticity, stress, strain, percent distortion, impedance magnitude, and fractional loss or gain. These ratios
may be made for instantaneous, average, RMS, or peak
values.
A variation of the direct ratiometric measurements previ0usly discussed is the need for percentage computation. In
Figure II, the DIVlOO output varies as the percent deviation
of the measured variable to the standard.
TIME AVERAGING
The circuit in Figure 12 overcomes the fixed averaging
interval and crude approximation of more conventional time
averaging schemes.
BRIDGE LINEARIZATION
The bridge circuit in Figure 13 is fundamental to pressure,
force, strain and electrical measurements. It can have one or
BURR-BROWNI5
I EalEaII
>
is
Burr-Brown Ie Data Book-Linear Products
(J)
Z
0
t=
o
Z
::l
LL
..J
---------c VOUT
1
1,0--_--1
3
r - - - - - o { ) K. 1
4
r----oK-3
14
1,0-------------1
6
+VccO--
Com~
,
VOUT""KLOG-t
Resistor values nominal only;
laser-trimmed for precision gain.
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SPECIFICATIONS
ELECTRICAL
T.
= +25OC and ±Voo = ±15V. unless 01herwise specified.
LOG100JP
PARAMETER
CONOmONS
MIN
TYP
Either I, or 12
1nA to 1001lA (5 decades)
1nA to 1mA (6 decades)
1nA to 1001lA (5 decades)
1nA to 1mA (6 decades)
Over Temperature
0.04
0.15
0.002
0.001
1.3.5
0.3
0.03
K Range(2)
Accuracy
Temperature Coefficient
ACCURACY
Total Error'"
Initial
K = 1.'" Current Input Operation
1,.1,= 1mA
I,. I, = 1001lA
I,. I, = 101lA
I,. I, = 11lA
I,. I, = 100nA
1,.1,= 10nA
1,.1,= 1nA
vs Temperature
vs Supply
to.033
±55
±30
±25
±20
±25
±30
mV
mV
mV
mV
mV
mV
mV
Ii.
mVI"C
mVI"C
mVI"C
mVI"C
mVI"C
mVI"C
mVI"C
',.12 = 1mA
t4.3
I,. I, = 1001lA
I.. I, = 101lA
I,. I, = 11lA
I,. I, = 100nA
1,.1, = 10nA
±1.5
±0.37
±0.11
±0.61
±0.91
±2.6
±O.28
mVN
mVN
mVN
mVN
mVN
mVN
mVN
±O.7
±80
1
Every
3
0.5
10Hz to 10kHz. RTI
10Hz to 10kHz. RTI
±5
mV
!lVI"C
5(5)
pA
!lVrms
pArms
Co
0.11
38
27
45
kHz
kHz
kHz
kHz
11
7
110
JlS
JlS
JlS
45
20
550
!lS
= 1S0pF
1mA to 11lA
11lA to 100nA
100nA to 10nA
lOUT = ±5mA
VOUT = ±10V
Positive
en
Z
0
i=
.- ..
:::l
u..
....I
2(K)
!
I (K)
~ 0.7 (K)---·-~-
~ 0.6(K)
%0.5 (K)
O(K)
C;
~ -I (K)
~-I-
1-------1--:7-/-.-+---..-+-+-+-+++-1
~ 0.3(K)~.
- V
~ -2(K)
B
z
0.4 (K)
./"
----~·7~<.-+-+-+-1--+
§ 0 2 (K)
-3(K)
-
.. -
z 0.1 (K)··
--
.~--
r--·--j---j---f--·t_t_t-+-i
. .- - - . - 1--. ____ _
--
0"-_ _ _-'-_ _'----'-_.1.--'--'-.1-1-'
0.001
0.01
0.1
Current Ratio,
10
100
3
2
1000
1-
4
Current Ratio,
8
12
2
TOTAL ERROR vs INPUT CURRENT
TRIMMED OUTPUT ERROR vs INPUT CURRENT
±75
60
;---~--~----:--__:--__:--__:--__:-,
Gain Error and
50
;:;-
~
e ±50
.--~.--I_-.-T---T-.--.~~,~/
w
~E
---- I---+-=-.:~"..". ~.;.;~ ..:-:- .. -:.-••• ~-.-.
.... - -
~O
...sO
.§. 40 r-.-t---.t-.- - - - - .
-40
g
-30
w
30
i
20
--- --+--+-+--+-f __
r--t---+--~-+-_r--+-~-_t
N
-20
o
o
,...
o
o
..J
10
""'E"
~
Offset Error Trimmed --+--~-+
to Zero
0
,~~~
~ ±25
10
E
~
-10
o
-20
I~OnA
InA
10~A
10
~
__~__~__~__~~~__~__~~ 20
InA
ImA
Input Current ( I, or 12 )
IDOnA
10~A
ImA
en
z
o
Input Current (I, or 12)
t3
z
Select C c for
S, lOOk
"
.:
.~
10k
0
Ik
a.
os
u.
1M
u:0
:J
3dB FREQUENCY RESPONSE
MINIMUM VALUE OF COMPENSATION CAPACITOR
1M
It min and 12 max -
~ lOOk
..J
10k
(3
..""
..8.'"
+-.-~
a:
(;-
"'"
"
~
"
"~
100
.t
E
c
10
'"""
c
-2
"
12
VOUT= K LOG.!!.
12 = 1,~A
Fixed value of 12,
FIGURE 2. Transfer Function with Varying K and II'
10
12 = 10nA
8
6
4
~ 2
I,
VouT=KLOGl;
-::-
12o-=---~-=====:::t----1
1; 0
o
+--_e_-"'*'--_--"IF--_-*"-......-
> -2
-4
I,
VOUT= K LOGl;
~
~
-10
FIGURE 1. Simplified Model of Log Amplifier.
K=3
Fixed value of K.
FIGURE 3. Transfer Function with Varying I, and II'
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TOTAL ERROR
The total error is the deviation (expressed in mV) of the
actual output from the ideal output of VOUT = K log (1/12).
Thus,
V OUT (ACTUAL) = VOUT (IDEAL) ± Total Error.
It represents the sum of all the individual components of
error normally associated with the log amp when operated in
the current input mode. The worst-case error for any given
ratio of 1/12 is the largest of the two errors when II and I, are
considered separately.
Log conformity is defined as the peak deviation from the
best-fit straight line of the VOUT versus log (1/12) curve. This
is expressed as a percent of peak-to-peak full scale output.
Thus, the nonlinearity error expressed in volts over m
decades is
INDIVIDUAL ERROR COMPONENTS
The ideal transfer function with current input is
Example
II varies over a range of IOnA to IJ.IA and 12 varies from
lOOnA to lOJ.IA. What is the maximum error?
Table I shows the maximum errors for each decade combination of II and 12.
(12)
VOUT (NONLlN) = K 2Nm V
where N is the log conformity error, in percent.
VOUT = K Log -
II
(13)
I,
The actual transfer function with the major components of
error is
I, (maximum error)!1)
t
~
I
-"
lIlA
10nA
(30mV)
100nA
(25mV)
(20mV)
100nA
(25mV)
0.1
(30mV)
1
(25mV)
10
(25mV)
lIlA
(20mV)
0.Q1
(30mV)
0.1
(25mV)
1
(20mV)
101lA
(25mV)
0.001
(30mV)
0.01
(25mV)
0.1
(25mV)
NOTE: (1) Maximum errors are in parenthesis.
The individual component of error is
AI( = scale factor error (0.3%, typ)
IBI = bias current of Al (lpA, typ)
IB2 = bias current of A2 (lpA, typ)
N = log conformity error (0.05%,0.1%, typ)
Vas OUT = output offset voltage (1mV, typ)
m = number of decades over which N is specified:
0.05% for m = 5, 0.1% for m = 6
o
o,....
CJ
o..J
Example: what is the error with K = 3 when
TABLE I. Ill, and Maximum Errors.
Since the largest value ofI/I2 is 10 and the smallest is 0.001,
K is set at 3V per decade so the output will range from +3V
to -9V. The maximum total error occurs when II = lOnA and
is equal to K x 30mV. This represents a 0.75% of peak-topeak FSO error 3 x 0.030/12 x 100% = 0.75% where the full
scale output is 12V (from +3V to -9V).
ERRORS RTO AND RTI
As with any transfer function, errors generated by the
function itself may be Referred-to-Output (RTO) or Referred-to-Input (RTI). In this respect, log amps have a
unique property:
Given some error voltage at the log amp's output, that
error corresponds to a constant percent of the input
regardless of the actual input leveL
Refer to: Yu Jen Wong and William E. Ott, "Function
Circuits: Design & Applications", McGraw-HilI Book, 1976.
II = IJ.IA and 12
= lOOnA
1~-1~12
1~7 _1~12
1~
(16)
C/)
= 3.009 (1) + 0.015 + 0.001
(17)
o
= 3.025V
(18)
~
3.009 log -
1~7
+ 0.D15 + 0.001
Z
Since the ideal output is 3.000V, the error as a percent of
reading is
% error = 0.025 X 100% = 0.83%
3
(19)
For the case of voltage inputs, the actual transfer function is
RI
±K 2Nm ±Vos OUT
R,
LOG CONFORMITY
B2 -
Eos 2
R,
(20)
FREQUENCY RESPONSE
The 3dB frequency response of the LOG 100 is a function of
the magnitude of the input current levels and of the value of
the frequency compensation capacitor. See Typical Performance Curves for details.
BURR· BROWN®
1&:1&:11
Burr-Brown Ie Data Book-Linear Products
Z
::l
LL
..J
c(
(3
Q.
C/)
BI- R,
VOUT = K(1 ± L1K) log
~
(,)
W
V
E
--'--I +~
V2 -I +
Log conformity corresponds to linearity when VOUT is plotted versus VI, on a semilog scale. In many applications, log
conformity is the most important specification. This is true
because bias current errors are negligible (1 pA compared to
input currents of 1nA and above) and the scale factor and
offset errors may be trimmed to zero or removed by system
calibration. This leaves log conformity as the major source
of error.
_
±3(2)(0.OOO5)5±lm
(15)
VOUT= 3(1 ± 0.003) log - - -
7.33
For Immediate Assistance, Contact Your Local Salesperson
The frequency response curves are shown for constant DC II
and I;, with a small signal AC current on one of them.
The transient response of the LOG 100 is different for increasing and decreasing signals. This is due to the fact that
a log amp is a nonlinear gain element and has different gains
at different levels of input signals. Frequency response
decreases as the gain increases.
GENERAL INFORMATION
A voltage divider may be used to reduce the value of the
resistor. When this is done, one must be aware of possible
errors caused by the amplifier's input offset voltage. This is
shown in Figure 5.
In this case the voltage at pin 14 is not exactly zero, but is
equal to the value of the input offset voltage of AI' which
ranges from zero to ±SmV. V T must be kept much larger
than 5mV in order to make this effect negligible. This
concept also applies to pin 1.
INPUT CURRENT RANGE
The stated input range of InA to lmA is the range for
specified accuracy. Smaller or larger input currents may be
applied with decreased accuracy. Currents larger than ImA
result in increased nonlinearity. The 10mA absolute maximum is a conservative value to limit the power dissipation
in the output stage of Al and the logging transistor. Currents
below InA will result in increased errors due to the input
bias currents of Al and A, (lpA typical). These errors may
be nulled. See Optional Adjustments section.
OPTIONAL ADJUSTMENTS
FREQUENCY COMPENSATION
Frequency compensation for the LOGl00 is obtained by
connecting a capacitor between pins 7 and 14. The size of
the capacitor is a function of the input currents as shown in
the Typical Performance Curves. For any given application,
the smallest value of the capacitor which may be used is
determined by the maximum value at 12 and the minimum
value of II' Larger values of C c will make the LOG 100 more
stable, but will reduce the frequency response.
SETIING THE REFERENCE CURRENT
When the LOG 100 is used as a straight log amplifier 12 is
constant and becomes the reference current in the expression
II
VOUT = K log - -
~F
FIGURE 5. "T" Network for Reference Current.
The LOGlOO will meet its specified accuracy with no user
adjustments. If improved performance is desired, the following optional adjustments may be made.
INPUT BIAS CURRENT
The circuit in Figure 6 may be used to compensate for the
input bias currents of Al and A 2 • Since the amplifiers have
PET inputs with the characteristic bias current doubling
every lOoC, this nulling technique is practical only where
the temperature is fairly stable.
R2
10kn
(21)
IREF can be derived from an external current source (such as
shown in Fignre 4), or it may be derived from a voltage
source with one or more resistors.
When a single resistor is used, the value may be quite large
when IREF is small. If IREF is IOnA and +15V is used
RREF
15V
=- = 1500Mn.
10nA
FIGURE 6. Bias Current Nnlling.
+15V0-+--I4---';
r-;--+--J\/V'---o -15V
OUTPUT OFFSET
FIGURE 4. Temperature-Compensated Current Reference.
The output offset may be nulled with the circuit in Figure 7.
II and I;, are set equal at some convenient value in the range
of l00nA to l00J.IA. RI is then adjusted for zero output
voltage.
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r -__________~~------~~~7----~~
LOG100
+
LOG100
14
FIGURE 8. Reverse Polarity Protection.
+Vcc
FIGURE 7. Output Offset Nulling.
ADJUSTMENTS OF SCALE FACTOR K
The value of K may be changed by increasing or decreasing
the voltage divider resistor normally connected to the output, pin 7. To increase K put resistance in series between pin
7 and the appropriate scaling resistor pin (3, 4 or 5). To
decrease K place a parallel resistor between pin 2 and either
pin 3, 4 or 5.
techniques should be used to avoid damage caused by low
energy electrostatic discharge (ESD).
LOG RATIO
One of the more common uses of log ratio amplifiers is to
measure absorbance. A typical application is shown in
Figure 9.
A'
Absorbance of the sample is A = log ~
AI
If A.,
(22)
II
= AI and DI and D2 are matched A = K log --.
(23)
I,
APPLICATION INFORMATION
o
o
.....
e"
o....I
WIRING PRECAUTIONS
-Vee
In order to prevent frequency instability due to lead inductance of the power supply lines, each power supply should
be bypassed. This should be done by connecting a 101JF
tantalum capacitor in parallel with a lOOOpF ceramic capacitor from the +Vee and -Vcc pins to the power supply
common. The connection of these capacitors should be as
close to the LOG 100 as practical.
CAPACITIVE LOADS
Stable operation is maintained with capacitive loads of up to
100pF, typically. Higher capacitive loads can be driven if a
220 carbon resistor is connected in series with the LOG 100' s
output. This resistor will, of course, form a voltage divider
with other resistive loads.
CIRCUIT PROTECTION
The LOG 100 can be protected against accidental power
supply reversal by putting a diode (lN4001 type) in series
with each power supply line as shown in Figure 8. This
precaution is necessary only in power systems that momentarily reverse polarity during turn-on or turn-off. If this
protection circuit is used, the accuracy of the LOG I 00 will
be degraded slightly by the voltage drops across the diodes
as determined by the power supply sensitivity specification.
The LOG 100 uses small geometry PET transistors to achieve
the low input bias currents. Normal FET handling
~1 1~~9----------~~__~--o
+
LOG100
VOUT
o
en
z
o
i=
(.)
z:::)
U.
....I
c(
(3
W
FIGURE 9. Absorbance Measurement.
a..
en
DATA COMPRESSION
In many applications the compressive effects of the logarithmic transfer function is useful. For example, a LOG100
preceding an 8-bit analog-to-digital converter can produce
equivalent 20-bit converter operation.
SELECTING OPTIMUM VALUES OF 12 AND K
In straight log applications (as opposed to log ratio), both K
and I, are selected by the designer. In order to minimize
errors due to output offset and noise, it is normally best to
Burr-Brown Ie Data Book-Linear Products
7.35
For Immediate Assistance, Contact Your Local Salesperson
scale the log amp to use as much of the ±lOV output range
as possible. Thus, with the range of I, from I, MIN to
I,MAX;
For I, MAX
For I, MIN
+ lOV = K log I, MAXII,
- lOV = K log I, MlNII2
National
LM394
(24)
O2
(25)
Addition of these two equations and solving for 1, shows that
its optimum value, I,OPT' is the geometric mean Ofl'MAX and
I'MIN'
12 OPT =
KoPT
JI'MAX
X I'MIN
10
=---=---
lOUT
(26)
(27)
I,MAX
FIGURE 10. Current Inverter.
10g--
!,OPT
ANTILOG CONFIGURATION (an implicit technique)
Since K is selectable in discrete steps, use the largest value
of K available which does not exceed KoPT'
-Vee
9
NEGATIVE INPUT CURRENTS
The LOG100 will function only with positive input currents
(conventional current flow into pins 1 and 14). Some current
sources (such as photomnltiplier tubes) provide negative
input currents. In such situations, the circuit in Figure 10
may be used. (I)
7
+
LOG100
VOLTAGE INPUTS
The LOG 100 gives the best performance with current inputs. Voltage inputs may be handled directly with series
resistors, but the dynamic input range is limited to approximately three decades of input voltage by voltage noise and
offsets. The transfer function of equation (20) applies to this
configuration.
NOTE: (1) More de1alled information may be found in "Prope~y Designed Log
AmplHlers Process Bipolar Input Signals" by Larry McDonald, EON, 5 Oct. 80,
V,N 0 - - - - - - - - - - - - '
K ~ 1 when V,N connected to pin 3.
K ~ 3 when V,N connected to pin 4.
K ~ 5 when V,N connected to pin 5.
FIGURE 11. Connections for Antilog Function.
pp 99-102.
The information provided herein is believed to be reliable; however, BURR·BROWN assumes no responsibility for inaccuracies or omissions. BURR·BROWN assumeS
no responsibility for the use of this information, and all use of such information shatl be entirely at the use(s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the clrciJits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in IHe support devices andIor systems.
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BURR-BROWN®
MPY100
1-=--=-1
MULTIPLIER-DIVIDER
FEATURES
APPLICATIONS
• LOW COST
• MULTIPLICATION
• DIFFERENTIAL INPUT
• ACCURACY 100% TESTED AND
GUARANTEED
•
•
•
•
•
•
• NO EXTERNAL TRIMMING REQUIRED
• LOW NOISE: 90IlVrms, 10Hz to 10kHz
• HIGHLY RELIABLE ONE·CHIP DESIGN
DIVISION
SQUARING
SQUARE ROOT
LINEARIZATION
POWER COMPUTATION
ANALOG SIGNAL PROCESSING
• DIP OR TO·100 TYPE PACKAGE
• ALGEBRAIC COMPUTATION
• WIDE TEMPERATURE OPERATION
• TRUE RMS·TO· DC CONVERSION
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DESCRIPTION
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The MPYlOO multiplier-divider is a low cost precision device designed for general purpose application.
In addition to fcur-quadra..~t multiplication, it also
performs analog square root and division without the
bother of external amplifiers or potentiometers. Lasertrimmed one-chip design offers the most in highly
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reliable operation with guaranteed accuracies.
Because of the internal reference and pretcimmed
accuracies the MPVl on rloos not have the restrictions
of other low cost multipliers. It is available in both
TO-lOO and DIP ceramic packages.
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z,
:::aE
x,
X,
7
8
NC
NOTES: (1) Vos adjustment optional not normally recommended. Vos pin may
be left open or grounded. (2) All unused input pins should be grounded.
NOTES: (1) Vos adjustment optional not normally recommended. Vos pin may
be left open or grounded. (2) All unused input pins should be grounded.
Supply ........................................................................................... ±20VDC
Internal Power Dissipation l1l •.•••••.••..•.••••••••.•.•••••••••..••.•.••••••••••.•..•.• 500mW
Differential Input Voltage'•........................................................... ±40VDC
Input Voltage Range'•.................................................................. ±20VDC
Storage Temperature Range ......................................... -65'C to +150'C
Operating Temperature Range .................................... -55'C to +125°C
Lead Temperature (soldering, lOs) ............................................... +300'C
Output Short-circuit Duration(3) ................................................ Continuous
MODEL
MPY100AG
MPY100AM
MPY100BG
MPY100BM
MPY100CG
MPY100CM
MPY100SG
MPY100SM
PACKAGE
~
z
TEMPERATURE RANGE
14-Pin Ceramic DIP
Metal TO-100
14-Pin Ceramic DIP
Metal TO-I 00
14-Pin Ceramic DIP
Metal TO-I 00
14-Pin Ceramic DIP
Metal TO-100
-25'C
-25'C
-25'C
-25'C
-25'C
-25'C
-25'C
-55"C
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PACKAGE INFORMATION(')
MODEL
MPY100AG
MPY100AM
MPY100BG
MPY100BM
MPY100CG
MPY100CM
MPY100SG
MPY100SM
PACKAGE
PACKAGE DRAWING
NUMBER
14-Pin Ceramic DIP
Metal TO-l 00
14-Pin Ceramic DIP
Metal TO-l 00
14-Pin Ceramic DIP
Metal TO-I 00
14-Pin Ceramic DIP
Metal TO-I 00
169
007
169
007
169
007
169
007
NOTE: (1) For detailed drawing and dimension table, please see end 01 data
sheet, or Appendix D 01 Burr-Brown IC Data Book.
BURR-BROWN@
I
&:I &:II Burr-Brown Ie Data Book-Linear Products
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-I
to +85'C
to +S5'C
to +85'C
to +85'C
to +85'C
to +85'C
to +85'C
to +125'C
Junction Temperature .................................................................... +150°C
NOTES: (1) Package must be derated on 8JC = t5'CIW and 8JA =
165'CIW lor the metal package and 8JC = 35'CIW and 8JA = 220'CIW
lor the ceramic package. (2) For supply voltages less than ±20VDC,
the absolute maximum input voltage is equal to the supply voltage. (3)
Short-circuit may be to ground only. Rating applies to +85'C ambient
for the metal package and +65°C for the ceramic package.
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ORDERING INFORMATION
ABSOLUTE MAXIMUM RATINGS
en
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7.39
For Immediate Assistance, Contact Your Local Salesperson
SIMPLIFIED SCHEMATIC
CONNECTION DIAGRAM
X,
X2
Y,
Y2
NOTE: (1) Optional component.
100kD
-tSVDC
DICE INFORMATION
PAD
FUNCTION
1
2
3
Vos
Z,
Y,
4
X.
S
6
7
8
9
10
Vo
Z,
+V
-V
X,
Y,
Substrate Bias: -Vee
MECHANICAL INFORMATION
Die Size
Die Thickness
Min. Pad Size
MILS (0.001 ")
MILUMETERS
107x93±S
20±3
4x4
2.72x2.36±O.13
0.S1 ±0.08
0.10 x 0.10
Backing
Gold
BURR-BR9WN@
7.40
Burr-Brown Ie Data Book-Linear Products
111511151'
O~
Call Customer Service at 1·800·548·6132 (USA Only)
TYPICAL PERFORMANCE CURVES
At T. = +25'C and ±Vs = 15VDC, unless otherwise specified.
NONLINEARITY vs FREQUENCY
TOTAL ERROR vs AMBIENT TEMPERATURE
100
Inp~t Signal = 2~VP'P
V-·-
- - - -1---._--
/
1---+-----+-.--- -"'---+I/---C~
~-_l
/' /
.
./
/Y
I- --=--=-~~~~==':':t-'"",'"."-...-=.-'
.-
.--.--f---~--
0.001
-50
50
10
150
100
100
FEEDTHROUGH vs FREQUENCY
c:
I
500
C.
.s
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50 -
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€
20
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Feedthrough
1
X
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10 -
Y
Jeedthrou~h
100
-
/
5
10
Small Signal
:..--
I
100
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5
-
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Input Signal = 20Vp-p
200
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-5
t
:; -10
--
1M
lOOk
>
0-
~\
~ -15
10M
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\
-,20
10k
lk
1M
OUTPUT AMPLITUDE vs FREQUENCY
1000
>
lOOk
10k
lk
Frequency (Hz)
Ambient Temperature ('C)
lOOk
10k
Frequency (Hz)
1M
10M
:!E
•
(/)
Frequency (Hz)
Z
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i=
LARGE SIGNAL RESPONSE
10
/
INPUT VOLTAGE FOR LINEAR RESPONSE
----~
/""
1\ - -
20
i. \
/
\
R,=2kll
C, -150pF
/
-10
a
3
Time
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14 r---i--+-~--r-t--r-+-~,-,-'~'~~
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.---,~~"
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....
1--+-+--1--+--1-,-,'7,-F/-r-i-.~ ....
: 1-1----+-1---.+---+-+--,-7'1"-/-,(-.-...-=.."""---i~-' - -
\
2
r----r-.,.---,-...,--,---,...-.,.---,-...,---,
18 I- - - - - I
-+--+--+---1
- - Differential
16 I- ........ Negative Common.Mode -+--i--~-i-,--:,;>I
Input
Output
4
5
(~s)
~ ~=~~=~==~==~~:"~"'~'="'~'==~==~==~=~
2
4
8
10
12
14
16
18
20
Power Supply Voltage (±VcC>
BURR~BROW'N
D.
Y,
:::&
Y2
Z,
Z2
FIGURE 1. MPYlOO Functional Block Diagram.
r------...-o +vcc
FIGURE 3. Cross-Coupled Differential Stages as a VariableTransconductance Multiplier.
An analysis of the circuit in Figure 3 shows it to have the
same overall transfer function as before:
For input voltages larger than VT' the voltage-to-current
transfer characteristics of the differential pair QI' Q 2 or Q,
and Q, are no longer linear. Instead, their collector currents
are related to the applied voltage V I
13
12
I,
-=-=e
~'
T
The resultant nonlinearity can be overcome by developing
VI logarithmically to exactly cancel the exponential relationship just derived. This is done by diodes D, and D2 in
Figure 4.
FIGURE 2. Basic Differential Stage as a Transconductance
Multiplier.
The emitter degeneration resistors, Rx and R y , in Figure 4,
provide a linear conversion of the input voltages to differential current, Ix and Iy , where:
BURR· BROWNe
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Burr-Brown Ie Data Book-Linear Products
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Q.
470kn
>-----.)w'---.,---- To the appropriate
AC feedtbrough may be reduced to a minimum by applying
an external voltage to the X or Y input as shown in Figure
6.
the optional summing input, may be used to sum a
voltage into the output of the MPYIOO. If not used, this
terminal, as well as the X and Y input terminals, should be
grounded. All inputs should be referenced to power supply
common.
+15VDC
FIGURE 5. Multiplier Connection.
The MPY100 meets all of its specifications without trimming. Accuracy can, however be improved over a limited
range by nulling the output offset voltage using the lOOn
optional balance potentiometer shown in Figure 5.
0.,
NOTE: (1) Optional balance
potentiometer.
100kn
MULTIPLICATION
Figure 5 shows the basic connection for four-quadrant multiplication.
(X, -X2)(Y, -Y2)
10
+Z2
input terminal.
1kn
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-Vee
FIGURE 6. Optional Trimming Configuration.
R2
10kn
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X,
Figure 7 shows how to achieve a scale factor larger than the
nominal 1/10. In this case, the scale factor is unity which
makes t.he tra.f1sfer n.1nctinn
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MPY100
~
Y,
~Y2
Z
::;)
0.1 SKS 1
This circuit has the disadvantage of increasing the output
offset voltage by a factor of 10, which may require the use
of the optional balance control as in Figure 1 for some
applications. In addition, this connection reduces the small
signal bandwidth to about 50kHz.
-1
-L
X,
x2
X,
X2
v,
v2
MPY100
MPY100
V,
v2
(a) Circun for positive Vz.
/---t--C Optional
Summing
Input, ±1 OV, FS
FIGURE 9. Squarer Connection.
Optional
Summing
Input,
±10V, FS
x,
z,.,,----,
MPY100
SQUARE ROOT
Figure 10 shows the connection for taking the square root of
the voltage Vz' The diode prevents a latching condition
which could occur if the input momentarily changed polarity. This latching condition is not a design flaw in the
MPYlOO, but occurs when a multiplier is connected in the
feedback loop of an operational amplifier to perform square
root functions.
(b) Circuit for negative Vz.
FIGURE 10. Square Root Connection.
v - (V2 -V,)
The load resistance, R L. must be in the range of
Will ~ RL ~ IMQ. This resistance must be in the circuit as
it provides the current necessary to operate the diode.
0-
V1
100
1% per volt
0--*-1 X,
PERCENTAGE COMPUTATION
The circuit of Figure 11 has a sensitivity of IV/% and is
capable of measuring 10% deviations. Wider deviation can
be measured by decreasing the ratio of RJR,.
X2
MPY100
V,
V2
9kQ
BRIDGE LINEARIZATION
1kQ
The use of the MPYlOO to linearize the output from a bridge
circuit makes the output V 0 independent of the bridge supply
voltage. See Figure 12.
FIGURE II. Percentage Computation.
TRUE RMS-TO-DC CONVERSION
The rms-to-DC conversion circuit of Figure 13 gives greater
accuracy and bandwidth but with less dynaruic range than
most rms-to-DC converters.
SINE FUNCTION GENERATOR
The circuit in Figure 14 uses implicit feedback to implement
the following sine function approximation:
Vo
= (1.5715V, - 0.004317V/)/(1 + 0.001398V,2)
= 10 sin (9V,)
BURR·BROWN@
7.46
Burr-Brown Ie Data Book-Linear Products
I E51E5II
Or, Call Customer Service at 1·800·548·6132 (USA Only)
v
x,
>'V;-2- -.......-1 X2
Y,
V, =-¥- [ - - k ]
1+AR
V2=V[--k]
1+AR
NOTE: V should be as large as possible to minimize divider errors. But V ~ [10 + (20RlAR)]
to keep V2within the input voltage limits of the MPYIOO.
FIGURE 12. Bridge Linearization.
Matched to 0.025%
R,
20k,Q
IOk,Q
R2
10k,Q
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X,
X2
MPY100
o-~/\I\I'--"""""
AC
10ka
l
Y,
:E
}-<0--..N1JL---1r----i f-----jr-o Vo
Y2
Vo=JV;i
Ot05V
Mode Switch
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~~_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _-_-_ _ _ _ _ _ _ _- - J
FIGURE 13. True RMS-to-DC Conversion.
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±20
±30
70
"V/oC
MHz
2
OUTPUT
Output Voltage Swing
Output Impedance (I s 1kHz)
Output Short Circuit Current
(Rl = 0, T, = min to max)
Amplilier Open Loop Gain
(I = 50Hz)
Total Error(1]
(X = lOV, -10V s Z
s +10V)
(X -1V, -1V $ 2
S+1V)
(0.1V s X s 10V,
-10V s 2 s 10V)
mV
3
50
20
NOISE
Noise Spectral Density:
SF = 10V
Wideband Noise:
1 = 10Hz to 5MHz
1 = 10Hz to 10kHz
INPUT AMPLIFIERS
(X, V and Z)
Input Voltage Range
Differential VIN (VeM = 0)
Common-Mode VIN
(V D'FF = 0) (see Typical
Performance Curves)
Offset Voltage X, Y
Offset Voltage Drift X, V
Offset Voltage 2
Offset Voltage Drill Z
CMRR
Bias Current
Offset Current
Differential Resistance
%
±30
500
V
±2
50
±2
100
90
0.8
0,1
10
.
±10
±15
±5
100
±5
±10
.
60
2.0
0.05
.
±20
±30
500
mV
"V/oC
mV
300
80
0.2
~V/oC
dB
JlA
2.0
2.0
JlA
MQ
10V .(2, - 2,) + V
(X, - X,)
)
±0.75
±0.35
±0.2
±0.75
%
±2.0
±1.0
±O.S
±2.0
%
±2.5
±1.0
±0.8
±2.5
%
BURR-BROWN®
7.50
Burr-Brown Ie Data Book-Linear Products
11511511
Or, Call Customer Service at 1·800·548·6132 (USA Only)
SPECIFICATIONS
(CONT)
ELECTRICAL
TA = +25°C and V, = ±15VDC, unless otherwise specified.
MPY534J
PARAMETER
TYP
MIN
MPY534K
MAX
MIN
TYP
MPY534L
MAX
MIN
TYP
(X,-X,)'
---:;ov- + Z,
I ±0.3 I
Total Error (-10V,; X,; 10V)
0.6
SQUARE-ROOTER
PERFORMANCE
Transfer Function (Z, ,; 2,)
Total Error'" (1V,; Z,; 10V)
±1.0
POWER SUPPLY
Supply Voltage:
Rated Performance
Operating
Supply Current, Quiescent
TEMPERATURE RANGE
Operating
Storage
. .
· .
··
.
±0.5
±0.25
±15
±18
6
4
0
-65
+70
+150
TYP
MIN
·
·
·
·
··
.
-55
TYP
MAX
UNITS
·
·
%
·
±D.5
±1.0
·
'Specifications same as for MPY534K.
NOTES: (1) Figures given are percent offull scale, ±10V (Le., 0.01% = 1mV). (2) May be reduced
component due to nonlinearity; excludes effect of offsets.
MPY534T
MAX
±D.6
±0.2
J10V(Z, - Z,) + X,
±8
MIN
.
SQUARE PERFORMANCE
Transfer Function
MPY534S
MAX
·
±20
+125
%
±20
VDC
VDC
mA
.
-55
+125
to 3V using external resistor between -Vs and SF.
°C
°C
(3) Irreducible
PIN CONFIGURATIONS
X,
Top View
TO-100
Top View
DIP
X,
SF
Out
Y,
Z,
>
a.
13 +Vs
X,
IIIi::I'
('I)
it)
NC
:::i
NC
SF
NC
en
Y,
Y,
ABSOLUTE MAXIMUM RATINGS
I y'DVI;,'1A
.... __ I I(,-I
rill. AI Cll:.n
......
Power Supply Voltage
Power Dissipation
Output Short-Circuit to Ground
Input Voltage (all X, Y and Z)
Operating Temperature Range
Storage Temperature Range
Lead Temperature (soldering, iDs)
MPV~~4!'1
±18
500mW
Indefinite
..
DoC to +70°C
-55°C to +125°C
-65°C to +150°C
+300°C
"'SpeCification same as for MPY534K.
PACKAGE INFORMATION(1)
MODEL
MPY534JD
MPY534JH
MPY534KD
MPY534KH
MPY534LD
MPY534LH
MPY534SD
MPY534SH
MPY534TD
MPY534TH
PACKAGE
Ceramic DIP
Metal TO-100
Ceramic DIP
Metal TO-1oo
Ceramic DJP
Metal TO-100
Ceramic DIP
Metal TO-100
Ceramic DIP
Metal TO-100
8
z
-Vs
o
t3z
T
±20
±Vs
7
PACKAGE DRAWING
NUMBER
ORDERING INFORMATION
MODEL
MPY534JD
MPY534JH
MPY534KD
MPY534KH
MPY534LD
MPY534LH
MPY534SD
MPY534SH
MPY534TD
MPY534TH
PACKAGE
TEMPERATURE RANGE
Ceramic DIP
Metal TO-100
Ceramic DIP
Metal TO-100
Ceramic DIP
Metal TO-1oo
Ceramic DIP
Metal TO-100
Ceramic DIP
Metal TO-100
O°C to +70°C
DoC to +70°C
DoC to +70°C
DoC to +70°C
DoC to +70°C
DoC to +70°C
-55°C to + 125°C
-55°C to + 125°C
-55°C to +125°C
-55°C to + 125°C
169
007
169
007
169
007
169
007
169
007
NOTE: (1) For detailed draWing and dimenSion table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
BURR-BROWN®
I &:I &:II
Burr-Brown Ie Data Book-Linear Products
7.51
~
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