20XX XX.cours.manual.HC11.anglais.sysnum
User Manual:
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- TABLE OF CONTENTS
- LIST OF FIGURES
- LIST OF TABLES
- SECTION 1 GENERAL DESCRIPTION
- SECTION 2 PINS AND CONNECTIONS
- 2.1 Packages And Pin Names
- 2.2 Pin Descriptions
- 2.2.1 Power-Supply Pins (VDD and VSS)
- 2.2.2 Mode Select Pins (MODB/VSTBY and MODA/LIR)
- 2.2.3 Crystal Oscillator and Clock Pins (EXTAL, XTAL, and E)
- 2.2.4 Crystal Oscillator Application Information
- 2.2.5 Reset Pin (RESET)
- 2.2.6 Interrupt Pins (XIRQ, IRQ)
- 2.2.7 A/D Reference and Port E Pins (VREFL, VREFH, PE[7:0])
- 2.2.8 Timer Port A Pins
- 2.2.9 Serial Port D Pins
- 2.2.10 Ports B and C, STRA, and STRB Pins
- 2.3 Termination of Unused Pins
- 2.4 Avoidance of Pin Damage
- 2.4.1 Zap and Latchup
- 2.4.2 Protective Interface Circuits
- 2.4.3 Internal Circuitry — Digital Input-Only Pin
- 2.4.4 Internal Circuitry — Analog Input-Only Pin
- 2.4.5 Internal Circuitry — Digital I/O Pin
- 2.4.6 Internal Circuitry — Input/Open-Drain-Output Pin
- 2.4.7 Internal Circuitry — Digital Output-Only Pin
- 2.4.8 Internal Circuitry — MODB/VSTBY Pin
- 2.4.9 Internal Circuitry — IRQ/VPPBULK Pin
- 2.5 Typical Single-Chip-Mode System Connections
- 2.6 Typical Expanded-Mode-System Connections
- 2.7 System Development and Debug Features
- SECTION 3 CONFIGURATION AND MODES OF OPERATION
- 3.1 Hardware Mode Selection
- 3.2 EEPROM-Based CONFIG Register
- 3.3 Protected Control Register Bits
- 3.4 Normal MCU Operating Modes
- 3.5 Special MCU Operating Modes
- 3.6 Test and Bootstrap Mode Applications
- SECTION 4 ON-CHIP MEMORY
- SECTION 5 RESETS AND INTERRUPTS
- 5.1 Initial Conditions Established During Reset
- 5.2 Causes Of Reset
- 5.3 Interrupt Process
- 5.4 Non-Maskable Interrupts
- 5.5 Maskable Interrupts
- 5.6 Interrupt Request
- 5.7 Interrupts from Internal Peripheral Subsystems
- SECTION 6 CENTRAL PROCESSING UNIT
- SECTION 7 PARALLEL INPUT/OUTPUT
- 7.1 Parallel I/O Overview
- 7.2 Parallel I/O Register And Control Bit Explanations
- 7.3 Detailed I/O Pin Descriptions
- 7.4 Handshake I/O Subsystem
- SECTION 8 SYNCHRONOUS SERIAL PERIPHERAL INTERFACE
- SECTION 9 ASYNCHRONOUS SERIAL COMMUNICATIONS INTERFACE
- SECTION 10 MAIN TIMER AND REAL-TIME INTERRUPT
- 10.1 General Description
- 10.2 Free-Running Counter and Prescaler
- 10.3 Input-Capture Functions
- 10.3.1 Programmable Options
- 10.3.2 Using Input Capture to Measure Period and Frequency
- 10.3.3 Using Input Capture to Measure Pulse Width
- 10.3.4 Measuring Very Short Time Periods
- 10.3.5 Measuring Long Time Periods with Input Capture and Overflow
- 10.3.6 Establishing a Relationship between Software and an Event
- 10.3.7 Other Uses for Input-Capture Pins
- 10.4 Output-Compare Functions
- 10.5 Timing Details For The Main Timer System
- 10.6 Listing of Timer Examples
- SECTION 11 PULSE ACCUMULATOR
- SECTION 12 ANALOG-TO-DIGITAL CONVERTER SYSTEM
- APPENDIX A INSTRUCTION SET DETAILS
- APPENDIX B BOOTLOADER LISTINGS
- INDEX