4 MBIT (512KB X8 OR 256KB X16) UV EPROM AND OTP 27C400

User Manual: 27C400

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M27C400
4 Mbit (512Kb x8 or 256Kb x16) UV EPROM and OTP EPROM
■

5V ± 10% SUPPLY VOLTAGE in READ
OPERATION

■

ACCESS TIME: 55ns

■

BYTE-WIDE or WORD-WIDE
CONFIGURABLE

■

4 Mbit MASK ROM REPLACEMENT

■

LOW POWER CONSUMPTION
– Active Current 70mA at 8MHz
– Stand-by Current 100µA

■

PROGRAMMING VOLTAGE: 12.5V ± 0.25V

■

PROGRAMMING TIME: 100µs/word

■

ELECTRONIC SIGNATURE

FDIP40W (F)

PDIP40 (B)

– Manufacturer Code: 20h
– Device Code: B8h
DESCRIPTION
The M27C400 is an 4 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for microprocessor systems requiring large data or program
storage. It is organised as either 512 Kwords of 8
bit or 256 Kwords of 16 bit. The pin-out is compatible with the most common 8 Mbit Mask ROM.
The FDIP40W (window ceramic frit-seal package)
has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern.
A new pattern can then be written rapidly to the device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C400 is offered in PDIP40 package.

Figure 1. Logic Diagram

VCC

Q15A–1

A0-A17

15
Q0-Q14

M27C400

G
BYTEVPP

VSS
AI01634

May 1999

1/14

M27C400
Figure 2. DIP Connections
A17
A7
A6
A5
A4
A3
A2
A1
A0
E
VSS
G
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11

Table 1. Signal Names

1
40
2
39
3
38
4
37
5
36
6
35
7
34
33
8
32
9
31
10
M27C400
30
11
29
12
28
13
27
14
26
15
25
16
17
24
18
23
19
22
20
21

A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTEVPP
VSS
Q15A–1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC

AI01635

DEVICE OPERATION
The operating modes of the M27C400 are listed in
the Operating Modes Table. A single power supply
is required in the read mode. All inputs are TTL
compatible except for V PP and 12V on A9 for the
Electronic Signature.
Read Mode
The M27C400 has two organisations, Word-wide
and Byte-wide. The organisation is selected by the
signal level on the BYTEVPP pin. When BYTEVPP
is at VIH the Word-wide organisation is selected
and the Q15A–1 pin is used for Q15 Data Output.
When the BYTEVPP pin is at V IL the Byte-wide organisation is selected and the Q15A–1 pin is used
for the Address Input A–1. When the memory is

2/14

A0-A17

Address Inputs

Q0-Q7

Data Outputs

Q8-Q14

Data Outputs

Q15A–1

Data Output / Address Input

Chip Enable

Output Enable

BYTEVPP

Byte Mode / Program Supply

VCC

Supply Voltage

VSS

Ground

logically regarded as 16 bit wide, but read in the
Byte-wide organisation, then with A–1 at VIL the
lower 8 bits of the 16 bit data are selected and with
A–1 at VIH the upper 8 bits of the 16 bit data are
selected.
The M27C400 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. In addition the Word-wide or
Byte- wide organisation must be selected.
Chip Enable (E) is the power control and should be
used for device selection. Output Enable (G) is the
output control and should be used to gate data to
the output pins independent of device selection.
Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay
from E to output (tELQV). Data is available at the
output after a delay of t GLQV from the falling edge
of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV.
Standby Mode
The M27C400 has a standby mode which reduces
the supply current from 50mA to 100µA. The
M27C400 is placed in the standby mode by applying a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high impedance state, independent of the G input.

M27C400
Table 2. Absolute Maximum Ratings (1)
Symbol

Value

Unit

Ambient Operating Temperature (3)

–40 to 125

°C

TBIAS

Temperature Under Bias

–50 to 125

°C

TSTG

Storage Temperature

–65 to 150

°C

VIO (2)

Input or Output Voltage (except A9)

–2 to 7

Supply Voltage

–2 to 7

–2 to 13.5

–2 to 14

VCC
VA9 (2)

Parameter

A9 Voltage

VPP

Program Supply Voltage

Note: 1. Except for the rating “Operating Temperature Range”, stresses above those listed in the Table “Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V CC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
3. Depends on range.

Table 3. Operating Modes
E

BYTEVPP

Q7-Q0

Q14-Q8

Q15A–1

Read Word-wide

VIL

VIH

Data Out

Read Byte-wide Upper

VIL

Data Out

Hi-Z

VIH

Read Byte-wide Lower

VIL

Data Out

Hi-Z

VIL

Output Disable

VIL

VIH

Hi-Z

VIL Pulse

VIH

VPP

Data In

Verify

VIH

VIL

VPP

Data Out

Program Inhibit

VIH

VPP

Hi-Z

Standby

VIH

Hi-Z

Electronic Signature

VIL

VIH

VID

Codes

Code

Mode

Program

Note: X = VIH or VIL, V ID = 12V ± 0.5V.

Table 4. Electronic Signature
Identifier

Hex Data

Manufacturer’s Code

VIL

20h

Device Code

VIH

B2h

Note: Outputs Q15-Q8 are set to '0'.

3/14

M27C400
Table 5. AC Measurement Conditions
High Speed

Standard

Input Rise and Fall Times

≤ 10ns

≤ 20ns

Input Pulse Voltages

0 to 3V

0.4V to 2.4V

1.5V

0.8V and 2V

Input and Output Timing Ref. Voltages

Figure 3. Testing Input Output Waveform

Figure 4. AC Testing Load Circuit
1.3V

High Speed
1N914

3V
1.5V

3.3kΩ

0V
DEVICE
UNDER
TEST

Standard
2.4V

OUT
CL

2.0V
0.8V

0.4V

AI01822

CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance

AI01823B

Table 6. Capacitance (1) (TA = 25 °C, f = 1 MHz)
Symbol
CIN
COUT

Parameter

Test Condition

Min

Max

Unit

Input Capacitance (except BYTEVPP)

VIN = 0V

Input Capacitance (BYTEVPP)

VIN = 0V

120

VOUT = 0V

Output Capacitance

Note: 1. Sampled only, not 100% tested.

Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2-line control function which accommodates the use of multiple memory connection. The two-line control
function allows:
a. the lowest possible memory power dissipation
b. complete assurance that output bus contention
will not occur.

4/14

For the most efficient use of these two control
lines, E should be decoded and used as the primary device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselected memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.

M27C400
Table 7. Read Mode DC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = V CC)
Symbol

Parameter

ILI

Input Leakage Current

ILO

Output Leakage Current

ICC

Test Condition

Min

Max

Unit

0V ≤ VIN ≤ VCC

±1

µA

0V ≤ VOUT ≤ VCC

±10

µA

E = VIL, G = VIL,
IOUT = 0mA, f = 8MHz

E = VIL, G = VIL,
IOUT = 0mA, f = 5MHz

E = VIH

E > VCC – 0.2V

100

µA

VPP = VCC

µA

Supply Current

ICC1

Supply Current (Standby) TTL

ICC2

Supply Current (Standby) CMOS

IPP

Program Current

VIL

Input Low Voltage

–0.3

0.8

VIH (2)

Input High Voltage

VCC + 1

VOL

Output Low Voltage

0.4

VOH

Output High Voltage TTL

IOL = 2.1mA
IOH = –400µA

2.4

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after V PP.
2. Maximum DC voltage on Output is VCC +0.5V.

System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current I CC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E. The magnitude of the
transient current peaks is dependent on the capacitive and inductive loading of the device outputs. The associated transient voltage peaks can
be suppressed by complying with the two line output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceramic capacitor is used on every device between V CC
and VSS. This should be a high frequency type of
low inherent inductance and should be placed as
close as possible to the device. In addition, a
4.7µF electrolytic capacitor should be used between V CC and VSS for every eight devices. This

capacitor should be mounted near the power supply connection point. The purpose of this capacitor
is to overcome the voltage drop caused by the inductive effects of PCB traces.
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C400 are in the '1'
state. Data is introduced by selectively programming '0's into the desired bit locations. Although
only '0's will be programmed, both '1's and '0's can
be present in the data word. The only way to
change a '0' to a '1' is by die exposition to ultraviolet light (UVEPROM). The M27C400 is in the programming mode when V PP input is at 12.5V, G is
at VIH and E is pulsed to V IL. The data to be programmed is applied to 16 bits in parallel to the data
output pins. The levels required for the address
and data inputs are TTL. V CC is specified to be
6.25V ± 0.25V.

5/14

M27C400
Table 8A. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = V CC)
M27C400
Symbol

Alt

Parameter

Test Condition

-55 (3)
Min

Max

-70
Min

Unit

Max

Address Valid to Output Valid

E = VIL, G = VIL

tST

BYTE High to Output Valid

E = VIL, G = VIL

tELQV

tCE

Chip Enable Low to Output Valid

G = VIL

tGLQV

tOE

Output Enable Low to Output Valid

E = VIL

tBLQZ (2)

tSTD

BYTE Low to Output Hi-Z

E = VIL, G = VIL

tEHQZ (2)

tDF

Chip Enable High to Output Hi-Z

G = VIL

tGHQZ (2)

tDF

Output Enable High to Output Hi-Z

E = VIL

tAXQX

tOH

Address Transition to Output Transition

E = VIL, G = VIL

tBLQX

tOH

BYTE Low to Output Transition

E = VIL, G = VIL

tAVQV

tACC

tBHQV

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after V PP
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed measurement conditions.

Table 8B. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = V CC)
M27C400
Symbol

Alt

Parameter

Test Condition

-80
Min

-100

Max

Min

Unit

Max

Address Valid to Output Valid

E = VIL, G = VIL

100

tST

BYTE High to Output Valid

E = VIL, G = VIL

100

tELQV

tCE

Chip Enable Low to Output Valid

G = VIL

100

tGLQV

tOE

Output Enable Low to Output Valid

E = VIL

tBLQZ (2)

tSTD

BYTE Low to Output Hi-Z

E = VIL, G = VIL

tEHQZ (2)

tDF

Chip Enable High to Output Hi-Z

G = VIL

tGHQZ (2)

tDF

Output Enable High to Output Hi-Z

E = VIL

tAXQX

tOH

Address Transition to Output Transition

E = VIL, G = VIL

tBLQX

tOH

BYTE Low to Output Transition

E = VIL, G = VIL

tAVQV

tACC

tBHQV

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after V PP
2. Sampled only, not 100% tested.

6/14

M27C400
Figure 5. Word-Wide Read Mode AC Waveforms

A0-A17

VALID
tAVQV

VALID
tAXQX

E
tEHQZ

tGLQV
G

tGHQZ

tELQV

Hi-Z

Q0-Q15

AI01636

Note: BYTEVPP = VIH.

Figure 6. Byte-Wide Read Mode AC Waveforms

A–1,A0-A17

VALID
tAVQV

VALID
tAXQX

E
tGLQV

tEHQZ

G
tELQV
Q0-Q7

tGHQZ
Hi-Z

AI01637

Note: BYTEVPP = VIL.

7/14

M27C400
Figure 7. BYTE Transition AC Waveforms

A0-A17

VALID

A–1

VALID
tAVQV

tAXQX

BYTEVPP
tBHQV
DATA OUT

Q0-Q7
tBLQX
Hi-Z
Q8-Q15

DATA OUT
tBLQZ
AI01638B

Note: Chip Enable (E) and Output Enable (G) = VIL.

Table 9. Programming Mode DC Characteristics (1)
(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.5V ± 0.25V)
Symbol

Parameter

Test Condition

Min

0 ≤ VIN ≤ VCC

Max

Unit

±1

µA

ILI

Input Leakage Current

ICC

Supply Current

IPP

Program Current

VIL

Input Low Voltage

–0.3

0.8

VIH

Input High Voltage

2.4

VCC + 0.5

VOL

Output Low Voltage

0.4

VOH

Output High Voltage TTL

VID

A9 Voltage

E = VIL

IOL = 2.1mA
IOH = –2.5mA

3.5
11.5

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after V PP.

8/14

V
12.5

M27C400
Table 10. Programming Mode AC Characteristics (1)
(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.5V ± 0.25V)
Symbol

Alt

Parameter

Test Condition

Min

Max

tAVEL

tAS

Address Valid to Chip Enable Low

µs

tQVEL

tDS

Input Valid to Chip Enable Low

µs

tVPHAV

tVPS

VPP High to Address Valid

µs

tVCHAV

tVCS

VCC High to Address Valid

µs

tELEH

tPW

Chip Enable Program Pulse Width

tEHQX

tDH

Chip Enable High to Input Transition

µs

tQXGL

tOES

Input Transition to Output Enable Low

µs

tGLQV

tOE

Output Enable Low to Output Valid

tGHQZ (2)

tDFP

Output Enable High to Output Hi-Z

tGHAX

tAH

Output Enable High to Address
Transition

Unit

µs

120

130

ns
ns

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after V PP.
2. Sampled only, not 100% tested.

Figure 8. Programming and Verify Modes AC Waveforms

A0-A17

VALID
tAVEL
DATA IN

Q0-Q15

tQVEL

DATA OUT
tEHQX

BYTEVPP
tVPHAV

tGLQV

tGHQZ

VCC
tVCHAV

tGHAX

E
tELEH

tQXGL

PROGRAM

VERIFY
AI01639

9/14

M27C400
Figure 9. Programming Flowchart

VCC = 6.25V, VPP = 12.5V

n=0

E = 50µs Pulse
NO
++n
= 25
YES

FAIL

VERIFY

++ Addr

YES
Last
Addr

YES
CHECK ALL WORDS
BYTEVPP =VIH
1st: VCC = 6V
2nd: VCC = 4.2V
AI01044B

PRESTO III Programming Algorithm
The PRESTO III Programming Algorithm allows
the whole array to be programed with a guaranteed margin in a typical time of 26 seconds. Programming with PRESTO III consists of applying a
sequence of 50µs program pulses to each word
until a correct verify occurs (see Figure 9). During
programing and verify operation a MARGIN
MODE circuit is automatically activated to guarantee that each cell is programed with enough margin. No overpromise pulse is applied since the
verify in MARGIN MODE provides the necessary
margin to each programmed cell.
Program Inhibit
Programming of multiple M27C400s in parallel
with different data is also easily accomplished. Except for E, all like inputs including G of the parallel
M27C400 may be common. A TTL low level pulse
applied to a M27C400's E input and VPP at 12.5V,
will program that M27C400. A high level E input inhibits the other M27C400s from being programmed.
Program Verify
A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with E
at V IH and G at VIL, V PP at 12.5V and VCC at
6.25V.

10/14

On-Board Programming
The M27C400 can be directly programmed in the
application circuit. See the relevant Application
Note AN620.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the M27C400. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
M27C400, with VPP = V CC = 5V. Two identifier
bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All
other address lines must be held at VIL during
Electronic Signature mode.
Byte 0 (A0 = V IL) represents the manufacturer
code and byte 1 (A0 = V IH) the device identifier
code. For the STMicroelectronics M27C400, these
two identifier bytes are given in Table 4 and can be
read-out on outputs Q7 to Q0.
ERASURE OPERATION (applies to UV EPROM)
The erasure characteristics of the M27C400 is
such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluorescent lighting could erase a typical M27C400 in
about 3 years, while it would take approximately 1
week to cause erasure when exposed to direct
sunlight. If the M27C400 is to be exposed to these
types of lighting conditions for extended periods of
time, it is suggested that opaque labels be put over
the M27C400 window to prevent unintentional erasure. The recommended erasure procedure for
M27C400 is exposure to short wave ultraviolet
light which has a wavelength of 2537 Å. The integrated dose (i.e. UV intensity x exposure time) for
erasure should be a minimum of 30 W-sec/cm 2.
The erasure time with this dosage is approximately 30 to 40 minutes using an ultraviolet lamp with
12000 µW/cm 2 power rating. The M27C400
should be placed within 2.5cm (1 inch) of the lamp
tubes during the erasure. Some lamps have a filter
on their tubes which should be removed before
erasure.

M27C400
Table 11. Ordering Information Scheme
Example:

M27C400

-70

Device Type
M27
Supply Voltage
C = 5V
Device Function
400 = 4 Mbit (512Kb x8 or 256Kb x16)
Speed
-55 (1) = 55 ns
-70 = 70 ns
-80 = 80 ns
-100 = 100 ns
VCC Tolerance
blank = ± 10%
X = ± 5%
Package
F = FDIP40W
B = PDIP40
Temperature Range
1 = 0 to 70 °C
6 = –40 to 85 °C
Options
TR = Tape & Reel Packing

Note: 1. High Speed, see AC Characteristics section for further information.

For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.

11/14

M27C400
Table 12. FDIP40W - 40 lead Ceramic Frit-seal DIP with window, Package Mechanical Data
Symb

mm
Typ

inches

Min

Max

Typ

Min

5.72

Max
0.225

0.51

1.40

0.020

0.055

3.91

4.57

0.154

0.180

3.89

4.50

0.153

0.177

0.41

0.56

0.016

0.022

–

0.23

0.30

0.009

0.012

51.79

52.60

2.039

2.071

–

1.900

–

0.600

B
B1

1.45

C
D
D2

48.26

15.24

E1
e

2.54

ea.

14.99

0.057

–

13.06

13.36

–

0.100
0.590

–

0.514

0.526

–

16.18

18.03

0.637

0.710

3.18

–

0.125

–

1.52

2.49

0.060

0.098

∅

–

8.13

4°

11°

0.320

–

4°

11°

Figure 10. FDIP40W - 40 lead Ceramic Frit-seal DIP with window, Package Outline

A3
A1
B1

A
L

α
eA

D
S
N
∅

1
FDIPW-a

Drawing is not to scale.

12/14

M27C400
Table 13. PDIP40 - 40 pin Plastic DIP, 600 mils width, Package Mechanical Data
mm

inches

Symb
Typ

Min

Max

Typ

Min

Max

4.45

–

0.175

–

0.64

0.38

–

0.025

0.015

–

3.56

3.91

0.140

0.154

0.38

0.53

0.015

0.021

1.14

1.78

0.045

0.070

0.20

0.31

0.008

0.012

51.78

52.58

2.039

2.070

–

14.80

16.26

0.583

0.640

13.46

13.99

0.530

0.551
–

48.26

1.900

2.54

–

0.100

–

ea.

15.24

–

0.600

–

15.24

17.78

0.600

0.700

3.05

3.81

0.120

0.150

1.52

2.29

0.060

0.090

0°

15°

0°

15°

Figure 11. PDIP40 - 40 lead Plastic DIP, 600 mils width, Package Outline

A2
A1
B1

A
L

α
eA

D
S
N

1
PDIP

Drawing is not to scale.

13/14

M27C400

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is registered trademark of STMicroelectronics
 1999 STMicroelectronics - All Rights Reserved
All other names are the property of their respective owners.
STMicroelectronics GROUP OF COMPANIES
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http://www.st.com

14/14

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File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
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Create Date                     : 1999:06:09 11:27:02
Producer                        : Acrobat Distiller Daemon 3.0 for Solaris 2.3 and later (SPARC)
Title                           : 4 MBIT (512KB X8 OR 256KB X16) UV EPROM AND OTP EPROM
Subject                         : M27C400
Author                          : STMicroelectronics
Keywords                        : Datasheet
Modify Date                     : 2000:08:15 11:21:28+02:00
Page Count                      : 14
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4 MBIT (512KB X8 OR 256KB X16) UV EPROM AND OTP 27C400

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