3330 DDC.ib.Rev6 DDC_ib_Rev6 DDC Ib Rev6

User Manual: 3330-DDC_ib_Rev6

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I R T Electronics Pty Ltd A.B.N. 35 000 832 575
26 Hotham Parade, ARTARMON N.S.W. 2064 AUSTRALIA
National: Phone: (02) 9439 3744
Fax: (02) 9439 7439
International:
+61 2 9439 3744
+61 2 9439 7439
Email: sales@irtelectronics.com
Web: www.irtelectronics.com

IRT Eurocard
Type DDC-3330
ASI to SPI Converter

Designed and manufactured in Australia
IRT can be found on the Internet at:

http://www.irtelectronics.com

3330-ddc.ib.rev6.doc

page 1 of 10

17/10/2007

IRT Eurocard
Types DDC-3330
ASI to SPI Converter
Instruction Book

Table of Contents
Section

Page

Operational Safety
General description
Technical specifications
Technical description
Internal adjustments
Configuration
Installation
Connections - ASI & SPI
ASI
SPI
Front & rear panel connector diagrams
Maintenance & storage
Warranty & service
Equipment return
Drawing index

2
3
4
5
6
6
6
7
7
7
8
9
9
9
10

This instruction book applies to units later than S/N 9907000.

Operational Safety:
WARNING
Operation of electronic equipment involves the use of voltages and currents that
may be dangerous to human life. Note that under certain conditions dangerous
potentials may exist in some circuits when power controls are in the OFF position.
Maintenance personnel should observe all safety regulations.
Do not make any adjustments inside equipment with power ON unless proper
precautions are observed. All internal adjustments should only be made by suitably
qualified personnel. All operational adjustments are available externally without the
need for removing covers or use of extender cards.

3330-ddc.ib.rev6.doc

page 2 of 10

17/10/2007

General description
The DDC-3330 series is part of a family of data transcoders for converting between the MPEG2 Transport Stream
formats commonly used in the broadcast industry for program distribution.
Equipment is built to perform a specific task and is provided with inputs and outputs suitable to performing that
task. As systems are built from individual pieces of equipment the need arises to provide interfaces between the
various formats. The DDC-3330 provides conversion from ASI to SPI and conversely, the DDC-3340 provides
conversion from SPI to ASI.

ASI:
ASI MPEG data is transported in a 270 Mb/s signal regardless of the underlying data rate. It is a convenient and
relatively inexpensive way of transporting data. ASI signals may be transported over good quality 75 Ohm coaxial
cable for distances of up to 300 m, but it is recommended that in actual practice cable lengths be kept to less than
100 m.
Where greater distances are involved, distribution amplifiers may be used to re-equalise the signal at intervals along
the path.
Alternatively, consideration should be given to using the IRT DVT-3210 / DVR-3210 fibre optic link, which will
transport ASI signals over single mode fibre optic cable for distances up to 60 Km (dependent on fibre losses).

SPI:
The SPI interface is a ten bit wide parallel interface with a synchronous clock signal. Each of the eleven signals is
sent using LVDS drivers (Low Voltage Differential Signalling). This results in a word (or byte) parallel signal at
less than a 1/10th the bit rate of ASI, making it ideal for processing, but is not suitable for use with anything other
than very short cable connections. For practical purposes 5 metres is suggested as a maximum. Where longer
distances are involved, the SPI signal should be converted to ASI and run using coaxial cable or fibre links.
The DDC-3330 module should therefore be located as close as possible to the connected SPI equipment, rather than
the ASI equipment.
The DDC-3330 does not perform any signal correction or alter the format of the MPEG2 transport stream. It only
decodes and de-serialises the ASI input and monitors the signal for MPEG2 transport stream sync errors.

Standard features:

•
•
•

Transparent ASI to SPI conversion.
One module covers data rates from 1.5 Mb/s to 50 Mb/s.
Block length indication (188/204).

Related equipment:FRU-3000 Eurocard module mounting frame

Mounts up to 12 Eurocard modules and one PT-700
Dual AC power supply side by side in 134 mm of
standard rack space (3 Rack Units).

FRU-1030 1 RU chassis conversion/PSU

Converts Eurocards to a 1 rack unit format. The
FRU-1030 can be fitted with either one or two
Eurocards in a horizontal side by side format. A
single AC power supply is included to power the
cards.

TME-6 Eurocard extender board.

3330-ddc.ib.rev6.doc

page 3 of 10

17/10/2007

Technical specifications
IRT Eurocard module
Type DDC-3330
MPEG:
Input:
Type
Input impedance
Signal level
MPEG data rate
Cable compensation
Connector

1 x ASI-C.(EN50083-9)
75Ω.
800 mVp-p.
From 2 to 50 Mb/s.
Automatic; better than 300 metres at 270 Mb/s for Belden 8281 or PSF1/2 cable.
BNC.

Outputs:
SPI
Connector

1 x SPI (EN50083-9)
25 pin 'D' female.( to EN50083-9 Table 1)

Indicators:
Power
Input
Sync
188
204

LED (green) for +5 V.
LED (red).
LED (red).
LED (green).
LED (Green).

Power Requirements
Power consumption

28 Vac CT (14-0-14) or ± 16 Vdc.
<7 VA.

Other:
Temperature range

0 - 50° C ambient

Mechanical

Mounts in IRT FRU-1030 19" 1 RU frame with input and output connections on
the rear panel.

Finish:

Front panel
Rear assembly

Grey enamel, silk-screened black lettering & red IRT logo
Detachable silk-screened PCB with direct mount connectors
to Eurocard and external signals

Dimensions

6 HP x 3 U x 220 mm IRT Eurocard

Supplied accessories

Rear connector assembly including matching connector for alarm output.

Related products

DDC-3340 – SPI to ASI 1.5 to 50 Mb/s
DDC-3460 - G.703 to SPI & ASI.
DDC-3470 - SPI to G.703 & ASI with encode & decode processing.
DDC-3475 - SPI to G.703 & ASI without processing.

3330-ddc.ib.rev6.doc

page 4 of 10

17/10/2007

Technical description

DDC-3330 ASI to SPI Converter
Output
Input

Input
Equaliser

Sync
Detection
and
P_clock
generation

Serial
to
Parallel

ASI

Output
Drivers
SPI

(270 Mb/s) coax
Alarms & indications
188 BYTE BLOCK
204 BYTE BLOCK
SYNC ERROR
INPUT LOSS

LED Indicators.
INPUT

Illuminates red if 8B/10B coding errors are detected in ASI stream.

SYNC

Indicates a FIFO underflow or overflow.

188

Indicates that the last four P_syncs were 188 byte apart.

204

Indicates that the last four P_syncs were 204 byte apart

Data Valid (D_val) .
D_val output is always high for 188 byte packets and for 204 byte packets it is high except for bytes 189 to
204 – regardless of the content of these 16 bytes.

Output Clock Jitter.
Minimum clock jitter is achieved when the P_syncs in the ASI stream are linearly distributed. As the output
clock phase is determined by P_syncs only the distribution of the other bytes is immaterial.

3330-ddc.ib.rev6.doc

page 5 of 10

17/10/2007

Internal adjustments
The following adjustable resistors are factory set.
They must not be adjusted by the user. Adjustment requires specialised equipment and procedures that are not
possible outside the factory.
RV 1 Not fitted
RV 2 Phase lock integrator
RV 3 P_Clock symmetry

Configuration
The DDC-3330 has no user configurable adjustments.

Installation
Operational Safety:
WARNING
Operation of electronic equipment involves the use of voltages and currents that
may be dangerous to human life. Note that under certain conditions dangerous
potentials may exist in some circuits when power controls are in the OFF position.
Maintenance personnel should observe all safety regulations.
Do not make any adjustments inside equipment with power ON unless proper
precautions are observed. All internal adjustments should only be made by suitably
qualified personnel. All operational adjustments are available externally without the
need for removing covers or use of extender cards.

Pre-installation:
Handling:
This equipment may contain or be connected to static sensitive devices and proper static free handling precautions
should be observed.
Where individual circuit cards are stored, they should be placed in antistatic bags. Proper antistatic procedures
should be followed when inserting or removing cards from these bags.

Power:
AC mains supply:
Ensure that operating voltage of unit and local supply voltage match and that correct
rating fuse is installed for local supply.
DC supply:
Ensure that the correct polarity is observed and that DC supply voltage is maintained within
the operating range specified.

Earthing:
The earth path is dependent on the type of frame selected. In every case particular care should be taken to ensure
that the frame is connected to earth for safety reasons. See frame manual for details.
Signal earth: For safety reasons a connection is made between signal earth and chassis earth. No attempt should be
made to break this connection.

3330-ddc.ib.rev6.doc

page 6 of 10

17/10/2007

Installation in frame or chassis:
See details in separate manual for selected frame type.

Connections:
ASI:
ASI MPEG data is transported in a 270 Mb/s signal regardless of the underlying data rate. Therefore, all cabling and
connectors should be of high quality and have a true 75 Ohm characteristic impedance.
ASI signals may be transported over good quality 75 Ohm coaxial cable for distances of up to 300 m, but again it is
recommended that in actual practice cable lengths be kept to less than 100 m.
Where greater distances are involved, distribution amplifiers may be used to re-equalise the signal at intervals along
the path.
Alternatively, consideration should be given to using the IRT DVT-3210 / DVR-3210 fibre optic link, which will
transport ASI signals over single mode fibre optic cable for distances up to 60 Km (dependent on fibre losses).

Electrical characteristics ASI:
Transmitter output characteristics:
800 mVp-p ±10%.
<10% p-p.
<8% p-p.
<1.2 ns.

Output voltage
Deterministic jitter
Random jitter
Rise/fall time (20-80%)

Receiver input characteristics:
Minimum sensitivity (D21.5 idle pattern)
Maximum input voltage
s11 (range: 0.1 to 1.0 x bit rate)
Minimum discrete connector return loss

200 mV
880 mVp-p
-17 dB
15 dB (5 MHz - 270 MHz)

Coaxial link:
Impedance
Equipment connector

75 Ohm.
BNC female.

(Electrical measurements made with 75 Ohm resistive termination.)

SPI:
The SPI interface is a ten bit wide parallel interface with a synchronous clock signal. Each signal is sent using
LVDS drivers (Low Voltage Differential Signalling).
This means that a balanced pair is required for each signal, entailing a total of twenty two signal wires plus at least
one ground connection. A twenty five pin ‘D’ connector is standard for this system.
The SPI interface is not suitable for use with anything other than very short cable connections. For practical
purposes 5 metres is suggested as a maximum. Where longer distances are involved, the SPI signal should be
converted to ASI and run using coaxial cable or fibre links.
The DDC-3330 module should therefore be located as close as possible to the connected SPI equipment, rather than
the ASI equipment.
Good quality cable and connectors must be used. For EMC it is necessary to use only ‘D’ connectors with full metal
shells and the cable outer screen should be properly connected to the shell. Unshielded cables must not be used at
all.
The ‘D’ connectors should have their securing screws firmly screwed down to ensure a continuous earth shroud is
maintained. These screws are not simply to ensure that the connector does not become unplugged, they are an
integral part of the EMC screening and signal connection.

Electrical characteristics SPI:
Line Driver Characteristics (Source)
Output impedance
Common mode voltage
Signal amplitude
Rise and fall times

100 Ω maximum
1.125 V to 1.375 V
247 mV to 454 mV
< T/7, measured between the 20% and 80% amplitude points, with a 100 Ω resistive load.
The difference between rise and fall times shall not exceed T/20.

Line Receiver Characteristics (Destination)
Input impedance
Maximum input signal
Minimum input signal

3330-ddc.ib.rev6.doc

90 Ω to 132 Ω
2.0 Vp-p
100 mVp-p

page 7 of 10

17/10/2007

Front & rear panel connector diagrams
The following front panel and rear assembly drawings are not to scale and are intended to show relative positions of
connectors, indicators and controls only.

3330

DD C -3 3 3 0

SPI OUT

25

INPUT

188

SYNC

204

1

DC

ASI IN

N140

3330-ddc.ib.rev6.doc

page 8 of 10

17/10/2007

Maintenance & storage
Maintenance:
No regular maintenance is required.
Care however should be taken to ensure that all connectors are kept clean and free from contamination of any kind.
This is especially important in fibre optic equipment where cleanliness of optical connections is critical to
performance.

Storage:
If the equipment is not to be used for an extended period, it is recommended the whole unit be placed in a sealed
plastic bag to prevent dust contamination. In areas of high humidity a suitably sized bag of silica gel should be
included to deter corrosion.
Where individual circuit cards are stored, they should be placed in antistatic bags. Proper antistatic procedures
should be followed when inserting or removing cards from these bags.

Warranty & Service
Equipment is covered by a limited warranty period of three years from date of first delivery unless contrary
conditions apply under a particular contract of supply. For situations when “No Fault Found” for repairs, a
minimum charge of 1 hour’s labour, at IRT’s current labour charge rate, will apply, whether the equipment is within
the warranty period or not.
Equipment warranty is limited to faults attributable to defects in original design or manufacture. Warranty on
components shall be extended by IRT only to the extent obtainable from the component supplier.

Equipment return:
Before arranging service, ensure that the fault is in the unit to be serviced and not in associated equipment. If
possible, confirm this by substitution.
Before returning equipment contact should be made with IRT or your local agent to determine whether the
equipment can be serviced in the field or should be returned for repair.
The equipment should be properly packed for return observing antistatic procedures.
The following information should accompany the unit to be returned:
1.
2.
3.
4.
5.
6.
7.

A fault report should be included indicating the nature of the fault
The operating conditions under which the fault initially occurred.
Any additional information, which may be of assistance in fault location and remedy.
A contact name and telephone and fax numbers.
Details of payment method for items not covered by warranty.
Full return address.
For situations when “No Fault Found” for repairs, a minimum charge of 1 hour’s labour will apply,
whether the equipment is within the warranty period or not. Contact IRT for current hourly rate.

Please note that all freight charges are the responsibility of the customer.
The equipment should be returned to the agent who originally supplied the equipment or, where this is not
possible, to IRT direct as follows.
Equipment Service
IRT Electronics Pty Ltd
26 Hotham Parade
ARTARMON
N.S.W.
2064
AUSTRALIA
Phone:
Email:

3330-ddc.ib.rev6.doc

61 2 9439 3744
service@irtelectronics.com

page 9 of 10

Fax:

61 2 9439 7439

17/10/2007

Drawing index
Drawing #

Sheet #

Description

804211
804211

1
2

DDC-3330 signal processing diagram
DDC-3330 clock circuit schematic

3330-ddc.ib.rev6.doc

page 10 of 10

17/10/2007

SK2

IND

L2

32a,b

31a,b

IND

L1

C2
100n

R1
75

C1
100n

R3
100

R2
100

9

8

11

10

6

CLC014

U1

C3
100p

4

2

7

1

Svdd

12

5

14

13

R5
75

Svdd

2
5

7

8

Dvdd

C4
100n

1

+5

1

3

4

2

+

28

U2

6

CY7B933

4

Svdd

A/!B
-

3

1

2

27

U12

R4
75

EPC1441

D1
D

23

R6
4K7
24

10

8

22

TP1

14
nCE

31
32

mSel0

6

12

55

34

76

13

78

43

54

mSel1

DATA0

5

nStatus

nConf

4

3

DCLK
ConfDone

RP2
1K
Dvdd

Ackr

RVS

42

AscNotD

19
10

44
47
48
49
50
51
52
53

58

59

D0
D1
D2
D3
D4
D5
D6
D7

ArdyNot

Arf

REFCLK

18
17
16
15
14
13
12
11

7

5

25

26

Dvdd

BB1

20

9

2

1

9

21

Svdd

39

EPF10K10
84 plcc

U5

Mclock

1data7
1Clock
1Dvalid
1Psync

1data0

83

81

80

79

1

64
65
67
66
69
70
72
71
73
62
61

R15

R14

R13

R12

470

470

470

470

14

1

1

1

1

7

LED2

LED4

LED3

LED1

27MHz
8
OSC
XTAL1

2

2

2

2

1

+5

+5

+5

+5

CD12
100n

IND

L9

R27
560

LED5
LED

CONTRACT No.

ENG. APP.

CHECKED

DRAWN

COPYRIGHT
DO NOT COPY NOR
DISCLOSE TO ANY
THIRD PARTY
WITHOUT WRITTEN
CONSENT

CD11
10uF

+5

2
1

Svdd

1 10/6/1995

9

15

7

1

9

15

1

9

15

DATA2

DATA3

DATA4

DATA5

DATA6

DATA7

CLOCK

DVALID

PSYNC

8

8

6

6

6

7

7

7

7

8

8

DRAWING No.

25

12

24

11

1

14

16

3

17

4

18

5

19

6

20

7

21

8

22

9

23

10

SHEET
1 OF 2

VCC = 16
GND = 8
EN = 4,12
= VCC

804211

DDC-3330
TITLE
ASI TO SPI CONVERTER

13b

13a

12a

12b

14
13

11a

11b

10
11

1a

1b

2
3

3a

3b

14
13

4a

4b

10
11

5a

5b

2
3

6a

6b

6
5

7a

7b

14
13

8a

8b

10
11

9a

9b

2
3

10a

10b

5

6

IRT Electronics Pty. Ltd.
ARTARMON NSW AUSTRALIA 2064

SCALE

A3

SIZE

GND = 26,41,46,68,82

Dvdd = 4,20,33,40,45,63

FROM SH2

1

DATA1

+5

7

DS90C031TM
DATA0

1

22a,b

1

1

25a,b

26a,b

24a,b

23a,b

1

21a,b

FL4

FL2

1

FL1

2

TO SHT 1

FL5

R22

FL3

3

3

C21
100p

10K

3

3

2

2

2

2

R

FS4

R

FS3

R

FS2

R

6

3

4

U11

7

CD16

CD15

CD17

10K

3

2

AVdd

R23

CD14

MC33201

FS1

R21
22K

R24

R20

RV2
10K

10K

10K

AVdd

DB2

DB1

10K

C18
100n

R19

C23
CP

C22
CP

PH

Tclk

37

IND

L3

IND

L2

Tdata

Phase

39

R35
470p

38

C24
CP

U5

ZS1

A0
A1
A2

3
5
6
7
8
9
10
11
16
17
18
19
21
22
23
24
25
27
28

DDSA0
DDSA1
DDSA2
DDSdata

Avdd

Dvdd

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15

!WR

30

FSEL

29

1wrNot

35

DDSclock

C17
56p

DDSFsel

2

Dclockin

DCLK

+5

!RESET

!SLEEP

PSEL0
PSEL1
11
12

31
30
28
27
26
24
23
22
21
20
19
18
17
16
15
14

34
33
32

10
8

3
35

4

38

5

43

9

U9

39

ST-48

6

13

CD10
100n

CD9
100n

41

Dvdd

29

R3
500R

R26
220

46

Dvdd

CD3
C

C20
CP

Dvdd

AD9830

36

Dvdd

25

100n

CD7

CD2
C

Avdd

18K

4

5

R7

3

- 2

7
6 Q

+ 1

MAX961
U10

CD1
100n

Dvdd

8

Dvdd

Svdd
CD4
C

48

1

2

47

45

44

7

R25
100R

Dvdd

COMP

REFIN

REFOUT

FS ADJ

Iout

MCLK

CD5
C

Dvdd

1K

R18

C15
100n

C14
100n

R16
100

CD6
C

2 28/10/98

ECR1131
3 20/09/00

CD13
C

CONTRACT No.

ENG. APP.

CHECKED

DRAWN

COPYRIGHT
DO NOT COPY NOR
DISCLOSE TO ANY
THIRD PARTY
WITHOUT WRITTEN
CONSENT

A3

SIZE

CD24
C

CD25
C

R17
1K

Svdd
CD26
C

DRAWING No.

804211

DDC-3330
TITLE
ASI TP SPI CONVERTER

C13
270p

Svdd

IRT Electronics Pty. Ltd.
ARTARMON NSW AUSTRALIA 2064

SCALE

C11
390p

L5
2u7
C9
220p

Avdd

+5

+5

C12
100p

CD21
10uF

Svdd

L4

IND

L8

IND

L7

Svdd

3u3

C10
39p

Avdd

Dvdd

Dvdd

Svdd

SHEET
2 OF 2

CD27
C



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