MFL60021630 55LH95QD

User Manual: 55LH95QD

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Internal Use Only
North/Latin America
Europe/Africa
Asia/Oceania

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LCD TV
SERVICE MANUAL
CHASSIS : LC91E

MODEL : 55LH95QD

55LH95QD-CB

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

TV

AV1

AV2

COM1

COM2

1

RGB

2

3

4 WIRELESS

4

P/NO : MFL60021630 (0909-REV00)

Printed in Korea

CONTENTS

CONTENTS ............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION ................................................................ 9
MEDIA-BOX SETUP GUIDE .................................................................. 14
EXPLODED VIEW .................................................................................. 15
SVC. SHEET ...............................................................................................

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

-2-

LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.

General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away from PCB.

Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.

AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

To Instrument's
exposed
METALLIC PARTS

-3-

0.15uF

Good Earth Ground
such as WATER PIPE,
CONDUIT etc.

1.5 Kohm/10W

LGE Internal Use Only

SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10% (by volume) Acetone and 90% (by
volume) isopropyl alcohol (90%-99% strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500°F to 600°F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500°F to 600°F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500°F to 600°F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.

-4-

LGE Internal Use Only

IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.

Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

-5-

LGE Internal Use Only

SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application Range

3. Test method

This specification sheet is applied to the LCD TV used LC91E
chassis.

1) Performance : LGE TV test method followed.
2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC specification

2. Specification
Each part is tested as below without special appointment
1) Temperature : 25 ± 5°C (77 ± 9ºF), CST : 40 ± 5ºC
2) Relative Humidity : 65 ±10%
3) Power Voltage : Standard input voltage
(100-240V@ 50/60Hz)
* Standard Voltage of each products is marked by models
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.

4. General Specification(TV)
No.

Item

Specification

1.

Receiving System

Analog : Upper Heterodyne

2.

Input Voltage

100- 240V~, 50/60Hz

3.

Market

China

4.

Screen Size

55 inch Wide (1920 x 1080)

5.

Aspect Ratio

16:9

6.

Broadcasting systme

1) PAL-DK

Remark

Digital : COFDM, QAM

FHD

2) PAL-I
3) NTSC-M
4) DTMB
5) DVB-C
7.

LCD Module

LC550WUL-SBT1

8.

Operating Environment

1) Temp : 0 ~ 40 deg

LGD

2) Humidity : ~ 80 %
9.

Storage Environment

1) Temp

: -20 ~ 60 deg

2) Humidity : 0 ~ 85 %

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

-6-

LGE Internal Use Only

5. Chroma & Brightness
No

Item

Min.

Typ.

1

Max Luminance

400

500

2

Luminance uniformity

3

Response Time

Max.

Unit

Remark

cd/m2

(Center 1-point / Full White Pattern)

4

Color coordinate

77

Full white
Picture mode : Cinema

Gray-to-Gray

5

8

ms

MPRT

8

10

ms

RED
GREEN
BLUE
WHITE

5

%

X

0.645

Typ.

Y

0.330

± 0.03

X

0.297

Y

0.629

Color Coordinate Measurement

X

0.146

Mode : PC

Y

0.054

PSM : Standard

X

0.279

CSM : Medium

Y

0.292

Contrast ratio

900:1

1300:1

Local Dimming ON
(Except RGB/HDMI-PC)

6

Color Temperature

4,500,000

5,000,000

0.254

0.269

DCR(Except RGB/HDMI-PC)

Cool

X
Y

0.258

Medium

X

0.270

Y

0.278

0.293

0.308

X

0.298

0.313

0.328

Y

0.314

0.329

0.344

Warm

0.284



0.273

0.288

85% Full white pattern

0.285

0.300

7

Color Distortion, DG

10

%

8

Color Distortion, DP

9

Color S/N, AM/FM

43.0

10

deg
dB

10

Color Killer Sensitivity

-80

dBm

6. Component Video Input (Y, CB/PB, CR/PR)
No.

Specification
Resolution

H-freq(kHz)
15.73

V-freq(Hz)
60.00

Remark

Pixel clock

1.

720x480

SDTV, DVD 480i

2

720x480

15.63

59.94

SDTV, DVD 480i

3

720x480

31.47

59.94

480p

4

720x480

31.50

60.00

480p

5

720x576

15.625

50.00

SDTV, DVD 625 Line

6

720x576

31.25

50.00

HDTV 576p

7

1280x720

45.00

50.00

HDTV 720p

8

1280x720

44.96

59.94

HDTV 720p

9

1280x720

45.00

60.00

HDTV 720p

10.

1920x1080

31.25

50.00

HDTV 1080i

11.

1920x1080

33.75

60.00

HDTV 1080i

12.

1920x1080

33.72

59.94

HDTV 1080i

13.

1920x1080

56.250

50

HDTV 1080p

14.

1920x1080

67.43/67.5

59.94/60

HDTV 1080p

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

-7-

LGE Internal Use Only

7. RGB input (PC)
No.

Specification
Resolution

Proposed

H-freq(kHz)

V-freq(Hz)

Pixel clock(MHz)

Remark

PC
1.

720*400

31.468

70.08

28.321

HDCP

2.

640*480

31.469

59.94

25.17

VESA

HDCP

3

800*600

37.879

60.31

40.00

VESA

HDCP

4.

1024*768

48.363

60.00

65.00

VESA(XGA)

HDCP

5.

1280*768

47.78

59.87

79.5

WXGA

HDCP

6.

1360*768

47.72

59.8

84.75

WXGA

HDCP

7.

1280*1024

63981

60.0

108.875

SXGA

HDCP

8.

1920*1080

67.5

60

148.5

WUXGA

HDCP

8. HDMI input (PC/DTV)
No.

Resolution

H-freq(kHz)

V-freq(Hz)

Pixel clock(MHz)

31.469 / 31.5

59.94 / 60

27.00/27.03

Proposed

Remark

DTV
1.

720*480

2.

720*576

31.25

50

54

SDTV 576P

3.

1280*720

37.500

50

74.25

HDTV 720P

4.

1280*720

44.96 / 45

59.94 / 60

74.17/74.25

HDTV 720P

5.

1920*1080

33.72 / 33.75

59.94 / 60

74.17/74.25

HDTV 1080I

6.

1920*1080

28.125

50.00

74.25

HDTV 1080I

7.

1920*1080

26.97 / 27

23.97 / 24

74.17/74.25

HDTV 1080P

8.

1920*1080

33.716 / 33.75

29.976 / 30.00

74.25

HDTV 1080P

9

1920*1080

56.250

50

148.5

HDTV 1080P

1920*1080

67.43 / 67.5

59.94 / 60

148.35/148.50

HDTV 1080P

10.

SDTV 480P

PC
1.

720*400

31.468

70.08

28.321

2.

640*480

31.469

59.94

25.17

VESA

HDCP

3

800*600

37.879

60.31

40.00

VESA

HDCP

4.

1024*768

48.363

60.00

65.00

VESA(XGA)

HDCP

5.

1280*768

47.78

59.87

79.5

WXGA

HDCP

6.

1360*768

47.72

59.8

84.75

WXGA

HDCP

7.

1280*1024

63.981

60.0

108.875

SXGA

HDCP

8.

1920*1080

67.5

60

148.5

WUXGA

HDCP

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

-8-

HDCP

LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Object

3. Adjustment items

This specification sheet applied to LC91E Chassis applied
LCD TV all models manufactured in TV factory.

- Check the TOOL OPTION prior to adjustment. If the TOOL
OPTION is incorrect, correct it then execute the power off/on
to apply the modification (refer to 7.3 TOOL OPTION)
- In case of this chassis,
Set the Media-box option in connection with Wireless or
Wire.
Set the TV option in HDMI5 mode.(remove the wired HDMI
cable)

2. Notes
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test equipment.
(2) Adjustments must be done in the correct order.
(3) The adjustments must be performed in the circumstance of
25±5°C of temperature and 65±10% of relative humidity if
there is no specific designation.
(4) The input voltage of the receiver be must kept 100V-240V,
50/60Hz when adjusting.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15ºC.
In case of keeping module is in the circumstance of 0°C, it
should be placed in the circumstance of above 15°C for 2
hours
In case of keeping module is in the circumstance of below
-20°C, it should be placed in the circumstance of above
15°C for 3 hours,.
(6) The TV and the Media-box must be connected by Wireless
or Wire. : Even if there is only the TV set, it is possible to
adjust the White-balance

3.1 Board-level adjustment
- ADC adjustment (Media-Box ONLY)
- EDID/DDC download
* Manual ADC Confirmation : [IN-START] -> [1.Adjust Check]
- After Board level adjustment, set volume setting value 0

3.2 Final assembly adjustment
- White Balance adjustment
- RS-232C functionality check
- EYE-Q TEST
- Wireless Pairing (it is worked in the Wired status)
- Shipment mode setting (In-Stop)

4. Board-level adjustment
4.1. ADC(LGE3369) adjustment

- Entry process of White Pattern
1) Press the POWER ON key on R/C for adjustment.
2) Press the ADJ key on R/C and enter EZ ADJUST.
3) Select ‘7. Test Pattern’ by using CH +/- key and select
“White” by using VOL +/-.
* Set is activated HEAT RUN without signal generator in this
mode.
* Single color pattern (RED/BLUE/GREEN) of HEAT RUN
mode uses to check panel.
Caution : If the still image is displayed more than 20
minutes(Especially digital, cross hatch pattern), an afterimage in the black level area.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

-9-

(1) Overview
ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate
RGB deviation.
(2) Equipment & Condition
1) Jig (RS-232C protocol)
2) External/Internal PATTERN
- Adjustment : ADC Comp Comp 480i
-> Using a Pattern Generator(MSPG-925FA - Model:
209 ,Pattern:65 or etc), enter component signals
like below image into the Media-box.
- Adjustment : ADC Comp 1080p / RGB
-> use the Internal Pattern
* External input Image

LGE Internal Use Only

(3) Adjustment
1) Method
- Using RS-232, adjust items listed in 3.1 in the other
shown in “4.1.3.3”
2) Adj. protocol

10

Protocol

20

Enter adj. mode

Command
aa 00 00

Set ACK
a 00 OK00x

Source change

xb 00 40

b 00 OK40x (Adjust 480i Comp1 )

xb 00 60

b 00 OK60x (Adjust 1024*768 RGB)

Begin adj.

ad 00 10

Return adj. result

Confirm adj.

0

1

2

3

4

5

6

7

8

9

00

FF

FF

FF

FF

FF

FF

00

1E

6D

01

03

68

73

41

78

0A

CF

74

A3

57

4C

B0

23

09

48

4C

A1

08

00

81

80

61

40

45

40

31

40

01

01

30

01

01

01

01

01

01

02

3A

80

18

71

38

2D

40

58

2C

40

45

00

7E

8A

42

00

00

1E

01

1D

00

72

51

D0

1E

20

50

6E

28

55

00

7E

8A

42

00

00

1E

00

00

00

FD

00

3A

60

3E

1E

53

10

00

0A

20

20

20

20

20

20

FF

FF

FF

FF

FF

00

ⓒ

80

OKx (Case of Success)

A

B

C

D

ⓐ

E

FF

FF

FF

FF

FF

FF

FF

F

ⓑ

ⓓ

ⓓ

70

NGx (Case of Fail)
Read adj. data

(4) EDID DATA
1) RGB EDID data

FF

FF

00

ⓔ

FF

FF

90

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

A0

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

(main)

(main)

B0

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

ad 00 20

000000000000000000000000007c007b006dx

C0

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

(sub)

(Sub)

D0

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

ad 00 21

000000070000000000000000007c00830077x

E0

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

F0

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

FF

A

B

C

D

E

F

ad 00 99

NG 03 00x (Fail)
NG 03 01x (Fail)

2) HDMI EDID data

NG 03 02x (Fail)
OK 03 03x (Success)
End adj.

aa 00 90

00

a 00 OK90x

[Enter ADC adj. mode]
[Change input source to Component1(480i)]
[Adjust 480i Comp1]
[Change input source to RGB(1024*768)]
[Adjust 1024*768 RGB]
End adj.

2

3

4

5

6

7

8

9

FF

FF

FF

FF

FF

00

1E

6D

01

03

80

73

41

78

0A

CF

74

A3

57

4C

B0

23

4C

A1

08

00

81

80

61

40

45

40

31

40

01

01
2C

ⓒ

(2) Equipment
- Adjust remote control
- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
(3)Download method
1) Press Adj. key on the Adj. R/C, then select “8.EDID
D/L”, By pressing Enter key, enter EDID D/L menu.
2) Select [Start] button by pressing Enter key, HDMI1 /
HDMI2 / HDMI3 / HDMI4 / RGB are Writing and display
OK or NG.
* For HDMI5 EDID D/L, Change the TV input mode into
HDMI5 mode then using Adj. R/C, download the HDMI5
EDID.
* HDMI5 / RGB can be downloaded by JIG and cable.

- 10 -

ⓑ

09

48

30

01

01

01

01

01

01

02

3A

80

18

71

38

2D

40

58

40

45

00

7E

8A

42

00

00

1E

01

1D

00

72

51

D0

1E

20

50

6E

28

55

00

7E

8A

42

00

00

1E

00

00

00

FD

00

3A

60

3E

1E

53

10

00

0A

20

20

20

20

20

20

84

13

05

14

03

02

ⓓ

ⓓ

80

02

90

22

03
15
ⓕ

A0

(1) Overview
It is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any
necessity of user input. It is a realization of “Plug and Play”.

ⓐ

20

70

4.2. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

1
FF

10

Ref.) ADC Adj. RS232C Protocol_Ver1.0
3) Adj. order
- aa 00 00
- xb 00 40
- ad 00 10
- xb 00 60
- ad 00 10
- ad 00 90

0
00

26

F1

4E

10

1F

12

01

ⓔ

20

21

ⓕ

01

26

15

07

50

09

57

07

E3

05

03

01

01

1D

80

18

71

1C

16

20

58

2C

B0

25

00

7E

8A

42

00

00

9E

01

1D

00

80

51

D0

0C

20

C0

40

80

35

00

7E

8A

42

00

00

1E

02

3A

80

18

71

38

D0

2D

40

58

2C

45

00

7E

8A

42

00

00

1E

66

21

50

B0

E0

51

00

1B

30

40

70

36

00

7E

8A

42

00

00

1E

00

00

F0

00

00

00

00

00

00

00

00

00

00

00

00

00

00

00

ⓔ

Item

Condition

Data(Hex)

Manufacturer ID

GSM

1E6D

Version

Digital : 1

01

Revision

Digital : 3

03

* Detail EDID Options are below
ⓐ Product ID
Model Name

HEX

EDID Table

DDC Function

FHD Model

0001

01 00

Analog/Digital

ⓑ Serial No: Controlled on production line.
ⓒ Week, Year: Fixed as S/W released day
Week 0x02(2), Year : 0x13(2009)
ⓓ Model Name(Hex):
MODEL

MODEL NAME(HEX)

all

00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20

ⓔ Checksum: Changeable by total EDID data.
RGB 1D
HDMI1 04 F9
HDMI2 04 E9
HDMI3 04 D9
HDMI4 04 C9

LGE Internal Use Only

5.1.4. Adj. Command (Protocol)

ⓕ Vendor Specific(HDMI)

(1) Protocol


INPUT

MODEL NAME(HEX)

HDMI1

67 03 0C 00 10 00 B8 2D

HDMI2

67 03 0C 00 20 00 B8 2D

HDMI3

67 03 0C 00 30 00 B8 2D

HDMI4

67 03 0C 00 40 00 B8 2D

HDMI5

67 03 0C 00 50 00 B8 2D

LEN

CMD

VAL

CS

- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

* Reference
- HDMI1 ~ HDMI4 / RGB: Media-Box, HDMI5: TV
- In the data of EDID, bellows may be different by S/W or
Input mode.
G VV: Week Manufacture
G WW: Year Manufacture
G XX: C/S
G YY: Physical address
(Generally, HDMI1 : 10 00, HDMI2 : 20 00 ¶)

5. Final assembly adjustment

(2) RS-232C Command used during auto-adj.
RS-232C COMMAND
Meaning
[CMD

ID

DATA]

wb

00

00

Begin White Balance adj.

wb

00

10

Gain adj.(internal white pattern)

wb

00

1f

Gain adj. completed

wb

00

20

Offset adj.(internal white pattern)

wb

00

2f

Offset adj. completed

wb

00

ff

End White Balance adj.(Internal pattern disappears)

Ex) wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. completed
*(wb 00 20(Start), wb 00 2f(completed)) -> Off-set adj.
wb 00 ff -> End white balance auto-adj.

5.1. White Balance Adjustment
5.1.1. Overview
• W/B adj. Objective & How-it-works
- Objective: To reduce each Panel’s W/B deviation
- How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.

(3) Adjustment Map

5.1.2. Equipment
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED
Module : CH14)
(2) Adj. Computer(During auto adj., RS-232C protocol is
needed)
(3) Adjust Remote control
(4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model:217, Pattern:78)
-> Only when internal pattern is not available

ITEM

Cool

Command

Data Range

Default

(Hex.)

(Decimal)

Cmd 1

Cmd 2

Min

Max

R-Gain

j

g

00

C0

G-Gain

j

h

00

C0

B-Gain

j

i

00

C0

R-Gain

j

a

00

C0

G-Gain

j

b

00

C0

B-Gain

j

c

00

C0

R-Cut
G-Cut

• Color Analyzer Matrix should be calibrated using CS-1000

B-Cut
Medium

5.1.3. Equipment connection map
Co lo r Analyzer

R-Cut

RS -232C

Probe

G-Cut

Co m p ut er
RS -232C

B-Cut

RS -232C

Warm

Pat t ern Generat o r
Signal Source
* If TV internal pattern is used, not needed

Connection Diagram of Automatic Adjustment

R-Gain

j

d

00

C0

G-Gain

j

e

00

C0

B-Gain

j

f

00

C0

R-Cut
G-Cut

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 11 -

LGE Internal Use Only

• Standard color coordinate and temperature using CA210(CH 9)

5.1.5. Adj. method
(1) Auto adj. method
1) Set TV in adj. mode using POWER ON key./
2) Zero calibrate probe then place it on the center of the
Display.
3) Connect Cable(RS-232C)
4) Select mode in adj. Program and begin adjustment.
5) When adj. is complete (OK Sing), check adj. status pre
mode. (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.

H/R
Time(Min)

* Adjustment must be begun “wb 00 00”, and ended “wb 00
ff”. If it is needed, adjust the Offset value.

(2) Manual adj. method
1) Set TV in Adj. mode using POWER ON key.
2) Press ADJ key ‡ EZ ADJUST using adj. R/C.
3) Using CH +/- key, select [7.Test Pattern] then press
ENTER to place in HEAT RUN mode and wait for 30
minutes.
4) Check a zero calibration for the probe of color analyzer,
then place it on the center of LCD module within 10cm
of the surface.
5) Press ADJ key -> [6.White Balance] then press the
cursor to the right (G) key.
(When G is pressed, Full White internal pattern will be
displayed)
6) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rests will be lowered to meet the desired value.
7) Adj. is performed in COOL, MEDIUM, WARM 3 modes
of color temperature.
* Adj. condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
- LCD : Color Analyzer (CA-210) probe should be within
10cm and perpendicular of the module surface (80°~
100°)
• In case of LCD, Back Light On should be checked
using no signal or Full white pattern.

x

Temp

∆UV

Warm

X

Y

X

Y

269

273

285

293

313

329
346

1

0-4

279

294

295

312

321

2

5-9

277

289

293

309

319

343

3

10-14

275

285

291

306

318

340

4

15-19

273

282

289

303

317

337

5

20-24

272

279

288

300

316

335

6

25-29

271

277

287

297

315

333

7

30-39

270

275

286

295

314

331

8

40-

269

273

285

293

313

329

Step 1) Turn on TV
Step 2) Press EYE key of Adj. R/C
Step 3) Cover the Eye Q II sensor on the front of the using
your hand and wait for 6 seconds
Step 4) Confirm that R/G/B value is lower than 10 of the “Raw
Data (Sensor data, Back light)”. If after 6 seconds,
R/G/B value is not lower than 10, replace Eye Q II
sensor.
Step 5) Remove your hand from the Eye Q II sensor and wait
for 6 seconds.
Step 6) Confirm that “ok” pop up. If change is not seen,
replace Eye Q II sensor.

5.3. Wireless Pairing
(1) Overview
For the wireless connection between TV and Media-Box,
Select the communication channel and fix the Mac
address.
* The adjustment should be executed with being Wired.
(HDMI cable connection)
(2) Method
1) Press IN-START key on adj. R/C then select [9.Wireless
Check].
2) After Choosing the LRP Channel, Set OK in Paired
Status.
3) Remove the HDMI cable and turn off/on TV and Mediabox.
4) Check the Wireless status.

• Luminance: 216 Gray
• Standard color coordinate and temperature using CS-1000
Color Coordination

Medium
Y

5.2. EYE-Q function check

5.1.6. Reference (White Balance Adj. coordinate and
color temperature)

Mode

Cool
X

y

COOL

0.269

0.273

13000K

0.0000

MEDIUM

0.285

0.293

9300K

0.0000

WARM

0.313

0.329

6500K

0.0000

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

5.4. Shipment mode check(In-stop)
After final inspection, press IN-STOP key of the Adj. R/C and
check that the unit goes to Stand-by mode.

- 12 -

LGE Internal Use Only

7.2. TOOL OPTION

6. GND and Internal Pressure check

(1) Overview
- The model name and spec. will be confirmed and
modified by adj. menu.
- No Modification at discretion

6.1. Inspection Mmthod
1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)
2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.

(2) Confirm/Modify method
1) By Pressing ADJ key, [EZ ADJUST] -> [0.Tool Option1].
2) In the Tool Option1, It is possible to modify the Inch/
Tool/ Module maker/ Module revision.
3) Contents of Tool Option 1~4 are like the section 7.2.(3)
* Entering into IN-START mode, [1.Adjust Check] shows
Tool Options.

(3) Contents of Tool Option
1) Tool Option1
- Inch
- Tool
- Maker
- Module Rev.

6.2. Checkpoint

2) Tool Option2
- HDMI Count
- HDMI Switch IC
- Component Count
- S-Video
- RCA AV Count
- Scart Count

• TEST voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
• TEST time: 1 second
• TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL
• LEAKAGE CURRENT: At 0.5mArms

3) Tool Option3
- EMF(JPEG,MP3)
- Divx
- Bluetooth
- Digital Eye.
- Headphone
- OPC
- EPA
- e-Manual
- Audio Amp
- LED Type
- New E-Con

7. ETC.
7.1. USB S/W Download (option)
(1) Overview
USB download allows fast S/W upgrade in SVC areas or
during Board-level production.
(2) Dowunload method
1) After Set on, confirm that image is displayed. (For
updating Monitor, first input change to HDMI5)
2) Insert USB memory stick that contains the S/W and after
a few seconds, Upgrade OSD is displayed.
(If the version of download file in USB is lower than the
current version, Upgrade OSD is not displayed)
3) After download is finished, automatically Power off/on is
executed.
(If auto power on/off is not executed, perform the power
off/on manually)
4) S/W upgrade is completed and eject USB Memory Stick
form USB jack.
5) By pressing IN-START key on the adj. R/C, check the
S/W version.

4) Tool Option4
- Clear QAM
- Local Dimming
- THX
- Digital Demod
- Analog Demod
- THX Media Director

7.3. Tool Option Setting
MODEL

Display

Tool opt1

Tool opt2

Tool opt3

Tool opt4

55LH95QD-CB

TV

45955

4184

38

51840

Media-Box

45955

4440

51366

51872

Tool Option4 should be set to TV ‘51840’, Media-Box ‘51872’ as
a manufacturing default.
By ‘IN-STOP’ to make shipping condition, it will be set to TV
‘19072’, Media-Box ‘19104’ automatically.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 13 -

LGE Internal Use Only

MEDIA-BOX SETUP GUIDE
1. When setting up Media-Box at the cabinet and on th surface, etc
Surface Distance

(1) If the surface distance becomes more than 20cm at [fig. 1],
wireless connection difficulty could be happened.
(2) Set up Media-Box making the surface distance as less than
20cm as possible.

(3) If the surface distance becomes more than 20cm unavoidably at
[fig. 2], a noise could be generated on the screen due to the drop
of wireless connection sensitivity.
(4) Improve wireless connection sensitivity by raising a wireless
emission angle using rubber (providing accessory).

More than 20cm

2. When setting up Media-Box and TV, facing each other
If the surface distance on which Media-Box is placed becomes more than
20cm, wireless connection sensitivity could be dropped, and it is
recommended to use rubber.

[Fig. 3] Attach rubber to the lower part of Media-Box.

3. In case setting up by using a reflection
The whole reflected distance shouldn’t be over 10m, and if
using a rubber according to the condition how Media-Box is
placed, wireless connection sensitivity improves. (a+b
distance should be smaller than 10m.)

a

b
Sofa

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 14 -

LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

300

LV1

200

LV2

800

400

801

531

802

530

200N
540

541

532

121

542

510
803
590
804
120

500

550

310

511

543

A10

501
700

A2

A22

900
710
790
770
720

740

730
780
750

760

Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 15 -

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

A

B

C

F

E

D

ANALOG IN/OUT

H

G

D5.0V_VGA

In case of 2Vrms INPUT, Voltage divider for Mstar(3.3Vp-p ADC) * PC sound input & AV audio input voltage divider value is different so we need cordinate it in next model

AV1_AUDIO_L

001:B3

1

R1211

10K

AV1_L_IN
R1210
12K

JACK TO MAIN WAFER

C
A2

009:D3

C1251
1000pF
50V

R1249
4.7K

IC1200
AT24C02BN-10SU-1.8

P1200
10022HS-31A02

A0

AV1_AUDIO_R

001:B3
COMP1_Y

1
2

COMP2_Y

3

COMP1_PB

4

COMP2_PB

5

COMP1_PR
COMP2_PR

6

10K

AV1_R_IN
R1207
12K

8

1

A1

7

2

009:D3

GND

3

6

4

5

AV2_AUDIO_L

001:B3

009:B3

R1259

10K
R1264
12K

D3.3V_2

009:B4

AV2_L_IN

1K

COMP1_DET

AV2_AUDIO_R

001:B3

13

COMP1_AUDIO_R

14

COMP2_AUDIO_R

R1258

10K

C1222
18pF
50V

R1257
22

R1283

AV1_C_IN

19

AV1_CVBS_IN

20

AV2_CVBS_IN

D1222
ADMC5M03200L

D1216
ADUC30S03010L

COMP1_AUDIO_L

R1252

COMP1_L_IN

10K

R1256
12K

009:B4

C1231
68pF

009:D3

C1225
1000pF
50V

R1234
C1232 75
68pF

C1216
OPT

R1235
75

C1217
OPT

D1217
ADUC30S03010L

D5.0V_VGA

1K

AV1_CVBS_DET

COMP1_AUDIO_R

001:B2

R1251

10K

COMP1_R_IN
R1255
12K

R1056
4.7K
R1060
D3.3V_2

1K

AV1_SVIDEO_DET

DSUB_G

009:B3

001:B3;009:I4

D3.3V_2
001:C3;009:B4

009:D3

D1218
ADUC30S03010L

C1221
1000pF
50V

R1270
10K
R1271

DSUB_DET
D1225
ADMC5M03200L
OPT

R1248
4.7K

10K

COMP2_L_IN
R1294
12K

009:D3

DSUB_R

009:B3

C1237
1000pF
50V

R1236
75

D1219
ADUC30S03010L

C1218
OPT

R1268

001:D1

0
OPT

001:D1
001:D1
COMP2_R_IN

009:D3

1

001:B2;009:B4

15

16

14
10

6
AV1_Y_IN

C1229
47pF
50V

5

001:B2;009:B4

C1227
47pF
50V

13

C1238
1000pF
50V

9

10K

4

AV2_CVBS_IN

R1291

R1293
12K

001:B2;009:B4

12

AV1_CVBS_IN
C1252
47pF
50V

8

COMP2_AUDIO_R

001:B2

001:D2

31

3

AV2_AUDIO_R

R1292

001:B3;009:I4

11

30

AV2_CVBS_DET

7

29

AV1_AUDIO_R

1K

2

3

AV2_AUDIO_L

COMP2_AUDIO_L

001:B2
R1254

26

1K

009:F5

24
25

C1226
0.1uF
16V

D5.0V_1
R1212

001:C3;009:B4

23

28

012:F3

D1224
ADMC5M03200L
OPT

OPT

R1204
4.7K

22

27

012:F3

RGB_DDC_SDA

009:B4

21

AV1_AUDIO_L

RGB_DDC_SCL

DSUB_B

001:B2;009:I4

D3.3V_2

18

0

R1233 68

DSUB_HSYNC

009:B3

COMP2_DET

1K

001:B2

AV1_Y_IN

0

R1239

R1232 68

DSUB_VSYNC

009:B3

001:D2

16

R1238

R1265
22

009:A6;009:F4

009:B3

15

17

009:D3

C1243
1000pF
50V

R1277
4.7K

001:D3

C1223
18pF
50V

C1224
1000pF
50V

AV2_R_IN
R1263
12K

D3.3V_2

001:D3

009:I5
009:A6;009:F4

ISP_TXD

001:B2;009:I4

10
001:D2

VGA_EEPROM_WP
ISP_RXD
SDA

D1207
ADUC30S03010L

R1240

COMP2_AUDIO_L

100

SCL

009:D3

R1237
4.7K

COMP1_AUDIO_L

R1269

WP

2mA
A2

C1250
1000pF
50V

Lowpass filter Fc=29Khz

009:B4

9

12

C1228
0.1uF
16V

VCC

009:B3

8

11

R1262
10K

R1253
4.7K

009:B4

7

2

R1205

009:B3

P5.0V_ST

D1223
ENKMC2838-T112
A1

RGB PC

JK1201
KCN-DS-3-0054

AV1_C_IN

001:B2;009:B4

C1230
47pF
50V

PC AUDIO
D3.3V_L

4

RS-232 Serial Port

JK1205
KJA-PH-1-0107
In case of 2Vrms INPUT, Voltage divider for Mstar(3.3Vp-p ADC)

GND_CONTACT

C1+

V+

C2+

5

0.1uF
16V

VCC

R1116

0

SYS_UART_TXD

J1100
KJA-PH-1-0107

014:F5
GND_CONTACT

GND

3

14

4

13

DOUT1

RIN1

OPT
R1113

100
OPT

R1114

V-

DOUT2

RIN2

5

12

100

6

11

7

10

8

9

ROUT1

DIN1

DIN2

50V
220pF
C1114

1

R_CONTACT

4

T_CONTACT

R1305

014:C5;014:F5

1mA
C2-

C1108

15

SYS_UART_RXD

50V
220pF
C1115

OPT

0.1uF
16V

16

2

0

5
C1-

C1107

1

R1115

ADUC30S03010L
D1102

0.1uF
16V

5

C1112
0.1uF
16V

OPT

0.1uF
16V

C1106

BLM18PG121SN1D

ADUC30S03010L
D1101

C1105

IC1103
MAX3232CDR

4.7K
R1117

C1129
0.33uF
16V

4.7K
R1120

L1103

TXD

R1133
220

R_CONTACT

1

RXD

R1134
220

T_CONTACT

4

C1130
47pF
50V

C1131
47pF
50V

D1234
ADMC5M03200L
OPT

R1297
470K

D1235
ADMC5M03200L
OPT

R1298
470K

R1300
15K

R1303
10K

0

PC_R_IN
009:D3

C1240
100pF
50V

SWITCH_A
A

B

C

D

E

R1307

SWITCH_B
SWITCH_C
SWITCH_D
SWITCH_F

F

SWITCH_E

R1301
15K

0
PC_L_IN
009:D3

R1304
10K

C1241
100pF
50V

6

Lowpass filter Fc=22Khz

SHIELD

SWITCH_A
SWITCH_B
SWITCH_C
SWITCH_D
SWITCH_F
SWITCH_E

B

A

D

C

F

E

6
ROUT2
SHIELD

SPDIF OPTIC JACK
D3.3V_2

D5.0V_1

D3.3V_2

B

GND

1

5

R1384
0

VCC

C1255
0.1uF
50V

2

3

4

Y

R1385
0
OPT

R638
1K
OPT

R1383
22
1/10W
1%
OPT

D610

C1254
100pF
50V

GND

VCC

VIN

JST1224
JK1206

A

1

R1381
4.7K
SPDIF_OUT
017:A2;009:E3

Fiber Optic

R1132
100

2

IC1203
NL17SZ00DFT2G

3

NAND GATE FOR INVERTING

R1131
100

C660
0.1uF
50V

R1382
0
OPT

6
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

JUNO-BOX
IN/OUT

09.02.16
01

17

LGE Internal Use Only

A

B

C

D

F

E

G

H

* HDMI CEC
The Value is nedd to be adjustable for External Load in case of HDMI regualtion test
D3.3V_2

D3.3V_2

D2+_HDMI3
002:G6

1

GND

HDMI_PORT3

1

JK500
KJA-ET-0-0032

GND

FRONT_HDMI_PORT1

HDMI INPUT

D3.3V_2

0

0 OPT

R539

R540

OPT

CEC_REMOTE
002:B1;002:B5;002:D1;002:E1;002:H5
CK-_HDMI2
002:H4

C509
0.1uF
16V

4
HPD1

9
D0_GND
R596

0

R597

0

D1+

R598

0

D2-

R599

0

R526

0

D0+
D16
D1_GND
5
4
3
D2_GND
2
D2+

JK503
YKF45-7059V

GND

RXD_5V

RXD_HPD
76

77

RXD_DDC_CLK

RXD_DDC_DAT
78

79

RXD_DC+

VDDH[3V3]_7

RXD_D0-

RXD_DC80

81

82

83

RXD_D0+

RXD_D1-

RXD_D1+

VDDH[3V3]_8

VSS_10

84

85

86

87

88

RXD_D2+

VDDC[1V8]_3

VSS_11

RXD_D289

OUT_D2+

RXC_C+

62

RXC_C-

15

61

RXC_DDC_CLK

RXA_D0-

16

60

RXC_DDCC_DAT

RXA_D0+

17

59

RXC_5V

58

RXC_HPD

57

CEC

RXA_D1+

20

56

VSS_7

VDDH[3V3]_2

21

55

VDDS[3V3]

RXA_D2-

22

54

CDEC_STBY
INT/HP_CTRL

52

XTAL_OUT

25

51

XTAL_IN

50
SCL/SEL0

SDA/SEL1

PD

0 MODE
R548

VSS_6

CDEC_DDC

VDDC[3V3]

CEC_REMOTE
002:B1;002:B3;002:D1;002:E1;002:H5
CK-_HDMI4
002:G3

R555

D1.8V_HDMI

CEC_REMOTE

Net Labels changed for HDMI2
R560
C521 0.1uF

53

24
49

23

NC

48

RXA_D2+

47

0

C507
0.1uF

HPD2

R557
0

VDDH[1V8]_1

46

R543

19

45

D1+_HDMI1

18

3.3V: 59mA

DDC_SCL_2
DDC_SDA_2

VSS_3

44

D1-_HDMI1

1.8V: 346mA

CK+_HDMI2
CK-_HDMI2

RXA_D1-

43

D0+_HDMI1

42

D0-_HDMI1

NEW

For Only TDA9996 ES3

0
OPT

0

Mode 47Pin Low(I2C-bus mode)
0

OPT
CK+_HDMI4
002:G3
D0-_HDMI4
002:G3

C506
0.1uF
16V

D0+_HDMI4
002:G3
D1-_HDMI4
002:G3

C508
0.1uF
16V

C510
0.1uF
16V

5V_HDMI_3

C512
0.1uF
16V

C519
0.1uF
16V

C520
0.1uF
16V

D3.3V_HDMI
R552 4.7K
OPT

D1+_HDMI4
002:G3
D2-_HDMI4
002:G3

R553
R549

D2+_HDMI4
002:G3

1

63

14

0

0

7

13

RXA_C+

R550

0

R595

8

RXA_CVDDH[3V3]_1

R551

R593

D0-

VDDH[3V3]_5

12

D1+_HDMI2
D1-_HDMI2

D0+_HDMI2
D0-_HDMI2

HDMI_PORT4

6

VARISTORS(VR500/501/502/503/504/505/506/507) on lines-HPD1/2/3/4 are all options
in case HDMI Switch doesn’t support ’ESD protection’

OPT
R554

Net Labels changed for HDMI3

HDMI 3
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

OPT

TDA9996_SCL

CK+
10

64

RXA_DDC_CLK

TDA9996_SDA

11

RXC_D0-

VDDC[1V8]_2

0

RXC_D0+

65

RXB_D2+

0

R594

CK_GND

VSS_8

66

11

D2-_HDMI3
D2+_HDMI3

R525

CK12

67

TDA9996HL

10

RXB_D2-

CE_REMOTE
13

9

RXA_5V

RXB_D1+

5

RXA_HPD

IC502

RXC_D1-

CK-_HDMI1

P5.0V_ST

DDC_SDA_4
JP507 002:D4;002:G3
DDC_SCL_4
002:D4;002:G3

RXC_D1+

68

RXB_D1-

0

NC

VDDH[3V3]_6

69

8

D1-_HDMI3

R523

15
14

JP506

70

7

CK+_HDMI1

D2-_HDMI1
D2+_HDMI1

0

D2+_HDMI2
D2-_HDMI2

6

VSS_2

RXA_DDC_DAT

C523
0.1uF
16V

12K

VDDC[1V8]_1

D1+_HDMI3

DDC_CLK

C505
0.1uF
16V OPT
R524

OUT_DDC_DAT

HPD3

16

R521
1K
OPT

HPD4
002:G3

RXC_D2-

26

DDC_DATA

OPT
VR506

GND

R518 3.6K

5V

17

R1507
47K OPT

DDC_SCL_1

RXC_D2+

71

VSS_4

R1506
1K

19
18

AVRL161A1R1NT
OPT

OPT

HP_DET

R519 0
OPT

20

VR507

GND

AVRL161A1R1NT

5V_HDMI_4

HDMI 1

DDC_SDA_1

IF HDMI 15M TEST FAIL, CHANGE 47K PULL UP RESISTOR VALUE TO 4.7K
D3.3V_2

VSS_9

72

5

41

EDID Pull-up

73

4

VDDH[3V3]_4

HDMI_PORT2

GND

74

3

OUT_C+

D0+_HDMI3

JK501
YKF45-7059V

2

OUT_CVDDO[3V3]
OUT_DDC_CLK

40

DDC_SCL_4

5V_HDMI_2

75

39

DDC_SDA_4

DDC_SCL_3

C529
0.1uF
16V

HDMI 2

5V_HDMI_1

47K

DDC_SDA_3

1

C524
0.1uF
16V

C522
0.1uF
16V

VDDH[1V8]_2
R556
R12K

VSS_1

38

47K

R561

37

R559
47K

VSS_5

D2+_HDMI2
002:H4

R538

90

0

D2_GND
D2+

1

R537
47K

91

R576

D1+_HDMI2
002:H4
D2-_HDMI2
002:H4

92

0

93

0

R575

36

R574

D2-

R558

35

D1+

R536

34

D0+_HDMI2
002:H4
D1-_HDMI2
002:H4

D1_GND

5V_HDMI_3

33

R573 0

D0-_HDMI2
002:H4

D0_GND

RXB_C+

D1-

D1.8V_HDMI

5V_HDMI_4

RXB_D0+

0

0.1uF

CK+_HDMI2
002:H4

RXB_D0-

R572

0.1uF

C528

C518
0.1uF
16V

VDDH[3V3]_3

D0+

DDC_SCL_2

OUT_D2-

0

DDC_SCL_1

VDDO[1V8]

0

R571

C527

2K

OUT_D1+

R570

D0-

0.1uF

5V_HDMI_4
R541
DDC_SDA_2

OUT_D1-

CK+

0.1uF

C526

47K

D0-_HDMI3

2

0

R547

DDC_SDA_1

CK+_HDMI3

3

R569

CK_GND

R546
47K

47K

94

4

CK-

R535

R534
47K

95

5

0

96

6

0

R508

97

7

R507

CE_REMOTE

NC

C525

R542 2K

32

8

DDC_SDA_2
002:D3;002:H4
DDC_SCL_2
002:D3;002:H4

JP505

31

9

0

30

10

R506

29

11

R545

JP504

RXB_C-

12

R533

HDMI 4

P5.0V_ST

D3.3V_HDMI

RXB_5V

13

DDC_CLK

5V_HDMI_2

5V_HDMI_1

RXB_DDC_CLK

14

HPD2
002:H5

RXB_DDC_DAT

15

DDC_DATA

C502
0.1uF
16V OPT

R1503
47K
OPT

OUT_D0-

16

GND

OPT
VR501

3

R1501
1K

5V
R502 3.6K

17

AVRL161A1R1NT
OPT

18

R517 1K

OPT

HP_DET
19

VR504

20

AVRL161A1R1NT
OPT

R514
0

R529

D3.3V_HDMI

R544
0

D2+_HDMI1
002:F5

5V_HDMI_2

GND
BODY_SHIELD

9.1K

MMBD301LT1G
D500

OPT

VR505

R515 1K

AVRL161A1R1NT
OPT

OPT
VR502

R500 3.6K

0

D2+

HDMI_SDA

JK502
YKF45-7059V

R584

D1+_HDMI1
002:F5
D2-_HDMI1
002:F5

HPD4

0

0

DDC_SCL_3
CK-_HDMI3

R589

R583

D2_GND

DDC_SDA_3

D2+

D2-

D0+_HDMI1
002:F4
D1-_HDMI1
002:F5

DDC_SDA_4

2

0

D1_GND

CK+_HDMI4

3

0

R582

GND

CK-_HDMI4

4

R578

D1+

R527

OPT

DDC_SCL_4

D1+_HDMI3
002:G6
D2-_HDMI3
002:G6

D2_GND

D1-

0

D0+_HDMI4
D0-_HDMI4

0

5

GND

D1+_HDMI4
D1-_HDMI4

R588

6

C503
0.1uF
16V

C517 0.1uF

D2-

7

DRAIN2

D2-_HDMI4

0

0

C504
0.1uF

GATE1

D2+_HDMI4

0

R592

D1_GND

0

R581

D0_GND

3

C515 0.1uF

D0+_HDMI3
002:G6
D1-_HDMI3
002:G6

R587

D1+

R580

D0+

D0-

CK+_HDMI1
002:F4
D0-_HDMI1
002:F4

2

4

C516 0.1uF

8

0

5

C514 0.1uF

9

R579

SOURCE2

C530
0.1uF

VSS_12

D1-

D0-_HDMI3
002:G6

CK_GND
CK+

GATE2

CEC_REMOTE
002:B1;002:B3;002:B5;002:E1;002:H5
CK-_HDMI1
002:F4

0

L501
BLM18PG121SN1D

HDMI_CEC_RX
012:C3;009:B3

98

0

R577

SOURCE1

28

0

R586

10

CK-

1

RXB_HPD

R591

D0+

D0_GND

CK+_HDMI3
002:G6

0

0

6

C513 0.1uF

D0-

0

R505

DRAIN1

R520

HDMI_RX2+

R585

AVRL161A1R1NT
OPT

OPT

OPT

11

CK+

CE_REMOTE

0

HDMI_RX2-

12

R504

NC

CEC_REMOTE
002:B1;002:B3;002:B5;002:D1;002:H5

OUT_D0+

2

CK_GND

13

DDC_SDA_1
002:C3;002:E4
DDC_SCL_1
002:C3;002:E4

JP501

99

3

CEC_REMOTE
002:B3;002:B5;002:D1;002:E1;002:H5
CK-_HDMI3
002:G6

0

100

4

2

0

DDC_CLK

JP500
R503

27

5

R590

14

DDC_DATA

D3.3V_HDMI

D3.3V_2

L500
CB3216PA501E

TEST

6

CK-

15

GND

C511 0.1uF

7

0

16

D1.8V_HDMI

D1.8V_1

IC501
SSM6N15FU

HDMI_RX1-

8

0

R509

NC

17

C500
0.1uF
16V OPT

HDMI_RX1+

9

R511

CE_REMOTE

DDC_SDA_3
JP503 002:C4;002:G6
DDC_SCL_3
002:C4;002:G6

R1504
1K

HDMI_RX0+

10

JP502

0

5V

R528

HDMI_RX0-

11

18

R510

OPT

HP_DET
19

68K

HDMI_CLK-

12

DDC_CLK

OPT

20

002:F4
HPD1

HDMI_CLK+

13

DDC_DATA

R512
0

GND
HPD3
002:F6

R1505
47K
OPT

HDMI_SCL

14

GND

C501
0.1uF
16V OPT

D3.3V_2

R1500
47K
OPT

AVRL161A1R1NT
VR508

15

R501 3.6K

16

R522
1K

5V
OPT
VR500

18
17

AVRL161A1R1NT
OPT

HP_DET
19

R513 0
R516 1K

20

VR503
AVRL161A1R1NT

BODY_SHIELD

1

Protect reverse current from external device to TV set When Set Power off

5V_HDMI_1

5V_HDMI_3

HDMI S/W 4:1

JUNO-BOX
HDMI SW

02

17

LGE Internal Use Only

A

C

B

D

F

E

G

H

POWER SUPPLY
POWER CONNECTOR

1

+5.0V_ST 2A
P3.3V P6.0V

P5.0V_ST

+6.0V 2.9A
+3.3V 1.5A
P700
SMW250-16P

C702
100uF
16V
+6.0V
+6.0V

C701
0.1uF
16V

GND
C703
100uF
16V

+3.3V

2
4
6

R700
1K

1

PWR_CTRL

3

+6.0V

5

GND

7

+3.3V

+5.0V_ST

10

9

GND

+5.0V_ST

12

11

GND

14

13

GND

15

GND

GND

8

16

+5.0V For USB & Etc

OPT

C700
0.1uF
16V

PWR_CTRL

OPT

+1.8V For HDMI TX

Stand-by +3.3V

012:F3

C706
10uF
16V
IC700

P6.0V

D3.3V_2

D5.0V_1

D1.8V_1

BA50BC0WFP-E2

+5.0V_ST

P5.0V_ST

IC703
AP1117E18G-13

C707
0.1uF
16V

C709
100uF
16V

VCC

2

IN

OUT

4

NEW

3

1

Replaced Part

5

3

AP1117E33G-13

L724

2
1

D3.3V_L

IC702

ADJ/GND
CB3216PA501E

OUT

IN

NEW

3

1

ADJ/GND

R772

4.7K

2
C716
0.1uF
16V

C711
100uF
16V

R701
1K

CTL

GND

C719
0.1uF
16V

C718
100uF
16V

NC

C704
10uF
10V

2

C723
47uF
16V

C724
0.1uF
16V

C725
47uF
16V

C705
0.1uF
16V

C708
10uF
6.3V

OUT

C710
0.1uF
16V

D704
SML-512UW
PV

C726
0.1uF
16V

+3.3V

+1.26 Core for Saturn6

012:F3

P6.0V

D3.3V_EN
R756 100

465 mA @85% efficiency
L716
CB3216PA501E
R733
Vout=0.8*(1+R1/R2)

MAX 3A

R738
10K

Replaced Part

R770
56K
1%

10K
R1
OPT

C790
0.1uF
16V OPT

Close to IC
R736
22K

Vout=0.8*(1+R1/R2)

FB

1%
Close to IC
R1

IC705
MP2212DN

R723
22K
1%

R2

1600 mA

1

8

GND

2

7

$0.24

C786
22uF

C787
22uF
OPT

BS

3

6

4

5

SW_1

VCC

100V
1N4148W_DIODES

C IN

R742
R724

L704
CB3216UA121

P3.3V

D3.3V_2

D700

C732
22uF
16V

C OUT
C792
22uF
16V

C793
0.1uF

2

7

C733
22uF
OPT

OPT

BS

3

6

4

5

OPT

GND

C780
0.1uF
16V

L710
3.6uH

SW_2

SW_1

C741
0.1uF
50V

VCC

100V
1N4148W_DIODES

C751
10uF
6.3V

C750
22uF
16V

C746
0.1uF

R737
Placed on SMD-TOP

10

R734

C737
1uF
10V

10
1/10W
1%

Placed on SMD-TOP

GND

GND

GND

10

GND

10
1%

4

IN

L717
BLM18PG121SN1D

C791
22uF
16V

C789
0.1uF
50V

L727
BLM18PG121SN1D

EN/SYNC

95% Efficiency
GND

3A, DCR=0.025 ohm
L726
3.6uH

SW_2

NR8040T3R6N
IN

D703 OPT

8

NEW

NR8040T3R6N

EN/SYNC

NEW

Placed on SMD-TOP

R769
18K
1%

R2

1

$0.07
4.9A 0.0150OHM 34MHZ
FB

R722
75K
1%

IC704
MP2212DN

Close to IC

D1.26V_VDDC
R731

10K

R771
3.9K

3

D3.3V_1

OPT

D3.3V_1

L711
CB3216PA501E

BLM18PG121SN1D
L720

P6.0V

GND

If there is problem about DCDC BS, then change to R742 0ohm

If there is problem about DCDC BS, then change to R742 0ohm
C788
1uF
16V

L705
CB3216UA121
R706
C729
10pF
50V

D3.3V_1

C731
0.01uF
50V

C730
0.1uF
16V

C734
4.7uF
6.3V

1K

C735
47uF
16V

D701
SML-201MT

D3.3V_AVDD_MPLL

+1.8V for Saturn6 DDR

Switch for +5.0V (WIRELESS)

L703
BLM18PG121SN1D
P5.0V_ST
C717
0.1uF
16V

D5.0V_W

L701
CB3216UA121

L700
CB3216UA121
OPT

Q701
SI4925BDY

D3.3V_1
D1.8V_DDR

IC701
SC4215ISTRT

5

+3.3V For TMDS Switch

BLM18PG121SN1D
L702
R710
10K

NC_1

EN

VIN

P6.0V

1

8

2

7

3

6

4

5

GND

D3.3V_3

IC706
AP1117E33G-13
IN

C

3

NEW

A2

1

NC_2
C712
10uF
10V

C713
0.1uF
16V

R705
2.7K

VO

C752
10uF
10V

C753
0.1uF
16V

OUT

NC_3

R712
9.1K
1%

C714
22uF
16V

C715
0.1uF
16V

R1/R2 : 27K / 20K => Vout=1.88
R1/R2 : 15K / 12K => Vout=1.80
R1/R2 : 12K / 9.1K => Vout=1.85

C754
10uF
6.3V

C755
0.1uF
16V

C721
0.1uF
16V

1

8

D1_2

G1

2

7

D1_1

S2

3

6

D2_2

G2

4

5

D2_1

C
012:F2

ADJ/GND

2

C720
10uF
OPT

ADJ

Replaced Part
D705
ENKMC2838-T112
A1

R704
47K

R711
12K
1%

S1

WIHD_PWR_EN

R703
R702
120K

10K

B

Q700
2SC3052
E

C722
8.0PI
OPT

6
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

JUNO-BOX
AN SO YOUNG

POWER

04

17

LGE Internal Use Only

DEMODULATOR LGDT3900
+3.3V_DTMB

C1005
10uF
10V

C1010
0.1uF
16V

C1016
0.1uF
16V

C1033
0.1uF
16V

C1029
0.1uF
16V

C1022
0.1uF
16V

C1018
0.1uF
16V

+1.2V_DTMB

+3.3V_DTMB
C1017
0.1uF
16V

C1013
0.1uF
16V

C1007
10uF
10V

C1021
0.1uF
16V

C1032
0.1uF
16V

C1028
0.1uF
16V

C1038
0.1uF
16V

No more production TXC, China local cyristal will be used at MP

+3.3VA_DTMB

LGDT_SADDR[4]
C1043
18pF

C1030
0.1uF
16V

C1045
18pF

X1005
30.4MHz

C1034
0.1uF
16V

009:AT3

TU_IF_OUT-

TU_IF_OUT+

C1014

25V 0.01uF

C1015

25V 0.01uF

009:AG27

LGDT_SCLK

009:AG28

+5V_TUNER
C1050
0.1uF
16V

LGDT_SADDR[5]
LGDT_SADDR[6]
LGDT_SADDR[7]

C1051
0.1uF
16V

C1052
0.1uF
16V

C1053
0.1uF
16V

C1055
0.1uF
16V

C1054
0.1uF
16V

C1058
10uF
10V

C1056
0.1uF
16V

LGDT_SADDR[8]
R1016
1M

009:AT4

LGDT_SCKE

LGDT_SADDR[0-10]

LGDT_SADDR[9]
R1018
0

R1015
470

LGDT_SDQ[8]

LGDT_SDQ[0-15]

LGDT_SDQ[9]

R1017
470

ELITE 64MBIT

HYNIX 64MBIT

Close to IC

R1055
4.7K

R1030
4.7K

IC1005-*1
M12L64164A-5TG

IC1005
HY57V641620FTP

R1007
4.7K

SADDR[9]

SDQ[9]

SDQ[8]

SCLK

SCKE

SADDR[8]

SADDR[7]

VDD33_5

VSS_9

SADDR[6]

SADDR[5]

VDD_5

SADDR[4]

OPM[0]

OPM[1]

OPM[2]

TMOD

VSS_10

XTALI

XTALO

VDD33_6

VSS_8
76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

LGDT_SDQ[14]

VREFP

7

69

SDQ[15]

LGDT_SDQ[15]

68

VDD33_4

67

VDD_4

66

SDQ[0]

65

SDQ[1]

LGDT_SDQ[1]
LGDT_SDQ[2]

8
9

I2CSEL

10

IC1004
LG3900

11

TUNSCL

12

64

SDQ[2]

R1009

100

TUNSDA

13

63

VSS_6

VSS_1

14

62

SDQ[3]

LGDT_SDQ[3]
LGDT_SDQ[4]
LGDT_SDQ[5]

15

61

SDQ[4]

GPIO[5]

16

60

SDQ[5]

GPIO[4]

59

VDD_3

18

58

SDQ[6]

LGDT_SDQ[6]

19

57

SDQ[7]

LGDT_SDQ[7]

GPIO[2]

20

56

nSWE

55

VDD33_3

360mmA

LGDT_SDQ[5]

DQ5

LGDT_SDQ[6]

DQ6
VSSQ2
DQ7

LGDT_SDQ[7]
LGDT_SDQ[0-15]

VDD2
LDQM
WE

009:T28

LGDT_SWE

009:Y28

009:T27

LGDT_SWE
LGDT_SCAS
RAS

LGDT_SCAS

009:T27

009:Y28

LGDT_SRAS

LGDT_SRAS
CS

009:Y27

009:T27

LGDT_SCS
BA0

LGDT_SCS

009:V24

009:Y27

LGDT_SBA[0]
BA1

50

49

47

48

nSCS

46

51
45

25
43

VSS_5

44

52
42

24
40

LOCK

41

nSRAS

39

53

38

23

36

54

GPIO[0]

37

22

nSCAS

35

DQ4

CAS

GPIO[1]

nERROR

DQ3

LGDT_SDQ[4]

LGDT_SADDR[0-10]

17

VDD33_1
GPIO[3]

21

VSSQ1
LGDT_SDQ[3]

LGDT_SDQ[0]

100

VDD_1

DQ2

LGDT_SDQ[2]

VDDQ2

R1008

33

BLKERR

TESTSE

SDQ[14]

26

009:G21

94

LGDT_SDQ[13]

VSS_7

70

VSS_2

SYNCLOCK

VDD_6

LGDT_SDQ[12]

SDQ[13]

71

AGCOUT

009:G20

95

LGDT_SDQ[11]

SDQ[12]

72

AVSS_2

DQ1

LGDT_SDQ[10]

SDQ[11]

73

5
6

34

TU_SCL_3.3V
TU_SDA_3.3V

96

SDQ[10]

74

4

32

009:K13
009:S12

97

75

3

31

OPT

98

1
2

VREFN

29

4.7K
OPT

99

CMDC

AIFINN
AIFINP

AVDD33_2

DQ0
VDDQ1

LGDT_SDQ[1]

AVSS_1

R1005

R1004
4.7K

VDD1
LGDT_SDQ[0]

AVDD33_1

+3.3V_DTMB

30

1/16W
5%
C1006
0.1uF
16V +3.3V_DTMB

1/16W
C1002
5%
0.1uF
16V

009:AQ7

28

R1003
1K

R1002
1K

TU_IF_AGC

27

R1000
0

C1041
0.1uF
16V

C1023
1uF
OPT

C1020
0.1uF
16V

100

C1019
0.1uF
16V

VSS_11

R1036
0

009:V24

LGDT_SBA[1]
A10/AP

C1025
22pF
50V

C1035
22pF
50V

SBA[1]

SBA[0]

SADDR[10]

SADDR[1]

SADDR[0]

SADDR[2]

SADDR[3]

TPSOP

VSS_4

TPCLK

TPDATA[6]

TPDATA[7]

VDD_2

VDD33_2

TPDATA[5]

TPDATA[4]

TPDATA[3]

VSS_3

TPDATA[2]

TPDATA[1]

SDA

nRESET

SCL
FE_DEMOD_SCL

001:D21

TPVALID

R1010
100

TPDATA[0]

LGDT_SADDR[10]

C

D

LGDT_SADDR[0]

A0

LGDT_SADDR[1]

A1

LGDT_SADDR[2]

A2

LGDT_SADDR[3]

A3
VDD3

R1011
100

1

54

2

53

3

52

4

51

5

50

6

49

7

48
47

8
9
10

Max 170mA
Typ 120mA

46
45
44

11
12

43

13

42

14

41

15

40

16

39

17

38

18

37

19

36

20

35

21

34
33

22
23

32

24

31

25

30

26

29

27

28

VDD_1

VSS3
DQ15

DQ0

LGDT_SDQ[15]

VDDQ_1

VSSQ4
DQ14

DQ1

LGDT_SDQ[14]

DQ13

DQ2

LGDT_SDQ[13]

VSSQ_1

VDDQ4
DQ12

LGDT_SDQ[12]

DQ3

DQ11

LGDT_SDQ[11]

DQ4
VDDQ_2

VSSQ3
DQ10
DQ9

LGDT_SDQ[10]

DQ5

LGDT_SDQ[9]

DQ6
VSSQ_2

VDDQ3

DQ7

LGDT_SDQ[8]

DQ8

VDD_2

VSS2

LDQM

NC2

WE

UDQM

CAS

CLK
LGDT_SCLK

009:W36

LGDT_SCKE

009:W37

RAS

CKE
NC1

CS

A11

A13

A9

LGDT_SADDR[9]

A12

A8

LGDT_SADDR[8]

A10/AP

A7

LGDT_SADDR[7]

A0

A6

LGDT_SADDR[6]

A1

A5

LGDT_SADDR[5]

A2

A4

LGDT_SADDR[4]

A3
VDD_3

VSS1

1

54

2

53

3

52

4

51

5

50

6

49

7

48

8

47

9

46

10

45

11

44

12

43

13

42

14

41

15

40

16

39

17

38

18

37

19

36

20

35

21

34

22

33

23

32

24

31

25

30

26

29

27

28

VSS_3

009:F29

TU_SCL_3.3V

009:AQ7

TU_SDA_5V

TU_SCL_5V

009:AQ7

TU_SDA_3.3V

009:F29

DQ15
VSSQ_4
R1037
0

DQ14
DQ13
VDDQ_4
DQ12
DQ11
VSSQ_3
DQ10
DQ9
VDDQ_3
DQ8
VSS_2
NC_2
UDQM
CLK
CKE
NC_1
A11
A9
A8
A7
A6
A5
A4

H

VSS_1

FE_DEMOD_SDA

001:D21

C1036
22pF
50V

C1026
22pF
50V

LGDT_SADDR[10]

009:Y27

LGDT_SBA[1]

009:Y27

LGDT_SADDR[0]

R1012
100

LGDT_SADDR[1]
LGDT_SADDR[2]

/FE_RESET

001:X26

LGDT_SBA[0]

C1027
22pF
50V

LGDT_SADDR[3]

C1037
22pF
50V

+3.3V_DTMB
R1001
100

A1[RD]

C

A2[GN]

R1019

47

R1020

47

BLKERR 009:H27

FE_TS_SYN

001:AL16

FE_TS_DATA_CLK

001:AL17

FE_TS_SERIAL

001:AL16

FE_TS_VAL_ERR

001:AL16

+5V_TUNER

LDPC ERR
LD1200
SAM2333

R1021

R1022

R1006
200

A1[RD]

C

R1039
0

47

47

SYNCLOCK 009:H27

A2[GN]
LOCK
LD1201
SAM2333

TUNER TDFR-Z751D
E
R1038
OPT

Q1001
2SA1504S
C

R1051
2.2K
B

C
Q1003
2SC3875S(ALY)

R1046
10K

B

FE_BOOSTER_CTL

001:AJ11

E
C1070
0.01uF
25V

+5V_TUNER
R1023

C1071
100uF
16V
OPT

47

RF_SWITCH_SEL

L1001
MLB-201209-0120P-N2

001:X25;002:P22
C1057
0.1uF
16V

R1059
4.7K

C1059
0.1uF
16V

C1061
220uF
16V

+5V_TUNER
+5V_TUNER

+5V_TUNER

L1004
MLB-201209-0120P-N2
R1032
470
1

FIN must be connected GND

2

IC1000
BA50BC0WFP-E2

P6.0V

+5V_TUNER

3
4

CTL

5
C1024
100uF
16V

NC

GND

C1001
0.1uF
50V

OUT

5

4
3

2
1

VCC

C1000
47uF
16V

C1031
4.7uF
10V

6

C1039
0.1uF
50V

7
T-TDFR_Z051D
8

270mA

9
10

T-TDFR_Z051D
TU1001
TDFR-Z051D

12
13

+3.3V/+1.2V_DTMB
P6.0V

11

14

IC1001
KIA78R033F

15
16

1

VIN

17
C1011
0.1uF
16V

VC

18

2

C1008
100uF
16V

19
6

3

VOUT
20
GND2
21
4

NC
C1009
0.1uF
16V

22

C1012
100uF
16V

+3.3VA_DTMB

5

GND1

P6.0V
L1000
CIC21J501NE

NC_1

EN

C1004
10uF
10V

VIN

NC_2

1

8

2

7

3

6

4

5

GND

ADJ

+1.2V_DTMB
C1046
0.1uF
16V

R1035

82

E

+B1

0

C1069
0.01uF
25V

FE_SIF

002:S17

ISA1530AC1
Q1104

B
VTU
R1031
4.7K

RF_AGC

C
R1040 0
OPT

+B2
NC_1
C1063

SIF

100pF

VIDEO_OUT

50V

+5V_TUNER

R1029
0
OPT

NC_2

R1034
0

NC_3

C1072
0.1uF
16V

TU_IF

R1050
270
R1045

NC_4
R1044

GND
NC_5

R1027

47

R1028

47

NC_6
C1060
47pF
50V

SDA
SCL

C1062
47pF
50V

TU_SDA_5V
TU_SCL_5V

009:S13

TU_IF_AGC

009:C31

270

009:K12

E

FE_VMAIN

0
C1073
220pF
50V
OPT

002:E23

CVBS LINE MUST BE LOCATED IN 1’ST LAYER

ISA1530AC1
Q1105

B
C

NC_7
R1026
0

IF_AGC
DIF_1
DIF_2

R1024

0

R1025

0

L1002
CM2012FR22KT
220nH

NC_8
C1066
24pF

SHIELD
L1005
CM2012FR47KT
0.47uH

TU_IF_OUT+

009:D34

TU_IF_OUT-

009:D34

C1068
39pF
50V

OUTPUT

ADJ/GND

C1047
100uF
16V

C1048
4.7uF
10V

C1049
0.1uF
16V

C1065
24pF
L1003
CM2012FR22KT
220nH

VO

NC_3

2
1

C1044
100uF
16V

R1014
5.1K

3

R1033

C1067
220uF
16V

AZ1117D-3.3TRE1
INPUT

C1003
0.1uF
16V

+3.3VA_DTMB

G-SW

Close to tuner

24
IC1003

IC1002
SC4215ISTRT

+3.3V_DTMB

23

C1064
0.1uF
16V

CTR

R1013
10K

C1040
0.1uF
16V

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

C1042
22uF
16V

ROUTE SYMMETRICALLY

TUNER

LGE Internal Use Only

A

C

B

DDR2

F

E

G

H

DDR2 1.8V By CAP - Place these Caps near Memory

C345

0.1uF

C342

0.1uF

0.1uF

0.1uF
C341

0.1uF
C340

0.1uF
C339

C337

0.1uF

0.1uF
C338

0.1uF
C336

0.1uF
C332

0.1uF
C334

10uF
C330

0.1uF
C331

0.1uF
C329

0.1uF
C327

0.1uF
C328

0.1uF
C326

C324

C323
0.1uF

10uF
C325

0.1uF

0.1uF

C319

0.1uF

0.1uF

0.1uF

C317

C318

0.1uF

C316

0.1uF
C314

10uF
C315

0.1uF

C313

0.1uF

C312

C310

0.1uF

0.1uF

0.1uF

C307

C308

0.1uF

C306

0.1uF

D1.8V_S_DDR

C305

10uF

C303

C302
0.1uF

C304

D1.8V_DDR
L300
BLM18PG121SN1D

C320

1

D

PI Result

2

D1.8V_S_DDR

IC100

1%

C333 C335
0.1uF 1000pF

1%

R343
1K

1000pF

C311

R321

1K 1%
1%
0.1uF

R322

1K

C309

1K 1%

R301

R302 1K 1%

0.1uF

IC300 ELPIDA
EDE1116AEBG-8E-F

C301

C300 1000pF

IC300-*1 Hynix
HY5PS1G1631CFP-S6

R345
1K

D1.8V_S_DDR

D1.8V_S_DDR

Hynix
IC301-*1
H5PS5162FFR-S6C

ELPIDA
IC301
EDE5116AJBG-8E-E

LGE3369A (Saturn6 Non RM)
@compC

F9

DQ8

C8

DQ9

C2

DQ10

D7

DQ11

D3

DQ12

D1

DQ13

D9

DQ14

B1

DQ15

B9

G8

DQ1

G2

SDDR_D[2]

DQ2

H7

SDDR_D[3]

DQ3

H3

SDDR_D[4]

DQ4

M7

A2

H1

SDDR_D[5]

DQ5

N2

A3

H9

SDDR_D[6]

DQ6

N8

A4

F1

SDDR_D[7]

DQ7

F9

SDDR_D[8]

DQ8

C8

SDDR_D[9]

DQ9

C2

SDDR_D[10]

DQ10

D7

A9

SDDR_D[11]

DQ11

D3

A10/AP

SDDR_D[12]

DQ12

D1

A11

SDDR_D[13]

DQ13

D9

A12

SDDR_D[14]

DQ14

B1

SDDR_D[15]

DQ15

B9

N3
N7
P2
P8
P3
M2
P7
R2

A5
A6
A7
A8

L2

BA0

L3

BA1

VDD5

A1

VDD4

L1

BA2

E1

VDD3

J9

VDD2

M9

J8

CK

VDD1

R1

K8

CK

K2

CKE

J2

VREF

M8

A0

1GB
ELPIDA

M3
M7
N2

A1
A2
A3

SDDR_A[10]

SDDR_A[1]
SDDR_A[2]
SDDR_A[3]

4

A9

K9

ODT

VDDQ9

C1

L8

VDDQ8

C3

K7

VDDQ7

C7

L7

VDDQ6

C9

K3

WE

VDDQ5

A7

P8

A8

P3

A9

M2

A10

P7

A11

R2

A12

L2

BA0

SDDR_BA[0]

56

R303

ADDR2_BA[0]

C24

L3

BA1

SDDR_BA[1]

56

R304

ADDR2_BA[1]

B24

R305

ADDR2_BA[2]

D24

R306

ADDR2_MCLK

B14

D1.8V_S_DDR

SDDR_A[7]

AR302

SDDR_A[0]

SDDR_A[8]
SDDR_A[9]

ADDR2_A[2]

SDDR_A[4]

ADDR2_A[4]

SDDR_A[6]

SDDR_A[10]

56

SDDR_A[8]

SDDR_A[12]

A1

VDD_4

L1

BA2

E1

VDD_3

J9

VDD_2

M9

J8

CK

SDDR_CK

VDD_1

R1

K8

CK

/SDDR_CK

K2

CKE

SDDR_BA[2]
OPT

R350

SDDR_CKE
OPT

56

/SDDR_CAS

VDDQ_6

C9

K3

WE

/SDDR_WE

56

E9

VDDQ_5

VDDQ4

G1

VDDQ3

G3

VDDQ2

G7

VDDQ1

G9

ADDR2_ODT

D14

56

R310

/ADDR2_RAS

D13

56

R311

/ADDR2_CAS

D12

B_DDR2_A9

A_DDR2_A10

B_DDR2_A10

A_DDR2_A11

B_DDR2_A11

A_DDR2_A12

B_DDR2_A12

A_DDR2_BA2

B_DDR2_BA0
B_DDR2_BA1
B_DDR2_BA2

AC22

BDDR2_A[8]
BDDR2_A[9]

AD23 BDDR2_A[10]
R24

56

BDDR2_A[7]

AR305

BDDR2_A[0]

AE22 BDDR2_A[12]

TDDR_A[0]

BDDR2_A[2]

TDDR_A[2]

BDDR2_A[4]

TDDR_A[4]
56

BDDR2_A[6]

BDDR2_A[11]

TDDR_A[7]

56

TDDR_A[11]

R326

56

TDDR_A[8]

BDDR2_A[8]

R312

/ADDR2_WE

D22

A8

TDDR_A[8]

A9

TDDR_A[9]

A10

TDDR_A[10]

A11

TDDR_A[11]

A12

TDDR_A[12]

N7
P2
P8
P3
M2
P7
R2

R327

56

TDDR_BA[0]

BA0

L2

AC24

BDDR2_BA[1]

R328

TDDR_BA[1]

BA1

L3

AB22

BDDR2_BA[2]

R329

56
OPT

BDDR2_MCLK

R330

V25

AB23

R331

22

BDDR2_CKE

R332

56

A2

H9

DQ5

TDDR_D[5]

F1

DQ6

TDDR_D[6]

F9

DQ7

TDDR_D[7]

C8

DQ8

TDDR_D[8]

C2

DQ9

TDDR_D[9]

D7

DQ10

TDDR_D[10]

D3

DQ11

TDDR_D[11]

D1

DQ12

TDDR_D[12]

D9

DQ13

TDDR_D[13]

B1

DQ14

TDDR_D[14]

B9

DQ15

TDDR_D[15]

A4
A5
A6
A7
A8
A9
A10/AP
A11
A12

M7
N2

512MB
Hynix

N8
N3
N7
P2
P8
P3
M2
P7
R2

BA0

L2

BA1

L3

DQ1
DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD5

E1

VDD4

VDD_5

NC4

VDD_4

L1

E1
J9

VDD_3

J9

VDD3

M9

VDD_2

CK

J8

M9

VDD2

R1

VDD_1

CK

K8

R1

VDD1

CKE

K2

ODT

K9

A9

VDDQ10

L1

CK

J8

/TDDR_MCLK

CK

K8

CKE

K2

ODT

K9

A9

VDDQ_10

TDDR_CKE

A3

M3

H7

A1

NC_4

R351
TDDR_MCLK

0

/BDDR2_MCLK

B_DDR2_CKE

TDDR_BA[2]

TDDR_D[4]

D1.8V_S_DDR

BDDR2_BA[0]

B_DDR2_MCLK

/B_DDR2_MCLK

A7

TDDR_A[7]

N3

AC23

V24
/A_DDR2_MCLK

A6

TDDR_A[6]

TDDR_A[6]

BDDR2_A[11] R325

A5

TDDR_A[5]

DQ4

DQ0

G2

OPT

R348

CS

L8

C1

VDDQ_9

CS

L8

C1

VDDQ9

/TDDR_RAS

RAS

K7

C3

VDDQ_8

RAS

K7

C3

VDDQ8

CAS

L7

C7

VDDQ_7

CAS

L7

C7

VDDQ7

/BDDR2_WE

R336

56

/TDDR_WE

WE

K3

C9

VDDQ_6

WE

K3

C9

VDDQ6

E9

E9

VDDQ_5

E9

VDDQ5

VDDQ_4

G1

G1

VDDQ_4

G1

VDDQ4

VDDQ_3

G3

G3

VDDQ_3

G3

VDDQ3

VDDQ_2

G7

G7

VDDQ_2

G7

VDDQ2

VDDQ_1

G9

G9

VDDQ_1

G9

VDDQ1

F7

LDQS

B7

UDQS

SDDR_DQS0_P
SDDR_DQS1_P

56
56

R314

C17

ADDR2_DQS1_P

LDM

SDDR_DQM0_P

56

R315

ADDR2_DQM0_P

C18

B3

UDM

SDDR_DQM1_P

56

R316

ADDR2_DQM1_P

A19

ADDR2_DQS0_N

A18

ADDR2_DQS1_N

B17

E3

E8

LDQS

SDDR_DQS0_N

56

R317

J3

A8

UDQS

SDDR_DQS1_N

56

R318

N1

VSS_1

P9

R7

NC_6

ADDR2_D[11]

SDDR_D[11]
SDDR_D[12]
56
AR307

SDDR_D[14]

VSSQ_10

B2

VSSQ_9

B8

VSSQ_8

A7

VSSQ_7

D2

VSSQ_6

D8

VSSQ_5

E7

F2

VSSQ_4

F2

VSSQ3

F8

VSSQ_3

F8

SDDR_D[10]

VSSQ2

H2

VSSQ_2

H2

SDDR_D[13]

VSSQ1

H8

VSSQ_1

H8

A2

NC_1

E2

NC_2

R8

NC_3

J1

VDDL

ADDR2_D[9]

ADDR2_D[2]

A15

ADDR2_D[14]

ADDR2_D[3]

B21

ADDR2_D[4]

ADDR2_D[4]

C21

ADDR2_D[3]

ADDR2_D[5]

C14

ADDR2_D[1]

ADDR2_D[6]

C20

SDDR_D[15]
D1.8V_S_DDR

A21

SDDR_D[1]
SDDR_D[6]

J7

ADDR2_D[1]

56
AR308

ADDR2_D[6]
ADDR2_D[15]

SDDR_D[8]

ADDR2_D[8]
ADDR2_D[10]
56
AR309

ADDR2_D[13]

SDDR_D[7]

ADDR2_D[7]

SDDR_D[0]

ADDR2_D[0]

SDDR_D[2]

ADDR2_D[2]

SDDR_D[5]

ADDR2_D[5]

ADDR2_D[7]
ADDR2_D[8]
ADDR2_D[9]

C15
C16
C19

ADDR2_D[10] B16
ADDR2_D[11] B20
ADDR2_D[12] A20
ADDR2_D[13] A16
ADDR2_D[14] B19
ADDR2_D[15] A17

AB24

/B_DDR2_WE
BDDR2_DQS0_P

AB26
B_DDR2_DQS0

A_DDR2_DQS1

B_DDR2_DQS1

A_DDR2_DQM0

B_DDR2_DQM0

R337

BDDR2_DQS1_P

AA26

R338

A_DDR2_DQSB0

B_DDR2_DQSB0

A_DDR2_DQSB1

B_DDR2_DQSB1
B_DDR2_DQ0

A_DDR2_DQ1

B_DDR2_DQ1

A_DDR2_DQ2

B_DDR2_DQ2

A_DDR2_DQ3

B_DDR2_DQ3

A_DDR2_DQ4

B_DDR2_DQ4

A_DDR2_DQ5

B_DDR2_DQ5

A_DDR2_DQ6

B_DDR2_DQ6

A_DDR2_DQ7

B_DDR2_DQ7

A_DDR2_DQ8

B_DDR2_DQ8

A_DDR2_DQ9

B_DDR2_DQ9

A_DDR2_DQ10

B_DDR2_DQ10

A_DDR2_DQ11

B_DDR2_DQ11

A_DDR2_DQ12

B_DDR2_DQ12

A_DDR2_DQ13

B_DDR2_DQ13

A_DDR2_DQ14

B_DDR2_DQ14

A_DDR2_DQ15

B_DDR2_DQ15

56

TDDR_DQS0_P
TDDR_DQS1_P

LDQS
UDQS

F7
B7

B3
A3

VSS5

VSS_4

LDQS

E8

E3

VSS4

VSS_3

UDQS

A8

J3

VSS3

N1

VSS2

P9

VSS1

B2

VSSQ10

B8

VSSQ9

A7

VSSQ8

TDDR_DQM0_P

LDM

F3

AC26

BDDR2_DQM1_P

R340

56

TDDR_DQM1_P

UDM

B3
A3

VSS_5

AB25

BDDR2_DQS0_N

R341

56

TDDR_DQS0_N

LDQS

E8

E3

AA25

BDDR2_DQS1_N

R342

56

TDDR_DQS1_N

UDQS

A8

J3
N1

VSS_2

P9

VSS_1

AE26

BDDR2_D[1]
BDDR2_D[2]

BDDR2_D[9]

AF24

BDDR2_D[3]

BDDR2_D[14]

BDDR2_D[4]

V26

BDDR2_D[5]

AE25

BDDR2_D[6]

W26
Y26
AD25
Y25

BDDR2_D[7]
BDDR2_D[8]
BDDR2_D[9]
BDDR2_D[10]

AE24 BDDR2_D[11]
AD26 BDDR2_D[12]
Y24

BDDR2_D[13]
AD24 BDDR2_D[14]
AA24 BDDR2_D[15]

TDDR_D[12]

BDDR2_D[12]

W24
AF25

TDDR_D[11]

BDDR2_D[11]

NC_5

R3

NC_6

R7

TDDR_D[9]
TDDR_D[14]
AR311

56

BDDR2_D[4]

TDDR_D[3]

BDDR2_D[1]

TDDR_D[1]
56
AR312

BDDR2_D[6]
BDDR2_D[15]

A2

NC_2

E2

NC_3

R8

TDDR_D[6]
TDDR_D[15]
TDDR_D[8]

BDDR2_D[8]

NC_1

TDDR_D[4]

BDDR2_D[3]

VSSDL

J7

D1.8V_S_DDR

B7

UDM

56

BDDR2_D[0]

UDQS

F7

F3

R339

AR310

LDQS

LDM

BDDR2_DQM0_P

W25
A_DDR2_DQ0

56

OPT

AC25
B_DDR2_DQM1

B15

SDDR_D[3]

SDDR_D[4]

VSSDL

ADDR2_D[0]

ADDR2_D[12]

SDDR_D[9]

/B_DDR2_CAS

A_DDR2_DQS0

A_DDR2_DQM1

AR306
NC_5

/A_DDR2_CAS

/B_DDR2_RAS

B18

ADDR2_DQS0_P

R313

/A_DDR2_RAS
/A_DDR2_WE

F3

R3

B_DDR2_ODT

R349

A3

VDDL

A_DDR2_A9

R25

TDDR_A[12]

N8

H1

G8

/TDDR_CAS

VSS_2

J1

B_DDR2_A8

BDDR2_A[7]

BDDR2_A[12]

A4

TDDR_A[4]

M8

A1

56

VSS_3

J7

A_DDR2_A8

AD22

BDDR2_A[6]

TDDR_A[5]

A0

TDDR_D[3]

56

VSS_4

VSSQ4

B_DDR2_A7

BDDR2_A[5]

BDDR2_A[5]

N2

J2

TDDR_D[2]

DQ3

R335

VSS_5

VSSDL

A_DDR2_A7

R26

BDDR2_A[4]

A3

TDDR_A[3]

M7

VREF

TDDR_D[1]

DQ2

H3

R334

UDQS

E7

B_DDR2_A6

AE23

BDDR2_A[3]

A2

TDDR_A[2]

512MB
ELPIDA

TDDR_D[0]

DQ1

H7

/BDDR2_CAS

LDQS

VSSQ5

A_DDR2_A6

T24

TDDR_A[10]

AR304

M3

DQ0

G2

/BDDR2_RAS

A8

D8

B_DDR2_A5

AF23

56

BDDR2_A[10]

A1

TDDR_A[1]

G8

U24

E8

VSSQ6

A_DDR2_A5

A_DDR2_ODT

OPT

N1

NC3

B_DDR2_A4

A_DDR2_BA1

M8

U25

R347

J3

NC2

A_DDR2_A4

A_DDR2_BA0

J2

A0

56

E3

NC1

B_DDR2_A3

TDDR_A[1]

BDDR2_A[1]

BDDR2_A[2]

TDDR_A[0]

R333

A3

R8

A_DDR2_A3

T25

BDDR2_A[1]

TDDR_A[3]

BDDR2_ODT

VSS2

E2

B_DDR2_A2

AF26

TDDR_A[9]

BDDR2_A[3]

U26

VSS3

A2

A_DDR2_A2

A_DDR2_CKE

R309

SDDR_ODT 56

VSS4

D2

B_DDR2_A1

BDDR2_A[9]

D1.8V_S_DDR

VSS5

A7

A_DDR2_A1

BDDR2_A[0]

D1.8V_S_DDR

/SDDR_RAS

B8

B_DDR2_A0

22

D23

RAS

VSSQ7

T26
A_DDR2_A0

A_DDR2_MCLK

ADDR2_CKE

CAS

VSSQ8

ADDR2_A[12] A24

R308

CS

VSSQ9

ADDR2_A[8]

56

K7

B2

C23

A14

L7

VSSQ10

B12

/ADDR2_MCLK

L8

NC6

ADDR2_A[8]

B23

R307

C7

R7

ADDR2_A[7]

C12

ADDR2_A[10] B22
ADDR2_A[11] A12

ADDR2_A[11]

56

ADDR2_A[6]

A23

22

C3

NC5

R320

ADDR2_A[5]

22

C1

R3

R319 56

ADDR2_A[4]

ADDR2_A[9]

ADDR2_A[6]

SDDR_A[11]

SDDR_A[11]

VDD_5

ADDR2_A[0]

SDDR_A[2]

VDDQ_7

P9

A13

P2

SDDR_A[6]

VDDQ_8

VSS1

C22

A6

ADDR2_A[7]

SDDR_A[7]

VDDQ_9

UDM

ADDR2_A[3]

B13

N7

SDDR_A[5]

RAS

B3

ADDR2_A[2]

A22

A5

ADDR2_A[12]

SDDR_A[12]

CAS

LDM

ADDR2_A[9]

ADDR2_A[1]

N3

SDDR_A[4]

CS

F3

ADDR2_A[10]

VREF
AR303

C13

A4

ODT

UDQS

ADDR2_A[0]

N8

K9

B7

56

SDDR_A[9]

A9

LDQS

A_MVREF

ADDR2_A[3]
56
AR301

VDDQ_10

F7

D15

ADDR2_A[5]
ADDR2_A[1]

SDDR_A[1]

R346
VDDQ10

AR300

SDDR_A[5]
SDDR_A[3]
SDDR_A[0]

TDDR_D[0-15]

DQ7

DQ0

SDDR_D[1]

OPT

F1

SDDR_D[0]

TDDR_A[0-12]

DQ6

M3

A1

R344
150

H9

A0

BDDR2_D[0-15]

DQ5

VREF

M8

BDDR2_A[0-12]

H1

J2

ADDR2_A[0-12]

DQ4

1GB
Hynix

ADDR2_D[0-15]

H3

150
R300

H7

DQ3

SDDR_A[0-12]

G2

DQ2

SDDR_D[0-15]

G8

DQ1

OPT

3

DQ0

B2

VSSQ_10

B8

VSSQ_9

A7

VSSQ_8

D2

VSSQ_7

D8

VSSQ_6

E7

VSSQ_5

F2

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

D2
D8

VSSQ7
VSSQ6

E7

VSSQ5

VSSQ_4

F2

VSSQ4

VSSDL

J7

BDDR2_D[10]

TDDR_D[10]

F8

VSSQ_3

F8

VSSQ3

BDDR2_D[13]

TDDR_D[13]

H2

VSSQ_2

H2

VSSQ2

H8

VSSQ_1

H8

VSSQ1

AR313

56

BDDR2_D[7]

TDDR_D[7]

BDDR2_D[0]

TDDR_D[0]

BDDR2_D[2]

TDDR_D[2]

BDDR2_D[5]

56

VDDL

J1

VDDL

J1

TDDR_D[5]

56

5

6
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

JUNO-BOX

DDR2

06

17

LGE Internal Use Only

A

B

C

D

F

E

G

I

H

J

D1.26V_VDDC

K

L
D3.3V_1

D3.3V_VDDP

L101
BLM18PG121SN1D

1

C172
0.1uF

C169
0.1uF

C166
0.1uF

C163
330uF
4V

C183
0.1uF

C178
0.1uF

C175
0.1uF

C188
0.1uF

C198
0.1uF

C193
0.1uF

C2104
0.1uF

C2109
0.1uF

C2115
0.1uF

C2119
0.1uF

C2120
0.1uF

C2137
0.1uF

C2123
0.1uF

C2124
0.1uF

C2125
0.1uF

C2126
0.1uF

C2130
0.1uF

C2129
0.1uF

C2128
0.1uF

C2127
0.1uF

C2131
0.1uF

C2132
0.1uF

C2133
0.1uF

C2134
0.1uF

C2135
10uF

C164
0.1uF

C167
0.1uF

C170
0.1uF

C173
0.1uF

C176
0.1uF

C179
0.1uF

C184
0.1uF

C189
0.1uF

C171
0.1uF

C174
0.1uF

C177
0.1uF

C180
0.1uF

C185
0.1uF

C190
0.1uF

C196
0.1uF

C195
0.1uF

IC100
LGE3369A (Saturn6 Non RM)
D1.8V_DDR
@compC

LVB0P
LVB0M
LVB1P
LVB1M
LVB2P

D1 RXB2N
E1 DDCD_B_DA
F3 DDCD_B_CK

LVB2M
LVB3P
LVB3M

E2 HOTPLUG_B

LVB4P

R122
R123

470

R124

47

R125

47
47

R126
R107
10K

DSUB

DSUB_HSYNC
DSUB_VSYNC

0.047uF
0.047uF

T3 BINM
R2 GINM

R146
R149
R127

DSUB_G

001:F2

R128

001:F2

R129

COMP2_Y
COMP2_PB

001:B2

R133

001:B1

R134

001:B1

R135

47
47
47
470

47
47

R136

C113
C108

22
0.047uF

C114

0.047uF
0.047uF

L3 GIN1P/DSUB_G
K1 BIN1P/DSUB_B

C109

1000pF

L2 SOGIN1

C115
C116

0.047uF

V1 RIN2P/COMP_PR+
V2 GIN2P/COMP_Y+

47
470

C117

0.047uF
0.047uF

C110

1000pF

U1 BIN2P/COMP_PB+
V3 SOGIN2
J5 VSYNC2

CVBS

R137

47

C118

0.047uF

R138

47

C119

0.047uF

T2 VCOM1

47

C120

0.047uF

47

C121

0.047uF

R140

47

C124

0.047uF

R141

47

C125

0.047uF

S-VIDEO

001:B2;001:C3

0.047uF

AV1_C_IN

C136
C137
C138
C139

TV/MNT

R139

005:C3

R117

100
100

R2122

100

C122

0.047uF

C123

0.047uF

Y13

PCM_A[0]

AB16

PCM_A[1]

AC15

PCM_A[2]

AC14

PCM_A[3]

AB14

PCM_A[4]

AC12

PCM_A[5]

AB8

PCM_A[6]

AC13
AA9

R2123
R2124

33 OPT
33 OPT
33 OPT

R178

33 OPT

AB5
AA4
V4
Y4

AD6

AV2_L_IN

001:E2
001:E2

COMP1_L_IN

001:E1

AV1_R_IN

001:E1

AV1_L_IN

001:E3

COMP2_R_IN

2.2uF

001:E3

2.2uF

001:H4

PC_R_IN

C143

2.2uF

001:H4

PC_L_IN

C144

2.2uF

C145

2.2uF

C146

W2

C147

OPT R269

E9

AC1
AD2

I2S_OUT_WS
I2S_OUT_BCK
I2S_OUT_SD

R210

COMP2_L_IN

R211

0.1uF

R171
R172

47
47

005:C2

009:E8

/PF_OE

009:D7

/PF_WE
PF_ALE

SPDIF_OUT

CH1

VCLAMP
REFP
REFM

100
OPT

OPT

OPT

E6

AE11
SPI_DI

PCMD5/CI_D5

SPI_DO

PCMD6/CI_D6

/SPI_CS

PCMD7/CI_D7

SPI_CK

Y14

PCM_A5/CI_A5

USB_DM_1

PCM_A6/CI_A6

USB_DM_2

PCM_A7/CI_A7

USB_DP_2

22

0

F8

EEPROM_SDA

0

D11

SDA0

009:H7

0

AB21

SCL0

009:H8

R217
R218

AC21

0

ISP_RXD

001:H1;009:A6

R191

22

J1

ISP_TXD

001:H1;009:A6

R192
R183

22

J2

22

W5

R184

22

V5

PCM_RST/CI_RST

GPIO_PM0/GPIO134

PCM_CD/CI_CD

GPIO_PM1/GPIO135

/PCM_OE

GPIO_PM2/GPIO136

PCM_REG/CI_CLK

GPIO_PM3/GPIO137

PCM_WAIT/CI_WACK

GPIO_PM4/GPIO138

/PCM_IRQA

GPIO_PM5/INT1/GPIO139

/PCM_WE

GPIO_PM6/INT2/GPIO140
GPIO131/LDE/SPI_WPn1

PCM_IOWR/CI_WR

GPIO130/LCK

PCM_IOR/CI_RD
/PCM_CE

GPIO132/LHSYNC/SPI_WPn

/PF_CE0

GPIO60/PCM2_RESET/RX1

/PF_CE1

GPIO62/PCM2_CD_N/TX1

1uF
4.7uF

C133

R234

0

USB_DM_DBG

009:K2

AB10

R233

0

USB_DP_DBG

009:K2

P1101
UB01123-4HHS-4F

C154
22pF
OPT

C155
22pF
OPT

PF_AD15
LHSYNC2/I2S_OUT_MUTE/RX1
LVSYNC/GPIO133
GPIO79/LVSYNC2/TX1

UART2_TX/SCKM
UART2_RX/SDAM

UART2_RX/GPIO84

DDCR_DA

UART2_TX/GPIO85

DDCR_CK

UART1_RX/GPIO86
UART1_TX/GPIO87
GPIO42/PCM2_CE_N

DDCA_CLK

E5

R237

F5

R119

G5

R244

UART_RX2

100
100

R245

100

F6

R241
R272

100

G6
H6

R246

AC17 R2193

100
100
100

AB17

R220

100

AF11

R238

014:G4;012:C3;009:F5WIHD_TX_INT
014:G4;009:F5
HDMI_RX_INT
014:G4;009:F5

For Debuggging

RF_SWITCH_SEL

100

009:A7

FE_BOOSTER_CTL
Flash_WP_1

AA18 R239
AA17 R240

0

009:H8

SDA1

0

009:H8

SCL1

E7

0 OPT
22 OPT
0 OPT
22 OPT

009:BC15

CH4

AC18

R202

C6

R2185
R203

F9

R2186

5V_HDMI_3

014:H3

F10
A6
B6
AF5
AF10

R267

22 OPT

R268

22 OPT
22 OPT

R2194
R2187

5V_HDMI_1

5V_HDMI_2

USB_OCD

22 OPT

AA8
TS0_D0

Y8
Y9
AB7
AA6
AB6
U4
AC5
AC4
AD5
AB4

TS0_CLK
AB19
TS1_D0
PWM0

009:C7

PWM1

009:C7

TS1_SYNC

AB13
AB12
R194

0

AD12

R195

100

AA13

PWM0

TS1_VLD

PWM1

TS1_CLK

PWM2
ET_TXD0

PWM3

R2190
R2191

0

0
R193

0

F4
E4
C4

ET_TXD1
ET_TX_CLK

SAR0

ET_RXD0

SAR1
SAR2

ET_RXD1

SAR3

ET_TX_EN

IRIN

ET_MDC
ET_MDIO

R112

017:C6;017:H6

R196

016:C3

WIHD_TX_INT014:G4;012:C3;009:I3
017:A3
HDMI_TX_INT

5

OPT 100

D9

100

D10

R200

100

D7

017:H6
016:C3;017:A3

R221

100
100

E11

R201

014:G4;009:I3

R219

100

E10

R179

100
100

D6

R2160

22

HDMI_RX_RESETb
AV1_SVIDEO_DET

001:B3

R248

R255

AA19

R99

33

R98

33

R97

33

R96

33

FE_TS_SERIAL
FE_TS_SYN

C10

R251

100

001:B3;001:C1

B11

R235

100
100

001:B3;001:C2
001:B2;001:C2

100

001:B2;001:C3

A9
C11
C9

R243
R110
R2188
R249

100

A10

R250

100

B9

R2189

A11

R111

009:U21

AV1_CVBS_DET

COMP1_DET
DSUB_DET

001:H1

E8

D5
OPT

C5

IC100

VGA_EEPROM_WP

D1.26V_VDDC VDDC : 970mA

005:H1

100

009:U21
009:U20

FE_TS_DATA_CLK

AV2_CVBS_DET
COMP2_DET

001:H3

100

B10

009:U20

FE_TS_VAL_ERR

LGE3369A (Saturn6 Non RM)

/FE_RESET

100 OPT

GPIO44

HDMI_RX_INT

014:G4

AA20
AC19

ET_COL

AC11

0

HDMI_TX_RESETb

HDMI_TX_DDC_SEL

E17
GPIO96

E18

GPIO88

F7

VDDC_4

D19

VDDC_5

D20

VDDC_6

H18

VDDC_7

H19

VDDC_8

H20

GPIO99

J20

GPIO103/I2S_OUT_SD3

VDDC_9
VDDC_10

K20

L11

L13

ISP_RXD

001:H1;009:F4

2

VDDC_11

L20

GND_10

M20

GND_11

VDDC_12
VDDC_13

P7

GND_12

R7

GND_13
GND_14

VDDC_14

L17

VDDC_15

T7

L18

GND_15

M9

GND_16

7

1mA

1

4
VCC
C197
0.1uF

WP

6

ISP_TXD

001:H1;009:F4

4

M17

3

0xA8

6

4

5

SDA

N4
N9
A7
GPIO67

B8

R181

22

EEPROM_SCL

22

EEPROM_SDA

VCC
009:B8;009:F3;009:H8

1

C212
0.022uF
16V

009:B8;009:F3;009:H8

3

R224
R242
OPT

N10

100

USB_CTL

014:H3

100

N11
N12

OUT

N13
N14

S6_Reset
GND

R247
10K

N16
N18

ISP Debug port for S5

P4

Addr:10101--

P9
P10

VDDC_21

GND_20

VDDC_22
VDDC_23

GND_22

VDDC_24

GND_23

VDDC_25
VDDC_26

NAND FLASH MEMORY

P14

6

4

5

R151

SPI_CK
009:I2

SI

/F_RB
009:F3
/PF_OE
009:F3
/PF_CE0
009:F3

009:F4

009:I2
SPI_DI

NC_6
R/B
RE
CE

R102

Q100
KRC103S

3.9K

1K

1K

R157

E

NC_7

D3.3V_2

NC_8
VCC_1
VSS_1

OPT

NC_9

R154
1K

NC_10

0
R2126

A2

GND

3

2mA

6

0xA0
4

5

SCL

SDA

R2111

33

R2112

33

4.7K

C100
0.1uF

R258
10K

0
Q101
KRC103S
OPT

ALE
WE
WP
R155
1K

OPT

OPT

L105

R180

4.7K

WP

D3.3V_2

PF_WP
009:F3
OPT

$0.418
7

D5.0V_1

VCC

OPT

2

8

R132

8

A1

1

R118

0
R2125

A0

L104

IC104
AT24C512BW-SH-T
0
R2127

10K

EEPROM

D3.3V_2

R153

CLE
/PF_CE1
009:F3
PF_ALE
009:F3
/PF_WE
009:F3

NC_11
NC_12
NC_13
NC_14
NC_15

EEPROM_SCL
009:C6;009:F3;009:H8
EEPROM_SDA
009:C6;009:F3;009:H8

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

1386 WON

3

46

4

45

5

30mA

44

6

43

7

42

8

41

9

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

25

P17

NC_27

P18

PCM_A[0-7]

NC_26

GND_28

VDDP_2

GND_29

VDDP_3

GND_30

VDDP_4

GND_31

VDDP_5

GND_32

VDDP_6

GND_33

AR100

R9

I/O7

PCM_A[7]

I/O6

PCM_A[6]

I/O5

PCM_A[5]

I/O4

PCM_A[4]

PRE

R11

I2C

R12
D3.3V_1

R15

C161
10uF 6.3V

VCC_2
VSS_2

C162

0.1uF

CH2

NC_22
NC_21

FE_DEMOD_SDA

R2100

0

005:H2

FE_DEMOD_SCL

R2101

0

NC_20

AR101

R2114 OPT
PCM_A[3]
PCM_A[2]

I/O2

PCM_A[0]

I/O0
NC_19
NC_18

CH2

HDMI_TX

CH2

22

CH4

HDMI SW

SDA_HDMI
SCL_HDMI

002:G6

TDA9996_SDA

002:G6

TDA9996_SCL

VDDP_8

VDDP_7

GND_35

CH4

R18
T5
T9
T10

R2118
R2102

SDA0
SCL0

CH2

GND_36

0

R2105

0

012:C3

SDA_MCU

R2115

0

012:C3

SCL_MCU

R2116

0

H12
N20
P20
W9
W10

AVDD_AU : 36.11mA
D3.3V_1
L109
BLM18PG121SN1D
D1.8V_DDR

G12
AVDD_DDR_1

GND_40

AVDD_DDR_4

GND_41

AVDD_DDR_5

GND_42

AVDD_DDR_6

GND_43

AVDD_DDR_7

GND_44

AVDD_DDR_8

GND_45

AVDD_DDR_9

GND_46

AVDD_DDR_10

GND_47

AVDD_DDR_11

GND_48

AVDD_MEMPLL_1

GND_49

AVDD_MEMPLL_2

GND_50

AVDD_MEMPLL_3

G13

T15
009:B8;009:C6;009:F3

T16

009:B8;009:C6;009:F3

T17

CH1

T18
U5

SDA1
SCL1

CH4

009:I3

Y21

009:I3

AA23

C215

C219

0.1uF

0.1uF

H13
H14
H15
H16
W14
W15
W16

AVDD_MEMPLL : 23.77mA

W17

D3.3V_1

W18

L106
BLM18PG121SN1D

H17
T20

C200

V20

C206

0.1uF 0.1uF

GND_51

C209

C216

0.1uF

0.1uF

GND_52
D3.3V_1
L108
BLM18PG121SN1D

GND_53
GND_54

AVDD_LPLL : 4.69mA

R20
AVDD_LPLL
D3.3V_AVDD_MPLL

GND_56
GND_57

H7
AVDD_MPLL

GND_58

C191

C211

C218

0.1uF

0.1uF

C201
10uF
10V

GND_59
0.1uF

GND_60

AVDD_MPLL : 7.76mA

GND_61

D3.3V_1

GND_62
GND_63

T14

EEPROM_SCL

0

T12

VDDP : 102.3mA

H10
H11

W7

AVDD_DDR_3

009:F3

0

0

0

009:F3

0
HW IIC
EEPROM_SDA

R2103

Y22

AVDD_AU

GND_38

GND_64

L103
BLM18PG121SN1D

J7
AVDD_33_1

T13

0

R2104

W22

GND_37

GND_55

R17

W13

014:G5;017:F4;017:H5SDA_WIHD
014:G4;017:F5;017:F4SCL_WIHD

NC_17
NC_16

017:E3
017:E3

PCM_A[1]

I/O1

R2117

W19
W20

R16

T11

005:H2

R2113 OPT

I/O3

R13
R14

22

NC_24
NC_23

R10

W12

GND_34

R4

NC_25

R266 4.7K

GND

1K

47

P16

R260 4.7K

3

C
B
0

OPT
R148

PWM1

SCLK

2

NC_28

OPT R2110 1.2K

HOLD#

NC_5

48

OPT R2109 1.2K

7

009:F4

1

R2107
4.7K
R2108
4.7K

25mA

NC_4

R158

2

PWM0

NC_3

0.1uF

WP#

0
R101
OPT

SO

33

10 : BOOT 51
11 : BOOT RISC

R156

R104

1K

1K

NC_2

1K

R103
10K

SPI_DO

VCC

$0.76

D3.3V_2 009:I2
009:I2

R150

/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L :
8 bit

OPT

8

1

R147

NC_1

C131

CS#

SPI_CS

OPT
D3.3V_2

P13

D3.3V_2

P15

L110

R105
4.7K

IC101
MX25L3205DM2I-12G

0.1uF
C126

009:I3

Flash_WP_1

7

D3.3V_2

P12

IC102
HY27US08121B-TPCB

D3.3V_2

V22
W11

H9
VDDP_1

AVDD_DDR_2

D3.3V_1

V7

D3.3V_VDDP

GND_26
GND_27

GND_39

MCU BOOT STRAP

U20
U22

GND_25

P11

Serial FLASH MEMORY for BOOT

U7

VDDC_27

N15
N17

VDDC_19
VDDC_20

GND_21

M18

IC103

R182

GND_19

GND_24

2
VSS

GND_18

M15

KIA7427F
SCL

M11

M16

GPIO68
A2

GND_17

M14

T22
VDDC_16
VDDC_17
VDDC_18

M10

M13

C213
4.7uF
6.3V

8

2

R228
470

TMSV153BRA
SW100

3
A1

3

$0.199

GND_9

M12

IC105
CAT24WC08W-T

1

GND_5

L12

GPIO102

S6 Reset

SMW250-04

A0

VDDC_3

D18

GND_4

GND_8

L10

GPIO98

D3.3V_1

R106
4.7K

D17

GND_3

VDDC_2

GND_6

L9

GPIO91
GPIO97

L16

2

VDDC_1

D16

GND_2

GND_7

GPIO90/I2S_OUT_MUTE

L15

1

@compC

E16

L14

D5.0V_1

C1101
10uF
16V

100

H5

GPIO43/PCM2_IRQA_N

DDCA_DA

C157
22pF
OPT

Close to IC
as close as possible

HDCP EEPROM

USB_DP_DBG
009:I2

/PF_WE

TS0_VLD

HDMI_RES_SEL

P101

USB_DM_DBG
009:I2

PF_ALE

TS0_D7

HDMI_TX_SEL

ISP Port

L1100
CB3216PA501E

/PF_OE

TS0_D6

B4

10uF 10V
0.1uF

C132

D5.0V_1

0
0

AC10

PCM_A13/CI_A13

TS0_SYNC

0.1uF

C129

ANOTHER USB PORT USE FOR DEBUGGING OK????

R222
R223

USB_DM

A5

PCM_A11/CI_A11

MS_SCK
MS_LRCH

AE4
C130

SPI_DI

PCM_A12/CI_A12

UART_TX2

C149
0.1uF

C128

SPI_CK

PCM_A10/CI_A10

MS_LRCK

C148

AD4

SPI_CS

009:B7

PCM_A8/CI_A8

AUDIO_MASTER_CLK

C150
0.1uF

AF4

SPI_DO

009:A7

33

PCM_A9/CI_A9

F_RBZ
R215

0.1uF

AUVAG

009:B7
009:A7

33

R227

B5
USB_DP_1

PCM_A4/CI_A4

A4

AUVRM
AUVRP

33

R226

AD11

USB_DP

PCM_A3/CI_A3

TS0_D4
017:A2

C8

AE5
AUCOM

Y2 CVBSOUT0/SC2_MNTOUT
AA2 CVBSOUT1

C2136
10uF

0

R225

AF12

PCM_A1/CI_A1

TS0_D5

017:A2
017:A2

J4

R232

AE12

PCM_A2/CI_A2

TS0_D3

017:A2

H4

C2110
0.1uF

PCM_A0/CI_A0

OPT

22

REXT

W1 CVBS0/RF_CVBS
Y3 VCOM0

OPT

22
22

R162

C152
22pF
OPT

C2105
0.1uF

C199
0.1uF

TESTPIN/GND

PCMD3/CI_D3
PCMD4/CI_D4

TS0_D2

R160

R163

C194
0.1uF

PCMD2/CI_D2

TS0_D1

R161

390

AC9
AB11

22

DBG_TX

C7

R152

009:D7

DBG_RX

A8

G4

AA11

009:E8
009:D8

/F_RB

R216

100

D3.3V_1

N3 CVBS5
M3 CVBS7

22

009:E8

PF_WP

009:B8;009:C6;009:H8

100

R169 OPT

0.1uF

AF6
AA12

AR102

009:B8;009:C6;009:H8

100

100

C127

AE6

EEPROM_SCL

100

R166 OPT
R167 OPT
R168 OPT

B7

K4

R213

009:D7

/PF_CE1

FE_SIF

001:F5;017:A2

I2S_IN_SD

M1 CVBS4/S-VIDEO_Y
M2 CVBS6/S-VIDEO_C

33 OPT AA5
W4
33 OPT
T4
33 OPT

R212
R214

OPT

D8

33 OPT AB15
33 OPT AA10
33 OPT AC8
33 OPT AC7

R208

100

R164 OPT
R165 OPT

AD3
AD1

33 OPT AB18
Y5
33 OPT

R206
R207
R209

AR103

0.1uF

PCMD0/CI_D0
PCMD1/CI_D1

22

R159

AF2

33 OPT AA14

R205

COMP1_R_IN

C142

C168
0.1uF

0

PCM_A14/CI_A14

2.2uF
2.2uF

C141

1%
FE_VMAIN

33 OPT

AV2_R_IN

2.2uF

2.2uF
2.2uF

C140

AUOUTL2/SC2_LOUT

001:B2;001:C3

0.047uF

C112

R116

001:E1

AF1
AUOUTR0/HP_ROUT

AUOUTL1/SC1_LOUT
AUOUTR2/SC2_ROUT

AV1_CVBS_IN

C111

001:B2

001:E2

2.2uF

SPDIF_OUT

AUOUTR1/SC1_ROUT

AV2_CVBS_IN

47
47

001:B2

2.2uF

C135

CH2

U3 CVBS1/SC1_CVBS
U2 CVBS2/SC2_CVBS
T1 CVBS3/SIDE_CVBS

R113

AV1_Y_IN

C134

Y1

W3
SIF0P

K3 HSYNC1/DSUB_HSYNC
K2 VSYNC1/DSUB_VSYNC
L1 RIN1P/DSUB_R

22

R114

R115

LVB_CKM

SIF0M

SPDIF_IN

I2S_OUT_MCK

4

LVB_CKP

016:C2

AA3

5V_HDMI_4

AUOUTL0/HP_LOUT
COMP2_PR

016:C2

AD18

F11

R130

COMPONENT2

0.047uF

C106

001:F2

R2184

PCM_A[7]

/PF_CE0

C104
C105

001:F2
001:F3

DSUB_B

P2 RIN0P/SC1_R
R3 GIN0P/SC1_G

R109
10K

DSUB_R

AE18

AUL0
AE1
AUR1
AF3
AUL1
AE3
AUR2
AUL2 AE2
AA1
AUR3
AB1
AUL3
AB2
AUR4
AC2
AUL4
AB3
AUR5
AC3
AUL5

R1 BIN0P/SC1_B
P3 SOGIN0/SC1_CVBS
P1 RINM

C107

LVB_4M

R2183

C165
330uF
4V

C187
R231

4

AUR0

1000pF

C103

016:C2

AE17

R176
22K

001:B1

0.047uF
0.047uF

LVB_4P

Y11
Y12

A3

20pF

R177
22K

0.047uF

C102

LVB_3P
LVB_3M

016:C2

C160
0.01uF

C101

47
47

LVB_2M

016:C2
016:C2

AF17

OPT

47

R121

LVB_2P

016:C2

AF18

R175
22K

R120

LVB_1M

016:C2

AE19
AD17

C159
0.01uF

COMP1_PB

001:B2

AF19

Y10

AA7

AF7 DDCD_C_CK
AD7 HOTPLUG_C
J3 CEC

001:B1

016:C1

OPT

COMPONENT1

3

COMP1_Y

016:C2

AC6

33 OPT
33 OPT

AB9

N2 HSYNC0/SC1_ID
N1 VSYNC0/SC1_FB
COMP1_PR

LVB_1P

AD19
AF20

LVBCKM

AD10 RXC2N
AE7 DDCD_C_DA

100

LVB_0M

R2182

XIN
XOUT

20pF

R252
1M

B3

HWRESET

C186

USB DOWN STREAM

LVBCKP

AE9 RXC1N
AE10 RXC2P

R145 OPT

LVB_0P

016:C1

33 OPT
33 OPT

R2181

R2172

AD9 RXC0P
AF8 RXC0N
AF9 RXC1P

HDMI_CEC_RX

016:C1

AD20

LVB4M

AE8 RXCCKP
AD8 RXCCKN

002:F1;012:C3

R2179

R174
22K

0
0
100

R144

AE20

D4

33 OPT AC16
33 OPT AA15
33 OPT AA16

R2178

PCM_A[0-7]

C158
0.01uF

R142
R143

LVA_CKM

X100
12MHz

@compC

0
OPT

R187
R2177

OPT

002:F3

LVA_CKP

016:C2

R173
22K

002:F3

LVA_4M

016:C2

AD14

C156
0.01uF
OPT

002:F3

009:F6

LVA_3M

016:C2

AE14

R170
22K

002:F3

HDMI_RX2HDMI_SCL

S6_Reset

IC100
LGE3369A (Saturn6 Non RM)

470

R230

LVA_4P

AE13

C153
0.01uF

HDMI_RX1HDMI_RX2+

016:C3

012:F2

R2180

D3 RXB1N
E3 RXB2P

HDMI_SDA

AF13

LVACKM

C2 RXB0N
D2 RXB1P

002:F3
002:F3

LVA_2M
LVA_3P

016:C2

OPT

2

002:F3
002:F3

LVA_2P

016:C2
016:C2

AF14

LVA4M
LVACKP

C3 RXBCKP
B1 RXBCKN
C1 RXB0P

002:F3

HDMI_RX0+
HDMI_RX0HDMI_RX1+

LVA_1M

016:C2

AE15
AD13

C151
0.01uF
OPT

HDMI

HDMI_CLK-

016:C2

AF15

S6_Reset_IN

1

LVA4P

A2 HOTPLUG_A
002:F3

LVA_1P

2

LVA3M

A1 DDCD_A_DA
B2 DDCD_A_CK

HDMI_CLK+

LVA_0M

016:C2

3

LVA3P

LVA_0P

016:C2

AD15
AF16

5

LVA2M

016:C2

AD16

15K
OPT

LVA1M
LVA2P

G1 RXA1N
H1 RXA2P
H2 RXA2N

AE16

R256

LVA1P

OPT

LVA0P
LVA0M

G2 RXA0P
G3 RXA0N
H3 RXA1P

R254
15K

F1 RXACKP
F2 RXACKN

AVDD_33_2

GND_65

AVDD_33_3

GND_66

AVDD_33_4

GND_67

AVDD_33_5

M7

C204

C205

C202

C203

C214

C207

0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

0.1uF

N7
D3.3V_1

GND_68
GND_69
GND_70

L107

W8

AVDD_DM : 0.03mA

AVDD_DM

GND_71
GND_72
GND_73

AVDD_33 : 281mA

K7
L7

H8

D3.3V_1
L102
BLM18PG121SN1D

BLM18PG121SN1D
C210
C217
0.1uF

AVDD_USB
C192

C208

0.1uF

0.1uF

0.1uF

AVDD_OTG : 22.96mA

JUNO-BOX
MSD3369GV

09

17

LGE Internal Use Only

A

1

B

C

D

F

E

H

MICRO-CONTROLLER

WIRELESS STATUS
INDICATOR
R449

1K

D401

PV
SML-201MT

R450

1K

D402

PV
SML-201MT

R451

1K

R452

4.7K

GPIOD0/HIN1

GPIOE7/VIN1

GPIOD1/HIN2
37

GPIOE6/VIN2

34

GPIOD4/P12/AD6

R430

0

OSCO

4

33

GPIOD5/P13/AD7

R431

22

32

GPIOD6/TXD1

R432

220

MICOM_UART_TXD

31

GPIOD7/RXD1

R433

220

MICOM_UART_RXD

30

GPIOA0/PWM4/P00

R434

100

MICOM_SCL_S

29

GPIOA1/PWM5/P01

R435

100

MICOM_SDA_S

TP404

GPIOB5/SSCL

7

TP405

GPIOB4/P05

8

GPIOB3/P04

9

NEW

D3.3V_EN
PWR_CTRL

MICOM_SCL_M

R411

22

TP406

28

GPIOA2/PWM6/P02

R412

22

TP407

GPIOB2/IR

10

27

GPIOA3/PWM7/P03

R437

OPT

HDMI_CEC_TX

HDMI_CEC_RX

R413

100

GPIOB1/IRQ3/CEC

11

26

GPIOA4/DSCL2

R438

100

FAN_W_DETECT

WIHD_TX_INT

R414

100

GPIOB0/IRQ2

12

25

GPIOA5/DSDA2

R439

100

FAN_W_ONOFF

R415

OPT

R416

4.7K

FRONT_RESETb
FRONT_INT

R417

4.7K

R418

100

004:G3
004:C2
014:F6
014:C5
014:E2
014:E2

OPT
017:F2;017:F4
014:C4
014:C4

24

23

22

R436

004:F5

NC3

DSCL1

20

19

18

17

21

DSDA1

GPIOC0/AD0

GPIOC1/AD1

GPIOC2/AD2

GPIOC3/AD3

16

GPIOC4/P14/RXD0

C401
0.1uF
16V

15

20mA

P5.0V_ST

014:E2

38

3

IR_IN

C400
47uF
16V

014:E2

GPIOE5/P07

GND

IC401
WT61P8-RG480WT

014:G4

4.7K

0

22

R410

R454

0

R429

22

R409

OPT

R428

GPIOD3/P11/AD5

6

MICOM_SDA_M

OPT R453 4.7K

R458
4.7K
GPIOD2/P10/AD4

5

SCL_MCU

R457
4.7K

35

OSCI
22

009:G1

P5.0V_ST

D3.3V_L

36

GPIOB6/SSDA

R408

WIHD_PWR_EN

2

TP403

SDA_MCU

WIHD_TX_RESETb

100

1

14

012:D5
014:G6
002:F1;009:B3
014:G4;009:F5;009:I3

4.7K

1K
100

R427

NC1

13

012:D5

R402

S6_Reset_IN

R425
R426

VDD33V

NC2

009:G8

27K

GPIOC5/P15/TXD0

009:G8

R456
4.7K

R455
4.7K

X400
24MHz
R401

39

NC5

HDMI regulation

48

C404
20pF
50V

C403
20pF
50V

D3.3V_L

GPIOE0/PWM0

D3.3V_L

GPIOE4/LPWM/P06

100

40

0

R407

GPIOE3/PWM3

R406

41

MICOM_RESETb
UART_SELECT

GPIOE2/PWM2

100

42

R405

GPIOE1/PWM1

WIHD_PWR_MNT

43

4.7K

NRST

R404

44

4.7K

45

R403

GPIOC6/P16/IRQ0

012:F5
014:F6

POWER
MONITORING

GPIOC7/P17/IRQ1

017:F4

D5.0V_1

46

D3.3V_1

47

2

D3.3V_L

PV
SML-201MT

D400

3

G

P5.0V_ST
R440

22

R441

22

R442

100

FAN_S_DETECT

R443

100

FAN_S_ONOFF

R444

3.3K

RGB_DDC_SCL
RGB_DDC_SDA

R419

100

R445

3.3K

R420

OPT

R446

6.8K

R421

OPT

R447

6.8K

001:H1
001:H1
014:E4
014:E4

MODEL CONFIGURATION
PRODUCT OPTION ---> ADC2

N7

WIHD I2C (BACK-UP)

N)
MARKET OPTION

N$

N)

0V Jupiter (NOT USED)

3V Juno

---> ADC 3
0V EU OPTION ( KEY INPUT SCART)
3V US OPTION ( TV, COMP1/2, AV1(SVIDEO), AV2, HDMI1/2/3/4, RGB, POWER ON/OFF

4

CHINA FOLOW US OPTION /

EEPROM

SVIDEO HAS PRIOTY THAN AV1

MICOM RESET
D3.3V_L

D3.3V_L

IC400
M24C16-WMN6T

R424
47K

IC402
KIA7029AF

1
R400
47K

TP400

2

3

4

1

8

2

7

3

6

4

5

8

7

6

5

I

TP408
C402
0.1uF
16V

R422
4.7K

R423
4.7K

1

20mA

3

O

TP409

R448

0

MICOM_RESETb

012:C2

2
C405
0.1uF
16V

TP401

MICOM_SCL_M

TP402

MICOM_SDA_M

G

C406
0.1uF
16V

012:C3

012:C3

5

6
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

JUNO-BOX
MICOM

12

17

LGE Internal Use Only

A

B

C

D

F

E

H

G

USB PORT (FRONT)
+5V_USB_1
014:G2

1

TP1106

1

BLM18SG121TN1D
GAS1

GAS1

2

MDS61887701

C1117
0.1uF
16V

C1122
10uF
16V

2

1

GAS2

D1107
ADMC5M03200L
5.6V
OPT

4

MDS61887701

OPT 1000pF

1. Bottom of P1105
2. Between under of JK801 and IC1001

BLM18PG121SN1D
C1124

ADUC30S03010L_AMODIODE
ADUC30S03010L_AMODIODE
OPT 1000pF
ADUC30S03010L_AMODIODE
OPT 1000pF

R1123

MICOM_SDA_S

0

R1124

MICOM_SCL_S

D1105
C1119
BLM18PG121SN1D
C1125

ADUC30S03010L_AMODIODE

2

0
D1104
C1118

6

OPT 1000pF

FRONT_RESETb

012:C4

C1104
330uF
25V

D1108
ADMC5M03200L
5.6V
OPT

D1103

5

7

L1106

5

GAS2

USB_DM
009:I2
USB_DP
009:I2

4

3

2

L1105

NEW

USB DOWN STREAM

SMD Gasket Option

P1100
KJA-UB-4-0004

P5.0V_ST

3

P1103
12507WS-08L

L1102
CB3216PA501E

FRONT I/F

1

FRONT_INT

L1107

012:F3

012:F3

012:C4

D1106

8
D3.3V_2
9

Close to P1103.
IC1101
MIC2009YM6-TR
014:H1

VOUT

+5V_USB_1

6

D5.0V_1

R1106
4.7K
OPT
VIN

1
0.3mA

5

2

4

3

C1109
10uF
10V

GND

C1110
0.1uF

ENABLE
R1109
10K

R1104

180

ILIMIT

FAULT/

Rset=CLF(v)/Iout(A)
1.5A limitation settting

USB_CTL

Iout=2A, CLF=250V
Iout=1A, CLF=243V
R1105
47

USB_OCD

3
WiHD TX I/F
D5.0V_W

FAN I/F For WIRELESS

FAN I/F For SYSTEM
P5.0V_ST

P5.0V_ST

P1102
12507WS-12L

P6.0V

R1128
4.7K
R1121
4.7K
S
Q1101
RTR030P02

012:F3

FAN_W_DETECT

R1125

SMW200-03

FAN_W_ONOFF

R1129
330

5

6

1

2

012:F4

3

012:F4

FAN_S_DETECT

R1130

4

SMW200-03

CIC21J601
L1109
600

1

0

C1123
10uF
16V

0

2

009:F5

3

012:F2

HDMI_RX_RESETb

7

WIHD_TX_RESETb

8

HDMI_RX_INT

9

C
Q1100
2SC3052

B

3
C1121
0.1uF
16V

P1105

D

CIC21J601
L1108
600

C
012:F3

2

TP1105

Q1103
RTR030P02

G
P1104

D

4

L1111
600
OPT

S

G

R1122
330

L1110
600

CIC21J601

CIC21J601

1
P5.0V_ST

P5.0V_ST

C1116
0.1uF
16V

C1120
10uF
16V

FAN_S_ONOFF

E

C1126
0.1uF
16V

Q1102
2SC3052

B

C1127
10uF
16V

E
009:F5;009:I3

WIHD_TX_INT

012:C3;009:F5;009:I3

017:F5;017:F4;009:G8

017:F4;017:H5;009:G8

10

SCL_WIHD

R1126

0

11

SDA_WIHD

R1127

0

12
13

RS-232 Switching
IC1102
MC14053BDR2G

5
001:C4;014:F5
009:F4

012:F3

SYS_UART_RXD
DBG_RX

MICOM_UART_RXD

R1107
R1108

D5.0V_1

0 OPT
0

TP1100

TP1101

Y1

Y0

Z1

1

16

2

15

3

14

L1104

VDD

Y

C1111
47uF
16V

C1113
0.1uF
16V

Z

INH

4

13

5

12

6

11

7

10

8

9

SYS_UART_RXD

X1

X0

A

001:C4;014:C5

IR IN
PV onlY ?

SYS_UART_TXD
R1110

Z0

BLM18SG121TN1D

X

R1111

0
OPT
0

DBG_TX

P5.0V_ST

001:C4

009:F4

R1102

10K

R1103

10

IC1100
TP1103

MICOM_UART_TXD

D5.0V_1

TP1104

TSOP4838SO1

012:F3

012:C3

IR_IN

R1100

220

OUT

1

3

VS

2
VEE

VSS

B

C

R1112

100K

R1118

4.7K

R1119

0
OPT

C1100
30pF
50V
UART_SELECT

GND

C1102
0.1uF
16V

C1103
10uF
25V

012:C2

6
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

JUNO-BOX
SUB

14

17

LGE Internal Use Only

A

1

B

C

D

F

E

G

H

LVDS RECEIVER
009:D2
009:D2
009:D2
009:D2
009:D2
009:D2
009:D2
009:D2
009:D2
009:D2
009:D2
009:D2

Dual input/ LVDS

009:D1

2

009:D1
009:D1
009:D1
009:D2
009:D1
009:D2
009:D2
009:D2
009:D2
009:D2
009:D2

LVB_0M
R932

100

R933

100

R934

100

R935

100

R936

100

R937

100

R938

100

LVB_0P
LVB_1M
LVB_1P
LVB_2M
LVB_2P
LVB_CKM
LVB_CKP

R953

0

R954

0

LVB_3M
LVB_3P
LVB_4M
LVB_4P
LVA_0M
LVA_0P
LVA_1M
R939

100

R940

100

C919
0.1uF
16V

LVA_1P
LVA_2M

LVA_CKM
R941

100

R942

100

R943

100

LVA_CKP

R955

0 OPT

TP902

R956

0 OPT

TP903

LVA_3P
LVA_4M

0 OPT
0

C922
0.1uF
16V

C930
1000pF
50V

C923
0.1uF
16V

C931
1000pF
50V

C924
0.1uF
16V

C932
1000pF
50V

C925
0.1uF
16V

C933
1000pF
50V

RA1-

RA1+

RB1-

RB1+

LVDSVCC_1

LVDSGND_2

RC1-

RC1+

RCLK1-

RCLK1+

LVDSVCC_2

LVDSGND_3

RD1-

RD1+

RE1-

RE1+

LVDSVCC_3

LVDSGND_4

RA2-

RA2+

RB2-

RB2+

LVDSVCC_4

LVDSGND_5

RC2-

RC2+

RCLK2-

RCLK2+

LVDSVCC_5

LVDSGND_1
109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

LVDSGND_6

104

CONT11

103

DE

R957

75

HDMI_TX_VIDEO_DE

102

VSYNC

R958

75

HDMI_TX_VIDEO_VSYNC

101

HSYNC

R959

75

HDMI_TX_VIDEO_HSYNC

100

B19

R960

75 HDMI_TX_VIDEO_B[9]

99

B18

R961

75 HDMI_TX_VIDEO_B[8]

98

GND_12

97

VCC_12

96

MODE0

5

MODE1

6

4.7K

DK

7

4.7K

R_FB

8

R949

4.7K

OE

9

R950

4.7K

MODE2

10

R951

4.7K

MAP

11

VCC_1

12

Dual in / single out Single Edge Output

Output clock: 65Mhz/148mA

160Mhz/263mA

IC900
DTC30LM36

TP905
TP906

GND_1

13

B17

R962

75 HDMI_TX_VIDEO_B[7]

4.7K OPT

R20

14

95

B16

R963

75 HDMI_TX_VIDEO_B[6]

27K

R21

15

94

B15

R964

75 HDMI_TX_VIDEO_B[5]

R22

16

93

B14

R965

75 HDMI_TX_VIDEO_B[4]

R23

17

92

B13

R966

75 HDMI_TX_VIDEO_B[3]

R24

18

91

B12

R967

75 HDMI_TX_VIDEO_B[2]

R25

19

90

B11

R968

75 HDMI_TX_VIDEO_B[1]

R26

20

89

GND_11

VCC_2

21

88

VCC_11

GND_2

22

87

B10

R969

75 HDMI_TX_VIDEO_B[0]

R27

23

86

G19

R970

75 HDMI_TX_VIDEO_G[9]

R28

24

85

G18

R971

75 HDMI_TX_VIDEO_G[8]

R29

25

84

G17

R972

75 HDMI_TX_VIDEO_G[7]

G20

26

83

G16

R973

75 HDMI_TX_VIDEO_G[6]

G21

27

82

G15

R974

75 HDMI_TX_VIDEO_G[5]

VCC_3

28

81

GND_10

VCC_4

29

80

VCC_10

GND_3

30

79

G14

R975

75 HDMI_TX_VIDEO_G[4]

G22

31

78

G13

R976

75 HDMI_TX_VIDEO_G[3]

G23

32

77

G12

R977

75 HDMI_TX_VIDEO_G[2]

G24

33

76

G11

R978

75 HDMI_TX_VIDEO_G[1]

G25

34

75

G10

R979

75 HDMI_TX_VIDEO_G[0]

G26

35

74

R19

R980

75 HDMI_TX_VIDEO_R[9]

G27

36

73

R18

R981

75 HDMI_TX_VIDEO_R[8]

C912
0.1uF
16V

C909
1000pF
50V

C915
1000pF
50V

MODE2 = L
-> DDR (Double Edge Output) Function Disble
DK = L
-> Output Clock Dealy = 0 (MODE = LH)
R/F = L
-> Output Clock Triggering Edge = Falling Edge)
MAP = L or H
-> LVDS Mapping Table = Mode 1(H) or Mode2(L)

C910
0.1uF
16V

C911
1000pF
50V

C913
0.1uF
16V

C917
1000pF
50V

D3.3V_2

L902

CIC21J601
C914
0.1uF
16V

TP904
C916
1000pF
50V

C935
0.1uF
16V

C938
1000pF
50V

C936
0.1uF
16V

C939
1000pF
50V

017:A2

72

C937
1000pF
50V

017:A2

R17

71
GND_9

70
VCC_9

69
R16

68
R15

67
R14

66
R13

65
R12

64
R11

63
R10

62
CLKGND

61

C934
0.1uF
16V

017:A2

C926
1000pF
50V

C918
0.1uF
16V

5
MODE[1:0] = LH
-> Dual-Link (Dual-IN/Single-OUT)

CLKVCC

60
CLKOUT

59
GND_8

58
GND_7

57
VCC_8

56
CONT22

55
CONT21

54
GND_6

53
VCC_7

52
B29

51
B28

50
B27

49
B26

48
B25

47
GND_5

46
VCC_6

45
B24

44
B23

B22

G28

VCC_5

C908
0.1uF
16V

43

EAN60390301
42

C907
1000pF
50V

B21

C906
1000pF
50V

MULTI WITH
THC63LVD1024

41

C905
1000pF
50V

B20

OPT

37

C903
0.1uF
16V

136

CONT12

4.7K

C902
0.1uF
16V

RD2-

VCC_13

105

4.7K

C901
0.1uF
16V

137

PLLVCC_2

106

4

R948

4.7K OPT

RD2+

PLLGND_2

107

3

/PDN

R947

R952

RE2-

108

2

MODE3

R946

R944

138

144

1

PLLVCC_1

R945

R1042

4

C929
1000pF
50V

PLLGND_1

40

HDMI_RES_SEL

MODE setting

R1041
R1043

39

HDMI_TX_RESETb

C904
1000pF
50V

SEL

C942
10uF
6.3V
C900
0.1uF
16V

38

C946
10uF
6.3V

139

CIC21J601
OPT
RE2+

L904

140

TP901

CIC21J601

141

TP900

CIC21J601

L903

142

CIC21J601

L901

143

L900

G29

C944
10uF
6.3V

GND_4

C945
0.1uF
16V

009:F5

C928
1000pF
50V

C921
0.1uF
16V

LVA_4P

C943
0.1uF
16V

017:A3;009:F5

C920
0.1uF
16V

LVA_3M

D3.3V_2

3

C927
1000pF
50V

LVA_2P

R982

75 HDMI_TX_VIDEO_R[7]

R983

75 HDMI_TX_VIDEO_R[6]

R984

75 HDMI_TX_VIDEO_R[5]

R985

75 HDMI_TX_VIDEO_R[4]

R986

75 HDMI_TX_VIDEO_R[3]

R987

75 HDMI_TX_VIDEO_R[2]

R988

75 HDMI_TX_VIDEO_R[1]

R989

75 HDMI_TX_VIDEO_R[0]

R990

75

HDMI_TX_VIDEO_B[0-9]
HDMI_TX_VIDEO_G[0-9]
HDMI_TX_VIDEO_R[0-9]

C940
10pF

HDMI_TX_VIDEO_CLK

017:E1
017:E1

Single output / TTL

017:E3
017:E1

C941
10pF

pAY ATTEMTION ABOUT TTL LINE BOARD DESIGNE TO DEDUCE EMI
1. LINE MUST BE LOACATED IN 1’ST LAYER
6

2. USE GROUND VIA NEAR BY TTL LINE
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

JUNO-BOX
LVDS RX

16

17

LGE Internal Use Only

A

B

C

D

E
HDMI_TX_VIDEO_CLK

HDMI_TX_VIDEO_B[9]

HDMI_TX_VIDEO_B[8]

HDMI_TX_VIDEO_B[7]

HDMI_TX_VIDEO_B[6]

HDMI_TX_VIDEO_B[5]

HDMI_TX_VIDEO_B[4]

HDMI_TX_VIDEO_B[3]

HDMI_TX_VIDEO_B[2]

HDMI TX

1

HDMI_TX_VIDEO_B[1]

HDMI_TX_VIDEO_B[0]

HDMI_TX_VIDEO_B[0-9]

HDMI_TX_VIDEO_G[0-9]

016:G6
016:G5

F

G

H

TO
WIRED HDMI MONITOR OUT

016:G5

HDMI_TX_VIDEO_G[0]
HDMI_TX_VIDEO_G[1]

JK800

HDMI_TX_VIDEO_G[2]

YKF45-7059V

HDMI_TX_VIDEO_G[3]
HDMI_TX_VIDEO_G[4]

D3.3V_2

D1.8V_1

D2+

HDMI_TX_TMDS_TXA2P

017:E4

D2_GND

MCLK

5

TP805

SD3

6

TP806

SD2

7

TP807

SD1

8

SD0

9

MS_LRCK

WS

10

CVCC18_4

D18

D17

D16

D15

D14

D13

D12

D11

D10

D9

GND_4

IDCK

IOVCC33_4

D8

D7

D6

D5

D3

D2

D4

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

HDMI_TX_VIDEO_G[6]

D21

HDMI_TX_VIDEO_G[7]

72

D22

HDMI_TX_VIDEO_G[8]

71

D23

HDMI_TX_VIDEO_G[9]

70

D24

69

D25

68

D26

HDMI_TX_VIDEO_R[0]

67

D27

HDMI_TX_VIDEO_R[1]

66

IOVCC33_3

GND_1

13

63

D28

HDMI_TX_VIDEO_R[2]

IOVCC33_1

14

62

D29

HDMI_TX_VIDEO_R[3]

DCLK

15

61

D30

HDMI_TX_VIDEO_R[4]

DR0

16

60

D31

HDMI_TX_VIDEO_R[5]

DL0

17

59

D32

HDMI_TX_VIDEO_R[6]

DR1

18

58

D33

HDMI_TX_VIDEO_R[7]

DL1

19

57

D34

HDMI_TX_VIDEO_R[8]

DR2

20

56

D35

HDMI_TX_VIDEO_R[9]

DL2

21

55

CVCC18_2

DR3

22

54

GND_2

DL3

23

53

IOVCC33_2

INT

24

52

TMODE

RESET#

25

51

HPD

0x72

D0_GND

C815
0.1uF
16V

HDMI_CEC_TX

CK-

HDMI_TX_SCL
HDMI_TX_SDA

CE_REMOTE

R824

0

R825
R826
R827
R828

2.7K
0
2.7K
0

VR800

AVRL161A1R1NT

VR801

AVRL161A1R1NT

VR802

AVRL161A1R1NT

NC
DDC_CLK
DDC_DATA

+5V
R829

HDMI_TX_HPD1

017:E3;017:F5

HP_DET

0

R820

0 OPT

R821

0

HDMI_TX_HPD
HDMI_TX_HPD1

016:G5

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

R839
15K

C832
0.1uF
16V

20
GND

AVRL161A1R1NT

TO
WIRELESS TX BOARD(DATA)

017:F5
017:F5;017:F2

R819
4.7K

D5.0V_1
D801
ENKMC2838-T112
A1
JK801

D1.8V_1
A2

YKF45-7058V

L806
CIC21J601

TP814
C821
0.1uF
16V

C816
0.1uF
16V

C824
0.1uF
16V

C827
10uF
6.3V

1

HDMI_TX_TMDS_TXB2P

017:E5

C829
0.1uF
16V

2

4

HDMI_TX_TMDS_TXB1P

017:E5
R806
18

3

HDMI_TX_TMDS_TXB2N

017:E5

5

D1.8V_1
R807
680

R808

22

R809

22

SDA_HDMI
SCL_HDMI
D3.3V_2

CIC21J601

CIC21J601

HDMI_TX_TMDS_TXACN

GND

HDMI_TX_VIDEO_R[0-9]
TP817

50

49

47

46

48

CSDA

CSCL

DSDA

CK_GND

3
C814
10uF
6.3V

CK+

HDMI_TX_TMDS_TXACP
L807

C

C809
0.1uF
16V

D0-

VR803

L804
CIC21J601

TP810

CIC21J601

017:E5

017:H5

CI2CA

44

45

DSCL

DDCPWR5V

43

41

40

39

38

37

36

42
PVCC2

AVCC33

AGND_5

AGND_4

TX2+

TX2-

AVCC18_2

AGND_1

26

EAN39308101

017:E4

From LVDS Receiver / TTL

017:H5

TP813

L802

D0+

HDMI_TX_TMDS_TXA0P

HDMI_TX_TMDS_TXA0N

012:F3;017:F4

D1.8V_1

L801

D1-

HDMI_TX_TMDS_TXA1N

017:E5

CVCC18_3

35

R805
4.7K

TP800

D20

73

GND_3

TX1+

R802
4.7K
OPT

HDMI_TX_INT
HDMI_TX_RESETb

74

64

TX1-

R804
4.7K
OPT
TP808

HDMI_TX_VIDEO_G[5]

65

34

R801
4.7K

D19

12

AGND_3

C812
10uF
6.3V

75

11

33

C810
0.1uF
16V

C807
0.1uF
16V

D1_GND

017:E4

SCK

TX0+

C805
0.1uF
16V

IC800
SIL9134CTU

32

C803
0.1uF
16V

D1+

HDMI_TX_TMDS_TXA1P

017:E4

017:E4

CVCC18_1

MS_SCK

D3.3V_2

009:F5

150Mhz: 235mA
251Mhz: 281mA

MS_LRCH

C801
0.1uF
16V

016:C3;009:F5

Clock 27MHz: 107mA
74.25Mhz: 173mA

TX0-

AUDIO_MASTER_CLK

97

4

0
OPT

98

SPDIF

R800

99

TP804

SPDIF_OUT

100

3

31

009:E4
009:E4

2

VSYNC

AVCC18_1

2

HSYBC

30

009:E4

TP802
TP803

TXC+

009:E4

HDMI_TX_VIDEO_HSYNC
HDMI_TX_VIDEO_VSYNC

29

001:F5;009:E3

1

TXC-

016:G3

DE

28

016:G3
016:G3

017:E4
C828
0.1uF
16V

D2-

HDMI_TX_TMDS_TXA2N

D5.0V_1
TP801

HDMI_TX_VIDEO_DE

D1

R803
4.7K

D0

GND_5

C813
0.1uF
16V

CVCC18_5

C811
0.1uF
16V

C808
0.1uF
16V

27

C806
0.1uF
16V

PVCC1

C804
0.1uF
16V

C802
10uF
6.3V

AGND_2

C800
0.1uF
16V

L805
CIC21J601

TP809

CIC21J601

EXT_SWG

L800

HDMI DATA
017:E5

009:G8
009:G8

FROM SDA/SCL0

6

HDMI_TX_TMDS_TXB1N

CH2

7

HDMI_TX_TMDS_TXB0P

017:E5

TP811

8
C817
0.1uF
16V

R812

47K

R813

47K

HDMI_TX_DDC_SCL
TP812

R814

1K OPT

R815

1K

11
017:H5
017:F5

I2C ADDRESS Select
HIGH - 0x76 / 0x7E
LOW
- 0x72 / 0x7A

017:E5
012:F3;017:F2

D3.3V_3

012:C2
014:G4;017:F5;009:G8
L810

C819
0.1uF
16V

C818
0.1uF
16V

4

C820
0.1uF
16V

C822
0.1uF
16V

READY LINE

CIC21J601

014:G5;017:H5;009:G8

12

HDMI_TX_TMDS_TXBCN
HDMI_CEC_TX

R830

0 OPT

WIHD_PWR_MNT

R834

0

SCL_WIHD

R831

0 OPT

SDA_WIHD

R832

0 OPT

CP_1
DO+
D0D1+
D1VDD33_2
SEL
D2+
D2D3+
D3CP_2
VDD33_3
GND_1

5

CP_3
GND_2
A0
GND_3
A1
IN
VDD50
D5.0V_1

EN
L803
CIC21J601

CP_4

C823
0.1uF
16V

C826
0.1uF
16V

R816

1.8K

48

1
2

47

3

46

4

45

5

44
43

6
7

TMDS SW

8

10
11

42
41

9

40

15mA

14
R837

47K

R838

47K

15
16

D5.0V_1
L808

VDD33_1

13

17

IC1201
PI3HDMI1210-ABEX

C825
0.1uF
16V

10

HDMI_TX_TMDS_TXBCP

017:E5
HDMI_TX_DDC_SDA

9

HDMI_TX_TMDS_TXB0N

017:E5

39
38

12

37

13

36

14

35

15

34

16

33

17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

25

D0+A
D0-A
D1+A
D1-A
D2+A
D2-A
D3+A
D3-A

HDMI_TX_TMDS_TXA2P
HDMI_TX_TMDS_TXA2N
HDMI_TX_TMDS_TXA1P
HDMI_TX_TMDS_TXA1N
HDMI_TX_TMDS_TXA0P
HDMI_TX_TMDS_TXA0N
HDMI_TX_TMDS_TXACP
HDMI_TX_TMDS_TXACN

017:F1

D0-B
D1+B
D1-B
D2+B
D2-B
D3+B
D3-B

19

0 OPT

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

R840
15K

C833
0.1uF
16V

017:F1

20

017:F1
017:F2
017:F2

HDMI /TMDS

017:F2
017:F2

I2C Switching
HDMI_TX_TMDS_TXB2P
HDMI_TX_TMDS_TXB2N
HDMI_TX_TMDS_TXB1P
HDMI_TX_TMDS_TXB1N
HDMI_TX_TMDS_TXB0P
HDMI_TX_TMDS_TXB0N
HDMI_TX_TMDS_TXBCP
HDMI_TX_TMDS_TXBCN

017:F3
017:F3

IC802
MC14053BDR2G

017:F3

P5.0V_ST

017:F3
017:F3

017:E4

Y1

HDMI_TX_DDC_SCL

1

16

017:F4
017:F4

014:G4;017:F4;009:G8

Y0

SCL_WIHD

2

15

3

14

4

13

5

12

L809

VDD

017:F4
Y

C831
0.1uF
16V

C830
47uF
16V

CIC21J601
HDMI_TX_SCL

017:F2 TO TV RX MICOM

FROM CH4

VDD33_4

017:F4

HDMI_TX_HPD2

R822

0

GND_5
0B1

R833

017:F1

VDD33_5
D0+B

HDMI_TX_HPD2

017:F5

18

CIC21J601

1

REDAY LINE

017:E3

0B2
017:E3;017:F2

Z

HDMI_TX_HPD

HDMI_TX_HPD1

Z1

R823

0

Z0

TO WIRED MONITO

X

HDMI_TX_SDA

X1

HDMI_TX_DDC_SDA

X0

SDA_WIHD

017:F2

017:E4

TO TV RX MICOM

FROM HDMI_TX NOT USDED?

014:G5;017:F4;009:G8

1B1
1B2
GND_4

INH

VEE

VSS

6

11

7

10

8

9

FROM CH4 FIXED ??? / NORMAL MONITOR NO OPERAITON??

A

B

C

R836

TP818

R835

0

2.7K

HDMI_TX_DDC_SEL

HDMI_TX_SEL

009:F5

017:C6;009:F5

D3.3V_2

TP815

6

017:H6;009:F5

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

HDMI_TX_SEL

R817

1.5K

R818

0
OPT

TP816

JUNO-BOX
HDMI TX

17

17

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Wireless TV Receiver Board

1.Title Sheet
2.RFIC
3.Power
4.Power Supply1
5.Power Supply2
6.BBIC IF
7.BBIC Clock Recovery
8.BBIC Audio / Video Out
9.BBIC Control
10.BBIC Misc
11.BBIC Power/Ground
12.HDMI Tx
13.uController

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
Title Sheet

2009.02.03

1

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

26

6:Y12

6:Y12

6:Y13

6:Y13

6:Y14

6:Y13

6:Y14

6:Y14

HSD1_P

HSD1_N

HSD2_P

HSD2_N

HSD3_P

HSD3_N

HSDOUT

RFMODE_STBY

AL12;6:Y15

6:Y11

6:Y12
HSD0_N

XO_EN

6:Y11

6:Y12

6:Y10

HSCLK_N
HSD0_P

6:Y11

23

HSCS_N

HSCS_P

24

HSCLK_P

25

DVDDIO_VCC3.3V

22
OPT

C239
0.1uF
16V
1005

VCC1.0V(RF)

C203
0.1uF
16V
1005

21

VCC1.2V

VCC1.2V
R202

C206
100pF
50V
1005

B17

A17

B16

A16

B15

A15

B14

A14

B13

A13

B12

A12

C201
100pF
50V
1005

VSSA_5

NC_2

VSSA_4

VSSA_1

VSS_6

VSS_3

VSS_5

VSS_2

XOEN

STBY

VDD_2

VSS_1

VSS_4

B11
VDDIO

A11

B10

VDD_1

HSDOUT

B9

HSD3N

HSD3P

A9
HSD2N

A8

B7

B8
HSD2P

HSD1N

HSD1P

B6

A7
HSD0N

HSD0P

B5

A6
HSCLKN

B4

A4

B3

A3

B2

A5
HSCSN

HSCLKP

HSCSP

SYNTHCAPN

A2

B1

19

SYNTHCAPP

VSSA_3

VCC1.2V

REXT

NC_1

VCC1.2V

VSSA_2

A1

20

A10

4.53K
1%

VCC1.2V

C17

C208
100pF
50V
1005

D16
D17
E16

C207
0.1uF
16V
1005

C209
0.1uF
16V
1005

C211
100pF
50V
1005

C210
4.7uF
6.3V
1608

E17
F16
F17
G16
G17
H16

VCC1.2V

H17
J16
J17
K16

C212
0.1uF
16V
1005

C213
100pF
50V
1005

K17
L16
L17

VCC1.2V

M16
M17
N16
N17
P16

PCLK_P

6:Y16

PCLK_N

6:Y16

C218
100pF
50V
1005

P17
R16

C217
0.1uF
16V
1005

C245
4.7uF
6.3V
1608

R17

NC_9

DVDDIO_VCC3.3V
C214
100pF
50V
1005
OPT

U17

VSSA_30

VSSA_36
T17

VSSA_29

AVDD_XO_+3.3V

U16

T16

VDDARF_22

VDDARF_21

VDDARF_18
U15

T15

U14

VDDARF_17

VSSA_35
T14

VSSA_28
U13

T13

U12

U1

T1

13

VDDHA_2

VDDXO_2
VDDHA_1

VDDXO_1

BBOUTQ_N

VSSA_34

BBOUTQ_P

T12

R2

XTALOUT

REFRES

R1

VSSA_23

U11

BBOUTQ_N

XTALIN

ATB_P

BBOUTQ_P

6:Y17

PCLK_N

VSSA_22

VSSA_24

6:Y18

PCLK_P

BBOUTI_P

T11

14

BBOUTI_N

U10

P2

ATB_N

P1

VSSA_21

REFRESTRIM

N2

VSSA_20

VSSA_19

U9

BBOUTI_P

VDDABB_2

VSSA_18

T10

BBOUTI_N

6:Y18

BBINQ_N

NC_5

6:Y18

N1

VSSA_33

M2

T9

M1

NC_4

BBINQ_N

NC_8

6:Y16

VSSA_17
VDDABB_1

NC_3

C238
0.1uF
16V
1005

L2

VSSA_16

BBINQ_P

U8

C237
100pF
50V
1005

L1

VSSA_15

T8

C246
4.7uF
6.3V
1608

BBINQ_P

VDDARF_14

VSSA_14

U7

15

6:Y16

VSSA_13

BBINI_P

NC_7

K2

T7

K1

VSSA_12
VDDARF_13

U6

BBINI_P

VCC1.0V(RF)

VDDARF_12

BBINI_N

VSSA_27

6:Y17

J2

VSSA_11

VSSA_32

BBINI_N

VSSA_10

T6

6:Y17

J1

IC201
SB9111

VDDHARF_2

U5

16

H2

VDDARF_11

VSSA_26

C235
22uF
10V
3216

VDDARF_10

VDDHARF_1

VDDARF_20

H1
C236
0.1uF
16V
1005

VDDAPL_2

T5

C234
100pF
50V
1005
OPT

VDDARF_9

VDDARF_16

G2

VSSA_9

VDDAPL_1

U4

17

VSSA_8

VSSA_7

T4

G1

VSSA_6

VDDARF_19

F2

VDDARF_8

VDDARF_15

F1

VDDARF_6

U3

E2

VDD_+2.5V_RxicM

VDDARF_7

T3

E1

VDDARF_4

VDDARF_5

VSSA_31

D2

C232
0.1uF
16V
1005

VDDARF_3

VDDARF_2

U2

C233
100pF
50V
1005

C205
0.1uF
16V
1005

C16
VDDARF_1

VSSA_25

D1

NC_6

C2

C230
4.7uF
6.3V
1608

T2

18

C231
0.1uF
16V
1005

C202
4.7uF
6.3V
1608

VCC1.2V

C1
C229
100pF
50V
1005

C204
0.1uF
16V
1005

12

C216
0.1uF
16V
1005

C215
22uF
10V
3216

X203
VDD

TRISTATE/OPEN
1
XO_EN
GND
3
2
54.0000MHz
PARTRON
4

V22;6:Y15

OUTPUT
C244

VCC1.2V

0.1uF
1005
VCC1.2V

VCC1.2V

10

C228
100pF
50V
1005

9

C227
0.1uF
16V
1005

C219
100pF
50V
1005

VDD_+2.5V_RxicM

C240
100pF
50V
1005
OPT

8

1005
1%

TP302

C226
4.7uF
6.3V
1608

1005
1%
R203
3.01K

C225
0.1uF
16V
1005

R201
3.01K

C224
100pF
50V
1005

TP301

11

C221
0.1uF
16V
1005

C220
4.7uF
6.3V
1608

R206
0
1005

VCC1.2V

C241
0.1uF
16V
1005

C223
100pF
50V
1005

C222
0.1uF
16V
1005

7

6

5

4

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
RFIC

2009.02.03

2

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

26

25

24

DVDDIO_VCC3.3V

VCC3.3V

L302
CIC21J601

23

22

21

AVDD_XO_+3.3V

VCC3.3V
3.3uH
L303

20

C301
10uF
16V
3216

19

18

17

VCC2.5V

VDD_+2.5V_RxicM

3.3uH
L304

16

VCC3.3V
C302
10uF
16V
3216

15

IC301
AZ1117R-1.8TRE1
SOT89_3PIN

L311
CIC21J601

INPUT

3

2

VCC1.8VH

OUTPUT

1
C310
10uF
16V
3216

14

C311
10uF
16V
3216

ADJ/GND

C312
10uF
16V
3216

13

VCC3.3V

IOVCC3.3V

VCC1.8VH

L312
CIC21J601

12

C306
4.7uF
2012
10V

C309
4.7uF
10V
2012

11

AVCC1.8V
L308
CIC21J601

10

9

VCC1.8VH

CVCC1.8V

VCC1.8VH

L310
CIC21J601

8

C308
4.7uF
2012
10V

7

PVCC1.8V
L309
CIC21J601

C307
4.7uF
2012
10V

6

5

4

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
Power

2009.02.03

3

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

26

1.0V/3A

1.4V/3.5A
VCC1.4V

VCC1.0V

25

VCC5V

VCC5V

C423

R422

PH1

VCC_2

VCC_1

5

11

FB

VCC5V

C403
1000pF
1005

VCC1.4V
R416
24.9K
1%
1005
R407
1.8K

R405
10K

1608

AGND

C402
1uF
10V
1608

AGND1

C406
2.7pF
1005

220pF
1608

L405
CIC21J601

15

VCC1.0V
R410
24.9K

C410

R401
20K

16

1005

PGND2
16

17

12

270pF

AGND0
C409
3.3pF
1608

PH2

4

1005

C419
10uF
16V
3216

18

FS

IC401
13
SC4624MLTRT

10

1005

PH3

3

9

R418 47K
C412
1uF
10V
1608

10

9

SYNC/EN

SS

1005
R408
1.2K

C405

1005

270pF

1005
1%

17

1005

AGND1

C416
330pF
1608
R411
18K

C413
1000pF
1005

C424

COMP

FB

C401

NC_3

VCC_2

COMP

NC_3

8
NC_2

7

6

NC_1

PGOOD

AGND

1005

VCC5V

R414
10K

AGND0
18

PGND1

14

C404

11

15

2

R404
30K

5

19

C414
10uF
16V
3216

PVIN2
12

1

ISET

8

4

PVIN1

0.047uF

NC_2

VCC_1

IC402
13
SC4624MLTRT

1005

6

FS

3

1005

R417 10K

19

SYNC/EN

20

14

7

2

NC_1

PH1

PGND2
16

ISET

PGOOD

12K

17

PGND1

0.047uF
1005

PH2

15

R403
10K

R415

18

1

SS
C411

1.2pF

C420

PVIN1

1005

1005

19

1005

1005

10K

PH3

PVIN2
R406

20

1.2pF

20

C415

C418
47uF
6.3V
7343

10 1005 22pF 1005

10 1005 22pF 1005

21

R402
10

C407
10uF
16V
3216

1005
R409
10K

L403

2uH
NR8040T2R0N

C422

R419
10 1005

VCC5V

22pF 1005

R421

22

1005
R413
10K

C426
47uF
6.3V
7343

1005

C408
22uF
10V
3216

R412
10

L404

2uH
NR8040T2R0N

VCC5V

C421

23

22pF 1005

R420
10 1005

24

L406
CIC21J601

14
AGND1

AGND0

13

12

3.3V/2A
IC403
SC4215ISTRT

11

2.5V/2A
IC404
SC4215ISTRT

VCC3.3V

VCC5V

VCC2.5V

VCC3.3V
4

NC_2

NC_3

5

4

L407

NC_2

NC_3

5

L408
CIC21J601

CIC21J601

10

EN

VO

ADJ

7

4.7K
1

NC_1

GND

8
1/10W
1%

C428
22uF
10V
3216

VIN

R425
4.7K

C427
0.1uF
16V

9

2

3
1/10W
1%

R423

6
R424
15K

3

R426
C425
0.1uF
16V

C417
47uF
6.3V
7343

C431
0.1uF
16V

C430
22uF
10V
3216

2

VIN

VO

EN

ADJ

NC_1

GND

6

7

4.7K
1

8

C432
0.1uF
16V

C429
47uF
6.3V
7343

8

7

6

5

4

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
Power Supply1

2009.02.03

4

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

26

25

24

23

22

21

20
VCC1.0V(RF)

IC501

19

VCC1.2V

VCC1.4V

VCC5V

SC338IMSTRT

Q501
DRV1

1

10

2

9

3

8

IN

SI4804BDY

18
ADJ1

ADJ2

G1

@compC

8

2

7

3

6

4

5

D1_2

C513
0.1uF
16V
1005

C503
4.7uF
10V
2012

C514
47uF
6.3V
7343

D1_1

15

C510
1uF
6.3V
1005

C508
10uF
6.3V
1608

C509
0.1uF
16V
1005

C511
47uF
6.3V
7343

D2_1

1005
1%

C504
0.01uF
25V
1005

R501
15K

C505
0.1uF
16V
1005

C506
0.01uF
25V
1005

D2_2

R502
10K

R506
4.7K
1005

G2

1005
1%

4.7K
1005

1005
1%

6

PGD2

R504
12K

5

7

R510
10K

4

S2

1005
1%

GND

16

14

1

VCC3.3V
R508

EN2

R503
2K

R505
4.7K
1005

EN1

PGD1

1005

4.7K
1005

S1

R509
2K

R507
17

DRV2

1005

VCC3.3V

C501
1uF
6.3V
1005

C502
10uF
6.3V
1608

C507
0.1uF
16V
1005

C512
47uF
6.3V
7343

13

12

11

10

9

8

7

6

5

4

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
Power Supply2

2009.02.03

5

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

L

M

N

O

P

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

26

25

24

23

22

21

20

IC601
SB9121

19

Baseband I/F
R22
ADCI_P
18

R21

ADCI_N
U21
ADCQ_P

U22

ADCQ_N
L22
Analog

17

DACI_P

L21

DACI_N
N21
DACQ_P

N22

DACQ_N
N19
PCLK_P

M19

PCLK_N
H19

BBOUTI_P

2:N14

BBOUTI_N

2:N15

BBOUTQ_P

2:N14

BBOUTQ_N

2:N14

BBINI_P

2:N16

BBINI_N

2:N16

BBINQ_P

2:N15

BBINQ_N

2:N15

PCLK_P

2:AA15

PCLK_N

2:AA14

XO_EN

2:V22;2:AL12

R601
3.01K

REFRES
1005
1%
E20
XOEN

D20

STBY
F20
HSDOUT
D21
Digital

HSD3_P

D22

HSD3_N
E21
HSD2_P

E22

HSD2_N
F21
HSD1_P

F22

HSD1_N
G21
HSD0_P

G22

HSD0_N
H21
HSCLK_P

H22

HSCLK_N
J21
HSCS_P
HSCS_N

J22

RFMODE_STBY

2:V22

HSDOUT

2:U22

HSD3_P

2:T22

HSD3_N

2:T22

HSD2_P

2:T22

HSD2_N

2:T22

HSD1_P

2:S22

HSD1_N

2:T22

HSD0_P

2:S22

HSD0_N

2:S22

HSCLK_P

2:S22

HSCLK_N

2:S22

HSCS_P

2:R22

HSCS_N

2:R22

7

6

5

4

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
BBIC IF

2009.02.03

6

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

26

X701
27MHz

25
X-TAL_1
VCC3.3V

4

2

3

GND_1

X-TAL_2

R720
4.7K

XIN/CLK

1005

R702
4.7K

R705
4.7K

1005

22

1005

R701
4.7K

1005
OPT

1

16

2

15

3

14

4

13

5

12

6

11

7

10

S0
C711
4.7uF

1

6

2

5

3

4

VOUT

L701
CIC21J601

6.3V

VDD

R703
1K

VCTR

S1/SDA

R706
1.2K

L703
CIC21J601

20

C702
1nF
50V
1005

C713 C705
4.7uF 0.1uF
6.3V 16V
1005

Y4
C703
0.1uF
16V
1005

C701
0.1uF
16V
1005

Y5

R721
22

IC601
SB9121

VDDOUT_1

Clock Recovery

8

9

C10

VCLK_27

VDAC_SDA

9:I14

GPIO5

9:I14

VCLK_IN

K17

GPIO4

9:I14

R704
47

Y1

1005
C714
150pF
50V

GND_2

C715
150pF
50V
OPT

Y2

Y3

VCC3.3V

VDDOUT_2

1005

VDD

GND_1

VCC3.3V

VCC3.3V
1005

SDA

GND

GPIO6
S2/SCL

1005

21
SCL

1005

XOUT

VCC1.8VH

IC701
AD5622BKSZ-2500RL7

ADDR

R708
4.7K

R707
4.7K

23

IC702
CDCE925PWR

1005
OPT

VCC3.3V

1005
R709
4.7K

MAIN: SUNNY / SUB: PARTRON

24

19

VCC3.3V
GND_2

1

C704
0.1uF
16V
1005

K17

18
A9
VDAC_SCL

C11

17

VCLK27

B9

VCLK

B13
ACLK

A13

ACLK27

VCLK_27

Z18

VCLK_IN

AF21

ACLK_IN

AF9

ACLK_27

Z6

A14

X702
27MHz

ADAC_SDA
X-TAL_1

C13
ADAC_SCL

VCC3.3V

1

4

2

3

GND_1

VCC3.3V
GND_2
X-TAL_2

XIN/CLK

1005

R715
4.7K

R710
4.7K

1005

R716
4.7K

1005

VCC1.8VH
C712
1uF

IC703
AD5622BKSZ-2500RL7

ADDR

1

6

2

5

VOUT

S0

L702
CIC21J601

6.3V

VDD

R711
14K

VCTR

1

16

2

15

3

14

4

13

5

12

6

11

7

10

S1/SDA

S2/SCL

VDD

R712
16K

GND_1

VCC3.3V

VDDOUT_1

C707
C716
4.7uF 0.1uF
16V
6.3V
1005

Y4
C706
0.1uF
16V
1005

Y5

R722
22

C709
0.1uF
16V
1005

OPT
C708
0.1uF
16V
1005

8

9

9:I14

ACLK_IN

K15

R718
22

Y1

GND_2

Y2

Y3

VCC3.3V

VDDOUT_2

C710
0.1uF
16V
1005

1005

4

VCC3.3V
L704
CIC21J601

1005 1005
1%
1%

3

GPIO3

1005

GND

R723
1K

SDA

1005

XOUT

1005
SCL

1005
R714
4.7K

IC704
CDCE925PWR

R719
4.7K
1005
OPT

R713
4.7K

VCC3.3V

1005
OPT

R717
4.7K

MAIN: SUNNY / SUB: PARTRON

ACLK_27

K15

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
BBIC Clock Recovery

2009.02.03

7

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

IC601
SB9121
Audio I/O
P1

TP804

SPDIFO

M3
TP803

SD3

C12
CLK27

SD2
SD1

TP805

M2

TP806

M1

TP807

L1

AUDIO_SD0

SD0
AR806
MCLKO
LRCK
SCK

N2
N1
P2

12:E17

22 2010_A4

L3

AUDIO_MCLK

12:E17

AUDIO_WS

12:E16

AUDIO_SCLK

12:E16

VIDEO_D35

12:S14

VIDEO_D34

12:S15

VIDEO_D33

12:S15

VIDEO_D32

12:S15

VIDEO_D31

12:S15

VIDEO_D30

12:S15

VIDEO_D29

12:S16

VIDEO_D28

12:S16

VIDEO_D27

12:S17

VIDEO_D26

12:S17

TP808

MUTE

IC601
SB9121
Video Out
K1
D35
D34
D33
D32
D31
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
ODCK
D8
D7
D6
D5
D4
D3
D2
D1
D0
DE
HSYNC

AR801

47

2010_A4

K2
K3
J1
J2

AR802

47

2010_A4

J3
H1
H2
AR803

H3

47

2010_A4

G1
G2

VIDEO_D25

G3
AR804

F1

47

2010_A4

F2
F3
E1
AR805

E2

47

2010_A4

E3
D1
D2
AR811

D3

47

2010_A4

C1
C3
A3
AR807

C4

47

2010_A4

B4
A4
C5

4

12:S18

VIDEO_D21

12:S18

VIDEO_D20

12:S18

VIDEO_D19

12:S18

VIDEO_D18

12:N23

VIDEO_D17

12:N23

VIDEO_D16

12:N23

VIDEO_D15

12:M23
12:M23

VIDEO_D13

12:M23

VIDEO_D12

AA6;12:M23

VIDEO_D11

12:M23

VIDEO_D10

12:L23

VIDEO_D09

12:L23

VIDEO_D08

12:K23

VIDEO_D07

12:K23

VIDEO_D06

12:K23

VIDEO_D05

12:K23

VIDEO_CLK
AR808

C6

47 2010_A4

B6
A6
C7

AR809

47 2010_A4

VIDEO_D04

12:K23

A7

VIDEO_D03

U6;12:J23

C8

VIDEO_D02

P6;12:J23

B7

B8

AR810

A8

VIDEO_D01

47 2010_A4

C9

X9;12:J23

PD : lmac_1pbk disabled

12:L23

C800
150pF
50V OPT

12:J23

VIDEO_D00

12:J23

VIDEO_DE

12:E18

VIDEO_HSYNC

12:E18

VIDEO_VSYNC

12:E18

R803
4.7K
VIDEO_D03

1005
OPT

PD : hw umac disabled

VIDEO_D22

R804 47

A5

R802
4.7K
VIDEO_D02

12:S17

B5

VSYNC

1005
OPT

12:S17

VIDEO_D23

VIDEO_D14

Note Special Routing

R801
4.7K

12:S17

VIDEO_D24

X9;12:J23

VIDEO_D12

X12;12:M23

1005
OPT

PD : 6bit DAC

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
BBIC Audio/Video Output

2009.02.03

8

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

26

25

24

23

VCC3.3V
22

21

1005

R906
4.7K

VCC3.3V

IC901
MX25L1605DM2I-12G

VCC3.3V
CS#

SO/SIO1

8

2

7

3

6

4

5

C902
0.1uF
16V
1005

VCC

HOLD#

VCC3.3V
WP#/AGC

1005

R920
0

IC601
SB9121

1005

1005
R913
4.7K

1005
R914
4.7K

1005
R915
4.7K

R916
4.7K

20

GND

SCLK

SI/SIO0

Control

19
L2

W2

VCC3.3V
18

W3
Y2
Y3
AB7

CS0

RSVD_3

SDI

RSVD_4

SDO

RSVD_5

SCLK

RSVD_8

INT

B11
A11

16

A10

TP909

B10

TP908

B15

TP911

C14

TP913

A15

TP912

15

B14

TP914
7:AF22

TP915
GPIO6

7:AF22

GPIO5

7:AF10

GPIO4

7:AF10

GPIO3

Y9
AB8
AA9
Y10
AB9
AA10
VCC3.3V

AB10
Y11

GPIO[15]

13:L9;13:AH8

BB_RSTN

Y7

VSS_130

GPIO[11]
GPIO[10]

R909

4.7K 1005

R908

OPT 4.7K 1005

R907

OPT 4.7K 1005

R922

4.7K 1005

12:N7;12:Z14;13:W14;13:AH10

I2C_SDA

12:N7;12:Z14;13:W14;13:AH10

BB_INTN

13:W16;13:AH9

ADDR = 0xBx

GPIO[9]
GPIO[8]
GPIO[7]

B12

GPIO[6]

SXTALI

GPIO[5]

SXTALO

VCC3.3V

ADDR = 0xAx

A12

GPIO[4]
R919
1M 1%

GPIO[3]
GPIO[2]
GPIO[1]

AA6

C904
3.3nF
50V

AB5

I2C_SCL

GPIO[12]

RST#

12

Y8

GPIO[13]

GPIO[0]

1005

AA7

GPIO[14]

13
R936
4.7K

AA5

AB6
SCL
SDA

TP910

@compC

TP902

Y5

RSVD_7

I2CSEL

TP907

SPI_CS0N

Y4

RSVD_6

RSVD_9

TP906

AA4

R911
4.7K

R903
4.7K

TP905

CS1

RSVD_2

1005

1005
R935
4.7K

1005
R933
4.7K

1005
R931
4.7K

1005
R932
4.7K

1005
R934
4.7K

1005
R929
4.7K

1005
R930
4.7K

R927
4.7K

1005
R928
4.7K

1005

1005
R926
4.7K

1005
R924
4.7K

R923
4.7K

1005
R925
4.7K

1005

AA8
17

Y6
RSVD_1

1005
OPT

V3

1005
1005

N3

1005

TP904

R921 R910
300 1% 1K 1%

TP903

14

1

X901
3.68MHz

C901
30pF
1005

C903
30pF
1005

11
Crystal matching
27pF -> 30pF

10

9

8

7

6

5

4

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
BBIC Control

2009.02.03

9

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

26

25

24

23

22

IC601
SB9121
21

Misc
R4
P4

C15
VSS_97

NC_11

VSS_83

NC_1
NC_6

20

NC_12

R1
R2
P3
T1
U1

19

T2
R3
V1
U2
W1

18

VCC3.3V

VSS_94

NC_2

VSS_95

NC_7

VSS_82

NC_13

VSS_108

NC_3

VSS_120

NC_8

VSS_109

NC_14

VSS_96

NC_4

VSS_123

NC_9

VSS_121

NC_15

VSS_125

NC_5
NC_10
NC_16

T3
V2
Y1
17

U3

VDDIO_26

NC_20

VDDIO_27

NC_21

VDDIO_28

NC_24

VSS_122

NC_23
NC_22
NC_36
NC_35

M20
NC_17

16

NC_34
NC_33
NC_44
NC_32

L19
VSSA_11

NC_43
NC_52

15

NC_31
NC_42

K19
VSSA_7

NC_51
NC_30
NC_41

14

NC_50

T20
NC_19

NC_29
NC_40
NC_49

13

NC_28

R19
NC_18

NC_39
NC_48
NC_27

AA11
W12
12

VSS_135

NC_38

VSS_128

NC_47
NC_26
NC_37
NC_46

A16
B16
C16
A17
B17
C17
A18
B18
C18
A19
B19
C19
A20
B20
C20
U20
V20
W22
W21
W20
Y22
Y21

Interface is NC

Y20
Y19
AA19
Y18
AA18
AB18
Y17
AA17
AB17
Y16
AA16
AB16
Y15
AA15
AB15
Y14
AA14
AB14
Y13
AA13
AB13
Y12
AA12
AB12
AB11

NC_45
11

10

9

8

7

6

5

4

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
BBIC Misc

2009.02.03

10

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

VCC1.0V(RF)
26

IC601
SB9121
25

IC601
SB9121

VCC1.0V

V11
V10
V9
V8
W5
W4
V5
V4
U5
U4
T5
T4
N5
N4
M5
M4
L5
K5
J5
J4
H5
H4
E19
E18
E15
E14
E13
E12
E11
E10
E7
E6
E5
E4
D19
D18
D15
D14
D11
D10
D9
D8
D7
D6
D5
D4

L16

23

22

21

20

19

18

17

16

L14

V12
VDD_50

VDD_51

VDD_49

VDD_52

VDD_48

VDD_53

VDD_47

VDD_54

VDD_56

VDD_57

VDD_55

VDD_58

VDD_46

VDD_59

VDD_45

VDD_60

VDD_43

VDD_61

VDD_42

VDD_62

VDD_41

VDD_63

VDD_40

VDD_64

VDD_38

VDD_65

VDD_37

VDD_25

VDD_36

VDD_26

VDD_35

VDD_32

VDD_34

VDD_27

L13

V13

L12

V16

L11

V17

L10

W8

L9

W9

L8

W13

L7

W14

K16

W15

K15

W16

K14

W17

K13

W18

K12

W19

K11

F18

K10

F19

K9

J18

K8

G18

VDD_33

K7
J16

VCC3.3V

J15

VDD_31
VDD_30

J14

E8

VDD_29

VDDIO_5

VDD_28

VDDIO_6

VDD_24

VDDIO_1

VDD_23

VDDIO_2

VDD_22

VDDIO_3

VDD_21

VDDIO_4

VDD_20

VDDIO_7

VDD_19

VDDIO_8

VDD_18

VDDIO_9

VDD_17

VDDIO_10

VDD_16

VDDIO_11

VDD_15

VDDIO_12

VDD_14

VDDIO_13

VDD_13

VDDIO_14

VDD_12

VDDIO_15

VDD_11

VDDIO_16

VDD_10

VDDIO_18

VDD_9

VDDIO_19

VDD_8

VDDIO_22

VDD_7

VDDIO_23

VDD_6

VDDIO_24

VDD_5

VDDIO_25

VDD_4

VDDIO_20

VDD_3

VDDIO_21

VDD_2

VDDIO_17

IC601
SB9121

L1101

L15

24

L1103
120-ohm

VCC1.0V

VCC1.0V

J13

E9

J12

D12

J11

D13

J10

D16

J9

D17

J8

E16

J7

E17

H16

F4

H15

F5

H14

G4

H13

G5

H12

K4

H11

L4

H10

P5

H9

R5

H8

V6

H7

V7

G16

W6

G15

W7

G14

W10

G13

W11

G12

V14

G11

V15

G10

U19

G9
G8

VDD_1
15

G7
A2
B1
B2
B3

14

C2
A21
A22

SB9121 Bypass Caps

B21
B22

13

C21
C22

VCC3.3V

AA20

VSS_119

VSS_60

VSS_118

VSS_59

VSS_117

VSS_58

VSS_116

VSS_57

VSS_115

VSS_56

VSS_114

VSS_55

VSS_113

VSS_54

VSS_112

VSS_53

VSS_111

VSS_52

VSS_110

VSS_51

VSS_107

VSS_50

VSS_106

VSS_49

VSS_105

VSS_48

VSS_104

VSS_47

VSS_103

VSS_46

VSS_102

VSS_45

VSS_101

VSS_44

VSS_100

VSS_43

VSS_99

VSS_42

VSS_98

VSS_41

VSS_93

VSS_40

VSS_92

VSS_39

VSS_91

VSS_38

VSS_90

VSS_37

VSS_89

VSS_36

VSS_88

VSS_35

VSS_87

VSS_34

VSS_86

VSS_33

VSS_85

VSS_32

VSS_84

VSS_31

VSS_81

VSS_30

VSS_80

VSS_29

VSS_79

VSS_28

VSS_78

VSS_27

VSS_77

VSS_26

VSS_76

VSS_25

VSS_75

VSS_24

VSS_74

VSS_23

VSS_73

VSS_22

VSS_72

VSS_21

VSS_71

VSS_20

VSS_70

VSS_19

VSS_69

VSS_18

VSS_68

VSS_17

VSS_67

VSS_16

VSS_66

VSS_15

VSS_65

VSS_14

VSS_64

VSS_13

VSS_63

VSS_12

VSS_62

VSS_1

VSS_131

VSS_4

VSS_132

VSS_5

VSS_133

VSS_6

VSS_139

VSS_9

VSS_140

VSS_2

VSS_141

VSS_3

VSS_142

VSS_7

VSS_147

VSS_8

VSS_146

VSS_10

VSS_145

VSS_11

VSS_144

VSS_136

VSS_138

VDDA_1.0V_BBic

120-ohm

T16
VSS_61

T15

OPT

T14
C1103
22uF
10V
3216

T13
T12
T11

C1105
0.1uF
16V
1005

C1102
0.1uF
16V
1005

C1101
0.01uF
25V
1005

T10
T9
T8
T7
R16

R11
R10
R9

P19
P20

VDDA_1
VDDA_2
VDDA_3
VDDA_4

K18
L1102
120-ohm

L18
VDDHA_2.5V_BBic

P18
R18

R14
R12

N18

VCC2.5V

R15
R13

M18

T18
C1108
22uF
10V
3216

C1110
0.1uF
16V
1005

C1109
0.1uF
16V
1005

C1106
0.1uF
16V
1005

C1107
0.01uF
25V
1005

T19
U18
V18
V19

VDDHA_1
VDDHA_2
VDDHA_3
VDDHA_4
VDDHA_5
VDDHA_6
VDDHA_7
VDDHA_8
VDDHA_9

R8
R7
P16
P15
P14
P13
P12
P11
P10
P9
P8
P7
N16
N15
N14
N13
N12
N11
N10
N9
N8
N7

G19
G20
H18
H20
J19
J20
K20
K21
K22
L20
M21
M22
N20
P21
P22
R20
T21
T22
V21
V22

VSSA_1
VSSA_2
VSSA_3
VSSA_4
VSSA_5
VSSA_6
VSSA_8
VSSA_9
VSSA_10
VSSA_12
VSSA_13
VSSA_14
VSSA_15
VSSA_16
VSSA_17
VSSA_18
VSSA_19
VSSA_20
VSSA_21
VSSA_22

M16
M15
M14
M13
M12
M11
M10
M9
M8
M7
AA1
AA2
AA3
AB1
AB2
AB3
AB4
AB22
AB21
AB20
AB19
AA22
AA21

VSS_137
12

C1120
10uF
10V
2012

C1104
10uF
10V
2012

C1112
0.1uF
16V
1005

C1111
0.1uF
16V
1005

C1114
0.1uF
16V
1005

C1113
0.1uF
16V
1005

C1115
0.1uF
16V
1005

C1116
0.1uF
16V
1005

C1117
0.1uF
16V
1005

C1118
0.1uF
16V
1005

C1119
0.1uF
16V
1005

C1124
0.1uF
16V
1005

C1123
0.1uF
16V
1005

C1128
0.1uF
16V
1005

C1121
0.1uF
16V
1005

C1127
0.1uF
16V
1005

C1130
0.1uF
16V
1005

C1126
0.1uF
16V
1005

C1129
0.1uF
16V
1005

C1125
0.1uF
16V
1005

C1139
0.1uF
16V
1005

C1138
0.1uF
16V
1005

C1131
0.1uF
16V
1005

C1136
0.1uF
16V
1005

C1134
0.1uF
16V
1005

C1135
0.1uF
16V
1005

C1132
0.1uF
16V
1005

C1133
0.1uF
16V
1005

C1140
0.1uF
16V
1005

C1146
0.1uF
16V
1005

C1145
0.1uF
16V
1005

C1144
0.1uF
16V
1005

C1142
0.1uF
16V
1005

C1150
0.1uF
16V
1005

C1151
0.1uF
16V
1005

C1148
0.1uF
16V
1005

C1149
0.1uF
16V
1005

C1147
0.1uF
16V
1005

11

VCC1.0V
10

9

C1122
10uF
6.3V
1608

8
VCC1.0V

7

C1137
10uF
6.3V
1608

6

VCC1.0V
5

4

C1143
10uF
6.3V
1608

C1141
10uF
10V
2012

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx

BBIC Power/Ground

2009.02.03

11

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

8:X13

8:X12

8:X12

8:X12

8:X12

8:X12;8:AA6

8:X11

8:X11

8:X11

8:X13
VIDEO_D18

VIDEO_D17

VIDEO_D16

VIDEO_D15

VIDEO_D14

VIDEO_D13

VIDEO_D12

VIDEO_D11

VIDEO_D10

8:AB10

VIDEO_D09

8:X10

8:X10

8:X10

8:X9

8:U6;8:X9

8:P6;8:X9

8:X9

8:X10

VIDEO_CLK

VIDEO_D08

VIDEO_D07

VIDEO_D06

VIDEO_D05

VIDEO_D04

VIDEO_D03

24

VIDEO_D02

VIDEO_D00

25

VIDEO_D01

8:X9

26

D1201
RCLAMP0524P
23

D1202
RCLAMP0524P

IOVCC3.3V
IN1

C1212
0.1uF
16V
1005

22

C1208
0.1uF
16V
1005

C1202
10uF
3216

IN2

C1209
0.1uF
16V
1005

GND1

1

10

2

9

3

8

OUT1

IN1

OUT2

IN2

GND2

GND1

OUT3

IN3

OUT4

IN4

1

10

2

9

3

8

4

7

5

6

OUT1

OUT2

GND2

Near Video_clk
IN3
21
CVCC1.8V

PVCC1.8V

CVCC18_4
76

D18
77

D17
78

79

D16

D15
80

D14
81

D13
82

D12
83

D10

D11
84

85

D9
86

87

GND_4

IDCK
88

IOVCC33_4
89

D8
90

D7
91

92

14

62

D29

DCLK

15

61

D30

DR0

16

60

D31

DL0

17

59

D32

DR1

18

58

D33

19

57

D34

VIDEO_D30 8:X15
VIDEO_D31 8:X15
VIDEO_D32 8:X16

25

51

HPD

JK1

Tx_2+

L11

Tx_2-

L11

Tx_1+

K11

Tx_1-

K11

Tx_0+

K11

Tx_0-

1
2
3
4
5
6
7

9
J11

Tx_CLK+

J11

Tx_CLK-

10

VIDEO_D33 8:X16
VIDEO_D34 8:X16

13:W12

I2C_SCL1

VIDEO_D35 8:X16

9:AA17;N7;13:W14;13:AH10

I2C_SCL

R1210

Tx_SCL

N7

Tx_SDA

9:AA17;N7;13:W14;13:AH10

I2C_SDA

13:W12

I2C_SDA1

S13

Tx_HPD

4.7K
Tx_HPD
R1205
4.7K

50

1005

Z13

11

OPT
0 1005
R1220

0 1005
OPT R1218
0 1005
OPT R1225
0 1005
R1219

OPT
R1202
1005
1%

UART0_TXD

13:U14

UART0_RXD

HDMI_CEC

CEC

13

1005
14
R1222
1005

SCL
SDA

15
16
17

0 1005
R1216
OPT

VCC5V

VCC5V

0 1005

Tx_HPD

18
19
20

1K 1005

1608

13:U14

0

BODY_SHIELD

Stuff Option
Address

CI2CA=High

CI2A=Low

AVRL161A1R1NT
VA1201

R1217
18

12

R1221
0

R1203

M7

VCC3.3V

1K 1005

CSDA

CI2CA

CSCL

DSDA

DSCL

DDCPWR5V

AVCC33

AGND_5

PVCC2

AGND_4

TX2+

TX2-

AVCC18_2

TX1+

TX1-

49

RESET#

48

TMODE

47

IOVCC33_2

52
46

53

24
45

23

INT

44

DL3

43

GND_2

42

54

41

22

40

DR3

39

CVCC18_2

38

55

37

21

36

56

DL2

35

20

D35

R1204
680

OUT4

VIDEO_D27 8:X15

VIDEO_D28 8:X15
VIDEO_D29 8:X15

DR2

First Device Address
Second Device Address

0x76
0x7E

AVRL161A1R1NT AVRL161A1R1NT

AVRL161A1R1NT

VA1202

VA1204

VA1203

0x72
0x7A

Tx_2+

Tx_2-

R1209

Z19

Z19

Tx_1+
Z18

Tx_0+

Tx_CLK+

Tx_1Z18

C1204
0.1uF
16V
1005

Z16

Tx_CLK-

VCC3.3V

Z15

9

D6

IOVCC33_1

10

C1203
10uF
10V
2012

D5

D28

R1207

C1210
0.1uF
16V
1005

93

63

VCC5V

L1201

CIC21J601

11

D4

13

AVCC1.8V
12

94

95

D3

D2

64

GND_1

C1213
3.3nF
50V
ESD

6

8

12

CVCC18_3

AGND_1

1005
OPT

D1

GND_3

11

AGND_3

4.7K
1005

1005

1005
R1214
4.7K

R1206
4.7K

13

D0

65

SCK

VIDEO_D25 8:X14
VIDEO_D26 8:X14

CVCC18_1

Z17

HDMI_RSTN

96

IOVCC33_3

10

26

HDMI_INTN

13:L9;13:AH8

R1201

OPT
R1213
4.7K
13:W16;13:AH9

CVCC18_5

66

9

WS

DL1

14

97

67

D27

34

VCC3.3V

98

D26

33

16

15

68

IC1201
SIL9134CTU

8

TX0+

AUDIO_SCLK

D25

TX0-

8:X19

69

Tx_0-

8:X20

AUDIO_WS

70

7

Z17

AUDIO_SD0

6

SD0

5

OUT3

VIDEO_D23 8:X14
VIDEO_D24 8:X14

SD2

32

8:X20

D23
D24

SD1

TP1204

71

AVCC18_1

17

5

VIDEO_D21 8:X13
VIDEO_D22 8:X14

SD3

31

TP1203

D22

TXC+

TP1202

7

C1207
0.1uF
16V
1005

VIDEO_D19 8:X13
VIDEO_D20 8:X13

1005

MCLK

AUDIO_MCLK

72

30

8:X20

4

SPDIF

TXC-

TP1201

D21

29

VIDEO_VSYNC

D20

73

AGND_2

8:X8

74

3

VSYNC

4

YKF45-7060V

2

HSYBC

28

VIDEO_HSYNC

C1201
10uF
16V
3216

L11

D19

1

27

8:X8

C1205
0.1uF
16V
1005

75

DE

PVCC1

VIDEO_DE

EXT_SWG

18

8:X8

99

19

100

GND_5

20

IN4

OPT

4.7K 1005

R1208

OPT 4.7K 1005

R1212

4.7K 1005

R1211

4.7K 1005

AVCC1.8V

3

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

0 1005
I2C_SCL

I2C_SDA
9:AA17;Z14;13:W14;13:AH10

4

9:AA17;Z14;13:W14;13:AH10

5

2

R1224
Z14

6

Tx_SDA

C1206
0.1uF
16V
1005

Z14

C1211
10uF
10V
2012

Tx_SCL

7

R1223
0 1005

8

W-TV Rx
HTMI Tx

2009.02.03

12

13

LGE Internal Use Only

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

AA

AB

AC

AD

AE

AF

AG

AH

AI

AJ

AK

AL

AM

AN

AO

29

28

27

VCC5V

UBW3216-121
L1301

26

25

P1302
12507WS-08L

SML-201MT
LD1303 1005
1K

VCC3.3V

1005

23
R1302
0

R1310

24

1

2

3
R1309
OPT

4

0
1005

22

C1307
0.1uF

C1308
0.1uF

C1306
150uF
6.3V
7343

C1304
150uF
6.3V
7343

5

6
21
7
SML-201MT
R1305
470

20

C1303
22uF
10V
3216

C1302
0.1uF
1005

LD1302

8

1005

PMA3/SDO2/CN10/RG8

6

43

IC2/U1CTS/INT2/RD9

MCLR

7

42

IC1/RTCC/INT1/RD8

PMA2/SS2/CN11/RG9

8

41

VSS_3

VSS_1

9

40

OSC2/CLKO/RC15

34

U1RX/SDI1/RF2

16

33

U1TX/SDO1/RF3

7

HDMI_INTN

12:E14;AH9

BB_INTN

9:AA16;AH9

I2C_SCL

9:AA17;12:N7;12:Z14;AH10

R1315
0 1005

VCC3.3V

I2C_SDA

R1316
0 1005
UART0_RXD

12:AH14

UART0_TXD

12:AH15

9:AA17;12:N7;12:Z14;AH10

P1301

32

12507WS-15L

F15

/MCLR

1

J10

RB7/AN7

2

J10

RB6/AN6

3

M9

UART1_TXD

4

L9

UART1_RXD

5

9:AA17;12:N7;12:Z14;W14

I2C_SCL

6

9:AA17;12:N7;12:Z14;W14

I2C_SDA

7

12:E14;W16

HDMI_INTN

8

UART1_TXD

9:AA16;W16

BB_INTN

9

12:E13;L9

HDMI_RSTN

10

AH11

PMA8/U2TX/SCL2/CN18/RF5

PMA9/U2RX/SDA2/CN17/RF4

TP1302

R1314
0 1005

9:N12;L9

BB_RSTN

11

Q17

DETECT

12

R1317
0 1005
I2C_SCL1
R1318
0 1005

X1301
8MHz

I2C_SDA1

12:Z15
12:Z13

VCC3.3V
R1304

R1323

4.7K 1005

4.7K 1005

R1312
0 1005

R1322

1M 1005

BB_RSTN

UART1_RXD
AH11

9:N12;AH8

TDI/PMA10/AN13/RB13

PMALL/PMA0/AN15/OCFB/CN12/RB15

VDD_2

TCK/PMA11/AN12/RB12

VSS_2

TDO/PMA12/AN11/RB11

PMA7/C2OUT/AN9/RB9

AVSS

PMALH/PMA1/U2RTS/BCLK2/AN14/RB14

R1319
0 1005

RB7/AN7

12:E13;AH8

8

TP1301

C1301
13pF
50V

Crystal matching
22pF -> 13pF

HDMI_RSTN

AH12

9

AH12

RB6/AN6

10

TMS/CVREFOUT/PMA13/AN10/RB10

11

U2CTS/C1OUT/AN8/RB8

12

PGD2/EMUD2/AN7/RB7

VCC3.3V

PGC2/EMUC2/AN6/OCFA/RB6

13

31

15

30

PGC1/EMUC1/AN1/VREF-/CVREF-/CN3/RB1
PGD1/EMUD1/PMA6/AN0/VREF+/CVREF+/CN2/RB0

29

U1RTS/BCLK1/SCK1/INT0/RF6

28

35

27

14

26

C2IN-/AN2/SS1/CN4/RB2

25

SDA1/RG3

24

36

23

13

22

SCL1/RG2

C2IN+/AN3/CN5/RB3

21

VDD_3

37

20

OSC1/CLKI/RC12

38

12

19

39

11

18

10

C1IN-/AN4/CN6/RB4

17

VDD_1
C1IN+/AN5/CN7/RB5

R1313
0 1005

R1308

IC3/PMCS2/PMA15/INT3/RD10
4.7K 1005

44

4.7K 1005

5

R1321

PMA4/SDI2/CN9/RG7

R1325
4.7K 1005

R1311

45

TP1303

4.7K 1005

4

IC4/PMCS1/PMA14/INT4/RD11

R1320

OC1/RD0

PMA5/SCK2/CN8/RG6

R1301

SOSCI/CN1/RC13

46

R1306

SOSCO/T1CK/CN0/RC14

47

3

4.7K 1005

48

2

PMD7/RE7

4.7K 1005

OC2/RD1

1

PMD6/RE6

IC1301
PIC32MX340F256H

AH7

VCC3.3V

4.7K 1005

OC3/RD2

OC4/RD3

49

PMWR/OC5/IC5/CN13/RD4

PMRD/CN14/RD5

51
50

52

53

0 1005
CN16/RD7

CN15/RD6
54

55

R1303
RF0

RF1

PMD0/RE0

PMD1/RE1

PMD2/RE2

ENVREG
57

58

59

60

61

62

PMD4/RE4
/MCLR

DETECT

PMD5/RE5

AVDD

AH13
15

63

64
R1324

16

4.7K 1005

17

14

PMD3/RE3

VCC3.3V
18

56

1005

19

VCAP/VDDCORE

9

LD1301
R1307 SML-201MT
470

C1305
13pF
50V

13

14
6
15
16
5

4

3

2

1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

W-TV Rx
uController

2009.03.21

13

13

LGE Internal Use Only

WIRELESS LH95

Trouble shooting Guide

Trouble shooting:

p2 - p6

About Wireless TV:

p7 – p10

Block Diagram:

p11 – p16

LCD TV Research Lab
R&D 3 Dept / AJ Gr.
LG ELECTRONICS INC.

Trouble shooting
WIRELESS MODEL
a

WIRELESS LH95

OSD

OSD

b

c

Analog

INPUT

AV
Component
HDMI
RGB

LVDS

MAIN IC

Digital

LGE3159

d

Wireless

e

HDMI

SIGNAL
CONVERTER

g

HDMI

TX MODULE

LVDS

RX MODULE

SIL9125 +
SB9120 +
SB9110

DTC30LM36 +
SIL9134

f

LCD
MODULE

MAIN IC

SB9111 +
SB9121 +
SIL9134

LGE3369 +
LGE7329

MEDIA-BOX

LGD V4

TV SET
Service
only

Wired
HDMI CABLE

HDMI JACK

HDMI5
HDMI JACK

Defect block

Symptoms

Wireless connection

Check

a

Bad (noise) image / No image
- osd is good
Bad sound / No sound

No effect directly

▶ Check the EDID of HDMI & RGB
▶ Check cable & contact error

b

Bad image
- IC’s cold soldering or memory defect accompanied noise on osd
Bad sound / No sound
Wireless connecting osd is displayed continually
- There is no video signal from Rx module to TV main ic, so TV
understand this time like disconnection state and display connecting
osd continually. And then, if TV is not activated rightly within 15min,
it will go to st-by mode.

No effect directly

▶ Check main ic basic power & power
sequence
▶ Control line check (I2C & etc)
▶ Check input/output video & audio
signal

Bad image / Bad or No sound
Wireless connecting osd is displayed continually
- No image

No effect directly
No connection

C

＊Focused on Wireless connection

No effect directly
No connection

▶ Check power & control line
▶ Check input/output signal
▶ Check inner HDMI cable connection
status
(There can be cable’s defect.)

Trouble shooting
WIRELESS MODEL
a

WIRELESS LH95

OSD

OSD

b

c

Analog

INPUT

AV
Component
HDMI
RGB

LVDS

MAIN IC

Digital

LGE3159

d

Wireless

e

f

HDMI

SIGNAL
CONVERTER

HDMI

TX MODULE

LVDS

RX MODULE

SIL9125 +
SB9120 +
SB9110

DTC30LM36 +
SIL9134

g

MAIN IC

SB9111 +
SB9121 +
SIL9134

LGE3369 +
LGE7329

MEDIA-BOX

LCD
MODULE

LGD V4

TV SET
Service
only

Wired
HDMI5

HDMI CABLE

HDMI JACK

HDMI JACK

Defect block

Symptoms

Wireless connection

Check

d
e

Wireless connection osd is displayed continually
- That osd can be appeared by HDMI cable or Jack defect even
though wireless connection is completed.
(only Rx module)

No connection
connection

▶ Check Wireless connecting osd
▶ Check inner HDMI cable connection
status
(There can be cable’s defect.)

F

Bad image / No image
- IC’s cold soldering or memory defect accompanied noise on osd
Bad sound / No sound

No effect directly

▶ Check main ic basic power & power
sequence
▶ Check control line (I2C & etc)
▶ Check input/output video & audio
signal
▶ Check LVDS cable & wafer locking
(There can be cable’s defect.)

g

Bad image or No image

No effect directly

▶ Ticon b/d or Inverter check
▶ Check power

＊Defect block means from itself to ahead of next part.
＊Wireless TV is similar with the model using LGE3159 or LGE3369 except for wireless parts.

Trouble shooting
WIRELESS MODEL
a

WIRELESS LH95

OSD

OSD

b

c

Analog

INPUT

Digital

AV
Component
HDMI
RGB

LVDS

MAIN IC

LGE3159

d

Wireless

e

HDMI

SIGNAL
CONVERTER

g

HDMI

TX MODULE

LVDS

RX MODULE

SIL9125 +
SB9120 +
SB9110

DTC30LM36 +
SIL9134

f
MAIN IC

SB9111 +
SB9121 +
SIL9134

LGE3369 +
LGE7329

MEDIA-BOX

LCD
MODULE

LGD V4

TV SET
Service
only

Wired
HDMI5
HDMI CABLE

HDMI JACK

HDMI JACK

※ Check first when Wireless connection is disable!
- Pairing
- S/W version check
- Fan defect
▷ TV Rx module fan defect: Check Fan error of TV In-start menu
▷ Media-Box fan defect: Check the red led’s blinking of Media-Box front
- Wireless interference check
▷ Refer to the installation method guide
- Inner HDMI cable’s connection status (From Rx/Tx module to Main)
※ Check Tip
- In some cases, TV only or Wired mode make easy to check.
※ Caution & Information
- TV set & Media-Box is just 1:1 connection. (No multiple device connection)
- In order to download TV set, you must change the mode to HDMI5 or turn off Media-Box.
- Rx/Tx module’s performance is very sensitive to temperature. So, When you repair the defect, should keep up with
the original assembly state.

Trouble shooting

WIRELESS LH95

Pairing for SVC
1. Turn on the TV SET & Media-Box
2. Connect TV HDMI5 Jack & Media-Box rear [Service only] Jack with HDMI cable

HDMI CABLE
3. Enter the [IN START(Media Box)] menu and go to sub-title [9.Wireless check]
Enter menu and Push the left or right remote-controller button.
Check the Paired Status if changed from NG to OK
※ If s/w version of Tx/Rx module & TV/Media-box main isn’t matched, Wireless can’t be
connected, So at that time check the version and upgrade by usb

If there are 2 or more wireless tv set, it’s need to be set
channel respectively. (Must separate them more than 10m)
4. Remove HDMI cable & check wireless connection.
If connection is not completed, power off and on the TV & Media-Box.

About Wireless TV

WIRELESS LH95

NORMAL MODEL

Analog

INPUT

Digital

AV
Component
HDMI
RGB

LVDS

LCD
MODULE

MAIN IC

LGD
AUO
CMO

MSTAR
BCM

TV SET

WIRELESS MODEL

Wireless
Analog

INPUT

AV
Component
HDMI
RGB

Digital

LVDS

MAIN IC

LGE3159

SIGNAL
CONVERTER

DTC30LM36 +
SIL9134

MEDIA-BOX

HDMI

HDMI

TX MODULE

SIL9125 +
SB9120 +
SB9110

RX MODULE

SB9111 +
SB9121 +
SIL9134

LVDS

MAIN IC

LGE3369 +
LGE7329

TV SET

LCD
MODULE

LGD V4

About Wireless TV

WIRELESS LH95

TX Module

HDMI Cable

From Media-Box Main b/d
SIL9125

SB9120
[B/B]

SB9110
[RF]

RX Module

HDMI Cable

SIL9134

To TV Main b/d

PIC32MX
[MICOM]

SB9121
[B/B]

SB9111
[RF]

TV SET
Media-Box

TX module
RX module

About Wireless TV

WIRELESS LH95

Top view of RF IC (Antenna)
SB9110

SB9111

LR

LR

HR

Unused

HRP Channel

HR

Unused

LRP Channel

Fc(HRP)= 60.48㎓

About Wireless TV

WIRELESS LH95

Wireless

LRP

TX module

HRP

RX module

LRP: Control data
HRP: Video & Audio data

Wireless TV is similar to the walkie-talkie. We must match the channel of Tx & Rx module.
There are 4 HRP channel(A1~A4). We use only A2 channel and 3 LRP channel like this [60.32㎓],
[60.48㎓],[60.64㎓].
First thing, the LRP channel setting has to be matched in wired mode. There are not only channel
but also mac address that Tx/Rx modules have it’s own for preventing wireless interference.
Set the LRP channel and share the mac address each other, that’s called pairing.
After pairing, Antenna search and set the wireless path by LRP and then send video & audio data to
HRP channel.

Block Diagram

TV SET
IC101
IC104

KIA7427F

IC102

IC200,201

DDR2
DDR2
(512Mb
(512Mb XX 2)
2)

NVRAM
24C512
Re
se
t

IC800,801

DDR2
DDR2
(512Mb
(512Mb XX 2)
2)

IC901

24C32

IC100
IC701

S-Flash
(32Mb)

LGE7329A
Ursa

IC103

IC900

LG5110
Local dimming

NAND-Flash
(512Mb)
LGE3159GV
Saturn5

X100

X-tal(12㎒)

MCLK
IC400

I2S

JK300

NOT FOR USER
Connect to Rx b/d

NTP3100L
(D-AMP)

For wireless HDMI_3

JK505

For wired
& 범용

IC300

HDMI_2

IC1000

EEPROM
JK504

HDMI CABLE

JK500

24C16
WT61P8
Micom

8p wafer

USB
5.0V

HDMI
Transmitter

3.3V_L
1.8V_L

[SiI9134]

MICOM
[PIC32]

Network
Processor
[SB9121]

3.3V_L
2.5V_L
1.0V_L

2.5V_L

RF
Transceiver
[SB9111]

RS-232
Only for service
X1000

X-tal(24㎒)

24

1.5V_L
1.2V_L
1.0V_L

Wireless RX Module

IC1002

IR & Local KEY

MODULE

Block Diagram

MEDIA-BOX(SIMPLE)

HDMI Splitter
(PI3HDMI1210)

Can Tuner
(TDFR-Z751D)
IF

Demodulator
(LG3900)

FE_TS_SERIAL

I2S

FE_VMAIN
FE_SIF

LVDS

LVDS Receiver
(THC63LVD1024
/ DTC30LM36)

TTL

SPI_CK/CS/D0/D1

Rear jack b’d
AV1

31P Wafer : rear jack
b’d & main b’d
(P1200)

AV2

AV1_CVBS_IN

ADDR_D[0:15]
ADDR_A[0:12]

AV2_CVBS_IN

COMPONENT1

COMP1_Y/Pb/Pr

COMPONENT2

COMP2_Y/Pb/Pr

RGB

DSUB_ R/G/B
DSUB_H/VSYNC

To TV

MSTAR
SATURN6
[MSD3369GV]

BDDR_D[0:15]
BDDR_A[0:12]

I2C

HDMI
Transmitter
(SiI9134)

For
wireless
HDMI
Out

Serial Flash
For Boot

DDR2 SDRAM
(1Gbit)
HYNIX/ELPIDA

DDR2 SDRAM
(512Mbit)
HYNIX/ELPIDA

MICOM
Weltrend
NAND Flash
HYNIX
(64MB)

PCM_A[0:7]

AUDIO IN
I2C

EEPROM
AT24C512

IR (For test)
USB_DM/DP USB
RS-232C
(MAX3232CDR)

SPDIF_OUT

TMDS[0:7]
HDMI_CEC

SPDIF

USB Power

DGB_TX/RX

HPD
5V_HDMI

HDMI
4:1 Switch
(TDA9996)

MIC2009YM6-TR
USB Power

HDMI
1/2/3/4
Rear : 3
Front :1
HDMI
In

Block Diagram

5.0V_TU

ANT/
CABLE
IN

MEDIA-BOX(VIDEO)
+3.3V_DTMB

I2C_CH2(Demod
repeater

IF

Analog/D
TMB
Half-NIM
TUNER

+1.2V_DTMB

DTMB/DVB-C
Demodulator

+3.3VA_DTMB

I2C_CH2

[LG3900]

TS

I2C_CH1 I2C_CH2

Composite
Video
IN

I2C_CH4

ANALOG
VIDEO
INPUT
FE_VMAIN

AV2_CVBS_IN

Component
(Y,Pb,Pr)
IN

COMP1-Y/Pb/Pr
COMP2-Y/Pb/Pr

DUAL
LVDS

DSUB-R/G/B

LVDS
Receiver
[DTC30LM36]

[MSD3369GV]

RGB
IN

30

D1.8V_1

D3.3V_3

HDMI
HDMI
Transmitter

D5.0V_1

CEC_TX

HDMI
DeMUX

[SiI9134]

[PI3HDMI1210]

I2C_CH2

HDMI
TX_SEL

HDMI
OUT

HDMI
TX_SEL

HDMI
DIGITAL
VIDEO
INPUT

D3.3V_2

D1.26V
_VDDC

D1.8V_DD
R

3.3V_V
DDP

D3.3V_
1

I2C_CH4

DDC_RGB
D5.0V_W

WiHD TX I/F

AV1_Y/C_IN

D3.3V_2

LCD/PDP
DIGITAL TV
PROCESSOR

AV1_CVBS_IN

HDMI
Receiver

3.3V_L
1.8V_L

[SiI9125]
24

I2C_CH4

FRONT
HDMI
IN
(x4)

Network
Processor

CEC_RX
CEC_RX
DDC_RGB

HDMI
Switch
(4-to-1)
[TDA9996]

BACK

D3.3V_L

MiCOM

CEC_TX

[SB9120]

3.3V_L
2.5V_L
1.0V_L

[WT61P8S]
2.5V_L

D3.3V_HDMI

RF
Transceiver

D1.8V_HDMI

[SB9110]

1.5V_L
1.2V_L
1.0V_L

I2C_CH2

Wireless Module

Block Diagram

5.0V_TU

ANT/
CABLE
IN

MEDIA-BOX(AUDIO)
+3.3V_DTMB

I2C_CH2(Demod
repeater

Analog/D
TMB
Half-NIM
TUNER

IF

+1.2V_DTMB

DTMB/DVB-C
Demodulator

+3.3VA_DTMB

I2C_CH2

[LG3900]

TS

Composite
Video
IN

I2C_CH1 I2C_CH2

I2C_CH4

S/PDIF
OUT

ANALOG
AUDIO
INPUT
D3.3V_2
FE_SIF
A/V Audio-1
A/V Audio-2
COMP Audio-1

Component
(Y,Pb,Pr)
IN

COMP Audio-2

LCD/PDP
DIGITAL TV
PROCESSOR

D1.8V_1

D3.3V_3

D5.0V_1

S/PDIF

I2S

HDMI
HDMI
Transmitter

HDMI
DeMUX

[SiI9134]

[PI3HDMI1210]

I2C_CH2

TX_SEL

RGB Audio

[MSD3369GV]

RGB
IN

D1.26V
_VDDC

D1.8V_DD
R

3.3V_V
DDP

D3.3V_
1

I2C_CH4

D5.0V_W

I2C_CH4

D3.3V_L

FRONT

WiHD TX I/F

HDMI
TX_SEL

HDMI
DIGITAL
AUDIO
INPUT

HDMI
Receiver

Network
Processor

MiCOM
[WT61P8S]

HDMI
Switch
(4-to-1)
[TDA9996]

BACK

I2C_CH2

D1.8V_HDMI

1.8V_L

3.3V_L
2.5V_L
1.0V_L

2.5V_L

RF
Transceiver
D3.3V_HDMI

3.3V_L

[SiI9125]

[SB9120]

HDMI
IN
(x4)

HDMI
OUT

[SB9110]

1.5V_L
1.2V_L
1.0V_L

Wireless Module

Block Diagram

TX MODULE

ADCI_P/N

HDMI
CABLE

ADCQ_P/N

H/VSYNC

PCLK_P/N

DE

TMDS(8line)

SiI9125

OSC

SB9120

IDCK

HDMI
XTAL
(28.322MHz)

Receiver

Network
MCLK/SCK/W
S

Processor

SLEEP
XTAL
(3.6864MHz)

SB9110
RF
Transceiver

I2S
DACI_P/
N
DACQ_P/N

SPDIFI
Embedded
CPU

Control
&
Power
CABLE
(12p)

(54MHz)

I2C(2line)

RF Control

SPI Bus(4line)
3.3V

HDMI_INT
SiBEAM_INT
HDMI_RST#
SiBEAM_RST#

MX1605
Serial Flash

2.5V
1.5V
1.2V

Power

DDC(2line)

D[35:0]

1.0V

Power Source
(5V)

Block Diagram

RX MODULE

XTAL

XTAL

(27MHz)

(27MHz)
VCXO

Video
PLL

VCXO

Video
DAC

VCLK

I2C

Audio
PLL

Audio
DAC

ACLK

I2C

ADCI_P/N

HDMI
CABLE

ADCQ_P/N

H/VSYNC

PCLK_P/N

DE

TMDS(8line)

SiI9134

OSC

SB9121

IDCK

HDMI

Network

Transceiver

MCLK/SCK/W
S

Processor

I2S(4line)

I2C(2line)

I2C(2line)

(3.6864MHz)

Receiver

RF Control

SPI Bus
3.3V

INT
INT
Micom
(PIC32MX340F256H)

RF

DACQ_P/N
Embedded
CPU

RST#

SLEEP
XTAL

SB9111

DACI_P/N

SPDIFO

Power
CABLE
(8p)

(54MHz)

RST#

MX1605
Serial Flash

2.5V
1.5V
1.2V
1.0V

Power

DDC(2line)

D[35:0]

Power
Source
(5V)

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Format                          : application/pdf
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Title                           : MFL60021630
Author                          : ksh

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