QCA WCN36x0 WLAN Power Optimization Guide 80 Y0513 3 F

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QCA WCN36x0 WLAN Power Optimization Guide

80-Y0513-3 Rev. F

Confidential and Proprietary - Qualcomm Atheros, Inc.
Restricted Distribution: Not to be distributed to anyone who is not an employee of either Qualcomm or its subsidiaries without the express approval of Qualcomm's Configuration Management.

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Confidential and Proprietary - Qualcomm Atheros, Inc.

NO PUBLIC DISCLOSURE PERMITTED: Please report postings of this document on public servers or websites to: DocCtrlAgent@qualcomm.com.
Restricted Distribution: Not to be distributed to anyone who is not an employee of either Qualcomm or its subsidiaries of Qualcomm without the express approval of Qualcomm's
Configuration Management.
Not to be used, copied, reproduced, or modified in whole or in part, nor its contents revealed in any manner to others without the express written permission of Qualcomm Atheros, Inc.
Qualcomm is a registered trademark of QUALCOMM Incorporated. Atheros is a registered trademark of Qualcomm Atheros, Inc. All other registered and unregistered trademarks are the
property of QUALCOMM Incorporated, Qualcomm Atheros, Inc., or their respective owners and used with permission. Registered marks owned by QUALCOMM Incorporated and
Qualcomm Atheros, Inc., are registered in the United States of America and may be registered in other countries. Product descriptions contained herein are subject to change from time to
time without notice.
This technical data may be subject to U.S. and international export, re-export, or transfer ("export") laws. Diversion contrary to U.S. and international law is strictly prohibited.
Qualcomm Atheros, Inc.
1700 Technology Drive
San Jose, CA 95110
U.S.A.
© 2012-2013 Qualcomm Atheros, Inc.

–2–
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Revision History
Date

Description

A

Aug 2012

Initial release

B

Oct 2012

Updated WCN-SS Power Rails and Headswitches figure; expanded on description for Modulated DTIM and
missing beacon; updated testing

C

Oct 2012

Added WCNSS configuration guide; added references to WCNSS for Android and Windows

D

Dec 2012

Added PNO slides, MSM8974 WCN-SS Power Optimizations

E

Jan 2013

Updated Packet Filtering and ARP Offload and Driver Implementation sections

F

Feb 2013

Updated graphics on slides 6, 11, and 28; added information on WPM and descriptions of BET and miss
beacon; changed Riva to WCNSS

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Revision

–3–
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Table of Contents
WCN36x0 Power Management





Packet Filtering and ARP Offload

Power Management SW Architecture



Config Params



SW Component Hierarchy for Power Save



IOCTLs



Power Manager



IOCTL - WLAN_PRIV_SET_HOST_OFFLOAD Test with iwpriv



cCPU Clock Scaling



IOCTL - WLAN_SET_PACKET_FILTER_PARAMS



SVS Support



IOCTL - WLAN_SET_PACKET_FILTER_PARAMS – Test with iwpriv



ARM9 Clock Gating and Power Collapse with VDD MIN



Core BSP Resources Required



Wakeup Sequence – BT Schedule Activity



Enter Sleep Sequence
Exit Sleep Sequence



WLAN Power Save Mode (BMPS and IMPS)


Power Save Mode



Power Management Control



PMC Services



WCNSS Configuration Guide

BMPS


BMPS (Beacon Mode Power Save)



BMPS Listen Interval Negotiation



BMPS Sequence



Beacon Early Termination (BET)



Beacon Miss Detection





IMPS



IMPS (Idle Mode Power Save)
IMPS Sequence in Host
IMPS Sequence



Testing




ST









Driver Implementation

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



Packet Filtering and ARP Offload – Driver Implementation



Call Graph - ARP Offload (config param)



Call Graph – ARP Offload (IOCTL)



Call Graph - MC/BC Packet Filtering (Config Param)



Call Graph - MC/BC Packet Filtering (IOCTL)



Call Graph - Packet Filter ALL and Allow Only from Registered
Addresses



Call Graph - Packet Filtering Based on Set Rules (IOCTL)
MC/BCering (Config Param)

Preferred Network Offloading (PNO)


PNO



Host-Affected Components



PNO Parameters



PNO Command Line Test



Integrate PNO in Android

MSM8974 WCN-SS Power Optimizations


Power Management Changes for MSM8974 WCN-SS



SPM (Subsystem Power Manager) Updates for MSM8974 WCN-SS



cMEM (Additional 64 KB) Updates for MSM8974 WCN-SS



uBSP in Low-Power Mode for MSM8974 WCN-SS



WLAN/BT Low-Power Mode for MSM8974 WCN-SS



References



Questions?

–4–
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

WCN-SS Power Rails and Headswitches
VDDmx is the memory voltage and
powers RAM blocks
VDDcx is the chip voltage and powers
digital (nonmemory) blocks



RPM controls the voltage of VDDcx and
VDDmx to satisfy the dynamic
requirements of all subsystems that share
access to these rails







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

VDDCX

VDDMX

ST



WLAN_SS

Three blocks with isolated power control –
WLAN, Common, and Top (Always-On);
headswitches control power to WLAN and
Common

WMAC
PHY

Mem

Mem

WLAN software controls the headswitch
to WLAN block; shuts it down whenever
WLAN is idle

BT_HM

Subsystem Power Manager (SPM)
hardware block controls the headswitch to
common block

FM_HM

Common_SS
ARM9

Top

Mem

interrupt control
CMEM

Mem

clk, reset control
DXE (Common
DMA Engine)
Reg_initialization
Module

SPM/SAW2

GFS_CNTL

AHB

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



WCN36x0 has an optional
48 MHz reference clock
that is required for WLAN
5 GHz operation.
WCNSS has its own
960 MHz PLL which is on
the GCC and provides the
clock source for much of
the WCNSS subsystem.
19.2 MHz clock from the
PMIC XO or 24 MHz clock
derived from an optional
crystal that is attached to
Iris - The PLL outputs both
a 960 MHz clock and a
480 MHz clock.
CGPLL is needed for
various Bluetooth and FM
analog components; it is
controlled by Power
Manager by Clock Regime
driver.

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

ST

WCN36x0 Clock

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WCN36x0 Clock (cont.)
48MHz XO on Iris


CGPLL




ST



The 48MHz XO on Iris is an optional crystal that, if present, can supply a 48MHz clock to
the WLAN RF. It is needed in order to support WLAN 80MHz mode.

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

This PLL on Iris provides clocks to various Bluetooth and FM analog components; it will
be enabled and disabled by the Power Manager as needed when entering and exiting an
active BT or FM mode of operation; Power Manager will control the CGPLL via the Clock
Regime driver

cCPU Clock


The ARM9 (cCPU) clock is programmable to run at 240 MHz, 120 MHz, or 60 MHz; it is
controlled via the Clock Regime driver; Power Manager will dynamically change the
cCPU clock when it is notified of a change in the active wireless technology state



In order to achieve MIPS requirement targets, the CoreBSP sleep driver must restore the
cCPU clock frequency during wake to the same value it was when going to sleep

–7–
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

WCN-SS HW – Power Rails
All rails to WCN3660 and WCNSS are controlled by RPM


No PMIC driver in WCNSS, i.e., no way for WCNSS to talk directly to PMIC



We use NPA Remoting to forward PMIC control via RPM

ST



PMIC NPA nodes will be provided by the PMIC driver team for each supply, and
control will be managed through these NPA nodes



All rails will be turned ON in the Wake Set from WCNSS and turned OFF in the
Sleep Set




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

Including the 2.9V rail for the Transmit PA; very low leakage if PA is not used

WCN3660 requires that 1.8V SMPS I/O supply must come up before 1.3V


All the other supply domains (1.8V LDO, 1.2V and 2.9V) protect their inputs until 1.3V
supply comes up



Once 1.3V supply comes up, we release isolation by S/W control, assuming S/W knows
all the necessary supplies have been up

–8–
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RAM Leakage Reduction Modes



Description

ACTIVE

RAM block is being actively used (read/write)

DORMANT

• Standard Cell Power-Collapsed, Memory Periphery
Footswitched
• RAM contents are retained, but the RAM may not be
accessed (no read/write)

OFF

All contents of RAM are lost; leakage current is minimized

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RAM Mode

There are four memory blocks in WCNSS


cMEM and Cache on Common_SS



WMAC and PHY memories on WLAN_SS

–9–
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

WCN-SS HW – GDHS and RAM Supply Rails
WCNSS SW will directly control the WLAN GDHS via register writes



The COMMON GDHS is controlled by SAW2 (SPM); SAW2 is configured by
register writes in the Sleep Driver



TOP is always on, but subject to non-functionality due to VDDmin




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

Note: QGIC is actually in COMMON; requires save and restore of QGIC registers by the
Sleep Driver around power collapse

All RAM blocks support for low-power modes of operation


WLAN RAM will be directly controlled by WCNSS SW via register writes



COMMON RAM will be controlled by SAW2, which is configured by register writes in the
Sleep Driver


ACTIVE during wake



OFF during sleep (assumes that cMEM and cache contents are always lost during power collapse)

– 10 –
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





All WCNSS clocks are
derived from the
960 MHz PLL in the
GCC, except during
sleep or the first steps
of the wakeup cycle
before the PLL is
enabled
For WLAN, the cCPU
clock frequency setting
is independent of the
phy clock setting; any
combination can be
used, as long as the
data rate requirements
are met
For BT, only the PLL
generated 32 MHz clock
is used for the link
controller
For FM, only the PLL
generated 19.2 MHz
clock is supported

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

ST

WCN-SS HW – Clocks

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Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

WCN-SS HW – Clocks (cont.)
PMIC supplies 19.2 MHz reference clock and 32 kHz sleep clock



IRIS has an optional 48 MHz reference clock that is required for WLAN 5 GHz
operation



960 MHz PLL output is used to drive the WCNSS clock tree in operational mode


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

Until PLL output is stable, WCNSS is clocked directly off the 19.2 MHz ref clk



32 kHz sleep clock drives all the WCNSS sleep logic and low-frequency timers



CGPLL on IRIS is used to drive modem, ADC/DAC, and WCN3660 digital blocks
for BT and FM; controlled by Power Manager SW by sending an SSBI command
to IRIS

– 12 –
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WCN-SS HW – Clocks (cont.)
960 MHz PLL will not be reprogrammed dynamically depending on connectivity mode of operation


List of system clocks generated from PLL (Note: Most clocks also run temporarily off the 19.2 MHz
XO during boot and wake)


WLAN_PHY_CLK (Root1_320_160_80)











Controlled by Power Manager

CLK_XO_19_2 (Root7_19_2)




Also shared with Coexistence; controlled by Power Manager

BT_FM_19_2_CLK (Root6_19_2)




Used for cCPU and AHB (AHB is always div2)
Divider selects between frequencies depending on MIPS requirements
Can change cCPU freq independent of all other technology clocks
Controlled by Power Manager

BT_CLK (Root5_32)




Divider selects between 240/120/60 MHz depending on WLAN BW Mode (20 MHz/ 40 MHz/ 80 MHz)
Controlled by Power Manager

CPU_CLK (Root3_240_120_60)




Divider selects from 320/160/80 MHz depending on WLAN BW Mode (20 MHz/ 40 MHz/ 80 MHz)
Controlled by Power Manager

WLAN_ADC_DAC_CLK (Root2_240_120_60)




ST



All required clocks are derived from this single PLL freq source

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

This is the main clock that everything comes up on from boot; SPM also uses this

SLEEP_CLK (Root8_32_768K)


Used for a WLAN sleep timer and for BT sleep clock calibration (if needed)

– 13 –
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WCN-SS HW – Clocks (cont.)
The 48 MHz XO and GCC PLL are controlled by the sleep driver SW



The clock tree settings that exist on entry to sleep are restored upon exit from
sleep by the sleep driver



All requests for clocks are accomplished by function calls to the Clock Regime
driver


Clock Regime maintains and enforces dependencies








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

Example: will control VDD NPA node to raise VDD to Nominal before switching cCPU to 240 MHz

Function calls to Clock Regime are blocking until complete

PM requests clocks that are shared between wireless technologies


WLAN_RFIF_CLK if it controls common HW (UART baud rate), need feedback



BT Clock (32 MHz) because it is shared with WLAN due to Coexistence



BT/FM Clock (19.2 MHz) because it is shared by BT and FM



cCPU Clock (120 MHz/240 MHz) because it is shared by everything

Other clocks that are technology-specific (i.e., all WLAN clocks) are requested by
the respective stack SW

– 14 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

WCN-SS HW – Timers


There are 32 kHz local timers on both the collapsible COMMON and the alwayson TOP domains



BT_CLK needs to be saved and restored around power collapse



Configured in Power Manager since BT_CLK is also used in WLAN as part of
Coexistence

ST

Specific HW was added to accurately account for exact number of 32 kHz ticks spent in
sleep mode, used to resynchronize BT_CLK by SW

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



WLAN_CLK needs to be saved and restored around power collapse


Also uses specific HW; is done in WLAN stack SW

– 15 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

ST
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WCN36x0 Power Management

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Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Power Management SW Architecture

BT Stack

FM Stack

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ST

WLAN Stack

Power Manager

NPA Sleep

RPM Driver

GDDS
Headswitch
Driver

CoreBSP Sleep
Timer Driver

Clock Regime
Driver

Power Management HW (SPM, Clocks/PLL, GDDS
headswitches, etc)

GCC Sleep
Timer

– 17 –
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SW Component Hierarchy for Power Save

ST

Individual stacks (WLAN, BT, FM) decide
when they can go idle for a period of
time

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



Set a CoreBSP timer



Idle the HW specific to that technology (including
IRIS)



Notify the Connectivity Power Manager of the
mode change



Power Manager (PM) aggregates the modes
of all technologies, controls shared HW
resources, like cCPU clock, and in doing so,
configures NPA for sleep



RPM aggregates control over shared HW
resources across all MSM™ subsystems

– 18 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Power Manager





PM_WLAN_DISABLED
PM_WLAN_80MHZ_ENABLED_ACTIVE
PM_WLAN_80MHZ_ENABLED_INACTIVE







PM_BT_DISABLED
PM_BT_ENABLED_ACTIVE
PM_BT_ENABLED_INACTIVE
PM_BT_VOICE_ENABLED_ACTIVE






etc.

PM_FM_DISABLED
PM_FM_ENABLED_ACTIVE
PM_FM_AUDIO_ENABLED_INACTIVE




etc.

ST

Provides an API for WLAN/BT/FM modules to indicate a change in mode

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

etc.

Abstracts the power management details from the WLAN/BT/FM modules





Co-locates all power management details in one module
Finds the least common denominator among all currently enabled modes
Sets LPRMs for LPRs registered with Sleep driver
Controls cCPU clock
– 19 –
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cCPU Clock Scaling
cCPU clock frequency is required to be 240 MHz for all BT Active modes and
WLAN Active mode



VDDcx must be at nominal level for cCPU to operate at 240 MHz



Clock Regime Driver includes NPA request to VDD_Dig node to ensure VDDcx is
at the correct level before setting cCPU clock to requested frequency



To minimize the RPM messages on a cCPU clock frequency change, the Power
Manager makes its own NPA request to the VDD_Dig node; this is bundled with
the request to the Internal Bus Driver in an NPA Transaction, which results in a
single message to the RPM that includes all requests generated by the VDD_Dig
request and Internal Bus Driver requests

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ST



– 20 –
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SVS Support
The default VDDcx voltage level is SVS



WCNSS will request a nominal voltage level if it requires the cCPU to operate at
240 MHz; cCPU operates at 240 MHz for all Bluetooth and WLAN Active modes



WCNSS will request a return to SVS voltage level once the mode that required the
240 MHz cCPU clock frequency is changed

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ST



– 21 –
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ARM9 Clock Gating and Power Collapse with VDD MIN
On cCPU entering Idle thread, there are only two expected options for the state to
enter



The first of these is ARM9 Clock Gating; this state is entered when the next
expected wake time is too close to the current time, or when the PM has disabled
GDHS; ARM9 Clock Gating mode gates the cCPU clock to the ARM9; no other
hardware is turned off



The PM uses an NPA node provided by the Sleep Driver to disable GDHS; this is
done based on the Power Manager mode set by each technology



If there is enough time until the next expected wakeup, the Power Collapse with
VDD min state is entered

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ST



– 22 –
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Core BSP Resources Required







Clock Regime Driver
CPU clock frequency changes are requested through /clk/cpu NPA node



All other clocks needed by WCNSS are configured using the DAL Clock API



Handles the switch to/from the IRIS 48 MHz XO on power collapse entry/exit

ST



Sleep Driver

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



GDHS Disable requests are made using the /core/cpu/vdd NPA node



Configures RPM’s Sleep set for WCNSS/Iris voltage supplies

Internal Bus Driver


Bus bandwidth requests are made through the icbarb API, which uses the /icb/arbiter NPA
node



Bus Bandwidth requests are made based on PM mode changes

PMIC NPA


The PM uses PMIC NPA nodes to request the voltage supplies to be placed in the RPM’s
active set



PMIC Driver used to communicate directly with PMIC does not exist on WCNSs

– 23 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Wakeup Sequence - BT Scheduled Activity

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ST

WCN36x0

– 24 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Enter Sleep Sequence

Enter Sleep

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cCPU

ST

CoreBSP Sleep Driver sends RPM resource set change, and RPM sleep timer value for scheduled wake time
CoreBSP Sleep Driver configures SPM for sleep
CoreBSP Sleep Driver uses Clock Regime driver to set clock gen MUX to 19.2M output
CoreBSP Sleep Driver uses Clock Regime driver to disable 960 MHz PLL (clears bit in GCC)

RPM/MPM

SPM

CoreBSP Sleep Driver uses Clock Regime driver to configure Iris clock plan and disable 48M XO (if used)
CoreBSP Sleep Driver saves state of cCPU in DDR RAM, executes SWFI
SPM asserts Common reset
SPM enables Common isolation
SPM disables Common clocks
SPM drives cMEM into retention mode (if required)
SPM disables headswitch to Common
SPM notifies RPM is in sleep state
RPM grants sleep request
RPM takes down Iris voltage sources

RPM instructs MPM to set VDDcx & VDDmx to proper levels
MPM changes VDDcx and VDDmx from nominal to retention (or off) levels
MPM disables 19.2M PMIC XO buffer

– 25 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Exit Sleep Sequence

SPM enables Common headswitches
SPM drives cMEM into functional mode
SPM enables Common clocks
SPM disables Common isolation
SPM de-asserts Common reset

ST

MPM Changes VDDcx and VDDmx from retention/off to nominal levels (1.05V)
MPM Enables RPM
RPM Sends wakeup to SPM
SPM issues bringup_req to RPM
RPM brings up Iris voltage sources
RPM issues bringup_ack to SPM

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RPM/SPM

MPM

Exit Sleep
MPM Timer Expires (t = 0)
MPM Enables 19.2M PMIC XO buffer

cCPU

cCPU executes warm boot code in CoreBSP, OS restores context from DDR, and returns to the SWFI instruction
CoreBSP Sleep Driver uses Clock Regime driver to configure Iris clock plan and enable 48M XO (if used)
CoreBSP Sleep Driver uses Clock Regime driver to enable 960MHz PLL (sets bit in GCC)
CoreBSP Sleep Driver uses Clock Regime driver to set clock gen MUX to PLL output
CoreBSP Sleep Driver restores local Sleep Timer by reading MPM counter
CoreBSP Sleep Driver umasks interrupts; cCPU processes interrupt

– 26 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

ST
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WLAN Power Save Mode (BMPS and IMPS)

– 27 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

al 201
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ST

Android Power Save Mode

– 28 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Power Management Control
PMC features
Part of the Station Management Entity (SME)



Designed to be independent of the OS platform



Independent of a target hardware device to accommodate future products



Provides services to HDD, CSR, QoS and other driver modules



Uses vOSS and PE/HAL services to accomplish power management-related tasks

ST



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

– 29 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

PMC Services
Driver modules can use these PMC services
Query the current Power Save state of the system



Request to enter a specific Power Save mode, e.g., IMPS and BMPS



Request Full Power



Disallow entry into Power Save modes



Control Power Save modes, wakeup cycles, etc. by updating the config



Signal power-related events, e.g., hibernate, etc.

ST



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

– 30 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Power-Save FW



Aggregate votes (from
the clients using API)
and their modes of
operation



Four states exist in
WPM:


RXONLY



ACTIVE



Low_pwr1: BMPS



Low_pwr2: IMPS or no
vote from any clients

ST

WPM (WLAN Power
Manager)

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

– 31 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

WCNSS Configuration Guide
Name
gEnableImps

Default
1

1

gBmpsMinListenInterval
gBmpsModListenInterval
gBmpsMaxListenInterval
gEnableModulatedDTIM

gEnableDynamicDTIM

gTelescopicBeaconWakeupEn

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ST

gEnableBmps

Description
Enable Idle Mode Power Save
1 – Enable
0 – Disable
Enable Beacon Mode Power Save
1 – Enable
0 – Disable
Default Configure DTIM
1 – Min
65535 – Max
Use Modulated DTIM
0 – Disable
5 – Max
Use Dynamic DTIM
0 – Disable
5 – Max
Use Tele-DTIM
0 – Disable
1 – Enable
Configure Tele-DTIM
For Interval: 1 – Min 7 – Max
For NumIdleBcns 5 – Min 255 – Max

telescopicBeaconTransListenInterval
telescopicBeaconTransListenIntervalNumIdleBcns
telescopicBeaconMaxListenInterval
telescopicBeaconMaxListenIntervalNumIdleBcns



1

0

0

0

3
10
5
15

See Q2 and Q3 for more information.
– 32 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

ST
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BMPS

– 33 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

BMPS (Beacon Mode Power Save)


In WCNSS_qcom_cfg.ini


gEnableBmps = 1

Associated with an access point and no traffic in Tx or Rx



WLAN digital domain is power-collapsed along with the corresponding domain in
the WCN3660 chipset; if no other connectivity technology (BT or FM) is active, the
entire WCN subsystem is power-collapsed



BMPS Enter trigger can come from two places

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ST





HDD - WLAN host device driver



PMC – WCNSS FW autonomously may decide to put the system in BMPS mode



Wake up every Listen/DTIM interval to listen to Beacon to check DTIM information
to retrieve packets buffered at AP and check capability information



BMPS Exit trigger can come from


Explicit Exit indication from HDD



WCNSS FW can decide to bring the chip out of BMPS



WCNSS FW is responsible for putting the chip back to BMPS

– 34 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

BMPS Listen Interval Negotiation



gBmpsMinListenInterval



gBmpsModListenInterval



gBmpsMaxListenInterval

ST

If gIgnoreDtim isn’t set, set the LI using

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



Use gPowerUsage to identify which listen interval to use



DTIM = AP interval



Listen Interval Calculation


1) If DTIMs ≤ LI then LI = DTIMs.



2) ELSE


(1) If DTIMs is divisible by LI then LI will not be changed.




Example: a. LI=4 and DTIMs=8, LI=4. b. LI=3 and DTIMs=6, LI=3

(2) If DTIMs is not divisible by LI, then from GCD to LI, get the biggest value that can divide
the DTIMs.


Example: a. LI=4 and DTIMs=9, LI=3 b. LI = 7 and DTIMs = 12, LI = 6

– 35 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

BMPS Listen Interval Negotiation (cont.)
Set gEnableModulatedDTIM = MDTIM



Modulate DTIM
When the system is in suspend (maximum beacon will be at 1s == 10)




If maxModulatedDTIM ((MAX_LI_VAL = 10) / DTIMs) equal or larger than MDTIM (configured in
WCNSS_qcom_cfg.ini)


Set LI to MDTIM * DTIM



If Dtim = 2 and Mdtim = 2 then LI is 4

Else




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

ST



Set LI to maxModulatedDTIM * DTIMs

When the system wakes up


Set LI to DTIM

– 36 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

BMPS Listen Interval Negotiation (cont.)



gIgnoreDtim = 1
ignoreDtim
Ignore DTIM interval; set the current LI




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ST



Use the gEnableDynamicDTIM = a
Dynamic DTIM




When the system into the suspend – LCD off


Reconfigure power parameters (DTIMa)



Exit BMPS



Re-enter BMPS so that WCNSS takes into account the DTIMa

When the system wakes up


Reconfigure power parameters (DTIM1)



Exit BMPS



Re-enter BMPS so that WCNSS takes into account the DTIMa

– 37 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

BMPS Listen Interval Negotiation (cont.)
Set gTelescopicBeaconWakeupEn = 1
x = count how long it stays in that node without packet
l1 = telescopicBeaconTransListenIntervalNumIdleBcns
l2 = telescopicBeaconMaxListenIntervalNumIdleBcns
x > l2 & !packet

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x > l1 & !packet

x <= l2 & !packet

x <= l1 & !packet

packet

LI1

LI2

packet



Telescopic DTIM



ST



LI3

Start with interval of 1
Stay in interval of 1 for telescopicBeaconTransListenIntervalNumIdleBcns amount


If no data during that period move to telescopicBeaconTransListenInterval interval


Stay in this interval for telescopicBeaconMaxListenIntervalNumIdleBcns amount
– If no data during that period move to telescopicBeaconMaxListenInterval




If data is presented, move back to interval of LI1
If two consecutive beacons are missed, move back to interval of LI1




After first beacon miss, it tries to receive the next earliest arriving beacon

See Q1 for more information.
– 38 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

BMPS Sequence

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ST

HAL

– 39 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Beacon Early Termination (BET)
Terminate the reception of beacon if the TIM element is clear for the power saving



BET can be configured in a WCNSS configuration file



BET is supported only in 2.4 Ghz for Infra STA case



For P2P Client BET is disabled as FW has to parse NOA attributes in Beacon

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ST



Beacon Early Termination (BET) Config
(‘enableBeaconEarlyTermination=1’)
beaconEarlyTerminationWakeInterval=3

beaconEarlyTerminationWakeInterval=9

beaconEarlyTerminationWakeInterval=10

Behavior

Every 2nd Beacon is a Non-BET beacon and hence
has longer active duration
Every 4th Beacon is a Non-BET beacon and hence
has longer active duration
Every 5th Beacon is a Non-BET beacon and hence
has longer active duration

– 40 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Beacon Miss Detection
Maintains a circular buffer with Beacon wait times for last 50 beacons



Pick a maximum value from the buffer and use it as next timeout period for
receiving beacon (range: ucMinBcnWaitTU, ucMaxBcnWaitTU)



Beacon Wait Window extends with consecutive beacon misses



Beacon window is flexible for APs with good and poor connectivity

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ST



Beacon window extension with consecutive bcn misses
– 41 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

ST
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IMPS

– 42 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IMPS (Idle Mode Power Save)
To enable, in WCNSS_qcom_cfg.ini


gEnableImps = 1

ST



Station is not connected to AP



CSR requests PMC enter IMPS between scans



IMPS exit or does not start during

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



Idle scan is disabled



Device stays in IMPS until it is explicitly requested to exit that mode



Entry/exit from this mode is triggered by host software



WLAN register contents need to be restored upon exiting this mode



Hardware state


WLAN hardware domain is power-collapsed



WCNSS common may or may not be power-collapsed based on the scan

– 43 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IMPS (cont.)
Station looks in its existing profile list and sends a probe request, with SSID
specified in profile



Station repeats process and continues to repeat steps until it is associated with an
AP

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ST



– 44 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IMPS Sequence in Host
PMC

CSR

PE

HAL

WDI

WDA

pmcRequestImps

eWNI_PMC_ENTER_IM
PS_REQ
pmcEnterImpsState

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Check if:
Imps Enabled/Imps Allowed/Not already in IMPS

ST

(pTimeInterval)

Check if:
Not associated/ PE in IDLE state

WDA_ENTER_IMPS_REQ

pmmImpsSendChangePwr
SaveMsg
Populate ADU Register List

Any
Request
for Full
Power
will be
deferred

WDI_EnterImpsReq

WDA_ProcessEnterImpsReq

WLAN_HAL_ENTER_IMPS_REQ
WDI_2_HAL_REQ_TYPE
halPS_SetListenIntervalParam:
Set interval to config

WLAN_HAL_ENTER_IMPS_
RSP
eWNI_PMC_ENTER_IM
PS_RSP

WDA_ENTER_IMPS_RSP

halPS_HandleFwEnterImpsRsp

HAL_2_WDI_RSP_TYPE

WDA_EnterImpsReqCallback

pmmEnterImpsResponseHan
dler
If request for full power is pending
start wakeup procedure
Success/False
pmcProcessResponse

– 45 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IMPS Sequence in WCNSS
SLM

WLAN HW

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ST

HAL

QWLANFW_HOST2FW_ENTER_IMPS_REQ
halPS_HandleEnterImpsReq

Update ADU register List

Configure HW for IMPS mode

QWLANFW_ERR_STATUS_OK \
QWLANFW_ERR_MBOX_SEND_MSG_FAILURE
slmPsImpsPwrDownSeq

eHAL_STATUS_SUCCESS \
eHAL_STATUS_FAILURE

halPS_HandleFwEnterImpsRsp

– 46 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Testing



Almost all the target numbers are calculated on screen room
Only one client connected to AP



No noise generated



Broadcast/multicast filter is on



It is performance-configured (many apps and debug features are turned off)

During BMPS and IMPS

ST



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



In default, Android wakes up the host every 5 min in IMPS



In default, Android wakes up the host every 30 min in BMPS



During those modes, if the current consumption goes up to 70mA and stays there for
more than 1 sec, it could be app processor not going to suspend mode



WCNSS should not exceed 2 % of usage during those modes



Disconnect JTAG and USB during your current measurement



DTIMx


x indicates what interval it is. x = 1 then 100 ms each beacon during BMPS
– 47 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Testing (cont.)
Capture kernel log with iwpriv enabled





SME: Iwpriv wlan0 setwlandbg 6 8 1



WDA: Iwpriv wlan0 setwlandbg 8 8 1



HDD: Iwpriv wlan0 setwlandbg 5 4 1

Capture powertop log




This will display the extra log message

ST



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

To see what kind of process is running at that moment and processor speed

Capture tcpdump


To debug what kinds of packets trigger apps processor to wake up



In ADB shell


tcpdump -i any -s 0 -w /data/ip2.pcap

– 48 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

ST
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Packet Filtering and ARP Offload

– 49 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Packet Filtering and ARP Offload

Packet Filtering





There are two different types of Packet Filtering

ST





Filter received Multicast/Broadcast packets completely without passing them to host driver



Filter received Multicast/Broadcast packets selectively based on set rules

ARP Offload

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



Host offloads the process of sending ARP response messages



WCNSS sends ARP response messages

WCNSS_qcom_cfg.ini contains config params for Packet Filtering and ARP
Offload


Whenever the system is going into early suspend (screen off), wlan driver will apply the filters



Whenever the system is moving out of suspend (late resume) these filters will be cleared

– 50 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

ARP Offload and Packet Filtering during Concurrency

WCNSS stays in Active mode during concurrency (STA + P2P Client or STA +
P2PGo)



WCNSS Active mode Offloads is Disabled



al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P

ST





Config param gEnableActiveModeOffload=0



ARP offload and MC filtering is done in WCNSS when phone enters Suspend mode and
when WCNSS is in BMPS mode of operation



This implies that ARP offload and MC filtering will not happen during concurrency if
WCNSS Active mode Offloads is disabled

WCNSS Active mode Offloads is Enabled


Config param gEnableActiveModeOffload=1



ARP offload and MC filtering becomes independent of the BMPS mode



ARP offload and MC filtering works even in WCNSS Active mode



This implies that ARP offload and MC filtering will happen during concurrency if WCNSS
Active mode Offloads is enabled

– 51 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Packet Filtering and ARP Offload – Config Params



The following Config Params are supported in WCNSS_qcom_cfg.ini
Functionality

Allowed Values

mcastBcastFilter

To filter Mcast / Bcast Rx packets
completely

0: No filtering
1: Filter all Multicast.
2: Filter all Broadcast.
3: Filter all Mcast and Bcast

hostArpOffload

To enable HostARPOffload feature so
that ARP response will be sent

0 – Disable
1 – Enable

isMcAddrListFilter

To allow Mcast RX packets from
registered addresses only and filter
remaining Mcast and Bcast Rx packets

0 – Disable
1 - Enable

ST

Config param
in ini

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



If gEnableActiveModeOffload=1 following will be the behavior during concurrency
Concurrent Mode
STA + P2P Client

STA + P2P GO

ARP Offload
hostArpOffload=1
ARP Offload is enabled
for STA and P2P Client
modes.
ARP Offload is enabled
for STA mode Only.

MCPacket Filtering
isMcAddrListFilter=1
Packet Filtering is
enabled for both STA and
P2P Client modes
Packet Filtering is
enabled for STA mode
ONLY.
– 52 –

MCBC Filtering
McastBcastFilter=0
Currently Not Supported
in concurrency.
Currently Not Supported
in Concurrency.

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Packet Filtering and ARP Offload – Config Params (cont.)

mcastBcastFilter

0: No filtering 1: Filter all Multicast.
2: Filter all Broadcast. 3: Filter all Mcast and Bcast

hostArpOffload

0 – Disable 1 – Enable

isMcAddrListFilter

0 – Disable 1 - Enable

isMcAddrListFilter

ST

Allowed Values

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P

mcastBcastFilter

Config param in ini

hostArpOffload

0
1
2
3
0

0
0
0
0
1

0
0
0
0
0

1
2

1
1

3
0
1
2
3

1
0
0
0
0

0

1

1

1
2

1
1

1
1

3

1

1

0
0

0
1
1
1
1

Expected Behavior
Multicast Packets
Broadcast Packets
Filtered by FW/HW
Filtered by
FW /HW
NO
NO
YES
NO
NO
YES
YES
YES
YES – Except for the
YES
registered Addresses
YES
YES
YES – Except for the
YES
registered Addresses
YES
YES
NO
NO
YES
NO
NO
NO
YES
NO(filter internally
set to MC only)
YES – Except for the
YES
registered Addresses
YES
YES
YES – Except for the
YES
registered Addresses
YES
YES

– 53 –

ARP Rsp
NO
NO
NO
NO
NO
NO
NO
NO
YES
YES
YES
YES
YES
YES
YES
YES

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Packet Filtering and ARP Offload - IOCTLs

ST

The following IOCTLs are available to set Packet Filtering and ARP Offload
features
IOCTL
WLAN_PRIV_SET_MCBC_FILTER

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



Functionality

To filter Mcast/Bcast RX packets completely

WLAN_PRIV_CLEAR_MCBC_FILTER

To clear the filters for Mcast/Bcast RX packets

WLAN_PRIV_SET_HOST_OFFLOAD

To enable HostARPOffload feature so that ARP response
will be sent. This IOCTL can also be used for Neighbor
Discovery Offload.

WLAN_SET_PACKET_FILTER_PARAMS

To filter Mcast and Bcast RX packets selectively based
on filter params

– 54 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IOCTL - WLAN_PRIV_SET_HOST_OFFLOAD
IOCTL WLAN_PRIV_SET_HOST_OFFLOAD can be used for ARP Offload or
Neighbor Discovery Offload



Input Params





Offload Type


0 - WLAN_IPV4_ARP_REPLY_OFFLOAD



1 - WLAN_IPV6_NEIGHBOR_DISCOVERY_OFFLOAD

Enable Or Disable Flag


0 - WLAN_OFFLOAD_DISABLE



0x1 - WLAN_OFFLOAD_ENABLE



WLAN_OFFLOAD_ARP_AND_BC_FILTER_ENABLE
It is valid only in the context of ARP Offload type



Its value is (WLAN_OFFLOAD_ENABLE | WLAN_OFFLOAD_BC_FILTER_ENABLE)



0x2 - WLAN_OFFLOAD_BC_FILTER_ENABLE

If Offload Type is ARP and the request is for Enable

IPV6 Address






IPV4 Address




al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



ST



If Offload Type is Neighbor Discovery and the request is for Enable

Refer wlan_hdd_host_offload.h for more details
– 55 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IOCTL - WLAN_SET_PACKET_FILTER_PARAMS
WLAN_SET_PACKET_FILTER_PARAMS
Packet Filtering feature enables FW to filter multicast and broadcast packets and send
only those packets that match the configured filter rules up to the host SW even when the
Host is active



Provides flexibility to filter intended multicast and broadcast packets at reception in STA
Active mode



Received packets that do not match the filter rules set will be dropped and not sent to
host



Unicast frames will unconditionally be sent to host



Parameters are configured dynamically through a private IOCTL

ST



al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



– 56 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IOCTL - WLAN_SET_PACKET_FILTER_PARAMS (cont.)
Packet Filtering IOCTL requires input parameters
filterAction – Enum Type To Set and Clear filters



filterId – ID of the filter



numParams – Number of parameters/frame headers to add for filtering



paramsData – Array of structures with protocol layer header, comparison flags & data
fields corresponding to the header as below

ST



al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P





protocolLayer – Type of protocol layer header to which the data being configured correspond



cmpFlag – Comparison type



dataOffset – Offset of the data to compare from the respective protocol layer header start (as per
the respective protocol specification) in terms of bytes



dataLength – Length of data to compare



compareData – Array of 8 bytes



dataMask – Mask to be applied on the received packet data (array of 8 bytes)

– 57 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IOCTL - WLAN_SET_PACKET_FILTER_PARAMS (cont.)
Possible values for the input parameters
filterAction can have 2 valid values





filterId can have the following possible values




filterId = 0 to 9

Elements of paramsData structure can take the following values






filterAction = 1 means to set the filter
filterAction = 2 means to clear the filter

ST



al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



protocolLayer = 1 for MAC header
protocolLayer = 2 for ARP header
protocolLayer = 3 for IP header

cmpFlag can have the following values











cmpFlag = 0 means comparison is invalid
cmpFlag = 1 means compare for equality of the data present in received packet to the
corresponding configured data
cmpFlag = 2 means for equality of the data present in received packet to the corresponding
configured data after applying the mask
cmpFlag = 3 means compare for non-equality of the data present in received packet to the
corresponding configured data
cmpFlag = 4 means compare for non-equality of the data present in received packet to the
corresponding configured data after applying the mask
cmpFlag can be programmed with any of the above values in such a way that received frames can
selectively be allowed to host or dropped at FW

– 58 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IOCTL - WLAN_SET_PACKET_FILTER_PARAMS (cont.)

ST

Example (1) – Add a filter for IPv6 multicast packets (multicast address starting
with 0x33 33) at FW even when host is in Active mode and FW will allow/push
the packets matching with this filter to host. All other data packets received which
do not fall into this filter category will be dropped by FW and will not be allowed to
host


al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



With filterAction = 1, filterId = 2, numParams = , 2paramsData [0]. protocolLayer = 1,
paramsData [0].cmpFlag = 3, paramsData [0].compareData = 0x333300000000,
paramsData [0].dataMask = 0xFFFF00000000, paramsData [0].dataOffset = 4,
paramsData [0]. dataLength = 6 ; paramsData [1]. protocolLayer = 1, paramsData
[1].cmpFlag = 1, paramsData [1].compareData = 0x86DD, paramsData [1]. dataLength
= 2 & paramsData [1].dataOffset = 34,

– 59 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IOCTL - WLAN_SET_PACKET_FILTER_PARAMS (cont.)
Example (2) – To drop IPv6 multicast frames with IP address range as FFxx::\16
at FW, the filter need to be configured as follows
filterAction = 1



filterId = 7 (can be any value from 0 to 9)



numParams = 4



paramsData [0]. protocolLayer = 2, paramsData [0].cmpFlag = 3, paramsData
[0].dataOffset = 6, paramsData [0]. dataLength = 2 , paramsData [0].compareData =
0x86DD, paramsData [0].dataMask = 0x0



paramsData [1]. protocolLayer = 3, paramsData [1].cmpFlag = 4, paramsData
[1].dataOffset = 24, paramsData [1]. dataLength = 2, paramsData [1].compareData =
0xFF, paramsData [1]. dataMask = 0xFF



paramsData [2]. protocolLayer = 3, paramsData [2].cmpFlag = 3, paramsData
[2].dataOffset = 28, paramsData [2]. dataLength = 8, paramsData [2].compareData =
0x0, paramsData [2].dataMask = 0x0



paramsData [3]. protocolLayer = 3, paramsData [3].cmpFlag = 3, paramsData
[3].dataOffset = 36, paramsData [3]. dataLength = 4 , paramsData [3].compareData =
0x22, paramsData [3].dataMask = 0x0

ST



al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



– 60 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

IOCTL - WLAN_SET_PACKET_FILTER_PARAMS - Test with iwpriv
Command to set filter to drop ipv4 MC (address range :- 224.0.0.0 to
239.255.255.255) by using mask not equal(4)



Command that clears above ipv4 MC filter




adb shell iwpriv wlan0 setPktFilter 2 8 1 3 4 16 1 224 0 0 0 0 0 0 0 240 0 0 0 0 0 0 0 0 0 0
000000000000000000

Command to set filter to drop ipv6 MC (address range :- FFxx::\16) by using not
equal(3) and mask not equal(4)




adb shell iwpriv wlan0 setPktFilter 1 8 1 3 4 16 1 224 0 0 0 0 0 0 0 240 0 0 0 0 0 0 0 0 0 0
000000000000000000

ST



al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



adb shell iwpriv wlan0 setPktFilter 1 7 4 2 3 6 2 134 221 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 4 24
2 255 0 0 0 0 0 0 0 255 0 0 0 0 0 0 0 3 3 28 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 3 36 4 0 0
0 22 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Command that clears the ipv6 MC filter


adb shell iwpriv wlan0 setPktFilter 2 7 4 2 3 6 2 134 221 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 4 24
2 255 0 0 0 0 0 0 0 255 0 0 0 0 0 0 0 3 3 28 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 3 36 4 0 0
0 22 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

– 61 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

ST
al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P

Driver Implementation

– 62 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Packet Filtering and ARP Offload – Driver Implementation
Whenever the system goes into early suspend (screen off), wlan driver will apply
the filters based on config params



Based on ini params appropriate function is called in early suspend to filter
packets

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P

ST





hdd_conf_hostarpoffload() - To enable ARP Offload feature



wlan_hdd_set_mc_addr_list() - To allow Mcast RX packets from registered addresses
only and filter remaining Mcast and Bcast Rx packets



sme_ConfigureSuspendInd() - To filter Mcast / Bcast Rx packets completely

– 63 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Call Graph - ARP Offload (config param)

ST

Call Graph for setting ARP Offload feature through ini param hostArpOffload

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



– 64 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Call Graph - ARP Offload (IOCTL)

ST

Call Graph for setting ARP Offload feature through IOCTL

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



– 65 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Call Graph - MC/BC Packet Filtering (Config Param)

ST

Call Graph for filtering Mcast/Bcast pkts completely through ini param
mcastBcastFilter

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



– 66 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Call Graph - MC/BC Packet Filtering (IOCTL)
Call Graph for filtering Mcast/Bcast pkts completely through IOCTL



The above function call flow will happen if WLAN is already in suspended state



Otherwise the filter is set as part of next suspend event

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P

ST





Similar to the call graph corresponding to ini param mcastBcastFilter

– 67 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Call Graph - Packet Filter ALL and allow only from Registered
Addresses

ST

Call Graph for filtering ALL Mcast/Bcast pkts except the Mcast pkts from
registered addresses when isMcAddrListFilter is set

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



– 68 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Call Graph - Packet Filtering Based on Set Rules (IOCTL)

ST

Call Graph for filtering Mcast/Bcast pkts based on set rules through IOCTL

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



– 69 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

ST
al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P

Preferred Network Offloading (PNO)

– 70 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

PNO
PNO enables a high-level application to request the WLAN firmware to look for
networks of choice in an efficient manner.



The user application can save a list of preferred SSIDs.



WCNSS FW software scans for such SSIDs based on a higher level application
request, provided that the system is in the early suspended state, which enables
aCPU to preserve power while WCNSS looks for a preferred network.



WCNSS will notify aCPU if any of the saved SSIDs are found OTA.



Private IOCTL is exposed from driver to enable/disable PNO.



The PNO default scan interval is 5 seconds if the PNO scan timer is not set.



PNO scans for preferred networks start at aCPU early suspend state and stop as
soon as aCPU in late resume state.

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P

ST



– 71 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Host-Affected Components

ST

PNO code is featurized with the FEATURE_WLAN_SCAN_PNO flag

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



– 72 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Host-Affected Components (cont.)



HDD
Exposes configuration IOCTL to set up preferred network list either via private IOCTL
with “pno” command or via extended private IOCTL, WLAN_SET_PNO
(SIOCIWFIRSTPRIV + 24)



Sends IWEVCUSTOM event to supplicant to notify preferred network found



wlan_hdd_wext.c

ST





iw_set_pno function handle PNO requests



found_pref_network_cb function sends IWEVCUSTOM event to supplicant

SME


Updates scan parameters to WCNSS initially and as soon as changes occur




al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P



csrApiScan.c, pmcUpdateScanParams in csrApplyChannelPowerCountryInfo when changes occur



Posts WDA_SET_PNO_REQ message to WDA module with PNO settings



Callback HDD when getting indication eWNI_SME_PREF_NETWORK_FOUND_IND with
preferred network found

WDA/WDI


Sends PNO request to WCNSS via SMD



Handles WDI_PREF_NETWORK_FOUND_IND indication from WCNSS when preferred
network found and sends message eWNI_SME_PREF_NETWORK_FOUND_IND to
SME
– 73 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

PNO Parameters





: SSID length of the preferred network



: Preferred network SSID



: Authentication (0 – any authentication). Please refer to wlan_hal_msg.h, tAuthType
type



: Encryption (0 – any encryption). Please refer to wlan_hal_msg.h, tEdType type



: Number of channels. If 0 is mentioned, then all 2.4G/5G channels will be scanned.



: Channel number to scan. If 0 is set for , then this can be skipped



: preferred SSID is broadcast or hidden.








ST



: 0- disable, 1- enable
: Number of networks in preferred list
For each network

al 201
vi 3
s. .1
hu 1.
2
11 an 5 a
g
4.
t
32 -qi 17
.2 sd :2
00 a. 1:
.9 co 03
4
m P





0: Don’t know: Broadcast probe will be send first and if no probe response is received then a directed Probe
request will be send



Broadcast: Only broadcast Probe requests will be send



Hidden: Only directed Probe requests for that SSID will be send

: RSSI threshold, beyond this RSSI value the network will not be reported to APPS

: Number of scan timers. Max number of scan timers is 10.
For each scan timer


: scan interval in secs



: Number of times to scan using the scan interval. 0 means scan continuously till PNO
disabled

: 1 – to start PNO when aCPU in early suspend state and stop when in late resume
state
– 74 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

PNO Command Line Test
adb shell iwpriv wlan0 setpno "1 1 5 Prima 0 0 3 1 6 11 0 90 2 45 8 300 0 1"
‘1’: Enable PNO



‘1’ :1 network in preferred list



‘5’: SSID “Prima” length is 5



‘4’: ‘Prima’ as preferred network SSID



‘0’: any authentication



‘0’: any encryption



‘3’: Number of channels is 3 as channel 1, 6 and 11.



‘1 6 11’: scan channel 1, 6 and 11



‘0’: Don’t know: Broadcast probe is sent first, and if no probe response is received, then a
directed Probe request is sent



‘90’: RSSI threshold as -90



‘2’: Number of scan timers is 2



‘45’: First timer scan interval is 45 seconds



‘8’: scan 8 times every 45 seconds



‘300’: Second timer scan interval is 300 seconds



‘0’: scan every 300 seconds until PNO is disabled



‘1’: PNO scan to work in aCPU late suspend mode

ST



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

– 75 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Integrate PNO in Android


Android framework has background scan implementation which relies on Wifi
PNO or RTC timer itself to scan periodically for preferred network
Set config_wifi_background_scan_support flag in
frameworks/base/core/res/res/values/config.xml to define using Wifi PNO or RTC timer
periodic wakeup scan





true: wifi chipset supports background scanning mechanism (PNO); this mechanism allows the
host to remain in suspend state and the wlan firmware to actively scan and wake the host when a
configured SSID is detected; set to true to use Wifi PNO



false: default value; use RTC timers to do periodic wakeup scan

wpa_supplicant has android_pno_start and android_pno_stop function attached
to framework to enable and disable PNO




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ST



In external/wpa_supplicant_8/src/drivers/driver_nl80211.c, customers have to change
these functions’ implementation for WCN solution PNO parameters

wpa_supplicant has to handle custom event received from driver


Customers have to modify wpa_supplicant to handle the event accordingly

– 76 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

ST
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MSM8974 WCN-SS Power Optimizations

– 77 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

Power Management Changes for MSM8974 WCN-SS
SPM (Subsystem Power Manager)


cMEM

ST



SPM controls the IRIS XO, PLL



Limit access to the MSM DDR during low-power mode of operation



Increase the cMEM size by an additional 64 KB

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



Total cMEM is 120 KBytes (56 KB + 64 KB)



uBSP running from cMEM to support WLAN BMPS and BT LPPS operations

– 78 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

SPM (Subsystem Power Manager) Updates for MSM8974 WCN-SS
Change to the warm-boot sequence
Wakeup from RPM/aCPU triggers SPM



SPM starts the power-up sequence



ST





SPM performs handshake with RPM to request resources



RPM enables WCN resources and acknowledges the request



SPM configures 5-wire WLAN GPIOs to prepare the 48 MHz Iris XO



SPM configures WCN36x0 clock plan and enables the 48 MHz XO (if used)



SPM enables WCN-SS 960 MHz PLL

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

ARM9 starts fetching instructions from DDR/cMEM

– 79 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

cMEM (additional 64KB) Updates for MSM8974 WCN-SS



Minimize DDR access to
reduce the power
consumption in the lower
power mode (WLAN
BMPS and BT LPPS)



uBSP code will run in
cMEM space in the
lower-power mode

ST

Low-Power Mode

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

– 80 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

al 201
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ST

uBSP in Low-Power Mode for MSM8974 WCN-SS

– 81 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

WLAN/BT Low-Power Mode for MSM8974 WCN-SS

WLAN Low-power mode


WLAN BMPS mode handling in cMEM
ST





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TIM SET (Unicast Data Pending) – Fetch the instructions from DDR
 DTIM SET (B/Mcast Data Pending) – Fetch the instructions from
DDR
 TIM CLEAR – Power Down (no instruction fetching from DDR)


BT Low-power mode


BT LPPS (Low-Power Page Scan) handling in cMEM


1.28 Seconds Timer Interrupt

– 82 –

Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

References
Ref.

Document

Qualcomm
Application Note: Telescopic Beacon Wakeup

Q2

WCNSS Android™ Configuration Guide

Q3

WCNSS Windows Configuration Guide

80-N7461-1

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ST

Q1

80-N8140-1
80-N5047-23

– 83 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F

ST
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Questions?

– 84 –
Confidential and Proprietary - Qualcomm Atheros, Inc. | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-Y0513-3 Rev. F



Source Exif Data:
File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.5
Linearized                      : No
Encryption                      : Standard V1.2 (40-bit)
User Access                     : Print, Copy, Annotate, Fill forms, Extract, Assemble, Print high-res
Tagged PDF                      : Yes
XMP Toolkit                     : Adobe XMP Core 5.2-c001 63.139439, 2010/09/27-13:37:26
Modify Date                     : 2013:02:08 08:59:37-08:00
Create Date                     : 2013:02:08 08:52:12-08:00
Metadata Date                   : 2013:02:08 08:59:37-08:00
Creator Tool                    : Acrobat PDFMaker 10.1 for PowerPoint
Document ID                     : uuid:50d95ace-7e28-48f0-9549-5d95a573a1bc
Instance ID                     : uuid:501281e9-fac1-443e-9fa3-2b3d22513f3f
Format                          : application/pdf
Title                           : QCA WCN36x0 WLAN Power Optimization Guide
Creator                         : QCA
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Dflag TM5 UK                    : No
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Dflag TM8 QCA                   : Yes
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Dflag TM10 QCA                  : Yes
Dflag Cond TM0 QCA              : No
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Content Type Id                 : 0x010100C7F53D1C2281474489CD85ABC16E4D10
Dflag Proprietary 7 Is          : No
Dflag TM2 SD                    : Yes
Dflag Cond TM6 Fl               : No
Dflag Permissions 4 SD          : No
Dflag Address 7 SD              : No
Dflag Cond TM0 In               : No
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Dflag Cond TM3 Is               : No
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Dflag Restricted 3 Is           : No
Dflag TM5 Fl                    : No
Dflag Copyright 4 In            : No
Dflag Rights 4 Is               : No
Dflag Copyright 7 Is            : No
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Dflag Cond TM4 SD               : No
Dflag TM2 Is                    : No
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Dflag Permissions 1 In          : No
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Tag dlc Doc Id Item Guid        : 8569fd4b-dd3a-4b4a-bdf5-8189b1406643
Dflag TM7 Fl                    : No
Dflag TM1 In                    : No
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Dflag Address 0 Is              : No
Dflag Copyright 1 SD            : No
Dflag Permissions 6 Fl          : No
Dflag TM4 In                    : No
Dflag Proprietary 1 Is          : No
Dflag Restricted 3 SD           : No
Dflag Controlled 1 SD           : Yes
Dflag Rights 4 SD               : No
Dflag Permissions 0 In          : Yes
Dflag Address 3 In              : No
Dflag TM7 Is                    : No
Dflag Export Footer 0 SD        : Yes
Dflag Copyright 7 SD            : No
Dflag Cond TM0 Fl               : No
Dflag Export 1 Fl               : No
Dflag Proprietary 4 In          : No
Dflag Permissions 3 Is          : No
Dflag Address 6 Is              : No
Dflag Address 1 SD              : No
Dflag Rights 1 Fl               : No
Dflag Proprietary 2 SD          : No
Dflag Permissions 6 In          : No
Dflag Copyright 4 Fl            : No
Dflag Controlled 4 Fl           : Yes
Dflag Copyright 1 Is            : Yes
Dflag Controlled 1 Is           : Yes
Dflag Cond TM6 In               : No
Dflag Permissions 1 Fl          : No
Dflag Address 4 Fl              : Yes
Dflag Export Footer 0 Is        : No
Dflag Proprietary 5 Fl          : No
Dflag Address 1 Is              : No
Dflag Controlled 2 SD           : No
Dflag Copyright 2 SD            : No
Dflag TM5 In                    : No
Dflag Proprietary 2 Is          : No
Dflag Export Footer 1 SD        : No
Dflag Cond TM1 Fl               : No
Dflag Export 2 Fl               : No
Dflag Restricted 1 Fl           : Yes
Dflag Address 2 SD              : No
Dflag Rights 2 Fl               : No
Dflag Proprietary 3 SD          : No
Dflag Permissions 7 In          : No
Dflag TM0 Fl                    : No
Dflag Copyright 5 Fl            : No
Dflag Controlled 5 Fl           : No
Dflag Copyright 2 Is            : No
Dflag Controlled 2 Is           : No
Dflag Export 0 SD               : Yes
Dflag Cond TM7 In               : No
Dflag Permissions 2 Fl          : No
Dflag Address 5 Fl              : No
Dflag Export Footer 1 Is        : No
Dflag Rights 0 SD               : Yes
Dflag Proprietary 6 Fl          : No
Dflag Copyright 3 SD            : No
Dflag Proprietary 0 In          : No
Dflag TM6 In                    : No
Dflag Proprietary 3 Is          : No
Dflag Address 2 Is              : Yes
Dflag Controlled 3 SD           : No
Dflag Export Footer 2 SD        : No
Dflag Cond TM2 Fl               : No
Dflag Export 3 Fl               : No
Dflag Restricted 2 Fl           : No
Dflag Permissions 0 SD          : Yes
Dflag Address 3 SD              : No
Dflag Rights 3 Fl               : No
Dflag Export 0 Is               : No
Dflag TM1 Fl                    : No
Dflag Copyright 6 Fl            : No
Dflag Proprietary 4 SD          : No
Dflag Copyright 0 In            : Yes
Dflag Rights 0 Is               : No
Dflag Copyright 3 Is            : No
Dflag Controlled 3 Is           : No
Tag Author Email                : joonlee@qca.qualcomm.com
Dflag Cond TM0 SD               : No
Dflag Export 1 SD               : No
Dflag Permissions 3 Fl          : No
Dflag Address 6 Fl              : No
Dflag Export Footer 2 Is        : No
Dflag Rights 1 SD               : Yes
Dflag Proprietary 7 Fl          : No
Dflag Address 0 In              : No
Dflag Copyright 4 SD            : No
Dflag Proprietary 1 In          : No
Dflag TM7 In                    : No
Dflag Permissions 0 Is          : Yes
Dflag Address 3 Is              : No
Dflag Controlled 4 SD           : Yes
Dflag Proprietary 4 Is          : No
Dflag Cond TM3 Fl               : No
Dflag Restricted 3 Fl           : No
Order                           : 3400
Dflag Permissions 1 SD          : No
Dflag Address 4 SD              : No
Dflag Rights 4 Fl               : No
Dflag Cond TM0 Is               : No
Dflag Export 1 Is               : No
Dflag Copyright 7 Fl            : No
Dflag Proprietary 5 SD          : No
Dflag TM2 Fl                    : No
Dflag Copyright 1 In            : No
Dflag Rights 1 Is               : No
Dflag Controlled 1 In           : Yes
Dflag Controlled 4 Is           : Yes
Dflag Copyright 4 Is            : No
Dflag Cond TM1 SD               : No
Dflag Export 2 SD               : No
Dflag Export Footer 0 In        : No
Tag Email Subject               : update 80-Y0513-3
Dflag Restricted 1 SD           : Yes
Dflag Permissions 4 Fl          : Yes
Dflag Address 7 Fl              : No
Dflag Rights 2 SD               : No
Dflag Address 1 In              : Yes
Dflag TM0 SD                    : Yes
Dflag Copyright 5 SD            : No
Dflag Proprietary 2 In          : No
Dflag Permissions 1 Is          : No
Dflag Address 4 Is              : No
Dflag Controlled 5 SD           : No
Dflag Proprietary 5 Is          : No
Dflag Cond TM4 Fl               : No
Dflag Permissions 2 SD          : No
Dflag Address 5 SD              : No
Dflag Cond TM1 Is               : No
Dflag Export 2 Is               : No
Dflag Proprietary 6 SD          : No
Dflag Restricted 1 Is           : Yes
Dflag TM3 Fl                    : No
Dflag Copyright 2 In            : No
Dflag Rights 2 Is               : No
Dflag Controlled 5 Is           : No
Dflag TM0 Is                    : No
Dflag Copyright 5 Is            : No
Dflag Controlled 2 In           : No
Dflag Cond TM2 SD               : No
Dflag Export 3 SD               : No
Dflag Export Footer 1 In        : No
Dflag Permissions 5 Fl          : No
Dflag Restricted 2 SD           : No
Dflag Rights 3 SD               : No
Dflag Address 2 In              : No
Dflag TM1 SD                    : Yes
Dflag Copyright 6 SD            : No
Dflag Proprietary 3 In          : No
Dflag Permissions 2 Is          : No
Dflag Address 5 Is              : No
Dflag Proprietary 6 Is          : No
Tag Author Email Display Name   : Lee, Joon
Department-specific 003F        : No
Software                        : 3
Tag Previous Ad Hoc Review Cycle ID: -490703094
Page Layout                     : SinglePage
Page Mode                       : UseOutlines
Page Count                      : 84
Dlc Doc Id Item Guid            : 8569fd4b-dd3a-4b4a-bdf5-8189b1406643
Keywords                        : Downloaded, by:, alvis.huang-qisda.com, Downloaded, by, IP, Address:, 114.32.200.94
Author                          : QCA
Subject                         : 80-Y0513-3 Rev. F
Department-specific             : No
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