89758600A_AT310 A_TTL_A_Q DSA_Bus_Expander_CE_Jul76 89758600A AT310 A TTL Q DSA Bus Expander CE Jul76
89758600A_AT310-A_TTL_A_Q-DSA_Bus_Expander_CE_Jul76 89758600A_AT310-A_TTL_A_Q-DSA_Bus_Expander_CE_Jul76
User Manual: 89758600A_AT310-A_TTL_A_Q-DSA_Bus_Expander_CE_Jul76
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89758600
CONTR..OL DATA
CORPORATION
CONTROL DATA®
TTL A/Q-DSA BUS EXPANDER
AT310-A
GENERAL DESCRIPTION
OPERATION AND PROGRAMMING
INSTAllATION AND CHECKOUT
THEORY OF OPERATION
DIAGRAMS
MAINTENANCE
PARTS DATA
WIRE LISTS
MAINTENANCE AIDS
HARDWARE REFERENCE/
CUSTOMER ENGINEERING MANUAL
REVISION RECORD
DESCRIPTION
REVISION
01
Released to Class B, 15 November 1974 ECO CKI026
A
Released to Class A bv ECO CK1535. dated 1 July 1976
Publication No,
89758600
© 1974.
1975. 1976
by Control Data Corporation
Printed in the United States of America
ii
Address comments concerning this
manual to:
Control Data Corporation
Small Computer Development Division
4455 Eastgate Mall
La Jolla, California 92037
or use Comment Sheet in the back of
this manual.
MANUAL TO EQUIPMENT LEVEL CORREI.ATIOf" SHEET
--
EQUiPMENTS
I 0'-1.
SNUT_
--~---~At\IlIAl
REV
FfeK~R ECO
. SERIES
SIN
LOGIC DIA(
01
ECO CK762
ECO CK941
02
03
51
101
03
1047
1072
1274
A
1535
03
04
04
333-336
339,345,
346
:
A
.
iii
89758600 A
TABLE OF CONTENTS
SECTION
GENERAL DESCRIPTION
Introduction
OPERATION AND PROGRAMMING
INSTALLATION AND CHECKOUT
Installation
Unpacking
Physical Limitations
Power Requirements
Cabling and Connectors
Cooling Requirements
Environmental Considerations
Preparation and Installation
Checkout
THEORY OF OPERATION
Introduction
General
Circuit Types
Propagation Delay
Fan-In and Fan-Out
Basic PWA Differences
Interrupt and Scanner Connections
Interrupt Connections
DSA Scanner Connections
Signal Routing
A/Q Expansion
DSA Expansion
LOGIC DIAGRAMS
Key to Logic Symbols
Signal Flow
Logic Diagram
MAINTENANCE
Scope
Tools and Equipment
Publications
Maintenance
MAINTENANCE AIDS
PARTS DATA
Parts Data
WIRE LIST
Wire Li st
1
2
3
4
5
6
7
8
9
89758600
(
Page
A
1-1
3-1
3-1
3-1
3-1
3-1
3-2
3-2
3-2
3-3
4-1
4-2
4-3
4-6
4-6
4-6
4-8
4-8
4-8
4-10
4-10
4-10
5-1
5-2
5-4
6-1
6-1
6-1
6-1
8-1
9-1
v
TABLES
Page
TABLE
1-1
3-1
9-1
9-2
SPECIFICATIONS
INTERRUPT POSITIONS
EXTERNAL CABLE WIRE LIST
PWB PIN LIST
1-3
3-7
9-2
9-10
FIGURES
Page
Figure
1-1
3-1
3-2
4-1
4-2
4-3
vi
BASIC A/Q - DSA EXPANSION CONFIGURATION
LOCATIONS OF PWA's IN ENCLOSURE
LOCATIONS FOR JUMPER PLUG PLACEMENT
EXPANSION THROUGH TWO ENCLOSURES
LINE DRIVER CIRCUITS
SCANNER CONNECTIONS
1-1
3-5
3-6
4-2
4-4
4-9
89758600 . A
SECTION 1
GENERAL DESCRIPTION
INTRODUCTION
The CONTROL DATA(8) AT310-A TTL A/Q-DSA Bus Expander
consists of two basic 50-Pak TTL type IC logic
assemblies and a flat cable, used in either the A/Q or DSA
bus to expand the capabilities of the CPU. The AT310-A
may be used with the standard BT148-A Expansion Enclosure
or in a special purpose enclosure and the AB107/AB108 cpu.
Up to two expansion enclosures may be connected to the computer, each with a set of expanders. When expansion of both
the A/Q and DSA buses is required, two sets of ~xpanders must
be used.
Figure 1-1 shows the expansion of both the A/Q and DSA buses,
using two sets of expanders. The flat cable supplied, is
connected to P2 in each enclosure.
A/Q SLOT
A/Q SLOT
EXPANOER
PWA
EXPANDER
PWA
"M"
"R"
CQN FI GURATI 0'
tONFlGURATION P2
P}-
II
ABl07/ABl08
COMPUTER
DSA SLOT
DSA SLOT
FLAT CABLE
ASSY
EXPANDER
PWA
EXPANDER
PWA
"M"
ONFIGURATION P2
1"1
Figure 1-1.
89758600
'A
EXPA...SION
ENCLOSUR£
"R"
P2
CONFIGURATI!»
r
Basic A/Q-DSA Expansion Configuration
1-1
TABLE 1-1.
Specifications
SPECIFICATIONS
Explanation
PHYSICAL CHARACTERISTICS
Dimensions
Width
13.lnc hes
616
length
12 ~ inches
Depth
~ inches
ENVIRONMENT
Temperature
Shipping
Storage
Operating
Humidity
Shipping
Storage
Operating
-40°F ~o 158°F (-40 0 e
to 70 C)
14°F to 122°F (lOoe
to 50 0 e)
40 0 b to 120°F (Soe to
50 e)
o to
100% RH non-condensing
10% to 90% RH non-condensing
10% to 90% RH non-condensing
POWER
Input Requirements
Signal level
Low State (0)
High State (l)
Ground
89758600 A
5 Volts dc
0.4 Volts dc, or less
2.4 Volts dc, or more
Logic ground is connected
to computer logic ground
1-3
SECTION 2
OPERATION AND PROGRAMMING
OPERATION
AND
PROGRAMMING
Programming of the AT310-A TTL A/Q-DSA Bus Expander is not
required. Refer to the 1784 Computer Reference Manual or to
the AB107/AB1OB Computer Customer Engineering Manual and the
reference or customer engineering manuals of the controllers
to be used with the system,for programming.
Refer to Section 3 for installation, checkout and operation
of the bus expander.
89758600
IA,
2-1
,(
\
(
"
\
(
SECTION 3
INSTALLATION AND CHECKOUT
INSTALLATION
Unpacking
1. Carefully remove wrapping from the AT310-A TTL A/Q-DSA Bus Expander PWA's.
Check for physical damage to each and record damage on the packing list.
Cneck that part. numbers agree with packing list.
2.
Remove wrapping from cable and check for physical damage. Record damage
on packing list. Check that part number agrees with packing list.
Physical Limitations
Care must be taken to prevent damage to the bus expander PWA's. They must not
be f1exed t bent or dropped.
Power Requirements
The bus expanders require +5 vdc derived from the power supply of the
AB107/AB108.
Cabling and Connectors
An external interconnecting flat-cable is available for use between the
controller and the distribution unit. The cable part number is 89821800.
is approximately four feet long.
It
89758600 A
3-1
Where two sets of expander PWA's are required, two sets of flat cables must
be installed.
Cooling Requirements
The expander PWA's are cooled by the forced air system of the enclosure. No
further cooling is required. Refer to the computer customer engineering
manual (89633300) for further information concerning cooling capabilities of
the computer and expansion enclosure.
Environmental Considerations
The environmental considerations necessary for operation (or storage) of the
controller cards are listed in Table 1-1.
Preparation and Installation
To install the TTL bus expanders perform the following with the computer power
switched "off":
1.
Remove the air-flow blocks from lower slide of card slots to be used in
both the main and remote enclosures. Refer to Figure 3-1 for selection of
the location for PW board.
2.
Inspect both enclosures, card slots, PW board slides and connector pins,
for physical damage.
3. Place the internal select jumpers in the positions on each PWA's as
descrjbed below and shown in Figure 3-2:
3-2
89758600 A
For A/Q expansion:
/,.-/. - . -.-::-:-::=::::.-".~
On
1)
2)
3)
4)
the main enclosure PWA (89821600 O(89876~.9J/
At Ul, place jumper plugs at 1 and at~both marked M)
Below U6-U7 (~rked AQ~), place jumper plug.
Below U20, place jumper plug at 6 (marked AQM).
At U40, place jumper plugs at 12, 15 and 16 (marked M, Mand
AQM res pecti ve ly) .
the remote enclosure PWA (89759200 or ~~.QJ
At Ul,place jumper plugs at 2 and at 4 (marked R).
Below U6-U7 (marked AQM-DSR) place jumper plug.
Below U20, place jumper plug at 5 (marked AQR).
Below U34-U35, place jumper plug at 9 (marked R), at 10
(marked AQR) and at 11 (marked R).
5) At U40, place jumper plugs at 13, 14 and 17 (marked AQR,
Rand R respectively).
On
1)
2)
3)
4)
For DSA expansion:
On
1)
2)
3)
4)
the remote enclosure PWA (89759200 or 89880700)
At Ul, place jumper plugs at 2 and at 4 (both marked R).
Below U6-U7 (marked DSR-AQM), place jumper plug.
Below U20, place jumper plug at 7 (marked DSR).
Below U34-U35, place jumper plug at 9 (marked R) and
11 (marked R).
5) At U40, place jumper plugs at 16, 14 and 17 (marked R, DSR
and R respectively).
On
1)
2)
3)
the main enclosure PWA (89821600 or 89876000)
At Ul, place jumper plugs at 1 and at 3 (both marked M).
Below U20. place jumper plug at 8 (marked DSM).
Below U34-U35, place jumper plug at 9, 10 and
11 (marked DSM).
4) At U40, place jumper plugs at 12, 13 and 15 (marked M, DSM
and M, respectively).
89758600 A
3-3
CAUTION
Do not install cables or expanders
PWA's in computer enclosure or
expansion enclosure with power on.
4.
Interrupt connections are transferred to the computer through the Sint
line driver receivers. Connect a wire jumper from the controller Interrupt
signal to an available Sint position on Pl of the A/Q expansion position in
the remote enclosure. Connect a wire jumper from chosen Sint pin in the
computer A/Q expansion enclosure to the required Interrupt position on the
CPU.· Refer to Table 3-1 for Interrupt positions available for selection.
5.
Scanner connection must be made by connecting wire jumpers from the scanner
sections of required controllers through MTR and RTM signals. See Figure
4-3 of Section 4.
Signal MTR is connected to P1B19.
Signal RTM is connected to P1A19.
6.
Install expander flat cable(s) on back-plane at P2 in the position assigned.
7.
Carefully install the bus expander PWA's ( part no. 89821600 or 89876000
for the main enclosure and 89759200 or 89880700 for the remote enclosure)
in each enclosure, making certain that it slides in smoothly.
CHECKOUT
1.
Refer to the CPU reference manual, publication number 89633400 and to the
reference or maintenance manuals for the controllers used with this expander
for progamming and operation of that equipment.
2.
Perform diagnostics checks for each of the controllers used with this equipment, as described in the Systems Maintenance Moni tor r1anua1 (SMMl7), publication number 60182000.
3-4
89758600 A
ex>
1.0
......
U'l
ex>
0'1
o
o
>
EIGHT
CENTRAL
MEMORY
PROCESSING
DISK
MAGNETIC
ENCOD-
MODULES
UNIT
DRIVE
TAPE
ING
CONTROL-
TRANSPORT
LER
CONTROLLER
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12
W
I
U'l
PHASE
NRZI
CARTRIDGE
Figure 3-1.
Locations of PWA's in Enclosure
"
A/Q
DSA
A/Q
BUS
BUS
BUS
FOR MATTER
10 9
8
7
6
5 4
3
2
I
£s • • • • • • • • • • • • • • • • • • '
••••• •
W
I
O"l
........-
co
~
'-I
Ul
co
O"l
o
o
>-
Figure 3-2.
Locations For Jumper Plug
Plac~ment
• • • • • • •1
~3CJNvdX3
sna 1ll
TABLE 3-1.
SIGNAL NAME
INPUT/OUTPUT
SINT 1
2
SINT 3
SINT 4
SINT 5
SINT 6
SINT7
SINT 8
SINT 9
SINT 10
SINT 11
sun 12
SINT 13
SINT 14
SINT 15
P1A24
P1A25
P1A26
P1A27
P1A28
P1A20
P1 A31
P1B20
P1B24
P1B25
P1B26
P1B27
P1B28
P1830
P1831
snn
89758600
A
INTERRUPT POSITIONS
3-7
SECTION 4
THEORY OF OPERATION
INTRODUCTION
This section presents general and detailed functional descriptions of the
equipment, using aids such as overall and detailed block diagrams.
Descriptions are keyed to the detailed logic diagrams in the diagram
section (Section 5) and afford"a basis in understanding the detailed
description of the specific circuit in that section.
NOTE
It is assumed that the reader is familiar with
Control Data equipment and with the programming
characteristics of the Computer as described
in the 1784 Computer System Reference Manual,
Publication Number 89633400.
89758600 A
4-1
GENERAL
The AT3l0-A TTL A/Q-DSA Bus Expander i~ comprized of two standard 50-PAK PWA'3
and a single interconnecting flat cable. Both PWA's use the sampe type of
board, but have different components. The main PWA is installed in the AB107/AB108
enclosure with its jumper plugs placed as described in Section 3, while the
remote PWA (with jumper plugs set) is placed in either the BT148-A expansion
enclosure or another suitable enclosure. The function of each expander is set
by placing or omitting jumper plugs from the positions shown in Figure 3-2.
Access in and out of the enclosures is made by leading the flat cable
through the slots in the case on the backside of the enclosures.
Two sets of bus expanders may be used to extend the capabilities of both the A/Q
and DSA buses. The AB107/AB108 will allow the use of a maximum of two expansion
enclosures employing both the A/Q and the DSA buses, as shown in Figure 4-1.
AB107/AB108 COMPUTER
(MAIN ENCLOSURE)
(E) = EXPANDER PWA
A/Q
SLOT
(E)
(E)
A/Q
ENCLOS SLOT
URE --DSA
SLOT
1
I
I
J
I
I
DSA
SLOT I
ENCLOSURE
2
J
(E)
(E)
Figure 4-1.
4-2
(E)
A/Q
SLOT
Expansion Through Two Enclosures
897f8600 A
CIRCUIT TYPES
The circuits used in the TTL expanders are bi-directional. Signals may enter
from PI and exit at P2 or enter P2 and leave at Pl. Four types of line driver
circuits are used.
Type 1 utilizes a 146S inverter in series with a 204 inverting AND gate. This
circuit is symetrical. Line driver Type 2 uses an inverter (146S) and an
inverting AND gate (204) in the circuit from PI to P2, while the signal flow
from P2 to PI passes through an inverting Schmitt Trigger (167), shaping the
signal first and then through an inverting AND gate. Type 3 uses only inverting
AND gates (204 s) in each of the signal paths and both paths are symetrical.
Type 4 uses a NAND Buffer with the inputs to each AND gate section paralleled in
the circuit from PI to P2, and an inverting AND gate (204) in the P2 to PI
circuit.
1
These circuits are shown in Figure 4-2.
89758600 A
4-3
Control Signal
Bus to Li ne
a
vee
270
20~~
__- - - 1
1465
XXX
~--I-----I
XXX
vee
330
~--~
.....- _ . - - - - ( P2
560
I
a
~--~~146S~~
XXX
----...&..11..204
Mounted only on PWA
in remote enclosure
XXX
1--__
Control Signal
Line to Bus
LINE DRIVER - TYPE 1
Control Signal
Bus to Line
a
'vee
1
VCC
204~~-----
_ -....... 1465 I-l---.....- - I XXX
XXX
270
-
Mounted only on PWA
in remote enclosure
a
---~1-204
SCHMITT
1-------1 TRI
GGER
1 7
330
11----
xxx~--
Control Signal
Line to Bus
LINE DRIVER - TYPE 2
Figure 4-2.
4-4
Line Driver Circuit Types
89758600 A.
Mounted only in PWA
in remote enclosure
Control Si gnal
Line to Bus
LINE DRIVER - TYPE 3
Control Signal
Bus to Line
8
XXX
vee
vee
330
JE
P2
560
Mounted only on PWA
in remote enclosure
-
8
204
XXX
Control Signal
Line to Bus
LINE DRIVER - TYPE 4
Figure 4-2.
89758600 A.
Line Driver Circuit Types (continued)
4-5
PROPAGATION DELAY
The propagation delay, measured between the time the signal at the sending side
crosses the 1.5V level and the time the received signal crosses the 1.5V level,
is measured at Pl.
For fixed-direction signal flow the propagation delay is
less than:
70 nanoseconds for Driver/Receiver TYPE 1
90 nanoseconds for Driver/Receiver TYPE 2
Refer to Fi gure 4-2
60 nanoseconds for Driver/Receiver TYPE 3
50 nanoseconds for Driver/Receiver TYPE 4
FAN-IN AND FAN-OUT
The fan-in on PI in the main frame for all signals, except MTR and RTM in
DSA operation, is one TTL Load.
ForMTR, a 560-ohm pull-up resistor is used. For RTM, a combination of a
280-ohm pull-up and a 560-ohm resistor to ground is used.
In the remote enclosure on PI signals, a combination of a 270-ohm pull-up and
a 560-ohm resistor to ground is used on each signal except MTR and RTM.
For ,MTR, a combination of a 280-ohm pull-up and a 560-ohm resistor to ground
is used.
For RTM, only one pull-up of 560-ohm is used to allow non-buffered components
to drive the scanner.
The fan-out on all PI signals in the remote enclosure is 16 TTL Loads.
BASIC PWA DIFFERENCES
The two PWA's used differ basically in the omission of certain components and
in the placement of jumper plugs.
The PWA used in the main enclosure mounts a lK resistor at R72 and omits the
following components:
U6, Ull, U12, U25, and U30
Rl-R28, R57-R7l, R73-R84, Rl13-R140, R169-R196, R185, and R238.
4-6
89758600 A
The PWA used in the remote enclosure mounts a 270-ohm resistor at R72 and omits
the following components:
U10, U14, U15, U27, U29, and U33
Jumper plugs are inserted in specific locations on the PWA's to prepare
them for use as A/Q or DSA channel expanders in the main enclosure, or
as A/Q or DSA channel expanders in the remote enclosure.
To use the PWA's for A/Q or DSA expansion, refer to Section 3 for placement
of the jumper plugs.
89758600 A
4-7
I
INTERRUPT AND SCANNER CONNECTIONS
Interrupt Connection
The Interrupt signals from the remote controllers are transferred via the
Sint signal line driver receiver. See Section 3 for selection of Interrupts.
DSA Scanner Connection
The scanner connection is made by placing jumpers between the input/output
scanner signals of the DSA scanner and the appropriage connections at Pl of the
expander PWA. These connections are made on the back-plane of the enclosure.
Two signal lines are used for the scanner, MTR, allowing signal flow from the
main frame to the remote, and RTM operating in the reverse direction.
A typical connection is shown schematically in Figure 4-3.
89758600 A
I
0 - SFI
..-
SFO
FIRST
0 - SRI
-
SRO
I
PII
SFI
r+
SFO
I
I
I
MIDDLE
SRI
SRO
I"
CONTROLLERS
RTM
..- P2
MTR
---
~
: EXPANDER
..-
EXPANSION ENCLOSURE 1
-:
I
I
--
RTM rLI
I
I
..
P2-
SFI
MTR
I
Tpi
EXPANDER:
SFO
MIDDLE
SRI
SRO
-..
I
SFI
SFO
MIDDLE
SRI
CONTROLLERS
r+I
I
I
I
MTR
....
RTM - ~ISRO ":tPII
P2
: EXA\NDER
MAIN (CPU) ENCLOSURE
..-
-
I
1"'1-
P2
..-
MTR
---
,RTM
I
r+
I
I
I
I
!PI
EXPANDER :
SFI
SFO
MIDDLE
SRI
SRO
..-
--
SFO --{)
SFI
LAST
SRI
SRO --0
CONTROLLERS
EXPANSION ENCLOSURE 2
SFO - SCAN
SFI - SCAN
SRO -SCAN
SRI -SCAN
FORWARD OUT
FORWARD IN
REVERSE OUT
REVERSE IN
MTR-SCAN MAIN TO REMOTE
RTM-SCAN REMOTE TO MAIN
Figure 4-3.
89758600 A
Scanner Connections
4-9
SIGNAL ROUTING
The direction of signal flow of all signals except data lines is determined
by jumper plugs set on the expander PWA's according to PWA use (A/Q main,
A/Q remote, DSA main, DSA remote). The data signal flow direction is
determined by the combination of the jumper plug settings and the state of
the Read signal for A/Q expansion, or the Write Enable for DSA expansion.
Refer to Section 3 and Figure 3-1 for location of the positions for the
jumper plugs.
The following lists provide the signal data flow direction:
A/Q expansion
Data lines: Normally flowing from main enclosure to remote enclosure. When
the Read signal is present the direction is reversed.
Signals from main enclosure to remote enclosure:
Address lines, Timing Pulse, Me, W=O
Reaa, Write, Program Protect
Signals from remote enclosure to main enclosure:
Sint lines, Char Input, Reject, Reply
DSA expansion
Data lines: Write Enable active
Write Enable not active
from remote enclosure to
main enclosure
from main enclosure to
remote enclosure
Signals from main enclosure to remote enclosure:
Protect Fault, Autoload, MC, Resume, Par Error, Par Bit,
Protect Bit, 65K Memory, SMTR.
Signals from remote enclosure to main enclosure:
MemorY.Address lines, Request, ~P-rl~·0-r-'i7ty-, Protect, Write Enable,
SRTM.
4-10
89758600 A
SECTION 5
LOGIC DIAGRAMS
KEY TO LOGIC SYMBOLS
(
Publication 89723700 (Key to Logic Symbols) or equivalent, lists the symbols
used in the logic diagrams in this manual and gives a short description of the
functions they represent.
The symbols conform generally to Control Data usage
(Microcircuit HandboQk, publication number 15006100), using the polarity logic
convention.
The following paragraphs describe the signal flow conventions used.
SIGNAL FLOW
Input signals are drawn coming from the left or above;
output signals are
drawn going to the right or down.
The signal lines are sometimes interrupted to allow logical grouping of
components.
At
~ach
such interruption one of the following indicators
is used:
On-Sheet Continuation Reference Symbols
These symbols when used with the logic
symbols in the following diagrams indicate
that a connection exists between two points
on a sheet.
The arrows attached to each
circle point from signal origin to signal
des tina t ion.
The letters, C, H, I, 0
and P are not used inside the circles,
since they bear special significance on
logic diagrams.
89758600 A
5-1
Off-Sheet Continuation Reference Symbols
(ON SHEET 2)
These symbols when used with the logic
symbols in the following diagrams indicate
---@3.6
that a common signal point exists between
two sheets in a series of related drawings.
These symbols point from output to direction
of input as
show~
in the illustration.
The
letters C, H, I, 0 and P are not used in
the hexagons, since they bear special
significance on logic diagrams.
The
number(s) next to each hexagon indicate
2.3
0--
(ON SHEET 6)
the sheet(s) that the signal is continued
from or on.
For instance, the numbers 3.6
refer to sheets 3 and 6, while 2.3 refers
to sheets 2 and 3.
It should be noted that
the referenced sheet number(s) is always
placed opposite the line extending from
the hexagon.
The sheet number where the
signal originates is underlined.
Test Points
The test point symbol on the logic diagram
shows the connection of a test point on the
printed wiring board (PWB).
The number
adjacent to the symbol refers to the test
OR
point position on the PWB at the edge
opposite the connectors.
Only test point
one is labeled on the edge of the PWB.
5-2
89758600.A
Connecting and Non-Connecting Lines
CONNECTING
LINES
Lines connected to a common point or at a
junction point are shown in the upper part
of this illustration.
No more than four
lines are connected to a common point in
the diagrams.
NON - CONNECTING
Lines crossing but not connected are shown
in the lower part of this illustration.
LINES
Connectors
Connectors are represented on the logic diagram by the symbol for a female
connector, for both input and output signals.
The name of the signal is
placed in the open end of the connector symbol (shown below), using the full
name of the signal or the common abbreviation appl icable to logic diagrams.
The connector number, pin row and pin number are located above the 1 ine
extending from the connector symbol.
READ
89758600 A
>>-P_I_!_~_:------
SIGNAL NAME
CONNECTOR NUMBER
PIN ROW
PIN NUMBER
5-3
LOGIC DIAGRAM 89759000
Each circuit of the AT3l0-A TTL A/Q-DSA Bus Expander is bi-directional. The
flat cable is connected from P2 of one enclosure to P2 of the other. The
presence or lack of jumper plugs determine the direction and conditions of
signal flow.
As stated in Sections 3 and 4, during use in the main enclosure PWA 89821600
will have all jumper plugs marked M installed. PWA 89759200, mounted in
the remote expansion enclosure will have all jumper plugs marked R set.
When the PWA in the main enclosure is used for A/Q expansion, all jumper plugs
marked AQM will be set and the PWA in the remote enclosure will have all AQR
jumper plugs set.
For DSA operation the main enclosure PWA will have the DSM jumper plugs set
and that installed in the remote enclosure will have the DSR jumpers set.
The jumper plugs are used to either enable or inhibit the inverting AND gates
in one-half of circuitry or the other, causing the signal flow to occur from
Pl to P2, or from P2 to Pl. The gate(s) shown in the logic diagrams, herein,
in the upper part of each circuit allows the signals to flow from Pl to P2,
when enabled. At this time the AND gate(s) shown in the lower part of each
circuit will be inhibite~.
For signal flow from P2 to Pl, the lower half of
each circuit is enabled and the upper half inhibited. Control of all but the
data circuitry, inhibiting or enabling one half or the other, is accomplished
through the jumper plugs set at U40.
Flow of data in either direction is
controlled by the READ/WRITE circuitry (sheet 5 and sheet 2, lower half)
The circuitry used herein is of the four types described previously in Section 4.
89758600
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REDRAWN TO CDC STD
R 72 IN MAIN PWA ADDED
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SIGNAL TRANSMITTED,
UPPER SIGNAL NAMES IN TA8LES AND liN CIINNECTORS
REFER TI! A/Q SIGNALS WHEN PWA IS USED
TG EXPAND A/Q
IVCC
C2 .. C8
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L'WER SIGNAL NAMES IN. TABLES AND liN CGNNECTGRS
REFER U DSA SIGNALS WHEN PWA IS USED
Til EXPAND OSlo,
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TOLERANCES
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DETAILED LOGIC DIAGRAM
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SECTION 6
MAINTENANCE
SCOPE
This section supplies references and procedures for the maintenance of the
equipnent listed in Section 1 of this manual.
TOOLS AND SPECIAL EQUIPMENT
The following is a list of maintenance tools required for this equipment:
Pllrt
Number
8968B700
U96J0300
r
Part Description
Board Extender
UOllrd Extractor
O~cilloscope
Digital Voltn~ter
Quantity
1
1
1
1
PUBLICATIONS
The publications listed below are applicable to maintenance of this equipment.
Publication
1784 Computer Reference Manual
AU107/AU10B Computer Custaner Engineering Manual
liDO Callputer System Codes Manual
System ~1aintendnce Monitor (SMMl7)
PUb. No.
I
89633400
89633400
60163S00
601U2000
MAINTENANCE
Preventive maintenance of a PW assembly is not required. After it is determined that a PW assembly has failed, the PWA should be replaced by an identical. trouble-free PWA. For replacement of a PW assembly, refer to Section 3
of this manual. After replacement, a diagnostic check should be performed as
des cri bed in SMM17.
CAUTION
Do not remove or replace PWA's
or cables with system power ON.
89758600 A
6-1
SECTION 7
MAINTENANCE AIDS
(Not Required)
SECTION 8
PARTS DATA
This parts list is applicable to the AT310-A TTL A/Q and DSA Bus Expander.
Nomenclature
Part Number
A02
A03
Remote PW Assembly A02
A03
External Cable
89821600
89876000
89759200
89880700
89821800
Main PW Assembly
89758600
A
8-1
SECTION 9
WIRE LIST
The wire list included in this section is applicable to the AT3l0-A
TTL A/Q and DSA Bus Expander. Wire size, color, origin, destination
and name of signal normally found on that wire are included in the
table.
A pin list for each of the PWB's is also included in this section.
89758600
A
9-1
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TABLE 9-2.
PWB PIN LIST
I CONNECTOR/PIN
\
I
P1Al
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
P1A31
SIGNAL NAME
A/Q
DSA
AS
A6
A0
DA5
DA6
DA0
DA12
DAll
DA3
DA4
Vee TER
MC
Vee TER
DA15
N/A
Resume
N/A
Request
N/A
PE
par Bi t
SRTM
Protect Bit
65K
N/A
AD8
AD9
AD10
ADll
ADI2
ADl3
GND
AD14
AD15
AT2
All
A3
A4
Vee TER
Timing Pulse
Vee TER
A15
Q0
Q2
Q4
Q6
Q8
Q10
Q12
Q14
w=O
Read
Rep1y
Prog Protect
Sint 1
Sint 2
Sint 3
Sint 4
Sint 5
GND
Sint 6
Sint 7
CONNECTOR/PIN
Pl Bl
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
P1B31
SIGNAL NAME
A/Q
DSA
AT
AS
A9
A10
Char input
DAl
DA2
DA7
DA8
DA9
DA10
N/A
Al3
A14
GND
Ql
Q3
Q5
Q7
Q9
Q11
Q13
Q15
Sint 8
Write
Reject
MC
Sint 9
Sint 10
Sint 11
Sint 12
Si nt 13
DAl3
DA14
GND
Priority
N/A
Protect
N/A
N/A
PE
Autoload
SMTR
N/A
WE
N/A
AD0
ADl
AD2
AD3
AD4
AD5
Sint 14
Sint 15
AD6
AD7
A2
Ar
(Cont.)
9-10
89758600 A
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TABLE 9-2.
PWB PIN LIST (Cont'd)
SIGNAL NAME
CONNECTOR/PIN
A/Q
P2A1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
P2A30
DSA
XSint 7
XSint 6
GND
XSint 5
XSint 4
XSint 3
XSint 2
XSint 1
XProg Prot
XRep1y
XQT4
XRead
XW=O
XQ12
XQ10
XQ8
XQ6
II
XQ4
I
XQ2
XQflJ
i
I
XAD15
XAD14
GND
XAD13
XAD12
XAD11
XAD10
XAD9
XAD8
N/A
XRTM
X65K
XProtect Bit
XParity Bit
XPE
N/A
XRequest
N/A
XResume
N/A
I
XA15
XTime Pu1 se
XM
XA3
XA11
XA12
XAflJ
XA6
XA5
XDA15
XMC
XDM
XDA3
XDA11
XDA12
XDA0
XDA6
XDA5
A/Q
P2B1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
P2B30
XSint
XSint
XSint
XSint
XSint
XSint
XSint
XMC
I
SIGNAL NAME
DSA
CONNECTOR/PIN
15
14
13
12
11
10
9
XAD7
XAD6
XAD5
XAD4
XAD3
XAD2
XAD1
XADflJ
i
!
II
II
I
I
i
XReject
XQ15
XI,Jri te
XSint 8
XQ13
WiT
XQ9
XQ7
XQ5
XQ3
XQ1
GND
XChar Input
XA13
XA14
XA10
XA9
XA8
XA7
XA2
XA1
N/A
XMTR
XWF
N/A
XAutoload
XPE
N/A
N/A
XProtect
N/A
XPriori ty
GND
XDA14
XDA13
N/A
XDA10
XDA9
XDA8
XDA7
XDA2
XDA1
I
II
I
i
I!
I
I
t
I
i
I
I
I
I
I
I
I
I
I
I
I
,
I
!
!
iI
I
I
I
I
I
I
I
89758600 A
9-il
COMMENT SHEET
MANUAL TrrLE
TTL A/Q-DSA Bus Expander Hardware Reference/Customer Engineering
Manual
PUBLICATION NO. _ _ _
8_9_75_8_6_0_0_ _ _ _ _ _ _ REVISION _ _
FROM
A _ _ _ _ _ _ _ _ _ _ __
NAME: ____________________________________________________
~
__________
BUSINE~S
ADDRESS: _______________________________________________________________
COMMENTS: This form is not intended to be used as an order blank. Your evaluation of this manual will be welcomed
by Control Data Corporation. Any errors, suggested additions or deletions, or general comments may
be made below. Please include page number.
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