AP 49_Serial_IO_and_Math_Utilities_for_the_8049_Microcomputer_Jan79 49 Serial IO And Math Utilities For The 8049 Microcomputer Jan79

User Manual: AP-49_Serial_IO_and_Math_Utilities_for_the_8049_Microcomputer_Jan79

Open the PDF directly: View PDF PDF.
Page Count: 23

© Intel Corporation 1979
I
APPLICATION
NOTE
Ap·49
January 1979
9800904
AP-49
2
INTRODUCTION
The
Intel@
MCS-48 family
of
microcomputers marked
the first time
an
eight bit computer with program
storage, data storage, and 1/0 facilities was available on
a single
LSI
chip. The performance
of
the initial
processors in the family (the
8748
and the 8048) has
been shown
to
meet or exceed the requirements
of
most
current applications
of
microcomputers. A new member
of
the family, however, has been recently introduced
which promises
to
allow the use
of
the single
chip
microcomputer in many application areas which have
previously required a
multichip
solution. The In·
tel'"
8049
virtually doubles processing power available
to
the systems designer. Program storage has been
in-
creased from 1 K bytes
to
2K bytes, data storage has
been increased from 64 bytes to 128 bytes, and process-
ing speed has been increased by over 80%. (The
2.5
microsecond instruction cycle of the first members of
the family has been reduced
to
1.36 microseconds.)
1\
is obvious that this increase
in
performance is going
to
result in far more ambitious programs being written
for execution in a single chip microcomputer. This
ar-
ticle
will show how several program modules can be
designed using the
8049.
These modules were chosen
to
illustrate the capability
of
the 8049 in frequently
en-
countered design situations. The modules included are
full duplex serial
1/0,
binary
multiply
and divide routines,
binary to BCD conversions, and
BCD
to binary conver-
sion. It should
be
noted that since the
8049
is totally
software compatible with the 8748 and
8048
these
routines will also
be
useful directly on these proc-
essors.
In
addition the algorithms for these programs
are expressed in a program design language format
which should allow them
to
be
easily understood and
extended
to
suit individual applications with minimal
problems.
FULL DUPLEX SERIAL
COMMUNICATIONS
Serial communications have always been an important
facet in the application of microprocessors. Although
th
is
has been partially due to
the
necessity
of
con-
necting a terminal
to
the microprocessor based system
for program generation and debug, the main impetus
has been the simple fact that a large share of micro-
processors find their way into end products (such
as
in-
telligent terminals) which themselves depend on serial
communication. When
it
is necessary
to
add a serial link
to
a microprocessor such as the
Intel@
MCS-85 or
86
the
solution is easy; the
Intel@
8251A USART or
8273
SDLC
chip can easily
be
added to provide the necessary pro-
tocol. When
it
is necessary
to
do the same thing
to
a
single chip microcomputer, however, the situation
becomes more
difficult.
Some microcomputers, such as the Intel 8048 and 8049
have a complete bus interface
built
into
them which
allows the simple connection
of
a USART to the proc-
essor chip. Most other single chip microcomputers,
although lacking such a bus, can
be
connected
to
a
USART with various artificial hardware and software
constructs. The
difficulty
with using these chips,
however, is more economic than technical; these same
peripheral chips which are such a bargain when coupled
to
a microprocessor such
as
the MCS-85 or
86,
have a
significant
cost impact on a single chip microcomputer
based system. The high speed
of
the 8049, however,
makes
it
feasible
to
implement a serial
link
under soft-
ware control with no hardware requirements beyond two
of
the 1/0 pins already resident on the microcomputer.
There are many techniques for implementing serial
1/0
under software control. The application note "Applica-
tion
Techniques for the MCS-48 Family" describes
several alternatives suitable for half duplex operation.
Full duplex operation is more
difficult,
however, since
it
requires the receive and transmit processes to operate
concurrently. This
difficulty
is made more severe
if
it is
necessary for some other process
to
also operate while
serial communication is occurring. Scanning a keyboard
and display, for example, is a common operation
of
single chip microcomputer based system which might
have
to
occur concurrently with the serial receiveltrans-
mit
process. The next section will describe
an
algorithm
which implements full duplex serial communication
to
occur concurrently with other tasks. The design goal
was
to
allow 2400 baud, full duplex, serial communica-
tion while utilizing no more than 50% of the available
processing power of the high speed 8049 microcom-
puter.
The format used for most asynchronous communication
is
shown in Figure
1.
It
consists
of
eight data
bits
with a
leading 'START' bit and one or more trailing 'STOP' bits.
The START bit is used
to
establish synchronization
be-
tween the receiver and transmitter. The
STOP
bits
en-
sure that the receiver will
be
ready to synchronize itself
when the next start
bit
occurs. Two stop bits are nor-
mally used for
110
baud communication and one stop
bit
for higher rates.
START STOP
BIT 01
02
03 04
05
06 07 08
BIT
IL....--'---.J'---'----'---..L-..L-----L---'---.J
Figure 1.
The algorithm used for reception
of
the serial data is
shown in Figure
2.
It uses the on board timer
of
the
8049
to
establish a sampling period
of
four times the desired
baud rates. For 2400 baud operation a crystal frequency
of
9.216 MHz was chosen after the following calculation:
f = 480N(2400)(4)
where
480
is the factor
by
which the crystal fre-
quency is divided within the processor
to
get the basic interrupt rate
2400
is
the desired baud rate
4 is the required number
of
samples per
bit time
N is the value loaded into the MCS-48
timer
when
it
overflows
I
I
The value N was chosen
to
be
two
(resulting in f = 9.216
MHz) so that the operating frequency
of
the 8049 could
be as high as possible
without
exceeding the maximum
frequency specification
of
the 8049
(11
MHz).
;
STfI!T
If"
RECEI'r1:
ROOTINE
i====::Z:==
; 1
IF
RECEI'r1:
FLRG=8
T1£H
,2
IF
SERIIi.
IIf'UT=5I'OCE
TI£H
,3
RECEI'r1:
FLAG:=1
; 3
BYTE
FIHISIED
FLAG:
=6
;2
EII)IF
,1
ELSE
SINCE
RECEI'r1:
FLAG=1
TI£H
; 2
IF
SVN:
FLRG=8
TI£N
; 3
IF
SERIIi.
1If'UT=5I'OCE
TI£H
, 4
SVN:
FLAG:
=1
, 4
DATA:
=8IJl
, 4
SfWL£
CNTl/:
=4
,3
ELSE
SINCE
SERIII.
IIf'UT=IIfI!K
1l£N
;4
RECEI'IE
FLAG:=6
;3
EII)IF
; 2
ELSE
SINCE
SOC
FLAG--J.
TI£H
; 3
SII!Pl.E
crumR:=SII!Pl.E
CWHER-1
; 3
IF
SII!Pl.E
crumR=8
TI£N
; 4
SII!Pl.E
ClJlMER:
=4
; 4
IF
B't'TE
FlNISI£D
FLAG=e
TI£H
; 5
CfI!RY
:
=SER
III.
IIf'UT
; 5
SlfIFT
DflTA
RIGHT
WITH
CfI!RY
; 5
IF
CARRY=1
T1£N
.6
IJ<DATA:
=DfITA
; 6
IF
DATA
READV
FLAG=e
T1£N
; 7
B't'TE
FlNISIED
FLAG--J.
; 6
ELSE
; 7
IIVTE
FINISIED
FLAG
=1
; 7
O'IElIRUN
FLAG:
=1
;6
EII)IF
,5
EII)IF
,4
ELSE
SIt«:E
BYTE
FlHISIED
FLAG=1
T1£N
; 5
IF
SERIIi.
1If'UT=IR1K
T1£N
, 6
DATA
READY
FLAG:
=1
; 5
ELS~
SIt«:E
SERIIi.
IIf'UT=5I'OCE
TI£N
;6
ERm1
FLAG:=1
,5
ENDIF
,S
RECElYE
FLA6:=6
; 5
SOC
FLAG
=6
,4
ENDIF
; 3
ENI>IF
; 2
ENDIF
.1
ENDIF
Figure 2
The timer interrupt service routine always loads
the
timer with a constant value. In
effect
the timer is used
io
generate
an
independent
time
base
of
four
times
the
reo
quired baud rate. This time base is free running and is
never modified by either the receive or transmit pro-
grams, thus allowing .both
of
them
to
use the same
timer. Routines which
do
other
time
dependent tasks
(suCh
as scanning keyboards) can also be called periodi-
cally at some fixed
multiple
of
this
basic
time
unit.
The algorithm shown in Figure 2 uses
this
basic
clock
plus a handful
of
flags
to
process the serial input data.
All mnemonics
copyrighted
© Inlel
Corporation
1979.
AP-49
Once the meaning
of
these flags are understood the
operation
of
the algorithm should
be
clear. The Receive
Flag is set whenever the program is in the process
of
receiving a character. The Synch Flag is set when the
center
of
the start bit has been checked and found
to
be
a SPACE (if a MARK is detected at
this
point the receiver
process has been triggered
by
a noise pulse so the pro-
gram clears the Receive Flag and returns
to
the
idle
state). When the program detects synchronization it
loads the variable DATA with 80H and starts sampling
the serial line every four counts. As the data is received
it
is right shifted into variable DATA;
after
eight
bits
have been received the initial one set into DATA will
result in a carry
out
and the program knows that it has
received all
eight
bits.
At
this
point it will transfer all
eight
bits
to the variable OKDATA and set the Byte
Finished Flag so that on the next sample it will test
for
a
valid stop bit instead
of
shifting
in data. If
this
test
is
successful the Data Ready Flag
will
be
set
to
indicate
that
the data is available
to
the main process. If the test
is unsuccessful the Error Flag
will
be
set.
The transmit algorithm is shown
in
Figure
3.
It is exe-
cuted immediately
following
the receive process. It is a
simple program which divides the free running
clock
down and
transmits
a
bit
every fourth clock. The variable
TICK COUNTER is used
to
do the division. The Transmit-
ting Flag indicates when a character transmission is in
progress and is also used
to
determine when the START
bit should
be
sent. The TICK COUNTER is used to deter-
mine when
to
send the next bit (TICK COUNTER MOD-
ULO
4 =
0)
and also when the STOP
bits
should
be
sent
(TICK COUNTER = 9
4).
After
the transmit routine com-
pletes any
other
timer
based routines, such as a key-
board/display scanner
or
a real
time
clock, can
be
executed.
,STfI!T
If"
TRfIIS!IIT
ROOTINE
,1
.•
1
Tic!(
crumR: =
Tic!(
C!lJflER+l
; 1
IF
Tic!(
crumR
III)
4=6
TI£H
; 2
IF
TRfIIS!IITTING
FLAG=1
TI£H
; 3
IF
TICK
CWfTER=88
1919
99
BIlBY
TI£H
; 4
TRANSltnTlNG
FLAG:~
,3
ELSE
IF
Tic!(
CWfTER=88
1991
99
BIlBY
TI£H
, 4
SEll)
END
IH!f(
; 4
TRfIIS!IITTING
FLAG
>II
,3
ELSE
SIt«:[
TIC!(
crumROT1£
IIIO'IE
CWfT
TI£H
; 4
SEND
NEXT
BIT
; 3
ENDIF
; 2
ELSE
SIt«:[
TRANSIIITIING
FLAG=e
Tl£N
; 3
IF
TRfIIS!IIT
REIllEST
FLAG--J.
TI£H
; 4
XIITBVT:
=NXTBVT
;4
TRANSltIT
REIllEST
FLAG:=6
; 4
TRANSltITTlNG
FLAG:=1
; 4
TICK
COONTER:
=8
; 4
SEND
SYNC
BIT
(SI'ACE)
; 3
ENDIF
;2
OOIF
; 1
ENDIF
Figure 3
3
AP-49
4
Figure 4 shows the complete receive and transmit pro·
grams as they are implemented in the
instruction
set
of
the
8049. Also included in Fig. 4
is
a short routine which
was used
to
test
the algorithm.
ISJ~:-!l
MCS-43.'UPI-41
i'lAC~O
ASSEMBLER,
'.2
II
LeI(
OBJ
0000
C5
50I.lR([
STATEMENT
i
******.t:+-:+:t;*tlt"t,;f'**:t:t*:f.*';;*fi:t**t:U.******:f,::fo'''*+-"*:f:f
·*:~*.f:*;u,****:t:·t:***.******"t'+':******i:*
2
.*
" *
THIS
l'I1or.f'AM
TESTS
THE
FULL
L"4)PW:
COI1I1UPHCATION
SiJFTj.lARE
4
,.
5 i
********·.uw
•••.
•••••••••
***tt.,..**·
••••
·H·
••
*.***t**.,.t**.*·~*~·.**.********H.·**
....
6 '
7
$INCLlJl'>E(Fl.IJIITEST
prt)
9 '
STRPT
Cf
'1
EST
ROUTINE
HI.'
=====================
11,
12
'
n,
14
15
'
16
'1
ERPOR
COliNT
=3
1,
,1
~EF'EAT
18
.'::
PATTERN
=0
19
2 INn IfiliZE
TIMER
2i3
,2
CLEAR
FLAGB','TE
21
i 2
FLAG1
=11AP"
REPEAT
22
:2
IF
TRFflStllT
REQUEST
FLAG=~
Tt£N
?"
,
~~
u
24
,4
r;,;rB'r'TE
.
=PATTERN
2~,
,4
TPflNSl'I1l
REQUEST
FLAG=l
26,
j'
ENDIF
27
,:; IF
DATA
READY
FL~G=l
THEN
28
,4
PATTERN.
=O¥DATA
29
,4
[!ilTA
PEArN
FL
AI,
~
J3
'3
ENDIF
31
,2
UNTIL
ERROR
FLAG
OR
OVERRUN
FLAG
}2
,~
I
NCPEMENT
ERROR
COLINT
is
,1
UNTIL
FOREVER
34
EOF
:5
I'EJECT
36
ORG
\}
]7
,1
SELECT
PEGI5TEP
BAN!(
0
:>8
SEl
RBIit
~;9
,1
GaTO
TEST
40
JMF
TEST
41
i
INCLLI(JE(F1IJAH)
42·
4} ;
44
,
AS,~lCHl?lJNOIJS
PECEIVE/TRANSMIT
ROLITINE
45
"
==================================
46
'
THIS
Rcm
HlE
RECEIVES
SERIAL
emE
USING
PIN
TO
AS
RXD
47
,
AND
CONCIJPREN1LY
TRANSMITS
lISING
PIN
P27
48
,
NOTE.
49
THIS
ROIJTlNE
IJSES
FLAG
1
TO
BLFFEP
THE
TRAN5MITTW
Figure 4
All
mnemonics copyrighted © Intel Corporation 1979.
I
I
AP-49
LOC
[If,.l
SEll
SOIEE
STRTEI'IENT
50·
1
DRTA
LINE.
THIS
flIPlINflTES
THE
JITTER
THAT
51
,1
WiJ.1lD
BE
CRUSED
BY
',WIflTIOIIS
IN
THE
RECEIVE
52
·1
TIMING.
NO
OTHEP
f'\,'OORAM
11Ft'!'
USE
FLAIJ
1
WHILE
53
.1
THE
TlMEP
HlTEl1PlJ1'T
IS
ENAt.'lED
54
,
55
St.;
57
.
58
.
59
.
PEG
I
STEP
ASSIGlft:NTS-BANKl
60
;
=======================
0020
0021
0022
0023
61
;
62·
63
flTENP
EQlJ
64
FL
GBI'T
ErnJ
65
66
67
SAI'ICTP
E~J
68
TCKf.T11
EQtJ
69
REGO
E()U
7B.
71·
PAM
A551GtlMENTS
,~
.
f<
73
? 4
I'IOI'OOT
E(lI)
:'5
MOffTA
EQU
76
I'IXI'ITSV
EIlI)
77
ltliiTBY
EQIJ
78
SEJECT
79
j
00.
20H
21H
22H
23H
Sl .
CONSTANTS
82
<'
83.
USED
TO
SAVE
AWJl'll.LA1~
CONTENTS
WRlNG
INTERRlII'T
;
CONTAINS
I/A~I()IJS
FLAGS
IJSl:lI
10
CONTROL
1HE
kECEI't'E
AtID
TR~N91lT
P~OCESS.
SEE
CONSTANT
Dl::F
INITIONS
FOR
THE
"'E~IHNG
OF
EACH
BIT
SAI'I'LE
C~TEP
F~
Tf(
REC
IEIIE
f'ROCES~
SAMPLE
COIJNTER
FOI1
THE
TRAN5l1IT
PReUSS
IJSED
8~
PDINTEII
R!:I3ISTER
;
IlECEI'iE
RETURNS
VAlID
DmR
IN
THIS
B'ffE
·
RECEIVE
ACCtlI'IUlATES
OOlA
IN
THIS
BI'TE
·
CONTAINS
B','TE
~IP¥.i
TRA.'lSMIlTED
;
CONlAII',':
THE
NE'XT
B'~TE
TO
BE
TRANSMITTED
B4
THE
FOLLl).lm:;
CONSTANTS
ARE
USED
TO
ACCESS
THE
FL~
BITS
CONTIiINED
BJ
IN
REG
ISTER
FUlEYT
37
RCVFLG
B:3
B9
SI'NFLG
ge
91
BVFNFL
92
0008
93
OWr'FL
94
OOHl
95
ERRFlG
%
00<''0
97
TRRIlFL
9S3
99
=
100
0049
=
191
TRIG"L
=
102
0089
=
103
OVRUN
=
104
Eau
EW
EIlI.!
~IAJ
EOfJ
EQIJ
EQIJ
Eau
All
mnemonics copyrigh1ed © Intel Corporation
1979.
91H
SH
WHEN
ST~T
BIl
IS
FI"'~
T
DETECTED
RESET
WHEN
REcmE
I'k(ICESS
IS
COOPLETE
82H
SET
r.JHEN
SlA11T
BIT
IS
VEIIIFIED
RESET
WHEN
RECEIVE
PROCESS
IS
COO'LETE
84H
;
RESET
WHEN
STAf.iI
~IT
IS
FIJ<ST
DETECTED
SET
WHEN
THE
EIGHT
[,ATA
ens
HAVE
ALL
BtEN
RECUVEli
98H
5~)lJLI)
BE
RESET
BY
MAIN
PROGRAM
IottEN
DATA
15
ACt.:£PTED
SET
B'!
RECEIVE
PROCESS
WHEN
STOP
BlT(S)
ARE
VERIFIED
lBH
SHOULD
BE
RESET
BY
MAIN
PR(I(;RAt1
"'HEN
SflI1PLH)
SET
By'
RECEIVE
PROCESS
IF
A
~RAI1ING
f:.l<kOR
15
DETECTf:.O
2(t!
TESTED
Il'r'
I1fIIN
PROORAI'I
TO
DE1ERI'IINE
If-
REIlO¥
W
TRAtCl'IlT
A
rlEw
BYTE-SET
TO
INDICATE
lHAT
I«(T81'T
HAS
BEEN
LOAroEC>
RESET
BY
TRANSMIT
PIIOCESS
r.lliEN
BYTE
IS
ACCf:.PTED
4!lH
,
SET
WHEN
TRANSMISSION
OF
A
B'flE
STARTS
,
RESET
WHEN
STOP
~IT
IS
TRANSI'IllTED
8811
SET
B'"
RECEIVE
PROCESS
WHEN
OYERUN
OCCURRS
SHOULD
BE
RESET
S'T'
!'lAIN
PROGRAI'I
IKN
SAMPLED
Figure 4 (continued)
5
AP-49
lOC
00.7
SEQ
=
195
)
=
196
i
SI:I.ME
STATEI£NT
GE~RfI..
COIISTANTS
=
197
i
==============
=
1.98
i
9989
=
109
I'ftRI(
EQlJ
i3'Jl
USED
TO
GENEI1ATED
A
I'IflRI(
FF7F
=
119
SPACE
EIlU
t«lT
88H;
lISE[)
TO
GENERATE
A
SPACE
9IlOO
=
111
STPBTS
EQIJ
0 ,
CONTRttS
THE
tulBER
~
SIIJ'
8IT5
909C
23FE
900E
62
900F
7615
9811
9A7F
9813
8417
0015
8A80
0017
FE
0018
1224
oo1fl
3664
801(:
FE
8010
4301
00lF
53FB
8021
HE
0022
9464
8024
22~
=
112
0
GENERATtS
otE
STIJ'
BIl
=
113
1
GENERATES
00
STOP
BITS
=
114
;
=
115
$EJECT
=
116
;
= 1f? ;
=
118
;
=
119
i
START
I)'
RECEIVEI'TRANSI'lIT
INTERRlf'T
SERIIICE
ROUTINE
=============================================
=129
=
121
900711
=
122,1
ENTER
INTERRUPT
PIOOE
=
123
Tl
~
nF
LW.T
=
124
RETR
=
125
lIART:
SEl
RB1
=
126
.i
1
SAVE
ACCU1I.lAT~
CfllTENTS
=
127
my
RTEIIf',
it
=
128'
1
REU!fKl
TIMER
=
129
MO~'
A,
tTlf{:Nl
=
133
mil
1,/1
=
131;
=
B1
;
OUTPUT
TXD
BlFFER
(F1)
TO
Tx[)
I/O
LINE
(P27)
=
133
,
============================
=
134
,
=
135
=
136
OSPACE·
=
137
= BS
01'fIRI(
=
139
)
JF1
0I1ARK
ANI.
P2.I5PACE
.JIIP
RCY009
0Rl
f>2,1MARK
=
148
)
START
OF
RECEIVE
ROlITiNE
=
141
,
===============
=
142
.'
=
143
; 1
IF
RECEIVE
FLAG=0
TI£N
=
144
RC\II!IJI!.
IKJ\I
II,
FLreYT
=
145
.7110
RCVII19
=
146
; 2
IF
SERiAl
INPUT=SPACE
THEN
=
147
JTe
XI'IIT
=
148
; 3
RECEIVE
FLAG:=l
=
149
HOV
A.
FlreYT
=
1S!}
ORL
it,
'RC~'FlG
=
151
i 3
BYTE
FINISI£D
FLitG:=8
= 1
S2
ANl
It
It«lT
Il'1'FNFL
=
153
.2
ENDIF
=
154
HOY
FLGBYT,
it
=
155
Jt1P
XI'IIT
= 156, 1
ELSE
SIP{;f
RECEIVE
FLAG=1
TI£N
=
157
.'
2 IF
S','NC
FlAG=0
Tl£N
=
1SS
Rf:v310.
JB1
RCY033
=
159
.i"
IF
SERIAl
INPUT=5PACE
l~EN
Figura 4 (continued)
All mnemonics copyrighted © Intel Corporation
1979.
6 I
I
LOt
OBJ
8826
36~3
002'3
4302
002A
AE
~1€t<'B
B821
002D
8080
002F
BN!4
tlfJ31
0464
0033
53FE
0035
0036
lI464
003$
ED64
003A
BOO4
003(
5259
003E
97
003F
2642
0041
Ii?
0042
P,s21
0i.l44
F£t
0045
67
0046
riO
0047
E664
0049
BS2!l
0048
A!l
004C
FE
004[)
"1254
1!94F
4304
9951
fiE
0052
0464
0054
43<14
0056
AE
0057
8464
=
160
=
161
..
4
=
162
=
163
=
164
.4
=
165
=
166
=
167
; 4
=
168
=
169
=
17~
= 171; 4
SOIJRCE
STATEMENT
JTIl
RC\'820
5'ING
FLffi=l
OI"L
A,
J5VNFLG
1'10'1
FUlB'IT.
A
DA1R:=80H
MQ~
RI!,
mATA
MO','
@R~.
188H
SRl'lPLE
CNTR
=4
~(l\'
SAl'lCTR,
44
JI'f'
XI'IIT
ELSE
SINCE
SERIf!:..
INf'lJT=I'IAFV
THEN
~(CEIVE
FLA(,
=0
=
172
~GV820
ANt.
A,INOT
RCVFLG
=
17:;.3
[N[)IF
=
174
=
175
OOV
FLI:iWT.
A
Jt1F'
XI1lT
=
176;
2
EL
Sf
51
NeE
sw~:
r
LAG=l
THEN
=
177
of
7
SRMI'LE
C(ll.JjTE~
=SAI'II'LE
COUNTER-l
=
178
RC'v'0J~
DJNZ
SMTR,
:<~lT
=
179
.3
=
180
; 4
= 1st
IF
Sp,r1PLE
~WN1ER=tl
nOl
SAMPLE
CDUUTER
=4
I'IOV
5AI1CTR,
t4
IF
B'r'TE
FItHSHf[l
FLAG=8
THEN
=
182;
4
=
lB3
JK:
RCVB5B
=
184
cu.
C
=
185
.;
5
=
186
JNTO
=
187
CPL
=
188
RCV040
I'lO\l
=
189
rtOV
=
139
; 5
=
191
lIRe
=
192
rtOV
=
193
i~
=
194
mc
=
195
;6
=196
=19i'
= 198; 6
=
199
=
299
=281.7
=
292
=
293
=204
=
205;
6
=206;7
=
287
.~
.(
=
298
RCV045.
=
209
=
218
=
211
=
212
;6
=
213
.~
,
.J
=
214
I10V
JB3
;
,,:w
~L
If.l\I
JI1'
CARR'{
=SERIHL
INPlIl
RCV049
C
Re.
t!'IDATff
fl,~e
SHIFT
DATA
t.'liJ:n
WllH
CAR~I'
A
~R0,A
IF
CARRI'=1
THEN
:,:MIT
OI<TIATA
=[!ATn
1"0.
tHlJl;(!RT
@R9,A
IF
DATA
I<EA[!'"
FLAG~
If£N
fl..FLGBYT
~C:'oJi)45
SIr'TE
FINISHEr>
FLRG=l
A,
.BVFhfL
FUlB\'T.
A
xlm
ELSE
SIr'TE
FINISHED
FLfil3:=1
CIVERRI.lN
FLAG
=1
fl..
RGB\'T
A
..
t(B'r'FNFL
OR
OVRIJN)
RGBI'T.
A
END
IF
ENDIF
XMIT
Figure 4 (continued)
All
mnemonics
copyrighted
<Cllntel
Corporation
1979
AP-49
7
AP-49
LOC
1:Ie]
OO~9
~65F
B8"....B
0)8
BBSV
8461
9061
'EFC
0063
f'E
0064
le
0065
2303
0067
5C
006.0,
9697
006fI
FE
00f.s
37
006C
0286
ooE.£
2324
0070
DC
0071
%?B
00;-::
A5
6874
8'5
SEQ
SOlilU
STATEPIENT
=
215,4
aSE
SINCE
BI'TE
FINISHED
FLfIG=i
THEN
=
216
; 5
IF
SERIAL
INPIJT=1ffIl(
THEN
=
217
RCV!l58
JNT9
":(1'060
=
21B
.'
6
riftTA
REAlN
FLAC,:
=1
=
219
=
229
=
221
;
'5
ORL
A,
.DRD','fL
..III?
RC','870
ELSE
SHU
SERIAL
INPUT=SPACE
THHI
ERROR
FLAG.
=1
=
223
RCVI36B:
ORL
A
.•
tERRFL6
=
224
,5
ENDIF
RECEI'''~
~LfIG.
=13
=
226
,5
5~'NC
FLAG:
=i3
=
227
PCII!)79.
ANL
A.
"lOHSYNFLG
OR
RCVFLG)
=
228
HOV
FLGB'ir,
A
=
229
,4
ENDIF
=
V.l,
3
ENC'IF
=
231,2
ENfiIF
=
232
,1
EllDIF
=
213
tEJECT
= 2]4.,
=
235
;
=
236
,;
STAn
OF
TRANS/'IIT
ROUTINE
=
237
'
=
238·1
=
2;9
,
TRANSMITTER
OUTPUT
BIT
IS
P2-7
=
248
.'
1
TICK
WIJNTER.
=
TICK
CIJJHTER+1
=
241
;(IIIT
INC
TCKCTR
=
i42.
1
IF
TICK
GOUNTER
MOO
4=9
THEN
= 24;
~lOV
A
.•
lmfl
=
244
ANL
A,
TCKCTR
=
245
JHZ
RETURN
=
246
.2
IF
TRflNSMITTING
FLAG=1
HEN
=
247
MOV
A,
FLGBYT
=
248
CPL
A
=
249
JB6
Xl'ITB49
=
250
IF
STP8TS
EQ
1
=
251
; 3
IF
TICK
COUNTER=i30
11319
0e
BlNAR'I
THEN
=
252
i'IOY
A,128H
C!)()ITIONAL
ASSEHBL'~
=
63
XRL
A,
TCKCTI<
=
254
JNZ
XI1TB10
=
255
.,4
TRANS/'IlTTINI:l
FLAG
=9
=
256
MCI'¥'
A,
FLGBYT
=
257
IN.
A..
tOOT
TRNGFL
=
253
110\1
FLGB~'T,
A
=
259
JI1'
RETIJRN
=
2t'..0
ENDIF
=
261
,3
ELSE
IF
TICK
COIJNTER=OO
1001
913
BINARY
THEN
=
262
I.I'IT010.
110','
A,
.24H
=
263
XRL
A,
TCKCTR
=
264
mz
~1'IT920
=
265
4
SEND
EN!)
MARK
=
266
CLR
Fl
;
SET
FLff3i
TO
PlARK
=
267
=
268
=
269
; 4
CPL
F1
[F
STPBTS
EO
0
TRANSMITTING
FLAG
=0
Figure 4 (continued)
All
mnemonics copyrighted © Intel Corporation
1979.
8 I
I
LOC
OB.T
8075
FE
8076
531lf
8078
IE
99799497
807B
8822
8070
Fe
807E
67
807F
All
I.l08O
AS
0981
E697
8083
B5
80B4
8497
8086 8297
8088
8823
09SA
F0
808B
8822
888D
All
8091
4348
9993
fIE
9996
AS
8997
FF
8998
93
9188
FFFE
991E
8911>
801C
9997
0006
SEQ
SIlRCE
STllTEI£NT
=
278
/lOY
=
271
IN.
=
272
/lOY
=2H
JIf'
=
274
EtI>lF
A,FlGBYT
ft,
tr«JT
TRtU'L
FLGBYT,II
RET\J1N
=
275
, 3
ELSE
sua
TICK
COIJITEROTI£
fIlOYE
ClUff
TlEN
=
276
, 4
SEll>
I£XT
BIT
=
277
00929:
/lOY
119,
III»UB'~
=
278
/lOY
II,
~
=
279
I!RC
A
=
289
HOI!
@Rg,
II
=
281
CLR
F1
;
FLoo
1
WILL
BE
USEJ)
TO
BUFFER
TXD
=
282
Jt{:
RETlMl
,
00
TO
RETURN
POINT
If
OO=SPllCE
(8)
i
ELSE
Cl11PLEI'Errr
FLAG
1
TO
II
PIARK
=
283
eft
F1
=
284
JI1P
RETI»I
=
285
,:$
Etl>IF
=
286
.;
2
ELSE
sIIa
TRRNSfIITTlNG
~LAG=8
TI£N
=
287
; 3
IF
TRAlISMIT
REIllEST
FlAG=1
TlEN
=
2SS
XI'IT849:
JSS
RETIMl,
FLAG
BYTE
1l£RE
=
289
,4
=
298
=
291
=
292
=
293
=294,4
=
295
=296
=
297
,4
=
298
.
=
299
=3ee,4
=
381
=
382
;4
XIITBYT
:
=NXTBYT
IllV
119,
M«TBY
mY
A.@RiI
Pf.ly
R8,
t/lXlffijY
/lOY
tiRe,
ft
TRfIIS"IT
IIE!lI£ST
FLAG:
=8
I!OY
fI,
FLGBYT
IN.
ft,
INOT
T~L
TFRNSIIITTIrIG
FLfI!;·=1
ORL
A.'TRlG\.
mY
FLGBYT,
II
T/
CK
COOOER·
=8
IIOY
TCKCTR,
10
SEND
SYNC
BIT
(SPACE>
=
38:;'
CLR
F1
.;
SET
FLAG
1
TO
CAUSE
A
SPin
=
384
i 3
ENOIF
=
385
,2
EtI>lF
=
3\l6
..
1
EtI>IF
=
397
RETURN:
=
398
i 1
RESTORE
ACClIU.ftT~
=
389
mv
A,
ATEtIf'
=
319
RETR
:m
$EJECT
312
;
313
,
START
IF
TEST
ROOmIE
314
j
============
315
;
316
ORG
8189H
317
WICHT
EQU
-2
318
tFL!lB't'
EOO
1EH
319
IlSAllCT
EOO
1DH
320
"TCKCT
EOO
1CH
321
;
322
ERRCNT
EQU
R7
:m
PRTT
EQU
R6
324.;
Figure
4 (continued)
All mnemonics copyrighted
C>
Inlel Corporation
1979.
AP-49
9
AP-49
loe
IB1
II1IIIl
81'99
11182
BElli!
8194
23FE
811J6
62
8187
55
8198
25
81~
B81E
8198
B9II9
8180
AS
elSE
B5
8111F
BalE
8111
Fe
8112 8224
8114
B923
8116
FE
8117
R1
8118
35
8119
F8
911R4328
8He
R9
9111>
25
911E
1622
0120
2424
9122
149A
8124
F9
8125
37
8126
7238
0128
89211
812ft
F1
8128
FIE
812C
35
8121>
F8
SEQ
325
;
326
;
SW!CE
STfITEtIENT
327
; 1
ERRIR
ClUT:
=8
328
TEST:
'lIlY
EJIRCNT,18
329
; 1
REPEAT
118
TlOP:
331
; 2
PATTERN
:
=8
332
..:J\I
PRTT,
199
m
;""
INITlfUZE
TlItER
334
..:J\I
R,ITII'DIT
33S
..:J\I
T,R
336
STRT
T
m
EN
TCNTI
338
.:
2
CLERR
FLAGBYTE
339
..:J\I
R9,
IIflGBY
349
..:J\I
@R9,18
341
; 2
FUm=tlRRK
342
elI?
F1
343
CPt.
F1
344
; 2
P.EPERT
34'5
TlLOP:
346
;3
347
348
349
358
;4
351
3S2
353
3S4
;4
3S5
3S6
357
358
359
368
361
362
363
364
TESTR:
165
13
366
;3
367
TREC:
368
369
379
371
14
372
373
374
37'5
; 4
376
m
378
3(9
IF
TRRNSPIIT
REHST
FLOO=8
T1£N
..:J\I
Re.II'IFLGBY
..:J\I
R.@R9
JB5
TREC
NXTBYTE
:
=PATTERN
..:J\I
Ri.1fIIXTBY
..:J\I
R.PflIT
..:J\I
@R1,R
TRfIISIIIT
REHST
FLoo=1
DIS
TCNTI;
LOCK
OUT
TlI'ER
INTERRlPT
..:J\I
ORL
f!OII
EN
JTF
JIll
CflL
ENDIF
@RIj,R
TCNTI
TESlft
TREe
lJIRT
;
so
TIflT
ItITI.H.
EXCLUSIIJI
IS
IftINTHII£D
IflILE
;
Uf
ROO
B\'TE
IS
BEING
PIOO
IFIED
i
Cfll
lJIRT
BECflISE
TIllER
OI/Er(FLIl€D
IU:H¥.i
LOCKOUl
IF
DRTR
REfI)Y
FlRG--t
THEN
Itl\I
R.1!R8
CPt.
R
JB3
TRECE
PRITERN:=OOlfITA
tt)\I
Ri,
IfIOI<DRT
!lOY
ft,@R1
ItO'.'
PAIT.R
DRTR
REfllY
flAG:
=8
DIS
TCNTI
I
LOCK
OUT
mER
INTERRlPT
;
so
THAT
1tITtR.
EXClUSIIJI
IS
IfHNTIRNED
IoHILE
I
11£
FLAG
BYTE
IS
BEING
IIOOIFIED
Figure 4 (continued)
All
mnemonics copyrighted Cllntel Corporation 1979.
10 I
I
AP-49
LOC
OBJ
912E
53F7
9139
AI)
913125
9132
1636
(11342438
9136
148A
ens
F9
9139
53913
9138
C69F
913f)
1F
813E
2492
USER
SYI1BCtS
SEQ
SOORCE
S1ATEI'ENT
388
IN..
3B1
"'"
3B2
EN
383
JTF
384
JI'f
A,
IIWJT
DRD'IFL
~,A
TeNTI
TESTB
TR(CE
38S
TESTS:
CALL
I.III1T
;
CALL
UART
IF
TIl'IER
OYERFLIlEO
Dl.JRING
lOCKWT
3S6
TRECE:
3B7
; 3
EN>IF
388;
2
UNTIL
ER~
FLAG
CCil
MRRUH
FLAil
3B9
I'KlV
A,@R!I
3913
ANI.
A.
I(OYRlJl
CCil
ERRFLG)
:m
JZ
lILOP
:m
; 2 I
NCREI'fNT
EJ1ROF!
COUNT
m
11£
E~CNT
394
; 1
I.tITIL
FOREIlER
195
Jrf'
TLOP
flIDIP
9997
B't'FN'L
iKI84
DRl>YFL
9998
ERRCNT
0097
ERRFLG
9919
FlGBYT
0006
I1AFJ(
898(1
f10ATA
!I!l21
IFLGBY
991E
HNXTB't'
9923
IQ(llAT
!1!129
IISIlICT
8910
"TCKel
981(;
NXtITB't'
Il822
0I1AR1(
9815
OSPACE
9911
O'MJN
!1(18(1
PAll
l1li96
RCV800
6917
J<CV910
91124
RCW20
8933
RC'r'930
9838
RCV848
9942
kC'r'945
9854
11CV95i.:l
9959
RCY960
00'5F
RC'r'970
Q061
RC','FLG
9891
REG9
9009
RETURN
9Il9,
SAl'tTk
iIII85
SPACE
FF7F
STPBTS
11989
SYhflG
9992
TCKCTR
00i!4
TEST
8100
TESTA
91<.'2
lE5TB
(1136
11lOf'
0191'
1I1'1::NT
Ff~E
TISR
8087
TlOP
9182
TREe
9124
TRECE
8138
TRNGFL
8948
n:RQFL
002(1
IJART
900ft
X"1l
1"!064
0091(1
Iti!6E
XIIT929
8978
001140
9086
flSSEMBlY
COMPLETE,
00
ERRCCil5
Figure 4 Icontlnued)
All
mnemonics
copyrighted
<0
Intel Corporalion 1979.
MULTIPLY ALGORITHMS
Most
microcomputer
programmers have at one
time
or
another implemented a
multiply
routine as part
of
a
larger program. The usual procedure
is
to
find
an
algo-
rithm that works and
modify
it
to
work on the machine
being used. There is nothing wrong
with
this
approach.
If engineers
felt
that they had
to
reinvent the wheel
every
time
a new design is undertaken,
that's
probably
what
most
of
us would
be
doing-designing
wheels. If
the
efficiency
of
the
multiply
algorithm, either in terms
of
code size
or
execution
time
is important, however, it
is
necessary
to
be reasonably
familiar
with
the multipli-
cation process so that appropriate optimizations
for
the
machine being used can be made.
To understand
how
multiplication
operates in the binary
number system,
consider
the
multiplication
of
two
four
bit
operands A and
B.
The
"ones
and zeros" in A and B
represent the
coefficients
of
two
polynomials. The
operation A x B can
be
represented as the fOllowing
multiplication
of
polynomials:
A3*~
+ A2'2?-
+ B2'2?- +
AO't>
+ BO'2°
X
B3*~
+
BOA3*~
+
BOA2'2?-
+
BOA1'2'
+
B1A3'z'
+ B1A2*23 + B1Al'2?- + B1AO'2'
+
B2A3'~
+
B2A2'2
4 +
B2Al'~
+ B2AO'22
+
B3A3'2
6 +
B3A2'2
5 +
B3Al'2
4 + B3AO'23
+ BOAO't>
11
AP-49
The sum
of
all these terms represents the product of A
and
B.
The simplest multiply algorithm factors the
above terms as follows:
Since the coefficients
of
B (i.e.,
BO,
81, 82, and 83) can
only take on the binary values of 1
or
0,
the sum
of
the
products can
be
formed
by
a series of simple adds and
multiplications by two. The simplest Implementation
of
this would be:
MULTIPLY:
PRODUCT
= 0
IF 80 = 1 THEN
PRODUCT:
=
PRODUCT
+ A
IF
81
= 1 THEN
PRODUCT:
=
PRODUCT
+ 2* A
IF
82=
1 THEN
PRODUCT:
= PRODUCT+4*A
IF 83 = 1 THEN
PRODUCT:
=
PRODUCT
+ 8* A
END
MULTIPLY
In order
to
conserve memory, the above straight line
code is normally converted to the following loop:
MULTIPLY:
PRODUCT:
=0
COUNT: = 4
REPEAT
IF 8(0)=1 THEN
PRODUCT:
=
PRODUCT
+ A ENDIF
A:=2*A
8:=
812
COUNT:
= COUNT - 1
UNTIL COUNT: = 0
END
MULTIPLY
The repeated multiplication
of
A
by
two (which can
be
performed by a simple left shift) forms the terms 2*
A,
4*A, and 8*A. The variable 8 is divided by two (per·
formed
by
a simple right shift)
50
that the least signifi·
cant
bit
can always
be
used to determine whether the
addition should
be
executed during each pass through
the loop. It is from these shifting and addition opera·
1515-·
II
"::S-4ll1lf'1
-41
I'KRO
RSSEItBLER,
V2.
8
LOC
OBJ
SEQ
sW1CE
STRTEtalT
1 stKRCfILE
2 SIIUUDK H.WI'S.
HEli)
tions that the
"shift
and add" algorithm takes its com-
mon name.
The
"shift
and add" algorithm shown above has two
areas where efficiency will
be
lost If Implemented in the
manner shown. The first problem is that the addition
to
the partial product is double precision relative
to
the
two
operands. The other problem, which
Is
also related
to
double precision operations, is that the A operand is
double precision and that
it
must
be
left shifted and
then the 8 operand must
be
right shifted.
An
examina-
tion
of
the "longhand" polynomial
multir
ication will
reveal that, although the partial product is
ondeed
dou-
ble precision, each addition performed is only single
precision. It would
be
deSirable
to
be
able
to
shift the
partial product
as
It
Is
formed
so
that only single precl·
sion additions are performed. This would
be
especially
true
If
the partial product could be shifted into the
"8"
operand since one bit
of
the partial product is formed
during each pass through the loop and (happily) one bit
of
the
"B"
operand is vacated. To do this, however,
it
is
necessary
to
modify the algorithm so that both of the
shifts that occur are of the same type.
To
see how this can
be
done one can take the basic
multiplication equation already presented:
and factoring
:t
from the right side:
A*B=:t[BO*(A*2-
4
)+
B1*(A*2-~
+
B2*(A*2-
2
)+
B3*(A*2- 1
»)
This operation has resulted in a term (within the
brackets) which can be formed
by
right shifts and adds
and then multiplied by
:t
to
get the final result. The
resulting algorithm, expanded
to
form
an
eight by eight
multiplication, is shown in figure
5.
Note that although
the result is a full sixteen bits, the algorithm only per-
forms eight bit additions and that only a single sixteen
bit
shift
operation is involved. This has the effect
of
reducing both the code space and the execution time
for the routine.
3 i
*******-*-********************'"*****************-*******-*****-***
4.'*
12
7
i*==============--========--====--===-
S i*
9
i*
19
i*
11
i*
12
i*
13
.'*
THIS
UTILlT'!'
PROVIDES
ff4
8
BY
S
UNSIGt£D
IU.
TIPL
't'
RT
ENTRY:
A =
LOWER
EIGHT
BITS
If
liEST
lNATJON
(J>ERfH)
XA=
LOn
CARE
R1=
POINTER
TO
SOORCE
(J>ERfH) (1'Ill
TJPum
IN
INl
ERNAI..
1'EI1E000'
Figure 5
All
mnemonics
copyrighted
to
Intel Corporation 1979.
*
*
*
I
I
LOC
OBJ
0002
B£:OO
0004
129£
0006
2A
e~e7
9/
0008
67
ee0:.
2A
OOOA
67
009B
EBe4
ooel)
8]
SEQ
14
;*
15;
*
16
;*
17
.o*
18
;
'"
19,:.
SOIJlCE
STRTEMENT
RT
EXIT,
R =
LOI6:
EIGIH
BITS
OF
RESULT
XA=
UPPER
EIGHT
BITS
OF
RESUll
C =
SET
IF
OI/E~lilol
EL<;£
ClEff<ED
*
'"
*
*
21!
,:
**************************"'******~******$*****.****t.**.**,
••
***~."'**.*.**.***.
21;
22
:
n SI":LiJ[lE(:FUPYS
Pr.U
24
..
1
!1f'Y8li8
,
25
,1
I'IULTiFLlCflNll(1S-8
J
=0
26,
1
COl~T,
=8
<7
; 1
REPEAT
;::3:~
IF
I'1ULTlPlICflNI)[0J=fi
THEIl
BEGIN
25
. 3
MUlTi
PLI
CANto
=MliLT
I
PLI
CflNtot~
30
_;~.
E~5[
jl
;!
MIJL
TlPLlCANtH5-S
1,
=t1IJL
TJPLllANrl!
15-8
J+I'IUL
T1PlIER
~2
; 7
MI.lL
T1PLlC~Nr,:
=MlJl
T1PLlCA/()/2
ENflIF
74
; i
':DIJtlT
=CO!Jm-1
35
1
t~TJl
COll'lT
=e
:';
1
ENP
tlP~I·3:<S
?8
EOIJATES
]9
:
40
:
41
XA
WI.!
R2
42
COliNT
EQI.I
R~
~
43
WH
EO\)
R4
44
;
45
[lIGPR
Ell.!
46
:
47
$EJECT
48
$INCLlII.'E(:FUIPl'el
49:
1
MP¥8X:3
50
t1H'8~:S:
51.
1
MIJL
TIPLICAN[l[
15-8
1:
=9
52
l'IO'J
XA,
100
53
. 1 collm
=8
54
I'IO'~
W.JNT,
lIS
5~,
; 1
REPEAT
56
MPYSlP
57:
2
IF
/JJL
T1PLlCAND!
e
1=13
THEN
BEGIN
~08
J80
PlP'r'eA
59
,:
3
I'IlJL
n Pll
CANto
=MlIL
TJ
Pli
CANfl/2
60
iiCH
A.,
XfI
61
CLR
C
62
63
64
65
66
67
~
..
<
RRC
A
XCIi
RPC
[HHZ
PET
ELSE
A,
;\A
fI
COUNT,
MP'!'SlP
Figure 5 (continued)
All
mnemonics
copyrighted © Intel Corporation 1979.
AP-49
13
AP-49
Loe
Ill}
SEQ
SOIJRCE
STATeENT
6S
I'!PI'SA
69
;~
IlIL
TIPLICRND£
15-81:
=tlIJL
TIPL
ICfIND(
15-8]f1U.
TIPLIER
008E
2f1
ll09F
61
0019
67
0011
2H
8012
67
9013
EB94
001583
79
71
72
73
74
75
76
XCH
A,XA
~
R,~1
RRC
II
XCii
A,XA
RRC
A
DJNZ
CIUIT,
IP/BI..~.
RET
III
TIPLIC.ANI):
=,...ILTIPLICftND/2
i'8
; 2
ENDIF
79
;2
WI.JIIT·=COON'-1
&'6
.'
1
IJITIL
COUNT
=0
~:1
.'
1
END
MP~'S~<8
82
EN(;
USER
S','MBOLS
COUNT
9003
DIOPP
O~I;
A5SEHBL
Y
COIWLETE·
NO
EI"PORS
All
mnemonics
copyrighted © Intel Corporation 1979.
DIVIDE ALGORITHMS
In order
to
understand binary division a four bit opera·
tion will again
be
used as
an
example. The following
algorithm will perform a four by four division:
DIVIDE:
IF 16'DIVISOR>= DIVIDEND THEN
SET OVERFLOW
ERROR
FLAG
ELSE
IF S'DIVISOR>= DIVIDEND THEN
QUOTIENT(3]:= 1
DIVIDEND: =
DIVIDEND-
S'DIVISOR
ELSE
QUOTIENT(3]: = 0
ENDIF
IF
4'DIVISOR>=
DIVIDEND THEN
QUOTIENT(2]: = 1
DIVIDEND: = DIVIDEND -4'DIVISOR
ELSE
14
QUOTI
ENT(2]:
= 0
ENDIF
IF
2'DIVISOR>=
DIVIDEND THEN
QUOTIENT(l]: = 1
DIVIDEND: = DIVIDEND -2'DIVISOR
ELSE
QUOTIENT(l]: = 0
ENDIF
IF 1 'DIVISOR> = DIVIDEND THEN
QUOTIENT(O]:= 1
DIVIDEND: = DIVIDEND -1'DIVISOR
ELSE
OUOTlENT[O):
= 0
ENDIF
ENDIF
END DIVIDE
The algorithm is easy
to
understand. The first test asks
if
the division will
fit
into the dividend sixteen times.
If
it
will, the quotient cannot
be
expressed in only four bits
so
an
overflow error flag is set and the divide algorithm
ends. The algorithm then proceeds to determine
if
eight
times the divisor fits, four times, etc. After each test it
either sets or clears the appropriate quotient bit and
modifies the dividend.
To
see
this
algorithm in action,
consider the division
of
15
by
5:
00001111
(15)
-01010000 (16'5)
Doesn't
fit-no
overflow
00001111
(15)
-00101000 (S'5)
Doesn't
flt-Q[3]
= 0
00001111
'(15)
-00010100 (4'5)
Doesn't
fit-O(2]
= 0
00001111
(15)
-00001010 (2'5)
00000101
Fits-O[1]
= 1
00000101
(15·2'5)
-00000101 (1'5)
00000000
Fits-O(O]
= 1
The result is 0 =
0011
which is the binary equivalent of
3-the
correct answer. Clearly this algorithm can (and
has been) converted
to
a loop and used to perform divi-
sions. An examination of the procedure, however, will
show that
it
has the same problems as the original
mUl-
tiply algorithm.
I
I
AP-49
The
first
problem is that double precision operations are
involved with both the comparison
of
the division with
the dividend and the conditional subtraction. The
second problem is that
as
the quotient bits are derived
they must
be
shifted
into
a register.
In
order
to
reduce
the register requirements,
it
would be desirable to
shift
them into the divisor register
as
they are generated
since the divisor register gets shifted anyway. Unfor·
tunately the quotient
bits
are derived most significant
bits first
so
doing this will form a mirror image of the
quotient-not
very useful.
Both
of
these problems can be solved
by
observing that
the algorithm presented for divide will
still
work
if
both
sides
of
all
the
"equations"
involving
the
dividend are
divided by sixteen. The looping algorithm then would
proceed
as
follows:
DIVIDE:
QUOTIENT: = 0
COUNT: = 4
DIVIDEND: = DIVIDENDI16
IF DIVISOR>= DIVIDEND THEN
OVERFLOW FLAG: = 1
ELSE
REPEAT
DIVIDEND: = DIVIDEND'2
QUOTIENT: = QUOTIENT*2
IF DIVISOR> = DIVIDEND THEN
When this algorithm is implemented on a computer
which does not have a direct compare instruction the
comparison is done by subtraction and the inner loop
of
the
algorithm is modified
as
follows:
REPEAT
DIVIDEND: = DIVIDEND'2
QUOTIENT: = QUOTIENT*2
DIVIDEND: = DIVIDEND -DIVISOR
IF BORROW = 0 THEN
QUOTIENT: = QUOTIENT + 1
ELSE
DIVIDEND: = DIVIDEND+ DIVISOR
ENDIF
COUNT: = COUNT - 1
UNTIL COUNT=O
QUOTIENT: = QUOTIENT + 11'SET QUOTlENT[Ol'!
DIVIDEND: = DIVIDEND -DIVISOR
ENDIF
COUNT: = COUNT - 1
UNTIL COUNT=O
ENDIF
END DIVIDE
An
implementation
of
this algorithm using the
8049
in·
struction set is shown in figure
6.
This routine does
an
unsigned divide
of
a
16
bit
quantity by an eight
bit
quan·
tity. Since the
multiply
algorithm
of
figure 5 generates a
16
bit
result from the multiplication
of
two
eight
bit
operands, these
two
routines complement each other
and can be used
as
part of more complex computations.
l5l5-]] W
5-48,
1JPH1
I'IfICI1O
ASSEMBLER,
112.
Ii
LOC
OS.)
5EP
SOIJPCE
~:TATEMENT
1
$I'IAC~'OFILE
;: f1NClI.I[;£IF1DIV16
HE[;)
!
"t*.******~*·~*******.********",*",***************.*
...
**
********
..
*****************
4 .
,t
'"
'5
;*
DIII1t.
..
6
;*
7 .
*=====================================================================*
8 ;..
..
9
;*
10
;
..
11
;*
12
;
t-
13
.•
14
;
..
THIS
UTIUW
ProvIDES
ftj
16
B~'
8
I.lNSIGNE[!
DIYID.
AT
ENTR',':
A =
Lrn.ER
EIfjHT
BllS
OF
rlfSTINATlON
OPERAND
XA=
UPPEP
UGHT
BITS
Of
lilVIDEND
1<1=
POWlER
TO
[lIVlSOR
HI
INTERNAl.
t1EM(lI.'Y
15
;
'"
AT
EXIT'
A =
LOWER
EIGHT
BITS
OF
RESULl
XA=
PEt1A
I
NDER
Figure 6
..
'"
..
..
*
*
..
AI!
mnemonics copyrighted © Intel Corporation 1979.
15
AP-49
LOC
OBJ
009]
37
0094
61
BellS
37
0006
F600
lj~)(18
~;'
~01J9
e424
900B
€.1
SEll
is
; t
19
.'.
SOORCE
STATEMENT
C =
SET
IF
OVHfLOW
elSE
CLEARED
*
*
213
.'
**:+.*****~:.:
t;**.f.::+.f:*
~.f:*
«**·f;*:U:i·.f.***ic***fi*'~*******·fC***'i:,f.:*********,..***t**.
**:01.******
21,
22
;
2:'
tlNfLIJDE(
F1
L,IVI€.
pr,ll
24
,1
folV16
2"i
; 1
C(IIJIT
=8
26
1
['IVH'EN[>[1~,-9J=[IIVWfN[U5-8HHVISO~
'2?
; 1
II'
1l0RRow=e
THEN
i*
IT
FITS.',!
2S
;:<
SET
OVERFl.O'J
~lfl(i
29
; 1
ELSE
30
;:;:
0E5TO~"E
r,!'JrDENll
~i
,2
PEPERT
,,",;
[)1'./iDEND:=[lII/IDE~*2
13
:
~
ouormn
=l~JOTIE~T*2
::4
,]
[;I\iWEN[>[15-81=[HVWEN[l(1~-8J-i)IVISOF
35
;,
IF
80""'01-1=1
THEN
;'6
,4
>'E5TORE
(iJ\!WEN!)
37
':
ELSE
38
,4
l)IJOTIENTUll
=1
]0:;
':
EllL/IF
4,;
;,'
(:OU~-IT
=COUNT-1
41
; 2
IJtITlL
(0I.lllT=9
42
; 2
CLEAR
OVERFLOW
FLAG
43
; 1
E~/Il;F
44
,1
E~/IlDI'/t:)E
43
4~
,
to'JfHES
47,
48
49
i~A
E9U
5tl
cottn
EQU
51
':12
fEJECT
53
$INCLUDE(
:Fl[;lV16i
54
,.1
[11",116,
55
DIV16
:~CH
H.
:<:A
ROIJTINE
mRKS
MOSTl','
WITH
BJlS
15-8
56
; 1
C(lUNT'
=13
'57
MC'"
COUNT
.•
~,
58
,1
DIVlDEN[![i5-Bl=DIVlDEN['[1,)-3J-DIVISO~:
59
CF'L
A
6e
AN'
A,
@Rl
61
Cf'L
A
62
.1
IF
BOIiFOW=tl
THEN
/*
[T F
115'/
61
JC
~'IVI~
64
;2
65
;ET
OVERFLO~
FLf<G
(PL
66
67
; 1
ELSE
6B
[·I'·,'IA
JMP
DIVIS
69
c'
"'ESTORE
DIIIlIIEND
7tl
'lOO
A
..
@Rl
71
~
REPEAT
72
DIVILp·
"J
,]
Dl'''IDEND=DllllDE~ID*~
Figure 6 (continued)
All
mnemonics
copyrighted © Intel Corporation 1979.
16 I
I
W:
08.J
OOOC
97
tlfJOO
2A
000£
F?
SEQ
~e
'._'
76
77'
99eF
2F!
713
0010
F7
79
0011
£618
8e
00L
-,7
S1
0014
61
32
SOURCE
5TFtT81ENT
i.lLMJTIElH
=QlJOTlEtiT*2
l:lR
~CH
fI,
;\H
I'LC
H
}{CH
fj,XA
P'
C
L'-,
A
me
vIVIE
CPt
A
AW
fj,@R1
CI'L
A
0015
17
e016
042e
~:4
.1M,.
[,
mc
AP-49
85
':
[il\IIDHlI)[15-8J :[IVWEt« 15-SHIVISG!
a018
~?
0019
61
00lA
37
(';;1[;
61
oe1E
1:1421
1)021
£BOC
0024
2F:
~3025
87
iJ5E1l
S~'MBOlS
t~6
[lIVIE
CPL
A
<"
AW
H
..
@Rl
88
Cf'L
A
;,'9
IF
E:OI<'R!JW=1
lHEN
93
~4;
:
95
r!!VTC
%
9('
98
)~(c.
v j
VIC
RETI)RE
I,
h'
WEN!)
ilW
.'t'If'
EL~,E
A,~i
(,UJ[)
GIJOTlENH91=l
INC
;11
HIUIF
~9
C,)IJNT
:COUNT-1
=
l~o'j
. < l"'TiL
C.O!JNT=0
=
Wi
Dl'-m'
Dmz
GOUtlT,
DI'ilLP
:
1';'2
; 2
=
W?:
(LEAP
O',lERFLOW
FLAG
CLR
= 1M 1
EH[jI~
=
lffS
,1
aIDf)IVID£
= i06 (
..
P:'I8.
:-~CH
A.,
XA
=
1~7
RET
198
END
COUNT
i;(UJ~
r.rV16
000fJ
wm
0000
DiVIB
9924
DIYIC
0020
DIYW
0021
[)IVIE
~918
DI'.'ILP
00\)';
r:A
001)2
AS~.£rlf;U
wt'1F'lETE,
~IO
E~RI)RS
Figure 6 (continued)
All mnemonics copyrighted © Intel Corporation 1979.
BINARY AND BCD CONVERSIONS
The conversion
of
a binary value
to
a BCD (binary coded
decimal) number can
be
done with a very straight·
forward algorithm:
CONVERLTO-BCD:
BCDACCUM: = 0
COUNT: = PRECISION
REPEAT
BIN:=BIN
* 2
BCD: = BCD * 2 + CARRY
COUNT: = COUNT - 1
UNTIL COUNT = 0
END CONVERT_TQBCD
The variable BCDACCUM is a BCD string used
to
ac·
cumulate the result; the variable BIN is the binary num·
ber
to
be converted, PRECISION is a constant which
gives the length, in binary bits
of
BIN. To see how this
works, assume that BIN is a sixteen bit value with the
most
significant
bit
set. On the first pass through the
lOOP
the
multiplication
of
BIN will result
in
a carry and
this
carry will be added
to
BCD.
On
the remaining
passes through the loop BCD will
be
multiplied by
two
15
times. The initial carry into
BCD
will
be
multiplied
by
215 or 32678, which
is
the
"value"
of
the most significant
bit
of
BIN. The process repeats with each bit
of
BIN
being Introduced
to
BCDACCUM and then being scaled
up on successive passes through the loop. Figure 7
shows the implementation
of
this algorithm for the
8049.
17
AP-49
18
!SIS-I! II(S-481IJ'Hl
~O
ASSElIIll[R.
Y2.
fa
LOC
OBJ
SEQ
SOIEE
STATEItENl
1
SllfUCf"ILE
2
SIN::lOOEtFLCONBCO
I£D)
}: i
."******~~
••
***************-**********""'**************.*********************
4
if
*
5 ; *
CONBcr>
*
6
~
*
::
7;
*========:.=============================================*
8
;.
9 ;,.
THIS
UTILITY
CONYERTS
A
16
llli
BlmR'r'
IIfLUE
10
Bc.D
*
18
,*
Al
ENTIIV
11
.;
* A =
lM~'
EIGHT
BlTS
l.,
BlrtfI'r'
\Ifl.IJE
*
12
; *
:~R=
UPPER
EIGHT
BnS
OF
B!NAP'r'
VIl.IJE
*
13
i *
R8=
p:)mT~R
TO
i<
rACKEe>
BCD
S1Rlt¥.l
*
14
i.
15
!*
16.;l
17
;.
18
;t
19
;.
tiT
EXli
A :
IJNDEF
I
NED
;<11=
IJNDEFII£D
C :
SET
IF
OVEFFLIlo:
ElSE
CLEARED
*
~
,.
,.
,..
*
29
;
*******~*****************.**.*.~**.***.*****
••
*****.**.****
.I<******************
21
;
22,
2J
SIN::lOOE(:F1CONOCl1.
PDt)
24
1
CON\'EI11-
TO.SCI';
25
! 1
EIl'W(:(.
=0
26.
1
COUNT
=16
27
1
REPEAT
2B.2
BIH:=BIN*2
29
; 2
8CI)
.
=BC1>*2+CARRY
30
; 2
IF
CARIIV
FROII
BCDfa
GOTO
ER~
EXIT
11)2
1XlUNT:=rouNT-l
32
) 1
UlITll
(:OUNT=~
1J ; 1
00
CON\o'E!<'L
To_sm
34.,
1'5;
EQL!ATES
36
'17
;
}3
Y..A
E!!U
R2
J9
COUNT
E!!U
R3
40
ICNT
EQU
~4
41
)
42
DIGPR
EQU
3
43
.
44
fEJECT
4S
$IHCUJt'F:
F1
CON8CI))
46
.
47
TEI'IP1
SET
RS
48
;
49
,1
;:ONI/E~LTO_BCD
~~
r~6ro
51
; i
BCDACC
'=9
52
XCH
A,R8
Figu
..
7
All
mnemonics copyrighted C Intel Corporalion 1979.
I
I
LOt
OSJ
0001
A9
eoo2
P-
OOlE
~?
OOt1!5
1:1100
0087
19
0098
E':05
008C
97
~!'7
OOIJE
2ft
9I.l9F
F7
0018
~A
0011
~8
0012
A9
0013
28
0014
Bce3
0016
Ali
0017
Fl
!:l91S
71
~1019
57
iJI.Ilf1
M1
001E:
19
001C
Eet?
!JelE
F[J
00lF
F624
0021
EBOC
0023
97
USER
SYI1EiOlS
SEQ
SI)I.PCE
5HlW1ENT
5?
I'I(W
':.4
;-{CH
'55
M(l'J
'56
BroC(,f'l
I'[iV
'5,
IIIC
53
DJIl:
~9
; 1
COVliT
=1';
~'1.
fj
ft,110
ICNT,'DI~
i.f11,l0e
Pi
ICNT.
Bet:{iJA
~\3
i'KlV
COUNT.,
116
61
·1
~E?ERT
62
E:Wff.IB
~::
.;: li:N:
=SIN.;;
~4
CLP
(:
65
Pte
ft
XCH
RLC
y.cH
A.XfI
A
fI
..
:ifI
t:9
; 2
BCI)
.
=8CO*2tCflP.l1Y
79
litH
fl.
R8
71
I'[iV
Rl,fj
72
XCH
A
..
R9
?3
PlOY
ICNT.IDIGPR
74
p!oY
TEMP1.
R
7'5
8('[JOC
PlOY
ft.
@Pj,
76
ffiOC
A.
~1
77
Of;
A
78
PlOV
@Ri.
A
79
INC
R1
S0
I)
mz
lOll
.IlCCOC
Sl
1'1011
fl.
TEI1I'1
~2;
2
IF
CARRY
FPOM
BCDfICC
G010
ERROR
EXIT
83
Je
BrOCO!)
84
; 2
crAllfT
=COUNT-1
85
; 1
UNTIL
COIJHT=9
B6
r-
.lNZ
CWIIT,
BCOCOB
S7
ClR
C;
CLEAR
CARRY
TO
WDICATE
ta:HAl
TERMINATI~j
as
; 1
END
CIlN\I[RL
TO_BCD
89
BCOCO~
RET
ge
Elf'
AP-49
E:COCOA
iiOOS
BCDCoe
000C
BroCOO
0024
Bt..'DOC
0017
Cllle[!
0008
COUNT
0093
0
II»R
888~
100
M4
TEMP1
0005
~'A
0002
ffSSEM8L~'
COtIl'LETE,
~
ERIIORS
Figure 7 (continued)
All mnemonics copyrighted
C>
Intel Corporation 1979.
19
AP-49
20
The conversion
of
a
BCD
value
to
binary is essentially
the same process
as
converting a binary value to
BCD.
CONVERLTO.BINARY
BIN:=O
COUNT: = DIGNO
REPEAT
BCDACCUM: = BCDACCUM
10
BIN: =
10
BIN
+
CARRY
DIGIT
COUNT: = COUNT - 1
UNTIL COUNT = 0
END
CONVERT_TO_BINARY
The only complexity is the two multiplications by ten.
The
BCDACCUM can
be
multiplied by ten
by
shifting It
left four places (one digit). The variable
BIN
could be
multiplied using the multiply algorithm already dis·
cussed, but It
Is
usually more efficient
to
do this by mak·
ISIS-I!
HCS-4:;:/uPl-41
I'IftCRO
ASSEI'IBlEP
..
V2.
(1
lor
OSJ
SEQ
5(1J1!Cl
STATEMENT
1
mH(ROFlLE
2
$INCUJDE(
F1CCtlBIN.I£[»
ing the following substitution:
BIN
=
10'
BIN
=
(2)
(5)
(BIN)=
2'
(2
2+
1)
BIN
This implies that the value
10
BIN
can
be
generated by
saving the value
of
BIN and then shifting
BIN
two places
left. After this the original value
of
BIN
can be added
to
the new value
of
BIN (forming
5'
BIN) and then BIN can
be
multiplied by two. It is often possible
to
Implement
the multiplication
of
a value by a constant
by
using such
techniques. Figure 8 shows
an
8049
routine which con·
verts BCD values
to
binary. This routine differs slightly
from the algorithm above in that the
BCD
digits are
read,
and converted
to
binary, two
digits
at a time. Protection
has also been added to detect
BCD
operands which, If
converted, would yield binary values beyond the range
of
the result.
3:
********.*********
.....
***************.****.***
___
••
**_
......
_***
4 : l
'"
5
.:*
6
.:'
C!HlIN
'"
'"
7 ;
*========================================--======*
8
;*
'"
9
:.
THIS
umnv
CO,.."ERTS
A 6
DIGIT
ero
VAll.(
TO
fH~Y
'"
18
,.
AT
ENTI"Y·
'"
11
:
'"
110=
POINTER
TO
A
PACKEt>
BC{l
STRHIi
'"
12
:.
*
13
; *
AT
EXIT:
'"
14.:* A =
UJIER
Wi/H
BITS
(J'
THE
BI~Y
RESlll
1~
i'
Xfl=
UPPER
EIGHT
BITS
(J'
THE
BINff'Y
RESLlT
16
i' C =
SET
IF
OVERflOW
ElSE
CLEAREI>
*
17
.;
*
18
:
************"'**.*****~~*'I<***----***-"'-****'''''**'''****.-**'I,*
19.:
21
$lr1:LIM:(
·F1:C0N3IN.
PDl)
22.:
23
.
24
.:
1
efMt'ERLTO_8INlF~'
25
.:
1
POINTERS
:=PQINTER0+DIGITPRIR-l
26
:1
CWlT:=DIGITPRIR
27
; 1
BIN:=t'
2B
: 1
REPEAT
29
:2
BIN·=BIN*lC
~
.:
2
BIN:=BIII+MEH(Rll)[7-4J
11
: 2
BIN·
=BIN*l@
32
.:
2
BIN
=BIN+I1EH(RIl)n-eJ
All
mnemonics
copyrighted © Intel Corporation 1979.
I
I
Lot
reJ
9IJIi!4
88113
0006
27
0007
flfI
ttIJOC
fit)
~F9
009E
47
009F
530F
0011
61)
0012
2tI
0013
1399
0015
2A
0916
F62A
9918
1428
OO1A
F62A
a01e
AD
0il1D
Fe
aB1E
5~9F
9920
6D
9921
2A
All
mnemonics
copyrighted © Intel Corporation 1979.
SEQ
SOORCE
STATEI£NT
33
·2
POI'lTERIJ
=POINTER0-1
34.2
OOJIT=CWIT-1
35
1 ltlT!l
COlINT
=0
36
. 1
END
CON'fERUO_BlNARV
38
.
EQlJRTES
39
.
==--====
49'
41
XA
EIlIJ
112
42
GOIllT
EPll
R3
43
ICNT
EQU
R4
44
:
45
DIGPR
EQU
l
46
:
47
$EJECT
48
$INClUDE(
"Fi:C(HlIN)
49.
59
TEII'1
SET
R5
51
TEll';;:
SET
R6
S2
:
53
.:
1
CON~'ERUO_BINfIRY
54
COIeIN:
55
.:
1
POINTER9:=POINTER0+DIGITPAIR-l
56
1'10\1
A.1<0
57
roD
A.IOIGPI1-1
58
my
RlI
..
A
59
; 1
COliNT
=DIGITPAIR
69
1'10'1
tllUNT.
10
IGPR
61
.:
1
BIN
=0
62
CL~
A
E::
HQY
gAo
A
64
: 1
REPEAT
65
CGNBLP:
E'£:2
BIN:=BI~18
67
CflL
CONBtIJ
68
.]C
CONBER
69
: 2
BIN.=BIN+I'EM(RlI)[7-4J
79
11f.N
TEI'IP1,
A
71
'10\1
R.~
72
SW A
73
ANI..
A.
tllfH
74
A[oD
~,
TEl1I'l
('5
XCH
A.
XA
76
fU·C
A..
tOO
~
XCH
A
..
XA
(,
78
JC
C(H;£R
79
;2
~IN.=81N*lEt
80
CALL
CON810
81
Je
COIlSER
82
:2
SIN
=BIN+MEI'1(RI})[3-9J
33
MOV
TEi'1P1.A
84
I'1OY
A.@R1l
35
ANL
A.I0FH
Sf.
ROO
A.
TEtlPl
87
XCH
A,XA
AP-49
21
AP-49
LOC
OIl)
0022
l:l1Xl
0024
2A
00£"5
~(.2A
0027
CB
0028
EB0S
00211
83
0028
AD
tfe2C
214
002[l
AE
002E
2A
8I1~F
97
OO:l{t
F7
0031
2A
0032
F7
0031
2f1
0014
Ff46
0016
F7
8€G7
2A
003S
F7
0039
2P.
OO~
F646
003C
6[-
0830
2A
003E
IE
003:F
2A
0040
F646
8042
F7
0043
2A
0044
F7
9045
2A
0046
83
USER
S'r't1BOLS
SEQ
SOURCE
STATEI'IENT
SB
Allot
11,
100
S9
XCH
11,~
90
JC
COIflEP
91
; 2
POltlTER9.
=POINTER0-1
92
DEC
R9
93
; 2
COIJIT
.
=COUNT-1
94
,1 lJNllL
COI.IIT=l:l
95
[\.J112
COUNT,
C~BLP
96;
1
00
CON\IE11T
_
TO_BINAR','
97
CI)1BER.
liET
9B
$EJECT
99
=100
=
101
lITIllW
TO
I1lILTlPL¥
BIN
BI'
10
=
192
CAP.P.\'
WILL
BE
SET
IF
OI/ERFL()oI
OCCURS
=
103
;
=
104
C0Na1e.
1'1()\r'
TEm. A
.•
SAVE
A
=
105
XCH
A,XA
;
!iAYE
~
=
106
I'tOV
TEI'IP2,A
"
107
XCH
A,
>:A
=
108
,
=
109
CLR
c
"
110
RLC
A
BIN:=BIN*2
"
111
XCH
A..
XA
"
112
RLC
A
=113
Xf'Ji
A,XA
=
114
JC
CIltiE
.'
ERROR
011
OIIERFLOW
"
115
"
116
PLe
A ;
8111:=81,..4
=
117
XCH
A,~
=
118
RLC
fI
=
119
XCI{
fI,~
=
129
JC
COllllE
;
ERRU<
~
OYERrLOW
=
121
=
122
AOD
A,
TEMPi;
BIN.=8IN~5
=
123
XCH
A,
\(fl
=
124
fU('
A,
TEMP2
"
125
XCH
A,
XA
=
126
JC
COIlB1E
ERROR
ON
OVERFLOW
"
127
"
128
RL(;
fI
BIN:=81N*10
=
129
XCH
R,XA
"
130
RLC
A
" 1St
~<CH
A,XA
"
132
"
133
COliS1E
RET
=
134
"
135
;
136
eND
COtl!U\
092B
CONBlE
0046
CONBER
002A
COIlBIN
B009
CONBLP
9008
COUNT
8083
DIGPR
II1II33
ICNT
0004
TEII'1
0005
TEMF'2
0006
i~A
0002
ASSEMBL'y>
C(1'IPLETE,
NO
ERROIIS
All
mnemonics copyrighted © Intel Corporation 1979.
22
I
I
CONCLUSION
The design goals
of
the
full
duplex
serial communica-
tions
software
were realized;
if
transmission
and recep·
tion
are occurring concurrently,
only
42
percent
of
the
real
time
available to
the
8049
will
be consumed by
the
serial link. This
implies
that
an 8049 running
full
duplex
serial 1/0
will
still
outperform
earlier members
of
the
family
running
without
the
serial 1/0 requirement. It is
also
possible
to
run
this
program in an 8048
or
8748 at
1200 baud
with
the
same
42
percent CPU utilization.
The execution
times
for
the
other
routines
that
have
been discussed have been summarized in Table
1.
All
of
these
routines
were
written
to maintain
maximum
use·
ability
rather than
minimum
code size or
execution
time.
The resulting execution
times
and code size are there·
fore what
the
user can expect
to
see in a real applica·
tion. The results that were obtained clearly
show
the
ef·
ficiency
and speed
of
the
8049. The equivalent
times
for
the 8048 are also shown. It is clear
that
the
8049 repre·
sents a substantial performance advantage over
the
8048. Considering, in
most
applications,
that
the
8048
is
AP-49
the
highest
performance
microcomputer
available
to
date, the performance advantage
of
the
8049 should
allow
the
cost
benefits
of
a
single
chip
microcomputer
to
be realized in many
applications
which
up
until
now
have required
too
much
"computer
power"
for a single
chip
approach.
MPY8
DIV
16
CON BCD
CONBIN
EXECUTION TIME
(MICROSECONDS)
BYTES 8049 8048
21
109 200
--
37 183 MIN 335 MIN
204 MAX 375 MAX
36
733
1348
70
388 713
Table 1. Program Performance
23

Navigation menu