Alwac_III 3_Manual_of_Operation_1957 Alwac III 3 Manual Of Operation 1957

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alwac

corporation

manual

of
operation

alwac

ill-E

Copyright 1957 by
ALWAC CORPORATION
13040 South Cerise Avenue
Hawthorne, California
Form 10-0001-0

CONTENTS
Page

Page

6

INSTRUCTIONS

19

Memory Unit

6

ADDRESS LOCATIONS

34

Logic Unit

6

ADDRESS MODIFICATION

34

Power Supply Unit
Magnetic Tape Buffer

6
6

INSTRUCTION DOUBLING

35

Magnetic Tape Transport

6

INSTRUCTION TIMING

35

Card Converter

6

COMPONENTS

37

6

Flexowrite r

37

Control Panel

6

Oscilloscope

6

High-Speed Punched Tape
.C--onso Ie

41

Card Converter

42

Magnetic Tape Units

46

GENERAL

Flexowriter

High-Speed Punched Tape
Console
STORAGE

6
7

SYMBOLIC PROGRAMMING

49

General Storage Channels

9

Control Branching

50

Working Storage Channels

9

Sum of N - Quantities
Floating a Fixed-Point Number

50
51

Subroutines

52

WORDS

9

Instructions

10

Numbers

11

APPENDIX

12

A.

Arithmetic Elements

12

Power Supply Unit

14

LOGIC UNIT

CONTROL PANEL

16

OSCILLOSCOPE

18

Binary and Hexadecimal
Number Systems

53

B.

Table of Powers 'of 2

56

C.

Hexadecimal-Decimal
Integer Conversion Table

57

Hexadecimal- Decimal
Fraction Conversion Table

61

Operations by Alphabetic
Code

65

D.
E.

ALWAC III-E
MAGNETIC DRUM DATA-PROCESSING MACHINE

The ALWAC III-E is a general purpose modified single-address, numerical, binary computer. It is available in
two models with memory capacities of
4096or8192 words (135168 or 270336binary bits). This magnetic drum computer offers a large memory storage (heretofore available only in large scale electronic machines), ease of operation, selfchecking circuits,1 automatic operation,
ease of maintenance, and a very high
component reliability. Its great flexibility and large memory storage make
it possible to meet the needs of the business, engineering, scientific, and research organizations.
This computer uses a stored-program
to perform its computations which permits lengthy computations to be performed at electronic speeds. A wide variety

of input - output equipment is available
which includes punched tape, magnetic
tape, and punched cards.
Page 4 shows the ten units that make
up the AL WAC III-E Magnetic Drum Data
Processing Machine:
1. Memory Unit
2. Logic Unit
3. Power Supply Unit
4. Magnetic Tape Buffer
5. Magnetic Tape Transport
6. Card Converter
7. Flexowriter with punched tape control
8. Control Panel
9. Oscilloscope
10. High-Speed Paper Tape Reader and
Punch

A- U.1.

8.

IIADEI-.PU;NCH

C. CAID

alwac III-E

.a.M:1U.

C,oIlYElt II

D.

MEMOIY UNIT

E.

LOGIC UNIT

F.

'OWEI SUPPLY UNIT

G. MAGNEUC TAPE BUFFER

H.

MAGNETIC

J.

FLEXOWR·ITER

K. O'liATOR'S

TA.PE T.IAJUP.O.RT

CONSO.LE

L

DISPLAY UNIT

M..

HJG:H.-5'1ID PA'E~ tAPE READ AND PUNCH

--~-

-'--.:......----

-~,--~
.-;

..-

---.":"'--~-.-

6

ALWAC III-E

Memory Unit
The Magnetic Drum and its associated control circuits are contained in this
cabinet. The drum rotates at a speed of
3500 revolutions per minute. Both data
and instructions are stored in serial manner by means of magnetized spots on the
surface of the drum.
Logic Unit
The control logic and certain parts of
the arithmetic registers are located in
this cabinet.
All electronic parts are
mounted on removable plug-in units to
permit maximum ease of maintenance.

through the Flexowriter unit by means of
the typewriter keyboard or punched paper
tape. A maximum input or output rate
of 10 characters per second is possible.
Control Panel
The Control Panel contains control
switches and banks of lites which display
to the operator the contents of the location, instruction, and address registers
and the status of the overflow indicator.
By means of this the operator may control any ofthe various machine functions
and observe the contents of arithmetic
registers or word locations.
Oscilloscope

Power Supply Unit
This cabinet contains the power supply
for all units which comprise the basic
ALWAC III-E. Voltmeters for each of
the various supplies are mounted on the
front ofthe cabinet with rheostat controls
to permit manual adjustment of voltages.

The contents of the A, B, D, and E
Registers, orthe contents ofa word from
one of the Working Channels, or General
Storage Channels may be viewed on the
face of an oscilloscope when the proper
switches are set on the Control Panel.
High-Speed Punched Tape Console

Magnetic Tape Buffer
Control for the magnetic tape transports is contained in this cabinet. A maximum of 16 magnetic tape transports may
be controlled from this unit.

Input at effective speed of 150 characters per second and output at a speed of
50 characters per second is accomplished
through this unit by means of punched
tape.

Magnetic Tape Transport
Magnetic tape is used to extend the
memory capacity of the basic ALWAC
III-Efor rapid-access, intermediate storage of information and to provide a most
efficient means for input and output of
large data files.
Card Converter
Control of punched card reading and
punching equipment and the automatic
conversion of decimal, hexadecimal, and
alphabetic information is accomplished
with the electronic equipment contained
in this .c abinet.
Flexowriter
Input and output are accomplished

Figure 2.

STORAGE

7

Figure 3.
Magnetic Drum and Read- Write Head

STORAGE
The arithmetic registers, the 4 working channels, the 256 channels of General
Storage, and several channels used for
internal timing are stored on the surface
of the magnetic drum in the form of magnetic spots. Information stored on the
drum will remain permanently, or until
erased by recording another spot in the
same location. This memory is extremely
stable and no danger exists from loss of
information when the power is turned off
completely.
Recorded information is arranged on
separate bands on the drum which are
known as channels.
By the geometric
location of the read and write heads around the surface of the drum, storage
line s of various lengths are obtained.

Placing the read-write heads closer to:gethe r provide s "sho rt" line s of rapid
access for use as arithmetic registers.
Information stored in these rapid access
lines is retained only as long as power is
supplied, the information being lost when
the power is turned off. Such lines are
used for the A, B, D, and E Registers and .
for the four Working Storage Channels.
As information is processed in groups
of 33 binary digits at a time, the basic
unit of storage contains 32 bits and an
algebraic sign. Each such group of 32
bits and a sign is known as a word. Each
of the General Storage Channels contain
32 words. Magnetic drums are provided
with a capacity for either 4096 or 8192
words (135168 or 270336 binary digits).
corresponding to 128 or 256 channels.

8.

ALWAC III-E

o.al CT ION

--

OF

~
ROTATION

-.;;;.--

--- .--

---

)

~
~
(J

If~_'" IF==::::::!;I ~
IT-------;JI

WORKING

I

CHANNELS

m

II

:Dr

GJ
0

~ ~O
@) .f:) 0

WORKI.NG CHANNE LS

II

m

~f:} 0
WltlTE

H,ADS

~~·O

READ

HEADS

e~
e~

e···~
B

R~·'ioI

E

REGISTER

r

ST.ER.

TRACK

A

RIGISTER

D

REGISTER

CLOCK

MAGNET Ie.

DRUM

Figure 4.

Dr

STORAGE

9

FLI P-F LOPS

Figure 5.

General Storage Channel

GENERAL STORAGE CHANNELS:
General Storage of the ALWAC III-E
computer consists of 128 (or 256) channels located on the outer surface of the
drum as shown in Figure 5. Only one
read-write head is required for each channel. Matric switching circuits select a
particular channel and connect the read
or write amplifier to a given read-write
head.
After two copy operations, the
mat ric switching circuits return to the
"Read Channel 00" position and remain
in this position until reading or writing
operations are to be performed on another
channel of General Storage. In this reset
position, any of the 32 words of Channel
00 may be copied into the A Register.
As a result of this action, Channel 00 is
treated as a special channel and is frequently referred to as channel "M".
The contents of any word in one of the
four Working Storage channels may be
displayed on the surface of the cathocferay oscilloscope by the proper setting of
switches on the Control Panel.

\/I

F L IP-FLOi=»S

Figure 6.

Working Storage Channel

Since information is being constantly
read and re - written with inte rmediate
storage in flip- flop units, information
is not preserved when power is turned
off. No such loss of information occurs
for Gene ral Storage Channels.
WORDS:
All words in the ALWAC III-E computer consist of 32 binary digits, sign bit
and overflow bit (34 bits). These words
may be stored in 128 distinct word locations in the four Working Storage channels
or in any of the 32 words of the 256 General
Storage Channels.
The 33 bit positions of a word are shown
in Figure 7 where S refers to the sign position, 1 refers to bit position 1, 2 refers
to bit position 2, and so forth.

WORKING STORAGE CHANNELS:
In order to execute' a'series of program instructions it is necessary to copy
the contents of a General Storage channel
into one of the four Working Storage Channels. Each of these four channels comprises 32 word locations which are physically arranged as shown in Figure 6.

IIII

IIJI
123 _-------------------------311JS
Figure 7.

10

ALWAC III-E

When aword contains numerical data,
'and the sign position contains a 1, the
word is positive; if it contains a 0, the
word is negative. Used as a binary number (with algebraic sign), a word is equivalent to a decimal number (with algebraic sign) of slightly more thaT! 9 digits.
As four binary digits are exactly
equal to one hexadecimal digit, a word
consists of 8 hexadecimal digits and an
algebraic sign.

the machine is to perform and the address part will have one of the following meaning s :
1. The number of binary positions
that the information in the A (or A and
B) register(s) is to be shifted to the left
or right.
2. Location in which information is
to be stored by the instruction.

In.structions

3. Location of information which is
to be used by the instruction.

Two, three, or four instructions may
be contained within one word as is shown
in Figure 8.

4. Number of characters to be read
or written by the Flexowrite r or HighSpeed Tape Unit.

OPERATION

ADDRESS

OPERATION

ADDRESS

~~i-·~
II
I 1 I I I I 111
1---····-·S

9---·---·16 '17----·--"24
YYPEA INSTRUCTI ON WOIID

25------· -32 S

5. Specifies the particular type of operation to be performed when using magnetic tape or punched card equipment.

6. The location of the next instruction to be performed.

OPERATION

r

.......

OPERATION

--·-s

9---- ·-~-16 17-- --~- 24 25 ------- -32 S
y Y PE

OPERATION

(

•

"'"

OPERATION

• 1
I~I--~I~II~~I~I~I--~I~II--~I~ht
1-----

u

C

INSTRUCTION WORD

OPERATION

II

II I I I

..

OPERATION

'.

III

..."

OPERATION

'I

III

...

\

I 111

1---- --- -8 ,:91-- ---~ -1"611--- - - - 2425 -- -.- - --32 S
'Y Y PE

D

INSTRUCTION WORD

An instruction wordis divided into four
syllables consisting of eight bits each.
Because of this four-part division it be ..
comes convenient to use two hexadecimal
digits for each syllable of the word. Thus,
each hexadecimal digit consists of four
binary digits; each syllable consists of
two hexadecimal digits; each half-word
consists of two syllables; and each word
consists of two-half-words.
It is emphasized that the ALWAC III-E
operates asa binary machine and that the
use of hexadecimal notation in no way affects this operation. Hexadecimal notation is us·ed by the programmer as a convenient means to record long sequence s
of binary ones and zeros.

Figure 8.
Although the sign bit associated with an
instruction does not affect the execution
of the instruction, it is generally made
positive. From Figure 8 it may be seen
that both the operation code and the address part of an instruction each re'quire
8 bits.
The operation code is used to
de signate the particular ope ration that

The counting system used for most of
the arithmetic problems one encounte r s
in everyday life is the decimal system.
In this system each digit position may
assume 10 discrete' values after which
the entire sequence is repeated, numbers of larger. value being indicated by
increasing the next most significant digit,
Thus, one counts from 0 to 9 and then

STORAGE

from 10 to 19, 20 to 29, and so forth.
As each digit position can assume 10 discrete values, this system is said to be of
"base 10".
The binary system is of "base 2" and,
hence, the digits a and 1 are the only digits used in each position. For the hexadecimal system which is of "base 16" we
use the symbols 0, 1, 2, 3, 4, 5, 6, 7,
8, 9, A, B, C, D, E, and F to provide
16 discrete values.
.
To illustrate the relation between the
three systems (binary, hexadecimal, and
decimal) the following table is presented:
BINARY

HEXADECIMAL

DECIMAL

a

a

0

1

1

1

10
11
100
101
110

2

2

3

3

4

4

5

5

6

6

III

7

7

1000
1001
1010
1011
1100
1101
1110
1111
10000
10001
10010

8

8

9

9

A
B
C
D
E

10
11

12
13
14
15
16
17
18

F
10
11
12

An instruction word as it appears in the
machine (in binary form) would resemble
the following example:

11

Numbers
Fixed Point.
Fixed - point numbers
are represented with a magnitude of 32
bits and a sign bit.
The binary point is
as surned to he located to the right of position 32. Howeve r, the binary point may
be located elsewhere
MAGNITUDE
. ~

t

III

au

.~

,,,I

1 2-------------------------------3132 S
Figure 9.

by proper scale -factoring. For example,
the binary number 0000 0000 0000 .••••
0000 0100 may be variously used as the
numbe r 4 at a binary point to the right
of position 32 (B=32) or as the number
1 at B=30.
Floating Point. No machine ope rations
are provided to handle floating - point numbers automatically. However, several
schemes are available to the programmer
who may wish to represent numbers in
this manner. One such scheme involves
the "packing" of several quantities into a
single word. These quantities are known
as the characteristic, fraction, and sign
which comprise each floating-point num~
her.
CHARACTER ISTIC

fRACTION
...,

)11 =nIl
2 --------·8 910

SI8N

JJ

1,

-------'!'"-----... -----------3132 $
Figure 10.

0110 0001010100010001000100101000 +
The equivalent in hexadecimal form would
be as follows:
615

1

1

1

28+

which, as a Type A instruction word,
might appear on a coding sheet as shown
below:
ADD 51, TRA 28

+

A floating-point decimal number N is
written as a proper fraction F (with algebraic sign) times some integral power of
n
the base 10, or as F x 10 • The power of
ten may be chosen such that the decimal
point is located to the left of the most significant digit of F. When the power of
ten is chosen in this manner, the number is said to be a normalized floatingpoint number; otherwise, an unnormalized floating-point number. Examples:

12

ALWAC III-E

+

• 124 = +
.012

+

5.120

=
=

• 124 x

• 120 x
+ .512 x

0

10
10 -1
10+ 1

A floating-point binary number N is
written in a similar manner with a proper fraction F (with algebraic sign) times
some integral power of the base 2, or as
n
F x 2. Examples:

+

. ioo =
.010

+

1. 100
10.100

+ • 100 x

==+
=

· lOO x
• 110 x
.101 x

0

2
2- 1
2+1
2+2

In the AL WAC llI- E, floating - point
binary numbers are stored as shown in
Figure 10.

1. Bit positions 9 - 32 contain the magnitude of the fraction F with the binary
point located to the left of position 9. A
normalized floating-binary number will
have a 1 in position 9. Thus, the range
for values of F is"s~en_to be:

2. The sign of the fraction F is placed
in the S position of the word.
3. Since signed exponents will occur
and since the S position contains the algebraic sign of the fraction, the chara:cteristic, C, of the number is stored in
positions 1 - 8 instead of the exponent.
This characteris,tic is formed by adding
+ 128 to the exponent. Thus, the range
of the exponent is:
- l28.(n ~

LOGIC UNIT
Arithmetic and control functions are
performed by electronic components located in the Logic Unit. Information passe s between the Memory Unit and the Logic
Unit for processing. Each machine instruction may be d~vided into three micro-programming operations which are
known as interpretation, search and execution times. During the interpretation
time, the machine locates the next instruction to be executed and fills the
Operation andAddress registers. The Operation register is then examined to determine whether or not the given instruc- .
tion requires reference to the contents of
another word in memory and whether or
not the Address register is to be modified. During search time, if required,
the machine obtains the content s of the
desired word from memory. (Since some
operations do not require such refer- ,
ence, these operations do not have search
times). During execution time, the given
operation is performed.
The time required to complete each of these three
micro-programming operations is an integral multiple of one word-time (0. 523
ms. ) and is variable depending upon the
given instruction, wh~the r or not a search
is to be made, and the time required to
locate the given word in memory.
Arithmetic Elements
The A Register. The A Register is
an accumulator register consisting of 32
bits, an overflow position, and a sign.
See Figure. 11.

+ 127

whereas the range of the characteristic

is:

liP

0111
o ~

Z

C "

1 2 --.... ------------------------ 3132

255

An exponent of + 12 would use a characteristic of + 12 + 128 = 140 while an exponent of - 12 would use a characteristic
of - 12 + 128 = 116.

Figure 11.

13

ARITHMETIC ELEMENTS

Almost all arithmetic operations make
use of the A Register. With some instructions (for example, addition, subtraction)
the content's of the A. Register may overflow from position 1. When an overflow
occurs, with the exception of shifting instructions, the OVERFLOW INDICATOR
lite on the operator's Contro-l Panel is
turned on and will remain Qn until turned
off by manually depressing the ALARM
SWITCH No. 2 to the RESTORE position
or by executing one of the instructions
COM, COV, or ,TOV. It should be noted
that an overflow from bit position 1 does
not always result in causing a 1 to be
placed in the Z position of the A Register
(for example, ADB' and SBB) and,that th~
status of the OVERFLOW INDICATOR
lite is not affected by any subsequent operation which causes a change in the Z
position. It must be borne in mind that
the OVERFLOW INDICATOR lite ma'y be
turned on by both arithmetic and control
instructions and that any attempt to execute an"arithmetic operation when the lite
is on will result in the sounding of the
ALARM No.2 buzzer which 'will prevent
the completion of the operation until the
OVERFLOW INDICATOR lite is turned
off.
The B Register. The B Register consists of 32 hits and a sign and has three
major uses:
1. The multiplier must' be placed in
the B Register prior to execution of a
multiplication instruction.
2. After the execution of a division.
instruction, the quotient appears in the
B Register (the remainde r is located in
the A Register).
3. After executing a multiplication
instruction, the B Register contains the
les s significant part of the product and,
in this respect, may be considered as an
extension of the A Register.

P

1 2 _______________________________ ·313:2.
III
1\

Figure 12.

The D Register. The D Register consists of 32 hits and a sign and has the
following major uses:

1. The D Register is used to contain
the multiplicand when performing multiplication operations.
2. The mask word must be placed in
the D Register before the execution of the
EXD ope ration.
3. The D Register is used to contain
the divisor during division operations.
4. The D Register is used to count
the number of shifts which occur when
using the seT operation.

Figure 13.
Only the full-word contents of the D
Register may be altered by any instrp.ction and hence this register performs no
accumulating or shifting fun<:tions.
The E Register.
The E Register is
used for the indexing operations and to
provide automatic addre s s modification.
This register consists of only 16 bits
(without sign) and is associated with bits
1-16 of the' A Register and of words In
memory.
NOT AVAILABLE
TO PROGRAMMER?

S

III
II~
1 2 ----·-----------·151617------------·31-32
Figure 14.

Although a transfer of information between the A and E Registers occurs only
with the left half-word of the A Register,
both the left and right address syllables
of instructions stored in the Working Storage channels maybe automatically modified according to the contents of the E
Register.

14

ALWAC III-E

Although the storage line on the drum
which is used to store the E Register contains 32 bits and a sign, the right half of
this line is not available for use by the
programmer and will, therefore, rarely
concern him.
All arithmetic registers are stored on
the drum as one-word recirculating lines
as shown in Figure 15.

WRITE

'---v----:I
FLI P-FLOPS

Figure 15.
Since information is being constantly
read and re-written and requires intermediate stoTage in flip - flop units, information is not preserved when power
is turned off.
By the proper setting ~f switches on
the Control Panel, the contents of any
arithmetic register may be displayed on
the surface of the cathode-ray oscilloscope.
When two numbe r s having the same
magnitude, but opposite signs are added
algebraically in theA (or A and B) register(s), the result maybe either +0 or -0.
The signof the zero result may be determined from the following tabulation:
ADD and SCS - - same as sign of C (W)
SUB and ACS - - opposite to sign of
C(W)
ADB and SBB -- same as sign of C(B)
before execution of instruction

POWER SUPPLY UNIT
Figure 16· shows the Power Supply
unit which includes indicating lites, voltmeters, voltage controls and operating
switches.
Master Circuit Breaker. All power
to the AL WAC Ill-E is controlled by this
switch. When turning on the computer,
this switch mustbe turned on first; when
turning off the computer, this switch
should be turned off last after all other
activity has ceased in the computer. See
Figure 16.
Record Switch.
The Record switch
shouldbe placed in the OFF position until
the computer has been allowed to "warmup" and voltages have been adjusted to
their power values. ·When turning off the
computer, this switch should be. placed in
the OFF position to prevent accidental
destruction of recorded information due
to power transients within the computer.
This switch must be in the ON position
when the computer is operating to permit information to be written in the general storage channels of the drum.
Compute-Off-Test Switch. This switch
ope rate s In COrijunction with the Powe r
switch described below.Inpassing through
the OFF position, this switch causes the
power to be turned off and it becomes necessary to depress the Power ON switch.
Since timing circuits are activated from
these two switches a delay of one minute
will occur before power is again supplied
to the computer.
Power. Switch. After the ComputeOff-Test switch has been set in the COMPUTE or TEST position, the Power ON
switch- may be depressed. If the thermostats in each cahinet are below dropout temperature, the Power On neon lite
will light immediately, and blo~ers and
filaments will be turned on. After a one
minute delay all voltages other than filament voltages will be turned on. Power
will be supplierl: to the computer if the
Compute-Off-Test switch is in the COM-

POWER SUPPLY UNIT

15

Figure 16.
PUTE position, but will only be supplied
to the cable connection for the tester unit
when this switch is in the TEST position.
The Power switch is also located on the
operator I s Control Panel and is operated
in a similar manner.
Operating Procedure.
To prepare
the computer for operation the following steps should be observed:
1. The Record switch should be turned
to the OFF position.
2. The Master Circuit Breaker should
be turned to the ON position. The line
voltage meter will then rise to 120 volts
and return to zero after a period of one
minute.
3.
The Compute - Off - Test switch
should then be turned to the COMPUTE
position.

4. The Power ON switch should be
depressed.
5.
The voltage regulators beneath
each voltmeter should be adjusted to
cause the prope r reading to be dis played.
The proper voltage readings are given
beneath each meter.
6. As soon as voltages are indicated
on the meters and are adjusted to the values, the Record switch should be turned
to the ON position.
7. The computer shouldnowbe operative. At this time a standard test program is usually executed to insure correct operation before useful computing is
begun. This test may be some standard
production problem which provide s an
adequate check of machine operations.

16

ALWAC llI-E

When turning off the computer the
steps should be observed:

follo~ing

1. The RecQrd switch should be turn-·
ed to the OFF position.

z. The Power OFF switch should be
depressed.
3. After the line voltage meter has
dropped to zero, the Master Circuit
Breaker tnay be turned to the OFF position.
CONTROL PANEL
Figure 17 shows the operator's Control Panel·which includes'indlcating lites
and operating switches. Under normal
operating conditions this console unit is
used for control of -all functions of the
computer.
Power Switch. The operation of this
switch is identical with the Power switch
locatedonthe Power Supply unit which is
described on page 14.
Normal -Test -Clear Switch.
When
this·· .Wltch rs1ii tne NoRMAL position,
the computer is under the control of the
FlexOVlriter and will not operate unless
the Flexowriter is turned ON and the
Flexowriter-Computer switch. is turned
to the COM.PUTER position.
In the TEST position, the computer
will execute instructions whether or not
the Flexowriter is· turned ON.
Upon release from the CLEAR position,the contents of General Storage channel 01 replaces the contents of Working
Storage channel I and control is transferred to word 00. .A similar switch is
located on the· Flexowriter. A program
known as the Start Routine is located in
General Storage channel Oland is u,Sed
to cause input and output of programs and
to transfer control.to a given location in
one of the Four Working Storage channels.
Normal .. Hold - Select Switch.

When

this switch is in the NORMAL position,
the computer will execute instructions
in their normal sequence.
If in the HOLD position, the computer.
inhibits the normal sequence and thus this
position maybe used to cause the computer to repeat a giveninstructionanynumber of times.
If in the SELECT position, the General
Storage selection relays will select the
channel which is indicated by the. neon
display lites of the Address register. A
given word in this channel may then be
displayed on the cathode-ray oscilloscope
by setting the Instruction Address lites
to the address' of the desired word and
setting the A B DEW M switch to the M
position.

Normal - Stop - One Step Switch. . In
the NORMAL position, tliecomputer will
execute instructions in their normal sequence at high~speed.
In the STOP position, all com.putation
is suspended. Byalternatelymoving this
switch from the ONE STEP to the STOP
position, the computer can be made to
execute single instructions in their normal sequence.

JuhP Switches. Two switches provide t e operator with manual control
over the program while it is being executed. At various points in the program,
the status of these switches maybe tested by the program, which will cause the
computer to execute one of two branches
of the program.
Overflow Indicator Lite. Arithmetic
operations and certain control operations
may cause this lite to be turned on and
off. If the lite is ON, any attempt to execute arithmetic operations will result in
the sounding of ALARM No. 2 and will
inhibit the execution of the operation until corrected manually by depressing the
Overflow OFF button or by turning Alarm
Switch No. 2 to the RESTORE position and
then to the NORMAL position.

CONTROL PANEL

17

Figure 17.
Instruction Address Register.
This
register indicates the memory location
of the instruction indicated in the Operation and Address registers, except for
instructions calling for input of information in which case this register shows the
location from which the next instruction
to be executed will be obtained.
Operation Register. This register indicate s the instruction which is about to
be executed.
Address Register. This register contains the effective address associated
with the instruction contained in the Operation Register.
The contents of the
addre s s part of any instruction before and
after modification are called literal and
effective addresses respectively. 1£ the
least significant bit of the Operation Register is a 0, the contents of the Address

Register will be modified by the contents
of the E Register before the instruction
is performed.
Alarm Switch No. 1. An internal check
is made to compare, with the original,
the re sult of copying information between
the General Storage and Working Storage
channels. If this check fails, either due
to the Record switch on the Power Supply
unit being in the OFF position, or by the
failure to copy information correctly,
the status of Alarm Switch No. 1 is tested. If this switch is in the SILENCE position, the machine will continue to atte.mpt the copying operation until the internal check indicates a correct copy has
been made, after which the machine will
execute the next instruction in normal sequence at high- speed. The alarm buzzer
will not sound.

18

If in the NORMAL position, the buzzer
. will sound and the machine will stop until
this' switch is placed in the SILENCE or
RESTORE position.
If in the RESTORE position, the buzzer will not sound, the internal check is
over-ruled and the machine continues at
high speed permitting whatever information was copied to remain. ~s erroneous information could result under this
condition,. it is recommended that this
switch not be permitted to remain in the
RESTORE position.
Since General Storage channel No. 01
is used to contain the Start Routine and
since the contents of this channel are to
be preservedfornormal machine use, it
is desirable to prevent accidental recording of information in this channel. Hence,
if an attempt is made to record in General Storage channel No. 01, the status
of Alarm Switch No. 1 is te sted and the
machine will then operate as described
above. The operator will seldom have
occasion to place this switch in the RESTORE position. A special program to
fill General Storage channel No. 01 is
provided and is known as the Load Start
Routine. This program require s Alarm
Switch No. 1 to be placed in the RESTORE
position in orderto copy the Start Routine
into 'General Storage channel No. 01.
Alarm Switch No.2. If in the NORMAL position, when arithmetic operations are attempted while the Ove rflow
Indicator Lite is ON, the buzzer will sound
and the exe cut ion of the operation will
be inhibited until corrected manually by
turning Alarm Switch No. 2 to the RESTORE position and then to ,the NORMAL
position or by depressing the Overflow
.' OFF button. This action will cause the
Overflow Indicator Lite and the buzzer to
be turned OFF.
In the SILENCE po sition, the machine
will pe·rform as for the NORMAL position
except that the buzze r will not sound.

If this switch is allowed to remain in
the RESTORE position, the Overflow Indicator Lite and the buzzer will be turned
OFF once with the machine returning to
high-speed operation. However, if an~
other attempt is made to execute an arithmetic operation when the Overflow Indicator Lite is ON, the machine will again
stop and the buzzer will sound.
This
switch may then be returned to the NORMAL position and the sequence repeated.
ABDEWM Switch. This rotary switch
controls. the selection of information to
be displayed on the cathode-ray oscilloscope. The A, B, D, and E postiions
select the A, B, D, and E registers respectively.
To inspect the contents of a word in
one of the four Working Storage channels,
this switch is placed in the W position,
the Normal - Hold - Select switch to the
HOLD position, the Normal- Stop - One
Step switch to the STOP position, and the
location of the desired full-word seton
the Address Register in neon lites. The
contents of the desire.d word will then be
displayed on the cathode-ray oscilloscope.
To inspect the contents of a word in
one of the General Storage channels, this
switch is placed in the M position, the
Normal- Hold - Select switch to the SELECT position, the Normal-Stop-One Step
switch to the STOP position, the desired
channel set on the Address Register neon
lites, and the desired full-word set on the
Instruction Address neon lites. The contents of the desired word will then be displayed on the cathode-ray oscilloscope.
OSCILLOSCOPE
Figure 18 shows a cathode-rayoscillos cope on which the content s of a full-word
maybe displayed by setting the appropri-.
ate switches on the operator's Control
Panel. Note that the scope has been set
by AL WAC Corporation to sweep from
right to left. Sweep should be adjusted
to start at the far right of the scope.

OSCILLOSCO PE

19

INSTRUCTIONS

Figure 18.
The display presents the bits compnsmg a word as a series of high and
low "pips" on the face of the tube. The
high pips represent 1 bits and the low
pips represent a bits. The word is divided into four syllables by changing the
horizontal level of the four syllables as
is shown in Figure 19.
Reading the high and low pips from
Figure 19 yields the following binary number (a plus sign is represented by a 1):
0101 10010101 10010101 10010101 1001 +
which would be written as the hexadecimal number:
59595959+

In this section, the headin g for ea c h
instruction gives the title, th e number of
milliseconds required for the execution
of the instruction, the alphabetic code
for the instruction, and the hexadecimal
code for the instruction. The time required for execution for certain operations is variable and attention is directed
to the section entitled "Instruction Timing". If the instruction requir.es an address part, the letter W is used to indicate this fact. W may be the number of
binary positions to be shifted, the locationofawordinmemory, a General Storage channel address, or a special code
for an input-output operation.
The following definitions apply to
formation contained in this section:

In-

1. C(W) indicates the contents oflocation W, where W refers to some location
in Working Storage. C(A) indicates the
contents ofthe A Register, C(B) indicates
the contents of the B Register, and so
forth. Individual bit positions of a word
(or register) are denoted by subscripts.
Thus, C(A)1_16,S is read "the contents of
positions 1, 2, 3, . • • . 16, S of the A
Register". When subscripts are not present, the entire word is indicated.
2. When a register is cleared, the
contents of the register are replaced by
a I s and the sign bit set positive (a 1 is
placed in this position).
3. The negative of a number is the
same number with its sign reversed.
4. The magnitude of a number is the
same number with its sign made positive
(a 1 in position S represents a positive
sign) .
5. When the word "store" is used in
the title of an instruction, a word in Working Storage is always one of the agents.
When the word "load" is used in the title
of an instruction, one of the arithmetic
registers is always one of the agents.

zo

ALWAC nl-E

With both Itstore II and "load" instructions., the agent from which the information is obtained is unaltered.
6.

In the three -letter operation code:

a. The first letter of all load instructions is L.
b. The first letter of all transfer
instructions is T.
c. The first letter of all exchange
instructions is X.
d. The first letter of all add, subtract, multiply, and divide operations is
respectively, A, S, M, and D. Other commands, however, may start with these
letters.

Add to B
1. 0 ADB W BD
The status of the Overflow Indicator
is tested: If ON, this instruction is not
executed and the machine sounds the alarm 2 buzzer; if OFF, this operation
treats the C(A)1_32 and the C(B)1_32, S

ARITHMETIC OPERATIONS

as a 64-bit augend (with the sign of B),
replace s the content s of the Z pas ition
with a 0, adds algebraically the C (W) to
form a 65 - bit sum, and replaces the
C(A)Z, 1-32 and the C(B)1_32, S with the
result. The sign of A is replaced by the
sign .of B. The C(W) are unchanged. The
Overflow Indicator is 'not turned on if a
carry from position 1 in the A Register
occurs but said carry does enter the Z
position.

Add

Subtract

r.o ADD

W 61

1. 0 SUB W 67

The status of the Overflow Indicator
is tested: If ON, this instruction is not
executed and the machine sounds the alarm 2 buzzer; if OFF, this operation replaces the contents of the Z position with
a 0, adds algebraically theC(W) to the
C(A), and replaces the C(A) with this sum.
The C(W) are unchanged. Overflow indication is possible and a carry from position.l in the A Register will be placed
in the Z position.

The status of the Overflow Indicator
is tested: If ON, this instruction is not
executed and the machine sounds the alarm 2 buzzer; if OFF, this operation replaces the contents of the Z position with
a 0, subtracts algebraically the C(W)
from the C(A), and replaces the C(A)
with this difference. The C(W) are unchanged. Overflow indication is possible and a carry from position 1 in the A
Register will be placed in the Z position.

Add and Change Sign

Subtract and Change Sign

1.0 ACS W 63

1. 0 SCS W 65

The status of the Overflow Indicator
is tested: If ON, this instruction is not
executed and the machine sounds the alarm 2 buzzer; if OFF, this operation replaces the contents of the Z position with
a 0, adds algebraically the C(W) to the
C(A), reverses the sign of this sum, and
replace s the C (A) with the re sult. The
.C (W) are unchanged. Ove rflow indication
is possible and a carry from position 1
in the A Register will be placed in the Z
position.

The status of the Overflow Indicator
is tested: If ON, this instruction is not
executed ~nd the machine sounds the alarm 2 buzzer; if OFF, the operation replaces the contents of the Z position with
a 0, subtracts algebraically the C(W)
from the C(A), reverses the sign of the
difference, and replaces C(A) with the result. Overflow indication is possible and
a carry from position 1 in the A Register
will be placed in the Z position.

~NSTRUCTIONS

Subtract fromB

1. " .SSBW ·BJ'
The status of the Overflow Indicator
is tested: If ON., this instruction'isnot
executed and the machine sounds the a. larm2 buzzer; if OFF, the operation
treats the C(A)1~32andthe C(~)1_32, S
as ~ 64-bit mip.uend (with the sign of B),
replaces the contents of the Z position
witha 0, subtracts algebraically the C(W)
to forma 65 ... bit remainder, and replaces
the C(A)'Z, 1 .. 32 and theC(B) 1-32~ S with
the result. The sIgn of A is replaced by
the sign of B. TheC(W) are unchanged.
The Overflow Indicator is not turned on
iJ' a carry from position 1 in the A Register occurs but said carr·y does enter
the Z position.
MultiPil
I'. 0 PW W E7
The status of the Overflow Indicator
is tested: If ON, this inst~ction is not
executed and the machine Bounds the alarm 2 buzzer; if OFF, the C(D) are replaced with the C(W) and the C(A) are replaced ~ith zeros. Then, the C(B) are
multiplied by the C(D) and the 64-bit product placed in the' A and B Registers 'with
the most significant part in the A Registel". The, algebraic sign of the product
is placed in both the A and B Registers.
Overflow indication is not possible on this
instruction and the Zposition will contain
a zero.

MultiP~~ D
17. 0
P
E5
The status of the Overflow Indicator
is tested: If ON, this instruction is ;not
exe cuted and the machine sounds the alarm 2 buzzer; if OFF, the C(A) are replaced with zeros, the C(B) are multiplied by the C(D) and the 64-bit product
placed in the A 'and B Registers with the
most significant part in the A Register.
The algebraic sign of the product is placed
in both th.e A and B Registers. Overflow
indication is not possible on this instruc-

21

tionand the Z position will contain a zero.
The address part of this instruction is not
examined; thus, this instruction may be
doubled if de sired.
MultiP~ and Add

17. o

PAW E3

The status of the Ove rflow Indicator
is tested: If ON, this instruction is.not
executed and the machine sounds the alarm 2 buzzer; if OFF, the C(D) are replaced with the C(W), the C(B)' are multiplied by the C(D) ~ the sign of A is replaced by the sign of the product, and the
C(A) added algebraically to the least significant half of the 64-bit product. The
result replaces the C(A) and C(B} with the
most· significant part in the A Register.
The algeb raic sign of the re suIt is placed
in both the A and B Registers. Overflow
indication is not possible on this instruction and the Z position will contain a zero .•
MultiPifri>y D and Add

17. o X E1

The status of the Overflow Indicator
is tested: If ON, this instruction is not
executed and the machine sounds the alarm 2 buzzer; if OFF, the C(B) are mul- .
tiplied by the C(D), the sign of A is 'replaced by the sign of the product, and the
C(A) added algebraically to the least significant half of the 64-bit product. The
result replaces the C(A) and the C(B) with
the most significant part in the A Register.
The algebraic sign 'of the result is placed
in both the A and B .Registers. Overflow
indication is not possible on this' instruction and the Z position will contain a zero.
The address part of this instruction is '
not examined; thus, this instruction may
be doubled if desired.
RQund

1.0 RND 22
The status of the Overflow Indicator
is tested: If ON, this instruction is not
executed and the machine sounds the alarm buzzer 2; if OFF, position 1 of the

22

ALWAC III-E

B Register is tested for a. 1. If it contains aI, the magnitude of the C(A) is
increased by 1 in position 32. If position
1 of the BRegiste r contains a zero, the
C(A) are not altered. Overflow indication
is possible and a carry from position 1
of the A Register enters the Z position.
The contents of the B Register are not
altered.
Divide
17.0 DVW W EF
The status of the Ove rflow Indicator
is tested: If ON, this instruction is not
executed and the machine sounds the alarm 2 buzzer; if OFF, the C-(A) are replaced with zeros, the C(D) are replaced
with the C(W), and the contents of the A
and B Registers are treated as a 64-bit
dividend(Z position. excluded) with the
sign of the B Register. The new C(D) are
examined for a zero divisor. If zero,
the Overflow Indicator is turned ON and
the division is not performed. If nonzero, the contents of the Z position are
replaced with a 0, the dividend in the A
and B Registers is divided algebraically
by the C(D), the quotient (with its algebraic sign) placed in the B Register, and
the remainder with the sign of the dividend is 'placed in the A Register. Overflow indication is possible only if the D
Register contains a zero divisor. whether
or not the division is perform.ed, the divisor is left in the D Register.
Divide by D
17. 0 DVD ED
The status of the Overflow Indicator
is tested: If ON, this instruction is not
executed and the machine sounds the alarm2 buzzer; if OFF, the C(A) are replaced with zeros, and the contents of the
AandB Registers are treated as a 64-bit
. dividend (Z position excluded) with the
sign of the B Register. The C{D) are exam.ined for a zero divisor. If zero, the
Overflow Indicator is turned ON and the
division is not performed. If non-zero,
the contents of the Z position are re-

placed with a 0, the dividend in the A and
B Registers is divided algebraically by

the C(D), the quotient (with its algebraic
sign) placed in the B Register, and the
remainder with the sign of the dividend
placed in the A Register. Overflow indication is possible only if the D Register contains a zero divisor. Whether or
not the division is performed, the divisor
is left in the D Register. The address
part of this instruction is not examined;
thus, this instruction may be doubled if
desired.
Di vide Doub le Length
17.0 nDW W EB
The status of the Overflow Indicator is
tested: If ON, this instruction is not executed and the machine sounds the alarm 2
buzzer; if OFF, the C(D) are replaced with
the C(W), and the contents of the A and B
Registers are treated as a 64-bit dividend
(Z position excluded) with the sign of the
B Register.
If I C(A)l_ 321 ~ IC(D) or

I

if the D Register contains a zero divisor,
the Overflow Indicator is turned ON and
the division is not performed.
If none of the above error conditions
occur, the content of the Z position is replaced with a 0 and the division is perform.ed. The quotient (with its algebraic sign) is placed in the B Register and
the remainder with the sign of the dividend is placed in the A Register. Overflow indication is possible under the conditions described above. Whether or not
the divisioIl; is performed, the divisor is
left in the D Register.

Divide Double Length by D
17. 0 DDD -- E9
The status of the Overflow Indicator is
tested: If ON, this instruction is not executed and the machine sounds the alarm 2
buzzer; if OFF, the contents of the A and
B Registers are treated as a 64-bit dividend (Z position excluded) with the sign of
the B Register. If IC(A) 1-321:~ IC(D) 1-321

23

INSTRUCTIONS

or~

if the D Register contains a zero divisor, the Overflow Indicator is turned ON
and the division is not performed.
If none of the above error conditions
occur, the content of the Z position is replaced with a 0, and the division is performed. The quotient (with its algebraic
sign) is placed in the B Register and the
remainde r with the, sign of the dividend is
placed in the A Register. Overflowindication is 'possible under the conditions
described above. Whether or not the division is performed, the divisor is left in
the D Register. The address part of this
instruction is not examined; thus, this
instruction may be doubled if desired.

The C (D) remain unchanged.
The address part of this instruction is not examined, thus, this instruction may be
doubled if desired.
Load A from E
1. 0 LAE - - 34
The C(A) 1-16 are replaced with the
C(E) 1-16.

The C(A) 17 _ 32, S are left un-

changed, and the Z position is filled with
a zero. The address part of this instruction is not examined; thus, this instruction may be doubled if desired.
Exchange A and B

1. 0 XAB -- 30
Load A from W

1. 0 LAW W 79
The C(W) replace the C(A) and a zero
is placed in the Z position. The C(W)
remain unchanged.

The C(A) and the C(B) are exchanged
and a zero is placed in the Z position.
The address part of this instruction is
not examined; thus, this instruction may
be doubled if desired.

Load A from M

ExchXll A and D

9.0 LAM M BS
The C'(M)mod 32 replaces the C(A) and
a zero is placed in the Z position. The
C(M) remain unchanged. At least 34 milliseconds (2 drum revolutions) must be
allowed between this instruction and any
preceding Copy instruction except one
which copie s information into channel M
(Channel No. 00).
-Load A from B

1. 0

D

--

3A

The C(A) and the C(D) are exchanged
and a ze ro is placed in the Z position.
,The address part of this instruction is
not examined; thus, this instruction may
be doubled if desired.
ExchjGle A and E

1. 0

E

--

36

The C(A)1_16 and the C(E) 1-16 are

1. 0 LAB -- 32

exchanged.

The C(A) are, replaced with the C(B)
and a zero is placed in the Z position.
The C(B) remain unchanged.
The addre s s part of this instruction is not examined, thus, this instruction may be
doubled if de·sired.

changed, the Z position is filled with a
zero, and the sign of the A Register made
positive. The address part of this instruction is not examined; thus, this instruction may be doubled if desired.

Load A from D

1. 0 LAD -- 38
The C(A). are r'eplaced with the C(D)
and a zero is placed in the Z position.

The C(A) 17 -32 are left un-

Exchange A and W

1. 0 XAW

w 69

Th'e C (A) and C (W) are exchanged and
a zero is placed in the Z position.

24

ALWAC Ill-E

Store A

Load B
1. 0 LBW 41

1.0 SAW W 49
The G(W) 1- 32, S are replaced with the
C(A)I_32, S. The C(A) remain unchanged.

The G(B) are replaced with the C(W).
The C(W) are not affected.
Store B

1.0 SBW C5

Place Address in A

1.0 pAA W

6D

IfW~ (7F)16' the C(A)9_l6are re-

placed with the C(W)9_l6; if W

'Q

(80) 16'

the C (A) 25 _ 32 are replaced with the
C(W)25_32.

The remaining bits of C(W)

and G(A) including the sign -and Z positions are not affected.

The C(W) are replaced with the C(B).
The C(B) are not affected.
Load D
1. 0 LDW W 5B
The C(D) are replaced with the C(W).
The C(W) are not affected.
Store D

Place Half- Word in A

1.0 PHA W bF
If W ~ (7F) 16' the C(A) 1-16 are replaced with the C(W)1_16; ifW) (80)16'
the C (A ) 1 7 _ 32 are replaced with the
C(W)17_32.

1.0 SDW W C7

The C (W) are replaced by the C (D).
The C(D) are not affected.
Load E
1.0 LEW W 57

The C(W) and the remain-

The C (E) 1- 16 are replaced with the

ing bits of C(A) including the sign and Z
positions are not affected.

C(W)I_16.

Store Address from A

Store E

1.0 SAA W 4D
If

w.(

The C(W) are not affected.

1. 0 SEW W C3
The C(W)I_16 are replaced with the

(7F) 16' the C(W)9_16 are re-

placed with the C(A)9_l6; if W ~ (80) 16'

G(E) 1,-16.

the C ( W) 25 _ 32 are replaced with the

and the C(E) are not affected.

C(A)25_32.

The C(A) including the sign

and Z positions and the remainlng bits
of C(W) are not changed.

The remaining bits of C(W)

Clear A
1. 0 CLA 28
The C(A)I_32 and the Z position are

Store Half- Word from A
1.0 SHA W 4F
If W ~ (7F) 16' the C(W) 1-16 are replaced with the C(A) 1-16; if W ~ (80) 16'
the C (W) 1 7 _ 32 are replaced with the
C(A) 17 -32.

The C(A) including the sign

and Z positions and the remaining bits
of Ware not affected.

replaced with zeros and the sign of the
A Register made positive. The address
part of this instruction is not examined;
thus, this instruction may be doubled if
desired.
Chan~e

1.

0

Sign
HS -- 2E

If the sign bit of the A Register is positive, it is made negative, and vice versa.

25

INSTRUCTIONS

The addre s s part of this instruction is
not examined; thus, this instruction may
be doubled if de sired.
Set Si~n Plus

1. 0 S p - - 2C

The sign bit of the A Register is made
positive. The address part of this instruction is not examined; thus, this instruction may be doubled if desired.
Complement A

1.0 CpL -- 3E
All zeros are replaced by ones and
vice versa in the C(A) 1- 32, S. The Z position is filled with a ze ro. The addre s s
of this instruction is not examined;
thus, this instruction may be doubled if
desired.
p~rt

LOGICAL AND CONTROL OPERATIONS
Extract
1. 0 EXT W 75
Each bit of the C(A) 1-32, S is compared
with the corresponding bit of C(W) 1- 32,S.
When both bits are ones, the corresponding bit in the A Register is left unaltered
(remains a one)~ However, when either
of the bits compared is zero, the correaponding bit in the A Register is replaced
with a zero. The Z position is filled with·
a zero. The C(W) are not affected.
Extract with D Mask

1. 0 EXD W 71
Each bit of the C(A)I_32, S is compared
with the correspondingbit of C(D) 1-32, S.
When the bit in the D Register is a one,
the corresponding bit in the A Register
is replaced by the bit in W; when the bit
in the D Register is a zero, the correspondingbit in the A Register is not changed. The Z position is filled with a zero.
The C(D) and C(W) are not affected.

Change Overflow Indicator

1. OCOV -- 02
If the Overflow Indicator is ON, turn
it OFF and vice versa. The address part
of this instruction is not examined; thus,
this instruction maybe doubled if desired.
Compare Magnitude

1. 0 COM -- 51
The status of the Overflow Indicator is
tested; if ON, this instruction causes the
machine to stop; if OFF, the C{A) and
C(W) are compared:
If (C(A) 1-321 IC(W) 1- 321, this instruction causes the Overflow Indicator to be
turned ON. If C(A) 1- 321 ~IC(W) 1- 321 '
the Overflow Indicator remains OFF.

<

I

No Operation

1. 0 NOP -- 00
The machine takes the next instruction in sequence •. (Although no operation is performed, the Address Register will contain the effective address;
i. e., after address modificatIon by the
E Register has been performed.)
Halt and Transfer

1. 0 HTR

W

IB

If the START-NORMAL switch on the
Control Panel is in the NORMAL position,
the machine will stop until this switch is
thrown to the START position, after which
the machine will obtain the next instruction from location Wand proceed from
there. If this switch is in the START position, the machine will not stop but, instead, will obtain the next instruction
from location Wand proceed from there.
Transfer

1.0 TRA W 11
The machine takes the next instruction
from location Wandproceeds from there.

26

ALWAC III-E

Transfer on Overflow

1.0 foV

W

IF

If the Overflow Indicator is ON as the
result of a previous operation, the indicator is turned OFF and the rna-chine take s
the next inst.ruction from location Wand
proceeds from there. If the indicator is
OFF, the machine takes the next instruction in- sequence.

Transfer on Switch One

1. 0 TSA

W

13

The status of jump switch one is examined. If in the JUMP position, the machine obtains the next instruction from location Wand proceeds from there; if in
the NORMAL position, the machine takes
the next instruction in sequence.
Transfer on Switch Two

Transfer on Non-Zero

1. 0 TNZ

W

1. O. TSB W 15

19

If the C(A) 1- 32 are non- zero, the machine takes the next instruction from location Wand proceeds from there. If
the CJA)1_32 are zero, the machine takes
the next instruction in sequence. Note
that the Z and sign positions are not examined.
Transfer on Less than Zero

1.0 TLZ W ID
1£ the C (A) 1- 32., S· are non - zero and

negative, the machine takes the next instruction from location Wand proceeds
from there·. If the C(A) 1-~2, S are zero
or positive, the machine takes the next
instruction in sequence. Note the Z position is not examined.
Transfer on Index

1. 0 TIX W 17
The C(E) are decreased by 1 in the
least significant position and the result
placed in the E Register, after which the
contents of this register are tested for
the presence of a zero result. If nonzerQ, the machine takes its next instruction from location Wand proceeds from
there; if zero, the machine takes the next
instructi()n in the normal sequence. The
contents of the other arithmetic registers
are not affected. Therefore, the E Register may be used as an index register.

The status of jump switch two is examined. If in the JUMP position, the machine obtains the next instruction from location Wand proceeds from there; if in
the NORMAL position, the machine takes
the next instruction in sequence.
Shifting Instructions
Shift instructions are used to move the
contents of the A (or A and B) Register(s)
to the left or rightof their original positions. The address syllable is 'Used to indicate the number of positions to be shifted. When a shift i
ruction is executed,
the positions left
cant in the registers
are automatically ilIed with zeros. When
a shift instruction is interpreted, the extent of the shift is determined from the
six least significant bits of the address
syllable. Thesebits, are, therefore,interpretedmodulo 64. Multiples of (40)16
used in the a.ddress syllable of a shift instruction produce no shift, as the address
is interpreted as zero. Thus, addresses
greater than (40) 16 will produce shifts
ranging between hexadecimal 91 and 3F.
Hence, the maximum number of shifts is
63 (hexadecimal 3F) bits.
Example 1.

8 modulo 64 = 8
because 8 = 0(64)+8

Example 2.

63 modulo 64
63 = 0(64)+63

Example 3.

128 modulo 64
128 = 2(64)+0

= 63
=0

INSTRUCTIONS

Example 4.

136 modulo 64
136 = 2(64)+8

=8

Shifting C(A), C(B), or C(A and B) has
the same effect as multiplying C(A), C(B),
or C(A and B) by a power of 2 (as long as
no significant bits are lost).
Example 1: Shifting a binary number
in the B Register two positions to the left
has the same effect as multiplying that
number by 22. Bits shifted left from position 1. of the B Register enter· position
32 of the A Register on the LLS operation.
Example 2: Shifting a .binary number
in the A Register 30 positions to the right
has the same effect as multiplying that
·
..
numb er b y 2 -30 • B·Its I
eavIng
POSItIon
32 of the A Register enter position 1 of
the B Register on the LRS operation.
A Ri5tt Shift

o. 5

RS W AS

The C(A)Z, 1-32 ar'e shifted right W
modulo 64 positions. Bits shifted past
position 32 of the A Register are lost.
Positions made vacant are filled with
zeros. The sign position is not affected.
If W mod 64 = 0, the C(A)Z, 1-32, S are
not affected.
A Left Shift

'0.5 ALS W A7

27

shifted right W modulo 64 positions. Bits
shifted past position 32 in the A Register
enter position 1 of the B Register. Bits
shifted past position 32 of the B Register
are lost. The contents of the Z position
will be shifted into position 1 in the A
Register and positions made vacant (including the Z position) are filled with
zeros; however,. if W mod 64 = 0, the
C(A)Z, 1-32, S are not affected~ .

of the Z position are not affected. Positions made vacant are filled with zeros.
The sign position is not affected.
Long Right Shift
5LRS W Al

o.

The C(A)

z,

1 _ 32 and C(B) 1-32 are

•

REGISTER

P1

•

Figure 20.
Long Left Shift

o. 5

LLS W A3

The C(A) 1-32 and C(B) 1-32 are shifted
left W modulo 64 positions. Bits shifted
past position 1 of the B Regis"ter enter
position 32 of the A Register. Bits shifted
past position 1 of the A Register are lost.
There is no overflow indication and if
there is a bit in the Z position it will be
lost unlessWmod 64 = 0, in which case,
the C(A)Z, 1-32, S are not affected.

Po-

sitions made vacant are filled with zeros.

01

It.

REGISTER

1 II

BI I •

,~

REGISTER

M

,_

Z 1 2 3 ------- -----·3132 1 2------------------------ 31 32

•

Figure 21.

The C(A) 1-32 are shifted left Wmodulo
64 positions. Bits shifted past position 1
of the A Register are lost. There is no
overflow indication and if there is a bit
in the Z position it will be lost, unless
W mod 64 = 0, in which case the contents

~

It. REGISTER

01
III
I ~ II
I
Z 1 2. 3 -------.---.31321 2 ------------------.3132

Shift and Count

1. 0 SeT -- AB
If position 1 of the A Register contains a 1, or if the C(A)I_32 and C(B)
are all zeros, a minus zero replaces the
C(D). If position 1 of the A Register contains a 0 but there is at least one nonzero bit in C(A)I_32 or C(B), the A and
B Registers are shifted left until a 1 bit
appears in position 1 of the A Register
and the positive value of the number of

ALWAC III-E

28

shifts replaces the C(D). The contents
of the sign position of the B Register replace the 'contents of the sign position of
the A Register.
COpy OPERATIONS
Copy instructions are used to copy an
entire channel of 32 full~word'5 from a
General Sto.rage channel to a WorlP-ng
Storage channel or from a Working Storage channel to a General Storage channel. It should be noted that it is possible to execute the instruction contained
in the right half of an instruction word,
when the left half contains a copy instruction to the same working channel in which
the given instruction word falls, since
the right half word is previously placed
in the right half of the E Register.
Copy to Workint Storage I

91. 0 eTA W

1

The contents of General Storage channel W replace the contents of Working
Storage I. The contents ofGeneralStor. age channel Ware not changed.
Copy to Workinl Storage II

91.0 eTB W

~

The contents of General Storage channel W replace the content.s of Working
Storage II. The contents of General Storage channel Ware not changed.

CoPl
to workinl Storage III
91.· eTC W 5
The contents of General Storage channel W replace the contents of Working
Storage Ill. The contents of General Stor'age channel Ware not changed.
Copy to wo.rkinl Storage IV

91.0 CTn W

7

The contents of General Storage channel W replace th~ contents of Working
. Storage IV. The contents of General Storage channel .W are not changed.

Copy from Working Storage I

107. 0 CFA W 89
The contents of Working Storage I replace the contents of General Storage
channel W. The contents of Working Storage I are not changed.
CoPY from workill Storage II

107.0 CFB W 8

The contents of Working Storage II
replace the contents of General Storage
channel W. The contents of Working Storage II are not changed.
Copy from

worki~

107.0 eFC W 8

Storage III

The contents of Working Storage III
replace the contents of .General Storage
channel W. The contents of Working Storage III are not changed.
Copy from workiif Storage IV

107. 0 CFD W 8

.

The contents of Working Storage IV
replace the contents of General Storage
channel W. The contents of Working Storage IV are not changed.
INPUT-OUTPUT OPERATIONS
The most significant bit in the address
part of the following Flexowrite r inputoutput instructions is used to designate
whether the high-speed reader, the highspeed puncR, or the Flexowriter is to be
used as the input-output device. If this
bit position contains a 0, the high-speed
reade r or punch will be used if this unit
is connected to the computer. If the most
significant bit of the address part is a 1,
or, if the appropriate high-speed unit is
not connected to the computer, the computer will use the Flexowriter as the input-output device.

INSTRUCTIONS

Hexadecimal (or

Decim~l)

Z9

writer to print (or punch) the hexadecimal character located in the C(A)29_3Z.

Input

-- HXI W Fl
Hexadecimal input is indicated by placing a 0 in the second most significant bit
position of the address part of this instruction; decimal input is indicated by
placing a I in the second most significant
bit po sition.This instruction causes the
contents of the A Register to be shifted
left 4 binary positions and the C(A)Z9_3Z
to be replaced with one hexadecimal character (4 bits) for h'exadecimal input; or
to -multiplythe contents of the A Register
by 10 arid to add the 4 least significant
bits of the character read to this product w)lich then replaces the contents of
"the A Register, for decimal input. For
both types of input, this operation is repeateduntl1 nW-l)mod 8 +~ inputshave
been supplied after which the Select Lite
is turned OFF and the machine resumes
high- speed operations. The sign and Z positions in the A Register are not changed~
Hexadecimal (or Decimal) Output.

-- HXO W F5

The C(A) including sign and Z positions
are not changed.
The address part of
this word is not examined, and, since
the operation code is odd, this instruction may be doubled only when used as
the address part of a doubled instruction.
Sign Input

-- SNI -- F9
This instruction r~places the C(.A) 1- 3Z
with zeros and replaces the sign position
with a 0 or I (minus or plus) accordiJlg
to the character received from the Flexo-writer. The space bar is used for plus
and the minus key for minus indications;
however, any Flexowriter character code
which has a punch in position 4 m~y be
used in place of the minus key. Thiif! include. the characters:
abcdefjyzABCDEFJYZ89L,( -I $., *6~;

abd the stop,lower case,color
sh1ft,code delete,tabulate,
carriage return,and back spi,ce
codes.

Hexadecimal output is indicated by
placing a 0 in the second I:lost significant
bit position of the address part of this
instruction; decimal output -is indicated
by placing a 1 in the second most significant bit position.
This instruction
causes the Flexowriter to print (or punch)
the hexadecimal character located in the
C(A)1_4 and to shift the A ~egister left-

Any Flexowriter character code which
has no -punch in position 4 may be used
in place of the space bar. This includes
the characters:

4 positions for hexadecimal output; or to
multiply the C(A) 1- 32 by 10, to print (or

The Select Lite 'on the Flexowriter is
turned ON by this instruction and the machine waits until an input has been supplied, after which the Select Lite is turned
OFF and the machine resumes high-speed
ope rations. Note that the Z position of
the A Re gister is not changed.

punch) a decimal character form.ed from
the integral part of the product, and to replace the C(A) 1- 32 with the fractional part
of the product. For both types of output,
this operation is repeated [(W-l)mod 8
times. The sign and Z positions in the
A Register are not changed.

+9

Number Output-

NMO -- DD
This _instruction causes the Flexo-

ghiklmnopqrstuvwx
GHIKIMNOPQRS'IUVWX

12345670°"+=%11)

Sign Output

---SNO-- D5
If the sign of the A Register is po.itive,
a space code is transmitted to the Flexowriteor; if the sign of the A Register is
negative, a minus code is transmitted to

ALWAC III-E

30

the Flexowriter. The C (A) including the
sign ·and Z positions are not changed.
Alphabetic Input

ALI W F3
This instruction causes the C(A)2_32
to be shifted left 6 binary positions and
replaces the C(A)26~31 with one alphabetic character (6 bits), and causes this
9perationtobe repeated RW-l)mod 8 +~

The status of these flip-flops may be
affected by executing one of the instruc.tions TYP, PNH, BTP, or NTP (9B,
9D, 9F, or 99) or by depressing the Clear
switch on the Flexowriter or by placing
the Normal - Test - Clear switch on the
Control Panel in the CLEAR position.
Operating either of these switches causes
the Type flip-flop to be turned ON, and
the Punch flip-flop to be turned OFF.

times. Note that if this instruction is
repeated more than 5 times, all but the
last 5 alphabetic characters will be lost.
The Select Lite on the Flexowriter is
turnedONby this instruction and the machine waits until
-l)mod 8 +~ inputs

Placing the Type and Punch switches
on the Flexowriter in the COMPUTE position permits the computer to select the
desired output according to the setting of
the Type and Punch flip-flops which are
controlled by the instructions TYP, PNH,
BTP, and NTP (9B, 9D, 9F, and 99)
which are described below.

have been supplied, after which the Select
Lite is turned OFF and the machine resume s high- speed operation. The sign
and Z positions are not changed but the
C(A)32 is replaced with the C(A)31 after

Placing the Type arid Punch switches on
the Flexowriter in the OFF position will
result in the loss of printed or punched information transmitted to the Flexowriter.

trw

the last alphabetic character has been
read.
Alphabetic Output

ALa W F7
This instruction replaces C(A)32 with

Placing the Type and Punch switche s on
the Flexowriter in the TYPE or PUNCH
positions will cause all information transmitted to the Flexowriter to be typed or
punched, accordingly, without regard to
the setting of the Type and Punch flipflops.

a zero, causes the Flexowriter to print
(or punch) the alphabetic characte r located in the C(A)2 -7' the contents of the

Type

A Register to be shifted left 6 positions,
and causes this operation to be repeated
W -1 )mod 8 +~ time s. The bit positions

This instruction causes the Type flipflop to be turned ON and the Punch flipflop to be turned OFF.

U

made vacant are filled with zeros.
C(A)Z, 1, S are not changed.

24. 0 TYP -- 9B

The

The following instructions are used to
control punching and typing functions on
the Flexowriter according to the setting
of the two switche s on the Flexowrite r
which are labeled IITYPE" and "PUNCH".
Two flip-flops, which are known as the
Type and Punch flip-flops, operate in
conjunction with these switches.

Punch

24. 0 PNH -- 9D
This instruction causes the Punch flipflop to be turned ON and the Type flipflop to be turned OFF.
Both Type and Punch

24.0 BTP -- 9F
This instruction causes both the Type
and the Punch flip-flops to be turned ON.

INSTRUCTIONS

Neither Type nor Punch
24.
NTP -- 99

a

This instruction causes both the Type
and the Punch flip-flops to be turned OFF.

Punched Cards
PCD W 97
This instruction is used to control the
input and output of information from IBM
punched card equipment. This is accomplished by means of a "buffer storage",
access to which is provided from Working Storage IV. Buffer storage is divided
into two half- channels of 16 words each
which are called the CONTROL and INFORMATION lines, and refer, respectively, to the first and second half-channels of the buffer storage. Either, or
both, of these lines may be exchanged
with the first or second half- channel of
Working Storage IV by placing a 0 or 1
in the appropriate bit position in the address part of this instruction, as shown
in Figure 22.
OPERATION (97~6

ADDRESS

q!E~CHANGE:J

INFORMATION
'O!NO EXCHANGE
TYPE OF EXCHANGE
0'0- NORMAL
, 1 '-INVERTED
,

CONTROL -

,

0

J - EXCHANGE
, O'-NO EXCHANGE

,,

----I

INPUT-OUTPUT-:O - READY
'1'- PUNCH
CARD CYCLES .!O' PERMIT----.&
, 1'... SUPPRESS

Figure 22.
The CONTROL line in the buffer is
used to indicate both the format and the
type of conversion desired (decimal, hexadecimal, or alphabetic) for data as it
appears in the INFORMATION line of the
buffer. If the contents of a half-channel

31

of Working Storage IV are to be exchanged
with the INFORMATION or CONTROL
lines in the buffer, a I is placed in bit
position 1 or 3 of the addre s s part of this
instruction as shown in Figure 22. If a
o is placed in these positions, no exchange is made with the corresponding
line in the buffe r.
A normal or inverted exchange is Indicated by a 0 or 1, respectively, in bit
position 2 of the address part of this instruction, the half - channel(s) affected
being indicated by contents of bit positions 1 and 3 of the address part. A normal exchange is one in which eitherttle
first half-channel in Working Channel IV
is exchanged with the CONT ROL line in
the buffer or the second half-channel in
Working Channel IV is exchanged with the
INFORMATION line in the buffer. An inverted exchange is one in which either
the second half-channel in Working Channel IV is exchanged with the CaNT ROL
line in the buffer or the first half- channel
in Working ChannelIV is exchanged with
the INFORMATION line in the buffe r.
If bit position 4 of the addre s s part
of this instruction contains a 0) the card
reader is selected; if this bit position
contains a 1, the card punch is selected.

Bit position 5 of the addre s s part of
this instruction is used to permit or suppress a card cycle when this bit position
contains a 0 or 1, respectively. Thus,
the buffer may be used as an additional
rapid access storage channel, whether
or not the punched card equipment is connected to the computer. Note however,
that data placed in the INFORMATION
line will be converted according to codes
placed in the CONTROL line. This permits rapid binary - decimal conversion.
Bit positions 6, 7, and 8 should contain zeros.
Since 5 bit positions of the address
part of this instruction are used to indicate the variations of this instruction, a
total of 32 different machine operations
rna y be obtained.

32

ALWAC III-E

It should be noted that the contents of
the indicated half-channels are exchanged
before conversion or card cycles occur.
Hence, inforrnation from either Working
Channel IV or the buffer may be punched
on the same card cycle; however, information read into the buffer on the previous card cycle appears in Working Channel IV after the exchange.

In order to operate the punched card
equipment at maximum speed, proce s sing of the· information placed in Working
Channel IV is accomplished during the
conversion cycle before the card reaches
the "9-time" position. Since a change in
format require s exchange with the CONTRoL line, a blank card is usually placed
at the end of each file of cards.
MAGNETIC TAPE OPERATIONS
The following instructions are used
for control of the magnetic tape buffer
and of individual tape units. Bit positions 1-4 of the address part of these instructions are used to indicate the desired sub-operation in accordance with
the hexadecimal codes given in the description of the instruction. See Figure
23. When it is necessary to specify an
individual tape unit, bit positions 5-8 are
used for this purpose. Thus, as m.any
as 16 tape units may be used which are
num.bered, hexadecirnally, from. 0 to F.

searching operations are started. In the
explanation of instructions which follows,
the first word in each tape record is indicated by the symbol WI. The contents
of this word are com.pared with, the contents of the Comparing Register during
searching operations.
Magnetic Tape Status

1. 0 MTS W 91
This instruction is used to prepare the
unit to read or to write, to select the
searching mode and cause searching operations to be started, to test for completion of searching operations, or to rewind a tape to the load point.
Searching operations cause the contents of the A Register to be stored in
the CR (Com.paring Register) of the des~
ignated tape unit, after which the com-'
puter interlocks are released. While the
computer continues to execute instru:ctions in their normal sequence, the tape
m.oves in a forward direction until the
desired tape record is located. In the
following explanation, the symbol W 1 is
used to represent the first word in a given
tape record. Two searching modes are
available:
Mode 1. The tape unit searches for the
tape record until C(W 1)1_32:9C(CR)1_32.
Note that the sign positions are not compared.

ADDRESS
t_----------~A~--------

__

Mode 2. 'Ihe tape unit searches for the
tape record until C(W1)29_32=C(CR)29_32.

8

The- address part of this instruction
contains the designated tape unit and the
desired operation as shown in Figure 23.
Bit positions -5-8 of the address part of
this instruction are used to indicate the
desired tape unit. Bit positions 1-4 of
the address part of this instruction are
used to indicate the _ de sired sub -operation, according to the following hexadecimal code:

-,_I-,----r-I--r-I-'r----r-I---rl---"I
1 2

v

3

4

J\

SUB-OPERATION

5

6 7
V

TAPE UNIT

Figure 23.
Each individual tape unit contains a
Comparing Register which is used for
searching operations.
The C ( A) replace the contents of this register before

33

INSTRUCTIONS

"0"

R~wind.

"1"

Set unit to read status.

"2"

Search in mode
read status.

1 and set to

"3" -- Search in mode
read statu s .

2 and set to

"4"

Test for completion of searching operation. The status of
the Ove rflow Indicator lite is
tested: If ON, the computer
sounds the alarm 2 buzzer; if
OFF, the status of the tape unit
is tested: If the tape unit is
still searching, the Overflow
Indicator lite is turned ON and
the computer takes the next instruction in sequence.

"5"

Set unit to write status.

"6"

Search in mode
write status.

1 and set to

"7" - - Search in mode 2 and set to
write status.
It should be carefully noted that all the
above codes except 4 are executed immediately by the individual tape unit and
overrule any previous MTS instruction
which the unit maybe in proce s s of executing. However, this overrule action
will not interrupt read-write operations
being executed; instead, the computer will
wait until completion of the MTC instruction before execution of a MTS instruc-:tion.

when reading operations are attempted,
the tape unit should be in READ status,
and for writing operations, the tape unit
should be in WRITE status. If the tape
unit is in the wrong status for the given
operation, the given MTC inst.ruction cannot be executed, the machine sounds the
alarm 2 buzzer and stops. If the alarm
switch 2 is placed in the RESTORE position, the machine will execute the next
instruction in the normal sequence. .It
should be noted that the tape unit is set
to READ status after a rewind operation.
This rewind operation may be caused by
execution of the MTS operation, by the
automatic rewinding of the tape when
reaching the physical end of the tape, or
by the manual operation of the control
switches located on the tape transport.
Bit positions 5-8 of the address part
of this instruction are used to indicate
the desired tape unit. See Figure 23.
Bit positions 1-4 of.Jh~ .. address part
of this instruction are used to indicate
the desired sub-operation, according to
the following hexadecimal code:

"I" --

Read previous record into the
buffer.

"2" - -

Read next record into the buffer.

"3" --

Read same record into the buffer.

"5"

Write previous record from
buffer.
Write next record from the
buffer.

Magnetic Tape Copy

1.0 MTC W 93

"7"
This instruction causes information
to be read from a tape and copi~.d into
the magnetic tape buffer, or to be copied
from the buffer and written on the tape.
Before this instruction is executed, the
status of the tape unit is tested and compared with the operation specified in the
address part of this instruction. Thus,

Write same record from the
buffer.

Magnetic Tape Exchange

16. 0 MTX

W

95

This instruction causes the contents
of Working Storage IV to be copied into
the magneti c tape buffe r, 0 r the content s

34

ALWAC In-E

of the buffer to be copied into Working
Storage IV, or causes the contents of the
buffer and Working Storage IV to be exchanged.
Bit positions 5-8 of the address part
of this instruction are not examined.
Bit po sitions 1-4 of the addre s s part
are used to indicate the de sired sub -operation, accordingto the following hexadecimal codes:
It

111 - - The content s of the buffe r replace the contents of Working
Storage IV.
The contents of
the buffer are not changed.

"2 t1

--

The contents of Working Storage IV replace the contents of
the buffer.
The contents of
Working Storage IV are not
changed.

113" -- The contents of Working Storage IV and the buf~er are exchanged.
ADDRESS LOCATIONS
Each half-word in the four Working··
. Storage channels is addressable, the addresses 00 to 7Fbeingused for left half.:..
word locations and 80 to FF used for right
half-word locations. The address locations contained in each of the Working
Storage channels are as follows:
00 to IF and 80 to 9F
Working Storage I
20 to 3F and AO to BF -Working Storage II
40 to 5F and CO to DF -Working Storage III
60 to 7F and EO to FF -Working Stoxeage IV

Normal sequencing of instructions is
in half-word increments from the left to
the right half of an instruction word and,
then, to the left half of the next instruc--:
tion word. in sequence as shown in Figure
24 which illustrates the normal sequence
for Working Channel I. . Note that the instruction which follows 80 is 04 (not 0 I),
that a I follows 9C, and .that 00 follows 9F.
Normal address sequencing in the remaining . Working Storage channels is
similar.
ADDRESS MODIFICATION
Automatic address modification maybe
achieved when using instructions whose
hexadeci:mal instruction codes are odd
numbers. This is accomplishedby using
a code obtained by subtracting 1 from the
instruction code. When the instruction
is executed, the literal address is added
to the 2 1 s complement of the contents of
theE Register to determine an effective
address which is placed in the Address
Register and is used for the execution of
the instruction.
For example, assume that the ADD
instruction is to be use.d and that the E
Register contains the hexadecimal number 0001. The he1adecimal instruction
code for the ADD instruction is 61 which
would be written as 60 together with an
address. Thus, the instruction 6024 with
the literal address 24 would be added to
the 2 1 s complement 9f the E Register
(which, in this example, is FFFF), thereby obtaining the effective. address 23.
Hence, when the E Register contains 0001,
the instruction 6024 is executed in the
same manner as if the instruction 6123
had been given. The distinct advantage
to such" indexing operations is the manner
in which ad.dre s s modification rna y be
used to select one quantity from a set,
the elements of which are stored in successive word locations. An example of
such usage is given in the section titled
"Symbolic Programming".

ADDRESS MODIFICATION

35

Figure- 24.
INSTRUCTION DOUBLING
Two instructions may be doubled to
forma single half-word if the first hexadecimal in,struction code is an even number. This is accomplished by using a
code obtained by adding 1 to the instruction code and placing the instruction code
for the second command in the address
part of the half-word. Thus, to clear
the A Register and exchange the A and
B Registers (CLA and XAB) the instructions 28 and 30 are combined to form the
half-word 2930. Note that no address
part is requiredforthe first command of
this doubled instruction and that if doubling of instructions is attempted in which
the second instruction requires an ad~
dress, the execution of the second co~­
mand will require using the same address
part as the instruction code of the second
command. Thus, if the instructions CLA

and ADD are doubled in one half-word,
the machine code 2961 is obtained. This
instruction, when executed, would have
the same effect as giving the instructions
2900 and 6161 (CLA and 'ADD 61). As
such doubling is only rarelyused by programmers, it is advisable to avoid such
practices; indeed, an as sembly program
should provide for detection of such practices and indicate such coding as an error.
TIMING
The time required to execute instructions is variable and is not only dependent on the specific instruction being executed, but may vary with the choice of
the address part of this instruction (if
required by the instruction). The following points must be considered in any discussion of instruction timing:

36

ALWAC III-E

1.
The word location at ~..vhich the
drum is positioned at the' time of completion of the last instruction. If the current instruction is in the left side of an
instruction word, the drum must turn
until it is positioned to read this instruction word.
If the current instruction is
in the right side of an instructio~ word,
and such word.is acce s sible from the right
side of the E Register (as the result of
execution of the left instruction in the
same instruction word), only one wordtime is required to tra.nsfer the contents
to the instruction and address registers.
If the current instruction is a right address and such word is not accessible
from the right side of the E Register (as
the result of a transfer instruction from
some othe r word location), the drum must
turn until it is positioned to read this instruction word.
In all of the above cases, the mini,mum access time will be O. 5 milliseconds
(one word-time) and the maxim.um,. 8.0
milliseconds (16 word-times).
2. If the instruction requires reference to the contents of a word location
specified in the address part of the instruction, a search is required. This
search starts immediately, and, therefore, timing considerations :glust involve
the positions of the drum at the time this
action starts and at the time when it is
positioned to read the word specified in
the address part of the instruction. In all
cases, however, access time will vary
between 0.0 and 8.0 milliseconds.
3. The execution time required for an
instruction, after the contents of the operand address have been obtained, is given
in the Description of Instructions. See
pages 19 to 34.
4. The shifting. instructions require
O. 5 milliseconds for each shift (modulo
64) specified in the address part of the
instruction.
The transfer instructions require varying amounts of time depending upon the result of various testing operations. Maxi-

mum time for such
milliseconds.

instruction~

is 8.0

5. Input-output instruction times are'
dependent upon typing skills or upon the
status of punched tape' and certain switches and, therefore, only minimum times
may be specified for these types of instructions.
Hence, the dete rmination of the amount
of time required for the execution of a
set of instructions, although computable,
is sOnlewhat complex. Such computations
may be included in Symbolic Assembly
Programs or similar executive programs
without significant reductions in the amount of time required for other operations performed by such programs. However, certain programming rules ·are
re commended 'to pe rmit reduction in the
time required for the execution of instructions. These rules produce near-optimum
times for execution of instructions.
1. If an instruction appears in the lefthalf, of an in struction word, the optinlum
address is one whose last hexadecimal
digit is one greater thaii'tlie location address of either the left or right half of
the instruction wora..
Thus, for location 05, the optimum addresses are 06,
86, 16, 96, 26, A6, 36, B6, 46, C6, 56,
D6, 66, E6, 76, and F6.
2. If an optimum address is used for
the left half instruction, the optimum ad,..
dress for the right half instruction is one
whose last hexadecima1 digit is three
greate r than the loca.tion addre s s of eithe r
the left or right half of the instruction
word.
3. If a non-optimum address is used
for the left half instruction, the optimum
address for the right half instruction is
one whose last hexadecimal digit is at
least two greater than the effective~­
and address contained in the left instruction or a word location whose last hexadecimal digit is the same as this sum.
4. Transfer instructions are exceptions to the above rules. For left half,

37

COMPONENTS

instructions, the optimum addre s s is one
whose last hexadecimal digit is three
greater than the location address of either
the~ left or right half of the instruction
word, providing that the transfer of controloccurs. For right-half instructions,
the optimum address is four greater than
the effective operand address contained
in the left instruction or a word location
whose last hexadecimal digit is the same
as this sum, provided that the transfer
of control occurs. 'When a transfer of
control does not occur, the instruction
is as near-optimum as can be obtained.
5. If the optimum addre s s dete rmined
by rule s 1 to 4 above doe s not yield the
address location of a word which may be
used in the programming of the problem,
successive word locations from the optimum address, may be used with the loss
of one word time (0. 5 milliseconds) for
each word after the optimum location.
The worst possible location s.elected when
time considerations are paramount is the
word location which precede s the optimum location. Selection of this address
will result in no less than 8.0 milliseconds searching time, since the drum must
make one half- revolution before the chosen location is acce s sible.

tain modifications) is the primary inputoutput medium for the ALWAC III-E and
consists of three main parts: a keyboard,
a paper tape reader, and a paper tape
punch.
This reading (or punching) of
paper tape operates at a maximum speed
of 10 characters per second (100 milliseconds per character). When a printed
copy is produced by the Flexowriter, a
maximum speed of 8 characters per second (120 milliseconds per character) is
possible. Various switches located on
the Flexowriter permit the operator to
select the particular type of output desired. In addition, certain switch settings permit selection of printing and
punching operations to be placed under
program control.
Of the available 51 key lever positions,
42 levers are used for characters, 7 levers are used for tabulation, color shift,
back space, carriage return, upper case
shift, and space, and 3 levers are used
for the clear, stop, and delete controls.
The keyboard is similar to that of most
electric typewriters; however, the characters on certain keys have been replaced
with some of the more common mathematical symbols. The keys used for hexadecimal input are made of red plastic for
easy recognition. See Figure 25.

FLEXOWRITER
The F1exowriter (Model FL with cer-

Figure 25.
/

38

ALWAC III-E

Since the same code is used for characters in the upper and lower case, a
total of 84 distinct printed characters is
available. The shift controls are selflocking and the Flexowrite r will remain
in the given case until another upper or
lower case shift occurs. The color shift,
space, back space, carriage' return,
clear, code delete, and stop codes operate independently of the upper and lower case shifts.
CONTROL SWITCHES
Start Read Switch: When releasedafter
being depressed, this momentary contact
switch starts the tape reader operation.
By rapidly depressing and releasing th.is
switch, the tape may be moved one code
position at a time. If this switch is operated when no paper tape is in the reader, the effect is the sa:me as pressing
the Clear switch which is described below.
Stop Read Switch: This :momentary
contact switch IS used to stop tape reading operations. In order to resume operation, the Start Read switch must be
depressed. Since it is difficult to stop
the paper tape m.anually at a particular
punched code position, and, since failure
to depress this switch within certain critical time limits can cause double entry of
the last character read; the Start Read
switch is used to stop the paper tape at
the desired code position and then the
Stop Read switch is depre s sed which will
stop reading operations.
Punch On Switch: This two - position
sWItch controls tape punching operations
and, when in the DOWN position, causes
each character typed to be punched also
until the switch is returned to the UP position. Note that this switch controls only
the punching of information which is read
from. the tape read station or is entered
m.anually on the keyboard and that this
switch does not control the punching of
information sent from. the com.puter.
Clear Switch: This momentary con-

trol switch corre sponds to the NormalTest - Clear switch which is located on
the Control Panel and is described on
page 16. Depressing and releasing the
Clear switch causes the c.ontents of General Storage channel 01 to replace- the
contents of Working Storage channel I and
control to be transferred to word 00. A
p~ogram known as the Start Routine is
located in General Storage channel Oland
is used to cause input and output of pro ...
grams and to transfer control to a given
location in one of the four Working Storage channels.
If the Punch On switch is in the DOWN
position when the Clear switch is. depressed, a special character code will
be punched in the tape which is known as
a "clear 11 punch. If this character code
is later read by the tape reader, the effect is the same as depressing the Clear
switch.
Copy Inputs Switch: When this twoposition switch is in the DOWN position,
each character read from the tape reader
will be typed at a maximum speed of .10
characters per second; when in the UP
position, information read from the tape
reader is not typed and tape reading o.Perations can proceed at a maximum speed
of 10 characters per second.
Tape Feed Switch: This momentary
contact switch is used to feed paper tape
from the punch station and to punch feed
holes which are used to guide and position
the punched tape when placed in the read
station; Since paper tape is supplied in unpunched rolls, it is necessary to use this
switch to provide approximately three
inches of feed holes which are used by
the punching station to pull the paper tape
pa st the punch die s.
Code Delete Switch: Thism.omentary
contact switch cause s a special character code (all six positions) to be punched
which will be ignored when inte rpreted
by the reading station. Thus, this switch
is used to delete unwanted information on
a punched tape.

39

COMPONENTS

Stop Code Switch: This momentary
contact switch causes a special character
code to be punched which will have the
same effect as depressing the Stop Read
switch which is described above. However, if the computer is asking for an
input at the time this switch is depressed,
a binary code corresponding to the special
character code will be placed in the appropriate bit positions in the A Register.

sired output according to the setting of
the Type and Punch flip-flops which are
controlled by the instructions TYP, PNH,
BTP, and NTP (9B, 9D, 9F, and 99) which
are described on page 30.

Select Lite: The Select Lite is turned
ONwhen the computer selects the Flexowriter for an input device and remains
ON until the proper number of inputs is
supplied from the keyboard or from the
tape read station.
Computer - Off - Flexowriter Switch:
This switch supplies the electrical power
to the Flexowriter and determines whether the Flexowriter is to be used independently or with the computer. When
in the OFF position, all electrical .power
to the Flexowriter is turned off and all
control switches are inoperative.
When in the COMPUTE position, the
Flexowriter and its as sociated control
switches operate in conjunction with the
computer and may be used to control various machine functions.
When in the FLEXOWRITERposition,
the computer and Flexowriter operate
independently.
Thus, the Flexowriter
rna y be uS.ed to prepare punched tape s
or to produce a printed copy-of information which is punched on a tape without
disrupting other computer functions.
Punch - Off - Compute and Type - OffCompute Switches: These two switches
are used to control punching and typing
functions on the Flexowriter and operate
in conjunction with two flip-flop.s in the
computer which are known as the Type
and Punch flip-flops. Placing either of
these switches in the COMPUTE position
permits the computer to select the de-

Figure 26.
Placing the Type and Punch switches
in the OFF positions will result. in the
los s of printed or punched information
transmitted to the Flexowriter.
Placing the Type and Punch switches
in the TYPE or PUNCH positions will
cause all information transmi'tted to the
Flexowrite r to be typed or punched, accordingly' without regard to the setting
of the Type and Punch fIi p- flo ps.
The proper feeding alignment of the
paper tape in the reading and punching
stations is shown in Figure 26. Note that
small sprock-ets on the reading and punching stations are used to pull the tape
through the mechanisms.
The keyboard will lock, preventing
operation, if any of the following conditions occur:
1. The tape guide arm is not against
the tape at the reading station.
2.
The blank tape which feeds the
punching station tears, binds, or runs out.

40

ALWAcm""E

FLEXOWRlTER AND PUNCHED TAPE CODES

.......••
•••••

••

•

• • ••
••• ••
••
•

.
•••
-

••• •
•

•

• •

•• • •
• •••
•••••
•
••
•
••••
• •••

•

.-

•••••
•
••
• ••
••••
• •••
•• •••

•
•

•
•

•
•

stop Code
Code Delete
Clear
Upper Case Shift
Lower Case Shift
Space (See note)
Back Space
Color Shift
Carriage Return

aA 00 1010
bB

00 1011

c C 00 1100
dD 00 1101
e E 00 1110
t F' 00 llll
gG 01 '0000
hH 01 0001
i I 01 0010
j J 01ll1l
kK 10 0000
1 L 10 0001
mM 10 0010
nN 100011
o 0 10 0100
pP 100101
qQ 10 0110
rR 100111
s S 11 0010
t T 11 0011
uU 11 0100
vV II 0101
wW 110110
xX 11 Olll
yY 11 1000
z Z 11 1001

Tab
1

0

2

It

3
4
5
6

+
=

10

1
7 t

8L.
9(
0 )

/t

-, -

~$

*
6

. .•
,

;

(See note)

11 1100
10 1011

-------

10 1001
10 1000
00 0000
10 1110
io 1010
10 1101
10 1100
00 0001
00 0010
00 0011
00 0100
00 0101
00 0110
00 0111
00 1000
00 1001

11 0000
11'0001
01 1110
II 1011
II 1010
111lll
11 1110

Note: The binary code 000000 when used with the ALO instruction providea the space character and with t1l:e HXO in stru.ction ' provides
a 0 or ) character. The binary code 10 0001 which is used for the
land L character may be :a.sed as the nw:nber 1 when "sed with the
HXl and HXO instruction••

Figure 2.1 •

COMPONENTS

The punched code system use s seven
punching positions (of which the position
number 7 is used only for the clear code).
The remaining 6 positions provide suitable combinations for the various character and control codes which are shown
in Figure 27 together with the appropriate
binary codes. The punching positions are
numbered 7-6-1-2-3-4-5 from left to
right facing the leading edge of the tape
with the feed hole placed between the number 2 and 3 holes. An 8th hole position
is available but is not used. Either 7/8
inch or 'I inch paper tape width may be
used.

41

The effective speed of the paper tape
unit during punch operations (which includes time required to copy information
to and from General Storage) is 50 characters per second and during read operations is 150 cha.racters per second.
Thus, the unit is capable of punching the
contents of 12 channels of memory per
minute or the entire memory (256 channels) within 24 minutes. It is possible
to read and store information at the rate
of 35 channels per minute or the entire
memory within 8 minutes. (These speeds
include the programming time required
for check summing and block transfer
instructions. )

HIGH-SPEED PUNCHED TAPE CONSOLE
The Punched Tape Console (see Figure
28) is designed as a high- speed inputoutput device. The unit operate s at an
approximate power consumption of 320
watts, with voltages supplied from the
Power Supply unit of the computer.
The reader employs photo - cells to
read the punched characters thus permitting the tape to move continuously during reading operations.

The same input and output commands
are used with the High-Speed Punched
Tape unit as with the Flexowriter; however, the most significant bit position
of the address part of the instruction is
examined. If the bit position contains a
I, the Flexowriter is selected as the input-output device; if the bit is a 0, the
High-Speed Punched Tape unit is selected
(providing the Punched Tape unit is turned
ONi if it is OFF, then the Flexowriter is
selected) .

Figure 28.

4.2

ALWAC III-E

CARD CONVERTER

tion, :may be used for reading and punching of cards. The card feeding should
be 12-edge face down for normal operation. The cables contained in the bases
of these machines are attached to connectors located on the Card Converter
unit. Plug-boards are available for each
of these :machines, the wiring for which
is described below:

Punched cards provide a rapid inputoutput :mediu:m because of their great
flexibility. Errors are easily detected
and corrected, data:ma y be prepared on
several key-punches si:multaneously, and
the cards collected before being processed by the computer. Manual access
to files of punched cards is particularly
desirable since carcis can easily be separated or inserted in the file. Alphabetic,. deci:mal, and hexadeci:mal numbers, quantities representedin any nu:m,ber syste:m, and special sy:mbols may be
represented by appropriate co:mbinations
of punched holes in the card. Certain
punch co:mbinations are standard for
punched card processing :machines as is
shown in Figure 29.

Type 523
The hubs which are labeled CaMP
MAG or CTR TOT EXIT or MS OUT provide acce s s to the cable connectors. For
reading operation, these hubs are wired
to the hubs :marked PUNCH BRUSHES;
for punching operation, these hubs are
wired to the hubs :marked PUNCH MAGNETS. The nu:mbers which appear over
the hubs marked PUNCH BRUSHES and
PUNCH MAGNETS, which are numbered
fro:m left to right, refer to card columns
1 through 80., See Figure 30.

Either the IBM Type 523 Summary
Punch or the IBM Type 514 Reproducing
Punch machines, with c'ertain modificaLETTERS

DIGITS
0,·23

561

9

, I

~

"'~ .I~, l_~

I

SPECIAL CHARACTERS
!,CI",

U.

I

~

II I ~
II I ~ ~ ~ I

_000000 ~

~1234567
10
~

~

00000000

~ 1 ~ ~ 4 5

17 18 19 20 21 22 23 24

11111111

~2 2 2 2 2222

I

00

00
~ ~

~

33435

11111111 ~

11

222222222~

222

11111

2

33333333333 1 3

3

44444444444

~4

~4

555551

55555555555

5

5

5 555 5

66666661

66666Sn

66666666666

6

6

6 S6 6 6

117777111

7177111 ~

11117711177

1

7

i 7777

555555555555

)555555~

177777717111111

00000
167118 19 80

1

: 2

4444' 4 ~

7711111111711 ~

55565758 59 60

22222222222

I

44444444444~

I

!~

I

4 4 4 4 4 4 4 4 4 4.•

666666666&666

~

1

~3333~

666666666666.

I~

III.
0
0000
II ~I
II I ~ 0 0 00 0 .061 6263
1
64 651 ,16U

,

11111111111

33333333331

h

4546

11

3333333331

55555555555

• .

"

..

UUSHES-,15

I_ _ _~~~~~-=---~~II

'.~"1:: 1I,..........--------~~~~------'I1II

"

0 0 :. So IR~SH~-~

5~PUHCH

:'\

0 0 0

III
~:::

:::::

111~~:-;::::~;z;*~~=~==-:iJIIII
I\~;::::---

"

'-~'-COMP,t,RING 8RUSH~S-'~
SO
00000000000000000000
25
30
3~
~o
00000000000000000000

.5

50

55

40

00000000000000000000
45
70
n
80
0
o. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

o

'-~'-COMP,t,RING

BRUSHES-IS

0000000000000000000
25
30
3)
0000000000000000000
~5
SO
~5
o
0
0
o· 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
45
70
1$
o 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Figure 30.
To explain the use of these codes a
relation between words in the Control and
Information lines must be defined: A
CONTROL word and an INFORMATION
word are said to correspond if the 4 least
significant binary positions of the address
location of the words are the same. See
Figure 24.

. 44

ALWAC III-E

Thus, word locations 60

correspond
16
to word location 70 , 61
to 71 , and
16
16
16
so forth. The previous and succeeding
word locations are, then, the locations
whose addresses are respectively, one
unit greater or less than word location
to which reference is made, considering
each half-channel to be circular. Thus,
word location 60 16 precedes 61 16 and
succeeds 61
; however, word lo16
16
cation 60 16 succeeds 6F 16 and 6e 16 precedes 6F 16. To code the CONTROL line

TROL word which should have a 1 placed
in bit position 4 is located by applying
the following rule s :
a.

Determine the addre s s location
of the last decimal type INFORMATION word.

b.

Count back 9 decimal INFORMATION words (including the
starting word as number 1 of
the count) and determine the address location of the word.

c.

Determine the corresponding
location address in the CONTROL line.

d.

Count forward 8 CONTROL
words (including the starting
word as number 10f the count)
and place a 1 in bit positi'on.4.

62

for a given card format the following rule s
are given:

11!l11

I

~3

4 ,5
I

IIII

'

3132 S J

L:CO:L:~:M:N:A:S:S:IG:N:M~E:'T-S------------------~
SPECIAL TIMING MARKEl
TYPE OF CONVERSION'; 00'· ALPHABET1e
.
. 01 -HEXADECIMAL
10-DECIMAL

Figure 31.
1. The following binary code, which
is determined by the type of data contained in the corresponding INFORMATION word, is placed in bit positions 1-2
of the CONTROL word which precedes
the corresponding INFORMATION word:
"00" Alphabetic code

itO 1 U Hexadecimal code
"10" De cimal code
2. Bit position 3 of the CONTROL
word should contain a zero.
3. If there are 10 or less decimal type
INFORMATION words, a 1 maybe placed
in bit position 4 of anyone of the first 10
CONTROL words. All other CONTROL
words should contain a 0 in bit position 4.
If there are between 11 and 16 decimal
type INFORMATION words, the CON-

4. The remaining bit positions (5--32
and the sign) are used to indicate the num,be r, of ,card columns,.as signed to each IN-'
FORMA TION word and the location of data
within the INFORMATION word. To accomplish this, a 1 bit is placed in the'
corresponding CONTROL word one bit
position to the right of each corresponding position of the data characters in the
INFORMATION word.
Note that the sign position appears to
the right of bit position 32 and that the
plus sign is represented by a 1 bit in the
sign position. Thus, if the INFORMATION word contains 3 hexadecim,al characters which are located at a binary point
of 32, the seven least significant hexadecimal positions in the corresponding
CONTROL word should contain 0000088+
since the binary l' s in this word would
appear to the right of the 3 corresponding groups of 4 bit positions in the CONTROL word. Similarly, if the INFORMATION word contains 3 hexadecimal characters which are located at a binary point
of 31, the code 0000 111- would be placed
in the seven least significant hexadecimal
characters of the corresponding CONTROL word.

CARD CONVERTER

Decimal words are treated in a similar manner by making provision for 4 binary positions for each card image column but must be placed at a binary point
which is an integer multiple of 4; alphabetic words may consist of up to 5 groups
of 6 bit positions each.
Thus, the 7 least significant hexadecimal characte rs of the CONT ROL
words for INFORMATION words which
contain 3 decimal and 3 alphabetic characters which are located at a binary point
of 32 are, respectively, 0000088+ and
0000820+. An INFORMATION word containing 3 alphabetic characters at a binary point of 31 would require that the
code 000 1 041- be placed in the seven least
significant hexadecimal characters of the
corresponding CONTROL words.
It is
important to note that, although it is possible to locate the binary points for alphabetic characters, all groups of 6 binary characters must be totally contained
within one word.
By examining bit positions 5 - 32 and
the signs of the 16 CONTROL words, card
image column assignments are made beginning with the last word of the CONTRoL line and proceeding in the reverse
direction to the first word of the CONTRoL line. One column assignment is
made for each non-zero bit contained in
bit positions 5-32 and the sign of the 16
CONTROL words. Thus, a total of 16
different fields of alphabetic, decimal,
or hexadecimal data may be formed in
the card image.
Since the number of
fields will suffice for most problems, a
standard plug - board may be wired for
the IB M Type 523 and 514 machine s which
connects card image columns 1 - 80 to
punch brushes or punch magnet hubs 1-80.
This results in a "criss-cross" wiring
scheme on the plug-board and permits
program control of a wide variety of card
formats. In connection with punch program control using such plug-board wiring, it should be noted that careful at-

tention should be given to insure that exactly 80 non-zero bits appear in positions
5-32, S of the CONTROL words. Failure
to do so will re sult in the shift (and los s)
of information which is punched or read.
If situations occur in which more than
16 fields are required, plug-board wiring
togethe r with programming technique s
'which "pack" several fields in one INFORMATION word maybe usedto eliminate such difficulties.
Blank columns may be obtained by
placing zeros in the INFORMATION word
and identifying the word as an alphabetic
word. It is emphasized that no programming is required for binary-decimal conversion when an INFORMATION word is
identified as containing decimal information. Algebraic signs of hexadecimal
and decimal words (not alphabetic) are
punched over the least significant column of the field.
The binary code s used in conjunction
with punched card equipm.ent appear in
Figure 32.
Char.

0-

B~\,iOde

IBM Codes

000

0

L
M

(with Dec.or
Hex.codes)
B1ank

00000o

B.C,

A

B
C

D
E

F
G

H
I
J
K

000001
000010
000011
000100
000101
000110
000111
001000
001001
010001
010010
010011
010100
010101
010110
010111
011000
011001
100001
100010

N

0

(with Alphabetic codes)

1
2
3
4
$
6
7
8
9

~ Binary Code

P
Q

1
2
3
4
$
6
7
8
9
12-1
12-2
12-3
12-4
12-5
12-6
12-7
12-8
12-9
11-1
11-2

R

S

T
U
V
W

X
y
Z
&

.

1:(

$

-r...

/

,

%
#
€:I

Figure 32.

100011
100100
100101
100110
100111
101000
101001
110010
1100ll
Uo100
110101
110110
110111
111000
111000
010000
011011
011000
100000
101011
101100
lloool
lUOll

1111oo
0010ll
001100

IBM Codes

ll..3
ll-4
ll-$
ll-6
11-7
ll-B
ll..9
0..2

0-3
0..4

0-$
0-6
0-7
0-8
0..9
12
12-3-8
12-4-8
II

11-3-8
11\"4-8
0-1
0-3-8
0-4-8
3-8
4-8

46

ALWAC III-E

MAGNETIC TAPE UNITS
In addition to magnetic drum storage,
sixteen Tape Transport units with an associated Tape Buffer are available.
Each tape unit may contain a half-inch
wide oxide coated plastic tape up to 2400
feet long. Information is stored on m.agnetic tape as binary bits in the form of
magnetized spots. Thus, the same tape
may be reused many times.

r----------3
R£CORD MA1UCER-+ +1

. ! to't tt tM++++...H .....t 1
++++++tt"'...
_,..·!:'~Htt+tH-ti'ttH
H+++<++++t: _ _ _ _
._. __ sS;'++-+++++++ +
ti'tt"tt't1f!~.,.___
... ___ .. H++++++++ 1
H"4~".u+~ __ ..
. .. __ .+Utittttt ~
+++-I+t+++++:& L:.....
,.. ...... ++t+++H-it

H1'+-ti+t+ .•• _ •

INFORMATION -+ +0'
INFORMATION
CLOCK
•
INFORMATION=:
INFORMATlON--+ tl
CHECK BIT --+"1:1

-+H'

The Tape, Transport has a one word
Comparing Register, which may contain
up to 32 bits of information for comparison when locating an individual record
on the tape.
The Buffer unit controls the mode s of
operation of each of the Tape Transports
and furnishes interlock signals to the
computer for maximum simultaneous utilization of search, rewind, read, and
write times by the computer program.
ARRANGEMENT OF INFORMATION
Seven bits are recorded laterally on
the tape. These seven bits are composed
of four information bits, one check bit,
one clock bit, and one record marker bit
(see Figure 27). One word is made up of
nine of these groups (one group contains
the sign of the word) and a tape record
comprises 32 words (32 x 9 = 288 lateral
groups) which correspond to a channel on
the drum.
Each record is preceded by a record
marker bit and a clock bit record in the
same lateral group.

8

U.~.U.H'" ++-J+",,~..

t -.-.....f--.......~--~ REcotm

MAllKER

The reading, writing, and searching
speed of the tape is 100 inches per second. The longitudinal density of the tape
is 100 bits per inch and reading or writing is done at the rate of 10 records (of
32 words each) per second. The tape can
start and stop in approximately 10 milliseconds and rewinds at a speed greater
than 500 inches per second.

inch~e~s-======.='======3-__
__ .W,.HH ........

......--""'*=~~.---­

32l1li WORD

l

V

RECOR'D

Figure 33.
A tape file is composed of any number
of associated records. A tape reel can
contain one or more file s depending upon
the size of the individual files. A 2400
foot tape contains approximately 10,000
records.
SEARCH OPERATION
The tape transport searches the tape
for the desired record at 100 inches of
tape per second. When a search order
is given, the contents of the A Register
replace the contents of the Cornparing
Register in the tape unit, after which the
computer rnay continue with its program.
The search order takes one rnillisecond
of machine time providing it doe s not have
to wait ori inte rlocks. The' contents of
the Comparing Register in the tape unit
are used for search comparison. The tape
starts forward and a comparison of the
first word of. each record with the Comparing Register is made. Upon reachingthe end of the tape, if the desired record has not been found, the tape will rewind to the start of the tape and continue
search operations until the de sired rec0rd is located after which the tape unit
positions the tape in read or write status.

47

SEARCH MODES

status for the read operation.

The tape transport is able to search
in two different modes of operation. The
search mode desired is indicated by the
configuration of the address part of the
word. During search mode I operations,
the tape transport unit will choose the
first record whose first word is greater
than or equal to the Comparing Register.
During search mode II operation, the tape
transport unit will choose the first rec0rd which has the least significant eight
bits of t.he first word equal to the least
significant eight bits of the Comparing
Register.

WRITING

READING
The programming required to read a
record from tape is the command Magnetic Tape Copy (MTC). The configuration of the address part indicates which
one of three available records to read
from, the preceding, the current, or the
succeeding record.
If the tape unit is in the WRIT E status
when the command is given to read,. the
computer will stop and alarm number 2
buzze r .will sound.
If a command to read is given while
the tape unit is engagecrTn a search and
prepare to read operation or another read
operation, tli'ecommand to read is lleld
up by interlocks· until the completion of
the previous instruction. At this time,
the interlocks release and the computer
takes the next command in sequence while
the tape unit performs the read operation.
If the tape unit is engaged in a write
operation or search and prepare to write
and a command to read is given, the command to read is heTCI"li'j) by interlocks until
the previous command is completed. At
this time, the machine will stop and the
alarm number 2 buzzer will sound, indicating the tape unit is not in the correct

The programming required to write
a record onto tape is the command Magnetic Tape Copy (MTC). The configuration of the addre s s portion indicate s which
one of three available records is to be
written: the preceding, the current, or
the succeeding record.
If the tape unit is in the READ status
when the command is given to WRITE,
the computer will stop and alarm number
2 buzze r will sound.
If a command to write is given whIle
the tape unit is engaged in a search and
prepare to write operation or another
write ope ration, the command to write
is held up by interlocks until the completion of the previous instruction. At
this time, the interlocks release and the
computer takes the next command in sequence while the tape unit performs the
write operation.

If the tape unit is engaged in a search
and prepare to read or a read ope ration
and a command iSgIVen to
the sec0nd command is held in the tape unit until
the completion of the first command. At
this time, the machine will stop and the
alarm number 2 buzzer will sound indicating the tape unit is not in the correct
status to carry out a write instruction.

wnre,

If the tape unit is engaged in a rewind
operation and a command is given to
write, the write command is held in the
tape unit until the completion of the rewind operation. At this time the tape unit
is automatically set to READ status and
the command to write is released by the
interlocks. The computer stops and alarm number 2 buzzer sounds indicating
the unit is not in the correct status to perform the write operation.

48

ALWAC III-E

MANUAL OPERATION
During normal operation the compute r
controls the tape transport through the
buffer. The controls on the front panel
of the tape unit are for manual operation
of the unit.
The door of the tpae transport must
be closed to actuate an interlock which
permits the unit to operate from any control. The Interlock Lite on the Control
Panel 'signifies the door is open.
To operate the tape unit manually the
Test Switch must be ON. The Test Lite
will be turned ON and remains ON until
the Te st Switch is turned 0 FF •
With the Test Switch ON, the unit may
be run forward, reversed, or rewound
with the appropriate switch.
The Ready Lite is ON at any time the
unit has found a record commanded by a
search operation or when the machine is
reading or writing under normal conditions.
The Stop Lite is turned ONat anytime
the Stop Switch is ON. The Stop Switch
m.ay be utilized at anytime of normal operation or manual operation.
CALIBRATE OPERATION
The calibration switch is for the purpose of calibrating a new tape or a tape
that is suspected of having bad spots on
it.
To calibrate a tape, load tape reel
and thread tape to the start position. Depress the Calibrate Switch. No further
manual operation is needed as the calibration takes place automatic,ally.
The tape will start in a forward direction and traverse the entire length of
the tape, saturating it on all seven tracks.
Upon reaching the effective end of the
tape, the unit reverse s tape direction

and after inspection of the tape it records
a record marker bit and 'a clock bit as an
indicationthat it has scanned enough consecutive good tpae to hold one record.
This process is continued to the beginning
of the tape at a speed of 125 inches per
second. At this time, the operation is
complete and control of the tape unit is
again transferred tn the computer.
LOAD OPERATION
Loading is accomplished by the following list of operations:
1.

Place LOAD Switch in ON position.

2. Place loaded tape reel on lower
spindle. End of tape should hang from
left side of reel. ,Place empty reel on
upper spindle. Place reel retainer caps
on both spindles.
3. Thread end of tape over right hand
guide and through right vacuum well guide.
(Drop c;loor at top of well to provide
access to guides). Tape should loop to
half length of well.

4. Thread tape over right capstan and
through read-write mechanism.
5. Thread tape through left vacuum well
guides. Tape should form loop half the
length of the well.

6.

Thread tape over left capstan.

7. Thread -1

~

,,,

I

001 16

COIl'lDflll IF FLlO IS ZIIlO

,,,

I 5 6 I 5
"

lUG 'l'O A RlGIS'fBR

l'lWISJBR 'l'O I1IS1'ROOTIOlf 10 ]]I' HOlI-ZIRO

,~

J

,

144 0,9

152 I 3

REMARKS

••1, l '

020 I 0
14 8 I I
024 I 2

DATA~

~

I

,,,
, ,

.
,,,

~

,,,

~

~
PUG

I , ,

FLAG

Figure 34.
The Sum of N-Quantities
LOCATION

The algebraic sum of 13 quantities is
desired which are stored in successive
data word locations 00, 01, 02, • • . 12,
in Working Storage channel I. The coding
to accomplish this computation is shown
in Figure 35.

DRUM NS

1f

I~

R
OPRN E ADDRESS
G
G N

000 00 L,.W S
I 2 8 01 L,AW'l

, , ,0

004 02 A, QDI~
132 03 T,I,XS

I

008 04 S,AtwS
I 3 6 05

,

021

eo

.o,P

I 5 5 6 I If,O,P
o 3 I 6 2 I,O,P
I 59 6 3 .,O,P

Figure 35.

o

, ,6,0

~

, ,1,1

B~

12
, ,6,2

~

I

DATA~
REMARKS

SBT IIIIBI TO 12
ADD PIBSr-1I1IIIBR
ADD B!IUI1tOI.I lItIIBIRS
RlPDT IIS!JlOOfIOlI 2 _
S'l'CilB BBS'OU

COll'lIlUE I'IlOOIWI

,'.1. ,2
I

"

I

•

I

"

~

CO_AlIT

X
I

~ S'l'OlWB JOIl
SlII

BI!KAIIIIIO IlIIBIIIS

51

SYMBOLIC PROGRAMMING

Floating a Fixed- Point Numbe r
To convert a fixed - point number,
whose binary point is located 16 places
from the left end of a word, into a normalized floating-point number, the coding shown in Figure 36 is used.
LOCATION

.

I

OPRN

DRUM NS T,;

000

o

0 L is I W

I 2 8 0 I

004
1 3 2

R

,

L,1. W~

o 2 S,C
o 3 X rA

IT 0
I

B

,
,,

008 o 4 8 IC • S S
I 3 6 o 5 A aD • D
0 I 2 o 6 t,R 18 0
I 4 0 07 S ~,'W
0 I 6 o 8 TIN. Z
14 4
--

o

9

• •

007 5 0 B.o I P 0
1 3 5 5 I ltO.P 0
0 I I !5 2 • to I P
I 3 9 5 3 If PIP
015 5 4
0 •P
I 4 3 5 5 If ,0 1 p
0 I 9 5 6 Il PIP

"1

T

J

1 S,O

I

".2

.1.0
X ~ ID,
1

1

",4

I

.S,6
I .8

I

1,.8

I

.3,2

I

I

I

,0

J

1

.0

I

I

•

J

J

I

J

I

,0

[1.2 18
J

I

1°

Wp ,P

I

.1,6

o

IfP.P

I

I

,0

.1'

J

I

.0

I !5 I 5 9

,P

DATA/
REMARKS

b

~

CLEAR B REGISTER
FIXED-POINT WORD TO A REGISTER

VI

SHIn LEFT TO NORMALIZE
NORM IlAGNITUIlE TO B AND COUNT TO A REGISTER
.._--,---_.'-,------- ,.'-'PCRH 128-D
...--,--.---...- ..
ADD BINARY POINT LOa.
---.--------.... --..--.•.
PACK WORD III B REGISTER
,---"..- . - ...
..- .. STORE FLOATING-PCDr!' 1UMBFl!
-------TRANSFER TO ERROR HALT IF OVERFLOW
..-.

~

~
~

--~-

-~

....

-----..~-....--

----.~.-

.------

.~-.-

!

CONTIBUE PROGRAH

1 1 •

I 4 7 5 7

2 3 5 8

s

E ADDRESS A
G
G N

~

ZlCRO

._--_..

_.

X

~
~

S'lORJ.(JE FOR FIIED-POIIfl
lUMBER
128 AT A BINARY POIlI'l
OF 32

-------

~

16 AT B
OF 32

~

STORAGE FOR FLOATING-PODT
lfUHBER

Figure 36.

_._-

;

52

ALWAC llI-E

Sub routine s
. Many routines, such as square root,
trigonometric functions, exponential and
logarithmic functions, data input-output,
interpolation, and integration, are used
repeatedly in the execution of a single
problem or in different problems. Such
routines are called subroutines since
their use is subordinate to the control of
the main problem of which they are a
part. A set of such subroutine s is called
a libr.ary and each computing installation
maintains such a basic programming tool.
Subroutines are classified as being an
open or closed type, accordingly, by the
manner in which they are used with regard to the flow of control: An open subroutine is incorporated in a pr~graiii1)y
inserting the subroutine directly into the
ma~n flow of control. It is therefore necessary to insert the subroutine at each
point in the main program at which it is
required.

A closed subroutine is one which may
be executed Illany tiIlles in a program,
but the subroutine instructions need appear only once in the prograIll. To transfer control from the main program to the
subroutine, a set of instructions (known
as a calling sequence) is given. The subroutine obtains sufficient information
from this sequence to perform. its various functions and to determine the return address to which control istrans·ferred after completion of the subroutine
. co.mputations.
Calling sequences are
necessarily unique for each special subroutine; hence, each computing installation maintains a' set of such calling sequences for subroutines in their library,
which set, together with selected notes
pertinent to programming standards used
by the installation, constitute s a text
known as a coding manual.

APPENDIX A
BINARY AND HEXADECIMAL NUMBER SYSTEMS
There are but three rules for binary
addition; the se are:

In all systems for representing numbers, a number may be expressed as a
~um of terms.
Each term appears as
the product of an inte ge r and some powe r
of a base number. Thus, in the' decimal
number system, the base is 10 and the
'integers of the set 0, 1, Z, . . . 9, are
used. For example:

=0

0+0

0+1 = 1
1

+ 1 = 10 (a 0 witha "carry" of 1)

The following e~ample illustrates these
rules for the addition of the numbers
1011001 and 10111101:

= (3xlOZ) + (2xI01) + (lxlO O)
I
5.93 = (5xl0 0 ) + (9xlO- ) + (3xl0-Z)
3Z1

carries: 11111
and, in the binary number system:
32 1

= Z5 6 + 64 + 1
= (lxZ 8 ) + (OxZ 7)
5

+ (OxZ ) + (OxZ4)

10111101
1011001

100010110
+ ( lx2 6)

+ (OxZ

3

Four rules exist for
tion which are:

)

o-

Z
0
+ (Ox2 ) + (OxZl) + (lx2 )

subtrac-

0 =0

=1

1-0
If the base used is evident from the
discussion in which such numbers appear,
it is unnece s sary .to write more than the
coefficients of the above series. Thus,
3Z1 and 101'000'001 are respectively the
decimal and binary representations of the
same numerical value. If confusion may
occur when the base is omitted, a convenient symbol - a subscript - may be
used to indicate the base. In the above example, the numbers 32
and 101000001
Z
10
indicate decimal and binary representations by the subscripts 10 and 2.

bi~ary

1 - 1 =0

o-

=1

1

(with a 1 borrowed from
the next rno st significant
position)

For' example:
1011001 is subtracted from 10111101
as follows:
borrows:

1
10111101
-1011001

1100100

It is important to note that the integers
0, 1, Z, . . • (n-l) comprise a set of n
quantities and that each coefficient of the
series must consist of an integer from
this set. Thus, the integers 0, 1, 2, 3,
. • . 9 are used for each decimal position, the integers 0 and 1 each for binary position, and the integers 0, 1,-Z,
:-:-: 8, 9, A, B, C, . . • F, for each
hexadecimal (base 16) position.

For binary multiplication, the following four rules apply:
OxO=O
1x 0

=0
=0

1x 1

=1

Ox 1

53

54

ALWAC III-E

To multiply 1011 by 1001 proceed as
follows:
1011
1001

100000

1010 = 11 with remainder
of 10

11

1010 = 0 with remainder
of 11

1011
0000
00000
1011

11.00011
To convert a number from one nUInber system to another, the number is
divided' by the base of the new system
and the remainder is noted. The quotient obtained is 2. gain. di vided by the base
and the remainder again noted; this process is repeated with each successive
quotient until a zero quotient is obtained.
The sequence of remainder terms obtained provide s the· coefficient s of the
number expressed in the number system
of the chosen base and these are written
from left to right in the reverse.sequence
from that in. which .they are_ obtained.
Thus, to convert the decimal number 321
to its binary representation the following
computations are made:
321 -:- 2 = 160 + remainder of 1
160 -:- 2 = 80 + remainder of 0
80 -:- 2 = 40 + remainder of 0
40 ..;. -2 = 20 + remainder of 0
20 -:- 2::t 10 + remainder of 0
10 -:- 2 =
5 + remainder of 0
5 -:- 2 =
2 + remainder of 1
1 + remainder of 0
2 +2 =
1 ~2 =
0 + remainder of 1 .
and, the number is written as:
(321)10 = (101000001)2
To convert a binary number to its
decimal representation successive divisions by 1010 (=decimal 10).
For example:
101000001-:-1010 = 100000 with remainder of 1

The remainders obtained are the binary numbers 11, 10, and 1 which represent the decimal integers 3, 2, and 1.
Hence, (101000001)2 = (321)10.
To express decimal fractions in their
equivalent binary representations successive multiplication by 2 is used to
generate the coefficients. The integer
generated (a 0 or 1) represents the correspondingbinary digits. Using only the
. resulting decimal fraction the process is
continued to the number of positions required or until a zero fractional part is
obtained which indicate s all furthe r binary digits should be zero. Thus, to convert the decimal fraction . 875 to its binary representation, the following computations a're' performed:
. 875 x 2 = 1. 75
• 75 x 2 = 1. 5
.5
x2=1.0
and, hence, the binary representation of
the number (. 875) 10 is (. 11100 · · • )2'
or more simply; (. 111)2.
It ~aybe necessary to round the binary
fractIon to the amount of accuracy desired
s.ince not all terminating decimal fractl.ons can b~ represented by terminating
bInary fractions ..
He~Cl.de c-ima 1

If the 'base sixteen is chosen for representation of a number, it is said to be
expres'::sed in the hexadecimal number
system. The number set used is 0, 1, 2,
: . . 9, A, B, . . • F. Thus, the digIts 0, 1, . • • 9, correspond directly
with the decimal system while the alphabetic characters A through F correspond
with the decimal characters 10 through
15 respectively.

APPENDIX

Thedcecimal to hexadecimal conversion of an integral number can be effected
by dividing successivelyby 16 (in the dec ~imal system) until a quotient of 0 is obtained. The remaInders, expressed in
hexadecimal notation and written in the
r.everse sequence from that obtained,
produce the desired hexadecimal representation. For example, the decimal 736
conversion would be:

736+ 16

=46

with a remainder of 0
(decimal)

46";':' 16

=2

2 -:- 16

=0

with a remainder of 14
(decimal)
with a remainder of 2
(decimal)

The remainders when expressed in
hexadecimal notation and arranged in
proper sequence yield, 2, E, and O. Thus,
(736) I 0 = (2EO) 16·
The conversion from hexadecimalto - binary is particularly simple. Since
4
(10)16 equals 2 , the conversion is carried
out· simply by replacing the hexadecimal
digits with their binary equivalents expressed as four-digit binary numbers.
For example, to convert the hexadecimal 2EO, replace the 0 with 0000, E
with 1110, and 2 with 0010 and obtain
101110 0000, omitting the zeros at the
extreme left.
Conversely, to convert
from binary to hexadecimal, arrange the
binary digits irito groups of four, beginning at the binary point. Fill in any zeros
necessary at the left. Then replace each
group of binary digits with the appropriate
hexadecimal character.
Thus, the hexadecimal numbering system furnishes a convenient form for handling a large binary representation.
Moduli
In certain sections of this Manual of
Operations, reference is made to num-

55

bers reduced to various moduli. To reduce a negative number to a given modulus, the number is first made positive by
successive additions of the modulus until a positive integer is obtained, after
which the computation proceeds as that
for a positive number.
To reduce a positive number to a given
modulus, the number is divided by the
modulus and a remainder term obtained.
The number at the given modulus is equal
to this remainder. Thus,
12 modulo 10
o modulo 2
17 modulo 16
-1 modulo 16

=2
=0
=1
= 15

modulo 16
= 15 10 or F 16

When evaluating algebraic expression
involving moduli reductions, the quantities inside the parenthesis should be reduced to the indicated modulus before being combined with the remaining terms.
Thus, the expression [(W -1)mod B +

9

which occurs in several instruction descriptions has the following evaluations:
W

o
1
2
3
4

5

6
7
B

9

fW-l)mod B +

B
1

2
3
4
5
6
7
B
1

~

TABLE OF POWERS OF 2

2n

n

2-n

1
24
8

0
1
2
3

1.0
005
0.25
0.125

16
32
64

4
56
7

0.062 .5
0.031 25
0.015 625
00007812 5

128

256 8 017003 906
512 9 0.001 953
1 024 10 0.000 976
2 048 11 0.000 488

25
125
562 .5
281 ~5

4
8
16
32

096
192
384
768

l2 00000 244 140
13 0.000 122 070
14 00 000 061 035
-15 0.000 030 517

625
312 5
156 25
578 125

65
131
262
524

536
072
144
288

16 0 0000 01'5
17 0.000 00.7
18 00 000003
19 OoDOO 001"

789
394
697
348

258
629
814
907

0625
531 25
265 625
632 812 5

1 048576 20 0.000 000 953 674316 406 25
2 097 152 21 0.000 000 476 837 158 203 125

4 194 304 22 OeOOO 000 238 418 579 101 562 5
8 388 608 23 0 000 000 119 209 289 550 781 25
0

16
3.3
67
134
268
536
1 073
2 147

777
554
108
217

435456
870 912
741 824
483 648

4 294 967
8 589 934
l7 179 869
34 359 738
68
137
274
549

719
438
877
755

216
432
864
728

476
953
906
813

296
592
184
368

604
802
901
450

644
322
161
580

775
387
193
596

390
695
847
923

625
312 5
656 25
828 125

28 0.000 000 003 725
29 OcOOO 000 001 862
30 0 000 000 000 931
31 00 000 000 000 465

290
645
322
661

298
149
574
287

461
230
615
307

914
957
478
739

062
031
515
257

5
25
625
812 5

32 0.000 000 006 232830
33 OcOOO 000 000 116415
34 00 000 000 000 058 207
35 0 000 000 000 029 103

643
321
660
830

653
826
913
456

869
934
467
733

628
814
401
703

906
453
226
613

25
125
562 5
281 25

915 228
957 614
978 807
989403

366
183
091
545

851
425
712
856

806
903
951
475

640 625
320 312 5
660-156 25
830 078125

24
25
26
27

0 0 000 000059
0 000 000 029
0.000 000 014
0.000 000 007
0

0

0

736 36 0 0 000 000
472 37 0.,000 000
944 38 0 000 000
888 39 0 000000
0
0

000
000
000
000

014
007
003
001

551
275
637
818

56

APPENDIX C
HEXADECIMAL-DECIMAL INTEGER CONVERSION TABLE

0263
0279
0295
0311
0327
0343
0359
0375
0391
0407
0423
0439
0455
0471
0487
0503

0264
0280
0296
0312
0328
0344
0360
0376
0392
0408
0424
0440
0456
0472
0488
0504

0265
0281
0297
0313
0329
0345
0361
037'7
0393
0409
0425
0441
0457
0473
0489
0505

0266
0282
0298
0314
0330
0346
0362
0378
0394
0410
0426
0442
0458
0474
0490
0506

0267
0283
0299
0315
0331
034'7
0363
0379
0395
0411
0427
0443
0459
0475
0491
0507

0268
0284
0300
0316
0332
0348
0364
0380
0396
0412
0428
0444
0460
0476
0492
0508

0269
0285
0301
0317
0333
0349
0365
0381
0397
0413
0429
0445
0461
0477
0493
0509

0270
0286
0302
0318
0334
0350
0366
0382
0398
0414
0430
0446
0462
0478
0494
0510

02'71
0287
0303
0319
0335
0351
036"{
0383
0399
041.5
0431
0447
0463
0479
0495
0511

0518
0534
0550
0566
0582
0598
0614
'0630
0646
0662
0678
0694
0710
0726
0'742
0758

0519
0535
0551
0567
0583
0599
0615
0631
0647
0663
0619
0695
0711
072'7
0743
0'(59

0520
0536
0552
0568
0584
0600
0616
,0632
0648
0664
0680.
0696
0712
0,(28
0744
0'(60

0521
0537
0553
0569
0585
0601
0617
0633
0649
0665
0681
0697
0713
0729
0745
0761

0522
0538
0554
0570
0586
0602
0618
0634
0650
0666
0682
0698
0714
0730

0523
0539
0555
0571
0587
0603
0619
0635'
0651
0667
0683
0699
0715
0731
0~(46
0747
0762 0763

0524
0540
0556
0572
0588
0604
0620
0636
0652
0668
0684
0700
0716
0'732
0748
0764

0525 0526 052r(
05 41 0542 0543
0557
9558 0559
r
05 (3 0574 05''(5
0589 0590 0591
0605 0606 0607
0621 0622 0623
0637 0638 0639
0653 0654 0655
0669 0670 0671
0685 0686 0687
0'701 0702 0703
0717 0718 0719
0733 0734 0735
0749 0750 0751
0765 0766 0767

0,{73 0774 0775
0'(89 0'(90 0791
0805 0806 080'(
0821 0822 0823
083'1 0838 0839
0853 0854 0855
0869 0870 0871
0885 0886 088'(
0901 0902 0903
091'( 0918 0919
0933 0934 0935
09 49 0950 05151
0965 0966 0967
0981 0982 0983
0997 0998 0999
1013 1014 1015

0'l'{6

0777'
0'793
0809
0825
0841
0857
0873
0889
0905
0921
0937
0953'
0969
0985
1001
1()I7

OT(8

0'(92
0808
0824
0840
0856
0872
0888
0904
0920
0936
0952
0968
0984
1000
1016

0779
0795
0811
0827
0843
0859
0875
0891
0907
0923
0939·
0955
09'71
0987
1003
1019

0780
0796
0812
0828
0844
0860
0876
08S2
0908
0924
0940
0950
0972
0988
1004
1020

0781
07970813
0829
0845
0861
0877
0893
0909
0925
0941
0957
0973

0515
0531
0547
0563
0519
0595
0611
0627
0643
0659
0675
0691
0,(07
0723
0739·
or{55

0516
0532
0548
0564
0580
0596
0612
0628
0644
0660
0676
0692
0708
0724
0740
0756

0517
0533
0549
0565
0581
0597
0613
0629
0645
0661
0677
0693
0709
0125
0'/41
0757

OTTO

01'71

OT(2

0513
0529
0545
0561

0'(68
0784
0800
08olo
0832
0848
0864
0880
0896
0:112
0928
09 44
os6u
0976
0992
loob

0769
0'(85
0801
081,(
0833
0849
0805
0881
08::17
0913
0929
0945
0961
0977
0993
100)

3eo
3DO
3EO
31,"0

0262
0278
0294
0310
0326
0342
0358
0374
0390
0406
0422
0438,
0454
0470
0486
0502

0514
0530
0546
0562
05'(8
0594
0610
0626
0642
0658
0674
0690
0706
0722
0738
0754

0512'
0528
0544
0560
0576
0592
0608
0624
0640
0656
0672
0688
0704
0720
0736
0752

JAO

0015
0031
0047
0063
0079
0095
0111
0127
0143
0159
01'75
0191
0207
0223
0239
0255

0261
0277
0293
0309
0325
0341
0357
03'73
0389
0405
0421
0437.
04530469
0485
.0501

025'7
0273
0289
0305
0321
03J7
0353 .
0369
0385
0401
0417
0433
0449
0465
0481
0497

3BO

0014
0030
0046
0062
0078
0094
0110
012(i
0142
0158
0174
0190
0206
0222
0238
0254

0260
0276
0292
0308
0324
0340
0356
0372
0388
0404
0420
0436
0452
0468
0484
0500

0256
0272
0288
0304
0320
0336
0352
0368
0384
0400
0416
0432
0448
0464
0480
0496

300
310
320
330
340
350
360
370
380
390

OQ13
0029
0045
0061
0077
0093
q109
0125
0141
0157
0173
0189
0205
0221
0237
0253

0259
0275
0291
0307
0323
0339
0355
0371
0387
0403
0419
0435
0451
0467
0483
0499

100
110
120
130
140
150
160
170
180
190
lAO
lEO
lCO
IDO

2FO

0012
0028
0044
0060
0076·
0092
0108
0124
0140
0156
0172
0188
0204
0220
0236
02,52

0258
0274
0290
0306
0322
0338
0354
03'70
0386
0402
0418
0434
0450
0466
0482
0498

0193
0209
'0225
0241

2EO

0011
0027
0043
0059
0075
0091
0107
0123
0139
0155
0171
0181'
0203
6219
0235
0251

0006
0022
0038
0054
0070
0086
0102
0118
0134
0150
0166
0182
0198
0214
0230
0246

0002
0018
0034
0050
0066
0082
0098
0114
0130
0146
0162
0178
019 4
02io
0226
0242

0593
0609
0625
0641
0657
0673
0689
0705
0721
0'(37
0753

0010
0026
0042
0058
0074
0090
0106
0122
0138
015 4
0170
018
0202
0218
0234
0250

0005
0021
0037
0053
0069
0085
0101
0117
0133
0149
0165
0181
0197
0213
0229
0245

0001
0017
0033
0049
0065
0081
0097
0113
0129
0145
0161

05'1'7

0088
0104
0120
0136
0152
0168
0184
0200
0216
0232
0248

0009
0025
0041
0057
0073
'0089
0105
0121
0137
0153
0169
0185
0201
0217
0233
0249

0004
0020
0036
0052
0068
0084
0100
0116
0132
0148
0164
0180
0196
0212
0228
0244

0000
0016
0032
0048
0064
0080
0096
0112
0128
0144
0160
0176
0192
0208
0224
0240

200
210
22'0
230
240
250
260
2,(0
280
290
2A0
2BO
2CO
2DO

0008
0024
0040
0056

0003
0019
0035
0051
0067
0083
0099
0115:
0131
0147
0163
0179
0195
Q211
022'7
0243

000
010
02:0
030
040
050
060
070
080
090
CAO
OBO
OCO
ODO
OEO
OFO

lEO

000'7
0023
0039
0055
0071
'0087
0103
0119
0135
0151
0167
0183
0199
0215
0231
0247

6

2

.1FO

9

5

1

01T{

8

4

0

3

0786 0787 0'(88
0802 0803 0804
0818 0819 0820
0834 0835 0836
0850 0851 0852
0866 0867 0868
0882 0883 0884
0898 0899 0900
0914 0915 0916
0930 0931 0932
0946 0947 0948
0962 0963 0964
osn8 0919 0980
0994 . 0995 0996
10.l.0 1011 .L012

'(

00r(2

57

A

0'794
0810
0826
0842
0858
0874
0890
0906
0922
0938
0954
0970
0986
1002
1018

B

C

D

E

0782
0798
0814
0830
0846
0862
0878
0894
0910
0926
0942
0958
0974
098~ 0990
1005 1006
1021 1022

F

0783
0'799
0815
0831
0847
0863
08(9

0895
0911
0927
0943
0959
0975
0991
100'(
1023

APPENDIX C
HEXADECIM4-L-DECIMAL INTEGER CONVERSION
0
1~00

lno
420
430
440
1~50

460
4'70
480
490
4AO
4BO
4~0

4DO
4EO
4FO
500
510
520

1021~ 1025
1040 1041
lC5u 1057
1072 1073
1086 1089
1104 1105
1120 1,121
1136 1137
1152 l153
I1G8 1169
1184 l1S5
1.200 1201
1216 12l'(
1232 1233
1248 1249
1264 1265

1280
1296
1312
1328
1344
1360

530
540
550
560 13i'6
5'70 1392
580 1408
590 1424
5AO 14)+0
5.J30 1456
5CO I1H2
5DO 1488
5EO 1504
5FO ·1520

DOo
610
620
630
540
650
660
670
680
690
bAO

cBO

Geo

ODO
6EO
0FO
(00
'710
'(20
730
,(40
750
760
770
r80

790
'fAO
7BO
'(CO
'(DO
'TEO

T£I'O

1

1281
129'(
1313
1329
1345
1361
13T{

1393
1409
1425
Ih~-1

145'1'
1473
1489
1505
1521

2

1026
1042
1058
1074
1090
11Ub

1122
1138
1154
1170
1186
1202
121.8

1234
1250
1266
1..232

1298
1314
1330
1346
1362
Ij'{8
1394
1410
1426
1442
J. h58
1474
1490
1506
1522

3

4

1027
1043
1059
1075
1091
110'7
1123
1139
1155
1171
1187
1203
1219
1235
1251
1267

1028
1044
1060
1076
1092
1108
1124
1156
1172
1188
1204
1220
1236
1252
1268

1029 1030 1031 1032
1045 1046 1047 1048
1061 1062 1063 1064
10T( 1078 1079 1080
1093 1094 1095 1096
1109 1110 1111 1112
1125 1126 1127 1128
llla 1142 1143 1144
1157 1158 1159 1160
11'73 1174 1175 1176
1189 1190 1191 1192
1205 1206 1207 1208
1221 1222 1223 1224
1237 1238 1239 1240
1253 1254 1255 1256
1269 1270 1271 1272

1283
1299
1315
1331
134'(
1363'
1379
1395
1411
1443
1459
14'75
1491
150'7
1523

1284
1300
1310
1332
1348
1364
1380
1396
1412
1428
1444
1460
1476
1492
1508
1524

1285
1301
1317
1333
1349
1365
1381
1397
1413
1429
1445
1461
1477
1493
1509
1525

142l

I1ho

5

'7

8

A

B

C

D

E

F

1033
1049
1065
1081
1097
1113
1129
1145
1161
1177
1193
1209
1225
1241
1257
1273

1034
1050'
1066
1082
1098
1114
1130
1146
1162
11'78
1194
1210
1226
1242
1258
1274

1035
1051
1067
1083
1099
1115
1131
1147
:L163
1179
1195
1211
1227
12 43
1259
1275

1036
1052
1068
1084
1100
1116
1132
1148
1164,
1180
ll96
1212
1228
1244
1260
1276

1037
1053
1069
1085
1101
I11T
1133
1149
1165
1181
1197
1213
1229
1245
1261

1038
1054
1070
1086
1102

1039
1055
1071

1230
1246
1262
121'7 1278

1103
1119
1135
115.1
1167
1183
1199
1215
1231
1247
1263
1279

9

i118

1134
1150
1166
1182
1198
1~14

108'7

1286
1302
1318
1334
1350
1366
1382
1398
1414
1430
1446
'1462
14'78
1494
1510
1526

1287
1303
1319
1335
1351
1367
1383
1399
1415
1431
144'7
1463
1479
1495
.151l.
152'(

1288
1304
1320
1336
1352
1368
1384
1400
14i6
1432
1448
1464
1480
i 496
1512
1528

1289
1305
1321
133'1
1353
1369
1385
1401
1417
1433
1449
1465
1481
1497
1513
1529

1290
1306
1322
1338
1354
1370
1386
1402
1418
1434
1450
1466
i482
1498
1514
1530

1291
1307
1323
1339
1355
1371
1387
1403
1419
1435
1451
1467
1483
' 1499
1515
1531

1292
1308
1324
1340
1356
1372
1388
1404
1420
1436
1452
1468
1484
1500
1516
1532

1293
1309
1325
1341
1357
1373
1389
1405
1421
1437
1453
1469
1485
1501
1517
1533

1294
1310
1326
1342
1358
1374
1390
1406
1422
1438
1454
1470
1486
1502
1518
1534

1295
1311
1327
1343
1359
1375
1391
1407
1423
1439
1455
1471
1487
1503
·15:1,9
1535

1542
1558
1574
1590
1606
1622
1638
1654
1670
1686
1702
1718
1734
171~9 1750
1'765 1766
1781 1782

1543
1559
1575
1591
1607
1623
1639
1655
1671
1687
1703
1719
1735
1751
1767
1783

1544
1560
1576
1592
1608
1624
1640
1656
1672
1688
1704
1720
1736
1752
1768
1784

1545
1561
1577
1593
1625
1641
1657
1673
1689
1705
1721
1737
1753
1769
1785

1546
1562
1578
1594
1610
1626
1642
1658
1674
1690
1706
1722
1738
1754
1770
1786

1547
1563
1579
1595
1611
1627
1643
1659
1675
1691
1707
1723
1739
175-5
1771
1787

1548
1564
1580
1596
1612
1628
1644
1660
1676
1692
1708
1724
1740
1756
1772
1788

1549
1565
1581
1597
1613
1629
1645
1661
1677
1693
1709
1725
1741
1757
1773
1789

1550
1566
1582
1598
1614
1630
1646
. 1662
1678
1694
1710
1726
1742
1758
1774
1790

1551
1567
1583
1599
1615
1631
1647
1663
16'79
1695
1711
1727
1743
1759
1775
1791

1798
1814
1830
1846
1862
'1878
189 4
1910
1926
1942
1958
1974
1990
2006
2022
2038

1799
1815
1831
1847
1863
1879
1895
1911
1927
1943
1959
1975
1991
200,"(
2023
2039

1800
1816
1832
1848
1864
1880
1896
1912
1928
1944
1960
1976
1992
2008
2024
2040

1801
1817
1833
1849
1865
1881
1897
1913
1929
1945
1961
1977
1993
2009
2025
2041-

1802
1818
1834
1850
1866
1882
1898
1914
1930
1946
1962
1978
1994
2010
2026
2042

1819
1835
1851
1867
'1883
1899
1915
1931
1947
1963
:1979
1995
2011
2027
2043

1~03

1804
1820
1836
1852
1868
1884
1900
1916
1932
1948
1964
1980
1996
2012
2028
2044

1805
1821
1837
'1853
1869
1885
1901
1917
1933
1949
1965
1981
1997
2013
2029
2045

1806
1822
1838
185 4
1870
1886
1902
1918
1934
1950
1966
1982
1998
2014
2030
2046

1807
1823
1839
1855
1871
1887
1903
1919
1935
1951
1967
1983
1999
2015
2031
2047

1536
1552
1568
1584
1600
1616
l632
1648
1664
1680
1696
1712
1728
1744
1'760
1776

1537
1553
1569
1585
1601
161'7
1633
1649
1665
1681
1697
1,(13
1729
i745
1'{61
177'7

1538
1554
15'70
1586
1602
1618
1634
1650
1666
1682
1698
1114
1730
1746
1'762

1539
1555
15'(1
1587
1603
1619
1635
1651
1667
1683
1699
1715
1731
1747
1763
In8 1779

1540
1556
1572,
1588
1604
1620
1636
1652
1668
1684
1700
1'716
1'732
1748
1764
1780

1541
1557
15'73
1589
1605
1621
1637
1653
1669
1685
1'701
1717
1'733

1'{92
1808
1824
1840
1856
1872
1888
190h
1920
1936
1952
19 68
1984
2000
2010
2032

1'793
1809
1825
1841
1857
1873
1889
1905
1921
1937
1953
1969
1985
2001
2'017
2033

1794
1810
1826
1842
1858
18,{4
1890
1906
1922
1938
195 4
19,(0
1986
2002
2018
2034

1796
1812
1828
1844
1860
1876
1892
1908
1924
1940
1956
1972
1988
2004
2020
2036

1797
1813
1829
1845
1861
1877
1893
19091925
1941
1957
1973
1989
2005
2021
2037

1795
1811
1827
1843
1!?59
1875
1891
1907
1923
1939
1955
1971
1987
2003
2019
2035

b

T~BLE

58

1609

APPENDIX C
HEXADECIMAL-DECIMAL INTEGER CONVERSION TABLE

800
SlO

620
8301
S40
850
860
870
880'
890
SAo
SBO

oeo

SDO
SEO

8:F'0
900
910
920
930
940
950
960
c:/{O
~80

il.20

A30
A40
A50
A60
A70
ABo
A90
MO
ABO
ACO
ADO
AEO

AFO

BOO
BIO
B20
B30
Bho
B50
1360
B10
B80
B90

BAa
BBO

BeO
BOO

BEO
BFO

8

9

2053 2054
2069 2070
2085 . 2086
2101' 2102
2111 2118
2133 2134
2149 2150
2165 2166
2181 2182
2191 2198
2213 2214
' 2229 .2230
2245 2246
2261 2262
2217 2278
2293 2294

2055
2071
2081
2103
2119
2135
2151
2161
2183
2199
2215
2231
2247
2263
2219
2295

.2056
2072
2088
2104
2120
2136
2152
2168
2184
2·200
2216
2232
2248
2264
2280
2296

2309
2325
2341
2351
2313
2389
2405
2421
243'7
2453
2469
2485
2501
2'517
2533
25 49,

2310
2326
2342
2358
2314
2390
2406
2422
2438
2454
247Q
2486
2502
2518
2534
2550

2311
2321
2343
2359
2315
2391
2407
2423
2439
2455
241'1
2487
2503
2519
2535
2551

2565
2581
2597
2613
2629
2645
2661
2677
2693
2709
2725
2741
2'(57
2173
2'788 2789
2804 2805

2566
2582
2598
2614
2630
2646
2662
2678
2694
2'710
2726
2742
2758
2174
2790
2806
2822
2838
2854
28'(0
2886·
2902
2918
2934
2950
2966
2982
2998
3014
3030
3046
3062

1

2

3

4

2048
2064
2080
2096
2112
2128
2144
2160
2176
2192
2208
2224
2240
2256
22'72
2288

2049
2065
2081
2097
2113
2129
2145
2161
217'7
2193
2209
2225
2241
2257
2273

2050
2066
2082
2098
2114
2130
2146
2102

2~89

2194
2210
2226
2242
2258
2214
2290

2051
2067
2083
2099
2115
2131
2141
2163
2119
2.195
2211
222'7
2243
2259
2275
2291

2052
2068
2084
2100
2116
2132
2148
2164
2180
2196
2212
2228
2244
2260
2216
2292

2304
2320
2336
2352
2368
2384
2400
24l.6
2432
2448
2464

2305
2321
2337
2353
2369
2385
2401
2417
2433
2449
2465
2481
2491
2513
2529
2545

2306
2322
2338
2354
2310'
2386
2402
2418
2434
2450
2466
2482
2498
2514
2530
25 46

230:7
2323
2339
2355
2311
2381
2403
2419
2435
2451
246'7
2483
2499
2515
2531
2547

2308
2324
2340
2356
2312
2388
2404
2420
2436
2452
2468
2484
2500
2516
2532
2548

2500
2576
2592
2608
2624
2640
2656
26'(2
2688

2561
25'1'7
2593
2609
2625
2641
2657
2673
2689
2705
2721
2737
2'(53
2{69
2'785
2801

2562
2578
2594
2610
2626
2642
2658

2690
2706
2 (22
2738
2'754
2T70'
2,(86
2802

2563
2579
2595
2611
2627
.2643
2659
26'75
2691
2'70':(
2723
2739
2755
2771
2787
2803

2564
2580
,2596
2612
2628
2644
2660
2676
2692
2'708
2'724
2740
2756
277,2

2818
2834
2850
2866
2882
2890
2914
2930

2819
2835
2851
286'(
2883
2899
2915
2931

2820
2836
2852
2868
2884
2900
2916
2932
2948
2964
2980
299u
. 3012
3028
3044
3060

990
9AO
9BO 2480
9CO 2 496
9DO 2512
9EO ' 2528
9FO 2544
AOO
AI0

7

0

2'l04

2'{20
2736
2J52
2768
2784
2800
2810
2832
2848
2864
2880
2896
2912
2:;28
2941J.
2960,
29(6
2992
30,.)8
3024
3040
3056

281'(
2833
2849
2865
2881
2897
2913
2ji29
291~5

2961
29Tr
2.993
3009
3025
3041
305"(

21,{8

26'7L~

2914.6

2962
2978
299 4
3010
302'0
3042
3058

2~~7

2::;03
2979
2995
3011
3027
30!}3
3059

5

2821
2837
2853
2869
2885
2901
29r(
2933
2949
2965
2981
2991
3013
3029
3045
3061

6

,F

A,

B

2057
2073
2089
2105
2121
2137
2153
2169
2;185
2201
2217
2233
22 49
2265
2281
2291

2058
2014
'2090
2106
2122
2138
2154
2110
2186
2202
2218
2234
2250
2266
2282
2298

2059
2075
2091
2107
'2123
'2139
' 2155
2111
2181
2203
2219
2235
2251
2261
2283
2299

2060
2076
2092
2108
2124
2140
2156
2112
2188
2204
2220
2236
2252
2268
2284
2300

2061
2077
2093
'2109.
2125 .
2141
2157,
2113
2189
2205

2312
2328
2344
2360
2376
2392
2408
2424
2440
2456
2472
2488
2504
2520
2536
2552

2313
2329
2345
2361
2311
2393
2409
2425
2441
2457
2473
2489
2505
2521
2537
,2553

2314
2330
2346
2362
2318
2394
2410
2426
2442
2458
2474
2490
2506
2522
2538
2554

2315
2331
2-341
2363
2319
2395
2411
2427
2443
2459
2475
2491
2507
2523
2539
2555

2316
2332
2348
2364
2380
2396
2412
2428
2444
2460
2476
2492
2508
2524
2540'
2556

2311
2333
2349
2365
2381
2391
2413
2429
2445
2461
2471
2493
2509
2525
2541
2557

2318
2334
2350
2366
2382
2398
2414
2430
2446
2462
2478
2494
2510
2'526
25'42
2558

2319
2335
2351
2361
2383
2399
2415
2431
2447
2463
2419
2495
2511
2521
2543'
2559

2567
2583
2599
2615
2631
2647
2663
2679
2695
2711
2127
2743
2759
2175
2791
2807

2568
2584
2600
2616
2632
2648
2664
2680
2696
2712
2728
2744
2760
2776
2792
2808

'2569
2585
2601
2617
2'633
2649
2665
2681
2697
2713
2'129
2745
2'761
2777
2193
2809

2510
2586
2602
2618
2634
2650
2666
2682
2698
2714
2730
2746
2762
2178
2794
2810

2571
2587
2603
2619
2635
2651
2667
2683'
2699
2715
·2731
2747
2763
2779
2795
2811

2572
2588.
'2604
2620
2636
2652
2668
2684
2700
2716
2732
2"748
2764
2780
2796
2812

2573
2589
2605
2621
2637
2653
2669
2685
2701
2717
2733
2749
2165
2781
2197
2813

2574
2590
2606
2622
2638
2654
2670
2686
2702
2718
2734
2750
2766
2782
2798
2814

2575
2591
2607
262'3
2639
2655
2671
2687
2703
2719
2735
2751· '
2167
2783
2799
2815

2823
2839
2855
2871
2887
2903
2919
2935
2951
296'(
2983
2999
3015
3031
3047
3063

2824
2840
2856
2872
2888
2904
2920
2936
2952
2968
2984
3000
3016
3032
3048
3064

2.825
2841
2857
2813
2889
2905
2921
2937
2953
2969
2985
3001
3017
3033,
3049
3065

2826
2842
2858
2874
2890
2906
2922
2938
295 4
2970
2986
3002
3018
3034
3050
3066

2827
2843
2859
2875
2891
290'7
2923
2939
2955
2971
2987
3003
3019
3035
3051
3067

2828
2844
2860
2876
2892
2908
,2924
2940
2956
2972
2988
3004
3020
3036
3052
3068

2829
2845
2861
2877
2893
2909
2925
2941
2957
2973
2989
3005
3021
3037
3053
3069

2830
2846
2862
2818
2894
2910
2926
2942
2958
2974
2990
3006
3022
3038
3054
30'70

2831
2847
2863
2879
2895
2911
2927
2943
2959
2975
2991
3007
3023
3039
3055
3071

59

C

D

E

2062
2078
2094,
2110
2126
2142
2158
2174
219.0
2206
22,f1 2222 ...
2231 ,2238,
2253 2254
2269 2270
2285. 2286
2301 2302

2063
2079
2095
2111
2127
2143
2159
2175
2191
2201
2223,
2239
2255
2271
2281
2303

APPENDIX C
HEXADECIMAL-DECIMAL INTEGER CONVERSION TABLE

COO
Cl0
C20
C30
C40
C50
c60
c70
c80
C90
CAO

CBO
cco
CDO
CEO
CFO
DOO
D10
D20
D30
, D40
D50
DoO
D70
D80
D90
DAO
DBO
DCO

DDO
DEO
DFO
EOO
E10
E20
E30
E!~O

E50
EoO
K(O

EGO
E')O
EAO
EBO
EGO

EDO
EEO
EFO
):0"00
FLO
F20
F30
F40
F50
FoO
F70
FSO
F';JO

FAO
FEO

Fca
FDa

FEO
FFO

0

1

2

3

4

5

6

30,{2
3088
3104
3120
3136
3152
3168
3184
3200
3216
3232
3248
3204
3280
3296
3312

3073
3089
3105
3121
31J(
3153
3109
3185
,3201
3217
3233
3249
3265
3281
329'(
3313

3074
3090
3106
3122
3138
3154
31,{0
3186
3202
3218
3234
3250
3266
3282
3298
3314

3075
3091
3107
3123
3139
3155
3171
3187
3203
3219
3235
3251
32S(
3283
3299
3315

30,,(6
3092
3108
3124
3140
3156
3172
3188
3204
3220
3236
3252
3268
3284
330b
3316

3077
3093
3109
3125
3141
'3157
3173
3189
3205
3221
3237
3253
3269
3285
3301
331'7

30"(8
3094
3110
3J.26
3142
3158
3174
3190
3206
3222
3238
3254
3270
3286,
3302
3318

3079 3080
3095 3096
3111 3112
3127 3128
3143 3144
3159 3160
3175 31~(6
3191 3192
320'( 3208
3223 3224
3239 ' 3240
3255 '3256
3271 3272
3287 3288
3303 3304
3319 3320

3081
,3097
3113
3129
3145
3161

3328
3344
3360
3J(o
3392
3408
3424
3440
3450
34(2

3329 3330 3331 3332
3345 3346 334'( 3348
33O.L 3362 3363 3364
33(T 33'(8 3379 3380
3393 3394 3395 3396
3409 3410 3411 3412
3425 3426 3427 3428
3441 3442 3443 3444
3457 3458 3h59 3460
34(3 34'('4 34'l5 3476
3489 3h90 3491 3492
3505 3506 350'( 3508
3521 3522 3523 3521~
353 (' 3538 3539 3540
3553 355 4 3555 355,-5
3569 35'(0 3571 3572

3333
3349
3365
3381
3397
3413
3429
3411-5
3461

3334
3350
3366
3382
3398
,3414
3430
3446
3462
3478
3494
3510
3526
3542
3558
3574

3335
3351
3367
3383
3399
3415
3431
3447
3463
3479
3495
3511
3527
3543
3559
3575

3336
3352
3368
3384
3416
3432
3448
3464
3480
3496
3512
3528
35 44
3560
3576

3331
3353
3369
3385
3401
3417
3433
3449
3465
3481
3497
3513
3529
3545
3561
3577

3588
36Q4
3620
3036
3052
3668
3684
3(00
3{lG
3732
3'(1+8
3764
3780
3796
3812
3828

3590
3606
3622
3638
3654
36(0
3686
3702
3'(18
3734
3750
3766
3782
3798
3B13 3814
3829 3830

3591
3607
3623
3639
3655
36,(1
3687
3,,(03
3719
3735
3(51
3767
3783
3799
3815
3831

3592
3608
3624
3640
3656
3672
3688
3704
3720
3736
3752
3768
3784
3800
3816
3832

3844
3860
38'(6
38;;2
3908

3845 3846 384'(
3861 3862 3863
33't( 3B78 38'rS)
3893 3394 3[\95
3909 3910 3911
3S!25 3926 392'(
391~i. 3942
39L~3
3S!5'( 3956 3959
39'(11- J";;:3"1?
;;1,)
;;1,)
3;;0S; 3 )90 3;)91

31~88

3504
3520
3536
3552
3508
3504
3600
3616
3u32
3011-8
3u64
3uGo
3696
3'(12
3(23
3741~

3(00
3776
3(92
3808
3824

3585
3601
301'{
3633

,36 49
35~)5

3681
3691
3'(13
3{2S)

3T 45

3761
37'77
3(93
3809
3825

35U6
3602
301<3
3034
3050
3566
3002
3698
3'714
3730
3(46
3'(02
3'(78

3794
3810
3826

3587
3603
361)
3035
365.;.
366'(
3083
3699
3'(15
3i'31

3(4'(
3753
3779
3795
3811
382'(

3840 3841 3842 38J~3
3850 3857 3858 385>
38'(2 38 (3 30'(4 30'(5
3888 3889 3890 389J.
3904 3905 3900 390'(
392c 3921 3)22 3923
3936 393 3938 3939
3952 3:;53 3954 3955
3')u8 3909 39'(0 3)(1
39b4 3985 3986 39D'(
4000 4()01 4002 L~003
4016 4017 4018 40i9
4032 4033 4034 4035
4011-8 4049 LI-O)O 4051
4064 4065 4066 406'(
4080 4081 4082 4083
r

(

3)~~ l~

3940
3;ijG

3/(2
3980
l~()Ol1-

1~020

3l~Tr
3!~93

3509
3525
3541
3557
35'{3
3589
3605
3621
363'(
3653
3669
3685
3701
3'(17
3{33
3(49
Jy65
3(31
3797

40',-':i,

11-036 4-u3i'
1~052
4053
1t 068 4009
4081+ 4005

8

31~00

3848
3864
3880
38:;6
3912
3928
3944
3:)60
3)'76

'D

B

C

3082
3098
3114
3130
3146
3162
3178
3194
3210
3226
3242
3258
3274
3290
3306
3322

3083
3099
3115
3131
3147
3163
3179
3195
3211
3227
3243
3259
3275
3291
3307
3323

3084
3100
3116
3132
3148
'3164
3180
3196
3212
3228
3244
3260
3276
3292
3308
3324

3085
3101
3117
3133
3149
3165
3181
3197
3213
3229,
3245
3261
3277
3293
3309
3325

3086
3102
3118
3134
3150
3166
3182
3198
3214
3230
3246
3262
3278
3294
3310
3326

3087
3103
3119
3135
3151
3167 '
3183
3199
3215
3231
3247
3263
3279
3295
3311
3327

3338
3354
3370
3386
3402
3418
3434
3450
3466
3498
3514
3530
3546
3562
3578

3339
3355
3371
3387
3403
3419
3435
3451
3467
3483
3499
3515
3531
3547
3563
3579

3340
3356
3372
3388
3404
3420
3436
3452
3468
3484
3500
3516
3532
3548
3564
3580

, 3341
3357
3373
3389 '
3405
3421
3437
3453
3469
3485
3501
3517
3533
3549
3565
3581

3342
3358
3374
3390
3406
3422
3438
3454
3470
3486
3502
3518
3534
3550
3566
3582

3343
3359
3375
3391
3407
3423
3439
3455
3471
3487
3503
3519
3535
3551
3567
3583

3593 3594
3609 3610
3625 ,3626
3641 3642
365'( 3658
3673 3674
3689 3690
3705 3706
3721 3722
3737 3738
1753 3754
3769 3770
3785 3786
3801, 3802
3817 3818
3833 3834

3595
3611
3627
3643
3659
3675
3691
3707
3723
3739
3755
3771
3787
3803
3819
3835

3596
3612
3628
3644
3660
3676
3692
3708
3724
3740
3756
3772
3788
3804
3820
3836

3597
3613
3629
3645
3661
3677
3693
3709
3725
3741
3757
3773
3789
3805
3821
3837

3598
3614
3630
.3646
3662
3678
3694
3710
3726
3742
3758
3774
3790
3806
3822
3838

3599
3615
3631
3647
3663
3679
3695
3711
3727
3743
3759
3775
3791
3807
3823
3839

3851
3867
3883
3899
3915
3931

3852
3868
3884
3900
3916
3932
3948
3964,
3980
3996
4012
4028
4044
4060

9

31T7

3193
3209
3225
3241
3257
3273
3289
3305
3321

3849
3865
3881
3897
3913
3929
3945
3901
3Strf
39~)2
3993
l~oo6
l~OD(
4008 4009
11022 1~0;~3 ~,()<::4, 4025
4038 4039 L~O!~O 404i
405 L1- h055 11-056 4057
1.~0(0
407i 4o{2 40'73
1.~066
408'( h008 11-029
1

1~U05

7

A

3J.~82

3850
3866
3882
3898
3914
3930
3946
3962
39'(8
3S:94
4010
4026
4042
4058
40,{4

3941

3963
' 3979
3995
LI-Ol1
4027
4043
4059
4075
h090 4091

E

3854
3870
3886
3902
3918
3934
3950
3966
3982
3998
4014
1~a29 4030
4045 4046
4061 4062
40'l~) 4,07'7 40'78
4092 4,093 4091~
3853
3869
3885
3901
3917
3933
3949
3965
3981
3997
4013

F

3855
3871
3887
3903,
3919
3935
3951
3967
3983
3999
4015
4031
4047
4063
40'79
4095

HEXADECIMAL-DECIMAL FRACTION CONVERSION TABLE
(N'16)

.000
.001
.002
.003
.004
~005

.006
.007
.008
.009

.0000 0000
.0041 8937

.0083 126e
.00c4
.0106
.0147
.0189
.Olca
.020c
' .024d

9ba5
24dd
ae14
374b
c083
49ba
d2fl

.010
.011
.012
.013
.014
.015
.016
.017
.018
.019

.028f 5c28
.02dO e560
.0353
.0395
.03d7
.0418
.045a
.049b
.04dd

.020
.021
.022
.023
.024
.025
.026
.027
.028
.029

.051e b851
.0560 4189
.05al cacO '
.05e3 53f7
.0624 dd2f
.0666 6666
.06a7 ef9d
.06e9 78d4
.072b 020c
.076c 8b43

.030
.031
.032
.033
.034
.035
.036
.037
.038
.039

.07ae 147a
.07ef 9db2

.040
.041
.042
.043
.044
.045
.046
.047
.048
.049

.Oa3d
.Oa7e
.0acO
.Ob02
.ob43
.ob85
.obc6
.Oc08
.Oc 4 9
.Oc8b

.0312 6e97
f7ce
8106
Oa3d
9374
lcac
a5e3
2fla

(lo~3N)"

.0000 0000
.0000'10c6
.0000 218d
.0000 3254
.0000 431b

.0000 53e2
.0000
.0000
.0000
.0000

64a9
7570
8637
96fe

.0000
.0000
.0000
.0000
.0000
.0000
.0001
.0001
.0001
.0001

a7c5
b88c
c953

dala
eael
fba8
Oc6f
1d36
2dfd
3ec4

.0001 4f8b
.0001 6052
.0001 7119

cccc
5604
df3b
6872
fla9
.Oe14 7ael

.0003
.0003
:0003
.0003
.0003
.0003
.0003
.0003
.0003
.0003

46dc
57a3
6800
7931
89f8
9abf
ab86
bc4d
cdl4
dddb

(lo-6N)lf
.0000 00d6
.0000 OOdb
.0000 OOdf
.0000 00e3
.0000 00e7
.0000 OOee
.0000 Oafa
.0000 00r4
.0000 001'9
.0000 oord

eea2
ff69
102f
20f6
31bd
4284
534b
6412
74d9
85aO

.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000

0101
0105
OlGa
alOe
0112
0117
Olib
011f
0124
0128

.0000 0022
.0000 0026
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000

002a
002f
0033
0037
003c
0040
0044
0049
004d
0051

.060
.061
.062
.063
.064
.065
.066
.067
.068
.0.69

.1168 72bO
.lla9 fbe7

.0003
.0003
.0004
.0004
.0004
.0004
.0004
.0004
.0004
.0004

.070
.071
.072
.073
.074
.075
.076
.077
.078
.079

.11eb 851e
.122d Oe56
.126e 978d
.12bO 20c4
.12fla9fb
.1333 3333
.137 4 be6a
.13b6 45al
.13f7 ced9
.1439 5810

.0004
.0004
.0004
.0004
.0004
.0004
.0004
.0005
.0005
.0005

9667
a72e
b7f5
c8bc
d983
ea4a
fbll
Obd8
1c9f
2d66

.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000

012c
0130
0135
0139
013d
0142
0146
014a
014r
0153

.080
.081
.082
.083
.084
.085

.089

.147a
.14bc
.14fd
.153f
.1581
.15c2
.1604
.1645
.1687
.16c8

e147
6a7e
f3b6
7ced
0624
Bf5c
1893
alca
2b02
b439

.0005
.0005
.0005
.0005
.0005
.0005
.0005
.0005
.0005
• 0005:

3e2d
4er4
5fbb
7082
8149
9210
a2d7
b3ge
c465
d52c

.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.OOCO
.0000

0157
015b
0160
0164
0168
016d
0171
0175
0179
017e

.090
.091
.092
.093
, .094
.095
.096
.097
.098
.099

.170a
.174b
.178d
.17ee
.1810
.1851
.1893
.18d4
.1916
.1958

3d70
eCa7
4fdf
d916

.0005
.0005
.0006
.0006

e5f3
f6ba
0780
1847

.0000
.0000
.0000
.0000
.0000
.0000
.0000

0000
0004
0008
,000c
0011
0015
0019

.0000 001e

.0001
.0001
.0001
.0001
.0001
.0001

92a7
a36e
b435
c4fc
d5c3
e68a

.0001
.0002
.0831 26e9 .0002
.0872 b020 .0002
.08b4 3958, .0002
.08f'5 c28f .0002
.0937 4bc6 .0002
.0978 d4fd .0002
.09ba 5e35 .0002
.09fb e76c .0002

f751
0817
18de
298.5
3a6c
4b33
5bfa
6cc1
7d88
8e4f

.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000

.0002
.0002
.0002
.0002
.0002
.0002
.0003
.0003
.0003
.0003

9f16
afdd
cOa4
dl6b
e232
f2f9
03eO
1487
254e
3615

.0000 OOab
.0000 OObO
.0000 0004
.0000 oOb8
.0000 OObe
.0000 OOe1
.OOOOOOc5
.0000 00e9
.0000 OOce
.0000 00d2

70a3
f9db
8312
Oc49
9581
1eb8
a7ef
3126
ba5e
4395

.Occc
.0dOe
.od4r
.Od91
.Odd2

(io-3N)ur

.050
.051
.052
.053
.054
.055
.056
.057
.058
.059

.0000
.0000
.0000
.0000
.0000
.0000
.0000

.0000 0055
.0000 005a
.0000 005e
.0000 0062
.0000 0067
.0000 006b
.0000 006f
.0000 0073
.0000 0078
.0000'007c

.0001 81eO

(N,.)

00- 4 1\1)16

0080
0085
0089
008d
0092
0096
009a
00ge.
00a3
00a7'

.oB6
.087

.088

61

.Oe56 0418
.Oe97 8d4f
.Oed9 1687
.Ofla 9fbe
.Of5e
.Of9d
.Ofdf
.1020
.1062
.10a3

28f5
b22d
3b64
c49b
4dd2
d70a

.10e5 6041
.1l26 e978

62L~d

.0006 290e

eb85
74be
fdf3
8720.
1062

.0006
.0006
.0006
.0006
.co06

39d5
4age
5b63
6e2a
7ef1

0182

olBt::

018b
01Sf
0193
0198
01ge
.oeoo 01aO
.0000 01a4
.oeoo 01a9

APPENDIX D
HEXADECIMAL-DECIMAL FRACTION CONVERSION TABLE
(IO-~N)/6

N'6

(lo-6N),.

NJf

(IO-3N)16
.0009 d495
.0009 e55e
.0009 f623
.000a 06e9
.000a 17b0
.00Da 2877
.000a 393e
.00Da 4a05
.ooca 5aee
.ooaa 6b93

CI 0-4N)'6
.0000 0284
.0000 0288 .
.0000 028e
.0000 0291
.0000 0295
.0000 0299
.0000 02ge
.0000 02a2
.0000 02a6
.0000 02a.a
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000

02af
02b3
02b7 .
02be
02eO
02e4
02e8
02cd
02dl
02d5'

.100 .1999 9999
.101 . • 19db 22dO
.102 .lale ac08
.103 .la5e 353f
.104 .la9f·be76
.105 .1ael 41ae
.106 .lb22 dOe5
.107 .lb64 5ale
.108 .lba5 .e353
.109 .lbe7 6e8b

.0006
.0006
.0006
.0006
.0006
.0006
.0006
.0007
.0007
.0007

8db8
ge7f
af46
eOOd
dOd4
e19b
f262
0329
13fO
24b7

.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
•. 0000
.0000

01ad
01b1
01b6
01ba
01be
01e2
01e7
01eb
01ef
01d4

.150
.151
.152
.153
.154
.155
.156
.157
.158
.159

.2666
• 2007
.26e9
.272b
.276e
.27ae
.27ef
.2831
.2872
.28b4

6666
ef9d
78d4
020e
8b43
147a
9db2
26e9
b020
3958

.110
.111
.112
.113
.114
.115
.116
.117
.118
.119

.lc28
.le6a
.1eae
.1ced
.ld2f
.ld70
.ldb2

f5e2
7ef9
0831
9168
la9f
a3d7
2dOe
.lM3 b645
.le35 3f7e
.le76 e8b4

.0007
.0007
.0007
• 0007
.0007
.0007
.0007
.0007
.0007
.0007

357e
4645
570e
67d3
789a
8961
9a28
aaef
bbb6
ce7d

.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000

01d8
Ol.dc
01e1
01e5
01e9
01ed
01f2
011'6
01fa
01ff

.160
.161
.162
.163
.164
.165
.166
.167
.168
.169

.28f5
.2937
.2978
.29ba;
.29fb
.2a3d
.2a7e
.2acO
.2b02
.2b43

e28f
4be6
d4fd
5e35
e76e
70a3
f9db
8312
Oc49
9581

.000a
.00Ca
.00Da
.00Ga
.0COa
.00Ca
.00Ga
.0oCa
.000b
~OOOb

7e5a
8d21
9de8
aeaf
bf76
d03d
e104
fleb
0292
1359

.120
.121
.122
.123
.124
.125
.126
.127
.128
.129

.leb8 51eb
.lef9 db22
.lf3b 645a
.lf7e ed91
.1fbe 76e8
.2000 0000
.2041 8937
.2083 126e
.·20e4.9ba5
.2106 24dd

.0007
.0007
.0007
.0008
.0008
.0008
.0008
.0008
.0008
.0008

o.d44
eeOb
fed2
Of98
205f
3126
41ed
52b4
637b
7442

.0000
.0000
.0000
.0000
.0000
.0000
.. 0000
.0000
.0000
.0000

0203
0207
020b
0210
0214
0218
021d
0221
0225
022a

.170 .2b85
.171 .2be6
.172 .2e08
.173 .2e49
.174 .2e8b
.175 .2eee
.176 .2dOe
.177 .2d4f
.178 .• 2d91
.179 .2dd2

leb8
a7ef
3126
ba5e
4395
ecce
5604
df'3b
6872
fla9

.000b
.000b
.000b
.000b
.000b
.000b
.000b
.000b
.000b
.000b

2420
34e7
45ae
5675
673e
7803
88ea
9991
aa58
bblf

.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000
.0000

02da
02de
02e2
02e7
02eb
02ef
02f3
02f8
02fe
0300.

.130
.131
.132
.133
.134
.135
.136
.137
.138
.139

.2147 ae14
.2189 374b
.21ea c083
.220e 49ba
.224d d2f'1
.228f 5e28
.22dO e560
.2312'6e97
.2353 f7ee
.2395 8106

.0008
.0008
.0008
.0008
.0008
.0008
.0008
.0008
.0009
.0009

8509
95d
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