Bosch CAN Users Guide

• 1. About this Document
  • 1.1 Change Control
    • 1.1.1 Current Status
    • 1.1.2 Change History
  • 1.2 Conventions
  • 1.3 Scope
  • 1.4 References
  • 1.5 Terms and Abbreviations
• 2. Functional Description
  • 2.1 Functional Overview
  • 2.2 Block Diagram
  • 2.3 Operating Modes
    • 2.3.1 Software Initialisation
    • 2.3.2 CAN Message Transfer
    • 2.3.3 Disabled Automatic Retransmission
    • 2.3.4 Test Mode
    • 2.3.5 Silent Mode
    • 2.3.6 Loop Back Mode
    • 2.3.7 Loop Back combined with Silent Mode
    • 2.3.8 Basic Mode
    • 2.3.9 Software control of Pin CAN_TX
• 3. Programmer’s Model
  • 3.1 Hardware Reset Description
  • 3.2 CAN Protocol Related Registers
    • 3.2.1 CAN Control Register (addresses 0x01 & 0x00)
    • 3.2.2 Status Register (addresses 0x03 & 0x02)
      • 3.2.2.1 Status Interrupts
    • 3.2.3 Error Counter (addresses 0x05 & 0x04)
    • 3.2.4 Bit Timing Register (addresses 0x07 & 0x06)
    • 3.2.5 Test Register (addresses 0x0B & 0x0A)
    • 3.2.6 BRP Extension Register (addresses 0x0D & 0x0C)
  • 3.3 Message Interface Register Sets
    • 3.3.1 IFx Command Request Registers
    • 3.3.2 IFx Command Mask Registers
      • 3.3.2.1 Direction = Write
      • 3.3.2.2 Direction = Read
    • 3.3.3 IFx Message Buffer Registers
      • 3.3.3.1 IFx Mask Registers
      • 3.3.3.2 IFx Arbitration Registers
      • 3.3.3.3 IFx Message Control Registers
      • 3.3.3.4 IFx Data A and Data B Registers
    • 3.3.4 Message Object in the Message Memory
  • 3.4 Message Handler Registers
    • 3.4.1 Interrupt Register (addresses 0x09 & 0x08)
    • 3.4.2 Transmission Request Registers
    • 3.4.3 New Data Registers
    • 3.4.4 Interrupt Pending Registers
    • 3.4.5 Message Valid 1 Register
• 4. CAN Application
  • 4.1 Management of Message Objects
  • 4.2 Message Handler State Machine
    • 4.2.1 Data Transfer from / to Message RAM
    • 4.2.2 Transmission of Messages
    • 4.2.3 Acceptance Filtering of Received Messages
      • 4.2.3.1 Reception of Data Frame
      • 4.2.3.2 Reception of Remote Frame
    • 4.2.4 Receive / Transmit Priority
  • 4.3 Configuration of a Transmit Object
  • 4.4 Updating a Transmit Object
  • 4.5 Configuration of a Receive Object
  • 4.6 Handling of Received Messages
  • 4.7 Configuration of a FIFO Buffer
  • 4.8 Reception of Messages with FIFO Buffers
    • 4.8.1 Reading from a FIFO Buffer
  • 4.9 Handling of Interrupts
  • 4.10 Configuration of the Bit Timing
    • 4.10.1 Bit Time and Bit Rate
    • 4.10.2 Propagation Time Segment
    • 4.10.3 Phase Buffer Segments and Synchronisation
    • 4.10.4 Oscillator Tolerance Range
    • 4.10.5 Configuration of the CAN Protocol Controller
    • 4.10.6 Calculation of the Bit Timing Parameters
      • 4.10.6.1 Example for Bit Timing at high Baudrate
      • 4.10.6.2 Example for Bit Timing at low Baudrate
• 5. CPU Interface
  • 5.1 Customer Interface
  • 5.2 Timing of the WAIT output signal
  • 5.3 Interrupt Timing
• 6. Appendix
  • 6.1 List of Figures