COMPAL LA 4481P
User Manual:
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Page Count: 46
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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
Cover Sheet
Custom
146Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Schematics Document
LA-4481P REV:0.4
2008-09-04
Mobile AMD S1G2 CPU with ATI RS780M(NB) & SB700(SB) core logic
Compal confidential
Calypso 13.3"
http://mycomp.su/x/
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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
Block Diagram
Custom
246Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Compal Confidential
Thermal Sensor
ADM1032ARMZ
Fan conn
AMD S1G2 CPU
638-PIN uFCPGA 638
Mini-Card*1
16X16
ATI RS780M
Power On/Off CKT.
LPC BUS
DC/DC Interface CKT.
Page 5, 6, 7, 8
Page 10, 11, 12, 13, 14
Page 9, 10
Page 20, 21, 22, 23, 24
Page 25
Page 25
SATA ODD Connector
Page 26
Page 20
RTC CKT.
ATI SB700
Power OK CKT.
Touch Pad CONN. Int.KBD
KBC
Realtek
8111C(GLAN)
RJ45/11 CONN
PCI-E BUS*3
BANK 0, 1, 2, 3
LED
DDR2-SO-DIMM X2
SATA HDD Connector
SATA Master-1
SATA Slave
A-Link Express II
4X PCI-E
Page 27
Page 27
SATA Master-2
Page 32
e-SATA Combo
Consumer AMD 13.3" UMA - Sally
Page 18
Express Card
Page 27
WLAN
Page 29 Page 30
Page 32
Page 32
P35
Page 34
Page 34
Page 36
CRT
LVDS Panel
Interface
Page 17
Codec_IDT9271B7
Audio CKT AMP & Audio Jack
TPA6017A2
USB conn x2
USB2.0 X12
Azalia (HDA I/F)
BT Conn
Mini-Card WLAN
Page 7
Page 5
HDMI
Page 19
Clock Generator
SLG8SP626VTR
Page 16
72QFN
ENE KB926
Page 35
P35
P35
Page 13
Side-Port DDR2 SDRAM
512Mbits(32Mbx16)-64MB
DDR2 400MHz
Hyper Transport Link
Page 26
SPI ROM
SST25VF080B
Page 33
Page 18
USB WebCam
Consumer IR SPI
page 32
FingerPrinter AES1610
USBx1
DDR2 800MHz 1.8V
Dual Channel
Accelerometer
ST LIS302DLTR
Page 31
Page 28
e-SATA Combo
Page 25
SATA Multi-Bay Connector
SATA Slave
Page 30
CardReader
RTS5158E-GR_LQFP48
Page 28
CardReader Socket
Page 28
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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
Notes List
Custom
346Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Voltage Rails
O MEANS ON X MEANS OFF
O
O
X
+0.9V
S3
+3VS
X
X
+3VALW
+5VS
S1
O
+2.5VS
+CPU_CORE
OO
OO
X
XX
+VCCP
power
plane
O
O
O
O
O
X
S5 S4/ Battery only
XX X
+B
State
+1.5VS
+1.8V
S5 S4/AC & Battery
don't exist
S5 S4/AC
+5VALW
S0
O
O
Symbol Note :
: means Digital Ground
: means Analog Ground
@ : means just reserve , no build
DEBUG@ : means just reserve for debug.
SERIAL SENSOR
SMB_EC_CK2
SOURCE
KB926
INVERTER BATT EEPROM
THERMAL
SODIMM CLK CHIP
SMBUS Control Table
MINI CARD
SMB_EC_DA2
SMB_EC_CK1
SMB_EC_DA1
KB926
LCD
ADM1032
X
XXX
XX
XX
X
X
XX
X
VV
V
1 0 1 0 0 1 0 0A4
I2C / SMBUS ADDRESSING
1 0 1 0 0 0 0 0
D2
A0
CLOCK GENERATOR (EXT.)
HEX
DDR SO-DIMM 1
ADDRESS
DDR SO-DIMM 0
1 1 0 1 0 0 1 0
DEVICE
+VGA_CORE
+1.8VS
+0.9VGA
+1.2VS
HEX
98H
HEX
16H
EC SM Bus1 address
Device
A0H
1010 000X b
Address Address
EC SM Bus2 address
Device
1001 100X b0001 011X b
Smart Battery
24C16
CPU
9AH
1001 101X b
ADI1032-2 CPU
L
Layout Notes
Slot 2I / II
CPU &
V
I2C_CLK
I2C_DATA
RS780M XXX X X X X
VV
SCL0
SDA0 SB700
XXX X X
HDMI
X
X
X
DDC_CLK0
DDC_DATA0 RS780M
XXX X X
DDC_CLK1
DDC_DATA1 RS780M
XXX X X
XXX V
XXX X
XX
XXXX
SDA3
X
SB700
SCL3
XX
XXXX
SDA1 SB700
SCL1
XXXXV
XX
XXXX
SDA2
X
SB700
SCL2
XXXX
UMA@ : means for RS780M.
Please see VGA@ as no install. No support RX780M.
11/14 update
G-Sensor
X
X
X
X
X
X
V
X
X
: Question Area Mark.(Wait check)
USB-4 Camera
USB-5 WLAN
USB-6 Bluetooth
USB-8 MiniCard(WWAN/TV)
USB-1 Right side
USB-7 Finger Printer
USB-3 Dock
USB-9 Express card
USB-10 X
USB-2 Left side(with ESATA)
USB-0 Right side
USB-11 X
USB assignment:
PCIe-2 X
PCIe-1 TV tuner/WWAN/Robeson
PCIe assignment:
PCIe-3 WLAN
PCIe-4 New Card
PCIe-5 Card reader
PCIe-6 GLAN (Marvell)
http://mycomp.su/x/
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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
Power delivery
Custom
446Monday, September 08, 2008
2007/09/26 2007/09/26
Compal Electronics, Inc.
VIN
AC
DC BATT
B+
INVPWR_B+
B++
B+++
LVDS CON
+3VALW
+5VALW
SB700
+3VAUX_BT
+3VS
Finger printer PC Camera
New card
RS780M
0.3A
79.67mA
300mA
60mA
+1.8V
LAN
+5VS
+VDDA_CODEC
IDT 9271B7
35mA
50mA
1A
+LCDVDD
1.5A
+1.35VS
+5VAMP
10mA
ODD
1.8A
HDD
700mA
CPU
3.7A
DDR2 x2
8 A
LVDS CON
50mA
5.39A5.89A
3.7 X 3=11.1V
1.7A
2A
1.3A0.58A
12.11A
10mA SPI ROM+3VL
+3VL_EC
20mA
2mA CIR+5VL
+3VL_CAP
LEDs
??A Thermal sensor
DDR
+3VS_CLK
SB700
WLAN
CardReader
Audio codec
G-sensor
FAN
HDMI
SB700
LEDs
+1.8VS
3.7A 723.6mA RS780M
Side port RAM
+0.9V
3.7A CPU
DDR2 x2
USB Power
1.3A
B+++ +1.1VS RS780M
+1.2VALW
SB700
8.84A
+1.2V_HT RS780M
+VDDCLK_IO
273mA
CPU
SB700
+1.5VS
WLAN
New card
+2.5VS CPU
http://mycomp.su/x/
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1 1
2 2
3 3
4 4
H_CADIN1
H_CADIN0
H_CADIP3
H_CADIN2
H_CADIP2
H_CADIP1
H_CADIN3
H_CADIP4
H_CADIN5
H_CADIN4
H_CADIP5
H_CADIN6
H_CADIN8
H_CADIN7
H_CADIN9
H_CADIP8
H_CADIP6
H_CADIP7
H_CADIN10
H_CADIP10
H_CADIN11
H_CADIP11
H_CADIP9
H_CADIN13
H_CADIN12
H_CADIP14
H_CADIP12
H_CADIN14
H_CADIP0
H_CADIN15
H_CADIP15
H_CADIP13
H_CADON15
H_CADOP13
H_CADON2
H_CADON3
H_CADON9
H_CADON6
H_CADON0
H_CADOP11
H_CADOP8
H_CADOP6
H_CADON13
H_CADOP1
H_CADOP2
H_CADOP4
H_CADOP5
H_CADON12
H_CADON7
H_CADON5
H_CADON10
H_CADON8
H_CADON4
H_CADON1
H_CADOP12
H_CADOP15
H_CADOP9
H_CADOP10
H_CADOP14
H_CADOP7
H_CADOP3
H_CADOP0
H_CADON14
H_CADON11
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADIP[0..15]
+VLDT_B
+VCC_FAN
H_CADON[0..15] <11>H_CADIN[0..15]<11>
H_CADOP[0..15] <11>
H_CLKIN0<11>
H_CLKIN1<11> H_CLKIP1<11>
H_CTLIN1<11>
H_CLKIP0<11>
H_CTLIP1<11> H_CTLOP1 <11>
H_CLKOP1 <11>
H_CADIP[0..15]<11>
H_CLKOP0 <11>
H_CLKON0 <11>
H_CLKON1 <11>
H_CTLON1 <11>
H_CTLOP0 <11>
H_CTLON0 <11>H_CTLIN0<11> H_CTLIP0<11>
FAN_PWM<34>
+1.2V_HT
+1.2V_HT
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
AMD CPU S1G2 HT I/F
Custom
546Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
250 mil
VLDT=1500mA
PWM Fan Control circuit
Athlon 64 S1
Processor Socket
Near CPU Socket
VLDT CAP.
If VLDT is connected only on one side, one
4.7uF cap should be added to the island
side.
500mA
C4
0.22U_0603_16V4Z
1
2
C1
4.7U_0805_10V4Z
1
2
JP1
ACES_85205-02001
1
1
2
2
GND
3
GND
4
D1
CH751H-40PT_SOD323-2
2 1
C7 4.7U_0805_10V4Z
1 2
S
GD
Q1
SI3456BDV-T1-E3_TSOP6
3
6
2
4 5
1
C3
0.22U_0603_16V4Z
1
2
C8
4.7U_0805_10V4Z
1
2
C5
180P_0402_50V8J
1
2
C2
4.7U_0805_10V4Z
1
2
C9
0.1U_0402_16V4Z
1
2
D2
RLZ5.1B_LL34
@
12
HT LINK
JCPU1A
TYCO_4-1903401-4_AMD
CONN@
VLDT_A3
D4 VLDT_A2
D3 VLDT_A1
D2 VLDT_A0
D1
VLDT_B3 AE5
VLDT_B2 AE4
VLDT_B1 AE3
VLDT_B0 AE2
L0_CADIN_H15
N5
L0_CADIN_L15
P5
L0_CADIN_H14
M3
L0_CADIN_L14
M4
L0_CADIN_H13
L5
L0_CADIN_L13
M5
L0_CADIN_H12
K3
L0_CADIN_L12
K4
L0_CADIN_H11
H3
L0_CADIN_L11
H4
L0_CADIN_H10
G5
L0_CADIN_L10
H5
L0_CADIN_H9
F3
L0_CADIN_L9
F4
L0_CADIN_H8
E5
L0_CADIN_L8
F5
L0_CADIN_H7
N3
L0_CADIN_L7
N2
L0_CADIN_H6
L1
L0_CADIN_L6
M1
L0_CADIN_H5
L3
L0_CADIN_L5
L2
L0_CADIN_H4
J1
L0_CADIN_L4
K1
L0_CADIN_H3
G1
L0_CADIN_L3
H1
L0_CADIN_H2
G3
L0_CADIN_L2
G2
L0_CADIN_H1
E1
L0_CADIN_L1
F1
L0_CADIN_H0
E3
L0_CADIN_L0
E2
L0_CADOUT_H15 T4
L0_CADOUT_L15 T3
L0_CADOUT_H14 V5
L0_CADOUT_L14 U5
L0_CADOUT_H13 V4
L0_CADOUT_L13 V3
L0_CADOUT_H12 Y5
L0_CADOUT_L12 W5
L0_CADOUT_H11 AB5
L0_CADOUT_L11 AA5
L0_CADOUT_H10 AB4
L0_CADOUT_L10 AB3
L0_CADOUT_H9 AD5
L0_CADOUT_L9 AC5
L0_CADOUT_H8 AD4
L0_CADOUT_L8 AD3
L0_CADOUT_H7 T1
L0_CADOUT_L7 R1
L0_CADOUT_H6 U2
L0_CADOUT_L6 U3
L0_CADOUT_H5 V1
L0_CADOUT_L5 U1
L0_CADOUT_H4 W2
L0_CADOUT_L4 W3
L0_CADOUT_H3 AA2
L0_CADOUT_L3 AA3
L0_CADOUT_H2 AB1
L0_CADOUT_L2 AA1
L0_CADOUT_H1 AC2
L0_CADOUT_L1 AC3
L0_CADOUT_H0 AD1
L0_CADOUT_L0 AC1
L0_CLKIN_H1
J5
L0_CLKIN_L1
K5
L0_CLKIN_H0
J3
L0_CLKIN_L0
J2
L0_CTLIN_H1
P3
L0_CTLIN_L1
P4
L0_CTLIN_H0
N1
L0_CTLIN_L0
P1
L0_CLKOUT_H1 Y4
L0_CLKOUT_L1 Y3
L0_CLKOUT_H0 Y1
L0_CLKOUT_L0 W1
L0_CTLOUT_H1 T5
L0_CTLOUT_L1 R5
L0_CTLOUT_H0 R2
L0_CTLOUT_L0 R3
C6
180P_0402_50V8J
1
2
http://mycomp.su/x/
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B
B
C
C
D
D
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E
1 1
2 2
3 3
4 4
+MCH_REF
DDR_B_MA10
DDR_B_MA7
DDR_B_MA1
DDR_B_MA12
DDR_B_MA6
DDR_B_MA11
DDR_B_MA0
DDR_B_MA9
DDR_B_MA15
DDR_B_MA3
DDR_B_MA5
DDR_B_MA8
DDR_B_MA13
DDR_B_MA2
DDR_B_MA4
DDR_CKE1_DIMMB
DDR_B_D0
DDR_CKE0_DIMMB
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS0
DDR_B_DQS#0
DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS3
DDR_B_DQS#3
DDR_A_CLK1
DDR_A_CLK#1
DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CLK1
DDR_B_CLK#1
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS7
VTT_SENSE
DDR_A_CLK0
DDR_A_CLK#0
+MCH_REF
DDR_B_ODT0
DDR_B_ODT1
DDR_A_ODT1
DDR_A_ODT0
DDR_B_CLK#0
DDR_B_CLK0
DDR_B_CLK1
DDR_B_CLK#1DDR_A_CLK#1
DDR_A_CLK#0
DDR_A_CLK0
DDR_A_CLK1
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_B_D28
DDR_B_D16
DDR_B_D22
DDR_B_D19
DDR_B_D9
DDR_B_D50
DDR_B_D35
DDR_B_D46
DDR_B_D5
DDR_B_D37
DDR_B_D26
DDR_B_D3
DDR_B_D8
DDR_B_D29
DDR_B_D14
DDR_B_D7
DDR_B_D59
DDR_B_D51
DDR_B_D10
DDR_B_D17
DDR_B_D44
DDR_B_D41
DDR_B_D38
DDR_B_D47
DDR_B_D63
DDR_B_D32
DDR_B_D20
DDR_B_D52
DDR_B_D30
DDR_B_D53
DDR_B_D40
DDR_B_D27
DDR_B_D45
DDR_B_D55
DDR_B_D56
DDR_B_D11
DDR_B_D48
DDR_B_D39
DDR_B_D1
DDR_B_D42
DDR_B_D36
DDR_B_D2
DDR_B_D58
DDR_B_D33
DDR_B_D62
DDR_B_D31
DDR_B_D21
DDR_B_D54
DDR_B_D24
DDR_B_D15
DDR_B_D60
DDR_B_D12
DDR_B_D49
DDR_B_D43
DDR_B_D18
DDR_B_D61
DDR_B_D34
DDR_B_D4
DDR_B_DM6
DDR_B_DM4
DDR_B_DM2
DDR_B_DM0
DDR_B_DM5
DDR_B_DM3
DDR_B_DM1
DDR_B_DM7 DDR_A_DM6
DDR_A_DM5
DDR_A_DM4
DDR_A_DM3
DDR_A_DM2
DDR_A_DM1
DDR_A_DM0
DDR_A_DM7
DDR_A_D59
DDR_A_D3
DDR_A_D13
DDR_A_D60
DDR_A_D40
DDR_A_D29
DDR_A_D56
DDR_A_D20
DDR_A_D28
DDR_A_D36
DDR_A_D19
DDR_A_D23
DDR_A_D34
DDR_A_D61
DDR_A_D15
DDR_A_D4
DDR_A_D0
DDR_A_D53
DDR_A_D47
DDR_A_D43
DDR_A_D33
DDR_A_D24
DDR_A_D39
DDR_A_D46
DDR_A_D22
DDR_A_D51
DDR_A_D9
DDR_A_D5
DDR_A_D6
DDR_A_D54
DDR_A_D8
DDR_A_D31
DDR_A_D7
DDR_A_D50
DDR_A_D57
DDR_A_D12
DDR_A_D21
DDR_A_D26
DDR_A_D63
DDR_A_D62
DDR_A_D42
DDR_A_D48
DDR_A_D44
DDR_A_D25
DDR_A_D58
DDR_A_D32
DDR_A_D1
DDR_A_D17
DDR_A_D2
DDR_A_D55
DDR_A_D38
DDR_A_D11
DDR_A_D10
DDR_A_D27
DDR_A_D18
DDR_A_D14
DDR_A_D41
DDR_A_D49
DDR_A_D16
DDR_A_D52
DDR_A_D37
DDR_A_D35
DDR_A_D30
DDR_B_D6
DDR_A_D45
DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#
DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2
DDR_A_WE#
DDR_B_D25
DDR_A_CAS#
DDR_A_RAS#
DDR_B_D23
DDR_B_D57
DDR_B_D13
DDR_A_BS#2
DDR_A_BS#1
DDR_A_BS#0
DDR_A_MA15
DDR_A_MA12
DDR_A_MA14
DDR_A_MA13
DDR_A_MA11
DDR_A_MA10
DDR_A_MA6
DDR_A_MA1
DDR_A_MA7
DDR_A_MA2
DDR_A_MA3
DDR_A_MA8
DDR_A_MA5
DDR_A_MA4
DDR_A_MA9
DDR_A_MA0
DDR_B_MA14
DDR_CS1_DIMMA# DDR_CS0_DIMMB#
DDR_CS1_DIMMB#
DDR_CS0_DIMMA#
DDR_CKE1_DIMMB <10>
DDR_CKE0_DIMMB <10>
DDR_CS0_DIMMA#<9> DDR_CS1_DIMMA#<9> DDR_CS0_DIMMB# <10>
DDR_CS1_DIMMB# <10>
DDR_B_D[63..0]<10>
DDR_B_DM[7..0]<10> DDR_A_DM[7..0] <9>
DDR_A_D[63..0] <9>
DDR_B_DQS7<10> DDR_B_DQS#7<10>
DDR_B_DQS6<10>
DDR_B_DQS5<10>
DDR_B_DQS4<10>
DDR_B_DQS3<10>
DDR_B_DQS2<10>
DDR_B_DQS1<10>
DDR_B_DQS0<10>
DDR_B_DQS#6<10>
DDR_B_DQS#5<10>
DDR_B_DQS#4<10>
DDR_B_DQS#3<10>
DDR_B_DQS#2<10>
DDR_B_DQS#1<10>
DDR_B_DQS#0<10>
DDR_A_DQS3 <9>
DDR_A_DQS2 <9>
DDR_A_DQS1 <9>
DDR_A_DQS0 <9>
DDR_A_DQS#3 <9>
DDR_A_DQS#2 <9>
DDR_A_DQS#1 <9>
DDR_A_DQS#0 <9>
DDR_A_DQS4 <9>
DDR_A_DQS#4 <9>
DDR_A_DQS5 <9>
DDR_A_DQS#5 <9>
DDR_A_DQS6 <9>
DDR_A_DQS#6 <9>
DDR_A_DQS7 <9>
DDR_A_DQS#7 <9>
DDR_B_RAS# <10>
DDR_B_CAS# <10>
DDR_B_WE# <10>
DDR_B_BS#0 <10>
DDR_B_BS#1 <10>
DDR_B_BS#2 <10>
DDR_A_RAS#<9> DDR_A_CAS#<9> DDR_A_WE#<9>
DDR_A_BS#0<9> DDR_A_BS#1<9> DDR_A_BS#2<9>
DDR_A_MA[15..0]<9> DDR_B_MA[15..0] <10>
DDR_B_ODT0 <10>
DDR_B_ODT1 <10>
DDR_A_ODT0<9> DDR_A_ODT1<9>
DDR_B_CLK0 <10>
DDR_B_CLK#0 <10>
DDR_B_CLK1 <10>
DDR_B_CLK#1 <10>
DDR_A_CLK0<9>DDR_A_CLK#0<9> DDR_A_CLK1<9>DDR_A_CLK#1<9>
DDR_CKE0_DIMMA<9> DDR_CKE1_DIMMA<9>
+1.8V
+0.9V+0.9V
+1.8V
+1.8V
+1.8V
+1.8V
+3VALW
+5VALW
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
AMD CPU S1G2 DDRII I/F
Custom
646Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
Athlon 64 S1
Processor
Socket
Athlon 64 S1
Processor Socket
Place them close to CPU within 1"
Processor DDR2 Memory Interface
750mA
750mA
0801 add Cap for EMI request
C123
0.1U_0402_16V4Z
@
1 2
T2 PAD
C14
0.1U_0402_16V4Z
1
2
MEM:DATA
JCPU1C
TYCO_4-1903401-4_AMD
CONN@
MB_DATA63
AD11 MB_DATA62
AF11 MB_DATA61
AF14 MB_DATA60
AE14 MB_DATA59
Y11 MB_DATA58
AB11 MB_DATA57
AC12 MB_DATA56
AF13 MB_DATA55
AF15 MB_DATA54
AF16 MB_DATA53
AC18 MB_DATA52
AF19 MB_DATA51
AD14 MB_DATA50
AC14 MB_DATA49
AE18 MB_DATA48
AD18 MB_DATA47
AD20 MB_DATA46
AC20 MB_DATA45
AF23 MB_DATA44
AF24 MB_DATA43
AF20 MB_DATA42
AE20 MB_DATA41
AD22 MB_DATA40
AC22 MB_DATA39
AE25 MB_DATA38
AD26 MB_DATA37
AA25 MB_DATA36
AA26 MB_DATA35
AE24 MB_DATA34
AD24 MB_DATA33
AA23 MB_DATA32
AA24 MB_DATA31
G24 MB_DATA30
G23 MB_DATA29
D26 MB_DATA28
C26 MB_DATA27
G26 MB_DATA26
G25 MB_DATA25
E24 MB_DATA24
E23 MB_DATA23
C24 MB_DATA22
B24 MB_DATA21
C20 MB_DATA20
B20 MB_DATA19
C25 MB_DATA18
D24 MB_DATA17
A21 MB_DATA16
D20 MB_DATA15
D18 MB_DATA14
C18 MB_DATA13
D14 MB_DATA12
C14 MB_DATA11
A20 MB_DATA10
A19 MB_DATA9
A16 MB_DATA8
A15 MB_DATA7
A13 MB_DATA6
D12 MB_DATA5
E11 MB_DATA4
G11 MB_DATA3
B14 MB_DATA2
A14 MB_DATA1
A11 MB_DATA0
C11
MA_DATA63 AA12
MA_DATA62 AB12
MA_DATA61 AA14
MA_DATA60 AB14
MA_DATA59 W11
MA_DATA58 Y12
MA_DATA57 AD13
MA_DATA56 AB13
MA_DATA55 AD15
MA_DATA54 AB15
MA_DATA53 AB17
MA_DATA52 Y17
MA_DATA51 Y14
MA_DATA50 W14
MA_DATA49 W16
MA_DATA48 AD17
MA_DATA47 Y18
MA_DATA46 AD19
MA_DATA45 AD21
MA_DATA44 AB21
MA_DATA43 AB18
MA_DATA42 AA18
MA_DATA41 AA20
MA_DATA40 Y20
MA_DATA39 AA22
MA_DATA38 Y22
MA_DATA37 W21
MA_DATA36 W22
MA_DATA35 AA21
MA_DATA34 AB22
MA_DATA33 AB24
MA_DATA32 Y24
MA_DATA31 H22
MA_DATA30 H20
MA_DATA29 E22
MA_DATA28 E21
MA_DATA27 J19
MA_DATA26 H24
MA_DATA25 F22
MA_DATA24 F20
MA_DATA23 C23
MA_DATA22 B22
MA_DATA21 F18
MA_DATA20 E18
MA_DATA19 E20
MA_DATA18 D22
MA_DATA17 C19
MA_DATA16 G18
MA_DATA15 G17
MA_DATA14 C17
MA_DATA13 F14
MA_DATA12 E14
MA_DATA11 H17
MA_DATA10 E17
MA_DATA9 E15
MA_DATA8 H15
MA_DATA7 E13
MA_DATA6 C13
MA_DATA5 H12
MA_DATA4 H11
MA_DATA3 G14
MA_DATA2 H14
MA_DATA1 F12
MA_DATA0 G12
MB_DM7
AD12 MB_DM6
AC16 MB_DM5
AE22 MB_DM4
AB26 MB_DM3
E25 MB_DM2
A22 MB_DM1
B16 MB_DM0
A12
MB_DQS_H7
AF12
MB_DQS_L7
AE12
MB_DQS_H6
AE16
MB_DQS_L6
AD16
MB_DQS_H5
AF21
MB_DQS_L5
AF22
MB_DQS_H4
AC25
MB_DQS_L4
AC26
MB_DQS_H3
F26
MB_DQS_L3
E26
MB_DQS_H2
A24
MB_DQS_L2
A23
MB_DQS_H1
D16
MB_DQS_L1
C16
MB_DQS_H0
C12
MB_DQS_L0
B12
MA_DM7 Y13
MA_DM6 AB16
MA_DM5 Y19
MA_DM4 AC24
MA_DM3 F24
MA_DM2 E19
MA_DM1 C15
MA_DM0 E12
MA_DQS_H7 W12
MA_DQS_L7 W13
MA_DQS_H6 Y15
MA_DQS_L6 W15
MA_DQS_H5 AB19
MA_DQS_L5 AB20
MA_DQS_H4 AD23
MA_DQS_L4 AC23
MA_DQS_H3 G22
MA_DQS_L3 G21
MA_DQS_H2 C22
MA_DQS_L2 C21
MA_DQS_H1 G16
MA_DQS_L1 G15
MA_DQS_H0 G13
MA_DQS_L0 H13
C124
0.1U_0402_16V4Z
@
1 2
R3 39.2_0402_1%
1 2
C15
1000P_0402_25V8J
1
2
R1
1K_0402_1%
1 2
C13
1.5P_0402_50V9C
1
2
C129
0.1U_0402_16V4Z
@
1 2
R4 39.2_0402_1%
1 2
C10
1.5P_0402_50V9C
1
2
C12
1.5P_0402_50V9C
1
2
T1PAD
MEM:CMD/CTRL/CLK
JCPU1B
TYCO_4-1903401-4_AMD
CONN@
VTT1
D10
VTT2
C10
VTT3
B10
VTT4
AD10
VTT5 W10
VTT6 AC10
VTT7 AB10
VTT8 AA10
VTT9 A10
MA1_ODT1
V19 MA1_ODT0
U21 MA0_ODT1
V22 MA0_ODT0
T19
MB1_ODT0 Y26
MB0_ODT1 W23
MB0_ODT0 W26
RSVD_M2 B18
MB1_CS_L0 U22
MB0_CS_L1 W25
MB0_CS_L0 V26
MA0_CS_L1
U19
MA1_CS_L1
V20 MA1_CS_L0
U20
MA0_CS_L0
T20
MA_ADD15
K19 MA_ADD14
K24 MA_ADD13
V24 MA_ADD12
K20 MA_ADD11
L22 MA_ADD10
R21 MA_ADD9
K22 MA_ADD8
L19 MA_ADD7
L21 MA_ADD6
M24 MA_ADD5
L20 MA_ADD4
M22 MA_ADD3
M19 MA_ADD2
N22 MA_ADD1
M20 MA_ADD0
N21
MA_BANK2
J21 MA_BANK1
R23 MA_BANK0
R20
MA_RAS_L
R19
MA_CAS_L
T22
MA_WE_L
T24
MEMZP
AF10
MEMZN
AE10 VTT_SENSE Y10
MEMVREF W17
MA_CLK_H4
P19
MA_CLK_L4
P20
MA_CLK_H7
Y16
MA_CLK_L7
AA16
MA_CLK_H1
E16
MA_CLK_L1
F16
MA_CLK_H5
N19
MA_CLK_L5
N20
MB_CLK_H4 R26
MB_CLK_L4 R25
MB_CLK_H7 AF18
MB_CLK_L7 AF17
MB_CLK_H1 A17
MB_CLK_L1 A18
MB_CLK_H5 P22
MB_CLK_L5 R22
MA_CKE0
J22
MA_CKE1
J20 MB_CKE0 J25
MB_CKE1 H26
MB_ADD15 J24
MB_ADD14 J23
MB_ADD13 W24
MB_ADD12 L25
MB_ADD11 L26
MB_ADD10 T26
MB_ADD9 K26
MB_ADD8 M26
MB_ADD7 L24
MB_ADD6 N25
MB_ADD5 L23
MB_ADD4 N26
MB_ADD3 N23
MB_ADD2 P26
MB_ADD1 N24
MB_ADD0 P24
MB_BANK2 J26
MB_BANK1 U26
MB_BANK0 R24
MB_RAS_L U25
MB_CAS_L U24
MB_WE_L U23
RSVD_M1
H16
C11
1.5P_0402_50V9C
1
2
R2
1K_0402_1%
1 2
T3PAD
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
THERMDA_CPU
THERMDC_CPU
CPU_DBRDY
CPU_TDO
CPU_TMS
CPU_TCK
CPU_TDI
CPU_TRST#
CPU_DBREQ#
HDT_RST# LDT_RST#
CPU_VDD1_FB_H
CPU_THERMTRIP#_R
VDD_NB_FB_H
CPU_VDD0_FB_L
VDD_NB_FB_LCPU_VDD1_FB_L
VDD_NB_FB_H
VDD_NB_FB_L
CPU_HTREF0
CPU_HTREF1
CPU_TEST25_L_BYPASSCLK_L
CPU_DBRDY
CPU_TMS
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST19_PLLTEST0
CPU_CLKIN_SC_P
CPU_THERMTRIP#_R
LDT_RST#
H_PWRGD_CPU
LDT_STOP#
THERMDA_CPU
LDT_STOP#
THERMDC_CPU
CPU_SID
CPU_SIC
CPU_LDT_REQ#
CPU_CLKIN_SC_N
CPU_VDD0_FB_H
CPU_TDI
CPU_TRST#
CPU_TCK CPU_DBREQ#
CPU_TDO
CPU_SVC
CPU_SVD
CPU_TEST12_SCANSHIFTENB
CPU_TEST20_SCANCLK2
CPU_TEST21_SCANEN
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST29_L_FBCLKOUT_N
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST14_BP0
CPU_TEST15_BP1
CPU_TEST28_L_PLLCHRZ_N
CPU_TEST28_H_PLLCHRZ_P
H_PWRGD_CPU
LDT_RST#
CPU_TEST23_TSTUPD
CPU_MEMHOT#_1.8V
CPU_LDT_REQ#
CPU_TEST27_SINGLECHAIN
CPU_PROCHOT#_1.8
CPU_TEST18_PLLTEST1
CPU_PROCHOT#_1.8
CPU_VDD0_FB_H
CPU_VDD0_FB_L
CPU_VDD1_FB_H
CPU_VDD1_FB_L
CPU_TEST21_SCANEN
CPU_TEST27_SINGLECHAIN
CPU_TEST18_PLLTEST1
CPU_TEST19_PLLTEST0
CPU_TEST15_BP1
CPU_TEST20_SCANCLK2
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTENB
CPU_TEST24_SCANCLK1
CPU_TEST14_BP0
CPU_SVD
CPU_SVC
CPU_SID
CPU_SIC
SB_PWRGD <21,34,43>
CPU_SVD <43>
CPU_SVC <43>
H_PWRGD_CPU<20>
LDT_RST#<20>
LDT_STOP#<12,20>
VDD_NB_FB_H <43>
VDD_NB_FB_L <43>
CPU_VDD0_FB_H<43> CPU_VDD0_FB_L<43>
CPU_VDD1_FB_H<43> CPU_VDD1_FB_L<43>
CLK_CPU_BCLK<16>
CLK_CPU_BCLK#<16>
CPU_LDT_REQ# <12,20>
H_THERMTRIP# <21>
EN0 <37,39>
H_PROCHOT# <20>
SMB_EC_CK1 <33,34,35,37>
SMB_EC_DA1 <33,34,35,37>
H_THERMTRIP#_EC <34>
SMB_EC_CK2 <34>
SMB_EC_DA2 <34>
+3VS
+1.8V
+3VS
+1.8V
+1.2V_HT
+2.5VDDA
+2.5VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+CPU_CORE_NB
+1.8V
+1.8V
+CPU_CORE_1
+CPU_CORE_0
+1.8V
+1.8V
+3VS
+1.8V
+1.8V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
AMD CPU S1G2 CTRL
Custom
746Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
2200p change to
1000p for ADT7421
Address:100_1101
HDT Connector
NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY.
Address:100_1100
+1.8V sense no support
0718 Silego -- 216 ohm
Place close to CPU wihtin 1.5"
VDDA=300mA
as short as possible
route as differential
testpoint under package
A:Need to re-Link "SGN00000200"
Close to CPU
Close to CPU
9/20 SP020016900
FDV301N, the Vgs is:
min = 0.65V
Typ = 0.85V
Max = 1.5V
EC is PU to 5VALW
2.09V for Gate
0.215mA
0605 change value
0605 change power rail to solve +3vs leakage
R45 300_0402_5%@
12
Q14B
2N7002DW-7-F_SOT363-6
@
3
5
4
C20 3900P_0402_50V7K
1 2
T9PAD
R246 0_0402_5%@
1 2
C23 0.1U_0402_16V4Z@
1 2
R26
300_0402_5%
1 2
U1
ADM1032ARMZ-2REEL_MSOP8
VDD
1
ALERT# 6
THERM#
4GND 5
D+
2
D-
3
SCLK 8
SDATA 7
T16PAD
R18 10_0402_5%
1 2
T15PAD
R16 44.2_0402_1%
1 2
T11 PAD
R37220_0402_5%@12
L1
FBM_L11_201209_300L_0805
1 2
T8PAD
C24
0.1U_0402_16V4Z
@
1
2
R46 300_0402_5%@
12
C27
2200P_0402_50V7K
1 2
R47
300_0402_5%
1 2
C26
0.1U_0402_16V4Z
1
2
R11 300_0402_5%
1 2
R27
20K_0402_5%@
12
T6 PAD
R5 10K_0402_5%
1 2
R32 300_0402_5%@
1 2
R14 1K_0402_5%
1 2
R13
300_0402_5%@
12
R25 0_0402_5%
1 2
T7PAD
R29
2.2K_0402_5%
12
C28
0.01U_0402_25V4Z
@
1
2
R44 300_0402_5%@
12
T13 PAD
R24 10_0402_5%
1 2
R7 0_0402_5%@
1 2
T10PAD
C19
0.22U_0603_16V4Z
1
2
R19 10_0402_5%
1 2
C18
3300P_0402_50V7K
1
2
R42 300_0402_5%@
12
SAMTEC_ASP-68200-07
JP2
@
2
4
6
8
10
12
14
16
18
20
22
2423
21
19
17
15
13
11
9
7
5
3
1
26
R17 44.2_0402_1%
1 2
R34 300_0402_5%@
12
C21 3900P_0402_50V7K
1 2
R12
169_0402_1%
12
R23 10_0402_5%
1 2
R20 10_0402_5%
1 2
R28
34.8K_0402_1%~N@
12
R35 300_0402_5%
12
R39220_0402_5%@12
R40300_0402_5%
12
R22 10_0402_5%
1 2
C22
0.01U_0402_25V4Z
@
1
2
R21
300_0402_5%
1 2
T4PAD
C25
0.01U_0402_25V4Z
@
1
2
R41 300_0402_5%@
12
T5PAD
U2
NC7SZ08P5X_NL_SC70-5@
B2
A1
Y
4
P5
G
3
R38220_0402_5%@12
T12PAD T14PAD
JCPU1D
TYCO_4-1903401-4_AMD
CONN@
VDDA1
F8
VDDA2
F9
RESET_L
B7
PWROK
A7
LDTSTOP_L
F10
SIC
AF4
SID
AF5
HT_REF1
P6 HT_REF0
R6
VDD0_FB_H
F6
VDD0_FB_L
E6 VDDIO_FB_H W9
VDDIO_FB_L Y9
THERMTRIP_L AF6
PROCHOT_L AC7
RSVD2
A5
LDTREQ_L
C6
SVC A6
SVD A4
RSVD6 C5
RSVD4
B5
RSVD1
A3
CLKIN_H
A9
CLKIN_L
A8
DBRDY
G10
TMS
AA9
TCK
AC9
TRST_L
AD9
TDI
AF9
DBREQ_L E10
TDO AE9
TEST25_H
E9
TEST25_L
E8
TEST19
G9 TEST18
H10
RSVD8 AA7
TEST9
C2
TEST17 D7
TEST16 E7
TEST15 F7
TEST14 C7
TEST12
AC8
TEST7 C3
TEST6
AA6
THERMDC W7
THERMDA W8
VDD1_FB_H
Y6
VDD1_FB_L
AB6
TEST29_H C9
TEST29_L C8
TEST24
AE7
TEST23
AD7
TEST22
AE8
TEST21
AB8
TEST20
AF7
TEST28_H J7
TEST28_L H8
TEST27
AF8
ALERT_L
AE6
TEST10 K8
TEST8 C4
RSVD3
B3
RSVD5
C1
VDDNB_FB_H H6
VDDNB_FB_L G6
RSVD7 D5
KEY2 W18
MEMHOT_L AA8
RSVD10 H18
RSVD9 H19
KEY1 M11
Q14A
2N7002DW-7-F_SOT363-6@
61
2
+
C16
100U_D2_10VM@
1
2
R6 300_0402_5%
1 2
E
B
C
Q2
MMBT3904_NL_SOT23-3
2
3 1
R31
300_0402_5%
1 2
R9 0_0402_5%
1 2
R15 1K_0402_5%
1 2
R30
2.2K_0402_5%
12
R33 300_0402_5%
1 2
R8 0_0402_5%
1 2
R10 10K_0402_5%@12
C174.7U_0805_10V4Z
1
2
R36220_0402_5%@12
R43 300_0402_5%@
12
E
B
C
Q3
MMBT3904_NL_SOT23-3
@
2
3 1
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+0.9V
+CPU_CORE_0
+CPU_CORE_0
+CPU_CORE_0
+1.8V
+1.8V
+1.8V
+1.8V +1.8V
+0.9V
+0.9V
+CPU_CORE_NB
+1.8V
+1.8V
+CPU_CORE_1
+CPU_CORE_1
+CPU_CORE_1
+CPU_CORE_NB
+CPU_CORE_1+CPU_CORE_0
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
AMD CPU S1G2 PWR & GND
Custom
846Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Between CPU Socket and DIMM
180PF Qt'y follow the distance between
CPU socket and DIMM0. <2.5inch>
Under CPU Socket
Athlon 64 S1
Processor Socket
Near CPU Socket
VTT decoupling.
VDD(+CPU_CORE) decoupling.
VDDIO decoupling. +CPU_CORE_NB decoupling.
C: Change to NBO CAP
C: Change to NBO CAP
Under CPU Socket
Near CPU Socket Right side.
Near CPU Socket Left side.
Near Power Supply
Athlon 64 S1
Processor Socket
18000mA 18000mA
3000mA
2000mA
C35
22U_0805_6.3V6M
1
2
C33
22U_0805_6.3V6M
1
2
C51
22U_0805_6.3V6M
1
2
C43
180P_0402_50V8J
1
2
C44
0.22U_0603_16V4Z
1
2
C74
180P_0402_50V8J
1
2
C87
4.7U_0805_10V4Z
1
2
C75
4.7U_0805_10V4Z
1
2
C50
22U_0805_6.3V6M
1
2
C42
0.01U_0402_25V4Z
1
2
C52
0.22U_0603_16V4Z
1
2
JCPU1E
TYCO_4-1903401-4_AMD
CONN@
VDD1_25 AC4
VDD1_26 AD2
VDD0_1
G4
VDD0_2
H2
VDD0_3
J9
VDD0_4
J11
VDD0_5
J13
VDD0_7
K6
VDD0_8
K10
VDD0_9
K12
VDD0_10
K14
VDD0_11
L4
VDD0_12
L7
VDD0_13
L9
VDD0_14
L11
VDD0_15
L13
VDD0_17
M2
VDD0_18
M6
VDD0_19
M8
VDD0_20
M10
VDD0_21
N7
VDD0_22
N9
VDD0_23
N11
VDD1_1 P8
VDD1_2 P10
VDD1_3 R4
VDD1_4 R7
VDD1_5 R9
VDD1_6 R11
VDD1_7 T2
VDD1_8 T6
VDD1_9 T8
VDD1_10 T10
VDD1_11 T12
VDD1_12 T14
VDD1_13 U7
VDD1_14 U9
VDD1_15 U11
VDD1_16 U13
VDD1_18 V6
VDD1_19 V8
VDD1_20 V10
VDD1_21 V12
VDD1_22 V14
VDD1_23 W4
VDD1_24 Y2
VDD0_6
J15
VDDNB_1
K16
VDD0_16
L15
VDDNB_2
M16
VDDNB_3
P16
VDDNB_4
T16
VDD1_17 U15
VDDNB_5
V16
VDDIO1
H25
VDDIO2
J17
VDDIO3
K18
VDDIO4
K21
VDDIO5
K23
VDDIO6
K25
VDDIO7
L17
VDDIO8
M18
VDDIO9
M21
VDDIO10
M23
VDDIO11
M25
VDDIO12
N17 VDDIO13 P18
VDDIO14 P21
VDDIO15 P23
VDDIO16 P25
VDDIO17 R17
VDDIO18 T18
VDDIO19 T21
VDDIO20 T23
VDDIO21 T25
VDDIO22 U17
VDDIO23 V18
VDDIO24 V21
VDDIO25 V23
VDDIO26 V25
VDDIO27 Y25
C45
0.01U_0402_25V4Z
1
2
C71
180P_0402_50V8J
1
2
+
C32
330U_X_2VM_R6M
1
2
C38
22U_0805_6.3V6M
1
2
C70
0.01U_0402_25V4Z
1
2
C47
22U_0805_6.3V6M
1
2
C37
22U_0805_6.3V6M
1
2
C84
4.7U_0805_10V4Z
1
2
C57
0.22U_0603_16V4Z
1
2
C46
180P_0402_50V8J
1
2
C39
22U_0805_6.3V6M
1
2
C53
0.22U_0603_16V4Z
1
2
C41
0.22U_0603_16V4Z
1
2
+
C30
330U_X_2VM_R6M
1
2
C54
180P_0402_50V8J
1
2
+
C56
220U_Y_4VM
1
2
C36
22U_0805_6.3V6M
1
2
C81
180P_0402_50V8J
1
2
C63
0.22U_0603_16V4Z
1
2
C85
4.7U_0805_10V4Z
1
2
C64
0.22U_0603_16V4Z
1
2
C82
180P_0402_50V8J
1
2
JCPU1F
TYCO_4-1903401-4_AMD
CONN@
VSS1
AA4
VSS2
AA11
VSS3
AA13
VSS4
AA15
VSS5
AA17
VSS6
AA19
VSS7
AB2
VSS8
AB7
VSS9
AB9
VSS10
AB23
VSS11
AB25
VSS12
AC11
VSS13
AC13
VSS14
AC15
VSS15
AC17
VSS16
AC19
VSS17
AC21
VSS18
AD6
VSS19
AD8
VSS20
AD25
VSS21
AE11
VSS22
AE13
VSS23
AE15
VSS24
AE17
VSS25
AE19
VSS26
AE21
VSS27
AE23
VSS28
B4
VSS29
B6
VSS30
B8
VSS31
B9
VSS32
B11
VSS33
B13
VSS34
B15
VSS35
B17
VSS36
B19
VSS37
B21
VSS38
B23
VSS39
B25
VSS40
D6
VSS41
D8
VSS42
D9
VSS43
D11
VSS44
D13
VSS45
D15
VSS46
D17
VSS47
D19
VSS48
D21
VSS49
D23
VSS50
D25
VSS51
E4
VSS52
F2
VSS53
F11
VSS54
F13
VSS55
F15
VSS56
F17
VSS57
F19
VSS58
F21
VSS59
F23
VSS60
F25
VSS61
H7
VSS62
H9
VSS63
H21
VSS64
H23
VSS65
J4
VSS66 J6
VSS67 J8
VSS68 J10
VSS69 J12
VSS70 J14
VSS71 J16
VSS72 J18
VSS73 K2
VSS74 K7
VSS75 K9
VSS76 K11
VSS77 K13
VSS78 K15
VSS79 K17
VSS80 L6
VSS81 L8
VSS82 L10
VSS83 L12
VSS84 L14
VSS85 L16
VSS86 L18
VSS87 M7
VSS88 M9
VSS89 AC6
VSS90 M17
VSS91 N4
VSS92 N8
VSS93 N10
VSS94 N16
VSS95 N18
VSS96 P2
VSS97 P7
VSS98 P9
VSS99 P11
VSS100 P17
VSS101 R8
VSS102 R10
VSS103 R16
VSS104 R18
VSS105 T7
VSS106 T9
VSS107 T11
VSS108 T13
VSS109 T15
VSS110 T17
VSS111 U4
VSS112 U6
VSS113 U8
VSS114 U10
VSS115 U12
VSS116 U14
VSS117 U16
VSS118 U18
VSS119 V2
VSS120 V7
VSS121 V9
VSS122 V11
VSS123 V13
VSS124 V15
VSS125 V17
VSS126 W6
VSS127 Y21
VSS128 Y23
VSS129 N6
C79
1000P_0402_25V8J
1
2
C40
22U_0805_6.3V6M
1
2
C48
22U_0805_6.3V6M
1
2
C62
4.7U_0805_10V4Z
1
2
C68
180P_0402_50V8J
1
2
+
C31
330U_X_2VM_R6M
1
2
C61
4.7U_0805_10V4Z
1
2
C59
0.22U_0603_16V4Z
1
2
+
C83
220U_Y_4VM
@
1
2
C65
1000P_0402_25V8J
1
2
C60
0.22U_0603_16V4Z
1
2
C49
22U_0805_6.3V6M
@
1
2
C58
0.22U_0603_16V4Z
1
2
C76
4.7U_0805_10V4Z
1
2
C67
180P_0402_50V8J
1
2
C69
0.01U_0402_25V4Z
1
2
C72
180P_0402_50V8J
1
2
C55
180P_0402_50V8J
1
2
C80
1000P_0402_25V8J
1
2
C78
0.22U_0603_16V4Z
1
2
C86
4.7U_0805_10V4Z
1
2
C34
22U_0805_6.3V6M
1
2
C73
180P_0402_50V8J
1
2
C77
0.22U_0603_16V4Z
1
2
C66
1000P_0402_25V8J
1
2
+
C29
330U_X_2VM_R6M
1
2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_CKE1_DIMMA
+V_DDR_MCH_REF
DDR_A_MA3
DDR_A_BS#0
DDR_A_RAS#
DDR_CS1_DIMMA#
DDR_CKE0_DIMMA
DDR_A_ODT1
DDR_A_WE#
DDR_A_D4
DDR_A_CAS# DDR_A_ODT0
DDR_CS0_DIMMA#
DDR_CKE1_DIMMA
DDR_A_D29
DDR_A_D30
DDR_A_D35
DDR_A_D26
DDR_A_D38
DDR_A_BS#0
DDR_A_D28
DDR_A_D34
DDR_A_D36
DDR_A_D33
DDR_A_D31
DDR_A_D32
DDR_A_D27
DDR_A_D53
DDR_A_D46
DDR_A_D43
DDR_A_D48
DDR_A_D41
DDR_A_D44
DDR_A_D50
DDR_A_D45
DDR_A_D49
DDR_A_D37
DDR_A_D55
DDR_A_D39
DDR_A_D51
DDR_A_D40
DDR_A_D47
DDR_A_D42
DDR_A_D63
DDR_A_D54
DDR_A_D6
DDR_A_D14
DDR_A_D52
DDR_A_D3
DDR_A_D59
DDR_A_D58
DDR_A_D9
DDR_A_D61
DDR_A_D60
DDR_A_D57
DDR_A_D7
DDR_A_D8
DDR_A_D56
DDR_A_D5
DDR_A_D24
DDR_A_D23
DDR_A_D12
DDR_A_D15
DDR_A_D21
DDR_A_BS#1
DDR_A_D22
DDR_A_D16 DDR_A_D20
DDR_A_BS#2
DDR_A_D10
DDR_A_D13
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D11
DDR_A_DM5
DDR_A_MA11
DDR_A_DM6
DDR_A_DM4
DDR_A_D0
DDR_A_DM7
DDR_A_D62
DDR_A_DM1
DDR_A_DM0
DDR_A_MA4
DDR_A_DM2
DDR_A_D25
DDR_A_D1
DDR_A_DM3
DDR_A_D2
DDR_A_MA8
DDR_A_MA12
DDR_A_MA14
DDR_A_MA9
DDR_A_MA10
DDR_A_DQS#0
DDR_A_MA13
DDR_A_MA1 DDR_A_MA0
DDR_A_MA2
DDR_A_MA7
DDR_A_MA15
DDR_A_MA3
DDR_A_MA5
DDR_A_MA6
DDR_A_DQS2
DDR_A_DQS6
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS#6
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS#2
DDR_A_DQS7
DDR_A_DQS#4
DDR_A_DQS#7
DDR_A_DQS#5
DDR_A_DQS#1 DDR_A_MA4
DDR_A_MA11
DDR_A_MA12
DDR_A_MA5
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
+V_DDR_MCH_REF
DDR_A_MA15
DDR_A_BS#2
DDR_CKE0_DIMMA
DDR_A_MA7
DDR_A_MA6
DDR_A_MA14
DDR_A_BS#1
DDR_A_MA0
DDR_A_MA2
DDR_A_MA13
DDR_A_ODT0
DDR_CS0_DIMMA#
DDR_A_RAS#
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA1
DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
DDR_A_ODT1
DDR_A_CLK0 <6>
DDR_A_CLK#0 <6>
DDR_CKE0_DIMMA<6>
DDR_A_BS#2<6>
DDR_A_BS#0<6> DDR_A_WE#<6>
DDR_A_CAS#<6> DDR_CS1_DIMMA#<6>
DDR_A_ODT1<6>
DDR_A_CLK1 <6>
DDR_A_CLK#1 <6>
DDR_CS0_DIMMA# <6>
DDR_A_ODT0 <6>
DDR_A_RAS# <6>
DDR_A_BS#1 <6>
DDR_CKE1_DIMMA <6>
DDR_A_MA[0..15] <6>
DDR_A_D[0..63] <6>
DDR_A_DQS[0..7] <6>
DDR_A_DM[0..7] <6>
DDR_A_DQS#[0..7] <6>
SMB_CK_DAT0<10,16,21,31> SMB_CK_CLK0<10,16,21,31>
+V_DDR_MCH_REF <10>
+1.8V+1.8V
+3VS
+1.8V
+1.8V
+0.9V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
DDRII SO-DIMM 0
Custom
946Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Cross between +1.8V and +0.9V power plan
4.5A 2A
C95 0.1U_0402_16V4Z
1 2
C101 0.1U_0402_16V4Z
1 2
C93 0.1U_0402_16V4Z
1 2
C90 0.1U_0402_16V4Z
1 2
RP5
47_0804_8P4R_5%
18 27 36 45
R49
1K_0402_1%
1 2
C89 0.1U_0402_16V4Z
1 2
C103 0.1U_0402_16V4Z
1 2
RP6
47_0804_8P4R_5%
18 27 36 45
C92 0.1U_0402_16V4Z
1 2
C99 0.1U_0402_16V4Z
1 2
JDIMM1
TYCO_292527-4
CONN@
VREF
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DQS0#
11
DQS0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
VSS
41
DQ16
43
DQ17
45
VSS
47
DQS2#
49
DQS2
51
VSS
53
DQ18
55
DQ19
57
VSS
59
DQ24
61
DQ25
63
VSS
65
DM3
67
NC
69
VSS
71
DQ26
73
DQ27
75
VSS
77
CKE0
79
VDD
81
NC
83
BA2
85
VDD
87
A12
89
A9
91
A8
93
VDD
95
A5
97
A3
99
A1
101
VDD
103
A10/AP
105
BA0
107
WE#
109
VDD
111
CAS#
113
NC/S1#
115
VDD
117
NC/ODT1
119
VSS
121
DQ32
123
DQ33
125
VSS
127
DQS4#
129
DQS4
131
VSS
133
DQ34
135
DQ35
137
VSS
139
DQ40
141
DQ41
143
VSS 2
DQ4 4
DQ5 6
VSS 8
DM0 10
VSS 12
DQ6 14
DQ7 16
VSS 18
DQ12 20
DQ13 22
VSS 24
DM1 26
VSS 28
CK0 30
CK0# 32
VSS 34
DQ14 36
DQ15 38
VSS 40
VSS 42
DQ20 44
DQ21 46
VSS 48
NC 50
DM2 52
VSS 54
DQ22 56
DQ23 58
VSS 60
DQ28 62
DQ29 64
VSS 66
DQS3# 68
DQS3 70
VSS 72
DQ30 74
DQ31 76
VSS 78
NC/CKE1 80
VDD 82
NC/A15 84
NC/A14 86
VDD 88
A11 90
A7 92
A6 94
VDD 96
A4 98
A2 100
A0 102
VDD 104
BA1 106
RAS# 108
S0# 110
VDD 112
ODT0 114
NC/A13 116
VDD 118
NC 120
VSS 122
DQ36 124
DQ37 126
VSS 128
DM4 130
VSS 132
DQ38 134
DQ39 136
VSS 138
DQ44 140
DQ45 142
VSS 144
VSS
145
DM5
147
VSS
149
DQ42
151
DQ43
153
VSS
155
DQ48
157
DQ49
159
VSS
161
NC,TEST
163
VSS
165
DQS6#
167
DQS6
169
VSS
171
DQ50
173
DQ51
175
VSS
177
DQ56
179
DQ57
181
VSS
183
DM7
185
VSS
187
DQ58
189
DQ59
191
VSS
193
SDA
195
SCL
197
VDDSPD
199
DQS5# 146
DQS5 148
VSS 150
DQ46 152
DQ47 154
VSS 156
DQ52 158
DQ53 160
VSS 162
CK1 164
CK1# 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
SAO 198
SA1 200
GND 202
GND
201
C98
0.1U_0402_16V4Z
1
2
RP1
47_0804_8P4R_5%
18 27 36 45
C97
1000P_0402_25V8J
1
2
C102 0.1U_0402_16V4Z
1 2
RP4
47_0804_8P4R_5%
18 27 36 45
C100 0.1U_0402_16V4Z
1 2
C94 0.1U_0402_16V4Z
1 2
RP3
47_0804_8P4R_5%
18 27 36 45
C104
0.1U_0402_16V4Z
1
2
C96 0.1U_0402_16V4Z
1 2
RP2
47_0804_8P4R_5%
18 27 36 45 C91 0.1U_0402_16V4Z
1 2
R48
1K_0402_1%
1 2
RP7
47_0804_8P4R_5%
18 27 36 45
C88 0.1U_0402_16V4Z
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_B_MA15
DDR_B_BS#0
DDR_B_D26
DDR_B_D29
DDR_B_D27 DDR_B_D30
DDR_B_D33
DDR_B_D31
DDR_B_D32
DDR_B_D28
DDR_B_D34
DDR_B_D35
DDR_B_D38
DDR_B_D36
DDR_B_D39
DDR_B_D37
DDR_B_D41
DDR_B_D42
DDR_B_D44
DDR_B_D40
DDR_B_D43 DDR_B_D47
DDR_B_D48
DDR_B_D45
DDR_B_D46
DDR_B_D49 DDR_B_D53
DDR_B_D51 DDR_B_D55
DDR_B_D50
DDR_B_D52
DDR_B_D56
DDR_B_D54
DDR_B_D59
DDR_B_D57
DDR_B_D58
DDR_B_D61
DDR_B_D63
DDR_B_D60
DDR_B_D3
DDR_B_D8
DDR_B_D6
DDR_B_D7
DDR_B_D5
DDR_B_D14
DDR_B_D13
DDR_B_D11
DDR_B_D10
DDR_B_D9
DDR_B_D15
DDR_B_D12
DDR_B_D17 DDR_B_D20
DDR_B_D18 DDR_B_D22
DDR_B_D19
DDR_B_D24
DDR_B_D16
DDR_B_D23
DDR_B_BS#2
DDR_B_BS#1
DDR_B_D25
DDR_B_D62
DDR_B_DM7
DDR_B_DM2
DDR_B_DM4
DDR_B_DM3
DDR_B_DM1
DDR_B_DM0
DDR_B_DM6
DDR_B_DM5
DDR_B_MA4
DDR_B_D0
DDR_B_D2
DDR_B_D1
DDR_B_D4
DDR_B_MA11
DDR_B_MA10
DDR_B_MA12
DDR_B_MA9 DDR_B_MA6DDR_B_MA8
DDR_B_MA5
DDR_B_MA7
DDR_B_MA3 DDR_B_MA0
DDR_B_MA8
DDR_B_MA9
DDR_B_MA13
DDR_B_MA15
DDR_B_MA2
DDR_B_MA1
DDR_B_MA14
DDR_B_DQS2
DDR_B_DQS#0
DDR_B_DQS4
DDR_B_DQS0
DDR_B_DQS#1
DDR_B_DQS5
DDR_B_DQS7
DDR_B_DQS3
DDR_B_DQS6
DDR_B_DQS#7
DDR_B_DQS#4
DDR_B_DQS#2
DDR_B_DQS#6
DDR_B_DQS#3
DDR_B_DQS1
DDR_B_DQS#5
DDR_B_ODT1
DDR_CKE0_DIMMB
DDR_CS1_DIMMB#
DDR_B_RAS#
DDR_B_WE#
DDR_CKE1_DIMMB
DDR_B_CAS# DDR_B_ODT0
DDR_CS0_DIMMB#
DDR_B_MA12
DDR_B_MA5
DDR_B_MA4
DDR_B_D[0..63]
DDR_B_MA[0..15]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
DDR_B_WE#
DDR_B_CAS#
DDR_CS1_DIMMB#
DDR_B_ODT1
DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS#0
DDR_B_MA13
DDR_B_ODT0
DDR_B_RAS#
DDR_B_BS#1
DDR_CS0_DIMMB#
DDR_B_MA0
DDR_B_MA2
DDR_B_MA6
DDR_B_MA7
DDR_B_MA11
DDR_B_MA14
DDR_CKE1_DIMMB
DDR_CKE0_DIMMB
DDR_B_BS#2
DDR_B_D21
+V_DDR_MCH_REF<9>
DDR_B_CLK0 <6>
DDR_B_CLK#0 <6>
DDR_CKE0_DIMMB<6>
DDR_B_BS#2<6>
DDR_B_BS#0<6> DDR_B_WE#<6>
DDR_B_CAS#<6> DDR_CS1_DIMMB#<6>
DDR_B_ODT1<6>
DDR_B_CLK1 <6>
DDR_B_CLK#1 <6>
DDR_B_ODT0 <6>
DDR_B_RAS# <6>
DDR_B_BS#1 <6>
DDR_CKE1_DIMMB <6>
DDR_CS0_DIMMB# <6>
DDR_B_MA[0..15] <6>
DDR_B_D[0..63] <6>
DDR_B_DQS[0..7] <6>
DDR_B_DM[0..7] <6>
DDR_B_DQS#[0..7] <6>
SMB_CK_DAT0<9,16,21,31> SMB_CK_CLK0<9,16,21,31>
+1.8V+1.8V
+3VS
+0.9V
+3VS
+1.8V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
DDRII SO-DIMM 1
Custom
10 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Cross between +1.8V and +0.9V power plan
4.5A
C110 0.1U_0402_16V4Z
12
RP13
47_0804_8P4R_5%
18 27 36 45
C120
0.1U_0402_16V4Z
1
2
JDIMM2
TYCO_292531-4
CONN@
VREF
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DQS0#
11
DQS0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
VSS
41
DQ16
43
DQ17
45
VSS
47
DQS2#
49
DQS2
51
VSS
53
DQ18
55
DQ19
57
VSS
59
DQ24
61
DQ25
63
VSS
65
DM3
67
NC
69
VSS
71
DQ26
73
DQ27
75
VSS
77
CKE0
79
VDD
81
NC
83
BA2
85
VDD
87
A12
89
A9
91
A8
93
VDD
95
A5
97
A3
99
A1
101
VDD
103
A10/AP
105
BA0
107
WE#
109
VDD
111
CAS#
113
NC/S1#
115
VDD
117
NC/ODT1
119
VSS
121
DQ32
123
DQ33
125
VSS
127
DQS4#
129
DQS4
131
VSS
133
DQ34
135
DQ35
137
VSS
139
DQ40
141
DQ41
143
VSS 2
DQ4 4
DQ5 6
VSS 8
DM0 10
VSS 12
DQ6 14
DQ7 16
VSS 18
DQ12 20
DQ13 22
VSS 24
DM1 26
VSS 28
CK0 30
CK0# 32
VSS 34
DQ14 36
DQ15 38
VSS 40
VSS 42
DQ20 44
DQ21 46
VSS 48
NC 50
DM2 52
VSS 54
DQ22 56
DQ23 58
VSS 60
DQ28 62
DQ29 64
VSS 66
DQS3# 68
DQS3 70
VSS 72
DQ30 74
DQ31 76
VSS 78
NC/CKE1 80
VDD 82
NC/A15 84
NC/A14 86
VDD 88
A11 90
A7 92
A6 94
VDD 96
A4 98
A2 100
A0 102
VDD 104
BA1 106
RAS# 108
S0# 110
VDD 112
ODT0 114
NC/A13 116
VDD 118
NC 120
VSS 122
DQ36 124
DQ37 126
VSS 128
DM4 130
VSS 132
DQ38 134
DQ39 136
VSS 138
DQ44 140
DQ45 142
VSS 144
VSS
145
DM5
147
VSS
149
DQ42
151
DQ43
153
VSS
155
DQ48
157
DQ49
159
VSS
161
NC,TEST
163
VSS
165
DQS6#
167
DQS6
169
VSS
171
DQ50
173
DQ51
175
VSS
177
DQ56
179
DQ57
181
VSS
183
DM7
185
VSS
187
DQ58
189
DQ59
191
VSS
193
SDA
195
SCL
197
VDDSPD
199
DQS5# 146
DQS5 148
VSS 150
DQ46 152
DQ47 154
VSS 156
DQ52 158
DQ53 160
VSS 162
CK1 164
CK1# 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
SAO 198
SA1 200
C118 0.1U_0402_16V4Z
12
RP9
47_0804_8P4R_5%
18 27 36 45
C107
1000P_0402_25V8J
1
2
C113 0.1U_0402_16V4Z
1 2
RP8
47_0804_8P4R_5%
18 27 36 45
C116 0.1U_0402_16V4Z
12
C105 0.1U_0402_16V4Z
12
RP10
47_0804_8P4R_5%
18 27 36 45
RP14
47_0804_8P4R_5%
18 27 36 45
C112 0.1U_0402_16V4Z
12
C109 0.1U_0402_16V4Z
1 2
RP11
47_0804_8P4R_5%
18 27 36 45
C114 0.1U_0402_16V4Z
12
C106 0.1U_0402_16V4Z
1 2
C119 0.1U_0402_16V4Z
1 2
C111 0.1U_0402_16V4Z
1 2
C108 0.1U_0402_16V4Z
12
RP12
47_0804_8P4R_5%
18 27 36 45
C117 0.1U_0402_16V4Z
1 2
C115 0.1U_0402_16V4Z
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIN2
H_CADIP2
H_CADIN3
H_CADIP3
H_CTLIN0
H_CTLIP0
H_CTLON0
H_CADIN4
H_CADIP4
H_CADIN5
H_CADIP5
H_CADIN6
H_CADIP6
H_CADIN7
H_CADIP7
H_CADIN8
H_CADIP8
H_CADIN9
H_CADIP9
H_CADIN10
H_CADIP10
H_CTLOP0
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIN13
H_CADIP13
H_CADIN14
H_CADIP14
H_CADIN15
H_CADIP15
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CTLIP1
H_CTLIN1
H_CADON2
H_CTLOP1
H_CADOP2
H_CTLON1
H_CADOP3
H_CADON3
H_CADON4
H_CADOP4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADON10
H_CADOP10
H_CADON9
H_CADOP9
H_CADOP8
H_CADON8
H_CADIP0
PCIE_ITX_PRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P0
PCIE_ITX_PRX_N0
SB_TX2P_C
SB_TX2N_C
SB_TX3P_C
SB_TX3N_C
SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
H_CADIN[0..15]
H_CADIP[0..15]H_CADOP[0..15]
H_CADON[0..15]
SB_TX1N_C
H_CLKIN0 <5>
H_CLKIP0 <5>
H_CTLIN0 <5>
H_CTLIP0 <5>
H_CLKON0<5> H_CLKOP0<5>
H_CLKOP1<5> H_CLKON1<5>
H_CTLOP0<5> H_CTLON0<5>
H_CLKIN1 <5>
H_CLKIP1 <5>
H_CTLIN1 <5>
H_CTLIP1 <5>H_CTLOP1<5> H_CTLON1<5>
PCIE_ITX_C_PRX_P2 <27>
PCIE_ITX_C_PRX_N2 <27>
GLAN_TXP <26>
GLAN_TXN <26>
PCIE_ITX_C_PRX_P0 <27>
PCIE_ITX_C_PRX_N0 <27>
PCIE_PTX_C_IRX_P0<27> PCIE_PTX_C_IRX_N0<27>
GLAN_RXP<26> GLAN_RXN<26>
PCIE_PTX_C_IRX_P2<27> PCIE_PTX_C_IRX_N2<27>
H_CADIP[0..15] <5>
H_CADON[0..15]<5> H_CADIN[0..15] <5>
H_CADOP[0..15]<5>
SB_RX1P<20> SB_RX1N<20>
SB_RX0P<20> SB_RX0N<20> SB_TX0P <20>
SB_TX1N <20>
SB_TX0N <20>
SB_TX1P <20>
SB_RX3P<20> SB_RX3N<20>
SB_RX2P<20> SB_RX2N<20> SB_TX2P <20>
SB_TX2N <20>
SB_TX3N <20>
SB_TX3P <20>
TMDS_B_CLK <19>
TMDS_B_CLK# <19>
TMDS_B_DATA0 <19>
TMDS_B_DATA0# <19>
TMDS_B_DATA1 <19>
TMDS_B_DATA1# <19>
TMDS_B_DATA2 <19>
TMDS_B_DATA2# <19>
+1.1VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
RS780-HT/PCIE
Custom
11 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
NEED CHECK R68 & R69 WITH AMD
0718 Place within 1"
layout 1:2 0718 Place within 1"
layout 1:2
GLAN
WLAN
New Card
DP0 GFX_TX0,TX1,TX2 and TX3
RS780M Display Port Support (muxed on GFX)
DP1 GFX_TX4,TX5,TX6 and TX7
AUX0 and HPD0
AUX1 and HPD1
R53 301_0402_1%
1 2
C134 0.1U_0402_16V7K
1 2
C132 0.1U_0402_16V7K
1 2
C136 0.1U_0402_16V7K
1 2
C128 0.1U_0402_16V7K
1 2
PART 1 OF 6
HYPER TRANSPORT CPU I/F
U3A
RS780M_FCBGA528
HT_RXCAD15P
U19
HT_RXCAD15N
U18
HT_RXCAD14P
U20
HT_RXCAD14N
U21
HT_RXCAD13P
V21
HT_RXCAD13N
V20
HT_RXCAD12P
W21
HT_RXCAD12N
W20
HT_RXCAD11P
Y22
HT_RXCAD11N
Y23
HT_RXCAD10P
AA24
HT_RXCAD10N
AA25
HT_RXCAD9P
AB25
HT_RXCAD9N
AB24
HT_RXCAD8P
AC24
HT_RXCAD8N
AC25
HT_RXCAD7P
N24
HT_RXCAD7N
N25
HT_RXCAD6P
P25
HT_RXCAD6N
P24
HT_RXCAD5P
P22
HT_RXCAD5N
P23
HT_RXCAD4P
T25
HT_RXCAD4N
T24
HT_RXCAD3P
U24
HT_RXCAD3N
U25
HT_RXCAD2P
V25
HT_RXCAD2N
V24
HT_RXCAD1P
V22
HT_RXCAD1N
V23
HT_RXCAD0P
Y25
HT_RXCAD0N
Y24
HT_RXCLK1P
AB23
HT_RXCLK1N
AA22
HT_RXCLK0P
T22
HT_RXCLK0N
T23
HT_RXCTL0P
M22
HT_RXCTL0N
M23
HT_RXCTL1P
R21
HT_RXCTL1N
R20
HT_RXCALP
C23
HT_RXCALN
A24
HT_TXCAD15P P18
HT_TXCAD15N M18
HT_TXCAD14P M21
HT_TXCAD14N P21
HT_TXCAD13P M19
HT_TXCAD13N L18
HT_TXCAD12P L19
HT_TXCAD12N J19
HT_TXCAD11P J18
HT_TXCAD11N K17
HT_TXCAD10P J20
HT_TXCAD10N J21
HT_TXCAD9P G20
HT_TXCAD9N H21
HT_TXCAD8P F21
HT_TXCAD8N G21
HT_TXCAD7P K23
HT_TXCAD7N K22
HT_TXCAD6P K24
HT_TXCAD6N K25
HT_TXCAD5P J25
HT_TXCAD5N J24
HT_TXCAD4P H23
HT_TXCAD4N H22
HT_TXCAD3P F23
HT_TXCAD3N F22
HT_TXCAD2P F24
HT_TXCAD2N F25
HT_TXCAD1P E24
HT_TXCAD1N E25
HT_TXCAD0P D24
HT_TXCAD0N D25
HT_TXCLK1P L21
HT_TXCLK1N L20
HT_TXCLK0P H24
HT_TXCLK0N H25
HT_TXCTL0P M24
HT_TXCTL0N M25
HT_TXCTL1P P19
HT_TXCTL1N R18
HT_TXCALP B24
HT_TXCALN B25
R52 301_0402_1%
1 2
C125 0.1U_0402_16V7K
1 2
C121 0.1U_0402_16V7K
1 2
C135 0.1U_0402_16V7K
1 2
R50 1.27K_0402_1%
1 2
C126 0.1U_0402_16V7K
1 2
C122 0.1U_0402_16V7K
1 2
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F SB
U3B
RS780M_FCBGA528
SB_TX3P AD5
SB_TX3N AE5
GPP_TX2P AA2
GPP_TX2N AA1
GPP_TX3P Y1
GPP_TX3N Y2
SB_RX3P
W5
SB_RX3N
Y5
GPP_RX2P
AD1
GPP_RX2N
AD2
GPP_RX3P
V5
GPP_RX3N
W6
SB_TX0P AD7
SB_TX0N AE7
SB_TX1P AE6
SB_TX1N AD6
SB_RX0P
AA8
SB_RX0N
Y8
SB_RX1P
AA7
SB_RX1N
Y7
PCE_CALRP(PCE_BCALRP) AC8
PCE_CALRN(PCE_BCALRN) AB8
SB_TX2N AC6
SB_RX2P
AA5
SB_RX2N
AA6 SB_TX2P AB6
GPP_RX0P
AE3
GPP_RX0N
AD4
GPP_RX1P
AE2
GPP_RX1N
AD3
GPP_TX0P AC1
GPP_TX0N AC2
GPP_TX1P AB4
GPP_TX1N AB3
GFX_RX0P
D4
GFX_RX0N
C4
GFX_RX1P
A3
GFX_RX1N
B3
GFX_RX2P
C2
GFX_RX2N
C1
GFX_RX3P
E5
GFX_RX3N
F5
GFX_RX4P
G5
GFX_RX4N
G6
GFX_RX5P
H5
GFX_RX5N
H6
GFX_RX6P
J6
GFX_RX6N
J5
GFX_RX7P
J7
GFX_RX7N
J8
GFX_RX8P
L5
GFX_RX8N
L6
GFX_RX9P
M8
GFX_RX9N
L8
GFX_RX10P
P7
GFX_RX10N
M7
GFX_RX11P
P5
GFX_RX11N
M5
GFX_RX12P
R8
GFX_RX12N
P8
GFX_RX13P
R6
GFX_RX13N
R5
GFX_RX14P
P4
GFX_RX14N
P3
GFX_RX15P
T4
GFX_RX15N
T3
GFX_TX0P A5
GFX_TX0N B5
GFX_TX1P A4
GFX_TX1N B4
GFX_TX2P C3
GFX_TX2N B2
GFX_TX3P D1
GFX_TX3N D2
GFX_TX4P E2
GFX_TX4N E1
GFX_TX5P F4
GFX_TX5N F3
GFX_TX6P F1
GFX_TX6N F2
GFX_TX7P H4
GFX_TX7N H3
GFX_TX8P H1
GFX_TX8N H2
GFX_TX9P J2
GFX_TX9N J1
GFX_TX10P K4
GFX_TX10N K3
GFX_TX11P K1
GFX_TX11N K2
GFX_TX12P M4
GFX_TX12N M3
GFX_TX13P M1
GFX_TX13N M2
GFX_TX14P N2
GFX_TX14N N1
GFX_TX15P P1
GFX_TX15N P2
GPP_TX4P Y4
GPP_TX4N Y3
GPP_TX5P V1
GPP_TX5N V2
GPP_RX4P
U5
GPP_RX4N
U6
GPP_RX5P
U8
GPP_RX5N
U7
C133 0.1U_0402_16V7K
1 2
C127 0.1U_0402_16V7K
1 2
C138 0.1U_0402_16V7K
1 2
R51 2K_0402_1%
1 2
C137 0.1U_0402_16V7K
1 2
C131 0.1U_0402_16V7K
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LVDS_DIGON
+VDDA18HTPLL
+NB_HTPVDD
+AVDD2
NB_THERMAL_DC
NB_THERMAL_DA
TV_LUMA
NB_RESET#
+AVDD1
RED
BLUE
CRT_VSYNC
GREEN
CRT_HSYNC
NB_PWRGD
CPU_LDT_REQ#
LDT_STOP#
+VDDLT18
TV_COMPS
TV_CRMA
+AVDDQ
+VDDLTP18
RED
GREEN
BLUE
+NB_PLLVDD
+VDDA18PCIEPLL
BLON
CPU_LDT_REQ#
LDT_STOP#
LCD_BLON
LVDS_ENA_BL
UMA_CRT_CLK<17> UMA_CRT_DAT<17>
HDMIDAT_UMA<19>
NB_PWRGD<21>
CRT_HSYNC<15,17> CRT_VSYNC<15,17>
UMA_ENVDD <18>
NBGFX_CLK<16> NBGFX_CLK#<16>
CLK_SBLINK_BCLK<16> CLK_SBLINK_BCLK#<16>
HPD <19>
CLK_NBHT<16> CLK_NBHT#<16>
PLT_RST#<15,20,26,27,33,34>
RED<17>
GREEN<17>
BLUE<17>
AUX_CAL<15>
SUS_STAT# <21>
LVDS_A2+ <18>
LVDS_A0+ <18>
LVDS_A1+ <18>
LVDS_ACLK- <18>
LVDS_ACLK+ <18>
LVDS_A2- <18>
LVDS_A0- <18>
LVDS_A1- <18>
LCD_DDC_DAT<18> LCD_DDC_CLK<18>
NB_OSC_14.318M<16>
LDT_STOP#<7,20>
CPU_LDT_REQ#<7,20>
SUS_STAT_R# <15>
LVDS_BLON <18>
HDMICLK_UMA<19>
RS780_DFT_GPIO_0<15>
ENBKL <34>
LVDS_ENA_BL <18>
+3VS
+3VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.1VS
+1.1VS
+1.8VS
+1.8VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
RS780 VEDIO/CLK GEN
Custom
12 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Strap pin
110mA
Strap pin
Strap pin
300mA
80mA
120mA
200 Ohm @ 100Mhz 20mA
200 Ohm @ 100Mhz 20mA
200 Ohm @ 100Mhz
20mA
200 Ohm @ 100Mhz
4mA 20mA
140OHM
0605 remove 0 ohm resisters
0605 umount to follow Trinity
0801 Change Vari-Bright circuit
0901 uninstall D39 without VB
D39
CH751H-40PT_SOD323-2
@
21
C144
2.2U_0603_6.3V4Z
1
2
T18 PAD
C146
2.2U_0603_6.3V4Z
1
2
C142
2.2U_0603_6.3V4Z
1
2
R57 150_0402_1%
1 2
L2
BLM18PG121SN1D_0603
1 2
R58 150_0402_1%
1 2
R68
1.8K_0402_5%
1 2
L6
BLM18PG121SN1D_0603
1 2
C147
0.1U_0402_16V4Z
1
2
R65
4.7K_0402_5%
1 2
R67 10K_0402_5%@12
C444
0.1U_0402_16V4Z
1
2
C139
2.2U_0603_6.3V4Z
1
2
PART 3 OF 6
PM
CLOCKs PLL PWR
MIS.
CRT/TVOUT
LVTM
U3C
RS780M_FCBGA528
VDDA18HTPLL
H17
SYSRESETb
D8
POWERGOOD
A10
LDTSTOPb
C10
ALLOW_LDTSTOP
C12
REFCLK_P/OSCIN(OSCIN)
E11
PLLVDD(NC)
A12
HPD(NC) D10
DDC_CLK0/AUX0P(NC)
A8 DDC_DATA0/AUX0N(NC)
B8
THERMALDIODE_P AE8
THERMALDIODE_N AD8
I2C_CLK
B9
STRP_DATA
B10
GFX_REFCLKP
T2
GFX_REFCLKN
T1
GPP_REFCLKP
U1
GPP_REFCLKN
U2
PLLVDD18(NC)
D14
PLLVSS(NC)
B12
TXOUT_L0P(NC) A22
TXOUT_L0N(NC) B22
TXOUT_L1P(NC) A21
TXOUT_L1N(NC) B21
TXOUT_L2P(NC) B20
TXOUT_L2N(DBG_GPIO0) A20
TXOUT_L3P(NC) A19
TXOUT_U0P(NC) B18
TXOUT_L3N(DBG_GPIO2) B19
TXOUT_U0N(NC) A18
TXOUT_U1P(PCIE_RESET_GPIO3) A17
TXOUT_U1N(PCIE_RESET_GPIO2) B17
TXOUT_U2P(NC) D20
TXOUT_U2N(NC) D21
TXOUT_U3P(PCIE_RESET_GPIO5) D18
TXOUT_U3N(NC) D19
TXCLK_LP(DBG_GPIO1) B16
TXCLK_LN(DBG_GPIO3) A16
TXCLK_UP(PCIE_RESET_GPIO4) D16
TXCLK_UN(PCIE_RESET_GPIO1) D17
VDDLTP18(NC) A13
VSSLTP18(NC) B13
C_Pr(DFT_GPIO5)
E17
Y(DFT_GPIO2)
F17
COMP_Pb(DFT_GPIO4)
F15
RED(DFT_GPIO0)
G18
TMDS_HPD(NC) D9
I2C_DATA
A9
TESTMODE D13
HT_REFCLKN
C24 HT_REFCLKP
C25
SUS_STAT#(PWM_GPIO5) D12
GREEN(DFT_GPIO1)
E18
BLUE(DFT_GPIO3)
E19
DAC_VSYNC(PWM_GPIO6)
B11 DAC_HSYNC(PWM_GPIO4)
A11
DAC_RSET(PWM_GPIO1)
G14
AVDD1(NC)
F12
AVDD2(NC)
E12
REDb(NC)
G17
GREENb(NC)
F18
AVDDDI(NC)
F14
AVSSDI(NC)
G15
AVDDQ(NC)
H15
AVSSQ(NC)
H14
VDDLT18_2(NC) B15
VDDLT33_1(NC) A14
VDDLT33_2(NC) B14
VSSLT1(VSS) C14
VSSLT2(VSS) D15
VDDLT18_1(NC) A15
VSSLT3(VSS) C16
VSSLT4(VSS) C18
VSSLT5(VSS) C20
LVDS_DIGON(PCE_TCALRP) E9
LVDS_BLON(PCE_RCALRP) F7
LVDS_ENA_BL(PWM_GPIO2) G12
VSSLT6(VSS) E20
VDDA18PCIEPLL1
D7
VDDA18PCIEPLL2
E7
BLUEb(NC)
F19
AUX_CAL(NC)
C8
GPPSB_REFCLKP(SB_REFCLKP)
V4
GPPSB_REFCLKN(SB_REFCLKN)
V3
DDC_DATA1/AUX1N(NC)
A7 DDC_CLK1/AUX1P(NC)
B7
DAC_SCL(PCE_RCALRN)
F8
DAC_SDA(PCE_TCALRN)
E8
REFCLK_N(PWM_GPIO3)
F11
VSSLT7(VSS) C22
RSVD
G11
R62 0_0402_5%
1 2
L5
BLM18PG121SN1D_0603
1 2
T19 PAD
C143
2.2U_0603_6.3V4Z
1
2
L8
BLM18PG121SN1D_0603
1 2
R59 715_0402_1%
1 2
T17 PAD
R61 300_0402_5%
1 2
R60 0_0402_5%
1 2
R63 0_0402_5%
1 2
L4
BLM18PG121SN1D_0603
1 2
T21PAD
C145
2.2U_0603_6.3V4Z
1
2
R66 0_0402_5%
1 2
L9
BLM18PG121SN1D_0603
1 2
R76 0_0402_5%
1 2
C141
2.2U_0603_6.3V4Z
1
2
L10
BLM18PG121SN1D_0603
1 2
L7
BLM18PG121SN1D_0603
1 2
C148
4.7U_0805_10V4Z
1
2
T20PAD
L3
0_0603_5%
R56 140_0402_1%
1 2
C140
2.2U_0603_6.3V4Z
1
2
R64
4.7K_0402_5%
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
MEM_DQS_P0
MEM_DQS_P1
MEM_DQS_N0
MEM_A9
MEM_A2
MEM_A12MEM_DQ9
MEM_DQS_P0
+MEM_VREF
MEM_DQS_N0
MEM_ODT
MEM_DQS_P1
MEM_DM1
MEM_DQS_N1
MEM_DQ12
MEM_A2
MEM_DQ2
MEM_A8
MEM_DQ15
MEM_A1
+NB_IOPLLVDD +1.8V_IOPLLVDD
MEM_A3
+MEM_VREF
MEM_A0
MEM_DQ0
MEM_DQ7
MEM_DQ3
MEM_DQ5
MEM_DQ1
MEM_DQ14
MEM_DQ6
MEM_A11
MEM_BA0
MEM_BA1
MEM_CKE
MEM_WE#
MEM_CS#
MEM_A4
MEM_DQS_N1
MEM_RAS#
MEM_CAS#
MEM_BA2
MEM_DM1
MEM_CLKP
MEM_CLKN
MEM_ODT
MEM_DM0
MEM_A10MEM_DQ8 MEM_A11
MEM_A8
MEM_A9
MEM_CAS#
MEM_CS#
MEM_CLKN
MEM_CKE
MEM_RAS#
MEM_CLKP
MEM_WE#
MEM_DM0
MEM_BA0
MEM_A7
MEM_DQ11
+MEM_VREF1
MEM_A0
MEM_A10
MEM_BA2
MEM_A3
MEM_DQ10
MEM_BA1
MEM_A6
MEM_DQ13
MEM_A1
MEM_A6
MEM_A7
MEM_A4
MEM_A5
MEM_DQ4
MEM_DQ2
MEM_DQ0
MEM_DQ1
MEM_DQ3
MEM_DQ10
MEM_DQ7
MEM_DQ11
MEM_DQ8
MEM_DQ5
MEM_DQ6
MEM_DQ9
MEM_DQ15
MEM_DQ13
MEM_DQ14
MEM_DQ4
MEM_DQ12
MEM_A12
MEM_A5
MEM_COMP_P
MEM_COMP_N
+VDDL
+MEM_VREF1
+1.8VS
+1.8VS
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ+1.8V_MEM_VDDQ
+1.1VS
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
RS780 Side-Port DDR2 SDRAM
Custom
13 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Side Port disable,VREF need
connect to +1.8VS for DDR2
Layout Note: 50 mil for VSSDL
MEM_COMP_P and MEM_COMP_N trace
width >=10mils and 10mils spacing from
other Signals in X,Y,Z directions
220 ohm @ 100MHz,2A
Side-Port DDR2 SDRAM
512Mbits(32Mbx16)-64MB
AMD recommends 200 Ohm @ 100Mhz
15mA
R73
1K_0402_1%
1 2
C156
1U_0402_6.3V4Z
1
2
SBD_MEM/DVO_I/F
PAR 4 OF 6
U3D
RS780M_FCBGA528
MEM_A0(NC)
AB12
MEM_A1(NC)
AE16
MEM_A2(NC)
V11
MEM_A3(NC)
AE15
MEM_A4(NC)
AA12
MEM_A5(NC)
AB16
MEM_A6(NC)
AB14
MEM_A7(NC)
AD14
MEM_A8(NC)
AD13
MEM_A9(NC)
AD15
MEM_A10(NC)
AC16
MEM_A11(NC)
AE13
MEM_A12(NC)
AC14
MEM_A13(NC)
Y14
MEM_BA0(NC)
AD16
MEM_BA1(NC)
AE17
MEM_BA2(NC)
AD17
MEM_RASb(NC)
W12
MEM_CASb(NC)
Y12
MEM_WEb(NC)
AD18
MEM_CSb(NC)
AB13
MEM_CKE(NC)
AB18
MEM_ODT(NC)
V14
MEM_CKP(NC)
V15
MEM_CKN(NC)
W14
MEM_DM0(NC) W17
MEM_DM1/DVO_D8(NC) AE19
MEM_DQS0P/DVO_IDCKP(NC) Y17
MEM_DQS0N/DVO_IDCKN(NC) W18
MEM_DQS1P(NC) AD20
MEM_DQS1N(NC) AE21
MEM_DQ0/DVO_VSYNC(NC) AA18
MEM_DQ1/DVO_HSYNC(NC) AA20
MEM_DQ2/DVO_DE(NC) AA19
MEM_DQ3/DVO_D0(NC) Y19
MEM_DQ4(NC) V17
MEM_DQ5/DVO_D1(NC) AA17
MEM_DQ6/DVO_D2(NC) AA15
MEM_DQ7/DVO_D4(NC) Y15
MEM_DQ8/DVO_D3(NC) AC20
MEM_DQ9/DVO_D5(NC) AD19
MEM_DQ10/DVO_D6(NC) AE22
MEM_DQ11/DVO_D7(NC) AC18
MEM_DQ12(NC) AB20
MEM_DQ13/DVO_D9(NC) AD22
MEM_DQ14/DVO_D10(NC) AC22
MEM_DQ15/DVO_D11(NC) AD21
MEM_COMPP(NC)
AE12
MEM_COMPN(NC)
AD12 MEM_VREF(NC) AE18
IOPLLVDD18(NC) AE23
IOPLLVSS(NC) AD23
IOPLLVDD(NC) AE24
C159
22U_0805_6.3V6M
1
2
R71 40.2_0402_1%
12
C153
0.1U_0402_16V4Z
1
2
ZZZ2
VRAM_x76
R74
1K_0402_1%
1 2
L11
BLM18PG121SN1D_0603
1 2
C160
0.1U_0402_16V4Z
1
2
C161
0.1U_0402_16V4Z
1
2
L14
0_0805_5%
1 2
C150
2.2U_0603_6.3V4Z
1
2
L13
0_0603_5%
1 2
R72
1K_0402_1%
1 2
R69
100_0402_1%
12
C158
0.1U_0402_16V4Z
1
2
C149
2.2U_0603_6.3V4Z
1
2
C152
1U_0603_10V6K
1
2
C157
0.1U_0402_16V4Z
1
2
R75
1K_0402_1%
1 2
C155
1U_0402_6.3V4Z
1
2
U4
HY5PS561621F-25@
VREF
J2
LDM
F3
UDM
B3
DQ14 B1
DQ13 D9
DQ12 D1
DQ11 D3
DQ10 D7
DQ9 C2
DQ8 C8
DQ7 F9
DQ6 F1
DQ5 H9
DQ4 H1
DQ3 H3
DQ2 H7
DQ1 G2
DQ0 G8
BA1
L3 BA0
L2
A11
P7
A10/AP
M2
A9
P3
A8
P8
A7
P2
A6
N7
A5
N3
A4
N8
A3
N2
A0
M8 A1
M3 A2
M7
RAS
K7
CKE
K2
ODT
K9
CS
L8
CAS
L7
CK
J8 CK
K8
WE
K3 VDDQ10 G9
VDDQ1 A9
VDDQ2 C1
VDDQ3 C3
VDDQ4 C7
VDDQ5 C9
VDDQ6 E9
VDDQ7 G1
VSSQ1 A7
VSSQ2 B2
VSSQ3 B8
VSSQ4 D2
VSSQ5 D8
VSSQ6 E7
VSSQ7 F2
VSSQ8 F8
VSSQ9 H2
VSSQ10 H8
VSS1 A3
VSS2 E3
VSS3 J3
VSS4 N1
VSS5 P9
UDQS
A8 UDQS
B7
LDQS
E8 LDQS
F7
VDDQ8 G3
VDDQ9 G7
VDD1 A1
VDD2 E1
VDD3 J9
VDD4 M9
VDD5 R1
A12
R2
DQ15 B9
VDDL J1
VSSDL J7
NC#R8
R8
NC#A2
A2
NC#L1
L1
NC#R3
R3
NC#R7
R7
NC#E2
E2
R70 40.2_0402_1%
12 C151
0.1U_0402_16V4Z
1
2
C154
0.1U_0402_16V4Z
1
2
L12
BLM18PG121SN1D_0603
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+VDDA11PCIE
+VDDHTTX
+VDDHTRX
+VDDHT
+VDDA18PCIE
+1.1VS
+1.8VS
+1.1VS +NB_VDDC
+1.8VS
+3VS
+1.8VS
+1.2V_HT
+1.1VS
+1.8VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
RS780 PWR/GND
Custom
14 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
2.5A
0.6A
0.7A
0.4A
0.7A
10A
70mA
10mA
25 mA
60mA
0605 change to jump pad
L17 0_0805_5%
1 2
C2034.7U_0805_10V4Z 12
C1860.1U_0402_16V4Z
1
2
C200
0.1U_0402_16V4Z
1
2
C163
0.1U_0402_16V4Z
1
2
C165
0.1U_0402_16V4Z
1
2
C199
0.1U_0402_16V4Z
1
2
C172
4.7U_0805_10V4Z
1
2
C2040.1U_0402_16V4Z 12
C198
4.7U_0805_10V4Z
1
2
C2070.1U_0402_16V4Z 12
L18
0_0805_5%
1 2
PART 6/6
GROUND
U3F
RS780M_FCBGA528
VSSAHT1
A25
VSSAHT2
D23
VSSAHT3
E22
VSSAHT4
G22
VSSAHT5
G24
VSSAHT6
G25
VSSAHT7
H19
VSSAHT8
J22
VSSAHT9
L17
VSSAHT10
L22
VSSAHT11
L24
VSSAHT12
L25
VSSAHT13
M20
VSSAHT14
N22
VSSAHT15
P20
VSSAHT16
R19
VSSAHT17
R22
VSSAHT18
R24
VSSAHT19
R25
VSSAHT21
U22
VSSAHT22
V19
VSSAHT23
W22
VSSAHT24
W24
VSSAHT25
W25
VSSAHT26
Y21
VSSAHT27
AD25
VSS2 D11
VSS3 G8
VSS4 E14
VSS5 E15
VSS7 J12
VSS8 K14
VSS9 M11
VSS10 L15
VSS11
L12
VSS12
M14
VSS13
N13
VSS14
P12
VSS15
P15
VSS16
R11
VSS17
R14
VSS18
T12
VSS19
U14
VSS20
U11
VSS21
U15
VSS22
V12
VSS23
W11
VSS24
W15
VSS25
AC12
VSS26
AA14
VSS27
Y18
VSS28
AB11
VSS29
AB15
VSS30
AB17
VSS31
AB19
VSS32
AE20
VSSAPCIE1 A2
VSSAPCIE2 B1
VSSAPCIE3 D3
VSSAPCIE4 D5
VSSAPCIE5 E4
VSSAPCIE6 G1
VSSAPCIE7 G2
VSSAPCIE8 G4
VSSAPCIE9 H7
VSSAPCIE10 J4
VSSAPCIE11 R7
VSSAPCIE12 L1
VSSAPCIE13 L2
VSSAPCIE14 L4
VSSAPCIE15 L7
VSS34
K11
VSSAPCIE16 M6
VSSAPCIE17 N4
VSSAPCIE18 P6
VSSAPCIE19 R1
VSSAPCIE20 R2
VSSAPCIE21 R4
VSSAPCIE22 V7
VSSAPCIE23 U4
VSSAPCIE24 V8
VSSAPCIE25 V6
VSSAPCIE26 W1
VSSAPCIE27 W2
VSSAPCIE28 W4
VSSAPCIE29 W7
VSSAPCIE30 W8
VSSAPCIE31 Y6
VSSAPCIE32 AA4
VSSAPCIE33 AB5
VSSAPCIE34 AB1
VSSAPCIE35 AB7
VSSAPCIE36 AC3
VSSAPCIE37 AC4
VSSAPCIE38 AE1
VSSAPCIE39 AE4
VSSAPCIE40 AB2
VSS1 AE14
VSSAHT20
H20
VSS33
AB21
VSS6 J15
L22
0_0805_5%
1 2
C168 10U_0805_10V4Z
C164
0.1U_0402_16V4Z
1
2
C202
0.1U_0402_16V4Z
1
2
C19510U_0805_10V4Z
1
2
PJP606
PAD-OPEN 4x4m
1 2
C1930.1U_0402_16V4Z
1
2
PART 5/6
POWER
U3E
RS780M_FCBGA528
VDDHT_1
J17
VDDHT_2
K16
VDDHT_3
L16
VDDHT_4
M16
VDDHT_5
P16
VDDHT_6
R16
VDDHT_7
T16
VDDHTTX_1
AE25
VDDHTTX_2
AD24
VDDHTTX_3
AC23
VDDHTTX_4
AB22
VDDHTTX_5
AA21
VDDHTTX_6
Y20
VDDHTTX_7
W19
VDDHTTX_8
V18
VDDHTRX_1
H18
VDDHTRX_2
G19
VDDHTRX_3
F20
VDDHTRX_4
E21
VDDHTRX_5
D22
VDD18_1
F9
VDD18_2
G9
VDD18_MEM1(NC)
AE11
VDD18_MEM2(NC)
AD11
VDDA18PCIE_1
J10
VDDA18PCIE_2
P10
VDDA18PCIE_3
K10
VDDA18PCIE_10
Y9
VDDA18PCIE_11
AA9
VDDA18PCIE_12
AB9
VDDA18PCIE_13
AD9
VDDA18PCIE_14
AE9
VDDA18PCIE_6
W9
VDDA18PCIE_7
H9
VDDPCIE_1 A6
VDDPCIE_2 B6
VDDPCIE_3 C6
VDDPCIE_4 D6
VDDPCIE_5 E6
VDDPCIE_6 F6
VDDPCIE_7 G7
VDDPCIE_8 H8
VDDPCIE_9 J9
VDDA18PCIE_4
M10
VDDA18PCIE_5
L10
VDDC_1 K12
VDDC_2 J14
VDDC_3 U16
VDDPCIE_11 M9
VDDC_4 J11
VDDC_5 K15
VDDPCIE_10 K9
VDDC_6 M12
VDDC_7 L14
VDDC_8 L11
VDDC_9 M13
VDDC_10 M15
VDDC_11 N12
VDDC_12 N14
VDDC_13 P11
VDDC_14 P13
VDDC_15 P14
VDDC_16 R12
VDDC_17 R15
VDDC_18 T11
VDDC_19 T15
VDDC_20 U12
VDDC_21 T14
VDD33_1(NC) H11
VDD33_2(NC) H12
VDD_MEM1(NC) AE10
VDD_MEM2(NC) AA11
VDD_MEM3(NC) Y11
VDD_MEM4(NC) AD10
VDD_MEM6(NC) AC10
VDD_MEM5(NC) AB10
VDDA18PCIE_8
T10
VDDC_22 J16
VDDPCIE_12 L9
VDDA18PCIE_9
R10
VDDPCIE_13 P9
VDDPCIE_14 R9
VDDPCIE_15 T9
VDDPCIE_16 V9
VDDPCIE_17 U9
VDDA18PCIE_15
U10
VDDHTRX_6
B23
VDDHTRX_7
A23
VDDHTTX_9
U17
VDDHTTX_10
T17
VDDHTTX_11
R17
VDDHTTX_12
P17
VDDHTTX_13
M17
C180
4.7U_0805_10V4Z
1
2
C169 1U_0402_6.3V4Z
1 2
C2060.1U_0402_16V4Z 12
C2110.1U_0402_16V4Z
1 2
C182
0.1U_0402_16V4Z
1
2
C175
0.1U_0402_16V4Z
1
2
+
C185
330U_D2E_2.5VM_R15
1
2
C1900.1U_0402_16V4Z
1
2
C176
0.1U_0402_16V4Z
1
2
C1890.1U_0402_16V4Z
1
2
C19610U_0805_10V4Z
1
2
C2100.1U_0402_16V4Z
1 2
C173
0.1U_0402_16V4Z
1
2C179 0.1U_0402_16V4Z
12
C183
0.1U_0402_16V4Z
1
2
L16
FBMA-L11-201209-221LMA30T_0805
1 2
C177 1U_0402_6.3V4Z
1 2
C1910.1U_0402_16V4Z
1
2
C162
4.7U_0805_10V4Z
1
2
C184
0.1U_0402_16V4Z
1
2
C178 0.1U_0402_16V4Z
12
C167 4.7U_0805_10V4Z
C170 1U_0402_6.3V4Z
1 2
C1920.1U_0402_16V4Z
1
2
C209
1U_0402_6.3V4Z
1
2
L15 0_0805_5%
1 2
C208
1U_0402_6.3V4Z
1
2
C197
4.7U_0805_10V4Z
1
2
C1940.1U_0402_16V4Z
1
2
C181
0.1U_0402_16V4Z
1
2
C174
0.1U_0402_16V4Z
1
2
C166
0.1U_0402_16V4Z
1
2
C1880.1U_0402_16V4Z
1
2
C201
0.1U_0402_16V4Z
1
2
C171 1U_0402_6.3V4Z
1 2
C2050.1U_0402_16V4Z 12
C1870.1U_0402_16V4Z
1
2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUS_STAT_R#<12> PLT_RST# <12,20,26,27,33,34>
RS780_DFT_GPIO_0<12>
CRT_HSYNC<12,17>
CRT_VSYNC<12,17>
AUX_CAL<12>
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
RS780 STRAPS
Custom
15 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)
1. Disable (RS740/RS780)
0 : Enable (RS740/RS780)
RX780: Enables the Test Debug Bus using PCIE bus
1 : Disable ( Can still be enabled using nbcfg register access )
0 : Enable
DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb
Enables the Test Debug Bus using GPIO.
1 : Disable (RS740) Disable (RX780, RS780)
0 : Enable (Rs740) Enable (RX780, RS780)
PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
DFT_GPIO1: LOAD_EEPROM_STRAPS
RS780 use HSYNC to enable SIDE PORT (internal pull high)
RS780 DFT_GPIO1
RS780 DFT_GPIO5 mux at CRT_VSYNC pull low to 3K
RX780 DFT_GPIO1 mux at GREEN(Ball E18) and change pull low form 150 to 3K.
R81 1K_0402_5%
12
D3 CH751H-40PT_SOD323-2@
2 1
R248 10K_0402_5%@ 12
R84 1K_0402_5%@12
R83 150_0402_1%@1 2
R82 1K_0402_5%@12
R85 3K_0402_5%
12
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CLKREQ_MCARD2#
CLK_XTAL_OUT
CLK_XTAL_IN
CLKREQ_NCARD#
CLKREQ_MCARD2#
CLK_48M_USB_R
CLK_XTAL_IN
CLK_XTAL_OUT
NB_OSC_14.318M_R
SEL_SATA
27M_SEL
SEL_SATA
27M_SEL
CLK_CPU_BCLK_R
CLK_CPU_BCLK#_R
CLKREQ_NCARD#
CLKREQ_MCARD1#
CLKREQ_MCARD1#
CLKREQ_LAN#
CLKREQ_LAN#
CLKREQ4
CLKREQ4
CLK_48M_USB
NB_OSC_14.318M
NB_OSC_14.318M <12>
CLK_PCIE_MCARD2<27>CLK_PCIE_MCARD2#<27>
CLK_CPU_BCLK# <7>
CLK_CPU_BCLK <7>
NBGFX_CLK <12>
NBGFX_CLK# <12>
CLK_PCIE_NCARD <27>
CLK_PCIE_NCARD# <27>
CLKREQ_NCARD# <27>
CLKREQ_MCARD2# <27>
SMB_CK_CLK0<9,10,21,31> SMB_CK_DAT0<9,10,21,31>
CLK_NBHT# <12>
CLK_NBHT <12>
CLK_48M_USB <21>
CLK_PCIE_LAN <26>
CLK_PCIE_LAN# <26>
CLK_SBLINK_BCLK#<12> CLK_SBLINK_BCLK<12> CLK_SBSRC_BCLK# <20>
CLK_SBSRC_BCLK <20>
CLKREQ_MCARD1#
CLKREQ_LAN# <26>
CLK_48M_CR <28>
+3VS_CLK
+VDDCLK_IO
+3VS_CLK
+3VS_CLK
+VDDCLK_IO
+3VS_CLK
+3VS_CLK
+3VS_CLK
+3VS_CLK
+VDDCLK_IO
+1.2V_HT
+3VS_CLK
+3VS_CLK
+3VS_CLK
+3VS_CLK
+3VS_CLK
+3VS_CLK
+3VS_CLK
+VDDCLK_IO
+VDDCLK_IO
+VDDCLK_IO
+3VS_CLK
+3VS_CLK
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
Clock generator
Custom
16 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
100M DIFF(IN/OUT)*
HT_REFCLKP
RX780 RS780
NB CLOCK INPUT TABLE
100M DIFF
100M DIFF 100M DIFF
100M DIFF
14M SE (1.8V) 14M SE (1.1V)
NB CLOCKS
NC vref
HT_REFCLKN
REFCLK_P
REFCLK_N
GFX_REFCLK 100M DIFF
SEL_SATA
* default configure as normal SRC(SRC_6) output
1
*
0
configure as SATA output
MiniCard_2
CPU
GLAN
New Card
configure as single-ended 66MHz output1
*0 configure as differential 100MHz output
NB
NB GFX
configure as 27M and 27M_SS output
NB_OSC_14.318M
1*
0configure as SRC_7 output
* default
RS780
1.8V 75R/100RRX780
1.1V 200R/100R
OSC_14M_NB
27M_SEL
* default
Routing the trace at least 10mil
SB LINK SB SRC
Use voltage divider resistor R379 & R380 to pull low
For ICS need to pull high.
For SLG is NC
EMI Caps for single end clock.
110mA 250mA
C231
0.1U_0402_16V4Z
1
2
R93 0_0402_1%
1 2
C219
0.1U_0402_16V4Z
1
2
C236
5P_0402_50V8C
@
1
2
R104
8.2K_0402_5%
1 2
R86
0_0805_5%
1 2
C220
0.1U_0402_16V4Z
1
2
C226
0.1U_0402_16V4Z
1
2
C228
0.1U_0402_16V4Z
1
2
C230
0.1U_0402_16V4Z
1
2
C223
0.1U_0402_16V4Z
1
2
SLG8SP626VTR_QFN72_10x10
U6
VDD_CPU 54
VDD_CPU_I/O 53
VSS_CPU 52
CLKREQ_1# 51
CLKREQ_2# 50
VDD_A 49
VSS_SRC
19
SRC_1#
20
SRC_1
21
SRC_0#
22
SRC_0
23
CLKREQ_0#
24
ATIGCLK_2#
25
ATIGCLK_2
26
VSS_ATIG
27
VDD_ATIG_IO
28
VDD_ATIG
29
ATIGCLK_1#
30
ATIGCLK_1
31
ATIGCLK_0#
32
VSS_SB_SRC
36 SB_SRC_1
35 SB_SRC_1#
34 ATIGCLK_0
33
VSS_A 48
VSS_SATA 47
SRC_6/SATA 46
SRC_6#/SATA# 45
VDD_SATA 44
CLKREQ_3# 43
CLKREQ_4# 42
SB_SRC_SLOW# 41
SB_SRC_0 40
SB_SRC_0# 39
VDD_SB_SRC 38
VDD_SB_SRC_IO 37
REF_1/SEL_SATA 64
REF_2/SEL_27 63
VDD_REF 62
VDD_HTT 61
HTT_0/66M_0 60
HTT_0#/66M_1 59
VSS_HTT 58
PD# 57
CPU_K8_0 56
CPU_K8_0# 55
SCL
1
SDA
2
VDD_DOT
3
SRC_7#/27M
4
SRC_7/27M_SS
5
VSS_DOT
6
SRC_5#
7
SRC_5
8
SRC_4#
9
SRC_4
10
VSS_SRC
11
VDD_SRC_IO
12
SRC_3#
13
SRC_3
14
SRC_2#
15
SRC_2
16
VDD_SRC
17
VDD_SRC_IO
18
REF_0/SEL_HTT66 65
VSS_REF 66
XTAL_IN 67
XTAL_OUT 68
VDD_48 69
48MHz_1 70
48MHz_0 71
VSS_48 72
GND 73
R87
0_0805_5%
1 2
R101 8.2K_0402_5%
1 2
R100
8.2K_0402_5%
@
1 2
C225
10U_0805_10V4Z
1
2
R98 8.2K_0402_5%
1 2
R95 0_0402_1%
1 2
R96 10K_0402_5%
1 2
R102 8.2K_0402_5%@1 2
R89 158_0402_1%
1 2
R92 8.2K_0402_5%
1 2
C229
0.1U_0402_16V4Z
1
2
R94
261_0402_1%@
1 2
C232
0.1U_0402_16V4Z
1
2
C234
0.1U_0402_16V4Z
1
2
C218
0.1U_0402_16V4Z
1
2
R249 22_0402_5% 1 2
R97 8.2K_0402_5%
1 2
R99 8.2K_0402_5%
1 2
C235
5P_0402_50V8C
@
1
2
C222
0.1U_0402_16V4Z
1
2
C238
22P_0402_50V8J
1
2
C233
0.1U_0402_16V4Z
1
2
R88 22_0402_5% 1 2
R103
8.2K_0402_5%
1 2
C622
1U_0402_6.3V4Z
1 2
C221
0.1U_0402_16V4Z
1
2
C227
0.1U_0402_16V4Z
1
2
C217
10U_0805_10V4Z
1
2
C239
22P_0402_50V8J
1
2
Y1
14.31818MHZ_20P_6X1430004201
12
C224
1U_0402_6.3V4Z
@
1
2
R90 90.9_0402_1%
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
D_DDCCLK
D_DDCDATA
D_VSYNC
HSYNC
VSYNC
BLUE_L
GREEN
RED
BLUE
D_HSYNC
D_DDCCLK
VSYNC
HSYNC
GREEN_L
RED_L
D_DDCDATA
RED<12>
GREEN<12>
BLUE<12>
UMA_CRT_CLK<12>
UMA_CRT_DAT<12>
CRT_HSYNC<12,15>
CRT_VSYNC<12,15>
+3VS
+CRT_VCC +CRT_VCC
+CRT_VCC+5VS
+CRT_VCC
+R_CRT_VCC
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
CRT Connector
Custom
17 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
CRT CONNECTOR
SM01000E100 (S SUPPRE_ KING CORE FBMA-10-100505-800T 0402)
C249
470P_0402_50V8J
@
1
2
C246
6P_0402_50V8K
1
2
D6
DAN217_SC59
@
2
31
C248
0.1U_0402_16V4Z
1 2
L25
BLM15AG121SN1D_0402
1 2
C247
0.1U_0402_16V4Z
1 2
R106
150_0402_1%
12
D5
DAN217_SC59
@
2
31
U8
SN74AHCT1G125GW_SOT353-5
A
2Y4
OE# 1
G
3P5
C242
6P_0402_50V8K
1
2
R109
4.7K_0402_5%
1 2
C244
6P_0402_50V8K
1
2
C251
10P_0402_50V8J
@
1
2
R107
150_0402_1%
12
L23
BLM15AG121SN1D_0402
1 2
GND
GND
JCRT
SUYIN_070546FR015S265ZR
CONN@
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
16
17
Q7B
2N7002DW-7-F_SOT363-6
3
5
4
R113 0_0603_5%
1 2
U7
SN74AHCT1G125GW_SOT353-5
A
2Y4
OE# 1
G
3P5
R108
4.7K_0402_5%
12
R111
6.8K_0402_5%
C241
6P_0402_50V8K
1
2
R110
6.8K_0402_5%
C250
470P_0402_50V8J
@
1
2
C240
0.1U_0402_16V4Z
1
2
Q7A
2N7002DW-7-F_SOT363-6
61
2
R112 0_0603_5%
1 2
C252
10P_0402_50V8J
@
1
2
F1
1A_6VDC_MINISMDC110
21
C245
6P_0402_50V8K
1
2
R105
140_0402_1%
12
L24
BLM15AG121SN1D_0402
1 2
D4
RB491D_SOT23
2 1
C243
6P_0402_50V8K
1
2
D7
DAN217_SC59
@
2
31
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LCD_DDC_DAT
LCD_DDC_CLK
BKOFF#
USB20_P5
USB20_N5
LVDS_A1+
LVDS_A0+
LVDS_A0-
LVDS_A2-
LVDS_ACLK-
LVDS_ACLK+
USB20_P5
DMIC_CLK
DMIC_DAT
LCD_DDC_CLK
LCD_DDC_DAT
+V_LOG
LVDS_A2+
LVDS_A1-
USB20_N5
BKOFF#_R
BKOFF#_R
INV_PWM_R
DAC_BRIG
BKOFF#_R
INV_PWM_LED
INV_PWM_R
INV_PWM_LED
INV_PWM_R
UMA_ENVDD<12>
CAM_SHDN# <22>
LVDS_A2+ <12>
LVDS_A2- <12>
LVDS_ACLK+ <12>
LVDS_ACLK- <12>
LVDS_A0- <12>
LVDS_A0+ <12>
LVDS_A1+ <12>
LVDS_A1- <12>
USB20_P5 <21>
USB20_N5 <21>
DMIC_DAT <29>
DMIC_CLK <29>
LCD_DDC_CLK <12>
LCD_DDC_DAT <12>
INV_PWM <34>
BKOFF# <34>
DAC_BRIG <34>
LVDS_ENA_BL <12>
LVDS_BLON <12>
+3VS
+LCDVDD
+LCDVDD
+5VALW
+USB_CAM
+5VS
+USB_CAM
+3VS
+LCDVDD
+USB_CAM
+5VS
INVPWR_B+ B+
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
LCD CONN. / WebCam
Custom
18 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
80mil
USB_VCCA is +3.9V, R115:100K;
R114:215Kohm
G916 Vref=1.25V when U54 install
G916-390T1UF
Close to JLVDS
80mil
C253 install when U9 is
RT9193-39GB
LVDS CONN
LVDS PWR circuit
Camera PWR circuit
RS780 VariBright function
R397 & R396 for RS780 VariBright function and EC control option
2A
1.35A
0619 Solve LED panel flash issue
0801 Change Vari-Bright circuit
0901 Delete D38 for without VB
0901 add R410
C265
0.1U_0402_16V4Z
1
2
R55
10K_0402_1%
@
12
C623
680P_0402_50V7K
1
2
R115
1M_0402_5%
1 2
R394 0_0402_5%@1 2
C261
680P_0402_50V7K
@
12
PJP604
PAD-OPEN 2x2m
2 1
Q9A
2N7002DW-7-F_SOT363-6
61
2
JLVDS
ACES_88316-4000
conn@
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
25 25
26 26
27 27
28 28
29 29
30 30
31 31
32 32
33 33
34 34
35 35
36 36
37 37
38 38
39 39
40 40
41
41
42
42
43
43
44
44
45
45
46
46
C260
680P_0402_50V7K
@
1
2
G
D
S
Q8
SI2301BDS-T1-E3_SOT23-3
2
1 3
R1174.7K_0402_5%
1 2
R124
0_0402_5%
12
C263
10U_0805_10V4Z
1
2
C258
680P_0402_50V7K
12
C259
680P_0402_50V7K
@
1 2
L26
FBMA-L11-201209-221LMA30T_0805
1 2
R120
2.2K_0402_5%
1 2
U9
RT9193-39GB_SOT23-5
VIN
1
GND
2
EN
3
VOUT 5
BP 4
R1164.7K_0402_5%@1 2
R396200_0402_5%
1 2
C253
680P_0402_50V7K
1
2
C254
680P_0402_50V7K
12
R123
100K_0402_1%@
12
C255
1000P_0402_50V7K
1
2
R410 0_0402_5%
1 2
R122
215K_0402_1%@
12
R118
100K_0402_5%
1 2
R1194.7K_0402_5%
1 2
C256
4.7U_0805_10V4Z
R125
0_0402_5%
@
1 2
C257
0.1U_0402_16V4Z
1
2
R121
200_0805_5%
1 2
R54
100K_0402_1%
12
G
D
S
Q4
2N7002_SOT23-3
@
2
1 3
C262
680P_0402_50V7K
@
12
R395 0_0402_5%@1 2
D8
PRTR5V0U2X_SOT143-4@
GND 1
IO1 2
IO2
3
VIN
4
C264
10U_0805_10V4Z 1
2
R114
220_0402_5%
12
R397
0_0402_5%
1 2
Q9B
2N7002DW-7-F_SOT363-6
3
5
4
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HDMI_R_D0-
HDMI_CLK-
HDMI_CLK+
HDMI_TX0+
HDMI_TX0-
HDMI_R_D0+
HDMI_TX1-
HDMI_R_D2-
HDMI_R_D2+HDMI_TX2+
HDMI_TX2-
HDMI_R_D1+
HDMI_R_D1-
HDMI_TX1+
HDMI_SDATA
HDMI_SCLK
HDMI_CLK+ HDMI_TX0-
HDMI_TX0+ HDMI_TX1-
HDMI_TX1+ HDMI_TX2-
HDMI_TX2+
HDMI_HPD
HDMI_CLK+
HDMI_CLK-
HDMI_TX0+
HDMI_TX0-
HDMI_TX1+
HDMI_TX1-
HDMI_TX2+
HDMI_TX2-
HDMI_CLK-
HDMI_R_CK-
HDMI_R_CK+
HDMI_R_D2-
HDMI_R_D2+
HDMI_R_D1+
HDMI_R_D1-
HDMI_R_D0+
HDMI_R_D0-
HDMI_R_CK+
HDMI_R_CK-
HDMI_SCLK
HDMI_SDATA
HDMI_HPD
HDMICLK_UMA<12>
HDMIDAT_UMA<12>
HPD <12>
TMDS_B_CLK<11> TMDS_B_CLK#<11>
TMDS_B_DATA0<11>TMDS_B_DATA0#<11>
TMDS_B_DATA1<11>TMDS_B_DATA1#<11>
TMDS_B_DATA2<11> TMDS_B_DATA2#<11>
+HDMI_5V_OUT+3VS
+5VS +HDMI_5V_OUT
+5VS +5VS +5VS +5VS
+HDMI_5V_OUT
+3VS
+HDMI_5V_OUT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
HDMI
Custom
19 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
HDMI Connector
65mA
R143
715_0402_1%
1 2
C273 0.1U_0402_16V7K
1 2
R141
715_0402_1%
1 2
R144
715_0402_1%
1 2
C272 0.1U_0402_16V7K
1 2
R134 0_0402_5%@1 2
C267
0.1U_0402_16V4Z
1
2
R128
6.8K_0402_5% R129
6.8K_0402_5%
R147 0_0402_5%@1 2
R145 0_0402_5%@1 2
D9
RB491D_SOT23
2 1
Q12A
2N7002DW-7-F_SOT363-6
61
2
Q11A
2N7002DW-7-F_SOT363-6
61
2
C268
0.1U_0402_16V4Z
1
2
U10
SN74AHCT1G125GW_SOT353-5
A
2Y4
OE# 1
G
3P5
C269 0.1U_0402_16V7K
1 2
R130
2.2K_0402_5%
12
L28
WCM-2012-900T_4P
1
1
4
433
22
R142
715_0402_1%
1 2
C271 0.1U_0402_16V7K
1 2
R140
715_0402_1%
1 2
C275 0.1U_0402_16V7K
1 2
R136 0_0402_5%@1 2
R137
715_0402_1%
1 2
C274 0.1U_0402_16V7K
1 2
Q12B
2N7002DW-7-F_SOT363-6
3
5
4
C276 0.1U_0402_16V7K
1 2
L29
WCM-2012-900T_4P
1
1
4
433
22
R139
715_0402_1%
1 2
JHDMI1
SUYIN_100042MR019S153ZLCONN@
D2+
1
GND 2
D2-
3D1+
4
GND 5
D1-
6D0+
7
GND 8
D0-
9CK+
10
GND 11
CK-
12
CEC 13
Reserved 14
SCL
15 SDA
16
DDC/CEC_GND 17
+5V
18
HP_DET
19
GND 20
GND 21
GND 22
GND 23
R126
4.7K_0402_5%
12
R135 0_0402_5%@1 2
R138
715_0402_1%
12
R133 0_0402_5%@1 2
L27
WCM-2012-900T_4P
1
1
4
433
22
L30
WCM-2012-900T_4P
1
1
4
433
22
R146 0_0402_5%@1 2
Q11B
2N7002DW-7-F_SOT363-6
3
5
4
C270 0.1U_0402_16V7K
1 2
Q10A
2N7002DW-7-F_SOT363-6
61
2
R131
100K_0402_5%
1 2
C266
0.1U_0402_16V4Z
1
2
Q10B
2N7002DW-7-F_SOT363-6
3
5
4
R132 0_0402_5%@1 2
R127
4.7K_0402_5%
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PLT_RST#
NB_RST#_R
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
CPU_LDT_REQ#
H_PROCHOT#
NB_RST#_R
SB_32KHI
SB_32KHO
NB_RST#_R
+SB_PCIEVDD
PCI_PIRQH#
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C
CLK_PCI_EC_R
H_PROCHOT#
SB_32KHI
SB_32KHO
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
H_PWRGD_SB
CLK_PCI_EC
CLK_PCI_SIO_R
H_PWRGD_SB
LPCCLK1
PCI_CLK3 <24>
PCI_CLK5 <24>
PLT_RST# <12,15,26,27,33,34>
PCI_CLK4 <24>
PCICLK2 <24>
SB_RX0P<11> SB_RX0N<11> SB_RX1P<11> SB_RX1N<11>
SB_TX1P<11> SB_TX1N<11>
SB_TX0P<11> SB_TX0N<11>
SB_TX2P<11> SB_TX2N<11> SB_TX3P<11> SB_TX3N<11>
SB_RX2P<11> SB_RX2N<11> SB_RX3P<11> SB_RX3N<11>
RTC_CLK <24>
LPC_FRAME# <33,34>
LPC_AD1 <33,34>
LPC_AD2 <33,34>
LPC_AD0 <33,34>
LPC_AD3 <33,34>
LDT_STOP#<7,12>
CPU_LDT_REQ#<7,12> H_PROCHOT#<7>
SIRQ <33,34>
CLK_SBSRC_BCLK<16> CLK_SBSRC_BCLK#<16>
LDT_RST#<7>
ACCEL_INT <31>
PCI_AD23 <24>
PCI_SERR# <34>
PCI_AD24 <24>
PCI_AD25 <24>
PCI_AD26 <24>
PCI_AD27 <24>
PCI_AD28 <24>
LPC_DRQ# <33>
CLK_PCI_EC <24,34>
LPCCLK1 <24>
H_PWRGD<43>
H_PWRGD_CPU<7>
CLK_PCI_SIO <33>
+RTCVCC
+SB_VBAT
+3VALW
+3VL
+3VS
+PCIE_VDDR
+1.2V_HT
+SB_VBAT +RTCVCC_R
+RTCBATT_R
+RTCBATT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
SB700-PCIE/PCI/ACPI/LPC/RTC
Custom
20 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
W=20mils
EC & Debug
STRAP PIN
STRAP PIN
Check AMD need pull low or not
W=20mils
W=20mils
Close to SB
Close to SB
9/20 SA00001S510 S IC 218S7EALA11FG SB700 BGA 528P SB 0FH
STRAP PIN
STRAP PIN
W=20mils
9/20 SP020008T00
C288
18P_0402_50V8J
1 2
JBATT1
ACES_85205-02001CONN@
1
1
2
2
GND
3
GND
4
R159 10K_0402_5%
12
C280 0.1U_0402_16V7K
1 2
C289
18P_0402_50V8J
1 2
C291
1U_0402_6.3V4Z
1
2
R153 33_0402_5%
12
ZZZ1
PCB-MB
C277 0.1U_0402_16V7K
1 2
R160
0_0402_5%
1 2
T24PAD T23PAD
R151 562_0402_1%
12
R163
1K_0402_5%
1 2
T22PAD
C278 0.1U_0402_16V7K
1 2
C290
0.1U_0402_16V4Z
1
2
R155
20M_0603_5%
12
U12
NC7SZ08P5X_NL_SC70-5@
B
2
A
1Y4
P5
G
3
R416 33_0402_5%
1 2
R157 22_0402_5%
1 2
C287
0.1U_0402_16V4Z@
12
R156 0_0402_5%
12
J1 JUMP_43X39@
1
122
C279 0.1U_0402_16V7K
1 2
C284 0.1U_0402_16V7K
1 2
PCI EXPRESS INTERFACE
Part 1 of 5
SB700
PCI INTERFACE
LPC
RTC
CPU
RTC XTAL
PCI CLKS
CLOCK GENERATOR
U11A
218S7EALA11FG_BGA528_SB700
A_RST#
N2
PCIE_RX2P
R20
PCIE_RX2N
R21
PCIE_RX3P
R18
PCIE_TX3N
T22 PCIE_TX3P
T23 PCIE_TX2N
U24 PCIE_TX2P
U25
PCIE_RX1P
U19
PCIE_RX1N
V19
PCIE_RX0P
U22
PCIE_RX0N
U21
PCIE_TX1N
V25 PCIE_TX1P
V24 PCIE_TX0N
V22 PCIE_TX0P
V23
PCIE_RCLKP/NB_LNK_CLKP
N25
PCIE_RCLKN/NB_LNK_CLKN
N24
PCIE_CALRP
T25
PCIE_CALRN
T24
PCIE_PVDD
P24
GPP_CLK1N
L19
X1
A3
X2
B3
VBAT B2
GPP_CLK0N
J18
GPP_CLK2P
M19
ALLOW_LDTSTP
F23
CPU_HT_CLKN
M18
GPP_CLK2N
M20
SLT_GFX_CLKP
M23
CPU_HT_CLKP
P17
LDT_RST#
G24
PCICLK0 P4
PCICLK1 P3
PCICLK2 P1
PCICLK3 P2
PCIRST# N1
CBE0# W2
CBE1# U7
CBE2# AA7
CBE3# Y1
FRAME# AA6
DEVSEL# W5
IRDY# AA5
TRDY# Y5
PAR U6
STOP# W6
PERR# W4
REQ0# AC3
REQ1# AD4
REQ2# AB7
REQ3#/GPIO70 AE6
GNT0# AD2
GNT1# AE4
GNT2# AD5
GNT3#/GPIO72 AC6
SERR# V7
CLKRUN# AD6
LAD0 H24
LAD1 H23
LAD2 J25
LAD3 J24
LFRAME# H25
LDRQ0# H22
SERIRQ V15
PCICLK4 T4
LPCCLK0 G22
LPCCLK1 E22
AD0 U2
AD1 P7
AD2 V4
AD3 T1
AD4 V3
AD5 U1
AD6 V1
AD7 V2
AD8 T2
AD9 W1
AD10 T9
AD12 R7
AD13 R5
AD14 U8
AD15 U5
AD16 Y7
AD17 W8
AD18 V9
AD19 Y8
AD20 AA8
AD21 Y4
AD22 Y3
AD23 Y2
AD24 AA2
AD25 AB4
AD26 AA1
AD27 AB3
AD28 AB2
AD29 AC1
AD30 AC2
AD31 AD1
AD11 R6
REQ4#/GPIO71 AB6
GNT4#/GPIO73 AE5
LDRQ1#/GNT5#/GPIO68 AB8
GPP_CLK1P
L20
RTCCLK C3
PCIE_RX3N
R17
INTE#/GPIO33 AD3
INTF#/GPIO34 AC4
INTG#/GPIO35 AE2
INTH#/GPIO36 AE3
LOCK# V5
PCIE_PVSS
P25
PCICLK5/GPIO41 T3
BMREQ#/REQ5#/GPIO65 AD7
NB_HT_CLKP
M24
LDT_PG
F22
LDT_STP#
G25
GPP_CLK3N
P22
INTRUDER_ALERT# C2
NB_DISP_CLKP
K23
25M_48M_66M_OSC
L18
GPP_CLK0P
J19
NB_HT_CLKN
M25
SLT_GFX_CLKN
M22
GPP_CLK3P
N22
25M_X1
J21
25M_X2
J20
NB_DISP_CLKN
K22
PROCHOT#
F24
R154 20M_0402_5%@
1 2
C286
1U_0402_6.3V4Z
1
2
T25PAD
L31
BLM18PG121SN1D_0603
1 2
C285
10U_0805_10V4Z
1
2
D10
DAN202U_SC70
2
3
1
R162
120_0402_5%
1 2
R148 8.2K_0402_5%@
1 2
C282 0.1U_0402_16V7K
1 2
R150 22_0402_5%
1 2
R152 2.05K_0402_1%
12
R403
0_0402_5%
1 2
C283 0.1U_0402_16V7K
1 2
R161
120_0402_5%
1 2
C281 0.1U_0402_16V7K
1 2
Y2
32.768KHZ_12.5PF_9H03200413
OSC
4
OSC
1
NC 3
NC 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
NB_PWRGD
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_P2
USB20_N2
USB20_P3
USB20_N3
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_P7
USB20_N7
USB20_N8
USB20_P8
SMB_CK_DAT1
SMB_CK_CLK1
SUS_STAT#
H_THERMTRIP#
USB_RCOMP
SMB_CK_CLK0
SMB_CK_DAT0
SUS_STAT#
HDA_SDIN0
HDA_SDOUT
HDA_SYNC
SB_TEST2
SB_TEST1
SB_TEST0
SB_TEST2
SB_TEST1
SB_TEST0
SMB_CK_DAT0
SMB_CK_CLK0
SMB_CK_CLK1
SMB_CK_DAT1
EC_RSMRST#
EXP_CPPE#
PCIE_WAKE#
PCIE_WAKE#
USB20_N4
USB20_P4
HDARST#
EC_RSMRST#
SB_GPIO5
HDABITCLK HDA_BITCLK
HDA_BITCLK_CODEC
HDA_SDOUT_CODEC
HDABITCLK
HDA_BITCLK
EC_LID_OUT#<34>
EC_SCI#<34>
USB20_N0 <32>
USB20_P0 <32>
USB20_N1 <32>
USB20_P1 <32>
USB20_P2 <32>
USB20_N2 <32>
USB20_P3 <32>
USB20_N3 <32>
USB20_N5 <18>
USB20_P5 <18>
USB20_N6 <27>
USB20_P6 <27>
USB20_P7 <28>
USB20_N7 <28>
USB20_N8 <27>
USB20_P8 <27>
SMB_CK_DAT1<27> SMB_CK_CLK1<27>
EC_RSMRST#<34>
SMB_CK_DAT0<9,10,16,31> SMB_CK_CLK0<9,10,16,31>
H_THERMTRIP#<7>
SB_SPKR<29>
CLK_48M_USB <16>
SUS_STAT#<12>
HDA_SDIN0<29> HDA_SDOUT_CODEC<29> HDA_BITCLK_CODEC<29>
HDA_SYNC_CODEC<29>
HDA_RST#_CODEC<29>
SLP_S3#<34> SLP_S5#<34>
PWRBTN_OUT#<34> SB_PWRGD<7,34,43>
KB_RST#<34> GATEA20<34>
EC_SMI#<34>
GPIO16 <24>
GPIO17 <24>
EXP_CPPE#<27>
NB_PWRGD<12>
LAN_PCIE_WAKE#<26>
MINI_PCIE_WAKE#<27>
USB20_N4 <32>
USB20_P4 <32>
HDARST#<24,34>
LAN_DSM#<26>
3/5V_OK<39,41>
+3VS
+3VALW
+3VALW
+3VS
+3VALW +3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
SB700 USB/AC97
Custom
21 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
STRAP PIN
USB-0 Right side (S/W Debug Port)
USB-7 CardReader
USB-5 USB Camera
USB-4 FPR
STRAP PIN
USB-2 Right Side (Upper)
USB-6 WLAN
SB700 has internal PD
USB-3 BT
USB-1 Right side (E-SATA Combo)
USB-8 NEW Card
STRAP PIN
demo circuit LID use RI#
0605 remove 0 ohm resisters
USB 2.0
Part 4 of 5
SB700
ACPI / WAKE UP EVENTS
GPIO
HD AUDIO
USB OC
USB 1.1
USB MISC
INTEGRATED uC
INTEGRATED uC
U11D
218S7EALA11FG_BGA528_SB700
USBCLK/14M_25M_48M_OSC C8
USB_RCOMP G8
USB_OC6#/IR_TX1/GEVENT6#
B9
USB_HSD5P C12
USB_HSD5N D12
USB_HSD4P B12
USB_HSD4N A12
USB_HSD3P G12
USB_HSD3N G14
USB_HSD2P H14
USB_HSD2N H15
USB_HSD1P A13
USB_HSD1N B13
USB_HSD0P B14
USB_HSD0N A14
USB_OC4#/IR_RX0/GPM4#
A8
USB_OC3#/IR_RX1/GPM3#
A9
USB_OC1#/GPM1#
F8 USB_OC2#/GPM2#
E5
USB_HSD7P G11
USB_HSD7N H12
USB_HSD6P E12
USB_HSD6N E14
USB_OC0#/GPM0#
E4
DDR3_RST#/GEVENT7#
G5
SATA_IS0#/GPIO10
AE18
AZ_SDIN3/GPIO46
M3
PCI_PME#/GEVENT4#
E1
RI#/EXTEVNT0#
E2
SLP_S3#
F5
SLP_S5#
G1
PWR_BTN#
H2
PWR_GOOD
H1
SUS_STAT#
K3
TEST1
H4
TEST0
H3
GA20IN/GEVENT0#
Y15
KBRST#/GEVENT1#
W15
SMBALERT#/THRMTRIP#/GEVENT2#
J6
LPC_PME#/GEVENT3#
K4
LPC_SMI#/EXTEVNT1#
K24
S3_STATE/GEVENT5#
F1
SYS_RESET#/GPM7#
J2
WAKE#/GEVENT8#
H6
RSMRST#
D3
CLK_REQ3#/SATA_IS1#/GPIO6
AD18
NB_PWRGD
W14
SMARTVOLT1/SATA_IS2#/GPIO4
AA19
SMARTVOLT2/SHUTDOWN#/GPIO5
Y19
SPKR/GPIO2
W21
SCL0/GPOC0#
AA18
SDA0/GPOC1#
W18
DDC1_SCL/GPIO9
AA20
DDC1_SDA/GPIO8
Y18
AZ_BITCLK
M1
AZ_SDOUT
M2
AZ_SYNC
L6
AZ_RST#
M4
USB_HSD9P A11
USB_HSD9N B11
USB_HSD8P C10
USB_HSD8N D10
LLB#/GPIO66
C1
AZ_DOCK_RST#/GPM8#
L5
SLP_S2/GPM9#
H7
USB_OC5#/IR_TX0/GPM5#
B8
BLINK/GPM6#
F2
SCL1/GPOC2#
K1
SDA1/GPOC3#
K2
TEST2
H5
CLK_REQ0#/SATA_IS3#/GPIO0
W17
AZ_SDIN2/GPIO44
L8 AZ_SDIN1/GPIO43
J8 AZ_SDIN0/GPIO42
J7
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
V17
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
W20
USB_FSD13P E6
USB_FSD13N E7
USB_FSD12P F7
USB_FSD12N E8
USB_HSD11P H11
USB_HSD11N J10
USB_HSD10P E11
USB_HSD10N F11
IMC_GPIO9 B18
IMC_PWM0/IMC_GPIO10 F21
SCL2/IMC_GPIO11 D21
SDA2/IMC_GPIO12 F19
SCL3_LV/IMC_GPIO13 E20
SDA3_LV/IMC_GPIO14 E21
IMC_PWM1/IMC_GPIO15 E19
IMC_PWM2/IMC_GPO16 D19
IMC_PWM3/IMC_GPO17 E18
IMC_GPIO18 G20
IMC_GPIO19 G21
IMC_GPIO20 D25
IMC_GPIO21 D24
IMC_GPIO22 C25
IMC_GPIO23 C24
IMC_GPIO24 B25
IMC_GPIO25 C23
IMC_GPIO0
H19
IMC_GPIO1
H20
SPI_CS2#/IMC_GPIO2
H21
IDE_RST#/F_RST#/IMC_GPO3
F25
IMC_GPIO4
D22
IMC_GPIO5
E24
IMC_GPIO6
E25
IMC_GPIO7
D23
IMC_GPIO8 A18
IMC_GPIO26 B24
IMC_GPIO27 B23
IMC_GPIO28 A23
IMC_GPIO29 C22
IMC_GPIO30 A22
IMC_GPIO31 B22
IMC_GPIO32 B21
IMC_GPIO33 A21
IMC_GPIO34 D20
IMC_GPIO35 C20
IMC_GPIO36 A20
IMC_GPIO37 B20
IMC_GPIO38 B19
IMC_GPIO39 A19
IMC_GPIO40 D18
IMC_GPIO41 C18
R16611.8K_0402_1%
1 2
R167 4.7K_0402_5%
1 2
R174 2.2K_0402_5%
1 2
R406
10K_0402_5%
@
12
R175 2.2K_0402_5%
1 2
R168 2.2K_0402_5%@
1 2
U30
ASM3P623S00BF-08TR_TSSOP8
@
CLKOUT
6
VDD
7
NC 2
CLKIN 1
NC 8
SS 3
SSON
5
GND
4
C625 82P_0402_50V8J
1 2
C624 82P_0402_50V8J
1 2
R184 33_0402_5%
1 2
R176
10K_0402_5%
1 2
D33
CH751H-40PT_SOD323-2
21
R173
100K_0402_5%
1 2
R170 2.2K_0402_5%@
1 2
R178 0_0402_5%@
12
R182 33_0402_5%
1 2
T26PAD
R183 33_0402_5%
1 2
C626
0.1U_0402_16V4Z
@1
2
R169 2.2K_0402_5%@
1 2
R404
10K_0402_5%
1 2
T27PAD
R172 2.2K_0402_5%
1 2
R247 0_0402_5%
12
R407
10K_0402_5%
@
1 2
R179 0_0402_5%
1 2
R405
10K_0402_5%
@
12
R181 33_0402_5%
1 2
R177 0_0402_5%
12
R171 2.2K_0402_5%
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+PLLVDD_SATA
+XTLVDD_SATA
LFB_ID1
LFB_ID2
LFB_ID0
+SB_AVDD
LFB_ID2
THERMAL_DC
SATA_STX_DRX_P1
SATA_STX_DRX_N1
SATA_STX_DRX_P0
SATA_STX_DRX_N0
SATA_X2
SATA_X1
SATA_CAL
LFB_ID1
LFB_ID0
SATA_X2
SATA_X1
SATA_STX_DRX_P2
SATA_STX_DRX_N2
AC_IN_SB
SATA_TXP0<25> SATA_TXN0<25>
SATA_RXP0_C<25> SATA_RXN0_C<25>
SATA_LED#<35>
SATA_TXP1<25> SATA_TXN1<25>
SATA_RXP1_C<25> SATA_RXN1_C<25>
EC_THERM# <34>
CAM_SHDN# <18>
BT_OFF <32>
SATA_TXP2<32> SATA_TXN2<32>
SATA_RXP2_C<32> SATA_RXN2_C<32>
WLOFF# <27>
BT_COMBO_EN# <27>
HDD_HALTLED# <35>
ISOLATEB <26>
AC_IN <34,38>
+3VALW
+3VS
+1.2V_HT
+3VS
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
SB700 SATA/IDE/SPI
Custom
22 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
LFB_ID0 to LFB_ID2 got internal PU 10K to S5.
Hynix
Qimonda
Samsung
LFB_ID0LFB_ID1LFB_ID2
000
001
001
Local Frame Buffer Strapping List
Copy from Becks.
77mA
1mA
5mA
0605 Change value to solve AC
plugged/unplugged power status
issue.
C298 0.01U_0402_25V7K
1 2
R190 1K_0402_5%@1 2
R193 0_0402_5%
1 2
R192 10K_0402_5%
1 2
C29310P_0402_50V8J
12
C29210P_0402_50V8J
12
C296 0.01U_0402_25V7K
1 2
L32
BLM18PG121SN1D_0603 12
C303
1U_0402_6.3V4Z
1
2
C302
1U_0402_6.3V4Z
1
2
C305
0.1U_0402_16V4Z
1
2
ATA 66/100/133
Part 2 of 5
SB700
SATA PWR SERIAL ATA
SPI ROM
HW MONITOR
U11B
218S7EALA11FG_BGA528_SB700
IDE_IORDY AA24
IDE_IRQ AA25
IDE_A0 Y22
IDE_A1 AB23
IDE_A2 Y23
IDE_DACK# AB24
IDE_DRQ AD25
IDE_IOR# AC25
IDE_IOW# AC24
IDE_CS1# Y25
IDE_CS3# Y24
IDE_D0/GPIO15 AD24
IDE_D1/GPIO16 AD23
IDE_D2/GPIO17 AE22
IDE_D3/GPIO18 AC22
IDE_D4/GPIO19 AD21
IDE_D5/GPIO20 AE20
IDE_D6/GPIO21 AB20
IDE_D7/GPIO22 AD19
IDE_D8/GPIO23 AE19
IDE_D9/GPIO24 AC20
IDE_D10/GPIO25 AD20
IDE_D11/GPIO26 AE21
IDE_D12/GPIO27 AB22
IDE_D13/GPIO28 AD22
IDE_D14/GPIO29 AE23
IDE_D15/GPIO30 AC23
XTLVDD_SATA
W12
PLLVDD_SATA
AA11
SATA_TX2P
AB12
SATA_TX2N
AC12
SATA_RX2P
AD12 SATA_RX2N
AE12
SATA_TX3P
AD13
SATA_TX3N
AE13
SATA_RX3P
AC14 SATA_RX3N
AB14
SATA_TX0P
AD9
SATA_TX0N
AE9
SATA_RX0N
AB10
SATA_RX0P
AC10
SATA_TX1P
AE10
SATA_TX1N
AD10
SATA_RX1N
AD11
SATA_RX1P
AE11
SATA_CAL
V12
SATA_X1
Y12
SATA_X2
AA12
SATA_ACT#/GPIO67
W11
SPI_DI/GPIO12 G6
SPI_DO/GPIO11 D2
SPI_CLK/GPIO47 D1
SPI_HOLD#/GPIO31 F4
SPI_CS1#/GPIO32 F3
FANOUT1/GPIO48 M5
FANOUT2/GPIO49 M7
FANIN0/GPIO50 P5
FANIN1/GPIO51 P8
FANIN2/GPIO52 R8
LAN_RST#/GPIO13 U15
ROM_RST#/GPIO14 J1
VIN0/GPIO53 A4
VIN1/GPIO54 B4
VIN2/GPIO55 C4
VIN3/GPIO56 D4
VIN4/GPIO57 D5
VIN5/GPIO58 D6
VIN6/GPIO59 A7
VIN7/GPIO60 B7
TEMPIN0/GPIO61 B6
TEMPIN1/GPIO62 A6
TEMPIN2/GPIO63 A5
TEMPIN3/TALERT#/GPIO64 B5
FANOUT0/GPIO3 M8
AVDD F6
AVSS G7
TEMP_COMM C6
SATA_TX4P
AE14
SATA_TX4N
AD14
SATA_RX4N
AD15
SATA_RX4P
AE15
SATA_TX5P
AB16
SATA_TX5N
AC16
SATA_RX5N
AE16
SATA_RX5P
AD16
L34
BLM18PG121SN1D_0603 12
R187
10K_0402_5%
@
1 2
C294 0.01U_0402_25V7K
1 2
C295 0.01U_0402_25V7K
1 2
R191 1K_0402_1%
12
C306
2.2U_0603_6.3V4Z
1
2
Y3
25MHz_20pF_6X25000017
12
C299 0.01U_0402_25V7K
1 2
R408
300K_0402_5%
12
R188 1K_0402_5%@1 2
R189
10K_0402_5%@1 2
C304
1U_0402_6.3V4Z
1
2
R185
10M_0402_5%
12
C297 0.01U_0402_25V7K
1 2
L33
BLM18PG121SN1D_0603 12
R186 1K_0402_5%@1 2
D34
CH751H-40PT_SOD323-2
2 1
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+AVDDCK_1.2V
+1.2V_CKVDD
+AVDDCK_3.3V
+3.3V_SB_IDE
+V5_VREF
+S5_3V
+AVDDCK_3.3V
+AVDDCK_1.2V
+AVDDC
+S5_1.2V
+1.2V_SB_CORE
+1.2_USB
+3VS
+1.2V_HT
+1.2V_HT
+3VALW
+3VS
+3VS
+5VS
+1.2V_HT
+1.2V_HT
+PCIE_VDDR
+1.2V_SATA
+3VALW
+AVDD_USB
+1.2VALW
+1.2VALW
+1.2V_HT
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
SB700 PWR/GND
Custom
23 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
0.45A/40mil/3vias
0.45A/30mil/3vias
0.8A/50mil/4vias
1.25A/50mil/4vias
1.25A/50mil/4vias
0.6A/50mil/4vias
0.3A/30mil/2vias
0.1A/30mil/2vias
C356 10U_0805_10V4Z
1 2
R195 0_0805_5%
1 2
C3450.1U_0402_16V4Z
12
C3200.1U_0402_16V4Z
12
C363 0.1U_0402_16V4Z
1 2
L38 0_0603_5%
C3101U_0402_6.3V4Z
12
C3411U_0402_6.3V4Z
12
C3660.1U_0402_16V4Z 12
C3391U_0402_6.3V4Z
12
C358
1U_0603_10V4Z
1
2
C3121U_0402_6.3V4Z
12
L41 0_0805_5%
1 2
C3141U_0402_6.3V4Z
12
C332 10U_0805_10V4Z
12
C3500.1U_0402_16V4Z
12
C349 10U_0805_10V4Z
1 2
C35310U_0805_10V4Z
1 2
C337 1U_0402_6.3V4Z
1 2
C346 10U_0805_10V4Z
12
C361 1U_0402_6.3V4Z
1 2
Part 3 of 5
SB700
POWER
PCI/GPIO I/O
CORE S0
3.3V_S5 I/OCORE S5
A-LINK I/O
SATA I/O
USB I/O
PLL CLKGEN I/O
IDE/FLSH I/O
U11C
218S7EALA11FG_BGA528_SB700
VDDQ_2
M9
VDDQ_6
U17
VDDQ_3
T15
VDDQ_11
AB5
VDDQ_1
L9
VDDQ_4
U9
VDDQ_5
U16
VDDQ_12
AB21
VDDQ_10
AA4
VDDQ_7
V8
VDDQ_8
W7
VDDQ_9
Y6
S5_3.3V_1 A17
S5_3.3V_2 A24
S5_3.3V_3 B17
S5_3.3V_4 J4
S5_3.3V_5 J5
S5_1.2V_2 G4
S5_1.2V_1 G2
USB_PHY_1.2V_1 A10
USB_PHY_1.2V_2 B10
V5_VREF AE7
AVDDCK_3.3V J16
AVDDCK_1.2V K17
AVDDC E9
AVDDTX_0
A16
AVDDTX_1
B16
AVDDTX_2
C16
AVDDTX_3
D16
AVDDTX_5
E17 AVDDTX_4
D17
AVDDRX_2
F18
AVDDRX_0
F15
AVDDRX_5
G18 AVDDRX_4
G17
PCIE_VDDR_4
P21 PCIE_VDDR_3
P20
PCIE_VDDR_7
R25
PCIE_VDDR_2
P19
PCIE_VDDR_5
R22
PCIE_VDDR_1
P18
PCIE_VDDR_6
R24
AVDD_SATA_1
AA14
AVDD_SATA_4
AB18
AVDD_SATA_2
AA15
AVDD_SATA_3
AA17
AVDD_SATA_5
AC18
AVDD_SATA_6
AD17
AVDD_SATA_7
AE17
VDD_1 L15
VDD_2 M12
VDD_3 M14
VDD_4 N13
VDD_5 P12
VDD_6 P14
VDD_7 R11
VDD_9 T16
VDD_8 R15
AVDDRX_1
F17
AVDDRX_3
G15
VDD33_18_2
AA21
VDD33_18_4
AE25 VDD33_18_3
AA22
VDD33_18_1
Y20
CKVDD_1.2V_2 L22
CKVDD_1.2V_1 L21
CKVDD_1.2V_4 L25
CKVDD_1.2V_3 L24
S5_3.3V_7 L2
S5_3.3V_6 L1
C3180.1U_0402_16V4Z
12
C329
1U_0402_6.3V4Z
1
2
SB700
GROUND
Part 5 of 5
218S7EALA11FG_BGA528_SB700
U11E
VSS_4 D7
VSS_2 A25
VSS_21 M13
VSS_10 K16
VSS_11 L4
VSS_1 A2
VSS_17 L16
VSS_8 K9
VSS_9 K11
VSS_46 AB1
VSS_13 L10
VSS_14 L11
VSS_15 L12
VSS_16 L14
VSS_18 M6
VSS_19 M10
VSS_20 M11
VSS_22 M15
VSS_23 N4
VSS_26 P6
VSS_27 P9
VSS_28 P10
VSS_29 P11
VSS_32 R1
VSS_33 R2
VSS_34 R4
VSS_36 R10
VSS_37 R12
VSS_3 B1
VSS_35 R9
VSS_30 P13
AVSS_SATA_15
AB13
AVSS_SATA_18
AC8
AVSS_SATA_5
V11
AVSS_SATA_11
Y17
AVSS_SATA_19
AD8
VSS_31 P15
VSS_24 N12
AVSS_SATA_14
AB11
AVSS_SATA_2
U10
AVSS_SATA_3
U11
AVSS_SATA_1
T10
AVSS_SATA_17
AB17
AVSS_SATA_4
U12
AVSS_SATA_12
AA9
AVSS_SATA_6
V14
AVSS_SATA_10
Y14
AVSS_SATA_7
W9
AVSS_SATA_8
Y9
AVSS_SATA_16
AB15
AVSS_SATA_20
AE8
AVSS_SATA_13
AB9
AVSS_USB_5
D9
AVSS_USB_8
D14
AVSS_USB_4
D8 AVSS_USB_3
C14
AVSS_USB_6
D11
AVSS_USB_7
D13
AVSS_USB_2
B15
AVSS_USB_21
K10
AVSS_USB_10
E15
AVSS_USB_20
J15
AVSS_USB_22
K12
AVSS_USB_11
F12
AVSS_USB_12
F14
AVSS_USB_23
K14
AVSS_USB_16
J9 AVSS_USB_15
H17
AVSS_USB_19
J14
AVSS_USB_14
H9
AVSS_USB_1
A15
AVSS_USB_24
K15
VSS_12 L7
AVSS_USB_17
J11
AVSS_USB_18
J12
VSS_7 H8
VSS_25 N14
VSS_6 G19
AVSS_USB_13
G9
AVSS_USB_9
D15
AVSSCK L17
PCIE_CK_VSS_3
J22
PCIE_CK_VSS_14 U20
PCIE_CK_VSS_13 U18
PCIE_CK_VSS_12 T17
PCIE_CK_VSS_18 W19
PCIE_CK_VSS_6
M17
PCIE_CK_VSS_11 R19
PCIE_CK_VSS_8
P16 PCIE_CK_VSS_7
M21
PCIE_CK_VSS_17 V21
PCIE_CK_VSS_16 V20
PCIE_CK_VSS_15 V18
VSS_50 AE24
PCIE_CK_VSS_21 W25
PCIE_CK_VSS_19 W22
PCIE_CK_VSS_20 W24
AVSSC
F9
PCIE_CK_VSS_2
J17 PCIE_CK_VSS_1
H18
PCIE_CK_VSS_4
K25
VSS_5 F20
PCIE_CK_VSS_5
M16
PCIE_CK_VSS_9 P23
PCIE_CK_VSS_10 R16
VSS_49 AE1
VSS_44 V6
VSS_45 Y21
VSS_42 U4
VSS_48 AB25
VSS_47 AB19
VSS_41 T14
VSS_43 U14
VSS_38 R14
VSS_39 T11
VSS_40 T12
AVSS_SATA_9
Y11
L37 0_0805_5%
1 2
C317 1U_0402_6.3V4Z
1 2
C3430.1U_0402_16V4Z
12
C352 0.1U_0402_16V4Z
1 2
L40 0_0805_5%
1 2
C3652.2U_0603_6.3V4Z
12
C3692.2U_0603_6.3V4Z
12
C319 1U_0402_6.3V4Z
1 2
C3161U_0402_6.3V4Z
12
C321 0.1U_0402_16V4Z
1 2
C3440.1U_0402_16V4Z
12
C3672.2U_0603_6.3V4Z
12
C347 10U_0805_10V4Z
1 2
C313 1U_0402_6.3V4Z
1 2
C338 0.1U_0402_16V4Z
1 2
C309 1U_0402_6.3V4Z
1 2
C340 0.1U_0402_16V4Z
1 2
L36 0_0805_5%
1 2
C3421U_0402_6.3V4Z
12
C351 0.1U_0402_16V4Z
1 2
C357
0.1U_0402_16V4Z
1
2
C3541U_0402_6.3V4Z
12
C307 10U_0805_10V4Z
12
C328
0.1U_0402_16V4Z
1
2
R196 0_0603_5%
1 2
D11
CH751H-40PT_SOD323-2
21
L42 0_0805_5%
1 2
C30810U_0805_10V4Z
1 2
C360 1U_0402_6.3V4Z
1 2
C362 0.1U_0402_16V4Z
1 2
L39 0_0603_5%
C33610U_0805_10V4Z
1 2
R1981K_0402_5%
12
L35
BLM18PG121SN1D_0603 12
C3481U_0402_6.3V4Z
12
C335 1U_0402_6.3V4Z
1 2
C311 1U_0402_6.3V4Z
1 2
C359 10U_0805_10V4Z
1 2
C334 1U_0402_6.3V4Z
1 2
C322 0.1U_0402_16V4Z
1 2
C3680.1U_0402_16V4Z 12
C3551U_0402_6.3V4Z
12
C3700.1U_0402_16V4Z 12
C364 0.1U_0402_16V4Z
1 2
C315 1U_0402_6.3V4Z
1 2
L43 0_0805_5%
1 2
R197 0_0805_5%
1 2
C333 1U_0402_6.3V4Z
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCI_AD28<20> PCI_AD27<20> PCI_AD26<20> PCI_AD25<20> PCI_AD24<20> PCI_AD23<20>
PCICLK2<20> PCI_CLK3<20> PCI_CLK4<20> PCI_CLK5<20> CLK_PCI_EC<20,34> LPCCLK1<20> RTC_CLK<20> HDARST#<21,34> GPIO17<21> GPIO16<21>
+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
SB700 STRAPS
Custom
24 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Internal pull up
RESERVED
DEBUG STRAPS
PCI_AD25 PCI_AD24
USE EEPROM
PCIE STRAPS
USE DEFAULT
PCIE STRAPS
DEFAULT
BYPASS
ACPI
BCLK
USE ACPI
BCLK
DEFAULT
USE IDE
PLL
USE
LONG
RESET
USE
SHORT
RESET
USE PCI
PLL
DEFAULT
BYPASS IDE
PLL
PULL
HIGH
DEFAULT
BYPASS
PCI PLL
PCI_AD27 PCI_AD26
PULL
LOW
DEFAULT
PCI_AD28
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
PCI_AD23
LPC_CLK0
ENABLE PCI
MEM BOOT
EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)
DEFAULT
GP17
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
DISABLE PCI
MEM BOOT
PULL
LOW
PULL
HIGH
REQUIRED STRAPS
INTERNAL
RTC
DEFAULT
RTC_CLKLPC_CLK1
CLKGEN
ENABLED
DEFAULT
CLKGEN
DISABLED
AZ_RST_CD#
EC
ENABLED
EC
DISABLED
DEFAULT
GP16PCI_CLK2
BOOTFAIL
TIMER
ENABLED
DEFAULT
BOOTFAIL
TIMER
DISABLED
PCI_CLK3
RESERVED
DEFAULT
IGNORE
DEBUG
STRAPS
USE
DEBUG
STRAPS
PCI_CLK4 PCI_CLK5
RESERVED
L,H = LPC ROM (Default)
H,H = Reserved
H,L = SPI ROM
L,L = FWH ROM
R219
2.2K_0402_5%
@
12
R217
2.2K_0402_5%
12
R223
2.2K_0402_5%
@
12
R222
2.2K_0402_5%
@
12
R210
10K_0402_5%
12
R208
2.2K_0402_5%
12
R207
10K_0402_5%
@
12
R214
10K_0402_5%
12
R212
10K_0402_5%
@
12
R204
10K_0402_5%
@
12
R221
2.2K_0402_5%
@
12
R211
10K_0402_5%
@
12
R215
2.2K_0402_5%
@
12
R220
2.2K_0402_5%
@
12
R201
10K_0402_5%
@
12
R206
10K_0402_5%
@
12
R216
10K_0402_5%
12
R218
2.2K_0402_5%
@
12
R202
10K_0402_5%
@
12
R205
10K_0402_5%
@
12
R199
10K_0402_5%
@
12
R224
2.2K_0402_5%
@
12
R213
10K_0402_5%
12
R200
10K_0402_5%
@
12
R209
10K_0402_5%
12
R203
10K_0402_5%
@
12
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SATA_RXP0_CSATA_RXP0
SATA_RXN0 SATA_RXN0_C
SATA_TXP0
SATA_TXN0
SATA_TXP1
SATA_TXN1
SATA_RXP1
SATA_RXN1 SATA_RXP1_C
SATA_RXN1_C
SATA_RXN0_C <22>
SATA_RXP0_C <22>
SATA_TXN0 <22>
SATA_TXP0 <22>
SATA_RXN1_C <22>
SATA_TXP1 <22>
SATA_TXN1 <22>
SATA_RXP1_C <22>
+5VS
+3VS
+5VS
+3VS
+5VS
+3VS
+3VS +5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
HDD/CDROM
Custom
25 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
HDD Connector
Pleace near HD CONN
Pleace near HD CONN
Near CONN side.
Pleace near HD CONN
Pleace near HD CONN
Multi-Bay Connector-option
1.8A
Near CONN side.
0605 add 150uF Cap to solve hot-plug
C388
0.1U_0402_16V4Z
@
1
2
C378
0.1U_0402_16V4Z
@
1
2
C376
0.01U_0402_16V7K 12
JP3
TYCO_2023087CONN@
GND 1
VCC5
15 VCC5
16
TX- 3
TX+ 2
VCC5
14
GND 4
VCC3
13
RX- 5
VCC3
12
RX+ 6
VCC3
11
GND 7
GND
10
GND 8
GND
9
GND 17
GND
18
C380
0.1U_0402_16V4Z
1
2
C381
10U_0805_10V4Z
1
2
C383
0.1U_0402_16V4Z
1
2
C375
0.01U_0402_16V7K
12
C379
0.1U_0402_16V4Z
@
1
2
C371
10U_0805_10V4Z
1
2
+
C643
150U_D_6.3VM
1
2
C373
0.1U_0402_16V4Z
1
2
C384
0.1U_0402_16V4Z
1
2
C374
0.1U_0402_16V4Z
1
2
C386
0.01U_0402_16V7K 12
JHDD
OCTEK_SAT-22EH1G_RV
CONN@
GND 1
A+ 2
A- 3
GND 4
B- 5
B+ 6
GND 7
V33 8
V33 9
V33 10
GND 11
GND 12
GND 13
V5 14
V5 15
V5 16
GND 17
Reserved 18
GND 19
V12 20
V12 21
V12 22
GND
23 GND
24
C382
0.1U_0402_16V4Z
1
2
C387
10U_0805_10V4Z
@
1
2
C389
0.1U_0402_16V4Z
@
1
2
C385
0.01U_0402_16V7K
12
C390
0.1U_0402_16V4Z
1
2
C377
10U_0805_10V4Z
@
1
2
C372
0.1U_0402_16V4Z
1
2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DSM#
LAN_LINK#
LANGND
LAN_ACTIVITY#
PCIE_RXP2_LAN
PCIE_RXN2_LAN
GLAN_REQ#
RJ45_MIDI3+
RJ45_MIDI1-
RJ45_MIDI0+
RJ45_MIDI2-
RJ45_MIDI3-
RJ45_MIDI1+
RJ45_MIDI0-
RJ45_MIDI2+
GLAN_WAKE#
ISOLATEB
LAN_LINK#
LAN_ACTIVITY#
+CTRL_18
LAN_MDI1-
LAN_MDI1+
ISOLATEB
LAN_MDI2+
LAN_MDI2-
LAN_MDI3-
LAN_MDI3+
LAN_MDI0-
LAN_MDI0+
LAN_X1
LAN_X2
LAN_X2LAN_X1
RJ45_MIDI1+
RJ45_MIDI1-
RJ45_MIDI2+
LAN_MDI2- RJ45_MIDI2-
LAN_MDI2+
LAN_MDI1-
LAN_MDI1+
RJ45_GND
+CTRL_18
RJ45_MIDI0+
RJ45_MIDI0-
RJ45_MIDI3-
RJ45_MIDI3+
LAN_MDI0-
LAN_MDI0+
LAN_MDI3+
LAN_MDI3- LAN_ACTIVITY#
LAN_LINK#
GLAN_TXP<11>
GLAN_TXN<11>
GLAN_RXN<11>
GLAN_RXP<11>
LAN_DSM# <21>
CLKREQ_LAN#<16>
LAN_PCIE_WAKE#<21>
CLK_PCIE_LAN<16>
CLK_PCIE_LAN#<16>
PLT_RST#<12,15,20,27,33,34>
LAN_POWER_OFF<34>
ISOLATEB<22>
+3V_LAN
+3V_LAN
+3V_LAN
+3V_LAN
+3VALW+3V_LAN
+3VS
+LAN_EVDD12
+LAN_VDD12
+LAN_VDD12
+LAN_VDD12
+3V_LAN
+3VALW
+3V_LAN
+3V_LAN
+3V_LAN
+LAN_VDD12
+LAN_VDD12
+LAN_EVDD12
+LAN_VDD12
+3V_LAN
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
RTL8111C/8102E 10/100/1000 LAN
Custom
26 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Close to Pin16,37,46,53
1025 add to meet HP request
LAN Conn.
Place Close to Chip
HP PoE solution
Close to Pin2 & pin59
Close to Pin1
Place these components
colsed to LAN chip
68mA
close to pin 5 for EMI
close to pin 28 for EMI
L45
4.7UH_1008HC-472EJFS-A_5%_1008 1 2
C401
0.1U_0402_16V4Z
1
2
C400
0.1U_0402_16V4Z
1
2
R240 300_0402_5%
12
JRJ45
FOX_JM36113-P1123-7F
CONN@
PR1-
2
PR1+
1
PR2+
3
PR3+
4
PR3-
5
PR2-
6
PR4+
7
PR4-
8
Green LED-
12
Green LED+
11
Yellow LED-
14
Yellow LED+
13
SHLD1 15
SHLD1 16
DETECT PIN1 9
DETCET PIN2 10
C424
0.1U_0402_16V4Z
1
2
C435
0.01U_0402_16V7K
1
2
R239
75_0402_1%
1 2
Y4
25MHZ_20P
12
C429 0.01U_0402_16V7K
1 2
R227
3.6K_0402_5%
1 2
C437
0.01U_0402_16V7K
1
2
U13
RTL8111C-GR_QFN64_9X9
PERSTB
20
HSOP
29
HSON
30
HSIP
23
HSIN
24
REFCLK_P
26
REFCLK_N
27
MDIP2 9
MDIN2 10
MDIP3 12
MDIN3 13
EEDO 45
EEDI/AUX 47
EESK 48
EECS 44
LED3 54
LED2 55
LED1 56
LED0 57
MDIN1 7
MDIP1 6
MDIN0 4
MDIP0 3
SROUT12
1
VDDSR 63
RSET
64
LANWAKEB
19
ISOLATEB
36
CKTAL1
60
CKTAL2
61
DVDD12 21
EVDD12 22
EVDD12 28
DVDD12 32
DVDD12 38
DVDD12 43
DVDD12 49
DVDD12 52
FB12
5
ENSR
62
VDD33 16
VDD33 37
VDD33 46
VDD33 53
AVDD33 2
AVDD12 8
AVDD12 11
AVDD12 14
IGPIO 50
OGPIO 51
AVDD12 58
AVDD33 59
CLKREQB
33
NC
15
NC
17
NC
18
NC
34
NC
35
NC
39
NC
40
NC
41
NC
42
EGND
31
EGND
25
EXPOSE_PAD
65
C398
0.1U_0402_16V4Z
1
2
C403
0.1U_0402_16V4Z
1
2
C411 0.1U_0402_16V4Z
1 2
C423
22U_0805_6.3VAM
1
2
R238
75_0402_1%
1 2
C419
0.1U_0402_16V4Z
1
2
C410
0.1U_0402_16V4Z
1
2
C414
0.1U_0402_16V4Z
1
2
C407
0.1U_0402_16V4Z
1
2
C405
0.1U_0402_16V4Z
1
2
U15
NS692405
TCT1
1
TD1+
2
TD1-
3
TCT2
4
TD2+
5
TD2-
6
TCT3
7
TD3+
8
TD3-
9
TCT4
10
TD4+
11
TD4-
12
MCT1 24
MX1+ 23
MX1- 22
MCT2 21
MX2+ 20
MX2- 19
MCT3 18
MX3+ 17
MX3- 16
MCT4 15
MX4+ 14
MX4- 13
R231
0_0402_5%
1 2
R229 0_0603_5%
C397
0.1U_0402_16V4Z
1
2
C417
0.1U_0402_16V4Z
1
2
C408
0.1U_0402_16V4Z
1
2
C421
27P_0402_50V8J
1
2
C430 0.01U_0402_16V7K
1 2
C399
0.1U_0402_16V4Z
1
2
R226 0_1206_5%
@
1 2
C425
68P_0402_50V8K
@
1
2
R235 10K_0402_5%@1 2
C413
0.1U_0402_16V4Z
1
2
R230 2.49K_0402_1%
1 2
L47 0_0603_5%
R234 300_0402_5%
12
R241
75_0402_1%
1 2
C431
0.1U_0402_16V4Z
1
2
C428
68P_0402_50V8K
@
1
2
C404
0.1U_0402_16V4Z
1
2
C427 0.01U_0402_16V7K
1 2
C420
1U_0402_6.3V6K
1
2
C406
0.1U_0402_16V4Z
1
2
D36
PSOT24C_SOT23-3
@
2
3
1
C412
0.1U_0402_16V4Z
1 2
C416
0.1U_0402_16V4Z
1
2
C436
0.01U_0402_16V7K
1
2
C434
0.01U_0402_16V7K
1
2
C432
4.7U_0805_10V4Z
1
2
C433
1000P_1808_3KV7K
1 2
C402
0.1U_0402_16V4Z
1
2
C422
27P_0402_50V8J
1
2
G
D
S
Q13
AP2305GN
2
1 3
R232
1K_0402_1%
@
12
L46 0_0603_5%
R228 0_0402_5%
1 2
C426 0.01U_0402_16V7K
1 2
R236 0_0402_5%
1 2
R237
75_0402_1%
1 2
C415
0.1U_0402_16V4Z
1
2
R233
15K_0402_5%
C409
22U_0805_6.3VAM 1
2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SMB_CK_DAT1
SMB_CK_CLK1
MINI_PCIE_WAKE#
CLKREQ_NCARD#
PERST#
EXP_CPPE#
PERST#
PLT_RST#
WL_LED#
PLT_RST#
SMB_CK_DAT1
SMB_CK_CLK1
CH_DATA
CH_CLK
MINI_PCIE_WAKE#
WL_OFF#
EXP_CPPE#
CH_CLK
EXP_CPPE#
SMB_CK_CLK1<21> SMB_CK_DAT1<21>
CLK_PCIE_NCARD<16>
USB20_P8<21> USB20_N8<21>
PCIE_ITX_C_PRX_N0<11> PCIE_ITX_C_PRX_P0<11>
PCIE_PTX_C_IRX_P0<11> PCIE_PTX_C_IRX_N0<11>
CLK_PCIE_NCARD#<16>
CLKREQ_NCARD#<16>
PLT_RST#<12,15,20,26,33,34>
SUSP#<29,34,36,38,41>
SYSON<34,35,36,40>
WL_LED# <35>
WLOFF# <22>
USB20_P6 <21>
USB20_N6 <21>
CLKREQ_MCARD2#<16>
CH_DATA<32> CH_CLK<32>
CLK_PCIE_MCARD2<16>CLK_PCIE_MCARD2#<16>
PCIE_PTX_C_IRX_P2<11> PCIE_PTX_C_IRX_N2<11>
PCIE_ITX_C_PRX_N2<11> PCIE_ITX_C_PRX_P2<11>
EXP_CPPE#<21>
BT_COMBO_EN#<22>
MINI_PCIE_WAKE#<21>
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+3VS_PEC
+3V_PEC
+1.5VS_PEC
+1.5VS_PEC
+3V_PEC
+3VS_PEC
+3VALW
+1.5VS
+3VS
+3VALW_WLAN
+3VS_WLAN
+1.5VS_WLAN
+3VS_WLAN
+3VALW
+3VS +1.5VS+3VS_WLAN +1.5VS_WLAN +3VALW_WLAN
+3VS_WLAN
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
WLAN/TV tuner/Express Card
Custom
27 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Express Card Power Switch
New Card
Near to Express Card slot.
USE TI TPS2231MRGPR
Mini Card Slot 1---WLAN
9/20 STANDOFF (H=7.5 mm) ES000000D00
9/20 SP01000HS00/SP01000LX00
Max 1.3A
Max 0.65A
Max 0.3A
Max 1A Max 0.5A
Max 0.275A
0804 change power rail
C461
4.7U_0805_10V4Z
1
2
JEXP
ACES_91740-02644_LB
CONN@
GND
1
USB_D-
2
USB_D+
3
CPUSB#
4
RSV
5
RSV
6
SMB_CLK
7
SMB_DATA
8
+1.5V
9
+1.5V
10
WAKE#
11
+3.3VAUX
12
PERST#
13
+3.3V
14
+3.3V
15
CLKREQ#
16
CPPE#
17
REFCLK-
18
REFCLK+
19
GND
20
PERn0
21
PERp0
22
GND
23
PETn0
24
PETp0
25
GND
26
GND
27
GND
28
GND
29
GND
30
JP4
FOX_AS0B226-S99N-7F
CONN@
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
45
45 46 46
47
47 48 48
49
49 50 50
51
51 52 52
1
122
G1
53
G2
54
G3
55
G3
56
C462
0.1U_0402_16V4Z
1
2
R250 0_0603_5%
1 2
R243
0_0805_5%
1 2
C457 0.1U_0402_16V4Z
12
R242
0_0805_5%
12
C466
330P_0402_50V7K
@
1
2
C456 0.1U_0402_16V4Z
12
C440
0.01U_0402_16V7K
1
2
R252
0_0402_5%
1 2
C439
4.7U_0805_10V4Z
1
2
R244 0_0805_5%
1 2
C443
0.1U_0402_16V4Z
1
2
C438
0.1U_0402_16V4Z
1
2
C465
4.7U_0805_10V4Z
1
2
C442
4.7U_0805_10V4Z
1
2
C464
0.1U_0402_16V4Z
1
2
D35
CH751H-40PT_SOD323-2
2 1
C460
0.1U_0402_16V4Z
1
2
C453 0.1U_0402_16V4Z
12
R245 0_0805_5%@
1 2
U16
R5538D001-TR-F_QFN20_4X4~D
3.3Vin
2
3.3Vin
43.3Vout 3
3.3Vout 5
SYSRST#
6
SHDN#
20
STBY#
1
PERST# 8
OC# 19
RCLKEN
18
AUX_IN
17 AUX_OUT 15
CPPE#
10
CPUSB#
9
NC 16
GND 7
1.5Vin
12
1.5Vin
14 1.5Vout 11
1.5Vout 13
THERMAL_PAD 21
C441
0.1U_0402_16V4Z
1
2
R253
4.7K_0402_5%
12
C463
4.7U_0805_10V4Z
1
2
http://mycomp.su/x/
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDD6_SDD0_MSD0
SDCLK
SDCD#
SDCMD
XDWE#_SDD3
XD_RE#_SDD2
XDD4_SDD1
XDD2_SDD7_MSD2
XDD3_MSD1
XDD6_SDD0_MSD0
MSCLK
SDWP
XDD5_MSBS
MSINS#
XDD7_SDD6_MSD3
XDWP#_SDD4
XDD0_SDD5
XDD7_SDD6_MSD3
XDD2_SDD7_MSD2
XDD3_MSD1
XDD2_SDD7_MSD2
XDD4_SDD1
XDWE#_SDD3
XD_ALE
XDWP#_SDD4
XD_CLE
XDCE#
XDD5_MSBS
XDD7_SDD6_MSD3
XDD6_SDD0_MSD0
XDCD#
XDRDY
XD_RE#_SDD2
MSINS#
RST#
XD_RE#_SDD2
XDWE#_SDD3
XDD2_SDD7_MSD2
MSCLK
MODE SEL
XDD6_SDD0_MSD0
XDD3_MSD1
XDD5_MSBS
XDD4_SDD1
SDCD#
SDWP
XDCD#
SDCMD
XD_CLE
XDCE#
XD_ALE
XDRDY
XDWP#_SDD4
XDD0_SDD5
XDD7_SDD6_MSD3
MSCLK
USB20_N7
USB20_P7
RST#
CR_LED#
CR_LED#
MODE SEL
XDD0_SDD5
XDD1
SDCLK
XDD1
SDCLK
XTLO
XTLI
XTLO
XTLI
USB20_N7<21> USB20_P7<21>
CLK_48M_CR<16>
+VCC_4IN1 +VCC_4IN1
+3VS
+3VS
+VCC_4IN1
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
USB CardReader&CONN
Custom
28 46Monday, September 08, 2008
2007/08/28 2006/10/06
Compal Electronics, Inc.
Card Reader Connector
White
0804 Change value for brightness
0901 Change power rail for Vendor suggestion
0901 Change D16 footprint
7 IN 1 CONN
JREAD
TAITW_R015-B10-LM
CONN@
XD-WP
33
XD-D4
7
MS-DATA3 24
MS-DATA0 17
SD-DAT2 30
SD-DAT0 14
SD-CMD 25
MS-DATA1 15
XD-D6
5SD-DAT3 29
SD-DAT1 12
XD-ALE
35
XD-D0
32
SD_CLK 20
XD-D2
9
MS-INS 22
MS-DATA2 19
MS-SCLK 26
XD-RE
38
MS-BS 13
XD-D5
6
XD-D7
4
XD-D1
10
XD-CE
37
XD-R/B
39
XD-D3
8
XD-WE
34
MS-VCC 28
7IN1 GND
11
XD-CLE
36
7IN1 GND
31
SD-VCC 21
XD-VCC
3
XD-CD
40 SD-CD-SW 1
SD-WP-SW 2
7IN1 GND
41
7IN1 GND
42
SD-DAT4 27
SD-DAT5 23
SD-DAT6 18
SD-DAT7 16
R419 0_0402_5%
1 2
C630
1U_0402_6.3V6K
1
2
R422
10_0402_5%@
12
R417
100K_0402_5%
1 2
R277
0_0402_5%
1 2
RTS5158E-GR_LQFP48_7X7
U31
XD_D5_SP5 25
SD_DAT1/XD_D3/MS_D1_SP6 26
SD_DAT0/XD_D6/MS_D0_SP7 27
SD_DAT7/XD_D2/MS_D2_SP8 28
MS_INS#_SP9 29
NC 30
SD_DAT6/XD_D7/MS_D3_SP10 31
DGND
32
D3V3
33
SD_CLK/XD_D1/MS_CLK_SP11 34
SD_DAT5/XD_D0/MS_D6_SP12 35
SD_CMD 36
AV_PLL
1
RREF
2
NC
3
DM
4
DP
5
AGND
6
NC
7
3V3_IN
8
CARD_3V3
9
VREG 10
D3V3
11
DGND
12
XTAL_CTR 13
GPIO0
14
EEDO 15
EECS 16
EESK 17
EEDI 18
XD_CD#_SP1 19
SD_WP_SP2 20
SD_CD#_SP3 21
MS_D4 22
XD_D4/SD_DAT1_SP4 23
MS_D5 24
SD_DAT4/XD_WP#/MS_D7_SP13 37
XD_RDY_SP14 38
SD_DAT3/XD_WE#_SP15 39
SD_DAT2/XD_RE#_SP16 40
XD_ALE_SP17 41
XD_CE#_SP18 42
XD_CLE_SP19 43
RST#
44
MODE_SEL
45
AGND
46
XTLO
47
XTLI
48
R276
1.2K_0402_5%
1 2
R424
10K_0402_5%
@
1 2
C633
0.1U_0402_16V4Z
1
2
C631
1U_0603_16V6K
1
2
C641
6P_0402_50V8J
1
2
R4280_0402_5%
1 2
R427
10_0402_5%@
12
R418 0_0402_5%
12
C636
0.1U_0402_16V4Z
1
2
R423 0_0402_5%
1 2
C638
47P_0402_50V8J
@
1
2
R4210_0402_5%
1 2
C632
0.1U_0402_16V4Z
1
2
C637
10P_0402_50V8J
@
1
2
C634
1U_0603_10V4Z
1 2
C640
6P_0402_50V8J
1
2
R420
499K_0402_1%~D
@
1 2
R278
0_0402_5%
1 2
C628
0.1U_0402_16V4Z
1
2
Y6
48MHZ_16PF_FSX3M 12.000M16FAQ@
33
4
4
22
1
1
C629
0.1U_0402_16V4Z
1 2
R425
6.19K_0402_1%
12
D16
HT-110TW_WHITE
2 1
C635
4.7U_0603_6.3V6K
1
2
C639
10P_0402_50V8J
@
1
2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HDA_BITCLK_CODEC
EAPD_CODEC
MIC_EXTR
MIC_EXTL
LINE_OUT_L
LINE_OUT_R
SENSE
HP_OUTL
HP_OUTR
HDA_SYNC_CODEC
HDA_RST#_CODEC
MONO_INR
VC_REFA
HDA_BITCLK_CODEC
HDA_SDOUT_CODEC
SUSP#<27,34,36,38,41>
GNDA <30>
EAPD_CODEC <34>
DMIC_DAT <18>
HP_OUTR <30>
LINE_OUT_L <30>
LINE_OUT_R <30>
EXTMIC_DET# <30>
HP_OUTL <30>
MIC_EXT_L <30>
MIC_EXT_R <30>
HDA_BITCLK_CODEC<21>
HDA_SDOUT_CODEC<21>
HDA_SDIN0<21>
HDA_SYNC_CODEC<21>
HDA_RST#_CODEC<21>
SB_SPKR<21>
DMIC_CLK<18> JACK_DET# <30>
EC_BEEP<34>
VREFOUT_B <30>
+5VALW +VDDA_CODEC
+3VS_HDA
+3VS
+3VDD_CODEC +VDDA_CODEC
+3VDD_CODEC
+VDDA_CODEC_R
+3VS_HDA
+VDDA_CODEC_R
+VDDA_CODEC_R+3VS
+VDDA_CODEC_R
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
Audio Codec-IDT9271B7
Custom
29 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
CODEC POWER
W=40Mil
300mA
(4.75V(4.56~4.94V))
Use an 80mil to
connection or place
a 1206 resistor under
CODEC with double
vias.
GNDAGND
HP Jack & Dock
Internal SPKR.
Jack MIC
F
H
39.2K
5.11K
SENSE A
10K
Port
D
G
A
20K
C
Resistor
B
10K
5.11K
39.2K E
PortResistor
20K
SENSE B
0509 Solve MIC no function
0730 add R301 fix MIC auto switch
R286 39.2K_0402_1%
1 2
R279
BLM18BD601SN1D_0603
1 2
C497 0.1U_0402_16V4Z
1 2
R280
BLM18BD601SN1D_0603
1 2
R301
10K_0402_5%
12
R283 33_0402_5%
1 2
R292
0_0805_5%
@
1 2
C501
0.1U_0402_16V4Z
@
1 2
U19
G9191-475T1U_SOT23-5
IN
1
GND
2
SHDN
3
OUT 5
BYP 4
C496
0.1U_0402_16V4Z
1 2
C502
0.1U_0402_16V4Z
@
1 2
R290 10K_0402_5%
1 2
C504
0.1U_0402_16V4Z
@
1 2
C485 0.1U_0402_16V4Z
1 2
R287 47K_0402_5%@ 1 2
R285 20K_0402_1%
1 2
R288
FBMA-L10-160808-301LMT 0603
1 2
C490
1U_0603_10V4Z
1
2
C488
0.1U_0402_16V4Z
1
2
C486
1U_0603_10V4Z
1
2
C495 1U_0603_10V4Z
12
R293
0_1206_5%
1 2
C491
2.2U_0805_16V4Z
1
2
C493
33P_0402_50V8K
@
1
2
C489
0.1U_0402_16V4Z
1
2
C503
0.1U_0402_16V4Z
@
1 2
C499 1U_0603_10V6K
1 2
C494 0.1U_0402_16V4Z
1 2
U20
92HD71B7X5NLGXA1X8_QFN48_7X7
DVDD_CORE
1
BITCLK
6
VOL_DN/DMIC_1/GPIO 2 4
SDO
5
VOL_UP/DMIC_0/GPIO 1 2
DVDD_IO
3
SDI_CODEC
8
DVSS**
7
PCBEEP
12
RESET#
11
SYNC
10
DVDD_CORE*
9
SENSE_A 13
PORTE_L 14
PORTE_R 15
PORTF_L 16
PORTF_R 17
NC
18
NC
19
NC
20
PORTB_L 21
PORTB_R 22
PORTC_L 23
PORTC_R 24
PORTD_R 36
PORTD_L 35
SENSE_B / NC
34
CAP2
33
MONO_OUT
32
VREFOUT-E / GPIO 4 31
GPIO 3 30
VREFOUT-C 29
VREFOUT-B 28
VREFFILT
27
AVSS1*
26
AVDD1*
25
SPDIF OUT0 48
EAPD/ SPDIF OUT 0 or 1 / GPIO 0 47
DMIC_CLK
46
SPDIF OUT1 / GPIO 7 45
GPIO 6 44
GPIO 5 43
AVSS2**
42
PORTA_R 41
NC / OTP
40
PORTA_L 39
AVDD2**
38
NC
37
C492
0.1U_0402_16V4Z
1
2
R282
47_0402_5%
@
12
R289 47K_0402_5%
1 2
R291
0_0402_5%
@
1 2
C498 1U_0603_10V6K
1 2
C487
0.1U_0402_16V4Z
1
2
C500
10U_0805_10V4Z
1 2
R284 5.1K_0402_1%
1 2
R281
0_0603_5%
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SPKL-
SPKL+
SPKR-
EC_MUTE#
SPKR+
HP_OUT_R
HP_OUT_L
EXTMIC_DET#
JACK_DET#
CIR_IN
EXT_MIC_R
EXT_MIC_L
HP_OUT_L
HP_OUT_R
SPKR-
SPKR+
SPKL-
SPKL+
HP_OUTR<29>
HP_OUTL<29>
LINE_OUT_L<29>
LINE_OUT_R<29>
EC_MUTE#<34>
EXTMIC_DET# <29>
CIR_IN <34>
MIC_EXT_R <29>
MIC_EXT_L <29>
VREFOUT_B<29>
JACK_DET# <29>
+5VAMP
+5VS
+5VS
+5VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
AMP & Audio Jack
Custom
30 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
SPEAKER
Keep 10 mil width
10 dB
GAIN0 GAIN1 Av(inv)
0
1
6dB
10dB
15.6dB
21.6dB
0
1
0
0
1
1
1UF
0509 Solve MIC no function
0605 change Cap size to solve DFB issue.
0605 Remove Transisters.
0804 Reserve ESD doide
R429
0_0402_5%
12
C519 47P_0402_50V8J
1 2
C520
1U_0805_25V4Z
1
2
R300
0_0402_5%
12
D55
PSOT24C_SOT23-3
@
2
3
1
+
C524 150U_B_6.3VM_R40M
1 2
C513 47P_0402_50V8J
1 2
R296
100K_0402_5%
12
C514 0.022U_0603_25V7K
1 2
JP7
E&T_3806-F04N-02RCONN@
1
1
2
2
3
3
4
4
GND1
5
GND2
6
R299
100K_0402_5%
@
12
C510
100P_0402_50V8J
1
2
C505
0.1U_0402_16V4Z
1
2
R431
4.7K_0402_5%
12
C512 0.022U_0603_25V7K
1 2
R430
4.7K_0402_5%
12
C517 47P_0402_50V8J
1 2
C506
0.1U_0402_16V4Z
1
2
C509
100P_0402_50V8J
1
2
C507
10U_0805_10V4Z
1
2
C511
100P_0402_50V8J
1
2
C516 0.022U_0603_25V7K
1 2
C518 0.022U_0603_25V7K
1 2
R297
0_0402_5%
12
+
C523 150U_B_6.3VM_R40M
1 2
U21
TPA6017A2_TSSOP20
GND4
1GND3
11 GND2
13 GND1
20
VDD 16
PVDD1 15
RIN-
17
BYPASS 10
NC 12
LOUT- 8
LOUT+ 4
ROUT- 14
ROUT+ 18
RIN+
7
LIN-
5
LIN+
9
GAIN0 2
GAIN1 3
PVDD2 6
SHUTDOWN
19
THERMAL PAD
21
JP48
ACES_85201-1205N
CONN@
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
GND
13
GND
14
R298
100K_0402_5%
12
R295
100K_0402_5%
@
12
C508
100P_0402_50V8J
1
2
C515 47P_0402_50V8J
1 2 D56
PSOT24C_SOT23-3
@
2
3
1
R294
0_1206_5%
12
C642
1U_0603_10V4Z
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SMB_CK_CLK0
SMB_CK_DAT0
ACCEL_INT <20>
HDD_HALTLED <35>
SMB_CK_DAT0 <9,10,16,21>
SMB_CK_CLK0 <9,10,16,21>
+3VS_ACL_IO
+3VS_ACL
+3VS_ACL+3VS +3VS_ACL_IO
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
Accelerometer
Custom
31 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
ACCELEROMETER
0011101b
Must be placed in the center of the system.
VDDIO absolute man
rating is VDD+0.1
U22
LIS302DLTR_LGA14_3x5
SCL / SPC 14
GND
2
Reserved
3
GND
4
GND
5
CS
7
Vdd_IO
1
Vdd
6
SDA / SDI / SDO 13
SDO 12
Reserved 11
GND 10
INT 2 9
INT 1 8
C527
0.1U_0402_16V4Z
1
2
C528
10U_0805_6.3V6M
1
2
R311
0_0402_5%
1 2
R310
0_0402_5%
1 2
R308 0_0603_5%
1 2
D19
CH751H-40PT_SOD323-2
2 1
R312 10K_0402_5%
12
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
USB20_P3
USB20_N3
USB20_N1_R
USB20_P1_R
SATA_TXP2
SATA_TXN2
USB20_N1_R
USB20_P1_R
SATA_RXP2
SATA_RXN2
SATA_TXP2
SATA_TXN2
USB_EN#
+3VS_FB
USB20_N4
USB20_P4
+3VS_FB
USB20_N4
USB20_P4
USB20_N0_R
USB20_P0_R
USB_EN#
USB20_N2_R
USB20_P2_R
USB20_N2_R
USB20_P2_R
USB20_N0_R
USB20_P0_R
USB20_P3
USB20_N3
USB20_P1<21>
USB20_N1<21>
SATA_TXP2<22> SATA_TXN2<22>
SATA_RXN2_C<22> SATA_RXP2_C<22>
USB20_P4<21> USB20_N4<21>
BT_OFF<22>
USB20_P0<21>
USB20_N0<21>
USB20_P2<21>
USB20_N2<21>
USB_EN#<34>
BT_LED <35>
CH_DATA <27>
CH_CLK <27>
USB20_P3 <21>
USB20_N3 <21>
+3VAUX_BT+3VALW
+3VAUX_BT
+USB_VCCA
+USB_VCCA
+USB_VCCA+5VALW +USB_VCCA
+3VS+3VALW
+USB_VCCA
+5VALW
+USB_VCCB+5VALW
+USB_VCCB
+5VALW
+3VAUX_BT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
USB, BT, eSATA,FPR
Custom
32 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
BT Connector
Check BT power consumption < 1A
W=100mils
ESATA Combo
Finger printer
Max 0.5A
Max 2.5A
Max 2.5A
W=100mils
USB-3
E-SATA Combo & USB-1
0605 add GND shaping
0509 Solve MIC no function
0730 change conn fix DFB issue.
0804 moute it for ESD.
C541
0.01U_0402_16V7K
1
2
JP10
ACES 87213-0800G
CONN@
11
22
33
44
55
66
77
88
GND1 9
GND2 10
C542
0.1U_0402_16V4Z
1
2
C544 0.1U_0402_16V4Z
1 2
C540
1U_0603_10V4Z
1
2
C543
4.7U_0805_10V4Z
1
2
C535 1000P_0402_50V7K
1 2
C545
0.1U_0402_16V4Z
1
2
D25
PRTR5V0U2X_SOT143-4
GND 1
IO1 2
IO2
3
VIN
4
USB
ESATA
JP8
TYCO_1759576-1
CONN@
B_VCC
1
B_D-
2
B_D+
3
B_GND
4
GND
5
A+
6
A-
7
GND
8
B-
9
B+
10
GND
11
SHIELD 12
SHIELD 13
SHIELD 14
SHIELD 15
C537
4.7U_0805_10V4Z
1
2
+
C536
150U_D_6.3VM
1
2
L54
WCM-2012-900T_4P
1
1
4
433
22
R318
0_0603_5%
1 2
C539
1000P_0402_50V7K
1
2
G
D
S
Q20 SI2301BDS-T1-E3_SOT23-3@
2
13
C533
1000P_0402_50V7K
1
2
G
D
S
Q21 SI2301BDS-T1-E3_SOT23-3
2
13
L56
WCM-2012-900T_0805
1
122
33
4
4
C538
0.1U_0402_16V4Z
1
2
C534 1000P_0402_50V7K
1 2
D23
PRTR5V0U2X_SOT143-4@
GND 1
IO1 2
IO2
3
VIN
4
U24
TPS2061IDGN_MSOP8~N
GND
1
IN
2
OC# 5
OUT 6
OUT 8
IN
3
EN#
4
OUT 7
R317
0_0603_5%@
1 2
+
C530
150U_D_6.3VM
1
2
R315
100K_0402_5%
12
L55
WCM-2012-900T_0805
1
122
33
4
4
C531
4.7U_0805_10V4Z
1
2
JP9
SUYIN_020173MR004S592ZL
CONN@
USB+5V
1
USBN1
2
USBP1
3
GND
4SHADIN 5
SHADIN 6
C532
0.1U_0402_16V4Z
1
2
D22
PRTR5V0U2X_SOT143-4@
GND 1
IO1 2
IO2
3
VIN
4
JP12
ACES_85201-04051
CONN@
1
1
2
2
3
3
4
4G1 5
G2 6
U23
TPS2061IDGN_MSOP8~N
GND
1
IN
2
OC# 5
OUT 6
OUT 8
IN
3
EN#
4
OUT 7
R313 1K_0402_5%@1 2
D24
PRTR5V0U2X_SOT143-4@
GND 1
IO1 2
IO2
3
VIN
4
JP11
SUYIN_020173MR004S592ZL
CONN@
USB+5V
1
USBN1
2
USBP1
3
GND
4SHADIN 5
SHADIN 6
D21
PRTR5V0U2X_SOT143-4@
GND 1
IO1 2
IO2
3
VIN
4
D20
PRTR5V0U2X_SOT143-4@
GND 1
IO1 2
IO2
3
VIN
4
R316
10K_0402_5%
1 2
R314 1K_0402_5%@1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LPC_AD2
CLK_PCI_SIO
PLT_RST#
LPC_DRQ#
LPC_AD1
LPC_FRAME#
SIRQ
LPC_AD0
LPC_AD3
SPI_CLK
EC_SI_SPI_SO <34>
SMB_EC_CK1<7,34,35,37> SMB_EC_DA1<7,34,35,37>
SPI_CLK<34>
EC_SO_SPI_SI<34>
SPI_CS#<34>
LPC_FRAME#<20,34>
LPC_AD0 <20,34>
PLT_RST# <12,15,20,26,27,34>
LPC_AD2 <20,34>
SIRQ<20,34>
LPC_AD3<20,34>
LPC_AD1<20,34>
CLK_PCI_SIO <20>
LPC_DRQ# <20>
+3VL
+3VALW
+3VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
BIOS ROM/Debug Tool
Custom
33 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
SPI Flash (8Mb*1)
20mils
LPC Debug Port
0605 Remove LPC debug connector
0605 remove 0 ohm resisters
U26
AT24C16AN-10SI-2.7_SO8@
A0 1
A1 2
SDA
5SCL
6
VCC
8
A2 3
GND 4
WP
7
C548
22P_0402_25V8K
@ 1
2
C546
0.1U_0402_16V4Z
1
2
R324
100K_0402_5%
@
12
R319
100K_0402_5%
@
12
H1
DEBUG_PAD@
1
2
3
4
56
7
8
9
10
&U1
SST25VF080B-50-4C-S2AF_SO8
45@
C550
22P_0402_50V8J
@
1
2
R329
22_0402_5%
@
1 2
R325
33_0402_5%
@
1 2
U25
WIESON G6179 8P SPI
CONN@
S
1
VCC
8
Q2
HOLD
7
VSS 4
D
5
C
6
W
3
C547
0.1U_0402_16V4Z@
1
2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
EC_SMI#
BAT_LED#
LPC_FRAME#
IREF
LID_SW#
SIRQ
GATEA20
KB_RST#
LPC_AD2
LPC_AD1
LPC_AD3
LPC_AD0
ECAGND
PLT_RST#
TP_CLK
TP_DATA
ECAGND
INV_PWM
FAN_PWM
BATT_TEMP
EC_SCI#
CLK_PCI_EC
KSI3
CRY1
CRY2
KSI0
KSI5
KSI2
KSI4
KSO15
EC_RSMRST#
BKOFF#
SMB_EC_CK1
SMB_EC_DA1
VR_ON
SMB_EC_CK1
SMB_EC_DA1
SUSP#
LID_SW#
CIR_IN
FSTCHG
KSO12
KSO13
KSO14
KSO4
KSO8
KSO6
KSO3
KSO0
KSO1
KSO2
KSO7
KSO5
KSO11
KSO10
SMB_EC_CK2
SMB_EC_DA2
BATT_OVP
SYSON
SB_PWRGD
ACOFF
ECRST#
SLP_S3#
TP_CLK
TP_DATA
ON/OFFBTN_LED#
SLP_S5#
E51_TXD
E51_RXD
TP_BTN#
TP_LED#
SUSP#
PWRBTN_OUT#
SYSON
KSO9
KSI6
SMB_EC_CK2
SMB_EC_DA2
ACIN_D
ACIN_D
WL_BLUE_LED#
TP_BTN#
ESB_DAT
ESB_CLK
CIR_IN
BATT_OVP
ESB_DAT
ESB_CLK
AC_LED#
LAN_POWER_OFF
E51_TXD
E51_RXD
VLDT_EN
KSO12
KSI6
KSO3
KSO4
KSO2
KSO10
KSI4
KSI0
KSO6
KSO1
KSI3
KSI1
KSI7
KSO0
KSO7
KSO13
KSO5
KSO9
KSO8
KSI2
KSI5
KSO11
KSO14
KSI7
KSI1
EC_BEEP
KSO15
KSO12
KSO3
KSO4
KSO2
KSO10
KSI4
KSI0
KSO6
KSO1
KSI3
KSI1
KSO0
KSO7
KSO13
KSO5
KSO9
KSO8
KSI2
KSI5
KSO11
KSO15
KSO14
KSI6
KSI7
+BK_PWR
CIR_IN <30>
LPC_FRAME#<20,33> SIRQ<20,33>
LPC_AD1<20,33> LPC_AD2<20,33>
LPC_AD0<20,33>
LPC_AD3<20,33>
CLK_PCI_EC<20,24>
EC_SCI#<21>
SMB_EC_DA1<7,33,35,37> SMB_EC_CK1<7,33,35,37>
SMB_EC_CK2<7> SMB_EC_DA2<7>
EC_SI_SPI_SO <33>
EC_SO_SPI_SI <33>
SPI_CS# <33>
SPI_CLK <33>
BATT_TEMP <37>
BATT_OVP <37>
FAN_PWM <5>
DAC_BRIG <18>
SYSON <27,35,36,40>
LID_SW#<35>
EC_RSMRST# <21>
EC_ON <36,39>
BAT_LED# <35>
VR_ON <43>
ADP_I <38>
GATEA20<21> KB_RST#<21>
EC_THERM# <22>
ON/OFFBTN_LED# <35>
INV_PWM <18>
SLP_S3#<21> SLP_S5#<21> EC_LID_OUT# <21>
EC_SMI#<21>
ON/OFF#<35>
TP_CLK <35>
TP_DATA <35>
SB_PWRGD <7,21,43>
BKOFF# <18>
VGATE <43>
VLDT_EN<36>
STD_ADP <38>
AC_SET <38>
IREF <38>
ACOFF <38>
FSTCHG <38>
ENBKL <12>
USB_EN# <32>
EC_MUTE# <30>
ADP_ID <37>
I2C_INT <35>
TP_BTN# <35>
CAPS_LED# <35>
TP_LED# <35>
SUSP# <27,29,36,38,41>
PWRBTN_OUT# <21>
PCI_SERR# <20>
EAPD_CODEC <29>
PLT_RST#<12,15,20,26,27,33>
VCTRL <38>
AC_IN <22,38>
WL_BLUE_LED# <35>
H_THERMTRIP#_EC<7>
HDARST#<21,24>
EC_BEEP <29>
VFIX_EN <43>
AC_LED# <37>
NUM_LED#<35>
LAN_POWER_OFF<26>
ESB_DAT<35> ESB_CLK<35>
+EC_AVCC
+3VL_EC
+EC_AVCC
+3VL_EC
+3VL
+5V_TP
+3VL +3VL_EC
+3VALW
+3VL
+3VL
+3VS
+3VL
+3VS
+3VL
+5VL
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
EC KB926/KB conn
Custom
34 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
For EMI
KB Back Light Conn
KBD CONN
EC DEBUG port
0509 change value to solve ENE cap-board could not detect
0605 Change pin assignment
0605 Change value to solve AC
plugged/unplugged power status
issue.
30 mils
0619 change pin assignment
C566 100P_0402_25V8K@1 2
R331 4.7K_0402_5%
1 2
C588 4.7U_0805_10V4Z
12
R339
10K_0402_5%
12
C571 100P_0402_25V8K@1 2
C577 100P_0402_25V8K@1 2
R338
100K_0402_5%
12
R433
10K_0402_5%
12
C570 100P_0402_25V8K@1 2
C562 100P_0402_25V8K@1 2
C555
1000P_0402_50V7K
1
2
R414
0_0402_5%
1 2
C565 100P_0402_25V8K@1 2
C574 0.01U_0402_16V7K
1 2
R409 100K_0402_5%
1 2
C558 100P_0402_25V8K@1 2
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
U28
KB926QFC0_LQFP128_14X14
GA20/GPIO00
1
KBRST#/GPIO01
2
SERIRQ#
3
LFRAME#
4
LAD3
5
PM_SLP_S3#/GPIO04
6
LAD2
7
LAD1
8
VCC 9
LAD0
10
GND
11
PCICLK
12
PCIRST#/GPIO05
13
PM_SLP_S5#/GPIO07
14
EC_SMI#/GPIO08
15
LID_SW#/GPIO0A
16
SUSP#/GPIO0B
17
PBTN_OUT#/GPIO0C
18
EC_PME#/GPIO0D
19
SCI#/GPIO0E
20
INVT_PWM/PWM1/GPIO0F 21
VCC 22
BEEP#/PWM2/GPIO10 23
GND
24
EC_THERM#/GPIO11
25
FANPWM1/GPIO12 26
ACOFF/FANPWM2/GPIO13 27
FAN_SPEED1/FANFB1/GPIO14
28
FANFB2/GPIO15
29
EC_TX/GPIO16
30
EC_RX/GPIO17
31
ON_OFF/GPIO18
32
VCC 33
PWR_LED#/GPIO19
34
GND
35
NUMLED#/GPIO1A
36
ECRST#
37
CLKRUN#/GPIO1D
38
KSO0/GPIO20
39
KSO1/GPIO21
40
KSO2/GPIO22
41
KSO3/GPIO23
42
KSO4/GPIO24
43
KSO5/GPIO25
44
KSO6/GPIO26
45
KSO7/GPIO27
46
KSO8/GPIO28
47
KSO9/GPIO29
48
KSO10/GPIO2A
49
KSO11/GPIO2B
50
KSO12/GPIO2C
51
KSO13/GPIO2D
52
KSO14/GPIO2E
53
KSO15/GPIO2F
54
KSI0/GPIO30
55
KSI1/GPIO31
56
KSI2/GPIO32
57
KSI3/GPIO33
58
KSI4/GPIO34
59
KSI5/GPIO35
60
KSI6/GPIO36
61
KSI7/GPIO37
62
BATT_TEMP/AD0/GPIO38 63
BATT_OVP/AD1/GPIO39 64
ADP_I/AD2/GPIO3A 65
AD3/GPIO3B 66
AVCC 67
DAC_BRIG/DA0/GPIO3C 68
AGND
69
EN_DFAN1/DA1/GPIO3D 70
IREF/DA2/GPIO3E 71
DA3/GPIO3F 72
CIR_RX/GPIO40 73
CIR_RLC_TX/GPIO41 74
AD4/GPIO42 75
SELIO2#/AD5/GPIO43 76
SCL1/GPIO44
77
SDA1/GPIO45
78
SCL2/GPIO46
79
SDA2/GPIO47
80
KSO16/GPIO48
81
KSO17/GPIO49
82
PSCLK1/GPIO4A 83
PSDAT1/GPIO4B 84
PSCLK2/GPIO4C 85
PSDAT2/GPIO4D 86
TP_CLK/PSCLK3/GPIO4E 87
TP_DATA/PSDAT3/GPIO4F 88
FSTCHG/SELIO#/GPIO50 89
BATT_CHGI_LED#/GPIO52 90
CAPS_LED#/GPIO53 91
BATT_LOW_LED#/GPIO54 92
SUSP_LED#/GPIO55 93
GND
94
SYSON/GPIO56 95
VCC 96
SDICS#/GPXOA00 97
SDICLK/GPXOA01 98
SDIDO/GPXOA02 99
EC_RSMRST#/GPXO03 100
EC_LID_OUT#/GPXO04 101
EC_ON/GPXO05 102
EC_SWI#/GPXO06 103
ICH_PWROK/GPXO06 104
BKOFF#/GPXO08 105
WL_OFF#/GPXO09 106
GPXO10 107
GPXO11 108
SDIDI/GPXID0 109
PM_SLP_S4#/GPXID1 110
VCC 111
ENBKL/GPXID2 112
GND
113
GPXID3 114
GPXID4 115
GPXID5 116
GPXID6 117
GPXID7 118
SPIDI/RD# 119
SPIDO/WR# 120
VR_ON/XCLK32K/GPIO57 121
XCLK1
122
XCLK0
123 V18R 124
VCC 125
SPICLK/GPIO58 126
AC_IN/GPIO59 127
SPICS# 128
R330
0_0805_5%
1 2
C578 100P_0402_25V8K@1 2
L57
0_0603_5%
12
C586 100P_0402_50V8J
12
R348
4.7K_0402_5%
12
C567 100P_0402_25V8K@1 2
R353
0_0402_5%
12
R343
10K_0402_5%
1 2
R337
100K_0402_5%
12
Y5
32.768KHZ_12.5PF_9H03200413
OSC 4
OSC 1
NC
3
NC
2
R336 47K_0402_5%
1 2
R344 10K_0402_5%
12
C580 100P_0402_25V8K@1 2
C553
1000P_0402_50V7K
1
2
R341 10K_0402_5%
12
G
D
S
Q24
SI2301BDS-T1-E3_SOT23-3
2
1 3
R350
20M_0402_5%
@
12
R412
10K_0402_5%
1 2
C582 100P_0402_25V8K@1 2
R334 4.7K_0402_5%
1 2
C581 100P_0402_25V8K@1 2
C557 100P_0402_25V8K@1 2
C575 100P_0402_25V8K@1 2
C587
15P_0402_50V8J
1 2
R413
0_0805_5%
12
R347 4.7K_0402_5%
1 2
R345
300K_0402_5%
1 2
R415
0_0603_5%
@
1 2
D26
CH751H-40PT_SOD323-2
2 1
C579 100P_0402_25V8K@1 2
C552
0.1U_0402_16V4Z
1
2
C563100P_0402_50V8J 12
C589
15P_0402_50V8J
1 2
C568 100P_0402_25V8K@1 2
C556 100P_0402_25V8K@1 2
R340
10K_0402_5%
1 2
R332 4.7K_0402_5%
1 2
C561 100P_0402_25V8K@1 2
C573
15P_0402_50V8J@
1 2
R335
33_0402_5%@
1 2
C569 100P_0402_25V8K@1 2
C551
0.1U_0402_16V4Z
1
2JP15
ACES_85201-24051
CONN@
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
GND1 25
GND2 26
R333 4.7K_0402_5%
1 2
C560 100P_0402_25V8K@1 2
C572 100P_0402_25V8K@1 2
C554
0.1U_0402_16V4Z
1
2
C585 0.1U_0402_16V4Z
12
C576 100P_0402_25V8K@1 2
R342
10K_0402_5%
1 2
R346 4.7K_0402_5%
1 2
JP16
ACES_85201-04051 CONN@
11
22
33
44
G1
5
G2
6
R426
10_0805_5%~D
@
12
C559 100P_0402_25V8K@1 2
C590 0.1U_0402_16V4Z
1 2
C564 100P_0402_25V8K@1 2
L58
0_0603_5%
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
ON/OFFBTN_LED#
ON/OFFBTN_LED#
ON/OFF#
ESB_CLK
ESB_DAT ESB_CLK_R
ESB_DAT_R
SMB_EC_CK1
SMB_EC_DA1
TP_DATA
TP_CLK
TP_DATA
TP_CLK
WL/WW_LED#WL_BLUE_LED#
ESB_CLK_R
ESB_DAT_R
TP_BTN#
TP_LED#
ON/OFF#<34>
ON/OFFBTN_LED#<34>
HDD_HALTLED <31>
NUM_LED#<34>
BAT_LED#<34>
SATA_LED#<22>
HDD_HALTLED# <22>
ESB_CLK<34> ESB_DAT<34> I2C_INT<34>
SMB_EC_CK1<7,33,34,37>
SMB_EC_DA1<7,33,34,37>
CAPS_LED# <34>
TP_LED# <34>
TP_BTN# <34>
SYSON<27,34,36,40>
TP_DATA <34>
TP_CLK <34>
WL_LED# <27>
BT_LED <32>
WL_BLUE_LED#<34>
LID_SW#<34>
+5VS
+5VALW
+5VS
+5VALW
+5VALW
+5VS
+3VS
+5VS +3VL_CAP +3VL
+3VL_CAP+3VL
+5VS
+5VS
+5VALW +5V_TP
+5V_TP
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
TP,MDC,ON/OFF,S/W,LED,Reed
Custom
35 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
HDD/G-Sensor LED
Num LOCK LED
WHITE
POWER LED
WHITE
ON/OFF Button Connector
Battery Charge LED
White LED: VF=3V, IF = 10mA, Res = 200 ohm
Amber LED: VF=1.8V, IF = 8mA, Res = 390 ohm
WHITE
11/10 update
Capacitor Sensor Conn
ENE
Cypress
Capa-Lock Conn
Max 0.5A
TouchPAD ON/OFF
Max 0.5A
9/20
SP01000KC00/SP01E000900
M/B TO TP/B
WLAN and BT LED inform pin to KBC
0605 Remove LDO
0616 Reserve ENE Capboard EMI solution
0616 Reserve ENE Capboard EMI solution
300 ohm bead+ 33PF
0804 add Caps for ESD reserve
0804 Mout it for ESD
0804 Mout it for ESD
0804 Change value to adjust brightness
R369
1.2K_0402_5%
1 2
C591
0.1U_0402_16V4Z
@
1
2
C593
100P_0402_50V8J
@
1
2
G
D
S
Q43
2N7002_SOT23-3 2
13
C606
0.1U_0402_16V4Z
1
2
JP19
ACES_85201-04051
CONN@
1
1
2
2
3
3
4
4G1 5
G2 6
R361
10K_0402_5%
12
G
D
S
Q22
2N7002_SOT23-3
@
2
13
R400 0_0402_5%
1 2
C596
10U_0805_10V4Z
@
1
2
JP49
ACES_85201-04051
CONN@
11
22
33
44
G1
5
G2
6
C599
4.7U_0603_6.3V6K
1
2
R367
200_0402_5%
1 2
C597
15P_0402_50V8J
1
2
D29
HT-F196BP5_WHITE
21
C594
0.1U_0402_16V4Z
1
2
G
D
S
Q18
2N7002_SOT23-3@
2
13
D32
CH751H-40PT_SOD323-2
2 1
C598 33P_0402_50V8J
12
R402
100K_0402_5%
12
JP18
ACES_85201-04051
CONN@
11
22
33
44
G1
5
G2
6
R352
10K_0402_5%@
12
Q23B
2N7002DW-7-F_SOT363-6
3
5
4
R357 FBMA-11-100505-301T_0402
1 2
R351 0_0603_5%
1 2
G
D
S
Q19 SI2301BDS-T1-E3_SOT23-3@
2
13
R363
0_0402_5%
1 2
C600 33P_0402_50V8J@
12
D31
HT-F196BP5_WHITE
21
R356 FBMA-11-100505-301T_0402
1 2
C592
100P_0402_50V8J
@
1
2
Q23A
2N7002DW-7-F_SOT363-6
61
2
R354
0_0805_5%
12
JP21
ACES_85201-1005N
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
GND
11
GND
12
R398
47K_0402_5%
1 2
C601
15P_0402_50V8J
@
1
2
R358 0_0402_5%
1 2
R359
200_0402_5%
12
D30
HT-F196BP5_WHITE
21
R355 0_0402_5%
1 2
R360
390_0402_5%
12
D27
PSOT24C_SOT23-3
2
3
1
JP20
ACES_85201-04051
CONN@
11
22
33
44
G1
5
G2
6
R372
200_0402_5%
1 2
PJP605
PAD-OPEN 2x2m
@
21
C595
0.1U_0402_16V4Z
1
2
R399
10K_0402_5%@12
WHITE
YELLOW
D28
HT-297UY5/BP5_YELLOW-WHITE
21
43
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
RUNON
VLDT_EN#
EC_ON#
SUSP SYSON#
VLDT_EN#
SYSON#
VLDT_EN
SUSP SUSP
SYSON
SYSON#
SUSP
SUSP
RUNON
SUSP
SUSP
EC_ON#
SUSP
VLDT_EN#
1.8VS_ENABLE
SYSON#<42> SUSP <42>
EC_ON<34,39>
SUSP# <27,29,34,38,41>SYSON<27,34,35,40>
VLDT_EN<34>
VLDT_EN#
+5VL
B+
+1.2VALW +1.2V_HT
+5VALW +5VS
+5VL+5VL
+5VS
+3VS
+1.8VS
+0.9V
+5VL
+1.8VS
+1.8V
+1.2V_HT
+1.8V
+1.2VALW
B+
+3VALW +3VS
+1.5VS
+1.1VS
B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
DC/DC Circuits
Custom
36 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
+1.2VALW TO +1.2V_HT
+5VALW TO +5VS
+1.8V TO +1.8VS
Discharge circuit
+3VALW TO +3VS
0605 Add Resister to protect Q42
0605 Add Resister to protect Q41
JBK00-->750K
JBK00-->10M
H25
HOLEA
1
Q31B
2N7002DW-7-F_SOT363-6
3
5
4
H17
HOLEA
1
Q29A
2N7002DW-7-F_SOT363-6
61
2
C604
1U_0402_6.3V4Z
1
2
R378
330K_0402_5%
12
FM1
1
H13
HOLEA
1
Q34A
2N7002DW-7-F_SOT363-6
61
2
R387
470_0805_5%
1 2
Q33B
2N7002DW-7-F_SOT363-6
3
5
4
H4
HOLEA
1
Q36A
2N7002DW-7-F_SOT363-6
61
2
H21
HOLEA
1
C605
4.7U_0805_10V4Z
1
2
R389
100K_0402_5%
12
H24
HOLEA
1
C603 4.7U_0805_10V4Z
1
2
H19
HOLEA
1
H9
HOLEA
1
C608
4.7U_0805_10V4Z
1
2
C602
1U_0402_6.3V4Z
1
2
Q32A
2N7002DW-7-F_SOT363-6
61
2
H7
HOLEA
1
C621
0.01U_0402_25V7K
1
2
C618
4.7U_0805_10V4Z
1
2
R401
430K_0402_5%
1 2
Q42
IRF8113PBF_SO8
36
5
7
82
4
1
H15
HOLEA
1
FM5
1
Q35A
2N7002DW-7-F_SOT363-6
61
2
H11
HOLEA
1
H23
HOLEA
1
Q36B
2N7002DW-7-F_SOT363-6
3
5
4
C610
4.7U_0805_10V4Z
1
2
R382
100K_0402_5%
12
Q39
SI4800BDY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
R384
470_0805_5%
1 2
C613
1U_0402_6.3V4Z
1
2
R381
470K_0402_5%
1 2
H16
HOLEA
1
R376
330K_0402_5%
12
R383
470_0805_5%
1 2
R391
470_0805_5%
1 2
R388
100K_0402_5%
12
Q38
SI4800BDY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
Q30B
2N7002DW-7-F_SOT363-6
3
5
4
Q34B
2N7002DW-7-F_SOT363-6
3
5
4
R380
470_0805_5%
1 2
R385
470_0805_5%
1 2
Q31A
2N7002DW-7-F_SOT363-6
61
2
Q35B
2N7002DW-7-F_SOT363-6
3
5
4
Q30A
2N7002DW-7-F_SOT363-6
61
2
R393
470_0805_5%
1 2
C609
0.01U_0402_25V7K
1
2
Q32B
2N7002DW-7-F_SOT363-6
3
5
4
H2
HOLEA
1
C619
4.7U_0805_10V4Z
1
2
H8
HOLEA
1
Q29B
2N7002DW-7-F_SOT363-6
3
5
4
FM4
1
C616 4.7U_0805_10V4Z
1
2
R390
100K_0402_5%
12
H18
HOLEA
1
H6
HOLEA
1
H14
HOLEA
1
R392
470_0805_5%
1 2
H10
HOLEA
1
H22
HOLEA
1
H20
HOLEA
1
Q41
IRF8113PBF_SO8
36
5
7
82
4
1
H3
HOLEA
1
FM2
1
H5
HOLEA
1
Q33A
2N7002DW-7-F_SOT363-6
61
2
C620
0.01U_0402_25V7K
1
2
C615
1U_0402_6.3V4Z
1
2
R386
470_0805_5%
1 2
R379
330K_0402_5%
1 2
FM6
1
FM3
1
C614
10U_0805_10V4Z
1
2
H12
HOLEA
1
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
EC_SMD
EC_SMC
SMB_EC_DA1
SMB_EC_CK1
ADP_SIGNAL
ADPINADPIN
BATT_OVP <34>
EN0 <7,39>
SMB_EC_CK1 <7,33,34,35>
SMB_EC_DA1 <7,33,34,35>
BAT_ID <38>
BATT_TEMP <34>
ADP_ID <34>
AC_LED# <34>
+5VS
+5VALW
BATT_A
+5VALW
VMB
+3VL
BATT_A
VIN
+3VALW
+3VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
DC Connector/CPU_OTP
Custom
37 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
CPU
PH1 under CPU botten side :
CPU thermal protection at 95 +-3 degree C
PR13
100_0402_5%
12
PC10
0.22U_0603_10V7K
12
PQ3
TP0610K-T1-E3_SOT23-3
2
1 3
PR9
100K_0402_5%
12
PC5
1000P_0402_50V7K
12
PC6
0.01U_0402_25V7K
12
PR4
499K_0402_1%
12
PR17
1K_0402_5%
12
PR2
10K_0402_5%
12
PR7
604K_0402_1%
1 2
PH1
10KB_0603_1%_TH11-3H103FT
12
PR8
2K_0402_5%
<BOM Structure>
1 2
PU1A
LM358ADT_SO8
+
3
-
201
P8
G
4
PR5
10K_0402_5%
12
G
D
S
PQ2
SSM3K7002FU_SC70-3
2
13
PC4
100P_0402_50V8J
12
PC7
2200P_0402_50V7K
12
PD4
RLZ3.6B TE-11 LL-34
12
PC11
1000P_0402_50V7K
12
PR6
105K_0402_1%
12
PC8
1000P_0402_50V7K
12
PR10
200K_0402_1%
1 2
PJP2
SUYIN_200275MR006G113ZL
BATT+ 1
TS 5
SMD 2
GND 6
SMC 3
B/I 4
GND
7
GND
8
PR14
100_0402_5%
12
PU1B
LM358ADT_SO8
+
5
-
607
P8
G
4
PC12
@1000P_0402_50V7K
12
PR16
6.49K_0402_1%
1 2
PL1
HCB2012KF-121T50_0805
1 2
PR15
150K_0402_1%
12
PD3
PJSOT24C_SOT23-3
2
3
1
PL2
HCB2012KF-121T50_0805
1 2
BATT1
CR2032 RTC BATTERY
45@
PL4
HCB2012KF-121T50_0805
1 2
PD2
PJSOT24C_SOT23-3
2
31
PC2
100P_0402_50V8J
12
PC3
1000P_0402_50V7K
12
PD1
@PJSOT24C_SOT23-3
2
3
1
PC1
0.01U_0402_25V7K
12
PR12
2.21K_0402_1%
12
PR3
10K_0402_5%
1 2
PR1
340K_0402_1%
12
PJP1
ACES_87343-047N-2
11
33
44
22
PR11
150K_0402_1%
1 2
PC9
0.01U_0402_50V4Z
12
PL3
HCB2012KF-121T50_0805
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DL_CHG
DH_CHG
LX_CHG
CHGEN#
REGNVADJ
BATT
ACDET
ACSET
IADAPT
CHGEN#
FSTCHG#
ACDET
VIN_1
PACIN
ACOFF#
ACOFF#
ACSET
VIN_1
BST_CHG
STD_ADP
PACIN
PACIN_1
PACIN_2
PACIN_2
PACIN
IREF <34>
VCTRL<34>
ADP_I<34>
BAT_ID <37>
AC_SET<34>
SUSP#<27,29,34,36,41>
AC_IN <22,34>
STD_ADP <34>
FSTCHG<34>
ACOFF<34>
PACIN_1 <39>
VIN
P4
BATT
VIN
VIN
BATT
B+
VIN
CHG_B+
CHG_B+
P2
VIN
+3VL
BQ24740VREF
1.24VREF
BQ24740VREF
+3VL
+3VL
+3VL
1.24VREF
VIN
+3VL
+3VL
BATT_A
+3VL+3VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
Charger
38 46Monday, September 08, 2008
2007/05/29 2008/05/29
Compal Electronics, Inc.
Charge Detector
Add one shoot schmeatic.
PU102B
LM393DG_SO8
+
5
-
6O7
P8
G
4
PR151
150K_0402_5%
12
PR108
10_1206_5%
1 2
PR141
0_0402_5%
1 2
G
D
S
PQ117SSM3K7002FU_SC70-3
2
13
PR109
150K_0402_5%
12
PC115
4.7U_0805_25V6-K
12
PD105
RLS4148_LL34-2
12
PC114
4.7U_0805_25V6-K
12
PR127
10K_0402_1%
12
G
D
S
PQ113
SSM3K7002FU_SC70-3
2
13
PQ102
FDS6675BZ 1P SO8
3 6
5
7
8
2
4
1
PR139
@4.7_1206_5%
1 2
PR117
100K_0402_5%
1 2
PD101
1SS355_SOD323-2
1 2
PQ103
SI4835BDY-T1-E3 1P SO8
3 6
5
7
8
2
4
1
PQ104
DTA144EUA_SC70-3
2
1 3
PR103
47K_0402_5%
1 2
PC101
47P_0402_50V8J
12
PC126
1000P_0402_50V7K
12
PC127
22P_0402_50V8J
12
PR134
10K_0402_5%
12
PQ110
FDS6690AS_SO8
3 6
5
7
8
2
4
1
PD102
1SS355_SOD323-2
12
PQ118
DTA144EUA_SC70-3
2
1 3
PQ101
SI4835BDY-T1-E3 1P SO8
36
5
7
82
4
1
PR131
133K_0402_1%
12
PC111
0.1U_0402_10V7K
1 2
PU103
APL1431LBBC-TR_SOT23-5
NC 2
REF
4
NC 1
CATHODE 3
ANODE
5
PR113
143K_0402_1%
12
PR101
47K_0402_5%
1 2
PR107
47K_0402_1%
1 2
PC120
0.22U_0603_10V7K
12
PR140
100K_0402_5%
12
PQ106
DTC115EUA_SC70-3
2
13
PR144
0_0402_5%
1 2
PR120
133K_0402_1%
12
PR110
0_0402_5%
1 2
PC125
0.1U_0603_25V7K
12
PR133
10K_0603_0.1%
12
PC132
0.047UF_0402_16V7
12
PC124
0.1U_0603_25V7K
12
PR128
10K_0402_5%
12
PQ108
AO4466_SO8
3 6
5
7
8
2
4
1
PR125
47_1206_5%
12
PC130
@0.068U_0402_16V7K
1 2
PR149
560K_0402_1%
12
PC129
1500P_0402_50V7K
12
PR150
200K_0402_5%
12
PR148
10K_0402_5%
1 2
G
D
S
PQ109
SSM3K7002FU_SC70-3
2
13
PC117
1U_0603_10V6K
12
PC112
1U_0603_6.3V6M
1 2
PC103
4.7U_0805_25V6-K
12
G
D
S
PQ115
SSM3K7002FU_SC70-3
2
13
PL101
HCB2012KF-121T50_0805
1 2
G
D
S
PQ116
SSM3K7002FU_SC70-3
2
13
PR146
4.7K_0402_5%
12
PR121
200K_0402_1%
12
PR122
681K_0402_1%
1 2
PC121
100P_0402_50V8J
12
PR104
0_0402_5%
1 2
PC119
1U_0603_10V6K
12
PC133
47P_0402_50V8J
1 2
PR118
10K_0402_5%
1 2
PR123
1M_0402_5%
1 2
PR114
@0_0402_5%
1 2
PR111
3K_0402_1%
1 2
PC113
4.7U_0805_25V6-K
12
PU102A
LM393DG_SO8
+
3
-
2O1
P8
G
4
PR147
220K_0402_1%
12
G
D
S
PQ119
SSM3K7002FU_SC70-3
2
13
PC122
@0.1U_0603_25V7K
12
PR135
10K_0603_0.1%
12
PC123
0.1U_0402_10V7K
12
G
D
S
PQ107
SSM3K7002FU_SC70-3
2
13
PD103
RLZ4.3B_LL34
12
PR129
10K_0402_1%
12
PC109
@0.1U_0603_25V7K
12
PR112
0.015_1206_1%
1 2
PR142
470K_0402_5%
12
PL102
10U_LF919AS-100M-P3_4.5A_20%
1 2
G
D
S
PQ120
SSM3K7002FU_SC70-3
2
13
PR102
0.012_2512_1%
1
3
4
2
PC105
4.7U_0805_25V6-K
12
PR106
200K_0402_5%
12
PR126
100K_0402_1%
12
PC118
0.1U_0402_10V7K
1 2
G
D
S
PQ112
SSM3K7002FU_SC70-3
2
13
PR136
60.4K_0402_1%
1 2
PR116
39K_0402_5%
12
PD104
1SS355_SOD323-2
<BOM Structure>
1 2
PC104
4.7U_0805_25V6-K
12
PC107
@0.01U_0402_16V7K
12
BQ24740RHDR_QFN28_5X5
PU101
ACP 3
LPMD 4
CHGEN 1
ACN 2
ACDET 5
ACSET 6
IADSLP
8
SRP
19
BAT
17
IADAPT
15
PGND 22
SRSET
16
ISYNSET
14
VADJ
12
VDAC
11
LPREF 7
VREF
10
DPMDET
21
LODRV 23
CELLS
20
SRN
18
AGND
9
REGN 24
EXTPWR
13
PH 25
HIDRV 26
BTST 27
PVCC 28
TP 29
PC106
0.47U_0603_16V7K
12
PC116
4.7U_0805_25V6-K
12
PU105
74LVC1G17GW TSSOP
A
2Y4
P5
NC 1
G
3
PC131
@680P_0603_50V7K
12
PR138
100K_0402_1%
12
PU104
74LVC1G17GW TSSOP
A
2Y4
P5
NC 1
G
3
PR132
100K_0402_5%
12
G
D
S
PQ111
SSM3K7002FU_SC70-3
2
13
PC102
1U_0603_6.3V6M
1 2
PR124
1K_0402_5%
1 2
PC110
1U_0805_25V6K
1 2
PR137
20K_0402_1%
1 2
PR105
10K_0402_5%
12
PQ114
FDS6675BZ 1P SO8
36
5
7
82
4
1
PC108
0.1U_0603_25V7K
12
PU106
74LVC1G14GW_SOT353-5
A
2Y4
P5
NC 1
G
3
PQ105
DTC115EUA_SC70-3
2
13
PR115
100K_0402_1%
12
PR143
470K_0402_5%
12
PR119
47K_0402_5%
12
PR130
10K_0402_1%
1 2
PC128
220P_0402_50V7K
12
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BST_5V
LX_5V
LG_3V
LX_3V
UG_3V
ENTRIP1
ENTRIP2
UG1_3V
UG_5V
BST_3V
ENTRIP2
ENTRIP1
LG_5V
EC_ON <34,36>
3/5V_OK <21,41>
PACIN_1<38>
EN0<7,37>
B++
+5VALWP
VL
+3VALWP
B++
B++
2VREF_51125
B+
+3VL
+3VLP
+3VLP
2VREF_51125
VL
+5VALWP
+3VALW
+5VALW
+3VALWP
+5VL
VL
+3VL
B++
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
3.3VALWP/5VALWP
Custom
39 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
(4.5A,180mils ,Via NO.= 9)
(3A,120mils ,Via NO.= 6)
PR317
100K_0402_5%
12
PJP304
PAD-OPEN 2x2m
2 1
G
D
S
PQ307
SSM3K7002FU_SC70-3
2
13
PC305
4.7U_0805_25V6-K
12
G
D
S
PQ308
SSM3K7002FU_SC70-3
2
13
PR304
20K_0402_1%
1 2
PR310
0_0402_5%
1 2
PR302
30.9K_0402_1%
1 2
+
PC310
150U_D_6.3VM
1
2
PR315
@4.7_1206_5%
12
PC314
@680P_0603_50V8J
12
PR316
@4.7_1206_5%
12
PC303
4.7U_0805_25V6-K
12
PJP303
PAD-OPEN 4x4m
1 2
PC304
2200P_0402_50V7K
12
PC308
0.1U_0402_10V7K
1 2
PR314
100K_0402_5%
12
PR301
13.7K_0402_1%
1 2
PR309
0_0402_5%
1 2
PR307
0_0402_5%
1 2
G
D
S
PQ306
SSM3K7002FU_SC70-3
2
13
PR312
1M_0402_1%
1 2
PC318
0.047U_0603_16V7K
12
PL303
4.7UH_PCMC063T-4R7MN_5.5A_20%
1 2
PJP302
PAD-OPEN 4x4m
1 2
PC302
0.22U_0603_10V7K
12
PC312
0.1U_0603_25V7K
12
PQ302
AO4466_SO8
3 6
5
7
8
2
4
1
PC307
0.1U_0402_10V7K
1 2
PR311
191K_0402_1%
12
PR308
2.2_0402_5%
1 2
PR318
604K_0402_1%
1 2
PQ303
AO4468_SO8
3 6
5
7
8
2
4
1
PC306
10U_0805_6.3V6M
12
PC313
4.7U_0805_25V6-K
12
PC315
@680P_0603_50V8J
12
PR306
115K_0402_1%
1 2
G
D
S
PQ305
SSM3K7002FU_SC70-3 2
13
PR305
115K_0402_1%
1 2
PR313
100K_0402_5%
1 2
PQ301
AO4466_SO8
3 6
5
7
8
2
4
1
+
PC309
150U_D_6.3VM
1
2
PJP301
PAD-OPEN 2x2m
2 1
PQ304
FDS6690AS_NL_SO8
3 6
5
7
8
2
4
1
PC311
10U_0805_10V6K
12
PL302
4.7UH_SIQB74B-4R7PF_4A_20%
12
PU301
TPS51125RGER_QFN24_4X4
VREF 3
TONSEL 4
ENTRIP1 1
VFB1 2
VFB2 5
ENTRIP2 6
VREG3
8
DRVL1 19
VREG5
17
GND
15
VBST1 22
VIN
16
SKIPSEL
14
DRVL2
12
LL2
11
VO2
7
DRVH2
10 DRVH1 21
PGOOD 23
LL1 20
VCLK
18
VBST2
9
VO1 24
EN0
13
P PAD
25
PL301
HCB2012KF-121T50_0805
1 2
PC301
2200P_0402_50V7K
12
PR303
20K_0402_1%
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+5VALW
DH_1.8V
1.8V_B+
DL_1.8V
LX_1.8V
BST1_1.8VBST_1.8V
DH_1.8V_1
+5VALW+5VALW
SYSON<27,34,35,36>
+1.8VP
+1.8VP
+5VALW
+1.8VP
B+
+1.8V
+1.8VP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
1.8VP
40 46Monday, September 08, 2008
2007/05/29 2008/05/29
Compal Electronics, Inc.
(7A,280mils ,Via NO.= 14)
PC412
@680P_0603_50V8J
12
PU401
TPS51117RGYR_QFN14_3.5x3.5
VOUT
3
V5FILT
4
EN_PSV 1
TON
2
VFB
5
PGOOD
6DRVL 9
DRVH 13
LL 12
GND
7
PGND
8
TRIP 11
V5DRV 10
VBST 14
TP 15
PQ402
FDS6690AS_NL_SO8
3 6
5
7
8
2
4
1
PR405
0_0402_5%
12
PC404
4.7U_0805_25V6-K
12
PR410
0_0402_5%
1 2
PC401
@1000P_0402_50V7K
12
PC403
4.7U_0805_25V6-K
12
PC409
1U_0603_10V6K
12
PC413
@10P_0402_50V8J
1 2
+
PC408
220U_D2_4VY_R25M
1
2
PC415
4.7U_0805_10V6K
12
PR403
316_0402_1%
12
PL401
HCB1608KF-121T30_0603
1 2
PR409
10K_0603_0.1%
12
PR407
@4.7_1206_5%
12
PC402
0.1U_0402_10V7K
1 2
PR404
255K_0402_1%
1 2
PL402
2.2UH_PCMC063T-2R2MN_8A_20%
1 2
PR401
0_0402_5%
1 2
PQ401
AO4466_SO8
3 6
5
7
8
2
4
1
PR408
14.3K_0603_0.1%
1 2
PC405
2200P_0402_50V7K
12
PJP401
PAD-OPEN 4x4m
1 2
PR406
10.7K_0402_1%
1 2
PR402
0_0402_5%
1 2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LX_1.2V
UG1_1.1V
BST_1.2V
+1.2VALWP
LG_1.2V
UG1_1.2V
LG_1.1V
+1.1VSP
UG_1.2V
+1.1VSP
BST_1.1V
LX_1.1V
UG_1.1V
+1.2VALWP
+1.1VS
+1.1VSP
B+++
VCCP_POK
SUSP#<27,29,34,36,38>
3/5V_OK <21,39>
B+++
+1.2VALWP
B+
+1.1VSP
+5VALW
B+++
+1.1VS
+1.1VSP +1.2VALW
+1.2VALWP
+1.1VSP +1.1VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
1.1VSP/1.2VALWP
Custom
41 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
(4A,160mils ,Via NO.=8)
(6A,240mils ,Via NO.=12)
PR507
0_0402_5%
12
PQ503
FDS6690AS_NL_SO8
3 6
5
7
8
2
4
1
PR503
18.7K_0402_1%
12
PL502
HCB2012KF-121T50_0805
12
PQ502
AO4466_SO8
3 6
5
7
8
2
4
1
PC506
0.1U_0402_10V7K
12
PC512
0.1U_0402_16V7K
12
PR506
0_0402_5%
12
PC509
4.7U_0805_6.3V6K
12
PQ501
AO4466_SO8
3 6
5
7
8
2
4
1
PC502
2200P_0402_50V7K
12
PC514
1U_0603_10V6K
12
PR511
15.4K_0402_1%
1 2
PC503
@0.022U_0603_25V7K
12
PR518
0_0402_5%
1 2
PR5080_0402_5% 12
PU501
TPS51124RGER_QFN24_4x4
GND 3
TONSEL 4
VO1 1
VFB1 2
VFB2 5
VO2 6
EN2
8
DR VL1 19
TRIP1
17
V5FILT
15
VBST1 22
V5IN
16
TRIP2
14
DR VL2
12
LL2
11
PGOOD2
7
DR VH2
10 DR VH1 21
EN1 23
LL1 20
PGND1
18
VBST2
9
PGOOD1 24
PGND2
13
P PAD
25
PR502
24.9K_0402_1%
1 2
PC515
4.7U_0805_10V6K
12
PC505
2200P_0402_50V7K
12
PL503
3.3UH 30% MSCDRI-7030AB-3R3N 4.1A
1 2
PJP503
PAD-OPEN 4x4m
1 2
PC507
0.1U_0402_10V7K
1 2
PR514
3.3_0402_5%
1 2
PC513
@0.1U_0402_10V7K
12
PR512
33K_0402_5%
1 2
PR505
0_0402_5%
1 2
PR515
1K_0402_5%
12
PJP502
PAD-OPEN 4x4m
1 2
PR513
0_0402_5%
12
PQ504
AO4468_SO8
3 6
5
7
8
2
4
1
PR517
10_0402_5%
1 2
PC501
4.7U_0805_25V6-K
12
PR501
11.5K_0402_1%
1 2
PL501
2.2UH_PCMC063T-2R2MN_8A_20%
12
PC510
4.7U_0805_6.3V6K
1 2
PC517
4.7U_0805_25V6-K
12
PR510
10.5K_0402_1%
12
+
PC508
220U_D2_4VY_R25M
1
2
PR504
11.5K_0402_1%
12
PR509
0_0402_5%
12
PC504
4.7U_0805_25V6-K
12
PJP501
PAD-OPEN 4x4m
1 2
+
PC511
220U_B_2.5VM_R35M
1
2
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
VREF1.5V
SUSP<36>
SYSON#<36>
SUSP<36>
+5VALW
+0.9VP
+1.8V
+5VALW
+1.5VSP
+1.8V
+0.9VP +0.9V
+1.5VSP +1.5VS
+2.5VSP
+3VS
+2.5VSP +2.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
0.9VSP/2.5VSP/1.5VSP
Custom
42 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
(2A,80mils ,Via NO.= 4)
(1A,40mils ,Via NO.= 2)
(500mA,40mils ,Via NO.= 1)
(500mA,40mils ,Via NO.= 1)
PJP602
PAD-OPEN 3x3m
1 2
PC608
4.7U_0805_6.3V6K
12
G
D
S
PQ601
SSM3K7002FU_SC70-3
2
13
PC614
10U_0805_6.3V6M
12
PC601
10U_0805_10V4Z
12
PC606
@0.1U_0402_16V7K
12
PU602
APL5508-25DC-TRL_SOT89-3
IN
2
GND
1
OUT 3
PR608
0_0402_5%
1 2
PU603
G2992F1U_SO8
VOUT
4
NC 5
GND
2
VREF
3
VIN
1VCNTL 6
NC 7
NC 8
TP 9
PR606
1K_0402_1%
12
PR604
@0_0402_5%
1 2
PC611
0.1U_0402_16V7K
12
PC613
10U_0805_10V4Z
12
PC607
1U_0603_6.3V6M
12
PR602
0_0402_5%
1 2
PC605
10U_0805_6.3V6M
12
PR603
1K_0402_1%
12
PC603
1U_0603_16V6K
12
PC612
1U_0603_16V6K
12
PR601
1K_0402_1%
12
PR607
5.1K_0402_1%
12
PC610
@0.1U_0402_16V7K
12
PJP601
PAD-OPEN 3x3m
1 2
G
D
S
PQ602
SSM3K7002FU_SC70-3
2
13
PC604
0.1U_0402_16V7K
12
PJP603
PAD-OPEN 3x3m
1 2
PR605
@150_1206_5%
12
PU601
G2992F1U_SO8
VOUT
4
NC 5
GND
2
VREF
3
VIN
1VCNTL 6
NC 7
NC 8
TP 9
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BOOT_NB1
ISP 0
+CPU_CORE_0
BOOT0
UGATE0
LGATE0
BOOT1
LGATE1
UGATE1
PHASE1
ISP 0
PHASE0
ISP 1
+CPU_CORE_1
ISP 1
VSEN1
BOOT_NB
RTN_NB
SVD
SVC
UGATE NB
PHASE NB
PHASE NB
UGATE NB
LGATE NB
LGATE NB
VSEN_NB
RTN1
VSEN0
RTN0
ISL6265_PWROK
ISL6265_PWROK
UGATE0_1
UGATE1_1
ISL6265_PWROK
VDD_NB_FB_H<7>
VGATE<34>
SB_PWRGD<7,21,34>
CPU_SVD<7>
CPU_SVC<7>
VR_ON<34>
CPU_VDD0_FB_H<7>
CPU_VDD0_FB_L<7>
CPU_VDD1_FB_L<7>
CPU_VDD1_FB_H<7>
VDD_NB_FB_L<7>
VFIX_EN<34>
H_PWRGD<20>
+CPU_CORE_0
+5VS
B+
CPU_B+
CPU_B+
+CPU_CORE_NB
CPU_B+
+5VS
CPU_B+
+3VS
+5VS
+CPU_CORE_1
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
CPU_CORE
Custom
43 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Connect to EC pin 110.
PU201
ISL6265IRZ-T_QFN48_6X6
PWROK
3
SVD
4
OFS/VFIXEN
1
PGOOD
2
SVC
5
ENABLE
6
OCSET
8
VDIFF1
19
RTN1
17
VSEN0
15
VW1
22
RTN0
16
ISN0
14
VW0
12
COMP0
11
RBIAS
7
FB0
10
COMP1
21
ISP1
23
FB1
20
VSEN1
18
VDIFF0
9
ISN1
24
ISP0
13
BOOT1 25
UGATE1 26
PHASE1 27
PGND1 28
LGATE1 29
PVCC 30
LGATE0 31
PGND0 32
PHASE0 33
UGATE0 34
BOOT0 35
BOOT_NB 36
UGATE_NB 37
PHASE_NB 38
LGATE_NB 39
PGND_NB 40
OCSET_NB 41
RTN_NB 42
VSEN_NB 43
FSET_NB 44
COMP_NB 45
FB_NB 46
VCC 47
VIN 48
TP
49
PQ203
AO4474_SO8
3 6
5
7
8
2
4
1
PR208
2_0402_5%
1 2
PC232
1200P_0402_50V7K
12
PC205
1000P_0402_50V7K
1 2
PQ207
AO4714 1N SO8
3 6
5
7
8
2
4
1
PR230
54.9K_0402_1%
1 2
PQ206
AO4474_SO8
3 6
5
7
8
2
4
1
PC244
@1000P_0402_50V7K
12
PC218
@680P_0603_50V8J
12
PL201 4.7UH 30% MSCDRI-7030AB-4R7N 3.3A
12
PL202
SMB3025500YA_2P
12
PR205
2_0402_5%
1 2
PR219
0_0603_5%
1 2
PR221
16.5K_0402_1%
12
PC246
@1000P_0402_50V7K
12
PR227
1K_0402_1%
1 2
PC231
180P_0402_50V8J
12
+
PC202
220U_B_2.5VM_R35M
1
2
PC213
4.7U_0805_25V6-K
12
PR218 0_0402_5%
1 2
PR240
1K_0402_1%
12
PC242
1000P_0402_50V7K
12
PR239
0_0402_5%
1 2
PC237
4.7U_0805_25V6-K
12
PC214
2200P_0402_50V7K
12
G
D
S
PQ209
SSM3K7002FU_SC70-3
2
13
PR204
22K_0402_1%
1 2
PR209
0_0402_5%
12
PC224
0.22U_0603_10V7K
1 2
PC221
4.7U_0805_25V6-K
12
PC215
1000P_0402_50V7K
12
PC239
220P_0402_50V7K
12
PC257
390P_0402_50V7K
12
PR223
34.8K_0402_1%
1 2
PR246 100K_0402_5%
1 2
PC206
0.1U_0402_16V7K
12
PC240
220P_0402_50V7K
12
+
PC238
100U_25V_M
1
2
PC226
@680P_0603_50V8J
12
PC245
@1000P_0402_50V7K
12
PR214
2.2_0603_5%
1 2
PR215
@10K_0402_5%
1 2
PR211
1_0603_5%
12
PC207
0.1U_0402_16V7K
12
PC235
4.7U_0805_25V6-K
12
PC219
0.1U_0603_25V7K 1 2
PL203
0.36UH_PCMC104T-R36MN1R17_30A_20%
12
PR226
0_0603_5%
1 2
PC228
1000P_0402_50V7K
1 2
PC255
390P_0402_50V7K
12
PC256
1500P_0402_50V7K
12
PC201
10U_0805_6.3V6M
12
PC216
0.1U_0603_25V7K
12
PC208
1200P_0402_50V7K
12
PC230
1000P_0402_50V7K
12
PR216
10K_0402_1%
12
PR213
@0_0402_5%
1 2
PC233
4700P_0402_25V7K
12
PQ205
AO4714 1N SO8
3 6
5
7
8
2
4
1
PR203
0_0402_5%
1 2
PC243
1000P_0402_50V7K
1 2
PR210
44.2K_0402_1%
12
PC254
1500P_0402_50V7K
12
PC225
1200P_0402_50V7K
1 2
PR222 0_0402_5%
1 2
PC234
4.7U_0805_25V6-K
12
PR238
54.9K_0402_1%
12
PC222
2200P_0402_50V7K
12
PR231
16.5K_0402_1%
12
PR225
255_0402_1%
1 2
PQ208
AO4714 1N SO8
3 6
5
7
8
2
4
1
PC227
180P_0402_50V8J
1 2
PR206
0_0402_5%
12
PR229
@4.7_1206_5%
12
PR237
0_0402_5%
1 2
PC203
2200P_0402_50V7K
12
PR220
@4.7_1206_5%
12
PC236
4.7U_0805_25V6-K
12
PC217
0.22U_0603_10V7K
1 2
PC210
2.2U_0603_6.3V6K
12
PL204
0.36UH_PCMC104T-R36MN1R17_30A_20%
12
PR234 @100K_0402_5%
1 2
PR233
4.02k_0603_1%
1 2
PQ202
AO4466_SO8
3 6
5
7
8
2
4
1
PR236
6.81K_0402_1%
12
PR243
255_0402_1%
12
PQ201
AO4468_SO8
3 6
5
7
8
2
4
1
PC229
0.1U_0603_25V7K 1 2
PQ204
AO4714 1N SO8
3 6
5
7
8
2
4
1
PR235
0_0402_5%
1 2
PR224
82.5K_0402_1%
1 2
PC209
33P_0402_50V8K
12
+
PC211
@47U_25V_M
1
2
PR241
0_0402_5%
1 2
PC223
4700P_0402_25V7K
1 2
PC204
4.7U_0805_25V6-K
12
PR232
6.81K_0402_1%
1 2
PR207
14K_0402_1%
12
PC241
1000P_0402_50V7K
12
PC212
4.7U_0805_25V6-K
12
PR228
2.2_0603_5%
1 2
PR212
0_0402_5%
1 2
PR217
4.02k_0603_1%
1 2
PC220
4.7U_0805_25V6-K
12
PC247
@1000P_0402_50V7K
12
http://mycomp.su/x/
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
Power Changed-List History-1
Custom
44 46Monday, September 08, 2008
2007/08/02 2008/08/02
Compal Electronics, Inc.
Version Change List ( P. I. R. List ) for Power Circuit
Page# Title Rev.Issue DescriptionItem Request
Owner
Date Solution Description
137
2
3
4
5
6
7
2008/05/21
2008/05/21
2008/05/21
2008/05/21
2008/05/21
2008/05/21
DC Connector
/CPU_OTP
1.1VSP/1.2VALWP
3.3VALWP/5VALWP
1.8VP
CPU_CORE
38
39
40
41
PWR
PWR
PWR
PWR
PWR
PWR
Charger
PR8 change the value from 100 to 2K.HW request 0.2
PWR request, solve inrush current. Modify PR102 footprint and PQ101,PQ103 change from AM4835 to SI4835BDY,
PQ103 change from AM4835 to FDS6675BZ, PC106 change from 0.22u to 0.47u, 0.2
0.2
0.2
0.2
0.2
PWR request, modify OCP
Add PR515 1k_0402_5%, PR511 change the value from 18.2K to 15.4K,
PR510 change the value from 17.8K to 10.5K.
Modify PC206 change the footprint from 0603 to 0402,
PR207 change the value from 15.4K to 14K.
42
PR305 change the value from 140K to 95.3K, PR306 change the value
from 133K to 105K, PC318 change the value from 0.022u to 0.047u.
PR406 change the value from 15.4K to 10.7K.PWR request, modify OCP.
For PWR request, prevent leakage
power and modify OCP.
PWR request
38
Charger
2008/06/04
PWR HP request Add 4 cell schematic, add net name BATT_A.
837
DC Connector
/CPU_OTP
2008/06/12
PWR Thermal request, prevent PH1
will OTP on TPDL. PR12 change the value from 2.55K to 2.21K.
0.2
9 38
Charger
2008/06/18
PWR PWR request Add PC133 220P_0402, PR147 change the value
from 100K_0402_5% to 470K_0402_1%.
0.2
0.2
10 39
3.3VALWP/5VALWP
2008/07/21
PWR requestPWR Add PR311 191K_0402_1%, PR312 1M_0402_1%.
11 38 2008/07/28
Charger PWR PWR request Add 4 cell one shoot schematic, add net name PACIN_2
0.2
0.3
http://mycomp.su/x/
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
HW PIR(1)
Custom
45 46Monday, September 08, 2008
2006/02/13 2006/03/10
Compal Electronics, Inc.
1
<2008.05.09>
M.B. Ver.
PAGE Modify ListFixed Issue and change itemItem
2
10
11
8
0.230
Remove R320~323 (0 ohm)
34 0.2
12
13
Remove R410 & R411 & C627
<2008.06.05>
Fix Audio MIC no function and follow Ripley schematics
add 150uF Cap to solve hot-plug for Multi-bay ODD
07 LDT_RST# & H_PWRGD_CPU & LDT_STOP# & CPU_LDT_REQ# change
power rail to +1.8VS
21
Remove HP switch Transisters and change Cap size to solve DFB issue.
Change Keyboard pin assignment to follow Ripley design
Remove R54 & R55 (0 ohm)
22
add Q24, R426
33
Change C523 & C524 size and remove Q16, Q17, Q24...
33
Remove JP14
34
change R345 to 300Kohm
Add R429, R430, R431, C642
34
0.2
0.2
0.2
0.2
0.2
7
25 Add C643 150uF
Change value to solve AC plugged/unplugged power status issue.
34
change power rail to solve +3vs leakage
remove U29....35
Add R381 & R40136
Add Keyboard backlight control circuit
12
30
Remove 0 ohm resisters at SPI ROM
Change R408 to 300k ohm
Fix ENE cap-board could not detect
Remove 0 ohm resisters at LDT_STOP# & CPU_LDT_REQ#
Change value to solve AC plugged/unplugged power status issue.
Remove Cap-sensor baord power LDO
0.2
0.2
0.2
0.2
0.2
1
0.2
Remove 0 ohm resisters at NB_PWRGD Remove R164 (0 ohm)
Remove LPC debug connector
Add Resister to protect Q42, Q41
14
<2008.06.16> 35 Add C600, C601 and Change R356, R357 size to 300ohm beadAdd and reserve EMI soulution for ENE cap-board
1
0.2
0.2
1
2
18 Add Q4 and R54 0.2
0.2
Solve LED panel flash issue when AC IN
change KB backlight connector pin assignment
<2008.06.19>
34 pin1 & 2 (Power), pin3 & 4 (GND) swapped
9
add GND shaping at E-SATA Add E-SATA GND shaping32
5
3
4
6
2
3
Fix BT no function and follow Ripley schematics
0.2
32 change BT pin assignment
change pin assignment (follow Ripley)
<2008.07.30>
1
2
change FPR connector to fix Assy DFB issue.
Fix external and internal MIC auto switch issue
pin1 & 2 (Po
w
29 add R301 and pull up +VDDA_CODEC_R 0.3
32 change pin count from 6 pins to 4 pins 0.3
<2008.08.01>
1
Vari-Bright design change for EC & RS780 common use 18, 12 Add D38, D39, R76 0.3
<2008.08.04>
1
Reserve Caps to protect ESD 35 Add C595, C606 0.3
Fix OTS#0392705 (WLAN Slot Pin 24 is tied to different power than pins 2, 52, 39 and 41)
Fix FPR ESD issue
Reserve ESD diode to protect SPK
Change R value for LED brightness
3
4
5
2
28 Change R276 value to 1.2Kohm
27 Unmount R245 and install R244
30 Add D55, D56
32 Install D25
0804 Change value to adjust LED brightness
Reserve Cap to protect T/P ON/OFF
7
6
35 Add C595, C606
35 Change R369 value to 1.2kohm
8
Install Cap to fix ESD issue 35 Install C597
<2008.09.04>
1
3
2
4
0.2
0.2
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.4
5
6
0.4
0.4
0.4
0.4
0.4
Remove Varibright function 12, 18 Uninstall D39, Delete D38
Change D16 footprint28Fix SMT DFX issue
Follow Vendor suggestion to change CR_LED# Change power rail from+5VS to +3vs28
Reserve R for protect LED panel flash control Add R41018
http://mycomp.su/x/
A
A
1 1
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-4481P
0.4
Notes List
Custom
46 46Monday, September 08, 2008
2007/08/28 2006/03/10
Compal Electronics, Inc.
Calypso power sequence
