NAVD0_LA6091P_R10_0303 COMPAL LA 6091P REV 1.0
User Manual:
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Page Count: 46
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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Cover Page
B
1 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Cover Page
B
1 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Cover Page
B
1 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Intel Pineview Processor with Tigerpoint + DDRII + NV OPTIMUS
NAVD0 Schematics Document
REV: 1.0
Compal Confidential
2010-02-09
DC301008S00
ZZZ4
LS-6094P
D0DA@
ZZZ4
LS-6094P
D0DA@
ZZZ5
LS-6095P
D0DA@
ZZZ5
LS-6095P
D0DA@
ZZZ6
LA-6091P
E0DA@
ZZZ6
LA-6091P
E0DA@
ZZZ7
LS-6097P
E0DA@
ZZZ7
LS-6097P
E0DA@
ZZZ8
LS-6096P
E0DA@
ZZZ8
LS-6096P
E0DA@
PJP1
DCIN
45@
PJP1
DCIN
45@
ZZZ9
LS-6098P
E0DA@
ZZZ9
LS-6098P
E0DA@
ZZZ1
PCB
D0DAZ@
ZZZ1
PCB
D0DAZ@
ZZZ10
LS-6099P
E0DA@
ZZZ10
LS-6099P
E0DA@
ZZZ2
PCB
E0DAZ@
ZZZ2
PCB
E0DAZ@
ZZZ3
LA-6091P
D0DA@
ZZZ3
LA-6091P
D0DA@
hexainf@hotmail.com
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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Block Diagrams
B
2 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Block Diagrams
B
2 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Block Diagrams
B
2 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Compal Confidential
Model Name : NAVD0
X2 mode
File Name : LA-6091P
Touch Pad
LPC BUS
page 28
22x22mm
Int.KBD
page 31
DMI
Transfermer
Power ON/OFF
page 29
page 14
DDRII-SO-DIMM
Pineview
FCBGA 559
SPI ROM
page 5
1.8V DDRII 667
page 32
Audio Codec
ALC272
Memory BUS(DDRII)
17x17mm
page 4,5,6
Tigerpoint
Thermal Sensor
page 7
page 17,18,19,20
page32
ENE KBC
KB926
AMP & INT
Speaker
10/100 Ethernet
AR8132L
page 23
Card Reader
ENE UB6250
MINI Card x1
3G
PCI-Express
EMC1402
LCD Conn.
page 27
page 24
LVDS
SPI
To Audio Board
INT MIC
To Audio Board
HeadPhone &
MIC Jack
RGB
page 23
USB Port X2
RJ45
SD/MMC/MS
CONN
DC/DC Interface
3VALW/5VALW
1.8V/VCCP
0.89VP/0.9VSP
CPU_CORE
Clock Generator
CK505
page 13
page 22
page 34
page 42
page 39
page 40
page 41
USB
BlueTooth
CMOS CAM
page 24
page 14
HDA
page 36
page 37
page 38
CHARGER
DC IN
BATT IN
SATA
page 21
HDD Conn.
GEN1
PCBGA360
WLAN
page 25 page 24
3G
VGA
N11M-OP2
page 8,9,10,11,12
HDMI Conn
page 16
page 29 page 28
page 29
page 27
VGA
DC/DC Interface
page 35
VGA_CORE/
1.5VSP
page 43
CRT Conn.
page 15
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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Notes List
B
3 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Notes List
B
3 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Notes List
B
3 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
ON
SLP_S3#
S5 (Soft OFF)
S4 (Suspend to Disk)
S3 (Suspend to RAM)
LOW
ONON
ON
ON
ON
ON
ON
ON
HIGH
OFF
OFF
OFF
OFF
OFF
SLP_S4#
OFF
ON
ON
LOWLOW
LOW
OFF
OFF
SLP_S5#
HIGH
HIGH HIGH HIGH
HIGHHIGHHIGH
LOW
LOW LOW
+VALW
HIGH
+V +VS Clock
S1(Power On Suspend)
Full ON
STATE SIGNAL
Address
100_11000001 011X b
1010 000Xb
DDR DIMMA
IDSEL #
1101 001Xb
ICH7M SM Bus address
DEVICE REQ/GNT #
Address
Address
Clock Generator
(SLG8SP556VTR)
Device
PIRQ
EMC1402
External PCI Devices
Device
EC SM Bus1 address
Smart Battery
Device
EC SM Bus2 address
No PCI Device
BOARD ID Table(Page 31)
+0.89VS Graphic core power rail
+VCCP
OFF
OFF
ON
ON OFF
OFFOFFON
ON
+CPU_CORE
1.5V switched power rail
OFF
Voltage Rails
+1.5VS
0.9V switched power rail for DDR terminator+0.9VS
OFFOFFON
Adapter power supply (19V)
1.8V power rail for DDR
B+
ON
OFF
OFF
+5VS
VIN
S5
3.3V always on power rail
5V always on power rail
3.3V switched power rail
+RTCVCC RTC power
+3VALW
+1.8V
+3VS
+5VALW
ON ON*
5V switched power rail
+VSB VSB always on power rail ON
S3S1
ON*
ON
ON
ON
ON
OFFON
ON
ON ON*
OFF
VCCP switched power rail
Core voltage for CPU
ON
AC or battery power rail for power circuit.
OFFON
OFFON
DescriptionPower Plane
N/A N/A N/A
N/AN/AN/A
OFF
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
1.264V
1.453V 1.759V
1.935V 2.341V
56K
2.500V
100K
3.3V
200K
NC
NAVE0
0.819V
Vab-Max
1.185V
1.650V
ID
0
8.2K
18K
R01 (EVT)
33K
R03 (PVT)
0V
0.250V
0.503V
3.3V
R02 (DVT)
R10A (MP)
Rb Vab-Typ
BRD ID
0
1
2
3
Ra 100K
VCC
2.200V
3.3V
R01 (EVT)4
R02 (DVT)
0V
5
R03 (PVT)
0V
6
R10A (MP)
0.216V
7
NAVD0 0.289V
0.436V
Vab-Min
0.538V
0.875V0.712V
1.036V
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_MA0
DDR_A_MA2
DDR_A_MA4
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_CS#0
DDR_CS#1
DDR_CKE0
DDR_CKE1
M_ODT0
M_ODT1
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DM0
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DM1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DM2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DM3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DM4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DM5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DM6
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DM7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_MA1
DDR_A_MA3
DDR_A_MA5
DDR_A_MA6
DMI_RX0_R
DMI_RX#0_R
DMI_RX1_R
DMI_RX#1_R
DMI_RX0_R
DMI_RX#0_R
DMI_RX1_R
DMI_RX#1_R
+VCC_FAN1
+VCC_FAN1
FAN_PWM
+1.8V +1.8V
+1.8V
+5VS
+3VS
CLK_CPU_EXP<13>
CLK_CPU_EXP#<13>
DMI_TX#1 <19>
DMI_TX#0 <19>
DMI_TX0 <19>
DMI_TX1 <19>
DMI_RX0<19>
DMI_RX#0<19>
DMI_RX1<19>
DMI_RX#1<19>
FAN_SPEED1<31>
FAN_PWM<31>
DDR_A_D[0..63]<7>
DDR_A_DM[0..7]<7>
DDR_A_DQS[0..7]<7>
DDR_A_DQS#[0..7]<7>
DDR_A_MA[0..14]<7>
DDR_A_WE#<7>
DDR_A_CAS#<7>
DDR_A_RAS#<7>
DDR_A_BS0<7>
DDR_A_BS1<7>
DDR_A_BS2<7>
DDR_CS#0<7>
DDR_CS#1<7>
DDR_CKE0<7>
DDR_CKE1<7>
M_ODT0<7>
M_ODT1<7>
M_CLK_DDR0<7>
M_CLK_DDR#0<7>
M_CLK_DDR1<7>
M_CLK_DDR#1<7>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Pineview(1/3)
Custom
4 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Pineview(1/3)
Custom
4 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Pineview(1/3)
Custom
4 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Must be placed within 500 mils from Pineview-M pins
Close to CPU
40mil
FAN1 Conn
091022 change JP12 to ACES_87213_0400G
2010 0105 change JP12 to ACES_85205-04001
091105 change CPU Part Number to SA00003M870
091105 change CPU Part Number to SA00003M870
0120 Change JP12 BOM structure from ME@ to CONN@
C438
0.1U_0402_10V7K
C438
0.1U_0402_10V7K
1 2
R50
1K_0402_1%
R50
1K_0402_1%
12
C435
0.1U_0402_10V7K
C435
0.1U_0402_10V7K
1 2
R242
80.6_0402_1%
R242
80.6_0402_1%
C436
0.1U_0402_10V7K
C436
0.1U_0402_10V7K
1 2
R370
10K_0402_5%
@
R370
10K_0402_5%
@
C437
0.1U_0402_10V7K
C437
0.1U_0402_10V7K
1 2
R369
10K_0402_5%
R369
10K_0402_5%
PINEVIEW_M
DDR_A
REV = 1.1
2 OF 6
U71B
PINEVIEW-M_FCBGA8559
PINEVIEW_M
DDR_A
REV = 1.1
2 OF 6
U71B
PINEVIEW-M_FCBGA8559
DDR_A_DQS_0 AD3
DDR_A_DQS#_0 AD2
DDR_A_DM_0 AD4
DDR_A_DQ_0 AC4
DDR_A_DQ_1 AC1
DDR_A_DQ_2 AF4
DDR_A_DQ_3 AG2
DDR_A_DQ_4 AB2
DDR_A_DQ_5 AB3
DDR_A_DQ_6 AE2
DDR_A_DQ_7 AE3
DDR_A_DQS_1 AB8
DDR_A_DQS#_1 AD7
DDR_A_DM_1 AA9
DDR_A_DQ_8 AB6
DDR_A_DQ_9 AB7
DDR_A_DQ_10 AE5
DDR_A_DQ_11 AG5
DDR_A_DQ_12 AA5
DDR_A_DQ_13 AB5
DDR_A_DQ_14 AB9
DDR_A_DQ_15 AD6
DDR_A_DQS_2 AD8
DDR_A_DQS#_2 AD10
DDR_A_DM_2 AE8
DDR_A_DQ_16 AG8
DDR_A_DQ_17 AG7
DDR_A_DQ_18 AF10
DDR_A_DQ_19 AG11
DDR_A_DQ_20 AF7
DDR_A_DQ_21 AF8
DDR_A_DQ_22 AD11
DDR_A_DQ_23 AE10
DDR_A_DQS_3 AK5
DDR_A_DQS#_3 AK3
DDR_A_DM_3 AJ3
DDR_A_DQ_24 AH1
DDR_A_DQ_25 AJ2
DDR_A_DQ_26 AK6
DDR_A_DQ_27 AJ7
DDR_A_DQ_28 AF3
DDR_A_DQ_29 AH2
DDR_A_DQ_30 AL5
DDR_A_DQ_31 AJ6
DDR_A_DQS_4 AG22
DDR_A_DQS#_4 AG21
DDR_A_DM_4 AD19
DDR_A_DQ_32 AE19
DDR_A_DQ_33 AG19
DDR_A_DQ_34 AF22
DDR_A_DQ_35 AD22
DDR_A_DQ_36 AG17
DDR_A_DQ_37 AF19
DDR_A_DQ_38 AE21
DDR_A_DQ_39 AD21
DDR_A_DQS_5 AE26
DDR_A_DQS#_5 AG27
DDR_A_DM_5 AJ27
DDR_A_DQ_40 AE24
DDR_A_DQ_41 AG25
DDR_A_DQ_42 AD25
DDR_A_DQ_43 AD24
DDR_A_DQ_44 AC22
DDR_A_DQ_45 AG24
DDR_A_DQ_46 AD27
DDR_A_DQ_47 AE27
DDR_A_DQS_6 AE30
DDR_A_DQS#_6 AF29
DDR_A_DM_6 AF30
DDR_A_DQ_48 AG31
DDR_A_DQ_49 AG30
DDR_A_DQ_50 AD30
DDR_A_DQ_51 AD29
DDR_A_DQ_52 AJ30
DDR_A_DQ_53 AJ29
DDR_A_DQ_54 AE29
DDR_A_DQ_55 AD28
DDR_A_DQS_7 AB27
DDR_A_DQS#_7 AA27
DDR_A_DM_7 AB26
DDR_A_DQ_56 AA24
DDR_A_DQ_57 AB25
DDR_A_DQ_58 W24
DDR_A_DQ_59 W22
DDR_A_DQ_60 AB24
DDR_A_DQ_61 AB23
DDR_A_DQ_62 AA23
DDR_A_DQ_63 W27
DDR_A_MA_0
AH19
DDR_A_MA_1
AJ18
DDR_A_MA_2
AK18
DDR_A_MA_3
AK16
DDR_A_MA_4
AJ14
DDR_A_MA_5
AH14
DDR_A_MA_6
AK14
DDR_A_MA_7
AJ12
DDR_A_MA_8
AH13
DDR_A_MA_9
AK12
DDR_A_MA_10
AK20
DDR_A_MA_11
AH12
DDR_A_MA_12
AJ11
DDR_A_MA_13
AJ24
DDR_A_MA_14
AJ10
DDR_A_WE#
AK22
DDR_A_CAS#
AJ22
DDR_A_RAS#
AK21
DDR_A_BS_0
AJ20
DDR_A_BS_1
AH20
DDR_A_BS_2
AK11
DDR_A_CS#_0
AH22
DDR_A_CS#_1
AK25
DDR_A_CS#_2
AJ21
DDR_A_CS#_3
AJ25
DDR_A_CKE_0
AH10
DDR_A_CKE_1
AH9
DDR_A_CKE_2
AK10
DDR_A_CKE_3
AJ8
DDR_A_ODT_0
AK24
DDR_A_ODT_1
AH26
DDR_A_ODT_2
AH24
DDR_A_ODT_3
AK27
DDR_A_CK_0
AG15
DDR_A_CK_0#
AF15
DDR_A_CK_1
AD13
DDR_A_CK_1#
AC13
RSVD
AD17
RSVD
AC17
DDR_A_CK_3
AC15
DDR_A_CK_3#
AD15
DDR_A_CK_4
AF13
DDR_A_CK_4#
AG13
RSVD
AB15
RSVD
AB17
RSVD
AB4
RSVD
AK8
RSVD_TP
AB11
RSVD_TP
AB13
DDR_VREF
AL28
DDR_RPD
AK28
DDR_RPU
AJ26
RSVD
AK29
R203
750_0402_1%
R203
750_0402_1%
T41T41
T38T38
C311
100P_0402_50V8J
C311
100P_0402_50V8J
1
2
R817
0_0603_5%
R817
0_0603_5%
1 2
R142
1K_0402_1%
R142
1K_0402_1%
12
R243
80.6_0402_1%
R243
80.6_0402_1%
JP12
ACES_85205-04001
CONN@
JP12
ACES_85205-04001
CONN@
1
1
2
2
3
3
G5
5
G6
6
4
4
DMI
PINEVIEW_M
REV = 1.1
1 OF 6
U71A
PINEVIEW-M_FCBGA8559
DMI
PINEVIEW_M
REV = 1.1
1 OF 6
U71A
PINEVIEW-M_FCBGA8559
RSVD M2
RSVD N2
EXP_ICOMPI L9
EXP_RBIAS L8
RSVD
N9 RSVD
N10 EXP_TCLKINP
R9 EXP_TCLKINN
R10
RSVD
M4 RSVD
J1 RSVD
K2
DMI_RXN_1
G3 DMI_RXP_1
H4 DMI_RXN_0
F2 DMI_RXP_0
F3
RSVD_TP P11
RSVD_TP N11
EXP_RCOMPO L10
RSVD L2
RSVD K3
DMI_TXN_1 J2
DMI_TXP_1 H3
DMI_TXN_0 G1
DMI_TXP_0 G2
EXP_CLKINP
N6 EXP_CLKINN
N7
RSVD
L3
R256
10K_0402_5%
R256
10K_0402_5%
12
R162
49.9_0402_1%
R162
49.9_0402_1%
T40T40
T39T39
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_PROCHOT#
H_THERMDA
H_THERMDC
EC_SMB_DA2
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
PM_EXTTS#0
PM_EXTTS#0
PM_EXTTS#1
H_PWROK
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
CLK_CPU_HPLCLK#
CLK_CPU_HPLCLK
CPU_DREFCLK
CPU_DREFCLK#
PLTRST#
EC_SMB_CK2
H_GTLREF
H_EXTBGREF
GMCH_CRT_G
GMCH_CRT_R
GMCH_ENBKL
GMCH_CRT_B
XDP_TCK
XDP_TRST#
XDP_PREQ#
XDP_TDI
XDP_TMS
XDP_TDO
H_INTR
LIBG
H_NMI
H_DPRSTP#
H_IGNNE#
H_A20M#
XDP_PREQ#
H_THERMTRIP#
CPU_VID0
H_STPCLK#
CPU_VID1
XDP_TDO
XDP_PRDY#
H_EXTBGREF
H_GTLREF
CPU_VID2
CPU_VID3
H_PWRGD
XDP_TDI
CPU_BSEL1
H_THERMDA
H_THERMDC
GMCH_ENBKL
CPU_VID4
CPU_VID5
CPU_BSEL0
CPU_VID6
H_PROCHOT#
H_DPSLP#
H_SMI#
XDP_TCK
CPU_BSEL2
XDP_TMS
XDP_TRST#
H_INIT#
CLK_CPU_BCLK#
CLK_CPU_BCLK
H_FERR#GMCH_CRT_HSYNC_R
GMCH_CRT_VSYNC_R
H_PWROK
H_A20M#
H_INTR
H_NMI
H_IGNNE#
H_STPCLK#
H_DPSLP#
H_INIT#
H_PWRGD
H_DPRSTP#
+VCCP
+VCCP
+VCCP
+3VS
+3VS
+3VS
+VCCP
GMCH_CRT_R <15>
GMCH_CRT_G <15>
GMCH_CRT_B <15>
GMCH_CRT_DATA <15>
GMCH_CRT_CLK <15>
CPU_SSCDREFCLK <13>
CPU_SSCDREFCLK# <13>
CPU_DREFCLK <13>
CPU_DREFCLK# <13>
PM_DPRSLPVR <19>
PM_EXTTS#0 <7>
PLTRST# <8,19,24,25,26,31>
CLK_CPU_HPLCLK# <13>
CLK_CPU_HPLCLK <13>
VGATE <13,19,31,42>
PCH_POK <19,31>
EC_SMB_CK2 <8,9,31>
EC_SMB_DA2 <8,9,31>
GMCH_LVDS_A0<14>
GMCH_LVDS_A1#<14>
GMCH_LVDS_A1<14>
GMCH_LVDS_A2#<14>
GMCH_LVDS_A2<14>
GMCH_LVDS_ACLK#<14>
GMCH_LVDS_ACLK<14>
GMCH_LVDS_A0#<14>
GMCH_LVDS_SDA<14>
GMCH_ENVDD<14>
GMCH_ENBKL<31>
INVT_PW M<14,31>
GMCH_LVDS_SCL<14>
H_THERMTRIP# <18>
CLK_CPU_BCLK# <13>
CLK_CPU_BCLK <13>
CPU_BSEL0 <13>
CPU_BSEL1 <13>
CPU_BSEL2 <13>
CPU_VID2 <42>
CPU_VID3 <42>
CPU_VID4 <42>
CPU_VID5 <42>
CPU_VID6 <42>
CPU_VID0 <42>
CPU_VID1 <42>
GMCH_CRT_HSYNC <15>
GMCH_CRT_VSYNC <15>
H_SMI# <18>
H_A20M# <18>
H_FERR# <18>
H_INTR <18>
H_NMI <18>
H_IGNNE# <18>
H_STPCLK# <18>
H_DPRSTP# <19>
H_DPSLP# <19>
H_INIT# <18>
H_PWRGD <19>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
Pineview(2/3)
B
5 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
Pineview(2/3)
B
5 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
Pineview(2/3)
B
5 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
placed within 0.5"
of processor pin.
placed within 0.5"
of processor pin.
Close to Processor
pin
CPU THERMAL SENSOR
H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil
Address:100_1100
Close to Processor
pin
Modify 08/04
Place closed to chipset
XDP Reserve
Add 470PF on
H_SMI# for known issue 07/08
091105 change CPU Part Number to SA00003M870
091105 change CPU Part Number to SA00003M870
091202 move R247/R249 from CRT side to CPU side
091211 del T10/T11/T28
091212 Add C5, C6, C7, C9, C11, C12, C13, C14
to prevent switch noise
091214 Remove T77
T55 test point
for layout limitation
091216 change value
to 470P
C79
2200P_0402_50V7K
C79
2200P_0402_50V7K
1 2
R343 51 +-1% 0402R343 51 +-1% 0402
1 2
C5 470P_0402_50V8JC5 470P_0402_50V8J
1 2
C14 470P_0402_50V8JC14 470P_0402_50V8J
1 2
T12T12
T19T19
T15T15
C11 470P_0402_50V8JC11 470P_0402_50V8J
1 2
R58
10K_0402_5%
R58
10K_0402_5%
12
C6 470P_0402_50V8JC6 470P_0402_50V8J
1 2
R342 51 +-1% 0402R342 51 +-1% 0402
1 2
R244
976_0402_1%
R244
976_0402_1%
T9T9
T21T21
C1171 470P_0402_50V7KC1171 470P_0402_50V7K
1 2
T52T52
T37T37
R202
68_0402_5%
R202
68_0402_5%
T63T63
R344 51 +-1% 0402R344 51 +-1% 0402
1 2
T53T53
PINEVIEW_M
ICH
LVDS
CPU
REV = 1.1
4 OF 6
U71D
PINEVIEW-M_FCBGA8559
PINEVIEW_M
ICH
LVDS
CPU
REV = 1.1
4 OF 6
U71D
PINEVIEW-M_FCBGA8559
LA_DATAP_0
R24
LA_DATAN_1
N26
LA_DATAN_2
R26
LIBG
R22
LVREFH
N22
LVREFL
N23
LBKLT_CTL
L26
LCTLA_CLK
L23
LBKLT_EN
L27
LVBG
J28
LCTLB_DATA
K25
LDDC_CLK
K23
LDDC_DATA
K24
LVDD_EN
H26
DPSLP# G10
DPRSTP# G6
VSS H27
THRMDA_2/RSVD
C30
THRMDC_1
E30
TRST#
C16 TMS
C14 TCK
B14 TDO
D13 TDI
D14 RSVD
G5
BPM_2_3#/RSVD
B21 BPM_2_2#/RSVD
C20
BPM_1_3#
F13 BPM_1_2#
G13 BPM_1_1#
E15 BPM_1_0#
G11
LA_CLKN
U25
RSVD D18
RSVD H13
RSVD L7
VID_6 E29
VID_5 F29
VID_3 G30
VID_2 H28
VID_1 H29
BSEL_2 K6
BSEL_1 H5
BSEL_0 K5
RSVD E17
RSVD L6
GTLREF A13
CPUPWRGOOD W1
PROCHOT# C18
THERMTRIP# E13
IGNNE# E5
LINT1 F11
LINT0 F10
FERR# H6
STPCLK# F8
INIT# G8
A20M# H7
LA_DATAP_1
N27
LA_DATAN_0
R23 LA_CLKP
U26
BPM_2_1#/RSVD
B20 BPM_2_0#/RSVD
B18
BCLKP J10
BCLKN H10
PREQ# F15
PRDY# E11
SMI# E7
VID_4 G29
RSVD D20
RSVD_TP D19
EXTBGREF K7
THRMDC_2/RSVD
D31
THRMDA_1
D30
RSVD_TP K9
VID_0 H30
LA_DATAP_2
R27
T20T20
T3T3
R200
0_0402_5%
R200
0_0402_5%
T25T25
T6T6
C66 470P_0402_50V8JC66 470P_0402_50V8J
1 2
R341 51 +-1% 0402R341 51 +-1% 0402
1 2
T48T48
C12 470P_0402_50V8JC12 470P_0402_50V8J
1 2
T17T17 R201 665_0402_1%R201 665_0402_1%
T4T4
T49T49
T27T27
C7 470P_0402_50V8JC7 470P_0402_50V8J
1 2
T14T14
R155
2K_0402_1%
R155
2K_0402_1%
R144
1K_0402_1%
R144
1K_0402_1%
T26T26
R1378
1K_0402_5%
R1378
1K_0402_5%
1 2
T22T22
C940
1U_0402_6.3V6K
@
C940
1U_0402_6.3V6K
@
1
2
T8T8
R151
2.37K_0402_1%
R151
2.37K_0402_1%
T13T13
T54T54
T18T18
R306 0_0402_5%R306 0_0402_5%
1 2
T23T23
R213 0_0402_5%
@
R213 0_0402_5%
@
T76T76
R308
150_0402_1%
R308
150_0402_1%
1 2
T2T2
R156
3.3K_0402_1%
R156
3.3K_0402_1%
R305 0_0402_5%@R305 0_0402_5%@
1 2
C13 470P_0402_50V8JC13 470P_0402_50V8J
1 2
T75T75
R345 51 +-1% 0402R345 51 +-1% 0402
1 2
T16T16
T57T57
R307
150_0402_1%
R307
150_0402_1%
1 2
T51T51
C9 470P_0402_50V8JC9 470P_0402_50V8J
1 2
T79T79
R143
10K_0402_5%
R143
10K_0402_5%
12
C80
0.1U_0402_16V4Z
C80
0.1U_0402_16V4Z
1
2
T50T50
R249 15_0402_5%OPT@R249 15_0402_5%OPT@
1 2
T78T78
T58T58
R247 15_0402_5%OPT@R247 15_0402_5%OPT@
1 2
R34
100K_0402_5%
R34
100K_0402_5%
T7T7
T5T5
C939
1U_0603_10V6K
@C939
1U_0603_10V6K
@
1
2
R346 51 +-1% 0402R346 51 +-1% 0402
1 2
T74T74
R309
150_0402_1%
R309
150_0402_1%
1 2
T24T24
MISC VGA
PINEVIEW_M
3 OF 6
REV = 1.1
U71C
PINEVIEW-M_FCBGA8559
MISC VGA
PINEVIEW_M
3 OF 6
REV = 1.1
U71C
PINEVIEW-M_FCBGA8559
RSVD_TP
R6
REFCLKINN Y29
REFCLKINP Y30
CRT_DDC_CLK L30
RSVD_TP
AA7
RSVD_TP
AA6
RSVD_TP
R5
RSVD
L11
XDP_RSVD_17
C11 XDP_RSVD_16
B12 XDP_RSVD_15
B10 XDP_RSVD_14
B11 XDP_RSVD_13
D10 XDP_RSVD_12
C10 XDP_RSVD_11
B8 XDP_RSVD_10
C8 XDP_RSVD_09
D9 XDP_RSVD_08
A9 XDP_RSVD_07
B7 XDP_RSVD_06
D8 XDP_RSVD_05
C6 XDP_RSVD_04
C7 XDP_RSVD_03
C5 XDP_RSVD_02
D6 XDP_RSVD_01
A7 XDP_RSVD_00
D12
HPL_CLKINP W9
HPL_CLKINN W8
RSTIN# AA3
PWROK L5
PM_EXTTS#_0 J30
PM_EXTTS#_1/DPRSLPVR K29
REFSSCLKINP AA30
DAC_IREF P28
CRT_DDC_DATA L31
CRT_IRTN N30
CRT_BLUE P29
CRT_GREEN P30
CRT_RED N31
CRT_VSYNC M29
CRT_HSYNC M30
REFSSCLKINN AA31
RSVD_TP
T21 RSVD_TP
W21 RSVD_TP
AA21
RSVD_TP
V21
U2
EMC1402-1-ACZL-TR MSOP 8P SENSOR
U2
EMC1402-1-ACZL-TR MSOP 8P SENSOR
DN
3
DP
2
VDD
1
ALERT# 6
SMCLK 8
THERM#
4GND 5
SMDATA 7
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCSFR_AB_DPL
+VCC_CRT_DAC
+VCC_CRT_DAC
+VCC_DMI
+VCC_ALVD
+VCC_DLVD
+RING_WEST
+RING_EAST
+RING_WEST
+DMI_HMPLL
VCCSENSE
VSSSENSE
VCCSENSE
VSSSENSE
+VCC_DMI
+VCC_DLVD
+RING_EAST
+VCC_ALVD
+DMI_HMPLL
+CPU_CORE
+0.89VS
+0.89VS
+1.8V
+1.8V
+1.8VS
+1.8VS
+3VS
+VCCP
+CPU_CORE
+1.5VS
+VCCP
+VCCP
+VCCP
+VCCP
+CPU_CORE
VCCSENSE <42>
VSSSENSE <42>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Pineview(3/3)
Custom
6 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Pineview(3/3)
Custom
6 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Pineview(3/3)
Custom
6 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
PLACE IN CAVITY
Close Chipset pin
DDR supply current 2.27A
GFX supply current: 1.38A
Sustained GFX supply current: 1.05A
DDR analog supply current: 1.32A
Display PLL SFR and CRT DAC supply
current: 0.154A
GIO supply current: 0.006A
DAC, GIO, LVDS, & LGIO, DPLL, HMPLL
supply current: 0.33A
Modify to 2.2U 05/11
Processor Core analog supply current: 0.08A
DMI analog supply current: 0.48A
LVDS supply current: 0.06A
SFR & DMIHMPLL supply current: 0.104A
Close U71.D4
Follow Intel check list change to 22uF 06/06
091105 change CPU Part Number to SA00003M870
091105 change CPU Part Number to SA00003M870
R28 0_0603_5%R28 0_0603_5%
12
R31
100_0402_1%
R31
100_0402_1%
1 2
C70
1U_0402_6.3V6K
C70
1U_0402_6.3V6K
1
2
R26
0.1UH +-10% MLF1608DR10KT
R26
0.1UH +-10% MLF1608DR10KT
1 2
R18
0_0402_5%
R18
0_0402_5%
C81
1U_0402_6.3V6K
C81
1U_0402_6.3V6K
1
2
C237
1U_0402_6.3V6K
C237
1U_0402_6.3V6K
1
2
+
C275
330U 2.5V Y
+
C275
330U 2.5V Y
1
2
C267
22U_0805_6.3V6M
C267
22U_0805_6.3V6M
1
2
C429
1U_0402_6.3V6K
C429
1U_0402_6.3V6K
1
2
C243
4.7U_0603_6.3V6K
C243
4.7U_0603_6.3V6K
1
2
C431
1U_0402_6.3V6K
C431
1U_0402_6.3V6K
1
2
C192
1U_0402_6.3V6K
C192
1U_0402_6.3V6K
1
2
T56T56
C186
2.2U_0603_10V6K
C186
2.2U_0603_10V6K
1
2
C239
1U_0402_6.3V6K
C239
1U_0402_6.3V6K
1
2
R27
0_0402_5%
R27
0_0402_5%
C188
2.2U_0603_10V6K
C188
2.2U_0603_10V6K
1
2
C189
1U_0402_6.3V6K
C189
1U_0402_6.3V6K
1
2
+
C278
330U 2.5V Y
+
C278
330U 2.5V Y
1
2
C76
1U_0402_6.3V6K
C76
1U_0402_6.3V6K
1
2
C1152
22U_0805_6.3V6M
C1152
22U_0805_6.3V6M
1
2
C1155
1U_0402_6.3V6K
C1155
1U_0402_6.3V6K
1
2
R20 0_0402_5%R20 0_0402_5%
C78
1U_0402_6.3V6K
C78
1U_0402_6.3V6K
1
2
R32
100_0402_1%
R32
100_0402_1%
1 2
C1160
0.1U_0402_10V6K
C1160
0.1U_0402_10V6K
1
2
C430
1U_0402_6.3V6K
C430
1U_0402_6.3V6K
1
2
C68
1U_0402_6.3V6K
C68
1U_0402_6.3V6K
1
2
R25
MBK1608601YZF_2P
R25
MBK1608601YZF_2P
1 2
C242
1U_0402_6.3V6K
C242
1U_0402_6.3V6K
1
2
C1153
22U_0805_6.3V6M
C1153
22U_0805_6.3V6M
1
2
C235
1U_0402_6.3V6K
C235
1U_0402_6.3V6K
1
2
R21 0_0402_5%R21 0_0402_5%
C55
22U_0805_6.3V6M
C55
22U_0805_6.3V6M
1
2
DMI
EXP\CRT\PLL
POWER
DDR
CPU
LVDS
GFX/MCH
PINEVIEW_M
REV = 1.1
5 OF 6
U71E
PINEVIEW-M_FCBGA8559
DMI
EXP\CRT\PLL
POWER
DDR
CPU
LVDS
GFX/MCH
PINEVIEW_M
REV = 1.1
5 OF 6
U71E
PINEVIEW-M_FCBGA8559
VCCSFR_AB_DPL
AC31
VCC A23
VCC A25
VCC A27
VCC B23
VCC B24
VCC B25
VCC B26
VCC B27
VCC C24
VCC C26
VCC D23
VCC D24
VCC D26
VCC D28
VCC E22
VCC E24
VCC E27
VCC F21
VCC F22
VCC F25
VCC G19
VCC G21
VCC G24
VCC H17
VCC H19
VCC H22
VCC H24
VCC J17
VCC J19
VCC J21
VCC J22
VCC K15
VCC K17
VCC K21
VCC L14
VCC L16
VCC L19
VCC L21
VCC N14
VCC N16
VCC N19
VCC N21
VCCSENSE C29
VSSSENSE B29
VCCA Y2
VCCP D4
VCCP B4
VCCP B3
VCCALVDS V30
VCCDLVDS W31
VCCA_DMI T1
VCCA_DMI T2
VCCA_DMI T3
RSVD P2
VCCSFR_DMIHMPLL AA1
VCCP E2
VCCGFX
T13
VCCGFX
T14
VCCGFX
T16
VCCGFX
T18
VCCGFX
T19
VCCGFX
V13
VCCGFX
V19
VCCGFX
W14
VCCGFX
W16
VCCGFX
W18
VCCGFX
W19
VCCSM
AK13
VCCSM
AL16
VCCSM
AL21
VCCSM
AL25
VCCCK_DDR
AK7
VCCCK_DDR
AL7
VCCA_DDR
U10
VCCA_DDR
U5
VCCA_DDR
U6
VCCA_DDR
U7
VCCA_DDR
U8
VCCA_DDR
U9
VCCA_DDR
V2
VCCA_DDR
V3
VCCA_DDR
V4
VCCA_DDR
W10
VCCA_DDR
W11
VCCACK_DDR
AA10
VCCACK_DDR
AA11
VCCD_AB_DPL
AA19
VCCACRTDAC
T30
VCC_GIO
T31
VCCRING_EAST
J31
VCCRING_WEST
B2
VCCRING_WEST
C2
VCC_LGI
A21
VCCRING_WEST
C3
VCCSM
AK19
VCCSM
AK9
VCCSM
AL11
VCCD_HMPLL
V11
C1154
22U_0805_6.3V6M
C1154
22U_0805_6.3V6M
1
2
C56
22U_0805_6.3V6M
C56
22U_0805_6.3V6M
1
2
C64
1U_0402_6.3V6K
C64
1U_0402_6.3V6K
1
2
C77
1U_0402_6.3V6K
C77
1U_0402_6.3V6K
1
2
C428
1U_0402_6.3V6K
C428
1U_0402_6.3V6K
1
2
C1162
0.1U_0402_10V6K
C1162
0.1U_0402_10V6K
1
2
C71
1U_0402_6.3V6K
C71
1U_0402_6.3V6K
1
2
C75
1U_0402_6.3V6K
C75
1U_0402_6.3V6K
1
2
C391
0.01U_0402_16V7K
C391
0.01U_0402_16V7K
1
2
C1161
0.1U_0402_10V6K
C1161
0.1U_0402_10V6K
1
2
R321 0_0402_5%R321 0_0402_5%
GND
PINEVIEW_M
6 OF 6
REV = 1.1
U71F
PINEVIEW-M_FCBGA8559
GND
PINEVIEW_M
6 OF 6
REV = 1.1
U71F
PINEVIEW-M_FCBGA8559
VSS
F19 VSS
F17 VSS
E8 VSS
E25 VSS
E21 VSS
E19 VSS
E10 RSVD_NCTF
E1 VSS
D22 RSVD_NCTF
C31 VSS
C25 VSS
C22 VSS
C21 VSS
C12 RSVD_NCTF
C1 VSS
B9 VSS
B5 RSVD_NCTF
B31 RSVD_NCTF
B30 VSS
B22 VSS
B19 VSS
B16 VSS
B13 VSS
AL9 RSVD_NCTF
AL30 RSVD_NCTF
AL3 RSVD_NCTF
AL29 VSS
AL23 RSVD_NCTF
AL2 VSS
AL19 VSS
AL13 RSVD_NCTF
AK31 RSVD_NCTF
AK30 VSS
AK23 RSVD_NCTF
AK2 RSVD_NCTF
AK1 RSVD_NCTF
AJ31 VSS
AJ16 RSVD_NCTF
AJ1 VSS
AH8 VSS
AH6 VSS
AH4 VSS
AH28 VSS
AH23 VSS
AH18 VSS
AG3 VSS
AG10 VSS
AF28 VSS
AF24 VSS
AF21 VSS
AF17 VSS
AF11 VSS
AE31 VSS
AE22 VSS
AE17 VSS
AE15 VSS
AE13 VSS
AE11 VSS
AE1 VSS
AD5 VSS
AD26 VSS
AC30 VSS
AC28 VSS
AC21 VSS
AC2 VSS
AC19 VSS
AC11 VSS
AC10 VSS
AB30 VSS
AB29 VSS
AB28 VSS
AB21 VSS
AB19 VSS
AA8 VSS
AA29 VSS
AA26 VSS
AA25 VSS
AA22 VSS
AA2 VSS
AA18 VSS
AA16 VSS
AA14 VSS
AA13 RSVD_NCTF
A4 RSVD_NCTF
A30 RSVD_NCTF
A3 RSVD_NCTF
A29 VSS
A19 VSS
A16 VSS
A11
VSS T29
VSS Y4
VSS Y3
VSS Y28
VSS W7
VSS W6
VSS W5
VSS W4
VSS W30
VSS W28
VSS W26
VSS W25
VSS W23
VSS W2
VSS W13
VSS V29
VSS V28
VSS V18
VSS V16
VSS V14
VSS U27
VSS U24
VSS U23
VSS U22
VSS T11
VSS R8
VSS R7
VSS R25
VSS P4
VSS P3
VSS P21
VSS P19
VSS P18
VSS P16
VSS P14
VSS P13
VSS N8
VSS N5
VSS N4
VSS N28
VSS N25
VSS N24
VSS N18
VSS N13
VSS N1
VSS M3
VSS M28
VSS L29
VSS L25
VSS L24
VSS L22
VSS L18
VSS L13
VSS L1
VSS K8
VSS K4
VSS K30
VSS K28
VSS K27
VSS K26
VSS K19
VSS K13
VSS K11
VSS J4
VSS J15
VSS J13
VSS J11
VSS H8
VSS H25
VSS H21
VSS H2
VSS H15
VSS H11
VSS G31
VSS G27
VSS G22
VSS G17
VSS G15
VSS F4
VSS F28
VSS F24
C187
2.2U_0603_10V6K
C187
2.2U_0603_10V6K
1
2
C69
1U_0402_6.3V6K
C69
1U_0402_6.3V6K
1
2
C85
2.2U_0603_10V6K
C85
2.2U_0603_10V6K
1
2
C236
1U_0402_6.3V6K
C236
1U_0402_6.3V6K
1
2
C74
2.2U_0603_10V6K
C74
2.2U_0603_10V6K
1
2
C241
1U_0402_6.3V6K
C241
1U_0402_6.3V6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_DQS#7
DDR_A_D60
DDR_A_D39
DDR_A_D37
DDR_A_D14
DDR_A_DM1
DDR_A_D5
DDR_A_D27
DDR_A_D25
DDR_A_D16
DDR_A_D62
DDR_A_DQS7
M_CLK_DDR1
DDR_A_DQS5
DDR_A_DM4
DDR_A_DQS#3
DDR_A_D22
DDR_A_D12
DDR_CKE1
DDR_A_D15
M_CLK_DDR#0
DDR_A_D56
DDR_A_D43
DDR_A_DM5
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_D24
DDR_A_D10
DDR_A_DQS#0
DDR_A_D54
DDR_A_D57
DDR_A_D34
DDR_A_D2
DDR_A_D53
DDR_A_D52
DDR_A_D29
DDR_A_D59
DDR_A_DQS#1
DDR_A_D3
DDR_A_DQS0
DDR_A_D1
DDR_A_D28
DDR_A_DQS#5
DDR_A_D30
DDR_A_D35
DDR_CKE0
DDR_A_DQS#2
DDR_A_D63
DDR_A_DQS3
DDR_A_DM0
DDR_A_D49
DDR_A_D61
M_CLK_DDR#1
DDR_A_D36
DDR_A_D33
DDR_A_D17
DDR_A_DM6
DDR_A_D46
DDR_A_D7
CLK_SMBCLK
DDR_A_D58
DDR_A_D51
DDR_A_D0
DDR_A_D45
DDR_A_D31
DDR_A_D4
DDR_A_DQS1
DDR_A_D44
DDR_A_D38
DDR_A_D19
DDR_A_D20
DDR_A_D40
DDR_A_D32
M_CLK_DDR0
DDR_A_D47
CLK_SMBDATA
DDR_A_D50
DDR_A_DQS#6
DDR_A_D55
DDR_A_D21
DDR_A_D48
DDR_A_D42
DDR_A_D41
DDR_A_D8
DDR_A_DM2
DDR_A_D6
DDR_A_DM7
DDR_A_DQS6
DDR_A_BS2
DDR_A_D26
DDR_A_DM3
DDR_A_D18
DDR_A_DQS2
DDR_A_D11
DDR_A_D9
DDR_A_D23
DDR_A_D13
DDR_A_MA3
DDR_A_MA12
DDR_A_MA1
DDR_A_MA5
DDR_A_MA9
DDR_A_MA8
DDR_CS#1
DDR_A_CAS#
M_ODT1
DDR_A_WE#
DDR_A_MA10
DDR_A_BS0
DDR_A_MA2
DDR_A_MA0
DDR_A_MA11
DDR_A_BS1
DDR_A_RAS#
DDR_A_MA6
M_ODT0
DDR_A_MA4
DDR_A_MA7
DDR_A_MA13
DDR_CS#0
DDR_A_BS2
DDR_CKE0
DDR_CKE1
DDR_A_MA11
DDR_A_MA7
DDR_A_MA0
DDR_A_MA2
DDR_A_MA1
DDR_A_MA14
M_ODT1
DDR_A_WE#
DDR_A_CAS#
DDR_CS#1
DDR_A_MA14
DDR_A_MA6
DDR_A_BS1
DDR_A_MA4DDR_A_RAS#
DDR_CS#0
M_ODT0
DDR_A_MA13
DDR_A_MA8
DDR_A_MA9
DDR_A_MA12
DDR_A_BS0
DDR_A_MA10
DDR_A_MA3
DDR_A_MA5
+1.8V
+3VS
+1.8V +1.8V
+0.9VS
+1.8V
+DIMM_VREF
+DIMM_VREF
+0.9VS
DDR_A_MA[0..14]<4>
DDR_A_DM[0..7]<4>
DDR_A_DQS#[0..7]<4>
DDR_A_D[0..63]<4>
DDR_A_DQS[0..7]<4>
DDR_CKE0<4>
DDR_A_BS2<4>
DDR_A_BS0<4>
DDR_A_WE#<4>
DDR_A_CAS#<4>
DDR_CS#1<4>
M_ODT1<4>
CLK_SMBCLK<13,24>
CLK_SMBDATA<13,24>
M_CLK_DDR0 <4>
M_CLK_DDR#0 <4>
PM_EXTTS#0 <5>
DDR_CKE1 <4>
DDR_CS#0 <4>
DDR_A_BS1 <4>
DDR_A_RAS# <4>
M_ODT0 <4>
M_CLK_DDR#1 <4>
M_CLK_DDR1 <4>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
DDRII-SODIMMA
B
7 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
DDRII-SODIMMA
B
7 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
DDRII-SODIMMA
B
7 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
20mils
DIMMA
Layout Note:
Place near JDIM1
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
Share +DIMM_VREF for
1.DDRII VREF
2.GMCH SM_VREF_0
SM_VREF_1
Layout Note:
Place these resistor
closely DIMMA,all
trace length
Max=1.3"
Layout Note:
Place these resistor
closely DIMMA,all
trace length<750 mil
091029 change JDIM1 to FOX_ASOA426-M2RN-7F
follow SJV03_MB_Conn_List_1029_Rev10(BTB)
Follow Intel Layout checklist, add C141 05/12
09/03
091204 swap nets for layout
C108
0.1U_0402_16V4Z
C108
0.1U_0402_16V4Z
1
2
C118
0.1U_0402_16V4Z
C118
0.1U_0402_16V4Z
1
2
C111
0.1U_0402_16V4Z
C111
0.1U_0402_16V4Z
1
2
R163
47_0402_5%
R163
47_0402_5%
1 2
C106
0.1U_0402_16V4Z
C106
0.1U_0402_16V4Z
1
2
C91
0.1U_0402_16V4Z
C91
0.1U_0402_16V4Z
1
2
RP1
47_0804_8P4R_5%
RP1
47_0804_8P4R_5%
18
27
36
45
C445
0.1U_0402_16V4Z
C445
0.1U_0402_16V4Z
1
2
C86
0.1U_0402_16V4Z
C86
0.1U_0402_16V4Z
1
2
R60
47_0402_5%
R60
47_0402_5%
1 2
C130
2.2U_0603_6.3V4Z
C130
2.2U_0603_6.3V4Z
1
2
C115
0.1U_0402_16V4Z
C115
0.1U_0402_16V4Z
1
2
C116
0.1U_0402_16V4Z
C116
0.1U_0402_16V4Z
1
2
C128
2.2U_0603_6.3V4Z
C128
2.2U_0603_6.3V4Z
1
2
+
C94
220U_B2_2.5VM_R35
@
+
C94
220U_B2_2.5VM_R35
@
1
2
JDIM1
FOX_ASOA426-M2RN-7F
CONN@
JDIM1
FOX_ASOA426-M2RN-7F
CONN@
VREF
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DQS0#
11
DQS0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
VSS
41
DQ16
43
DQ17
45
VSS
47
DQS2#
49
DQS2
51
VSS
53
DQ18
55
DQ19
57
VSS
59
DQ24
61
DQ25
63
VSS
65
DM3
67
NC
69
VSS
71
DQ26
73
DQ27
75
VSS
77
CKE0
79
VDD
81
NC
83
BA2
85
VDD
87
A12
89
A9
91
A8
93
VDD
95
A5
97
A3
99
A1
101
VDD
103
A10/AP
105
BA0
107
WE#
109
VDD
111
CAS#
113
NC/S1#
115
VDD
117
NC/ODT1
119
VSS
121
DQ32
123
DQ33
125
VSS
127
DQS4#
129
DQS4
131
VSS
133
DQ34
135
DQ35
137
VSS
139
DQ40
141
DQ41
143
VSS
145
DM5
147
VSS
149
DQ42
151
DQ43
153
VSS
155
DQ48
157
DQ49
159
VSS
161
NC,TEST
163
VSS
165
DQS6#
167
DQS6
169
VSS
171
DQ50
173
DQ51
175
VSS
177
DQ56
179
DQ57
181
VSS
183
DM7
185
VSS
187
DQ58
189
DQ59
191
VSS
193
SDA
195
SCL
197
VDDSPD
199
VSS 2
DQ4 4
DQ5 6
VSS 8
DM0 10
VSS 12
DQ6 14
DQ7 16
VSS 18
DQ12 20
DQ13 22
VSS 24
DM1 26
VSS 28
CK0 30
CK0# 32
VSS 34
DQ14 36
DQ15 38
VSS 40
VSS 42
DQ20 44
DQ21 46
VSS 48
NC 50
DM2 52
VSS 54
DQ22 56
DQ23 58
VSS 60
DQ28 62
DQ29 64
VSS 66
DQS3# 68
DQS3 70
VSS 72
DQ30 74
DQ31 76
VSS 78
NC/CKE1 80
VDD 82
NC/A15 84
NC/A14 86
VDD 88
A11 90
A7 92
A6 94
VDD 96
A4 98
A2 100
A0 102
VDD 104
BA1 106
RAS# 108
S0# 110
VDD 112
ODT0 114
NC/A13 116
VDD 118
NC 120
VSS 122
DQ36 124
DQ37 126
VSS 128
DM4 130
VSS 132
DQ38 134
DQ39 136
VSS 138
DQ44 140
DQ45 142
VSS 144
DQS5# 146
DQS5 148
VSS 150
DQ46 152
DQ47 154
VSS 156
DQ52 158
DQ53 160
VSS 162
CK1 164
CK1# 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
SA0 198
SA1 200
C107
0.1U_0402_16V4Z
C107
0.1U_0402_16V4Z
1
2
C439
0.1U_0402_16V4Z
C439
0.1U_0402_16V4Z
1
2
C141
0.1U_0402_16V4Z
C141
0.1U_0402_16V4Z
1
2
RP4
47_0804_8P4R_5%
RP4
47_0804_8P4R_5%
18
27
36
45
RP6
47_0804_8P4R_5%
RP6
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
C441
0.1U_0402_16V4Z
C441
0.1U_0402_16V4Z
1
2
C443
0.1U_0402_16V4Z
C443
0.1U_0402_16V4Z
1
2
C87
0.1U_0402_16V4Z
C87
0.1U_0402_16V4Z
1
2
R66 10K_0402_5%R66 10K_0402_5%
1 2
C120
0.1U_0402_16V4Z
C120
0.1U_0402_16V4Z
1
2
C112
2.2U 6.3V M X5R 0402
C112
2.2U 6.3V M X5R 0402
1
2
C117
0.1U_0402_16V4Z
C117
0.1U_0402_16V4Z
1
2
C110
2.2U_0603_6.3V4Z
C110
2.2U_0603_6.3V4Z
1
2
C121
0.1U_0402_16V4Z
C121
0.1U_0402_16V4Z
1
2
C119
0.1U_0402_16V4Z
C119
0.1U_0402_16V4Z
1
2
R64
0_0402_5%
R64
0_0402_5%
1 2
R61
1K_0402_1%
R61
1K_0402_1%
12
RP2
47_0804_8P4R_5%
RP2
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
R62
1K_0402_1%
R62
1K_0402_1%
12
C105
0.1U_0402_16V4Z
C105
0.1U_0402_16V4Z
1
2
R59
47_0402_5%
R59
47_0402_5%
1 2
R65 10K_0402_5%R65 10K_0402_5%
1 2
C88
0.1U_0402_16V4Z
C88
0.1U_0402_16V4Z
1
2
C444
0.1U_0402_16V4Z
C444
0.1U_0402_16V4Z
1
2
C446
0.1U_0402_16V4Z
C446
0.1U_0402_16V4Z
1
2
C89
0.1U_0402_16V4Z
C89
0.1U_0402_16V4Z
1
2
C440
0.1U_0402_16V4Z
C440
0.1U_0402_16V4Z
1
2
C442
0.1U_0402_16V4Z
C442
0.1U_0402_16V4Z
1
2
C90
0.1U_0402_16V4Z
C90
0.1U_0402_16V4Z
1
2
C109
2.2U_0603_6.3V4Z
C109
2.2U_0603_6.3V4Z
1
2
C129
2.2U_0603_6.3V4Z
C129
2.2U_0603_6.3V4Z
1
2
C122
0.1U_0402_16V4Z
C122
0.1U_0402_16V4Z
1
2
RP5
47_0804_8P4R_5%
RP5
47_0804_8P4R_5%
18
27
36
45
RP3
47_0804_8P4R_5%
RP3
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XTALIN
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_N0
PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0
PCIE_CRX_C_GTX_P0
PCIE_CRX_C_GTX_N0
CLK_PCIE_VGA#
CLK_PCIE_VGA
XTALOUT
VGA_GPIO14
VGA_CRT_B
JTAG_TMS
VGA_CRT_R
DACA_VREF
VGA_CRT_G
DACA_RSET
JTAG_TCK
VGA_ENBKL
VGA_ENVDD
VGA_GPIO11
JTAG_TRST_N
JTAG_TDO
JTAG_TDI
GPU_VID0
GPU_VID1
SMB_EC_DA2_R
VGA_DDCDATA_C
VGA_LVDS_SCL_C
SMB_EC_CK2_R
VGA_DDCCLK_C
VGA_LVDS_SDA_C
HDCP_SMB_CK1
HDCP_SMB_DAI
PEG_CLKREQ#
I2CB_SDA
I2CB_SCL
NV_INVTPWM
HDMI_DETECT_VGA
TESTMODE
PLTRST_VGA#
PLTRST_VGA#
PLTRST# PLTRST_VGA#
EC_SMB_CK2
EC_SMB_DA2
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_LVDS_SCL_C
VGA_LVDS_SDA_C
VGA_DDCDATA_C
VGA_DDCCLK_C
SMB_EC_DA2_R
SMB_EC_CK2_R
DGPU_PWR_EN
VGA_DDCDATA_C
VGA_DDCCLK_C
VGA_LVDS_SCL_C
VGA_LVDS_SDA_C
VGA_DEEP_IDLE_R
VGA_DEEP_IDLE_R
GPU_VID0
GPU_VID1
DGPU_HOLD_RST#
+3VSDGPU
+3VSDGPU
+3VS +3VSDGPU
+3VS
+3VSDGPU
PCIE_CTX_GRX_P0<19>
PCIE_CTX_GRX_N0<19>
PCIE_CRX_GTX_P0<19>
PCIE_CRX_GTX_N0<19>
CLK_PCIE_VGA<13>
CLK_PCIE_VGA#<13>
PEG_CLKREQ#<13>
PLTRST#<5,19,24,25,26,31>
DGPU_HOLD_RST#<31>
HDMI_DETECT_VGA <16>
VGA_ENVDD <14>
VGA_ENBKL <31>
GPU_VID0 <43>
GPU_VID1 <43>
VGA_DEEP_IDLE <31>
VGA_HSYNC <15>
VGA_VSYNC <15>
VGA_CRT_R <15>
VGA_CRT_G <15>
VGA_CRT_B <15>
DGPU_PWR_EN <13,31,35>
EC_SMB_CK2 <5,9,31>
EC_SMB_DA2 <5,9,31>
VGA_DDCDATA <15>
VGA_LVDS_SDA <14>
VGA_DDCCLK <15>
VGA_LVDS_SCL <14>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 PCIE,GPIO,CLK
B
8 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 PCIE,GPIO,CLK
B
8 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 PCIE,GPIO,CLK
B
8 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
N10M-GS
(40nm)
Device ID
0x0A74
CRT OUT
DIS@
I2CS is internal thermal sensor.
1
Deep P12
1
0.85V
P-State
1.0V
VGA_COREGPU_VID0
0
GPU_VID1
0.8V
P0
1
P8
00
GPIO6GPIO5
1
Deep P12
1
0.85V
P-State
0.9V
VGA_COREGPU_VID0
0
GPU_VID1
0.8V
P0
1
P8
00
0x0A7D
N11M-GE1/LP1
(40nm)
Device ID
091124 change crystal Y5 P/N to SJ127P0M800
Ball Name
GB1-N11x
Normal
Function Function Description
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
General Purpose
HPD-C
LCD0_BL_PWM
LCD0_VDD
LCD0_BL_EN
GPU_VID0
GPU_VID1
GPU_VID2
OVERT
ALERT
Hot Plug detect for IFP link C
Panel Backlight Brightness
(PWM capable)
Panel power enable
Panel Backlight on/off
(PWM Capable)
GPU_VID0
GPU_VID1
GPU_VID2
Thermal Catastrophic
Overtemp
Thermal Alert
GPIO10
GPIO11
MEM_VREF
SLI_SYNC
PWR_LEVEL
MEM_VID
PWR_CTRL1
HPD-E
FAN_PWM
Reserved
Reserved
HPD-D
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
Memory VREF switch
SLI raster sync
AC power detect input
MEM_VID or Power supply
Control
Power supply control
Hot plug detect for IFP link E
Programmable Fan control
Hot plug detect for IFP link D
Ball Name
GB1-N11x
Normal
Function Function Description
091022 follow NV OPTIMUS D.G.
091026 add R824 10K PU to +3VSDGPU
091026 add GPIO18 usage
VGA_DEEP_IDLE output to EC
NVVDD
PEX_VDD
VDD33
(+1.05VSDGPU)
(+3VSDGPU)
PEX_VDD can
ramp up any time
FBVDDQ
IFPAB_IOVDD
(+1.5VSDGPU)
(+1.8VSDGPU)
(VGA_CORE)
DIS ONLY
091105 add TestPad on GPIO8/GPIO9
Follow NV review
091124 change C740/C739 to 27PF
091212 Add C26, C29 near PR241
, PR242 to prevent switch noise
091212 Add C35 near U87
to prevent switch noise
091216 change GPU P/N to SA00003UD00
091217 change R678/R679 from 4.7K to 2.2K
100112 change Q47 P/N from SB00000AR00 to SB00000DH00
R676
10K_0402_5%
VGA@
R676
10K_0402_5%
VGA@
12
R824 10K_0402_5%@R824 10K_0402_5%@12
C29 100P_0402_50V8J@C29 100P_0402_50V8J@
1 2
R1526 0_0402_5%
DIS@
R1526 0_0402_5%
DIS@
1 2
R684 10K_0402_5%
@
R684 10K_0402_5%
@
1 2
R683
2.2K_0402_5%
VGA@
R683
2.2K_0402_5%
VGA@
C737
12P_0402_50V8J
DIS@
C737
12P_0402_50V8J
DIS@
1
2
C740
27P_0402_50V8J
VGA@
C740
27P_0402_50V8J
VGA@
R814 0_0402_5%
DIS@
R814 0_0402_5%
DIS@
1 2
R692 150_0402_1%DIS@R692 150_0402_1%DIS@
1 2
R693 10K_0402_5%VGA@R693 10K_0402_5%VGA@
1 2
R682 124_0402_1%DIS@R682 124_0402_1%DIS@
C26 100P_0402_50V8J@C26 100P_0402_50V8J@
1 2
T33T33
R687 10K_0402_5%
@
R687 10K_0402_5%
@
1 2
R695 2.49K_0402_1% VGA@R695 2.49K_0402_1% VGA@
1 2
R694 200_0402_5% @R694 200_0402_5% @
1 2
R688 2.2K_0402_5%
VGA@
R688 2.2K_0402_5%
VGA@
1 2
R691 150_0402_1%DIS@R691 150_0402_1%DIS@
1 2
R689 2.2K_0402_5%VGA@R689 2.2K_0402_5%VGA@
1 2
C748
12P_0402_50V8J
DIS@
C748
12P_0402_50V8J
DIS@
1
2
R815 0_0402_5%
DIS@
R815 0_0402_5%
DIS@
1 2
T70
PAD T70
PAD
T71
PAD T71
PAD
C736
0.1U_0402_16V7K
VGA@C736
0.1U_0402_16V7K
VGA@
1 2
C747
12P_0402_50V8J
DIS@
C747
12P_0402_50V8J
DIS@
1
2
R685 0_0402_5%VGA@R685 0_0402_5%VGA@
1 2
R681
2.2K_0402_5%
VGA@
R681
2.2K_0402_5%
VGA@
R825 0_0402_5%@R825 0_0402_5%@
1 2
R690 150_0402_1%DIS@R690 150_0402_1%DIS@
1 2
C735
0.1U_0402_16V7K
VGA@C735
0.1U_0402_16V7K
VGA@
1 2
L31
MBK1608121YZF_0603DIS@
L31
MBK1608121YZF_0603DIS@
1 2
R696
10K_0402_5%
VGA@
R696
10K_0402_5%
VGA@
1 2
R679 2.2K_0402_5%VGA@R679 2.2K_0402_5%VGA@ 12
R698 2.2K_0402_5%VGA@R698 2.2K_0402_5%VGA@ 12
R677
10K_0402_5%
VGA@
R677
10K_0402_5%
VGA@
12
L28 MBK1608121YZF_0603DIS@L28 MBK1608121YZF_0603DIS@
1 2
T73
PAD T73
PAD
T68
PAD
T68
PAD
Y5
27MHZ_20P_7A27000010
VGA@
Y5
27MHZ_20P_7A27000010
VGA@
1 2
R67510K_0402_5% @R67510K_0402_5% @
1 2
C739
27P_0402_50V8J
VGA@
C739
27P_0402_50V8J
VGA@
L30 MBK1608121YZF_0603DIS@L30 MBK1608121YZF_0603DIS@
1 2
C746 0.1U_0402_16V4Z
DIS@
C746 0.1U_0402_16V4Z
DIS@ 12
U87
NC7SZ08P5X_NL_SC70-5
OPT@
U87
NC7SZ08P5X_NL_SC70-5
OPT@
B
2
A
1Y4
P5
G
3
T32T32
R699 2.2K_0402_5%VGA@R699 2.2K_0402_5%VGA@ 12
C35 100P_0402_50V8J
OPT@
C35 100P_0402_50V8J
OPT@
1 2
L27 MBK1608121YZF_0603DIS@L27 MBK1608121YZF_0603DIS@
1 2
T72
PAD T72
PAD
R1490
100K_0402_5%
VGA@
R1490
100K_0402_5%
VGA@
12
GPIO
PCI EXPRESS
TEST
CLK
Part 1 of 5
I2C DACADACB
U30A
N11M-GE1-S-A2 _BGA533
VGA@
GPIO
PCI EXPRESS
TEST
CLK
Part 1 of 5
I2C DACADACB
U30A
N11M-GE1-S-A2 _BGA533
VGA@
PEX_RX0
AE12
PEX_RX0_N
AF12
PEX_RX1
AG12
PEX_RX1_N
AG13
PEX_RX2
AF13
PEX_RX2_N
AE13
PEX_RX3
AE15
PEX_RX3_N
AF15
PEX_RX4
AG15
PEX_RX4_N
AG16
PEX_RX5
AF16
PEX_RX5_N
AE16
PEX_RX6
AE18
PEX_RX6_N
AF18
GPIO0 N1
GPIO1 G1
GPIO2 C1
GPIO3 M2
GPIO4 M3
GPIO5 K3
GPIO6 K2
GPIO7 J2
GPIO8 C2
GPIO9 M1
GPIO10 D2
GPIO11 D1
GPIO13 J1
DACA_HSYNC AD2
DACA_VSYNC AD1
DACA_RED AE2
DACA_BLUE AD3
DACA_GREEN AE3
DACA_RSET AE1
DACA_VREF AF1
PEX_TSTCLK_OUT
AF10
PEX_TSTCLK_OUT_N
AE10
GPIO14 K1
GPIO15 F3
GPIO16 G3
GPIO17 G2
GPIO18 F1
GPIO19 F2
GPIO12 J3
PEX_REFCLK
AB10
PEX_REFCLK_N
AC10
PEX_RST_N
AD9
PEX_RX7
AG18
PEX_RX7_N
AG19
PEX_RX8
AF19
PEX_RX8_N
AE19
PEX_RX9
AE21
PEX_RX9_N
AF21
PEX_RX10
AG21
PEX_RX10_N
AG22
PEX_RX11
AF22
PEX_RX11_N
AE22
PEX_RX12
AE24
PEX_RX12_N
AF24
PEX_RX13
AG24
PEX_RX13_N
AF25
PEX_RX14
AG25
PEX_RX14_N
AG26
PEX_RX15
AF27
PEX_RX15_N
AE27
PEX_TERMP
AG10
PEX_TX0
AD10
PEX_TX0_N
AD11
PEX_TX1
AD12
PEX_TX1_N
AC12
PEX_TX2
AB11
PEX_TX2_N
AB12
PEX_TX3
AD13
PEX_TX3_N
AD14
PEX_TX4
AD15
PEX_TX4_N
AC15
PEX_TX5
AB14
PEX_TX5_N
AB15
PEX_TX6
AC16
PEX_TX6_N
AD16
PEX_TX7
AD17
PEX_TX7_N
AD18
PEX_TX8
AC18
PEX_TX8_N
AB18
PEX_TX9
AB19
PEX_TX9_N
AB20
PEX_TX10
AD19
PEX_TX10_N
AD20
PEX_TX11
AD21
PEX_TX11_N
AC21
PEX_TX12
AB21
PEX_TX12_N
AB22
PEX_TX13
AC22
PEX_TX13_N
AD22
PEX_TX14
AD23
PEX_TX14_N
AD24
PEX_TX15
AE25
PEX_TX15_N
AE26
PEX_CLKREQ_N
AE9
DACB_HSYNC U6
DACB_VSYNC U4
DACB_RED T5
DACB_BLUE R4
DACB_GREEN T4
DACB_VREF R6
DACB_RSET V6
JTAG_TCK AF3
JTAG_TDI AG4
JTAG_TDO AE4
JTAG_TMS AF4
JTAG_TRST_N AG3
TESTMODE AD25
XTAL_SSIN D11
XTAL_OUTBUFF E9
XTAL_OUT E10
XTAL_IN D10
I2CS_SCL T1
I2CS_SDA T2
I2CH_SCL A3
I2CH_SDA A4
I2CC_SCL A2
I2CC_SDA B1
I2CB_SCL R2
I2CB_SDA R3
I2CA_SCL R1
I2CA_SDA T3
T31T31
Q47B
2N7002DW-T/R7_SOT363-6
OPT@
Q47B
2N7002DW-T/R7_SOT363-6
OPT@
3
5
4
R686 0_0402_5%VGA@R686 0_0402_5%VGA@
1 2
C738
12P_0402_50V8J
DIS@
C738
12P_0402_50V8J
DIS@
1
2
R678 2.2K_0402_5%VGA@R678 2.2K_0402_5%VGA@ 12
R674 10K_0402_5%VGA@R674 10K_0402_5%VGA@
1 2
Q47A
2N7002DW-T/R7_SOT363-6
OPT@
Q47A
2N7002DW-T/R7_SOT363-6
OPT@
61
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FB_VREF1
IFPC_AUX
FBA_D[0..63]
VGA_LVDS_A1
VGA_LVDS_A1#
VGA_LVDS_A0
VGA_LVDS_A2#
VGA_LVDS_A2
VGA_LVDS_A0#
VGA_LVDS_ACLK#
VGA_LVDS_ACLK
ROM_SI
ROM_SO
ROM_SCLK
STRAP2
STRAP1
STRAP0
IFPC_AUX
IFPC_AUX_N
SPDIF_IN
FBA_D62
FBA_D63
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_BA2
FBBA3
FBBA5
FBAA2
FBAA3
FBAA0
FBAWE#
FBBA2
FBAA1
FBAA11
FBAA10
FBAA8
FBAA9
FBAA6
FBAA5
FBBACS0#
FBAA7
FBAA_CKE
FBACAS#
FBA_BA1
FBA_BA0
FBA_RST
FBAA12
FBBA4
FBARAS#
FBBA_CKE
FBAA[0..13]
FBBA[2..5]
FBADQS#2
FBADQS#1
FBADQS#3
FBADQS#4
FBADQS#6
FBADQS#5
FBADQS#7
FBADQS#0
FBADQS2
FBADQS1
FBADQS3
FBADQS4
FBADQS6
FBADQS5
FBADQS7
FBADQS0
FBADQM5
FBADQM4
FBADQM0
FBADQM2
FBADQM1
FBADQM3
FBADQM7
FBADQM6
FBADQM[0..7]
FBADQS#[0..7]
FBADQS[0..7]
FBAA4
FBAACS0#
FBAA13
FBBAODT0
FBAAODT0
VGA_LVDS_ACLK#
VGA_LVDS_ACLK
IFPC_AUX_N
DGPU_PWRGD
DGPU_PWRGD
DGPU_PWRGD
DGPU_PWRGD#
DGPU_PWRGD#
EC_SMB_CK2
EC_SMB_DA2
DGPU_PWRGD#
+1.5VSDGPU
+3VSDGPU
+3VSDGPU
+3VSDGPU
+1.5VSDGPU
+3VSDGPU
+3VS
FBBA[2..5]<12>
FBADQM[0..7]<12>
FBADQS[0..7]<12>
FBADQS#[0..7]<12>
FBA_D[0..63]<12>
FBAA[0..13]<12>
FBARAS# <12>
FBA_BA1 <12>
FBBA_CKE <12>
FBBACS0# <12>
FBAWE# <12>
FBA_BA0 <12>
FBACAS# <12>
FBAA12 <12>
FBA_RST <12>
FBAA_CKE <12>
FBA_BA2 <12>
FBBAODT0 <12>
FBAACS0# <12>
FBAAODT0 <12>
FBACLK0 <12>
FBACLK0# <12>
FBACLK1 <12>
FBACLK1# <12>
EC_SMB_CK2<5,8,31>
EC_SMB_DA2<5,8,31>
VGA_HDMI_SCL <16>
VGA_HDMI_SDA <16>
DGPU_PWRGD<16,31>
VGA_LVDS_A1#<14>
VGA_LVDS_ACLK<14>
VGA_LVDS_A2<14>
VGA_LVDS_A2#<14>
VGA_LVDS_ACLK#<14>
VGA_LVDS_A0<14>
VGA_LVDS_A0#<14>
VGA_LVDS_A1<14>
VGA_HDMI_TX2+<16>
VGA_HDMI_TX1+<16>
VGA_HDMI_TX0+<16>
VGA_HDMI_TX1-<16>
VGA_HDMI_TX2-<16>
VGA_HDMI_TX0-<16>
VGA_HDMI_CLK-<16>
VGA_HDMI_CLK+<16>
STRAP0 <11>
STRAP1 <11>
STRAP2 <11>
ROM_SO <11>
ROM_SCLK <11>
ROM_SI <11>
VGA_HDMI_SCL <16>
VGA_HDMI_SDA <16>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 LVDS,Memory Bus
B
9 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 LVDS,Memory Bus
B
9 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 LVDS,Memory Bus
B
9 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
10mil
1.27V~0.9V
HDMI
LVDS
5V PULL UP IN CONNECTER SIDE
091022 add for OPTIMUS
091216 change GPU P/N to SA00003UD00
100112 change Q73 P/N from SB00000AR00 to SB00000DH00
100112 change Q38 P/N from SB00000AR00 to SB00000DH00
change Q73,Q74,R821 from mount to @
20100123 change R822 from OPT@ to VGA@
R619
1.3K_0402_1%
@
R619
1.3K_0402_1%
@
12
C757
12P_0402_50V8J
@
C757
12P_0402_50V8J
@
1
2
R608
10K_0402_5%
VGA@
R608
10K_0402_5%
VGA@
12
Part 3 of 5
NCRFU
LVDS / TMDS
GENERAL STRAPSERIAL
U30C
N11M-GE1-S-A2 _BGA533
VGA@
Part 3 of 5
NCRFU
LVDS / TMDS
GENERAL STRAPSERIAL
U30C
N11M-GE1-S-A2 _BGA533
VGA@
IFPA_TXC
AC4
IFPA_TXC_N
AD4
IFPA_TXD0
V5
IFPA_TXD0_N
V4
IFPA_TXD1
AA5
IFPA_TXD1_N
AA4
IFPA_TXD2
W4
IFPA_TXD2_N
Y4
IFPA_TXD3
AB4
IFPA_TXD3_N
AB5
BUFRST_N N5
THERMDN D8
ROM_SCLK C9
ROM_SI A10
ROM_SO C10
ROM_CS_N B10
STRAP0 C7
IFPB_TXC
AB3
IFPB_TXC_N
AB2
IFPB_TXD4
W1
IFPB_TXD4_N
V1
IFPB_TXD5
W3
IFPB_TXD5_N
W2
IFPB_TXD6
AA2
IFPB_TXD6_N
AA3
IFPB_TXD7
AB1
IFPB_TXD7_N
AA1
IFPD_AUX_I2CX_SCL
D3
IFPD_AUX_I2CX_SDA_N
D4
IFPD_L0
F5
IFPD_L0_N
F4
IFPD_L1
E4
IFPD_L1_N
D5
IFPD_L2
C3
IFPD_L2_N
C4
IFPD_L3
B3
IFPD_L3_N
B4
IFPC_AUX_I2CW_SCL
G4
IFPC_AUX_I2CW_SDA_N
G5
IFPC_L0
P4
IFPC_L0_N
N4
IFPC_L1
M5
IFPC_L1_N
M4
IFPC_L2
L4
IFPC_L2_N
K4
IFPC_L3
H4
IFPC_L3_N
J4
IFPE_AUX_I2CY_SCL
F7
IFPE_AUX_I2CY_SDA_N
G6
IFPE_L0
D6
IFPE_L0_N
C6
IFPE_L1
A6
IFPE_L1_N
A7
IFPE_L2
B6
IFPE_L2_N
B7
IFPE_L3
E6
IFPE_L3_N
E7 IFPE_RSET F8
IFPD_RSET M6
IFPC_RSET R5
IFPAB_RSET AB6
STRAP2 A9
STRAP1 B9
SPDIF F9
CEC N2
NC C15
NC D15
NC J5
RFU_1 T6
RFU_2 W6
RFU_3 Y6
RFU_4 AA6
RFU_5 N3
THERMDP D9
C756
12P_0402_50V8J
@
C756
12P_0402_50V8J
@1
2
R625 1K_0402_1%@R625 1K_0402_1%@
1 2
R609
10K_0402_5%
VGA@
R609
10K_0402_5%
VGA@
12
Q38B
2N7002DW-T/R7_SOT363-6
VGA@
Q38B
2N7002DW-T/R7_SOT363-6
VGA@
3
5
4
R634
10K_0402_5%
VGA@
R634
10K_0402_5%
VGA@
12
C634
0.01U_0402_16V7K
@
C634
0.01U_0402_16V7K
@
1
2
G
D
S
Q74
SSM3K7002FU_SC70-3
@
G
D
S
Q74
SSM3K7002FU_SC70-3
@
2
13
Q73B
2N7002DW-T/R7_SOT363-6
@
Q73B
2N7002DW-T/R7_SOT363-6
@
3
5
4
R654
4.7K_0402_5%
VGA@
R654
4.7K_0402_5%
VGA@
1 2
R613
10K_0402_5%
VGA@
R613
10K_0402_5%
VGA@
12
R821
100K_0402_5%
@
R821
100K_0402_5%
@
1 2
R607
10K_0402_5%
VGA@
R607
10K_0402_5%
VGA@
12
R652
4.7K_0402_5%
VGA@
R652
4.7K_0402_5%
VGA@
1 2
R822
22K_0402_5%
VGA@
R822
22K_0402_5%
VGA@
12
MEMORY INTERFACE
Part 2 of 5
U30B
N11M-GE1-S-A2 _BGA533
VGA@
MEMORY INTERFACE
Part 2 of 5
U30B
N11M-GE1-S-A2 _BGA533
VGA@
FBA_D36
T23
FBA_CMD0 F26
FBA_CMD1 J24
FBA_CMD2 F25
FBA_CMD3 M23
FBA_CMD4 N27
FBA_CMD5 M27
FBA_CMD6 K26
FBA_CMD7 J25
FBA_CMD8 J27
FBA_CMD9 G23
FBA_CMD10 G26
FBA_CMD11 J23
FBA_CMD12 M25
FBA_CMD13 K27
FBA_CMD14 G25
FBA_CMD15 L24
FBA_CMD16 K23
FBA_CMD17 K24
FBA_CMD18 G22
FBA_CMD19 K25
FBA_CMD20 H22
FBA_CMD21 M26
FBA_CMD22 H24
FBA_CMD23 F27
FBA_CMD24 J26
FBA_CMD25 G24
FBA_CMD26 G27
FBA_CMD27 M24
FBA_CMD28 K22
FBA_DEBUG M22
FBA_CLK1 N24
FBA_CLK1_N N23
FBA_CLK0 F24
FBA_CLK0_N F23
FB_VREF A16
FBA_DQS_WP2 E19
FBA_DQS_WP4 T22
FBA_DQS_RN2 E18
FBA_DQS_RN4 R22
FBA_DQM2 D19
FBA_DQM4 T24
FBA_CMD29 J22
FBA_CMD30 L22
FBA_DQM1 B19
FBA_DQM3 D23
FBA_DQM0 C26
FBA_DQM5 AA23
FBA_DQM6 AB27
FBA_DQM7 T26
FBA_DQS_RN1 A18
FBA_DQS_RN3 B24
FBA_DQS_RN0 D25
FBA_DQS_RN5 Y24
FBA_DQS_RN6 AA27
FBA_DQS_RN7 R27
FBA_DQS_WP1 A19
FBA_DQS_WP3 A24
FBA_DQS_WP0 C25
FBA_DQS_WP5 AA24
FBA_DQS_WP6 AA26
FBA_DQS_WP7 T27
FBA_D63
N26 FBA_D62
N25
FBA_D60
R26
FBA_D61
T25
FBA_D59
V27
FBA_D56
V25
FBA_D57
R25
FBA_D58
V26
FBA_D55
AD27
FBA_D44
AA22
FBA_D51
W25
FBA_D52
AB25
FBA_D53
AB26
FBA_D54
AD26
FBA_D49
W27
FBA_D50
W26
FBA_D48
AA25 FBA_D47
V22 FBA_D46
W22 FBA_D45
W23
FBA_D40
AC24
FBA_D41
AB23
FBA_D42
AB24
FBA_D43
W24
FBA_D39
P22 FBA_D38
P24 FBA_D37
R23
FBA_D32
U24
FBA_D33
V24
FBA_D34
V23
FBA_D35
R24
FBA_D31
A26 FBA_D30
B25 FBA_D29
A25 FBA_D28
C22
FBA_D0
D22
FBA_D1
E24
FBA_D2
E22
FBA_D3
D24
FBA_D4
D26
FBA_D5
D27
FBA_D6
C27
FBA_D7
B27
FBA_D8
A21
FBA_D9
B21
FBA_D10
C21
FBA_D11
C19
FBA_D12
C18
FBA_D13
D18
FBA_D14
B18
FBA_D15
C16
FBA_D16
E21
FBA_D17
F21
FBA_D18
D20
FBA_D19
F20
FBA_D20
D17
FBA_D21
F18
FBA_D22
D16
FBA_D23
E16
FBA_D24
A22
FBA_D25
C24
FBA_D26
D21
FBA_D27
B22
R640
10K_0402_5%
VGA@
R640
10K_0402_5%
VGA@
12
R614
10K_0402_5%
VGA@
R614
10K_0402_5%
VGA@
12
R620 36K_0402_5%
VGA@
R620 36K_0402_5%
VGA@
1 2
Q38A
2N7002DW-T/R7_SOT363-6
VGA@
Q38A
2N7002DW-T/R7_SOT363-6
VGA@
61
2
R622 1K_0402_1%@R622 1K_0402_1%@
1 2
R649 1K_0402_1%@R649 1K_0402_1%@
1 2
T67
PAD T67
PAD
Q73A
2N7002DW-T/R7_SOT363-6
@
Q73A
2N7002DW-T/R7_SOT363-6
@
61
2
T65
PAD T65
PAD
R615
10K_0402_5%VGA@
R615
10K_0402_5%VGA@
1 2
R621 1K_0402_1%VGA@R621 1K_0402_1%VGA@
1 2
R618
1.3K_0402_1%
@
R618
1.3K_0402_1%
@
12
T66
PAD T66
PAD
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PEX_PLLVDD
+DACA_VDD
+FB_PLLAVDD
+DACB_VDD
+FB_PLLAVDD
+IFPE_PLLVDD
+IFPC_PLLVDD
+IFPAB_PLLVDD
+SP_PLLVDD
+IFPAB_PLLVDD
+DACA_VDD
+IFPD_PLLVDD
+IFPDE_IOVDD
+IFPA_IOVDD
+IFPC_IOVDD
+IFPC_PLLVDD
+IFPA_IOVDD
+VGASENSE
+1.05VS_PLL
+SP_PLLVDD
VGA_CORE
+3VSDGPU
+3VSDGPU
+1.5VSDGPU
+3VSDGPU
+1.8VSDGPU
+3VSDGPU
+1.05VSDGPU
+1.05VSDGPU
+1.05VSDGPU
+1.05VSDGPU
+1.05VSDGPU
+1.5VSDGPU
+1.05VSDGPU
+1.05VSDGPU
+1.05VSDGPU
+3VSDGPU
+VGASENSE <43>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 PWR
Custom
10 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 PWR
Custom
10 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 PWR
Custom
10 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
N10M-GS: 15.8A
N11M-GE1:16.7A
NEAR BALL
120mA
NEAR BALL
PLACE UNDER GPU
12~16mil
120mA
NEAR BGA
NEAR BGA
300mA
NEAR BGA NEAR BALL
NEAR BGA
NEAR BALL
285mA
220mA
NEAR BGA
NEAR BALL
120mA
CLOSE TO GPU
NEAR BALL
NEAR BALL NEAR BGA
NEAR BGA 2A
VID_PLLVDD=45mA
SP_PLLVDD=45mA
PLLVDD=60mA
FB_PLLVDD=100mA
FB_DLLVDD=100mA
220mA
NEAR BGA
NEAR BALL
NEAR BGA
120mA
NEAR BALL
NEAR BGA
NEAR BGA
NEAR BALL NEAR BGA
The power is base on VRAM type.
N10M-GS: 2.63A
N11M-GE1:2.55A
091022 add C804 330U for VGA_CORE
091022 add C813 22U follow NV review
091212 Add C712 for +IFPC_IOVDD
091212 Add C714 for +1.05VS_PLL
091212 Add C716 for +SP_PLLVDD
091212 Add C717 for +SP_PLLVDD
091216 change GPU P/N to
SA00003UD00
0104 Modify FB_CAL_PD_VDDQ connect from +1.5VS to +1.5VSDGPU
C620
0.01U_0402_16V7K
VGA@
C620
0.01U_0402_16V7K
VGA@
1
2
C695
0.1U_0402_10V7K
VGA@
C695
0.1U_0402_10V7K
VGA@
1
2
C710
10U_0805_6.3V6M
VGA@
C710
10U_0805_6.3V6M
VGA@
1
2
C660
1U_0402_6.3V6K
VGA@
C660
1U_0402_6.3V6K
VGA@
1
2
C627
0.047U_0402_25V7K
VGA@
C627
0.047U_0402_25V7K
VGA@
1
2
C652
0.1U_0402_10V7K
VGA@
C652
0.1U_0402_10V7K
VGA@
1
2
C692
0.1U_0402_10V7K
VGA@
C692
0.1U_0402_10V7K
VGA@
1
2
C619
4.7U 6.3V K X5R 0603
VGA@
C619
4.7U 6.3V K X5R 0603
VGA@
1
2
C698
1U_0402_6.3V6K
VGA@
C698
1U_0402_6.3V6K
VGA@
1
2
L20
MBK1608121YZF_0603
VGA@
L20
MBK1608121YZF_0603
VGA@
1 2
C628
0.01U_0402_16V7K
VGA@
C628
0.01U_0402_16V7K
VGA@
1
2
C714
0.1U_0402_10V7K
VGA@
C714
0.1U_0402_10V7K
VGA@
1
2
C712
0.1U_0402_10V7K
VGA@
C712
0.1U_0402_10V7K
VGA@
1
2
L32
MBK1608121YZF_0603
VGA@
L32
MBK1608121YZF_0603
VGA@
1 2
C679
1U_0402_6.3V6K
VGA@
C679
1U_0402_6.3V6K
VGA@
1
2
C694
4.7U 6.3V K X5R 0603
VGA@
C694
4.7U 6.3V K X5R 0603
VGA@
1
2
C642
0.01U_0402_16V7K
VGA@
C642
0.01U_0402_16V7K
VGA@
1
2
R637 40.2_0402_1%VGA@R637 40.2_0402_1%VGA@
R62410K_0402_5%
VGA@
R62410K_0402_5%
VGA@
12
C617
4.7U 6.3V K X5R 0603
VGA@
C617
4.7U 6.3V K X5R 0603
VGA@
1
2
L29
MBK1608121YZF_0603
VGA@
L29
MBK1608121YZF_0603
VGA@
12
C658
4.7U 6.3V K X5R 0603
VGA@
C658
4.7U 6.3V K X5R 0603
VGA@
1
2
C709
22U_0805_6.3V6M
VGA@
C709
22U_0805_6.3V6M
VGA@
1
2
C645
0.1U_0402_10V7K
VGA@
C645
0.1U_0402_10V7K
VGA@
1
2
Part 4 of 5
POWER
U30D
N11M-GE1-S-A2 _BGA533
VGA@
Part 4 of 5
POWER
U30D
N11M-GE1-S-A2 _BGA533
VGA@
VDD
R13
VDD
R14
VDD
R15
VDD
R16
VDD
R17
VDD
T9
VDD
T11
VDD
T17
VDD
U9
VDD
P11 VDD
N19 VDD
N17 VDD
N16 VDD
N15 VDD
N14
VDD
R12
VDD
M11
VDD
N12
VDD
M9 VDD
L9 VDD
J13 VDD
J12 VDD
J10 VDD
J9
VDD
N13
VDD
P12
VDD
P13
VDD
P14
VDD
P15
VDD
P16
VDD
P17
VDD
R9
VDD
R11
VDD
N11
VDD
M17
VDD
N9
VDD
U19
VDD
W9
VDD
W13
VDD
W18
VDD
W19
FBVDDQ A13
FBVDDQ B13
FBVDDQ C13
FBVDDQ D13
FBVDDQ D14
FBVDDQ E13
FBVDDQ F13
FBVDDQ F14
FBVDDQ F15
FBVDDQ F16
VDD
W12 VDD
W10
FBVDDQ F17
FBVDDQ F19
FBVDDQ F22
FBVDDQ H23
FBVDDQ H26
FBVDDQ J15
FBVDDQ J16
FBVDDQ J18
FBVDDQ J19
FBVDDQ L19
FBVDDQ L23
FBVDDQ L26
FBVDDQ M19
FBVDDQ N22
FBVDDQ U22
FBVDDQ Y22
PEX_IOVDDQ AB7
PEX_IOVDDQ AB8
PEX_IOVDDQ AB9
PEX_IOVDDQ AB13
PEX_IOVDDQ AB16
PEX_IOVDDQ AB17
PEX_IOVDDQ AC7
PEX_IOVDDQ AC13
PEX_IOVDDQ AD6
PEX_IOVDDQ AE6
PEX_IOVDDQ AF6
PEX_IOVDDQ AG6
PEX_IOVDD AG7
PEX_IOVDD AF7
PEX_IOVDD AE7
PEX_IOVDD AD8
PEX_IOVDD AD7
PEX_IOVDD AC9
PEX_PLLVDD AF9
VID_PLLVDD K6
SP_PLLVDD L6
PLLVDD K5
FB_PLLAVDD R19
VDD_SENSE W 15
FB_CAL_PD_VDDQ B15
DACB_VDD W5
DACA_VDD AG2
FB_PLLAVDD AC19
FB_DLLAVDD T19
VDD_SENSE E15
VDD33
A12
VDD33
B12
VDD33
C12
VDD33
D12
VDD33
E12
VDD33
F12
IFPE_PLLVDD
D7
IFPD_PLLVDD
N6
IFPC_PLLVDD
P6
IFPAB_PLLVDD
AD5
IFPDE_IOVDD
H6
IFPC_IOVDD
J6
IFPB_IOVDD
V2
IFPA_IOVDD
V3
PEX_SVDD_3V3
AG9
C708
4.7U 6.3V K X5R 0603
VGA@
C708
4.7U 6.3V K X5R 0603
VGA@
1
2
C664
1U_0402_6.3V6K
VGA@
C664
1U_0402_6.3V6K
VGA@
1
2
L24
MBK1608121YZF_0603
VGA@L24
MBK1608121YZF_0603
VGA@
1 2
R628 0_0402_5%
VGA@
R628 0_0402_5%
VGA@
1 2
C623
1U_0402_6.3V6K
VGA@
C623
1U_0402_6.3V6K
VGA@
1
2
C650
0.1U_0402_10V7K
VGA@
C650
0.1U_0402_10V7K
VGA@
1
2
C706
4.7U 6.3V K X5R 0603
VGA@
C706
4.7U 6.3V K X5R 0603
VGA@
1
2
C644
0.01U_0402_16V7K
VGA@
C644
0.01U_0402_16V7K
VGA@
1
2
C621
0.01U_0402_16V7K
VGA@
C621
0.01U_0402_16V7K
VGA@
1
2
C624
0.047U_0402_25V7K
VGA@
C624
0.047U_0402_25V7K
VGA@
1
2
C659
1U_0402_6.3V6K
VGA@
C659
1U_0402_6.3V6K
VGA@
1
2
C654
1U_0402_6.3V6K
VGA@
C654
1U_0402_6.3V6K
VGA@
1
2
C649
0.1U_0402_10V7K
VGA@
C649
0.1U_0402_10V7K
VGA@
1
2
C662
0.1U_0402_10V7K
VGA@
C662
0.1U_0402_10V7K
VGA@
1
2
R626 10K_0402_5%VGA@R626 10K_0402_5%VGA@
1 2
C640
1U_0402_6.3V6K
VGA@
C640
1U_0402_6.3V6K
VGA@
1
2
C635
0.1U_0402_10V7K
VGA@
C635
0.1U_0402_10V7K
VGA@
1
2
C716
0.1U_0402_10V7K
VGA@
C716
0.1U_0402_10V7K
VGA@
1
2
C678
0.1U_0402_10V7K
VGA@
C678
0.1U_0402_10V7K
VGA@
1
2
C656
0.1U_0402_10V7K
VGA@
C656
0.1U_0402_10V7K
VGA@
1
2
C648
0.1U_0402_10V7K
VGA@
C648
0.1U_0402_10V7K
VGA@
1
2
C655
1U_0402_6.3V6K
VGA@
C655
1U_0402_6.3V6K
VGA@
1
2
C663
4.7U 6.3V K X5R 0603
VGA@
C663
4.7U 6.3V K X5R 0603
VGA@
1
2
C707
10U_0805_6.3V6M
VGA@
C707
10U_0805_6.3V6M
VGA@
1
2
R62710K_0402_5%
@
R62710K_0402_5%
@
12
L33
MBK1608121YZF_0603
VGA@
L33
MBK1608121YZF_0603
VGA@
1 2
C637
0.1U_0402_10V7K
VGA@
C637
0.1U_0402_10V7K
VGA@
1
2
C639
1U_0402_6.3V6K
VGA@
C639
1U_0402_6.3V6K
VGA@
1
2
C638
0.1U_0402_10V7K
VGA@
C638
0.1U_0402_10V7K
VGA@
1
2
C646
0.1U_0402_10V7K
VGA@
C646
0.1U_0402_10V7K
VGA@
1
2
C622
0.01U_0402_16V7K
VGA@
C622
0.01U_0402_16V7K
VGA@
1
2
L21
MBK1608121YZF_0603
VGA@
L21
MBK1608121YZF_0603
VGA@
1 2
C681
0.1U_0402_10V7K
VGA@
C681
0.1U_0402_10V7K
VGA@
1
2
C689
1U_0402_6.3V6K
VGA@
C689
1U_0402_6.3V6K
VGA@
1
2
C633
0.047U_0402_25V7K
VGA@
C633
0.047U_0402_25V7K
VGA@
1
2
L23
MBK1608121YZF_0603
VGA@L23
MBK1608121YZF_0603
VGA@
1 2
C665
4.7U 6.3V K X5R 0603
VGA@
C665
4.7U 6.3V K X5R 0603
VGA@
1
2
C699
0.1U_0402_10V7K
VGA@
C699
0.1U_0402_10V7K
VGA@
1
2
R62310K_0402_5%
VGA@
R62310K_0402_5%
VGA@
12
C632
0.047U_0402_25V7K
VGA@
C632
0.047U_0402_25V7K
VGA@
1
2
C700
0.1U_0402_10V7K
VGA@
C700
0.1U_0402_10V7K
VGA@
1
2
C690
1U_0402_6.3V6K
VGA@
C690
1U_0402_6.3V6K
VGA@
1
2
C685
4.7U 6.3V K X5R 0603
VGA@
C685
4.7U 6.3V K X5R 0603
VGA@
1
2
C701
4700P_0402_25V7K
VGA@
C701
4700P_0402_25V7K
VGA@
1
2
C682
0.1U_0402_10V7K
VGA@
C682
0.1U_0402_10V7K
VGA@
1
2
C625
0.047U_0402_25V7K
VGA@
C625
0.047U_0402_25V7K
VGA@
1
2
C661
4.7U 6.3V K X5R 0603
VGA@
C661
4.7U 6.3V K X5R 0603
VGA@
1
2
C641
0.1U_0402_10V7K
VGA@
C641
0.1U_0402_10V7K
VGA@
1
2
C647
4.7U 6.3V K X5R 0603
VGA@
C647
4.7U 6.3V K X5R 0603
VGA@
1
2
C657
1U_0402_6.3V6K
VGA@
C657
1U_0402_6.3V6K
VGA@
1
2
L22
MBK1608121YZF_0603
VGA@
L22
MBK1608121YZF_0603
VGA@
1 2
C703
4.7U 6.3V K X5R 0603
VGA@
C703
4.7U 6.3V K X5R 0603
VGA@
1
2
C687
0.1U_0402_10V7K
VGA@
C687
0.1U_0402_10V7K
VGA@
1
2
+
C804
330U_D2_2.5VY_R9M
VGA@
+
C804
330U_D2_2.5VY_R9M
VGA@
1
2
C630
0.01U_0402_16V7K
VGA@
C630
0.01U_0402_16V7K
VGA@
1
2
C631
0.01U_0402_16V7K
VGA@
C631
0.01U_0402_16V7K
VGA@
1
2
C651
0.1U_0402_10V7K
VGA@
C651
0.1U_0402_10V7K
VGA@
1
2
C813
22U_0805_6.3V6M
@
C813
22U_0805_6.3V6M
@
1
2
C653
0.1U_0402_10V7K
VGA@
C653
0.1U_0402_10V7K
VGA@
1
2
C626
1U_0402_6.3V6K
VGA@
C626
1U_0402_6.3V6K
VGA@
1
2
C629
0.047U_0402_25V7K
VGA@
C629
0.047U_0402_25V7K
VGA@
1
2
C717
0.1U_0402_10V7K
VGA@
C717
0.1U_0402_10V7K
VGA@
1
2
C693
0.1U_0402_10V7K
VGA@
C693
0.1U_0402_10V7K
VGA@
1
2
C636
1U_0402_6.3V6K
VGA@
C636
1U_0402_6.3V6K
VGA@
1
2
C683
4.7U 6.3V K X5R 0603
VGA@
C683
4.7U 6.3V K X5R 0603
VGA@
1
2
C618
4.7U 6.3V K X5R 0603
VGA@
C618
4.7U 6.3V K X5R 0603
VGA@
1
2
C643
0.01U_0402_16V7K
VGA@
C643
0.01U_0402_16V7K
VGA@
1
2
L34
MBK1608121YZF_0603
VGA@
L34
MBK1608121YZF_0603
VGA@
12
C688
0.1U_0402_10V7K
VGA@
C688
0.1U_0402_10V7K
VGA@
1
2
C702
470P_0402_50V7K
VGA@
C702
470P_0402_50V7K
VGA@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
STRAP1
STRAP2
ROM_SO
ROM_SI
ROM_SCLK
STRAP0
+3VSDGPU
STRAP1<9>
STRAP0<9>
ROM_SO<9>
ROM_SCLK<9>
ROM_SI<9>
STRAP2<9>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 GND & STRAP
B
11 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 GND & STRAP
B
11 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 GND & STRAP
B
11 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
A total of 8 signals are required for GB1 strapping this includes
2 reference signals
A total of 24 logical strapping bits are available
6 physical strapping pins
4 logical strapping bits
Place Components Close to BGA
X76
STRAP1 use for 3GIO_PADCFG to set 35K pull up.
(PUN-04335-001_V10 HW9 update)
K4W1G1646E-HC12
H5TQ1G63BFR-12C
PU 45K
PD 10K
PU 35KN11M-GE1
LP1
(0x0A7D)
40nm
PD 15K
PD 15K
ROM_SO
PU 35K
ROM_SIROM_SCLK STRAP0STRAP1STRAP2GPU
Samsung
800MHz
(defaul)
PU 45K
FB Memory (DDR3)
PU 45KPD 10K PD 20K64Mx16
Hynix
800MHz
PU 45K
PD 15K64Mx16
Physical
Strapping
Pin
Power
Rail
Logical
Strapping
Bit 3
Logical
Strapping
Bit 2
Logical
Strapping
Bit 1
Logical
Strapping
Bit 0
ROM_SO
ROM_SCLK
ROM_SI
STRAP2
STRAP1
STRAP0
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
XCLK_417
3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0]
PCI_DEVID[4]
PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
USER[3] USER[2] USER[1] USER[0]
RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0]
SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM
FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEVICE
DG-04642-001-V01(May 22, 2009)
Memory/PKG
40.2 ohm
FB_CAL_PU_GND FBCAL_PD_VDDQ
DDR3
FBCAL_TERM_GNDFBVDDQ
+1.5VS
Must be used 1% resister for driver calibration
40.2/60.4 ohm40.2 ohm
N11M-GE1
LP1
Resistor
Values Pull-up to VDD
Pull-down to GND
*
*
Panel USER Straps
User[3:0]
EDID used
Customer defined
SMBUS_ALT_ADDR
0
1
0x9E (Default)
0x9C (Multi-GPU usage)
*
SUB_VENDOR
0
1
No VBIOS ROM (Default)
BIOS ROM is present
XCLK_417
0
1
277MHz (Default)
Reserved
*
5Kohm
10Kohm
15Kohm
20Kohm
25Kohm
30Kohm
35Kohm
45Kohm
*
FB_0_BAR_SIZE
0
1
256MB (Default)
Reserved
1000
1001
1010
1011
*
VGA_DEVICE
0
1
3D Device
VGA Device (Default)
1100
1101
1110
1111
0000
0001
0010
0011
0100
0101
0110
0111
*
PEX_PLL_EN_TERM
0
1
Disable (Default)
Enable
*
3GIO_PADCFG
3GIO_PADCFG[3:0]
0110
Notebook Default
*
SLOT_CLOCK_CFG
GPU and MCH don't share a common reference clock
GPU and MCH share a common reference clock (Default)
0
1
091216 change GPU P/N to SA00003UD00
R646
45.3K_0402_1%
VGA@
R646
45.3K_0402_1%
VGA@
12
R642
20K_0402_1%
SAM@
R642
20K_0402_1%
SAM@
12
R645
45.3K_0402_1%
VGA@
R645
45.3K_0402_1%
VGA@
12
R629
15K_0402_1%
VGA@
R629
15K_0402_1%
VGA@
12
R644
34.8K_0402_1%
VGA@
R644
34.8K_0402_1%
VGA@
12
R642
15K_0402_1%
HY@
R642
15K_0402_1%
HY@
R616 60.4_0402_1%
VGA@
R616 60.4_0402_1%
VGA@
1 2
R641
2K_0402_5%
@
R641
2K_0402_5%
@
12
R630
15K_0402_1%
@
R630
15K_0402_1%
@
12
R638
10K_0402_5%
VGA@
R638
10K_0402_5%
VGA@
12
R639
2K_0402_5%
@
R639
2K_0402_5%
@
12
R647
30K_0402_1%
@
R647
30K_0402_1%
@
12
R635
40.2K_0402_1%
VGA@
R635
40.2K_0402_1%
VGA@
12
R617 40.2_0402_1%VGA@R617 40.2_0402_1%VGA@
1 2
R648
10K_0402_5%
@
R648
10K_0402_5%
@
12
GND
Part 5 of 5
U30E
N11M-GE1-S-A2 _BGA533
VGA@
GND
Part 5 of 5
U30E
N11M-GE1-S-A2 _BGA533
VGA@
GND
B2
GND
B5
GND
B8
GND
B11
GND
B14
GND
B17
GND
B20
GND
B23
GND
B26
GND
E2
GND
E5
GND
E8
GND
E11
GND T14
GND T15
GND T16
GND U2
GND U5
GND U11
GND U12
GND U13
GND U14
GND U15
GND U16
GND U17
GND AF14
GND AF17
GND AF20
GND AF23
GND AF26
GND U23
GND U26
GND V9
GND V19
GND W11
GND W14
GND W17
GND Y2
GND Y5
GND Y23
GND Y26
GND AC2
GND AC5
GND AC6
GND AC8
GND AC11
GND AC14
GND AC17
GND AC20
GND AC23
GND AC26
GND AF2
GND AF5
GND AF8
GND AF11
GND
E17
GND
E20
GND
E23
GND
E26
GND
H2
GND
H5
GND
J11
GND
J14
GND
J17
GND
K9
GND
K19
GND
L2
GND
L5
GND
L11
GND
L12
GND
L13
GND
L14
GND
L15
GND
L16
GND
L17
GND
M12
GND
M13
GND
M14
GND
M15
GND
M16
GND
P2
GND
P5
GND
P9
GND
P19
GND
P23
GND
P26
GND
T12
GND
T13
GND_SENSE
E14
GND_SENSE
W16
FB_CAL_PU_GND A15
FB_CAL_TERM_GND B16
MULTI_STRAP_REF0_GND F10
MULTI_STRAP_REF1_GND F11
GND F6
R636
40.2K_0402_1%
VGA@
R636
40.2K_0402_1%
VGA@
12
R643
34.8K_0402_1%
@
R643
34.8K_0402_1%
@
12
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBACLK1#
FBACLK1
FBADQS#1
FBADQM1
FBADQS1
FBACLK1
FBACLK1#FBACLK0#
FBACLK0
FBADQS#2
FBADQM2
FBADQS2
FBA_BA1
FBAA11
FBAA5
FBAA4
FBACAS#
FBAWE#
FBA_BA0
FBAA12
FBAA7
FBAA10
FBAA_CKE
FBAA0
FBAA9
FBAA6
FBAA2
FBAA8
FBAA3
FBAA1
FBAA13
FBA_BA2
FBAACS0#
FBARAS#
FBA_RST
FBAAODT0
FBA_RST
FBAA0
FBAA12
FBAA13
FBAACS0#
FBAA2
FBAA5
FBAWE#
FBAA3
FBAAODT0
FBAA9
FBAA7
FBACAS#
FBARAS#
FBAA4
FBAA_CKE
FBA_BA0
FBAA1
FBA_BA2
FBAA6
FBA_BA1
FBAA11
FBAA10
FBAA8
FBARAS#
FBA_BA1
FBBA2
FBBA4
FBBA3
FBBACS0#
FBAA11
FBACAS#
FBAWE#
FBA_BA0
FBBA5
FBAA12
FBA_RST
FBAA7
FBAA10
FBAA0
FBAA9
FBAA6
FBAA8
FBAA1
FBAA13
FBA_BA2
FBBAODT0
FBA_BA0
FBBAODT0
FBAA9
FBBACS0#
FBAA8
FBBA2
FBAA13
FBAA10
FBARAS#
FBBA5
FBAA6
FBA_RST
FBAA11
FBBA4
FBAWE#
FBA_BA2
FBAA0
FBA_BA1
FBAA12
FBAA1
FBAA7
FBACAS#
FBBA3
FBBA_CKE
FBBA_CKE
FBACLK0#
FBACLK0
FBADQS6
FBADQM6
FBADQS#6
FBADQM[0..7]
FBADQS#[0..7]
FBADQS[0..7]
FBA_D[0..63]
FBAA[0..13]
FBBA[2..5]
FBA_D23
FBA_D21
FBA_D20
FBA_D22
FBA_D16
FBADQS5
FBADQM5
FBADQS#5
FBADQS3
FBADQM3
FBADQS#3
FBADQS0
FBADQS#0
FBADQM0
FBA_D1
FBA_D3
FBA_D39
FBA_D35
FBA_D38
FBA_D37
FBADQM7
FBADQS#7
FBADQS7
FBADQS4
FBADQM4
FBADQS#4
FBA_D50
FBA_D55
FBA_D54
FBA_D8
FBA_D9
FBA_D13
FBA_D11
FBA_D10
FBA_D15
FBA_D12
FBA_D14
FBA_D41
FBA_D40
FBA_D42
FBA_D44
FBA_D43
FBA_D45
FBA_D46
FBA_D47FBA_D34
FBA_D33
FBA_D36
FBA_D32
FBA_D25
FBA_D6
FBA_D49
FBA_D51
FBA_D48
FBA_D53
FBA_D52
FBA_D31
FBA_D29
FBA_D30
FBA_D28
FBA_D27
FBA_D26
FBA_D24
FBA_D7
FBA_D5
FBA_D4
FBA_D0
FBA_D2
FBA_D60
FBA_D57
FBA_D62
FBA_D63
FBA_D58
FBA_D59
FBA_D56
FBA_D61
FBA_D18
FBA_D19
FBA_D17
FBACLK1#
FBACLK1
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU +1.5VSDGPU
+VRAM_VREFA +VRAM_VREFB
+VRAM_VREFC +VRAM_VREFD
+VRAM_VREFA
+VRAM_VREFB
+VRAM_VREFA
+VRAM_VREFB
+VRAM_VREFC
+VRAM_VREFD
+VRAM_VREFC
+VRAM_VREFD
FBAA[0..13]<9>
FBADQM[0..7]<9>
FBADQS#[0..7]<9>
FBA_D[0..63]<9>
FBBA[2..5]<9>
FBADQS[0..7]<9>
FBA_BA0<9>
FBA_BA1<9>
FBA_BA2<9>
FBACLK0<9>
FBACLK0#<9>
FBAA_CKE<9>
FBAAODT0<9>
FBAACS0#<9>
FBARAS#<9>
FBAWE#<9>
FBACAS#<9>
FBA_RST<9>
FBACLK1<9>
FBACLK1#<9>
FBBA_CKE<9>
FBBAODT0<9>
FBBACS0#<9>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 VRAM DDR3
C
12 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 VRAM DDR3
C
12 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
N11M-OP2 VRAM DDR3
C
12 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
N10x 40nm DDR3 MAPPING
NVIDIA COCUMENT FOR DA-3978-001
15MIL 15MIL
15MIL 15MIL
3
2
7 6
4 5
0
1
091020 reserve C805/C806/C807
10P for RF solution
091126 swap nets for layout 091026 swap nets for layout
100-BALL
SDRAM DDR3
U33
K4W1G1646E-HC12
SAM@
100-BALL
SDRAM DDR3
U33
K4W1G1646E-HC12
SAM@
WE
L4
RAS
J4
CAS
K4
CS
L3
CKE/CKE0
K10
CK
J8
CK
K8
DQSU
B8
BA0
M3
BA1
N9
A2
P4
A3
N3
A4
P9
A5
P3
A6
R9
A7
R3
A8
T9
A9
R4
A10/AP
L8
A11
R8
DQL0 E4
DQL1 F8
DQL2 F3
DQL3 F9
DQL4 H4
DQL5 H9
DQL6 G3
DQL7 H8
VSSQ D2
VSS A10
VSS E2
VSS B4
NC/ODT1
J2
VDD B3
VDD D10
VDDQ A2
VDDQ A9
VDDQ C2
VDDQ C10
NC/CS1
L2
NC/CE1
J10
VDDQ E10
ZQ/ZQ0
L9
RESET
T3
DQSL
F4
DMU
D4 DML
E8
VSSQ B2
VSSQ B10
VSSQ D9
VSSQ E3
DQSU
C8
VSSQ E9
DQSL
G4
VDDQ F2
VSSQ F10
VSSQ G2
VDDQ H3
VDDQ H10
VSSQ G10
VREFCA
M9
VSS G9
VDD G8
ODT/ODT0
K2
A0
N4
A1
P8
VDD K3
A12
N8
VSS J3
VDD K9
DQU1 C4
DQU2 C9
DQU3 C3
DQU4 A8
DQU5 A3
DQU6 B9
DQU7 A4
DQU0 D8
A13
T4
A14
T8
A15/BA3
M8
BA2
M4
VREFDQ
H2
NCZQ1
L10
VDD N2
VDD N10
VDD R2
VDD R10
VSS J9
VSS M2
VSS M10
VSS P2
VSS P10
VSS T2
VSS T10
VDDQ D3
NC
A1
NC
A11
NC
T1
NC
T11
U31
H5TQ1G63BFR-12C
HY@
U31
H5TQ1G63BFR-12C
HY@
R653
1.33K_0402_1%
VGA@
R653
1.33K_0402_1%
VGA@
12
C684
1U_0402_6.3V4Z
VGA@
C684
1U_0402_6.3V4Z
VGA@
1
2
C605
0.1U_0402_10V6K
VGA@
C605
0.1U_0402_10V6K
VGA@
1
2
100-BALL
SDRAM DDR3
U32
K4W1G1646E-HC12
SAM@
100-BALL
SDRAM DDR3
U32
K4W1G1646E-HC12
SAM@
WE
L4
RAS
J4
CAS
K4
CS
L3
CKE/CKE0
K10
CK
J8
CK
K8
DQSU
B8
BA0
M3
BA1
N9
A2
P4
A3
N3
A4
P9
A5
P3
A6
R9
A7
R3
A8
T9
A9
R4
A10/AP
L8
A11
R8
DQL0 E4
DQL1 F8
DQL2 F3
DQL3 F9
DQL4 H4
DQL5 H9
DQL6 G3
DQL7 H8
VSSQ D2
VSS A10
VSS E2
VSS B4
NC/ODT1
J2
VDD B3
VDD D10
VDDQ A2
VDDQ A9
VDDQ C2
VDDQ C10
NC/CS1
L2
NC/CE1
J10
VDDQ E10
ZQ/ZQ0
L9
RESET
T3
DQSL
F4
DMU
D4 DML
E8
VSSQ B2
VSSQ B10
VSSQ D9
VSSQ E3
DQSU
C8
VSSQ E9
DQSL
G4
VDDQ F2
VSSQ F10
VSSQ G2
VDDQ H3
VDDQ H10
VSSQ G10
VREFCA
M9
VSS G9
VDD G8
ODT/ODT0
K2
A0
N4
A1
P8
VDD K3
A12
N8
VSS J3
VDD K9
DQU1 C4
DQU2 C9
DQU3 C3
DQU4 A8
DQU5 A3
DQU6 B9
DQU7 A4
DQU0 D8
A13
T4
A14
T8
A15/BA3
M8
BA2
M4
VREFDQ
H2
NCZQ1
L10
VDD N2
VDD N10
VDD R2
VDD R10
VSS J9
VSS M2
VSS M10
VSS P2
VSS P10
VSS T2
VSS T10
VDDQ D3
NC
A1
NC
A11
NC
T1
NC
T11
C609
1U_0402_6.3V4Z
VGA@
C609
1U_0402_6.3V4Z
VGA@
1
2
R604
1.33K_0402_1%
VGA@
R604
1.33K_0402_1%
VGA@
12
C704
1U_0402_6.3V4Z
VGA@
C704
1U_0402_6.3V4Z
VGA@
1
2
C676
1U_0402_6.3V4Z
VGA@
C676
1U_0402_6.3V4Z
VGA@
1
2
C610
1U_0402_6.3V4Z
VGA@
C610
1U_0402_6.3V4Z
VGA@
1
2
C614
1U_0402_6.3V4Z
VGA@
C614
1U_0402_6.3V4Z
VGA@
1
2
R600
240_0402_1%
VGA@
R600
240_0402_1%
VGA@
12
C608
1U_0402_6.3V4Z
VGA@
C608
1U_0402_6.3V4Z
VGA@
1
2
C607
1U_0402_6.3V4Z
VGA@
C607
1U_0402_6.3V4Z
VGA@
1
2
U32
H5TQ1G63BFR-12C
HY@
U32
H5TQ1G63BFR-12C
HY@
C675
10U_0603_6.3V6M
VGA@
C675
10U_0603_6.3V6M
VGA@
1
2
R612
240_0402_1%
VGA@
R612
240_0402_1%
VGA@
12
C805
10P_0402_50V8J
@C805
10P_0402_50V8J
@
1
2
R633
243_0402_1%
VGA@
R633
243_0402_1%
VGA@
1 2
C606
1U_0402_6.3V4Z
VGA@
C606
1U_0402_6.3V4Z
VGA@
1
2
100-BALL
SDRAM DDR3
U34
K4W1G1646E-HC12
SAM@
100-BALL
SDRAM DDR3
U34
K4W1G1646E-HC12
SAM@
WE
L4
RAS
J4
CAS
K4
CS
L3
CKE/CKE0
K10
CK
J8
CK
K8
DQSU
B8
BA0
M3
BA1
N9
A2
P4
A3
N3
A4
P9
A5
P3
A6
R9
A7
R3
A8
T9
A9
R4
A10/AP
L8
A11
R8
DQL0 E4
DQL1 F8
DQL2 F3
DQL3 F9
DQL4 H4
DQL5 H9
DQL6 G3
DQL7 H8
VSSQ D2
VSS A10
VSS E2
VSS B4
NC/ODT1
J2
VDD B3
VDD D10
VDDQ A2
VDDQ A9
VDDQ C2
VDDQ C10
NC/CS1
L2
NC/CE1
J10
VDDQ E10
ZQ/ZQ0
L9
RESET
T3
DQSL
F4
DMU
D4 DML
E8
VSSQ B2
VSSQ B10
VSSQ D9
VSSQ E3
DQSU
C8
VSSQ E9
DQSL
G4
VDDQ F2
VSSQ F10
VSSQ G2
VDDQ H3
VDDQ H10
VSSQ G10
VREFCA
M9
VSS G9
VDD G8
ODT/ODT0
K2
A0
N4
A1
P8
VDD K3
A12
N8
VSS J3
VDD K9
DQU1 C4
DQU2 C9
DQU3 C3
DQU4 A8
DQU5 A3
DQU6 B9
DQU7 A4
DQU0 D8
A13
T4
A14
T8
A15/BA3
M8
BA2
M4
VREFDQ
H2
NCZQ1
L10
VDD N2
VDD N10
VDD R2
VDD R10
VSS J9
VSS M2
VSS M10
VSS P2
VSS P10
VSS T2
VSS T10
VDDQ D3
NC
A1
NC
A11
NC
T1
NC
T11
C680
1U_0402_6.3V4Z
VGA@
C680
1U_0402_6.3V4Z
VGA@
1
2
C602
1U_0402_6.3V4Z
VGA@
C602
1U_0402_6.3V4Z
VGA@
1
2
C612
1U_0402_6.3V4Z
VGA@
C612
1U_0402_6.3V4Z
VGA@
1
2
C677
1U_0402_6.3V4Z
VGA@
C677
1U_0402_6.3V4Z
VGA@
1
2
R606
243_0402_1%
VGA@
R606
243_0402_1%
VGA@
12
R651
240_0402_1%
VGA@
R651
240_0402_1%
VGA@
12
U34
H5TQ1G63BFR-12C
HY@
U34
H5TQ1G63BFR-12C
HY@
C613
1U_0402_6.3V4Z
VGA@
C613
1U_0402_6.3V4Z
VGA@
1
2
C806
10P_0402_50V8J
@
C806
10P_0402_50V8J
@
1
2
C696
1U_0402_6.3V4Z
VGA@
C696
1U_0402_6.3V4Z
VGA@
1
2
C691
1U_0402_6.3V4Z
VGA@
C691
1U_0402_6.3V4Z
VGA@
1
2
C604
10U_0603_6.3V6M
VGA@
C604
10U_0603_6.3V6M
VGA@
1
2
C697
10U_0603_6.3V6M
VGA@
C697
10U_0603_6.3V6M
VGA@
1
2
R601
1.33K_0402_1%
VGA@
R601
1.33K_0402_1%
VGA@
12
C807
10P_0402_50V8J
@
C807
10P_0402_50V8J
@
1
2
C601
0.1U_0402_10V6K
VGA@
C601
0.1U_0402_10V6K
VGA@
1
2
C616
0.1U_0402_10V6K
VGA@
C616
0.1U_0402_10V6K
VGA@
1
2
100-BALL
SDRAM DDR3
U31
K4W1G1646E-HC12
SAM@
100-BALL
SDRAM DDR3
U31
K4W1G1646E-HC12
SAM@
WE
L4
RAS
J4
CAS
K4
CS
L3
CKE/CKE0
K10
CK
J8
CK
K8
DQSU
B8
BA0
M3
BA1
N9
A2
P4
A3
N3
A4
P9
A5
P3
A6
R9
A7
R3
A8
T9
A9
R4
A10/AP
L8
A11
R8
DQL0 E4
DQL1 F8
DQL2 F3
DQL3 F9
DQL4 H4
DQL5 H9
DQL6 G3
DQL7 H8
VSSQ D2
VSS A10
VSS E2
VSS B4
NC/ODT1
J2
VDD B3
VDD D10
VDDQ A2
VDDQ A9
VDDQ C2
VDDQ C10
NC/CS1
L2
NC/CE1
J10
VDDQ E10
ZQ/ZQ0
L9
RESET
T3
DQSL
F4
DMU
D4 DML
E8
VSSQ B2
VSSQ B10
VSSQ D9
VSSQ E3
DQSU
C8
VSSQ E9
DQSL
G4
VDDQ F2
VSSQ F10
VSSQ G2
VDDQ H3
VDDQ H10
VSSQ G10
VREFCA
M9
VSS G9
VDD G8
ODT/ODT0
K2
A0
N4
A1
P8
VDD K3
A12
N8
VSS J3
VDD K9
DQU1 C4
DQU2 C9
DQU3 C3
DQU4 A8
DQU5 A3
DQU6 B9
DQU7 A4
DQU0 D8
A13
T4
A14
T8
A15/BA3
M8
BA2
M4
VREFDQ
H2
NCZQ1
L10
VDD N2
VDD N10
VDD R2
VDD R10
VSS J9
VSS M2
VSS M10
VSS P2
VSS P10
VSS T2
VSS T10
VDDQ D3
NC
A1
NC
A11
NC
T1
NC
T11
C674
1U_0402_6.3V4Z
VGA@
C674
1U_0402_6.3V4Z
VGA@
1
2
C611
1U_0402_6.3V4Z
VGA@
C611
1U_0402_6.3V4Z
VGA@
1
2
R603
1.33K_0402_1%
VGA@
R603
1.33K_0402_1%
VGA@
12
C600
10U_0603_6.3V6M
VGA@
C600
10U_0603_6.3V6M
VGA@
1
2
R602
1.33K_0402_1%
VGA@
R602
1.33K_0402_1%
VGA@
12
+
C672
220U_B2_2.5VM_R35
VGA@
+
C672
220U_B2_2.5VM_R35
VGA@
1
2
U33
H5TQ1G63BFR-12C
HY@
U33
H5TQ1G63BFR-12C
HY@
R610
1.33K_0402_1%
VGA@
R610
1.33K_0402_1%
VGA@
12
C673
1U_0402_6.3V4Z
VGA@
C673
1U_0402_6.3V4Z
VGA@
1
2
R605
240_0402_1%
VGA@
R605
240_0402_1%
VGA@
12
C603
10U_0603_6.3V6M
VGA@
C603
10U_0603_6.3V6M
VGA@
1
2
R650
1.33K_0402_1%
VGA@
R650
1.33K_0402_1%
VGA@
12
C686
0.1U_0402_10V6K
VGA@
C686
0.1U_0402_10V6K
VGA@
1
2
R611
1.33K_0402_1%
VGA@
R611
1.33K_0402_1%
VGA@
12
C705
1U_0402_6.3V4Z
VGA@
C705
1U_0402_6.3V4Z
VGA@
1
2
C615
10U_0603_6.3V6M
VGA@
C615
10U_0603_6.3V6M
VGA@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSB
FSC
CLK_XTAL_IN
CLK_XTAL_OUT
ITP_EN
+1.05VM_CK505
CLK_SMBDATA
CLK_SMBCLK
CLK_SMBDATA
CLK_SMBCLK
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_HPLCLK
CLK_CPU_HPLCLK#
CPU_DREFCLK
CPU_DREFCLK#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
FSA
FSC
CLK_XTAL_OUT
CLK_XTAL_IN
PCI2_TME
ITP_EN PCI4_SEL PCI2_TME
PCI4_SEL
FSA
CLK_48M_CR
FSB
CLK_PCIE_PCH
CLK_PCIE_PCH#
CLK_PCIE_SATA
CLK_PCIE_SATA#
+1.5VM_CK505
CLK_EN
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_EN
CLK_CPU_EXP#
CLK_CPU_EXP
CLK_PCIE_WLAN
CLK_PCIE_WLAN#
CLK_PCIE_WWAN
CLK_PCIE_WWAN#
WW AN_CLKREQ#
WLAN_CLKREQ#
CLK_PCIE_VGA
CLK_PCIE_VGA#
H_STP_CPU#_R
H_STP_PCI#_R
H_STP_CPU#
H_STP_PCI#
H_STP_CPU#_R
H_STP_PCI#_R
WLAN_CLKREQ#
WW AN_CLKREQ#
PEG_CLKREQ#_R
PEG_CLKREQ#_R PEG_CLKREQ#
LAN_CLKREQ#
LAN_CLKREQ#
VDD_SRC_IO
CLK_PCI_LPC
CLK_SMBDATA
CLK_SMBCLK
FSA_R
+3VM_CK505
+3VS
+3VS
+3VM_CK505
+3VS
+1.05VM_CK505
+VCCP
+VCCP
+VCCP
+VCCP
+3VS+3VS +3VS
+3VS
+1.5VS
+3VS
+3VS
+3VS
+3VS
+VCCP
+1.5VS
CLK_ENABLE#<42>
CPU_BSEL1<5>
CPU_BSEL2<5>
CLK_PCH_48M<19>
CLK_PCH_14M<19>
VGATE<5,19,31,42>
H_STP_CPU#<19>
H_STP_PCI#<19>
CLK_PCI_LPC<31>
CLK_PCI_PCH<17>
ICH_SMBDATA<19>
ICH_SMBCLK<19>
DGPU_PWR_EN <8,31,35>
PEG_CLKREQ# <8>
CLK_SMBDATA <7,24>
CLK_SMBCLK <7,24>
CLK_CPU_BCLK <5>
CLK_CPU_BCLK# <5>
CLK_CPU_HPLCLK <5>
CLK_CPU_HPLCLK# <5>
CPU_DREFCLK <5>
CPU_DREFCLK# <5>
CPU_SSCDREFCLK <5>
CPU_SSCDREFCLK# <5>
CLK_PCIE_VGA <8>
CLK_PCIE_VGA# <8>
CLK_PCIE_WLAN <25>
CLK_PCIE_WLAN# <25>
CLK_PCIE_SATA <18>
CLK_PCIE_SATA# <18>
CLK_PCIE_PCH <19>
CLK_PCIE_PCH# <19>
CLK_CPU_EXP <4>
CLK_CPU_EXP# <4>
CLK_PCIE_LAN <26>
CLK_PCIE_LAN# <26>
CLK_PCIE_WWAN <24>
CLK_PCIE_WWAN# <24>
WLAN_CLKREQ# <25>
WW AN_CLKREQ# <24>
CPU_BSEL0<5>
LAN_CLKREQ# <26>
CLK_48M_CR<27>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
Clock Generator CK505
13 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
NAVD0 LA-6091P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
Clock Generator CK505
13 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
NAVD0 LA-6091P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
Clock Generator CK505
13 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
NAVD0 LA-6091P
SRC PORT LIST
REQ_3#
DEVICEPORT
REQ PORT LIST
REQ_4#
REQ_6#
REQ_7#
REQ_9#
REQ_10#
REQ_11#
REQ_A#
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96#
Pin28/29 : LCDCLK / LCDCLK#
1 = Pin24/25 : SRC_0 / SRC_0#
Pin28/29 : 27M/27M_SS
PCIE_WLAN
Routing the trace at least 10mil
1000
CLKSEL1
0
PCI
MHz
266
SRC
MHz
CPU
MHz
CLKSEL2
33.30
FSA
CLKSEL0
FSC FSB REF
MHz
DOT_96
MHz
USB
MHz
14.318 96.0 48.0
0 1000 133 33.31 14.318 96.0 48.0
0 1001 200 33.30 14.318 96.0 48.0
0 1001 166 33.31 14.318 96.0 48.0
1 1000 333 33.30 14.318 96.0 48.0
1 1000 100 33.31 14.318 96.0 48.0
1 1001 400 33.30 14.318 96.0 48.0
1 1 1
Reserved
SA000020K00 (Silego : SLG8SP556VTR )
SA000020H10 (ICS : ICS9LPRS387AKLFT)
SRC10
SRC11
PCIE_PCH
SRC6
SRC4
SRC1
DEVICE
SRC3
CPU_SSCDREFCLK
SRC2
SRC7
SRC9
SRC8
PCIE_LAN
PCIE_WLAN
For PCI2_TME:0=Overclocking of CPU and SRC allowed
(ICS only) 1=Overclocking of CPU and SRC NOT allowed
PORT
PCIE_SATA
PCIE_WWAN
PCIE_WWAN
Add 1K follow
Intel check list 05/11
Add WWAN_CLKREQ# 05/04
Change C174 C175 to 10U_0603 05/14
Follow Intel check list change to 27P 06/05
Rename 06/06
Add C1145 C1146 C1147 for EMI 06/12
CLK_CPU_EXP
Change co-lay net name to +1.5VM_CK505 07/03
Add PEG_CLKREQ# 09/10/08
PU to +3VS
Add CLK to GPU 09/10/08
PCIE_VGA
PCIE_VGA
CPU_ITP
PCIE_LAN
091015 add R801/R802 0ohm
091020 change value of
C386 from 10P to 22P
091020 change value of C390 from 10P to 22P
Add LAN_CLKREQ# 091116
091210 add C392/C393 22P for RF team
091212 Add C15 C16 near Q10
to prevent switch noise
100112 change Q47 P/N from SB00000AR00 to SB00000DH00
0111Change BOM Structure of C390 from @ to mount
0301Change R1349,R1351 BOM structure from LOW_CLK@ to mount
091029 add R376 0_0402_5%
for EMI solution
0303 change U4 P/N from SA00003H730 to SA00003H610
0301Change R1348,R1350 BOM structure from NOR_CLK@ to @
0301 Change BOM Structure of R1289 and C388/C389/C393/C390 from NOR_CLK@ to @
C148
0.1U_0402_16V4Z
C148
0.1U_0402_16V4Z
1
2
C390 22P_0402_50V8J
@
C390 22P_0402_50V8J
@
1 2
R804 0_0402_5%
DIS@
R804 0_0402_5%
DIS@
1 2
R86
33_0402_5%
R86
33_0402_5%
1 2
G
D
S
Q63
SSM3K7002FU_SC70-3
OPT@
G
D
S
Q63
SSM3K7002FU_SC70-3
OPT@
2
1 3
R104
33_0402_5%
R104
33_0402_5%
1 2
R52 1K_0402_1%
R52 1K_0402_1%
1 2
R376 0_0402_5%R376 0_0402_5%
1 2
C172
0.1U_0402_16V4Z
C172
0.1U_0402_16V4Z
1
2
Q10B
2N7002DW-T/R7_SOT363-6
Q10B
2N7002DW-T/R7_SOT363-6
3
5
4
R73
1K_0402_5%
@
R73
1K_0402_5%
@
12
R85
10K_0402_5%
@
R85
10K_0402_5%
@
1 2
R77
10K_0402_5%
@
R77
10K_0402_5%
@
1 2
R89
10K_0402_5%
R89
10K_0402_5%
1 2
R92
470_0402_5%
@R92
470_0402_5%
@
12
Q31
DTC115EUA_SC70-3
Q31
DTC115EUA_SC70-3
2
13
R72
2.2K_0402_5%
R72
2.2K_0402_5%
U4
SLG8SP556VTR_QFN72_10X10
U4
SLG8SP556VTR_QFN72_10X10
CKPWRGD/PD#
1
FS_B/TEST_MODE
2
VSS_REF
3
XTAL_OUT
4
XTAL_IN
5
VDD_REF
6
REF_0/FS_C/TEST_
7
REF_1
8
SDA 9
SCL 10
NC
11
VDD_PCI
12
PCI_1
13
PCI_2
14
PCI_3
15
PCI_4/SEL_LCDCL
16
PCIF_5/ITP_EN
17
VSS_PCI
18
VDD_48
19
USB_0/FS_A
20
USB_1/CLKREQ_A# 21
VSS_48
22
VDD_IO
23
SRC_0/DOT_96 24
SRC_0#/DOT_96# 25
VSS_IO
26
VDD_PLL3
27
LCDCLK/27M 28
LCDCLK#/27M_SS 29
VSS_PLL3
30
VDD_PLL3_IO
31
SRC_2 32
SRC_2# 33
VSS_SRC
34
SRC_3 35
SRC_3# 36
VDD_CPU
72
CPU_0 71
CPU_0# 70
VSS_CPU
69
CPU_1 68
CPU_1# 67
VDD_CPU_IO
66
CLKREQ_7# 65
SRC_8/CPU_ITP 64
SRC_8#/CPU_ITP# 63
VDD_SRC_IO
62
SRC_7 61
SRC_7# 60
VSS_SRC
59
CLKREQ_6# 58
SRC_6 57
SRC_6# 56
VDD_SRC
55
PCI_STOP#
54
CPU_STOP#
53
VDD_SRC_IO
52
SRC_10# 51
SRC_10 50
SLKREQ_10# 49
SRC_11 48
SRC_11# 47
CLKREQ_11# 46
SRC_9# 45
SRC_9 44
CLKREQ_9# 43
VSS_SRC
42
CLKREQ_4# 41
SRC_4# 40
SRC_4 39
VDD_SRC_IO
38
CLKREQ_3# 37
VSS
73
R1349 0_0603_5%R1349 0_0603_5%
1 2
C174
10U_0603_6.3V6M
C174
10U_0603_6.3V6M
1
2
R1528 10K_0402_5%
@
R1528 10K_0402_5%
@
12
C146
0.1U_0402_16V4Z
C146
0.1U_0402_16V4Z
1
2
R107 10K_0402_5%R107 10K_0402_5%
12
C1147
47P_0402_50V8J
C1147
47P_0402_50V8J
1
2
C1145
47P_0402_50V8J
C1145
47P_0402_50V8J
1
2
C165
0.1U_0402_16V4Z
C165
0.1U_0402_16V4Z
1
2
C1146
47P_0402_50V8J
C1146
47P_0402_50V8J
1
2
C16 100P_0402_50V8J@C16 100P_0402_50V8J@
1 2
C167
0.1U_0402_16V4Z
C167
0.1U_0402_16V4Z
1
2
C386
22P_0402_50V8J
@
C386
22P_0402_50V8J
@
1 2
R1530 10K_0402_5%R1530 10K_0402_5%
12
R110
0_0402_5%
@
R110
0_0402_5%
@
12
R87
0_0402_5%
@
R87
0_0402_5%
@
12
C169
0.1U_0402_16V4Z
C169
0.1U_0402_16V4Z
1
2
R98
10K_0402_5%
R98
10K_0402_5%
12
C164 27P_0402_50V8JC164 27P_0402_50V8J
Y1
14.318MHZ_16PF_7A14300083
Y1
14.318MHZ_16PF_7A14300083
12
C1119
10U_0603_6.3V6M
C1119
10U_0603_6.3V6M
1
2
C175
10U_0603_6.3V6M
C175
10U_0603_6.3V6M
1
2
R802 0_0402_5%
@
R802 0_0402_5%
@
1 2
R1351 0_0402_5%R1351 0_0402_5%
1 2
C139
0.1U_0402_16V4Z
C139
0.1U_0402_16V4Z
1
2
R75
22_0402_5%
R75
22_0402_5%
1 2
C388
22P_0402_50V8J
@
C388
22P_0402_50V8J
@
1
2
R119
0_0402_5%
R119
0_0402_5%
1 2
R1370_0603_5%R1370_0603_5%
1 2
R95
10K_0402_5%
@
R95
10K_0402_5%
@
1 2
R74
22_0402_5%
R74
22_0402_5%
1 2
C173
0.1U_0402_16V4Z
C173
0.1U_0402_16V4Z
1
2
R76
2.2K_0402_5%
R76
2.2K_0402_5%
12
C161 27P_0402_50V8JC161 27P_0402_50V8J
C393
22P_0402_50V8J
@
C393
22P_0402_50V8J
@
1
2
C137
0.1U_0402_16V4Z
C137
0.1U_0402_16V4Z
1
2
C160
0.1U_0402_16V4Z
C160
0.1U_0402_16V4Z
1
2
R435
10K_0402_5%
R435
10K_0402_5%
1 2
R801 0_0402_5%R801 0_0402_5%
1 2
R371 0_0402_5%
@
R371 0_0402_5%
@
1 2
R121 10K_0402_5%R121 10K_0402_5%
12
R1289
10_0402_5%
@
R1289
10_0402_5%
@
12
R69
0_0402_5%
R69
0_0402_5%
1 2
R84
0_0402_5%
R84
0_0402_5%
1 2
R1487
10K_0402_5%
OPT@
R1487
10K_0402_5%
OPT@
1 2
R1529 10K_0402_5%R1529 10K_0402_5%
12
R1488
10K_0402_5%
OPT@
R1488
10K_0402_5%
OPT@
12
R138
0_0603_5%
R138
0_0603_5%
1 2
C138
0.1U_0402_16V4Z
C138
0.1U_0402_16V4Z
1
2
R71
10K_0402_5%
R71
10K_0402_5%
1 2
C15 100P_0402_50V8J@C15 100P_0402_50V8J@
1 2
C140
0.1U_0402_16V4Z
C140
0.1U_0402_16V4Z
1
2
C389
22P_0402_50V8J
@
C389
22P_0402_50V8J
@
1
2
R113
470_0402_5%
@
R113
470_0402_5%
@
12
R68
470_0402_5%
@R68
470_0402_5%
@
12
R1350 0_0402_5%@R1350 0_0402_5%@
1 2
R80
33_0402_5%
R80
33_0402_5%
1 2
R90
10K_0402_5%
R90
10K_0402_5%
1 2
R91
2.2K_0402_5%
R91
2.2K_0402_5%
R1348 0_0603_5%
@
R1348 0_0603_5%
@
1 2
Q10A
2N7002DW-T/R7_SOT363-6
Q10A
2N7002DW-T/R7_SOT363-6
6 1
2
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GMCH_LVDS_SDA
INVT_PWM
LVDS_SCL
LVDS_SDA
INVTPWM
GMCH_LVDS_SCL
LVDS_SCL
LVDS_SDAVGA_LVDS_SDA
VGA_LVDS_SCL
+CAM_VCC
USB20_P3_1
USB20_N3_1
USB20_P3USB20_P3
USB20_N3
DISPOFF#
LVDS_A2
LVDS_A2#
INVTPWM
+LCDVDD_L
DISPOFF#
LVDS_ACLK#
LVDS_ACLK
INVTPWM
+LEDVDD
LVDS_A1#
LVDS_A1
LVDS_SDA
LVDS_SCL
LVDS_SCL
LVDS_SDA
LVDS_A0
LVDS_A0#
DISPOFF#
USB20_P3_1
USB20_N3_1
DMIC_CLK_LVDS
DMIC_DATA_LVDS
VGA_LVDS_A0#
VGA_LVDS_A0
LVDS_A0#
LVDS_A0
VGA_LVDS_A1#
VGA_LVDS_A1
LVDS_A1#
LVDS_A1
VGA_LVDS_A2#
VGA_LVDS_A2
LVDS_A2#
LVDS_A2
VGA_LVDS_ACLK#
VGA_LVDS_ACLK
LVDS_ACLK#
LVDS_ACLK
GMCH_LVDS_A0
GMCH_LVDS_A0#
LVDS_A0
LVDS_A0#
GMCH_LVDS_A1
GMCH_LVDS_A1#
LVDS_A1
LVDS_A1#
GMCH_LVDS_A2
GMCH_LVDS_A2#
LVDS_A2
LVDS_A2#
GMCH_LVDS_ACLK
GMCH_LVDS_ACLK# LVDS_ACLK#
LVDS_ACLK
USB20_P3_1 USB20_N3_1
+3VS
+3VS
+LCDVDD
B+
+3VS
+LCDVDD
+CAM_VCC
+LCDVDD
+LCDVDD
+3VS
+3VALW
+3VS
+CAM_VCC
GMCH_ENVDD<5>
VGA_ENVDD<8>
BKOFF#<31>
USB20_N3 <19>
USB20_P3 <19>
GMCH_LVDS_SCL<5>
GMCH_LVDS_SDA<5>
INVT_PWM<5,31>
VGA_LVDS_SCL<8>
VGA_LVDS_SDA<8>
DMIC_CLK_LVDS <28>
DMIC_DATA_LVDS <28>
VGA_LVDS_A0#<9>
VGA_LVDS_A0<9>
VGA_LVDS_A1#<9>
VGA_LVDS_A1<9>
VGA_LVDS_A2#<9>
VGA_LVDS_A2<9>
VGA_LVDS_ACLK#<9>
VGA_LVDS_ACLK<9>
GMCH_LVDS_A0<5>
GMCH_LVDS_A0#<5>
GMCH_LVDS_A1<5>
GMCH_LVDS_A1#<5>
GMCH_LVDS_A2<5>
GMCH_LVDS_A2#<5>
GMCH_LVDS_ACLK<5>
GMCH_LVDS_ACLK#<5>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
LVDS /INVERTER
Custom
14 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
LVDS /INVERTER
Custom
14 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
LVDS /INVERTER
Custom
14 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
OPTIMUS
DIS ONLY
091203 change P/N of D6 to SC300000100
LED PANEL Conn.
Modify JLVDS1 08/04
(20 MIL)
camera
CMOS & LCD/PANEL BD. Conn.
091015 follow NTV00 Design
LCD POWER CIRCUIT
W=60mils
W=60mils
2009/10/07 Add Q42 and R700 for DIS only
091103 del C1167/C1168
091020 change value of C1109 from 220P to 1200P
091020 change JUMP J1 to R807 0ohm
091202 swap A0/A0#,A1/A1#,A2/A2#,ACLK/ACLK#
nets on RP7/RP8/RP9/RP10
091202 swap A0/A0#,A1/A1#,A2/A2#,ACLK/ACLK#
nets on RP11/RP12/RP13/RP14
091130 combine Digital MIC into LVDS
follow NAV50 Pin definition
091209 change BOM Structure of R1500 from OPT@ to VGA@
20100106 add R1186 connect pin1 of JLVDS1 to GND
100112 change Q47 P/N from SB00000AR00 to SB00000DH00
0111 Change BOM Structure of C1306/C1307/C1308 from @ to mount
Change P/N from SE071100J80 to SE071560J80
0111 Change BOM Structure of L3 from @ to mount and R1182/R1183 from mount to @
R1514
0_0402_5%
DIS@R1514
0_0402_5%
DIS@
1 2
Q4A
2N7002DW-T/R7_SOT363-6
Q4A
2N7002DW-T/R7_SOT363-6
61
2
RP10 0_0404_4P2R_5%OPT@RP10 0_0404_4P2R_5%OPT@
1 4
2 3
R11860_0402_5% R11860_0402_5% 12
C1108
0.1U_0402_16V4Z
C1108
0.1U_0402_16V4Z
1
2
RP7 0_0404_4P2R_5%OPT@RP7 0_0404_4P2R_5%OPT@
1 4
2 3
C1113
0.1U_0402_16V4Z
C1113
0.1U_0402_16V4Z
1
2
C1308
56P_0402_50V8
C1308
56P_0402_50V8
1
2
R1498
0_0402_5%
OPT@R1498
0_0402_5%
OPT@
1 2
Q4B
2N7002DW-T/R7_SOT363-6
Q4B
2N7002DW-T/R7_SOT363-6
3
5
4
R700
10K_0402_5%
DIS@
R700
10K_0402_5%
DIS@
12
R1499
0_0402_5%
OPT@R1499
0_0402_5%
OPT@
1 2
D6
PRTR5V0U2X_SOT143
@
D6
PRTR5V0U2X_SOT143
@
GND
1
IO1
2
VCC 4
IO2 3
C1307
56P_0402_50V8
C1307
56P_0402_50V8
1
2
JLVDS1
ACES_88341-3000B001
CONN@
JLVDS1
ACES_88341-3000B001
CONN@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
L3
WCM2012F2S-900T04_0805
L3
WCM2012F2S-900T04_0805
11
2
2
3
344
RP11 0_0404_4P2R_5%DIS@RP11 0_0404_4P2R_5%DIS@
1 4
2 3
G
D
S
Q3
AO3413_SOT23-3
G
D
S
Q3
AO3413_SOT23-3
2
1 3
R1500
0_0402_5%
VGA@R1500
0_0402_5%
VGA@
1 2
C1111
330P_0402_50V7K
C1111
330P_0402_50V7K
1
2
C1156 220P_0402_50V7KC1156 220P_0402_50V7K
1 2
L1
FBMA-L11-160808-221LMT 0603
L1
FBMA-L11-160808-221LMT 0603
RP8 0_0404_4P2R_5%OPT@RP8 0_0404_4P2R_5%OPT@
1 4
2 3
RP12 0_0404_4P2R_5%DIS@RP12 0_0404_4P2R_5%DIS@
1 4
2 3
R1465 10K_0402_5% R1465 10K_0402_5%
1 2
L2
FBMA-L11-160808-221LMT 0603
L2
FBMA-L11-160808-221LMT 0603
R1182 0_0402_5%@R1182 0_0402_5%@
12
C1306
56P_0402_50V8
C1306
56P_0402_50V8
1
2
R579 47K_0402_5%R579 47K_0402_5%
12
R1515
0_0402_5%
DIS@R1515
0_0402_5%
DIS@
1 2
R11850_0402_5%
@
R11850_0402_5%
@
12
C1106
4.7U_0805_10V4Z
@
C1106
4.7U_0805_10V4Z
@
1
2
C1112
100P_0402_50V8J
C1112
100P_0402_50V8J
1
2
G
D
S
Q42
SSM3K7002FU_SC70-3
DIS@
G
D
S
Q42
SSM3K7002FU_SC70-3
DIS@
2
13
R1464 0_0402_5% R1464 0_0402_5%
1 2
R807
0_0603_5%
R807
0_0603_5%
1 2
R1183 0_0402_5%@R1183 0_0402_5%@
12
RP13 0_0404_4P2R_5%DIS@RP13 0_0404_4P2R_5%DIS@
1 4
2 3
R174
100K_0402_5%
@
R174
100K_0402_5%
@
1 2
C1109 1200P_0402_50V7KC1109 1200P_0402_50V7K
RP14 0_0404_4P2R_5%DIS@RP14 0_0404_4P2R_5%DIS@
1 4
2 3
R577
150_0603_5%
R577
150_0603_5%
12
R1181 2.2K_0402_5%R1181 2.2K_0402_5%
1 2
RP9 0_0404_4P2R_5%OPT@RP9 0_0404_4P2R_5%OPT@
1 4
2 3
C1105
0.1U_0402_16V4Z
C1105
0.1U_0402_16V4Z
1
2
R1180 2.2K_0402_5%R1180 2.2K_0402_5%
1 2
R578
47K_0402_5%
R578
47K_0402_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
GREEN
BLUE
RED
CRT_HSYNC
CRT_VSYNC
CRT_DET#
CRT_DET
JVGA_VS
JVGA_HS
CRT_R
CRT_G
CRT_B
CRT_HSYNC_1 CRT_HSYNC_2
CRT_VSYNC_1 CRT_VSYNC_2
VGA_VSYNC
VGA_HSYNC
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
CRT_R
CRT_G
CRT_B
CRT_VSYNC
CRT_HSYNC
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
GMCH_CRT_VSYNC
GMCH_CRT_HSYNC
CRT_R
CRT_G
CRT_B
CRT_VSYNC
CRT_HSYNC
CRT_CLK
GMCH_CRT_DATA CRT_DAT
GMCH_CRT_CLK CRT_CLK
VGA_DDCDATA CRT_DAT
VGA_DDCCLK
JVGA_VS
RED
BLUE
CRT_DAT
GREEN
CRT_CLK
JVGA_HS
VGA_DDCCLK
GMCH_CRT_CLK
GMCH_CRT_DATA
VGA_DDCDATA
CRT_DAT
CRT_CLK
CRT_DET#
+5VS
+5VS
+3VS
+3VS +3VSDGPU
+5VS +CRT_VCC_1
+3VS
+CRT_VCC
+CRT_VCC
+CRT_VCC
GMCH_CRT_R<5>
GMCH_CRT_G<5>
GMCH_CRT_B<5>
GMCH_CRT_HSYNC<5>
GMCH_CRT_VSYNC<5>
GMCH_CRT_DATA<5>
GMCH_CRT_CLK<5>
VGA_CRT_R<8>
VGA_CRT_G<8>
VGA_CRT_B<8>
VGA_HSYNC<8>
VGA_VSYNC<8>
VGA_DDCDATA<8>
VGA_DDCCLK<8>
CRT_DET<19>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CRT PORT
Custom
15 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CRT PORT
Custom
15 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CRT PORT
Custom
15 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Place closed to chipset
CRT PORT
Close to CRT CONN for ESD.
091202 move R249/R247 to CPU side
High: CRT Plugged
Modify C31- C308 C303 C307 C306 C304 BOM Structure 0615
091013 Add R/L/C folloew NTV00
DIS ONLYOPTIMUS
091117 Change JCRT1 Symbol to
SUYIN_070546FR015M21TZR
W=40mils
100112 change Q72 P/N from SB00000AR00 to SB00000DH00
0120 Change L12,L14,L15 P/N from SM01000AL00 to SM010032020
20100129 add F4 for +CRT_VCC
L12 BK1608121YZF
L12 BK1608121YZF
1 2
R248 2.2K_0402_5%
OPT@
R248 2.2K_0402_5%
OPT@
1 2
D17
PJDLC05C_SOT23-3
D17
PJDLC05C_SOT23-3
2
3
1
R1518
0_0402_5%
DIS@R1518
0_0402_5%
DIS@
1 2
R1501
0_0402_5%
OPT@R1501
0_0402_5%
OPT@
1 2
R1512 39_0402_1%R1512 39_0402_1%
1 2
R1470 4.7K_0402_5%
@
R1470 4.7K_0402_5%
@
1 2
L44
BK1608LL121-T_2P
L44
BK1608LL121-T_2P
1 2
R1517
0_0402_5%
DIS@R1517
0_0402_5%
DIS@
1 2
C1304
10P_0402_50V8J
C1304
10P_0402_50V8J
1
2
C310
10P_0402_50V8J
C310
10P_0402_50V8J
1
2
R255
150_0402_1%
R255
150_0402_1%
12
R1504
0_0402_5%
OPT@R1504
0_0402_5%
OPT@
1 2
R1469 4.7K_0402_5%
@
R1469 4.7K_0402_5%
@
1 2
R1503
0_0402_5%
OPT@R1503
0_0402_5%
OPT@
1 2
D18
PJDLC05C_SOT23-3
D18
PJDLC05C_SOT23-3
2
3
1
R1513 39_0402_1%R1513 39_0402_1%
1 2
G
D
S
Q11
2N7002W-T/R7_SOT323-3
G
D
S
Q11
2N7002W-T/R7_SOT323-3
2
13
C142 0.1U_0402_16V4ZC142 0.1U_0402_16V4Z
1 2
U11
SN74AHCT1G125DCKR_SC70-5
U11
SN74AHCT1G125DCKR_SC70-5
A
2Y4
OE# 1
G
3P5
F4
1.1A_6V_SMD1812P110TF
F4
1.1A_6V_SMD1812P110TF
21
Q72A
2N7002DW-T/R7_SOT363-6
DIS@
Q72A
2N7002DW-T/R7_SOT363-6
DIS@
61
2
C1305
10P_0402_50V8J
C1305
10P_0402_50V8J
1
2
D3
RB491D_SC59-3
D3
RB491D_SC59-3
2 1
R250
150_0402_1%
R250
150_0402_1%
12
C303
10P_0402_50V8J
C303
10P_0402_50V8J
1
2
G
G
JCRT1
SUYIN_070546FR015M21TZR
CONN@
G
G
JCRT1
SUYIN_070546FR015M21TZR
CONN@
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
16
17
U10
SN74AHCT1G125DCKR_SC70-5
U10
SN74AHCT1G125DCKR_SC70-5
A
2Y4
OE# 1
G
3P5
R1505
0_0402_5%
OPT@R1505
0_0402_5%
OPT@
1 2
L15 BK1608121YZF
L15 BK1608121YZF
1 2
R251 2.2K_0402_5%R251 2.2K_0402_5%
1 2
Q72B
2N7002DW-T/R7_SOT363-6
DIS@Q72B
2N7002DW-T/R7_SOT363-6
DIS@
3
5
4
C304
10P_0402_50V8J
C304
10P_0402_50V8J
1
2
R252 2.2K_0402_5%R252 2.2K_0402_5%
1 2
C301 0.1U_0402_16V4ZC301 0.1U_0402_16V4Z
1 2
R1519
0_0402_5%
DIS@R1519
0_0402_5%
DIS@
1 2
R149
10K_0402_5%
R149
10K_0402_5%
1 2
C307
10P_0402_50V8J
C307
10P_0402_50V8J
1
2
C298 0.1U_0402_16V4ZC298 0.1U_0402_16V4Z
1 2
C306
10P_0402_50V8J
C306
10P_0402_50V8J
1
2
L45
BK1608LL121-T_2P
L45
BK1608LL121-T_2P
1 2
Q67A
2N7002DW-T/R7_SOT363-6
OPT@
Q67A
2N7002DW-T/R7_SOT363-6
OPT@
61
2
R1520
0_0402_5%
DIS@R1520
0_0402_5%
DIS@
1 2
L14 BK1608121YZF
L14 BK1608121YZF
1 2
R1103 100K_0402_5%
R1103 100K_0402_5%
1 2
R245 2.2K_0402_5%
OPT@
R245 2.2K_0402_5%
OPT@
1 2
R253
150_0402_1%
R253
150_0402_1%
12
C308
10P_0402_50V8J
C308
10P_0402_50V8J
1
2
Q67B
2N7002DW-T/R7_SOT363-6
OPT@Q67B
2N7002DW-T/R7_SOT363-6
OPT@
3
5
4
R1502
0_0402_5%
OPT@R1502
0_0402_5%
OPT@
1 2
R1521
0_0402_5%
DIS@R1521
0_0402_5%
DIS@
1 2
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDMI_DETECT
+5VS_HDMI
HDMIDAT_R
HDMICLK_R
HDMI_CLK-_CONN
HDMI_CLK+_CONN
HDMI_TX0-_CONN
HDMI_TX0+_CONN
HDMI_TX1-_CONN
HDMI_TX1+_CONN
HDMI_TX2-_CONN
HDMI_TX2+_CONN
HDMI_TX1+_CK
HDMI_TX2-_CK
HDMI_TX1-_CK
HDMI_CLK-_CK
HDMI_TX2+_CK
HDMI_TX0+_CK
HDMI_TX0-_CK
HDMI_CLK+_CK
HDMI_TX1-_CONN
HDMI_TX2+_CONN
HDMI_TX0+_CONN
HDMI_TX0-_CONN
HDMI_CLK+_CONN
HDMI_TX1+_CONN
HDMI_TX2-_CONN
HDMI_CLK-_CONN
HDMI_TX0+_CONN
HDMI_TX1-_CONN
HDMI_TX2+_CONN
HDMI_TX1+_CONN
HDMI_CLK-_CONN
HDMI_CLK+_CONN
HDMI_TX2-_CONN
HDMI_TX0-_CONN
HDMI_CONN
HDMIDAT_R
HDMICLK_R
HDMI_DETECT_VGA
HDMI_DETECT
DGPU_PWRGD
HDMI_DETECT HDMI_DETECT_VGA
HDMI_CLK+_CK
HDMI_CLK-_CK
HDMI_CLK+_CONN
HDMI_CLK-_CONN
HDMI_TX0+_CK
HDMI_TX0-_CK
HDMI_TX0+_CONN
HDMI_TX0-_CONN
HDMI_TX1-_CK
HDMI_TX1+_CK
HDMI_TX1-_CONN
HDMI_TX1+_CONN
HDMI_TX2-_CK
HDMI_TX2+_CK
HDMI_TX2-_CONN
HDMI_TX2+_CONN
+5VS
+5VS
+3VSDGPU
+3VSDGPU
VGA_HDMI_CLK+<9>
VGA_HDMI_CLK-<9>
VGA_HDMI_TX0+<9>
VGA_HDMI_TX0-<9>
VGA_HDMI_TX1+<9>
VGA_HDMI_TX1-<9>
VGA_HDMI_TX2+<9>
VGA_HDMI_TX2-<9>
DGPU_PWRGD<9,31>
HDMI_DETECT<31>
HDMI_DETECT_VGA <8>
VGA_HDMI_SDA<9>
VGA_HDMI_SCL<9>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
HDMI CONN
Custom
16 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
HDMI CONN
Custom
16 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
HDMI CONN
Custom
16 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
091012 change HDMI CONN Symbol to
SUYIN_100042GR019S268ZR
NEAR CONNECT
091022 change Q41.2 PU from
+3VS to +3VSDGPU
091027 swap L36/L37/L38/L39 nets for layout
20mil
R667 499_0402_1%VGA@R667 499_0402_1%VGA@
1 2
L36
WCM-2012-900T_4P
VGA@L36
WCM-2012-900T_4P
VGA@
1
1
4
433
22
C666 0.1U_0402_16V7KVGA@C666 0.1U_0402_16V7KVGA@
1 2
R670 0_0402_5%@R670 0_0402_5%@
1 2
D46
BAT54S-7-F_SOT23-3
@
D46
BAT54S-7-F_SOT23-3
@
2
3
1
U15
NC7SZ08P5X_NL_SC70-5
OPT@
U15
NC7SZ08P5X_NL_SC70-5
OPT@
B
2
A
1Y4
P5
G
3
C670
12P_0402_50V8J
VGA@
C670
12P_0402_50V8J
VGA@
1
2
D49
RB491D_SC59-3
VGA@
D49
RB491D_SC59-3
VGA@
21
R665 499_0402_1%VGA@R665 499_0402_1%VGA@
1 2
C669 0.1U_0402_16V7KVGA@C669 0.1U_0402_16V7KVGA@
1 2
L38
WCM-2012-900T_4P
VGA@L38
WCM-2012-900T_4P
VGA@
1
1
4
433
22
R668 0_0402_5%@R668 0_0402_5%@
1 2
R656
10K_0402_1%
VGA@
R656
10K_0402_1%
VGA@
1 2
R661 499_0402_1%VGA@R661 499_0402_1%VGA@
1 2
R655
100K_0402_5%
VGA@
R655
100K_0402_5%
VGA@
1 2
C667 0.1U_0402_16V7KVGA@C667 0.1U_0402_16V7KVGA@
1 2
R658 0_0402_5%@R658 0_0402_5%@
1 2
R673 499_0402_1%VGA@R673 499_0402_1%VGA@
1 2
L37
WCM-2012-900T_4P
VGA@L37
WCM-2012-900T_4P
VGA@
1
1
4
433
22
C730 0.1U_0402_16V7KVGA@C730 0.1U_0402_16V7KVGA@
1 2
R664 0_0402_5%@R664 0_0402_5%@
1 2
R659 499_0402_1%VGA@R659 499_0402_1%VGA@
1 2
L35MBK1608121YZF_0603
VGA@
L35MBK1608121YZF_0603
VGA@
1 2
C743
0.1U_0402_16V4Z
VGA@
C743
0.1U_0402_16V4Z
VGA@
1
2
R660 0_0402_5%@R660 0_0402_5%@
1 2
R657
0_0805_5%
@R657
0_0805_5%
@
R816 0_0402_5%
DIS@
R816 0_0402_5%
DIS@
1 2
G
D
S
Q41
2N7002W-T/R7_SOT323-3
VGA@
G
D
S
Q41
2N7002W-T/R7_SOT323-3
VGA@
2
13
C713 0.1U_0402_16V7KVGA@C713 0.1U_0402_16V7KVGA@
1 2
R631
2.2K_0402_5%
VGA@
R631
2.2K_0402_5%
VGA@
1 2
C718
330P_0402_50V7K
VGA@
C718
330P_0402_50V7K
VGA@
R663 499_0402_1%VGA@R663 499_0402_1%VGA@
1 2
L26 MBK1608121YZF_0603VGA@L26 MBK1608121YZF_0603VGA@
1 2
C668 0.1U_0402_16V7KVGA@C668 0.1U_0402_16V7KVGA@
1 2
R666 0_0402_5%@R666 0_0402_5%@
1 2
R669 499_0402_1%VGA@R669 499_0402_1%VGA@
1 2
R632
2.2K_0402_5%
VGA@
R632
2.2K_0402_5%
VGA@
1 2
C671
12P_0402_50V8J
VGA@
C671
12P_0402_50V8J
VGA@
1
2
C711 0.1U_0402_16V7KVGA@C711 0.1U_0402_16V7KVGA@
1 2
JHDMI1
SUYIN_100042GR019S268ZR
CONN@
JHDMI1
SUYIN_100042GR019S268ZR
CONN@
D2+
1D2_shield
2D2-
3D1+
4D1_shield
5D1-
6D0+
7D0_shield
8D0-
9CK+
10 CK_shield
11 CK-
12 CEC
13 Reserved
14 SCL
15 SDA
16 DDC/CEC_GND
17 +5V
18 HP_DET
19
GND 20
GND 21
D45
RB751V_SOD323
@
D45
RB751V_SOD323
@
2 1
R672 0_0402_5%@R672 0_0402_5%@
1 2
L39
WCM-2012-900T_4P
VGA@L39
WCM-2012-900T_4P
VGA@
1
1
4
433
22
R671 499_0402_1%VGA@R671 499_0402_1%VGA@
1 2
C715 0.1U_0402_16V7KVGA@C715 0.1U_0402_16V7KVGA@
1 2
R662 0_0402_5%@R662 0_0402_5%@
1 2
L25 MBK1608121YZF_0603VGA@L25 MBK1608121YZF_0603VGA@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
CLK_PCI_PCH
GPIO22
GPIO22
CLK_PCI_PCH
+3VS
CLK_PCI_PCH<13>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(1/4)
17 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(1/4)
17 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(1/4)
17 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
STRAP1#
GPIO48
STRAP2#
GPIO17
Boot BIOS
SPI
PCI
LPC
1
0
1
0
1
1
091023 add R823 DIS@ 10K PD
for SW OPTIMUS usage
091105 change TigerPoint Part Number to SA000039N90
For EMI
0111 Change BOM Structure of R336 and C432 from @ to mount
0301 Change BOM Structure of R336 and C432 from NOR_CLK@ to @
R29110K_0402_5%
OPT@
R29110K_0402_5%
OPT@
R233
8.2K_0402_5% R233
8.2K_0402_5%
R2308.2K_0402_5% R2308.2K_0402_5%
R363
10K_0402_5%
@
R363
10K_0402_5%
@
R2388.2K_0402_5% R2388.2K_0402_5%
R2048.2K_0402_5% R2048.2K_0402_5%
C432
22P_0402_50V8J
@
C432
22P_0402_50V8J
@
1
2
PCI
TGP
1
U72A
TIGERPOINT_ES1_BGA360
PCI
TGP
1
U72A
TIGERPOINT_ES1_BGA360
PIRQH#/GPIO5
F8 PIRQG#/GPIO4
H8 PIRQF#/GPIO3
D6 PIRQE#/GPIO2
E8 PIRQD#
H10 PIRQC#
B3 PIRQB#
D7 PIRQA#
B2
GPIO1
C9 GPIO22
C15
RSVD02
M13
REQ2#
A20 REQ1#
G16
RSVD01
K9
GPIO17/STRAP2#
A2 GPIO48/STRAP1#
G14
STRAP0#
D11
GNT2#
E16 GNT1#
A18
FRAME#
A16 PERR#
D10 TRDY#
A10 PLOCK#
A8 STOP#
F14 SERR#
B11 PME#
C22 IRDY#
B7 PCIRST#
A23 PCICLK
J12 DEVSEL#
B15 PAR
A5
C/BE3# L16
C/BE2# C13
C/BE1# M15
C/BE0# H16
AD31 B1
AD30 C1
AD29 C7
AD28 D9
AD27 C8
AD26 H12
AD25 G12
AD24 A6
AD23 B5
AD22 A3
AD21 B8
AD20 L12
AD19 B13
AD18 B9
AD17 E12
AD16 C11
AD15 E10
AD14 J14
AD13 L14
AD12 H14
AD11 E14
AD10 A13
AD9 D15
AD8 D16
AD7 B19
AD6 B18
AD5 C19
AD4 B17
AD3 C18
AD2 C17
AD1 D18
AD0 B22
R2088.2K_0402_5% R2088.2K_0402_5%
R2058.2K_0402_5% R2058.2K_0402_5%
R2318.2K_0402_5% R2318.2K_0402_5%
R2128.2K_0402_5% R2128.2K_0402_5%
R823 10K_0402_5%
DIS@
R823 10K_0402_5%
DIS@
12
R2108.2K_0402_5% R2108.2K_0402_5%
R3658.2K_0402_5% R3658.2K_0402_5%
R336
33_0402_5%
@
R336
33_0402_5%
@
12
R2358.2K_0402_5% R2358.2K_0402_5%
R2298.2K_0402_5% R2298.2K_0402_5%
R2068.2K_0402_5% R2068.2K_0402_5%
R366
10K_0402_5%
@
R366
10K_0402_5%
@
R2118.2K_0402_5% R2118.2K_0402_5%
R2078.2K_0402_5% R2078.2K_0402_5%
R29210K_0402_5% R29210K_0402_5%
R2098.2K_0402_5% R2098.2K_0402_5%
R362
10K_0402_5%
@
R362
10K_0402_5%
@
R2368.2K_0402_5% R2368.2K_0402_5%
R3648.2K_0402_5% R3648.2K_0402_5%
R2378.2K_0402_5% R2378.2K_0402_5%
R2328.2K_0402_5% R2328.2K_0402_5%
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GATEA20
H_A20M#
H_IGNNE#
H_INIT#
H_INTR
H_FERR#
H_NMI
KB_RST#
SERIRQ
H_SMI#
H_STPCLK#
SATA_ITX_C_DRX_N0
SATA_ITX_C_DRX_P0
SATA_LED# SATA_LED#
SATARBIAS
GATEA20
SERIRQ
GPIO36
H_FERR#
H_IGNNE#
H_A20M#
H_NMI
H_INIT#
H_SMI#
H_INTR
H_STPCLK#
H_FERR#
H_THERMTRIP#
+3VS
+VCCP
+VCCP
+3VS
SATA_DTX_C_IRX_N0 <21>
SATA_DTX_C_IRX_P0 <21>
SATA_ITX_C_DRX_N0 <21>
SATA_ITX_C_DRX_P0 <21>
CLK_PCIE_SATA# <13>
CLK_PCIE_SATA <13>
SATA_LED# <21>
GATEA20 <31>
H_A20M# <5>
H_IGNNE# <5>
H_INIT# <5>
H_INTR <5>
H_FERR# <5>
H_NMI <5>
KB_RST# <31>
SERIRQ <31>
H_SMI# <5>
H_STPCLK# <5>
H_THERMTRIP# <5>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(2/4)
Custom
18 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(2/4)
Custom
18 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(2/4)
Custom
18 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
56 ohm±5% pull-up resistor has
to be within 1" from the Tiger
Point chipset.
ESD request
Close to TigerPoint
pin
Del SATA1 04/30
Placed within 500 mils of Tiger point chipset pin.
091105 change TigerPoint Part Number to SA000039N90091203 add R296 10K PD for customer recognize
091216 change value of C454 to 470P
C453 100P_0402_50V8J
@
C453 100P_0402_50V8J
@
1 2
R45
10K_0402_5%
R45
10K_0402_5%
C452 100P_0402_50V8J
@
C452 100P_0402_50V8J
@
1 2
R164
56_0402_5%
R164
56_0402_5%
12
C451 100P_0402_50V8J
@
C451 100P_0402_50V8J
@
1 2
C457 100P_0402_50V8J
@
C457 100P_0402_50V8J
@
1 2
3
TGP
HOST SATA
U72C
TIGERPOINT_ES1_BGA360
3
TGP
HOST SATA
U72C
TIGERPOINT_ES1_BGA360
SATA0RXN AE6
SATA0RXP AD6
SATA0TXN AC7
SATA0TXP AD7
SATA1RXN AE8
SATA1RXP AD8
SATA1TXN AD9
SATA1TXP AC9
SATA_CLKN AD4
GPIO36
AD23
A20M# Y20
CPUSLP# Y21
IGNNE# Y18
INIT3_3V# AD21
INIT# AC25
INTR AB24
FERR# Y22
NMI T17
RCIN# AC21
SERIRQ AA16
SMI# AA21
STPCLK# V18
THRMTRIP# AA20
RSVD03
R12
RSVD04
AE20
RSVD05
AD17
RSVD06
AC15
RSVD07
AD18
RSVD08
Y12
RSVD09
AA10
RSVD10
AA12
RSVD11
Y10
RSVD12
AD15
RSVD13
W10
RSVD14
V12
RSVD15
AE21
RSVD16
AE18
RSVD17
AD19
RSVD18
U12
RSVD19
AC17
RSVD20
AB13
RSVD21
AC13
RSVD22
AB15
RSVD23
Y14
RSVD24
AB16
RSVD25
AE24
RSVD26
AE23
RSVD27
AA14
RSVD28
V14
RSVD29
AD16
SATA_CLKP AC4
SATARBIAS# AD11
SATARBIAS AC11
SATALED# AD25
RSVD31
AB10
A20GATE U16
RSVD30
AB11
R294
10K_0402_5%
GAT@
R294
10K_0402_5%
GAT@
1 2
C450 100P_0402_50V8J
@
C450 100P_0402_50V8J
@
1 2
R154 24.9_0402_1%R154 24.9_0402_1%
R296
10K_0402_5%
PAC@
R296
10K_0402_5%
PAC@
1 2
R198
56_0402_5%
R198
56_0402_5%
C456 100P_0402_50V8J
@
C456 100P_0402_50V8J
@
1 2
C458 100P_0402_50V8J
@
C458 100P_0402_50V8J
@
1 2
C455 100P_0402_50V8J
@
C455 100P_0402_50V8J
@
1 2
R293
10K_0402_5%
R293
10K_0402_5%
R312
10K_0402_5%
R312
10K_0402_5%
C454 470P_0402_50V8JC454 470P_0402_50V8J
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_PWRGD
H_DPRSTP#
H_DPSLP#
T_PWROK
PLTRST#
PCIE_ITX_C_DRX_P2_R
PCIE_ITX_C_DRX_N2_R
USBRBIAS
RTCRST#
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
SMLINK0
SMLINK1
RTCX1
RTCX2
INTRUDER#
INTRUDER#
PM_BATT_LOW#
PM_BATT_LOW#
PM_CLKRUN#
MCH_SYNC#
MCH_SYNC#
PBTN_OUT#
T_PWROK
ICH_RI#
EC_RSMRST#R
EC_RSMRST#R
SYS_RST#
EC_THERM#
VGATE
INTVRMEN
ICH_PCIE_WAKE#
ICH_PCIE_WAKE#
SYS_RST#
ICH_RI#
EC_LID_OUT#
INTVRMEN
SB_SPKR
EC_SMI#
EC_SCI#
EC_LID_OUT#
ACIN_C
ACIN_C ACIN
GPIO14
GPIO15
GPIO38
GPIO0
GPIO0
CRT_DET
T_PWROK VGATE
PCIE_ITX_C_DRX_P3_R
PCIE_ITX_C_DRX_N3_R
PM_CLKRUN#
GPIO12
GPIO14
GPIO15
USB20_N0
USB20_P0
USB20_N3
USB20_P3
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
ICH_SMBCLK
RTCX1
ICH_SMBDATA
SMLINK1
LINKALERT#
RTCX2
SMBALERT#
RTCRST#
HDA_BITCLK
HDA_RST#
HDA_SDOUT
HDA_SYNC
SMLINK0
DMI_COMP
SMBALERT#
EC_THERM#
EC_RSMRST#R
GPIO7
PCIE_ITX_C_DRX_N1_R
PCIE_ITX_C_DRX_P1_R
USB_OC#2
USB20_N4
USB20_P4
GPIO38
PLTRST#
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
GPIO12
GPIO39
GPIO7
USB_OC#3_7
HDA_BITCLK_AUDIO
USB_OC#0
USB20_N2
USB20_P2
USB_OC#3_7
RTCRST#RTCRST#
CLK_PCH_48M
USB_OC#3_7
USB_OC#0
USB_OC#2
USB20_N1_R
USB20_P1_R
USB20_N1_R
USB20_P1_R
USB20_N1
USB20_P1
+RTCBATT_R
ICH_SMBCLK
ICH_SMBDATA
HDA_SDIN0
USB_OC#0
GPIO39
ACIN
+1.5VS
+3VALW
+RTCVCC
+3VALW
+3VS
+RTCVCC
+3VALW
+3VALW
+RTCVCC
+RTCBATT
+CHGRTC
+3VS
+3VS
LPC_AD0<31>
LPC_AD1<31>
LPC_AD2<31>
LPC_AD3<31>
LPC_FRAME#<31>
HDA_BITCLK_AUDIO<28,30>
HDA_RST_AUDIO#<28,30>
HDA_SDOUT_AUDIO<28,30>
HDA_SYNC_AUDIO<28,30>
CLK_PCH_14M<13>
ICH_SMBDATA<13>
ICH_SMBCLK<13>
CRT_DET <15>
EC_SCI# <31>
EC_SMI# <31>
EC_LID_OUT# <31>
PM_DPRSLPVR <5>
H_STP_PCI# <13>
H_STP_CPU# <13>
H_PWRGD <5>
EC_THERM# <31>
PBTN_OUT# <31>
PLTRST# <5,8,24,25,26,31>
ICH_PCIE_WAKE# <24,25>
SB_SPKR <29>
PM_SLP_S3# <31>
PM_SLP_S4# <31>
PM_SLP_S5# <31>
H_DPRSTP# <5>
H_DPSLP# <5>
DMI_TX#0<4>
DMI_TX0<4>
DMI_RX#0<4>
DMI_RX0<4>
DMI_TX#1<4>
DMI_TX1<4>
DMI_RX#1<4>
DMI_RX1<4>
PCIE_DTX_C_IRX_N1<26>
PCIE_DTX_C_IRX_P1<26>
PCIE_ITX_C_DRX_N1<26>
PCIE_ITX_C_DRX_P1<26>
PCIE_DTX_C_IRX_N2<25>
PCIE_DTX_C_IRX_P2<25>
PCIE_ITX_C_DRX_N2<25>
PCIE_ITX_C_DRX_P2<25>
PCIE_DTX_C_IRX_N3<24>
PCIE_DTX_C_IRX_P3<24>
PCIE_ITX_C_DRX_N3<24>
PCIE_ITX_C_DRX_P3<24>
PCIE_CRX_GTX_N0<8>
PCIE_CRX_GTX_P0<8>
PCIE_CTX_GRX_P0<8>
PCIE_CTX_GRX_N0<8>
CLK_PCIE_PCH#<13>
CLK_PCIE_PCH<13>
VGATE <5,13,31,42>
PCH_POK <5,31>
ACIN <31,38>
USB20_N0 <23>
USB20_P0 <23>
USB20_N2 <23>
USB20_P2 <23>
USB20_N3 <14>
USB20_P3 <14>
USB20_N4 <27>
USB20_P4 <27>
USB20_P5 <24>
USB20_N6 <24>
USB20_N5 <24>
USB20_P6 <24>
USB20_N7 <25>
USB20_P7 <25>
USB_OC#0 <23>
USB_OC#2 <23>
CLK_PCH_48M <13>
EC_RSMRST#<31>
USB20_N1 <24>
USB20_P1 <24>
HDA_SDIN0<28>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(3/4)
Custom
19 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(3/4)
Custom
19 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(3/4)
Custom
19 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
For EMI, Close to TigerPoint
For EMI, Close to TigerPoint
PCIE Port List
1
2
3
4
WLAN
LAN
USB Port List
0
1
2
3
4
5
6
7
USB Right2
CMOS
CardReader
WWAN
BT
USB Left1
Routing the trace at least 10mil
RSMRST circuit
20100129 Add J14 for RTCRST#
WWAN
091020 change net name from
USB_OC#3/4/5/6/7 to USB_OC#3_7
Del R203 (pull-up GPIO6 Resister) 06/08
Change EC_LID_OUT# From GPIO13 to GPIO11
06/08
Add +RTCVCC circuit 06/12
WIMAX
For ESD
09/10/08 Add PCIE to GPU
091020 add R806 22ohm for 3G noise solution
091105 change TigerPoint Part Number to SA000039N90 091105 change TigerPoint Part Number to SA000039N90
091204 add USB20_N1/P1 for
SIM CARD Conn.
091113 change net name from
USB_OC#0_1 to USB_OC#0
add net name USB_OC#1
20100120 change SW2 from mount to @
091212 Add C17 C18 near U72
to prevent switch noise
091212 Add C30 near PCH
to prevent switch noise
091212 Add C50 near PCH
to prevent switch noise
0112 Add R1379,R1380 10K_0402_5% for GPIO39
0118 Change C1158 from 220p to 100K ohm
0131 Change C1158 symbol
0120 Change C368,C371 from 15p to 12p
0111 Change BOM Structure of R806 and C1214 from @ to mount
0111 Change R806 value from 22_0402_5% ohm to 0_0402_5%
Change J3 to R1184 4/29
2003 delete R806 for RF
R223
100K_0402_5%
R223
100K_0402_5%
12
SW2
EVQPLHA15_4P
@SW2
EVQPLHA15_4P
@
3
2
1
4
5
6
C49 0.1U_0402_10V7KC49 0.1U_0402_10V7K
C1277 0.1U_0402_10V7K
VGA@
C1277 0.1U_0402_10V7K
VGA@
C566 0.1U_0402_10V7KC566 0.1U_0402_10V7K
C371
12P_0402_50V8J
C371
12P_0402_50V8J
1 2
R42
10K_0402_5% R42
10K_0402_5% 12
R372
0_0402_5%
R372
0_0402_5%
1 2
R1380
8.2K_0402_5%
NON3G_LCD@
R1380
8.2K_0402_5%
NON3G_LCD@
R47 10K_0402_5%R47 10K_0402_5%
R316
8.2K_0402_5% R316
8.2K_0402_5%
R17 0_0402_5%
R17 0_0402_5%
12
C1278 0.1U_0402_10V7K
VGA@
C1278 0.1U_0402_10V7K
VGA@
C1214 22P_0402_50V8JC1214 22P_0402_50V8J
1 2 R373 4.7K_0402_5%@R373 4.7K_0402_5%@
1 2
R43
10K_0402_5% R43
10K_0402_5% 12
R226 0_0402_5%
@
R226 0_0402_5%
@12
R152
22.6_0402_1%
R152
22.6_0402_1%
C30 100P_0402_50V8J@C30 100P_0402_50V8J@
1 2
R44
10K_0402_5% R44
10K_0402_5% 12
R1370
1K_0402_5%
R1370
1K_0402_5%
1 2
Y3
32.768KHZ_12.5PF_Q13MC14610002
Y3
32.768KHZ_12.5PF_Q13MC14610002
OSC 4
OSC 1
NC
3
NC
2
R37
10K_0402_5% R37
10K_0402_5% 12
C1148
0.1U_0402_16V4Z
C1148
0.1U_0402_16V4Z
1
2
R310
0_0402_5%
@
R310
0_0402_5%
@
1 2
D25 RB751V_SOD323D25 RB751V_SOD323
2 1
C53 0.1U_0402_10V7K
C53 0.1U_0402_10V7K
R240
8.2K_0402_5% R240
8.2K_0402_5%
R367
1K_0402_5%
R367
1K_0402_5%
1 2
R1379
8.2K_0402_5%
3G_LG@
R1379
8.2K_0402_5%
3G_LG@
R3018.2K_0402_5% R3018.2K_0402_5%
R239
8.2K_0402_5% R239
8.2K_0402_5%
C
B
E
Q30
MMBT3906_SOT23-3@
C
B
E
Q30
MMBT3906_SOT23-3@
1
2
3
R3810K_0402_5% R3810K_0402_5% 12
D37
BAS40-04_SOT23-3
D37
BAS40-04_SOT23-3
1
2
3
EPROM
TGP
MISC
RTC SMB SPI
LPC AUDIO LAN
U72D
TIGERPOINT_ES1_BGA360
EPROM
TGP
MISC
RTC SMB SPI
LPC AUDIO LAN
U72D
TIGERPOINT_ES1_BGA360
DPRSTP# AB23
DPSLP# AA18
RSVD31 F20
GPIO8 K18
GPIO9 H19
GPIO10 M17
GPIO12 A24
GPIO13 C23
GPIO14 P5
GPIO15 E24
DPRSLPVR AB20
STP_PCI# Y16
STP_CPU# AB19
GPIO24 R3
GPIO25 C24
GPIO26 D19
GPIO27 D20
GPIO28 F22
CLKRUN# AC19
GPIO33 U14
GPIO34 AC1
GPIO38 AC23
GPIO39 AC24
CPUPWRGD/GPIO49 AB22
THRM# AB17
VRMPWRGD V16
MCH_SYNC# AC18
PWRBTN# E21
RI# H23
SUS_STAT#/LPCPD# G22
SUSCLK D22
SYS_RESET# G18
PLTRST# G23
WAKE# C25
INTRUDER# T8
PWROK U10
RSMRST# AC3
INTVRMEN AD3
SPKR J16
SLP_S3# H20
SLP_S4# E25
SLP_S5# F21
BATLOW# B25
LDRQ1#/GPIO23
AA5
LAD0/FWH0
V6
LAD1/FWH1
AA6
LAD2/FWH2
Y5
LAD3/FWH3
W8
LFRAME#/FWH4
Y4
HDA_RST#
U2
HDA_SDIN0
W2
HDA_SDIN1
V2
HDA_SDIN2
P8
HDA_SDOUT
AA1
HDA_SYNC
Y1
CLK14
AA3
EE_CS
U3
EE_DIN
AE2
EE_DOUT
T6
EE_SHCLK
V3
LAN_CLK
T4
LANR_RSTSYNC
P7
LAN_RST#
B23
LAN_RXD0
AA2
LAN_RXD1
AD1
LAN_RXD2
AC2
LAN_TXD0
W3
LAN_TXD1
T7
LAN_TXD2
U4
RTCX1
W4
RTCX2
V5
RTCRST#
T5
SMBALERT#/GPIO11
E20
SMBCLK
H18
SMBDATA
E23
LINKALERT#
H21
SMLINK0
F25
SMLINK1
F24
SPI_MISO
R2
SPI_MOSI
T1
SPI_CS#
M8
SPI_CLK
P9
SPI_ARB
R4
GPIO6 W16
GPIO7 W14
BMBUSY#/GPIO0 T15
HDA_BIT_CLK
P6
LDRQ0#
Y8
R241
8.2K_0402_5% R241
8.2K_0402_5%
R295
8.2K_0402_5% R295
8.2K_0402_5%
R15733_0402_5% R15733_0402_5% 1 2
R158
33_0402_5% R158
33_0402_5% 1 2
R1482.2K_0402_5% R1482.2K_0402_5% 1 2
C433
22P_0402_50V8J
@C433
22P_0402_50V8J
@
1
2
R1472.2K_0402_5% R1472.2K_0402_5% 1 2
R153 24.9_0402_1%R153 24.9_0402_1%
1 2
R3158.2K_0402_5% R3158.2K_0402_5%
R337
33_0402_5%
@
R337
33_0402_5%
@
12
C17 100P_0402_50V8JC17 100P_0402_50V8J
1 2
2
TGP
USB
DMI PCI-E
U72B
TIGERPOINT_ES1_BGA360
2
TGP
USB
DMI PCI-E
U72B
TIGERPOINT_ES1_BGA360
DMI3RXN
V21
USBP0N H7
USBP0P H6
USBP1N H3
USBP1P H2
USBP2N J2
USBP2P J3
USBP3N K6
USBP3P K5
USBP4N K1
USBP4P K2
USBP5N L2
USBP5P L3
USBP6N M6
USBP6P M5
USBP7N N1
USBP7P N2
OC7#/GPIO31 C3
USBRBIAS G2
USBRBIAS# G3
CLK48 F4
DMI0RXN
R23
DMI0RXP
R24
DMI0TXN
P21
DMI0TXP
P20
DMI1RXN
T21
DMI1RXP
T20
DMI2RXP
T18
DMI2TXP
U24
DMI3RXP
V20
DMI3TXN
V24
DMI3TXP
V23
PERN1
K21
PERP1
K22
PETN1
J23
PETP1
J24
PERN2
M18
PERP2
M19
PETN2
K24
PETP2
K25
PERN3
L23
PERP3
L24
PETN3
L22
PETP3
M21
PERN4
P17
PERP4
P18
PETN4
N25
PETP4
N24
DMI_ZCOMP
H24
DMI_IRCOMP
J22
DMI_CLKN
W23
DMI_CLKP
W24
OC6#/GPIO30 C2
OC5#/GPIO29 E6
OC4# E5
OC1# C5
OC3# D2
OC2# D3
OC0# D4
DMI2RXN
T19 DMI1TXP
T25 DMI1TXN
T24
DMI2TXN
U23
C230
1U_0603_10V4Z~D
C230
1U_0603_10V4Z~D
1 2
R160
33_0402_5% R160
33_0402_5% 1 2
R196
20K_0402_5%
R196
20K_0402_5%
1 2
C434
22P_0402_50V8J
@C434
22P_0402_50V8J
@
1
2
C52 0.1U_0402_10V7K
C52 0.1U_0402_10V7K
R3148.2K_0402_5% R3148.2K_0402_5%
R311
0_0402_5%
R311
0_0402_5%
1 2
R368
8.2K_0402_5% R368
8.2K_0402_5%
R1598
100K_0402_5%
R1598
100K_0402_5%
12
C54 0.1U_0402_10V7KC54 0.1U_0402_10V7K
R3910K_0402_5% R3910K_0402_5% 12
R338
33_0402_5%
@
R338
33_0402_5%
@
12
R374
2.2K_0402_5%
@
R374
2.2K_0402_5%
@
1 2
R1376
10K_0402_5%
D0@
R1376
10K_0402_5%
D0@
1 2
R1184 0_0402_5%
@
R1184 0_0402_5%
@
12
R375
2.2K_0402_5%
@
R375
2.2K_0402_5%
@
1 2
R146
1M_0402_5%
R146
1M_0402_5%
1 2
C50 100P_0402_50V8J@C50 100P_0402_50V8J@
1 2
R222
0_0402_5%
@R222
0_0402_5%
@
12
D28B
BAV99DW-7_SOT363
@
D28B
BAV99DW-7_SOT363
@
4
5
3
D28A
BAV99DW-7_SOT363
@
D28A
BAV99DW-7_SOT363
@
1
2
6
C368
12P_0402_50V8J
C368
12P_0402_50V8J
1 2
R288
10M_0402_5%
R288
10M_0402_5%
12
R159
33_0402_5% R159
33_0402_5% 1 2
R145
1K_0402_5% R145
1K_0402_5% 1 2
J14
JUMP_43X39@
J14
JUMP_43X39@
11
2
2
R49 10K_0402_5%R49 10K_0402_5%
R36
10K_0402_5% R36
10K_0402_5% 12
R40
10K_0402_5% R40
10K_0402_5% 12
R1377
10K_0402_5%
E0@
R1377
10K_0402_5%
E0@
1 2
C565 0.1U_0402_10V7K
C565 0.1U_0402_10V7K
C18 100P_0402_50V8JC18 100P_0402_50V8J
1 2
R302
8.2K_0402_5% R302
8.2K_0402_5%
R225 0_0402_5%
@
R225 0_0402_5%
@12
R197
332K_0402_1%
R197
332K_0402_1%
1 2
R48 10K_0402_5%R48 10K_0402_5%
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V5REF_SUS
+V5REF_SUS
+SATAPLL
+DMIPLL
+V5REF_RUN
+DMIPLL
+V5REF_RUN
+SATAPLL
+1.5VS
+RTCVCC
+3VS+5VS
+3VALW
+5VALW
+3VALW
+VCCP
+1.5VS
+1.5VS
+3VS
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(4/4)
Custom
20 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(4/4)
Custom
20 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Tigerpoint(4/4)
Custom
20 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Place closely pin Y25 within 100mlis.
Place closely pin Y6 within 100mlis.
6mA
10mA
50mA
10mA
14mA
1.3A
0.29A
0.13A
0.98A
091105 change TigerPoint Part Number to SA000039N90
091105 change TigerPoint Part Number to SA000039N90
TGP
U72F
TIGERPOINT_ES1_BGA360
TGP
U72F
TIGERPOINT_ES1_BGA360
VSS59 F2
VSS58 AE13
VSS57 G24
VSS56 AE25
VSS55 AE10
VSS54 AE1
VSS53 AD24
VSS52 AD20
VSS51 AD10
VSS50 AD2
VSS49 AC8
VSS48 AB8
VSS47 AB7
VSS46 AB6
VSS45 AB4
VSS44 Y24
VSS43 Y2
VSS42 W22
VSS41 W12
VSS40 V25
VSS39 V22
VSS38 V19
VSS37 V8
VSS36 V7
VSS35 V1
VSS34 T22
VSS33 T2
VSS32 R22
VSS31 R14
VSS30 P19
VSS29 P13
VSS28 P11
VSS27 N23
VSS26 N14
VSS25 N13
VSS24 N12
VSS23 N3
VSS22 M11
VSS21 M7
VSS20 L4
VSS19 K20
VSS18 K19
VSS17 K11
VSS16 K8
VSS15 K4
VSS14 H5
VSS13 H4
VSS12 H1
VSS11 G8
VSS10 G4
VSS09 F16
VSS08 E18
VSS07 B24
VSS06 B20
VSS05 B16
VSS04 B10
VSS03 B6
VSS02 A25
VSS01 A1
RSVD32 AE16
C60
1U_0402_6.3V6K
C60
1U_0402_6.3V6K
1
2
C46
0.1U_0402_16V4Z
C46
0.1U_0402_16V4Z
1
2
C45
0.1U_0402_16V4Z
C45
0.1U_0402_16V4Z
1
2
R33
100_0402_5%
R33
100_0402_5%
12
C57
10U_0603_6.3V6M
C57
10U_0603_6.3V6M
1
2
C48
0.1U_0402_16V4Z
C48
0.1U_0402_16V4Z
1
2
C27
0.1U_0402_16V4Z
C27
0.1U_0402_16V4Z
1
2
D12
RB751V-40_SOD323-2
D12
RB751V-40_SOD323-2
1 2
C38
1U_0402_6.3V6K
C38
1U_0402_6.3V6K
1
2
C39
0.1U_0402_16V4Z
C39
0.1U_0402_16V4Z
1
2
C43
0.1U_0402_16V4Z
C43
0.1U_0402_16V4Z
1
2
C44
1U_0402_6.3V6K
C44
1U_0402_6.3V6K
1
2
C42
0.1U_0402_16V4Z
C42
0.1U_0402_16V4Z
1
2
C62
1U_0402_6.3V6K
C62
1U_0402_6.3V6K
1
2
C463
1U_0402_6.3V6K
C463
1U_0402_6.3V6K
1
2
C37
0.1U_0402_16V4Z
C37
0.1U_0402_16V4Z
1
2
C462
1U_0402_6.3V6K
C462
1U_0402_6.3V6K
1
2
C47
0.01U_0402_16V7K
C47
0.01U_0402_16V7K
1
2
C459
10U_0603_6.3V6M
C459
10U_0603_6.3V6M
1
2
R29
0_0603_5%
R29
0_0603_5%
1 2
C28
0.01U_0402_16V7K
C28
0.01U_0402_16V7K
1
2
POWER
TGP
5
U72E
TIGERPOINT_ES1_BGA360
POWER
TGP
5
U72E
TIGERPOINT_ES1_BGA360
VCC1_5_2 M9
VCC1_5_3 M20
VCC1_5_4 N22
VCC1_05_4 V10
V_CPU_IO W18
VCC1_5_1 AA8
VCCSUS3_3_4 F1
VCCSUS3_3_3 K7
VCCSUS3_3_2 N4
VCCSUS3_3_1 F18
VCC3_3_6 T9
VCC3_3_5 R10
VCC3_3_4 G10
VCC3_3_3 F10
VCC3_3_2 AD13
VCC3_3_1 H25
VCC1_05_3 P15
VCC1_05_2 K17
VCC1_05_1 J10
VCCUSBPLL F6
VCCDMIPLL Y25
VCCRTC AE3
VCCSATAPLL Y6
VCC5REF_SUS F5
VCC5REF F12
R35
10_0402_5%
R35
10_0402_5%
12
C63
1U_0402_6.3V6K
C63
1U_0402_6.3V6K
1
2
R30
0_0603_5%
R30
0_0603_5%
1 2
C460
10U_0603_6.3V6M
C460
10U_0603_6.3V6M
1
2
C40
0.1U_0402_16V4Z
C40
0.1U_0402_16V4Z
1
2
C461
1U_0402_6.3V6K
C461
1U_0402_6.3V6K
1
2
C58
10U_0603_6.3V6M
C58
10U_0603_6.3V6M
1
2
C41 0.1U_0402_16V4ZC41 0.1U_0402_16V4Z
1
2
D10
RB751V-40_SOD323-2
D10
RB751V-40_SOD323-2
1 2
C464
4.7U_0603_6.3V6K
C464
4.7U_0603_6.3V6K
1
2
C61
1U_0402_6.3V6K
C61
1U_0402_6.3V6K
1
2
C59
1U_0402_6.3V6K
C59
1U_0402_6.3V6K
1
2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
SATA_LED#
MEDIA_LED#
WLAN_LED#
WWAN_LED#
MEDIA_LED#
BT_LED#
NUM_LED#
CAPS_LED#
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_DTX_IRX_N0
SATA_DTX_IRX_P0
WWAN_LED#
WLAN_LED#
BT_LED#
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0 SATA_ITX_DRX_N0
SATA_ITX_DRX_P0
+3VS
+3VALW
+3VS
+5VS
+3VS
+5VS
+3VS
PWR_LED#<31>
PWR_SUSP_LED#<31>
BATT_GRN_LED#<31>
BATT_AMB_LED#<31>
NUM_LED#<31>
CAPS_LED#<31>
BT_LED#<31>
WWAN_LED#<24,25>
WLAN_LED#<24,25>
CARD_LED#<27>
SATA_LED#<18>
SATA_DTX_C_IRX_N0<18>
SATA_DTX_C_IRX_P0<18>
SATA_ITX_C_DRX_P0<18>
SATA_ITX_C_DRX_N0<18>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
LED/HDD/Function Board CONN.
B
21 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
LED/HDD/Function Board CONN.
B
21 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
LED/HDD/Function Board CONN.
B
21 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
LED PCB CONN
SATA HDD Conn.
09/30 add ESD
091116 change symbol of JSATA1 to
SUYIN_127043FR022G263ZR_NR
0108 Add C247,C1398 on pin1 of JP21 (RF)
D32
ROW PJSOT05C 3P C/A SOT-23
D32
ROW PJSOT05C 3P C/A SOT-23
2
3
1
R805 0_0402_5% R805 0_0402_5%
1 2
JSATA1
SUYIN_127043FR022G263ZR_NR
CONN@
JSATA1
SUYIN_127043FR022G263ZR_NR
CONN@
GND
1
A+
2
A-
3
GND
4
B-
5
B+
6
GND
7
V33
8
V33
9
V33
10
GND
11
GND
12
GND
13
V5
14
V5
15
V5
16
GND
17
Reserved
18
GND
19
V12
20
V12
21
V12
22
GND1 23
GND2 24
C422
1U_0402_6.3V6K
C422
1U_0402_6.3V6K
1
2
C247
1U_0402_6.3V6K
C247
1U_0402_6.3V6K
1
2
C1398
47P_0402_50V8J
C1398
47P_0402_50V8J
1
2
C419
10U_0603_6.3V6M
C419
10U_0603_6.3V6M
1
2
C383
0.01U_0402_16V7K
C383
0.01U_0402_16V7K
1 2
C380
0.01U_0402_16V7K
C380
0.01U_0402_16V7K
1 2
C426
0.1U_0402_16V4Z
C426
0.1U_0402_16V4Z
1
2
U29
NC7SZ08P5X_NL_SC70-5
@
U29
NC7SZ08P5X_NL_SC70-5
@
B
2
A
1Y4
P5
G
3
C423
1000P_0402_50V7K
C423
1000P_0402_50V7K
1
2
C32
0.01U_0402_16V7K
C32
0.01U_0402_16V7K
JP18
ACES_85201-1605N
CONN@
JP18
ACES_85201-1605N
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12 GND 17
GND 18
13
13
14
14
15
15
16
16
C31
0.01U_0402_16V7K
C31
0.01U_0402_16V7K
JP21
ACES_85201-0505N
CONN@
JP21
ACES_85201-0505N
CONN@
1
1
2
2
3
3
4
4
5
5G1 6
G2 7
hexainf@hotmail.com
ON/OFF#
ON/OFFBTN#
ON/OFFBTN#
PWR_PWM_LED#
EC_ON
ON/OFFBTN#
ON/OFFBTN#
PWR_PWM_LED#
ON/OFFBTN#
PWR_PWM_LED#
PWR_PWM_LED# 51ON#
ON/OFFBTN#
+3VALW
+3VALW
+3VALW
+3VALW
PWR_PWM_LED#<31>
ON/OFF# <31>
51ON# <36>
EC_ON<31>
LID_SW# <31>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
ON/OFF / PWR/B CONN./ LID SW
B
22 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
ON/OFF / PWR/B CONN./ LID SW
B
22 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
ON/OFF / PWR/B CONN./ LID SW
B
22 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
PWR/B Conn LID Switch
TOP Side
Bottom Side
Del R103 05/12
091019 Change +3VS to +3VALW
SW1
(BLUE)
091212 Add C19 near D14
to prevent switch noise
0108 Add C246,C1397 on pin1 of JP23
D1
RLZ20A_LL34
@D1
RLZ20A_LL34
@
12
D2
PJSOT24C_SOT23-3
D0@
D2
PJSOT24C_SOT23-3
D0@
2
3
1
C19 100P_0402_50V8JC19 100P_0402_50V8J
1 2
R186
0_0805_5%
@
R186
0_0805_5%
@
12
C155
0.1U_0402_16V4Z
C155
0.1U_0402_16V4Z
1
2
D14
DAN202U_SC70
D14
DAN202U_SC70
2
3
1
C150
10P_0402_50V8J
C150
10P_0402_50V8J
1
2
C2 100P_0402_50V8J@C2 100P_0402_50V8J@
1 2
R3
10K_0402_5%
R3
10K_0402_5%
1 2
U5
APX9132ATI-TRL SOT-23 3P
U5
APX9132ATI-TRL SOT-23 3P
VDD 2
OUTPUT 3
GND
1
R1347
100K_0402_5%
R1347
100K_0402_5%
1 2
SW1
EVQPLHA15_4P
D0@
SW1
EVQPLHA15_4P
D0@
3
2
1
4
5
6
JP23
ACES_85201-0405N
CONN@
JP23
ACES_85201-0405N
CONN@
1
1
2
2
3
3
4
4
G1
5
G2
6
G
D
S
Q1
2N7002W-T/R7_SOT323-3
G
D
S
Q1
2N7002W-T/R7_SOT323-3
2
13
C3 100P_0402_50V8J@C3 100P_0402_50V8J@
1 2
C1397
47P_0402_50V8J
C1397
47P_0402_50V8J
1
2
R194
0_0805_5%
@
R194
0_0805_5%
@
12
LED1
HT-191NB5-DT BLUE 0603
D0@
LED1
HT-191NB5-DT BLUE 0603
D0@
21
R1388
51 +-5% 0402
D0@ R1388
51 +-5% 0402
D0@
12
C4
1000P_0402_50V7K
C4
1000P_0402_50V7K
1
2
C246
1U_0402_6.3V6K
C246
1U_0402_6.3V6K
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+USB_VCCA
USB_ON#
USB20_N2_1
USB20_P2_1
USB20_P2_1
USB20_N2_1
USB20_N2_1
USB20_P2_1
USB_ON#
+USB_VCCA
+5VALW
+USB_VCCA
+USB_VCCA
+USB_VCCC+5VALW
+USB_VCCC
+USB_VCCC
USB_ON#<31>
USB_OC#0 <19>
USB20_N2<19>
USB20_P2<19>
USB_OC#2 <19>USB_ON#<31>
USB20_P0<19>
USB20_N0<19>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
USB PORT
B
23 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
USB PORT
B
23 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
USB PORT
B
23 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
W=40mils
USB CONN.1
091014 add for RF Solution
091119 change JUSB1 to SUYIN_020133GB004M25MZL
W=80mils W=80mils
5/5 Add U2 circuit
5/12 Revised net name
W=40mils USB CONN. 2
091212 Add C51 near U13
to prevent switch noise
D4
CM1293-04SO_SOT23-6
@
D4
CM1293-04SO_SOT23-6
@
CH3
6
Vp
5
CH4
4
CH2 3
Vn 2
CH1 1
C245
1000P_0402_50V7K
@
C245
1000P_0402_50V7K
@
1
2
JUSB2
SUYIN_020133GB004M25MZL
CONN@
JUSB2
SUYIN_020133GB004M25MZL
CONN@
VCC
1
D-
2
D+
3
GND
4
GND1
5
GND2
6
GND3
7
GND4
8
U8
APL3510BKI-TRG SOP 8P PWR SWITCH
U8
APL3510BKI-TRG SOP 8P PWR SWITCH
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
U13
APL3510BKI-TRG SOP 8P PWR SWITCH
U13
APL3510BKI-TRG SOP 8P PWR SWITCH
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
C316
470P_0402_50V7K
C316
470P_0402_50V7K
1
2
JUSB1
SUYIN_020133GB004M25MZL
CONN@
JUSB1
SUYIN_020133GB004M25MZL
CONN@
VCC
1
D-
2
D+
3
GND
4
GND1
5
GND2
6
GND3
7
GND4
8
L5
WCM2012F2S-900T04_0805
L5
WCM2012F2S-900T04_0805
1
122
33
4
4
C244
0.1U_0402_16V4Z
C244
0.1U_0402_16V4Z
12
C8
470P_0402_50V7K
C8
470P_0402_50V7K
1
2
R1
0_0402_5%
@
R1
0_0402_5%
@
1 2
C819
1000P_0402_50V7K@
C819
1000P_0402_50V7K@
1
2
C51 100P_0402_50V8JC51 100P_0402_50V8J
1 2
R224
100K_0402_5%
R224
100K_0402_5%
1 2
R2
0_0402_5%
@
R2
0_0402_5%
@
1 2
C818
0.1U_0402_16V4Z
C818
0.1U_0402_16V4Z
1
2
+
C10
150U 6.3V M B LESR45M T520 H1.9
+
C10
150U 6.3V M B LESR45M T520 H1.9
1
2
+
C315
150U 6.3V M B LESR45M T520 H1.9
+
C315
150U 6.3V M B LESR45M T520 H1.9
1
2
C1309
1U_0603_10V6K
C1309
1U_0603_10V6K
1
2
C1310
0.1U_0402_16V4Z
C1310
0.1U_0402_16V4Z
1
2
D21
PJDLC05C_SOT23-3
D21
PJDLC05C_SOT23-3
2
3
1
hexainf@hotmail.com
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+UIM_PWR
UIM_CLK
UIM_RST
UIM_VPP
UIM_DATA
EC_TX_P80_CLK_R
WWAN_WAKEUP_R#
ICH_PCIE_WAKE#
WWAN_CLKREQ#
WXMIT_OFF#
USB20_N5_1
USB20_P5_1
WWAN_WAKEUP_R#
UIM_DATA
+UIM_PWR
UIM_RST
+UIM_PWR
UIM_CLK
UIM_VPP
UIM_CLK
UIM_VPP UIM_DATA
UIM_RST
EC_TX_P80_DATA_R
EC_RX_P80_CLK
EC_TX_P80_DATA
EC_TX_P80_CLK_R
USB20_P6
+3VS_BT
USB20_N6
USB20_P5_1
USB20_N5_1
USB20_P5
USB20_N5
EC_TX_P80_DATA_R
USB20_N1
USB20_P1
USB20_P1
USB20_N1
UIM_DATA
UIM_VPP
+3VS_WWAN
+3VS
+3VS_WWAN
+1.5VS
+3VALW
+3VALW
+UIM_PWR
+3VS
+3VS_BT
+3VS
+3VS_WWAN
+3VS_WWAN
EC_TX_P80_DATA<31>
EC_RX_P80_CLK<31>
ICH_PCIE_WAKE#<19,25>
WWAN_CLKREQ#<13>
CLK_PCIE_WWAN#<13>
CLK_PCIE_WWAN<13>
PCIE_DTX_C_IRX_N3<19>
PCIE_DTX_C_IRX_P3<19>
PCIE_ITX_C_DRX_N3<19>
PCIE_ITX_C_DRX_P3<19>
WXMIT_OFF# <31>
PLTRST# <5,8,19,25,26,31>
CLK_SMBCLK <7,13>
CLK_SMBDATA <7,13>
WWAN_LED# <21,25>
WLAN_LED# <21,25>
USB20_N5 <19>
USB20_P5 <19>
BT_ON#<31>
USB20_P6<19>
USB20_N6<19>
WWAN_WAKEUP#<31>
USB20_P1<19>
USB20_N1<19> Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Mini-Card/BT CONN
24 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Mini-Card/BT CONN
24 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Mini-Card/BT CONN
24 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
(9~16mA)
091012 Change Mini PCIE CONN
Symbol to ACES 88910-5204 follow
ME CONN LISTRev08
Reserve for SIM card does not meet rise time
and pull-up is needed.
Add C1114 C1116 C1117 C1118 05/11
Change C512 to 1U_0402 05/14
Modifiy 05/11
Mini-Express Card for WWAN
BT MODULE CONN
Add C850 06/12
091019 Remove C1163/C1164/C1165/C1166
Close to WWAN CONN
091102 add L4/R826/R827 on USB port5
follow RF team review
091106 add R829 100K PD to GND
091106 change EC_TX_P80_DATA_R
from pin17 to pin49
091125 change 3G SKU power from +3VALW to +3VS
091204 add USB20_P1/N1 for SIM Card Conn.
091204 change SIM Card Conn. to
TAITW_PMPAT2-08GLBS7N14N0
091212 Add C20, C21
near JMINI1
to prevent switch noise
0104 Modify netname WWAN_LED_R# to WWAN_LED#, WLAN_LED_R# to WLAN_LED#
+
C403
150U_B_6.3VM_R40M
@
+
C403
150U_B_6.3VM_R40M
@
1
2
C1116
56P_0402_50V8
C1116
56P_0402_50V8
1
2
R829
100K_0402_5%
R829
100K_0402_5%
R403 0_0402_5%R403 0_0402_5%
1 2
C509
22P_0402_50V8J
@
C509
22P_0402_50V8J
@
1
2
C504
10U_0805_10V4Z
C504
10U_0805_10V4Z
1 2
D15
CM1293-04SO_SOT23-6@
D15
CM1293-04SO_SOT23-6@
CH3 6
Vp 5
CH4 4
CH2
3
Vn
2
CH1
1
R402 0_0402_5%R402 0_0402_5%
1 2
C513
0.1U_0402_16V4Z
C513
0.1U_0402_16V4Z
1
2
L4
WCM2012F2S-900T04_0805
@L4
WCM2012F2S-900T04_0805
@
11
2
2
3
344
R12
10K_0402_5%
@
R12
10K_0402_5%
@
12
C20 100P_0402_50V8J@C20 100P_0402_50V8J@
1 2
C507
0.1U_0402_16V4Z
C507
0.1U_0402_16V4Z
1
2
R507 0_0402_5%
NON3G@
R507 0_0402_5%
NON3G@
1 2
TAITW_PMPAT2-08GLBS7N14N0
JP3
CONN@TAITW_PMPAT2-08GLBS7N14N0
JP3
CONN@
VCC 1
RST 2
CLK 3
GND
4
VPP
5
I/O
6
GND 10
GND 11
DET
7
D+
8
D-
9
R506 0_0402_5%
NON3G@
R506 0_0402_5%
NON3G@
1 2
C511
22P_0402_50V8J
@
C511
22P_0402_50V8J
@
1
2
C21 100P_0402_50V8J@C21 100P_0402_50V8J@
1 2
C502
0.1U_0402_16V4Z
BT@
C502
0.1U_0402_16V4Z
BT@
12
C505
0.1U_0402_16V4Z
C505
0.1U_0402_16V4Z
1
2
R8260_0402_5% R8260_0402_5%
12
C1118
56P_0402_50V8
C1118
56P_0402_50V8
1
2
C510
22P_0402_50V8J
@
C510
22P_0402_50V8J
@
1
2
C506
10U_0805_10V4Z
C506
10U_0805_10V4Z
1
2
R510 0_0402_5%
3G@
R510 0_0402_5%
3G@
1 2
JBT1
ACES 88266-04001
CONN@
JBT1
ACES 88266-04001
CONN@
1
1
2
2
3
3
4
4GND 5
GND 6
C508
0.01U_0402_25V7K
C508
0.01U_0402_25V7K
1
2
R511 0_0402_5%@R511 0_0402_5%@
1 2
C1114
56P_0402_50V8
C1114
56P_0402_50V8
1
2
R405 0_1206_5%
3G@
R405 0_1206_5%
3G@
1 2
R509
10K_0402_5%
R509
10K_0402_5%
12
R8270_0402_5% R8270_0402_5%
12
R501
10K_0402_5%
BT@
R501
10K_0402_5%
BT@
12
R508 0_0402_5%
NON3G@
R508 0_0402_5%
NON3G@
1 2
C1117
56P_0402_50V8
C1117
56P_0402_50V8
1
2
C411
0.1U_0402_16V4Z
BT@C411
0.1U_0402_16V4Z
BT@
1
2
C512
1U_0402_6.3V6K
C512
1U_0402_6.3V6K
1
2
G
D
S
Q35
AO3413_SOT23-3
BT@
G
D
S
Q35
AO3413_SOT23-3
BT@
2
13
R504 0_1206_5%
NON3G@
R504 0_1206_5%
NON3G@
1 2
C850
47P_0402_50V8J
C850
47P_0402_50V8J
1
2
JMINI1
ACES_88910-5204
CONN@
JMINI1
ACES_88910-5204
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3VS_WLAN
+3VS_WLAN
WWAN_LED#WLAN_LED#
+3VS
+1.5VS
+1.5VS
+3VS_WLAN
ICH_PCIE_WAKE#<19,24>
WLAN_CLKREQ#<13>
CLK_PCIE_WLAN#<13>
CLK_PCIE_WLAN<13>
PCIE_DTX_C_IRX_N2<19>
PCIE_DTX_C_IRX_P2<19>
PCIE_ITX_C_DRX_N2<19>
PCIE_ITX_C_DRX_P2<19>
WL_OFF# <31>
PLTRST# <5,8,19,24,26,31>
USB20_N7 <19>
USB20_P7 <19>
WWAN_LED# <21,24>
WLAN_LED# <21,24>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
WLAN
Custom
25 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
WLAN
Custom
25 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
WLAN
Custom
25 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Mini-Express Card for WLAN
5/12 Update WLAN connector(the same as KAV60)
6/1 Revised 37 39 41 42 43 to NC
6/12 Update connector to DC040006S00
6/26 Update JMINI1 footprint
7/01 update pin 23,25,31,33
(9~16mA)
091116 Change JMINI2
Symbol to ACES 88910-5204 follow
ME CONN LIST 1116 Rev01
091125 reserve 0ohm for WIMAX
091127 reserve C240/C238 for RF team
0104 Modify netname WWAN_LED_R# to WWAN_LED#, WLAN_LED_R# to WLAN_LED#
0111 Change BOM Structure of C238/C240 from @ to mount
R723 0_0402_5%
@
R723 0_0402_5%
@
1 2
C1314
4.7U_0603_6.3V6K
C1314
4.7U_0603_6.3V6K
1
2
C1316
47P_0402_50V8J
C1316
47P_0402_50V8J
1
2
J12
JUMP_43X79
@
J12
JUMP_43X79
@
1
122
C1315
0.1U_0402_16V4Z
C1315
0.1U_0402_16V4Z
1
2
R1536 0_0402_5%
@
R1536 0_0402_5%
@
1 2
C1317
10U_0603_6.3V6M
C1317
10U_0603_6.3V6M
1
2
JMINI2
ACES_88910-5204
CONN@
JMINI2
ACES_88910-5204
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
C1312
0.1U_0402_16V4Z
C1312
0.1U_0402_16V4Z
1
2
C240
1U_0402_6.3V6K
C240
1U_0402_6.3V6K
1
2
C238
1U_0402_6.3V6K
C238
1U_0402_6.3V6K
1
2
C1313
47P_0402_50V8J
C1313
47P_0402_50V8J
1
2
C1311
4.7U_0603_6.3V6K
C1311
4.7U_0603_6.3V6K
1
2
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+2.5V_VDDH
+AVDD_CEN_R
LAN_MDI0+
LAN_MDI0-
LAN_MDI1+
LAN_MDI1-
LAN_MDI0
LAN_MDI1
+AVDDVCO1
+AVDDVCO2
LAN_ACTIVITY
+2.5V_VDDH
+1.2_AVDDL
+AVDDVCO2
+1.8_VDD_LX
+2.5V_VDDH
+AVDDVCO1
+1.2_AVDDL
LAN_SK_LAN_LINK#
RJ45_CT0
RJ45_CT1
LAN_MDI1-
+1.2_DVDDL
LAN_MDI0+
LAN_MDI0-
LAN_MDI1+
RJ45_MIDI1-
RJ45_MIDI1+
RJ45_MIDI0+
RJ45_MIDI0-
LAN_MDI1+
LAN_MDI1-
LAN_MDI0+
LAN_MDI0-
+AVDD_CEN
+1.2_DVDDL
LAN_SK_LAN_LINK#
RJ45_MIDI1-
RJ45_MIDI0+
RJ45_MIDI1+
RJ45_MIDI0-
LAN_ACTIVITY
PCIE_DTX_C_IRX_P1
PCIE_DTX_C_IRX_N1
RJ45_GND
RJ45_GND RJ45_GNDA
LAN_X2
LAN_X1
+1.8_VDD_LX
PCIE_C_RXP1
PCIE_ITX_C_DRX_N1
+AVDD_CEN
PCIE_C_RXN1
PCIE_ITX_C_DRX_P1
LANRBIAS_R
PLTRST#
LAN_WAKE#
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R
LAN_X1 LAN_X2
LAN_CLKREQ#
+3V_LAN
+1.2_AVDDL
+3V_LAN
+3V_LAN
+AVDD_CEN
+3V_LAN
+3VALW
+3V_LAN
PLTRST#<5,8,19,24,25,31>
LAN_WAKE#<31>
CLK_PCIE_LAN<13>
CLK_PCIE_LAN#<13>
PCIE_ITX_C_DRX_P1<19>
PCIE_ITX_C_DRX_N1<19>
PCIE_DTX_C_IRX_P1<19>
PCIE_DTX_C_IRX_N1<19>
LAN_CLKREQ# <13>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
LAN AR8132
Custom
26 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
LAN AR8132
Custom
26 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
LAN AR8132
Custom
26 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
C1326 close to pin11
close to pin42
Place Close to Chip
C1321,C1322,C1323 close to pin2 (<400mil)
C1334,C1335 close to pin8
C1350 close to pin15
Compal Electronics, Inc.
C1318 close to pin2
C1324 C1325 close to U1
C1319 close to pin6
20mil
60mil
30mil
40mil
R1541 keep away other singal (25mil)
L46 close to pin1 (<200mil)
C1330 C1331 close to L1 (<200mil)
the GND directly connect to GND layer
the GND directly connect to GND layer
For EMI.
close to JRJ1
RJ45 CONN
40mil
1013 Add C22 close to pin39 (Vendor)
C1342 close to pin46
1013 Add R1550,C1353 for EMI (Vendor)
1013 Add C1348,C1349 for ESD (Vendor)
C1320 close to pin5
C1336 close to pin16
C1351 close to pin19
C1337,C1338 close to pin22 .36
C1352 close to pin25
C1343 close to pin28
C1344 close to pin32
C1345 close to pin45
1013 pull up R1537 (Vendor)
1013 Add R1538,R1539 for reserve 0.1u cap (Vendor)
20mil
20mil
20mil
091116 change P/N of Y7 to
SJ100003300
C1337
0.1U_0402_16V4Z
C1337
0.1U_0402_16V4Z
1
2
C1347
1000P_1206_2KV7K
C1347
1000P_1206_2KV7K
1 2
Y7
25MHZ_20PF_7A25000012
Y7
25MHZ_20PF_7A25000012
1 2
C1330
10U_0603_6.3V6M
C1330
10U_0603_6.3V6M
1
2
C1342
1U_0402_6.3V4Z
C1342
1U_0402_6.3V4Z
1
2
C1351
0.1U_0402_16V4Z
C1351
0.1U_0402_16V4Z
1
2
C1320 0.1U_0402_16V4ZC1320 0.1U_0402_16V4Z
12
R1538
0_0402_5%
R1538
0_0402_5%
1 2
C1323
10U_0603_6.3V6M
C1323
10U_0603_6.3V6M
1
2
C1331
0.1U_0402_16V4Z
C1331
0.1U_0402_16V4Z
1
2
C1318 1U_0402_6.3V4ZC1318 1U_0402_6.3V4Z
12
C1322
10U_0603_6.3V6M
C1322
10U_0603_6.3V6M
1
2
R1549
511_0402_1%
R1549
511_0402_1%
12
C1352
0.1U_0402_16V4Z
C1352
0.1U_0402_16V4Z
1
2
R1540 0_0805_5%R1540 0_0805_5%
C1346 100P_0402_50V8J
@
C1346 100P_0402_50V8J
@
12
R1537 4.7K_0402_5%R1537 4.7K_0402_5%
12
L46 4.7UH_1008HC-472EJFS-A_5%_1008L46 4.7UH_1008HC-472EJFS-A_5%_1008
1 2
C1327
27P_0402_50V8J
C1327
27P_0402_50V8J
1
2
R1541 2.37K_0402_1%R1541 2.37K_0402_1%
12
C1324 0.1U_0402_16V7KC1324 0.1U_0402_16V7K
12
C1338
0.1U_0402_16V4Z
C1338
0.1U_0402_16V4Z
1
2
C1325 0.1U_0402_16V7KC1325 0.1U_0402_16V7K
12
C1332 100P_0402_50V8J
@
C1332 100P_0402_50V8J
@
12
C1348
0.1U_0402_16V4Z
C1348
0.1U_0402_16V4Z
1
2
R1551 75_0402_5%R1551 75_0402_5%
1 2
R1545 49.9_0402_1%R1545 49.9_0402_1%
1 2
R1550
0_0603_5%
R1550
0_0603_5%
1 2
C1319 0.1U_0402_16V4ZC1319 0.1U_0402_16V4Z
1 2
C1336
0.1U_0402_16V4Z
C1336
0.1U_0402_16V4Z
1
2
C1328
0.1U_0402_16V4Z
C1328
0.1U_0402_16V4Z
1
2
R1548 49.9_0402_1%R1548 49.9_0402_1%
1 2
C1341
470P_0402_50V7K
@
C1341
470P_0402_50V7K
@
12
R1547 49.9_0402_1%R1547 49.9_0402_1%
1 2
C1353
1U_0402_6.3V4Z
C1353
1U_0402_6.3V4Z
1
2
C1335
0.1U_0402_16V4Z
C1335
0.1U_0402_16V4Z
1
2
C1343
0.1U_0402_16V4Z
C1343
0.1U_0402_16V4Z
1
2
T80
350uH_NS0013LF
T80
350uH_NS0013LF
RD+
1
RD-
2
CT
3
CT
6
TD+
7
TD-
8TX- 9
TX+ 10
CT 11
CT 14
RX- 15
RX+ 16
NC
4
NC
5NC 13
NC 12
C1354
0.1U_0402_16V4Z
C1354
0.1U_0402_16V4Z
1
2
R1552 75_0402_5%R1552 75_0402_5%
1 2
C1334
1U_0402_6.3V4Z
C1334
1U_0402_6.3V4Z
1
2
C1349
0.1U_0402_16V4Z
C1349
0.1U_0402_16V4Z
1
2
C1326
0.1U_0402_16V4Z
C1326
0.1U_0402_16V4Z
1
2
JRJ1
SANTA_130452-3
CONN@
JRJ1
SANTA_130452-3
CONN@
PR1-
2
PR1+
1
PR2+
3
PR3+
4
PR3-
5
PR2-
6
PR4+
7
PR4-
8
Green LED-
10
Green LED+
9
Yellow LED-
12
Yellow LED+
11
SHLD1 14
SHLD1 15
DETECT PIN1 13
C1340
0.1U_0402_16V4Z
C1340
0.1U_0402_16V4Z
1
2
AR8132 10/100 LAN
Atheros
U88
AR8132-AL1E_QFN48_6X6
AR8132 10/100 LAN
Atheros
U88
AR8132-AL1E_QFN48_6X6
VDD3V
2
PERSTn
3
WAKEn
4
VDD25V
5
VDD17
6
AVDD_ REG 11
SEL_25 MHz
7
VDD11_ REG 8
XTLO
9
XTLI
10
RBIAS
12
TRXP0 13
TRXN0 14
VDDHO 15
TRXP1 17
TRXN1 18
AVDDH 19
NC 20
NC 21
TX_N
37
TX_P
38
AVDDL 39
REFCLKN
40
REFCLKP
41
AVDDL 42
RX_P
43
RX_N
44
DVDD_REG 45
DVDD_REG 46
LED_ACTn 47
LED_10_100n 48
LX
1
GND
49
AVDDL 16
AVDDL 22
NC 23
AVDDL 36
NC 35
NC 24
TESTMODE
34
SMDATA
33
DVDDL 32
SMCLK
31
TWSI_DATA 30
TWSI_CLK 29
DVDDL 28
CLKREQn 27
NC 26
AVDDH 25
R1542
0_0603_5%
R1542
0_0603_5%
1 2
R1544 5.1K_0402_5%R1544 5.1K_0402_5%
12
C1344
0.1U_0402_16V4Z
C1344
0.1U_0402_16V4Z
1
2
C1355
0.1U_0402_16V4Z
C1355
0.1U_0402_16V4Z
1
2
C1339
0.1U_0402_16V4Z
C1339
0.1U_0402_16V4Z
1
2
C1350
1U_0402_6.3V4Z
C1350
1U_0402_6.3V4Z
1
2
C1329
27P_0402_50V8J
C1329
27P_0402_50V8J
1
2
C1345
0.1U_0402_16V4Z
C1345
0.1U_0402_16V4Z
1
2
R1546 49.9_0402_1%R1546 49.9_0402_1%
1 2
C1333
0.1U_0402_16V4Z
C1333
0.1U_0402_16V4Z
1
2
R1539
0_0402_5%
R1539
0_0402_5%
1 2
R1543 511_0402_1%R1543 511_0402_1%
12
C1321
0.1U_0402_16V4Z
C1321
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XTLI
XTLO
CARD_D7
CARD_D6
SMWPZ
CARD_D5
CARD_D4
CARD_D3
CARD_D1
CARD_D0
PIN3
CARD_LED_R#
SMALE_CLK
SMBSYZ_SDCMD
CARD_D2
REXT
SMCLE
SMCDZ_MSINSZ
XTLI
+3VS_READER
XTLO
CARD_D3
CARD_D2
CARD_D4
CARD_D0
CARD_D1
CARD_D5
CARD_D7
CARD_D6
CARD_D0
SDCDZ
SMALE_CLK
SMBSYZ_SDCMD
CARD_D3
CARD_D2
CARD_D1
CARD_D2
CARD_D1
CARD_D0
SMALE_CLK
PIN3
PIN3
SMCDZ_MSINSZ
CARD_D3
SMCDZ_MSINSZ
SDCDZ
PIN3
SMALE_CLK
SMCLE
SMCEZ_C
SMWPZ
SMCDZ_MSINSZ
SMBSYZ_SDCMD
SMREZ_C
SMCEZ_C
SMREZ_C
CARD_LED_R#
+VCC33
+VCC33
+VCC_4IN1 +VCC18
+VCC33
+VCC18
+VCC_4IN1
+3VS_READER
+3VALW
+VCC_4IN1 +VCC_4IN1
+3VS
+VCC33
+3VS
+VCC33
USB20_P4<19>
USB20_N4<19>
CARD_LED# <21>
CLK_48M_CR<13>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CARD READER
Custom
27 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CARD READER
Custom
27 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CARD READER
Custom
27 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Card Reader Connector
ByPass Capacitors
Clock from M/B
If use external crystal(Y6),
U78 will change UB6252
EMI
U1 close to JREAD1
Only UB6252
need to use XTLI and XTLO
20mils
20mils 20mils
091020 change JUMP J2/J3 to R808/R809 0ohm
091102 change Y6 to SJ100005900
091203 change BOM structure of
Q53/R1395/R1396 from mount to @
G
D
S
Q53
2N7002W-T/R7_SOT323-3
@
G
D
S
Q53
2N7002W-T/R7_SOT323-3
@
2
13
C1193
27P_0402_50V8J
6252@
C1193
27P_0402_50V8J
6252@
1 2
C1185
0.01U_0402_16V7K
@
C1185
0.01U_0402_16V7K
@
1
2
C1187
4.7U_0603_6.3V6K
C1187
4.7U_0603_6.3V6K
1
2
C1186
0.1U_0402_25V4K
C1186
0.1U_0402_25V4K
1
2
C1190 4.7P_0402_50V8C
@
C1190 4.7P_0402_50V8C
@
R808
0_0603_5%
R808
0_0603_5%
1 2
R1404
0_0402_5%
6250@R1404
0_0402_5%
6250@
1 2
R1390
12K_0402_1%
R1390
12K_0402_1%
1 2
R1405
33_0402_5%
@
R1405
33_0402_5%
@
12
C1184
4.7U_0603_6.3V6K
C1184
4.7U_0603_6.3V6K
1
2
C1189
27P_0402_50V8J
6252@
C1189
27P_0402_50V8J
6252@
1 2
C1180
0.1U_0402_25V4K
@
C1180
0.1U_0402_25V4K
@
1
2
R1392
4.7K_0402_5%
@
R1392
4.7K_0402_5%
@
1 2
C1183
0.1U_0402_25V4K
@
C1183
0.1U_0402_25V4K
@
1
2
U78
UB6250NF-A1-110_QFN32_5X5
U78
UB6250NF-A1-110_QFN32_5X5
LedZ 1
ResetZ 2
xDWeZ 3
xDData5
4
xDData6
5
xDData7
6
xDCeZ 7
EClkin
8
NC 9
VccA 10
GndA 11
Rref
12 D-
13 D+
14
VddA 15
VssA 16
xDData0
17
xDData1
18
xDData4
19
xDData2
20
xDData3
21
xDBsyZ 22
xDCle 23
xDAle 24
xDReZ 25
SdCdZ 26
xDCdZ 27
CrdVcc
28
SysVcc
29
Vcc33O
30
Vcc18O
31
xDWpZ 32
Thermo Pad
33
R809
0_0603_5%
@
R809
0_0603_5%
@
1 2
Y6
12MHZ_16PF_7A12000026~D
6252@
Y6
12MHZ_16PF_7A12000026~D
6252@
12
C1192
0.1U_0402_25V4K
C1192
0.1U_0402_25V4K
1
2
R1403
0_0402_5%
@
R1403
0_0402_5%
@
1 2
C1181
10P 50V J NPO 0402
@
C1181
10P 50V J NPO 0402
@
1
2
C1182
10U 6.3V M X5R 0603 H0.8
C1182
10U 6.3V M X5R 0603 H0.8
1
2
C1188 4.7P_0402_50V8CC1188 4.7P_0402_50V8C
R1396
10K_0402_5%
@
R1396
10K_0402_5%
@
12
JREAD1
T-SOL_144-1300302600_NR
CONN@
JREAD1
T-SOL_144-1300302600_NR
CONN@
XD08-WP
32
XD14-D4
26
MS7-DATA3 15
MS4-DATA0 10
SD9-DAT2 21
SD7-DAT0 4
SD2-CMD 16
MS3-DATA1 8
XD16-D6
24 SD1-DAT3 19
SD8-DAT1 3
XD06-ALE
34
XD10-D0
30
SD5-CLK 9
XD12-D2
28
MS6-INS 14
MS5-DATA2 12
MS8-SCLK 17
XD03-RE
37
MS2-BS 7
XD15-D5
25
XD17-D7
23
XD11-D1
29
XD04-CE
36
XD02-R/B
38
XD13-D3
27
XD07-WE
33
MS9-VCC 18
XD GND
31
XD05-CLE
35
XD GND
40
SD4-VDD 11
XD-VCC
22
XD01-CD
39
SD-CD 1
SD-WP 2
SD CD/WP GND
41
SD CD/WP GND
42 MS10-VSS 20
MS1-VSS 5
SD3-VSS 13
SD6-VSS 6
R1395
0_0402_5%
@
R1395
0_0402_5%
@
12
C1191
22P_0402_50V8J
@C1191
22P_0402_50V8J
@
1
2
C1179
10U 6.3V M X5R 0603 H0.8
C1179
10U 6.3V M X5R 0603 H0.8
1
2
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MIC1_C_L
HDA_SDIN0_AUDIO
CODEC_VREF
SPKL+_R
MIC1_C_R
EAPD_R
SENSE_A
MIC1_R
MIC1_L
PVDD2_AUDIO
SENSE_B
HP_LEFT
DMIC_DATA
AUDIO_LDO_IN
271_VREFO
DMIC_CLK
AUDIO_GPIO0
DMIC_DATA_R
+3VS_DVDD
HP_RIGHT
EC_MUTE#_R
CD_GND
271_AVSS2
PVDD1_AUDIO
PVDD1_AUDIO
PVDD2_AUDIO
SPKL-_R
PVSS2
SPKR-_R
SPKR+_R
DMIC_CLK AUDIO_GPIO3
CD_GND
MIC1_C_L
MIC1_C_R
SENSE_A
EC_MUTE#_R
SENSE_B
EAPD_R
AUDIO_GPIO0
AUDIO_GPIO3
PVDD1_AUDIO
SPKR+_R
SPKR-_R
PVSS2
SPKL-_R
PVDD2_AUDIO
271_AVSS2
HDA_SDIN0_AUDIO
271_VREFO
CODEC_VREF
SPKL+_R
DMIC_CLK_R
DMIC_CLK
DMIC_DATA
DMIC_CLK_LVDS
DMIC_DATA_LVDS
DMIC_DATA
DMIC_CLK
HDA_RST_AUDIO#
HDA_SYNC_AUDIO
+AVDD_HDA
+VDDA
MIC1_VREFO
+3VS
+VDDA
+5VS
+3VS
MIC1_VREFO_R
MIC1_VREFO_L
+5VS
+5VS
+3VS_DVDD
MIC1_L<29>
MIC1_R<29>
HDA_RST_AUDIO#<19,30>
MONO_IN<29,30>
HP_PLUG#<29>
MIC_PLUG#<29>
HP_PLUG#<29>
EAPD<31>
EC_MUTE#<29,31>
AMP_LEFT <29,30>
AMP_RIGHT <29,30>
SPKR+ <29>
SPKL- <29>
SPKR- <29>
HDA_BITCLK_AUDIO <19,30>
HP_RIGHT <29,30>
SPKL+ <29>
HP_LEFT <29,30>
AUDIO_GPIO3<30>
AUDIO_GPIO0<30>
MIC1_C_R<30>
MIC1_C_L<30>
CD_GND<30>
EAPD_R<30>
EC_MUTE#_R<30>
SENSE_A<30>
SENSE_B<30>
PVDD1_AUDIO <30>
SPKL-_R <30>
SPKR+_R <30>
PVSS2 <30>
SPKR-_R <30>
PVDD2_AUDIO <30>
HDA_SDIN0_AUDIO <30>
271_VREFO <30>
CODEC_VREF <30>
SPKL+_R <30>
271_AVSS2 <30>
DMIC_CLK_LVDS <14>
DMIC_DATA_LVDS <14>
HDA_SDIN0 <19>
HDA_SYNC_AUDIO<19,30>
HDA_SDOUT_AUDIO<19,30>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
AUDIO CODEC ALC272
Custom
28 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
AUDIO CODEC ALC272
Custom
28 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
AUDIO CODEC ALC272
Custom
28 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
PORT-E (PIN 14, 15)
PORT-F (PIN 16, 17)
DGND
20mil
40mil
HD Audio Codec
10mil
AGND
4.75V
10mil
SENSE A
5.1K
10K
20K
39.2K
10K
5.1K
20K
39.2K
PORT-D (PIN 35, 36)
PORT-C (PIN 23, 24)
PORT-B (PIN 21, 22)
PORT-A (PIN 39, 41)
SENSE B
Sense Pin Impedance Codec Signals
PORT-H (PIN 45, 46)
PORT-G (PIN 43, 44)
(output = 300 mA)
GND GNDA
40mil
Change to SA00002CI20 ALC272-VA2-GR
20mil
40mil
PN:SCA00001100
For ESD 12/22
8mil
5/5 Add digital MIC
5/12 Revised circuit
7/04 Add C23 10mil
20mil
20mil
20mil
20mil 20mil
20mil
20mil
20mil
091127 reserve C447 0.1U for EMI request
091130 reserve R1603/R1604 for LVDS Conn.
Close to CODEC
091130 add R1601/R1602 0ohm
Close to CODEC
091212 Add C33, C34 near Codec
to prevent switch noise
20100125 change R1573 P/N from SD028000080 to SE102104K00 ,
value from 0_0402_5% to 0.1u_0402_10V7K
20100131 change R1573 symbol to C448
R1565
0_0402_5%271@
R1565
0_0402_5%271@
1 2
R1597 0_0402_5%R1597 0_0402_5%
12
C1362
0.1U_0402_16V4Z
C1362
0.1U_0402_16V4Z
1
2
C1358
0.1U_0402_16V4Z
C1358
0.1U_0402_16V4Z
1
2
C1377 4.7U_0603_6.3V6KC1377 4.7U_0603_6.3V6K
1 2
C1384
0.1U_0402_16V4Z
C1384
0.1U_0402_16V4Z
1
2
R1574 0_0402_5%R1574 0_0402_5%
12
U89
G9191-475T1U_SOT23-5
@
U89
G9191-475T1U_SOT23-5
@
IN
1
GND
2
SHDN
3
OUT 5
BYP 4
C1371
2.2U_0402_6.3VM
271@
C1371
2.2U_0402_6.3VM
271@
1
2
C1383
2.2U_0402_6.3VM
271@C1383
2.2U_0402_6.3VM
271@
12
C1363
10U 6.3V M X5R 0603 H0.8
C1363
10U 6.3V M X5R 0603 H0.8
1
2
C1378 4.7U_0603_6.3V6KC1378 4.7U_0603_6.3V6K
1 2
L51
MBK1608121YZF_0603
271@L51
MBK1608121YZF_0603
271@
1 2
R1602 0_0402_5%R1602 0_0402_5%
1 2
C1374
0.1U_0402_16V4Z
271@
C1374
0.1U_0402_16V4Z
271@
1
2
R1560 33_0402_5%R1560 33_0402_5%
1 2
C1369
0.1U_0402_16V4Z
271@
C1369
0.1U_0402_16V4Z
271@
1
2
C1381 10U 6.3V M X5R 0603 H0.8
271@
C1381 10U 6.3V M X5R 0603 H0.8
271@
1 2
R1561 0_0402_5% 271@R1561 0_0402_5% 271@
1 2
R1571 0_0402_5% 272@R1571 0_0402_5% 272@
1 2
R1604 0_0402_5%@R1604 0_0402_5%@
1 2
C1373
10U 6.3V M X5R 0603 H0.8
271@
C1373
10U 6.3V M X5R 0603 H0.8
271@
1
2
R1564 39.2K +-1% 0402 271@R1564 39.2K +-1% 0402 271@
12
C1360
2.2U_0603_6.3V6K
@
C1360
2.2U_0603_6.3V6K
@
1 2
R1563
FBMA-11-100505-401T 0402
R1563
FBMA-11-100505-401T 0402
1 2
C1366
0.1U_0402_16V4Z
271@
C1366
0.1U_0402_16V4Z
271@
1
2
L48
MBK1608121YZF_0603
L48
MBK1608121YZF_0603
1 2
R1554 0_0402_5%271@ R1554 0_0402_5%271@
1 2
L50
MBK1608121YZF_0603
L50
MBK1608121YZF_0603
1 2
C1370
10U 6.3V M X5R 0603 H0.8
271@
C1370
10U 6.3V M X5R 0603 H0.8
271@
1
2
C1359
0.1U_0402_16V4Z
C1359
0.1U_0402_16V4Z
1
2
C1365
0.1U_0402_16V4Z
C1365
0.1U_0402_16V4Z
1
2
R1575 0_0603_5%
<BOM Structure>
R1575 0_0603_5%
<BOM Structure>
12
R1553 0_0402_5%271@ R1553 0_0402_5%271@
1 2
C1375
10U 6.3V M X5R 0603 H0.8
271@
C1375
10U 6.3V M X5R 0603 H0.8
271@
1
2
J13
JUMP_43X39@
J13
JUMP_43X39@
11
2
2
L47
FBMA-L11-201209-221LMA30T_0805
L47
FBMA-L11-201209-221LMA30T_0805
1 2
C447 0.1U_0402_10V7K
@
C447 0.1U_0402_10V7K
@
1 2
C1368
10U 6.3V M X5R 0603 H0.8
271@
C1368
10U 6.3V M X5R 0603 H0.8
271@
1
2
C1379
2.2U_0402_6.3VM
272@
C1379
2.2U_0402_6.3VM
272@
1 2
R1555 FBMA-11-100505-401T 0402
272@
R1555 FBMA-11-100505-401T 0402
272@
1 2
C1357
22P 50V J NPO 0402
C1357
22P 50V J NPO 0402
1
2
C1372
0.1U_0402_16V4Z
271@
C1372
0.1U_0402_16V4Z
271@
1
2
C1380
10P_0402_50V8J
@C1380
10P_0402_50V8J
@
12
C34 100P_0402_50V8J@C34 100P_0402_50V8J@
1 2
L49
MBK1608121YZF_0603
271@L49
MBK1608121YZF_0603
271@
1 2
R157220K_0402_1%
272@
R157220K_0402_1%
272@
12
R1569
0_0402_5%
271@
R1569
0_0402_5%
271@
1 2
R1568 0_0402_5%R1568 0_0402_5%
1 2
R1567 5.11K_0402_1% 272@R1567 5.11K_0402_1% 272@
12
C1361
0.1U_0402_16V4Z
C1361
0.1U_0402_16V4Z
1
2
R1558 20K_0402_1%
271@
R1558 20K_0402_1%
271@
12
C1364
10U 6.3V M X5R 0603 H0.8
C1364
10U 6.3V M X5R 0603 H0.8
1
2
R1601 0_0402_5%R1601 0_0402_5%
1 2
JP24
ACES_88266-04001
CONN@
JP24
ACES_88266-04001
CONN@
1
1
2
2
3
3
4
4G1 5
G2 6
C1376 22P_0402_50V8JC1376 22P_0402_50V8J
1 2
C1367
0.1U_0402_16V4Z
C1367
0.1U_0402_16V4Z
1
2
C1356
22P 50V J NPO 0402
C1356
22P 50V J NPO 0402
1
2
R1570 0_0402_5% 271@R1570 0_0402_5% 271@
1 2
C448 0.1U_0402_10V7KC448 0.1U_0402_10V7K
1 2
R1557 0_0402_5%271@ R1557 0_0402_5%271@
1 2
R1559 22_0402_5%R1559 22_0402_5%
1 2
C33 100P_0402_50V8J@C33 100P_0402_50V8J@
1 2
U90
ALC272-GR_LQFP48_9X9
U90
ALC272-GR_LQFP48_9X9
NC
14
NC
15
MIC2_R
17
MIC2_L
16
LINE1_L
23
LINE1_R
24
CD_L
18
CD_R
20
CD_GND
19
MIC1_L
21
MIC1_R
22
SENSE A
13
PCBEEP
12
LINE_OUT_L 35
LINE_OUT_R 36
MONO_OUT 37
RESET#
11
SYNC
10
BIT_CLK 6
SDATA_OUT
5
SDATA_IN 8
GPIO0
2
GPIO3
3
LINE1_VREFO 29
MIC2_VREFO 30
MIC1_VREFO_L 28
VREF 27
DVDD 1
DVDD_IO 9
AVDD1 25
AVDD2 38
MIC1_VREFO_R 32
DMIC_CLK 46
EAPD
47
SPDIFO
48
DVSS1
4
DVSS2
7
GPIO1 31
NC 33
SENSE B
34
NC 43
NC 44
NC 45
JDREF 40
AVSS1 26
AVSS2 42
HP_OUT_L 39
HP_OUT_R 41
R1603 0_0402_5%@R1603 0_0402_5%@
1 2
D50
PJDLC05C_SOT23-3
D50
PJDLC05C_SOT23-3
2
3
1
C1382
2.2U_0402_6.3VM
272@
C1382
2.2U_0402_6.3VM
272@
1 2
R1556 0_0402_5%271@ R1556 0_0402_5%271@
1 2
C1385
10U 6.3V M X5R 0603 H0.8
@
C1385
10U 6.3V M X5R 0603 H0.8
@
1
2
R1566 20K_0402_1%R1566 20K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HPOUT_L_1
HP_RIGHT
HP_LEFT
HPOUT_R_1
MIC2_L_2
MIC2_R_2
HP_RIGHT
HP_LEFT
HPOUT_R_2
HPOUT_L_2
MONO_INMONO_IN_1
GAIN1
GAIN0
SPK_L+
SPK_L-
SPK_R+
SPK_R-
SPK_R+SPK_R- SPK_L- SPK_L+
GAIN0
GAIN1
SPKR-
SPKL+
AMP_C_LEFT
EC_MUTE#
SPKL-
AMP_C_RIGHT
SPKR+
MIC2_R_1
MIC2_L_1
HP_PLUG#
MIC_PLUG#
MIC1_VREFO MIC1_VREFO
MIC1_VREFO_RMIC1_VREFO_L
+5VAMP_J
+5VAMP_J
+5VAMP_J+5VS
AMP_LEFT<28,30>
AMP_RIGHT<28,30>
HP_RIGHT<28,30>
HP_LEFT<28,30>
HP_RIGHT<28,30>
HP_LEFT<28,30>
BEEP#<31>
SB_SPKR<19>
MONO_IN <28,30>
EC_MUTE# <28,31>
SPKL+<28>
SPKL-<28>
SPKR+<28>
SPKR-<28>
MIC1_L<28>
MIC1_R<28>
HP_PLUG#<28>
MIC_PLUG#<28>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
AMP & Audio Jack
Custom
29 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
AMP & Audio Jack
Custom
29 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
AMP & Audio Jack
Custom
29 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
20mil
20mil
20mil
MIC JACK
20mil
Headphone JACK
EC Beep
PCI Beep
091020 follow NTV00 Design
20081029 Update to 6dB
Int. Speaker Conn.
20mil
091109 change U81 symbol to
APA2031RI-TRL_TSSOP20
P/N: SA00001RZ00
Keep 10 mil width
091020 change JUMP J5 to R1576 0ohm
091123 change symbol of JHP1 to
SINGA_2SJ2285-112252
091123 change symbol of JMIC1 to
SINGA_2SJ2285-112252
091127 change value of R1328 from 10K to 4.7K
R15920_0402_5%
271@
R15920_0402_5%
271@
1 2
C1394
330P_0402_50V7K
C1394
330P_0402_50V7K
1
2
R1586
100K_0402_5%
@R1586
100K_0402_5%
@
12
R1596 1K_0603_1%R1596 1K_0603_1%
1 2
R1584 56.2_0402_1%
272@
R1584 56.2_0402_1%
272@
1 2
C1389 0.47U_0603_10V7K
272@
C1389 0.47U_0603_10V7K
272@ 1 2
R1593
4.7K_0402_5%
R1593
4.7K_0402_5%
12
D51
PJDLC05C_SOT23-3
D51
PJDLC05C_SOT23-3
2
3
1
R1328
4.7K_0402_5%
R1328
4.7K_0402_5%
12
R1585 56.2_0402_1%
272@
R1585 56.2_0402_1%
272@
1 2
R1589
100K_0402_5%
272@
R1589
100K_0402_5%
272@
12
R1580 0_0603_5%R1580 0_0603_5%
1 2
SHLD1
JMIC1
SINGA_2SJ2285-112252
CONN@
SHLD1
JMIC1
SINGA_2SJ2285-112252
CONN@
3
1
5
6
2
4
R1582 0_0402_5%272@R1582 0_0402_5%272@
1 2
U81
APA2031RI-TRL_TSSOP20
272@
U81
APA2031RI-TRL_TSSOP20
272@
GAIN0
2
LOUT+ 4
ROUT+ 18
LIN-
5
RIN-
17
PVDD
6
GND 1
NC 12
GAIN1
3ROUT- 14
LOUT- 8
BYPASS 10
VDD
16
SHUTDOWN# 19
GND 11
PVDD
15
GND 13
GND 20
LIN+
9
RIN+
7GND 21
D54
RB751V-40TE17_SOD323-2
272@
D54
RB751V-40TE17_SOD323-2
272@
1 2
D52
PJDLC05C_SOT23-3
D52
PJDLC05C_SOT23-3
2
3
1
C1395
220P_0402_50V8J
C1395
220P_0402_50V8J
1
2
L55
FBM-11-160808-700T_0603
L55
FBM-11-160808-700T_0603
1 2
R1594
4.7K_0402_5%
R1594
4.7K_0402_5%
12
C1391 0.47U_0603_10V7K
272@
C1391 0.47U_0603_10V7K
272@
1 2
C1392 0.47U_0603_10V7K
272@
C1392 0.47U_0603_10V7K
272@
12
JP25
ACES_88266-04001
CONN@
JP25
ACES_88266-04001
CONN@
1
1
2
2
3
3
4
4G1 5
G2 6
D53
RB751V-40TE17_SOD323-2
272@
D53
RB751V-40TE17_SOD323-2
272@
1 2
R1579 0_0603_5%R1579 0_0603_5%
1 2
SHLD1
JHP1
SINGA_2SJ2285-112252
CONN@
SHLD1
JHP1
SINGA_2SJ2285-112252
CONN@
3
1
5
6
2
4
L54
FBM-11-160808-700T_0603
L54
FBM-11-160808-700T_0603
1 2
C1386 10U 6.3V M X5R 0603 H0.8
272@
C1386 10U 6.3V M X5R 0603 H0.8
272@
12
R1326
47K_0402_5%
R1326
47K_0402_5%
1 2
R1583 56.2_0402_1%
271@
R1583 56.2_0402_1%
271@
1 2
R1581 0_0402_5%
272@
R1581 0_0402_5%
272@
1 2
R1577 0_0603_5%R1577 0_0603_5%
1 2
R1591 0_0402_5%
271@
R1591 0_0402_5%
271@
1 2
R1327
47K_0402_5%
R1327
47K_0402_5%
1 2
R1588 56.2_0402_1%
271@
R1588 56.2_0402_1%
271@
1 2
R1578 0_0603_5%R1578 0_0603_5%
1 2
R1590
100K_0402_5%
272@
R1590
100K_0402_5%
272@
12
R1576 0_0603_5%
272@
R1576 0_0603_5%
272@
1 2
R1595 1K_0603_1%R1595 1K_0603_1%
1 2
C811
0.1U_0402_16V4Z
C811
0.1U_0402_16V4Z
C1387 0.1U_0402_16V4Z
272@
C1387 0.1U_0402_16V4Z
272@
12
C1396
220P_0402_50V8J
C1396
220P_0402_50V8J
1
2
C1393
330P_0402_50V7K
C1393
330P_0402_50V7K
1
2
R1587
100K_0402_5%
@R1587
100K_0402_5%
@
12
C812
0.1U_0402_16V4Z
C812
0.1U_0402_16V4Z
L53 FBM-11-160808-700T_0603L53 FBM-11-160808-700T_0603
1 2
C1388 0.47U_0603_10V7K
272@
C1388 0.47U_0603_10V7K
272@
1 2
L52 FBM-11-160808-700T_0603L52 FBM-11-160808-700T_0603
1 2
C1390 0.47U_0603_10V7K
272@
C1390 0.47U_0603_10V7K
272@ 1 2
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CD_GND
SENSE_A
EC_MUTE#_R
SENSE_B
PVDD1_AUDIO
271_AVSS2
SPKR+_R
SPKR-_R
PVSS2
SPKL-_R
HP_RIGHT
CODEC_VREF
MIC1_C_L
+AVDD_HDA
SPKL+_R
HDA_SDIN0_AUDIO
EAPD_R
MIC1_C_R
PVDD2_AUDIO
HP_LEFT
271_VREFO
AUDIO_GPIO0
+3VS_DVDD
AUDIO_GPIO3
MIC1_VREFO
MIC1_VREFO_R
MIC1_VREFO_L
+AVDD_HDA
+3VS_DVDD
CD_GND<28>
MIC1_C_L<28>
MIC1_C_R<28>
MONO_IN<28,29>
HDA_RST_AUDIO#<19,28>
HDA_SYNC_AUDIO<19,28>
HDA_SDOUT_AUDIO<19,28>
AUDIO_GPIO0<28>
AUDIO_GPIO3<28>
SENSE_A<28>
SENSE_B<28>
EAPD_R<28>
EC_MUTE#_R<28>
AMP_LEFT <28,29>
AMP_RIGHT <28,29>
SPKR+_R <28>
SPKL-_R <28>
PVDD1_AUDIO <28>
PVDD2_AUDIO <28>
PVSS2 <28>
SPKR-_R <28>
HDA_BITCLK_AUDIO <19,28>
HDA_SDIN0_AUDIO <28>
271_AVSS2 <28>
271_VREFO <28>
HP_RIGHT <28,29>
SPKL+_R <28>
CODEC_VREF <28>
HP_LEFT <28,29>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
AUDIO CODEC ALC271
Custom
30 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
AUDIO CODEC ALC271
Custom
30 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
AUDIO CODEC ALC271
Custom
30 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
39.2K
20K
10K
5.1K
SENSE A
10mil
AGND
10mil
HD Audio Codec
40mil
20mil
DGND
PORT-F (PIN 16, 17)
PORT-E (PIN 14, 15)
PORT-B (PIN 21, 22)
PORT-C (PIN 23, 24)
PORT-D (PIN 35, 36)
39.2K
20K
5.1K
10K
20mil
PORT-G (PIN 43, 44)
PORT-H (PIN 45, 46)
Codec SignalsImpedanceSense Pin
SENSE B
PORT-A (PIN 39, 41)
10mil
20mil
20mil
20mil
20mil
20mil
U92
ALC271X-GR QFN 48P CODEC
271@
U92
ALC271X-GR QFN 48P CODEC
271@
NC
14
NC
15
MIC2_R
17
MIC2_L
16
LINE1_L
23
LINE1_R
24
CD_L
18
CD_R
20
CD_GND
19
MIC1_L
21
MIC1_R
22
SENSE A
13
PCBEEP
12
LINE_OUT_L 35
LINE_OUT_R 36
MONO_OUT 37
RESET#
11
SYNC
10
BIT_CLK 6
SDATA_OUT
5
SDATA_IN 8
GPIO0
2
GPIO3
3
LINE1_VREFO 29
MIC2_VREFO 30
MIC1_VREFO_L 28
VREF 27
DVDD 1
DVDD_IO 9
AVDD1 25
AVDD2 38
MIC1_VREFO_R 32
DMIC_CLK 46
EAPD
47
SPDIFO
48
DVSS1
4
DVSS2
7
GPIO1 31
NC 33
SENSE B
34
NC 43
NC 44
NC 45
JDREF 40
AVSS1 26
AVSS2 42
HP_OUT_L 39
HP_OUT_R 41
KSO[0..15]
KSI[0..7]
EC_SMB_DA1
EC_SMB_CK1
EC_SMB_DA2
TP_DATA
TP_CLK SPI_CS#
SPI_SIFWR#SPI_SI FRD#SPI_SO
SPI_CLK
SPI_SO
FSEL#SPICS#
SPI_CLK_R
BRD_ID
EC_SMB_CK2
FSEL#SPICS#
EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
KSI5
KSO15
XCLKI
KSI3
EC_TX_P80_DATA
EC_SCI#
SPI_CLK
BRD_ID
KSO14
LPC_AD0
KSO9
SUSP#
XCLKO
ECAGND
BATT_OVP
KSI7
KSI6
KSO2
KSO0
LPC_AD2
LPC_AD3
EC_LID_OUT#
TP_DATA
USB_ON#
EC_SMI#
KSI0
EC_RST#
KSO13
KSO10
ACOFF
PM_SLP_S3#
ECAGND
EC_ON
SYSON
KSO1
BEEP#
KSO3
IREF
KSI4
KSI2
KSO12
KSO8
KSO6
EC_THERM#
TP_CLK
KSO5
FWR#SPI_SI
KSO7
LPC_AD1
EC_V18R
KSO11
KSO4
PM_SLP_S5#
EC_SMB_CK1
BATT_TEMP
KSI1
PBTN_OUT#
FRD#SPI_SO
SPI_CLK_R
PCH_POKICH_POK_EC
BATT_OVP
ACIN
BATT_TEMP
ENBKL
PCH_POK
FAN_SPEED1
PWR_LED#
BATT_AMB_LED#
BATT_GRN_LED#
CAPS_LED#
NUM_LED#
SPI_SI
SPI_CLK_R
SPI_SO
SPI_CS#
KSO1
KSO2
LID_SW#
PLTRST#
PWR_PWM_LED#
DGPU_HOLD_RST#
VGA_ENBKL
GMCH_ENBKL
ENBKL
FAN_PWM
DGPU_PWRGD
BT_LED#
VGA_DEEP_IDLE
TP_CLK
PWR_SUSP_LED#
ON/OFF#
EC_RX_P80_CLK
VGAPWRGD
HDMI_DETECT
DGPU_PWR_EN
SUSP#
VGAPWRGD
VR_ON
+3VALW
+EC_AVCC +3VALW
+3VALW +EC_AVCC
+3VALW
+3VALW
+3VS
+5VS
+3VALW
+3VS
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
GATEA20<18>
KB_RST#<18>
SERIRQ<18>
LPC_FRAME#<19>
LPC_AD3<19>
LPC_AD2<19>
LPC_AD1<19>
LPC_AD0<19>
PLTRST#<5,8,19,24,25,26>
CLK_PCI_LPC<13>
EC_SCI#<19>
KSO[0..15]<32>
KSI[0..7]<32>
EC_SMB_CK1<37>
EC_SMB_DA1<37>
EC_SMB_CK2<5,8,9>
EC_SMB_DA2<5,8,9>
PM_SLP_S3#<19>
PM_SLP_S5#<19>
EC_SMI#<19>
VGA_DEEP_IDLE<8>
INVT_PWM<5,14>
FAN_SPEED1<4>
EC_TX_P80_DATA<24>
EC_RX_P80_CLK<24>
ON/OFF#<22>
PWR_SUSP_LED#<21>
NUM_LED#<21>
PWR_PWM_LED# <22>
BEEP# <29>
FAN_PWM <4>
BATT_OVP
ADP_I <38>
ACOFF <38>
BATT_TEMP <37>
IREF <38>
CALIBRATE# <38>
EC_MUTE# <28,29>
USB_ON# <23>
BT_LED# <21>
TP_CLK <32>
TP_DATA <32>
DGPU_PWRGD <9,16>
LID_SW# <22>
WWAN_WAKEUP# <24>
FSTCHG <38>
BATT_GRN_LED# <21>
CAPS_LED# <21>
BATT_AMB_LED# <21>
PWR_LED# <21>
SYSON <34,40>
VR_ON <42>
ACIN <19,38>
EC_RSMRST# <19>
EC_LID_OUT# <19>
EC_ON <22>
DGPU_HOLD_RST# <8>
PCH_POK <5,19>
BKOFF# <14>
WL_OFF# <25>
WXMIT_OFF# <24>
BT_ON# <24>
PM_SLP_S4# <19>
EAPD <28>
EC_THERM# <19>
SUSP# <34,35,40,41,43>
PBTN_OUT# <19>
LAN_WAKE# <26>
VGATE <5,13,19,42>
VGA_ENBKL<8>
GMCH_ENBKL<5>
VGAPWRGD <43>
HDMI_DETECT<16>
DGPU_PWR_EN<8,13,35>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
KB926/BIOS
Custom
31 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
KB926/BIOS
Custom
31 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
KB926/BIOS
Custom
31 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
20mils
16M SPI ROM
ID
0
8.2K
18K
R01 (EVT)
33K
R03 (PVT)
0V
0.250V
0.503V
3.3V
R02 (DVT)
R10A (MP)
Rb Vab-Typ
BRD ID
0
1
2
3
BOARD ID Table
Ra 100K
Ra
Rb
20mil
Change to R_0402 05/14
Add 0 ohm R1309 06/08
For ESD
Change R1292 to 0 ohm for BRD ID R01 (EVT) 091015
Change BT_ON# from Pin98 to Pin108 06/24
VCC 3.3V
4
5
6
7
56K
100K
200K
NC
0.819V
1.185V
1.650V
2.200V
R01 (EVT)
R02 (DVT)
R03 (PVT)
R10A (MP)
NAVD0
NAVE0
Vab-Min Vab-Max
0V 0V
0.216V 0.289V
0.436V 0.538V
0.875V0.712V
1.036V 1.264V
1.453V 1.759V
1.935V 2.341V
2.500V 3.3V
091015 add HDMI_DETECT on Pin16
091022 add output pin FAN_PWM
091026 add VGA_DEEP_IDLE on Pin17
091022 add DGPU_PWRGD on Pin98
091022 add VGAPWRGD on Pin85, 20100104 delete WWAN_LED# on pin 85
091102 reserve C816 33P on TP_CLK
follow RF team review
091123 change SPI ROM to
SA00002TO00 (2MB)
091212 Add C22, C23, C24
to prevent switch noise
C22 near PR99
C23 near PR199
C24 near R800
091212 Add C36
to prevent switch noise
091212 Add C65
to prevent switch noise
20100104 delete WLAN_LED_R# on pin 16
20100104 delete WWAN_LED_R# on pin 19
20100104 delete WLAN_LED# on pin 38
100112 delete JP26 for EC debug port
20100115 change R1292 to 33K for Pre-MP phase
0104 Delete WWAN_LED_R#, WLAN_LED_R#, WWAN_LED#, WLAN_LED#
0118 Change R1292 200K P/N from SD028200300 to SD028200380
Change R1292 18K P/N from SD028180200 to SD028180280
C65 100P_0402_50V8J@C65 100P_0402_50V8J@
1 2
R1291
100K_0402_5%
R1291
100K_0402_5%
1 2
D30
RB751V-40TE17_SOD323-2
@
D30
RB751V-40TE17_SOD323-2
@
12
C24 100P_0402_50V8JC24 100P_0402_50V8J
1 2
R1308 2.2K_0402_5%R1308 2.2K_0402_5%
1 2
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
U6
KB926QFD3_LQFP128_14X14
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
U6
KB926QFD3_LQFP128_14X14
GA20/GPIO00
1
KBRST#/GPIO01
2
SERIRQ#
3
LFRAME#
4
LAD3
5
PM_SLP_S3#/GPIO04
6
LAD2
7
LAD1
8
VCC 9
LAD0
10
GND
11
PCICLK
12
PCIRST#/GPIO05
13
PM_SLP_S5#/GPIO07
14
EC_SMI#/GPIO08
15
LID_SW#/GPIO0A
16
SUSP#/GPIO0B
17
PBTN_OUT#/GPIO0C
18
EC_PME#/GPIO0D
19
SCI#/GPIO0E
20
INVT_PWM/PWM1/GPIO0F 21
VCC 22
BEEP#/PWM2/GPIO10 23
GND
24
EC_THERM#/GPIO11
25
FANPWM1/GPIO12 26
ACOFF/FANPWM2/GPIO13 27
FAN_SPEED1/FANFB1/GPIO14
28
FANFB2/GPIO15
29
EC_TX/GPIO16
30
EC_RX/GPIO17
31
ON_OFF/GPIO18
32
VCC 33
PWR_LED#/GPIO19
34
GND
35
NUMLED#/GPIO1A
36
ECRST#
37
CLKRUN#/GPIO1D
38
KSO0/GPIO20
39
KSO1/GPIO21
40
KSO2/GPIO22
41
KSO3/GPIO23
42
KSO4/GPIO24
43
KSO5/GPIO25
44
KSO6/GPIO26
45
KSO7/GPIO27
46
KSO8/GPIO28
47
KSO9/GPIO29
48
KSO10/GPIO2A
49
KSO11/GPIO2B
50
KSO12/GPIO2C
51
KSO13/GPIO2D
52
KSO14/GPIO2E
53
KSO15/GPIO2F
54
KSI0/GPIO30
55
KSI1/GPIO31
56
KSI2/GPIO32
57
KSI3/GPIO33
58
KSI4/GPIO34
59
KSI5/GPIO35
60
KSI6/GPIO36
61
KSI7/GPIO37
62
BATT_TEMP/AD0/GPIO38 63
BATT_OVP/AD1/GPIO39 64
ADP_I/AD2/GPIO3A 65
AD3/GPIO3B 66
AVCC 67
DAC_BRIG/DA0/GPIO3C 68
AGND
69
EN_DFAN1/DA1/GPIO3D 70
IREF/DA2/GPIO3E 71
DA3/GPIO3F 72
CIR_RX/GPIO40 73
CIR_RLC_TX/GPIO41 74
AD4/GPIO42 75
SELIO2#/AD5/GPIO43 76
SCL1/GPIO44
77
SDA1/GPIO45
78
SCL2/GPIO46
79
SDA2/GPIO47
80
KSO16/GPIO48
81
KSO17/GPIO49
82
PSCLK1/GPIO4A 83
PSDAT1/GPIO4B 84
PSCLK2/GPIO4C 85
PSDAT2/GPIO4D 86
TP_CLK/PSCLK3/GPIO4E 87
TP_DATA/PSDAT3/GPIO4F 88
FSTCHG/SELIO#/GPIO50 89
BATT_CHGI_LED#/GPIO52 90
CAPS_LED#/GPIO53 91
BATT_LOW_LED#/GPIO54 92
SUSP_LED#/GPIO55 93
GND
94
SYSON/GPIO56 95
VCC 96
SDICS#/GPXOA00 97
SDICLK/GPXOA01 98
SDIDO/GPXOA02 99
EC_RSMRST#/GPXO03 100
EC_LID_OUT#/GPXO04 101
EC_ON/GPXO05 102
EC_SWI#/GPXO06 103
ICH_PWROK/GPXO06 104
BKOFF#/GPXO08 105
WL_OFF#/GPXO09 106
GPXO10 107
GPXO11 108
SDIDI/GPXID0 109
PM_SLP_S4#/GPXID1 110
VCC 111
ENBKL/GPXID2 112
GND
113
GPXID3 114
GPXID4 115
GPXID5 116
GPXID6 117
GPXID7 118
SPIDI/RD# 119
SPIDO/WR# 120
VR_ON/XCLK32K/GPIO57 121
XCLK1
122
XCLK0
123 V18R 124
VCC 125
SPICLK/GPIO58 126
AC_IN/GPIO59 127
SPICS# 128
C816 33P_0402_50V8K
@
C816 33P_0402_50V8K
@
R1299 47K_0402_5%R1299 47K_0402_5%
1 2
C518
1000P_0402_50V7K
@
C518
1000P_0402_50V7K
@
1
2
C527
15P_0402_50V8J
C527
15P_0402_50V8J
R320
100K_0402_5%
R320
100K_0402_5%
1 2
R1295
0_0402_5%
R1295
0_0402_5%
1 2
C36 100P_0402_50V8JC36 100P_0402_50V8J
1 2
R1306 22_0402_5%R1306 22_0402_5%
12
R1301 4.7K_0402_5%R1301 4.7K_0402_5%
1 2
R1296 10K_0402_5%
@
R1296 10K_0402_5%
@
1 2
C520
0.1U_0402_16V4Z
C520
0.1U_0402_16V4Z 1
2
R1292
33K +-5% 0402
D0@
R1292
33K +-5% 0402
D0@
1 2
C23 100P_0402_50V8JC23 100P_0402_50V8J
1 2
D29
RB751V-40TE17_SOD323-2
@
D29
RB751V-40TE17_SOD323-2
@
1 2
R1297 2.2K_0402_5%R1297 2.2K_0402_5%
1 2
R1300 47K_0402_5%R1300 47K_0402_5%
1 2
R1298 2.2K_0402_5%R1298 2.2K_0402_5%
1 2
R1303 4.7K_0402_5%R1303 4.7K_0402_5%
1 2
U75
MX25L512AMC-12G_SO8
@
U75
MX25L512AMC-12G_SO8
@
CS#
1
SO 2
WP#
3
GND
4SI 5
SCLK 6
HOLD#
7
VCC 8
X1
32.768KHZ_12.5PF_Q13MC14610002
X1
32.768KHZ_12.5PF_Q13MC14610002
OSC 4
OSC 1
NC
3
NC
2
C531
100P_0402_50V8J
C531
100P_0402_50V8J
1 2
R1472
10K_0402_5%
R1472
10K_0402_5%
12
U76
MX25L1605AM2C-12G_SO8-200mil
U76
MX25L1605AM2C-12G_SO8-200mil
S
1
VCC
8
Q2
HOLD
7
VSS 4
D
5
C
6
W
3
C526
0.1U_0402_16V4Z
C526
0.1U_0402_16V4Z
1
2
C1178
470P_0402_50V7K
@
C1178
470P_0402_50V7K
@
1
2
C524
4.7U_0603_6.3V6K
C524
4.7U_0603_6.3V6K
1
2
C530
100P_0402_50V8J
C530
100P_0402_50V8J
1 2
R67 0_0402_5%R67 0_0402_5%
12
C515
0.1U_0402_16V4Z
C515
0.1U_0402_16V4Z
1
2
R1304 22_0402_5%R1304 22_0402_5%
12
C22 100P_0402_50V8JC22 100P_0402_50V8J
1 2
C523
0.1U_0402_16V4Z
C523
0.1U_0402_16V4Z 1
2
R1523 0_0402_5%
OPT@
R1523 0_0402_5%
OPT@
1 2
C516
0.1U_0402_16V4Z
C516
0.1U_0402_16V4Z
1
2
C529
100P_0402_50V8J
C529
100P_0402_50V8J
1 2
C525
15P_0402_50V8J
C525
15P_0402_50V8J
C517
0.1U_0402_16V4Z
C517
0.1U_0402_16V4Z
1
2
R1293 47K_0402_5%R1293 47K_0402_5%
12
R1309
0_0402_5% R1309
0_0402_5%
1 2
L16
MBK1608121YZF_0603
L16
MBK1608121YZF_0603
1 2
R1302 22_0402_5%R1302 22_0402_5%
12
R1522 0_0402_5%
DIS@
R1522 0_0402_5%
DIS@
1 2
R1288
0_0402_5%
R1288
0_0402_5%
12
R1307 2.2K_0402_5%R1307 2.2K_0402_5%
1 2
C519
1000P_0402_50V7K
C519
1000P_0402_50V7K
1
2
C1159
220P_0402_50V7K
C1159
220P_0402_50V7K
12
C514
0.1U_0402_16V4Z
C514
0.1U_0402_16V4Z
1
2
R41
10K_0402_5%
R41
10K_0402_5%
12
R1290 47K_0402_5%R1290 47K_0402_5%
1 2
R1305 22_0402_5%R1305 22_0402_5%
12
C1177 470P_0402_50V7K
@
C1177 470P_0402_50V7K
@1 2
C528
10P_0402_50V8J
C528
10P_0402_50V8J
12
C521
1000P_0402_50V7K
C521
1000P_0402_50V7K
1
2
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO[0..15]
KSI[0..7]
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2
KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1
KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
TP_CLK
TP_DATA
+5VS
KSI[0..7] <31>
KSO[0..15] <31>
TP_CLK<31>
TP_DATA<31>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
KB/SW/TP/LPC Debug CONN
B
32 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
KB/SW/TP/LPC Debug CONN
B
32 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
KB/SW/TP/LPC Debug CONN
B
32 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
INT_KBD Conn.
To TP/B Conn.
Update TP/B Conn 05/04
Chage JP11 Pin define & Add D22 05/14
0108 Change 24 caps BOM structure from @ to mount (EMI)
0111 Add C522 for JP11 pin1
C97 100P_0402_50V8JC97 100P_0402_50V8J
1 2
C102 100P_0402_50V8JC102 100P_0402_50V8J
1 2
D22
PJDLC05C_SOT23-3
D22
PJDLC05C_SOT23-3
2
3
1
C99 100P_0402_50V8JC99 100P_0402_50V8J
1 2
C131 100P_0402_50V8JC131 100P_0402_50V8J
1 2
C135 100P_0402_50V8JC135 100P_0402_50V8J
1 2
C127 100P_0402_50V8JC127 100P_0402_50V8J
1 2
C92 100P_0402_50V8JC92 100P_0402_50V8J
1 2
C95 100P_0402_50V8JC95 100P_0402_50V8J
1 2
C124 100P_0402_50V8JC124 100P_0402_50V8J
1 2
C114 100P_0402_50V8JC114 100P_0402_50V8J
1 2
C522
0.1U_0402_16V4Z
C522
0.1U_0402_16V4Z
1
2
C132 100P_0402_50V8JC132 100P_0402_50V8J
1 2
C104 100P_0402_50V8JC104 100P_0402_50V8J
1 2
C136 100P_0402_50V8JC136 100P_0402_50V8J
1 2
C103 100P_0402_50V8JC103 100P_0402_50V8J
1 2
C125 100P_0402_50V8JC125 100P_0402_50V8J
1 2
C134 100P_0402_50V8JC134 100P_0402_50V8J
1 2
C98 100P_0402_50V8JC98 100P_0402_50V8J
1 2
C126 100P_0402_50V8JC126 100P_0402_50V8J
1 2
C93 100P_0402_50V8JC93 100P_0402_50V8J
1 2
C113 100P_0402_50V8JC113 100P_0402_50V8J
1 2
C100 100P_0402_50V8JC100 100P_0402_50V8J
1 2
JP11
ACES_85201-0605N
CONN@
JP11
ACES_85201-0605N
CONN@
1
1
2
2
3
3
4
4
5
5
6
6GND 7
GND 8
C133 100P_0402_50V8JC133 100P_0402_50V8J
1 2
C101 100P_0402_50V8JC101 100P_0402_50V8J
1 2
C96 100P_0402_50V8JC96 100P_0402_50V8J
1 2
JKB1
ACES_85202-24051
CONN@
JKB1
ACES_85202-24051
CONN@
1
12
23
34
45
56
67
78
89
910
10 11
11 12
12 13
13 14
14 15
15 16
16 17
17 18
18 19
19 20
20 21
21 22
22 23
23 24
24 G1
25 G2
26
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Screw
B
33 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Screw
B
33 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
Screw
B
33 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
H_2P8
FIDUCIAL_C40M80
H_2P6
091028 Modify Hole location by 1127_NAVD0_NEW_MB_ASSY_FOR_2865_v11
H_3P0N
H_8P7X5P8N
H_3P8N
H_3P2N
H_3P2
H_3P4X3P2N
20100201 change H4 from H_3P2N to H_3P2
H7
H
@
H7
H
@
1
H11
H
@
H11
H
@
1
H23
H
@
H23
H
@
1
H12
H
@
H12
H
@
1
FM3
@
FM3
@
1
H22
H
@
H22
H
@
1
FM2
@
FM2
@
1
H6
H
@
H6
H
@
1
FM1
@
FM1
@
1
H10
H
@
H10
H
@
1
H9
H
@
H9
H
@
1
H24
H
@
H24
H
@
1
H14
H
@
H14
H
@
1
H20
H
@
H20
H
@
1
H5
H
@
H5
H
@
1
H2
H
@
H2
H
@
1
H19
H
@
H19
H
@
1
H13
H
@
H13
H
@
1
H4
H
@
H4
H
@
1
H16
H
@
H16
H
@
1
H17
H
@
H17
H
@
1
H25
H
@
H25
H
@
1
H21
H
@
H21
H
@
1
H1
H
@
H1
H
@
1
H8
H
@
H8
H
@
1
H18
H
@
H18
H
@
1
FM4
@
FM4
@
1
H3
H
@
H3
H
@
1
hexainf@hotmail.com
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSP
SUSP
SUSP
5VS_GATE
SUSP
SUSP
SYSON#
1.8VS_GATE
SUSP
SUSP
SYSON#SUSP SUSP
SYSON
SUSP
VL
+5VALW
+5VALW
+3VALW
+3VS
+VSB
+5VS
+1.5VS +1.8V+0.9VS
+3VLP
+VCCP
+1.8V
+VSB
+1.8VS
+VSB
+5VS
+VCCP +0.89VS +1.8V
+1.8V
+0.9VS
SYSON<31,40>
SUSP<41>
SUSP#<31,35,40,41,43>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
DC INTERFACE
B
34 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
DC INTERFACE
B
34 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
DC INTERFACE
B
34 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
+3VALW TO +3VS+5VALW TO +5VS
+1.8V to +1.8VS
ADD +5VS +VCCP +0.89VS Cap for EMI
091019 remove 10U*2
091019 remove 10U*2
091019 remove 10U*2
091113 change Q19 P/N to SB564020020
091113 change Q27 P/N to SB564020020
100112 change Q47 P/N from SB00000AR00 to SB00000DH00
100112 change Q47 P/N from SB00000AR00 to SB00000DH00
100112 change Q47 P/N from SB00000AR00 to SB00000DH00
100112 change Q47 P/N from SB00000AR00 to SB00000DH00
Q6B
2N7002DW-T/R7_SOT363-6
@
Q6B
2N7002DW-T/R7_SOT363-6
@
3
5
4
R317
470_0402_5%
R317
470_0402_5%
1 2
Q12A
2N7002DW-T/R7_SOT363-6
Q12A
2N7002DW-T/R7_SOT363-6
61
2
Q12B
2N7002DW-T/R7_SOT363-6
Q12B
2N7002DW-T/R7_SOT363-6
3
5
4
R318
200K +-1% 0402
R318
200K +-1% 0402
R831
10K_0402_5%
R831
10K_0402_5%
Q19SI4800BDY-T1-E3_SO8 Q19SI4800BDY-T1-E3_SO8
36
5
7
8
2
4
1
C396
0.1U 25V K X5R 0402
C396
0.1U 25V K X5R 0402
1
2
R114
470_0402_5%
R114
470_0402_5%
1 2
R139
33K +-5% 0402
R139
33K +-5% 0402
1 2
Q17A
2N7002DW-T/R7_SOT363-6
Q17A
2N7002DW-T/R7_SOT363-6
61
2
R190
470_0402_5%
R190
470_0402_5%
1 2
R57
470_0402_5%
@R57
470_0402_5%
@
1 2
C1176
0.01U_0402_25V7K
@C1176
0.01U_0402_25V7K
@1
2
C1174
0.01U_0402_25V7K
@C1174
0.01U_0402_25V7K
@1
2
Q6A
2N7002DW-T/R7_SOT363-6@
Q6A
2N7002DW-T/R7_SOT363-6@
61
2
C176
1U_0603_10V4Z
C176
1U_0603_10V4Z
1
2
Q17B
2N7002DW-T/R7_SOT363-6
Q17B
2N7002DW-T/R7_SOT363-6
3
5
4
R70
470_0402_5%
@R70
470_0402_5%
@
1 2
Q8A
2N7002DW-T/R7_SOT363-6
@
Q8A
2N7002DW-T/R7_SOT363-6
@
61
2
C1173
0.01U_0402_25V7K
@C1173
0.01U_0402_25V7K
@1
2
C208
0.1U 25V K X5R 0402
C208
0.1U 25V K X5R 0402
1
2
R830
10K_0402_5%
R830
10K_0402_5%
C179
0.1U 25V K X5R 0402
C179
0.1U 25V K X5R 0402
1
2
Q14B
2N7002DW-T/R7_SOT363-6
Q14B
2N7002DW-T/R7_SOT363-6
3
5
4
C219
1U_0603_10V4Z
C219
1U_0603_10V4Z
1
2
Q28A
2N7002DW-T/R7_SOT363-6
Q28A
2N7002DW-T/R7_SOT363-6
61
2
Q8B
2N7002DW-T/R7_SOT363-6
@
Q8B
2N7002DW-T/R7_SOT363-6
@
3
5
4
R63
470_0402_5%
@R63
470_0402_5%
@
1 2
R51
470_0402_5%
@R51
470_0402_5%
@
1 2
Q28B
2N7002DW-T/R7_SOT363-6
Q28B
2N7002DW-T/R7_SOT363-6
3
5
4
S
G
D
Q27
SI3456BDV-T1-E3 1N TSOP6
S
G
D
Q27
SI3456BDV-T1-E3 1N TSOP6
3
6
2
45
1C395
1U_0603_10V4Z
C395
1U_0603_10V4Z
1
2
R141
100K_0402_5%
R141
100K_0402_5%
1 2
Q15SI4800BDY-T1-E3_SO8 Q15SI4800BDY-T1-E3_SO8
36
5
7
8
2
4
1
C1172
0.01U_0402_25V7K
@C1172
0.01U_0402_25V7K
@1
2
C1175
0.01U_0402_25V7K
@C1175
0.01U_0402_25V7K
@1
2
R173
100K_0402_5%
R173
100K_0402_5%
1 2
R172
100K_0402_5%
@
R172
100K_0402_5%
@
1 2
R187
22K +-5% 0402
R187
22K +-5% 0402
1 2
Q14A
2N7002DW-T/R7_SOT363-6
Q14A
2N7002DW-T/R7_SOT363-6
61
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_ON#
VGA_ON
VGA_ON#
1.5VSDGPU_GATE
VGA_ON#
VGA_ON#
VGA_ON#
VGA_ON#
VGA_ON#
1.05VSDGPU_GATE
+3VSDGPU_GATE
+1.8VSDGPU_GATE
VGA_ON
+3VS
+3VSDGPU
+1.5VS
+VSB
+1.5VSDGPU
+1.8VS
+1.8VSDGPU
+5VALW
+VCCP
+VSB
+1.05VSDGPU
DGPU_PWR_EN<8,13,31>
SUSP#<31,34,40,41,43>
VGA_ON<43>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
VGA DC INTERFACE
Custom
35 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
VGA DC INTERFACE
Custom
35 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
VGA DC INTERFACE
Custom
35 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
+3VS to +3VSDGPU Transfer
50mil(1140mA)
+1.5VS to +1.5VSDGPU Transfer
20mil(300mA)
+1.8VS to +1.8VSDGPU Transfer
+VCCP to +1.05VSDGPU Transfer
091113 change Q48 P/N to SB564020020
091113 change Q60 P/N to SB564020020
091212 Add C25
to prevent switch noise
091216 change value of R1510 to 200Kohm
100112 change Q50 P/N from SB00000AR00 to SB00000DH00
100112 change Q55 P/N from SB00000AR00 to SB00000DH00
0111 Change BOM Structure of C1302/C803/C1303/C801/C1294 from OPT@ to VGA@
0223 change R1507 from 0ohm to 33k
0301 change C802 P/N from SE070104Z80 to SE102104K00
0301 change C800 P/N from SE070104Z80 to SE102104K00
Q50B
2N7002DW-T/R7_SOT363-6
VGA@
Q50B
2N7002DW-T/R7_SOT363-6
VGA@
3
5
4
C803
4.7U_0603_6.3V6K
VGA@
C803
4.7U_0603_6.3V6K
VGA@
1
2
C1294
1U_0603_10V4Z
VGA@
C1294
1U_0603_10V4Z
VGA@
1
2
R1497
22K_0402_5%
VGA@
R1497
22K_0402_5%
VGA@
12
R1507 33K +-5% 0402
OPT@
R1507 33K +-5% 0402
OPT@
1 2
R1527 0_0402_5%
OPT@
R1527 0_0402_5%
OPT@
1 2
R716
470_0402_5%
VGA@
R716
470_0402_5%
VGA@
1 2
J10
JUMP_43X118
@
J10
JUMP_43X118
@
11
2
2
R722 0_0402_5%
VGA@
R722 0_0402_5%
VGA@
1 2
R1481 0_0402_5%
OPT@
R1481 0_0402_5%
OPT@
1 2
R721 0_0402_5%
VGA@
R721 0_0402_5%
VGA@
1 2
S
G
D
Q48
SI3456BDV-T1-E3 1N TSOP6
VGA@
S
G
D
Q48
SI3456BDV-T1-E3 1N TSOP6
VGA@
3
6
2
45
1
J8
JUMP_43X79
DIS@
J8
JUMP_43X79
DIS@
11
2
2
C1302
0.1U_0402_16V4Z
VGA@
C1302
0.1U_0402_16V4Z
VGA@
1
2
Q50A
2N7002DW-T/R7_SOT363-6
VGA@
Q50A
2N7002DW-T/R7_SOT363-6
VGA@
61
2
R1479
470_0402_5%
OPT@
R1479
470_0402_5%
OPT@
1 2
J11
JUMP_43X39
DIS@
J11
JUMP_43X39
DIS@
11
2
2
C1303
0.1U_0402_16V4Z
VGA@
C1303
0.1U_0402_16V4Z
VGA@
1
2
R1508
470_0603_5%
OPT@
R1508
470_0603_5%
OPT@
12
G
D
S
Q69
SSM3K7002FU_SC70-3
OPT@
G
D
S
Q69
SSM3K7002FU_SC70-3
OPT@
2
13
S
G
D
Q60
SI3456BDV-T1-E3 1N TSOP6
OPT@
S
G
D
Q60
SI3456BDV-T1-E3 1N TSOP6
OPT@
3
6
2
45
1
C1296
0.1U 25V K X5R 0402
OPT@
C1296
0.1U 25V K X5R 0402
OPT@
1
2
C25 100P_0402_50V8J@C25 100P_0402_50V8J@
1 2
R1510 200K +-1% 0402
OPT@
R1510 200K +-1% 0402
OPT@
R1485 0_0402_5%
OPT@
R1485 0_0402_5%
OPT@
1 2
G
D
S
Q68
AO3413_SOT23-3
OPT@
G
D
S
Q68
AO3413_SOT23-3
OPT@
2
1 3
R1511
470_0603_5%
OPT@
R1511
470_0603_5%
OPT@
12
R715
200K +-1% 0402
VGA@
R715
200K +-1% 0402
VGA@
Q55A
2N7002DW-T/R7_SOT363-6
OPT@
Q55A
2N7002DW-T/R7_SOT363-6
OPT@
61
2
G
D
S
Q66
SSM3K7002FU_SC70-3
VGA@
G
D
S
Q66
SSM3K7002FU_SC70-3
VGA@
2
13
C769
0.1U 25V K X5R 0402
VGA@
C769
0.1U 25V K X5R 0402
VGA@
1
2
R1483
200K +-1% 0402
OPT@
R1483
200K +-1% 0402
OPT@
R800 0_0402_5%
DIS@
R800 0_0402_5%
DIS@
1 2
G
D
S
Q70
AO3413_SOT23-3
OPT@
G
D
S
Q70
AO3413_SOT23-3
OPT@
2
1 3
J9
JUMP_43X118
DIS@
J9
JUMP_43X118
DIS@
11
2
2
Q55B
2N7002DW-T/R7_SOT363-6
OPT@
Q55B
2N7002DW-T/R7_SOT363-6
OPT@
3
5
4
C768
1U_0603_10V4Z
VGA@
C768
1U_0603_10V4Z
VGA@
1
2
C801
4.7U_0603_6.3V6K
VGA@
C801
4.7U_0603_6.3V6K
VGA@
1
2
G
D
S
Q71
SSM3K7002FU_SC70-3
OPT@
G
D
S
Q71
SSM3K7002FU_SC70-3
OPT@
2
13
C800
0.1U_0402_10V7K
OPT@
C800
0.1U_0402_10V7K
OPT@
R1496
100K_0402_5%
VGA@
R1496
100K_0402_5%
VGA@
1 2
C802
0.1U_0402_10V7K
OPT@
C802
0.1U_0402_10V7K
OPT@
hexainf@hotmail.com
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
N1
+RTCBATT
DC_IN_S1
VIN
VS
BATT+
+RTCBATT
VIN
VGA_CORE
VGA_COREP
+1.5VS+1.5VSP +0.9VSP +0.9VS
+3VALWP +3VALW +5VALWP +5VALW
+1.8V+1.8VP
+0.89VSP +0.89VS
+VCCP
+VCCPP
+CHGRTC +3VLP
51ON#<22>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
DCIN/DECTOR
Custom
36 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
DCIN/DECTOR
Custom
36 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
DCIN/DECTOR
Custom
36 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
+
SP02000GC00
-
PD3
RLS4148_LL34-2
PD3
RLS4148_LL34-2
12
PJ5
JUMP_43X79
PJ5
JUMP_43X79
11
2
2
PR10
68_1206_5%
PR10
68_1206_5%
12
PC5
100P_0402_50V8J
PC5
100P_0402_50V8J
12
PR17
560_0603_5%
PR17
560_0603_5%
1 2
PJ3
JUMP_43X118
PJ3
JUMP_43X118
11
2
2
PJ6
JUMP_43X118
PJ6
JUMP_43X118
11
2
2
PC13
0.22U_0603_25V7K
PC13
0.22U_0603_25V7K
12
PBJ1
MAXEL_ML1220T10
@PBJ1
MAXEL_ML1220T10
@
12
PJ7
JUMP_43X118
PJ7
JUMP_43X118
11
2
2
PJ9
JUMP_43X79
PJ9
JUMP_43X79
11
2
2
PL1
HCB2012KF-121T50_0805
PL1
HCB2012KF-121T50_0805
1 2
PC3
1000P_0402_50V7K
PC3
1000P_0402_50V7K
12
PJ1
JUMP_43X118
PJ1
JUMP_43X118
11
2
2
PR14
22K_0402_1%
PR14
22K_0402_1%
1 2
PQ1
TP0610K-T1-E3_SOT23-3
PQ1
TP0610K-T1-E3_SOT23-3
2
13
PC14
0.1U_0402_25V6
PC14
0.1U_0402_25V6
12
PJ4
JUMP_43X118
PJ4
JUMP_43X118
11
2
2
PR11
68_1206_5%
PR11
68_1206_5%
12
PR13
100K_0402_1%
PR13
100K_0402_1%
12
PC6
1000P_0402_50V7K
PC6
1000P_0402_50V7K
12
PR16
560_0603_5%
PR16
560_0603_5%
1 2
PD2
RLS4148_LL34-2
PD2
RLS4148_LL34-2
1 2
PJ2
JUMP_43X118
PJ2
JUMP_43X118
11
2
2
PJP1
ACES 88266-04001
CONN@
PJP1
ACES 88266-04001
CONN@
11
22
33
44
GND
5GND
6
PC4
100P_0402_50V8J
PC4
100P_0402_50V8J
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
EC_SMCA
VMB
TS
EC_SMDA
B/I
BATT+
VMB
B+ +VSB
VL
+3VALW P
VL
VL
BATT_TEMP <31>
EC_SMB_CK1 <31>
EC_SMB_DA1 <31>
MAINPW ON <39>
SPOK<39>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
BATTERY CONN / OTP
Custom
37 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
BATTERY CONN / OTP
Custom
37 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
BATTERY CONN / OTP
Custom
37 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Recovery at 70 degree C
CPU thermal protection at 92 degree C
PH1 under CPU botten side :
PR220
1K_0402_5%
PR220
1K_0402_5%
12
PL2
HCB2012KF-121T50_0805
PL2
HCB2012KF-121T50_0805
1 2
PR29
10K_0402_1%
PR29
10K_0402_1%
1 2
PR236
0_0805_5%
@PR236
0_0805_5%
@
1 2
PR169
47K_0402_1%@
PR169
47K_0402_1%@
1 2
PC22
0.01U_0402_25V7K
PC22
0.01U_0402_25V7K
12
PU3
G718TM1U_SOT23-8
PU3
G718TM1U_SOT23-8
RHYST2 5
OT1
3
OT2
4
GND
2
VCC
1
TMSNS2 6
RHYST1 7
TMSNS1 8
PC200
0.1U_0402_25V6
PC200
0.1U_0402_25V6
12
PR21
100_0402_1%
PR21
100_0402_1%
1 2
PR31
13K_0402_1%
PR31
13K_0402_1%
1 2
PC21
1000P_0402_50V7K
PC21
1000P_0402_50V7K
12
PR32
22K_0402_1%
PR32
22K_0402_1%
1 2
PR23
100K_0402_1%
@PR23
100K_0402_1%
@
1 2
PR25
6.49K_0402_1%
PR25
6.49K_0402_1%
12
PR28
21K_0402_1%
PR28
21K_0402_1%
12
PH1
100K_0402_1%_NCP15W F104F03RC
PH1
100K_0402_1%_NCP15W F104F03RC
12
PQ3
TP0610K-T1-E3_SOT23-3
PQ3
TP0610K-T1-E3_SOT23-3
2
13
PR27
1K_0402_1%
PR27
1K_0402_1%
12
PC23
0.1U_0603_25V7K
PC23
0.1U_0603_25V7K
12
G
D
S
PQ4
2N7002W -T/R7_SOT323-3
G
D
S
PQ4
2N7002W -T/R7_SOT323-3
2
13
PR22
100_0402_1%
PR22
100_0402_1%
1 2
PR34
100K_0402_1%
PR34
100K_0402_1%
1 2
PR30
100K_0402_1%
PR30
100K_0402_1%
12
PH2
100K_0402_1%_NCP15W F104F03RC
@
PH2
100K_0402_1%_NCP15W F104F03RC
@
12
PJP2
SUYIN_200275MR008G15QZR
@
PJP2
SUYIN_200275MR008G15QZR
@
11
33
44
55
66
88
22
77
GND 9
GND 10
hexainf@hotmail.com
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
CHGCHG
ACOFFACOFF
6251_EN CSON
ACOFF
6251VDD
6251VDD
6251VREF
CSOP
6251VREF
DCIN
PACIN
BST_CHG
PACIN
6251aclim
DH_CHG
CSIP
DL_CHG
CSIN
LX_CHG
6251VDDP
BST_CHGA
ACPRN
PACIN
ACSETIN
DCIN
ACSETIN
ACPRN
VIN
VIN
BATT+
P2 P3
B+
CHG_B+
VIN
B+
6251VDD
VIN
ACOFF<31>
CALIBRATE#<31>
IREF<31>
FSTCHG<31>
ADP_I<31>
ACIN <19,31>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CHARGER
Custom
38 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CHARGER
Custom
38 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CHARGER
Custom
38 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
VADJ-->VREF-->4.41V
3.24V==>2A
Iada=0~1.58A(30W)
CP = 85%*Iada ; CP = 1.343A
BATT Type
Charging Voltage
(0x15)
Normal 3S LI-ON Cells
12600mV
CC=0.3~1.76A
IREF=0.486V~2.85V
IREF=1.62*Icharge
CV mode
12.60V
Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05)=1.343A
CP mode
Vaclim=2.39*(4.99K/(20K+4.99K))=1.876V
VADJ--->Ground--->3.99V
Vcell=(0.175*VADJ+3.99)
PR65
10K_0402_5%
PR65
10K_0402_5%
12
PR78
0_0603_5%
PR78
0_0603_5%
1 2
PR70
20_0402_5%
PR70
20_0402_5%
12
PR68
20_0402_5%
PR68
20_0402_5%
1 2
PC62
0.1U_0603_25V7K
PC62
0.1U_0603_25V7K
1 2
PC71
4.7U_0805_25V6-K
PC71
4.7U_0805_25V6-K
1 2
PR71 6.81K_0402_1%PR71 6.81K_0402_1%
1 2
PQ10
SI7121DN-T1-GE3_POWERPAK8-5
PQ10
SI7121DN-T1-GE3_POWERPAK8-5
3 5
2
4
1
PL5
10UH_PCMB062D-100MS_2.5A_20%
PL5
10UH_PCMB062D-100MS_2.5A_20%
1 2
PC65
0.1U_0603_25V7K
PC65
0.1U_0603_25V7K
12
PR77
62K_0402_1%
PR77
62K_0402_1%
12
PR59
47K_0402_1%
PR59
47K_0402_1%
12
PC68
10U_1206_25V6M
PC68
10U_1206_25V6M
12
PD9
B340A_SMA2
PD9
B340A_SMA2
12
PR57 0.05_1206_1%PR57 0.05_1206_1%
1
3
4
2
G
D
S
PQ17
2N7002W -T/R7_SOT323-3
G
D
S
PQ17
2N7002W -T/R7_SOT323-3
2
13
PR82
4.7_0603_5%
PR82
4.7_0603_5%
1 2
PR85
31.6K_0402_1%
PR85
31.6K_0402_1%
1 2
PD12
1SS355TE-17_SOD323-2
@PD12
1SS355TE-17_SOD323-2
@
1 2
PD4
RB751V-40_SOD323-2
PD4
RB751V-40_SOD323-2
1 2
PC58
0.1U_0603_25V7K
PC58
0.1U_0603_25V7K
12
PR79
38.3K_0402_1%
PR79
38.3K_0402_1%
1 2
PC67
10U_1206_25V6M
PC67
10U_1206_25V6M
12
PC57
0.1U_0603_25V7K
PC57
0.1U_0603_25V7K
12
PR58
47K_0402_1%
PR58
47K_0402_1%
1 2
PQ16
DTC115EUA_SC70-3
PQ16
DTC115EUA_SC70-3
2
13
PC51
0.1U_0603_25V7K
PC51
0.1U_0603_25V7K
12
PR74 0.05_1206_1%PR74 0.05_1206_1%
1
3
4
2
PC165
0.1U_0603_25V7K
PC165
0.1U_0603_25V7K
12
PQ12
DTA144EUA_SC70-3
PQ12
DTA144EUA_SC70-3
2
1 3
PQ21
AON7408L_DFN8-5
PQ21
AON7408L_DFN8-5
4
5
1
2
3
PD10
1SS355TE-17_SOD323-2
PD10
1SS355TE-17_SOD323-2
1 2
PR227
20K_0402_1%
PR227
20K_0402_1%
12
PD13
1SS355TE-17_SOD323-2
PD13
1SS355TE-17_SOD323-2
1 2
PC61
0.01U_0402_25V7K
PC61
0.01U_0402_25V7K
1 2
PR221
191K_0402_1%
PR221
191K_0402_1%
12
PC214
1000P_0402_25V8J
PC214
1000P_0402_25V8J
12
PR222
10_1206_5%
PR222
10_1206_5%
12
PC53
4.7U_0805_25V6-K
PC53
4.7U_0805_25V6-K
12
PC69
0.01U_0402_25V7K
PC69
0.01U_0402_25V7K
12
PC70
4.7U_0805_6.3V6K
PC70
4.7U_0805_6.3V6K
1 2
PR80
100K_0402_1%
PR80
100K_0402_1%
12
PQ22
DTC115EUA_SC70-3
PQ22
DTC115EUA_SC70-3
2
13
PC66
680P_0402_50V7K
PC66
680P_0402_50V7K
12
PR224
10K_0402_1%
PR224
10K_0402_1%
1 2
PR60
200K_0402_1%
PR60
200K_0402_1%
12
PR226
10K_0402_1%
PR226
10K_0402_1%
12
PD14
RB751V-40_SOD323-2
PD14
RB751V-40_SOD323-2
12
PC63
100P_0402_50V8J@
PC63
100P_0402_50V8J@
1 2
PC56
.1U_0402_16V7K
@
PC56
.1U_0402_16V7K
@
1 2
PR73
100_0402_1%
PR73
100_0402_1%
1 2
PC52
5600P_0402_25V7K
PC52
5600P_0402_25V7K
1 2
G
D
S
PQ18
2N7002W -T/R7_SOT323-3
G
D
S
PQ18
2N7002W -T/R7_SOT323-3
2
13
PQ15
DTC115EUA_SC70-3
PQ15
DTC115EUA_SC70-3
2
13
PC55
2.2U_0603_6.3V6K
PC55
2.2U_0603_6.3V6K
12
PR81
20K_0402_1%
PR81
20K_0402_1%
12
PC59
0.047U_0603_16V7K
PC59
0.047U_0603_16V7K
1 2
PR69
20_0402_5%
PR69
20_0402_5%
1 2
PC50
4.7U_0805_25V6-K
PC50
4.7U_0805_25V6-K
12
PQ11
SI7121DN-T1-GE3_POWERPAK8-5
PQ11
SI7121DN-T1-GE3_POWERPAK8-5
3 5
2
4
1
PR76
4.7_1206_5%
PR76
4.7_1206_5%
12
PR66
150K_0402_1%
PR66
150K_0402_1%
12
PC54
2200P_0402_25V7K
PC54
2200P_0402_25V7K
12
G
D
S
PQ20
2N7002W -T/R7_SOT323-3
G
D
S
PQ20
2N7002W -T/R7_SOT323-3
2
13
PC64
.1U_0402_16V7K
PC64
.1U_0402_16V7K
1 2
G
D
S
PQ36
2N7002W -T/R7_SOT323-3
G
D
S
PQ36
2N7002W -T/R7_SOT323-3
2
13
PR75
22K_0402_5%
PR75
22K_0402_5%
1 2
PU5
ISL6251AHAZ-T_QSOP24
PU5
ISL6251AHAZ-T_QSOP24
EN
3
CELLS
4
VDD
1
ACSET
2
ICOMP
5
VCOMP
6
CHLIM
9
ACPRN 23
CSIP 19
UGATE 17
PHASE 18
BOOT 16
PGND 13
GND
12
ICM
7
VREF
8
VADJ
11
DCIN 24
CSIN 20
ACLIM
10
LGATE 14
VDDP 15
CSOP 21
CSON 22
PR223
14.3K_0402_1%
PR223
14.3K_0402_1%
12
PR83
15.4K_0402_1%
PR83
15.4K_0402_1%
1 2
PR64
200K_0402_1%
PR64
200K_0402_1%
1 2
PR62
10K_0402_1%
PR62
10K_0402_1%
1 2
PR72
2_0402_5%
PR72
2_0402_5%
1 2
PQ19
AON7408L_DFN8-5
PQ19
AON7408L_DFN8-5
4
5
1
2
3
PJ8
JUMP_43X118
@PJ8
JUMP_43X118
@
11
2
2
PC60 6800P_0402_25V7KPC60 6800P_0402_25V7K
1 2
PR225
100K_0402_1%
PR225
100K_0402_1%
12
PR67
100K_0402_1%
PR67
100K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_5V
UG_3V
LX_5V
LG_3V
LX_3V
UG_5V
BST_3V
ENTRIP2
LG_5V
ENTRIP1
ENTRIP1
ENTRIP2
+3VALWP +5VALWP
B+
+3VLP
VL
2VREF_51125
VS
VL
B+
B++ B++
B++
2VREF_51125
SPOK <37>
MAINPWON<37>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
3V/5V
Custom
39 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
3V/5V
Custom
39 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NAVD0 LA-6091P
1.0
3V/5V
Custom
39 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
VFB=2.0V
+5VALWP Ipeak=3.86A Imax=2.7A Vo=5.14v
Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
Vtrip=(10E-06 * 158K)/9-24mV=151mV
Ilimit=151mV/17.9m ~151mV/14.5m x 1.2
=8.467A ~ 8.710A
Iocp=Ilimit+Delta I/2
=9.384A ~ 9.627A
Delta I=1.834A (Freq=245KHz)
+3.3VALWP Ipeak=6.42A=(5.82+0.6)A Imax=4.5A Vo=3.3V
Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
Vtrip=(10E-06 * 143K)/9-24mV=156mV
Ilimit=156/(14.5~14.5*1.2)=10.76~7.26 A
Iocp=Ilimit+Delta I/2
=11.3~7.81A
Delta I=1.090A (Freq=305KHz)
+
PC39
150U_B2_6.3VM_R45M
+
PC39
150U_B2_6.3VM_R45M
1
2
PC40
0.1U_0402_16V7K
PC40
0.1U_0402_16V7K
1 2
PL11
HCB2012KF-121T50_0805
PL11
HCB2012KF-121T50_0805
1 2
PR235
40.2K_0402_1%
PR235
40.2K_0402_1%
12
PU4
TPS51125RGER_QFN24_4X4
PU4
TPS51125RGER_QFN24_4X4
VREF 3
TONSEL 4
ENTRIP1 1
VFB1 2
VFB2 5
ENTRIP2 6
VREG3
8
DRVL1 19
VREG5
17
GND
15
VBST1 22
VIN
16
SKIPSEL
14
DRVL2
12
LL2
11
VO2
7
DRVH2
10 DRVH1 21
PGOOD 23
LL1 20
VCLK
18
VBST2
9
VO1 24
EN0
13
P PAD
25
PR44
19.1K_0402_1%
PR44
19.1K_0402_1%
1 2
PC34
2200P_0402_50V7K
PC34
2200P_0402_50V7K
12
PR42
30K_0402_1%
PR42
30K_0402_1%
1 2
PC212
0.1U_0603_25V7K
PC212
0.1U_0603_25V7K
12
PQ5
AON7408L_DFN8-5
PQ5
AON7408L_DFN8-5
3 5
2
4
1
PQ35
DTC115EUA_SC70-3
PQ35
DTC115EUA_SC70-3
2
13
PR233
100K_0402_1%
PR233
100K_0402_1%
12
PC36
10U_1206_25V6M
PC36
10U_1206_25V6M
12
PR41
12.7K_0402_1%
PR41
12.7K_0402_1%
1 2
PR43
18.7K_0402_1%
PR43
18.7K_0402_1%
1 2
PL3
8.2UH 20% FMJ-0630T-8R2A HF 4.5A
PL3
8.2UH 20% FMJ-0630T-8R2A HF 4.5A
1 2
PC42
680P_0402_50V7K
PC42
680P_0402_50V7K
12
PQ7
IRFH3707TRPBF_PQFN8-3
PQ7
IRFH3707TRPBF_PQFN8-3
2
1
3
PC43
680P_0402_50V7K
PC43
680P_0402_50V7K
12
PC202
0.22U_0603_10V7K
PC202
0.22U_0603_10V7K
12
PR228
162K_0402_1%
PR228
162K_0402_1%
1 2
PC203
4.7U_0805_10V6K
PC203
4.7U_0805_10V6K
12
PC41
0.1U_0402_16V7K
PC41
0.1U_0402_16V7K
1 2
PC205
4.7U_0805_10V6K
PC205
4.7U_0805_10V6K
12
PR230
499K_0402_1%
PR230
499K_0402_1%
1 2
PC31
2200P_0402_50V7K
PC31
2200P_0402_50V7K
12
PC204
1U_0603_10V6K
PC204
1U_0603_10V6K
12
PR229
158K_0402_1%
PR229
158K_0402_1%
1 2
PC32
10U_1206_25V6M
PC32
10U_1206_25V6M
12
PQ8
IRFH3707TRPBF_PQFN8-3
PQ8
IRFH3707TRPBF_PQFN8-3
2
1
3
PR40
0_0603_5%
PR40
0_0603_5%
1 2
PR39
0_0603_5%
PR39
0_0603_5%
1 2
PR234
100K_0402_1%
PR234
100K_0402_1%
1 2
PC213
0.01U_0402_16V7K
@PC213
0.01U_0402_16V7K
@
12
PR231
0_0402_5%@
PR231
0_0402_5%@
1 2
PL4
8.2UH 20% FMJ-0630T-8R2A HF 4.5A
PL4
8.2UH 20% FMJ-0630T-8R2A HF 4.5A
1 2
+
PC44
150U_B2_6.3VM_R45M
+
PC44
150U_B2_6.3VM_R45M
1
2
PR38
4.7_1206_5%
PR38
4.7_1206_5%
12
G
D
S
PQ34
2N7002W-T/R7_SOT323-3
G
D
S
PQ34
2N7002W-T/R7_SOT323-3
2
13
PR37
4.7_1206_5%
PR37
4.7_1206_5%
12
PR232
100K_0402_1%
PR232
100K_0402_1%
12
PQ6
AON7408L_DFN8-5
PQ6
AON7408L_DFN8-5
3 5
2
4
1
G
D
S
PQ33
2N7002W-T/R7_SOT323-3
G
D
S
PQ33
2N7002W-T/R7_SOT323-3
2
13
hexainf@hotmail.com
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
BST_1.8V
DL_1.8V
LX_1.8V
DH_1.8V
BST_1.8V-1
BST_1.05V
DL_1.05V
LX_1.05V
DH_1.05V
BST_1.05V-1
1.8V_B+
+VCCP_B+
1.8V_B+
+5VALW
+1.8VP
+5VALW
B+
+5VALW
+5VALW
+VCCPP
B+
SYSON<31,34>
SUSP#<31,34,35,41,43>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
VCCPP/1.8VP
Custom
40 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
VCCPP/1.8VP
Custom
40 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
VCCPP/1.8VP
Custom
40 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
<Vo=1.052V> VFB=0.75V
Vo=VFB*(1+PR105/PR106)=1.052V
Fsw=262KHz
<Vo=1.8V> VFB=0.75V
Vo=VFB*(1+PR96/PR97)=1.8V
Fsw=262 KHz
Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m
Ipeak=6.36 A, Imax=4.45 A, Iocp=7.63 A
Delta I=((19-1.8)*(1.8/19))/(2.2u*262 K)=2.82 A
=>1/2DeltaI=1.41A
Vtrip=137mV
Iocp=Vtrip/(Rdson)+1.41
=95.3/(17.9~21.48)+ 1.41=9.07~7.79
Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m
Ipeak=6.1A, Imax=4.27 A, Iocp=7.32 A
Delta I=((19-1.05)*(1.05/19))/(2.2u*262K)= 1.72A
=>1/2DeltaI=0.86A
Vtrip=14K*10uA=0.140 V
Iocp=Vtrip/(Rdson)+0.86
=113/(17.9~21.48)+0.86=8.68~7.37 A
PR105
3.48K_0402_1%
PR105
3.48K_0402_1%
1 2
PC73
2200P_0402_50V7K
PC73
2200P_0402_50V7K
12
PR92
30K_0402_5%
@PR92
30K_0402_5%
@
12
PU7
RT8209BGQW_W QFN14_3P5X3P5
PU7
RT8209BGQW_W QFN14_3P5X3P5
VOUT
3
VDD
4
EN/DEM 1
TON
2
FB
5
PGOOD
6LGATE 9
UGATE 13
PHASE 12
GND
7
PGND
8
CS 11
VDDP 10
BOOT 14
NC 15
PR97
4.12K_0402_1%
PR97
4.12K_0402_1%
12
PC83
2200P_0402_50V7K
PC83
2200P_0402_50V7K
12
PR103
100_0603_1%
PR103
100_0603_1%
1 2
PC166
0.1U_0603_25V7K
PC166
0.1U_0603_25V7K
12
PC209
47P_0402_50V8J
@
PC209
47P_0402_50V8J
@
1 2
PC90
680P_0603_50V7K
PC90
680P_0603_50V7K
12
PC30
10U_1206_25V6M
PC30
10U_1206_25V6M
12
PQ24
IRFH3707TRPBF_PQFN8-3
PQ24
IRFH3707TRPBF_PQFN8-3
2
1
3
PR95
13.7K_0402_1%
PR95
13.7K_0402_1%
1 2
PQ23
AON7408L_DFN8-5
PQ23
AON7408L_DFN8-5
4
5
1
2
3
PR104
14K_0402_1%
PR104
14K_0402_1%
1 2
PR100
0_0603_5%
PR100
0_0603_5%
1 2
PL13
HCB2012KF-121T50_0805
PL13
HCB2012KF-121T50_0805
1 2
PR101
30K_0402_5%
@PR101
30K_0402_5%
@
12
PL7
2.2UH_FMJ-0630T-2R2 HF_8A_20%
PL7
2.2UH_FMJ-0630T-2R2 HF_8A_20%
1 2
PC82
4.7U_0805_10V6K
PC82
4.7U_0805_10V6K
12
PR99
1K_0402_1%
PR99
1K_0402_1%
1 2
PC77
1U_0402_6.3V6K
PC77
1U_0402_6.3V6K
12
PC89
4.7U_0603_6.3V6K
PC89
4.7U_0603_6.3V6K
12
PR106
8.25K_0402_1%
PR106
8.25K_0402_1%
12
PR93
4.7_1206_5%
PR93
4.7_1206_5%
12
PQ25
AON7408L_DFN8-5
PQ25
AON7408L_DFN8-5
4
5
1
2
3
PC86
.1U_0402_16V7K
PC86
.1U_0402_16V7K
12
PR98
300K_0402_5%
PR98
300K_0402_5%
1 2
PR96
5.9K_0402_1%
PR96
5.9K_0402_1%
1 2
PC33
10U_1206_25V6M
PC33
10U_1206_25V6M
12
PL6
2.2UH_FMJ-0624T-2R2 HF_7A_20%
PL6
2.2UH_FMJ-0624T-2R2 HF_7A_20%
1 2
PC87
0.1U_0603_25V7K
PC87
0.1U_0603_25V7K
1 2
PR89
300K_0402_5%
PR89
300K_0402_5%
1 2
PR94
100_0603_1%
PR94
100_0603_1%
1 2
PR91
0_0603_5%
PR91
0_0603_5%
1 2
PC79
4.7U_0603_6.3V6K
PC79
4.7U_0603_6.3V6K
12
PU6
RT8209BGQW_W QFN14_3P5X3P5
PU6
RT8209BGQW_W QFN14_3P5X3P5
VOUT
3
VDD
4
EN/DEM 1
TON
2
FB
5
PGOOD
6LGATE 9
UGATE 13
PHASE 12
GND
7
PGND
8
CS 11
VDDP 10
BOOT 14
NC 15
PC167
0.1U_0603_25V7K
PC167
0.1U_0603_25V7K
12
PQ26
IRFH3707TRPBF_PQFN8-3
PQ26
IRFH3707TRPBF_PQFN8-3
2
1
3
+
PC78
220U_B2_2.5VM
+
PC78
220U_B2_2.5VM
1
2
PR102
4.7_1206_5%
PR102
4.7_1206_5%
12
+
PC88
330U_B2_2.5VM_R15M
+
PC88
330U_B2_2.5VM_R15M
1
2
PR90
1K_0402_1%
PR90
1K_0402_1%
1 2
PC208
47P_0402_50V8J
@
PC208
47P_0402_50V8J
@
1 2
PC80
680P_0603_50V7K
PC80
680P_0603_50V7K
12
PC92
4.7U_0603_10V6K
PC92
4.7U_0603_10V6K
12
PL12
HCB2012KF-121T50_0805
PL12
HCB2012KF-121T50_0805
1 2
PC76
0.1U_0603_25V7K
PC76
0.1U_0603_25V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FB_SY8033B
LX_SY8033B
EN_SY8033B
+1.8V
+3VALW
+0.9VSP
+5VALWP
+0.89VSP
SUSP<34>
SUSP#<31,34,35,40,43>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
0.89VSP/0.9VSP
Custom
41 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
0.89VSP/0.9VSP
Custom
41 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
0.89VSP/0.9VSP
Custom
41 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Ipeak=1A, Imax=0.7A
<Vo=0.89V> VFB=0.6V
Vo=VFB*(1+PR117/PR116)=0.6*(1+30.1K/61.9K)=0.8917V
Ipeak=2.64A
PJ10
JUMP_43X79
@PJ10
JUMP_43X79
@
11
2
2
PC104
0.1U_0402_10V7K
@
PC104
0.1U_0402_10V7K
@
12
PC110
4.7U_0805_6.3V6K
PC110
4.7U_0805_6.3V6K
1 2
PL14
1UH_PCMB062D-1R0MS_9A_20%
PL14
1UH_PCMB062D-1R0MS_9A_20%
1 2
PC211
22U_0805_6.3VAM
PC211
22U_0805_6.3VAM
12
PC105
22U_0805_6.3VAM
PC105
22U_0805_6.3VAM
12
PR121
1K_0402_1%
PR121
1K_0402_1%
12
PC101
22U_0805_6.3VAM
PC101
22U_0805_6.3VAM
12
PC103
680P_0603_50V7K
PC103
680P_0603_50V7K
12
PU11
APL5336KAI-TRL SOP
PU11
APL5336KAI-TRL SOP
VOUT
4
NC 5
GND
2
VREF
3
VIN
1VCNTL 6
NC 7
NC 8
TP 9
PR118
4.7_1206_5%
PR118
4.7_1206_5%
12
PR122
0_0402_5%
PR122
0_0402_5%
1 2
PR125
47K_0402_5%
@
PR125
47K_0402_5%
@
1 2
PC102
22P_0402_50V8J
@
PC102
22P_0402_50V8J
@
12
PC113
.1U_0402_16V7K
PC113
.1U_0402_16V7K
12
PR119 0_0402_5%PR119 0_0402_5%
1 2
PC112
.1U_0402_16V7K
PC112
.1U_0402_16V7K
12
G
D
S
PQ29
2N7002W -T/R7_SOT323-3
G
D
S
PQ29
2N7002W -T/R7_SOT323-3
2
13
PR117
30.9K_0402_1%
PR117
30.9K_0402_1%
12
PC111
1U_0603_6.3V6M
PC111
1U_0603_6.3V6M
12
PJ11
JUMP_43X79
PJ11
JUMP_43X79
11
2
2
PR116
61.9K_0402_1%
PR116
61.9K_0402_1%
12
PC199
.1U_0402_16V7K
PC199
.1U_0402_16V7K
12
PU9
SY8033BDBC_DFN10_3X3
PU9
SY8033BDBC_DFN10_3X3
EN
5
PG 4
LX 3
FB 6
SVIN
8
TP
11
LX 2
PVIN
10
NC
7
PVIN
9
NC
1
PR123
1K_0402_1%
PR123
1K_0402_1%
12
PC114
10U_0805_6.3V6M
PC114
10U_0805_6.3V6M
12
hexainf@hotmail.com
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
3211_IREF
3211_RPM
3211_COMP-1
3211_CSCOMP
3211_FB
3211_RAMP
3211_DRVH
3211_RAMP-1
3211_VCC
3211_RT
3211_CSFB
3211_EN
3211_CSCOMP
CPU_BOOST
3211_CSCOMP
3211_DRVL
3211_COMP
CPU_BOOST-1
3211_ILIM
3211_SW
VID0
VID1
VID2
VID3
VID4
VID5
VID6
3211_PWRGD
+CPU_CORE
+3VS
+5VS
+CPU_B+
+5VS
+CPU_CORE
+3VS
B+
+CPU_B+
VR_ON
<31>
CPU_VID0
<5>
CPU_VID1
<5>
CPU_VID2
<5>
CPU_VID3
<5>
CPU_VID4
<5>
CPU_VID5
<5>
CPU_VID6
<5>
VGATE<5,13,19,31>
CLK_ENABLE#<13>
VSSSENSE
<6>
VCCSENSE
<6>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CPU_CORE
C
42 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CPU_CORE
C
42 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
CPU_CORE
C
42 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Place RTH1 close to inductor
on the same layer
LL=5.9m ohm
OCP=7.85A
VID:0.75V~1.1V
Io(max)=6.04A
DCR=23m
Connect to input caps
Shortest the
net trace
Avoid high dV/dt
PR198 0_0402_5%PR198 0_0402_5%
1 2
PR199 0_0402_5%PR199 0_0402_5%
1 2
PC107
10U_1206_25V6M
PC107
10U_1206_25V6M
12
PC191
1000P_0402_50V7K
PC191
1000P_0402_50V7K
12
PR202 0_0402_5%PR202 0_0402_5%
1 2
PC182
1U_0805_25V6K
PC182
1U_0805_25V6K
12
PR218
422K_0402_1%
PR218
422K_0402_1%
12
PQ30
AON7408L_DFN8-5
PQ30
AON7408L_DFN8-5
4
5
1
2
3
PC192
1000P_0402_50V7K
PC192
1000P_0402_50V7K
12
PR195
0_0402_5%
PR195
0_0402_5%
12
PC189
1000P_0402_50V7K
PC189
1000P_0402_50V7K
12
PL10
2.2UH_FMJ-0624T-2R2 HF_7A_20%
PL10
2.2UH_FMJ-0624T-2R2 HF_7A_20%
1 2
PR211
200K_0402_1%
PR211
200K_0402_1%
1 2
PR213
35.7K_0402_1%
PR213
35.7K_0402_1%
12
PR208
1K_0402_1%
PR208
1K_0402_1%
1 2
PH4
100K_0402_1%_NCP15WF104F03RC
PH4
100K_0402_1%_NCP15WF104F03RC
1 2
PC187
47P_0402_50V8J
PC187
47P_0402_50V8J
12
PR204 0_0402_5%PR204 0_0402_5%
1 2
PR124
4.7_1206_5%
PR124
4.7_1206_5%
12
PR158
0_0402_5%
PR158
0_0402_5%
1 2
PC115
680P_0603_50V7K
PC115
680P_0603_50V7K
12
PC188
470P_0402_50V8J
PC188
470P_0402_50V8J
1 2
PR209
2.61K_0402_1%
PR209
2.61K_0402_1%
1 2
PR200
10_0603_1%
PR200
10_0603_1%
1 2
PC184
1000P_0402_50V7K
PC184
1000P_0402_50V7K
12
PR194
4.7K_0402_1%
PR194
4.7K_0402_1%
12
PR205
10K_0402_1%
PR205
10K_0402_1%
12
PC190
220P_0402_50V7K
PC190
220P_0402_50V7K
12
PR201 0_0402_5%PR201 0_0402_5%
1 2
PQ31
IRFH3707TRPBF_PQFN8-3
PQ31
IRFH3707TRPBF_PQFN8-3
2
1
3
PC148
0.1U_0402_25V6
PC148
0.1U_0402_25V6
12
PR217
75K_0402_1%
PR217
75K_0402_1%
12
PR214
499K_0402_1%
PR214
499K_0402_1%
12
PC186
2.2U_0603_10V6K
PC186
2.2U_0603_10V6K
12
PR212
274K_0402_1%
PR212
274K_0402_1%
1 2
PU12
ADP3211AMNR2G_QFN32_5X5
PU12
ADP3211AMNR2G_QFN32_5X5
GPU
7
PWRGD
1
IMON
2
CLKEN#
3
FBRTN
4
FB
5
COMP
6
ILIM
8
IREF
9
RPM
10
RT
11
RAMP
12
LLINE
13
CSREF
14
CSFB
15
CSCOMP
16
VCC 24
BST 23
DRVH 22
SW 21
PVCC 20
DRVL 19
PGND 18
AGND 17
EN 32
VID0 31
VID1 30
VID2 29
VID3 28
VID4 27
VID5 26
VID6 25
AGND 33
PR203 0_0402_5%PR203 0_0402_5%
1 2
PL9
HCB2012KF-121T50_0805
PL9
HCB2012KF-121T50_0805
1 2
PR219
1K_0402_1%
PR219
1K_0402_1%
12
PR210
80.6K_0402_1%
PR210
80.6K_0402_1%
1 2
PR196 0_0402_5%PR196 0_0402_5%
1 2
PC147
2200P_0402_50V7K
PC147
2200P_0402_50V7K
12
PR150
0_0402_5%
PR150
0_0402_5%
1 2
PR207
28K_0402_1%
PR207
28K_0402_1%
1 2
PC185
390P_0402_50V7K
PC185
390P_0402_50V7K
1 2
PR197 0_0402_5%PR197 0_0402_5%
1 2
PR206
0_0603_5%
PR206
0_0603_5%
1 2
PC183
0.22U_0603_25V7K
PC183
0.22U_0603_25V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_VGA-1BST_VGA
LG_VGA
VGA_FB
VGA_TON
SW _VGA
VGA_V5FILT
UG_VGA
VGA_EN
VGA_TRIP
BST_1.5V
DL_1.5V
LX_1.5V
DH_1.5V
1.5V_B+
BST_1.5V-1
+5VALW
+5VALW
+1.5VSP
B+
+5VS
+3VSDGPU
+5VALW
VGA_COREP
+5VALW
B+
+3VSDGPU
VGA_ON<35>
VGAPW RGD<31>
GPU_VID0 <8>
GPU_VID1 <8>
SUSP#<31,34,35,40,41>
+VGASENSE <10>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
VGA_CORE/1.5VSP
Custom
43 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
VGA_CORE/1.5VSP
Custom
43 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
VGA_CORE/1.5VSP
Custom
43 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Ipeak=11.6 A
Imax=8.15 A
GPU_VID0 GPU_VID1
01.03 V
0
1
0
1
1 0.85V
delta I=3.27A 1/2 delta I=1.636 A
Iocp=RTEIP*ITRIP/RDS(ON)+1/2 I=14~11.98 A
Rds(on)=11~14m
VFB=0.75V
Ipeak=8.62 A
Imax=6.034 A
Iocp=10.35 A
Vo=1.518V
Fsw=262 KHz
Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
Ilimit=9.44A ~ 7.86A
Iocp=Ilimit+Delta I/2
=12~10.5A
Delta I=5.27A (Freq=262KHz)
PR192
1.58K_0402_1%
PR192
1.58K_0402_1%
1 2
PC95
680P_0603_50V7K
PC95
680P_0603_50V7K
12
PQ28
AON7408L_DFN8-5
PQ28
AON7408L_DFN8-5
4
5
1
2
3
PR114
0_0603_5%
PR114
0_0603_5%
1 2
PR193
0_0603_5%
PR193
0_0603_5%
1 2
PL15
HCB2012KF-121T50_0805
PL15
HCB2012KF-121T50_0805
1 2
PR110
30K_0402_5%
@
PR110
30K_0402_5%
@
12
PR215
15.8K_0402_1%
PR215
15.8K_0402_1%
1 2
PR115
0_0402_5%
PR115
0_0402_5%
1 2
PR108
4.12K_0402_1%
PR108
4.12K_0402_1%
12
PC180
0.22U_0402_10V4Z
PC180
0.22U_0402_10V4Z
12
PL8
2.2UH_FMJ-0630T-2R2 HF_8A_20%
PL8
2.2UH_FMJ-0630T-2R2 HF_8A_20%
1 2
PR246
10K_0402_5%
PR246
10K_0402_5%
1 2
PC94
0.1U_0603_25V7K
PC94
0.1U_0603_25V7K
1 2
PL18
1UH_PCMB062D-1R0MS_9A_20%
PL18
1UH_PCMB062D-1R0MS_9A_20%
1 2
PQ41
AON7408L_DFN8-5
PQ41
AON7408L_DFN8-5
3 5
2
4
1
PC100
2200P_0402_50V7K
PC100
2200P_0402_50V7K
12
PR255
10K_0402_1%
PR255
10K_0402_1%
1 2
PR120
30K_0402_5%
@
PR120
30K_0402_5%
@
12
PR247
10K_0402_5%
PR247
10K_0402_5%
1 2
PR244
10K_0402_5%
@
PR244
10K_0402_5%
@
1 2
+
PC149
330U_D2E_2.5VM_R9M
+
PC149
330U_D2E_2.5VM_R9M
1
2
PR112
300K_0402_5%
PR112
300K_0402_5%
1 2
PR107
4.22K_0402_1%
PR107
4.22K_0402_1%
1 2
PC99
4.7U_0603_6.3V6K
PC99
4.7U_0603_6.3V6K
12
PR243
10K_0402_5%
@
PR243
10K_0402_5%
@
1 2
PR248
2.61K_0402_1%
@PR248
2.61K_0402_1%
@
12
+
PC91
330U_B2_2.5VM_R15M
+
PC91
330U_B2_2.5VM_R15M
1
2
PR249
47K_0402_1%
PR249
47K_0402_1%
1 2
PR253
300K_0402_5%
PR253
300K_0402_5%
1 2
PQ27
AON7702L_DFN8-5
PQ27
AON7702L_DFN8-5
4
5
1
2
3
G
D
S
PQ50
2N7002W -T/R7_SOT323-3
G
D
S
PQ50
2N7002W -T/R7_SOT323-3
2
13
PR250
4.7_1206_5%
PR250
4.7_1206_5%
12
G
D
S
PQ51
2N7002W -T/R7_SOT323-3
G
D
S
PQ51
2N7002W -T/R7_SOT323-3
2
13
PR251
0_0402_5%
PR251
0_0402_5%
12
PC206
4.7U_0603_6.3V6K
PC206
4.7U_0603_6.3V6K
12
PC106
10U_1206_25V6M
PC106
10U_1206_25V6M
12
PR254
10_0402_1%
PR254
10_0402_1%
1 2
PC207
47P_0402_50V8J
@
PC207
47P_0402_50V8J
@
1 2
PR111
100_0603_1%
PR111
100_0603_1%
1 2
PU13
RT8209BGQW_W QFN14_3P5X3P5
PU13
RT8209BGQW_W QFN14_3P5X3P5
VOUT
3
VDD
4
EN/DEM 1
TON
2
FB
5
PGOOD
6LGATE 9
UGATE 13
PHASE 12
GND
7
PGND
8
CS 11
VDDP 10
BOOT 14
NC 15
PC150
4.7U_0805_10V6K
PC150
4.7U_0805_10V6K
12
PC155
0.1U_0603_25V7K
PC155
0.1U_0603_25V7K
1 2
PC201
680P_0603_50V7K
PC201
680P_0603_50V7K
12
PR109
16.9K_0402_1%
PR109
16.9K_0402_1%
1 2
PR216
0_0402_5%
PR216
0_0402_5%
1 2
PR245
2K_0402_1%
@PR245
2K_0402_1%
@
12
PQ32
AON7702L_DFN8-5
PQ32
AON7702L_DFN8-5
4
5
1
2
3
PC97
.1U_0402_16V7K
@
PC97
.1U_0402_16V7K
@
12
PL20
HCB2012KF-121T50_0805
PL20
HCB2012KF-121T50_0805
1 2
PC93
0.22U_0402_10V6K
@PC93
0.22U_0402_10V6K
@
12
PC96
10U_1206_25V6M
PC96
10U_1206_25V6M
12
PR252
100_0603_1%
PR252
100_0603_1%
1 2
PC181
0.22U_0402_10V4Z
PC181
0.22U_0402_10V4Z
12
PR113
4.7_1206_5%
PR113
4.7_1206_5%
12
PC81
0.1U_0402_16V7K
PC81
0.1U_0402_16V7K
12
PR241
10K_0402_5%
PR241
10K_0402_5%
1 2
PC98
4.7U_0805_10V6K
PC98
4.7U_0805_10V6K
12
PR184
10K_0402_1%
PR184
10K_0402_1%
12
PC210
47P_0402_50V8J
@
PC210
47P_0402_50V8J
@
1 2
PR242
10K_0402_5%
PR242
10K_0402_5%
1 2
PU8
RT8209BGQW_W QFN14_3P5X3P5
PU8
RT8209BGQW_W QFN14_3P5X3P5
VOUT
3
VDD
4
EN/DEM 1
TON
2
FB
5
PGOOD
6LGATE 9
UGATE 13
PHASE 12
GND
7
PGND
8
CS 11
VDDP 10
BOOT 14
NC 15
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
PIR-PWR-1
Custom
44 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
PIR-PWR-1
Custom
44 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
PIR-PWR-1
Custom
44 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 1 for PWR
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
1
2
3
4
5
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7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
change PC50 PC53 to 0805 4.7uFor save layout space and shortage
Reserve PR216 PC93For VGA_core 51117 power good delay
A
A
Delet PC35 PC36, change PC29 PC32 to 1206 10uFSave layout space A
For cost down change 0.89V from MP2121 to SY8033A
delet Vin detector,battery OVP circuit
change 3V/5v from ISL6237 to TPS51125
A
A
change PR116 to 61.9K PR117 to 30.1K
PL14 to 1uH
For Design change
For cost down
For cost down
A
For cost down change 1.5V PL8 to 3mm height
For cost down change VCCP PL7 to 3mm height
For Design change change PQ31 to IRFH3707
change PQ23 PQ25 PQ28 PQ30 TO AON7408For Design change
change PR115 to 0 ohm ,unpop PR101change 1.5V enable RC ,for HW request
change VCCP enable RC ,for HW request change PR99 to 1k ohm ,pc86 to 0.1u,unpop PR110
change VGACORE enable RC ,for HW request change PR249 to 47k ohm ,pc81 to 0.1u,unpop PR120
Add PC71 4.7u 0805 25V
change PL5 to 10uF
For charger ripple
For charger ripple
A
A
A
A
A
A
A
Buyer suggest change PQ36 from 2N7002 TO SSM3K7002FU
Fix VGA_VID at 0.85V delete PR248 PR245 ,change PR192 to 1.58K
OTP INPUT PULL HIGH resister Add PR29
change OTP set change PR31 to 13K
Add PC77 1u 6.3v X5R1.8V enable cap
51125 VL cap size up to 1206 change PC205 to 1206 size
change PC96 PC106 PC107 from X6S to X5RBuyer suggest
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
PIR-PWR-2
Custom
45 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
PIR-PWR-2
Custom
45 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
PIR-PWR-2
Custom
45 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 1 for PWR
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
2009.6.30
2009.6.30
EVT
EVT
23
2009.7.2
EVT
2009.8.4
EVT
2009.8.12
EVT
2009.8.12
EVT
2009.8.12
EVT
2009.8.12
EVT
2009.8.24
EVT
2009.8.24
EVT
EVT
2009.8.24
EVT
2009.8.24
2009.8.24
EVT
2009.8.24
EVT
2009.8.27
EVT
2009.9.4
DVT
2009.9.10
DVT
PVT
2009.9.30
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
PIR -HW
Custom
46 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
PIR -HW
Custom
46 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NAVD0 LA-6091P
1.0
PIR -HW
Custom
46 46Wednesday, March 03, 2010
2009/10/09 2010/10/09
Compal Electronics, Inc.
<2009/4/28>
Update new power schematic,
release first version NAV50 schematic
<2009/05/11>
. Add INVT_PWM on Page 5
. Del R323 on page 5
. C74 change to 2.2U_0603 on page 6
. C267 change to 22U on page 6
. C391 change to 0.1U on page 6
. Del C67 C35 C33 C36 on page 6
. Del +LGI_VID and U71.A21 direct connect to +VCCP on page 6
. Follow Intel checklist, add R52 on FSB on page 8
. Add D5 D7 D8 on page 4
. Add R174 on page 9
. Add PCI_RST# on page 11
. Add C1115 C1114 C1116 C1117 C1118 on page 15
<2009/04/30>
. Change JDIM1 to SP07F001720 on page 7
. Del SATA1 Port on page 12
. Change R51 R57 R70 R63 R317 R314 R190 to 0402 Size on page 21
<2009/05/12>
. Follow Intel Layout Checklist, Add C141 on VDDSPD on page 7
. Modify SRC CLK PORT LIST on page 8
. Del CLKREQ_LAN# on page 8
. Change PCIE Port list on page 13
. Change USB Port list on page 13
. Add W/L 3G SW on page 16
. Del R103 on page 18
<2009/05/04>
. Add WWAN_CLKREQ# and R107 pull-high to +3VS on page 8
. Add CRT_DET# on page 10
. Add CRT_DET# circuit on page 13
. Add 3 LEDS on page 16
. Add BT/BTN Board CONN. on page 16
. Update TP/B CONN. to SP01000LB00 on page 19
<2009/05/14>
. Update New Power schematic
. Del R376 R377 on page 8
. Del D5 D7 D8 on page 4
. Change JLVDS1 to SP010006810 on page 9
. Add D6 for EMI on page 9
. Change C1106 to C_0603 type on page 9
. Change USB_OC# on page 13
. Add USB Port2 on page 20
. Change JP11 Pin define & Add D22 on page 19
. Change C512 to 1u_0402 on page 15
. Add U29 (MEDIA_LED#)) on page 16
<2009/04/29>
. Add R1182 R1183 L3 on page 9
. Change J3 to R1184 on page 13
<2009/05/19>
.Update new clock GEN co-lay schematic on page 8
<2009/06/05>
.Update new clock GEN co-lay schematic on page 8
.Follow Intel check list change C161 C165 to 27P on page 8
.Follow Intel check list change C56 to 22uF on page 6
<2009/06/08>
.Update New Power schematic 06/06 version
Page 13- a.Del R203 (pull-up GPIO6 Resister)
b.Change R1184 NU
Page 17- a. Add VGATE
b. Del R1294
c. Change D30 NU
d. Change R1295 to 0 ohm
e. Add R1309 0 ohm on EC_RSMRST#
f. Pull-up LAN_WAKE# +3VALW
g. ICH_POK change to PCH_POK
h. Pull-up KB_RST# to +3VS
Page 10- a. Add R1283 R1284 ,Change R247 R249 to 10 ohm
b. Add @ on U10 U11 C301 C298
c. Del C302 C300 R1281 R1287
<2009/05/13>
. Change JMINI1 to PCIE Port 3 on page 15
<2009/06/10>
. Page 7- Add C116 @
. Page 22- Modify USB_OC#1_2 to USB_OC#2
. Page 17- Modify PLTRST# to PCI_RST#
. Page 17- Add @ on R1311
<2009/06/17>
. Update New Power schematic 06/17
. Page9 modify LVDS Conn. Pin define
. Page9 Del C1110
. Page4 Add EMI solution D38 D39 D40
<2009/06/15>
. Update New Power schematic (change PBJ1 to PJP3)
. Page 10 modify C310 C308 C303 C307 C306 C304 Bom Structure
. Page 22 Modify Hole location by (ME drawing 06/12)
<2009/06/16>
. Page7 Modify DDR Command Control Pin pull-high Resister location
. Page9 Change R577 to 0402 type
<2009/06/18>
. Update New Power schematic 06/18
. Page8 modify U4 Pin define and Q31
. Page13 Add R1376, R1377
. Page15 Modify C403
. Page23 Modify H11
<2009/06/19>
. Page4 Add new signal CPU_ITP , CPU_ITP#
. Page5 ADD R1378
. Page6 ADD C1152,C1153,C1154 C1160,C1161,C1162
. Page7 DDR_A_D8 DDR_A_D9
. Page8 ADD R1379,R1380,U77,R1381,C1157,R1382,R1383,R1384,C1157
, Page8 DEL C390
. Page9 ADD C1156
. Page11 DEL R1322, R1154
. Page13 DEL U77, ADD C1158
. Page17 ADD C1159
<2009/06/22>
. Page22 change IO Conn. pin34 from 48M to USB_ON#
. Page10 change JCRT1 P/N to SP010906182
<2009/06/23>
. Page15 Add C1163 C1164 C1165 C1166
. Page18 change PWR/B Conn. P/N to SP01000H300
. Page22 change JUSB1 JUSB2 P/N
<2009/06/25>
. Page22 move some parts to I/O Board , Add the MONO_IN_R on M/B
.
<2009/06/29>
. Page16 Change JP24 to ACES_88266_05001
. Page15 Change JMINI1 to FOX_AS0B246-S50U-7F_52P-T
<2009/06/12>
. Page4 Add C314 C313 C1150 D19 on +VCC_FAN1
. Page8 Add C1145 C1146 C1147
. Page10 Move CRT_DET# from Page13 to Page10
. Page13 Add +RTCVCC circuit
<2009/06/24>
. Page8 Change C1350 C1351 to 0402 type
. Page10 Add R1385 R1386 on JVGA_HS JVGA_VS
<2009/05/14>
. Page8 Change C174 C175 to 10U_0603
<2009/06/30>
. Page18 Change PWR_LED# to PWR_PWM_LED#
. Page17 Add PWR LED DETECT PIN on Pin97
<2009/07/02>
. Update New Power schematic 07/02
. Page9 Add C1167 C1168 for RF request.
. Page13 Change R223 to 100K
. Page16 change JP24 to ACES_85201-0505N
. Page17 Del R1387 R1388 on EC Pin97
. Page17 Add New Board ID to separate NAV50 NAV60
. Page17 Change IC to SA00003J400 (New)
. Page18 Add D41 for ESD
<2009/07/03>
. Page18 Add D41.2 to PWR_PWM_LED#
. Page8 Change co-lay net name to +1.5VM_CK505
. Page20 Change JP2 Pin42 to +5VS
<2009/07/06>
. Page18 Add pwr switch for NAV50
<2009/07/08>
. Page5 Add 470pf on H_SMI# for known issue.
<2009/08/04>
. Page5 CLK_CPU_HPLCLK CLK_CPU_HPLCLK# exchange
. Page9 Change JLVDS1 to P/N ACES 88341-3001 30P
. Page17 del PM_1.8V(U6.82) ,Del R1310 R1311
. Page18 Del D41
<DVT START>
<2009/09/03>
. Page7 Change C112 to 0402 type
. Page8 Add T6 on CLK_48M_CR
. Page16 Modify JP18 Pin define change +5VALW +5VS to +3VALW +3VS
. Page20 Change Pin 18, 23 to +1.5VS change Pin7 , 9 to USB20_P7 N7
. Page21 Del H12
<2009/09/08>
Update Power schematic 0904
. Page18 Change R1388 to 100 ohm 0402
. Page18 Change LED1 to SC591NB5A00
<2009/09/10>
Update Power schematic 0910
. Page22 unmount Q6 Q8
