Compal LA 2492

User Manual:

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EAT20 (Sakhir 10GC)
LA-2492 Schematics Document

2

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Intel Dothan / AlvisoPM / DDR-1 / ICH6-M / Select Bay
(nVIDIA NV43M & NV44M/ ATi M22 & M24)
2004 / 12 / 22

3

3

Rev:1.0

4

4

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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401317
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Compal confidential
File Name : LA-2492

Fan Control

page 4,5

CRT/TV-OUT

page 4

page 15

1

Clock Generator
ICS954226

Thermal Sensor
ADM1032ARM

Intel Dothan CPU

page 4

FSB

H_A#(3..31)

NV44 / M24
VGA Board

1

400 / 533 Mhz

Intel Alviso GM(PM)

page 16

page 14

H_D#(0..63)

DDR-1(DDR-2)

DDR-SO-DIMM X2
BANK 0, 1, 2, 3page 11,12,13

PCBGA 1257
LCD CONN

page 6,7,8,9,10

page 16

Signal Channel DDR-1
Two Channel DDR-2

DMI
MARVELL LAN
88E8036
88E8053

RJ45 CONN
page 28

2

PCI-E BUS

USB 2.0

page 31

page 27

Intel ICH6-M

USB 2.0

BT Conn

page 31

Audio CKT
ALC250-D

AC-LINK
page 17,18,19,20

TI Controller

page 30

Docking
Audiopage

AMP & Audio Jack
31

page 32

PCI7421

page 29

page 23,24

SATA to PATA
88SA8040

SATA

13 94
Conn.

3

page 24

Slot 0
Slot 1

5in1 CardReader
page 25
Slot

PATA HDD
conn
SATA HDD

page 21

LPC BUS

page 21
3

page 26

MODULE
Connector

PATA

Docking CONN.

32
page 22

*RJ-11 / 45(LED*2)
*COMPOSITE Video Out
*TVOUT
*LINE IN / OUT
*PS/2
*Print port
*1394
*USB
*DC JACK

Power On/Off CKT.
page 34

SMsC LPC47N217

DC/DC Interface CKT.

RTC CKT.

page 40

page 19

ENE KB910/910L

page 34

page 35

Int. KBD
Power Circuit DC/DC
4

2

page 29

mBGA-609

PCI BUS

Mini PCI
socket

RJ11 CONN

USB conn x 3

page 44~51

Parellel
Port

Power OK CKT.
page 39

page 34

Serial
Port
page 38

page 36

Touch Pad
CONN. page

page 40

4

34

BIOS
page 37

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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SIGNAL

STATE

Voltage Rails

1

2

Description

S1

+V

+VS

Clock

HIGH

HIGH

HIGH

HIGH

ON

ON

ON

ON

LOW

HIGH

HIGH

HIGH

ON

ON

ON

LOW

S3

S5

S3 (Suspend to RAM)

LOW

LOW

HIGH

HIGH

ON

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

LOW

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

LOW

LOW

ON

OFF

OFF

OFF

VIN

Adapter power supply (19V)

N/A

N/A

N/A

AC or battery power rail for power circuit.

N/A

N/A

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

+1.05VS

1.05V switched power rail

ON

OFF

OFF

+DDRVTT

1.25V switched power rail for DDR terminator

ON

OFF

OFF

+1.5VALW

1.5V always on power rail

ON

ON

ON*

+1.5VS

1.5V switched power rail

ON

OFF

OFF

+1.8VS

1.8V switched power rail

ON

OFF

OFF

+DDRVCC

2.5V power rail for DDR

ON

ON

OFF

Vcc
Ra/Rc/Re

+2.5VS

2.5V switched power rail

ON

OFF

OFF

Board ID

+3VALW

3.3V always on power rail

ON

ON

ON*

+3V

3.3V power rail

ON

ON

OFF

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5VS

5V switched power rail

ON

OFF

OFF

+5VCD

5V switched power rail for Direct CD

ON

OFF

OFF

+5VMOD

5V switched power rail for Module Bay

ON

OFF

OFF

+12VALW

12V always on power rail

ON

ON

ON*

0
1
2
3
4
5
6
7

+RTCVCC

RTC power

ON

ON

ON

1

Board ID / SKU ID Table for AD channel

Board ID
0
1
2
3
4
5
6
7

External PCI Devices
Device

IDSEL#

C ardB us

AD20

2

PIRQA/PIRQB

1 3 94

AD20

2

PIRQA/PIRQB

SD

AD20

2

PIRQA/PIRQB

AD18

1

PIRQG/PIRQH

3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

2

BOARD ID Table

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

REQ#/GNT#

+VALW

S1(Power On Suspend)

B+

Mini-PCI

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

Full ON

Power Plane

E

Interrupts

PCB Revision
0.1
NC
0.2
1.0

3

3

EC SM Bus1 address
Device

Address

Device

Address

Smart Battery

0001 011X b

ADM1032

1001 110X b

EEPROM(24C16/02)

1010 000X b

2'nd Battery

1001 011X b

1011 000Xb

Docking

1010 000X b

(24C04)

SKU ID Table

EC SM Bus2 address

SKU_ID_CHECK_1
SKU_ID_CHECK_0

0
1
2
3
4
5
6

ICH6M SM Bus address
4

Device

Address

Clock Generator
( ICS 952623)

1101 001Xb

DDR DIMM0

1001 000Xb

DDR DIMM2

1001 001Xb

10
10C
10G
10GC
10J

7
1-Button
1
3
5
7
11

6
3-Buttons
12
13

5
7-Buttons
0
2
4
6
10

4

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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Document Number

R ev
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401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
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H_D#[0..63]

1

H_D#[0..63] 6

+3VS

JP7A
H_A #[3..31]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

D

6 H_REQ#[0..4]

H_REQ #[0..4]

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

C

6
6

14 CLK_CPU_BCLK
14 CLK_CPU_BCLK#

6

H_RS#[0..2]

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H _ D R DY#
H_HIT#
H_HITM#

6
6

H_LOCK#
H_CPURST#

H_RS# [0..2]

H_IER R#
H_CPURST#
H_RS#0
H_RS#1
H_RS#2

B

6

R2
P3
T2
P1
T1
U3
AE5

H_ADSTB#0
H_ADSTB#1

6
6
6
6
6
6
6
6

P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1

H_TRDY#

H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPW R#

18 H_PW RGOOD
6,18 H_CPUSLP#

Dothan

ADDR GROUP

ADSTB0#
ADSTB1#
ITP_CLK0
ITP_CLK1

B15
B14

BCLK0
BCLK1

N2
L1
J3
N4
L4
H2
K3
K4
A4
J2
B11
H1
K1
L2
M3

ITP_DBRRESET# A7
M2
B7
G1
C19
A10
B10
PRO_CHOT#
B17

HOST CLK

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#

CONTROL GROUP

RS0#
RS1#
RS2#
TRDY#

BPM0#
BPM1#
BPM2#
BPM3#
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#

MISC

H_PW RGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

E4
A6
A13
C12
A12
C5
F23
C11
B13

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

THERMDA
THERMDC

B18
A18
C17

THERMDA DIODE
THERMDC
THERMTRIP#

A

6,18 H_THERMTRIP#

DATA GROUP

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

A16
A15

C8
B8
A9
C9

6
18
18
6

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#

THERMAL

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

H _D#0
H _D#1
H _D#2
H _D#3
H _D#4
H _D#5
H _D#6
H _D#7
H _D#8
H _D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

1

C17

2

1

1

H_A#[3..31]

C12
0.1U_0402_16V4Z

R20
@ 10K_0402_5%

U3
THERMDA

2

D+

VDD1

THERMDC

3

D-

ALERT#

6

30,34,39 EC_SMB_CK2

8

SCLK

THERM#

4

30,34,39 EC_SMB_DA2

7

SDATA

GND

5

2200P_0402_50V7K

2

D

2

6

1

ADM1032ARM_RM8

+1.05VS
C

ITP_TDI

R508

2

1

ITP_TDO

R29

2

1 @ 54.9_0402_1%

150_0402_5%

H_CPURST#

R28

2

1 @ 54.9_0402_1%

ITP_TMS

R27

2

1

40.2_0402_1%

PRO_CHOT#

R31

2

1

56_0402_5%

H_PW RGOOD

R24

2

1

200_0402_5%

H_IER R#

R23

2

1

56_0402_5%

+3VS

DINV0#
DINV1#
DINV2#
DINV3#

D25
J26
T24
AD20

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

C23
K24
W25
AE24
C22
L24
W24
AE25

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1

C2
D3
A3
B5
D1
D4

H_A20M# 18
H_FERR# 18
H_IGNNE# 18
H_INIT#
18
H_INTR
18
H_NMI
18

STPCLK#
SMI#

C6
B4

H_STPCLK# 18
H_SMI#
18

LEGACY CPU

6
6
6
6

ITP_DBRRESET#

R26

2

1

150_0402_5%

ITP_TRST#

R509

2

1

680_0402_5%

ITP_TCK

R30

2

1

27.4_0402_1%

TEST1

R25

2

1 @ 1K_0402_5%

TEST2

R46

2

1 @ 1K_0402_5%

B

6
6
6
6
6
6
6
6

A

Compal Electronics, Inc.

TYCO_1612365-1_Dothan
Title

SCHEMATIC, M/B LA-2492
THERMDA & THERMDC Trace / Space = 10 / 10 mil
5

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

4

of

51

5

4

3

2

1

+CPU_CORE

+CPU_CORE

JP7B

1
1

@ 54.9_0402_1%
@ 54.9_0402_1%

2
2

V CCSENSE
VSSSENSE

+VCCA

D

+1.05VS

1.8V FOR DOTHAN-A
+1.8VS

1
R63

2
@ 0_1206_5%

1
R56

2
0_1206_5%

1

1

C25

C26
2
2
0.01U_0402_16V7K
10U_0805_6.3V6M

VCCA0
VCCA1
VCCA2
VCCA3

P23
W4

VCCQ0
VCCQ1

C

49

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

PSI#

E1

PSI#

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

E2
F2
F3
G3
G4
H4

VID0
VID1
VID2
VID3
VID4
VID5

2

1

+1.05VS 49
49
49
49
R75
49
1K_0402_1%
49

B

1
R78

GTL_REF0

2
2K_0402_1%
14
14

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18

+CPU_CORE

AD26

CPU_BSEL0
CPU_BSEL1
COMP0
COMP1
COMP2
COMP3

JP7C

VCCSENSE
VSSSENSE

F26
B1
N1
AC26

D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21

1.5V FOR DOTHAN-B
+1.5VS

AE7
AF6

Dothan
POWER, GROUNG, RESERVED SIGNALS AND NC

R85
R84

GTLREF

C16
C14

BSEL0
BSEL1

P25
P26
AB2
AB1

COMP0
COMP1
COMP2
COMP3

B2
C3
E26
AF7
AC1

RSVD
RSVD
RSVD
RSVD
RSVD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1

1

+ C427

2

10U_0805_6.3V6M
1
1
C46
C47

2
10U_0805_6.3V6M

1

2

27.4_0402_1%

COMP0

1

2

54.9_0402_1%

COMP1

R83

1

2

27.4_0402_1%

COMP2

R82

1

2

54.9_0402_1%

COMP3

1

C45

2
10U_0805_6.3V6M

10U_0805_6.3V6M
1
C42

C33

2
10U_0805_6.3V6M

2

C30

2
10U_0805_6.3V6M

2

1

C32

2
10U_0805_6.3V6M

2

1

10U_0805_6.3V6M
1
C41

C40

2
10U_0805_6.3V6M

2

1

10U_0805_6.3V6M
1
C444

C39

2
10U_0805_6.3V6M

1

C443
2
2
10U_0805_6.3V6M

+CPU_CORE

1

10U_0805_6.3V6M
1
C455

C454
2
10U_0805_6.3V6M

2

1

10U_0805_6.3V6M
1
C65

C64

2
10U_0805_6.3V6M

2

1

10U_0805_6.3V6M
1
C67

C66

2
10U_0805_6.3V6M

2

1

C68

2
10U_0805_6.3V6M

+CPU_CORE

1

10U_0805_6.3V6M
1
C70

C69
2
10U_0805_6.3V6M

2

1

10U_0805_6.3V6M
1
C470

C429
2
10U_0805_6.3V6M

2

1

10U_0805_6.3V6M
1
C471

C430
2
10U_0805_6.3V6M

2

1

C516
2
10U_0805_6.3V6M

+CPU_CORE

1

10U_0805_6.3V6M
1
C510

C509
2
10U_0805_6.3V6M

2

1

10U_0805_6.3V6M
1
C512

C511
2
10U_0805_6.3V6M

2

1

10U_0805_6.3V6M
1
C514

C513
2
10U_0805_6.3V6M

2

1

Vcc-core
Decoupling
SPCAP,Polymer

C,uF

ESR, mohm

2X330uF

7m ohm/2

3.5nH/2

MLCC 0805 X5R

35X10uF

5m ohm/35

0.6nH/35

0.1U_0402_16V4Z

ESL,nH

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1
1
C435

1
C445

2

1
C16

1
C458

2

2

0.1U_0402_16V4Z

1
C13

2

1
C15

2

0.1U_0402_16V4Z

1
C14

2

F20
F22
G5
G21
H6
H22
J5
J21
K22
U5
V6
V22
W5
W21
Y6
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
R6
R22
R25
T3
T5
T21
T23

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Dothan

POWER, GROUND

C515
2
10U_0805_6.3V6M

+1.05VS

150U_D2_6.3VM

1

2

10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
1
C48
C31

+CPU_CORE

2

R70

2

+CPU_CORE

TYCO_1612365-1_Dothan

R69

+ C460

330U_D_2VM

+

A

330U_D_2VM
1

1
C461

2

0.1U_0402_16V4Z

1

1

C453

2

C448

2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24

D

C

B

TYCO_1612365-1_Dothan

C442

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

A

Compal Electronics, Inc.
Title

TRACE CLOSELY CPU < 0.5'
COMP0, COMP2 layout : Width 18mils and Space 25mils
COMP1, COMP3 layout : Space 25mils
5

4

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

5

of

51

5

4

H_RS# [0..2]
4

H_A#[3..31]

4

H_REQ#[0..4]

3

2

1

+1.5VS

H_RS#[0..2] 4

H_A #[3..31]
H_REQ #[0..4]

H_D#[0..63]

H_D#[0..63] 4

CL K_DREF_SSC

R51

1

2 PM@ 0_0402_5%

C LK_DREF_SSC#

R52

1

2 PM@ 0_0402_5%

U5A

HCLKN
HCLKP

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

G4
K1
R3
V3
G5
K2
R2
W4
H8
K3
T7
U5

4

H_CPURST#

H10

HCPURST#

4
4
4
4
4

H_ADS#
H_TRDY#
H_DPW R#
H _ D R DY#
H_DEFER#

F8
B5
G6
F7
E6
F6
D6
D4
B3
E7
A5
D5
C6
G8
A4
C5
B4

HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HEDRDY#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
HRS0#
HRS1#
HRS2#

4
4
4
4
4
4
4
4
4
4
4
4

B

AB1
AB2

4
4
4
4
4
4
4

H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#

CPU_SLP#
H_RS#0
H_RS#1
H_RS#2

R54

2

19
19
19
19

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

0_0402_5%

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

Y31
AA35
AB31
AC35

DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

AA33
AB37
AC33
AD37

DMITXN0
DMITXN1
DMITXN2
DMITXN3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

Y33
AA37
AB33
AC37

DMITXP0
DMITXP1
DMITXP2
DMITXP3

AM33
AL1
AE11
AJ34
AF6
AC10

11 DDRA_CLK1
11 DDRA_CLK2
12 DDRB_CLK1
12 DDRB_CLK2

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#

DD RA_CKE0
DD RA_CKE1
DD RB_CKE0
DD RB_CKE1

AP21
AM21
AH21
AK21

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

D DRA_SCS#0
D DRA_SCS#1
D DRB_SCS#0
D DRB_SCS#1

AN16
AM14
AH15
AG16

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

M_OCDCOMP0
M_OCDCOMP1

AF22
AF16
AP14
AL15
AM11
AN10

SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

AK10
AK11
AF37
AD1
AE27
AE28
AF9
AF10

SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT

12 DDRB_CLK1#
12 DDRB_CLK2#

R426 1
R427 1

R429 1
R430 1

+DDRVCC

DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1

11
11
12
12

DDRA_SCS#0
DDRA_SCS#1
DDRB_SCS#0
DDRB_SCS#1

2 @ 40.2_0402_1%
2 @ 40.2_0402_1%

2 80.6_0402_1%
2 80.6_0402_1%

SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5

AN33
AK1
AE10
AJ33
AF5
AD10

11 DDRA_CLK1#
11 DDRA_CLK2#

11
11
12
12

CFG/RSVD

H_ VREF
H_XRCOMP
H_XSCOMP
H_YRCO MP
H_YSCOMP
H_XSW ING
H _YSW ING

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3

M_RCOMPN
M_RCOMPP
SMVREF
M_XSLEW
M_YSELW

+1.05VS
R50 2
R47 1
R72 2
R68 1

24.9_0402_1%
54.9_0402_1%
24.9_0402_1%
54.9_0402_1%

1
2
1
2

(10mil:20mil)

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

CF G0
MCH_CLKSEL1
MCH_CLKSEL0

MCH_CLKSEL1 14
MCH_CLKSEL0 14

+2.5VS

CF G9

CF G0

R40

C FG12
C FG13

CF G5

R413 1

2 @ 1K_0402_5%

C FG16

CF G6

R407 1

2 @ 1K_0402_5%

C FG18
C FG19

CF G7

R408 1

2 @ 1K_0402_5%

CF G9

R404 1

2 @ 1K_0402_5%

C FG12 R409 1

2 @ 1K_0402_5%

C FG13 R412 1

2 @ 1K_0402_5%

C FG16 R417 1

2 @ 1K_0402_5%

BM_BUSY#
EXT_TS0#
EXT_TS1#
THRMTRIP#
PWROK
RSTIN#

DREF_CLKN
DREF_CLKP
DREF_SSCLKP
DREF_SSCLKN
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11

J23
J21
H22
F5
AD30
AE29

R421
+1.05VS

+1.05VS

C488

1K_0402_1%

SMVREF

R387

H _YSW ING

0.1U_0402_16V4Z

200_0603_1%

1

2

A24
A23
D37
C37
AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

H_THERMTRIP# 4,18
VGATE
14,19,49
PLT_RST# 16,17,19,21,22,24,27,33,34

CLK_DREF_96M#
CLK_DREF_96M
CL K_DREF_SSC
C LK_DREF_SSC#

CLK_DREF_96M# 14
CLK_DREF_96M 14
CLK_DREF_SSC 14
CLK_DREF_SSC# 14
+2.5VS

(12mil:10mil)

2 10K_0402_5%

EXT_TS#1 R411 1

2 10K_0402_5%

B

CFG5

Refer to sheet 6 for FSB
frequency select
Low = DMI x 2
High = DMI x 4

CFG6

Low = DDR-II
High = DDR-I

CFG7

Low = DT/Transportable CPU
High = Mobile CPU

CFG9

Low = Reverse Lane
High = Normal Operation

CFG[13:12]

00
01
10
11

CFG16
(FSB Dynamic
ODT)

Low = Disabled
High = Enabled

CFG[2:0]

*
*

*

*

= Reserved
= XOR Mode Enabled
= All Z Mode Enabled
= Normal Operation (Default)

*

*

CFG18
(VCC Select)

Low = 1.05V (Default)
High = 1.5V

CFG19
(VTT Select)

Low = 1.05V (Default)
High = 1.2V

R405

0.1U_0402_16V4Z

100_0603_1%

1

2

C459
0.1U_0402_16V4Z

*
A

*

Compal Electronics, Inc.

R419
100_0603_1%

Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

EXT_TS#0 R416 1

1

C423

2

2

C436

2

1

R420
221_0603_1%

1

H_XSW ING

1

H_ VREF

C489
0.1U_0402_16V4Z

2

(12mil:10mil)

2

2 @ 1K_0402_5%

2

(5mil:15mil)

2

A

R406
221_0603_1%

2

R388
100_0603_1%

2

1

1

1

1

2

+1.05VS

2 @ 1K_0402_5%

1

PM_BMBUSY# 19

EXT_TS#0
EXT_TS#1
H_THERMTRIP#

1K_0402_1%

1

1

C FG19 R42

CFG[19:18]: internal pull-down

R423

0.1U_0402_16V4Z

C FG18 R41

C

ALVISO_BGA1257

CPU_SLP#

2 10K_0402_5%

1

CFG[17:3]: internal pull-up

+DDRVCC

H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil

D

CF G5
CF G6
CF G7

1

1

J11
C1
C2
T1
L1
D1
P1

19
19
19
19

ALVISO_BGA1257

Un-pop for Dothan-A
4,18 H_CPUSLP#

HVREF
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
HDINV#0
HDINV#1
HDINV#2
HDINV#3

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

AA31
AB35
AC31
AD35

NC

14 CLK_MCH_BCLK#
14 CLK_MCH_BCLK

19
19
19
19

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

DDR MUXING

H_ADSTB#0
H_ADSTB#1

HPCREQ#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HADSTB#0
HADSTB#1

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

CLK PM

4
4

A11
A7
D7
B8
C7
A8
B9
E13

19
19
19
19

2

C

E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2

1

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

Alviso

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HOST

D

G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13

H _D#0
H _D#1
H _D#2
H _D#3
H _D#4
H _D#5
H _D#6
H _D#7
H _D#8
H _D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

DMI

U5B
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

6

of

51

5

11 DDRA_SDQ[0..63]
11 DDRA_SDM[0..7]
11 DDRA_SDQS[0..7]
11 DDRA_SMA[0..13]

4

3

2

1

DDRA_SD Q[0..63]
DDRA_S DM[0..7]
DDRA_SD QS[0..7]
DDR A_SMA[0..13]

12 DDRB_SMA[0..13]

DDR B_SMA[0..13]

D

D

U 5C

DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7

AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

DD RA_SDQS0
DD RA_SDQS1
DD RA_SDQS2
DD RA_SDQS3
DD RA_SDQS4
DD RA_SDQS5
DD RA_SDQS6
DD RA_SDQS7

AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

AN15
AP16
AF29
AF28
AP15

SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

C

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
11 DDRA_SCAS#
11 DDRA_SRAS#
11 DDRA_SW E#
B

U 5D

AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

DD RA_SDQ0
DD RA_SDQ1
DD RA_SDQ2
DD RA_SDQ3
DD RA_SDQ4
DD RA_SDQ5
DD RA_SDQ6
DD RA_SDQ7
DD RA_SDQ8
DD RA_SDQ9
D DRA_SDQ10
D DRA_SDQ11
D DRA_SDQ12
D DRA_SDQ13
D DRA_SDQ14
D DRA_SDQ15
D DRA_SDQ16
D DRA_SDQ17
D DRA_SDQ18
D DRA_SDQ19
D DRA_SDQ20
D DRA_SDQ21
D DRA_SDQ22
D DRA_SDQ23
D DRA_SDQ24
D DRA_SDQ25
D DRA_SDQ26
D DRA_SDQ27
D DRA_SDQ28
D DRA_SDQ29
D DRA_SDQ30
D DRA_SDQ31
D DRA_SDQ32
D DRA_SDQ33
D DRA_SDQ34
D DRA_SDQ35
D DRA_SDQ36
D DRA_SDQ37
D DRA_SDQ38
D DRA_SDQ39
D DRA_SDQ40
D DRA_SDQ41
D DRA_SDQ42
D DRA_SDQ43
D DRA_SDQ44
D DRA_SDQ45
D DRA_SDQ46
D DRA_SDQ47
D DRA_SDQ48
D DRA_SDQ49
D DRA_SDQ50
D DRA_SDQ51
D DRA_SDQ52
D DRA_SDQ53
D DRA_SDQ54
D DRA_SDQ55
D DRA_SDQ56
D DRA_SDQ57
D DRA_SDQ58
D DRA_SDQ59
D DRA_SDQ60
D DRA_SDQ61
D DRA_SDQ62
D DRA_SDQ63

12 DDRB_SBS0
12 DDRB_SBS1

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
12 DDRB_SCAS#
12 DDRB_SRAS#
12 DDRB_SW E#

AJ15
AG17
AG21

SB_BS0#
SB_BS1#
SB_BS2#

AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

AH14
AK14
AF15
AF14
AH16

SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

DDR SYSTEM MEMORY B

SA_BS0#
SA_BS1#
SA_BS2#

DDR MEMORY SYSTEM A

AK15
AK16
AL21

11 DDRA_SBS0
11 DDRA_SBS1

ALVISO_BGA1257

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

C

B

ALVISO_BGA1257

A

A

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

7

of

51

5

4

+3VS

3

2

1

+2.5VS
PCIE_MTX_C_GRX_N[0..15]

1

16 PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]

16 PCIE_MTX_C_GRX_P[0..15]

2
D

3

PCEI_GTX_C_MRX_P[0..15]

16 PCEI_GTX_C_MRX_P[0..15]

LBKLT_EN

S

1

16,34 GMCH_ENBKL

PCEI_GTX_C_MRX_N[0..15]

16 PCEI_GTX_C_MRX_N[0..15]

2
G

R402
GM@ 2.2K_0402_5%

D

D

Q44
GM@ BSS138_SOT23

U5G

2
R418

15 GMCH_CRT_CLK
15 GMCH_CRT_DATA
15 GMCH_CRT_B
15 GMCH_CRT_G
15 GMCH_CRT_R
C

15 GMCH_CRT_VSYNC
15 GMCH_CRT_HSYNC

1
4.99K_0402_1%

2
R399

2

4.7K_0402_5%

GMCH_CRT_CLK

R382 1

2

4.7K_0402_5%

GMCH_CRT_DATA

R400 1

2

2.2K_0402_5%

LCTLB_DATA

R39

B

1

2.2K_0402_5%

2

2
R384
2
R385
2
R386

E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
J20

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27

LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

GMCH_TXCLKGMCH_TXCLK+
GMCH_TZCLKGMCH_TZCLK+

B30
B29
C25
C24

LACLKN
LACLKP
LBCLKN
LBCLKP

GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-

B34
B33
B32

LADATAN0
LADATAN1
LADATAN2

1
0_0402_5%

1
150_0402_5%
1
150_0402_5%
1
150_0402_5%
1
R414

16 GMCH_ENVDD

2 REFSET
255_0402_1%

LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDD C_CLK
LDDC_DATA
GM CH_ENVDD
L IBG

LCTLA_CLK

R398 1

2

100K_0402_5%

LBKLT_EN

R403 1

2

1.5K_0402_1%

L IBG

R44

1

2

75_0402_1%

GMCH_TV_COMPS

R515 1

2

150_0402_5%

GMCH_TV_LUMA

R516 1

2

150_0402_5%

GMCH_TV_CRMA

16
16
16
16

GMCH_TXCLKGMCH_TXCLK+
GMCH_TZCLKGMCH_TZCLK+

16 GMCH_TXOUT016 GMCH_TXOUT116 GMCH_TXOUT216 GMCH_TXOUT0+
16 GMCH_TXOUT1+
16 GMCH_TXOUT2+

16 GMCH_TZOUT016 GMCH_TZOUT116 GMCH_TZOUT2-

MISC

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

GMCH_CRT_CLK
GMCH_CRT_DATA

+2.5VS
R381 1

A15
C16
A17
J18
B15
B16
B17

TV_REFSET

GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+

GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2-

A34
A33
B31

C29
D28
C27

EXP_COMPI
EXP_ICOMPO

PCI - EXPRESS GRAPHICS

GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

15 GMCH_TV_LUMA
15 GMCH_TV_CRMA

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

TV

14 CLK_MCH_3GPLL#
14 CLK_MCH_3GPLL

H24
H25
AB29
AC29

VGA

+2.5VS

2 @ 3K_0402_1%
2 @ 3K_0402_1%

LVDS

R38 1
R383 1

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

+2.5VS

2

2

+3VS

C28
D27
C26

LBDATAP0
LBDATAP1
LBDATAP2

PEG_COMP

1

2

R48

EXP_RXN0/SDVO_TVCLKIN# E30
EXP_RXN1/SDVO_INT# F34
EXP_RXN2/SDVO_FLDSTALL# G30
EXP_RXN3 H34
EXP_RXN4 J30
EXP_RXN5 K34
EXP_RXN6 L30
EXP_RXN7 M34
EXP_RXN8 N30
EXP_RXN9 P34
EXP_RXN10 R30
EXP_RXN11 T34
EXP_RXN12 U30
EXP_RXN13 V34
EXP_RXN14 W30
EXP_RXN15 Y34

PCEI_GTX_C_MRX_N0
PCEI_GTX_C_MRX_N1
PCEI_GTX_C_MRX_N2
PCEI_GTX_C_MRX_N3
PCEI_GTX_C_MRX_N4
PCEI_GTX_C_MRX_N5
PCEI_GTX_C_MRX_N6
PCEI_GTX_C_MRX_N7
PCEI_GTX_C_MRX_N8
PCEI_GTX_C_MRX_N9
PCEI_GTX_C_MRX_N10
PCEI_GTX_C_MRX_N11
PCEI_GTX_C_MRX_N12
PCEI_GTX_C_MRX_N13
PCEI_GTX_C_MRX_N14
PCEI_GTX_C_MRX_N15

EXP_RXP0/SDVO_TVCLKIN
EXP_RXP1/SDVO_INT
EXP_RXP2/SDVO_FLDSTALL
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34

PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_P15

EXP_TXN0/SDVOB_RED#
EXP_TXN1/SDVOB_GREEN#
EXP_TXN2/SDVOB_BLUE#
EXP_TXN3/SDVOB_CLKN
EXP_TXN4/SDVOC_RED#
EXP_TXN5/SDVOC_GREEN#
EXP_TXN6/SDVOC_BLUE#
EXP_TXN7/SDVOC_CLKN
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

EXP_TXP0/SDVOB_RED
EXP_TXP1/SDVOB_GREEN
EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP
EXP_TXP4/SDVOC_RED
EXP_TXP5/SDVOC_GREEN
EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

24.9_0402_1%

+1.5VS

C

C59

1

C71

1

C76

1

C80

1

C91

1

C100 1
C109 1
C116 1

C58

1

C63

1

C75

1

C79

1

C89

1

C98

1

C105 1
C115 1

C57
2 PM@ 0.1U_0402_16V4Z
C62
2 PM@ 0.1U_0402_16V4Z
C74
2 PM@ 0.1U_0402_16V4Z
C78
2 PM@ 0.1U_0402_16V4Z
C87
2 PM@ 0.1U_0402_16V4Z
C97
2 PM@ 0.1U_0402_16V4Z
C104
2 PM@ 0.1U_0402_16V4Z
C114
2 PM@ 0.1U_0402_16V4Z

1

C56
2 PM@ 0.1U_0402_16V4Z
C60
2 PM@ 0.1U_0402_16V4Z
C73
2 PM@ 0.1U_0402_16V4Z
C77
PM@
0.1U_0402_16V4Z
2
C83
2 PM@ 0.1U_0402_16V4Z
C92
PM@
0.1U_0402_16V4Z
2
C101
2 PM@ 0.1U_0402_16V4Z
C110
PM@
0.1U_0402_16V4Z
2

1

1
1
1
1
1
1
1

1
1
1
1
1
1
1

2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N5
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PM@
0.1U_0402_16V4Z
PCIE_MTX_C_GRX_N10
2
PCIE_MTX_C_GRX_N11
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PM@
0.1U_0402_16V4Z
PCIE_MTX_C_GRX_N14
2
PCIE_MTX_C_GRX_N15
B

2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15

3

1

S

D

GMCH_LCD_CLK

ALVISO_BGA1257

1

1

G

LDD C_CLK

R49
GM@ 4.7K_0402_5%

2

R45
GM@ 4.7K_0402_5%

16 GMCH_TZOUT0+
16 GMCH_TZOUT1+
16 GMCH_TZOUT2+

GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+

D36
D34

GMCH_LCD_CLK 16

Q6
GM@ 2N7002_SOT23

A

A

+2.5VS

2

2

+3VS

Compal Electronics, Inc.

G

3

1
D

GMCH_LCD_DATA

SCHEMATIC, M/B LA-2492

1

1

Title

S

LDDC_DATA

R401
GM@ 4.7K_0402_5%

2

R397
GM@ 4.7K_0402_5%

GMCH_LCD_DATA 16

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Q43
GM@ 2N7002_SOT23
5

4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

8

of

51

5

4

3

2

1

+1.05VS
U 5F
U5E

T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17

+1.05VS

D

C

+1.5VS
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

AC1
AC2
B23
C35
AA1
AA2

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_HMPLL1
VCCD_HMPLL2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

+3VS

120mA

VCCA_TVBG
VSSA_TVBG

H18
G18

VCCD_TVDAC
VCCDQ_TVDAC

D19
H17

24mA

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

B26
B25
A25

60mA

POWER

VCCA_LVDS

A35

VCCHV0
VCCHV1
VCCHV2

B22
B21
A21

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

B28
A28
A27

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

AF20
AP19
AF19
AF18

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

AE37
W37
U37
R37
N37
L37
J37

+1.5VS

10mA

+2.5VS

2mA
60mA
+1.5VS_DDRDLL

+1.5VS_PEG

1000mA
C23
0.47U_0603_16V4Z

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

Y29
Y28
Y27

VCCA_3GBG
VSSA_3GBG

F37
G37

VCC_SYNC

H20

K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1

+1.05VS

F17
E17
D18
C18
F18
E18

+1.5VS_3GPLL

0.15mA

1

2

+2.5VS_3GBG

1
F19
E19
G19

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC

+2.5VS
C24
70mA
0.47U_0603_16V4Z

VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51

POWER

2
1

C49
0.22U_0402_10V4Z

ALVISO_BGA1257

2
1

C34
0.22U_0402_10V4Z

B

2

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

C519
0.1U_0402_16V4Z
V 1.8_DDR_CAP1
2
1
V 1.8_DDR_CAP2
2
V 1.8_DDR_CAP5

4000mA

C505
0.1U_0402_16V4Z
1
2
1
C520
0.1U_0402_16V4Z

0.1U_0402_16V4Z
0.1U_0402_16V4Z
AM37
AH37
1
1
1
1
1
1
C457
C451
C452
AP29
AD28
+DDRVCC
C450
C456
C447
AD27
2
2
2
2
2
2
AC27
22U_1206_16V4Z_V1
AP26
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
AN26
D
AM26
+DDRVCC
AL26
2200mA
AK26
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AJ26
AH26
1
AG26
1
1
1
1
1
1
1
1
+
C494
C86
C81
C483
AF26
AE26
C88
C487
C498
C481
C486
AP25
2
2
2
2
2
2
2
2
330U_D2E_2.5VM 2
AN25
AM25
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AL25
AK25
AJ25
AH25
AG25
+2.5VS
AF25
VCCHV(Ball A21,B21,B22)
AE25
AE24
AE23
AE22
1
1
1
1
1
1
C417
C419
C413
C416
C21
C414
AE21
AE20
AE19
2 0.1U_0402_16V4Z 2 0.01U_0402_16V7K 2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z 2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z
AE18
AE17
AE16
AE15
AE14
VCCA_LVDS (Ball A35)
VCCTX_LVDS(Ball A27,A28,B28) C
AP13
AN13
+2.5VS
AM13
VCCA_CRTDAC(Ball F19,E19)
AL13
AK13
AJ13
AH13
1
1
1
1
C22
C434
C424
C431
AG13
AF13
AE13
2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z 2 0.022U_0402_16V7K
AP12
AN12
AM12
AL12
AK12
VCC_SYNC(Ball H20)
AJ12
AH12
AG12
VCCD_TVDAC (Ball D19)
+1.5VS
AF12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AE12
AD11
AC11
AB11
1
1
1
1
1
1
C82
C20
C415
C421
C425
C440
C437
AB10
0.1U_0402_16V4Z C517
AB9
0.1U_0402_16V4Z
AP8 V 1.8_DDR_CAP6 2
1
2
2
2
2
2
4.7U_0805_10V4Z 2
AM1 V 1.8_DDR_CAP4
2
1
AE1 V 1.8_DDR_CAP3
2
1
B
C490
0.1U_0402_16V4Z
0.022U_0402_16V7K
0.022U_0402_16V7K
0.1U_0402_16V4Z

ALVISO_BGA1257

2.2U_0603_6.3V6K

VCCD_LVDS(Ball A25,B25,B26)

VCCDQ_TVDAC (Ball H17)

+1.05VS

950mA
+1.5VS_DPLLA

+1.5VS_DPLLB
L6
CHB1608U301_0603
1
2
+1.5VS

60mA

+1.5VS_DDRDLL
L25
CHB1608U301_0603
1
2
+1.5VS

60mA

Change to 0 ohm

1

1

C412

C418

2 22U_1206_16V4Z_V1 2 0.1U_0402_16V4Z

1

+1.5VS_PEG

R86
0_0603_5%
1
2

+1.5VS

Change to 0 ohm

1

C426

2 22U_1206_16V4Z_V1 2 0.1U_0402_16V4Z

+1.5VS

1
1

C420

1

R415
0_0603_5%
1
2

1

C84

2 22U_1206_16V4Z_V1

1

C496

2 0.1U_0402_16V4Z

1

C446

2 22U_1206_16V4Z_V1

1

C449

2 4.7U_0805_10V4Z

+

C439

2 4.7U_0805_10V4Z

1

C462

2 2.2U_0603_6.3V6K

1

C463

2 2.2U_0603_6.3V6K

2

VCCA_TVDAC

470U_D2_2.5VM

60mA
A

+1.5VS_3GPLL
L8
CHB1608U301_0603
1
2
+1.5VS

60mA

Change to 0 ohm

1

C50

1

C478

1

C52

R79
L9
0.5_0603_1%
CHB1608U301_0603
1
2+3GPLL 1
2
+1.5VS

Change to 0 ohm

1

1

C482

C55

Change to 0 ohm

1

0.022U_0402_16V7K

2 22U_1206_16V4Z_V1 2 0.1U_0402_16V4Z

2 10U_1206_16V4Z 2 0.1U_0402_16V4Z

C432

1

0.022U_0402_16V7K

1

C422

1

C433

C438

+2.5VS_3GBG

2
1
R410

2
0_0603_5%

+2.5VS

2

2

0.1U_0402_16V4Z

1

C475

2 22U_1206_16V4Z_V1 2 0.1U_0402_16V4Z

C469

2 2.2U_0603_6.3V6K

VCCA_TVBG
(Ball H18)

+3VS_DAC

1
+1.5VS_MPLL
L7
CHB1608U301_0603
1
2
+1.5VS

2 2.2U_0603_6.3V6K

C53

+3VS

+1.5VS_HPLL

1

C474

2

2
A

0.1U_0402_16V4Z

120mA

C428
0.1U_0402_16V4Z

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

9

of

51

5

4

3

2

1

U 5H
U5I

D

C

B

+1.05VS

A

L12
M12
N12
P12
R12
T12
U12
V12
W12
L13
M13
N13
P13
R13
T13
U13
V13
W13

VTT_NCTF17
VTT_NCTF16
VTT_NCTF15
VTT_NCTF14
VTT_NCTF13
VTT_NCTF12
VTT_NCTF11
VTT_NCTF10
VTT_NCTF9
VTT_NCTF8
VTT_NCTF7
VTT_NCTF6
VTT_NCTF5
VTT_NCTF4
VTT_NCTF3
VTT_NCTF2
VTT_NCTF1
VTT_NCTF0

Y12
AA12
Y13
AA13
L14
M14
N14
P14
R14
T14
U14
V14
W14
Y14
AA14
AB14
L15
M15
N15
P15
R15
T15
U15
V15
W15
Y15
AA15
AB15
L16
M16
N16
P16
R16
T16
U16
V16
W16
Y16
AA16
AB16
R17
Y17
AA17
AB17
AA18
AB18
AA19
AB19
AA20
AB20
R21
Y21
AA21
AB21
Y22
AA22
AB22
Y23
AA23
AB23
Y24
AA24
AB24
Y25
AA25
AB25
Y26
AA26
AB26

VSS_NCTF68
VSS_NCTF67
VSS_NCTF66
VSS_NCTF65
VSS_NCTF64
VSS_NCTF63
VSS_NCTF62
VSS_NCTF61
VSS_NCTF60
VSS_NCTF59
VSS_NCTF58
VSS_NCTF57
VSS_NCTF56
VSS_NCTF55
VSS_NCTF54
VSS_NCTF53
VSS_NCTF52
VSS_NCTF51
VSS_NCTF50
VSS_NCTF49
VSS_NCTF48
VSS_NCTF47
VSS_NCTF46
VSS_NCTF45
VSS_NCTF44
VSS_NCTF43
VSS_NCTF42
VSS_NCTF41
VSS_NCTF40
VSS_NCTF39
VSS_NCTF38
VSS_NCTF37
VSS_NCTF36
VSS_NCTF35
VSS_NCTF34
VSS_NCTF33
VSS_NCTF32
VSS_NCTF31
VSS_NCTF30
VSS_NCTF29
VSS_NCTF28
VSS_NCTF27
VSS_NCTF26
VSS_NCTF25
VSS_NCTF24
VSS_NCTF23
VSS_NCTF22
VSS_NCTF21
VSS_NCTF20
VSS_NCTF19
VSS_NCTF18
VSS_NCTF17
VSS_NCTF16
VSS_NCTF15
VSS_NCTF14
VSS_NCTF13
VSS_NCTF12
VSS_NCTF11
VSS_NCTF10
VSS_NCTF9
VSS_NCTF8
VSS_NCTF7
VSS_NCTF6
VSS_NCTF5
VSS_NCTF4
VSS_NCTF3
VSS_NCTF2
VSS_NCTF1
VSS_NCTF0

V25
W25
L26
M26
N26
P26
R26
T26
U26
V26
W26

VCC_NCTF10
VCC_NCTF9
VCC_NCTF8
VCC_NCTF7
VCC_NCTF6
VCC_NCTF5
VCC_NCTF4
VCC_NCTF3
VCC_NCTF2
VCC_NCTF1
VCC_NCTF0

VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10
VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0

NCTF

+1.05VS

VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70
VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11

AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26

+DDRVCC

L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25

+1.05VS

U5J

VSS271
VSS270
VSS269
VSS268
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196

VSSALVDS

VSS

VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130

AL24
AN24
A26
E26
G26
J26
B27
E27
G27
W27
AA27
AB27
AF27
AG27
AJ27
AL27
AN27
E28
W28
AA28
AB28
AC28
A29
D29
E29
F29
G29
H29
L29
P29
U29
V29
W29
AA29
AD29
AG29
AJ29
AM29
C30
Y30
AA30
AB30
AC30
AE30
AP30
D31
E31
F31
G31
H31
J31
K31
L31
M31
N31
P31
R31
T31
U31
V31
W31
AD31
AG31
AL31
A32
C32
Y32
AA32
AB32

B36
AA11
AF11
AG11
AJ11
AL11
AN11
B12
D12
J12
A14
B14
F14
J14
K14
AG14
AJ14
AL14
AN14
C15
K15
A16
D16
H16
K16
AL16
C17
G17
AF17
AJ17
AN17
A18
B18
U18
AL18
C19
H19
J19
T19
W19
AG19
AN19
A20
D20
E20
F20
G20
V20
AK20
C21
F21
AF21
AN21
A22
D22
E22
J22
AH22
AL22
H23
AF23
B24
D24
F24
J24
AG24
AJ24

ALVISO_BGA1257

VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68

AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37

VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0

VSS

D

C

B

ALVISO_BGA1257

A

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492

ALVISO_BGA1257

5

Y1
D2
G2
J2
L2
P2
T2
V2
AD2
AE2
AH2
AL2
AN2
A3
C3
AA3
AB3
AC3
AJ3
C4
H4
L4
P4
U4
Y4
AF4
AN4
E5
W5
AL5
AP5
B6
J6
L6
P6
T6
AA6
AC6
AE6
AJ6
G7
V7
AA7
AG7
AK7
AN7
C8
E8
L8
P8
Y8
AL8
A9
H9
K9
T9
V9
AA9
AC9
AE9
AH9
AN9
D10
L10
Y10
AA10
F11
H11
Y11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

10

of

51

5

4

3

+DDRVCC

+DDRVCC

+DIMM_VREF

+DDRVCC

DDR A_DQ3
DD RA_DQ13

D

DDR A_DQ9
DD RA_DQS1
DD RA_DQ15
DD RA_DQ11
6
6

DDRA_CLK1
DDRA_CLK1#

DD RA_DQ16
DD RA_DQ20
DD RA_DQS2
DD RA_DQ18
DD RA_DQ22
DD RA_DQ25
DD RA_DQ29
DD RA_DQS3
DD RA_DQ27
DD RA_DQ30
C

6

DD RA_CKE1

DDRA_CKE1

DDRA_SMA12
DDRA_SMA9
DDRA_SMA7
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

7
7
6

DDRA_SMA10
DDRA_SBS0
DDRA_SW E#
D DRA_SCS#0
DDRA_SMA13

DDRA_SBS0
DDRA_SW E#
DDRA_SCS#0

DD RA_DQ36
DD RA_DQ33

B

DD RA_DQS4
DD RA_DQ38
DD RA_DQ35
DD RA_DQ41
DD RA_DQ44
DD RA_DQS5
DD RA_DQ46
DD RA_DQ47

DD RA_DQ52
DD RA_DQ53
DD RA_DQS6
DD RA_DQ54
DD RA_DQ50
DD RA_DQ60
DD RA_DQ56
DD RA_DQS7
A

DD RA_DQ57
DD RA_DQ62
D_CK_SDATA
D_CK_SCLK

12,14 D_CK_SDATA
12,14 D_CK_SCLK

+3VS

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

1

DD RA_SDQ0
DD RA_SDQ4

1
2

1
2

DDRA_SDM0
DD RA_SDQ6

10_0404_4P2R_5%
RP24
1
4 D DRA_DM0
2
3 DDR A_DQ6

DD RA_SDQS0
DD RA_SDQ7

10_0404_4P2R_5%
RP54
1
4 DD RA_DQS0
2
3 DDR A_DQ7

DDR A_DQ2
DDR A_DQ8
DD RA_DQ12
D DRA_DM1
DD RA_DQ14
DD RA_DQ10

2
1

DD RA_SDQ2
DD RA_SDQ8

1
2

10_0404_4P2R_5%
RP23
4 DDR A_DQ2
3 DDR A_DQ8

DD RA_SDQ3
D DRA_SDQ13

1
2

10_0404_4P2R_5%
RP53
4 DDR A_DQ3
3 DD RA_DQ13

DDRA_SMA11
DDRA_SMA8

2
1

3
4

2

D DRA_SDQ12
DDRA_SDM1

1
2

10_0404_4P2R_5%
RP22
4 DD RA_DQ12
3 D DRA_DM1

DD RA_SDQ9
DD RA_SDQS1

1
2

10_0404_4P2R_5%
RP52
4 DDR A_DQ9
3 DD RA_DQS1

DDRA_SMA6
DDRA_SMA4

2
1

56_0404_4P2R_5%
RP29
3
4

D DRA_SDQ14
D DRA_SDQ10

1
2

10_0404_4P2R_5%
RP21
4 DD RA_DQ14
3 DD RA_DQ10

D DRA_SDQ15
D DRA_SDQ11

1
2

10_0404_4P2R_5%
RP51
4 DD RA_DQ15
3 DD RA_DQ11

DDRA_SMA2
DDRA_SMA0

2
1

56_0404_4P2R_5%
RP28
3
4

D DRA_SDQ17
D DRA_SDQ21

1
2

10_0404_4P2R_5%
RP20
DD RA_DQ17
4
DD RA_DQ21
3

D DRA_SDQ16
D DRA_SDQ20

1
2

10_0404_4P2R_5%
RP50
4 DD RA_DQ16
3 DD RA_DQ20

DDRA_SBS1
D DRA_SRAS#

2
1

56_0404_4P2R_5%
RP27
3
4

DDRA_SDM2
D DRA_SDQ19

1
2

10_0404_4P2R_5%
RP19
D DRA_DM2
4
DD RA_DQ19
3

DD RA_SDQS2
D DRA_SDQ18

1
2

10_0404_4P2R_5%
RP49
4 DD RA_DQS2
3 DD RA_DQ18

D DRA_SCAS#
D DRA_SCS#1

2
1

56_0404_4P2R_5%
RP26
3
4

D DRA_SDQ23
D DRA_SDQ24

1
2

10_0404_4P2R_5%
RP18
DD RA_DQ23
4
DD RA_DQ24
3

D DRA_SDQ22
D DRA_SDQ25

1
2

10_0404_4P2R_5%
RP48
4 DD RA_DQ22
3 DD RA_DQ25

D DRA_SDQ28
DDRA_SDM3

10_0404_4P2R_5%
RP17
1
4 DD RA_DQ28
2
3 D DRA_DM3

D DRA_SDQ29
DD RA_SDQS3

10_0404_4P2R_5%
RP47
1
4 DD RA_DQ29
2
3 DD RA_DQS3

D DRA_SDQ26
D DRA_SDQ31

10_0404_4P2R_5%
RP16
1
4 DD RA_DQ26
2
3 DD RA_DQ31

D DRA_SDQ27
D DRA_SDQ30

10_0404_4P2R_5%
RP46
1
4 DD RA_DQ27
2
3 DD RA_DQ30

D DRA_SDQ37
D DRA_SDQ32

1
2

10_0404_4P2R_5%
RP15
4 DD RA_DQ37
3 DD RA_DQ32

D DRA_SDQ36
D DRA_SDQ33

1
2

10_0404_4P2R_5%
RP45
4 DD RA_DQ36
3 DD RA_DQ33

DDRA_SDM4
D DRA_SDQ39

1
2

10_0404_4P2R_5%
RP14
4 D DRA_DM4
3 DD RA_DQ39

DD RA_SDQS4
D DRA_SDQ38

1
2

10_0404_4P2R_5%
RP44
4 DD RA_DQS4
3 DD RA_DQ38

D DRA_SDQ34
D DRA_SDQ45

1
2

10_0404_4P2R_5%
RP13
4 DD RA_DQ34
3 DD RA_DQ45

D DRA_SDQ35
D DRA_SDQ41

1
2

10_0404_4P2R_5%
RP43
4 DD RA_DQ35
3 DD RA_DQ41

D DRA_SDQ40
DDRA_SDM5

10_0404_4P2R_5%
RP12
1
4 DD RA_DQ40
2
3 D DRA_DM5

D DRA_SDQ44
DD RA_SDQS5

10_0404_4P2R_5%
RP42
1
4 DD RA_DQ44
2
3 DD RA_DQS5

D DRA_SDQ42
D DRA_SDQ43

10_0404_4P2R_5%
RP11
1
4 DD RA_DQ42
2
3 DD RA_DQ43

D DRA_SDQ46
D DRA_SDQ47

10_0404_4P2R_5%
RP41
1
4 DD RA_DQ46
2
3 DD RA_DQ47

D DRA_SDQ49
D DRA_SDQ48

10_0404_4P2R_5%
RP10
1
4 DD RA_DQ49
2
3 DD RA_DQ48

D DRA_SDQ52
D DRA_SDQ53

10_0404_4P2R_5%
RP40
1
4 DD RA_DQ52
2
3 DD RA_DQ53

DDRA_SDM6
D DRA_SDQ55

10_0404_4P2R_5%
RP9
1
4 D DRA_DM6
2
3 DD RA_DQ55

DD RA_SDQS6
D DRA_SDQ54

10_0404_4P2R_5%
RP39
1
4 DD RA_DQS6
2
3 DD RA_DQ54

D DRA_SDQ51
D DRA_SDQ61

1
2

10_0404_4P2R_5%
RP8
4 DD RA_DQ51
3 DD RA_DQ61

D DRA_SDQ50
D DRA_SDQ60

1
2

R91

C121
0.1U_0402_16V4Z

D DRA_DM2
DD RA_DQ19
DD RA_DQ23
DD RA_DQ24
DD RA_DQ28
D DRA_DM3
DD RA_DQ26
DD RA_DQ31

DDRA_CKE0 6

DDRA_SMA11
DDRA_SMA8
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1
D DRA_SRAS#
D DRA_SCAS#
D DRA_SCS#1

DDR A_DQ0
DDR A_DQ4

4
3

DDR A_DQ1
DDR A_DQ5

+DDRVTT

RP30

D

1K_0402_1%

DD RA_DQ17
DD RA_DQ21

DD RA_CKE0

4
3

R92
1K_0402_1%

D DRA_DM0
DDR A_DQ6

RP55
DD RA_SDQ1
DD RA_SDQ5

DDR A_DQ0
DDR A_DQ4

1

DD RA_DQS0
DDR A_DQ7

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS

2

DDR A_DQ1
DDR A_DQ5

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

1

RP25

JP24

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2

DDRA_SBS1 7
DDRA_SRAS# 7
DDRA_SCAS# 7
DDRA_SCS#1 6

DD RA_DQ37
DD RA_DQ32
D DRA_DM4
DD RA_DQ39
DD RA_DQ34
DD RA_DQ45
DD RA_DQ40
D DRA_DM5
DD RA_DQ42
DD RA_DQ43
DDRA_CLK2# 6
DDRA_CLK2 6
DD RA_DQ49
DD RA_DQ48
D DRA_DM6
DD RA_DQ55
DD RA_DQ51
DD RA_DQ61

D DRA_SDQ58
DDRA_SDM7

10_0404_4P2R_5%
RP7
1
4 DD RA_DQ58
2
3 D DRA_DM7

D DRA_SDQ56
DD RA_SDQS7

10_0404_4P2R_5%
RP37
1
4 DD RA_DQ56
2
3 DD RA_DQS7

D DRA_SDQ63
D DRA_SDQ59

1
2

10_0404_4P2R_5%
RP6
4 DD RA_DQ63
3 DD RA_DQ59

D DRA_SDQ57
D DRA_SDQ62

1
2

DD RA_DQ58
D DRA_DM7
DD RA_DQ63
DD RA_DQ59

10_0404_4P2R_5%
RP38
4 DD RA_DQ50
3 DD RA_DQ60

10_0404_4P2R_5%

56_0404_4P2R_5%
RP35
DDRA_SMA12
DDRA_SMA9

2
1

DDRA_SMA7
DDRA_SMA5

56_0404_4P2R_5%
RP34
2
3
1
4

DDRA_SMA3
DDRA_SMA1

2
1

56_0404_4P2R_5%
RP33
3
4

DDRA_SMA10
DDRA_SBS0

2
1

56_0404_4P2R_5%
RP32
3
4

DDRA_SW E#
D DRA_SCS#0

2
1

56_0404_4P2R_5%
RP31
3
4

DDRA_SMA13

1
R89
1
R90
1
R87

3
4
C

56_0404_4P2R_5%

DD RA_CKE1
DD RA_CKE0

DDRA_DQ[0..63]

2
56_0402_5%
2
56_0402_5%
2
56_0402_5%

B

DDRA_DQ[0..63] 12

DDRA_DM [0..7]

DDRA_DM[0..7] 12

DDRA_DQS [0..7]

DDRA_DQS[0..7] 12

DDRA_SD Q[0..63]

7 DDRA_SDQ[0..63]

DDRA_S DM[0..7]

7 DDRA_SDM[0..7]

DDRA_SD QS[0..7]

7 DDRA_SDQS[0..7]

DDR A_SMA[0..13]

7 DDRA_SMA[0..13]

10_0404_4P2R_5%
RP36
4 DD RA_DQ57
3 DD RA_DQ62

A

10_0404_4P2R_5%

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
AMP_1565917-1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DIMM0
5

4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

11

of

51

A

B

C

D

+DDRVCC

E

+DDRVCC

+DIMM_VREF

JP25
+DDRVTT
11 DDRA_DQ[0..63]
RP94

RP80

1

DDR A_DQ0
DDR A_DQ4

1
2

D DRA_DM0
DDR A_DQ6

56_0404_4P2R_5%
RP79
1
4
2
3

56_0404_4P2R_5%
RP95
3
2
4
1

DDR A_DQ2
DDR A_DQ8

56_0404_4P2R_5%
RP78
1
4
2
3

56_0404_4P2R_5%
RP96
3
2
4
1

DDR A_DQ3
DD RA_DQ13

DD RA_DQ12
D DRA_DM1

56_0404_4P2R_5%
RP77
1
4
2
3

56_0404_4P2R_5%
RP97
3
2
4
1

DDR A_DQ9
DD RA_DQS1

DD RA_DQ14
DD RA_DQ10

56_0404_4P2R_5%
RP76
1
4
2
3

56_0404_4P2R_5%
RP98
3
2
4
1

DD RA_DQ15
DD RA_DQ11

DD RA_DQ17
DD RA_DQ21

56_0404_4P2R_5%
RP75
1
4
2
3

56_0404_4P2R_5%
RP99
3
2
4
1

D DRA_DM2
DD RA_DQ19

56_0404_4P2R_5%
RP74
1
4
2
3

56_0404_4P2R_5%
RP100
3
2
4
1

DD RA_DQS2
DD RA_DQ18

DD RA_DQ23
DD RA_DQ24

1
2

56_0404_4P2R_5%
RP73
4
3

56_0404_4P2R_5%
RP101
3
2
4
1

DD RA_DQ22
DD RA_DQ25

DD RA_DQ28
D DRA_DM3

1
2

56_0404_4P2R_5%
RP72
4
3

56_0404_4P2R_5%
RP102
3
2
4
1

DD RA_DQ29
DD RA_DQS3

DD RA_DQ26
DD RA_DQ31

56_0404_4P2R_5%
RP71
1
4
2
3

56_0404_4P2R_5%
RP103
3
2
4
1

DD RA_DQ27
DD RA_DQ30

DDRB_SMA11
DDRB_SMA8

1
2

56_0404_4P2R_5%
RP70
4
3

56_0404_4P2R_5%
RP104
3
2
4
1

DDRB_SMA12
DDRB_SMA9

DDRB_SMA6
DDRB_SMA4

56_0404_4P2R_5%
RP69
1
4
2
3

56_0404_4P2R_5%
RP105
3
2
4
1

DDRB_SMA7
DDRB_SMA5

DDRB_SMA2
DDRB_SMA0

56_0404_4P2R_5%
RP68
1
4
2
3

56_0404_4P2R_5%
RP106
3
2
4
1

DDRB_SBS1
D DRB_SRAS#

56_0404_4P2R_5%
RP67
1
4
2
3

56_0404_4P2R_5%
RP107
3
2
4
1

DDRB_SBS0
DDRB_SW E#

D DRB_SCAS#
D DRB_SCS#1

56_0404_4P2R_5%
RP66
1
4
2
3

56_0404_4P2R_5%
RP108
3
2
4
1

D DRB_SCS#0
DDRB_SMA13

DD RA_DQ37
DD RA_DQ32

56_0404_4P2R_5%
RP65
1
4
2
3

56_0404_4P2R_5%
RP109
3
2
4
1

2

3

D DRA_DM4
DD RA_DQ39

1
2

4
3

56_0404_4P2R_5%
RP64
4
3

3
4

2
1

56_0404_4P2R_5%
RP110
3
2
4
1

DDR A_DQ1
DDR A_DQ5

DDR A_DQ1
DDR A_DQ5

DDRA_DQ[0..63]
DDRA_DM [0..7]

11 DDRA_DM[0..7]

DD RA_DQS0
DDR A_DQ7

DDRA_DQS [0..7]

11 DDRA_DQS[0..7]
7 DDRB_SMA[0..13]

DDR A_DQ3
DD RA_DQ13

DDR B_SMA[0..13]

DD RA_DQS0
DDR A_DQ7

DDR A_DQ9
DD RA_DQS1
DD RA_DQ15
DD RA_DQ11
6
6

DDRB_CLK1
DDRB_CLK1#

DD RA_DQ16
DD RA_DQ20
DD RA_DQS2
DD RA_DQ18
DD RA_DQ22
DD RA_DQ25

DD RA_DQ16
DD RA_DQ20

DD RA_DQ29
DD RA_DQS3
DD RA_DQ27
DD RA_DQ30

+DDRVTT

DDRB_SMA10
1
R445
DD RB_CKE1
1
R444
DD RB_CKE0
1
R93

2
56_0402_5%
2
56_0402_5%
2
56_0402_5%

6

DDRB_CKE1

DDRB_SMA12
DDRB_SMA9
DDRB_SMA7
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

RP59

DDRB_SMA3
DDRB_SMA1

DD RA_DQ36
DD RA_DQ33

DD RA_DQS4
DD RA_DQ38

DD RA_DQ34
DD RA_DQ45

1
2

56_0404_4P2R_5%
RP63
4
3

56_0404_4P2R_5%
RP111
3
2
4
1

DD RA_DQ40
D DRA_DM5

56_0404_4P2R_5%
RP62
1
4
2
3

56_0404_4P2R_5%
RP112
3
2
4
1

DD RA_DQ42
DD RA_DQ43

56_0404_4P2R_5%
RP61
1
4
2
3

56_0404_4P2R_5%
RP113
3
2
4
1

DD RA_DQ46
DD RA_DQ47

DD RA_DQ49
DD RA_DQ48

1
2

56_0404_4P2R_5%
RP60
4
3

56_0404_4P2R_5%
RP114
3
2
4
1

DD RA_DQ52
DD RA_DQ53

56_0404_4P2R_5%

56_0404_4P2R_5%

DD RA_DQ35
DD RA_DQ41

1
2

D DRA_DM6
DD RA_DQ55

56_0404_4P2R_5%
RP58
4
1
3
2

DD RA_DQ51
DD RA_DQ61

56_0404_4P2R_5%
RP57
4
1
3
2

DD RA_DQ58
D DRA_DM7

56_0404_4P2R_5%
RP56
4
1
3
2

DD RA_DQ63
DD RA_DQ59

56_0404_4P2R_5%
RP115
3
4

2
1

DD RA_DQS6
DD RA_DQ54

56_0404_4P2R_5%
RP116
3
2
4
1

DD RA_DQ50
DD RA_DQ60

4
3

7
7
6

DDRB_SBS0
DDRB_SW E#
DDRB_SCS#0

A

DDRB_SMA10
DDRB_SBS0
DDRB_SW E#
D DRB_SCS#0
DDRB_SMA13
DD RA_DQ36
DD RA_DQ33
DD RA_DQS4
DD RA_DQ38
DD RA_DQ35
DD RA_DQ41
DD RA_DQ44
DD RA_DQS5
DD RA_DQ46
DD RA_DQ47

56_0404_4P2R_5%
RP117
3
2
4
1

DD RA_DQ56
DD RA_DQS7

56_0404_4P2R_5%
RP118
3
2
4
1

DD RA_DQ57
DD RA_DQ62

DD RA_DQ52
DD RA_DQ53
DD RA_DQS6
DD RA_DQ54
DD RA_DQ50
DD RA_DQ60
DD RA_DQ56
DD RA_DQS7

56_0404_4P2R_5%

4

DD RB_CKE1

DD RA_DQ57
DD RA_DQ62

DD RA_DQ44
DD RA_DQS5
11,14 D_CK_SDATA
11,14 D_CK_SCLK

D_CK_SDATA
D_CK_SCLK
+3VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

DDR A_DQ0
DDR A_DQ4

1

D DRA_DM0
DDR A_DQ6

2

C120
0.1U_0402_16V4Z

DDR A_DQ2
DDR A_DQ8
DD RA_DQ12
D DRA_DM1

1

DD RA_DQ14
DD RA_DQ10

DD RA_DQ17
DD RA_DQ21

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

D DRA_DM2
DD RA_DQ19
DD RA_DQ23
DD RA_DQ24
DD RA_DQ28
D DRA_DM3
DD RA_DQ26
DD RA_DQ31

2

DD RB_CKE0

DDRB_CKE0 6

DDRB_SMA11
DDRB_SMA8
DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1
D DRB_SRAS#
D DRB_SCAS#
D DRB_SCS#1

DDRB_SBS1 7
DDRB_SRAS# 7
DDRB_SCAS# 7
DDRB_SCS#1 6

DD RA_DQ37
DD RA_DQ32
D DRA_DM4
DD RA_DQ39

3

DD RA_DQ34
DD RA_DQ45
DD RA_DQ40
D DRA_DM5
DD RA_DQ42
DD RA_DQ43
DDRB_CLK2# 6
DDRB_CLK2 6
DD RA_DQ49
DD RA_DQ48
D DRA_DM6
DD RA_DQ55
DD RA_DQ51
DD RA_DQ61
DD RA_DQ58
D DRA_DM7
DD RA_DQ63
DD RA_DQ59
4

+3VS

Compal Electronics, Inc.

AMP_1565918-1
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

C

D

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
E

12

of

51

A

B

C

D

E

Layout note :
Distrib ute as close as possible
to DDR-SODIMM.

+DDRVCC
1

1

1

2

1
C117
0.1U_0402_16V4Z

2

1
C103
0.1U_0402_16V4Z

2

1
C122
0.1U_0402_16V4Z

2

1
C102
0.1U_0402_16V4Z

2

+DDRVCC

2

1
C118
0.1U_0402_16V4Z

2

1
C136
0.1U_0402_16V4Z

2

1
C119
0.1U_0402_16V4Z

2

C138
0.1U_0402_16V4Z

+DDRVCC

1

2

1
C99
0.1U_0402_16V4Z

1
C137
0.1U_0402_16V4Z

2

1
C135
0.1U_0402_16V4Z

2

1
C124
0.1U_0402_16V4Z

2

1
C123
0.1U_0402_16V4Z

1

+

+

2

C85
150U_D2_6.3VM

2

C139
150U_D2_6.3VM

Layout note :
2

2

Place o ne cap close to every 2 pull up resistors termination to
+1.25V

+DDRVTT

1

2

1
C133
0.1U_0402_16V4Z

2

1
C532
0.1U_0402_16V4Z

2

1
C533
0.1U_0402_16V4Z

2

1
C128
0.1U_0402_16V4Z

2

1
C550
0.1U_0402_16V4Z

2

1
C130
0.1U_0402_16V4Z

2

1
C525
0.1U_0402_16V4Z

2

C526
0.1U_0402_16V4Z

+DDRVTT

1

2

1
C527
0.1U_0402_16V4Z

2

1
C528
0.1U_0402_16V4Z

2

1
C524
0.1U_0402_16V4Z

2

1
C131
0.1U_0402_16V4Z

2

1
C531
0.1U_0402_16V4Z

2

1
C549
0.1U_0402_16V4Z

2

1
C548
0.1U_0402_16V4Z

2

C132
0.1U_0402_16V4Z

3

3

+DDRVTT

1

2

1
C547
0.1U_0402_16V4Z

2

1
C546
0.1U_0402_16V4Z

2

1
C545
0.1U_0402_16V4Z

2

1
C544
0.1U_0402_16V4Z

2

1
C543
0.1U_0402_16V4Z

2

1
C542
0.1U_0402_16V4Z

2

1
C541
0.1U_0402_16V4Z

2

C540
0.1U_0402_16V4Z

+DDRVTT
+DDRVTT

1
1

2

1
C127
0.1U_0402_16V4Z

2

1
C535
0.1U_0402_16V4Z

2

1
C534
0.1U_0402_16V4Z

2

1
C134
0.1U_0402_16V4Z

2

1
C126
0.1U_0402_16V4Z

2

1
C125
0.1U_0402_16V4Z

2

1
C529
0.1U_0402_16V4Z

2

2

C113
0.1U_0402_16V4Z

1
C539
0.1U_0402_16V4Z

2

1
C538
0.1U_0402_16V4Z

2

1
C537
0.1U_0402_16V4Z

2

C536
0.1U_0402_16V4Z

+DDRVTT
4

4

1

2

1
C112
0.1U_0402_16V4Z

2

1
C129
0.1U_0402_16V4Z

2

1
C111
0.1U_0402_16V4Z

2

1
C530
0.1U_0402_16V4Z

2

1
C96
0.1U_0402_16V4Z

2

1
C95
0.1U_0402_16V4Z

2

1
C94
0.1U_0402_16V4Z

2

C93
0.1U_0402_16V4Z

Title

Compal Electronics, Inc.
SCHEMATIC, M/B LA-2492

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
E

13

of

51

A

B

C

D

+CLK_VDD48

FSC

FSB

FSA

CLKSEL0

CLKSEL1

CLKSEL2

CPU SRC PCI
MHz MHz MHz

1

2 2.2U_0603_6.3V6K

*

1

0

0

0

0

1

0

1

0

1

100

100

33.3

1

133

100

33.3

1

166

100

33.3

200

100

33.3

+ CLK_VDDREF

1

C555

E

+3VS

1

C157

2 0.047U_0402_16V7K

2

F

2

H

Clock Generator

+CLK_VDD1

L10
KC FBM-L11-201209-221LMAT_0805
1
2
Change to 0 ohm 1

C156
0.047U_0402_16V7K

G

40mil
1

C144
2.2U_0603_6.3V6K

2

1
C149
0.047U_0402_16V7K

2

1
C145
0.047U_0402_16V7K

1
C147
0.047U_0402_16V7K

2

2

C152
0.047U_0402_16V7K

1

1

+CLK_VCCA

+CLK_VDD1
U8

21
28
34

Table : ICS 954206B

+3VS

1
7
CLKSEL2
2
10K_0402_5%

1
R139

CL K_PCI2
2
10K_0402_5%

1
R141

CL K_PCI1
2
10K_0402_5%

14.318MHZ_20P_1BX14318CC1A
1
2
C162
33P_0402_50V8J

1

1
R153

Y1

1
R135

42
48
2 + CLK_VDDREF
1_0402_5%
15mil

VDDCPU
VDDREF

1
R455

11
2 +CLK_VDD48
2.2_0402_5%
15mil

VDD48

2 12_0402_5%

CLK_SD_48M
R147 1
CLK_14M_CODEC
2
R151

2 12_0402_5%
1
12_0402_5%

2

C161
33P_0402_50V8J
1
2
CLK_ICH_48M R143 1

19 CLK_ICH_48M
2

24 CLK_SD_48M
30 CLK_14M_CODEC

CLK_PC I_MINI

29 CLK_PCI_MINI

24 CLK_PCI_PCM
34 CLK_PCI_LPC

17 CLK_PCI_ICH

50

XTALOUT

49

CLKSEL2
CLKSEL0

12
53

FS_A/USB_48MHz
REF1/FSLC/TEST_SEL

CLKSEL1

16

FSLB/TEST_MODE

3

D

S

2
G
1

PCICLK5

3

D

S

2
G
1

R124 1

2 33_0402_5%

CLK_MCH_BCLK

CLK_CPU1# R120 1

2 33_0402_5%

CLK_MCH_BCLK#

CPUCLKT0

44

C LK_CPU0

R134 1

2 33_0402_5%

CLK_CPU_BCLK

CPUCLKC0

43

CLK_CPU0# R128 1

2 33_0402_5%

CLK_CPU_BCLK#

CPUCLKT2_ITP/PCIEXT6

36

C LK_CPU2

R113 1

2 33_0402_5%

CLK_CPU_ITP

CPUCLKC2_ITP/PCIEXC6

35

CLK_CPU2# R109 1

2 33_0402_5%

CLK_CPU_ITP#

32

CL K_PCI2

56

CL K_PCI1

9

CLK_PCI_ICH

2
33_0402_5%

CL K_PCI0

47

PCICLK2/REQ_SEL
PCIEXT4

31

C LK_SRC5

PCIEXC4

30

CLK_SRC5# R99

ITP_EN/PCICLK_F0

SATACLKT

26

C LK_SRC4

SCLK

SATACLKC

27

CLK_SRC4# R96

SELPCIEX_LCDCLK#/PCICLK_F1

SDATA

13

+3VS

1

C165
2 2.2U_0603_6.3V6K

C159
C163
2 0.047U_0402_16V7K 2 0.047U_0402_16V7K

CLK_MCH_BCLK# 6

R105 1

2 33_0402_5%

C LK_PCIE_LAN

1

2 33_0402_5%

CLK_PCIE_LAN#

R100 1

2 33_0402_5%

CLK_PCIE_SATA

1

2 33_0402_5%

CLK_PCIE_SATA#

R106 1

2 33_0402_5%

CLK_MCH_3GPLL

PCIEXT3

24

C LK_SRC3

PCIEXC3

25

CLK_SRC3# R102 1

2 33_0402_5%

CLK_MCH_3GPLL#

PCIEXT2

22

C LK_SRC2

R114 1

2 33_0402_5%

CLK_PCIE_VGA

PCIEXC2

23

CLK_SRC2# R110 1

2 33_0402_5%

CLK_PCIE_VGA#

PCIEXT1

19

C LK_SRC1

R121 1

2 33_0402_5%

CLK_PC IE_ICH

PCIEXC1

20

CLK_SRC1# R117 1

2 33_0402_5%

CLK_P CIE_ICH#

R129 1

2 33_0402_5%

CL K_DREF_SSC

29

GND_1

LCDCLK_SS/PCIEX0T

17

C LK_SRC0

2

GND_2

LCDCLK_SS/PCIEX0C

18

CLK_SRC0# R125 1

2 33_0402_5%

C LK_DREF_SSC#

45

GND_3
DOTT_96MHz
DOTC_96MHz

14
15

CLK_DOT
CLK_DOT#

2 33_0402_5%
2 33_0402_5%

CLK_DREF_96M
CLK_DREF_96M#

51

GND_4

6

GND_5

R136 1
R131 1

+3VS

A

2

2

+1.05VS

R456
@ 1K_0402_5%
R457
0_0402_5%
1
2

2
R459
0_0402_5%

1

MCH_CLKSEL0 6
CPU_BSEL0 5

B

R453
4.7K_0402_5%
CLKSEL1 1
2

1
R451
@ 0_0402_5%

2

1

2
1
R458
@ 0_0402_5%

1

R460
4.7K_0402_5%
CLKSEL0 1
2

CLK_CPU_BCLK# 4

CLK_PCIE_LAN 27
CLK_PCIE_LAN# 27
CLK_PCIE_SATA 18
CLK_PCIE_SATA# 18
CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8
CLK_PCIE_VGA 16
CLK_PCIE_VGA# 16

C

1

2

3

CLK_PCIE_ICH# 19

1
R138

CLK_DREF_SSC 6
CLK_DREF_SSC# 6
CLK_DREF_96M 6
CLK_DREF_96M# 6

2
10K_0402_5%

VGATE

52

VTT_POWERGD#
C LK_REF

1
R144

CLK_14M_SIO
2
12_0402_5%

CLK_14M_SIO 33

1
R148

CLK_ICH_14M
2
12_0402_5%

CLK_ICH_14M 19

1

3
S

10

REF0

R454
@ 1K_0402_5%

2
R448
0_0402_5%

2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%

CLK_PCIE_ICH 19

D

VTT_PWRGD#/PD

ICS954226AGT_TSSOP56

R450
0_0402_5%
1
2

1
R123
1
R119
CLK_CPU_BCLK
1
R133
CLK_CPU_BCLK# 1
R127
CLK_CPU_ITP
1
R112
CLK_CPU_ITP#
1
R108
C LK_PCIE_LAN
1
R104
CLK_PCIE_LAN# 1
R98
CLK_PCIE_SATA
1
R101
CLK_PCIE_SATA# 1
R97
CLK_MCH_3GPLL 1
R107
CLK_MCH_3GPLL# 1
R103
CLK_PCIE_VGA
1
R115
CLK_PCIE_VGA# 1
R111
CLK_PC IE_ICH
1
R122
CLK_P CIE_ICH#
1
R118
CL K_DREF_SSC 1
R130
C LK_DREF_SSC# 1
R126
CLK_DREF_96M
1
R137
CLK_DREF_96M# 1
R132

GND_0

D_CK_SDATA

+1.05VS

CLK_MCH_BCLK

CLK_CPU_BCLK 4

Q17
2N7002_SOT23

4

1

CLK_MCH_BCLK 6

IREF

+3VS

+3VS

CK_SDATA

C LK_CPU1

33

39
2 CLKIR EF
475_0402_1% 15mil

1

PM_STP_CPU# 19,49

40

PEREQ1#/PCIEXT5

46

PM_STP_PCI# 19

41

PEREQ2#/PCIEXC5

8

Change to 0 ohm

CPUCLKT1

PCICLK3

1
R146

40mil

CLK_MCH_BCLK#

X2

5

+CLK_VDD2

L11
KC FBM-L11-201209-221LMAT_0805
1
2

+3VS

C150
2 0.047U_0402_16V7K

CPUCLKC1

PCICLK4

Q16
2N7002_SOT23

19

54

3

D_CK_SCLK

R461
4.7K_0402_5%
1
2

CPU_STOP#

STP_CPU#

+CLK_VDD1

X1

+3VS

CK_SCLK

STP_PCI#

4

3

19

55

CL K_PCI3

1
R452

R462
4.7K_0402_5%
1
2

PCI/SRC_STOP#

CL K_PCI4

D_CK_SDATA

11,12 D_CK_SDATA

GNDA

2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%

D_CK_SCLK

11,12 D_CK_SCLK

37
38

1
R150
1
R149
CLK_PCI_PCM 1
R154
C LK_PCI_LPC
1
R142
CLK _PCI_SIO

33 CLK_PCI_SIO

XTALIN

1

C553
2 2.2U_0603_6.3V6K

VDDA

VDDPCI_0
VDDPCI_1

+CLK_VDD1

CL K_PCI0
2
10K_0402_5%

1
R145

VDDPCIEX_0
VDDPCIEX_1
VDDPCIEX_2

40mil

6,19,49

2
G

+CLK_VDD2

1

1
2
R449
2.2_0402_5%

Q14
2N7002_SOT23

4

Compal Electronics, Inc.
Title

MCH_CLKSEL1 6
CPU_BSEL1 5

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D

E

F

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005
G

Sheet

of

14
H

51

C

D_ CRT_R
D_CRT_G
D_CRT_B

R517 1
R518 1
R519 1

2 470_0402_5%
2 470_0402_5%
2 470_0402_5%

E

+5VS

D23
D22
@ DAN217_SC59 @ DAN217_SC59

+R_CRT_VCC

2

+5VS

1
1

R21
R19

1
1

R18

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

1A
2A
3A
4A

8

2
5
11
14

1B2
2B2
3B2
4B2

3
6
10
13

1
R571

CRT_B_F

1
R572

2

R2

2

150_0402_5%

1

R3

150_0402_5%

1

C9

1

C8

1

C7
C1
@ 8P_0402_50V8K

150_0402_5% 2 8P_0402_50V8K 2 8P_0402_50V8K 2

1

P
OE#

C RT_HSYNC 2

A

G

2
PM@ 0_0402_5%
2
GM@ 39_0402_5%

Y

1
10K_0402_5%

1
L2

SUYIN_070453FR015S208CU

3

2

1

C5
10P_0402_50V8J

U1
SN74AHCT1G125GW_SOT353-5

1

1

2

2

C6

C409 2
68P_0402_50V8K

10P_0402_50V8J

8 GMCH_CRT_VSYNC

CRT_VS YNC

A

C407
68P_0402_50V8K

D_CRT_HSYNC 39

5
1
2

P
OE#

2
PM@ 0_0402_5%
2
GM@ 39_0402_5%

G

1
R377
1
R378

2

3

16 VGA_CRT_VSYNC

2
0.1U_0402_16V4Z

2

DSUB_15

1

+CRT_VCC

1
C410

17

VSYNC_L

2
FCM1608C-121T_0603

D_CRT_HSYNC

4

2
100P_0402_50V8J

H S YNC_L

2
FCM1608C-121T_0603

1

16

DSUB_12

5
1
8 GMCH_CRT_HSYNC

3

1
R8
1
R7

16 VGA_CRT_HSYNC

C408

2
@ 8P_0402_50V8K
1
L1

2
R6

C3
@ 8P_0402_50V8K
2

2

8P_0402_50V8K

2
0.1U_0402_16V4Z

C10

1

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

DDC_MD2

1
C2

+CRT_VCC

Pop with No-Docking
2

3

1
2 CRT_R_L
L3
FCM2012C-800_0805
1
2 CRT_G_L
L4
FCM2012C-800_0805
1
2 CRT_B_L
L5
FCM2012C-800_0805

CRT_B

2

2
1

CRT_G

W /D@
FSAV330MTC_TSSOP16

C RT_R
W O/D@ 0_0402_5%
2 CRT_G
W O/D@ 0_0402_5%
2 CRT_B
W O/D@ 0_0402_5%

1
R570

CRT_G_F

C4
0.1U_0402_16V4Z

JP1

C RT_R

R1
C RT_R_F

1

D21
@ DAN217_SC59

D_CRT_R 39
D_CRT_G 39
D_CRT_B 39

GND

0_0402_5%

POLYSW ITCH_1A

+3VS
D_ CRT_R
D_CRT_G
D_CRT_B

1

16 VGA_CRT_B
8 GMCH_CRT_B

2 PM@
2
GM@
2 PM@
2
GM@
2 PM@
2
GM@

1
1

R33
R32

16

1B1
2B1
3B1
4B1

2

16 VGA_CRT_G
8 GMCH_CRT_G

R34

4
7
9
12

VCC

1

16 VGA_CRT_R
8 GMCH_CRT_R

C RT_R_F
CRT_G_F
CRT_B_F

SEL
OE#

1

1

1
15

2

2

U4
DOCKIN#

34,39 DOCKIN#

3

2 0.1U_0402_16V4Z

1

W=40mils

F1

1

RB411D_SOT23
C18

+CRT_VCC

W=40mils

D1

1

CRT Connector

D

1

B

1

A

Y

D_CRT_V SYNC

4

D_CRT_VSYNC 39

U35
SN74AHCT1G125GW_SOT353-5

2
G

+2.5VS

R379

2 GM@ 0_0402_5%

+2.5VS

GM@ 0_0402_5%
1

3

DSUB_15

VGA_DDC_DATA

3

VGA_DDC_DATA 16

2
G

Q1
BSS138_SOT23

1

3

V GA_DDC_CLK

VGA_DDC_CLK 16

Q2
BSS138_SOT23

2
PM@ 0_0402_5%

2
1
R12
GM@ 0_0402_5%

1

L28
1
2
FBM-11-160808-121T_0603

1
R428

C518

CRMA_1

C495

270P_0402_50V7K

C44

330P_0402_50V7K

2

270P_0402_50V7K

2

150_0402_5%

2

150_0402_5%

2

2

4

2

1

R432

JP10

1
2
3
4

LUMA_1

2 C506
@ 22P_0402_50V8J

1

2
PM@ 0_0402_5%
2
GM@ 0_0402_5%
1

1
R434
1
R433

GMCH_CRT_CLK 8

L33
FBM-11-160808-121T_0603

L27
1
2
FBM-11-160808-121T_0603

1

8 GMCH_TV_CRMA

2
PM@ 0_0402_5%
2
GM@ 0_0402_5%

1

16 VGA_TV_CRMA

1
R422
1
R424

1

8 GMCH_TV_LUMA

2 C485
@ 22P_0402_50V8J

2

1
16 VGA_TV_LUMA

GMCH_CRT_DATA 8

2
G

4.7K_0402_5%
1

S

V GA_DDC_CLK

3

Q41
GM@ BSS138_SOT23

1

1

R11
2

D

DSUB_12

S

D

1

R10

R5

2

2
G
D_DD C_CLK

+3VS

1

R4
4.7K_0402_5%

3

D_DDC_CLK

2 PM@ 0_0402_5%

S

2
PM@ 0_0402_5%
+2.5VS

39

1

D

1

1

Q42
GM@ BSS138_SOT23
R380

R9
VGA_DDC_DATA

2

3
S

39 D_DDC_DATA

+CRT_VCC

1
D

D _DDC_DATA

1
2
3
4

5
6

5
6

1.
2.
3.
4.

Y
C
Y
C

ground
ground
(luminance+sync)
(crominance)

SUYIN_030244FS004TX01ZA
C54

4

TV-OUT Conn.

330P_0402_50V7K

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
E

15

of

51

5

4

3

2

PCEI_GTX_C_MRX_N[0..15]

8 PCEI_GTX_C_MRX_N[0..15]

LCD POWER CIRCUITGM CH_ENVDD

PCEI_GTX_C_MRX_P[0..15]

8 PCEI_GTX_C_MRX_P[0..15]

8 GMCH_ENVDD

PCIE_MTX_C_GRX_N[0..15]

8 PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]

8 PCIE_MTX_C_GRX_P[0..15]

+LCDVDD

2

A

U44
GM@ SN74AHCT1G125GW_SOT353-5

Y

VGA BOARD Conn.

1

JP11

+3VS

B+

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159

D

2
G

3

1

1 2

R62
GM@ 100_0402_5%

1

2

GM@ 100K_0402_5%

+LCDVDD

VGA_CRT_R

VGA_CRT_R

15

VGA_CRT_G

VGA_CRT_G

15

VGA_CRT_B

VGA_CRT_B

15

1

2

3

1
R55

DAC_B RIG
DISP OFF#
INVT_PWM

Q9
GM@ SI2301DS_SOT23

2

S

C27
GM@ 0.047U_0402_16V7K

1

2

1

C28
GM@ 4.7U_0805_10V4Z

2

C29

+3VALW

GM@ 0.1U_0402_16V4Z

+2.5VS
39
39

DVI_TXC+
DVI_TXC-

39
39

DVI_TXD0+
DVI_TXD0-

+3VS

39
39

DVI_TXD1+
DVI_TXD1-

1

39
39

DVI_TXD2+
DVI_TXD2-

C

2

C19
@ 0.1U_0402_16V4Z

19 PLTRST_VGA#
6,17,19,21,22,24,27,33,34 PLT_RST#

R510 1
R511 1

2 PM@ 0_0402_5%
2 @ 0_0402_5%
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1

+3VS

1

PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
R477

PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3

4.7K_0402_5%
34

BKOFF#

D32
2 RB751V_SOD323

1

2

BKOFF#

PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4

DISP OFF#

PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6

B

PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8

LCD/PANEL BD. Conn.

PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9

JP6
B+
+3VS
8 GMCH_LCD_CLK
8 GMCH_LCD_DATA

GMCH_LCD_CLK
GMCH_LCD_DATA

8 GMCH_TZOUT08 GMCH_TZOUT0+
8
8
8
8

GMCH_TZOUT1+
GMCH_TZOUT1GMCH_TZOUT2+
GMCH_TZOUT2-

GMCH_TZOUT1+
GMCH_TZOUT1GMCH_TZOUT2+
GMCH_TZOUT2GMCH_TZCLKGMCH_TZCLK+

8 GMCH_TZCLK8 GMCH_TZCLK+
A

17,33

GMCH_TZOUT0GMCH_TZOUT0+

L CD_ID

L CD_ID

D

2
3

GM@ 0.01U_0402_25V7K
R53
GM@ 300_0402_5%

Q8
GM@ 2N7002_SOT23

4

G

2

C663

1

D

P
OE#

5
1

+3VALW

1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

DAC_B RIG
INVT_PWM
DISP OFF#

PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10

DAC_BRIG 34
INVT_PWM 34

PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11

+LCDVDD
GMCH_TXOUT0GMCH_TXOUT0+
GMCH_TXOUT1GMCH_TXOUT1+
GMCH_TXOUT2+
GMCH_TXOUT2GMCH_TXCLKGMCH_TXCLK+

PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12

GMCH_TXOUT0- 8
GMCH_TXOUT0+ 8
GMCH_TXOUT1GMCH_TXOUT1+
GMCH_TXOUT2+
GMCH_TXOUT2-

PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13

8
8
8
8

PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

GMCH_TXCLK- 8
GMCH_TXCLK+ 8

B+

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160

V GA_DDC_CLK
VGA_DDC_DATA
VGA_TV_LUMA

VGA_DDC_CLK 15
VGA_DDC_DATA 15
VGA_TV_LUMA 15

VGA_TV_CRMA

VGA_TV_CRMA

VGA _CRT_VSYNC
VGA_C RT_HSYNC
SUSP#
GMCH_ENBKL

15

VGA_CRT_VSYNC 15
VGA_CRT_HSYNC 15
SUSP# 26,32,34,36,37,41,47,48
GMCH_ENBKL 8,34
+1.5VS
DVI_DET 39
DVI_SCLK 39
DVI_SDATA 39

+3VS
C

+5VS
+5VALW

L CD_ID
CLK_PCIE_VGA 14
CLK_PCIE_VGA# 14
PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_N0
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1
PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N2
PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_N3
PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_N4
PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_N5
PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_N6

B

PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_N7
PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_N8
PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_N9
PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_N10
PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_N11
PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_N12
PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_N13
PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_N14
PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_N15

PM@ ACES_88081-1600

A

GM@ ACES_87216-4012

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

SCHEMATIC, M/B LA-2492
Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

16

of

51

5

4

3

2

1

RP89

RP88

1
2
3
4

+3VS

8
7
6
5

PCI_PLOCK#
P C I_ I RDY#
PCI_PERR#
PCI_DEVSEL#

8.2K_0804_8P4R_5%

RP91

1
2
3
4

+3VS

8
7
6
5

PCI_PIRQD#
PCI_ PIRQB#
PCI_PIRQC#
PCI_ PIRQA#

8.2K_0804_8P4R_5%
RP92

1
2
3
4

+3VS
C

8
7
6
5

PCI_ PIRQE#
PCI_PIRQF#
PCI_ PIRQG#
P CI_REQ#6

8.2K_0804_8P4R_5%

U17B
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PC I_AD10
PC I_AD11
PC I_AD12
PC I_AD13
PC I_AD14
PC I_AD15
PC I_AD16
PC I_AD17
PC I_AD18
PC I_AD19
PC I_AD20
PC I_AD21
PC I_AD22
PC I_AD23
PC I_AD24
PC I_AD25
PC I_AD26
PC I_AD27
PC I_AD28
PC I_AD29
PC I_AD30
PC I_AD31

E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4

D

AD[0]
AD[1]
AD[2]
AD[3]
AD[4]
AD[5]
AD[6]
AD[7]
AD[8]
AD[9]
AD[10]
AD[11]
AD[12]
AD[13]
AD[14]
AD[15]
AD[16]
AD[17]
AD[18]
AD[19]
AD[20]
AD[21]
AD[22]
AD[23]
AD[24]
AD[25]
AD[26]
AD[27]
AD[28]
AD[29]
AD[30]
AD[31]

REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]

L5
C1
B5
B6
M5
F1
B8
C8
F7
E7
E8
F6
B7
D8

P CI_REQ#0
PCI_GNT#0
P CI_REQ#1
PCI_GNT#1
P CI_REQ#2
PCI_GNT#2
P CI_REQ#3
PCI_GNT#3
P CI_REQ#4
PCI_GNT#4
P CI_REQ#5
PCI_GNT#5
P CI_REQ#6
PCI_GNT#6

C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#

J6
H6
G4
G2

P CI_CBE#0
P CI_CBE#1
P CI_CBE#2
P CI_CBE#3

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#

A3
E1
R2
C3
E3
C5
G5
J1
J2

P C I_ I RDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRD Y#

PLTRST#
PCICLK
PME#

R5
G6
P6

PLT_RST#
CLK_ICH _PCI

PCI

RP87

1
2
3
4

+3VS

8
7
6
5

P CI_REQ#5
P CI_REQ#3
P CI_REQ#1
P CI_REQ#4

8.2K_0804_8P4R_5%

24,29 PCI_FRAME#
24 PCI_PIRQA#
24 PCI_PIRQB#
24 PCI_PIRQC#
24 PCI_PIRQD#

RP90

1
2
3
4

+3VS

8
7
6
5

P CI_FRAME#

J3

FRAME#

PCI_ PIRQA#
PCI_ PIRQB#
PCI_PIRQC#
PCI_PIRQD#

N2
L2
M1
L3

PIRQ[A]#
PIRQ[B]#
PIRQ[C]#
PIRQ[D]#

Interrupt

AC5
AD5
AF4
AG4
AC9
AD9
AF8
AG8
U3

P CI_REQ#0
P CI_REQ#2
PCI_PIRQH#

8.2K_0804_8P4R_5%

PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2

Internal Pull-up.
Sample high destination is LPC.

29
29
24
24

PCI_GNT#5

1

24,29 PCI_AD[0..31]

8.2K_0804_8P4R_5%

R231
@ 0_0402_5%

2
R575
2
R576

1
@ 0_0402_5%
1
@ 0_0402_5%
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

LCD_ID

16,33

BT_DET#

33,35

2

PCI_SERR#
PCI_TRD Y#
P CI_FRAME#
PCI_STOP#

24,29
24,29
24,29
24,29

P C I_ IRDY# 24,29
PCI_PAR 24,29
PCI_RST# 22,24,29,33,34
PCI_DEVSEL# 24,29
PCI_PERR# 24,29
PCI_SERR# 24,29
PCI_STOP# 24,29
PCI_TRDY# 24,29

C

PLT_RST# 6,16,19,21,22,24,27,33,34
CLK_PCI_ICH 14

CLK_PCI_ICH

2

D

8
7
6
5

I/F

PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]
PIRQ[H]#/GPI[5]

D9
C7
C6
M3

PCI_ PIRQG#
PCI_PIRQH#

R177
@ 10_0402_5%

PCI_PIRQG# 29
PCI_PIRQH# 29

1

1
2
3
4

+3VS

RESERVED

1

SATA[1]RXN/RSVD[1]
SATA[1]RXP/RSVD[2]
SATA[1]TXN/RSVD[3]
SATA[1]TXP/RSVD[4]
SATA[3]RXN/RSVD[5]
SATA[3]RXP/RSVD[6]
SATA[3]TXN/RSVD[7]
SATA[3]TXP/RSVD[8]
TP[3]/RSVD[9]

C192
@ 10P_0402_50V8J

2

ICH6_BGA609

B

B

A

A

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC, M/B LA-2492
Size

4

3

2

R ev
B

401317
D ate:

5

Document Number
¬P 期一, 一月 03, 2005

Sheet
1

17

of

51

4

3

C269
12P_0402_50V8J
2
1

4

IN

1

2

U17A
+1.05VS

Y1
Y2

ICH_RTCX2

INTRUD ER#

1
R439
20K_0402_5%

+RTCVCC

IC H_RTCRST#

2

INTRUD ER#
INTVRMEN

+3VS

2
1

close to RAM door

1
JOPEN

J1

R512

2

10K_0402_5%

AA2

RTCRST#

AA3
AA5

INTRUDER#
INTVRMEN

D12
B12
D11
F13

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

F12

LAN_CLK

B11

LAN_RSTSYNC

PH DD_LED#

E12
E11
C13

C224
@ 10P_0402_50V8J
1
2

2

AC97_BITCLK
AC97_S YNC_R

1

R215

2

R210

2

+3VS

R201 1

2 4.7K_0402_5%

ID E _ D I ORDY

R203 1

2 8.2K_0402_5%

I DE_IRQ

AC19

1

2 24.9_0402_1%

22 ID E _ D IORDY
22
IDE_IRQ
22 IDE_DDACK#
22 IDE_DIOW #
22 IDE_DIOR#

ACZ_SDO

SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP

AD7
AC7
AF6
AG6

SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP

CLK_PCIE_SATA# AC2
CLK_PCIE_SATA AC1

SATA_CLKN
SATA_CLKP

AG11
SATARBIAS AF11

ID E _ D I ORDY
I DE_IRQ
IDE_D DACK#
IDE_ DIOW #
IDE_DIO R#

AF16
AB16
AB15
AC14
AE16

SATARBIAS#
SATARBIAS

IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#

D

33,34
33,34
33,34
33,34

H_FE RR#

1

P3

LPC_FRAME#

AF22
AF23

EC_GA20
H_A20M#

2
56_0402_5%
2
56_0402_5%

R186
H_DPRSTP#

1
R176

LPC_DRQ#1 33
LPC_FRAME# 33,34

2 10K_0402_5%

+3VS

EC_GA20 34
H_A20M# 4

CPUSLP#

AE27

R520 1

2 @ 0_0402_5%

H_CPUSLP#

DPRSLP#/TP[4]
DPSLP#/TP[2]

AE24
AD27

R180 1

2

0_0402_5%

H_DPRSTP#

FERR#

AF24

CPUPWRGD/GPO[49]

AG25

IGNNE#
INIT3_3V#
INIT#
INTR

AG26
AE22
AF27
AG24

H_IG NNE#

RCIN#

AD23

KB_RST#

NMI
SMI#

AF25
AG27

H_N MI
H_SMI#

H_NMI
H_SMI#

STPCLK#

AE26

H_STPCLK#

H_STPCLK# 4

THRMTRIP#

AE23

THRMTRIP#

DA[0]
DA[1]
DA[2]

AC16
AB17
AC17

IDE _DA0
IDE _DA1
IDE _DA2

DCS1#
DCS3#

AD16
AE17

IDE _DCS1#
IDE _DCS3#

DD[0]
DD[1]
DD[2]
DD[3]
DD[4]
DD[5]
DD[6]
DD[7]
DD[8]
DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]

AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13

IDE_D D0
IDE_D D1
IDE_D D2
IDE_D D3
IDE_D D4
IDE_D D5
IDE_D D6
IDE_D D7
IDE_D D8
IDE_D D9
IDE_ DD10
IDE_ DD11
IDE_ DD12
IDE_ DD13
IDE_ DD14
IDE_ DD15

DDREQ

AB14

IDE_DD REQ

SATALED#

AE3
AD3
AG2
AF2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

R190 1

SATA

14 CLK_PCIE_SATA#
14 CLK_PCIE_SATA
R209

ACZ_SDIN[0]
ACZ_SDIN[1]
ACZ_SDIN[2]

SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0

21 SATA_DTX_C_IRX_N0
21 SATA_DTX_C_IRX_P0

B

F11
F10
B10

PH DD_LED#

34 PHDD_LED#

LPC_DRQ#1

A20GATE
A20M#

ACZ_BIT_CLK
ACZ_SYNC

AC_S DIN0

C9

N6
P4

LANTXD[0]
LANTXD[1]
LANTXD[2]

ACZ_RST#

33_0402_5%

LDRQ[0]#
LDRQ[1]#/GPI[41]

LANRXD[0]
LANRXD[1]
LANRXD[2]

A10

AC97_SDOUT_R

1

R206

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

LFRAME#/FWH[4]

AC97_RST_R#
33_0402_5%

30 ICH_AC_SDIN0
35 ICH_AC_SDIN1

30,35 ICH_AC_SDOUT

C10
B9

33_0402_5%

1

30,35 ICH_AC_RST#

R207
@ 10_0402_5%
2
1

P2
N3
N5
N4

AC-97/AZALIA

30,35 ICH_AC_BITCLK
30,35 IC H _AC_SYNC

C

C12
C11
E13

LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]

LAN

C271
1U_0402_6.3V4Z
1
2

RTCX1
RTCX2

RTC

C270
12P_0402_50V8J
2
1

H_CPUSLP# 4,6
H_DPRSTP# 4

H_DPSLP# 4
FER R# 1
R573
H_PW RGOOD

H_IN IT#
H_IN TR

H_FE RR#

2
56_0402_5%

H_FERR# 4

H_PW RGOOD 4

MAINPW ON 43,44,46

H_IGNNE# 4
H_INIT#
H_INTR

4
4

+1.05VS

R188
10K_0402_5%
1
2

R181
@ 330_0402_5%
1
2

1

OUT

NC

1M_0402_1%
D

1

C

Q22
@ 2SC2411K_SC59

2
B
E

3

NC

2

PIDE

3

LPC

1

32.768KHZ_12.5P_1TJS125DJ2A073

R244

2

ICH_RTCX1

Y3

CPU

+RTCVCC

R246
10M_0402_5%
2
1

5

+3VS

C

EC_KBRST# 34
4
4

+1.05VS

1
R182

2
75_0402_1%

2

1

THRMTRIP#

R187
56_0402_5%
H_THERMTRIP#

H_THERMTRIP# 4,6

IDE_DA[0..2] 22

IDE_DCS1# 22
IDE_DCS3# 22
IDE_DD[0..15] 22

B

IDE_DDREQ 22

ICH6_BGA609

Place near ICH6 side.
SATA_ITX_DRX_N0

2

1

SATA_ITX_C_DRX_N0
0.01U_0402_16V7K

SATA_ITX_C_DRX_N0

21

2

1

SATA_ITX_C_DRX_P0
0.01U_0402_16V7K

SATA_ITX_C_DRX_P0

21

C256
SATA_ITX_DRX_P0
C257
A

A

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC, M/B LA-2492
Size

4

3

2

R ev
B

401317
D ate:

5

Document Number
¬P 期一, 一月 03, 2005

Sheet
1

18

of

51

5

4

3

2

1

+3VALW

U17C

30

SB_SPKR

36

ICH_GP I7
2
10K_0402_5%
PM_CLKRUN#
2
8.2K_0402_5%
ICH_VGATE
2
10K_0402_5%
MCH_SYN C#
2
10K_0402_5%
SERIRQ
2
10K_0402_5%

PM_BMBUSY#

34

EC_SMI#

34,38,43

A C IN

34 EC_LID_OUT#
34
EC_SCI#

1
R248
1
R262

14

SYS_PW ROK
2
10K_0402_5%
EC_RSMRST#
2
10K_0402_5%

PM_STP_PCI#

16 PLTRST_VGA#
21 IDE_HRESET#

RP85

4
3
2
1

5
6
7
8

CK_SCLK
CK_SDATA
LINKALERT#
ICH _SMLINK0
ICH _SMLINK1
MCH_SYN C#
SB_SPKR

Y4
W5
Y5
W4
U6
AG21
F8

SMBCLK
SMBDATA
LINKALERT#
SMLINK[0]
SMLINK[1]
MCH_SYNC#
SPKR

34 IDE_MRESET#

GPI29
GPI28
GPI27
GPI26

36
EC_FLASH#
29,33 PM_CLKRUN#
22 IDE_MPW R

W3

SUS_STAT#/LPCPD#

U2

SYS_RESET#

PM_BMBUSY#

AD19

BM_BUSY#/GPI[6]

ICH_GP I7
EC_SMI#

AE19
R1

GPI[7]
GPI[8]

A C IN

W6

SMBALERT#/GPI[11]

EC_LID_OUT#
EC_ SCI#

M2
R6

GPI[12]
GPI[13]

PM_STP_PCI#

AC21

STP_PCI#/GPO[18]

AB21

GPO[19]

PM_STP_CPU#

AD22

STP_CPU#/GPO[20]

PLTRST_VGA#

AD20
AD21

GPO[21]
GPO[23]

IDE_HRESET#

V3

GPIO[24]

IDE_MRESET#

P5
R3
T3
AF19
AF20
AC18

36 SB_INT_FLASH_SEL#
14,49 PM_STP_CPU#

C

SATA[0]GP/GPI[26]
SATA[1]GP/GPI[29]
SATA[2]GP/GPI[30]
SATA[3]GP/GPI[31]

S YSRST#

+3VS

1
R197
1
R196
1
R193
1
R195
1
R198

AF17
AE18
AF18
AG18

SUS_STAT#

6

EC_FLASH#
PM_CLKRUN#
IDE_MPW R

100_1206_8P4R_5%

1
R597

27 ICH_PCIE_W AKE#

PM_DPRSLPVR
2
100K_0402_5%

24,33,34 SERIRQ
34

EC_THERM#

6,14,49

VGATE

IC H_PCIE_W AKE#

U5

RTC_CLK

34

PM_SLP_S3#

B

40 SYS_PW ROK
49 PM_DPRSLPVR

34

PBTN_OUT#

6,16,17,21,22,24,27,33,34 PLT_RST#
34

EC_RSMRST#

GPIO[25]
GPIO[27]
GPIO[28]
CLKRUN#/GPIO[32]
GPIO[33]
GPIO[34]
WAKE#

SERIRQ

AB20

SERIRQ

EC_THERM#

AC20

THRM#

2
1 ICH_VGATE
R194
0_0402_5%
CLK_14M_ICH
CLK_48M_ICH

34

RI#

GPI26
GPI27
GPI28
GPI29

AF21

CLK14

A27

CLK48

V6

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

T4
T5
T6

SLP_S3#
SLP_S4#
SLP_S5#

AA1

PM_DPRSLPVR

AE20

PWROK
DPRSLPVR/TP[1]

PM_BATLOW#

V2

BATLOW#/TP[0]

PBTN_OUT#

U1

PWRBTN#

PLT_RST#

V5

LAN_RST#

EC_RSMRST#

Y3

RSMRST#

PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1
PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P1

PERn[1]
PERp[1]
PETn[1]
PETp[1]

H25
H24
G27
G26

PERn[2]
PERp[2]
PETn[2]
PETp[2]

K25
K24
J27
J26

PERn[3]
PERp[3]
PETn[3]
PETp[3]

M25
M24
L27
L26

PERn[4]
PERp[4]
PETn[4]
PETp[4]

P24
P23
N27
N26

DMI[0]RXN
DMI[0]RXP
DMI[0]TXN
DMI[0]TXP

T25
T24
R27
R26

DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0

DMI[1]RXN
DMI[1]RXP
DMI[1]TXN
DMI[1]TXP

V25
V24
U27
U26

DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1

DMI[2]RXN
DMI[2]RXP
DMI[2]TXN
DMI[2]TXP

Y25
Y24
W27
W26

DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2

DMI[3]RXN
DMI[3]RXP
DMI[3]TXN
DMI[3]TXP

AB24
AB23
AA27
AA26

DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3

DMI_CLKN
DMI_CLKP

AD25
AC25

CLK_P CIE_ICH#
CLK_PC IE_ICH

PCIE_PTX_C_IRX_N1 27
PCIE_PTX_C_IRX_P1 27
1
2
C198 1
2 0.1U_0402_16V4Z
C197
0.1U_0402_16V4Z

PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P1

PCIE_ITX_C_PRX_N1 27
PCIE_ITX_C_PRX_P1 27

D

+3VALW

DMI_ZCOMP

F24

DMI_IRCOMP

F23

DMI_IRCOMP

OC[4]#/GPI[9]
OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]

C23
D23
C25
C24

USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

OC[0]#
OC[1]#
OC[2]#
OC[3]#

C27
B27
B26
C26

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3

USBP[0]N
USBP[0]P
USBP[1]N
USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P
USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N
USBP[7]P

C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14

USB20_N0
USB20_P0

USBRBIAS#
USBRBIAS

A22
B22

VRMPWRGD

E10

RTC_CLK

SYS_PW ROK

PCI-EXPRESS

CK_SCLK
CK_SDATA

T2

DIRECT MEDIA INTERFACE

14
14

EC_SW I#

GPIO

EC_SW I#

USB

34

CLOCK

D

ICH _SMLINK0
2
10K_0402_5%
ICH _SMLINK1
2
10K_0402_5%
CK_SCLK
2
2.2K_0402_5%
CK_SDATA
2
2.2K_0402_5%
LINKALERT#
2
10K_0402_5%
EC_LID_OUT#
2
@ 10K_0402_5%
EC_SW I#
2
10K_0402_5%
PM_BATLOW#
2
8.2K_0402_5%
IC H_PCIE_W AKE#
2
1K_0402_5%
S YSRST#
2
10K_0402_5%

POWER MGT

1
R259
1
R257
1
R464
1
R465
1
R260
1
R255
1
R256
1
R249
1
R258
1
R261

DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0

6
6
6
6

DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1

6
6
6
6

DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2

6
6
6
6

DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3

6
6
6
6

RP83
USB_OC#5
USB_OC#4
USB_OC#6
USB_OC#7

4
3
2
1

5
6
7
8

10K_1206_8P4R_5%

RP82
USB_OC#3
USB_OC#0
USB_OC#1
USB_OC#2

4
3
2
1

5
6
7
8

10K_1206_8P4R_5%

C

CLK_PCIE_ICH# 14
CLK_PCIE_ICH 14

R472 1

2 24.9_0402_1%

+1.5VS

USB_OC#4 38
USB_OC#7 38
USB_OC#0 38
USB_OC#2 38
USB20_N0 38
USB20_P0 38

USB20_N2
USB20_P2

USB20_N2 38
USB20_P2 38
B

USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
US BRBIAS

USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7

1
R189

38
38
35
35
39
39
38
38

2
22.6_0402_1%

ICH6_BGA609

+3VALW

C275
0.1U_0402_16V4Z
2

5

1

CLK_48M_ICH

CLK_14M_ICH

14 CLK_ICH_14M

34

PM_SLP_S5#

SLP_S5#

A

2

R218
@ 10_0402_5%

U21
TC7SH08FU_SSOP5

2

R470
@ 10_0402_5%

SLP_S4#

2
3

1
A

1
4

1

14 CLK_ICH_48M

1
1

2

C559
@ 10P_0402_50V8J

2

C235
@ 10P_0402_50V8J

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

19

of

51

5

4

3

2

1

+1.5VS

+1.5VS

1

C232
0.1U_0402_16V4Z

2
+5VALW +3VALW

Near PIN AG9

B

C234
0.1U_0402_16V4Z

2

2

1
R191

D9
ICH6 _VCCPLL

1

RB751V_SOD323

1

10_0402_5%

2

1

+3VS

ICH_ V5REF_SUS

2

C213
1U_0603_10V4Z

1

2

C568
0.1U_0402_16V4Z

C560
0.1U_0402_16V4Z 1

Near PIN
E26, E27

2

1

C195
0.1U_0402_16V4Z 1

1

VCCDMIPLL
VCC3_3[1]

+3VS

A13
F14
G13
G14

2

1

C229
0.1U_0402_16V4Z

ICH6 _VCCPLL

Change to 0 ohm

C221
0.1U_0402_16V4Z

+1.5VS
A

AC27
E26

+1.5VS
+3VS

+3VALW
L15
R179
CHB1608U301_0603
0.5_0603_1%
1
2 ICH6_ VCCDMIPLL1
2

VCC1_5[56]
VCC1_5[57]
VCC1_5[58]
VCC1_5[59]
VCC1_5[60]
VCC1_5[61]
VCC1_5[62]
VCC1_5[63]
VCC1_5[64]
VCC1_5[65]

AE1
AG10

+3VALW

2

AA7
AA8
AA9
AB8
AC8
AD8
AE8
AE9
AF9
AG9

A11
U4
V1
V7
W2
Y7
A17
B17
C17
F18
G17
G18

VCCSUS1_5[1]

G19

VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
VCC1_5[68]

G20
F20
E24
E23
E22
E21
E20
D27
D26
D25
D24

VCC1_5[67]

G8

CORE
SATA

+1.5VS

U7
R7

2

C226

1

Near PIN
AG13, AG16

2

2

2

1

1

1

C2231

C567
0.1U_0402_16V4Z
1
2

0.1U_0402_16V4Z

C563
0.01U_0402_16V7K
1
2

Near PIN
A2-A6, D1-H1

Near PIN A25
C566
0.01U_0402_16V7K
1
2

+1.5VALW

2

1

2

2

1

1

Near PIN AA19

+3VALW
C574
0.1U_0402_16V4Z
1
2
+1.5VS

C573
0.1U_0402_16V4Z
1
2

+2.5VS

V5REF[2]
V5REF[1]

AA18
A8

ICH_V5REF _RUN

V5REF_SUS

F21

ICH_ V5REF_SUS

VCCUSBPLL
VCCLAN3_3/VCCSUS3_3[1]
VCCSUS3_3[20]
VCCLAN3_3/VCCSUS3_3[2]
VCCLAN3_3/VCCSUS3_3[3]
VCCRTC
VCCLAN3_3/VCCSUS3_3[4]
VCCLAN1_5/VCCSUS1_5[2]
VCCSUS3_3[1]
VCCLAN1_5/VCCSUS1_5[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
V_CPU_IO[3]
VCCSUS3_3[4]
V_CPU_IO[2]
VCCSUS3_3[5]
V_CPU_IO[1]
VCCSUS3_3[6]
VCCSUS3_3[19]
VCCSUS3_3[7]
VCCSUS3_3[18]
VCCSUS3_3[8]
VCCSUS3_3[17]
VCCSUS3_3[9]
VCCSUS3_3[16]
VCCSUS3_3[10]
VCCSUS3_3[15]
VCCSUS3_3[11]
VCCSUS3_3[14]
VCCSUS3_3[12]
VCCSUS3_3[13]

A25
A24

+1.5VS
+3VALW

AB3

+RTCVCC

G11
G10

+1.5VS

AG23
AD26
AB22
G16
G15
F16
F15
E16
D16
C16

C565
0.1U_0402_16V4Z
1
2

+3VS

AB18
P7

VCCSATAPLL
VCC3_3[22]

C202
0.1U_0402_16V4Z
1
2

2

VCC2_5[4]
VCC2_5[2]

PCI/IDE RBP

C203
0.1U_0402_16V4Z
1
2

0.1U_0402_16V4Z +3VS

C571
0.1U_0402_16V4Z

Near PIN AG5

VCC1_5[46]
VCC1_5[47]
VCC1_5[48]
VCC1_5[49]
VCC1_5[50]
VCC1_5[51]
VCC1_5[52]
VCC1_5[53]
VCC1_5[54]
VCC1_5[55]

VCCSUS1_5[3]
VCCSUS1_5[2]

C200
0.1U_0402_16V4Z
1
2

0.1U_0402_16V4Z

2

AA6
AB4
AB5
AB6
AC4
AD4
AE4
AE5
AF5
AG5

P1
M7
L7
L4
J7
H7
H1
E4
B1
A6

C201
0.1U_0402_16V4Z
1
2

2

1

C267
0.1U_0402_16V4Z
1
2
C210
0.1U_0402_16V4Z
1
2

Near PIN A24

Near PIN AB18

+3VS

+1.05VS

2

1

C228
0.1U_0402_16V4Z
1
2

U17D

E27
Y6
Y27
Y26
Y23
W7
W25
W24
W23
W1
V4
V27
V26
V23
U25
U24
U23
U15
U13
T7
T27
T26
T23
T16
T15
T14
T13
T12
T1
R4
R25
R24
R23
R17
R16
R15
R14
R13
R12
R11
P22
P16
P15
P14
P13
P12
N7
N17
N16
N15
N14
N13
N12
N11
N1
M4
M27
M26
M23
M16
M15
M14
M13
M12
L25
L24
L23
L15
L13
K7
K27
K26
K23
K1
J4
J25
J24
J23
H27
H26
H23
G9
G7
G21
G12
G1

Near PIN AG23

VSS[172]
VSS[171]
VSS[170]
VSS[169]
VSS[168]
VSS[167]
VSS[166]
VSS[165]
VSS[164]
VSS[163]
VSS[162]
VSS[161]
VSS[160]
VSS[159]
VSS[158]
VSS[157]
VSS[156]
VSS[155]
VSS[154]
VSS[153]
VSS[152]
VSS[151]
VSS[150]
VSS[149]
VSS[148]
VSS[147]
VSS[146]
VSS[145]
VSS[144]
VSS[143]
VSS[142]
VSS[141]
VSS[140]
VSS[139]
VSS[138]
VSS[137]
VSS[136]
VSS[135]
VSS[134]
VSS[133]
VSS[132]
VSS[131]
VSS[130]
VSS[129]
VSS[128]
VSS[127]
VSS[126]
VSS[125]
VSS[124]
VSS[123]
VSS[122]
VSS[121]
VSS[120]
VSS[119]
VSS[118]
VSS[117]
VSS[116]
VSS[115]
VSS[114]
VSS[113]
VSS[112]
VSS[111]
VSS[110]
VSS[109]
VSS[108]
VSS[107]
VSS[106]
VSS[105]
VSS[104]
VSS[103]
VSS[102]
VSS[101]
VSS[100]
VSS[99]
VSS[98]
VSS[97]
VSS[96]
VSS[95]
VSS[94]
VSS[93]
VSS[92]
VSS[91]
VSS[90]
VSS[89]
VSS[88]
VSS[87]

GROUND

C

VCC3_3[11]
VCC3_3[10]
VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
VCC3_3[3]
VCC3_3[2]

C564
0.1U_0402_16V4Z
1
2

0.1U_0402_16V4Z

C570
0.1U_0402_16V4Z

C233
0.1U_0402_16V4Z

C199
0.1U_0402_16V4Z
1
2

1

C265
0.1U_0402_16V4Z

1

C2771

2

C572
0.1U_0402_16V4Z

1
0.1U_0402_16V4Z

C278

C569

C237

AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12

2

C266
0.1U_0402_16V4Z
C240
0.1U_0402_16V4Z

1

2

VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]

C562
0.1U_0402_16V4Z
1
2

0.1U_0402_16V4Z

C212
0.1U_0402_16V4Z

2
C243
1U_0603_10V4Z

F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19

IDE

ICH_V5REF _RUN
2

VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]

PCI

2
RB751V_SOD323

1

10_0402_5%

D10

1

@ 1K_0402_5%

1

R214

VCC1_5[1]
VCC1_5[2]
VCC1_5[3]
VCC1_5[4]
VCC1_5[5]
VCC1_5[6]
VCC1_5[7]
VCC1_5[8]
VCC1_5[9]
VCC1_5[10]
VCC1_5[11]
VCC1_5[12]
VCC1_5[13]
VCC1_5[14]
VCC1_5[15]
VCC1_5[16]
VCC1_5[17]
VCC1_5[18]
VCC1_5[19]
VCC1_5[20]
VCC1_5[21]
VCC1_5[22]
VCC1_5[23]
VCC1_5[24]
VCC1_5[25]
VCC1_5[26]
VCC1_5[27]
VCC1_5[28]
VCC1_5[29]
VCC1_5[30]
VCC1_5[31]
VCC1_5[32]
VCC1_5[33]
VCC1_5[34]
VCC1_5[35]
VCC1_5[36]
VCC1_5[37]
VCC1_5[38]
VCC1_5[39]
VCC1_5[40]
VCC1_5[41]
VCC1_5[42]
VCC1_5[43]
VCC1_5[44]
VCC1_5[45]

PCIE

R240

1

AA22
AA23
AA24
AA25
AB25
AB26
AB27
F25
F26
F27
G22
G23
G24
G25
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N21
N22
N23
N24
N25
P21
P25
P26
P27
R21
R22
T21
T22
U21
U22
V21
V22
W21
W22
Y21
Y22

C204
0.1U_0402_16V4Z
1
2

+RTCVCC

U17E

USB

+3VS

1

+1.5VS

USB CORE

+5VS

2

+5VCD

2

D

1

2

0.1U_0402_16V4Z

2

2

0.1U_0402_16V4Z
C561

+

2

0.1U_0402_16V4Z
C194

C242

1

C193

+1.5VS

220U_D2_4VM_R12

Near PIN F27(C155),
P27(C154), AB27(C157)

VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]
VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]
VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]

F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1

D

C

B

ICH6_BGA609
C230
0.1U_0402_16V4Z
1
2

ICH6_BGA609

A

Near PIN AG10

Near PIN A17
C205 2
0.01U_0402_16V7K

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492

Near PIN
AC27
5

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

20

of

51

4

3

+1.8VS

1

1
C375

C384

2
1000P_0402_50V7K

1

0.1U_0402_16V4Z

1
C357

C363
2
1U_0603_10V4Z

2

SATA Module

+3VS

0.1U_0402_16V4Z

1

1

C597
2
4.7U_0805_10V4Z

2

1

C591

C282
2
0.1U_0402_16V4Z

2

D

Pleace near U178

Pleace near HD CONN

ATAIOSEL
2
10K_0402_5%
P ID E _HIORDY
2
4.7K_0402_5%
PID E_HIOCS16#
2
10K_0402_5%
T0
2
@ 10K_0402_5%
T2
2
@ 10K_0402_5%
T3
2
10K_0402_5%
T6
2
10K_0402_5%

1
R235
1
R499
1
R500
1
R245
1
R252
1
R263
1
R268

Sets maximum transfer rate and UDMA mode

1
R250

T1
2
10K_0402_5%

2
R492

PIDE_ HDREQ
1
5.6K_0402_5%

2
R491

PIDE_H INTRQ
1
10K_0402_5%

CNFG2 CNFG1 CNFG0
INT PD
INT PD
*

U22

PID E_HIOCS16#
PIDE_H INTRQ
P IDE_HDMACK#
P ID E _HIORDY
PIDE_HDIOR#
PIDE_ HDIOW #
PIDE_ HDREQ
2 PIDE_R_HRESET#
33_0402_5%

52
53
54
55
58
59
60
16
46

HIOCS16#
HINTRQ
HDMACK#
HIORDY
HDIOR#
HDIOW#
HDMARQ
HRESET#
HPDIAG#

45
43

UAO
UAI

1

PIDE_HRESET# 1
R243

Config & Debug

Parallel ATA

C

RST#
T0
T1
T2
T3
T4
T5
T6
T7
CNFG2
CNFG1
CNFG0
ATAIOSEL

17
33
34
35
36
37
38
39
40
20
19
18
21

SATA_RST#
T0
T1
T2
T3

XTLIN/OSC
XTLOUT

22
23

IDE_XTLIN
IDE_XTLOUT

26
44
4
9
41
56
24
29

VSS1
VSS2
GND_0
GND_1
GND_2

25
30
8
42
57

Power
UART

T5
T6

1
R266

2
10K_0402_5%

CNF G1

1
R237

ATAIOSEL
SW DJ@
C643
0.1U_0402_16V4Z 2

2
R232

+1.8VS

6,16,17,19,22,24,27,33,34 PLT_RST#

PLT_RST#

30,34 EC_IDERST
0.1U_0402_16V4Z

1

1

1
C255

2
C258

2

1

1

2
C590

2

1

X3

2

1

R513
@ 0_0402_5%

4

1
1M_0402_5%

2

1

2

Reserved

1

1

1

Reserved

C250
2 0.1U_0402_16V4Z

IDE_HRESET#

2
0_0402_5%

1

B

2

A

U20

Y

SATA_RST#

4

TC7SH08FU_SSOP5

B

2

A

U43

4

Y

SW DJ@
TC7SH08FU_SSOP5

VDD

OUT

3

IDE_XTLIN

1
1

C259
12P_0402_50V8J

2

C249
12P_0402_50V8J

2

CONT VSS

R344 1

2

@ OSC 25MHZ SG645PCG

PIDE_ HDREQ
PIDE_ HDIOW #
PIDE_HDIOR#
P ID E _HIORDY
P IDE_HDMACK#
PIDE_H INTRQ
PID E_HDA1
PID E_HDA0
PIDE_HCS0#
2 @ 10K_0402_5%

+5VS

C607
@ 0.1U_0402_16V4Z

44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

MOLEX_54782-4411

43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

PIDE_H DD8
PIDE_H DD9
PIDE_ HDD10
PIDE_ HDD11
PIDE_ HDD12
PIDE_ HDD13
PIDE_ HDD14
PIDE_ HDD15

SEC_CSEL

B

R503 1

2 470_0402_5%

R504 1
R322 1

2 10K_0402_5%
2 10K_0402_5%

PID E_HDA2
PIDE_HCS1#
+5VS

48
47

R234

1

PIDE_HRESET#
PIDE_H DD7
PIDE_H DD6
PIDE_H DD5
PIDE_H DD4
PIDE_H DD3
PIDE_H DD2
PIDE_H DD1
PIDE_H DD0

2
C294
0.1U_0402_16V4Z

1

Host Mode 133MB/s

P-ATA HDD Conn.

1000P_0402_50V7K

IDE_XTLOUT

1

2

Host Mode 150MB/s

0

JP18

25MHZ_12PF_1BG25000CK1B

C287
0.1U_0402_16V4Z

0

C595
2.2U_0603_6.3V6K

1
2

1

C

1

2
CHB1608U800_0603

2
C293
4.7U_0805_10V4Z

1

D

Change to 0 ohm

R236
0_0402_5%

2

Device Mode 150MB/s
Host Mode 100MB/s

1

1
12.1K_0603_1%

Y2

1

0
1

+3VS

+3VS

1

0
0

+3VS

B

2

1
1

1
R604

2
10K_0402_5%

R230
0_0603_5%

+3VS

0

19 IDE_HRESET#
PLT_RST#

0.01U_0402_16V7K

1

Device Mode 133MB/s

1

1

88SA8040_TQFP64

IDE_XTLIN

1

0

+3VS

L31

R275
10K_0402_5%

0

0

SATA_ITX_C_DRX_P0 18
SATA_ITX_C_DRX_N0 18

+3VS

ISET
VDDIO_0
VDDIO_1
VDD_0
VDD_1
VDD_2
VAA1
VAA2

0

0

5

HDA0
HDA1
HDA2
HCS0#
HCS1#

SATA_DTX_IRX_P0
SATA_DTX_IRX_N0
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

0

3

50
51
49
48
47

32
31
27
28

5

PID E_HDA0
PID E_HDA1
PID E_HDA2
PIDE_HCS0#
PIDE_HCS1#

TXP
TXM
RXP
RXM

SATA

P

HDD0
HDD1
HDD2
HDD3
HDD4
HDD5
HDD6
HDD7
HDD8
HDD9
HDD10
HDD11
HDD12
HDD13
HDD14
HDD15

G

62
64
2
5
7
11
13
15
14
12
10
6
3
1
63
61

3

PIDE_H DD0
PIDE_H DD1
PIDE_H DD2
PIDE_H DD3
PIDE_H DD4
PIDE_H DD5
PIDE_H DD6
PIDE_H DD7
PIDE_H DD8
PIDE_H DD9
PIDE_ HDD10
PIDE_ HDD11
PIDE_ HDD12
PIDE_ HDD13
PIDE_ HDD14
PIDE_ HDD15

NOTE
Device Mode 100MB/s

P

0.1U_0402_16V4Z

1

G

+5VS

2

48
47

5

25MHz reference clock T[4:3] = 01

A

Place near connector side.
SATA_DTX_IRX_N0
SATA_DTX_IRX_P0

C251 2

1 0.01U_0402_16V7K

SATA_DTX_C_IRX_N0

C252 2

1 0.01U_0402_16V7K

SATA_DTX_C_IRX_P0

A

SATA_DTX_C_IRX_N0

18

SATA_DTX_C_IRX_P0

18

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

21

of

51

A

B

C

D

E

F

G

H

Placea caps. near ODD CONN.
+5VMOD

1

2

10U_1206_16V4Z

1

C554
C551

1

2

2

1
C155

18

Module Conn.

IDE_DD[0..15]

18 IDE_DD[0..15]
0.1U_0402_16V4Z

IDE_DA[0 ..2]

IDE_DA[0..2]

JP31

1

C158

71

2

2

C552

1

1000P_0402_50V7K

1U_0603_10V4Z

30,32
30,32

10U_1206_16V4Z

I

SW DJ@
10K_0402_5%

2

SW _IDE_DCS1#

3

O

1

1

P

OE#

IDE _DCS1# 2

IDE_DCS1#

2

R165

U10A

MOD _DISCHARGE

7

IDE_D D4
IDE_ DD11
IDE_D D3
IDE_ DD12
IDE_D D2
IDE_ DD13

D
Q62
2N7002_SOT23

2
G
3

G

18

R596
470_0402_5%

+5VMOD

1

+3VALW

2
14

1

IDE_D D7
IDE_D D8
IDE_D D6
IDE_D D9
IDE_D D5
IDE_ DD10

1

SW _PCI_RST
C170
SW DJ@
0.1U_0402_16V4Z

S

SW DJ@
SN74LVC125APWLE_TSSOP14

1

+5VMOD
IDE_D D1
IDE_ DD14
IDE_D D0
IDE_ DD15

2

R590

0_0402_5%

2

+5VMOD

I

6

O

2

+5VMOD

R514

2

+3VALW

M ID2
100K_0402_5%

2

M ID1

1

R443

100K_0402_5%

2
R442
R591

SH DD_LED#
10K_0402_5%

1

R446

SW DJ@
SN74LVC125APWLE_TSSOP14

1

1

1 SEC_CSEL
@ 475_0402_1%

2
R507

SW _IDE_DCS3#

2

IDE _DCS3# 5

IDE_DCS3#

R166
SW DJ@
10K_0402_5%

U10B

OE#

4

1

SW _PCI_RST

18

CD_A GND
MODULE_RST#

30
CD_AGND
34 MODULE_RST#

+5VMOD

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70

CD ROM_R
CDROM_L

INT_CD_R
INT_CD_L

M ID0

1
100K_0402_5%

MID2

34

MID1

34

MID0

34

18

IDE_DDREQ

18

IDE_DIOW #

IDE_DD REQ
IDE_ DIOW #
IDE_DIO R#

18

IDE_DIOR#

18

ID E _ D IORDY

18

IDE_DDACK#

18

IDE_IRQ

ID E _ D I ORDY
IDE_D DACK#
I DE_IRQ
IDE _DA1

+5VMOD
IDE _DA0
IDE _DA2
SW _IDE_DCS1#
SW _IDE_DCS3#

2
0_0402_5%
34

SHDD_LED#
M ID2
M ID1
M ID0

3

1

+3VALW
+5VMOD

R158

3

+5VALW

1

10K_0402_5%

S
D

S

2
G

+5VMOD

MOD _DISCHARGE

1

D

3

2

C164
0.1U_0402_16V4Z

1

2
R152

1

1
1U_0805_25V4Z

1

C160
10U_1206_16V4Z

3

2
240K_0402_5%

1

17,24,29,33,34 PCI_RST#

R534 1

SW DJ@
2 0_0402_5%

6,16,17,19,21,24,27,33,34 PLT_RST#

R535 1

2 @ 0_0402_5%

1

2
C166

TYCO_1827293-1

SW _PCI_RST

2
1
R155

3

72

1
2

+5VALW

2

SW DJ@
10K_0402_5%

2

Q15
AOS 3401_SOT23

1

2
G

Q60
SW DJ@
2N7002_SOT23

Q21
SW DJ@
2N7002_SOT23

4

4

2

32,34 CD_PLAY

22K

22K

3

Q47
DTC124EK_SOT23

2IDE_MPW R

IDE_MPW R 19

22K

3

22K

Compal Electronics, Inc.

Q48
DTC124EK_SOT23

Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

E

F

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005
G

Sheet

22

of
H

51

5

4

3

+S1_VCC

+3VS

2

+S2_VCC

S1_ D[0..15]

26

S1_IOW R#

26

S1_IORD#

26
26

S1_OE#
S1_CE2#

C

S1_A16

B

26

S1_REG#

26

S1_CE1#

26
26
26
26
26

S1_WAIT#
S1_INPACK#
S1_WE#
S1_BVD1
S1_WP
2
R273

26
26

S1_RDY#
S1_RST

26

S1_BVD2

26
26
26
26

S1_CD1#
S1_CD2#
S1_VS1
S1_VS2

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOW R#
S1_A9
S1 _IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

D1
C1
D3
C2
B1
B4
A4
E6
B5
C6
B6
G9
C7
B7
A7
A10
E11
G11
C11
B11
C12
B12
A12
E12
C13
F12
A13
C14
E13
A14
B14
E14

S1_REG#
S1_A12
S1_A8
S1_CE1#

C5
F9
B10
G12

A_CC/BE3#/A_REG#
A_CC/BE2#/A_A12
A_CC/BE1#/A_A8
A_CC/BE0#/A_CE1#

G10
C8
A8
B8
A9
C9
E10
F10
B3
E7
B9
B2
C3
E9
C4

A_CPAR/A_A13
A_CFRAME#/A_A23
A_CTRDY#/A_A22
A_CIRDY#/A_A15
A_CSTOP#/A_A20
A_CDEVSEL#/A_A21
A_CBLOCK#/A_A19
A_CPERR#/A_A14
A_CSERR#/A_WAIT#
A_CREQ#/A_INPACK#
A_CGNT#/A_WE#
A_CSTSCHG/A_BVD1(STSCHG/RI)
A_CCLKRUN#/A_WP(IOIS16)
A_CCLK/A_A16
A_CINT#/A_READY(IREQ)

S1_A13
S1_A23
S1_A22
S1_A15
S1_A20
S1_A21
S1_A19
S1_A14
S1_WAIT#
S1_INPACK#
S1_WE#
S1_BVD1
S1_WP
A16_CLK
1
33_0402_5%
S1_RD Y#
S1_RST

+3VS

PCI 7421

A_CRST#/A_RESET

A2

A_CAUDIO/A_BVD2(SPKR#)

C15
E5
A3
E8

A_CCD1#/A_CD1#
A_CCD2#/A_CD2#
A_CVS1/A_VS1#
A_CVS2/A_VS2#

S1_D14
S1_D2
S1_A18

B13
D2
C10

A_CRSVD/A_D14
A_CRSVD/A_D2
A_CRSVD/A_A18

E2
E1

A_USB_EN#
B_USB_EN#

D19
K19

B_CAD31/B_D10
B_CAD30/B_D9
B_CAD29/B_D1
B_CAD28/B_D8
B_CAD27/B_D0
B_CAD26/B_A0
B_CAD25/B_A1
B_CAD24/B_A2
B_CAD23/B_A3
B_CAD22/B_A4
B_CAD21/B_A5
B_CAD20/B_A6
B_CAD19/B_A25
B_CAD18/B_A7
B_CAD17/B_A24
B_CAD16/B_A17
B_CAD15/B_IOWR#
B_CAD14/B_A9
B_CAD13/B_IORD#
B_CAD12/B_A11
B_CAD11/B_OE#
B_CAD10/B_CE2#
B_CAD9/B_A10
B_CAD8/B_D15
B_CAD7/B_D7
B_CAD6/B_D13
B_CAD5/B_D6
B_CAD4/B_D12
B_CAD3/B_D5
B_CAD2/B_D11
B_CAD1/B_D4
B_CAD0/B_D3
B_CC/BE3#/B_REG#
B_CC/BE2#/B_A12
B_CC/BE1#/B_A8
B_CC/BE0#/B_CE1#
B_CPAR/B_A13
B_CFRAME#/B_A23
B_CTRDY#/B_A22
B_CIRDY#/B_A15
B_CSTOP#/B_A20
B_CDEVSEL#/B_A21
B_CBLOCK#/B_A19
B_CPERR#/B_A14
B_CSERR#/B_WAIT#
B_CREQ#/B_INPACK#
B_CGNT#/B_WE#
B_CSTSCHG/B_BVD1(STSCHG/RI)
B_CCLKRUN#/B_WP(IOIS16)
B_CCLK/B_A16
B_CINT#/B_READY(IREQ)
B_CRST#/B_RESET
B_CAUDIO/B_BVD2(SPKR#)
B_CCD1#/B_CD1#
B_CCD2#/B_CD2#
B_CVS1/B_VS1#
B_CVS2/B_VS2#
B_CRSVD/B_D14
B_CRSVD/B_D2
B_CRSVD/B_A18

G7
G8
G13
H13
J9
J10
J11
K9
K10
K11
L8
L9
L10
L11
L12
M8
S1_CD1#

N1
L6
N2

C281
10P_0402_50V8J

B15
A16
B16
A17
C16
D17
C19
D18
E17
E19
G15
F18
H14
H15
G17
K17
L13
K18
L15
L17
L18
L19
M17
M14
M15
N19
N18
N15
M13
P18
P17
P19
F15
G18
K14
M18
K13
G19
H17
J13
J17
H19
J19
J18
B18
E18
J15
F14
A18
H18
B19
F17
C17
N13
B17
C18
F19
N17
A15
K15

2

D

S2_D10
S2_D9
S2_D1
S2_D8
S2_D0
S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A25
S2_A7
S2_A24
S2_A17
S2_IOW R#
S2_A9
S2 _IORD#
S2_A11
S2_OE#
S2_CE2#
S2_A10
S2_D15
S2_D7
S2_D13
S2_D6
S2_D12
S2_D5
S2_D11
S2_D4
S2_D3
S2_REG#
S2_A12
S2_A8
S2_CE1#
S2_A13
S2_A23
S2_A22
S2_A15
S2_A20
S2_A21
S2_A19
S2_A14
S2_WAIT#
S2_INPACK#
S2_WE#
S2_BVD1
S2_WP

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z
1

1
C268

2

C298

2
0.1U_0402_16V4Z

1U_0603_10V4Z
2

2

C297

2

C309

C254

1
0.1U_0402_16V4Z

1

+3VS
0.1U_0402_16V4Z

1

0.1U_0402_16V4Z
1

1
C326

S2_IOW R# 26

2

S2_IORD# 26
S2_OE#
S2_CE2#

C285

2
0.1U_0402_16V4Z

C303

2

2.2U_0603_6.3V6K
1
C305

1
C306

2
0.1U_0402_16V4Z

2
C

26
26
+S1_VCC

1

2

+S2_VCC

1
C292
0.1U_0402_16V4Z

2

1
C581
0.1U_0402_16V4Z

2

1
C261
0.1U_0402_16V4Z

2

C262
0.1U_0402_16V4Z

S2_REG# 26
S2_CE1#

26

S2_WAIT# 26
S2_INPACK# 26
S2_WE#
26
S2_BVD1 26
S2_WP
26

S2_RD Y#
S2_RST
S2_BVD2
S2_CD1#
S2_CD2#
S2_VS1
S2_VS2
S2_D14
S2_D2
S2_A18

S2_RDY#
S2_RST
S2_BVD2
S2_CD1#
S2_CD2#
S2_VS1
S2_VS2

26
26
26
26
26
26
26

B

S2_A16
1
33_0402_5%

2
R239

S2_CD1#

S2_CD2#

PCI7421GHK_PBGA288

1
C284
10P_0402_50V8J

1
C307
10P_0402_50V8J

S2_D[0..15]

DATA 26
CLOCK 26
LATCH 26

S1_CD2#

1

S2_ D[0..15]

+3VS

A6

S1_CD1#
S1_CD2#
S1_VS1
S1_VS2

1 10K_0402_5%
1 10K_0402_5%

DATA
CLOCK
LATCH

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

R305 2
R304 2

S1_BVD2

A_CAD31/A_D10
A_CAD30/A_D9
A_CAD29/A_D1
A_CAD28/A_D8
A_CAD27/A_D0
A_CAD26/A_A0
A_CAD25/A_A1
A_CAD24/A_A2
A_CAD23/A_A3
A_CAD22/A_A4
A_CAD21/A_A5
A_CAD20/A_A6
A_CAD19/A_A25
A_CAD18/A_A7
A_CAD17/A_A24
A_CAD16/A_A17
A_CAD15/A_IOWR#
A_CAD14/A_A9
A_CAD13/A_IORD#
A_CAD12/A_A11
A_CAD11/A_OE#
A_CAD10/A_CE2#
A_CAD9/A_A10
A_CAD8/A_D15
A_CAD7/A_D7
A_CAD6/A_D13
A_CAD5/A_D6
A_CAD4/A_D12
A_CAD3/A_D5
A_CAD2/A_D11
A_CAD1/A_D4
A_CAD0/A_D3

26

U41A

S 2_A[0..25]

S2_A[0..25]

VCCB
VCCB

S1_D[0..15]

H8
H9
H10
H11
H12
J8
M7
J12
M9
M10
M12
K8
K12
N7

S1_A[0..25]

26

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

26

VCCA
VCCA

D

A5
A11

26
S 1_A[0..25]

1

2

1
C279
10P_0402_50V8J

Closed to Pin N13

2

2

Closed to Pin B17

A

A

Closed to Pin C15

Closed to Pin E5

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC, M/B LA-2492
Size

4

3

2

R ev
B

401317
D ate:

5

Document Number
¬P 期一, 一月 03, 2005

Sheet
1

23

of

51

5

4

3

+AVDD_7421

2

1

+3VS
+VDPLL_33

AVDD_7421 0.1U_0402_16V4Z

1
L30

1

2
0.1U_0402_16V4Z

C260 1

Change to 0 ohm

1

2

C325 1

2
0.1U_0402_16V4Z

+AVDD_7421

V19
T18
VDPLL_33
VDPLL_15

MC_PW R_CTRL_0
1
2
R313
@ 0_0402_5%
SDC D#
MSCD#
SMCD#

F1
F2

MC_PWR_CTRL_0
MC_PWR_CTRL_1

E3
F5
F6

SD_CD#
MS_CD#
SM_CD#

1 33_0402_5%
1 33_0402_5%
MSBS_SDCMD_SMWE2
MSDATA3_SDDAT3_SMD3
MSDATA2_SDDAT2_SMD2
MSDATA1_SDDAT1_SMD1
MSDATA0_SDDAT0_SMD0

G5
F3
H5
G3
G2
G1

MS_CLK/SD_CLK/SM_EL_WP#
MS_BS/SD_CMD/SM_WE#
MS_DATA3/SD_DAT3/SM_D3
MS_DATA2/SD_DAT2/SM_D2
MS_DATA1/SD_DAT1/SM_D1
MS_SDIO(DATA0)/SD_DAT0/SM_D0

1
2 33_0402_5%
SMALE
SMD4
SMD5
SMD6
SMD7
SDW P_SMCE#

J5
J3
H3
J6
J1
J2
H7

SD_CLK/SM_RE#/SC_GPIO1
SD_CMD/SM_ALE/SC_GPIO2
SD_DAT0/SM_D4/SC_GPIO6
SD_DAT1/SM_D5/SC_GPIO5
SD_DAT2/SM_D6/SC_GPIO4
SD_DAT3/SM_D7/SC_GPIO3
SD_WP/SM_CE#

SMCLE
SMRB#
SM_PHYS_WP#2

J7
K1
K2

SM_CLE/SC_GPIO0
SM_R/B
SM_PHYS_WP#/SC_FCB

L2
K5
K3
K7
L1
L3
L5

SC_CD#
SC_CLK
SC_RST
SC_VCC_5V
SC_DATA
SC_OC#
SC_PWR_CTRL

SDCD#
MSCD#
SMCD#
R552 2
R303 2

25 MSCLK_SDCLK
25
SMELWP#
25 MSBS_SDCMD_SMWE2
25 MSDATA3_SDDAT3_SMD3
25 MSDATA2_SDDAT2_SMD2
25 MSDATA1_SDDATA1_SMD1
25 MSDATA0_SDDAT0_SMD0
25

25
SMCLE
25
SMRB#
25 SM_PHYS_WP#

1

R359
56.2_0402_1%

1

R355
56.2_0402_1%
JP20

TPBIAS0

2

2

2 1U_0603_25V4Z

1

R581
@ 0_0402_5%

+3VS

TPA0+
TPA0TPB0+
TPB0-

R277 1

2 10K_0402_5%

2

4
3
2
1
2

R280

SMRE#
25
SMALE
25
SMD4
25
SMD5
25
SMD6
25
SMD7
25 SDW P_SMCE#

AMP_440168-2
R347
56.2_0402_1%

1

P12
W17
T19

PCI7421

TEST0
NC
RSVD

2

1

R350
56.2_0402_1%

2 6.34K_0402_1%

U18
U19
U15
V15
W15
V14
W14
U17
V18
W18
V16
W16
M11
P15
R19
R18
R12
U13
V13

R0
R1
TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N
TPBIAS1
TPA1P
TPA1N
TPB1P
TPB1N
CPS
CNA
XO
XI
PC0(TEST1)
PC1(TEST2)
PC2(TEST3)

1

2 1K_0402_5%
1 4.7K_0402_5%

2

18P_0402_50V8J

R253
56.2_0402_1%

18P_0402_50V8J

0.1U_0402_16V4Z
1
C299

2

C300

2
0.1U_0402_16V4Z

1

0.1U_0402_16V4Z
1
C290

C302

2

2

2
0.1U_0402_16V4Z

C273
1
1U_0603_10V4Z

2

D

U41B
PC I_AD31
PC I_AD30
PC I_AD29
PC I_AD28
PC I_AD27
PC I_AD26
PC I_AD25
PC I_AD24
PC I_AD23
PC I_AD22
PC I_AD21
PC I_AD20
PC I_AD19
PC I_AD18
PC I_AD17
PC I_AD16
PC I_AD15
PC I_AD14
PC I_AD13
PC I_AD12
PC I_AD11
PC I_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

U2
V1
V2
U3
W2
V3
U4
V4
V5
U5
R6
P6
W6
V6
U6
R7
V9
U9
R9
N9
V10
U10
R10
N10
V11
U11
R11
W12
V12
U12
N11
W13

C/BE3#
C/BE2#
C/BE1#
C/BE0#

W4
W7
W9
W11

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
REQ#
GNT#

P9
V7
R8
U7
W8
N8
W5
V8
U8
U1
T2

PCI_PAR 17,29
PCI_FRAME# 17,29
PCI_TRDY# 17,29
P C I_ IRDY# 17,29
PCI_STOP# 17,29
PCI_DEVSEL# 17,29

PCICLK
PCIRST#
GRST#
RI_OUT#/PME#

P5
R3
T1
T3

SUSPEND#

R2

SPKROUT

L7

PCM_SPK#

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6

N3
M5
P1
P2
P3
N5
R1

PCI_ PIRQA#
PCI_ PIRQB#
PCI_PIRQC#
SERIRQ
PCI_PIRQD#
5 IN1_LED#

SCL
SDA

M3
M2

VR_EN#

H2

PCI_AD[0..31]

PCI_AD[0..31] 17,29

C

PC M_ID

17,29
17,29
17,29
17,29

PCI_PERR# 17,29
PCI_SERR# 17,29
PCI_REQ#2 17
PCI_GNT#2 17
CLK_PCI_PCM 14

R311 2

R302 1
R301 1

R312
220_0402_5%

PC I_AD20
1
100_0402_5%

2
R283

B

R562 2
R563 2

0_0402_5%
1
1 @ 0_0402_5%

1 4.7K_0402_5%

PCI_RST# 17,22,29,33,34
PLT_RST# 6,16,17,19,21,22,27,33,34

+3VS

PCM_SPK# 30
PCI_PIRQA# 17
PCI_PIRQB# 17
PCI_PIRQC# 17
SERIRQ 19,33,34
PCI_PIRQD# 17
5IN1_LED 25,38

2 220_0402_5%
2 220_0402_5%

+3VS

R299 1

2 10K_0402_5%

R300 1

2 @ 10K_0402_5%

1

C322
0.1U_0402_16V4Z

PCM_SPK#

R586 1

10K_0402_5%

2

A

2

2

1

1

C588

PCI7421GHK_PBGA288

VSSPLL
VSSPLL

R242 1

2
10U_0805_10V4Z

P14
T17

PHY_TEST_MA

AGND
AGND
AGND

R17

X2
24.576MHz_16P_3XG-24576-43E1

2

2
R265
56.2_0402_1%

1

2 4.7K_0402_5%

AVDD_7421 R276 1
R254 2
C587

CLK_48

R238 1

TPBIAS0
TPA0+
TPA0TPB0+
TPB0TPBIAS1
TPA1+
TPA1TPB1+
TPB1-

TPA1+
TPA1TPB1+
TPB1-

TPA1+
TPA1TPB1+
TPB1-

A

M1

CLK_SD_48M

TPBIAS1

R247
56.2_0402_1%

1

R251
56.2_0402_1%
39
39
39
39

14

2

2 1U_0603_25V4Z
2

C274 1

2

1

1

B

+3VS
C362
220P_0402_50V7K

N12
U14
U16

1
R346
5.11K_0402_1%

1

2 1U_0603_25V4Z
+3VS

AVDD
AVDD
AVDD
25
25
25

C

0.1U_0402_16V4Z
1
C295

C310

25 MC_PW R_CTRL_0

C387 1

2 1U_0603_25V4Z

C288

R13
R14
V17

2

1

C286

+3VS

2

2
10U_1206_16V4Z

D

1
C283

W10
W3

1
C291

VCCP
VCCP

1

M19
H1

C589

+VDPLL_33

2
CHB1608U800_0603

VR_PORT
VR_PORT

0.1U_0402_16V4Z

1

1

R264
5.11K_0402_1%

2

LED R MAY CHANGE TO 150OHM

C280
220P_0402_50V7K

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC, M/B LA-2492
Size

4

3

2

R ev
B

401317
D ate:

5

Document Number
¬P 期一, 一月 03, 2005

Sheet
1

24

of

51

5

4

3

2

1

D

D

5 in 1 CardReader Conn.
JP29
MSDATA0_SDDAT0_SMD0
MSDATA1_SDDAT1_SMD1
MSDATA2_SDDAT2_SMD2
MSDATA3_SDDAT3_SMD3
SMD4
SMD5
SMD6
SMD7

24 MSDATA0_SDDAT0_SMD0
24 MSDATA1_SDDATA1_SMD1
24 MSDATA2_SDDAT2_SMD2
24 MSDATA3_SDDAT3_SMD3
24
SMD4
24
SMD5
24
SMD6
24
SMD7

+3VS

R267 2

1 10K_0402_5%

SDC D#

R233 2

1 10K_0402_5%

MSCD#

R200 2

1 10K_0402_5%

SMCD#

SMELWP#
SM_PHYS_WP#
MSBS_SDCMD_SMWE2
SMALE

24
SMELWP#
24 SM_PHYS_WP#
24 MSBS_SDCMD_SMWE2
24
SMALE

R583 2

1 2.2K_0402_5%

R584 2
SMELWP# R585 2

2
R602
SMRB#
2
SMRE# R582
SDW P_SMCE#
SMCD#
2
R603
SMCLE

+VCC_5IN1
24
SMRB#
24
SMRE#
24 SDW P_SMCE#
24
SMCD#

SMRB#

24

1 @ 43K_0402_5%

SDW P_SMCE#

1 0_0402_5%

SM_PHYS_WP#

SMCLE

35
43
36
37

25
3
1
0_0402_5% 29
26
1
0_0402_5% 27
28
30
1
0_0402_5% 2
38

SMCD#

C

+VCC_5IN1

34
33
32
31
21
22
23
24

SM-D0
SM-D1 / XD-D1
SM-D2 / XD-D2
SM_D3 / XD_D3
SM-D4 / XD-D4
SM-D5 / XD-D5
SM-D6 / XD-D6
SM-D7 / XD-D7

SD-DAT3
SD-DAT2
SD-DAT1
5 IN 1 CONN SD-DAT0
SD-WP-SW
SD-CMD
SD_CLK
SD-VCC
SD-CD-SW
SM_WP-IN / XD_WP-IN
SD-VCC-SW
SM-WP-SW
SD-COM-SW
#SM_-WE / XD_-WE
#SM-ALE / XD-ALE
MS-DATA0
MS-DATA1
SM-LVD
MS-DATA2
SM-VCC-SW
MS-DATA3
SM_-VCC / XD_-VCC
MS-SCLK
#SM_R/-B / XD_R/-B
MS-INS
#SM_-RE / XD_-RE
MS-BS
#SM_-CE / XD_-CE
MS-VCC
#SM_-CD
SM-COM-SW
XD-VCC
SM-CLE / XD-CLE
XD-CD
GND
GND

11
12
6
7
5
10
8
9
4
42
41

MSDATA3_SDDAT3_SMD3
MSDATA2_SDDAT2_SMD2
MSDATA1_SDDAT1_SMD1
MSDATA0_SDDAT0_SMD0
SDW P_SMCE#
MSBS_SDCMD_SMWE2
MSCLK_SDCLK
R626
R627

1 @ 0_0402_5%
1 0_0402_5%

2
2

MSCLK_SDCLK 24
+VCC_5IN1
SDCD#
24

SDC D#

MSDATA0_SDDAT0_SMD0
MSDATA1_SDDAT1_SMD1
MSDATA2_SDDAT2_SMD2
MSDATA3_SDDAT3_SMD3
MSCLK_SDCLK
MSCD#
MSBS_SDCMD_SMWE2

15
14
16
18
19
17
13
20

C

MSCD#

24

+VCC_5IN1

40
39
1
44

+VCC_5IN1

SMCD#

TAITW UN_R007-L30-15-S

TI Workaround need check
+VCC_5IN1

1U_0603_10V4Z

2

+3VS

2

1
2
3
4

1

2
1

24 MC_PW R_CTRL_0
D

Q30

1

B

R589

GND
IN
IN
EN#

OUT
OUT
OUT
OC#

8
7
6
5

R353
10K_0402_5%

@

1

4.7U_0805_10V4Z

0.1U_0402_16V4Z
+3VS

TPS2041ADR_SO8

C685
S

C393

2

1

0.1U_0402_16V4Z

0_0402_5%

2
G
3

2
10K_0402_5%

+VCC_5IN1
U33

1

+3VS

R588

R286

2
C397

C381

R354
10K_0402_5%

24,38 5IN1_LED

4.7K_0402_5%

2

SD/XD/MS/SM PWR SWITCH

+3VS

1

B

2
C398
4.7U_0805_10V4Z

0.1U_0402_16V4Z

C382

1

2

1

C394
1U_0603_10V4Z

1

@ 2N7002_SOT23

A

A

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC, M/B LA-2492
Size

4

3

2

R ev
B

401317
D ate:

5

Document Number
¬P 期一, 一月 03, 2005

Sheet
1

25

of

51

5

4

3

2

1

CardBus Socket
JP19
FOX_1CA84122-TC-4F_150P

Power Switch for PCMCIA
D

23
DATA
23
CLOCK
23
LATCH
16,32,34,36,37,41,47,48 SUSP#

2
R483

+3VS

+3VS

23
23

S1_CD2#
S1_WP

23

S1_BVD1

23

S1_BVD2

23

S1_REG#

23

S1_INPACK#

23

S1_WAIT#

23

S1_RST

U39

3
4
5
12
15
21

1
10K_0402_5%
+S1_VPP

2
0.01U_0402_16V7K
2
1U_0402_6.3V4Z

1
C582
1
C583

2
10U_1206_16V4Z

1
C579

20mil
+S1_VCC

40mil
+S2_VPP

2
0.01U_0402_16V7K
2
1U_0402_6.3V4Z

1
C247
1
C246

2
10U_1206_16V4Z

+S2_VCC

DATA
CLOCK
LATCH
RESET#
OC#
SHDN#

12V
12V

20
7

3.3V
3.3V

14
13

C244

0.1U_0402_16V4Z

C580

4.7U_0805_10V4Z

8
19

AVPP
BVPP

5V
5V
5V

24
2
1

+5VS
C585

0.1U_0402_16V4Z

9
10

AVCC
AVCC

GND

11

C586

4.7U_0805_10V4Z

17
18

BVCC
BVCC

NC
NC
NC
NC

23
22
16
6

23

S1_VS2

TPS2224ADBR_HTSSOP24

1
C584
C276

C

0.1U_0402_16V4Z

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75

S1_CD2#
S1_WP
S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1
S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3
S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25
S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22
S1_A16

+S1_VPP
+S1_VCC
23
C263

23

S1_RDY#
S1_WE#

0.1U_0402_16V4Z

23

S1_A[0..25]

23

S1_D[0..15]

23

S2_A[0..25]

23

S2_D[0..15]

S 1_A[0..25]
S1_ D[0..15]

S 2_A[0..25]
S2_ D[0..15]

23

S1_IOW R#

23
23
23

S1_IORD#
S1_OE#
S1_VS1

23
23

S1_CE2#
S1_CE1#

B

S1_CD1#

S1_A20
S1_A14
S1_A19
S1_A13
S1_A18
S1_A8
S1_A17
S1_A9
S1_IOW R#
S1_A11
S1 _IORD#
S1_OE#
S1_VS1
S1_A10
S1_CE2#
S1_CE1#
S1_D15
S1_D7
S1_D14
S1_D6
S1_D13
S1_D5
S1_D12
S1_D4
S1_D11
S1_D3
S1_CD1#

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75

S2_CD2#
S2_WP
S2_D10
S2_D2
S2_D9
S2_D1

S2_CD2# 23
S2_WP
23

S2_D8
S2_D0
S2_BVD1
S2_A0
S2_BVD2
S2_A1
S2_REG#

S2_BVD1

23

S2_BVD2

23

D

S2_REG# 23

S2_A2
S2_INPACK#
S2_A3
S2_WAIT#
S2_A4
S2_RST
S2_A5

S2_INPACK# 23
S2_WAIT# 23

S2_VS2
S2_A6
S2_A25
S2_A7
S2_A24
S2_A12
S2_A23

S2_RST

23

S2_VS2

23

S2_A15
S2_A22
S2_A16

C272

C

0.1U_0402_16V4Z
+S2_VPP
+S2_VCC

S2_RD Y#
S2_A21
S2_WE#

S2_RDY# 23
S2_WE#

23

S2_A20
S2_A14
S2_A19
S2_A13
S2_A18
S2_A8
S2_A17

C264
0.1U_0402_16V4Z

S2_A9
S2_IOW R#
S2_A11
S2 _IORD#
S2_OE#
S2_VS1
S2_A10

S2_IOW R# 23
S2_IORD# 23
S2_OE#
23
S2_VS1
23

S2_CE2#
S2_CE1#
S2_D15
S2_D7
S2_D14
S2_D6
S2_D13

S2_CE2#
S2_CE1#

23
23
B

S2_D5
S2_D12
S2_D4
S2_D11
S2_D3
S2_CD1#

S2_CD1# 23

3
4
5
6

GND
GND
GND
GND

23

S1_RD Y#
S1_A21
S1_WE#

a68
b68
a34
b34
a67
b67
a33
b33
a66
b66
a32
b32
a65
b65
a31
b31
GND
GND
a64
b64
a30
b30
a63
b63
a29
b29
a62
b62
a28
b28
a61
b61
GND
GND
a27
b27
a60
b60
a26
b26
a59
b59
a25
b25
a58
b58
a24
b24
GND
GND
a57
b57
a23
b23
a56
b56
a22
b22
a55
b55
a21
b21
a54
b54
GND
GND
a20
b20
a53
b53
a19
b19
a52/a18 b52/b18
none
none
a51/a17 b51/b17
a16
b16
a50
b50
a15
b15
GND
GND
a49
b49
a14
b14
a48
b48
a13
b13
a47
b47
a12
b12
a46
b46
GND
GND
a11
b11
a45
b45
a10
b10
a44
b44
a9
b9
a43
b43
a8
b8
GND
GND
a42
b42
a7
b7
a41
b41
a6
b6
a40
b40
a5
b5
a39
b39
GND
GND
a4
b4
a38
b38
a3
b3
a37
b37
a2
b2
a36
b36
a1
b1
a35
b35

A

A

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC, M/B LA-2492
Size

4

3

2

R ev
B

401317
D ate:

5

Document Number
¬P 期一, 一月 03, 2005

Sheet
1

26

of

51

5

4

3

2

1

U36

28
28
28
28
28
28
28
28

LAN_MIDI0+
LAN_MIDI0LAN_MIDI1+
LAN_MIDI1LAN_MIDI2+
LAN_MIDI2LAN_MIDI3+
LAN_MIDI3-

LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-

17
18
20
21
26
27
30
31

MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3

VPD_CLK
VPD_DATA

+3VALW

R437
R438

1 4.7K_0402_5%
1 4.7K_0402_5%

2
2

VPD_CLK
VPD_DATA
LAN_X1
LAN_X2

+3VALW
R76
R74

C

R73

2
2

1 10K_0402_5%
1 10K_0402_5%

R425 2

1 10K_0402_5%

R73

1 4.7K_0402_1%
LAN_CTRL25
LAN_CTRL12

2

--

2K for 88E8036

LED

PCI-E

LED_ACTn
LED_LINK10/100n
LED_LINK1000n
LED_LINKn

59
60
62
63

TESTMODE
TSTPT

46
29

TEST

34
35
37
36

SPI_DO
SPI_DI
SPI_CLK
SPI_CS

FLASH
MEMORY

15
14

XTALI
XTALO

CLOCK

10
12
11
47
9
24
25
16
4
3

LOM_DISABLEn
VAUX_AVLBL
SWITCH_VCC
VMAIN_AVLBL
SWITCH_VAUX
HSDACP
HSDACN
Analog
RSET
CTRL25
CTRL12

D

+LAN_AVDD25

AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL

+LAN_AVDDL 1
L26

AVDD

23

VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL

1
8
40
45
61

+3VALW

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

2
7
13
33
39
44
48
58

+LAN_VDD12

EPAD

65

SMCLK/NC
SMDATA/NC

42
43

EEPROM

R77
4.7K_0402_5%

+LAN_AVDD25

64

GROUND

VPD_CLK
VPD_DATA

LAN_LINK# 38,39

19
22
28
32
51
52
57

&

38
41

LAN_ACTIVITY# 38,39

VDD25

POWER
Media

LAN _ACTIVITY#
LED_10/100
LED_1000
L AN_LINK#

3

PLT_RST#

TX_P
TX_N
RX_P
RX_N
WAKEn
REFCLKP
REFCLKN
PERSTn

LAN_CTRL12

1
Q11
BCP69_SOT223

2
0_0402_5%
2
4

D

+3VALW

49
50
54
53
6
55
56
5

+LAN_AVDDL
C467
1

0.1U_0402_16V4Z
2

40mil
+LAN_VDD12

1

+LAN_AVDD

2

C51
4.7U_0805_10V4Z

+3VALW

C

R71
4.7K_0402_5%

88E8053_QFN64

LAN_CTRL25

3

19 ICH_PCIE_W AKE#
14 CLK_PCIE_LAN
14 CLK_PCIE_LAN#
6,16,17,19,21,22,24,33,34 PLT_RST#

PCIE_PTX_IRX_P1
PCIE_PTX_IRX_N1

1

2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

2

C507 1
C508 1

1

PCIE_PTX_C_IRX_P1
PCIE_PTX_C_IRX_N1
PCIE_ITX_C_PRX_P1
PCIE_ITX_C_PRX_N1

PCIE_PTX_C_IRX_P1
PCIE_PTX_C_IRX_N1
PCIE_ITX_C_PRX_P1
PCIE_ITX_C_PRX_N1

2

19
19
19
19

1
Q10
BCP69_SOT223

2
4

4.7K for 88E8053

40mil

+3VALW

+LAN_AVDD25

1

+3VALW
C43
4.7U_0805_10V4Z
C521

1

2 0.1U_0402_16V4Z

1

U38
VPD_CLK
VPD_DATA

8
7
6
5

VCC
WP
SCL
SDA

A0
A1
A2
GND

2

1
2
3
4

1

C484
0.1U_0402_16V4Z

2

1

C492
0.1U_0402_16V4Z

2

C479
0.1U_0402_16V4Z

1

2

1

C497
0.1U_0402_16V4Z

2

2

1

2

C504
0.1U_0402_16V4Z

C503
0.1U_0402_16V4Z

AT24C16N10SC-2.7_SO8
B

1

B

+LAN_AVDDL
R436

2

100K_0402_5%

1

2

1
C464
0.1U_0402_16V4Z

2

1
C468
0.1U_0402_16V4Z

2

1
C466
0.1U_0402_16V4Z

2

1
C465
0.1U_0402_16V4Z

2

1
C501
0.1U_0402_16V4Z

2

C500
0.1U_0402_16V4Z

+LAN_VDD12
Y4
LAN_X1

1
A

2

LAN_X2

25MHZ_20P_1BX25000CK1A
C473
27P_0402_50V8J

1
1

2

C476
27P_0402_50V8J

2

1
C493
0.1U_0402_16V4Z

2

1
C502
0.1U_0402_16V4Z

2

1
C480
0.1U_0402_16V4Z

2

1
C491
0.1U_0402_16V4Z

2

1
C477
0.1U_0402_16V4Z

2

C499
0.1U_0402_16V4Z

A

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

27

of

51

5

4

3

2

1

unpop when use 88E8036(10/100)

1

1

C35

C36

D

D

2 0.1U_0402_16V4Z

1

24ST0023-3(SP050004200) for 88E8036(10/100)
24HST1041A-3(SP050002110) for 88E8053(GbE)
T1

1

MCT1

24

MX1+

23

RJ45_MDI3-

TD1-

MX1-

22

RJ45_MDI3+

TCT2

MCT2

21

MX2+

20

RJ45_MDI2-

MX2-

19

RJ45_MDI2+

MCT3

18

MX3+

17

RJ45_MDI1-

RJ45_MDI1+

TCT1

27

LAN_MIDI3-

LAN_MDI3-

2

TD1+

27

LAN_MIDI3+

LAN_MDI3+

3
4

27

LAN_MIDI2-

LAN_MDI2-

5

TD21+

27

LAN_MIDI2+

LAN_MDI2+

6

TD2-

C

27

LAN_MIDI1-

LAN_MDI1-

27

LAN_MIDI1+

LAN_MDI1+

7

TCT3

8

TD3+

MX3-

16

TCT4

MCT4

15

TD4+

MX4+

14

RJ45_MDI0-

MX4-

13

RJ45_MDI0+

LAN_MDI0+

12

1

0.1U_0402_16V4Z

2
2

RJ45_MDI2+ 38,39

RJ45_MDI1- 38,39

RJ45_MDI1+ 38,39

RJ45_MDI0- 38,39

RJ45_MDI0+ 38,39

R396
75_0402_1%

R395
75_0402_1%

C37

B

0.1U_0402_16V4Z

RJ45_MDI3RJ45_MDI3+

R390 1
R391 1

2 @ 0_0402_5%
2 @ 0_0402_5%

RJ45_MDI2RJ45_MDI2+

R393 1
R394 1

2 @ 0_0402_5%
2 @ 0_0402_5%

R392
75_0402_1%

R389
75_0402_1%

2

reseved for 88E8036(10/100)

1

C38

1

R64
49.9_0402_1%

1

RJ45_MDI2- 38,39

24HST1041A-3_24P

1

2

TD4-

RJ45_MDI3+ 38,39

2

B

1:1

2

1

2

R65
49.9_0402_1%
49.9_0402_1%

2

2

1

LAN_MIDI0+

1

27

1

11

RJ45_MDI3- 38,39

C

TD3-

LAN_MDI0-

R67

1:1

9

LAN_MIDI0-

R66

1:1

10
27

49.9_0402_1%

1:1

1

1

R61
49.9_0402_1%

2

2

2

R58
49.9_0402_1%

2

1

1

+LAN_AVDD25
R59
49.9_0402_1%
R60
49.9_0402_1%

2

2 0.1U_0402_16V4Z

RJ4 5_GND

RJ45_GND 38,39

A

A

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC, M/B LA-2492
Size

4

3

2

R ev
B

401317
D ate:

5

Document Number
¬P 期一, 一月 03, 2005

Sheet
1

28

of

51

A

B

C

D

E

+3V

1

1

5

C179 1

B

34,35,37 KILL_SW#

2

A

4

G

JP28
TC7SH08FU_SSOP5
TIP

LAN RESERVED

D6
RB751V_SOD323
1
2

+3VS_MINIPCI

+3V

L13
1
2
0_0603_5%

W=40mils17

CLK_PC I_MINI

PCI_REQ#1
PC I_AD31
PC I_AD29

CLK_PC I_MINI

1

2

PC I_AD27
PC I_AD25

R156
@ 33_0402_5%
17,24 PCI_C/BE#3

2

PC I_AD23
PC I_AD21
PC I_AD19

1

2

PCI_PIRQH#

PCI_PIRQH#

14 CLK_PCI_MINI
17

C174
@ 10P_0402_50V8J

PC I_AD17
17,24 PCI_C/BE#2
17,24 P C I_ IRDY#
19,33 PM_CLKRUN#
17,24 PCI_SERR#
17,24 PCI_PERR#
17,24 PCI_C/BE#1

PC I_AD14
PC I_AD12
PC I_AD10
PCI_AD8
PCI_AD7
PCI_AD5

3

PCI_AD3
W=30mils

+5VS_MINIPCI

+5VS

PCI_AD[0..31] 17,24

MINI_PCI SOCKET
Y

3

34

PCI_AD[0..31]

U9

P

W L_OFF#

1

2 0.1U_0402_16V4Z

1
L12

PCI_AD1

2

W=30mils
0_0603_5%

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

0603

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

RING

LAN RESERVED

W=30mils
PCI_ PIRQG#

+3VS_MINIPCI
+3V
PCI_RST# 17,22,24,33,34W=40mils

L14
1
2
0_0603_5%

PCI_GNT#1 17

+3V

WLANPME# 33,34

2

PC I_AD30
PC I_AD28
PC I_AD26
PC I_AD24
MINI_ IDSEL1
R162
PC I_AD22
PC I_AD20

2

PC I_AD18
100_0402_5%

IDSEL : PCI_AD18

PCI_PAR 17,24

PC I_AD18
PC I_AD16

PCI_FRAME# 17,24
PCI_TRDY# 17,24
PCI_STOP# 17,24
PCI_DEVSEL# 17,24
PC I_AD15
PC I_AD13
PC I_AD11

+5VS_MINIPCI

1

2

2
C178
@ 1000P_0402_50V7K

1

2
C181
@ 0.1U_0402_16V4Z

1

1
C173
@ 0.1U_0402_16V4Z

2

C175
@ 10U_1206_16V4Z

PCI_AD9
PCI_C/BE#0 17,24
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

3

+3VS_MINIPCI

2

1

W=20mils

2

QTC_C102A-040B31-4

+5VS_MINIPCI

+5VS_MINIPCI
PCI_PIRQG# 17

W=40mils
PCI_RST#

1

2
C182
0.1U_0402_16V4Z

1

2
C176
0.1U_0402_16V4Z

1

2
C171
0.1U_0402_16V4Z

1

2
C172
0.1U_0402_16V4Z

1

1
C177
0.1U_0402_16V4Z

C184
10U_1206_16V4Z

2

+3V

C183
0.1U_0402_16V4Z

4

4

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
E

29

of

51

A

B

C

C296

D

E

F

G

+VDDA

2 0.1U_0402_16V4Z

1

2

1

C308
22U_1206_16V4Z_V1

2

4

VIN

C312

2

DELAY

0.1U_0402_16V4Z

7

ERROR

8

5
6

CNOISE

1

GND

3

+VDDA

SD

R496
30K_0402_1%

1
C599

SI9182DH-AD_MSOP8

R498
10K_0402_5%

1

VOUT
SENSE or ADJ

40mil
2

+5VALW

C603
1U_0402_6.3V4Z
2
1

1

7

1U_0402_6.3V4Z

R495
1
2
560_0402_5%

U24

1

O

1U_0402_6.3V4Z

2
B
E

0.1U_0402_16V4Z
MO NO_IN

1U_0402_6.3V4Z
1
2
Q28
R502
2SC2411K_SC59 2.4K_0402_5%

7

31
C600
2
1

R336 2

1 @ 6.8K_0402_5%

R349 2

1 @ 6.8K_0402_5%

LINE_IN_L

R342 2

1 6.8K_0402_5%

LINE_IN_R

R345 2

1 6.8K_0402_5%

R493

31

+3V

O

LINEL
L INER

C639
@ 1U_0402_6.3V4Z

2

2

14
I

1

2 C359
1U_0402_6.3V4Z

D12
RB751V_SOD323

R279
10K_0402_5%

P
5

1

1

2

2

C640
@ 1U_0402_6.3V4Z

+3V

6

1

AC97 Codec

7

U25C
SN74LVC14APWLE_TSSOP14

2

SB_SPKR

2 C354
1U_0402_6.3V4Z

G

19

1

1

1
2
560_0402_5%

1

1U_0402_6.3V4Z

R497
10K_0402_1%

2

2

I

U25B
SN74LVC14APWLE_TSSOP14

C

R494
1
2
560_0402_5%

C604
1
2

3

PCM_SPK#

1

14
P

C601
2
1

4

G

24

3

C313
10U_1206_16V4Z

2
34,38,40,41,47 S YSON

+3V

4.85V

1

2

1

I

R501
10K_0402_5%

2

14
P
BEEP#

G

34

U25A
SN74LVC14APWLE_TSSOP14
C602
2
1
O 2

(output = 250 mA)

60mil

1

1

1

H

28.7K for Module Design (VDDA = 4.702)

1

+3V

2

2

2 @FBM-L10-160808-301-T_0603

L19 1

2

R536
@ 1K_0402_5%

+3VS

22,32

R329 2

1 6.8K_0402_5%

R323 2

1 20K_0402_5%

R328 2

INT_CD_R

R315

CD_AGND

2

1

20K_0402_5%

15

AUX_R

16

JD2

17

JD1

HP_OUT_L

39

HP_OUT_L 31

LINEL

23

LINE_IN_L

HP_OUT_R

41

HP_OUT_R 31

L INER

24

LINE_IN_R

1U_0402_6.3V4Z

18

CD_L

MIC

2

1U_0603_10V4Z

19

2

C_M IC
1U_0603_10V4Z

21

MIC1

1

2

22

MIC2

1U_0603_10V4Z

13

2

0.1U_0402_16V4Z
MO NO_IN
12

R522 1

2

18,35 IC H _AC_SYNC

R287 1

18,35 ICH_AC_SDOUT

R290 1

2 22_0402_5%
2 22_0402_5%
2 22_0402_5%

2

SMB_DATA

EAPD

R321
@ 0_0402_5%

2
0_0603_5%
1

1
R307

32,34

4

1
R306

2
0_0603_5%

1
R284

2
0_0603_5%

11
10
5

LINE_OUT_R

36

AMP_RIGHT 32

MONO_OUT/VREFOUT3

37

6

R289

1

2 22_0402_5%

ICH_AC_BITCLK 18,35

8

R288

1

2 22_0402_5%

ICH_AC_SDIN0 18

XTL_IN

2

1

D

S

SMB_DATA

D

3

Q59
1
R542

BIT_CLK

2
0_0402_5%

R540
@ 4.7K_0402_5%

1

4,34,39 EC_SMB_DA2

SDATA_IN
CD_R

1
C349

18,35 ICH_AC_RST#

20

C334 1
C344

1

1
2

6.8K_0402_5%

1U_0402_6.3V4Z

AMP_LEFT 32

1
R538

2

1U_0603_10V4Z

C318
R324

2

2

35

LINE_OUT_L

2 1
G

1

2

SMB_CLK

@ 2N7002_SOT23

S

C609

C339 1

3

9

AUX_L

1

0_0402_5%

1

14

CD_ GNA

R282

DVDD2

1U_0603_10V4Z

CD_ GNA

22

R539
@ 1K_0402_5%

2

2

1
Q58

0.1U_0402_16V4Z

1

C332 1

4,34,39 EC_SMB_CK2

C314
10U_1206_16V4Z

C608

1 20K_0402_5%

32

2

@ 2N7002_SOT23
2
0_0402_5%

3

R291 1

2

INT_CD_L

C317

2

2 @ 0_0402_5%

CLK_14M_CODEC 14

CD_GND
R521
@ 1M_0402_5%

XTL_OUT

3

PHONE

AFILT1

29

PC_BEEP

AFILT2

30

47

SPDIFI/EAPD

48

SPDIFO

4
7

DVSS1
DVSS2
U27

2 1000P_0402_50V7K

28

DCVOL

32

C389 1
C612 1

NC
VREFOUT2
VAUX
DISABLE#
SCK

31
33
34
43
44

C641 1
R523 1
R524 1
R525 1
SMB_CLK

NC
AVSS1
AVSS2

40
26
42

2

C610
22P_0402_25V8K

1

2

C611
22P_0402_25V8K

+AUD_VREF
1U_0402_6.3V4Z

SDATA_OUT
SDA
XTLSEL

C388 1

27

SYNC

45
46

2 1000P_0402_50V7K

VREF

2

1 24.576MHz_16P_3XG-24576-43E1

C373 1

VREFOUT
RESET#

X4 1

1

22,32

3

1 6.8K_0402_5%

1

C316

2
0.1U_0402_16V4Z

32,38 NBA_PLUG
R309 2

1

2
DVDD1

2

C366

38

2

1

25

C348
10U_0805_10V4Z

FBM-L10-160808-301-T_0603

Change to 0 ohm
1

AVDD2

0.1U_0402_16V4Z
1
1
C369

AVDD1

L21
1
2
FBM-L10-160808-301-T_0603

2 1
G

+AC97_DVDD

0.1U_0402_16V4Z
+VDDA

R537
@ 4.7K_0402_5%

2

L18 1
+AVDD_AC97

2 0.01U_0402_16V7K
1U_0603_10V4Z
2
2

1U_0603_10V4Z
2 @ 0_0402_5%
2 @ 0_0603_5%
0_0402_5%
2

1
R526

1

+AVDD_AC97
EC_IDERST 21,34

2
@ 10K_0402_5%

C368

2

1

2

C367
0.1U_0402_16V4Z

+3VS

4

ALC250-VD_LQFP48

DGND

AGND

Compal Electronics, Inc.
Title

GND

With 14.318Mhz : R321 POP

GNDA
A

With 24.576Mhz : R321 DEPOP
B

C

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D

E

F

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005
G

Sheet

30

of
H

51

5

R330 1

2 1K_0402_5%

R320 1

1U_0402_6.3V4Z

2 10K_0402_5%

R298 1
+VDDA
C315 1

2 10K_0402_5%

2

-

3

+

1U_0402_6.3V4Z
R334 1

+DOCK_AUD_VREF

39

1
C329

L INEIR#

R319 1

2

2 1K_0402_5%

R314 1

1U_0402_6.3V4Z

11

D

2 4.7K_0402_5%

2 10K_0402_5%

2

1U_0402_6.3V4Z

O

1

LINE_IN_L 30

+VDDA

U26A
LMV824MTX_TSSOP14

D

+VDDA

R326 1

R294
1
2
100K_0402_5%

2 4.7K_0402_5%

1
C330

+VDDA

R308
100K_0402_5%

1
2 10K_0402_5%

6

-

V+

C345

1000P_0402_50V7K

2 R333
1

2 1K_0402_5%

5

+

V-

R332 1

2
1U_0402_6.3V4Z

R335 1

+DOCK_AUD_VREF

R358 1

2 4.7K_0402_5%

11

1

L IN EIR

-

10

+

2

+DOCK_AUD_VREF

O

8

+ DOCK_AUD_VREF

U26C
LMV824MTX_TSSOP14

1

C331
0.1U_0402_16V4Z

C341
1U_0402_6.3V4Z

2

4

1
C343

9

1
1000P_0402_50V7K

2

39

4

R292 1

V+

2
2 1K_0402_5%

R297 1

2

1000P_0402_50V7K

V-

1
C320

4

1
C321

V+

1000P_0402_50V7K

2

LINEIL

2 4.7K_0402_5%

1
C337

39

1

V-

2

2

11

1
C336

LINEIL#

3

2

39

4

O

7

LINE_IN_R 30

U26B
LMV824MTX_TSSOP14

2 22K_0402_5%
1

2
68P_0402_50V8K

C378

+VDDA

C

C

C360
0.1U_0402_16V4Z

+

V+
V-

3

U30C
LMV824MTX_TSSOP14

O

1

1

2

C350

1U_0402_6.3V4Z

LINEOL 39

U30A
LMV824MTX_TSSOP14

R360
4.7K_0402_5%

1

1

+

8

11

2

O

-

2

10

+DOCK_AUD_VREF

-

2

1U_0402_6.3V4Z

4

2
9

V+

R361
22K_0402_5%
2
1
2
1U_0402_6.3V4Z

V-

1
C379

HP_OUT_L

11

30

C355 1

4

+VDDA

R357 2

1 4.7K_0402_5%

6

-

V+

+DOCK_AUD_VREF

5

+

V-

4

+VDDA

11

2
C358
0.1U_0402_16V4Z

O

7

1

2

C372

1U_0402_6.3V4Z

LINEOL# 39

U30B
LMV824MTX_TSSOP14

1

B

B

R372 1

2 22K_0402_5%
1

2
68P_0402_50V8K

C405

+VDDA

1

C406
0.1U_0402_16V4Z

2

-

V+

3

+

V-

8
2

+

O

U31C
LMV824MTX_TSSOP14

11

2

-

2
1U_0402_6.3V4Z

O

1

1

2

C391

1U_0402_6.3V4Z

LINEOR 39

U31A
LMV824MTX_TSSOP14

R369
4.7K_0402_5%

1

+DOCK_AUD_VREF

1
C390

4
9
10

V+

1
C400

V-

HP_OUT_R

11

30

R371
22K_0402_5%
2
1
2
1U_0402_6.3V4Z

4

+VDDA

R367 2

1 4.7K_0402_5%

+DOCK_AUD_VREF

-

5

+

11

2

6

V+

A

V-

4

+VDDA

C386
0.1U_0402_16V4Z

O

7

1
C392

2
1U_0402_6.3V4Z

LINEOR# 39

A

U31B
LMV824MTX_TSSOP14

1

Compal Electronics, Inc.
Title

PROPRIETARY NOTE

SCHEMATIC, M/B LA-2492

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

4

R ev
B

401317
D ate:

5

Document Number

3

2

¬P 期一, 一月 03, 2005

Sheet
1

31

of

51

A

B

C

D

E

1

+5VCD

R318
100K_0402_5%

2

+5VCD

SHUTDOW N#
Q29
2N7002_SOT23
2
G

1

W=40mil

D

1

JP8

S

EAPD

EAPD

30,34

1
1
1
1

2
2
2
2

0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%

4
3
2
1
ACES_85204-0400

R331 1

2 100K_0402_5%
38

30
30

SPKL+
SPKR+
LINE_OUTL

AMP_LEFT

VOL_AMP

1
C327

L INE_OUTR

AMP_RIGHT

PATH_SEL_1
VOL_AMP

1
C328

2
3
4
21
5
23
6
20

LEFT_2
R IGHT_2

2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z

17
HP_L
2
@ 1U_0402_6.3V4Z
HP _R
2
@ 1U_0402_6.3V4Z

1

22,30 INT_CD_L

C338

1

22,30 INT_CD_R

C335

2

R348 1

22
15
14
11
9
16
10
8

PVDD SHUTDOWN#
PVDD
SE/BTL#
VDD
PC-BEEP
BYPASS
HP/LINE#
LOUTVOLUME
ROUTLOUT+
LIN
ROUT+
RIN
LLINEIN
RLINEIN
GND
LHPIN
GND
RHPIN
GND
GND
CLK

1
C364

BYPASS

1
12
13
24

2

C340
0.1U_0402_16V4Z 1

C333

2
2 0.1U_0402_16V4Z

D36

D37
@ PSOT24C_SOT23

@ PSOT24C_SOT23

2

C351
1
1U_0402_6.3V4Z

1
1
2

+5VCD

2
0.1U_0402_16V4Z
SPKLSPKR-

2

C361
1U_0402_6.3V4Z
1

TPA0232PWP_TSSOP24

2

2 100K_0402_5%

NBA_PLUG

1

7
18
19

2

U29

3

3

S

Q31
2
G
@ 2N7002_SOT23

R565
R566
R567
R568

2

D

SPKL+
SPKLSPKR+
SPKR-

1

2

Speaker Conn.
EC_MUTE 34

3

2

C347
4.7U_0805_10V4Z

1

C346
0.1U_0402_16V4Z

1
3

1

1

1

C356
1U_0402_6.3V4Z

C353
0.047U_0402_16V7K

2

1 C342
0.1U_0402_16V4Z

HeadPhone JACK
JP22

5
NBA_PLUG

30,38 NBA_PLUG
SPKR+

C352 1

+

+5VCD

2 150U_4A_10VM

1

2

SPKL+

C399 1

+

2

R356

2 150U_4A_10VM

4

L22 1

2 FBM-11-160808-700T_0603

L24 1

2 FBM-11-160808-700T_0603

0_0402_5%

1

2

R362

0_0402_5%

3
6
2
1

R337
@ 100K_0402_5%

FOX_JA6033L-5S3-TR

1

C376
330P_0402_50V7K

C370
330P_0402_50V7K

1

PATH_SEL_1

D

2
G

SUSP#

3

Q33
@ 2N7002_SOT23 S
3

3

+5VCD

Q39
AOS 3401_SOT23

+AUD_VREF

1

2

MIC JACK

2

C365
0.1U_0402_16V4Z

10K_0402_5%

MIC1

1
2
W M-64PCY_2P

16,26,34,36,37,41,47,48 SUSP#

SUSP#

22K

2

22K

3

Q36
DTC124EK_SOT23

4

CD_PLAY

30
1

2

MIC 1
L23

MIC

R351
4.7K_0402_5%

C395
220P_0402_50V7K

FBM-11-160808-700T_0603
1
C377
220P_0402_50V7K

CD_PLAY 22,34

4
3
6
2
1

2

22K

3

22K

2

JP21

5
R352
4.7K_0402_5%

1

R343

1

1
C371
10U_1206_16V4Z

2

1
1U_0402_6.3V4Z

1

1

2
C383

2
240K_0402_5%

1

1
R363

2

2

2
+5VALW

1

3

+5VALW

FOX_JA6033L-5S3-TR

2

Q32
DTC124EK_SOT23
SW DJ@

4

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size
B
D ate:

Document Number

R ev
B

401317
¬P 期一, 一月 03, 2005

Sheet
E

32

of

51

A

B

C

D

E

+3VS

SUPER I/O SMsC LPC47N217
LPC_A D[0..3]

18,34 LPC_AD[0..3]

1

+3VS

1 100K_0402_5%

BT_DET#

R543 2

1 100K_0402_5%

LPT_DET#

R544 2

1 100K_0402_5%

SERIAL_DET#

R564 2

1 100K_0402_5%

L CD_ID

18,34 LPC_FRAME#
18 LPC_DRQ#1
17,22,24,29,34 PCI_RST#
6,16,17,19,21,22,24,27,34 PLT_RST#

R545 1
R546 1

0_0402_5%
2
2 @ 0_0402_5%

19,29 PM_CLKRUN#
14 CLK_PCI_SIO
19,24,34 SERIRQ
29,34 SIO_PME#

LCD ID : High -- EDID
Low -- Panel ID
1 10K_0402_5%

R204 1

2 10K_0402_5%

37
17,35

15
16

LFRAME#
LDRQ#

S IO_PD#

17
18

PCI_RESET#
LPCPD#

PM_CLKRUN#
CLK _PCI_SIO
SERIRQ
SIO_PME#

19
20
21
6

CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#

FIR_DET#
BT_DET#
LPT_DET#
SERIAL_DET#

FIR_DET#
BT_DET#

38 SERIAL_DET#

SIO_GPIO11
SIO_SMI#
SIO_IRQ

9

CLK14

2

CLK _PCI_SIO

2

CLK_SIO_14M
R202
@ 10K_0402_5%

GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23

8
22
43
52

VSS
VSS
VSS
VSS

C225
@ 15P_0402_50V8J

RXD1
TXD1
D SR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD #1

IRRX2
IRTX2
IRMODE/IRRX3

37
38
39

IRRX
IRTXOUT
IR MODE

INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#

41
42
44
46
47
48
49
50
51
53
55
56
57
58
59
60
61

INIT#
S LCTIN#
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
LPTSLCT
LPTPE
L PTBUSY
LPTACK#
LPTERR#
LPTAFD#
LPTSTB#

VTR
VCC
VCC
VCC
VCC

7
11
26
45
54

FIR

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

37
37
37
37
37
37
37
37

1

IRRX
37
IRTXOUT 37
IRMODE 37

+3VS

R216
@ 10K_0402_5%

1

1

2

2

Base I/O Address
0 *= 02Eh
1 = 04Eh

SIO_GPIO11

R219
1K_0402_5%

2

POWER

+3V

1

+3VS

2

C222
0.1U_0402_16V4Z

Parallel Port

LPC47N217_STQFP64
+5V_PRN

1

1

R225
@ 10_0402_5%

62
63
64
1
2
3
4
5

CLOCK

23
24
25
27
28
29
30
31
32
33
34
35
36
40

2

RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#
RI1#
DCD1#

C227
0.1U_0402_16V4Z

C239
@ 15P_0402_50V8J

D24
+5VS

1

RB420D_SOT23

L: R POP LPT Enable
H: R De-POP LPT Disable

R37
2.2K_0402_5%

2

LPT Module

2

1

R208 2

LPC_FRAME#
LPC_DRQ#1

L CD_ID

16,17 L CD_ID

IRRX

LAD0
LAD1
LAD2
LAD3

CLK_SIO_14M

14 CLK_14M_SIO

SIO_IRQ

10
12
13
14

2

2

R223 2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

1

FIR_DET#

2

1
C216
0.1U_0402_16V4Z

2

SIO_SMI#

1 100K_0402_5%

2

1
C236
0.1U_0402_16V4Z

1

2 10K_0402_5%

R222 2

SERIAL I/F

R211 1

2

U18

LPC I/F

S IO_PD#

PARALLEL I/F

2 10K_0402_5%

GPIO

1

R224 1

1
C220
4.7U_0805_10V4Z

LPT_DET#

R551 1

2 1K_0402_5%

1

C411
2
220P_0402_50V7K

JP5
R_LPTSTB#
AFD#/3M#
+5V_PRN

3

LPTSLCT
LPTPE
L PTBUSY
LPTACK#

Close to Docking
LPTSTB#

R43

2 33_0402_5%

1

R_LPTSTB#

LPTAFD#

R36

1

2 33_0402_5%

AFD#/3M#

INIT#

R22

1

2 33_0402_5%

LPTINIT#

S LCTIN#

R35

1

2 33_0402_5%

LPTSLCTIN#

R_LPTSTB# 39
AFD#/3M# 39
LPTINIT# 39
LPTSLCTIN# 39

4

1
2
3
4

8
7
6
5

R614
R615
R616
R617

F D0
F D1
F D2
F D3

R618
R619
R620
R621

F D0
F D1
F D2
F D3

R622
R623
R624
R625

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

LPT@
LPT@
LPT@
LPT@

LPTSLCT_EMI
LPTPE_EMI
LPTBUSY_EMI
LPTACK#_EMI

2
2
2
2

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

LPT@
LPT@
LPT@
LPT@

AFD#/3M#_EMI
LPTERR#_EMI
LPTINIT#_EMI
LPTSLCTIN#_EMI

2
2
2
2

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

LPT@
LPT@
LPT@
LPT@

F D0_EMI
F D1_EMI
F D2_EMI
F D3_EMI

2
2
2
2

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

LPT@
LPT@
LPT@
LPT@

F D7_EMI
F D6_EMI
F D5_EMI
F D4_EMI

LPTSLCT_EMI
LPTPE_EMI
LPTBUSY_EMI
LPTACK#_EMI

1
2
3
4

2.7K_1206_8P4R_5%
RP5
AFD#/3M#_EMI
8
LPTERR#_EMI
7
LPTINIT#_EMI
6
LPTSLCTIN#_EMI
5

1
2
3
4

2.7K_1206_8P4R_5%
RP4
F D0_EMI
8
F D1_EMI
7
F D2_EMI
6
F D3_EMI
5

1
2
3
4

2.7K_1206_8P4R_5%
RP1
F D7_EMI
8
F D6_EMI
7
F D5_EMI
6
F D4_EMI
5

39
39
39

FD0
LPTERR#
FD1

1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13

F D0
LPTERR#
F D1
LPTINIT#
F D2

39

FD2

39

FD3

39

FD4

39

FD5

39

FD6

39

FD7

39

LPTACK#

39

LPTBUSY

39

LPTPE

39

LPTSLCT

LPTSLCTIN#
F D3
F D4
F D5
F D6
F D7
LPTACK#
L PTBUSY
LPTPE
LPTSLCT

3

SUYIN_7313S-25G2T-AA
L34
FBM-11-160808-121T_0603

2.7K_1206_8P4R_5%

1

LPD0
LPD1
LPD2
LPD3

AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#

F D7
F D6
F D5
F D4

RP3

R610
R611
R612
R613

8
7
6
5

2

RP93

1
2
3
4

EMI Request for LPT ISSUE

4

68_1206_8P4R_5%
RP2
LPD7
LPD6
LPD5
LPD4

4
3
2
1

5
6
7
8

F D7
F D6
F D5
F D4

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

68_1206_8P4R_5%

A

B

C

D

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
E

33

of

51

4

3

2

+RTCVCC
+3VALW

0_0402_5%

LRST#

7,19,21,22,24,27,33 PLT_RST#

R548 1

2 @ 0_0402_5%

+3VALW

+3VALW

2

SKU ID1 definition

2

SKU ID definition,
Please see page 3.
R183
100K_0402_5%

SKU_ID_CHECK_1

38
+3VALW

2

2

SKU_ID_CHECK_0

1

0_0402_5%

1

2

C207

R550

0.1U_0402_16V4Z

Rf

@ 0_0402_5%

39
C688
39
39
0.1U_0402_16V4Z
39
2
35
35

In PWR Board
+5VS
RP81
1
2
3
4

B

8
7
6
5

KB_CLK
KB_DATA
PS_CLK
PS_DATA

36,44
36,44
4,30,39
4,30,39

4.7K_0804_8P4R_5%
MODE#
FR D#
SELIO#
FSEL#

10K_0804_8P4R_5%

+5VALW

RP86
1
2
3
4

8
7
6
5

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

4.7K_0804_8P4R_5%
C578
2

+5VS
2
4.7K_0402_5%
2
4.7K_0402_5%

1
100K_0402_5%
KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_DATA

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

16
BKOFF#
45
FSTCHG
19
EC_SMI#
22 MODULE_RST#
29
W L_OFF#
19
EC_SW I#
40
S4_LATCH
40
S4_SATA
38
LID_SW #
38
MODE#
30,38,40,41,47 SYSON
16,26,32,36,37,41,47,48 SUSP#
49
VR_ON
39 EJCTSW#
35 BT_DETACH
19
PBTN_OUT#

RP84
8
7
6
5

KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_DATA

45 DKN_B+_ON
19
EC_SCI#
35
BT_RST#
35 BT_WAKE_UP

+3VALW
1
2
3
4

IE_BTN#
2
R467

1

1

R184

Rd

R549
100K_0402_5%

Re
1

1

Rc

PSCLK1
PSDAT1
PSCLK2
PSDAT2PS2
PSCLK3
PSDAT3

1 TP_CLK
R172
1 TP_DATA
R171

0.1U_0402_16V4Z
1

2
R480

+3VALW

1
47K_0402_5%

35 PADS_LED#
35 CAPS_LED#
35 NUM_LED#
18 PHDD_LED#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

163
164
169
170

SCL1
SDA1
SCL2
SDA2

DKN_B+_ON
EC_SCI#
BT_RST#
BT_WAKE_UP
ENBKL
BKOFF#
FSTCHG
EC_SMI#

LID_SW #
MODE#
SYSON
SUSP#
VR_ON
EJCTSW#
BT_DETACH
PBTN_OUT#
PADS_LED#
CAPS_LED#
NUM_LED#

18
EC_GA20
18 EC_KBRST#

8
20
21
22
27
28
48
62
63
69
70
75
109
118
119
148
149
155
156
162
168
55
54
23
41
19
5
6
31

GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D

Interface

1

159

95

Analog To Digital

Digital To Analog

GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7

99
100
101
102
1
42
47
174

DAC_BRIG
BT_PWR
IR EF
EN_DFAN1#
CD_PLAY
PM_BATLOW#
EC_IDERST
AUD_SUDMUT_P3#

85
86
91
92
93
94
97
98

PW R_LED#
W L_BT_LED#
HDD_LED#
BATT_LOW_LED#
BATT_CHGI_LED#
ODD_LED#
M ID1
M ID0

ON/OFF

KILL_SW#
PM_SLP_S3#
PM_SLP_S5#
IDE_MRESET#
EC_PME#
M ID2

2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
100K_0402_5%

1
R175
1
R174
1
R173
1
R473

5

KBA1

MID2

FAN_SPEED1
DPLL_TP
TEST_TP

Timer PinTOUT2/GPIO2F

175

EC_THERM#

E51IT0/GPIO00
E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

3
4
106
107

XCLKI
XCLKO

158
160

2

1
R178

2

DPCONF_S5P
470_0402_5%

1
R229

2

DPLL_TP
1K_0402_5%

1
R228

2

22

EJCTSW#

TEST_TP
1K_0402_5%

AC IN

ECAGND
2
1
C209 0.01U_0402_16V7K

BATT_TEMPA 44

BATT_AOVP 45
DPCONF_S5P 39
ALI/MH# 44
SKU_ID_CHECK_1 38

1

DAC_BRIG 16
BT_PWR 35
IR EF
45
EN_DFAN1 37
CD_PLAY 22,32

C185

2
100K_0402_5%
2
0.22U_0402_10V4Z

ADP_I

45

B

CRY11 R476
2 CRY2
@ 20M_0603_5%

EC_IDERST 21,30
AUD_SUDMUT_P3# 39

R475

PW R_LED# 38
W L_BT_LED# 38
HDD_LED# 38
BATT_LOW_LED# 38
BATT_CHGI_LED# 38
MODE_LED# 38
MID1
22
MID0
22

0_0402_5%

C576

FAN_SPEED1 37
1394_PHYRST_S3P 39
1394_DILSON_S3P 39
EC_THERM# 19

SHDD_LED#
E51_RXD
1
E51_TXD
R587
CRY2
R474 1
CRY1

19,38,43

EC_RSMRST# 19
SHDD_LED# 22
2
0_0402_5%

EAPD

1

2

1
C575
X1

2

30,32
32.768KHZ_12.5P_1TJS125DJ2A073

2 @ 0_0402_5%

RTC_CLK

RTC_CLK 19

D38
KB910Q B4_LQFP176

A

3
1

CD_PLAY

2
PSOT24C_SOT23

Compal Electronics, Inc.
Title
PROPRIETARY NOTE

4

1

CH751H-40_SC76

KBA4
KBA5

D33
2

1
R169

171
12
11

17
35
46
122
137
167

ENBKL
@ 120K_0402_5%

1
R481

40

KILL_SW# 29,35,37
PM_SLP_S3# 19
PM_SLP_S5# 19
IDE_MRESET# 19

A

+3VALW

0.1U_0402_16V4Z

R479
10K_0402_5%

EC_ON
40
EC_LID_OUT# 19
EC_MUTE 32

BATT_TEMP
SKU_ID_CHECK_0
BATT_AOVP
DPCONF_S5P
ALI/MH#
SKU_ID_CHECK_1
AD_BID0

GPIO2E/TOUT1/FANFB1

FnLock#/GPIO12*
CapLock#/GPIO011*
NumLock#/GPIO0A *
ScrollLock#/GPIO0F *
MISC
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#

EC_ON
EC_LID_OUT#
EC_MUTE

81
82
83
84
87
88
89
90

DPLL_TP/GPIO06/FANFB3
FANTEST_TP/GPIO05/FAN3PWM

2

+3VALW

INVT_PWM 16
BEEP#
30
PW R_SUSP_LED 38
ACOFF
45

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

*GPIO18/XIO8CS#
*GPIO19/XIO9CS#
*GPIO1A/XIOACS#
*GPIO1B/XIOBCS#
Expanded I/O * GPIO1C/XIOCCS#
*GPIO1D/XIODCS#
*GPIO1E/XIOECS#
* GPIO1F/XIOFCS#

33K_0402_5%

C186

C

INVT_PWM
BEEP#
PW R_SUSP_LED
ACOFF

ON/O FF

Wake Up

Rb

EC_PLAYBTN# 35,38
EC_STOPBTN# 35,38
EC_REVBTN# 35,38
EC_FRDBTN# 35,38

2
26
29
30
44
76
172
176

GPWU0
GPWU1
GPWU2
GPWU3
Pin
GPWU4
GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7

SMBus

GPIO

2

110
111
114
115
116
117

Pulse

GPOW0/PWM0
GPOW1/PWM1
FAN2PWM/GPOW2/PWM2
GPOW3/PWM3
Width GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6
FAN1PWM/GPOW7/PWM7

32
33
36
37
38
39
40
43

AD_BID0
1

R168

2

2

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

38

1

R547 1

KSO17

10P_0402_50V8J

17,22,24,29,33 PCI_RST#

KSO17

4

ENBKL

R170
100K_0402_5%

Ra

1

0_0402_5%

+3VALW

IN

2

71
72
73
74
77
78
79
80

Analog Board ID definition,
Please see page 3.

OUT

R478 1

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

NC

8,16 GMCH_ENBKL
C

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

D

@ 96212-1011S

KSO[0..15] 35

NC

29,33 SIO_PME#

GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8
GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

35,38

E51_RXD
E51_TXD

3

EC_PME#

29,33 LAN_PME#

KSI[0..7]

2

1
29,33 WLANPME#

1U_0603_10V4Z

KSO[0..15]

BATGND

RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN

X-BUS Interface

FR D#
FW R#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
IE_BTN#

F RD#
FW R#
FSEL#

C217

1

2

36
36
36

R205
10K_0402_5%

VCC
VCC
VCC
VCC
VCC
VCC
VCC

150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105

+3VALW

2

2

DOCKIN#

2

1

19,24,33 SERIRQ
15,39 DOCKIN#

1

10P_0402_50V8J

14 CLK_PCI_LPC

1

+3VALW

2

LRST#

LAD0
LAD1
LAD2
LAD3
LFRAME# LPC Interface
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C *
LPCPD#/GPIO0B *

ENE-KB910-B4

1 @ 33_0402_5%

15
14
13
10
9
165
18
7
25
24

C218

1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9
10

KSI[0..7]

GND
GND
GND
GND
GND
GND

R482 2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

18,33
LPC_AD0
18,33
LPC_AD1
18,33
LPC_AD2
18,33
LPC_AD3
18,33 LPC_FRAME#

VCCA

U15
C577
@ 22P_0402_50V8J
2
1

16
34
45
123
136
157
166

D

JP27

R199
0_0402_5%

0.1U_0402_16V4Z

Internal Keyboard

ECAGND
1
2
FBM-L11-160808-800LMT_0603

C219

2
2
0.1U_0402_16V4Z

ECAGND

C206
2
2
0.1U_0402_16V4Z

L16

96

ADB[0..7] 36

L29 Change to 0 ohm
1
2
2 FBM-L11-160808-800LMT_0603
1
C241
C231
C557
1000P_0402_50V7K 1000P_0402_50V7K
1
1
2
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1
2

161

0.1U_0402_16V4Z
1
1 C215
1
C238

VCCBAT

ADB[0..7]

2

2

For EC Tools
R469
@ 0_0402_5%
1

KBA[0..19] 36

AGND

KBA[0..19]

1

+3VALW

1

5

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3

2

SCHEMATIC, M/B LA-2492
Document Number

R ev
B

401317
星期一, 一月 03, 2005

Sheet
1

34

of

51

+3VS_MDC

+3V

1

MDC CONN.

+5VS_MDC

1
C253
1U_0805_25V4Z

2

BlueTooth Interface

1
C248
1U_0805_25V4Z

2

2

C593
1U_0805_25V4Z
+5VS

+3VS

2

JP30

Change to 0 ohm
1
L17

+3VS
18,30 ICH_AC_SDOUT
18,30 ICH_AC_RST#

2 +3VS_MDC
CHB1608B121_0603

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

R116
100K_0402_5%

C142
0.1U_0402_16V4Z

1
R488

2
CHB1608B121_0603
2
10K_0402_5%

+5VS

1

1
L32

3

Change to 0 ohm

+3VS

1

+5VS_MDC

Q12
SI2301DS-T1_SOT23
0.1U_0402_16V4Z

IC H _AC_SYNC 18,30

2 0_0402_5%

1
R487

2
C151

1
R486
1
R485

2
22_0402_5%
2
22_0402_5%

1

+3V

MONO_OUT/PC_BEEP
AUDIO_PWRDN/DETECH
GND
MONO_PHONE
AUXA_RIGHT
RESERVED/BT_ON#
AUXA_LEFT
GND
CD_GND
+5Vmain
CD_RIGHT
RESERVED/USB+
CD_LEFT
RESERVED/USBGND
RESERVED/PRIMARY_DN
+3.3Vaux/BT_VCC
RESERVED/+5VD/WAKEUP
GND
RESERVED/GND
+3.3Vmain
AC97_SYNC
AC97_SDATA_OUT
AC97_SDATA_IN1
AC97_RESET#
AC97_SDATA_IN0
GND
GND
AC97_MSTRCLK
AC97_BITCLK

ICH_AC_SDIN1 18

34

BT_PWR

2

+BT_VCC

22K
C141

Q13
ICH_AC_BITCLK 18,30

22K

10U_1206_16V4Z

DTC124EK_SOT23

3

R241
0_0402_5%
1
2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

ACES_88018-3010
+12VALW

TP CONN.

Module ID
Indication for polarity of reset
Reset input High Active --> Low ,
Reset input Low Active --> Open

+5VS

2

+5VS_TP

0.1U_0402_16V4Z

1

C168

1

R605
100K_0402_5%
C Q67

0.1U_0402_16V4Z

2N7002_SOT23

5

S

3

R607
10_0402_5%

MMBT3904_SOT23

ACES_87153-0801-01

29,34,37 KILL_SW#

1

+5VS_TP

+5VS_TP

R608

2
100K_0402_5%

+5VS

34

BT_RST#

8
6
4
2

7
5
3
1

B

2

A

Y

1

1
R226
TP_DATA
TP_CLK

C671
0.1U_0402_16V4Z

U19
BT_RESET#

4

@ TC7SH08FU_SSOP5

@ 0_0603_5%

JP32
TP_DATA
TP_CLK

1

P

R606

Q63

C245
@ 0.1U_0402_16V4Z

G

SUSP

TP_DATA 34

S P_Y
SP_VCC

+3VS

MMBT3904_SOT23

3

41,48

TP_DATA

2
B
E Q68

2

7
5
3
1

3

8
6
4
2

E

C
C690

1

TP_CLK
S P_GROND
SP_X

TP_CLK

2
G
3

34

D

2

JP15

1

1

2
B

2
0_0402_5%

INT_KBD CONN.
JP14

ACES_87153-0801-01

37
34
+3VS

KSI[0..7]

KSI[0..7]

KS O[0..15]

2
R140

34,38

KSO[0..15] 34

38
34

NUM_LED# 34

32

CAPS_LED# 34

33

PADS_LED#

1
300_0402_5%
KSO14

31

KSO11

27

KSO9

25

K SI7

30
28

KSO10

26

KSO8

24

KSO13

22

KSO3

20

KSO12

18

K SI6

16

KSO6

14

K SI3

12

KSO0

10

K SI1

8

KSO2

100P_0402_25V8K

KSO15

C613

100P_0402_25V8K

KSO7

21

KSO6

C626

100P_0402_25V8K

KSO14

C614

100P_0402_25V8K

K SI4

19

KSO5

C627

100P_0402_25V8K

KSO13

C615

100P_0402_25V8K

K SI5

17

KSO4

C628

100P_0402_25V8K

KSO12

C616

100P_0402_25V8K

KSO5

15

KSO3

C629

100P_0402_25V8K

K SI0

C617

100P_0402_25V8K

K SI0

13

K SI4

C630

100P_0402_25V8K

KSO11

C618

100P_0402_25V8K

KSO1

11

KSO2

C631

100P_0402_25V8K

KSO10

C619

100P_0402_25V8K

K SI2

C632

100P_0402_25V8K

K SI1

C620

100P_0402_25V8K

KSO4

KSO0

C633

100P_0402_25V8K

K SI2

C621

100P_0402_25V8K

SP_VCC

5

K SI5

C634

100P_0402_25V8K

KSO9

C622

100P_0402_25V8K

S P_GROND

3

K SI6

C635

100P_0402_25V8K

K SI3

C623

100P_0402_25V8K

BT_RESET#
BT_WAKE_UP

34 BT_WAKE_UP

34 BT_DETACH
19
19

USB20_P5
USB20_N5

USB20_P5
USB20_N5
+BT_VCC

(MAX=200mA)
C140

K SI7

C636

100P_0402_25V8K

PADS_LED# C682

100P_0402_25V8K

(Top Contact)
0.1U_0402_16V4Z

6

R560

BT_DET#

7

1
35

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

Module ID
Module_Detect

9

KSO1

1
300_0402_5%

17,33

23

C625

2

ACES_87153-2008

KSO15

29

KSO7

+3VS

JP13

1

4

300_0402_5%
SP_X

2

S P_Y

2
R559

Bluetooth Connector

+3VS

PVT Reverse for FFC change

36

ACES_88172-3400
KSO8

C624

100P_0402_25V8K

NUM_LED#

C683

100P_0402_25V8K

CAPS_LED# C684

100P_0402_25V8K

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet

35

of

51

+3VALW

+3VALW

2

SB_INT_FLASH_SEL# 19

R192
100K_0402_5%

SUSP#

16,26,32,34,37,41,47,48

5

2
G

U10D
INT_FLASH_SEL

2

I1

1

1

3
S

2

I0

O
G

4

D

P

U14

FWE#

11

O

13

1

0.1U_0402_16V4Z

OE#

1

C214

I

12

SUS_STAT# 19

EC_FLASH# 19
@

SN74LVC125APWLE_TSSOP14

Q23
2N7002_SOT23

3

TC7SH32FU_SSOP5

FW R#

34

+3VALW

2

C644 1

R529
@ 10K_0402_5%

INT_FLASH_EN#

1

2

8

O

10

U10C

2 @ 22_0402_5%

OE#

+5VALW
INT_FSEL# R528 1

R527 1
@ 100K_0402_5%

1
+5VALW

2 @ 0.1U_0402_16V4Z

I

9

FSEL#

34

R164
C187 1

2 0.1U_0402_16V4Z
@ SN74LVC125APWLE_TSSOP14

2

100K_0402_5%

1

2

U11

34,44 EC_SMB_CK1
34,44 EC_SMB_DA1

8
7
6
5

VCC
WP
SCL
SDA

A0
A1
A2
GND

R592

1
2
3
4

0_0402_5%

1

AT24C16N10SC-2.7_SO8

R167

2

100K_0402_5%

34

KBA[0..19]

34

ADB[0..7]

KB A[0..19]
ADB[0 ..7]

1MB ROM Socket
1MB Flash ROM

JP17
+3VALW

U16

34

F RD#

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

INT_FSEL#
F RD#
FWE#

22
24
9

CE#
OE#
WE#

VCC0
VCC1

31
30

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

RP#
NC
READY/BUSY#
NC0
NC1

10
11
12
29
38

GND0
GND1

23
39

1
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
RESET#

2

1
R212

C188
0.1U_0402_16V4Z

2
100K_0402_5%

+3VALW

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

KBA17
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
+3VALW
ADB3
ADB2
ADB1
ADB0
F RD#
FSEL#
KBA0

@ SUYIN_80065AR-040G2T

Compal Electronics, Inc.

SST39VF080-70_TSOP40
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet

36

of

51

Close to Docking

Kill SWITCH

+3V

2

+3V

26

1

2

C148
0.1U_0402_16V4Z
2

R160
100K_0402_5%

1

C143
0.1U_0402_16V4Z

3

2

33
33
33
33
33
33
33
33

KILL_SW# 29,34,35

3

2

1

KILL_SW#

1

28

2

1BS003-1211L_3P

24
1

1

1

DTR#1
RTS#1
TXD1
CTS#1
RI#1
RXD1
DCD#1
DSR#1

16,26,32,34,36,41,47,48 SUSP#

VCC

+3V
D7
DAN217_SOT23

SW1

C153
0.1U_0402_16V4Z

2

3

1

C1+
C1C2+

2
14
13
12
19
18
17
16
15
20

C2TIN1
TIN2
TIN3
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUTB2

23

FORCEON

22

U7

V+

27

V-

3

TOUT1
TOUT2
TOUT3
RIN1
RIN2
RIN3
RIN4
RIN5

2

1

2

1

C154

0.1U_0402_16V4Z

C146
DTR#
RTS#
TXD
CTS#
R I#
RXD
D CD#
DS R#

9
10
11
4
5
6
7
8

INVLD#

21

GND

25

0.1U_0402_16V4Z

DTR#
RTS#
TXD
CTS#
R I#
RXD
D C D#
DSR#

38,39
38,39
38,39
38,39
38,39
38,39
38,39
38,39

FORCEOFF#
MAX3243CAI_SSOP28

FAN Conn

No Docking and Serial Port -----> Del
+5VS

+12VALW

E N_FAN1

-IN
4

R435
10K_0402_5%

U37A
LM358A_SO8

1

2

R441
100_0402_5%

2
B

1
R440

E

2

1

Q46
FMMT619_SOT23

C523
@ 0.1U_0402_16V4Z

1
D3
1SS355_SOD323

C108
10U_1206_16V4Z

FA N1

2
8.2K_0402_5%

3
2
1
ACES_85205-0300
33

+3VS

R88

1

L: R POP; FIR Enable
H: R De-POPFIR Disable

FIR Module

JP12
D26
1N4148_SOT23

FIR_DET#

FIR_DET#

R220 1

2 1K_0402_5%

2 10K_0402_5%

34 FAN_SPEED1

2
C107
@ 1000P_0402_50V7K

1

1

+IR_ANODE

+3VS

2

(60mil)

C106
@ 1000P_0402_50V7K

R366
1

+3VS

@ 4.7_1206_5%
2

1
C385
22U_1206_16V4Z_V1

2

1

1
C396
@ 10U_0805_10V4Z

2

33
+IR_3VS
(30mil)

1
C401
10U_1206_16V4Z

1
R365

2

(60mil)

IR 1

IRRX

2
4
6
8

IRRX

1

2

2
4.7_1206_5%

2

R368
0_1206_5%

1

OUT

2

C

+IN

2

2

3

3

1

1

EN_ DFAN1

2

2

G

34 EN_DFAN1

1

P

1

8

1
2
C522
0.1U_0402_16V4Z

IRED_C
RXD
VCC
GND

IRED_A
TXD
SD/MODE
MODE
GND

1
3
5
7
9

IRTXOUT
IR MODE

IRTXOUT
IRMODE

33
33

HSDL-3603-007_9P
C402
0.1U_0402_16V4Z

SD/MODE: SHUTDOWN MODE, HIGH ACTIVE
MODE: HIGH/LOW SPEED SELECT

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet

37

of

51

5

4

Power / LED Board Conn.
JP4

JP3

USB20_N7
USB20_P7
DTR#
RTS#
TXD
CTS#
R I#
RXD
D CD#
DS R#
SYSON#

+5VALW
33 SERIAL_DET#

1 C693

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
1 C692

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16

LAN _ACTIVITY#
L AN_LINK#

15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

RJ4 5_GND
RJ45_MDI3+
RJ45_MDI3RJ4 5_GND
RJ45_MDI2+
RJ45_MDI2RJ4 5_GND
RJ45_MDI1+
RJ45_MDI1RJ4 5_GND
RJ45_MDI0+
RJ45_MDI0-

1

34 SKU_ID_CHECK_1
34 KSO17
40 ON/OFFBTN#

LAN_ACTIVITY# 27,39
LAN_LINK# 27,39

ON /OFFBTN#
PW R_LED_1#
PW R_SUSPLED#
IEBTN#
MODEBTN#
EC_REVBTN#
E C_FRDBTN#
EC_PLAYBTN#
EC_STOPBTN#

RJ45_GND 28,39
RJ45_MDI3+ 28,39
RJ45_MDI3- 28,39
34,35 EC_REVBTN#
34,35 EC_FRDBTN#
34,35 EC_PLAYBTN#
34,35 EC_STOPBTN#

RJ45_MDI2+ 28,39
RJ45_MDI2- 28,39
RJ45_MDI1+ 28,39
RJ45_MDI1- 28,39

1
2
3
4
5
6
7
8
9
10
11
12

1
2
3
4
5
6
7
8
9
10
11
12

13
14
15
16
17
18
19
20
21
22
23
24

2 220P_0402_50V7K

C677 1

2 220P_0402_50V7K

C679 1

2 220P_0402_50V7K

C681 1

C672 1

2 220P_0402_50V7K

C674 1

2 220P_0402_50V7K

C676 1

2 220P_0402_50V7K

C678 1

2 220P_0402_50V7K

C680 1

2 220P_0402_50V7K

D

2 220P_0402_50V7K

ACES_87216-3002

POWER/ON LED

D17
PW R_LED_0#

2

1
HT-191NB_BLUE_0603

2
MODEBTN#

1
3

51ON#

2
G
1

3
S

PW R_SUSP_LED

40,43

D35
PW R_SUSPLED_1#

2

1

+3VALW

Q52
DTA114YKA_SC59

+5VALW

AC IN LED

2
R609 1

2 300_0402_5%

PW R_SUSPLED#

2 300_0402_5%

R531
100K_0402_5%

PW R_SUSPLED_1#

2
2
120_0402_5%

HT-191NB_BLUE_0603

IE_BTN#

1
3

34
+5VALW

JP16

SYSON#
USB_OC#0
USB_OC#2
USB_OC#4

SYSON#

NBA_PLUG
VOL_AMP

30,32 NBA_PLUG
32 VOL_AMP

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

S

2N7002_SOT23
Q40

D16

1
R374

+5VALW

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

D

2
G

A C IN

51ON#

D30
DAN202U_SC70

USB Board Conn.

1

19,34,43

2
IEBTN#

C

D18

1
R364

1

R530 1

POWER/SUSP LED

HT-191UD_AMBER_0603

PW R_SUSP_LED 34

Q66
2N7002_SOT23

1

34

51ON#

D31
DAN202U_SC70

D

2

10K

MODE#

1

3

S Y SON
47K

B

2 220P_0402_50V7K

C675 1

ACES_85203-1202

+3VALW

41
19
19
19

C673 1

RJ45_MDI0+ 28,39
RJ45_MDI0- 28,39

680P_0402_50V7K
2
2
680P_0402_50V7K

C

SKU _ID_CHECK_1
KSO17
ON /OFFBTN#
PW R_LED_1#
PW R_SUSPLED#
IEBTN#
MODEBTN#
EC_REVBTN#
E C_FRDBTN#
EC_PLAYBTN#
EC_STOPBTN#

13
14
15
16
17
18
19
20
21
22
23
24

3

D

2

RJ45 / Serial Board Conn.

+3VALW

19 USB20_N7
19 USB20_P7
37,39
DTR#
37,39
RTS#
37,39
TXD
37,39
CTS#
37,39
R I#
37,39
RXD
37,39
D C D#
37,39
DSR#

3

1
R561

USB20_N0 19
USB20_P0 19

2
2
120_0402_5%
2
3
120_0402_5%

1

BATT_LOWLED#

4

BATT_CHGILED#

BATTERY CHG

HT-297UD/NB_BLUE/AMB_0603
USB20_N2 19
USB20_P2 19

100K_0402_5% 1

HDD LED
D20

LID_SW #

2
1
3

RTCVREF
+5VCD

+3VALW
+5VS

USB20_N4 19
USB20_P4 19
L ID

2 R185

1

LID_SW # 34

R375

2
2
120_0402_5%

1

HDD_LED# 34

HT-191NB_BLUE_0603

S4_LID_SW# 40

D8
DAN202U_SC70

B

MODE LED

+5VS
D19

1
R376

ACES_87216-3002

2
2
120_0402_5%

1

MODE_LED# 34

HT-191NB_BLUE_0603

WL LED

+3VALW
D15
+5VS

1
R370

BATTERY CHGI/LOW LED
2
G

3

34

30,34,40,41,47
+5VS
D34

1
1

R471

3 PW R_LED#
S

10K

2

D

200_0402_5%

PW R_LED# 34

R293

2
2
120_0402_5%

5IN1 LED
2
G

24,25 5IN1_LED

Q57
DTA114YKA_SC59

D
2N7002_SOT23
Q55

3

1

1
HT-110UD_1204

Q65
2N7002_SOT23

1 2

1 2

S YSON

1

1

47K

R163

WL_BT_LED#

1

BATT_LOWLED#

200_0402_5%

1
HT-110UD_1204

S Y SON
BATT_CHGILED#

2
2
300_0402_5%

S

A

A

100K

100K

100K

3

DTC115EKA_SOT23
Q20

100K

3

BATT_CHGI_LED# 2

34 BATT_CHGI_LED#

2

BATT_LOW_LED#

DTC115EKA_SOT23
Q51

BATT_LOW_LED#

34

R532 1

2 300_0402_5%

PW R_LED_0#

R533 1

2 300_0402_5%

PW R_LED_1#

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

Document Number

D ate:

¬P 期一, 一月 03, 2005

R ev
B

401317
Sheet
1

38

of

51

A

B

C

D

+3VALW

E

+3VALW

1

+3VALW

2

1 10K_0402_5%

DCOCT1#

2

I0

R17

1

2 10K_0402_5%

DCOCT2#

1

I1

DKN_B+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

DCOCT1#
+5VS
34
34

PS_CLK
KB_CLK

PS_CLK
KB_CLK

1394_PHYRST_S3P
D PCONF_S5P

34 1394_PHYRST_S3P
34 DPCONF_S5P

CRT_CRTSC-P3P
CRT_CRE D-PYP
CRT_C GREEN-PYP
CRT _CBLUE-PYP
CRT_C VSYNC-P5P
DV I_SCLK

15 D_DDC_CLK
15 D_CRT_R
15 D_CRT_G
15 D_CRT_B
15 D_CRT_VSYNC
16
DVI_SCLK

2

16
16
16
16
16
16

DVI_TXD2+
DVI_TXD2DVI_TXD1+
DVI_TXD1DVI_TXD0+
DVI_TXD0-

16
16
16

DVI_TXC+
DVI_TXCDVI_DET

DVI_TXD2+
DVI_TXD2DVI_TXD1+
DVI_TXD1DVI_TXD0+
DVI_TXD0DVI_TXC+
DVI_TXCD VI_DET

3

RJ45_MDI3+
RJ45_MDI3-

28,38 RJ45_MDI3+
28,38 RJ45_MDI3-

MDC1 _RING
MDC2_TIP

55
56

GND
GND
VCC
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
S44
S45
S46
S47
S48
S49
S50
S51
S52
S55
S56

59
60

M59
M60

253

GND

247
248

249
250

VCC

242

+DC_IN_S1

243

S61
S62
S63
S64
S65
S66
S67
S68
S69
S70
S71
S72
S73
S74
S75
S76
S77
S78
S79
S80
S81
S82
S83
S84
S85
S86
S87
S88
S89
S90
S91
S92
S93
S94
S95
S96
S97
S98
S99
S100
S101
S102
S103
S104
S105
S106
S107
S108
S109
S110
S111
S112

61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112

DKN_B+

121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173

S115

115

RJ45_MDI2-

S117

117

RJ45_MDI2+

DKN_B+
EJCTSW#

+5VS

PS_DATA
KB_DATA

PS_DATA 34
KB_DATA 34

1394_DILSON_S3P

for VGA GND

24

TPB1+

TPA1+
TPB1+

AUD_SUDMUT_P3#

34 AUD_SUDMUT_P3#

D_CRT_HSYNC 15
DVI_SDATA 16

31
31
31

DVI_TXD5+
DVI_TXD5DVI_TXD4+
DVI_TXD4DVI_TXD3+
DVI_TXD3-

LINEOL
LINEIL
LINEIR#

LINEOL
LINEIL
L INEIR#

DO CK_ON/OFFBTN#
D CD#
DS R#
TXD
R I#
LPTPE
F D7
F D6

40 DOCK_ON/OFFBTN#
37,38
D CD#
37,38
DSR#
37,38
TXD
37,38
R I#
33
LPTPE
33
F D7
33
F D6
33
33
33
33
33

F D4
F D1
F D2
F D0
R_LPTSTB#

F D4
F D1
F D2
F D0
R_LPTSTB#

+3VALW

RJ45_MDI2- 28,38
RJ45_MDI2+ 28,38

RJ4 5_GND
RJ45_MDI0+
RJ45_MDI0-

28,38 RJ45_GND
28,38 RJ45_MDI0+
28,38 RJ45_MDI0-

MODEM

+5VALW

+3VALW

D

2

1

3

1

VCC

S121
S122
S123
S124
S125
S126
S127
S128
S129
S130
S131
S132
S133
S134
S135
S136
S137
S138
S139
S140
S141
S142
S143
S144
S145
S146
S147
S148
S149
S150
S151
S152
S153
S154
S155
S156
S157
S158
S159
S160
S161
S162
S163
S164
S165
S166
S167
S168
S169
S170
S171
S172
S173

S181
S182
S183
S184
S185
S186
S187
S188
S189
S190
S191
S192
S193
S194
S195
S196
S197
S198
S199
S200
S201
S202
S203
S204
S205
S206
S207
S208
S209
S210
S211
S212
S213
S214
S215
S216
S217
S218
S219
S220
S221
S222
S223
S224
S225
S226
S227
S228
S229
S230
S231
S232
S233
S234
S235
S236

181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236

LAN _ACTIVITY#
L AN_LINK#
DCOCT2#

L239
L240

239
240

RJ45_MDI1+
RJ45_MDI1-

GND

254

175

S175

178
179
180

L178
L179
L180

1

DNK_B+
D_EC_SMB_DA2
+5VS
TPA1-

TPA1-

TPB1USBDP1-S3P
USBDP1-S3N

24

TPB124
USB20_P6 19
USB20_N6 19

LINE OR
LIN EOR#
L INEOL#
LINE IL#
L I NEIR
RXD
RTS#
CTS#
DTR#
LPTSLCT
L PTBUSY
LPTACK#
F D5
F D3
LPTSLCTIN#
LPTINIT#
LPTERR#
AFD#/3M#

LINEOR
LINEOR#
LINEOL#
LINEIL#
L INEIR

31
31
31
31
31

RXD
RTS#
CTS#
DTR#
LPTSLCT
LPTBUSY
LPTACK#
FD5

37,38
37,38
37,38
37,38
33
33
33
33

2

FD3
33
LPTSLCTIN# 33
LPTINIT# 33
LPTERR# 33
AFD#/3M# 33

3

LAN_ACTIVITY# 27,38
LAN_LINK# 27,38

LAN
RJ45_MDI1+ 28,38
RJ45_MDI1- 28,38

D

2

G

1
R14

1

4.7K_0402_5%

+5VALW

D_EC_SMB_CK2

Q5
2N7002_SOT23

3

2

R16

S

4,30,34 EC_SMB_CK2

S

D

4,30,34 EC_SMB_DA2

VCC

244

1394_DILSON_S3P

G

JP2

ACES_85205-0400

251
252

2
G
1

3 Q3
2N7002_SOT23

MDC to Docking Conn.
1
2
3
4

GND
GND

GND
GND

TYCO_1674036

1

1
2
3
4

+5VS
+5VALW
TPA1+

D_DDC_DATA 15

Pin 73, 74 and 75

DVI_TXD5+
DVI_TXD5DVI_TXD4+
DVI_TXD4DVI_TXD3+
DVI_TXD3-

24

1394_DILSON_S3P 34

CRT_CRTSD-P3P

CRT_CHS YNC-P5P
DVI_SDATA

D_EC_SMB_CK2

EJCTSW# 34

R15
100K_0402_5%

MDC1 _RING
MDC2_TIP

JP23B

GND
GND

TYCO_1674036

4

DOCKIN# 15,34

TC7SH32FU_SSOP5

S

+DC_IN_S1

241

DOCKIN#

4

2

245
246

1

3

JP23A

O

2

R13

R574
D @ 100K_0402_5%

G

Docking Conn.

1 0.1U_0402_16V4Z

2

U2

P

5

C11

2
4.7K_0402_5%

+5VALW

4

D_EC_SMB_DA2

Q4
2N7002_SOT23

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
E

39

of

51

A

B

TOP Side

D

+3VALW

2

1
JOPEN

2

1
JOPEN

E

RTC Battery

Power Button
2

J2

C

100K_0402_5%
D29

38 ON/OFFBTN#

1
51ON#

3
RTCVREF

1

+RTCBATT

+RTCBATT
1

2
ON /OFFBTN#

+

BATT1

2

1

1

-

R468

O N/OFF

34

51ON#

38,43

RTCBATT

1

J3

Button Side

D28

DAN202U_SC70
BAS40-04_SOT23

2

2

2

3

+RTCVCC

R593

R594

1

2 1

2

G

3

1
D

Q61

S

39 DOCK_ON/OFFBTN#

+CHGRTC

1

D@ 100K_0402_5% D@ 100K_0402_5%

C558
0.1U_0402_16V4Z

D @ 2N7002_SOT23

2
1

0_0402_5%

2

1

+3VALW

D27
2

C556
1000P_0402_50V7K

2

2

RLZ20A_LL34

1

C301
1

0.1U_0402_16V4Z
2

ON /OFFBTN#

1N4148_SOT23

4

1
2
R272
10K_0402_5%

U28

1
2
3
4
5
6
7

Power ON Circuit
S4_LATCH

2

1

14

14

U25E
SN74LVC14APWLE_TSSOP14

2

11

I
G

O 8
+3V POWER

O 10
+3V POWER

SYS_PW ROK 19
34

@ 1U_0805_16V7K

VCC
CD2#
D2
CP2
SD2#
Q2
Q2#

14
13
12
11
10
09
08

1

RTCVREF
C323
1

0.1U_0402_16V4Z
2

74LCX74MTC_TSSOP14

D14
D_SET_S4

1

D

S

Q27
2N7002_SOT23

2
G

RB751V_SOD323

R271

1

1
2
R285
10K_0402_5%
2

S4_SATA

7

G
7

P

P

2
2

I

1
2
R317
1
10K_0402_5%
C319

1

U25D
SN74LVC14APWLE_TSSOP14

+3VALW

9

C289
1U_0805_25V4Z

RTCVREF
R569
10K_0402_5%

CD1#
D1
CP1
SD1#
Q1
Q1#
GND

1

34

3

2
1U_0805_16V7K

3

RTCVREF

1
C324

S

2
G
Q26
2N7002_SOT23

1
2
R325
10K_0402_5%

D

3

3

S

3

+3V

Q24
2N7002_SOT23

2
G

U23
NC7SZ14M5X_SOT23-5

30,34,38,41,47 S YSON

R269
180K_0402_5%

1

5
Y

Q25
2N7002_SOT23

2
G

38 S4_LID_SW#

A

D

3

2N7002_SOT23 S

+3V

S

P
1

2
G

2

2
1U_0805_16V7K

G

1
C304

+3VS

D

3

680K_0402_5%

2

2

100K_0402_5%

D13

3

Q50

R281

3

Q49
DTC124EK_SC59

100K_0402_5%

R278

2

1
2 2
R463
33K_0402_5%

D

RTCVREF

1

1

1
R270

1

E C_ON

EC_ON

1

34

RTCVREF

1

2

RTCVREF RTCVREF
R466
4.7K_0402_5%

2

1
R595

100K_0402_5%

4

4

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
E

40

of

51

B

C

+3VALW TO +3V

D

+3V

+5VALW TO +5VS

R161
@ 470_0402_5%

1U_0805_25V4Z

U12

1
2
3
4

SYSON_ALW

SI4800DY_SO8

C180

R159

0.1U_0402_16V4Z

@ 1M_0402_5%

2

+12VALW

1
2

C403

D

D

2 SYSON#
G
Q18
@ 2N7002_SOT23

1U_0805_25V4Z

C380
4.7U_0805_10V4Z

S

D

2 SUSP
G
Q45
@ 2N7002_SOT23

S

1

5VS_GATE

C189

1

10U_1206_16V4Z

2 SYSON#
G
Q19
2N7002_SOT23

S

3

2

2

2

1

R157
100K_0402_5%
1
2

4.7U_0805_10V4Z

+3VS

+5VS

2

S
S
S
G

1

C404

2

D
D
D
D

2

1

8
7
6
5

1

SI4800DY_SO8

1

R431
@ 470_0402_5%

1

1

1
2
3
4

1

2

S
S
S
G

1

10U_1206_16V4Z

D
D
D
D

3

2

+3VALW

8
7
6
5

C190

1

+5VS
U32

C196

3

+5VALW

1

+25VS_18VS

2

+3V

1

E

2

A

+1.5VALW TO +1.5VS
+1.5VALW

R340
@ 470_0402_5%

+1.5VS

R341
@ 470_0402_5%

1

+3VS

2

1

+3VALW
U40

8
7
6
5

D
D
D
D

S
S
S
G

2

1
2
3
4

1

C596
10U_1206_16V4Z

2

2

1

SI4800DY_SO8

2

1

C211
4.7U_0805_10V4Z

2

1

1

1
2
3
4

1

S
S
S
G

D

C208
1U_0805_25V4Z

S

C191
4.7U_0805_10V4Z

D

2 SUSP
G
Q37
@ 2N7002_SOT23

2 SUSP
G
Q38
@ 2N7002_SOT23

S

3

+3VALW TO +3VS

D
D
D
D

3

8
7
6
5

1

U13

2

C592
5VS_GATE

1U_0805_25V4Z
R490
100K_0402_5%
1
2

5VS_GATE

+12VALW

+1.5VS

2

C594

R484

0.1U_0402_16V4Z

@ 1M_0402_5%

D

+DDRVCC
SUSP
2
G
Q53
2N7002_SOT23

S

+2.5V TO +2.5VS (DDR1)

+25VS_18VS
R80

1

R81

1

0_0805_5%

+2.5VS

2 @ 0_0805_5%

+1.8VS

2

U6

8
7
6
5

D
D
D
D

1
2
3
4

S
S
S
G

1

C61

1

R489
@ 470_0402_5%

1

1

+1.8V TO +1.8VS (DDR2)

1

10U_1206_16V4Z

3

2

2

C598

2

1

1

1

SI4800DY_SO8

D

C72

SI4800DY_SO8

2
+3VALW

2

4.7U_0805_10V4Z

2

1U_0805_25V4Z

S

3

1

2 SUSP
G
Q54
@ 2N7002_SOT23

C90
4.7U_0805_10V4Z

+3VALW

+3V
5VS_GATE

3

1

2

3

C642
U42B
47

+5VS

+3VALW POWER
SN74LVC14APWLE_TSSOP14

R338
10K_0402_5%

C687
10U_0805_6.3V6M

1

+5VALW

1

2

2

35,48

SUSP

SUSP

38

SYSON#

SYSON#

1

1

R339
10K_0402_5%

14

In CUP side

2
DTC115EKA_SOT23
Q35

100K

S Y SON

30,34,38,40,47 S YSON

2

DTC115EKA_SOT23
Q34

100K

100K

100K

U42D

P

O
+3VALW POWER
SN74LVC14APWLE_TSSOP14

G

I

7

@ 0.1U_0402_16V4Z

2

6

9

I

O
G

2

5
C646

U42C

P

0_0402_5%

7

14

R554

4

16,26,32,34,36,37,47,48 SUSP#

C686
10U_0805_6.3V6M

3

+3VALW

1

+3VALW

3

+3VALW POWER
+3VS

1

+3VALW POWER
SN74LVC14APWLE_TSSOP14

V_ON

2

+5VALW

4

O

2

I

1

14

3

7

7

2

1

O

G

I
G

2

C645

0.1U_0402_16V4Z

P

2

1

@ 0.1U_0402_16V4Z

1

U42A

P

14

R553
0_0402_5%

8

VS_ON

47,48

4

+3VALW POWER
SN74LVC14APWLE_TSSOP14

1

Compal Electronics, Inc.
Title
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D ate:

A

B

C

D

SCHEMATIC, M/B LA-2492
Document Number

R ev
B

401317
¬P 期一, 一月 03, 2005

Sheet
E

41

of

51

5

4

C F9
C F4
SMD40M80 SMD40M80

CF10
SMD40M80

3

2

1

CF14
SMD40M80

+3V

14
+

11

1

1

1

1

1

1

12

U26D
LMV824MTX_TSSOP14

D

SN74LVC14APWLE_TSSOP14

4

P

14

+VDDA
U42F

H4
SCREW 8.5X2.8

-

12

+

11

H3
SCREW 8.5X2.8

13

V+

12

SN74LVC14APWLE_TSSOP14

V-

O
G

I
7

H2
SCREW 8.5X2.8

O

+3VALW

13

H1
SCREW 8.5X2.8

14

F D2
F IDUCAL

1

F D1
F IDUCAL

1

F D4
F IDUCAL

1

F D5
F IDUCAL

1

1

1

F D3
F IDUCAL

O

I
G

12

13

7

-

V+

13

D

F D6
F IDUCAL

U25F

P

C F1
CF15
CF16
SMD40M80 SMD40M80 SMD40M80

V-

CF11
C F7
C F2
SMD40M80 SMD40M80 SMD40M80

4

1

1

1

1

+VDDA

H5
SCREW 8.5X2.8

+12VALW

O

14

U31D
LMV824MTX_TSSOP14

U37B
5 +IN

OUT

6

7

-IN

1

1

1

1

1

LM358A_SO8
+3VALW
+VDDA

H10
SCREW 8.5X2.8

11

I

O

4

C

-

12

+

10

SN74LVC14APWLE_TSSOP14

O

14

1

U30D
LMV824MTX_TSSOP14

H15
SCREW 8.5X2.8

1

1

1
H14
SCREW 8.5X2.8

1

1

H13
SCREW 8.5X2.8

1

1

1

H12
SCREW 8.5X2.8

1

H11
SCREW 8.5X2.8

13

V+

H9
SCREW 8.5X2.8

11

H8
SCREW 8.5X2.8

G

H7
SCREW 8.5X2.8

7

H6
SCREW 8.5X2.8

V-

U42E

P

14

C

B

B

1

H22
EMI2_7X2

1

H21
SCREW 8.5X2.8

M1
SCREW 8.5X2.8

M2
SCREW 8.5X2.8

H20
SCREW 8.5X2.8

1

H19
SCREW 8.5X2.8

1

1

H18
SCREW 8.5X2.8

H23
EMI2_7X2

1

1

H17
SCREW 8.5X2.8

1

H16
SCREW 8.5X2.8

M3
SCREW 8.5X2.8

M4
SCREW 8.5X2.8

1

1

1

A

1

A

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

SCHEMATIC, M/B LA-2492
Size

Document Number

D ate:

¬P 期一, 一月 03, 2005

R ev
B

401317
Sheet
1

42

of

51

A

B

+DC_IN_S1
PL1
FBM-L18-453215-900LMA90T_1812
DC_IN_S2 1
DC_IN_S1
2

C

D

V IN
PF1

1

2

PJP1

PC2
100P_0402_50V8J

1

PC1
1000P_0402_50V7K

PC4
100P_0402_50V8J

PC3
1000P_0402_50V7K

1

2

4

1

3

4

2

3

1

2

2

2

12A_65VDC_451012

1

1

2

1

1

JST_S4B-EH
VS
V IN

1

2
1M_0402_1%

1

1
PR1
PR3

2

VS

V IN

61.9K_0402_1%

PR2
5.6K_0402_5%

1
PR12

51ON#

2

PC8
0.1U_0603_25V7K

1 PR29

1
1N4148_SOD80

B+

2

1K_1206_5%

3

OUT

IN

2
PR34
499K_0402_1%

1

2

PC10
10U_0805_10V4Z

1

PC9
1U_0805_25V4Z

2

GND

PR67

1

VL

PR60

2

1

10K_0402_5%

2

2.2M_0402_5%

3

+1.8VS

(1A,40mils ,Via NO.= 2)

+1.5VALWP

2

1

1

2

1

1

+DDRVTT

JUMP_43X118

PQ16

2
G

1

2

47K_0402_5%

14.3V/13.18V for adapter

PQ17

2

2

2

1

1

4

+2.5VS

JUMP_43X118

(2A,80mils ,Via NO.= 4)

PJ10

2

2

1

1

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .

+1.05VS

JUMP_43X118

(3.5A,140mils ,Via NO.= 7)

A

+5VALWP

DTC115EUA_SC70

+2.5VSP

(8A,320mils ,Via NO.= 16)

+1.05VSP

P ACIN

Precharge detector

PJ9

JUMP_43X118

2

P
2

2

+DDRVCC

JUMP_43X118
PJ8
2 2
1 1

4

1000P_0402_50V7K

2N7002_SOT23

2

(2A,80mils ,Via NO.= 4)
1

1

PR69

D

PJ6

PJ7

2

LM393M_SO8

+1.5VALW

PR68
237K_0402_1%

S

+DDRVTTP

(120mA,40mils ,Via NO.= 2)
2

1

1

PR64
PC3766.5K_0402_1%
1000P_0402_50V7K

+12VALW

JUMP_43X39

+DDRVCCP

2

(3.5A,140mils ,Via NO.= 7)

PJ5

2

2

VL

JUMP_43X118

(5A,200mils ,Via NO.= 10)
+12VALWP

PJ4

+5VALW

PC39

2

34K_0402_1%

1

1

1

6

3

2

JUMP_43X118

-

1

2

3
RB715F_SOT323

PJ3
+5VALWP

ACON

3

(5A,200mils ,Via NO.= 10)

45

PC17
1000P_0402_50V7K

499K_0402_1%

1

1

1

1

2

JUMP_43X79

1

2

+1.8VSP

1 PR63

2

+3VALW

PR57

5

2

1

1

+

O
G

2

JUMP_43X118

7

1

4

2

PU1B

2

1

+3VALWP

18,44,46 MAINPWON

PJ2

2

PD24
PJ1

8

1

3

1

2

1

200_0603_5%

2

1

1

3.3V

PR14

200_0603_5%

2

1K_1206_5%

1 PR32

2

1

2
2

PD3

2

PU2
S-812C33AUA-C2N-T2_SOT89
PR13

High 14.57 14.01 13.46
Low 14.06 13.51 12.98

1K_1206_5%

2
22K_0402_5%

RTCVREF

1

3.3V

PR28

1

VIN

+CHGRTC

Vin Detector

RTCVREF

2

2
38,40

45,46

P

8

2
PC7
0.22U_1206_25V7M

2

2

1

10K_0402_5%

1

2

1

PR11
100K_0402_5%

P ACIN

PR7
10K_0402_5%

PR9

1
PQ1
TP0610T_SOT23

1

3

19,34,38

RLZ4.3B_LL34

2
1
2
PR10
200_0603_5%

PD4

LM393M_SO8

PC6
0.1U_0402_16V7K

2

33_1206_5%
CH GRTCP

2

A C IN

2

2

20K_0402_1%

P ACIN

1

O
-

4

PR6

PC5
1000P_0402_50V7K

VS

+

1

1

1

1
1
PR8

1538VCC

3
2
15.4K_0402_1%
2

1
PR5

1N4148_SOD80

1

1N4148_SOD80

1
2
PR4
1K_0402_5%

PU1A

G

PD2

1

2

2

BATT_A

2

PD1

B

C

Compal Electronics, Inc.
SCHEMATIC, M/B LA-2492
Document Number

R ev
B

401317
¬P 期一, 一月 03, 2005

Sheet
D

43

of

51

A

B

C

D

PH1 under CPU botten side :
CPU thermal protection at 84 degree C
Recovery at 45 degree C
1

1

2

2

PR20
1
2
16.9K_0402_1%
TM_REF1

3

+

2

-

MAINPW ON 18,43,46

1

PQ2
DTC115EUA_SC70

PU3A

1

O

ALI/MH# 34

PD5

2

1

2

1SS355_SOD323
LM393M_SO8

3

4

2
PR22
100_0402_5%

47K_0402_1%

1

2
10KB_0603_1%_TH11-3H103FT

8

1
PC13
0.01U_0402_25V7Z

PC11
0.1U_0603_25V7K
PR18
1
2
47K_0402_1%

1

PR21
100_0402_5%

PR15

PH1

2

PC12
1000P_0402_50V7K

VL

BATT_A

1

+3VALWP

2

PR17 2
1
47K_0402_5%
PR19
1K_0402_5%

TYCO_1747602-1_7P

VS

P

1
1K_0402_5%
1 PR16
2

1

2
3
4
5
6
7

ALI/N IMH#
A B/I
TS_A
EC_SMDA
EC_SMCA

2

BATT_A_S1

1

ID
B/I
TS
SMD
SMC
GND

1

VL

2

BATT+

VMB_A
PL2
FBM-L18-453215-900LMA90T_1812
1
2

12A_65VDC_451012
2

G

PF2

1

PJP2

+3VALWP

PC14

6.49K_0402_1%

1

1

PR24
3.32K_0402_1%

0.22U_0805_16V7K_V2

PR25
2
1
100K_0402_1%

1

2

PR26

1

2

1

1

PR23

VL

PC15
1000P_0402_50V7K

1

2

2

2

1K_0402_5%

2

2

BATT_TEMPA 34

PR27
100K_0402_1%

2

EC_SMB_DA1 34,36
EC_SMB_CK1 34,36

PH2 near main Battery CONN :
BAT. thermal protection at 79 degree C
Recovery at 45 degree C

2

VL

1

VL

PH2

3

PR30
47K_0402_1%

3

PR35

6

-

PU3B
PD6

P

+

7

G

O

2

1
1SS355_SOD323

LM393M_SO8

3.48K_0402_1%

2

2

0.22U_0805_16V7K_V2

5

4

PC18

1

1

TM_REF1

8

2

PR31
1
2
47K_0402_1%
PR33
14.7K_0402_1%
1
2

1

10KB_0603_1%_TH11-3H103FT

4

4

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
A

B

C

Compal Electronics, Inc.
SCHEMATIC, M/B LA-2492
Document Number

R ev
B

401317
¬P 期一, 一月 03, 2005

Sheet
D

44

of

51

A

B

P3

B+
PQ3
AO4407_SO8

0.015_2512_1%

2

1

1

B++

JUMP_43X118

PC19
4.7U_1206_25V6K

PC20
4.7U_1206_25V6K

8
7
6
5

PC21
4.7U_1206_25V6K

4

4

1
2
3

4

2

1

1

2

2

8
7
6
5

1

1
2
3

PJ11

2

1
2
3

PR36

2

PQ5
AO4407_SO8

1

PQ4
AO4407_SO8

8
7
6
5

D

Iadp=0~4.7A

P2

V IN

C

1

1

1

IR E F
PQ11
S SN7002N_SOT23

PR53

PC32

ACON

6

VREF

7

FB1

8
9

0.1U_0402_16V7K

19

VCC

18

-INE1

RT

17

+INE1

-INE3

16

FB3

15

11

OUTD

CTL

14

12

-INC1

+INC1

13

IREF=1.31*Icharge
IREF=0.6V~3.21V

22

1

1
2

1
PD9

PQ9

VH

OUTC1

1

2
3
2
1
0.1U_0603_25V7K

OUT

LXCHRG

1
2
PC27
0.1U_0603_25V7K

1
PR47
68K_0402_5%

1
2
PC30
0.1U_0603_25V7K
2

2

ACOFF

34

1SS355_SOD323

DTC115EUA_SC70

CC=0.5~3.3A
CV=12.6V(9 CELLS LI-ION)
PL4
1
2
10UH_D104C-919AS-100M_4.5A_20%

PR52
PC31
1
2
1
2
47K_0402_5%
1500P_0402_50V7K
AC ON

2

PR50

1

2

BATT_A

0.02_2512_1%
4.7U_1206_25V6K
PD11

2

100K_0402_1%

2

43

20

10
1
10K_0402_5%

2
PR51

1

3

143K_0402_1%
1
2
PR48

D

34

1

1

1SS355_SOD323

2
G

FB2

EC31QS04

PD12

PC33

EC31QS04

MB3887_SSOP24

1

PC29
PR46
1
2 1
2
1K_0402_5%
1000P_0402_50V7K

2

PC28
0.1U_0402_16V7K

2

P ACIN 1
2
PR49
3K_0402_1%

21

PC34

4.7U_1206_25V6K

PC35

4.7U_1206_25V6K

2

PD10

2

-INE2 VCC(o)

5

PD8
1SS355_SOD323

PC24
1
2

1

PC26
PR44
2 1
2
10K_0402_5%
4700P_0402_25V7K

1

RLZ18B_LL34

2

1

2

SN7002N_SOT23

P ACIN

CS

PQ7
AO4407_SO8
AC OFF#

4

1

2

2

PR43
25.5K_0402_1%
10K_0402_1%

2

PR45
100K_0402_1%

4
PR42

1

1
3

1
3

PC25

S

43,46

22

CS

N18

2

0.1U_0402_16V7K
D

AC OFF#1

+INE2

PC23
0.022U_0402_16V7K
1
2

1
1

DTC115EUA_SC70

PQ10

23

2

3
PQ8

OUTC2 GND

PD7

1

2

V IN

PR40
1K_0402_5%

3

1
100K_0402_5%

24

5
6
7
8

1

1

2
PR41

+INC2

1

ADP_I

2

2
G

PR39
1
2
47K_0402_5%

2

2

34

PU4
1 -INC2

1

PC22
0.1U_0603_25V7K

47K

2

2

200K_0402_1%

1

47K

PQ6
DTA144EUA_SC70

2

3

1

PR37
PR38
47K_0402_5%

+3VALWP
CS

1

PR54

1

2

PR55

4.2V

1

2

150K_0603_0.1%

PQ12
DTC115EUA_SC70

1

300K_0603_0.1%

2

PR56
47K_0402_5%

2

3

1

PQ14
AO4407_SO8

DKN_B+
PQ13
DTC115EUA_SC70

VMB_A

PR59
27K_0402_1%
1
2

1
PR58
340K_0402_1%

2

B+

2
1

3S3P : 13.5V--> BATT_OVP= 1.5V

PC36
1U_1206_25V7K

1

2

8
P

3

-

2

PU5B
LM358A_SO8
7 0

+

5

-

6

34

DKN_B+_ON

4

1

1

1

DTC115EUA_SC70

PR65
PR66
105K_0402_1%

2

2.2K_0402_5%

2

2

2
PQ15

4

+

G

PU5A
LM358A_SO8
1 0

34 BATT_AOVP

A

2

PR62
499K_0402_1%

(BAT_OVP=0.1111 *VMB)

4

PR61
10K_0402_1%

1

OVP voltage : LI
+12VALWP

1
2
3

1

2

4

8
7
6
5

3

FSTCHG

3

34

B+

3

3

PC38
0.01U_0402_25V7Z
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .

B

C

Compal Electronics, Inc.
SCHEMATIC, M/B LA-2492
Document Number

R ev
B

401317
¬P 期一, 一月 03, 2005

Sheet
D

45

of

51

5

4

3

2

1

PC44
N4

2

1

1

EC11FS2_SOD106

PQ18
SI4800DY-T1_SO8

2

5
6
7
8

1
4
3
2
1

2
5
6
7
8

2

D
D
D
D
21

2

VL
GND

PC58

PR83
698_0402_1%

0.47U_0603_16V7K
PC61
4.7U_0805_6.3V6K

+5VALWP
47

220U_6.3V_M

2
VL

2

2
1
PR89
220K_0402_5%

PD17
SKUL30-02AT_SMA

2

1

PC65
PR88

B

1
+

2

2

PC63
100P_0402_50V8J

1

PR86
10.2K_0402_1%

2

MAX1902EAI_SSOP28

1

1

POK

1

PC66
@ 0.047U_0603_25V7M

G
S
S
S
4
3
2
1

2.5VREF

1
PC62
1000P_0402_50V7K

2
2

1
47K_0402_5%

10K_0402_1%

1

RUN/ON3

CS H5

1

2

TIME/ON5

PDL5

2

2

VS
PR87

7
28

2M_0402_1%
PLX5

1

CSH3
CSL3
FB3
SKIP#
SHDN#

C

PR78

2

1
2
3
10
23

PQ21
SI4810DY_SO8

4
5
18
16
17
19
20
14
13
12
15
9
6
11

1

LX3
DL3

12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#

2

PC60
100P_0402_50V8J

PR85

1

DH3

26
24

8

1

2

1

2

SKUL30-02AT_SMA

2

1
PR82
10K_0402_5%

PACIN

2

1

PR84

PC64
@ 100P_0402_50V8J

27

0_0402_5%

3.32K_0402_1%
43,45

PC56
47P_0402_50V8J

2

1

PR81
CS H3
CSL3
2 620_0402_5%
1
PD16

BST3

1

1

PR79

+

22

PU7

25
0.47U_0603_16V7K

V+

1

PC57

1

2
+3VALWP

2

PR75
1.54K_0402_1%

1

2

PC54
4.7U_1206_25V6K
PD H5

2

2

2

PR77
1.27K_0402_1%

3

1
1

1
1

2

PC50
PC51
4.7U_1206_25V6K 4.7U_1206_25V6K

1

2

2

1
S
S
S
G
1
2
3
4

1

1

SI4800DY-T1_SO8

2
1
1.27K_0402_1%

PR80

2

PC53
0.1U_0603_25V7K

PC52
4.7U_0805_6.3V6K

PDH3

PDL3
PR76

1M_0402_1%

PC59

PQ19

D
D
D
D

+12VALWP

1

8
7
6
5
D
D
D
D

PQ20
SI4810DY_SO8

C

1

10uH_SDT-1205P-100-118_5A_20%

B+++

PD15
1SS355_SOD323

PC55
47P_0402_50V8J

2 PC49

G
S
S
S

VL

220U_6.3V_M

1

0.1U_0603_25V7K

2

1
2
3
4

S
S
S
G

DAP202U_SOT323

PLX3

PL5
10UH_D104C-919AS-100M_4.5A_20%

PD14

VS

2

2

4.7U_1206_25V6K

2

D
D
D
D

1

1

PC48

4.7U_1206_25V6K

2

PT1

PC47

D

2

1 FLYBACK
22_1206_5%

8
7
6
5

JUMP_43X118

S NB 2
PR74

4

1

PC45
470P_0805_100V7K

1

1

2

2

3

2

BST51

4.7U_1206_25V6K

1

B+

2 PC46 BST31
0.1U_0603_25V7K

1

1

B+++
PJ12

D

2

PD13

PC67
@ 100P_0402_50V8J

B

10K_0402_1%

2

1

MAINPW ON 18,43,44

PC68
0.47U_0603_16V7K

A

A

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
IN C .
D ate:
5

4

3

2

Compal Electronics, Inc.
SCHEMATIC, M/B LA-2492
Document Number

R ev
B

401317
¬P 期一, 一月 03, 2005

Sheet
1

46

of

51

A

B

C

D

PR90

1

PC69
4.7U_1206_25V6K

1

2

1

B+

PC71

2

2

0_1206_5%

2

1

PC70
4.7U_1206_25V6K

1

1

PL6
FBM-L18-453215-900LMA90T_1812
1
2

+5VALWP

1

2
PC72

1

1

PD18
DAP202U_SOT323

PR91

PC73

1

2.2U_0805_10V6K

2

17

BOOT2

23

5
6
7
8

PC75
2
1
0.01U_0402_25V7K

D
D
D
D

28

SOFT2

PR92

5

UGATE1

UGATE2

24

4

PHASE1

PHASE2

25

0_0603_5%

1
PR93
0_0603_5%

2

PR94
18.2K_0402_1%

2

2

7

ISEN1

2

LGATE1

ISEN2

22

LGATE2

27

PQ23
SI4800DY-T1_SO8

1

PC77
0.1U_0402_16V7K

+1.5V

PL8
4.7UH_D104C-919AS-100M_5.2A_20%

1

2

0.01U_0402_16V7Z
PC81

PQ25
SI4810DY_SO8

220U_6.3V_M

+

PGND2

26

9
10
8
15

VOUT1
VSEN1
EN1
PG1

VOUT2
VSEN2
EN2
PG2/REF

20
19
21
16

OCSET2

18

PC80
PR97
6.81K_0402_1%

2

2

46

1

POK

PR100
PC83
@ 0.1U_0402_16V7K

10K_0402_1%

2

DDR

1
2

PR102

2
0_0402_5%

PR99

2

200K_0402_1%

2

@ 0.1U_0402_16V7K

ISL6225BCA-T_SSOP28

PR103
107K_0402_1%

2

PC82

OCSET1

1

PR70 0_0402_5%

1

13

V_ON

10K_0402_1%

GND

41

11

1

PR101

@

1

30,34,38,40,41 S YSON

1 PR98
2
0_0402_5%
1
2
1

1

2

PGND1

1

1
2

4
3
2
1
3

2

+1.5VALWP

G
S
S
S

1.87K_0402_1%

2

PR96
2.4K_0402_1%
1
2

PR95

1

2

G
S
S
S

BOOT1

1
2
3
4

PC79

6

4
3
2
1

PQ24
PC76
0.1U_0402_16V7K
SI4810DY_SO8

2

5
6
7
8

1

1

1

S
S
S
G

0.01U_0402_16V7Z

2

1

D
D
D
D

D
D
D
D

+
2

PC78

2

8
7
6
5

220U_6.3V_M

1

1

1

VCC

1
2
3
4

PC74
PU8
12
2
1
0.01U_0402_25V7K SOFT1

VIN

S
S
S
G

PQ22
SI4800DY-T1_SO8
PL7
1.8UH_D104C-919AS-1R8N_9.5A_20%

+DDRVCCP

14

D
D
D
D

2.5V/1.8V

2.2_0603_5%

3

8
7
6
5

2

0.1U_0603_25V7K

2

2

2

PC16
4.7U_0805_6.3V6K

1

4.7U_1206_25V6K

3

3

PU9

1

PU9,PC84,PR105,PR104,PR106,PC85
16,26,32,34,36,37,41,48 SUSP#

DDRII

10K_0402_1% (1.8V)

1

3

1

EN

ADJ

4

5

GND

GND

7

6

GND

GND

8

2
G965-18P1U_SO8
@

2

PR105
0_0402_5%
@

PU12,PC95,PR114,PC96
41,48

VS_ON

1

PR104
22K_0402_1%

@

PC85
10U_1206_6.3V6M
@

PR106
20K_0402_1%

@

2

18.2K_0402_1% (2.5V)

PC84

4.7U_0805_6.3V6K
@

VO

2

PR72
0_0402_5%
@

1

DDRI

UNPOP

VIN

1

JUMP_43X118

PR94

+2.5VSP

2

2

1

1

1

2

2

2

1

PJ13
+3VS

4

PC86
@ 0.1U_0402_16V7K

2

4

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
A

B

C

Compal Electronics, Inc.
SCHEMATIC, M/B LA-2492
Document Number

R ev
B

401317
¬P 期一, 一月 03, 2005

Sheet
D

47

of

51

5

4

3

2

PR107

UGATE

2

PHASE

8

LGATE

4

OCSET

1

PL9

+1.05VSP

5
6
7
8

FB

GND

D

3UH_SPC-07040-3R0_5A_30%
2
1

APW 7057KC-TR_SOP8

PQ29
SN7002N_SOT23

PC89
22U_1206_6.3V

5
6
7
8
D
D
D
D

1

4
3
2
1
S

2
G

+5VALW

G
S
S
S

1
BOOT

1

PQ28
SI4800DY-T1_SO8

D
D
D
D

2

+

PC92
220U_6.3V_M

2

PR111
2.26K_0402_1%
1
2

2

PR110
@ 0_0402_5%

D

1

PQ26
SI4800DY-T1_SO8

G
S
S
S

3

1

4
3
2
1

1

6,26,32,34,36,37,41,47 SUSP#

6
PQ27
SN7002N_SOT23

2

1

2
PC91
0.1U_0402_16V7K

2

PR143
0_0402_5%

1

1

S

2
G

3

VS_ON

1

VL

D

3

PR109
100K_0402_5%
2
1

PC88
22U_1206_6.3V

2

JUMP_43X118

2

7

PD19
1N4148_SOD80

2

1U_0603_6.3V6M

VCC

2

PC90
470P_0603_50V7K
PU10

1

D

PC87

5

PR108
5.1K_0402_1%

PJ14

2

2
10_0603_5%

1

1

2

2

1

1

1

1

PC93

2

@ 0.1U_0402_16V7K

PR112
7.5K_0402_1%

1

C

PC122
1

2

PU14

C

VOUT

2

GND
VIN

1

PC123

BP

5

1
@

SHDN#

2
+DDRVCC

0.1U_0402_16V4Z
1.8VS_ON

4

1

1

3

+3V

1

PC124 APL5301-18BC-TR_SOT23-5
@

PJ15
JUMP_43X118

2

2

2

2

@ 1U_0603_10V4Z

+1.8VS

@ 1U_0603_10V4Z

1

PC94
0.1U_0402_16V7K

PU11

5
6

ADJ

4

GND

GND

7

GND

GND

8

EN

1

2

6

NC

5

PC97
10U_1206_6.3V7K

3

VREF

NC

7

4

VOUT

NC

8

TP

9

+3VALWP

1

PC96
10U_1206_6.3V6M

PR113
1K_0402_1%

G965-18P1U_SO8
SUSP#

VCNTL

GND

1

1

VIN

2

2

1

VO

1

2

PC95

4.7U_0805_6.3V6K

VIN

1

JUMP_43X118

+1.8VSP

3
2

1

2

1

2

PU12

1
2

B

2

2

PJ16
+DDRVCCP

1.8VS_ON

B

PC98
1U_0603_6.3V6M

APL5331KAC-TR_SO8

PC99
@ 0.1U_0402_16V7K

1

1

1

PC101
10U_1206_6.3V7K

2

1

PC102
@ 0.1U_0402_16V7K

2

2

+DDRVTTP

2

1

PR710_0402_5%

D

2
G
PR116
PC100
1K_0402_1% 0.1U_0402_16V7K
PQ30
S
SN7002N_SOT23
2

VS_ON

0_0402_5%
1
2

1

VS_ON

SUSP

SUSP

2

41,47

35,41

3

PR114
@ 0_0402_5%

1

PR115

A

A

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
IN C .
D ate:
5

4

3

2

Compal Electronics, Inc.
SCHEMATIC, M/B LA-2492
Document Number

R ev
B

401317
¬P 期一, 一月 03, 2005

Sheet
1

48

of

51

CPU_B+

+5VS

B+
PL3

1

2

V+

36

D1

BSTM

26

5

CPU_VID2

22

D2

DHM

28

5

CPU_VID3

21

D3

5

CPU_VID4

20

D4

16

3

PQ38
HMBT2222A_SOT23

5
6
7
8
D
D
D
D

1

5
6
7
8
D
D
D
D

8

REF

DHS

33

9

ILIM

LXS

34

7

OFS

DLS

32

3

SUS

CSP

40

18

SKIP

CSN

39

GND

GNDS

@

2 PR147 1
0_0603_5%
+5VS

1
13

0.47U_0603_16V7K

1

1
2
PR128
3K_0402_1%
2
1

PC115
0.022U_0402_16V7K

2

2
PR131
0_0402_5%

CPU_B+

PD22
EP10QY03

4
3
2
1

11

PR120

2
35

PC111
1
2

909_0402_1%
2

2
1
PC118
4.7U_1206_25V6K

BSTS

PR126
1

2
470P_0402_50V8J

PL11
0.56UH_ETQP4LR56WFC_21A_20%
1
2

1

D
D
D
D
G
S
S
S

PR145
4.7_1206_5%

PC41
680P_0603_50V8J

1

TON

1
PC113

2

2
B
E

2

FB

4
3
2
1

1

C

14

1 2

S

2
G

PSI#

15

CCI

5
6
7
8

1 1

D

3

1

PR137
100K_0402_1%

5

27P_0402_50V8J

PR136
10K_0402_1%

PQ37
RHU002N06_SOT323

2

2

PR135
20K_0402_1%

FB

CCV

PC120
2
1

1

+5VS

PC117
1
2

S

2

D

2
G

PR134
0_0402_5%
1
2

19 PM_DPRSLPVR

1

1
2

S

R EF

2

0.22U_0603_16V7K

3

3

14,19 PM_STP_CPU#

D

PC116
100P_0402_50V8J

PQ33
2
G

1

RHU002N06_SOT323

PR132

PR130 100K_0402_1%

10.7K_0402_1%
1
2

FB

1
PC114

TIME

PQ36
AO4410_SO8

PR127 200K_0402_1%
PR129
1
2
66.5K_0402_1%
1
2

1
12

PQ35
AO4408_SO8
G
D 5
S
D 6
S
D 7
S
D 8

270P_0402_50V7K

2

PQ34
RHU002N06_SOT323

1

2

3.3_0603_5%

PC112 1

0.22U_0603_16V7K

30.1K_0402_1%
1

2

PR125
2

PR133

0_0402_5%

PC40
680P_0603_50V8J

499_0402_1%
2
1

OAIN-

PR122

SHDN#

499_0402_1%
2
1

17

6

PR121

OAIN+

909_0402_1%
2
1

S1

PR138

38

5

909_0402_1%
2
1

CMN

CPU VCC SENSE

2
1
PC119
4.7U_1206_25V6K

S0

VROK

1

2

PR124

1

4

0.001_2512_5%

2

CMP

37

R EF PR142 @1 0_0402_5%
2

1

31

1

PR119
2

PR144
4.7_1206_5%

4
3
2
1

V CC

MAX1532

PGND

0_0603_5%

1

25

27
29

+CPU_CORE
PL10
0.56UH_ETQP4LR56WFC_21A_20%
1
2

G
S
S
S

PR140 0_0402_5%
1
2

D5

LXM
DLM

2 PR118 1
PR146 3.3_0603_5%
1

PQ32
AO4410_SO8

19

PU13

2

1000P_0402_50V7K

D0

23

PQ31
AO4408_SO8

G
S
S
S

24

CPU_VID1

PC103
220U_25V_M

4
3
2
1

CPU_VID0

5

V CC PR141 @1 0_0402_5%
2

VR_ON

30

5

5
CPU_VID5
6,14,19 VGATE

34

VDD

0.22U_0603_16V7K

VCC

PC109
2
1

10

0.01U_0402_25V7Z

PC108

1

2

2

2.2U_0603_6.3V6K

1

V CC

+

2

2

PC106
PC107
1U_0603_16V6K

1

PC110
1
2

2

2

FBM-L18-453215-900LMA90T_1812

PR123
3K_0402_1%
1
2

1
PR117
10_0402_5%

2
1
PC105
4.7U_1206_25V6K

2
1
PC104
4.7U_1206_25V6K

1
PD20
EP10QY03

1

2

PC121
0.47U_0603_16V7K

909_0402_1%
2
PR139

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,INC.

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet

49

of

51

5

4

3

2

1

EAT10 PIR List
********** Rev:0.2 PIR List

D

**********
Intel Recommend

P06:Add @ in C441, C427
C472
& C460 Change Value from 220U to 330U
Del JP9

Power Team testing OK

P12:+3VS change from JP25.196 to JP25.194

Intel Recommend

P15:New add R570, R571 & R572
New add L33
Del D2 & D25

RGB without Docking
EMI
EMI

P16:Change U44 from 7404 to 74125

LCDVDD Soft-Start

P18:New add R573
R439 Change Value from 180K to 20K
C271 Change Value from 0.1U to 1U

Intel Recommend
Intel Recommend
Intel Recommend

P20:R214 Change Value from 1K to 10ohm

Intel Recommend

P22:New add @R

SWDJ testing

, @R& Q

P24:New add R586
New add @R581

TI Recommend

P25:New add R582, R583, @R584, R585, R588, R589 & @C685

TI Recommend

P27:R73

C

2004/10/26 Writer by Sam Tsai

P04:Add @ in R28

Change Value from 4.99K to 4.7K

D

Marvwll Recommend

P31:R361 & R371 Change Value from 47K to 22K
P33:New add R543, R544
P32:Modify C399 Net to SPKL+

Design Change

P33:New add L34
add@ in C647 ~ C662

EMI

Design Change

P34:New add R587

Design Change

P35:New add JP32 & C671
New add C682 ~ C684
JP13 reverse

Design Change
EMI
Design Change

P36:New add

SWDJ testing

P37:SW1 change to 1BS003-1211L_3P

Design Change

C

Design Change
P38:Q52.3 change from +3VALW to +3V
Q57.3 change from +5VALW to +5VS
Lid Switch IC Power change from JP16.26 +3VALW to JP16.27 RTCVREF
New add C672 ~ C681
EMI
P39:New add R574

Design Change

P40:Del D11

Design Change

B

B

A

A

Compal Electronics, Inc.
Title

SCHEMATIC, M/B LA-2492
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

Document Number

R ev
B

401317
D ate:

¬P 期一, 一月 03, 2005

Sheet
1

50

of

51

5

4

3

2

1

Version Change List ( P. I. R. List ) for Power Circuit
Item Page#

Title

Date

Request
Owner

Description

Rev.

D

D

0.1

1

45

Design change

07/06/2004

Compal

Change PD7 from RLZ22B to RLZ18B for 15V adapter OVP

2

43

Design change

08/20/2004

Compal Add precharge function for MAX1902 UVP when adapter pull out /in right away

0.2

3

49

Design change

08/20/2004

Compal Add PL3 fo speed step function,change PC103 from 100U_25V_M to 220U_25V_M

0.2

4

43

Design change

08/20/2004

Compal Change PF1 from 7A to 12A for customer review fuse current rating too margin

0.2

5

43

Design change

08/20/2004

Compal

6

47 48

Design change

08/20/2004

Compal

7

49

Design change

08/20/2004

Compal

Change PC115 from 0.022U to 2200P for improve transient

0.2

8

47

Design change

08/20/2004

Compal

Change PL7 from 4.7UH_5.2A to 9.5A for design margin

0.2

9

48

Design change

10/04/2004

Compal

Change control sign for HW request

10

48

Design change

12/20/2004

Compal

Change PR118.PR133 from 0_0603_5% to 3.3_0603_5% and add 4.7_1206_5% on PR144,PR145,680p_0603_50V on PC40 PC41.

0.2

Change PQ1 from TP0610T to TP0610T for EOL

0.2

Change control sign for HW request

C

C

for EMI fail

B

B

A

A

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

SCHEMATIC, M/B LA-2492
Size

Document Number

R ev
B

401317
Date:

星期一, 一月 03, 2005

Sheet
1

51

of

51



Source Exif Data:
File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.3
Linearized                      : Yes
Create Date                     : 2005:01:05 17:18:01+08:00
Modify Date                     : 2005:01:05 17:18:01+08:00
Page Count                      : 51
Creation Date                   : 2005:01:05 09:18:01Z
Mod Date                        : 2005:01:05 09:18:01Z
Producer                        : Acrobat Distiller 5.0 (Windows)
Metadata Date                   : 2005:01:05 09:18:01Z
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